PK hwFZeש{ * * PassAnalysisSupport.hnu �[��� //===- llvm/PassAnalysisSupport.h - Analysis Pass Support code --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines stuff that is used to define and "use" Analysis Passes.
// This file is automatically #included by Pass.h, so:
//
// NO .CPP FILES SHOULD INCLUDE THIS FILE DIRECTLY
//
// Instead, #include Pass.h
//
//===----------------------------------------------------------------------===//
#if !defined(LLVM_PASS_H) || defined(LLVM_PASSANALYSISSUPPORT_H)
#error "Do not include <PassAnalysisSupport.h>; include <Pass.h> instead"
#endif
#ifndef LLVM_PASSANALYSISSUPPORT_H
#define LLVM_PASSANALYSISSUPPORT_H
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include <cassert>
#include <tuple>
#include <utility>
#include <vector>
namespace llvm {
class Function;
class Pass;
class PMDataManager;
class StringRef;
//===----------------------------------------------------------------------===//
/// Represent the analysis usage information of a pass. This tracks analyses
/// that the pass REQUIRES (must be available when the pass runs), REQUIRES
/// TRANSITIVE (must be available throughout the lifetime of the pass), and
/// analyses that the pass PRESERVES (the pass does not invalidate the results
/// of these analyses). This information is provided by a pass to the Pass
/// infrastructure through the getAnalysisUsage virtual function.
///
class AnalysisUsage {
public:
using VectorType = SmallVectorImpl<AnalysisID>;
private:
/// Sets of analyses required and preserved by a pass
// TODO: It's not clear that SmallVector is an appropriate data structure for
// this usecase. The sizes were picked to minimize wasted space, but are
// otherwise fairly meaningless.
SmallVector<AnalysisID, 8> Required;
SmallVector<AnalysisID, 2> RequiredTransitive;
SmallVector<AnalysisID, 2> Preserved;
SmallVector<AnalysisID, 0> Used;
bool PreservesAll = false;
void pushUnique(VectorType &Set, AnalysisID ID) {
if (!llvm::is_contained(Set, ID))
Set.push_back(ID);
}
public:
AnalysisUsage() = default;
///@{
/// Add the specified ID to the required set of the usage info for a pass.
AnalysisUsage &addRequiredID(const void *ID);
AnalysisUsage &addRequiredID(char &ID);
template<class PassClass>
AnalysisUsage &addRequired() {
return addRequiredID(PassClass::ID);
}
AnalysisUsage &addRequiredTransitiveID(char &ID);
template<class PassClass>
AnalysisUsage &addRequiredTransitive() {
return addRequiredTransitiveID(PassClass::ID);
}
///@}
///@{
/// Add the specified ID to the set of analyses preserved by this pass.
AnalysisUsage &addPreservedID(const void *ID) {
pushUnique(Preserved, ID);
return *this;
}
AnalysisUsage &addPreservedID(char &ID) {
pushUnique(Preserved, &ID);
return *this;
}
/// Add the specified Pass class to the set of analyses preserved by this pass.
template<class PassClass>
AnalysisUsage &addPreserved() {
pushUnique(Preserved, &PassClass::ID);
return *this;
}
///@}
///@{
/// Add the specified ID to the set of analyses used by this pass if they are
/// available..
AnalysisUsage &addUsedIfAvailableID(const void *ID) {
pushUnique(Used, ID);
return *this;
}
AnalysisUsage &addUsedIfAvailableID(char &ID) {
pushUnique(Used, &ID);
return *this;
}
/// Add the specified Pass class to the set of analyses used by this pass.
template<class PassClass>
AnalysisUsage &addUsedIfAvailable() {
pushUnique(Used, &PassClass::ID);
return *this;
}
///@}
/// Add the Pass with the specified argument string to the set of analyses
/// preserved by this pass. If no such Pass exists, do nothing. This can be
/// useful when a pass is trivially preserved, but may not be linked in. Be
/// careful about spelling!
AnalysisUsage &addPreserved(StringRef Arg);
/// Set by analyses that do not transform their input at all
void setPreservesAll() { PreservesAll = true; }
/// Determine whether a pass said it does not transform its input at all
bool getPreservesAll() const { return PreservesAll; }
/// This function should be called by the pass, iff they do not:
///
/// 1. Add or remove basic blocks from the function
/// 2. Modify terminator instructions in any way.
///
/// This function annotates the AnalysisUsage info object to say that analyses
/// that only depend on the CFG are preserved by this pass.
void setPreservesCFG();
const VectorType &getRequiredSet() const { return Required; }
const VectorType &getRequiredTransitiveSet() const {
return RequiredTransitive;
}
const VectorType &getPreservedSet() const { return Preserved; }
const VectorType &getUsedSet() const { return Used; }
};
//===----------------------------------------------------------------------===//
/// AnalysisResolver - Simple interface used by Pass objects to pull all
/// analysis information out of pass manager that is responsible to manage
/// the pass.
///
class AnalysisResolver {
public:
AnalysisResolver() = delete;
explicit AnalysisResolver(PMDataManager &P) : PM(P) {}
PMDataManager &getPMDataManager() { return PM; }
/// Find pass that is implementing PI.
Pass *findImplPass(AnalysisID PI) {
Pass *ResultPass = nullptr;
for (const auto &AnalysisImpl : AnalysisImpls) {
if (AnalysisImpl.first == PI) {
ResultPass = AnalysisImpl.second;
break;
}
}
return ResultPass;
}
/// Find pass that is implementing PI. Initialize pass for Function F.
std::tuple<Pass *, bool> findImplPass(Pass *P, AnalysisID PI, Function &F);
void addAnalysisImplsPair(AnalysisID PI, Pass *P) {
if (findImplPass(PI) == P)
return;
std::pair<AnalysisID, Pass*> pir = std::make_pair(PI,P);
AnalysisImpls.push_back(pir);
}
/// Clear cache that is used to connect a pass to the analysis (PassInfo).
void clearAnalysisImpls() {
AnalysisImpls.clear();
}
/// Return analysis result or null if it doesn't exist.
Pass *getAnalysisIfAvailable(AnalysisID ID) const;
private:
/// This keeps track of which passes implements the interfaces that are
/// required by the current pass (to implement getAnalysis()).
std::vector<std::pair<AnalysisID, Pass *>> AnalysisImpls;
/// PassManager that is used to resolve analysis info
PMDataManager &PM;
};
/// getAnalysisIfAvailable<AnalysisType>() - Subclasses use this function to
/// get analysis information that might be around, for example to update it.
/// This is different than getAnalysis in that it can fail (if the analysis
/// results haven't been computed), so should only be used if you can handle
/// the case when the analysis is not available. This method is often used by
/// transformation APIs to update analysis results for a pass automatically as
/// the transform is performed.
template<typename AnalysisType>
AnalysisType *Pass::getAnalysisIfAvailable() const {
assert(Resolver && "Pass not resident in a PassManager object!");
const void *PI = &AnalysisType::ID;
Pass *ResultPass = Resolver->getAnalysisIfAvailable(PI);
if (!ResultPass) return nullptr;
// Because the AnalysisType may not be a subclass of pass (for
// AnalysisGroups), we use getAdjustedAnalysisPointer here to potentially
// adjust the return pointer (because the class may multiply inherit, once
// from pass, once from AnalysisType).
return (AnalysisType*)ResultPass->getAdjustedAnalysisPointer(PI);
}
/// getAnalysis<AnalysisType>() - This function is used by subclasses to get
/// to the analysis information that they claim to use by overriding the
/// getAnalysisUsage function.
template<typename AnalysisType>
AnalysisType &Pass::getAnalysis() const {
assert(Resolver && "Pass has not been inserted into a PassManager object!");
return getAnalysisID<AnalysisType>(&AnalysisType::ID);
}
template<typename AnalysisType>
AnalysisType &Pass::getAnalysisID(AnalysisID PI) const {
assert(PI && "getAnalysis for unregistered pass!");
assert(Resolver&&"Pass has not been inserted into a PassManager object!");
// PI *must* appear in AnalysisImpls. Because the number of passes used
// should be a small number, we just do a linear search over a (dense)
// vector.
Pass *ResultPass = Resolver->findImplPass(PI);
assert(ResultPass &&
"getAnalysis*() called on an analysis that was not "
"'required' by pass!");
// Because the AnalysisType may not be a subclass of pass (for
// AnalysisGroups), we use getAdjustedAnalysisPointer here to potentially
// adjust the return pointer (because the class may multiply inherit, once
// from pass, once from AnalysisType).
return *(AnalysisType*)ResultPass->getAdjustedAnalysisPointer(PI);
}
/// getAnalysis<AnalysisType>() - This function is used by subclasses to get
/// to the analysis information that they claim to use by overriding the
/// getAnalysisUsage function. If as part of the dependencies, an IR
/// transformation is triggered (e.g. because the analysis requires
/// BreakCriticalEdges), and Changed is non null, *Changed is updated.
template <typename AnalysisType>
AnalysisType &Pass::getAnalysis(Function &F, bool *Changed) {
assert(Resolver &&"Pass has not been inserted into a PassManager object!");
return getAnalysisID<AnalysisType>(&AnalysisType::ID, F, Changed);
}
template <typename AnalysisType>
AnalysisType &Pass::getAnalysisID(AnalysisID PI, Function &F, bool *Changed) {
assert(PI && "getAnalysis for unregistered pass!");
assert(Resolver && "Pass has not been inserted into a PassManager object!");
// PI *must* appear in AnalysisImpls. Because the number of passes used
// should be a small number, we just do a linear search over a (dense)
// vector.
Pass *ResultPass;
bool LocalChanged;
std::tie(ResultPass, LocalChanged) = Resolver->findImplPass(this, PI, F);
assert(ResultPass && "Unable to find requested analysis info");
if (Changed)
*Changed |= LocalChanged;
else
assert(!LocalChanged &&
"A pass trigged a code update but the update status is lost");
// Because the AnalysisType may not be a subclass of pass (for
// AnalysisGroups), we use getAdjustedAnalysisPointer here to potentially
// adjust the return pointer (because the class may multiply inherit, once
// from pass, once from AnalysisType).
return *(AnalysisType*)ResultPass->getAdjustedAnalysisPointer(PI);
}
} // end namespace llvm
#endif // LLVM_PASSANALYSISSUPPORT_H
PK hwFZ��R�� � Debuginfod/HTTPServer.hnu �[��� //===-- llvm/Debuginfod/HTTPServer.h - HTTP server library ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file contains the declarations of the HTTPServer and HTTPServerRequest
/// classes, the HTTPResponse, and StreamingHTTPResponse structs, and the
/// streamFile function.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFOD_HTTPSERVER_H
#define LLVM_DEBUGINFOD_HTTPSERVER_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Error.h"
#ifdef LLVM_ENABLE_HTTPLIB
// forward declarations
namespace httplib {
class Request;
class Response;
class Server;
} // namespace httplib
#endif
namespace llvm {
struct HTTPResponse;
struct StreamingHTTPResponse;
class HTTPServer;
class HTTPServerError : public ErrorInfo<HTTPServerError, ECError> {
public:
static char ID;
HTTPServerError(const Twine &Msg);
void log(raw_ostream &OS) const override;
private:
std::string Msg;
};
class HTTPServerRequest {
friend HTTPServer;
#ifdef LLVM_ENABLE_HTTPLIB
private:
HTTPServerRequest(const httplib::Request &HTTPLibRequest,
httplib::Response &HTTPLibResponse);
httplib::Response &HTTPLibResponse;
#endif
public:
std::string UrlPath;
/// The elements correspond to match groups in the url path matching regex.
SmallVector<std::string, 1> UrlPathMatches;
// TODO bring in HTTP headers
void setResponse(StreamingHTTPResponse Response);
void setResponse(HTTPResponse Response);
};
struct HTTPResponse {
unsigned Code;
const char *ContentType;
StringRef Body;
};
typedef std::function<void(HTTPServerRequest &)> HTTPRequestHandler;
/// An HTTPContentProvider is called by the HTTPServer to obtain chunks of the
/// streaming response body. The returned chunk should be located at Offset
/// bytes and have Length bytes.
typedef std::function<StringRef(size_t /*Offset*/, size_t /*Length*/)>
HTTPContentProvider;
/// Wraps the content provider with HTTP Status code and headers.
struct StreamingHTTPResponse {
unsigned Code;
const char *ContentType;
size_t ContentLength;
HTTPContentProvider Provider;
/// Called after the response transfer is complete with the success value of
/// the transfer.
std::function<void(bool)> CompletionHandler = [](bool Success) {};
};
/// Sets the response to stream the file at FilePath, if available, and
/// otherwise an HTTP 404 error response.
bool streamFile(HTTPServerRequest &Request, StringRef FilePath);
/// An HTTP server which can listen on a single TCP/IP port for HTTP
/// requests and delgate them to the appropriate registered handler.
class HTTPServer {
#ifdef LLVM_ENABLE_HTTPLIB
std::unique_ptr<httplib::Server> Server;
unsigned Port = 0;
#endif
public:
HTTPServer();
~HTTPServer();
/// Returns true only if LLVM has been compiled with a working HTTPServer.
static bool isAvailable();
/// Registers a URL pattern routing rule. When the server is listening, each
/// request is dispatched to the first registered handler whose UrlPathPattern
/// matches the UrlPath.
Error get(StringRef UrlPathPattern, HTTPRequestHandler Handler);
/// Attempts to assign the requested port and interface, returning an Error
/// upon failure.
Error bind(unsigned Port, const char *HostInterface = "0.0.0.0");
/// Attempts to assign any available port and interface, returning either the
/// port number or an Error upon failure.
Expected<unsigned> bind(const char *HostInterface = "0.0.0.0");
/// Attempts to listen for requests on the bound port. Returns an Error if
/// called before binding a port.
Error listen();
/// If the server is listening, stop and unbind the socket.
void stop();
};
} // end namespace llvm
#endif // LLVM_DEBUGINFOD_HTTPSERVER_H
PK hwFZu��PN N Debuginfod/DIFetcher.hnu �[��� //===- llvm/DebugInfod/DIFetcher.h - Debug info fetcher----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file declares a DIFetcher implementation for obtaining debug info from
/// debuginfod.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFOD_DIFETCHER_H
#define LLVM_DEBUGINFOD_DIFETCHER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/DebugInfo/Symbolize/DIFetcher.h"
namespace llvm {
class DebuginfodDIFetcher : public symbolize::DIFetcher {
public:
virtual ~DebuginfodDIFetcher() = default;
/// Fetches the given Build ID using debuginfod and returns a local path to
/// the resulting debug binary.
Optional<std::string> fetchBuildID(ArrayRef<uint8_t> BuildID) const override;
};
} // namespace llvm
#endif // LLVM_DEBUGINFOD_DIFETCHER_H
PK hwFZHV*�
�
Debuginfod/HTTPClient.hnu �[��� //===-- llvm/Support/HTTPClient.h - HTTP client library ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file contains the declarations of the HTTPClient library for issuing
/// HTTP requests and handling the responses.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFOD_HTTPCLIENT_H
#define LLVM_DEBUGINFOD_HTTPCLIENT_H
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MemoryBuffer.h"
#include <chrono>
namespace llvm {
enum class HTTPMethod { GET };
/// A stateless description of an outbound HTTP request.
struct HTTPRequest {
SmallString<128> Url;
SmallVector<std::string, 0> Headers;
HTTPMethod Method = HTTPMethod::GET;
bool FollowRedirects = true;
HTTPRequest(StringRef Url);
};
bool operator==(const HTTPRequest &A, const HTTPRequest &B);
/// A handler for state updates occurring while an HTTPRequest is performed.
/// Can trigger the client to abort the request by returning an Error from any
/// of its methods.
class HTTPResponseHandler {
public:
/// Processes an additional chunk of bytes of the HTTP response body.
virtual Error handleBodyChunk(StringRef BodyChunk) = 0;
protected:
~HTTPResponseHandler();
};
/// A reusable client that can perform HTTPRequests through a network socket.
class HTTPClient {
#ifdef LLVM_ENABLE_CURL
void *Curl = nullptr;
#endif
public:
HTTPClient();
~HTTPClient();
static bool IsInitialized;
/// Returns true only if LLVM has been compiled with a working HTTPClient.
static bool isAvailable();
/// Must be called at the beginning of a program, while it is a single thread.
static void initialize();
/// Must be called at the end of a program, while it is a single thread.
static void cleanup();
/// Sets the timeout for the entire request, in milliseconds. A zero or
/// negative value means the request never times out.
void setTimeout(std::chrono::milliseconds Timeout);
/// Performs the Request, passing response data to the Handler. Returns all
/// errors which occur during the request. Aborts if an error is returned by a
/// Handler method.
Error perform(const HTTPRequest &Request, HTTPResponseHandler &Handler);
/// Returns the last received response code or zero if none.
unsigned responseCode();
};
} // end namespace llvm
#endif // LLVM_DEBUGINFOD_HTTPCLIENT_H
PK hwFZ1g x Debuginfod/Debuginfod.hnu �[��� //===-- llvm/Debuginfod/Debuginfod.h - Debuginfod client --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file contains several declarations for the debuginfod client and
/// server. The client functions are getDefaultDebuginfodUrls,
/// getCachedOrDownloadArtifact, and several convenience functions for specific
/// artifact types: getCachedOrDownloadSource, getCachedOrDownloadExecutable,
/// and getCachedOrDownloadDebuginfo. For the server, this file declares the
/// DebuginfodLogEntry and DebuginfodServer structs, as well as the
/// DebuginfodLog, DebuginfodCollection classes.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFOD_DEBUGINFOD_H
#define LLVM_DEBUGINFOD_DEBUGINFOD_H
#include "HTTPServer.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Object/BuildID.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Support/Mutex.h"
#include "llvm/Support/RWMutex.h"
#include "llvm/Support/Timer.h"
#include <chrono>
#include <condition_variable>
#include <optional>
#include <queue>
namespace llvm {
/// Returns false if a debuginfod lookup can be determined to have no chance of
/// succeeding.
bool canUseDebuginfod();
/// Finds default array of Debuginfod server URLs by checking DEBUGINFOD_URLS
/// environment variable.
SmallVector<StringRef> getDefaultDebuginfodUrls();
/// Finds a default local file caching directory for the debuginfod client,
/// first checking DEBUGINFOD_CACHE_PATH.
Expected<std::string> getDefaultDebuginfodCacheDirectory();
/// Finds a default timeout for debuginfod HTTP requests. Checks
/// DEBUGINFOD_TIMEOUT environment variable, default is 90 seconds (90000 ms).
std::chrono::milliseconds getDefaultDebuginfodTimeout();
/// Fetches a specified source file by searching the default local cache
/// directory and server URLs.
Expected<std::string> getCachedOrDownloadSource(object::BuildIDRef ID,
StringRef SourceFilePath);
/// Fetches an executable by searching the default local cache directory and
/// server URLs.
Expected<std::string> getCachedOrDownloadExecutable(object::BuildIDRef ID);
/// Fetches a debug binary by searching the default local cache directory and
/// server URLs.
Expected<std::string> getCachedOrDownloadDebuginfo(object::BuildIDRef ID);
/// Fetches any debuginfod artifact using the default local cache directory and
/// server URLs.
Expected<std::string> getCachedOrDownloadArtifact(StringRef UniqueKey,
StringRef UrlPath);
/// Fetches any debuginfod artifact using the specified local cache directory,
/// server URLs, and request timeout (in milliseconds). If the artifact is
/// found, uses the UniqueKey for the local cache file.
Expected<std::string> getCachedOrDownloadArtifact(
StringRef UniqueKey, StringRef UrlPath, StringRef CacheDirectoryPath,
ArrayRef<StringRef> DebuginfodUrls, std::chrono::milliseconds Timeout);
class ThreadPool;
struct DebuginfodLogEntry {
std::string Message;
DebuginfodLogEntry() = default;
DebuginfodLogEntry(const Twine &Message);
};
class DebuginfodLog {
std::mutex QueueMutex;
std::condition_variable QueueCondition;
std::queue<DebuginfodLogEntry> LogEntryQueue;
public:
// Adds a log entry to end of the queue.
void push(DebuginfodLogEntry Entry);
// Adds a log entry to end of the queue.
void push(const Twine &Message);
// Blocks until there are log entries in the queue, then pops and returns the
// first one.
DebuginfodLogEntry pop();
};
/// Tracks a collection of debuginfod artifacts on the local filesystem.
class DebuginfodCollection {
SmallVector<std::string, 1> Paths;
sys::RWMutex BinariesMutex;
StringMap<std::string> Binaries;
sys::RWMutex DebugBinariesMutex;
StringMap<std::string> DebugBinaries;
Error findBinaries(StringRef Path);
Expected<std::optional<std::string>> getDebugBinaryPath(object::BuildIDRef);
Expected<std::optional<std::string>> getBinaryPath(object::BuildIDRef);
// If the collection has not been updated since MinInterval, call update() and
// return true. Otherwise return false. If update returns an error, return the
// error.
Expected<bool> updateIfStale();
DebuginfodLog &Log;
ThreadPool &Pool;
Timer UpdateTimer;
sys::Mutex UpdateMutex;
// Minimum update interval, in seconds, for on-demand updates triggered when a
// build-id is not found.
double MinInterval;
public:
DebuginfodCollection(ArrayRef<StringRef> Paths, DebuginfodLog &Log,
ThreadPool &Pool, double MinInterval);
Error update();
Error updateForever(std::chrono::milliseconds Interval);
Expected<std::string> findDebugBinaryPath(object::BuildIDRef);
Expected<std::string> findBinaryPath(object::BuildIDRef);
};
struct DebuginfodServer {
HTTPServer Server;
DebuginfodLog &Log;
DebuginfodCollection &Collection;
DebuginfodServer(DebuginfodLog &Log, DebuginfodCollection &Collection);
};
} // end namespace llvm
#endif
PK hwFZ���ˮ � Debuginfod/BuildIDFetcher.hnu �[��� //===- llvm/DebugInfod/BuildIDFetcher.h - Build ID fetcher ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file declares a Build ID fetcher implementation for obtaining debug
/// info from debuginfod.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFOD_DIFETCHER_H
#define LLVM_DEBUGINFOD_DIFETCHER_H
#include "llvm/Object/BuildID.h"
#include <optional>
namespace llvm {
class DebuginfodFetcher : public object::BuildIDFetcher {
public:
DebuginfodFetcher(std::vector<std::string> DebugFileDirectories)
: BuildIDFetcher(std::move(DebugFileDirectories)) {}
virtual ~DebuginfodFetcher() = default;
/// Fetches the given Build ID using debuginfod and returns a local path to
/// the resulting file.
std::optional<std::string> fetch(object::BuildIDRef BuildID) const override;
};
} // namespace llvm
#endif // LLVM_DEBUGINFOD_DIFETCHER_H
PK hwFZdO��� � Object/RelocationResolver.hnu �[��� //===- RelocVisitor.h - Visitor for object file relocations -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides a wrapper around all the different types of relocations
// in different file formats, such that a client can handle them in a unified
// manner by only implementing a minimal number of functions.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_RELOCATIONRESOLVER_H
#define LLVM_OBJECT_RELOCATIONRESOLVER_H
#include <cstdint>
#include <utility>
namespace llvm {
namespace object {
class ObjectFile;
class RelocationRef;
using SupportsRelocation = bool (*)(uint64_t);
using RelocationResolver = uint64_t (*)(uint64_t Type, uint64_t Offset,
uint64_t S, uint64_t LocData,
int64_t Addend);
std::pair<SupportsRelocation, RelocationResolver>
getRelocationResolver(const ObjectFile &Obj);
uint64_t resolveRelocation(RelocationResolver Resolver, const RelocationRef &R,
uint64_t S, uint64_t LocData);
} // end namespace object
} // end namespace llvm
#endif // LLVM_OBJECT_RELOCATIONRESOLVER_H
PK hwFZ�_F(�9 �9 Object/StackMapParser.hnu �[��� //===- StackMapParser.h - StackMap Parsing Support --------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_STACKMAPPARSER_H
#define LLVM_OBJECT_STACKMAPPARSER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/Object/ELF.h"
#include "llvm/Support/Endian.h"
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <vector>
namespace llvm {
/// A parser for the latest stackmap format. At the moment, latest=V3.
template <support::endianness Endianness>
class StackMapParser {
public:
template <typename AccessorT>
class AccessorIterator {
public:
AccessorIterator(AccessorT A) : A(A) {}
AccessorIterator& operator++() { A = A.next(); return *this; }
AccessorIterator operator++(int) {
auto tmp = *this;
++*this;
return tmp;
}
bool operator==(const AccessorIterator &Other) const {
return A.P == Other.A.P;
}
bool operator!=(const AccessorIterator &Other) const {
return !(*this == Other);
}
AccessorT& operator*() { return A; }
AccessorT* operator->() { return &A; }
private:
AccessorT A;
};
/// Accessor for function records.
class FunctionAccessor {
friend class StackMapParser;
public:
/// Get the function address.
uint64_t getFunctionAddress() const {
return read<uint64_t>(P);
}
/// Get the function's stack size.
uint64_t getStackSize() const {
return read<uint64_t>(P + sizeof(uint64_t));
}
/// Get the number of callsite records.
uint64_t getRecordCount() const {
return read<uint64_t>(P + (2 * sizeof(uint64_t)));
}
private:
FunctionAccessor(const uint8_t *P) : P(P) {}
const static int FunctionAccessorSize = 3 * sizeof(uint64_t);
FunctionAccessor next() const {
return FunctionAccessor(P + FunctionAccessorSize);
}
const uint8_t *P;
};
/// Accessor for constants.
class ConstantAccessor {
friend class StackMapParser;
public:
/// Return the value of this constant.
uint64_t getValue() const { return read<uint64_t>(P); }
private:
ConstantAccessor(const uint8_t *P) : P(P) {}
const static int ConstantAccessorSize = sizeof(uint64_t);
ConstantAccessor next() const {
return ConstantAccessor(P + ConstantAccessorSize);
}
const uint8_t *P;
};
enum class LocationKind : uint8_t {
Register = 1, Direct = 2, Indirect = 3, Constant = 4, ConstantIndex = 5
};
/// Accessor for location records.
class LocationAccessor {
friend class StackMapParser;
friend class RecordAccessor;
public:
/// Get the Kind for this location.
LocationKind getKind() const {
return LocationKind(P[KindOffset]);
}
/// Get the Size for this location.
unsigned getSizeInBytes() const {
return read<uint16_t>(P + SizeOffset);
}
/// Get the Dwarf register number for this location.
uint16_t getDwarfRegNum() const {
return read<uint16_t>(P + DwarfRegNumOffset);
}
/// Get the small-constant for this location. (Kind must be Constant).
uint32_t getSmallConstant() const {
assert(getKind() == LocationKind::Constant && "Not a small constant.");
return read<uint32_t>(P + SmallConstantOffset);
}
/// Get the constant-index for this location. (Kind must be ConstantIndex).
uint32_t getConstantIndex() const {
assert(getKind() == LocationKind::ConstantIndex &&
"Not a constant-index.");
return read<uint32_t>(P + SmallConstantOffset);
}
/// Get the offset for this location. (Kind must be Direct or Indirect).
int32_t getOffset() const {
assert((getKind() == LocationKind::Direct ||
getKind() == LocationKind::Indirect) &&
"Not direct or indirect.");
return read<int32_t>(P + SmallConstantOffset);
}
private:
LocationAccessor(const uint8_t *P) : P(P) {}
LocationAccessor next() const {
return LocationAccessor(P + LocationAccessorSize);
}
static const int KindOffset = 0;
static const int SizeOffset = KindOffset + sizeof(uint16_t);
static const int DwarfRegNumOffset = SizeOffset + sizeof(uint16_t);
static const int SmallConstantOffset = DwarfRegNumOffset + sizeof(uint32_t);
static const int LocationAccessorSize = sizeof(uint64_t) + sizeof(uint32_t);
const uint8_t *P;
};
/// Accessor for stackmap live-out fields.
class LiveOutAccessor {
friend class StackMapParser;
friend class RecordAccessor;
public:
/// Get the Dwarf register number for this live-out.
uint16_t getDwarfRegNum() const {
return read<uint16_t>(P + DwarfRegNumOffset);
}
/// Get the size in bytes of live [sub]register.
unsigned getSizeInBytes() const {
return read<uint8_t>(P + SizeOffset);
}
private:
LiveOutAccessor(const uint8_t *P) : P(P) {}
LiveOutAccessor next() const {
return LiveOutAccessor(P + LiveOutAccessorSize);
}
static const int DwarfRegNumOffset = 0;
static const int SizeOffset =
DwarfRegNumOffset + sizeof(uint16_t) + sizeof(uint8_t);
static const int LiveOutAccessorSize = sizeof(uint32_t);
const uint8_t *P;
};
/// Accessor for stackmap records.
class RecordAccessor {
friend class StackMapParser;
public:
using location_iterator = AccessorIterator<LocationAccessor>;
using liveout_iterator = AccessorIterator<LiveOutAccessor>;
/// Get the patchpoint/stackmap ID for this record.
uint64_t getID() const {
return read<uint64_t>(P + PatchpointIDOffset);
}
/// Get the instruction offset (from the start of the containing function)
/// for this record.
uint32_t getInstructionOffset() const {
return read<uint32_t>(P + InstructionOffsetOffset);
}
/// Get the number of locations contained in this record.
uint16_t getNumLocations() const {
return read<uint16_t>(P + NumLocationsOffset);
}
/// Get the location with the given index.
LocationAccessor getLocation(unsigned LocationIndex) const {
unsigned LocationOffset =
LocationListOffset + LocationIndex * LocationSize;
return LocationAccessor(P + LocationOffset);
}
/// Begin iterator for locations.
location_iterator location_begin() const {
return location_iterator(getLocation(0));
}
/// End iterator for locations.
location_iterator location_end() const {
return location_iterator(getLocation(getNumLocations()));
}
/// Iterator range for locations.
iterator_range<location_iterator> locations() const {
return make_range(location_begin(), location_end());
}
/// Get the number of liveouts contained in this record.
uint16_t getNumLiveOuts() const {
return read<uint16_t>(P + getNumLiveOutsOffset());
}
/// Get the live-out with the given index.
LiveOutAccessor getLiveOut(unsigned LiveOutIndex) const {
unsigned LiveOutOffset =
getNumLiveOutsOffset() + sizeof(uint16_t) + LiveOutIndex * LiveOutSize;
return LiveOutAccessor(P + LiveOutOffset);
}
/// Begin iterator for live-outs.
liveout_iterator liveouts_begin() const {
return liveout_iterator(getLiveOut(0));
}
/// End iterator for live-outs.
liveout_iterator liveouts_end() const {
return liveout_iterator(getLiveOut(getNumLiveOuts()));
}
/// Iterator range for live-outs.
iterator_range<liveout_iterator> liveouts() const {
return make_range(liveouts_begin(), liveouts_end());
}
private:
RecordAccessor(const uint8_t *P) : P(P) {}
unsigned getNumLiveOutsOffset() const {
unsigned LocOffset =
((LocationListOffset + LocationSize * getNumLocations()) + 7) & ~0x7;
return LocOffset + sizeof(uint16_t);
}
unsigned getSizeInBytes() const {
unsigned RecordSize =
getNumLiveOutsOffset() + sizeof(uint16_t) + getNumLiveOuts() * LiveOutSize;
return (RecordSize + 7) & ~0x7;
}
RecordAccessor next() const {
return RecordAccessor(P + getSizeInBytes());
}
static const unsigned PatchpointIDOffset = 0;
static const unsigned InstructionOffsetOffset =
PatchpointIDOffset + sizeof(uint64_t);
static const unsigned NumLocationsOffset =
InstructionOffsetOffset + sizeof(uint32_t) + sizeof(uint16_t);
static const unsigned LocationListOffset =
NumLocationsOffset + sizeof(uint16_t);
static const unsigned LocationSize = sizeof(uint64_t) + sizeof(uint32_t);
static const unsigned LiveOutSize = sizeof(uint32_t);
const uint8_t *P;
};
/// Construct a parser for a version-3 stackmap. StackMap data will be read
/// from the given array.
StackMapParser(ArrayRef<uint8_t> StackMapSection)
: StackMapSection(StackMapSection) {
ConstantsListOffset = FunctionListOffset + getNumFunctions() * FunctionSize;
assert(StackMapSection[0] == 3 &&
"StackMapParser can only parse version 3 stackmaps");
unsigned CurrentRecordOffset =
ConstantsListOffset + getNumConstants() * ConstantSize;
for (unsigned I = 0, E = getNumRecords(); I != E; ++I) {
StackMapRecordOffsets.push_back(CurrentRecordOffset);
CurrentRecordOffset +=
RecordAccessor(&StackMapSection[CurrentRecordOffset]).getSizeInBytes();
}
}
/// Validates the header of the specified stack map section.
static Error validateHeader(ArrayRef<uint8_t> StackMapSection) {
// See the comment for StackMaps::emitStackmapHeader().
if (StackMapSection.size() < 16)
return object::createError(
"the stack map section size (" + Twine(StackMapSection.size()) +
") is less than the minimum possible size of its header (16)");
unsigned Version = StackMapSection[0];
if (Version != 3)
return object::createError(
"the version (" + Twine(Version) +
") of the stack map section is unsupported, the "
"supported version is 3");
return Error::success();
}
using function_iterator = AccessorIterator<FunctionAccessor>;
using constant_iterator = AccessorIterator<ConstantAccessor>;
using record_iterator = AccessorIterator<RecordAccessor>;
/// Get the version number of this stackmap. (Always returns 3).
unsigned getVersion() const { return 3; }
/// Get the number of functions in the stack map.
uint32_t getNumFunctions() const {
return read<uint32_t>(&StackMapSection[NumFunctionsOffset]);
}
/// Get the number of large constants in the stack map.
uint32_t getNumConstants() const {
return read<uint32_t>(&StackMapSection[NumConstantsOffset]);
}
/// Get the number of stackmap records in the stackmap.
uint32_t getNumRecords() const {
return read<uint32_t>(&StackMapSection[NumRecordsOffset]);
}
/// Return an FunctionAccessor for the given function index.
FunctionAccessor getFunction(unsigned FunctionIndex) const {
return FunctionAccessor(StackMapSection.data() +
getFunctionOffset(FunctionIndex));
}
/// Begin iterator for functions.
function_iterator functions_begin() const {
return function_iterator(getFunction(0));
}
/// End iterator for functions.
function_iterator functions_end() const {
return function_iterator(
FunctionAccessor(StackMapSection.data() +
getFunctionOffset(getNumFunctions())));
}
/// Iterator range for functions.
iterator_range<function_iterator> functions() const {
return make_range(functions_begin(), functions_end());
}
/// Return the large constant at the given index.
ConstantAccessor getConstant(unsigned ConstantIndex) const {
return ConstantAccessor(StackMapSection.data() +
getConstantOffset(ConstantIndex));
}
/// Begin iterator for constants.
constant_iterator constants_begin() const {
return constant_iterator(getConstant(0));
}
/// End iterator for constants.
constant_iterator constants_end() const {
return constant_iterator(
ConstantAccessor(StackMapSection.data() +
getConstantOffset(getNumConstants())));
}
/// Iterator range for constants.
iterator_range<constant_iterator> constants() const {
return make_range(constants_begin(), constants_end());
}
/// Return a RecordAccessor for the given record index.
RecordAccessor getRecord(unsigned RecordIndex) const {
std::size_t RecordOffset = StackMapRecordOffsets[RecordIndex];
return RecordAccessor(StackMapSection.data() + RecordOffset);
}
/// Begin iterator for records.
record_iterator records_begin() const {
if (getNumRecords() == 0)
return record_iterator(RecordAccessor(nullptr));
return record_iterator(getRecord(0));
}
/// End iterator for records.
record_iterator records_end() const {
// Records need to be handled specially, since we cache the start addresses
// for them: We can't just compute the 1-past-the-end address, we have to
// look at the last record and use the 'next' method.
if (getNumRecords() == 0)
return record_iterator(RecordAccessor(nullptr));
return record_iterator(getRecord(getNumRecords() - 1).next());
}
/// Iterator range for records.
iterator_range<record_iterator> records() const {
return make_range(records_begin(), records_end());
}
private:
template <typename T>
static T read(const uint8_t *P) {
return support::endian::read<T, Endianness, 1>(P);
}
static const unsigned HeaderOffset = 0;
static const unsigned NumFunctionsOffset = HeaderOffset + sizeof(uint32_t);
static const unsigned NumConstantsOffset = NumFunctionsOffset + sizeof(uint32_t);
static const unsigned NumRecordsOffset = NumConstantsOffset + sizeof(uint32_t);
static const unsigned FunctionListOffset = NumRecordsOffset + sizeof(uint32_t);
static const unsigned FunctionSize = 3 * sizeof(uint64_t);
static const unsigned ConstantSize = sizeof(uint64_t);
std::size_t getFunctionOffset(unsigned FunctionIndex) const {
return FunctionListOffset + FunctionIndex * FunctionSize;
}
std::size_t getConstantOffset(unsigned ConstantIndex) const {
return ConstantsListOffset + ConstantIndex * ConstantSize;
}
ArrayRef<uint8_t> StackMapSection;
unsigned ConstantsListOffset;
std::vector<unsigned> StackMapRecordOffsets;
};
} // end namespace llvm
#endif // LLVM_OBJECT_STACKMAPPARSER_H
PK hwFZ��Y�� � Object/ModuleSymbolTable.hnu �[��� //===- ModuleSymbolTable.h - symbol table for in-memory IR ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This class represents a symbol table built from in-memory IR. It provides
// access to GlobalValues and should only be used if such access is required
// (e.g. in the LTO implementation).
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_MODULESYMBOLTABLE_H
#define LLVM_OBJECT_MODULESYMBOLTABLE_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/PointerUnion.h"
#include "llvm/IR/Mangler.h"
#include "llvm/Object/SymbolicFile.h"
#include "llvm/Support/Allocator.h"
#include <cstdint>
#include <string>
#include <utility>
#include <vector>
namespace llvm {
class GlobalValue;
class Module;
class ModuleSymbolTable {
public:
using AsmSymbol = std::pair<std::string, uint32_t>;
using Symbol = PointerUnion<GlobalValue *, AsmSymbol *>;
private:
Module *FirstMod = nullptr;
SpecificBumpPtrAllocator<AsmSymbol> AsmSymbols;
std::vector<Symbol> SymTab;
Mangler Mang;
public:
ArrayRef<Symbol> symbols() const { return SymTab; }
void addModule(Module *M);
void printSymbolName(raw_ostream &OS, Symbol S) const;
uint32_t getSymbolFlags(Symbol S) const;
/// Parse inline ASM and collect the symbols that are defined or referenced in
/// the current module.
///
/// For each found symbol, call \p AsmSymbol with the name of the symbol found
/// and the associated flags.
static void CollectAsmSymbols(
const Module &M,
function_ref<void(StringRef, object::BasicSymbolRef::Flags)> AsmSymbol);
/// Parse inline ASM and collect the symvers directives that are defined in
/// the current module.
///
/// For each found symbol, call \p AsmSymver with the name of the symbol and
/// its alias.
static void
CollectAsmSymvers(const Module &M,
function_ref<void(StringRef, StringRef)> AsmSymver);
};
} // end namespace llvm
#endif // LLVM_OBJECT_MODULESYMBOLTABLE_H
PK hwFZ߿��$ $ Object/Minidump.hnu �[��� //===- Minidump.h - Minidump object file implementation ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_MINIDUMP_H
#define LLVM_OBJECT_MINIDUMP_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/iterator.h"
#include "llvm/BinaryFormat/Minidump.h"
#include "llvm/Object/Binary.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace object {
/// A class providing access to the contents of a minidump file.
class MinidumpFile : public Binary {
public:
/// Construct a new MinidumpFile object from the given memory buffer. Returns
/// an error if this file cannot be identified as a minidump file, or if its
/// contents are badly corrupted (i.e. we cannot read the stream directory).
static Expected<std::unique_ptr<MinidumpFile>> create(MemoryBufferRef Source);
static bool classof(const Binary *B) { return B->isMinidump(); }
/// Returns the contents of the minidump header.
const minidump::Header &header() const { return Header; }
/// Returns the list of streams (stream directory entries) in this file.
ArrayRef<minidump::Directory> streams() const { return Streams; }
/// Returns the raw contents of the stream given by the directory entry.
ArrayRef<uint8_t> getRawStream(const minidump::Directory &Stream) const {
return getData().slice(Stream.Location.RVA, Stream.Location.DataSize);
}
/// Returns the raw contents of the stream of the given type, or std::nullopt
/// if the file does not contain a stream of this type.
std::optional<ArrayRef<uint8_t>>
getRawStream(minidump::StreamType Type) const;
/// Returns the raw contents of an object given by the LocationDescriptor. An
/// error is returned if the descriptor points outside of the minidump file.
Expected<ArrayRef<uint8_t>>
getRawData(minidump::LocationDescriptor Desc) const {
return getDataSlice(getData(), Desc.RVA, Desc.DataSize);
}
/// Returns the minidump string at the given offset. An error is returned if
/// we fail to parse the string, or the string is invalid UTF16.
Expected<std::string> getString(size_t Offset) const;
/// Returns the contents of the SystemInfo stream, cast to the appropriate
/// type. An error is returned if the file does not contain this stream, or
/// the stream is smaller than the size of the SystemInfo structure. The
/// internal consistency of the stream is not checked in any way.
Expected<const minidump::SystemInfo &> getSystemInfo() const {
return getStream<minidump::SystemInfo>(minidump::StreamType::SystemInfo);
}
/// Returns the module list embedded in the ModuleList stream. An error is
/// returned if the file does not contain this stream, or if the stream is
/// not large enough to contain the number of modules declared in the stream
/// header. The consistency of the Module entries themselves is not checked in
/// any way.
Expected<ArrayRef<minidump::Module>> getModuleList() const {
return getListStream<minidump::Module>(minidump::StreamType::ModuleList);
}
/// Returns the thread list embedded in the ThreadList stream. An error is
/// returned if the file does not contain this stream, or if the stream is
/// not large enough to contain the number of threads declared in the stream
/// header. The consistency of the Thread entries themselves is not checked in
/// any way.
Expected<ArrayRef<minidump::Thread>> getThreadList() const {
return getListStream<minidump::Thread>(minidump::StreamType::ThreadList);
}
/// Returns the contents of the Exception stream. An error is returned if the
/// file does not contain this stream, or the stream is smaller than the size
/// of the ExceptionStream structure. The internal consistency of the stream
/// is not checked in any way.
Expected<const minidump::ExceptionStream &> getExceptionStream() const {
return getStream<minidump::ExceptionStream>(
minidump::StreamType::Exception);
}
/// Returns the list of descriptors embedded in the MemoryList stream. The
/// descriptors provide the content of interesting regions of memory at the
/// time the minidump was taken. An error is returned if the file does not
/// contain this stream, or if the stream is not large enough to contain the
/// number of memory descriptors declared in the stream header. The
/// consistency of the MemoryDescriptor entries themselves is not checked in
/// any way.
Expected<ArrayRef<minidump::MemoryDescriptor>> getMemoryList() const {
return getListStream<minidump::MemoryDescriptor>(
minidump::StreamType::MemoryList);
}
class MemoryInfoIterator
: public iterator_facade_base<MemoryInfoIterator,
std::forward_iterator_tag,
minidump::MemoryInfo> {
public:
MemoryInfoIterator(ArrayRef<uint8_t> Storage, size_t Stride)
: Storage(Storage), Stride(Stride) {
assert(Storage.size() % Stride == 0);
}
bool operator==(const MemoryInfoIterator &R) const {
return Storage.size() == R.Storage.size();
}
const minidump::MemoryInfo &operator*() const {
assert(Storage.size() >= sizeof(minidump::MemoryInfo));
return *reinterpret_cast<const minidump::MemoryInfo *>(Storage.data());
}
MemoryInfoIterator &operator++() {
Storage = Storage.drop_front(Stride);
return *this;
}
private:
ArrayRef<uint8_t> Storage;
size_t Stride;
};
/// Returns the list of descriptors embedded in the MemoryInfoList stream. The
/// descriptors provide properties (e.g. permissions) of interesting regions
/// of memory at the time the minidump was taken. An error is returned if the
/// file does not contain this stream, or if the stream is not large enough to
/// contain the number of memory descriptors declared in the stream header.
/// The consistency of the MemoryInfoList entries themselves is not checked
/// in any way.
Expected<iterator_range<MemoryInfoIterator>> getMemoryInfoList() const;
private:
static Error createError(StringRef Str) {
return make_error<GenericBinaryError>(Str, object_error::parse_failed);
}
static Error createEOFError() {
return make_error<GenericBinaryError>("Unexpected EOF",
object_error::unexpected_eof);
}
/// Return a slice of the given data array, with bounds checking.
static Expected<ArrayRef<uint8_t>> getDataSlice(ArrayRef<uint8_t> Data,
size_t Offset, size_t Size);
/// Return the slice of the given data array as an array of objects of the
/// given type. The function checks that the input array is large enough to
/// contain the correct number of objects of the given type.
template <typename T>
static Expected<ArrayRef<T>> getDataSliceAs(ArrayRef<uint8_t> Data,
size_t Offset, size_t Count);
MinidumpFile(MemoryBufferRef Source, const minidump::Header &Header,
ArrayRef<minidump::Directory> Streams,
DenseMap<minidump::StreamType, std::size_t> StreamMap)
: Binary(ID_Minidump, Source), Header(Header), Streams(Streams),
StreamMap(std::move(StreamMap)) {}
ArrayRef<uint8_t> getData() const {
return arrayRefFromStringRef(Data.getBuffer());
}
/// Return the stream of the given type, cast to the appropriate type. Checks
/// that the stream is large enough to hold an object of this type.
template <typename T>
Expected<const T &> getStream(minidump::StreamType Stream) const;
/// Return the contents of a stream which contains a list of fixed-size items,
/// prefixed by the list size.
template <typename T>
Expected<ArrayRef<T>> getListStream(minidump::StreamType Stream) const;
const minidump::Header &Header;
ArrayRef<minidump::Directory> Streams;
DenseMap<minidump::StreamType, std::size_t> StreamMap;
};
template <typename T>
Expected<const T &> MinidumpFile::getStream(minidump::StreamType Type) const {
if (std::optional<ArrayRef<uint8_t>> Stream = getRawStream(Type)) {
if (Stream->size() >= sizeof(T))
return *reinterpret_cast<const T *>(Stream->data());
return createEOFError();
}
return createError("No such stream");
}
template <typename T>
Expected<ArrayRef<T>> MinidumpFile::getDataSliceAs(ArrayRef<uint8_t> Data,
size_t Offset,
size_t Count) {
// Check for overflow.
if (Count > std::numeric_limits<size_t>::max() / sizeof(T))
return createEOFError();
Expected<ArrayRef<uint8_t>> Slice =
getDataSlice(Data, Offset, sizeof(T) * Count);
if (!Slice)
return Slice.takeError();
return ArrayRef<T>(reinterpret_cast<const T *>(Slice->data()), Count);
}
} // end namespace object
} // end namespace llvm
#endif // LLVM_OBJECT_MINIDUMP_H
PK hwFZEu � Object/TapiFile.hnu �[��� //===- TapiFile.h - Text-based Dynamic Library Stub -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the TapiFile interface.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_TAPIFILE_H
#define LLVM_OBJECT_TAPIFILE_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Object/Binary.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/Object/SymbolicFile.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MemoryBufferRef.h"
#include "llvm/TextAPI/Architecture.h"
namespace llvm {
class raw_ostream;
namespace MachO {
class InterfaceFile;
}
namespace object {
class TapiFile : public SymbolicFile {
public:
TapiFile(MemoryBufferRef Source, const MachO::InterfaceFile &Interface,
MachO::Architecture Arch);
~TapiFile() override;
void moveSymbolNext(DataRefImpl &DRI) const override;
Error printSymbolName(raw_ostream &OS, DataRefImpl DRI) const override;
Expected<uint32_t> getSymbolFlags(DataRefImpl DRI) const override;
basic_symbol_iterator symbol_begin() const override;
basic_symbol_iterator symbol_end() const override;
Expected<SymbolRef::Type> getSymbolType(DataRefImpl DRI) const;
static bool classof(const Binary *v) { return v->isTapiFile(); }
bool is64Bit() const override { return MachO::is64Bit(Arch); }
private:
struct Symbol {
StringRef Prefix;
StringRef Name;
uint32_t Flags;
SymbolRef::Type Type;
constexpr Symbol(StringRef Prefix, StringRef Name, uint32_t Flags,
SymbolRef::Type Type)
: Prefix(Prefix), Name(Name), Flags(Flags), Type(Type) {}
};
std::vector<Symbol> Symbols;
MachO::Architecture Arch;
};
} // end namespace object.
} // end namespace llvm.
#endif // LLVM_OBJECT_TAPIFILE_H
PK hwFZ��,X� X� Object/ELFTypes.hnu �[��� //===- ELFTypes.h - Endian specific types for ELF ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_ELFTYPES_H
#define LLVM_OBJECT_ELFTYPES_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/Object/Error.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MathExtras.h"
#include <cassert>
#include <cstdint>
#include <cstring>
#include <type_traits>
namespace llvm {
namespace object {
using support::endianness;
template <class ELFT> struct Elf_Ehdr_Impl;
template <class ELFT> struct Elf_Shdr_Impl;
template <class ELFT> struct Elf_Sym_Impl;
template <class ELFT> struct Elf_Dyn_Impl;
template <class ELFT> struct Elf_Phdr_Impl;
template <class ELFT, bool isRela> struct Elf_Rel_Impl;
template <class ELFT> struct Elf_Verdef_Impl;
template <class ELFT> struct Elf_Verdaux_Impl;
template <class ELFT> struct Elf_Verneed_Impl;
template <class ELFT> struct Elf_Vernaux_Impl;
template <class ELFT> struct Elf_Versym_Impl;
template <class ELFT> struct Elf_Hash_Impl;
template <class ELFT> struct Elf_GnuHash_Impl;
template <class ELFT> struct Elf_Chdr_Impl;
template <class ELFT> struct Elf_Nhdr_Impl;
template <class ELFT> class Elf_Note_Impl;
template <class ELFT> class Elf_Note_Iterator_Impl;
template <class ELFT> struct Elf_CGProfile_Impl;
template <endianness E, bool Is64> struct ELFType {
private:
template <typename Ty>
using packed = support::detail::packed_endian_specific_integral<Ty, E, 1>;
public:
static const endianness TargetEndianness = E;
static const bool Is64Bits = Is64;
using uint = std::conditional_t<Is64, uint64_t, uint32_t>;
using Ehdr = Elf_Ehdr_Impl<ELFType<E, Is64>>;
using Shdr = Elf_Shdr_Impl<ELFType<E, Is64>>;
using Sym = Elf_Sym_Impl<ELFType<E, Is64>>;
using Dyn = Elf_Dyn_Impl<ELFType<E, Is64>>;
using Phdr = Elf_Phdr_Impl<ELFType<E, Is64>>;
using Rel = Elf_Rel_Impl<ELFType<E, Is64>, false>;
using Rela = Elf_Rel_Impl<ELFType<E, Is64>, true>;
using Relr = packed<uint>;
using Verdef = Elf_Verdef_Impl<ELFType<E, Is64>>;
using Verdaux = Elf_Verdaux_Impl<ELFType<E, Is64>>;
using Verneed = Elf_Verneed_Impl<ELFType<E, Is64>>;
using Vernaux = Elf_Vernaux_Impl<ELFType<E, Is64>>;
using Versym = Elf_Versym_Impl<ELFType<E, Is64>>;
using Hash = Elf_Hash_Impl<ELFType<E, Is64>>;
using GnuHash = Elf_GnuHash_Impl<ELFType<E, Is64>>;
using Chdr = Elf_Chdr_Impl<ELFType<E, Is64>>;
using Nhdr = Elf_Nhdr_Impl<ELFType<E, Is64>>;
using Note = Elf_Note_Impl<ELFType<E, Is64>>;
using NoteIterator = Elf_Note_Iterator_Impl<ELFType<E, Is64>>;
using CGProfile = Elf_CGProfile_Impl<ELFType<E, Is64>>;
using DynRange = ArrayRef<Dyn>;
using ShdrRange = ArrayRef<Shdr>;
using SymRange = ArrayRef<Sym>;
using RelRange = ArrayRef<Rel>;
using RelaRange = ArrayRef<Rela>;
using RelrRange = ArrayRef<Relr>;
using PhdrRange = ArrayRef<Phdr>;
using Half = packed<uint16_t>;
using Word = packed<uint32_t>;
using Sword = packed<int32_t>;
using Xword = packed<uint64_t>;
using Sxword = packed<int64_t>;
using Addr = packed<uint>;
using Off = packed<uint>;
};
using ELF32LE = ELFType<support::little, false>;
using ELF32BE = ELFType<support::big, false>;
using ELF64LE = ELFType<support::little, true>;
using ELF64BE = ELFType<support::big, true>;
// Use an alignment of 2 for the typedefs since that is the worst case for
// ELF files in archives.
// I really don't like doing this, but the alternative is copypasta.
#define LLVM_ELF_IMPORT_TYPES_ELFT(ELFT) \
using Elf_Addr = typename ELFT::Addr; \
using Elf_Off = typename ELFT::Off; \
using Elf_Half = typename ELFT::Half; \
using Elf_Word = typename ELFT::Word; \
using Elf_Sword = typename ELFT::Sword; \
using Elf_Xword = typename ELFT::Xword; \
using Elf_Sxword = typename ELFT::Sxword; \
using uintX_t = typename ELFT::uint; \
using Elf_Ehdr = typename ELFT::Ehdr; \
using Elf_Shdr = typename ELFT::Shdr; \
using Elf_Sym = typename ELFT::Sym; \
using Elf_Dyn = typename ELFT::Dyn; \
using Elf_Phdr = typename ELFT::Phdr; \
using Elf_Rel = typename ELFT::Rel; \
using Elf_Rela = typename ELFT::Rela; \
using Elf_Relr = typename ELFT::Relr; \
using Elf_Verdef = typename ELFT::Verdef; \
using Elf_Verdaux = typename ELFT::Verdaux; \
using Elf_Verneed = typename ELFT::Verneed; \
using Elf_Vernaux = typename ELFT::Vernaux; \
using Elf_Versym = typename ELFT::Versym; \
using Elf_Hash = typename ELFT::Hash; \
using Elf_GnuHash = typename ELFT::GnuHash; \
using Elf_Chdr = typename ELFT::Chdr; \
using Elf_Nhdr = typename ELFT::Nhdr; \
using Elf_Note = typename ELFT::Note; \
using Elf_Note_Iterator = typename ELFT::NoteIterator; \
using Elf_CGProfile = typename ELFT::CGProfile; \
using Elf_Dyn_Range = typename ELFT::DynRange; \
using Elf_Shdr_Range = typename ELFT::ShdrRange; \
using Elf_Sym_Range = typename ELFT::SymRange; \
using Elf_Rel_Range = typename ELFT::RelRange; \
using Elf_Rela_Range = typename ELFT::RelaRange; \
using Elf_Relr_Range = typename ELFT::RelrRange; \
using Elf_Phdr_Range = typename ELFT::PhdrRange;
#define LLVM_ELF_COMMA ,
#define LLVM_ELF_IMPORT_TYPES(E, W) \
LLVM_ELF_IMPORT_TYPES_ELFT(ELFType<E LLVM_ELF_COMMA W>)
// Section header.
template <class ELFT> struct Elf_Shdr_Base;
template <endianness TargetEndianness>
struct Elf_Shdr_Base<ELFType<TargetEndianness, false>> {
LLVM_ELF_IMPORT_TYPES(TargetEndianness, false)
Elf_Word sh_name; // Section name (index into string table)
Elf_Word sh_type; // Section type (SHT_*)
Elf_Word sh_flags; // Section flags (SHF_*)
Elf_Addr sh_addr; // Address where section is to be loaded
Elf_Off sh_offset; // File offset of section data, in bytes
Elf_Word sh_size; // Size of section, in bytes
Elf_Word sh_link; // Section type-specific header table index link
Elf_Word sh_info; // Section type-specific extra information
Elf_Word sh_addralign; // Section address alignment
Elf_Word sh_entsize; // Size of records contained within the section
};
template <endianness TargetEndianness>
struct Elf_Shdr_Base<ELFType<TargetEndianness, true>> {
LLVM_ELF_IMPORT_TYPES(TargetEndianness, true)
Elf_Word sh_name; // Section name (index into string table)
Elf_Word sh_type; // Section type (SHT_*)
Elf_Xword sh_flags; // Section flags (SHF_*)
Elf_Addr sh_addr; // Address where section is to be loaded
Elf_Off sh_offset; // File offset of section data, in bytes
Elf_Xword sh_size; // Size of section, in bytes
Elf_Word sh_link; // Section type-specific header table index link
Elf_Word sh_info; // Section type-specific extra information
Elf_Xword sh_addralign; // Section address alignment
Elf_Xword sh_entsize; // Size of records contained within the section
};
template <class ELFT>
struct Elf_Shdr_Impl : Elf_Shdr_Base<ELFT> {
using Elf_Shdr_Base<ELFT>::sh_entsize;
using Elf_Shdr_Base<ELFT>::sh_size;
/// Get the number of entities this section contains if it has any.
unsigned getEntityCount() const {
if (sh_entsize == 0)
return 0;
return sh_size / sh_entsize;
}
};
template <class ELFT> struct Elf_Sym_Base;
template <endianness TargetEndianness>
struct Elf_Sym_Base<ELFType<TargetEndianness, false>> {
LLVM_ELF_IMPORT_TYPES(TargetEndianness, false)
Elf_Word st_name; // Symbol name (index into string table)
Elf_Addr st_value; // Value or address associated with the symbol
Elf_Word st_size; // Size of the symbol
unsigned char st_info; // Symbol's type and binding attributes
unsigned char st_other; // Must be zero; reserved
Elf_Half st_shndx; // Which section (header table index) it's defined in
};
template <endianness TargetEndianness>
struct Elf_Sym_Base<ELFType<TargetEndianness, true>> {
LLVM_ELF_IMPORT_TYPES(TargetEndianness, true)
Elf_Word st_name; // Symbol name (index into string table)
unsigned char st_info; // Symbol's type and binding attributes
unsigned char st_other; // Must be zero; reserved
Elf_Half st_shndx; // Which section (header table index) it's defined in
Elf_Addr st_value; // Value or address associated with the symbol
Elf_Xword st_size; // Size of the symbol
};
template <class ELFT>
struct Elf_Sym_Impl : Elf_Sym_Base<ELFT> {
using Elf_Sym_Base<ELFT>::st_info;
using Elf_Sym_Base<ELFT>::st_shndx;
using Elf_Sym_Base<ELFT>::st_other;
using Elf_Sym_Base<ELFT>::st_value;
// These accessors and mutators correspond to the ELF32_ST_BIND,
// ELF32_ST_TYPE, and ELF32_ST_INFO macros defined in the ELF specification:
unsigned char getBinding() const { return st_info >> 4; }
unsigned char getType() const { return st_info & 0x0f; }
uint64_t getValue() const { return st_value; }
void setBinding(unsigned char b) { setBindingAndType(b, getType()); }
void setType(unsigned char t) { setBindingAndType(getBinding(), t); }
void setBindingAndType(unsigned char b, unsigned char t) {
st_info = (b << 4) + (t & 0x0f);
}
/// Access to the STV_xxx flag stored in the first two bits of st_other.
/// STV_DEFAULT: 0
/// STV_INTERNAL: 1
/// STV_HIDDEN: 2
/// STV_PROTECTED: 3
unsigned char getVisibility() const { return st_other & 0x3; }
void setVisibility(unsigned char v) {
assert(v < 4 && "Invalid value for visibility");
st_other = (st_other & ~0x3) | v;
}
bool isAbsolute() const { return st_shndx == ELF::SHN_ABS; }
bool isCommon() const {
return getType() == ELF::STT_COMMON || st_shndx == ELF::SHN_COMMON;
}
bool isDefined() const { return !isUndefined(); }
bool isProcessorSpecific() const {
return st_shndx >= ELF::SHN_LOPROC && st_shndx <= ELF::SHN_HIPROC;
}
bool isOSSpecific() const {
return st_shndx >= ELF::SHN_LOOS && st_shndx <= ELF::SHN_HIOS;
}
bool isReserved() const {
// ELF::SHN_HIRESERVE is 0xffff so st_shndx <= ELF::SHN_HIRESERVE is always
// true and some compilers warn about it.
return st_shndx >= ELF::SHN_LORESERVE;
}
bool isUndefined() const { return st_shndx == ELF::SHN_UNDEF; }
bool isExternal() const {
return getBinding() != ELF::STB_LOCAL;
}
Expected<StringRef> getName(StringRef StrTab) const;
};
template <class ELFT>
Expected<StringRef> Elf_Sym_Impl<ELFT>::getName(StringRef StrTab) const {
uint32_t Offset = this->st_name;
if (Offset >= StrTab.size())
return createStringError(object_error::parse_failed,
"st_name (0x%" PRIx32
") is past the end of the string table"
" of size 0x%zx",
Offset, StrTab.size());
return StringRef(StrTab.data() + Offset);
}
/// Elf_Versym: This is the structure of entries in the SHT_GNU_versym section
/// (.gnu.version). This structure is identical for ELF32 and ELF64.
template <class ELFT>
struct Elf_Versym_Impl {
LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
Elf_Half vs_index; // Version index with flags (e.g. VERSYM_HIDDEN)
};
/// Elf_Verdef: This is the structure of entries in the SHT_GNU_verdef section
/// (.gnu.version_d). This structure is identical for ELF32 and ELF64.
template <class ELFT>
struct Elf_Verdef_Impl {
LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
Elf_Half vd_version; // Version of this structure (e.g. VER_DEF_CURRENT)
Elf_Half vd_flags; // Bitwise flags (VER_DEF_*)
Elf_Half vd_ndx; // Version index, used in .gnu.version entries
Elf_Half vd_cnt; // Number of Verdaux entries
Elf_Word vd_hash; // Hash of name
Elf_Word vd_aux; // Offset to the first Verdaux entry (in bytes)
Elf_Word vd_next; // Offset to the next Verdef entry (in bytes)
/// Get the first Verdaux entry for this Verdef.
const Elf_Verdaux *getAux() const {
return reinterpret_cast<const Elf_Verdaux *>((const char *)this + vd_aux);
}
};
/// Elf_Verdaux: This is the structure of auxiliary data in the SHT_GNU_verdef
/// section (.gnu.version_d). This structure is identical for ELF32 and ELF64.
template <class ELFT>
struct Elf_Verdaux_Impl {
LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
Elf_Word vda_name; // Version name (offset in string table)
Elf_Word vda_next; // Offset to next Verdaux entry (in bytes)
};
/// Elf_Verneed: This is the structure of entries in the SHT_GNU_verneed
/// section (.gnu.version_r). This structure is identical for ELF32 and ELF64.
template <class ELFT>
struct Elf_Verneed_Impl {
LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
Elf_Half vn_version; // Version of this structure (e.g. VER_NEED_CURRENT)
Elf_Half vn_cnt; // Number of associated Vernaux entries
Elf_Word vn_file; // Library name (string table offset)
Elf_Word vn_aux; // Offset to first Vernaux entry (in bytes)
Elf_Word vn_next; // Offset to next Verneed entry (in bytes)
};
/// Elf_Vernaux: This is the structure of auxiliary data in SHT_GNU_verneed
/// section (.gnu.version_r). This structure is identical for ELF32 and ELF64.
template <class ELFT>
struct Elf_Vernaux_Impl {
LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
Elf_Word vna_hash; // Hash of dependency name
Elf_Half vna_flags; // Bitwise Flags (VER_FLAG_*)
Elf_Half vna_other; // Version index, used in .gnu.version entries
Elf_Word vna_name; // Dependency name
Elf_Word vna_next; // Offset to next Vernaux entry (in bytes)
};
/// Elf_Dyn_Base: This structure matches the form of entries in the dynamic
/// table section (.dynamic) look like.
template <class ELFT> struct Elf_Dyn_Base;
template <endianness TargetEndianness>
struct Elf_Dyn_Base<ELFType<TargetEndianness, false>> {
LLVM_ELF_IMPORT_TYPES(TargetEndianness, false)
Elf_Sword d_tag;
union {
Elf_Word d_val;
Elf_Addr d_ptr;
} d_un;
};
template <endianness TargetEndianness>
struct Elf_Dyn_Base<ELFType<TargetEndianness, true>> {
LLVM_ELF_IMPORT_TYPES(TargetEndianness, true)
Elf_Sxword d_tag;
union {
Elf_Xword d_val;
Elf_Addr d_ptr;
} d_un;
};
/// Elf_Dyn_Impl: This inherits from Elf_Dyn_Base, adding getters.
template <class ELFT>
struct Elf_Dyn_Impl : Elf_Dyn_Base<ELFT> {
using Elf_Dyn_Base<ELFT>::d_tag;
using Elf_Dyn_Base<ELFT>::d_un;
using intX_t = std::conditional_t<ELFT::Is64Bits, int64_t, int32_t>;
using uintX_t = std::conditional_t<ELFT::Is64Bits, uint64_t, uint32_t>;
intX_t getTag() const { return d_tag; }
uintX_t getVal() const { return d_un.d_val; }
uintX_t getPtr() const { return d_un.d_ptr; }
};
template <endianness TargetEndianness>
struct Elf_Rel_Impl<ELFType<TargetEndianness, false>, false> {
LLVM_ELF_IMPORT_TYPES(TargetEndianness, false)
static const bool IsRela = false;
Elf_Addr r_offset; // Location (file byte offset, or program virtual addr)
Elf_Word r_info; // Symbol table index and type of relocation to apply
uint32_t getRInfo(bool isMips64EL) const {
assert(!isMips64EL);
return r_info;
}
void setRInfo(uint32_t R, bool IsMips64EL) {
assert(!IsMips64EL);
r_info = R;
}
// These accessors and mutators correspond to the ELF32_R_SYM, ELF32_R_TYPE,
// and ELF32_R_INFO macros defined in the ELF specification:
uint32_t getSymbol(bool isMips64EL) const {
return this->getRInfo(isMips64EL) >> 8;
}
unsigned char getType(bool isMips64EL) const {
return (unsigned char)(this->getRInfo(isMips64EL) & 0x0ff);
}
void setSymbol(uint32_t s, bool IsMips64EL) {
setSymbolAndType(s, getType(IsMips64EL), IsMips64EL);
}
void setType(unsigned char t, bool IsMips64EL) {
setSymbolAndType(getSymbol(IsMips64EL), t, IsMips64EL);
}
void setSymbolAndType(uint32_t s, unsigned char t, bool IsMips64EL) {
this->setRInfo((s << 8) + t, IsMips64EL);
}
};
template <endianness TargetEndianness>
struct Elf_Rel_Impl<ELFType<TargetEndianness, false>, true>
: public Elf_Rel_Impl<ELFType<TargetEndianness, false>, false> {
LLVM_ELF_IMPORT_TYPES(TargetEndianness, false)
static const bool IsRela = true;
Elf_Sword r_addend; // Compute value for relocatable field by adding this
};
template <endianness TargetEndianness>
struct Elf_Rel_Impl<ELFType<TargetEndianness, true>, false> {
LLVM_ELF_IMPORT_TYPES(TargetEndianness, true)
static const bool IsRela = false;
Elf_Addr r_offset; // Location (file byte offset, or program virtual addr)
Elf_Xword r_info; // Symbol table index and type of relocation to apply
uint64_t getRInfo(bool isMips64EL) const {
uint64_t t = r_info;
if (!isMips64EL)
return t;
// Mips64 little endian has a "special" encoding of r_info. Instead of one
// 64 bit little endian number, it is a little endian 32 bit number followed
// by a 32 bit big endian number.
return (t << 32) | ((t >> 8) & 0xff000000) | ((t >> 24) & 0x00ff0000) |
((t >> 40) & 0x0000ff00) | ((t >> 56) & 0x000000ff);
}
void setRInfo(uint64_t R, bool IsMips64EL) {
if (IsMips64EL)
r_info = (R >> 32) | ((R & 0xff000000) << 8) | ((R & 0x00ff0000) << 24) |
((R & 0x0000ff00) << 40) | ((R & 0x000000ff) << 56);
else
r_info = R;
}
// These accessors and mutators correspond to the ELF64_R_SYM, ELF64_R_TYPE,
// and ELF64_R_INFO macros defined in the ELF specification:
uint32_t getSymbol(bool isMips64EL) const {
return (uint32_t)(this->getRInfo(isMips64EL) >> 32);
}
uint32_t getType(bool isMips64EL) const {
return (uint32_t)(this->getRInfo(isMips64EL) & 0xffffffffL);
}
void setSymbol(uint32_t s, bool IsMips64EL) {
setSymbolAndType(s, getType(IsMips64EL), IsMips64EL);
}
void setType(uint32_t t, bool IsMips64EL) {
setSymbolAndType(getSymbol(IsMips64EL), t, IsMips64EL);
}
void setSymbolAndType(uint32_t s, uint32_t t, bool IsMips64EL) {
this->setRInfo(((uint64_t)s << 32) + (t & 0xffffffffL), IsMips64EL);
}
};
template <endianness TargetEndianness>
struct Elf_Rel_Impl<ELFType<TargetEndianness, true>, true>
: public Elf_Rel_Impl<ELFType<TargetEndianness, true>, false> {
LLVM_ELF_IMPORT_TYPES(TargetEndianness, true)
static const bool IsRela = true;
Elf_Sxword r_addend; // Compute value for relocatable field by adding this.
};
template <class ELFT>
struct Elf_Ehdr_Impl {
LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
unsigned char e_ident[ELF::EI_NIDENT]; // ELF Identification bytes
Elf_Half e_type; // Type of file (see ET_*)
Elf_Half e_machine; // Required architecture for this file (see EM_*)
Elf_Word e_version; // Must be equal to 1
Elf_Addr e_entry; // Address to jump to in order to start program
Elf_Off e_phoff; // Program header table's file offset, in bytes
Elf_Off e_shoff; // Section header table's file offset, in bytes
Elf_Word e_flags; // Processor-specific flags
Elf_Half e_ehsize; // Size of ELF header, in bytes
Elf_Half e_phentsize; // Size of an entry in the program header table
Elf_Half e_phnum; // Number of entries in the program header table
Elf_Half e_shentsize; // Size of an entry in the section header table
Elf_Half e_shnum; // Number of entries in the section header table
Elf_Half e_shstrndx; // Section header table index of section name
// string table
bool checkMagic() const {
return (memcmp(e_ident, ELF::ElfMagic, strlen(ELF::ElfMagic))) == 0;
}
unsigned char getFileClass() const { return e_ident[ELF::EI_CLASS]; }
unsigned char getDataEncoding() const { return e_ident[ELF::EI_DATA]; }
};
template <endianness TargetEndianness>
struct Elf_Phdr_Impl<ELFType<TargetEndianness, false>> {
LLVM_ELF_IMPORT_TYPES(TargetEndianness, false)
Elf_Word p_type; // Type of segment
Elf_Off p_offset; // FileOffset where segment is located, in bytes
Elf_Addr p_vaddr; // Virtual Address of beginning of segment
Elf_Addr p_paddr; // Physical address of beginning of segment (OS-specific)
Elf_Word p_filesz; // Num. of bytes in file image of segment (may be zero)
Elf_Word p_memsz; // Num. of bytes in mem image of segment (may be zero)
Elf_Word p_flags; // Segment flags
Elf_Word p_align; // Segment alignment constraint
};
template <endianness TargetEndianness>
struct Elf_Phdr_Impl<ELFType<TargetEndianness, true>> {
LLVM_ELF_IMPORT_TYPES(TargetEndianness, true)
Elf_Word p_type; // Type of segment
Elf_Word p_flags; // Segment flags
Elf_Off p_offset; // FileOffset where segment is located, in bytes
Elf_Addr p_vaddr; // Virtual Address of beginning of segment
Elf_Addr p_paddr; // Physical address of beginning of segment (OS-specific)
Elf_Xword p_filesz; // Num. of bytes in file image of segment (may be zero)
Elf_Xword p_memsz; // Num. of bytes in mem image of segment (may be zero)
Elf_Xword p_align; // Segment alignment constraint
};
// ELFT needed for endianness.
template <class ELFT>
struct Elf_Hash_Impl {
LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
Elf_Word nbucket;
Elf_Word nchain;
ArrayRef<Elf_Word> buckets() const {
return ArrayRef<Elf_Word>(&nbucket + 2, &nbucket + 2 + nbucket);
}
ArrayRef<Elf_Word> chains() const {
return ArrayRef<Elf_Word>(&nbucket + 2 + nbucket,
&nbucket + 2 + nbucket + nchain);
}
};
// .gnu.hash section
template <class ELFT>
struct Elf_GnuHash_Impl {
LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
Elf_Word nbuckets;
Elf_Word symndx;
Elf_Word maskwords;
Elf_Word shift2;
ArrayRef<Elf_Off> filter() const {
return ArrayRef<Elf_Off>(reinterpret_cast<const Elf_Off *>(&shift2 + 1),
maskwords);
}
ArrayRef<Elf_Word> buckets() const {
return ArrayRef<Elf_Word>(
reinterpret_cast<const Elf_Word *>(filter().end()), nbuckets);
}
ArrayRef<Elf_Word> values(unsigned DynamicSymCount) const {
assert(DynamicSymCount >= symndx);
return ArrayRef<Elf_Word>(buckets().end(), DynamicSymCount - symndx);
}
};
// Compressed section headers.
// http://www.sco.com/developers/gabi/latest/ch4.sheader.html#compression_header
template <endianness TargetEndianness>
struct Elf_Chdr_Impl<ELFType<TargetEndianness, false>> {
LLVM_ELF_IMPORT_TYPES(TargetEndianness, false)
Elf_Word ch_type;
Elf_Word ch_size;
Elf_Word ch_addralign;
};
template <endianness TargetEndianness>
struct Elf_Chdr_Impl<ELFType<TargetEndianness, true>> {
LLVM_ELF_IMPORT_TYPES(TargetEndianness, true)
Elf_Word ch_type;
Elf_Word ch_reserved;
Elf_Xword ch_size;
Elf_Xword ch_addralign;
};
/// Note header
template <class ELFT>
struct Elf_Nhdr_Impl {
LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
Elf_Word n_namesz;
Elf_Word n_descsz;
Elf_Word n_type;
/// Get the size of the note, including name, descriptor, and padding. Both
/// the start and the end of the descriptor are aligned by the section
/// alignment. In practice many 64-bit systems deviate from the generic ABI by
/// using sh_addralign=4.
size_t getSize(size_t Align) const {
return alignToPowerOf2(sizeof(*this) + n_namesz, Align) +
alignToPowerOf2(n_descsz, Align);
}
};
/// An ELF note.
///
/// Wraps a note header, providing methods for accessing the name and
/// descriptor safely.
template <class ELFT>
class Elf_Note_Impl {
LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
const Elf_Nhdr_Impl<ELFT> &Nhdr;
template <class NoteIteratorELFT> friend class Elf_Note_Iterator_Impl;
public:
Elf_Note_Impl(const Elf_Nhdr_Impl<ELFT> &Nhdr) : Nhdr(Nhdr) {}
/// Get the note's name, excluding the terminating null byte.
StringRef getName() const {
if (!Nhdr.n_namesz)
return StringRef();
return StringRef(reinterpret_cast<const char *>(&Nhdr) + sizeof(Nhdr),
Nhdr.n_namesz - 1);
}
/// Get the note's descriptor.
ArrayRef<uint8_t> getDesc(size_t Align) const {
if (!Nhdr.n_descsz)
return ArrayRef<uint8_t>();
return ArrayRef<uint8_t>(
reinterpret_cast<const uint8_t *>(&Nhdr) +
alignToPowerOf2(sizeof(Nhdr) + Nhdr.n_namesz, Align),
Nhdr.n_descsz);
}
/// Get the note's descriptor as StringRef
StringRef getDescAsStringRef(size_t Align) const {
ArrayRef<uint8_t> Desc = getDesc(Align);
return StringRef(reinterpret_cast<const char *>(Desc.data()), Desc.size());
}
/// Get the note's type.
Elf_Word getType() const { return Nhdr.n_type; }
};
template <class ELFT> class Elf_Note_Iterator_Impl {
public:
using iterator_category = std::forward_iterator_tag;
using value_type = Elf_Note_Impl<ELFT>;
using difference_type = std::ptrdiff_t;
using pointer = value_type *;
using reference = value_type &;
private:
// Nhdr being a nullptr marks the end of iteration.
const Elf_Nhdr_Impl<ELFT> *Nhdr = nullptr;
size_t RemainingSize = 0u;
size_t Align = 0;
Error *Err = nullptr;
template <class ELFFileELFT> friend class ELFFile;
// Stop iteration and indicate an overflow.
void stopWithOverflowError() {
Nhdr = nullptr;
*Err = make_error<StringError>("ELF note overflows container",
object_error::parse_failed);
}
// Advance Nhdr by NoteSize bytes, starting from NhdrPos.
//
// Assumes NoteSize <= RemainingSize. Ensures Nhdr->getSize() <= RemainingSize
// upon returning. Handles stopping iteration when reaching the end of the
// container, either cleanly or with an overflow error.
void advanceNhdr(const uint8_t *NhdrPos, size_t NoteSize) {
RemainingSize -= NoteSize;
if (RemainingSize == 0u) {
// Ensure that if the iterator walks to the end, the error is checked
// afterwards.
*Err = Error::success();
Nhdr = nullptr;
} else if (sizeof(*Nhdr) > RemainingSize)
stopWithOverflowError();
else {
Nhdr = reinterpret_cast<const Elf_Nhdr_Impl<ELFT> *>(NhdrPos + NoteSize);
if (Nhdr->getSize(Align) > RemainingSize)
stopWithOverflowError();
else
*Err = Error::success();
}
}
Elf_Note_Iterator_Impl() = default;
explicit Elf_Note_Iterator_Impl(Error &Err) : Err(&Err) {}
Elf_Note_Iterator_Impl(const uint8_t *Start, size_t Size, size_t Align,
Error &Err)
: RemainingSize(Size), Align(Align), Err(&Err) {
consumeError(std::move(Err));
assert(Start && "ELF note iterator starting at NULL");
advanceNhdr(Start, 0u);
}
public:
Elf_Note_Iterator_Impl &operator++() {
assert(Nhdr && "incremented ELF note end iterator");
const uint8_t *NhdrPos = reinterpret_cast<const uint8_t *>(Nhdr);
size_t NoteSize = Nhdr->getSize(Align);
advanceNhdr(NhdrPos, NoteSize);
return *this;
}
bool operator==(Elf_Note_Iterator_Impl Other) const {
if (!Nhdr && Other.Err)
(void)(bool)(*Other.Err);
if (!Other.Nhdr && Err)
(void)(bool)(*Err);
return Nhdr == Other.Nhdr;
}
bool operator!=(Elf_Note_Iterator_Impl Other) const {
return !(*this == Other);
}
Elf_Note_Impl<ELFT> operator*() const {
assert(Nhdr && "dereferenced ELF note end iterator");
return Elf_Note_Impl<ELFT>(*Nhdr);
}
};
template <class ELFT> struct Elf_CGProfile_Impl {
LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
Elf_Xword cgp_weight;
};
// MIPS .reginfo section
template <class ELFT>
struct Elf_Mips_RegInfo;
template <support::endianness TargetEndianness>
struct Elf_Mips_RegInfo<ELFType<TargetEndianness, false>> {
LLVM_ELF_IMPORT_TYPES(TargetEndianness, false)
Elf_Word ri_gprmask; // bit-mask of used general registers
Elf_Word ri_cprmask[4]; // bit-mask of used co-processor registers
Elf_Addr ri_gp_value; // gp register value
};
template <support::endianness TargetEndianness>
struct Elf_Mips_RegInfo<ELFType<TargetEndianness, true>> {
LLVM_ELF_IMPORT_TYPES(TargetEndianness, true)
Elf_Word ri_gprmask; // bit-mask of used general registers
Elf_Word ri_pad; // unused padding field
Elf_Word ri_cprmask[4]; // bit-mask of used co-processor registers
Elf_Addr ri_gp_value; // gp register value
};
// .MIPS.options section
template <class ELFT> struct Elf_Mips_Options {
LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
uint8_t kind; // Determines interpretation of variable part of descriptor
uint8_t size; // Byte size of descriptor, including this header
Elf_Half section; // Section header index of section affected,
// or 0 for global options
Elf_Word info; // Kind-specific information
Elf_Mips_RegInfo<ELFT> &getRegInfo() {
assert(kind == ELF::ODK_REGINFO);
return *reinterpret_cast<Elf_Mips_RegInfo<ELFT> *>(
(uint8_t *)this + sizeof(Elf_Mips_Options));
}
const Elf_Mips_RegInfo<ELFT> &getRegInfo() const {
return const_cast<Elf_Mips_Options *>(this)->getRegInfo();
}
};
// .MIPS.abiflags section content
template <class ELFT> struct Elf_Mips_ABIFlags {
LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
Elf_Half version; // Version of the structure
uint8_t isa_level; // ISA level: 1-5, 32, and 64
uint8_t isa_rev; // ISA revision (0 for MIPS I - MIPS V)
uint8_t gpr_size; // General purpose registers size
uint8_t cpr1_size; // Co-processor 1 registers size
uint8_t cpr2_size; // Co-processor 2 registers size
uint8_t fp_abi; // Floating-point ABI flag
Elf_Word isa_ext; // Processor-specific extension
Elf_Word ases; // ASEs flags
Elf_Word flags1; // General flags
Elf_Word flags2; // General flags
};
// Struct representing the BBAddrMap for one function.
struct BBAddrMap {
uint64_t Addr; // Function address
// Struct representing the BBAddrMap information for one basic block.
struct BBEntry {
struct Metadata {
bool HasReturn : 1; // If this block ends with a return (or tail
// call).
bool HasTailCall : 1; // If this block ends with a tail call.
bool IsEHPad : 1; // If this is an exception handling block.
bool CanFallThrough : 1; // If this block can fall through to its next.
bool HasIndirectBranch : 1; // If this block ends with an indirect branch
// (branch via a register).
bool operator==(const Metadata &Other) const {
return HasReturn == Other.HasReturn &&
HasTailCall == Other.HasTailCall && IsEHPad == Other.IsEHPad &&
CanFallThrough == Other.CanFallThrough &&
HasIndirectBranch == Other.HasIndirectBranch;
}
// Encodes this struct as a uint32_t value.
uint32_t encode() const {
return static_cast<uint32_t>(HasReturn) |
(static_cast<uint32_t>(HasTailCall) << 1) |
(static_cast<uint32_t>(IsEHPad) << 2) |
(static_cast<uint32_t>(CanFallThrough) << 3) |
(static_cast<uint32_t>(HasIndirectBranch) << 4);
}
// Decodes and returns a Metadata struct from a uint32_t value.
static Expected<Metadata> decode(uint32_t V) {
Metadata MD{/*HasReturn=*/static_cast<bool>(V & 1),
/*HasTailCall=*/static_cast<bool>(V & (1 << 1)),
/*IsEHPad=*/static_cast<bool>(V & (1 << 2)),
/*CanFallThrough=*/static_cast<bool>(V & (1 << 3)),
/*HasIndirectBranch=*/static_cast<bool>(V & (1 << 4))};
if (MD.encode() != V)
return createStringError(
std::error_code(), "invalid encoding for BBEntry::Metadata: 0x%x",
V);
return MD;
}
};
uint32_t ID; // Unique ID of this basic block.
uint32_t Offset; // Offset of basic block relative to function start.
uint32_t Size; // Size of the basic block.
Metadata MD; // Metdata for this basic block.
BBEntry(uint32_t ID, uint32_t Offset, uint32_t Size, Metadata MD)
: ID(ID), Offset(Offset), Size(Size), MD(MD){};
bool operator==(const BBEntry &Other) const {
return ID == Other.ID && Offset == Other.Offset && Size == Other.Size &&
MD == Other.MD;
}
bool hasReturn() const { return MD.HasReturn; }
bool hasTailCall() const { return MD.HasTailCall; }
bool isEHPad() const { return MD.IsEHPad; }
bool canFallThrough() const { return MD.CanFallThrough; }
};
std::vector<BBEntry> BBEntries; // Basic block entries for this function.
// Equality operator for unit testing.
bool operator==(const BBAddrMap &Other) const {
return Addr == Other.Addr && std::equal(BBEntries.begin(), BBEntries.end(),
Other.BBEntries.begin());
}
};
} // end namespace object.
} // end namespace llvm.
#endif // LLVM_OBJECT_ELFTYPES_H
PK hwFZVlJ,3 3 Object/Archive.hnu �[��� //===- Archive.h - ar archive file format -----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the ar archive file format class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_ARCHIVE_H
#define LLVM_OBJECT_ARCHIVE_H
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/fallible_iterator.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/Object/Binary.h"
#include "llvm/Support/Chrono.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/FileSystem.h"
#include "llvm/Support/MemoryBuffer.h"
#include <cassert>
#include <cstdint>
#include <memory>
#include <string>
#include <vector>
namespace llvm {
namespace object {
const char ArchiveMagic[] = "!<arch>\n";
const char ThinArchiveMagic[] = "!<thin>\n";
const char BigArchiveMagic[] = "<bigaf>\n";
class Archive;
class AbstractArchiveMemberHeader {
protected:
AbstractArchiveMemberHeader(const Archive *Parent) : Parent(Parent){};
public:
friend class Archive;
virtual std::unique_ptr<AbstractArchiveMemberHeader> clone() const = 0;
virtual ~AbstractArchiveMemberHeader() = default;
/// Get the name without looking up long names.
virtual Expected<StringRef> getRawName() const = 0;
virtual StringRef getRawAccessMode() const = 0;
virtual StringRef getRawLastModified() const = 0;
virtual StringRef getRawUID() const = 0;
virtual StringRef getRawGID() const = 0;
/// Get the name looking up long names.
virtual Expected<StringRef> getName(uint64_t Size) const = 0;
virtual Expected<uint64_t> getSize() const = 0;
virtual uint64_t getOffset() const = 0;
/// Get next file member location.
virtual Expected<const char *> getNextChildLoc() const = 0;
virtual Expected<bool> isThin() const = 0;
Expected<sys::fs::perms> getAccessMode() const;
Expected<sys::TimePoint<std::chrono::seconds>> getLastModified() const;
Expected<unsigned> getUID() const;
Expected<unsigned> getGID() const;
/// Returns the size in bytes of the format-defined member header of the
/// concrete archive type.
virtual uint64_t getSizeOf() const = 0;
const Archive *Parent;
};
template <typename T>
class CommonArchiveMemberHeader : public AbstractArchiveMemberHeader {
public:
CommonArchiveMemberHeader(const Archive *Parent, const T *RawHeaderPtr)
: AbstractArchiveMemberHeader(Parent), ArMemHdr(RawHeaderPtr){};
StringRef getRawAccessMode() const override;
StringRef getRawLastModified() const override;
StringRef getRawUID() const override;
StringRef getRawGID() const override;
uint64_t getOffset() const override;
uint64_t getSizeOf() const override { return sizeof(T); }
T const *ArMemHdr;
};
struct UnixArMemHdrType {
char Name[16];
char LastModified[12];
char UID[6];
char GID[6];
char AccessMode[8];
char Size[10]; ///< Size of data, not including header or padding.
char Terminator[2];
};
class ArchiveMemberHeader : public CommonArchiveMemberHeader<UnixArMemHdrType> {
public:
ArchiveMemberHeader(const Archive *Parent, const char *RawHeaderPtr,
uint64_t Size, Error *Err);
std::unique_ptr<AbstractArchiveMemberHeader> clone() const override {
return std::make_unique<ArchiveMemberHeader>(*this);
}
Expected<StringRef> getRawName() const override;
Expected<StringRef> getName(uint64_t Size) const override;
Expected<uint64_t> getSize() const override;
Expected<const char *> getNextChildLoc() const override;
Expected<bool> isThin() const override;
};
// File Member Header
struct BigArMemHdrType {
char Size[20]; // File member size in decimal
char NextOffset[20]; // Next member offset in decimal
char PrevOffset[20]; // Previous member offset in decimal
char LastModified[12];
char UID[12];
char GID[12];
char AccessMode[12];
char NameLen[4]; // File member name length in decimal
union {
char Name[2]; // Start of member name
char Terminator[2];
};
};
// Define file member header of AIX big archive.
class BigArchiveMemberHeader
: public CommonArchiveMemberHeader<BigArMemHdrType> {
public:
BigArchiveMemberHeader(Archive const *Parent, const char *RawHeaderPtr,
uint64_t Size, Error *Err);
std::unique_ptr<AbstractArchiveMemberHeader> clone() const override {
return std::make_unique<BigArchiveMemberHeader>(*this);
}
Expected<StringRef> getRawName() const override;
Expected<uint64_t> getRawNameSize() const;
Expected<StringRef> getName(uint64_t Size) const override;
Expected<uint64_t> getSize() const override;
Expected<const char *> getNextChildLoc() const override;
Expected<uint64_t> getNextOffset() const;
Expected<bool> isThin() const override { return false; }
};
class Archive : public Binary {
virtual void anchor();
public:
class Child {
friend Archive;
friend AbstractArchiveMemberHeader;
const Archive *Parent;
std::unique_ptr<AbstractArchiveMemberHeader> Header;
/// Includes header but not padding byte.
StringRef Data;
/// Offset from Data to the start of the file.
uint16_t StartOfFile;
Expected<bool> isThinMember() const;
public:
Child(const Archive *Parent, const char *Start, Error *Err);
Child(const Archive *Parent, StringRef Data, uint16_t StartOfFile);
Child(const Child &C)
: Parent(C.Parent), Data(C.Data), StartOfFile(C.StartOfFile) {
if (C.Header)
Header = C.Header->clone();
}
Child(Child &&C) {
Parent = std::move(C.Parent);
Header = std::move(C.Header);
Data = C.Data;
StartOfFile = C.StartOfFile;
}
Child &operator=(Child &&C) noexcept {
if (&C == this)
return *this;
Parent = std::move(C.Parent);
Header = std::move(C.Header);
Data = C.Data;
StartOfFile = C.StartOfFile;
return *this;
}
Child &operator=(const Child &C) {
if (&C == this)
return *this;
Parent = C.Parent;
if (C.Header)
Header = C.Header->clone();
Data = C.Data;
StartOfFile = C.StartOfFile;
return *this;
}
bool operator==(const Child &other) const {
assert(!Parent || !other.Parent || Parent == other.Parent);
return Data.begin() == other.Data.begin();
}
const Archive *getParent() const { return Parent; }
Expected<Child> getNext() const;
Expected<StringRef> getName() const;
Expected<std::string> getFullName() const;
Expected<StringRef> getRawName() const { return Header->getRawName(); }
Expected<sys::TimePoint<std::chrono::seconds>> getLastModified() const {
return Header->getLastModified();
}
StringRef getRawLastModified() const {
return Header->getRawLastModified();
}
Expected<unsigned> getUID() const { return Header->getUID(); }
Expected<unsigned> getGID() const { return Header->getGID(); }
Expected<sys::fs::perms> getAccessMode() const {
return Header->getAccessMode();
}
/// \return the size of the archive member without the header or padding.
Expected<uint64_t> getSize() const;
/// \return the size in the archive header for this member.
Expected<uint64_t> getRawSize() const;
Expected<StringRef> getBuffer() const;
uint64_t getChildOffset() const;
uint64_t getDataOffset() const { return getChildOffset() + StartOfFile; }
Expected<MemoryBufferRef> getMemoryBufferRef() const;
Expected<std::unique_ptr<Binary>>
getAsBinary(LLVMContext *Context = nullptr) const;
};
class ChildFallibleIterator {
Child C;
public:
ChildFallibleIterator() : C(Child(nullptr, nullptr, nullptr)) {}
ChildFallibleIterator(const Child &C) : C(C) {}
const Child *operator->() const { return &C; }
const Child &operator*() const { return C; }
bool operator==(const ChildFallibleIterator &other) const {
// Ignore errors here: If an error occurred during increment then getNext
// will have been set to child_end(), and the following comparison should
// do the right thing.
return C == other.C;
}
bool operator!=(const ChildFallibleIterator &other) const {
return !(*this == other);
}
Error inc() {
auto NextChild = C.getNext();
if (!NextChild)
return NextChild.takeError();
C = std::move(*NextChild);
return Error::success();
}
};
using child_iterator = fallible_iterator<ChildFallibleIterator>;
class Symbol {
const Archive *Parent;
uint32_t SymbolIndex;
uint32_t StringIndex; // Extra index to the string.
public:
Symbol(const Archive *p, uint32_t symi, uint32_t stri)
: Parent(p), SymbolIndex(symi), StringIndex(stri) {}
bool operator==(const Symbol &other) const {
return (Parent == other.Parent) && (SymbolIndex == other.SymbolIndex);
}
StringRef getName() const;
Expected<Child> getMember() const;
Symbol getNext() const;
bool isECSymbol() const;
};
class symbol_iterator {
Symbol symbol;
public:
symbol_iterator(const Symbol &s) : symbol(s) {}
const Symbol *operator->() const { return &symbol; }
const Symbol &operator*() const { return symbol; }
bool operator==(const symbol_iterator &other) const {
return symbol == other.symbol;
}
bool operator!=(const symbol_iterator &other) const {
return !(*this == other);
}
symbol_iterator &operator++() { // Preincrement
symbol = symbol.getNext();
return *this;
}
};
Archive(MemoryBufferRef Source, Error &Err);
static Expected<std::unique_ptr<Archive>> create(MemoryBufferRef Source);
/// Size field is 10 decimal digits long
static const uint64_t MaxMemberSize = 9999999999;
enum Kind { K_GNU, K_GNU64, K_BSD, K_DARWIN, K_DARWIN64, K_COFF, K_AIXBIG };
Kind kind() const { return (Kind)Format; }
bool isThin() const { return IsThin; }
static object::Archive::Kind getDefaultKindForHost();
child_iterator child_begin(Error &Err, bool SkipInternal = true) const;
child_iterator child_end() const;
iterator_range<child_iterator> children(Error &Err,
bool SkipInternal = true) const {
return make_range(child_begin(Err, SkipInternal), child_end());
}
symbol_iterator symbol_begin() const;
symbol_iterator symbol_end() const;
iterator_range<symbol_iterator> symbols() const {
return make_range(symbol_begin(), symbol_end());
}
Expected<iterator_range<symbol_iterator>> ec_symbols() const;
static bool classof(Binary const *v) { return v->isArchive(); }
// check if a symbol is in the archive
Expected<std::optional<Child>> findSym(StringRef name) const;
virtual bool isEmpty() const;
bool hasSymbolTable() const;
StringRef getSymbolTable() const { return SymbolTable; }
StringRef getStringTable() const { return StringTable; }
uint32_t getNumberOfSymbols() const;
uint32_t getNumberOfECSymbols() const;
virtual uint64_t getFirstChildOffset() const { return getArchiveMagicLen(); }
std::vector<std::unique_ptr<MemoryBuffer>> takeThinBuffers() {
return std::move(ThinBuffers);
}
std::unique_ptr<AbstractArchiveMemberHeader>
createArchiveMemberHeader(const char *RawHeaderPtr, uint64_t Size,
Error *Err) const;
protected:
uint64_t getArchiveMagicLen() const;
void setFirstRegular(const Child &C);
StringRef SymbolTable;
StringRef ECSymbolTable;
StringRef StringTable;
private:
StringRef FirstRegularData;
uint16_t FirstRegularStartOfFile = -1;
unsigned Format : 3;
unsigned IsThin : 1;
mutable std::vector<std::unique_ptr<MemoryBuffer>> ThinBuffers;
};
class BigArchive : public Archive {
public:
/// Fixed-Length Header.
struct FixLenHdr {
char Magic[sizeof(BigArchiveMagic) - 1]; ///< Big archive magic string.
char MemOffset[20]; ///< Offset to member table.
char GlobSymOffset[20]; ///< Offset to global symbol table.
char
GlobSym64Offset[20]; ///< Offset global symbol table for 64-bit objects.
char FirstChildOffset[20]; ///< Offset to first archive member.
char LastChildOffset[20]; ///< Offset to last archive member.
char FreeOffset[20]; ///< Offset to first mem on free list.
};
const FixLenHdr *ArFixLenHdr;
uint64_t FirstChildOffset = 0;
uint64_t LastChildOffset = 0;
std::string MergedGlobalSymtabBuf;
public:
BigArchive(MemoryBufferRef Source, Error &Err);
uint64_t getFirstChildOffset() const override { return FirstChildOffset; }
uint64_t getLastChildOffset() const { return LastChildOffset; }
bool isEmpty() const override { return getFirstChildOffset() == 0; }
};
} // end namespace object
} // end namespace llvm
#endif // LLVM_OBJECT_ARCHIVE_H
PK hwFZ;DŽ��$ �$ Object/WindowsResource.hnu �[��� //===-- WindowsResource.h ---------------------------------------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===---------------------------------------------------------------------===//
//
// This file declares the .res file class. .res files are intermediate
// products of the typical resource-compilation process on Windows. This
// process is as follows:
//
// .rc file(s) ---(rc.exe)---> .res file(s) ---(cvtres.exe)---> COFF file
//
// .rc files are human-readable scripts that list all resources a program uses.
//
// They are compiled into .res files, which are a list of the resources in
// binary form.
//
// Finally the data stored in the .res is compiled into a COFF file, where it
// is organized in a directory tree structure for optimized access by the
// program during runtime.
//
// Ref: msdn.microsoft.com/en-us/library/windows/desktop/ms648007(v=vs.85).aspx
//
//===---------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_WINDOWSRESOURCE_H
#define LLVM_OBJECT_WINDOWSRESOURCE_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/BinaryFormat/COFF.h"
#include "llvm/Object/Binary.h"
#include "llvm/Object/Error.h"
#include "llvm/Support/BinaryByteStream.h"
#include "llvm/Support/BinaryStreamReader.h"
#include "llvm/Support/ConvertUTF.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <map>
namespace llvm {
class raw_ostream;
class ScopedPrinter;
namespace object {
class WindowsResource;
class ResourceSectionRef;
struct coff_resource_dir_table;
const size_t WIN_RES_MAGIC_SIZE = 16;
const size_t WIN_RES_NULL_ENTRY_SIZE = 16;
const uint32_t WIN_RES_HEADER_ALIGNMENT = 4;
const uint32_t WIN_RES_DATA_ALIGNMENT = 4;
const uint16_t WIN_RES_PURE_MOVEABLE = 0x0030;
struct WinResHeaderPrefix {
support::ulittle32_t DataSize;
support::ulittle32_t HeaderSize;
};
// Type and Name may each either be an integer ID or a string. This struct is
// only used in the case where they are both IDs.
struct WinResIDs {
uint16_t TypeFlag;
support::ulittle16_t TypeID;
uint16_t NameFlag;
support::ulittle16_t NameID;
void setType(uint16_t ID) {
TypeFlag = 0xffff;
TypeID = ID;
}
void setName(uint16_t ID) {
NameFlag = 0xffff;
NameID = ID;
}
};
struct WinResHeaderSuffix {
support::ulittle32_t DataVersion;
support::ulittle16_t MemoryFlags;
support::ulittle16_t Language;
support::ulittle32_t Version;
support::ulittle32_t Characteristics;
};
class EmptyResError : public GenericBinaryError {
public:
EmptyResError(Twine Msg, object_error ECOverride)
: GenericBinaryError(Msg, ECOverride) {}
};
class ResourceEntryRef {
public:
Error moveNext(bool &End);
bool checkTypeString() const { return IsStringType; }
ArrayRef<UTF16> getTypeString() const { return Type; }
uint16_t getTypeID() const { return TypeID; }
bool checkNameString() const { return IsStringName; }
ArrayRef<UTF16> getNameString() const { return Name; }
uint16_t getNameID() const { return NameID; }
uint16_t getDataVersion() const { return Suffix->DataVersion; }
uint16_t getLanguage() const { return Suffix->Language; }
uint16_t getMemoryFlags() const { return Suffix->MemoryFlags; }
uint16_t getMajorVersion() const { return Suffix->Version >> 16; }
uint16_t getMinorVersion() const { return Suffix->Version; }
uint32_t getCharacteristics() const { return Suffix->Characteristics; }
ArrayRef<uint8_t> getData() const { return Data; }
private:
friend class WindowsResource;
ResourceEntryRef(BinaryStreamRef Ref, const WindowsResource *Owner);
Error loadNext();
static Expected<ResourceEntryRef> create(BinaryStreamRef Ref,
const WindowsResource *Owner);
BinaryStreamReader Reader;
const WindowsResource *Owner;
bool IsStringType;
ArrayRef<UTF16> Type;
uint16_t TypeID;
bool IsStringName;
ArrayRef<UTF16> Name;
uint16_t NameID;
const WinResHeaderSuffix *Suffix = nullptr;
ArrayRef<uint8_t> Data;
};
class WindowsResource : public Binary {
public:
Expected<ResourceEntryRef> getHeadEntry();
static bool classof(const Binary *V) { return V->isWinRes(); }
static Expected<std::unique_ptr<WindowsResource>>
createWindowsResource(MemoryBufferRef Source);
private:
friend class ResourceEntryRef;
WindowsResource(MemoryBufferRef Source);
BinaryByteStream BBS;
};
class WindowsResourceParser {
public:
class TreeNode;
WindowsResourceParser(bool MinGW = false);
Error parse(WindowsResource *WR, std::vector<std::string> &Duplicates);
Error parse(ResourceSectionRef &RSR, StringRef Filename,
std::vector<std::string> &Duplicates);
void cleanUpManifests(std::vector<std::string> &Duplicates);
void printTree(raw_ostream &OS) const;
const TreeNode &getTree() const { return Root; }
ArrayRef<std::vector<uint8_t>> getData() const { return Data; }
ArrayRef<std::vector<UTF16>> getStringTable() const { return StringTable; }
class TreeNode {
public:
template <typename T>
using Children = std::map<T, std::unique_ptr<TreeNode>>;
void print(ScopedPrinter &Writer, StringRef Name) const;
uint32_t getTreeSize() const;
uint32_t getStringIndex() const { return StringIndex; }
uint32_t getDataIndex() const { return DataIndex; }
uint16_t getMajorVersion() const { return MajorVersion; }
uint16_t getMinorVersion() const { return MinorVersion; }
uint32_t getCharacteristics() const { return Characteristics; }
bool checkIsDataNode() const { return IsDataNode; }
const Children<uint32_t> &getIDChildren() const { return IDChildren; }
const Children<std::string> &getStringChildren() const {
return StringChildren;
}
private:
friend class WindowsResourceParser;
// Index is the StringTable vector index for this node's name.
static std::unique_ptr<TreeNode> createStringNode(uint32_t Index);
static std::unique_ptr<TreeNode> createIDNode();
// DataIndex is the Data vector index that the data node points at.
static std::unique_ptr<TreeNode> createDataNode(uint16_t MajorVersion,
uint16_t MinorVersion,
uint32_t Characteristics,
uint32_t Origin,
uint32_t DataIndex);
explicit TreeNode(uint32_t StringIndex);
TreeNode(uint16_t MajorVersion, uint16_t MinorVersion,
uint32_t Characteristics, uint32_t Origin, uint32_t DataIndex);
bool addEntry(const ResourceEntryRef &Entry, uint32_t Origin,
std::vector<std::vector<uint8_t>> &Data,
std::vector<std::vector<UTF16>> &StringTable,
TreeNode *&Result);
TreeNode &addTypeNode(const ResourceEntryRef &Entry,
std::vector<std::vector<UTF16>> &StringTable);
TreeNode &addNameNode(const ResourceEntryRef &Entry,
std::vector<std::vector<UTF16>> &StringTable);
bool addLanguageNode(const ResourceEntryRef &Entry, uint32_t Origin,
std::vector<std::vector<uint8_t>> &Data,
TreeNode *&Result);
bool addDataChild(uint32_t ID, uint16_t MajorVersion, uint16_t MinorVersion,
uint32_t Characteristics, uint32_t Origin,
uint32_t DataIndex, TreeNode *&Result);
TreeNode &addIDChild(uint32_t ID);
TreeNode &addNameChild(ArrayRef<UTF16> NameRef,
std::vector<std::vector<UTF16>> &StringTable);
void shiftDataIndexDown(uint32_t Index);
bool IsDataNode = false;
uint32_t StringIndex;
uint32_t DataIndex;
Children<uint32_t> IDChildren;
Children<std::string> StringChildren;
uint16_t MajorVersion = 0;
uint16_t MinorVersion = 0;
uint32_t Characteristics = 0;
// The .res file that defined this TreeNode, for diagnostics.
// Index into InputFilenames.
uint32_t Origin;
};
struct StringOrID {
bool IsString;
ArrayRef<UTF16> String;
uint32_t ID = ~0u;
StringOrID(uint32_t ID) : IsString(false), ID(ID) {}
StringOrID(ArrayRef<UTF16> String) : IsString(true), String(String) {}
};
private:
Error addChildren(TreeNode &Node, ResourceSectionRef &RSR,
const coff_resource_dir_table &Table, uint32_t Origin,
std::vector<StringOrID> &Context,
std::vector<std::string> &Duplicates);
bool shouldIgnoreDuplicate(const ResourceEntryRef &Entry) const;
bool shouldIgnoreDuplicate(const std::vector<StringOrID> &Context) const;
TreeNode Root;
std::vector<std::vector<uint8_t>> Data;
std::vector<std::vector<UTF16>> StringTable;
std::vector<std::string> InputFilenames;
bool MinGW;
};
Expected<std::unique_ptr<MemoryBuffer>>
writeWindowsResourceCOFF(llvm::COFF::MachineTypes MachineType,
const WindowsResourceParser &Parser,
uint32_t TimeDateStamp);
void printResourceTypeName(uint16_t TypeID, raw_ostream &OS);
} // namespace object
} // namespace llvm
#endif
PK hwFZ�D�n� � Object/OffloadBinary.hnu �[��� //===--- Offloading.h - Utilities for handling offloading code -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the binary format used for budingling device metadata with
// an associated device image. The data can then be stored inside a host object
// file to create a fat binary and read by the linker. This is intended to be a
// thin wrapper around the image itself. If this format becomes sufficiently
// complex it should be moved to a standard binary format like msgpack or ELF.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_OFFLOADBINARY_H
#define LLVM_OBJECT_OFFLOADBINARY_H
#include "llvm/ADT/MapVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Object/Binary.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MemoryBuffer.h"
#include <memory>
namespace llvm {
namespace object {
/// The producer of the associated offloading image.
enum OffloadKind : uint16_t {
OFK_None = 0,
OFK_OpenMP,
OFK_Cuda,
OFK_HIP,
OFK_LAST,
};
/// The type of contents the offloading image contains.
enum ImageKind : uint16_t {
IMG_None = 0,
IMG_Object,
IMG_Bitcode,
IMG_Cubin,
IMG_Fatbinary,
IMG_PTX,
IMG_LAST,
};
/// A simple binary serialization of an offloading file. We use this format to
/// embed the offloading image into the host executable so it can be extracted
/// and used by the linker.
///
/// Many of these could be stored in the same section by the time the linker
/// sees it so we mark this information with a header. The version is used to
/// detect ABI stability and the size is used to find other offloading entries
/// that may exist in the same section. All offsets are given as absolute byte
/// offsets from the beginning of the file.
class OffloadBinary : public Binary {
public:
using string_iterator = MapVector<StringRef, StringRef>::const_iterator;
using string_iterator_range = iterator_range<string_iterator>;
/// The current version of the binary used for backwards compatibility.
static const uint32_t Version = 1;
/// The offloading metadata that will be serialized to a memory buffer.
struct OffloadingImage {
ImageKind TheImageKind;
OffloadKind TheOffloadKind;
uint32_t Flags;
MapVector<StringRef, StringRef> StringData;
std::unique_ptr<MemoryBuffer> Image;
};
/// Attempt to parse the offloading binary stored in \p Data.
static Expected<std::unique_ptr<OffloadBinary>> create(MemoryBufferRef);
/// Serialize the contents of \p File to a binary buffer to be read later.
static std::unique_ptr<MemoryBuffer> write(const OffloadingImage &);
static uint64_t getAlignment() { return 8; }
ImageKind getImageKind() const { return TheEntry->TheImageKind; }
OffloadKind getOffloadKind() const { return TheEntry->TheOffloadKind; }
uint32_t getVersion() const { return TheHeader->Version; }
uint32_t getFlags() const { return TheEntry->Flags; }
uint64_t getSize() const { return TheHeader->Size; }
StringRef getTriple() const { return getString("triple"); }
StringRef getArch() const { return getString("arch"); }
StringRef getImage() const {
return StringRef(&Buffer[TheEntry->ImageOffset], TheEntry->ImageSize);
}
// Iterator over all the key and value pairs in the binary.
string_iterator_range strings() const {
return string_iterator_range(StringData.begin(), StringData.end());
}
StringRef getString(StringRef Key) const { return StringData.lookup(Key); }
static bool classof(const Binary *V) { return V->isOffloadFile(); }
struct Header {
uint8_t Magic[4] = {0x10, 0xFF, 0x10, 0xAD}; // 0x10FF10AD magic bytes.
uint32_t Version = OffloadBinary::Version; // Version identifier.
uint64_t Size; // Size in bytes of this entire binary.
uint64_t EntryOffset; // Offset of the metadata entry in bytes.
uint64_t EntrySize; // Size of the metadata entry in bytes.
};
struct Entry {
ImageKind TheImageKind; // The kind of the image stored.
OffloadKind TheOffloadKind; // The producer of this image.
uint32_t Flags; // Additional flags associated with the image.
uint64_t StringOffset; // Offset in bytes to the string map.
uint64_t NumStrings; // Number of entries in the string map.
uint64_t ImageOffset; // Offset in bytes of the actual binary image.
uint64_t ImageSize; // Size in bytes of the binary image.
};
struct StringEntry {
uint64_t KeyOffset;
uint64_t ValueOffset;
};
private:
OffloadBinary(MemoryBufferRef Source, const Header *TheHeader,
const Entry *TheEntry)
: Binary(Binary::ID_Offload, Source), Buffer(Source.getBufferStart()),
TheHeader(TheHeader), TheEntry(TheEntry) {
const StringEntry *StringMapBegin =
reinterpret_cast<const StringEntry *>(&Buffer[TheEntry->StringOffset]);
for (uint64_t I = 0, E = TheEntry->NumStrings; I != E; ++I) {
StringRef Key = &Buffer[StringMapBegin[I].KeyOffset];
StringData[Key] = &Buffer[StringMapBegin[I].ValueOffset];
}
}
OffloadBinary(const OffloadBinary &Other) = delete;
/// Map from keys to offsets in the binary.
MapVector<StringRef, StringRef> StringData;
/// Raw pointer to the MemoryBufferRef for convenience.
const char *Buffer;
/// Location of the header within the binary.
const Header *TheHeader;
/// Location of the metadata entries within the binary.
const Entry *TheEntry;
};
/// A class to contain the binary information for a single OffloadBinary that
/// owns its memory.
class OffloadFile : public OwningBinary<OffloadBinary> {
public:
using TargetID = std::pair<StringRef, StringRef>;
OffloadFile(std::unique_ptr<OffloadBinary> Binary,
std::unique_ptr<MemoryBuffer> Buffer)
: OwningBinary<OffloadBinary>(std::move(Binary), std::move(Buffer)) {}
/// We use the Triple and Architecture pair to group linker inputs together.
/// This conversion function lets us use these inputs in a hash-map.
operator TargetID() const {
return std::make_pair(getBinary()->getTriple(), getBinary()->getArch());
}
};
/// Extracts embedded device offloading code from a memory \p Buffer to a list
/// of \p Binaries.
Error extractOffloadBinaries(MemoryBufferRef Buffer,
SmallVectorImpl<OffloadFile> &Binaries);
/// Convert a string \p Name to an image kind.
ImageKind getImageKind(StringRef Name);
/// Convert an image kind to its string representation.
StringRef getImageKindName(ImageKind Name);
/// Convert a string \p Name to an offload kind.
OffloadKind getOffloadKind(StringRef Name);
/// Convert an offload kind to its string representation.
StringRef getOffloadKindName(OffloadKind Name);
} // namespace object
} // namespace llvm
#endif
PK hwFZ:���% % Object/COFFModuleDefinition.hnu �[��� //===--- COFFModuleDefinition.h ---------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Windows-specific.
// A parser for the module-definition file (.def file).
// Parsed results are directly written to Config global variable.
//
// The format of module-definition files are described in this document:
// https://msdn.microsoft.com/en-us/library/28d6s79h.aspx
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_COFFMODULEDEFINITION_H
#define LLVM_OBJECT_COFFMODULEDEFINITION_H
#include "llvm/BinaryFormat/COFF.h"
#include "llvm/Object/COFFImportFile.h"
namespace llvm {
namespace object {
struct COFFModuleDefinition {
std::vector<COFFShortExport> Exports;
std::string OutputFile;
std::string ImportName;
uint64_t ImageBase = 0;
uint64_t StackReserve = 0;
uint64_t StackCommit = 0;
uint64_t HeapReserve = 0;
uint64_t HeapCommit = 0;
uint32_t MajorImageVersion = 0;
uint32_t MinorImageVersion = 0;
uint32_t MajorOSVersion = 0;
uint32_t MinorOSVersion = 0;
};
Expected<COFFModuleDefinition>
parseCOFFModuleDefinition(MemoryBufferRef MB, COFF::MachineTypes Machine,
bool MingwDef = false, bool AddUnderscores = true);
} // End namespace object.
} // End namespace llvm.
#endif
PK hwFZ�@��> > Object/FaultMapParser.hnu �[��� //===-- FaultMapParser.h - Parser for the "FaultMaps" section --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_FAULTMAPPARSER_H
#define LLVM_OBJECT_FAULTMAPPARSER_H
#include "llvm/Support/Endian.h"
#include <cassert>
#include <cstdint>
namespace llvm {
class raw_ostream;
/// A parser for the __llvm_faultmaps section generated by the FaultMaps class
/// declared in llvm/CodeGen/FaultMaps.h. This parser is version locked with
/// with the __llvm_faultmaps section generated by the version of LLVM that
/// includes it. No guarantees are made with respect to forward or backward
/// compatibility.
class FaultMapParser {
using FaultMapVersionType = uint8_t;
using Reserved0Type = uint8_t;
using Reserved1Type = uint16_t;
using NumFunctionsType = uint32_t;
static const size_t FaultMapVersionOffset = 0;
static const size_t Reserved0Offset =
FaultMapVersionOffset + sizeof(FaultMapVersionType);
static const size_t Reserved1Offset = Reserved0Offset + sizeof(Reserved0Type);
static const size_t NumFunctionsOffset =
Reserved1Offset + sizeof(Reserved1Type);
static const size_t FunctionInfosOffset =
NumFunctionsOffset + sizeof(NumFunctionsType);
const uint8_t *P;
const uint8_t *E;
template <typename T> static T read(const uint8_t *P, const uint8_t *E) {
assert(P + sizeof(T) <= E && "out of bounds read!");
return support::endian::read<T, support::little, 1>(P);
}
public:
enum FaultKind {
FaultingLoad = 1,
FaultingLoadStore,
FaultingStore,
FaultKindMax
};
class FunctionFaultInfoAccessor {
using FaultKindType = uint32_t;
using FaultingPCOffsetType = uint32_t;
using HandlerPCOffsetType = uint32_t;
static const size_t FaultKindOffset = 0;
static const size_t FaultingPCOffsetOffset =
FaultKindOffset + sizeof(FaultKindType);
static const size_t HandlerPCOffsetOffset =
FaultingPCOffsetOffset + sizeof(FaultingPCOffsetType);
const uint8_t *P;
const uint8_t *E;
public:
static const size_t Size =
HandlerPCOffsetOffset + sizeof(HandlerPCOffsetType);
explicit FunctionFaultInfoAccessor(const uint8_t *P, const uint8_t *E)
: P(P), E(E) {}
FaultKindType getFaultKind() const {
return read<FaultKindType>(P + FaultKindOffset, E);
}
FaultingPCOffsetType getFaultingPCOffset() const {
return read<FaultingPCOffsetType>(P + FaultingPCOffsetOffset, E);
}
HandlerPCOffsetType getHandlerPCOffset() const {
return read<HandlerPCOffsetType>(P + HandlerPCOffsetOffset, E);
}
};
class FunctionInfoAccessor {
using FunctionAddrType = uint64_t;
using NumFaultingPCsType = uint32_t;
using ReservedType = uint32_t;
static const size_t FunctionAddrOffset = 0;
static const size_t NumFaultingPCsOffset =
FunctionAddrOffset + sizeof(FunctionAddrType);
static const size_t ReservedOffset =
NumFaultingPCsOffset + sizeof(NumFaultingPCsType);
static const size_t FunctionFaultInfosOffset =
ReservedOffset + sizeof(ReservedType);
static const size_t FunctionInfoHeaderSize = FunctionFaultInfosOffset;
const uint8_t *P = nullptr;
const uint8_t *E = nullptr;
public:
FunctionInfoAccessor() = default;
explicit FunctionInfoAccessor(const uint8_t *P, const uint8_t *E)
: P(P), E(E) {}
FunctionAddrType getFunctionAddr() const {
return read<FunctionAddrType>(P + FunctionAddrOffset, E);
}
NumFaultingPCsType getNumFaultingPCs() const {
return read<NumFaultingPCsType>(P + NumFaultingPCsOffset, E);
}
FunctionFaultInfoAccessor getFunctionFaultInfoAt(uint32_t Index) const {
assert(Index < getNumFaultingPCs() && "index out of bounds!");
const uint8_t *Begin = P + FunctionFaultInfosOffset +
FunctionFaultInfoAccessor::Size * Index;
return FunctionFaultInfoAccessor(Begin, E);
}
FunctionInfoAccessor getNextFunctionInfo() const {
size_t MySize = FunctionInfoHeaderSize +
getNumFaultingPCs() * FunctionFaultInfoAccessor::Size;
const uint8_t *Begin = P + MySize;
assert(Begin < E && "out of bounds!");
return FunctionInfoAccessor(Begin, E);
}
};
explicit FaultMapParser(const uint8_t *Begin, const uint8_t *End)
: P(Begin), E(End) {}
FaultMapVersionType getFaultMapVersion() const {
auto Version = read<FaultMapVersionType>(P + FaultMapVersionOffset, E);
assert(Version == 1 && "only version 1 supported!");
return Version;
}
NumFunctionsType getNumFunctions() const {
return read<NumFunctionsType>(P + NumFunctionsOffset, E);
}
FunctionInfoAccessor getFirstFunctionInfo() const {
const uint8_t *Begin = P + FunctionInfosOffset;
return FunctionInfoAccessor(Begin, E);
}
};
raw_ostream &operator<<(raw_ostream &OS,
const FaultMapParser::FunctionFaultInfoAccessor &);
raw_ostream &operator<<(raw_ostream &OS,
const FaultMapParser::FunctionInfoAccessor &);
raw_ostream &operator<<(raw_ostream &OS, const FaultMapParser &);
} // namespace llvm
#endif
PK hwFZ< �ӊ � Object/SymbolicFile.hnu �[��� //===- SymbolicFile.h - Interface that only provides symbols ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the SymbolicFile interface.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_SYMBOLICFILE_H
#define LLVM_OBJECT_SYMBOLICFILE_H
#include "llvm/ADT/iterator_range.h"
#include "llvm/BinaryFormat/Magic.h"
#include "llvm/Object/Binary.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/MemoryBufferRef.h"
#include <cinttypes>
#include <cstdint>
#include <cstring>
#include <iterator>
#include <memory>
namespace llvm {
class LLVMContext;
class raw_ostream;
namespace object {
union DataRefImpl {
// This entire union should probably be a
// char[max(8, sizeof(uintptr_t))] and require the impl to cast.
struct {
uint32_t a, b;
} d;
uintptr_t p;
DataRefImpl() { std::memset(this, 0, sizeof(DataRefImpl)); }
};
template <typename OStream>
OStream& operator<<(OStream &OS, const DataRefImpl &D) {
OS << "(" << format("0x%08" PRIxPTR, D.p) << " (" << format("0x%08x", D.d.a)
<< ", " << format("0x%08x", D.d.b) << "))";
return OS;
}
inline bool operator==(const DataRefImpl &a, const DataRefImpl &b) {
// Check bitwise identical. This is the only legal way to compare a union w/o
// knowing which member is in use.
return std::memcmp(&a, &b, sizeof(DataRefImpl)) == 0;
}
inline bool operator!=(const DataRefImpl &a, const DataRefImpl &b) {
return !operator==(a, b);
}
inline bool operator<(const DataRefImpl &a, const DataRefImpl &b) {
// Check bitwise identical. This is the only legal way to compare a union w/o
// knowing which member is in use.
return std::memcmp(&a, &b, sizeof(DataRefImpl)) < 0;
}
template <class content_type> class content_iterator {
content_type Current;
public:
using iterator_category = std::forward_iterator_tag;
using value_type = content_type;
using difference_type = std::ptrdiff_t;
using pointer = value_type *;
using reference = value_type &;
content_iterator(content_type symb) : Current(std::move(symb)) {}
const content_type *operator->() const { return &Current; }
const content_type &operator*() const { return Current; }
bool operator==(const content_iterator &other) const {
return Current == other.Current;
}
bool operator!=(const content_iterator &other) const {
return !(*this == other);
}
content_iterator &operator++() { // preincrement
Current.moveNext();
return *this;
}
};
class SymbolicFile;
/// This is a value type class that represents a single symbol in the list of
/// symbols in the object file.
class BasicSymbolRef {
DataRefImpl SymbolPimpl;
const SymbolicFile *OwningObject = nullptr;
public:
enum Flags : unsigned {
SF_None = 0,
SF_Undefined = 1U << 0, // Symbol is defined in another object file
SF_Global = 1U << 1, // Global symbol
SF_Weak = 1U << 2, // Weak symbol
SF_Absolute = 1U << 3, // Absolute symbol
SF_Common = 1U << 4, // Symbol has common linkage
SF_Indirect = 1U << 5, // Symbol is an alias to another symbol
SF_Exported = 1U << 6, // Symbol is visible to other DSOs
SF_FormatSpecific = 1U << 7, // Specific to the object file format
// (e.g. section symbols)
SF_Thumb = 1U << 8, // Thumb symbol in a 32-bit ARM binary
SF_Hidden = 1U << 9, // Symbol has hidden visibility
SF_Const = 1U << 10, // Symbol value is constant
SF_Executable = 1U << 11, // Symbol points to an executable section
// (IR only)
};
BasicSymbolRef() = default;
BasicSymbolRef(DataRefImpl SymbolP, const SymbolicFile *Owner);
bool operator==(const BasicSymbolRef &Other) const;
bool operator<(const BasicSymbolRef &Other) const;
void moveNext();
Error printName(raw_ostream &OS) const;
/// Get symbol flags (bitwise OR of SymbolRef::Flags)
Expected<uint32_t> getFlags() const;
DataRefImpl getRawDataRefImpl() const;
const SymbolicFile *getObject() const;
};
using basic_symbol_iterator = content_iterator<BasicSymbolRef>;
class SymbolicFile : public Binary {
public:
SymbolicFile(unsigned int Type, MemoryBufferRef Source);
~SymbolicFile() override;
// virtual interface.
virtual void moveSymbolNext(DataRefImpl &Symb) const = 0;
virtual Error printSymbolName(raw_ostream &OS, DataRefImpl Symb) const = 0;
virtual Expected<uint32_t> getSymbolFlags(DataRefImpl Symb) const = 0;
virtual basic_symbol_iterator symbol_begin() const = 0;
virtual basic_symbol_iterator symbol_end() const = 0;
virtual bool is64Bit() const = 0;
// convenience wrappers.
using basic_symbol_iterator_range = iterator_range<basic_symbol_iterator>;
basic_symbol_iterator_range symbols() const {
return basic_symbol_iterator_range(symbol_begin(), symbol_end());
}
// construction aux.
static Expected<std::unique_ptr<SymbolicFile>>
createSymbolicFile(MemoryBufferRef Object, llvm::file_magic Type,
LLVMContext *Context, bool InitContent = true);
static Expected<std::unique_ptr<SymbolicFile>>
createSymbolicFile(MemoryBufferRef Object) {
return createSymbolicFile(Object, llvm::file_magic::unknown, nullptr);
}
static bool classof(const Binary *v) {
return v->isSymbolic();
}
static bool isSymbolicFile(file_magic Type, const LLVMContext *Context);
};
inline BasicSymbolRef::BasicSymbolRef(DataRefImpl SymbolP,
const SymbolicFile *Owner)
: SymbolPimpl(SymbolP), OwningObject(Owner) {}
inline bool BasicSymbolRef::operator==(const BasicSymbolRef &Other) const {
return SymbolPimpl == Other.SymbolPimpl;
}
inline bool BasicSymbolRef::operator<(const BasicSymbolRef &Other) const {
return SymbolPimpl < Other.SymbolPimpl;
}
inline void BasicSymbolRef::moveNext() {
return OwningObject->moveSymbolNext(SymbolPimpl);
}
inline Error BasicSymbolRef::printName(raw_ostream &OS) const {
return OwningObject->printSymbolName(OS, SymbolPimpl);
}
inline Expected<uint32_t> BasicSymbolRef::getFlags() const {
return OwningObject->getSymbolFlags(SymbolPimpl);
}
inline DataRefImpl BasicSymbolRef::getRawDataRefImpl() const {
return SymbolPimpl;
}
inline const SymbolicFile *BasicSymbolRef::getObject() const {
return OwningObject;
}
} // end namespace object
} // end namespace llvm
#endif // LLVM_OBJECT_SYMBOLICFILE_H
PK hwFZJ�� � Object/Error.hnu �[��� //===- Error.h - system_error extensions for Object -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This declares a new error_category for the Object library.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_ERROR_H
#define LLVM_OBJECT_ERROR_H
#include "llvm/Support/Error.h"
#include <system_error>
namespace llvm {
class Twine;
namespace object {
const std::error_category &object_category();
enum class object_error {
// Error code 0 is absent. Use std::error_code() instead.
arch_not_found = 1,
invalid_file_type,
parse_failed,
unexpected_eof,
string_table_non_null_end,
invalid_section_index,
bitcode_section_not_found,
invalid_symbol_index,
section_stripped,
};
inline std::error_code make_error_code(object_error e) {
return std::error_code(static_cast<int>(e), object_category());
}
/// Base class for all errors indicating malformed binary files.
///
/// Having a subclass for all malformed binary files allows archive-walking
/// code to skip malformed files without having to understand every possible
/// way that a binary file might be malformed.
///
/// Currently inherits from ECError for easy interoperability with
/// std::error_code, but this will be removed in the future.
class BinaryError : public ErrorInfo<BinaryError, ECError> {
void anchor() override;
public:
static char ID;
BinaryError() {
// Default to parse_failed, can be overridden with setErrorCode.
setErrorCode(make_error_code(object_error::parse_failed));
}
};
/// Generic binary error.
///
/// For errors that don't require their own specific sub-error (most errors)
/// this class can be used to describe the error via a string message.
class GenericBinaryError : public ErrorInfo<GenericBinaryError, BinaryError> {
public:
static char ID;
GenericBinaryError(const Twine &Msg);
GenericBinaryError(const Twine &Msg, object_error ECOverride);
const std::string &getMessage() const { return Msg; }
void log(raw_ostream &OS) const override;
private:
std::string Msg;
};
/// isNotObjectErrorInvalidFileType() is used when looping through the children
/// of an archive after calling getAsBinary() on the child and it returns an
/// llvm::Error. In the cases we want to loop through the children and ignore the
/// non-objects in the archive this is used to test the error to see if an
/// error() function needs to called on the llvm::Error.
Error isNotObjectErrorInvalidFileType(llvm::Error Err);
inline Error createError(const Twine &Err) {
return make_error<StringError>(Err, object_error::parse_failed);
}
} // end namespace object.
} // end namespace llvm.
namespace std {
template <>
struct is_error_code_enum<llvm::object::object_error> : std::true_type {};
}
#endif
PK hwFZ��I� � Object/BuildID.hnu �[��� //===- llvm/Object/BuildID.h - Build ID -------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file declares a library for handling Build IDs and using them to find
/// debug info.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_OBJECT_BUILDID_H
#define LLVM_DEBUGINFO_OBJECT_BUILDID_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
namespace llvm {
namespace object {
/// A build ID in binary form.
typedef SmallVector<uint8_t, 10> BuildID;
/// A reference to a BuildID in binary form.
typedef ArrayRef<uint8_t> BuildIDRef;
class ObjectFile;
/// Parses a build ID from a hex string.
BuildID parseBuildID(StringRef Str);
/// Returns the build ID, if any, contained in the given object file.
BuildIDRef getBuildID(const ObjectFile *Obj);
/// BuildIDFetcher searches local cache directories for debug info.
class BuildIDFetcher {
public:
BuildIDFetcher(std::vector<std::string> DebugFileDirectories)
: DebugFileDirectories(std::move(DebugFileDirectories)) {}
virtual ~BuildIDFetcher() = default;
/// Returns the path to the debug file with the given build ID.
virtual std::optional<std::string> fetch(BuildIDRef BuildID) const;
private:
const std::vector<std::string> DebugFileDirectories;
};
} // namespace object
} // namespace llvm
#endif // LLVM_DEBUGINFO_OBJECT_BUILDID_H
PK hwFZ��Y�� � Object/Binary.hnu �[��� //===- Binary.h - A generic binary file -------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the Binary class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_BINARY_H
#define LLVM_OBJECT_BINARY_H
#include "llvm-c/Types.h"
#include "llvm/Object/Error.h"
#include "llvm/Support/CBindingWrapping.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/TargetParser/Triple.h"
#include <memory>
#include <utility>
namespace llvm {
class LLVMContext;
class StringRef;
namespace object {
class Binary {
private:
unsigned int TypeID;
protected:
MemoryBufferRef Data;
Binary(unsigned int Type, MemoryBufferRef Source);
enum {
ID_Archive,
ID_MachOUniversalBinary,
ID_COFFImportFile,
ID_IR, // LLVM IR
ID_TapiUniversal, // Text-based Dynamic Library Stub file.
ID_TapiFile, // Text-based Dynamic Library Stub file.
ID_Minidump,
ID_WinRes, // Windows resource (.res) file.
ID_Offload, // Offloading binary file.
// Object and children.
ID_StartObjects,
ID_COFF,
ID_XCOFF32, // AIX XCOFF 32-bit
ID_XCOFF64, // AIX XCOFF 64-bit
ID_ELF32L, // ELF 32-bit, little endian
ID_ELF32B, // ELF 32-bit, big endian
ID_ELF64L, // ELF 64-bit, little endian
ID_ELF64B, // ELF 64-bit, big endian
ID_MachO32L, // MachO 32-bit, little endian
ID_MachO32B, // MachO 32-bit, big endian
ID_MachO64L, // MachO 64-bit, little endian
ID_MachO64B, // MachO 64-bit, big endian
ID_GOFF,
ID_Wasm,
ID_EndObjects
};
static inline unsigned int getELFType(bool isLE, bool is64Bits) {
if (isLE)
return is64Bits ? ID_ELF64L : ID_ELF32L;
else
return is64Bits ? ID_ELF64B : ID_ELF32B;
}
static unsigned int getMachOType(bool isLE, bool is64Bits) {
if (isLE)
return is64Bits ? ID_MachO64L : ID_MachO32L;
else
return is64Bits ? ID_MachO64B : ID_MachO32B;
}
public:
Binary() = delete;
Binary(const Binary &other) = delete;
virtual ~Binary();
virtual Error initContent() { return Error::success(); };
StringRef getData() const;
StringRef getFileName() const;
MemoryBufferRef getMemoryBufferRef() const;
// Cast methods.
unsigned int getType() const { return TypeID; }
// Convenience methods
bool isObject() const {
return TypeID > ID_StartObjects && TypeID < ID_EndObjects;
}
bool isSymbolic() const {
return isIR() || isObject() || isCOFFImportFile() || isTapiFile();
}
bool isArchive() const { return TypeID == ID_Archive; }
bool isMachOUniversalBinary() const {
return TypeID == ID_MachOUniversalBinary;
}
bool isTapiUniversal() const { return TypeID == ID_TapiUniversal; }
bool isELF() const {
return TypeID >= ID_ELF32L && TypeID <= ID_ELF64B;
}
bool isMachO() const {
return TypeID >= ID_MachO32L && TypeID <= ID_MachO64B;
}
bool isCOFF() const {
return TypeID == ID_COFF;
}
bool isXCOFF() const { return TypeID == ID_XCOFF32 || TypeID == ID_XCOFF64; }
bool isWasm() const { return TypeID == ID_Wasm; }
bool isOffloadFile() const { return TypeID == ID_Offload; }
bool isCOFFImportFile() const {
return TypeID == ID_COFFImportFile;
}
bool isIR() const {
return TypeID == ID_IR;
}
bool isGOFF() const { return TypeID == ID_GOFF; }
bool isMinidump() const { return TypeID == ID_Minidump; }
bool isTapiFile() const { return TypeID == ID_TapiFile; }
bool isLittleEndian() const {
return !(TypeID == ID_ELF32B || TypeID == ID_ELF64B ||
TypeID == ID_MachO32B || TypeID == ID_MachO64B ||
TypeID == ID_XCOFF32 || TypeID == ID_XCOFF64);
}
bool isWinRes() const { return TypeID == ID_WinRes; }
Triple::ObjectFormatType getTripleObjectFormat() const {
if (isCOFF())
return Triple::COFF;
if (isMachO())
return Triple::MachO;
if (isELF())
return Triple::ELF;
if (isGOFF())
return Triple::GOFF;
return Triple::UnknownObjectFormat;
}
static Error checkOffset(MemoryBufferRef M, uintptr_t Addr,
const uint64_t Size) {
if (Addr + Size < Addr || Addr + Size < Size ||
Addr + Size > reinterpret_cast<uintptr_t>(M.getBufferEnd()) ||
Addr < reinterpret_cast<uintptr_t>(M.getBufferStart())) {
return errorCodeToError(object_error::unexpected_eof);
}
return Error::success();
}
};
// Create wrappers for C Binding types (see CBindingWrapping.h).
DEFINE_ISA_CONVERSION_FUNCTIONS(Binary, LLVMBinaryRef)
/// Create a Binary from Source, autodetecting the file type.
///
/// @param Source The data to create the Binary from.
Expected<std::unique_ptr<Binary>> createBinary(MemoryBufferRef Source,
LLVMContext *Context = nullptr,
bool InitContent = true);
template <typename T> class OwningBinary {
std::unique_ptr<T> Bin;
std::unique_ptr<MemoryBuffer> Buf;
public:
OwningBinary();
OwningBinary(std::unique_ptr<T> Bin, std::unique_ptr<MemoryBuffer> Buf);
OwningBinary(OwningBinary<T>&& Other);
OwningBinary<T> &operator=(OwningBinary<T> &&Other);
std::pair<std::unique_ptr<T>, std::unique_ptr<MemoryBuffer>> takeBinary();
T* getBinary();
const T* getBinary() const;
};
template <typename T>
OwningBinary<T>::OwningBinary(std::unique_ptr<T> Bin,
std::unique_ptr<MemoryBuffer> Buf)
: Bin(std::move(Bin)), Buf(std::move(Buf)) {}
template <typename T> OwningBinary<T>::OwningBinary() = default;
template <typename T>
OwningBinary<T>::OwningBinary(OwningBinary &&Other)
: Bin(std::move(Other.Bin)), Buf(std::move(Other.Buf)) {}
template <typename T>
OwningBinary<T> &OwningBinary<T>::operator=(OwningBinary &&Other) {
Bin = std::move(Other.Bin);
Buf = std::move(Other.Buf);
return *this;
}
template <typename T>
std::pair<std::unique_ptr<T>, std::unique_ptr<MemoryBuffer>>
OwningBinary<T>::takeBinary() {
return std::make_pair(std::move(Bin), std::move(Buf));
}
template <typename T> T* OwningBinary<T>::getBinary() {
return Bin.get();
}
template <typename T> const T* OwningBinary<T>::getBinary() const {
return Bin.get();
}
Expected<OwningBinary<Binary>> createBinary(StringRef Path,
LLVMContext *Context = nullptr,
bool InitContent = true);
} // end namespace object
} // end namespace llvm
#endif // LLVM_OBJECT_BINARY_H
PK hwFZ%�%� � Object/DXContainer.hnu �[��� //===- DXContainer.h - DXContainer file implementation ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the DXContainerFile class, which implements the ObjectFile
// interface for DXContainer files.
//
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_DXCONTAINER_H
#define LLVM_OBJECT_DXCONTAINER_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/BinaryFormat/DXContainer.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MemoryBufferRef.h"
#include "llvm/TargetParser/Triple.h"
#include <variant>
namespace llvm {
namespace object {
namespace DirectX {
class PSVRuntimeInfo {
// This class provides a view into the underlying resource array. The Resource
// data is little-endian encoded and may not be properly aligned to read
// directly from. The dereference operator creates a copy of the data and byte
// swaps it as appropriate.
struct ResourceArray {
StringRef Data;
uint32_t Stride; // size of each element in the list.
ResourceArray() = default;
ResourceArray(StringRef D, size_t S) : Data(D), Stride(S) {}
using value_type = dxbc::PSV::v2::ResourceBindInfo;
static constexpr uint32_t MaxStride() {
return static_cast<uint32_t>(sizeof(value_type));
}
struct iterator {
StringRef Data;
uint32_t Stride; // size of each element in the list.
const char *Current;
iterator(const ResourceArray &A, const char *C)
: Data(A.Data), Stride(A.Stride), Current(C) {}
iterator(const iterator &) = default;
value_type operator*() {
// Explicitly zero the structure so that unused fields are zeroed. It is
// up to the user to know if the fields are used by verifying the PSV
// version.
value_type Val = {{0, 0, 0, 0}, 0, 0};
if (Current >= Data.end())
return Val;
memcpy(static_cast<void *>(&Val), Current,
std::min(Stride, MaxStride()));
if (sys::IsBigEndianHost)
Val.swapBytes();
return Val;
}
iterator operator++() {
if (Current < Data.end())
Current += Stride;
return *this;
}
iterator operator++(int) {
iterator Tmp = *this;
++*this;
return Tmp;
}
iterator operator--() {
if (Current > Data.begin())
Current -= Stride;
return *this;
}
iterator operator--(int) {
iterator Tmp = *this;
--*this;
return Tmp;
}
bool operator==(const iterator I) { return I.Current == Current; }
bool operator!=(const iterator I) { return !(*this == I); }
};
iterator begin() const { return iterator(*this, Data.begin()); }
iterator end() const { return iterator(*this, Data.end()); }
size_t size() const { return Data.size() / Stride; }
};
StringRef Data;
uint32_t Size;
using InfoStruct =
std::variant<std::monostate, dxbc::PSV::v0::RuntimeInfo,
dxbc::PSV::v1::RuntimeInfo, dxbc::PSV::v2::RuntimeInfo>;
InfoStruct BasicInfo;
ResourceArray Resources;
public:
PSVRuntimeInfo(StringRef D) : Data(D), Size(0) {}
// Parsing depends on the shader kind
Error parse(uint16_t ShaderKind);
uint32_t getSize() const { return Size; }
uint32_t getResourceCount() const { return Resources.size(); }
ResourceArray getResources() const { return Resources; }
uint32_t getVersion() const {
return Size >= sizeof(dxbc::PSV::v2::RuntimeInfo)
? 2
: (Size >= sizeof(dxbc::PSV::v1::RuntimeInfo) ? 1 : 0);
}
uint32_t getResourceStride() const { return Resources.Stride; }
const InfoStruct &getInfo() const { return BasicInfo; }
};
} // namespace DirectX
class DXContainer {
public:
using DXILData = std::pair<dxbc::ProgramHeader, const char *>;
private:
DXContainer(MemoryBufferRef O);
MemoryBufferRef Data;
dxbc::Header Header;
SmallVector<uint32_t, 4> PartOffsets;
std::optional<DXILData> DXIL;
std::optional<uint64_t> ShaderFlags;
std::optional<dxbc::ShaderHash> Hash;
std::optional<DirectX::PSVRuntimeInfo> PSVInfo;
Error parseHeader();
Error parsePartOffsets();
Error parseDXILHeader(StringRef Part);
Error parseShaderFlags(StringRef Part);
Error parseHash(StringRef Part);
Error parsePSVInfo(StringRef Part);
friend class PartIterator;
public:
// The PartIterator is a wrapper around the iterator for the PartOffsets
// member of the DXContainer. It contains a refernce to the container, and the
// current iterator value, as well as storage for a parsed part header.
class PartIterator {
const DXContainer &Container;
SmallVectorImpl<uint32_t>::const_iterator OffsetIt;
struct PartData {
dxbc::PartHeader Part;
uint32_t Offset;
StringRef Data;
} IteratorState;
friend class DXContainer;
PartIterator(const DXContainer &C,
SmallVectorImpl<uint32_t>::const_iterator It)
: Container(C), OffsetIt(It) {
if (OffsetIt == Container.PartOffsets.end())
updateIteratorImpl(Container.PartOffsets.back());
else
updateIterator();
}
// Updates the iterator's state data. This results in copying the part
// header into the iterator and handling any required byte swapping. This is
// called when incrementing or decrementing the iterator.
void updateIterator() {
if (OffsetIt != Container.PartOffsets.end())
updateIteratorImpl(*OffsetIt);
}
// Implementation for updating the iterator state based on a specified
// offest.
void updateIteratorImpl(const uint32_t Offset);
public:
PartIterator &operator++() {
if (OffsetIt == Container.PartOffsets.end())
return *this;
++OffsetIt;
updateIterator();
return *this;
}
PartIterator operator++(int) {
PartIterator Tmp = *this;
++(*this);
return Tmp;
}
bool operator==(const PartIterator &RHS) const {
return OffsetIt == RHS.OffsetIt;
}
bool operator!=(const PartIterator &RHS) const {
return OffsetIt != RHS.OffsetIt;
}
const PartData &operator*() { return IteratorState; }
const PartData *operator->() { return &IteratorState; }
};
PartIterator begin() const {
return PartIterator(*this, PartOffsets.begin());
}
PartIterator end() const { return PartIterator(*this, PartOffsets.end()); }
StringRef getData() const { return Data.getBuffer(); }
static Expected<DXContainer> create(MemoryBufferRef Object);
const dxbc::Header &getHeader() const { return Header; }
const std::optional<DXILData> &getDXIL() const { return DXIL; }
std::optional<uint64_t> getShaderFlags() const { return ShaderFlags; }
std::optional<dxbc::ShaderHash> getShaderHash() const { return Hash; }
const std::optional<DirectX::PSVRuntimeInfo> &getPSVInfo() const {
return PSVInfo;
};
};
} // namespace object
} // namespace llvm
#endif // LLVM_OBJECT_DXCONTAINER_H
PK hwFZ���A A Object/ArchiveWriter.hnu �[��� //===- ArchiveWriter.h - ar archive file format writer ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Declares the writeArchive function for writing an archive file.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_ARCHIVEWRITER_H
#define LLVM_OBJECT_ARCHIVEWRITER_H
#include "llvm/Object/Archive.h"
namespace llvm {
struct NewArchiveMember {
std::unique_ptr<MemoryBuffer> Buf;
StringRef MemberName;
sys::TimePoint<std::chrono::seconds> ModTime;
unsigned UID = 0, GID = 0, Perms = 0644;
NewArchiveMember() = default;
NewArchiveMember(MemoryBufferRef BufRef);
// Detect the archive format from the object or bitcode file. This helps
// assume the archive format when creating or editing archives in the case
// one isn't explicitly set.
object::Archive::Kind detectKindFromObject() const;
static Expected<NewArchiveMember>
getOldMember(const object::Archive::Child &OldMember, bool Deterministic);
static Expected<NewArchiveMember> getFile(StringRef FileName,
bool Deterministic);
};
Expected<std::string> computeArchiveRelativePath(StringRef From, StringRef To);
Error writeArchive(StringRef ArcName, ArrayRef<NewArchiveMember> NewMembers,
bool WriteSymtab, object::Archive::Kind Kind,
bool Deterministic, bool Thin,
std::unique_ptr<MemoryBuffer> OldArchiveBuf = nullptr,
bool IsEC = false);
// writeArchiveToBuffer is similar to writeArchive but returns the Archive in a
// buffer instead of writing it out to a file.
Expected<std::unique_ptr<MemoryBuffer>>
writeArchiveToBuffer(ArrayRef<NewArchiveMember> NewMembers, bool WriteSymtab,
object::Archive::Kind Kind, bool Deterministic, bool Thin);
}
#endif
PK hwFZ�}ľ � Object/IRObjectFile.hnu �[��� //===- IRObjectFile.h - LLVM IR object file implementation ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the IRObjectFile template class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_IROBJECTFILE_H
#define LLVM_OBJECT_IROBJECTFILE_H
#include "llvm/Bitcode/BitcodeReader.h"
#include "llvm/Object/IRSymtab.h"
#include "llvm/Object/ModuleSymbolTable.h"
#include "llvm/Object/SymbolicFile.h"
namespace llvm {
class Module;
namespace object {
class ObjectFile;
class IRObjectFile : public SymbolicFile {
std::vector<std::unique_ptr<Module>> Mods;
ModuleSymbolTable SymTab;
IRObjectFile(MemoryBufferRef Object,
std::vector<std::unique_ptr<Module>> Mods);
public:
~IRObjectFile() override;
void moveSymbolNext(DataRefImpl &Symb) const override;
Error printSymbolName(raw_ostream &OS, DataRefImpl Symb) const override;
Expected<uint32_t> getSymbolFlags(DataRefImpl Symb) const override;
basic_symbol_iterator symbol_begin() const override;
basic_symbol_iterator symbol_end() const override;
bool is64Bit() const override {
return Triple(getTargetTriple()).isArch64Bit();
}
StringRef getTargetTriple() const;
static bool classof(const Binary *v) {
return v->isIR();
}
using module_iterator =
pointee_iterator<std::vector<std::unique_ptr<Module>>::const_iterator,
const Module>;
module_iterator module_begin() const { return module_iterator(Mods.begin()); }
module_iterator module_end() const { return module_iterator(Mods.end()); }
iterator_range<module_iterator> modules() const {
return make_range(module_begin(), module_end());
}
/// Finds and returns bitcode embedded in the given object file, or an
/// error code if not found.
static Expected<MemoryBufferRef> findBitcodeInObject(const ObjectFile &Obj);
/// Finds and returns bitcode in the given memory buffer (which may
/// be either a bitcode file or a native object file with embedded bitcode),
/// or an error code if not found.
static Expected<MemoryBufferRef>
findBitcodeInMemBuffer(MemoryBufferRef Object);
static Expected<std::unique_ptr<IRObjectFile>> create(MemoryBufferRef Object,
LLVMContext &Context);
};
/// The contents of a bitcode file and its irsymtab. Any underlying data
/// for the irsymtab are owned by Symtab and Strtab.
struct IRSymtabFile {
std::vector<BitcodeModule> Mods;
SmallVector<char, 0> Symtab, Strtab;
irsymtab::Reader TheReader;
};
/// Reads a bitcode file, creating its irsymtab if necessary.
Expected<IRSymtabFile> readIRSymtab(MemoryBufferRef MBRef);
}
} // namespace llvm
#endif
PK hwFZZ��2�T �T Object/ObjectFile.hnu �[��� //===- ObjectFile.h - File format independent object file -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares a file format independent ObjectFile class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_OBJECTFILE_H
#define LLVM_OBJECT_OBJECTFILE_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/Hashing.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/BinaryFormat/Magic.h"
#include "llvm/BinaryFormat/Swift.h"
#include "llvm/Object/Binary.h"
#include "llvm/Object/Error.h"
#include "llvm/Object/SymbolicFile.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MemoryBufferRef.h"
#include "llvm/TargetParser/Triple.h"
#include <cassert>
#include <cstdint>
#include <memory>
namespace llvm {
class SubtargetFeatures;
namespace object {
class COFFObjectFile;
class MachOObjectFile;
class ObjectFile;
class SectionRef;
class SymbolRef;
class symbol_iterator;
class WasmObjectFile;
using section_iterator = content_iterator<SectionRef>;
typedef std::function<bool(const SectionRef &)> SectionFilterPredicate;
/// This is a value type class that represents a single relocation in the list
/// of relocations in the object file.
class RelocationRef {
DataRefImpl RelocationPimpl;
const ObjectFile *OwningObject = nullptr;
public:
RelocationRef() = default;
RelocationRef(DataRefImpl RelocationP, const ObjectFile *Owner);
bool operator==(const RelocationRef &Other) const;
void moveNext();
uint64_t getOffset() const;
symbol_iterator getSymbol() const;
uint64_t getType() const;
/// Get a string that represents the type of this relocation.
///
/// This is for display purposes only.
void getTypeName(SmallVectorImpl<char> &Result) const;
DataRefImpl getRawDataRefImpl() const;
const ObjectFile *getObject() const;
};
using relocation_iterator = content_iterator<RelocationRef>;
/// This is a value type class that represents a single section in the list of
/// sections in the object file.
class SectionRef {
friend class SymbolRef;
DataRefImpl SectionPimpl;
const ObjectFile *OwningObject = nullptr;
public:
SectionRef() = default;
SectionRef(DataRefImpl SectionP, const ObjectFile *Owner);
bool operator==(const SectionRef &Other) const;
bool operator!=(const SectionRef &Other) const;
bool operator<(const SectionRef &Other) const;
void moveNext();
Expected<StringRef> getName() const;
uint64_t getAddress() const;
uint64_t getIndex() const;
uint64_t getSize() const;
Expected<StringRef> getContents() const;
/// Get the alignment of this section.
Align getAlignment() const;
bool isCompressed() const;
/// Whether this section contains instructions.
bool isText() const;
/// Whether this section contains data, not instructions.
bool isData() const;
/// Whether this section contains BSS uninitialized data.
bool isBSS() const;
bool isVirtual() const;
bool isBitcode() const;
bool isStripped() const;
/// Whether this section will be placed in the text segment, according to the
/// Berkeley size format. This is true if the section is allocatable, and
/// contains either code or readonly data.
bool isBerkeleyText() const;
/// Whether this section will be placed in the data segment, according to the
/// Berkeley size format. This is true if the section is allocatable and
/// contains data (e.g. PROGBITS), but is not text.
bool isBerkeleyData() const;
/// Whether this section is a debug section.
bool isDebugSection() const;
bool containsSymbol(SymbolRef S) const;
relocation_iterator relocation_begin() const;
relocation_iterator relocation_end() const;
iterator_range<relocation_iterator> relocations() const {
return make_range(relocation_begin(), relocation_end());
}
/// Returns the related section if this section contains relocations. The
/// returned section may or may not have applied its relocations.
Expected<section_iterator> getRelocatedSection() const;
DataRefImpl getRawDataRefImpl() const;
const ObjectFile *getObject() const;
};
struct SectionedAddress {
const static uint64_t UndefSection = UINT64_MAX;
uint64_t Address = 0;
uint64_t SectionIndex = UndefSection;
};
inline bool operator<(const SectionedAddress &LHS,
const SectionedAddress &RHS) {
return std::tie(LHS.SectionIndex, LHS.Address) <
std::tie(RHS.SectionIndex, RHS.Address);
}
inline bool operator==(const SectionedAddress &LHS,
const SectionedAddress &RHS) {
return std::tie(LHS.SectionIndex, LHS.Address) ==
std::tie(RHS.SectionIndex, RHS.Address);
}
raw_ostream &operator<<(raw_ostream &OS, const SectionedAddress &Addr);
/// This is a value type class that represents a single symbol in the list of
/// symbols in the object file.
class SymbolRef : public BasicSymbolRef {
friend class SectionRef;
public:
enum Type {
ST_Unknown, // Type not specified
ST_Other,
ST_Data,
ST_Debug,
ST_File,
ST_Function,
};
SymbolRef() = default;
SymbolRef(DataRefImpl SymbolP, const ObjectFile *Owner);
SymbolRef(const BasicSymbolRef &B) : BasicSymbolRef(B) {
assert(isa<ObjectFile>(BasicSymbolRef::getObject()));
}
Expected<StringRef> getName() const;
/// Returns the symbol virtual address (i.e. address at which it will be
/// mapped).
Expected<uint64_t> getAddress() const;
/// Return the value of the symbol depending on the object this can be an
/// offset or a virtual address.
Expected<uint64_t> getValue() const;
/// Get the alignment of this symbol as the actual value (not log 2).
uint32_t getAlignment() const;
uint64_t getCommonSize() const;
Expected<SymbolRef::Type> getType() const;
/// Get section this symbol is defined in reference to. Result is
/// end_sections() if it is undefined or is an absolute symbol.
Expected<section_iterator> getSection() const;
const ObjectFile *getObject() const;
};
class symbol_iterator : public basic_symbol_iterator {
public:
symbol_iterator(SymbolRef Sym) : basic_symbol_iterator(Sym) {}
symbol_iterator(const basic_symbol_iterator &B)
: basic_symbol_iterator(SymbolRef(B->getRawDataRefImpl(),
cast<ObjectFile>(B->getObject()))) {}
const SymbolRef *operator->() const {
const BasicSymbolRef &P = basic_symbol_iterator::operator *();
return static_cast<const SymbolRef*>(&P);
}
const SymbolRef &operator*() const {
const BasicSymbolRef &P = basic_symbol_iterator::operator *();
return static_cast<const SymbolRef&>(P);
}
};
/// This class is the base class for all object file types. Concrete instances
/// of this object are created by createObjectFile, which figures out which type
/// to create.
class ObjectFile : public SymbolicFile {
virtual void anchor();
protected:
ObjectFile(unsigned int Type, MemoryBufferRef Source);
const uint8_t *base() const {
return reinterpret_cast<const uint8_t *>(Data.getBufferStart());
}
// These functions are for SymbolRef to call internally. The main goal of
// this is to allow SymbolRef::SymbolPimpl to point directly to the symbol
// entry in the memory mapped object file. SymbolPimpl cannot contain any
// virtual functions because then it could not point into the memory mapped
// file.
//
// Implementations assume that the DataRefImpl is valid and has not been
// modified externally. It's UB otherwise.
friend class SymbolRef;
virtual Expected<StringRef> getSymbolName(DataRefImpl Symb) const = 0;
Error printSymbolName(raw_ostream &OS,
DataRefImpl Symb) const override;
virtual Expected<uint64_t> getSymbolAddress(DataRefImpl Symb) const = 0;
virtual uint64_t getSymbolValueImpl(DataRefImpl Symb) const = 0;
virtual uint32_t getSymbolAlignment(DataRefImpl Symb) const;
virtual uint64_t getCommonSymbolSizeImpl(DataRefImpl Symb) const = 0;
virtual Expected<SymbolRef::Type> getSymbolType(DataRefImpl Symb) const = 0;
virtual Expected<section_iterator>
getSymbolSection(DataRefImpl Symb) const = 0;
// Same as above for SectionRef.
friend class SectionRef;
virtual void moveSectionNext(DataRefImpl &Sec) const = 0;
virtual Expected<StringRef> getSectionName(DataRefImpl Sec) const = 0;
virtual uint64_t getSectionAddress(DataRefImpl Sec) const = 0;
virtual uint64_t getSectionIndex(DataRefImpl Sec) const = 0;
virtual uint64_t getSectionSize(DataRefImpl Sec) const = 0;
virtual Expected<ArrayRef<uint8_t>>
getSectionContents(DataRefImpl Sec) const = 0;
virtual uint64_t getSectionAlignment(DataRefImpl Sec) const = 0;
virtual bool isSectionCompressed(DataRefImpl Sec) const = 0;
virtual bool isSectionText(DataRefImpl Sec) const = 0;
virtual bool isSectionData(DataRefImpl Sec) const = 0;
virtual bool isSectionBSS(DataRefImpl Sec) const = 0;
// A section is 'virtual' if its contents aren't present in the object image.
virtual bool isSectionVirtual(DataRefImpl Sec) const = 0;
virtual bool isSectionBitcode(DataRefImpl Sec) const;
virtual bool isSectionStripped(DataRefImpl Sec) const;
virtual bool isBerkeleyText(DataRefImpl Sec) const;
virtual bool isBerkeleyData(DataRefImpl Sec) const;
virtual bool isDebugSection(DataRefImpl Sec) const;
virtual relocation_iterator section_rel_begin(DataRefImpl Sec) const = 0;
virtual relocation_iterator section_rel_end(DataRefImpl Sec) const = 0;
virtual Expected<section_iterator> getRelocatedSection(DataRefImpl Sec) const;
// Same as above for RelocationRef.
friend class RelocationRef;
virtual void moveRelocationNext(DataRefImpl &Rel) const = 0;
virtual uint64_t getRelocationOffset(DataRefImpl Rel) const = 0;
virtual symbol_iterator getRelocationSymbol(DataRefImpl Rel) const = 0;
virtual uint64_t getRelocationType(DataRefImpl Rel) const = 0;
virtual void getRelocationTypeName(DataRefImpl Rel,
SmallVectorImpl<char> &Result) const = 0;
virtual llvm::binaryformat::Swift5ReflectionSectionKind
mapReflectionSectionNameToEnumValue(StringRef SectionName) const {
return llvm::binaryformat::Swift5ReflectionSectionKind::unknown;
};
Expected<uint64_t> getSymbolValue(DataRefImpl Symb) const;
public:
ObjectFile() = delete;
ObjectFile(const ObjectFile &other) = delete;
uint64_t getCommonSymbolSize(DataRefImpl Symb) const {
Expected<uint32_t> SymbolFlagsOrErr = getSymbolFlags(Symb);
if (!SymbolFlagsOrErr)
// TODO: Actually report errors helpfully.
report_fatal_error(SymbolFlagsOrErr.takeError());
assert(*SymbolFlagsOrErr & SymbolRef::SF_Common);
return getCommonSymbolSizeImpl(Symb);
}
virtual std::vector<SectionRef> dynamic_relocation_sections() const {
return std::vector<SectionRef>();
}
using symbol_iterator_range = iterator_range<symbol_iterator>;
symbol_iterator_range symbols() const {
return symbol_iterator_range(symbol_begin(), symbol_end());
}
virtual section_iterator section_begin() const = 0;
virtual section_iterator section_end() const = 0;
using section_iterator_range = iterator_range<section_iterator>;
section_iterator_range sections() const {
return section_iterator_range(section_begin(), section_end());
}
virtual bool hasDebugInfo() const;
/// The number of bytes used to represent an address in this object
/// file format.
virtual uint8_t getBytesInAddress() const = 0;
virtual StringRef getFileFormatName() const = 0;
virtual Triple::ArchType getArch() const = 0;
virtual Expected<SubtargetFeatures> getFeatures() const = 0;
virtual std::optional<StringRef> tryGetCPUName() const {
return std::nullopt;
};
virtual void setARMSubArch(Triple &TheTriple) const { }
virtual Expected<uint64_t> getStartAddress() const {
return errorCodeToError(object_error::parse_failed);
};
/// Create a triple from the data in this object file.
Triple makeTriple() const;
/// Maps a debug section name to a standard DWARF section name.
virtual StringRef mapDebugSectionName(StringRef Name) const { return Name; }
/// True if this is a relocatable object (.o/.obj).
virtual bool isRelocatableObject() const = 0;
/// True if the reflection section can be stripped by the linker.
bool isReflectionSectionStrippable(
llvm::binaryformat::Swift5ReflectionSectionKind ReflectionSectionKind)
const;
/// @returns Pointer to ObjectFile subclass to handle this type of object.
/// @param ObjectPath The path to the object file. ObjectPath.isObject must
/// return true.
/// Create ObjectFile from path.
static Expected<OwningBinary<ObjectFile>>
createObjectFile(StringRef ObjectPath);
static Expected<std::unique_ptr<ObjectFile>>
createObjectFile(MemoryBufferRef Object, llvm::file_magic Type,
bool InitContent = true);
static Expected<std::unique_ptr<ObjectFile>>
createObjectFile(MemoryBufferRef Object) {
return createObjectFile(Object, llvm::file_magic::unknown);
}
static bool classof(const Binary *v) {
return v->isObject();
}
static Expected<std::unique_ptr<COFFObjectFile>>
createCOFFObjectFile(MemoryBufferRef Object);
static Expected<std::unique_ptr<ObjectFile>>
createXCOFFObjectFile(MemoryBufferRef Object, unsigned FileType);
static Expected<std::unique_ptr<ObjectFile>>
createELFObjectFile(MemoryBufferRef Object, bool InitContent = true);
static Expected<std::unique_ptr<MachOObjectFile>>
createMachOObjectFile(MemoryBufferRef Object,
uint32_t UniversalCputype = 0,
uint32_t UniversalIndex = 0);
static Expected<std::unique_ptr<ObjectFile>>
createGOFFObjectFile(MemoryBufferRef Object);
static Expected<std::unique_ptr<WasmObjectFile>>
createWasmObjectFile(MemoryBufferRef Object);
};
/// A filtered iterator for SectionRefs that skips sections based on some given
/// predicate.
class SectionFilterIterator {
public:
SectionFilterIterator(SectionFilterPredicate Pred,
const section_iterator &Begin,
const section_iterator &End)
: Predicate(std::move(Pred)), Iterator(Begin), End(End) {
scanPredicate();
}
const SectionRef &operator*() const { return *Iterator; }
SectionFilterIterator &operator++() {
++Iterator;
scanPredicate();
return *this;
}
bool operator!=(const SectionFilterIterator &Other) const {
return Iterator != Other.Iterator;
}
private:
void scanPredicate() {
while (Iterator != End && !Predicate(*Iterator)) {
++Iterator;
}
}
SectionFilterPredicate Predicate;
section_iterator Iterator;
section_iterator End;
};
/// Creates an iterator range of SectionFilterIterators for a given Object and
/// predicate.
class SectionFilter {
public:
SectionFilter(SectionFilterPredicate Pred, const ObjectFile &Obj)
: Predicate(std::move(Pred)), Object(Obj) {}
SectionFilterIterator begin() {
return SectionFilterIterator(Predicate, Object.section_begin(),
Object.section_end());
}
SectionFilterIterator end() {
return SectionFilterIterator(Predicate, Object.section_end(),
Object.section_end());
}
private:
SectionFilterPredicate Predicate;
const ObjectFile &Object;
};
// Inline function definitions.
inline SymbolRef::SymbolRef(DataRefImpl SymbolP, const ObjectFile *Owner)
: BasicSymbolRef(SymbolP, Owner) {}
inline Expected<StringRef> SymbolRef::getName() const {
return getObject()->getSymbolName(getRawDataRefImpl());
}
inline Expected<uint64_t> SymbolRef::getAddress() const {
return getObject()->getSymbolAddress(getRawDataRefImpl());
}
inline Expected<uint64_t> SymbolRef::getValue() const {
return getObject()->getSymbolValue(getRawDataRefImpl());
}
inline uint32_t SymbolRef::getAlignment() const {
return getObject()->getSymbolAlignment(getRawDataRefImpl());
}
inline uint64_t SymbolRef::getCommonSize() const {
return getObject()->getCommonSymbolSize(getRawDataRefImpl());
}
inline Expected<section_iterator> SymbolRef::getSection() const {
return getObject()->getSymbolSection(getRawDataRefImpl());
}
inline Expected<SymbolRef::Type> SymbolRef::getType() const {
return getObject()->getSymbolType(getRawDataRefImpl());
}
inline const ObjectFile *SymbolRef::getObject() const {
const SymbolicFile *O = BasicSymbolRef::getObject();
return cast<ObjectFile>(O);
}
/// SectionRef
inline SectionRef::SectionRef(DataRefImpl SectionP,
const ObjectFile *Owner)
: SectionPimpl(SectionP)
, OwningObject(Owner) {}
inline bool SectionRef::operator==(const SectionRef &Other) const {
return OwningObject == Other.OwningObject &&
SectionPimpl == Other.SectionPimpl;
}
inline bool SectionRef::operator!=(const SectionRef &Other) const {
return !(*this == Other);
}
inline bool SectionRef::operator<(const SectionRef &Other) const {
assert(OwningObject == Other.OwningObject);
return SectionPimpl < Other.SectionPimpl;
}
inline void SectionRef::moveNext() {
return OwningObject->moveSectionNext(SectionPimpl);
}
inline Expected<StringRef> SectionRef::getName() const {
return OwningObject->getSectionName(SectionPimpl);
}
inline uint64_t SectionRef::getAddress() const {
return OwningObject->getSectionAddress(SectionPimpl);
}
inline uint64_t SectionRef::getIndex() const {
return OwningObject->getSectionIndex(SectionPimpl);
}
inline uint64_t SectionRef::getSize() const {
return OwningObject->getSectionSize(SectionPimpl);
}
inline Expected<StringRef> SectionRef::getContents() const {
Expected<ArrayRef<uint8_t>> Res =
OwningObject->getSectionContents(SectionPimpl);
if (!Res)
return Res.takeError();
return StringRef(reinterpret_cast<const char *>(Res->data()), Res->size());
}
inline Align SectionRef::getAlignment() const {
return MaybeAlign(OwningObject->getSectionAlignment(SectionPimpl))
.valueOrOne();
}
inline bool SectionRef::isCompressed() const {
return OwningObject->isSectionCompressed(SectionPimpl);
}
inline bool SectionRef::isText() const {
return OwningObject->isSectionText(SectionPimpl);
}
inline bool SectionRef::isData() const {
return OwningObject->isSectionData(SectionPimpl);
}
inline bool SectionRef::isBSS() const {
return OwningObject->isSectionBSS(SectionPimpl);
}
inline bool SectionRef::isVirtual() const {
return OwningObject->isSectionVirtual(SectionPimpl);
}
inline bool SectionRef::isBitcode() const {
return OwningObject->isSectionBitcode(SectionPimpl);
}
inline bool SectionRef::isStripped() const {
return OwningObject->isSectionStripped(SectionPimpl);
}
inline bool SectionRef::isBerkeleyText() const {
return OwningObject->isBerkeleyText(SectionPimpl);
}
inline bool SectionRef::isBerkeleyData() const {
return OwningObject->isBerkeleyData(SectionPimpl);
}
inline bool SectionRef::isDebugSection() const {
return OwningObject->isDebugSection(SectionPimpl);
}
inline relocation_iterator SectionRef::relocation_begin() const {
return OwningObject->section_rel_begin(SectionPimpl);
}
inline relocation_iterator SectionRef::relocation_end() const {
return OwningObject->section_rel_end(SectionPimpl);
}
inline Expected<section_iterator> SectionRef::getRelocatedSection() const {
return OwningObject->getRelocatedSection(SectionPimpl);
}
inline DataRefImpl SectionRef::getRawDataRefImpl() const {
return SectionPimpl;
}
inline const ObjectFile *SectionRef::getObject() const {
return OwningObject;
}
/// RelocationRef
inline RelocationRef::RelocationRef(DataRefImpl RelocationP,
const ObjectFile *Owner)
: RelocationPimpl(RelocationP)
, OwningObject(Owner) {}
inline bool RelocationRef::operator==(const RelocationRef &Other) const {
return RelocationPimpl == Other.RelocationPimpl;
}
inline void RelocationRef::moveNext() {
return OwningObject->moveRelocationNext(RelocationPimpl);
}
inline uint64_t RelocationRef::getOffset() const {
return OwningObject->getRelocationOffset(RelocationPimpl);
}
inline symbol_iterator RelocationRef::getSymbol() const {
return OwningObject->getRelocationSymbol(RelocationPimpl);
}
inline uint64_t RelocationRef::getType() const {
return OwningObject->getRelocationType(RelocationPimpl);
}
inline void RelocationRef::getTypeName(SmallVectorImpl<char> &Result) const {
return OwningObject->getRelocationTypeName(RelocationPimpl, Result);
}
inline DataRefImpl RelocationRef::getRawDataRefImpl() const {
return RelocationPimpl;
}
inline const ObjectFile *RelocationRef::getObject() const {
return OwningObject;
}
} // end namespace object
template <> struct DenseMapInfo<object::SectionRef> {
static bool isEqual(const object::SectionRef &A,
const object::SectionRef &B) {
return A == B;
}
static object::SectionRef getEmptyKey() {
return object::SectionRef({}, nullptr);
}
static object::SectionRef getTombstoneKey() {
object::DataRefImpl TS;
TS.p = (uintptr_t)-1;
return object::SectionRef(TS, nullptr);
}
static unsigned getHashValue(const object::SectionRef &Sec) {
object::DataRefImpl Raw = Sec.getRawDataRefImpl();
return hash_combine(Raw.p, Raw.d.a, Raw.d.b);
}
};
} // end namespace llvm
#endif // LLVM_OBJECT_OBJECTFILE_H
PK hwFZv�5u>. >. Object/IRSymtab.hnu �[��� //===- IRSymtab.h - data definitions for IR symbol tables -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains data definitions and a reader and builder for a symbol
// table for LLVM IR. Its purpose is to allow linkers and other consumers of
// bitcode files to efficiently read the symbol table for symbol resolution
// purposes without needing to construct a module in memory.
//
// As with most object files the symbol table has two parts: the symbol table
// itself and a string table which is referenced by the symbol table.
//
// A symbol table corresponds to a single bitcode file, which may consist of
// multiple modules, so symbol tables may likewise contain symbols for multiple
// modules.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_IRSYMTAB_H
#define LLVM_OBJECT_IRSYMTAB_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/IR/Comdat.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/Object/SymbolicFile.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <cassert>
#include <cstdint>
#include <vector>
namespace llvm {
struct BitcodeFileContents;
class StringTableBuilder;
namespace irsymtab {
namespace storage {
// The data structures in this namespace define the low-level serialization
// format. Clients that just want to read a symbol table should use the
// irsymtab::Reader class.
using Word = support::ulittle32_t;
/// A reference to a string in the string table.
struct Str {
Word Offset, Size;
StringRef get(StringRef Strtab) const {
return {Strtab.data() + Offset, Size};
}
};
/// A reference to a range of objects in the symbol table.
template <typename T> struct Range {
Word Offset, Size;
ArrayRef<T> get(StringRef Symtab) const {
return {reinterpret_cast<const T *>(Symtab.data() + Offset), Size};
}
};
/// Describes the range of a particular module's symbols within the symbol
/// table.
struct Module {
Word Begin, End;
/// The index of the first Uncommon for this Module.
Word UncBegin;
};
/// This is equivalent to an IR comdat.
struct Comdat {
Str Name;
// llvm::Comdat::SelectionKind
Word SelectionKind;
};
/// Contains the information needed by linkers for symbol resolution, as well as
/// by the LTO implementation itself.
struct Symbol {
/// The mangled symbol name.
Str Name;
/// The unmangled symbol name, or the empty string if this is not an IR
/// symbol.
Str IRName;
/// The index into Header::Comdats, or -1 if not a comdat member.
Word ComdatIndex;
Word Flags;
enum FlagBits {
FB_visibility, // 2 bits
FB_has_uncommon = FB_visibility + 2,
FB_undefined,
FB_weak,
FB_common,
FB_indirect,
FB_used,
FB_tls,
FB_may_omit,
FB_global,
FB_format_specific,
FB_unnamed_addr,
FB_executable,
};
};
/// This data structure contains rarely used symbol fields and is optionally
/// referenced by a Symbol.
struct Uncommon {
Word CommonSize, CommonAlign;
/// COFF-specific: the name of the symbol that a weak external resolves to
/// if not defined.
Str COFFWeakExternFallbackName;
/// Specified section name, if any.
Str SectionName;
};
struct Header {
/// Version number of the symtab format. This number should be incremented
/// when the format changes, but it does not need to be incremented if a
/// change to LLVM would cause it to create a different symbol table.
Word Version;
enum { kCurrentVersion = 3 };
/// The producer's version string (LLVM_VERSION_STRING " " LLVM_REVISION).
/// Consumers should rebuild the symbol table from IR if the producer's
/// version does not match the consumer's version due to potential differences
/// in symbol table format, symbol enumeration order and so on.
Str Producer;
Range<Module> Modules;
Range<Comdat> Comdats;
Range<Symbol> Symbols;
Range<Uncommon> Uncommons;
Str TargetTriple, SourceFileName;
/// COFF-specific: linker directives.
Str COFFLinkerOpts;
/// Dependent Library Specifiers
Range<Str> DependentLibraries;
};
} // end namespace storage
/// Fills in Symtab and StrtabBuilder with a valid symbol and string table for
/// Mods.
Error build(ArrayRef<Module *> Mods, SmallVector<char, 0> &Symtab,
StringTableBuilder &StrtabBuilder, BumpPtrAllocator &Alloc);
/// This represents a symbol that has been read from a storage::Symbol and
/// possibly a storage::Uncommon.
struct Symbol {
// Copied from storage::Symbol.
StringRef Name, IRName;
int ComdatIndex;
uint32_t Flags;
// Copied from storage::Uncommon.
uint32_t CommonSize, CommonAlign;
StringRef COFFWeakExternFallbackName;
StringRef SectionName;
/// Returns the mangled symbol name.
StringRef getName() const { return Name; }
/// Returns the unmangled symbol name, or the empty string if this is not an
/// IR symbol.
StringRef getIRName() const { return IRName; }
/// Returns the index into the comdat table (see Reader::getComdatTable()), or
/// -1 if not a comdat member.
int getComdatIndex() const { return ComdatIndex; }
using S = storage::Symbol;
GlobalValue::VisibilityTypes getVisibility() const {
return GlobalValue::VisibilityTypes((Flags >> S::FB_visibility) & 3);
}
bool isUndefined() const { return (Flags >> S::FB_undefined) & 1; }
bool isWeak() const { return (Flags >> S::FB_weak) & 1; }
bool isCommon() const { return (Flags >> S::FB_common) & 1; }
bool isIndirect() const { return (Flags >> S::FB_indirect) & 1; }
bool isUsed() const { return (Flags >> S::FB_used) & 1; }
bool isTLS() const { return (Flags >> S::FB_tls) & 1; }
bool canBeOmittedFromSymbolTable() const {
return (Flags >> S::FB_may_omit) & 1;
}
bool isGlobal() const { return (Flags >> S::FB_global) & 1; }
bool isFormatSpecific() const { return (Flags >> S::FB_format_specific) & 1; }
bool isUnnamedAddr() const { return (Flags >> S::FB_unnamed_addr) & 1; }
bool isExecutable() const { return (Flags >> S::FB_executable) & 1; }
uint64_t getCommonSize() const {
assert(isCommon());
return CommonSize;
}
uint32_t getCommonAlignment() const {
assert(isCommon());
return CommonAlign;
}
/// COFF-specific: for weak externals, returns the name of the symbol that is
/// used as a fallback if the weak external remains undefined.
StringRef getCOFFWeakExternalFallback() const {
assert(isWeak() && isIndirect());
return COFFWeakExternFallbackName;
}
StringRef getSectionName() const { return SectionName; }
};
/// This class can be used to read a Symtab and Strtab produced by
/// irsymtab::build.
class Reader {
StringRef Symtab, Strtab;
ArrayRef<storage::Module> Modules;
ArrayRef<storage::Comdat> Comdats;
ArrayRef<storage::Symbol> Symbols;
ArrayRef<storage::Uncommon> Uncommons;
ArrayRef<storage::Str> DependentLibraries;
StringRef str(storage::Str S) const { return S.get(Strtab); }
template <typename T> ArrayRef<T> range(storage::Range<T> R) const {
return R.get(Symtab);
}
const storage::Header &header() const {
return *reinterpret_cast<const storage::Header *>(Symtab.data());
}
public:
class SymbolRef;
Reader() = default;
Reader(StringRef Symtab, StringRef Strtab) : Symtab(Symtab), Strtab(Strtab) {
Modules = range(header().Modules);
Comdats = range(header().Comdats);
Symbols = range(header().Symbols);
Uncommons = range(header().Uncommons);
DependentLibraries = range(header().DependentLibraries);
}
using symbol_range = iterator_range<object::content_iterator<SymbolRef>>;
/// Returns the symbol table for the entire bitcode file.
/// The symbols enumerated by this method are ephemeral, but they can be
/// copied into an irsymtab::Symbol object.
symbol_range symbols() const;
size_t getNumModules() const { return Modules.size(); }
/// Returns a slice of the symbol table for the I'th module in the file.
/// The symbols enumerated by this method are ephemeral, but they can be
/// copied into an irsymtab::Symbol object.
symbol_range module_symbols(unsigned I) const;
StringRef getTargetTriple() const { return str(header().TargetTriple); }
/// Returns the source file path specified at compile time.
StringRef getSourceFileName() const { return str(header().SourceFileName); }
/// Returns a table with all the comdats used by this file.
std::vector<std::pair<StringRef, llvm::Comdat::SelectionKind>>
getComdatTable() const {
std::vector<std::pair<StringRef, llvm::Comdat::SelectionKind>> ComdatTable;
ComdatTable.reserve(Comdats.size());
for (auto C : Comdats)
ComdatTable.push_back({str(C.Name), llvm::Comdat::SelectionKind(
uint32_t(C.SelectionKind))});
return ComdatTable;
}
/// COFF-specific: returns linker options specified in the input file.
StringRef getCOFFLinkerOpts() const { return str(header().COFFLinkerOpts); }
/// Returns dependent library specifiers
std::vector<StringRef> getDependentLibraries() const {
std::vector<StringRef> Specifiers;
Specifiers.reserve(DependentLibraries.size());
for (auto S : DependentLibraries) {
Specifiers.push_back(str(S));
}
return Specifiers;
}
};
/// Ephemeral symbols produced by Reader::symbols() and
/// Reader::module_symbols().
class Reader::SymbolRef : public Symbol {
const storage::Symbol *SymI, *SymE;
const storage::Uncommon *UncI;
const Reader *R;
void read() {
if (SymI == SymE)
return;
Name = R->str(SymI->Name);
IRName = R->str(SymI->IRName);
ComdatIndex = SymI->ComdatIndex;
Flags = SymI->Flags;
if (Flags & (1 << storage::Symbol::FB_has_uncommon)) {
CommonSize = UncI->CommonSize;
CommonAlign = UncI->CommonAlign;
COFFWeakExternFallbackName = R->str(UncI->COFFWeakExternFallbackName);
SectionName = R->str(UncI->SectionName);
} else
// Reset this field so it can be queried unconditionally for all symbols.
SectionName = "";
}
public:
SymbolRef(const storage::Symbol *SymI, const storage::Symbol *SymE,
const storage::Uncommon *UncI, const Reader *R)
: SymI(SymI), SymE(SymE), UncI(UncI), R(R) {
read();
}
void moveNext() {
++SymI;
if (Flags & (1 << storage::Symbol::FB_has_uncommon))
++UncI;
read();
}
bool operator==(const SymbolRef &Other) const { return SymI == Other.SymI; }
};
inline Reader::symbol_range Reader::symbols() const {
return {SymbolRef(Symbols.begin(), Symbols.end(), Uncommons.begin(), this),
SymbolRef(Symbols.end(), Symbols.end(), nullptr, this)};
}
inline Reader::symbol_range Reader::module_symbols(unsigned I) const {
const storage::Module &M = Modules[I];
const storage::Symbol *MBegin = Symbols.begin() + M.Begin,
*MEnd = Symbols.begin() + M.End;
return {SymbolRef(MBegin, MEnd, Uncommons.begin() + M.UncBegin, this),
SymbolRef(MEnd, MEnd, nullptr, this)};
}
/// The contents of the irsymtab in a bitcode file. Any underlying data for the
/// irsymtab are owned by Symtab and Strtab.
struct FileContents {
SmallVector<char, 0> Symtab, Strtab;
Reader TheReader;
};
/// Reads the contents of a bitcode file, creating its irsymtab if necessary.
Expected<FileContents> readBitcode(const BitcodeFileContents &BFC);
} // end namespace irsymtab
} // end namespace llvm
#endif // LLVM_OBJECT_IRSYMTAB_H
PK hwFZ?����5 �5
Object/Wasm.hnu �[��� //===- Wasm.h - Wasm object file implementation -----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the WasmObjectFile class, which implements the ObjectFile
// interface for Wasm files.
//
// See: https://github.com/WebAssembly/design/blob/main/BinaryEncoding.md
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_WASM_H
#define LLVM_OBJECT_WASM_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/BinaryFormat/Wasm.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/MC/MCSymbolWasm.h"
#include "llvm/Object/Binary.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MemoryBuffer.h"
#include <cstddef>
#include <cstdint>
#include <vector>
namespace llvm {
namespace object {
class WasmSymbol {
public:
WasmSymbol(const wasm::WasmSymbolInfo &Info,
const wasm::WasmGlobalType *GlobalType,
const wasm::WasmTableType *TableType,
const wasm::WasmSignature *Signature)
: Info(Info), GlobalType(GlobalType), TableType(TableType),
Signature(Signature) {}
const wasm::WasmSymbolInfo &Info;
const wasm::WasmGlobalType *GlobalType;
const wasm::WasmTableType *TableType;
const wasm::WasmSignature *Signature;
bool isTypeFunction() const {
return Info.Kind == wasm::WASM_SYMBOL_TYPE_FUNCTION;
}
bool isTypeTable() const { return Info.Kind == wasm::WASM_SYMBOL_TYPE_TABLE; }
bool isTypeData() const { return Info.Kind == wasm::WASM_SYMBOL_TYPE_DATA; }
bool isTypeGlobal() const {
return Info.Kind == wasm::WASM_SYMBOL_TYPE_GLOBAL;
}
bool isTypeSection() const {
return Info.Kind == wasm::WASM_SYMBOL_TYPE_SECTION;
}
bool isTypeTag() const { return Info.Kind == wasm::WASM_SYMBOL_TYPE_TAG; }
bool isDefined() const { return !isUndefined(); }
bool isUndefined() const {
return (Info.Flags & wasm::WASM_SYMBOL_UNDEFINED) != 0;
}
bool isBindingWeak() const {
return getBinding() == wasm::WASM_SYMBOL_BINDING_WEAK;
}
bool isBindingGlobal() const {
return getBinding() == wasm::WASM_SYMBOL_BINDING_GLOBAL;
}
bool isBindingLocal() const {
return getBinding() == wasm::WASM_SYMBOL_BINDING_LOCAL;
}
unsigned getBinding() const {
return Info.Flags & wasm::WASM_SYMBOL_BINDING_MASK;
}
bool isHidden() const {
return getVisibility() == wasm::WASM_SYMBOL_VISIBILITY_HIDDEN;
}
unsigned getVisibility() const {
return Info.Flags & wasm::WASM_SYMBOL_VISIBILITY_MASK;
}
void print(raw_ostream &Out) const;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD void dump() const;
#endif
};
struct WasmSection {
WasmSection() = default;
uint32_t Type = 0;
uint32_t Offset = 0; // Offset within the file
StringRef Name; // Section name (User-defined sections only)
uint32_t Comdat = UINT32_MAX; // From the "comdat info" section
ArrayRef<uint8_t> Content;
std::vector<wasm::WasmRelocation> Relocations;
// Length of the LEB encoding of the section header's size field
std::optional<uint8_t> HeaderSecSizeEncodingLen;
};
struct WasmSegment {
uint32_t SectionOffset;
wasm::WasmDataSegment Data;
};
class WasmObjectFile : public ObjectFile {
public:
WasmObjectFile(MemoryBufferRef Object, Error &Err);
const wasm::WasmObjectHeader &getHeader() const;
const WasmSymbol &getWasmSymbol(const DataRefImpl &Symb) const;
const WasmSymbol &getWasmSymbol(const SymbolRef &Symbol) const;
const WasmSection &getWasmSection(const SectionRef &Section) const;
const wasm::WasmRelocation &getWasmRelocation(const RelocationRef &Ref) const;
static bool classof(const Binary *v) { return v->isWasm(); }
const wasm::WasmDylinkInfo &dylinkInfo() const { return DylinkInfo; }
const wasm::WasmProducerInfo &getProducerInfo() const { return ProducerInfo; }
ArrayRef<wasm::WasmFeatureEntry> getTargetFeatures() const {
return TargetFeatures;
}
ArrayRef<wasm::WasmSignature> types() const { return Signatures; }
ArrayRef<wasm::WasmImport> imports() const { return Imports; }
ArrayRef<wasm::WasmTable> tables() const { return Tables; }
ArrayRef<wasm::WasmLimits> memories() const { return Memories; }
ArrayRef<wasm::WasmGlobal> globals() const { return Globals; }
ArrayRef<wasm::WasmTag> tags() const { return Tags; }
ArrayRef<wasm::WasmExport> exports() const { return Exports; }
ArrayRef<WasmSymbol> syms() const { return Symbols; }
const wasm::WasmLinkingData &linkingData() const { return LinkingData; }
uint32_t getNumberOfSymbols() const { return Symbols.size(); }
ArrayRef<wasm::WasmElemSegment> elements() const { return ElemSegments; }
ArrayRef<WasmSegment> dataSegments() const { return DataSegments; }
ArrayRef<wasm::WasmFunction> functions() const { return Functions; }
ArrayRef<wasm::WasmDebugName> debugNames() const { return DebugNames; }
uint32_t startFunction() const { return StartFunction; }
uint32_t getNumImportedGlobals() const { return NumImportedGlobals; }
uint32_t getNumImportedTables() const { return NumImportedTables; }
uint32_t getNumImportedFunctions() const { return NumImportedFunctions; }
uint32_t getNumImportedTags() const { return NumImportedTags; }
uint32_t getNumSections() const { return Sections.size(); }
void moveSymbolNext(DataRefImpl &Symb) const override;
Expected<uint32_t> getSymbolFlags(DataRefImpl Symb) const override;
basic_symbol_iterator symbol_begin() const override;
basic_symbol_iterator symbol_end() const override;
Expected<StringRef> getSymbolName(DataRefImpl Symb) const override;
bool is64Bit() const override { return false; }
Expected<uint64_t> getSymbolAddress(DataRefImpl Symb) const override;
uint64_t getWasmSymbolValue(const WasmSymbol &Sym) const;
uint64_t getSymbolValueImpl(DataRefImpl Symb) const override;
uint32_t getSymbolAlignment(DataRefImpl Symb) const override;
uint64_t getCommonSymbolSizeImpl(DataRefImpl Symb) const override;
Expected<SymbolRef::Type> getSymbolType(DataRefImpl Symb) const override;
Expected<section_iterator> getSymbolSection(DataRefImpl Symb) const override;
uint32_t getSymbolSectionId(SymbolRef Sym) const;
// Overrides from SectionRef.
void moveSectionNext(DataRefImpl &Sec) const override;
Expected<StringRef> getSectionName(DataRefImpl Sec) const override;
uint64_t getSectionAddress(DataRefImpl Sec) const override;
uint64_t getSectionIndex(DataRefImpl Sec) const override;
uint64_t getSectionSize(DataRefImpl Sec) const override;
Expected<ArrayRef<uint8_t>>
getSectionContents(DataRefImpl Sec) const override;
uint64_t getSectionAlignment(DataRefImpl Sec) const override;
bool isSectionCompressed(DataRefImpl Sec) const override;
bool isSectionText(DataRefImpl Sec) const override;
bool isSectionData(DataRefImpl Sec) const override;
bool isSectionBSS(DataRefImpl Sec) const override;
bool isSectionVirtual(DataRefImpl Sec) const override;
relocation_iterator section_rel_begin(DataRefImpl Sec) const override;
relocation_iterator section_rel_end(DataRefImpl Sec) const override;
// Overrides from RelocationRef.
void moveRelocationNext(DataRefImpl &Rel) const override;
uint64_t getRelocationOffset(DataRefImpl Rel) const override;
symbol_iterator getRelocationSymbol(DataRefImpl Rel) const override;
uint64_t getRelocationType(DataRefImpl Rel) const override;
void getRelocationTypeName(DataRefImpl Rel,
SmallVectorImpl<char> &Result) const override;
section_iterator section_begin() const override;
section_iterator section_end() const override;
uint8_t getBytesInAddress() const override;
StringRef getFileFormatName() const override;
Triple::ArchType getArch() const override;
Expected<SubtargetFeatures> getFeatures() const override;
bool isRelocatableObject() const override;
bool isSharedObject() const;
struct ReadContext {
const uint8_t *Start;
const uint8_t *Ptr;
const uint8_t *End;
};
private:
bool isValidFunctionIndex(uint32_t Index) const;
bool isDefinedFunctionIndex(uint32_t Index) const;
bool isValidGlobalIndex(uint32_t Index) const;
bool isValidTableNumber(uint32_t Index) const;
bool isDefinedGlobalIndex(uint32_t Index) const;
bool isDefinedTableNumber(uint32_t Index) const;
bool isValidTagIndex(uint32_t Index) const;
bool isDefinedTagIndex(uint32_t Index) const;
bool isValidFunctionSymbol(uint32_t Index) const;
bool isValidTableSymbol(uint32_t Index) const;
bool isValidGlobalSymbol(uint32_t Index) const;
bool isValidTagSymbol(uint32_t Index) const;
bool isValidDataSymbol(uint32_t Index) const;
bool isValidSectionSymbol(uint32_t Index) const;
wasm::WasmFunction &getDefinedFunction(uint32_t Index);
const wasm::WasmFunction &getDefinedFunction(uint32_t Index) const;
wasm::WasmGlobal &getDefinedGlobal(uint32_t Index);
wasm::WasmTag &getDefinedTag(uint32_t Index);
const WasmSection &getWasmSection(DataRefImpl Ref) const;
const wasm::WasmRelocation &getWasmRelocation(DataRefImpl Ref) const;
uint32_t getSymbolSectionIdImpl(const WasmSymbol &Symb) const;
Error parseSection(WasmSection &Sec);
Error parseCustomSection(WasmSection &Sec, ReadContext &Ctx);
// Standard section types
Error parseTypeSection(ReadContext &Ctx);
Error parseImportSection(ReadContext &Ctx);
Error parseFunctionSection(ReadContext &Ctx);
Error parseTableSection(ReadContext &Ctx);
Error parseMemorySection(ReadContext &Ctx);
Error parseTagSection(ReadContext &Ctx);
Error parseGlobalSection(ReadContext &Ctx);
Error parseExportSection(ReadContext &Ctx);
Error parseStartSection(ReadContext &Ctx);
Error parseElemSection(ReadContext &Ctx);
Error parseCodeSection(ReadContext &Ctx);
Error parseDataSection(ReadContext &Ctx);
Error parseDataCountSection(ReadContext &Ctx);
// Custom section types
Error parseDylinkSection(ReadContext &Ctx);
Error parseDylink0Section(ReadContext &Ctx);
Error parseNameSection(ReadContext &Ctx);
Error parseLinkingSection(ReadContext &Ctx);
Error parseLinkingSectionSymtab(ReadContext &Ctx);
Error parseLinkingSectionComdat(ReadContext &Ctx);
Error parseProducersSection(ReadContext &Ctx);
Error parseTargetFeaturesSection(ReadContext &Ctx);
Error parseRelocSection(StringRef Name, ReadContext &Ctx);
wasm::WasmObjectHeader Header;
std::vector<WasmSection> Sections;
wasm::WasmDylinkInfo DylinkInfo;
wasm::WasmProducerInfo ProducerInfo;
std::vector<wasm::WasmFeatureEntry> TargetFeatures;
std::vector<wasm::WasmSignature> Signatures;
std::vector<wasm::WasmTable> Tables;
std::vector<wasm::WasmLimits> Memories;
std::vector<wasm::WasmGlobal> Globals;
std::vector<wasm::WasmTag> Tags;
std::vector<wasm::WasmImport> Imports;
std::vector<wasm::WasmExport> Exports;
std::vector<wasm::WasmElemSegment> ElemSegments;
std::vector<WasmSegment> DataSegments;
std::optional<size_t> DataCount;
std::vector<wasm::WasmFunction> Functions;
std::vector<WasmSymbol> Symbols;
std::vector<wasm::WasmDebugName> DebugNames;
uint32_t StartFunction = -1;
bool HasLinkingSection = false;
bool HasDylinkSection = false;
bool HasMemory64 = false;
wasm::WasmLinkingData LinkingData;
uint32_t NumImportedGlobals = 0;
uint32_t NumImportedTables = 0;
uint32_t NumImportedFunctions = 0;
uint32_t NumImportedTags = 0;
uint32_t CodeSection = 0;
uint32_t DataSection = 0;
uint32_t TagSection = 0;
uint32_t GlobalSection = 0;
uint32_t TableSection = 0;
};
class WasmSectionOrderChecker {
public:
// We define orders for all core wasm sections and known custom sections.
enum : int {
// Sentinel, must be zero
WASM_SEC_ORDER_NONE = 0,
// Core sections
WASM_SEC_ORDER_TYPE,
WASM_SEC_ORDER_IMPORT,
WASM_SEC_ORDER_FUNCTION,
WASM_SEC_ORDER_TABLE,
WASM_SEC_ORDER_MEMORY,
WASM_SEC_ORDER_TAG,
WASM_SEC_ORDER_GLOBAL,
WASM_SEC_ORDER_EXPORT,
WASM_SEC_ORDER_START,
WASM_SEC_ORDER_ELEM,
WASM_SEC_ORDER_DATACOUNT,
WASM_SEC_ORDER_CODE,
WASM_SEC_ORDER_DATA,
// Custom sections
// "dylink" should be the very first section in the module
WASM_SEC_ORDER_DYLINK,
// "linking" section requires DATA section in order to validate data symbols
WASM_SEC_ORDER_LINKING,
// Must come after "linking" section in order to validate reloc indexes.
WASM_SEC_ORDER_RELOC,
// "name" section must appear after DATA. Comes after "linking" to allow
// symbol table to set default function name.
WASM_SEC_ORDER_NAME,
// "producers" section must appear after "name" section.
WASM_SEC_ORDER_PRODUCERS,
// "target_features" section must appear after producers section
WASM_SEC_ORDER_TARGET_FEATURES,
// Must be last
WASM_NUM_SEC_ORDERS
};
// Sections that may or may not be present, but cannot be predecessors
static int DisallowedPredecessors[WASM_NUM_SEC_ORDERS][WASM_NUM_SEC_ORDERS];
bool isValidSectionOrder(unsigned ID, StringRef CustomSectionName = "");
private:
bool Seen[WASM_NUM_SEC_ORDERS] = {}; // Sections that have been seen already
// Returns -1 for unknown sections.
int getSectionOrder(unsigned ID, StringRef CustomSectionName = "");
};
} // end namespace object
inline raw_ostream &operator<<(raw_ostream &OS, const object::WasmSymbol &Sym) {
Sym.print(OS);
return OS;
}
} // end namespace llvm
#endif // LLVM_OBJECT_WASM_H
PK hwFZy\�w� � Object/Decompressor.hnu �[��� //===-- Decompressor.h ------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===/
#ifndef LLVM_OBJECT_DECOMPRESSOR_H
#define LLVM_OBJECT_DECOMPRESSOR_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Compression.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace object {
/// Decompressor helps to handle decompression of compressed sections.
class Decompressor {
public:
/// Create decompressor object.
/// @param Name Section name.
/// @param Data Section content.
/// @param IsLE Flag determines if Data is in little endian form.
/// @param Is64Bit Flag determines if object is 64 bit.
static Expected<Decompressor> create(StringRef Name, StringRef Data,
bool IsLE, bool Is64Bit);
/// Resize the buffer and uncompress section data into it.
/// @param Out Destination buffer.
template <class T> Error resizeAndDecompress(T &Out) {
Out.resize(DecompressedSize);
return decompress({(uint8_t *)Out.data(), (size_t)DecompressedSize});
}
/// Uncompress section data to raw buffer provided.
Error decompress(MutableArrayRef<uint8_t> Output);
/// Return memory buffer size required for decompression.
uint64_t getDecompressedSize() { return DecompressedSize; }
private:
Decompressor(StringRef Data);
Error consumeCompressedHeader(bool Is64Bit, bool IsLittleEndian);
StringRef SectionData;
uint64_t DecompressedSize;
DebugCompressionType CompressionType = DebugCompressionType::None;
};
} // end namespace object
} // end namespace llvm
#endif // LLVM_OBJECT_DECOMPRESSOR_H
PK hwFZ̦��
Object/MachOUniversalWriter.hnu �[��� //===- MachOUniversalWriter.h - MachO universal binary writer----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Declares the Slice class and writeUniversalBinary function for writing a
// MachO universal binary file.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_MACHOUNIVERSALWRITER_H
#define LLVM_OBJECT_MACHOUNIVERSALWRITER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/Twine.h"
#include "llvm/BinaryFormat/MachO.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <string>
namespace llvm {
class LLVMContext;
namespace object {
class Archive;
class Binary;
class IRObjectFile;
class MachOObjectFile;
class Slice {
const Binary *B;
uint32_t CPUType;
uint32_t CPUSubType;
std::string ArchName;
// P2Alignment field stores slice alignment values from universal
// binaries. This is also needed to order the slices so the total
// file size can be calculated before creating the output buffer.
uint32_t P2Alignment;
Slice(const IRObjectFile &IRO, uint32_t CPUType, uint32_t CPUSubType,
std::string ArchName, uint32_t Align);
public:
explicit Slice(const MachOObjectFile &O);
Slice(const MachOObjectFile &O, uint32_t Align);
/// This constructor takes pre-specified \param CPUType , \param CPUSubType ,
/// \param ArchName , \param Align instead of inferring them from the archive
/// members.
Slice(const Archive &A, uint32_t CPUType, uint32_t CPUSubType,
std::string ArchName, uint32_t Align);
static Expected<Slice> create(const Archive &A,
LLVMContext *LLVMCtx = nullptr);
static Expected<Slice> create(const IRObjectFile &IRO, uint32_t Align);
void setP2Alignment(uint32_t Align) { P2Alignment = Align; }
const Binary *getBinary() const { return B; }
uint32_t getCPUType() const { return CPUType; }
uint32_t getCPUSubType() const { return CPUSubType; }
uint32_t getP2Alignment() const { return P2Alignment; }
uint64_t getCPUID() const {
return static_cast<uint64_t>(CPUType) << 32 | CPUSubType;
}
std::string getArchString() const {
if (!ArchName.empty())
return ArchName;
return ("unknown(" + Twine(CPUType) + "," +
Twine(CPUSubType & ~MachO::CPU_SUBTYPE_MASK) + ")")
.str();
}
friend bool operator<(const Slice &Lhs, const Slice &Rhs) {
if (Lhs.CPUType == Rhs.CPUType)
return Lhs.CPUSubType < Rhs.CPUSubType;
// force arm64-family to follow after all other slices for
// compatibility with cctools lipo
if (Lhs.CPUType == MachO::CPU_TYPE_ARM64)
return false;
if (Rhs.CPUType == MachO::CPU_TYPE_ARM64)
return true;
// Sort by alignment to minimize file size
return Lhs.P2Alignment < Rhs.P2Alignment;
}
};
Error writeUniversalBinary(ArrayRef<Slice> Slices, StringRef OutputFileName);
Error writeUniversalBinaryToStream(ArrayRef<Slice> Slices, raw_ostream &Out);
} // end namespace object
} // end namespace llvm
#endif // LLVM_OBJECT_MACHOUNIVERSALWRITER_H
PK hwFZ�U�� Object/GOFFObjectFile.hnu �[��� //===- GOFFObjectFile.h - GOFF object file implementation -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the GOFFObjectFile class.
// Record classes and derivatives are also declared and implemented.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_GOFFOBJECTFILE_H
#define LLVM_OBJECT_GOFFOBJECTFILE_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/IndexedMap.h"
#include "llvm/BinaryFormat/GOFF.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/Support/ConvertEBCDIC.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/TargetParser/SubtargetFeature.h"
#include "llvm/TargetParser/Triple.h"
namespace llvm {
namespace object {
class GOFFObjectFile : public ObjectFile {
IndexedMap<const uint8_t *> EsdPtrs; // Indexed by EsdId.
mutable DenseMap<uint32_t, std::pair<size_t, std::unique_ptr<char[]>>>
EsdNamesCache;
typedef DataRefImpl SectionEntryImpl;
// (EDID, 0) code, r/o data section
// (EDID,PRID) r/w data section
SmallVector<SectionEntryImpl, 256> SectionList;
mutable DenseMap<uint32_t, std::string> SectionDataCache;
public:
Expected<StringRef> getSymbolName(SymbolRef Symbol) const;
GOFFObjectFile(MemoryBufferRef Object, Error &Err);
static inline bool classof(const Binary *V) { return V->isGOFF(); }
section_iterator section_begin() const override;
section_iterator section_end() const override;
uint8_t getBytesInAddress() const override { return 8; }
StringRef getFileFormatName() const override { return "GOFF-SystemZ"; }
Triple::ArchType getArch() const override { return Triple::systemz; }
Expected<SubtargetFeatures> getFeatures() const override { return SubtargetFeatures(); }
bool isRelocatableObject() const override { return true; }
void moveSymbolNext(DataRefImpl &Symb) const override;
basic_symbol_iterator symbol_begin() const override;
basic_symbol_iterator symbol_end() const override;
bool is64Bit() const override {
return true;
}
private:
// SymbolRef.
Expected<StringRef> getSymbolName(DataRefImpl Symb) const override;
Expected<uint64_t> getSymbolAddress(DataRefImpl Symb) const override;
uint64_t getSymbolValueImpl(DataRefImpl Symb) const override;
uint64_t getCommonSymbolSizeImpl(DataRefImpl Symb) const override;
Expected<uint32_t> getSymbolFlags(DataRefImpl Symb) const override;
Expected<SymbolRef::Type> getSymbolType(DataRefImpl Symb) const override;
Expected<section_iterator> getSymbolSection(DataRefImpl Symb) const override;
const uint8_t *getSymbolEsdRecord(DataRefImpl Symb) const;
bool isSymbolUnresolved(DataRefImpl Symb) const;
bool isSymbolIndirect(DataRefImpl Symb) const;
// SectionRef.
void moveSectionNext(DataRefImpl &Sec) const override {}
virtual Expected<StringRef> getSectionName(DataRefImpl Sec) const override {
return StringRef();
}
uint64_t getSectionAddress(DataRefImpl Sec) const override { return 0; }
uint64_t getSectionSize(DataRefImpl Sec) const override { return 0; }
virtual Expected<ArrayRef<uint8_t>>
getSectionContents(DataRefImpl Sec) const override {
return ArrayRef<uint8_t>();
}
uint64_t getSectionIndex(DataRefImpl Sec) const override { return 0; }
uint64_t getSectionAlignment(DataRefImpl Sec) const override { return 0; }
bool isSectionCompressed(DataRefImpl Sec) const override { return false; }
bool isSectionText(DataRefImpl Sec) const override { return false; }
bool isSectionData(DataRefImpl Sec) const override { return false; }
bool isSectionBSS(DataRefImpl Sec) const override { return false; }
bool isSectionVirtual(DataRefImpl Sec) const override { return false; }
relocation_iterator section_rel_begin(DataRefImpl Sec) const override {
return relocation_iterator(RelocationRef(Sec, this));
}
relocation_iterator section_rel_end(DataRefImpl Sec) const override {
return relocation_iterator(RelocationRef(Sec, this));
}
const uint8_t *getSectionEdEsdRecord(DataRefImpl &Sec) const;
const uint8_t *getSectionPrEsdRecord(DataRefImpl &Sec) const;
const uint8_t *getSectionEdEsdRecord(uint32_t SectionIndex) const;
const uint8_t *getSectionPrEsdRecord(uint32_t SectionIndex) const;
// RelocationRef.
void moveRelocationNext(DataRefImpl &Rel) const override {}
uint64_t getRelocationOffset(DataRefImpl Rel) const override { return 0; }
symbol_iterator getRelocationSymbol(DataRefImpl Rel) const override {
DataRefImpl Temp;
return basic_symbol_iterator(SymbolRef(Temp, this));
}
uint64_t getRelocationType(DataRefImpl Rel) const override { return 0; }
void getRelocationTypeName(DataRefImpl Rel,
SmallVectorImpl<char> &Result) const override {}
};
} // namespace object
} // namespace llvm
#endif
PK hwFZ(�
� � Object/CVDebugRecord.hnu �[��� //===- CVDebugRecord.h ------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_CVDEBUGRECORD_H
#define LLVM_OBJECT_CVDEBUGRECORD_H
#include "llvm/Support/Endian.h"
namespace llvm {
namespace OMF {
struct Signature {
enum ID : uint32_t {
PDB70 = 0x53445352, // RSDS
PDB20 = 0x3031424e, // NB10
CV50 = 0x3131424e, // NB11
CV41 = 0x3930424e, // NB09
};
support::ulittle32_t CVSignature;
support::ulittle32_t Offset;
};
}
namespace codeview {
struct PDB70DebugInfo {
support::ulittle32_t CVSignature;
uint8_t Signature[16];
support::ulittle32_t Age;
// char PDBFileName[];
};
struct PDB20DebugInfo {
support::ulittle32_t CVSignature;
support::ulittle32_t Offset;
support::ulittle32_t Signature;
support::ulittle32_t Age;
// char PDBFileName[];
};
union DebugInfo {
struct OMF::Signature Signature;
struct PDB20DebugInfo PDB20;
struct PDB70DebugInfo PDB70;
};
}
}
#endif
PK hwFZ�g/ҷ" �"
Object/GOFF.hnu �[��� //===- GOFF.h - GOFF object file implementation -----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the GOFFObjectFile class.
// Record classes and derivatives are also declared and implemented.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_GOFF_H
#define LLVM_OBJECT_GOFF_H
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/BinaryFormat/GOFF.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/raw_ostream.h"
namespace llvm {
namespace object {
/// \brief Represents a GOFF physical record.
///
/// Specifies protected member functions to manipulate the record. These should
/// be called from deriving classes to change values as that record specifies.
class Record {
public:
static Error getContinuousData(const uint8_t *Record, uint16_t DataLength,
int DataIndex, SmallString<256> &CompleteData);
static bool isContinued(const uint8_t *Record) {
uint8_t IsContinued;
getBits(Record, 1, 7, 1, IsContinued);
return IsContinued;
}
static bool isContinuation(const uint8_t *Record) {
uint8_t IsContinuation;
getBits(Record, 1, 6, 1, IsContinuation);
return IsContinuation;
}
protected:
/// \brief Get bit field of specified byte.
///
/// Used to pack bit fields into one byte. Fields are packed left to right.
/// Bit index zero is the most significant bit of the byte.
///
/// \param ByteIndex index of byte the field is in.
/// \param BitIndex index of first bit of field.
/// \param Length length of bit field.
/// \param Value value of bit field.
static void getBits(const uint8_t *Bytes, uint8_t ByteIndex, uint8_t BitIndex,
uint8_t Length, uint8_t &Value) {
assert(ByteIndex < GOFF::RecordLength && "Byte index out of bounds!");
assert(BitIndex < 8 && "Bit index out of bounds!");
assert(Length + BitIndex <= 8 && "Bit length too long!");
get<uint8_t>(Bytes, ByteIndex, Value);
Value = (Value >> (8 - BitIndex - Length)) & ((1 << Length) - 1);
}
template <class T>
static void get(const uint8_t *Bytes, uint8_t ByteIndex, T &Value) {
assert(ByteIndex + sizeof(T) <= GOFF::RecordLength &&
"Byte index out of bounds!");
Value = support::endian::read<T, support::big, support::unaligned>(
&Bytes[ByteIndex]);
}
};
class HDRRecord : public Record {
public:
static Error getData(const uint8_t *Record, SmallString<256> &CompleteData);
static uint16_t getPropertyModuleLength(const uint8_t *Record) {
uint16_t Length;
get<uint16_t>(Record, 52, Length);
return Length;
}
};
class ESDRecord : public Record {
public:
/// \brief Number of bytes for name; any more must go in continuation.
/// This is the number of bytes that can fit into the data field of an ESD
/// record.
static const uint8_t ESDMaxUncontinuedNameLength = 8;
/// \brief Maximum name length for ESD records and continuations.
/// This is the number of bytes that can fit into the data field of an ESD
/// record AND following continuations. This is limited fundamentally by the
/// 16 bit SIGNED length field.
static const uint16_t MaxNameLength = 32 * 1024;
public:
static Error getData(const uint8_t *Record, SmallString<256> &CompleteData);
// ESD Get routines.
static void getSymbolType(const uint8_t *Record,
GOFF::ESDSymbolType &SymbolType) {
uint8_t Value;
get<uint8_t>(Record, 3, Value);
SymbolType = (GOFF::ESDSymbolType)Value;
}
static void getEsdId(const uint8_t *Record, uint32_t &EsdId) {
get<uint32_t>(Record, 4, EsdId);
}
static void getParentEsdId(const uint8_t *Record, uint32_t &EsdId) {
get<uint32_t>(Record, 8, EsdId);
}
static void getOffset(const uint8_t *Record, uint32_t &Offset) {
get<uint32_t>(Record, 16, Offset);
}
static void getLength(const uint8_t *Record, uint32_t &Length) {
get<uint32_t>(Record, 24, Length);
}
static void getNameSpaceId(const uint8_t *Record, GOFF::ESDNameSpaceId &Id) {
uint8_t Value;
get<uint8_t>(Record, 40, Value);
Id = (GOFF::ESDNameSpaceId)Value;
}
static void getFillBytePresent(const uint8_t *Record, bool &Present) {
uint8_t Value;
getBits(Record, 41, 0, 1, Value);
Present = (bool)Value;
}
static void getNameMangled(const uint8_t *Record, bool &Mangled) {
uint8_t Value;
getBits(Record, 41, 1, 1, Value);
Mangled = (bool)Value;
}
static void getRenamable(const uint8_t *Record, bool &Renamable) {
uint8_t Value;
getBits(Record, 41, 2, 1, Value);
Renamable = (bool)Value;
}
static void getRemovable(const uint8_t *Record, bool &Removable) {
uint8_t Value;
getBits(Record, 41, 3, 1, Value);
Removable = (bool)Value;
}
static void getFillByteValue(const uint8_t *Record, uint8_t &Fill) {
get<uint8_t>(Record, 42, Fill);
}
static void getAdaEsdId(const uint8_t *Record, uint32_t &EsdId) {
get<uint32_t>(Record, 44, EsdId);
}
static void getSortPriority(const uint8_t *Record, uint32_t &Priority) {
get<uint32_t>(Record, 48, Priority);
}
static void getAmode(const uint8_t *Record, GOFF::ESDAmode &Amode) {
uint8_t Value;
get<uint8_t>(Record, 60, Value);
Amode = (GOFF::ESDAmode)Value;
}
static void getRmode(const uint8_t *Record, GOFF::ESDRmode &Rmode) {
uint8_t Value;
get<uint8_t>(Record, 61, Value);
Rmode = (GOFF::ESDRmode)Value;
}
static void getTextStyle(const uint8_t *Record, GOFF::ESDTextStyle &Style) {
uint8_t Value;
getBits(Record, 62, 0, 4, Value);
Style = (GOFF::ESDTextStyle)Value;
}
static void getBindingAlgorithm(const uint8_t *Record,
GOFF::ESDBindingAlgorithm &Algorithm) {
uint8_t Value;
getBits(Record, 62, 4, 4, Value);
Algorithm = (GOFF::ESDBindingAlgorithm)Value;
}
static void getTaskingBehavior(const uint8_t *Record,
GOFF::ESDTaskingBehavior &TaskingBehavior) {
uint8_t Value;
getBits(Record, 63, 0, 3, Value);
TaskingBehavior = (GOFF::ESDTaskingBehavior)Value;
}
static void getReadOnly(const uint8_t *Record, bool &ReadOnly) {
uint8_t Value;
getBits(Record, 63, 4, 1, Value);
ReadOnly = (bool)Value;
}
static void getExecutable(const uint8_t *Record,
GOFF::ESDExecutable &Executable) {
uint8_t Value;
getBits(Record, 63, 5, 3, Value);
Executable = (GOFF::ESDExecutable)Value;
}
static void getDuplicateSeverity(const uint8_t *Record,
GOFF::ESDDuplicateSymbolSeverity &DSS) {
uint8_t Value;
getBits(Record, 64, 2, 2, Value);
DSS = (GOFF::ESDDuplicateSymbolSeverity)Value;
}
static void getBindingStrength(const uint8_t *Record,
GOFF::ESDBindingStrength &Strength) {
uint8_t Value;
getBits(Record, 64, 4, 4, Value);
Strength = (GOFF::ESDBindingStrength)Value;
}
static void getLoadingBehavior(const uint8_t *Record,
GOFF::ESDLoadingBehavior &Behavior) {
uint8_t Value;
getBits(Record, 65, 0, 2, Value);
Behavior = (GOFF::ESDLoadingBehavior)Value;
}
static void getIndirectReference(const uint8_t *Record, bool &Indirect) {
uint8_t Value;
getBits(Record, 65, 3, 1, Value);
Indirect = (bool)Value;
}
static void getBindingScope(const uint8_t *Record,
GOFF::ESDBindingScope &Scope) {
uint8_t Value;
getBits(Record, 65, 4, 4, Value);
Scope = (GOFF::ESDBindingScope)Value;
}
static void getLinkageType(const uint8_t *Record,
GOFF::ESDLinkageType &Type) {
uint8_t Value;
getBits(Record, 66, 2, 1, Value);
Type = (GOFF::ESDLinkageType)Value;
}
static void getAlignment(const uint8_t *Record,
GOFF::ESDAlignment &Alignment) {
uint8_t Value;
getBits(Record, 66, 3, 5, Value);
Alignment = (GOFF::ESDAlignment)Value;
}
static uint16_t getNameLength(const uint8_t *Record) {
uint16_t Length;
get<uint16_t>(Record, 70, Length);
return Length;
}
};
class ENDRecord : public Record {
public:
static Error getData(const uint8_t *Record, SmallString<256> &CompleteData);
static uint16_t getNameLength(const uint8_t *Record) {
uint16_t Length;
get<uint16_t>(Record, 24, Length);
return Length;
}
};
} // end namespace object
} // end namespace llvm
#endif
PK hwFZK �:� :�
Object/COFF.hnu �[��� //===- COFF.h - COFF object file implementation -----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the COFFObjectFile class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_COFF_H
#define LLVM_OBJECT_COFF_H
#include "llvm/ADT/iterator_range.h"
#include "llvm/BinaryFormat/COFF.h"
#include "llvm/Object/Binary.h"
#include "llvm/Object/CVDebugRecord.h"
#include "llvm/Object/Error.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/Support/BinaryByteStream.h"
#include "llvm/Support/ConvertUTF.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/TargetParser/SubtargetFeature.h"
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <system_error>
namespace llvm {
template <typename T> class ArrayRef;
namespace object {
class BaseRelocRef;
class DelayImportDirectoryEntryRef;
class ExportDirectoryEntryRef;
class ImportDirectoryEntryRef;
class ImportedSymbolRef;
class ResourceSectionRef;
using import_directory_iterator = content_iterator<ImportDirectoryEntryRef>;
using delay_import_directory_iterator =
content_iterator<DelayImportDirectoryEntryRef>;
using export_directory_iterator = content_iterator<ExportDirectoryEntryRef>;
using imported_symbol_iterator = content_iterator<ImportedSymbolRef>;
using base_reloc_iterator = content_iterator<BaseRelocRef>;
/// The DOS compatible header at the front of all PE/COFF executables.
struct dos_header {
char Magic[2];
support::ulittle16_t UsedBytesInTheLastPage;
support::ulittle16_t FileSizeInPages;
support::ulittle16_t NumberOfRelocationItems;
support::ulittle16_t HeaderSizeInParagraphs;
support::ulittle16_t MinimumExtraParagraphs;
support::ulittle16_t MaximumExtraParagraphs;
support::ulittle16_t InitialRelativeSS;
support::ulittle16_t InitialSP;
support::ulittle16_t Checksum;
support::ulittle16_t InitialIP;
support::ulittle16_t InitialRelativeCS;
support::ulittle16_t AddressOfRelocationTable;
support::ulittle16_t OverlayNumber;
support::ulittle16_t Reserved[4];
support::ulittle16_t OEMid;
support::ulittle16_t OEMinfo;
support::ulittle16_t Reserved2[10];
support::ulittle32_t AddressOfNewExeHeader;
};
struct coff_file_header {
support::ulittle16_t Machine;
support::ulittle16_t NumberOfSections;
support::ulittle32_t TimeDateStamp;
support::ulittle32_t PointerToSymbolTable;
support::ulittle32_t NumberOfSymbols;
support::ulittle16_t SizeOfOptionalHeader;
support::ulittle16_t Characteristics;
bool isImportLibrary() const { return NumberOfSections == 0xffff; }
};
struct coff_bigobj_file_header {
support::ulittle16_t Sig1;
support::ulittle16_t Sig2;
support::ulittle16_t Version;
support::ulittle16_t Machine;
support::ulittle32_t TimeDateStamp;
uint8_t UUID[16];
support::ulittle32_t unused1;
support::ulittle32_t unused2;
support::ulittle32_t unused3;
support::ulittle32_t unused4;
support::ulittle32_t NumberOfSections;
support::ulittle32_t PointerToSymbolTable;
support::ulittle32_t NumberOfSymbols;
};
/// The 32-bit PE header that follows the COFF header.
struct pe32_header {
support::ulittle16_t Magic;
uint8_t MajorLinkerVersion;
uint8_t MinorLinkerVersion;
support::ulittle32_t SizeOfCode;
support::ulittle32_t SizeOfInitializedData;
support::ulittle32_t SizeOfUninitializedData;
support::ulittle32_t AddressOfEntryPoint;
support::ulittle32_t BaseOfCode;
support::ulittle32_t BaseOfData;
support::ulittle32_t ImageBase;
support::ulittle32_t SectionAlignment;
support::ulittle32_t FileAlignment;
support::ulittle16_t MajorOperatingSystemVersion;
support::ulittle16_t MinorOperatingSystemVersion;
support::ulittle16_t MajorImageVersion;
support::ulittle16_t MinorImageVersion;
support::ulittle16_t MajorSubsystemVersion;
support::ulittle16_t MinorSubsystemVersion;
support::ulittle32_t Win32VersionValue;
support::ulittle32_t SizeOfImage;
support::ulittle32_t SizeOfHeaders;
support::ulittle32_t CheckSum;
support::ulittle16_t Subsystem;
// FIXME: This should be DllCharacteristics.
support::ulittle16_t DLLCharacteristics;
support::ulittle32_t SizeOfStackReserve;
support::ulittle32_t SizeOfStackCommit;
support::ulittle32_t SizeOfHeapReserve;
support::ulittle32_t SizeOfHeapCommit;
support::ulittle32_t LoaderFlags;
// FIXME: This should be NumberOfRvaAndSizes.
support::ulittle32_t NumberOfRvaAndSize;
};
/// The 64-bit PE header that follows the COFF header.
struct pe32plus_header {
support::ulittle16_t Magic;
uint8_t MajorLinkerVersion;
uint8_t MinorLinkerVersion;
support::ulittle32_t SizeOfCode;
support::ulittle32_t SizeOfInitializedData;
support::ulittle32_t SizeOfUninitializedData;
support::ulittle32_t AddressOfEntryPoint;
support::ulittle32_t BaseOfCode;
support::ulittle64_t ImageBase;
support::ulittle32_t SectionAlignment;
support::ulittle32_t FileAlignment;
support::ulittle16_t MajorOperatingSystemVersion;
support::ulittle16_t MinorOperatingSystemVersion;
support::ulittle16_t MajorImageVersion;
support::ulittle16_t MinorImageVersion;
support::ulittle16_t MajorSubsystemVersion;
support::ulittle16_t MinorSubsystemVersion;
support::ulittle32_t Win32VersionValue;
support::ulittle32_t SizeOfImage;
support::ulittle32_t SizeOfHeaders;
support::ulittle32_t CheckSum;
support::ulittle16_t Subsystem;
support::ulittle16_t DLLCharacteristics;
support::ulittle64_t SizeOfStackReserve;
support::ulittle64_t SizeOfStackCommit;
support::ulittle64_t SizeOfHeapReserve;
support::ulittle64_t SizeOfHeapCommit;
support::ulittle32_t LoaderFlags;
support::ulittle32_t NumberOfRvaAndSize;
};
struct data_directory {
support::ulittle32_t RelativeVirtualAddress;
support::ulittle32_t Size;
};
struct debug_directory {
support::ulittle32_t Characteristics;
support::ulittle32_t TimeDateStamp;
support::ulittle16_t MajorVersion;
support::ulittle16_t MinorVersion;
support::ulittle32_t Type;
support::ulittle32_t SizeOfData;
support::ulittle32_t AddressOfRawData;
support::ulittle32_t PointerToRawData;
};
template <typename IntTy>
struct import_lookup_table_entry {
IntTy Data;
bool isOrdinal() const { return Data < 0; }
uint16_t getOrdinal() const {
assert(isOrdinal() && "ILT entry is not an ordinal!");
return Data & 0xFFFF;
}
uint32_t getHintNameRVA() const {
assert(!isOrdinal() && "ILT entry is not a Hint/Name RVA!");
return Data & 0xFFFFFFFF;
}
};
using import_lookup_table_entry32 =
import_lookup_table_entry<support::little32_t>;
using import_lookup_table_entry64 =
import_lookup_table_entry<support::little64_t>;
struct delay_import_directory_table_entry {
// dumpbin reports this field as "Characteristics" instead of "Attributes".
support::ulittle32_t Attributes;
support::ulittle32_t Name;
support::ulittle32_t ModuleHandle;
support::ulittle32_t DelayImportAddressTable;
support::ulittle32_t DelayImportNameTable;
support::ulittle32_t BoundDelayImportTable;
support::ulittle32_t UnloadDelayImportTable;
support::ulittle32_t TimeStamp;
};
struct export_directory_table_entry {
support::ulittle32_t ExportFlags;
support::ulittle32_t TimeDateStamp;
support::ulittle16_t MajorVersion;
support::ulittle16_t MinorVersion;
support::ulittle32_t NameRVA;
support::ulittle32_t OrdinalBase;
support::ulittle32_t AddressTableEntries;
support::ulittle32_t NumberOfNamePointers;
support::ulittle32_t ExportAddressTableRVA;
support::ulittle32_t NamePointerRVA;
support::ulittle32_t OrdinalTableRVA;
};
union export_address_table_entry {
support::ulittle32_t ExportRVA;
support::ulittle32_t ForwarderRVA;
};
using export_name_pointer_table_entry = support::ulittle32_t;
using export_ordinal_table_entry = support::ulittle16_t;
struct StringTableOffset {
support::ulittle32_t Zeroes;
support::ulittle32_t Offset;
};
template <typename SectionNumberType>
struct coff_symbol {
union {
char ShortName[COFF::NameSize];
StringTableOffset Offset;
} Name;
support::ulittle32_t Value;
SectionNumberType SectionNumber;
support::ulittle16_t Type;
uint8_t StorageClass;
uint8_t NumberOfAuxSymbols;
};
using coff_symbol16 = coff_symbol<support::ulittle16_t>;
using coff_symbol32 = coff_symbol<support::ulittle32_t>;
// Contains only common parts of coff_symbol16 and coff_symbol32.
struct coff_symbol_generic {
union {
char ShortName[COFF::NameSize];
StringTableOffset Offset;
} Name;
support::ulittle32_t Value;
};
struct coff_aux_section_definition;
struct coff_aux_weak_external;
class COFFSymbolRef {
public:
COFFSymbolRef() = default;
COFFSymbolRef(const coff_symbol16 *CS) : CS16(CS) {}
COFFSymbolRef(const coff_symbol32 *CS) : CS32(CS) {}
const void *getRawPtr() const {
return CS16 ? static_cast<const void *>(CS16) : CS32;
}
const coff_symbol_generic *getGeneric() const {
if (CS16)
return reinterpret_cast<const coff_symbol_generic *>(CS16);
return reinterpret_cast<const coff_symbol_generic *>(CS32);
}
friend bool operator<(COFFSymbolRef A, COFFSymbolRef B) {
return A.getRawPtr() < B.getRawPtr();
}
bool isBigObj() const {
if (CS16)
return false;
if (CS32)
return true;
llvm_unreachable("COFFSymbolRef points to nothing!");
}
const char *getShortName() const {
return CS16 ? CS16->Name.ShortName : CS32->Name.ShortName;
}
const StringTableOffset &getStringTableOffset() const {
assert(isSet() && "COFFSymbolRef points to nothing!");
return CS16 ? CS16->Name.Offset : CS32->Name.Offset;
}
uint32_t getValue() const {
assert(isSet() && "COFFSymbolRef points to nothing!");
return CS16 ? CS16->Value : CS32->Value;
}
int32_t getSectionNumber() const {
assert(isSet() && "COFFSymbolRef points to nothing!");
if (CS16) {
// Reserved sections are returned as negative numbers.
if (CS16->SectionNumber <= COFF::MaxNumberOfSections16)
return CS16->SectionNumber;
return static_cast<int16_t>(CS16->SectionNumber);
}
return static_cast<int32_t>(CS32->SectionNumber);
}
uint16_t getType() const {
assert(isSet() && "COFFSymbolRef points to nothing!");
return CS16 ? CS16->Type : CS32->Type;
}
uint8_t getStorageClass() const {
assert(isSet() && "COFFSymbolRef points to nothing!");
return CS16 ? CS16->StorageClass : CS32->StorageClass;
}
uint8_t getNumberOfAuxSymbols() const {
assert(isSet() && "COFFSymbolRef points to nothing!");
return CS16 ? CS16->NumberOfAuxSymbols : CS32->NumberOfAuxSymbols;
}
uint8_t getBaseType() const { return getType() & 0x0F; }
uint8_t getComplexType() const {
return (getType() & 0xF0) >> COFF::SCT_COMPLEX_TYPE_SHIFT;
}
template <typename T> const T *getAux() const {
return CS16 ? reinterpret_cast<const T *>(CS16 + 1)
: reinterpret_cast<const T *>(CS32 + 1);
}
const coff_aux_section_definition *getSectionDefinition() const {
if (!getNumberOfAuxSymbols() ||
getStorageClass() != COFF::IMAGE_SYM_CLASS_STATIC)
return nullptr;
return getAux<coff_aux_section_definition>();
}
const coff_aux_weak_external *getWeakExternal() const {
if (!getNumberOfAuxSymbols() ||
getStorageClass() != COFF::IMAGE_SYM_CLASS_WEAK_EXTERNAL)
return nullptr;
return getAux<coff_aux_weak_external>();
}
bool isAbsolute() const {
return getSectionNumber() == -1;
}
bool isExternal() const {
return getStorageClass() == COFF::IMAGE_SYM_CLASS_EXTERNAL;
}
bool isCommon() const {
return (isExternal() || isSection()) &&
getSectionNumber() == COFF::IMAGE_SYM_UNDEFINED && getValue() != 0;
}
bool isUndefined() const {
return isExternal() && getSectionNumber() == COFF::IMAGE_SYM_UNDEFINED &&
getValue() == 0;
}
bool isWeakExternal() const {
return getStorageClass() == COFF::IMAGE_SYM_CLASS_WEAK_EXTERNAL;
}
bool isFunctionDefinition() const {
return isExternal() && getBaseType() == COFF::IMAGE_SYM_TYPE_NULL &&
getComplexType() == COFF::IMAGE_SYM_DTYPE_FUNCTION &&
!COFF::isReservedSectionNumber(getSectionNumber());
}
bool isFunctionLineInfo() const {
return getStorageClass() == COFF::IMAGE_SYM_CLASS_FUNCTION;
}
bool isAnyUndefined() const {
return isUndefined() || isWeakExternal();
}
bool isFileRecord() const {
return getStorageClass() == COFF::IMAGE_SYM_CLASS_FILE;
}
bool isSection() const {
return getStorageClass() == COFF::IMAGE_SYM_CLASS_SECTION;
}
bool isSectionDefinition() const {
// C++/CLI creates external ABS symbols for non-const appdomain globals.
// These are also followed by an auxiliary section definition.
bool isAppdomainGlobal =
getStorageClass() == COFF::IMAGE_SYM_CLASS_EXTERNAL &&
getSectionNumber() == COFF::IMAGE_SYM_ABSOLUTE;
bool isOrdinarySection = getStorageClass() == COFF::IMAGE_SYM_CLASS_STATIC;
if (!getNumberOfAuxSymbols())
return false;
return isAppdomainGlobal || isOrdinarySection;
}
bool isCLRToken() const {
return getStorageClass() == COFF::IMAGE_SYM_CLASS_CLR_TOKEN;
}
private:
bool isSet() const { return CS16 || CS32; }
const coff_symbol16 *CS16 = nullptr;
const coff_symbol32 *CS32 = nullptr;
};
struct coff_section {
char Name[COFF::NameSize];
support::ulittle32_t VirtualSize;
support::ulittle32_t VirtualAddress;
support::ulittle32_t SizeOfRawData;
support::ulittle32_t PointerToRawData;
support::ulittle32_t PointerToRelocations;
support::ulittle32_t PointerToLinenumbers;
support::ulittle16_t NumberOfRelocations;
support::ulittle16_t NumberOfLinenumbers;
support::ulittle32_t Characteristics;
// Returns true if the actual number of relocations is stored in
// VirtualAddress field of the first relocation table entry.
bool hasExtendedRelocations() const {
return (Characteristics & COFF::IMAGE_SCN_LNK_NRELOC_OVFL) &&
NumberOfRelocations == UINT16_MAX;
}
uint32_t getAlignment() const {
// The IMAGE_SCN_TYPE_NO_PAD bit is a legacy way of getting to
// IMAGE_SCN_ALIGN_1BYTES.
if (Characteristics & COFF::IMAGE_SCN_TYPE_NO_PAD)
return 1;
// Bit [20:24] contains section alignment. 0 means use a default alignment
// of 16.
uint32_t Shift = (Characteristics >> 20) & 0xF;
if (Shift > 0)
return 1U << (Shift - 1);
return 16;
}
};
struct coff_relocation {
support::ulittle32_t VirtualAddress;
support::ulittle32_t SymbolTableIndex;
support::ulittle16_t Type;
};
struct coff_aux_function_definition {
support::ulittle32_t TagIndex;
support::ulittle32_t TotalSize;
support::ulittle32_t PointerToLinenumber;
support::ulittle32_t PointerToNextFunction;
char Unused1[2];
};
static_assert(sizeof(coff_aux_function_definition) == 18,
"auxiliary entry must be 18 bytes");
struct coff_aux_bf_and_ef_symbol {
char Unused1[4];
support::ulittle16_t Linenumber;
char Unused2[6];
support::ulittle32_t PointerToNextFunction;
char Unused3[2];
};
static_assert(sizeof(coff_aux_bf_and_ef_symbol) == 18,
"auxiliary entry must be 18 bytes");
struct coff_aux_weak_external {
support::ulittle32_t TagIndex;
support::ulittle32_t Characteristics;
char Unused1[10];
};
static_assert(sizeof(coff_aux_weak_external) == 18,
"auxiliary entry must be 18 bytes");
struct coff_aux_section_definition {
support::ulittle32_t Length;
support::ulittle16_t NumberOfRelocations;
support::ulittle16_t NumberOfLinenumbers;
support::ulittle32_t CheckSum;
support::ulittle16_t NumberLowPart;
uint8_t Selection;
uint8_t Unused;
support::ulittle16_t NumberHighPart;
int32_t getNumber(bool IsBigObj) const {
uint32_t Number = static_cast<uint32_t>(NumberLowPart);
if (IsBigObj)
Number |= static_cast<uint32_t>(NumberHighPart) << 16;
return static_cast<int32_t>(Number);
}
};
static_assert(sizeof(coff_aux_section_definition) == 18,
"auxiliary entry must be 18 bytes");
struct coff_aux_clr_token {
uint8_t AuxType;
uint8_t Reserved;
support::ulittle32_t SymbolTableIndex;
char MBZ[12];
};
static_assert(sizeof(coff_aux_clr_token) == 18,
"auxiliary entry must be 18 bytes");
struct coff_import_header {
support::ulittle16_t Sig1;
support::ulittle16_t Sig2;
support::ulittle16_t Version;
support::ulittle16_t Machine;
support::ulittle32_t TimeDateStamp;
support::ulittle32_t SizeOfData;
support::ulittle16_t OrdinalHint;
support::ulittle16_t TypeInfo;
int getType() const { return TypeInfo & 0x3; }
int getNameType() const { return (TypeInfo >> 2) & 0x7; }
};
struct coff_import_directory_table_entry {
support::ulittle32_t ImportLookupTableRVA;
support::ulittle32_t TimeDateStamp;
support::ulittle32_t ForwarderChain;
support::ulittle32_t NameRVA;
support::ulittle32_t ImportAddressTableRVA;
bool isNull() const {
return ImportLookupTableRVA == 0 && TimeDateStamp == 0 &&
ForwarderChain == 0 && NameRVA == 0 && ImportAddressTableRVA == 0;
}
};
template <typename IntTy>
struct coff_tls_directory {
IntTy StartAddressOfRawData;
IntTy EndAddressOfRawData;
IntTy AddressOfIndex;
IntTy AddressOfCallBacks;
support::ulittle32_t SizeOfZeroFill;
support::ulittle32_t Characteristics;
uint32_t getAlignment() const {
// Bit [20:24] contains section alignment.
uint32_t Shift = (Characteristics & COFF::IMAGE_SCN_ALIGN_MASK) >> 20;
if (Shift > 0)
return 1U << (Shift - 1);
return 0;
}
void setAlignment(uint32_t Align) {
uint32_t AlignBits = 0;
if (Align) {
assert(llvm::isPowerOf2_32(Align) && "alignment is not a power of 2");
assert(llvm::Log2_32(Align) <= 13 && "alignment requested is too large");
AlignBits = (llvm::Log2_32(Align) + 1) << 20;
}
Characteristics =
(Characteristics & ~COFF::IMAGE_SCN_ALIGN_MASK) | AlignBits;
}
};
using coff_tls_directory32 = coff_tls_directory<support::little32_t>;
using coff_tls_directory64 = coff_tls_directory<support::little64_t>;
enum class frame_type : uint16_t { Fpo = 0, Trap = 1, Tss = 2, NonFpo = 3 };
struct coff_load_config_code_integrity {
support::ulittle16_t Flags;
support::ulittle16_t Catalog;
support::ulittle32_t CatalogOffset;
support::ulittle32_t Reserved;
};
/// 32-bit load config (IMAGE_LOAD_CONFIG_DIRECTORY32)
struct coff_load_configuration32 {
support::ulittle32_t Size;
support::ulittle32_t TimeDateStamp;
support::ulittle16_t MajorVersion;
support::ulittle16_t MinorVersion;
support::ulittle32_t GlobalFlagsClear;
support::ulittle32_t GlobalFlagsSet;
support::ulittle32_t CriticalSectionDefaultTimeout;
support::ulittle32_t DeCommitFreeBlockThreshold;
support::ulittle32_t DeCommitTotalFreeThreshold;
support::ulittle32_t LockPrefixTable;
support::ulittle32_t MaximumAllocationSize;
support::ulittle32_t VirtualMemoryThreshold;
support::ulittle32_t ProcessAffinityMask;
support::ulittle32_t ProcessHeapFlags;
support::ulittle16_t CSDVersion;
support::ulittle16_t DependentLoadFlags;
support::ulittle32_t EditList;
support::ulittle32_t SecurityCookie;
support::ulittle32_t SEHandlerTable;
support::ulittle32_t SEHandlerCount;
// Added in MSVC 2015 for /guard:cf.
support::ulittle32_t GuardCFCheckFunction;
support::ulittle32_t GuardCFCheckDispatch;
support::ulittle32_t GuardCFFunctionTable;
support::ulittle32_t GuardCFFunctionCount;
support::ulittle32_t GuardFlags; // coff_guard_flags
// Added in MSVC 2017
coff_load_config_code_integrity CodeIntegrity;
support::ulittle32_t GuardAddressTakenIatEntryTable;
support::ulittle32_t GuardAddressTakenIatEntryCount;
support::ulittle32_t GuardLongJumpTargetTable;
support::ulittle32_t GuardLongJumpTargetCount;
support::ulittle32_t DynamicValueRelocTable;
support::ulittle32_t CHPEMetadataPointer;
support::ulittle32_t GuardRFFailureRoutine;
support::ulittle32_t GuardRFFailureRoutineFunctionPointer;
support::ulittle32_t DynamicValueRelocTableOffset;
support::ulittle16_t DynamicValueRelocTableSection;
support::ulittle16_t Reserved2;
support::ulittle32_t GuardRFVerifyStackPointerFunctionPointer;
support::ulittle32_t HotPatchTableOffset;
// Added in MSVC 2019
support::ulittle32_t Reserved3;
support::ulittle32_t EnclaveConfigurationPointer;
support::ulittle32_t VolatileMetadataPointer;
support::ulittle32_t GuardEHContinuationTable;
support::ulittle32_t GuardEHContinuationCount;
support::ulittle32_t GuardXFGCheckFunctionPointer;
support::ulittle32_t GuardXFGDispatchFunctionPointer;
support::ulittle32_t GuardXFGTableDispatchFunctionPointer;
support::ulittle32_t CastGuardOsDeterminedFailureMode;
};
/// 64-bit load config (IMAGE_LOAD_CONFIG_DIRECTORY64)
struct coff_load_configuration64 {
support::ulittle32_t Size;
support::ulittle32_t TimeDateStamp;
support::ulittle16_t MajorVersion;
support::ulittle16_t MinorVersion;
support::ulittle32_t GlobalFlagsClear;
support::ulittle32_t GlobalFlagsSet;
support::ulittle32_t CriticalSectionDefaultTimeout;
support::ulittle64_t DeCommitFreeBlockThreshold;
support::ulittle64_t DeCommitTotalFreeThreshold;
support::ulittle64_t LockPrefixTable;
support::ulittle64_t MaximumAllocationSize;
support::ulittle64_t VirtualMemoryThreshold;
support::ulittle64_t ProcessAffinityMask;
support::ulittle32_t ProcessHeapFlags;
support::ulittle16_t CSDVersion;
support::ulittle16_t DependentLoadFlags;
support::ulittle64_t EditList;
support::ulittle64_t SecurityCookie;
support::ulittle64_t SEHandlerTable;
support::ulittle64_t SEHandlerCount;
// Added in MSVC 2015 for /guard:cf.
support::ulittle64_t GuardCFCheckFunction;
support::ulittle64_t GuardCFCheckDispatch;
support::ulittle64_t GuardCFFunctionTable;
support::ulittle64_t GuardCFFunctionCount;
support::ulittle32_t GuardFlags;
// Added in MSVC 2017
coff_load_config_code_integrity CodeIntegrity;
support::ulittle64_t GuardAddressTakenIatEntryTable;
support::ulittle64_t GuardAddressTakenIatEntryCount;
support::ulittle64_t GuardLongJumpTargetTable;
support::ulittle64_t GuardLongJumpTargetCount;
support::ulittle64_t DynamicValueRelocTable;
support::ulittle64_t CHPEMetadataPointer;
support::ulittle64_t GuardRFFailureRoutine;
support::ulittle64_t GuardRFFailureRoutineFunctionPointer;
support::ulittle32_t DynamicValueRelocTableOffset;
support::ulittle16_t DynamicValueRelocTableSection;
support::ulittle16_t Reserved2;
support::ulittle64_t GuardRFVerifyStackPointerFunctionPointer;
support::ulittle32_t HotPatchTableOffset;
// Added in MSVC 2019
support::ulittle32_t Reserved3;
support::ulittle64_t EnclaveConfigurationPointer;
support::ulittle64_t VolatileMetadataPointer;
support::ulittle64_t GuardEHContinuationTable;
support::ulittle64_t GuardEHContinuationCount;
support::ulittle64_t GuardXFGCheckFunctionPointer;
support::ulittle64_t GuardXFGDispatchFunctionPointer;
support::ulittle64_t GuardXFGTableDispatchFunctionPointer;
support::ulittle64_t CastGuardOsDeterminedFailureMode;
};
struct chpe_metadata {
support::ulittle32_t Version;
support::ulittle32_t CodeMap;
support::ulittle32_t CodeMapCount;
support::ulittle32_t CodeRangesToEntryPoints;
support::ulittle32_t RedirectionMetadata;
support::ulittle32_t __os_arm64x_dispatch_call_no_redirect;
support::ulittle32_t __os_arm64x_dispatch_ret;
support::ulittle32_t __os_arm64x_dispatch_call;
support::ulittle32_t __os_arm64x_dispatch_icall;
support::ulittle32_t __os_arm64x_dispatch_icall_cfg;
support::ulittle32_t AlternateEntryPoint;
support::ulittle32_t AuxiliaryIAT;
support::ulittle32_t CodeRangesToEntryPointsCount;
support::ulittle32_t RedirectionMetadataCount;
support::ulittle32_t GetX64InformationFunctionPointer;
support::ulittle32_t SetX64InformationFunctionPointer;
support::ulittle32_t ExtraRFETable;
support::ulittle32_t ExtraRFETableSize;
support::ulittle32_t __os_arm64x_dispatch_fptr;
support::ulittle32_t AuxiliaryIATCopy;
};
struct chpe_range_entry {
support::ulittle32_t StartOffset;
support::ulittle32_t Length;
};
enum chpe_range_type { CHPE_RANGE_ARM64, CHPE_RANGE_ARM64EC, CHPE_RANGE_AMD64 };
struct chpe_code_range_entry {
support::ulittle32_t StartRva;
support::ulittle32_t EndRva;
support::ulittle32_t EntryPoint;
};
struct chpe_redirection_entry {
support::ulittle32_t Source;
support::ulittle32_t Destination;
};
struct coff_runtime_function_x64 {
support::ulittle32_t BeginAddress;
support::ulittle32_t EndAddress;
support::ulittle32_t UnwindInformation;
};
struct coff_base_reloc_block_header {
support::ulittle32_t PageRVA;
support::ulittle32_t BlockSize;
};
struct coff_base_reloc_block_entry {
support::ulittle16_t Data;
int getType() const { return Data >> 12; }
int getOffset() const { return Data & ((1 << 12) - 1); }
};
struct coff_resource_dir_entry {
union {
support::ulittle32_t NameOffset;
support::ulittle32_t ID;
uint32_t getNameOffset() const {
return maskTrailingOnes<uint32_t>(31) & NameOffset;
}
// Even though the PE/COFF spec doesn't mention this, the high bit of a name
// offset is set.
void setNameOffset(uint32_t Offset) { NameOffset = Offset | (1 << 31); }
} Identifier;
union {
support::ulittle32_t DataEntryOffset;
support::ulittle32_t SubdirOffset;
bool isSubDir() const { return SubdirOffset >> 31; }
uint32_t value() const {
return maskTrailingOnes<uint32_t>(31) & SubdirOffset;
}
} Offset;
};
struct coff_resource_data_entry {
support::ulittle32_t DataRVA;
support::ulittle32_t DataSize;
support::ulittle32_t Codepage;
support::ulittle32_t Reserved;
};
struct coff_resource_dir_table {
support::ulittle32_t Characteristics;
support::ulittle32_t TimeDateStamp;
support::ulittle16_t MajorVersion;
support::ulittle16_t MinorVersion;
support::ulittle16_t NumberOfNameEntries;
support::ulittle16_t NumberOfIDEntries;
};
struct debug_h_header {
support::ulittle32_t Magic;
support::ulittle16_t Version;
support::ulittle16_t HashAlgorithm;
};
class COFFObjectFile : public ObjectFile {
private:
COFFObjectFile(MemoryBufferRef Object);
friend class ImportDirectoryEntryRef;
friend class ExportDirectoryEntryRef;
const coff_file_header *COFFHeader;
const coff_bigobj_file_header *COFFBigObjHeader;
const pe32_header *PE32Header;
const pe32plus_header *PE32PlusHeader;
const data_directory *DataDirectory;
const coff_section *SectionTable;
const coff_symbol16 *SymbolTable16;
const coff_symbol32 *SymbolTable32;
const char *StringTable;
uint32_t StringTableSize;
const coff_import_directory_table_entry *ImportDirectory;
const delay_import_directory_table_entry *DelayImportDirectory;
uint32_t NumberOfDelayImportDirectory;
const export_directory_table_entry *ExportDirectory;
const coff_base_reloc_block_header *BaseRelocHeader;
const coff_base_reloc_block_header *BaseRelocEnd;
const debug_directory *DebugDirectoryBegin;
const debug_directory *DebugDirectoryEnd;
const coff_tls_directory32 *TLSDirectory32;
const coff_tls_directory64 *TLSDirectory64;
// Either coff_load_configuration32 or coff_load_configuration64.
const void *LoadConfig = nullptr;
const chpe_metadata *CHPEMetadata = nullptr;
Expected<StringRef> getString(uint32_t offset) const;
template <typename coff_symbol_type>
const coff_symbol_type *toSymb(DataRefImpl Symb) const;
const coff_section *toSec(DataRefImpl Sec) const;
const coff_relocation *toRel(DataRefImpl Rel) const;
// Finish initializing the object and return success or an error.
Error initialize();
Error initSymbolTablePtr();
Error initImportTablePtr();
Error initDelayImportTablePtr();
Error initExportTablePtr();
Error initBaseRelocPtr();
Error initDebugDirectoryPtr();
Error initTLSDirectoryPtr();
Error initLoadConfigPtr();
public:
static Expected<std::unique_ptr<COFFObjectFile>>
create(MemoryBufferRef Object);
uintptr_t getSymbolTable() const {
if (SymbolTable16)
return reinterpret_cast<uintptr_t>(SymbolTable16);
if (SymbolTable32)
return reinterpret_cast<uintptr_t>(SymbolTable32);
return uintptr_t(0);
}
uint16_t getMachine() const {
if (COFFHeader) {
if (CHPEMetadata) {
switch (COFFHeader->Machine) {
case COFF::IMAGE_FILE_MACHINE_AMD64:
return COFF::IMAGE_FILE_MACHINE_ARM64EC;
case COFF::IMAGE_FILE_MACHINE_ARM64:
return COFF::IMAGE_FILE_MACHINE_ARM64X;
}
}
return COFFHeader->Machine;
}
if (COFFBigObjHeader)
return COFFBigObjHeader->Machine;
llvm_unreachable("no COFF header!");
}
uint16_t getSizeOfOptionalHeader() const {
if (COFFHeader)
return COFFHeader->isImportLibrary() ? 0
: COFFHeader->SizeOfOptionalHeader;
// bigobj doesn't have this field.
if (COFFBigObjHeader)
return 0;
llvm_unreachable("no COFF header!");
}
uint16_t getCharacteristics() const {
if (COFFHeader)
return COFFHeader->isImportLibrary() ? 0 : COFFHeader->Characteristics;
// bigobj doesn't have characteristics to speak of,
// editbin will silently lie to you if you attempt to set any.
if (COFFBigObjHeader)
return 0;
llvm_unreachable("no COFF header!");
}
uint32_t getTimeDateStamp() const {
if (COFFHeader)
return COFFHeader->TimeDateStamp;
if (COFFBigObjHeader)
return COFFBigObjHeader->TimeDateStamp;
llvm_unreachable("no COFF header!");
}
uint32_t getNumberOfSections() const {
if (COFFHeader)
return COFFHeader->isImportLibrary() ? 0 : COFFHeader->NumberOfSections;
if (COFFBigObjHeader)
return COFFBigObjHeader->NumberOfSections;
llvm_unreachable("no COFF header!");
}
uint32_t getPointerToSymbolTable() const {
if (COFFHeader)
return COFFHeader->isImportLibrary() ? 0
: COFFHeader->PointerToSymbolTable;
if (COFFBigObjHeader)
return COFFBigObjHeader->PointerToSymbolTable;
llvm_unreachable("no COFF header!");
}
uint32_t getRawNumberOfSymbols() const {
if (COFFHeader)
return COFFHeader->isImportLibrary() ? 0 : COFFHeader->NumberOfSymbols;
if (COFFBigObjHeader)
return COFFBigObjHeader->NumberOfSymbols;
llvm_unreachable("no COFF header!");
}
uint32_t getNumberOfSymbols() const {
if (!SymbolTable16 && !SymbolTable32)
return 0;
return getRawNumberOfSymbols();
}
uint32_t getStringTableSize() const { return StringTableSize; }
const export_directory_table_entry *getExportTable() const {
return ExportDirectory;
}
const coff_load_configuration32 *getLoadConfig32() const {
assert(!is64());
return reinterpret_cast<const coff_load_configuration32 *>(LoadConfig);
}
const coff_load_configuration64 *getLoadConfig64() const {
assert(is64());
return reinterpret_cast<const coff_load_configuration64 *>(LoadConfig);
}
const chpe_metadata *getCHPEMetadata() const { return CHPEMetadata; }
StringRef getRelocationTypeName(uint16_t Type) const;
protected:
void moveSymbolNext(DataRefImpl &Symb) const override;
Expected<StringRef> getSymbolName(DataRefImpl Symb) const override;
Expected<uint64_t> getSymbolAddress(DataRefImpl Symb) const override;
uint32_t getSymbolAlignment(DataRefImpl Symb) const override;
uint64_t getSymbolValueImpl(DataRefImpl Symb) const override;
uint64_t getCommonSymbolSizeImpl(DataRefImpl Symb) const override;
Expected<uint32_t> getSymbolFlags(DataRefImpl Symb) const override;
Expected<SymbolRef::Type> getSymbolType(DataRefImpl Symb) const override;
Expected<section_iterator> getSymbolSection(DataRefImpl Symb) const override;
void moveSectionNext(DataRefImpl &Sec) const override;
Expected<StringRef> getSectionName(DataRefImpl Sec) const override;
uint64_t getSectionAddress(DataRefImpl Sec) const override;
uint64_t getSectionIndex(DataRefImpl Sec) const override;
uint64_t getSectionSize(DataRefImpl Sec) const override;
Expected<ArrayRef<uint8_t>>
getSectionContents(DataRefImpl Sec) const override;
uint64_t getSectionAlignment(DataRefImpl Sec) const override;
bool isSectionCompressed(DataRefImpl Sec) const override;
bool isSectionText(DataRefImpl Sec) const override;
bool isSectionData(DataRefImpl Sec) const override;
bool isSectionBSS(DataRefImpl Sec) const override;
bool isSectionVirtual(DataRefImpl Sec) const override;
bool isDebugSection(DataRefImpl Sec) const override;
relocation_iterator section_rel_begin(DataRefImpl Sec) const override;
relocation_iterator section_rel_end(DataRefImpl Sec) const override;
void moveRelocationNext(DataRefImpl &Rel) const override;
uint64_t getRelocationOffset(DataRefImpl Rel) const override;
symbol_iterator getRelocationSymbol(DataRefImpl Rel) const override;
uint64_t getRelocationType(DataRefImpl Rel) const override;
void getRelocationTypeName(DataRefImpl Rel,
SmallVectorImpl<char> &Result) const override;
public:
basic_symbol_iterator symbol_begin() const override;
basic_symbol_iterator symbol_end() const override;
section_iterator section_begin() const override;
section_iterator section_end() const override;
bool is64Bit() const override { return false; }
const coff_section *getCOFFSection(const SectionRef &Section) const;
COFFSymbolRef getCOFFSymbol(const DataRefImpl &Ref) const;
COFFSymbolRef getCOFFSymbol(const SymbolRef &Symbol) const;
const coff_relocation *getCOFFRelocation(const RelocationRef &Reloc) const;
unsigned getSectionID(SectionRef Sec) const;
unsigned getSymbolSectionID(SymbolRef Sym) const;
uint8_t getBytesInAddress() const override;
StringRef getFileFormatName() const override;
Triple::ArchType getArch() const override;
Expected<uint64_t> getStartAddress() const override;
Expected<SubtargetFeatures> getFeatures() const override {
return SubtargetFeatures();
}
import_directory_iterator import_directory_begin() const;
import_directory_iterator import_directory_end() const;
delay_import_directory_iterator delay_import_directory_begin() const;
delay_import_directory_iterator delay_import_directory_end() const;
export_directory_iterator export_directory_begin() const;
export_directory_iterator export_directory_end() const;
base_reloc_iterator base_reloc_begin() const;
base_reloc_iterator base_reloc_end() const;
const debug_directory *debug_directory_begin() const {
return DebugDirectoryBegin;
}
const debug_directory *debug_directory_end() const {
return DebugDirectoryEnd;
}
iterator_range<import_directory_iterator> import_directories() const;
iterator_range<delay_import_directory_iterator>
delay_import_directories() const;
iterator_range<export_directory_iterator> export_directories() const;
iterator_range<base_reloc_iterator> base_relocs() const;
iterator_range<const debug_directory *> debug_directories() const {
return make_range(debug_directory_begin(), debug_directory_end());
}
const coff_tls_directory32 *getTLSDirectory32() const {
return TLSDirectory32;
}
const coff_tls_directory64 *getTLSDirectory64() const {
return TLSDirectory64;
}
const dos_header *getDOSHeader() const {
if (!PE32Header && !PE32PlusHeader)
return nullptr;
return reinterpret_cast<const dos_header *>(base());
}
const coff_file_header *getCOFFHeader() const { return COFFHeader; }
const coff_bigobj_file_header *getCOFFBigObjHeader() const {
return COFFBigObjHeader;
}
const pe32_header *getPE32Header() const { return PE32Header; }
const pe32plus_header *getPE32PlusHeader() const { return PE32PlusHeader; }
const data_directory *getDataDirectory(uint32_t index) const;
Expected<const coff_section *> getSection(int32_t index) const;
Expected<COFFSymbolRef> getSymbol(uint32_t index) const {
if (index >= getNumberOfSymbols())
return errorCodeToError(object_error::parse_failed);
if (SymbolTable16)
return COFFSymbolRef(SymbolTable16 + index);
if (SymbolTable32)
return COFFSymbolRef(SymbolTable32 + index);
return errorCodeToError(object_error::parse_failed);
}
template <typename T>
Error getAuxSymbol(uint32_t index, const T *&Res) const {
Expected<COFFSymbolRef> S = getSymbol(index);
if (Error E = S.takeError())
return E;
Res = reinterpret_cast<const T *>(S->getRawPtr());
return Error::success();
}
Expected<StringRef> getSymbolName(COFFSymbolRef Symbol) const;
Expected<StringRef> getSymbolName(const coff_symbol_generic *Symbol) const;
ArrayRef<uint8_t> getSymbolAuxData(COFFSymbolRef Symbol) const;
uint32_t getSymbolIndex(COFFSymbolRef Symbol) const;
size_t getSymbolTableEntrySize() const {
if (COFFHeader)
return sizeof(coff_symbol16);
if (COFFBigObjHeader)
return sizeof(coff_symbol32);
llvm_unreachable("null symbol table pointer!");
}
ArrayRef<coff_relocation> getRelocations(const coff_section *Sec) const;
Expected<StringRef> getSectionName(const coff_section *Sec) const;
uint64_t getSectionSize(const coff_section *Sec) const;
Error getSectionContents(const coff_section *Sec,
ArrayRef<uint8_t> &Res) const;
uint64_t getImageBase() const;
Error getVaPtr(uint64_t VA, uintptr_t &Res) const;
Error getRvaPtr(uint32_t Rva, uintptr_t &Res,
const char *ErrorContext = nullptr) const;
/// Given an RVA base and size, returns a valid array of bytes or an error
/// code if the RVA and size is not contained completely within a valid
/// section.
Error getRvaAndSizeAsBytes(uint32_t RVA, uint32_t Size,
ArrayRef<uint8_t> &Contents,
const char *ErrorContext = nullptr) const;
Error getHintName(uint32_t Rva, uint16_t &Hint,
StringRef &Name) const;
/// Get PDB information out of a codeview debug directory entry.
Error getDebugPDBInfo(const debug_directory *DebugDir,
const codeview::DebugInfo *&Info,
StringRef &PDBFileName) const;
/// Get PDB information from an executable. If the information is not present,
/// Info will be set to nullptr and PDBFileName will be empty. An error is
/// returned only on corrupt object files. Convenience accessor that can be
/// used if the debug directory is not already handy.
Error getDebugPDBInfo(const codeview::DebugInfo *&Info,
StringRef &PDBFileName) const;
bool isRelocatableObject() const override;
bool is64() const { return PE32PlusHeader; }
StringRef mapDebugSectionName(StringRef Name) const override;
static bool classof(const Binary *v) { return v->isCOFF(); }
};
// The iterator for the import directory table.
class ImportDirectoryEntryRef {
public:
ImportDirectoryEntryRef() = default;
ImportDirectoryEntryRef(const coff_import_directory_table_entry *Table,
uint32_t I, const COFFObjectFile *Owner)
: ImportTable(Table), Index(I), OwningObject(Owner) {}
bool operator==(const ImportDirectoryEntryRef &Other) const;
void moveNext();
imported_symbol_iterator imported_symbol_begin() const;
imported_symbol_iterator imported_symbol_end() const;
iterator_range<imported_symbol_iterator> imported_symbols() const;
imported_symbol_iterator lookup_table_begin() const;
imported_symbol_iterator lookup_table_end() const;
iterator_range<imported_symbol_iterator> lookup_table_symbols() const;
Error getName(StringRef &Result) const;
Error getImportLookupTableRVA(uint32_t &Result) const;
Error getImportAddressTableRVA(uint32_t &Result) const;
Error
getImportTableEntry(const coff_import_directory_table_entry *&Result) const;
private:
const coff_import_directory_table_entry *ImportTable;
uint32_t Index;
const COFFObjectFile *OwningObject = nullptr;
};
class DelayImportDirectoryEntryRef {
public:
DelayImportDirectoryEntryRef() = default;
DelayImportDirectoryEntryRef(const delay_import_directory_table_entry *T,
uint32_t I, const COFFObjectFile *Owner)
: Table(T), Index(I), OwningObject(Owner) {}
bool operator==(const DelayImportDirectoryEntryRef &Other) const;
void moveNext();
imported_symbol_iterator imported_symbol_begin() const;
imported_symbol_iterator imported_symbol_end() const;
iterator_range<imported_symbol_iterator> imported_symbols() const;
Error getName(StringRef &Result) const;
Error getDelayImportTable(
const delay_import_directory_table_entry *&Result) const;
Error getImportAddress(int AddrIndex, uint64_t &Result) const;
private:
const delay_import_directory_table_entry *Table;
uint32_t Index;
const COFFObjectFile *OwningObject = nullptr;
};
// The iterator for the export directory table entry.
class ExportDirectoryEntryRef {
public:
ExportDirectoryEntryRef() = default;
ExportDirectoryEntryRef(const export_directory_table_entry *Table, uint32_t I,
const COFFObjectFile *Owner)
: ExportTable(Table), Index(I), OwningObject(Owner) {}
bool operator==(const ExportDirectoryEntryRef &Other) const;
void moveNext();
Error getDllName(StringRef &Result) const;
Error getOrdinalBase(uint32_t &Result) const;
Error getOrdinal(uint32_t &Result) const;
Error getExportRVA(uint32_t &Result) const;
Error getSymbolName(StringRef &Result) const;
Error isForwarder(bool &Result) const;
Error getForwardTo(StringRef &Result) const;
private:
const export_directory_table_entry *ExportTable;
uint32_t Index;
const COFFObjectFile *OwningObject = nullptr;
};
class ImportedSymbolRef {
public:
ImportedSymbolRef() = default;
ImportedSymbolRef(const import_lookup_table_entry32 *Entry, uint32_t I,
const COFFObjectFile *Owner)
: Entry32(Entry), Entry64(nullptr), Index(I), OwningObject(Owner) {}
ImportedSymbolRef(const import_lookup_table_entry64 *Entry, uint32_t I,
const COFFObjectFile *Owner)
: Entry32(nullptr), Entry64(Entry), Index(I), OwningObject(Owner) {}
bool operator==(const ImportedSymbolRef &Other) const;
void moveNext();
Error getSymbolName(StringRef &Result) const;
Error isOrdinal(bool &Result) const;
Error getOrdinal(uint16_t &Result) const;
Error getHintNameRVA(uint32_t &Result) const;
private:
const import_lookup_table_entry32 *Entry32;
const import_lookup_table_entry64 *Entry64;
uint32_t Index;
const COFFObjectFile *OwningObject = nullptr;
};
class BaseRelocRef {
public:
BaseRelocRef() = default;
BaseRelocRef(const coff_base_reloc_block_header *Header,
const COFFObjectFile *Owner)
: Header(Header), Index(0) {}
bool operator==(const BaseRelocRef &Other) const;
void moveNext();
Error getType(uint8_t &Type) const;
Error getRVA(uint32_t &Result) const;
private:
const coff_base_reloc_block_header *Header;
uint32_t Index;
};
class ResourceSectionRef {
public:
ResourceSectionRef() = default;
explicit ResourceSectionRef(StringRef Ref) : BBS(Ref, support::little) {}
Error load(const COFFObjectFile *O);
Error load(const COFFObjectFile *O, const SectionRef &S);
Expected<ArrayRef<UTF16>>
getEntryNameString(const coff_resource_dir_entry &Entry);
Expected<const coff_resource_dir_table &>
getEntrySubDir(const coff_resource_dir_entry &Entry);
Expected<const coff_resource_data_entry &>
getEntryData(const coff_resource_dir_entry &Entry);
Expected<const coff_resource_dir_table &> getBaseTable();
Expected<const coff_resource_dir_entry &>
getTableEntry(const coff_resource_dir_table &Table, uint32_t Index);
Expected<StringRef> getContents(const coff_resource_data_entry &Entry);
private:
BinaryByteStream BBS;
SectionRef Section;
const COFFObjectFile *Obj = nullptr;
std::vector<const coff_relocation *> Relocs;
Expected<const coff_resource_dir_table &> getTableAtOffset(uint32_t Offset);
Expected<const coff_resource_dir_entry &>
getTableEntryAtOffset(uint32_t Offset);
Expected<const coff_resource_data_entry &>
getDataEntryAtOffset(uint32_t Offset);
Expected<ArrayRef<UTF16>> getDirStringAtOffset(uint32_t Offset);
};
// Corresponds to `_FPO_DATA` structure in the PE/COFF spec.
struct FpoData {
support::ulittle32_t Offset; // ulOffStart: Offset 1st byte of function code
support::ulittle32_t Size; // cbProcSize: # bytes in function
support::ulittle32_t NumLocals; // cdwLocals: # bytes in locals/4
support::ulittle16_t NumParams; // cdwParams: # bytes in params/4
support::ulittle16_t Attributes;
// cbProlog: # bytes in prolog
int getPrologSize() const { return Attributes & 0xF; }
// cbRegs: # regs saved
int getNumSavedRegs() const { return (Attributes >> 8) & 0x7; }
// fHasSEH: true if seh is func
bool hasSEH() const { return (Attributes >> 9) & 1; }
// fUseBP: true if EBP has been allocated
bool useBP() const { return (Attributes >> 10) & 1; }
// cbFrame: frame pointer
frame_type getFP() const { return static_cast<frame_type>(Attributes >> 14); }
};
class SectionStrippedError
: public ErrorInfo<SectionStrippedError, BinaryError> {
public:
SectionStrippedError() { setErrorCode(object_error::section_stripped); }
};
} // end namespace object
} // end namespace llvm
#endif // LLVM_OBJECT_COFF_H
PK hwFZ��ۇ Object/WindowsMachineFlag.hnu �[��� //===- WindowsMachineFlag.h -------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Functions for implementing the /machine: flag.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_WINDOWSMACHINEFLAG_H
#define LLVM_OBJECT_WINDOWSMACHINEFLAG_H
namespace llvm {
class StringRef;
namespace COFF {
enum MachineTypes : unsigned;
}
// Returns a user-readable string for ARMNT, ARM64, AMD64, I386.
// Other MachineTypes values must not be passed in.
StringRef machineToStr(COFF::MachineTypes MT);
// Maps /machine: arguments to a MachineTypes value.
// Only returns ARMNT, ARM64, AMD64, I386, or IMAGE_FILE_MACHINE_UNKNOWN.
COFF::MachineTypes getMachineType(StringRef S);
}
#endif
PK hwFZ�iKo�} �} Object/XCOFFObjectFile.hnu �[��� //===- XCOFFObjectFile.h - XCOFF object file implementation -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the XCOFFObjectFile class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_XCOFFOBJECTFILE_H
#define LLVM_OBJECT_XCOFFOBJECTFILE_H
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/BinaryFormat/XCOFF.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/Support/Endian.h"
#include <limits>
namespace llvm {
namespace object {
struct XCOFFFileHeader32 {
support::ubig16_t Magic;
support::ubig16_t NumberOfSections;
// Unix time value, value of 0 indicates no timestamp.
// Negative values are reserved.
support::big32_t TimeStamp;
support::ubig32_t SymbolTableOffset; // File offset to symbol table.
support::big32_t NumberOfSymTableEntries;
support::ubig16_t AuxHeaderSize;
support::ubig16_t Flags;
};
struct XCOFFFileHeader64 {
support::ubig16_t Magic;
support::ubig16_t NumberOfSections;
// Unix time value, value of 0 indicates no timestamp.
// Negative values are reserved.
support::big32_t TimeStamp;
support::ubig64_t SymbolTableOffset; // File offset to symbol table.
support::ubig16_t AuxHeaderSize;
support::ubig16_t Flags;
support::ubig32_t NumberOfSymTableEntries;
};
template <typename T> struct XCOFFAuxiliaryHeader {
static constexpr uint8_t AuxiHeaderFlagMask = 0xF0;
static constexpr uint8_t AuxiHeaderTDataAlignmentMask = 0x0F;
public:
uint8_t getFlag() const {
return static_cast<const T *>(this)->FlagAndTDataAlignment &
AuxiHeaderFlagMask;
}
uint8_t getTDataAlignment() const {
return static_cast<const T *>(this)->FlagAndTDataAlignment &
AuxiHeaderTDataAlignmentMask;
}
uint16_t getVersion() const { return static_cast<const T *>(this)->Version; }
};
struct XCOFFAuxiliaryHeader32 : XCOFFAuxiliaryHeader<XCOFFAuxiliaryHeader32> {
support::ubig16_t
AuxMagic; ///< If the value of the o_vstamp field is greater than 1, the
///< o_mflags field is reserved for future use and it should
///< contain 0. Otherwise, this field is not used.
support::ubig16_t
Version; ///< The valid values are 1 and 2. When the o_vstamp field is 2
///< in an XCOFF32 file, the new interpretation of the n_type
///< field in the symbol table entry is used.
support::ubig32_t TextSize;
support::ubig32_t InitDataSize;
support::ubig32_t BssDataSize;
support::ubig32_t EntryPointAddr;
support::ubig32_t TextStartAddr;
support::ubig32_t DataStartAddr;
support::ubig32_t TOCAnchorAddr;
support::ubig16_t SecNumOfEntryPoint;
support::ubig16_t SecNumOfText;
support::ubig16_t SecNumOfData;
support::ubig16_t SecNumOfTOC;
support::ubig16_t SecNumOfLoader;
support::ubig16_t SecNumOfBSS;
support::ubig16_t MaxAlignOfText;
support::ubig16_t MaxAlignOfData;
support::ubig16_t ModuleType;
uint8_t CpuFlag;
uint8_t CpuType;
support::ubig32_t MaxStackSize; ///< If the value is 0, the system default
///< maximum stack size is used.
support::ubig32_t MaxDataSize; ///< If the value is 0, the system default
///< maximum data size is used.
support::ubig32_t
ReservedForDebugger; ///< This field should contain 0. When a loaded
///< program is being debugged, the memory image of
///< this field may be modified by a debugger to
///< insert a trap instruction.
uint8_t TextPageSize; ///< Specifies the size of pages for the exec text. The
///< default value is 0 (system-selected page size).
uint8_t DataPageSize; ///< Specifies the size of pages for the exec data. The
///< default value is 0 (system-selected page size).
uint8_t StackPageSize; ///< Specifies the size of pages for the stack. The
///< default value is 0 (system-selected page size).
uint8_t FlagAndTDataAlignment;
support::ubig16_t SecNumOfTData;
support::ubig16_t SecNumOfTBSS;
};
struct XCOFFAuxiliaryHeader64 : XCOFFAuxiliaryHeader<XCOFFAuxiliaryHeader64> {
support::ubig16_t AuxMagic;
support::ubig16_t Version;
support::ubig32_t ReservedForDebugger;
support::ubig64_t TextStartAddr;
support::ubig64_t DataStartAddr;
support::ubig64_t TOCAnchorAddr;
support::ubig16_t SecNumOfEntryPoint;
support::ubig16_t SecNumOfText;
support::ubig16_t SecNumOfData;
support::ubig16_t SecNumOfTOC;
support::ubig16_t SecNumOfLoader;
support::ubig16_t SecNumOfBSS;
support::ubig16_t MaxAlignOfText;
support::ubig16_t MaxAlignOfData;
support::ubig16_t ModuleType;
uint8_t CpuFlag;
uint8_t CpuType;
uint8_t TextPageSize;
uint8_t DataPageSize;
uint8_t StackPageSize;
uint8_t FlagAndTDataAlignment;
support::ubig64_t TextSize;
support::ubig64_t InitDataSize;
support::ubig64_t BssDataSize;
support::ubig64_t EntryPointAddr;
support::ubig64_t MaxStackSize;
support::ubig64_t MaxDataSize;
support::ubig16_t SecNumOfTData;
support::ubig16_t SecNumOfTBSS;
support::ubig16_t XCOFF64Flag;
};
template <typename T> struct XCOFFSectionHeader {
// Least significant 3 bits are reserved.
static constexpr unsigned SectionFlagsReservedMask = 0x7;
// The low order 16 bits of section flags denotes the section type.
static constexpr unsigned SectionFlagsTypeMask = 0xffffu;
public:
StringRef getName() const;
uint16_t getSectionType() const;
bool isReservedSectionType() const;
};
// Explicit extern template declarations.
struct XCOFFSectionHeader32;
struct XCOFFSectionHeader64;
extern template struct XCOFFSectionHeader<XCOFFSectionHeader32>;
extern template struct XCOFFSectionHeader<XCOFFSectionHeader64>;
struct XCOFFSectionHeader32 : XCOFFSectionHeader<XCOFFSectionHeader32> {
char Name[XCOFF::NameSize];
support::ubig32_t PhysicalAddress;
support::ubig32_t VirtualAddress;
support::ubig32_t SectionSize;
support::ubig32_t FileOffsetToRawData;
support::ubig32_t FileOffsetToRelocationInfo;
support::ubig32_t FileOffsetToLineNumberInfo;
support::ubig16_t NumberOfRelocations;
support::ubig16_t NumberOfLineNumbers;
support::big32_t Flags;
};
struct XCOFFSectionHeader64 : XCOFFSectionHeader<XCOFFSectionHeader64> {
char Name[XCOFF::NameSize];
support::ubig64_t PhysicalAddress;
support::ubig64_t VirtualAddress;
support::ubig64_t SectionSize;
support::big64_t FileOffsetToRawData;
support::big64_t FileOffsetToRelocationInfo;
support::big64_t FileOffsetToLineNumberInfo;
support::ubig32_t NumberOfRelocations;
support::ubig32_t NumberOfLineNumbers;
support::big32_t Flags;
char Padding[4];
};
struct LoaderSectionHeader32;
struct LoaderSectionHeader64;
struct LoaderSectionSymbolEntry32 {
struct NameOffsetInStrTbl {
support::big32_t IsNameInStrTbl; // Zero indicates name in string table.
support::ubig32_t Offset;
};
char SymbolName[XCOFF::NameSize];
support::ubig32_t Value; // The virtual address of the symbol.
support::big16_t SectionNumber;
uint8_t SymbolType;
XCOFF::StorageClass StorageClass;
support::ubig32_t ImportFileID;
support::ubig32_t ParameterTypeCheck;
Expected<StringRef>
getSymbolName(const LoaderSectionHeader32 *LoaderSecHeader) const;
};
struct LoaderSectionSymbolEntry64 {
support::ubig64_t Value; // The virtual address of the symbol.
support::ubig32_t Offset;
support::big16_t SectionNumber;
uint8_t SymbolType;
XCOFF::StorageClass StorageClass;
support::ubig32_t ImportFileID;
support::ubig32_t ParameterTypeCheck;
Expected<StringRef>
getSymbolName(const LoaderSectionHeader64 *LoaderSecHeader) const;
};
struct LoaderSectionRelocationEntry32 {
support::ubig32_t VirtualAddr;
support::big32_t SymbolIndex;
support::ubig16_t Type;
support::big16_t SectionNum;
};
struct LoaderSectionRelocationEntry64 {
support::ubig64_t VirtualAddr;
support::ubig16_t Type;
support::big16_t SectionNum;
support::big32_t SymbolIndex;
};
struct LoaderSectionHeader32 {
support::ubig32_t Version;
support::ubig32_t NumberOfSymTabEnt;
support::ubig32_t NumberOfRelTabEnt;
support::ubig32_t LengthOfImpidStrTbl;
support::ubig32_t NumberOfImpid;
support::big32_t OffsetToImpid;
support::ubig32_t LengthOfStrTbl;
support::big32_t OffsetToStrTbl;
uint64_t getOffsetToSymTbl() const {
return NumberOfSymTabEnt == 0 ? 0 : sizeof(LoaderSectionHeader32);
}
uint64_t getOffsetToRelEnt() const {
// Relocation table is after Symbol table.
return NumberOfRelTabEnt == 0
? 0
: sizeof(LoaderSectionHeader32) +
sizeof(LoaderSectionSymbolEntry32) * NumberOfSymTabEnt;
}
};
struct LoaderSectionHeader64 {
support::ubig32_t Version;
support::ubig32_t NumberOfSymTabEnt;
support::ubig32_t NumberOfRelTabEnt;
support::ubig32_t LengthOfImpidStrTbl;
support::ubig32_t NumberOfImpid;
support::ubig32_t LengthOfStrTbl;
support::big64_t OffsetToImpid;
support::big64_t OffsetToStrTbl;
support::big64_t OffsetToSymTbl;
support::big64_t OffsetToRelEnt;
uint64_t getOffsetToSymTbl() const { return OffsetToSymTbl; }
uint64_t getOffsetToRelEnt() const { return OffsetToRelEnt; }
};
template <typename AddressType> struct ExceptionSectionEntry {
union {
support::ubig32_t SymbolIdx;
AddressType TrapInstAddr;
};
uint8_t LangId;
uint8_t Reason;
uint32_t getSymbolIndex() const {
assert(Reason == 0 && "Get symbol table index of the function only when "
"the e_reason field is 0.");
return SymbolIdx;
}
uint64_t getTrapInstAddr() const {
assert(Reason != 0 && "Zero is not a valid trap exception reason code.");
return TrapInstAddr;
}
uint8_t getLangID() const { return LangId; }
uint8_t getReason() const { return Reason; }
};
typedef ExceptionSectionEntry<support::ubig32_t> ExceptionSectionEntry32;
typedef ExceptionSectionEntry<support::ubig64_t> ExceptionSectionEntry64;
// Explicit extern template declarations.
extern template struct ExceptionSectionEntry<support::ubig32_t>;
extern template struct ExceptionSectionEntry<support::ubig64_t>;
struct XCOFFStringTable {
uint32_t Size;
const char *Data;
};
struct XCOFFCsectAuxEnt32 {
support::ubig32_t SectionOrLength;
support::ubig32_t ParameterHashIndex;
support::ubig16_t TypeChkSectNum;
uint8_t SymbolAlignmentAndType;
XCOFF::StorageMappingClass StorageMappingClass;
support::ubig32_t StabInfoIndex;
support::ubig16_t StabSectNum;
};
struct XCOFFCsectAuxEnt64 {
support::ubig32_t SectionOrLengthLowByte;
support::ubig32_t ParameterHashIndex;
support::ubig16_t TypeChkSectNum;
uint8_t SymbolAlignmentAndType;
XCOFF::StorageMappingClass StorageMappingClass;
support::ubig32_t SectionOrLengthHighByte;
uint8_t Pad;
XCOFF::SymbolAuxType AuxType;
};
class XCOFFCsectAuxRef {
public:
static constexpr uint8_t SymbolTypeMask = 0x07;
static constexpr uint8_t SymbolAlignmentMask = 0xF8;
static constexpr size_t SymbolAlignmentBitOffset = 3;
XCOFFCsectAuxRef(const XCOFFCsectAuxEnt32 *Entry32) : Entry32(Entry32) {}
XCOFFCsectAuxRef(const XCOFFCsectAuxEnt64 *Entry64) : Entry64(Entry64) {}
// For getSectionOrLength(),
// If the symbol type is XTY_SD or XTY_CM, the csect length.
// If the symbol type is XTY_LD, the symbol table
// index of the containing csect.
// If the symbol type is XTY_ER, 0.
uint64_t getSectionOrLength() const {
return Entry32 ? getSectionOrLength32() : getSectionOrLength64();
}
uint32_t getSectionOrLength32() const {
assert(Entry32 && "32-bit interface called on 64-bit object file.");
return Entry32->SectionOrLength;
}
uint64_t getSectionOrLength64() const {
assert(Entry64 && "64-bit interface called on 32-bit object file.");
return (static_cast<uint64_t>(Entry64->SectionOrLengthHighByte) << 32) |
Entry64->SectionOrLengthLowByte;
}
#define GETVALUE(X) Entry32 ? Entry32->X : Entry64->X
uint32_t getParameterHashIndex() const {
return GETVALUE(ParameterHashIndex);
}
uint16_t getTypeChkSectNum() const { return GETVALUE(TypeChkSectNum); }
XCOFF::StorageMappingClass getStorageMappingClass() const {
return GETVALUE(StorageMappingClass);
}
uintptr_t getEntryAddress() const {
return Entry32 ? reinterpret_cast<uintptr_t>(Entry32)
: reinterpret_cast<uintptr_t>(Entry64);
}
uint16_t getAlignmentLog2() const {
return (getSymbolAlignmentAndType() & SymbolAlignmentMask) >>
SymbolAlignmentBitOffset;
}
uint8_t getSymbolType() const {
return getSymbolAlignmentAndType() & SymbolTypeMask;
}
bool isLabel() const { return getSymbolType() == XCOFF::XTY_LD; }
uint32_t getStabInfoIndex32() const {
assert(Entry32 && "32-bit interface called on 64-bit object file.");
return Entry32->StabInfoIndex;
}
uint16_t getStabSectNum32() const {
assert(Entry32 && "32-bit interface called on 64-bit object file.");
return Entry32->StabSectNum;
}
XCOFF::SymbolAuxType getAuxType64() const {
assert(Entry64 && "64-bit interface called on 32-bit object file.");
return Entry64->AuxType;
}
private:
uint8_t getSymbolAlignmentAndType() const {
return GETVALUE(SymbolAlignmentAndType);
}
#undef GETVALUE
const XCOFFCsectAuxEnt32 *Entry32 = nullptr;
const XCOFFCsectAuxEnt64 *Entry64 = nullptr;
};
struct XCOFFFileAuxEnt {
typedef struct {
support::big32_t Magic; // Zero indicates name in string table.
support::ubig32_t Offset;
char NamePad[XCOFF::FileNamePadSize];
} NameInStrTblType;
union {
char Name[XCOFF::NameSize + XCOFF::FileNamePadSize];
NameInStrTblType NameInStrTbl;
};
XCOFF::CFileStringType Type;
uint8_t ReservedZeros[2];
XCOFF::SymbolAuxType AuxType; // 64-bit XCOFF file only.
};
struct XCOFFSectAuxEntForStat {
support::ubig32_t SectionLength;
support::ubig16_t NumberOfRelocEnt;
support::ubig16_t NumberOfLineNum;
uint8_t Pad[10];
}; // 32-bit XCOFF file only.
struct XCOFFFunctionAuxEnt32 {
support::ubig32_t OffsetToExceptionTbl;
support::ubig32_t SizeOfFunction;
support::ubig32_t PtrToLineNum;
support::big32_t SymIdxOfNextBeyond;
uint8_t Pad[2];
};
struct XCOFFFunctionAuxEnt64 {
support::ubig64_t PtrToLineNum;
support::ubig32_t SizeOfFunction;
support::big32_t SymIdxOfNextBeyond;
uint8_t Pad;
XCOFF::SymbolAuxType AuxType; // Contains _AUX_FCN; Type of auxiliary entry
};
struct XCOFFExceptionAuxEnt {
support::ubig64_t OffsetToExceptionTbl;
support::ubig32_t SizeOfFunction;
support::big32_t SymIdxOfNextBeyond;
uint8_t Pad;
XCOFF::SymbolAuxType AuxType; // Contains _AUX_EXCEPT; Type of auxiliary entry
};
struct XCOFFBlockAuxEnt32 {
uint8_t ReservedZeros1[2];
support::ubig16_t LineNumHi;
support::ubig16_t LineNumLo;
uint8_t ReservedZeros2[12];
};
struct XCOFFBlockAuxEnt64 {
support::ubig32_t LineNum;
uint8_t Pad[13];
XCOFF::SymbolAuxType AuxType; // Contains _AUX_SYM; Type of auxiliary entry
};
struct XCOFFSectAuxEntForDWARF32 {
support::ubig32_t LengthOfSectionPortion;
uint8_t Pad1[4];
support::ubig32_t NumberOfRelocEnt;
uint8_t Pad2[6];
};
struct XCOFFSectAuxEntForDWARF64 {
support::ubig64_t LengthOfSectionPortion;
support::ubig64_t NumberOfRelocEnt;
uint8_t Pad;
XCOFF::SymbolAuxType AuxType; // Contains _AUX_SECT; Type of Auxillary entry
};
template <typename AddressType> struct XCOFFRelocation {
public:
AddressType VirtualAddress;
support::ubig32_t SymbolIndex;
// Packed field, see XR_* masks for details of packing.
uint8_t Info;
XCOFF::RelocationType Type;
public:
bool isRelocationSigned() const;
bool isFixupIndicated() const;
// Returns the number of bits being relocated.
uint8_t getRelocatedLength() const;
};
extern template struct XCOFFRelocation<llvm::support::ubig32_t>;
extern template struct XCOFFRelocation<llvm::support::ubig64_t>;
struct XCOFFRelocation32 : XCOFFRelocation<llvm::support::ubig32_t> {};
struct XCOFFRelocation64 : XCOFFRelocation<llvm::support::ubig64_t> {};
class XCOFFSymbolRef;
class XCOFFObjectFile : public ObjectFile {
private:
const void *FileHeader = nullptr;
const void *AuxiliaryHeader = nullptr;
const void *SectionHeaderTable = nullptr;
const void *SymbolTblPtr = nullptr;
XCOFFStringTable StringTable = {0, nullptr};
const XCOFFSectionHeader32 *sectionHeaderTable32() const;
const XCOFFSectionHeader64 *sectionHeaderTable64() const;
template <typename T> const T *sectionHeaderTable() const;
size_t getFileHeaderSize() const;
size_t getSectionHeaderSize() const;
const XCOFFSectionHeader32 *toSection32(DataRefImpl Ref) const;
const XCOFFSectionHeader64 *toSection64(DataRefImpl Ref) const;
uintptr_t getSectionHeaderTableAddress() const;
uintptr_t getEndOfSymbolTableAddress() const;
DataRefImpl getSectionByType(XCOFF::SectionTypeFlags SectType) const;
uint64_t getSectionFileOffsetToRawData(DataRefImpl Sec) const;
// This returns a pointer to the start of the storage for the name field of
// the 32-bit or 64-bit SectionHeader struct. This string is *not* necessarily
// null-terminated.
const char *getSectionNameInternal(DataRefImpl Sec) const;
static bool isReservedSectionNumber(int16_t SectionNumber);
// Constructor and "create" factory function. The constructor is only a thin
// wrapper around the base constructor. The "create" function fills out the
// XCOFF-specific information and performs the error checking along the way.
XCOFFObjectFile(unsigned Type, MemoryBufferRef Object);
static Expected<std::unique_ptr<XCOFFObjectFile>> create(unsigned Type,
MemoryBufferRef MBR);
// Helper for parsing the StringTable. Returns an 'Error' if parsing failed
// and an XCOFFStringTable if parsing succeeded.
static Expected<XCOFFStringTable> parseStringTable(const XCOFFObjectFile *Obj,
uint64_t Offset);
// Make a friend so it can call the private 'create' function.
friend Expected<std::unique_ptr<ObjectFile>>
ObjectFile::createXCOFFObjectFile(MemoryBufferRef Object, unsigned FileType);
void checkSectionAddress(uintptr_t Addr, uintptr_t TableAddr) const;
public:
static constexpr uint64_t InvalidRelocOffset =
std::numeric_limits<uint64_t>::max();
// Interface inherited from base classes.
void moveSymbolNext(DataRefImpl &Symb) const override;
Expected<uint32_t> getSymbolFlags(DataRefImpl Symb) const override;
basic_symbol_iterator symbol_begin() const override;
basic_symbol_iterator symbol_end() const override;
bool is64Bit() const override;
Expected<StringRef> getSymbolName(DataRefImpl Symb) const override;
Expected<uint64_t> getSymbolAddress(DataRefImpl Symb) const override;
uint64_t getSymbolValueImpl(DataRefImpl Symb) const override;
uint32_t getSymbolAlignment(DataRefImpl Symb) const override;
uint64_t getCommonSymbolSizeImpl(DataRefImpl Symb) const override;
Expected<SymbolRef::Type> getSymbolType(DataRefImpl Symb) const override;
Expected<section_iterator> getSymbolSection(DataRefImpl Symb) const override;
void moveSectionNext(DataRefImpl &Sec) const override;
Expected<StringRef> getSectionName(DataRefImpl Sec) const override;
uint64_t getSectionAddress(DataRefImpl Sec) const override;
uint64_t getSectionIndex(DataRefImpl Sec) const override;
uint64_t getSectionSize(DataRefImpl Sec) const override;
Expected<ArrayRef<uint8_t>>
getSectionContents(DataRefImpl Sec) const override;
uint64_t getSectionAlignment(DataRefImpl Sec) const override;
bool isSectionCompressed(DataRefImpl Sec) const override;
bool isSectionText(DataRefImpl Sec) const override;
bool isSectionData(DataRefImpl Sec) const override;
bool isSectionBSS(DataRefImpl Sec) const override;
bool isDebugSection(DataRefImpl Sec) const override;
bool isSectionVirtual(DataRefImpl Sec) const override;
relocation_iterator section_rel_begin(DataRefImpl Sec) const override;
relocation_iterator section_rel_end(DataRefImpl Sec) const override;
void moveRelocationNext(DataRefImpl &Rel) const override;
/// \returns the relocation offset with the base address of the containing
/// section as zero, or InvalidRelocOffset on errors (such as a relocation
/// that does not refer to an address in any section).
uint64_t getRelocationOffset(DataRefImpl Rel) const override;
symbol_iterator getRelocationSymbol(DataRefImpl Rel) const override;
uint64_t getRelocationType(DataRefImpl Rel) const override;
void getRelocationTypeName(DataRefImpl Rel,
SmallVectorImpl<char> &Result) const override;
section_iterator section_begin() const override;
section_iterator section_end() const override;
uint8_t getBytesInAddress() const override;
StringRef getFileFormatName() const override;
Triple::ArchType getArch() const override;
Expected<SubtargetFeatures> getFeatures() const override;
Expected<uint64_t> getStartAddress() const override;
StringRef mapDebugSectionName(StringRef Name) const override;
bool isRelocatableObject() const override;
// Below here is the non-inherited interface.
Expected<StringRef> getRawData(const char *Start, uint64_t Size,
StringRef Name) const;
const XCOFFAuxiliaryHeader32 *auxiliaryHeader32() const;
const XCOFFAuxiliaryHeader64 *auxiliaryHeader64() const;
const void *getPointerToSymbolTable() const { return SymbolTblPtr; }
Expected<StringRef> getSymbolSectionName(XCOFFSymbolRef Ref) const;
unsigned getSymbolSectionID(SymbolRef Sym) const;
XCOFFSymbolRef toSymbolRef(DataRefImpl Ref) const;
// File header related interfaces.
const XCOFFFileHeader32 *fileHeader32() const;
const XCOFFFileHeader64 *fileHeader64() const;
uint16_t getMagic() const;
uint16_t getNumberOfSections() const;
int32_t getTimeStamp() const;
// Symbol table offset and entry count are handled differently between
// XCOFF32 and XCOFF64.
uint32_t getSymbolTableOffset32() const;
uint64_t getSymbolTableOffset64() const;
// Note that this value is signed and might return a negative value. Negative
// values are reserved for future use.
int32_t getRawNumberOfSymbolTableEntries32() const;
// The sanitized value appropriate to use as an index into the symbol table.
uint32_t getLogicalNumberOfSymbolTableEntries32() const;
uint32_t getNumberOfSymbolTableEntries64() const;
// Return getLogicalNumberOfSymbolTableEntries32 or
// getNumberOfSymbolTableEntries64 depending on the object mode.
uint32_t getNumberOfSymbolTableEntries() const;
uint32_t getSymbolIndex(uintptr_t SymEntPtr) const;
uint64_t getSymbolSize(DataRefImpl Symb) const;
uintptr_t getSymbolByIndex(uint32_t Idx) const {
return reinterpret_cast<uintptr_t>(SymbolTblPtr) +
XCOFF::SymbolTableEntrySize * Idx;
}
uintptr_t getSymbolEntryAddressByIndex(uint32_t SymbolTableIndex) const;
Expected<StringRef> getSymbolNameByIndex(uint32_t SymbolTableIndex) const;
Expected<StringRef> getCFileName(const XCOFFFileAuxEnt *CFileEntPtr) const;
uint16_t getOptionalHeaderSize() const;
uint16_t getFlags() const;
// Section header table related interfaces.
ArrayRef<XCOFFSectionHeader32> sections32() const;
ArrayRef<XCOFFSectionHeader64> sections64() const;
int32_t getSectionFlags(DataRefImpl Sec) const;
Expected<DataRefImpl> getSectionByNum(int16_t Num) const;
Expected<uintptr_t>
getSectionFileOffsetToRawData(XCOFF::SectionTypeFlags SectType) const;
void checkSymbolEntryPointer(uintptr_t SymbolEntPtr) const;
// Relocation-related interfaces.
template <typename T>
Expected<uint32_t>
getNumberOfRelocationEntries(const XCOFFSectionHeader<T> &Sec) const;
template <typename Shdr, typename Reloc>
Expected<ArrayRef<Reloc>> relocations(const Shdr &Sec) const;
// Loader section related interfaces.
Expected<StringRef> getImportFileTable() const;
// Exception-related interface.
template <typename ExceptEnt>
Expected<ArrayRef<ExceptEnt>> getExceptionEntries() const;
// This function returns string table entry.
Expected<StringRef> getStringTableEntry(uint32_t Offset) const;
// This function returns the string table.
StringRef getStringTable() const;
const XCOFF::SymbolAuxType *getSymbolAuxType(uintptr_t AuxEntryAddress) const;
static uintptr_t getAdvancedSymbolEntryAddress(uintptr_t CurrentAddress,
uint32_t Distance);
static bool classof(const Binary *B) { return B->isXCOFF(); }
std::optional<StringRef> tryGetCPUName() const override;
}; // XCOFFObjectFile
typedef struct {
uint8_t LanguageId;
uint8_t CpuTypeId;
} CFileLanguageIdAndTypeIdType;
struct XCOFFSymbolEntry32 {
typedef struct {
support::big32_t Magic; // Zero indicates name in string table.
support::ubig32_t Offset;
} NameInStrTblType;
union {
char SymbolName[XCOFF::NameSize];
NameInStrTblType NameInStrTbl;
};
support::ubig32_t Value; // Symbol value; storage class-dependent.
support::big16_t SectionNumber;
union {
support::ubig16_t SymbolType;
CFileLanguageIdAndTypeIdType CFileLanguageIdAndTypeId;
};
XCOFF::StorageClass StorageClass;
uint8_t NumberOfAuxEntries;
};
struct XCOFFSymbolEntry64 {
support::ubig64_t Value; // Symbol value; storage class-dependent.
support::ubig32_t Offset;
support::big16_t SectionNumber;
union {
support::ubig16_t SymbolType;
CFileLanguageIdAndTypeIdType CFileLanguageIdAndTypeId;
};
XCOFF::StorageClass StorageClass;
uint8_t NumberOfAuxEntries;
};
class XCOFFSymbolRef {
public:
enum { NAME_IN_STR_TBL_MAGIC = 0x0 };
XCOFFSymbolRef(DataRefImpl SymEntDataRef,
const XCOFFObjectFile *OwningObjectPtr)
: OwningObjectPtr(OwningObjectPtr) {
assert(OwningObjectPtr && "OwningObjectPtr cannot be nullptr!");
assert(SymEntDataRef.p != 0 &&
"Symbol table entry pointer cannot be nullptr!");
if (OwningObjectPtr->is64Bit())
Entry64 = reinterpret_cast<const XCOFFSymbolEntry64 *>(SymEntDataRef.p);
else
Entry32 = reinterpret_cast<const XCOFFSymbolEntry32 *>(SymEntDataRef.p);
}
const XCOFFSymbolEntry32 *getSymbol32() { return Entry32; }
const XCOFFSymbolEntry64 *getSymbol64() { return Entry64; }
uint64_t getValue() const { return Entry32 ? getValue32() : getValue64(); }
uint32_t getValue32() const { return Entry32->Value; }
uint64_t getValue64() const { return Entry64->Value; }
#define GETVALUE(X) Entry32 ? Entry32->X : Entry64->X
int16_t getSectionNumber() const { return GETVALUE(SectionNumber); }
uint16_t getSymbolType() const { return GETVALUE(SymbolType); }
uint8_t getLanguageIdForCFile() const {
assert(getStorageClass() == XCOFF::C_FILE &&
"This interface is for C_FILE only.");
return GETVALUE(CFileLanguageIdAndTypeId.LanguageId);
}
uint8_t getCPUTypeIddForCFile() const {
assert(getStorageClass() == XCOFF::C_FILE &&
"This interface is for C_FILE only.");
return GETVALUE(CFileLanguageIdAndTypeId.CpuTypeId);
}
XCOFF::StorageClass getStorageClass() const { return GETVALUE(StorageClass); }
uint8_t getNumberOfAuxEntries() const { return GETVALUE(NumberOfAuxEntries); }
#undef GETVALUE
uintptr_t getEntryAddress() const {
return Entry32 ? reinterpret_cast<uintptr_t>(Entry32)
: reinterpret_cast<uintptr_t>(Entry64);
}
Expected<StringRef> getName() const;
bool isFunction() const;
bool isCsectSymbol() const;
Expected<XCOFFCsectAuxRef> getXCOFFCsectAuxRef() const;
private:
const XCOFFObjectFile *OwningObjectPtr;
const XCOFFSymbolEntry32 *Entry32 = nullptr;
const XCOFFSymbolEntry64 *Entry64 = nullptr;
};
class TBVectorExt {
uint16_t Data;
SmallString<32> VecParmsInfo;
TBVectorExt(StringRef TBvectorStrRef, Error &Err);
public:
static Expected<TBVectorExt> create(StringRef TBvectorStrRef);
uint8_t getNumberOfVRSaved() const;
bool isVRSavedOnStack() const;
bool hasVarArgs() const;
uint8_t getNumberOfVectorParms() const;
bool hasVMXInstruction() const;
SmallString<32> getVectorParmsInfo() const { return VecParmsInfo; };
};
/// This class provides methods to extract traceback table data from a buffer.
/// The various accessors may reference the buffer provided via the constructor.
class XCOFFTracebackTable {
const uint8_t *const TBPtr;
bool Is64BitObj;
std::optional<SmallString<32>> ParmsType;
std::optional<uint32_t> TraceBackTableOffset;
std::optional<uint32_t> HandlerMask;
std::optional<uint32_t> NumOfCtlAnchors;
std::optional<SmallVector<uint32_t, 8>> ControlledStorageInfoDisp;
std::optional<StringRef> FunctionName;
std::optional<uint8_t> AllocaRegister;
std::optional<TBVectorExt> VecExt;
std::optional<uint8_t> ExtensionTable;
std::optional<uint64_t> EhInfoDisp;
XCOFFTracebackTable(const uint8_t *Ptr, uint64_t &Size, Error &Err,
bool Is64Bit = false);
public:
/// Parse an XCOFF Traceback Table from \a Ptr with \a Size bytes.
/// Returns an XCOFFTracebackTable upon successful parsing, otherwise an
/// Error is returned.
///
/// \param[in] Ptr
/// A pointer that points just past the initial 4 bytes of zeros at the
/// beginning of an XCOFF Traceback Table.
///
/// \param[in, out] Size
/// A pointer that points to the length of the XCOFF Traceback Table.
/// If the XCOFF Traceback Table is not parsed successfully or there are
/// extra bytes that are not recognized, \a Size will be updated to be the
/// size up to the end of the last successfully parsed field of the table.
static Expected<XCOFFTracebackTable>
create(const uint8_t *Ptr, uint64_t &Size, bool Is64Bits = false);
uint8_t getVersion() const;
uint8_t getLanguageID() const;
bool isGlobalLinkage() const;
bool isOutOfLineEpilogOrPrologue() const;
bool hasTraceBackTableOffset() const;
bool isInternalProcedure() const;
bool hasControlledStorage() const;
bool isTOCless() const;
bool isFloatingPointPresent() const;
bool isFloatingPointOperationLogOrAbortEnabled() const;
bool isInterruptHandler() const;
bool isFuncNamePresent() const;
bool isAllocaUsed() const;
uint8_t getOnConditionDirective() const;
bool isCRSaved() const;
bool isLRSaved() const;
bool isBackChainStored() const;
bool isFixup() const;
uint8_t getNumOfFPRsSaved() const;
bool hasVectorInfo() const;
bool hasExtensionTable() const;
uint8_t getNumOfGPRsSaved() const;
uint8_t getNumberOfFixedParms() const;
uint8_t getNumberOfFPParms() const;
bool hasParmsOnStack() const;
const std::optional<SmallString<32>> &getParmsType() const {
return ParmsType;
}
const std::optional<uint32_t> &getTraceBackTableOffset() const {
return TraceBackTableOffset;
}
const std::optional<uint32_t> &getHandlerMask() const { return HandlerMask; }
const std::optional<uint32_t> &getNumOfCtlAnchors() {
return NumOfCtlAnchors;
}
const std::optional<SmallVector<uint32_t, 8>> &
getControlledStorageInfoDisp() {
return ControlledStorageInfoDisp;
}
const std::optional<StringRef> &getFunctionName() const {
return FunctionName;
}
const std::optional<uint8_t> &getAllocaRegister() const {
return AllocaRegister;
}
const std::optional<TBVectorExt> &getVectorExt() const { return VecExt; }
const std::optional<uint8_t> &getExtensionTable() const {
return ExtensionTable;
}
const std::optional<uint64_t> &getEhInfoDisp() const { return EhInfoDisp; }
};
bool doesXCOFFTracebackTableBegin(ArrayRef<uint8_t> Bytes);
} // namespace object
} // namespace llvm
#endif // LLVM_OBJECT_XCOFFOBJECTFILE_H
PK hwFZ;R��S� S� Object/ELF.hnu �[��� //===- ELF.h - ELF object file implementation -------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the ELFFile template class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_ELF_H
#define LLVM_OBJECT_ELF_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/MapVector.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/Object/ELFTypes.h"
#include "llvm/Object/Error.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <limits>
#include <utility>
namespace llvm {
namespace object {
struct VerdAux {
unsigned Offset;
std::string Name;
};
struct VerDef {
unsigned Offset;
unsigned Version;
unsigned Flags;
unsigned Ndx;
unsigned Cnt;
unsigned Hash;
std::string Name;
std::vector<VerdAux> AuxV;
};
struct VernAux {
unsigned Hash;
unsigned Flags;
unsigned Other;
unsigned Offset;
std::string Name;
};
struct VerNeed {
unsigned Version;
unsigned Cnt;
unsigned Offset;
std::string File;
std::vector<VernAux> AuxV;
};
struct VersionEntry {
std::string Name;
bool IsVerDef;
};
StringRef getELFRelocationTypeName(uint32_t Machine, uint32_t Type);
uint32_t getELFRelativeRelocationType(uint32_t Machine);
StringRef getELFSectionTypeName(uint32_t Machine, uint32_t Type);
// Subclasses of ELFFile may need this for template instantiation
inline std::pair<unsigned char, unsigned char>
getElfArchType(StringRef Object) {
if (Object.size() < ELF::EI_NIDENT)
return std::make_pair((uint8_t)ELF::ELFCLASSNONE,
(uint8_t)ELF::ELFDATANONE);
return std::make_pair((uint8_t)Object[ELF::EI_CLASS],
(uint8_t)Object[ELF::EI_DATA]);
}
enum PPCInstrMasks : uint64_t {
PADDI_R12_NO_DISP = 0x0610000039800000,
ADDIS_R12_TO_R2_NO_DISP = 0x3D820000,
ADDI_R12_TO_R2_NO_DISP = 0x39820000,
ADDI_R12_TO_R12_NO_DISP = 0x398C0000,
PLD_R12_NO_DISP = 0x04100000E5800000,
MTCTR_R12 = 0x7D8903A6,
BCTR = 0x4E800420,
};
template <class ELFT> class ELFFile;
template <class T> struct DataRegion {
// This constructor is used when we know the start and the size of a data
// region. We assume that Arr does not go past the end of the file.
DataRegion(ArrayRef<T> Arr) : First(Arr.data()), Size(Arr.size()) {}
// Sometimes we only know the start of a data region. We still don't want to
// read past the end of the file, so we provide the end of a buffer.
DataRegion(const T *Data, const uint8_t *BufferEnd)
: First(Data), BufEnd(BufferEnd) {}
Expected<T> operator[](uint64_t N) {
assert(Size || BufEnd);
if (Size) {
if (N >= *Size)
return createError(
"the index is greater than or equal to the number of entries (" +
Twine(*Size) + ")");
} else {
const uint8_t *EntryStart = (const uint8_t *)First + N * sizeof(T);
if (EntryStart + sizeof(T) > BufEnd)
return createError("can't read past the end of the file");
}
return *(First + N);
}
const T *First;
std::optional<uint64_t> Size;
const uint8_t *BufEnd = nullptr;
};
template <class ELFT>
std::string getSecIndexForError(const ELFFile<ELFT> &Obj,
const typename ELFT::Shdr &Sec) {
auto TableOrErr = Obj.sections();
if (TableOrErr)
return "[index " + std::to_string(&Sec - &TableOrErr->front()) + "]";
// To make this helper be more convenient for error reporting purposes we
// drop the error. But really it should never be triggered. Before this point,
// our code should have called 'sections()' and reported a proper error on
// failure.
llvm::consumeError(TableOrErr.takeError());
return "[unknown index]";
}
template <class ELFT>
static std::string describe(const ELFFile<ELFT> &Obj,
const typename ELFT::Shdr &Sec) {
unsigned SecNdx = &Sec - &cantFail(Obj.sections()).front();
return (object::getELFSectionTypeName(Obj.getHeader().e_machine,
Sec.sh_type) +
" section with index " + Twine(SecNdx))
.str();
}
template <class ELFT>
std::string getPhdrIndexForError(const ELFFile<ELFT> &Obj,
const typename ELFT::Phdr &Phdr) {
auto Headers = Obj.program_headers();
if (Headers)
return ("[index " + Twine(&Phdr - &Headers->front()) + "]").str();
// See comment in the getSecIndexForError() above.
llvm::consumeError(Headers.takeError());
return "[unknown index]";
}
static inline Error defaultWarningHandler(const Twine &Msg) {
return createError(Msg);
}
template <class ELFT>
class ELFFile {
public:
LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
// This is a callback that can be passed to a number of functions.
// It can be used to ignore non-critical errors (warnings), which is
// useful for dumpers, like llvm-readobj.
// It accepts a warning message string and returns a success
// when the warning should be ignored or an error otherwise.
using WarningHandler = llvm::function_ref<Error(const Twine &Msg)>;
const uint8_t *base() const { return Buf.bytes_begin(); }
const uint8_t *end() const { return base() + getBufSize(); }
size_t getBufSize() const { return Buf.size(); }
private:
StringRef Buf;
std::vector<Elf_Shdr> FakeSections;
SmallString<0> FakeSectionStrings;
ELFFile(StringRef Object);
public:
const Elf_Ehdr &getHeader() const {
return *reinterpret_cast<const Elf_Ehdr *>(base());
}
template <typename T>
Expected<const T *> getEntry(uint32_t Section, uint32_t Entry) const;
template <typename T>
Expected<const T *> getEntry(const Elf_Shdr &Section, uint32_t Entry) const;
Expected<std::vector<VerDef>>
getVersionDefinitions(const Elf_Shdr &Sec) const;
Expected<std::vector<VerNeed>> getVersionDependencies(
const Elf_Shdr &Sec,
WarningHandler WarnHandler = &defaultWarningHandler) const;
Expected<StringRef> getSymbolVersionByIndex(
uint32_t SymbolVersionIndex, bool &IsDefault,
SmallVector<std::optional<VersionEntry>, 0> &VersionMap,
std::optional<bool> IsSymHidden) const;
Expected<StringRef>
getStringTable(const Elf_Shdr &Section,
WarningHandler WarnHandler = &defaultWarningHandler) const;
Expected<StringRef> getStringTableForSymtab(const Elf_Shdr &Section) const;
Expected<StringRef> getStringTableForSymtab(const Elf_Shdr &Section,
Elf_Shdr_Range Sections) const;
Expected<StringRef> getLinkAsStrtab(const typename ELFT::Shdr &Sec) const;
Expected<ArrayRef<Elf_Word>> getSHNDXTable(const Elf_Shdr &Section) const;
Expected<ArrayRef<Elf_Word>> getSHNDXTable(const Elf_Shdr &Section,
Elf_Shdr_Range Sections) const;
Expected<uint64_t> getDynSymtabSize() const;
StringRef getRelocationTypeName(uint32_t Type) const;
void getRelocationTypeName(uint32_t Type,
SmallVectorImpl<char> &Result) const;
uint32_t getRelativeRelocationType() const;
std::string getDynamicTagAsString(unsigned Arch, uint64_t Type) const;
std::string getDynamicTagAsString(uint64_t Type) const;
/// Get the symbol for a given relocation.
Expected<const Elf_Sym *> getRelocationSymbol(const Elf_Rel &Rel,
const Elf_Shdr *SymTab) const;
Expected<SmallVector<std::optional<VersionEntry>, 0>>
loadVersionMap(const Elf_Shdr *VerNeedSec, const Elf_Shdr *VerDefSec) const;
static Expected<ELFFile> create(StringRef Object);
bool isLE() const {
return getHeader().getDataEncoding() == ELF::ELFDATA2LSB;
}
bool isMipsELF64() const {
return getHeader().e_machine == ELF::EM_MIPS &&
getHeader().getFileClass() == ELF::ELFCLASS64;
}
bool isMips64EL() const { return isMipsELF64() && isLE(); }
Expected<Elf_Shdr_Range> sections() const;
Expected<Elf_Dyn_Range> dynamicEntries() const;
Expected<const uint8_t *>
toMappedAddr(uint64_t VAddr,
WarningHandler WarnHandler = &defaultWarningHandler) const;
Expected<Elf_Sym_Range> symbols(const Elf_Shdr *Sec) const {
if (!Sec)
return ArrayRef<Elf_Sym>(nullptr, nullptr);
return getSectionContentsAsArray<Elf_Sym>(*Sec);
}
Expected<Elf_Rela_Range> relas(const Elf_Shdr &Sec) const {
return getSectionContentsAsArray<Elf_Rela>(Sec);
}
Expected<Elf_Rel_Range> rels(const Elf_Shdr &Sec) const {
return getSectionContentsAsArray<Elf_Rel>(Sec);
}
Expected<Elf_Relr_Range> relrs(const Elf_Shdr &Sec) const {
return getSectionContentsAsArray<Elf_Relr>(Sec);
}
std::vector<Elf_Rel> decode_relrs(Elf_Relr_Range relrs) const;
Expected<std::vector<Elf_Rela>> android_relas(const Elf_Shdr &Sec) const;
/// Iterate over program header table.
Expected<Elf_Phdr_Range> program_headers() const {
if (getHeader().e_phnum && getHeader().e_phentsize != sizeof(Elf_Phdr))
return createError("invalid e_phentsize: " +
Twine(getHeader().e_phentsize));
uint64_t HeadersSize =
(uint64_t)getHeader().e_phnum * getHeader().e_phentsize;
uint64_t PhOff = getHeader().e_phoff;
if (PhOff + HeadersSize < PhOff || PhOff + HeadersSize > getBufSize())
return createError("program headers are longer than binary of size " +
Twine(getBufSize()) + ": e_phoff = 0x" +
Twine::utohexstr(getHeader().e_phoff) +
", e_phnum = " + Twine(getHeader().e_phnum) +
", e_phentsize = " + Twine(getHeader().e_phentsize));
auto *Begin = reinterpret_cast<const Elf_Phdr *>(base() + PhOff);
return ArrayRef(Begin, Begin + getHeader().e_phnum);
}
/// Get an iterator over notes in a program header.
///
/// The program header must be of type \c PT_NOTE.
///
/// \param Phdr the program header to iterate over.
/// \param Err [out] an error to support fallible iteration, which should
/// be checked after iteration ends.
Elf_Note_Iterator notes_begin(const Elf_Phdr &Phdr, Error &Err) const {
assert(Phdr.p_type == ELF::PT_NOTE && "Phdr is not of type PT_NOTE");
ErrorAsOutParameter ErrAsOutParam(&Err);
if (Phdr.p_offset + Phdr.p_filesz > getBufSize()) {
Err =
createError("invalid offset (0x" + Twine::utohexstr(Phdr.p_offset) +
") or size (0x" + Twine::utohexstr(Phdr.p_filesz) + ")");
return Elf_Note_Iterator(Err);
}
// Allow 4, 8, and (for Linux core dumps) 0.
// TODO: Disallow 1 after all tests are fixed.
if (Phdr.p_align != 0 && Phdr.p_align != 1 && Phdr.p_align != 4 &&
Phdr.p_align != 8) {
Err =
createError("alignment (" + Twine(Phdr.p_align) + ") is not 4 or 8");
return Elf_Note_Iterator(Err);
}
return Elf_Note_Iterator(base() + Phdr.p_offset, Phdr.p_filesz,
std::max<size_t>(Phdr.p_align, 4), Err);
}
/// Get an iterator over notes in a section.
///
/// The section must be of type \c SHT_NOTE.
///
/// \param Shdr the section to iterate over.
/// \param Err [out] an error to support fallible iteration, which should
/// be checked after iteration ends.
Elf_Note_Iterator notes_begin(const Elf_Shdr &Shdr, Error &Err) const {
assert(Shdr.sh_type == ELF::SHT_NOTE && "Shdr is not of type SHT_NOTE");
ErrorAsOutParameter ErrAsOutParam(&Err);
if (Shdr.sh_offset + Shdr.sh_size > getBufSize()) {
Err =
createError("invalid offset (0x" + Twine::utohexstr(Shdr.sh_offset) +
") or size (0x" + Twine::utohexstr(Shdr.sh_size) + ")");
return Elf_Note_Iterator(Err);
}
// TODO: Allow just 4 and 8 after all tests are fixed.
if (Shdr.sh_addralign != 0 && Shdr.sh_addralign != 1 &&
Shdr.sh_addralign != 4 && Shdr.sh_addralign != 8) {
Err = createError("alignment (" + Twine(Shdr.sh_addralign) +
") is not 4 or 8");
return Elf_Note_Iterator(Err);
}
return Elf_Note_Iterator(base() + Shdr.sh_offset, Shdr.sh_size,
std::max<size_t>(Shdr.sh_addralign, 4), Err);
}
/// Get the end iterator for notes.
Elf_Note_Iterator notes_end() const {
return Elf_Note_Iterator();
}
/// Get an iterator range over notes of a program header.
///
/// The program header must be of type \c PT_NOTE.
///
/// \param Phdr the program header to iterate over.
/// \param Err [out] an error to support fallible iteration, which should
/// be checked after iteration ends.
iterator_range<Elf_Note_Iterator> notes(const Elf_Phdr &Phdr,
Error &Err) const {
return make_range(notes_begin(Phdr, Err), notes_end());
}
/// Get an iterator range over notes of a section.
///
/// The section must be of type \c SHT_NOTE.
///
/// \param Shdr the section to iterate over.
/// \param Err [out] an error to support fallible iteration, which should
/// be checked after iteration ends.
iterator_range<Elf_Note_Iterator> notes(const Elf_Shdr &Shdr,
Error &Err) const {
return make_range(notes_begin(Shdr, Err), notes_end());
}
Expected<StringRef> getSectionStringTable(
Elf_Shdr_Range Sections,
WarningHandler WarnHandler = &defaultWarningHandler) const;
Expected<uint32_t> getSectionIndex(const Elf_Sym &Sym, Elf_Sym_Range Syms,
DataRegion<Elf_Word> ShndxTable) const;
Expected<const Elf_Shdr *> getSection(const Elf_Sym &Sym,
const Elf_Shdr *SymTab,
DataRegion<Elf_Word> ShndxTable) const;
Expected<const Elf_Shdr *> getSection(const Elf_Sym &Sym,
Elf_Sym_Range Symtab,
DataRegion<Elf_Word> ShndxTable) const;
Expected<const Elf_Shdr *> getSection(uint32_t Index) const;
Expected<const Elf_Sym *> getSymbol(const Elf_Shdr *Sec,
uint32_t Index) const;
Expected<StringRef>
getSectionName(const Elf_Shdr &Section,
WarningHandler WarnHandler = &defaultWarningHandler) const;
Expected<StringRef> getSectionName(const Elf_Shdr &Section,
StringRef DotShstrtab) const;
template <typename T>
Expected<ArrayRef<T>> getSectionContentsAsArray(const Elf_Shdr &Sec) const;
Expected<ArrayRef<uint8_t>> getSectionContents(const Elf_Shdr &Sec) const;
Expected<ArrayRef<uint8_t>> getSegmentContents(const Elf_Phdr &Phdr) const;
/// Returns a vector of BBAddrMap structs corresponding to each function
/// within the text section that the SHT_LLVM_BB_ADDR_MAP section \p Sec
/// is associated with. If the current ELFFile is relocatable, a corresponding
/// \p RelaSec must be passed in as an argument.
Expected<std::vector<BBAddrMap>>
decodeBBAddrMap(const Elf_Shdr &Sec, const Elf_Shdr *RelaSec = nullptr) const;
/// Returns a map from every section matching \p IsMatch to its relocation
/// section, or \p nullptr if it has no relocation section. This function
/// returns an error if any of the \p IsMatch calls fail or if it fails to
/// retrieve the content section of any relocation section.
Expected<MapVector<const Elf_Shdr *, const Elf_Shdr *>>
getSectionAndRelocations(
std::function<Expected<bool>(const Elf_Shdr &)> IsMatch) const;
void createFakeSections();
};
using ELF32LEFile = ELFFile<ELF32LE>;
using ELF64LEFile = ELFFile<ELF64LE>;
using ELF32BEFile = ELFFile<ELF32BE>;
using ELF64BEFile = ELFFile<ELF64BE>;
template <class ELFT>
inline Expected<const typename ELFT::Shdr *>
getSection(typename ELFT::ShdrRange Sections, uint32_t Index) {
if (Index >= Sections.size())
return createError("invalid section index: " + Twine(Index));
return &Sections[Index];
}
template <class ELFT>
inline Expected<uint32_t>
getExtendedSymbolTableIndex(const typename ELFT::Sym &Sym, unsigned SymIndex,
DataRegion<typename ELFT::Word> ShndxTable) {
assert(Sym.st_shndx == ELF::SHN_XINDEX);
if (!ShndxTable.First)
return createError(
"found an extended symbol index (" + Twine(SymIndex) +
"), but unable to locate the extended symbol index table");
Expected<typename ELFT::Word> TableOrErr = ShndxTable[SymIndex];
if (!TableOrErr)
return createError("unable to read an extended symbol table at index " +
Twine(SymIndex) + ": " +
toString(TableOrErr.takeError()));
return *TableOrErr;
}
template <class ELFT>
Expected<uint32_t>
ELFFile<ELFT>::getSectionIndex(const Elf_Sym &Sym, Elf_Sym_Range Syms,
DataRegion<Elf_Word> ShndxTable) const {
uint32_t Index = Sym.st_shndx;
if (Index == ELF::SHN_XINDEX) {
Expected<uint32_t> ErrorOrIndex =
getExtendedSymbolTableIndex<ELFT>(Sym, &Sym - Syms.begin(), ShndxTable);
if (!ErrorOrIndex)
return ErrorOrIndex.takeError();
return *ErrorOrIndex;
}
if (Index == ELF::SHN_UNDEF || Index >= ELF::SHN_LORESERVE)
return 0;
return Index;
}
template <class ELFT>
Expected<const typename ELFT::Shdr *>
ELFFile<ELFT>::getSection(const Elf_Sym &Sym, const Elf_Shdr *SymTab,
DataRegion<Elf_Word> ShndxTable) const {
auto SymsOrErr = symbols(SymTab);
if (!SymsOrErr)
return SymsOrErr.takeError();
return getSection(Sym, *SymsOrErr, ShndxTable);
}
template <class ELFT>
Expected<const typename ELFT::Shdr *>
ELFFile<ELFT>::getSection(const Elf_Sym &Sym, Elf_Sym_Range Symbols,
DataRegion<Elf_Word> ShndxTable) const {
auto IndexOrErr = getSectionIndex(Sym, Symbols, ShndxTable);
if (!IndexOrErr)
return IndexOrErr.takeError();
uint32_t Index = *IndexOrErr;
if (Index == 0)
return nullptr;
return getSection(Index);
}
template <class ELFT>
Expected<const typename ELFT::Sym *>
ELFFile<ELFT>::getSymbol(const Elf_Shdr *Sec, uint32_t Index) const {
auto SymsOrErr = symbols(Sec);
if (!SymsOrErr)
return SymsOrErr.takeError();
Elf_Sym_Range Symbols = *SymsOrErr;
if (Index >= Symbols.size())
return createError("unable to get symbol from section " +
getSecIndexForError(*this, *Sec) +
": invalid symbol index (" + Twine(Index) + ")");
return &Symbols[Index];
}
template <class ELFT>
template <typename T>
Expected<ArrayRef<T>>
ELFFile<ELFT>::getSectionContentsAsArray(const Elf_Shdr &Sec) const {
if (Sec.sh_entsize != sizeof(T) && sizeof(T) != 1)
return createError("section " + getSecIndexForError(*this, Sec) +
" has invalid sh_entsize: expected " + Twine(sizeof(T)) +
", but got " + Twine(Sec.sh_entsize));
uintX_t Offset = Sec.sh_offset;
uintX_t Size = Sec.sh_size;
if (Size % sizeof(T))
return createError("section " + getSecIndexForError(*this, Sec) +
" has an invalid sh_size (" + Twine(Size) +
") which is not a multiple of its sh_entsize (" +
Twine(Sec.sh_entsize) + ")");
if (std::numeric_limits<uintX_t>::max() - Offset < Size)
return createError("section " + getSecIndexForError(*this, Sec) +
" has a sh_offset (0x" + Twine::utohexstr(Offset) +
") + sh_size (0x" + Twine::utohexstr(Size) +
") that cannot be represented");
if (Offset + Size > Buf.size())
return createError("section " + getSecIndexForError(*this, Sec) +
" has a sh_offset (0x" + Twine::utohexstr(Offset) +
") + sh_size (0x" + Twine::utohexstr(Size) +
") that is greater than the file size (0x" +
Twine::utohexstr(Buf.size()) + ")");
if (Offset % alignof(T))
// TODO: this error is untested.
return createError("unaligned data");
const T *Start = reinterpret_cast<const T *>(base() + Offset);
return ArrayRef(Start, Size / sizeof(T));
}
template <class ELFT>
Expected<ArrayRef<uint8_t>>
ELFFile<ELFT>::getSegmentContents(const Elf_Phdr &Phdr) const {
uintX_t Offset = Phdr.p_offset;
uintX_t Size = Phdr.p_filesz;
if (std::numeric_limits<uintX_t>::max() - Offset < Size)
return createError("program header " + getPhdrIndexForError(*this, Phdr) +
" has a p_offset (0x" + Twine::utohexstr(Offset) +
") + p_filesz (0x" + Twine::utohexstr(Size) +
") that cannot be represented");
if (Offset + Size > Buf.size())
return createError("program header " + getPhdrIndexForError(*this, Phdr) +
" has a p_offset (0x" + Twine::utohexstr(Offset) +
") + p_filesz (0x" + Twine::utohexstr(Size) +
") that is greater than the file size (0x" +
Twine::utohexstr(Buf.size()) + ")");
return ArrayRef(base() + Offset, Size);
}
template <class ELFT>
Expected<ArrayRef<uint8_t>>
ELFFile<ELFT>::getSectionContents(const Elf_Shdr &Sec) const {
return getSectionContentsAsArray<uint8_t>(Sec);
}
template <class ELFT>
StringRef ELFFile<ELFT>::getRelocationTypeName(uint32_t Type) const {
return getELFRelocationTypeName(getHeader().e_machine, Type);
}
template <class ELFT>
void ELFFile<ELFT>::getRelocationTypeName(uint32_t Type,
SmallVectorImpl<char> &Result) const {
if (!isMipsELF64()) {
StringRef Name = getRelocationTypeName(Type);
Result.append(Name.begin(), Name.end());
} else {
// The Mips N64 ABI allows up to three operations to be specified per
// relocation record. Unfortunately there's no easy way to test for the
// presence of N64 ELFs as they have no special flag that identifies them
// as being N64. We can safely assume at the moment that all Mips
// ELFCLASS64 ELFs are N64. New Mips64 ABIs should provide enough
// information to disambiguate between old vs new ABIs.
uint8_t Type1 = (Type >> 0) & 0xFF;
uint8_t Type2 = (Type >> 8) & 0xFF;
uint8_t Type3 = (Type >> 16) & 0xFF;
// Concat all three relocation type names.
StringRef Name = getRelocationTypeName(Type1);
Result.append(Name.begin(), Name.end());
Name = getRelocationTypeName(Type2);
Result.append(1, '/');
Result.append(Name.begin(), Name.end());
Name = getRelocationTypeName(Type3);
Result.append(1, '/');
Result.append(Name.begin(), Name.end());
}
}
template <class ELFT>
uint32_t ELFFile<ELFT>::getRelativeRelocationType() const {
return getELFRelativeRelocationType(getHeader().e_machine);
}
template <class ELFT>
Expected<SmallVector<std::optional<VersionEntry>, 0>>
ELFFile<ELFT>::loadVersionMap(const Elf_Shdr *VerNeedSec,
const Elf_Shdr *VerDefSec) const {
SmallVector<std::optional<VersionEntry>, 0> VersionMap;
// The first two version indexes are reserved.
// Index 0 is VER_NDX_LOCAL, index 1 is VER_NDX_GLOBAL.
VersionMap.push_back(VersionEntry());
VersionMap.push_back(VersionEntry());
auto InsertEntry = [&](unsigned N, StringRef Version, bool IsVerdef) {
if (N >= VersionMap.size())
VersionMap.resize(N + 1);
VersionMap[N] = {std::string(Version), IsVerdef};
};
if (VerDefSec) {
Expected<std::vector<VerDef>> Defs = getVersionDefinitions(*VerDefSec);
if (!Defs)
return Defs.takeError();
for (const VerDef &Def : *Defs)
InsertEntry(Def.Ndx & ELF::VERSYM_VERSION, Def.Name, true);
}
if (VerNeedSec) {
Expected<std::vector<VerNeed>> Deps = getVersionDependencies(*VerNeedSec);
if (!Deps)
return Deps.takeError();
for (const VerNeed &Dep : *Deps)
for (const VernAux &Aux : Dep.AuxV)
InsertEntry(Aux.Other & ELF::VERSYM_VERSION, Aux.Name, false);
}
return VersionMap;
}
template <class ELFT>
Expected<const typename ELFT::Sym *>
ELFFile<ELFT>::getRelocationSymbol(const Elf_Rel &Rel,
const Elf_Shdr *SymTab) const {
uint32_t Index = Rel.getSymbol(isMips64EL());
if (Index == 0)
return nullptr;
return getEntry<Elf_Sym>(*SymTab, Index);
}
template <class ELFT>
Expected<StringRef>
ELFFile<ELFT>::getSectionStringTable(Elf_Shdr_Range Sections,
WarningHandler WarnHandler) const {
uint32_t Index = getHeader().e_shstrndx;
if (Index == ELF::SHN_XINDEX) {
// If the section name string table section index is greater than
// or equal to SHN_LORESERVE, then the actual index of the section name
// string table section is contained in the sh_link field of the section
// header at index 0.
if (Sections.empty())
return createError(
"e_shstrndx == SHN_XINDEX, but the section header table is empty");
Index = Sections[0].sh_link;
}
// There is no section name string table. Return FakeSectionStrings which
// is non-empty if we have created fake sections.
if (!Index)
return FakeSectionStrings;
if (Index >= Sections.size())
return createError("section header string table index " + Twine(Index) +
" does not exist");
return getStringTable(Sections[Index], WarnHandler);
}
/// This function finds the number of dynamic symbols using a GNU hash table.
///
/// @param Table The GNU hash table for .dynsym.
template <class ELFT>
static Expected<uint64_t>
getDynSymtabSizeFromGnuHash(const typename ELFT::GnuHash &Table,
const void *BufEnd) {
using Elf_Word = typename ELFT::Word;
if (Table.nbuckets == 0)
return Table.symndx + 1;
uint64_t LastSymIdx = 0;
// Find the index of the first symbol in the last chain.
for (Elf_Word Val : Table.buckets())
LastSymIdx = std::max(LastSymIdx, (uint64_t)Val);
const Elf_Word *It =
reinterpret_cast<const Elf_Word *>(Table.values(LastSymIdx).end());
// Locate the end of the chain to find the last symbol index.
while (It < BufEnd && (*It & 1) == 0) {
++LastSymIdx;
++It;
}
if (It >= BufEnd) {
return createStringError(
object_error::parse_failed,
"no terminator found for GNU hash section before buffer end");
}
return LastSymIdx + 1;
}
/// This function determines the number of dynamic symbols. It reads section
/// headers first. If section headers are not available, the number of
/// symbols will be inferred by parsing dynamic hash tables.
template <class ELFT>
Expected<uint64_t> ELFFile<ELFT>::getDynSymtabSize() const {
// Read .dynsym section header first if available.
Expected<Elf_Shdr_Range> SectionsOrError = sections();
if (!SectionsOrError)
return SectionsOrError.takeError();
for (const Elf_Shdr &Sec : *SectionsOrError) {
if (Sec.sh_type == ELF::SHT_DYNSYM) {
if (Sec.sh_size % Sec.sh_entsize != 0) {
return createStringError(object_error::parse_failed,
"SHT_DYNSYM section has sh_size (" +
Twine(Sec.sh_size) + ") % sh_entsize (" +
Twine(Sec.sh_entsize) + ") that is not 0");
}
return Sec.sh_size / Sec.sh_entsize;
}
}
if (!SectionsOrError->empty()) {
// Section headers are available but .dynsym header is not found.
// Return 0 as .dynsym does not exist.
return 0;
}
// Section headers do not exist. Falling back to infer
// upper bound of .dynsym from .gnu.hash and .hash.
Expected<Elf_Dyn_Range> DynTable = dynamicEntries();
if (!DynTable)
return DynTable.takeError();
std::optional<uint64_t> ElfHash;
std::optional<uint64_t> ElfGnuHash;
for (const Elf_Dyn &Entry : *DynTable) {
switch (Entry.d_tag) {
case ELF::DT_HASH:
ElfHash = Entry.d_un.d_ptr;
break;
case ELF::DT_GNU_HASH:
ElfGnuHash = Entry.d_un.d_ptr;
break;
}
}
if (ElfGnuHash) {
Expected<const uint8_t *> TablePtr = toMappedAddr(*ElfGnuHash);
if (!TablePtr)
return TablePtr.takeError();
const Elf_GnuHash *Table =
reinterpret_cast<const Elf_GnuHash *>(TablePtr.get());
return getDynSymtabSizeFromGnuHash<ELFT>(*Table, this->Buf.bytes_end());
}
// Search SYSV hash table to try to find the upper bound of dynsym.
if (ElfHash) {
Expected<const uint8_t *> TablePtr = toMappedAddr(*ElfHash);
if (!TablePtr)
return TablePtr.takeError();
const Elf_Hash *Table = reinterpret_cast<const Elf_Hash *>(TablePtr.get());
return Table->nchain;
}
return 0;
}
template <class ELFT> ELFFile<ELFT>::ELFFile(StringRef Object) : Buf(Object) {}
template <class ELFT>
Expected<ELFFile<ELFT>> ELFFile<ELFT>::create(StringRef Object) {
if (sizeof(Elf_Ehdr) > Object.size())
return createError("invalid buffer: the size (" + Twine(Object.size()) +
") is smaller than an ELF header (" +
Twine(sizeof(Elf_Ehdr)) + ")");
return ELFFile(Object);
}
/// Used by llvm-objdump -d (which needs sections for disassembly) to
/// disassemble objects without a section header table (e.g. ET_CORE objects
/// analyzed by linux perf or ET_EXEC with llvm-strip --strip-sections).
template <class ELFT> void ELFFile<ELFT>::createFakeSections() {
if (!FakeSections.empty())
return;
auto PhdrsOrErr = program_headers();
if (!PhdrsOrErr)
return;
FakeSectionStrings += '\0';
for (auto [Idx, Phdr] : llvm::enumerate(*PhdrsOrErr)) {
if (Phdr.p_type != ELF::PT_LOAD || !(Phdr.p_flags & ELF::PF_X))
continue;
Elf_Shdr FakeShdr = {};
FakeShdr.sh_type = ELF::SHT_PROGBITS;
FakeShdr.sh_flags = ELF::SHF_ALLOC | ELF::SHF_EXECINSTR;
FakeShdr.sh_addr = Phdr.p_vaddr;
FakeShdr.sh_size = Phdr.p_memsz;
FakeShdr.sh_offset = Phdr.p_offset;
// Create a section name based on the p_type and index.
FakeShdr.sh_name = FakeSectionStrings.size();
FakeSectionStrings += ("PT_LOAD#" + Twine(Idx)).str();
FakeSectionStrings += '\0';
FakeSections.push_back(FakeShdr);
}
}
template <class ELFT>
Expected<typename ELFT::ShdrRange> ELFFile<ELFT>::sections() const {
const uintX_t SectionTableOffset = getHeader().e_shoff;
if (SectionTableOffset == 0) {
if (!FakeSections.empty())
return ArrayRef(FakeSections.data(), FakeSections.size());
return ArrayRef<Elf_Shdr>();
}
if (getHeader().e_shentsize != sizeof(Elf_Shdr))
return createError("invalid e_shentsize in ELF header: " +
Twine(getHeader().e_shentsize));
const uint64_t FileSize = Buf.size();
if (SectionTableOffset + sizeof(Elf_Shdr) > FileSize ||
SectionTableOffset + (uintX_t)sizeof(Elf_Shdr) < SectionTableOffset)
return createError(
"section header table goes past the end of the file: e_shoff = 0x" +
Twine::utohexstr(SectionTableOffset));
// Invalid address alignment of section headers
if (SectionTableOffset & (alignof(Elf_Shdr) - 1))
// TODO: this error is untested.
return createError("invalid alignment of section headers");
const Elf_Shdr *First =
reinterpret_cast<const Elf_Shdr *>(base() + SectionTableOffset);
uintX_t NumSections = getHeader().e_shnum;
if (NumSections == 0)
NumSections = First->sh_size;
if (NumSections > UINT64_MAX / sizeof(Elf_Shdr))
return createError("invalid number of sections specified in the NULL "
"section's sh_size field (" +
Twine(NumSections) + ")");
const uint64_t SectionTableSize = NumSections * sizeof(Elf_Shdr);
if (SectionTableOffset + SectionTableSize < SectionTableOffset)
return createError(
"invalid section header table offset (e_shoff = 0x" +
Twine::utohexstr(SectionTableOffset) +
") or invalid number of sections specified in the first section "
"header's sh_size field (0x" +
Twine::utohexstr(NumSections) + ")");
// Section table goes past end of file!
if (SectionTableOffset + SectionTableSize > FileSize)
return createError("section table goes past the end of file");
return ArrayRef(First, NumSections);
}
template <class ELFT>
template <typename T>
Expected<const T *> ELFFile<ELFT>::getEntry(uint32_t Section,
uint32_t Entry) const {
auto SecOrErr = getSection(Section);
if (!SecOrErr)
return SecOrErr.takeError();
return getEntry<T>(**SecOrErr, Entry);
}
template <class ELFT>
template <typename T>
Expected<const T *> ELFFile<ELFT>::getEntry(const Elf_Shdr &Section,
uint32_t Entry) const {
Expected<ArrayRef<T>> EntriesOrErr = getSectionContentsAsArray<T>(Section);
if (!EntriesOrErr)
return EntriesOrErr.takeError();
ArrayRef<T> Arr = *EntriesOrErr;
if (Entry >= Arr.size())
return createError(
"can't read an entry at 0x" +
Twine::utohexstr(Entry * static_cast<uint64_t>(sizeof(T))) +
": it goes past the end of the section (0x" +
Twine::utohexstr(Section.sh_size) + ")");
return &Arr[Entry];
}
template <typename ELFT>
Expected<StringRef> ELFFile<ELFT>::getSymbolVersionByIndex(
uint32_t SymbolVersionIndex, bool &IsDefault,
SmallVector<std::optional<VersionEntry>, 0> &VersionMap,
std::optional<bool> IsSymHidden) const {
size_t VersionIndex = SymbolVersionIndex & llvm::ELF::VERSYM_VERSION;
// Special markers for unversioned symbols.
if (VersionIndex == llvm::ELF::VER_NDX_LOCAL ||
VersionIndex == llvm::ELF::VER_NDX_GLOBAL) {
IsDefault = false;
return "";
}
// Lookup this symbol in the version table.
if (VersionIndex >= VersionMap.size() || !VersionMap[VersionIndex])
return createError("SHT_GNU_versym section refers to a version index " +
Twine(VersionIndex) + " which is missing");
const VersionEntry &Entry = *VersionMap[VersionIndex];
// A default version (@@) is only available for defined symbols.
if (!Entry.IsVerDef || IsSymHidden.value_or(false))
IsDefault = false;
else
IsDefault = !(SymbolVersionIndex & llvm::ELF::VERSYM_HIDDEN);
return Entry.Name.c_str();
}
template <class ELFT>
Expected<std::vector<VerDef>>
ELFFile<ELFT>::getVersionDefinitions(const Elf_Shdr &Sec) const {
Expected<StringRef> StrTabOrErr = getLinkAsStrtab(Sec);
if (!StrTabOrErr)
return StrTabOrErr.takeError();
Expected<ArrayRef<uint8_t>> ContentsOrErr = getSectionContents(Sec);
if (!ContentsOrErr)
return createError("cannot read content of " + describe(*this, Sec) + ": " +
toString(ContentsOrErr.takeError()));
const uint8_t *Start = ContentsOrErr->data();
const uint8_t *End = Start + ContentsOrErr->size();
auto ExtractNextAux = [&](const uint8_t *&VerdauxBuf,
unsigned VerDefNdx) -> Expected<VerdAux> {
if (VerdauxBuf + sizeof(Elf_Verdaux) > End)
return createError("invalid " + describe(*this, Sec) +
": version definition " + Twine(VerDefNdx) +
" refers to an auxiliary entry that goes past the end "
"of the section");
auto *Verdaux = reinterpret_cast<const Elf_Verdaux *>(VerdauxBuf);
VerdauxBuf += Verdaux->vda_next;
VerdAux Aux;
Aux.Offset = VerdauxBuf - Start;
if (Verdaux->vda_name <= StrTabOrErr->size())
Aux.Name = std::string(StrTabOrErr->drop_front(Verdaux->vda_name));
else
Aux.Name = ("<invalid vda_name: " + Twine(Verdaux->vda_name) + ">").str();
return Aux;
};
std::vector<VerDef> Ret;
const uint8_t *VerdefBuf = Start;
for (unsigned I = 1; I <= /*VerDefsNum=*/Sec.sh_info; ++I) {
if (VerdefBuf + sizeof(Elf_Verdef) > End)
return createError("invalid " + describe(*this, Sec) +
": version definition " + Twine(I) +
" goes past the end of the section");
if (reinterpret_cast<uintptr_t>(VerdefBuf) % sizeof(uint32_t) != 0)
return createError(
"invalid " + describe(*this, Sec) +
": found a misaligned version definition entry at offset 0x" +
Twine::utohexstr(VerdefBuf - Start));
unsigned Version = *reinterpret_cast<const Elf_Half *>(VerdefBuf);
if (Version != 1)
return createError("unable to dump " + describe(*this, Sec) +
": version " + Twine(Version) +
" is not yet supported");
const Elf_Verdef *D = reinterpret_cast<const Elf_Verdef *>(VerdefBuf);
VerDef &VD = *Ret.emplace(Ret.end());
VD.Offset = VerdefBuf - Start;
VD.Version = D->vd_version;
VD.Flags = D->vd_flags;
VD.Ndx = D->vd_ndx;
VD.Cnt = D->vd_cnt;
VD.Hash = D->vd_hash;
const uint8_t *VerdauxBuf = VerdefBuf + D->vd_aux;
for (unsigned J = 0; J < D->vd_cnt; ++J) {
if (reinterpret_cast<uintptr_t>(VerdauxBuf) % sizeof(uint32_t) != 0)
return createError("invalid " + describe(*this, Sec) +
": found a misaligned auxiliary entry at offset 0x" +
Twine::utohexstr(VerdauxBuf - Start));
Expected<VerdAux> AuxOrErr = ExtractNextAux(VerdauxBuf, I);
if (!AuxOrErr)
return AuxOrErr.takeError();
if (J == 0)
VD.Name = AuxOrErr->Name;
else
VD.AuxV.push_back(*AuxOrErr);
}
VerdefBuf += D->vd_next;
}
return Ret;
}
template <class ELFT>
Expected<std::vector<VerNeed>>
ELFFile<ELFT>::getVersionDependencies(const Elf_Shdr &Sec,
WarningHandler WarnHandler) const {
StringRef StrTab;
Expected<StringRef> StrTabOrErr = getLinkAsStrtab(Sec);
if (!StrTabOrErr) {
if (Error E = WarnHandler(toString(StrTabOrErr.takeError())))
return std::move(E);
} else {
StrTab = *StrTabOrErr;
}
Expected<ArrayRef<uint8_t>> ContentsOrErr = getSectionContents(Sec);
if (!ContentsOrErr)
return createError("cannot read content of " + describe(*this, Sec) + ": " +
toString(ContentsOrErr.takeError()));
const uint8_t *Start = ContentsOrErr->data();
const uint8_t *End = Start + ContentsOrErr->size();
const uint8_t *VerneedBuf = Start;
std::vector<VerNeed> Ret;
for (unsigned I = 1; I <= /*VerneedNum=*/Sec.sh_info; ++I) {
if (VerneedBuf + sizeof(Elf_Verdef) > End)
return createError("invalid " + describe(*this, Sec) +
": version dependency " + Twine(I) +
" goes past the end of the section");
if (reinterpret_cast<uintptr_t>(VerneedBuf) % sizeof(uint32_t) != 0)
return createError(
"invalid " + describe(*this, Sec) +
": found a misaligned version dependency entry at offset 0x" +
Twine::utohexstr(VerneedBuf - Start));
unsigned Version = *reinterpret_cast<const Elf_Half *>(VerneedBuf);
if (Version != 1)
return createError("unable to dump " + describe(*this, Sec) +
": version " + Twine(Version) +
" is not yet supported");
const Elf_Verneed *Verneed =
reinterpret_cast<const Elf_Verneed *>(VerneedBuf);
VerNeed &VN = *Ret.emplace(Ret.end());
VN.Version = Verneed->vn_version;
VN.Cnt = Verneed->vn_cnt;
VN.Offset = VerneedBuf - Start;
if (Verneed->vn_file < StrTab.size())
VN.File = std::string(StrTab.data() + Verneed->vn_file);
else
VN.File = ("<corrupt vn_file: " + Twine(Verneed->vn_file) + ">").str();
const uint8_t *VernauxBuf = VerneedBuf + Verneed->vn_aux;
for (unsigned J = 0; J < Verneed->vn_cnt; ++J) {
if (reinterpret_cast<uintptr_t>(VernauxBuf) % sizeof(uint32_t) != 0)
return createError("invalid " + describe(*this, Sec) +
": found a misaligned auxiliary entry at offset 0x" +
Twine::utohexstr(VernauxBuf - Start));
if (VernauxBuf + sizeof(Elf_Vernaux) > End)
return createError(
"invalid " + describe(*this, Sec) + ": version dependency " +
Twine(I) +
" refers to an auxiliary entry that goes past the end "
"of the section");
const Elf_Vernaux *Vernaux =
reinterpret_cast<const Elf_Vernaux *>(VernauxBuf);
VernAux &Aux = *VN.AuxV.emplace(VN.AuxV.end());
Aux.Hash = Vernaux->vna_hash;
Aux.Flags = Vernaux->vna_flags;
Aux.Other = Vernaux->vna_other;
Aux.Offset = VernauxBuf - Start;
if (StrTab.size() <= Vernaux->vna_name)
Aux.Name = "<corrupt>";
else
Aux.Name = std::string(StrTab.drop_front(Vernaux->vna_name));
VernauxBuf += Vernaux->vna_next;
}
VerneedBuf += Verneed->vn_next;
}
return Ret;
}
template <class ELFT>
Expected<const typename ELFT::Shdr *>
ELFFile<ELFT>::getSection(uint32_t Index) const {
auto TableOrErr = sections();
if (!TableOrErr)
return TableOrErr.takeError();
return object::getSection<ELFT>(*TableOrErr, Index);
}
template <class ELFT>
Expected<StringRef>
ELFFile<ELFT>::getStringTable(const Elf_Shdr &Section,
WarningHandler WarnHandler) const {
if (Section.sh_type != ELF::SHT_STRTAB)
if (Error E = WarnHandler("invalid sh_type for string table section " +
getSecIndexForError(*this, Section) +
": expected SHT_STRTAB, but got " +
object::getELFSectionTypeName(
getHeader().e_machine, Section.sh_type)))
return std::move(E);
auto V = getSectionContentsAsArray<char>(Section);
if (!V)
return V.takeError();
ArrayRef<char> Data = *V;
if (Data.empty())
return createError("SHT_STRTAB string table section " +
getSecIndexForError(*this, Section) + " is empty");
if (Data.back() != '\0')
return createError("SHT_STRTAB string table section " +
getSecIndexForError(*this, Section) +
" is non-null terminated");
return StringRef(Data.begin(), Data.size());
}
template <class ELFT>
Expected<ArrayRef<typename ELFT::Word>>
ELFFile<ELFT>::getSHNDXTable(const Elf_Shdr &Section) const {
auto SectionsOrErr = sections();
if (!SectionsOrErr)
return SectionsOrErr.takeError();
return getSHNDXTable(Section, *SectionsOrErr);
}
template <class ELFT>
Expected<ArrayRef<typename ELFT::Word>>
ELFFile<ELFT>::getSHNDXTable(const Elf_Shdr &Section,
Elf_Shdr_Range Sections) const {
assert(Section.sh_type == ELF::SHT_SYMTAB_SHNDX);
auto VOrErr = getSectionContentsAsArray<Elf_Word>(Section);
if (!VOrErr)
return VOrErr.takeError();
ArrayRef<Elf_Word> V = *VOrErr;
auto SymTableOrErr = object::getSection<ELFT>(Sections, Section.sh_link);
if (!SymTableOrErr)
return SymTableOrErr.takeError();
const Elf_Shdr &SymTable = **SymTableOrErr;
if (SymTable.sh_type != ELF::SHT_SYMTAB &&
SymTable.sh_type != ELF::SHT_DYNSYM)
return createError(
"SHT_SYMTAB_SHNDX section is linked with " +
object::getELFSectionTypeName(getHeader().e_machine, SymTable.sh_type) +
" section (expected SHT_SYMTAB/SHT_DYNSYM)");
uint64_t Syms = SymTable.sh_size / sizeof(Elf_Sym);
if (V.size() != Syms)
return createError("SHT_SYMTAB_SHNDX has " + Twine(V.size()) +
" entries, but the symbol table associated has " +
Twine(Syms));
return V;
}
template <class ELFT>
Expected<StringRef>
ELFFile<ELFT>::getStringTableForSymtab(const Elf_Shdr &Sec) const {
auto SectionsOrErr = sections();
if (!SectionsOrErr)
return SectionsOrErr.takeError();
return getStringTableForSymtab(Sec, *SectionsOrErr);
}
template <class ELFT>
Expected<StringRef>
ELFFile<ELFT>::getStringTableForSymtab(const Elf_Shdr &Sec,
Elf_Shdr_Range Sections) const {
if (Sec.sh_type != ELF::SHT_SYMTAB && Sec.sh_type != ELF::SHT_DYNSYM)
return createError(
"invalid sh_type for symbol table, expected SHT_SYMTAB or SHT_DYNSYM");
Expected<const Elf_Shdr *> SectionOrErr =
object::getSection<ELFT>(Sections, Sec.sh_link);
if (!SectionOrErr)
return SectionOrErr.takeError();
return getStringTable(**SectionOrErr);
}
template <class ELFT>
Expected<StringRef>
ELFFile<ELFT>::getLinkAsStrtab(const typename ELFT::Shdr &Sec) const {
Expected<const typename ELFT::Shdr *> StrTabSecOrErr =
getSection(Sec.sh_link);
if (!StrTabSecOrErr)
return createError("invalid section linked to " + describe(*this, Sec) +
": " + toString(StrTabSecOrErr.takeError()));
Expected<StringRef> StrTabOrErr = getStringTable(**StrTabSecOrErr);
if (!StrTabOrErr)
return createError("invalid string table linked to " +
describe(*this, Sec) + ": " +
toString(StrTabOrErr.takeError()));
return *StrTabOrErr;
}
template <class ELFT>
Expected<StringRef>
ELFFile<ELFT>::getSectionName(const Elf_Shdr &Section,
WarningHandler WarnHandler) const {
auto SectionsOrErr = sections();
if (!SectionsOrErr)
return SectionsOrErr.takeError();
auto Table = getSectionStringTable(*SectionsOrErr, WarnHandler);
if (!Table)
return Table.takeError();
return getSectionName(Section, *Table);
}
template <class ELFT>
Expected<StringRef> ELFFile<ELFT>::getSectionName(const Elf_Shdr &Section,
StringRef DotShstrtab) const {
uint32_t Offset = Section.sh_name;
if (Offset == 0)
return StringRef();
if (Offset >= DotShstrtab.size())
return createError("a section " + getSecIndexForError(*this, Section) +
" has an invalid sh_name (0x" +
Twine::utohexstr(Offset) +
") offset which goes past the end of the "
"section name string table");
return StringRef(DotShstrtab.data() + Offset);
}
/// This function returns the hash value for a symbol in the .dynsym section
/// Name of the API remains consistent as specified in the libelf
/// REF : http://www.sco.com/developers/gabi/latest/ch5.dynamic.html#hash
inline uint32_t hashSysV(StringRef SymbolName) {
uint32_t H = 0;
for (uint8_t C : SymbolName) {
H = (H << 4) + C;
H ^= (H >> 24) & 0xf0;
}
return H & 0x0fffffff;
}
/// This function returns the hash value for a symbol in the .dynsym section
/// for the GNU hash table. The implementation is defined in the GNU hash ABI.
/// REF : https://sourceware.org/git/?p=binutils-gdb.git;a=blob;f=bfd/elf.c#l222
inline uint32_t hashGnu(StringRef Name) {
uint32_t H = 5381;
for (uint8_t C : Name)
H = (H << 5) + H + C;
return H;
}
} // end namespace object
} // end namespace llvm
#endif // LLVM_OBJECT_ELF_H
PK hwFZ�^�A Object/SymbolSize.hnu �[��� //===- SymbolSize.h ---------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_SYMBOLSIZE_H
#define LLVM_OBJECT_SYMBOLSIZE_H
#include "llvm/Object/ObjectFile.h"
namespace llvm {
namespace object {
struct SymEntry {
symbol_iterator I;
uint64_t Address;
unsigned Number;
unsigned SectionID;
};
int compareAddress(const SymEntry *A, const SymEntry *B);
std::vector<std::pair<SymbolRef, uint64_t>>
computeSymbolSizes(const ObjectFile &O);
}
} // namespace llvm
#endif
PK hwFZ�\�ˡ� �� Object/ELFObjectFile.hnu �[��� //===- ELFObjectFile.h - ELF object file implementation ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the ELFObjectFile template class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_ELFOBJECTFILE_H
#define LLVM_OBJECT_ELFOBJECTFILE_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/Object/Binary.h"
#include "llvm/Object/ELF.h"
#include "llvm/Object/ELFTypes.h"
#include "llvm/Object/Error.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/Object/SymbolicFile.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/ELFAttributeParser.h"
#include "llvm/Support/ELFAttributes.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MemoryBufferRef.h"
#include "llvm/Support/ScopedPrinter.h"
#include "llvm/TargetParser/SubtargetFeature.h"
#include "llvm/TargetParser/Triple.h"
#include <cassert>
#include <cstdint>
namespace llvm {
template <typename T> class SmallVectorImpl;
namespace object {
constexpr int NumElfSymbolTypes = 16;
extern const llvm::EnumEntry<unsigned> ElfSymbolTypes[NumElfSymbolTypes];
class elf_symbol_iterator;
struct ELFPltEntry {
StringRef Section;
std::optional<DataRefImpl> Symbol;
uint64_t Address;
};
class ELFObjectFileBase : public ObjectFile {
friend class ELFRelocationRef;
friend class ELFSectionRef;
friend class ELFSymbolRef;
SubtargetFeatures getMIPSFeatures() const;
SubtargetFeatures getARMFeatures() const;
Expected<SubtargetFeatures> getRISCVFeatures() const;
SubtargetFeatures getLoongArchFeatures() const;
StringRef getAMDGPUCPUName() const;
protected:
ELFObjectFileBase(unsigned int Type, MemoryBufferRef Source);
virtual uint64_t getSymbolSize(DataRefImpl Symb) const = 0;
virtual uint8_t getSymbolBinding(DataRefImpl Symb) const = 0;
virtual uint8_t getSymbolOther(DataRefImpl Symb) const = 0;
virtual uint8_t getSymbolELFType(DataRefImpl Symb) const = 0;
virtual uint32_t getSectionType(DataRefImpl Sec) const = 0;
virtual uint64_t getSectionFlags(DataRefImpl Sec) const = 0;
virtual uint64_t getSectionOffset(DataRefImpl Sec) const = 0;
virtual Expected<int64_t> getRelocationAddend(DataRefImpl Rel) const = 0;
virtual Error getBuildAttributes(ELFAttributeParser &Attributes) const = 0;
public:
using elf_symbol_iterator_range = iterator_range<elf_symbol_iterator>;
virtual elf_symbol_iterator_range getDynamicSymbolIterators() const = 0;
/// Returns platform-specific object flags, if any.
virtual unsigned getPlatformFlags() const = 0;
elf_symbol_iterator_range symbols() const;
static bool classof(const Binary *v) { return v->isELF(); }
Expected<SubtargetFeatures> getFeatures() const override;
std::optional<StringRef> tryGetCPUName() const override;
void setARMSubArch(Triple &TheTriple) const override;
virtual uint16_t getEType() const = 0;
virtual uint16_t getEMachine() const = 0;
std::vector<ELFPltEntry> getPltEntries() const;
/// Returns a vector containing a symbol version for each dynamic symbol.
/// Returns an empty vector if version sections do not exist.
Expected<std::vector<VersionEntry>> readDynsymVersions() const;
/// Returns a vector of all BB address maps in the object file. When
// `TextSectionIndex` is specified, only returns the BB address maps
// corresponding to the section with that index.
Expected<std::vector<BBAddrMap>>
readBBAddrMap(std::optional<unsigned> TextSectionIndex = std::nullopt) const;
};
class ELFSectionRef : public SectionRef {
public:
ELFSectionRef(const SectionRef &B) : SectionRef(B) {
assert(isa<ELFObjectFileBase>(SectionRef::getObject()));
}
const ELFObjectFileBase *getObject() const {
return cast<ELFObjectFileBase>(SectionRef::getObject());
}
uint32_t getType() const {
return getObject()->getSectionType(getRawDataRefImpl());
}
uint64_t getFlags() const {
return getObject()->getSectionFlags(getRawDataRefImpl());
}
uint64_t getOffset() const {
return getObject()->getSectionOffset(getRawDataRefImpl());
}
};
class elf_section_iterator : public section_iterator {
public:
elf_section_iterator(const section_iterator &B) : section_iterator(B) {
assert(isa<ELFObjectFileBase>(B->getObject()));
}
const ELFSectionRef *operator->() const {
return static_cast<const ELFSectionRef *>(section_iterator::operator->());
}
const ELFSectionRef &operator*() const {
return static_cast<const ELFSectionRef &>(section_iterator::operator*());
}
};
class ELFSymbolRef : public SymbolRef {
public:
ELFSymbolRef(const SymbolRef &B) : SymbolRef(B) {
assert(isa<ELFObjectFileBase>(SymbolRef::getObject()));
}
const ELFObjectFileBase *getObject() const {
return cast<ELFObjectFileBase>(BasicSymbolRef::getObject());
}
uint64_t getSize() const {
return getObject()->getSymbolSize(getRawDataRefImpl());
}
uint8_t getBinding() const {
return getObject()->getSymbolBinding(getRawDataRefImpl());
}
uint8_t getOther() const {
return getObject()->getSymbolOther(getRawDataRefImpl());
}
uint8_t getELFType() const {
return getObject()->getSymbolELFType(getRawDataRefImpl());
}
StringRef getELFTypeName() const {
uint8_t Type = getELFType();
for (const auto &EE : ElfSymbolTypes) {
if (EE.Value == Type) {
return EE.AltName;
}
}
return "";
}
};
class elf_symbol_iterator : public symbol_iterator {
public:
elf_symbol_iterator(const basic_symbol_iterator &B)
: symbol_iterator(SymbolRef(B->getRawDataRefImpl(),
cast<ELFObjectFileBase>(B->getObject()))) {}
const ELFSymbolRef *operator->() const {
return static_cast<const ELFSymbolRef *>(symbol_iterator::operator->());
}
const ELFSymbolRef &operator*() const {
return static_cast<const ELFSymbolRef &>(symbol_iterator::operator*());
}
};
class ELFRelocationRef : public RelocationRef {
public:
ELFRelocationRef(const RelocationRef &B) : RelocationRef(B) {
assert(isa<ELFObjectFileBase>(RelocationRef::getObject()));
}
const ELFObjectFileBase *getObject() const {
return cast<ELFObjectFileBase>(RelocationRef::getObject());
}
Expected<int64_t> getAddend() const {
return getObject()->getRelocationAddend(getRawDataRefImpl());
}
};
class elf_relocation_iterator : public relocation_iterator {
public:
elf_relocation_iterator(const relocation_iterator &B)
: relocation_iterator(RelocationRef(
B->getRawDataRefImpl(), cast<ELFObjectFileBase>(B->getObject()))) {}
const ELFRelocationRef *operator->() const {
return static_cast<const ELFRelocationRef *>(
relocation_iterator::operator->());
}
const ELFRelocationRef &operator*() const {
return static_cast<const ELFRelocationRef &>(
relocation_iterator::operator*());
}
};
inline ELFObjectFileBase::elf_symbol_iterator_range
ELFObjectFileBase::symbols() const {
return elf_symbol_iterator_range(symbol_begin(), symbol_end());
}
template <class ELFT> class ELFObjectFile : public ELFObjectFileBase {
uint16_t getEMachine() const override;
uint16_t getEType() const override;
uint64_t getSymbolSize(DataRefImpl Sym) const override;
public:
LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
SectionRef toSectionRef(const Elf_Shdr *Sec) const {
return SectionRef(toDRI(Sec), this);
}
ELFSymbolRef toSymbolRef(const Elf_Shdr *SymTable, unsigned SymbolNum) const {
return ELFSymbolRef({toDRI(SymTable, SymbolNum), this});
}
bool IsContentValid() const { return ContentValid; }
private:
ELFObjectFile(MemoryBufferRef Object, ELFFile<ELFT> EF,
const Elf_Shdr *DotDynSymSec, const Elf_Shdr *DotSymtabSec,
const Elf_Shdr *DotSymtabShndxSec);
bool ContentValid = false;
protected:
ELFFile<ELFT> EF;
const Elf_Shdr *DotDynSymSec = nullptr; // Dynamic symbol table section.
const Elf_Shdr *DotSymtabSec = nullptr; // Symbol table section.
const Elf_Shdr *DotSymtabShndxSec = nullptr; // SHT_SYMTAB_SHNDX section.
Error initContent() override;
void moveSymbolNext(DataRefImpl &Symb) const override;
Expected<StringRef> getSymbolName(DataRefImpl Symb) const override;
Expected<uint64_t> getSymbolAddress(DataRefImpl Symb) const override;
uint64_t getSymbolValueImpl(DataRefImpl Symb) const override;
uint32_t getSymbolAlignment(DataRefImpl Symb) const override;
uint64_t getCommonSymbolSizeImpl(DataRefImpl Symb) const override;
Expected<uint32_t> getSymbolFlags(DataRefImpl Symb) const override;
uint8_t getSymbolBinding(DataRefImpl Symb) const override;
uint8_t getSymbolOther(DataRefImpl Symb) const override;
uint8_t getSymbolELFType(DataRefImpl Symb) const override;
Expected<SymbolRef::Type> getSymbolType(DataRefImpl Symb) const override;
Expected<section_iterator> getSymbolSection(const Elf_Sym *Symb,
const Elf_Shdr *SymTab) const;
Expected<section_iterator> getSymbolSection(DataRefImpl Symb) const override;
void moveSectionNext(DataRefImpl &Sec) const override;
Expected<StringRef> getSectionName(DataRefImpl Sec) const override;
uint64_t getSectionAddress(DataRefImpl Sec) const override;
uint64_t getSectionIndex(DataRefImpl Sec) const override;
uint64_t getSectionSize(DataRefImpl Sec) const override;
Expected<ArrayRef<uint8_t>>
getSectionContents(DataRefImpl Sec) const override;
uint64_t getSectionAlignment(DataRefImpl Sec) const override;
bool isSectionCompressed(DataRefImpl Sec) const override;
bool isSectionText(DataRefImpl Sec) const override;
bool isSectionData(DataRefImpl Sec) const override;
bool isSectionBSS(DataRefImpl Sec) const override;
bool isSectionVirtual(DataRefImpl Sec) const override;
bool isBerkeleyText(DataRefImpl Sec) const override;
bool isBerkeleyData(DataRefImpl Sec) const override;
bool isDebugSection(DataRefImpl Sec) const override;
relocation_iterator section_rel_begin(DataRefImpl Sec) const override;
relocation_iterator section_rel_end(DataRefImpl Sec) const override;
std::vector<SectionRef> dynamic_relocation_sections() const override;
Expected<section_iterator>
getRelocatedSection(DataRefImpl Sec) const override;
void moveRelocationNext(DataRefImpl &Rel) const override;
uint64_t getRelocationOffset(DataRefImpl Rel) const override;
symbol_iterator getRelocationSymbol(DataRefImpl Rel) const override;
uint64_t getRelocationType(DataRefImpl Rel) const override;
void getRelocationTypeName(DataRefImpl Rel,
SmallVectorImpl<char> &Result) const override;
uint32_t getSectionType(DataRefImpl Sec) const override;
uint64_t getSectionFlags(DataRefImpl Sec) const override;
uint64_t getSectionOffset(DataRefImpl Sec) const override;
StringRef getRelocationTypeName(uint32_t Type) const;
DataRefImpl toDRI(const Elf_Shdr *SymTable, unsigned SymbolNum) const {
DataRefImpl DRI;
if (!SymTable) {
DRI.d.a = 0;
DRI.d.b = 0;
return DRI;
}
assert(SymTable->sh_type == ELF::SHT_SYMTAB ||
SymTable->sh_type == ELF::SHT_DYNSYM);
auto SectionsOrErr = EF.sections();
if (!SectionsOrErr) {
DRI.d.a = 0;
DRI.d.b = 0;
return DRI;
}
uintptr_t SHT = reinterpret_cast<uintptr_t>((*SectionsOrErr).begin());
unsigned SymTableIndex =
(reinterpret_cast<uintptr_t>(SymTable) - SHT) / sizeof(Elf_Shdr);
DRI.d.a = SymTableIndex;
DRI.d.b = SymbolNum;
return DRI;
}
const Elf_Shdr *toELFShdrIter(DataRefImpl Sec) const {
return reinterpret_cast<const Elf_Shdr *>(Sec.p);
}
DataRefImpl toDRI(const Elf_Shdr *Sec) const {
DataRefImpl DRI;
DRI.p = reinterpret_cast<uintptr_t>(Sec);
return DRI;
}
DataRefImpl toDRI(const Elf_Dyn *Dyn) const {
DataRefImpl DRI;
DRI.p = reinterpret_cast<uintptr_t>(Dyn);
return DRI;
}
bool isExportedToOtherDSO(const Elf_Sym *ESym) const {
unsigned char Binding = ESym->getBinding();
unsigned char Visibility = ESym->getVisibility();
// A symbol is exported if its binding is either GLOBAL or WEAK, and its
// visibility is either DEFAULT or PROTECTED. All other symbols are not
// exported.
return (
(Binding == ELF::STB_GLOBAL || Binding == ELF::STB_WEAK ||
Binding == ELF::STB_GNU_UNIQUE) &&
(Visibility == ELF::STV_DEFAULT || Visibility == ELF::STV_PROTECTED));
}
Error getBuildAttributes(ELFAttributeParser &Attributes) const override {
auto SectionsOrErr = EF.sections();
if (!SectionsOrErr)
return SectionsOrErr.takeError();
for (const Elf_Shdr &Sec : *SectionsOrErr) {
if (Sec.sh_type == ELF::SHT_ARM_ATTRIBUTES ||
Sec.sh_type == ELF::SHT_RISCV_ATTRIBUTES) {
auto ErrorOrContents = EF.getSectionContents(Sec);
if (!ErrorOrContents)
return ErrorOrContents.takeError();
auto Contents = ErrorOrContents.get();
if (Contents[0] != ELFAttrs::Format_Version || Contents.size() == 1)
return Error::success();
if (Error E = Attributes.parse(Contents, ELFT::TargetEndianness))
return E;
break;
}
}
return Error::success();
}
// This flag is used for classof, to distinguish ELFObjectFile from
// its subclass. If more subclasses will be created, this flag will
// have to become an enum.
bool isDyldELFObject = false;
public:
ELFObjectFile(ELFObjectFile<ELFT> &&Other);
static Expected<ELFObjectFile<ELFT>> create(MemoryBufferRef Object,
bool InitContent = true);
const Elf_Rel *getRel(DataRefImpl Rel) const;
const Elf_Rela *getRela(DataRefImpl Rela) const;
Expected<const Elf_Sym *> getSymbol(DataRefImpl Sym) const {
return EF.template getEntry<Elf_Sym>(Sym.d.a, Sym.d.b);
}
/// Get the relocation section that contains \a Rel.
const Elf_Shdr *getRelSection(DataRefImpl Rel) const {
auto RelSecOrErr = EF.getSection(Rel.d.a);
if (!RelSecOrErr)
report_fatal_error(
Twine(errorToErrorCode(RelSecOrErr.takeError()).message()));
return *RelSecOrErr;
}
const Elf_Shdr *getSection(DataRefImpl Sec) const {
return reinterpret_cast<const Elf_Shdr *>(Sec.p);
}
basic_symbol_iterator symbol_begin() const override;
basic_symbol_iterator symbol_end() const override;
bool is64Bit() const override { return getBytesInAddress() == 8; }
elf_symbol_iterator dynamic_symbol_begin() const;
elf_symbol_iterator dynamic_symbol_end() const;
section_iterator section_begin() const override;
section_iterator section_end() const override;
Expected<int64_t> getRelocationAddend(DataRefImpl Rel) const override;
uint8_t getBytesInAddress() const override;
StringRef getFileFormatName() const override;
Triple::ArchType getArch() const override;
Expected<uint64_t> getStartAddress() const override;
unsigned getPlatformFlags() const override { return EF.getHeader().e_flags; }
const ELFFile<ELFT> &getELFFile() const { return EF; }
bool isDyldType() const { return isDyldELFObject; }
static bool classof(const Binary *v) {
return v->getType() == getELFType(ELFT::TargetEndianness == support::little,
ELFT::Is64Bits);
}
elf_symbol_iterator_range getDynamicSymbolIterators() const override;
bool isRelocatableObject() const override;
void createFakeSections() { EF.createFakeSections(); }
};
using ELF32LEObjectFile = ELFObjectFile<ELF32LE>;
using ELF64LEObjectFile = ELFObjectFile<ELF64LE>;
using ELF32BEObjectFile = ELFObjectFile<ELF32BE>;
using ELF64BEObjectFile = ELFObjectFile<ELF64BE>;
template <class ELFT>
void ELFObjectFile<ELFT>::moveSymbolNext(DataRefImpl &Sym) const {
++Sym.d.b;
}
template <class ELFT> Error ELFObjectFile<ELFT>::initContent() {
auto SectionsOrErr = EF.sections();
if (!SectionsOrErr)
return SectionsOrErr.takeError();
for (const Elf_Shdr &Sec : *SectionsOrErr) {
switch (Sec.sh_type) {
case ELF::SHT_DYNSYM: {
if (!DotDynSymSec)
DotDynSymSec = &Sec;
break;
}
case ELF::SHT_SYMTAB: {
if (!DotSymtabSec)
DotSymtabSec = &Sec;
break;
}
case ELF::SHT_SYMTAB_SHNDX: {
if (!DotSymtabShndxSec)
DotSymtabShndxSec = &Sec;
break;
}
}
}
ContentValid = true;
return Error::success();
}
template <class ELFT>
Expected<StringRef> ELFObjectFile<ELFT>::getSymbolName(DataRefImpl Sym) const {
Expected<const Elf_Sym *> SymOrErr = getSymbol(Sym);
if (!SymOrErr)
return SymOrErr.takeError();
auto SymTabOrErr = EF.getSection(Sym.d.a);
if (!SymTabOrErr)
return SymTabOrErr.takeError();
const Elf_Shdr *SymTableSec = *SymTabOrErr;
auto StrTabOrErr = EF.getSection(SymTableSec->sh_link);
if (!StrTabOrErr)
return StrTabOrErr.takeError();
const Elf_Shdr *StringTableSec = *StrTabOrErr;
auto SymStrTabOrErr = EF.getStringTable(*StringTableSec);
if (!SymStrTabOrErr)
return SymStrTabOrErr.takeError();
Expected<StringRef> Name = (*SymOrErr)->getName(*SymStrTabOrErr);
if (Name && !Name->empty())
return Name;
// If the symbol name is empty use the section name.
if ((*SymOrErr)->getType() == ELF::STT_SECTION) {
Expected<section_iterator> SecOrErr = getSymbolSection(Sym);
if (SecOrErr)
return (*SecOrErr)->getName();
return SecOrErr.takeError();
}
return Name;
}
template <class ELFT>
uint64_t ELFObjectFile<ELFT>::getSectionFlags(DataRefImpl Sec) const {
return getSection(Sec)->sh_flags;
}
template <class ELFT>
uint32_t ELFObjectFile<ELFT>::getSectionType(DataRefImpl Sec) const {
return getSection(Sec)->sh_type;
}
template <class ELFT>
uint64_t ELFObjectFile<ELFT>::getSectionOffset(DataRefImpl Sec) const {
return getSection(Sec)->sh_offset;
}
template <class ELFT>
uint64_t ELFObjectFile<ELFT>::getSymbolValueImpl(DataRefImpl Symb) const {
Expected<const Elf_Sym *> SymOrErr = getSymbol(Symb);
if (!SymOrErr)
report_fatal_error(SymOrErr.takeError());
uint64_t Ret = (*SymOrErr)->st_value;
if ((*SymOrErr)->st_shndx == ELF::SHN_ABS)
return Ret;
const Elf_Ehdr &Header = EF.getHeader();
// Clear the ARM/Thumb or microMIPS indicator flag.
if ((Header.e_machine == ELF::EM_ARM || Header.e_machine == ELF::EM_MIPS) &&
(*SymOrErr)->getType() == ELF::STT_FUNC)
Ret &= ~1;
return Ret;
}
template <class ELFT>
Expected<uint64_t>
ELFObjectFile<ELFT>::getSymbolAddress(DataRefImpl Symb) const {
Expected<uint64_t> SymbolValueOrErr = getSymbolValue(Symb);
if (!SymbolValueOrErr)
// TODO: Test this error.
return SymbolValueOrErr.takeError();
uint64_t Result = *SymbolValueOrErr;
Expected<const Elf_Sym *> SymOrErr = getSymbol(Symb);
if (!SymOrErr)
return SymOrErr.takeError();
switch ((*SymOrErr)->st_shndx) {
case ELF::SHN_COMMON:
case ELF::SHN_UNDEF:
case ELF::SHN_ABS:
return Result;
}
auto SymTabOrErr = EF.getSection(Symb.d.a);
if (!SymTabOrErr)
return SymTabOrErr.takeError();
if (EF.getHeader().e_type == ELF::ET_REL) {
ArrayRef<Elf_Word> ShndxTable;
if (DotSymtabShndxSec) {
// TODO: Test this error.
if (Expected<ArrayRef<Elf_Word>> ShndxTableOrErr =
EF.getSHNDXTable(*DotSymtabShndxSec))
ShndxTable = *ShndxTableOrErr;
else
return ShndxTableOrErr.takeError();
}
Expected<const Elf_Shdr *> SectionOrErr =
EF.getSection(**SymOrErr, *SymTabOrErr, ShndxTable);
if (!SectionOrErr)
return SectionOrErr.takeError();
const Elf_Shdr *Section = *SectionOrErr;
if (Section)
Result += Section->sh_addr;
}
return Result;
}
template <class ELFT>
uint32_t ELFObjectFile<ELFT>::getSymbolAlignment(DataRefImpl Symb) const {
Expected<const Elf_Sym *> SymOrErr = getSymbol(Symb);
if (!SymOrErr)
report_fatal_error(SymOrErr.takeError());
if ((*SymOrErr)->st_shndx == ELF::SHN_COMMON)
return (*SymOrErr)->st_value;
return 0;
}
template <class ELFT>
uint16_t ELFObjectFile<ELFT>::getEMachine() const {
return EF.getHeader().e_machine;
}
template <class ELFT> uint16_t ELFObjectFile<ELFT>::getEType() const {
return EF.getHeader().e_type;
}
template <class ELFT>
uint64_t ELFObjectFile<ELFT>::getSymbolSize(DataRefImpl Sym) const {
Expected<const Elf_Sym *> SymOrErr = getSymbol(Sym);
if (!SymOrErr)
report_fatal_error(SymOrErr.takeError());
return (*SymOrErr)->st_size;
}
template <class ELFT>
uint64_t ELFObjectFile<ELFT>::getCommonSymbolSizeImpl(DataRefImpl Symb) const {
return getSymbolSize(Symb);
}
template <class ELFT>
uint8_t ELFObjectFile<ELFT>::getSymbolBinding(DataRefImpl Symb) const {
Expected<const Elf_Sym *> SymOrErr = getSymbol(Symb);
if (!SymOrErr)
report_fatal_error(SymOrErr.takeError());
return (*SymOrErr)->getBinding();
}
template <class ELFT>
uint8_t ELFObjectFile<ELFT>::getSymbolOther(DataRefImpl Symb) const {
Expected<const Elf_Sym *> SymOrErr = getSymbol(Symb);
if (!SymOrErr)
report_fatal_error(SymOrErr.takeError());
return (*SymOrErr)->st_other;
}
template <class ELFT>
uint8_t ELFObjectFile<ELFT>::getSymbolELFType(DataRefImpl Symb) const {
Expected<const Elf_Sym *> SymOrErr = getSymbol(Symb);
if (!SymOrErr)
report_fatal_error(SymOrErr.takeError());
return (*SymOrErr)->getType();
}
template <class ELFT>
Expected<SymbolRef::Type>
ELFObjectFile<ELFT>::getSymbolType(DataRefImpl Symb) const {
Expected<const Elf_Sym *> SymOrErr = getSymbol(Symb);
if (!SymOrErr)
return SymOrErr.takeError();
switch ((*SymOrErr)->getType()) {
case ELF::STT_NOTYPE:
return SymbolRef::ST_Unknown;
case ELF::STT_SECTION:
return SymbolRef::ST_Debug;
case ELF::STT_FILE:
return SymbolRef::ST_File;
case ELF::STT_FUNC:
return SymbolRef::ST_Function;
case ELF::STT_OBJECT:
case ELF::STT_COMMON:
return SymbolRef::ST_Data;
case ELF::STT_TLS:
default:
return SymbolRef::ST_Other;
}
}
template <class ELFT>
Expected<uint32_t> ELFObjectFile<ELFT>::getSymbolFlags(DataRefImpl Sym) const {
Expected<const Elf_Sym *> SymOrErr = getSymbol(Sym);
if (!SymOrErr)
return SymOrErr.takeError();
const Elf_Sym *ESym = *SymOrErr;
uint32_t Result = SymbolRef::SF_None;
if (ESym->getBinding() != ELF::STB_LOCAL)
Result |= SymbolRef::SF_Global;
if (ESym->getBinding() == ELF::STB_WEAK)
Result |= SymbolRef::SF_Weak;
if (ESym->st_shndx == ELF::SHN_ABS)
Result |= SymbolRef::SF_Absolute;
if (ESym->getType() == ELF::STT_FILE || ESym->getType() == ELF::STT_SECTION)
Result |= SymbolRef::SF_FormatSpecific;
if (Expected<typename ELFT::SymRange> SymbolsOrErr =
EF.symbols(DotSymtabSec)) {
// Set the SF_FormatSpecific flag for the 0-index null symbol.
if (ESym == SymbolsOrErr->begin())
Result |= SymbolRef::SF_FormatSpecific;
} else
// TODO: Test this error.
return SymbolsOrErr.takeError();
if (Expected<typename ELFT::SymRange> SymbolsOrErr =
EF.symbols(DotDynSymSec)) {
// Set the SF_FormatSpecific flag for the 0-index null symbol.
if (ESym == SymbolsOrErr->begin())
Result |= SymbolRef::SF_FormatSpecific;
} else
// TODO: Test this error.
return SymbolsOrErr.takeError();
if (EF.getHeader().e_machine == ELF::EM_AARCH64) {
if (Expected<StringRef> NameOrErr = getSymbolName(Sym)) {
StringRef Name = *NameOrErr;
if (Name.startswith("$d") || Name.startswith("$x"))
Result |= SymbolRef::SF_FormatSpecific;
} else {
// TODO: Actually report errors helpfully.
consumeError(NameOrErr.takeError());
}
} else if (EF.getHeader().e_machine == ELF::EM_ARM) {
if (Expected<StringRef> NameOrErr = getSymbolName(Sym)) {
StringRef Name = *NameOrErr;
// TODO Investigate why empty name symbols need to be marked.
if (Name.empty() || Name.startswith("$d") || Name.startswith("$t") ||
Name.startswith("$a"))
Result |= SymbolRef::SF_FormatSpecific;
} else {
// TODO: Actually report errors helpfully.
consumeError(NameOrErr.takeError());
}
if (ESym->getType() == ELF::STT_FUNC && (ESym->st_value & 1) == 1)
Result |= SymbolRef::SF_Thumb;
} else if (EF.getHeader().e_machine == ELF::EM_RISCV) {
if (Expected<StringRef> NameOrErr = getSymbolName(Sym)) {
// Mark empty name symbols used for label differences.
if (NameOrErr->empty())
Result |= SymbolRef::SF_FormatSpecific;
} else {
// TODO: Actually report errors helpfully.
consumeError(NameOrErr.takeError());
}
}
if (ESym->st_shndx == ELF::SHN_UNDEF)
Result |= SymbolRef::SF_Undefined;
if (ESym->getType() == ELF::STT_COMMON || ESym->st_shndx == ELF::SHN_COMMON)
Result |= SymbolRef::SF_Common;
if (isExportedToOtherDSO(ESym))
Result |= SymbolRef::SF_Exported;
if (ESym->getType() == ELF::STT_GNU_IFUNC)
Result |= SymbolRef::SF_Indirect;
if (ESym->getVisibility() == ELF::STV_HIDDEN)
Result |= SymbolRef::SF_Hidden;
return Result;
}
template <class ELFT>
Expected<section_iterator>
ELFObjectFile<ELFT>::getSymbolSection(const Elf_Sym *ESym,
const Elf_Shdr *SymTab) const {
ArrayRef<Elf_Word> ShndxTable;
if (DotSymtabShndxSec) {
// TODO: Test this error.
Expected<ArrayRef<Elf_Word>> ShndxTableOrErr =
EF.getSHNDXTable(*DotSymtabShndxSec);
if (!ShndxTableOrErr)
return ShndxTableOrErr.takeError();
ShndxTable = *ShndxTableOrErr;
}
auto ESecOrErr = EF.getSection(*ESym, SymTab, ShndxTable);
if (!ESecOrErr)
return ESecOrErr.takeError();
const Elf_Shdr *ESec = *ESecOrErr;
if (!ESec)
return section_end();
DataRefImpl Sec;
Sec.p = reinterpret_cast<intptr_t>(ESec);
return section_iterator(SectionRef(Sec, this));
}
template <class ELFT>
Expected<section_iterator>
ELFObjectFile<ELFT>::getSymbolSection(DataRefImpl Symb) const {
Expected<const Elf_Sym *> SymOrErr = getSymbol(Symb);
if (!SymOrErr)
return SymOrErr.takeError();
auto SymTabOrErr = EF.getSection(Symb.d.a);
if (!SymTabOrErr)
return SymTabOrErr.takeError();
return getSymbolSection(*SymOrErr, *SymTabOrErr);
}
template <class ELFT>
void ELFObjectFile<ELFT>::moveSectionNext(DataRefImpl &Sec) const {
const Elf_Shdr *ESec = getSection(Sec);
Sec = toDRI(++ESec);
}
template <class ELFT>
Expected<StringRef> ELFObjectFile<ELFT>::getSectionName(DataRefImpl Sec) const {
return EF.getSectionName(*getSection(Sec));
}
template <class ELFT>
uint64_t ELFObjectFile<ELFT>::getSectionAddress(DataRefImpl Sec) const {
return getSection(Sec)->sh_addr;
}
template <class ELFT>
uint64_t ELFObjectFile<ELFT>::getSectionIndex(DataRefImpl Sec) const {
auto SectionsOrErr = EF.sections();
handleAllErrors(std::move(SectionsOrErr.takeError()),
[](const ErrorInfoBase &) {
llvm_unreachable("unable to get section index");
});
const Elf_Shdr *First = SectionsOrErr->begin();
return getSection(Sec) - First;
}
template <class ELFT>
uint64_t ELFObjectFile<ELFT>::getSectionSize(DataRefImpl Sec) const {
return getSection(Sec)->sh_size;
}
template <class ELFT>
Expected<ArrayRef<uint8_t>>
ELFObjectFile<ELFT>::getSectionContents(DataRefImpl Sec) const {
const Elf_Shdr *EShdr = getSection(Sec);
if (EShdr->sh_type == ELF::SHT_NOBITS)
return ArrayRef((const uint8_t *)base(), (size_t)0);
if (Error E =
checkOffset(getMemoryBufferRef(),
(uintptr_t)base() + EShdr->sh_offset, EShdr->sh_size))
return std::move(E);
return ArrayRef((const uint8_t *)base() + EShdr->sh_offset, EShdr->sh_size);
}
template <class ELFT>
uint64_t ELFObjectFile<ELFT>::getSectionAlignment(DataRefImpl Sec) const {
return getSection(Sec)->sh_addralign;
}
template <class ELFT>
bool ELFObjectFile<ELFT>::isSectionCompressed(DataRefImpl Sec) const {
return getSection(Sec)->sh_flags & ELF::SHF_COMPRESSED;
}
template <class ELFT>
bool ELFObjectFile<ELFT>::isSectionText(DataRefImpl Sec) const {
return getSection(Sec)->sh_flags & ELF::SHF_EXECINSTR;
}
template <class ELFT>
bool ELFObjectFile<ELFT>::isSectionData(DataRefImpl Sec) const {
const Elf_Shdr *EShdr = getSection(Sec);
return EShdr->sh_type == ELF::SHT_PROGBITS &&
EShdr->sh_flags & ELF::SHF_ALLOC &&
!(EShdr->sh_flags & ELF::SHF_EXECINSTR);
}
template <class ELFT>
bool ELFObjectFile<ELFT>::isSectionBSS(DataRefImpl Sec) const {
const Elf_Shdr *EShdr = getSection(Sec);
return EShdr->sh_flags & (ELF::SHF_ALLOC | ELF::SHF_WRITE) &&
EShdr->sh_type == ELF::SHT_NOBITS;
}
template <class ELFT>
std::vector<SectionRef>
ELFObjectFile<ELFT>::dynamic_relocation_sections() const {
std::vector<SectionRef> Res;
std::vector<uintptr_t> Offsets;
auto SectionsOrErr = EF.sections();
if (!SectionsOrErr)
return Res;
for (const Elf_Shdr &Sec : *SectionsOrErr) {
if (Sec.sh_type != ELF::SHT_DYNAMIC)
continue;
Elf_Dyn *Dynamic =
reinterpret_cast<Elf_Dyn *>((uintptr_t)base() + Sec.sh_offset);
for (; Dynamic->d_tag != ELF::DT_NULL; Dynamic++) {
if (Dynamic->d_tag == ELF::DT_REL || Dynamic->d_tag == ELF::DT_RELA ||
Dynamic->d_tag == ELF::DT_JMPREL) {
Offsets.push_back(Dynamic->d_un.d_val);
}
}
}
for (const Elf_Shdr &Sec : *SectionsOrErr) {
if (is_contained(Offsets, Sec.sh_addr))
Res.emplace_back(toDRI(&Sec), this);
}
return Res;
}
template <class ELFT>
bool ELFObjectFile<ELFT>::isSectionVirtual(DataRefImpl Sec) const {
return getSection(Sec)->sh_type == ELF::SHT_NOBITS;
}
template <class ELFT>
bool ELFObjectFile<ELFT>::isBerkeleyText(DataRefImpl Sec) const {
return getSection(Sec)->sh_flags & ELF::SHF_ALLOC &&
(getSection(Sec)->sh_flags & ELF::SHF_EXECINSTR ||
!(getSection(Sec)->sh_flags & ELF::SHF_WRITE));
}
template <class ELFT>
bool ELFObjectFile<ELFT>::isBerkeleyData(DataRefImpl Sec) const {
const Elf_Shdr *EShdr = getSection(Sec);
return !isBerkeleyText(Sec) && EShdr->sh_type != ELF::SHT_NOBITS &&
EShdr->sh_flags & ELF::SHF_ALLOC;
}
template <class ELFT>
bool ELFObjectFile<ELFT>::isDebugSection(DataRefImpl Sec) const {
Expected<StringRef> SectionNameOrErr = getSectionName(Sec);
if (!SectionNameOrErr) {
// TODO: Report the error message properly.
consumeError(SectionNameOrErr.takeError());
return false;
}
StringRef SectionName = SectionNameOrErr.get();
return SectionName.startswith(".debug") ||
SectionName.startswith(".zdebug") || SectionName == ".gdb_index";
}
template <class ELFT>
relocation_iterator
ELFObjectFile<ELFT>::section_rel_begin(DataRefImpl Sec) const {
DataRefImpl RelData;
auto SectionsOrErr = EF.sections();
if (!SectionsOrErr)
return relocation_iterator(RelocationRef());
uintptr_t SHT = reinterpret_cast<uintptr_t>((*SectionsOrErr).begin());
RelData.d.a = (Sec.p - SHT) / EF.getHeader().e_shentsize;
RelData.d.b = 0;
return relocation_iterator(RelocationRef(RelData, this));
}
template <class ELFT>
relocation_iterator
ELFObjectFile<ELFT>::section_rel_end(DataRefImpl Sec) const {
const Elf_Shdr *S = reinterpret_cast<const Elf_Shdr *>(Sec.p);
relocation_iterator Begin = section_rel_begin(Sec);
if (S->sh_type != ELF::SHT_RELA && S->sh_type != ELF::SHT_REL)
return Begin;
DataRefImpl RelData = Begin->getRawDataRefImpl();
const Elf_Shdr *RelSec = getRelSection(RelData);
// Error check sh_link here so that getRelocationSymbol can just use it.
auto SymSecOrErr = EF.getSection(RelSec->sh_link);
if (!SymSecOrErr)
report_fatal_error(
Twine(errorToErrorCode(SymSecOrErr.takeError()).message()));
RelData.d.b += S->sh_size / S->sh_entsize;
return relocation_iterator(RelocationRef(RelData, this));
}
template <class ELFT>
Expected<section_iterator>
ELFObjectFile<ELFT>::getRelocatedSection(DataRefImpl Sec) const {
const Elf_Shdr *EShdr = getSection(Sec);
uintX_t Type = EShdr->sh_type;
if (Type != ELF::SHT_REL && Type != ELF::SHT_RELA)
return section_end();
Expected<const Elf_Shdr *> SecOrErr = EF.getSection(EShdr->sh_info);
if (!SecOrErr)
return SecOrErr.takeError();
return section_iterator(SectionRef(toDRI(*SecOrErr), this));
}
// Relocations
template <class ELFT>
void ELFObjectFile<ELFT>::moveRelocationNext(DataRefImpl &Rel) const {
++Rel.d.b;
}
template <class ELFT>
symbol_iterator
ELFObjectFile<ELFT>::getRelocationSymbol(DataRefImpl Rel) const {
uint32_t symbolIdx;
const Elf_Shdr *sec = getRelSection(Rel);
if (sec->sh_type == ELF::SHT_REL)
symbolIdx = getRel(Rel)->getSymbol(EF.isMips64EL());
else
symbolIdx = getRela(Rel)->getSymbol(EF.isMips64EL());
if (!symbolIdx)
return symbol_end();
// FIXME: error check symbolIdx
DataRefImpl SymbolData;
SymbolData.d.a = sec->sh_link;
SymbolData.d.b = symbolIdx;
return symbol_iterator(SymbolRef(SymbolData, this));
}
template <class ELFT>
uint64_t ELFObjectFile<ELFT>::getRelocationOffset(DataRefImpl Rel) const {
const Elf_Shdr *sec = getRelSection(Rel);
if (sec->sh_type == ELF::SHT_REL)
return getRel(Rel)->r_offset;
return getRela(Rel)->r_offset;
}
template <class ELFT>
uint64_t ELFObjectFile<ELFT>::getRelocationType(DataRefImpl Rel) const {
const Elf_Shdr *sec = getRelSection(Rel);
if (sec->sh_type == ELF::SHT_REL)
return getRel(Rel)->getType(EF.isMips64EL());
else
return getRela(Rel)->getType(EF.isMips64EL());
}
template <class ELFT>
StringRef ELFObjectFile<ELFT>::getRelocationTypeName(uint32_t Type) const {
return getELFRelocationTypeName(EF.getHeader().e_machine, Type);
}
template <class ELFT>
void ELFObjectFile<ELFT>::getRelocationTypeName(
DataRefImpl Rel, SmallVectorImpl<char> &Result) const {
uint32_t type = getRelocationType(Rel);
EF.getRelocationTypeName(type, Result);
}
template <class ELFT>
Expected<int64_t>
ELFObjectFile<ELFT>::getRelocationAddend(DataRefImpl Rel) const {
if (getRelSection(Rel)->sh_type != ELF::SHT_RELA)
return createError("Section is not SHT_RELA");
return (int64_t)getRela(Rel)->r_addend;
}
template <class ELFT>
const typename ELFObjectFile<ELFT>::Elf_Rel *
ELFObjectFile<ELFT>::getRel(DataRefImpl Rel) const {
assert(getRelSection(Rel)->sh_type == ELF::SHT_REL);
auto Ret = EF.template getEntry<Elf_Rel>(Rel.d.a, Rel.d.b);
if (!Ret)
report_fatal_error(Twine(errorToErrorCode(Ret.takeError()).message()));
return *Ret;
}
template <class ELFT>
const typename ELFObjectFile<ELFT>::Elf_Rela *
ELFObjectFile<ELFT>::getRela(DataRefImpl Rela) const {
assert(getRelSection(Rela)->sh_type == ELF::SHT_RELA);
auto Ret = EF.template getEntry<Elf_Rela>(Rela.d.a, Rela.d.b);
if (!Ret)
report_fatal_error(Twine(errorToErrorCode(Ret.takeError()).message()));
return *Ret;
}
template <class ELFT>
Expected<ELFObjectFile<ELFT>>
ELFObjectFile<ELFT>::create(MemoryBufferRef Object, bool InitContent) {
auto EFOrErr = ELFFile<ELFT>::create(Object.getBuffer());
if (Error E = EFOrErr.takeError())
return std::move(E);
ELFObjectFile<ELFT> Obj = {Object, std::move(*EFOrErr), nullptr, nullptr,
nullptr};
if (InitContent)
if (Error E = Obj.initContent())
return std::move(E);
return std::move(Obj);
}
template <class ELFT>
ELFObjectFile<ELFT>::ELFObjectFile(MemoryBufferRef Object, ELFFile<ELFT> EF,
const Elf_Shdr *DotDynSymSec,
const Elf_Shdr *DotSymtabSec,
const Elf_Shdr *DotSymtabShndx)
: ELFObjectFileBase(
getELFType(ELFT::TargetEndianness == support::little, ELFT::Is64Bits),
Object),
EF(EF), DotDynSymSec(DotDynSymSec), DotSymtabSec(DotSymtabSec),
DotSymtabShndxSec(DotSymtabShndx) {}
template <class ELFT>
ELFObjectFile<ELFT>::ELFObjectFile(ELFObjectFile<ELFT> &&Other)
: ELFObjectFile(Other.Data, Other.EF, Other.DotDynSymSec,
Other.DotSymtabSec, Other.DotSymtabShndxSec) {}
template <class ELFT>
basic_symbol_iterator ELFObjectFile<ELFT>::symbol_begin() const {
DataRefImpl Sym =
toDRI(DotSymtabSec,
DotSymtabSec && DotSymtabSec->sh_size >= sizeof(Elf_Sym) ? 1 : 0);
return basic_symbol_iterator(SymbolRef(Sym, this));
}
template <class ELFT>
basic_symbol_iterator ELFObjectFile<ELFT>::symbol_end() const {
const Elf_Shdr *SymTab = DotSymtabSec;
if (!SymTab)
return symbol_begin();
DataRefImpl Sym = toDRI(SymTab, SymTab->sh_size / sizeof(Elf_Sym));
return basic_symbol_iterator(SymbolRef(Sym, this));
}
template <class ELFT>
elf_symbol_iterator ELFObjectFile<ELFT>::dynamic_symbol_begin() const {
if (!DotDynSymSec || DotDynSymSec->sh_size < sizeof(Elf_Sym))
// Ignore errors here where the dynsym is empty or sh_size less than the
// size of one symbol. These should be handled elsewhere.
return symbol_iterator(SymbolRef(toDRI(DotDynSymSec, 0), this));
// Skip 0-index NULL symbol.
return symbol_iterator(SymbolRef(toDRI(DotDynSymSec, 1), this));
}
template <class ELFT>
elf_symbol_iterator ELFObjectFile<ELFT>::dynamic_symbol_end() const {
const Elf_Shdr *SymTab = DotDynSymSec;
if (!SymTab)
return dynamic_symbol_begin();
DataRefImpl Sym = toDRI(SymTab, SymTab->sh_size / sizeof(Elf_Sym));
return basic_symbol_iterator(SymbolRef(Sym, this));
}
template <class ELFT>
section_iterator ELFObjectFile<ELFT>::section_begin() const {
auto SectionsOrErr = EF.sections();
if (!SectionsOrErr)
return section_iterator(SectionRef());
return section_iterator(SectionRef(toDRI((*SectionsOrErr).begin()), this));
}
template <class ELFT>
section_iterator ELFObjectFile<ELFT>::section_end() const {
auto SectionsOrErr = EF.sections();
if (!SectionsOrErr)
return section_iterator(SectionRef());
return section_iterator(SectionRef(toDRI((*SectionsOrErr).end()), this));
}
template <class ELFT>
uint8_t ELFObjectFile<ELFT>::getBytesInAddress() const {
return ELFT::Is64Bits ? 8 : 4;
}
template <class ELFT>
StringRef ELFObjectFile<ELFT>::getFileFormatName() const {
constexpr bool IsLittleEndian = ELFT::TargetEndianness == support::little;
switch (EF.getHeader().e_ident[ELF::EI_CLASS]) {
case ELF::ELFCLASS32:
switch (EF.getHeader().e_machine) {
case ELF::EM_68K:
return "elf32-m68k";
case ELF::EM_386:
return "elf32-i386";
case ELF::EM_IAMCU:
return "elf32-iamcu";
case ELF::EM_X86_64:
return "elf32-x86-64";
case ELF::EM_ARM:
return (IsLittleEndian ? "elf32-littlearm" : "elf32-bigarm");
case ELF::EM_AVR:
return "elf32-avr";
case ELF::EM_HEXAGON:
return "elf32-hexagon";
case ELF::EM_LANAI:
return "elf32-lanai";
case ELF::EM_MIPS:
return "elf32-mips";
case ELF::EM_MSP430:
return "elf32-msp430";
case ELF::EM_PPC:
return (IsLittleEndian ? "elf32-powerpcle" : "elf32-powerpc");
case ELF::EM_RISCV:
return "elf32-littleriscv";
case ELF::EM_CSKY:
return "elf32-csky";
case ELF::EM_SPARC:
case ELF::EM_SPARC32PLUS:
return "elf32-sparc";
case ELF::EM_AMDGPU:
return "elf32-amdgpu";
case ELF::EM_LOONGARCH:
return "elf32-loongarch";
case ELF::EM_XTENSA:
return "elf32-xtensa";
default:
return "elf32-unknown";
}
case ELF::ELFCLASS64:
switch (EF.getHeader().e_machine) {
case ELF::EM_386:
return "elf64-i386";
case ELF::EM_X86_64:
return "elf64-x86-64";
case ELF::EM_AARCH64:
return (IsLittleEndian ? "elf64-littleaarch64" : "elf64-bigaarch64");
case ELF::EM_PPC64:
return (IsLittleEndian ? "elf64-powerpcle" : "elf64-powerpc");
case ELF::EM_RISCV:
return "elf64-littleriscv";
case ELF::EM_S390:
return "elf64-s390";
case ELF::EM_SPARCV9:
return "elf64-sparc";
case ELF::EM_MIPS:
return "elf64-mips";
case ELF::EM_AMDGPU:
return "elf64-amdgpu";
case ELF::EM_BPF:
return "elf64-bpf";
case ELF::EM_VE:
return "elf64-ve";
case ELF::EM_LOONGARCH:
return "elf64-loongarch";
default:
return "elf64-unknown";
}
default:
// FIXME: Proper error handling.
report_fatal_error("Invalid ELFCLASS!");
}
}
template <class ELFT> Triple::ArchType ELFObjectFile<ELFT>::getArch() const {
bool IsLittleEndian = ELFT::TargetEndianness == support::little;
switch (EF.getHeader().e_machine) {
case ELF::EM_68K:
return Triple::m68k;
case ELF::EM_386:
case ELF::EM_IAMCU:
return Triple::x86;
case ELF::EM_X86_64:
return Triple::x86_64;
case ELF::EM_AARCH64:
return IsLittleEndian ? Triple::aarch64 : Triple::aarch64_be;
case ELF::EM_ARM:
return Triple::arm;
case ELF::EM_AVR:
return Triple::avr;
case ELF::EM_HEXAGON:
return Triple::hexagon;
case ELF::EM_LANAI:
return Triple::lanai;
case ELF::EM_MIPS:
switch (EF.getHeader().e_ident[ELF::EI_CLASS]) {
case ELF::ELFCLASS32:
return IsLittleEndian ? Triple::mipsel : Triple::mips;
case ELF::ELFCLASS64:
return IsLittleEndian ? Triple::mips64el : Triple::mips64;
default:
report_fatal_error("Invalid ELFCLASS!");
}
case ELF::EM_MSP430:
return Triple::msp430;
case ELF::EM_PPC:
return IsLittleEndian ? Triple::ppcle : Triple::ppc;
case ELF::EM_PPC64:
return IsLittleEndian ? Triple::ppc64le : Triple::ppc64;
case ELF::EM_RISCV:
switch (EF.getHeader().e_ident[ELF::EI_CLASS]) {
case ELF::ELFCLASS32:
return Triple::riscv32;
case ELF::ELFCLASS64:
return Triple::riscv64;
default:
report_fatal_error("Invalid ELFCLASS!");
}
case ELF::EM_S390:
return Triple::systemz;
case ELF::EM_SPARC:
case ELF::EM_SPARC32PLUS:
return IsLittleEndian ? Triple::sparcel : Triple::sparc;
case ELF::EM_SPARCV9:
return Triple::sparcv9;
case ELF::EM_AMDGPU: {
if (!IsLittleEndian)
return Triple::UnknownArch;
unsigned MACH = EF.getHeader().e_flags & ELF::EF_AMDGPU_MACH;
if (MACH >= ELF::EF_AMDGPU_MACH_R600_FIRST &&
MACH <= ELF::EF_AMDGPU_MACH_R600_LAST)
return Triple::r600;
if (MACH >= ELF::EF_AMDGPU_MACH_AMDGCN_FIRST &&
MACH <= ELF::EF_AMDGPU_MACH_AMDGCN_LAST)
return Triple::amdgcn;
return Triple::UnknownArch;
}
case ELF::EM_BPF:
return IsLittleEndian ? Triple::bpfel : Triple::bpfeb;
case ELF::EM_VE:
return Triple::ve;
case ELF::EM_CSKY:
return Triple::csky;
case ELF::EM_LOONGARCH:
switch (EF.getHeader().e_ident[ELF::EI_CLASS]) {
case ELF::ELFCLASS32:
return Triple::loongarch32;
case ELF::ELFCLASS64:
return Triple::loongarch64;
default:
report_fatal_error("Invalid ELFCLASS!");
}
case ELF::EM_XTENSA:
return Triple::xtensa;
default:
return Triple::UnknownArch;
}
}
template <class ELFT>
Expected<uint64_t> ELFObjectFile<ELFT>::getStartAddress() const {
return EF.getHeader().e_entry;
}
template <class ELFT>
ELFObjectFileBase::elf_symbol_iterator_range
ELFObjectFile<ELFT>::getDynamicSymbolIterators() const {
return make_range(dynamic_symbol_begin(), dynamic_symbol_end());
}
template <class ELFT> bool ELFObjectFile<ELFT>::isRelocatableObject() const {
return EF.getHeader().e_type == ELF::ET_REL;
}
} // end namespace object
} // end namespace llvm
#endif // LLVM_OBJECT_ELFOBJECTFILE_H
PK hwFZhc^� � Object/MachOUniversal.hnu �[��� //===- MachOUniversal.h - Mach-O universal binaries -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares Mach-O fat/universal binaries.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_MACHOUNIVERSAL_H
#define LLVM_OBJECT_MACHOUNIVERSAL_H
#include "llvm/ADT/iterator_range.h"
#include "llvm/BinaryFormat/MachO.h"
#include "llvm/Object/Binary.h"
#include "llvm/Object/MachO.h"
#include "llvm/TargetParser/Triple.h"
namespace llvm {
class StringRef;
class LLVMContext;
namespace object {
class Archive;
class IRObjectFile;
class MachOUniversalBinary : public Binary {
virtual void anchor();
uint32_t Magic;
uint32_t NumberOfObjects;
public:
static constexpr uint32_t MaxSectionAlignment = 15; /* 2**15 or 0x8000 */
class ObjectForArch {
const MachOUniversalBinary *Parent;
/// Index of object in the universal binary.
uint32_t Index;
/// Descriptor of the object.
MachO::fat_arch Header;
MachO::fat_arch_64 Header64;
public:
ObjectForArch(const MachOUniversalBinary *Parent, uint32_t Index);
void clear() {
Parent = nullptr;
Index = 0;
}
bool operator==(const ObjectForArch &Other) const {
return (Parent == Other.Parent) && (Index == Other.Index);
}
ObjectForArch getNext() const { return ObjectForArch(Parent, Index + 1); }
uint32_t getCPUType() const {
if (Parent->getMagic() == MachO::FAT_MAGIC)
return Header.cputype;
else // Parent->getMagic() == MachO::FAT_MAGIC_64
return Header64.cputype;
}
uint32_t getCPUSubType() const {
if (Parent->getMagic() == MachO::FAT_MAGIC)
return Header.cpusubtype;
else // Parent->getMagic() == MachO::FAT_MAGIC_64
return Header64.cpusubtype;
}
uint64_t getOffset() const {
if (Parent->getMagic() == MachO::FAT_MAGIC)
return Header.offset;
else // Parent->getMagic() == MachO::FAT_MAGIC_64
return Header64.offset;
}
uint64_t getSize() const {
if (Parent->getMagic() == MachO::FAT_MAGIC)
return Header.size;
else // Parent->getMagic() == MachO::FAT_MAGIC_64
return Header64.size;
}
uint32_t getAlign() const {
if (Parent->getMagic() == MachO::FAT_MAGIC)
return Header.align;
else // Parent->getMagic() == MachO::FAT_MAGIC_64
return Header64.align;
}
uint32_t getReserved() const {
if (Parent->getMagic() == MachO::FAT_MAGIC)
return 0;
else // Parent->getMagic() == MachO::FAT_MAGIC_64
return Header64.reserved;
}
Triple getTriple() const {
return MachOObjectFile::getArchTriple(getCPUType(), getCPUSubType());
}
std::string getArchFlagName() const {
const char *McpuDefault, *ArchFlag;
MachOObjectFile::getArchTriple(getCPUType(), getCPUSubType(),
&McpuDefault, &ArchFlag);
return ArchFlag ? ArchFlag : std::string();
}
Expected<std::unique_ptr<MachOObjectFile>> getAsObjectFile() const;
Expected<std::unique_ptr<IRObjectFile>>
getAsIRObject(LLVMContext &Ctx) const;
Expected<std::unique_ptr<Archive>> getAsArchive() const;
};
class object_iterator {
ObjectForArch Obj;
public:
object_iterator(const ObjectForArch &Obj) : Obj(Obj) {}
const ObjectForArch *operator->() const { return &Obj; }
const ObjectForArch &operator*() const { return Obj; }
bool operator==(const object_iterator &Other) const {
return Obj == Other.Obj;
}
bool operator!=(const object_iterator &Other) const {
return !(*this == Other);
}
object_iterator& operator++() { // Preincrement
Obj = Obj.getNext();
return *this;
}
};
MachOUniversalBinary(MemoryBufferRef Souce, Error &Err);
static Expected<std::unique_ptr<MachOUniversalBinary>>
create(MemoryBufferRef Source);
object_iterator begin_objects() const {
return ObjectForArch(this, 0);
}
object_iterator end_objects() const {
return ObjectForArch(nullptr, 0);
}
iterator_range<object_iterator> objects() const {
return make_range(begin_objects(), end_objects());
}
uint32_t getMagic() const { return Magic; }
uint32_t getNumberOfObjects() const { return NumberOfObjects; }
// Cast methods.
static bool classof(Binary const *V) {
return V->isMachOUniversalBinary();
}
Expected<ObjectForArch>
getObjectForArch(StringRef ArchName) const;
Expected<std::unique_ptr<MachOObjectFile>>
getMachOObjectForArch(StringRef ArchName) const;
Expected<std::unique_ptr<IRObjectFile>>
getIRObjectForArch(StringRef ArchName, LLVMContext &Ctx) const;
Expected<std::unique_ptr<Archive>>
getArchiveForArch(StringRef ArchName) const;
};
}
}
#endif
PK hwFZ�`��l l Object/COFFImportFile.hnu �[��� //===- COFFImportFile.h - COFF short import file implementation -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// COFF short import file is a special kind of file which contains
// only symbol names for DLL-exported symbols. This class implements
// exporting of Symbols to create libraries and a SymbolicFile
// interface for the file type.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_COFFIMPORTFILE_H
#define LLVM_OBJECT_COFFIMPORTFILE_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/Object/COFF.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/Object/SymbolicFile.h"
#include "llvm/Support/MemoryBufferRef.h"
#include "llvm/Support/raw_ostream.h"
namespace llvm {
namespace object {
class COFFImportFile : public SymbolicFile {
public:
COFFImportFile(MemoryBufferRef Source)
: SymbolicFile(ID_COFFImportFile, Source) {}
static bool classof(Binary const *V) { return V->isCOFFImportFile(); }
void moveSymbolNext(DataRefImpl &Symb) const override { ++Symb.p; }
Error printSymbolName(raw_ostream &OS, DataRefImpl Symb) const override {
if (Symb.p == 0)
OS << "__imp_";
OS << StringRef(Data.getBufferStart() + sizeof(coff_import_header));
return Error::success();
}
Expected<uint32_t> getSymbolFlags(DataRefImpl Symb) const override {
return SymbolRef::SF_Global;
}
basic_symbol_iterator symbol_begin() const override {
return BasicSymbolRef(DataRefImpl(), this);
}
basic_symbol_iterator symbol_end() const override {
DataRefImpl Symb;
Symb.p = isData() ? 1 : 2;
return BasicSymbolRef(Symb, this);
}
bool is64Bit() const override { return false; }
const coff_import_header *getCOFFImportHeader() const {
return reinterpret_cast<const object::coff_import_header *>(
Data.getBufferStart());
}
private:
bool isData() const {
return getCOFFImportHeader()->getType() == COFF::IMPORT_DATA;
}
};
struct COFFShortExport {
/// The name of the export as specified in the .def file or on the command
/// line, i.e. "foo" in "/EXPORT:foo", and "bar" in "/EXPORT:foo=bar". This
/// may lack mangling, such as underscore prefixing and stdcall suffixing.
std::string Name;
/// The external, exported name. Only non-empty when export renaming is in
/// effect, i.e. "foo" in "/EXPORT:foo=bar".
std::string ExtName;
/// The real, mangled symbol name from the object file. Given
/// "/export:foo=bar", this could be "_bar@8" if bar is stdcall.
std::string SymbolName;
/// Creates a weak alias. This is the name of the weak aliasee. In a .def
/// file, this is "baz" in "EXPORTS\nfoo = bar == baz".
std::string AliasTarget;
uint16_t Ordinal = 0;
bool Noname = false;
bool Data = false;
bool Private = false;
bool Constant = false;
friend bool operator==(const COFFShortExport &L, const COFFShortExport &R) {
return L.Name == R.Name && L.ExtName == R.ExtName &&
L.Ordinal == R.Ordinal && L.Noname == R.Noname &&
L.Data == R.Data && L.Private == R.Private;
}
friend bool operator!=(const COFFShortExport &L, const COFFShortExport &R) {
return !(L == R);
}
};
Error writeImportLibrary(StringRef ImportName, StringRef Path,
ArrayRef<COFFShortExport> Exports,
COFF::MachineTypes Machine, bool MinGW);
} // namespace object
} // namespace llvm
#endif
PK hwFZ:���
�
Object/TapiUniversal.hnu �[��� //===-- TapiUniversal.h - Text-based Dynamic Library Stub -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the TapiUniversal interface.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_TAPIUNIVERSAL_H
#define LLVM_OBJECT_TAPIUNIVERSAL_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Object/Binary.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MemoryBufferRef.h"
#include "llvm/TextAPI/Architecture.h"
#include "llvm/TextAPI/InterfaceFile.h"
namespace llvm {
namespace object {
class TapiFile;
class TapiUniversal : public Binary {
public:
class ObjectForArch {
const TapiUniversal *Parent;
int Index;
public:
ObjectForArch(const TapiUniversal *Parent, int Index)
: Parent(Parent), Index(Index) {}
ObjectForArch getNext() const { return ObjectForArch(Parent, Index + 1); }
bool operator==(const ObjectForArch &Other) const {
return (Parent == Other.Parent) && (Index == Other.Index);
}
uint32_t getCPUType() const {
auto Result =
MachO::getCPUTypeFromArchitecture(Parent->Libraries[Index].Arch);
return Result.first;
}
uint32_t getCPUSubType() const {
auto Result =
MachO::getCPUTypeFromArchitecture(Parent->Libraries[Index].Arch);
return Result.second;
}
StringRef getArchFlagName() const {
return MachO::getArchitectureName(Parent->Libraries[Index].Arch);
}
std::string getInstallName() const {
return std::string(Parent->Libraries[Index].InstallName);
}
bool isTopLevelLib() const {
return Parent->ParsedFile->getInstallName() == getInstallName();
}
Expected<std::unique_ptr<TapiFile>> getAsObjectFile() const;
};
class object_iterator {
ObjectForArch Obj;
public:
object_iterator(const ObjectForArch &Obj) : Obj(Obj) {}
const ObjectForArch *operator->() const { return &Obj; }
const ObjectForArch &operator*() const { return Obj; }
bool operator==(const object_iterator &Other) const {
return Obj == Other.Obj;
}
bool operator!=(const object_iterator &Other) const {
return !(*this == Other);
}
object_iterator &operator++() { // Preincrement
Obj = Obj.getNext();
return *this;
}
};
TapiUniversal(MemoryBufferRef Source, Error &Err);
static Expected<std::unique_ptr<TapiUniversal>>
create(MemoryBufferRef Source);
~TapiUniversal() override;
object_iterator begin_objects() const { return ObjectForArch(this, 0); }
object_iterator end_objects() const {
return ObjectForArch(this, Libraries.size());
}
iterator_range<object_iterator> objects() const {
return make_range(begin_objects(), end_objects());
}
const MachO::InterfaceFile &getInterfaceFile() { return *ParsedFile; }
uint32_t getNumberOfObjects() const { return Libraries.size(); }
static bool classof(const Binary *v) { return v->isTapiUniversal(); }
private:
struct Library {
StringRef InstallName;
MachO::Architecture Arch;
};
std::unique_ptr<MachO::InterfaceFile> ParsedFile;
std::vector<Library> Libraries;
};
} // end namespace object.
} // end namespace llvm.
#endif // LLVM_OBJECT_TAPIUNIVERSAL_H
PK hwFZ�N��͈ ͈ Object/MachO.hnu �[��� //===- MachO.h - MachO object file implementation ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the MachOObjectFile class, which implement the ObjectFile
// interface for MachO files.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_OBJECT_MACHO_H
#define LLVM_OBJECT_MACHO_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/BinaryFormat/MachO.h"
#include "llvm/BinaryFormat/Swift.h"
#include "llvm/Object/Binary.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/Object/SymbolicFile.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/TargetParser/SubtargetFeature.h"
#include "llvm/TargetParser/Triple.h"
#include <cstdint>
#include <memory>
#include <string>
#include <system_error>
namespace llvm {
namespace object {
/// DiceRef - This is a value type class that represents a single
/// data in code entry in the table in a Mach-O object file.
class DiceRef {
DataRefImpl DicePimpl;
const ObjectFile *OwningObject = nullptr;
public:
DiceRef() = default;
DiceRef(DataRefImpl DiceP, const ObjectFile *Owner);
bool operator==(const DiceRef &Other) const;
bool operator<(const DiceRef &Other) const;
void moveNext();
std::error_code getOffset(uint32_t &Result) const;
std::error_code getLength(uint16_t &Result) const;
std::error_code getKind(uint16_t &Result) const;
DataRefImpl getRawDataRefImpl() const;
const ObjectFile *getObjectFile() const;
};
using dice_iterator = content_iterator<DiceRef>;
/// ExportEntry encapsulates the current-state-of-the-walk used when doing a
/// non-recursive walk of the trie data structure. This allows you to iterate
/// across all exported symbols using:
/// Error Err = Error::success();
/// for (const llvm::object::ExportEntry &AnExport : Obj->exports(&Err)) {
/// }
/// if (Err) { report error ...
class ExportEntry {
public:
ExportEntry(Error *Err, const MachOObjectFile *O, ArrayRef<uint8_t> Trie);
StringRef name() const;
uint64_t flags() const;
uint64_t address() const;
uint64_t other() const;
StringRef otherName() const;
uint32_t nodeOffset() const;
bool operator==(const ExportEntry &) const;
void moveNext();
private:
friend class MachOObjectFile;
void moveToFirst();
void moveToEnd();
uint64_t readULEB128(const uint8_t *&p, const char **error);
void pushDownUntilBottom();
void pushNode(uint64_t Offset);
// Represents a node in the mach-o exports trie.
struct NodeState {
NodeState(const uint8_t *Ptr);
const uint8_t *Start;
const uint8_t *Current;
uint64_t Flags = 0;
uint64_t Address = 0;
uint64_t Other = 0;
const char *ImportName = nullptr;
unsigned ChildCount = 0;
unsigned NextChildIndex = 0;
unsigned ParentStringLength = 0;
bool IsExportNode = false;
};
using NodeList = SmallVector<NodeState, 16>;
using node_iterator = NodeList::const_iterator;
Error *E;
const MachOObjectFile *O;
ArrayRef<uint8_t> Trie;
SmallString<256> CumulativeString;
NodeList Stack;
bool Done = false;
iterator_range<node_iterator> nodes() const {
return make_range(Stack.begin(), Stack.end());
}
};
using export_iterator = content_iterator<ExportEntry>;
// Segment info so SegIndex/SegOffset pairs in a Mach-O Bind or Rebase entry
// can be checked and translated. Only the SegIndex/SegOffset pairs from
// checked entries are to be used with the segmentName(), sectionName() and
// address() methods below.
class BindRebaseSegInfo {
public:
BindRebaseSegInfo(const MachOObjectFile *Obj);
// Used to check a Mach-O Bind or Rebase entry for errors when iterating.
const char* checkSegAndOffsets(int32_t SegIndex, uint64_t SegOffset,
uint8_t PointerSize, uint32_t Count=1,
uint32_t Skip=0);
// Used with valid SegIndex/SegOffset values from checked entries.
StringRef segmentName(int32_t SegIndex);
StringRef sectionName(int32_t SegIndex, uint64_t SegOffset);
uint64_t address(uint32_t SegIndex, uint64_t SegOffset);
private:
struct SectionInfo {
uint64_t Address;
uint64_t Size;
StringRef SectionName;
StringRef SegmentName;
uint64_t OffsetInSegment;
uint64_t SegmentStartAddress;
int32_t SegmentIndex;
};
const SectionInfo &findSection(int32_t SegIndex, uint64_t SegOffset);
SmallVector<SectionInfo, 32> Sections;
int32_t MaxSegIndex;
};
/// MachORebaseEntry encapsulates the current state in the decompression of
/// rebasing opcodes. This allows you to iterate through the compressed table of
/// rebasing using:
/// Error Err = Error::success();
/// for (const llvm::object::MachORebaseEntry &Entry : Obj->rebaseTable(&Err)) {
/// }
/// if (Err) { report error ...
class MachORebaseEntry {
public:
MachORebaseEntry(Error *Err, const MachOObjectFile *O,
ArrayRef<uint8_t> opcodes, bool is64Bit);
int32_t segmentIndex() const;
uint64_t segmentOffset() const;
StringRef typeName() const;
StringRef segmentName() const;
StringRef sectionName() const;
uint64_t address() const;
bool operator==(const MachORebaseEntry &) const;
void moveNext();
private:
friend class MachOObjectFile;
void moveToFirst();
void moveToEnd();
uint64_t readULEB128(const char **error);
Error *E;
const MachOObjectFile *O;
ArrayRef<uint8_t> Opcodes;
const uint8_t *Ptr;
uint64_t SegmentOffset = 0;
int32_t SegmentIndex = -1;
uint64_t RemainingLoopCount = 0;
uint64_t AdvanceAmount = 0;
uint8_t RebaseType = 0;
uint8_t PointerSize;
bool Done = false;
};
using rebase_iterator = content_iterator<MachORebaseEntry>;
/// MachOBindEntry encapsulates the current state in the decompression of
/// binding opcodes. This allows you to iterate through the compressed table of
/// bindings using:
/// Error Err = Error::success();
/// for (const llvm::object::MachOBindEntry &Entry : Obj->bindTable(&Err)) {
/// }
/// if (Err) { report error ...
class MachOBindEntry {
public:
enum class Kind { Regular, Lazy, Weak };
MachOBindEntry(Error *Err, const MachOObjectFile *O,
ArrayRef<uint8_t> Opcodes, bool is64Bit, MachOBindEntry::Kind);
int32_t segmentIndex() const;
uint64_t segmentOffset() const;
StringRef typeName() const;
StringRef symbolName() const;
uint32_t flags() const;
int64_t addend() const;
int ordinal() const;
StringRef segmentName() const;
StringRef sectionName() const;
uint64_t address() const;
bool operator==(const MachOBindEntry &) const;
void moveNext();
private:
friend class MachOObjectFile;
void moveToFirst();
void moveToEnd();
uint64_t readULEB128(const char **error);
int64_t readSLEB128(const char **error);
Error *E;
const MachOObjectFile *O;
ArrayRef<uint8_t> Opcodes;
const uint8_t *Ptr;
uint64_t SegmentOffset = 0;
int32_t SegmentIndex = -1;
StringRef SymbolName;
bool LibraryOrdinalSet = false;
int Ordinal = 0;
uint32_t Flags = 0;
int64_t Addend = 0;
uint64_t RemainingLoopCount = 0;
uint64_t AdvanceAmount = 0;
uint8_t BindType = 0;
uint8_t PointerSize;
Kind TableKind;
bool Done = false;
};
using bind_iterator = content_iterator<MachOBindEntry>;
/// ChainedFixupTarget holds all the information about an external symbol
/// necessary to bind this binary to that symbol. These values are referenced
/// indirectly by chained fixup binds. This structure captures values from all
/// import and symbol formats.
///
/// Be aware there are two notions of weak here:
/// WeakImport == true
/// The associated bind may be set to 0 if this symbol is missing from its
/// parent library. This is called a "weak import."
/// LibOrdinal == BIND_SPECIAL_DYLIB_WEAK_LOOKUP
/// This symbol may be coalesced with other libraries vending the same
/// symbol. E.g., C++'s "operator new". This is called a "weak bind."
struct ChainedFixupTarget {
public:
ChainedFixupTarget(int LibOrdinal, uint32_t NameOffset, StringRef Symbol,
uint64_t Addend, bool WeakImport)
: LibOrdinal(LibOrdinal), NameOffset(NameOffset), SymbolName(Symbol),
Addend(Addend), WeakImport(WeakImport) {}
int libOrdinal() { return LibOrdinal; }
uint32_t nameOffset() { return NameOffset; }
StringRef symbolName() { return SymbolName; }
uint64_t addend() { return Addend; }
bool weakImport() { return WeakImport; }
bool weakBind() {
return LibOrdinal == MachO::BIND_SPECIAL_DYLIB_WEAK_LOOKUP;
}
private:
int LibOrdinal;
uint32_t NameOffset;
StringRef SymbolName;
uint64_t Addend;
bool WeakImport;
};
struct ChainedFixupsSegment {
ChainedFixupsSegment(uint8_t SegIdx, uint32_t Offset,
const MachO::dyld_chained_starts_in_segment &Header,
std::vector<uint16_t> &&PageStarts)
: SegIdx(SegIdx), Offset(Offset), Header(Header),
PageStarts(PageStarts){};
uint32_t SegIdx;
uint32_t Offset; // dyld_chained_starts_in_image::seg_info_offset[SegIdx]
MachO::dyld_chained_starts_in_segment Header;
std::vector<uint16_t> PageStarts; // page_start[] entries, host endianness
};
/// MachOAbstractFixupEntry is an abstract class representing a fixup in a
/// MH_DYLDLINK file. Fixups generally represent rebases and binds. Binds also
/// subdivide into additional subtypes (weak, lazy, reexport).
///
/// The two concrete subclasses of MachOAbstractFixupEntry are:
///
/// MachORebaseBindEntry - for dyld opcode-based tables, including threaded-
/// rebase, where rebases are mixed in with other
/// bind opcodes.
/// MachOChainedFixupEntry - for pointer chains embedded in data pages.
class MachOAbstractFixupEntry {
public:
MachOAbstractFixupEntry(Error *Err, const MachOObjectFile *O);
int32_t segmentIndex() const;
uint64_t segmentOffset() const;
uint64_t segmentAddress() const;
StringRef segmentName() const;
StringRef sectionName() const;
StringRef typeName() const;
StringRef symbolName() const;
uint32_t flags() const;
int64_t addend() const;
int ordinal() const;
/// \return the location of this fixup as a VM Address. For the VM
/// Address this fixup is pointing to, use pointerValue().
uint64_t address() const;
/// \return the VM Address pointed to by this fixup. Use
/// pointerValue() to compare against other VM Addresses, such as
/// section addresses or segment vmaddrs.
uint64_t pointerValue() const { return PointerValue; }
/// \return the raw "on-disk" representation of the fixup. For
/// Threaded rebases and Chained pointers these values are generally
/// encoded into various different pointer formats. This value is
/// exposed in API for tools that want to display and annotate the
/// raw bits.
uint64_t rawValue() const { return RawValue; }
void moveNext();
protected:
Error *E;
const MachOObjectFile *O;
uint64_t SegmentOffset = 0;
int32_t SegmentIndex = -1;
StringRef SymbolName;
int32_t Ordinal = 0;
uint32_t Flags = 0;
int64_t Addend = 0;
uint64_t PointerValue = 0;
uint64_t RawValue = 0;
bool Done = false;
void moveToFirst();
void moveToEnd();
/// \return the vm address of the start of __TEXT segment.
uint64_t textAddress() const { return TextAddress; }
private:
uint64_t TextAddress;
};
class MachOChainedFixupEntry : public MachOAbstractFixupEntry {
public:
enum class FixupKind { Bind, Rebase };
MachOChainedFixupEntry(Error *Err, const MachOObjectFile *O, bool Parse);
bool operator==(const MachOChainedFixupEntry &) const;
bool isBind() const { return Kind == FixupKind::Bind; }
bool isRebase() const { return Kind == FixupKind::Rebase; }
void moveNext();
void moveToFirst();
void moveToEnd();
private:
void findNextPageWithFixups();
std::vector<ChainedFixupTarget> FixupTargets;
std::vector<ChainedFixupsSegment> Segments;
ArrayRef<uint8_t> SegmentData;
FixupKind Kind;
uint32_t InfoSegIndex = 0; // Index into Segments
uint32_t PageIndex = 0; // Index into Segments[InfoSegIdx].PageStarts
uint32_t PageOffset = 0; // Page offset of the current fixup
};
using fixup_iterator = content_iterator<MachOChainedFixupEntry>;
class MachOObjectFile : public ObjectFile {
public:
struct LoadCommandInfo {
const char *Ptr; // Where in memory the load command is.
MachO::load_command C; // The command itself.
};
using LoadCommandList = SmallVector<LoadCommandInfo, 4>;
using load_command_iterator = LoadCommandList::const_iterator;
static Expected<std::unique_ptr<MachOObjectFile>>
create(MemoryBufferRef Object, bool IsLittleEndian, bool Is64Bits,
uint32_t UniversalCputype = 0, uint32_t UniversalIndex = 0);
static bool isMachOPairedReloc(uint64_t RelocType, uint64_t Arch);
void moveSymbolNext(DataRefImpl &Symb) const override;
uint64_t getNValue(DataRefImpl Sym) const;
Expected<StringRef> getSymbolName(DataRefImpl Symb) const override;
// MachO specific.
Error checkSymbolTable() const;
std::error_code getIndirectName(DataRefImpl Symb, StringRef &Res) const;
unsigned getSectionType(SectionRef Sec) const;
Expected<uint64_t> getSymbolAddress(DataRefImpl Symb) const override;
uint32_t getSymbolAlignment(DataRefImpl Symb) const override;
uint64_t getCommonSymbolSizeImpl(DataRefImpl Symb) const override;
Expected<SymbolRef::Type> getSymbolType(DataRefImpl Symb) const override;
Expected<uint32_t> getSymbolFlags(DataRefImpl Symb) const override;
Expected<section_iterator> getSymbolSection(DataRefImpl Symb) const override;
unsigned getSymbolSectionID(SymbolRef Symb) const;
unsigned getSectionID(SectionRef Sec) const;
void moveSectionNext(DataRefImpl &Sec) const override;
Expected<StringRef> getSectionName(DataRefImpl Sec) const override;
uint64_t getSectionAddress(DataRefImpl Sec) const override;
uint64_t getSectionIndex(DataRefImpl Sec) const override;
uint64_t getSectionSize(DataRefImpl Sec) const override;
ArrayRef<uint8_t> getSectionContents(uint32_t Offset, uint64_t Size) const;
Expected<ArrayRef<uint8_t>>
getSectionContents(DataRefImpl Sec) const override;
uint64_t getSectionAlignment(DataRefImpl Sec) const override;
Expected<SectionRef> getSection(unsigned SectionIndex) const;
Expected<SectionRef> getSection(StringRef SectionName) const;
bool isSectionCompressed(DataRefImpl Sec) const override;
bool isSectionText(DataRefImpl Sec) const override;
bool isSectionData(DataRefImpl Sec) const override;
bool isSectionBSS(DataRefImpl Sec) const override;
bool isSectionVirtual(DataRefImpl Sec) const override;
bool isSectionBitcode(DataRefImpl Sec) const override;
bool isDebugSection(DataRefImpl Sec) const override;
/// Return the raw contents of an entire segment.
ArrayRef<uint8_t> getSegmentContents(StringRef SegmentName) const;
ArrayRef<uint8_t> getSegmentContents(size_t SegmentIndex) const;
/// When dsymutil generates the companion file, it strips all unnecessary
/// sections (e.g. everything in the _TEXT segment) by omitting their body
/// and setting the offset in their corresponding load command to zero.
///
/// While the load command itself is valid, reading the section corresponds
/// to reading the number of bytes specified in the load command, starting
/// from offset 0 (i.e. the Mach-O header at the beginning of the file).
bool isSectionStripped(DataRefImpl Sec) const override;
relocation_iterator section_rel_begin(DataRefImpl Sec) const override;
relocation_iterator section_rel_end(DataRefImpl Sec) const override;
relocation_iterator extrel_begin() const;
relocation_iterator extrel_end() const;
iterator_range<relocation_iterator> external_relocations() const {
return make_range(extrel_begin(), extrel_end());
}
relocation_iterator locrel_begin() const;
relocation_iterator locrel_end() const;
void moveRelocationNext(DataRefImpl &Rel) const override;
uint64_t getRelocationOffset(DataRefImpl Rel) const override;
symbol_iterator getRelocationSymbol(DataRefImpl Rel) const override;
section_iterator getRelocationSection(DataRefImpl Rel) const;
uint64_t getRelocationType(DataRefImpl Rel) const override;
void getRelocationTypeName(DataRefImpl Rel,
SmallVectorImpl<char> &Result) const override;
uint8_t getRelocationLength(DataRefImpl Rel) const;
// MachO specific.
std::error_code getLibraryShortNameByIndex(unsigned Index, StringRef &) const;
uint32_t getLibraryCount() const;
section_iterator getRelocationRelocatedSection(relocation_iterator Rel) const;
// TODO: Would be useful to have an iterator based version
// of the load command interface too.
basic_symbol_iterator symbol_begin() const override;
basic_symbol_iterator symbol_end() const override;
bool is64Bit() const override;
// MachO specific.
symbol_iterator getSymbolByIndex(unsigned Index) const;
uint64_t getSymbolIndex(DataRefImpl Symb) const;
section_iterator section_begin() const override;
section_iterator section_end() const override;
uint8_t getBytesInAddress() const override;
StringRef getFileFormatName() const override;
Triple::ArchType getArch() const override;
Expected<SubtargetFeatures> getFeatures() const override {
return SubtargetFeatures();
}
Triple getArchTriple(const char **McpuDefault = nullptr) const;
relocation_iterator section_rel_begin(unsigned Index) const;
relocation_iterator section_rel_end(unsigned Index) const;
dice_iterator begin_dices() const;
dice_iterator end_dices() const;
load_command_iterator begin_load_commands() const;
load_command_iterator end_load_commands() const;
iterator_range<load_command_iterator> load_commands() const;
/// For use iterating over all exported symbols.
iterator_range<export_iterator> exports(Error &Err) const;
/// For use examining a trie not in a MachOObjectFile.
static iterator_range<export_iterator> exports(Error &Err,
ArrayRef<uint8_t> Trie,
const MachOObjectFile *O =
nullptr);
/// For use iterating over all rebase table entries.
iterator_range<rebase_iterator> rebaseTable(Error &Err);
/// For use examining rebase opcodes in a MachOObjectFile.
static iterator_range<rebase_iterator> rebaseTable(Error &Err,
MachOObjectFile *O,
ArrayRef<uint8_t> Opcodes,
bool is64);
/// For use iterating over all bind table entries.
iterator_range<bind_iterator> bindTable(Error &Err);
/// For iterating over all chained fixups.
iterator_range<fixup_iterator> fixupTable(Error &Err);
/// For use iterating over all lazy bind table entries.
iterator_range<bind_iterator> lazyBindTable(Error &Err);
/// For use iterating over all weak bind table entries.
iterator_range<bind_iterator> weakBindTable(Error &Err);
/// For use examining bind opcodes in a MachOObjectFile.
static iterator_range<bind_iterator> bindTable(Error &Err,
MachOObjectFile *O,
ArrayRef<uint8_t> Opcodes,
bool is64,
MachOBindEntry::Kind);
// Given a SegIndex, SegOffset, and PointerSize, verify a valid section exists
// that fully contains a pointer at that location. Multiple fixups in a bind
// (such as with the BIND_OPCODE_DO_BIND_ULEB_TIMES_SKIPPING_ULEB opcode) can
// be tested via the Count and Skip parameters.
//
// This is used by MachOBindEntry::moveNext() to validate a MachOBindEntry.
const char *BindEntryCheckSegAndOffsets(int32_t SegIndex, uint64_t SegOffset,
uint8_t PointerSize, uint32_t Count=1,
uint32_t Skip=0) const {
return BindRebaseSectionTable->checkSegAndOffsets(SegIndex, SegOffset,
PointerSize, Count, Skip);
}
// Given a SegIndex, SegOffset, and PointerSize, verify a valid section exists
// that fully contains a pointer at that location. Multiple fixups in a rebase
// (such as with the REBASE_OPCODE_DO_*_TIMES* opcodes) can be tested via the
// Count and Skip parameters.
//
// This is used by MachORebaseEntry::moveNext() to validate a MachORebaseEntry
const char *RebaseEntryCheckSegAndOffsets(int32_t SegIndex,
uint64_t SegOffset,
uint8_t PointerSize,
uint32_t Count=1,
uint32_t Skip=0) const {
return BindRebaseSectionTable->checkSegAndOffsets(SegIndex, SegOffset,
PointerSize, Count, Skip);
}
/// For use with the SegIndex of a checked Mach-O Bind or Rebase entry to
/// get the segment name.
StringRef BindRebaseSegmentName(int32_t SegIndex) const {
return BindRebaseSectionTable->segmentName(SegIndex);
}
/// For use with a SegIndex,SegOffset pair from a checked Mach-O Bind or
/// Rebase entry to get the section name.
StringRef BindRebaseSectionName(uint32_t SegIndex, uint64_t SegOffset) const {
return BindRebaseSectionTable->sectionName(SegIndex, SegOffset);
}
/// For use with a SegIndex,SegOffset pair from a checked Mach-O Bind or
/// Rebase entry to get the address.
uint64_t BindRebaseAddress(uint32_t SegIndex, uint64_t SegOffset) const {
return BindRebaseSectionTable->address(SegIndex, SegOffset);
}
// In a MachO file, sections have a segment name. This is used in the .o
// files. They have a single segment, but this field specifies which segment
// a section should be put in the final object.
StringRef getSectionFinalSegmentName(DataRefImpl Sec) const;
// Names are stored as 16 bytes. These returns the raw 16 bytes without
// interpreting them as a C string.
ArrayRef<char> getSectionRawName(DataRefImpl Sec) const;
ArrayRef<char> getSectionRawFinalSegmentName(DataRefImpl Sec) const;
// MachO specific Info about relocations.
bool isRelocationScattered(const MachO::any_relocation_info &RE) const;
unsigned getPlainRelocationSymbolNum(
const MachO::any_relocation_info &RE) const;
bool getPlainRelocationExternal(const MachO::any_relocation_info &RE) const;
bool getScatteredRelocationScattered(
const MachO::any_relocation_info &RE) const;
uint32_t getScatteredRelocationValue(
const MachO::any_relocation_info &RE) const;
uint32_t getScatteredRelocationType(
const MachO::any_relocation_info &RE) const;
unsigned getAnyRelocationAddress(const MachO::any_relocation_info &RE) const;
unsigned getAnyRelocationPCRel(const MachO::any_relocation_info &RE) const;
unsigned getAnyRelocationLength(const MachO::any_relocation_info &RE) const;
unsigned getAnyRelocationType(const MachO::any_relocation_info &RE) const;
SectionRef getAnyRelocationSection(const MachO::any_relocation_info &RE) const;
// MachO specific structures.
MachO::section getSection(DataRefImpl DRI) const;
MachO::section_64 getSection64(DataRefImpl DRI) const;
MachO::section getSection(const LoadCommandInfo &L, unsigned Index) const;
MachO::section_64 getSection64(const LoadCommandInfo &L,unsigned Index) const;
MachO::nlist getSymbolTableEntry(DataRefImpl DRI) const;
MachO::nlist_64 getSymbol64TableEntry(DataRefImpl DRI) const;
MachO::linkedit_data_command
getLinkeditDataLoadCommand(const LoadCommandInfo &L) const;
MachO::segment_command
getSegmentLoadCommand(const LoadCommandInfo &L) const;
MachO::segment_command_64
getSegment64LoadCommand(const LoadCommandInfo &L) const;
MachO::linker_option_command
getLinkerOptionLoadCommand(const LoadCommandInfo &L) const;
MachO::version_min_command
getVersionMinLoadCommand(const LoadCommandInfo &L) const;
MachO::note_command
getNoteLoadCommand(const LoadCommandInfo &L) const;
MachO::build_version_command
getBuildVersionLoadCommand(const LoadCommandInfo &L) const;
MachO::build_tool_version
getBuildToolVersion(unsigned index) const;
MachO::dylib_command
getDylibIDLoadCommand(const LoadCommandInfo &L) const;
MachO::dyld_info_command
getDyldInfoLoadCommand(const LoadCommandInfo &L) const;
MachO::dylinker_command
getDylinkerCommand(const LoadCommandInfo &L) const;
MachO::uuid_command
getUuidCommand(const LoadCommandInfo &L) const;
MachO::rpath_command
getRpathCommand(const LoadCommandInfo &L) const;
MachO::source_version_command
getSourceVersionCommand(const LoadCommandInfo &L) const;
MachO::entry_point_command
getEntryPointCommand(const LoadCommandInfo &L) const;
MachO::encryption_info_command
getEncryptionInfoCommand(const LoadCommandInfo &L) const;
MachO::encryption_info_command_64
getEncryptionInfoCommand64(const LoadCommandInfo &L) const;
MachO::sub_framework_command
getSubFrameworkCommand(const LoadCommandInfo &L) const;
MachO::sub_umbrella_command
getSubUmbrellaCommand(const LoadCommandInfo &L) const;
MachO::sub_library_command
getSubLibraryCommand(const LoadCommandInfo &L) const;
MachO::sub_client_command
getSubClientCommand(const LoadCommandInfo &L) const;
MachO::routines_command
getRoutinesCommand(const LoadCommandInfo &L) const;
MachO::routines_command_64
getRoutinesCommand64(const LoadCommandInfo &L) const;
MachO::thread_command
getThreadCommand(const LoadCommandInfo &L) const;
MachO::any_relocation_info getRelocation(DataRefImpl Rel) const;
MachO::data_in_code_entry getDice(DataRefImpl Rel) const;
const MachO::mach_header &getHeader() const;
const MachO::mach_header_64 &getHeader64() const;
uint32_t
getIndirectSymbolTableEntry(const MachO::dysymtab_command &DLC,
unsigned Index) const;
MachO::data_in_code_entry getDataInCodeTableEntry(uint32_t DataOffset,
unsigned Index) const;
MachO::symtab_command getSymtabLoadCommand() const;
MachO::dysymtab_command getDysymtabLoadCommand() const;
MachO::linkedit_data_command getDataInCodeLoadCommand() const;
MachO::linkedit_data_command getLinkOptHintsLoadCommand() const;
ArrayRef<uint8_t> getDyldInfoRebaseOpcodes() const;
ArrayRef<uint8_t> getDyldInfoBindOpcodes() const;
ArrayRef<uint8_t> getDyldInfoWeakBindOpcodes() const;
ArrayRef<uint8_t> getDyldInfoLazyBindOpcodes() const;
ArrayRef<uint8_t> getDyldInfoExportsTrie() const;
/// If the optional is std::nullopt, no header was found, but the object was
/// well-formed.
Expected<std::optional<MachO::dyld_chained_fixups_header>>
getChainedFixupsHeader() const;
Expected<std::vector<ChainedFixupTarget>> getDyldChainedFixupTargets() const;
// Note: This is a limited, temporary API, which will be removed when Apple
// upstreams their implementation. Please do not rely on this.
Expected<std::optional<MachO::linkedit_data_command>>
getChainedFixupsLoadCommand() const;
// Returns the number of sections listed in dyld_chained_starts_in_image, and
// a ChainedFixupsSegment for each segment that has fixups.
Expected<std::pair<size_t, std::vector<ChainedFixupsSegment>>>
getChainedFixupsSegments() const;
ArrayRef<uint8_t> getDyldExportsTrie() const;
SmallVector<uint64_t> getFunctionStarts() const;
ArrayRef<uint8_t> getUuid() const;
StringRef getStringTableData() const;
void ReadULEB128s(uint64_t Index, SmallVectorImpl<uint64_t> &Out) const;
static StringRef guessLibraryShortName(StringRef Name, bool &isFramework,
StringRef &Suffix);
static Triple::ArchType getArch(uint32_t CPUType, uint32_t CPUSubType);
static Triple getArchTriple(uint32_t CPUType, uint32_t CPUSubType,
const char **McpuDefault = nullptr,
const char **ArchFlag = nullptr);
static bool isValidArch(StringRef ArchFlag);
static ArrayRef<StringRef> getValidArchs();
static Triple getHostArch();
bool isRelocatableObject() const override;
StringRef mapDebugSectionName(StringRef Name) const override;
llvm::binaryformat::Swift5ReflectionSectionKind
mapReflectionSectionNameToEnumValue(StringRef SectionName) const override;
bool hasPageZeroSegment() const { return HasPageZeroSegment; }
static bool classof(const Binary *v) {
return v->isMachO();
}
static uint32_t
getVersionMinMajor(MachO::version_min_command &C, bool SDK) {
uint32_t VersionOrSDK = (SDK) ? C.sdk : C.version;
return (VersionOrSDK >> 16) & 0xffff;
}
static uint32_t
getVersionMinMinor(MachO::version_min_command &C, bool SDK) {
uint32_t VersionOrSDK = (SDK) ? C.sdk : C.version;
return (VersionOrSDK >> 8) & 0xff;
}
static uint32_t
getVersionMinUpdate(MachO::version_min_command &C, bool SDK) {
uint32_t VersionOrSDK = (SDK) ? C.sdk : C.version;
return VersionOrSDK & 0xff;
}
static std::string getBuildPlatform(uint32_t platform) {
switch (platform) {
case MachO::PLATFORM_MACOS: return "macos";
case MachO::PLATFORM_IOS: return "ios";
case MachO::PLATFORM_TVOS: return "tvos";
case MachO::PLATFORM_WATCHOS: return "watchos";
case MachO::PLATFORM_BRIDGEOS: return "bridgeos";
case MachO::PLATFORM_MACCATALYST: return "macCatalyst";
case MachO::PLATFORM_IOSSIMULATOR: return "iossimulator";
case MachO::PLATFORM_TVOSSIMULATOR: return "tvossimulator";
case MachO::PLATFORM_WATCHOSSIMULATOR: return "watchossimulator";
case MachO::PLATFORM_DRIVERKIT: return "driverkit";
default:
std::string ret;
raw_string_ostream ss(ret);
ss << format_hex(platform, 8, true);
return ss.str();
}
}
static std::string getBuildTool(uint32_t tools) {
switch (tools) {
case MachO::TOOL_CLANG: return "clang";
case MachO::TOOL_SWIFT: return "swift";
case MachO::TOOL_LD: return "ld";
case MachO::TOOL_LLD:
return "lld";
default:
std::string ret;
raw_string_ostream ss(ret);
ss << format_hex(tools, 8, true);
return ss.str();
}
}
static std::string getVersionString(uint32_t version) {
uint32_t major = (version >> 16) & 0xffff;
uint32_t minor = (version >> 8) & 0xff;
uint32_t update = version & 0xff;
SmallString<32> Version;
Version = utostr(major) + "." + utostr(minor);
if (update != 0)
Version += "." + utostr(update);
return std::string(std::string(Version.str()));
}
/// If the input path is a .dSYM bundle (as created by the dsymutil tool),
/// return the paths to the object files found in the bundle, otherwise return
/// an empty vector. If the path appears to be a .dSYM bundle but no objects
/// were found or there was a filesystem error, then return an error.
static Expected<std::vector<std::string>>
findDsymObjectMembers(StringRef Path);
private:
MachOObjectFile(MemoryBufferRef Object, bool IsLittleEndian, bool Is64Bits,
Error &Err, uint32_t UniversalCputype = 0,
uint32_t UniversalIndex = 0);
uint64_t getSymbolValueImpl(DataRefImpl Symb) const override;
union {
MachO::mach_header_64 Header64;
MachO::mach_header Header;
};
using SectionList = SmallVector<const char*, 1>;
SectionList Sections;
using LibraryList = SmallVector<const char*, 1>;
LibraryList Libraries;
LoadCommandList LoadCommands;
using LibraryShortName = SmallVector<StringRef, 1>;
using BuildToolList = SmallVector<const char*, 1>;
BuildToolList BuildTools;
mutable LibraryShortName LibrariesShortNames;
std::unique_ptr<BindRebaseSegInfo> BindRebaseSectionTable;
const char *SymtabLoadCmd = nullptr;
const char *DysymtabLoadCmd = nullptr;
const char *DataInCodeLoadCmd = nullptr;
const char *LinkOptHintsLoadCmd = nullptr;
const char *DyldInfoLoadCmd = nullptr;
const char *FuncStartsLoadCmd = nullptr;
const char *DyldChainedFixupsLoadCmd = nullptr;
const char *DyldExportsTrieLoadCmd = nullptr;
const char *UuidLoadCmd = nullptr;
bool HasPageZeroSegment = false;
};
/// DiceRef
inline DiceRef::DiceRef(DataRefImpl DiceP, const ObjectFile *Owner)
: DicePimpl(DiceP) , OwningObject(Owner) {}
inline bool DiceRef::operator==(const DiceRef &Other) const {
return DicePimpl == Other.DicePimpl;
}
inline bool DiceRef::operator<(const DiceRef &Other) const {
return DicePimpl < Other.DicePimpl;
}
inline void DiceRef::moveNext() {
const MachO::data_in_code_entry *P =
reinterpret_cast<const MachO::data_in_code_entry *>(DicePimpl.p);
DicePimpl.p = reinterpret_cast<uintptr_t>(P + 1);
}
// Since a Mach-O data in code reference, a DiceRef, can only be created when
// the OwningObject ObjectFile is a MachOObjectFile a static_cast<> is used for
// the methods that get the values of the fields of the reference.
inline std::error_code DiceRef::getOffset(uint32_t &Result) const {
const MachOObjectFile *MachOOF =
static_cast<const MachOObjectFile *>(OwningObject);
MachO::data_in_code_entry Dice = MachOOF->getDice(DicePimpl);
Result = Dice.offset;
return std::error_code();
}
inline std::error_code DiceRef::getLength(uint16_t &Result) const {
const MachOObjectFile *MachOOF =
static_cast<const MachOObjectFile *>(OwningObject);
MachO::data_in_code_entry Dice = MachOOF->getDice(DicePimpl);
Result = Dice.length;
return std::error_code();
}
inline std::error_code DiceRef::getKind(uint16_t &Result) const {
const MachOObjectFile *MachOOF =
static_cast<const MachOObjectFile *>(OwningObject);
MachO::data_in_code_entry Dice = MachOOF->getDice(DicePimpl);
Result = Dice.kind;
return std::error_code();
}
inline DataRefImpl DiceRef::getRawDataRefImpl() const {
return DicePimpl;
}
inline const ObjectFile *DiceRef::getObjectFile() const {
return OwningObject;
}
} // end namespace object
} // end namespace llvm
#endif // LLVM_OBJECT_MACHO_H
PK hwFZ1�� � � ) WindowsResource/ResourceScriptTokenList.hnu �[��� //===-- ResourceScriptTokenList.h -------------------------------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===---------------------------------------------------------------------===//
//
// This is a part of llvm-rc tokens header. It lists all the possible tokens
// that might occur in a correct .rc script.
//
//===---------------------------------------------------------------------===//
// Long tokens. They might consist of more than one character.
TOKEN(Invalid) // Invalid token. Should not occur in a valid script.
TOKEN(Int) // Integer (decimal, octal or hexadecimal).
TOKEN(String) // String value.
TOKEN(Identifier) // Script identifier (resource name or type).
// Short tokens. They usually consist of exactly one character.
// The definitions are of the form SHORT_TOKEN(TokenName, TokenChar).
// TokenChar is the one-character token representation occuring in the correct
// .rc scripts.
SHORT_TOKEN(BlockBegin, '{') // Start of the script block; can also be BEGIN.
SHORT_TOKEN(BlockEnd, '}') // End of the block; can also be END.
SHORT_TOKEN(Comma, ',') // Comma - resource arguments separator.
SHORT_TOKEN(Plus, '+') // Addition operator.
SHORT_TOKEN(Minus, '-') // Subtraction operator.
SHORT_TOKEN(Pipe, '|') // Bitwise-OR operator.
SHORT_TOKEN(Amp, '&') // Bitwise-AND operator.
SHORT_TOKEN(Tilde, '~') // Bitwise-NOT operator.
SHORT_TOKEN(LeftParen, '(') // Left parenthesis in the script expressions.
SHORT_TOKEN(RightParen, ')') // Right parenthesis.
PK hwFZ�jo # WindowsResource/ResourceProcessor.hnu �[��� //===-- ResourceProcessor.h -------------------------------------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===---------------------------------------------------------------------===//
#ifndef LLVM_INCLUDE_LLVM_SUPPORT_WINDOWS_RESOURCE_PROCESSOR_H
#define LLVM_INCLUDE_LLVM_SUPPORT_WINDOWS_RESOURCE_PROCESSOR_H
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/raw_ostream.h"
#include <memory>
#include <vector>
namespace llvm {
class WindowsResourceProcessor {
public:
using PathType = SmallVector<char, 64>;
WindowsResourceProcessor() {}
void addDefine(StringRef Key, StringRef Value = StringRef()) {
PreprocessorDefines.emplace_back(Key, Value);
}
void addInclude(const PathType &IncludePath) {
IncludeList.push_back(IncludePath);
}
void setVerbose(bool Verbose) { IsVerbose = Verbose; }
void setNullAtEnd(bool NullAtEnd) { AppendNull = NullAtEnd; }
Error process(StringRef InputData,
std::unique_ptr<raw_fd_ostream> OutputStream);
private:
StringRef InputData;
std::vector<PathType> IncludeList;
std::vector<std::pair<StringRef, StringRef>> PreprocessorDefines;
bool IsVerbose, AppendNull;
};
}
#endif
PK hwFZ���� � % WindowsResource/ResourceScriptToken.hnu �[��� //===-- ResourceScriptToken.h -----------------------------------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===---------------------------------------------------------------------===//
//
// This declares the .rc script tokens.
// The list of available tokens is located at ResourceScriptTokenList.h.
//
// Ref: msdn.microsoft.com/en-us/library/windows/desktop/aa380599(v=vs.85).aspx
//
//===---------------------------------------------------------------------===//
#ifndef LLVM_INCLUDE_LLVM_SUPPORT_WINDOWS_RESOURCE_SCRIPTTOKEN_H
#define LLVM_INCLUDE_LLVM_SUPPORT_WINDOWS_RESOURCE_SCRIPTTOKEN_H
#include "llvm/ADT/StringRef.h"
namespace llvm {
// A definition of a single resource script token. Each token has its kind
// (declared in ResourceScriptTokenList) and holds a value - a reference
// representation of the token.
// RCToken does not claim ownership on its value. A memory buffer containing
// the token value should be stored in a safe place and cannot be freed
// nor reallocated.
class RCToken {
public:
enum class Kind {
#define TOKEN(Name) Name,
#define SHORT_TOKEN(Name, Ch) Name,
#include "ResourceScriptTokenList.h"
#undef TOKEN
#undef SHORT_TOKEN
};
RCToken(RCToken::Kind RCTokenKind, StringRef Value);
// Get an integer value of the integer token.
uint32_t intValue() const;
bool isLongInt() const;
StringRef value() const;
Kind kind() const;
// Check if a token describes a binary operator.
bool isBinaryOp() const;
private:
Kind TokenKind;
StringRef TokenValue;
};
} // namespace llvm
#endif
PK hwFZm��w w # ProfileData/SymbolRemappingReader.hnu �[��� //===- SymbolRemappingReader.h - Read symbol remapping file -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains definitions needed for reading and applying symbol
// remapping files.
//
// Support is provided only for the Itanium C++ name mangling scheme for now.
//
// NOTE: If you are making changes to this file format, please remember
// to document them in the Clang documentation at
// tools/clang/docs/UsersManual.rst.
//
// File format
// -----------
//
// The symbol remappings are written as an ASCII text file. Blank lines and
// lines starting with a # are ignored. All other lines specify a kind of
// mangled name fragment, along with two fragments of that kind that should
// be treated as equivalent, separated by spaces.
//
// See http://itanium-cxx-abi.github.io/cxx-abi/abi.html#mangling for a
// description of the Itanium name mangling scheme.
//
// The accepted fragment kinds are:
//
// * name A <name>, such as 6foobar or St3__1
// * type A <type>, such as Ss or N4llvm9StringRefE
// * encoding An <encoding> (a complete mangling without the leading _Z)
//
// For example:
//
// # Ignore int / long differences to treat symbols from 32-bit and 64-bit
// # builds with differing size_t / ptrdiff_t / intptr_t as equivalent.
// type i l
// type j m
//
// # Ignore differences between libc++ and libstdc++, and between libstdc++'s
// # C++98 and C++11 ABIs.
// name 3std St3__1
// name 3std St7__cxx11
//
// # Remap a function overload to a specialization of a template (including
// # any local symbols declared within it).
// encoding N2NS1fEi N2NS1fIiEEvT_
//
// # Substitutions must be remapped separately from namespace 'std' for now.
// name Sa NSt3__19allocatorE
// name Sb NSt3__112basic_stringE
// type Ss NSt3__112basic_stringIcSt11char_traitsIcESaE
// # ...
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_PROFILEDATA_SYMBOLREMAPPINGREADER_H
#define LLVM_PROFILEDATA_SYMBOLREMAPPINGREADER_H
#include "llvm/ADT/StringRef.h"
#include "llvm/ProfileData/ItaniumManglingCanonicalizer.h"
#include "llvm/Support/Error.h"
namespace llvm {
class MemoryBuffer;
class SymbolRemappingParseError : public ErrorInfo<SymbolRemappingParseError> {
public:
SymbolRemappingParseError(StringRef File, int64_t Line, const Twine &Message)
: File(File), Line(Line), Message(Message.str()) {}
void log(llvm::raw_ostream &OS) const override {
OS << File << ':' << Line << ": " << Message;
}
std::error_code convertToErrorCode() const override {
return llvm::inconvertibleErrorCode();
}
StringRef getFileName() const { return File; }
int64_t getLineNum() const { return Line; }
StringRef getMessage() const { return Message; }
static char ID;
private:
std::string File;
int64_t Line;
std::string Message;
};
/// Reader for symbol remapping files.
///
/// Remaps the symbol names in profile data to match those in the program
/// according to a set of rules specified in a given file.
class SymbolRemappingReader {
public:
/// Read remappings from the given buffer, which must live as long as
/// the remapper.
Error read(MemoryBuffer &B);
/// A Key represents an equivalence class of symbol names.
using Key = uintptr_t;
/// Construct a key for the given symbol, or return an existing one if an
/// equivalent name has already been inserted. The symbol name must live
/// as long as the remapper.
///
/// The result will be Key() if the name cannot be remapped (typically
/// because it is not a valid mangled name).
Key insert(StringRef FunctionName) {
return Canonicalizer.canonicalize(FunctionName);
}
/// Map the given symbol name into the key for the corresponding equivalence
/// class.
///
/// The result will typically be Key() if no equivalent symbol has been
/// inserted, but this is not guaranteed: a Key different from all keys ever
/// returned by \c insert may be returned instead.
Key lookup(StringRef FunctionName) {
return Canonicalizer.lookup(FunctionName);
}
private:
ItaniumManglingCanonicalizer Canonicalizer;
};
} // end namespace llvm
#endif // LLVM_PROFILEDATA_SYMBOLREMAPPINGREADER_H
PK hwFZ O*�� � ! ProfileData/InstrProfCorrelator.hnu �[��� //===- InstrProfCorrelator.h ------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// This file defines InstrProfCorrelator used to generate PGO profiles from
// raw profile data and debug info.
//===----------------------------------------------------------------------===//
#ifndef LLVM_PROFILEDATA_INSTRPROFCORRELATOR_H
#define LLVM_PROFILEDATA_INSTRPROFCORRELATOR_H
#include "llvm/ADT/DenseSet.h"
#include "llvm/ProfileData/InstrProf.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Support/YAMLTraits.h"
#include <optional>
#include <vector>
namespace llvm {
class DWARFContext;
class DWARFDie;
namespace object {
class ObjectFile;
}
/// InstrProfCorrelator - A base class used to create raw instrumentation data
/// to their functions.
class InstrProfCorrelator {
public:
static llvm::Expected<std::unique_ptr<InstrProfCorrelator>>
get(StringRef DebugInfoFilename);
/// Construct a ProfileData vector used to correlate raw instrumentation data
/// to their functions.
virtual Error correlateProfileData() = 0;
/// Process debug info and dump the correlation data.
virtual Error dumpYaml(raw_ostream &OS) = 0;
/// Return the number of ProfileData elements.
std::optional<size_t> getDataSize() const;
/// Return a pointer to the names string that this class constructs.
const char *getNamesPointer() const { return Names.c_str(); }
/// Return the number of bytes in the names string.
size_t getNamesSize() const { return Names.size(); }
/// Return the size of the counters section in bytes.
uint64_t getCountersSectionSize() const {
return Ctx->CountersSectionEnd - Ctx->CountersSectionStart;
}
static const char *FunctionNameAttributeName;
static const char *CFGHashAttributeName;
static const char *NumCountersAttributeName;
enum InstrProfCorrelatorKind { CK_32Bit, CK_64Bit };
InstrProfCorrelatorKind getKind() const { return Kind; }
virtual ~InstrProfCorrelator() = default;
protected:
struct Context {
static llvm::Expected<std::unique_ptr<Context>>
get(std::unique_ptr<MemoryBuffer> Buffer, const object::ObjectFile &Obj);
std::unique_ptr<MemoryBuffer> Buffer;
/// The address range of the __llvm_prf_cnts section.
uint64_t CountersSectionStart;
uint64_t CountersSectionEnd;
/// True if target and host have different endian orders.
bool ShouldSwapBytes;
};
const std::unique_ptr<Context> Ctx;
InstrProfCorrelator(InstrProfCorrelatorKind K, std::unique_ptr<Context> Ctx)
: Ctx(std::move(Ctx)), Kind(K) {}
std::string Names;
std::vector<std::string> NamesVec;
struct Probe {
std::string FunctionName;
std::optional<std::string> LinkageName;
yaml::Hex64 CFGHash;
yaml::Hex64 CounterOffset;
uint32_t NumCounters;
std::optional<std::string> FilePath;
std::optional<int> LineNumber;
};
struct CorrelationData {
std::vector<Probe> Probes;
};
friend struct yaml::MappingTraits<Probe>;
friend struct yaml::SequenceElementTraits<Probe>;
friend struct yaml::MappingTraits<CorrelationData>;
private:
static llvm::Expected<std::unique_ptr<InstrProfCorrelator>>
get(std::unique_ptr<MemoryBuffer> Buffer);
const InstrProfCorrelatorKind Kind;
};
/// InstrProfCorrelatorImpl - A child of InstrProfCorrelator with a template
/// pointer type so that the ProfileData vector can be materialized.
template <class IntPtrT>
class InstrProfCorrelatorImpl : public InstrProfCorrelator {
public:
InstrProfCorrelatorImpl(std::unique_ptr<InstrProfCorrelator::Context> Ctx);
static bool classof(const InstrProfCorrelator *C);
/// Return a pointer to the underlying ProfileData vector that this class
/// constructs.
const RawInstrProf::ProfileData<IntPtrT> *getDataPointer() const {
return Data.empty() ? nullptr : Data.data();
}
/// Return the number of ProfileData elements.
size_t getDataSize() const { return Data.size(); }
static llvm::Expected<std::unique_ptr<InstrProfCorrelatorImpl<IntPtrT>>>
get(std::unique_ptr<InstrProfCorrelator::Context> Ctx,
const object::ObjectFile &Obj);
protected:
std::vector<RawInstrProf::ProfileData<IntPtrT>> Data;
Error correlateProfileData() override;
virtual void correlateProfileDataImpl(
InstrProfCorrelator::CorrelationData *Data = nullptr) = 0;
Error dumpYaml(raw_ostream &OS) override;
void addProbe(StringRef FunctionName, uint64_t CFGHash, IntPtrT CounterOffset,
IntPtrT FunctionPtr, uint32_t NumCounters);
private:
InstrProfCorrelatorImpl(InstrProfCorrelatorKind Kind,
std::unique_ptr<InstrProfCorrelator::Context> Ctx)
: InstrProfCorrelator(Kind, std::move(Ctx)){};
llvm::DenseSet<IntPtrT> CounterOffsets;
// Byte-swap the value if necessary.
template <class T> T maybeSwap(T Value) const {
return Ctx->ShouldSwapBytes ? sys::getSwappedBytes(Value) : Value;
}
};
/// DwarfInstrProfCorrelator - A child of InstrProfCorrelatorImpl that takes
/// DWARF debug info as input to correlate profiles.
template <class IntPtrT>
class DwarfInstrProfCorrelator : public InstrProfCorrelatorImpl<IntPtrT> {
public:
DwarfInstrProfCorrelator(std::unique_ptr<DWARFContext> DICtx,
std::unique_ptr<InstrProfCorrelator::Context> Ctx)
: InstrProfCorrelatorImpl<IntPtrT>(std::move(Ctx)),
DICtx(std::move(DICtx)) {}
private:
std::unique_ptr<DWARFContext> DICtx;
/// Return the address of the object that the provided DIE symbolizes.
std::optional<uint64_t> getLocation(const DWARFDie &Die) const;
/// Returns true if the provided DIE symbolizes an instrumentation probe
/// symbol.
static bool isDIEOfProbe(const DWARFDie &Die);
/// Iterate over DWARF DIEs to find those that symbolize instrumentation
/// probes and construct the ProfileData vector and Names string.
///
/// Here is some example DWARF for an instrumentation probe we are looking
/// for:
/// \code
/// DW_TAG_subprogram
/// DW_AT_low_pc (0x0000000000000000)
/// DW_AT_high_pc (0x0000000000000014)
/// DW_AT_name ("foo")
/// DW_TAG_variable
/// DW_AT_name ("__profc_foo")
/// DW_AT_location (DW_OP_addr 0x0)
/// DW_TAG_LLVM_annotation
/// DW_AT_name ("Function Name")
/// DW_AT_const_value ("foo")
/// DW_TAG_LLVM_annotation
/// DW_AT_name ("CFG Hash")
/// DW_AT_const_value (12345678)
/// DW_TAG_LLVM_annotation
/// DW_AT_name ("Num Counters")
/// DW_AT_const_value (2)
/// NULL
/// NULL
/// \endcode
void correlateProfileDataImpl(
InstrProfCorrelator::CorrelationData *Data = nullptr) override;
};
} // end namespace llvm
#endif // LLVM_PROFILEDATA_INSTRPROFCORRELATOR_H
PK hwFZ��h�5
5
ProfileData/MIBEntryDef.incnu �[��� /*===-- MemEntryDef.inc - MemProf profiling runtime macros -*- C++ -*-======== *\
|*
|* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|* See https://llvm.org/LICENSE.txt for license information.
|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|*
\*===----------------------------------------------------------------------===*/
/*
* This file defines the macros for memprof profiling data structures.
* Eg. usage to define the memprof meminfoblock struct:
*
* struct MemInfoBlock {
* #define MIBEntryDef(NameTag, Name, Type) Type Name;
* #include MIBEntryDef.inc
* #undef MIBEntryDef
* };
*
* This file has two identical copies. The primary copy lives in LLVM and
* the other one sits in compiler-rt/include/profile directory. To make changes
* in this file, first modify the primary copy and copy it over to compiler-rt.
* Testing of any change in this file can start only after the two copies are
* synced up.
*
\*===----------------------------------------------------------------------===*/
#ifndef MIBEntryDef
#define MIBEntryDef(NameTag, Name, Type)
#endif
MIBEntryDef(AllocCount = 1, AllocCount, uint32_t)
MIBEntryDef(TotalAccessCount = 2, TotalAccessCount, uint64_t)
MIBEntryDef(MinAccessCount = 3, MinAccessCount, uint64_t)
MIBEntryDef(MaxAccessCount = 4, MaxAccessCount, uint64_t)
MIBEntryDef(TotalSize = 5, TotalSize, uint64_t)
MIBEntryDef(MinSize = 6, MinSize, uint32_t)
MIBEntryDef(MaxSize = 7, MaxSize, uint32_t)
MIBEntryDef(AllocTimestamp = 8, AllocTimestamp, uint32_t)
MIBEntryDef(DeallocTimestamp = 9, DeallocTimestamp, uint32_t)
MIBEntryDef(TotalLifetime = 10, TotalLifetime, uint64_t)
MIBEntryDef(MinLifetime = 11, MinLifetime, uint32_t)
MIBEntryDef(MaxLifetime = 12, MaxLifetime, uint32_t)
MIBEntryDef(AllocCpuId = 13, AllocCpuId, uint32_t)
MIBEntryDef(DeallocCpuId = 14, DeallocCpuId, uint32_t)
MIBEntryDef(NumMigratedCpu = 15, NumMigratedCpu, uint32_t)
MIBEntryDef(NumLifetimeOverlaps = 16, NumLifetimeOverlaps, uint32_t)
MIBEntryDef(NumSameAllocCpu = 17, NumSameAllocCpu, uint32_t)
MIBEntryDef(NumSameDeallocCpu = 18, NumSameDeallocCpu, uint32_t)
MIBEntryDef(DataTypeId = 19, DataTypeId, uint64_t)
MIBEntryDef(TotalAccessDensity = 20, TotalAccessDensity, uint64_t)
MIBEntryDef(MinAccessDensity = 21, MinAccessDensity, uint32_t)
MIBEntryDef(MaxAccessDensity = 22, MaxAccessDensity, uint32_t)
MIBEntryDef(TotalLifetimeAccessDensity = 23, TotalLifetimeAccessDensity, uint64_t)
MIBEntryDef(MinLifetimeAccessDensity = 24, MinLifetimeAccessDensity, uint32_t)
MIBEntryDef(MaxLifetimeAccessDensity = 25, MaxLifetimeAccessDensity, uint32_t)
PK hwFZ��Ug j j ProfileData/InstrProfReader.hnu �[��� //===- InstrProfReader.h - Instrumented profiling readers -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains support for reading profiling data for instrumentation
// based PGO and coverage.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_PROFILEDATA_INSTRPROFREADER_H
#define LLVM_PROFILEDATA_INSTRPROFREADER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/IR/ProfileSummary.h"
#include "llvm/Object/BuildID.h"
#include "llvm/ProfileData/InstrProf.h"
#include "llvm/ProfileData/InstrProfCorrelator.h"
#include "llvm/ProfileData/MemProf.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/LineIterator.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Support/OnDiskHashTable.h"
#include "llvm/Support/SwapByteOrder.h"
#include <algorithm>
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <iterator>
#include <memory>
#include <utility>
#include <vector>
namespace llvm {
class InstrProfReader;
namespace vfs {
class FileSystem;
} // namespace vfs
/// A file format agnostic iterator over profiling data.
template <class record_type = NamedInstrProfRecord,
class reader_type = InstrProfReader>
class InstrProfIterator {
public:
using iterator_category = std::input_iterator_tag;
using value_type = record_type;
using difference_type = std::ptrdiff_t;
using pointer = value_type *;
using reference = value_type &;
private:
reader_type *Reader = nullptr;
value_type Record;
void increment() {
if (Error E = Reader->readNextRecord(Record)) {
// Handle errors in the reader.
InstrProfError::take(std::move(E));
*this = InstrProfIterator();
}
}
public:
InstrProfIterator() = default;
InstrProfIterator(reader_type *Reader) : Reader(Reader) { increment(); }
InstrProfIterator &operator++() {
increment();
return *this;
}
bool operator==(const InstrProfIterator &RHS) const {
return Reader == RHS.Reader;
}
bool operator!=(const InstrProfIterator &RHS) const {
return Reader != RHS.Reader;
}
value_type &operator*() { return Record; }
value_type *operator->() { return &Record; }
};
/// Base class and interface for reading profiling data of any known instrprof
/// format. Provides an iterator over NamedInstrProfRecords.
class InstrProfReader {
instrprof_error LastError = instrprof_error::success;
std::string LastErrorMsg;
public:
InstrProfReader() = default;
virtual ~InstrProfReader() = default;
/// Read the header. Required before reading first record.
virtual Error readHeader() = 0;
/// Read a single record.
virtual Error readNextRecord(NamedInstrProfRecord &Record) = 0;
/// Read a list of binary ids.
virtual Error readBinaryIds(std::vector<llvm::object::BuildID> &BinaryIds) {
return success();
}
/// Print binary ids.
virtual Error printBinaryIds(raw_ostream &OS) { return success(); };
/// Iterator over profile data.
InstrProfIterator<> begin() { return InstrProfIterator<>(this); }
InstrProfIterator<> end() { return InstrProfIterator<>(); }
/// Return the profile version.
virtual uint64_t getVersion() const = 0;
virtual bool isIRLevelProfile() const = 0;
virtual bool hasCSIRLevelProfile() const = 0;
virtual bool instrEntryBBEnabled() const = 0;
/// Return true if we must provide debug info to create PGO profiles.
virtual bool useDebugInfoCorrelate() const { return false; }
/// Return true if the profile has single byte counters representing coverage.
virtual bool hasSingleByteCoverage() const = 0;
/// Return true if the profile only instruments function entries.
virtual bool functionEntryOnly() const = 0;
/// Return true if profile includes a memory profile.
virtual bool hasMemoryProfile() const = 0;
/// Return true if this has a temporal profile.
virtual bool hasTemporalProfile() const = 0;
/// Returns a BitsetEnum describing the attributes of the profile. To check
/// individual attributes prefer using the helpers above.
virtual InstrProfKind getProfileKind() const = 0;
/// Return the PGO symtab. There are three different readers:
/// Raw, Text, and Indexed profile readers. The first two types
/// of readers are used only by llvm-profdata tool, while the indexed
/// profile reader is also used by llvm-cov tool and the compiler (
/// backend or frontend). Since creating PGO symtab can create
/// significant runtime and memory overhead (as it touches data
/// for the whole program), InstrProfSymtab for the indexed profile
/// reader should be created on demand and it is recommended to be
/// only used for dumping purpose with llvm-proftool, not with the
/// compiler.
virtual InstrProfSymtab &getSymtab() = 0;
/// Compute the sum of counts and return in Sum.
void accumulateCounts(CountSumOrPercent &Sum, bool IsCS);
protected:
std::unique_ptr<InstrProfSymtab> Symtab;
/// A list of temporal profile traces.
SmallVector<TemporalProfTraceTy> TemporalProfTraces;
/// The total number of temporal profile traces seen.
uint64_t TemporalProfTraceStreamSize = 0;
/// Set the current error and return same.
Error error(instrprof_error Err, const std::string &ErrMsg = "") {
LastError = Err;
LastErrorMsg = ErrMsg;
if (Err == instrprof_error::success)
return Error::success();
return make_error<InstrProfError>(Err, ErrMsg);
}
Error error(Error &&E) {
handleAllErrors(std::move(E), [&](const InstrProfError &IPE) {
LastError = IPE.get();
LastErrorMsg = IPE.getMessage();
});
return make_error<InstrProfError>(LastError, LastErrorMsg);
}
/// Clear the current error and return a successful one.
Error success() { return error(instrprof_error::success); }
public:
/// Return true if the reader has finished reading the profile data.
bool isEOF() { return LastError == instrprof_error::eof; }
/// Return true if the reader encountered an error reading profiling data.
bool hasError() { return LastError != instrprof_error::success && !isEOF(); }
/// Get the current error.
Error getError() {
if (hasError())
return make_error<InstrProfError>(LastError, LastErrorMsg);
return Error::success();
}
/// Factory method to create an appropriately typed reader for the given
/// instrprof file.
static Expected<std::unique_ptr<InstrProfReader>>
create(const Twine &Path, vfs::FileSystem &FS,
const InstrProfCorrelator *Correlator = nullptr);
static Expected<std::unique_ptr<InstrProfReader>>
create(std::unique_ptr<MemoryBuffer> Buffer,
const InstrProfCorrelator *Correlator = nullptr);
/// \param Weight for raw profiles use this as the temporal profile trace
/// weight
/// \returns a list of temporal profile traces.
virtual SmallVector<TemporalProfTraceTy> &
getTemporalProfTraces(std::optional<uint64_t> Weight = {}) {
// For non-raw profiles we ignore the input weight and instead use the
// weights already in the traces.
return TemporalProfTraces;
}
/// \returns the total number of temporal profile traces seen.
uint64_t getTemporalProfTraceStreamSize() {
return TemporalProfTraceStreamSize;
}
};
/// Reader for the simple text based instrprof format.
///
/// This format is a simple text format that's suitable for test data. Records
/// are separated by one or more blank lines, and record fields are separated by
/// new lines.
///
/// Each record consists of a function name, a function hash, a number of
/// counters, and then each counter value, in that order.
class TextInstrProfReader : public InstrProfReader {
private:
/// The profile data file contents.
std::unique_ptr<MemoryBuffer> DataBuffer;
/// Iterator over the profile data.
line_iterator Line;
/// The attributes of the current profile.
InstrProfKind ProfileKind = InstrProfKind::Unknown;
Error readValueProfileData(InstrProfRecord &Record);
Error readTemporalProfTraceData();
public:
TextInstrProfReader(std::unique_ptr<MemoryBuffer> DataBuffer_)
: DataBuffer(std::move(DataBuffer_)), Line(*DataBuffer, true, '#') {}
TextInstrProfReader(const TextInstrProfReader &) = delete;
TextInstrProfReader &operator=(const TextInstrProfReader &) = delete;
/// Return true if the given buffer is in text instrprof format.
static bool hasFormat(const MemoryBuffer &Buffer);
// Text format does not have version, so return 0.
uint64_t getVersion() const override { return 0; }
bool isIRLevelProfile() const override {
return static_cast<bool>(ProfileKind & InstrProfKind::IRInstrumentation);
}
bool hasCSIRLevelProfile() const override {
return static_cast<bool>(ProfileKind & InstrProfKind::ContextSensitive);
}
bool instrEntryBBEnabled() const override {
return static_cast<bool>(ProfileKind &
InstrProfKind::FunctionEntryInstrumentation);
}
bool hasSingleByteCoverage() const override {
return static_cast<bool>(ProfileKind & InstrProfKind::SingleByteCoverage);
}
bool functionEntryOnly() const override {
return static_cast<bool>(ProfileKind & InstrProfKind::FunctionEntryOnly);
}
bool hasMemoryProfile() const override {
// TODO: Add support for text format memory profiles.
return false;
}
bool hasTemporalProfile() const override {
return static_cast<bool>(ProfileKind & InstrProfKind::TemporalProfile);
}
InstrProfKind getProfileKind() const override { return ProfileKind; }
/// Read the header.
Error readHeader() override;
/// Read a single record.
Error readNextRecord(NamedInstrProfRecord &Record) override;
InstrProfSymtab &getSymtab() override {
assert(Symtab);
return *Symtab;
}
};
/// Reader for the raw instrprof binary format from runtime.
///
/// This format is a raw memory dump of the instrumentation-based profiling data
/// from the runtime. It has no index.
///
/// Templated on the unsigned type whose size matches pointers on the platform
/// that wrote the profile.
template <class IntPtrT>
class RawInstrProfReader : public InstrProfReader {
private:
/// The profile data file contents.
std::unique_ptr<MemoryBuffer> DataBuffer;
/// If available, this hold the ProfileData array used to correlate raw
/// instrumentation data to their functions.
const InstrProfCorrelatorImpl<IntPtrT> *Correlator;
/// A list of timestamps paired with a function name reference.
std::vector<std::pair<uint64_t, uint64_t>> TemporalProfTimestamps;
bool ShouldSwapBytes;
// The value of the version field of the raw profile data header. The lower 56
// bits specifies the format version and the most significant 8 bits specify
// the variant types of the profile.
uint64_t Version;
uint64_t CountersDelta;
uint64_t NamesDelta;
const RawInstrProf::ProfileData<IntPtrT> *Data;
const RawInstrProf::ProfileData<IntPtrT> *DataEnd;
const char *CountersStart;
const char *CountersEnd;
const char *NamesStart;
const char *NamesEnd;
// After value profile is all read, this pointer points to
// the header of next profile data (if exists)
const uint8_t *ValueDataStart;
uint32_t ValueKindLast;
uint32_t CurValueDataSize;
/// Total size of binary ids.
uint64_t BinaryIdsSize{0};
/// Start address of binary id length and data pairs.
const uint8_t *BinaryIdsStart;
public:
RawInstrProfReader(std::unique_ptr<MemoryBuffer> DataBuffer,
const InstrProfCorrelator *Correlator)
: DataBuffer(std::move(DataBuffer)),
Correlator(dyn_cast_or_null<const InstrProfCorrelatorImpl<IntPtrT>>(
Correlator)) {}
RawInstrProfReader(const RawInstrProfReader &) = delete;
RawInstrProfReader &operator=(const RawInstrProfReader &) = delete;
static bool hasFormat(const MemoryBuffer &DataBuffer);
Error readHeader() override;
Error readNextRecord(NamedInstrProfRecord &Record) override;
Error readBinaryIds(std::vector<llvm::object::BuildID> &BinaryIds) override;
Error printBinaryIds(raw_ostream &OS) override;
uint64_t getVersion() const override { return Version; }
bool isIRLevelProfile() const override {
return (Version & VARIANT_MASK_IR_PROF) != 0;
}
bool hasCSIRLevelProfile() const override {
return (Version & VARIANT_MASK_CSIR_PROF) != 0;
}
bool instrEntryBBEnabled() const override {
return (Version & VARIANT_MASK_INSTR_ENTRY) != 0;
}
bool useDebugInfoCorrelate() const override {
return (Version & VARIANT_MASK_DBG_CORRELATE) != 0;
}
bool hasSingleByteCoverage() const override {
return (Version & VARIANT_MASK_BYTE_COVERAGE) != 0;
}
bool functionEntryOnly() const override {
return (Version & VARIANT_MASK_FUNCTION_ENTRY_ONLY) != 0;
}
bool hasMemoryProfile() const override {
// Memory profiles have a separate raw format, so this should never be set.
assert(!(Version & VARIANT_MASK_MEMPROF));
return false;
}
bool hasTemporalProfile() const override {
return (Version & VARIANT_MASK_TEMPORAL_PROF) != 0;
}
/// Returns a BitsetEnum describing the attributes of the raw instr profile.
InstrProfKind getProfileKind() const override;
InstrProfSymtab &getSymtab() override {
assert(Symtab.get());
return *Symtab.get();
}
SmallVector<TemporalProfTraceTy> &
getTemporalProfTraces(std::optional<uint64_t> Weight = {}) override;
private:
Error createSymtab(InstrProfSymtab &Symtab);
Error readNextHeader(const char *CurrentPos);
Error readHeader(const RawInstrProf::Header &Header);
template <class IntT> IntT swap(IntT Int) const {
return ShouldSwapBytes ? sys::getSwappedBytes(Int) : Int;
}
support::endianness getDataEndianness() const {
support::endianness HostEndian = getHostEndianness();
if (!ShouldSwapBytes)
return HostEndian;
if (HostEndian == support::little)
return support::big;
else
return support::little;
}
inline uint8_t getNumPaddingBytes(uint64_t SizeInBytes) {
return 7 & (sizeof(uint64_t) - SizeInBytes % sizeof(uint64_t));
}
Error readName(NamedInstrProfRecord &Record);
Error readFuncHash(NamedInstrProfRecord &Record);
Error readRawCounts(InstrProfRecord &Record);
Error readValueProfilingData(InstrProfRecord &Record);
bool atEnd() const { return Data == DataEnd; }
void advanceData() {
// `CountersDelta` is a constant zero when using debug info correlation.
if (!Correlator) {
// The initial CountersDelta is the in-memory address difference between
// the data and counts sections:
// start(__llvm_prf_cnts) - start(__llvm_prf_data)
// As we advance to the next record, we maintain the correct CountersDelta
// with respect to the next record.
CountersDelta -= sizeof(*Data);
}
Data++;
ValueDataStart += CurValueDataSize;
}
const char *getNextHeaderPos() const {
assert(atEnd());
return (const char *)ValueDataStart;
}
StringRef getName(uint64_t NameRef) const {
return Symtab->getFuncName(swap(NameRef));
}
int getCounterTypeSize() const {
return hasSingleByteCoverage() ? sizeof(uint8_t) : sizeof(uint64_t);
}
};
using RawInstrProfReader32 = RawInstrProfReader<uint32_t>;
using RawInstrProfReader64 = RawInstrProfReader<uint64_t>;
namespace IndexedInstrProf {
enum class HashT : uint32_t;
} // end namespace IndexedInstrProf
/// Trait for lookups into the on-disk hash table for the binary instrprof
/// format.
class InstrProfLookupTrait {
std::vector<NamedInstrProfRecord> DataBuffer;
IndexedInstrProf::HashT HashType;
unsigned FormatVersion;
// Endianness of the input value profile data.
// It should be LE by default, but can be changed
// for testing purpose.
support::endianness ValueProfDataEndianness = support::little;
public:
InstrProfLookupTrait(IndexedInstrProf::HashT HashType, unsigned FormatVersion)
: HashType(HashType), FormatVersion(FormatVersion) {}
using data_type = ArrayRef<NamedInstrProfRecord>;
using internal_key_type = StringRef;
using external_key_type = StringRef;
using hash_value_type = uint64_t;
using offset_type = uint64_t;
static bool EqualKey(StringRef A, StringRef B) { return A == B; }
static StringRef GetInternalKey(StringRef K) { return K; }
static StringRef GetExternalKey(StringRef K) { return K; }
hash_value_type ComputeHash(StringRef K);
static std::pair<offset_type, offset_type>
ReadKeyDataLength(const unsigned char *&D) {
using namespace support;
offset_type KeyLen = endian::readNext<offset_type, little, unaligned>(D);
offset_type DataLen = endian::readNext<offset_type, little, unaligned>(D);
return std::make_pair(KeyLen, DataLen);
}
StringRef ReadKey(const unsigned char *D, offset_type N) {
return StringRef((const char *)D, N);
}
bool readValueProfilingData(const unsigned char *&D,
const unsigned char *const End);
data_type ReadData(StringRef K, const unsigned char *D, offset_type N);
// Used for testing purpose only.
void setValueProfDataEndianness(support::endianness Endianness) {
ValueProfDataEndianness = Endianness;
}
};
struct InstrProfReaderIndexBase {
virtual ~InstrProfReaderIndexBase() = default;
// Read all the profile records with the same key pointed to the current
// iterator.
virtual Error getRecords(ArrayRef<NamedInstrProfRecord> &Data) = 0;
// Read all the profile records with the key equal to FuncName
virtual Error getRecords(StringRef FuncName,
ArrayRef<NamedInstrProfRecord> &Data) = 0;
virtual void advanceToNextKey() = 0;
virtual bool atEnd() const = 0;
virtual void setValueProfDataEndianness(support::endianness Endianness) = 0;
virtual uint64_t getVersion() const = 0;
virtual bool isIRLevelProfile() const = 0;
virtual bool hasCSIRLevelProfile() const = 0;
virtual bool instrEntryBBEnabled() const = 0;
virtual bool hasSingleByteCoverage() const = 0;
virtual bool functionEntryOnly() const = 0;
virtual bool hasMemoryProfile() const = 0;
virtual bool hasTemporalProfile() const = 0;
virtual InstrProfKind getProfileKind() const = 0;
virtual Error populateSymtab(InstrProfSymtab &) = 0;
};
using OnDiskHashTableImplV3 =
OnDiskIterableChainedHashTable<InstrProfLookupTrait>;
using MemProfRecordHashTable =
OnDiskIterableChainedHashTable<memprof::RecordLookupTrait>;
using MemProfFrameHashTable =
OnDiskIterableChainedHashTable<memprof::FrameLookupTrait>;
template <typename HashTableImpl>
class InstrProfReaderItaniumRemapper;
template <typename HashTableImpl>
class InstrProfReaderIndex : public InstrProfReaderIndexBase {
private:
std::unique_ptr<HashTableImpl> HashTable;
typename HashTableImpl::data_iterator RecordIterator;
uint64_t FormatVersion;
friend class InstrProfReaderItaniumRemapper<HashTableImpl>;
public:
InstrProfReaderIndex(const unsigned char *Buckets,
const unsigned char *const Payload,
const unsigned char *const Base,
IndexedInstrProf::HashT HashType, uint64_t Version);
~InstrProfReaderIndex() override = default;
Error getRecords(ArrayRef<NamedInstrProfRecord> &Data) override;
Error getRecords(StringRef FuncName,
ArrayRef<NamedInstrProfRecord> &Data) override;
void advanceToNextKey() override { RecordIterator++; }
bool atEnd() const override {
return RecordIterator == HashTable->data_end();
}
void setValueProfDataEndianness(support::endianness Endianness) override {
HashTable->getInfoObj().setValueProfDataEndianness(Endianness);
}
uint64_t getVersion() const override { return GET_VERSION(FormatVersion); }
bool isIRLevelProfile() const override {
return (FormatVersion & VARIANT_MASK_IR_PROF) != 0;
}
bool hasCSIRLevelProfile() const override {
return (FormatVersion & VARIANT_MASK_CSIR_PROF) != 0;
}
bool instrEntryBBEnabled() const override {
return (FormatVersion & VARIANT_MASK_INSTR_ENTRY) != 0;
}
bool hasSingleByteCoverage() const override {
return (FormatVersion & VARIANT_MASK_BYTE_COVERAGE) != 0;
}
bool functionEntryOnly() const override {
return (FormatVersion & VARIANT_MASK_FUNCTION_ENTRY_ONLY) != 0;
}
bool hasMemoryProfile() const override {
return (FormatVersion & VARIANT_MASK_MEMPROF) != 0;
}
bool hasTemporalProfile() const override {
return (FormatVersion & VARIANT_MASK_TEMPORAL_PROF) != 0;
}
InstrProfKind getProfileKind() const override;
Error populateSymtab(InstrProfSymtab &Symtab) override {
return Symtab.create(HashTable->keys());
}
};
/// Name matcher supporting fuzzy matching of symbol names to names in profiles.
class InstrProfReaderRemapper {
public:
virtual ~InstrProfReaderRemapper() = default;
virtual Error populateRemappings() { return Error::success(); }
virtual Error getRecords(StringRef FuncName,
ArrayRef<NamedInstrProfRecord> &Data) = 0;
};
/// Reader for the indexed binary instrprof format.
class IndexedInstrProfReader : public InstrProfReader {
private:
/// The profile data file contents.
std::unique_ptr<MemoryBuffer> DataBuffer;
/// The profile remapping file contents.
std::unique_ptr<MemoryBuffer> RemappingBuffer;
/// The index into the profile data.
std::unique_ptr<InstrProfReaderIndexBase> Index;
/// The profile remapping file contents.
std::unique_ptr<InstrProfReaderRemapper> Remapper;
/// Profile summary data.
std::unique_ptr<ProfileSummary> Summary;
/// Context sensitive profile summary data.
std::unique_ptr<ProfileSummary> CS_Summary;
/// MemProf profile schema (if available).
memprof::MemProfSchema Schema;
/// MemProf record profile data on-disk indexed via llvm::md5(FunctionName).
std::unique_ptr<MemProfRecordHashTable> MemProfRecordTable;
/// MemProf frame profile data on-disk indexed via frame id.
std::unique_ptr<MemProfFrameHashTable> MemProfFrameTable;
/// Total size of binary ids.
uint64_t BinaryIdsSize{0};
/// Start address of binary id length and data pairs.
const uint8_t *BinaryIdsStart = nullptr;
// Index to the current record in the record array.
unsigned RecordIndex;
// Read the profile summary. Return a pointer pointing to one byte past the
// end of the summary data if it exists or the input \c Cur.
// \c UseCS indicates whether to use the context-sensitive profile summary.
const unsigned char *readSummary(IndexedInstrProf::ProfVersion Version,
const unsigned char *Cur, bool UseCS);
public:
IndexedInstrProfReader(
std::unique_ptr<MemoryBuffer> DataBuffer,
std::unique_ptr<MemoryBuffer> RemappingBuffer = nullptr)
: DataBuffer(std::move(DataBuffer)),
RemappingBuffer(std::move(RemappingBuffer)), RecordIndex(0) {}
IndexedInstrProfReader(const IndexedInstrProfReader &) = delete;
IndexedInstrProfReader &operator=(const IndexedInstrProfReader &) = delete;
/// Return the profile version.
uint64_t getVersion() const override { return Index->getVersion(); }
bool isIRLevelProfile() const override { return Index->isIRLevelProfile(); }
bool hasCSIRLevelProfile() const override {
return Index->hasCSIRLevelProfile();
}
bool instrEntryBBEnabled() const override {
return Index->instrEntryBBEnabled();
}
bool hasSingleByteCoverage() const override {
return Index->hasSingleByteCoverage();
}
bool functionEntryOnly() const override { return Index->functionEntryOnly(); }
bool hasMemoryProfile() const override { return Index->hasMemoryProfile(); }
bool hasTemporalProfile() const override {
return Index->hasTemporalProfile();
}
/// Returns a BitsetEnum describing the attributes of the indexed instr
/// profile.
InstrProfKind getProfileKind() const override {
return Index->getProfileKind();
}
/// Return true if the given buffer is in an indexed instrprof format.
static bool hasFormat(const MemoryBuffer &DataBuffer);
/// Read the file header.
Error readHeader() override;
/// Read a single record.
Error readNextRecord(NamedInstrProfRecord &Record) override;
/// Return the NamedInstrProfRecord associated with FuncName and FuncHash.
/// When return a hash_mismatch error and MismatchedFuncSum is not nullptr,
/// the sum of all counters in the mismatched function will be set to
/// MismatchedFuncSum. If there are multiple instances of mismatched
/// functions, MismatchedFuncSum returns the maximum.
Expected<InstrProfRecord>
getInstrProfRecord(StringRef FuncName, uint64_t FuncHash,
uint64_t *MismatchedFuncSum = nullptr);
/// Return the memprof record for the function identified by
/// llvm::md5(Name).
Expected<memprof::MemProfRecord> getMemProfRecord(uint64_t FuncNameHash);
/// Fill Counts with the profile data for the given function name.
Error getFunctionCounts(StringRef FuncName, uint64_t FuncHash,
std::vector<uint64_t> &Counts);
/// Return the maximum of all known function counts.
/// \c UseCS indicates whether to use the context-sensitive count.
uint64_t getMaximumFunctionCount(bool UseCS) {
if (UseCS) {
assert(CS_Summary && "No context sensitive profile summary");
return CS_Summary->getMaxFunctionCount();
} else {
assert(Summary && "No profile summary");
return Summary->getMaxFunctionCount();
}
}
/// Factory method to create an indexed reader.
static Expected<std::unique_ptr<IndexedInstrProfReader>>
create(const Twine &Path, vfs::FileSystem &FS,
const Twine &RemappingPath = "");
static Expected<std::unique_ptr<IndexedInstrProfReader>>
create(std::unique_ptr<MemoryBuffer> Buffer,
std::unique_ptr<MemoryBuffer> RemappingBuffer = nullptr);
// Used for testing purpose only.
void setValueProfDataEndianness(support::endianness Endianness) {
Index->setValueProfDataEndianness(Endianness);
}
// See description in the base class. This interface is designed
// to be used by llvm-profdata (for dumping). Avoid using this when
// the client is the compiler.
InstrProfSymtab &getSymtab() override;
/// Return the profile summary.
/// \c UseCS indicates whether to use the context-sensitive summary.
ProfileSummary &getSummary(bool UseCS) {
if (UseCS) {
assert(CS_Summary && "No context sensitive summary");
return *CS_Summary;
} else {
assert(Summary && "No profile summary");
return *Summary;
}
}
Error readBinaryIds(std::vector<llvm::object::BuildID> &BinaryIds) override;
Error printBinaryIds(raw_ostream &OS) override;
};
} // end namespace llvm
#endif // LLVM_PROFILEDATA_INSTRPROFREADER_H
PK hwFZ8�.C�� �� ProfileData/InstrProfData.incnu �[��� /*===-- InstrProfData.inc - instr profiling runtime structures -*- C++ -*-=== *\
|*
|* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|* See https://llvm.org/LICENSE.txt for license information.
|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|*
\*===----------------------------------------------------------------------===*/
/*
* This is the main file that defines all the data structure, signature,
* constant literals that are shared across profiling runtime library,
* compiler (instrumentation), and host tools (reader/writer). The entities
* defined in this file affect the profile runtime ABI, the raw profile format,
* or both.
*
* The file has two identical copies. The primary copy lives in LLVM and
* the other one sits in compiler-rt/lib/profile directory. To make changes
* in this file, first modify the primary copy and copy it over to compiler-rt.
* Testing of any change in this file can start only after the two copies are
* synced up.
*
* The first part of the file includes macros that defines types, names, and
* initializers for the member fields of the core data structures. The field
* declarations for one structure is enabled by defining the field activation
* macro associated with that structure. Only one field activation record
* can be defined at one time and the rest definitions will be filtered out by
* the preprocessor.
*
* Examples of how the template is used to instantiate structure definition:
* 1. To declare a structure:
*
* struct ProfData {
* #define INSTR_PROF_DATA(Type, LLVMType, Name, Initializer) \
* Type Name;
* #include "llvm/ProfileData/InstrProfData.inc"
* };
*
* 2. To construct LLVM type arrays for the struct type:
*
* Type *DataTypes[] = {
* #define INSTR_PROF_DATA(Type, LLVMType, Name, Initializer) \
* LLVMType,
* #include "llvm/ProfileData/InstrProfData.inc"
* };
*
* 4. To construct constant array for the initializers:
* #define INSTR_PROF_DATA(Type, LLVMType, Name, Initializer) \
* Initializer,
* Constant *ConstantVals[] = {
* #include "llvm/ProfileData/InstrProfData.inc"
* };
*
*
* The second part of the file includes definitions all other entities that
* are related to runtime ABI and format. When no field activation macro is
* defined, this file can be included to introduce the definitions.
*
\*===----------------------------------------------------------------------===*/
/* Functions marked with INSTR_PROF_VISIBILITY must have hidden visibility in
* the compiler runtime. */
#ifndef INSTR_PROF_VISIBILITY
#define INSTR_PROF_VISIBILITY
#endif
/* INSTR_PROF_DATA start. */
/* Definition of member fields of the per-function control structure. */
#ifndef INSTR_PROF_DATA
#define INSTR_PROF_DATA(Type, LLVMType, Name, Initializer)
#else
#define INSTR_PROF_DATA_DEFINED
#endif
INSTR_PROF_DATA(const uint64_t, llvm::Type::getInt64Ty(Ctx), NameRef, \
ConstantInt::get(llvm::Type::getInt64Ty(Ctx), \
IndexedInstrProf::ComputeHash(getPGOFuncNameVarInitializer(Inc->getName()))))
INSTR_PROF_DATA(const uint64_t, llvm::Type::getInt64Ty(Ctx), FuncHash, \
ConstantInt::get(llvm::Type::getInt64Ty(Ctx), \
Inc->getHash()->getZExtValue()))
INSTR_PROF_DATA(const IntPtrT, IntPtrTy, CounterPtr, RelativeCounterPtr)
/* This is used to map function pointers for the indirect call targets to
* function name hashes during the conversion from raw to merged profile
* data.
*/
INSTR_PROF_DATA(const IntPtrT, llvm::Type::getInt8PtrTy(Ctx), FunctionPointer, \
FunctionAddr)
INSTR_PROF_DATA(IntPtrT, llvm::Type::getInt8PtrTy(Ctx), Values, \
ValuesPtrExpr)
INSTR_PROF_DATA(const uint32_t, llvm::Type::getInt32Ty(Ctx), NumCounters, \
ConstantInt::get(llvm::Type::getInt32Ty(Ctx), NumCounters))
INSTR_PROF_DATA(const uint16_t, Int16ArrayTy, NumValueSites[IPVK_Last+1], \
ConstantArray::get(Int16ArrayTy, Int16ArrayVals))
#undef INSTR_PROF_DATA
/* INSTR_PROF_DATA end. */
/* This is an internal data structure used by value profiler. It
* is defined here to allow serialization code sharing by LLVM
* to be used in unit test.
*
* typedef struct ValueProfNode {
* // InstrProfValueData VData;
* uint64_t Value;
* uint64_t Count;
* struct ValueProfNode *Next;
* } ValueProfNode;
*/
/* INSTR_PROF_VALUE_NODE start. */
#ifndef INSTR_PROF_VALUE_NODE
#define INSTR_PROF_VALUE_NODE(Type, LLVMType, Name, Initializer)
#else
#define INSTR_PROF_DATA_DEFINED
#endif
INSTR_PROF_VALUE_NODE(uint64_t, llvm::Type::getInt64Ty(Ctx), Value, \
ConstantInt::get(llvm::Type::GetInt64Ty(Ctx), 0))
INSTR_PROF_VALUE_NODE(uint64_t, llvm::Type::getInt64Ty(Ctx), Count, \
ConstantInt::get(llvm::Type::GetInt64Ty(Ctx), 0))
INSTR_PROF_VALUE_NODE(PtrToNodeT, llvm::Type::getInt8PtrTy(Ctx), Next, \
ConstantInt::get(llvm::Type::GetInt8PtrTy(Ctx), 0))
#undef INSTR_PROF_VALUE_NODE
/* INSTR_PROF_VALUE_NODE end. */
/* INSTR_PROF_RAW_HEADER start */
/* Definition of member fields of the raw profile header data structure. */
#ifndef INSTR_PROF_RAW_HEADER
#define INSTR_PROF_RAW_HEADER(Type, Name, Initializer)
#else
#define INSTR_PROF_DATA_DEFINED
#endif
INSTR_PROF_RAW_HEADER(uint64_t, Magic, __llvm_profile_get_magic())
INSTR_PROF_RAW_HEADER(uint64_t, Version, __llvm_profile_get_version())
INSTR_PROF_RAW_HEADER(uint64_t, BinaryIdsSize, __llvm_write_binary_ids(NULL))
/* FIXME: A more accurate name is NumData */
INSTR_PROF_RAW_HEADER(uint64_t, DataSize, DataSize)
INSTR_PROF_RAW_HEADER(uint64_t, PaddingBytesBeforeCounters, PaddingBytesBeforeCounters)
/* FIXME: A more accurate name is NumCounters */
INSTR_PROF_RAW_HEADER(uint64_t, CountersSize, CountersSize)
INSTR_PROF_RAW_HEADER(uint64_t, PaddingBytesAfterCounters, PaddingBytesAfterCounters)
INSTR_PROF_RAW_HEADER(uint64_t, NamesSize, NamesSize)
INSTR_PROF_RAW_HEADER(uint64_t, CountersDelta,
(uintptr_t)CountersBegin - (uintptr_t)DataBegin)
INSTR_PROF_RAW_HEADER(uint64_t, NamesDelta, (uintptr_t)NamesBegin)
INSTR_PROF_RAW_HEADER(uint64_t, ValueKindLast, IPVK_Last)
#undef INSTR_PROF_RAW_HEADER
/* INSTR_PROF_RAW_HEADER end */
/* VALUE_PROF_FUNC_PARAM start */
/* Definition of parameter types of the runtime API used to do value profiling
* for a given value site.
*/
#ifndef VALUE_PROF_FUNC_PARAM
#define VALUE_PROF_FUNC_PARAM(ArgType, ArgName, ArgLLVMType)
#define INSTR_PROF_COMMA
#else
#define INSTR_PROF_DATA_DEFINED
#define INSTR_PROF_COMMA ,
#endif
VALUE_PROF_FUNC_PARAM(uint64_t, TargetValue, Type::getInt64Ty(Ctx)) \
INSTR_PROF_COMMA
VALUE_PROF_FUNC_PARAM(void *, Data, Type::getInt8PtrTy(Ctx)) INSTR_PROF_COMMA
VALUE_PROF_FUNC_PARAM(uint32_t, CounterIndex, Type::getInt32Ty(Ctx))
#undef VALUE_PROF_FUNC_PARAM
#undef INSTR_PROF_COMMA
/* VALUE_PROF_FUNC_PARAM end */
/* VALUE_PROF_KIND start */
#ifndef VALUE_PROF_KIND
#define VALUE_PROF_KIND(Enumerator, Value, Descr)
#else
#define INSTR_PROF_DATA_DEFINED
#endif
/* For indirect function call value profiling, the addresses of the target
* functions are profiled by the instrumented code. The target addresses are
* written in the raw profile data and converted to target function name's MD5
* hash by the profile reader during deserialization. Typically, this happens
* when the raw profile data is read during profile merging.
*
* For this remapping the ProfData is used. ProfData contains both the function
* name hash and the function address.
*/
VALUE_PROF_KIND(IPVK_IndirectCallTarget, 0, "indirect call target")
/* For memory intrinsic functions size profiling. */
VALUE_PROF_KIND(IPVK_MemOPSize, 1, "memory intrinsic functions size")
/* These two kinds must be the last to be
* declared. This is to make sure the string
* array created with the template can be
* indexed with the kind value.
*/
VALUE_PROF_KIND(IPVK_First, IPVK_IndirectCallTarget, "first")
VALUE_PROF_KIND(IPVK_Last, IPVK_MemOPSize, "last")
#undef VALUE_PROF_KIND
/* VALUE_PROF_KIND end */
#undef COVMAP_V2_OR_V3
#ifdef COVMAP_V2
#define COVMAP_V2_OR_V3
#endif
#ifdef COVMAP_V3
#define COVMAP_V2_OR_V3
#endif
/* COVMAP_FUNC_RECORD start */
/* Definition of member fields of the function record structure in coverage
* map.
*/
#ifndef COVMAP_FUNC_RECORD
#define COVMAP_FUNC_RECORD(Type, LLVMType, Name, Initializer)
#else
#define INSTR_PROF_DATA_DEFINED
#endif
#ifdef COVMAP_V1
COVMAP_FUNC_RECORD(const IntPtrT, llvm::Type::getInt8PtrTy(Ctx), \
NamePtr, llvm::ConstantExpr::getBitCast(NamePtr, \
llvm::Type::getInt8PtrTy(Ctx)))
COVMAP_FUNC_RECORD(const uint32_t, llvm::Type::getInt32Ty(Ctx), NameSize, \
llvm::ConstantInt::get(llvm::Type::getInt32Ty(Ctx), \
NameValue.size()))
#endif
#ifdef COVMAP_V2_OR_V3
COVMAP_FUNC_RECORD(const int64_t, llvm::Type::getInt64Ty(Ctx), NameRef, \
llvm::ConstantInt::get( \
llvm::Type::getInt64Ty(Ctx), NameHash))
#endif
COVMAP_FUNC_RECORD(const uint32_t, llvm::Type::getInt32Ty(Ctx), DataSize, \
llvm::ConstantInt::get( \
llvm::Type::getInt32Ty(Ctx), CoverageMapping.size()))
COVMAP_FUNC_RECORD(const uint64_t, llvm::Type::getInt64Ty(Ctx), FuncHash, \
llvm::ConstantInt::get( \
llvm::Type::getInt64Ty(Ctx), FuncHash))
#ifdef COVMAP_V3
COVMAP_FUNC_RECORD(const uint64_t, llvm::Type::getInt64Ty(Ctx), FilenamesRef, \
llvm::ConstantInt::get( \
llvm::Type::getInt64Ty(Ctx), FilenamesRef))
COVMAP_FUNC_RECORD(const char, \
llvm::ArrayType::get(llvm::Type::getInt8Ty(Ctx), \
CoverageMapping.size()), \
CoverageMapping,
llvm::ConstantDataArray::getRaw( \
CoverageMapping, CoverageMapping.size(), \
llvm::Type::getInt8Ty(Ctx)))
#endif
#undef COVMAP_FUNC_RECORD
/* COVMAP_FUNC_RECORD end. */
/* COVMAP_HEADER start */
/* Definition of member fields of coverage map header.
*/
#ifndef COVMAP_HEADER
#define COVMAP_HEADER(Type, LLVMType, Name, Initializer)
#else
#define INSTR_PROF_DATA_DEFINED
#endif
COVMAP_HEADER(uint32_t, Int32Ty, NRecords, \
llvm::ConstantInt::get(Int32Ty, NRecords))
COVMAP_HEADER(uint32_t, Int32Ty, FilenamesSize, \
llvm::ConstantInt::get(Int32Ty, FilenamesSize))
COVMAP_HEADER(uint32_t, Int32Ty, CoverageSize, \
llvm::ConstantInt::get(Int32Ty, CoverageMappingSize))
COVMAP_HEADER(uint32_t, Int32Ty, Version, \
llvm::ConstantInt::get(Int32Ty, CovMapVersion::CurrentVersion))
#undef COVMAP_HEADER
/* COVMAP_HEADER end. */
#ifdef INSTR_PROF_SECT_ENTRY
#define INSTR_PROF_DATA_DEFINED
INSTR_PROF_SECT_ENTRY(IPSK_data, \
INSTR_PROF_QUOTE(INSTR_PROF_DATA_COMMON), \
INSTR_PROF_DATA_COFF, "__DATA,")
INSTR_PROF_SECT_ENTRY(IPSK_cnts, \
INSTR_PROF_QUOTE(INSTR_PROF_CNTS_COMMON), \
INSTR_PROF_CNTS_COFF, "__DATA,")
INSTR_PROF_SECT_ENTRY(IPSK_name, \
INSTR_PROF_QUOTE(INSTR_PROF_NAME_COMMON), \
INSTR_PROF_NAME_COFF, "__DATA,")
INSTR_PROF_SECT_ENTRY(IPSK_vals, \
INSTR_PROF_QUOTE(INSTR_PROF_VALS_COMMON), \
INSTR_PROF_VALS_COFF, "__DATA,")
INSTR_PROF_SECT_ENTRY(IPSK_vnodes, \
INSTR_PROF_QUOTE(INSTR_PROF_VNODES_COMMON), \
INSTR_PROF_VNODES_COFF, "__DATA,")
INSTR_PROF_SECT_ENTRY(IPSK_covmap, \
INSTR_PROF_QUOTE(INSTR_PROF_COVMAP_COMMON), \
INSTR_PROF_COVMAP_COFF, "__LLVM_COV,")
INSTR_PROF_SECT_ENTRY(IPSK_covfun, \
INSTR_PROF_QUOTE(INSTR_PROF_COVFUN_COMMON), \
INSTR_PROF_COVFUN_COFF, "__LLVM_COV,")
INSTR_PROF_SECT_ENTRY(IPSK_orderfile, \
INSTR_PROF_QUOTE(INSTR_PROF_ORDERFILE_COMMON), \
INSTR_PROF_QUOTE(INSTR_PROF_ORDERFILE_COFF), "__DATA,")
#undef INSTR_PROF_SECT_ENTRY
#endif
#ifdef INSTR_PROF_VALUE_PROF_DATA
#define INSTR_PROF_DATA_DEFINED
#define INSTR_PROF_MAX_NUM_VAL_PER_SITE 255
/*!
* This is the header of the data structure that defines the on-disk
* layout of the value profile data of a particular kind for one function.
*/
typedef struct ValueProfRecord {
/* The kind of the value profile record. */
uint32_t Kind;
/*
* The number of value profile sites. It is guaranteed to be non-zero;
* otherwise the record for this kind won't be emitted.
*/
uint32_t NumValueSites;
/*
* The first element of the array that stores the number of profiled
* values for each value site. The size of the array is NumValueSites.
* Since NumValueSites is greater than zero, there is at least one
* element in the array.
*/
uint8_t SiteCountArray[1];
/*
* The fake declaration is for documentation purpose only.
* Align the start of next field to be on 8 byte boundaries.
uint8_t Padding[X];
*/
/* The array of value profile data. The size of the array is the sum
* of all elements in SiteCountArray[].
InstrProfValueData ValueData[];
*/
#ifdef __cplusplus
/*!
* Return the number of value sites.
*/
uint32_t getNumValueSites() const { return NumValueSites; }
/*!
* Read data from this record and save it to Record.
*/
void deserializeTo(InstrProfRecord &Record,
InstrProfSymtab *SymTab);
/*
* In-place byte swap:
* Do byte swap for this instance. \c Old is the original order before
* the swap, and \c New is the New byte order.
*/
void swapBytes(support::endianness Old, support::endianness New);
#endif
} ValueProfRecord;
/*!
* Per-function header/control data structure for value profiling
* data in indexed format.
*/
typedef struct ValueProfData {
/*
* Total size in bytes including this field. It must be a multiple
* of sizeof(uint64_t).
*/
uint32_t TotalSize;
/*
*The number of value profile kinds that has value profile data.
* In this implementation, a value profile kind is considered to
* have profile data if the number of value profile sites for the
* kind is not zero. More aggressively, the implementation can
* choose to check the actual data value: if none of the value sites
* has any profiled values, the kind can be skipped.
*/
uint32_t NumValueKinds;
/*
* Following are a sequence of variable length records. The prefix/header
* of each record is defined by ValueProfRecord type. The number of
* records is NumValueKinds.
* ValueProfRecord Record_1;
* ValueProfRecord Record_N;
*/
#if __cplusplus
/*!
* Return the total size in bytes of the on-disk value profile data
* given the data stored in Record.
*/
static uint32_t getSize(const InstrProfRecord &Record);
/*!
* Return a pointer to \c ValueProfData instance ready to be streamed.
*/
static std::unique_ptr<ValueProfData>
serializeFrom(const InstrProfRecord &Record);
/*!
* Check the integrity of the record.
*/
Error checkIntegrity();
/*!
* Return a pointer to \c ValueProfileData instance ready to be read.
* All data in the instance are properly byte swapped. The input
* data is assumed to be in little endian order.
*/
static Expected<std::unique_ptr<ValueProfData>>
getValueProfData(const unsigned char *SrcBuffer,
const unsigned char *const SrcBufferEnd,
support::endianness SrcDataEndianness);
/*!
* Swap byte order from \c Endianness order to host byte order.
*/
void swapBytesToHost(support::endianness Endianness);
/*!
* Swap byte order from host byte order to \c Endianness order.
*/
void swapBytesFromHost(support::endianness Endianness);
/*!
* Return the total size of \c ValueProfileData.
*/
uint32_t getSize() const { return TotalSize; }
/*!
* Read data from this data and save it to \c Record.
*/
void deserializeTo(InstrProfRecord &Record,
InstrProfSymtab *SymTab);
void operator delete(void *ptr) { ::operator delete(ptr); }
#endif
} ValueProfData;
/*
* The closure is designed to abstact away two types of value profile data:
* - InstrProfRecord which is the primary data structure used to
* represent profile data in host tools (reader, writer, and profile-use)
* - value profile runtime data structure suitable to be used by C
* runtime library.
*
* Both sources of data need to serialize to disk/memory-buffer in common
* format: ValueProfData. The abstraction allows compiler-rt's raw profiler
* writer to share the same format and code with indexed profile writer.
*
* For documentation of the member methods below, refer to corresponding methods
* in class InstrProfRecord.
*/
typedef struct ValueProfRecordClosure {
const void *Record;
uint32_t (*GetNumValueKinds)(const void *Record);
uint32_t (*GetNumValueSites)(const void *Record, uint32_t VKind);
uint32_t (*GetNumValueData)(const void *Record, uint32_t VKind);
uint32_t (*GetNumValueDataForSite)(const void *R, uint32_t VK, uint32_t S);
/*
* After extracting the value profile data from the value profile record,
* this method is used to map the in-memory value to on-disk value. If
* the method is null, value will be written out untranslated.
*/
uint64_t (*RemapValueData)(uint32_t, uint64_t Value);
void (*GetValueForSite)(const void *R, InstrProfValueData *Dst, uint32_t K,
uint32_t S);
ValueProfData *(*AllocValueProfData)(size_t TotalSizeInBytes);
} ValueProfRecordClosure;
INSTR_PROF_VISIBILITY ValueProfRecord *
getFirstValueProfRecord(ValueProfData *VPD);
INSTR_PROF_VISIBILITY ValueProfRecord *
getValueProfRecordNext(ValueProfRecord *VPR);
INSTR_PROF_VISIBILITY InstrProfValueData *
getValueProfRecordValueData(ValueProfRecord *VPR);
INSTR_PROF_VISIBILITY uint32_t
getValueProfRecordHeaderSize(uint32_t NumValueSites);
#undef INSTR_PROF_VALUE_PROF_DATA
#endif /* INSTR_PROF_VALUE_PROF_DATA */
#ifdef INSTR_PROF_COMMON_API_IMPL
#define INSTR_PROF_DATA_DEFINED
#ifdef __cplusplus
#define INSTR_PROF_INLINE inline
#define INSTR_PROF_NULLPTR nullptr
#else
#define INSTR_PROF_INLINE
#define INSTR_PROF_NULLPTR NULL
#endif
#ifndef offsetof
#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
#endif
/*!
* Return the \c ValueProfRecord header size including the
* padding bytes.
*/
INSTR_PROF_VISIBILITY INSTR_PROF_INLINE
uint32_t getValueProfRecordHeaderSize(uint32_t NumValueSites) {
uint32_t Size = offsetof(ValueProfRecord, SiteCountArray) +
sizeof(uint8_t) * NumValueSites;
/* Round the size to multiple of 8 bytes. */
Size = (Size + 7) & ~7;
return Size;
}
/*!
* Return the total size of the value profile record including the
* header and the value data.
*/
INSTR_PROF_VISIBILITY INSTR_PROF_INLINE
uint32_t getValueProfRecordSize(uint32_t NumValueSites,
uint32_t NumValueData) {
return getValueProfRecordHeaderSize(NumValueSites) +
sizeof(InstrProfValueData) * NumValueData;
}
/*!
* Return the pointer to the start of value data array.
*/
INSTR_PROF_VISIBILITY INSTR_PROF_INLINE
InstrProfValueData *getValueProfRecordValueData(ValueProfRecord *This) {
return (InstrProfValueData *)((char *)This + getValueProfRecordHeaderSize(
This->NumValueSites));
}
/*!
* Return the total number of value data for \c This record.
*/
INSTR_PROF_VISIBILITY INSTR_PROF_INLINE
uint32_t getValueProfRecordNumValueData(ValueProfRecord *This) {
uint32_t NumValueData = 0;
uint32_t I;
for (I = 0; I < This->NumValueSites; I++)
NumValueData += This->SiteCountArray[I];
return NumValueData;
}
/*!
* Use this method to advance to the next \c This \c ValueProfRecord.
*/
INSTR_PROF_VISIBILITY INSTR_PROF_INLINE
ValueProfRecord *getValueProfRecordNext(ValueProfRecord *This) {
uint32_t NumValueData = getValueProfRecordNumValueData(This);
return (ValueProfRecord *)((char *)This +
getValueProfRecordSize(This->NumValueSites,
NumValueData));
}
/*!
* Return the first \c ValueProfRecord instance.
*/
INSTR_PROF_VISIBILITY INSTR_PROF_INLINE
ValueProfRecord *getFirstValueProfRecord(ValueProfData *This) {
return (ValueProfRecord *)((char *)This + sizeof(ValueProfData));
}
/* Closure based interfaces. */
/*!
* Return the total size in bytes of the on-disk value profile data
* given the data stored in Record.
*/
INSTR_PROF_VISIBILITY uint32_t
getValueProfDataSize(ValueProfRecordClosure *Closure) {
uint32_t Kind;
uint32_t TotalSize = sizeof(ValueProfData);
const void *Record = Closure->Record;
for (Kind = IPVK_First; Kind <= IPVK_Last; Kind++) {
uint32_t NumValueSites = Closure->GetNumValueSites(Record, Kind);
if (!NumValueSites)
continue;
TotalSize += getValueProfRecordSize(NumValueSites,
Closure->GetNumValueData(Record, Kind));
}
return TotalSize;
}
/*!
* Extract value profile data of a function for the profile kind \c ValueKind
* from the \c Closure and serialize the data into \c This record instance.
*/
INSTR_PROF_VISIBILITY void
serializeValueProfRecordFrom(ValueProfRecord *This,
ValueProfRecordClosure *Closure,
uint32_t ValueKind, uint32_t NumValueSites) {
uint32_t S;
const void *Record = Closure->Record;
This->Kind = ValueKind;
This->NumValueSites = NumValueSites;
InstrProfValueData *DstVD = getValueProfRecordValueData(This);
for (S = 0; S < NumValueSites; S++) {
uint32_t ND = Closure->GetNumValueDataForSite(Record, ValueKind, S);
This->SiteCountArray[S] = ND;
Closure->GetValueForSite(Record, DstVD, ValueKind, S);
DstVD += ND;
}
}
/*!
* Extract value profile data of a function from the \c Closure
* and serialize the data into \c DstData if it is not NULL or heap
* memory allocated by the \c Closure's allocator method. If \c
* DstData is not null, the caller is expected to set the TotalSize
* in DstData.
*/
INSTR_PROF_VISIBILITY ValueProfData *
serializeValueProfDataFrom(ValueProfRecordClosure *Closure,
ValueProfData *DstData) {
uint32_t Kind;
uint32_t TotalSize =
DstData ? DstData->TotalSize : getValueProfDataSize(Closure);
ValueProfData *VPD =
DstData ? DstData : Closure->AllocValueProfData(TotalSize);
VPD->TotalSize = TotalSize;
VPD->NumValueKinds = Closure->GetNumValueKinds(Closure->Record);
ValueProfRecord *VR = getFirstValueProfRecord(VPD);
for (Kind = IPVK_First; Kind <= IPVK_Last; Kind++) {
uint32_t NumValueSites = Closure->GetNumValueSites(Closure->Record, Kind);
if (!NumValueSites)
continue;
serializeValueProfRecordFrom(VR, Closure, Kind, NumValueSites);
VR = getValueProfRecordNext(VR);
}
return VPD;
}
#undef INSTR_PROF_COMMON_API_IMPL
#endif /* INSTR_PROF_COMMON_API_IMPL */
/*============================================================================*/
#ifndef INSTR_PROF_DATA_DEFINED
#ifndef INSTR_PROF_DATA_INC
#define INSTR_PROF_DATA_INC
/* Helper macros. */
#define INSTR_PROF_SIMPLE_QUOTE(x) #x
#define INSTR_PROF_QUOTE(x) INSTR_PROF_SIMPLE_QUOTE(x)
#define INSTR_PROF_SIMPLE_CONCAT(x,y) x ## y
#define INSTR_PROF_CONCAT(x,y) INSTR_PROF_SIMPLE_CONCAT(x,y)
/* Magic number to detect file format and endianness.
* Use 255 at one end, since no UTF-8 file can use that character. Avoid 0,
* so that utilities, like strings, don't grab it as a string. 129 is also
* invalid UTF-8, and high enough to be interesting.
* Use "lprofr" in the centre to stand for "LLVM Profile Raw", or "lprofR"
* for 32-bit platforms.
*/
#define INSTR_PROF_RAW_MAGIC_64 (uint64_t)255 << 56 | (uint64_t)'l' << 48 | \
(uint64_t)'p' << 40 | (uint64_t)'r' << 32 | (uint64_t)'o' << 24 | \
(uint64_t)'f' << 16 | (uint64_t)'r' << 8 | (uint64_t)129
#define INSTR_PROF_RAW_MAGIC_32 (uint64_t)255 << 56 | (uint64_t)'l' << 48 | \
(uint64_t)'p' << 40 | (uint64_t)'r' << 32 | (uint64_t)'o' << 24 | \
(uint64_t)'f' << 16 | (uint64_t)'R' << 8 | (uint64_t)129
/* FIXME: Please remedy the fixme in the header before bumping the version. */
/* Raw profile format version (start from 1). */
#define INSTR_PROF_RAW_VERSION 8
/* Indexed profile format version (start from 1). */
#define INSTR_PROF_INDEX_VERSION 10
/* Coverage mapping format version (start from 0). */
#define INSTR_PROF_COVMAP_VERSION 5
/* Profile version is always of type uint64_t. Reserve the upper 8 bits in the
* version for other variants of profile. We set the lowest bit of the upper 8
* bits (i.e. bit 56) to 1 to indicate if this is an IR-level instrumentation
* generated profile, and 0 if this is a Clang FE generated profile.
* 1 in bit 57 indicates there are context-sensitive records in the profile.
* The 59th bit indicates whether to use debug info to correlate profiles.
* The 60th bit indicates single byte coverage instrumentation.
* The 61st bit indicates function entry instrumentation only.
* The 62nd bit indicates whether memory profile information is present.
* The 63rd bit indicates if this is a temporal profile.
*/
#define VARIANT_MASKS_ALL 0xff00000000000000ULL
#define GET_VERSION(V) ((V) & ~VARIANT_MASKS_ALL)
#define VARIANT_MASK_IR_PROF (0x1ULL << 56)
#define VARIANT_MASK_CSIR_PROF (0x1ULL << 57)
#define VARIANT_MASK_INSTR_ENTRY (0x1ULL << 58)
#define VARIANT_MASK_DBG_CORRELATE (0x1ULL << 59)
#define VARIANT_MASK_BYTE_COVERAGE (0x1ULL << 60)
#define VARIANT_MASK_FUNCTION_ENTRY_ONLY (0x1ULL << 61)
#define VARIANT_MASK_MEMPROF (0x1ULL << 62)
#define VARIANT_MASK_TEMPORAL_PROF (0x1ULL << 63)
#define INSTR_PROF_RAW_VERSION_VAR __llvm_profile_raw_version
#define INSTR_PROF_PROFILE_RUNTIME_VAR __llvm_profile_runtime
#define INSTR_PROF_PROFILE_COUNTER_BIAS_VAR __llvm_profile_counter_bias
#define INSTR_PROF_PROFILE_SET_TIMESTAMP __llvm_profile_set_timestamp
/* The variable that holds the name of the profile data
* specified via command line. */
#define INSTR_PROF_PROFILE_NAME_VAR __llvm_profile_filename
/* section name strings common to all targets other
than WIN32 */
#define INSTR_PROF_DATA_COMMON __llvm_prf_data
#define INSTR_PROF_NAME_COMMON __llvm_prf_names
#define INSTR_PROF_CNTS_COMMON __llvm_prf_cnts
#define INSTR_PROF_VALS_COMMON __llvm_prf_vals
#define INSTR_PROF_VNODES_COMMON __llvm_prf_vnds
#define INSTR_PROF_COVMAP_COMMON __llvm_covmap
#define INSTR_PROF_COVFUN_COMMON __llvm_covfun
#define INSTR_PROF_ORDERFILE_COMMON __llvm_orderfile
/* Windows section names. Because these section names contain dollar characters,
* they must be quoted.
*/
#define INSTR_PROF_DATA_COFF ".lprfd$M"
#define INSTR_PROF_NAME_COFF ".lprfn$M"
#define INSTR_PROF_CNTS_COFF ".lprfc$M"
#define INSTR_PROF_VALS_COFF ".lprfv$M"
#define INSTR_PROF_VNODES_COFF ".lprfnd$M"
#define INSTR_PROF_COVMAP_COFF ".lcovmap$M"
#define INSTR_PROF_COVFUN_COFF ".lcovfun$M"
#define INSTR_PROF_ORDERFILE_COFF ".lorderfile$M"
#ifdef _WIN32
/* Runtime section names and name strings. */
#define INSTR_PROF_DATA_SECT_NAME INSTR_PROF_DATA_COFF
#define INSTR_PROF_NAME_SECT_NAME INSTR_PROF_NAME_COFF
#define INSTR_PROF_CNTS_SECT_NAME INSTR_PROF_CNTS_COFF
/* Array of pointers. Each pointer points to a list
* of value nodes associated with one value site.
*/
#define INSTR_PROF_VALS_SECT_NAME INSTR_PROF_VALS_COFF
/* Value profile nodes section. */
#define INSTR_PROF_VNODES_SECT_NAME INSTR_PROF_VNODES_COFF
#define INSTR_PROF_COVMAP_SECT_NAME INSTR_PROF_COVMAP_COFF
#define INSTR_PROF_COVFUN_SECT_NAME INSTR_PROF_COVFUN_COFF
#define INSTR_PROF_ORDERFILE_SECT_NAME INSTR_PROF_ORDERFILE_COFF
#else
/* Runtime section names and name strings. */
#define INSTR_PROF_DATA_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_DATA_COMMON)
#define INSTR_PROF_NAME_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_NAME_COMMON)
#define INSTR_PROF_CNTS_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_CNTS_COMMON)
/* Array of pointers. Each pointer points to a list
* of value nodes associated with one value site.
*/
#define INSTR_PROF_VALS_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_VALS_COMMON)
/* Value profile nodes section. */
#define INSTR_PROF_VNODES_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_VNODES_COMMON)
#define INSTR_PROF_COVMAP_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_COVMAP_COMMON)
#define INSTR_PROF_COVFUN_SECT_NAME INSTR_PROF_QUOTE(INSTR_PROF_COVFUN_COMMON)
/* Order file instrumentation. */
#define INSTR_PROF_ORDERFILE_SECT_NAME \
INSTR_PROF_QUOTE(INSTR_PROF_ORDERFILE_COMMON)
#endif
#define INSTR_PROF_ORDERFILE_BUFFER_NAME _llvm_order_file_buffer
#define INSTR_PROF_ORDERFILE_BUFFER_NAME_STR \
INSTR_PROF_QUOTE(INSTR_PROF_ORDERFILE_BUFFER_NAME)
#define INSTR_PROF_ORDERFILE_BUFFER_IDX_NAME _llvm_order_file_buffer_idx
#define INSTR_PROF_ORDERFILE_BUFFER_IDX_NAME_STR \
INSTR_PROF_QUOTE(INSTR_PROF_ORDERFILE_BUFFER_IDX_NAME)
/* Macros to define start/stop section symbol for a given
* section on Linux. For instance
* INSTR_PROF_SECT_START(INSTR_PROF_DATA_SECT_NAME) will
* expand to __start___llvm_prof_data
*/
#define INSTR_PROF_SECT_START(Sect) \
INSTR_PROF_CONCAT(__start_,Sect)
#define INSTR_PROF_SECT_STOP(Sect) \
INSTR_PROF_CONCAT(__stop_,Sect)
/* Value Profiling API linkage name. */
#define INSTR_PROF_VALUE_PROF_FUNC __llvm_profile_instrument_target
#define INSTR_PROF_VALUE_PROF_FUNC_STR \
INSTR_PROF_QUOTE(INSTR_PROF_VALUE_PROF_FUNC)
#define INSTR_PROF_VALUE_PROF_MEMOP_FUNC __llvm_profile_instrument_memop
#define INSTR_PROF_VALUE_PROF_MEMOP_FUNC_STR \
INSTR_PROF_QUOTE(INSTR_PROF_VALUE_PROF_MEMOP_FUNC)
/* InstrProfile per-function control data alignment. */
#define INSTR_PROF_DATA_ALIGNMENT 8
/* The data structure that represents a tracked value by the
* value profiler.
*/
typedef struct InstrProfValueData {
/* Profiled value. */
uint64_t Value;
/* Number of times the value appears in the training run. */
uint64_t Count;
} InstrProfValueData;
#endif /* INSTR_PROF_DATA_INC */
#ifndef INSTR_ORDER_FILE_INC
/* The maximal # of functions: 128*1024 (the buffer size will be 128*4 KB). */
#define INSTR_ORDER_FILE_BUFFER_SIZE 131072
#define INSTR_ORDER_FILE_BUFFER_BITS 17
#define INSTR_ORDER_FILE_BUFFER_MASK 0x1ffff
#endif /* INSTR_ORDER_FILE_INC */
#else
#undef INSTR_PROF_DATA_DEFINED
#endif
#undef COVMAP_V2_OR_V3
#ifdef INSTR_PROF_VALUE_PROF_MEMOP_API
#ifdef __cplusplus
#define INSTR_PROF_INLINE inline
#else
#define INSTR_PROF_INLINE
#endif
/* The value range buckets (22 buckets) for the memop size value profiling looks
* like:
*
* [0, 0]
* [1, 1]
* [2, 2]
* [3, 3]
* [4, 4]
* [5, 5]
* [6, 6]
* [7, 7]
* [8, 8]
* [9, 15]
* [16, 16]
* [17, 31]
* [32, 32]
* [33, 63]
* [64, 64]
* [65, 127]
* [128, 128]
* [129, 255]
* [256, 256]
* [257, 511]
* [512, 512]
* [513, UINT64_MAX]
*
* Each range has a 'representative value' which is the lower end value of the
* range and used to store in the runtime profile data records and the VP
* metadata. For example, it's 2 for [2, 2] and 64 for [65, 127].
*/
#define INSTR_PROF_NUM_BUCKETS 22
/*
* Clz and Popcount. This code was copied from
* compiler-rt/lib/fuzzer/{FuzzerBuiltins.h,FuzzerBuiltinsMsvc.h} and
* llvm/include/llvm/Support/MathExtras.h.
*/
#if defined(_MSC_VER) && !defined(__clang__)
#include <intrin.h>
INSTR_PROF_VISIBILITY INSTR_PROF_INLINE
int InstProfClzll(unsigned long long X) {
unsigned long LeadZeroIdx = 0;
#if !defined(_M_ARM64) && !defined(_M_X64)
// Scan the high 32 bits.
if (_BitScanReverse(&LeadZeroIdx, (unsigned long)(X >> 32)))
return (int)(63 - (LeadZeroIdx + 32)); // Create a bit offset
// from the MSB.
// Scan the low 32 bits.
if (_BitScanReverse(&LeadZeroIdx, (unsigned long)(X)))
return (int)(63 - LeadZeroIdx);
#else
if (_BitScanReverse64(&LeadZeroIdx, X)) return 63 - LeadZeroIdx;
#endif
return 64;
}
INSTR_PROF_VISIBILITY INSTR_PROF_INLINE
int InstProfPopcountll(unsigned long long X) {
// This code originates from https://reviews.llvm.org/rG30626254510f.
unsigned long long v = X;
v = v - ((v >> 1) & 0x5555555555555555ULL);
v = (v & 0x3333333333333333ULL) + ((v >> 2) & 0x3333333333333333ULL);
v = (v + (v >> 4)) & 0x0F0F0F0F0F0F0F0FULL;
return (int)((unsigned long long)(v * 0x0101010101010101ULL) >> 56);
}
#else
INSTR_PROF_VISIBILITY INSTR_PROF_INLINE
int InstProfClzll(unsigned long long X) { return __builtin_clzll(X); }
INSTR_PROF_VISIBILITY INSTR_PROF_INLINE
int InstProfPopcountll(unsigned long long X) { return __builtin_popcountll(X); }
#endif /* defined(_MSC_VER) && !defined(__clang__) */
/* Map an (observed) memop size value to the representative value of its range.
* For example, 5 -> 5, 22 -> 17, 99 -> 65, 256 -> 256, 1001 -> 513. */
INSTR_PROF_VISIBILITY INSTR_PROF_INLINE uint64_t
InstrProfGetRangeRepValue(uint64_t Value) {
if (Value <= 8)
// The first ranges are individually tracked. Use the value as is.
return Value;
else if (Value >= 513)
// The last range is mapped to its lowest value.
return 513;
else if (InstProfPopcountll(Value) == 1)
// If it's a power of two, use it as is.
return Value;
else
// Otherwise, take to the previous power of two + 1.
return (UINT64_C(1) << (64 - InstProfClzll(Value) - 1)) + 1;
}
/* Return true if the range that an (observed) memop size value belongs to has
* only a single value in the range. For example, 0 -> true, 8 -> true, 10 ->
* false, 64 -> true, 100 -> false, 513 -> false. */
INSTR_PROF_VISIBILITY INSTR_PROF_INLINE unsigned
InstrProfIsSingleValRange(uint64_t Value) {
if (Value <= 8)
// The first ranges are individually tracked.
return 1;
else if (InstProfPopcountll(Value) == 1)
// If it's a power of two, there's only one value.
return 1;
else
// Otherwise, there's more than one value in the range.
return 0;
}
#endif /* INSTR_PROF_VALUE_PROF_MEMOP_API */
PK hwFZ�/V�b$ b$ ProfileData/GCOV.hnu �[��� //===- GCOV.h - LLVM coverage tool ------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This header provides the interface to read and write coverage files that
// use 'gcov' format.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_PROFILEDATA_GCOV_H
#define LLVM_PROFILEDATA_GCOV_H
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/Support/DataExtractor.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include <cstddef>
#include <cstdint>
#include <map>
#include <memory>
#include <string>
#include <utility>
namespace llvm {
class GCOVFunction;
class GCOVBlock;
namespace GCOV {
enum GCOVVersion { V304, V407, V408, V800, V900, V1200 };
/// A struct for passing gcov options between functions.
struct Options {
Options(bool A, bool B, bool C, bool F, bool P, bool U, bool I, bool L,
bool M, bool N, bool R, bool T, bool X, std::string SourcePrefix)
: AllBlocks(A), BranchInfo(B), BranchCount(C), FuncCoverage(F),
PreservePaths(P), UncondBranch(U), Intermediate(I), LongFileNames(L),
Demangle(M), NoOutput(N), RelativeOnly(R), UseStdout(T),
HashFilenames(X), SourcePrefix(std::move(SourcePrefix)) {}
bool AllBlocks;
bool BranchInfo;
bool BranchCount;
bool FuncCoverage;
bool PreservePaths;
bool UncondBranch;
bool Intermediate;
bool LongFileNames;
bool Demangle;
bool NoOutput;
bool RelativeOnly;
bool UseStdout;
bool HashFilenames;
std::string SourcePrefix;
};
} // end namespace GCOV
/// GCOVBuffer - A wrapper around MemoryBuffer to provide GCOV specific
/// read operations.
class GCOVBuffer {
public:
GCOVBuffer(MemoryBuffer *B) : Buffer(B) {}
~GCOVBuffer() { consumeError(cursor.takeError()); }
/// readGCNOFormat - Check GCNO signature is valid at the beginning of buffer.
bool readGCNOFormat() {
StringRef buf = Buffer->getBuffer();
StringRef magic = buf.substr(0, 4);
if (magic == "gcno") {
de = DataExtractor(buf.substr(4), false, 0);
} else if (magic == "oncg") {
de = DataExtractor(buf.substr(4), true, 0);
} else {
errs() << "unexpected magic: " << magic << "\n";
return false;
}
return true;
}
/// readGCDAFormat - Check GCDA signature is valid at the beginning of buffer.
bool readGCDAFormat() {
StringRef buf = Buffer->getBuffer();
StringRef magic = buf.substr(0, 4);
if (magic == "gcda") {
de = DataExtractor(buf.substr(4), false, 0);
} else if (magic == "adcg") {
de = DataExtractor(buf.substr(4), true, 0);
} else {
return false;
}
return true;
}
/// readGCOVVersion - Read GCOV version.
bool readGCOVVersion(GCOV::GCOVVersion &version) {
std::string str(de.getBytes(cursor, 4));
if (str.size() != 4)
return false;
if (de.isLittleEndian())
std::reverse(str.begin(), str.end());
int ver = str[0] >= 'A'
? (str[0] - 'A') * 100 + (str[1] - '0') * 10 + str[2] - '0'
: (str[0] - '0') * 10 + str[2] - '0';
if (ver >= 120) {
this->version = version = GCOV::V1200;
return true;
} else if (ver >= 90) {
// PR gcov-profile/84846, r269678
this->version = version = GCOV::V900;
return true;
} else if (ver >= 80) {
// PR gcov-profile/48463
this->version = version = GCOV::V800;
return true;
} else if (ver >= 48) {
// r189778: the exit block moved from the last to the second.
this->version = version = GCOV::V408;
return true;
} else if (ver >= 47) {
// r173147: split checksum into cfg checksum and line checksum.
this->version = version = GCOV::V407;
return true;
} else if (ver >= 34) {
this->version = version = GCOV::V304;
return true;
}
errs() << "unexpected version: " << str << "\n";
return false;
}
uint32_t getWord() { return de.getU32(cursor); }
StringRef getString() {
uint32_t len;
if (!readInt(len) || len == 0)
return {};
return de.getBytes(cursor, len * 4).split('\0').first;
}
bool readInt(uint32_t &Val) {
if (cursor.tell() + 4 > de.size()) {
Val = 0;
errs() << "unexpected end of memory buffer: " << cursor.tell() << "\n";
return false;
}
Val = de.getU32(cursor);
return true;
}
bool readInt64(uint64_t &Val) {
uint32_t Lo, Hi;
if (!readInt(Lo) || !readInt(Hi))
return false;
Val = ((uint64_t)Hi << 32) | Lo;
return true;
}
bool readString(StringRef &str) {
uint32_t len;
if (!readInt(len) || len == 0)
return false;
if (version >= GCOV::V1200)
str = de.getBytes(cursor, len).drop_back();
else
str = de.getBytes(cursor, len * 4).split('\0').first;
return bool(cursor);
}
DataExtractor de{ArrayRef<uint8_t>{}, false, 0};
DataExtractor::Cursor cursor{0};
private:
MemoryBuffer *Buffer;
GCOV::GCOVVersion version{};
};
/// GCOVFile - Collects coverage information for one pair of coverage file
/// (.gcno and .gcda).
class GCOVFile {
public:
GCOVFile() = default;
bool readGCNO(GCOVBuffer &Buffer);
bool readGCDA(GCOVBuffer &Buffer);
GCOV::GCOVVersion getVersion() const { return version; }
void print(raw_ostream &OS) const;
void dump() const;
std::vector<std::string> filenames;
StringMap<unsigned> filenameToIdx;
public:
bool GCNOInitialized = false;
GCOV::GCOVVersion version{};
uint32_t checksum = 0;
StringRef cwd;
SmallVector<std::unique_ptr<GCOVFunction>, 16> functions;
std::map<uint32_t, GCOVFunction *> identToFunction;
uint32_t runCount = 0;
uint32_t programCount = 0;
using iterator = pointee_iterator<
SmallVectorImpl<std::unique_ptr<GCOVFunction>>::const_iterator>;
iterator begin() const { return iterator(functions.begin()); }
iterator end() const { return iterator(functions.end()); }
private:
unsigned addNormalizedPathToMap(StringRef filename);
};
struct GCOVArc {
GCOVArc(GCOVBlock &src, GCOVBlock &dst, uint32_t flags)
: src(src), dst(dst), flags(flags) {}
bool onTree() const;
GCOVBlock &src;
GCOVBlock &dst;
uint32_t flags;
uint64_t count = 0;
uint64_t cycleCount = 0;
};
/// GCOVFunction - Collects function information.
class GCOVFunction {
public:
using BlockIterator = pointee_iterator<
SmallVectorImpl<std::unique_ptr<GCOVBlock>>::const_iterator>;
GCOVFunction(GCOVFile &file) : file(file) {}
StringRef getName(bool demangle) const;
StringRef getFilename() const;
uint64_t getEntryCount() const;
GCOVBlock &getExitBlock() const;
iterator_range<BlockIterator> blocksRange() const {
return make_range(blocks.begin(), blocks.end());
}
uint64_t propagateCounts(const GCOVBlock &v, GCOVArc *pred);
void print(raw_ostream &OS) const;
void dump() const;
GCOVFile &file;
uint32_t ident = 0;
uint32_t linenoChecksum;
uint32_t cfgChecksum = 0;
uint32_t startLine = 0;
uint32_t startColumn = 0;
uint32_t endLine = 0;
uint32_t endColumn = 0;
uint8_t artificial = 0;
StringRef Name;
mutable SmallString<0> demangled;
unsigned srcIdx;
SmallVector<std::unique_ptr<GCOVBlock>, 0> blocks;
SmallVector<std::unique_ptr<GCOVArc>, 0> arcs, treeArcs;
DenseSet<const GCOVBlock *> visited;
};
/// GCOVBlock - Collects block information.
class GCOVBlock {
public:
using EdgeIterator = SmallVectorImpl<GCOVArc *>::const_iterator;
using BlockVector = SmallVector<const GCOVBlock *, 1>;
using BlockVectorLists = SmallVector<BlockVector, 4>;
using Edges = SmallVector<GCOVArc *, 4>;
GCOVBlock(uint32_t N) : number(N) {}
void addLine(uint32_t N) { lines.push_back(N); }
uint32_t getLastLine() const { return lines.back(); }
uint64_t getCount() const { return count; }
void addSrcEdge(GCOVArc *Edge) { pred.push_back(Edge); }
void addDstEdge(GCOVArc *Edge) { succ.push_back(Edge); }
iterator_range<EdgeIterator> srcs() const {
return make_range(pred.begin(), pred.end());
}
iterator_range<EdgeIterator> dsts() const {
return make_range(succ.begin(), succ.end());
}
void print(raw_ostream &OS) const;
void dump() const;
static uint64_t
augmentOneCycle(GCOVBlock *src,
std::vector<std::pair<GCOVBlock *, size_t>> &stack);
static uint64_t getCyclesCount(const BlockVector &blocks);
static uint64_t getLineCount(const BlockVector &Blocks);
public:
uint32_t number;
uint64_t count = 0;
SmallVector<GCOVArc *, 2> pred;
SmallVector<GCOVArc *, 2> succ;
SmallVector<uint32_t, 4> lines;
bool traversable = false;
GCOVArc *incoming = nullptr;
};
void gcovOneInput(const GCOV::Options &options, StringRef filename,
StringRef gcno, StringRef gcda, GCOVFile &file);
} // end namespace llvm
#endif // LLVM_PROFILEDATA_GCOV_H
PK hwFZ%�U�� � ProfileData/InstrProfWriter.hnu �[��� //===- InstrProfWriter.h - Instrumented profiling writer --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains support for writing profiling data for instrumentation
// based PGO and coverage.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_PROFILEDATA_INSTRPROFWRITER_H
#define LLVM_PROFILEDATA_INSTRPROFWRITER_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/MapVector.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/Object/BuildID.h"
#include "llvm/ProfileData/InstrProf.h"
#include "llvm/ProfileData/MemProf.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <memory>
#include <random>
namespace llvm {
/// Writer for instrumentation based profile data.
class InstrProfRecordWriterTrait;
class ProfOStream;
class MemoryBuffer;
class raw_fd_ostream;
class InstrProfWriter {
public:
using ProfilingData = SmallDenseMap<uint64_t, InstrProfRecord>;
private:
bool Sparse;
StringMap<ProfilingData> FunctionData;
/// The maximum length of a single temporal profile trace.
uint64_t MaxTemporalProfTraceLength;
/// The maximum number of stored temporal profile traces.
uint64_t TemporalProfTraceReservoirSize;
/// The total number of temporal profile traces seen.
uint64_t TemporalProfTraceStreamSize = 0;
/// The list of temporal profile traces.
SmallVector<TemporalProfTraceTy> TemporalProfTraces;
std::mt19937 RNG;
// A map to hold memprof data per function. The lower 64 bits obtained from
// the md5 hash of the function name is used to index into the map.
llvm::MapVector<GlobalValue::GUID, memprof::IndexedMemProfRecord>
MemProfRecordData;
// A map to hold frame id to frame mappings. The mappings are used to
// convert IndexedMemProfRecord to MemProfRecords with frame information
// inline.
llvm::MapVector<memprof::FrameId, memprof::Frame> MemProfFrameData;
// List of binary ids.
std::vector<llvm::object::BuildID> BinaryIds;
// An enum describing the attributes of the profile.
InstrProfKind ProfileKind = InstrProfKind::Unknown;
// Use raw pointer here for the incomplete type object.
InstrProfRecordWriterTrait *InfoObj;
public:
InstrProfWriter(bool Sparse = false,
uint64_t TemporalProfTraceReservoirSize = 0,
uint64_t MaxTemporalProfTraceLength = 0);
~InstrProfWriter();
StringMap<ProfilingData> &getProfileData() { return FunctionData; }
/// Add function counts for the given function. If there are already counts
/// for this function and the hash and number of counts match, each counter is
/// summed. Optionally scale counts by \p Weight.
void addRecord(NamedInstrProfRecord &&I, uint64_t Weight,
function_ref<void(Error)> Warn);
void addRecord(NamedInstrProfRecord &&I, function_ref<void(Error)> Warn) {
addRecord(std::move(I), 1, Warn);
}
/// Add \p SrcTraces using reservoir sampling where \p SrcStreamSize is the
/// total number of temporal profiling traces the source has seen.
void addTemporalProfileTraces(SmallVectorImpl<TemporalProfTraceTy> &SrcTraces,
uint64_t SrcStreamSize);
/// Add a memprof record for a function identified by its \p Id.
void addMemProfRecord(const GlobalValue::GUID Id,
const memprof::IndexedMemProfRecord &Record);
/// Add a memprof frame identified by the hash of the contents of the frame in
/// \p FrameId.
bool addMemProfFrame(const memprof::FrameId, const memprof::Frame &F,
function_ref<void(Error)> Warn);
// Add a binary id to the binary ids list.
void addBinaryIds(ArrayRef<llvm::object::BuildID> BIs);
/// Merge existing function counts from the given writer.
void mergeRecordsFromWriter(InstrProfWriter &&IPW,
function_ref<void(Error)> Warn);
/// Write the profile to \c OS
Error write(raw_fd_ostream &OS);
/// Write the profile to a string output stream \c OS
Error write(raw_string_ostream &OS);
/// Write the profile in text format to \c OS
Error writeText(raw_fd_ostream &OS);
/// Write temporal profile trace data to the header in text format to \c OS
void writeTextTemporalProfTraceData(raw_fd_ostream &OS,
InstrProfSymtab &Symtab);
Error validateRecord(const InstrProfRecord &Func);
/// Write \c Record in text format to \c OS
static void writeRecordInText(StringRef Name, uint64_t Hash,
const InstrProfRecord &Counters,
InstrProfSymtab &Symtab, raw_fd_ostream &OS);
/// Write the profile, returning the raw data. For testing.
std::unique_ptr<MemoryBuffer> writeBuffer();
/// Update the attributes of the current profile from the attributes
/// specified. An error is returned if IR and FE profiles are mixed.
Error mergeProfileKind(const InstrProfKind Other) {
// If the kind is unset, this is the first profile we are merging so just
// set it to the given type.
if (ProfileKind == InstrProfKind::Unknown) {
ProfileKind = Other;
return Error::success();
}
// Returns true if merging is should fail assuming A and B are incompatible.
auto testIncompatible = [&](InstrProfKind A, InstrProfKind B) {
return (static_cast<bool>(ProfileKind & A) &&
static_cast<bool>(Other & B)) ||
(static_cast<bool>(ProfileKind & B) &&
static_cast<bool>(Other & A));
};
// Check if the profiles are in-compatible. Clang frontend profiles can't be
// merged with other profile types.
if (static_cast<bool>(
(ProfileKind & InstrProfKind::FrontendInstrumentation) ^
(Other & InstrProfKind::FrontendInstrumentation))) {
return make_error<InstrProfError>(instrprof_error::unsupported_version);
}
if (testIncompatible(InstrProfKind::FunctionEntryOnly,
InstrProfKind::FunctionEntryInstrumentation)) {
return make_error<InstrProfError>(
instrprof_error::unsupported_version,
"cannot merge FunctionEntryOnly profiles and BB profiles together");
}
// Now we update the profile type with the bits that are set.
ProfileKind |= Other;
return Error::success();
}
InstrProfKind getProfileKind() const { return ProfileKind; }
// Internal interface for testing purpose only.
void setValueProfDataEndianness(support::endianness Endianness);
void setOutputSparse(bool Sparse);
// Compute the overlap b/w this object and Other. Program level result is
// stored in Overlap and function level result is stored in FuncLevelOverlap.
void overlapRecord(NamedInstrProfRecord &&Other, OverlapStats &Overlap,
OverlapStats &FuncLevelOverlap,
const OverlapFuncFilters &FuncFilter);
private:
void addRecord(StringRef Name, uint64_t Hash, InstrProfRecord &&I,
uint64_t Weight, function_ref<void(Error)> Warn);
bool shouldEncodeData(const ProfilingData &PD);
/// Add \p Trace using reservoir sampling.
void addTemporalProfileTrace(TemporalProfTraceTy Trace);
Error writeImpl(ProfOStream &OS);
};
} // end namespace llvm
#endif // LLVM_PROFILEDATA_INSTRPROFWRITER_H
PK hwFZ�(�u�R �R ProfileData/MemProf.hnu �[��� #ifndef LLVM_PROFILEDATA_MEMPROF_H_
#define LLVM_PROFILEDATA_MEMPROF_H_
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/STLFunctionalExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/ProfileData/MemProfData.inc"
#include "llvm/Support/Endian.h"
#include "llvm/Support/EndianStream.h"
#include "llvm/Support/raw_ostream.h"
#include <cstdint>
#include <optional>
namespace llvm {
namespace memprof {
enum class Meta : uint64_t {
Start = 0,
#define MIBEntryDef(NameTag, Name, Type) NameTag,
#include "llvm/ProfileData/MIBEntryDef.inc"
#undef MIBEntryDef
Size
};
using MemProfSchema = llvm::SmallVector<Meta, static_cast<int>(Meta::Size)>;
// Holds the actual MemInfoBlock data with all fields. Contents may be read or
// written partially by providing an appropriate schema to the serialize and
// deserialize methods.
struct PortableMemInfoBlock {
PortableMemInfoBlock() = default;
explicit PortableMemInfoBlock(const MemInfoBlock &Block) {
#define MIBEntryDef(NameTag, Name, Type) Name = Block.Name;
#include "llvm/ProfileData/MIBEntryDef.inc"
#undef MIBEntryDef
}
PortableMemInfoBlock(const MemProfSchema &Schema, const unsigned char *Ptr) {
deserialize(Schema, Ptr);
}
// Read the contents of \p Ptr based on the \p Schema to populate the
// MemInfoBlock member.
void deserialize(const MemProfSchema &Schema, const unsigned char *Ptr) {
using namespace support;
for (const Meta Id : Schema) {
switch (Id) {
#define MIBEntryDef(NameTag, Name, Type) \
case Meta::Name: { \
Name = endian::readNext<Type, little, unaligned>(Ptr); \
} break;
#include "llvm/ProfileData/MIBEntryDef.inc"
#undef MIBEntryDef
default:
llvm_unreachable("Unknown meta type id, is the profile collected from "
"a newer version of the runtime?");
}
}
}
// Write the contents of the MemInfoBlock based on the \p Schema provided to
// the raw_ostream \p OS.
void serialize(const MemProfSchema &Schema, raw_ostream &OS) const {
using namespace support;
endian::Writer LE(OS, little);
for (const Meta Id : Schema) {
switch (Id) {
#define MIBEntryDef(NameTag, Name, Type) \
case Meta::Name: { \
LE.write<Type>(Name); \
} break;
#include "llvm/ProfileData/MIBEntryDef.inc"
#undef MIBEntryDef
default:
llvm_unreachable("Unknown meta type id, invalid input?");
}
}
}
// Print out the contents of the MemInfoBlock in YAML format.
void printYAML(raw_ostream &OS) const {
OS << " MemInfoBlock:\n";
#define MIBEntryDef(NameTag, Name, Type) \
OS << " " << #Name << ": " << Name << "\n";
#include "llvm/ProfileData/MIBEntryDef.inc"
#undef MIBEntryDef
}
// Define getters for each type which can be called by analyses.
#define MIBEntryDef(NameTag, Name, Type) \
Type get##Name() const { return Name; }
#include "llvm/ProfileData/MIBEntryDef.inc"
#undef MIBEntryDef
void clear() { *this = PortableMemInfoBlock(); }
// Returns the full schema currently in use.
static MemProfSchema getSchema() {
MemProfSchema List;
#define MIBEntryDef(NameTag, Name, Type) List.push_back(Meta::Name);
#include "llvm/ProfileData/MIBEntryDef.inc"
#undef MIBEntryDef
return List;
}
bool operator==(const PortableMemInfoBlock &Other) const {
#define MIBEntryDef(NameTag, Name, Type) \
if (Other.get##Name() != get##Name()) \
return false;
#include "llvm/ProfileData/MIBEntryDef.inc"
#undef MIBEntryDef
return true;
}
bool operator!=(const PortableMemInfoBlock &Other) const {
return !operator==(Other);
}
static constexpr size_t serializedSize() {
size_t Result = 0;
#define MIBEntryDef(NameTag, Name, Type) Result += sizeof(Type);
#include "llvm/ProfileData/MIBEntryDef.inc"
#undef MIBEntryDef
return Result;
}
private:
#define MIBEntryDef(NameTag, Name, Type) Type Name = Type();
#include "llvm/ProfileData/MIBEntryDef.inc"
#undef MIBEntryDef
};
// A type representing the id generated by hashing the contents of the Frame.
using FrameId = uint64_t;
// Describes a call frame for a dynamic allocation context. The contents of
// the frame are populated by symbolizing the stack depot call frame from the
// compiler runtime.
struct Frame {
// A uuid (uint64_t) identifying the function. It is obtained by
// llvm::md5(FunctionName) which returns the lower 64 bits.
GlobalValue::GUID Function;
// The symbol name for the function. Only populated in the Frame by the reader
// if requested during initialization. This field should not be serialized.
std::optional<std::string> SymbolName;
// The source line offset of the call from the beginning of parent function.
uint32_t LineOffset;
// The source column number of the call to help distinguish multiple calls
// on the same line.
uint32_t Column;
// Whether the current frame is inlined.
bool IsInlineFrame;
Frame(const Frame &Other) {
Function = Other.Function;
SymbolName = Other.SymbolName;
LineOffset = Other.LineOffset;
Column = Other.Column;
IsInlineFrame = Other.IsInlineFrame;
}
Frame(uint64_t Hash, uint32_t Off, uint32_t Col, bool Inline)
: Function(Hash), LineOffset(Off), Column(Col), IsInlineFrame(Inline) {}
bool operator==(const Frame &Other) const {
// Ignore the SymbolName field to avoid a string compare. Comparing the
// function hash serves the same purpose.
return Other.Function == Function && Other.LineOffset == LineOffset &&
Other.Column == Column && Other.IsInlineFrame == IsInlineFrame;
}
Frame &operator=(const Frame &Other) {
Function = Other.Function;
SymbolName = Other.SymbolName;
LineOffset = Other.LineOffset;
Column = Other.Column;
IsInlineFrame = Other.IsInlineFrame;
return *this;
}
bool operator!=(const Frame &Other) const { return !operator==(Other); }
// Write the contents of the frame to the ostream \p OS.
void serialize(raw_ostream &OS) const {
using namespace support;
endian::Writer LE(OS, little);
// If the type of the GlobalValue::GUID changes, then we need to update
// the reader and the writer.
static_assert(std::is_same<GlobalValue::GUID, uint64_t>::value,
"Expect GUID to be uint64_t.");
LE.write<uint64_t>(Function);
LE.write<uint32_t>(LineOffset);
LE.write<uint32_t>(Column);
LE.write<bool>(IsInlineFrame);
}
// Read a frame from char data which has been serialized as little endian.
static Frame deserialize(const unsigned char *Ptr) {
using namespace support;
const uint64_t F = endian::readNext<uint64_t, little, unaligned>(Ptr);
const uint32_t L = endian::readNext<uint32_t, little, unaligned>(Ptr);
const uint32_t C = endian::readNext<uint32_t, little, unaligned>(Ptr);
const bool I = endian::readNext<bool, little, unaligned>(Ptr);
return Frame(/*Function=*/F, /*LineOffset=*/L, /*Column=*/C,
/*IsInlineFrame=*/I);
}
// Returns the size of the frame information.
static constexpr size_t serializedSize() {
return sizeof(Frame::Function) + sizeof(Frame::LineOffset) +
sizeof(Frame::Column) + sizeof(Frame::IsInlineFrame);
}
// Print the frame information in YAML format.
void printYAML(raw_ostream &OS) const {
OS << " -\n"
<< " Function: " << Function << "\n"
<< " SymbolName: " << SymbolName.value_or("<None>") << "\n"
<< " LineOffset: " << LineOffset << "\n"
<< " Column: " << Column << "\n"
<< " Inline: " << IsInlineFrame << "\n";
}
// Return a hash value based on the contents of the frame. Here we don't use
// hashing from llvm ADT since we are going to persist the hash id, the hash
// combine algorithm in ADT uses a new randomized seed each time.
inline FrameId hash() const {
auto HashCombine = [](auto Value, size_t Seed) {
std::hash<decltype(Value)> Hasher;
// The constant used below is the 64 bit representation of the fractional
// part of the golden ratio. Used here for the randomness in their bit
// pattern.
return Hasher(Value) + 0x9e3779b97f4a7c15 + (Seed << 6) + (Seed >> 2);
};
size_t Result = 0;
Result ^= HashCombine(Function, Result);
Result ^= HashCombine(LineOffset, Result);
Result ^= HashCombine(Column, Result);
Result ^= HashCombine(IsInlineFrame, Result);
return static_cast<FrameId>(Result);
}
};
// Holds allocation information in a space efficient format where frames are
// represented using unique identifiers.
struct IndexedAllocationInfo {
// The dynamic calling context for the allocation in bottom-up (leaf-to-root)
// order. Frame contents are stored out-of-line.
llvm::SmallVector<FrameId> CallStack;
// The statistics obtained from the runtime for the allocation.
PortableMemInfoBlock Info;
IndexedAllocationInfo() = default;
IndexedAllocationInfo(ArrayRef<FrameId> CS, const MemInfoBlock &MB)
: CallStack(CS.begin(), CS.end()), Info(MB) {}
// Returns the size in bytes when this allocation info struct is serialized.
size_t serializedSize() const {
return sizeof(uint64_t) + // The number of frames to serialize.
sizeof(FrameId) * CallStack.size() + // The callstack frame ids.
PortableMemInfoBlock::serializedSize(); // The size of the payload.
}
bool operator==(const IndexedAllocationInfo &Other) const {
if (Other.Info != Info)
return false;
if (Other.CallStack.size() != CallStack.size())
return false;
for (size_t J = 0; J < Other.CallStack.size(); J++) {
if (Other.CallStack[J] != CallStack[J])
return false;
}
return true;
}
bool operator!=(const IndexedAllocationInfo &Other) const {
return !operator==(Other);
}
};
// Holds allocation information with frame contents inline. The type should
// be used for temporary in-memory instances.
struct AllocationInfo {
// Same as IndexedAllocationInfo::CallStack with the frame contents inline.
llvm::SmallVector<Frame> CallStack;
// Same as IndexedAllocationInfo::Info;
PortableMemInfoBlock Info;
AllocationInfo() = default;
AllocationInfo(
const IndexedAllocationInfo &IndexedAI,
llvm::function_ref<const Frame(const FrameId)> IdToFrameCallback) {
for (const FrameId &Id : IndexedAI.CallStack) {
CallStack.push_back(IdToFrameCallback(Id));
}
Info = IndexedAI.Info;
}
void printYAML(raw_ostream &OS) const {
OS << " -\n";
OS << " Callstack:\n";
// TODO: Print out the frame on one line with to make it easier for deep
// callstacks once we have a test to check valid YAML is generated.
for (const Frame &F : CallStack) {
F.printYAML(OS);
}
Info.printYAML(OS);
}
};
// Holds the memprof profile information for a function. The internal
// representation stores frame ids for efficiency. This representation should
// be used in the profile conversion and manipulation tools.
struct IndexedMemProfRecord {
// Memory allocation sites in this function for which we have memory
// profiling data.
llvm::SmallVector<IndexedAllocationInfo> AllocSites;
// Holds call sites in this function which are part of some memory
// allocation context. We store this as a list of locations, each with its
// list of inline locations in bottom-up order i.e. from leaf to root. The
// inline location list may include additional entries, users should pick
// the last entry in the list with the same function GUID.
llvm::SmallVector<llvm::SmallVector<FrameId>> CallSites;
void clear() {
AllocSites.clear();
CallSites.clear();
}
void merge(const IndexedMemProfRecord &Other) {
// TODO: Filter out duplicates which may occur if multiple memprof
// profiles are merged together using llvm-profdata.
AllocSites.append(Other.AllocSites);
CallSites.append(Other.CallSites);
}
size_t serializedSize() const {
size_t Result = sizeof(GlobalValue::GUID);
for (const IndexedAllocationInfo &N : AllocSites)
Result += N.serializedSize();
// The number of callsites we have information for.
Result += sizeof(uint64_t);
for (const auto &Frames : CallSites) {
// The number of frame ids to serialize.
Result += sizeof(uint64_t);
Result += Frames.size() * sizeof(FrameId);
}
return Result;
}
bool operator==(const IndexedMemProfRecord &Other) const {
if (Other.AllocSites.size() != AllocSites.size())
return false;
if (Other.CallSites.size() != CallSites.size())
return false;
for (size_t I = 0; I < AllocSites.size(); I++) {
if (AllocSites[I] != Other.AllocSites[I])
return false;
}
for (size_t I = 0; I < CallSites.size(); I++) {
if (CallSites[I] != Other.CallSites[I])
return false;
}
return true;
}
// Serializes the memprof records in \p Records to the ostream \p OS based
// on the schema provided in \p Schema.
void serialize(const MemProfSchema &Schema, raw_ostream &OS);
// Deserializes memprof records from the Buffer.
static IndexedMemProfRecord deserialize(const MemProfSchema &Schema,
const unsigned char *Buffer);
// Returns the GUID for the function name after canonicalization. For
// memprof, we remove any .llvm suffix added by LTO. MemProfRecords are
// mapped to functions using this GUID.
static GlobalValue::GUID getGUID(const StringRef FunctionName);
};
// Holds the memprof profile information for a function. The internal
// representation stores frame contents inline. This representation should
// be used for small amount of temporary, in memory instances.
struct MemProfRecord {
// Same as IndexedMemProfRecord::AllocSites with frame contents inline.
llvm::SmallVector<AllocationInfo> AllocSites;
// Same as IndexedMemProfRecord::CallSites with frame contents inline.
llvm::SmallVector<llvm::SmallVector<Frame>> CallSites;
MemProfRecord() = default;
MemProfRecord(
const IndexedMemProfRecord &Record,
llvm::function_ref<const Frame(const FrameId Id)> IdToFrameCallback) {
for (const IndexedAllocationInfo &IndexedAI : Record.AllocSites) {
AllocSites.emplace_back(IndexedAI, IdToFrameCallback);
}
for (const ArrayRef<FrameId> Site : Record.CallSites) {
llvm::SmallVector<Frame> Frames;
for (const FrameId Id : Site) {
Frames.push_back(IdToFrameCallback(Id));
}
CallSites.push_back(Frames);
}
}
// Prints out the contents of the memprof record in YAML.
void print(llvm::raw_ostream &OS) const {
if (!AllocSites.empty()) {
OS << " AllocSites:\n";
for (const AllocationInfo &N : AllocSites)
N.printYAML(OS);
}
if (!CallSites.empty()) {
OS << " CallSites:\n";
for (const llvm::SmallVector<Frame> &Frames : CallSites) {
for (const Frame &F : Frames) {
OS << " -\n";
F.printYAML(OS);
}
}
}
}
};
// Reads a memprof schema from a buffer. All entries in the buffer are
// interpreted as uint64_t. The first entry in the buffer denotes the number of
// ids in the schema. Subsequent entries are integers which map to memprof::Meta
// enum class entries. After successfully reading the schema, the pointer is one
// byte past the schema contents.
Expected<MemProfSchema> readMemProfSchema(const unsigned char *&Buffer);
// Trait for reading IndexedMemProfRecord data from the on-disk hash table.
class RecordLookupTrait {
public:
using data_type = const IndexedMemProfRecord &;
using internal_key_type = uint64_t;
using external_key_type = uint64_t;
using hash_value_type = uint64_t;
using offset_type = uint64_t;
RecordLookupTrait() = delete;
RecordLookupTrait(const MemProfSchema &S) : Schema(S) {}
static bool EqualKey(uint64_t A, uint64_t B) { return A == B; }
static uint64_t GetInternalKey(uint64_t K) { return K; }
static uint64_t GetExternalKey(uint64_t K) { return K; }
hash_value_type ComputeHash(uint64_t K) { return K; }
static std::pair<offset_type, offset_type>
ReadKeyDataLength(const unsigned char *&D) {
using namespace support;
offset_type KeyLen = endian::readNext<offset_type, little, unaligned>(D);
offset_type DataLen = endian::readNext<offset_type, little, unaligned>(D);
return std::make_pair(KeyLen, DataLen);
}
uint64_t ReadKey(const unsigned char *D, offset_type /*Unused*/) {
using namespace support;
return endian::readNext<external_key_type, little, unaligned>(D);
}
data_type ReadData(uint64_t K, const unsigned char *D,
offset_type /*Unused*/) {
Record = IndexedMemProfRecord::deserialize(Schema, D);
return Record;
}
private:
// Holds the memprof schema used to deserialize records.
MemProfSchema Schema;
// Holds the records from one function deserialized from the indexed format.
IndexedMemProfRecord Record;
};
// Trait for writing IndexedMemProfRecord data to the on-disk hash table.
class RecordWriterTrait {
public:
using key_type = uint64_t;
using key_type_ref = uint64_t;
using data_type = IndexedMemProfRecord;
using data_type_ref = IndexedMemProfRecord &;
using hash_value_type = uint64_t;
using offset_type = uint64_t;
// Pointer to the memprof schema to use for the generator. Unlike the reader
// we must use a default constructor with no params for the writer trait so we
// have a public member which must be initialized by the user.
MemProfSchema *Schema = nullptr;
RecordWriterTrait() = default;
static hash_value_type ComputeHash(key_type_ref K) { return K; }
static std::pair<offset_type, offset_type>
EmitKeyDataLength(raw_ostream &Out, key_type_ref K, data_type_ref V) {
using namespace support;
endian::Writer LE(Out, little);
offset_type N = sizeof(K);
LE.write<offset_type>(N);
offset_type M = V.serializedSize();
LE.write<offset_type>(M);
return std::make_pair(N, M);
}
void EmitKey(raw_ostream &Out, key_type_ref K, offset_type /*Unused*/) {
using namespace support;
endian::Writer LE(Out, little);
LE.write<uint64_t>(K);
}
void EmitData(raw_ostream &Out, key_type_ref /*Unused*/, data_type_ref V,
offset_type /*Unused*/) {
assert(Schema != nullptr && "MemProf schema is not initialized!");
V.serialize(*Schema, Out);
}
};
// Trait for writing frame mappings to the on-disk hash table.
class FrameWriterTrait {
public:
using key_type = FrameId;
using key_type_ref = FrameId;
using data_type = Frame;
using data_type_ref = Frame &;
using hash_value_type = FrameId;
using offset_type = uint64_t;
static hash_value_type ComputeHash(key_type_ref K) { return K; }
static std::pair<offset_type, offset_type>
EmitKeyDataLength(raw_ostream &Out, key_type_ref K, data_type_ref V) {
using namespace support;
endian::Writer LE(Out, little);
offset_type N = sizeof(K);
LE.write<offset_type>(N);
offset_type M = V.serializedSize();
LE.write<offset_type>(M);
return std::make_pair(N, M);
}
void EmitKey(raw_ostream &Out, key_type_ref K, offset_type /*Unused*/) {
using namespace support;
endian::Writer LE(Out, little);
LE.write<key_type>(K);
}
void EmitData(raw_ostream &Out, key_type_ref /*Unused*/, data_type_ref V,
offset_type /*Unused*/) {
V.serialize(Out);
}
};
// Trait for reading frame mappings from the on-disk hash table.
class FrameLookupTrait {
public:
using data_type = const Frame;
using internal_key_type = FrameId;
using external_key_type = FrameId;
using hash_value_type = FrameId;
using offset_type = uint64_t;
static bool EqualKey(internal_key_type A, internal_key_type B) {
return A == B;
}
static uint64_t GetInternalKey(internal_key_type K) { return K; }
static uint64_t GetExternalKey(external_key_type K) { return K; }
hash_value_type ComputeHash(internal_key_type K) { return K; }
static std::pair<offset_type, offset_type>
ReadKeyDataLength(const unsigned char *&D) {
using namespace support;
offset_type KeyLen = endian::readNext<offset_type, little, unaligned>(D);
offset_type DataLen = endian::readNext<offset_type, little, unaligned>(D);
return std::make_pair(KeyLen, DataLen);
}
uint64_t ReadKey(const unsigned char *D, offset_type /*Unused*/) {
using namespace support;
return endian::readNext<external_key_type, little, unaligned>(D);
}
data_type ReadData(uint64_t K, const unsigned char *D,
offset_type /*Unused*/) {
return Frame::deserialize(D);
}
};
} // namespace memprof
} // namespace llvm
#endif // LLVM_PROFILEDATA_MEMPROF_H_
PK hwFZ^F�c! c! , ProfileData/Coverage/CoverageMappingReader.hnu �[��� //===- CoverageMappingReader.h - Code coverage mapping reader ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains support for reading coverage mapping data for
// instrumentation based coverage.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_PROFILEDATA_COVERAGE_COVERAGEMAPPINGREADER_H
#define LLVM_PROFILEDATA_COVERAGE_COVERAGEMAPPINGREADER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ProfileData/Coverage/CoverageMapping.h"
#include "llvm/ProfileData/InstrProf.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MemoryBuffer.h"
#include <cstddef>
#include <cstdint>
#include <iterator>
#include <memory>
#include <vector>
namespace llvm {
namespace coverage {
class CoverageMappingReader;
/// Coverage mapping information for a single function.
struct CoverageMappingRecord {
StringRef FunctionName;
uint64_t FunctionHash;
ArrayRef<StringRef> Filenames;
ArrayRef<CounterExpression> Expressions;
ArrayRef<CounterMappingRegion> MappingRegions;
};
/// A file format agnostic iterator over coverage mapping data.
class CoverageMappingIterator {
CoverageMappingReader *Reader;
CoverageMappingRecord Record;
coveragemap_error ReadErr;
void increment();
public:
using iterator_category = std::input_iterator_tag;
using value_type = CoverageMappingRecord;
using difference_type = std::ptrdiff_t;
using pointer = value_type *;
using reference = value_type &;
CoverageMappingIterator()
: Reader(nullptr), ReadErr(coveragemap_error::success) {}
CoverageMappingIterator(CoverageMappingReader *Reader)
: Reader(Reader), ReadErr(coveragemap_error::success) {
increment();
}
~CoverageMappingIterator() {
if (ReadErr != coveragemap_error::success)
llvm_unreachable("Unexpected error in coverage mapping iterator");
}
CoverageMappingIterator &operator++() {
increment();
return *this;
}
bool operator==(const CoverageMappingIterator &RHS) const {
return Reader == RHS.Reader;
}
bool operator!=(const CoverageMappingIterator &RHS) const {
return Reader != RHS.Reader;
}
Expected<CoverageMappingRecord &> operator*() {
if (ReadErr != coveragemap_error::success) {
auto E = make_error<CoverageMapError>(ReadErr);
ReadErr = coveragemap_error::success;
return std::move(E);
}
return Record;
}
Expected<CoverageMappingRecord *> operator->() {
if (ReadErr != coveragemap_error::success) {
auto E = make_error<CoverageMapError>(ReadErr);
ReadErr = coveragemap_error::success;
return std::move(E);
}
return &Record;
}
};
class CoverageMappingReader {
public:
virtual ~CoverageMappingReader() = default;
virtual Error readNextRecord(CoverageMappingRecord &Record) = 0;
CoverageMappingIterator begin() { return CoverageMappingIterator(this); }
CoverageMappingIterator end() { return CoverageMappingIterator(); }
};
/// Base class for the raw coverage mapping and filenames data readers.
class RawCoverageReader {
protected:
StringRef Data;
RawCoverageReader(StringRef Data) : Data(Data) {}
Error readULEB128(uint64_t &Result);
Error readIntMax(uint64_t &Result, uint64_t MaxPlus1);
Error readSize(uint64_t &Result);
Error readString(StringRef &Result);
};
/// Checks if the given coverage mapping data is exported for
/// an unused function.
class RawCoverageMappingDummyChecker : public RawCoverageReader {
public:
RawCoverageMappingDummyChecker(StringRef MappingData)
: RawCoverageReader(MappingData) {}
Expected<bool> isDummy();
};
/// Reader for the raw coverage mapping data.
class RawCoverageMappingReader : public RawCoverageReader {
ArrayRef<std::string> &TranslationUnitFilenames;
std::vector<StringRef> &Filenames;
std::vector<CounterExpression> &Expressions;
std::vector<CounterMappingRegion> &MappingRegions;
public:
RawCoverageMappingReader(StringRef MappingData,
ArrayRef<std::string> &TranslationUnitFilenames,
std::vector<StringRef> &Filenames,
std::vector<CounterExpression> &Expressions,
std::vector<CounterMappingRegion> &MappingRegions)
: RawCoverageReader(MappingData),
TranslationUnitFilenames(TranslationUnitFilenames),
Filenames(Filenames), Expressions(Expressions),
MappingRegions(MappingRegions) {}
RawCoverageMappingReader(const RawCoverageMappingReader &) = delete;
RawCoverageMappingReader &
operator=(const RawCoverageMappingReader &) = delete;
Error read();
private:
Error decodeCounter(unsigned Value, Counter &C);
Error readCounter(Counter &C);
Error
readMappingRegionsSubArray(std::vector<CounterMappingRegion> &MappingRegions,
unsigned InferredFileID, size_t NumFileIDs);
};
/// Reader for the coverage mapping data that is emitted by the
/// frontend and stored in an object file.
class BinaryCoverageReader : public CoverageMappingReader {
public:
struct ProfileMappingRecord {
CovMapVersion Version;
StringRef FunctionName;
uint64_t FunctionHash;
StringRef CoverageMapping;
size_t FilenamesBegin;
size_t FilenamesSize;
ProfileMappingRecord(CovMapVersion Version, StringRef FunctionName,
uint64_t FunctionHash, StringRef CoverageMapping,
size_t FilenamesBegin, size_t FilenamesSize)
: Version(Version), FunctionName(FunctionName),
FunctionHash(FunctionHash), CoverageMapping(CoverageMapping),
FilenamesBegin(FilenamesBegin), FilenamesSize(FilenamesSize) {}
};
using FuncRecordsStorage = std::unique_ptr<MemoryBuffer>;
private:
std::vector<std::string> Filenames;
std::vector<ProfileMappingRecord> MappingRecords;
InstrProfSymtab ProfileNames;
size_t CurrentRecord = 0;
std::vector<StringRef> FunctionsFilenames;
std::vector<CounterExpression> Expressions;
std::vector<CounterMappingRegion> MappingRegions;
// Used to tie the lifetimes of coverage function records to the lifetime of
// this BinaryCoverageReader instance. Needed to support the format change in
// D69471, which can split up function records into multiple sections on ELF.
FuncRecordsStorage FuncRecords;
BinaryCoverageReader(FuncRecordsStorage &&FuncRecords)
: FuncRecords(std::move(FuncRecords)) {}
public:
BinaryCoverageReader(const BinaryCoverageReader &) = delete;
BinaryCoverageReader &operator=(const BinaryCoverageReader &) = delete;
static Expected<std::vector<std::unique_ptr<BinaryCoverageReader>>>
create(MemoryBufferRef ObjectBuffer, StringRef Arch,
SmallVectorImpl<std::unique_ptr<MemoryBuffer>> &ObjectFileBuffers,
StringRef CompilationDir = "",
SmallVectorImpl<object::BuildIDRef> *BinaryIDs = nullptr);
static Expected<std::unique_ptr<BinaryCoverageReader>>
createCoverageReaderFromBuffer(StringRef Coverage,
FuncRecordsStorage &&FuncRecords,
InstrProfSymtab &&ProfileNames,
uint8_t BytesInAddress,
support::endianness Endian,
StringRef CompilationDir = "");
Error readNextRecord(CoverageMappingRecord &Record) override;
};
/// Reader for the raw coverage filenames.
class RawCoverageFilenamesReader : public RawCoverageReader {
std::vector<std::string> &Filenames;
StringRef CompilationDir;
// Read an uncompressed sequence of filenames.
Error readUncompressed(CovMapVersion Version, uint64_t NumFilenames);
public:
RawCoverageFilenamesReader(StringRef Data,
std::vector<std::string> &Filenames,
StringRef CompilationDir = "")
: RawCoverageReader(Data), Filenames(Filenames),
CompilationDir(CompilationDir) {}
RawCoverageFilenamesReader(const RawCoverageFilenamesReader &) = delete;
RawCoverageFilenamesReader &
operator=(const RawCoverageFilenamesReader &) = delete;
Error read(CovMapVersion Version);
};
} // end namespace coverage
} // end namespace llvm
#endif // LLVM_PROFILEDATA_COVERAGE_COVERAGEMAPPINGREADER_H
PK hwFZ�d��Ҙ Ҙ & ProfileData/Coverage/CoverageMapping.hnu �[��� //===- CoverageMapping.h - Code coverage mapping support --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Code coverage mapping data is generated by clang and read by
// llvm-cov to show code coverage statistics for a file.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_PROFILEDATA_COVERAGE_COVERAGEMAPPING_H
#define LLVM_PROFILEDATA_COVERAGE_COVERAGEMAPPING_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/Hashing.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/Object/BuildID.h"
#include "llvm/ProfileData/InstrProf.h"
#include "llvm/Support/Alignment.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <cstdint>
#include <iterator>
#include <memory>
#include <string>
#include <system_error>
#include <tuple>
#include <utility>
#include <vector>
namespace llvm {
class IndexedInstrProfReader;
namespace object {
class BuildIDFetcher;
} // namespace object
namespace vfs {
class FileSystem;
} // namespace vfs
namespace coverage {
class CoverageMappingReader;
struct CoverageMappingRecord;
enum class coveragemap_error {
success = 0,
eof,
no_data_found,
unsupported_version,
truncated,
malformed,
decompression_failed,
invalid_or_missing_arch_specifier
};
const std::error_category &coveragemap_category();
inline std::error_code make_error_code(coveragemap_error E) {
return std::error_code(static_cast<int>(E), coveragemap_category());
}
class CoverageMapError : public ErrorInfo<CoverageMapError> {
public:
CoverageMapError(coveragemap_error Err) : Err(Err) {
assert(Err != coveragemap_error::success && "Not an error");
}
std::string message() const override;
void log(raw_ostream &OS) const override { OS << message(); }
std::error_code convertToErrorCode() const override {
return make_error_code(Err);
}
coveragemap_error get() const { return Err; }
static char ID;
private:
coveragemap_error Err;
};
/// A Counter is an abstract value that describes how to compute the
/// execution count for a region of code using the collected profile count data.
struct Counter {
/// The CounterExpression kind (Add or Subtract) is encoded in bit 0 next to
/// the CounterKind. This means CounterKind has to leave bit 0 free.
enum CounterKind { Zero, CounterValueReference, Expression };
static const unsigned EncodingTagBits = 2;
static const unsigned EncodingTagMask = 0x3;
static const unsigned EncodingCounterTagAndExpansionRegionTagBits =
EncodingTagBits + 1;
private:
CounterKind Kind = Zero;
unsigned ID = 0;
Counter(CounterKind Kind, unsigned ID) : Kind(Kind), ID(ID) {}
public:
Counter() = default;
CounterKind getKind() const { return Kind; }
bool isZero() const { return Kind == Zero; }
bool isExpression() const { return Kind == Expression; }
unsigned getCounterID() const { return ID; }
unsigned getExpressionID() const { return ID; }
friend bool operator==(const Counter &LHS, const Counter &RHS) {
return LHS.Kind == RHS.Kind && LHS.ID == RHS.ID;
}
friend bool operator!=(const Counter &LHS, const Counter &RHS) {
return !(LHS == RHS);
}
friend bool operator<(const Counter &LHS, const Counter &RHS) {
return std::tie(LHS.Kind, LHS.ID) < std::tie(RHS.Kind, RHS.ID);
}
/// Return the counter that represents the number zero.
static Counter getZero() { return Counter(); }
/// Return the counter that corresponds to a specific profile counter.
static Counter getCounter(unsigned CounterId) {
return Counter(CounterValueReference, CounterId);
}
/// Return the counter that corresponds to a specific addition counter
/// expression.
static Counter getExpression(unsigned ExpressionId) {
return Counter(Expression, ExpressionId);
}
};
/// A Counter expression is a value that represents an arithmetic operation
/// with two counters.
struct CounterExpression {
enum ExprKind { Subtract, Add };
ExprKind Kind;
Counter LHS, RHS;
CounterExpression(ExprKind Kind, Counter LHS, Counter RHS)
: Kind(Kind), LHS(LHS), RHS(RHS) {}
};
/// A Counter expression builder is used to construct the counter expressions.
/// It avoids unnecessary duplication and simplifies algebraic expressions.
class CounterExpressionBuilder {
/// A list of all the counter expressions
std::vector<CounterExpression> Expressions;
/// A lookup table for the index of a given expression.
DenseMap<CounterExpression, unsigned> ExpressionIndices;
/// Return the counter which corresponds to the given expression.
///
/// If the given expression is already stored in the builder, a counter
/// that references that expression is returned. Otherwise, the given
/// expression is added to the builder's collection of expressions.
Counter get(const CounterExpression &E);
/// Represents a term in a counter expression tree.
struct Term {
unsigned CounterID;
int Factor;
Term(unsigned CounterID, int Factor)
: CounterID(CounterID), Factor(Factor) {}
};
/// Gather the terms of the expression tree for processing.
///
/// This collects each addition and subtraction referenced by the counter into
/// a sequence that can be sorted and combined to build a simplified counter
/// expression.
void extractTerms(Counter C, int Sign, SmallVectorImpl<Term> &Terms);
/// Simplifies the given expression tree
/// by getting rid of algebraically redundant operations.
Counter simplify(Counter ExpressionTree);
public:
ArrayRef<CounterExpression> getExpressions() const { return Expressions; }
/// Return a counter that represents the expression that adds LHS and RHS.
Counter add(Counter LHS, Counter RHS, bool Simplify = true);
/// Return a counter that represents the expression that subtracts RHS from
/// LHS.
Counter subtract(Counter LHS, Counter RHS, bool Simplify = true);
};
using LineColPair = std::pair<unsigned, unsigned>;
/// A Counter mapping region associates a source range with a specific counter.
struct CounterMappingRegion {
enum RegionKind {
/// A CodeRegion associates some code with a counter
CodeRegion,
/// An ExpansionRegion represents a file expansion region that associates
/// a source range with the expansion of a virtual source file, such as
/// for a macro instantiation or #include file.
ExpansionRegion,
/// A SkippedRegion represents a source range with code that was skipped
/// by a preprocessor or similar means.
SkippedRegion,
/// A GapRegion is like a CodeRegion, but its count is only set as the
/// line execution count when its the only region in the line.
GapRegion,
/// A BranchRegion represents leaf-level boolean expressions and is
/// associated with two counters, each representing the number of times the
/// expression evaluates to true or false.
BranchRegion
};
/// Primary Counter that is also used for Branch Regions (TrueCount).
Counter Count;
/// Secondary Counter used for Branch Regions (FalseCount).
Counter FalseCount;
unsigned FileID, ExpandedFileID;
unsigned LineStart, ColumnStart, LineEnd, ColumnEnd;
RegionKind Kind;
CounterMappingRegion(Counter Count, unsigned FileID, unsigned ExpandedFileID,
unsigned LineStart, unsigned ColumnStart,
unsigned LineEnd, unsigned ColumnEnd, RegionKind Kind)
: Count(Count), FileID(FileID), ExpandedFileID(ExpandedFileID),
LineStart(LineStart), ColumnStart(ColumnStart), LineEnd(LineEnd),
ColumnEnd(ColumnEnd), Kind(Kind) {}
CounterMappingRegion(Counter Count, Counter FalseCount, unsigned FileID,
unsigned ExpandedFileID, unsigned LineStart,
unsigned ColumnStart, unsigned LineEnd,
unsigned ColumnEnd, RegionKind Kind)
: Count(Count), FalseCount(FalseCount), FileID(FileID),
ExpandedFileID(ExpandedFileID), LineStart(LineStart),
ColumnStart(ColumnStart), LineEnd(LineEnd), ColumnEnd(ColumnEnd),
Kind(Kind) {}
static CounterMappingRegion
makeRegion(Counter Count, unsigned FileID, unsigned LineStart,
unsigned ColumnStart, unsigned LineEnd, unsigned ColumnEnd) {
return CounterMappingRegion(Count, FileID, 0, LineStart, ColumnStart,
LineEnd, ColumnEnd, CodeRegion);
}
static CounterMappingRegion
makeExpansion(unsigned FileID, unsigned ExpandedFileID, unsigned LineStart,
unsigned ColumnStart, unsigned LineEnd, unsigned ColumnEnd) {
return CounterMappingRegion(Counter(), FileID, ExpandedFileID, LineStart,
ColumnStart, LineEnd, ColumnEnd,
ExpansionRegion);
}
static CounterMappingRegion
makeSkipped(unsigned FileID, unsigned LineStart, unsigned ColumnStart,
unsigned LineEnd, unsigned ColumnEnd) {
return CounterMappingRegion(Counter(), FileID, 0, LineStart, ColumnStart,
LineEnd, ColumnEnd, SkippedRegion);
}
static CounterMappingRegion
makeGapRegion(Counter Count, unsigned FileID, unsigned LineStart,
unsigned ColumnStart, unsigned LineEnd, unsigned ColumnEnd) {
return CounterMappingRegion(Count, FileID, 0, LineStart, ColumnStart,
LineEnd, (1U << 31) | ColumnEnd, GapRegion);
}
static CounterMappingRegion
makeBranchRegion(Counter Count, Counter FalseCount, unsigned FileID,
unsigned LineStart, unsigned ColumnStart, unsigned LineEnd,
unsigned ColumnEnd) {
return CounterMappingRegion(Count, FalseCount, FileID, 0, LineStart,
ColumnStart, LineEnd, ColumnEnd, BranchRegion);
}
inline LineColPair startLoc() const {
return LineColPair(LineStart, ColumnStart);
}
inline LineColPair endLoc() const { return LineColPair(LineEnd, ColumnEnd); }
};
/// Associates a source range with an execution count.
struct CountedRegion : public CounterMappingRegion {
uint64_t ExecutionCount;
uint64_t FalseExecutionCount;
bool Folded;
CountedRegion(const CounterMappingRegion &R, uint64_t ExecutionCount)
: CounterMappingRegion(R), ExecutionCount(ExecutionCount),
FalseExecutionCount(0), Folded(false) {}
CountedRegion(const CounterMappingRegion &R, uint64_t ExecutionCount,
uint64_t FalseExecutionCount)
: CounterMappingRegion(R), ExecutionCount(ExecutionCount),
FalseExecutionCount(FalseExecutionCount), Folded(false) {}
};
/// A Counter mapping context is used to connect the counters, expressions
/// and the obtained counter values.
class CounterMappingContext {
ArrayRef<CounterExpression> Expressions;
ArrayRef<uint64_t> CounterValues;
public:
CounterMappingContext(ArrayRef<CounterExpression> Expressions,
ArrayRef<uint64_t> CounterValues = std::nullopt)
: Expressions(Expressions), CounterValues(CounterValues) {}
void setCounts(ArrayRef<uint64_t> Counts) { CounterValues = Counts; }
void dump(const Counter &C, raw_ostream &OS) const;
void dump(const Counter &C) const { dump(C, dbgs()); }
/// Return the number of times that a region of code associated with this
/// counter was executed.
Expected<int64_t> evaluate(const Counter &C) const;
unsigned getMaxCounterID(const Counter &C) const;
};
/// Code coverage information for a single function.
struct FunctionRecord {
/// Raw function name.
std::string Name;
/// Mapping from FileID (i.e. vector index) to filename. Used to support
/// macro expansions within a function in which the macro and function are
/// defined in separate files.
///
/// TODO: Uniquing filenames across all function records may be a performance
/// optimization.
std::vector<std::string> Filenames;
/// Regions in the function along with their counts.
std::vector<CountedRegion> CountedRegions;
/// Branch Regions in the function along with their counts.
std::vector<CountedRegion> CountedBranchRegions;
/// The number of times this function was executed.
uint64_t ExecutionCount = 0;
FunctionRecord(StringRef Name, ArrayRef<StringRef> Filenames)
: Name(Name), Filenames(Filenames.begin(), Filenames.end()) {}
FunctionRecord(FunctionRecord &&FR) = default;
FunctionRecord &operator=(FunctionRecord &&) = default;
void pushRegion(CounterMappingRegion Region, uint64_t Count,
uint64_t FalseCount) {
if (Region.Kind == CounterMappingRegion::BranchRegion) {
CountedBranchRegions.emplace_back(Region, Count, FalseCount);
// If both counters are hard-coded to zero, then this region represents a
// constant-folded branch.
if (Region.Count.isZero() && Region.FalseCount.isZero())
CountedBranchRegions.back().Folded = true;
return;
}
if (CountedRegions.empty())
ExecutionCount = Count;
CountedRegions.emplace_back(Region, Count, FalseCount);
}
};
/// Iterator over Functions, optionally filtered to a single file.
class FunctionRecordIterator
: public iterator_facade_base<FunctionRecordIterator,
std::forward_iterator_tag, FunctionRecord> {
ArrayRef<FunctionRecord> Records;
ArrayRef<FunctionRecord>::iterator Current;
StringRef Filename;
/// Skip records whose primary file is not \c Filename.
void skipOtherFiles();
public:
FunctionRecordIterator(ArrayRef<FunctionRecord> Records_,
StringRef Filename = "")
: Records(Records_), Current(Records.begin()), Filename(Filename) {
skipOtherFiles();
}
FunctionRecordIterator() : Current(Records.begin()) {}
bool operator==(const FunctionRecordIterator &RHS) const {
return Current == RHS.Current && Filename == RHS.Filename;
}
const FunctionRecord &operator*() const { return *Current; }
FunctionRecordIterator &operator++() {
assert(Current != Records.end() && "incremented past end");
++Current;
skipOtherFiles();
return *this;
}
};
/// Coverage information for a macro expansion or #included file.
///
/// When covered code has pieces that can be expanded for more detail, such as a
/// preprocessor macro use and its definition, these are represented as
/// expansions whose coverage can be looked up independently.
struct ExpansionRecord {
/// The abstract file this expansion covers.
unsigned FileID;
/// The region that expands to this record.
const CountedRegion &Region;
/// Coverage for the expansion.
const FunctionRecord &Function;
ExpansionRecord(const CountedRegion &Region,
const FunctionRecord &Function)
: FileID(Region.ExpandedFileID), Region(Region), Function(Function) {}
};
/// The execution count information starting at a point in a file.
///
/// A sequence of CoverageSegments gives execution counts for a file in format
/// that's simple to iterate through for processing.
struct CoverageSegment {
/// The line where this segment begins.
unsigned Line;
/// The column where this segment begins.
unsigned Col;
/// The execution count, or zero if no count was recorded.
uint64_t Count;
/// When false, the segment was uninstrumented or skipped.
bool HasCount;
/// Whether this enters a new region or returns to a previous count.
bool IsRegionEntry;
/// Whether this enters a gap region.
bool IsGapRegion;
CoverageSegment(unsigned Line, unsigned Col, bool IsRegionEntry)
: Line(Line), Col(Col), Count(0), HasCount(false),
IsRegionEntry(IsRegionEntry), IsGapRegion(false) {}
CoverageSegment(unsigned Line, unsigned Col, uint64_t Count,
bool IsRegionEntry, bool IsGapRegion = false,
bool IsBranchRegion = false)
: Line(Line), Col(Col), Count(Count), HasCount(true),
IsRegionEntry(IsRegionEntry), IsGapRegion(IsGapRegion) {}
friend bool operator==(const CoverageSegment &L, const CoverageSegment &R) {
return std::tie(L.Line, L.Col, L.Count, L.HasCount, L.IsRegionEntry,
L.IsGapRegion) == std::tie(R.Line, R.Col, R.Count,
R.HasCount, R.IsRegionEntry,
R.IsGapRegion);
}
};
/// An instantiation group contains a \c FunctionRecord list, such that each
/// record corresponds to a distinct instantiation of the same function.
///
/// Note that it's possible for a function to have more than one instantiation
/// (consider C++ template specializations or static inline functions).
class InstantiationGroup {
friend class CoverageMapping;
unsigned Line;
unsigned Col;
std::vector<const FunctionRecord *> Instantiations;
InstantiationGroup(unsigned Line, unsigned Col,
std::vector<const FunctionRecord *> Instantiations)
: Line(Line), Col(Col), Instantiations(std::move(Instantiations)) {}
public:
InstantiationGroup(const InstantiationGroup &) = delete;
InstantiationGroup(InstantiationGroup &&) = default;
/// Get the number of instantiations in this group.
size_t size() const { return Instantiations.size(); }
/// Get the line where the common function was defined.
unsigned getLine() const { return Line; }
/// Get the column where the common function was defined.
unsigned getColumn() const { return Col; }
/// Check if the instantiations in this group have a common mangled name.
bool hasName() const {
for (unsigned I = 1, E = Instantiations.size(); I < E; ++I)
if (Instantiations[I]->Name != Instantiations[0]->Name)
return false;
return true;
}
/// Get the common mangled name for instantiations in this group.
StringRef getName() const {
assert(hasName() && "Instantiations don't have a shared name");
return Instantiations[0]->Name;
}
/// Get the total execution count of all instantiations in this group.
uint64_t getTotalExecutionCount() const {
uint64_t Count = 0;
for (const FunctionRecord *F : Instantiations)
Count += F->ExecutionCount;
return Count;
}
/// Get the instantiations in this group.
ArrayRef<const FunctionRecord *> getInstantiations() const {
return Instantiations;
}
};
/// Coverage information to be processed or displayed.
///
/// This represents the coverage of an entire file, expansion, or function. It
/// provides a sequence of CoverageSegments to iterate through, as well as the
/// list of expansions that can be further processed.
class CoverageData {
friend class CoverageMapping;
std::string Filename;
std::vector<CoverageSegment> Segments;
std::vector<ExpansionRecord> Expansions;
std::vector<CountedRegion> BranchRegions;
public:
CoverageData() = default;
CoverageData(StringRef Filename) : Filename(Filename) {}
/// Get the name of the file this data covers.
StringRef getFilename() const { return Filename; }
/// Get an iterator over the coverage segments for this object. The segments
/// are guaranteed to be uniqued and sorted by location.
std::vector<CoverageSegment>::const_iterator begin() const {
return Segments.begin();
}
std::vector<CoverageSegment>::const_iterator end() const {
return Segments.end();
}
bool empty() const { return Segments.empty(); }
/// Expansions that can be further processed.
ArrayRef<ExpansionRecord> getExpansions() const { return Expansions; }
/// Branches that can be further processed.
ArrayRef<CountedRegion> getBranches() const { return BranchRegions; }
};
/// The mapping of profile information to coverage data.
///
/// This is the main interface to get coverage information, using a profile to
/// fill out execution counts.
class CoverageMapping {
DenseMap<size_t, DenseSet<size_t>> RecordProvenance;
std::vector<FunctionRecord> Functions;
DenseMap<size_t, SmallVector<unsigned, 0>> FilenameHash2RecordIndices;
std::vector<std::pair<std::string, uint64_t>> FuncHashMismatches;
CoverageMapping() = default;
// Load coverage records from readers.
static Error loadFromReaders(
ArrayRef<std::unique_ptr<CoverageMappingReader>> CoverageReaders,
IndexedInstrProfReader &ProfileReader, CoverageMapping &Coverage);
// Load coverage records from file.
static Error
loadFromFile(StringRef Filename, StringRef Arch, StringRef CompilationDir,
IndexedInstrProfReader &ProfileReader, CoverageMapping &Coverage,
bool &DataFound,
SmallVectorImpl<object::BuildID> *FoundBinaryIDs = nullptr);
/// Add a function record corresponding to \p Record.
Error loadFunctionRecord(const CoverageMappingRecord &Record,
IndexedInstrProfReader &ProfileReader);
/// Look up the indices for function records which are at least partially
/// defined in the specified file. This is guaranteed to return a superset of
/// such records: extra records not in the file may be included if there is
/// a hash collision on the filename. Clients must be robust to collisions.
ArrayRef<unsigned>
getImpreciseRecordIndicesForFilename(StringRef Filename) const;
public:
CoverageMapping(const CoverageMapping &) = delete;
CoverageMapping &operator=(const CoverageMapping &) = delete;
/// Load the coverage mapping using the given readers.
static Expected<std::unique_ptr<CoverageMapping>>
load(ArrayRef<std::unique_ptr<CoverageMappingReader>> CoverageReaders,
IndexedInstrProfReader &ProfileReader);
/// Load the coverage mapping from the given object files and profile. If
/// \p Arches is non-empty, it must specify an architecture for each object.
/// Ignores non-instrumented object files unless all are not instrumented.
static Expected<std::unique_ptr<CoverageMapping>>
load(ArrayRef<StringRef> ObjectFilenames, StringRef ProfileFilename,
vfs::FileSystem &FS, ArrayRef<StringRef> Arches = std::nullopt,
StringRef CompilationDir = "",
const object::BuildIDFetcher *BIDFetcher = nullptr,
bool CheckBinaryIDs = false);
/// The number of functions that couldn't have their profiles mapped.
///
/// This is a count of functions whose profile is out of date or otherwise
/// can't be associated with any coverage information.
unsigned getMismatchedCount() const { return FuncHashMismatches.size(); }
/// A hash mismatch occurs when a profile record for a symbol does not have
/// the same hash as a coverage mapping record for the same symbol. This
/// returns a list of hash mismatches, where each mismatch is a pair of the
/// symbol name and its coverage mapping hash.
ArrayRef<std::pair<std::string, uint64_t>> getHashMismatches() const {
return FuncHashMismatches;
}
/// Returns a lexicographically sorted, unique list of files that are
/// covered.
std::vector<StringRef> getUniqueSourceFiles() const;
/// Get the coverage for a particular file.
///
/// The given filename must be the name as recorded in the coverage
/// information. That is, only names returned from getUniqueSourceFiles will
/// yield a result.
CoverageData getCoverageForFile(StringRef Filename) const;
/// Get the coverage for a particular function.
CoverageData getCoverageForFunction(const FunctionRecord &Function) const;
/// Get the coverage for an expansion within a coverage set.
CoverageData getCoverageForExpansion(const ExpansionRecord &Expansion) const;
/// Gets all of the functions covered by this profile.
iterator_range<FunctionRecordIterator> getCoveredFunctions() const {
return make_range(FunctionRecordIterator(Functions),
FunctionRecordIterator());
}
/// Gets all of the functions in a particular file.
iterator_range<FunctionRecordIterator>
getCoveredFunctions(StringRef Filename) const {
return make_range(FunctionRecordIterator(Functions, Filename),
FunctionRecordIterator());
}
/// Get the list of function instantiation groups in a particular file.
///
/// Every instantiation group in a program is attributed to exactly one file:
/// the file in which the definition for the common function begins.
std::vector<InstantiationGroup>
getInstantiationGroups(StringRef Filename) const;
};
/// Coverage statistics for a single line.
class LineCoverageStats {
uint64_t ExecutionCount;
bool HasMultipleRegions;
bool Mapped;
unsigned Line;
ArrayRef<const CoverageSegment *> LineSegments;
const CoverageSegment *WrappedSegment;
friend class LineCoverageIterator;
LineCoverageStats() = default;
public:
LineCoverageStats(ArrayRef<const CoverageSegment *> LineSegments,
const CoverageSegment *WrappedSegment, unsigned Line);
uint64_t getExecutionCount() const { return ExecutionCount; }
bool hasMultipleRegions() const { return HasMultipleRegions; }
bool isMapped() const { return Mapped; }
unsigned getLine() const { return Line; }
ArrayRef<const CoverageSegment *> getLineSegments() const {
return LineSegments;
}
const CoverageSegment *getWrappedSegment() const { return WrappedSegment; }
};
/// An iterator over the \c LineCoverageStats objects for lines described by
/// a \c CoverageData instance.
class LineCoverageIterator
: public iterator_facade_base<LineCoverageIterator,
std::forward_iterator_tag,
const LineCoverageStats> {
public:
LineCoverageIterator(const CoverageData &CD)
: LineCoverageIterator(CD, CD.begin()->Line) {}
LineCoverageIterator(const CoverageData &CD, unsigned Line)
: CD(CD), WrappedSegment(nullptr), Next(CD.begin()), Ended(false),
Line(Line) {
this->operator++();
}
bool operator==(const LineCoverageIterator &R) const {
return &CD == &R.CD && Next == R.Next && Ended == R.Ended;
}
const LineCoverageStats &operator*() const { return Stats; }
LineCoverageIterator &operator++();
LineCoverageIterator getEnd() const {
auto EndIt = *this;
EndIt.Next = CD.end();
EndIt.Ended = true;
return EndIt;
}
private:
const CoverageData &CD;
const CoverageSegment *WrappedSegment;
std::vector<CoverageSegment>::const_iterator Next;
bool Ended;
unsigned Line;
SmallVector<const CoverageSegment *, 4> Segments;
LineCoverageStats Stats;
};
/// Get a \c LineCoverageIterator range for the lines described by \p CD.
static inline iterator_range<LineCoverageIterator>
getLineCoverageStats(const coverage::CoverageData &CD) {
auto Begin = LineCoverageIterator(CD);
auto End = Begin.getEnd();
return make_range(Begin, End);
}
// Coverage mappping data (V2) has the following layout:
// IPSK_covmap:
// [CoverageMapFileHeader]
// [ArrayStart]
// [CovMapFunctionRecordV2]
// [CovMapFunctionRecordV2]
// ...
// [ArrayEnd]
// [Encoded Filenames and Region Mapping Data]
//
// Coverage mappping data (V3) has the following layout:
// IPSK_covmap:
// [CoverageMapFileHeader]
// [Encoded Filenames]
// IPSK_covfun:
// [ArrayStart]
// odr_name_1: [CovMapFunctionRecordV3]
// odr_name_2: [CovMapFunctionRecordV3]
// ...
// [ArrayEnd]
//
// Both versions of the coverage mapping format encode the same information,
// but the V3 format does so more compactly by taking advantage of linkonce_odr
// semantics (it allows exactly 1 function record per name reference).
/// This namespace defines accessors shared by different versions of coverage
/// mapping records.
namespace accessors {
/// Return the structural hash associated with the function.
template <class FuncRecordTy, support::endianness Endian>
uint64_t getFuncHash(const FuncRecordTy *Record) {
return support::endian::byte_swap<uint64_t, Endian>(Record->FuncHash);
}
/// Return the coverage map data size for the function.
template <class FuncRecordTy, support::endianness Endian>
uint64_t getDataSize(const FuncRecordTy *Record) {
return support::endian::byte_swap<uint32_t, Endian>(Record->DataSize);
}
/// Return the function lookup key. The value is considered opaque.
template <class FuncRecordTy, support::endianness Endian>
uint64_t getFuncNameRef(const FuncRecordTy *Record) {
return support::endian::byte_swap<uint64_t, Endian>(Record->NameRef);
}
/// Return the PGO name of the function. Used for formats in which the name is
/// a hash.
template <class FuncRecordTy, support::endianness Endian>
Error getFuncNameViaRef(const FuncRecordTy *Record,
InstrProfSymtab &ProfileNames, StringRef &FuncName) {
uint64_t NameRef = getFuncNameRef<FuncRecordTy, Endian>(Record);
FuncName = ProfileNames.getFuncName(NameRef);
return Error::success();
}
/// Read coverage mapping out-of-line, from \p MappingBuf. This is used when the
/// coverage mapping is attached to the file header, instead of to the function
/// record.
template <class FuncRecordTy, support::endianness Endian>
StringRef getCoverageMappingOutOfLine(const FuncRecordTy *Record,
const char *MappingBuf) {
return {MappingBuf, size_t(getDataSize<FuncRecordTy, Endian>(Record))};
}
/// Advance to the next out-of-line coverage mapping and its associated
/// function record.
template <class FuncRecordTy, support::endianness Endian>
std::pair<const char *, const FuncRecordTy *>
advanceByOneOutOfLine(const FuncRecordTy *Record, const char *MappingBuf) {
return {MappingBuf + getDataSize<FuncRecordTy, Endian>(Record), Record + 1};
}
} // end namespace accessors
LLVM_PACKED_START
template <class IntPtrT>
struct CovMapFunctionRecordV1 {
using ThisT = CovMapFunctionRecordV1<IntPtrT>;
#define COVMAP_V1
#define COVMAP_FUNC_RECORD(Type, LLVMType, Name, Init) Type Name;
#include "llvm/ProfileData/InstrProfData.inc"
#undef COVMAP_V1
CovMapFunctionRecordV1() = delete;
template <support::endianness Endian> uint64_t getFuncHash() const {
return accessors::getFuncHash<ThisT, Endian>(this);
}
template <support::endianness Endian> uint64_t getDataSize() const {
return accessors::getDataSize<ThisT, Endian>(this);
}
/// Return function lookup key. The value is consider opaque.
template <support::endianness Endian> IntPtrT getFuncNameRef() const {
return support::endian::byte_swap<IntPtrT, Endian>(NamePtr);
}
/// Return the PGO name of the function.
template <support::endianness Endian>
Error getFuncName(InstrProfSymtab &ProfileNames, StringRef &FuncName) const {
IntPtrT NameRef = getFuncNameRef<Endian>();
uint32_t NameS = support::endian::byte_swap<uint32_t, Endian>(NameSize);
FuncName = ProfileNames.getFuncName(NameRef, NameS);
if (NameS && FuncName.empty())
return make_error<CoverageMapError>(coveragemap_error::malformed);
return Error::success();
}
template <support::endianness Endian>
std::pair<const char *, const ThisT *>
advanceByOne(const char *MappingBuf) const {
return accessors::advanceByOneOutOfLine<ThisT, Endian>(this, MappingBuf);
}
template <support::endianness Endian> uint64_t getFilenamesRef() const {
llvm_unreachable("V1 function format does not contain a filenames ref");
}
template <support::endianness Endian>
StringRef getCoverageMapping(const char *MappingBuf) const {
return accessors::getCoverageMappingOutOfLine<ThisT, Endian>(this,
MappingBuf);
}
};
struct CovMapFunctionRecordV2 {
using ThisT = CovMapFunctionRecordV2;
#define COVMAP_V2
#define COVMAP_FUNC_RECORD(Type, LLVMType, Name, Init) Type Name;
#include "llvm/ProfileData/InstrProfData.inc"
#undef COVMAP_V2
CovMapFunctionRecordV2() = delete;
template <support::endianness Endian> uint64_t getFuncHash() const {
return accessors::getFuncHash<ThisT, Endian>(this);
}
template <support::endianness Endian> uint64_t getDataSize() const {
return accessors::getDataSize<ThisT, Endian>(this);
}
template <support::endianness Endian> uint64_t getFuncNameRef() const {
return accessors::getFuncNameRef<ThisT, Endian>(this);
}
template <support::endianness Endian>
Error getFuncName(InstrProfSymtab &ProfileNames, StringRef &FuncName) const {
return accessors::getFuncNameViaRef<ThisT, Endian>(this, ProfileNames,
FuncName);
}
template <support::endianness Endian>
std::pair<const char *, const ThisT *>
advanceByOne(const char *MappingBuf) const {
return accessors::advanceByOneOutOfLine<ThisT, Endian>(this, MappingBuf);
}
template <support::endianness Endian> uint64_t getFilenamesRef() const {
llvm_unreachable("V2 function format does not contain a filenames ref");
}
template <support::endianness Endian>
StringRef getCoverageMapping(const char *MappingBuf) const {
return accessors::getCoverageMappingOutOfLine<ThisT, Endian>(this,
MappingBuf);
}
};
struct CovMapFunctionRecordV3 {
using ThisT = CovMapFunctionRecordV3;
#define COVMAP_V3
#define COVMAP_FUNC_RECORD(Type, LLVMType, Name, Init) Type Name;
#include "llvm/ProfileData/InstrProfData.inc"
#undef COVMAP_V3
CovMapFunctionRecordV3() = delete;
template <support::endianness Endian> uint64_t getFuncHash() const {
return accessors::getFuncHash<ThisT, Endian>(this);
}
template <support::endianness Endian> uint64_t getDataSize() const {
return accessors::getDataSize<ThisT, Endian>(this);
}
template <support::endianness Endian> uint64_t getFuncNameRef() const {
return accessors::getFuncNameRef<ThisT, Endian>(this);
}
template <support::endianness Endian>
Error getFuncName(InstrProfSymtab &ProfileNames, StringRef &FuncName) const {
return accessors::getFuncNameViaRef<ThisT, Endian>(this, ProfileNames,
FuncName);
}
/// Get the filename set reference.
template <support::endianness Endian> uint64_t getFilenamesRef() const {
return support::endian::byte_swap<uint64_t, Endian>(FilenamesRef);
}
/// Read the inline coverage mapping. Ignore the buffer parameter, it is for
/// out-of-line coverage mapping data only.
template <support::endianness Endian>
StringRef getCoverageMapping(const char *) const {
return StringRef(&CoverageMapping, getDataSize<Endian>());
}
// Advance to the next inline coverage mapping and its associated function
// record. Ignore the out-of-line coverage mapping buffer.
template <support::endianness Endian>
std::pair<const char *, const CovMapFunctionRecordV3 *>
advanceByOne(const char *) const {
assert(isAddrAligned(Align(8), this) && "Function record not aligned");
const char *Next = ((const char *)this) + sizeof(CovMapFunctionRecordV3) -
sizeof(char) + getDataSize<Endian>();
// Each function record has an alignment of 8, so we need to adjust
// alignment before reading the next record.
Next += offsetToAlignedAddr(Next, Align(8));
return {nullptr, reinterpret_cast<const CovMapFunctionRecordV3 *>(Next)};
}
};
// Per module coverage mapping data header, i.e. CoverageMapFileHeader
// documented above.
struct CovMapHeader {
#define COVMAP_HEADER(Type, LLVMType, Name, Init) Type Name;
#include "llvm/ProfileData/InstrProfData.inc"
template <support::endianness Endian> uint32_t getNRecords() const {
return support::endian::byte_swap<uint32_t, Endian>(NRecords);
}
template <support::endianness Endian> uint32_t getFilenamesSize() const {
return support::endian::byte_swap<uint32_t, Endian>(FilenamesSize);
}
template <support::endianness Endian> uint32_t getCoverageSize() const {
return support::endian::byte_swap<uint32_t, Endian>(CoverageSize);
}
template <support::endianness Endian> uint32_t getVersion() const {
return support::endian::byte_swap<uint32_t, Endian>(Version);
}
};
LLVM_PACKED_END
enum CovMapVersion {
Version1 = 0,
// Function's name reference from CovMapFuncRecord is changed from raw
// name string pointer to MD5 to support name section compression. Name
// section is also compressed.
Version2 = 1,
// A new interpretation of the columnEnd field is added in order to mark
// regions as gap areas.
Version3 = 2,
// Function records are named, uniqued, and moved to a dedicated section.
Version4 = 3,
// Branch regions referring to two counters are added
Version5 = 4,
// Compilation directory is stored separately and combined with relative
// filenames to produce an absolute file path.
Version6 = 5,
// The current version is Version6.
CurrentVersion = INSTR_PROF_COVMAP_VERSION
};
template <int CovMapVersion, class IntPtrT> struct CovMapTraits {
using CovMapFuncRecordType = CovMapFunctionRecordV3;
using NameRefType = uint64_t;
};
template <class IntPtrT> struct CovMapTraits<CovMapVersion::Version3, IntPtrT> {
using CovMapFuncRecordType = CovMapFunctionRecordV2;
using NameRefType = uint64_t;
};
template <class IntPtrT> struct CovMapTraits<CovMapVersion::Version2, IntPtrT> {
using CovMapFuncRecordType = CovMapFunctionRecordV2;
using NameRefType = uint64_t;
};
template <class IntPtrT> struct CovMapTraits<CovMapVersion::Version1, IntPtrT> {
using CovMapFuncRecordType = CovMapFunctionRecordV1<IntPtrT>;
using NameRefType = IntPtrT;
};
} // end namespace coverage
/// Provide DenseMapInfo for CounterExpression
template<> struct DenseMapInfo<coverage::CounterExpression> {
static inline coverage::CounterExpression getEmptyKey() {
using namespace coverage;
return CounterExpression(CounterExpression::ExprKind::Subtract,
Counter::getCounter(~0U),
Counter::getCounter(~0U));
}
static inline coverage::CounterExpression getTombstoneKey() {
using namespace coverage;
return CounterExpression(CounterExpression::ExprKind::Add,
Counter::getCounter(~0U),
Counter::getCounter(~0U));
}
static unsigned getHashValue(const coverage::CounterExpression &V) {
return static_cast<unsigned>(
hash_combine(V.Kind, V.LHS.getKind(), V.LHS.getCounterID(),
V.RHS.getKind(), V.RHS.getCounterID()));
}
static bool isEqual(const coverage::CounterExpression &LHS,
const coverage::CounterExpression &RHS) {
return LHS.Kind == RHS.Kind && LHS.LHS == RHS.LHS && LHS.RHS == RHS.RHS;
}
};
} // end namespace llvm
#endif // LLVM_PROFILEDATA_COVERAGE_COVERAGEMAPPING_H
PK hwFZ��" , ProfileData/Coverage/CoverageMappingWriter.hnu �[��� //===- CoverageMappingWriter.h - Code coverage mapping writer ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains support for writing coverage mapping data for
// instrumentation based coverage.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_PROFILEDATA_COVERAGE_COVERAGEMAPPINGWRITER_H
#define LLVM_PROFILEDATA_COVERAGE_COVERAGEMAPPINGWRITER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ProfileData/Coverage/CoverageMapping.h"
namespace llvm {
class raw_ostream;
namespace coverage {
/// Writer of the filenames section for the instrumentation
/// based code coverage.
class CoverageFilenamesSectionWriter {
ArrayRef<std::string> Filenames;
public:
CoverageFilenamesSectionWriter(ArrayRef<std::string> Filenames);
/// Write encoded filenames to the given output stream. If \p Compress is
/// true, attempt to compress the filenames.
void write(raw_ostream &OS, bool Compress = true);
};
/// Writer for instrumentation based coverage mapping data.
class CoverageMappingWriter {
ArrayRef<unsigned> VirtualFileMapping;
ArrayRef<CounterExpression> Expressions;
MutableArrayRef<CounterMappingRegion> MappingRegions;
public:
CoverageMappingWriter(ArrayRef<unsigned> VirtualFileMapping,
ArrayRef<CounterExpression> Expressions,
MutableArrayRef<CounterMappingRegion> MappingRegions)
: VirtualFileMapping(VirtualFileMapping), Expressions(Expressions),
MappingRegions(MappingRegions) {}
/// Write encoded coverage mapping data to the given output stream.
void write(raw_ostream &OS);
};
} // end namespace coverage
} // end namespace llvm
#endif // LLVM_PROFILEDATA_COVERAGE_COVERAGEMAPPINGWRITER_H
PK hwFZ.W�ZC
C
ProfileData/ProfileCommon.hnu �[��� //===- ProfileCommon.h - Common profiling APIs. -----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains data structures and functions common to both instrumented
// and sample profiling.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_PROFILEDATA_PROFILECOMMON_H
#define LLVM_PROFILEDATA_PROFILECOMMON_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/IR/ProfileSummary.h"
#include "llvm/ProfileData/InstrProf.h"
#include "llvm/ProfileData/SampleProf.h"
#include "llvm/Support/Error.h"
#include <algorithm>
#include <cstdint>
#include <functional>
#include <map>
#include <memory>
#include <vector>
namespace llvm {
namespace sampleprof {
class FunctionSamples;
} // end namespace sampleprof
class ProfileSummaryBuilder {
private:
/// We keep track of the number of times a count (block count or samples)
/// appears in the profile. The map is kept sorted in the descending order of
/// counts.
std::map<uint64_t, uint32_t, std::greater<uint64_t>> CountFrequencies;
std::vector<uint32_t> DetailedSummaryCutoffs;
protected:
SummaryEntryVector DetailedSummary;
uint64_t TotalCount = 0;
uint64_t MaxCount = 0;
uint64_t MaxFunctionCount = 0;
uint32_t NumCounts = 0;
uint32_t NumFunctions = 0;
ProfileSummaryBuilder(std::vector<uint32_t> Cutoffs)
: DetailedSummaryCutoffs(std::move(Cutoffs)) {}
~ProfileSummaryBuilder() = default;
inline void addCount(uint64_t Count);
void computeDetailedSummary();
public:
/// A vector of useful cutoff values for detailed summary.
static const ArrayRef<uint32_t> DefaultCutoffs;
/// Find the summary entry for a desired percentile of counts.
static const ProfileSummaryEntry &
getEntryForPercentile(const SummaryEntryVector &DS, uint64_t Percentile);
static uint64_t getHotCountThreshold(const SummaryEntryVector &DS);
static uint64_t getColdCountThreshold(const SummaryEntryVector &DS);
};
class InstrProfSummaryBuilder final : public ProfileSummaryBuilder {
uint64_t MaxInternalBlockCount = 0;
inline void addEntryCount(uint64_t Count);
inline void addInternalCount(uint64_t Count);
public:
InstrProfSummaryBuilder(std::vector<uint32_t> Cutoffs)
: ProfileSummaryBuilder(std::move(Cutoffs)) {}
void addRecord(const InstrProfRecord &);
std::unique_ptr<ProfileSummary> getSummary();
};
class SampleProfileSummaryBuilder final : public ProfileSummaryBuilder {
public:
SampleProfileSummaryBuilder(std::vector<uint32_t> Cutoffs)
: ProfileSummaryBuilder(std::move(Cutoffs)) {}
void addRecord(const sampleprof::FunctionSamples &FS,
bool isCallsiteSample = false);
std::unique_ptr<ProfileSummary>
computeSummaryForProfiles(const sampleprof::SampleProfileMap &Profiles);
std::unique_ptr<ProfileSummary> getSummary();
};
/// This is called when a count is seen in the profile.
void ProfileSummaryBuilder::addCount(uint64_t Count) {
TotalCount += Count;
if (Count > MaxCount)
MaxCount = Count;
NumCounts++;
CountFrequencies[Count]++;
}
} // end namespace llvm
#endif // LLVM_PROFILEDATA_PROFILECOMMON_H
PK hwFZ��%�3� 3� ProfileData/SampleProfReader.hnu �[��� //===- SampleProfReader.h - Read LLVM sample profile data -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains definitions needed for reading sample profiles.
//
// NOTE: If you are making changes to this file format, please remember
// to document them in the Clang documentation at
// tools/clang/docs/UsersManual.rst.
//
// Text format
// -----------
//
// Sample profiles are written as ASCII text. The file is divided into
// sections, which correspond to each of the functions executed at runtime.
// Each section has the following format
//
// function1:total_samples:total_head_samples
// offset1[.discriminator]: number_of_samples [fn1:num fn2:num ... ]
// offset2[.discriminator]: number_of_samples [fn3:num fn4:num ... ]
// ...
// offsetN[.discriminator]: number_of_samples [fn5:num fn6:num ... ]
// offsetA[.discriminator]: fnA:num_of_total_samples
// offsetA1[.discriminator]: number_of_samples [fn7:num fn8:num ... ]
// ...
// !CFGChecksum: num
// !Attribute: flags
//
// This is a nested tree in which the indentation represents the nesting level
// of the inline stack. There are no blank lines in the file. And the spacing
// within a single line is fixed. Additional spaces will result in an error
// while reading the file.
//
// Any line starting with the '#' character is completely ignored.
//
// Inlined calls are represented with indentation. The Inline stack is a
// stack of source locations in which the top of the stack represents the
// leaf function, and the bottom of the stack represents the actual
// symbol to which the instruction belongs.
//
// Function names must be mangled in order for the profile loader to
// match them in the current translation unit. The two numbers in the
// function header specify how many total samples were accumulated in the
// function (first number), and the total number of samples accumulated
// in the prologue of the function (second number). This head sample
// count provides an indicator of how frequently the function is invoked.
//
// There are three types of lines in the function body.
//
// * Sampled line represents the profile information of a source location.
// * Callsite line represents the profile information of a callsite.
// * Metadata line represents extra metadata of the function.
//
// Each sampled line may contain several items. Some are optional (marked
// below):
//
// a. Source line offset. This number represents the line number
// in the function where the sample was collected. The line number is
// always relative to the line where symbol of the function is
// defined. So, if the function has its header at line 280, the offset
// 13 is at line 293 in the file.
//
// Note that this offset should never be a negative number. This could
// happen in cases like macros. The debug machinery will register the
// line number at the point of macro expansion. So, if the macro was
// expanded in a line before the start of the function, the profile
// converter should emit a 0 as the offset (this means that the optimizers
// will not be able to associate a meaningful weight to the instructions
// in the macro).
//
// b. [OPTIONAL] Discriminator. This is used if the sampled program
// was compiled with DWARF discriminator support
// (http://wiki.dwarfstd.org/index.php?title=Path_Discriminators).
// DWARF discriminators are unsigned integer values that allow the
// compiler to distinguish between multiple execution paths on the
// same source line location.
//
// For example, consider the line of code ``if (cond) foo(); else bar();``.
// If the predicate ``cond`` is true 80% of the time, then the edge
// into function ``foo`` should be considered to be taken most of the
// time. But both calls to ``foo`` and ``bar`` are at the same source
// line, so a sample count at that line is not sufficient. The
// compiler needs to know which part of that line is taken more
// frequently.
//
// This is what discriminators provide. In this case, the calls to
// ``foo`` and ``bar`` will be at the same line, but will have
// different discriminator values. This allows the compiler to correctly
// set edge weights into ``foo`` and ``bar``.
//
// c. Number of samples. This is an integer quantity representing the
// number of samples collected by the profiler at this source
// location.
//
// d. [OPTIONAL] Potential call targets and samples. If present, this
// line contains a call instruction. This models both direct and
// number of samples. For example,
//
// 130: 7 foo:3 bar:2 baz:7
//
// The above means that at relative line offset 130 there is a call
// instruction that calls one of ``foo()``, ``bar()`` and ``baz()``,
// with ``baz()`` being the relatively more frequently called target.
//
// Each callsite line may contain several items. Some are optional.
//
// a. Source line offset. This number represents the line number of the
// callsite that is inlined in the profiled binary.
//
// b. [OPTIONAL] Discriminator. Same as the discriminator for sampled line.
//
// c. Number of samples. This is an integer quantity representing the
// total number of samples collected for the inlined instance at this
// callsite
//
// Metadata line can occur in lines with one indent only, containing extra
// information for the top-level function. Furthermore, metadata can only
// occur after all the body samples and callsite samples.
// Each metadata line may contain a particular type of metadata, marked by
// the starting characters annotated with !. We process each metadata line
// independently, hence each metadata line has to form an independent piece
// of information that does not require cross-line reference.
// We support the following types of metadata:
//
// a. CFG Checksum (a.k.a. function hash):
// !CFGChecksum: 12345
// b. CFG Checksum (see ContextAttributeMask):
// !Atribute: 1
//
//
// Binary format
// -------------
//
// This is a more compact encoding. Numbers are encoded as ULEB128 values
// and all strings are encoded in a name table. The file is organized in
// the following sections:
//
// MAGIC (uint64_t)
// File identifier computed by function SPMagic() (0x5350524f463432ff)
//
// VERSION (uint32_t)
// File format version number computed by SPVersion()
//
// SUMMARY
// TOTAL_COUNT (uint64_t)
// Total number of samples in the profile.
// MAX_COUNT (uint64_t)
// Maximum value of samples on a line.
// MAX_FUNCTION_COUNT (uint64_t)
// Maximum number of samples at function entry (head samples).
// NUM_COUNTS (uint64_t)
// Number of lines with samples.
// NUM_FUNCTIONS (uint64_t)
// Number of functions with samples.
// NUM_DETAILED_SUMMARY_ENTRIES (size_t)
// Number of entries in detailed summary
// DETAILED_SUMMARY
// A list of detailed summary entry. Each entry consists of
// CUTOFF (uint32_t)
// Required percentile of total sample count expressed as a fraction
// multiplied by 1000000.
// MIN_COUNT (uint64_t)
// The minimum number of samples required to reach the target
// CUTOFF.
// NUM_COUNTS (uint64_t)
// Number of samples to get to the desrired percentile.
//
// NAME TABLE
// SIZE (uint64_t)
// Number of entries in the name table.
// NAMES
// A NUL-separated list of SIZE strings.
//
// FUNCTION BODY (one for each uninlined function body present in the profile)
// HEAD_SAMPLES (uint64_t) [only for top-level functions]
// Total number of samples collected at the head (prologue) of the
// function.
// NOTE: This field should only be present for top-level functions
// (i.e., not inlined into any caller). Inlined function calls
// have no prologue, so they don't need this.
// NAME_IDX (uint64_t)
// Index into the name table indicating the function name.
// SAMPLES (uint64_t)
// Total number of samples collected in this function.
// NRECS (uint32_t)
// Total number of sampling records this function's profile.
// BODY RECORDS
// A list of NRECS entries. Each entry contains:
// OFFSET (uint32_t)
// Line offset from the start of the function.
// DISCRIMINATOR (uint32_t)
// Discriminator value (see description of discriminators
// in the text format documentation above).
// SAMPLES (uint64_t)
// Number of samples collected at this location.
// NUM_CALLS (uint32_t)
// Number of non-inlined function calls made at this location. In the
// case of direct calls, this number will always be 1. For indirect
// calls (virtual functions and function pointers) this will
// represent all the actual functions called at runtime.
// CALL_TARGETS
// A list of NUM_CALLS entries for each called function:
// NAME_IDX (uint64_t)
// Index into the name table with the callee name.
// SAMPLES (uint64_t)
// Number of samples collected at the call site.
// NUM_INLINED_FUNCTIONS (uint32_t)
// Number of callees inlined into this function.
// INLINED FUNCTION RECORDS
// A list of NUM_INLINED_FUNCTIONS entries describing each of the inlined
// callees.
// OFFSET (uint32_t)
// Line offset from the start of the function.
// DISCRIMINATOR (uint32_t)
// Discriminator value (see description of discriminators
// in the text format documentation above).
// FUNCTION BODY
// A FUNCTION BODY entry describing the inlined function.
//===----------------------------------------------------------------------===//
#ifndef LLVM_PROFILEDATA_SAMPLEPROFREADER_H
#define LLVM_PROFILEDATA_SAMPLEPROFREADER_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/IR/ProfileSummary.h"
#include "llvm/ProfileData/GCOV.h"
#include "llvm/ProfileData/SampleProf.h"
#include "llvm/ProfileData/SymbolRemappingReader.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Discriminator.h"
#include "llvm/Support/ErrorOr.h"
#include "llvm/Support/MemoryBuffer.h"
#include <cstdint>
#include <list>
#include <memory>
#include <optional>
#include <string>
#include <system_error>
#include <unordered_set>
#include <vector>
namespace llvm {
class raw_ostream;
class Twine;
namespace vfs {
class FileSystem;
} // namespace vfs
namespace sampleprof {
class SampleProfileReader;
/// SampleProfileReaderItaniumRemapper remaps the profile data from a
/// sample profile data reader, by applying a provided set of equivalences
/// between components of the symbol names in the profile.
class SampleProfileReaderItaniumRemapper {
public:
SampleProfileReaderItaniumRemapper(std::unique_ptr<MemoryBuffer> B,
std::unique_ptr<SymbolRemappingReader> SRR,
SampleProfileReader &R)
: Buffer(std::move(B)), Remappings(std::move(SRR)), Reader(R) {
assert(Remappings && "Remappings cannot be nullptr");
}
/// Create a remapper from the given remapping file. The remapper will
/// be used for profile read in by Reader.
static ErrorOr<std::unique_ptr<SampleProfileReaderItaniumRemapper>>
create(const std::string Filename, vfs::FileSystem &FS,
SampleProfileReader &Reader, LLVMContext &C);
/// Create a remapper from the given Buffer. The remapper will
/// be used for profile read in by Reader.
static ErrorOr<std::unique_ptr<SampleProfileReaderItaniumRemapper>>
create(std::unique_ptr<MemoryBuffer> &B, SampleProfileReader &Reader,
LLVMContext &C);
/// Apply remappings to the profile read by Reader.
void applyRemapping(LLVMContext &Ctx);
bool hasApplied() { return RemappingApplied; }
/// Insert function name into remapper.
void insert(StringRef FunctionName) { Remappings->insert(FunctionName); }
/// Query whether there is equivalent in the remapper which has been
/// inserted.
bool exist(StringRef FunctionName) {
return Remappings->lookup(FunctionName);
}
/// Return the equivalent name in the profile for \p FunctionName if
/// it exists.
std::optional<StringRef> lookUpNameInProfile(StringRef FunctionName);
private:
// The buffer holding the content read from remapping file.
std::unique_ptr<MemoryBuffer> Buffer;
std::unique_ptr<SymbolRemappingReader> Remappings;
// Map remapping key to the name in the profile. By looking up the
// key in the remapper, a given new name can be mapped to the
// cannonical name using the NameMap.
DenseMap<SymbolRemappingReader::Key, StringRef> NameMap;
// The Reader the remapper is servicing.
SampleProfileReader &Reader;
// Indicate whether remapping has been applied to the profile read
// by Reader -- by calling applyRemapping.
bool RemappingApplied = false;
};
/// Sample-based profile reader.
///
/// Each profile contains sample counts for all the functions
/// executed. Inside each function, statements are annotated with the
/// collected samples on all the instructions associated with that
/// statement.
///
/// For this to produce meaningful data, the program needs to be
/// compiled with some debug information (at minimum, line numbers:
/// -gline-tables-only). Otherwise, it will be impossible to match IR
/// instructions to the line numbers collected by the profiler.
///
/// From the profile file, we are interested in collecting the
/// following information:
///
/// * A list of functions included in the profile (mangled names).
///
/// * For each function F:
/// 1. The total number of samples collected in F.
///
/// 2. The samples collected at each line in F. To provide some
/// protection against source code shuffling, line numbers should
/// be relative to the start of the function.
///
/// The reader supports two file formats: text and binary. The text format
/// is useful for debugging and testing, while the binary format is more
/// compact and I/O efficient. They can both be used interchangeably.
class SampleProfileReader {
public:
SampleProfileReader(std::unique_ptr<MemoryBuffer> B, LLVMContext &C,
SampleProfileFormat Format = SPF_None)
: Profiles(0), Ctx(C), Buffer(std::move(B)), Format(Format) {}
virtual ~SampleProfileReader() = default;
/// Read and validate the file header.
virtual std::error_code readHeader() = 0;
/// Set the bits for FS discriminators. Parameter Pass specify the sequence
/// number, Pass == i is for the i-th round of adding FS discriminators.
/// Pass == 0 is for using base discriminators.
void setDiscriminatorMaskedBitFrom(FSDiscriminatorPass P) {
MaskedBitFrom = getFSPassBitEnd(P);
}
/// Get the bitmask the discriminators: For FS profiles, return the bit
/// mask for this pass. For non FS profiles, return (unsigned) -1.
uint32_t getDiscriminatorMask() const {
if (!ProfileIsFS)
return 0xFFFFFFFF;
assert((MaskedBitFrom != 0) && "MaskedBitFrom is not set properly");
return getN1Bits(MaskedBitFrom);
}
/// The interface to read sample profiles from the associated file.
std::error_code read() {
if (std::error_code EC = readImpl())
return EC;
if (Remapper)
Remapper->applyRemapping(Ctx);
FunctionSamples::UseMD5 = useMD5();
return sampleprof_error::success;
}
/// The implementaion to read sample profiles from the associated file.
virtual std::error_code readImpl() = 0;
/// Print the profile for \p FContext on stream \p OS.
void dumpFunctionProfile(SampleContext FContext, raw_ostream &OS = dbgs());
/// Collect functions with definitions in Module M. For reader which
/// support loading function profiles on demand, return true when the
/// reader has been given a module. Always return false for reader
/// which doesn't support loading function profiles on demand.
virtual bool collectFuncsFromModule() { return false; }
/// Print all the profiles on stream \p OS.
void dump(raw_ostream &OS = dbgs());
/// Print all the profiles on stream \p OS in the JSON format.
void dumpJson(raw_ostream &OS = dbgs());
/// Return the samples collected for function \p F.
FunctionSamples *getSamplesFor(const Function &F) {
// The function name may have been updated by adding suffix. Call
// a helper to (optionally) strip off suffixes so that we can
// match against the original function name in the profile.
StringRef CanonName = FunctionSamples::getCanonicalFnName(F);
return getSamplesFor(CanonName);
}
/// Return the samples collected for function \p F, create empty
/// FunctionSamples if it doesn't exist.
FunctionSamples *getOrCreateSamplesFor(const Function &F) {
std::string FGUID;
StringRef CanonName = FunctionSamples::getCanonicalFnName(F);
CanonName = getRepInFormat(CanonName, useMD5(), FGUID);
auto It = Profiles.find(CanonName);
if (It != Profiles.end())
return &It->second;
if (!FGUID.empty()) {
assert(useMD5() && "New name should only be generated for md5 profile");
CanonName = *MD5NameBuffer.insert(FGUID).first;
}
return &Profiles[CanonName];
}
/// Return the samples collected for function \p F.
virtual FunctionSamples *getSamplesFor(StringRef Fname) {
std::string FGUID;
Fname = getRepInFormat(Fname, useMD5(), FGUID);
auto It = Profiles.find(Fname);
if (It != Profiles.end())
return &It->second;
if (Remapper) {
if (auto NameInProfile = Remapper->lookUpNameInProfile(Fname)) {
auto It = Profiles.find(*NameInProfile);
if (It != Profiles.end())
return &It->second;
}
}
return nullptr;
}
/// Return all the profiles.
SampleProfileMap &getProfiles() { return Profiles; }
/// Report a parse error message.
void reportError(int64_t LineNumber, const Twine &Msg) const {
Ctx.diagnose(DiagnosticInfoSampleProfile(Buffer->getBufferIdentifier(),
LineNumber, Msg));
}
/// Create a sample profile reader appropriate to the file format.
/// Create a remapper underlying if RemapFilename is not empty.
/// Parameter P specifies the FSDiscriminatorPass.
static ErrorOr<std::unique_ptr<SampleProfileReader>>
create(const std::string Filename, LLVMContext &C, vfs::FileSystem &FS,
FSDiscriminatorPass P = FSDiscriminatorPass::Base,
const std::string RemapFilename = "");
/// Create a sample profile reader from the supplied memory buffer.
/// Create a remapper underlying if RemapFilename is not empty.
/// Parameter P specifies the FSDiscriminatorPass.
static ErrorOr<std::unique_ptr<SampleProfileReader>>
create(std::unique_ptr<MemoryBuffer> &B, LLVMContext &C, vfs::FileSystem &FS,
FSDiscriminatorPass P = FSDiscriminatorPass::Base,
const std::string RemapFilename = "");
/// Return the profile summary.
ProfileSummary &getSummary() const { return *(Summary.get()); }
MemoryBuffer *getBuffer() const { return Buffer.get(); }
/// \brief Return the profile format.
SampleProfileFormat getFormat() const { return Format; }
/// Whether input profile is based on pseudo probes.
bool profileIsProbeBased() const { return ProfileIsProbeBased; }
/// Whether input profile is fully context-sensitive.
bool profileIsCS() const { return ProfileIsCS; }
/// Whether input profile contains ShouldBeInlined contexts.
bool profileIsPreInlined() const { return ProfileIsPreInlined; }
/// Whether input profile is flow-sensitive.
bool profileIsFS() const { return ProfileIsFS; }
virtual std::unique_ptr<ProfileSymbolList> getProfileSymbolList() {
return nullptr;
};
/// It includes all the names that have samples either in outline instance
/// or inline instance.
virtual std::vector<StringRef> *getNameTable() { return nullptr; }
virtual bool dumpSectionInfo(raw_ostream &OS = dbgs()) { return false; };
/// Return whether names in the profile are all MD5 numbers.
bool useMD5() const { return ProfileIsMD5; }
/// Force the profile to use MD5 in Sample contexts, even if function names
/// are present.
virtual void setProfileUseMD5() { ProfileIsMD5 = true; }
/// Don't read profile without context if the flag is set. This is only meaningful
/// for ExtBinary format.
virtual void setSkipFlatProf(bool Skip) {}
/// Return whether any name in the profile contains ".__uniq." suffix.
virtual bool hasUniqSuffix() { return false; }
SampleProfileReaderItaniumRemapper *getRemapper() { return Remapper.get(); }
void setModule(const Module *Mod) { M = Mod; }
protected:
/// Map every function to its associated profile.
///
/// The profile of every function executed at runtime is collected
/// in the structure FunctionSamples. This maps function objects
/// to their corresponding profiles.
SampleProfileMap Profiles;
/// LLVM context used to emit diagnostics.
LLVMContext &Ctx;
/// Memory buffer holding the profile file.
std::unique_ptr<MemoryBuffer> Buffer;
/// Extra name buffer holding names created on demand.
/// This should only be needed for md5 profiles.
std::unordered_set<std::string> MD5NameBuffer;
/// Profile summary information.
std::unique_ptr<ProfileSummary> Summary;
/// Take ownership of the summary of this reader.
static std::unique_ptr<ProfileSummary>
takeSummary(SampleProfileReader &Reader) {
return std::move(Reader.Summary);
}
/// Compute summary for this profile.
void computeSummary();
std::unique_ptr<SampleProfileReaderItaniumRemapper> Remapper;
/// \brief Whether samples are collected based on pseudo probes.
bool ProfileIsProbeBased = false;
/// Whether function profiles are context-sensitive flat profiles.
bool ProfileIsCS = false;
/// Whether function profile contains ShouldBeInlined contexts.
bool ProfileIsPreInlined = false;
/// Number of context-sensitive profiles.
uint32_t CSProfileCount = 0;
/// Whether the function profiles use FS discriminators.
bool ProfileIsFS = false;
/// \brief The format of sample.
SampleProfileFormat Format = SPF_None;
/// \brief The current module being compiled if SampleProfileReader
/// is used by compiler. If SampleProfileReader is used by other
/// tools which are not compiler, M is usually nullptr.
const Module *M = nullptr;
/// Zero out the discriminator bits higher than bit MaskedBitFrom (0 based).
/// The default is to keep all the bits.
uint32_t MaskedBitFrom = 31;
/// Whether the profile uses MD5 for Sample Contexts and function names. This
/// can be one-way overriden by the user to force use MD5.
bool ProfileIsMD5 = false;
};
class SampleProfileReaderText : public SampleProfileReader {
public:
SampleProfileReaderText(std::unique_ptr<MemoryBuffer> B, LLVMContext &C)
: SampleProfileReader(std::move(B), C, SPF_Text) {}
/// Read and validate the file header.
std::error_code readHeader() override { return sampleprof_error::success; }
/// Read sample profiles from the associated file.
std::error_code readImpl() override;
/// Return true if \p Buffer is in the format supported by this class.
static bool hasFormat(const MemoryBuffer &Buffer);
/// Text format sample profile does not support MD5 for now.
void setProfileUseMD5() override {}
private:
/// CSNameTable is used to save full context vectors. This serves as an
/// underlying immutable buffer for all clients.
std::list<SampleContextFrameVector> CSNameTable;
};
class SampleProfileReaderBinary : public SampleProfileReader {
public:
SampleProfileReaderBinary(std::unique_ptr<MemoryBuffer> B, LLVMContext &C,
SampleProfileFormat Format = SPF_None)
: SampleProfileReader(std::move(B), C, Format) {}
/// Read and validate the file header.
std::error_code readHeader() override;
/// Read sample profiles from the associated file.
std::error_code readImpl() override;
/// It includes all the names that have samples either in outline instance
/// or inline instance.
std::vector<StringRef> *getNameTable() override { return &NameTable; }
protected:
/// Read a numeric value of type T from the profile.
///
/// If an error occurs during decoding, a diagnostic message is emitted and
/// EC is set.
///
/// \returns the read value.
template <typename T> ErrorOr<T> readNumber();
/// Read a numeric value of type T from the profile. The value is saved
/// without encoded.
template <typename T> ErrorOr<T> readUnencodedNumber();
/// Read a string from the profile.
///
/// If an error occurs during decoding, a diagnostic message is emitted and
/// EC is set.
///
/// \returns the read value.
ErrorOr<StringRef> readString();
/// Read the string index and check whether it overflows the table.
template <typename T> inline ErrorOr<size_t> readStringIndex(T &Table);
/// Read the next function profile instance.
std::error_code readFuncProfile(const uint8_t *Start);
/// Read the contents of the given profile instance.
std::error_code readProfile(FunctionSamples &FProfile);
/// Read the contents of Magic number and Version number.
std::error_code readMagicIdent();
/// Read profile summary.
std::error_code readSummary();
/// Read the whole name table.
std::error_code readNameTable();
/// Read a string indirectly via the name table.
ErrorOr<StringRef> readStringFromTable();
/// Read a context indirectly via the CSNameTable.
ErrorOr<SampleContextFrames> readContextFromTable();
/// Read a context indirectly via the CSNameTable if the profile has context,
/// otherwise same as readStringFromTable.
ErrorOr<SampleContext> readSampleContextFromTable();
/// Points to the current location in the buffer.
const uint8_t *Data = nullptr;
/// Points to the end of the buffer.
const uint8_t *End = nullptr;
/// Function name table.
std::vector<StringRef> NameTable;
/// If MD5 is used in NameTable section, the section saves uint64_t data.
/// The uint64_t data has to be converted to a string and then the string
/// will be used to initialize StringRef in NameTable.
/// Note NameTable contains StringRef so it needs another buffer to own
/// the string data. MD5StringBuf serves as the string buffer that is
/// referenced by NameTable (vector of StringRef). We make sure
/// the lifetime of MD5StringBuf is not shorter than that of NameTable.
std::vector<std::string> MD5StringBuf;
/// The starting address of NameTable containing fixed length MD5.
const uint8_t *MD5NameMemStart = nullptr;
/// CSNameTable is used to save full context vectors. It is the backing buffer
/// for SampleContextFrames.
std::vector<SampleContextFrameVector> CSNameTable;
private:
std::error_code readSummaryEntry(std::vector<ProfileSummaryEntry> &Entries);
virtual std::error_code verifySPMagic(uint64_t Magic) = 0;
};
class SampleProfileReaderRawBinary : public SampleProfileReaderBinary {
private:
std::error_code verifySPMagic(uint64_t Magic) override;
public:
SampleProfileReaderRawBinary(std::unique_ptr<MemoryBuffer> B, LLVMContext &C,
SampleProfileFormat Format = SPF_Binary)
: SampleProfileReaderBinary(std::move(B), C, Format) {}
/// \brief Return true if \p Buffer is in the format supported by this class.
static bool hasFormat(const MemoryBuffer &Buffer);
};
/// SampleProfileReaderExtBinaryBase/SampleProfileWriterExtBinaryBase defines
/// the basic structure of the extensible binary format.
/// The format is organized in sections except the magic and version number
/// at the beginning. There is a section table before all the sections, and
/// each entry in the table describes the entry type, start, size and
/// attributes. The format in each section is defined by the section itself.
///
/// It is easy to add a new section while maintaining the backward
/// compatibility of the profile. Nothing extra needs to be done. If we want
/// to extend an existing section, like add cache misses information in
/// addition to the sample count in the profile body, we can add a new section
/// with the extension and retire the existing section, and we could choose
/// to keep the parser of the old section if we want the reader to be able
/// to read both new and old format profile.
///
/// SampleProfileReaderExtBinary/SampleProfileWriterExtBinary define the
/// commonly used sections of a profile in extensible binary format. It is
/// possible to define other types of profile inherited from
/// SampleProfileReaderExtBinaryBase/SampleProfileWriterExtBinaryBase.
class SampleProfileReaderExtBinaryBase : public SampleProfileReaderBinary {
private:
std::error_code decompressSection(const uint8_t *SecStart,
const uint64_t SecSize,
const uint8_t *&DecompressBuf,
uint64_t &DecompressBufSize);
BumpPtrAllocator Allocator;
protected:
std::vector<SecHdrTableEntry> SecHdrTable;
std::error_code readSecHdrTableEntry(uint64_t Idx);
std::error_code readSecHdrTable();
std::error_code readFuncMetadata(bool ProfileHasAttribute);
std::error_code readFuncMetadata(bool ProfileHasAttribute,
FunctionSamples *FProfile);
std::error_code readFuncOffsetTable();
std::error_code readFuncProfiles();
std::error_code readNameTableSec(bool IsMD5, bool FixedLengthMD5);
std::error_code readCSNameTableSec();
std::error_code readProfileSymbolList();
std::error_code readHeader() override;
std::error_code verifySPMagic(uint64_t Magic) override = 0;
virtual std::error_code readOneSection(const uint8_t *Start, uint64_t Size,
const SecHdrTableEntry &Entry);
// placeholder for subclasses to dispatch their own section readers.
virtual std::error_code readCustomSection(const SecHdrTableEntry &Entry) = 0;
/// Determine which container readFuncOffsetTable() should populate, the list
/// FuncOffsetList or the map FuncOffsetTable.
bool useFuncOffsetList() const;
std::unique_ptr<ProfileSymbolList> ProfSymList;
/// The table mapping from function context to the offset of its
/// FunctionSample towards file start.
/// At most one of FuncOffsetTable and FuncOffsetList is populated.
DenseMap<SampleContext, uint64_t> FuncOffsetTable;
/// The list version of FuncOffsetTable. This is used if every entry is
/// being accessed.
std::vector<std::pair<SampleContext, uint64_t>> FuncOffsetList;
/// The set containing the functions to use when compiling a module.
DenseSet<StringRef> FuncsToUse;
/// If SkipFlatProf is true, skip the sections with
/// SecFlagFlat flag.
bool SkipFlatProf = false;
public:
SampleProfileReaderExtBinaryBase(std::unique_ptr<MemoryBuffer> B,
LLVMContext &C, SampleProfileFormat Format)
: SampleProfileReaderBinary(std::move(B), C, Format) {}
/// Read sample profiles in extensible format from the associated file.
std::error_code readImpl() override;
/// Get the total size of all \p Type sections.
uint64_t getSectionSize(SecType Type);
/// Get the total size of header and all sections.
uint64_t getFileSize();
bool dumpSectionInfo(raw_ostream &OS = dbgs()) override;
/// Collect functions with definitions in Module M. Return true if
/// the reader has been given a module.
bool collectFuncsFromModule() override;
std::unique_ptr<ProfileSymbolList> getProfileSymbolList() override {
return std::move(ProfSymList);
};
void setSkipFlatProf(bool Skip) override { SkipFlatProf = Skip; }
};
class SampleProfileReaderExtBinary : public SampleProfileReaderExtBinaryBase {
private:
std::error_code verifySPMagic(uint64_t Magic) override;
std::error_code readCustomSection(const SecHdrTableEntry &Entry) override {
// Update the data reader pointer to the end of the section.
Data = End;
return sampleprof_error::success;
};
public:
SampleProfileReaderExtBinary(std::unique_ptr<MemoryBuffer> B, LLVMContext &C,
SampleProfileFormat Format = SPF_Ext_Binary)
: SampleProfileReaderExtBinaryBase(std::move(B), C, Format) {}
/// \brief Return true if \p Buffer is in the format supported by this class.
static bool hasFormat(const MemoryBuffer &Buffer);
};
using InlineCallStack = SmallVector<FunctionSamples *, 10>;
// Supported histogram types in GCC. Currently, we only need support for
// call target histograms.
enum HistType {
HIST_TYPE_INTERVAL,
HIST_TYPE_POW2,
HIST_TYPE_SINGLE_VALUE,
HIST_TYPE_CONST_DELTA,
HIST_TYPE_INDIR_CALL,
HIST_TYPE_AVERAGE,
HIST_TYPE_IOR,
HIST_TYPE_INDIR_CALL_TOPN
};
class SampleProfileReaderGCC : public SampleProfileReader {
public:
SampleProfileReaderGCC(std::unique_ptr<MemoryBuffer> B, LLVMContext &C)
: SampleProfileReader(std::move(B), C, SPF_GCC),
GcovBuffer(Buffer.get()) {}
/// Read and validate the file header.
std::error_code readHeader() override;
/// Read sample profiles from the associated file.
std::error_code readImpl() override;
/// Return true if \p Buffer is in the format supported by this class.
static bool hasFormat(const MemoryBuffer &Buffer);
protected:
std::error_code readNameTable();
std::error_code readOneFunctionProfile(const InlineCallStack &InlineStack,
bool Update, uint32_t Offset);
std::error_code readFunctionProfiles();
std::error_code skipNextWord();
template <typename T> ErrorOr<T> readNumber();
ErrorOr<StringRef> readString();
/// Read the section tag and check that it's the same as \p Expected.
std::error_code readSectionTag(uint32_t Expected);
/// GCOV buffer containing the profile.
GCOVBuffer GcovBuffer;
/// Function names in this profile.
std::vector<std::string> Names;
/// GCOV tags used to separate sections in the profile file.
static const uint32_t GCOVTagAFDOFileNames = 0xaa000000;
static const uint32_t GCOVTagAFDOFunction = 0xac000000;
};
} // end namespace sampleprof
} // end namespace llvm
#endif // LLVM_PROFILEDATA_SAMPLEPROFREADER_H
PK hwFZ�%�e�B �B ProfileData/SampleProfWriter.hnu �[��� //===- SampleProfWriter.h - Write LLVM sample profile data ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains definitions needed for writing sample profiles.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_PROFILEDATA_SAMPLEPROFWRITER_H
#define LLVM_PROFILEDATA_SAMPLEPROFWRITER_H
#include "llvm/ADT/MapVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/IR/ProfileSummary.h"
#include "llvm/ProfileData/SampleProf.h"
#include "llvm/Support/ErrorOr.h"
#include "llvm/Support/raw_ostream.h"
#include <cstdint>
#include <memory>
#include <set>
#include <system_error>
namespace llvm {
namespace sampleprof {
enum SectionLayout {
DefaultLayout,
// The layout splits profile with context information from profile without
// context information. When Thinlto is enabled, ThinLTO postlink phase only
// has to load profile with context information and can skip the other part.
CtxSplitLayout,
NumOfLayout,
};
/// When writing a profile with size limit, user may want to use a different
/// strategy to reduce function count other than dropping functions with fewest
/// samples first. In this case a class implementing the same interfaces should
/// be provided to SampleProfileWriter::writeWithSizeLimit().
class FunctionPruningStrategy {
protected:
SampleProfileMap &ProfileMap;
size_t OutputSizeLimit;
public:
/// \p ProfileMap A reference to the original profile map. It will be modified
/// by Erase().
/// \p OutputSizeLimit Size limit in bytes of the output profile. This is
/// necessary to estimate how many functions to remove.
FunctionPruningStrategy(SampleProfileMap &ProfileMap, size_t OutputSizeLimit)
: ProfileMap(ProfileMap), OutputSizeLimit(OutputSizeLimit) {}
virtual ~FunctionPruningStrategy() = default;
/// SampleProfileWriter::writeWithSizeLimit() calls this after every write
/// iteration if the output size still exceeds the limit. This function
/// should erase some functions from the profile map so that the writer tries
/// to write the profile again with fewer functions. At least 1 entry from the
/// profile map must be erased.
///
/// \p CurrentOutputSize Number of bytes in the output if current profile map
/// is written.
virtual void Erase(size_t CurrentOutputSize) = 0;
};
class DefaultFunctionPruningStrategy : public FunctionPruningStrategy {
std::vector<NameFunctionSamples> SortedFunctions;
public:
DefaultFunctionPruningStrategy(SampleProfileMap &ProfileMap,
size_t OutputSizeLimit);
/// In this default implementation, functions with fewest samples are dropped
/// first. Since the exact size of the output cannot be easily calculated due
/// to compression, we use a heuristic to remove as many functions as
/// necessary but not too many, aiming to minimize the number of write
/// iterations.
/// Empirically, functions with larger total sample count contain linearly
/// more sample entries, meaning it takes linearly more space to write them.
/// The cumulative length is therefore quadratic if all functions are sorted
/// by total sample count.
/// TODO: Find better heuristic.
void Erase(size_t CurrentOutputSize) override;
};
/// Sample-based profile writer. Base class.
class SampleProfileWriter {
public:
virtual ~SampleProfileWriter() = default;
/// Write sample profiles in \p S.
///
/// \returns status code of the file update operation.
virtual std::error_code writeSample(const FunctionSamples &S) = 0;
/// Write all the sample profiles in the given map of samples.
///
/// \returns status code of the file update operation.
virtual std::error_code write(const SampleProfileMap &ProfileMap);
/// Write sample profiles up to given size limit, using the pruning strategy
/// to drop some functions if necessary.
///
/// \returns status code of the file update operation.
template <typename FunctionPruningStrategy = DefaultFunctionPruningStrategy>
std::error_code writeWithSizeLimit(SampleProfileMap &ProfileMap,
size_t OutputSizeLimit) {
FunctionPruningStrategy Strategy(ProfileMap, OutputSizeLimit);
return writeWithSizeLimitInternal(ProfileMap, OutputSizeLimit, &Strategy);
}
raw_ostream &getOutputStream() { return *OutputStream; }
/// Profile writer factory.
///
/// Create a new file writer based on the value of \p Format.
static ErrorOr<std::unique_ptr<SampleProfileWriter>>
create(StringRef Filename, SampleProfileFormat Format);
/// Create a new stream writer based on the value of \p Format.
/// For testing.
static ErrorOr<std::unique_ptr<SampleProfileWriter>>
create(std::unique_ptr<raw_ostream> &OS, SampleProfileFormat Format);
virtual void setProfileSymbolList(ProfileSymbolList *PSL) {}
virtual void setToCompressAllSections() {}
virtual void setUseMD5() {}
virtual void setPartialProfile() {}
virtual void resetSecLayout(SectionLayout SL) {}
protected:
SampleProfileWriter(std::unique_ptr<raw_ostream> &OS)
: OutputStream(std::move(OS)) {}
/// Write a file header for the profile file.
virtual std::error_code writeHeader(const SampleProfileMap &ProfileMap) = 0;
// Write function profiles to the profile file.
virtual std::error_code writeFuncProfiles(const SampleProfileMap &ProfileMap);
std::error_code writeWithSizeLimitInternal(SampleProfileMap &ProfileMap,
size_t OutputSizeLimit,
FunctionPruningStrategy *Strategy);
/// For writeWithSizeLimit in text mode, each newline takes 1 additional byte
/// on Windows when actually written to the file, but not written to a memory
/// buffer. This needs to be accounted for when rewriting the profile.
size_t LineCount;
/// Output stream where to emit the profile to.
std::unique_ptr<raw_ostream> OutputStream;
/// Profile summary.
std::unique_ptr<ProfileSummary> Summary;
/// Compute summary for this profile.
void computeSummary(const SampleProfileMap &ProfileMap);
/// Profile format.
SampleProfileFormat Format = SPF_None;
};
/// Sample-based profile writer (text format).
class SampleProfileWriterText : public SampleProfileWriter {
public:
std::error_code writeSample(const FunctionSamples &S) override;
protected:
SampleProfileWriterText(std::unique_ptr<raw_ostream> &OS)
: SampleProfileWriter(OS), Indent(0) {}
std::error_code writeHeader(const SampleProfileMap &ProfileMap) override {
LineCount = 0;
return sampleprof_error::success;
}
private:
/// Indent level to use when writing.
///
/// This is used when printing inlined callees.
unsigned Indent;
friend ErrorOr<std::unique_ptr<SampleProfileWriter>>
SampleProfileWriter::create(std::unique_ptr<raw_ostream> &OS,
SampleProfileFormat Format);
};
/// Sample-based profile writer (binary format).
class SampleProfileWriterBinary : public SampleProfileWriter {
public:
SampleProfileWriterBinary(std::unique_ptr<raw_ostream> &OS)
: SampleProfileWriter(OS) {}
std::error_code writeSample(const FunctionSamples &S) override;
protected:
virtual MapVector<StringRef, uint32_t> &getNameTable() { return NameTable; }
virtual std::error_code writeMagicIdent(SampleProfileFormat Format);
virtual std::error_code writeNameTable();
std::error_code writeHeader(const SampleProfileMap &ProfileMap) override;
std::error_code writeSummary();
virtual std::error_code writeContextIdx(const SampleContext &Context);
std::error_code writeNameIdx(StringRef FName);
std::error_code writeBody(const FunctionSamples &S);
inline void stablizeNameTable(MapVector<StringRef, uint32_t> &NameTable,
std::set<StringRef> &V);
MapVector<StringRef, uint32_t> NameTable;
void addName(StringRef FName);
virtual void addContext(const SampleContext &Context);
void addNames(const FunctionSamples &S);
private:
friend ErrorOr<std::unique_ptr<SampleProfileWriter>>
SampleProfileWriter::create(std::unique_ptr<raw_ostream> &OS,
SampleProfileFormat Format);
};
class SampleProfileWriterRawBinary : public SampleProfileWriterBinary {
using SampleProfileWriterBinary::SampleProfileWriterBinary;
};
const std::array<SmallVector<SecHdrTableEntry, 8>, NumOfLayout>
ExtBinaryHdrLayoutTable = {
// Note that SecFuncOffsetTable section is written after SecLBRProfile
// in the profile, but is put before SecLBRProfile in SectionHdrLayout.
// This is because sample reader follows the order in SectionHdrLayout
// to read each section. To read function profiles on demand, sample
// reader need to get the offset of each function profile first.
//
// DefaultLayout
SmallVector<SecHdrTableEntry, 8>({{SecProfSummary, 0, 0, 0, 0},
{SecNameTable, 0, 0, 0, 0},
{SecCSNameTable, 0, 0, 0, 0},
{SecFuncOffsetTable, 0, 0, 0, 0},
{SecLBRProfile, 0, 0, 0, 0},
{SecProfileSymbolList, 0, 0, 0, 0},
{SecFuncMetadata, 0, 0, 0, 0}}),
// CtxSplitLayout
SmallVector<SecHdrTableEntry, 8>({{SecProfSummary, 0, 0, 0, 0},
{SecNameTable, 0, 0, 0, 0},
// profile with context
// for next two sections
{SecFuncOffsetTable, 0, 0, 0, 0},
{SecLBRProfile, 0, 0, 0, 0},
// profile without context
// for next two sections
{SecFuncOffsetTable, 0, 0, 0, 0},
{SecLBRProfile, 0, 0, 0, 0},
{SecProfileSymbolList, 0, 0, 0, 0},
{SecFuncMetadata, 0, 0, 0, 0}}),
};
class SampleProfileWriterExtBinaryBase : public SampleProfileWriterBinary {
using SampleProfileWriterBinary::SampleProfileWriterBinary;
public:
std::error_code write(const SampleProfileMap &ProfileMap) override;
void setToCompressAllSections() override;
void setToCompressSection(SecType Type);
std::error_code writeSample(const FunctionSamples &S) override;
// Set to use MD5 to represent string in NameTable.
void setUseMD5() override {
UseMD5 = true;
addSectionFlag(SecNameTable, SecNameTableFlags::SecFlagMD5Name);
// MD5 will be stored as plain uint64_t instead of variable-length
// quantity format in NameTable section.
addSectionFlag(SecNameTable, SecNameTableFlags::SecFlagFixedLengthMD5);
}
// Set the profile to be partial. It means the profile is for
// common/shared code. The common profile is usually merged from
// profiles collected from running other targets.
void setPartialProfile() override {
addSectionFlag(SecProfSummary, SecProfSummaryFlags::SecFlagPartial);
}
void setProfileSymbolList(ProfileSymbolList *PSL) override {
ProfSymList = PSL;
};
void resetSecLayout(SectionLayout SL) override {
verifySecLayout(SL);
#ifndef NDEBUG
// Make sure resetSecLayout is called before any flag setting.
for (auto &Entry : SectionHdrLayout) {
assert(Entry.Flags == 0 &&
"resetSecLayout has to be called before any flag setting");
}
#endif
SecLayout = SL;
SectionHdrLayout = ExtBinaryHdrLayoutTable[SL];
}
protected:
uint64_t markSectionStart(SecType Type, uint32_t LayoutIdx);
std::error_code addNewSection(SecType Sec, uint32_t LayoutIdx,
uint64_t SectionStart);
template <class SecFlagType>
void addSectionFlag(SecType Type, SecFlagType Flag) {
for (auto &Entry : SectionHdrLayout) {
if (Entry.Type == Type)
addSecFlag(Entry, Flag);
}
}
template <class SecFlagType>
void addSectionFlag(uint32_t SectionIdx, SecFlagType Flag) {
addSecFlag(SectionHdrLayout[SectionIdx], Flag);
}
void addContext(const SampleContext &Context) override;
// placeholder for subclasses to dispatch their own section writers.
virtual std::error_code writeCustomSection(SecType Type) = 0;
// Verify the SecLayout is supported by the format.
virtual void verifySecLayout(SectionLayout SL) = 0;
// specify the order to write sections.
virtual std::error_code writeSections(const SampleProfileMap &ProfileMap) = 0;
// Dispatch section writer for each section. \p LayoutIdx is the sequence
// number indicating where the section is located in SectionHdrLayout.
virtual std::error_code writeOneSection(SecType Type, uint32_t LayoutIdx,
const SampleProfileMap &ProfileMap);
// Helper function to write name table.
std::error_code writeNameTable() override;
std::error_code writeContextIdx(const SampleContext &Context) override;
std::error_code writeCSNameIdx(const SampleContext &Context);
std::error_code writeCSNameTableSection();
std::error_code writeFuncMetadata(const SampleProfileMap &Profiles);
std::error_code writeFuncMetadata(const FunctionSamples &Profile);
// Functions to write various kinds of sections.
std::error_code writeNameTableSection(const SampleProfileMap &ProfileMap);
std::error_code writeFuncOffsetTable();
std::error_code writeProfileSymbolListSection();
SectionLayout SecLayout = DefaultLayout;
// Specifiy the order of sections in section header table. Note
// the order of sections in SecHdrTable may be different that the
// order in SectionHdrLayout. sample Reader will follow the order
// in SectionHdrLayout to read each section.
SmallVector<SecHdrTableEntry, 8> SectionHdrLayout =
ExtBinaryHdrLayoutTable[DefaultLayout];
// Save the start of SecLBRProfile so we can compute the offset to the
// start of SecLBRProfile for each Function's Profile and will keep it
// in FuncOffsetTable.
uint64_t SecLBRProfileStart = 0;
private:
void allocSecHdrTable();
std::error_code writeSecHdrTable();
std::error_code writeHeader(const SampleProfileMap &ProfileMap) override;
std::error_code compressAndOutput();
// We will swap the raw_ostream held by LocalBufStream and that
// held by OutputStream if we try to add a section which needs
// compression. After the swap, all the data written to output
// will be temporarily buffered into the underlying raw_string_ostream
// originally held by LocalBufStream. After the data writing for the
// section is completed, compress the data in the local buffer,
// swap the raw_ostream back and write the compressed data to the
// real output.
std::unique_ptr<raw_ostream> LocalBufStream;
// The location where the output stream starts.
uint64_t FileStart;
// The location in the output stream where the SecHdrTable should be
// written to.
uint64_t SecHdrTableOffset;
// The table contains SecHdrTableEntry entries in order of how they are
// populated in the writer. It may be different from the order in
// SectionHdrLayout which specifies the sequence in which sections will
// be read.
std::vector<SecHdrTableEntry> SecHdrTable;
// FuncOffsetTable maps function context to its profile offset in
// SecLBRProfile section. It is used to load function profile on demand.
MapVector<SampleContext, uint64_t> FuncOffsetTable;
// Whether to use MD5 to represent string.
bool UseMD5 = false;
/// CSNameTable maps function context to its offset in SecCSNameTable section.
/// The offset will be used everywhere where the context is referenced.
MapVector<SampleContext, uint32_t> CSNameTable;
ProfileSymbolList *ProfSymList = nullptr;
};
class SampleProfileWriterExtBinary : public SampleProfileWriterExtBinaryBase {
public:
SampleProfileWriterExtBinary(std::unique_ptr<raw_ostream> &OS)
: SampleProfileWriterExtBinaryBase(OS) {}
private:
std::error_code writeDefaultLayout(const SampleProfileMap &ProfileMap);
std::error_code writeCtxSplitLayout(const SampleProfileMap &ProfileMap);
std::error_code writeSections(const SampleProfileMap &ProfileMap) override;
std::error_code writeCustomSection(SecType Type) override {
return sampleprof_error::success;
};
void verifySecLayout(SectionLayout SL) override {
assert((SL == DefaultLayout || SL == CtxSplitLayout) &&
"Unsupported layout");
}
};
} // end namespace sampleprof
} // end namespace llvm
#endif // LLVM_PROFILEDATA_SAMPLEPROFWRITER_H
PK hwFZ1U��W W ProfileData/MemProfData.incnu �[��� #ifndef MEMPROF_DATA_INC
#define MEMPROF_DATA_INC
/*===-- MemProfData.inc - MemProf profiling runtime structures -*- C++ -*-=== *\
|*
|* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|* See https://llvm.org/LICENSE.txt for license information.
|* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|*
\*===----------------------------------------------------------------------===*/
/*
* This is the main file that defines all the data structure, signature,
* constant literals that are shared across profiling runtime library,
* and host tools (reader/writer).
*
* This file has two identical copies. The primary copy lives in LLVM and
* the other one sits in compiler-rt/include/profile directory. To make changes
* in this file, first modify the primary copy and copy it over to compiler-rt.
* Testing of any change in this file can start only after the two copies are
* synced up.
*
\*===----------------------------------------------------------------------===*/
#include <string.h>
#ifdef _MSC_VER
#define PACKED(...) __pragma(pack(push,1)) __VA_ARGS__ __pragma(pack(pop))
#else
#define PACKED(...) __VA_ARGS__ __attribute__((__packed__))
#endif
// A 64-bit magic number to uniquely identify the raw binary memprof profile file.
#define MEMPROF_RAW_MAGIC_64 \
((uint64_t)255 << 56 | (uint64_t)'m' << 48 | (uint64_t)'p' << 40 | (uint64_t)'r' << 32 | \
(uint64_t)'o' << 24 | (uint64_t)'f' << 16 | (uint64_t)'r' << 8 | (uint64_t)129)
// The version number of the raw binary format.
#define MEMPROF_RAW_VERSION 3ULL
#define MEMPROF_BUILDID_MAX_SIZE 32ULL
namespace llvm {
namespace memprof {
// A struct describing the header used for the raw binary memprof profile format.
PACKED(struct Header {
uint64_t Magic;
uint64_t Version;
uint64_t TotalSize;
uint64_t SegmentOffset;
uint64_t MIBOffset;
uint64_t StackOffset;
});
// A struct describing the information necessary to describe a /proc/maps
// segment entry for a particular binary/library identified by its build id.
PACKED(struct SegmentEntry {
uint64_t Start;
uint64_t End;
uint64_t Offset;
uint64_t BuildIdSize;
uint8_t BuildId[MEMPROF_BUILDID_MAX_SIZE] = {0};
// This constructor is only used in tests so don't set the BuildId.
SegmentEntry(uint64_t S, uint64_t E, uint64_t O)
: Start(S), End(E), Offset(O), BuildIdSize(0) {}
SegmentEntry(const SegmentEntry& S) {
Start = S.Start;
End = S.End;
Offset = S.Offset;
BuildIdSize = S.BuildIdSize;
memcpy(BuildId, S.BuildId, S.BuildIdSize);
}
SegmentEntry& operator=(const SegmentEntry& S) {
Start = S.Start;
End = S.End;
Offset = S.Offset;
BuildIdSize = S.BuildIdSize;
memcpy(BuildId, S.BuildId, S.BuildIdSize);
return *this;
}
bool operator==(const SegmentEntry& S) const {
return Start == S.Start && End == S.End && Offset == S.Offset &&
BuildIdSize == S.BuildIdSize &&
memcmp(BuildId, S.BuildId, S.BuildIdSize) == 0;
}
});
// Packed struct definition for MSVC. We can't use the PACKED macro defined in
// MemProfData.inc since it would mean we are embedding a directive (the
// #include for MIBEntryDef) into the macros which is undefined behaviour.
#ifdef _MSC_VER
__pragma(pack(push,1))
#endif
// A struct representing the heap allocation characteristics of a particular
// runtime context. This struct is shared between the compiler-rt runtime and
// the raw profile reader. The indexed format uses a separate, self-describing
// backwards compatible format.
struct MemInfoBlock{
#define MIBEntryDef(NameTag, Name, Type) Type Name;
#include "MIBEntryDef.inc"
#undef MIBEntryDef
bool operator==(const MemInfoBlock& Other) const {
bool IsEqual = true;
#define MIBEntryDef(NameTag, Name, Type) \
IsEqual = (IsEqual && Name == Other.Name);
#include "MIBEntryDef.inc"
#undef MIBEntryDef
return IsEqual;
}
MemInfoBlock() {
#define MIBEntryDef(NameTag, Name, Type) Name = Type();
#include "MIBEntryDef.inc"
#undef MIBEntryDef
}
MemInfoBlock(uint32_t Size, uint64_t AccessCount, uint32_t AllocTs,
uint32_t DeallocTs, uint32_t AllocCpu, uint32_t DeallocCpu)
: MemInfoBlock() {
AllocCount = 1U;
TotalAccessCount = AccessCount;
MinAccessCount = AccessCount;
MaxAccessCount = AccessCount;
TotalSize = Size;
MinSize = Size;
MaxSize = Size;
AllocTimestamp = AllocTs;
DeallocTimestamp = DeallocTs;
TotalLifetime = DeallocTimestamp - AllocTimestamp;
MinLifetime = TotalLifetime;
MaxLifetime = TotalLifetime;
// Access density is accesses per byte. Multiply by 100 to include the
// fractional part.
TotalAccessDensity = AccessCount * 100 / Size;
MinAccessDensity = TotalAccessDensity;
MaxAccessDensity = TotalAccessDensity;
// Lifetime access density is the access density per second of lifetime.
// Multiply by 1000 to convert denominator lifetime to seconds (using a
// minimum lifetime of 1ms to avoid divide by 0. Do the multiplication first
// to reduce truncations to 0.
TotalLifetimeAccessDensity =
TotalAccessDensity * 1000 / (TotalLifetime ? TotalLifetime : 1);
MinLifetimeAccessDensity = TotalLifetimeAccessDensity;
MaxLifetimeAccessDensity = TotalLifetimeAccessDensity;
AllocCpuId = AllocCpu;
DeallocCpuId = DeallocCpu;
NumMigratedCpu = AllocCpuId != DeallocCpuId;
}
void Merge(const MemInfoBlock &newMIB) {
AllocCount += newMIB.AllocCount;
TotalAccessCount += newMIB.TotalAccessCount;
MinAccessCount = newMIB.MinAccessCount < MinAccessCount ? newMIB.MinAccessCount : MinAccessCount;
MaxAccessCount = newMIB.MaxAccessCount > MaxAccessCount ? newMIB.MaxAccessCount : MaxAccessCount;
TotalSize += newMIB.TotalSize;
MinSize = newMIB.MinSize < MinSize ? newMIB.MinSize : MinSize;
MaxSize = newMIB.MaxSize > MaxSize ? newMIB.MaxSize : MaxSize;
TotalLifetime += newMIB.TotalLifetime;
MinLifetime = newMIB.MinLifetime < MinLifetime ? newMIB.MinLifetime : MinLifetime;
MaxLifetime = newMIB.MaxLifetime > MaxLifetime ? newMIB.MaxLifetime : MaxLifetime;
TotalAccessDensity += newMIB.TotalAccessDensity;
MinAccessDensity = newMIB.MinAccessDensity < MinAccessDensity
? newMIB.MinAccessDensity
: MinAccessDensity;
MaxAccessDensity = newMIB.MaxAccessDensity > MaxAccessDensity
? newMIB.MaxAccessDensity
: MaxAccessDensity;
TotalLifetimeAccessDensity += newMIB.TotalLifetimeAccessDensity;
MinLifetimeAccessDensity =
newMIB.MinLifetimeAccessDensity < MinLifetimeAccessDensity
? newMIB.MinLifetimeAccessDensity
: MinLifetimeAccessDensity;
MaxLifetimeAccessDensity =
newMIB.MaxLifetimeAccessDensity > MaxLifetimeAccessDensity
? newMIB.MaxLifetimeAccessDensity
: MaxLifetimeAccessDensity;
// We know newMIB was deallocated later, so just need to check if it was
// allocated before last one deallocated.
NumLifetimeOverlaps += newMIB.AllocTimestamp < DeallocTimestamp;
AllocTimestamp = newMIB.AllocTimestamp;
DeallocTimestamp = newMIB.DeallocTimestamp;
NumSameAllocCpu += AllocCpuId == newMIB.AllocCpuId;
NumSameDeallocCpu += DeallocCpuId == newMIB.DeallocCpuId;
AllocCpuId = newMIB.AllocCpuId;
DeallocCpuId = newMIB.DeallocCpuId;
}
#ifdef _MSC_VER
} __pragma(pack(pop));
#else
} __attribute__((__packed__));
#endif
} // namespace memprof
} // namespace llvm
#endif
PK hwFZc�A�8� 8� ProfileData/SampleProf.hnu �[��� //===- SampleProf.h - Sampling profiling format support ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains common definitions used in the reading and writing of
// sample profile data.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_PROFILEDATA_SAMPLEPROF_H
#define LLVM_PROFILEDATA_SAMPLEPROF_H
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorOr.h"
#include "llvm/Support/MathExtras.h"
#include <algorithm>
#include <cstdint>
#include <list>
#include <map>
#include <set>
#include <sstream>
#include <string>
#include <system_error>
#include <unordered_map>
#include <utility>
namespace llvm {
class DILocation;
class raw_ostream;
const std::error_category &sampleprof_category();
enum class sampleprof_error {
success = 0,
bad_magic,
unsupported_version,
too_large,
truncated,
malformed,
unrecognized_format,
unsupported_writing_format,
truncated_name_table,
not_implemented,
counter_overflow,
ostream_seek_unsupported,
uncompress_failed,
zlib_unavailable,
hash_mismatch
};
inline std::error_code make_error_code(sampleprof_error E) {
return std::error_code(static_cast<int>(E), sampleprof_category());
}
inline sampleprof_error MergeResult(sampleprof_error &Accumulator,
sampleprof_error Result) {
// Prefer first error encountered as later errors may be secondary effects of
// the initial problem.
if (Accumulator == sampleprof_error::success &&
Result != sampleprof_error::success)
Accumulator = Result;
return Accumulator;
}
} // end namespace llvm
namespace std {
template <>
struct is_error_code_enum<llvm::sampleprof_error> : std::true_type {};
} // end namespace std
namespace llvm {
namespace sampleprof {
enum SampleProfileFormat {
SPF_None = 0,
SPF_Text = 0x1,
SPF_Compact_Binary = 0x2, // Deprecated
SPF_GCC = 0x3,
SPF_Ext_Binary = 0x4,
SPF_Binary = 0xff
};
enum SampleProfileLayout {
SPL_None = 0,
SPL_Nest = 0x1,
SPL_Flat = 0x2,
};
static inline uint64_t SPMagic(SampleProfileFormat Format = SPF_Binary) {
return uint64_t('S') << (64 - 8) | uint64_t('P') << (64 - 16) |
uint64_t('R') << (64 - 24) | uint64_t('O') << (64 - 32) |
uint64_t('F') << (64 - 40) | uint64_t('4') << (64 - 48) |
uint64_t('2') << (64 - 56) | uint64_t(Format);
}
/// Get the proper representation of a string according to whether the
/// current Format uses MD5 to represent the string.
static inline StringRef getRepInFormat(StringRef Name, bool UseMD5,
std::string &GUIDBuf) {
if (Name.empty() || !UseMD5)
return Name;
GUIDBuf = std::to_string(Function::getGUID(Name));
return GUIDBuf;
}
static inline uint64_t SPVersion() { return 103; }
// Section Type used by SampleProfileExtBinaryBaseReader and
// SampleProfileExtBinaryBaseWriter. Never change the existing
// value of enum. Only append new ones.
enum SecType {
SecInValid = 0,
SecProfSummary = 1,
SecNameTable = 2,
SecProfileSymbolList = 3,
SecFuncOffsetTable = 4,
SecFuncMetadata = 5,
SecCSNameTable = 6,
// marker for the first type of profile.
SecFuncProfileFirst = 32,
SecLBRProfile = SecFuncProfileFirst
};
static inline std::string getSecName(SecType Type) {
switch ((int)Type) { // Avoid -Wcovered-switch-default
case SecInValid:
return "InvalidSection";
case SecProfSummary:
return "ProfileSummarySection";
case SecNameTable:
return "NameTableSection";
case SecProfileSymbolList:
return "ProfileSymbolListSection";
case SecFuncOffsetTable:
return "FuncOffsetTableSection";
case SecFuncMetadata:
return "FunctionMetadata";
case SecCSNameTable:
return "CSNameTableSection";
case SecLBRProfile:
return "LBRProfileSection";
default:
return "UnknownSection";
}
}
// Entry type of section header table used by SampleProfileExtBinaryBaseReader
// and SampleProfileExtBinaryBaseWriter.
struct SecHdrTableEntry {
SecType Type;
uint64_t Flags;
uint64_t Offset;
uint64_t Size;
// The index indicating the location of the current entry in
// SectionHdrLayout table.
uint64_t LayoutIndex;
};
// Flags common for all sections are defined here. In SecHdrTableEntry::Flags,
// common flags will be saved in the lower 32bits and section specific flags
// will be saved in the higher 32 bits.
enum class SecCommonFlags : uint32_t {
SecFlagInValid = 0,
SecFlagCompress = (1 << 0),
// Indicate the section contains only profile without context.
SecFlagFlat = (1 << 1)
};
// Section specific flags are defined here.
// !!!Note: Everytime a new enum class is created here, please add
// a new check in verifySecFlag.
enum class SecNameTableFlags : uint32_t {
SecFlagInValid = 0,
SecFlagMD5Name = (1 << 0),
// Store MD5 in fixed length instead of ULEB128 so NameTable can be
// accessed like an array.
SecFlagFixedLengthMD5 = (1 << 1),
// Profile contains ".__uniq." suffix name. Compiler shouldn't strip
// the suffix when doing profile matching when seeing the flag.
SecFlagUniqSuffix = (1 << 2)
};
enum class SecProfSummaryFlags : uint32_t {
SecFlagInValid = 0,
/// SecFlagPartial means the profile is for common/shared code.
/// The common profile is usually merged from profiles collected
/// from running other targets.
SecFlagPartial = (1 << 0),
/// SecFlagContext means this is context-sensitive flat profile for
/// CSSPGO
SecFlagFullContext = (1 << 1),
/// SecFlagFSDiscriminator means this profile uses flow-sensitive
/// discriminators.
SecFlagFSDiscriminator = (1 << 2),
/// SecFlagIsPreInlined means this profile contains ShouldBeInlined
/// contexts thus this is CS preinliner computed.
SecFlagIsPreInlined = (1 << 4),
};
enum class SecFuncMetadataFlags : uint32_t {
SecFlagInvalid = 0,
SecFlagIsProbeBased = (1 << 0),
SecFlagHasAttribute = (1 << 1),
};
enum class SecFuncOffsetFlags : uint32_t {
SecFlagInvalid = 0,
// Store function offsets in an order of contexts. The order ensures that
// callee contexts of a given context laid out next to it.
SecFlagOrdered = (1 << 0),
};
// Verify section specific flag is used for the correct section.
template <class SecFlagType>
static inline void verifySecFlag(SecType Type, SecFlagType Flag) {
// No verification is needed for common flags.
if (std::is_same<SecCommonFlags, SecFlagType>())
return;
// Verification starts here for section specific flag.
bool IsFlagLegal = false;
switch (Type) {
case SecNameTable:
IsFlagLegal = std::is_same<SecNameTableFlags, SecFlagType>();
break;
case SecProfSummary:
IsFlagLegal = std::is_same<SecProfSummaryFlags, SecFlagType>();
break;
case SecFuncMetadata:
IsFlagLegal = std::is_same<SecFuncMetadataFlags, SecFlagType>();
break;
default:
case SecFuncOffsetTable:
IsFlagLegal = std::is_same<SecFuncOffsetFlags, SecFlagType>();
break;
}
if (!IsFlagLegal)
llvm_unreachable("Misuse of a flag in an incompatible section");
}
template <class SecFlagType>
static inline void addSecFlag(SecHdrTableEntry &Entry, SecFlagType Flag) {
verifySecFlag(Entry.Type, Flag);
auto FVal = static_cast<uint64_t>(Flag);
bool IsCommon = std::is_same<SecCommonFlags, SecFlagType>();
Entry.Flags |= IsCommon ? FVal : (FVal << 32);
}
template <class SecFlagType>
static inline void removeSecFlag(SecHdrTableEntry &Entry, SecFlagType Flag) {
verifySecFlag(Entry.Type, Flag);
auto FVal = static_cast<uint64_t>(Flag);
bool IsCommon = std::is_same<SecCommonFlags, SecFlagType>();
Entry.Flags &= ~(IsCommon ? FVal : (FVal << 32));
}
template <class SecFlagType>
static inline bool hasSecFlag(const SecHdrTableEntry &Entry, SecFlagType Flag) {
verifySecFlag(Entry.Type, Flag);
auto FVal = static_cast<uint64_t>(Flag);
bool IsCommon = std::is_same<SecCommonFlags, SecFlagType>();
return Entry.Flags & (IsCommon ? FVal : (FVal << 32));
}
/// Represents the relative location of an instruction.
///
/// Instruction locations are specified by the line offset from the
/// beginning of the function (marked by the line where the function
/// header is) and the discriminator value within that line.
///
/// The discriminator value is useful to distinguish instructions
/// that are on the same line but belong to different basic blocks
/// (e.g., the two post-increment instructions in "if (p) x++; else y++;").
struct LineLocation {
LineLocation(uint32_t L, uint32_t D) : LineOffset(L), Discriminator(D) {}
void print(raw_ostream &OS) const;
void dump() const;
bool operator<(const LineLocation &O) const {
return LineOffset < O.LineOffset ||
(LineOffset == O.LineOffset && Discriminator < O.Discriminator);
}
bool operator==(const LineLocation &O) const {
return LineOffset == O.LineOffset && Discriminator == O.Discriminator;
}
bool operator!=(const LineLocation &O) const {
return LineOffset != O.LineOffset || Discriminator != O.Discriminator;
}
uint32_t LineOffset;
uint32_t Discriminator;
};
struct LineLocationHash {
uint64_t operator()(const LineLocation &Loc) const {
return std::hash<std::uint64_t>{}((((uint64_t)Loc.LineOffset) << 32) |
Loc.Discriminator);
}
};
raw_ostream &operator<<(raw_ostream &OS, const LineLocation &Loc);
/// Representation of a single sample record.
///
/// A sample record is represented by a positive integer value, which
/// indicates how frequently was the associated line location executed.
///
/// Additionally, if the associated location contains a function call,
/// the record will hold a list of all the possible called targets. For
/// direct calls, this will be the exact function being invoked. For
/// indirect calls (function pointers, virtual table dispatch), this
/// will be a list of one or more functions.
class SampleRecord {
public:
using CallTarget = std::pair<StringRef, uint64_t>;
struct CallTargetComparator {
bool operator()(const CallTarget &LHS, const CallTarget &RHS) const {
if (LHS.second != RHS.second)
return LHS.second > RHS.second;
return LHS.first < RHS.first;
}
};
using SortedCallTargetSet = std::set<CallTarget, CallTargetComparator>;
using CallTargetMap = StringMap<uint64_t>;
SampleRecord() = default;
/// Increment the number of samples for this record by \p S.
/// Optionally scale sample count \p S by \p Weight.
///
/// Sample counts accumulate using saturating arithmetic, to avoid wrapping
/// around unsigned integers.
sampleprof_error addSamples(uint64_t S, uint64_t Weight = 1) {
bool Overflowed;
NumSamples = SaturatingMultiplyAdd(S, Weight, NumSamples, &Overflowed);
return Overflowed ? sampleprof_error::counter_overflow
: sampleprof_error::success;
}
/// Decrease the number of samples for this record by \p S. Return the amout
/// of samples actually decreased.
uint64_t removeSamples(uint64_t S) {
if (S > NumSamples)
S = NumSamples;
NumSamples -= S;
return S;
}
/// Add called function \p F with samples \p S.
/// Optionally scale sample count \p S by \p Weight.
///
/// Sample counts accumulate using saturating arithmetic, to avoid wrapping
/// around unsigned integers.
sampleprof_error addCalledTarget(StringRef F, uint64_t S,
uint64_t Weight = 1) {
uint64_t &TargetSamples = CallTargets[F];
bool Overflowed;
TargetSamples =
SaturatingMultiplyAdd(S, Weight, TargetSamples, &Overflowed);
return Overflowed ? sampleprof_error::counter_overflow
: sampleprof_error::success;
}
/// Remove called function from the call target map. Return the target sample
/// count of the called function.
uint64_t removeCalledTarget(StringRef F) {
uint64_t Count = 0;
auto I = CallTargets.find(F);
if (I != CallTargets.end()) {
Count = I->second;
CallTargets.erase(I);
}
return Count;
}
/// Return true if this sample record contains function calls.
bool hasCalls() const { return !CallTargets.empty(); }
uint64_t getSamples() const { return NumSamples; }
const CallTargetMap &getCallTargets() const { return CallTargets; }
const SortedCallTargetSet getSortedCallTargets() const {
return SortCallTargets(CallTargets);
}
uint64_t getCallTargetSum() const {
uint64_t Sum = 0;
for (const auto &I : CallTargets)
Sum += I.second;
return Sum;
}
/// Sort call targets in descending order of call frequency.
static const SortedCallTargetSet SortCallTargets(const CallTargetMap &Targets) {
SortedCallTargetSet SortedTargets;
for (const auto &[Target, Frequency] : Targets) {
SortedTargets.emplace(Target, Frequency);
}
return SortedTargets;
}
/// Prorate call targets by a distribution factor.
static const CallTargetMap adjustCallTargets(const CallTargetMap &Targets,
float DistributionFactor) {
CallTargetMap AdjustedTargets;
for (const auto &[Target, Frequency] : Targets) {
AdjustedTargets[Target] = Frequency * DistributionFactor;
}
return AdjustedTargets;
}
/// Merge the samples in \p Other into this record.
/// Optionally scale sample counts by \p Weight.
sampleprof_error merge(const SampleRecord &Other, uint64_t Weight = 1);
void print(raw_ostream &OS, unsigned Indent) const;
void dump() const;
bool operator==(const SampleRecord &Other) const {
return NumSamples == Other.NumSamples && CallTargets == Other.CallTargets;
}
bool operator!=(const SampleRecord &Other) const {
return !(*this == Other);
}
private:
uint64_t NumSamples = 0;
CallTargetMap CallTargets;
};
raw_ostream &operator<<(raw_ostream &OS, const SampleRecord &Sample);
// State of context associated with FunctionSamples
enum ContextStateMask {
UnknownContext = 0x0, // Profile without context
RawContext = 0x1, // Full context profile from input profile
SyntheticContext = 0x2, // Synthetic context created for context promotion
InlinedContext = 0x4, // Profile for context that is inlined into caller
MergedContext = 0x8 // Profile for context merged into base profile
};
// Attribute of context associated with FunctionSamples
enum ContextAttributeMask {
ContextNone = 0x0,
ContextWasInlined = 0x1, // Leaf of context was inlined in previous build
ContextShouldBeInlined = 0x2, // Leaf of context should be inlined
ContextDuplicatedIntoBase =
0x4, // Leaf of context is duplicated into the base profile
};
// Represents a context frame with function name and line location
struct SampleContextFrame {
StringRef FuncName;
LineLocation Location;
SampleContextFrame() : Location(0, 0) {}
SampleContextFrame(StringRef FuncName, LineLocation Location)
: FuncName(FuncName), Location(Location) {}
bool operator==(const SampleContextFrame &That) const {
return Location == That.Location && FuncName == That.FuncName;
}
bool operator!=(const SampleContextFrame &That) const {
return !(*this == That);
}
std::string toString(bool OutputLineLocation) const {
std::ostringstream OContextStr;
OContextStr << FuncName.str();
if (OutputLineLocation) {
OContextStr << ":" << Location.LineOffset;
if (Location.Discriminator)
OContextStr << "." << Location.Discriminator;
}
return OContextStr.str();
}
};
static inline hash_code hash_value(const SampleContextFrame &arg) {
return hash_combine(arg.FuncName, arg.Location.LineOffset,
arg.Location.Discriminator);
}
using SampleContextFrameVector = SmallVector<SampleContextFrame, 1>;
using SampleContextFrames = ArrayRef<SampleContextFrame>;
struct SampleContextFrameHash {
uint64_t operator()(const SampleContextFrameVector &S) const {
return hash_combine_range(S.begin(), S.end());
}
};
// Sample context for FunctionSamples. It consists of the calling context,
// the function name and context state. Internally sample context is represented
// using ArrayRef, which is also the input for constructing a `SampleContext`.
// It can accept and represent both full context string as well as context-less
// function name.
// For a CS profile, a full context vector can look like:
// `main:3 _Z5funcAi:1 _Z8funcLeafi`
// For a base CS profile without calling context, the context vector should only
// contain the leaf frame name.
// For a non-CS profile, the context vector should be empty.
class SampleContext {
public:
SampleContext() : State(UnknownContext), Attributes(ContextNone) {}
SampleContext(StringRef Name)
: Name(Name), State(UnknownContext), Attributes(ContextNone) {}
SampleContext(SampleContextFrames Context,
ContextStateMask CState = RawContext)
: Attributes(ContextNone) {
assert(!Context.empty() && "Context is empty");
setContext(Context, CState);
}
// Give a context string, decode and populate internal states like
// Function name, Calling context and context state. Example of input
// `ContextStr`: `[main:3 @ _Z5funcAi:1 @ _Z8funcLeafi]`
SampleContext(StringRef ContextStr,
std::list<SampleContextFrameVector> &CSNameTable,
ContextStateMask CState = RawContext)
: Attributes(ContextNone) {
assert(!ContextStr.empty());
// Note that `[]` wrapped input indicates a full context string, otherwise
// it's treated as context-less function name only.
bool HasContext = ContextStr.startswith("[");
if (!HasContext) {
State = UnknownContext;
Name = ContextStr;
} else {
CSNameTable.emplace_back();
SampleContextFrameVector &Context = CSNameTable.back();
createCtxVectorFromStr(ContextStr, Context);
setContext(Context, CState);
}
}
/// Create a context vector from a given context string and save it in
/// `Context`.
static void createCtxVectorFromStr(StringRef ContextStr,
SampleContextFrameVector &Context) {
// Remove encapsulating '[' and ']' if any
ContextStr = ContextStr.substr(1, ContextStr.size() - 2);
StringRef ContextRemain = ContextStr;
StringRef ChildContext;
StringRef CalleeName;
while (!ContextRemain.empty()) {
auto ContextSplit = ContextRemain.split(" @ ");
ChildContext = ContextSplit.first;
ContextRemain = ContextSplit.second;
LineLocation CallSiteLoc(0, 0);
decodeContextString(ChildContext, CalleeName, CallSiteLoc);
Context.emplace_back(CalleeName, CallSiteLoc);
}
}
// Decode context string for a frame to get function name and location.
// `ContextStr` is in the form of `FuncName:StartLine.Discriminator`.
static void decodeContextString(StringRef ContextStr, StringRef &FName,
LineLocation &LineLoc) {
// Get function name
auto EntrySplit = ContextStr.split(':');
FName = EntrySplit.first;
LineLoc = {0, 0};
if (!EntrySplit.second.empty()) {
// Get line offset, use signed int for getAsInteger so string will
// be parsed as signed.
int LineOffset = 0;
auto LocSplit = EntrySplit.second.split('.');
LocSplit.first.getAsInteger(10, LineOffset);
LineLoc.LineOffset = LineOffset;
// Get discriminator
if (!LocSplit.second.empty())
LocSplit.second.getAsInteger(10, LineLoc.Discriminator);
}
}
operator SampleContextFrames() const { return FullContext; }
bool hasAttribute(ContextAttributeMask A) { return Attributes & (uint32_t)A; }
void setAttribute(ContextAttributeMask A) { Attributes |= (uint32_t)A; }
uint32_t getAllAttributes() { return Attributes; }
void setAllAttributes(uint32_t A) { Attributes = A; }
bool hasState(ContextStateMask S) { return State & (uint32_t)S; }
void setState(ContextStateMask S) { State |= (uint32_t)S; }
void clearState(ContextStateMask S) { State &= (uint32_t)~S; }
bool hasContext() const { return State != UnknownContext; }
bool isBaseContext() const { return FullContext.size() == 1; }
StringRef getName() const { return Name; }
SampleContextFrames getContextFrames() const { return FullContext; }
static std::string getContextString(SampleContextFrames Context,
bool IncludeLeafLineLocation = false) {
std::ostringstream OContextStr;
for (uint32_t I = 0; I < Context.size(); I++) {
if (OContextStr.str().size()) {
OContextStr << " @ ";
}
OContextStr << Context[I].toString(I != Context.size() - 1 ||
IncludeLeafLineLocation);
}
return OContextStr.str();
}
std::string toString() const {
if (!hasContext())
return Name.str();
return getContextString(FullContext, false);
}
uint64_t getHashCode() const {
return hasContext() ? hash_value(getContextFrames())
: hash_value(getName());
}
/// Set the name of the function and clear the current context.
void setName(StringRef FunctionName) {
Name = FunctionName;
FullContext = SampleContextFrames();
State = UnknownContext;
}
void setContext(SampleContextFrames Context,
ContextStateMask CState = RawContext) {
assert(CState != UnknownContext);
FullContext = Context;
Name = Context.back().FuncName;
State = CState;
}
bool operator==(const SampleContext &That) const {
return State == That.State && Name == That.Name &&
FullContext == That.FullContext;
}
bool operator!=(const SampleContext &That) const { return !(*this == That); }
bool operator<(const SampleContext &That) const {
if (State != That.State)
return State < That.State;
if (!hasContext()) {
return Name < That.Name;
}
uint64_t I = 0;
while (I < std::min(FullContext.size(), That.FullContext.size())) {
auto &Context1 = FullContext[I];
auto &Context2 = That.FullContext[I];
auto V = Context1.FuncName.compare(Context2.FuncName);
if (V)
return V < 0;
if (Context1.Location != Context2.Location)
return Context1.Location < Context2.Location;
I++;
}
return FullContext.size() < That.FullContext.size();
}
struct Hash {
uint64_t operator()(const SampleContext &Context) const {
return Context.getHashCode();
}
};
bool IsPrefixOf(const SampleContext &That) const {
auto ThisContext = FullContext;
auto ThatContext = That.FullContext;
if (ThatContext.size() < ThisContext.size())
return false;
ThatContext = ThatContext.take_front(ThisContext.size());
// Compare Leaf frame first
if (ThisContext.back().FuncName != ThatContext.back().FuncName)
return false;
// Compare leading context
return ThisContext.drop_back() == ThatContext.drop_back();
}
private:
/// Mangled name of the function.
StringRef Name;
// Full context including calling context and leaf function name
SampleContextFrames FullContext;
// State of the associated sample profile
uint32_t State;
// Attribute of the associated sample profile
uint32_t Attributes;
};
static inline hash_code hash_value(const SampleContext &arg) {
return arg.hasContext() ? hash_value(arg.getContextFrames())
: hash_value(arg.getName());
}
class FunctionSamples;
class SampleProfileReaderItaniumRemapper;
using BodySampleMap = std::map<LineLocation, SampleRecord>;
// NOTE: Using a StringMap here makes parsed profiles consume around 17% more
// memory, which is *very* significant for large profiles.
using FunctionSamplesMap = std::map<std::string, FunctionSamples, std::less<>>;
using CallsiteSampleMap = std::map<LineLocation, FunctionSamplesMap>;
using LocToLocMap =
std::unordered_map<LineLocation, LineLocation, LineLocationHash>;
/// Representation of the samples collected for a function.
///
/// This data structure contains all the collected samples for the body
/// of a function. Each sample corresponds to a LineLocation instance
/// within the body of the function.
class FunctionSamples {
public:
FunctionSamples() = default;
void print(raw_ostream &OS = dbgs(), unsigned Indent = 0) const;
void dump() const;
sampleprof_error addTotalSamples(uint64_t Num, uint64_t Weight = 1) {
bool Overflowed;
TotalSamples =
SaturatingMultiplyAdd(Num, Weight, TotalSamples, &Overflowed);
return Overflowed ? sampleprof_error::counter_overflow
: sampleprof_error::success;
}
void removeTotalSamples(uint64_t Num) {
if (TotalSamples < Num)
TotalSamples = 0;
else
TotalSamples -= Num;
}
void setTotalSamples(uint64_t Num) { TotalSamples = Num; }
void setHeadSamples(uint64_t Num) { TotalHeadSamples = Num; }
sampleprof_error addHeadSamples(uint64_t Num, uint64_t Weight = 1) {
bool Overflowed;
TotalHeadSamples =
SaturatingMultiplyAdd(Num, Weight, TotalHeadSamples, &Overflowed);
return Overflowed ? sampleprof_error::counter_overflow
: sampleprof_error::success;
}
sampleprof_error addBodySamples(uint32_t LineOffset, uint32_t Discriminator,
uint64_t Num, uint64_t Weight = 1) {
return BodySamples[LineLocation(LineOffset, Discriminator)].addSamples(
Num, Weight);
}
sampleprof_error addCalledTargetSamples(uint32_t LineOffset,
uint32_t Discriminator,
StringRef FName, uint64_t Num,
uint64_t Weight = 1) {
return BodySamples[LineLocation(LineOffset, Discriminator)].addCalledTarget(
FName, Num, Weight);
}
sampleprof_error addSampleRecord(LineLocation Location,
const SampleRecord &SampleRecord, uint64_t Weight = 1) {
return BodySamples[Location].merge(SampleRecord, Weight);
}
// Remove a call target and decrease the body sample correspondingly. Return
// the number of body samples actually decreased.
uint64_t removeCalledTargetAndBodySample(uint32_t LineOffset,
uint32_t Discriminator,
StringRef FName) {
uint64_t Count = 0;
auto I = BodySamples.find(LineLocation(LineOffset, Discriminator));
if (I != BodySamples.end()) {
Count = I->second.removeCalledTarget(FName);
Count = I->second.removeSamples(Count);
if (!I->second.getSamples())
BodySamples.erase(I);
}
return Count;
}
// Remove all call site samples for inlinees. This is needed when flattening
// a nested profile.
void removeAllCallsiteSamples() {
CallsiteSamples.clear();
}
// Accumulate all call target samples to update the body samples.
void updateCallsiteSamples() {
for (auto &I : BodySamples) {
uint64_t TargetSamples = I.second.getCallTargetSum();
// It's possible that the body sample count can be greater than the call
// target sum. E.g, if some call targets are external targets, they won't
// be considered valid call targets, but the body sample count which is
// from lbr ranges can actually include them.
if (TargetSamples > I.second.getSamples())
I.second.addSamples(TargetSamples - I.second.getSamples());
}
}
// Accumulate all body samples to set total samples.
void updateTotalSamples() {
setTotalSamples(0);
for (const auto &I : BodySamples)
addTotalSamples(I.second.getSamples());
for (auto &I : CallsiteSamples) {
for (auto &CS : I.second) {
CS.second.updateTotalSamples();
addTotalSamples(CS.second.getTotalSamples());
}
}
}
// Set current context and all callee contexts to be synthetic.
void SetContextSynthetic() {
Context.setState(SyntheticContext);
for (auto &I : CallsiteSamples) {
for (auto &CS : I.second) {
CS.second.SetContextSynthetic();
}
}
}
// Query the stale profile matching results and remap the location.
const LineLocation &mapIRLocToProfileLoc(const LineLocation &IRLoc) const {
// There is no remapping if the profile is not stale or the matching gives
// the same location.
if (!IRToProfileLocationMap)
return IRLoc;
const auto &ProfileLoc = IRToProfileLocationMap->find(IRLoc);
if (ProfileLoc != IRToProfileLocationMap->end())
return ProfileLoc->second;
else
return IRLoc;
}
/// Return the number of samples collected at the given location.
/// Each location is specified by \p LineOffset and \p Discriminator.
/// If the location is not found in profile, return error.
ErrorOr<uint64_t> findSamplesAt(uint32_t LineOffset,
uint32_t Discriminator) const {
const auto &ret = BodySamples.find(
mapIRLocToProfileLoc(LineLocation(LineOffset, Discriminator)));
if (ret == BodySamples.end())
return std::error_code();
return ret->second.getSamples();
}
/// Returns the call target map collected at a given location.
/// Each location is specified by \p LineOffset and \p Discriminator.
/// If the location is not found in profile, return error.
ErrorOr<SampleRecord::CallTargetMap>
findCallTargetMapAt(uint32_t LineOffset, uint32_t Discriminator) const {
const auto &ret = BodySamples.find(
mapIRLocToProfileLoc(LineLocation(LineOffset, Discriminator)));
if (ret == BodySamples.end())
return std::error_code();
return ret->second.getCallTargets();
}
/// Returns the call target map collected at a given location specified by \p
/// CallSite. If the location is not found in profile, return error.
ErrorOr<SampleRecord::CallTargetMap>
findCallTargetMapAt(const LineLocation &CallSite) const {
const auto &Ret = BodySamples.find(mapIRLocToProfileLoc(CallSite));
if (Ret == BodySamples.end())
return std::error_code();
return Ret->second.getCallTargets();
}
/// Return the function samples at the given callsite location.
FunctionSamplesMap &functionSamplesAt(const LineLocation &Loc) {
return CallsiteSamples[mapIRLocToProfileLoc(Loc)];
}
/// Returns the FunctionSamplesMap at the given \p Loc.
const FunctionSamplesMap *
findFunctionSamplesMapAt(const LineLocation &Loc) const {
auto iter = CallsiteSamples.find(mapIRLocToProfileLoc(Loc));
if (iter == CallsiteSamples.end())
return nullptr;
return &iter->second;
}
/// Returns a pointer to FunctionSamples at the given callsite location
/// \p Loc with callee \p CalleeName. If no callsite can be found, relax
/// the restriction to return the FunctionSamples at callsite location
/// \p Loc with the maximum total sample count. If \p Remapper is not
/// nullptr, use \p Remapper to find FunctionSamples with equivalent name
/// as \p CalleeName.
const FunctionSamples *
findFunctionSamplesAt(const LineLocation &Loc, StringRef CalleeName,
SampleProfileReaderItaniumRemapper *Remapper) const;
bool empty() const { return TotalSamples == 0; }
/// Return the total number of samples collected inside the function.
uint64_t getTotalSamples() const { return TotalSamples; }
/// For top-level functions, return the total number of branch samples that
/// have the function as the branch target (or 0 otherwise). This is the raw
/// data fetched from the profile. This should be equivalent to the sample of
/// the first instruction of the symbol. But as we directly get this info for
/// raw profile without referring to potentially inaccurate debug info, this
/// gives more accurate profile data and is preferred for standalone symbols.
uint64_t getHeadSamples() const { return TotalHeadSamples; }
/// Return an estimate of the sample count of the function entry basic block.
/// The function can be either a standalone symbol or an inlined function.
/// For Context-Sensitive profiles, this will prefer returning the head
/// samples (i.e. getHeadSamples()), if non-zero. Otherwise it estimates from
/// the function body's samples or callsite samples.
uint64_t getHeadSamplesEstimate() const {
if (FunctionSamples::ProfileIsCS && getHeadSamples()) {
// For CS profile, if we already have more accurate head samples
// counted by branch sample from caller, use them as entry samples.
return getHeadSamples();
}
uint64_t Count = 0;
// Use either BodySamples or CallsiteSamples which ever has the smaller
// lineno.
if (!BodySamples.empty() &&
(CallsiteSamples.empty() ||
BodySamples.begin()->first < CallsiteSamples.begin()->first))
Count = BodySamples.begin()->second.getSamples();
else if (!CallsiteSamples.empty()) {
// An indirect callsite may be promoted to several inlined direct calls.
// We need to get the sum of them.
for (const auto &N_FS : CallsiteSamples.begin()->second)
Count += N_FS.second.getHeadSamplesEstimate();
}
// Return at least 1 if total sample is not 0.
return Count ? Count : TotalSamples > 0;
}
/// Return all the samples collected in the body of the function.
const BodySampleMap &getBodySamples() const { return BodySamples; }
/// Return all the callsite samples collected in the body of the function.
const CallsiteSampleMap &getCallsiteSamples() const {
return CallsiteSamples;
}
/// Return the maximum of sample counts in a function body. When SkipCallSite
/// is false, which is the default, the return count includes samples in the
/// inlined functions. When SkipCallSite is true, the return count only
/// considers the body samples.
uint64_t getMaxCountInside(bool SkipCallSite = false) const {
uint64_t MaxCount = 0;
for (const auto &L : getBodySamples())
MaxCount = std::max(MaxCount, L.second.getSamples());
if (SkipCallSite)
return MaxCount;
for (const auto &C : getCallsiteSamples())
for (const FunctionSamplesMap::value_type &F : C.second)
MaxCount = std::max(MaxCount, F.second.getMaxCountInside());
return MaxCount;
}
/// Merge the samples in \p Other into this one.
/// Optionally scale samples by \p Weight.
sampleprof_error merge(const FunctionSamples &Other, uint64_t Weight = 1) {
sampleprof_error Result = sampleprof_error::success;
if (!GUIDToFuncNameMap)
GUIDToFuncNameMap = Other.GUIDToFuncNameMap;
if (Context.getName().empty())
Context = Other.getContext();
if (FunctionHash == 0) {
// Set the function hash code for the target profile.
FunctionHash = Other.getFunctionHash();
} else if (FunctionHash != Other.getFunctionHash()) {
// The two profiles coming with different valid hash codes indicates
// either:
// 1. They are same-named static functions from different compilation
// units (without using -unique-internal-linkage-names), or
// 2. They are really the same function but from different compilations.
// Let's bail out in either case for now, which means one profile is
// dropped.
return sampleprof_error::hash_mismatch;
}
MergeResult(Result, addTotalSamples(Other.getTotalSamples(), Weight));
MergeResult(Result, addHeadSamples(Other.getHeadSamples(), Weight));
for (const auto &I : Other.getBodySamples()) {
const LineLocation &Loc = I.first;
const SampleRecord &Rec = I.second;
MergeResult(Result, BodySamples[Loc].merge(Rec, Weight));
}
for (const auto &I : Other.getCallsiteSamples()) {
const LineLocation &Loc = I.first;
FunctionSamplesMap &FSMap = functionSamplesAt(Loc);
for (const auto &Rec : I.second)
MergeResult(Result, FSMap[Rec.first].merge(Rec.second, Weight));
}
return Result;
}
/// Recursively traverses all children, if the total sample count of the
/// corresponding function is no less than \p Threshold, add its corresponding
/// GUID to \p S. Also traverse the BodySamples to add hot CallTarget's GUID
/// to \p S.
void findInlinedFunctions(DenseSet<GlobalValue::GUID> &S,
const StringMap<Function *> &SymbolMap,
uint64_t Threshold) const {
if (TotalSamples <= Threshold)
return;
auto isDeclaration = [](const Function *F) {
return !F || F->isDeclaration();
};
if (isDeclaration(SymbolMap.lookup(getFuncName()))) {
// Add to the import list only when it's defined out of module.
S.insert(getGUID(getName()));
}
// Import hot CallTargets, which may not be available in IR because full
// profile annotation cannot be done until backend compilation in ThinLTO.
for (const auto &BS : BodySamples)
for (const auto &TS : BS.second.getCallTargets())
if (TS.getValue() > Threshold) {
const Function *Callee = SymbolMap.lookup(getFuncName(TS.getKey()));
if (isDeclaration(Callee))
S.insert(getGUID(TS.getKey()));
}
for (const auto &CS : CallsiteSamples)
for (const auto &NameFS : CS.second)
NameFS.second.findInlinedFunctions(S, SymbolMap, Threshold);
}
/// Set the name of the function.
void setName(StringRef FunctionName) { Context.setName(FunctionName); }
/// Return the function name.
StringRef getName() const { return Context.getName(); }
/// Return the original function name.
StringRef getFuncName() const { return getFuncName(getName()); }
void setFunctionHash(uint64_t Hash) { FunctionHash = Hash; }
uint64_t getFunctionHash() const { return FunctionHash; }
void setIRToProfileLocationMap(const LocToLocMap *LTLM) {
assert(IRToProfileLocationMap == nullptr && "this should be set only once");
IRToProfileLocationMap = LTLM;
}
/// Return the canonical name for a function, taking into account
/// suffix elision policy attributes.
static StringRef getCanonicalFnName(const Function &F) {
auto AttrName = "sample-profile-suffix-elision-policy";
auto Attr = F.getFnAttribute(AttrName).getValueAsString();
return getCanonicalFnName(F.getName(), Attr);
}
/// Name suffixes which canonicalization should handle to avoid
/// profile mismatch.
static constexpr const char *LLVMSuffix = ".llvm.";
static constexpr const char *PartSuffix = ".part.";
static constexpr const char *UniqSuffix = ".__uniq.";
static StringRef getCanonicalFnName(StringRef FnName,
StringRef Attr = "selected") {
// Note the sequence of the suffixes in the knownSuffixes array matters.
// If suffix "A" is appended after the suffix "B", "A" should be in front
// of "B" in knownSuffixes.
const char *knownSuffixes[] = {LLVMSuffix, PartSuffix, UniqSuffix};
if (Attr == "" || Attr == "all") {
return FnName.split('.').first;
} else if (Attr == "selected") {
StringRef Cand(FnName);
for (const auto &Suf : knownSuffixes) {
StringRef Suffix(Suf);
// If the profile contains ".__uniq." suffix, don't strip the
// suffix for names in the IR.
if (Suffix == UniqSuffix && FunctionSamples::HasUniqSuffix)
continue;
auto It = Cand.rfind(Suffix);
if (It == StringRef::npos)
continue;
auto Dit = Cand.rfind('.');
if (Dit == It + Suffix.size() - 1)
Cand = Cand.substr(0, It);
}
return Cand;
} else if (Attr == "none") {
return FnName;
} else {
assert(false && "internal error: unknown suffix elision policy");
}
return FnName;
}
/// Translate \p Name into its original name.
/// When profile doesn't use MD5, \p Name needs no translation.
/// When profile uses MD5, \p Name in current FunctionSamples
/// is actually GUID of the original function name. getFuncName will
/// translate \p Name in current FunctionSamples into its original name
/// by looking up in the function map GUIDToFuncNameMap.
/// If the original name doesn't exist in the map, return empty StringRef.
StringRef getFuncName(StringRef Name) const {
if (!UseMD5)
return Name;
assert(GUIDToFuncNameMap && "GUIDToFuncNameMap needs to be populated first");
return GUIDToFuncNameMap->lookup(std::stoull(Name.data()));
}
/// Returns the line offset to the start line of the subprogram.
/// We assume that a single function will not exceed 65535 LOC.
static unsigned getOffset(const DILocation *DIL);
/// Returns a unique call site identifier for a given debug location of a call
/// instruction. This is wrapper of two scenarios, the probe-based profile and
/// regular profile, to hide implementation details from the sample loader and
/// the context tracker.
static LineLocation getCallSiteIdentifier(const DILocation *DIL,
bool ProfileIsFS = false);
/// Returns a unique hash code for a combination of a callsite location and
/// the callee function name.
static uint64_t getCallSiteHash(StringRef CalleeName,
const LineLocation &Callsite);
/// Get the FunctionSamples of the inline instance where DIL originates
/// from.
///
/// The FunctionSamples of the instruction (Machine or IR) associated to
/// \p DIL is the inlined instance in which that instruction is coming from.
/// We traverse the inline stack of that instruction, and match it with the
/// tree nodes in the profile.
///
/// \returns the FunctionSamples pointer to the inlined instance.
/// If \p Remapper is not nullptr, it will be used to find matching
/// FunctionSamples with not exactly the same but equivalent name.
const FunctionSamples *findFunctionSamples(
const DILocation *DIL,
SampleProfileReaderItaniumRemapper *Remapper = nullptr) const;
static bool ProfileIsProbeBased;
static bool ProfileIsCS;
static bool ProfileIsPreInlined;
SampleContext &getContext() const { return Context; }
void setContext(const SampleContext &FContext) { Context = FContext; }
/// Whether the profile uses MD5 to represent string.
static bool UseMD5;
/// Whether the profile contains any ".__uniq." suffix in a name.
static bool HasUniqSuffix;
/// If this profile uses flow sensitive discriminators.
static bool ProfileIsFS;
/// GUIDToFuncNameMap saves the mapping from GUID to the symbol name, for
/// all the function symbols defined or declared in current module.
DenseMap<uint64_t, StringRef> *GUIDToFuncNameMap = nullptr;
// Assume the input \p Name is a name coming from FunctionSamples itself.
// If UseMD5 is true, the name is already a GUID and we
// don't want to return the GUID of GUID.
static uint64_t getGUID(StringRef Name) {
return UseMD5 ? std::stoull(Name.data()) : Function::getGUID(Name);
}
// Find all the names in the current FunctionSamples including names in
// all the inline instances and names of call targets.
void findAllNames(DenseSet<StringRef> &NameSet) const;
bool operator==(const FunctionSamples &Other) const {
return (GUIDToFuncNameMap == Other.GUIDToFuncNameMap ||
(GUIDToFuncNameMap && Other.GUIDToFuncNameMap &&
*GUIDToFuncNameMap == *Other.GUIDToFuncNameMap)) &&
FunctionHash == Other.FunctionHash && Context == Other.Context &&
TotalSamples == Other.TotalSamples &&
TotalHeadSamples == Other.TotalHeadSamples &&
BodySamples == Other.BodySamples &&
CallsiteSamples == Other.CallsiteSamples;
}
bool operator!=(const FunctionSamples &Other) const {
return !(*this == Other);
}
private:
/// CFG hash value for the function.
uint64_t FunctionHash = 0;
/// Calling context for function profile
mutable SampleContext Context;
/// Total number of samples collected inside this function.
///
/// Samples are cumulative, they include all the samples collected
/// inside this function and all its inlined callees.
uint64_t TotalSamples = 0;
/// Total number of samples collected at the head of the function.
/// This is an approximation of the number of calls made to this function
/// at runtime.
uint64_t TotalHeadSamples = 0;
/// Map instruction locations to collected samples.
///
/// Each entry in this map contains the number of samples
/// collected at the corresponding line offset. All line locations
/// are an offset from the start of the function.
BodySampleMap BodySamples;
/// Map call sites to collected samples for the called function.
///
/// Each entry in this map corresponds to all the samples
/// collected for the inlined function call at the given
/// location. For example, given:
///
/// void foo() {
/// 1 bar();
/// ...
/// 8 baz();
/// }
///
/// If the bar() and baz() calls were inlined inside foo(), this
/// map will contain two entries. One for all the samples collected
/// in the call to bar() at line offset 1, the other for all the samples
/// collected in the call to baz() at line offset 8.
CallsiteSampleMap CallsiteSamples;
/// IR to profile location map generated by stale profile matching.
///
/// Each entry is a mapping from the location on current build to the matched
/// location in the "stale" profile. For example:
/// Profiled source code:
/// void foo() {
/// 1 bar();
/// }
///
/// Current source code:
/// void foo() {
/// 1 // Code change
/// 2 bar();
/// }
/// Supposing the stale profile matching algorithm generated the mapping [2 ->
/// 1], the profile query using the location of bar on the IR which is 2 will
/// be remapped to 1 and find the location of bar in the profile.
const LocToLocMap *IRToProfileLocationMap = nullptr;
};
raw_ostream &operator<<(raw_ostream &OS, const FunctionSamples &FS);
using SampleProfileMap =
std::unordered_map<SampleContext, FunctionSamples, SampleContext::Hash>;
using NameFunctionSamples = std::pair<SampleContext, const FunctionSamples *>;
void sortFuncProfiles(const SampleProfileMap &ProfileMap,
std::vector<NameFunctionSamples> &SortedProfiles);
/// Sort a LocationT->SampleT map by LocationT.
///
/// It produces a sorted list of <LocationT, SampleT> records by ascending
/// order of LocationT.
template <class LocationT, class SampleT> class SampleSorter {
public:
using SamplesWithLoc = std::pair<const LocationT, SampleT>;
using SamplesWithLocList = SmallVector<const SamplesWithLoc *, 20>;
SampleSorter(const std::map<LocationT, SampleT> &Samples) {
for (const auto &I : Samples)
V.push_back(&I);
llvm::stable_sort(V, [](const SamplesWithLoc *A, const SamplesWithLoc *B) {
return A->first < B->first;
});
}
const SamplesWithLocList &get() const { return V; }
private:
SamplesWithLocList V;
};
/// SampleContextTrimmer impelements helper functions to trim, merge cold
/// context profiles. It also supports context profile canonicalization to make
/// sure ProfileMap's key is consistent with FunctionSample's name/context.
class SampleContextTrimmer {
public:
SampleContextTrimmer(SampleProfileMap &Profiles) : ProfileMap(Profiles){};
// Trim and merge cold context profile when requested. TrimBaseProfileOnly
// should only be effective when TrimColdContext is true. On top of
// TrimColdContext, TrimBaseProfileOnly can be used to specify to trim all
// cold profiles or only cold base profiles. Trimming base profiles only is
// mainly to honor the preinliner decsion. Note that when MergeColdContext is
// true, preinliner decsion is not honored anyway so TrimBaseProfileOnly will
// be ignored.
void trimAndMergeColdContextProfiles(uint64_t ColdCountThreshold,
bool TrimColdContext,
bool MergeColdContext,
uint32_t ColdContextFrameLength,
bool TrimBaseProfileOnly);
// Canonicalize context profile name and attributes.
void canonicalizeContextProfiles();
private:
SampleProfileMap &ProfileMap;
};
/// Helper class for profile conversion.
///
/// It supports full context-sensitive profile to nested profile conversion,
/// nested profile to flatten profile conversion, etc.
class ProfileConverter {
public:
ProfileConverter(SampleProfileMap &Profiles);
// Convert a full context-sensitive flat sample profile into a nested sample
// profile.
void convertCSProfiles();
struct FrameNode {
FrameNode(StringRef FName = StringRef(),
FunctionSamples *FSamples = nullptr,
LineLocation CallLoc = {0, 0})
: FuncName(FName), FuncSamples(FSamples), CallSiteLoc(CallLoc){};
// Map line+discriminator location to child frame
std::map<uint64_t, FrameNode> AllChildFrames;
// Function name for current frame
StringRef FuncName;
// Function Samples for current frame
FunctionSamples *FuncSamples;
// Callsite location in parent context
LineLocation CallSiteLoc;
FrameNode *getOrCreateChildFrame(const LineLocation &CallSite,
StringRef CalleeName);
};
static void flattenProfile(SampleProfileMap &ProfileMap,
bool ProfileIsCS = false) {
SampleProfileMap TmpProfiles;
flattenProfile(ProfileMap, TmpProfiles, ProfileIsCS);
ProfileMap = std::move(TmpProfiles);
}
static void flattenProfile(const SampleProfileMap &InputProfiles,
SampleProfileMap &OutputProfiles,
bool ProfileIsCS = false) {
if (ProfileIsCS) {
for (const auto &I : InputProfiles)
OutputProfiles[I.second.getName()].merge(I.second);
// Retain the profile name and clear the full context for each function
// profile.
for (auto &I : OutputProfiles)
I.second.setContext(SampleContext(I.first));
} else {
for (const auto &I : InputProfiles)
flattenNestedProfile(OutputProfiles, I.second);
}
}
private:
static void flattenNestedProfile(SampleProfileMap &OutputProfiles,
const FunctionSamples &FS) {
// To retain the context, checksum, attributes of the original profile, make
// a copy of it if no profile is found.
SampleContext &Context = FS.getContext();
auto Ret = OutputProfiles.try_emplace(Context, FS);
FunctionSamples &Profile = Ret.first->second;
if (Ret.second) {
// Clear nested inlinees' samples for the flattened copy. These inlinees
// will have their own top-level entries after flattening.
Profile.removeAllCallsiteSamples();
// We recompute TotalSamples later, so here set to zero.
Profile.setTotalSamples(0);
} else {
for (const auto &[LineLocation, SampleRecord] : FS.getBodySamples()) {
Profile.addSampleRecord(LineLocation, SampleRecord);
}
}
assert(Profile.getCallsiteSamples().empty() &&
"There should be no inlinees' profiles after flattening.");
// TotalSamples might not be equal to the sum of all samples from
// BodySamples and CallsiteSamples. So here we use "TotalSamples =
// Original_TotalSamples - All_of_Callsite_TotalSamples +
// All_of_Callsite_HeadSamples" to compute the new TotalSamples.
uint64_t TotalSamples = FS.getTotalSamples();
for (const auto &I : FS.getCallsiteSamples()) {
for (const auto &Callee : I.second) {
const auto &CalleeProfile = Callee.second;
// Add body sample.
Profile.addBodySamples(I.first.LineOffset, I.first.Discriminator,
CalleeProfile.getHeadSamplesEstimate());
// Add callsite sample.
Profile.addCalledTargetSamples(
I.first.LineOffset, I.first.Discriminator, CalleeProfile.getName(),
CalleeProfile.getHeadSamplesEstimate());
// Update total samples.
TotalSamples = TotalSamples >= CalleeProfile.getTotalSamples()
? TotalSamples - CalleeProfile.getTotalSamples()
: 0;
TotalSamples += CalleeProfile.getHeadSamplesEstimate();
// Recursively convert callee profile.
flattenNestedProfile(OutputProfiles, CalleeProfile);
}
}
Profile.addTotalSamples(TotalSamples);
Profile.setHeadSamples(Profile.getHeadSamplesEstimate());
}
// Nest all children profiles into the profile of Node.
void convertCSProfiles(FrameNode &Node);
FrameNode *getOrCreateContextPath(const SampleContext &Context);
SampleProfileMap &ProfileMap;
FrameNode RootFrame;
};
/// ProfileSymbolList records the list of function symbols shown up
/// in the binary used to generate the profile. It is useful to
/// to discriminate a function being so cold as not to shown up
/// in the profile and a function newly added.
class ProfileSymbolList {
public:
/// copy indicates whether we need to copy the underlying memory
/// for the input Name.
void add(StringRef Name, bool copy = false) {
if (!copy) {
Syms.insert(Name);
return;
}
Syms.insert(Name.copy(Allocator));
}
bool contains(StringRef Name) { return Syms.count(Name); }
void merge(const ProfileSymbolList &List) {
for (auto Sym : List.Syms)
add(Sym, true);
}
unsigned size() { return Syms.size(); }
void setToCompress(bool TC) { ToCompress = TC; }
bool toCompress() { return ToCompress; }
std::error_code read(const uint8_t *Data, uint64_t ListSize);
std::error_code write(raw_ostream &OS);
void dump(raw_ostream &OS = dbgs()) const;
private:
// Determine whether or not to compress the symbol list when
// writing it into profile. The variable is unused when the symbol
// list is read from an existing profile.
bool ToCompress = false;
DenseSet<StringRef> Syms;
BumpPtrAllocator Allocator;
};
} // end namespace sampleprof
using namespace sampleprof;
// Provide DenseMapInfo for SampleContext.
template <> struct DenseMapInfo<SampleContext> {
static inline SampleContext getEmptyKey() { return SampleContext(); }
static inline SampleContext getTombstoneKey() { return SampleContext("@"); }
static unsigned getHashValue(const SampleContext &Val) {
return Val.getHashCode();
}
static bool isEqual(const SampleContext &LHS, const SampleContext &RHS) {
return LHS == RHS;
}
};
// Prepend "__uniq" before the hash for tools like profilers to understand
// that this symbol is of internal linkage type. The "__uniq" is the
// pre-determined prefix that is used to tell tools that this symbol was
// created with -funique-internal-linakge-symbols and the tools can strip or
// keep the prefix as needed.
inline std::string getUniqueInternalLinkagePostfix(const StringRef &FName) {
llvm::MD5 Md5;
Md5.update(FName);
llvm::MD5::MD5Result R;
Md5.final(R);
SmallString<32> Str;
llvm::MD5::stringifyResult(R, Str);
// Convert MD5hash to Decimal. Demangler suffixes can either contain
// numbers or characters but not both.
llvm::APInt IntHash(128, Str.str(), 16);
return toString(IntHash, /* Radix = */ 10, /* Signed = */ false)
.insert(0, FunctionSamples::UniqSuffix);
}
} // end namespace llvm
#endif // LLVM_PROFILEDATA_SAMPLEPROF_H
PK hwFZl�?~� � ProfileData/InstrProf.hnu �[��� //===- InstrProf.h - Instrumented profiling format support ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Instrumentation-based profiling data is generated by instrumented
// binaries through library functions in compiler-rt, and read by the clang
// frontend to feed PGO.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_PROFILEDATA_INSTRPROF_H
#define LLVM_PROFILEDATA_INSTRPROF_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitmaskEnum.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/StringSet.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/IR/ProfileSummary.h"
#include "llvm/ProfileData/InstrProfData.inc"
#include "llvm/Support/BalancedPartitioning.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MD5.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/TargetParser/Host.h"
#include "llvm/TargetParser/Triple.h"
#include <algorithm>
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <cstring>
#include <list>
#include <memory>
#include <string>
#include <system_error>
#include <utility>
#include <vector>
namespace llvm {
class Function;
class GlobalVariable;
struct InstrProfRecord;
class InstrProfSymtab;
class Instruction;
class MDNode;
class Module;
enum InstrProfSectKind {
#define INSTR_PROF_SECT_ENTRY(Kind, SectNameCommon, SectNameCoff, Prefix) Kind,
#include "llvm/ProfileData/InstrProfData.inc"
};
/// Return the max count value. We reserver a few large values for special use.
inline uint64_t getInstrMaxCountValue() {
return std::numeric_limits<uint64_t>::max() - 2;
}
/// Return the name of the profile section corresponding to \p IPSK.
///
/// The name of the section depends on the object format type \p OF. If
/// \p AddSegmentInfo is true, a segment prefix and additional linker hints may
/// be added to the section name (this is the default).
std::string getInstrProfSectionName(InstrProfSectKind IPSK,
Triple::ObjectFormatType OF,
bool AddSegmentInfo = true);
/// Return the name profile runtime entry point to do value profiling
/// for a given site.
inline StringRef getInstrProfValueProfFuncName() {
return INSTR_PROF_VALUE_PROF_FUNC_STR;
}
/// Return the name profile runtime entry point to do memop size value
/// profiling.
inline StringRef getInstrProfValueProfMemOpFuncName() {
return INSTR_PROF_VALUE_PROF_MEMOP_FUNC_STR;
}
/// Return the name prefix of variables containing instrumented function names.
inline StringRef getInstrProfNameVarPrefix() { return "__profn_"; }
/// Return the name prefix of variables containing per-function control data.
inline StringRef getInstrProfDataVarPrefix() { return "__profd_"; }
/// Return the name prefix of profile counter variables.
inline StringRef getInstrProfCountersVarPrefix() { return "__profc_"; }
/// Return the name prefix of value profile variables.
inline StringRef getInstrProfValuesVarPrefix() { return "__profvp_"; }
/// Return the name of value profile node array variables:
inline StringRef getInstrProfVNodesVarName() { return "__llvm_prf_vnodes"; }
/// Return the name of the variable holding the strings (possibly compressed)
/// of all function's PGO names.
inline StringRef getInstrProfNamesVarName() {
return "__llvm_prf_nm";
}
/// Return the name of a covarage mapping variable (internal linkage)
/// for each instrumented source module. Such variables are allocated
/// in the __llvm_covmap section.
inline StringRef getCoverageMappingVarName() {
return "__llvm_coverage_mapping";
}
/// Return the name of the internal variable recording the array
/// of PGO name vars referenced by the coverage mapping. The owning
/// functions of those names are not emitted by FE (e.g, unused inline
/// functions.)
inline StringRef getCoverageUnusedNamesVarName() {
return "__llvm_coverage_names";
}
/// Return the name of function that registers all the per-function control
/// data at program startup time by calling __llvm_register_function. This
/// function has internal linkage and is called by __llvm_profile_init
/// runtime method. This function is not generated for these platforms:
/// Darwin, Linux, and FreeBSD.
inline StringRef getInstrProfRegFuncsName() {
return "__llvm_profile_register_functions";
}
/// Return the name of the runtime interface that registers per-function control
/// data for one instrumented function.
inline StringRef getInstrProfRegFuncName() {
return "__llvm_profile_register_function";
}
/// Return the name of the runtime interface that registers the PGO name strings.
inline StringRef getInstrProfNamesRegFuncName() {
return "__llvm_profile_register_names_function";
}
/// Return the name of the runtime initialization method that is generated by
/// the compiler. The function calls __llvm_profile_register_functions and
/// __llvm_profile_override_default_filename functions if needed. This function
/// has internal linkage and invoked at startup time via init_array.
inline StringRef getInstrProfInitFuncName() { return "__llvm_profile_init"; }
/// Return the name of the hook variable defined in profile runtime library.
/// A reference to the variable causes the linker to link in the runtime
/// initialization module (which defines the hook variable).
inline StringRef getInstrProfRuntimeHookVarName() {
return INSTR_PROF_QUOTE(INSTR_PROF_PROFILE_RUNTIME_VAR);
}
/// Return the name of the compiler generated function that references the
/// runtime hook variable. The function is a weak global.
inline StringRef getInstrProfRuntimeHookVarUseFuncName() {
return "__llvm_profile_runtime_user";
}
inline StringRef getInstrProfCounterBiasVarName() {
return INSTR_PROF_QUOTE(INSTR_PROF_PROFILE_COUNTER_BIAS_VAR);
}
/// Return the marker used to separate PGO names during serialization.
inline StringRef getInstrProfNameSeparator() { return "\01"; }
/// Return the modified name for function \c F suitable to be
/// used the key for profile lookup. Variable \c InLTO indicates if this
/// is called in LTO optimization passes.
std::string getPGOFuncName(const Function &F, bool InLTO = false,
uint64_t Version = INSTR_PROF_INDEX_VERSION);
/// Return the modified name for a function suitable to be
/// used the key for profile lookup. The function's original
/// name is \c RawFuncName and has linkage of type \c Linkage.
/// The function is defined in module \c FileName.
std::string getPGOFuncName(StringRef RawFuncName,
GlobalValue::LinkageTypes Linkage,
StringRef FileName,
uint64_t Version = INSTR_PROF_INDEX_VERSION);
/// Return the name of the global variable used to store a function
/// name in PGO instrumentation. \c FuncName is the name of the function
/// returned by the \c getPGOFuncName call.
std::string getPGOFuncNameVarName(StringRef FuncName,
GlobalValue::LinkageTypes Linkage);
/// Create and return the global variable for function name used in PGO
/// instrumentation. \c FuncName is the name of the function returned
/// by \c getPGOFuncName call.
GlobalVariable *createPGOFuncNameVar(Function &F, StringRef PGOFuncName);
/// Create and return the global variable for function name used in PGO
/// instrumentation. /// \c FuncName is the name of the function
/// returned by \c getPGOFuncName call, \c M is the owning module,
/// and \c Linkage is the linkage of the instrumented function.
GlobalVariable *createPGOFuncNameVar(Module &M,
GlobalValue::LinkageTypes Linkage,
StringRef PGOFuncName);
/// Return the initializer in string of the PGO name var \c NameVar.
StringRef getPGOFuncNameVarInitializer(GlobalVariable *NameVar);
/// Given a PGO function name, remove the filename prefix and return
/// the original (static) function name.
StringRef getFuncNameWithoutPrefix(StringRef PGOFuncName,
StringRef FileName = "<unknown>");
/// Given a vector of strings (function PGO names) \c NameStrs, the
/// method generates a combined string \c Result that is ready to be
/// serialized. The \c Result string is comprised of three fields:
/// The first field is the length of the uncompressed strings, and the
/// the second field is the length of the zlib-compressed string.
/// Both fields are encoded in ULEB128. If \c doCompress is false, the
/// third field is the uncompressed strings; otherwise it is the
/// compressed string. When the string compression is off, the
/// second field will have value zero.
Error collectPGOFuncNameStrings(ArrayRef<std::string> NameStrs,
bool doCompression, std::string &Result);
/// Produce \c Result string with the same format described above. The input
/// is vector of PGO function name variables that are referenced.
Error collectPGOFuncNameStrings(ArrayRef<GlobalVariable *> NameVars,
std::string &Result, bool doCompression = true);
/// \c NameStrings is a string composed of one of more sub-strings encoded in
/// the format described above. The substrings are separated by 0 or more zero
/// bytes. This method decodes the string and populates the \c Symtab.
Error readPGOFuncNameStrings(StringRef NameStrings, InstrProfSymtab &Symtab);
/// Check if INSTR_PROF_RAW_VERSION_VAR is defined. This global is only being
/// set in IR PGO compilation.
bool isIRPGOFlagSet(const Module *M);
/// Check if we can safely rename this Comdat function. Instances of the same
/// comdat function may have different control flows thus can not share the
/// same counter variable.
bool canRenameComdatFunc(const Function &F, bool CheckAddressTaken = false);
enum InstrProfValueKind : uint32_t {
#define VALUE_PROF_KIND(Enumerator, Value, Descr) Enumerator = Value,
#include "llvm/ProfileData/InstrProfData.inc"
};
/// Get the value profile data for value site \p SiteIdx from \p InstrProfR
/// and annotate the instruction \p Inst with the value profile meta data.
/// Annotate up to \p MaxMDCount (default 3) number of records per value site.
void annotateValueSite(Module &M, Instruction &Inst,
const InstrProfRecord &InstrProfR,
InstrProfValueKind ValueKind, uint32_t SiteIndx,
uint32_t MaxMDCount = 3);
/// Same as the above interface but using an ArrayRef, as well as \p Sum.
void annotateValueSite(Module &M, Instruction &Inst,
ArrayRef<InstrProfValueData> VDs, uint64_t Sum,
InstrProfValueKind ValueKind, uint32_t MaxMDCount);
/// Extract the value profile data from \p Inst which is annotated with
/// value profile meta data. Return false if there is no value data annotated,
/// otherwise return true.
bool getValueProfDataFromInst(const Instruction &Inst,
InstrProfValueKind ValueKind,
uint32_t MaxNumValueData,
InstrProfValueData ValueData[],
uint32_t &ActualNumValueData, uint64_t &TotalC,
bool GetNoICPValue = false);
inline StringRef getPGOFuncNameMetadataName() { return "PGOFuncName"; }
/// Return the PGOFuncName meta data associated with a function.
MDNode *getPGOFuncNameMetadata(const Function &F);
/// Create the PGOFuncName meta data if PGOFuncName is different from
/// function's raw name. This should only apply to internal linkage functions
/// declared by users only.
void createPGOFuncNameMetadata(Function &F, StringRef PGOFuncName);
/// Check if we can use Comdat for profile variables. This will eliminate
/// the duplicated profile variables for Comdat functions.
bool needsComdatForCounter(const Function &F, const Module &M);
/// An enum describing the attributes of an instrumented profile.
enum class InstrProfKind {
Unknown = 0x0,
// A frontend clang profile, incompatible with other attrs.
FrontendInstrumentation = 0x1,
// An IR-level profile (default when -fprofile-generate is used).
IRInstrumentation = 0x2,
// A profile with entry basic block instrumentation.
FunctionEntryInstrumentation = 0x4,
// A context sensitive IR-level profile.
ContextSensitive = 0x8,
// Use single byte probes for coverage.
SingleByteCoverage = 0x10,
// Only instrument the function entry basic block.
FunctionEntryOnly = 0x20,
// A memory profile collected using -fprofile=memory.
MemProf = 0x40,
// A temporal profile.
TemporalProfile = 0x80,
LLVM_MARK_AS_BITMASK_ENUM(/*LargestValue=*/TemporalProfile)
};
const std::error_category &instrprof_category();
enum class instrprof_error {
success = 0,
eof,
unrecognized_format,
bad_magic,
bad_header,
unsupported_version,
unsupported_hash_type,
too_large,
truncated,
malformed,
missing_debug_info_for_correlation,
unexpected_debug_info_for_correlation,
unable_to_correlate_profile,
unknown_function,
invalid_prof,
hash_mismatch,
count_mismatch,
counter_overflow,
value_site_count_mismatch,
compress_failed,
uncompress_failed,
empty_raw_profile,
zlib_unavailable,
raw_profile_version_mismatch
};
/// An ordered list of functions identified by their NameRef found in
/// INSTR_PROF_DATA
struct TemporalProfTraceTy {
std::vector<uint64_t> FunctionNameRefs;
uint64_t Weight;
TemporalProfTraceTy(std::initializer_list<uint64_t> Trace = {},
uint64_t Weight = 1)
: FunctionNameRefs(Trace), Weight(Weight) {}
/// Use a set of temporal profile traces to create a list of balanced
/// partitioning function nodes used by BalancedPartitioning to generate a
/// function order that reduces page faults during startup
static std::vector<BPFunctionNode>
createBPFunctionNodes(ArrayRef<TemporalProfTraceTy> Traces);
};
inline std::error_code make_error_code(instrprof_error E) {
return std::error_code(static_cast<int>(E), instrprof_category());
}
class InstrProfError : public ErrorInfo<InstrProfError> {
public:
InstrProfError(instrprof_error Err, const Twine &ErrStr = Twine())
: Err(Err), Msg(ErrStr.str()) {
assert(Err != instrprof_error::success && "Not an error");
}
std::string message() const override;
void log(raw_ostream &OS) const override { OS << message(); }
std::error_code convertToErrorCode() const override {
return make_error_code(Err);
}
instrprof_error get() const { return Err; }
const std::string &getMessage() const { return Msg; }
/// Consume an Error and return the raw enum value contained within it, and
/// the optional error message. The Error must either be a success value, or
/// contain a single InstrProfError.
static std::pair<instrprof_error, std::string> take(Error E) {
auto Err = instrprof_error::success;
std::string Msg = "";
handleAllErrors(std::move(E), [&Err, &Msg](const InstrProfError &IPE) {
assert(Err == instrprof_error::success && "Multiple errors encountered");
Err = IPE.get();
Msg = IPE.getMessage();
});
return {Err, Msg};
}
static char ID;
private:
instrprof_error Err;
std::string Msg;
};
namespace object {
class SectionRef;
} // end namespace object
namespace IndexedInstrProf {
uint64_t ComputeHash(StringRef K);
} // end namespace IndexedInstrProf
/// A symbol table used for function PGO name look-up with keys
/// (such as pointers, md5hash values) to the function. A function's
/// PGO name or name's md5hash are used in retrieving the profile
/// data of the function. See \c getPGOFuncName() method for details
/// on how PGO name is formed.
class InstrProfSymtab {
public:
using AddrHashMap = std::vector<std::pair<uint64_t, uint64_t>>;
private:
StringRef Data;
uint64_t Address = 0;
// Unique name strings.
StringSet<> NameTab;
// A map from MD5 keys to function name strings.
std::vector<std::pair<uint64_t, StringRef>> MD5NameMap;
// A map from MD5 keys to function define. We only populate this map
// when build the Symtab from a Module.
std::vector<std::pair<uint64_t, Function *>> MD5FuncMap;
// A map from function runtime address to function name MD5 hash.
// This map is only populated and used by raw instr profile reader.
AddrHashMap AddrToMD5Map;
bool Sorted = false;
static StringRef getExternalSymbol() {
return "** External Symbol **";
}
// If the symtab is created by a series of calls to \c addFuncName, \c
// finalizeSymtab needs to be called before looking up function names.
// This is required because the underlying map is a vector (for space
// efficiency) which needs to be sorted.
inline void finalizeSymtab();
public:
InstrProfSymtab() = default;
/// Create InstrProfSymtab from an object file section which
/// contains function PGO names. When section may contain raw
/// string data or string data in compressed form. This method
/// only initialize the symtab with reference to the data and
/// the section base address. The decompression will be delayed
/// until before it is used. See also \c create(StringRef) method.
Error create(object::SectionRef &Section);
/// This interface is used by reader of CoverageMapping test
/// format.
inline Error create(StringRef D, uint64_t BaseAddr);
/// \c NameStrings is a string composed of one of more sub-strings
/// encoded in the format described in \c collectPGOFuncNameStrings.
/// This method is a wrapper to \c readPGOFuncNameStrings method.
inline Error create(StringRef NameStrings);
/// A wrapper interface to populate the PGO symtab with functions
/// decls from module \c M. This interface is used by transformation
/// passes such as indirect function call promotion. Variable \c InLTO
/// indicates if this is called from LTO optimization passes.
Error create(Module &M, bool InLTO = false);
/// Create InstrProfSymtab from a set of names iteratable from
/// \p IterRange. This interface is used by IndexedProfReader.
template <typename NameIterRange> Error create(const NameIterRange &IterRange);
/// Update the symtab by adding \p FuncName to the table. This interface
/// is used by the raw and text profile readers.
Error addFuncName(StringRef FuncName) {
if (FuncName.empty())
return make_error<InstrProfError>(instrprof_error::malformed,
"function name is empty");
auto Ins = NameTab.insert(FuncName);
if (Ins.second) {
MD5NameMap.push_back(std::make_pair(
IndexedInstrProf::ComputeHash(FuncName), Ins.first->getKey()));
Sorted = false;
}
return Error::success();
}
/// Map a function address to its name's MD5 hash. This interface
/// is only used by the raw profiler reader.
void mapAddress(uint64_t Addr, uint64_t MD5Val) {
AddrToMD5Map.push_back(std::make_pair(Addr, MD5Val));
}
/// Return a function's hash, or 0, if the function isn't in this SymTab.
uint64_t getFunctionHashFromAddress(uint64_t Address);
/// Return function's PGO name from the function name's symbol
/// address in the object file. If an error occurs, return
/// an empty string.
StringRef getFuncName(uint64_t FuncNameAddress, size_t NameSize);
/// Return function's PGO name from the name's md5 hash value.
/// If not found, return an empty string.
inline StringRef getFuncName(uint64_t FuncMD5Hash);
/// Just like getFuncName, except that it will return a non-empty StringRef
/// if the function is external to this symbol table. All such cases
/// will be represented using the same StringRef value.
inline StringRef getFuncNameOrExternalSymbol(uint64_t FuncMD5Hash);
/// True if Symbol is the value used to represent external symbols.
static bool isExternalSymbol(const StringRef &Symbol) {
return Symbol == InstrProfSymtab::getExternalSymbol();
}
/// Return function from the name's md5 hash. Return nullptr if not found.
inline Function *getFunction(uint64_t FuncMD5Hash);
/// Return the function's original assembly name by stripping off
/// the prefix attached (to symbols with priviate linkage). For
/// global functions, it returns the same string as getFuncName.
inline StringRef getOrigFuncName(uint64_t FuncMD5Hash);
/// Return the name section data.
inline StringRef getNameData() const { return Data; }
/// Dump the symbols in this table.
void dumpNames(raw_ostream &OS) const;
};
Error InstrProfSymtab::create(StringRef D, uint64_t BaseAddr) {
Data = D;
Address = BaseAddr;
return Error::success();
}
Error InstrProfSymtab::create(StringRef NameStrings) {
return readPGOFuncNameStrings(NameStrings, *this);
}
template <typename NameIterRange>
Error InstrProfSymtab::create(const NameIterRange &IterRange) {
for (auto Name : IterRange)
if (Error E = addFuncName(Name))
return E;
finalizeSymtab();
return Error::success();
}
void InstrProfSymtab::finalizeSymtab() {
if (Sorted)
return;
llvm::sort(MD5NameMap, less_first());
llvm::sort(MD5FuncMap, less_first());
llvm::sort(AddrToMD5Map, less_first());
AddrToMD5Map.erase(std::unique(AddrToMD5Map.begin(), AddrToMD5Map.end()),
AddrToMD5Map.end());
Sorted = true;
}
StringRef InstrProfSymtab::getFuncNameOrExternalSymbol(uint64_t FuncMD5Hash) {
StringRef ret = getFuncName(FuncMD5Hash);
if (ret.empty())
return InstrProfSymtab::getExternalSymbol();
return ret;
}
StringRef InstrProfSymtab::getFuncName(uint64_t FuncMD5Hash) {
finalizeSymtab();
auto Result = llvm::lower_bound(MD5NameMap, FuncMD5Hash,
[](const std::pair<uint64_t, StringRef> &LHS,
uint64_t RHS) { return LHS.first < RHS; });
if (Result != MD5NameMap.end() && Result->first == FuncMD5Hash)
return Result->second;
return StringRef();
}
Function* InstrProfSymtab::getFunction(uint64_t FuncMD5Hash) {
finalizeSymtab();
auto Result = llvm::lower_bound(MD5FuncMap, FuncMD5Hash,
[](const std::pair<uint64_t, Function *> &LHS,
uint64_t RHS) { return LHS.first < RHS; });
if (Result != MD5FuncMap.end() && Result->first == FuncMD5Hash)
return Result->second;
return nullptr;
}
// See also getPGOFuncName implementation. These two need to be
// matched.
StringRef InstrProfSymtab::getOrigFuncName(uint64_t FuncMD5Hash) {
StringRef PGOName = getFuncName(FuncMD5Hash);
size_t S = PGOName.find_first_of(':');
if (S == StringRef::npos)
return PGOName;
return PGOName.drop_front(S + 1);
}
// To store the sums of profile count values, or the percentage of
// the sums of the total count values.
struct CountSumOrPercent {
uint64_t NumEntries;
double CountSum;
double ValueCounts[IPVK_Last - IPVK_First + 1];
CountSumOrPercent() : NumEntries(0), CountSum(0.0f), ValueCounts() {}
void reset() {
NumEntries = 0;
CountSum = 0.0f;
for (double &VC : ValueCounts)
VC = 0.0f;
}
};
// Function level or program level overlap information.
struct OverlapStats {
enum OverlapStatsLevel { ProgramLevel, FunctionLevel };
// Sum of the total count values for the base profile.
CountSumOrPercent Base;
// Sum of the total count values for the test profile.
CountSumOrPercent Test;
// Overlap lap score. Should be in range of [0.0f to 1.0f].
CountSumOrPercent Overlap;
CountSumOrPercent Mismatch;
CountSumOrPercent Unique;
OverlapStatsLevel Level;
const std::string *BaseFilename;
const std::string *TestFilename;
StringRef FuncName;
uint64_t FuncHash;
bool Valid;
OverlapStats(OverlapStatsLevel L = ProgramLevel)
: Level(L), BaseFilename(nullptr), TestFilename(nullptr), FuncHash(0),
Valid(false) {}
void dump(raw_fd_ostream &OS) const;
void setFuncInfo(StringRef Name, uint64_t Hash) {
FuncName = Name;
FuncHash = Hash;
}
Error accumulateCounts(const std::string &BaseFilename,
const std::string &TestFilename, bool IsCS);
void addOneMismatch(const CountSumOrPercent &MismatchFunc);
void addOneUnique(const CountSumOrPercent &UniqueFunc);
static inline double score(uint64_t Val1, uint64_t Val2, double Sum1,
double Sum2) {
if (Sum1 < 1.0f || Sum2 < 1.0f)
return 0.0f;
return std::min(Val1 / Sum1, Val2 / Sum2);
}
};
// This is used to filter the functions whose overlap information
// to be output.
struct OverlapFuncFilters {
uint64_t ValueCutoff;
const std::string NameFilter;
};
struct InstrProfValueSiteRecord {
/// Value profiling data pairs at a given value site.
std::list<InstrProfValueData> ValueData;
InstrProfValueSiteRecord() { ValueData.clear(); }
template <class InputIterator>
InstrProfValueSiteRecord(InputIterator F, InputIterator L)
: ValueData(F, L) {}
/// Sort ValueData ascending by Value
void sortByTargetValues() {
ValueData.sort(
[](const InstrProfValueData &left, const InstrProfValueData &right) {
return left.Value < right.Value;
});
}
/// Sort ValueData Descending by Count
inline void sortByCount();
/// Merge data from another InstrProfValueSiteRecord
/// Optionally scale merged counts by \p Weight.
void merge(InstrProfValueSiteRecord &Input, uint64_t Weight,
function_ref<void(instrprof_error)> Warn);
/// Scale up value profile data counts by N (Numerator) / D (Denominator).
void scale(uint64_t N, uint64_t D, function_ref<void(instrprof_error)> Warn);
/// Compute the overlap b/w this record and Input record.
void overlap(InstrProfValueSiteRecord &Input, uint32_t ValueKind,
OverlapStats &Overlap, OverlapStats &FuncLevelOverlap);
};
/// Profiling information for a single function.
struct InstrProfRecord {
std::vector<uint64_t> Counts;
InstrProfRecord() = default;
InstrProfRecord(std::vector<uint64_t> Counts) : Counts(std::move(Counts)) {}
InstrProfRecord(InstrProfRecord &&) = default;
InstrProfRecord(const InstrProfRecord &RHS)
: Counts(RHS.Counts),
ValueData(RHS.ValueData
? std::make_unique<ValueProfData>(*RHS.ValueData)
: nullptr) {}
InstrProfRecord &operator=(InstrProfRecord &&) = default;
InstrProfRecord &operator=(const InstrProfRecord &RHS) {
Counts = RHS.Counts;
if (!RHS.ValueData) {
ValueData = nullptr;
return *this;
}
if (!ValueData)
ValueData = std::make_unique<ValueProfData>(*RHS.ValueData);
else
*ValueData = *RHS.ValueData;
return *this;
}
/// Return the number of value profile kinds with non-zero number
/// of profile sites.
inline uint32_t getNumValueKinds() const;
/// Return the number of instrumented sites for ValueKind.
inline uint32_t getNumValueSites(uint32_t ValueKind) const;
/// Return the total number of ValueData for ValueKind.
inline uint32_t getNumValueData(uint32_t ValueKind) const;
/// Return the number of value data collected for ValueKind at profiling
/// site: Site.
inline uint32_t getNumValueDataForSite(uint32_t ValueKind,
uint32_t Site) const;
/// Return the array of profiled values at \p Site. If \p TotalC
/// is not null, the total count of all target values at this site
/// will be stored in \c *TotalC.
inline std::unique_ptr<InstrProfValueData[]>
getValueForSite(uint32_t ValueKind, uint32_t Site,
uint64_t *TotalC = nullptr) const;
/// Get the target value/counts of kind \p ValueKind collected at site
/// \p Site and store the result in array \p Dest. Return the total
/// counts of all target values at this site.
inline uint64_t getValueForSite(InstrProfValueData Dest[], uint32_t ValueKind,
uint32_t Site) const;
/// Reserve space for NumValueSites sites.
inline void reserveSites(uint32_t ValueKind, uint32_t NumValueSites);
/// Add ValueData for ValueKind at value Site.
void addValueData(uint32_t ValueKind, uint32_t Site,
InstrProfValueData *VData, uint32_t N,
InstrProfSymtab *SymTab);
/// Merge the counts in \p Other into this one.
/// Optionally scale merged counts by \p Weight.
void merge(InstrProfRecord &Other, uint64_t Weight,
function_ref<void(instrprof_error)> Warn);
/// Scale up profile counts (including value profile data) by
/// a factor of (N / D).
void scale(uint64_t N, uint64_t D, function_ref<void(instrprof_error)> Warn);
/// Sort value profile data (per site) by count.
void sortValueData() {
for (uint32_t Kind = IPVK_First; Kind <= IPVK_Last; ++Kind)
for (auto &SR : getValueSitesForKind(Kind))
SR.sortByCount();
}
/// Clear value data entries and edge counters.
void Clear() {
Counts.clear();
clearValueData();
}
/// Clear value data entries
void clearValueData() { ValueData = nullptr; }
/// Compute the sums of all counts and store in Sum.
void accumulateCounts(CountSumOrPercent &Sum) const;
/// Compute the overlap b/w this IntrprofRecord and Other.
void overlap(InstrProfRecord &Other, OverlapStats &Overlap,
OverlapStats &FuncLevelOverlap, uint64_t ValueCutoff);
/// Compute the overlap of value profile counts.
void overlapValueProfData(uint32_t ValueKind, InstrProfRecord &Src,
OverlapStats &Overlap,
OverlapStats &FuncLevelOverlap);
enum CountPseudoKind {
NotPseudo = 0,
PseudoHot,
PseudoWarm,
};
enum PseudoCountVal {
HotFunctionVal = -1,
WarmFunctionVal = -2,
};
CountPseudoKind getCountPseudoKind() const {
uint64_t FirstCount = Counts[0];
if (FirstCount == (uint64_t)HotFunctionVal)
return PseudoHot;
if (FirstCount == (uint64_t)WarmFunctionVal)
return PseudoWarm;
return NotPseudo;
}
void setPseudoCount(CountPseudoKind Kind) {
if (Kind == PseudoHot)
Counts[0] = (uint64_t)HotFunctionVal;
else if (Kind == PseudoWarm)
Counts[0] = (uint64_t)WarmFunctionVal;
}
private:
struct ValueProfData {
std::vector<InstrProfValueSiteRecord> IndirectCallSites;
std::vector<InstrProfValueSiteRecord> MemOPSizes;
};
std::unique_ptr<ValueProfData> ValueData;
MutableArrayRef<InstrProfValueSiteRecord>
getValueSitesForKind(uint32_t ValueKind) {
// Cast to /add/ const (should be an implicit_cast, ideally, if that's ever
// implemented in LLVM) to call the const overload of this function, then
// cast away the constness from the result.
auto AR = const_cast<const InstrProfRecord *>(this)->getValueSitesForKind(
ValueKind);
return MutableArrayRef(
const_cast<InstrProfValueSiteRecord *>(AR.data()), AR.size());
}
ArrayRef<InstrProfValueSiteRecord>
getValueSitesForKind(uint32_t ValueKind) const {
if (!ValueData)
return std::nullopt;
switch (ValueKind) {
case IPVK_IndirectCallTarget:
return ValueData->IndirectCallSites;
case IPVK_MemOPSize:
return ValueData->MemOPSizes;
default:
llvm_unreachable("Unknown value kind!");
}
}
std::vector<InstrProfValueSiteRecord> &
getOrCreateValueSitesForKind(uint32_t ValueKind) {
if (!ValueData)
ValueData = std::make_unique<ValueProfData>();
switch (ValueKind) {
case IPVK_IndirectCallTarget:
return ValueData->IndirectCallSites;
case IPVK_MemOPSize:
return ValueData->MemOPSizes;
default:
llvm_unreachable("Unknown value kind!");
}
}
// Map indirect call target name hash to name string.
uint64_t remapValue(uint64_t Value, uint32_t ValueKind,
InstrProfSymtab *SymTab);
// Merge Value Profile data from Src record to this record for ValueKind.
// Scale merged value counts by \p Weight.
void mergeValueProfData(uint32_t ValkeKind, InstrProfRecord &Src,
uint64_t Weight,
function_ref<void(instrprof_error)> Warn);
// Scale up value profile data count by N (Numerator) / D (Denominator).
void scaleValueProfData(uint32_t ValueKind, uint64_t N, uint64_t D,
function_ref<void(instrprof_error)> Warn);
};
struct NamedInstrProfRecord : InstrProfRecord {
StringRef Name;
uint64_t Hash;
// We reserve this bit as the flag for context sensitive profile record.
static const int CS_FLAG_IN_FUNC_HASH = 60;
NamedInstrProfRecord() = default;
NamedInstrProfRecord(StringRef Name, uint64_t Hash,
std::vector<uint64_t> Counts)
: InstrProfRecord(std::move(Counts)), Name(Name), Hash(Hash) {}
static bool hasCSFlagInHash(uint64_t FuncHash) {
return ((FuncHash >> CS_FLAG_IN_FUNC_HASH) & 1);
}
static void setCSFlagInHash(uint64_t &FuncHash) {
FuncHash |= ((uint64_t)1 << CS_FLAG_IN_FUNC_HASH);
}
};
uint32_t InstrProfRecord::getNumValueKinds() const {
uint32_t NumValueKinds = 0;
for (uint32_t Kind = IPVK_First; Kind <= IPVK_Last; ++Kind)
NumValueKinds += !(getValueSitesForKind(Kind).empty());
return NumValueKinds;
}
uint32_t InstrProfRecord::getNumValueData(uint32_t ValueKind) const {
uint32_t N = 0;
for (const auto &SR : getValueSitesForKind(ValueKind))
N += SR.ValueData.size();
return N;
}
uint32_t InstrProfRecord::getNumValueSites(uint32_t ValueKind) const {
return getValueSitesForKind(ValueKind).size();
}
uint32_t InstrProfRecord::getNumValueDataForSite(uint32_t ValueKind,
uint32_t Site) const {
return getValueSitesForKind(ValueKind)[Site].ValueData.size();
}
std::unique_ptr<InstrProfValueData[]>
InstrProfRecord::getValueForSite(uint32_t ValueKind, uint32_t Site,
uint64_t *TotalC) const {
uint64_t Dummy = 0;
uint64_t &TotalCount = (TotalC == nullptr ? Dummy : *TotalC);
uint32_t N = getNumValueDataForSite(ValueKind, Site);
if (N == 0) {
TotalCount = 0;
return std::unique_ptr<InstrProfValueData[]>(nullptr);
}
auto VD = std::make_unique<InstrProfValueData[]>(N);
TotalCount = getValueForSite(VD.get(), ValueKind, Site);
return VD;
}
uint64_t InstrProfRecord::getValueForSite(InstrProfValueData Dest[],
uint32_t ValueKind,
uint32_t Site) const {
uint32_t I = 0;
uint64_t TotalCount = 0;
for (auto V : getValueSitesForKind(ValueKind)[Site].ValueData) {
Dest[I].Value = V.Value;
Dest[I].Count = V.Count;
TotalCount = SaturatingAdd(TotalCount, V.Count);
I++;
}
return TotalCount;
}
void InstrProfRecord::reserveSites(uint32_t ValueKind, uint32_t NumValueSites) {
if (!NumValueSites)
return;
getOrCreateValueSitesForKind(ValueKind).reserve(NumValueSites);
}
inline support::endianness getHostEndianness() {
return sys::IsLittleEndianHost ? support::little : support::big;
}
// Include definitions for value profile data
#define INSTR_PROF_VALUE_PROF_DATA
#include "llvm/ProfileData/InstrProfData.inc"
void InstrProfValueSiteRecord::sortByCount() {
ValueData.sort(
[](const InstrProfValueData &left, const InstrProfValueData &right) {
return left.Count > right.Count;
});
// Now truncate
size_t max_s = INSTR_PROF_MAX_NUM_VAL_PER_SITE;
if (ValueData.size() > max_s)
ValueData.resize(max_s);
}
namespace IndexedInstrProf {
enum class HashT : uint32_t {
MD5,
Last = MD5
};
inline uint64_t ComputeHash(HashT Type, StringRef K) {
switch (Type) {
case HashT::MD5:
return MD5Hash(K);
}
llvm_unreachable("Unhandled hash type");
}
const uint64_t Magic = 0x8169666f72706cff; // "\xfflprofi\x81"
enum ProfVersion {
// Version 1 is the first version. In this version, the value of
// a key/value pair can only include profile data of a single function.
// Due to this restriction, the number of block counters for a given
// function is not recorded but derived from the length of the value.
Version1 = 1,
// The version 2 format supports recording profile data of multiple
// functions which share the same key in one value field. To support this,
// the number block counters is recorded as an uint64_t field right after the
// function structural hash.
Version2 = 2,
// Version 3 supports value profile data. The value profile data is expected
// to follow the block counter profile data.
Version3 = 3,
// In this version, profile summary data \c IndexedInstrProf::Summary is
// stored after the profile header.
Version4 = 4,
// In this version, the frontend PGO stable hash algorithm defaults to V2.
Version5 = 5,
// In this version, the frontend PGO stable hash algorithm got fixed and
// may produce hashes different from Version5.
Version6 = 6,
// An additional counter is added around logical operators.
Version7 = 7,
// An additional (optional) memory profile type is added.
Version8 = 8,
// Binary ids are added.
Version9 = 9,
// An additional (optional) temporal profile traces section is added.
Version10 = 10,
// The current version is 10.
CurrentVersion = INSTR_PROF_INDEX_VERSION
};
const uint64_t Version = ProfVersion::CurrentVersion;
const HashT HashType = HashT::MD5;
inline uint64_t ComputeHash(StringRef K) { return ComputeHash(HashType, K); }
// This structure defines the file header of the LLVM profile
// data file in indexed-format.
struct Header {
uint64_t Magic;
uint64_t Version;
uint64_t Unused; // Becomes unused since version 4
uint64_t HashType;
uint64_t HashOffset;
uint64_t MemProfOffset;
uint64_t BinaryIdOffset;
uint64_t TemporalProfTracesOffset;
// New fields should only be added at the end to ensure that the size
// computation is correct. The methods below need to be updated to ensure that
// the new field is read correctly.
// Reads a header struct from the buffer.
static Expected<Header> readFromBuffer(const unsigned char *Buffer);
// Returns the size of the header in bytes for all valid fields based on the
// version. I.e a older version header will return a smaller size.
size_t size() const;
// Returns the format version in little endian. The header retains the version
// in native endian of the compiler runtime.
uint64_t formatVersion() const;
};
// Profile summary data recorded in the profile data file in indexed
// format. It is introduced in version 4. The summary data follows
// right after the profile file header.
struct Summary {
struct Entry {
uint64_t Cutoff; ///< The required percentile of total execution count.
uint64_t
MinBlockCount; ///< The minimum execution count for this percentile.
uint64_t NumBlocks; ///< Number of blocks >= the minumum execution count.
};
// The field kind enumerator to assigned value mapping should remain
// unchanged when a new kind is added or an old kind gets deleted in
// the future.
enum SummaryFieldKind {
/// The total number of functions instrumented.
TotalNumFunctions = 0,
/// Total number of instrumented blocks/edges.
TotalNumBlocks = 1,
/// The maximal execution count among all functions.
/// This field does not exist for profile data from IR based
/// instrumentation.
MaxFunctionCount = 2,
/// Max block count of the program.
MaxBlockCount = 3,
/// Max internal block count of the program (excluding entry blocks).
MaxInternalBlockCount = 4,
/// The sum of all instrumented block counts.
TotalBlockCount = 5,
NumKinds = TotalBlockCount + 1
};
// The number of summmary fields following the summary header.
uint64_t NumSummaryFields;
// The number of Cutoff Entries (Summary::Entry) following summary fields.
uint64_t NumCutoffEntries;
Summary() = delete;
Summary(uint32_t Size) { memset(this, 0, Size); }
void operator delete(void *ptr) { ::operator delete(ptr); }
static uint32_t getSize(uint32_t NumSumFields, uint32_t NumCutoffEntries) {
return sizeof(Summary) + NumCutoffEntries * sizeof(Entry) +
NumSumFields * sizeof(uint64_t);
}
const uint64_t *getSummaryDataBase() const {
return reinterpret_cast<const uint64_t *>(this + 1);
}
uint64_t *getSummaryDataBase() {
return reinterpret_cast<uint64_t *>(this + 1);
}
const Entry *getCutoffEntryBase() const {
return reinterpret_cast<const Entry *>(
&getSummaryDataBase()[NumSummaryFields]);
}
Entry *getCutoffEntryBase() {
return reinterpret_cast<Entry *>(&getSummaryDataBase()[NumSummaryFields]);
}
uint64_t get(SummaryFieldKind K) const {
return getSummaryDataBase()[K];
}
void set(SummaryFieldKind K, uint64_t V) {
getSummaryDataBase()[K] = V;
}
const Entry &getEntry(uint32_t I) const { return getCutoffEntryBase()[I]; }
void setEntry(uint32_t I, const ProfileSummaryEntry &E) {
Entry &ER = getCutoffEntryBase()[I];
ER.Cutoff = E.Cutoff;
ER.MinBlockCount = E.MinCount;
ER.NumBlocks = E.NumCounts;
}
};
inline std::unique_ptr<Summary> allocSummary(uint32_t TotalSize) {
return std::unique_ptr<Summary>(new (::operator new(TotalSize))
Summary(TotalSize));
}
} // end namespace IndexedInstrProf
namespace RawInstrProf {
// Version 1: First version
// Version 2: Added value profile data section. Per-function control data
// struct has more fields to describe value profile information.
// Version 3: Compressed name section support. Function PGO name reference
// from control data struct is changed from raw pointer to Name's MD5 value.
// Version 4: ValueDataBegin and ValueDataSizes fields are removed from the
// raw header.
// Version 5: Bit 60 of FuncHash is reserved for the flag for the context
// sensitive records.
// Version 6: Added binary id.
// Version 7: Reorder binary id and include version in signature.
// Version 8: Use relative counter pointer.
const uint64_t Version = INSTR_PROF_RAW_VERSION;
template <class IntPtrT> inline uint64_t getMagic();
template <> inline uint64_t getMagic<uint64_t>() {
return INSTR_PROF_RAW_MAGIC_64;
}
template <> inline uint64_t getMagic<uint32_t>() {
return INSTR_PROF_RAW_MAGIC_32;
}
// Per-function profile data header/control structure.
// The definition should match the structure defined in
// compiler-rt/lib/profile/InstrProfiling.h.
// It should also match the synthesized type in
// Transforms/Instrumentation/InstrProfiling.cpp:getOrCreateRegionCounters.
template <class IntPtrT> struct alignas(8) ProfileData {
#define INSTR_PROF_DATA(Type, LLVMType, Name, Init) Type Name;
#include "llvm/ProfileData/InstrProfData.inc"
};
// File header structure of the LLVM profile data in raw format.
// The definition should match the header referenced in
// compiler-rt/lib/profile/InstrProfilingFile.c and
// InstrProfilingBuffer.c.
struct Header {
#define INSTR_PROF_RAW_HEADER(Type, Name, Init) const Type Name;
#include "llvm/ProfileData/InstrProfData.inc"
};
} // end namespace RawInstrProf
// Create the variable for the profile file name.
void createProfileFileNameVar(Module &M, StringRef InstrProfileOutput);
// Whether to compress function names in profile records, and filenames in
// code coverage mappings. Used by the Instrumentation library and unit tests.
extern cl::opt<bool> DoInstrProfNameCompression;
} // end namespace llvm
#endif // LLVM_PROFILEDATA_INSTRPROF_H
PK hwFZ�`�;� � ProfileData/RawMemProfReader.hnu �[��� #ifndef LLVM_PROFILEDATA_RAWMEMPROFREADER_H_
#define LLVM_PROFILEDATA_RAWMEMPROFREADER_H_
//===- MemProfReader.h - Instrumented memory profiling reader ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains support for reading MemProf profiling data.
//
//===----------------------------------------------------------------------===//
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/MapVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/Symbolize/SymbolizableModule.h"
#include "llvm/DebugInfo/Symbolize/Symbolize.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/Object/Binary.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/ProfileData/InstrProfReader.h"
#include "llvm/ProfileData/MemProf.h"
#include "llvm/ProfileData/MemProfData.inc"
#include "llvm/Support/Error.h"
#include "llvm/Support/MemoryBuffer.h"
#include <cstddef>
namespace llvm {
namespace memprof {
// Map from id (recorded from sanitizer stack depot) to virtual addresses for
// each program counter address in the callstack.
using CallStackMap = llvm::DenseMap<uint64_t, llvm::SmallVector<uint64_t>>;
class RawMemProfReader {
public:
RawMemProfReader(const RawMemProfReader &) = delete;
RawMemProfReader &operator=(const RawMemProfReader &) = delete;
// Prints the contents of the profile in YAML format.
void printYAML(raw_ostream &OS);
// Return true if the \p DataBuffer starts with magic bytes indicating it is
// a raw binary memprof profile.
static bool hasFormat(const MemoryBuffer &DataBuffer);
// Return true if the file at \p Path starts with magic bytes indicating it is
// a raw binary memprof profile.
static bool hasFormat(const StringRef Path);
// Create a RawMemProfReader after sanity checking the contents of the file at
// \p Path or the \p Buffer. The binary from which the profile has been
// collected is specified via a path in \p ProfiledBinary.
static Expected<std::unique_ptr<RawMemProfReader>>
create(const Twine &Path, StringRef ProfiledBinary, bool KeepName = false);
static Expected<std::unique_ptr<RawMemProfReader>>
create(std::unique_ptr<MemoryBuffer> Buffer, StringRef ProfiledBinary,
bool KeepName = false);
// Returns a list of build ids recorded in the segment information.
static std::vector<std::string> peekBuildIds(MemoryBuffer *DataBuffer);
using GuidMemProfRecordPair = std::pair<GlobalValue::GUID, MemProfRecord>;
using Iterator = InstrProfIterator<GuidMemProfRecordPair, RawMemProfReader>;
Iterator end() { return Iterator(); }
Iterator begin() {
Iter = FunctionProfileData.begin();
return Iterator(this);
}
Error readNextRecord(GuidMemProfRecordPair &GuidRecord);
// The RawMemProfReader only holds memory profile information.
InstrProfKind getProfileKind() const { return InstrProfKind::MemProf; }
// Constructor for unittests only.
RawMemProfReader(std::unique_ptr<llvm::symbolize::SymbolizableModule> Sym,
llvm::SmallVectorImpl<SegmentEntry> &Seg,
llvm::MapVector<uint64_t, MemInfoBlock> &Prof,
CallStackMap &SM, bool KeepName = false)
: Symbolizer(std::move(Sym)), SegmentInfo(Seg.begin(), Seg.end()),
CallstackProfileData(Prof), StackMap(SM), KeepSymbolName(KeepName) {
// We don't call initialize here since there is no raw profile to read. The
// test should pass in the raw profile as structured data.
// If there is an error here then the mock symbolizer has not been
// initialized properly.
if (Error E = symbolizeAndFilterStackFrames())
report_fatal_error(std::move(E));
if (Error E = mapRawProfileToRecords())
report_fatal_error(std::move(E));
}
// Return a const reference to the internal Id to Frame mappings.
const llvm::DenseMap<FrameId, Frame> &getFrameMapping() const {
return IdToFrame;
}
// Return a const reference to the internal function profile data.
const llvm::MapVector<GlobalValue::GUID, IndexedMemProfRecord> &
getProfileData() const {
return FunctionProfileData;
}
private:
RawMemProfReader(object::OwningBinary<object::Binary> &&Bin, bool KeepName)
: Binary(std::move(Bin)), KeepSymbolName(KeepName) {}
// Initializes the RawMemProfReader with the contents in `DataBuffer`.
Error initialize(std::unique_ptr<MemoryBuffer> DataBuffer);
// Read and parse the contents of the `DataBuffer` as a binary format profile.
Error readRawProfile(std::unique_ptr<MemoryBuffer> DataBuffer);
// Initialize the segment mapping information for symbolization.
Error setupForSymbolization();
// Symbolize and cache all the virtual addresses we encounter in the
// callstacks from the raw profile. Also prune callstack frames which we can't
// symbolize or those that belong to the runtime. For profile entries where
// the entire callstack is pruned, we drop the entry from the profile.
Error symbolizeAndFilterStackFrames();
// Construct memprof records for each function and store it in the
// `FunctionProfileData` map. A function may have allocation profile data or
// callsite data or both.
Error mapRawProfileToRecords();
// A helper method to extract the frame from the IdToFrame map.
const Frame &idToFrame(const FrameId Id) const {
auto It = IdToFrame.find(Id);
assert(It != IdToFrame.end() && "Id not found in map.");
return It->getSecond();
}
object::SectionedAddress getModuleOffset(uint64_t VirtualAddress);
// The profiled binary.
object::OwningBinary<object::Binary> Binary;
// A symbolizer to translate virtual addresses to code locations.
std::unique_ptr<llvm::symbolize::SymbolizableModule> Symbolizer;
// The preferred load address of the executable segment.
uint64_t PreferredTextSegmentAddress = 0;
// The base address of the text segment in the process during profiling.
uint64_t ProfiledTextSegmentStart = 0;
// The limit address of the text segment in the process during profiling.
uint64_t ProfiledTextSegmentEnd = 0;
// The memory mapped segment information for all executable segments in the
// profiled binary (filtered from the raw profile using the build id).
llvm::SmallVector<SegmentEntry, 2> SegmentInfo;
// A map from callstack id (same as key in CallStackMap below) to the heap
// information recorded for that allocation context.
llvm::MapVector<uint64_t, MemInfoBlock> CallstackProfileData;
CallStackMap StackMap;
// Cached symbolization from PC to Frame.
llvm::DenseMap<uint64_t, llvm::SmallVector<FrameId>> SymbolizedFrame;
llvm::DenseMap<FrameId, Frame> IdToFrame;
llvm::MapVector<GlobalValue::GUID, IndexedMemProfRecord> FunctionProfileData;
llvm::MapVector<GlobalValue::GUID, IndexedMemProfRecord>::iterator Iter;
// Whether to keep the symbol name for each frame after hashing.
bool KeepSymbolName = false;
// A mapping of the hash to symbol name, only used if KeepSymbolName is true.
llvm::DenseMap<uint64_t, std::string> GuidToSymbolName;
};
} // namespace memprof
} // namespace llvm
#endif // LLVM_PROFILEDATA_RAWMEMPROFREADER_H_
PK hwFZ,��@� � * ProfileData/ItaniumManglingCanonicalizer.hnu �[��� //===--- ItaniumManglingCanonicalizer.h -------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines a class for computing equivalence classes of mangled names
// given a set of equivalences between name fragments.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_PROFILEDATA_ITANIUMMANGLINGCANONICALIZER_H
#define LLVM_PROFILEDATA_ITANIUMMANGLINGCANONICALIZER_H
#include <cstdint>
namespace llvm {
class StringRef;
/// Canonicalizer for mangled names.
///
/// This class allows specifying a list of "equivalent" manglings. For example,
/// you can specify that Ss is equivalent to
/// NSt3__112basic_stringIcNS_11char_traitsIcEENS_9allocatorIcEEEE
/// and then manglings that refer to libstdc++'s 'std::string' will be
/// considered equivalent to manglings that are the same except that they refer
/// to libc++'s 'std::string'.
///
/// This can be used when data (eg, profiling data) is available for a version
/// of a program built in a different configuration, with correspondingly
/// different manglings.
class ItaniumManglingCanonicalizer {
public:
ItaniumManglingCanonicalizer();
ItaniumManglingCanonicalizer(const ItaniumManglingCanonicalizer &) = delete;
void operator=(const ItaniumManglingCanonicalizer &) = delete;
~ItaniumManglingCanonicalizer();
enum class EquivalenceError {
Success,
/// Both the equivalent manglings have already been used as components of
/// some other mangling we've looked at. It's too late to add this
/// equivalence.
ManglingAlreadyUsed,
/// The first equivalent mangling is invalid.
InvalidFirstMangling,
/// The second equivalent mangling is invalid.
InvalidSecondMangling,
};
enum class FragmentKind {
/// The mangling fragment is a <name> (or a predefined <substitution>).
Name,
/// The mangling fragment is a <type>.
Type,
/// The mangling fragment is an <encoding>.
Encoding,
};
/// Add an equivalence between \p First and \p Second. Both manglings must
/// live at least as long as the canonicalizer.
EquivalenceError addEquivalence(FragmentKind Kind, StringRef First,
StringRef Second);
using Key = uintptr_t;
/// Form a canonical key for the specified mangling. They key will be the
/// same for all equivalent manglings, and different for any two
/// non-equivalent manglings, but is otherwise unspecified.
///
/// Returns Key() if (and only if) the mangling is not a valid Itanium C++
/// ABI mangling.
///
/// The string denoted by Mangling must live as long as the canonicalizer.
Key canonicalize(StringRef Mangling);
/// Find a canonical key for the specified mangling, if one has already been
/// formed. Otherwise returns Key().
Key lookup(StringRef Mangling);
private:
struct Impl;
Impl *P;
};
} // namespace llvm
#endif // LLVM_PROFILEDATA_ITANIUMMANGLINGCANONICALIZER_H
PK hwFZ����6 �6 Pass.hnu �[��� //===- llvm/Pass.h - Base class for Passes ----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines a base class that indicates that a specified class is a
// transformation pass implementation.
//
// Passes are designed this way so that it is possible to run passes in a cache
// and organizationally optimal order without having to specify it at the front
// end. This allows arbitrary passes to be strung together and have them
// executed as efficiently as possible.
//
// Passes should extend one of the classes below, depending on the guarantees
// that it can make about what will be modified as it is run. For example, most
// global optimizations should derive from FunctionPass, because they do not add
// or delete functions, they operate on the internals of the function.
//
// Note that this file #includes PassSupport.h and PassAnalysisSupport.h (at the
// bottom), so the APIs exposed by these files are also automatically available
// to all users of this file.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_PASS_H
#define LLVM_PASS_H
#ifdef EXPENSIVE_CHECKS
#include <cstdint>
#endif
#include <string>
namespace llvm {
class AnalysisResolver;
class AnalysisUsage;
class Function;
class ImmutablePass;
class Module;
class PassInfo;
class PMDataManager;
class PMStack;
class raw_ostream;
class StringRef;
// AnalysisID - Use the PassInfo to identify a pass...
using AnalysisID = const void *;
/// Different types of internal pass managers. External pass managers
/// (PassManager and FunctionPassManager) are not represented here.
/// Ordering of pass manager types is important here.
enum PassManagerType {
PMT_Unknown = 0,
PMT_ModulePassManager = 1, ///< MPPassManager
PMT_CallGraphPassManager, ///< CGPassManager
PMT_FunctionPassManager, ///< FPPassManager
PMT_LoopPassManager, ///< LPPassManager
PMT_RegionPassManager, ///< RGPassManager
PMT_Last
};
// Different types of passes.
enum PassKind {
PT_Region,
PT_Loop,
PT_Function,
PT_CallGraphSCC,
PT_Module,
PT_PassManager
};
/// This enumerates the LLVM full LTO or ThinLTO optimization phases.
enum class ThinOrFullLTOPhase {
/// No LTO/ThinLTO behavior needed.
None,
/// ThinLTO prelink (summary) phase.
ThinLTOPreLink,
/// ThinLTO postlink (backend compile) phase.
ThinLTOPostLink,
/// Full LTO prelink phase.
FullLTOPreLink,
/// Full LTO postlink (backend compile) phase.
FullLTOPostLink
};
//===----------------------------------------------------------------------===//
/// Pass interface - Implemented by all 'passes'. Subclass this if you are an
/// interprocedural optimization or you do not fit into any of the more
/// constrained passes described below.
///
class Pass {
AnalysisResolver *Resolver = nullptr; // Used to resolve analysis
const void *PassID;
PassKind Kind;
public:
explicit Pass(PassKind K, char &pid) : PassID(&pid), Kind(K) {}
Pass(const Pass &) = delete;
Pass &operator=(const Pass &) = delete;
virtual ~Pass();
PassKind getPassKind() const { return Kind; }
/// getPassName - Return a nice clean name for a pass. This usually
/// implemented in terms of the name that is registered by one of the
/// Registration templates, but can be overloaded directly.
virtual StringRef getPassName() const;
/// getPassID - Return the PassID number that corresponds to this pass.
AnalysisID getPassID() const {
return PassID;
}
/// doInitialization - Virtual method overridden by subclasses to do
/// any necessary initialization before any pass is run.
virtual bool doInitialization(Module &) { return false; }
/// doFinalization - Virtual method overriden by subclasses to do any
/// necessary clean up after all passes have run.
virtual bool doFinalization(Module &) { return false; }
/// print - Print out the internal state of the pass. This is called by
/// Analyze to print out the contents of an analysis. Otherwise it is not
/// necessary to implement this method. Beware that the module pointer MAY be
/// null. This automatically forwards to a virtual function that does not
/// provide the Module* in case the analysis doesn't need it it can just be
/// ignored.
virtual void print(raw_ostream &OS, const Module *M) const;
void dump() const; // dump - Print to stderr.
/// createPrinterPass - Get a Pass appropriate to print the IR this
/// pass operates on (Module, Function or MachineFunction).
virtual Pass *createPrinterPass(raw_ostream &OS,
const std::string &Banner) const = 0;
/// Each pass is responsible for assigning a pass manager to itself.
/// PMS is the stack of available pass manager.
virtual void assignPassManager(PMStack &,
PassManagerType) {}
/// Check if available pass managers are suitable for this pass or not.
virtual void preparePassManager(PMStack &);
/// Return what kind of Pass Manager can manage this pass.
virtual PassManagerType getPotentialPassManagerType() const;
// Access AnalysisResolver
void setResolver(AnalysisResolver *AR);
AnalysisResolver *getResolver() const { return Resolver; }
/// getAnalysisUsage - This function should be overriden by passes that need
/// analysis information to do their job. If a pass specifies that it uses a
/// particular analysis result to this function, it can then use the
/// getAnalysis<AnalysisType>() function, below.
virtual void getAnalysisUsage(AnalysisUsage &) const;
/// releaseMemory() - This member can be implemented by a pass if it wants to
/// be able to release its memory when it is no longer needed. The default
/// behavior of passes is to hold onto memory for the entire duration of their
/// lifetime (which is the entire compile time). For pipelined passes, this
/// is not a big deal because that memory gets recycled every time the pass is
/// invoked on another program unit. For IP passes, it is more important to
/// free memory when it is unused.
///
/// Optionally implement this function to release pass memory when it is no
/// longer used.
virtual void releaseMemory();
/// getAdjustedAnalysisPointer - This method is used when a pass implements
/// an analysis interface through multiple inheritance. If needed, it should
/// override this to adjust the this pointer as needed for the specified pass
/// info.
virtual void *getAdjustedAnalysisPointer(AnalysisID ID);
virtual ImmutablePass *getAsImmutablePass();
virtual PMDataManager *getAsPMDataManager();
/// verifyAnalysis() - This member can be implemented by a analysis pass to
/// check state of analysis information.
virtual void verifyAnalysis() const;
// dumpPassStructure - Implement the -debug-passes=PassStructure option
virtual void dumpPassStructure(unsigned Offset = 0);
// lookupPassInfo - Return the pass info object for the specified pass class,
// or null if it is not known.
static const PassInfo *lookupPassInfo(const void *TI);
// lookupPassInfo - Return the pass info object for the pass with the given
// argument string, or null if it is not known.
static const PassInfo *lookupPassInfo(StringRef Arg);
// createPass - Create a object for the specified pass class,
// or null if it is not known.
static Pass *createPass(AnalysisID ID);
/// getAnalysisIfAvailable<AnalysisType>() - Subclasses use this function to
/// get analysis information that might be around, for example to update it.
/// This is different than getAnalysis in that it can fail (if the analysis
/// results haven't been computed), so should only be used if you can handle
/// the case when the analysis is not available. This method is often used by
/// transformation APIs to update analysis results for a pass automatically as
/// the transform is performed.
template<typename AnalysisType> AnalysisType *
getAnalysisIfAvailable() const; // Defined in PassAnalysisSupport.h
/// mustPreserveAnalysisID - This method serves the same function as
/// getAnalysisIfAvailable, but works if you just have an AnalysisID. This
/// obviously cannot give you a properly typed instance of the class if you
/// don't have the class name available (use getAnalysisIfAvailable if you
/// do), but it can tell you if you need to preserve the pass at least.
bool mustPreserveAnalysisID(char &AID) const;
/// getAnalysis<AnalysisType>() - This function is used by subclasses to get
/// to the analysis information that they claim to use by overriding the
/// getAnalysisUsage function.
template<typename AnalysisType>
AnalysisType &getAnalysis() const; // Defined in PassAnalysisSupport.h
template <typename AnalysisType>
AnalysisType &
getAnalysis(Function &F,
bool *Changed = nullptr); // Defined in PassAnalysisSupport.h
template<typename AnalysisType>
AnalysisType &getAnalysisID(AnalysisID PI) const;
template <typename AnalysisType>
AnalysisType &getAnalysisID(AnalysisID PI, Function &F,
bool *Changed = nullptr);
#ifdef EXPENSIVE_CHECKS
/// Hash a module in order to detect when a module (or more specific) pass has
/// modified it.
uint64_t structuralHash(Module &M) const;
/// Hash a function in order to detect when a function (or more specific) pass
/// has modified it.
virtual uint64_t structuralHash(Function &F) const;
#endif
};
//===----------------------------------------------------------------------===//
/// ModulePass class - This class is used to implement unstructured
/// interprocedural optimizations and analyses. ModulePasses may do anything
/// they want to the program.
///
class ModulePass : public Pass {
public:
explicit ModulePass(char &pid) : Pass(PT_Module, pid) {}
// Force out-of-line virtual method.
~ModulePass() override;
/// createPrinterPass - Get a module printer pass.
Pass *createPrinterPass(raw_ostream &OS,
const std::string &Banner) const override;
/// runOnModule - Virtual method overriden by subclasses to process the module
/// being operated on.
virtual bool runOnModule(Module &M) = 0;
void assignPassManager(PMStack &PMS, PassManagerType T) override;
/// Return what kind of Pass Manager can manage this pass.
PassManagerType getPotentialPassManagerType() const override;
protected:
/// Optional passes call this function to check whether the pass should be
/// skipped. This is the case when optimization bisect is over the limit.
bool skipModule(Module &M) const;
};
//===----------------------------------------------------------------------===//
/// ImmutablePass class - This class is used to provide information that does
/// not need to be run. This is useful for things like target information and
/// "basic" versions of AnalysisGroups.
///
class ImmutablePass : public ModulePass {
public:
explicit ImmutablePass(char &pid) : ModulePass(pid) {}
// Force out-of-line virtual method.
~ImmutablePass() override;
/// initializePass - This method may be overriden by immutable passes to allow
/// them to perform various initialization actions they require. This is
/// primarily because an ImmutablePass can "require" another ImmutablePass,
/// and if it does, the overloaded version of initializePass may get access to
/// these passes with getAnalysis<>.
virtual void initializePass();
ImmutablePass *getAsImmutablePass() override { return this; }
/// ImmutablePasses are never run.
bool runOnModule(Module &) override { return false; }
};
//===----------------------------------------------------------------------===//
/// FunctionPass class - This class is used to implement most global
/// optimizations. Optimizations should subclass this class if they meet the
/// following constraints:
///
/// 1. Optimizations are organized globally, i.e., a function at a time
/// 2. Optimizing a function does not cause the addition or removal of any
/// functions in the module
///
class FunctionPass : public Pass {
public:
explicit FunctionPass(char &pid) : Pass(PT_Function, pid) {}
/// createPrinterPass - Get a function printer pass.
Pass *createPrinterPass(raw_ostream &OS,
const std::string &Banner) const override;
/// runOnFunction - Virtual method overriden by subclasses to do the
/// per-function processing of the pass.
virtual bool runOnFunction(Function &F) = 0;
void assignPassManager(PMStack &PMS, PassManagerType T) override;
/// Return what kind of Pass Manager can manage this pass.
PassManagerType getPotentialPassManagerType() const override;
protected:
/// Optional passes call this function to check whether the pass should be
/// skipped. This is the case when Attribute::OptimizeNone is set or when
/// optimization bisect is over the limit.
bool skipFunction(const Function &F) const;
};
/// If the user specifies the -time-passes argument on an LLVM tool command line
/// then the value of this boolean will be true, otherwise false.
/// This is the storage for the -time-passes option.
extern bool TimePassesIsEnabled;
/// If TimePassesPerRun is true, there would be one line of report for
/// each pass invocation.
/// If TimePassesPerRun is false, there would be only one line of
/// report for each pass (even there are more than one pass objects).
/// (For new pass manager only)
extern bool TimePassesPerRun;
} // end namespace llvm
// Include support files that contain important APIs commonly used by Passes,
// but that we want to separate out to make it easier to read the header files.
#include "llvm/PassAnalysisSupport.h"
#include "llvm/PassSupport.h"
#endif // LLVM_PASS_H
PK hwFZ�O��
Support/UnicodeCharRanges.hnu �[��� //===--- UnicodeCharRanges.h - Types and functions for character ranges ---===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_UNICODECHARRANGES_H
#define LLVM_SUPPORT_UNICODECHARRANGES_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#define DEBUG_TYPE "unicode"
namespace llvm {
namespace sys {
/// Represents a closed range of Unicode code points [Lower, Upper].
struct UnicodeCharRange {
uint32_t Lower;
uint32_t Upper;
};
inline bool operator<(uint32_t Value, UnicodeCharRange Range) {
return Value < Range.Lower;
}
inline bool operator<(UnicodeCharRange Range, uint32_t Value) {
return Range.Upper < Value;
}
/// Holds a reference to an ordered array of UnicodeCharRange and allows
/// to quickly check if a code point is contained in the set represented by this
/// array.
class UnicodeCharSet {
public:
typedef ArrayRef<UnicodeCharRange> CharRanges;
/// Constructs a UnicodeCharSet instance from an array of
/// UnicodeCharRanges.
///
/// Array pointed by \p Ranges should have the lifetime at least as long as
/// the UnicodeCharSet instance, and should not change. Array is validated by
/// the constructor, so it makes sense to create as few UnicodeCharSet
/// instances per each array of ranges, as possible.
#ifdef NDEBUG
// FIXME: This could use constexpr + static_assert. This way we
// may get rid of NDEBUG in this header. Unfortunately there are some
// problems to get this working with MSVC 2013. Change this when
// the support for MSVC 2013 is dropped.
constexpr UnicodeCharSet(CharRanges Ranges) : Ranges(Ranges) {}
#else
UnicodeCharSet(CharRanges Ranges) : Ranges(Ranges) {
assert(rangesAreValid());
}
#endif
/// Returns true if the character set contains the Unicode code point
/// \p C.
bool contains(uint32_t C) const {
return std::binary_search(Ranges.begin(), Ranges.end(), C);
}
private:
/// Returns true if each of the ranges is a proper closed range
/// [min, max], and if the ranges themselves are ordered and non-overlapping.
bool rangesAreValid() const {
uint32_t Prev = 0;
for (CharRanges::const_iterator I = Ranges.begin(), E = Ranges.end();
I != E; ++I) {
if (I != Ranges.begin() && Prev >= I->Lower) {
LLVM_DEBUG(dbgs() << "Upper bound 0x");
LLVM_DEBUG(dbgs().write_hex(Prev));
LLVM_DEBUG(dbgs() << " should be less than succeeding lower bound 0x");
LLVM_DEBUG(dbgs().write_hex(I->Lower) << "\n");
return false;
}
if (I->Upper < I->Lower) {
LLVM_DEBUG(dbgs() << "Upper bound 0x");
LLVM_DEBUG(dbgs().write_hex(I->Lower));
LLVM_DEBUG(dbgs() << " should not be less than lower bound 0x");
LLVM_DEBUG(dbgs().write_hex(I->Upper) << "\n");
return false;
}
Prev = I->Upper;
}
return true;
}
const CharRanges Ranges;
};
} // namespace sys
} // namespace llvm
#undef DEBUG_TYPE // "unicode"
#endif // LLVM_SUPPORT_UNICODECHARRANGES_H
PK hwFZ檞� Support/MSP430Attributes.hnu �[��� //===-- MSP430Attributes.h - MSP430 Attributes ------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===-----------------------------------------------------------------------===//
///
/// \file
/// This file contains enumerations for MSP430 ELF build attributes as
/// defined in the MSP430 ELF psABI specification.
///
/// MSP430 ELF psABI specification
///
/// https://www.ti.com/lit/pdf/slaa534
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_MSP430ATTRIBUTES_H
#define LLVM_SUPPORT_MSP430ATTRIBUTES_H
#include "llvm/Support/ELFAttributes.h"
namespace llvm {
namespace MSP430Attrs {
const TagNameMap &getMSP430AttributeTags();
enum AttrType : unsigned {
// Attribute types in ELF/.MSP430.attributes.
TagISA = 4,
TagCodeModel = 6,
TagDataModel = 8,
TagEnumSize = 10
};
enum ISA { ISAMSP430 = 1, ISAMSP430X = 2 };
enum CodeModel { CMSmall = 1, CMLarge = 2 };
enum DataModel { DMSmall = 1, DMLarge = 2, DMRestricted = 3 };
enum EnumSize { ESSmall = 1, ESInteger = 2, ESDontCare = 3 };
} // namespace MSP430Attrs
} // namespace llvm
#endif
PK hwFZ=3�z� � Support/Locale.hnu �[��� #ifndef LLVM_SUPPORT_LOCALE_H
#define LLVM_SUPPORT_LOCALE_H
namespace llvm {
class StringRef;
namespace sys {
namespace locale {
int columnWidth(StringRef s);
bool isPrint(int c);
}
}
}
#endif // LLVM_SUPPORT_LOCALE_H
PK hwFZ #�, �, Support/Program.hnu �[��� //===- llvm/Support/Program.h ------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the llvm::sys::Program class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_PROGRAM_H
#define LLVM_SUPPORT_PROGRAM_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/Support/ErrorOr.h"
#include "llvm/Support/FileSystem.h"
#include <chrono>
#include <optional>
#include <system_error>
namespace llvm {
class BitVector;
namespace sys {
/// This is the OS-specific separator for PATH like environment variables:
// a colon on Unix or a semicolon on Windows.
#if defined(LLVM_ON_UNIX)
const char EnvPathSeparator = ':';
#elif defined (_WIN32)
const char EnvPathSeparator = ';';
#endif
#if defined(_WIN32)
typedef unsigned long procid_t; // Must match the type of DWORD on Windows.
typedef void *process_t; // Must match the type of HANDLE on Windows.
#else
typedef ::pid_t procid_t;
typedef procid_t process_t;
#endif
/// This struct encapsulates information about a process.
struct ProcessInfo {
enum : procid_t { InvalidPid = 0 };
procid_t Pid; /// The process identifier.
process_t Process; /// Platform-dependent process object.
/// The return code, set after execution.
int ReturnCode;
ProcessInfo();
};
/// This struct encapsulates information about a process execution.
struct ProcessStatistics {
std::chrono::microseconds TotalTime;
std::chrono::microseconds UserTime;
uint64_t PeakMemory = 0; ///< Maximum resident set size in KiB.
};
/// Find the first executable file \p Name in \p Paths.
///
/// This does not perform hashing as a shell would but instead stats each PATH
/// entry individually so should generally be avoided. Core LLVM library
/// functions and options should instead require fully specified paths.
///
/// \param Name name of the executable to find. If it contains any system
/// slashes, it will be returned as is.
/// \param Paths optional list of paths to search for \p Name. If empty it
/// will use the system PATH environment instead.
///
/// \returns The fully qualified path to the first \p Name in \p Paths if it
/// exists. \p Name if \p Name has slashes in it. Otherwise an error.
ErrorOr<std::string>
findProgramByName(StringRef Name, ArrayRef<StringRef> Paths = {});
// These functions change the specified standard stream (stdin or stdout) mode
// based on the Flags. They return errc::success if the specified stream was
// changed. Otherwise, a platform dependent error is returned.
std::error_code ChangeStdinMode(fs::OpenFlags Flags);
std::error_code ChangeStdoutMode(fs::OpenFlags Flags);
// These functions change the specified standard stream (stdin or stdout) to
// binary mode. They return errc::success if the specified stream
// was changed. Otherwise a platform dependent error is returned.
std::error_code ChangeStdinToBinary();
std::error_code ChangeStdoutToBinary();
/// This function executes the program using the arguments provided. The
/// invoked program will inherit the stdin, stdout, and stderr file
/// descriptors, the environment and other configuration settings of the
/// invoking program.
/// This function waits for the program to finish, so should be avoided in
/// library functions that aren't expected to block. Consider using
/// ExecuteNoWait() instead.
/// \returns an integer result code indicating the status of the program.
/// A zero or positive value indicates the result code of the program.
/// -1 indicates failure to execute
/// -2 indicates a crash during execution or timeout
int ExecuteAndWait(
StringRef Program, ///< Path of the program to be executed. It is
///< presumed this is the result of the findProgramByName method.
ArrayRef<StringRef> Args, ///< An array of strings that are passed to the
///< program. The first element should be the name of the program.
///< The array should **not** be terminated by an empty StringRef.
std::optional<ArrayRef<StringRef>> Env =
std::nullopt, ///< An optional vector of
///< strings to use for the program's environment. If not provided, the
///< current program's environment will be used. If specified, the
///< vector should **not** be terminated by an empty StringRef.
ArrayRef<std::optional<StringRef>> Redirects = {}, ///<
///< An array of optional paths. Should have a size of zero or three.
///< If the array is empty, no redirections are performed.
///< Otherwise, the inferior process's stdin(0), stdout(1), and stderr(2)
///< will be redirected to the corresponding paths, if the optional path
///< is present (not \c std::nullopt).
///< When an empty path is passed in, the corresponding file descriptor
///< will be disconnected (ie, /dev/null'd) in a portable way.
unsigned SecondsToWait = 0, ///< If non-zero, this specifies the amount
///< of time to wait for the child process to exit. If the time
///< expires, the child is killed and this call returns. If zero,
///< this function will wait until the child finishes or forever if
///< it doesn't.
unsigned MemoryLimit = 0, ///< If non-zero, this specifies max. amount
///< of memory can be allocated by process. If memory usage will be
///< higher limit, the child is killed and this call returns. If zero
///< - no memory limit.
std::string *ErrMsg = nullptr, ///< If non-zero, provides a pointer to a
///< string instance in which error messages will be returned. If the
///< string is non-empty upon return an error occurred while invoking the
///< program.
bool *ExecutionFailed = nullptr,
std::optional<ProcessStatistics> *ProcStat = nullptr, ///< If non-zero,
/// provides a pointer to a structure in which process execution
/// statistics will be stored.
BitVector *AffinityMask = nullptr ///< CPUs or processors the new
/// program shall run on.
);
/// Similar to ExecuteAndWait, but returns immediately.
/// @returns The \see ProcessInfo of the newly launched process.
/// \note On Microsoft Windows systems, users will need to either call
/// \see Wait until the process finished execution or win32 CloseHandle() API
/// on ProcessInfo.ProcessHandle to avoid memory leaks.
ProcessInfo ExecuteNoWait(StringRef Program, ArrayRef<StringRef> Args,
std::optional<ArrayRef<StringRef>> Env,
ArrayRef<std::optional<StringRef>> Redirects = {},
unsigned MemoryLimit = 0,
std::string *ErrMsg = nullptr,
bool *ExecutionFailed = nullptr,
BitVector *AffinityMask = nullptr);
/// Return true if the given arguments fit within system-specific
/// argument length limits.
bool commandLineFitsWithinSystemLimits(StringRef Program,
ArrayRef<StringRef> Args);
/// Return true if the given arguments fit within system-specific
/// argument length limits.
bool commandLineFitsWithinSystemLimits(StringRef Program,
ArrayRef<const char *> Args);
/// File encoding options when writing contents that a non-UTF8 tool will
/// read (on Windows systems). For UNIX, we always use UTF-8.
enum WindowsEncodingMethod {
/// UTF-8 is the LLVM native encoding, being the same as "do not perform
/// encoding conversion".
WEM_UTF8,
WEM_CurrentCodePage,
WEM_UTF16
};
/// Saves the UTF8-encoded \p contents string into the file \p FileName
/// using a specific encoding.
///
/// This write file function adds the possibility to choose which encoding
/// to use when writing a text file. On Windows, this is important when
/// writing files with internationalization support with an encoding that is
/// different from the one used in LLVM (UTF-8). We use this when writing
/// response files, since GCC tools on MinGW only understand legacy code
/// pages, and VisualStudio tools only understand UTF-16.
/// For UNIX, using different encodings is silently ignored, since all tools
/// work well with UTF-8.
/// This function assumes that you only use UTF-8 *text* data and will convert
/// it to your desired encoding before writing to the file.
///
/// FIXME: We use EM_CurrentCodePage to write response files for GNU tools in
/// a MinGW/MinGW-w64 environment, which has serious flaws but currently is
/// our best shot to make gcc/ld understand international characters. This
/// should be changed as soon as binutils fix this to support UTF16 on mingw.
///
/// \returns non-zero error_code if failed
std::error_code
writeFileWithEncoding(StringRef FileName, StringRef Contents,
WindowsEncodingMethod Encoding = WEM_UTF8);
/// This function waits for the process specified by \p PI to finish.
/// \returns A \see ProcessInfo struct with Pid set to:
/// \li The process id of the child process if the child process has changed
/// state.
/// \li 0 if the child process has not changed state.
/// \note Users of this function should always check the ReturnCode member of
/// the \see ProcessInfo returned from this function.
ProcessInfo
Wait(const ProcessInfo &PI, ///< The child process that should be waited on.
std::optional<unsigned> SecondsToWait, ///< If std::nullopt, waits until
///< child has terminated.
///< If a value, this specifies the amount of time to wait for the child
///< process. If the time expires, and \p Polling is false, the child is
///< killed and this < function returns. If the time expires and \p
///< Polling is true, the child is resumed.
///<
///< If zero, this function will perform a non-blocking
///< wait on the child process.
std::string *ErrMsg = nullptr, ///< If non-zero, provides a pointer to a
///< string instance in which error messages will be returned. If the
///< string is non-empty upon return an error occurred while invoking the
///< program.
std::optional<ProcessStatistics> *ProcStat =
nullptr, ///< If non-zero, provides
/// a pointer to a structure in which process execution statistics will
/// be stored.
bool Polling = false ///< If true, do not kill the process on timeout.
);
/// Print a command argument, and optionally quote it.
void printArg(llvm::raw_ostream &OS, StringRef Arg, bool Quote);
#if defined(_WIN32)
/// Given a list of command line arguments, quote and escape them as necessary
/// to build a single flat command line appropriate for calling CreateProcess
/// on
/// Windows.
ErrorOr<std::wstring> flattenWindowsCommandLine(ArrayRef<StringRef> Args);
#endif
}
}
#endif
PK hwFZ2�IL L Support/Solaris/sys/regset.hnu �[��� /*===- llvm/Support/Solaris/sys/regset.h ------------------------*- C++ -*-===*
*
* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
* See https://llvm.org/LICENSE.txt for license information.
* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
*
*===----------------------------------------------------------------------===*
*
* This file works around excessive name space pollution from the system header
* on Solaris hosts.
*
*===----------------------------------------------------------------------===*/
#ifndef LLVM_SUPPORT_SOLARIS_SYS_REGSET_H
#include_next <sys/regset.h>
#undef CS
#undef DS
#undef ES
#undef FS
#undef GS
#undef SS
#undef EAX
#undef ECX
#undef EDX
#undef EBX
#undef ESP
#undef EBP
#undef ESI
#undef EDI
#undef EIP
#undef UESP
#undef EFL
#undef ERR
#undef TRAPNO
#endif
PK hwFZ�bv� � Support/TypeName.hnu �[��� //===- TypeName.h -----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_TYPENAME_H
#define LLVM_SUPPORT_TYPENAME_H
#include "llvm/ADT/StringRef.h"
namespace llvm {
/// We provide a function which tries to compute the (demangled) name of a type
/// statically.
///
/// This routine may fail on some platforms or for particularly unusual types.
/// Do not use it for anything other than logging and debugging aids. It isn't
/// portable or dependendable in any real sense.
///
/// The returned StringRef will point into a static storage duration string.
/// However, it may not be null terminated and may be some strangely aligned
/// inner substring of a larger string.
template <typename DesiredTypeName>
inline StringRef getTypeName() {
#if defined(__clang__) || defined(__GNUC__)
StringRef Name = __PRETTY_FUNCTION__;
StringRef Key = "DesiredTypeName = ";
Name = Name.substr(Name.find(Key));
assert(!Name.empty() && "Unable to find the template parameter!");
Name = Name.drop_front(Key.size());
assert(Name.endswith("]") && "Name doesn't end in the substitution key!");
return Name.drop_back(1);
#elif defined(_MSC_VER)
StringRef Name = __FUNCSIG__;
StringRef Key = "getTypeName<";
Name = Name.substr(Name.find(Key));
assert(!Name.empty() && "Unable to find the function name!");
Name = Name.drop_front(Key.size());
for (StringRef Prefix : {"class ", "struct ", "union ", "enum "})
if (Name.startswith(Prefix)) {
Name = Name.drop_front(Prefix.size());
break;
}
auto AnglePos = Name.rfind('>');
assert(AnglePos != StringRef::npos && "Unable to find the closing '>'!");
return Name.substr(0, AnglePos);
#else
// No known technique for statically extracting a type name on this compiler.
// We return a string that is unlikely to look like any type in LLVM.
return "UNKNOWN_TYPE";
#endif
}
} // namespace llvm
#endif
PK hwFZg4U�
Support/SwapByteOrder.hnu �[��� //===- SwapByteOrder.h - Generic and optimized byte swaps -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares generic and optimized functions to swap the byte order of
// an integral type.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_SWAPBYTEORDER_H
#define LLVM_SUPPORT_SWAPBYTEORDER_H
#include "llvm/ADT/bit.h"
#include <cstddef>
#include <cstdint>
#include <type_traits>
#if defined(__linux__) || defined(__GNU__) || defined(__HAIKU__) || \
defined(__Fuchsia__) || defined(__EMSCRIPTEN__)
#include <endian.h>
#elif defined(_AIX)
#include <sys/machine.h>
#elif defined(__sun)
/* Solaris provides _BIG_ENDIAN/_LITTLE_ENDIAN selector in sys/types.h */
#include <sys/types.h>
#define BIG_ENDIAN 4321
#define LITTLE_ENDIAN 1234
#if defined(_BIG_ENDIAN)
#define BYTE_ORDER BIG_ENDIAN
#else
#define BYTE_ORDER LITTLE_ENDIAN
#endif
#elif defined(__MVS__)
#define BIG_ENDIAN 4321
#define LITTLE_ENDIAN 1234
#define BYTE_ORDER BIG_ENDIAN
#else
#if !defined(BYTE_ORDER) && !defined(_WIN32)
#include <machine/endian.h>
#endif
#endif
namespace llvm {
namespace sys {
#if defined(BYTE_ORDER) && defined(BIG_ENDIAN) && BYTE_ORDER == BIG_ENDIAN
constexpr bool IsBigEndianHost = true;
#else
constexpr bool IsBigEndianHost = false;
#endif
static const bool IsLittleEndianHost = !IsBigEndianHost;
inline unsigned char getSwappedBytes(unsigned char C) { return llvm::byteswap(C); }
inline signed char getSwappedBytes( signed char C) { return llvm::byteswap(C); }
inline char getSwappedBytes( char C) { return llvm::byteswap(C); }
inline unsigned short getSwappedBytes(unsigned short C) { return llvm::byteswap(C); }
inline signed short getSwappedBytes( signed short C) { return llvm::byteswap(C); }
inline unsigned int getSwappedBytes(unsigned int C) { return llvm::byteswap(C); }
inline signed int getSwappedBytes( signed int C) { return llvm::byteswap(C); }
inline unsigned long getSwappedBytes(unsigned long C) { return llvm::byteswap(C); }
inline signed long getSwappedBytes( signed long C) { return llvm::byteswap(C); }
inline unsigned long long getSwappedBytes(unsigned long long C) { return llvm::byteswap(C); }
inline signed long long getSwappedBytes( signed long long C) { return llvm::byteswap(C); }
inline float getSwappedBytes(float C) {
union {
uint32_t i;
float f;
} in, out;
in.f = C;
out.i = llvm::byteswap(in.i);
return out.f;
}
inline double getSwappedBytes(double C) {
union {
uint64_t i;
double d;
} in, out;
in.d = C;
out.i = llvm::byteswap(in.i);
return out.d;
}
template <typename T>
inline std::enable_if_t<std::is_enum_v<T>, T> getSwappedBytes(T C) {
return static_cast<T>(
llvm::byteswap(static_cast<std::underlying_type_t<T>>(C)));
}
template<typename T>
inline void swapByteOrder(T &Value) {
Value = getSwappedBytes(Value);
}
} // end namespace sys
} // end namespace llvm
#endif
PK hwFZ�h�oP P Support/TargetParser.hnu �[��� //===-- llvm/Support/TargetParser.h -----------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This header is deprecated in favour of `llvm/TargetParser/TargetParser.h`.
///
//===----------------------------------------------------------------------===//
#include "llvm/TargetParser/TargetParser.h"
PK hwFZ���TA TA Support/SMTAPI.hnu �[��� //===- SMTAPI.h -------------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines a SMT generic Solver API, which will be the base class
// for every SMT solver specific class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_SMTAPI_H
#define LLVM_SUPPORT_SMTAPI_H
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/APSInt.h"
#include "llvm/ADT/FoldingSet.h"
#include "llvm/Support/raw_ostream.h"
#include <memory>
namespace llvm {
/// Generic base class for SMT sorts
class SMTSort {
public:
SMTSort() = default;
virtual ~SMTSort() = default;
/// Returns true if the sort is a bitvector, calls isBitvectorSortImpl().
virtual bool isBitvectorSort() const { return isBitvectorSortImpl(); }
/// Returns true if the sort is a floating-point, calls isFloatSortImpl().
virtual bool isFloatSort() const { return isFloatSortImpl(); }
/// Returns true if the sort is a boolean, calls isBooleanSortImpl().
virtual bool isBooleanSort() const { return isBooleanSortImpl(); }
/// Returns the bitvector size, fails if the sort is not a bitvector
/// Calls getBitvectorSortSizeImpl().
virtual unsigned getBitvectorSortSize() const {
assert(isBitvectorSort() && "Not a bitvector sort!");
unsigned Size = getBitvectorSortSizeImpl();
assert(Size && "Size is zero!");
return Size;
};
/// Returns the floating-point size, fails if the sort is not a floating-point
/// Calls getFloatSortSizeImpl().
virtual unsigned getFloatSortSize() const {
assert(isFloatSort() && "Not a floating-point sort!");
unsigned Size = getFloatSortSizeImpl();
assert(Size && "Size is zero!");
return Size;
};
virtual void Profile(llvm::FoldingSetNodeID &ID) const = 0;
bool operator<(const SMTSort &Other) const {
llvm::FoldingSetNodeID ID1, ID2;
Profile(ID1);
Other.Profile(ID2);
return ID1 < ID2;
}
friend bool operator==(SMTSort const &LHS, SMTSort const &RHS) {
return LHS.equal_to(RHS);
}
virtual void print(raw_ostream &OS) const = 0;
LLVM_DUMP_METHOD void dump() const;
protected:
/// Query the SMT solver and returns true if two sorts are equal (same kind
/// and bit width). This does not check if the two sorts are the same objects.
virtual bool equal_to(SMTSort const &other) const = 0;
/// Query the SMT solver and checks if a sort is bitvector.
virtual bool isBitvectorSortImpl() const = 0;
/// Query the SMT solver and checks if a sort is floating-point.
virtual bool isFloatSortImpl() const = 0;
/// Query the SMT solver and checks if a sort is boolean.
virtual bool isBooleanSortImpl() const = 0;
/// Query the SMT solver and returns the sort bit width.
virtual unsigned getBitvectorSortSizeImpl() const = 0;
/// Query the SMT solver and returns the sort bit width.
virtual unsigned getFloatSortSizeImpl() const = 0;
};
/// Shared pointer for SMTSorts, used by SMTSolver API.
using SMTSortRef = const SMTSort *;
/// Generic base class for SMT exprs
class SMTExpr {
public:
SMTExpr() = default;
virtual ~SMTExpr() = default;
bool operator<(const SMTExpr &Other) const {
llvm::FoldingSetNodeID ID1, ID2;
Profile(ID1);
Other.Profile(ID2);
return ID1 < ID2;
}
virtual void Profile(llvm::FoldingSetNodeID &ID) const = 0;
friend bool operator==(SMTExpr const &LHS, SMTExpr const &RHS) {
return LHS.equal_to(RHS);
}
virtual void print(raw_ostream &OS) const = 0;
LLVM_DUMP_METHOD void dump() const;
protected:
/// Query the SMT solver and returns true if two sorts are equal (same kind
/// and bit width). This does not check if the two sorts are the same objects.
virtual bool equal_to(SMTExpr const &other) const = 0;
};
/// Shared pointer for SMTExprs, used by SMTSolver API.
using SMTExprRef = const SMTExpr *;
/// Generic base class for SMT Solvers
///
/// This class is responsible for wrapping all sorts and expression generation,
/// through the mk* methods. It also provides methods to create SMT expressions
/// straight from clang's AST, through the from* methods.
class SMTSolver {
public:
SMTSolver() = default;
virtual ~SMTSolver() = default;
LLVM_DUMP_METHOD void dump() const;
// Returns an appropriate floating-point sort for the given bitwidth.
SMTSortRef getFloatSort(unsigned BitWidth) {
switch (BitWidth) {
case 16:
return getFloat16Sort();
case 32:
return getFloat32Sort();
case 64:
return getFloat64Sort();
case 128:
return getFloat128Sort();
default:;
}
llvm_unreachable("Unsupported floating-point bitwidth!");
}
// Returns a boolean sort.
virtual SMTSortRef getBoolSort() = 0;
// Returns an appropriate bitvector sort for the given bitwidth.
virtual SMTSortRef getBitvectorSort(const unsigned BitWidth) = 0;
// Returns a floating-point sort of width 16
virtual SMTSortRef getFloat16Sort() = 0;
// Returns a floating-point sort of width 32
virtual SMTSortRef getFloat32Sort() = 0;
// Returns a floating-point sort of width 64
virtual SMTSortRef getFloat64Sort() = 0;
// Returns a floating-point sort of width 128
virtual SMTSortRef getFloat128Sort() = 0;
// Returns an appropriate sort for the given AST.
virtual SMTSortRef getSort(const SMTExprRef &AST) = 0;
/// Given a constraint, adds it to the solver
virtual void addConstraint(const SMTExprRef &Exp) const = 0;
/// Creates a bitvector addition operation
virtual SMTExprRef mkBVAdd(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector subtraction operation
virtual SMTExprRef mkBVSub(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector multiplication operation
virtual SMTExprRef mkBVMul(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector signed modulus operation
virtual SMTExprRef mkBVSRem(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector unsigned modulus operation
virtual SMTExprRef mkBVURem(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector signed division operation
virtual SMTExprRef mkBVSDiv(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector unsigned division operation
virtual SMTExprRef mkBVUDiv(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector logical shift left operation
virtual SMTExprRef mkBVShl(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector arithmetic shift right operation
virtual SMTExprRef mkBVAshr(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector logical shift right operation
virtual SMTExprRef mkBVLshr(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector negation operation
virtual SMTExprRef mkBVNeg(const SMTExprRef &Exp) = 0;
/// Creates a bitvector not operation
virtual SMTExprRef mkBVNot(const SMTExprRef &Exp) = 0;
/// Creates a bitvector xor operation
virtual SMTExprRef mkBVXor(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector or operation
virtual SMTExprRef mkBVOr(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector and operation
virtual SMTExprRef mkBVAnd(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector unsigned less-than operation
virtual SMTExprRef mkBVUlt(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector signed less-than operation
virtual SMTExprRef mkBVSlt(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector unsigned greater-than operation
virtual SMTExprRef mkBVUgt(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector signed greater-than operation
virtual SMTExprRef mkBVSgt(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector unsigned less-equal-than operation
virtual SMTExprRef mkBVUle(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector signed less-equal-than operation
virtual SMTExprRef mkBVSle(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector unsigned greater-equal-than operation
virtual SMTExprRef mkBVUge(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a bitvector signed greater-equal-than operation
virtual SMTExprRef mkBVSge(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a boolean not operation
virtual SMTExprRef mkNot(const SMTExprRef &Exp) = 0;
/// Creates a boolean equality operation
virtual SMTExprRef mkEqual(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a boolean and operation
virtual SMTExprRef mkAnd(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a boolean or operation
virtual SMTExprRef mkOr(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a boolean ite operation
virtual SMTExprRef mkIte(const SMTExprRef &Cond, const SMTExprRef &T,
const SMTExprRef &F) = 0;
/// Creates a bitvector sign extension operation
virtual SMTExprRef mkBVSignExt(unsigned i, const SMTExprRef &Exp) = 0;
/// Creates a bitvector zero extension operation
virtual SMTExprRef mkBVZeroExt(unsigned i, const SMTExprRef &Exp) = 0;
/// Creates a bitvector extract operation
virtual SMTExprRef mkBVExtract(unsigned High, unsigned Low,
const SMTExprRef &Exp) = 0;
/// Creates a bitvector concat operation
virtual SMTExprRef mkBVConcat(const SMTExprRef &LHS,
const SMTExprRef &RHS) = 0;
/// Creates a predicate that checks for overflow in a bitvector addition
/// operation
virtual SMTExprRef mkBVAddNoOverflow(const SMTExprRef &LHS,
const SMTExprRef &RHS,
bool isSigned) = 0;
/// Creates a predicate that checks for underflow in a signed bitvector
/// addition operation
virtual SMTExprRef mkBVAddNoUnderflow(const SMTExprRef &LHS,
const SMTExprRef &RHS) = 0;
/// Creates a predicate that checks for overflow in a signed bitvector
/// subtraction operation
virtual SMTExprRef mkBVSubNoOverflow(const SMTExprRef &LHS,
const SMTExprRef &RHS) = 0;
/// Creates a predicate that checks for underflow in a bitvector subtraction
/// operation
virtual SMTExprRef mkBVSubNoUnderflow(const SMTExprRef &LHS,
const SMTExprRef &RHS,
bool isSigned) = 0;
/// Creates a predicate that checks for overflow in a signed bitvector
/// division/modulus operation
virtual SMTExprRef mkBVSDivNoOverflow(const SMTExprRef &LHS,
const SMTExprRef &RHS) = 0;
/// Creates a predicate that checks for overflow in a bitvector negation
/// operation
virtual SMTExprRef mkBVNegNoOverflow(const SMTExprRef &Exp) = 0;
/// Creates a predicate that checks for overflow in a bitvector multiplication
/// operation
virtual SMTExprRef mkBVMulNoOverflow(const SMTExprRef &LHS,
const SMTExprRef &RHS,
bool isSigned) = 0;
/// Creates a predicate that checks for underflow in a signed bitvector
/// multiplication operation
virtual SMTExprRef mkBVMulNoUnderflow(const SMTExprRef &LHS,
const SMTExprRef &RHS) = 0;
/// Creates a floating-point negation operation
virtual SMTExprRef mkFPNeg(const SMTExprRef &Exp) = 0;
/// Creates a floating-point isInfinite operation
virtual SMTExprRef mkFPIsInfinite(const SMTExprRef &Exp) = 0;
/// Creates a floating-point isNaN operation
virtual SMTExprRef mkFPIsNaN(const SMTExprRef &Exp) = 0;
/// Creates a floating-point isNormal operation
virtual SMTExprRef mkFPIsNormal(const SMTExprRef &Exp) = 0;
/// Creates a floating-point isZero operation
virtual SMTExprRef mkFPIsZero(const SMTExprRef &Exp) = 0;
/// Creates a floating-point multiplication operation
virtual SMTExprRef mkFPMul(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a floating-point division operation
virtual SMTExprRef mkFPDiv(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a floating-point remainder operation
virtual SMTExprRef mkFPRem(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a floating-point addition operation
virtual SMTExprRef mkFPAdd(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a floating-point subtraction operation
virtual SMTExprRef mkFPSub(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a floating-point less-than operation
virtual SMTExprRef mkFPLt(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a floating-point greater-than operation
virtual SMTExprRef mkFPGt(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a floating-point less-than-or-equal operation
virtual SMTExprRef mkFPLe(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a floating-point greater-than-or-equal operation
virtual SMTExprRef mkFPGe(const SMTExprRef &LHS, const SMTExprRef &RHS) = 0;
/// Creates a floating-point equality operation
virtual SMTExprRef mkFPEqual(const SMTExprRef &LHS,
const SMTExprRef &RHS) = 0;
/// Creates a floating-point conversion from floatint-point to floating-point
/// operation
virtual SMTExprRef mkFPtoFP(const SMTExprRef &From, const SMTSortRef &To) = 0;
/// Creates a floating-point conversion from signed bitvector to
/// floatint-point operation
virtual SMTExprRef mkSBVtoFP(const SMTExprRef &From,
const SMTSortRef &To) = 0;
/// Creates a floating-point conversion from unsigned bitvector to
/// floatint-point operation
virtual SMTExprRef mkUBVtoFP(const SMTExprRef &From,
const SMTSortRef &To) = 0;
/// Creates a floating-point conversion from floatint-point to signed
/// bitvector operation
virtual SMTExprRef mkFPtoSBV(const SMTExprRef &From, unsigned ToWidth) = 0;
/// Creates a floating-point conversion from floatint-point to unsigned
/// bitvector operation
virtual SMTExprRef mkFPtoUBV(const SMTExprRef &From, unsigned ToWidth) = 0;
/// Creates a new symbol, given a name and a sort
virtual SMTExprRef mkSymbol(const char *Name, SMTSortRef Sort) = 0;
// Returns an appropriate floating-point rounding mode.
virtual SMTExprRef getFloatRoundingMode() = 0;
// If the a model is available, returns the value of a given bitvector symbol
virtual llvm::APSInt getBitvector(const SMTExprRef &Exp, unsigned BitWidth,
bool isUnsigned) = 0;
// If the a model is available, returns the value of a given boolean symbol
virtual bool getBoolean(const SMTExprRef &Exp) = 0;
/// Constructs an SMTExprRef from a boolean.
virtual SMTExprRef mkBoolean(const bool b) = 0;
/// Constructs an SMTExprRef from a finite APFloat.
virtual SMTExprRef mkFloat(const llvm::APFloat Float) = 0;
/// Constructs an SMTExprRef from an APSInt and its bit width
virtual SMTExprRef mkBitvector(const llvm::APSInt Int, unsigned BitWidth) = 0;
/// Given an expression, extract the value of this operand in the model.
virtual bool getInterpretation(const SMTExprRef &Exp, llvm::APSInt &Int) = 0;
/// Given an expression extract the value of this operand in the model.
virtual bool getInterpretation(const SMTExprRef &Exp,
llvm::APFloat &Float) = 0;
/// Check if the constraints are satisfiable
virtual std::optional<bool> check() const = 0;
/// Push the current solver state
virtual void push() = 0;
/// Pop the previous solver state
virtual void pop(unsigned NumStates = 1) = 0;
/// Reset the solver and remove all constraints.
virtual void reset() = 0;
/// Checks if the solver supports floating-points.
virtual bool isFPSupported() = 0;
virtual void print(raw_ostream &OS) const = 0;
};
/// Shared pointer for SMTSolvers.
using SMTSolverRef = std::shared_ptr<SMTSolver>;
/// Convenience method to create and Z3Solver object
SMTSolverRef CreateZ3Solver();
} // namespace llvm
#endif
PK hwFZUk�k k Support/raw_ostream.hnu �[��� //===--- raw_ostream.h - Raw output stream ----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the raw_ostream class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_RAW_OSTREAM_H
#define LLVM_SUPPORT_RAW_OSTREAM_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/DataTypes.h"
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <cstring>
#include <optional>
#include <string>
#include <string_view>
#include <system_error>
#include <type_traits>
namespace llvm {
class Duration;
class formatv_object_base;
class format_object_base;
class FormattedString;
class FormattedNumber;
class FormattedBytes;
template <class T> class [[nodiscard]] Expected;
namespace sys {
namespace fs {
enum FileAccess : unsigned;
enum OpenFlags : unsigned;
enum CreationDisposition : unsigned;
class FileLocker;
} // end namespace fs
} // end namespace sys
/// This class implements an extremely fast bulk output stream that can *only*
/// output to a stream. It does not support seeking, reopening, rewinding, line
/// buffered disciplines etc. It is a simple buffer that outputs
/// a chunk at a time.
class raw_ostream {
public:
// Class kinds to support LLVM-style RTTI.
enum class OStreamKind {
OK_OStream,
OK_FDStream,
};
private:
OStreamKind Kind;
/// The buffer is handled in such a way that the buffer is
/// uninitialized, unbuffered, or out of space when OutBufCur >=
/// OutBufEnd. Thus a single comparison suffices to determine if we
/// need to take the slow path to write a single character.
///
/// The buffer is in one of three states:
/// 1. Unbuffered (BufferMode == Unbuffered)
/// 1. Uninitialized (BufferMode != Unbuffered && OutBufStart == 0).
/// 2. Buffered (BufferMode != Unbuffered && OutBufStart != 0 &&
/// OutBufEnd - OutBufStart >= 1).
///
/// If buffered, then the raw_ostream owns the buffer if (BufferMode ==
/// InternalBuffer); otherwise the buffer has been set via SetBuffer and is
/// managed by the subclass.
///
/// If a subclass installs an external buffer using SetBuffer then it can wait
/// for a \see write_impl() call to handle the data which has been put into
/// this buffer.
char *OutBufStart, *OutBufEnd, *OutBufCur;
bool ColorEnabled = false;
/// Optional stream this stream is tied to. If this stream is written to, the
/// tied-to stream will be flushed first.
raw_ostream *TiedStream = nullptr;
enum class BufferKind {
Unbuffered = 0,
InternalBuffer,
ExternalBuffer
} BufferMode;
public:
// color order matches ANSI escape sequence, don't change
enum class Colors {
BLACK = 0,
RED,
GREEN,
YELLOW,
BLUE,
MAGENTA,
CYAN,
WHITE,
SAVEDCOLOR,
RESET,
};
static constexpr Colors BLACK = Colors::BLACK;
static constexpr Colors RED = Colors::RED;
static constexpr Colors GREEN = Colors::GREEN;
static constexpr Colors YELLOW = Colors::YELLOW;
static constexpr Colors BLUE = Colors::BLUE;
static constexpr Colors MAGENTA = Colors::MAGENTA;
static constexpr Colors CYAN = Colors::CYAN;
static constexpr Colors WHITE = Colors::WHITE;
static constexpr Colors SAVEDCOLOR = Colors::SAVEDCOLOR;
static constexpr Colors RESET = Colors::RESET;
explicit raw_ostream(bool unbuffered = false,
OStreamKind K = OStreamKind::OK_OStream)
: Kind(K), BufferMode(unbuffered ? BufferKind::Unbuffered
: BufferKind::InternalBuffer) {
// Start out ready to flush.
OutBufStart = OutBufEnd = OutBufCur = nullptr;
}
raw_ostream(const raw_ostream &) = delete;
void operator=(const raw_ostream &) = delete;
virtual ~raw_ostream();
/// tell - Return the current offset with the file.
uint64_t tell() const { return current_pos() + GetNumBytesInBuffer(); }
OStreamKind get_kind() const { return Kind; }
//===--------------------------------------------------------------------===//
// Configuration Interface
//===--------------------------------------------------------------------===//
/// If possible, pre-allocate \p ExtraSize bytes for stream data.
/// i.e. it extends internal buffers to keep additional ExtraSize bytes.
/// So that the stream could keep at least tell() + ExtraSize bytes
/// without re-allocations. reserveExtraSpace() does not change
/// the size/data of the stream.
virtual void reserveExtraSpace(uint64_t ExtraSize) {}
/// Set the stream to be buffered, with an automatically determined buffer
/// size.
void SetBuffered();
/// Set the stream to be buffered, using the specified buffer size.
void SetBufferSize(size_t Size) {
flush();
SetBufferAndMode(new char[Size], Size, BufferKind::InternalBuffer);
}
size_t GetBufferSize() const {
// If we're supposed to be buffered but haven't actually gotten around
// to allocating the buffer yet, return the value that would be used.
if (BufferMode != BufferKind::Unbuffered && OutBufStart == nullptr)
return preferred_buffer_size();
// Otherwise just return the size of the allocated buffer.
return OutBufEnd - OutBufStart;
}
/// Set the stream to be unbuffered. When unbuffered, the stream will flush
/// after every write. This routine will also flush the buffer immediately
/// when the stream is being set to unbuffered.
void SetUnbuffered() {
flush();
SetBufferAndMode(nullptr, 0, BufferKind::Unbuffered);
}
size_t GetNumBytesInBuffer() const {
return OutBufCur - OutBufStart;
}
//===--------------------------------------------------------------------===//
// Data Output Interface
//===--------------------------------------------------------------------===//
void flush() {
if (OutBufCur != OutBufStart)
flush_nonempty();
}
raw_ostream &operator<<(char C) {
if (OutBufCur >= OutBufEnd)
return write(C);
*OutBufCur++ = C;
return *this;
}
raw_ostream &operator<<(unsigned char C) {
if (OutBufCur >= OutBufEnd)
return write(C);
*OutBufCur++ = C;
return *this;
}
raw_ostream &operator<<(signed char C) {
if (OutBufCur >= OutBufEnd)
return write(C);
*OutBufCur++ = C;
return *this;
}
raw_ostream &operator<<(StringRef Str) {
// Inline fast path, particularly for strings with a known length.
size_t Size = Str.size();
// Make sure we can use the fast path.
if (Size > (size_t)(OutBufEnd - OutBufCur))
return write(Str.data(), Size);
if (Size) {
memcpy(OutBufCur, Str.data(), Size);
OutBufCur += Size;
}
return *this;
}
#if defined(__cpp_char8_t)
// When using `char8_t *` integers or pointers are written to the ostream
// instead of UTF-8 code as one might expect. This might lead to unexpected
// behavior, especially as `u8""` literals are of type `char8_t*` instead of
// type `char_t*` from C++20 onwards. Thus we disallow using them with
// raw_ostreams.
// If you have u8"" literals to stream, you can rewrite them as ordinary
// literals with escape sequences
// e.g. replace `u8"\u00a0"` by `"\xc2\xa0"`
// or use `reinterpret_cast`:
// e.g. replace `u8"\u00a0"` by `reinterpret_cast<const char *>(u8"\u00a0")`
raw_ostream &operator<<(const char8_t *Str) = delete;
#endif
raw_ostream &operator<<(const char *Str) {
// Inline fast path, particularly for constant strings where a sufficiently
// smart compiler will simplify strlen.
return this->operator<<(StringRef(Str));
}
raw_ostream &operator<<(const std::string &Str) {
// Avoid the fast path, it would only increase code size for a marginal win.
return write(Str.data(), Str.length());
}
raw_ostream &operator<<(const std::string_view &Str) {
return write(Str.data(), Str.length());
}
raw_ostream &operator<<(const SmallVectorImpl<char> &Str) {
return write(Str.data(), Str.size());
}
raw_ostream &operator<<(unsigned long N);
raw_ostream &operator<<(long N);
raw_ostream &operator<<(unsigned long long N);
raw_ostream &operator<<(long long N);
raw_ostream &operator<<(const void *P);
raw_ostream &operator<<(unsigned int N) {
return this->operator<<(static_cast<unsigned long>(N));
}
raw_ostream &operator<<(int N) {
return this->operator<<(static_cast<long>(N));
}
raw_ostream &operator<<(double N);
/// Output \p N in hexadecimal, without any prefix or padding.
raw_ostream &write_hex(unsigned long long N);
// Change the foreground color of text.
raw_ostream &operator<<(Colors C);
/// Output a formatted UUID with dash separators.
using uuid_t = uint8_t[16];
raw_ostream &write_uuid(const uuid_t UUID);
/// Output \p Str, turning '\\', '\t', '\n', '"', and anything that doesn't
/// satisfy llvm::isPrint into an escape sequence.
raw_ostream &write_escaped(StringRef Str, bool UseHexEscapes = false);
raw_ostream &write(unsigned char C);
raw_ostream &write(const char *Ptr, size_t Size);
// Formatted output, see the format() function in Support/Format.h.
raw_ostream &operator<<(const format_object_base &Fmt);
// Formatted output, see the leftJustify() function in Support/Format.h.
raw_ostream &operator<<(const FormattedString &);
// Formatted output, see the formatHex() function in Support/Format.h.
raw_ostream &operator<<(const FormattedNumber &);
// Formatted output, see the formatv() function in Support/FormatVariadic.h.
raw_ostream &operator<<(const formatv_object_base &);
// Formatted output, see the format_bytes() function in Support/Format.h.
raw_ostream &operator<<(const FormattedBytes &);
/// indent - Insert 'NumSpaces' spaces.
raw_ostream &indent(unsigned NumSpaces);
/// write_zeros - Insert 'NumZeros' nulls.
raw_ostream &write_zeros(unsigned NumZeros);
/// Changes the foreground color of text that will be output from this point
/// forward.
/// @param Color ANSI color to use, the special SAVEDCOLOR can be used to
/// change only the bold attribute, and keep colors untouched
/// @param Bold bold/brighter text, default false
/// @param BG if true change the background, default: change foreground
/// @returns itself so it can be used within << invocations
virtual raw_ostream &changeColor(enum Colors Color, bool Bold = false,
bool BG = false);
/// Resets the colors to terminal defaults. Call this when you are done
/// outputting colored text, or before program exit.
virtual raw_ostream &resetColor();
/// Reverses the foreground and background colors.
virtual raw_ostream &reverseColor();
/// This function determines if this stream is connected to a "tty" or
/// "console" window. That is, the output would be displayed to the user
/// rather than being put on a pipe or stored in a file.
virtual bool is_displayed() const { return false; }
/// This function determines if this stream is displayed and supports colors.
/// The result is unaffected by calls to enable_color().
virtual bool has_colors() const { return is_displayed(); }
// Enable or disable colors. Once enable_colors(false) is called,
// changeColor() has no effect until enable_colors(true) is called.
virtual void enable_colors(bool enable) { ColorEnabled = enable; }
bool colors_enabled() const { return ColorEnabled; }
/// Tie this stream to the specified stream. Replaces any existing tied-to
/// stream. Specifying a nullptr unties the stream.
void tie(raw_ostream *TieTo) { TiedStream = TieTo; }
//===--------------------------------------------------------------------===//
// Subclass Interface
//===--------------------------------------------------------------------===//
private:
/// The is the piece of the class that is implemented by subclasses. This
/// writes the \p Size bytes starting at
/// \p Ptr to the underlying stream.
///
/// This function is guaranteed to only be called at a point at which it is
/// safe for the subclass to install a new buffer via SetBuffer.
///
/// \param Ptr The start of the data to be written. For buffered streams this
/// is guaranteed to be the start of the buffer.
///
/// \param Size The number of bytes to be written.
///
/// \invariant { Size > 0 }
virtual void write_impl(const char *Ptr, size_t Size) = 0;
/// Return the current position within the stream, not counting the bytes
/// currently in the buffer.
virtual uint64_t current_pos() const = 0;
protected:
/// Use the provided buffer as the raw_ostream buffer. This is intended for
/// use only by subclasses which can arrange for the output to go directly
/// into the desired output buffer, instead of being copied on each flush.
void SetBuffer(char *BufferStart, size_t Size) {
SetBufferAndMode(BufferStart, Size, BufferKind::ExternalBuffer);
}
/// Return an efficient buffer size for the underlying output mechanism.
virtual size_t preferred_buffer_size() const;
/// Return the beginning of the current stream buffer, or 0 if the stream is
/// unbuffered.
const char *getBufferStart() const { return OutBufStart; }
//===--------------------------------------------------------------------===//
// Private Interface
//===--------------------------------------------------------------------===//
private:
/// Install the given buffer and mode.
void SetBufferAndMode(char *BufferStart, size_t Size, BufferKind Mode);
/// Flush the current buffer, which is known to be non-empty. This outputs the
/// currently buffered data and resets the buffer to empty.
void flush_nonempty();
/// Copy data into the buffer. Size must not be greater than the number of
/// unused bytes in the buffer.
void copy_to_buffer(const char *Ptr, size_t Size);
/// Compute whether colors should be used and do the necessary work such as
/// flushing. The result is affected by calls to enable_color().
bool prepare_colors();
/// Flush the tied-to stream (if present) and then write the required data.
void flush_tied_then_write(const char *Ptr, size_t Size);
virtual void anchor();
};
/// Call the appropriate insertion operator, given an rvalue reference to a
/// raw_ostream object and return a stream of the same type as the argument.
template <typename OStream, typename T>
std::enable_if_t<!std::is_reference_v<OStream> &&
std::is_base_of_v<raw_ostream, OStream>,
OStream &&>
operator<<(OStream &&OS, const T &Value) {
OS << Value;
return std::move(OS);
}
/// An abstract base class for streams implementations that also support a
/// pwrite operation. This is useful for code that can mostly stream out data,
/// but needs to patch in a header that needs to know the output size.
class raw_pwrite_stream : public raw_ostream {
virtual void pwrite_impl(const char *Ptr, size_t Size, uint64_t Offset) = 0;
void anchor() override;
public:
explicit raw_pwrite_stream(bool Unbuffered = false,
OStreamKind K = OStreamKind::OK_OStream)
: raw_ostream(Unbuffered, K) {}
void pwrite(const char *Ptr, size_t Size, uint64_t Offset) {
#ifndef NDEBUG
uint64_t Pos = tell();
// /dev/null always reports a pos of 0, so we cannot perform this check
// in that case.
if (Pos)
assert(Size + Offset <= Pos && "We don't support extending the stream");
#endif
pwrite_impl(Ptr, Size, Offset);
}
};
//===----------------------------------------------------------------------===//
// File Output Streams
//===----------------------------------------------------------------------===//
/// A raw_ostream that writes to a file descriptor.
///
class raw_fd_ostream : public raw_pwrite_stream {
int FD;
bool ShouldClose;
bool SupportsSeeking = false;
bool IsRegularFile = false;
mutable std::optional<bool> HasColors;
#ifdef _WIN32
/// True if this fd refers to a Windows console device. Mintty and other
/// terminal emulators are TTYs, but they are not consoles.
bool IsWindowsConsole = false;
#endif
std::error_code EC;
uint64_t pos = 0;
/// See raw_ostream::write_impl.
void write_impl(const char *Ptr, size_t Size) override;
void pwrite_impl(const char *Ptr, size_t Size, uint64_t Offset) override;
/// Return the current position within the stream, not counting the bytes
/// currently in the buffer.
uint64_t current_pos() const override { return pos; }
/// Determine an efficient buffer size.
size_t preferred_buffer_size() const override;
void anchor() override;
protected:
/// Set the flag indicating that an output error has been encountered.
void error_detected(std::error_code EC) { this->EC = EC; }
/// Return the file descriptor.
int get_fd() const { return FD; }
// Update the file position by increasing \p Delta.
void inc_pos(uint64_t Delta) { pos += Delta; }
public:
/// Open the specified file for writing. If an error occurs, information
/// about the error is put into EC, and the stream should be immediately
/// destroyed;
/// \p Flags allows optional flags to control how the file will be opened.
///
/// As a special case, if Filename is "-", then the stream will use
/// STDOUT_FILENO instead of opening a file. This will not close the stdout
/// descriptor.
raw_fd_ostream(StringRef Filename, std::error_code &EC);
raw_fd_ostream(StringRef Filename, std::error_code &EC,
sys::fs::CreationDisposition Disp);
raw_fd_ostream(StringRef Filename, std::error_code &EC,
sys::fs::FileAccess Access);
raw_fd_ostream(StringRef Filename, std::error_code &EC,
sys::fs::OpenFlags Flags);
raw_fd_ostream(StringRef Filename, std::error_code &EC,
sys::fs::CreationDisposition Disp, sys::fs::FileAccess Access,
sys::fs::OpenFlags Flags);
/// FD is the file descriptor that this writes to. If ShouldClose is true,
/// this closes the file when the stream is destroyed. If FD is for stdout or
/// stderr, it will not be closed.
raw_fd_ostream(int fd, bool shouldClose, bool unbuffered = false,
OStreamKind K = OStreamKind::OK_OStream);
~raw_fd_ostream() override;
/// Manually flush the stream and close the file. Note that this does not call
/// fsync.
void close();
bool supportsSeeking() const { return SupportsSeeking; }
bool isRegularFile() const { return IsRegularFile; }
/// Flushes the stream and repositions the underlying file descriptor position
/// to the offset specified from the beginning of the file.
uint64_t seek(uint64_t off);
bool is_displayed() const override;
bool has_colors() const override;
std::error_code error() const { return EC; }
/// Return the value of the flag in this raw_fd_ostream indicating whether an
/// output error has been encountered.
/// This doesn't implicitly flush any pending output. Also, it doesn't
/// guarantee to detect all errors unless the stream has been closed.
bool has_error() const { return bool(EC); }
/// Set the flag read by has_error() to false. If the error flag is set at the
/// time when this raw_ostream's destructor is called, report_fatal_error is
/// called to report the error. Use clear_error() after handling the error to
/// avoid this behavior.
///
/// "Errors should never pass silently.
/// Unless explicitly silenced."
/// - from The Zen of Python, by Tim Peters
///
void clear_error() { EC = std::error_code(); }
/// Locks the underlying file.
///
/// @returns RAII object that releases the lock upon leaving the scope, if the
/// locking was successful. Otherwise returns corresponding
/// error code.
///
/// The function blocks the current thread until the lock become available or
/// error occurs.
///
/// Possible use of this function may be as follows:
///
/// @code{.cpp}
/// if (auto L = stream.lock()) {
/// // ... do action that require file to be locked.
/// } else {
/// handleAllErrors(std::move(L.takeError()), [&](ErrorInfoBase &EIB) {
/// // ... handle lock error.
/// });
/// }
/// @endcode
[[nodiscard]] Expected<sys::fs::FileLocker> lock();
/// Tries to lock the underlying file within the specified period.
///
/// @returns RAII object that releases the lock upon leaving the scope, if the
/// locking was successful. Otherwise returns corresponding
/// error code.
///
/// It is used as @ref lock.
[[nodiscard]] Expected<sys::fs::FileLocker>
tryLockFor(Duration const &Timeout);
};
/// This returns a reference to a raw_fd_ostream for standard output. Use it
/// like: outs() << "foo" << "bar";
raw_fd_ostream &outs();
/// This returns a reference to a raw_ostream for standard error.
/// Use it like: errs() << "foo" << "bar";
/// By default, the stream is tied to stdout to ensure stdout is flushed before
/// stderr is written, to ensure the error messages are written in their
/// expected place.
raw_fd_ostream &errs();
/// This returns a reference to a raw_ostream which simply discards output.
raw_ostream &nulls();
//===----------------------------------------------------------------------===//
// File Streams
//===----------------------------------------------------------------------===//
/// A raw_ostream of a file for reading/writing/seeking.
///
class raw_fd_stream : public raw_fd_ostream {
public:
/// Open the specified file for reading/writing/seeking. If an error occurs,
/// information about the error is put into EC, and the stream should be
/// immediately destroyed.
raw_fd_stream(StringRef Filename, std::error_code &EC);
/// This reads the \p Size bytes into a buffer pointed by \p Ptr.
///
/// \param Ptr The start of the buffer to hold data to be read.
///
/// \param Size The number of bytes to be read.
///
/// On success, the number of bytes read is returned, and the file position is
/// advanced by this number. On error, -1 is returned, use error() to get the
/// error code.
ssize_t read(char *Ptr, size_t Size);
/// Check if \p OS is a pointer of type raw_fd_stream*.
static bool classof(const raw_ostream *OS);
};
//===----------------------------------------------------------------------===//
// Output Stream Adaptors
//===----------------------------------------------------------------------===//
/// A raw_ostream that writes to an std::string. This is a simple adaptor
/// class. This class does not encounter output errors.
/// raw_string_ostream operates without a buffer, delegating all memory
/// management to the std::string. Thus the std::string is always up-to-date,
/// may be used directly and there is no need to call flush().
class raw_string_ostream : public raw_ostream {
std::string &OS;
/// See raw_ostream::write_impl.
void write_impl(const char *Ptr, size_t Size) override;
/// Return the current position within the stream, not counting the bytes
/// currently in the buffer.
uint64_t current_pos() const override { return OS.size(); }
public:
explicit raw_string_ostream(std::string &O) : OS(O) {
SetUnbuffered();
}
/// Returns the string's reference. In most cases it is better to simply use
/// the underlying std::string directly.
/// TODO: Consider removing this API.
std::string &str() { return OS; }
void reserveExtraSpace(uint64_t ExtraSize) override {
OS.reserve(tell() + ExtraSize);
}
};
/// A raw_ostream that writes to an SmallVector or SmallString. This is a
/// simple adaptor class. This class does not encounter output errors.
/// raw_svector_ostream operates without a buffer, delegating all memory
/// management to the SmallString. Thus the SmallString is always up-to-date,
/// may be used directly and there is no need to call flush().
class raw_svector_ostream : public raw_pwrite_stream {
SmallVectorImpl<char> &OS;
/// See raw_ostream::write_impl.
void write_impl(const char *Ptr, size_t Size) override;
void pwrite_impl(const char *Ptr, size_t Size, uint64_t Offset) override;
/// Return the current position within the stream.
uint64_t current_pos() const override;
public:
/// Construct a new raw_svector_ostream.
///
/// \param O The vector to write to; this should generally have at least 128
/// bytes free to avoid any extraneous memory overhead.
explicit raw_svector_ostream(SmallVectorImpl<char> &O) : OS(O) {
SetUnbuffered();
}
~raw_svector_ostream() override = default;
void flush() = delete;
/// Return a StringRef for the vector contents.
StringRef str() const { return StringRef(OS.data(), OS.size()); }
void reserveExtraSpace(uint64_t ExtraSize) override {
OS.reserve(tell() + ExtraSize);
}
};
/// A raw_ostream that discards all output.
class raw_null_ostream : public raw_pwrite_stream {
/// See raw_ostream::write_impl.
void write_impl(const char *Ptr, size_t size) override;
void pwrite_impl(const char *Ptr, size_t Size, uint64_t Offset) override;
/// Return the current position within the stream, not counting the bytes
/// currently in the buffer.
uint64_t current_pos() const override;
public:
explicit raw_null_ostream() = default;
~raw_null_ostream() override;
};
class buffer_ostream : public raw_svector_ostream {
raw_ostream &OS;
SmallVector<char, 0> Buffer;
void anchor() override;
public:
buffer_ostream(raw_ostream &OS) : raw_svector_ostream(Buffer), OS(OS) {}
~buffer_ostream() override { OS << str(); }
};
class buffer_unique_ostream : public raw_svector_ostream {
std::unique_ptr<raw_ostream> OS;
SmallVector<char, 0> Buffer;
void anchor() override;
public:
buffer_unique_ostream(std::unique_ptr<raw_ostream> OS)
: raw_svector_ostream(Buffer), OS(std::move(OS)) {
// Turn off buffering on OS, which we now own, to avoid allocating a buffer
// when the destructor writes only to be immediately flushed again.
this->OS->SetUnbuffered();
}
~buffer_unique_ostream() override { *OS << str(); }
};
class Error;
/// This helper creates an output stream and then passes it to \p Write.
/// The stream created is based on the specified \p OutputFileName:
/// llvm::outs for "-", raw_null_ostream for "/dev/null", and raw_fd_ostream
/// for other names. For raw_fd_ostream instances, the stream writes to
/// a temporary file. The final output file is atomically replaced with the
/// temporary file after the \p Write function is finished.
Error writeToOutput(StringRef OutputFileName,
std::function<Error(raw_ostream &)> Write);
raw_ostream &operator<<(raw_ostream &OS, std::nullopt_t);
template <typename T, typename = decltype(std::declval<raw_ostream &>()
<< std::declval<const T &>())>
raw_ostream &operator<<(raw_ostream &OS, const std::optional<T> &O) {
if (O)
OS << *O;
else
OS << std::nullopt;
return OS;
}
} // end namespace llvm
#endif // LLVM_SUPPORT_RAW_OSTREAM_H
PK hwFZw1�vǐ ǐ Support/JSON.hnu �[��� //===--- JSON.h - JSON values, parsing and serialization -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===---------------------------------------------------------------------===//
///
/// \file
/// This file supports working with JSON data.
///
/// It comprises:
///
/// - classes which hold dynamically-typed parsed JSON structures
/// These are value types that can be composed, inspected, and modified.
/// See json::Value, and the related types json::Object and json::Array.
///
/// - functions to parse JSON text into Values, and to serialize Values to text.
/// See parse(), operator<<, and format_provider.
///
/// - a convention and helpers for mapping between json::Value and user-defined
/// types. See fromJSON(), ObjectMapper, and the class comment on Value.
///
/// - an output API json::OStream which can emit JSON without materializing
/// all structures as json::Value.
///
/// Typically, JSON data would be read from an external source, parsed into
/// a Value, and then converted into some native data structure before doing
/// real work on it. (And vice versa when writing).
///
/// Other serialization mechanisms you may consider:
///
/// - YAML is also text-based, and more human-readable than JSON. It's a more
/// complex format and data model, and YAML parsers aren't ubiquitous.
/// YAMLParser.h is a streaming parser suitable for parsing large documents
/// (including JSON, as YAML is a superset). It can be awkward to use
/// directly. YAML I/O (YAMLTraits.h) provides data mapping that is more
/// declarative than the toJSON/fromJSON conventions here.
///
/// - LLVM bitstream is a space- and CPU- efficient binary format. Typically it
/// encodes LLVM IR ("bitcode"), but it can be a container for other data.
/// Low-level reader/writer libraries are in Bitstream/Bitstream*.h
///
//===---------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_JSON_H
#define LLVM_SUPPORT_JSON_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/STLFunctionalExtras.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/FormatVariadic.h"
#include "llvm/Support/raw_ostream.h"
#include <cmath>
#include <map>
namespace llvm {
namespace json {
// === String encodings ===
//
// JSON strings are character sequences (not byte sequences like std::string).
// We need to know the encoding, and for simplicity only support UTF-8.
//
// - When parsing, invalid UTF-8 is a syntax error like any other
//
// - When creating Values from strings, callers must ensure they are UTF-8.
// with asserts on, invalid UTF-8 will crash the program
// with asserts off, we'll substitute the replacement character (U+FFFD)
// Callers can use json::isUTF8() and json::fixUTF8() for validation.
//
// - When retrieving strings from Values (e.g. asString()), the result will
// always be valid UTF-8.
template <typename T>
constexpr bool is_uint_64_bit_v =
std::is_integral_v<T> && std::is_unsigned_v<T> &&
sizeof(T) == sizeof(uint64_t);
/// Returns true if \p S is valid UTF-8, which is required for use as JSON.
/// If it returns false, \p Offset is set to a byte offset near the first error.
bool isUTF8(llvm::StringRef S, size_t *ErrOffset = nullptr);
/// Replaces invalid UTF-8 sequences in \p S with the replacement character
/// (U+FFFD). The returned string is valid UTF-8.
/// This is much slower than isUTF8, so test that first.
std::string fixUTF8(llvm::StringRef S);
class Array;
class ObjectKey;
class Value;
template <typename T> Value toJSON(const std::optional<T> &Opt);
/// An Object is a JSON object, which maps strings to heterogenous JSON values.
/// It simulates DenseMap<ObjectKey, Value>. ObjectKey is a maybe-owned string.
class Object {
using Storage = DenseMap<ObjectKey, Value, llvm::DenseMapInfo<StringRef>>;
Storage M;
public:
using key_type = ObjectKey;
using mapped_type = Value;
using value_type = Storage::value_type;
using iterator = Storage::iterator;
using const_iterator = Storage::const_iterator;
Object() = default;
// KV is a trivial key-value struct for list-initialization.
// (using std::pair forces extra copies).
struct KV;
explicit Object(std::initializer_list<KV> Properties);
iterator begin() { return M.begin(); }
const_iterator begin() const { return M.begin(); }
iterator end() { return M.end(); }
const_iterator end() const { return M.end(); }
bool empty() const { return M.empty(); }
size_t size() const { return M.size(); }
void clear() { M.clear(); }
std::pair<iterator, bool> insert(KV E);
template <typename... Ts>
std::pair<iterator, bool> try_emplace(const ObjectKey &K, Ts &&... Args) {
return M.try_emplace(K, std::forward<Ts>(Args)...);
}
template <typename... Ts>
std::pair<iterator, bool> try_emplace(ObjectKey &&K, Ts &&... Args) {
return M.try_emplace(std::move(K), std::forward<Ts>(Args)...);
}
bool erase(StringRef K);
void erase(iterator I) { M.erase(I); }
iterator find(StringRef K) { return M.find_as(K); }
const_iterator find(StringRef K) const { return M.find_as(K); }
// operator[] acts as if Value was default-constructible as null.
Value &operator[](const ObjectKey &K);
Value &operator[](ObjectKey &&K);
// Look up a property, returning nullptr if it doesn't exist.
Value *get(StringRef K);
const Value *get(StringRef K) const;
// Typed accessors return std::nullopt/nullptr if
// - the property doesn't exist
// - or it has the wrong type
std::optional<std::nullptr_t> getNull(StringRef K) const;
std::optional<bool> getBoolean(StringRef K) const;
std::optional<double> getNumber(StringRef K) const;
std::optional<int64_t> getInteger(StringRef K) const;
std::optional<llvm::StringRef> getString(StringRef K) const;
const json::Object *getObject(StringRef K) const;
json::Object *getObject(StringRef K);
const json::Array *getArray(StringRef K) const;
json::Array *getArray(StringRef K);
};
bool operator==(const Object &LHS, const Object &RHS);
inline bool operator!=(const Object &LHS, const Object &RHS) {
return !(LHS == RHS);
}
/// An Array is a JSON array, which contains heterogeneous JSON values.
/// It simulates std::vector<Value>.
class Array {
std::vector<Value> V;
public:
using value_type = Value;
using iterator = std::vector<Value>::iterator;
using const_iterator = std::vector<Value>::const_iterator;
Array() = default;
explicit Array(std::initializer_list<Value> Elements);
template <typename Collection> explicit Array(const Collection &C) {
for (const auto &V : C)
emplace_back(V);
}
Value &operator[](size_t I);
const Value &operator[](size_t I) const;
Value &front();
const Value &front() const;
Value &back();
const Value &back() const;
Value *data();
const Value *data() const;
iterator begin();
const_iterator begin() const;
iterator end();
const_iterator end() const;
bool empty() const;
size_t size() const;
void reserve(size_t S);
void clear();
void push_back(const Value &E);
void push_back(Value &&E);
template <typename... Args> void emplace_back(Args &&...A);
void pop_back();
iterator insert(const_iterator P, const Value &E);
iterator insert(const_iterator P, Value &&E);
template <typename It> iterator insert(const_iterator P, It A, It Z);
template <typename... Args> iterator emplace(const_iterator P, Args &&...A);
friend bool operator==(const Array &L, const Array &R);
};
inline bool operator!=(const Array &L, const Array &R) { return !(L == R); }
/// A Value is an JSON value of unknown type.
/// They can be copied, but should generally be moved.
///
/// === Composing values ===
///
/// You can implicitly construct Values from:
/// - strings: std::string, SmallString, formatv, StringRef, char*
/// (char*, and StringRef are references, not copies!)
/// - numbers
/// - booleans
/// - null: nullptr
/// - arrays: {"foo", 42.0, false}
/// - serializable things: types with toJSON(const T&)->Value, found by ADL
///
/// They can also be constructed from object/array helpers:
/// - json::Object is a type like map<ObjectKey, Value>
/// - json::Array is a type like vector<Value>
/// These can be list-initialized, or used to build up collections in a loop.
/// json::ary(Collection) converts all items in a collection to Values.
///
/// === Inspecting values ===
///
/// Each Value is one of the JSON kinds:
/// null (nullptr_t)
/// boolean (bool)
/// number (double, int64 or uint64)
/// string (StringRef)
/// array (json::Array)
/// object (json::Object)
///
/// The kind can be queried directly, or implicitly via the typed accessors:
/// if (std::optional<StringRef> S = E.getAsString()
/// assert(E.kind() == Value::String);
///
/// Array and Object also have typed indexing accessors for easy traversal:
/// Expected<Value> E = parse(R"( {"options": {"font": "sans-serif"}} )");
/// if (Object* O = E->getAsObject())
/// if (Object* Opts = O->getObject("options"))
/// if (std::optional<StringRef> Font = Opts->getString("font"))
/// assert(Opts->at("font").kind() == Value::String);
///
/// === Converting JSON values to C++ types ===
///
/// The convention is to have a deserializer function findable via ADL:
/// fromJSON(const json::Value&, T&, Path) -> bool
///
/// The return value indicates overall success, and Path is used for precise
/// error reporting. (The Path::Root passed in at the top level fromJSON call
/// captures any nested error and can render it in context).
/// If conversion fails, fromJSON calls Path::report() and immediately returns.
/// This ensures that the first fatal error survives.
///
/// Deserializers are provided for:
/// - bool
/// - int and int64_t
/// - double
/// - std::string
/// - vector<T>, where T is deserializable
/// - map<string, T>, where T is deserializable
/// - std::optional<T>, where T is deserializable
/// ObjectMapper can help writing fromJSON() functions for object types.
///
/// For conversion in the other direction, the serializer function is:
/// toJSON(const T&) -> json::Value
/// If this exists, then it also allows constructing Value from T, and can
/// be used to serialize vector<T>, map<string, T>, and std::optional<T>.
///
/// === Serialization ===
///
/// Values can be serialized to JSON:
/// 1) raw_ostream << Value // Basic formatting.
/// 2) raw_ostream << formatv("{0}", Value) // Basic formatting.
/// 3) raw_ostream << formatv("{0:2}", Value) // Pretty-print with indent 2.
///
/// And parsed:
/// Expected<Value> E = json::parse("[1, 2, null]");
/// assert(E && E->kind() == Value::Array);
class Value {
public:
enum Kind {
Null,
Boolean,
/// Number values can store both int64s and doubles at full precision,
/// depending on what they were constructed/parsed from.
Number,
String,
Array,
Object,
};
// It would be nice to have Value() be null. But that would make {} null too.
Value(const Value &M) { copyFrom(M); }
Value(Value &&M) { moveFrom(std::move(M)); }
Value(std::initializer_list<Value> Elements);
Value(json::Array &&Elements) : Type(T_Array) {
create<json::Array>(std::move(Elements));
}
template <typename Elt>
Value(const std::vector<Elt> &C) : Value(json::Array(C)) {}
Value(json::Object &&Properties) : Type(T_Object) {
create<json::Object>(std::move(Properties));
}
template <typename Elt>
Value(const std::map<std::string, Elt> &C) : Value(json::Object(C)) {}
// Strings: types with value semantics. Must be valid UTF-8.
Value(std::string V) : Type(T_String) {
if (LLVM_UNLIKELY(!isUTF8(V))) {
assert(false && "Invalid UTF-8 in value used as JSON");
V = fixUTF8(std::move(V));
}
create<std::string>(std::move(V));
}
Value(const llvm::SmallVectorImpl<char> &V)
: Value(std::string(V.begin(), V.end())) {}
Value(const llvm::formatv_object_base &V) : Value(V.str()) {}
// Strings: types with reference semantics. Must be valid UTF-8.
Value(StringRef V) : Type(T_StringRef) {
create<llvm::StringRef>(V);
if (LLVM_UNLIKELY(!isUTF8(V))) {
assert(false && "Invalid UTF-8 in value used as JSON");
*this = Value(fixUTF8(V));
}
}
Value(const char *V) : Value(StringRef(V)) {}
Value(std::nullptr_t) : Type(T_Null) {}
// Boolean (disallow implicit conversions).
// (The last template parameter is a dummy to keep templates distinct.)
template <typename T, typename = std::enable_if_t<std::is_same_v<T, bool>>,
bool = false>
Value(T B) : Type(T_Boolean) {
create<bool>(B);
}
// Unsigned 64-bit integers.
template <typename T, typename = std::enable_if_t<is_uint_64_bit_v<T>>>
Value(T V) : Type(T_UINT64) {
create<uint64_t>(uint64_t{V});
}
// Integers (except boolean and uint64_t).
// Must be non-narrowing convertible to int64_t.
template <typename T, typename = std::enable_if_t<std::is_integral_v<T>>,
typename = std::enable_if_t<!std::is_same_v<T, bool>>,
typename = std::enable_if_t<!is_uint_64_bit_v<T>>>
Value(T I) : Type(T_Integer) {
create<int64_t>(int64_t{I});
}
// Floating point. Must be non-narrowing convertible to double.
template <typename T,
typename = std::enable_if_t<std::is_floating_point_v<T>>,
double * = nullptr>
Value(T D) : Type(T_Double) {
create<double>(double{D});
}
// Serializable types: with a toJSON(const T&)->Value function, found by ADL.
template <typename T,
typename = std::enable_if_t<
std::is_same_v<Value, decltype(toJSON(*(const T *)nullptr))>>,
Value * = nullptr>
Value(const T &V) : Value(toJSON(V)) {}
Value &operator=(const Value &M) {
destroy();
copyFrom(M);
return *this;
}
Value &operator=(Value &&M) {
destroy();
moveFrom(std::move(M));
return *this;
}
~Value() { destroy(); }
Kind kind() const {
switch (Type) {
case T_Null:
return Null;
case T_Boolean:
return Boolean;
case T_Double:
case T_Integer:
case T_UINT64:
return Number;
case T_String:
case T_StringRef:
return String;
case T_Object:
return Object;
case T_Array:
return Array;
}
llvm_unreachable("Unknown kind");
}
// Typed accessors return std::nullopt/nullptr if the Value is not of this
// type.
std::optional<std::nullptr_t> getAsNull() const {
if (LLVM_LIKELY(Type == T_Null))
return nullptr;
return std::nullopt;
}
std::optional<bool> getAsBoolean() const {
if (LLVM_LIKELY(Type == T_Boolean))
return as<bool>();
return std::nullopt;
}
std::optional<double> getAsNumber() const {
if (LLVM_LIKELY(Type == T_Double))
return as<double>();
if (LLVM_LIKELY(Type == T_Integer))
return as<int64_t>();
if (LLVM_LIKELY(Type == T_UINT64))
return as<uint64_t>();
return std::nullopt;
}
// Succeeds if the Value is a Number, and exactly representable as int64_t.
std::optional<int64_t> getAsInteger() const {
if (LLVM_LIKELY(Type == T_Integer))
return as<int64_t>();
if (LLVM_LIKELY(Type == T_UINT64)) {
uint64_t U = as<uint64_t>();
if (LLVM_LIKELY(U <= uint64_t(std::numeric_limits<int64_t>::max()))) {
return U;
}
}
if (LLVM_LIKELY(Type == T_Double)) {
double D = as<double>();
if (LLVM_LIKELY(std::modf(D, &D) == 0.0 &&
D >= double(std::numeric_limits<int64_t>::min()) &&
D <= double(std::numeric_limits<int64_t>::max())))
return D;
}
return std::nullopt;
}
std::optional<uint64_t> getAsUINT64() const {
if (Type == T_UINT64)
return as<uint64_t>();
else if (Type == T_Integer) {
int64_t N = as<int64_t>();
if (N >= 0)
return as<uint64_t>();
}
return std::nullopt;
}
std::optional<llvm::StringRef> getAsString() const {
if (Type == T_String)
return llvm::StringRef(as<std::string>());
if (LLVM_LIKELY(Type == T_StringRef))
return as<llvm::StringRef>();
return std::nullopt;
}
const json::Object *getAsObject() const {
return LLVM_LIKELY(Type == T_Object) ? &as<json::Object>() : nullptr;
}
json::Object *getAsObject() {
return LLVM_LIKELY(Type == T_Object) ? &as<json::Object>() : nullptr;
}
const json::Array *getAsArray() const {
return LLVM_LIKELY(Type == T_Array) ? &as<json::Array>() : nullptr;
}
json::Array *getAsArray() {
return LLVM_LIKELY(Type == T_Array) ? &as<json::Array>() : nullptr;
}
private:
void destroy();
void copyFrom(const Value &M);
// We allow moving from *const* Values, by marking all members as mutable!
// This hack is needed to support initializer-list syntax efficiently.
// (std::initializer_list<T> is a container of const T).
void moveFrom(const Value &&M);
friend class Array;
friend class Object;
template <typename T, typename... U> void create(U &&... V) {
new (reinterpret_cast<T *>(&Union)) T(std::forward<U>(V)...);
}
template <typename T> T &as() const {
// Using this two-step static_cast via void * instead of reinterpret_cast
// silences a -Wstrict-aliasing false positive from GCC6 and earlier.
void *Storage = static_cast<void *>(&Union);
return *static_cast<T *>(Storage);
}
friend class OStream;
enum ValueType : char16_t {
T_Null,
T_Boolean,
T_Double,
T_Integer,
T_UINT64,
T_StringRef,
T_String,
T_Object,
T_Array,
};
// All members mutable, see moveFrom().
mutable ValueType Type;
mutable llvm::AlignedCharArrayUnion<bool, double, int64_t, uint64_t,
llvm::StringRef, std::string, json::Array,
json::Object>
Union;
friend bool operator==(const Value &, const Value &);
};
bool operator==(const Value &, const Value &);
inline bool operator!=(const Value &L, const Value &R) { return !(L == R); }
// Array Methods
inline Value &Array::operator[](size_t I) { return V[I]; }
inline const Value &Array::operator[](size_t I) const { return V[I]; }
inline Value &Array::front() { return V.front(); }
inline const Value &Array::front() const { return V.front(); }
inline Value &Array::back() { return V.back(); }
inline const Value &Array::back() const { return V.back(); }
inline Value *Array::data() { return V.data(); }
inline const Value *Array::data() const { return V.data(); }
inline typename Array::iterator Array::begin() { return V.begin(); }
inline typename Array::const_iterator Array::begin() const { return V.begin(); }
inline typename Array::iterator Array::end() { return V.end(); }
inline typename Array::const_iterator Array::end() const { return V.end(); }
inline bool Array::empty() const { return V.empty(); }
inline size_t Array::size() const { return V.size(); }
inline void Array::reserve(size_t S) { V.reserve(S); }
inline void Array::clear() { V.clear(); }
inline void Array::push_back(const Value &E) { V.push_back(E); }
inline void Array::push_back(Value &&E) { V.push_back(std::move(E)); }
template <typename... Args> inline void Array::emplace_back(Args &&...A) {
V.emplace_back(std::forward<Args>(A)...);
}
inline void Array::pop_back() { V.pop_back(); }
inline typename Array::iterator Array::insert(const_iterator P, const Value &E) {
return V.insert(P, E);
}
inline typename Array::iterator Array::insert(const_iterator P, Value &&E) {
return V.insert(P, std::move(E));
}
template <typename It>
inline typename Array::iterator Array::insert(const_iterator P, It A, It Z) {
return V.insert(P, A, Z);
}
template <typename... Args>
inline typename Array::iterator Array::emplace(const_iterator P, Args &&...A) {
return V.emplace(P, std::forward<Args>(A)...);
}
inline bool operator==(const Array &L, const Array &R) { return L.V == R.V; }
/// ObjectKey is a used to capture keys in Object. Like Value but:
/// - only strings are allowed
/// - it's optimized for the string literal case (Owned == nullptr)
/// Like Value, strings must be UTF-8. See isUTF8 documentation for details.
class ObjectKey {
public:
ObjectKey(const char *S) : ObjectKey(StringRef(S)) {}
ObjectKey(std::string S) : Owned(new std::string(std::move(S))) {
if (LLVM_UNLIKELY(!isUTF8(*Owned))) {
assert(false && "Invalid UTF-8 in value used as JSON");
*Owned = fixUTF8(std::move(*Owned));
}
Data = *Owned;
}
ObjectKey(llvm::StringRef S) : Data(S) {
if (LLVM_UNLIKELY(!isUTF8(Data))) {
assert(false && "Invalid UTF-8 in value used as JSON");
*this = ObjectKey(fixUTF8(S));
}
}
ObjectKey(const llvm::SmallVectorImpl<char> &V)
: ObjectKey(std::string(V.begin(), V.end())) {}
ObjectKey(const llvm::formatv_object_base &V) : ObjectKey(V.str()) {}
ObjectKey(const ObjectKey &C) { *this = C; }
ObjectKey(ObjectKey &&C) : ObjectKey(static_cast<const ObjectKey &&>(C)) {}
ObjectKey &operator=(const ObjectKey &C) {
if (C.Owned) {
Owned.reset(new std::string(*C.Owned));
Data = *Owned;
} else {
Data = C.Data;
}
return *this;
}
ObjectKey &operator=(ObjectKey &&) = default;
operator llvm::StringRef() const { return Data; }
std::string str() const { return Data.str(); }
private:
// FIXME: this is unneccesarily large (3 pointers). Pointer + length + owned
// could be 2 pointers at most.
std::unique_ptr<std::string> Owned;
llvm::StringRef Data;
};
inline bool operator==(const ObjectKey &L, const ObjectKey &R) {
return llvm::StringRef(L) == llvm::StringRef(R);
}
inline bool operator!=(const ObjectKey &L, const ObjectKey &R) {
return !(L == R);
}
inline bool operator<(const ObjectKey &L, const ObjectKey &R) {
return StringRef(L) < StringRef(R);
}
struct Object::KV {
ObjectKey K;
Value V;
};
inline Object::Object(std::initializer_list<KV> Properties) {
for (const auto &P : Properties) {
auto R = try_emplace(P.K, nullptr);
if (R.second)
R.first->getSecond().moveFrom(std::move(P.V));
}
}
inline std::pair<Object::iterator, bool> Object::insert(KV E) {
return try_emplace(std::move(E.K), std::move(E.V));
}
inline bool Object::erase(StringRef K) {
return M.erase(ObjectKey(K));
}
/// A "cursor" marking a position within a Value.
/// The Value is a tree, and this is the path from the root to the current node.
/// This is used to associate errors with particular subobjects.
class Path {
public:
class Root;
/// Records that the value at the current path is invalid.
/// Message is e.g. "expected number" and becomes part of the final error.
/// This overwrites any previously written error message in the root.
void report(llvm::StringLiteral Message);
/// The root may be treated as a Path.
Path(Root &R) : Parent(nullptr), Seg(&R) {}
/// Derives a path for an array element: this[Index]
Path index(unsigned Index) const { return Path(this, Segment(Index)); }
/// Derives a path for an object field: this.Field
Path field(StringRef Field) const { return Path(this, Segment(Field)); }
private:
/// One element in a JSON path: an object field (.foo) or array index [27].
/// Exception: the root Path encodes a pointer to the Path::Root.
class Segment {
uintptr_t Pointer;
unsigned Offset;
public:
Segment() = default;
Segment(Root *R) : Pointer(reinterpret_cast<uintptr_t>(R)) {}
Segment(llvm::StringRef Field)
: Pointer(reinterpret_cast<uintptr_t>(Field.data())),
Offset(static_cast<unsigned>(Field.size())) {}
Segment(unsigned Index) : Pointer(0), Offset(Index) {}
bool isField() const { return Pointer != 0; }
StringRef field() const {
return StringRef(reinterpret_cast<const char *>(Pointer), Offset);
}
unsigned index() const { return Offset; }
Root *root() const { return reinterpret_cast<Root *>(Pointer); }
};
const Path *Parent;
Segment Seg;
Path(const Path *Parent, Segment S) : Parent(Parent), Seg(S) {}
};
/// The root is the trivial Path to the root value.
/// It also stores the latest reported error and the path where it occurred.
class Path::Root {
llvm::StringRef Name;
llvm::StringLiteral ErrorMessage;
std::vector<Path::Segment> ErrorPath; // Only valid in error state. Reversed.
friend void Path::report(llvm::StringLiteral Message);
public:
Root(llvm::StringRef Name = "") : Name(Name), ErrorMessage("") {}
// No copy/move allowed as there are incoming pointers.
Root(Root &&) = delete;
Root &operator=(Root &&) = delete;
Root(const Root &) = delete;
Root &operator=(const Root &) = delete;
/// Returns the last error reported, or else a generic error.
Error getError() const;
/// Print the root value with the error shown inline as a comment.
/// Unrelated parts of the value are elided for brevity, e.g.
/// {
/// "id": 42,
/// "name": /* expected string */ null,
/// "properties": { ... }
/// }
void printErrorContext(const Value &, llvm::raw_ostream &) const;
};
// Standard deserializers are provided for primitive types.
// See comments on Value.
inline bool fromJSON(const Value &E, std::string &Out, Path P) {
if (auto S = E.getAsString()) {
Out = std::string(*S);
return true;
}
P.report("expected string");
return false;
}
inline bool fromJSON(const Value &E, int &Out, Path P) {
if (auto S = E.getAsInteger()) {
Out = *S;
return true;
}
P.report("expected integer");
return false;
}
inline bool fromJSON(const Value &E, int64_t &Out, Path P) {
if (auto S = E.getAsInteger()) {
Out = *S;
return true;
}
P.report("expected integer");
return false;
}
inline bool fromJSON(const Value &E, double &Out, Path P) {
if (auto S = E.getAsNumber()) {
Out = *S;
return true;
}
P.report("expected number");
return false;
}
inline bool fromJSON(const Value &E, bool &Out, Path P) {
if (auto S = E.getAsBoolean()) {
Out = *S;
return true;
}
P.report("expected boolean");
return false;
}
inline bool fromJSON(const Value &E, uint64_t &Out, Path P) {
if (auto S = E.getAsUINT64()) {
Out = *S;
return true;
}
P.report("expected uint64_t");
return false;
}
inline bool fromJSON(const Value &E, std::nullptr_t &Out, Path P) {
if (auto S = E.getAsNull()) {
Out = *S;
return true;
}
P.report("expected null");
return false;
}
template <typename T>
bool fromJSON(const Value &E, std::optional<T> &Out, Path P) {
if (E.getAsNull()) {
Out = std::nullopt;
return true;
}
T Result = {};
if (!fromJSON(E, Result, P))
return false;
Out = std::move(Result);
return true;
}
template <typename T>
bool fromJSON(const Value &E, std::vector<T> &Out, Path P) {
if (auto *A = E.getAsArray()) {
Out.clear();
Out.resize(A->size());
for (size_t I = 0; I < A->size(); ++I)
if (!fromJSON((*A)[I], Out[I], P.index(I)))
return false;
return true;
}
P.report("expected array");
return false;
}
template <typename T>
bool fromJSON(const Value &E, std::map<std::string, T> &Out, Path P) {
if (auto *O = E.getAsObject()) {
Out.clear();
for (const auto &KV : *O)
if (!fromJSON(KV.second, Out[std::string(llvm::StringRef(KV.first))],
P.field(KV.first)))
return false;
return true;
}
P.report("expected object");
return false;
}
// Allow serialization of std::optional<T> for supported T.
template <typename T> Value toJSON(const std::optional<T> &Opt) {
return Opt ? Value(*Opt) : Value(nullptr);
}
/// Helper for mapping JSON objects onto protocol structs.
///
/// Example:
/// \code
/// bool fromJSON(const Value &E, MyStruct &R, Path P) {
/// ObjectMapper O(E, P);
/// // When returning false, error details were already reported.
/// return O && O.map("mandatory_field", R.MandatoryField) &&
/// O.mapOptional("optional_field", R.OptionalField);
/// }
/// \endcode
class ObjectMapper {
public:
/// If O is not an object, this mapper is invalid and an error is reported.
ObjectMapper(const Value &E, Path P) : O(E.getAsObject()), P(P) {
if (!O)
P.report("expected object");
}
/// True if the expression is an object.
/// Must be checked before calling map().
operator bool() const { return O; }
/// Maps a property to a field.
/// If the property is missing or invalid, reports an error.
template <typename T> bool map(StringLiteral Prop, T &Out) {
assert(*this && "Must check this is an object before calling map()");
if (const Value *E = O->get(Prop))
return fromJSON(*E, Out, P.field(Prop));
P.field(Prop).report("missing value");
return false;
}
/// Maps a property to a field, if it exists.
/// If the property exists and is invalid, reports an error.
/// (Optional requires special handling, because missing keys are OK).
template <typename T> bool map(StringLiteral Prop, std::optional<T> &Out) {
assert(*this && "Must check this is an object before calling map()");
if (const Value *E = O->get(Prop))
return fromJSON(*E, Out, P.field(Prop));
Out = std::nullopt;
return true;
}
/// Maps a property to a field, if it exists.
/// If the property exists and is invalid, reports an error.
/// If the property does not exist, Out is unchanged.
template <typename T> bool mapOptional(StringLiteral Prop, T &Out) {
assert(*this && "Must check this is an object before calling map()");
if (const Value *E = O->get(Prop))
return fromJSON(*E, Out, P.field(Prop));
return true;
}
private:
const Object *O;
Path P;
};
/// Parses the provided JSON source, or returns a ParseError.
/// The returned Value is self-contained and owns its strings (they do not refer
/// to the original source).
llvm::Expected<Value> parse(llvm::StringRef JSON);
class ParseError : public llvm::ErrorInfo<ParseError> {
const char *Msg;
unsigned Line, Column, Offset;
public:
static char ID;
ParseError(const char *Msg, unsigned Line, unsigned Column, unsigned Offset)
: Msg(Msg), Line(Line), Column(Column), Offset(Offset) {}
void log(llvm::raw_ostream &OS) const override {
OS << llvm::formatv("[{0}:{1}, byte={2}]: {3}", Line, Column, Offset, Msg);
}
std::error_code convertToErrorCode() const override {
return llvm::inconvertibleErrorCode();
}
};
/// Version of parse() that converts the parsed value to the type T.
/// RootName describes the root object and is used in error messages.
template <typename T>
Expected<T> parse(const llvm::StringRef &JSON, const char *RootName = "") {
auto V = parse(JSON);
if (!V)
return V.takeError();
Path::Root R(RootName);
T Result;
if (fromJSON(*V, Result, R))
return std::move(Result);
return R.getError();
}
/// json::OStream allows writing well-formed JSON without materializing
/// all structures as json::Value ahead of time.
/// It's faster, lower-level, and less safe than OS << json::Value.
/// It also allows emitting more constructs, such as comments.
///
/// Only one "top-level" object can be written to a stream.
/// Simplest usage involves passing lambdas (Blocks) to fill in containers:
///
/// json::OStream J(OS);
/// J.array([&]{
/// for (const Event &E : Events)
/// J.object([&] {
/// J.attribute("timestamp", int64_t(E.Time));
/// J.attributeArray("participants", [&] {
/// for (const Participant &P : E.Participants)
/// J.value(P.toString());
/// });
/// });
/// });
///
/// This would produce JSON like:
///
/// [
/// {
/// "timestamp": 19287398741,
/// "participants": [
/// "King Kong",
/// "Miley Cyrus",
/// "Cleopatra"
/// ]
/// },
/// ...
/// ]
///
/// The lower level begin/end methods (arrayBegin()) are more flexible but
/// care must be taken to pair them correctly:
///
/// json::OStream J(OS);
// J.arrayBegin();
/// for (const Event &E : Events) {
/// J.objectBegin();
/// J.attribute("timestamp", int64_t(E.Time));
/// J.attributeBegin("participants");
/// for (const Participant &P : E.Participants)
/// J.value(P.toString());
/// J.attributeEnd();
/// J.objectEnd();
/// }
/// J.arrayEnd();
///
/// If the call sequence isn't valid JSON, asserts will fire in debug mode.
/// This can be mismatched begin()/end() pairs, trying to emit attributes inside
/// an array, and so on.
/// With asserts disabled, this is undefined behavior.
class OStream {
public:
using Block = llvm::function_ref<void()>;
// If IndentSize is nonzero, output is pretty-printed.
explicit OStream(llvm::raw_ostream &OS, unsigned IndentSize = 0)
: OS(OS), IndentSize(IndentSize) {
Stack.emplace_back();
}
~OStream() {
assert(Stack.size() == 1 && "Unmatched begin()/end()");
assert(Stack.back().Ctx == Singleton);
assert(Stack.back().HasValue && "Did not write top-level value");
}
/// Flushes the underlying ostream. OStream does not buffer internally.
void flush() { OS.flush(); }
// High level functions to output a value.
// Valid at top-level (exactly once), in an attribute value (exactly once),
// or in an array (any number of times).
/// Emit a self-contained value (number, string, vector<string> etc).
void value(const Value &V);
/// Emit an array whose elements are emitted in the provided Block.
void array(Block Contents) {
arrayBegin();
Contents();
arrayEnd();
}
/// Emit an object whose elements are emitted in the provided Block.
void object(Block Contents) {
objectBegin();
Contents();
objectEnd();
}
/// Emit an externally-serialized value.
/// The caller must write exactly one valid JSON value to the provided stream.
/// No validation or formatting of this value occurs.
void rawValue(llvm::function_ref<void(raw_ostream &)> Contents) {
rawValueBegin();
Contents(OS);
rawValueEnd();
}
void rawValue(llvm::StringRef Contents) {
rawValue([&](raw_ostream &OS) { OS << Contents; });
}
/// Emit a JavaScript comment associated with the next printed value.
/// The string must be valid until the next attribute or value is emitted.
/// Comments are not part of standard JSON, and many parsers reject them!
void comment(llvm::StringRef);
// High level functions to output object attributes.
// Valid only within an object (any number of times).
/// Emit an attribute whose value is self-contained (number, vector<int> etc).
void attribute(llvm::StringRef Key, const Value& Contents) {
attributeImpl(Key, [&] { value(Contents); });
}
/// Emit an attribute whose value is an array with elements from the Block.
void attributeArray(llvm::StringRef Key, Block Contents) {
attributeImpl(Key, [&] { array(Contents); });
}
/// Emit an attribute whose value is an object with attributes from the Block.
void attributeObject(llvm::StringRef Key, Block Contents) {
attributeImpl(Key, [&] { object(Contents); });
}
// Low-level begin/end functions to output arrays, objects, and attributes.
// Must be correctly paired. Allowed contexts are as above.
void arrayBegin();
void arrayEnd();
void objectBegin();
void objectEnd();
void attributeBegin(llvm::StringRef Key);
void attributeEnd();
raw_ostream &rawValueBegin();
void rawValueEnd();
private:
void attributeImpl(llvm::StringRef Key, Block Contents) {
attributeBegin(Key);
Contents();
attributeEnd();
}
void valueBegin();
void flushComment();
void newline();
enum Context {
Singleton, // Top level, or object attribute.
Array,
Object,
RawValue, // External code writing a value to OS directly.
};
struct State {
Context Ctx = Singleton;
bool HasValue = false;
};
llvm::SmallVector<State, 16> Stack; // Never empty.
llvm::StringRef PendingComment;
llvm::raw_ostream &OS;
unsigned IndentSize;
unsigned Indent = 0;
};
/// Serializes this Value to JSON, writing it to the provided stream.
/// The formatting is compact (no extra whitespace) and deterministic.
/// For pretty-printing, use the formatv() format_provider below.
inline llvm::raw_ostream &operator<<(llvm::raw_ostream &OS, const Value &V) {
OStream(OS).value(V);
return OS;
}
} // namespace json
/// Allow printing json::Value with formatv().
/// The default style is basic/compact formatting, like operator<<.
/// A format string like formatv("{0:2}", Value) pretty-prints with indent 2.
template <> struct format_provider<llvm::json::Value> {
static void format(const llvm::json::Value &, raw_ostream &, StringRef);
};
} // namespace llvm
#endif
PK hwFZu��">. >. Support/MemoryBuffer.hnu �[��� //===--- MemoryBuffer.h - Memory Buffer Interface ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the MemoryBuffer interface.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_MEMORYBUFFER_H
#define LLVM_SUPPORT_MEMORYBUFFER_H
#include "llvm-c/Types.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Support/Alignment.h"
#include "llvm/Support/CBindingWrapping.h"
#include "llvm/Support/ErrorOr.h"
#include "llvm/Support/MemoryBufferRef.h"
#include <cstddef>
#include <cstdint>
#include <memory>
namespace llvm {
namespace sys {
namespace fs {
// Duplicated from FileSystem.h to avoid a dependency.
#if defined(_WIN32)
// A Win32 HANDLE is a typedef of void*
using file_t = void *;
#else
using file_t = int;
#endif
} // namespace fs
} // namespace sys
/// This interface provides simple read-only access to a block of memory, and
/// provides simple methods for reading files and standard input into a memory
/// buffer. In addition to basic access to the characters in the file, this
/// interface guarantees you can read one character past the end of the file,
/// and that this character will read as '\0'.
///
/// The '\0' guarantee is needed to support an optimization -- it's intended to
/// be more efficient for clients which are reading all the data to stop
/// reading when they encounter a '\0' than to continually check the file
/// position to see if it has reached the end of the file.
class MemoryBuffer {
const char *BufferStart; // Start of the buffer.
const char *BufferEnd; // End of the buffer.
protected:
MemoryBuffer() = default;
void init(const char *BufStart, const char *BufEnd,
bool RequiresNullTerminator);
public:
MemoryBuffer(const MemoryBuffer &) = delete;
MemoryBuffer &operator=(const MemoryBuffer &) = delete;
virtual ~MemoryBuffer();
const char *getBufferStart() const { return BufferStart; }
const char *getBufferEnd() const { return BufferEnd; }
size_t getBufferSize() const { return BufferEnd-BufferStart; }
StringRef getBuffer() const {
return StringRef(BufferStart, getBufferSize());
}
/// Return an identifier for this buffer, typically the filename it was read
/// from.
virtual StringRef getBufferIdentifier() const { return "Unknown buffer"; }
/// For read-only MemoryBuffer_MMap, mark the buffer as unused in the near
/// future and the kernel can free resources associated with it. Further
/// access is supported but may be expensive. This calls
/// madvise(MADV_DONTNEED) on read-only file mappings on *NIX systems. This
/// function should not be called on a writable buffer.
virtual void dontNeedIfMmap() {}
/// Open the specified file as a MemoryBuffer, returning a new MemoryBuffer
/// if successful, otherwise returning null.
///
/// \param IsText Set to true to indicate that the file should be read in
/// text mode.
///
/// \param IsVolatile Set to true to indicate that the contents of the file
/// can change outside the user's control, e.g. when libclang tries to parse
/// while the user is editing/updating the file or if the file is on an NFS.
///
/// \param Alignment Set to indicate that the buffer should be aligned to at
/// least the specified alignment.
static ErrorOr<std::unique_ptr<MemoryBuffer>>
getFile(const Twine &Filename, bool IsText = false,
bool RequiresNullTerminator = true, bool IsVolatile = false,
std::optional<Align> Alignment = std::nullopt);
/// Read all of the specified file into a MemoryBuffer as a stream
/// (i.e. until EOF reached). This is useful for special files that
/// look like a regular file but have 0 size (e.g. /proc/cpuinfo on Linux).
static ErrorOr<std::unique_ptr<MemoryBuffer>>
getFileAsStream(const Twine &Filename);
/// Given an already-open file descriptor, map some slice of it into a
/// MemoryBuffer. The slice is specified by an \p Offset and \p MapSize.
/// Since this is in the middle of a file, the buffer is not null terminated.
static ErrorOr<std::unique_ptr<MemoryBuffer>>
getOpenFileSlice(sys::fs::file_t FD, const Twine &Filename, uint64_t MapSize,
int64_t Offset, bool IsVolatile = false,
std::optional<Align> Alignment = std::nullopt);
/// Given an already-open file descriptor, read the file and return a
/// MemoryBuffer.
///
/// \param IsVolatile Set to true to indicate that the contents of the file
/// can change outside the user's control, e.g. when libclang tries to parse
/// while the user is editing/updating the file or if the file is on an NFS.
///
/// \param Alignment Set to indicate that the buffer should be aligned to at
/// least the specified alignment.
static ErrorOr<std::unique_ptr<MemoryBuffer>>
getOpenFile(sys::fs::file_t FD, const Twine &Filename, uint64_t FileSize,
bool RequiresNullTerminator = true, bool IsVolatile = false,
std::optional<Align> Alignment = std::nullopt);
/// Open the specified memory range as a MemoryBuffer. Note that InputData
/// must be null terminated if RequiresNullTerminator is true.
static std::unique_ptr<MemoryBuffer>
getMemBuffer(StringRef InputData, StringRef BufferName = "",
bool RequiresNullTerminator = true);
static std::unique_ptr<MemoryBuffer>
getMemBuffer(MemoryBufferRef Ref, bool RequiresNullTerminator = true);
/// Open the specified memory range as a MemoryBuffer, copying the contents
/// and taking ownership of it. InputData does not have to be null terminated.
static std::unique_ptr<MemoryBuffer>
getMemBufferCopy(StringRef InputData, const Twine &BufferName = "");
/// Read all of stdin into a file buffer, and return it.
static ErrorOr<std::unique_ptr<MemoryBuffer>> getSTDIN();
/// Open the specified file as a MemoryBuffer, or open stdin if the Filename
/// is "-".
static ErrorOr<std::unique_ptr<MemoryBuffer>>
getFileOrSTDIN(const Twine &Filename, bool IsText = false,
bool RequiresNullTerminator = true,
std::optional<Align> Alignment = std::nullopt);
/// Map a subrange of the specified file as a MemoryBuffer.
static ErrorOr<std::unique_ptr<MemoryBuffer>>
getFileSlice(const Twine &Filename, uint64_t MapSize, uint64_t Offset,
bool IsVolatile = false,
std::optional<Align> Alignment = std::nullopt);
//===--------------------------------------------------------------------===//
// Provided for performance analysis.
//===--------------------------------------------------------------------===//
/// The kind of memory backing used to support the MemoryBuffer.
enum BufferKind {
MemoryBuffer_Malloc,
MemoryBuffer_MMap
};
/// Return information on the memory mechanism used to support the
/// MemoryBuffer.
virtual BufferKind getBufferKind() const = 0;
MemoryBufferRef getMemBufferRef() const;
};
/// This class is an extension of MemoryBuffer, which allows copy-on-write
/// access to the underlying contents. It only supports creation methods that
/// are guaranteed to produce a writable buffer. For example, mapping a file
/// read-only is not supported.
class WritableMemoryBuffer : public MemoryBuffer {
protected:
WritableMemoryBuffer() = default;
public:
using MemoryBuffer::getBuffer;
using MemoryBuffer::getBufferEnd;
using MemoryBuffer::getBufferStart;
// const_cast is well-defined here, because the underlying buffer is
// guaranteed to have been initialized with a mutable buffer.
char *getBufferStart() {
return const_cast<char *>(MemoryBuffer::getBufferStart());
}
char *getBufferEnd() {
return const_cast<char *>(MemoryBuffer::getBufferEnd());
}
MutableArrayRef<char> getBuffer() {
return {getBufferStart(), getBufferEnd()};
}
static ErrorOr<std::unique_ptr<WritableMemoryBuffer>>
getFile(const Twine &Filename, bool IsVolatile = false,
std::optional<Align> Alignment = std::nullopt);
/// Map a subrange of the specified file as a WritableMemoryBuffer.
static ErrorOr<std::unique_ptr<WritableMemoryBuffer>>
getFileSlice(const Twine &Filename, uint64_t MapSize, uint64_t Offset,
bool IsVolatile = false,
std::optional<Align> Alignment = std::nullopt);
/// Allocate a new MemoryBuffer of the specified size that is not initialized.
/// Note that the caller should initialize the memory allocated by this
/// method. The memory is owned by the MemoryBuffer object.
///
/// \param Alignment Set to indicate that the buffer should be aligned to at
/// least the specified alignment.
static std::unique_ptr<WritableMemoryBuffer>
getNewUninitMemBuffer(size_t Size, const Twine &BufferName = "",
std::optional<Align> Alignment = std::nullopt);
/// Allocate a new zero-initialized MemoryBuffer of the specified size. Note
/// that the caller need not initialize the memory allocated by this method.
/// The memory is owned by the MemoryBuffer object.
static std::unique_ptr<WritableMemoryBuffer>
getNewMemBuffer(size_t Size, const Twine &BufferName = "");
private:
// Hide these base class factory function so one can't write
// WritableMemoryBuffer::getXXX()
// and be surprised that he got a read-only Buffer.
using MemoryBuffer::getFileAsStream;
using MemoryBuffer::getFileOrSTDIN;
using MemoryBuffer::getMemBuffer;
using MemoryBuffer::getMemBufferCopy;
using MemoryBuffer::getOpenFile;
using MemoryBuffer::getOpenFileSlice;
using MemoryBuffer::getSTDIN;
};
/// This class is an extension of MemoryBuffer, which allows write access to
/// the underlying contents and committing those changes to the original source.
/// It only supports creation methods that are guaranteed to produce a writable
/// buffer. For example, mapping a file read-only is not supported.
class WriteThroughMemoryBuffer : public MemoryBuffer {
protected:
WriteThroughMemoryBuffer() = default;
public:
using MemoryBuffer::getBuffer;
using MemoryBuffer::getBufferEnd;
using MemoryBuffer::getBufferStart;
// const_cast is well-defined here, because the underlying buffer is
// guaranteed to have been initialized with a mutable buffer.
char *getBufferStart() {
return const_cast<char *>(MemoryBuffer::getBufferStart());
}
char *getBufferEnd() {
return const_cast<char *>(MemoryBuffer::getBufferEnd());
}
MutableArrayRef<char> getBuffer() {
return {getBufferStart(), getBufferEnd()};
}
static ErrorOr<std::unique_ptr<WriteThroughMemoryBuffer>>
getFile(const Twine &Filename, int64_t FileSize = -1);
/// Map a subrange of the specified file as a ReadWriteMemoryBuffer.
static ErrorOr<std::unique_ptr<WriteThroughMemoryBuffer>>
getFileSlice(const Twine &Filename, uint64_t MapSize, uint64_t Offset);
private:
// Hide these base class factory function so one can't write
// WritableMemoryBuffer::getXXX()
// and be surprised that he got a read-only Buffer.
using MemoryBuffer::getFileAsStream;
using MemoryBuffer::getFileOrSTDIN;
using MemoryBuffer::getMemBuffer;
using MemoryBuffer::getMemBufferCopy;
using MemoryBuffer::getOpenFile;
using MemoryBuffer::getOpenFileSlice;
using MemoryBuffer::getSTDIN;
};
// Create wrappers for C Binding types (see CBindingWrapping.h).
DEFINE_SIMPLE_CONVERSION_FUNCTIONS(MemoryBuffer, LLVMMemoryBufferRef)
} // end namespace llvm
#endif // LLVM_SUPPORT_MEMORYBUFFER_H
PK hwFZ,���! ! Support/MemoryBufferRef.hnu �[��� //===- MemoryBufferRef.h - Memory Buffer Reference --------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the MemoryBuffer interface.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_MEMORYBUFFERREF_H
#define LLVM_SUPPORT_MEMORYBUFFERREF_H
#include "llvm/ADT/StringRef.h"
namespace llvm {
class MemoryBuffer;
class MemoryBufferRef {
StringRef Buffer;
StringRef Identifier;
public:
MemoryBufferRef() = default;
MemoryBufferRef(const MemoryBuffer &Buffer);
MemoryBufferRef(StringRef Buffer, StringRef Identifier)
: Buffer(Buffer), Identifier(Identifier) {}
StringRef getBuffer() const { return Buffer; }
StringRef getBufferIdentifier() const { return Identifier; }
const char *getBufferStart() const { return Buffer.begin(); }
const char *getBufferEnd() const { return Buffer.end(); }
size_t getBufferSize() const { return Buffer.size(); }
/// Check pointer identity (not value) of identifier and data.
friend bool operator==(const MemoryBufferRef &LHS,
const MemoryBufferRef &RHS) {
return LHS.Buffer.begin() == RHS.Buffer.begin() &&
LHS.Buffer.end() == RHS.Buffer.end() &&
LHS.Identifier.begin() == RHS.Identifier.begin() &&
LHS.Identifier.end() == RHS.Identifier.end();
}
friend bool operator!=(const MemoryBufferRef &LHS,
const MemoryBufferRef &RHS) {
return !(LHS == RHS);
}
};
} // namespace llvm
#endif // LLVM_SUPPORT_MEMORYBUFFERREF_H
PK hwFZZ�`.S S Support/RISCVTargetParser.defnu �[��� #ifndef PROC_ALIAS
#define PROC_ALIAS(NAME, RV32, RV64)
#endif
PROC_ALIAS("generic", "generic-rv32", "generic-rv64")
PROC_ALIAS("rocket", "rocket-rv32", "rocket-rv64")
PROC_ALIAS("sifive-7-series", "sifive-7-rv32", "sifive-7-rv64")
#undef PROC_ALIAS
#ifndef PROC
#define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH)
#endif
PROC(INVALID, {"invalid"}, FK_INVALID, {""})
PROC(GENERIC_RV32, {"generic-rv32"}, FK_NONE, {""})
PROC(GENERIC_RV64, {"generic-rv64"}, FK_64BIT, {""})
PROC(ROCKET_RV32, {"rocket-rv32"}, FK_NONE, {""})
PROC(ROCKET_RV64, {"rocket-rv64"}, FK_64BIT, {""})
PROC(SIFIVE_732, {"sifive-7-rv32"}, FK_NONE, {""})
PROC(SIFIVE_764, {"sifive-7-rv64"}, FK_64BIT, {""})
PROC(SIFIVE_E20, {"sifive-e20"}, FK_NONE, {"rv32imc"})
PROC(SIFIVE_E21, {"sifive-e21"}, FK_NONE, {"rv32imac"})
PROC(SIFIVE_E24, {"sifive-e24"}, FK_NONE, {"rv32imafc"})
PROC(SIFIVE_E31, {"sifive-e31"}, FK_NONE, {"rv32imac"})
PROC(SIFIVE_E34, {"sifive-e34"}, FK_NONE, {"rv32imafc"})
PROC(SIFIVE_E76, {"sifive-e76"}, FK_NONE, {"rv32imafc"})
PROC(SIFIVE_S21, {"sifive-s21"}, FK_64BIT, {"rv64imac"})
PROC(SIFIVE_S51, {"sifive-s51"}, FK_64BIT, {"rv64imac"})
PROC(SIFIVE_S54, {"sifive-s54"}, FK_64BIT, {"rv64gc"})
PROC(SIFIVE_S76, {"sifive-s76"}, FK_64BIT, {"rv64gc"})
PROC(SIFIVE_U54, {"sifive-u54"}, FK_64BIT, {"rv64gc"})
PROC(SIFIVE_U74, {"sifive-u74"}, FK_64BIT, {"rv64gc"})
#undef PROC
PK hwFZT��\ \ Support/Atomic.hnu �[��� //===- llvm/Support/Atomic.h - Atomic Operations -----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the llvm::sys atomic operations.
//
// DO NOT USE IN NEW CODE!
//
// New code should always rely on the std::atomic facilities in C++11.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ATOMIC_H
#define LLVM_SUPPORT_ATOMIC_H
#include "llvm/Support/DataTypes.h"
// Windows will at times define MemoryFence.
#ifdef MemoryFence
#undef MemoryFence
#endif
namespace llvm {
namespace sys {
void MemoryFence();
#ifdef _MSC_VER
typedef long cas_flag;
#else
typedef uint32_t cas_flag;
#endif
cas_flag CompareAndSwap(volatile cas_flag* ptr,
cas_flag new_value,
cas_flag old_value);
}
}
#endif
PK hwFZd�S$ S$ Support/ARMBuildAttributes.hnu �[��� //===-- ARMBuildAttributes.h - ARM Build Attributes -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains enumerations and support routines for ARM build attributes
// as defined in ARM ABI addenda document (ABI release 2.08).
//
// ELF for the ARM Architecture r2.09 - November 30, 2012
//
// http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044e/IHI0044E_aaelf.pdf
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ARMBUILDATTRIBUTES_H
#define LLVM_SUPPORT_ARMBUILDATTRIBUTES_H
#include "llvm/Support/ELFAttributes.h"
namespace llvm {
namespace ARMBuildAttrs {
const TagNameMap &getARMAttributeTags();
enum SpecialAttr {
// This is for the .cpu asm attr. It translates into one or more
// AttrType (below) entries in the .ARM.attributes section in the ELF.
SEL_CPU
};
enum AttrType : unsigned {
// Rest correspond to ELF/.ARM.attributes
File = 1,
CPU_raw_name = 4,
CPU_name = 5,
CPU_arch = 6,
CPU_arch_profile = 7,
ARM_ISA_use = 8,
THUMB_ISA_use = 9,
FP_arch = 10,
WMMX_arch = 11,
Advanced_SIMD_arch = 12,
PCS_config = 13,
ABI_PCS_R9_use = 14,
ABI_PCS_RW_data = 15,
ABI_PCS_RO_data = 16,
ABI_PCS_GOT_use = 17,
ABI_PCS_wchar_t = 18,
ABI_FP_rounding = 19,
ABI_FP_denormal = 20,
ABI_FP_exceptions = 21,
ABI_FP_user_exceptions = 22,
ABI_FP_number_model = 23,
ABI_align_needed = 24,
ABI_align_preserved = 25,
ABI_enum_size = 26,
ABI_HardFP_use = 27,
ABI_VFP_args = 28,
ABI_WMMX_args = 29,
ABI_optimization_goals = 30,
ABI_FP_optimization_goals = 31,
compatibility = 32,
CPU_unaligned_access = 34,
FP_HP_extension = 36,
ABI_FP_16bit_format = 38,
MPextension_use = 42, // recoded from 70 (ABI r2.08)
DIV_use = 44,
DSP_extension = 46,
MVE_arch = 48,
PAC_extension = 50,
BTI_extension = 52,
also_compatible_with = 65,
conformance = 67,
Virtualization_use = 68,
BTI_use = 74,
PACRET_use = 76,
/// Legacy Tags
Section = 2, // deprecated (ABI r2.09)
Symbol = 3, // deprecated (ABI r2.09)
ABI_align8_needed = 24, // renamed to ABI_align_needed (ABI r2.09)
ABI_align8_preserved = 25, // renamed to ABI_align_preserved (ABI r2.09)
nodefaults = 64, // deprecated (ABI r2.09)
T2EE_use = 66, // deprecated (ABI r2.09)
MPextension_use_old = 70 // recoded to MPextension_use (ABI r2.08)
};
// Legal Values for CPU_arch, (=6), uleb128
enum CPUArch {
Pre_v4 = 0,
v4 = 1, // e.g. SA110
v4T = 2, // e.g. ARM7TDMI
v5T = 3, // e.g. ARM9TDMI
v5TE = 4, // e.g. ARM946E_S
v5TEJ = 5, // e.g. ARM926EJ_S
v6 = 6, // e.g. ARM1136J_S
v6KZ = 7, // e.g. ARM1176JZ_S
v6T2 = 8, // e.g. ARM1156T2_S
v6K = 9, // e.g. ARM1176JZ_S
v7 = 10, // e.g. Cortex A8, Cortex M3
v6_M = 11, // e.g. Cortex M1
v6S_M = 12, // v6_M with the System extensions
v7E_M = 13, // v7_M with DSP extensions
v8_A = 14, // v8_A AArch32
v8_R = 15, // e.g. Cortex R52
v8_M_Base = 16, // v8_M_Base AArch32
v8_M_Main = 17, // v8_M_Main AArch32
v8_1_M_Main = 21, // v8_1_M_Main AArch32
v9_A = 22, // v9_A AArch32
};
enum CPUArchProfile { // (=7), uleb128
Not_Applicable = 0, // pre v7, or cross-profile code
ApplicationProfile = (0x41), // 'A' (e.g. for Cortex A8)
RealTimeProfile = (0x52), // 'R' (e.g. for Cortex R4)
MicroControllerProfile = (0x4D), // 'M' (e.g. for Cortex M3)
SystemProfile = (0x53) // 'S' Application or real-time profile
};
// The following have a lot of common use cases
enum {
Not_Allowed = 0,
Allowed = 1,
// Tag_ARM_ISA_use (=8), uleb128
// Tag_THUMB_ISA_use, (=9), uleb128
AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions)
AllowThumbDerived = 3, // Thumb allowed, derived from arch/profile
// Tag_FP_arch (=10), uleb128 (formerly Tag_VFP_arch = 10)
AllowFPv2 = 2, // v2 FP ISA permitted (implies use of the v1 FP ISA)
AllowFPv3A = 3, // v3 FP ISA permitted (implies use of the v2 FP ISA)
AllowFPv3B = 4, // v3 FP ISA permitted, but only D0-D15, S0-S31
AllowFPv4A = 5, // v4 FP ISA permitted (implies use of v3 FP ISA)
AllowFPv4B = 6, // v4 FP ISA was permitted, but only D0-D15, S0-S31
AllowFPARMv8A = 7, // Use of the ARM v8-A FP ISA was permitted
AllowFPARMv8B = 8, // Use of the ARM v8-A FP ISA was permitted, but only
// D0-D15, S0-S31
// Tag_WMMX_arch, (=11), uleb128
AllowWMMXv1 = 1, // The user permitted this entity to use WMMX v1
AllowWMMXv2 = 2, // The user permitted this entity to use WMMX v2
// Tag_Advanced_SIMD_arch, (=12), uleb128
AllowNeon = 1, // SIMDv1 was permitted
AllowNeon2 = 2, // SIMDv2 was permitted (Half-precision FP, MAC operations)
AllowNeonARMv8 = 3, // ARM v8-A SIMD was permitted
AllowNeonARMv8_1a = 4,// ARM v8.1-A SIMD was permitted (RDMA)
// Tag_MVE_arch, (=48), uleb128
AllowMVEInteger = 1, // integer-only MVE was permitted
AllowMVEIntegerAndFloat = 2, // both integer and floating point MVE were permitted
// Tag_ABI_PCS_R9_use, (=14), uleb128
R9IsGPR = 0, // R9 used as v6 (just another callee-saved register)
R9IsSB = 1, // R9 used as a global static base rgister
R9IsTLSPointer = 2, // R9 used as a thread local storage pointer
R9Reserved = 3, // R9 not used by code associated with attributed entity
// Tag_ABI_PCS_RW_data, (=15), uleb128
AddressRWPCRel = 1, // Address RW static data PC-relative
AddressRWSBRel = 2, // Address RW static data SB-relative
AddressRWNone = 3, // No RW static data permitted
// Tag_ABI_PCS_RO_data, (=14), uleb128
AddressROPCRel = 1, // Address RO static data PC-relative
AddressRONone = 2, // No RO static data permitted
// Tag_ABI_PCS_GOT_use, (=17), uleb128
AddressDirect = 1, // Address imported data directly
AddressGOT = 2, // Address imported data indirectly (via GOT)
// Tag_ABI_PCS_wchar_t, (=18), uleb128
WCharProhibited = 0, // wchar_t is not used
WCharWidth2Bytes = 2, // sizeof(wchar_t) == 2
WCharWidth4Bytes = 4, // sizeof(wchar_t) == 4
// Tag_ABI_align_needed, (=24), uleb128
Align8Byte = 1,
Align4Byte = 2,
AlignReserved = 3,
// Tag_ABI_align_needed, (=25), uleb128
AlignNotPreserved = 0,
AlignPreserve8Byte = 1,
AlignPreserveAll = 2,
// Tag_ABI_FP_denormal, (=20), uleb128
PositiveZero = 0,
IEEEDenormals = 1,
PreserveFPSign = 2, // sign when flushed-to-zero is preserved
// Tag_ABI_FP_number_model, (=23), uleb128
AllowIEEENormal = 1,
AllowRTABI = 2, // numbers, infinities, and one quiet NaN (see [RTABI])
AllowIEEE754 = 3, // this code to use all the IEEE 754-defined FP encodings
// Tag_ABI_enum_size, (=26), uleb128
EnumProhibited = 0, // The user prohibited the use of enums when building
// this entity.
EnumSmallest = 1, // Enum is smallest container big enough to hold all
// values.
Enum32Bit = 2, // Enum is at least 32 bits.
Enum32BitABI = 3, // Every enumeration visible across an ABI-complying
// interface contains a value needing 32 bits to encode
// it; other enums can be containerized.
// Tag_ABI_HardFP_use, (=27), uleb128
HardFPImplied = 0, // FP use should be implied by Tag_FP_arch
HardFPSinglePrecision = 1, // Single-precision only
// Tag_ABI_VFP_args, (=28), uleb128
BaseAAPCS = 0,
HardFPAAPCS = 1,
ToolChainFPPCS = 2,
CompatibleFPAAPCS = 3,
// Tag_FP_HP_extension, (=36), uleb128
AllowHPFP = 1, // Allow use of Half Precision FP
// Tag_FP_16bit_format, (=38), uleb128
FP16FormatIEEE = 1,
FP16VFP3 = 2,
// Tag_MPextension_use, (=42), uleb128
AllowMP = 1, // Allow use of MP extensions
// Tag_DIV_use, (=44), uleb128
// Note: AllowDIVExt must be emitted if and only if the permission to use
// hardware divide cannot be conveyed using AllowDIVIfExists or DisallowDIV
AllowDIVIfExists = 0, // Allow hardware divide if available in arch, or no
// info exists.
DisallowDIV = 1, // Hardware divide explicitly disallowed.
AllowDIVExt = 2, // Allow hardware divide as optional architecture
// extension above the base arch specified by
// Tag_CPU_arch and Tag_CPU_arch_profile.
// Tag_Virtualization_use, (=68), uleb128
AllowTZ = 1,
AllowVirtualization = 2,
AllowTZVirtualization = 3,
// Tag_PAC_extension, (=50), uleb128
DisallowPAC = 0,
AllowPACInNOPSpace = 1,
AllowPAC = 2,
// Tag_BTI_extension, (=52), uleb128
DisallowBTI = 0,
AllowBTIInNOPSpace = 1,
AllowBTI = 2,
// Tag_BTI_use, (=74), uleb128
BTINotUsed = 0,
BTIUsed = 1,
// Tag_PACRET_use, (=76), uleb128
PACRETNotUsed = 0,
PACRETUsed = 1
};
} // namespace ARMBuildAttrs
} // namespace llvm
#endif
PK hwFZ͓NB/ / Support/LICENSE.TXTnu �[��� LLVM System Interface Library
-------------------------------------------------------------------------------
Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
See https://llvm.org/LICENSE.txt for license information.
SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
PK hwFZ����� � Support/circular_raw_ostream.hnu �[��� //===-- llvm/Support/circular_raw_ostream.h - Buffered streams --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains raw_ostream implementations for streams to do circular
// buffering of their output.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_CIRCULAR_RAW_OSTREAM_H
#define LLVM_SUPPORT_CIRCULAR_RAW_OSTREAM_H
#include "llvm/Support/raw_ostream.h"
namespace llvm {
/// circular_raw_ostream - A raw_ostream which *can* save its data
/// to a circular buffer, or can pass it through directly to an
/// underlying stream if specified with a buffer of zero.
///
class circular_raw_ostream : public raw_ostream {
public:
/// TAKE_OWNERSHIP - Tell this stream that it owns the underlying
/// stream and is responsible for cleanup, memory management
/// issues, etc.
///
static constexpr bool TAKE_OWNERSHIP = true;
/// REFERENCE_ONLY - Tell this stream it should not manage the
/// held stream.
///
static constexpr bool REFERENCE_ONLY = false;
private:
/// TheStream - The real stream we output to. We set it to be
/// unbuffered, since we're already doing our own buffering.
///
raw_ostream *TheStream = nullptr;
/// OwnsStream - Are we responsible for managing the underlying
/// stream?
///
bool OwnsStream;
/// BufferSize - The size of the buffer in bytes.
///
size_t BufferSize;
/// BufferArray - The actual buffer storage.
///
char *BufferArray = nullptr;
/// Cur - Pointer to the current output point in BufferArray.
///
char *Cur;
/// Filled - Indicate whether the buffer has been completely
/// filled. This helps avoid garbage output.
///
bool Filled = false;
/// Banner - A pointer to a banner to print before dumping the
/// log.
///
const char *Banner;
/// flushBuffer - Dump the contents of the buffer to Stream.
///
void flushBuffer() {
if (Filled)
// Write the older portion of the buffer.
TheStream->write(Cur, BufferArray + BufferSize - Cur);
// Write the newer portion of the buffer.
TheStream->write(BufferArray, Cur - BufferArray);
Cur = BufferArray;
Filled = false;
}
void write_impl(const char *Ptr, size_t Size) override;
/// current_pos - Return the current position within the stream,
/// not counting the bytes currently in the buffer.
///
uint64_t current_pos() const override {
// This has the same effect as calling TheStream.current_pos(),
// but that interface is private.
return TheStream->tell() - TheStream->GetNumBytesInBuffer();
}
public:
/// circular_raw_ostream - Construct an optionally
/// circular-buffered stream, handing it an underlying stream to
/// do the "real" output.
///
/// As a side effect, if BuffSize is nonzero, the given Stream is
/// set to be Unbuffered. This is because circular_raw_ostream
/// does its own buffering, so it doesn't want another layer of
/// buffering to be happening underneath it.
///
/// "Owns" tells the circular_raw_ostream whether it is
/// responsible for managing the held stream, doing memory
/// management of it, etc.
///
circular_raw_ostream(raw_ostream &Stream, const char *Header,
size_t BuffSize = 0, bool Owns = REFERENCE_ONLY)
: raw_ostream(/*unbuffered*/ true), OwnsStream(Owns),
BufferSize(BuffSize), Banner(Header) {
if (BufferSize != 0)
BufferArray = new char[BufferSize];
Cur = BufferArray;
setStream(Stream, Owns);
}
~circular_raw_ostream() override {
flush();
flushBufferWithBanner();
releaseStream();
delete[] BufferArray;
}
bool is_displayed() const override {
return TheStream->is_displayed();
}
/// setStream - Tell the circular_raw_ostream to output a
/// different stream. "Owns" tells circular_raw_ostream whether
/// it should take responsibility for managing the underlying
/// stream.
///
void setStream(raw_ostream &Stream, bool Owns = REFERENCE_ONLY) {
releaseStream();
TheStream = &Stream;
OwnsStream = Owns;
}
/// flushBufferWithBanner - Force output of the buffer along with
/// a small header.
///
void flushBufferWithBanner();
private:
/// releaseStream - Delete the held stream if needed. Otherwise,
/// transfer the buffer settings from this circular_raw_ostream
/// back to the underlying stream.
///
void releaseStream() {
if (!TheStream)
return;
if (OwnsStream)
delete TheStream;
}
};
} // end llvm namespace
#endif
PK hwFZ�G� �; �; Support/TrailingObjects.hnu �[��� //===--- TrailingObjects.h - Variable-length classes ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This header defines support for implementing classes that have
/// some trailing object (or arrays of objects) appended to them. The
/// main purpose is to make it obvious where this idiom is being used,
/// and to make the usage more idiomatic and more difficult to get
/// wrong.
///
/// The TrailingObject template abstracts away the reinterpret_cast,
/// pointer arithmetic, and size calculations used for the allocation
/// and access of appended arrays of objects, and takes care that they
/// are all allocated at their required alignment. Additionally, it
/// ensures that the base type is final -- deriving from a class that
/// expects data appended immediately after it is typically not safe.
///
/// Users are expected to derive from this template, and provide
/// numTrailingObjects implementations for each trailing type except
/// the last, e.g. like this sample:
///
/// \code
/// class VarLengthObj : private TrailingObjects<VarLengthObj, int, double> {
/// friend TrailingObjects;
///
/// unsigned NumInts, NumDoubles;
/// size_t numTrailingObjects(OverloadToken<int>) const { return NumInts; }
/// };
/// \endcode
///
/// You can access the appended arrays via 'getTrailingObjects', and
/// determine the size needed for allocation via
/// 'additionalSizeToAlloc' and 'totalSizeToAlloc'.
///
/// All the methods implemented by this class are are intended for use
/// by the implementation of the class, not as part of its interface
/// (thus, private inheritance is suggested).
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_TRAILINGOBJECTS_H
#define LLVM_SUPPORT_TRAILINGOBJECTS_H
#include "llvm/Support/AlignOf.h"
#include "llvm/Support/Alignment.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/type_traits.h"
#include <new>
#include <type_traits>
namespace llvm {
namespace trailing_objects_internal {
/// Helper template to calculate the max alignment requirement for a set of
/// objects.
template <typename First, typename... Rest> class AlignmentCalcHelper {
private:
enum {
FirstAlignment = alignof(First),
RestAlignment = AlignmentCalcHelper<Rest...>::Alignment,
};
public:
enum {
Alignment = FirstAlignment > RestAlignment ? FirstAlignment : RestAlignment
};
};
template <typename First> class AlignmentCalcHelper<First> {
public:
enum { Alignment = alignof(First) };
};
/// The base class for TrailingObjects* classes.
class TrailingObjectsBase {
protected:
/// OverloadToken's purpose is to allow specifying function overloads
/// for different types, without actually taking the types as
/// parameters. (Necessary because member function templates cannot
/// be specialized, so overloads must be used instead of
/// specialization.)
template <typename T> struct OverloadToken {};
};
// Just a little helper for transforming a type pack into the same
// number of a different type. e.g.:
// ExtractSecondType<Foo..., int>::type
template <typename Ty1, typename Ty2> struct ExtractSecondType {
typedef Ty2 type;
};
// TrailingObjectsImpl is somewhat complicated, because it is a
// recursively inheriting template, in order to handle the template
// varargs. Each level of inheritance picks off a single trailing type
// then recurses on the rest. The "Align", "BaseTy", and
// "TopTrailingObj" arguments are passed through unchanged through the
// recursion. "PrevTy" is, at each level, the type handled by the
// level right above it.
template <int Align, typename BaseTy, typename TopTrailingObj, typename PrevTy,
typename... MoreTys>
class TrailingObjectsImpl {
// The main template definition is never used -- the two
// specializations cover all possibilities.
};
template <int Align, typename BaseTy, typename TopTrailingObj, typename PrevTy,
typename NextTy, typename... MoreTys>
class TrailingObjectsImpl<Align, BaseTy, TopTrailingObj, PrevTy, NextTy,
MoreTys...>
: public TrailingObjectsImpl<Align, BaseTy, TopTrailingObj, NextTy,
MoreTys...> {
typedef TrailingObjectsImpl<Align, BaseTy, TopTrailingObj, NextTy, MoreTys...>
ParentType;
struct RequiresRealignment {
static const bool value = alignof(PrevTy) < alignof(NextTy);
};
static constexpr bool requiresRealignment() {
return RequiresRealignment::value;
}
protected:
// Ensure the inherited getTrailingObjectsImpl is not hidden.
using ParentType::getTrailingObjectsImpl;
// These two functions are helper functions for
// TrailingObjects::getTrailingObjects. They recurse to the left --
// the result for each type in the list of trailing types depends on
// the result of calling the function on the type to the
// left. However, the function for the type to the left is
// implemented by a *subclass* of this class, so we invoke it via
// the TopTrailingObj, which is, via the
// curiously-recurring-template-pattern, the most-derived type in
// this recursion, and thus, contains all the overloads.
static const NextTy *
getTrailingObjectsImpl(const BaseTy *Obj,
TrailingObjectsBase::OverloadToken<NextTy>) {
auto *Ptr = TopTrailingObj::getTrailingObjectsImpl(
Obj, TrailingObjectsBase::OverloadToken<PrevTy>()) +
TopTrailingObj::callNumTrailingObjects(
Obj, TrailingObjectsBase::OverloadToken<PrevTy>());
if (requiresRealignment())
return reinterpret_cast<const NextTy *>(
alignAddr(Ptr, Align::Of<NextTy>()));
else
return reinterpret_cast<const NextTy *>(Ptr);
}
static NextTy *
getTrailingObjectsImpl(BaseTy *Obj,
TrailingObjectsBase::OverloadToken<NextTy>) {
auto *Ptr = TopTrailingObj::getTrailingObjectsImpl(
Obj, TrailingObjectsBase::OverloadToken<PrevTy>()) +
TopTrailingObj::callNumTrailingObjects(
Obj, TrailingObjectsBase::OverloadToken<PrevTy>());
if (requiresRealignment())
return reinterpret_cast<NextTy *>(alignAddr(Ptr, Align::Of<NextTy>()));
else
return reinterpret_cast<NextTy *>(Ptr);
}
// Helper function for TrailingObjects::additionalSizeToAlloc: this
// function recurses to superclasses, each of which requires one
// fewer size_t argument, and adds its own size.
static constexpr size_t additionalSizeToAllocImpl(
size_t SizeSoFar, size_t Count1,
typename ExtractSecondType<MoreTys, size_t>::type... MoreCounts) {
return ParentType::additionalSizeToAllocImpl(
(requiresRealignment() ? llvm::alignTo<alignof(NextTy)>(SizeSoFar)
: SizeSoFar) +
sizeof(NextTy) * Count1,
MoreCounts...);
}
};
// The base case of the TrailingObjectsImpl inheritance recursion,
// when there's no more trailing types.
template <int Align, typename BaseTy, typename TopTrailingObj, typename PrevTy>
class alignas(Align) TrailingObjectsImpl<Align, BaseTy, TopTrailingObj, PrevTy>
: public TrailingObjectsBase {
protected:
// This is a dummy method, only here so the "using" doesn't fail --
// it will never be called, because this function recurses backwards
// up the inheritance chain to subclasses.
static void getTrailingObjectsImpl();
static constexpr size_t additionalSizeToAllocImpl(size_t SizeSoFar) {
return SizeSoFar;
}
template <bool CheckAlignment> static void verifyTrailingObjectsAlignment() {}
};
} // end namespace trailing_objects_internal
// Finally, the main type defined in this file, the one intended for users...
/// See the file comment for details on the usage of the
/// TrailingObjects type.
template <typename BaseTy, typename... TrailingTys>
class TrailingObjects : private trailing_objects_internal::TrailingObjectsImpl<
trailing_objects_internal::AlignmentCalcHelper<
TrailingTys...>::Alignment,
BaseTy, TrailingObjects<BaseTy, TrailingTys...>,
BaseTy, TrailingTys...> {
template <int A, typename B, typename T, typename P, typename... M>
friend class trailing_objects_internal::TrailingObjectsImpl;
template <typename... Tys> class Foo {};
typedef trailing_objects_internal::TrailingObjectsImpl<
trailing_objects_internal::AlignmentCalcHelper<TrailingTys...>::Alignment,
BaseTy, TrailingObjects<BaseTy, TrailingTys...>, BaseTy, TrailingTys...>
ParentType;
using TrailingObjectsBase = trailing_objects_internal::TrailingObjectsBase;
using ParentType::getTrailingObjectsImpl;
// This function contains only a static_assert BaseTy is final. The
// static_assert must be in a function, and not at class-level
// because BaseTy isn't complete at class instantiation time, but
// will be by the time this function is instantiated.
static void verifyTrailingObjectsAssertions() {
static_assert(std::is_final<BaseTy>(), "BaseTy must be final.");
}
// These two methods are the base of the recursion for this method.
static const BaseTy *
getTrailingObjectsImpl(const BaseTy *Obj,
TrailingObjectsBase::OverloadToken<BaseTy>) {
return Obj;
}
static BaseTy *
getTrailingObjectsImpl(BaseTy *Obj,
TrailingObjectsBase::OverloadToken<BaseTy>) {
return Obj;
}
// callNumTrailingObjects simply calls numTrailingObjects on the
// provided Obj -- except when the type being queried is BaseTy
// itself. There is always only one of the base object, so that case
// is handled here. (An additional benefit of indirecting through
// this function is that consumers only say "friend
// TrailingObjects", and thus, only this class itself can call the
// numTrailingObjects function.)
static size_t
callNumTrailingObjects(const BaseTy *Obj,
TrailingObjectsBase::OverloadToken<BaseTy>) {
return 1;
}
template <typename T>
static size_t callNumTrailingObjects(const BaseTy *Obj,
TrailingObjectsBase::OverloadToken<T>) {
return Obj->numTrailingObjects(TrailingObjectsBase::OverloadToken<T>());
}
public:
// Make this (privately inherited) member public.
#ifndef _MSC_VER
using ParentType::OverloadToken;
#else
// An MSVC bug prevents the above from working, (last tested at CL version
// 19.28). "Class5" in TrailingObjectsTest.cpp tests the problematic case.
template <typename T>
using OverloadToken = typename ParentType::template OverloadToken<T>;
#endif
/// Returns a pointer to the trailing object array of the given type
/// (which must be one of those specified in the class template). The
/// array may have zero or more elements in it.
template <typename T> const T *getTrailingObjects() const {
verifyTrailingObjectsAssertions();
// Forwards to an impl function with overloads, since member
// function templates can't be specialized.
return this->getTrailingObjectsImpl(
static_cast<const BaseTy *>(this),
TrailingObjectsBase::OverloadToken<T>());
}
/// Returns a pointer to the trailing object array of the given type
/// (which must be one of those specified in the class template). The
/// array may have zero or more elements in it.
template <typename T> T *getTrailingObjects() {
verifyTrailingObjectsAssertions();
// Forwards to an impl function with overloads, since member
// function templates can't be specialized.
return this->getTrailingObjectsImpl(
static_cast<BaseTy *>(this), TrailingObjectsBase::OverloadToken<T>());
}
/// Returns the size of the trailing data, if an object were
/// allocated with the given counts (The counts are in the same order
/// as the template arguments). This does not include the size of the
/// base object. The template arguments must be the same as those
/// used in the class; they are supplied here redundantly only so
/// that it's clear what the counts are counting in callers.
template <typename... Tys>
static constexpr std::enable_if_t<
std::is_same_v<Foo<TrailingTys...>, Foo<Tys...>>, size_t>
additionalSizeToAlloc(typename trailing_objects_internal::ExtractSecondType<
TrailingTys, size_t>::type... Counts) {
return ParentType::additionalSizeToAllocImpl(0, Counts...);
}
/// Returns the total size of an object if it were allocated with the
/// given trailing object counts. This is the same as
/// additionalSizeToAlloc, except it *does* include the size of the base
/// object.
template <typename... Tys>
static constexpr std::enable_if_t<
std::is_same_v<Foo<TrailingTys...>, Foo<Tys...>>, size_t>
totalSizeToAlloc(typename trailing_objects_internal::ExtractSecondType<
TrailingTys, size_t>::type... Counts) {
return sizeof(BaseTy) + ParentType::additionalSizeToAllocImpl(0, Counts...);
}
TrailingObjects() = default;
TrailingObjects(const TrailingObjects &) = delete;
TrailingObjects(TrailingObjects &&) = delete;
TrailingObjects &operator=(const TrailingObjects &) = delete;
TrailingObjects &operator=(TrailingObjects &&) = delete;
/// A type where its ::with_counts template member has a ::type member
/// suitable for use as uninitialized storage for an object with the given
/// trailing object counts. The template arguments are similar to those
/// of additionalSizeToAlloc.
///
/// Use with FixedSizeStorageOwner, e.g.:
///
/// \code{.cpp}
///
/// MyObj::FixedSizeStorage<void *>::with_counts<1u>::type myStackObjStorage;
/// MyObj::FixedSizeStorageOwner
/// myStackObjOwner(new ((void *)&myStackObjStorage) MyObj);
/// MyObj *const myStackObjPtr = myStackObjOwner.get();
///
/// \endcode
template <typename... Tys> struct FixedSizeStorage {
template <size_t... Counts> struct with_counts {
enum { Size = totalSizeToAlloc<Tys...>(Counts...) };
struct type {
alignas(BaseTy) char buffer[Size];
};
};
};
/// A type that acts as the owner for an object placed into fixed storage.
class FixedSizeStorageOwner {
public:
FixedSizeStorageOwner(BaseTy *p) : p(p) {}
~FixedSizeStorageOwner() {
assert(p && "FixedSizeStorageOwner owns null?");
p->~BaseTy();
}
BaseTy *get() { return p; }
const BaseTy *get() const { return p; }
private:
FixedSizeStorageOwner(const FixedSizeStorageOwner &) = delete;
FixedSizeStorageOwner(FixedSizeStorageOwner &&) = delete;
FixedSizeStorageOwner &operator=(const FixedSizeStorageOwner &) = delete;
FixedSizeStorageOwner &operator=(FixedSizeStorageOwner &&) = delete;
BaseTy *const p;
};
};
} // end namespace llvm
#endif
PK hwFZ[��6 6 Support/ErrorHandling.hnu �[��� //===- llvm/Support/ErrorHandling.h - Fatal error handling ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines an API used to indicate fatal error conditions. Non-fatal
// errors (most of them) should be handled through LLVMContext.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ERRORHANDLING_H
#define LLVM_SUPPORT_ERRORHANDLING_H
#include "llvm/Support/Compiler.h"
namespace llvm {
class StringRef;
class Twine;
/// An error handler callback.
typedef void (*fatal_error_handler_t)(void *user_data,
const char *reason,
bool gen_crash_diag);
/// install_fatal_error_handler - Installs a new error handler to be used
/// whenever a serious (non-recoverable) error is encountered by LLVM.
///
/// If no error handler is installed the default is to print the error message
/// to stderr, and call exit(1). If an error handler is installed then it is
/// the handler's responsibility to log the message, it will no longer be
/// printed to stderr. If the error handler returns, then exit(1) will be
/// called.
///
/// It is dangerous to naively use an error handler which throws an exception.
/// Even though some applications desire to gracefully recover from arbitrary
/// faults, blindly throwing exceptions through unfamiliar code isn't a way to
/// achieve this.
///
/// \param user_data - An argument which will be passed to the install error
/// handler.
void install_fatal_error_handler(fatal_error_handler_t handler,
void *user_data = nullptr);
/// Restores default error handling behaviour.
void remove_fatal_error_handler();
/// ScopedFatalErrorHandler - This is a simple helper class which just
/// calls install_fatal_error_handler in its constructor and
/// remove_fatal_error_handler in its destructor.
struct ScopedFatalErrorHandler {
explicit ScopedFatalErrorHandler(fatal_error_handler_t handler,
void *user_data = nullptr) {
install_fatal_error_handler(handler, user_data);
}
~ScopedFatalErrorHandler() { remove_fatal_error_handler(); }
};
/// Reports a serious error, calling any installed error handler. These
/// functions are intended to be used for error conditions which are outside
/// the control of the compiler (I/O errors, invalid user input, etc.)
///
/// If no error handler is installed the default is to print the message to
/// standard error, followed by a newline.
/// After the error handler is called this function will call abort(), it
/// does not return.
/// NOTE: The std::string variant was removed to avoid a <string> dependency.
[[noreturn]] void report_fatal_error(const char *reason,
bool gen_crash_diag = true);
[[noreturn]] void report_fatal_error(StringRef reason,
bool gen_crash_diag = true);
[[noreturn]] void report_fatal_error(const Twine &reason,
bool gen_crash_diag = true);
/// Installs a new bad alloc error handler that should be used whenever a
/// bad alloc error, e.g. failing malloc/calloc, is encountered by LLVM.
///
/// The user can install a bad alloc handler, in order to define the behavior
/// in case of failing allocations, e.g. throwing an exception. Note that this
/// handler must not trigger any additional allocations itself.
///
/// If no error handler is installed the default is to print the error message
/// to stderr, and call exit(1). If an error handler is installed then it is
/// the handler's responsibility to log the message, it will no longer be
/// printed to stderr. If the error handler returns, then exit(1) will be
/// called.
///
///
/// \param user_data - An argument which will be passed to the installed error
/// handler.
void install_bad_alloc_error_handler(fatal_error_handler_t handler,
void *user_data = nullptr);
/// Restores default bad alloc error handling behavior.
void remove_bad_alloc_error_handler();
void install_out_of_memory_new_handler();
/// Reports a bad alloc error, calling any user defined bad alloc
/// error handler. In contrast to the generic 'report_fatal_error'
/// functions, this function might not terminate, e.g. the user
/// defined error handler throws an exception, but it won't return.
///
/// Note: When throwing an exception in the bad alloc handler, make sure that
/// the following unwind succeeds, e.g. do not trigger additional allocations
/// in the unwind chain.
///
/// If no error handler is installed (default), throws a bad_alloc exception
/// if LLVM is compiled with exception support. Otherwise prints the error
/// to standard error and calls abort().
[[noreturn]] void report_bad_alloc_error(const char *Reason,
bool GenCrashDiag = true);
/// This function calls abort(), and prints the optional message to stderr.
/// Use the llvm_unreachable macro (that adds location info), instead of
/// calling this function directly.
[[noreturn]] void
llvm_unreachable_internal(const char *msg = nullptr, const char *file = nullptr,
unsigned line = 0);
}
/// Marks that the current location is not supposed to be reachable.
/// In !NDEBUG builds, prints the message and location info to stderr.
/// In NDEBUG builds, if the platform does not support a builtin unreachable
/// then we call an internal LLVM runtime function. Otherwise the behavior is
/// controlled by the CMake flag
/// -DLLVM_UNREACHABLE_OPTIMIZE
/// * When "ON" (default) llvm_unreachable() becomes an optimizer hint
/// that the current location is not supposed to be reachable: the hint
/// turns such code path into undefined behavior. On compilers that don't
/// support such hints, prints a reduced message instead and aborts the
/// program.
/// * When "OFF", a builtin_trap is emitted instead of an
// optimizer hint or printing a reduced message.
///
/// Use this instead of assert(0). It conveys intent more clearly, suppresses
/// diagnostics for unreachable code paths, and allows compilers to omit
/// unnecessary code.
#ifndef NDEBUG
#define llvm_unreachable(msg) \
::llvm::llvm_unreachable_internal(msg, __FILE__, __LINE__)
#elif !defined(LLVM_BUILTIN_UNREACHABLE)
#define llvm_unreachable(msg) ::llvm::llvm_unreachable_internal()
#elif LLVM_UNREACHABLE_OPTIMIZE
#define llvm_unreachable(msg) LLVM_BUILTIN_UNREACHABLE
#else
#define llvm_unreachable(msg) \
do { \
LLVM_BUILTIN_TRAP; \
LLVM_BUILTIN_UNREACHABLE; \
} while (false)
#endif
#endif
PK hwFZ2Ƕ��A �A Support/LowLevelTypeImpl.hnu �[��� //== llvm/Support/LowLevelTypeImpl.h --------------------------- -*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// Implement a low-level type suitable for MachineInstr level instruction
/// selection.
///
/// For a type attached to a MachineInstr, we only care about 2 details: total
/// size and the number of vector lanes (if any). Accordingly, there are 4
/// possible valid type-kinds:
///
/// * `sN` for scalars and aggregates
/// * `<N x sM>` for vectors, which must have at least 2 elements.
/// * `pN` for pointers
///
/// Other information required for correct selection is expected to be carried
/// by the opcode, or non-type flags. For example the distinction between G_ADD
/// and G_FADD for int/float or fast-math flags.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_LOWLEVELTYPEIMPL_H
#define LLVM_SUPPORT_LOWLEVELTYPEIMPL_H
#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/MachineValueType.h"
#include <cassert>
namespace llvm {
class Type;
class raw_ostream;
class LLT {
public:
/// Get a low-level scalar or aggregate "bag of bits".
static constexpr LLT scalar(unsigned SizeInBits) {
return LLT{/*isPointer=*/false, /*isVector=*/false, /*isScalar=*/true,
ElementCount::getFixed(0), SizeInBits,
/*AddressSpace=*/0};
}
/// Get a low-level pointer in the given address space.
static constexpr LLT pointer(unsigned AddressSpace, unsigned SizeInBits) {
assert(SizeInBits > 0 && "invalid pointer size");
return LLT{/*isPointer=*/true, /*isVector=*/false, /*isScalar=*/false,
ElementCount::getFixed(0), SizeInBits, AddressSpace};
}
/// Get a low-level vector of some number of elements and element width.
static constexpr LLT vector(ElementCount EC, unsigned ScalarSizeInBits) {
assert(!EC.isScalar() && "invalid number of vector elements");
return LLT{/*isPointer=*/false, /*isVector=*/true, /*isScalar=*/false,
EC, ScalarSizeInBits, /*AddressSpace=*/0};
}
/// Get a low-level vector of some number of elements and element type.
static constexpr LLT vector(ElementCount EC, LLT ScalarTy) {
assert(!EC.isScalar() && "invalid number of vector elements");
assert(!ScalarTy.isVector() && "invalid vector element type");
return LLT{ScalarTy.isPointer(),
/*isVector=*/true,
/*isScalar=*/false,
EC,
ScalarTy.getSizeInBits().getFixedValue(),
ScalarTy.isPointer() ? ScalarTy.getAddressSpace() : 0};
}
/// Get a low-level fixed-width vector of some number of elements and element
/// width.
static constexpr LLT fixed_vector(unsigned NumElements,
unsigned ScalarSizeInBits) {
return vector(ElementCount::getFixed(NumElements), ScalarSizeInBits);
}
/// Get a low-level fixed-width vector of some number of elements and element
/// type.
static constexpr LLT fixed_vector(unsigned NumElements, LLT ScalarTy) {
return vector(ElementCount::getFixed(NumElements), ScalarTy);
}
/// Get a low-level scalable vector of some number of elements and element
/// width.
static constexpr LLT scalable_vector(unsigned MinNumElements,
unsigned ScalarSizeInBits) {
return vector(ElementCount::getScalable(MinNumElements), ScalarSizeInBits);
}
/// Get a low-level scalable vector of some number of elements and element
/// type.
static constexpr LLT scalable_vector(unsigned MinNumElements, LLT ScalarTy) {
return vector(ElementCount::getScalable(MinNumElements), ScalarTy);
}
static constexpr LLT scalarOrVector(ElementCount EC, LLT ScalarTy) {
return EC.isScalar() ? ScalarTy : LLT::vector(EC, ScalarTy);
}
static constexpr LLT scalarOrVector(ElementCount EC, uint64_t ScalarSize) {
assert(ScalarSize <= std::numeric_limits<unsigned>::max() &&
"Not enough bits in LLT to represent size");
return scalarOrVector(EC, LLT::scalar(static_cast<unsigned>(ScalarSize)));
}
explicit constexpr LLT(bool isPointer, bool isVector, bool isScalar,
ElementCount EC, uint64_t SizeInBits,
unsigned AddressSpace)
: LLT() {
init(isPointer, isVector, isScalar, EC, SizeInBits, AddressSpace);
}
explicit constexpr LLT()
: IsScalar(false), IsPointer(false), IsVector(false), RawData(0) {}
explicit LLT(MVT VT);
constexpr bool isValid() const { return IsScalar || RawData != 0; }
constexpr bool isScalar() const { return IsScalar; }
constexpr bool isPointer() const {
return isValid() && IsPointer && !IsVector;
}
constexpr bool isVector() const { return isValid() && IsVector; }
/// Returns the number of elements in a vector LLT. Must only be called on
/// vector types.
constexpr uint16_t getNumElements() const {
if (isScalable())
llvm::reportInvalidSizeRequest(
"Possible incorrect use of LLT::getNumElements() for "
"scalable vector. Scalable flag may be dropped, use "
"LLT::getElementCount() instead");
return getElementCount().getKnownMinValue();
}
/// Returns true if the LLT is a scalable vector. Must only be called on
/// vector types.
constexpr bool isScalable() const {
assert(isVector() && "Expected a vector type");
return IsPointer ? getFieldValue(PointerVectorScalableFieldInfo)
: getFieldValue(VectorScalableFieldInfo);
}
constexpr ElementCount getElementCount() const {
assert(IsVector && "cannot get number of elements on scalar/aggregate");
return ElementCount::get(IsPointer
? getFieldValue(PointerVectorElementsFieldInfo)
: getFieldValue(VectorElementsFieldInfo),
isScalable());
}
/// Returns the total size of the type. Must only be called on sized types.
constexpr TypeSize getSizeInBits() const {
if (isPointer() || isScalar())
return TypeSize::Fixed(getScalarSizeInBits());
auto EC = getElementCount();
return TypeSize(getScalarSizeInBits() * EC.getKnownMinValue(),
EC.isScalable());
}
/// Returns the total size of the type in bytes, i.e. number of whole bytes
/// needed to represent the size in bits. Must only be called on sized types.
constexpr TypeSize getSizeInBytes() const {
TypeSize BaseSize = getSizeInBits();
return {(BaseSize.getKnownMinValue() + 7) / 8, BaseSize.isScalable()};
}
constexpr LLT getScalarType() const {
return isVector() ? getElementType() : *this;
}
/// If this type is a vector, return a vector with the same number of elements
/// but the new element type. Otherwise, return the new element type.
constexpr LLT changeElementType(LLT NewEltTy) const {
return isVector() ? LLT::vector(getElementCount(), NewEltTy) : NewEltTy;
}
/// If this type is a vector, return a vector with the same number of elements
/// but the new element size. Otherwise, return the new element type. Invalid
/// for pointer types. For pointer types, use changeElementType.
constexpr LLT changeElementSize(unsigned NewEltSize) const {
assert(!getScalarType().isPointer() &&
"invalid to directly change element size for pointers");
return isVector() ? LLT::vector(getElementCount(), NewEltSize)
: LLT::scalar(NewEltSize);
}
/// Return a vector or scalar with the same element type and the new element
/// count.
constexpr LLT changeElementCount(ElementCount EC) const {
return LLT::scalarOrVector(EC, getScalarType());
}
/// Return a type that is \p Factor times smaller. Reduces the number of
/// elements if this is a vector, or the bitwidth for scalar/pointers. Does
/// not attempt to handle cases that aren't evenly divisible.
constexpr LLT divide(int Factor) const {
assert(Factor != 1);
assert((!isScalar() || getScalarSizeInBits() != 0) &&
"cannot divide scalar of size zero");
if (isVector()) {
assert(getElementCount().isKnownMultipleOf(Factor));
return scalarOrVector(getElementCount().divideCoefficientBy(Factor),
getElementType());
}
assert(getScalarSizeInBits() % Factor == 0);
return scalar(getScalarSizeInBits() / Factor);
}
/// Produce a vector type that is \p Factor times bigger, preserving the
/// element type. For a scalar or pointer, this will produce a new vector with
/// \p Factor elements.
constexpr LLT multiplyElements(int Factor) const {
if (isVector()) {
return scalarOrVector(getElementCount().multiplyCoefficientBy(Factor),
getElementType());
}
return fixed_vector(Factor, *this);
}
constexpr bool isByteSized() const {
return getSizeInBits().isKnownMultipleOf(8);
}
constexpr unsigned getScalarSizeInBits() const {
if (IsScalar)
return getFieldValue(ScalarSizeFieldInfo);
if (IsVector) {
if (!IsPointer)
return getFieldValue(VectorSizeFieldInfo);
else
return getFieldValue(PointerVectorSizeFieldInfo);
} else if (IsPointer)
return getFieldValue(PointerSizeFieldInfo);
else
llvm_unreachable("unexpected LLT");
}
constexpr unsigned getAddressSpace() const {
assert(RawData != 0 && "Invalid Type");
assert(IsPointer && "cannot get address space of non-pointer type");
if (!IsVector)
return getFieldValue(PointerAddressSpaceFieldInfo);
else
return getFieldValue(PointerVectorAddressSpaceFieldInfo);
}
/// Returns the vector's element type. Only valid for vector types.
constexpr LLT getElementType() const {
assert(isVector() && "cannot get element type of scalar/aggregate");
if (IsPointer)
return pointer(getAddressSpace(), getScalarSizeInBits());
else
return scalar(getScalarSizeInBits());
}
void print(raw_ostream &OS) const;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD void dump() const {
print(dbgs());
dbgs() << '\n';
}
#endif
constexpr bool operator==(const LLT &RHS) const {
return IsPointer == RHS.IsPointer && IsVector == RHS.IsVector &&
IsScalar == RHS.IsScalar && RHS.RawData == RawData;
}
constexpr bool operator!=(const LLT &RHS) const { return !(*this == RHS); }
friend struct DenseMapInfo<LLT>;
friend class GISelInstProfileBuilder;
private:
/// LLT is packed into 64 bits as follows:
/// isScalar : 1
/// isPointer : 1
/// isVector : 1
/// with 61 bits remaining for Kind-specific data, packed in bitfields
/// as described below. As there isn't a simple portable way to pack bits
/// into bitfields, here the different fields in the packed structure is
/// described in static const *Field variables. Each of these variables
/// is a 2-element array, with the first element describing the bitfield size
/// and the second element describing the bitfield offset.
typedef int BitFieldInfo[2];
///
/// This is how the bitfields are packed per Kind:
/// * Invalid:
/// gets encoded as RawData == 0, as that is an invalid encoding, since for
/// valid encodings, SizeInBits/SizeOfElement must be larger than 0.
/// * Non-pointer scalar (isPointer == 0 && isVector == 0):
/// SizeInBits: 32;
static const constexpr BitFieldInfo ScalarSizeFieldInfo{32, 0};
/// * Pointer (isPointer == 1 && isVector == 0):
/// SizeInBits: 16;
/// AddressSpace: 24;
static const constexpr BitFieldInfo PointerSizeFieldInfo{16, 0};
static const constexpr BitFieldInfo PointerAddressSpaceFieldInfo{
24, PointerSizeFieldInfo[0] + PointerSizeFieldInfo[1]};
static_assert((PointerAddressSpaceFieldInfo[0] +
PointerAddressSpaceFieldInfo[1]) <= 61,
"Insufficient bits to encode all data");
/// * Vector-of-non-pointer (isPointer == 0 && isVector == 1):
/// NumElements: 16;
/// SizeOfElement: 32;
/// Scalable: 1;
static const constexpr BitFieldInfo VectorElementsFieldInfo{16, 0};
static const constexpr BitFieldInfo VectorSizeFieldInfo{
32, VectorElementsFieldInfo[0] + VectorElementsFieldInfo[1]};
static const constexpr BitFieldInfo VectorScalableFieldInfo{
1, VectorSizeFieldInfo[0] + VectorSizeFieldInfo[1]};
static_assert((VectorSizeFieldInfo[0] + VectorSizeFieldInfo[1]) <= 61,
"Insufficient bits to encode all data");
/// * Vector-of-pointer (isPointer == 1 && isVector == 1):
/// NumElements: 16;
/// SizeOfElement: 16;
/// AddressSpace: 24;
/// Scalable: 1;
static const constexpr BitFieldInfo PointerVectorElementsFieldInfo{16, 0};
static const constexpr BitFieldInfo PointerVectorSizeFieldInfo{
16,
PointerVectorElementsFieldInfo[1] + PointerVectorElementsFieldInfo[0]};
static const constexpr BitFieldInfo PointerVectorAddressSpaceFieldInfo{
24, PointerVectorSizeFieldInfo[1] + PointerVectorSizeFieldInfo[0]};
static const constexpr BitFieldInfo PointerVectorScalableFieldInfo{
1, PointerVectorAddressSpaceFieldInfo[0] +
PointerVectorAddressSpaceFieldInfo[1]};
static_assert((PointerVectorAddressSpaceFieldInfo[0] +
PointerVectorAddressSpaceFieldInfo[1]) <= 61,
"Insufficient bits to encode all data");
uint64_t IsScalar : 1;
uint64_t IsPointer : 1;
uint64_t IsVector : 1;
uint64_t RawData : 61;
static constexpr uint64_t getMask(const BitFieldInfo FieldInfo) {
const int FieldSizeInBits = FieldInfo[0];
return (((uint64_t)1) << FieldSizeInBits) - 1;
}
static constexpr uint64_t maskAndShift(uint64_t Val, uint64_t Mask,
uint8_t Shift) {
assert(Val <= Mask && "Value too large for field");
return (Val & Mask) << Shift;
}
static constexpr uint64_t maskAndShift(uint64_t Val,
const BitFieldInfo FieldInfo) {
return maskAndShift(Val, getMask(FieldInfo), FieldInfo[1]);
}
constexpr uint64_t getFieldValue(const BitFieldInfo FieldInfo) const {
return getMask(FieldInfo) & (RawData >> FieldInfo[1]);
}
constexpr void init(bool IsPointer, bool IsVector, bool IsScalar,
ElementCount EC, uint64_t SizeInBits,
unsigned AddressSpace) {
assert(SizeInBits <= std::numeric_limits<unsigned>::max() &&
"Not enough bits in LLT to represent size");
this->IsPointer = IsPointer;
this->IsVector = IsVector;
this->IsScalar = IsScalar;
if (IsScalar)
RawData = maskAndShift(SizeInBits, ScalarSizeFieldInfo);
else if (IsVector) {
assert(EC.isVector() && "invalid number of vector elements");
if (!IsPointer)
RawData =
maskAndShift(EC.getKnownMinValue(), VectorElementsFieldInfo) |
maskAndShift(SizeInBits, VectorSizeFieldInfo) |
maskAndShift(EC.isScalable() ? 1 : 0, VectorScalableFieldInfo);
else
RawData =
maskAndShift(EC.getKnownMinValue(),
PointerVectorElementsFieldInfo) |
maskAndShift(SizeInBits, PointerVectorSizeFieldInfo) |
maskAndShift(AddressSpace, PointerVectorAddressSpaceFieldInfo) |
maskAndShift(EC.isScalable() ? 1 : 0,
PointerVectorScalableFieldInfo);
} else if (IsPointer)
RawData = maskAndShift(SizeInBits, PointerSizeFieldInfo) |
maskAndShift(AddressSpace, PointerAddressSpaceFieldInfo);
else
llvm_unreachable("unexpected LLT configuration");
}
public:
constexpr uint64_t getUniqueRAWLLTData() const {
return ((uint64_t)RawData) << 3 | ((uint64_t)IsScalar) << 2 |
((uint64_t)IsPointer) << 1 | ((uint64_t)IsVector);
}
};
inline raw_ostream& operator<<(raw_ostream &OS, const LLT &Ty) {
Ty.print(OS);
return OS;
}
template<> struct DenseMapInfo<LLT> {
static inline LLT getEmptyKey() {
LLT Invalid;
Invalid.IsPointer = true;
return Invalid;
}
static inline LLT getTombstoneKey() {
LLT Invalid;
Invalid.IsVector = true;
return Invalid;
}
static inline unsigned getHashValue(const LLT &Ty) {
uint64_t Val = Ty.getUniqueRAWLLTData();
return DenseMapInfo<uint64_t>::getHashValue(Val);
}
static bool isEqual(const LLT &LHS, const LLT &RHS) {
return LHS == RHS;
}
};
}
#endif // LLVM_SUPPORT_LOWLEVELTYPEIMPL_H
PK hwFZ@��� � Support/Valgrind.hnu �[��� //===- llvm/Support/Valgrind.h - Communication with Valgrind ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Methods for communicating with a valgrind instance this program is running
// under. These are all no-ops unless LLVM was configured on a system with the
// valgrind headers installed and valgrind is controlling this process.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_VALGRIND_H
#define LLVM_SUPPORT_VALGRIND_H
#include <cstddef>
namespace llvm {
namespace sys {
// True if Valgrind is controlling this process.
bool RunningOnValgrind();
// Discard valgrind's translation of code in the range [Addr .. Addr + Len).
// Otherwise valgrind may continue to execute the old version of the code.
void ValgrindDiscardTranslations(const void *Addr, size_t Len);
} // namespace sys
} // end namespace llvm
#endif // LLVM_SUPPORT_VALGRIND_H
PK hwFZO+ �� � Support/SHA256.hnu �[��� //====- SHA256.cpp - SHA256 implementation ---*- C++ -* ======//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/*
* The SHA-256 Secure Hash Standard was published by NIST in 2002.
*
* http://csrc.nist.gov/publications/fips/fips180-2/fips180-2.pdf
*
* The implementation is based on nacl's sha256 implementation [0] and LLVM's
* pre-exsiting SHA1 code [1].
*
* [0] https://hyperelliptic.org/nacl/nacl-20110221.tar.bz2 (public domain
* code)
* [1] llvm/lib/Support/SHA1.{h,cpp}
*/
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_SHA256_H
#define LLVM_SUPPORT_SHA256_H
#include <array>
#include <cstdint>
namespace llvm {
template <typename T> class ArrayRef;
class StringRef;
class SHA256 {
public:
explicit SHA256() { init(); }
/// Reinitialize the internal state
void init();
/// Digest more data.
void update(ArrayRef<uint8_t> Data);
/// Digest more data.
void update(StringRef Str);
/// Return the current raw 256-bits SHA256 for the digested
/// data since the last call to init(). This call will add data to the
/// internal state and as such is not suited for getting an intermediate
/// result (see result()).
std::array<uint8_t, 32> final();
/// Return the current raw 256-bits SHA256 for the digested
/// data since the last call to init(). This is suitable for getting the
/// SHA256 at any time without invalidating the internal state so that more
/// calls can be made into update.
std::array<uint8_t, 32> result();
/// Returns a raw 256-bit SHA256 hash for the given data.
static std::array<uint8_t, 32> hash(ArrayRef<uint8_t> Data);
private:
/// Define some constants.
/// "static constexpr" would be cleaner but MSVC does not support it yet.
enum { BLOCK_LENGTH = 64 };
enum { HASH_LENGTH = 32 };
// Internal State
struct {
union {
uint8_t C[BLOCK_LENGTH];
uint32_t L[BLOCK_LENGTH / 4];
} Buffer;
uint32_t State[HASH_LENGTH / 4];
uint32_t ByteCount;
uint8_t BufferOffset;
} InternalState;
// Helper
void writebyte(uint8_t data);
void hashBlock();
void addUncounted(uint8_t data);
void pad();
void final(std::array<uint32_t, HASH_LENGTH / 4> &HashResult);
};
} // namespace llvm
#endif // LLVM_SUPPORT_SHA256_H
PK hwFZ�Œq�. �. Support/Alignment.hnu �[��� //===-- llvm/Support/Alignment.h - Useful alignment functions ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains types to represent alignments.
// They are instrumented to guarantee some invariants are preserved and prevent
// invalid manipulations.
//
// - Align represents an alignment in bytes, it is always set and always a valid
// power of two, its minimum value is 1 which means no alignment requirements.
//
// - MaybeAlign is an optional type, it may be undefined or set. When it's set
// you can get the underlying Align type by using the getValue() method.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ALIGNMENT_H_
#define LLVM_SUPPORT_ALIGNMENT_H_
#include "llvm/Support/MathExtras.h"
#include <cassert>
#include <optional>
#ifndef NDEBUG
#include <string>
#endif // NDEBUG
namespace llvm {
#define ALIGN_CHECK_ISPOSITIVE(decl) \
assert(decl > 0 && (#decl " should be defined"))
/// This struct is a compact representation of a valid (non-zero power of two)
/// alignment.
/// It is suitable for use as static global constants.
struct Align {
private:
uint8_t ShiftValue = 0; /// The log2 of the required alignment.
/// ShiftValue is less than 64 by construction.
friend struct MaybeAlign;
friend unsigned Log2(Align);
friend bool operator==(Align Lhs, Align Rhs);
friend bool operator!=(Align Lhs, Align Rhs);
friend bool operator<=(Align Lhs, Align Rhs);
friend bool operator>=(Align Lhs, Align Rhs);
friend bool operator<(Align Lhs, Align Rhs);
friend bool operator>(Align Lhs, Align Rhs);
friend unsigned encode(struct MaybeAlign A);
friend struct MaybeAlign decodeMaybeAlign(unsigned Value);
/// A trivial type to allow construction of constexpr Align.
/// This is currently needed to workaround a bug in GCC 5.3 which prevents
/// definition of constexpr assign operators.
/// https://stackoverflow.com/questions/46756288/explicitly-defaulted-function-cannot-be-declared-as-constexpr-because-the-implic
/// FIXME: Remove this, make all assign operators constexpr and introduce user
/// defined literals when we don't have to support GCC 5.3 anymore.
/// https://llvm.org/docs/GettingStarted.html#getting-a-modern-host-c-toolchain
struct LogValue {
uint8_t Log;
};
public:
/// Default is byte-aligned.
constexpr Align() = default;
/// Do not perform checks in case of copy/move construct/assign, because the
/// checks have been performed when building `Other`.
constexpr Align(const Align &Other) = default;
constexpr Align(Align &&Other) = default;
Align &operator=(const Align &Other) = default;
Align &operator=(Align &&Other) = default;
explicit Align(uint64_t Value) {
assert(Value > 0 && "Value must not be 0");
assert(llvm::isPowerOf2_64(Value) && "Alignment is not a power of 2");
ShiftValue = Log2_64(Value);
assert(ShiftValue < 64 && "Broken invariant");
}
/// This is a hole in the type system and should not be abused.
/// Needed to interact with C for instance.
uint64_t value() const { return uint64_t(1) << ShiftValue; }
// Returns the previous alignment.
Align previous() const {
assert(ShiftValue != 0 && "Undefined operation");
Align Out;
Out.ShiftValue = ShiftValue - 1;
return Out;
}
/// Allow constructions of constexpr Align.
template <size_t kValue> constexpr static Align Constant() {
return LogValue{static_cast<uint8_t>(CTLog2<kValue>())};
}
/// Allow constructions of constexpr Align from types.
/// Compile time equivalent to Align(alignof(T)).
template <typename T> constexpr static Align Of() {
return Constant<std::alignment_of_v<T>>();
}
/// Constexpr constructor from LogValue type.
constexpr Align(LogValue CA) : ShiftValue(CA.Log) {}
};
/// Treats the value 0 as a 1, so Align is always at least 1.
inline Align assumeAligned(uint64_t Value) {
return Value ? Align(Value) : Align();
}
/// This struct is a compact representation of a valid (power of two) or
/// undefined (0) alignment.
struct MaybeAlign : public std::optional<Align> {
private:
using UP = std::optional<Align>;
public:
/// Default is undefined.
MaybeAlign() = default;
/// Do not perform checks in case of copy/move construct/assign, because the
/// checks have been performed when building `Other`.
MaybeAlign(const MaybeAlign &Other) = default;
MaybeAlign &operator=(const MaybeAlign &Other) = default;
MaybeAlign(MaybeAlign &&Other) = default;
MaybeAlign &operator=(MaybeAlign &&Other) = default;
constexpr MaybeAlign(std::nullopt_t None) : UP(None) {}
constexpr MaybeAlign(Align Value) : UP(Value) {}
explicit MaybeAlign(uint64_t Value) {
assert((Value == 0 || llvm::isPowerOf2_64(Value)) &&
"Alignment is neither 0 nor a power of 2");
if (Value)
emplace(Value);
}
/// For convenience, returns a valid alignment or 1 if undefined.
Align valueOrOne() const { return value_or(Align()); }
};
/// Checks that SizeInBytes is a multiple of the alignment.
inline bool isAligned(Align Lhs, uint64_t SizeInBytes) {
return SizeInBytes % Lhs.value() == 0;
}
/// Checks that Addr is a multiple of the alignment.
inline bool isAddrAligned(Align Lhs, const void *Addr) {
return isAligned(Lhs, reinterpret_cast<uintptr_t>(Addr));
}
/// Returns a multiple of A needed to store `Size` bytes.
inline uint64_t alignTo(uint64_t Size, Align A) {
const uint64_t Value = A.value();
// The following line is equivalent to `(Size + Value - 1) / Value * Value`.
// The division followed by a multiplication can be thought of as a right
// shift followed by a left shift which zeros out the extra bits produced in
// the bump; `~(Value - 1)` is a mask where all those bits being zeroed out
// are just zero.
// Most compilers can generate this code but the pattern may be missed when
// multiple functions gets inlined.
return (Size + Value - 1) & ~(Value - 1U);
}
/// If non-zero \p Skew is specified, the return value will be a minimal integer
/// that is greater than or equal to \p Size and equal to \p A * N + \p Skew for
/// some integer N. If \p Skew is larger than \p A, its value is adjusted to '\p
/// Skew mod \p A'.
///
/// Examples:
/// \code
/// alignTo(5, Align(8), 7) = 7
/// alignTo(17, Align(8), 1) = 17
/// alignTo(~0LL, Align(8), 3) = 3
/// \endcode
inline uint64_t alignTo(uint64_t Size, Align A, uint64_t Skew) {
const uint64_t Value = A.value();
Skew %= Value;
return alignTo(Size - Skew, A) + Skew;
}
/// Aligns `Addr` to `Alignment` bytes, rounding up.
inline uintptr_t alignAddr(const void *Addr, Align Alignment) {
uintptr_t ArithAddr = reinterpret_cast<uintptr_t>(Addr);
assert(static_cast<uintptr_t>(ArithAddr + Alignment.value() - 1) >=
ArithAddr &&
"Overflow");
return alignTo(ArithAddr, Alignment);
}
/// Returns the offset to the next integer (mod 2**64) that is greater than
/// or equal to \p Value and is a multiple of \p Align.
inline uint64_t offsetToAlignment(uint64_t Value, Align Alignment) {
return alignTo(Value, Alignment) - Value;
}
/// Returns the necessary adjustment for aligning `Addr` to `Alignment`
/// bytes, rounding up.
inline uint64_t offsetToAlignedAddr(const void *Addr, Align Alignment) {
return offsetToAlignment(reinterpret_cast<uintptr_t>(Addr), Alignment);
}
/// Returns the log2 of the alignment.
inline unsigned Log2(Align A) { return A.ShiftValue; }
/// Returns the alignment that satisfies both alignments.
/// Same semantic as MinAlign.
inline Align commonAlignment(Align A, uint64_t Offset) {
return Align(MinAlign(A.value(), Offset));
}
/// Returns a representation of the alignment that encodes undefined as 0.
inline unsigned encode(MaybeAlign A) { return A ? A->ShiftValue + 1 : 0; }
/// Dual operation of the encode function above.
inline MaybeAlign decodeMaybeAlign(unsigned Value) {
if (Value == 0)
return MaybeAlign();
Align Out;
Out.ShiftValue = Value - 1;
return Out;
}
/// Returns a representation of the alignment, the encoded value is positive by
/// definition.
inline unsigned encode(Align A) { return encode(MaybeAlign(A)); }
/// Comparisons between Align and scalars. Rhs must be positive.
inline bool operator==(Align Lhs, uint64_t Rhs) {
ALIGN_CHECK_ISPOSITIVE(Rhs);
return Lhs.value() == Rhs;
}
inline bool operator!=(Align Lhs, uint64_t Rhs) {
ALIGN_CHECK_ISPOSITIVE(Rhs);
return Lhs.value() != Rhs;
}
inline bool operator<=(Align Lhs, uint64_t Rhs) {
ALIGN_CHECK_ISPOSITIVE(Rhs);
return Lhs.value() <= Rhs;
}
inline bool operator>=(Align Lhs, uint64_t Rhs) {
ALIGN_CHECK_ISPOSITIVE(Rhs);
return Lhs.value() >= Rhs;
}
inline bool operator<(Align Lhs, uint64_t Rhs) {
ALIGN_CHECK_ISPOSITIVE(Rhs);
return Lhs.value() < Rhs;
}
inline bool operator>(Align Lhs, uint64_t Rhs) {
ALIGN_CHECK_ISPOSITIVE(Rhs);
return Lhs.value() > Rhs;
}
/// Comparisons operators between Align.
inline bool operator==(Align Lhs, Align Rhs) {
return Lhs.ShiftValue == Rhs.ShiftValue;
}
inline bool operator!=(Align Lhs, Align Rhs) {
return Lhs.ShiftValue != Rhs.ShiftValue;
}
inline bool operator<=(Align Lhs, Align Rhs) {
return Lhs.ShiftValue <= Rhs.ShiftValue;
}
inline bool operator>=(Align Lhs, Align Rhs) {
return Lhs.ShiftValue >= Rhs.ShiftValue;
}
inline bool operator<(Align Lhs, Align Rhs) {
return Lhs.ShiftValue < Rhs.ShiftValue;
}
inline bool operator>(Align Lhs, Align Rhs) {
return Lhs.ShiftValue > Rhs.ShiftValue;
}
// Don't allow relational comparisons with MaybeAlign.
bool operator<=(Align Lhs, MaybeAlign Rhs) = delete;
bool operator>=(Align Lhs, MaybeAlign Rhs) = delete;
bool operator<(Align Lhs, MaybeAlign Rhs) = delete;
bool operator>(Align Lhs, MaybeAlign Rhs) = delete;
bool operator<=(MaybeAlign Lhs, Align Rhs) = delete;
bool operator>=(MaybeAlign Lhs, Align Rhs) = delete;
bool operator<(MaybeAlign Lhs, Align Rhs) = delete;
bool operator>(MaybeAlign Lhs, Align Rhs) = delete;
bool operator<=(MaybeAlign Lhs, MaybeAlign Rhs) = delete;
bool operator>=(MaybeAlign Lhs, MaybeAlign Rhs) = delete;
bool operator<(MaybeAlign Lhs, MaybeAlign Rhs) = delete;
bool operator>(MaybeAlign Lhs, MaybeAlign Rhs) = delete;
// Allow equality comparisons between Align and MaybeAlign.
inline bool operator==(MaybeAlign Lhs, Align Rhs) { return Lhs && *Lhs == Rhs; }
inline bool operator!=(MaybeAlign Lhs, Align Rhs) { return !(Lhs == Rhs); }
inline bool operator==(Align Lhs, MaybeAlign Rhs) { return Rhs == Lhs; }
inline bool operator!=(Align Lhs, MaybeAlign Rhs) { return !(Rhs == Lhs); }
// Allow equality comparisons with MaybeAlign.
inline bool operator==(MaybeAlign Lhs, MaybeAlign Rhs) {
return (Lhs && Rhs && (*Lhs == *Rhs)) || (!Lhs && !Rhs);
}
inline bool operator!=(MaybeAlign Lhs, MaybeAlign Rhs) { return !(Lhs == Rhs); }
// Allow equality comparisons with std::nullopt.
inline bool operator==(MaybeAlign Lhs, std::nullopt_t) { return !bool(Lhs); }
inline bool operator!=(MaybeAlign Lhs, std::nullopt_t) { return bool(Lhs); }
inline bool operator==(std::nullopt_t, MaybeAlign Rhs) { return !bool(Rhs); }
inline bool operator!=(std::nullopt_t, MaybeAlign Rhs) { return bool(Rhs); }
#ifndef NDEBUG
// For usage in LLVM_DEBUG macros.
inline std::string DebugStr(const Align &A) {
return std::to_string(A.value());
}
// For usage in LLVM_DEBUG macros.
inline std::string DebugStr(const MaybeAlign &MA) {
if (MA)
return std::to_string(MA->value());
return "None";
}
#endif // NDEBUG
#undef ALIGN_CHECK_ISPOSITIVE
} // namespace llvm
#endif // LLVM_SUPPORT_ALIGNMENT_H_
PK hwFZ*6N}�% �% Support/CrashRecoveryContext.hnu �[��� //===--- CrashRecoveryContext.h - Crash Recovery ----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_CRASHRECOVERYCONTEXT_H
#define LLVM_SUPPORT_CRASHRECOVERYCONTEXT_H
#include "llvm/ADT/STLFunctionalExtras.h"
namespace llvm {
class CrashRecoveryContextCleanup;
/// Crash recovery helper object.
///
/// This class implements support for running operations in a safe context so
/// that crashes (memory errors, stack overflow, assertion violations) can be
/// detected and control restored to the crashing thread. Crash detection is
/// purely "best effort", the exact set of failures which can be recovered from
/// is platform dependent.
///
/// Clients make use of this code by first calling
/// CrashRecoveryContext::Enable(), and then executing unsafe operations via a
/// CrashRecoveryContext object. For example:
///
/// \code
/// void actual_work(void *);
///
/// void foo() {
/// CrashRecoveryContext CRC;
///
/// if (!CRC.RunSafely(actual_work, 0)) {
/// ... a crash was detected, report error to user ...
/// }
///
/// ... no crash was detected ...
/// }
/// \endcode
///
/// To assist recovery the class allows specifying set of actions that will be
/// executed in any case, whether crash occurs or not. These actions may be used
/// to reclaim resources in the case of crash.
class CrashRecoveryContext {
void *Impl = nullptr;
CrashRecoveryContextCleanup *head = nullptr;
public:
CrashRecoveryContext();
~CrashRecoveryContext();
/// Register cleanup handler, which is used when the recovery context is
/// finished.
/// The recovery context owns the handler.
void registerCleanup(CrashRecoveryContextCleanup *cleanup);
void unregisterCleanup(CrashRecoveryContextCleanup *cleanup);
/// Enable crash recovery.
static void Enable();
/// Disable crash recovery.
static void Disable();
/// Return the active context, if the code is currently executing in a
/// thread which is in a protected context.
static CrashRecoveryContext *GetCurrent();
/// Return true if the current thread is recovering from a crash.
static bool isRecoveringFromCrash();
/// Execute the provided callback function (with the given arguments) in
/// a protected context.
///
/// \return True if the function completed successfully, and false if the
/// function crashed (or HandleCrash was called explicitly). Clients should
/// make as little assumptions as possible about the program state when
/// RunSafely has returned false.
bool RunSafely(function_ref<void()> Fn);
bool RunSafely(void (*Fn)(void*), void *UserData) {
return RunSafely([&]() { Fn(UserData); });
}
/// Execute the provide callback function (with the given arguments) in
/// a protected context which is run in another thread (optionally with a
/// requested stack size).
///
/// See RunSafely().
///
/// On Darwin, if PRIO_DARWIN_BG is set on the calling thread, it will be
/// propagated to the new thread as well.
bool RunSafelyOnThread(function_ref<void()>, unsigned RequestedStackSize = 0);
bool RunSafelyOnThread(void (*Fn)(void*), void *UserData,
unsigned RequestedStackSize = 0) {
return RunSafelyOnThread([&]() { Fn(UserData); }, RequestedStackSize);
}
/// Explicitly trigger a crash recovery in the current process, and
/// return failure from RunSafely(). This function does not return.
[[noreturn]] void HandleExit(int RetCode);
/// Return true if RetCode indicates that a signal or an exception occurred.
static bool isCrash(int RetCode);
/// Throw again a signal or an exception, after it was catched once by a
/// CrashRecoveryContext.
static bool throwIfCrash(int RetCode);
/// In case of a crash, this is the crash identifier.
int RetCode = 0;
/// Selects whether handling of failures should be done in the same way as
/// for regular crashes. When this is active, a crash would print the
/// callstack, clean-up any temporary files and create a coredump/minidump.
bool DumpStackAndCleanupOnFailure = false;
};
/// Abstract base class of cleanup handlers.
///
/// Derived classes override method recoverResources, which makes actual work on
/// resource recovery.
///
/// Cleanup handlers are stored in a double list, which is owned and managed by
/// a crash recovery context.
class CrashRecoveryContextCleanup {
protected:
CrashRecoveryContext *context = nullptr;
CrashRecoveryContextCleanup(CrashRecoveryContext *context)
: context(context) {}
public:
bool cleanupFired = false;
virtual ~CrashRecoveryContextCleanup();
virtual void recoverResources() = 0;
CrashRecoveryContext *getContext() const {
return context;
}
private:
friend class CrashRecoveryContext;
CrashRecoveryContextCleanup *prev = nullptr, *next = nullptr;
};
/// Base class of cleanup handler that controls recovery of resources of the
/// given type.
///
/// \tparam Derived Class that uses this class as a base.
/// \tparam T Type of controlled resource.
///
/// This class serves as a base for its template parameter as implied by
/// Curiously Recurring Template Pattern.
///
/// This class factors out creation of a cleanup handler. The latter requires
/// knowledge of the current recovery context, which is provided by this class.
template<typename Derived, typename T>
class CrashRecoveryContextCleanupBase : public CrashRecoveryContextCleanup {
protected:
T *resource;
CrashRecoveryContextCleanupBase(CrashRecoveryContext *context, T *resource)
: CrashRecoveryContextCleanup(context), resource(resource) {}
public:
/// Creates cleanup handler.
/// \param x Pointer to the resource recovered by this handler.
/// \return New handler or null if the method was called outside a recovery
/// context.
static Derived *create(T *x) {
if (x) {
if (CrashRecoveryContext *context = CrashRecoveryContext::GetCurrent())
return new Derived(context, x);
}
return nullptr;
}
};
/// Cleanup handler that reclaims resource by calling destructor on it.
template <typename T>
class CrashRecoveryContextDestructorCleanup : public
CrashRecoveryContextCleanupBase<CrashRecoveryContextDestructorCleanup<T>, T> {
public:
CrashRecoveryContextDestructorCleanup(CrashRecoveryContext *context,
T *resource)
: CrashRecoveryContextCleanupBase<
CrashRecoveryContextDestructorCleanup<T>, T>(context, resource) {}
void recoverResources() override {
this->resource->~T();
}
};
/// Cleanup handler that reclaims resource by calling 'delete' on it.
template <typename T>
class CrashRecoveryContextDeleteCleanup : public
CrashRecoveryContextCleanupBase<CrashRecoveryContextDeleteCleanup<T>, T> {
public:
CrashRecoveryContextDeleteCleanup(CrashRecoveryContext *context, T *resource)
: CrashRecoveryContextCleanupBase<
CrashRecoveryContextDeleteCleanup<T>, T>(context, resource) {}
void recoverResources() override { delete this->resource; }
};
/// Cleanup handler that reclaims resource by calling its method 'Release'.
template <typename T>
class CrashRecoveryContextReleaseRefCleanup : public
CrashRecoveryContextCleanupBase<CrashRecoveryContextReleaseRefCleanup<T>, T> {
public:
CrashRecoveryContextReleaseRefCleanup(CrashRecoveryContext *context,
T *resource)
: CrashRecoveryContextCleanupBase<CrashRecoveryContextReleaseRefCleanup<T>,
T>(context, resource) {}
void recoverResources() override { this->resource->Release(); }
};
/// Helper class for managing resource cleanups.
///
/// \tparam T Type of resource been reclaimed.
/// \tparam Cleanup Class that defines how the resource is reclaimed.
///
/// Clients create objects of this type in the code executed in a crash recovery
/// context to ensure that the resource will be reclaimed even in the case of
/// crash. For example:
///
/// \code
/// void actual_work(void *) {
/// ...
/// std::unique_ptr<Resource> R(new Resource());
/// CrashRecoveryContextCleanupRegistrar D(R.get());
/// ...
/// }
///
/// void foo() {
/// CrashRecoveryContext CRC;
///
/// if (!CRC.RunSafely(actual_work, 0)) {
/// ... a crash was detected, report error to user ...
/// }
/// \endcode
///
/// If the code of `actual_work` in the example above does not crash, the
/// destructor of CrashRecoveryContextCleanupRegistrar removes cleanup code from
/// the current CrashRecoveryContext and the resource is reclaimed by the
/// destructor of std::unique_ptr. If crash happens, destructors are not called
/// and the resource is reclaimed by cleanup object registered in the recovery
/// context by the constructor of CrashRecoveryContextCleanupRegistrar.
template <typename T, typename Cleanup = CrashRecoveryContextDeleteCleanup<T> >
class CrashRecoveryContextCleanupRegistrar {
CrashRecoveryContextCleanup *cleanup;
public:
CrashRecoveryContextCleanupRegistrar(T *x)
: cleanup(Cleanup::create(x)) {
if (cleanup)
cleanup->getContext()->registerCleanup(cleanup);
}
~CrashRecoveryContextCleanupRegistrar() { unregister(); }
void unregister() {
if (cleanup && !cleanup->cleanupFired)
cleanup->getContext()->unregisterCleanup(cleanup);
cleanup = nullptr;
}
};
} // end namespace llvm
#endif // LLVM_SUPPORT_CRASHRECOVERYCONTEXT_H
PK hwFZ`9�� � Support/CheckedArithmetic.hnu �[��� //==-- llvm/Support/CheckedArithmetic.h - Safe arithmetical operations *- C++ //
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains generic functions for operating on integers which
// give the indication on whether the operation has overflown.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_CHECKEDARITHMETIC_H
#define LLVM_SUPPORT_CHECKEDARITHMETIC_H
#include "llvm/ADT/APInt.h"
#include <optional>
#include <type_traits>
namespace {
/// Utility function to apply a given method of \c APInt \p F to \p LHS and
/// \p RHS.
/// \return Empty optional if the operation overflows, or result otherwise.
template <typename T, typename F>
std::enable_if_t<std::is_integral_v<T> && sizeof(T) * 8 <= 64, std::optional<T>>
checkedOp(T LHS, T RHS, F Op, bool Signed = true) {
llvm::APInt ALHS(sizeof(T) * 8, LHS, Signed);
llvm::APInt ARHS(sizeof(T) * 8, RHS, Signed);
bool Overflow;
llvm::APInt Out = (ALHS.*Op)(ARHS, Overflow);
if (Overflow)
return std::nullopt;
return Signed ? Out.getSExtValue() : Out.getZExtValue();
}
}
namespace llvm {
/// Add two signed integers \p LHS and \p RHS.
/// \return Optional of sum if no signed overflow occurred,
/// \c std::nullopt otherwise.
template <typename T>
std::enable_if_t<std::is_signed_v<T>, std::optional<T>> checkedAdd(T LHS,
T RHS) {
return checkedOp(LHS, RHS, &llvm::APInt::sadd_ov);
}
/// Subtract two signed integers \p LHS and \p RHS.
/// \return Optional of sum if no signed overflow occurred,
/// \c std::nullopt otherwise.
template <typename T>
std::enable_if_t<std::is_signed_v<T>, std::optional<T>> checkedSub(T LHS,
T RHS) {
return checkedOp(LHS, RHS, &llvm::APInt::ssub_ov);
}
/// Multiply two signed integers \p LHS and \p RHS.
/// \return Optional of product if no signed overflow occurred,
/// \c std::nullopt otherwise.
template <typename T>
std::enable_if_t<std::is_signed_v<T>, std::optional<T>> checkedMul(T LHS,
T RHS) {
return checkedOp(LHS, RHS, &llvm::APInt::smul_ov);
}
/// Multiply A and B, and add C to the resulting product.
/// \return Optional of result if no signed overflow occurred,
/// \c std::nullopt otherwise.
template <typename T>
std::enable_if_t<std::is_signed_v<T>, std::optional<T>> checkedMulAdd(T A, T B,
T C) {
if (auto Product = checkedMul(A, B))
return checkedAdd(*Product, C);
return std::nullopt;
}
/// Add two unsigned integers \p LHS and \p RHS.
/// \return Optional of sum if no unsigned overflow occurred,
/// \c std::nullopt otherwise.
template <typename T>
std::enable_if_t<std::is_unsigned_v<T>, std::optional<T>>
checkedAddUnsigned(T LHS, T RHS) {
return checkedOp(LHS, RHS, &llvm::APInt::uadd_ov, /*Signed=*/false);
}
/// Multiply two unsigned integers \p LHS and \p RHS.
/// \return Optional of product if no unsigned overflow occurred,
/// \c std::nullopt otherwise.
template <typename T>
std::enable_if_t<std::is_unsigned_v<T>, std::optional<T>>
checkedMulUnsigned(T LHS, T RHS) {
return checkedOp(LHS, RHS, &llvm::APInt::umul_ov, /*Signed=*/false);
}
/// Multiply unsigned integers A and B, and add C to the resulting product.
/// \return Optional of result if no unsigned overflow occurred,
/// \c std::nullopt otherwise.
template <typename T>
std::enable_if_t<std::is_unsigned_v<T>, std::optional<T>>
checkedMulAddUnsigned(T A, T B, T C) {
if (auto Product = checkedMulUnsigned(A, B))
return checkedAddUnsigned(*Product, C);
return std::nullopt;
}
} // End llvm namespace
#endif
PK hwFZا� Y5 Y5 Support/ConvertUTF.hnu �[��� /*===--- ConvertUTF.h - Universal Character Names conversions ---------------===
*
* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
* See https://llvm.org/LICENSE.txt for license information.
* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
*
*==------------------------------------------------------------------------==*/
/*
* Copyright © 1991-2015 Unicode, Inc. All rights reserved.
* Distributed under the Terms of Use in
* http://www.unicode.org/copyright.html.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of the Unicode data files and any associated documentation
* (the "Data Files") or Unicode software and any associated documentation
* (the "Software") to deal in the Data Files or Software
* without restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, and/or sell copies of
* the Data Files or Software, and to permit persons to whom the Data Files
* or Software are furnished to do so, provided that
* (a) this copyright and permission notice appear with all copies
* of the Data Files or Software,
* (b) this copyright and permission notice appear in associated
* documentation, and
* (c) there is clear notice in each modified Data File or in the Software
* as well as in the documentation associated with the Data File(s) or
* Software that the data or software has been modified.
*
* THE DATA FILES AND SOFTWARE ARE PROVIDED "AS IS", WITHOUT WARRANTY OF
* ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
* WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT OF THIRD PARTY RIGHTS.
* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS INCLUDED IN THIS
* NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSEQUENTIAL
* DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THE DATA FILES OR SOFTWARE.
*
* Except as contained in this notice, the name of a copyright holder
* shall not be used in advertising or otherwise to promote the sale,
* use or other dealings in these Data Files or Software without prior
* written authorization of the copyright holder.
*/
/* ---------------------------------------------------------------------
Conversions between UTF32, UTF-16, and UTF-8. Header file.
Several funtions are included here, forming a complete set of
conversions between the three formats. UTF-7 is not included
here, but is handled in a separate source file.
Each of these routines takes pointers to input buffers and output
buffers. The input buffers are const.
Each routine converts the text between *sourceStart and sourceEnd,
putting the result into the buffer between *targetStart and
targetEnd. Note: the end pointers are *after* the last item: e.g.
*(sourceEnd - 1) is the last item.
The return result indicates whether the conversion was successful,
and if not, whether the problem was in the source or target buffers.
(Only the first encountered problem is indicated.)
After the conversion, *sourceStart and *targetStart are both
updated to point to the end of last text successfully converted in
the respective buffers.
Input parameters:
sourceStart - pointer to a pointer to the source buffer.
The contents of this are modified on return so that
it points at the next thing to be converted.
targetStart - similarly, pointer to pointer to the target buffer.
sourceEnd, targetEnd - respectively pointers to the ends of the
two buffers, for overflow checking only.
These conversion functions take a ConversionFlags argument. When this
flag is set to strict, both irregular sequences and isolated surrogates
will cause an error. When the flag is set to lenient, both irregular
sequences and isolated surrogates are converted.
Whether the flag is strict or lenient, all illegal sequences will cause
an error return. This includes sequences such as: <F4 90 80 80>, <C0 80>,
or <A0> in UTF-8, and values above 0x10FFFF in UTF-32. Conformant code
must check for illegal sequences.
When the flag is set to lenient, characters over 0x10FFFF are converted
to the replacement character; otherwise (when the flag is set to strict)
they constitute an error.
Output parameters:
The value "sourceIllegal" is returned from some routines if the input
sequence is malformed. When "sourceIllegal" is returned, the source
value will point to the illegal value that caused the problem. E.g.,
in UTF-8 when a sequence is malformed, it points to the start of the
malformed sequence.
Author: Mark E. Davis, 1994.
Rev History: Rick McGowan, fixes & updates May 2001.
Fixes & updates, Sept 2001.
------------------------------------------------------------------------ */
#ifndef LLVM_SUPPORT_CONVERTUTF_H
#define LLVM_SUPPORT_CONVERTUTF_H
#include <cstddef>
#include <string>
#if defined(_WIN32)
#include <system_error>
#endif
// Wrap everything in namespace llvm so that programs can link with llvm and
// their own version of the unicode libraries.
namespace llvm {
/* ---------------------------------------------------------------------
The following 4 definitions are compiler-specific.
The C standard does not guarantee that wchar_t has at least
16 bits, so wchar_t is no less portable than unsigned short!
All should be unsigned values to avoid sign extension during
bit mask & shift operations.
------------------------------------------------------------------------ */
typedef unsigned int UTF32; /* at least 32 bits */
typedef unsigned short UTF16; /* at least 16 bits */
typedef unsigned char UTF8; /* typically 8 bits */
typedef unsigned char Boolean; /* 0 or 1 */
/* Some fundamental constants */
#define UNI_REPLACEMENT_CHAR (UTF32)0x0000FFFD
#define UNI_MAX_BMP (UTF32)0x0000FFFF
#define UNI_MAX_UTF16 (UTF32)0x0010FFFF
#define UNI_MAX_UTF32 (UTF32)0x7FFFFFFF
#define UNI_MAX_LEGAL_UTF32 (UTF32)0x0010FFFF
#define UNI_MAX_UTF8_BYTES_PER_CODE_POINT 4
#define UNI_UTF16_BYTE_ORDER_MARK_NATIVE 0xFEFF
#define UNI_UTF16_BYTE_ORDER_MARK_SWAPPED 0xFFFE
#define UNI_UTF32_BYTE_ORDER_MARK_NATIVE 0x0000FEFF
#define UNI_UTF32_BYTE_ORDER_MARK_SWAPPED 0xFFFE0000
typedef enum {
conversionOK, /* conversion successful */
sourceExhausted, /* partial character in source, but hit end */
targetExhausted, /* insuff. room in target for conversion */
sourceIllegal /* source sequence is illegal/malformed */
} ConversionResult;
typedef enum {
strictConversion = 0,
lenientConversion
} ConversionFlags;
ConversionResult ConvertUTF8toUTF16 (
const UTF8** sourceStart, const UTF8* sourceEnd,
UTF16** targetStart, UTF16* targetEnd, ConversionFlags flags);
/**
* Convert a partial UTF8 sequence to UTF32. If the sequence ends in an
* incomplete code unit sequence, returns \c sourceExhausted.
*/
ConversionResult ConvertUTF8toUTF32Partial(
const UTF8** sourceStart, const UTF8* sourceEnd,
UTF32** targetStart, UTF32* targetEnd, ConversionFlags flags);
/**
* Convert a partial UTF8 sequence to UTF32. If the sequence ends in an
* incomplete code unit sequence, returns \c sourceIllegal.
*/
ConversionResult ConvertUTF8toUTF32(
const UTF8** sourceStart, const UTF8* sourceEnd,
UTF32** targetStart, UTF32* targetEnd, ConversionFlags flags);
ConversionResult ConvertUTF16toUTF8 (
const UTF16** sourceStart, const UTF16* sourceEnd,
UTF8** targetStart, UTF8* targetEnd, ConversionFlags flags);
ConversionResult ConvertUTF32toUTF8 (
const UTF32** sourceStart, const UTF32* sourceEnd,
UTF8** targetStart, UTF8* targetEnd, ConversionFlags flags);
ConversionResult ConvertUTF16toUTF32 (
const UTF16** sourceStart, const UTF16* sourceEnd,
UTF32** targetStart, UTF32* targetEnd, ConversionFlags flags);
ConversionResult ConvertUTF32toUTF16 (
const UTF32** sourceStart, const UTF32* sourceEnd,
UTF16** targetStart, UTF16* targetEnd, ConversionFlags flags);
Boolean isLegalUTF8Sequence(const UTF8 *source, const UTF8 *sourceEnd);
Boolean isLegalUTF8String(const UTF8 **source, const UTF8 *sourceEnd);
unsigned getUTF8SequenceSize(const UTF8 *source, const UTF8 *sourceEnd);
unsigned getNumBytesForUTF8(UTF8 firstByte);
/*************************************************************************/
/* Below are LLVM-specific wrappers of the functions above. */
template <typename T> class ArrayRef;
template <typename T> class SmallVectorImpl;
class StringRef;
/**
* Convert an UTF8 StringRef to UTF8, UTF16, or UTF32 depending on
* WideCharWidth. The converted data is written to ResultPtr, which needs to
* point to at least WideCharWidth * (Source.Size() + 1) bytes. On success,
* ResultPtr will point one after the end of the copied string. On failure,
* ResultPtr will not be changed, and ErrorPtr will be set to the location of
* the first character which could not be converted.
* \return true on success.
*/
bool ConvertUTF8toWide(unsigned WideCharWidth, llvm::StringRef Source,
char *&ResultPtr, const UTF8 *&ErrorPtr);
/**
* Converts a UTF-8 StringRef to a std::wstring.
* \return true on success.
*/
bool ConvertUTF8toWide(llvm::StringRef Source, std::wstring &Result);
/**
* Converts a UTF-8 C-string to a std::wstring.
* \return true on success.
*/
bool ConvertUTF8toWide(const char *Source, std::wstring &Result);
/**
* Converts a std::wstring to a UTF-8 encoded std::string.
* \return true on success.
*/
bool convertWideToUTF8(const std::wstring &Source, std::string &Result);
/**
* Convert an Unicode code point to UTF8 sequence.
*
* \param Source a Unicode code point.
* \param [in,out] ResultPtr pointer to the output buffer, needs to be at least
* \c UNI_MAX_UTF8_BYTES_PER_CODE_POINT bytes. On success \c ResultPtr is
* updated one past end of the converted sequence.
*
* \returns true on success.
*/
bool ConvertCodePointToUTF8(unsigned Source, char *&ResultPtr);
/**
* Convert the first UTF8 sequence in the given source buffer to a UTF32
* code point.
*
* \param [in,out] source A pointer to the source buffer. If the conversion
* succeeds, this pointer will be updated to point to the byte just past the
* end of the converted sequence.
* \param sourceEnd A pointer just past the end of the source buffer.
* \param [out] target The converted code
* \param flags Whether the conversion is strict or lenient.
*
* \returns conversionOK on success
*
* \sa ConvertUTF8toUTF32
*/
inline ConversionResult convertUTF8Sequence(const UTF8 **source,
const UTF8 *sourceEnd,
UTF32 *target,
ConversionFlags flags) {
if (*source == sourceEnd)
return sourceExhausted;
unsigned size = getNumBytesForUTF8(**source);
if ((ptrdiff_t)size > sourceEnd - *source)
return sourceExhausted;
return ConvertUTF8toUTF32(source, *source + size, &target, target + 1, flags);
}
/**
* Returns true if a blob of text starts with a UTF-16 big or little endian byte
* order mark.
*/
bool hasUTF16ByteOrderMark(ArrayRef<char> SrcBytes);
/**
* Converts a stream of raw bytes assumed to be UTF16 into a UTF8 std::string.
*
* \param [in] SrcBytes A buffer of what is assumed to be UTF-16 encoded text.
* \param [out] Out Converted UTF-8 is stored here on success.
* \returns true on success
*/
bool convertUTF16ToUTF8String(ArrayRef<char> SrcBytes, std::string &Out);
/**
* Converts a UTF16 string into a UTF8 std::string.
*
* \param [in] Src A buffer of UTF-16 encoded text.
* \param [out] Out Converted UTF-8 is stored here on success.
* \returns true on success
*/
bool convertUTF16ToUTF8String(ArrayRef<UTF16> Src, std::string &Out);
/**
* Converts a stream of raw bytes assumed to be UTF32 into a UTF8 std::string.
*
* \param [in] SrcBytes A buffer of what is assumed to be UTF-32 encoded text.
* \param [out] Out Converted UTF-8 is stored here on success.
* \returns true on success
*/
bool convertUTF32ToUTF8String(ArrayRef<char> SrcBytes, std::string &Out);
/**
* Converts a UTF32 string into a UTF8 std::string.
*
* \param [in] Src A buffer of UTF-32 encoded text.
* \param [out] Out Converted UTF-8 is stored here on success.
* \returns true on success
*/
bool convertUTF32ToUTF8String(ArrayRef<UTF32> Src, std::string &Out);
/**
* Converts a UTF-8 string into a UTF-16 string with native endianness.
*
* \returns true on success
*/
bool convertUTF8ToUTF16String(StringRef SrcUTF8,
SmallVectorImpl<UTF16> &DstUTF16);
#if defined(_WIN32)
namespace sys {
namespace windows {
std::error_code UTF8ToUTF16(StringRef utf8, SmallVectorImpl<wchar_t> &utf16);
/// Convert to UTF16 from the current code page used in the system
std::error_code CurCPToUTF16(StringRef utf8, SmallVectorImpl<wchar_t> &utf16);
std::error_code UTF16ToUTF8(const wchar_t *utf16, size_t utf16_len,
SmallVectorImpl<char> &utf8);
/// Convert from UTF16 to the current code page used in the system
std::error_code UTF16ToCurCP(const wchar_t *utf16, size_t utf16_len,
SmallVectorImpl<char> &utf8);
} // namespace windows
} // namespace sys
#endif
} /* end namespace llvm */
#endif
PK hwFZ�vd�� � Support/Error.hnu �[��� //===- llvm/Support/Error.h - Recoverable error handling --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines an API used to report recoverable errors.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ERROR_H
#define LLVM_SUPPORT_ERROR_H
#include "llvm-c/Error.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Config/abi-breaking.h"
#include "llvm/Support/AlignOf.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/ErrorOr.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <cstdint>
#include <cstdlib>
#include <functional>
#include <memory>
#include <new>
#include <optional>
#include <string>
#include <system_error>
#include <type_traits>
#include <utility>
#include <vector>
namespace llvm {
class ErrorSuccess;
/// Base class for error info classes. Do not extend this directly: Extend
/// the ErrorInfo template subclass instead.
class ErrorInfoBase {
public:
virtual ~ErrorInfoBase() = default;
/// Print an error message to an output stream.
virtual void log(raw_ostream &OS) const = 0;
/// Return the error message as a string.
virtual std::string message() const {
std::string Msg;
raw_string_ostream OS(Msg);
log(OS);
return OS.str();
}
/// Convert this error to a std::error_code.
///
/// This is a temporary crutch to enable interaction with code still
/// using std::error_code. It will be removed in the future.
virtual std::error_code convertToErrorCode() const = 0;
// Returns the class ID for this type.
static const void *classID() { return &ID; }
// Returns the class ID for the dynamic type of this ErrorInfoBase instance.
virtual const void *dynamicClassID() const = 0;
// Check whether this instance is a subclass of the class identified by
// ClassID.
virtual bool isA(const void *const ClassID) const {
return ClassID == classID();
}
// Check whether this instance is a subclass of ErrorInfoT.
template <typename ErrorInfoT> bool isA() const {
return isA(ErrorInfoT::classID());
}
private:
virtual void anchor();
static char ID;
};
/// Lightweight error class with error context and mandatory checking.
///
/// Instances of this class wrap a ErrorInfoBase pointer. Failure states
/// are represented by setting the pointer to a ErrorInfoBase subclass
/// instance containing information describing the failure. Success is
/// represented by a null pointer value.
///
/// Instances of Error also contains a 'Checked' flag, which must be set
/// before the destructor is called, otherwise the destructor will trigger a
/// runtime error. This enforces at runtime the requirement that all Error
/// instances be checked or returned to the caller.
///
/// There are two ways to set the checked flag, depending on what state the
/// Error instance is in. For Error instances indicating success, it
/// is sufficient to invoke the boolean conversion operator. E.g.:
///
/// @code{.cpp}
/// Error foo(<...>);
///
/// if (auto E = foo(<...>))
/// return E; // <- Return E if it is in the error state.
/// // We have verified that E was in the success state. It can now be safely
/// // destroyed.
/// @endcode
///
/// A success value *can not* be dropped. For example, just calling 'foo(<...>)'
/// without testing the return value will raise a runtime error, even if foo
/// returns success.
///
/// For Error instances representing failure, you must use either the
/// handleErrors or handleAllErrors function with a typed handler. E.g.:
///
/// @code{.cpp}
/// class MyErrorInfo : public ErrorInfo<MyErrorInfo> {
/// // Custom error info.
/// };
///
/// Error foo(<...>) { return make_error<MyErrorInfo>(...); }
///
/// auto E = foo(<...>); // <- foo returns failure with MyErrorInfo.
/// auto NewE =
/// handleErrors(E,
/// [](const MyErrorInfo &M) {
/// // Deal with the error.
/// },
/// [](std::unique_ptr<OtherError> M) -> Error {
/// if (canHandle(*M)) {
/// // handle error.
/// return Error::success();
/// }
/// // Couldn't handle this error instance. Pass it up the stack.
/// return Error(std::move(M));
/// );
/// // Note - we must check or return NewE in case any of the handlers
/// // returned a new error.
/// @endcode
///
/// The handleAllErrors function is identical to handleErrors, except
/// that it has a void return type, and requires all errors to be handled and
/// no new errors be returned. It prevents errors (assuming they can all be
/// handled) from having to be bubbled all the way to the top-level.
///
/// *All* Error instances must be checked before destruction, even if
/// they're moved-assigned or constructed from Success values that have already
/// been checked. This enforces checking through all levels of the call stack.
class [[nodiscard]] Error {
// ErrorList needs to be able to yank ErrorInfoBase pointers out of Errors
// to add to the error list. It can't rely on handleErrors for this, since
// handleErrors does not support ErrorList handlers.
friend class ErrorList;
// handleErrors needs to be able to set the Checked flag.
template <typename... HandlerTs>
friend Error handleErrors(Error E, HandlerTs &&... Handlers);
// Expected<T> needs to be able to steal the payload when constructed from an
// error.
template <typename T> friend class Expected;
// wrap needs to be able to steal the payload.
friend LLVMErrorRef wrap(Error);
protected:
/// Create a success value. Prefer using 'Error::success()' for readability
Error() {
setPtr(nullptr);
setChecked(false);
}
public:
/// Create a success value.
static ErrorSuccess success();
// Errors are not copy-constructable.
Error(const Error &Other) = delete;
/// Move-construct an error value. The newly constructed error is considered
/// unchecked, even if the source error had been checked. The original error
/// becomes a checked Success value, regardless of its original state.
Error(Error &&Other) {
setChecked(true);
*this = std::move(Other);
}
/// Create an error value. Prefer using the 'make_error' function, but
/// this constructor can be useful when "re-throwing" errors from handlers.
Error(std::unique_ptr<ErrorInfoBase> Payload) {
setPtr(Payload.release());
setChecked(false);
}
// Errors are not copy-assignable.
Error &operator=(const Error &Other) = delete;
/// Move-assign an error value. The current error must represent success, you
/// you cannot overwrite an unhandled error. The current error is then
/// considered unchecked. The source error becomes a checked success value,
/// regardless of its original state.
Error &operator=(Error &&Other) {
// Don't allow overwriting of unchecked values.
assertIsChecked();
setPtr(Other.getPtr());
// This Error is unchecked, even if the source error was checked.
setChecked(false);
// Null out Other's payload and set its checked bit.
Other.setPtr(nullptr);
Other.setChecked(true);
return *this;
}
/// Destroy a Error. Fails with a call to abort() if the error is
/// unchecked.
~Error() {
assertIsChecked();
delete getPtr();
}
/// Bool conversion. Returns true if this Error is in a failure state,
/// and false if it is in an accept state. If the error is in a Success state
/// it will be considered checked.
explicit operator bool() {
setChecked(getPtr() == nullptr);
return getPtr() != nullptr;
}
/// Check whether one error is a subclass of another.
template <typename ErrT> bool isA() const {
return getPtr() && getPtr()->isA(ErrT::classID());
}
/// Returns the dynamic class id of this error, or null if this is a success
/// value.
const void* dynamicClassID() const {
if (!getPtr())
return nullptr;
return getPtr()->dynamicClassID();
}
private:
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
// assertIsChecked() happens very frequently, but under normal circumstances
// is supposed to be a no-op. So we want it to be inlined, but having a bunch
// of debug prints can cause the function to be too large for inlining. So
// it's important that we define this function out of line so that it can't be
// inlined.
[[noreturn]] void fatalUncheckedError() const;
#endif
void assertIsChecked() {
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
if (LLVM_UNLIKELY(!getChecked() || getPtr()))
fatalUncheckedError();
#endif
}
ErrorInfoBase *getPtr() const {
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
return reinterpret_cast<ErrorInfoBase*>(
reinterpret_cast<uintptr_t>(Payload) &
~static_cast<uintptr_t>(0x1));
#else
return Payload;
#endif
}
void setPtr(ErrorInfoBase *EI) {
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
Payload = reinterpret_cast<ErrorInfoBase*>(
(reinterpret_cast<uintptr_t>(EI) &
~static_cast<uintptr_t>(0x1)) |
(reinterpret_cast<uintptr_t>(Payload) & 0x1));
#else
Payload = EI;
#endif
}
bool getChecked() const {
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
return (reinterpret_cast<uintptr_t>(Payload) & 0x1) == 0;
#else
return true;
#endif
}
void setChecked(bool V) {
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
Payload = reinterpret_cast<ErrorInfoBase*>(
(reinterpret_cast<uintptr_t>(Payload) &
~static_cast<uintptr_t>(0x1)) |
(V ? 0 : 1));
#endif
}
std::unique_ptr<ErrorInfoBase> takePayload() {
std::unique_ptr<ErrorInfoBase> Tmp(getPtr());
setPtr(nullptr);
setChecked(true);
return Tmp;
}
friend raw_ostream &operator<<(raw_ostream &OS, const Error &E) {
if (auto *P = E.getPtr())
P->log(OS);
else
OS << "success";
return OS;
}
ErrorInfoBase *Payload = nullptr;
};
/// Subclass of Error for the sole purpose of identifying the success path in
/// the type system. This allows to catch invalid conversion to Expected<T> at
/// compile time.
class ErrorSuccess final : public Error {};
inline ErrorSuccess Error::success() { return ErrorSuccess(); }
/// Make a Error instance representing failure using the given error info
/// type.
template <typename ErrT, typename... ArgTs> Error make_error(ArgTs &&... Args) {
return Error(std::make_unique<ErrT>(std::forward<ArgTs>(Args)...));
}
/// Base class for user error types. Users should declare their error types
/// like:
///
/// class MyError : public ErrorInfo<MyError> {
/// ....
/// };
///
/// This class provides an implementation of the ErrorInfoBase::kind
/// method, which is used by the Error RTTI system.
template <typename ThisErrT, typename ParentErrT = ErrorInfoBase>
class ErrorInfo : public ParentErrT {
public:
using ParentErrT::ParentErrT; // inherit constructors
static const void *classID() { return &ThisErrT::ID; }
const void *dynamicClassID() const override { return &ThisErrT::ID; }
bool isA(const void *const ClassID) const override {
return ClassID == classID() || ParentErrT::isA(ClassID);
}
};
/// Special ErrorInfo subclass representing a list of ErrorInfos.
/// Instances of this class are constructed by joinError.
class ErrorList final : public ErrorInfo<ErrorList> {
// handleErrors needs to be able to iterate the payload list of an
// ErrorList.
template <typename... HandlerTs>
friend Error handleErrors(Error E, HandlerTs &&... Handlers);
// joinErrors is implemented in terms of join.
friend Error joinErrors(Error, Error);
public:
void log(raw_ostream &OS) const override {
OS << "Multiple errors:\n";
for (const auto &ErrPayload : Payloads) {
ErrPayload->log(OS);
OS << "\n";
}
}
std::error_code convertToErrorCode() const override;
// Used by ErrorInfo::classID.
static char ID;
private:
ErrorList(std::unique_ptr<ErrorInfoBase> Payload1,
std::unique_ptr<ErrorInfoBase> Payload2) {
assert(!Payload1->isA<ErrorList>() && !Payload2->isA<ErrorList>() &&
"ErrorList constructor payloads should be singleton errors");
Payloads.push_back(std::move(Payload1));
Payloads.push_back(std::move(Payload2));
}
static Error join(Error E1, Error E2) {
if (!E1)
return E2;
if (!E2)
return E1;
if (E1.isA<ErrorList>()) {
auto &E1List = static_cast<ErrorList &>(*E1.getPtr());
if (E2.isA<ErrorList>()) {
auto E2Payload = E2.takePayload();
auto &E2List = static_cast<ErrorList &>(*E2Payload);
for (auto &Payload : E2List.Payloads)
E1List.Payloads.push_back(std::move(Payload));
} else
E1List.Payloads.push_back(E2.takePayload());
return E1;
}
if (E2.isA<ErrorList>()) {
auto &E2List = static_cast<ErrorList &>(*E2.getPtr());
E2List.Payloads.insert(E2List.Payloads.begin(), E1.takePayload());
return E2;
}
return Error(std::unique_ptr<ErrorList>(
new ErrorList(E1.takePayload(), E2.takePayload())));
}
std::vector<std::unique_ptr<ErrorInfoBase>> Payloads;
};
/// Concatenate errors. The resulting Error is unchecked, and contains the
/// ErrorInfo(s), if any, contained in E1, followed by the
/// ErrorInfo(s), if any, contained in E2.
inline Error joinErrors(Error E1, Error E2) {
return ErrorList::join(std::move(E1), std::move(E2));
}
/// Tagged union holding either a T or a Error.
///
/// This class parallels ErrorOr, but replaces error_code with Error. Since
/// Error cannot be copied, this class replaces getError() with
/// takeError(). It also adds an bool errorIsA<ErrT>() method for testing the
/// error class type.
///
/// Example usage of 'Expected<T>' as a function return type:
///
/// @code{.cpp}
/// Expected<int> myDivide(int A, int B) {
/// if (B == 0) {
/// // return an Error
/// return createStringError(inconvertibleErrorCode(),
/// "B must not be zero!");
/// }
/// // return an integer
/// return A / B;
/// }
/// @endcode
///
/// Checking the results of to a function returning 'Expected<T>':
/// @code{.cpp}
/// if (auto E = Result.takeError()) {
/// // We must consume the error. Typically one of:
/// // - return the error to our caller
/// // - toString(), when logging
/// // - consumeError(), to silently swallow the error
/// // - handleErrors(), to distinguish error types
/// errs() << "Problem with division " << toString(std::move(E)) << "\n";
/// return;
/// }
/// // use the result
/// outs() << "The answer is " << *Result << "\n";
/// @endcode
///
/// For unit-testing a function returning an 'Expected<T>', see the
/// 'EXPECT_THAT_EXPECTED' macros in llvm/Testing/Support/Error.h
template <class T> class [[nodiscard]] Expected {
template <class T1> friend class ExpectedAsOutParameter;
template <class OtherT> friend class Expected;
static constexpr bool isRef = std::is_reference_v<T>;
using wrap = std::reference_wrapper<std::remove_reference_t<T>>;
using error_type = std::unique_ptr<ErrorInfoBase>;
public:
using storage_type = std::conditional_t<isRef, wrap, T>;
using value_type = T;
private:
using reference = std::remove_reference_t<T> &;
using const_reference = const std::remove_reference_t<T> &;
using pointer = std::remove_reference_t<T> *;
using const_pointer = const std::remove_reference_t<T> *;
public:
/// Create an Expected<T> error value from the given Error.
Expected(Error Err)
: HasError(true)
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
// Expected is unchecked upon construction in Debug builds.
, Unchecked(true)
#endif
{
assert(Err && "Cannot create Expected<T> from Error success value.");
new (getErrorStorage()) error_type(Err.takePayload());
}
/// Forbid to convert from Error::success() implicitly, this avoids having
/// Expected<T> foo() { return Error::success(); } which compiles otherwise
/// but triggers the assertion above.
Expected(ErrorSuccess) = delete;
/// Create an Expected<T> success value from the given OtherT value, which
/// must be convertible to T.
template <typename OtherT>
Expected(OtherT &&Val,
std::enable_if_t<std::is_convertible_v<OtherT, T>> * = nullptr)
: HasError(false)
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
// Expected is unchecked upon construction in Debug builds.
,
Unchecked(true)
#endif
{
new (getStorage()) storage_type(std::forward<OtherT>(Val));
}
/// Move construct an Expected<T> value.
Expected(Expected &&Other) { moveConstruct(std::move(Other)); }
/// Move construct an Expected<T> value from an Expected<OtherT>, where OtherT
/// must be convertible to T.
template <class OtherT>
Expected(Expected<OtherT> &&Other,
std::enable_if_t<std::is_convertible_v<OtherT, T>> * = nullptr) {
moveConstruct(std::move(Other));
}
/// Move construct an Expected<T> value from an Expected<OtherT>, where OtherT
/// isn't convertible to T.
template <class OtherT>
explicit Expected(
Expected<OtherT> &&Other,
std::enable_if_t<!std::is_convertible_v<OtherT, T>> * = nullptr) {
moveConstruct(std::move(Other));
}
/// Move-assign from another Expected<T>.
Expected &operator=(Expected &&Other) {
moveAssign(std::move(Other));
return *this;
}
/// Destroy an Expected<T>.
~Expected() {
assertIsChecked();
if (!HasError)
getStorage()->~storage_type();
else
getErrorStorage()->~error_type();
}
/// Return false if there is an error.
explicit operator bool() {
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
Unchecked = HasError;
#endif
return !HasError;
}
/// Returns a reference to the stored T value.
reference get() {
assertIsChecked();
return *getStorage();
}
/// Returns a const reference to the stored T value.
const_reference get() const {
assertIsChecked();
return const_cast<Expected<T> *>(this)->get();
}
/// Returns \a takeError() after moving the held T (if any) into \p V.
template <class OtherT>
Error moveInto(
OtherT &Value,
std::enable_if_t<std::is_assignable_v<OtherT &, T &&>> * = nullptr) && {
if (*this)
Value = std::move(get());
return takeError();
}
/// Check that this Expected<T> is an error of type ErrT.
template <typename ErrT> bool errorIsA() const {
return HasError && (*getErrorStorage())->template isA<ErrT>();
}
/// Take ownership of the stored error.
/// After calling this the Expected<T> is in an indeterminate state that can
/// only be safely destructed. No further calls (beside the destructor) should
/// be made on the Expected<T> value.
Error takeError() {
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
Unchecked = false;
#endif
return HasError ? Error(std::move(*getErrorStorage())) : Error::success();
}
/// Returns a pointer to the stored T value.
pointer operator->() {
assertIsChecked();
return toPointer(getStorage());
}
/// Returns a const pointer to the stored T value.
const_pointer operator->() const {
assertIsChecked();
return toPointer(getStorage());
}
/// Returns a reference to the stored T value.
reference operator*() {
assertIsChecked();
return *getStorage();
}
/// Returns a const reference to the stored T value.
const_reference operator*() const {
assertIsChecked();
return *getStorage();
}
private:
template <class T1>
static bool compareThisIfSameType(const T1 &a, const T1 &b) {
return &a == &b;
}
template <class T1, class T2>
static bool compareThisIfSameType(const T1 &, const T2 &) {
return false;
}
template <class OtherT> void moveConstruct(Expected<OtherT> &&Other) {
HasError = Other.HasError;
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
Unchecked = true;
Other.Unchecked = false;
#endif
if (!HasError)
new (getStorage()) storage_type(std::move(*Other.getStorage()));
else
new (getErrorStorage()) error_type(std::move(*Other.getErrorStorage()));
}
template <class OtherT> void moveAssign(Expected<OtherT> &&Other) {
assertIsChecked();
if (compareThisIfSameType(*this, Other))
return;
this->~Expected();
new (this) Expected(std::move(Other));
}
pointer toPointer(pointer Val) { return Val; }
const_pointer toPointer(const_pointer Val) const { return Val; }
pointer toPointer(wrap *Val) { return &Val->get(); }
const_pointer toPointer(const wrap *Val) const { return &Val->get(); }
storage_type *getStorage() {
assert(!HasError && "Cannot get value when an error exists!");
return reinterpret_cast<storage_type *>(&TStorage);
}
const storage_type *getStorage() const {
assert(!HasError && "Cannot get value when an error exists!");
return reinterpret_cast<const storage_type *>(&TStorage);
}
error_type *getErrorStorage() {
assert(HasError && "Cannot get error when a value exists!");
return reinterpret_cast<error_type *>(&ErrorStorage);
}
const error_type *getErrorStorage() const {
assert(HasError && "Cannot get error when a value exists!");
return reinterpret_cast<const error_type *>(&ErrorStorage);
}
// Used by ExpectedAsOutParameter to reset the checked flag.
void setUnchecked() {
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
Unchecked = true;
#endif
}
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
[[noreturn]] LLVM_ATTRIBUTE_NOINLINE void fatalUncheckedExpected() const {
dbgs() << "Expected<T> must be checked before access or destruction.\n";
if (HasError) {
dbgs() << "Unchecked Expected<T> contained error:\n";
(*getErrorStorage())->log(dbgs());
} else
dbgs() << "Expected<T> value was in success state. (Note: Expected<T> "
"values in success mode must still be checked prior to being "
"destroyed).\n";
abort();
}
#endif
void assertIsChecked() const {
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
if (LLVM_UNLIKELY(Unchecked))
fatalUncheckedExpected();
#endif
}
union {
AlignedCharArrayUnion<storage_type> TStorage;
AlignedCharArrayUnion<error_type> ErrorStorage;
};
bool HasError : 1;
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
bool Unchecked : 1;
#endif
};
/// Report a serious error, calling any installed error handler. See
/// ErrorHandling.h.
[[noreturn]] void report_fatal_error(Error Err, bool gen_crash_diag = true);
/// Report a fatal error if Err is a failure value.
///
/// This function can be used to wrap calls to fallible functions ONLY when it
/// is known that the Error will always be a success value. E.g.
///
/// @code{.cpp}
/// // foo only attempts the fallible operation if DoFallibleOperation is
/// // true. If DoFallibleOperation is false then foo always returns
/// // Error::success().
/// Error foo(bool DoFallibleOperation);
///
/// cantFail(foo(false));
/// @endcode
inline void cantFail(Error Err, const char *Msg = nullptr) {
if (Err) {
if (!Msg)
Msg = "Failure value returned from cantFail wrapped call";
#ifndef NDEBUG
std::string Str;
raw_string_ostream OS(Str);
OS << Msg << "\n" << Err;
Msg = OS.str().c_str();
#endif
llvm_unreachable(Msg);
}
}
/// Report a fatal error if ValOrErr is a failure value, otherwise unwraps and
/// returns the contained value.
///
/// This function can be used to wrap calls to fallible functions ONLY when it
/// is known that the Error will always be a success value. E.g.
///
/// @code{.cpp}
/// // foo only attempts the fallible operation if DoFallibleOperation is
/// // true. If DoFallibleOperation is false then foo always returns an int.
/// Expected<int> foo(bool DoFallibleOperation);
///
/// int X = cantFail(foo(false));
/// @endcode
template <typename T>
T cantFail(Expected<T> ValOrErr, const char *Msg = nullptr) {
if (ValOrErr)
return std::move(*ValOrErr);
else {
if (!Msg)
Msg = "Failure value returned from cantFail wrapped call";
#ifndef NDEBUG
std::string Str;
raw_string_ostream OS(Str);
auto E = ValOrErr.takeError();
OS << Msg << "\n" << E;
Msg = OS.str().c_str();
#endif
llvm_unreachable(Msg);
}
}
/// Report a fatal error if ValOrErr is a failure value, otherwise unwraps and
/// returns the contained reference.
///
/// This function can be used to wrap calls to fallible functions ONLY when it
/// is known that the Error will always be a success value. E.g.
///
/// @code{.cpp}
/// // foo only attempts the fallible operation if DoFallibleOperation is
/// // true. If DoFallibleOperation is false then foo always returns a Bar&.
/// Expected<Bar&> foo(bool DoFallibleOperation);
///
/// Bar &X = cantFail(foo(false));
/// @endcode
template <typename T>
T& cantFail(Expected<T&> ValOrErr, const char *Msg = nullptr) {
if (ValOrErr)
return *ValOrErr;
else {
if (!Msg)
Msg = "Failure value returned from cantFail wrapped call";
#ifndef NDEBUG
std::string Str;
raw_string_ostream OS(Str);
auto E = ValOrErr.takeError();
OS << Msg << "\n" << E;
Msg = OS.str().c_str();
#endif
llvm_unreachable(Msg);
}
}
/// Helper for testing applicability of, and applying, handlers for
/// ErrorInfo types.
template <typename HandlerT>
class ErrorHandlerTraits
: public ErrorHandlerTraits<
decltype(&std::remove_reference_t<HandlerT>::operator())> {};
// Specialization functions of the form 'Error (const ErrT&)'.
template <typename ErrT> class ErrorHandlerTraits<Error (&)(ErrT &)> {
public:
static bool appliesTo(const ErrorInfoBase &E) {
return E.template isA<ErrT>();
}
template <typename HandlerT>
static Error apply(HandlerT &&H, std::unique_ptr<ErrorInfoBase> E) {
assert(appliesTo(*E) && "Applying incorrect handler");
return H(static_cast<ErrT &>(*E));
}
};
// Specialization functions of the form 'void (const ErrT&)'.
template <typename ErrT> class ErrorHandlerTraits<void (&)(ErrT &)> {
public:
static bool appliesTo(const ErrorInfoBase &E) {
return E.template isA<ErrT>();
}
template <typename HandlerT>
static Error apply(HandlerT &&H, std::unique_ptr<ErrorInfoBase> E) {
assert(appliesTo(*E) && "Applying incorrect handler");
H(static_cast<ErrT &>(*E));
return Error::success();
}
};
/// Specialization for functions of the form 'Error (std::unique_ptr<ErrT>)'.
template <typename ErrT>
class ErrorHandlerTraits<Error (&)(std::unique_ptr<ErrT>)> {
public:
static bool appliesTo(const ErrorInfoBase &E) {
return E.template isA<ErrT>();
}
template <typename HandlerT>
static Error apply(HandlerT &&H, std::unique_ptr<ErrorInfoBase> E) {
assert(appliesTo(*E) && "Applying incorrect handler");
std::unique_ptr<ErrT> SubE(static_cast<ErrT *>(E.release()));
return H(std::move(SubE));
}
};
/// Specialization for functions of the form 'void (std::unique_ptr<ErrT>)'.
template <typename ErrT>
class ErrorHandlerTraits<void (&)(std::unique_ptr<ErrT>)> {
public:
static bool appliesTo(const ErrorInfoBase &E) {
return E.template isA<ErrT>();
}
template <typename HandlerT>
static Error apply(HandlerT &&H, std::unique_ptr<ErrorInfoBase> E) {
assert(appliesTo(*E) && "Applying incorrect handler");
std::unique_ptr<ErrT> SubE(static_cast<ErrT *>(E.release()));
H(std::move(SubE));
return Error::success();
}
};
// Specialization for member functions of the form 'RetT (const ErrT&)'.
template <typename C, typename RetT, typename ErrT>
class ErrorHandlerTraits<RetT (C::*)(ErrT &)>
: public ErrorHandlerTraits<RetT (&)(ErrT &)> {};
// Specialization for member functions of the form 'RetT (const ErrT&) const'.
template <typename C, typename RetT, typename ErrT>
class ErrorHandlerTraits<RetT (C::*)(ErrT &) const>
: public ErrorHandlerTraits<RetT (&)(ErrT &)> {};
// Specialization for member functions of the form 'RetT (const ErrT&)'.
template <typename C, typename RetT, typename ErrT>
class ErrorHandlerTraits<RetT (C::*)(const ErrT &)>
: public ErrorHandlerTraits<RetT (&)(ErrT &)> {};
// Specialization for member functions of the form 'RetT (const ErrT&) const'.
template <typename C, typename RetT, typename ErrT>
class ErrorHandlerTraits<RetT (C::*)(const ErrT &) const>
: public ErrorHandlerTraits<RetT (&)(ErrT &)> {};
/// Specialization for member functions of the form
/// 'RetT (std::unique_ptr<ErrT>)'.
template <typename C, typename RetT, typename ErrT>
class ErrorHandlerTraits<RetT (C::*)(std::unique_ptr<ErrT>)>
: public ErrorHandlerTraits<RetT (&)(std::unique_ptr<ErrT>)> {};
/// Specialization for member functions of the form
/// 'RetT (std::unique_ptr<ErrT>) const'.
template <typename C, typename RetT, typename ErrT>
class ErrorHandlerTraits<RetT (C::*)(std::unique_ptr<ErrT>) const>
: public ErrorHandlerTraits<RetT (&)(std::unique_ptr<ErrT>)> {};
inline Error handleErrorImpl(std::unique_ptr<ErrorInfoBase> Payload) {
return Error(std::move(Payload));
}
template <typename HandlerT, typename... HandlerTs>
Error handleErrorImpl(std::unique_ptr<ErrorInfoBase> Payload,
HandlerT &&Handler, HandlerTs &&... Handlers) {
if (ErrorHandlerTraits<HandlerT>::appliesTo(*Payload))
return ErrorHandlerTraits<HandlerT>::apply(std::forward<HandlerT>(Handler),
std::move(Payload));
return handleErrorImpl(std::move(Payload),
std::forward<HandlerTs>(Handlers)...);
}
/// Pass the ErrorInfo(s) contained in E to their respective handlers. Any
/// unhandled errors (or Errors returned by handlers) are re-concatenated and
/// returned.
/// Because this function returns an error, its result must also be checked
/// or returned. If you intend to handle all errors use handleAllErrors
/// (which returns void, and will abort() on unhandled errors) instead.
template <typename... HandlerTs>
Error handleErrors(Error E, HandlerTs &&... Hs) {
if (!E)
return Error::success();
std::unique_ptr<ErrorInfoBase> Payload = E.takePayload();
if (Payload->isA<ErrorList>()) {
ErrorList &List = static_cast<ErrorList &>(*Payload);
Error R;
for (auto &P : List.Payloads)
R = ErrorList::join(
std::move(R),
handleErrorImpl(std::move(P), std::forward<HandlerTs>(Hs)...));
return R;
}
return handleErrorImpl(std::move(Payload), std::forward<HandlerTs>(Hs)...);
}
/// Behaves the same as handleErrors, except that by contract all errors
/// *must* be handled by the given handlers (i.e. there must be no remaining
/// errors after running the handlers, or llvm_unreachable is called).
template <typename... HandlerTs>
void handleAllErrors(Error E, HandlerTs &&... Handlers) {
cantFail(handleErrors(std::move(E), std::forward<HandlerTs>(Handlers)...));
}
/// Check that E is a non-error, then drop it.
/// If E is an error, llvm_unreachable will be called.
inline void handleAllErrors(Error E) {
cantFail(std::move(E));
}
/// Handle any errors (if present) in an Expected<T>, then try a recovery path.
///
/// If the incoming value is a success value it is returned unmodified. If it
/// is a failure value then it the contained error is passed to handleErrors.
/// If handleErrors is able to handle the error then the RecoveryPath functor
/// is called to supply the final result. If handleErrors is not able to
/// handle all errors then the unhandled errors are returned.
///
/// This utility enables the follow pattern:
///
/// @code{.cpp}
/// enum FooStrategy { Aggressive, Conservative };
/// Expected<Foo> foo(FooStrategy S);
///
/// auto ResultOrErr =
/// handleExpected(
/// foo(Aggressive),
/// []() { return foo(Conservative); },
/// [](AggressiveStrategyError&) {
/// // Implicitly conusme this - we'll recover by using a conservative
/// // strategy.
/// });
///
/// @endcode
template <typename T, typename RecoveryFtor, typename... HandlerTs>
Expected<T> handleExpected(Expected<T> ValOrErr, RecoveryFtor &&RecoveryPath,
HandlerTs &&... Handlers) {
if (ValOrErr)
return ValOrErr;
if (auto Err = handleErrors(ValOrErr.takeError(),
std::forward<HandlerTs>(Handlers)...))
return std::move(Err);
return RecoveryPath();
}
/// Log all errors (if any) in E to OS. If there are any errors, ErrorBanner
/// will be printed before the first one is logged. A newline will be printed
/// after each error.
///
/// This function is compatible with the helpers from Support/WithColor.h. You
/// can pass any of them as the OS. Please consider using them instead of
/// including 'error: ' in the ErrorBanner.
///
/// This is useful in the base level of your program to allow clean termination
/// (allowing clean deallocation of resources, etc.), while reporting error
/// information to the user.
void logAllUnhandledErrors(Error E, raw_ostream &OS, Twine ErrorBanner = {});
/// Write all error messages (if any) in E to a string. The newline character
/// is used to separate error messages.
std::string toString(Error E);
/// Consume a Error without doing anything. This method should be used
/// only where an error can be considered a reasonable and expected return
/// value.
///
/// Uses of this method are potentially indicative of design problems: If it's
/// legitimate to do nothing while processing an "error", the error-producer
/// might be more clearly refactored to return an std::optional<T>.
inline void consumeError(Error Err) {
handleAllErrors(std::move(Err), [](const ErrorInfoBase &) {});
}
/// Convert an Expected to an Optional without doing anything. This method
/// should be used only where an error can be considered a reasonable and
/// expected return value.
///
/// Uses of this method are potentially indicative of problems: perhaps the
/// error should be propagated further, or the error-producer should just
/// return an Optional in the first place.
template <typename T> std::optional<T> expectedToOptional(Expected<T> &&E) {
if (E)
return std::move(*E);
consumeError(E.takeError());
return std::nullopt;
}
template <typename T> std::optional<T> expectedToStdOptional(Expected<T> &&E) {
if (E)
return std::move(*E);
consumeError(E.takeError());
return std::nullopt;
}
/// Helper for converting an Error to a bool.
///
/// This method returns true if Err is in an error state, or false if it is
/// in a success state. Puts Err in a checked state in both cases (unlike
/// Error::operator bool(), which only does this for success states).
inline bool errorToBool(Error Err) {
bool IsError = static_cast<bool>(Err);
if (IsError)
consumeError(std::move(Err));
return IsError;
}
/// Helper for Errors used as out-parameters.
///
/// This helper is for use with the Error-as-out-parameter idiom, where an error
/// is passed to a function or method by reference, rather than being returned.
/// In such cases it is helpful to set the checked bit on entry to the function
/// so that the error can be written to (unchecked Errors abort on assignment)
/// and clear the checked bit on exit so that clients cannot accidentally forget
/// to check the result. This helper performs these actions automatically using
/// RAII:
///
/// @code{.cpp}
/// Result foo(Error &Err) {
/// ErrorAsOutParameter ErrAsOutParam(&Err); // 'Checked' flag set
/// // <body of foo>
/// // <- 'Checked' flag auto-cleared when ErrAsOutParam is destructed.
/// }
/// @endcode
///
/// ErrorAsOutParameter takes an Error* rather than Error& so that it can be
/// used with optional Errors (Error pointers that are allowed to be null). If
/// ErrorAsOutParameter took an Error reference, an instance would have to be
/// created inside every condition that verified that Error was non-null. By
/// taking an Error pointer we can just create one instance at the top of the
/// function.
class ErrorAsOutParameter {
public:
ErrorAsOutParameter(Error *Err) : Err(Err) {
// Raise the checked bit if Err is success.
if (Err)
(void)!!*Err;
}
~ErrorAsOutParameter() {
// Clear the checked bit.
if (Err && !*Err)
*Err = Error::success();
}
private:
Error *Err;
};
/// Helper for Expected<T>s used as out-parameters.
///
/// See ErrorAsOutParameter.
template <typename T>
class ExpectedAsOutParameter {
public:
ExpectedAsOutParameter(Expected<T> *ValOrErr)
: ValOrErr(ValOrErr) {
if (ValOrErr)
(void)!!*ValOrErr;
}
~ExpectedAsOutParameter() {
if (ValOrErr)
ValOrErr->setUnchecked();
}
private:
Expected<T> *ValOrErr;
};
/// This class wraps a std::error_code in a Error.
///
/// This is useful if you're writing an interface that returns a Error
/// (or Expected) and you want to call code that still returns
/// std::error_codes.
class ECError : public ErrorInfo<ECError> {
friend Error errorCodeToError(std::error_code);
void anchor() override;
public:
void setErrorCode(std::error_code EC) { this->EC = EC; }
std::error_code convertToErrorCode() const override { return EC; }
void log(raw_ostream &OS) const override { OS << EC.message(); }
// Used by ErrorInfo::classID.
static char ID;
protected:
ECError() = default;
ECError(std::error_code EC) : EC(EC) {}
std::error_code EC;
};
/// The value returned by this function can be returned from convertToErrorCode
/// for Error values where no sensible translation to std::error_code exists.
/// It should only be used in this situation, and should never be used where a
/// sensible conversion to std::error_code is available, as attempts to convert
/// to/from this error will result in a fatal error. (i.e. it is a programmatic
/// error to try to convert such a value).
std::error_code inconvertibleErrorCode();
/// Helper for converting an std::error_code to a Error.
Error errorCodeToError(std::error_code EC);
/// Helper for converting an ECError to a std::error_code.
///
/// This method requires that Err be Error() or an ECError, otherwise it
/// will trigger a call to abort().
std::error_code errorToErrorCode(Error Err);
/// Convert an ErrorOr<T> to an Expected<T>.
template <typename T> Expected<T> errorOrToExpected(ErrorOr<T> &&EO) {
if (auto EC = EO.getError())
return errorCodeToError(EC);
return std::move(*EO);
}
/// Convert an Expected<T> to an ErrorOr<T>.
template <typename T> ErrorOr<T> expectedToErrorOr(Expected<T> &&E) {
if (auto Err = E.takeError())
return errorToErrorCode(std::move(Err));
return std::move(*E);
}
/// This class wraps a string in an Error.
///
/// StringError is useful in cases where the client is not expected to be able
/// to consume the specific error message programmatically (for example, if the
/// error message is to be presented to the user).
///
/// StringError can also be used when additional information is to be printed
/// along with a error_code message. Depending on the constructor called, this
/// class can either display:
/// 1. the error_code message (ECError behavior)
/// 2. a string
/// 3. the error_code message and a string
///
/// These behaviors are useful when subtyping is required; for example, when a
/// specific library needs an explicit error type. In the example below,
/// PDBError is derived from StringError:
///
/// @code{.cpp}
/// Expected<int> foo() {
/// return llvm::make_error<PDBError>(pdb_error_code::dia_failed_loading,
/// "Additional information");
/// }
/// @endcode
///
class StringError : public ErrorInfo<StringError> {
public:
static char ID;
// Prints EC + S and converts to EC
StringError(std::error_code EC, const Twine &S = Twine());
// Prints S and converts to EC
StringError(const Twine &S, std::error_code EC);
void log(raw_ostream &OS) const override;
std::error_code convertToErrorCode() const override;
const std::string &getMessage() const { return Msg; }
private:
std::string Msg;
std::error_code EC;
const bool PrintMsgOnly = false;
};
/// Create formatted StringError object.
template <typename... Ts>
inline Error createStringError(std::error_code EC, char const *Fmt,
const Ts &... Vals) {
std::string Buffer;
raw_string_ostream Stream(Buffer);
Stream << format(Fmt, Vals...);
return make_error<StringError>(Stream.str(), EC);
}
Error createStringError(std::error_code EC, char const *Msg);
inline Error createStringError(std::error_code EC, const Twine &S) {
return createStringError(EC, S.str().c_str());
}
template <typename... Ts>
inline Error createStringError(std::errc EC, char const *Fmt,
const Ts &... Vals) {
return createStringError(std::make_error_code(EC), Fmt, Vals...);
}
/// This class wraps a filename and another Error.
///
/// In some cases, an error needs to live along a 'source' name, in order to
/// show more detailed information to the user.
class FileError final : public ErrorInfo<FileError> {
friend Error createFileError(const Twine &, Error);
friend Error createFileError(const Twine &, size_t, Error);
public:
void log(raw_ostream &OS) const override {
assert(Err && "Trying to log after takeError().");
OS << "'" << FileName << "': ";
if (Line)
OS << "line " << *Line << ": ";
Err->log(OS);
}
std::string messageWithoutFileInfo() const {
std::string Msg;
raw_string_ostream OS(Msg);
Err->log(OS);
return OS.str();
}
StringRef getFileName() const { return FileName; }
Error takeError() { return Error(std::move(Err)); }
std::error_code convertToErrorCode() const override;
// Used by ErrorInfo::classID.
static char ID;
private:
FileError(const Twine &F, std::optional<size_t> LineNum,
std::unique_ptr<ErrorInfoBase> E) {
assert(E && "Cannot create FileError from Error success value.");
FileName = F.str();
Err = std::move(E);
Line = std::move(LineNum);
}
static Error build(const Twine &F, std::optional<size_t> Line, Error E) {
std::unique_ptr<ErrorInfoBase> Payload;
handleAllErrors(std::move(E),
[&](std::unique_ptr<ErrorInfoBase> EIB) -> Error {
Payload = std::move(EIB);
return Error::success();
});
return Error(
std::unique_ptr<FileError>(new FileError(F, Line, std::move(Payload))));
}
std::string FileName;
std::optional<size_t> Line;
std::unique_ptr<ErrorInfoBase> Err;
};
/// Concatenate a source file path and/or name with an Error. The resulting
/// Error is unchecked.
inline Error createFileError(const Twine &F, Error E) {
return FileError::build(F, std::optional<size_t>(), std::move(E));
}
/// Concatenate a source file path and/or name with line number and an Error.
/// The resulting Error is unchecked.
inline Error createFileError(const Twine &F, size_t Line, Error E) {
return FileError::build(F, std::optional<size_t>(Line), std::move(E));
}
/// Concatenate a source file path and/or name with a std::error_code
/// to form an Error object.
inline Error createFileError(const Twine &F, std::error_code EC) {
return createFileError(F, errorCodeToError(EC));
}
/// Concatenate a source file path and/or name with line number and
/// std::error_code to form an Error object.
inline Error createFileError(const Twine &F, size_t Line, std::error_code EC) {
return createFileError(F, Line, errorCodeToError(EC));
}
Error createFileError(const Twine &F, ErrorSuccess) = delete;
/// Helper for check-and-exit error handling.
///
/// For tool use only. NOT FOR USE IN LIBRARY CODE.
///
class ExitOnError {
public:
/// Create an error on exit helper.
ExitOnError(std::string Banner = "", int DefaultErrorExitCode = 1)
: Banner(std::move(Banner)),
GetExitCode([=](const Error &) { return DefaultErrorExitCode; }) {}
/// Set the banner string for any errors caught by operator().
void setBanner(std::string Banner) { this->Banner = std::move(Banner); }
/// Set the exit-code mapper function.
void setExitCodeMapper(std::function<int(const Error &)> GetExitCode) {
this->GetExitCode = std::move(GetExitCode);
}
/// Check Err. If it's in a failure state log the error(s) and exit.
void operator()(Error Err) const { checkError(std::move(Err)); }
/// Check E. If it's in a success state then return the contained value. If
/// it's in a failure state log the error(s) and exit.
template <typename T> T operator()(Expected<T> &&E) const {
checkError(E.takeError());
return std::move(*E);
}
/// Check E. If it's in a success state then return the contained reference. If
/// it's in a failure state log the error(s) and exit.
template <typename T> T& operator()(Expected<T&> &&E) const {
checkError(E.takeError());
return *E;
}
private:
void checkError(Error Err) const {
if (Err) {
int ExitCode = GetExitCode(Err);
logAllUnhandledErrors(std::move(Err), errs(), Banner);
exit(ExitCode);
}
}
std::string Banner;
std::function<int(const Error &)> GetExitCode;
};
/// Conversion from Error to LLVMErrorRef for C error bindings.
inline LLVMErrorRef wrap(Error Err) {
return reinterpret_cast<LLVMErrorRef>(Err.takePayload().release());
}
/// Conversion from LLVMErrorRef to Error for C error bindings.
inline Error unwrap(LLVMErrorRef ErrRef) {
return Error(std::unique_ptr<ErrorInfoBase>(
reinterpret_cast<ErrorInfoBase *>(ErrRef)));
}
} // end namespace llvm
#endif // LLVM_SUPPORT_ERROR_H
PK hwFZ_�)-Ay Ay Support/Casting.hnu �[��� //===- llvm/Support/Casting.h - Allow flexible, checked, casts --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the isa<X>(), cast<X>(), dyn_cast<X>(),
// cast_if_present<X>(), and dyn_cast_if_present<X>() templates.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_CASTING_H
#define LLVM_SUPPORT_CASTING_H
#include "llvm/Support/Compiler.h"
#include "llvm/Support/type_traits.h"
#include <cassert>
#include <memory>
#include <optional>
#include <type_traits>
namespace llvm {
//===----------------------------------------------------------------------===//
// simplify_type
//===----------------------------------------------------------------------===//
/// Define a template that can be specialized by smart pointers to reflect the
/// fact that they are automatically dereferenced, and are not involved with the
/// template selection process... the default implementation is a noop.
// TODO: rename this and/or replace it with other cast traits.
template <typename From> struct simplify_type {
using SimpleType = From; // The real type this represents...
// An accessor to get the real value...
static SimpleType &getSimplifiedValue(From &Val) { return Val; }
};
template <typename From> struct simplify_type<const From> {
using NonConstSimpleType = typename simplify_type<From>::SimpleType;
using SimpleType = typename add_const_past_pointer<NonConstSimpleType>::type;
using RetType =
typename add_lvalue_reference_if_not_pointer<SimpleType>::type;
static RetType getSimplifiedValue(const From &Val) {
return simplify_type<From>::getSimplifiedValue(const_cast<From &>(Val));
}
};
// TODO: add this namespace once everyone is switched to using the new
// interface.
// namespace detail {
//===----------------------------------------------------------------------===//
// isa_impl
//===----------------------------------------------------------------------===//
// The core of the implementation of isa<X> is here; To and From should be
// the names of classes. This template can be specialized to customize the
// implementation of isa<> without rewriting it from scratch.
template <typename To, typename From, typename Enabler = void> struct isa_impl {
static inline bool doit(const From &Val) { return To::classof(&Val); }
};
// Always allow upcasts, and perform no dynamic check for them.
template <typename To, typename From>
struct isa_impl<To, From, std::enable_if_t<std::is_base_of_v<To, From>>> {
static inline bool doit(const From &) { return true; }
};
template <typename To, typename From> struct isa_impl_cl {
static inline bool doit(const From &Val) {
return isa_impl<To, From>::doit(Val);
}
};
template <typename To, typename From> struct isa_impl_cl<To, const From> {
static inline bool doit(const From &Val) {
return isa_impl<To, From>::doit(Val);
}
};
template <typename To, typename From>
struct isa_impl_cl<To, const std::unique_ptr<From>> {
static inline bool doit(const std::unique_ptr<From> &Val) {
assert(Val && "isa<> used on a null pointer");
return isa_impl_cl<To, From>::doit(*Val);
}
};
template <typename To, typename From> struct isa_impl_cl<To, From *> {
static inline bool doit(const From *Val) {
assert(Val && "isa<> used on a null pointer");
return isa_impl<To, From>::doit(*Val);
}
};
template <typename To, typename From> struct isa_impl_cl<To, From *const> {
static inline bool doit(const From *Val) {
assert(Val && "isa<> used on a null pointer");
return isa_impl<To, From>::doit(*Val);
}
};
template <typename To, typename From> struct isa_impl_cl<To, const From *> {
static inline bool doit(const From *Val) {
assert(Val && "isa<> used on a null pointer");
return isa_impl<To, From>::doit(*Val);
}
};
template <typename To, typename From>
struct isa_impl_cl<To, const From *const> {
static inline bool doit(const From *Val) {
assert(Val && "isa<> used on a null pointer");
return isa_impl<To, From>::doit(*Val);
}
};
template <typename To, typename From, typename SimpleFrom>
struct isa_impl_wrap {
// When From != SimplifiedType, we can simplify the type some more by using
// the simplify_type template.
static bool doit(const From &Val) {
return isa_impl_wrap<To, SimpleFrom,
typename simplify_type<SimpleFrom>::SimpleType>::
doit(simplify_type<const From>::getSimplifiedValue(Val));
}
};
template <typename To, typename FromTy>
struct isa_impl_wrap<To, FromTy, FromTy> {
// When From == SimpleType, we are as simple as we are going to get.
static bool doit(const FromTy &Val) {
return isa_impl_cl<To, FromTy>::doit(Val);
}
};
//===----------------------------------------------------------------------===//
// cast_retty + cast_retty_impl
//===----------------------------------------------------------------------===//
template <class To, class From> struct cast_retty;
// Calculate what type the 'cast' function should return, based on a requested
// type of To and a source type of From.
template <class To, class From> struct cast_retty_impl {
using ret_type = To &; // Normal case, return Ty&
};
template <class To, class From> struct cast_retty_impl<To, const From> {
using ret_type = const To &; // Normal case, return Ty&
};
template <class To, class From> struct cast_retty_impl<To, From *> {
using ret_type = To *; // Pointer arg case, return Ty*
};
template <class To, class From> struct cast_retty_impl<To, const From *> {
using ret_type = const To *; // Constant pointer arg case, return const Ty*
};
template <class To, class From> struct cast_retty_impl<To, const From *const> {
using ret_type = const To *; // Constant pointer arg case, return const Ty*
};
template <class To, class From>
struct cast_retty_impl<To, std::unique_ptr<From>> {
private:
using PointerType = typename cast_retty_impl<To, From *>::ret_type;
using ResultType = std::remove_pointer_t<PointerType>;
public:
using ret_type = std::unique_ptr<ResultType>;
};
template <class To, class From, class SimpleFrom> struct cast_retty_wrap {
// When the simplified type and the from type are not the same, use the type
// simplifier to reduce the type, then reuse cast_retty_impl to get the
// resultant type.
using ret_type = typename cast_retty<To, SimpleFrom>::ret_type;
};
template <class To, class FromTy> struct cast_retty_wrap<To, FromTy, FromTy> {
// When the simplified type is equal to the from type, use it directly.
using ret_type = typename cast_retty_impl<To, FromTy>::ret_type;
};
template <class To, class From> struct cast_retty {
using ret_type = typename cast_retty_wrap<
To, From, typename simplify_type<From>::SimpleType>::ret_type;
};
//===----------------------------------------------------------------------===//
// cast_convert_val
//===----------------------------------------------------------------------===//
// Ensure the non-simple values are converted using the simplify_type template
// that may be specialized by smart pointers...
//
template <class To, class From, class SimpleFrom> struct cast_convert_val {
// This is not a simple type, use the template to simplify it...
static typename cast_retty<To, From>::ret_type doit(const From &Val) {
return cast_convert_val<To, SimpleFrom,
typename simplify_type<SimpleFrom>::SimpleType>::
doit(simplify_type<From>::getSimplifiedValue(const_cast<From &>(Val)));
}
};
template <class To, class FromTy> struct cast_convert_val<To, FromTy, FromTy> {
// If it's a reference, switch to a pointer to do the cast and then deref it.
static typename cast_retty<To, FromTy>::ret_type doit(const FromTy &Val) {
return *(std::remove_reference_t<typename cast_retty<To, FromTy>::ret_type>
*)&const_cast<FromTy &>(Val);
}
};
template <class To, class FromTy>
struct cast_convert_val<To, FromTy *, FromTy *> {
// If it's a pointer, we can use c-style casting directly.
static typename cast_retty<To, FromTy *>::ret_type doit(const FromTy *Val) {
return (typename cast_retty<To, FromTy *>::ret_type) const_cast<FromTy *>(
Val);
}
};
//===----------------------------------------------------------------------===//
// is_simple_type
//===----------------------------------------------------------------------===//
template <class X> struct is_simple_type {
static const bool value =
std::is_same_v<X, typename simplify_type<X>::SimpleType>;
};
// } // namespace detail
//===----------------------------------------------------------------------===//
// CastIsPossible
//===----------------------------------------------------------------------===//
/// This struct provides a way to check if a given cast is possible. It provides
/// a static function called isPossible that is used to check if a cast can be
/// performed. It should be overridden like this:
///
/// template<> struct CastIsPossible<foo, bar> {
/// static inline bool isPossible(const bar &b) {
/// return bar.isFoo();
/// }
/// };
template <typename To, typename From, typename Enable = void>
struct CastIsPossible {
static inline bool isPossible(const From &f) {
return isa_impl_wrap<
To, const From,
typename simplify_type<const From>::SimpleType>::doit(f);
}
};
// Needed for optional unwrapping. This could be implemented with isa_impl, but
// we want to implement things in the new method and move old implementations
// over. In fact, some of the isa_impl templates should be moved over to
// CastIsPossible.
template <typename To, typename From>
struct CastIsPossible<To, std::optional<From>> {
static inline bool isPossible(const std::optional<From> &f) {
assert(f && "CastIsPossible::isPossible called on a nullopt!");
return isa_impl_wrap<
To, const From,
typename simplify_type<const From>::SimpleType>::doit(*f);
}
};
/// Upcasting (from derived to base) and casting from a type to itself should
/// always be possible.
template <typename To, typename From>
struct CastIsPossible<To, From, std::enable_if_t<std::is_base_of_v<To, From>>> {
static inline bool isPossible(const From &f) { return true; }
};
//===----------------------------------------------------------------------===//
// Cast traits
//===----------------------------------------------------------------------===//
/// All of these cast traits are meant to be implementations for useful casts
/// that users may want to use that are outside the standard behavior. An
/// example of how to use a special cast called `CastTrait` is:
///
/// template<> struct CastInfo<foo, bar> : public CastTrait<foo, bar> {};
///
/// Essentially, if your use case falls directly into one of the use cases
/// supported by a given cast trait, simply inherit your special CastInfo
/// directly from one of these to avoid having to reimplement the boilerplate
/// `isPossible/castFailed/doCast/doCastIfPossible`. A cast trait can also
/// provide a subset of those functions.
/// This cast trait just provides castFailed for the specified `To` type to make
/// CastInfo specializations more declarative. In order to use this, the target
/// result type must be `To` and `To` must be constructible from `nullptr`.
template <typename To> struct NullableValueCastFailed {
static To castFailed() { return To(nullptr); }
};
/// This cast trait just provides the default implementation of doCastIfPossible
/// to make CastInfo specializations more declarative. The `Derived` template
/// parameter *must* be provided for forwarding castFailed and doCast.
template <typename To, typename From, typename Derived>
struct DefaultDoCastIfPossible {
static To doCastIfPossible(From f) {
if (!Derived::isPossible(f))
return Derived::castFailed();
return Derived::doCast(f);
}
};
namespace detail {
/// A helper to derive the type to use with `Self` for cast traits, when the
/// provided CRTP derived type is allowed to be void.
template <typename OptionalDerived, typename Default>
using SelfType = std::conditional_t<std::is_same_v<OptionalDerived, void>,
Default, OptionalDerived>;
} // namespace detail
/// This cast trait provides casting for the specific case of casting to a
/// value-typed object from a pointer-typed object. Note that `To` must be
/// nullable/constructible from a pointer to `From` to use this cast.
template <typename To, typename From, typename Derived = void>
struct ValueFromPointerCast
: public CastIsPossible<To, From *>,
public NullableValueCastFailed<To>,
public DefaultDoCastIfPossible<
To, From *,
detail::SelfType<Derived, ValueFromPointerCast<To, From>>> {
static inline To doCast(From *f) { return To(f); }
};
/// This cast trait provides std::unique_ptr casting. It has the semantics of
/// moving the contents of the input unique_ptr into the output unique_ptr
/// during the cast. It's also a good example of how to implement a move-only
/// cast.
template <typename To, typename From, typename Derived = void>
struct UniquePtrCast : public CastIsPossible<To, From *> {
using Self = detail::SelfType<Derived, UniquePtrCast<To, From>>;
using CastResultType = std::unique_ptr<
std::remove_reference_t<typename cast_retty<To, From>::ret_type>>;
static inline CastResultType doCast(std::unique_ptr<From> &&f) {
return CastResultType((typename CastResultType::element_type *)f.release());
}
static inline CastResultType castFailed() { return CastResultType(nullptr); }
static inline CastResultType doCastIfPossible(std::unique_ptr<From> &&f) {
if (!Self::isPossible(f))
return castFailed();
return doCast(f);
}
};
/// This cast trait provides std::optional<T> casting. This means that if you
/// have a value type, you can cast it to another value type and have dyn_cast
/// return an std::optional<T>.
template <typename To, typename From, typename Derived = void>
struct OptionalValueCast
: public CastIsPossible<To, From>,
public DefaultDoCastIfPossible<
std::optional<To>, From,
detail::SelfType<Derived, OptionalValueCast<To, From>>> {
static inline std::optional<To> castFailed() { return std::optional<To>{}; }
static inline std::optional<To> doCast(const From &f) { return To(f); }
};
/// Provides a cast trait that strips `const` from types to make it easier to
/// implement a const-version of a non-const cast. It just removes boilerplate
/// and reduces the amount of code you as the user need to implement. You can
/// use it like this:
///
/// template<> struct CastInfo<foo, bar> {
/// ...verbose implementation...
/// };
///
/// template<> struct CastInfo<foo, const bar> : public
/// ConstStrippingForwardingCast<foo, const bar, CastInfo<foo, bar>> {};
///
template <typename To, typename From, typename ForwardTo>
struct ConstStrippingForwardingCast {
// Remove the pointer if it exists, then we can get rid of consts/volatiles.
using DecayedFrom = std::remove_cv_t<std::remove_pointer_t<From>>;
// Now if it's a pointer, add it back. Otherwise, we want a ref.
using NonConstFrom =
std::conditional_t<std::is_pointer_v<From>, DecayedFrom *, DecayedFrom &>;
static inline bool isPossible(const From &f) {
return ForwardTo::isPossible(const_cast<NonConstFrom>(f));
}
static inline decltype(auto) castFailed() { return ForwardTo::castFailed(); }
static inline decltype(auto) doCast(const From &f) {
return ForwardTo::doCast(const_cast<NonConstFrom>(f));
}
static inline decltype(auto) doCastIfPossible(const From &f) {
return ForwardTo::doCastIfPossible(const_cast<NonConstFrom>(f));
}
};
/// Provides a cast trait that uses a defined pointer to pointer cast as a base
/// for reference-to-reference casts. Note that it does not provide castFailed
/// and doCastIfPossible because a pointer-to-pointer cast would likely just
/// return `nullptr` which could cause nullptr dereference. You can use it like
/// this:
///
/// template <> struct CastInfo<foo, bar *> { ... verbose implementation... };
///
/// template <>
/// struct CastInfo<foo, bar>
/// : public ForwardToPointerCast<foo, bar, CastInfo<foo, bar *>> {};
///
template <typename To, typename From, typename ForwardTo>
struct ForwardToPointerCast {
static inline bool isPossible(const From &f) {
return ForwardTo::isPossible(&f);
}
static inline decltype(auto) doCast(const From &f) {
return *ForwardTo::doCast(&f);
}
};
//===----------------------------------------------------------------------===//
// CastInfo
//===----------------------------------------------------------------------===//
/// This struct provides a method for customizing the way a cast is performed.
/// It inherits from CastIsPossible, to support the case of declaring many
/// CastIsPossible specializations without having to specialize the full
/// CastInfo.
///
/// In order to specialize different behaviors, specify different functions in
/// your CastInfo specialization.
/// For isa<> customization, provide:
///
/// `static bool isPossible(const From &f)`
///
/// For cast<> customization, provide:
///
/// `static To doCast(const From &f)`
///
/// For dyn_cast<> and the *_if_present<> variants' customization, provide:
///
/// `static To castFailed()` and `static To doCastIfPossible(const From &f)`
///
/// Your specialization might look something like this:
///
/// template<> struct CastInfo<foo, bar> : public CastIsPossible<foo, bar> {
/// static inline foo doCast(const bar &b) {
/// return foo(const_cast<bar &>(b));
/// }
/// static inline foo castFailed() { return foo(); }
/// static inline foo doCastIfPossible(const bar &b) {
/// if (!CastInfo<foo, bar>::isPossible(b))
/// return castFailed();
/// return doCast(b);
/// }
/// };
// The default implementations of CastInfo don't use cast traits for now because
// we need to specify types all over the place due to the current expected
// casting behavior and the way cast_retty works. New use cases can and should
// take advantage of the cast traits whenever possible!
template <typename To, typename From, typename Enable = void>
struct CastInfo : public CastIsPossible<To, From> {
using Self = CastInfo<To, From, Enable>;
using CastReturnType = typename cast_retty<To, From>::ret_type;
static inline CastReturnType doCast(const From &f) {
return cast_convert_val<
To, From,
typename simplify_type<From>::SimpleType>::doit(const_cast<From &>(f));
}
// This assumes that you can construct the cast return type from `nullptr`.
// This is largely to support legacy use cases - if you don't want this
// behavior you should specialize CastInfo for your use case.
static inline CastReturnType castFailed() { return CastReturnType(nullptr); }
static inline CastReturnType doCastIfPossible(const From &f) {
if (!Self::isPossible(f))
return castFailed();
return doCast(f);
}
};
/// This struct provides an overload for CastInfo where From has simplify_type
/// defined. This simply forwards to the appropriate CastInfo with the
/// simplified type/value, so you don't have to implement both.
template <typename To, typename From>
struct CastInfo<To, From, std::enable_if_t<!is_simple_type<From>::value>> {
using Self = CastInfo<To, From>;
using SimpleFrom = typename simplify_type<From>::SimpleType;
using SimplifiedSelf = CastInfo<To, SimpleFrom>;
static inline bool isPossible(From &f) {
return SimplifiedSelf::isPossible(
simplify_type<From>::getSimplifiedValue(f));
}
static inline decltype(auto) doCast(From &f) {
return SimplifiedSelf::doCast(simplify_type<From>::getSimplifiedValue(f));
}
static inline decltype(auto) castFailed() {
return SimplifiedSelf::castFailed();
}
static inline decltype(auto) doCastIfPossible(From &f) {
return SimplifiedSelf::doCastIfPossible(
simplify_type<From>::getSimplifiedValue(f));
}
};
//===----------------------------------------------------------------------===//
// Pre-specialized CastInfo
//===----------------------------------------------------------------------===//
/// Provide a CastInfo specialized for std::unique_ptr.
template <typename To, typename From>
struct CastInfo<To, std::unique_ptr<From>> : public UniquePtrCast<To, From> {};
/// Provide a CastInfo specialized for std::optional<From>. It's assumed that if
/// the input is std::optional<From> that the output can be std::optional<To>.
/// If that's not the case, specialize CastInfo for your use case.
template <typename To, typename From>
struct CastInfo<To, std::optional<From>> : public OptionalValueCast<To, From> {
};
/// isa<X> - Return true if the parameter to the template is an instance of one
/// of the template type arguments. Used like this:
///
/// if (isa<Type>(myVal)) { ... }
/// if (isa<Type0, Type1, Type2>(myVal)) { ... }
template <typename To, typename From>
[[nodiscard]] inline bool isa(const From &Val) {
return CastInfo<To, const From>::isPossible(Val);
}
template <typename First, typename Second, typename... Rest, typename From>
[[nodiscard]] inline bool isa(const From &Val) {
return isa<First>(Val) || isa<Second, Rest...>(Val);
}
/// cast<X> - Return the argument parameter cast to the specified type. This
/// casting operator asserts that the type is correct, so it does not return
/// null on failure. It does not allow a null argument (use cast_if_present for
/// that). It is typically used like this:
///
/// cast<Instruction>(myVal)->getParent()
template <typename To, typename From>
[[nodiscard]] inline decltype(auto) cast(const From &Val) {
assert(isa<To>(Val) && "cast<Ty>() argument of incompatible type!");
return CastInfo<To, const From>::doCast(Val);
}
template <typename To, typename From>
[[nodiscard]] inline decltype(auto) cast(From &Val) {
assert(isa<To>(Val) && "cast<Ty>() argument of incompatible type!");
return CastInfo<To, From>::doCast(Val);
}
template <typename To, typename From>
[[nodiscard]] inline decltype(auto) cast(From *Val) {
assert(isa<To>(Val) && "cast<Ty>() argument of incompatible type!");
return CastInfo<To, From *>::doCast(Val);
}
template <typename To, typename From>
[[nodiscard]] inline decltype(auto) cast(std::unique_ptr<From> &&Val) {
assert(isa<To>(Val) && "cast<Ty>() argument of incompatible type!");
return CastInfo<To, std::unique_ptr<From>>::doCast(std::move(Val));
}
//===----------------------------------------------------------------------===//
// ValueIsPresent
//===----------------------------------------------------------------------===//
template <typename T>
constexpr bool IsNullable =
std::is_pointer_v<T> || std::is_constructible_v<T, std::nullptr_t>;
/// ValueIsPresent provides a way to check if a value is, well, present. For
/// pointers, this is the equivalent of checking against nullptr, for Optionals
/// this is the equivalent of checking hasValue(). It also provides a method for
/// unwrapping a value (think calling .value() on an optional).
// Generic values can't *not* be present.
template <typename T, typename Enable = void> struct ValueIsPresent {
using UnwrappedType = T;
static inline bool isPresent(const T &t) { return true; }
static inline decltype(auto) unwrapValue(T &t) { return t; }
};
// Optional provides its own way to check if something is present.
template <typename T> struct ValueIsPresent<std::optional<T>> {
using UnwrappedType = T;
static inline bool isPresent(const std::optional<T> &t) {
return t.has_value();
}
static inline decltype(auto) unwrapValue(std::optional<T> &t) { return *t; }
};
// If something is "nullable" then we just compare it to nullptr to see if it
// exists.
template <typename T>
struct ValueIsPresent<T, std::enable_if_t<IsNullable<T>>> {
using UnwrappedType = T;
static inline bool isPresent(const T &t) { return t != T(nullptr); }
static inline decltype(auto) unwrapValue(T &t) { return t; }
};
namespace detail {
// Convenience function we can use to check if a value is present. Because of
// simplify_type, we have to call it on the simplified type for now.
template <typename T> inline bool isPresent(const T &t) {
return ValueIsPresent<typename simplify_type<T>::SimpleType>::isPresent(
simplify_type<T>::getSimplifiedValue(const_cast<T &>(t)));
}
// Convenience function we can use to unwrap a value.
template <typename T> inline decltype(auto) unwrapValue(T &t) {
return ValueIsPresent<T>::unwrapValue(t);
}
} // namespace detail
/// dyn_cast<X> - Return the argument parameter cast to the specified type. This
/// casting operator returns null if the argument is of the wrong type, so it
/// can be used to test for a type as well as cast if successful. The value
/// passed in must be present, if not, use dyn_cast_if_present. This should be
/// used in the context of an if statement like this:
///
/// if (const Instruction *I = dyn_cast<Instruction>(myVal)) { ... }
template <typename To, typename From>
[[nodiscard]] inline decltype(auto) dyn_cast(const From &Val) {
assert(detail::isPresent(Val) && "dyn_cast on a non-existent value");
return CastInfo<To, const From>::doCastIfPossible(Val);
}
template <typename To, typename From>
[[nodiscard]] inline decltype(auto) dyn_cast(From &Val) {
assert(detail::isPresent(Val) && "dyn_cast on a non-existent value");
return CastInfo<To, From>::doCastIfPossible(Val);
}
template <typename To, typename From>
[[nodiscard]] inline decltype(auto) dyn_cast(From *Val) {
assert(detail::isPresent(Val) && "dyn_cast on a non-existent value");
return CastInfo<To, From *>::doCastIfPossible(Val);
}
template <typename To, typename From>
[[nodiscard]] inline decltype(auto) dyn_cast(std::unique_ptr<From> &&Val) {
assert(detail::isPresent(Val) && "dyn_cast on a non-existent value");
return CastInfo<To, std::unique_ptr<From>>::doCastIfPossible(
std::forward<std::unique_ptr<From> &&>(Val));
}
/// isa_and_present<X> - Functionally identical to isa, except that a null value
/// is accepted.
template <typename... X, class Y>
[[nodiscard]] inline bool isa_and_present(const Y &Val) {
if (!detail::isPresent(Val))
return false;
return isa<X...>(Val);
}
template <typename... X, class Y>
[[nodiscard]] inline bool isa_and_nonnull(const Y &Val) {
return isa_and_present<X...>(Val);
}
/// cast_if_present<X> - Functionally identical to cast, except that a null
/// value is accepted.
template <class X, class Y>
[[nodiscard]] inline auto cast_if_present(const Y &Val) {
if (!detail::isPresent(Val))
return CastInfo<X, const Y>::castFailed();
assert(isa<X>(Val) && "cast_if_present<Ty>() argument of incompatible type!");
return cast<X>(detail::unwrapValue(Val));
}
template <class X, class Y> [[nodiscard]] inline auto cast_if_present(Y &Val) {
if (!detail::isPresent(Val))
return CastInfo<X, Y>::castFailed();
assert(isa<X>(Val) && "cast_if_present<Ty>() argument of incompatible type!");
return cast<X>(detail::unwrapValue(Val));
}
template <class X, class Y> [[nodiscard]] inline auto cast_if_present(Y *Val) {
if (!detail::isPresent(Val))
return CastInfo<X, Y *>::castFailed();
assert(isa<X>(Val) && "cast_if_present<Ty>() argument of incompatible type!");
return cast<X>(detail::unwrapValue(Val));
}
template <class X, class Y>
[[nodiscard]] inline auto cast_if_present(std::unique_ptr<Y> &&Val) {
if (!detail::isPresent(Val))
return UniquePtrCast<X, Y>::castFailed();
return UniquePtrCast<X, Y>::doCast(std::move(Val));
}
// Provide a forwarding from cast_or_null to cast_if_present for current
// users. This is deprecated and will be removed in a future patch, use
// cast_if_present instead.
template <class X, class Y> auto cast_or_null(const Y &Val) {
return cast_if_present<X>(Val);
}
template <class X, class Y> auto cast_or_null(Y &Val) {
return cast_if_present<X>(Val);
}
template <class X, class Y> auto cast_or_null(Y *Val) {
return cast_if_present<X>(Val);
}
template <class X, class Y> auto cast_or_null(std::unique_ptr<Y> &&Val) {
return cast_if_present<X>(std::move(Val));
}
/// dyn_cast_if_present<X> - Functionally identical to dyn_cast, except that a
/// null (or none in the case of optionals) value is accepted.
template <class X, class Y> auto dyn_cast_if_present(const Y &Val) {
if (!detail::isPresent(Val))
return CastInfo<X, const Y>::castFailed();
return CastInfo<X, const Y>::doCastIfPossible(detail::unwrapValue(Val));
}
template <class X, class Y> auto dyn_cast_if_present(Y &Val) {
if (!detail::isPresent(Val))
return CastInfo<X, Y>::castFailed();
return CastInfo<X, Y>::doCastIfPossible(detail::unwrapValue(Val));
}
template <class X, class Y> auto dyn_cast_if_present(Y *Val) {
if (!detail::isPresent(Val))
return CastInfo<X, Y *>::castFailed();
return CastInfo<X, Y *>::doCastIfPossible(detail::unwrapValue(Val));
}
// Forwards to dyn_cast_if_present to avoid breaking current users. This is
// deprecated and will be removed in a future patch, use
// cast_if_present instead.
template <class X, class Y> auto dyn_cast_or_null(const Y &Val) {
return dyn_cast_if_present<X>(Val);
}
template <class X, class Y> auto dyn_cast_or_null(Y &Val) {
return dyn_cast_if_present<X>(Val);
}
template <class X, class Y> auto dyn_cast_or_null(Y *Val) {
return dyn_cast_if_present<X>(Val);
}
/// unique_dyn_cast<X> - Given a unique_ptr<Y>, try to return a unique_ptr<X>,
/// taking ownership of the input pointer iff isa<X>(Val) is true. If the
/// cast is successful, From refers to nullptr on exit and the casted value
/// is returned. If the cast is unsuccessful, the function returns nullptr
/// and From is unchanged.
template <class X, class Y>
[[nodiscard]] inline typename CastInfo<X, std::unique_ptr<Y>>::CastResultType
unique_dyn_cast(std::unique_ptr<Y> &Val) {
if (!isa<X>(Val))
return nullptr;
return cast<X>(std::move(Val));
}
template <class X, class Y>
[[nodiscard]] inline auto unique_dyn_cast(std::unique_ptr<Y> &&Val) {
return unique_dyn_cast<X, Y>(Val);
}
// unique_dyn_cast_or_null<X> - Functionally identical to unique_dyn_cast,
// except that a null value is accepted.
template <class X, class Y>
[[nodiscard]] inline typename CastInfo<X, std::unique_ptr<Y>>::CastResultType
unique_dyn_cast_or_null(std::unique_ptr<Y> &Val) {
if (!Val)
return nullptr;
return unique_dyn_cast<X, Y>(Val);
}
template <class X, class Y>
[[nodiscard]] inline auto unique_dyn_cast_or_null(std::unique_ptr<Y> &&Val) {
return unique_dyn_cast_or_null<X, Y>(Val);
}
} // end namespace llvm
#endif // LLVM_SUPPORT_CASTING_H
PK hwFZ�_f f Support/ARMTargetParserCommon.hnu �[��� //===-- llvm/Support/ARMTargetParserCommon.def ------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This header is deprecated in favour of
/// `llvm/TargetParser/ARMTargetParserCommon.h`.
///
//===----------------------------------------------------------------------===//
#include "llvm/TargetParser/ARMTargetParserCommon.h"
PK hwFZ��ȯ Support/Discriminator.hnu �[��� //===---- llvm/Support/Discriminator.h -- Discriminator Utils ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the constants and utility functions for discriminators.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_DISCRIMINATOR_H
#define LLVM_SUPPORT_DISCRIMINATOR_H
#include "llvm/Support/Error.h"
#include <assert.h>
// Utility functions for encoding / decoding discriminators.
/// With a given unsigned int \p U, use up to 13 bits to represent it.
/// old_bit 1~5 --> new_bit 1~5
/// old_bit 6~12 --> new_bit 7~13
/// new_bit_6 is 0 if higher bits (7~13) are all 0
static inline unsigned getPrefixEncodingFromUnsigned(unsigned U) {
U &= 0xfff;
return U > 0x1f ? (((U & 0xfe0) << 1) | (U & 0x1f) | 0x20) : U;
}
/// Reverse transformation as getPrefixEncodingFromUnsigned.
static inline unsigned getUnsignedFromPrefixEncoding(unsigned U) {
if (U & 1)
return 0;
U >>= 1;
return (U & 0x20) ? (((U >> 1) & 0xfe0) | (U & 0x1f)) : (U & 0x1f);
}
/// Returns the next component stored in discriminator.
static inline unsigned getNextComponentInDiscriminator(unsigned D) {
if ((D & 1) == 0)
return D >> ((D & 0x40) ? 14 : 7);
else
return D >> 1;
}
static inline unsigned encodeComponent(unsigned C) {
return (C == 0) ? 1U : (getPrefixEncodingFromUnsigned(C) << 1);
}
static inline unsigned encodingBits(unsigned C) {
return (C == 0) ? 1 : (C > 0x1f ? 14 : 7);
}
// Some constants used in FS Discriminators.
//
namespace llvm {
namespace sampleprof {
enum FSDiscriminatorPass {
Base = 0,
Pass0 = 0,
Pass1 = 1,
Pass2 = 2,
Pass3 = 3,
Pass4 = 4,
PassLast = 4,
};
} // namespace sampleprof
// The number of bits reserved for the base discrimininator. The base
// discriminaitor starts from bit 0.
static const unsigned BaseDiscriminatorBitWidth = 8;
// The number of bits reserved for each FS discriminator pass.
static const unsigned FSDiscriminatorBitWidth = 6;
// Return the number of FS passes, excluding the pass adding the base
// discriminators.
// The number of passes for FS discriminators. Note that the total
// number of discriminaitor bits, i.e.
// BaseDiscriminatorBitWidth
// + FSDiscriminatorBitWidth * getNumFSPasses()
// needs to fit in an unsigned int type.
static inline unsigned getNumFSPasses() {
return static_cast<unsigned>(sampleprof::FSDiscriminatorPass::PassLast);
}
// Return the ending bit for FSPass P.
static inline unsigned getFSPassBitEnd(sampleprof::FSDiscriminatorPass P) {
unsigned I = static_cast<unsigned>(P);
assert(I <= getNumFSPasses() && "Invalid FS discriminator pass number.");
return BaseDiscriminatorBitWidth + I * FSDiscriminatorBitWidth - 1;
}
// Return the begining bit for FSPass P.
static inline unsigned getFSPassBitBegin(sampleprof::FSDiscriminatorPass P) {
if (P == sampleprof::FSDiscriminatorPass::Base)
return 0;
unsigned I = static_cast<unsigned>(P);
assert(I <= getNumFSPasses() && "Invalid FS discriminator pass number.");
return getFSPassBitEnd(static_cast<sampleprof::FSDiscriminatorPass>(I - 1)) +
1;
}
// Return the beginning bit for the last FSPass.
static inline int getLastFSPassBitBegin() {
return getFSPassBitBegin(
static_cast<sampleprof::FSDiscriminatorPass>(getNumFSPasses()));
}
// Return the ending bit for the last FSPass.
static inline unsigned getLastFSPassBitEnd() {
return getFSPassBitEnd(
static_cast<sampleprof::FSDiscriminatorPass>(getNumFSPasses()));
}
// Return the beginning bit for the base (first) FSPass.
static inline unsigned getBaseFSBitBegin() { return 0; }
// Return the ending bit for the base (first) FSPass.
static inline unsigned getBaseFSBitEnd() {
return BaseDiscriminatorBitWidth - 1;
}
// Set bits in range of [0 .. n] to 1. Used in FS Discriminators.
static inline unsigned getN1Bits(int N) {
// Work around the g++ bug that folding "(1U << (N + 1)) - 1" to 0.
if (N == 31)
return 0xFFFFFFFF;
assert((N < 32) && "N is invalid");
return (1U << (N + 1)) - 1;
}
} // namespace llvm
#endif /* LLVM_SUPPORT_DISCRIMINATOR_H */
PK hwFZt�E �E Support/KnownBits.hnu �[��� //===- llvm/Support/KnownBits.h - Stores known zeros/ones -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains a class for representing known zeros and ones used by
// computeKnownBits.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_KNOWNBITS_H
#define LLVM_SUPPORT_KNOWNBITS_H
#include "llvm/ADT/APInt.h"
#include <optional>
namespace llvm {
// Struct for tracking the known zeros and ones of a value.
struct KnownBits {
APInt Zero;
APInt One;
private:
// Internal constructor for creating a KnownBits from two APInts.
KnownBits(APInt Zero, APInt One)
: Zero(std::move(Zero)), One(std::move(One)) {}
public:
// Default construct Zero and One.
KnownBits() = default;
/// Create a known bits object of BitWidth bits initialized to unknown.
KnownBits(unsigned BitWidth) : Zero(BitWidth, 0), One(BitWidth, 0) {}
/// Get the bit width of this value.
unsigned getBitWidth() const {
assert(Zero.getBitWidth() == One.getBitWidth() &&
"Zero and One should have the same width!");
return Zero.getBitWidth();
}
/// Returns true if there is conflicting information.
bool hasConflict() const { return Zero.intersects(One); }
/// Returns true if we know the value of all bits.
bool isConstant() const {
assert(!hasConflict() && "KnownBits conflict!");
return Zero.popcount() + One.popcount() == getBitWidth();
}
/// Returns the value when all bits have a known value. This just returns One
/// with a protective assertion.
const APInt &getConstant() const {
assert(isConstant() && "Can only get value when all bits are known");
return One;
}
/// Returns true if we don't know any bits.
bool isUnknown() const { return Zero.isZero() && One.isZero(); }
/// Resets the known state of all bits.
void resetAll() {
Zero.clearAllBits();
One.clearAllBits();
}
/// Returns true if value is all zero.
bool isZero() const {
assert(!hasConflict() && "KnownBits conflict!");
return Zero.isAllOnes();
}
/// Returns true if value is all one bits.
bool isAllOnes() const {
assert(!hasConflict() && "KnownBits conflict!");
return One.isAllOnes();
}
/// Make all bits known to be zero and discard any previous information.
void setAllZero() {
Zero.setAllBits();
One.clearAllBits();
}
/// Make all bits known to be one and discard any previous information.
void setAllOnes() {
Zero.clearAllBits();
One.setAllBits();
}
/// Returns true if this value is known to be negative.
bool isNegative() const { return One.isSignBitSet(); }
/// Returns true if this value is known to be non-negative.
bool isNonNegative() const { return Zero.isSignBitSet(); }
/// Returns true if this value is known to be non-zero.
bool isNonZero() const { return !One.isZero(); }
/// Returns true if this value is known to be positive.
bool isStrictlyPositive() const {
return Zero.isSignBitSet() && !One.isZero();
}
/// Make this value negative.
void makeNegative() {
One.setSignBit();
}
/// Make this value non-negative.
void makeNonNegative() {
Zero.setSignBit();
}
/// Return the minimal unsigned value possible given these KnownBits.
APInt getMinValue() const {
// Assume that all bits that aren't known-ones are zeros.
return One;
}
/// Return the minimal signed value possible given these KnownBits.
APInt getSignedMinValue() const {
// Assume that all bits that aren't known-ones are zeros.
APInt Min = One;
// Sign bit is unknown.
if (Zero.isSignBitClear())
Min.setSignBit();
return Min;
}
/// Return the maximal unsigned value possible given these KnownBits.
APInt getMaxValue() const {
// Assume that all bits that aren't known-zeros are ones.
return ~Zero;
}
/// Return the maximal signed value possible given these KnownBits.
APInt getSignedMaxValue() const {
// Assume that all bits that aren't known-zeros are ones.
APInt Max = ~Zero;
// Sign bit is unknown.
if (One.isSignBitClear())
Max.clearSignBit();
return Max;
}
/// Return known bits for a truncation of the value we're tracking.
KnownBits trunc(unsigned BitWidth) const {
return KnownBits(Zero.trunc(BitWidth), One.trunc(BitWidth));
}
/// Return known bits for an "any" extension of the value we're tracking,
/// where we don't know anything about the extended bits.
KnownBits anyext(unsigned BitWidth) const {
return KnownBits(Zero.zext(BitWidth), One.zext(BitWidth));
}
/// Return known bits for a zero extension of the value we're tracking.
KnownBits zext(unsigned BitWidth) const {
unsigned OldBitWidth = getBitWidth();
APInt NewZero = Zero.zext(BitWidth);
NewZero.setBitsFrom(OldBitWidth);
return KnownBits(NewZero, One.zext(BitWidth));
}
/// Return known bits for a sign extension of the value we're tracking.
KnownBits sext(unsigned BitWidth) const {
return KnownBits(Zero.sext(BitWidth), One.sext(BitWidth));
}
/// Return known bits for an "any" extension or truncation of the value we're
/// tracking.
KnownBits anyextOrTrunc(unsigned BitWidth) const {
if (BitWidth > getBitWidth())
return anyext(BitWidth);
if (BitWidth < getBitWidth())
return trunc(BitWidth);
return *this;
}
/// Return known bits for a zero extension or truncation of the value we're
/// tracking.
KnownBits zextOrTrunc(unsigned BitWidth) const {
if (BitWidth > getBitWidth())
return zext(BitWidth);
if (BitWidth < getBitWidth())
return trunc(BitWidth);
return *this;
}
/// Return known bits for a sign extension or truncation of the value we're
/// tracking.
KnownBits sextOrTrunc(unsigned BitWidth) const {
if (BitWidth > getBitWidth())
return sext(BitWidth);
if (BitWidth < getBitWidth())
return trunc(BitWidth);
return *this;
}
/// Return known bits for a in-register sign extension of the value we're
/// tracking.
KnownBits sextInReg(unsigned SrcBitWidth) const;
/// Insert the bits from a smaller known bits starting at bitPosition.
void insertBits(const KnownBits &SubBits, unsigned BitPosition) {
Zero.insertBits(SubBits.Zero, BitPosition);
One.insertBits(SubBits.One, BitPosition);
}
/// Return a subset of the known bits from [bitPosition,bitPosition+numBits).
KnownBits extractBits(unsigned NumBits, unsigned BitPosition) const {
return KnownBits(Zero.extractBits(NumBits, BitPosition),
One.extractBits(NumBits, BitPosition));
}
/// Concatenate the bits from \p Lo onto the bottom of *this. This is
/// equivalent to:
/// (this->zext(NewWidth) << Lo.getBitWidth()) | Lo.zext(NewWidth)
KnownBits concat(const KnownBits &Lo) const {
return KnownBits(Zero.concat(Lo.Zero), One.concat(Lo.One));
}
/// Return KnownBits based on this, but updated given that the underlying
/// value is known to be greater than or equal to Val.
KnownBits makeGE(const APInt &Val) const;
/// Returns the minimum number of trailing zero bits.
unsigned countMinTrailingZeros() const { return Zero.countr_one(); }
/// Returns the minimum number of trailing one bits.
unsigned countMinTrailingOnes() const { return One.countr_one(); }
/// Returns the minimum number of leading zero bits.
unsigned countMinLeadingZeros() const { return Zero.countl_one(); }
/// Returns the minimum number of leading one bits.
unsigned countMinLeadingOnes() const { return One.countl_one(); }
/// Returns the number of times the sign bit is replicated into the other
/// bits.
unsigned countMinSignBits() const {
if (isNonNegative())
return countMinLeadingZeros();
if (isNegative())
return countMinLeadingOnes();
// Every value has at least 1 sign bit.
return 1;
}
/// Returns the maximum number of bits needed to represent all possible
/// signed values with these known bits. This is the inverse of the minimum
/// number of known sign bits. Examples for bitwidth 5:
/// 110?? --> 4
/// 0000? --> 2
unsigned countMaxSignificantBits() const {
return getBitWidth() - countMinSignBits() + 1;
}
/// Returns the maximum number of trailing zero bits possible.
unsigned countMaxTrailingZeros() const { return One.countr_zero(); }
/// Returns the maximum number of trailing one bits possible.
unsigned countMaxTrailingOnes() const { return Zero.countr_zero(); }
/// Returns the maximum number of leading zero bits possible.
unsigned countMaxLeadingZeros() const { return One.countl_zero(); }
/// Returns the maximum number of leading one bits possible.
unsigned countMaxLeadingOnes() const { return Zero.countl_zero(); }
/// Returns the number of bits known to be one.
unsigned countMinPopulation() const { return One.popcount(); }
/// Returns the maximum number of bits that could be one.
unsigned countMaxPopulation() const {
return getBitWidth() - Zero.popcount();
}
/// Returns the maximum number of bits needed to represent all possible
/// unsigned values with these known bits. This is the inverse of the
/// minimum number of leading zeros.
unsigned countMaxActiveBits() const {
return getBitWidth() - countMinLeadingZeros();
}
/// Create known bits from a known constant.
static KnownBits makeConstant(const APInt &C) {
return KnownBits(~C, C);
}
/// Returns KnownBits information that is known to be true for both this and
/// RHS.
///
/// When an operation is known to return one of its operands, this can be used
/// to combine information about the known bits of the operands to get the
/// information that must be true about the result.
KnownBits intersectWith(const KnownBits &RHS) const {
return KnownBits(Zero & RHS.Zero, One & RHS.One);
}
/// Returns KnownBits information that is known to be true for either this or
/// RHS or both.
///
/// This can be used to combine different sources of information about the
/// known bits of a single value, e.g. information about the low bits and the
/// high bits of the result of a multiplication.
KnownBits unionWith(const KnownBits &RHS) const {
return KnownBits(Zero | RHS.Zero, One | RHS.One);
}
/// Compute known bits common to LHS and RHS.
LLVM_DEPRECATED("use intersectWith instead", "intersectWith")
static KnownBits commonBits(const KnownBits &LHS, const KnownBits &RHS) {
return LHS.intersectWith(RHS);
}
/// Return true if LHS and RHS have no common bits set.
static bool haveNoCommonBitsSet(const KnownBits &LHS, const KnownBits &RHS) {
return (LHS.Zero | RHS.Zero).isAllOnes();
}
/// Compute known bits resulting from adding LHS, RHS and a 1-bit Carry.
static KnownBits computeForAddCarry(
const KnownBits &LHS, const KnownBits &RHS, const KnownBits &Carry);
/// Compute known bits resulting from adding LHS and RHS.
static KnownBits computeForAddSub(bool Add, bool NSW, const KnownBits &LHS,
KnownBits RHS);
/// Compute knownbits resulting from llvm.sadd.sat(LHS, RHS)
static KnownBits sadd_sat(const KnownBits &LHS, const KnownBits &RHS);
/// Compute knownbits resulting from llvm.uadd.sat(LHS, RHS)
static KnownBits uadd_sat(const KnownBits &LHS, const KnownBits &RHS);
/// Compute knownbits resulting from llvm.ssub.sat(LHS, RHS)
static KnownBits ssub_sat(const KnownBits &LHS, const KnownBits &RHS);
/// Compute knownbits resulting from llvm.usub.sat(LHS, RHS)
static KnownBits usub_sat(const KnownBits &LHS, const KnownBits &RHS);
/// Compute known bits resulting from multiplying LHS and RHS.
static KnownBits mul(const KnownBits &LHS, const KnownBits &RHS,
bool NoUndefSelfMultiply = false);
/// Compute known bits from sign-extended multiply-hi.
static KnownBits mulhs(const KnownBits &LHS, const KnownBits &RHS);
/// Compute known bits from zero-extended multiply-hi.
static KnownBits mulhu(const KnownBits &LHS, const KnownBits &RHS);
/// Compute known bits for sdiv(LHS, RHS).
static KnownBits sdiv(const KnownBits &LHS, const KnownBits &RHS,
bool Exact = false);
/// Compute known bits for udiv(LHS, RHS).
static KnownBits udiv(const KnownBits &LHS, const KnownBits &RHS,
bool Exact = false);
/// Compute known bits for urem(LHS, RHS).
static KnownBits urem(const KnownBits &LHS, const KnownBits &RHS);
/// Compute known bits for srem(LHS, RHS).
static KnownBits srem(const KnownBits &LHS, const KnownBits &RHS);
/// Compute known bits for umax(LHS, RHS).
static KnownBits umax(const KnownBits &LHS, const KnownBits &RHS);
/// Compute known bits for umin(LHS, RHS).
static KnownBits umin(const KnownBits &LHS, const KnownBits &RHS);
/// Compute known bits for smax(LHS, RHS).
static KnownBits smax(const KnownBits &LHS, const KnownBits &RHS);
/// Compute known bits for smin(LHS, RHS).
static KnownBits smin(const KnownBits &LHS, const KnownBits &RHS);
/// Compute known bits for shl(LHS, RHS).
/// NOTE: RHS (shift amount) bitwidth doesn't need to be the same as LHS.
static KnownBits shl(const KnownBits &LHS, const KnownBits &RHS,
bool NUW = false, bool NSW = false,
bool ShAmtNonZero = false);
/// Compute known bits for lshr(LHS, RHS).
/// NOTE: RHS (shift amount) bitwidth doesn't need to be the same as LHS.
static KnownBits lshr(const KnownBits &LHS, const KnownBits &RHS,
bool ShAmtNonZero = false);
/// Compute known bits for ashr(LHS, RHS).
/// NOTE: RHS (shift amount) bitwidth doesn't need to be the same as LHS.
static KnownBits ashr(const KnownBits &LHS, const KnownBits &RHS,
bool ShAmtNonZero = false);
/// Determine if these known bits always give the same ICMP_EQ result.
static std::optional<bool> eq(const KnownBits &LHS, const KnownBits &RHS);
/// Determine if these known bits always give the same ICMP_NE result.
static std::optional<bool> ne(const KnownBits &LHS, const KnownBits &RHS);
/// Determine if these known bits always give the same ICMP_UGT result.
static std::optional<bool> ugt(const KnownBits &LHS, const KnownBits &RHS);
/// Determine if these known bits always give the same ICMP_UGE result.
static std::optional<bool> uge(const KnownBits &LHS, const KnownBits &RHS);
/// Determine if these known bits always give the same ICMP_ULT result.
static std::optional<bool> ult(const KnownBits &LHS, const KnownBits &RHS);
/// Determine if these known bits always give the same ICMP_ULE result.
static std::optional<bool> ule(const KnownBits &LHS, const KnownBits &RHS);
/// Determine if these known bits always give the same ICMP_SGT result.
static std::optional<bool> sgt(const KnownBits &LHS, const KnownBits &RHS);
/// Determine if these known bits always give the same ICMP_SGE result.
static std::optional<bool> sge(const KnownBits &LHS, const KnownBits &RHS);
/// Determine if these known bits always give the same ICMP_SLT result.
static std::optional<bool> slt(const KnownBits &LHS, const KnownBits &RHS);
/// Determine if these known bits always give the same ICMP_SLE result.
static std::optional<bool> sle(const KnownBits &LHS, const KnownBits &RHS);
/// Update known bits based on ANDing with RHS.
KnownBits &operator&=(const KnownBits &RHS);
/// Update known bits based on ORing with RHS.
KnownBits &operator|=(const KnownBits &RHS);
/// Update known bits based on XORing with RHS.
KnownBits &operator^=(const KnownBits &RHS);
/// Compute known bits for the absolute value.
KnownBits abs(bool IntMinIsPoison = false) const;
KnownBits byteSwap() const {
return KnownBits(Zero.byteSwap(), One.byteSwap());
}
KnownBits reverseBits() const {
return KnownBits(Zero.reverseBits(), One.reverseBits());
}
/// Compute known bits for X & -X, which has only the lowest bit set of X set.
/// The name comes from the X86 BMI instruction
KnownBits blsi() const;
/// Compute known bits for X ^ (X - 1), which has all bits up to and including
/// the lowest set bit of X set. The name comes from the X86 BMI instruction.
KnownBits blsmsk() const;
bool operator==(const KnownBits &Other) const {
return Zero == Other.Zero && One == Other.One;
}
bool operator!=(const KnownBits &Other) const { return !(*this == Other); }
void print(raw_ostream &OS) const;
void dump() const;
private:
// Internal helper for getting the initial KnownBits for an `srem` or `urem`
// operation with the low-bits set.
static KnownBits remGetLowBits(const KnownBits &LHS, const KnownBits &RHS);
};
inline KnownBits operator&(KnownBits LHS, const KnownBits &RHS) {
LHS &= RHS;
return LHS;
}
inline KnownBits operator&(const KnownBits &LHS, KnownBits &&RHS) {
RHS &= LHS;
return std::move(RHS);
}
inline KnownBits operator|(KnownBits LHS, const KnownBits &RHS) {
LHS |= RHS;
return LHS;
}
inline KnownBits operator|(const KnownBits &LHS, KnownBits &&RHS) {
RHS |= LHS;
return std::move(RHS);
}
inline KnownBits operator^(KnownBits LHS, const KnownBits &RHS) {
LHS ^= RHS;
return LHS;
}
inline KnownBits operator^(const KnownBits &LHS, KnownBits &&RHS) {
RHS ^= LHS;
return std::move(RHS);
}
inline raw_ostream &operator<<(raw_ostream &OS, const KnownBits &Known) {
Known.print(OS);
return OS;
}
} // end namespace llvm
#endif
PK hwFZ=`WV#9 #9 Support/Endian.hnu �[��� //===- Endian.h - Utilities for IO with endian specific data ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares generic functions to read and write endian specific data.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ENDIAN_H
#define LLVM_SUPPORT_ENDIAN_H
#include "llvm/Support/Compiler.h"
#include "llvm/Support/SwapByteOrder.h"
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <cstring>
#include <type_traits>
namespace llvm {
namespace support {
enum endianness {big, little, native};
// These are named values for common alignments.
enum {aligned = 0, unaligned = 1};
namespace detail {
/// ::value is either alignment, or alignof(T) if alignment is 0.
template<class T, int alignment>
struct PickAlignment {
enum { value = alignment == 0 ? alignof(T) : alignment };
};
} // end namespace detail
namespace endian {
constexpr endianness system_endianness() {
return sys::IsBigEndianHost ? big : little;
}
template <typename value_type>
inline value_type byte_swap(value_type value, endianness endian) {
if ((endian != native) && (endian != system_endianness()))
sys::swapByteOrder(value);
return value;
}
/// Swap the bytes of value to match the given endianness.
template<typename value_type, endianness endian>
inline value_type byte_swap(value_type value) {
return byte_swap(value, endian);
}
/// Read a value of a particular endianness from memory.
template <typename value_type, std::size_t alignment>
inline value_type read(const void *memory, endianness endian) {
value_type ret;
memcpy(&ret,
LLVM_ASSUME_ALIGNED(
memory, (detail::PickAlignment<value_type, alignment>::value)),
sizeof(value_type));
return byte_swap<value_type>(ret, endian);
}
template<typename value_type,
endianness endian,
std::size_t alignment>
inline value_type read(const void *memory) {
return read<value_type, alignment>(memory, endian);
}
/// Read a value of a particular endianness from a buffer, and increment the
/// buffer past that value.
template <typename value_type, std::size_t alignment, typename CharT>
inline value_type readNext(const CharT *&memory, endianness endian) {
value_type ret = read<value_type, alignment>(memory, endian);
memory += sizeof(value_type);
return ret;
}
template<typename value_type, endianness endian, std::size_t alignment,
typename CharT>
inline value_type readNext(const CharT *&memory) {
return readNext<value_type, alignment, CharT>(memory, endian);
}
/// Write a value to memory with a particular endianness.
template <typename value_type, std::size_t alignment>
inline void write(void *memory, value_type value, endianness endian) {
value = byte_swap<value_type>(value, endian);
memcpy(LLVM_ASSUME_ALIGNED(
memory, (detail::PickAlignment<value_type, alignment>::value)),
&value, sizeof(value_type));
}
template<typename value_type,
endianness endian,
std::size_t alignment>
inline void write(void *memory, value_type value) {
write<value_type, alignment>(memory, value, endian);
}
template <typename value_type>
using make_unsigned_t = std::make_unsigned_t<value_type>;
/// Read a value of a particular endianness from memory, for a location
/// that starts at the given bit offset within the first byte.
template <typename value_type, endianness endian, std::size_t alignment>
inline value_type readAtBitAlignment(const void *memory, uint64_t startBit) {
assert(startBit < 8);
if (startBit == 0)
return read<value_type, endian, alignment>(memory);
else {
// Read two values and compose the result from them.
value_type val[2];
memcpy(&val[0],
LLVM_ASSUME_ALIGNED(
memory, (detail::PickAlignment<value_type, alignment>::value)),
sizeof(value_type) * 2);
val[0] = byte_swap<value_type, endian>(val[0]);
val[1] = byte_swap<value_type, endian>(val[1]);
// Shift bits from the lower value into place.
make_unsigned_t<value_type> lowerVal = val[0] >> startBit;
// Mask off upper bits after right shift in case of signed type.
make_unsigned_t<value_type> numBitsFirstVal =
(sizeof(value_type) * 8) - startBit;
lowerVal &= ((make_unsigned_t<value_type>)1 << numBitsFirstVal) - 1;
// Get the bits from the upper value.
make_unsigned_t<value_type> upperVal =
val[1] & (((make_unsigned_t<value_type>)1 << startBit) - 1);
// Shift them in to place.
upperVal <<= numBitsFirstVal;
return lowerVal | upperVal;
}
}
/// Write a value to memory with a particular endianness, for a location
/// that starts at the given bit offset within the first byte.
template <typename value_type, endianness endian, std::size_t alignment>
inline void writeAtBitAlignment(void *memory, value_type value,
uint64_t startBit) {
assert(startBit < 8);
if (startBit == 0)
write<value_type, endian, alignment>(memory, value);
else {
// Read two values and shift the result into them.
value_type val[2];
memcpy(&val[0],
LLVM_ASSUME_ALIGNED(
memory, (detail::PickAlignment<value_type, alignment>::value)),
sizeof(value_type) * 2);
val[0] = byte_swap<value_type, endian>(val[0]);
val[1] = byte_swap<value_type, endian>(val[1]);
// Mask off any existing bits in the upper part of the lower value that
// we want to replace.
val[0] &= ((make_unsigned_t<value_type>)1 << startBit) - 1;
make_unsigned_t<value_type> numBitsFirstVal =
(sizeof(value_type) * 8) - startBit;
make_unsigned_t<value_type> lowerVal = value;
if (startBit > 0) {
// Mask off the upper bits in the new value that are not going to go into
// the lower value. This avoids a left shift of a negative value, which
// is undefined behavior.
lowerVal &= (((make_unsigned_t<value_type>)1 << numBitsFirstVal) - 1);
// Now shift the new bits into place
lowerVal <<= startBit;
}
val[0] |= lowerVal;
// Mask off any existing bits in the lower part of the upper value that
// we want to replace.
val[1] &= ~(((make_unsigned_t<value_type>)1 << startBit) - 1);
// Next shift the bits that go into the upper value into position.
make_unsigned_t<value_type> upperVal = value >> numBitsFirstVal;
// Mask off upper bits after right shift in case of signed type.
upperVal &= ((make_unsigned_t<value_type>)1 << startBit) - 1;
val[1] |= upperVal;
// Finally, rewrite values.
val[0] = byte_swap<value_type, endian>(val[0]);
val[1] = byte_swap<value_type, endian>(val[1]);
memcpy(LLVM_ASSUME_ALIGNED(
memory, (detail::PickAlignment<value_type, alignment>::value)),
&val[0], sizeof(value_type) * 2);
}
}
} // end namespace endian
namespace detail {
template <typename ValueType, endianness Endian, std::size_t Alignment,
std::size_t ALIGN = PickAlignment<ValueType, Alignment>::value>
struct packed_endian_specific_integral {
using value_type = ValueType;
static constexpr endianness endian = Endian;
static constexpr std::size_t alignment = Alignment;
packed_endian_specific_integral() = default;
explicit packed_endian_specific_integral(value_type val) { *this = val; }
operator value_type() const {
return endian::read<value_type, endian, alignment>(
(const void*)Value.buffer);
}
void operator=(value_type newValue) {
endian::write<value_type, endian, alignment>(
(void*)Value.buffer, newValue);
}
packed_endian_specific_integral &operator+=(value_type newValue) {
*this = *this + newValue;
return *this;
}
packed_endian_specific_integral &operator-=(value_type newValue) {
*this = *this - newValue;
return *this;
}
packed_endian_specific_integral &operator|=(value_type newValue) {
*this = *this | newValue;
return *this;
}
packed_endian_specific_integral &operator&=(value_type newValue) {
*this = *this & newValue;
return *this;
}
private:
struct {
alignas(ALIGN) char buffer[sizeof(value_type)];
} Value;
public:
struct ref {
explicit ref(void *Ptr) : Ptr(Ptr) {}
operator value_type() const {
return endian::read<value_type, endian, alignment>(Ptr);
}
void operator=(value_type NewValue) {
endian::write<value_type, endian, alignment>(Ptr, NewValue);
}
private:
void *Ptr;
};
};
} // end namespace detail
using ulittle16_t =
detail::packed_endian_specific_integral<uint16_t, little, unaligned>;
using ulittle32_t =
detail::packed_endian_specific_integral<uint32_t, little, unaligned>;
using ulittle64_t =
detail::packed_endian_specific_integral<uint64_t, little, unaligned>;
using little16_t =
detail::packed_endian_specific_integral<int16_t, little, unaligned>;
using little32_t =
detail::packed_endian_specific_integral<int32_t, little, unaligned>;
using little64_t =
detail::packed_endian_specific_integral<int64_t, little, unaligned>;
using aligned_ulittle16_t =
detail::packed_endian_specific_integral<uint16_t, little, aligned>;
using aligned_ulittle32_t =
detail::packed_endian_specific_integral<uint32_t, little, aligned>;
using aligned_ulittle64_t =
detail::packed_endian_specific_integral<uint64_t, little, aligned>;
using aligned_little16_t =
detail::packed_endian_specific_integral<int16_t, little, aligned>;
using aligned_little32_t =
detail::packed_endian_specific_integral<int32_t, little, aligned>;
using aligned_little64_t =
detail::packed_endian_specific_integral<int64_t, little, aligned>;
using ubig16_t =
detail::packed_endian_specific_integral<uint16_t, big, unaligned>;
using ubig32_t =
detail::packed_endian_specific_integral<uint32_t, big, unaligned>;
using ubig64_t =
detail::packed_endian_specific_integral<uint64_t, big, unaligned>;
using big16_t =
detail::packed_endian_specific_integral<int16_t, big, unaligned>;
using big32_t =
detail::packed_endian_specific_integral<int32_t, big, unaligned>;
using big64_t =
detail::packed_endian_specific_integral<int64_t, big, unaligned>;
using aligned_ubig16_t =
detail::packed_endian_specific_integral<uint16_t, big, aligned>;
using aligned_ubig32_t =
detail::packed_endian_specific_integral<uint32_t, big, aligned>;
using aligned_ubig64_t =
detail::packed_endian_specific_integral<uint64_t, big, aligned>;
using aligned_big16_t =
detail::packed_endian_specific_integral<int16_t, big, aligned>;
using aligned_big32_t =
detail::packed_endian_specific_integral<int32_t, big, aligned>;
using aligned_big64_t =
detail::packed_endian_specific_integral<int64_t, big, aligned>;
using unaligned_uint16_t =
detail::packed_endian_specific_integral<uint16_t, native, unaligned>;
using unaligned_uint32_t =
detail::packed_endian_specific_integral<uint32_t, native, unaligned>;
using unaligned_uint64_t =
detail::packed_endian_specific_integral<uint64_t, native, unaligned>;
using unaligned_int16_t =
detail::packed_endian_specific_integral<int16_t, native, unaligned>;
using unaligned_int32_t =
detail::packed_endian_specific_integral<int32_t, native, unaligned>;
using unaligned_int64_t =
detail::packed_endian_specific_integral<int64_t, native, unaligned>;
template <typename T>
using little_t = detail::packed_endian_specific_integral<T, little, unaligned>;
template <typename T>
using big_t = detail::packed_endian_specific_integral<T, big, unaligned>;
template <typename T>
using aligned_little_t =
detail::packed_endian_specific_integral<T, little, aligned>;
template <typename T>
using aligned_big_t = detail::packed_endian_specific_integral<T, big, aligned>;
namespace endian {
template <typename T> inline T read(const void *P, endianness E) {
return read<T, unaligned>(P, E);
}
template <typename T, endianness E> inline T read(const void *P) {
return *(const detail::packed_endian_specific_integral<T, E, unaligned> *)P;
}
inline uint16_t read16(const void *P, endianness E) {
return read<uint16_t>(P, E);
}
inline uint32_t read32(const void *P, endianness E) {
return read<uint32_t>(P, E);
}
inline uint64_t read64(const void *P, endianness E) {
return read<uint64_t>(P, E);
}
template <endianness E> inline uint16_t read16(const void *P) {
return read<uint16_t, E>(P);
}
template <endianness E> inline uint32_t read32(const void *P) {
return read<uint32_t, E>(P);
}
template <endianness E> inline uint64_t read64(const void *P) {
return read<uint64_t, E>(P);
}
inline uint16_t read16le(const void *P) { return read16<little>(P); }
inline uint32_t read32le(const void *P) { return read32<little>(P); }
inline uint64_t read64le(const void *P) { return read64<little>(P); }
inline uint16_t read16be(const void *P) { return read16<big>(P); }
inline uint32_t read32be(const void *P) { return read32<big>(P); }
inline uint64_t read64be(const void *P) { return read64<big>(P); }
template <typename T> inline void write(void *P, T V, endianness E) {
write<T, unaligned>(P, V, E);
}
template <typename T, endianness E> inline void write(void *P, T V) {
*(detail::packed_endian_specific_integral<T, E, unaligned> *)P = V;
}
inline void write16(void *P, uint16_t V, endianness E) {
write<uint16_t>(P, V, E);
}
inline void write32(void *P, uint32_t V, endianness E) {
write<uint32_t>(P, V, E);
}
inline void write64(void *P, uint64_t V, endianness E) {
write<uint64_t>(P, V, E);
}
template <endianness E> inline void write16(void *P, uint16_t V) {
write<uint16_t, E>(P, V);
}
template <endianness E> inline void write32(void *P, uint32_t V) {
write<uint32_t, E>(P, V);
}
template <endianness E> inline void write64(void *P, uint64_t V) {
write<uint64_t, E>(P, V);
}
inline void write16le(void *P, uint16_t V) { write16<little>(P, V); }
inline void write32le(void *P, uint32_t V) { write32<little>(P, V); }
inline void write64le(void *P, uint64_t V) { write64<little>(P, V); }
inline void write16be(void *P, uint16_t V) { write16<big>(P, V); }
inline void write32be(void *P, uint32_t V) { write32<big>(P, V); }
inline void write64be(void *P, uint64_t V) { write64<big>(P, V); }
} // end namespace endian
} // end namespace support
} // end namespace llvm
#endif // LLVM_SUPPORT_ENDIAN_H
PK hwFZ��n͘ � & Support/ItaniumManglingCanonicalizer.hnu �[��� //===--- ItaniumManglingCanonicalizer.h -------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines a class for computing equivalence classes of mangled names
// given a set of equivalences between name fragments.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ITANIUMMANGLINGCANONICALIZER_H
#define LLVM_SUPPORT_ITANIUMMANGLINGCANONICALIZER_H
#include <cstdint>
namespace llvm {
class StringRef;
/// Canonicalizer for mangled names.
///
/// This class allows specifying a list of "equivalent" manglings. For example,
/// you can specify that Ss is equivalent to
/// NSt3__112basic_stringIcNS_11char_traitsIcEENS_9allocatorIcEEEE
/// and then manglings that refer to libstdc++'s 'std::string' will be
/// considered equivalent to manglings that are the same except that they refer
/// to libc++'s 'std::string'.
///
/// This can be used when data (eg, profiling data) is available for a version
/// of a program built in a different configuration, with correspondingly
/// different manglings.
class ItaniumManglingCanonicalizer {
public:
ItaniumManglingCanonicalizer();
ItaniumManglingCanonicalizer(const ItaniumManglingCanonicalizer &) = delete;
void operator=(const ItaniumManglingCanonicalizer &) = delete;
~ItaniumManglingCanonicalizer();
enum class EquivalenceError {
Success,
/// Both the equivalent manglings have already been used as components of
/// some other mangling we've looked at. It's too late to add this
/// equivalence.
ManglingAlreadyUsed,
/// The first equivalent mangling is invalid.
InvalidFirstMangling,
/// The second equivalent mangling is invalid.
InvalidSecondMangling,
};
enum class FragmentKind {
/// The mangling fragment is a <name> (or a predefined <substitution>).
Name,
/// The mangling fragment is a <type>.
Type,
/// The mangling fragment is an <encoding>.
Encoding,
};
/// Add an equivalence between \p First and \p Second. Both manglings must
/// live at least as long as the canonicalizer.
EquivalenceError addEquivalence(FragmentKind Kind, StringRef First,
StringRef Second);
using Key = uintptr_t;
/// Form a canonical key for the specified mangling. They key will be the
/// same for all equivalent manglings, and different for any two
/// non-equivalent manglings, but is otherwise unspecified.
///
/// Returns Key() if (and only if) the mangling is not a valid Itanium C++
/// ABI mangling.
///
/// The string denoted by Mangling must live as long as the canonicalizer.
Key canonicalize(StringRef Mangling);
/// Find a canonical key for the specified mangling, if one has already been
/// formed. Otherwise returns Key().
Key lookup(StringRef Mangling);
private:
struct Impl;
Impl *P;
};
} // namespace llvm
#endif // LLVM_SUPPORT_ITANIUMMANGLINGCANONICALIZER_H
PK hwFZ�|"vz z Support/ReverseIteration.hnu �[��� #ifndef LLVM_SUPPORT_REVERSEITERATION_H
#define LLVM_SUPPORT_REVERSEITERATION_H
#include "llvm/Config/abi-breaking.h"
#include "llvm/Support/PointerLikeTypeTraits.h"
namespace llvm {
template<class T = void *>
bool shouldReverseIterate() {
#if LLVM_ENABLE_REVERSE_ITERATION
return detail::IsPointerLike<T>::value;
#else
return false;
#endif
}
} // namespace llvm
#endif
PK hwFZ�T,�
�
Support/Recycler.hnu �[��� //==- llvm/Support/Recycler.h - Recycling Allocator --------------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the Recycler class template. See the doxygen comment for
// Recycler for more details.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_RECYCLER_H
#define LLVM_SUPPORT_RECYCLER_H
#include "llvm/ADT/ilist.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/ErrorHandling.h"
#include <cassert>
namespace llvm {
/// PrintRecyclingAllocatorStats - Helper for RecyclingAllocator for
/// printing statistics.
///
void PrintRecyclerStats(size_t Size, size_t Align, size_t FreeListSize);
/// Recycler - This class manages a linked-list of deallocated nodes
/// and facilitates reusing deallocated memory in place of allocating
/// new memory.
///
template <class T, size_t Size = sizeof(T), size_t Align = alignof(T)>
class Recycler {
struct FreeNode {
FreeNode *Next;
};
/// List of nodes that have deleted contents and are not in active use.
FreeNode *FreeList = nullptr;
FreeNode *pop_val() {
auto *Val = FreeList;
__asan_unpoison_memory_region(Val, Size);
FreeList = FreeList->Next;
__msan_allocated_memory(Val, Size);
return Val;
}
void push(FreeNode *N) {
N->Next = FreeList;
FreeList = N;
__asan_poison_memory_region(N, Size);
}
public:
~Recycler() {
// If this fails, either the callee has lost track of some allocation,
// or the callee isn't tracking allocations and should just call
// clear() before deleting the Recycler.
assert(!FreeList && "Non-empty recycler deleted!");
}
/// clear - Release all the tracked allocations to the allocator. The
/// recycler must be free of any tracked allocations before being
/// deleted; calling clear is one way to ensure this.
template<class AllocatorType>
void clear(AllocatorType &Allocator) {
while (FreeList) {
T *t = reinterpret_cast<T *>(pop_val());
Allocator.Deallocate(t);
}
}
/// Special case for BumpPtrAllocator which has an empty Deallocate()
/// function.
///
/// There is no need to traverse the free list, pulling all the objects into
/// cache.
void clear(BumpPtrAllocator &) { FreeList = nullptr; }
template<class SubClass, class AllocatorType>
SubClass *Allocate(AllocatorType &Allocator) {
static_assert(alignof(SubClass) <= Align,
"Recycler allocation alignment is less than object align!");
static_assert(sizeof(SubClass) <= Size,
"Recycler allocation size is less than object size!");
return FreeList ? reinterpret_cast<SubClass *>(pop_val())
: static_cast<SubClass *>(Allocator.Allocate(Size, Align));
}
template<class AllocatorType>
T *Allocate(AllocatorType &Allocator) {
return Allocate<T>(Allocator);
}
template<class SubClass, class AllocatorType>
void Deallocate(AllocatorType & /*Allocator*/, SubClass* Element) {
push(reinterpret_cast<FreeNode *>(Element));
}
void PrintStats();
};
template <class T, size_t Size, size_t Align>
void Recycler<T, Size, Align>::PrintStats() {
size_t S = 0;
for (auto *I = FreeList; I; I = I->Next)
++S;
PrintRecyclerStats(Size, Align, S);
}
}
#endif
PK hwFZf� � � Support/SaveAndRestore.hnu �[��� //===-- SaveAndRestore.h - Utility -------------------------------*- C++ -*-=//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file provides utility classes that use RAII to save and restore
/// values.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_SAVEANDRESTORE_H
#define LLVM_SUPPORT_SAVEANDRESTORE_H
#include <utility>
namespace llvm {
/// A utility class that uses RAII to save and restore the value of a variable.
template <typename T> struct SaveAndRestore {
SaveAndRestore(T &X) : X(X), OldValue(X) {}
SaveAndRestore(T &X, const T &NewValue) : X(X), OldValue(X) { X = NewValue; }
SaveAndRestore(T &X, T &&NewValue) : X(X), OldValue(std::move(X)) {
X = std::move(NewValue);
}
~SaveAndRestore() { X = std::move(OldValue); }
const T &get() { return OldValue; }
private:
T &X;
T OldValue;
};
// User-defined CTAD guides.
template <typename T> SaveAndRestore(T &) -> SaveAndRestore<T>;
template <typename T> SaveAndRestore(T &, const T &) -> SaveAndRestore<T>;
template <typename T> SaveAndRestore(T &, T &&) -> SaveAndRestore<T>;
} // namespace llvm
#endif
PK hwFZ��t) Support/SystemUtils.hnu �[��� //===- SystemUtils.h - Utilities to do low-level system stuff ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains functions used to do a variety of low-level, often
// system-specific, tasks.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_SYSTEMUTILS_H
#define LLVM_SUPPORT_SYSTEMUTILS_H
namespace llvm {
class raw_ostream;
/// Determine if the raw_ostream provided is connected to a terminal. If so,
/// generate a warning message to errs() advising against display of bitcode
/// and return true. Otherwise just return false.
/// Check for output written to a console
bool CheckBitcodeOutputToConsole(
raw_ostream &stream_to_check ///< The stream to be checked
);
} // namespace llvm
#endif
PK hwFZ�f�� � Support/BinaryStreamWriter.hnu �[��� //===- BinaryStreamWriter.h - Writes objects to a BinaryStream ---*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_BINARYSTREAMWRITER_H
#define LLVM_SUPPORT_BINARYSTREAMWRITER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/BinaryStreamError.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <type_traits>
#include <utility>
namespace llvm {
/// Provides write only access to a subclass of `WritableBinaryStream`.
/// Provides bounds checking and helpers for writing certain common data types
/// such as null-terminated strings, integers in various flavors of endianness,
/// etc. Can be subclassed to provide reading and writing of custom datatypes,
/// although no methods are overridable.
class BinaryStreamWriter {
public:
BinaryStreamWriter() = default;
explicit BinaryStreamWriter(WritableBinaryStreamRef Ref);
explicit BinaryStreamWriter(WritableBinaryStream &Stream);
explicit BinaryStreamWriter(MutableArrayRef<uint8_t> Data,
llvm::support::endianness Endian);
BinaryStreamWriter(const BinaryStreamWriter &Other) = default;
BinaryStreamWriter &operator=(const BinaryStreamWriter &Other) = default;
virtual ~BinaryStreamWriter() = default;
/// Write the bytes specified in \p Buffer to the underlying stream.
/// On success, updates the offset so that subsequent writes will occur
/// at the next unwritten position.
///
/// \returns a success error code if the data was successfully written,
/// otherwise returns an appropriate error code.
Error writeBytes(ArrayRef<uint8_t> Buffer);
/// Write the integer \p Value to the underlying stream in the
/// specified endianness. On success, updates the offset so that
/// subsequent writes occur at the next unwritten position.
///
/// \returns a success error code if the data was successfully written,
/// otherwise returns an appropriate error code.
template <typename T> Error writeInteger(T Value) {
static_assert(std::is_integral_v<T>,
"Cannot call writeInteger with non-integral value!");
uint8_t Buffer[sizeof(T)];
llvm::support::endian::write<T, llvm::support::unaligned>(
Buffer, Value, Stream.getEndian());
return writeBytes(Buffer);
}
/// Similar to writeInteger
template <typename T> Error writeEnum(T Num) {
static_assert(std::is_enum<T>::value,
"Cannot call writeEnum with non-Enum type");
using U = std::underlying_type_t<T>;
return writeInteger<U>(static_cast<U>(Num));
}
/// Write the unsigned integer Value to the underlying stream using ULEB128
/// encoding.
///
/// \returns a success error code if the data was successfully written,
/// otherwise returns an appropriate error code.
Error writeULEB128(uint64_t Value);
/// Write the unsigned integer Value to the underlying stream using ULEB128
/// encoding.
///
/// \returns a success error code if the data was successfully written,
/// otherwise returns an appropriate error code.
Error writeSLEB128(int64_t Value);
/// Write the string \p Str to the underlying stream followed by a null
/// terminator. On success, updates the offset so that subsequent writes
/// occur at the next unwritten position. \p Str need not be null terminated
/// on input.
///
/// \returns a success error code if the data was successfully written,
/// otherwise returns an appropriate error code.
Error writeCString(StringRef Str);
/// Write the string \p Str to the underlying stream without a null
/// terminator. On success, updates the offset so that subsequent writes
/// occur at the next unwritten position.
///
/// \returns a success error code if the data was successfully written,
/// otherwise returns an appropriate error code.
Error writeFixedString(StringRef Str);
/// Efficiently reads all data from \p Ref, and writes it to this stream.
/// This operation will not invoke any copies of the source data, regardless
/// of the source stream's implementation.
///
/// \returns a success error code if the data was successfully written,
/// otherwise returns an appropriate error code.
Error writeStreamRef(BinaryStreamRef Ref);
/// Efficiently reads \p Size bytes from \p Ref, and writes it to this stream.
/// This operation will not invoke any copies of the source data, regardless
/// of the source stream's implementation.
///
/// \returns a success error code if the data was successfully written,
/// otherwise returns an appropriate error code.
Error writeStreamRef(BinaryStreamRef Ref, uint64_t Size);
/// Writes the object \p Obj to the underlying stream, as if by using memcpy.
/// It is up to the caller to ensure that type of \p Obj can be safely copied
/// in this fashion, as no checks are made to ensure that this is safe.
///
/// \returns a success error code if the data was successfully written,
/// otherwise returns an appropriate error code.
template <typename T> Error writeObject(const T &Obj) {
static_assert(!std::is_pointer<T>::value,
"writeObject should not be used with pointers, to write "
"the pointed-to value dereference the pointer before calling "
"writeObject");
return writeBytes(
ArrayRef<uint8_t>(reinterpret_cast<const uint8_t *>(&Obj), sizeof(T)));
}
/// Writes an array of objects of type T to the underlying stream, as if by
/// using memcpy. It is up to the caller to ensure that type of \p Obj can
/// be safely copied in this fashion, as no checks are made to ensure that
/// this is safe.
///
/// \returns a success error code if the data was successfully written,
/// otherwise returns an appropriate error code.
template <typename T> Error writeArray(ArrayRef<T> Array) {
if (Array.empty())
return Error::success();
if (Array.size() > UINT32_MAX / sizeof(T))
return make_error<BinaryStreamError>(
stream_error_code::invalid_array_size);
return writeBytes(
ArrayRef<uint8_t>(reinterpret_cast<const uint8_t *>(Array.data()),
Array.size() * sizeof(T)));
}
/// Writes all data from the array \p Array to the underlying stream.
///
/// \returns a success error code if the data was successfully written,
/// otherwise returns an appropriate error code.
template <typename T, typename U>
Error writeArray(VarStreamArray<T, U> Array) {
return writeStreamRef(Array.getUnderlyingStream());
}
/// Writes all elements from the array \p Array to the underlying stream.
///
/// \returns a success error code if the data was successfully written,
/// otherwise returns an appropriate error code.
template <typename T> Error writeArray(FixedStreamArray<T> Array) {
return writeStreamRef(Array.getUnderlyingStream());
}
/// Splits the Writer into two Writers at a given offset.
std::pair<BinaryStreamWriter, BinaryStreamWriter> split(uint64_t Off) const;
void setOffset(uint64_t Off) { Offset = Off; }
uint64_t getOffset() const { return Offset; }
uint64_t getLength() const { return Stream.getLength(); }
uint64_t bytesRemaining() const { return getLength() - getOffset(); }
Error padToAlignment(uint32_t Align);
protected:
WritableBinaryStreamRef Stream;
uint64_t Offset = 0;
};
} // end namespace llvm
#endif // LLVM_SUPPORT_BINARYSTREAMWRITER_H
PK hwFZQ�"�lv lv & Support/X86DisassemblerDecoderCommon.hnu �[��� //===-- X86DisassemblerDecoderCommon.h - Disassembler decoder ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file is part of the X86 Disassembler.
// It contains common definitions used by both the disassembler and the table
// generator.
// Documentation for the disassembler can be found in X86Disassembler.h.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_X86DISASSEMBLERDECODERCOMMON_H
#define LLVM_SUPPORT_X86DISASSEMBLERDECODERCOMMON_H
#include "llvm/Support/DataTypes.h"
namespace llvm {
namespace X86Disassembler {
#define INSTRUCTIONS_SYM x86DisassemblerInstrSpecifiers
#define CONTEXTS_SYM x86DisassemblerContexts
#define ONEBYTE_SYM x86DisassemblerOneByteOpcodes
#define TWOBYTE_SYM x86DisassemblerTwoByteOpcodes
#define THREEBYTE38_SYM x86DisassemblerThreeByte38Opcodes
#define THREEBYTE3A_SYM x86DisassemblerThreeByte3AOpcodes
#define XOP8_MAP_SYM x86DisassemblerXOP8Opcodes
#define XOP9_MAP_SYM x86DisassemblerXOP9Opcodes
#define XOPA_MAP_SYM x86DisassemblerXOPAOpcodes
#define THREEDNOW_MAP_SYM x86Disassembler3DNowOpcodes
#define MAP5_SYM x86DisassemblerMap5Opcodes
#define MAP6_SYM x86DisassemblerMap6Opcodes
#define INSTRUCTIONS_STR "x86DisassemblerInstrSpecifiers"
#define CONTEXTS_STR "x86DisassemblerContexts"
#define ONEBYTE_STR "x86DisassemblerOneByteOpcodes"
#define TWOBYTE_STR "x86DisassemblerTwoByteOpcodes"
#define THREEBYTE38_STR "x86DisassemblerThreeByte38Opcodes"
#define THREEBYTE3A_STR "x86DisassemblerThreeByte3AOpcodes"
#define XOP8_MAP_STR "x86DisassemblerXOP8Opcodes"
#define XOP9_MAP_STR "x86DisassemblerXOP9Opcodes"
#define XOPA_MAP_STR "x86DisassemblerXOPAOpcodes"
#define THREEDNOW_MAP_STR "x86Disassembler3DNowOpcodes"
#define MAP5_STR "x86DisassemblerMap5Opcodes"
#define MAP6_STR "x86DisassemblerMap6Opcodes"
// Attributes of an instruction that must be known before the opcode can be
// processed correctly. Most of these indicate the presence of particular
// prefixes, but ATTR_64BIT is simply an attribute of the decoding context.
enum attributeBits {
ATTR_NONE = 0x00,
ATTR_64BIT = 0x1 << 0,
ATTR_XS = 0x1 << 1,
ATTR_XD = 0x1 << 2,
ATTR_REXW = 0x1 << 3,
ATTR_OPSIZE = 0x1 << 4,
ATTR_ADSIZE = 0x1 << 5,
ATTR_VEX = 0x1 << 6,
ATTR_VEXL = 0x1 << 7,
ATTR_EVEX = 0x1 << 8,
ATTR_EVEXL2 = 0x1 << 9,
ATTR_EVEXK = 0x1 << 10,
ATTR_EVEXKZ = 0x1 << 11,
ATTR_EVEXB = 0x1 << 12,
ATTR_max = 0x1 << 13,
};
// Combinations of the above attributes that are relevant to instruction
// decode. Although other combinations are possible, they can be reduced to
// these without affecting the ultimately decoded instruction.
// Class name Rank Rationale for rank assignment
#define INSTRUCTION_CONTEXTS \
ENUM_ENTRY(IC, 0, "says nothing about the instruction") \
ENUM_ENTRY(IC_64BIT, 1, "says the instruction applies in " \
"64-bit mode but no more") \
ENUM_ENTRY(IC_OPSIZE, 3, "requires an OPSIZE prefix, so " \
"operands change width") \
ENUM_ENTRY(IC_ADSIZE, 3, "requires an ADSIZE prefix, so " \
"operands change width") \
ENUM_ENTRY(IC_OPSIZE_ADSIZE, 4, "requires ADSIZE and OPSIZE prefixes") \
ENUM_ENTRY(IC_XD, 2, "may say something about the opcode " \
"but not the operands") \
ENUM_ENTRY(IC_XS, 2, "may say something about the opcode " \
"but not the operands") \
ENUM_ENTRY(IC_XD_OPSIZE, 3, "requires an OPSIZE prefix, so " \
"operands change width") \
ENUM_ENTRY(IC_XS_OPSIZE, 3, "requires an OPSIZE prefix, so " \
"operands change width") \
ENUM_ENTRY(IC_XD_ADSIZE, 3, "requires an ADSIZE prefix, so " \
"operands change width") \
ENUM_ENTRY(IC_XS_ADSIZE, 3, "requires an ADSIZE prefix, so " \
"operands change width") \
ENUM_ENTRY(IC_64BIT_REXW, 5, "requires a REX.W prefix, so operands "\
"change width; overrides IC_OPSIZE") \
ENUM_ENTRY(IC_64BIT_REXW_ADSIZE, 6, "requires a REX.W prefix and 0x67 " \
"prefix") \
ENUM_ENTRY(IC_64BIT_OPSIZE, 3, "Just as meaningful as IC_OPSIZE") \
ENUM_ENTRY(IC_64BIT_ADSIZE, 3, "Just as meaningful as IC_ADSIZE") \
ENUM_ENTRY(IC_64BIT_OPSIZE_ADSIZE, 4, "Just as meaningful as IC_OPSIZE/" \
"IC_ADSIZE") \
ENUM_ENTRY(IC_64BIT_XD, 6, "XD instructions are SSE; REX.W is " \
"secondary") \
ENUM_ENTRY(IC_64BIT_XS, 6, "Just as meaningful as IC_64BIT_XD") \
ENUM_ENTRY(IC_64BIT_XD_OPSIZE, 3, "Just as meaningful as IC_XD_OPSIZE") \
ENUM_ENTRY(IC_64BIT_XS_OPSIZE, 3, "Just as meaningful as IC_XS_OPSIZE") \
ENUM_ENTRY(IC_64BIT_XD_ADSIZE, 3, "Just as meaningful as IC_XD_ADSIZE") \
ENUM_ENTRY(IC_64BIT_XS_ADSIZE, 3, "Just as meaningful as IC_XS_ADSIZE") \
ENUM_ENTRY(IC_64BIT_REXW_XS, 7, "OPSIZE could mean a different " \
"opcode") \
ENUM_ENTRY(IC_64BIT_REXW_XD, 7, "Just as meaningful as " \
"IC_64BIT_REXW_XS") \
ENUM_ENTRY(IC_64BIT_REXW_OPSIZE, 8, "The Dynamic Duo! Prefer over all " \
"else because this changes most " \
"operands' meaning") \
ENUM_ENTRY(IC_VEX, 1, "requires a VEX prefix") \
ENUM_ENTRY(IC_VEX_XS, 2, "requires VEX and the XS prefix") \
ENUM_ENTRY(IC_VEX_XD, 2, "requires VEX and the XD prefix") \
ENUM_ENTRY(IC_VEX_OPSIZE, 2, "requires VEX and the OpSize prefix") \
ENUM_ENTRY(IC_VEX_W, 3, "requires VEX and the W prefix") \
ENUM_ENTRY(IC_VEX_W_XS, 4, "requires VEX, W, and XS prefix") \
ENUM_ENTRY(IC_VEX_W_XD, 4, "requires VEX, W, and XD prefix") \
ENUM_ENTRY(IC_VEX_W_OPSIZE, 4, "requires VEX, W, and OpSize") \
ENUM_ENTRY(IC_VEX_L, 3, "requires VEX and the L prefix") \
ENUM_ENTRY(IC_VEX_L_XS, 4, "requires VEX and the L and XS prefix")\
ENUM_ENTRY(IC_VEX_L_XD, 4, "requires VEX and the L and XD prefix")\
ENUM_ENTRY(IC_VEX_L_OPSIZE, 4, "requires VEX, L, and OpSize") \
ENUM_ENTRY(IC_VEX_L_W, 4, "requires VEX, L and W") \
ENUM_ENTRY(IC_VEX_L_W_XS, 5, "requires VEX, L, W and XS prefix") \
ENUM_ENTRY(IC_VEX_L_W_XD, 5, "requires VEX, L, W and XD prefix") \
ENUM_ENTRY(IC_VEX_L_W_OPSIZE, 5, "requires VEX, L, W and OpSize") \
ENUM_ENTRY(IC_EVEX, 1, "requires an EVEX prefix") \
ENUM_ENTRY(IC_EVEX_XS, 2, "requires EVEX and the XS prefix") \
ENUM_ENTRY(IC_EVEX_XD, 2, "requires EVEX and the XD prefix") \
ENUM_ENTRY(IC_EVEX_OPSIZE, 2, "requires EVEX and the OpSize prefix") \
ENUM_ENTRY(IC_EVEX_W, 3, "requires EVEX and the W prefix") \
ENUM_ENTRY(IC_EVEX_W_XS, 4, "requires EVEX, W, and XS prefix") \
ENUM_ENTRY(IC_EVEX_W_XD, 4, "requires EVEX, W, and XD prefix") \
ENUM_ENTRY(IC_EVEX_W_OPSIZE, 4, "requires EVEX, W, and OpSize") \
ENUM_ENTRY(IC_EVEX_L, 3, "requires EVEX and the L prefix") \
ENUM_ENTRY(IC_EVEX_L_XS, 4, "requires EVEX and the L and XS prefix")\
ENUM_ENTRY(IC_EVEX_L_XD, 4, "requires EVEX and the L and XD prefix")\
ENUM_ENTRY(IC_EVEX_L_OPSIZE, 4, "requires EVEX, L, and OpSize") \
ENUM_ENTRY(IC_EVEX_L_W, 3, "requires EVEX, L and W") \
ENUM_ENTRY(IC_EVEX_L_W_XS, 4, "requires EVEX, L, W and XS prefix") \
ENUM_ENTRY(IC_EVEX_L_W_XD, 4, "requires EVEX, L, W and XD prefix") \
ENUM_ENTRY(IC_EVEX_L_W_OPSIZE, 4, "requires EVEX, L, W and OpSize") \
ENUM_ENTRY(IC_EVEX_L2, 3, "requires EVEX and the L2 prefix") \
ENUM_ENTRY(IC_EVEX_L2_XS, 4, "requires EVEX and the L2 and XS prefix")\
ENUM_ENTRY(IC_EVEX_L2_XD, 4, "requires EVEX and the L2 and XD prefix")\
ENUM_ENTRY(IC_EVEX_L2_OPSIZE, 4, "requires EVEX, L2, and OpSize") \
ENUM_ENTRY(IC_EVEX_L2_W, 3, "requires EVEX, L2 and W") \
ENUM_ENTRY(IC_EVEX_L2_W_XS, 4, "requires EVEX, L2, W and XS prefix") \
ENUM_ENTRY(IC_EVEX_L2_W_XD, 4, "requires EVEX, L2, W and XD prefix") \
ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE, 4, "requires EVEX, L2, W and OpSize") \
ENUM_ENTRY(IC_EVEX_K, 1, "requires an EVEX_K prefix") \
ENUM_ENTRY(IC_EVEX_XS_K, 2, "requires EVEX_K and the XS prefix") \
ENUM_ENTRY(IC_EVEX_XD_K, 2, "requires EVEX_K and the XD prefix") \
ENUM_ENTRY(IC_EVEX_OPSIZE_K, 2, "requires EVEX_K and the OpSize prefix") \
ENUM_ENTRY(IC_EVEX_W_K, 3, "requires EVEX_K and the W prefix") \
ENUM_ENTRY(IC_EVEX_W_XS_K, 4, "requires EVEX_K, W, and XS prefix") \
ENUM_ENTRY(IC_EVEX_W_XD_K, 4, "requires EVEX_K, W, and XD prefix") \
ENUM_ENTRY(IC_EVEX_W_OPSIZE_K, 4, "requires EVEX_K, W, and OpSize") \
ENUM_ENTRY(IC_EVEX_L_K, 3, "requires EVEX_K and the L prefix") \
ENUM_ENTRY(IC_EVEX_L_XS_K, 4, "requires EVEX_K and the L and XS prefix")\
ENUM_ENTRY(IC_EVEX_L_XD_K, 4, "requires EVEX_K and the L and XD prefix")\
ENUM_ENTRY(IC_EVEX_L_OPSIZE_K, 4, "requires EVEX_K, L, and OpSize") \
ENUM_ENTRY(IC_EVEX_L_W_K, 3, "requires EVEX_K, L and W") \
ENUM_ENTRY(IC_EVEX_L_W_XS_K, 4, "requires EVEX_K, L, W and XS prefix") \
ENUM_ENTRY(IC_EVEX_L_W_XD_K, 4, "requires EVEX_K, L, W and XD prefix") \
ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_K, 4, "requires EVEX_K, L, W and OpSize") \
ENUM_ENTRY(IC_EVEX_L2_K, 3, "requires EVEX_K and the L2 prefix") \
ENUM_ENTRY(IC_EVEX_L2_XS_K, 4, "requires EVEX_K and the L2 and XS prefix")\
ENUM_ENTRY(IC_EVEX_L2_XD_K, 4, "requires EVEX_K and the L2 and XD prefix")\
ENUM_ENTRY(IC_EVEX_L2_OPSIZE_K, 4, "requires EVEX_K, L2, and OpSize") \
ENUM_ENTRY(IC_EVEX_L2_W_K, 3, "requires EVEX_K, L2 and W") \
ENUM_ENTRY(IC_EVEX_L2_W_XS_K, 4, "requires EVEX_K, L2, W and XS prefix") \
ENUM_ENTRY(IC_EVEX_L2_W_XD_K, 4, "requires EVEX_K, L2, W and XD prefix") \
ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_K, 4, "requires EVEX_K, L2, W and OpSize") \
ENUM_ENTRY(IC_EVEX_B, 1, "requires an EVEX_B prefix") \
ENUM_ENTRY(IC_EVEX_XS_B, 2, "requires EVEX_B and the XS prefix") \
ENUM_ENTRY(IC_EVEX_XD_B, 2, "requires EVEX_B and the XD prefix") \
ENUM_ENTRY(IC_EVEX_OPSIZE_B, 2, "requires EVEX_B and the OpSize prefix") \
ENUM_ENTRY(IC_EVEX_W_B, 3, "requires EVEX_B and the W prefix") \
ENUM_ENTRY(IC_EVEX_W_XS_B, 4, "requires EVEX_B, W, and XS prefix") \
ENUM_ENTRY(IC_EVEX_W_XD_B, 4, "requires EVEX_B, W, and XD prefix") \
ENUM_ENTRY(IC_EVEX_W_OPSIZE_B, 4, "requires EVEX_B, W, and OpSize") \
ENUM_ENTRY(IC_EVEX_L_B, 3, "requires EVEX_B and the L prefix") \
ENUM_ENTRY(IC_EVEX_L_XS_B, 4, "requires EVEX_B and the L and XS prefix")\
ENUM_ENTRY(IC_EVEX_L_XD_B, 4, "requires EVEX_B and the L and XD prefix")\
ENUM_ENTRY(IC_EVEX_L_OPSIZE_B, 4, "requires EVEX_B, L, and OpSize") \
ENUM_ENTRY(IC_EVEX_L_W_B, 3, "requires EVEX_B, L and W") \
ENUM_ENTRY(IC_EVEX_L_W_XS_B, 4, "requires EVEX_B, L, W and XS prefix") \
ENUM_ENTRY(IC_EVEX_L_W_XD_B, 4, "requires EVEX_B, L, W and XD prefix") \
ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_B, 4, "requires EVEX_B, L, W and OpSize") \
ENUM_ENTRY(IC_EVEX_L2_B, 3, "requires EVEX_B and the L2 prefix") \
ENUM_ENTRY(IC_EVEX_L2_XS_B, 4, "requires EVEX_B and the L2 and XS prefix")\
ENUM_ENTRY(IC_EVEX_L2_XD_B, 4, "requires EVEX_B and the L2 and XD prefix")\
ENUM_ENTRY(IC_EVEX_L2_OPSIZE_B, 4, "requires EVEX_B, L2, and OpSize") \
ENUM_ENTRY(IC_EVEX_L2_W_B, 3, "requires EVEX_B, L2 and W") \
ENUM_ENTRY(IC_EVEX_L2_W_XS_B, 4, "requires EVEX_B, L2, W and XS prefix") \
ENUM_ENTRY(IC_EVEX_L2_W_XD_B, 4, "requires EVEX_B, L2, W and XD prefix") \
ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_B, 4, "requires EVEX_B, L2, W and OpSize") \
ENUM_ENTRY(IC_EVEX_K_B, 1, "requires EVEX_B and EVEX_K prefix") \
ENUM_ENTRY(IC_EVEX_XS_K_B, 2, "requires EVEX_B, EVEX_K and the XS prefix") \
ENUM_ENTRY(IC_EVEX_XD_K_B, 2, "requires EVEX_B, EVEX_K and the XD prefix") \
ENUM_ENTRY(IC_EVEX_OPSIZE_K_B, 2, "requires EVEX_B, EVEX_K and the OpSize prefix") \
ENUM_ENTRY(IC_EVEX_W_K_B, 3, "requires EVEX_B, EVEX_K and the W prefix") \
ENUM_ENTRY(IC_EVEX_W_XS_K_B, 4, "requires EVEX_B, EVEX_K, W, and XS prefix") \
ENUM_ENTRY(IC_EVEX_W_XD_K_B, 4, "requires EVEX_B, EVEX_K, W, and XD prefix") \
ENUM_ENTRY(IC_EVEX_W_OPSIZE_K_B, 4, "requires EVEX_B, EVEX_K, W, and OpSize") \
ENUM_ENTRY(IC_EVEX_L_K_B, 3, "requires EVEX_B, EVEX_K and the L prefix") \
ENUM_ENTRY(IC_EVEX_L_XS_K_B, 4, "requires EVEX_B, EVEX_K and the L and XS prefix")\
ENUM_ENTRY(IC_EVEX_L_XD_K_B, 4, "requires EVEX_B, EVEX_K and the L and XD prefix")\
ENUM_ENTRY(IC_EVEX_L_OPSIZE_K_B, 4, "requires EVEX_B, EVEX_K, L, and OpSize") \
ENUM_ENTRY(IC_EVEX_L_W_K_B, 3, "requires EVEX_B, EVEX_K, L and W") \
ENUM_ENTRY(IC_EVEX_L_W_XS_K_B, 4, "requires EVEX_B, EVEX_K, L, W and XS prefix") \
ENUM_ENTRY(IC_EVEX_L_W_XD_K_B, 4, "requires EVEX_B, EVEX_K, L, W and XD prefix") \
ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_K_B,4, "requires EVEX_B, EVEX_K, L, W and OpSize") \
ENUM_ENTRY(IC_EVEX_L2_K_B, 3, "requires EVEX_B, EVEX_K and the L2 prefix") \
ENUM_ENTRY(IC_EVEX_L2_XS_K_B, 4, "requires EVEX_B, EVEX_K and the L2 and XS prefix")\
ENUM_ENTRY(IC_EVEX_L2_XD_K_B, 4, "requires EVEX_B, EVEX_K and the L2 and XD prefix")\
ENUM_ENTRY(IC_EVEX_L2_OPSIZE_K_B, 4, "requires EVEX_B, EVEX_K, L2, and OpSize") \
ENUM_ENTRY(IC_EVEX_L2_W_K_B, 3, "requires EVEX_B, EVEX_K, L2 and W") \
ENUM_ENTRY(IC_EVEX_L2_W_XS_K_B, 4, "requires EVEX_B, EVEX_K, L2, W and XS prefix") \
ENUM_ENTRY(IC_EVEX_L2_W_XD_K_B, 4, "requires EVEX_B, EVEX_K, L2, W and XD prefix") \
ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_K_B,4, "requires EVEX_B, EVEX_K, L2, W and OpSize") \
ENUM_ENTRY(IC_EVEX_KZ_B, 1, "requires EVEX_B and EVEX_KZ prefix") \
ENUM_ENTRY(IC_EVEX_XS_KZ_B, 2, "requires EVEX_B, EVEX_KZ and the XS prefix") \
ENUM_ENTRY(IC_EVEX_XD_KZ_B, 2, "requires EVEX_B, EVEX_KZ and the XD prefix") \
ENUM_ENTRY(IC_EVEX_OPSIZE_KZ_B, 2, "requires EVEX_B, EVEX_KZ and the OpSize prefix") \
ENUM_ENTRY(IC_EVEX_W_KZ_B, 3, "requires EVEX_B, EVEX_KZ and the W prefix") \
ENUM_ENTRY(IC_EVEX_W_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ, W, and XS prefix") \
ENUM_ENTRY(IC_EVEX_W_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ, W, and XD prefix") \
ENUM_ENTRY(IC_EVEX_W_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, W, and OpSize") \
ENUM_ENTRY(IC_EVEX_L_KZ_B, 3, "requires EVEX_B, EVEX_KZ and the L prefix") \
ENUM_ENTRY(IC_EVEX_L_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L and XS prefix")\
ENUM_ENTRY(IC_EVEX_L_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L and XD prefix")\
ENUM_ENTRY(IC_EVEX_L_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, and OpSize") \
ENUM_ENTRY(IC_EVEX_L_W_KZ_B, 3, "requires EVEX_B, EVEX_KZ, L and W") \
ENUM_ENTRY(IC_EVEX_L_W_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, W and XS prefix") \
ENUM_ENTRY(IC_EVEX_L_W_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, W and XD prefix") \
ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, W and OpSize") \
ENUM_ENTRY(IC_EVEX_L2_KZ_B, 3, "requires EVEX_B, EVEX_KZ and the L2 prefix") \
ENUM_ENTRY(IC_EVEX_L2_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L2 and XS prefix")\
ENUM_ENTRY(IC_EVEX_L2_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L2 and XD prefix")\
ENUM_ENTRY(IC_EVEX_L2_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, and OpSize") \
ENUM_ENTRY(IC_EVEX_L2_W_KZ_B, 3, "requires EVEX_B, EVEX_KZ, L2 and W") \
ENUM_ENTRY(IC_EVEX_L2_W_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, W and XS prefix") \
ENUM_ENTRY(IC_EVEX_L2_W_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, W and XD prefix") \
ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, W and OpSize") \
ENUM_ENTRY(IC_EVEX_KZ, 1, "requires an EVEX_KZ prefix") \
ENUM_ENTRY(IC_EVEX_XS_KZ, 2, "requires EVEX_KZ and the XS prefix") \
ENUM_ENTRY(IC_EVEX_XD_KZ, 2, "requires EVEX_KZ and the XD prefix") \
ENUM_ENTRY(IC_EVEX_OPSIZE_KZ, 2, "requires EVEX_KZ and the OpSize prefix") \
ENUM_ENTRY(IC_EVEX_W_KZ, 3, "requires EVEX_KZ and the W prefix") \
ENUM_ENTRY(IC_EVEX_W_XS_KZ, 4, "requires EVEX_KZ, W, and XS prefix") \
ENUM_ENTRY(IC_EVEX_W_XD_KZ, 4, "requires EVEX_KZ, W, and XD prefix") \
ENUM_ENTRY(IC_EVEX_W_OPSIZE_KZ, 4, "requires EVEX_KZ, W, and OpSize") \
ENUM_ENTRY(IC_EVEX_L_KZ, 3, "requires EVEX_KZ and the L prefix") \
ENUM_ENTRY(IC_EVEX_L_XS_KZ, 4, "requires EVEX_KZ and the L and XS prefix")\
ENUM_ENTRY(IC_EVEX_L_XD_KZ, 4, "requires EVEX_KZ and the L and XD prefix")\
ENUM_ENTRY(IC_EVEX_L_OPSIZE_KZ, 4, "requires EVEX_KZ, L, and OpSize") \
ENUM_ENTRY(IC_EVEX_L_W_KZ, 3, "requires EVEX_KZ, L and W") \
ENUM_ENTRY(IC_EVEX_L_W_XS_KZ, 4, "requires EVEX_KZ, L, W and XS prefix") \
ENUM_ENTRY(IC_EVEX_L_W_XD_KZ, 4, "requires EVEX_KZ, L, W and XD prefix") \
ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_KZ, 4, "requires EVEX_KZ, L, W and OpSize") \
ENUM_ENTRY(IC_EVEX_L2_KZ, 3, "requires EVEX_KZ and the L2 prefix") \
ENUM_ENTRY(IC_EVEX_L2_XS_KZ, 4, "requires EVEX_KZ and the L2 and XS prefix")\
ENUM_ENTRY(IC_EVEX_L2_XD_KZ, 4, "requires EVEX_KZ and the L2 and XD prefix")\
ENUM_ENTRY(IC_EVEX_L2_OPSIZE_KZ, 4, "requires EVEX_KZ, L2, and OpSize") \
ENUM_ENTRY(IC_EVEX_L2_W_KZ, 3, "requires EVEX_KZ, L2 and W") \
ENUM_ENTRY(IC_EVEX_L2_W_XS_KZ, 4, "requires EVEX_KZ, L2, W and XS prefix") \
ENUM_ENTRY(IC_EVEX_L2_W_XD_KZ, 4, "requires EVEX_KZ, L2, W and XD prefix") \
ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_KZ, 4, "requires EVEX_KZ, L2, W and OpSize")
#define ENUM_ENTRY(n, r, d) n,
enum InstructionContext {
INSTRUCTION_CONTEXTS
IC_max
};
#undef ENUM_ENTRY
// Opcode types, which determine which decode table to use, both in the Intel
// manual and also for the decoder.
enum OpcodeType {
ONEBYTE = 0,
TWOBYTE = 1,
THREEBYTE_38 = 2,
THREEBYTE_3A = 3,
XOP8_MAP = 4,
XOP9_MAP = 5,
XOPA_MAP = 6,
THREEDNOW_MAP = 7,
MAP5 = 8,
MAP6 = 9
};
// The following structs are used for the hierarchical decode table. After
// determining the instruction's class (i.e., which IC_* constant applies to
// it), the decoder reads the opcode. Some instructions require specific
// values of the ModR/M byte, so the ModR/M byte indexes into the final table.
//
// If a ModR/M byte is not required, "required" is left unset, and the values
// for each instructionID are identical.
typedef uint16_t InstrUID;
// ModRMDecisionType - describes the type of ModR/M decision, allowing the
// consumer to determine the number of entries in it.
//
// MODRM_ONEENTRY - No matter what the value of the ModR/M byte is, the decoded
// instruction is the same.
// MODRM_SPLITRM - If the ModR/M byte is between 0x00 and 0xbf, the opcode
// corresponds to one instruction; otherwise, it corresponds to
// a different instruction.
// MODRM_SPLITMISC- If the ModR/M byte is between 0x00 and 0xbf, ModR/M byte
// divided by 8 is used to select instruction; otherwise, each
// value of the ModR/M byte could correspond to a different
// instruction.
// MODRM_SPLITREG - ModR/M byte divided by 8 is used to select instruction. This
// corresponds to instructions that use reg field as opcode
// MODRM_FULL - Potentially, each value of the ModR/M byte could correspond
// to a different instruction.
#define MODRMTYPES \
ENUM_ENTRY(MODRM_ONEENTRY) \
ENUM_ENTRY(MODRM_SPLITRM) \
ENUM_ENTRY(MODRM_SPLITMISC) \
ENUM_ENTRY(MODRM_SPLITREG) \
ENUM_ENTRY(MODRM_FULL)
#define ENUM_ENTRY(n) n,
enum ModRMDecisionType {
MODRMTYPES
MODRM_max
};
#undef ENUM_ENTRY
#define CASE_ENCODING_RM \
case ENCODING_RM: \
case ENCODING_RM_CD2: \
case ENCODING_RM_CD4: \
case ENCODING_RM_CD8: \
case ENCODING_RM_CD16: \
case ENCODING_RM_CD32: \
case ENCODING_RM_CD64
#define CASE_ENCODING_VSIB \
case ENCODING_VSIB: \
case ENCODING_VSIB_CD2: \
case ENCODING_VSIB_CD4: \
case ENCODING_VSIB_CD8: \
case ENCODING_VSIB_CD16: \
case ENCODING_VSIB_CD32: \
case ENCODING_VSIB_CD64
// Physical encodings of instruction operands.
#define ENCODINGS \
ENUM_ENTRY(ENCODING_NONE, "") \
ENUM_ENTRY(ENCODING_REG, "Register operand in ModR/M byte.") \
ENUM_ENTRY(ENCODING_RM, "R/M operand in ModR/M byte.") \
ENUM_ENTRY(ENCODING_RM_CD2, "R/M operand with CDisp scaling of 2") \
ENUM_ENTRY(ENCODING_RM_CD4, "R/M operand with CDisp scaling of 4") \
ENUM_ENTRY(ENCODING_RM_CD8, "R/M operand with CDisp scaling of 8") \
ENUM_ENTRY(ENCODING_RM_CD16,"R/M operand with CDisp scaling of 16") \
ENUM_ENTRY(ENCODING_RM_CD32,"R/M operand with CDisp scaling of 32") \
ENUM_ENTRY(ENCODING_RM_CD64,"R/M operand with CDisp scaling of 64") \
ENUM_ENTRY(ENCODING_SIB, "Force SIB operand in ModR/M byte.") \
ENUM_ENTRY(ENCODING_VSIB, "VSIB operand in ModR/M byte.") \
ENUM_ENTRY(ENCODING_VSIB_CD2, "VSIB operand with CDisp scaling of 2") \
ENUM_ENTRY(ENCODING_VSIB_CD4, "VSIB operand with CDisp scaling of 4") \
ENUM_ENTRY(ENCODING_VSIB_CD8, "VSIB operand with CDisp scaling of 8") \
ENUM_ENTRY(ENCODING_VSIB_CD16,"VSIB operand with CDisp scaling of 16") \
ENUM_ENTRY(ENCODING_VSIB_CD32,"VSIB operand with CDisp scaling of 32") \
ENUM_ENTRY(ENCODING_VSIB_CD64,"VSIB operand with CDisp scaling of 64") \
ENUM_ENTRY(ENCODING_VVVV, "Register operand in VEX.vvvv byte.") \
ENUM_ENTRY(ENCODING_WRITEMASK, "Register operand in EVEX.aaa byte.") \
ENUM_ENTRY(ENCODING_IB, "1-byte immediate") \
ENUM_ENTRY(ENCODING_IW, "2-byte") \
ENUM_ENTRY(ENCODING_ID, "4-byte") \
ENUM_ENTRY(ENCODING_IO, "8-byte") \
ENUM_ENTRY(ENCODING_RB, "(AL..DIL, R8B..R15B) Register code added to " \
"the opcode byte") \
ENUM_ENTRY(ENCODING_RW, "(AX..DI, R8W..R15W)") \
ENUM_ENTRY(ENCODING_RD, "(EAX..EDI, R8D..R15D)") \
ENUM_ENTRY(ENCODING_RO, "(RAX..RDI, R8..R15)") \
ENUM_ENTRY(ENCODING_FP, "Position on floating-point stack in ModR/M " \
"byte.") \
\
ENUM_ENTRY(ENCODING_Iv, "Immediate of operand size") \
ENUM_ENTRY(ENCODING_Ia, "Immediate of address size") \
ENUM_ENTRY(ENCODING_IRC, "Immediate for static rounding control") \
ENUM_ENTRY(ENCODING_Rv, "Register code of operand size added to the " \
"opcode byte") \
ENUM_ENTRY(ENCODING_CC, "Condition code encoded in opcode") \
ENUM_ENTRY(ENCODING_DUP, "Duplicate of another operand; ID is encoded " \
"in type") \
ENUM_ENTRY(ENCODING_SI, "Source index; encoded in OpSize/Adsize prefix") \
ENUM_ENTRY(ENCODING_DI, "Destination index; encoded in prefixes")
#define ENUM_ENTRY(n, d) n,
enum OperandEncoding {
ENCODINGS
ENCODING_max
};
#undef ENUM_ENTRY
// Semantic interpretations of instruction operands.
#define TYPES \
ENUM_ENTRY(TYPE_NONE, "") \
ENUM_ENTRY(TYPE_REL, "immediate address") \
ENUM_ENTRY(TYPE_R8, "1-byte register operand") \
ENUM_ENTRY(TYPE_R16, "2-byte") \
ENUM_ENTRY(TYPE_R32, "4-byte") \
ENUM_ENTRY(TYPE_R64, "8-byte") \
ENUM_ENTRY(TYPE_IMM, "immediate operand") \
ENUM_ENTRY(TYPE_UIMM8, "1-byte unsigned immediate operand") \
ENUM_ENTRY(TYPE_M, "Memory operand") \
ENUM_ENTRY(TYPE_MSIB, "Memory operand force sib encoding") \
ENUM_ENTRY(TYPE_MVSIBX, "Memory operand using XMM index") \
ENUM_ENTRY(TYPE_MVSIBY, "Memory operand using YMM index") \
ENUM_ENTRY(TYPE_MVSIBZ, "Memory operand using ZMM index") \
ENUM_ENTRY(TYPE_SRCIDX, "memory at source index") \
ENUM_ENTRY(TYPE_DSTIDX, "memory at destination index") \
ENUM_ENTRY(TYPE_MOFFS, "memory offset (relative to segment base)") \
ENUM_ENTRY(TYPE_ST, "Position on the floating-point stack") \
ENUM_ENTRY(TYPE_MM64, "8-byte MMX register") \
ENUM_ENTRY(TYPE_XMM, "16-byte") \
ENUM_ENTRY(TYPE_YMM, "32-byte") \
ENUM_ENTRY(TYPE_ZMM, "64-byte") \
ENUM_ENTRY(TYPE_VK, "mask register") \
ENUM_ENTRY(TYPE_VK_PAIR, "mask register pair") \
ENUM_ENTRY(TYPE_TMM, "tile") \
ENUM_ENTRY(TYPE_SEGMENTREG, "Segment register operand") \
ENUM_ENTRY(TYPE_DEBUGREG, "Debug register operand") \
ENUM_ENTRY(TYPE_CONTROLREG, "Control register operand") \
ENUM_ENTRY(TYPE_BNDR, "MPX bounds register") \
\
ENUM_ENTRY(TYPE_Rv, "Register operand of operand size") \
ENUM_ENTRY(TYPE_RELv, "Immediate address of operand size") \
ENUM_ENTRY(TYPE_DUP0, "Duplicate of operand 0") \
ENUM_ENTRY(TYPE_DUP1, "operand 1") \
ENUM_ENTRY(TYPE_DUP2, "operand 2") \
ENUM_ENTRY(TYPE_DUP3, "operand 3") \
ENUM_ENTRY(TYPE_DUP4, "operand 4") \
#define ENUM_ENTRY(n, d) n,
enum OperandType {
TYPES
TYPE_max
};
#undef ENUM_ENTRY
/// The specification for how to extract and interpret one operand.
struct OperandSpecifier {
uint8_t encoding;
uint8_t type;
};
static const unsigned X86_MAX_OPERANDS = 6;
/// Decoding mode for the Intel disassembler. 16-bit, 32-bit, and 64-bit mode
/// are supported, and represent real mode, IA-32e, and IA-32e in 64-bit mode,
/// respectively.
enum DisassemblerMode {
MODE_16BIT,
MODE_32BIT,
MODE_64BIT
};
} // namespace X86Disassembler
} // namespace llvm
#endif
PK hwFZ?��� Support/BalancedPartitioning.hnu �[��� //===- BalancedPartitioning.h ---------------------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements BalancedPartitioning, a recursive balanced graph
// partitioning algorithm.
//
// The algorithm is used to find an ordering of FunctionNodes while optimizing
// a specified objective. The algorithm uses recursive bisection; it starts
// with a collection of unordered FunctionNodes and tries to split them into
// two sets (buckets) of equal cardinality. Each bisection step is comprised of
// iterations that greedily swap the FunctionNodes between the two buckets while
// there is an improvement of the objective. Once the process converges, the
// problem is divided into two sub-problems of half the size, which are
// recursively applied for the two buckets. The final ordering of the
// FunctionNodes is obtained by concatenating the two (recursively computed)
// orderings.
//
// In order to speed up the computation, we limit the depth of the recursive
// tree by a specified constant (SplitDepth) and apply at most a constant
// number of greedy iterations per split (IterationsPerSplit). The worst-case
// time complexity of the implementation is bounded by O(M*log^2 N), where
// N is the number of FunctionNodes and M is the number of
// FunctionNode-UtilityNode edges; (assuming that any collection of D
// FunctionNodes contains O(D) UtilityNodes). Notice that the two different
// recursive sub-problems are independent and thus can be efficiently processed
// in parallel.
//
// Reference:
// * Optimizing Function Layout for Mobile Applications,
// https://arxiv.org/abs/2211.09285
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_BALANCED_PARTITIONING_H
#define LLVM_SUPPORT_BALANCED_PARTITIONING_H
#include "raw_ostream.h"
#include "llvm/ADT/ArrayRef.h"
#include <atomic>
#include <condition_variable>
#include <mutex>
#include <random>
#include <vector>
namespace llvm {
class ThreadPool;
/// A function with a set of utility nodes where it is beneficial to order two
/// functions close together if they have similar utility nodes
class BPFunctionNode {
friend class BalancedPartitioning;
public:
using IDT = uint64_t;
using UtilityNodeT = uint32_t;
/// \param UtilityNodes the set of utility nodes (must be unique'd)
BPFunctionNode(IDT Id, ArrayRef<UtilityNodeT> UtilityNodes)
: Id(Id), UtilityNodes(UtilityNodes) {}
/// The ID of this node
IDT Id;
void dump(raw_ostream &OS) const;
protected:
/// The list of utility nodes associated with this node
SmallVector<UtilityNodeT, 4> UtilityNodes;
/// The bucket assigned by balanced partitioning
std::optional<unsigned> Bucket;
/// The index of the input order of the FunctionNodes
uint64_t InputOrderIndex = 0;
friend class BPFunctionNodeTest_Basic_Test;
friend class BalancedPartitioningTest_Basic_Test;
friend class BalancedPartitioningTest_Large_Test;
};
/// Algorithm parameters; default values are tuned on real-world binaries
struct BalancedPartitioningConfig {
/// The depth of the recursive bisection
unsigned SplitDepth = 18;
/// The maximum number of bp iterations per split
unsigned IterationsPerSplit = 40;
/// The probability for a vertex to skip a move from its current bucket to
/// another bucket; it often helps to escape from a local optima
float SkipProbability = 0.1f;
/// Recursive subtasks up to the given depth are added to the queue and
/// distributed among threads by ThreadPool; all subsequent calls are executed
/// on the same thread
unsigned TaskSplitDepth = 9;
};
class BalancedPartitioning {
public:
BalancedPartitioning(const BalancedPartitioningConfig &Config);
/// Run recursive graph partitioning that optimizes a given objective.
void run(std::vector<BPFunctionNode> &Nodes) const;
private:
struct UtilitySignature;
using SignaturesT = SmallVector<UtilitySignature, 4>;
using FunctionNodeRange =
iterator_range<std::vector<BPFunctionNode>::iterator>;
/// A special ThreadPool that allows for spawning new tasks after blocking on
/// wait(). BalancedPartitioning recursively spawns new threads inside other
/// threads, so we need to track how many active threads that could spawn more
/// threads.
struct BPThreadPool {
ThreadPool &TheThreadPool;
std::mutex mtx;
std::condition_variable cv;
/// The number of threads that could spawn more threads
std::atomic<int> NumActiveThreads = 0;
/// Only true when all threads are down spawning new threads
bool IsFinishedSpawning = false;
/// Asynchronous submission of the task to the pool
template <typename Func> void async(Func &&F);
/// Blocking wait for all threads to complete. Unlike ThreadPool, it is
/// acceptable for other threads to add more tasks while blocking on this
/// call.
void wait();
BPThreadPool(ThreadPool &TheThreadPool) : TheThreadPool(TheThreadPool) {}
};
/// Run a recursive bisection of a given list of FunctionNodes
/// \param RecDepth the current depth of recursion
/// \param RootBucket the initial bucket of the dataVertices
/// \param Offset the assigned buckets are the range [Offset, Offset +
/// Nodes.size()]
void bisect(const FunctionNodeRange Nodes, unsigned RecDepth,
unsigned RootBucket, unsigned Offset,
std::optional<BPThreadPool> &TP) const;
/// Run bisection iterations
void runIterations(const FunctionNodeRange Nodes, unsigned RecDepth,
unsigned LeftBucket, unsigned RightBucket,
std::mt19937 &RNG) const;
/// Run a bisection iteration to improve the optimization goal
/// \returns the total number of moved FunctionNodes
unsigned runIteration(const FunctionNodeRange Nodes, unsigned LeftBucket,
unsigned RightBucket, SignaturesT &Signatures,
std::mt19937 &RNG) const;
/// Try to move \p N from one bucket to another
/// \returns true iff \p N is moved
bool moveFunctionNode(BPFunctionNode &N, unsigned LeftBucket,
unsigned RightBucket, SignaturesT &Signatures,
std::mt19937 &RNG) const;
/// Split all the FunctionNodes into 2 buckets, StartBucket and StartBucket +
/// 1 The method is used for an initial assignment before a bisection step
void split(const FunctionNodeRange Nodes, unsigned StartBucket) const;
/// The cost of the uniform log-gap cost, assuming a utility node has \p X
/// FunctionNodes in the left bucket and \p Y FunctionNodes in the right one.
float logCost(unsigned X, unsigned Y) const;
float log2Cached(unsigned i) const;
const BalancedPartitioningConfig &Config;
/// Precomputed values of log2(x). Table size is small enough to fit in cache.
static constexpr unsigned LOG_CACHE_SIZE = 16384;
float Log2Cache[LOG_CACHE_SIZE];
/// The signature of a particular utility node used for the bisection step,
/// i.e., the number of \p FunctionNodes in each of the two buckets
struct UtilitySignature {
/// The number of \p FunctionNodes in the left bucket
unsigned LeftCount = 0;
/// The number of \p FunctionNodes in the right bucket
unsigned RightCount = 0;
/// The cached gain of moving a \p FunctionNode from the left bucket to the
/// right bucket
float CachedGainLR;
/// The cached gain of moving a \p FunctionNode from the right bucket to the
/// left bucket
float CachedGainRL;
/// Whether \p CachedGainLR and \p CachedGainRL are valid
bool CachedGainIsValid = false;
};
protected:
/// Compute the move gain for uniform log-gap cost
static float moveGain(const BPFunctionNode &N, bool FromLeftToRight,
const SignaturesT &Signatures);
friend class BalancedPartitioningTest_MoveGain_Test;
};
} // end namespace llvm
#endif // LLVM_SUPPORT_BALANCED_PARTITIONING_H
PK hwFZ����f f Support/LoongArchTargetParser.hnu �[��� //===-- llvm/Support/LoongArchTargetParser.h --------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This header is deprecated in favour of
/// `llvm/TargetParser/LoongArchTargetParser.h`.
///
//===----------------------------------------------------------------------===//
#include "llvm/TargetParser/LoongArchTargetParser.h"
PK hwFZ5-!�J �J Support/AArch64TargetParser.defnu �[��� //===- AARCH64TargetParser.def - AARCH64 target parsing defines ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides defines to build up the AARCH64 target parser's logic.
//
//===----------------------------------------------------------------------===//
// NOTE: NO INCLUDE GUARD DESIRED!
#ifndef AARCH64_ARCH
#define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT)
#endif
AARCH64_ARCH("invalid", INVALID, "", "",
ARMBuildAttrs::CPUArch::v8_A, FK_NONE, AArch64::AEK_NONE)
AARCH64_ARCH("armv8-a", ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8_A,
FK_CRYPTO_NEON_FP_ARMV8,
(AArch64::AEK_CRYPTO | AArch64::AEK_FP | AArch64::AEK_SIMD))
AARCH64_ARCH("armv8.1-a", ARMV8_1A, "8.1-A", "v8.1a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_LSE | AArch64::AEK_RDM))
AARCH64_ARCH("armv8.2-a", ARMV8_2A, "8.2-A", "v8.2a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM))
AARCH64_ARCH("armv8.3-a", ARMV8_3A, "8.3-A", "v8.3a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC))
AARCH64_ARCH("armv8.4-a", ARMV8_4A, "8.4-A", "v8.4a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD))
AARCH64_ARCH("armv8.5-a", ARMV8_5A, "8.5-A", "v8.5a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD))
AARCH64_ARCH("armv8.6-a", ARMV8_6A, "8.6-A", "v8.6a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(AArch64::AEK_CRC | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SM4 | AArch64::AEK_SHA3 | AArch64::AEK_BF16 |
AArch64::AEK_SHA2 | AArch64::AEK_AES | AArch64::AEK_I8MM))
AARCH64_ARCH("armv8.7-a", ARMV8_7A, "8.7-A", "v8.7a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(AArch64::AEK_CRC | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SM4 | AArch64::AEK_SHA3 | AArch64::AEK_BF16 |
AArch64::AEK_SHA2 | AArch64::AEK_AES | AArch64::AEK_I8MM))
AARCH64_ARCH("armv8.8-a", ARMV8_8A, "8.8-A", "v8.8a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(AArch64::AEK_CRC | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SM4 | AArch64::AEK_SHA3 | AArch64::AEK_BF16 |
AArch64::AEK_SHA2 | AArch64::AEK_AES | AArch64::AEK_I8MM))
AARCH64_ARCH("armv9-a", ARMV9A, "9-A", "v9a",
ARMBuildAttrs::CPUArch::v8_A, FK_NEON_FP_ARMV8,
(AArch64::AEK_CRC | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SVE2))
AARCH64_ARCH("armv9.1-a", ARMV9_1A, "9.1-A", "v9.1a",
ARMBuildAttrs::CPUArch::v8_A, FK_NEON_FP_ARMV8,
(AArch64::AEK_CRC | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SVE2))
AARCH64_ARCH("armv9.2-a", ARMV9_2A, "9.2-A", "v9.2a",
ARMBuildAttrs::CPUArch::v8_A, FK_NEON_FP_ARMV8,
(AArch64::AEK_CRC | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SVE2))
AARCH64_ARCH("armv9.3-a", ARMV9_3A, "9.3-A", "v9.3",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(AArch64::AEK_CRC | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SVE2))
// For v8-R, we do not enable crypto and align with GCC that enables a more
// minimal set of optional architecture extensions.
AARCH64_ARCH("armv8-r", ARMV8R, "8-R", "v8r",
ARMBuildAttrs::CPUArch::v8_R, FK_CRYPTO_NEON_FP_ARMV8,
(AArch64::AEK_CRC | AArch64::AEK_RDM | AArch64::AEK_SSBS |
AArch64::AEK_DOTPROD | AArch64::AEK_FP | AArch64::AEK_SIMD |
AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_RAS |
AArch64::AEK_RCPC | AArch64::AEK_SB))
#undef AARCH64_ARCH
#ifndef AARCH64_ARCH_EXT_NAME
#define AARCH64_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE)
#endif
// FIXME: This would be nicer were it tablegen
AARCH64_ARCH_EXT_NAME("invalid", AArch64::AEK_INVALID, nullptr, nullptr)
AARCH64_ARCH_EXT_NAME("none", AArch64::AEK_NONE, nullptr, nullptr)
AARCH64_ARCH_EXT_NAME("crc", AArch64::AEK_CRC, "+crc", "-crc")
AARCH64_ARCH_EXT_NAME("lse", AArch64::AEK_LSE, "+lse", "-lse")
AARCH64_ARCH_EXT_NAME("rdm", AArch64::AEK_RDM, "+rdm", "-rdm")
AARCH64_ARCH_EXT_NAME("crypto", AArch64::AEK_CRYPTO, "+crypto", "-crypto")
AARCH64_ARCH_EXT_NAME("sm4", AArch64::AEK_SM4, "+sm4", "-sm4")
AARCH64_ARCH_EXT_NAME("sha3", AArch64::AEK_SHA3, "+sha3", "-sha3")
AARCH64_ARCH_EXT_NAME("sha2", AArch64::AEK_SHA2, "+sha2", "-sha2")
AARCH64_ARCH_EXT_NAME("aes", AArch64::AEK_AES, "+aes", "-aes")
AARCH64_ARCH_EXT_NAME("dotprod", AArch64::AEK_DOTPROD, "+dotprod", "-dotprod")
AARCH64_ARCH_EXT_NAME("fp", AArch64::AEK_FP, "+fp-armv8", "-fp-armv8")
AARCH64_ARCH_EXT_NAME("simd", AArch64::AEK_SIMD, "+neon", "-neon")
AARCH64_ARCH_EXT_NAME("fp16", AArch64::AEK_FP16, "+fullfp16", "-fullfp16")
AARCH64_ARCH_EXT_NAME("fp16fml", AArch64::AEK_FP16FML, "+fp16fml", "-fp16fml")
AARCH64_ARCH_EXT_NAME("profile", AArch64::AEK_PROFILE, "+spe", "-spe")
AARCH64_ARCH_EXT_NAME("ras", AArch64::AEK_RAS, "+ras", "-ras")
AARCH64_ARCH_EXT_NAME("sve", AArch64::AEK_SVE, "+sve", "-sve")
AARCH64_ARCH_EXT_NAME("sve2", AArch64::AEK_SVE2, "+sve2", "-sve2")
AARCH64_ARCH_EXT_NAME("sve2-aes", AArch64::AEK_SVE2AES, "+sve2-aes", "-sve2-aes")
AARCH64_ARCH_EXT_NAME("sve2-sm4", AArch64::AEK_SVE2SM4, "+sve2-sm4", "-sve2-sm4")
AARCH64_ARCH_EXT_NAME("sve2-sha3", AArch64::AEK_SVE2SHA3, "+sve2-sha3", "-sve2-sha3")
AARCH64_ARCH_EXT_NAME("sve2-bitperm", AArch64::AEK_SVE2BITPERM, "+sve2-bitperm", "-sve2-bitperm")
AARCH64_ARCH_EXT_NAME("rcpc", AArch64::AEK_RCPC, "+rcpc", "-rcpc")
AARCH64_ARCH_EXT_NAME("rng", AArch64::AEK_RAND, "+rand", "-rand")
AARCH64_ARCH_EXT_NAME("memtag", AArch64::AEK_MTE, "+mte", "-mte")
AARCH64_ARCH_EXT_NAME("ssbs", AArch64::AEK_SSBS, "+ssbs", "-ssbs")
AARCH64_ARCH_EXT_NAME("sb", AArch64::AEK_SB, "+sb", "-sb")
AARCH64_ARCH_EXT_NAME("predres", AArch64::AEK_PREDRES, "+predres", "-predres")
AARCH64_ARCH_EXT_NAME("bf16", AArch64::AEK_BF16, "+bf16", "-bf16")
AARCH64_ARCH_EXT_NAME("i8mm", AArch64::AEK_I8MM, "+i8mm", "-i8mm")
AARCH64_ARCH_EXT_NAME("f32mm", AArch64::AEK_F32MM, "+f32mm", "-f32mm")
AARCH64_ARCH_EXT_NAME("f64mm", AArch64::AEK_F64MM, "+f64mm", "-f64mm")
AARCH64_ARCH_EXT_NAME("tme", AArch64::AEK_TME, "+tme", "-tme")
AARCH64_ARCH_EXT_NAME("ls64", AArch64::AEK_LS64, "+ls64", "-ls64")
AARCH64_ARCH_EXT_NAME("brbe", AArch64::AEK_BRBE, "+brbe", "-brbe")
AARCH64_ARCH_EXT_NAME("pauth", AArch64::AEK_PAUTH, "+pauth", "-pauth")
AARCH64_ARCH_EXT_NAME("flagm", AArch64::AEK_FLAGM, "+flagm", "-flagm")
AARCH64_ARCH_EXT_NAME("sme", AArch64::AEK_SME, "+sme", "-sme")
AARCH64_ARCH_EXT_NAME("sme-f64", AArch64::AEK_SMEF64, "+sme-f64", "-sme-f64")
AARCH64_ARCH_EXT_NAME("sme-i64", AArch64::AEK_SMEI64, "+sme-i64", "-sme-i64")
AARCH64_ARCH_EXT_NAME("hbc", AArch64::AEK_HBC, "+hbc", "-hbc")
AARCH64_ARCH_EXT_NAME("mops", AArch64::AEK_MOPS, "+mops", "-mops")
AARCH64_ARCH_EXT_NAME("pmuv3", AArch64::AEK_PERFMON, "+perfmon", "-perfmon")
#undef AARCH64_ARCH_EXT_NAME
#ifndef AARCH64_CPU_NAME
#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)
#endif
AARCH64_CPU_NAME("cortex-a34", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("cortex-a35", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("cortex-a53", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, true,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("cortex-a55", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC))
AARCH64_CPU_NAME("cortex-a510", ARMV9A, FK_NEON_FP_ARMV8, false,
(AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_SB |
AArch64::AEK_PAUTH | AArch64::AEK_MTE | AArch64::AEK_SSBS |
AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM |
AArch64::AEK_FP16FML))
AARCH64_CPU_NAME("cortex-a57", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("cortex-a65", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_DOTPROD | AArch64::AEK_FP16 |
AArch64::AEK_RCPC | AArch64::AEK_SSBS))
AARCH64_CPU_NAME("cortex-a65ae", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_DOTPROD | AArch64::AEK_FP16 |
AArch64::AEK_RCPC | AArch64::AEK_SSBS))
AARCH64_CPU_NAME("cortex-a72", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("cortex-a73", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("cortex-a75", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC))
AARCH64_CPU_NAME("cortex-a76", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
AArch64::AEK_SSBS))
AARCH64_CPU_NAME("cortex-a76ae", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
AArch64::AEK_SSBS))
AARCH64_CPU_NAME("cortex-a77", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SSBS))
AARCH64_CPU_NAME("cortex-a78", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
AArch64::AEK_SSBS | AArch64::AEK_PROFILE))
AARCH64_CPU_NAME("cortex-a78c", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
AArch64::AEK_SSBS | AArch64::AEK_PROFILE | AArch64::AEK_FLAGM |
AArch64::AEK_PAUTH | AArch64::AEK_FP16FML))
AARCH64_CPU_NAME("cortex-a710", ARMV9A, FK_NEON_FP_ARMV8, false,
(AArch64::AEK_MTE | AArch64::AEK_PAUTH | AArch64::AEK_FLAGM |
AArch64::AEK_SB | AArch64::AEK_I8MM | AArch64::AEK_FP16FML |
AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM |
AArch64::AEK_BF16))
AARCH64_CPU_NAME("cortex-r82", ARMV8R, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_LSE))
AARCH64_CPU_NAME("cortex-x1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
AArch64::AEK_SSBS | AArch64::AEK_PROFILE))
AARCH64_CPU_NAME("cortex-x1c", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_DOTPROD | AArch64::AEK_RCPC |
AArch64::AEK_SSBS | AArch64::AEK_PAUTH | AArch64::AEK_PROFILE))
AARCH64_CPU_NAME("cortex-x2", ARMV9A, FK_NEON_FP_ARMV8, false,
(AArch64::AEK_MTE | AArch64::AEK_BF16 | AArch64::AEK_I8MM |
AArch64::AEK_PAUTH | AArch64::AEK_SSBS | AArch64::AEK_SB |
AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM |
AArch64::AEK_FP16FML))
AARCH64_CPU_NAME("neoverse-e1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_DOTPROD | AArch64::AEK_FP16 |
AArch64::AEK_RCPC | AArch64::AEK_SSBS))
AARCH64_CPU_NAME("neoverse-n1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_DOTPROD | AArch64::AEK_FP16 |
AArch64::AEK_PROFILE | AArch64::AEK_RCPC |
AArch64::AEK_SSBS))
AARCH64_CPU_NAME("neoverse-n2", ARMV8_5A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_BF16 | AArch64::AEK_DOTPROD | AArch64::AEK_FP16 |
AArch64::AEK_I8MM | AArch64::AEK_MTE |
AArch64::AEK_SB | AArch64::AEK_SSBS |
AArch64::AEK_SVE | AArch64::AEK_SVE2 | AArch64::AEK_SVE2BITPERM))
AARCH64_CPU_NAME("neoverse-512tvb", ARMV8_4A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_SVE | AArch64::AEK_SSBS |
AArch64::AEK_FP16 | AArch64::AEK_BF16 |
AArch64::AEK_DOTPROD | AArch64::AEK_PROFILE |
AArch64::AEK_RAND | AArch64::AEK_FP16FML | AArch64::AEK_I8MM))
AARCH64_CPU_NAME("neoverse-v1", ARMV8_4A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_SVE | AArch64::AEK_SSBS |
AArch64::AEK_FP16 | AArch64::AEK_BF16 |
AArch64::AEK_DOTPROD | AArch64::AEK_PROFILE |
AArch64::AEK_RAND | AArch64::AEK_FP16FML | AArch64::AEK_I8MM))
AARCH64_CPU_NAME("cyclone", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_NONE))
AARCH64_CPU_NAME("apple-a7", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_NONE))
AARCH64_CPU_NAME("apple-a8", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_NONE))
AARCH64_CPU_NAME("apple-a9", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_NONE))
AARCH64_CPU_NAME("apple-a10", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC | AArch64::AEK_RDM))
AARCH64_CPU_NAME("apple-a11", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16))
AARCH64_CPU_NAME("apple-a12", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16))
AARCH64_CPU_NAME("apple-a13", ARMV8_4A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3))
AARCH64_CPU_NAME("apple-a14", ARMV8_5A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3))
AARCH64_CPU_NAME("apple-m1", ARMV8_5A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SHA3))
AARCH64_CPU_NAME("apple-s4", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16))
AARCH64_CPU_NAME("apple-s5", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16))
AARCH64_CPU_NAME("exynos-m3", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("exynos-m4", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_DOTPROD | AArch64::AEK_FP16))
AARCH64_CPU_NAME("exynos-m5", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_DOTPROD | AArch64::AEK_FP16))
AARCH64_CPU_NAME("falkor", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC | AArch64::AEK_RDM))
AARCH64_CPU_NAME("saphira", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_PROFILE))
AARCH64_CPU_NAME("kryo", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("thunderx2t99", ARMV8_1A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_NONE))
AARCH64_CPU_NAME("thunderx3t110", ARMV8_3A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_NONE))
AARCH64_CPU_NAME("thunderx", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("thunderxt88", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("thunderxt81", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("thunderxt83", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
AARCH64_CPU_NAME("tsv110", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_DOTPROD |
AArch64::AEK_FP16 | AArch64::AEK_FP16FML |
AArch64::AEK_PROFILE))
AARCH64_CPU_NAME("a64fx", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_SVE))
AARCH64_CPU_NAME("carmel", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
AArch64::AEK_FP16)
AARCH64_CPU_NAME("ampere1", ARMV8_6A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_FP16 | AArch64::AEK_SB | AArch64::AEK_SSBS))
// Invalid CPU
AARCH64_CPU_NAME("invalid", INVALID, FK_INVALID, true, AArch64::AEK_INVALID)
#undef AARCH64_CPU_NAME
PK hwFZԲ�Q� � Support/BLAKE3.hnu �[��� //==- BLAKE3.h - BLAKE3 C++ wrapper for LLVM ---------------------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This is a C++ wrapper of the BLAKE3 C interface.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_BLAKE3_H
#define LLVM_SUPPORT_BLAKE3_H
#include "llvm-c/blake3.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
namespace llvm {
/// The constant \p LLVM_BLAKE3_OUT_LEN provides the default output length,
/// 32 bytes, which is recommended for most callers.
///
/// Outputs shorter than the default length of 32 bytes (256 bits) provide
/// less security. An N-bit BLAKE3 output is intended to provide N bits of
/// first and second preimage resistance and N/2 bits of collision
/// resistance, for any N up to 256. Longer outputs don't provide any
/// additional security.
///
/// Shorter BLAKE3 outputs are prefixes of longer ones. Explicitly
/// requesting a short output is equivalent to truncating the default-length
/// output.
template <size_t NumBytes = LLVM_BLAKE3_OUT_LEN>
using BLAKE3Result = std::array<uint8_t, NumBytes>;
/// A class that wraps the BLAKE3 algorithm.
class BLAKE3 {
public:
BLAKE3() { init(); }
/// Reinitialize the internal state
void init() { llvm_blake3_hasher_init(&Hasher); }
/// Digest more data.
void update(ArrayRef<uint8_t> Data) {
llvm_blake3_hasher_update(&Hasher, Data.data(), Data.size());
}
/// Digest more data.
void update(StringRef Str) {
llvm_blake3_hasher_update(&Hasher, Str.data(), Str.size());
}
/// Finalize the hasher and put the result in \p Result.
/// This doesn't modify the hasher itself, and it's possible to finalize again
/// after adding more input.
template <size_t NumBytes = LLVM_BLAKE3_OUT_LEN>
void final(BLAKE3Result<NumBytes> &Result) {
llvm_blake3_hasher_finalize(&Hasher, Result.data(), Result.size());
}
/// Finalize the hasher and return an output of any length, given in bytes.
/// This doesn't modify the hasher itself, and it's possible to finalize again
/// after adding more input.
template <size_t NumBytes = LLVM_BLAKE3_OUT_LEN>
BLAKE3Result<NumBytes> final() {
BLAKE3Result<NumBytes> Result;
llvm_blake3_hasher_finalize(&Hasher, Result.data(), Result.size());
return Result;
}
/// Return the current output for the digested data since the last call to
/// init().
///
/// Other hash functions distinguish between \p result() and \p final(), with
/// \p result() allowing more calls into \p update(), but there's no
// difference for the BLAKE3 hash function.
template <size_t NumBytes = LLVM_BLAKE3_OUT_LEN>
BLAKE3Result<NumBytes> result() {
return final<NumBytes>();
}
/// Returns a BLAKE3 hash for the given data.
template <size_t NumBytes = LLVM_BLAKE3_OUT_LEN>
static BLAKE3Result<NumBytes> hash(ArrayRef<uint8_t> Data) {
BLAKE3 Hasher;
Hasher.update(Data);
return Hasher.final<NumBytes>();
}
private:
llvm_blake3_hasher Hasher;
};
/// Like \p BLAKE3 but using a class-level template parameter for specifying the
/// hash size of the \p final() and \p result() functions.
///
/// This is useful for using BLAKE3 as the hasher type for \p HashBuilder with
/// non-default hash sizes.
template <size_t NumBytes> class TruncatedBLAKE3 : public BLAKE3 {
public:
/// Finalize the hasher and put the result in \p Result.
/// This doesn't modify the hasher itself, and it's possible to finalize again
/// after adding more input.
void final(BLAKE3Result<NumBytes> &Result) { return BLAKE3::final(Result); }
/// Finalize the hasher and return an output of any length, given in bytes.
/// This doesn't modify the hasher itself, and it's possible to finalize again
/// after adding more input.
BLAKE3Result<NumBytes> final() { return BLAKE3::final<NumBytes>(); }
/// Return the current output for the digested data since the last call to
/// init().
///
/// Other hash functions distinguish between \p result() and \p final(), with
/// \p result() allowing more calls into \p update(), but there's no
// difference for the BLAKE3 hash function.
BLAKE3Result<NumBytes> result() { return BLAKE3::result<NumBytes>(); }
};
} // namespace llvm
#endif
PK hwFZ�s�> > Support/FormatVariadicDetails.hnu �[��� //===- FormatVariadicDetails.h - Helpers for FormatVariadic.h ----*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_FORMATVARIADICDETAILS_H
#define LLVM_SUPPORT_FORMATVARIADICDETAILS_H
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/raw_ostream.h"
#include <type_traits>
namespace llvm {
template <typename T, typename Enable = void> struct format_provider {};
class Error;
namespace detail {
class format_adapter {
virtual void anchor();
protected:
virtual ~format_adapter() = default;
public:
virtual void format(raw_ostream &S, StringRef Options) = 0;
};
template <typename T> class provider_format_adapter : public format_adapter {
T Item;
public:
explicit provider_format_adapter(T &&Item) : Item(std::forward<T>(Item)) {}
void format(llvm::raw_ostream &S, StringRef Options) override {
format_provider<std::decay_t<T>>::format(Item, S, Options);
}
};
template <typename T>
class stream_operator_format_adapter : public format_adapter {
T Item;
public:
explicit stream_operator_format_adapter(T &&Item)
: Item(std::forward<T>(Item)) {}
void format(llvm::raw_ostream &S, StringRef) override { S << Item; }
};
template <typename T> class missing_format_adapter;
// Test if format_provider<T> is defined on T and contains a member function
// with the signature:
// static void format(const T&, raw_stream &, StringRef);
//
template <class T> class has_FormatProvider {
public:
using Decayed = std::decay_t<T>;
typedef void (*Signature_format)(const Decayed &, llvm::raw_ostream &,
StringRef);
template <typename U>
static char test(SameType<Signature_format, &U::format> *);
template <typename U> static double test(...);
static bool const value =
(sizeof(test<llvm::format_provider<Decayed>>(nullptr)) == 1);
};
// Test if raw_ostream& << T -> raw_ostream& is findable via ADL.
template <class T> class has_StreamOperator {
public:
using ConstRefT = const std::decay_t<T> &;
template <typename U>
static char test(std::enable_if_t<
std::is_same_v<decltype(std::declval<llvm::raw_ostream &>()
<< std::declval<U>()),
llvm::raw_ostream &>,
int *>);
template <typename U> static double test(...);
static bool const value = (sizeof(test<ConstRefT>(nullptr)) == 1);
};
// Simple template that decides whether a type T should use the member-function
// based format() invocation.
template <typename T>
struct uses_format_member
: public std::integral_constant<
bool, std::is_base_of_v<format_adapter, std::remove_reference_t<T>>> {
};
// Simple template that decides whether a type T should use the format_provider
// based format() invocation. The member function takes priority, so this test
// will only be true if there is not ALSO a format member.
template <typename T>
struct uses_format_provider
: public std::integral_constant<
bool, !uses_format_member<T>::value && has_FormatProvider<T>::value> {
};
// Simple template that decides whether a type T should use the operator<<
// based format() invocation. This takes last priority.
template <typename T>
struct uses_stream_operator
: public std::integral_constant<bool, !uses_format_member<T>::value &&
!uses_format_provider<T>::value &&
has_StreamOperator<T>::value> {};
// Simple template that decides whether a type T has neither a member-function
// nor format_provider based implementation that it can use. Mostly used so
// that the compiler spits out a nice diagnostic when a type with no format
// implementation can be located.
template <typename T>
struct uses_missing_provider
: public std::integral_constant<bool, !uses_format_member<T>::value &&
!uses_format_provider<T>::value &&
!uses_stream_operator<T>::value> {
};
template <typename T>
std::enable_if_t<uses_format_member<T>::value, T>
build_format_adapter(T &&Item) {
return std::forward<T>(Item);
}
template <typename T>
std::enable_if_t<uses_format_provider<T>::value, provider_format_adapter<T>>
build_format_adapter(T &&Item) {
return provider_format_adapter<T>(std::forward<T>(Item));
}
template <typename T>
std::enable_if_t<uses_stream_operator<T>::value,
stream_operator_format_adapter<T>>
build_format_adapter(T &&Item) {
// If the caller passed an Error by value, then stream_operator_format_adapter
// would be responsible for consuming it.
// Make the caller opt into this by calling fmt_consume().
static_assert(
!std::is_same_v<llvm::Error, std::remove_cv_t<T>>,
"llvm::Error-by-value must be wrapped in fmt_consume() for formatv");
return stream_operator_format_adapter<T>(std::forward<T>(Item));
}
template <typename T>
std::enable_if_t<uses_missing_provider<T>::value, missing_format_adapter<T>>
build_format_adapter(T &&) {
return missing_format_adapter<T>();
}
}
}
#endif
PK hwFZg}�] ] Support/ARMEHABI.hnu �[��� //===--- ARMEHABI.h - ARM Exception Handling ABI ----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the constants for the ARM unwind opcodes and exception
// handling table entry kinds.
//
// The enumerations and constants in this file reflect the ARM EHABI
// Specification as published by ARM.
//
// Exception Handling ABI for the ARM Architecture r2.09 - November 30, 2012
//
// http://infocenter.arm.com/help/topic/com.arm.doc.ihi0038a/IHI0038A_ehabi.pdf
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ARMEHABI_H
#define LLVM_SUPPORT_ARMEHABI_H
namespace llvm {
namespace ARM {
namespace EHABI {
/// ARM exception handling table entry kinds
enum EHTEntryKind {
EHT_GENERIC = 0x00,
EHT_COMPACT = 0x80
};
enum {
/// Special entry for the function never unwind
EXIDX_CANTUNWIND = 0x1
};
/// ARM-defined frame unwinding opcodes
enum UnwindOpcodes {
// Format: 00xxxxxx
// Purpose: vsp = vsp + ((x << 2) + 4)
UNWIND_OPCODE_INC_VSP = 0x00,
// Format: 01xxxxxx
// Purpose: vsp = vsp - ((x << 2) + 4)
UNWIND_OPCODE_DEC_VSP = 0x40,
// Format: 10000000 00000000
// Purpose: refuse to unwind
UNWIND_OPCODE_REFUSE = 0x8000,
// Format: 1000xxxx xxxxxxxx
// Purpose: pop r[15:12], r[11:4]
// Constraint: x != 0
UNWIND_OPCODE_POP_REG_MASK_R4 = 0x8000,
// Format: 1001xxxx
// Purpose: vsp = r[x]
// Constraint: x != 13 && x != 15
UNWIND_OPCODE_SET_VSP = 0x90,
// Format: 10100xxx
// Purpose: pop r[(4+x):4]
UNWIND_OPCODE_POP_REG_RANGE_R4 = 0xa0,
// Format: 10101xxx
// Purpose: pop r14, r[(4+x):4]
UNWIND_OPCODE_POP_REG_RANGE_R4_R14 = 0xa8,
// Format: 10110000
// Purpose: finish
UNWIND_OPCODE_FINISH = 0xb0,
// Format: 10110100
// Purpose: Pop Return Address Authetication Code
UNWIND_OPCODE_POP_RA_AUTH_CODE = 0xb4,
// Format: 10110001 0000xxxx
// Purpose: pop r[3:0]
// Constraint: x != 0
UNWIND_OPCODE_POP_REG_MASK = 0xb100,
// Format: 10110010 x(uleb128)
// Purpose: vsp = vsp + ((x << 2) + 0x204)
UNWIND_OPCODE_INC_VSP_ULEB128 = 0xb2,
// Format: 10110011 xxxxyyyy
// Purpose: pop d[(x+y):x]
UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDX = 0xb300,
// Format: 10111xxx
// Purpose: pop d[(8+x):8]
UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDX_D8 = 0xb8,
// Format: 11000xxx
// Purpose: pop wR[(10+x):10]
UNWIND_OPCODE_POP_WIRELESS_MMX_REG_RANGE_WR10 = 0xc0,
// Format: 11000110 xxxxyyyy
// Purpose: pop wR[(x+y):x]
UNWIND_OPCODE_POP_WIRELESS_MMX_REG_RANGE = 0xc600,
// Format: 11000111 0000xxxx
// Purpose: pop wCGR[3:0]
// Constraint: x != 0
UNWIND_OPCODE_POP_WIRELESS_MMX_REG_MASK = 0xc700,
// Format: 11001000 xxxxyyyy
// Purpose: pop d[(16+x+y):(16+x)]
UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDD_D16 = 0xc800,
// Format: 11001001 xxxxyyyy
// Purpose: pop d[(x+y):x]
UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDD = 0xc900,
// Format: 11010xxx
// Purpose: pop d[(8+x):8]
UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDD_D8 = 0xd0
};
/// ARM-defined Personality Routine Index
enum PersonalityRoutineIndex {
// To make the exception handling table become more compact, ARM defined
// several personality routines in EHABI. There are 3 different
// personality routines in ARM EHABI currently. It is possible to have 16
// pre-defined personality routines at most.
AEABI_UNWIND_CPP_PR0 = 0,
AEABI_UNWIND_CPP_PR1 = 1,
AEABI_UNWIND_CPP_PR2 = 2,
NUM_PERSONALITY_INDEX
};
}
}
}
#endif
PK hwFZ����' �' Support/Parallel.hnu �[��� //===- llvm/Support/Parallel.h - Parallel algorithms ----------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_PARALLEL_H
#define LLVM_SUPPORT_PARALLEL_H
#include "llvm/ADT/STLExtras.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Threading.h"
#include <algorithm>
#include <condition_variable>
#include <functional>
#include <mutex>
namespace llvm {
namespace parallel {
// Strategy for the default executor used by the parallel routines provided by
// this file. It defaults to using all hardware threads and should be
// initialized before the first use of parallel routines.
extern ThreadPoolStrategy strategy;
#if LLVM_ENABLE_THREADS
#define GET_THREAD_INDEX_IMPL \
if (parallel::strategy.ThreadsRequested == 1) \
return 0; \
assert((threadIndex != UINT_MAX) && \
"getThreadIndex() must be called from a thread created by " \
"ThreadPoolExecutor"); \
return threadIndex;
#ifdef _WIN32
// Direct access to thread_local variables from a different DLL isn't
// possible with Windows Native TLS.
unsigned getThreadIndex();
#else
// Don't access this directly, use the getThreadIndex wrapper.
extern thread_local unsigned threadIndex;
inline unsigned getThreadIndex() { GET_THREAD_INDEX_IMPL; }
#endif
size_t getThreadCount();
#else
inline unsigned getThreadIndex() { return 0; }
inline size_t getThreadCount() { return 1; }
#endif
namespace detail {
class Latch {
uint32_t Count;
mutable std::mutex Mutex;
mutable std::condition_variable Cond;
public:
explicit Latch(uint32_t Count = 0) : Count(Count) {}
~Latch() {
// Ensure at least that sync() was called.
assert(Count == 0);
}
void inc() {
std::lock_guard<std::mutex> lock(Mutex);
++Count;
}
void dec() {
std::lock_guard<std::mutex> lock(Mutex);
if (--Count == 0)
Cond.notify_all();
}
void sync() const {
std::unique_lock<std::mutex> lock(Mutex);
Cond.wait(lock, [&] { return Count == 0; });
}
};
} // namespace detail
class TaskGroup {
detail::Latch L;
bool Parallel;
public:
TaskGroup();
~TaskGroup();
// Spawn a task, but does not wait for it to finish.
// Tasks marked with \p Sequential will be executed
// exactly in the order which they were spawned.
// Note: Sequential tasks may be executed on different
// threads, but strictly in sequential order.
void spawn(std::function<void()> f, bool Sequential = false);
void sync() const { L.sync(); }
bool isParallel() const { return Parallel; }
};
namespace detail {
#if LLVM_ENABLE_THREADS
const ptrdiff_t MinParallelSize = 1024;
/// Inclusive median.
template <class RandomAccessIterator, class Comparator>
RandomAccessIterator medianOf3(RandomAccessIterator Start,
RandomAccessIterator End,
const Comparator &Comp) {
RandomAccessIterator Mid = Start + (std::distance(Start, End) / 2);
return Comp(*Start, *(End - 1))
? (Comp(*Mid, *(End - 1)) ? (Comp(*Start, *Mid) ? Mid : Start)
: End - 1)
: (Comp(*Mid, *Start) ? (Comp(*(End - 1), *Mid) ? Mid : End - 1)
: Start);
}
template <class RandomAccessIterator, class Comparator>
void parallel_quick_sort(RandomAccessIterator Start, RandomAccessIterator End,
const Comparator &Comp, TaskGroup &TG, size_t Depth) {
// Do a sequential sort for small inputs.
if (std::distance(Start, End) < detail::MinParallelSize || Depth == 0) {
llvm::sort(Start, End, Comp);
return;
}
// Partition.
auto Pivot = medianOf3(Start, End, Comp);
// Move Pivot to End.
std::swap(*(End - 1), *Pivot);
Pivot = std::partition(Start, End - 1, [&Comp, End](decltype(*Start) V) {
return Comp(V, *(End - 1));
});
// Move Pivot to middle of partition.
std::swap(*Pivot, *(End - 1));
// Recurse.
TG.spawn([=, &Comp, &TG] {
parallel_quick_sort(Start, Pivot, Comp, TG, Depth - 1);
});
parallel_quick_sort(Pivot + 1, End, Comp, TG, Depth - 1);
}
template <class RandomAccessIterator, class Comparator>
void parallel_sort(RandomAccessIterator Start, RandomAccessIterator End,
const Comparator &Comp) {
TaskGroup TG;
parallel_quick_sort(Start, End, Comp, TG,
llvm::Log2_64(std::distance(Start, End)) + 1);
}
// TaskGroup has a relatively high overhead, so we want to reduce
// the number of spawn() calls. We'll create up to 1024 tasks here.
// (Note that 1024 is an arbitrary number. This code probably needs
// improving to take the number of available cores into account.)
enum { MaxTasksPerGroup = 1024 };
template <class IterTy, class ResultTy, class ReduceFuncTy,
class TransformFuncTy>
ResultTy parallel_transform_reduce(IterTy Begin, IterTy End, ResultTy Init,
ReduceFuncTy Reduce,
TransformFuncTy Transform) {
// Limit the number of tasks to MaxTasksPerGroup to limit job scheduling
// overhead on large inputs.
size_t NumInputs = std::distance(Begin, End);
if (NumInputs == 0)
return std::move(Init);
size_t NumTasks = std::min(static_cast<size_t>(MaxTasksPerGroup), NumInputs);
std::vector<ResultTy> Results(NumTasks, Init);
{
// Each task processes either TaskSize or TaskSize+1 inputs. Any inputs
// remaining after dividing them equally amongst tasks are distributed as
// one extra input over the first tasks.
TaskGroup TG;
size_t TaskSize = NumInputs / NumTasks;
size_t RemainingInputs = NumInputs % NumTasks;
IterTy TBegin = Begin;
for (size_t TaskId = 0; TaskId < NumTasks; ++TaskId) {
IterTy TEnd = TBegin + TaskSize + (TaskId < RemainingInputs ? 1 : 0);
TG.spawn([=, &Transform, &Reduce, &Results] {
// Reduce the result of transformation eagerly within each task.
ResultTy R = Init;
for (IterTy It = TBegin; It != TEnd; ++It)
R = Reduce(R, Transform(*It));
Results[TaskId] = R;
});
TBegin = TEnd;
}
assert(TBegin == End);
}
// Do a final reduction. There are at most 1024 tasks, so this only adds
// constant single-threaded overhead for large inputs. Hopefully most
// reductions are cheaper than the transformation.
ResultTy FinalResult = std::move(Results.front());
for (ResultTy &PartialResult :
MutableArrayRef(Results.data() + 1, Results.size() - 1))
FinalResult = Reduce(FinalResult, std::move(PartialResult));
return std::move(FinalResult);
}
#endif
} // namespace detail
} // namespace parallel
template <class RandomAccessIterator,
class Comparator = std::less<
typename std::iterator_traits<RandomAccessIterator>::value_type>>
void parallelSort(RandomAccessIterator Start, RandomAccessIterator End,
const Comparator &Comp = Comparator()) {
#if LLVM_ENABLE_THREADS
if (parallel::strategy.ThreadsRequested != 1) {
parallel::detail::parallel_sort(Start, End, Comp);
return;
}
#endif
llvm::sort(Start, End, Comp);
}
void parallelFor(size_t Begin, size_t End, function_ref<void(size_t)> Fn);
template <class IterTy, class FuncTy>
void parallelForEach(IterTy Begin, IterTy End, FuncTy Fn) {
parallelFor(0, End - Begin, [&](size_t I) { Fn(Begin[I]); });
}
template <class IterTy, class ResultTy, class ReduceFuncTy,
class TransformFuncTy>
ResultTy parallelTransformReduce(IterTy Begin, IterTy End, ResultTy Init,
ReduceFuncTy Reduce,
TransformFuncTy Transform) {
#if LLVM_ENABLE_THREADS
if (parallel::strategy.ThreadsRequested != 1) {
return parallel::detail::parallel_transform_reduce(Begin, End, Init, Reduce,
Transform);
}
#endif
for (IterTy I = Begin; I != End; ++I)
Init = Reduce(std::move(Init), Transform(*I));
return std::move(Init);
}
// Range wrappers.
template <class RangeTy,
class Comparator = std::less<decltype(*std::begin(RangeTy()))>>
void parallelSort(RangeTy &&R, const Comparator &Comp = Comparator()) {
parallelSort(std::begin(R), std::end(R), Comp);
}
template <class RangeTy, class FuncTy>
void parallelForEach(RangeTy &&R, FuncTy Fn) {
parallelForEach(std::begin(R), std::end(R), Fn);
}
template <class RangeTy, class ResultTy, class ReduceFuncTy,
class TransformFuncTy>
ResultTy parallelTransformReduce(RangeTy &&R, ResultTy Init,
ReduceFuncTy Reduce,
TransformFuncTy Transform) {
return parallelTransformReduce(std::begin(R), std::end(R), Init, Reduce,
Transform);
}
// Parallel for-each, but with error handling.
template <class RangeTy, class FuncTy>
Error parallelForEachError(RangeTy &&R, FuncTy Fn) {
// The transform_reduce algorithm requires that the initial value be copyable.
// Error objects are uncopyable. We only need to copy initial success values,
// so work around this mismatch via the C API. The C API represents success
// values with a null pointer. The joinErrors discards null values and joins
// multiple errors into an ErrorList.
return unwrap(parallelTransformReduce(
std::begin(R), std::end(R), wrap(Error::success()),
[](LLVMErrorRef Lhs, LLVMErrorRef Rhs) {
return wrap(joinErrors(unwrap(Lhs), unwrap(Rhs)));
},
[&Fn](auto &&V) { return wrap(Fn(V)); }));
}
} // namespace llvm
#endif // LLVM_SUPPORT_PARALLEL_H
PK hwFZ}ƄZ Z Support/ARMTargetParser.hnu �[��� //===-- llvm/Support/ARMTargetParser.h --------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This header is deprecated in favour of
/// `llvm/TargetParser/ARMTargetParser.h`.
///
//===----------------------------------------------------------------------===//
#include "llvm/TargetParser/ARMTargetParser.h"
PK hwFZv�)�� � Support/Errno.hnu �[��� //===- llvm/Support/Errno.h - Portable+convenient errno handling -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares some portable and convenient functions to deal with errno.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ERRNO_H
#define LLVM_SUPPORT_ERRNO_H
#include <cerrno>
#include <string>
namespace llvm {
namespace sys {
/// Returns a string representation of the errno value, using whatever
/// thread-safe variant of strerror() is available. Be sure to call this
/// immediately after the function that set errno, or errno may have been
/// overwritten by an intervening call.
std::string StrError();
/// Like the no-argument version above, but uses \p errnum instead of errno.
std::string StrError(int errnum);
template <typename FailT, typename Fun, typename... Args>
inline decltype(auto) RetryAfterSignal(const FailT &Fail, const Fun &F,
const Args &... As) {
decltype(F(As...)) Res;
do {
errno = 0;
Res = F(As...);
} while (Res == Fail && errno == EINTR);
return Res;
}
} // namespace sys
} // namespace llvm
#endif // LLVM_SUPPORT_ERRNO_H
PK hwFZe��+ + Support/Memory.hnu �[��� //===- llvm/Support/Memory.h - Memory Support -------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the llvm::sys::Memory class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_MEMORY_H
#define LLVM_SUPPORT_MEMORY_H
#include "llvm/Support/DataTypes.h"
#include <system_error>
namespace llvm {
// Forward declare raw_ostream: it is used for debug dumping below.
class raw_ostream;
namespace sys {
/// This class encapsulates the notion of a memory block which has an address
/// and a size. It is used by the Memory class (a friend) as the result of
/// various memory allocation operations.
/// @see Memory
/// Memory block abstraction.
class MemoryBlock {
public:
MemoryBlock() : Address(nullptr), AllocatedSize(0) {}
MemoryBlock(void *addr, size_t allocatedSize)
: Address(addr), AllocatedSize(allocatedSize) {}
void *base() const { return Address; }
/// The size as it was allocated. This is always greater or equal to the
/// size that was originally requested.
size_t allocatedSize() const { return AllocatedSize; }
private:
void *Address; ///< Address of first byte of memory area
size_t AllocatedSize; ///< Size, in bytes of the memory area
unsigned Flags = 0;
friend class Memory;
};
/// This class provides various memory handling functions that manipulate
/// MemoryBlock instances.
/// @since 1.4
/// An abstraction for memory operations.
class Memory {
public:
enum ProtectionFlags {
MF_READ = 0x1000000,
MF_WRITE = 0x2000000,
MF_EXEC = 0x4000000,
MF_RWE_MASK = 0x7000000,
/// The \p MF_HUGE_HINT flag is used to indicate that the request for
/// a memory block should be satisfied with large pages if possible.
/// This is only a hint and small pages will be used as fallback.
///
/// The presence or absence of this flag in the returned memory block
/// is (at least currently) *not* a reliable indicator that the memory
/// block will use or will not use large pages. On some systems a request
/// without this flag can be backed by large pages without this flag being
/// set, and on some other systems a request with this flag can fallback
/// to small pages without this flag being cleared.
MF_HUGE_HINT = 0x0000001
};
/// This method allocates a block of memory that is suitable for loading
/// dynamically generated code (e.g. JIT). An attempt to allocate
/// \p NumBytes bytes of virtual memory is made.
/// \p NearBlock may point to an existing allocation in which case
/// an attempt is made to allocate more memory near the existing block.
/// The actual allocated address is not guaranteed to be near the requested
/// address.
/// \p Flags is used to set the initial protection flags for the block
/// of the memory.
/// \p EC [out] returns an object describing any error that occurs.
///
/// This method may allocate more than the number of bytes requested. The
/// actual number of bytes allocated is indicated in the returned
/// MemoryBlock.
///
/// The start of the allocated block must be aligned with the
/// system allocation granularity (64K on Windows, page size on Linux).
/// If the address following \p NearBlock is not so aligned, it will be
/// rounded up to the next allocation granularity boundary.
///
/// \r a non-null MemoryBlock if the function was successful,
/// otherwise a null MemoryBlock is with \p EC describing the error.
///
/// Allocate mapped memory.
static MemoryBlock allocateMappedMemory(size_t NumBytes,
const MemoryBlock *const NearBlock,
unsigned Flags,
std::error_code &EC);
/// This method releases a block of memory that was allocated with the
/// allocateMappedMemory method. It should not be used to release any
/// memory block allocated any other way.
/// \p Block describes the memory to be released.
///
/// \r error_success if the function was successful, or an error_code
/// describing the failure if an error occurred.
///
/// Release mapped memory.
static std::error_code releaseMappedMemory(MemoryBlock &Block);
/// This method sets the protection flags for a block of memory to the
/// state specified by /p Flags. The behavior is not specified if the
/// memory was not allocated using the allocateMappedMemory method.
/// \p Block describes the memory block to be protected.
/// \p Flags specifies the new protection state to be assigned to the block.
///
/// If \p Flags is MF_WRITE, the actual behavior varies
/// with the operating system (i.e. MF_READ | MF_WRITE on Windows) and the
/// target architecture (i.e. MF_WRITE -> MF_READ | MF_WRITE on i386).
///
/// \r error_success if the function was successful, or an error_code
/// describing the failure if an error occurred.
///
/// Set memory protection state.
static std::error_code protectMappedMemory(const MemoryBlock &Block,
unsigned Flags);
/// InvalidateInstructionCache - Before the JIT can run a block of code
/// that has been emitted it must invalidate the instruction cache on some
/// platforms.
static void InvalidateInstructionCache(const void *Addr, size_t Len);
};
/// Owning version of MemoryBlock.
class OwningMemoryBlock {
public:
OwningMemoryBlock() = default;
explicit OwningMemoryBlock(MemoryBlock M) : M(M) {}
OwningMemoryBlock(OwningMemoryBlock &&Other) {
M = Other.M;
Other.M = MemoryBlock();
}
OwningMemoryBlock& operator=(OwningMemoryBlock &&Other) {
M = Other.M;
Other.M = MemoryBlock();
return *this;
}
~OwningMemoryBlock() {
if (M.base())
Memory::releaseMappedMemory(M);
}
void *base() const { return M.base(); }
/// The size as it was allocated. This is always greater or equal to the
/// size that was originally requested.
size_t allocatedSize() const { return M.allocatedSize(); }
MemoryBlock getMemoryBlock() const { return M; }
std::error_code release() {
std::error_code EC;
if (M.base()) {
EC = Memory::releaseMappedMemory(M);
M = MemoryBlock();
}
return EC;
}
private:
MemoryBlock M;
};
#ifndef NDEBUG
/// Debugging output for Memory::ProtectionFlags.
raw_ostream &operator<<(raw_ostream &OS, const Memory::ProtectionFlags &PF);
/// Debugging output for MemoryBlock.
raw_ostream &operator<<(raw_ostream &OS, const MemoryBlock &MB);
#endif // ifndef NDEBUG
} // end namespace sys
} // end namespace llvm
#endif
PK hwFZ�\3�}
}
Support/MSVCErrorWorkarounds.hnu �[��� //===--- MSVCErrorWorkarounds.h - Enable future<Error> in MSVC --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// MSVC's promise/future implementation requires types to be default
// constructible, so this header provides analogues of Error an Expected
// that are default constructed in a safely destructible state.
//
// FIXME: Kill off this header and migrate all users to Error/Expected once we
// move to MSVC versions that support non-default-constructible types.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_MSVCERRORWORKAROUNDS_H
#define LLVM_SUPPORT_MSVCERRORWORKAROUNDS_H
#include "llvm/Support/Error.h"
namespace llvm {
// A default-constructible llvm::Error that is suitable for use with MSVC's
// std::future implementation which requires default constructible types.
class MSVCPError : public Error {
public:
MSVCPError() { (void)!!*this; }
MSVCPError(MSVCPError &&Other) : Error(std::move(Other)) {}
MSVCPError &operator=(MSVCPError Other) {
Error::operator=(std::move(Other));
return *this;
}
MSVCPError(Error Err) : Error(std::move(Err)) {}
};
// A default-constructible llvm::Expected that is suitable for use with MSVC's
// std::future implementation, which requires default constructible types.
template <typename T> class MSVCPExpected : public Expected<T> {
public:
MSVCPExpected()
: Expected<T>(make_error<StringError>("", inconvertibleErrorCode())) {
consumeError(this->takeError());
}
MSVCPExpected(MSVCPExpected &&Other) : Expected<T>(std::move(Other)) {}
MSVCPExpected &operator=(MSVCPExpected &&Other) {
Expected<T>::operator=(std::move(Other));
return *this;
}
MSVCPExpected(Error Err) : Expected<T>(std::move(Err)) {}
template <typename OtherT>
MSVCPExpected(
OtherT &&Val,
std::enable_if_t<std::is_convertible<OtherT, T>::value> * = nullptr)
: Expected<T>(std::move(Val)) {}
template <class OtherT>
MSVCPExpected(
Expected<OtherT> &&Other,
std::enable_if_t<std::is_convertible<OtherT, T>::value> * = nullptr)
: Expected<T>(std::move(Other)) {}
template <class OtherT>
explicit MSVCPExpected(
Expected<OtherT> &&Other,
std::enable_if_t<!std::is_convertible<OtherT, T>::value> * = nullptr)
: Expected<T>(std::move(Other)) {}
};
} // end namespace llvm
#endif // LLVM_SUPPORT_MSVCERRORWORKAROUNDS_H
PK hwFZ�'��
�
Support/MD5.hnu �[��� /* -*- C++ -*-
* This code is derived from (original license follows):
*
* This is an OpenSSL-compatible implementation of the RSA Data Security, Inc.
* MD5 Message-Digest Algorithm (RFC 1321).
*
* Homepage:
* http://openwall.info/wiki/people/solar/software/public-domain-source-code/md5
*
* Author:
* Alexander Peslyak, better known as Solar Designer <solar at openwall.com>
*
* This software was written by Alexander Peslyak in 2001. No copyright is
* claimed, and the software is hereby placed in the public domain.
* In case this attempt to disclaim copyright and place the software in the
* public domain is deemed null and void, then the software is
* Copyright (c) 2001 Alexander Peslyak and it is hereby released to the
* general public under the following terms:
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted.
*
* There's ABSOLUTELY NO WARRANTY, express or implied.
*
* See md5.c for more information.
*/
#ifndef LLVM_SUPPORT_MD5_H
#define LLVM_SUPPORT_MD5_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Endian.h"
#include <array>
#include <cstdint>
namespace llvm {
template <unsigned N> class SmallString;
template <typename T> class ArrayRef;
class MD5 {
public:
struct MD5Result : public std::array<uint8_t, 16> {
SmallString<32> digest() const;
uint64_t low() const {
// Our MD5 implementation returns the result in little endian, so the low
// word is first.
using namespace support;
return endian::read<uint64_t, little, unaligned>(data());
}
uint64_t high() const {
using namespace support;
return endian::read<uint64_t, little, unaligned>(data() + 8);
}
std::pair<uint64_t, uint64_t> words() const {
using namespace support;
return std::make_pair(high(), low());
}
};
MD5();
/// Updates the hash for the byte stream provided.
void update(ArrayRef<uint8_t> Data);
/// Updates the hash for the StringRef provided.
void update(StringRef Str);
/// Finishes off the hash and puts the result in result.
void final(MD5Result &Result);
/// Finishes off the hash, and returns the 16-byte hash data.
MD5Result final();
/// Finishes off the hash, and returns the 16-byte hash data.
/// This is suitable for getting the MD5 at any time without invalidating the
/// internal state, so that more calls can be made into `update`.
MD5Result result();
/// Translates the bytes in \p Res to a hex string that is
/// deposited into \p Str. The result will be of length 32.
static void stringifyResult(MD5Result &Result, SmallVectorImpl<char> &Str);
/// Computes the hash for a given bytes.
static MD5Result hash(ArrayRef<uint8_t> Data);
private:
// Any 32-bit or wider unsigned integer data type will do.
typedef uint32_t MD5_u32plus;
// Internal State
struct {
MD5_u32plus a = 0x67452301;
MD5_u32plus b = 0xefcdab89;
MD5_u32plus c = 0x98badcfe;
MD5_u32plus d = 0x10325476;
MD5_u32plus hi = 0;
MD5_u32plus lo = 0;
uint8_t buffer[64];
MD5_u32plus block[16];
} InternalState;
const uint8_t *body(ArrayRef<uint8_t> Data);
};
/// Helper to compute and return lower 64 bits of the given string's MD5 hash.
inline uint64_t MD5Hash(StringRef Str) {
using namespace support;
MD5 Hash;
Hash.update(Str);
MD5::MD5Result Result;
Hash.final(Result);
// Return the least significant word.
return Result.low();
}
} // end namespace llvm
#endif // LLVM_SUPPORT_MD5_H
PK hwFZ]�T2m= m= Support/TypeSize.hnu �[��� //===- TypeSize.h - Wrapper around type sizes -------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides a struct that can be used to query the size of IR types
// which may be scalable vectors. It provides convenience operators so that
// it can be used in much the same way as a single scalar value.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_TYPESIZE_H
#define LLVM_SUPPORT_TYPESIZE_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include <array>
#include <cassert>
#include <cstdint>
#include <type_traits>
namespace llvm {
/// Reports a diagnostic message to indicate an invalid size request has been
/// done on a scalable vector. This function may not return.
void reportInvalidSizeRequest(const char *Msg);
/// StackOffset holds a fixed and a scalable offset in bytes.
class StackOffset {
int64_t Fixed = 0;
int64_t Scalable = 0;
StackOffset(int64_t Fixed, int64_t Scalable)
: Fixed(Fixed), Scalable(Scalable) {}
public:
StackOffset() = default;
static StackOffset getFixed(int64_t Fixed) { return {Fixed, 0}; }
static StackOffset getScalable(int64_t Scalable) { return {0, Scalable}; }
static StackOffset get(int64_t Fixed, int64_t Scalable) {
return {Fixed, Scalable};
}
/// Returns the fixed component of the stack.
int64_t getFixed() const { return Fixed; }
/// Returns the scalable component of the stack.
int64_t getScalable() const { return Scalable; }
// Arithmetic operations.
StackOffset operator+(const StackOffset &RHS) const {
return {Fixed + RHS.Fixed, Scalable + RHS.Scalable};
}
StackOffset operator-(const StackOffset &RHS) const {
return {Fixed - RHS.Fixed, Scalable - RHS.Scalable};
}
StackOffset &operator+=(const StackOffset &RHS) {
Fixed += RHS.Fixed;
Scalable += RHS.Scalable;
return *this;
}
StackOffset &operator-=(const StackOffset &RHS) {
Fixed -= RHS.Fixed;
Scalable -= RHS.Scalable;
return *this;
}
StackOffset operator-() const { return {-Fixed, -Scalable}; }
// Equality comparisons.
bool operator==(const StackOffset &RHS) const {
return Fixed == RHS.Fixed && Scalable == RHS.Scalable;
}
bool operator!=(const StackOffset &RHS) const {
return Fixed != RHS.Fixed || Scalable != RHS.Scalable;
}
// The bool operator returns true iff any of the components is non zero.
explicit operator bool() const { return Fixed != 0 || Scalable != 0; }
};
namespace details {
// Base class for ElementCount and TypeSize below.
template <typename LeafTy, typename ValueTy> class FixedOrScalableQuantity {
public:
using ScalarTy = ValueTy;
protected:
ScalarTy Quantity = 0;
bool Scalable = false;
constexpr FixedOrScalableQuantity() = default;
constexpr FixedOrScalableQuantity(ScalarTy Quantity, bool Scalable)
: Quantity(Quantity), Scalable(Scalable) {}
friend constexpr LeafTy &operator+=(LeafTy &LHS, const LeafTy &RHS) {
assert(LHS.Scalable == RHS.Scalable && "Incompatible types");
LHS.Quantity += RHS.Quantity;
return LHS;
}
friend constexpr LeafTy &operator-=(LeafTy &LHS, const LeafTy &RHS) {
assert(LHS.Scalable == RHS.Scalable && "Incompatible types");
LHS.Quantity -= RHS.Quantity;
return LHS;
}
friend constexpr LeafTy &operator*=(LeafTy &LHS, ScalarTy RHS) {
LHS.Quantity *= RHS;
return LHS;
}
friend constexpr LeafTy operator+(const LeafTy &LHS, const LeafTy &RHS) {
LeafTy Copy = LHS;
return Copy += RHS;
}
friend constexpr LeafTy operator-(const LeafTy &LHS, const LeafTy &RHS) {
LeafTy Copy = LHS;
return Copy -= RHS;
}
friend constexpr LeafTy operator*(const LeafTy &LHS, ScalarTy RHS) {
LeafTy Copy = LHS;
return Copy *= RHS;
}
template <typename U = ScalarTy>
friend constexpr std::enable_if_t<std::is_signed_v<U>, LeafTy>
operator-(const LeafTy &LHS) {
LeafTy Copy = LHS;
return Copy *= -1;
}
public:
constexpr bool operator==(const FixedOrScalableQuantity &RHS) const {
return Quantity == RHS.Quantity && Scalable == RHS.Scalable;
}
constexpr bool operator!=(const FixedOrScalableQuantity &RHS) const {
return Quantity != RHS.Quantity || Scalable != RHS.Scalable;
}
constexpr bool isZero() const { return Quantity == 0; }
constexpr bool isNonZero() const { return Quantity != 0; }
explicit operator bool() const { return isNonZero(); }
/// Add \p RHS to the underlying quantity.
constexpr LeafTy getWithIncrement(ScalarTy RHS) const {
return LeafTy::get(Quantity + RHS, Scalable);
}
/// Returns the minimum value this quantity can represent.
constexpr ScalarTy getKnownMinValue() const { return Quantity; }
/// Returns whether the quantity is scaled by a runtime quantity (vscale).
constexpr bool isScalable() const { return Scalable; }
/// A return value of true indicates we know at compile time that the number
/// of elements (vscale * Min) is definitely even. However, returning false
/// does not guarantee that the total number of elements is odd.
constexpr bool isKnownEven() const { return (getKnownMinValue() & 0x1) == 0; }
/// This function tells the caller whether the element count is known at
/// compile time to be a multiple of the scalar value RHS.
constexpr bool isKnownMultipleOf(ScalarTy RHS) const {
return getKnownMinValue() % RHS == 0;
}
// Return the minimum value with the assumption that the count is exact.
// Use in places where a scalable count doesn't make sense (e.g. non-vector
// types, or vectors in backends which don't support scalable vectors).
constexpr ScalarTy getFixedValue() const {
assert(!isScalable() &&
"Request for a fixed element count on a scalable object");
return getKnownMinValue();
}
// For some cases, quantity ordering between scalable and fixed quantity types
// cannot be determined at compile time, so such comparisons aren't allowed.
//
// e.g. <vscale x 2 x i16> could be bigger than <4 x i32> with a runtime
// vscale >= 5, equal sized with a vscale of 4, and smaller with
// a vscale <= 3.
//
// All the functions below make use of the fact vscale is always >= 1, which
// means that <vscale x 4 x i32> is guaranteed to be >= <4 x i32>, etc.
static constexpr bool isKnownLT(const FixedOrScalableQuantity &LHS,
const FixedOrScalableQuantity &RHS) {
if (!LHS.isScalable() || RHS.isScalable())
return LHS.getKnownMinValue() < RHS.getKnownMinValue();
return false;
}
static constexpr bool isKnownGT(const FixedOrScalableQuantity &LHS,
const FixedOrScalableQuantity &RHS) {
if (LHS.isScalable() || !RHS.isScalable())
return LHS.getKnownMinValue() > RHS.getKnownMinValue();
return false;
}
static constexpr bool isKnownLE(const FixedOrScalableQuantity &LHS,
const FixedOrScalableQuantity &RHS) {
if (!LHS.isScalable() || RHS.isScalable())
return LHS.getKnownMinValue() <= RHS.getKnownMinValue();
return false;
}
static constexpr bool isKnownGE(const FixedOrScalableQuantity &LHS,
const FixedOrScalableQuantity &RHS) {
if (LHS.isScalable() || !RHS.isScalable())
return LHS.getKnownMinValue() >= RHS.getKnownMinValue();
return false;
}
/// We do not provide the '/' operator here because division for polynomial
/// types does not work in the same way as for normal integer types. We can
/// only divide the minimum value (or coefficient) by RHS, which is not the
/// same as
/// (Min * Vscale) / RHS
/// The caller is recommended to use this function in combination with
/// isKnownMultipleOf(RHS), which lets the caller know if it's possible to
/// perform a lossless divide by RHS.
constexpr LeafTy divideCoefficientBy(ScalarTy RHS) const {
return LeafTy::get(getKnownMinValue() / RHS, isScalable());
}
constexpr LeafTy multiplyCoefficientBy(ScalarTy RHS) const {
return LeafTy::get(getKnownMinValue() * RHS, isScalable());
}
constexpr LeafTy coefficientNextPowerOf2() const {
return LeafTy::get(
static_cast<ScalarTy>(llvm::NextPowerOf2(getKnownMinValue())),
isScalable());
}
/// Returns true if there exists a value X where RHS.multiplyCoefficientBy(X)
/// will result in a value whose quantity matches our own.
constexpr bool
hasKnownScalarFactor(const FixedOrScalableQuantity &RHS) const {
return isScalable() == RHS.isScalable() &&
getKnownMinValue() % RHS.getKnownMinValue() == 0;
}
/// Returns a value X where RHS.multiplyCoefficientBy(X) will result in a
/// value whose quantity matches our own.
constexpr ScalarTy
getKnownScalarFactor(const FixedOrScalableQuantity &RHS) const {
assert(hasKnownScalarFactor(RHS) && "Expected RHS to be a known factor!");
return getKnownMinValue() / RHS.getKnownMinValue();
}
/// Printing function.
void print(raw_ostream &OS) const {
if (isScalable())
OS << "vscale x ";
OS << getKnownMinValue();
}
};
} // namespace details
// Stores the number of elements for a type and whether this type is fixed
// (N-Elements) or scalable (e.g., SVE).
// - ElementCount::getFixed(1) : A scalar value.
// - ElementCount::getFixed(2) : A vector type holding 2 values.
// - ElementCount::getScalable(4) : A scalable vector type holding 4 values.
class ElementCount
: public details::FixedOrScalableQuantity<ElementCount, unsigned> {
constexpr ElementCount(ScalarTy MinVal, bool Scalable)
: FixedOrScalableQuantity(MinVal, Scalable) {}
constexpr ElementCount(
const FixedOrScalableQuantity<ElementCount, unsigned> &V)
: FixedOrScalableQuantity(V) {}
public:
constexpr ElementCount() : FixedOrScalableQuantity() {}
static constexpr ElementCount getFixed(ScalarTy MinVal) {
return ElementCount(MinVal, false);
}
static constexpr ElementCount getScalable(ScalarTy MinVal) {
return ElementCount(MinVal, true);
}
static constexpr ElementCount get(ScalarTy MinVal, bool Scalable) {
return ElementCount(MinVal, Scalable);
}
/// Exactly one element.
constexpr bool isScalar() const {
return !isScalable() && getKnownMinValue() == 1;
}
/// One or more elements.
constexpr bool isVector() const {
return (isScalable() && getKnownMinValue() != 0) || getKnownMinValue() > 1;
}
};
// Stores the size of a type. If the type is of fixed size, it will represent
// the exact size. If the type is a scalable vector, it will represent the known
// minimum size.
class TypeSize : public details::FixedOrScalableQuantity<TypeSize, uint64_t> {
TypeSize(const FixedOrScalableQuantity<TypeSize, uint64_t> &V)
: FixedOrScalableQuantity(V) {}
public:
constexpr TypeSize(ScalarTy Quantity, bool Scalable)
: FixedOrScalableQuantity(Quantity, Scalable) {}
static constexpr TypeSize getFixed(ScalarTy ExactSize) {
return TypeSize(ExactSize, false);
}
static constexpr TypeSize getScalable(ScalarTy MinimumSize) {
return TypeSize(MinimumSize, true);
}
static constexpr TypeSize get(ScalarTy Quantity, bool Scalable) {
return TypeSize(Quantity, Scalable);
}
static constexpr TypeSize Fixed(ScalarTy ExactSize) {
return TypeSize(ExactSize, false);
}
static constexpr TypeSize Scalable(ScalarTy MinimumSize) {
return TypeSize(MinimumSize, true);
}
LLVM_DEPRECATED("Use getFixedValue() instead", "getFixedValue")
constexpr ScalarTy getFixedSize() const { return getFixedValue(); }
LLVM_DEPRECATED("Use getKnownMinValue() instead", "getKnownMinValue")
constexpr ScalarTy getKnownMinSize() const { return getKnownMinValue(); }
// All code for this class below this point is needed because of the
// temporary implicit conversion to uint64_t. The operator overloads are
// needed because otherwise the conversion of the parent class
// UnivariateLinearPolyBase -> TypeSize is ambiguous.
// TODO: Remove the implicit conversion.
// Casts to a uint64_t if this is a fixed-width size.
//
// This interface is deprecated and will be removed in a future version
// of LLVM in favour of upgrading uses that rely on this implicit conversion
// to uint64_t. Calls to functions that return a TypeSize should use the
// proper interfaces to TypeSize.
// In practice this is mostly calls to MVT/EVT::getSizeInBits().
//
// To determine how to upgrade the code:
//
// if (<algorithm works for both scalable and fixed-width vectors>)
// use getKnownMinValue()
// else if (<algorithm works only for fixed-width vectors>) {
// if <algorithm can be adapted for both scalable and fixed-width vectors>
// update the algorithm and use getKnownMinValue()
// else
// bail out early for scalable vectors and use getFixedValue()
// }
operator ScalarTy() const;
// Additional operators needed to avoid ambiguous parses
// because of the implicit conversion hack.
friend constexpr TypeSize operator*(const TypeSize &LHS, const int RHS) {
return LHS * (ScalarTy)RHS;
}
friend constexpr TypeSize operator*(const TypeSize &LHS, const unsigned RHS) {
return LHS * (ScalarTy)RHS;
}
friend constexpr TypeSize operator*(const TypeSize &LHS, const int64_t RHS) {
return LHS * (ScalarTy)RHS;
}
friend constexpr TypeSize operator*(const int LHS, const TypeSize &RHS) {
return RHS * LHS;
}
friend constexpr TypeSize operator*(const unsigned LHS, const TypeSize &RHS) {
return RHS * LHS;
}
friend constexpr TypeSize operator*(const int64_t LHS, const TypeSize &RHS) {
return RHS * LHS;
}
friend constexpr TypeSize operator*(const uint64_t LHS, const TypeSize &RHS) {
return RHS * LHS;
}
};
//===----------------------------------------------------------------------===//
// Utilities
//===----------------------------------------------------------------------===//
/// Returns a TypeSize with a known minimum size that is the next integer
/// (mod 2**64) that is greater than or equal to \p Quantity and is a multiple
/// of \p Align. \p Align must be non-zero.
///
/// Similar to the alignTo functions in MathExtras.h
inline constexpr TypeSize alignTo(TypeSize Size, uint64_t Align) {
assert(Align != 0u && "Align must be non-zero");
return {(Size.getKnownMinValue() + Align - 1) / Align * Align,
Size.isScalable()};
}
/// Stream operator function for `FixedOrScalableQuantity`.
template <typename LeafTy, typename ScalarTy>
inline raw_ostream &
operator<<(raw_ostream &OS,
const details::FixedOrScalableQuantity<LeafTy, ScalarTy> &PS) {
PS.print(OS);
return OS;
}
template <> struct DenseMapInfo<ElementCount, void> {
static inline ElementCount getEmptyKey() {
return ElementCount::getScalable(~0U);
}
static inline ElementCount getTombstoneKey() {
return ElementCount::getFixed(~0U - 1);
}
static unsigned getHashValue(const ElementCount &EltCnt) {
unsigned HashVal = EltCnt.getKnownMinValue() * 37U;
if (EltCnt.isScalable())
return (HashVal - 1U);
return HashVal;
}
static bool isEqual(const ElementCount &LHS, const ElementCount &RHS) {
return LHS == RHS;
}
};
} // end namespace llvm
#endif // LLVM_SUPPORT_TYPESIZE_H
PK hwFZ�֊��r �r Support/GenericLoopInfoImpl.hnu �[��� //===- GenericLoopInfoImp.h - Generic Loop Info Implementation --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This fle contains the implementation of GenericLoopInfo. It should only be
// included in files that explicitly instantiate a GenericLoopInfo.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_GENERICLOOPINFOIMPL_H
#define LLVM_SUPPORT_GENERICLOOPINFOIMPL_H
#include "llvm/ADT/DepthFirstIterator.h"
#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SetOperations.h"
#include "llvm/Support/GenericLoopInfo.h"
namespace llvm {
//===----------------------------------------------------------------------===//
// APIs for simple analysis of the loop. See header notes.
/// getExitingBlocks - Return all blocks inside the loop that have successors
/// outside of the loop. These are the blocks _inside of the current loop_
/// which branch out. The returned list is always unique.
///
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::getExitingBlocks(
SmallVectorImpl<BlockT *> &ExitingBlocks) const {
assert(!isInvalid() && "Loop not in a valid state!");
for (const auto BB : blocks())
for (auto *Succ : children<BlockT *>(BB))
if (!contains(Succ)) {
// Not in current loop? It must be an exit block.
ExitingBlocks.push_back(BB);
break;
}
}
/// getExitingBlock - If getExitingBlocks would return exactly one block,
/// return that block. Otherwise return null.
template <class BlockT, class LoopT>
BlockT *LoopBase<BlockT, LoopT>::getExitingBlock() const {
assert(!isInvalid() && "Loop not in a valid state!");
auto notInLoop = [&](BlockT *BB) { return !contains(BB); };
auto isExitBlock = [&](BlockT *BB, bool AllowRepeats) -> BlockT * {
assert(!AllowRepeats && "Unexpected parameter value.");
// Child not in current loop? It must be an exit block.
return any_of(children<BlockT *>(BB), notInLoop) ? BB : nullptr;
};
return find_singleton<BlockT>(blocks(), isExitBlock);
}
/// getExitBlocks - Return all of the successor blocks of this loop. These
/// are the blocks _outside of the current loop_ which are branched to.
///
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::getExitBlocks(
SmallVectorImpl<BlockT *> &ExitBlocks) const {
assert(!isInvalid() && "Loop not in a valid state!");
for (const auto BB : blocks())
for (auto *Succ : children<BlockT *>(BB))
if (!contains(Succ))
// Not in current loop? It must be an exit block.
ExitBlocks.push_back(Succ);
}
/// getExitBlock - If getExitBlocks would return exactly one block,
/// return that block. Otherwise return null.
template <class BlockT, class LoopT>
std::pair<BlockT *, bool> getExitBlockHelper(const LoopBase<BlockT, LoopT> *L,
bool Unique) {
assert(!L->isInvalid() && "Loop not in a valid state!");
auto notInLoop = [&](BlockT *BB,
bool AllowRepeats) -> std::pair<BlockT *, bool> {
assert(AllowRepeats == Unique && "Unexpected parameter value.");
return {!L->contains(BB) ? BB : nullptr, false};
};
auto singleExitBlock = [&](BlockT *BB,
bool AllowRepeats) -> std::pair<BlockT *, bool> {
assert(AllowRepeats == Unique && "Unexpected parameter value.");
return find_singleton_nested<BlockT>(children<BlockT *>(BB), notInLoop,
AllowRepeats);
};
return find_singleton_nested<BlockT>(L->blocks(), singleExitBlock, Unique);
}
template <class BlockT, class LoopT>
bool LoopBase<BlockT, LoopT>::hasNoExitBlocks() const {
auto RC = getExitBlockHelper(this, false);
if (RC.second)
// found multiple exit blocks
return false;
// return true if there is no exit block
return !RC.first;
}
/// getExitBlock - If getExitBlocks would return exactly one block,
/// return that block. Otherwise return null.
template <class BlockT, class LoopT>
BlockT *LoopBase<BlockT, LoopT>::getExitBlock() const {
return getExitBlockHelper(this, false).first;
}
template <class BlockT, class LoopT>
bool LoopBase<BlockT, LoopT>::hasDedicatedExits() const {
// Each predecessor of each exit block of a normal loop is contained
// within the loop.
SmallVector<BlockT *, 4> UniqueExitBlocks;
getUniqueExitBlocks(UniqueExitBlocks);
for (BlockT *EB : UniqueExitBlocks)
for (BlockT *Predecessor : children<Inverse<BlockT *>>(EB))
if (!contains(Predecessor))
return false;
// All the requirements are met.
return true;
}
// Helper function to get unique loop exits. Pred is a predicate pointing to
// BasicBlocks in a loop which should be considered to find loop exits.
template <class BlockT, class LoopT, typename PredicateT>
void getUniqueExitBlocksHelper(const LoopT *L,
SmallVectorImpl<BlockT *> &ExitBlocks,
PredicateT Pred) {
assert(!L->isInvalid() && "Loop not in a valid state!");
SmallPtrSet<BlockT *, 32> Visited;
auto Filtered = make_filter_range(L->blocks(), Pred);
for (BlockT *BB : Filtered)
for (BlockT *Successor : children<BlockT *>(BB))
if (!L->contains(Successor))
if (Visited.insert(Successor).second)
ExitBlocks.push_back(Successor);
}
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::getUniqueExitBlocks(
SmallVectorImpl<BlockT *> &ExitBlocks) const {
getUniqueExitBlocksHelper(this, ExitBlocks,
[](const BlockT *BB) { return true; });
}
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::getUniqueNonLatchExitBlocks(
SmallVectorImpl<BlockT *> &ExitBlocks) const {
const BlockT *Latch = getLoopLatch();
assert(Latch && "Latch block must exists");
getUniqueExitBlocksHelper(this, ExitBlocks,
[Latch](const BlockT *BB) { return BB != Latch; });
}
template <class BlockT, class LoopT>
BlockT *LoopBase<BlockT, LoopT>::getUniqueExitBlock() const {
return getExitBlockHelper(this, true).first;
}
/// getExitEdges - Return all pairs of (_inside_block_,_outside_block_).
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::getExitEdges(
SmallVectorImpl<Edge> &ExitEdges) const {
assert(!isInvalid() && "Loop not in a valid state!");
for (const auto BB : blocks())
for (auto *Succ : children<BlockT *>(BB))
if (!contains(Succ))
// Not in current loop? It must be an exit block.
ExitEdges.emplace_back(BB, Succ);
}
namespace detail {
template <class BlockT>
using has_hoist_check = decltype(&BlockT::isLegalToHoistInto);
template <class BlockT>
using detect_has_hoist_check = llvm::is_detected<has_hoist_check, BlockT>;
/// SFINAE functions that dispatch to the isLegalToHoistInto member function or
/// return false, if it doesn't exist.
template <class BlockT> bool isLegalToHoistInto(BlockT *Block) {
if constexpr (detect_has_hoist_check<BlockT>::value)
return Block->isLegalToHoistInto();
return false;
}
} // namespace detail
/// getLoopPreheader - If there is a preheader for this loop, return it. A
/// loop has a preheader if there is only one edge to the header of the loop
/// from outside of the loop and it is legal to hoist instructions into the
/// predecessor. If this is the case, the block branching to the header of the
/// loop is the preheader node.
///
/// This method returns null if there is no preheader for the loop.
///
template <class BlockT, class LoopT>
BlockT *LoopBase<BlockT, LoopT>::getLoopPreheader() const {
assert(!isInvalid() && "Loop not in a valid state!");
// Keep track of nodes outside the loop branching to the header...
BlockT *Out = getLoopPredecessor();
if (!Out)
return nullptr;
// Make sure we are allowed to hoist instructions into the predecessor.
if (!detail::isLegalToHoistInto(Out))
return nullptr;
// Make sure there is only one exit out of the preheader.
typedef GraphTraits<BlockT *> BlockTraits;
typename BlockTraits::ChildIteratorType SI = BlockTraits::child_begin(Out);
++SI;
if (SI != BlockTraits::child_end(Out))
return nullptr; // Multiple exits from the block, must not be a preheader.
// The predecessor has exactly one successor, so it is a preheader.
return Out;
}
/// getLoopPredecessor - If the given loop's header has exactly one unique
/// predecessor outside the loop, return it. Otherwise return null.
/// This is less strict that the loop "preheader" concept, which requires
/// the predecessor to have exactly one successor.
///
template <class BlockT, class LoopT>
BlockT *LoopBase<BlockT, LoopT>::getLoopPredecessor() const {
assert(!isInvalid() && "Loop not in a valid state!");
// Keep track of nodes outside the loop branching to the header...
BlockT *Out = nullptr;
// Loop over the predecessors of the header node...
BlockT *Header = getHeader();
for (const auto Pred : children<Inverse<BlockT *>>(Header)) {
if (!contains(Pred)) { // If the block is not in the loop...
if (Out && Out != Pred)
return nullptr; // Multiple predecessors outside the loop
Out = Pred;
}
}
return Out;
}
/// getLoopLatch - If there is a single latch block for this loop, return it.
/// A latch block is a block that contains a branch back to the header.
template <class BlockT, class LoopT>
BlockT *LoopBase<BlockT, LoopT>::getLoopLatch() const {
assert(!isInvalid() && "Loop not in a valid state!");
BlockT *Header = getHeader();
BlockT *Latch = nullptr;
for (const auto Pred : children<Inverse<BlockT *>>(Header)) {
if (contains(Pred)) {
if (Latch)
return nullptr;
Latch = Pred;
}
}
return Latch;
}
//===----------------------------------------------------------------------===//
// APIs for updating loop information after changing the CFG
//
/// addBasicBlockToLoop - This method is used by other analyses to update loop
/// information. NewBB is set to be a new member of the current loop.
/// Because of this, it is added as a member of all parent loops, and is added
/// to the specified LoopInfo object as being in the current basic block. It
/// is not valid to replace the loop header with this method.
///
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::addBasicBlockToLoop(
BlockT *NewBB, LoopInfoBase<BlockT, LoopT> &LIB) {
assert(!isInvalid() && "Loop not in a valid state!");
#ifndef NDEBUG
if (!Blocks.empty()) {
auto SameHeader = LIB[getHeader()];
assert(contains(SameHeader) && getHeader() == SameHeader->getHeader() &&
"Incorrect LI specified for this loop!");
}
#endif
assert(NewBB && "Cannot add a null basic block to the loop!");
assert(!LIB[NewBB] && "BasicBlock already in the loop!");
LoopT *L = static_cast<LoopT *>(this);
// Add the loop mapping to the LoopInfo object...
LIB.BBMap[NewBB] = L;
// Add the basic block to this loop and all parent loops...
while (L) {
L->addBlockEntry(NewBB);
L = L->getParentLoop();
}
}
/// replaceChildLoopWith - This is used when splitting loops up. It replaces
/// the OldChild entry in our children list with NewChild, and updates the
/// parent pointer of OldChild to be null and the NewChild to be this loop.
/// This updates the loop depth of the new child.
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::replaceChildLoopWith(LoopT *OldChild,
LoopT *NewChild) {
assert(!isInvalid() && "Loop not in a valid state!");
assert(OldChild->ParentLoop == this && "This loop is already broken!");
assert(!NewChild->ParentLoop && "NewChild already has a parent!");
typename std::vector<LoopT *>::iterator I = find(SubLoops, OldChild);
assert(I != SubLoops.end() && "OldChild not in loop!");
*I = NewChild;
OldChild->ParentLoop = nullptr;
NewChild->ParentLoop = static_cast<LoopT *>(this);
}
/// verifyLoop - Verify loop structure
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::verifyLoop() const {
assert(!isInvalid() && "Loop not in a valid state!");
#ifndef NDEBUG
assert(!Blocks.empty() && "Loop header is missing");
// Setup for using a depth-first iterator to visit every block in the loop.
SmallVector<BlockT *, 8> ExitBBs;
getExitBlocks(ExitBBs);
df_iterator_default_set<BlockT *> VisitSet;
VisitSet.insert(ExitBBs.begin(), ExitBBs.end());
// Keep track of the BBs visited.
SmallPtrSet<BlockT *, 8> VisitedBBs;
// Check the individual blocks.
for (BlockT *BB : depth_first_ext(getHeader(), VisitSet)) {
assert(std::any_of(GraphTraits<BlockT *>::child_begin(BB),
GraphTraits<BlockT *>::child_end(BB),
[&](BlockT *B) { return contains(B); }) &&
"Loop block has no in-loop successors!");
assert(std::any_of(GraphTraits<Inverse<BlockT *>>::child_begin(BB),
GraphTraits<Inverse<BlockT *>>::child_end(BB),
[&](BlockT *B) { return contains(B); }) &&
"Loop block has no in-loop predecessors!");
SmallVector<BlockT *, 2> OutsideLoopPreds;
for (BlockT *B :
llvm::make_range(GraphTraits<Inverse<BlockT *>>::child_begin(BB),
GraphTraits<Inverse<BlockT *>>::child_end(BB)))
if (!contains(B))
OutsideLoopPreds.push_back(B);
if (BB == getHeader()) {
assert(!OutsideLoopPreds.empty() && "Loop is unreachable!");
} else if (!OutsideLoopPreds.empty()) {
// A non-header loop shouldn't be reachable from outside the loop,
// though it is permitted if the predecessor is not itself actually
// reachable.
BlockT *EntryBB = &BB->getParent()->front();
for (BlockT *CB : depth_first(EntryBB))
for (unsigned i = 0, e = OutsideLoopPreds.size(); i != e; ++i)
assert(CB != OutsideLoopPreds[i] &&
"Loop has multiple entry points!");
}
assert(BB != &getHeader()->getParent()->front() &&
"Loop contains function entry block!");
VisitedBBs.insert(BB);
}
if (VisitedBBs.size() != getNumBlocks()) {
dbgs() << "The following blocks are unreachable in the loop: ";
for (auto *BB : Blocks) {
if (!VisitedBBs.count(BB)) {
dbgs() << *BB << "\n";
}
}
assert(false && "Unreachable block in loop");
}
// Check the subloops.
for (iterator I = begin(), E = end(); I != E; ++I)
// Each block in each subloop should be contained within this loop.
for (block_iterator BI = (*I)->block_begin(), BE = (*I)->block_end();
BI != BE; ++BI) {
assert(contains(*BI) &&
"Loop does not contain all the blocks of a subloop!");
}
// Check the parent loop pointer.
if (ParentLoop) {
assert(is_contained(ParentLoop->getSubLoops(), this) &&
"Loop is not a subloop of its parent!");
}
#endif
}
/// verifyLoop - Verify loop structure of this loop and all nested loops.
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::verifyLoopNest(
DenseSet<const LoopT *> *Loops) const {
assert(!isInvalid() && "Loop not in a valid state!");
Loops->insert(static_cast<const LoopT *>(this));
// Verify this loop.
verifyLoop();
// Verify the subloops.
for (iterator I = begin(), E = end(); I != E; ++I)
(*I)->verifyLoopNest(Loops);
}
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::print(raw_ostream &OS, bool Verbose,
bool PrintNested, unsigned Depth) const {
OS.indent(Depth * 2);
if (static_cast<const LoopT *>(this)->isAnnotatedParallel())
OS << "Parallel ";
OS << "Loop at depth " << getLoopDepth() << " containing: ";
BlockT *H = getHeader();
for (unsigned i = 0; i < getBlocks().size(); ++i) {
BlockT *BB = getBlocks()[i];
if (!Verbose) {
if (i)
OS << ",";
BB->printAsOperand(OS, false);
} else
OS << "\n";
if (BB == H)
OS << "<header>";
if (isLoopLatch(BB))
OS << "<latch>";
if (isLoopExiting(BB))
OS << "<exiting>";
if (Verbose)
BB->print(OS);
}
if (PrintNested) {
OS << "\n";
for (iterator I = begin(), E = end(); I != E; ++I)
(*I)->print(OS, /*Verbose*/ false, PrintNested, Depth + 2);
}
}
//===----------------------------------------------------------------------===//
/// Stable LoopInfo Analysis - Build a loop tree using stable iterators so the
/// result does / not depend on use list (block predecessor) order.
///
/// Discover a subloop with the specified backedges such that: All blocks within
/// this loop are mapped to this loop or a subloop. And all subloops within this
/// loop have their parent loop set to this loop or a subloop.
template <class BlockT, class LoopT>
static void discoverAndMapSubloop(LoopT *L, ArrayRef<BlockT *> Backedges,
LoopInfoBase<BlockT, LoopT> *LI,
const DomTreeBase<BlockT> &DomTree) {
typedef GraphTraits<Inverse<BlockT *>> InvBlockTraits;
unsigned NumBlocks = 0;
unsigned NumSubloops = 0;
// Perform a backward CFG traversal using a worklist.
std::vector<BlockT *> ReverseCFGWorklist(Backedges.begin(), Backedges.end());
while (!ReverseCFGWorklist.empty()) {
BlockT *PredBB = ReverseCFGWorklist.back();
ReverseCFGWorklist.pop_back();
LoopT *Subloop = LI->getLoopFor(PredBB);
if (!Subloop) {
if (!DomTree.isReachableFromEntry(PredBB))
continue;
// This is an undiscovered block. Map it to the current loop.
LI->changeLoopFor(PredBB, L);
++NumBlocks;
if (PredBB == L->getHeader())
continue;
// Push all block predecessors on the worklist.
ReverseCFGWorklist.insert(ReverseCFGWorklist.end(),
InvBlockTraits::child_begin(PredBB),
InvBlockTraits::child_end(PredBB));
} else {
// This is a discovered block. Find its outermost discovered loop.
Subloop = Subloop->getOutermostLoop();
// If it is already discovered to be a subloop of this loop, continue.
if (Subloop == L)
continue;
// Discover a subloop of this loop.
Subloop->setParentLoop(L);
++NumSubloops;
NumBlocks += Subloop->getBlocksVector().capacity();
PredBB = Subloop->getHeader();
// Continue traversal along predecessors that are not loop-back edges from
// within this subloop tree itself. Note that a predecessor may directly
// reach another subloop that is not yet discovered to be a subloop of
// this loop, which we must traverse.
for (const auto Pred : children<Inverse<BlockT *>>(PredBB)) {
if (LI->getLoopFor(Pred) != Subloop)
ReverseCFGWorklist.push_back(Pred);
}
}
}
L->getSubLoopsVector().reserve(NumSubloops);
L->reserveBlocks(NumBlocks);
}
/// Populate all loop data in a stable order during a single forward DFS.
template <class BlockT, class LoopT> class PopulateLoopsDFS {
typedef GraphTraits<BlockT *> BlockTraits;
typedef typename BlockTraits::ChildIteratorType SuccIterTy;
LoopInfoBase<BlockT, LoopT> *LI;
public:
PopulateLoopsDFS(LoopInfoBase<BlockT, LoopT> *li) : LI(li) {}
void traverse(BlockT *EntryBlock);
protected:
void insertIntoLoop(BlockT *Block);
};
/// Top-level driver for the forward DFS within the loop.
template <class BlockT, class LoopT>
void PopulateLoopsDFS<BlockT, LoopT>::traverse(BlockT *EntryBlock) {
for (BlockT *BB : post_order(EntryBlock))
insertIntoLoop(BB);
}
/// Add a single Block to its ancestor loops in PostOrder. If the block is a
/// subloop header, add the subloop to its parent in PostOrder, then reverse the
/// Block and Subloop vectors of the now complete subloop to achieve RPO.
template <class BlockT, class LoopT>
void PopulateLoopsDFS<BlockT, LoopT>::insertIntoLoop(BlockT *Block) {
LoopT *Subloop = LI->getLoopFor(Block);
if (Subloop && Block == Subloop->getHeader()) {
// We reach this point once per subloop after processing all the blocks in
// the subloop.
if (!Subloop->isOutermost())
Subloop->getParentLoop()->getSubLoopsVector().push_back(Subloop);
else
LI->addTopLevelLoop(Subloop);
// For convenience, Blocks and Subloops are inserted in postorder. Reverse
// the lists, except for the loop header, which is always at the beginning.
Subloop->reverseBlock(1);
std::reverse(Subloop->getSubLoopsVector().begin(),
Subloop->getSubLoopsVector().end());
Subloop = Subloop->getParentLoop();
}
for (; Subloop; Subloop = Subloop->getParentLoop())
Subloop->addBlockEntry(Block);
}
/// Analyze LoopInfo discovers loops during a postorder DominatorTree traversal
/// interleaved with backward CFG traversals within each subloop
/// (discoverAndMapSubloop). The backward traversal skips inner subloops, so
/// this part of the algorithm is linear in the number of CFG edges. Subloop and
/// Block vectors are then populated during a single forward CFG traversal
/// (PopulateLoopDFS).
///
/// During the two CFG traversals each block is seen three times:
/// 1) Discovered and mapped by a reverse CFG traversal.
/// 2) Visited during a forward DFS CFG traversal.
/// 3) Reverse-inserted in the loop in postorder following forward DFS.
///
/// The Block vectors are inclusive, so step 3 requires loop-depth number of
/// insertions per block.
template <class BlockT, class LoopT>
void LoopInfoBase<BlockT, LoopT>::analyze(const DomTreeBase<BlockT> &DomTree) {
// Postorder traversal of the dominator tree.
const DomTreeNodeBase<BlockT> *DomRoot = DomTree.getRootNode();
for (auto DomNode : post_order(DomRoot)) {
BlockT *Header = DomNode->getBlock();
SmallVector<BlockT *, 4> Backedges;
// Check each predecessor of the potential loop header.
for (const auto Backedge : children<Inverse<BlockT *>>(Header)) {
// If Header dominates predBB, this is a new loop. Collect the backedges.
if (DomTree.dominates(Header, Backedge) &&
DomTree.isReachableFromEntry(Backedge)) {
Backedges.push_back(Backedge);
}
}
// Perform a backward CFG traversal to discover and map blocks in this loop.
if (!Backedges.empty()) {
LoopT *L = AllocateLoop(Header);
discoverAndMapSubloop(L, ArrayRef<BlockT *>(Backedges), this, DomTree);
}
}
// Perform a single forward CFG traversal to populate block and subloop
// vectors for all loops.
PopulateLoopsDFS<BlockT, LoopT> DFS(this);
DFS.traverse(DomRoot->getBlock());
}
template <class BlockT, class LoopT>
SmallVector<LoopT *, 4>
LoopInfoBase<BlockT, LoopT>::getLoopsInPreorder() const {
SmallVector<LoopT *, 4> PreOrderLoops, PreOrderWorklist;
// The outer-most loop actually goes into the result in the same relative
// order as we walk it. But LoopInfo stores the top level loops in reverse
// program order so for here we reverse it to get forward program order.
// FIXME: If we change the order of LoopInfo we will want to remove the
// reverse here.
for (LoopT *RootL : reverse(*this)) {
auto PreOrderLoopsInRootL = RootL->getLoopsInPreorder();
PreOrderLoops.append(PreOrderLoopsInRootL.begin(),
PreOrderLoopsInRootL.end());
}
return PreOrderLoops;
}
template <class BlockT, class LoopT>
SmallVector<LoopT *, 4>
LoopInfoBase<BlockT, LoopT>::getLoopsInReverseSiblingPreorder() const {
SmallVector<LoopT *, 4> PreOrderLoops, PreOrderWorklist;
// The outer-most loop actually goes into the result in the same relative
// order as we walk it. LoopInfo stores the top level loops in reverse
// program order so we walk in order here.
// FIXME: If we change the order of LoopInfo we will want to add a reverse
// here.
for (LoopT *RootL : *this) {
assert(PreOrderWorklist.empty() &&
"Must start with an empty preorder walk worklist.");
PreOrderWorklist.push_back(RootL);
do {
LoopT *L = PreOrderWorklist.pop_back_val();
// Sub-loops are stored in forward program order, but will process the
// worklist backwards so we can just append them in order.
PreOrderWorklist.append(L->begin(), L->end());
PreOrderLoops.push_back(L);
} while (!PreOrderWorklist.empty());
}
return PreOrderLoops;
}
// Debugging
template <class BlockT, class LoopT>
void LoopInfoBase<BlockT, LoopT>::print(raw_ostream &OS) const {
for (unsigned i = 0; i < TopLevelLoops.size(); ++i)
TopLevelLoops[i]->print(OS);
#if 0
for (DenseMap<BasicBlock*, LoopT*>::const_iterator I = BBMap.begin(),
E = BBMap.end(); I != E; ++I)
OS << "BB '" << I->first->getName() << "' level = "
<< I->second->getLoopDepth() << "\n";
#endif
}
template <typename T>
bool compareVectors(std::vector<T> &BB1, std::vector<T> &BB2) {
llvm::sort(BB1);
llvm::sort(BB2);
return BB1 == BB2;
}
template <class BlockT, class LoopT>
void addInnerLoopsToHeadersMap(DenseMap<BlockT *, const LoopT *> &LoopHeaders,
const LoopInfoBase<BlockT, LoopT> &LI,
const LoopT &L) {
LoopHeaders[L.getHeader()] = &L;
for (LoopT *SL : L)
addInnerLoopsToHeadersMap(LoopHeaders, LI, *SL);
}
#ifndef NDEBUG
template <class BlockT, class LoopT>
static void compareLoops(const LoopT *L, const LoopT *OtherL,
DenseMap<BlockT *, const LoopT *> &OtherLoopHeaders) {
BlockT *H = L->getHeader();
BlockT *OtherH = OtherL->getHeader();
assert(H == OtherH &&
"Mismatched headers even though found in the same map entry!");
assert(L->getLoopDepth() == OtherL->getLoopDepth() &&
"Mismatched loop depth!");
const LoopT *ParentL = L, *OtherParentL = OtherL;
do {
assert(ParentL->getHeader() == OtherParentL->getHeader() &&
"Mismatched parent loop headers!");
ParentL = ParentL->getParentLoop();
OtherParentL = OtherParentL->getParentLoop();
} while (ParentL);
for (const LoopT *SubL : *L) {
BlockT *SubH = SubL->getHeader();
const LoopT *OtherSubL = OtherLoopHeaders.lookup(SubH);
assert(OtherSubL && "Inner loop is missing in computed loop info!");
OtherLoopHeaders.erase(SubH);
compareLoops(SubL, OtherSubL, OtherLoopHeaders);
}
std::vector<BlockT *> BBs = L->getBlocks();
std::vector<BlockT *> OtherBBs = OtherL->getBlocks();
assert(compareVectors(BBs, OtherBBs) &&
"Mismatched basic blocks in the loops!");
const SmallPtrSetImpl<const BlockT *> &BlocksSet = L->getBlocksSet();
const SmallPtrSetImpl<const BlockT *> &OtherBlocksSet =
OtherL->getBlocksSet();
assert(BlocksSet.size() == OtherBlocksSet.size() &&
llvm::set_is_subset(BlocksSet, OtherBlocksSet) &&
"Mismatched basic blocks in BlocksSets!");
}
#endif
template <class BlockT, class LoopT>
void LoopInfoBase<BlockT, LoopT>::verify(
const DomTreeBase<BlockT> &DomTree) const {
DenseSet<const LoopT *> Loops;
for (iterator I = begin(), E = end(); I != E; ++I) {
assert((*I)->isOutermost() && "Top-level loop has a parent!");
(*I)->verifyLoopNest(&Loops);
}
// Verify that blocks are mapped to valid loops.
#ifndef NDEBUG
for (auto &Entry : BBMap) {
const BlockT *BB = Entry.first;
LoopT *L = Entry.second;
assert(Loops.count(L) && "orphaned loop");
assert(L->contains(BB) && "orphaned block");
for (LoopT *ChildLoop : *L)
assert(!ChildLoop->contains(BB) &&
"BBMap should point to the innermost loop containing BB");
}
// Recompute LoopInfo to verify loops structure.
LoopInfoBase<BlockT, LoopT> OtherLI;
OtherLI.analyze(DomTree);
// Build a map we can use to move from our LI to the computed one. This
// allows us to ignore the particular order in any layer of the loop forest
// while still comparing the structure.
DenseMap<BlockT *, const LoopT *> OtherLoopHeaders;
for (LoopT *L : OtherLI)
addInnerLoopsToHeadersMap(OtherLoopHeaders, OtherLI, *L);
// Walk the top level loops and ensure there is a corresponding top-level
// loop in the computed version and then recursively compare those loop
// nests.
for (LoopT *L : *this) {
BlockT *Header = L->getHeader();
const LoopT *OtherL = OtherLoopHeaders.lookup(Header);
assert(OtherL && "Top level loop is missing in computed loop info!");
// Now that we've matched this loop, erase its header from the map.
OtherLoopHeaders.erase(Header);
// And recursively compare these loops.
compareLoops(L, OtherL, OtherLoopHeaders);
}
// Any remaining entries in the map are loops which were found when computing
// a fresh LoopInfo but not present in the current one.
if (!OtherLoopHeaders.empty()) {
for (const auto &HeaderAndLoop : OtherLoopHeaders)
dbgs() << "Found new loop: " << *HeaderAndLoop.second << "\n";
llvm_unreachable("Found new loops when recomputing LoopInfo!");
}
#endif
}
} // namespace llvm
#endif // LLVM_SUPPORT_GENERICLOOPINFOIMPL_H
PK hwFZ� �� � Support/RecyclingAllocator.hnu �[��� //==- llvm/Support/RecyclingAllocator.h - Recycling Allocator ----*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the RecyclingAllocator class. See the doxygen comment for
// RecyclingAllocator for more details on the implementation.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_RECYCLINGALLOCATOR_H
#define LLVM_SUPPORT_RECYCLINGALLOCATOR_H
#include "llvm/Support/Recycler.h"
namespace llvm {
/// RecyclingAllocator - This class wraps an Allocator, adding the
/// functionality of recycling deleted objects.
///
template <class AllocatorType, class T, size_t Size = sizeof(T),
size_t Align = alignof(T)>
class RecyclingAllocator {
private:
/// Base - Implementation details.
///
Recycler<T, Size, Align> Base;
/// Allocator - The wrapped allocator.
///
AllocatorType Allocator;
public:
~RecyclingAllocator() { Base.clear(Allocator); }
/// Allocate - Return a pointer to storage for an object of type
/// SubClass. The storage may be either newly allocated or recycled.
///
template<class SubClass>
SubClass *Allocate() { return Base.template Allocate<SubClass>(Allocator); }
T *Allocate() { return Base.Allocate(Allocator); }
/// Deallocate - Release storage for the pointed-to object. The
/// storage will be kept track of and may be recycled.
///
template<class SubClass>
void Deallocate(SubClass* E) { return Base.Deallocate(Allocator, E); }
void PrintStats() {
Allocator.PrintStats();
Base.PrintStats();
}
};
}
template<class AllocatorType, class T, size_t Size, size_t Align>
inline void *operator new(size_t size,
llvm::RecyclingAllocator<AllocatorType,
T, Size, Align> &Allocator) {
assert(size <= Size && "allocation size exceeded");
return Allocator.Allocate();
}
template<class AllocatorType, class T, size_t Size, size_t Align>
inline void operator delete(void *E,
llvm::RecyclingAllocator<AllocatorType,
T, Size, Align> &A) {
A.Deallocate(E);
}
#endif
PK hwFZ����n n Support/DataTypes.hnu �[��� //===-- llvm/Support/DataTypes.h - Define fixed size types ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Due to layering constraints (Support depends on llvm-c) this is a thin
// wrapper around the implementation that lives in llvm-c, though most clients
// can/should think of this as being provided by Support for simplicity (not
// many clients are aware of their dependency on llvm-c).
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_DATATYPES_H
#define LLVM_SUPPORT_DATATYPES_H
#include "llvm-c/DataTypes.h"
#endif // LLVM_SUPPORT_DATATYPES_H
PK hwFZ{.��!, !, Support/CommandLine.hnu �[��� //===- llvm/Support/CommandLine.h - Command line handler --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This class implements a command line argument processor that is useful when
// creating a tool. It provides a simple, minimalistic interface that is easily
// extensible and supports nonlocal (library) command line options.
//
// Note that rather than trying to figure out what this code does, you should
// read the library documentation located in docs/CommandLine.html or looks at
// the many example usages in tools/*/*.cpp
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_COMMANDLINE_H
#define LLVM_SUPPORT_COMMANDLINE_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/Twine.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/ManagedStatic.h"
#include "llvm/Support/StringSaver.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <climits>
#include <cstddef>
#include <functional>
#include <initializer_list>
#include <string>
#include <type_traits>
#include <vector>
namespace llvm {
namespace vfs {
class FileSystem;
}
class StringSaver;
/// This namespace contains all of the command line option processing machinery.
/// It is intentionally a short name to make qualified usage concise.
namespace cl {
//===----------------------------------------------------------------------===//
// Command line option processing entry point.
//
// Returns true on success. Otherwise, this will print the error message to
// stderr and exit if \p Errs is not set (nullptr by default), or print the
// error message to \p Errs and return false if \p Errs is provided.
//
// If EnvVar is not nullptr, command-line options are also parsed from the
// environment variable named by EnvVar. Precedence is given to occurrences
// from argv. This precedence is currently implemented by parsing argv after
// the environment variable, so it is only implemented correctly for options
// that give precedence to later occurrences. If your program supports options
// that give precedence to earlier occurrences, you will need to extend this
// function to support it correctly.
bool ParseCommandLineOptions(int argc, const char *const *argv,
StringRef Overview = "",
raw_ostream *Errs = nullptr,
const char *EnvVar = nullptr,
bool LongOptionsUseDoubleDash = false);
// Function pointer type for printing version information.
using VersionPrinterTy = std::function<void(raw_ostream &)>;
///===---------------------------------------------------------------------===//
/// Override the default (LLVM specific) version printer used to print out the
/// version when --version is given on the command line. This allows other
/// systems using the CommandLine utilities to print their own version string.
void SetVersionPrinter(VersionPrinterTy func);
///===---------------------------------------------------------------------===//
/// Add an extra printer to use in addition to the default one. This can be
/// called multiple times, and each time it adds a new function to the list
/// which will be called after the basic LLVM version printing is complete.
/// Each can then add additional information specific to the tool.
void AddExtraVersionPrinter(VersionPrinterTy func);
// Print option values.
// With -print-options print the difference between option values and defaults.
// With -print-all-options print all option values.
// (Currently not perfect, but best-effort.)
void PrintOptionValues();
// Forward declaration - AddLiteralOption needs to be up here to make gcc happy.
class Option;
/// Adds a new option for parsing and provides the option it refers to.
///
/// \param O pointer to the option
/// \param Name the string name for the option to handle during parsing
///
/// Literal options are used by some parsers to register special option values.
/// This is how the PassNameParser registers pass names for opt.
void AddLiteralOption(Option &O, StringRef Name);
//===----------------------------------------------------------------------===//
// Flags permitted to be passed to command line arguments
//
enum NumOccurrencesFlag { // Flags for the number of occurrences allowed
Optional = 0x00, // Zero or One occurrence
ZeroOrMore = 0x01, // Zero or more occurrences allowed
Required = 0x02, // One occurrence required
OneOrMore = 0x03, // One or more occurrences required
// Indicates that this option is fed anything that follows the last positional
// argument required by the application (it is an error if there are zero
// positional arguments, and a ConsumeAfter option is used).
// Thus, for example, all arguments to LLI are processed until a filename is
// found. Once a filename is found, all of the succeeding arguments are
// passed, unprocessed, to the ConsumeAfter option.
//
ConsumeAfter = 0x04
};
enum ValueExpected { // Is a value required for the option?
// zero reserved for the unspecified value
ValueOptional = 0x01, // The value can appear... or not
ValueRequired = 0x02, // The value is required to appear!
ValueDisallowed = 0x03 // A value may not be specified (for flags)
};
enum OptionHidden { // Control whether -help shows this option
NotHidden = 0x00, // Option included in -help & -help-hidden
Hidden = 0x01, // -help doesn't, but -help-hidden does
ReallyHidden = 0x02 // Neither -help nor -help-hidden show this arg
};
// This controls special features that the option might have that cause it to be
// parsed differently...
//
// Prefix - This option allows arguments that are otherwise unrecognized to be
// matched by options that are a prefix of the actual value. This is useful for
// cases like a linker, where options are typically of the form '-lfoo' or
// '-L../../include' where -l or -L are the actual flags. When prefix is
// enabled, and used, the value for the flag comes from the suffix of the
// argument.
//
// AlwaysPrefix - Only allow the behavior enabled by the Prefix flag and reject
// the Option=Value form.
//
enum FormattingFlags {
NormalFormatting = 0x00, // Nothing special
Positional = 0x01, // Is a positional argument, no '-' required
Prefix = 0x02, // Can this option directly prefix its value?
AlwaysPrefix = 0x03 // Can this option only directly prefix its value?
};
enum MiscFlags { // Miscellaneous flags to adjust argument
CommaSeparated = 0x01, // Should this cl::list split between commas?
PositionalEatsArgs = 0x02, // Should this positional cl::list eat -args?
Sink = 0x04, // Should this cl::list eat all unknown options?
// Can this option group with other options?
// If this is enabled, multiple letter options are allowed to bunch together
// with only a single hyphen for the whole group. This allows emulation
// of the behavior that ls uses for example: ls -la === ls -l -a
Grouping = 0x08,
// Default option
DefaultOption = 0x10
};
//===----------------------------------------------------------------------===//
//
class OptionCategory {
private:
StringRef const Name;
StringRef const Description;
void registerCategory();
public:
OptionCategory(StringRef const Name,
StringRef const Description = "")
: Name(Name), Description(Description) {
registerCategory();
}
StringRef getName() const { return Name; }
StringRef getDescription() const { return Description; }
};
// The general Option Category (used as default category).
OptionCategory &getGeneralCategory();
//===----------------------------------------------------------------------===//
//
class SubCommand {
private:
StringRef Name;
StringRef Description;
protected:
void registerSubCommand();
void unregisterSubCommand();
public:
SubCommand(StringRef Name, StringRef Description = "")
: Name(Name), Description(Description) {
registerSubCommand();
}
SubCommand() = default;
// Get the special subcommand representing no subcommand.
static SubCommand &getTopLevel();
// Get the special subcommand that can be used to put an option into all
// subcommands.
static SubCommand &getAll();
void reset();
explicit operator bool() const;
StringRef getName() const { return Name; }
StringRef getDescription() const { return Description; }
SmallVector<Option *, 4> PositionalOpts;
SmallVector<Option *, 4> SinkOpts;
StringMap<Option *> OptionsMap;
Option *ConsumeAfterOpt = nullptr; // The ConsumeAfter option if it exists.
};
// A special subcommand representing no subcommand
extern ManagedStatic<SubCommand> TopLevelSubCommand;
// A special subcommand that can be used to put an option into all subcommands.
extern ManagedStatic<SubCommand> AllSubCommands;
//===----------------------------------------------------------------------===//
//
class Option {
friend class alias;
// Overriden by subclasses to handle the value passed into an argument. Should
// return true if there was an error processing the argument and the program
// should exit.
//
virtual bool handleOccurrence(unsigned pos, StringRef ArgName,
StringRef Arg) = 0;
virtual enum ValueExpected getValueExpectedFlagDefault() const {
return ValueOptional;
}
// Out of line virtual function to provide home for the class.
virtual void anchor();
uint16_t NumOccurrences; // The number of times specified
// Occurrences, HiddenFlag, and Formatting are all enum types but to avoid
// problems with signed enums in bitfields.
uint16_t Occurrences : 3; // enum NumOccurrencesFlag
// not using the enum type for 'Value' because zero is an implementation
// detail representing the non-value
uint16_t Value : 2;
uint16_t HiddenFlag : 2; // enum OptionHidden
uint16_t Formatting : 2; // enum FormattingFlags
uint16_t Misc : 5;
uint16_t FullyInitialized : 1; // Has addArgument been called?
uint16_t Position; // Position of last occurrence of the option
uint16_t AdditionalVals; // Greater than 0 for multi-valued option.
public:
StringRef ArgStr; // The argument string itself (ex: "help", "o")
StringRef HelpStr; // The descriptive text message for -help
StringRef ValueStr; // String describing what the value of this option is
SmallVector<OptionCategory *, 1>
Categories; // The Categories this option belongs to
SmallPtrSet<SubCommand *, 1> Subs; // The subcommands this option belongs to.
inline enum NumOccurrencesFlag getNumOccurrencesFlag() const {
return (enum NumOccurrencesFlag)Occurrences;
}
inline enum ValueExpected getValueExpectedFlag() const {
return Value ? ((enum ValueExpected)Value) : getValueExpectedFlagDefault();
}
inline enum OptionHidden getOptionHiddenFlag() const {
return (enum OptionHidden)HiddenFlag;
}
inline enum FormattingFlags getFormattingFlag() const {
return (enum FormattingFlags)Formatting;
}
inline unsigned getMiscFlags() const { return Misc; }
inline unsigned getPosition() const { return Position; }
inline unsigned getNumAdditionalVals() const { return AdditionalVals; }
// Return true if the argstr != ""
bool hasArgStr() const { return !ArgStr.empty(); }
bool isPositional() const { return getFormattingFlag() == cl::Positional; }
bool isSink() const { return getMiscFlags() & cl::Sink; }
bool isDefaultOption() const { return getMiscFlags() & cl::DefaultOption; }
bool isConsumeAfter() const {
return getNumOccurrencesFlag() == cl::ConsumeAfter;
}
bool isInAllSubCommands() const {
return Subs.contains(&SubCommand::getAll());
}
//-------------------------------------------------------------------------===
// Accessor functions set by OptionModifiers
//
void setArgStr(StringRef S);
void setDescription(StringRef S) { HelpStr = S; }
void setValueStr(StringRef S) { ValueStr = S; }
void setNumOccurrencesFlag(enum NumOccurrencesFlag Val) { Occurrences = Val; }
void setValueExpectedFlag(enum ValueExpected Val) { Value = Val; }
void setHiddenFlag(enum OptionHidden Val) { HiddenFlag = Val; }
void setFormattingFlag(enum FormattingFlags V) { Formatting = V; }
void setMiscFlag(enum MiscFlags M) { Misc |= M; }
void setPosition(unsigned pos) { Position = pos; }
void addCategory(OptionCategory &C);
void addSubCommand(SubCommand &S) { Subs.insert(&S); }
protected:
explicit Option(enum NumOccurrencesFlag OccurrencesFlag,
enum OptionHidden Hidden)
: NumOccurrences(0), Occurrences(OccurrencesFlag), Value(0),
HiddenFlag(Hidden), Formatting(NormalFormatting), Misc(0),
FullyInitialized(false), Position(0), AdditionalVals(0) {
Categories.push_back(&getGeneralCategory());
}
inline void setNumAdditionalVals(unsigned n) { AdditionalVals = n; }
public:
virtual ~Option() = default;
// Register this argument with the commandline system.
//
void addArgument();
/// Unregisters this option from the CommandLine system.
///
/// This option must have been the last option registered.
/// For testing purposes only.
void removeArgument();
// Return the width of the option tag for printing...
virtual size_t getOptionWidth() const = 0;
// Print out information about this option. The to-be-maintained width is
// specified.
//
virtual void printOptionInfo(size_t GlobalWidth) const = 0;
virtual void printOptionValue(size_t GlobalWidth, bool Force) const = 0;
virtual void setDefault() = 0;
// Prints the help string for an option.
//
// This maintains the Indent for multi-line descriptions.
// FirstLineIndentedBy is the count of chars of the first line
// i.e. the one containing the --<option name>.
static void printHelpStr(StringRef HelpStr, size_t Indent,
size_t FirstLineIndentedBy);
// Prints the help string for an enum value.
//
// This maintains the Indent for multi-line descriptions.
// FirstLineIndentedBy is the count of chars of the first line
// i.e. the one containing the =<value>.
static void printEnumValHelpStr(StringRef HelpStr, size_t Indent,
size_t FirstLineIndentedBy);
virtual void getExtraOptionNames(SmallVectorImpl<StringRef> &) {}
// Wrapper around handleOccurrence that enforces Flags.
//
virtual bool addOccurrence(unsigned pos, StringRef ArgName, StringRef Value,
bool MultiArg = false);
// Prints option name followed by message. Always returns true.
bool error(const Twine &Message, StringRef ArgName = StringRef(), raw_ostream &Errs = llvm::errs());
bool error(const Twine &Message, raw_ostream &Errs) {
return error(Message, StringRef(), Errs);
}
inline int getNumOccurrences() const { return NumOccurrences; }
void reset();
};
//===----------------------------------------------------------------------===//
// Command line option modifiers that can be used to modify the behavior of
// command line option parsers...
//
// Modifier to set the description shown in the -help output...
struct desc {
StringRef Desc;
desc(StringRef Str) : Desc(Str) {}
void apply(Option &O) const { O.setDescription(Desc); }
};
// Modifier to set the value description shown in the -help output...
struct value_desc {
StringRef Desc;
value_desc(StringRef Str) : Desc(Str) {}
void apply(Option &O) const { O.setValueStr(Desc); }
};
// Specify a default (initial) value for the command line argument, if the
// default constructor for the argument type does not give you what you want.
// This is only valid on "opt" arguments, not on "list" arguments.
template <class Ty> struct initializer {
const Ty &Init;
initializer(const Ty &Val) : Init(Val) {}
template <class Opt> void apply(Opt &O) const { O.setInitialValue(Init); }
};
template <class Ty> struct list_initializer {
ArrayRef<Ty> Inits;
list_initializer(ArrayRef<Ty> Vals) : Inits(Vals) {}
template <class Opt> void apply(Opt &O) const { O.setInitialValues(Inits); }
};
template <class Ty> initializer<Ty> init(const Ty &Val) {
return initializer<Ty>(Val);
}
template <class Ty>
list_initializer<Ty> list_init(ArrayRef<Ty> Vals) {
return list_initializer<Ty>(Vals);
}
// Allow the user to specify which external variable they want to store the
// results of the command line argument processing into, if they don't want to
// store it in the option itself.
template <class Ty> struct LocationClass {
Ty &Loc;
LocationClass(Ty &L) : Loc(L) {}
template <class Opt> void apply(Opt &O) const { O.setLocation(O, Loc); }
};
template <class Ty> LocationClass<Ty> location(Ty &L) {
return LocationClass<Ty>(L);
}
// Specify the Option category for the command line argument to belong to.
struct cat {
OptionCategory &Category;
cat(OptionCategory &c) : Category(c) {}
template <class Opt> void apply(Opt &O) const { O.addCategory(Category); }
};
// Specify the subcommand that this option belongs to.
struct sub {
SubCommand ⋐
sub(SubCommand &S) : Sub(S) {}
template <class Opt> void apply(Opt &O) const { O.addSubCommand(Sub); }
};
// Specify a callback function to be called when an option is seen.
// Can be used to set other options automatically.
template <typename R, typename Ty> struct cb {
std::function<R(Ty)> CB;
cb(std::function<R(Ty)> CB) : CB(CB) {}
template <typename Opt> void apply(Opt &O) const { O.setCallback(CB); }
};
namespace detail {
template <typename F>
struct callback_traits : public callback_traits<decltype(&F::operator())> {};
template <typename R, typename C, typename... Args>
struct callback_traits<R (C::*)(Args...) const> {
using result_type = R;
using arg_type = std::tuple_element_t<0, std::tuple<Args...>>;
static_assert(sizeof...(Args) == 1, "callback function must have one and only one parameter");
static_assert(std::is_same_v<result_type, void>,
"callback return type must be void");
static_assert(std::is_lvalue_reference_v<arg_type> &&
std::is_const_v<std::remove_reference_t<arg_type>>,
"callback arg_type must be a const lvalue reference");
};
} // namespace detail
template <typename F>
cb<typename detail::callback_traits<F>::result_type,
typename detail::callback_traits<F>::arg_type>
callback(F CB) {
using result_type = typename detail::callback_traits<F>::result_type;
using arg_type = typename detail::callback_traits<F>::arg_type;
return cb<result_type, arg_type>(CB);
}
//===----------------------------------------------------------------------===//
// Support value comparison outside the template.
struct GenericOptionValue {
virtual bool compare(const GenericOptionValue &V) const = 0;
protected:
GenericOptionValue() = default;
GenericOptionValue(const GenericOptionValue&) = default;
GenericOptionValue &operator=(const GenericOptionValue &) = default;
~GenericOptionValue() = default;
private:
virtual void anchor();
};
template <class DataType> struct OptionValue;
// The default value safely does nothing. Option value printing is only
// best-effort.
template <class DataType, bool isClass>
struct OptionValueBase : public GenericOptionValue {
// Temporary storage for argument passing.
using WrapperType = OptionValue<DataType>;
bool hasValue() const { return false; }
const DataType &getValue() const { llvm_unreachable("no default value"); }
// Some options may take their value from a different data type.
template <class DT> void setValue(const DT & /*V*/) {}
bool compare(const DataType & /*V*/) const { return false; }
bool compare(const GenericOptionValue & /*V*/) const override {
return false;
}
protected:
~OptionValueBase() = default;
};
// Simple copy of the option value.
template <class DataType> class OptionValueCopy : public GenericOptionValue {
DataType Value;
bool Valid = false;
protected:
OptionValueCopy(const OptionValueCopy&) = default;
OptionValueCopy &operator=(const OptionValueCopy &) = default;
~OptionValueCopy() = default;
public:
OptionValueCopy() = default;
bool hasValue() const { return Valid; }
const DataType &getValue() const {
assert(Valid && "invalid option value");
return Value;
}
void setValue(const DataType &V) {
Valid = true;
Value = V;
}
bool compare(const DataType &V) const { return Valid && (Value != V); }
bool compare(const GenericOptionValue &V) const override {
const OptionValueCopy<DataType> &VC =
static_cast<const OptionValueCopy<DataType> &>(V);
if (!VC.hasValue())
return false;
return compare(VC.getValue());
}
};
// Non-class option values.
template <class DataType>
struct OptionValueBase<DataType, false> : OptionValueCopy<DataType> {
using WrapperType = DataType;
protected:
OptionValueBase() = default;
OptionValueBase(const OptionValueBase&) = default;
OptionValueBase &operator=(const OptionValueBase &) = default;
~OptionValueBase() = default;
};
// Top-level option class.
template <class DataType>
struct OptionValue final
: OptionValueBase<DataType, std::is_class_v<DataType>> {
OptionValue() = default;
OptionValue(const DataType &V) { this->setValue(V); }
// Some options may take their value from a different data type.
template <class DT> OptionValue<DataType> &operator=(const DT &V) {
this->setValue(V);
return *this;
}
};
// Other safe-to-copy-by-value common option types.
enum boolOrDefault { BOU_UNSET, BOU_TRUE, BOU_FALSE };
template <>
struct OptionValue<cl::boolOrDefault> final
: OptionValueCopy<cl::boolOrDefault> {
using WrapperType = cl::boolOrDefault;
OptionValue() = default;
OptionValue(const cl::boolOrDefault &V) { this->setValue(V); }
OptionValue<cl::boolOrDefault> &operator=(const cl::boolOrDefault &V) {
setValue(V);
return *this;
}
private:
void anchor() override;
};
template <>
struct OptionValue<std::string> final : OptionValueCopy<std::string> {
using WrapperType = StringRef;
OptionValue() = default;
OptionValue(const std::string &V) { this->setValue(V); }
OptionValue<std::string> &operator=(const std::string &V) {
setValue(V);
return *this;
}
private:
void anchor() override;
};
//===----------------------------------------------------------------------===//
// Enum valued command line option
//
// This represents a single enum value, using "int" as the underlying type.
struct OptionEnumValue {
StringRef Name;
int Value;
StringRef Description;
};
#define clEnumVal(ENUMVAL, DESC) \
llvm::cl::OptionEnumValue { #ENUMVAL, int(ENUMVAL), DESC }
#define clEnumValN(ENUMVAL, FLAGNAME, DESC) \
llvm::cl::OptionEnumValue { FLAGNAME, int(ENUMVAL), DESC }
// For custom data types, allow specifying a group of values together as the
// values that go into the mapping that the option handler uses.
//
class ValuesClass {
// Use a vector instead of a map, because the lists should be short,
// the overhead is less, and most importantly, it keeps them in the order
// inserted so we can print our option out nicely.
SmallVector<OptionEnumValue, 4> Values;
public:
ValuesClass(std::initializer_list<OptionEnumValue> Options)
: Values(Options) {}
template <class Opt> void apply(Opt &O) const {
for (const auto &Value : Values)
O.getParser().addLiteralOption(Value.Name, Value.Value,
Value.Description);
}
};
/// Helper to build a ValuesClass by forwarding a variable number of arguments
/// as an initializer list to the ValuesClass constructor.
template <typename... OptsTy> ValuesClass values(OptsTy... Options) {
return ValuesClass({Options...});
}
//===----------------------------------------------------------------------===//
// Parameterizable parser for different data types. By default, known data types
// (string, int, bool) have specialized parsers, that do what you would expect.
// The default parser, used for data types that are not built-in, uses a mapping
// table to map specific options to values, which is used, among other things,
// to handle enum types.
//--------------------------------------------------
// This class holds all the non-generic code that we do not need replicated for
// every instance of the generic parser. This also allows us to put stuff into
// CommandLine.cpp
//
class generic_parser_base {
protected:
class GenericOptionInfo {
public:
GenericOptionInfo(StringRef name, StringRef helpStr)
: Name(name), HelpStr(helpStr) {}
StringRef Name;
StringRef HelpStr;
};
public:
generic_parser_base(Option &O) : Owner(O) {}
virtual ~generic_parser_base() = default;
// Base class should have virtual-destructor
// Virtual function implemented by generic subclass to indicate how many
// entries are in Values.
//
virtual unsigned getNumOptions() const = 0;
// Return option name N.
virtual StringRef getOption(unsigned N) const = 0;
// Return description N
virtual StringRef getDescription(unsigned N) const = 0;
// Return the width of the option tag for printing...
virtual size_t getOptionWidth(const Option &O) const;
virtual const GenericOptionValue &getOptionValue(unsigned N) const = 0;
// Print out information about this option. The to-be-maintained width is
// specified.
//
virtual void printOptionInfo(const Option &O, size_t GlobalWidth) const;
void printGenericOptionDiff(const Option &O, const GenericOptionValue &V,
const GenericOptionValue &Default,
size_t GlobalWidth) const;
// Print the value of an option and it's default.
//
// Template definition ensures that the option and default have the same
// DataType (via the same AnyOptionValue).
template <class AnyOptionValue>
void printOptionDiff(const Option &O, const AnyOptionValue &V,
const AnyOptionValue &Default,
size_t GlobalWidth) const {
printGenericOptionDiff(O, V, Default, GlobalWidth);
}
void initialize() {}
void getExtraOptionNames(SmallVectorImpl<StringRef> &OptionNames) {
// If there has been no argstr specified, that means that we need to add an
// argument for every possible option. This ensures that our options are
// vectored to us.
if (!Owner.hasArgStr())
for (unsigned i = 0, e = getNumOptions(); i != e; ++i)
OptionNames.push_back(getOption(i));
}
enum ValueExpected getValueExpectedFlagDefault() const {
// If there is an ArgStr specified, then we are of the form:
//
// -opt=O2 or -opt O2 or -optO2
//
// In which case, the value is required. Otherwise if an arg str has not
// been specified, we are of the form:
//
// -O2 or O2 or -la (where -l and -a are separate options)
//
// If this is the case, we cannot allow a value.
//
if (Owner.hasArgStr())
return ValueRequired;
else
return ValueDisallowed;
}
// Return the option number corresponding to the specified
// argument string. If the option is not found, getNumOptions() is returned.
//
unsigned findOption(StringRef Name);
protected:
Option &Owner;
};
// Default parser implementation - This implementation depends on having a
// mapping of recognized options to values of some sort. In addition to this,
// each entry in the mapping also tracks a help message that is printed with the
// command line option for -help. Because this is a simple mapping parser, the
// data type can be any unsupported type.
//
template <class DataType> class parser : public generic_parser_base {
protected:
class OptionInfo : public GenericOptionInfo {
public:
OptionInfo(StringRef name, DataType v, StringRef helpStr)
: GenericOptionInfo(name, helpStr), V(v) {}
OptionValue<DataType> V;
};
SmallVector<OptionInfo, 8> Values;
public:
parser(Option &O) : generic_parser_base(O) {}
using parser_data_type = DataType;
// Implement virtual functions needed by generic_parser_base
unsigned getNumOptions() const override { return unsigned(Values.size()); }
StringRef getOption(unsigned N) const override { return Values[N].Name; }
StringRef getDescription(unsigned N) const override {
return Values[N].HelpStr;
}
// Return the value of option name N.
const GenericOptionValue &getOptionValue(unsigned N) const override {
return Values[N].V;
}
// Return true on error.
bool parse(Option &O, StringRef ArgName, StringRef Arg, DataType &V) {
StringRef ArgVal;
if (Owner.hasArgStr())
ArgVal = Arg;
else
ArgVal = ArgName;
for (size_t i = 0, e = Values.size(); i != e; ++i)
if (Values[i].Name == ArgVal) {
V = Values[i].V.getValue();
return false;
}
return O.error("Cannot find option named '" + ArgVal + "'!");
}
/// Add an entry to the mapping table.
///
template <class DT>
void addLiteralOption(StringRef Name, const DT &V, StringRef HelpStr) {
assert(findOption(Name) == Values.size() && "Option already exists!");
OptionInfo X(Name, static_cast<DataType>(V), HelpStr);
Values.push_back(X);
AddLiteralOption(Owner, Name);
}
/// Remove the specified option.
///
void removeLiteralOption(StringRef Name) {
unsigned N = findOption(Name);
assert(N != Values.size() && "Option not found!");
Values.erase(Values.begin() + N);
}
};
//--------------------------------------------------
// Super class of parsers to provide boilerplate code
//
class basic_parser_impl { // non-template implementation of basic_parser<t>
public:
basic_parser_impl(Option &) {}
virtual ~basic_parser_impl() = default;
enum ValueExpected getValueExpectedFlagDefault() const {
return ValueRequired;
}
void getExtraOptionNames(SmallVectorImpl<StringRef> &) {}
void initialize() {}
// Return the width of the option tag for printing...
size_t getOptionWidth(const Option &O) const;
// Print out information about this option. The to-be-maintained width is
// specified.
//
void printOptionInfo(const Option &O, size_t GlobalWidth) const;
// Print a placeholder for options that don't yet support printOptionDiff().
void printOptionNoValue(const Option &O, size_t GlobalWidth) const;
// Overload in subclass to provide a better default value.
virtual StringRef getValueName() const { return "value"; }
// An out-of-line virtual method to provide a 'home' for this class.
virtual void anchor();
protected:
// A helper for basic_parser::printOptionDiff.
void printOptionName(const Option &O, size_t GlobalWidth) const;
};
// The real basic parser is just a template wrapper that provides a typedef for
// the provided data type.
//
template <class DataType> class basic_parser : public basic_parser_impl {
public:
using parser_data_type = DataType;
using OptVal = OptionValue<DataType>;
basic_parser(Option &O) : basic_parser_impl(O) {}
};
//--------------------------------------------------
extern template class basic_parser<bool>;
template <> class parser<bool> : public basic_parser<bool> {
public:
parser(Option &O) : basic_parser(O) {}
// Return true on error.
bool parse(Option &O, StringRef ArgName, StringRef Arg, bool &Val);
void initialize() {}
enum ValueExpected getValueExpectedFlagDefault() const {
return ValueOptional;
}
// Do not print =<value> at all.
StringRef getValueName() const override { return StringRef(); }
void printOptionDiff(const Option &O, bool V, OptVal Default,
size_t GlobalWidth) const;
// An out-of-line virtual method to provide a 'home' for this class.
void anchor() override;
};
//--------------------------------------------------
extern template class basic_parser<boolOrDefault>;
template <> class parser<boolOrDefault> : public basic_parser<boolOrDefault> {
public:
parser(Option &O) : basic_parser(O) {}
// Return true on error.
bool parse(Option &O, StringRef ArgName, StringRef Arg, boolOrDefault &Val);
enum ValueExpected getValueExpectedFlagDefault() const {
return ValueOptional;
}
// Do not print =<value> at all.
StringRef getValueName() const override { return StringRef(); }
void printOptionDiff(const Option &O, boolOrDefault V, OptVal Default,
size_t GlobalWidth) const;
// An out-of-line virtual method to provide a 'home' for this class.
void anchor() override;
};
//--------------------------------------------------
extern template class basic_parser<int>;
template <> class parser<int> : public basic_parser<int> {
public:
parser(Option &O) : basic_parser(O) {}
// Return true on error.
bool parse(Option &O, StringRef ArgName, StringRef Arg, int &Val);
// Overload in subclass to provide a better default value.
StringRef getValueName() const override { return "int"; }
void printOptionDiff(const Option &O, int V, OptVal Default,
size_t GlobalWidth) const;
// An out-of-line virtual method to provide a 'home' for this class.
void anchor() override;
};
//--------------------------------------------------
extern template class basic_parser<long>;
template <> class parser<long> final : public basic_parser<long> {
public:
parser(Option &O) : basic_parser(O) {}
// Return true on error.
bool parse(Option &O, StringRef ArgName, StringRef Arg, long &Val);
// Overload in subclass to provide a better default value.
StringRef getValueName() const override { return "long"; }
void printOptionDiff(const Option &O, long V, OptVal Default,
size_t GlobalWidth) const;
// An out-of-line virtual method to provide a 'home' for this class.
void anchor() override;
};
//--------------------------------------------------
extern template class basic_parser<long long>;
template <> class parser<long long> : public basic_parser<long long> {
public:
parser(Option &O) : basic_parser(O) {}
// Return true on error.
bool parse(Option &O, StringRef ArgName, StringRef Arg, long long &Val);
// Overload in subclass to provide a better default value.
StringRef getValueName() const override { return "long"; }
void printOptionDiff(const Option &O, long long V, OptVal Default,
size_t GlobalWidth) const;
// An out-of-line virtual method to provide a 'home' for this class.
void anchor() override;
};
//--------------------------------------------------
extern template class basic_parser<unsigned>;
template <> class parser<unsigned> : public basic_parser<unsigned> {
public:
parser(Option &O) : basic_parser(O) {}
// Return true on error.
bool parse(Option &O, StringRef ArgName, StringRef Arg, unsigned &Val);
// Overload in subclass to provide a better default value.
StringRef getValueName() const override { return "uint"; }
void printOptionDiff(const Option &O, unsigned V, OptVal Default,
size_t GlobalWidth) const;
// An out-of-line virtual method to provide a 'home' for this class.
void anchor() override;
};
//--------------------------------------------------
extern template class basic_parser<unsigned long>;
template <>
class parser<unsigned long> final : public basic_parser<unsigned long> {
public:
parser(Option &O) : basic_parser(O) {}
// Return true on error.
bool parse(Option &O, StringRef ArgName, StringRef Arg, unsigned long &Val);
// Overload in subclass to provide a better default value.
StringRef getValueName() const override { return "ulong"; }
void printOptionDiff(const Option &O, unsigned long V, OptVal Default,
size_t GlobalWidth) const;
// An out-of-line virtual method to provide a 'home' for this class.
void anchor() override;
};
//--------------------------------------------------
extern template class basic_parser<unsigned long long>;
template <>
class parser<unsigned long long> : public basic_parser<unsigned long long> {
public:
parser(Option &O) : basic_parser(O) {}
// Return true on error.
bool parse(Option &O, StringRef ArgName, StringRef Arg,
unsigned long long &Val);
// Overload in subclass to provide a better default value.
StringRef getValueName() const override { return "ulong"; }
void printOptionDiff(const Option &O, unsigned long long V, OptVal Default,
size_t GlobalWidth) const;
// An out-of-line virtual method to provide a 'home' for this class.
void anchor() override;
};
//--------------------------------------------------
extern template class basic_parser<double>;
template <> class parser<double> : public basic_parser<double> {
public:
parser(Option &O) : basic_parser(O) {}
// Return true on error.
bool parse(Option &O, StringRef ArgName, StringRef Arg, double &Val);
// Overload in subclass to provide a better default value.
StringRef getValueName() const override { return "number"; }
void printOptionDiff(const Option &O, double V, OptVal Default,
size_t GlobalWidth) const;
// An out-of-line virtual method to provide a 'home' for this class.
void anchor() override;
};
//--------------------------------------------------
extern template class basic_parser<float>;
template <> class parser<float> : public basic_parser<float> {
public:
parser(Option &O) : basic_parser(O) {}
// Return true on error.
bool parse(Option &O, StringRef ArgName, StringRef Arg, float &Val);
// Overload in subclass to provide a better default value.
StringRef getValueName() const override { return "number"; }
void printOptionDiff(const Option &O, float V, OptVal Default,
size_t GlobalWidth) const;
// An out-of-line virtual method to provide a 'home' for this class.
void anchor() override;
};
//--------------------------------------------------
extern template class basic_parser<std::string>;
template <> class parser<std::string> : public basic_parser<std::string> {
public:
parser(Option &O) : basic_parser(O) {}
// Return true on error.
bool parse(Option &, StringRef, StringRef Arg, std::string &Value) {
Value = Arg.str();
return false;
}
// Overload in subclass to provide a better default value.
StringRef getValueName() const override { return "string"; }
void printOptionDiff(const Option &O, StringRef V, const OptVal &Default,
size_t GlobalWidth) const;
// An out-of-line virtual method to provide a 'home' for this class.
void anchor() override;
};
//--------------------------------------------------
extern template class basic_parser<char>;
template <> class parser<char> : public basic_parser<char> {
public:
parser(Option &O) : basic_parser(O) {}
// Return true on error.
bool parse(Option &, StringRef, StringRef Arg, char &Value) {
Value = Arg[0];
return false;
}
// Overload in subclass to provide a better default value.
StringRef getValueName() const override { return "char"; }
void printOptionDiff(const Option &O, char V, OptVal Default,
size_t GlobalWidth) const;
// An out-of-line virtual method to provide a 'home' for this class.
void anchor() override;
};
//--------------------------------------------------
// This collection of wrappers is the intermediary between class opt and class
// parser to handle all the template nastiness.
// This overloaded function is selected by the generic parser.
template <class ParserClass, class DT>
void printOptionDiff(const Option &O, const generic_parser_base &P, const DT &V,
const OptionValue<DT> &Default, size_t GlobalWidth) {
OptionValue<DT> OV = V;
P.printOptionDiff(O, OV, Default, GlobalWidth);
}
// This is instantiated for basic parsers when the parsed value has a different
// type than the option value. e.g. HelpPrinter.
template <class ParserDT, class ValDT> struct OptionDiffPrinter {
void print(const Option &O, const parser<ParserDT> &P, const ValDT & /*V*/,
const OptionValue<ValDT> & /*Default*/, size_t GlobalWidth) {
P.printOptionNoValue(O, GlobalWidth);
}
};
// This is instantiated for basic parsers when the parsed value has the same
// type as the option value.
template <class DT> struct OptionDiffPrinter<DT, DT> {
void print(const Option &O, const parser<DT> &P, const DT &V,
const OptionValue<DT> &Default, size_t GlobalWidth) {
P.printOptionDiff(O, V, Default, GlobalWidth);
}
};
// This overloaded function is selected by the basic parser, which may parse a
// different type than the option type.
template <class ParserClass, class ValDT>
void printOptionDiff(
const Option &O,
const basic_parser<typename ParserClass::parser_data_type> &P,
const ValDT &V, const OptionValue<ValDT> &Default, size_t GlobalWidth) {
OptionDiffPrinter<typename ParserClass::parser_data_type, ValDT> printer;
printer.print(O, static_cast<const ParserClass &>(P), V, Default,
GlobalWidth);
}
//===----------------------------------------------------------------------===//
// This class is used because we must use partial specialization to handle
// literal string arguments specially (const char* does not correctly respond to
// the apply method). Because the syntax to use this is a pain, we have the
// 'apply' method below to handle the nastiness...
//
template <class Mod> struct applicator {
template <class Opt> static void opt(const Mod &M, Opt &O) { M.apply(O); }
};
// Handle const char* as a special case...
template <unsigned n> struct applicator<char[n]> {
template <class Opt> static void opt(StringRef Str, Opt &O) {
O.setArgStr(Str);
}
};
template <unsigned n> struct applicator<const char[n]> {
template <class Opt> static void opt(StringRef Str, Opt &O) {
O.setArgStr(Str);
}
};
template <> struct applicator<StringRef > {
template <class Opt> static void opt(StringRef Str, Opt &O) {
O.setArgStr(Str);
}
};
template <> struct applicator<NumOccurrencesFlag> {
static void opt(NumOccurrencesFlag N, Option &O) {
O.setNumOccurrencesFlag(N);
}
};
template <> struct applicator<ValueExpected> {
static void opt(ValueExpected VE, Option &O) { O.setValueExpectedFlag(VE); }
};
template <> struct applicator<OptionHidden> {
static void opt(OptionHidden OH, Option &O) { O.setHiddenFlag(OH); }
};
template <> struct applicator<FormattingFlags> {
static void opt(FormattingFlags FF, Option &O) { O.setFormattingFlag(FF); }
};
template <> struct applicator<MiscFlags> {
static void opt(MiscFlags MF, Option &O) {
assert((MF != Grouping || O.ArgStr.size() == 1) &&
"cl::Grouping can only apply to single character Options.");
O.setMiscFlag(MF);
}
};
// Apply modifiers to an option in a type safe way.
template <class Opt, class Mod, class... Mods>
void apply(Opt *O, const Mod &M, const Mods &... Ms) {
applicator<Mod>::opt(M, *O);
apply(O, Ms...);
}
template <class Opt, class Mod> void apply(Opt *O, const Mod &M) {
applicator<Mod>::opt(M, *O);
}
//===----------------------------------------------------------------------===//
// Default storage class definition: external storage. This implementation
// assumes the user will specify a variable to store the data into with the
// cl::location(x) modifier.
//
template <class DataType, bool ExternalStorage, bool isClass>
class opt_storage {
DataType *Location = nullptr; // Where to store the object...
OptionValue<DataType> Default;
void check_location() const {
assert(Location && "cl::location(...) not specified for a command "
"line option with external storage, "
"or cl::init specified before cl::location()!!");
}
public:
opt_storage() = default;
bool setLocation(Option &O, DataType &L) {
if (Location)
return O.error("cl::location(x) specified more than once!");
Location = &L;
Default = L;
return false;
}
template <class T> void setValue(const T &V, bool initial = false) {
check_location();
*Location = V;
if (initial)
Default = V;
}
DataType &getValue() {
check_location();
return *Location;
}
const DataType &getValue() const {
check_location();
return *Location;
}
operator DataType() const { return this->getValue(); }
const OptionValue<DataType> &getDefault() const { return Default; }
};
// Define how to hold a class type object, such as a string. Since we can
// inherit from a class, we do so. This makes us exactly compatible with the
// object in all cases that it is used.
//
template <class DataType>
class opt_storage<DataType, false, true> : public DataType {
public:
OptionValue<DataType> Default;
template <class T> void setValue(const T &V, bool initial = false) {
DataType::operator=(V);
if (initial)
Default = V;
}
DataType &getValue() { return *this; }
const DataType &getValue() const { return *this; }
const OptionValue<DataType> &getDefault() const { return Default; }
};
// Define a partial specialization to handle things we cannot inherit from. In
// this case, we store an instance through containment, and overload operators
// to get at the value.
//
template <class DataType> class opt_storage<DataType, false, false> {
public:
DataType Value;
OptionValue<DataType> Default;
// Make sure we initialize the value with the default constructor for the
// type.
opt_storage() : Value(DataType()), Default() {}
template <class T> void setValue(const T &V, bool initial = false) {
Value = V;
if (initial)
Default = V;
}
DataType &getValue() { return Value; }
DataType getValue() const { return Value; }
const OptionValue<DataType> &getDefault() const { return Default; }
operator DataType() const { return getValue(); }
// If the datatype is a pointer, support -> on it.
DataType operator->() const { return Value; }
};
//===----------------------------------------------------------------------===//
// A scalar command line option.
//
template <class DataType, bool ExternalStorage = false,
class ParserClass = parser<DataType>>
class opt
: public Option,
public opt_storage<DataType, ExternalStorage, std::is_class_v<DataType>> {
ParserClass Parser;
bool handleOccurrence(unsigned pos, StringRef ArgName,
StringRef Arg) override {
typename ParserClass::parser_data_type Val =
typename ParserClass::parser_data_type();
if (Parser.parse(*this, ArgName, Arg, Val))
return true; // Parse error!
this->setValue(Val);
this->setPosition(pos);
Callback(Val);
return false;
}
enum ValueExpected getValueExpectedFlagDefault() const override {
return Parser.getValueExpectedFlagDefault();
}
void getExtraOptionNames(SmallVectorImpl<StringRef> &OptionNames) override {
return Parser.getExtraOptionNames(OptionNames);
}
// Forward printing stuff to the parser...
size_t getOptionWidth() const override {
return Parser.getOptionWidth(*this);
}
void printOptionInfo(size_t GlobalWidth) const override {
Parser.printOptionInfo(*this, GlobalWidth);
}
void printOptionValue(size_t GlobalWidth, bool Force) const override {
if (Force || this->getDefault().compare(this->getValue())) {
cl::printOptionDiff<ParserClass>(*this, Parser, this->getValue(),
this->getDefault(), GlobalWidth);
}
}
template <class T, class = std::enable_if_t<std::is_assignable_v<T &, T>>>
void setDefaultImpl() {
const OptionValue<DataType> &V = this->getDefault();
if (V.hasValue())
this->setValue(V.getValue());
else
this->setValue(T());
}
template <class T, class = std::enable_if_t<!std::is_assignable_v<T &, T>>>
void setDefaultImpl(...) {}
void setDefault() override { setDefaultImpl<DataType>(); }
void done() {
addArgument();
Parser.initialize();
}
public:
// Command line options should not be copyable
opt(const opt &) = delete;
opt &operator=(const opt &) = delete;
// setInitialValue - Used by the cl::init modifier...
void setInitialValue(const DataType &V) { this->setValue(V, true); }
ParserClass &getParser() { return Parser; }
template <class T> DataType &operator=(const T &Val) {
this->setValue(Val);
Callback(Val);
return this->getValue();
}
template <class... Mods>
explicit opt(const Mods &... Ms)
: Option(llvm::cl::Optional, NotHidden), Parser(*this) {
apply(this, Ms...);
done();
}
void setCallback(
std::function<void(const typename ParserClass::parser_data_type &)> CB) {
Callback = CB;
}
std::function<void(const typename ParserClass::parser_data_type &)> Callback =
[](const typename ParserClass::parser_data_type &) {};
};
extern template class opt<unsigned>;
extern template class opt<int>;
extern template class opt<std::string>;
extern template class opt<char>;
extern template class opt<bool>;
//===----------------------------------------------------------------------===//
// Default storage class definition: external storage. This implementation
// assumes the user will specify a variable to store the data into with the
// cl::location(x) modifier.
//
template <class DataType, class StorageClass> class list_storage {
StorageClass *Location = nullptr; // Where to store the object...
std::vector<OptionValue<DataType>> Default =
std::vector<OptionValue<DataType>>();
bool DefaultAssigned = false;
public:
list_storage() = default;
void clear() {}
bool setLocation(Option &O, StorageClass &L) {
if (Location)
return O.error("cl::location(x) specified more than once!");
Location = &L;
return false;
}
template <class T> void addValue(const T &V, bool initial = false) {
assert(Location != nullptr &&
"cl::location(...) not specified for a command "
"line option with external storage!");
Location->push_back(V);
if (initial)
Default.push_back(V);
}
const std::vector<OptionValue<DataType>> &getDefault() const {
return Default;
}
void assignDefault() { DefaultAssigned = true; }
void overwriteDefault() { DefaultAssigned = false; }
bool isDefaultAssigned() { return DefaultAssigned; }
};
// Define how to hold a class type object, such as a string.
// Originally this code inherited from std::vector. In transitioning to a new
// API for command line options we should change this. The new implementation
// of this list_storage specialization implements the minimum subset of the
// std::vector API required for all the current clients.
//
// FIXME: Reduce this API to a more narrow subset of std::vector
//
template <class DataType> class list_storage<DataType, bool> {
std::vector<DataType> Storage;
std::vector<OptionValue<DataType>> Default;
bool DefaultAssigned = false;
public:
using iterator = typename std::vector<DataType>::iterator;
iterator begin() { return Storage.begin(); }
iterator end() { return Storage.end(); }
using const_iterator = typename std::vector<DataType>::const_iterator;
const_iterator begin() const { return Storage.begin(); }
const_iterator end() const { return Storage.end(); }
using size_type = typename std::vector<DataType>::size_type;
size_type size() const { return Storage.size(); }
bool empty() const { return Storage.empty(); }
void push_back(const DataType &value) { Storage.push_back(value); }
void push_back(DataType &&value) { Storage.push_back(value); }
using reference = typename std::vector<DataType>::reference;
using const_reference = typename std::vector<DataType>::const_reference;
reference operator[](size_type pos) { return Storage[pos]; }
const_reference operator[](size_type pos) const { return Storage[pos]; }
void clear() {
Storage.clear();
}
iterator erase(const_iterator pos) { return Storage.erase(pos); }
iterator erase(const_iterator first, const_iterator last) {
return Storage.erase(first, last);
}
iterator erase(iterator pos) { return Storage.erase(pos); }
iterator erase(iterator first, iterator last) {
return Storage.erase(first, last);
}
iterator insert(const_iterator pos, const DataType &value) {
return Storage.insert(pos, value);
}
iterator insert(const_iterator pos, DataType &&value) {
return Storage.insert(pos, value);
}
iterator insert(iterator pos, const DataType &value) {
return Storage.insert(pos, value);
}
iterator insert(iterator pos, DataType &&value) {
return Storage.insert(pos, value);
}
reference front() { return Storage.front(); }
const_reference front() const { return Storage.front(); }
operator std::vector<DataType> &() { return Storage; }
operator ArrayRef<DataType>() const { return Storage; }
std::vector<DataType> *operator&() { return &Storage; }
const std::vector<DataType> *operator&() const { return &Storage; }
template <class T> void addValue(const T &V, bool initial = false) {
Storage.push_back(V);
if (initial)
Default.push_back(OptionValue<DataType>(V));
}
const std::vector<OptionValue<DataType>> &getDefault() const {
return Default;
}
void assignDefault() { DefaultAssigned = true; }
void overwriteDefault() { DefaultAssigned = false; }
bool isDefaultAssigned() { return DefaultAssigned; }
};
//===----------------------------------------------------------------------===//
// A list of command line options.
//
template <class DataType, class StorageClass = bool,
class ParserClass = parser<DataType>>
class list : public Option, public list_storage<DataType, StorageClass> {
std::vector<unsigned> Positions;
ParserClass Parser;
enum ValueExpected getValueExpectedFlagDefault() const override {
return Parser.getValueExpectedFlagDefault();
}
void getExtraOptionNames(SmallVectorImpl<StringRef> &OptionNames) override {
return Parser.getExtraOptionNames(OptionNames);
}
bool handleOccurrence(unsigned pos, StringRef ArgName,
StringRef Arg) override {
typename ParserClass::parser_data_type Val =
typename ParserClass::parser_data_type();
if (list_storage<DataType, StorageClass>::isDefaultAssigned()) {
clear();
list_storage<DataType, StorageClass>::overwriteDefault();
}
if (Parser.parse(*this, ArgName, Arg, Val))
return true; // Parse Error!
list_storage<DataType, StorageClass>::addValue(Val);
setPosition(pos);
Positions.push_back(pos);
Callback(Val);
return false;
}
// Forward printing stuff to the parser...
size_t getOptionWidth() const override {
return Parser.getOptionWidth(*this);
}
void printOptionInfo(size_t GlobalWidth) const override {
Parser.printOptionInfo(*this, GlobalWidth);
}
// Unimplemented: list options don't currently store their default value.
void printOptionValue(size_t /*GlobalWidth*/, bool /*Force*/) const override {
}
void setDefault() override {
Positions.clear();
list_storage<DataType, StorageClass>::clear();
for (auto &Val : list_storage<DataType, StorageClass>::getDefault())
list_storage<DataType, StorageClass>::addValue(Val.getValue());
}
void done() {
addArgument();
Parser.initialize();
}
public:
// Command line options should not be copyable
list(const list &) = delete;
list &operator=(const list &) = delete;
ParserClass &getParser() { return Parser; }
unsigned getPosition(unsigned optnum) const {
assert(optnum < this->size() && "Invalid option index");
return Positions[optnum];
}
void clear() {
Positions.clear();
list_storage<DataType, StorageClass>::clear();
}
// setInitialValues - Used by the cl::list_init modifier...
void setInitialValues(ArrayRef<DataType> Vs) {
assert(!(list_storage<DataType, StorageClass>::isDefaultAssigned()) &&
"Cannot have two default values");
list_storage<DataType, StorageClass>::assignDefault();
for (auto &Val : Vs)
list_storage<DataType, StorageClass>::addValue(Val, true);
}
void setNumAdditionalVals(unsigned n) { Option::setNumAdditionalVals(n); }
template <class... Mods>
explicit list(const Mods &... Ms)
: Option(ZeroOrMore, NotHidden), Parser(*this) {
apply(this, Ms...);
done();
}
void setCallback(
std::function<void(const typename ParserClass::parser_data_type &)> CB) {
Callback = CB;
}
std::function<void(const typename ParserClass::parser_data_type &)> Callback =
[](const typename ParserClass::parser_data_type &) {};
};
// Modifier to set the number of additional values.
struct multi_val {
unsigned AdditionalVals;
explicit multi_val(unsigned N) : AdditionalVals(N) {}
template <typename D, typename S, typename P>
void apply(list<D, S, P> &L) const {
L.setNumAdditionalVals(AdditionalVals);
}
};
//===----------------------------------------------------------------------===//
// Default storage class definition: external storage. This implementation
// assumes the user will specify a variable to store the data into with the
// cl::location(x) modifier.
//
template <class DataType, class StorageClass> class bits_storage {
unsigned *Location = nullptr; // Where to store the bits...
template <class T> static unsigned Bit(const T &V) {
unsigned BitPos = static_cast<unsigned>(V);
assert(BitPos < sizeof(unsigned) * CHAR_BIT &&
"enum exceeds width of bit vector!");
return 1 << BitPos;
}
public:
bits_storage() = default;
bool setLocation(Option &O, unsigned &L) {
if (Location)
return O.error("cl::location(x) specified more than once!");
Location = &L;
return false;
}
template <class T> void addValue(const T &V) {
assert(Location != nullptr &&
"cl::location(...) not specified for a command "
"line option with external storage!");
*Location |= Bit(V);
}
unsigned getBits() { return *Location; }
void clear() {
if (Location)
*Location = 0;
}
template <class T> bool isSet(const T &V) {
return (*Location & Bit(V)) != 0;
}
};
// Define how to hold bits. Since we can inherit from a class, we do so.
// This makes us exactly compatible with the bits in all cases that it is used.
//
template <class DataType> class bits_storage<DataType, bool> {
unsigned Bits{0}; // Where to store the bits...
template <class T> static unsigned Bit(const T &V) {
unsigned BitPos = static_cast<unsigned>(V);
assert(BitPos < sizeof(unsigned) * CHAR_BIT &&
"enum exceeds width of bit vector!");
return 1 << BitPos;
}
public:
template <class T> void addValue(const T &V) { Bits |= Bit(V); }
unsigned getBits() { return Bits; }
void clear() { Bits = 0; }
template <class T> bool isSet(const T &V) { return (Bits & Bit(V)) != 0; }
};
//===----------------------------------------------------------------------===//
// A bit vector of command options.
//
template <class DataType, class Storage = bool,
class ParserClass = parser<DataType>>
class bits : public Option, public bits_storage<DataType, Storage> {
std::vector<unsigned> Positions;
ParserClass Parser;
enum ValueExpected getValueExpectedFlagDefault() const override {
return Parser.getValueExpectedFlagDefault();
}
void getExtraOptionNames(SmallVectorImpl<StringRef> &OptionNames) override {
return Parser.getExtraOptionNames(OptionNames);
}
bool handleOccurrence(unsigned pos, StringRef ArgName,
StringRef Arg) override {
typename ParserClass::parser_data_type Val =
typename ParserClass::parser_data_type();
if (Parser.parse(*this, ArgName, Arg, Val))
return true; // Parse Error!
this->addValue(Val);
setPosition(pos);
Positions.push_back(pos);
Callback(Val);
return false;
}
// Forward printing stuff to the parser...
size_t getOptionWidth() const override {
return Parser.getOptionWidth(*this);
}
void printOptionInfo(size_t GlobalWidth) const override {
Parser.printOptionInfo(*this, GlobalWidth);
}
// Unimplemented: bits options don't currently store their default values.
void printOptionValue(size_t /*GlobalWidth*/, bool /*Force*/) const override {
}
void setDefault() override { bits_storage<DataType, Storage>::clear(); }
void done() {
addArgument();
Parser.initialize();
}
public:
// Command line options should not be copyable
bits(const bits &) = delete;
bits &operator=(const bits &) = delete;
ParserClass &getParser() { return Parser; }
unsigned getPosition(unsigned optnum) const {
assert(optnum < this->size() && "Invalid option index");
return Positions[optnum];
}
template <class... Mods>
explicit bits(const Mods &... Ms)
: Option(ZeroOrMore, NotHidden), Parser(*this) {
apply(this, Ms...);
done();
}
void setCallback(
std::function<void(const typename ParserClass::parser_data_type &)> CB) {
Callback = CB;
}
std::function<void(const typename ParserClass::parser_data_type &)> Callback =
[](const typename ParserClass::parser_data_type &) {};
};
//===----------------------------------------------------------------------===//
// Aliased command line option (alias this name to a preexisting name)
//
class alias : public Option {
Option *AliasFor;
bool handleOccurrence(unsigned pos, StringRef /*ArgName*/,
StringRef Arg) override {
return AliasFor->handleOccurrence(pos, AliasFor->ArgStr, Arg);
}
bool addOccurrence(unsigned pos, StringRef /*ArgName*/, StringRef Value,
bool MultiArg = false) override {
return AliasFor->addOccurrence(pos, AliasFor->ArgStr, Value, MultiArg);
}
// Handle printing stuff...
size_t getOptionWidth() const override;
void printOptionInfo(size_t GlobalWidth) const override;
// Aliases do not need to print their values.
void printOptionValue(size_t /*GlobalWidth*/, bool /*Force*/) const override {
}
void setDefault() override { AliasFor->setDefault(); }
ValueExpected getValueExpectedFlagDefault() const override {
return AliasFor->getValueExpectedFlag();
}
void done() {
if (!hasArgStr())
error("cl::alias must have argument name specified!");
if (!AliasFor)
error("cl::alias must have an cl::aliasopt(option) specified!");
if (!Subs.empty())
error("cl::alias must not have cl::sub(), aliased option's cl::sub() will be used!");
Subs = AliasFor->Subs;
Categories = AliasFor->Categories;
addArgument();
}
public:
// Command line options should not be copyable
alias(const alias &) = delete;
alias &operator=(const alias &) = delete;
void setAliasFor(Option &O) {
if (AliasFor)
error("cl::alias must only have one cl::aliasopt(...) specified!");
AliasFor = &O;
}
template <class... Mods>
explicit alias(const Mods &... Ms)
: Option(Optional, Hidden), AliasFor(nullptr) {
apply(this, Ms...);
done();
}
};
// Modifier to set the option an alias aliases.
struct aliasopt {
Option &Opt;
explicit aliasopt(Option &O) : Opt(O) {}
void apply(alias &A) const { A.setAliasFor(Opt); }
};
// Provide additional help at the end of the normal help output. All occurrences
// of cl::extrahelp will be accumulated and printed to stderr at the end of the
// regular help, just before exit is called.
struct extrahelp {
StringRef morehelp;
explicit extrahelp(StringRef help);
};
void PrintVersionMessage();
/// This function just prints the help message, exactly the same way as if the
/// -help or -help-hidden option had been given on the command line.
///
/// \param Hidden if true will print hidden options
/// \param Categorized if true print options in categories
void PrintHelpMessage(bool Hidden = false, bool Categorized = false);
//===----------------------------------------------------------------------===//
// Public interface for accessing registered options.
//
/// Use this to get a StringMap to all registered named options
/// (e.g. -help).
///
/// \return A reference to the StringMap used by the cl APIs to parse options.
///
/// Access to unnamed arguments (i.e. positional) are not provided because
/// it is expected that the client already has access to these.
///
/// Typical usage:
/// \code
/// main(int argc,char* argv[]) {
/// StringMap<llvm::cl::Option*> &opts = llvm::cl::getRegisteredOptions();
/// assert(opts.count("help") == 1)
/// opts["help"]->setDescription("Show alphabetical help information")
/// // More code
/// llvm::cl::ParseCommandLineOptions(argc,argv);
/// //More code
/// }
/// \endcode
///
/// This interface is useful for modifying options in libraries that are out of
/// the control of the client. The options should be modified before calling
/// llvm::cl::ParseCommandLineOptions().
///
/// Hopefully this API can be deprecated soon. Any situation where options need
/// to be modified by tools or libraries should be handled by sane APIs rather
/// than just handing around a global list.
StringMap<Option *> &
getRegisteredOptions(SubCommand &Sub = SubCommand::getTopLevel());
/// Use this to get all registered SubCommands from the provided parser.
///
/// \return A range of all SubCommand pointers registered with the parser.
///
/// Typical usage:
/// \code
/// main(int argc, char* argv[]) {
/// llvm::cl::ParseCommandLineOptions(argc, argv);
/// for (auto* S : llvm::cl::getRegisteredSubcommands()) {
/// if (*S) {
/// std::cout << "Executing subcommand: " << S->getName() << std::endl;
/// // Execute some function based on the name...
/// }
/// }
/// }
/// \endcode
///
/// This interface is useful for defining subcommands in libraries and
/// the dispatch from a single point (like in the main function).
iterator_range<typename SmallPtrSet<SubCommand *, 4>::iterator>
getRegisteredSubcommands();
//===----------------------------------------------------------------------===//
// Standalone command line processing utilities.
//
/// Tokenizes a command line that can contain escapes and quotes.
//
/// The quoting rules match those used by GCC and other tools that use
/// libiberty's buildargv() or expandargv() utilities, and do not match bash.
/// They differ from buildargv() on treatment of backslashes that do not escape
/// a special character to make it possible to accept most Windows file paths.
///
/// \param [in] Source The string to be split on whitespace with quotes.
/// \param [in] Saver Delegates back to the caller for saving parsed strings.
/// \param [in] MarkEOLs true if tokenizing a response file and you want end of
/// lines and end of the response file to be marked with a nullptr string.
/// \param [out] NewArgv All parsed strings are appended to NewArgv.
void TokenizeGNUCommandLine(StringRef Source, StringSaver &Saver,
SmallVectorImpl<const char *> &NewArgv,
bool MarkEOLs = false);
/// Tokenizes a string of Windows command line arguments, which may contain
/// quotes and escaped quotes.
///
/// See MSDN docs for CommandLineToArgvW for information on the quoting rules.
/// http://msdn.microsoft.com/en-us/library/windows/desktop/17w5ykft(v=vs.85).aspx
///
/// For handling a full Windows command line including the executable name at
/// the start, see TokenizeWindowsCommandLineFull below.
///
/// \param [in] Source The string to be split on whitespace with quotes.
/// \param [in] Saver Delegates back to the caller for saving parsed strings.
/// \param [in] MarkEOLs true if tokenizing a response file and you want end of
/// lines and end of the response file to be marked with a nullptr string.
/// \param [out] NewArgv All parsed strings are appended to NewArgv.
void TokenizeWindowsCommandLine(StringRef Source, StringSaver &Saver,
SmallVectorImpl<const char *> &NewArgv,
bool MarkEOLs = false);
/// Tokenizes a Windows command line while attempting to avoid copies. If no
/// quoting or escaping was used, this produces substrings of the original
/// string. If a token requires unquoting, it will be allocated with the
/// StringSaver.
void TokenizeWindowsCommandLineNoCopy(StringRef Source, StringSaver &Saver,
SmallVectorImpl<StringRef> &NewArgv);
/// Tokenizes a Windows full command line, including command name at the start.
///
/// This uses the same syntax rules as TokenizeWindowsCommandLine for all but
/// the first token. But the first token is expected to be parsed as the
/// executable file name in the way CreateProcess would do it, rather than the
/// way the C library startup code would do it: CreateProcess does not consider
/// that \ is ever an escape character (because " is not a valid filename char,
/// hence there's never a need to escape it to be used literally).
///
/// Parameters are the same as for TokenizeWindowsCommandLine. In particular,
/// if you set MarkEOLs = true, then the first word of every line will be
/// parsed using the special rules for command names, making this function
/// suitable for parsing a file full of commands to execute.
void TokenizeWindowsCommandLineFull(StringRef Source, StringSaver &Saver,
SmallVectorImpl<const char *> &NewArgv,
bool MarkEOLs = false);
/// String tokenization function type. Should be compatible with either
/// Windows or Unix command line tokenizers.
using TokenizerCallback = void (*)(StringRef Source, StringSaver &Saver,
SmallVectorImpl<const char *> &NewArgv,
bool MarkEOLs);
/// Tokenizes content of configuration file.
///
/// \param [in] Source The string representing content of config file.
/// \param [in] Saver Delegates back to the caller for saving parsed strings.
/// \param [out] NewArgv All parsed strings are appended to NewArgv.
/// \param [in] MarkEOLs Added for compatibility with TokenizerCallback.
///
/// It works like TokenizeGNUCommandLine with ability to skip comment lines.
///
void tokenizeConfigFile(StringRef Source, StringSaver &Saver,
SmallVectorImpl<const char *> &NewArgv,
bool MarkEOLs = false);
/// Contains options that control response file expansion.
class ExpansionContext {
/// Provides persistent storage for parsed strings.
StringSaver Saver;
/// Tokenization strategy. Typically Unix or Windows.
TokenizerCallback Tokenizer;
/// File system used for all file access when running the expansion.
vfs::FileSystem *FS;
/// Path used to resolve relative rsp files. If empty, the file system
/// current directory is used instead.
StringRef CurrentDir;
/// Directories used for search of config files.
ArrayRef<StringRef> SearchDirs;
/// True if names of nested response files must be resolved relative to
/// including file.
bool RelativeNames = false;
/// If true, mark end of lines and the end of the response file with nullptrs
/// in the Argv vector.
bool MarkEOLs = false;
/// If true, body of config file is expanded.
bool InConfigFile = false;
llvm::Error expandResponseFile(StringRef FName,
SmallVectorImpl<const char *> &NewArgv);
public:
ExpansionContext(BumpPtrAllocator &A, TokenizerCallback T);
ExpansionContext &setMarkEOLs(bool X) {
MarkEOLs = X;
return *this;
}
ExpansionContext &setRelativeNames(bool X) {
RelativeNames = X;
return *this;
}
ExpansionContext &setCurrentDir(StringRef X) {
CurrentDir = X;
return *this;
}
ExpansionContext &setSearchDirs(ArrayRef<StringRef> X) {
SearchDirs = X;
return *this;
}
ExpansionContext &setVFS(vfs::FileSystem *X) {
FS = X;
return *this;
}
/// Looks for the specified configuration file.
///
/// \param[in] FileName Name of the file to search for.
/// \param[out] FilePath File absolute path, if it was found.
/// \return True if file was found.
///
/// If the specified file name contains a directory separator, it is searched
/// for by its absolute path. Otherwise looks for file sequentially in
/// directories specified by SearchDirs field.
bool findConfigFile(StringRef FileName, SmallVectorImpl<char> &FilePath);
/// Reads command line options from the given configuration file.
///
/// \param [in] CfgFile Path to configuration file.
/// \param [out] Argv Array to which the read options are added.
/// \return true if the file was successfully read.
///
/// It reads content of the specified file, tokenizes it and expands "@file"
/// commands resolving file names in them relative to the directory where
/// CfgFilename resides. It also expands "<CFGDIR>" to the base path of the
/// current config file.
Error readConfigFile(StringRef CfgFile, SmallVectorImpl<const char *> &Argv);
/// Expands constructs "@file" in the provided array of arguments recursively.
Error expandResponseFiles(SmallVectorImpl<const char *> &Argv);
};
/// A convenience helper which concatenates the options specified by the
/// environment variable EnvVar and command line options, then expands
/// response files recursively.
/// \return true if all @files were expanded successfully or there were none.
bool expandResponseFiles(int Argc, const char *const *Argv, const char *EnvVar,
SmallVectorImpl<const char *> &NewArgv);
/// A convenience helper which supports the typical use case of expansion
/// function call.
bool ExpandResponseFiles(StringSaver &Saver, TokenizerCallback Tokenizer,
SmallVectorImpl<const char *> &Argv);
/// A convenience helper which concatenates the options specified by the
/// environment variable EnvVar and command line options, then expands response
/// files recursively. The tokenizer is a predefined GNU or Windows one.
/// \return true if all @files were expanded successfully or there were none.
bool expandResponseFiles(int Argc, const char *const *Argv, const char *EnvVar,
StringSaver &Saver,
SmallVectorImpl<const char *> &NewArgv);
/// Mark all options not part of this category as cl::ReallyHidden.
///
/// \param Category the category of options to keep displaying
///
/// Some tools (like clang-format) like to be able to hide all options that are
/// not specific to the tool. This function allows a tool to specify a single
/// option category to display in the -help output.
void HideUnrelatedOptions(cl::OptionCategory &Category,
SubCommand &Sub = SubCommand::getTopLevel());
/// Mark all options not part of the categories as cl::ReallyHidden.
///
/// \param Categories the categories of options to keep displaying.
///
/// Some tools (like clang-format) like to be able to hide all options that are
/// not specific to the tool. This function allows a tool to specify a single
/// option category to display in the -help output.
void HideUnrelatedOptions(ArrayRef<const cl::OptionCategory *> Categories,
SubCommand &Sub = SubCommand::getTopLevel());
/// Reset all command line options to a state that looks as if they have
/// never appeared on the command line. This is useful for being able to parse
/// a command line multiple times (especially useful for writing tests).
void ResetAllOptionOccurrences();
/// Reset the command line parser back to its initial state. This
/// removes
/// all options, categories, and subcommands and returns the parser to a state
/// where no options are supported.
void ResetCommandLineParser();
/// Parses `Arg` into the option handler `Handler`.
bool ProvidePositionalOption(Option *Handler, StringRef Arg, int i);
} // end namespace cl
} // end namespace llvm
#endif // LLVM_SUPPORT_COMMANDLINE_H
PK hwFZ�#{K Support/LEB128.hnu �[��� //===- llvm/Support/LEB128.h - [SU]LEB128 utility functions -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares some utility functions for encoding SLEB128 and
// ULEB128 values.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_LEB128_H
#define LLVM_SUPPORT_LEB128_H
#include "llvm/Support/raw_ostream.h"
namespace llvm {
/// Utility function to encode a SLEB128 value to an output stream. Returns
/// the length in bytes of the encoded value.
inline unsigned encodeSLEB128(int64_t Value, raw_ostream &OS,
unsigned PadTo = 0) {
bool More;
unsigned Count = 0;
do {
uint8_t Byte = Value & 0x7f;
// NOTE: this assumes that this signed shift is an arithmetic right shift.
Value >>= 7;
More = !((((Value == 0 ) && ((Byte & 0x40) == 0)) ||
((Value == -1) && ((Byte & 0x40) != 0))));
Count++;
if (More || Count < PadTo)
Byte |= 0x80; // Mark this byte to show that more bytes will follow.
OS << char(Byte);
} while (More);
// Pad with 0x80 and emit a terminating byte at the end.
if (Count < PadTo) {
uint8_t PadValue = Value < 0 ? 0x7f : 0x00;
for (; Count < PadTo - 1; ++Count)
OS << char(PadValue | 0x80);
OS << char(PadValue);
Count++;
}
return Count;
}
/// Utility function to encode a SLEB128 value to a buffer. Returns
/// the length in bytes of the encoded value.
inline unsigned encodeSLEB128(int64_t Value, uint8_t *p, unsigned PadTo = 0) {
uint8_t *orig_p = p;
unsigned Count = 0;
bool More;
do {
uint8_t Byte = Value & 0x7f;
// NOTE: this assumes that this signed shift is an arithmetic right shift.
Value >>= 7;
More = !((((Value == 0 ) && ((Byte & 0x40) == 0)) ||
((Value == -1) && ((Byte & 0x40) != 0))));
Count++;
if (More || Count < PadTo)
Byte |= 0x80; // Mark this byte to show that more bytes will follow.
*p++ = Byte;
} while (More);
// Pad with 0x80 and emit a terminating byte at the end.
if (Count < PadTo) {
uint8_t PadValue = Value < 0 ? 0x7f : 0x00;
for (; Count < PadTo - 1; ++Count)
*p++ = (PadValue | 0x80);
*p++ = PadValue;
}
return (unsigned)(p - orig_p);
}
/// Utility function to encode a ULEB128 value to an output stream. Returns
/// the length in bytes of the encoded value.
inline unsigned encodeULEB128(uint64_t Value, raw_ostream &OS,
unsigned PadTo = 0) {
unsigned Count = 0;
do {
uint8_t Byte = Value & 0x7f;
Value >>= 7;
Count++;
if (Value != 0 || Count < PadTo)
Byte |= 0x80; // Mark this byte to show that more bytes will follow.
OS << char(Byte);
} while (Value != 0);
// Pad with 0x80 and emit a null byte at the end.
if (Count < PadTo) {
for (; Count < PadTo - 1; ++Count)
OS << '\x80';
OS << '\x00';
Count++;
}
return Count;
}
/// Utility function to encode a ULEB128 value to a buffer. Returns
/// the length in bytes of the encoded value.
inline unsigned encodeULEB128(uint64_t Value, uint8_t *p,
unsigned PadTo = 0) {
uint8_t *orig_p = p;
unsigned Count = 0;
do {
uint8_t Byte = Value & 0x7f;
Value >>= 7;
Count++;
if (Value != 0 || Count < PadTo)
Byte |= 0x80; // Mark this byte to show that more bytes will follow.
*p++ = Byte;
} while (Value != 0);
// Pad with 0x80 and emit a null byte at the end.
if (Count < PadTo) {
for (; Count < PadTo - 1; ++Count)
*p++ = '\x80';
*p++ = '\x00';
}
return (unsigned)(p - orig_p);
}
/// Utility function to decode a ULEB128 value.
inline uint64_t decodeULEB128(const uint8_t *p, unsigned *n = nullptr,
const uint8_t *end = nullptr,
const char **error = nullptr) {
const uint8_t *orig_p = p;
uint64_t Value = 0;
unsigned Shift = 0;
if (error)
*error = nullptr;
do {
if (p == end) {
if (error)
*error = "malformed uleb128, extends past end";
if (n)
*n = (unsigned)(p - orig_p);
return 0;
}
uint64_t Slice = *p & 0x7f;
if ((Shift >= 64 && Slice != 0) || Slice << Shift >> Shift != Slice) {
if (error)
*error = "uleb128 too big for uint64";
if (n)
*n = (unsigned)(p - orig_p);
return 0;
}
Value += Slice << Shift;
Shift += 7;
} while (*p++ >= 128);
if (n)
*n = (unsigned)(p - orig_p);
return Value;
}
/// Utility function to decode a SLEB128 value.
inline int64_t decodeSLEB128(const uint8_t *p, unsigned *n = nullptr,
const uint8_t *end = nullptr,
const char **error = nullptr) {
const uint8_t *orig_p = p;
int64_t Value = 0;
unsigned Shift = 0;
uint8_t Byte;
if (error)
*error = nullptr;
do {
if (p == end) {
if (error)
*error = "malformed sleb128, extends past end";
if (n)
*n = (unsigned)(p - orig_p);
return 0;
}
Byte = *p;
uint64_t Slice = Byte & 0x7f;
if ((Shift >= 64 && Slice != (Value < 0 ? 0x7f : 0x00)) ||
(Shift == 63 && Slice != 0 && Slice != 0x7f)) {
if (error)
*error = "sleb128 too big for int64";
if (n)
*n = (unsigned)(p - orig_p);
return 0;
}
Value |= Slice << Shift;
Shift += 7;
++p;
} while (Byte >= 128);
// Sign extend negative numbers if needed.
if (Shift < 64 && (Byte & 0x40))
Value |= UINT64_MAX << Shift;
if (n)
*n = (unsigned)(p - orig_p);
return Value;
}
/// Utility function to get the size of the ULEB128-encoded value.
extern unsigned getULEB128Size(uint64_t Value);
/// Utility function to get the size of the SLEB128-encoded value.
extern unsigned getSLEB128Size(int64_t Value);
} // namespace llvm
#endif // LLVM_SUPPORT_LEB128_H
PK hwFZo�:k k Support/GenericLoopInfo.hnu �[��� //===- GenericLoopInfo - Generic Loop Info for graphs -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the LoopInfoBase class that is used to identify natural
// loops and determine the loop depth of various nodes in a generic graph of
// blocks. A natural loop has exactly one entry-point, which is called the
// header. Note that natural loops may actually be several loops that share the
// same header node.
//
// This analysis calculates the nesting structure of loops in a function. For
// each natural loop identified, this analysis identifies natural loops
// contained entirely within the loop and the basic blocks that make up the
// loop.
//
// It can calculate on the fly various bits of information, for example:
//
// * whether there is a preheader for the loop
// * the number of back edges to the header
// * whether or not a particular block branches out of the loop
// * the successor blocks of the loop
// * the loop depth
// * etc...
//
// Note that this analysis specifically identifies *Loops* not cycles or SCCs
// in the graph. There can be strongly connected components in the graph which
// this analysis will not recognize and that will not be represented by a Loop
// instance. In particular, a Loop might be inside such a non-loop SCC, or a
// non-loop SCC might contain a sub-SCC which is a Loop.
//
// For an overview of terminology used in this API (and thus all of our loop
// analyses or transforms), see docs/LoopTerminology.rst.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_GENERICLOOPINFO_H
#define LLVM_SUPPORT_GENERICLOOPINFO_H
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SetOperations.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/GenericDomTree.h"
namespace llvm {
template <class N, class M> class LoopInfoBase;
template <class N, class M> class LoopBase;
//===----------------------------------------------------------------------===//
/// Instances of this class are used to represent loops that are detected in the
/// flow graph.
///
template <class BlockT, class LoopT> class LoopBase {
LoopT *ParentLoop;
// Loops contained entirely within this one.
std::vector<LoopT *> SubLoops;
// The list of blocks in this loop. First entry is the header node.
std::vector<BlockT *> Blocks;
SmallPtrSet<const BlockT *, 8> DenseBlockSet;
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
/// Indicator that this loop is no longer a valid loop.
bool IsInvalid = false;
#endif
LoopBase(const LoopBase<BlockT, LoopT> &) = delete;
const LoopBase<BlockT, LoopT> &
operator=(const LoopBase<BlockT, LoopT> &) = delete;
public:
/// Return the nesting level of this loop. An outer-most loop has depth 1,
/// for consistency with loop depth values used for basic blocks, where depth
/// 0 is used for blocks not inside any loops.
unsigned getLoopDepth() const {
assert(!isInvalid() && "Loop not in a valid state!");
unsigned D = 1;
for (const LoopT *CurLoop = ParentLoop; CurLoop;
CurLoop = CurLoop->ParentLoop)
++D;
return D;
}
BlockT *getHeader() const { return getBlocks().front(); }
/// Return the parent loop if it exists or nullptr for top
/// level loops.
/// A loop is either top-level in a function (that is, it is not
/// contained in any other loop) or it is entirely enclosed in
/// some other loop.
/// If a loop is top-level, it has no parent, otherwise its
/// parent is the innermost loop in which it is enclosed.
LoopT *getParentLoop() const { return ParentLoop; }
/// Get the outermost loop in which this loop is contained.
/// This may be the loop itself, if it already is the outermost loop.
const LoopT *getOutermostLoop() const {
const LoopT *L = static_cast<const LoopT *>(this);
while (L->ParentLoop)
L = L->ParentLoop;
return L;
}
LoopT *getOutermostLoop() {
LoopT *L = static_cast<LoopT *>(this);
while (L->ParentLoop)
L = L->ParentLoop;
return L;
}
/// This is a raw interface for bypassing addChildLoop.
void setParentLoop(LoopT *L) {
assert(!isInvalid() && "Loop not in a valid state!");
ParentLoop = L;
}
/// Return true if the specified loop is contained within in this loop.
bool contains(const LoopT *L) const {
assert(!isInvalid() && "Loop not in a valid state!");
if (L == this)
return true;
if (!L)
return false;
return contains(L->getParentLoop());
}
/// Return true if the specified basic block is in this loop.
bool contains(const BlockT *BB) const {
assert(!isInvalid() && "Loop not in a valid state!");
return DenseBlockSet.count(BB);
}
/// Return true if the specified instruction is in this loop.
template <class InstT> bool contains(const InstT *Inst) const {
return contains(Inst->getParent());
}
/// Return the loops contained entirely within this loop.
const std::vector<LoopT *> &getSubLoops() const {
assert(!isInvalid() && "Loop not in a valid state!");
return SubLoops;
}
std::vector<LoopT *> &getSubLoopsVector() {
assert(!isInvalid() && "Loop not in a valid state!");
return SubLoops;
}
typedef typename std::vector<LoopT *>::const_iterator iterator;
typedef
typename std::vector<LoopT *>::const_reverse_iterator reverse_iterator;
iterator begin() const { return getSubLoops().begin(); }
iterator end() const { return getSubLoops().end(); }
reverse_iterator rbegin() const { return getSubLoops().rbegin(); }
reverse_iterator rend() const { return getSubLoops().rend(); }
// LoopInfo does not detect irreducible control flow, just natural
// loops. That is, it is possible that there is cyclic control
// flow within the "innermost loop" or around the "outermost
// loop".
/// Return true if the loop does not contain any (natural) loops.
bool isInnermost() const { return getSubLoops().empty(); }
/// Return true if the loop does not have a parent (natural) loop
// (i.e. it is outermost, which is the same as top-level).
bool isOutermost() const { return getParentLoop() == nullptr; }
/// Get a list of the basic blocks which make up this loop.
ArrayRef<BlockT *> getBlocks() const {
assert(!isInvalid() && "Loop not in a valid state!");
return Blocks;
}
typedef typename ArrayRef<BlockT *>::const_iterator block_iterator;
block_iterator block_begin() const { return getBlocks().begin(); }
block_iterator block_end() const { return getBlocks().end(); }
inline iterator_range<block_iterator> blocks() const {
assert(!isInvalid() && "Loop not in a valid state!");
return make_range(block_begin(), block_end());
}
/// Get the number of blocks in this loop in constant time.
/// Invalidate the loop, indicating that it is no longer a loop.
unsigned getNumBlocks() const {
assert(!isInvalid() && "Loop not in a valid state!");
return Blocks.size();
}
/// Return a direct, mutable handle to the blocks vector so that we can
/// mutate it efficiently with techniques like `std::remove`.
std::vector<BlockT *> &getBlocksVector() {
assert(!isInvalid() && "Loop not in a valid state!");
return Blocks;
}
/// Return a direct, mutable handle to the blocks set so that we can
/// mutate it efficiently.
SmallPtrSetImpl<const BlockT *> &getBlocksSet() {
assert(!isInvalid() && "Loop not in a valid state!");
return DenseBlockSet;
}
/// Return a direct, immutable handle to the blocks set.
const SmallPtrSetImpl<const BlockT *> &getBlocksSet() const {
assert(!isInvalid() && "Loop not in a valid state!");
return DenseBlockSet;
}
/// Return true if this loop is no longer valid. The only valid use of this
/// helper is "assert(L.isInvalid())" or equivalent, since IsInvalid is set to
/// true by the destructor. In other words, if this accessor returns true,
/// the caller has already triggered UB by calling this accessor; and so it
/// can only be called in a context where a return value of true indicates a
/// programmer error.
bool isInvalid() const {
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
return IsInvalid;
#else
return false;
#endif
}
/// True if terminator in the block can branch to another block that is
/// outside of the current loop. \p BB must be inside the loop.
bool isLoopExiting(const BlockT *BB) const {
assert(!isInvalid() && "Loop not in a valid state!");
assert(contains(BB) && "Exiting block must be part of the loop");
for (const auto *Succ : children<const BlockT *>(BB)) {
if (!contains(Succ))
return true;
}
return false;
}
/// Returns true if \p BB is a loop-latch.
/// A latch block is a block that contains a branch back to the header.
/// This function is useful when there are multiple latches in a loop
/// because \fn getLoopLatch will return nullptr in that case.
bool isLoopLatch(const BlockT *BB) const {
assert(!isInvalid() && "Loop not in a valid state!");
assert(contains(BB) && "block does not belong to the loop");
BlockT *Header = getHeader();
auto PredBegin = GraphTraits<Inverse<BlockT *>>::child_begin(Header);
auto PredEnd = GraphTraits<Inverse<BlockT *>>::child_end(Header);
return std::find(PredBegin, PredEnd, BB) != PredEnd;
}
/// Calculate the number of back edges to the loop header.
unsigned getNumBackEdges() const {
assert(!isInvalid() && "Loop not in a valid state!");
unsigned NumBackEdges = 0;
BlockT *H = getHeader();
for (const auto Pred : children<Inverse<BlockT *>>(H))
if (contains(Pred))
++NumBackEdges;
return NumBackEdges;
}
//===--------------------------------------------------------------------===//
// APIs for simple analysis of the loop.
//
// Note that all of these methods can fail on general loops (ie, there may not
// be a preheader, etc). For best success, the loop simplification and
// induction variable canonicalization pass should be used to normalize loops
// for easy analysis. These methods assume canonical loops.
/// Return all blocks inside the loop that have successors outside of the
/// loop. These are the blocks _inside of the current loop_ which branch out.
/// The returned list is always unique.
void getExitingBlocks(SmallVectorImpl<BlockT *> &ExitingBlocks) const;
/// If getExitingBlocks would return exactly one block, return that block.
/// Otherwise return null.
BlockT *getExitingBlock() const;
/// Return all of the successor blocks of this loop. These are the blocks
/// _outside of the current loop_ which are branched to.
void getExitBlocks(SmallVectorImpl<BlockT *> &ExitBlocks) const;
/// If getExitBlocks would return exactly one block, return that block.
/// Otherwise return null.
BlockT *getExitBlock() const;
/// Return true if no exit block for the loop has a predecessor that is
/// outside the loop.
bool hasDedicatedExits() const;
/// Return all unique successor blocks of this loop.
/// These are the blocks _outside of the current loop_ which are branched to.
void getUniqueExitBlocks(SmallVectorImpl<BlockT *> &ExitBlocks) const;
/// Return all unique successor blocks of this loop except successors from
/// Latch block are not considered. If the exit comes from Latch has also
/// non Latch predecessor in a loop it will be added to ExitBlocks.
/// These are the blocks _outside of the current loop_ which are branched to.
void getUniqueNonLatchExitBlocks(SmallVectorImpl<BlockT *> &ExitBlocks) const;
/// If getUniqueExitBlocks would return exactly one block, return that block.
/// Otherwise return null.
BlockT *getUniqueExitBlock() const;
/// Return true if this loop does not have any exit blocks.
bool hasNoExitBlocks() const;
/// Edge type.
typedef std::pair<BlockT *, BlockT *> Edge;
/// Return all pairs of (_inside_block_,_outside_block_).
void getExitEdges(SmallVectorImpl<Edge> &ExitEdges) const;
/// If there is a preheader for this loop, return it. A loop has a preheader
/// if there is only one edge to the header of the loop from outside of the
/// loop. If this is the case, the block branching to the header of the loop
/// is the preheader node.
///
/// This method returns null if there is no preheader for the loop.
BlockT *getLoopPreheader() const;
/// If the given loop's header has exactly one unique predecessor outside the
/// loop, return it. Otherwise return null.
/// This is less strict that the loop "preheader" concept, which requires
/// the predecessor to have exactly one successor.
BlockT *getLoopPredecessor() const;
/// If there is a single latch block for this loop, return it.
/// A latch block is a block that contains a branch back to the header.
BlockT *getLoopLatch() const;
/// Return all loop latch blocks of this loop. A latch block is a block that
/// contains a branch back to the header.
void getLoopLatches(SmallVectorImpl<BlockT *> &LoopLatches) const {
assert(!isInvalid() && "Loop not in a valid state!");
BlockT *H = getHeader();
for (const auto Pred : children<Inverse<BlockT *>>(H))
if (contains(Pred))
LoopLatches.push_back(Pred);
}
/// Return all inner loops in the loop nest rooted by the loop in preorder,
/// with siblings in forward program order.
template <class Type>
static void getInnerLoopsInPreorder(const LoopT &L,
SmallVectorImpl<Type> &PreOrderLoops) {
SmallVector<LoopT *, 4> PreOrderWorklist;
PreOrderWorklist.append(L.rbegin(), L.rend());
while (!PreOrderWorklist.empty()) {
LoopT *L = PreOrderWorklist.pop_back_val();
// Sub-loops are stored in forward program order, but will process the
// worklist backwards so append them in reverse order.
PreOrderWorklist.append(L->rbegin(), L->rend());
PreOrderLoops.push_back(L);
}
}
/// Return all loops in the loop nest rooted by the loop in preorder, with
/// siblings in forward program order.
SmallVector<const LoopT *, 4> getLoopsInPreorder() const {
SmallVector<const LoopT *, 4> PreOrderLoops;
const LoopT *CurLoop = static_cast<const LoopT *>(this);
PreOrderLoops.push_back(CurLoop);
getInnerLoopsInPreorder(*CurLoop, PreOrderLoops);
return PreOrderLoops;
}
SmallVector<LoopT *, 4> getLoopsInPreorder() {
SmallVector<LoopT *, 4> PreOrderLoops;
LoopT *CurLoop = static_cast<LoopT *>(this);
PreOrderLoops.push_back(CurLoop);
getInnerLoopsInPreorder(*CurLoop, PreOrderLoops);
return PreOrderLoops;
}
//===--------------------------------------------------------------------===//
// APIs for updating loop information after changing the CFG
//
/// This method is used by other analyses to update loop information.
/// NewBB is set to be a new member of the current loop.
/// Because of this, it is added as a member of all parent loops, and is added
/// to the specified LoopInfo object as being in the current basic block. It
/// is not valid to replace the loop header with this method.
void addBasicBlockToLoop(BlockT *NewBB, LoopInfoBase<BlockT, LoopT> &LI);
/// This is used when splitting loops up. It replaces the OldChild entry in
/// our children list with NewChild, and updates the parent pointer of
/// OldChild to be null and the NewChild to be this loop.
/// This updates the loop depth of the new child.
void replaceChildLoopWith(LoopT *OldChild, LoopT *NewChild);
/// Add the specified loop to be a child of this loop.
/// This updates the loop depth of the new child.
void addChildLoop(LoopT *NewChild) {
assert(!isInvalid() && "Loop not in a valid state!");
assert(!NewChild->ParentLoop && "NewChild already has a parent!");
NewChild->ParentLoop = static_cast<LoopT *>(this);
SubLoops.push_back(NewChild);
}
/// This removes the specified child from being a subloop of this loop. The
/// loop is not deleted, as it will presumably be inserted into another loop.
LoopT *removeChildLoop(iterator I) {
assert(!isInvalid() && "Loop not in a valid state!");
assert(I != SubLoops.end() && "Cannot remove end iterator!");
LoopT *Child = *I;
assert(Child->ParentLoop == this && "Child is not a child of this loop!");
SubLoops.erase(SubLoops.begin() + (I - begin()));
Child->ParentLoop = nullptr;
return Child;
}
/// This removes the specified child from being a subloop of this loop. The
/// loop is not deleted, as it will presumably be inserted into another loop.
LoopT *removeChildLoop(LoopT *Child) {
return removeChildLoop(llvm::find(*this, Child));
}
/// This adds a basic block directly to the basic block list.
/// This should only be used by transformations that create new loops. Other
/// transformations should use addBasicBlockToLoop.
void addBlockEntry(BlockT *BB) {
assert(!isInvalid() && "Loop not in a valid state!");
Blocks.push_back(BB);
DenseBlockSet.insert(BB);
}
/// interface to reverse Blocks[from, end of loop] in this loop
void reverseBlock(unsigned from) {
assert(!isInvalid() && "Loop not in a valid state!");
std::reverse(Blocks.begin() + from, Blocks.end());
}
/// interface to do reserve() for Blocks
void reserveBlocks(unsigned size) {
assert(!isInvalid() && "Loop not in a valid state!");
Blocks.reserve(size);
}
/// This method is used to move BB (which must be part of this loop) to be the
/// loop header of the loop (the block that dominates all others).
void moveToHeader(BlockT *BB) {
assert(!isInvalid() && "Loop not in a valid state!");
if (Blocks[0] == BB)
return;
for (unsigned i = 0;; ++i) {
assert(i != Blocks.size() && "Loop does not contain BB!");
if (Blocks[i] == BB) {
Blocks[i] = Blocks[0];
Blocks[0] = BB;
return;
}
}
}
/// This removes the specified basic block from the current loop, updating the
/// Blocks as appropriate. This does not update the mapping in the LoopInfo
/// class.
void removeBlockFromLoop(BlockT *BB) {
assert(!isInvalid() && "Loop not in a valid state!");
auto I = find(Blocks, BB);
assert(I != Blocks.end() && "N is not in this list!");
Blocks.erase(I);
DenseBlockSet.erase(BB);
}
/// Verify loop structure
void verifyLoop() const;
/// Verify loop structure of this loop and all nested loops.
void verifyLoopNest(DenseSet<const LoopT *> *Loops) const;
/// Returns true if the loop is annotated parallel.
///
/// Derived classes can override this method using static template
/// polymorphism.
bool isAnnotatedParallel() const { return false; }
/// Print loop with all the BBs inside it.
void print(raw_ostream &OS, bool Verbose = false, bool PrintNested = true,
unsigned Depth = 0) const;
protected:
friend class LoopInfoBase<BlockT, LoopT>;
/// This creates an empty loop.
LoopBase() : ParentLoop(nullptr) {}
explicit LoopBase(BlockT *BB) : ParentLoop(nullptr) {
Blocks.push_back(BB);
DenseBlockSet.insert(BB);
}
// Since loop passes like SCEV are allowed to key analysis results off of
// `Loop` pointers, we cannot re-use pointers within a loop pass manager.
// This means loop passes should not be `delete` ing `Loop` objects directly
// (and risk a later `Loop` allocation re-using the address of a previous one)
// but should be using LoopInfo::markAsRemoved, which keeps around the `Loop`
// pointer till the end of the lifetime of the `LoopInfo` object.
//
// To make it easier to follow this rule, we mark the destructor as
// non-public.
~LoopBase() {
for (auto *SubLoop : SubLoops)
SubLoop->~LoopT();
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
IsInvalid = true;
#endif
SubLoops.clear();
Blocks.clear();
DenseBlockSet.clear();
ParentLoop = nullptr;
}
};
template <class BlockT, class LoopT>
raw_ostream &operator<<(raw_ostream &OS, const LoopBase<BlockT, LoopT> &Loop) {
Loop.print(OS);
return OS;
}
//===----------------------------------------------------------------------===//
/// This class builds and contains all of the top-level loop
/// structures in the specified function.
///
template <class BlockT, class LoopT> class LoopInfoBase {
// BBMap - Mapping of basic blocks to the inner most loop they occur in
DenseMap<const BlockT *, LoopT *> BBMap;
std::vector<LoopT *> TopLevelLoops;
BumpPtrAllocator LoopAllocator;
friend class LoopBase<BlockT, LoopT>;
friend class LoopInfo;
void operator=(const LoopInfoBase &) = delete;
LoopInfoBase(const LoopInfoBase &) = delete;
public:
LoopInfoBase() = default;
~LoopInfoBase() { releaseMemory(); }
LoopInfoBase(LoopInfoBase &&Arg)
: BBMap(std::move(Arg.BBMap)),
TopLevelLoops(std::move(Arg.TopLevelLoops)),
LoopAllocator(std::move(Arg.LoopAllocator)) {
// We have to clear the arguments top level loops as we've taken ownership.
Arg.TopLevelLoops.clear();
}
LoopInfoBase &operator=(LoopInfoBase &&RHS) {
BBMap = std::move(RHS.BBMap);
for (auto *L : TopLevelLoops)
L->~LoopT();
TopLevelLoops = std::move(RHS.TopLevelLoops);
LoopAllocator = std::move(RHS.LoopAllocator);
RHS.TopLevelLoops.clear();
return *this;
}
void releaseMemory() {
BBMap.clear();
for (auto *L : TopLevelLoops)
L->~LoopT();
TopLevelLoops.clear();
LoopAllocator.Reset();
}
template <typename... ArgsTy> LoopT *AllocateLoop(ArgsTy &&...Args) {
LoopT *Storage = LoopAllocator.Allocate<LoopT>();
return new (Storage) LoopT(std::forward<ArgsTy>(Args)...);
}
/// iterator/begin/end - The interface to the top-level loops in the current
/// function.
///
typedef typename std::vector<LoopT *>::const_iterator iterator;
typedef
typename std::vector<LoopT *>::const_reverse_iterator reverse_iterator;
iterator begin() const { return TopLevelLoops.begin(); }
iterator end() const { return TopLevelLoops.end(); }
reverse_iterator rbegin() const { return TopLevelLoops.rbegin(); }
reverse_iterator rend() const { return TopLevelLoops.rend(); }
bool empty() const { return TopLevelLoops.empty(); }
/// Return all of the loops in the function in preorder across the loop
/// nests, with siblings in forward program order.
///
/// Note that because loops form a forest of trees, preorder is equivalent to
/// reverse postorder.
SmallVector<LoopT *, 4> getLoopsInPreorder() const;
/// Return all of the loops in the function in preorder across the loop
/// nests, with siblings in *reverse* program order.
///
/// Note that because loops form a forest of trees, preorder is equivalent to
/// reverse postorder.
///
/// Also note that this is *not* a reverse preorder. Only the siblings are in
/// reverse program order.
SmallVector<LoopT *, 4> getLoopsInReverseSiblingPreorder() const;
/// Return the inner most loop that BB lives in. If a basic block is in no
/// loop (for example the entry node), null is returned.
LoopT *getLoopFor(const BlockT *BB) const { return BBMap.lookup(BB); }
/// Same as getLoopFor.
const LoopT *operator[](const BlockT *BB) const { return getLoopFor(BB); }
/// Return the loop nesting level of the specified block. A depth of 0 means
/// the block is not inside any loop.
unsigned getLoopDepth(const BlockT *BB) const {
const LoopT *L = getLoopFor(BB);
return L ? L->getLoopDepth() : 0;
}
// True if the block is a loop header node
bool isLoopHeader(const BlockT *BB) const {
const LoopT *L = getLoopFor(BB);
return L && L->getHeader() == BB;
}
/// Return the top-level loops.
const std::vector<LoopT *> &getTopLevelLoops() const { return TopLevelLoops; }
/// Return the top-level loops.
std::vector<LoopT *> &getTopLevelLoopsVector() { return TopLevelLoops; }
/// This removes the specified top-level loop from this loop info object.
/// The loop is not deleted, as it will presumably be inserted into
/// another loop.
LoopT *removeLoop(iterator I) {
assert(I != end() && "Cannot remove end iterator!");
LoopT *L = *I;
assert(L->isOutermost() && "Not a top-level loop!");
TopLevelLoops.erase(TopLevelLoops.begin() + (I - begin()));
return L;
}
/// Change the top-level loop that contains BB to the specified loop.
/// This should be used by transformations that restructure the loop hierarchy
/// tree.
void changeLoopFor(BlockT *BB, LoopT *L) {
if (!L) {
BBMap.erase(BB);
return;
}
BBMap[BB] = L;
}
/// Replace the specified loop in the top-level loops list with the indicated
/// loop.
void changeTopLevelLoop(LoopT *OldLoop, LoopT *NewLoop) {
auto I = find(TopLevelLoops, OldLoop);
assert(I != TopLevelLoops.end() && "Old loop not at top level!");
*I = NewLoop;
assert(!NewLoop->ParentLoop && !OldLoop->ParentLoop &&
"Loops already embedded into a subloop!");
}
/// This adds the specified loop to the collection of top-level loops.
void addTopLevelLoop(LoopT *New) {
assert(New->isOutermost() && "Loop already in subloop!");
TopLevelLoops.push_back(New);
}
/// This method completely removes BB from all data structures,
/// including all of the Loop objects it is nested in and our mapping from
/// BasicBlocks to loops.
void removeBlock(BlockT *BB) {
auto I = BBMap.find(BB);
if (I != BBMap.end()) {
for (LoopT *L = I->second; L; L = L->getParentLoop())
L->removeBlockFromLoop(BB);
BBMap.erase(I);
}
}
// Internals
static bool isNotAlreadyContainedIn(const LoopT *SubLoop,
const LoopT *ParentLoop) {
if (!SubLoop)
return true;
if (SubLoop == ParentLoop)
return false;
return isNotAlreadyContainedIn(SubLoop->getParentLoop(), ParentLoop);
}
/// Create the loop forest using a stable algorithm.
void analyze(const DominatorTreeBase<BlockT, false> &DomTree);
// Debugging
void print(raw_ostream &OS) const;
void verify(const DominatorTreeBase<BlockT, false> &DomTree) const;
/// Destroy a loop that has been removed from the `LoopInfo` nest.
///
/// This runs the destructor of the loop object making it invalid to
/// reference afterward. The memory is retained so that the *pointer* to the
/// loop remains valid.
///
/// The caller is responsible for removing this loop from the loop nest and
/// otherwise disconnecting it from the broader `LoopInfo` data structures.
/// Callers that don't naturally handle this themselves should probably call
/// `erase' instead.
void destroy(LoopT *L) {
L->~LoopT();
// Since LoopAllocator is a BumpPtrAllocator, this Deallocate only poisons
// \c L, but the pointer remains valid for non-dereferencing uses.
LoopAllocator.Deallocate(L);
}
};
} // namespace llvm
#endif // LLVM_SUPPORT_GENERICLOOPINFO_H
PK hwFZ�*^G�U �U Support/ARMTargetParser.defnu �[��� //===- ARMTargetParser.def - ARM target parsing defines ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides defines to build up the ARM target parser's logic.
//
//===----------------------------------------------------------------------===//
// NOTE: NO INCLUDE GUARD DESIRED!
#ifndef ARM_FPU
#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION)
#endif
ARM_FPU("invalid", FK_INVALID, FPUVersion::NONE, NeonSupportLevel::None, FPURestriction::None)
ARM_FPU("none", FK_NONE, FPUVersion::NONE, NeonSupportLevel::None, FPURestriction::None)
ARM_FPU("vfp", FK_VFP, FPUVersion::VFPV2, NeonSupportLevel::None, FPURestriction::None)
ARM_FPU("vfpv2", FK_VFPV2, FPUVersion::VFPV2, NeonSupportLevel::None, FPURestriction::None)
ARM_FPU("vfpv3", FK_VFPV3, FPUVersion::VFPV3, NeonSupportLevel::None, FPURestriction::None)
ARM_FPU("vfpv3-fp16", FK_VFPV3_FP16, FPUVersion::VFPV3_FP16, NeonSupportLevel::None, FPURestriction::None)
ARM_FPU("vfpv3-d16", FK_VFPV3_D16, FPUVersion::VFPV3, NeonSupportLevel::None, FPURestriction::D16)
ARM_FPU("vfpv3-d16-fp16", FK_VFPV3_D16_FP16, FPUVersion::VFPV3_FP16, NeonSupportLevel::None, FPURestriction::D16)
ARM_FPU("vfpv3xd", FK_VFPV3XD, FPUVersion::VFPV3, NeonSupportLevel::None, FPURestriction::SP_D16)
ARM_FPU("vfpv3xd-fp16", FK_VFPV3XD_FP16, FPUVersion::VFPV3_FP16, NeonSupportLevel::None, FPURestriction::SP_D16)
ARM_FPU("vfpv4", FK_VFPV4, FPUVersion::VFPV4, NeonSupportLevel::None, FPURestriction::None)
ARM_FPU("vfpv4-d16", FK_VFPV4_D16, FPUVersion::VFPV4, NeonSupportLevel::None, FPURestriction::D16)
ARM_FPU("fpv4-sp-d16", FK_FPV4_SP_D16, FPUVersion::VFPV4, NeonSupportLevel::None, FPURestriction::SP_D16)
ARM_FPU("fpv5-d16", FK_FPV5_D16, FPUVersion::VFPV5, NeonSupportLevel::None, FPURestriction::D16)
ARM_FPU("fpv5-sp-d16", FK_FPV5_SP_D16, FPUVersion::VFPV5, NeonSupportLevel::None, FPURestriction::SP_D16)
ARM_FPU("fp-armv8", FK_FP_ARMV8, FPUVersion::VFPV5, NeonSupportLevel::None, FPURestriction::None)
ARM_FPU("fp-armv8-fullfp16-d16", FK_FP_ARMV8_FULLFP16_D16, FPUVersion::VFPV5_FULLFP16, NeonSupportLevel::None, FPURestriction::D16)
ARM_FPU("fp-armv8-fullfp16-sp-d16", FK_FP_ARMV8_FULLFP16_SP_D16, FPUVersion::VFPV5_FULLFP16, NeonSupportLevel::None, FPURestriction::SP_D16)
ARM_FPU("neon", FK_NEON, FPUVersion::VFPV3, NeonSupportLevel::Neon, FPURestriction::None)
ARM_FPU("neon-fp16", FK_NEON_FP16, FPUVersion::VFPV3_FP16, NeonSupportLevel::Neon, FPURestriction::None)
ARM_FPU("neon-vfpv4", FK_NEON_VFPV4, FPUVersion::VFPV4, NeonSupportLevel::Neon, FPURestriction::None)
ARM_FPU("neon-fp-armv8", FK_NEON_FP_ARMV8, FPUVersion::VFPV5, NeonSupportLevel::Neon, FPURestriction::None)
ARM_FPU("crypto-neon-fp-armv8", FK_CRYPTO_NEON_FP_ARMV8, FPUVersion::VFPV5, NeonSupportLevel::Crypto,
FPURestriction::None)
ARM_FPU("softvfp", FK_SOFTVFP, FPUVersion::NONE, NeonSupportLevel::None, FPURestriction::None)
#undef ARM_FPU
#ifndef ARM_ARCH
#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT)
#endif
ARM_ARCH("invalid", INVALID, "", "",
ARMBuildAttrs::CPUArch::Pre_v4, FK_NONE, ARM::AEK_NONE)
ARM_ARCH("armv2", ARMV2, "2", "v2", ARMBuildAttrs::CPUArch::Pre_v4,
FK_NONE, ARM::AEK_NONE)
ARM_ARCH("armv2a", ARMV2A, "2A", "v2a", ARMBuildAttrs::CPUArch::Pre_v4,
FK_NONE, ARM::AEK_NONE)
ARM_ARCH("armv3", ARMV3, "3", "v3", ARMBuildAttrs::CPUArch::Pre_v4,
FK_NONE, ARM::AEK_NONE)
ARM_ARCH("armv3m", ARMV3M, "3M", "v3m", ARMBuildAttrs::CPUArch::Pre_v4,
FK_NONE, ARM::AEK_NONE)
ARM_ARCH("armv4", ARMV4, "4", "v4", ARMBuildAttrs::CPUArch::v4,
FK_NONE, ARM::AEK_NONE)
ARM_ARCH("armv4t", ARMV4T, "4T", "v4t", ARMBuildAttrs::CPUArch::v4T,
FK_NONE, ARM::AEK_NONE)
ARM_ARCH("armv5t", ARMV5T, "5T", "v5", ARMBuildAttrs::CPUArch::v5T,
FK_NONE, ARM::AEK_NONE)
ARM_ARCH("armv5te", ARMV5TE, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE,
FK_NONE, ARM::AEK_DSP)
ARM_ARCH("armv5tej", ARMV5TEJ, "5TEJ", "v5e", ARMBuildAttrs::CPUArch::v5TEJ,
FK_NONE, ARM::AEK_DSP)
ARM_ARCH("armv6", ARMV6, "6", "v6", ARMBuildAttrs::CPUArch::v6,
FK_VFPV2, ARM::AEK_DSP)
ARM_ARCH("armv6k", ARMV6K, "6K", "v6k", ARMBuildAttrs::CPUArch::v6K,
FK_VFPV2, ARM::AEK_DSP)
ARM_ARCH("armv6t2", ARMV6T2, "6T2", "v6t2", ARMBuildAttrs::CPUArch::v6T2,
FK_NONE, ARM::AEK_DSP)
ARM_ARCH("armv6kz", ARMV6KZ, "6KZ", "v6kz", ARMBuildAttrs::CPUArch::v6KZ,
FK_VFPV2, (ARM::AEK_SEC | ARM::AEK_DSP))
ARM_ARCH("armv6-m", ARMV6M, "6-M", "v6m", ARMBuildAttrs::CPUArch::v6_M,
FK_NONE, ARM::AEK_NONE)
ARM_ARCH("armv7-a", ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7,
FK_NEON, ARM::AEK_DSP)
ARM_ARCH("armv7ve", ARMV7VE, "7VE", "v7ve", ARMBuildAttrs::CPUArch::v7,
FK_NEON, (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT |
ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP))
ARM_ARCH("armv7-r", ARMV7R, "7-R", "v7r", ARMBuildAttrs::CPUArch::v7,
FK_NONE, (ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP))
ARM_ARCH("armv7-m", ARMV7M, "7-M", "v7m", ARMBuildAttrs::CPUArch::v7,
FK_NONE, ARM::AEK_HWDIVTHUMB)
ARM_ARCH("armv7e-m", ARMV7EM, "7E-M", "v7em", ARMBuildAttrs::CPUArch::v7E_M,
FK_NONE, (ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP))
ARM_ARCH("armv8-a", ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8_A,
FK_CRYPTO_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC))
ARM_ARCH("armv8.1-a", ARMV8_1A, "8.1-A", "v8.1a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC))
ARM_ARCH("armv8.2-a", ARMV8_2A, "8.2-A", "v8.2a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS))
ARM_ARCH("armv8.3-a", ARMV8_3A, "8.3-A", "v8.3a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS))
ARM_ARCH("armv8.4-a", ARMV8_4A, "8.4-A", "v8.4a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD))
ARM_ARCH("armv8.5-a", ARMV8_5A, "8.5-A", "v8.5a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD))
ARM_ARCH("armv8.6-a", ARMV8_6A, "8.6-A", "v8.6a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
ARM_ARCH("armv8.7-a", ARMV8_7A, "8.7-A", "v8.7a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
ARM_ARCH("armv8.8-a", ARMV8_8A, "8.8-A", "v8.8a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_SHA2 | ARM::AEK_AES |
ARM::AEK_I8MM))
ARM_ARCH("armv9-a", ARMV9A, "9-A", "v9a",
ARMBuildAttrs::CPUArch::v9_A, FK_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD))
ARM_ARCH("armv9.1-a", ARMV9_1A, "9.1-A", "v9.1a",
ARMBuildAttrs::CPUArch::v9_A, FK_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
ARM_ARCH("armv9.2-a", ARMV9_2A, "9.2-A", "v9.2a",
ARMBuildAttrs::CPUArch::v9_A, FK_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
ARM_ARCH("armv9.3-a", ARMV9_3A, "9.3-A", "v9.3a",
ARMBuildAttrs::CPUArch::v9_A, FK_CRYPTO_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
ARM_ARCH("armv8-r", ARMV8R, "8-R", "v8r", ARMBuildAttrs::CPUArch::v8_R,
FK_NEON_FP_ARMV8,
(ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB |
ARM::AEK_DSP | ARM::AEK_CRC))
ARM_ARCH("armv8-m.base", ARMV8MBaseline, "8-M.Baseline", "v8m.base",
ARMBuildAttrs::CPUArch::v8_M_Base, FK_NONE, ARM::AEK_HWDIVTHUMB)
ARM_ARCH("armv8-m.main", ARMV8MMainline, "8-M.Mainline", "v8m.main",
ARMBuildAttrs::CPUArch::v8_M_Main, FK_FPV5_D16, ARM::AEK_HWDIVTHUMB)
ARM_ARCH("armv8.1-m.main", ARMV8_1MMainline, "8.1-M.Mainline", "v8.1m.main",
ARMBuildAttrs::CPUArch::v8_1_M_Main, FK_FP_ARMV8_FULLFP16_SP_D16, ARM::AEK_HWDIVTHUMB | ARM::AEK_RAS | ARM::AEK_LOB)
// Non-standard Arch names.
ARM_ARCH("iwmmxt", IWMMXT, "iwmmxt", "", ARMBuildAttrs::CPUArch::v5TE,
FK_NONE, ARM::AEK_NONE)
ARM_ARCH("iwmmxt2", IWMMXT2, "iwmmxt2", "", ARMBuildAttrs::CPUArch::v5TE,
FK_NONE, ARM::AEK_NONE)
ARM_ARCH("xscale", XSCALE, "xscale", "v5e", ARMBuildAttrs::CPUArch::v5TE,
FK_NONE, ARM::AEK_NONE)
ARM_ARCH("armv7s", ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7,
FK_NEON_VFPV4, ARM::AEK_DSP)
ARM_ARCH("armv7k", ARMV7K, "7-K", "v7k", ARMBuildAttrs::CPUArch::v7,
FK_NONE, ARM::AEK_DSP)
#undef ARM_ARCH
#ifndef ARM_ARCH_EXT_NAME
#define ARM_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE)
#endif
// FIXME: This would be nicer were it tablegen
ARM_ARCH_EXT_NAME("invalid", ARM::AEK_INVALID, nullptr, nullptr)
ARM_ARCH_EXT_NAME("none", ARM::AEK_NONE, nullptr, nullptr)
ARM_ARCH_EXT_NAME("crc", ARM::AEK_CRC, "+crc", "-crc")
ARM_ARCH_EXT_NAME("crypto", ARM::AEK_CRYPTO, "+crypto","-crypto")
ARM_ARCH_EXT_NAME("sha2", ARM::AEK_SHA2, "+sha2", "-sha2")
ARM_ARCH_EXT_NAME("aes", ARM::AEK_AES, "+aes", "-aes")
ARM_ARCH_EXT_NAME("dotprod", ARM::AEK_DOTPROD, "+dotprod","-dotprod")
ARM_ARCH_EXT_NAME("dsp", ARM::AEK_DSP, "+dsp", "-dsp")
ARM_ARCH_EXT_NAME("fp", ARM::AEK_FP, nullptr, nullptr)
ARM_ARCH_EXT_NAME("fp.dp", ARM::AEK_FP_DP, nullptr, nullptr)
ARM_ARCH_EXT_NAME("mve", (ARM::AEK_DSP | ARM::AEK_SIMD), "+mve", "-mve")
ARM_ARCH_EXT_NAME("mve.fp", (ARM::AEK_DSP | ARM::AEK_SIMD | ARM::AEK_FP), "+mve.fp", "-mve.fp")
ARM_ARCH_EXT_NAME("idiv", (ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB), nullptr, nullptr)
ARM_ARCH_EXT_NAME("mp", ARM::AEK_MP, nullptr, nullptr)
ARM_ARCH_EXT_NAME("simd", ARM::AEK_SIMD, nullptr, nullptr)
ARM_ARCH_EXT_NAME("sec", ARM::AEK_SEC, nullptr, nullptr)
ARM_ARCH_EXT_NAME("virt", ARM::AEK_VIRT, nullptr, nullptr)
ARM_ARCH_EXT_NAME("fp16", ARM::AEK_FP16, "+fullfp16", "-fullfp16")
ARM_ARCH_EXT_NAME("ras", ARM::AEK_RAS, "+ras", "-ras")
ARM_ARCH_EXT_NAME("os", ARM::AEK_OS, nullptr, nullptr)
ARM_ARCH_EXT_NAME("iwmmxt", ARM::AEK_IWMMXT, nullptr, nullptr)
ARM_ARCH_EXT_NAME("iwmmxt2", ARM::AEK_IWMMXT2, nullptr, nullptr)
ARM_ARCH_EXT_NAME("maverick", ARM::AEK_MAVERICK, nullptr, nullptr)
ARM_ARCH_EXT_NAME("xscale", ARM::AEK_XSCALE, nullptr, nullptr)
ARM_ARCH_EXT_NAME("fp16fml", ARM::AEK_FP16FML, "+fp16fml", "-fp16fml")
ARM_ARCH_EXT_NAME("bf16", ARM::AEK_BF16, "+bf16", "-bf16")
ARM_ARCH_EXT_NAME("sb", ARM::AEK_SB, "+sb", "-sb")
ARM_ARCH_EXT_NAME("i8mm", ARM::AEK_I8MM, "+i8mm", "-i8mm")
ARM_ARCH_EXT_NAME("lob", ARM::AEK_LOB, "+lob", "-lob")
ARM_ARCH_EXT_NAME("cdecp0", ARM::AEK_CDECP0, "+cdecp0", "-cdecp0")
ARM_ARCH_EXT_NAME("cdecp1", ARM::AEK_CDECP1, "+cdecp1", "-cdecp1")
ARM_ARCH_EXT_NAME("cdecp2", ARM::AEK_CDECP2, "+cdecp2", "-cdecp2")
ARM_ARCH_EXT_NAME("cdecp3", ARM::AEK_CDECP3, "+cdecp3", "-cdecp3")
ARM_ARCH_EXT_NAME("cdecp4", ARM::AEK_CDECP4, "+cdecp4", "-cdecp4")
ARM_ARCH_EXT_NAME("cdecp5", ARM::AEK_CDECP5, "+cdecp5", "-cdecp5")
ARM_ARCH_EXT_NAME("cdecp6", ARM::AEK_CDECP6, "+cdecp6", "-cdecp6")
ARM_ARCH_EXT_NAME("cdecp7", ARM::AEK_CDECP7, "+cdecp7", "-cdecp7")
ARM_ARCH_EXT_NAME("pacbti", ARM::AEK_PACBTI, "+pacbti", "-pacbti")
#undef ARM_ARCH_EXT_NAME
#ifndef ARM_HW_DIV_NAME
#define ARM_HW_DIV_NAME(NAME, ID)
#endif
ARM_HW_DIV_NAME("invalid", ARM::AEK_INVALID)
ARM_HW_DIV_NAME("none", ARM::AEK_NONE)
ARM_HW_DIV_NAME("thumb", ARM::AEK_HWDIVTHUMB)
ARM_HW_DIV_NAME("arm", ARM::AEK_HWDIVARM)
ARM_HW_DIV_NAME("arm,thumb", (ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB))
#undef ARM_HW_DIV_NAME
#ifndef ARM_CPU_NAME
#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)
#endif
ARM_CPU_NAME("arm8", ARMV4, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm810", ARMV4, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("strongarm", ARMV4, FK_NONE, true, ARM::AEK_NONE)
ARM_CPU_NAME("strongarm110", ARMV4, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("strongarm1100", ARMV4, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("strongarm1110", ARMV4, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm7tdmi", ARMV4T, FK_NONE, true, ARM::AEK_NONE)
ARM_CPU_NAME("arm7tdmi-s", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm710t", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm720t", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm9", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm9tdmi", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm920", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm920t", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm922t", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm940t", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("ep9312", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm10tdmi", ARMV5T, FK_NONE, true, ARM::AEK_NONE)
ARM_CPU_NAME("arm1020t", ARMV5T, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm9e", ARMV5TE, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm946e-s", ARMV5TE, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm966e-s", ARMV5TE, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm968e-s", ARMV5TE, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm10e", ARMV5TE, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm1020e", ARMV5TE, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm1022e", ARMV5TE, FK_NONE, true, ARM::AEK_NONE)
ARM_CPU_NAME("arm926ej-s", ARMV5TEJ, FK_NONE, true, ARM::AEK_NONE)
ARM_CPU_NAME("arm1136j-s", ARMV6, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm1136jf-s", ARMV6, FK_VFPV2, true, ARM::AEK_NONE)
ARM_CPU_NAME("mpcore", ARMV6K, FK_VFPV2, true, ARM::AEK_NONE)
ARM_CPU_NAME("mpcorenovfp", ARMV6K, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm1176jz-s", ARMV6KZ, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("arm1176jzf-s", ARMV6KZ, FK_VFPV2, true, ARM::AEK_NONE)
ARM_CPU_NAME("arm1156t2-s", ARMV6T2, FK_NONE, true, ARM::AEK_NONE)
ARM_CPU_NAME("arm1156t2f-s", ARMV6T2, FK_VFPV2, false, ARM::AEK_NONE)
ARM_CPU_NAME("cortex-m0", ARMV6M, FK_NONE, true, ARM::AEK_NONE)
ARM_CPU_NAME("cortex-m0plus", ARMV6M, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("cortex-m1", ARMV6M, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("sc000", ARMV6M, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("cortex-a5", ARMV7A, FK_NEON_VFPV4, false,
(ARM::AEK_SEC | ARM::AEK_MP))
ARM_CPU_NAME("cortex-a7", ARMV7A, FK_NEON_VFPV4, false,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB))
ARM_CPU_NAME("cortex-a8", ARMV7A, FK_NEON, false, ARM::AEK_SEC)
ARM_CPU_NAME("cortex-a9", ARMV7A, FK_NEON_FP16, false, (ARM::AEK_SEC | ARM::AEK_MP))
ARM_CPU_NAME("cortex-a12", ARMV7A, FK_NEON_VFPV4, false,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB))
ARM_CPU_NAME("cortex-a15", ARMV7A, FK_NEON_VFPV4, false,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB))
ARM_CPU_NAME("cortex-a17", ARMV7A, FK_NEON_VFPV4, false,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB))
ARM_CPU_NAME("krait", ARMV7A, FK_NEON_VFPV4, false,
(ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB))
ARM_CPU_NAME("cortex-r4", ARMV7R, FK_NONE, true, ARM::AEK_NONE)
ARM_CPU_NAME("cortex-r4f", ARMV7R, FK_VFPV3_D16, false, ARM::AEK_NONE)
ARM_CPU_NAME("cortex-r5", ARMV7R, FK_VFPV3_D16, false,
(ARM::AEK_MP | ARM::AEK_HWDIVARM))
ARM_CPU_NAME("cortex-r7", ARMV7R, FK_VFPV3_D16_FP16, false,
(ARM::AEK_MP | ARM::AEK_HWDIVARM))
ARM_CPU_NAME("cortex-r8", ARMV7R, FK_VFPV3_D16_FP16, false,
(ARM::AEK_MP | ARM::AEK_HWDIVARM))
ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEON_FP_ARMV8, true, ARM::AEK_NONE)
ARM_CPU_NAME("sc300", ARMV7M, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("cortex-m3", ARMV7M, FK_NONE, true, ARM::AEK_NONE)
ARM_CPU_NAME("cortex-m4", ARMV7EM, FK_FPV4_SP_D16, true, ARM::AEK_NONE)
ARM_CPU_NAME("cortex-m7", ARMV7EM, FK_FPV5_D16, false, ARM::AEK_NONE)
ARM_CPU_NAME("cortex-m23", ARMV8MBaseline, FK_NONE, false, ARM::AEK_NONE)
ARM_CPU_NAME("cortex-m33", ARMV8MMainline, FK_FPV5_SP_D16, false, ARM::AEK_DSP)
ARM_CPU_NAME("cortex-m35p", ARMV8MMainline, FK_FPV5_SP_D16, false, ARM::AEK_DSP)
ARM_CPU_NAME("cortex-m55", ARMV8_1MMainline, FK_FP_ARMV8_FULLFP16_D16, false,
(ARM::AEK_DSP | ARM::AEK_SIMD | ARM::AEK_FP | ARM::AEK_FP16))
ARM_CPU_NAME("cortex-m85", ARMV8_1MMainline, FK_FP_ARMV8_FULLFP16_D16, false,
(ARM::AEK_DSP | ARM::AEK_SIMD | ARM::AEK_FP | ARM::AEK_FP16 |
ARM::AEK_RAS | ARM::AEK_PACBTI))
ARM_CPU_NAME("cortex-a32", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
ARM_CPU_NAME("cortex-a35", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
ARM_CPU_NAME("cortex-a53", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
ARM_CPU_NAME("cortex-a55", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
ARM_CPU_NAME("cortex-a57", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
ARM_CPU_NAME("cortex-a72", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
ARM_CPU_NAME("cortex-a73", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
ARM_CPU_NAME("cortex-a75", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
ARM_CPU_NAME("cortex-a76", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
ARM_CPU_NAME("cortex-a76ae", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
ARM_CPU_NAME("cortex-a77", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
ARM_CPU_NAME("cortex-a78", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
ARM_CPU_NAME("cortex-a78c", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
ARM::AEK_FP16 | ARM::AEK_DOTPROD)
ARM_CPU_NAME("cortex-a710", ARMV9A, FK_NEON_FP_ARMV8, false,
(ARM::AEK_DOTPROD | ARM::AEK_FP16FML | ARM::AEK_BF16 | ARM::AEK_SB |
ARM::AEK_I8MM))
ARM_CPU_NAME("cortex-x1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
ARM_CPU_NAME("cortex-x1c", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
ARM_CPU_NAME("neoverse-n1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
ARM_CPU_NAME("neoverse-n2", ARMV8_5A, FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_BF16 | ARM::AEK_DOTPROD | ARM::AEK_I8MM | ARM::AEK_RAS |
ARM::AEK_SB))
ARM_CPU_NAME("neoverse-v1", ARMV8_4A, FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_RAS | ARM::AEK_FP16 | ARM::AEK_BF16 | ARM::AEK_DOTPROD))
ARM_CPU_NAME("cyclone", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
ARM_CPU_NAME("exynos-m3", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
ARM_CPU_NAME("exynos-m4", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
ARM_CPU_NAME("exynos-m5", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
ARM_CPU_NAME("kryo", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
// Non-standard Arch names.
ARM_CPU_NAME("iwmmxt", IWMMXT, FK_NONE, true, ARM::AEK_NONE)
ARM_CPU_NAME("xscale", XSCALE, FK_NONE, true, ARM::AEK_NONE)
ARM_CPU_NAME("swift", ARMV7S, FK_NEON_VFPV4, true,
(ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB))
// Invalid CPU
ARM_CPU_NAME("invalid", INVALID, FK_INVALID, true, ARM::AEK_INVALID)
#undef ARM_CPU_NAME
PK hwFZfRs ( ( Support/RandomNumberGenerator.hnu �[��� //==- llvm/Support/RandomNumberGenerator.h - RNG for diversity ---*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines an abstraction for deterministic random number
// generation (RNG). Note that the current implementation is not
// cryptographically secure as it uses the C++11 <random> facilities.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_RANDOMNUMBERGENERATOR_H_
#define LLVM_SUPPORT_RANDOMNUMBERGENERATOR_H_
#include "llvm/Support/Compiler.h"
#include "llvm/Support/DataTypes.h" // Needed for uint64_t on Windows.
#include <random>
#include <system_error>
namespace llvm {
class StringRef;
/// A random number generator.
///
/// Instances of this class should not be shared across threads. The
/// seed should be set by passing the -rng-seed=<uint64> option. Use
/// Module::createRNG to create a new RNG instance for use with that
/// module.
class RandomNumberGenerator {
// 64-bit Mersenne Twister by Matsumoto and Nishimura, 2000
// http://en.cppreference.com/w/cpp/numeric/random/mersenne_twister_engine
// This RNG is deterministically portable across C++11
// implementations.
using generator_type = std::mt19937_64;
public:
using result_type = generator_type::result_type;
/// Returns a random number in the range [0, Max).
result_type operator()();
static constexpr result_type min() { return generator_type::min(); }
static constexpr result_type max() { return generator_type::max(); }
private:
/// Seeds and salts the underlying RNG engine.
///
/// This constructor should not be used directly. Instead use
/// Module::createRNG to create a new RNG salted with the Module ID.
RandomNumberGenerator(StringRef Salt);
generator_type Generator;
// Noncopyable.
RandomNumberGenerator(const RandomNumberGenerator &other) = delete;
RandomNumberGenerator &operator=(const RandomNumberGenerator &other) = delete;
friend class Module;
};
// Get random vector of specified size
std::error_code getRandomBytes(void *Buffer, size_t Size);
}
#endif
PK hwFZ��7� Support/Compression.hnu �[��� //===-- llvm/Support/Compression.h ---Compression----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains basic functions for compression/decompression.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_COMPRESSION_H
#define LLVM_SUPPORT_COMPRESSION_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/Support/DataTypes.h"
namespace llvm {
template <typename T> class SmallVectorImpl;
class Error;
// None indicates no compression. The other members are a subset of
// compression::Format, which is used for compressed debug sections in some
// object file formats (e.g. ELF). This is a separate class as we may add new
// compression::Format members for non-debugging purposes.
enum class DebugCompressionType {
None, ///< No compression
Zlib, ///< zlib
Zstd, ///< Zstandard
};
namespace compression {
namespace zlib {
constexpr int NoCompression = 0;
constexpr int BestSpeedCompression = 1;
constexpr int DefaultCompression = 6;
constexpr int BestSizeCompression = 9;
bool isAvailable();
void compress(ArrayRef<uint8_t> Input,
SmallVectorImpl<uint8_t> &CompressedBuffer,
int Level = DefaultCompression);
Error decompress(ArrayRef<uint8_t> Input, uint8_t *Output,
size_t &UncompressedSize);
Error decompress(ArrayRef<uint8_t> Input, SmallVectorImpl<uint8_t> &Output,
size_t UncompressedSize);
} // End of namespace zlib
namespace zstd {
constexpr int NoCompression = -5;
constexpr int BestSpeedCompression = 1;
constexpr int DefaultCompression = 5;
constexpr int BestSizeCompression = 12;
bool isAvailable();
void compress(ArrayRef<uint8_t> Input,
SmallVectorImpl<uint8_t> &CompressedBuffer,
int Level = DefaultCompression);
Error decompress(ArrayRef<uint8_t> Input, uint8_t *Output,
size_t &UncompressedSize);
Error decompress(ArrayRef<uint8_t> Input, SmallVectorImpl<uint8_t> &Output,
size_t UncompressedSize);
} // End of namespace zstd
enum class Format {
Zlib,
Zstd,
};
inline Format formatFor(DebugCompressionType Type) {
switch (Type) {
case DebugCompressionType::None:
llvm_unreachable("not a compression type");
case DebugCompressionType::Zlib:
return Format::Zlib;
case DebugCompressionType::Zstd:
return Format::Zstd;
}
llvm_unreachable("");
}
struct Params {
constexpr Params(Format F)
: format(F), level(F == Format::Zlib ? zlib::DefaultCompression
: zstd::DefaultCompression) {}
Params(DebugCompressionType Type) : Params(formatFor(Type)) {}
Format format;
int level;
// This may support multi-threading for zstd in the future. Note that
// different threads may produce different output, so be careful if certain
// output determinism is desired.
};
// Return nullptr if LLVM was built with support (LLVM_ENABLE_ZLIB,
// LLVM_ENABLE_ZSTD) for the specified compression format; otherwise
// return a string literal describing the reason.
const char *getReasonIfUnsupported(Format F);
// Compress Input with the specified format P.Format. If Level is -1, use
// *::DefaultCompression for the format.
void compress(Params P, ArrayRef<uint8_t> Input,
SmallVectorImpl<uint8_t> &Output);
// Decompress Input. The uncompressed size must be available.
Error decompress(DebugCompressionType T, ArrayRef<uint8_t> Input,
uint8_t *Output, size_t UncompressedSize);
Error decompress(Format F, ArrayRef<uint8_t> Input,
SmallVectorImpl<uint8_t> &Output, size_t UncompressedSize);
Error decompress(DebugCompressionType T, ArrayRef<uint8_t> Input,
SmallVectorImpl<uint8_t> &Output, size_t UncompressedSize);
} // End of namespace compression
} // End of namespace llvm
#endif
PK hwFZ�àd Support/ArrayRecycler.hnu �[��� //==- llvm/Support/ArrayRecycler.h - Recycling of Arrays ---------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the ArrayRecycler class template which can recycle small
// arrays allocated from one of the allocators in Allocator.h
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ARRAYRECYCLER_H
#define LLVM_SUPPORT_ARRAYRECYCLER_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/MathExtras.h"
namespace llvm {
/// Recycle small arrays allocated from a BumpPtrAllocator.
///
/// Arrays are allocated in a small number of fixed sizes. For each supported
/// array size, the ArrayRecycler keeps a free list of available arrays.
///
template <class T, size_t Align = alignof(T)> class ArrayRecycler {
// The free list for a given array size is a simple singly linked list.
// We can't use iplist or Recycler here since those classes can't be copied.
struct FreeList {
FreeList *Next;
};
static_assert(Align >= alignof(FreeList), "Object underaligned");
static_assert(sizeof(T) >= sizeof(FreeList), "Objects are too small");
// Keep a free list for each array size.
SmallVector<FreeList*, 8> Bucket;
// Remove an entry from the free list in Bucket[Idx] and return it.
// Return NULL if no entries are available.
T *pop(unsigned Idx) {
if (Idx >= Bucket.size())
return nullptr;
FreeList *Entry = Bucket[Idx];
if (!Entry)
return nullptr;
__asan_unpoison_memory_region(Entry, Capacity::get(Idx).getSize());
Bucket[Idx] = Entry->Next;
__msan_allocated_memory(Entry, Capacity::get(Idx).getSize());
return reinterpret_cast<T*>(Entry);
}
// Add an entry to the free list at Bucket[Idx].
void push(unsigned Idx, T *Ptr) {
assert(Ptr && "Cannot recycle NULL pointer");
FreeList *Entry = reinterpret_cast<FreeList*>(Ptr);
if (Idx >= Bucket.size())
Bucket.resize(size_t(Idx) + 1);
Entry->Next = Bucket[Idx];
Bucket[Idx] = Entry;
__asan_poison_memory_region(Ptr, Capacity::get(Idx).getSize());
}
public:
/// The size of an allocated array is represented by a Capacity instance.
///
/// This class is much smaller than a size_t, and it provides methods to work
/// with the set of legal array capacities.
class Capacity {
uint8_t Index;
explicit Capacity(uint8_t idx) : Index(idx) {}
public:
Capacity() : Index(0) {}
/// Get the capacity of an array that can hold at least N elements.
static Capacity get(size_t N) {
return Capacity(N ? Log2_64_Ceil(N) : 0);
}
/// Get the number of elements in an array with this capacity.
size_t getSize() const { return size_t(1u) << Index; }
/// Get the bucket number for this capacity.
unsigned getBucket() const { return Index; }
/// Get the next larger capacity. Large capacities grow exponentially, so
/// this function can be used to reallocate incrementally growing vectors
/// in amortized linear time.
Capacity getNext() const { return Capacity(Index + 1); }
};
~ArrayRecycler() {
// The client should always call clear() so recycled arrays can be returned
// to the allocator.
assert(Bucket.empty() && "Non-empty ArrayRecycler deleted!");
}
/// Release all the tracked allocations to the allocator. The recycler must
/// be free of any tracked allocations before being deleted.
template<class AllocatorType>
void clear(AllocatorType &Allocator) {
for (; !Bucket.empty(); Bucket.pop_back())
while (T *Ptr = pop(Bucket.size() - 1))
Allocator.Deallocate(Ptr);
}
/// Special case for BumpPtrAllocator which has an empty Deallocate()
/// function.
///
/// There is no need to traverse the free lists, pulling all the objects into
/// cache.
void clear(BumpPtrAllocator&) {
Bucket.clear();
}
/// Allocate an array of at least the requested capacity.
///
/// Return an existing recycled array, or allocate one from Allocator if
/// none are available for recycling.
///
template<class AllocatorType>
T *allocate(Capacity Cap, AllocatorType &Allocator) {
// Try to recycle an existing array.
if (T *Ptr = pop(Cap.getBucket()))
return Ptr;
// Nope, get more memory.
return static_cast<T*>(Allocator.Allocate(sizeof(T)*Cap.getSize(), Align));
}
/// Deallocate an array with the specified Capacity.
///
/// Cap must be the same capacity that was given to allocate().
///
void deallocate(Capacity Cap, T *Ptr) {
push(Cap.getBucket(), Ptr);
}
};
} // end llvm namespace
#endif
PK hwFZ�G��b+ b+ Support/BinaryStreamReader.hnu �[��� //===- BinaryStreamReader.h - Reads objects from a binary stream *- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_BINARYSTREAMREADER_H
#define LLVM_SUPPORT_BINARYSTREAMREADER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Alignment.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/ConvertUTF.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <type_traits>
namespace llvm {
/// Provides read only access to a subclass of `BinaryStream`. Provides
/// bounds checking and helpers for writing certain common data types such as
/// null-terminated strings, integers in various flavors of endianness, etc.
/// Can be subclassed to provide reading of custom datatypes, although no
/// are overridable.
class BinaryStreamReader {
public:
BinaryStreamReader() = default;
explicit BinaryStreamReader(BinaryStreamRef Ref);
explicit BinaryStreamReader(BinaryStream &Stream);
explicit BinaryStreamReader(ArrayRef<uint8_t> Data,
llvm::support::endianness Endian);
explicit BinaryStreamReader(StringRef Data, llvm::support::endianness Endian);
BinaryStreamReader(const BinaryStreamReader &Other) = default;
BinaryStreamReader &operator=(const BinaryStreamReader &Other) = default;
virtual ~BinaryStreamReader() = default;
/// Read as much as possible from the underlying string at the current offset
/// without invoking a copy, and set \p Buffer to the resulting data slice.
/// Updates the stream's offset to point after the newly read data.
///
/// \returns a success error code if the data was successfully read, otherwise
/// returns an appropriate error code.
Error readLongestContiguousChunk(ArrayRef<uint8_t> &Buffer);
/// Read \p Size bytes from the underlying stream at the current offset and
/// and set \p Buffer to the resulting data slice. Whether a copy occurs
/// depends on the implementation of the underlying stream. Updates the
/// stream's offset to point after the newly read data.
///
/// \returns a success error code if the data was successfully read, otherwise
/// returns an appropriate error code.
Error readBytes(ArrayRef<uint8_t> &Buffer, uint32_t Size);
/// Read an integer of the specified endianness into \p Dest and update the
/// stream's offset. The data is always copied from the stream's underlying
/// buffer into \p Dest. Updates the stream's offset to point after the newly
/// read data.
///
/// \returns a success error code if the data was successfully read, otherwise
/// returns an appropriate error code.
template <typename T> Error readInteger(T &Dest) {
static_assert(std::is_integral_v<T>,
"Cannot call readInteger with non-integral value!");
ArrayRef<uint8_t> Bytes;
if (auto EC = readBytes(Bytes, sizeof(T)))
return EC;
Dest = llvm::support::endian::read<T, llvm::support::unaligned>(
Bytes.data(), Stream.getEndian());
return Error::success();
}
/// Similar to readInteger.
template <typename T> Error readEnum(T &Dest) {
static_assert(std::is_enum<T>::value,
"Cannot call readEnum with non-enum value!");
std::underlying_type_t<T> N;
if (auto EC = readInteger(N))
return EC;
Dest = static_cast<T>(N);
return Error::success();
}
/// Read an unsigned LEB128 encoded value.
///
/// \returns a success error code if the data was successfully read, otherwise
/// returns an appropriate error code.
Error readULEB128(uint64_t &Dest);
/// Read a signed LEB128 encoded value.
///
/// \returns a success error code if the data was successfully read, otherwise
/// returns an appropriate error code.
Error readSLEB128(int64_t &Dest);
/// Read a null terminated string from \p Dest. Whether a copy occurs depends
/// on the implementation of the underlying stream. Updates the stream's
/// offset to point after the newly read data.
///
/// \returns a success error code if the data was successfully read, otherwise
/// returns an appropriate error code.
Error readCString(StringRef &Dest);
/// Similar to readCString, however read a null-terminated UTF16 string
/// instead.
///
/// \returns a success error code if the data was successfully read, otherwise
/// returns an appropriate error code.
Error readWideString(ArrayRef<UTF16> &Dest);
/// Read a \p Length byte string into \p Dest. Whether a copy occurs depends
/// on the implementation of the underlying stream. Updates the stream's
/// offset to point after the newly read data.
///
/// \returns a success error code if the data was successfully read, otherwise
/// returns an appropriate error code.
Error readFixedString(StringRef &Dest, uint32_t Length);
/// Read the entire remainder of the underlying stream into \p Ref. This is
/// equivalent to calling getUnderlyingStream().slice(Offset). Updates the
/// stream's offset to point to the end of the stream. Never causes a copy.
///
/// \returns a success error code if the data was successfully read, otherwise
/// returns an appropriate error code.
Error readStreamRef(BinaryStreamRef &Ref);
/// Read \p Length bytes from the underlying stream into \p Ref. This is
/// equivalent to calling getUnderlyingStream().slice(Offset, Length).
/// Updates the stream's offset to point after the newly read object. Never
/// causes a copy.
///
/// \returns a success error code if the data was successfully read, otherwise
/// returns an appropriate error code.
Error readStreamRef(BinaryStreamRef &Ref, uint32_t Length);
/// Read \p Length bytes from the underlying stream into \p Ref. This is
/// equivalent to calling getUnderlyingStream().slice(Offset, Length).
/// Updates the stream's offset to point after the newly read object. Never
/// causes a copy.
///
/// \returns a success error code if the data was successfully read, otherwise
/// returns an appropriate error code.
Error readSubstream(BinarySubstreamRef &Ref, uint32_t Length);
/// Get a pointer to an object of type T from the underlying stream, as if by
/// memcpy, and store the result into \p Dest. It is up to the caller to
/// ensure that objects of type T can be safely treated in this manner.
/// Updates the stream's offset to point after the newly read object. Whether
/// a copy occurs depends upon the implementation of the underlying
/// stream.
///
/// \returns a success error code if the data was successfully read, otherwise
/// returns an appropriate error code.
template <typename T> Error readObject(const T *&Dest) {
ArrayRef<uint8_t> Buffer;
if (auto EC = readBytes(Buffer, sizeof(T)))
return EC;
Dest = reinterpret_cast<const T *>(Buffer.data());
return Error::success();
}
/// Get a reference to a \p NumElements element array of objects of type T
/// from the underlying stream as if by memcpy, and store the resulting array
/// slice into \p array. It is up to the caller to ensure that objects of
/// type T can be safely treated in this manner. Updates the stream's offset
/// to point after the newly read object. Whether a copy occurs depends upon
/// the implementation of the underlying stream.
///
/// \returns a success error code if the data was successfully read, otherwise
/// returns an appropriate error code.
template <typename T>
Error readArray(ArrayRef<T> &Array, uint32_t NumElements) {
ArrayRef<uint8_t> Bytes;
if (NumElements == 0) {
Array = ArrayRef<T>();
return Error::success();
}
if (NumElements > UINT32_MAX / sizeof(T))
return make_error<BinaryStreamError>(
stream_error_code::invalid_array_size);
if (auto EC = readBytes(Bytes, NumElements * sizeof(T)))
return EC;
assert(isAddrAligned(Align::Of<T>(), Bytes.data()) &&
"Reading at invalid alignment!");
Array = ArrayRef<T>(reinterpret_cast<const T *>(Bytes.data()), NumElements);
return Error::success();
}
/// Read a VarStreamArray of size \p Size bytes and store the result into
/// \p Array. Updates the stream's offset to point after the newly read
/// array. Never causes a copy (although iterating the elements of the
/// VarStreamArray may, depending upon the implementation of the underlying
/// stream).
///
/// \returns a success error code if the data was successfully read, otherwise
/// returns an appropriate error code.
template <typename T, typename U>
Error readArray(VarStreamArray<T, U> &Array, uint32_t Size,
uint32_t Skew = 0) {
BinaryStreamRef S;
if (auto EC = readStreamRef(S, Size))
return EC;
Array.setUnderlyingStream(S, Skew);
return Error::success();
}
/// Read a FixedStreamArray of \p NumItems elements and store the result into
/// \p Array. Updates the stream's offset to point after the newly read
/// array. Never causes a copy (although iterating the elements of the
/// FixedStreamArray may, depending upon the implementation of the underlying
/// stream).
///
/// \returns a success error code if the data was successfully read, otherwise
/// returns an appropriate error code.
template <typename T>
Error readArray(FixedStreamArray<T> &Array, uint32_t NumItems) {
if (NumItems == 0) {
Array = FixedStreamArray<T>();
return Error::success();
}
if (NumItems > UINT32_MAX / sizeof(T))
return make_error<BinaryStreamError>(
stream_error_code::invalid_array_size);
BinaryStreamRef View;
if (auto EC = readStreamRef(View, NumItems * sizeof(T)))
return EC;
Array = FixedStreamArray<T>(View);
return Error::success();
}
bool empty() const { return bytesRemaining() == 0; }
void setOffset(uint64_t Off) { Offset = Off; }
uint64_t getOffset() const { return Offset; }
uint64_t getLength() const { return Stream.getLength(); }
uint64_t bytesRemaining() const { return getLength() - getOffset(); }
/// Advance the stream's offset by \p Amount bytes.
///
/// \returns a success error code if at least \p Amount bytes remain in the
/// stream, otherwise returns an appropriate error code.
Error skip(uint64_t Amount);
/// Examine the next byte of the underlying stream without advancing the
/// stream's offset. If the stream is empty the behavior is undefined.
///
/// \returns the next byte in the stream.
uint8_t peek() const;
Error padToAlignment(uint32_t Align);
std::pair<BinaryStreamReader, BinaryStreamReader>
split(uint64_t Offset) const;
private:
BinaryStreamRef Stream;
uint64_t Offset = 0;
};
} // namespace llvm
#endif // LLVM_SUPPORT_BINARYSTREAMREADER_H
PK hwFZ�� � Support/AutoConvert.hnu �[��� //===- AutoConvert.h - Auto conversion between ASCII/EBCDIC -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains functions used for auto conversion between
// ASCII/EBCDIC codepages specific to z/OS.
//
//===----------------------------------------------------------------------===//i
#ifndef LLVM_SUPPORT_AUTOCONVERT_H
#define LLVM_SUPPORT_AUTOCONVERT_H
#ifdef __MVS__
#define CCSID_IBM_1047 1047
#define CCSID_UTF_8 1208
#include <system_error>
namespace llvm {
/// \brief Disable the z/OS enhanced ASCII auto-conversion for the file
/// descriptor.
std::error_code disableAutoConversion(int FD);
/// \brief Query the z/OS enhanced ASCII auto-conversion status of a file
/// descriptor and force the conversion if the file is not tagged with a
/// codepage.
std::error_code enableAutoConversion(int FD);
/// \brief Set the tag information for a file descriptor.
std::error_code setFileTag(int FD, int CCSID, bool Text);
} // namespace llvm
#endif // __MVS__
#endif // LLVM_SUPPORT_AUTOCONVERT_H
PK hwFZFKq=� � Support/DynamicLibrary.hnu �[��� //===-- llvm/Support/DynamicLibrary.h - Portable Dynamic Library -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the sys::DynamicLibrary class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_DYNAMICLIBRARY_H
#define LLVM_SUPPORT_DYNAMICLIBRARY_H
#include <string>
namespace llvm {
class StringRef;
namespace sys {
/// This class provides a portable interface to dynamic libraries which also
/// might be known as shared libraries, shared objects, dynamic shared
/// objects, or dynamic link libraries. Regardless of the terminology or the
/// operating system interface, this class provides a portable interface that
/// allows dynamic libraries to be loaded and searched for externally
/// defined symbols. This is typically used to provide "plug-in" support.
/// It also allows for symbols to be defined which don't live in any library,
/// but rather the main program itself, useful on Windows where the main
/// executable cannot be searched.
class DynamicLibrary {
// Placeholder whose address represents an invalid library.
// We use this instead of NULL or a pointer-int pair because the OS library
// might define 0 or 1 to be "special" handles, such as "search all".
static char Invalid;
// Opaque data used to interface with OS-specific dynamic library handling.
void *Data;
public:
explicit DynamicLibrary(void *data = &Invalid) : Data(data) {}
/// Return the OS specific handle value.
void *getOSSpecificHandle() const { return Data; }
/// Returns true if the object refers to a valid library.
bool isValid() const { return Data != &Invalid; }
/// Searches through the library for the symbol \p symbolName. If it is
/// found, the address of that symbol is returned. If not, NULL is returned.
/// Note that NULL will also be returned if the library failed to load.
/// Use isValid() to distinguish these cases if it is important.
/// Note that this will \e not search symbols explicitly registered by
/// AddSymbol().
void *getAddressOfSymbol(const char *symbolName);
/// This function permanently loads the dynamic library at the given path
/// using the library load operation from the host operating system. The
/// library instance will only be closed when global destructors run, and
/// there is no guarantee when the library will be unloaded.
///
/// This returns a valid DynamicLibrary instance on success and an invalid
/// instance on failure (see isValid()). \p *errMsg will only be modified if
/// the library fails to load.
///
/// It is safe to call this function multiple times for the same library.
/// Open a dynamic library permanently.
static DynamicLibrary getPermanentLibrary(const char *filename,
std::string *errMsg = nullptr);
/// Registers an externally loaded library. The library will be unloaded
/// when the program terminates.
///
/// It is safe to call this function multiple times for the same library,
/// though ownership is only taken if there was no error.
static DynamicLibrary addPermanentLibrary(void *handle,
std::string *errMsg = nullptr);
/// This function permanently loads the dynamic library at the given path.
/// Use this instead of getPermanentLibrary() when you won't need to get
/// symbols from the library itself.
///
/// It is safe to call this function multiple times for the same library.
static bool LoadLibraryPermanently(const char *Filename,
std::string *ErrMsg = nullptr) {
return !getPermanentLibrary(Filename, ErrMsg).isValid();
}
/// This function loads the dynamic library at the given path, using the
/// library load operation from the host operating system. The library
/// instance will be closed when closeLibrary is called or global destructors
/// are run, but there is no guarantee when the library will be unloaded.
///
/// This returns a valid DynamicLibrary instance on success and an invalid
/// instance on failure (see isValid()). \p *Err will only be modified if the
/// library fails to load.
///
/// It is safe to call this function multiple times for the same library.
static DynamicLibrary getLibrary(const char *FileName,
std::string *Err = nullptr);
/// This function closes the dynamic library at the given path, using the
/// library close operation of the host operating system, and there is no
/// guarantee if or when this will cause the the library to be unloaded.
///
/// This function should be called only if the library was loaded using the
/// getLibrary() function.
static void closeLibrary(DynamicLibrary &Lib);
enum SearchOrdering {
/// SO_Linker - Search as a call to dlsym(dlopen(NULL)) would when
/// DynamicLibrary::getPermanentLibrary(NULL) has been called or
/// search the list of explcitly loaded symbols if not.
SO_Linker,
/// SO_LoadedFirst - Search all loaded libraries, then as SO_Linker would.
SO_LoadedFirst,
/// SO_LoadedLast - Search as SO_Linker would, then loaded libraries.
/// Only useful to search if libraries with RTLD_LOCAL have been added.
SO_LoadedLast,
/// SO_LoadOrder - Or this in to search libraries in the ordered loaded.
/// The default bahaviour is to search loaded libraries in reverse.
SO_LoadOrder = 4
};
static SearchOrdering SearchOrder; // = SO_Linker
/// This function will search through all previously loaded dynamic
/// libraries for the symbol \p symbolName. If it is found, the address of
/// that symbol is returned. If not, null is returned. Note that this will
/// search permanently loaded libraries (getPermanentLibrary()) as well
/// as explicitly registered symbols (AddSymbol()).
/// @throws std::string on error.
/// Search through libraries for address of a symbol
static void *SearchForAddressOfSymbol(const char *symbolName);
/// Convenience function for C++ophiles.
static void *SearchForAddressOfSymbol(const std::string &symbolName) {
return SearchForAddressOfSymbol(symbolName.c_str());
}
/// This functions permanently adds the symbol \p symbolName with the
/// value \p symbolValue. These symbols are searched before any
/// libraries.
/// Add searchable symbol/value pair.
static void AddSymbol(StringRef symbolName, void *symbolValue);
class HandleSet;
};
} // End sys namespace
} // End llvm namespace
#endif
PK hwFZ]}�� Support/Signposts.hnu �[��� //===-- llvm/Support/Signposts.h - Interval debug annotations ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file Some OS's provide profilers that allow applications to provide custom
/// annotations to the profiler. For example, on Xcode 10 and later 'signposts'
/// can be emitted by the application and these will be rendered to the Points
/// of Interest track on the instruments timeline.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_SIGNPOSTS_H
#define LLVM_SUPPORT_SIGNPOSTS_H
#include <memory>
namespace llvm {
class SignpostEmitterImpl;
class StringRef;
/// Manages the emission of signposts into the recording method supported by
/// the OS.
class SignpostEmitter {
std::unique_ptr<SignpostEmitterImpl> Impl;
public:
SignpostEmitter();
~SignpostEmitter();
bool isEnabled() const;
/// Begin a signposted interval for a given object.
void startInterval(const void *O, StringRef Name);
/// End a signposted interval for a given object.
void endInterval(const void *O, StringRef Name);
};
} // end namespace llvm
#endif // LLVM_SUPPORT_SIGNPOSTS_H
PK hwFZ��D� Support/PGOOptions.hnu �[��� //===------ PGOOptions.h -- PGO option tunables ----------------*- C++ -*--===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
///
/// Define option tunables for PGO.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_PGOOPTIONS_H
#define LLVM_SUPPORT_PGOOPTIONS_H
#include "llvm/ADT/IntrusiveRefCntPtr.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace vfs {
class FileSystem;
} // namespace vfs
/// A struct capturing PGO tunables.
struct PGOOptions {
enum PGOAction { NoAction, IRInstr, IRUse, SampleUse };
enum CSPGOAction { NoCSAction, CSIRInstr, CSIRUse };
PGOOptions(std::string ProfileFile, std::string CSProfileGenFile,
std::string ProfileRemappingFile, std::string MemoryProfile,
IntrusiveRefCntPtr<vfs::FileSystem> FS,
PGOAction Action = NoAction, CSPGOAction CSAction = NoCSAction,
bool DebugInfoForProfiling = false,
bool PseudoProbeForProfiling = false);
PGOOptions(const PGOOptions &);
~PGOOptions();
PGOOptions &operator=(const PGOOptions &);
std::string ProfileFile;
std::string CSProfileGenFile;
std::string ProfileRemappingFile;
std::string MemoryProfile;
PGOAction Action;
CSPGOAction CSAction;
bool DebugInfoForProfiling;
bool PseudoProbeForProfiling;
IntrusiveRefCntPtr<vfs::FileSystem> FS;
};
} // namespace llvm
#endif
PK hwFZ8��& & Support/Format.hnu �[��� //===- Format.h - Efficient printf-style formatting for streams -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements the format() function, which can be used with other
// LLVM subsystems to provide printf-style formatting. This gives all the power
// and risk of printf. This can be used like this (with raw_ostreams as an
// example):
//
// OS << "mynumber: " << format("%4.5f", 1234.412) << '\n';
//
// Or if you prefer:
//
// OS << format("mynumber: %4.5f\n", 1234.412);
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_FORMAT_H
#define LLVM_SUPPORT_FORMAT_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/DataTypes.h"
#include <cassert>
#include <cstdio>
#include <optional>
#include <tuple>
#include <utility>
namespace llvm {
/// This is a helper class used for handling formatted output. It is the
/// abstract base class of a templated derived class.
class format_object_base {
protected:
const char *Fmt;
~format_object_base() = default; // Disallow polymorphic deletion.
format_object_base(const format_object_base &) = default;
virtual void home(); // Out of line virtual method.
/// Call snprintf() for this object, on the given buffer and size.
virtual int snprint(char *Buffer, unsigned BufferSize) const = 0;
public:
format_object_base(const char *fmt) : Fmt(fmt) {}
/// Format the object into the specified buffer. On success, this returns
/// the length of the formatted string. If the buffer is too small, this
/// returns a length to retry with, which will be larger than BufferSize.
unsigned print(char *Buffer, unsigned BufferSize) const {
assert(BufferSize && "Invalid buffer size!");
// Print the string, leaving room for the terminating null.
int N = snprint(Buffer, BufferSize);
// VC++ and old GlibC return negative on overflow, just double the size.
if (N < 0)
return BufferSize * 2;
// Other implementations yield number of bytes needed, not including the
// final '\0'.
if (unsigned(N) >= BufferSize)
return N + 1;
// Otherwise N is the length of output (not including the final '\0').
return N;
}
};
/// These are templated helper classes used by the format function that
/// capture the object to be formatted and the format string. When actually
/// printed, this synthesizes the string into a temporary buffer provided and
/// returns whether or not it is big enough.
// Helper to validate that format() parameters are scalars or pointers.
template <typename... Args> struct validate_format_parameters;
template <typename Arg, typename... Args>
struct validate_format_parameters<Arg, Args...> {
static_assert(std::is_scalar_v<Arg>,
"format can't be used with non fundamental / non pointer type");
validate_format_parameters() { validate_format_parameters<Args...>(); }
};
template <> struct validate_format_parameters<> {};
template <typename... Ts>
class format_object final : public format_object_base {
std::tuple<Ts...> Vals;
template <std::size_t... Is>
int snprint_tuple(char *Buffer, unsigned BufferSize,
std::index_sequence<Is...>) const {
#ifdef _MSC_VER
return _snprintf(Buffer, BufferSize, Fmt, std::get<Is>(Vals)...);
#else
return snprintf(Buffer, BufferSize, Fmt, std::get<Is>(Vals)...);
#endif
}
public:
format_object(const char *fmt, const Ts &... vals)
: format_object_base(fmt), Vals(vals...) {
validate_format_parameters<Ts...>();
}
int snprint(char *Buffer, unsigned BufferSize) const override {
return snprint_tuple(Buffer, BufferSize, std::index_sequence_for<Ts...>());
}
};
/// These are helper functions used to produce formatted output. They use
/// template type deduction to construct the appropriate instance of the
/// format_object class to simplify their construction.
///
/// This is typically used like:
/// \code
/// OS << format("%0.4f", myfloat) << '\n';
/// \endcode
template <typename... Ts>
inline format_object<Ts...> format(const char *Fmt, const Ts &... Vals) {
return format_object<Ts...>(Fmt, Vals...);
}
/// This is a helper class for left_justify, right_justify, and center_justify.
class FormattedString {
public:
enum Justification { JustifyNone, JustifyLeft, JustifyRight, JustifyCenter };
FormattedString(StringRef S, unsigned W, Justification J)
: Str(S), Width(W), Justify(J) {}
private:
StringRef Str;
unsigned Width;
Justification Justify;
friend class raw_ostream;
};
/// left_justify - append spaces after string so total output is
/// \p Width characters. If \p Str is larger that \p Width, full string
/// is written with no padding.
inline FormattedString left_justify(StringRef Str, unsigned Width) {
return FormattedString(Str, Width, FormattedString::JustifyLeft);
}
/// right_justify - add spaces before string so total output is
/// \p Width characters. If \p Str is larger that \p Width, full string
/// is written with no padding.
inline FormattedString right_justify(StringRef Str, unsigned Width) {
return FormattedString(Str, Width, FormattedString::JustifyRight);
}
/// center_justify - add spaces before and after string so total output is
/// \p Width characters. If \p Str is larger that \p Width, full string
/// is written with no padding.
inline FormattedString center_justify(StringRef Str, unsigned Width) {
return FormattedString(Str, Width, FormattedString::JustifyCenter);
}
/// This is a helper class used for format_hex() and format_decimal().
class FormattedNumber {
uint64_t HexValue;
int64_t DecValue;
unsigned Width;
bool Hex;
bool Upper;
bool HexPrefix;
friend class raw_ostream;
public:
FormattedNumber(uint64_t HV, int64_t DV, unsigned W, bool H, bool U,
bool Prefix)
: HexValue(HV), DecValue(DV), Width(W), Hex(H), Upper(U),
HexPrefix(Prefix) {}
};
/// format_hex - Output \p N as a fixed width hexadecimal. If number will not
/// fit in width, full number is still printed. Examples:
/// OS << format_hex(255, 4) => 0xff
/// OS << format_hex(255, 4, true) => 0xFF
/// OS << format_hex(255, 6) => 0x00ff
/// OS << format_hex(255, 2) => 0xff
inline FormattedNumber format_hex(uint64_t N, unsigned Width,
bool Upper = false) {
assert(Width <= 18 && "hex width must be <= 18");
return FormattedNumber(N, 0, Width, true, Upper, true);
}
/// format_hex_no_prefix - Output \p N as a fixed width hexadecimal. Does not
/// prepend '0x' to the outputted string. If number will not fit in width,
/// full number is still printed. Examples:
/// OS << format_hex_no_prefix(255, 2) => ff
/// OS << format_hex_no_prefix(255, 2, true) => FF
/// OS << format_hex_no_prefix(255, 4) => 00ff
/// OS << format_hex_no_prefix(255, 1) => ff
inline FormattedNumber format_hex_no_prefix(uint64_t N, unsigned Width,
bool Upper = false) {
assert(Width <= 16 && "hex width must be <= 16");
return FormattedNumber(N, 0, Width, true, Upper, false);
}
/// format_decimal - Output \p N as a right justified, fixed-width decimal. If
/// number will not fit in width, full number is still printed. Examples:
/// OS << format_decimal(0, 5) => " 0"
/// OS << format_decimal(255, 5) => " 255"
/// OS << format_decimal(-1, 3) => " -1"
/// OS << format_decimal(12345, 3) => "12345"
inline FormattedNumber format_decimal(int64_t N, unsigned Width) {
return FormattedNumber(0, N, Width, false, false, false);
}
class FormattedBytes {
ArrayRef<uint8_t> Bytes;
// If not std::nullopt, display offsets for each line relative to starting
// value.
std::optional<uint64_t> FirstByteOffset;
uint32_t IndentLevel; // Number of characters to indent each line.
uint32_t NumPerLine; // Number of bytes to show per line.
uint8_t ByteGroupSize; // How many hex bytes are grouped without spaces
bool Upper; // Show offset and hex bytes as upper case.
bool ASCII; // Show the ASCII bytes for the hex bytes to the right.
friend class raw_ostream;
public:
FormattedBytes(ArrayRef<uint8_t> B, uint32_t IL, std::optional<uint64_t> O,
uint32_t NPL, uint8_t BGS, bool U, bool A)
: Bytes(B), FirstByteOffset(O), IndentLevel(IL), NumPerLine(NPL),
ByteGroupSize(BGS), Upper(U), ASCII(A) {
if (ByteGroupSize > NumPerLine)
ByteGroupSize = NumPerLine;
}
};
inline FormattedBytes
format_bytes(ArrayRef<uint8_t> Bytes,
std::optional<uint64_t> FirstByteOffset = std::nullopt,
uint32_t NumPerLine = 16, uint8_t ByteGroupSize = 4,
uint32_t IndentLevel = 0, bool Upper = false) {
return FormattedBytes(Bytes, IndentLevel, FirstByteOffset, NumPerLine,
ByteGroupSize, Upper, false);
}
inline FormattedBytes
format_bytes_with_ascii(ArrayRef<uint8_t> Bytes,
std::optional<uint64_t> FirstByteOffset = std::nullopt,
uint32_t NumPerLine = 16, uint8_t ByteGroupSize = 4,
uint32_t IndentLevel = 0, bool Upper = false) {
return FormattedBytes(Bytes, IndentLevel, FirstByteOffset, NumPerLine,
ByteGroupSize, Upper, true);
}
} // end namespace llvm
#endif
PK hwFZ�}� � Support/ManagedStatic.hnu �[��� //===-- llvm/Support/ManagedStatic.h - Static Global wrapper ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the ManagedStatic class and the llvm_shutdown() function.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_MANAGEDSTATIC_H
#define LLVM_SUPPORT_MANAGEDSTATIC_H
#include <atomic>
#include <cstddef>
namespace llvm {
/// object_creator - Helper method for ManagedStatic.
template <class C> struct object_creator {
static void *call() { return new C(); }
};
/// object_deleter - Helper method for ManagedStatic.
///
template <typename T> struct object_deleter {
static void call(void *Ptr) { delete (T *)Ptr; }
};
template <typename T, size_t N> struct object_deleter<T[N]> {
static void call(void *Ptr) { delete[](T *)Ptr; }
};
// ManagedStatic must be initialized to zero, and it must *not* have a dynamic
// initializer because managed statics are often created while running other
// dynamic initializers. In standard C++11, the best way to accomplish this is
// with a constexpr default constructor. However, different versions of the
// Visual C++ compiler have had bugs where, even though the constructor may be
// constexpr, a dynamic initializer may be emitted depending on optimization
// settings. For the affected versions of MSVC, use the old linker
// initialization pattern of not providing a constructor and leaving the fields
// uninitialized. See http://llvm.org/PR41367 for details.
#if !defined(_MSC_VER) || (_MSC_VER >= 1925) || defined(__clang__)
#define LLVM_USE_CONSTEXPR_CTOR
#endif
/// ManagedStaticBase - Common base class for ManagedStatic instances.
class ManagedStaticBase {
protected:
#ifdef LLVM_USE_CONSTEXPR_CTOR
mutable std::atomic<void *> Ptr{};
mutable void (*DeleterFn)(void *) = nullptr;
mutable const ManagedStaticBase *Next = nullptr;
#else
// This should only be used as a static variable, which guarantees that this
// will be zero initialized.
mutable std::atomic<void *> Ptr;
mutable void (*DeleterFn)(void *);
mutable const ManagedStaticBase *Next;
#endif
void RegisterManagedStatic(void *(*creator)(), void (*deleter)(void*)) const;
public:
#ifdef LLVM_USE_CONSTEXPR_CTOR
constexpr ManagedStaticBase() = default;
#endif
/// isConstructed - Return true if this object has not been created yet.
bool isConstructed() const { return Ptr != nullptr; }
void destroy() const;
};
/// ManagedStatic - This transparently changes the behavior of global statics to
/// be lazily constructed on demand (good for reducing startup times of dynamic
/// libraries that link in LLVM components) and for making destruction be
/// explicit through the llvm_shutdown() function call.
///
template <class C, class Creator = object_creator<C>,
class Deleter = object_deleter<C>>
class ManagedStatic : public ManagedStaticBase {
public:
// Accessors.
C &operator*() {
void *Tmp = Ptr.load(std::memory_order_acquire);
if (!Tmp)
RegisterManagedStatic(Creator::call, Deleter::call);
return *static_cast<C *>(Ptr.load(std::memory_order_relaxed));
}
C *operator->() { return &**this; }
const C &operator*() const {
void *Tmp = Ptr.load(std::memory_order_acquire);
if (!Tmp)
RegisterManagedStatic(Creator::call, Deleter::call);
return *static_cast<C *>(Ptr.load(std::memory_order_relaxed));
}
const C *operator->() const { return &**this; }
// Extract the instance, leaving the ManagedStatic uninitialized. The
// user is then responsible for the lifetime of the returned instance.
C *claim() {
return static_cast<C *>(Ptr.exchange(nullptr));
}
};
/// llvm_shutdown - Deallocate and destroy all ManagedStatic variables.
void llvm_shutdown();
/// llvm_shutdown_obj - This is a simple helper class that calls
/// llvm_shutdown() when it is destroyed.
struct llvm_shutdown_obj {
llvm_shutdown_obj() = default;
~llvm_shutdown_obj() { llvm_shutdown(); }
};
} // end namespace llvm
#endif // LLVM_SUPPORT_MANAGEDSTATIC_H
PK hwFZs�� � � Support/Signals.hnu �[��� //===- llvm/Support/Signals.h - Signal Handling support ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines some helpful functions for dealing with the possibility of
// unix signals occurring while your program is running.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_SIGNALS_H
#define LLVM_SUPPORT_SIGNALS_H
#include <cstdint>
#include <string>
namespace llvm {
class StringRef;
class raw_ostream;
namespace sys {
/// This function runs all the registered interrupt handlers, including the
/// removal of files registered by RemoveFileOnSignal.
void RunInterruptHandlers();
/// This function registers signal handlers to ensure that if a signal gets
/// delivered that the named file is removed.
/// Remove a file if a fatal signal occurs.
bool RemoveFileOnSignal(StringRef Filename, std::string* ErrMsg = nullptr);
/// This function removes a file from the list of files to be removed on
/// signal delivery.
void DontRemoveFileOnSignal(StringRef Filename);
/// When an error signal (such as SIGABRT or SIGSEGV) is delivered to the
/// process, print a stack trace and then exit.
/// Print a stack trace if a fatal signal occurs.
/// \param Argv0 the current binary name, used to find the symbolizer
/// relative to the current binary before searching $PATH; can be
/// StringRef(), in which case we will only search $PATH.
/// \param DisableCrashReporting if \c true, disable the normal crash
/// reporting mechanisms on the underlying operating system.
void PrintStackTraceOnErrorSignal(StringRef Argv0,
bool DisableCrashReporting = false);
/// Disable all system dialog boxes that appear when the process crashes.
void DisableSystemDialogsOnCrash();
/// Print the stack trace using the given \c raw_ostream object.
/// \param Depth refers to the number of stackframes to print. If not
/// specified, the entire frame is printed.
void PrintStackTrace(raw_ostream &OS, int Depth = 0);
// Run all registered signal handlers.
void RunSignalHandlers();
using SignalHandlerCallback = void (*)(void *);
/// Add a function to be called when an abort/kill signal is delivered to the
/// process. The handler can have a cookie passed to it to identify what
/// instance of the handler it is.
void AddSignalHandler(SignalHandlerCallback FnPtr, void *Cookie);
/// This function registers a function to be called when the user "interrupts"
/// the program (typically by pressing ctrl-c). When the user interrupts the
/// program, the specified interrupt function is called instead of the program
/// being killed, and the interrupt function automatically disabled.
///
/// Note that interrupt functions are not allowed to call any non-reentrant
/// functions. An null interrupt function pointer disables the current
/// installed function. Note also that the handler may be executed on a
/// different thread on some platforms.
void SetInterruptFunction(void (*IF)());
/// Registers a function to be called when an "info" signal is delivered to
/// the process.
///
/// On POSIX systems, this will be SIGUSR1; on systems that have it, SIGINFO
/// will also be used (typically ctrl-t).
///
/// Note that signal handlers are not allowed to call any non-reentrant
/// functions. An null function pointer disables the current installed
/// function. Note also that the handler may be executed on a different
/// thread on some platforms.
void SetInfoSignalFunction(void (*Handler)());
/// Registers a function to be called in a "one-shot" manner when a pipe
/// signal is delivered to the process (i.e., on a failed write to a pipe).
/// After the pipe signal is handled once, the handler is unregistered.
///
/// The LLVM signal handling code will not install any handler for the pipe
/// signal unless one is provided with this API (see \ref
/// DefaultOneShotPipeSignalHandler). This handler must be provided before
/// any other LLVM signal handlers are installed: the \ref InitLLVM
/// constructor has a flag that can simplify this setup.
///
/// Note that the handler is not allowed to call any non-reentrant
/// functions. A null handler pointer disables the current installed
/// function. Note also that the handler may be executed on a
/// different thread on some platforms.
void SetOneShotPipeSignalFunction(void (*Handler)());
/// On Unix systems and Windows, this function exits with an "IO error" exit
/// code.
void DefaultOneShotPipeSignalHandler();
#ifdef _WIN32
/// Windows does not support signals and this handler must be called manually.
void CallOneShotPipeSignalHandler();
#endif
/// This function does the following:
/// - clean up any temporary files registered with RemoveFileOnSignal()
/// - dump the callstack from the exception context
/// - call any relevant interrupt/signal handlers
/// - create a core/mini dump of the exception context whenever possible
/// Context is a system-specific failure context: it is the signal type on
/// Unix; the ExceptionContext on Windows.
void CleanupOnSignal(uintptr_t Context);
void unregisterHandlers();
} // End sys namespace
} // End llvm namespace
#endif
PK hwFZ3D�� � Support/RISCVAttributes.hnu �[��� //===-- RISCVAttributes.h - RISCV Attributes --------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains enumerations for RISCV attributes as defined in RISC-V
// ELF psABI specification.
//
// RISC-V ELF psABI specification
//
// https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_RISCVATTRIBUTES_H
#define LLVM_SUPPORT_RISCVATTRIBUTES_H
#include "llvm/Support/ELFAttributes.h"
namespace llvm {
namespace RISCVAttrs {
const TagNameMap &getRISCVAttributeTags();
enum AttrType : unsigned {
// Attribute types in ELF/.riscv.attributes.
STACK_ALIGN = 4,
ARCH = 5,
UNALIGNED_ACCESS = 6,
PRIV_SPEC = 8,
PRIV_SPEC_MINOR = 10,
PRIV_SPEC_REVISION = 12,
};
enum StackAlign { ALIGN_4 = 4, ALIGN_16 = 16 };
enum { NOT_ALLOWED = 0, ALLOWED = 1 };
} // namespace RISCVAttrs
} // namespace llvm
#endif
PK hwFZ�f f Support/TrigramIndex.hnu �[��� //===-- TrigramIndex.h - a heuristic for SpecialCaseList --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//===----------------------------------------------------------------------===//
//
// TrigramIndex implements a heuristic for SpecialCaseList that allows to
// filter out ~99% incoming queries when all regular expressions in the
// SpecialCaseList are simple wildcards with '*' and '.'. If rules are more
// complicated, the check is defeated and it will always pass the queries to a
// full regex.
//
// The basic idea is that in order for a wildcard to match a query, the query
// needs to have all trigrams which occur in the wildcard. We create a trigram
// index (trigram -> list of rules with it) and then count trigrams in the query
// for each rule. If the count for one of the rules reaches the expected value,
// the check passes the query to a regex. If none of the rules got enough
// trigrams, the check tells that the query is definitely not matched by any
// of the rules, and no regex matching is needed.
// A similar idea was used in Google Code Search as described in the blog post:
// https://swtch.com/~rsc/regexp/regexp4.html
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_TRIGRAMINDEX_H
#define LLVM_SUPPORT_TRIGRAMINDEX_H
#include "llvm/ADT/SmallVector.h"
#include <string>
#include <unordered_map>
#include <vector>
namespace llvm {
class StringRef;
class TrigramIndex {
public:
/// Inserts a new Regex into the index.
void insert(const std::string &Regex);
/// Returns true, if special case list definitely does not have a line
/// that matches the query. Returns false, if it's not sure.
bool isDefinitelyOut(StringRef Query) const;
/// Returned true, iff the heuristic is defeated and not useful.
/// In this case isDefinitelyOut always returns false.
bool isDefeated() { return Defeated; }
private:
// If true, the rules are too complicated for the check to work, and full
// regex matching is needed for every rule.
bool Defeated = false;
// The minimum number of trigrams which should match for a rule to have a
// chance to match the query. The number of elements equals the number of
// regex rules in the SpecialCaseList.
std::vector<unsigned> Counts;
// Index holds a list of rules indices for each trigram. The same indices
// are used in Counts to store per-rule limits.
// If a trigram is too common (>4 rules with it), we stop tracking it,
// which increases the probability for a need to match using regex, but
// decreases the costs in the regular case.
std::unordered_map<unsigned, SmallVector<size_t, 4>> Index{256};
};
} // namespace llvm
#endif // LLVM_SUPPORT_TRIGRAMINDEX_H
PK hwFZ9�@�� �� Support/MachineValueType.hnu �[��� //===- Support/MachineValueType.h - Machine-Level types ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the set of machine-level target independent types which
// legal values in the code generator use.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_MACHINEVALUETYPE_H
#define LLVM_SUPPORT_MACHINEVALUETYPE_H
#include "llvm/ADT/Sequence.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/TypeSize.h"
#include <cassert>
namespace llvm {
class Type;
/// Machine Value Type. Every type that is supported natively by some
/// processor targeted by LLVM occurs here. This means that any legal value
/// type can be represented by an MVT.
class MVT {
public:
enum SimpleValueType : uint8_t {
// clang-format off
// Simple value types that aren't explicitly part of this enumeration
// are considered extended value types.
INVALID_SIMPLE_VALUE_TYPE = 0,
// If you change this numbering, you must change the values in
// ValueTypes.td as well!
Other = 1, // This is a non-standard value
i1 = 2, // This is a 1 bit integer value
i2 = 3, // This is a 2 bit integer value
i4 = 4, // This is a 4 bit integer value
i8 = 5, // This is an 8 bit integer value
i16 = 6, // This is a 16 bit integer value
i32 = 7, // This is a 32 bit integer value
i64 = 8, // This is a 64 bit integer value
i128 = 9, // This is a 128 bit integer value
FIRST_INTEGER_VALUETYPE = i1,
LAST_INTEGER_VALUETYPE = i128,
bf16 = 10, // This is a 16 bit brain floating point value
f16 = 11, // This is a 16 bit floating point value
f32 = 12, // This is a 32 bit floating point value
f64 = 13, // This is a 64 bit floating point value
f80 = 14, // This is a 80 bit floating point value
f128 = 15, // This is a 128 bit floating point value
ppcf128 = 16, // This is a PPC 128-bit floating point value
FIRST_FP_VALUETYPE = bf16,
LAST_FP_VALUETYPE = ppcf128,
v1i1 = 17, // 1 x i1
v2i1 = 18, // 2 x i1
v4i1 = 19, // 4 x i1
v8i1 = 20, // 8 x i1
v16i1 = 21, // 16 x i1
v32i1 = 22, // 32 x i1
v64i1 = 23, // 64 x i1
v128i1 = 24, // 128 x i1
v256i1 = 25, // 256 x i1
v512i1 = 26, // 512 x i1
v1024i1 = 27, // 1024 x i1
v2048i1 = 28, // 2048 x i1
v128i2 = 29, // 128 x i2
v256i2 = 30, // 256 x i2
v64i4 = 31, // 64 x i4
v128i4 = 32, // 128 x i4
v1i8 = 33, // 1 x i8
v2i8 = 34, // 2 x i8
v4i8 = 35, // 4 x i8
v8i8 = 36, // 8 x i8
v16i8 = 37, // 16 x i8
v32i8 = 38, // 32 x i8
v64i8 = 39, // 64 x i8
v128i8 = 40, // 128 x i8
v256i8 = 41, // 256 x i8
v512i8 = 42, // 512 x i8
v1024i8 = 43, // 1024 x i8
v1i16 = 44, // 1 x i16
v2i16 = 45, // 2 x i16
v3i16 = 46, // 3 x i16
v4i16 = 47, // 4 x i16
v8i16 = 48, // 8 x i16
v16i16 = 49, // 16 x i16
v32i16 = 50, // 32 x i16
v64i16 = 51, // 64 x i16
v128i16 = 52, // 128 x i16
v256i16 = 53, // 256 x i16
v512i16 = 54, // 512 x i16
v1i32 = 55, // 1 x i32
v2i32 = 56, // 2 x i32
v3i32 = 57, // 3 x i32
v4i32 = 58, // 4 x i32
v5i32 = 59, // 5 x i32
v6i32 = 60, // 6 x i32
v7i32 = 61, // 7 x i32
v8i32 = 62, // 8 x i32
v9i32 = 63, // 9 x i32
v10i32 = 64, // 10 x i32
v11i32 = 65, // 11 x i32
v12i32 = 66, // 12 x i32
v16i32 = 67, // 16 x i32
v32i32 = 68, // 32 x i32
v64i32 = 69, // 64 x i32
v128i32 = 70, // 128 x i32
v256i32 = 71, // 256 x i32
v512i32 = 72, // 512 x i32
v1024i32 = 73, // 1024 x i32
v2048i32 = 74, // 2048 x i32
v1i64 = 75, // 1 x i64
v2i64 = 76, // 2 x i64
v3i64 = 77, // 3 x i64
v4i64 = 78, // 4 x i64
v8i64 = 79, // 8 x i64
v16i64 = 80, // 16 x i64
v32i64 = 81, // 32 x i64
v64i64 = 82, // 64 x i64
v128i64 = 83, // 128 x i64
v256i64 = 84, // 256 x i64
v1i128 = 85, // 1 x i128
FIRST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE = v1i1,
LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE = v1i128,
v1f16 = 86, // 1 x f16
v2f16 = 87, // 2 x f16
v3f16 = 88, // 3 x f16
v4f16 = 89, // 4 x f16
v8f16 = 90, // 8 x f16
v16f16 = 91, // 16 x f16
v32f16 = 92, // 32 x f16
v64f16 = 93, // 64 x f16
v128f16 = 94, // 128 x f16
v256f16 = 95, // 256 x f16
v512f16 = 96, // 512 x f16
v2bf16 = 97, // 2 x bf16
v3bf16 = 98, // 3 x bf16
v4bf16 = 99, // 4 x bf16
v8bf16 = 100, // 8 x bf16
v16bf16 = 101, // 16 x bf16
v32bf16 = 102, // 32 x bf16
v64bf16 = 103, // 64 x bf16
v128bf16 = 104, // 128 x bf16
v1f32 = 105, // 1 x f32
v2f32 = 106, // 2 x f32
v3f32 = 107, // 3 x f32
v4f32 = 108, // 4 x f32
v5f32 = 109, // 5 x f32
v6f32 = 110, // 6 x f32
v7f32 = 111, // 7 x f32
v8f32 = 112, // 8 x f32
v9f32 = 113, // 9 x f32
v10f32 = 114, // 10 x f32
v11f32 = 115, // 11 x f32
v12f32 = 116, // 12 x f32
v16f32 = 117, // 16 x f32
v32f32 = 118, // 32 x f32
v64f32 = 119, // 64 x f32
v128f32 = 120, // 128 x f32
v256f32 = 121, // 256 x f32
v512f32 = 122, // 512 x f32
v1024f32 = 123, // 1024 x f32
v2048f32 = 124, // 2048 x f32
v1f64 = 125, // 1 x f64
v2f64 = 126, // 2 x f64
v3f64 = 127, // 3 x f64
v4f64 = 128, // 4 x f64
v8f64 = 129, // 8 x f64
v16f64 = 130, // 16 x f64
v32f64 = 131, // 32 x f64
v64f64 = 132, // 64 x f64
v128f64 = 133, // 128 x f64
v256f64 = 134, // 256 x f64
FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE = v1f16,
LAST_FP_FIXEDLEN_VECTOR_VALUETYPE = v256f64,
FIRST_FIXEDLEN_VECTOR_VALUETYPE = v1i1,
LAST_FIXEDLEN_VECTOR_VALUETYPE = v256f64,
nxv1i1 = 135, // n x 1 x i1
nxv2i1 = 136, // n x 2 x i1
nxv4i1 = 137, // n x 4 x i1
nxv8i1 = 138, // n x 8 x i1
nxv16i1 = 139, // n x 16 x i1
nxv32i1 = 140, // n x 32 x i1
nxv64i1 = 141, // n x 64 x i1
nxv1i8 = 142, // n x 1 x i8
nxv2i8 = 143, // n x 2 x i8
nxv4i8 = 144, // n x 4 x i8
nxv8i8 = 145, // n x 8 x i8
nxv16i8 = 146, // n x 16 x i8
nxv32i8 = 147, // n x 32 x i8
nxv64i8 = 148, // n x 64 x i8
nxv1i16 = 149, // n x 1 x i16
nxv2i16 = 150, // n x 2 x i16
nxv4i16 = 151, // n x 4 x i16
nxv8i16 = 152, // n x 8 x i16
nxv16i16 = 153, // n x 16 x i16
nxv32i16 = 154, // n x 32 x i16
nxv1i32 = 155, // n x 1 x i32
nxv2i32 = 156, // n x 2 x i32
nxv4i32 = 157, // n x 4 x i32
nxv8i32 = 158, // n x 8 x i32
nxv16i32 = 159, // n x 16 x i32
nxv32i32 = 160, // n x 32 x i32
nxv1i64 = 161, // n x 1 x i64
nxv2i64 = 162, // n x 2 x i64
nxv4i64 = 163, // n x 4 x i64
nxv8i64 = 164, // n x 8 x i64
nxv16i64 = 165, // n x 16 x i64
nxv32i64 = 166, // n x 32 x i64
FIRST_INTEGER_SCALABLE_VECTOR_VALUETYPE = nxv1i1,
LAST_INTEGER_SCALABLE_VECTOR_VALUETYPE = nxv32i64,
nxv1f16 = 167, // n x 1 x f16
nxv2f16 = 168, // n x 2 x f16
nxv4f16 = 169, // n x 4 x f16
nxv8f16 = 170, // n x 8 x f16
nxv16f16 = 171, // n x 16 x f16
nxv32f16 = 172, // n x 32 x f16
nxv1bf16 = 173, // n x 1 x bf16
nxv2bf16 = 174, // n x 2 x bf16
nxv4bf16 = 175, // n x 4 x bf16
nxv8bf16 = 176, // n x 8 x bf16
nxv16bf16 = 177, // n x 16 x bf16
nxv32bf16 = 178, // n x 32 x bf16
nxv1f32 = 179, // n x 1 x f32
nxv2f32 = 180, // n x 2 x f32
nxv4f32 = 181, // n x 4 x f32
nxv8f32 = 182, // n x 8 x f32
nxv16f32 = 183, // n x 16 x f32
nxv1f64 = 184, // n x 1 x f64
nxv2f64 = 185, // n x 2 x f64
nxv4f64 = 186, // n x 4 x f64
nxv8f64 = 187, // n x 8 x f64
FIRST_FP_SCALABLE_VECTOR_VALUETYPE = nxv1f16,
LAST_FP_SCALABLE_VECTOR_VALUETYPE = nxv8f64,
FIRST_SCALABLE_VECTOR_VALUETYPE = nxv1i1,
LAST_SCALABLE_VECTOR_VALUETYPE = nxv8f64,
FIRST_VECTOR_VALUETYPE = v1i1,
LAST_VECTOR_VALUETYPE = nxv8f64,
x86mmx = 188, // This is an X86 MMX value
Glue = 189, // This glues nodes together during pre-RA sched
isVoid = 190, // This has no value
Untyped = 191, // This value takes a register, but has
// unspecified type. The register class
// will be determined by the opcode.
funcref = 192, // WebAssembly's funcref type
externref = 193, // WebAssembly's externref type
x86amx = 194, // This is an X86 AMX value
i64x8 = 195, // 8 Consecutive GPRs (AArch64)
FIRST_VALUETYPE = 1, // This is always the beginning of the list.
LAST_VALUETYPE = i64x8, // This always remains at the end of the list.
VALUETYPE_SIZE = LAST_VALUETYPE + 1,
// This is the current maximum for LAST_VALUETYPE.
// MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors
// This value must be a multiple of 32.
MAX_ALLOWED_VALUETYPE = 224,
// A value of type llvm::TokenTy
token = 248,
// This is MDNode or MDString.
Metadata = 249,
// An int value the size of the pointer of the current
// target to any address space. This must only be used internal to
// tblgen. Other than for overloading, we treat iPTRAny the same as iPTR.
iPTRAny = 250,
// A vector with any length and element size. This is used
// for intrinsics that have overloadings based on vector types.
// This is only for tblgen's consumption!
vAny = 251,
// Any floating-point or vector floating-point value. This is used
// for intrinsics that have overloadings based on floating-point types.
// This is only for tblgen's consumption!
fAny = 252,
// An integer or vector integer value of any bit width. This is
// used for intrinsics that have overloadings based on integer bit widths.
// This is only for tblgen's consumption!
iAny = 253,
// An int value the size of the pointer of the current
// target. This should only be used internal to tblgen!
iPTR = 254,
// Any type. This is used for intrinsics that have overloadings.
// This is only for tblgen's consumption!
Any = 255
// clang-format on
};
SimpleValueType SimpleTy = INVALID_SIMPLE_VALUE_TYPE;
constexpr MVT() = default;
constexpr MVT(SimpleValueType SVT) : SimpleTy(SVT) {}
bool operator>(const MVT& S) const { return SimpleTy > S.SimpleTy; }
bool operator<(const MVT& S) const { return SimpleTy < S.SimpleTy; }
bool operator==(const MVT& S) const { return SimpleTy == S.SimpleTy; }
bool operator!=(const MVT& S) const { return SimpleTy != S.SimpleTy; }
bool operator>=(const MVT& S) const { return SimpleTy >= S.SimpleTy; }
bool operator<=(const MVT& S) const { return SimpleTy <= S.SimpleTy; }
/// Return true if this is a valid simple valuetype.
bool isValid() const {
return (SimpleTy >= MVT::FIRST_VALUETYPE &&
SimpleTy <= MVT::LAST_VALUETYPE);
}
/// Return true if this is a FP or a vector FP type.
bool isFloatingPoint() const {
return ((SimpleTy >= MVT::FIRST_FP_VALUETYPE &&
SimpleTy <= MVT::LAST_FP_VALUETYPE) ||
(SimpleTy >= MVT::FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE &&
SimpleTy <= MVT::LAST_FP_FIXEDLEN_VECTOR_VALUETYPE) ||
(SimpleTy >= MVT::FIRST_FP_SCALABLE_VECTOR_VALUETYPE &&
SimpleTy <= MVT::LAST_FP_SCALABLE_VECTOR_VALUETYPE));
}
/// Return true if this is an integer or a vector integer type.
bool isInteger() const {
return ((SimpleTy >= MVT::FIRST_INTEGER_VALUETYPE &&
SimpleTy <= MVT::LAST_INTEGER_VALUETYPE) ||
(SimpleTy >= MVT::FIRST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE &&
SimpleTy <= MVT::LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE) ||
(SimpleTy >= MVT::FIRST_INTEGER_SCALABLE_VECTOR_VALUETYPE &&
SimpleTy <= MVT::LAST_INTEGER_SCALABLE_VECTOR_VALUETYPE));
}
/// Return true if this is an integer, not including vectors.
bool isScalarInteger() const {
return (SimpleTy >= MVT::FIRST_INTEGER_VALUETYPE &&
SimpleTy <= MVT::LAST_INTEGER_VALUETYPE);
}
/// Return true if this is a vector value type.
bool isVector() const {
return (SimpleTy >= MVT::FIRST_VECTOR_VALUETYPE &&
SimpleTy <= MVT::LAST_VECTOR_VALUETYPE);
}
/// Return true if this is a vector value type where the
/// runtime length is machine dependent
bool isScalableVector() const {
return (SimpleTy >= MVT::FIRST_SCALABLE_VECTOR_VALUETYPE &&
SimpleTy <= MVT::LAST_SCALABLE_VECTOR_VALUETYPE);
}
bool isFixedLengthVector() const {
return (SimpleTy >= MVT::FIRST_FIXEDLEN_VECTOR_VALUETYPE &&
SimpleTy <= MVT::LAST_FIXEDLEN_VECTOR_VALUETYPE);
}
/// Return true if this is a 16-bit vector type.
bool is16BitVector() const {
return (SimpleTy == MVT::v2i8 || SimpleTy == MVT::v1i16 ||
SimpleTy == MVT::v16i1 || SimpleTy == MVT::v1f16);
}
/// Return true if this is a 32-bit vector type.
bool is32BitVector() const {
return (SimpleTy == MVT::v32i1 || SimpleTy == MVT::v4i8 ||
SimpleTy == MVT::v2i16 || SimpleTy == MVT::v1i32 ||
SimpleTy == MVT::v2f16 || SimpleTy == MVT::v2bf16 ||
SimpleTy == MVT::v1f32);
}
/// Return true if this is a 64-bit vector type.
bool is64BitVector() const {
return (SimpleTy == MVT::v64i1 || SimpleTy == MVT::v8i8 ||
SimpleTy == MVT::v4i16 || SimpleTy == MVT::v2i32 ||
SimpleTy == MVT::v1i64 || SimpleTy == MVT::v4f16 ||
SimpleTy == MVT::v4bf16 ||SimpleTy == MVT::v2f32 ||
SimpleTy == MVT::v1f64);
}
/// Return true if this is a 128-bit vector type.
bool is128BitVector() const {
return (SimpleTy == MVT::v128i1 || SimpleTy == MVT::v16i8 ||
SimpleTy == MVT::v8i16 || SimpleTy == MVT::v4i32 ||
SimpleTy == MVT::v2i64 || SimpleTy == MVT::v1i128 ||
SimpleTy == MVT::v8f16 || SimpleTy == MVT::v8bf16 ||
SimpleTy == MVT::v4f32 || SimpleTy == MVT::v2f64);
}
/// Return true if this is a 256-bit vector type.
bool is256BitVector() const {
return (SimpleTy == MVT::v16f16 || SimpleTy == MVT::v16bf16 ||
SimpleTy == MVT::v8f32 || SimpleTy == MVT::v4f64 ||
SimpleTy == MVT::v32i8 || SimpleTy == MVT::v16i16 ||
SimpleTy == MVT::v8i32 || SimpleTy == MVT::v4i64 ||
SimpleTy == MVT::v256i1 || SimpleTy == MVT::v128i2 ||
SimpleTy == MVT::v64i4);
}
/// Return true if this is a 512-bit vector type.
bool is512BitVector() const {
return (SimpleTy == MVT::v32f16 || SimpleTy == MVT::v32bf16 ||
SimpleTy == MVT::v16f32 || SimpleTy == MVT::v8f64 ||
SimpleTy == MVT::v512i1 || SimpleTy == MVT::v256i2 ||
SimpleTy == MVT::v128i4 || SimpleTy == MVT::v64i8 ||
SimpleTy == MVT::v32i16 || SimpleTy == MVT::v16i32 ||
SimpleTy == MVT::v8i64);
}
/// Return true if this is a 1024-bit vector type.
bool is1024BitVector() const {
return (SimpleTy == MVT::v1024i1 || SimpleTy == MVT::v128i8 ||
SimpleTy == MVT::v64i16 || SimpleTy == MVT::v32i32 ||
SimpleTy == MVT::v16i64 || SimpleTy == MVT::v64f16 ||
SimpleTy == MVT::v32f32 || SimpleTy == MVT::v16f64 ||
SimpleTy == MVT::v64bf16);
}
/// Return true if this is a 2048-bit vector type.
bool is2048BitVector() const {
return (SimpleTy == MVT::v256i8 || SimpleTy == MVT::v128i16 ||
SimpleTy == MVT::v64i32 || SimpleTy == MVT::v32i64 ||
SimpleTy == MVT::v128f16 || SimpleTy == MVT::v64f32 ||
SimpleTy == MVT::v32f64 || SimpleTy == MVT::v128bf16 ||
SimpleTy == MVT::v2048i1);
}
/// Return true if this is an overloaded type for TableGen.
bool isOverloaded() const {
return (SimpleTy == MVT::Any || SimpleTy == MVT::iAny ||
SimpleTy == MVT::fAny || SimpleTy == MVT::vAny ||
SimpleTy == MVT::iPTRAny);
}
/// Return a vector with the same number of elements as this vector, but
/// with the element type converted to an integer type with the same
/// bitwidth.
MVT changeVectorElementTypeToInteger() const {
MVT EltTy = getVectorElementType();
MVT IntTy = MVT::getIntegerVT(EltTy.getSizeInBits());
MVT VecTy = MVT::getVectorVT(IntTy, getVectorElementCount());
assert(VecTy.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE &&
"Simple vector VT not representable by simple integer vector VT!");
return VecTy;
}
/// Return a VT for a vector type whose attributes match ourselves
/// with the exception of the element type that is chosen by the caller.
MVT changeVectorElementType(MVT EltVT) const {
MVT VecTy = MVT::getVectorVT(EltVT, getVectorElementCount());
assert(VecTy.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE &&
"Simple vector VT not representable by simple integer vector VT!");
return VecTy;
}
/// Return the type converted to an equivalently sized integer or vector
/// with integer element type. Similar to changeVectorElementTypeToInteger,
/// but also handles scalars.
MVT changeTypeToInteger() {
if (isVector())
return changeVectorElementTypeToInteger();
return MVT::getIntegerVT(getSizeInBits());
}
/// Return a VT for a vector type with the same element type but
/// half the number of elements.
MVT getHalfNumVectorElementsVT() const {
MVT EltVT = getVectorElementType();
auto EltCnt = getVectorElementCount();
assert(EltCnt.isKnownEven() && "Splitting vector, but not in half!");
return getVectorVT(EltVT, EltCnt.divideCoefficientBy(2));
}
/// Returns true if the given vector is a power of 2.
bool isPow2VectorType() const {
unsigned NElts = getVectorMinNumElements();
return !(NElts & (NElts - 1));
}
/// Widens the length of the given vector MVT up to the nearest power of 2
/// and returns that type.
MVT getPow2VectorType() const {
if (isPow2VectorType())
return *this;
ElementCount NElts = getVectorElementCount();
unsigned NewMinCount = 1 << Log2_32_Ceil(NElts.getKnownMinValue());
NElts = ElementCount::get(NewMinCount, NElts.isScalable());
return MVT::getVectorVT(getVectorElementType(), NElts);
}
/// If this is a vector, return the element type, otherwise return this.
MVT getScalarType() const {
return isVector() ? getVectorElementType() : *this;
}
MVT getVectorElementType() const {
// clang-format off
switch (SimpleTy) {
default:
llvm_unreachable("Not a vector MVT!");
case v1i1:
case v2i1:
case v4i1:
case v8i1:
case v16i1:
case v32i1:
case v64i1:
case v128i1:
case v256i1:
case v512i1:
case v1024i1:
case v2048i1:
case nxv1i1:
case nxv2i1:
case nxv4i1:
case nxv8i1:
case nxv16i1:
case nxv32i1:
case nxv64i1: return i1;
case v128i2:
case v256i2: return i2;
case v64i4:
case v128i4: return i4;
case v1i8:
case v2i8:
case v4i8:
case v8i8:
case v16i8:
case v32i8:
case v64i8:
case v128i8:
case v256i8:
case v512i8:
case v1024i8:
case nxv1i8:
case nxv2i8:
case nxv4i8:
case nxv8i8:
case nxv16i8:
case nxv32i8:
case nxv64i8: return i8;
case v1i16:
case v2i16:
case v3i16:
case v4i16:
case v8i16:
case v16i16:
case v32i16:
case v64i16:
case v128i16:
case v256i16:
case v512i16:
case nxv1i16:
case nxv2i16:
case nxv4i16:
case nxv8i16:
case nxv16i16:
case nxv32i16: return i16;
case v1i32:
case v2i32:
case v3i32:
case v4i32:
case v5i32:
case v6i32:
case v7i32:
case v8i32:
case v9i32:
case v10i32:
case v11i32:
case v12i32:
case v16i32:
case v32i32:
case v64i32:
case v128i32:
case v256i32:
case v512i32:
case v1024i32:
case v2048i32:
case nxv1i32:
case nxv2i32:
case nxv4i32:
case nxv8i32:
case nxv16i32:
case nxv32i32: return i32;
case v1i64:
case v2i64:
case v3i64:
case v4i64:
case v8i64:
case v16i64:
case v32i64:
case v64i64:
case v128i64:
case v256i64:
case nxv1i64:
case nxv2i64:
case nxv4i64:
case nxv8i64:
case nxv16i64:
case nxv32i64: return i64;
case v1i128: return i128;
case v1f16:
case v2f16:
case v3f16:
case v4f16:
case v8f16:
case v16f16:
case v32f16:
case v64f16:
case v128f16:
case v256f16:
case v512f16:
case nxv1f16:
case nxv2f16:
case nxv4f16:
case nxv8f16:
case nxv16f16:
case nxv32f16: return f16;
case v2bf16:
case v3bf16:
case v4bf16:
case v8bf16:
case v16bf16:
case v32bf16:
case v64bf16:
case v128bf16:
case nxv1bf16:
case nxv2bf16:
case nxv4bf16:
case nxv8bf16:
case nxv16bf16:
case nxv32bf16: return bf16;
case v1f32:
case v2f32:
case v3f32:
case v4f32:
case v5f32:
case v6f32:
case v7f32:
case v8f32:
case v9f32:
case v10f32:
case v11f32:
case v12f32:
case v16f32:
case v32f32:
case v64f32:
case v128f32:
case v256f32:
case v512f32:
case v1024f32:
case v2048f32:
case nxv1f32:
case nxv2f32:
case nxv4f32:
case nxv8f32:
case nxv16f32: return f32;
case v1f64:
case v2f64:
case v3f64:
case v4f64:
case v8f64:
case v16f64:
case v32f64:
case v64f64:
case v128f64:
case v256f64:
case nxv1f64:
case nxv2f64:
case nxv4f64:
case nxv8f64: return f64;
}
// clang-format on
}
/// Given a vector type, return the minimum number of elements it contains.
unsigned getVectorMinNumElements() const {
switch (SimpleTy) {
default:
llvm_unreachable("Not a vector MVT!");
case v2048i1:
case v2048i32:
case v2048f32: return 2048;
case v1024i1:
case v1024i8:
case v1024i32:
case v1024f32: return 1024;
case v512i1:
case v512i8:
case v512i16:
case v512i32:
case v512f16:
case v512f32: return 512;
case v256i1:
case v256i2:
case v256i8:
case v256i16:
case v256f16:
case v256i32:
case v256i64:
case v256f32:
case v256f64: return 256;
case v128i1:
case v128i2:
case v128i4:
case v128i8:
case v128i16:
case v128i32:
case v128i64:
case v128f16:
case v128bf16:
case v128f32:
case v128f64: return 128;
case v64i1:
case v64i4:
case v64i8:
case v64i16:
case v64i32:
case v64i64:
case v64f16:
case v64bf16:
case v64f32:
case v64f64:
case nxv64i1:
case nxv64i8: return 64;
case v32i1:
case v32i8:
case v32i16:
case v32i32:
case v32i64:
case v32f16:
case v32bf16:
case v32f32:
case v32f64:
case nxv32i1:
case nxv32i8:
case nxv32i16:
case nxv32i32:
case nxv32i64:
case nxv32f16:
case nxv32bf16: return 32;
case v16i1:
case v16i8:
case v16i16:
case v16i32:
case v16i64:
case v16f16:
case v16bf16:
case v16f32:
case v16f64:
case nxv16i1:
case nxv16i8:
case nxv16i16:
case nxv16i32:
case nxv16i64:
case nxv16f16:
case nxv16bf16:
case nxv16f32: return 16;
case v12i32:
case v12f32: return 12;
case v11i32:
case v11f32: return 11;
case v10i32:
case v10f32: return 10;
case v9i32:
case v9f32: return 9;
case v8i1:
case v8i8:
case v8i16:
case v8i32:
case v8i64:
case v8f16:
case v8bf16:
case v8f32:
case v8f64:
case nxv8i1:
case nxv8i8:
case nxv8i16:
case nxv8i32:
case nxv8i64:
case nxv8f16:
case nxv8bf16:
case nxv8f32:
case nxv8f64: return 8;
case v7i32:
case v7f32: return 7;
case v6i32:
case v6f32: return 6;
case v5i32:
case v5f32: return 5;
case v4i1:
case v4i8:
case v4i16:
case v4i32:
case v4i64:
case v4f16:
case v4bf16:
case v4f32:
case v4f64:
case nxv4i1:
case nxv4i8:
case nxv4i16:
case nxv4i32:
case nxv4i64:
case nxv4f16:
case nxv4bf16:
case nxv4f32:
case nxv4f64: return 4;
case v3i16:
case v3i32:
case v3i64:
case v3f16:
case v3bf16:
case v3f32:
case v3f64: return 3;
case v2i1:
case v2i8:
case v2i16:
case v2i32:
case v2i64:
case v2f16:
case v2bf16:
case v2f32:
case v2f64:
case nxv2i1:
case nxv2i8:
case nxv2i16:
case nxv2i32:
case nxv2i64:
case nxv2f16:
case nxv2bf16:
case nxv2f32:
case nxv2f64: return 2;
case v1i1:
case v1i8:
case v1i16:
case v1i32:
case v1i64:
case v1i128:
case v1f16:
case v1f32:
case v1f64:
case nxv1i1:
case nxv1i8:
case nxv1i16:
case nxv1i32:
case nxv1i64:
case nxv1f16:
case nxv1bf16:
case nxv1f32:
case nxv1f64: return 1;
}
}
ElementCount getVectorElementCount() const {
return ElementCount::get(getVectorMinNumElements(), isScalableVector());
}
unsigned getVectorNumElements() const {
if (isScalableVector())
llvm::reportInvalidSizeRequest(
"Possible incorrect use of MVT::getVectorNumElements() for "
"scalable vector. Scalable flag may be dropped, use "
"MVT::getVectorElementCount() instead");
return getVectorMinNumElements();
}
/// Returns the size of the specified MVT in bits.
///
/// If the value type is a scalable vector type, the scalable property will
/// be set and the runtime size will be a positive integer multiple of the
/// base size.
TypeSize getSizeInBits() const {
switch (SimpleTy) {
default:
llvm_unreachable("getSizeInBits called on extended MVT.");
case Other:
llvm_unreachable("Value type is non-standard value, Other.");
case iPTR:
llvm_unreachable("Value type size is target-dependent. Ask TLI.");
case iPTRAny:
case iAny:
case fAny:
case vAny:
case Any:
llvm_unreachable("Value type is overloaded.");
case token:
llvm_unreachable("Token type is a sentinel that cannot be used "
"in codegen and has no size");
case Metadata:
llvm_unreachable("Value type is metadata.");
case i1:
case v1i1: return TypeSize::Fixed(1);
case nxv1i1: return TypeSize::Scalable(1);
case i2:
case v2i1: return TypeSize::Fixed(2);
case nxv2i1: return TypeSize::Scalable(2);
case i4:
case v4i1: return TypeSize::Fixed(4);
case nxv4i1: return TypeSize::Scalable(4);
case i8 :
case v1i8:
case v8i1: return TypeSize::Fixed(8);
case nxv1i8:
case nxv8i1: return TypeSize::Scalable(8);
case i16 :
case f16:
case bf16:
case v16i1:
case v2i8:
case v1i16:
case v1f16: return TypeSize::Fixed(16);
case nxv16i1:
case nxv2i8:
case nxv1i16:
case nxv1bf16:
case nxv1f16: return TypeSize::Scalable(16);
case f32 :
case i32 :
case v32i1:
case v4i8:
case v2i16:
case v2f16:
case v2bf16:
case v1f32:
case v1i32: return TypeSize::Fixed(32);
case nxv32i1:
case nxv4i8:
case nxv2i16:
case nxv1i32:
case nxv2f16:
case nxv2bf16:
case nxv1f32: return TypeSize::Scalable(32);
case v3i16:
case v3f16:
case v3bf16: return TypeSize::Fixed(48);
case x86mmx:
case f64 :
case i64 :
case v64i1:
case v8i8:
case v4i16:
case v2i32:
case v1i64:
case v4f16:
case v4bf16:
case v2f32:
case v1f64: return TypeSize::Fixed(64);
case nxv64i1:
case nxv8i8:
case nxv4i16:
case nxv2i32:
case nxv1i64:
case nxv4f16:
case nxv4bf16:
case nxv2f32:
case nxv1f64: return TypeSize::Scalable(64);
case f80 : return TypeSize::Fixed(80);
case v3i32:
case v3f32: return TypeSize::Fixed(96);
case f128:
case ppcf128:
case i128:
case v128i1:
case v16i8:
case v8i16:
case v4i32:
case v2i64:
case v1i128:
case v8f16:
case v8bf16:
case v4f32:
case v2f64: return TypeSize::Fixed(128);
case nxv16i8:
case nxv8i16:
case nxv4i32:
case nxv2i64:
case nxv8f16:
case nxv8bf16:
case nxv4f32:
case nxv2f64: return TypeSize::Scalable(128);
case v5i32:
case v5f32: return TypeSize::Fixed(160);
case v6i32:
case v3i64:
case v6f32:
case v3f64: return TypeSize::Fixed(192);
case v7i32:
case v7f32: return TypeSize::Fixed(224);
case v256i1:
case v128i2:
case v64i4:
case v32i8:
case v16i16:
case v8i32:
case v4i64:
case v16f16:
case v16bf16:
case v8f32:
case v4f64: return TypeSize::Fixed(256);
case nxv32i8:
case nxv16i16:
case nxv8i32:
case nxv4i64:
case nxv16f16:
case nxv16bf16:
case nxv8f32:
case nxv4f64: return TypeSize::Scalable(256);
case v9i32:
case v9f32: return TypeSize::Fixed(288);
case v10i32:
case v10f32: return TypeSize::Fixed(320);
case v11i32:
case v11f32: return TypeSize::Fixed(352);
case v12i32:
case v12f32: return TypeSize::Fixed(384);
case i64x8:
case v512i1:
case v256i2:
case v128i4:
case v64i8:
case v32i16:
case v16i32:
case v8i64:
case v32f16:
case v32bf16:
case v16f32:
case v8f64: return TypeSize::Fixed(512);
case nxv64i8:
case nxv32i16:
case nxv16i32:
case nxv8i64:
case nxv32f16:
case nxv32bf16:
case nxv16f32:
case nxv8f64: return TypeSize::Scalable(512);
case v1024i1:
case v128i8:
case v64i16:
case v32i32:
case v16i64:
case v64f16:
case v64bf16:
case v32f32:
case v16f64: return TypeSize::Fixed(1024);
case nxv32i32:
case nxv16i64: return TypeSize::Scalable(1024);
case v2048i1:
case v256i8:
case v128i16:
case v64i32:
case v32i64:
case v128f16:
case v128bf16:
case v64f32:
case v32f64: return TypeSize::Fixed(2048);
case nxv32i64: return TypeSize::Scalable(2048);
case v512i8:
case v256i16:
case v128i32:
case v64i64:
case v256f16:
case v128f32:
case v64f64: return TypeSize::Fixed(4096);
case v1024i8:
case v512i16:
case v256i32:
case v128i64:
case v512f16:
case v256f32:
case x86amx:
case v128f64: return TypeSize::Fixed(8192);
case v512i32:
case v256i64:
case v512f32:
case v256f64: return TypeSize::Fixed(16384);
case v1024i32:
case v1024f32: return TypeSize::Fixed(32768);
case v2048i32:
case v2048f32: return TypeSize::Fixed(65536);
case funcref:
case externref: return TypeSize::Fixed(0); // opaque type
}
}
/// Return the size of the specified fixed width value type in bits. The
/// function will assert if the type is scalable.
uint64_t getFixedSizeInBits() const {
return getSizeInBits().getFixedValue();
}
uint64_t getScalarSizeInBits() const {
return getScalarType().getSizeInBits().getFixedValue();
}
/// Return the number of bytes overwritten by a store of the specified value
/// type.
///
/// If the value type is a scalable vector type, the scalable property will
/// be set and the runtime size will be a positive integer multiple of the
/// base size.
TypeSize getStoreSize() const {
TypeSize BaseSize = getSizeInBits();
return {(BaseSize.getKnownMinValue() + 7) / 8, BaseSize.isScalable()};
}
// Return the number of bytes overwritten by a store of this value type or
// this value type's element type in the case of a vector.
uint64_t getScalarStoreSize() const {
return getScalarType().getStoreSize().getFixedValue();
}
/// Return the number of bits overwritten by a store of the specified value
/// type.
///
/// If the value type is a scalable vector type, the scalable property will
/// be set and the runtime size will be a positive integer multiple of the
/// base size.
TypeSize getStoreSizeInBits() const {
return getStoreSize() * 8;
}
/// Returns true if the number of bits for the type is a multiple of an
/// 8-bit byte.
bool isByteSized() const { return getSizeInBits().isKnownMultipleOf(8); }
/// Return true if we know at compile time this has more bits than VT.
bool knownBitsGT(MVT VT) const {
return TypeSize::isKnownGT(getSizeInBits(), VT.getSizeInBits());
}
/// Return true if we know at compile time this has more than or the same
/// bits as VT.
bool knownBitsGE(MVT VT) const {
return TypeSize::isKnownGE(getSizeInBits(), VT.getSizeInBits());
}
/// Return true if we know at compile time this has fewer bits than VT.
bool knownBitsLT(MVT VT) const {
return TypeSize::isKnownLT(getSizeInBits(), VT.getSizeInBits());
}
/// Return true if we know at compile time this has fewer than or the same
/// bits as VT.
bool knownBitsLE(MVT VT) const {
return TypeSize::isKnownLE(getSizeInBits(), VT.getSizeInBits());
}
/// Return true if this has more bits than VT.
bool bitsGT(MVT VT) const {
assert(isScalableVector() == VT.isScalableVector() &&
"Comparison between scalable and fixed types");
return knownBitsGT(VT);
}
/// Return true if this has no less bits than VT.
bool bitsGE(MVT VT) const {
assert(isScalableVector() == VT.isScalableVector() &&
"Comparison between scalable and fixed types");
return knownBitsGE(VT);
}
/// Return true if this has less bits than VT.
bool bitsLT(MVT VT) const {
assert(isScalableVector() == VT.isScalableVector() &&
"Comparison between scalable and fixed types");
return knownBitsLT(VT);
}
/// Return true if this has no more bits than VT.
bool bitsLE(MVT VT) const {
assert(isScalableVector() == VT.isScalableVector() &&
"Comparison between scalable and fixed types");
return knownBitsLE(VT);
}
static MVT getFloatingPointVT(unsigned BitWidth) {
switch (BitWidth) {
default:
llvm_unreachable("Bad bit width!");
case 16:
return MVT::f16;
case 32:
return MVT::f32;
case 64:
return MVT::f64;
case 80:
return MVT::f80;
case 128:
return MVT::f128;
}
}
static MVT getIntegerVT(unsigned BitWidth) {
switch (BitWidth) {
default:
return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE);
case 1:
return MVT::i1;
case 2:
return MVT::i2;
case 4:
return MVT::i4;
case 8:
return MVT::i8;
case 16:
return MVT::i16;
case 32:
return MVT::i32;
case 64:
return MVT::i64;
case 128:
return MVT::i128;
}
}
static MVT getVectorVT(MVT VT, unsigned NumElements) {
// clang-format off
switch (VT.SimpleTy) {
default:
break;
case MVT::i1:
if (NumElements == 1) return MVT::v1i1;
if (NumElements == 2) return MVT::v2i1;
if (NumElements == 4) return MVT::v4i1;
if (NumElements == 8) return MVT::v8i1;
if (NumElements == 16) return MVT::v16i1;
if (NumElements == 32) return MVT::v32i1;
if (NumElements == 64) return MVT::v64i1;
if (NumElements == 128) return MVT::v128i1;
if (NumElements == 256) return MVT::v256i1;
if (NumElements == 512) return MVT::v512i1;
if (NumElements == 1024) return MVT::v1024i1;
if (NumElements == 2048) return MVT::v2048i1;
break;
case MVT::i2:
if (NumElements == 128) return MVT::v128i2;
if (NumElements == 256) return MVT::v256i2;
break;
case MVT::i4:
if (NumElements == 64) return MVT::v64i4;
if (NumElements == 128) return MVT::v128i4;
break;
case MVT::i8:
if (NumElements == 1) return MVT::v1i8;
if (NumElements == 2) return MVT::v2i8;
if (NumElements == 4) return MVT::v4i8;
if (NumElements == 8) return MVT::v8i8;
if (NumElements == 16) return MVT::v16i8;
if (NumElements == 32) return MVT::v32i8;
if (NumElements == 64) return MVT::v64i8;
if (NumElements == 128) return MVT::v128i8;
if (NumElements == 256) return MVT::v256i8;
if (NumElements == 512) return MVT::v512i8;
if (NumElements == 1024) return MVT::v1024i8;
break;
case MVT::i16:
if (NumElements == 1) return MVT::v1i16;
if (NumElements == 2) return MVT::v2i16;
if (NumElements == 3) return MVT::v3i16;
if (NumElements == 4) return MVT::v4i16;
if (NumElements == 8) return MVT::v8i16;
if (NumElements == 16) return MVT::v16i16;
if (NumElements == 32) return MVT::v32i16;
if (NumElements == 64) return MVT::v64i16;
if (NumElements == 128) return MVT::v128i16;
if (NumElements == 256) return MVT::v256i16;
if (NumElements == 512) return MVT::v512i16;
break;
case MVT::i32:
if (NumElements == 1) return MVT::v1i32;
if (NumElements == 2) return MVT::v2i32;
if (NumElements == 3) return MVT::v3i32;
if (NumElements == 4) return MVT::v4i32;
if (NumElements == 5) return MVT::v5i32;
if (NumElements == 6) return MVT::v6i32;
if (NumElements == 7) return MVT::v7i32;
if (NumElements == 8) return MVT::v8i32;
if (NumElements == 9) return MVT::v9i32;
if (NumElements == 10) return MVT::v10i32;
if (NumElements == 11) return MVT::v11i32;
if (NumElements == 12) return MVT::v12i32;
if (NumElements == 16) return MVT::v16i32;
if (NumElements == 32) return MVT::v32i32;
if (NumElements == 64) return MVT::v64i32;
if (NumElements == 128) return MVT::v128i32;
if (NumElements == 256) return MVT::v256i32;
if (NumElements == 512) return MVT::v512i32;
if (NumElements == 1024) return MVT::v1024i32;
if (NumElements == 2048) return MVT::v2048i32;
break;
case MVT::i64:
if (NumElements == 1) return MVT::v1i64;
if (NumElements == 2) return MVT::v2i64;
if (NumElements == 3) return MVT::v3i64;
if (NumElements == 4) return MVT::v4i64;
if (NumElements == 8) return MVT::v8i64;
if (NumElements == 16) return MVT::v16i64;
if (NumElements == 32) return MVT::v32i64;
if (NumElements == 64) return MVT::v64i64;
if (NumElements == 128) return MVT::v128i64;
if (NumElements == 256) return MVT::v256i64;
break;
case MVT::i128:
if (NumElements == 1) return MVT::v1i128;
break;
case MVT::f16:
if (NumElements == 1) return MVT::v1f16;
if (NumElements == 2) return MVT::v2f16;
if (NumElements == 3) return MVT::v3f16;
if (NumElements == 4) return MVT::v4f16;
if (NumElements == 8) return MVT::v8f16;
if (NumElements == 16) return MVT::v16f16;
if (NumElements == 32) return MVT::v32f16;
if (NumElements == 64) return MVT::v64f16;
if (NumElements == 128) return MVT::v128f16;
if (NumElements == 256) return MVT::v256f16;
if (NumElements == 512) return MVT::v512f16;
break;
case MVT::bf16:
if (NumElements == 2) return MVT::v2bf16;
if (NumElements == 3) return MVT::v3bf16;
if (NumElements == 4) return MVT::v4bf16;
if (NumElements == 8) return MVT::v8bf16;
if (NumElements == 16) return MVT::v16bf16;
if (NumElements == 32) return MVT::v32bf16;
if (NumElements == 64) return MVT::v64bf16;
if (NumElements == 128) return MVT::v128bf16;
break;
case MVT::f32:
if (NumElements == 1) return MVT::v1f32;
if (NumElements == 2) return MVT::v2f32;
if (NumElements == 3) return MVT::v3f32;
if (NumElements == 4) return MVT::v4f32;
if (NumElements == 5) return MVT::v5f32;
if (NumElements == 6) return MVT::v6f32;
if (NumElements == 7) return MVT::v7f32;
if (NumElements == 8) return MVT::v8f32;
if (NumElements == 9) return MVT::v9f32;
if (NumElements == 10) return MVT::v10f32;
if (NumElements == 11) return MVT::v11f32;
if (NumElements == 12) return MVT::v12f32;
if (NumElements == 16) return MVT::v16f32;
if (NumElements == 32) return MVT::v32f32;
if (NumElements == 64) return MVT::v64f32;
if (NumElements == 128) return MVT::v128f32;
if (NumElements == 256) return MVT::v256f32;
if (NumElements == 512) return MVT::v512f32;
if (NumElements == 1024) return MVT::v1024f32;
if (NumElements == 2048) return MVT::v2048f32;
break;
case MVT::f64:
if (NumElements == 1) return MVT::v1f64;
if (NumElements == 2) return MVT::v2f64;
if (NumElements == 3) return MVT::v3f64;
if (NumElements == 4) return MVT::v4f64;
if (NumElements == 8) return MVT::v8f64;
if (NumElements == 16) return MVT::v16f64;
if (NumElements == 32) return MVT::v32f64;
if (NumElements == 64) return MVT::v64f64;
if (NumElements == 128) return MVT::v128f64;
if (NumElements == 256) return MVT::v256f64;
break;
}
return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE);
// clang-format on
}
static MVT getScalableVectorVT(MVT VT, unsigned NumElements) {
switch(VT.SimpleTy) {
default:
break;
case MVT::i1:
if (NumElements == 1) return MVT::nxv1i1;
if (NumElements == 2) return MVT::nxv2i1;
if (NumElements == 4) return MVT::nxv4i1;
if (NumElements == 8) return MVT::nxv8i1;
if (NumElements == 16) return MVT::nxv16i1;
if (NumElements == 32) return MVT::nxv32i1;
if (NumElements == 64) return MVT::nxv64i1;
break;
case MVT::i8:
if (NumElements == 1) return MVT::nxv1i8;
if (NumElements == 2) return MVT::nxv2i8;
if (NumElements == 4) return MVT::nxv4i8;
if (NumElements == 8) return MVT::nxv8i8;
if (NumElements == 16) return MVT::nxv16i8;
if (NumElements == 32) return MVT::nxv32i8;
if (NumElements == 64) return MVT::nxv64i8;
break;
case MVT::i16:
if (NumElements == 1) return MVT::nxv1i16;
if (NumElements == 2) return MVT::nxv2i16;
if (NumElements == 4) return MVT::nxv4i16;
if (NumElements == 8) return MVT::nxv8i16;
if (NumElements == 16) return MVT::nxv16i16;
if (NumElements == 32) return MVT::nxv32i16;
break;
case MVT::i32:
if (NumElements == 1) return MVT::nxv1i32;
if (NumElements == 2) return MVT::nxv2i32;
if (NumElements == 4) return MVT::nxv4i32;
if (NumElements == 8) return MVT::nxv8i32;
if (NumElements == 16) return MVT::nxv16i32;
if (NumElements == 32) return MVT::nxv32i32;
break;
case MVT::i64:
if (NumElements == 1) return MVT::nxv1i64;
if (NumElements == 2) return MVT::nxv2i64;
if (NumElements == 4) return MVT::nxv4i64;
if (NumElements == 8) return MVT::nxv8i64;
if (NumElements == 16) return MVT::nxv16i64;
if (NumElements == 32) return MVT::nxv32i64;
break;
case MVT::f16:
if (NumElements == 1) return MVT::nxv1f16;
if (NumElements == 2) return MVT::nxv2f16;
if (NumElements == 4) return MVT::nxv4f16;
if (NumElements == 8) return MVT::nxv8f16;
if (NumElements == 16) return MVT::nxv16f16;
if (NumElements == 32) return MVT::nxv32f16;
break;
case MVT::bf16:
if (NumElements == 1) return MVT::nxv1bf16;
if (NumElements == 2) return MVT::nxv2bf16;
if (NumElements == 4) return MVT::nxv4bf16;
if (NumElements == 8) return MVT::nxv8bf16;
if (NumElements == 16) return MVT::nxv16bf16;
if (NumElements == 32) return MVT::nxv32bf16;
break;
case MVT::f32:
if (NumElements == 1) return MVT::nxv1f32;
if (NumElements == 2) return MVT::nxv2f32;
if (NumElements == 4) return MVT::nxv4f32;
if (NumElements == 8) return MVT::nxv8f32;
if (NumElements == 16) return MVT::nxv16f32;
break;
case MVT::f64:
if (NumElements == 1) return MVT::nxv1f64;
if (NumElements == 2) return MVT::nxv2f64;
if (NumElements == 4) return MVT::nxv4f64;
if (NumElements == 8) return MVT::nxv8f64;
break;
}
return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE);
}
static MVT getVectorVT(MVT VT, unsigned NumElements, bool IsScalable) {
if (IsScalable)
return getScalableVectorVT(VT, NumElements);
return getVectorVT(VT, NumElements);
}
static MVT getVectorVT(MVT VT, ElementCount EC) {
if (EC.isScalable())
return getScalableVectorVT(VT, EC.getKnownMinValue());
return getVectorVT(VT, EC.getKnownMinValue());
}
/// Return the value type corresponding to the specified type. This returns
/// all pointers as iPTR. If HandleUnknown is true, unknown types are
/// returned as Other, otherwise they are invalid.
static MVT getVT(Type *Ty, bool HandleUnknown = false);
public:
/// SimpleValueType Iteration
/// @{
static auto all_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_VALUETYPE, MVT::LAST_VALUETYPE,
force_iteration_on_noniterable_enum);
}
static auto integer_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_INTEGER_VALUETYPE,
MVT::LAST_INTEGER_VALUETYPE,
force_iteration_on_noniterable_enum);
}
static auto fp_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_FP_VALUETYPE, MVT::LAST_FP_VALUETYPE,
force_iteration_on_noniterable_enum);
}
static auto vector_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_VECTOR_VALUETYPE,
MVT::LAST_VECTOR_VALUETYPE,
force_iteration_on_noniterable_enum);
}
static auto fixedlen_vector_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_FIXEDLEN_VECTOR_VALUETYPE,
MVT::LAST_FIXEDLEN_VECTOR_VALUETYPE,
force_iteration_on_noniterable_enum);
}
static auto scalable_vector_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_SCALABLE_VECTOR_VALUETYPE,
MVT::LAST_SCALABLE_VECTOR_VALUETYPE,
force_iteration_on_noniterable_enum);
}
static auto integer_fixedlen_vector_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE,
MVT::LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE,
force_iteration_on_noniterable_enum);
}
static auto fp_fixedlen_vector_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE,
MVT::LAST_FP_FIXEDLEN_VECTOR_VALUETYPE,
force_iteration_on_noniterable_enum);
}
static auto integer_scalable_vector_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_INTEGER_SCALABLE_VECTOR_VALUETYPE,
MVT::LAST_INTEGER_SCALABLE_VECTOR_VALUETYPE,
force_iteration_on_noniterable_enum);
}
static auto fp_scalable_vector_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_FP_SCALABLE_VECTOR_VALUETYPE,
MVT::LAST_FP_SCALABLE_VECTOR_VALUETYPE,
force_iteration_on_noniterable_enum);
}
/// @}
};
} // end namespace llvm
#endif // LLVM_SUPPORT_MACHINEVALUETYPE_H
PK hwFZ[�u�P P Support/ThreadLocal.hnu �[��� //===- llvm/Support/ThreadLocal.h - Thread Local Data ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the llvm::sys::ThreadLocal class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_THREADLOCAL_H
#define LLVM_SUPPORT_THREADLOCAL_H
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/Threading.h"
#include <cassert>
namespace llvm {
namespace sys {
// ThreadLocalImpl - Common base class of all ThreadLocal instantiations.
// YOU SHOULD NEVER USE THIS DIRECTLY.
class ThreadLocalImpl {
typedef uint64_t ThreadLocalDataTy;
/// Platform-specific thread local data.
///
/// This is embedded in the class and we avoid malloc'ing/free'ing it,
/// to make this class more safe for use along with CrashRecoveryContext.
union {
char data[sizeof(ThreadLocalDataTy)];
ThreadLocalDataTy align_data;
};
public:
ThreadLocalImpl();
virtual ~ThreadLocalImpl();
void setInstance(const void* d);
void *getInstance();
void removeInstance();
};
/// ThreadLocal - A class used to abstract thread-local storage. It holds,
/// for each thread, a pointer a single object of type T.
template<class T>
class ThreadLocal : public ThreadLocalImpl {
public:
ThreadLocal() : ThreadLocalImpl() { }
/// get - Fetches a pointer to the object associated with the current
/// thread. If no object has yet been associated, it returns NULL;
T* get() { return static_cast<T*>(getInstance()); }
// set - Associates a pointer to an object with the current thread.
void set(T* d) { setInstance(d); }
// erase - Removes the pointer associated with the current thread.
void erase() { removeInstance(); }
};
}
}
#endif
PK hwFZ���L �L Support/Compiler.hnu �[��� //===-- llvm/Support/Compiler.h - Compiler abstraction support --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines several macros, based on the current compiler. This allows
// use of compiler-specific features in a way that remains portable. This header
// can be included from either C or C++.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_COMPILER_H
#define LLVM_SUPPORT_COMPILER_H
#include "llvm/Config/llvm-config.h"
#include <stddef.h>
#if defined(_MSC_VER)
#include <sal.h>
#endif
#ifndef __has_feature
# define __has_feature(x) 0
#endif
#ifndef __has_extension
# define __has_extension(x) 0
#endif
#ifndef __has_attribute
# define __has_attribute(x) 0
#endif
#ifndef __has_builtin
# define __has_builtin(x) 0
#endif
#ifndef __has_include
# define __has_include(x) 0
#endif
// Only use __has_cpp_attribute in C++ mode. GCC defines __has_cpp_attribute in
// C mode, but the :: in __has_cpp_attribute(scoped::attribute) is invalid.
#ifndef LLVM_HAS_CPP_ATTRIBUTE
#if defined(__cplusplus) && defined(__has_cpp_attribute)
# define LLVM_HAS_CPP_ATTRIBUTE(x) __has_cpp_attribute(x)
#else
# define LLVM_HAS_CPP_ATTRIBUTE(x) 0
#endif
#endif
/// \macro LLVM_GNUC_PREREQ
/// Extend the default __GNUC_PREREQ even if glibc's features.h isn't
/// available.
#ifndef LLVM_GNUC_PREREQ
# if defined(__GNUC__) && defined(__GNUC_MINOR__) && defined(__GNUC_PATCHLEVEL__)
# define LLVM_GNUC_PREREQ(maj, min, patch) \
((__GNUC__ << 20) + (__GNUC_MINOR__ << 10) + __GNUC_PATCHLEVEL__ >= \
((maj) << 20) + ((min) << 10) + (patch))
# elif defined(__GNUC__) && defined(__GNUC_MINOR__)
# define LLVM_GNUC_PREREQ(maj, min, patch) \
((__GNUC__ << 20) + (__GNUC_MINOR__ << 10) >= ((maj) << 20) + ((min) << 10))
# else
# define LLVM_GNUC_PREREQ(maj, min, patch) 0
# endif
#endif
/// \macro LLVM_MSC_PREREQ
/// Is the compiler MSVC of at least the specified version?
/// The common \param version values to check for are:
/// * 1910: VS2017, version 15.1 & 15.2
/// * 1911: VS2017, version 15.3 & 15.4
/// * 1912: VS2017, version 15.5
/// * 1913: VS2017, version 15.6
/// * 1914: VS2017, version 15.7
/// * 1915: VS2017, version 15.8
/// * 1916: VS2017, version 15.9
/// * 1920: VS2019, version 16.0
/// * 1921: VS2019, version 16.1
/// * 1922: VS2019, version 16.2
/// * 1923: VS2019, version 16.3
/// * 1924: VS2019, version 16.4
/// * 1925: VS2019, version 16.5
/// * 1926: VS2019, version 16.6
/// * 1927: VS2019, version 16.7
/// * 1928: VS2019, version 16.8 + 16.9
/// * 1929: VS2019, version 16.10 + 16.11
/// * 1930: VS2022, version 17.0
#ifdef _MSC_VER
#define LLVM_MSC_PREREQ(version) (_MSC_VER >= (version))
// We require at least VS 2019.
#if !defined(LLVM_FORCE_USE_OLD_TOOLCHAIN)
#if !LLVM_MSC_PREREQ(1920)
#error LLVM requires at least VS 2019.
#endif
#endif
#else
#define LLVM_MSC_PREREQ(version) 0
#endif
/// LLVM_LIBRARY_VISIBILITY - If a class marked with this attribute is linked
/// into a shared library, then the class should be private to the library and
/// not accessible from outside it. Can also be used to mark variables and
/// functions, making them private to any shared library they are linked into.
/// On PE/COFF targets, library visibility is the default, so this isn't needed.
///
/// LLVM_EXTERNAL_VISIBILITY - classes, functions, and variables marked with
/// this attribute will be made public and visible outside of any shared library
/// they are linked in to.
#if LLVM_HAS_CPP_ATTRIBUTE(gnu::visibility)
#define LLVM_ATTRIBUTE_VISIBILITY_HIDDEN [[gnu::visibility("hidden")]]
#define LLVM_ATTRIBUTE_VISIBILITY_DEFAULT [[gnu::visibility("default")]]
#elif __has_attribute(visibility)
#define LLVM_ATTRIBUTE_VISIBILITY_HIDDEN __attribute__((visibility("hidden")))
#define LLVM_ATTRIBUTE_VISIBILITY_DEFAULT __attribute__((visibility("default")))
#else
#define LLVM_ATTRIBUTE_VISIBILITY_HIDDEN
#define LLVM_ATTRIBUTE_VISIBILITY_DEFAULT
#endif
#if (!(defined(_WIN32) || defined(__CYGWIN__)) || \
(defined(__MINGW32__) && defined(__clang__)))
#define LLVM_LIBRARY_VISIBILITY LLVM_ATTRIBUTE_VISIBILITY_HIDDEN
#if defined(LLVM_BUILD_LLVM_DYLIB) || defined(LLVM_BUILD_SHARED_LIBS)
#define LLVM_EXTERNAL_VISIBILITY LLVM_ATTRIBUTE_VISIBILITY_DEFAULT
#else
#define LLVM_EXTERNAL_VISIBILITY
#endif
#else
#define LLVM_LIBRARY_VISIBILITY
#define LLVM_EXTERNAL_VISIBILITY
#endif
#if defined(__GNUC__)
#define LLVM_PREFETCH(addr, rw, locality) __builtin_prefetch(addr, rw, locality)
#else
#define LLVM_PREFETCH(addr, rw, locality)
#endif
#if __has_attribute(used)
#define LLVM_ATTRIBUTE_USED __attribute__((__used__))
#else
#define LLVM_ATTRIBUTE_USED
#endif
#if defined(__clang__)
#define LLVM_DEPRECATED(MSG, FIX) __attribute__((deprecated(MSG, FIX)))
#else
#define LLVM_DEPRECATED(MSG, FIX) [[deprecated(MSG)]]
#endif
// Indicate that a non-static, non-const C++ member function reinitializes
// the entire object to a known state, independent of the previous state of
// the object.
//
// The clang-tidy check bugprone-use-after-move recognizes this attribute as a
// marker that a moved-from object has left the indeterminate state and can be
// reused.
#if LLVM_HAS_CPP_ATTRIBUTE(clang::reinitializes)
#define LLVM_ATTRIBUTE_REINITIALIZES [[clang::reinitializes]]
#else
#define LLVM_ATTRIBUTE_REINITIALIZES
#endif
// Some compilers warn about unused functions. When a function is sometimes
// used or not depending on build settings (e.g. a function only called from
// within "assert"), this attribute can be used to suppress such warnings.
//
// However, it shouldn't be used for unused *variables*, as those have a much
// more portable solution:
// (void)unused_var_name;
// Prefer cast-to-void wherever it is sufficient.
#if __has_attribute(unused)
#define LLVM_ATTRIBUTE_UNUSED __attribute__((__unused__))
#else
#define LLVM_ATTRIBUTE_UNUSED
#endif
// FIXME: Provide this for PE/COFF targets.
#if __has_attribute(weak) && !defined(__MINGW32__) && !defined(__CYGWIN__) && \
!defined(_WIN32)
#define LLVM_ATTRIBUTE_WEAK __attribute__((__weak__))
#else
#define LLVM_ATTRIBUTE_WEAK
#endif
// Prior to clang 3.2, clang did not accept any spelling of
// __has_attribute(const), so assume it is supported.
#if defined(__clang__) || defined(__GNUC__)
// aka 'CONST' but following LLVM Conventions.
#define LLVM_READNONE __attribute__((__const__))
#else
#define LLVM_READNONE
#endif
#if __has_attribute(pure) || defined(__GNUC__)
// aka 'PURE' but following LLVM Conventions.
#define LLVM_READONLY __attribute__((__pure__))
#else
#define LLVM_READONLY
#endif
#if __has_attribute(minsize)
#define LLVM_ATTRIBUTE_MINSIZE __attribute__((minsize))
#else
#define LLVM_ATTRIBUTE_MINSIZE
#endif
#if __has_builtin(__builtin_expect) || defined(__GNUC__)
#define LLVM_LIKELY(EXPR) __builtin_expect((bool)(EXPR), true)
#define LLVM_UNLIKELY(EXPR) __builtin_expect((bool)(EXPR), false)
#else
#define LLVM_LIKELY(EXPR) (EXPR)
#define LLVM_UNLIKELY(EXPR) (EXPR)
#endif
/// LLVM_ATTRIBUTE_NOINLINE - On compilers where we have a directive to do so,
/// mark a method "not for inlining".
#if __has_attribute(noinline)
#define LLVM_ATTRIBUTE_NOINLINE __attribute__((noinline))
#elif defined(_MSC_VER)
#define LLVM_ATTRIBUTE_NOINLINE __declspec(noinline)
#else
#define LLVM_ATTRIBUTE_NOINLINE
#endif
/// LLVM_ATTRIBUTE_ALWAYS_INLINE - On compilers where we have a directive to do
/// so, mark a method "always inline" because it is performance sensitive.
#if __has_attribute(always_inline)
#define LLVM_ATTRIBUTE_ALWAYS_INLINE inline __attribute__((always_inline))
#elif defined(_MSC_VER)
#define LLVM_ATTRIBUTE_ALWAYS_INLINE __forceinline
#else
#define LLVM_ATTRIBUTE_ALWAYS_INLINE inline
#endif
/// LLVM_ATTRIBUTE_NO_DEBUG - On compilers where we have a directive to do
/// so, mark a method "no debug" because debug info makes the debugger
/// experience worse.
#if __has_attribute(nodebug)
#define LLVM_ATTRIBUTE_NODEBUG __attribute__((nodebug))
#else
#define LLVM_ATTRIBUTE_NODEBUG
#endif
#if __has_attribute(returns_nonnull)
#define LLVM_ATTRIBUTE_RETURNS_NONNULL __attribute__((returns_nonnull))
#elif defined(_MSC_VER)
#define LLVM_ATTRIBUTE_RETURNS_NONNULL _Ret_notnull_
#else
#define LLVM_ATTRIBUTE_RETURNS_NONNULL
#endif
/// \macro LLVM_ATTRIBUTE_RETURNS_NOALIAS Used to mark a function as returning a
/// pointer that does not alias any other valid pointer.
#ifdef __GNUC__
#define LLVM_ATTRIBUTE_RETURNS_NOALIAS __attribute__((__malloc__))
#elif defined(_MSC_VER)
#define LLVM_ATTRIBUTE_RETURNS_NOALIAS __declspec(restrict)
#else
#define LLVM_ATTRIBUTE_RETURNS_NOALIAS
#endif
/// LLVM_FALLTHROUGH - Mark fallthrough cases in switch statements.
#if defined(__cplusplus) && __cplusplus > 201402L && LLVM_HAS_CPP_ATTRIBUTE(fallthrough)
#define LLVM_FALLTHROUGH [[fallthrough]]
#elif LLVM_HAS_CPP_ATTRIBUTE(gnu::fallthrough)
#define LLVM_FALLTHROUGH [[gnu::fallthrough]]
#elif __has_attribute(fallthrough)
#define LLVM_FALLTHROUGH __attribute__((fallthrough))
#elif LLVM_HAS_CPP_ATTRIBUTE(clang::fallthrough)
#define LLVM_FALLTHROUGH [[clang::fallthrough]]
#else
#define LLVM_FALLTHROUGH
#endif
/// LLVM_REQUIRE_CONSTANT_INITIALIZATION - Apply this to globals to ensure that
/// they are constant initialized.
#if LLVM_HAS_CPP_ATTRIBUTE(clang::require_constant_initialization)
#define LLVM_REQUIRE_CONSTANT_INITIALIZATION \
[[clang::require_constant_initialization]]
#else
#define LLVM_REQUIRE_CONSTANT_INITIALIZATION
#endif
/// LLVM_GSL_OWNER - Apply this to owning classes like SmallVector to enable
/// lifetime warnings.
#if LLVM_HAS_CPP_ATTRIBUTE(gsl::Owner)
#define LLVM_GSL_OWNER [[gsl::Owner]]
#else
#define LLVM_GSL_OWNER
#endif
/// LLVM_GSL_POINTER - Apply this to non-owning classes like
/// StringRef to enable lifetime warnings.
#if LLVM_HAS_CPP_ATTRIBUTE(gsl::Pointer)
#define LLVM_GSL_POINTER [[gsl::Pointer]]
#else
#define LLVM_GSL_POINTER
#endif
/// LLVM_EXTENSION - Support compilers where we have a keyword to suppress
/// pedantic diagnostics.
#ifdef __GNUC__
#define LLVM_EXTENSION __extension__
#else
#define LLVM_EXTENSION
#endif
/// LLVM_BUILTIN_UNREACHABLE - On compilers which support it, expands
/// to an expression which states that it is undefined behavior for the
/// compiler to reach this point. Otherwise is not defined.
///
/// '#else' is intentionally left out so that other macro logic (e.g.,
/// LLVM_ASSUME_ALIGNED and llvm_unreachable()) can detect whether
/// LLVM_BUILTIN_UNREACHABLE has a definition.
#if __has_builtin(__builtin_unreachable) || defined(__GNUC__)
# define LLVM_BUILTIN_UNREACHABLE __builtin_unreachable()
#elif defined(_MSC_VER)
# define LLVM_BUILTIN_UNREACHABLE __assume(false)
#endif
/// LLVM_BUILTIN_TRAP - On compilers which support it, expands to an expression
/// which causes the program to exit abnormally.
#if __has_builtin(__builtin_trap) || defined(__GNUC__)
# define LLVM_BUILTIN_TRAP __builtin_trap()
#elif defined(_MSC_VER)
// The __debugbreak intrinsic is supported by MSVC, does not require forward
// declarations involving platform-specific typedefs (unlike RaiseException),
// results in a call to vectored exception handlers, and encodes to a short
// instruction that still causes the trapping behavior we want.
# define LLVM_BUILTIN_TRAP __debugbreak()
#else
# define LLVM_BUILTIN_TRAP *(volatile int*)0x11 = 0
#endif
/// LLVM_BUILTIN_DEBUGTRAP - On compilers which support it, expands to
/// an expression which causes the program to break while running
/// under a debugger.
#if __has_builtin(__builtin_debugtrap)
# define LLVM_BUILTIN_DEBUGTRAP __builtin_debugtrap()
#elif defined(_MSC_VER)
// The __debugbreak intrinsic is supported by MSVC and breaks while
// running under the debugger, and also supports invoking a debugger
// when the OS is configured appropriately.
# define LLVM_BUILTIN_DEBUGTRAP __debugbreak()
#else
// Just continue execution when built with compilers that have no
// support. This is a debugging aid and not intended to force the
// program to abort if encountered.
# define LLVM_BUILTIN_DEBUGTRAP
#endif
/// \macro LLVM_ASSUME_ALIGNED
/// Returns a pointer with an assumed alignment.
#if __has_builtin(__builtin_assume_aligned) || defined(__GNUC__)
# define LLVM_ASSUME_ALIGNED(p, a) __builtin_assume_aligned(p, a)
#elif defined(LLVM_BUILTIN_UNREACHABLE)
# define LLVM_ASSUME_ALIGNED(p, a) \
(((uintptr_t(p) % (a)) == 0) ? (p) : (LLVM_BUILTIN_UNREACHABLE, (p)))
#else
# define LLVM_ASSUME_ALIGNED(p, a) (p)
#endif
/// \macro LLVM_PACKED
/// Used to specify a packed structure.
/// LLVM_PACKED(
/// struct A {
/// int i;
/// int j;
/// int k;
/// long long l;
/// });
///
/// LLVM_PACKED_START
/// struct B {
/// int i;
/// int j;
/// int k;
/// long long l;
/// };
/// LLVM_PACKED_END
#ifdef _MSC_VER
# define LLVM_PACKED(d) __pragma(pack(push, 1)) d __pragma(pack(pop))
# define LLVM_PACKED_START __pragma(pack(push, 1))
# define LLVM_PACKED_END __pragma(pack(pop))
#else
# define LLVM_PACKED(d) d __attribute__((packed))
# define LLVM_PACKED_START _Pragma("pack(push, 1)")
# define LLVM_PACKED_END _Pragma("pack(pop)")
#endif
/// \macro LLVM_MEMORY_SANITIZER_BUILD
/// Whether LLVM itself is built with MemorySanitizer instrumentation.
#if __has_feature(memory_sanitizer)
# define LLVM_MEMORY_SANITIZER_BUILD 1
# include <sanitizer/msan_interface.h>
# define LLVM_NO_SANITIZE_MEMORY_ATTRIBUTE __attribute__((no_sanitize_memory))
#else
# define LLVM_MEMORY_SANITIZER_BUILD 0
# define __msan_allocated_memory(p, size)
# define __msan_unpoison(p, size)
# define LLVM_NO_SANITIZE_MEMORY_ATTRIBUTE
#endif
/// \macro LLVM_ADDRESS_SANITIZER_BUILD
/// Whether LLVM itself is built with AddressSanitizer instrumentation.
#if __has_feature(address_sanitizer) || defined(__SANITIZE_ADDRESS__)
# define LLVM_ADDRESS_SANITIZER_BUILD 1
#if __has_include(<sanitizer/asan_interface.h>)
# include <sanitizer/asan_interface.h>
#else
// These declarations exist to support ASan with MSVC. If MSVC eventually ships
// asan_interface.h in their headers, then we can remove this.
#ifdef __cplusplus
extern "C" {
#endif
void __asan_poison_memory_region(void const volatile *addr, size_t size);
void __asan_unpoison_memory_region(void const volatile *addr, size_t size);
#ifdef __cplusplus
} // extern "C"
#endif
#endif
#else
# define LLVM_ADDRESS_SANITIZER_BUILD 0
# define __asan_poison_memory_region(p, size)
# define __asan_unpoison_memory_region(p, size)
#endif
/// \macro LLVM_HWADDRESS_SANITIZER_BUILD
/// Whether LLVM itself is built with HWAddressSanitizer instrumentation.
#if __has_feature(hwaddress_sanitizer)
#define LLVM_HWADDRESS_SANITIZER_BUILD 1
#else
#define LLVM_HWADDRESS_SANITIZER_BUILD 0
#endif
/// \macro LLVM_THREAD_SANITIZER_BUILD
/// Whether LLVM itself is built with ThreadSanitizer instrumentation.
#if __has_feature(thread_sanitizer) || defined(__SANITIZE_THREAD__)
# define LLVM_THREAD_SANITIZER_BUILD 1
#else
# define LLVM_THREAD_SANITIZER_BUILD 0
#endif
#if LLVM_THREAD_SANITIZER_BUILD
// Thread Sanitizer is a tool that finds races in code.
// See http://code.google.com/p/data-race-test/wiki/DynamicAnnotations .
// tsan detects these exact functions by name.
#ifdef __cplusplus
extern "C" {
#endif
void AnnotateHappensAfter(const char *file, int line, const volatile void *cv);
void AnnotateHappensBefore(const char *file, int line, const volatile void *cv);
void AnnotateIgnoreWritesBegin(const char *file, int line);
void AnnotateIgnoreWritesEnd(const char *file, int line);
#ifdef __cplusplus
}
#endif
// This marker is used to define a happens-before arc. The race detector will
// infer an arc from the begin to the end when they share the same pointer
// argument.
# define TsanHappensBefore(cv) AnnotateHappensBefore(__FILE__, __LINE__, cv)
// This marker defines the destination of a happens-before arc.
# define TsanHappensAfter(cv) AnnotateHappensAfter(__FILE__, __LINE__, cv)
// Ignore any races on writes between here and the next TsanIgnoreWritesEnd.
# define TsanIgnoreWritesBegin() AnnotateIgnoreWritesBegin(__FILE__, __LINE__)
// Resume checking for racy writes.
# define TsanIgnoreWritesEnd() AnnotateIgnoreWritesEnd(__FILE__, __LINE__)
#else
# define TsanHappensBefore(cv)
# define TsanHappensAfter(cv)
# define TsanIgnoreWritesBegin()
# define TsanIgnoreWritesEnd()
#endif
/// \macro LLVM_NO_SANITIZE
/// Disable a particular sanitizer for a function.
#if __has_attribute(no_sanitize)
#define LLVM_NO_SANITIZE(KIND) __attribute__((no_sanitize(KIND)))
#else
#define LLVM_NO_SANITIZE(KIND)
#endif
/// Mark debug helper function definitions like dump() that should not be
/// stripped from debug builds.
/// Note that you should also surround dump() functions with
/// `#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)` so they do always
/// get stripped in release builds.
// FIXME: Move this to a private config.h as it's not usable in public headers.
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
#define LLVM_DUMP_METHOD LLVM_ATTRIBUTE_NOINLINE LLVM_ATTRIBUTE_USED
#else
#define LLVM_DUMP_METHOD LLVM_ATTRIBUTE_NOINLINE
#endif
/// \macro LLVM_PRETTY_FUNCTION
/// Gets a user-friendly looking function signature for the current scope
/// using the best available method on each platform. The exact format of the
/// resulting string is implementation specific and non-portable, so this should
/// only be used, for example, for logging or diagnostics.
#if defined(_MSC_VER)
#define LLVM_PRETTY_FUNCTION __FUNCSIG__
#elif defined(__GNUC__) || defined(__clang__)
#define LLVM_PRETTY_FUNCTION __PRETTY_FUNCTION__
#else
#define LLVM_PRETTY_FUNCTION __func__
#endif
/// \macro LLVM_THREAD_LOCAL
/// A thread-local storage specifier which can be used with globals,
/// extern globals, and static globals.
///
/// This is essentially an extremely restricted analog to C++11's thread_local
/// support. It uses thread_local if available, falling back on gcc __thread
/// if not. __thread doesn't support many of the C++11 thread_local's
/// features. You should only use this for PODs that you can statically
/// initialize to some constant value. In almost all circumstances this is most
/// appropriate for use with a pointer, integer, or small aggregation of
/// pointers and integers.
#if LLVM_ENABLE_THREADS
#if __has_feature(cxx_thread_local) || defined(_MSC_VER)
#define LLVM_THREAD_LOCAL thread_local
#else
// Clang, GCC, and other compatible compilers used __thread prior to C++11 and
// we only need the restricted functionality that provides.
#define LLVM_THREAD_LOCAL __thread
#endif
#else // !LLVM_ENABLE_THREADS
// If threading is disabled entirely, this compiles to nothing and you get
// a normal global variable.
#define LLVM_THREAD_LOCAL
#endif
/// \macro LLVM_ENABLE_EXCEPTIONS
/// Whether LLVM is built with exception support.
#if __has_feature(cxx_exceptions)
#define LLVM_ENABLE_EXCEPTIONS 1
#elif defined(__GNUC__) && defined(__EXCEPTIONS)
#define LLVM_ENABLE_EXCEPTIONS 1
#elif defined(_MSC_VER) && defined(_CPPUNWIND)
#define LLVM_ENABLE_EXCEPTIONS 1
#endif
/// \macro LLVM_NO_PROFILE_INSTRUMENT_FUNCTION
/// Disable the profile instrument for a function.
#if __has_attribute(no_profile_instrument_function)
#define LLVM_NO_PROFILE_INSTRUMENT_FUNCTION \
__attribute__((no_profile_instrument_function))
#else
#define LLVM_NO_PROFILE_INSTRUMENT_FUNCTION
#endif
#endif
PK hwFZ��X� � Support/type_traits.hnu �[��� //===- llvm/Support/type_traits.h - Simplfied type traits -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides useful additions to the standard type_traits library.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_TYPE_TRAITS_H
#define LLVM_SUPPORT_TYPE_TRAITS_H
#include "llvm/Support/Compiler.h"
#include <type_traits>
#include <utility>
namespace llvm {
/// Metafunction that determines whether the given type is either an
/// integral type or an enumeration type, including enum classes.
///
/// Note that this accepts potentially more integral types than is_integral
/// because it is based on being implicitly convertible to an integral type.
/// Also note that enum classes aren't implicitly convertible to integral types,
/// the value may therefore need to be explicitly converted before being used.
template <typename T> class is_integral_or_enum {
using UnderlyingT = std::remove_reference_t<T>;
public:
static const bool value =
!std::is_class_v<UnderlyingT> && // Filter conversion operators.
!std::is_pointer_v<UnderlyingT> &&
!std::is_floating_point_v<UnderlyingT> &&
(std::is_enum_v<UnderlyingT> ||
std::is_convertible_v<UnderlyingT, unsigned long long>);
};
/// If T is a pointer, just return it. If it is not, return T&.
template<typename T, typename Enable = void>
struct add_lvalue_reference_if_not_pointer { using type = T &; };
template <typename T>
struct add_lvalue_reference_if_not_pointer<
T, std::enable_if_t<std::is_pointer_v<T>>> {
using type = T;
};
/// If T is a pointer to X, return a pointer to const X. If it is not,
/// return const T.
template<typename T, typename Enable = void>
struct add_const_past_pointer { using type = const T; };
template <typename T>
struct add_const_past_pointer<T, std::enable_if_t<std::is_pointer_v<T>>> {
using type = const std::remove_pointer_t<T> *;
};
template <typename T, typename Enable = void>
struct const_pointer_or_const_ref {
using type = const T &;
};
template <typename T>
struct const_pointer_or_const_ref<T, std::enable_if_t<std::is_pointer_v<T>>> {
using type = typename add_const_past_pointer<T>::type;
};
namespace detail {
template<class T>
union trivial_helper {
T t;
};
} // end namespace detail
template <typename T>
struct is_copy_assignable {
template<class F>
static auto get(F*) -> decltype(std::declval<F &>() = std::declval<const F &>(), std::true_type{});
static std::false_type get(...);
static constexpr bool value = decltype(get((T*)nullptr))::value;
};
template <typename T>
struct is_move_assignable {
template<class F>
static auto get(F*) -> decltype(std::declval<F &>() = std::declval<F &&>(), std::true_type{});
static std::false_type get(...);
static constexpr bool value = decltype(get((T*)nullptr))::value;
};
} // end namespace llvm
#endif // LLVM_SUPPORT_TYPE_TRAITS_H
PK hwFZ(�1P� � Support/MipsABIFlags.hnu �[��� //===--- MipsABIFlags.h - MIPS ABI flags ----------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the constants for the ABI flags structure contained
// in the .MIPS.abiflags section.
//
// https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_MIPSABIFLAGS_H
#define LLVM_SUPPORT_MIPSABIFLAGS_H
namespace llvm {
namespace Mips {
// Values for the xxx_size bytes of an ABI flags structure.
enum AFL_REG {
AFL_REG_NONE = 0x00, // No registers
AFL_REG_32 = 0x01, // 32-bit registers
AFL_REG_64 = 0x02, // 64-bit registers
AFL_REG_128 = 0x03 // 128-bit registers
};
// Masks for the ases word of an ABI flags structure.
enum AFL_ASE {
AFL_ASE_DSP = 0x00000001, // DSP ASE
AFL_ASE_DSPR2 = 0x00000002, // DSP R2 ASE
AFL_ASE_EVA = 0x00000004, // Enhanced VA Scheme
AFL_ASE_MCU = 0x00000008, // MCU (MicroController) ASE
AFL_ASE_MDMX = 0x00000010, // MDMX ASE
AFL_ASE_MIPS3D = 0x00000020, // MIPS-3D ASE
AFL_ASE_MT = 0x00000040, // MT ASE
AFL_ASE_SMARTMIPS = 0x00000080, // SmartMIPS ASE
AFL_ASE_VIRT = 0x00000100, // VZ ASE
AFL_ASE_MSA = 0x00000200, // MSA ASE
AFL_ASE_MIPS16 = 0x00000400, // MIPS16 ASE
AFL_ASE_MICROMIPS = 0x00000800, // MICROMIPS ASE
AFL_ASE_XPA = 0x00001000, // XPA ASE
AFL_ASE_CRC = 0x00008000, // CRC ASE
AFL_ASE_GINV = 0x00020000 // GINV ASE
};
// Values for the isa_ext word of an ABI flags structure.
enum AFL_EXT {
AFL_EXT_NONE = 0, // None
AFL_EXT_XLR = 1, // RMI Xlr instruction
AFL_EXT_OCTEON2 = 2, // Cavium Networks Octeon2
AFL_EXT_OCTEONP = 3, // Cavium Networks OcteonP
AFL_EXT_LOONGSON_3A = 4, // Loongson 3A
AFL_EXT_OCTEON = 5, // Cavium Networks Octeon
AFL_EXT_5900 = 6, // MIPS R5900 instruction
AFL_EXT_4650 = 7, // MIPS R4650 instruction
AFL_EXT_4010 = 8, // LSI R4010 instruction
AFL_EXT_4100 = 9, // NEC VR4100 instruction
AFL_EXT_3900 = 10, // Toshiba R3900 instruction
AFL_EXT_10000 = 11, // MIPS R10000 instruction
AFL_EXT_SB1 = 12, // Broadcom SB-1 instruction
AFL_EXT_4111 = 13, // NEC VR4111/VR4181 instruction
AFL_EXT_4120 = 14, // NEC VR4120 instruction
AFL_EXT_5400 = 15, // NEC VR5400 instruction
AFL_EXT_5500 = 16, // NEC VR5500 instruction
AFL_EXT_LOONGSON_2E = 17, // ST Microelectronics Loongson 2E
AFL_EXT_LOONGSON_2F = 18, // ST Microelectronics Loongson 2F
AFL_EXT_OCTEON3 = 19 // Cavium Networks Octeon3
};
// Values for the flags1 word of an ABI flags structure.
enum AFL_FLAGS1 { AFL_FLAGS1_ODDSPREG = 1 };
// MIPS object attribute tags
enum {
Tag_GNU_MIPS_ABI_FP = 4, // Floating-point ABI used by this object file
Tag_GNU_MIPS_ABI_MSA = 8, // MSA ABI used by this object file
};
// Values for the fp_abi word of an ABI flags structure
// and for the Tag_GNU_MIPS_ABI_FP attribute tag.
enum Val_GNU_MIPS_ABI_FP {
Val_GNU_MIPS_ABI_FP_ANY = 0, // not tagged
Val_GNU_MIPS_ABI_FP_DOUBLE = 1, // hard float / -mdouble-float
Val_GNU_MIPS_ABI_FP_SINGLE = 2, // hard float / -msingle-float
Val_GNU_MIPS_ABI_FP_SOFT = 3, // soft float
Val_GNU_MIPS_ABI_FP_OLD_64 = 4, // -mips32r2 -mfp64
Val_GNU_MIPS_ABI_FP_XX = 5, // -mfpxx
Val_GNU_MIPS_ABI_FP_64 = 6, // -mips32r2 -mfp64
Val_GNU_MIPS_ABI_FP_64A = 7 // -mips32r2 -mfp64 -mno-odd-spreg
};
// Values for the Tag_GNU_MIPS_ABI_MSA attribute tag.
enum Val_GNU_MIPS_ABI_MSA {
Val_GNU_MIPS_ABI_MSA_ANY = 0, // not tagged
Val_GNU_MIPS_ABI_MSA_128 = 1 // 128-bit MSA
};
}
}
#endif
PK hwFZ䮦��W �W Support/OnDiskHashTable.hnu �[��� //===--- OnDiskHashTable.h - On-Disk Hash Table Implementation --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// Defines facilities for reading and writing on-disk hash tables.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ONDISKHASHTABLE_H
#define LLVM_SUPPORT_ONDISKHASHTABLE_H
#include "llvm/Support/Alignment.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/EndianStream.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <cstdlib>
namespace llvm {
/// Generates an on disk hash table.
///
/// This needs an \c Info that handles storing values into the hash table's
/// payload and computes the hash for a given key. This should provide the
/// following interface:
///
/// \code
/// class ExampleInfo {
/// public:
/// typedef ExampleKey key_type; // Must be copy constructible
/// typedef ExampleKey &key_type_ref;
/// typedef ExampleData data_type; // Must be copy constructible
/// typedef ExampleData &data_type_ref;
/// typedef uint32_t hash_value_type; // The type the hash function returns.
/// typedef uint32_t offset_type; // The type for offsets into the table.
///
/// /// Calculate the hash for Key
/// static hash_value_type ComputeHash(key_type_ref Key);
/// /// Return the lengths, in bytes, of the given Key/Data pair.
/// static std::pair<offset_type, offset_type>
/// EmitKeyDataLength(raw_ostream &Out, key_type_ref Key, data_type_ref Data);
/// /// Write Key to Out. KeyLen is the length from EmitKeyDataLength.
/// static void EmitKey(raw_ostream &Out, key_type_ref Key,
/// offset_type KeyLen);
/// /// Write Data to Out. DataLen is the length from EmitKeyDataLength.
/// static void EmitData(raw_ostream &Out, key_type_ref Key,
/// data_type_ref Data, offset_type DataLen);
/// /// Determine if two keys are equal. Optional, only needed by contains.
/// static bool EqualKey(key_type_ref Key1, key_type_ref Key2);
/// };
/// \endcode
template <typename Info> class OnDiskChainedHashTableGenerator {
/// A single item in the hash table.
class Item {
public:
typename Info::key_type Key;
typename Info::data_type Data;
Item *Next;
const typename Info::hash_value_type Hash;
Item(typename Info::key_type_ref Key, typename Info::data_type_ref Data,
Info &InfoObj)
: Key(Key), Data(Data), Next(nullptr), Hash(InfoObj.ComputeHash(Key)) {}
};
typedef typename Info::offset_type offset_type;
offset_type NumBuckets;
offset_type NumEntries;
llvm::SpecificBumpPtrAllocator<Item> BA;
/// A linked list of values in a particular hash bucket.
struct Bucket {
offset_type Off;
unsigned Length;
Item *Head;
};
Bucket *Buckets;
private:
/// Insert an item into the appropriate hash bucket.
void insert(Bucket *Buckets, size_t Size, Item *E) {
Bucket &B = Buckets[E->Hash & (Size - 1)];
E->Next = B.Head;
++B.Length;
B.Head = E;
}
/// Resize the hash table, moving the old entries into the new buckets.
void resize(size_t NewSize) {
Bucket *NewBuckets = static_cast<Bucket *>(
safe_calloc(NewSize, sizeof(Bucket)));
// Populate NewBuckets with the old entries.
for (size_t I = 0; I < NumBuckets; ++I)
for (Item *E = Buckets[I].Head; E;) {
Item *N = E->Next;
E->Next = nullptr;
insert(NewBuckets, NewSize, E);
E = N;
}
free(Buckets);
NumBuckets = NewSize;
Buckets = NewBuckets;
}
public:
/// Insert an entry into the table.
void insert(typename Info::key_type_ref Key,
typename Info::data_type_ref Data) {
Info InfoObj;
insert(Key, Data, InfoObj);
}
/// Insert an entry into the table.
///
/// Uses the provided Info instead of a stack allocated one.
void insert(typename Info::key_type_ref Key,
typename Info::data_type_ref Data, Info &InfoObj) {
++NumEntries;
if (4 * NumEntries >= 3 * NumBuckets)
resize(NumBuckets * 2);
insert(Buckets, NumBuckets, new (BA.Allocate()) Item(Key, Data, InfoObj));
}
/// Determine whether an entry has been inserted.
bool contains(typename Info::key_type_ref Key, Info &InfoObj) {
unsigned Hash = InfoObj.ComputeHash(Key);
for (Item *I = Buckets[Hash & (NumBuckets - 1)].Head; I; I = I->Next)
if (I->Hash == Hash && InfoObj.EqualKey(I->Key, Key))
return true;
return false;
}
/// Emit the table to Out, which must not be at offset 0.
offset_type Emit(raw_ostream &Out) {
Info InfoObj;
return Emit(Out, InfoObj);
}
/// Emit the table to Out, which must not be at offset 0.
///
/// Uses the provided Info instead of a stack allocated one.
offset_type Emit(raw_ostream &Out, Info &InfoObj) {
using namespace llvm::support;
endian::Writer LE(Out, little);
// Now we're done adding entries, resize the bucket list if it's
// significantly too large. (This only happens if the number of
// entries is small and we're within our initial allocation of
// 64 buckets.) We aim for an occupancy ratio in [3/8, 3/4).
//
// As a special case, if there are two or fewer entries, just
// form a single bucket. A linear scan is fine in that case, and
// this is very common in C++ class lookup tables. This also
// guarantees we produce at least one bucket for an empty table.
//
// FIXME: Try computing a perfect hash function at this point.
unsigned TargetNumBuckets =
NumEntries <= 2 ? 1 : llvm::bit_ceil(NumEntries * 4 / 3 + 1);
if (TargetNumBuckets != NumBuckets)
resize(TargetNumBuckets);
// Emit the payload of the table.
for (offset_type I = 0; I < NumBuckets; ++I) {
Bucket &B = Buckets[I];
if (!B.Head)
continue;
// Store the offset for the data of this bucket.
B.Off = Out.tell();
assert(B.Off && "Cannot write a bucket at offset 0. Please add padding.");
// Write out the number of items in the bucket.
LE.write<uint16_t>(B.Length);
assert(B.Length != 0 && "Bucket has a head but zero length?");
// Write out the entries in the bucket.
for (Item *I = B.Head; I; I = I->Next) {
LE.write<typename Info::hash_value_type>(I->Hash);
const std::pair<offset_type, offset_type> &Len =
InfoObj.EmitKeyDataLength(Out, I->Key, I->Data);
#ifdef NDEBUG
InfoObj.EmitKey(Out, I->Key, Len.first);
InfoObj.EmitData(Out, I->Key, I->Data, Len.second);
#else
// In asserts mode, check that the users length matches the data they
// wrote.
uint64_t KeyStart = Out.tell();
InfoObj.EmitKey(Out, I->Key, Len.first);
uint64_t DataStart = Out.tell();
InfoObj.EmitData(Out, I->Key, I->Data, Len.second);
uint64_t End = Out.tell();
assert(offset_type(DataStart - KeyStart) == Len.first &&
"key length does not match bytes written");
assert(offset_type(End - DataStart) == Len.second &&
"data length does not match bytes written");
#endif
}
}
// Pad with zeros so that we can start the hashtable at an aligned address.
offset_type TableOff = Out.tell();
uint64_t N = offsetToAlignment(TableOff, Align(alignof(offset_type)));
TableOff += N;
while (N--)
LE.write<uint8_t>(0);
// Emit the hashtable itself.
LE.write<offset_type>(NumBuckets);
LE.write<offset_type>(NumEntries);
for (offset_type I = 0; I < NumBuckets; ++I)
LE.write<offset_type>(Buckets[I].Off);
return TableOff;
}
OnDiskChainedHashTableGenerator() {
NumEntries = 0;
NumBuckets = 64;
// Note that we do not need to run the constructors of the individual
// Bucket objects since 'calloc' returns bytes that are all 0.
Buckets = static_cast<Bucket *>(safe_calloc(NumBuckets, sizeof(Bucket)));
}
~OnDiskChainedHashTableGenerator() { std::free(Buckets); }
};
/// Provides lookup on an on disk hash table.
///
/// This needs an \c Info that handles reading values from the hash table's
/// payload and computes the hash for a given key. This should provide the
/// following interface:
///
/// \code
/// class ExampleLookupInfo {
/// public:
/// typedef ExampleData data_type;
/// typedef ExampleInternalKey internal_key_type; // The stored key type.
/// typedef ExampleKey external_key_type; // The type to pass to find().
/// typedef uint32_t hash_value_type; // The type the hash function returns.
/// typedef uint32_t offset_type; // The type for offsets into the table.
///
/// /// Compare two keys for equality.
/// static bool EqualKey(internal_key_type &Key1, internal_key_type &Key2);
/// /// Calculate the hash for the given key.
/// static hash_value_type ComputeHash(internal_key_type &IKey);
/// /// Translate from the semantic type of a key in the hash table to the
/// /// type that is actually stored and used for hashing and comparisons.
/// /// The internal and external types are often the same, in which case this
/// /// can simply return the passed in value.
/// static const internal_key_type &GetInternalKey(external_key_type &EKey);
/// /// Read the key and data length from Buffer, leaving it pointing at the
/// /// following byte.
/// static std::pair<offset_type, offset_type>
/// ReadKeyDataLength(const unsigned char *&Buffer);
/// /// Read the key from Buffer, given the KeyLen as reported from
/// /// ReadKeyDataLength.
/// const internal_key_type &ReadKey(const unsigned char *Buffer,
/// offset_type KeyLen);
/// /// Read the data for Key from Buffer, given the DataLen as reported from
/// /// ReadKeyDataLength.
/// data_type ReadData(StringRef Key, const unsigned char *Buffer,
/// offset_type DataLen);
/// };
/// \endcode
template <typename Info> class OnDiskChainedHashTable {
const typename Info::offset_type NumBuckets;
const typename Info::offset_type NumEntries;
const unsigned char *const Buckets;
const unsigned char *const Base;
Info InfoObj;
public:
typedef Info InfoType;
typedef typename Info::internal_key_type internal_key_type;
typedef typename Info::external_key_type external_key_type;
typedef typename Info::data_type data_type;
typedef typename Info::hash_value_type hash_value_type;
typedef typename Info::offset_type offset_type;
OnDiskChainedHashTable(offset_type NumBuckets, offset_type NumEntries,
const unsigned char *Buckets,
const unsigned char *Base,
const Info &InfoObj = Info())
: NumBuckets(NumBuckets), NumEntries(NumEntries), Buckets(Buckets),
Base(Base), InfoObj(InfoObj) {
assert((reinterpret_cast<uintptr_t>(Buckets) & 0x3) == 0 &&
"'buckets' must have a 4-byte alignment");
}
/// Read the number of buckets and the number of entries from a hash table
/// produced by OnDiskHashTableGenerator::Emit, and advance the Buckets
/// pointer past them.
static std::pair<offset_type, offset_type>
readNumBucketsAndEntries(const unsigned char *&Buckets) {
assert((reinterpret_cast<uintptr_t>(Buckets) & 0x3) == 0 &&
"buckets should be 4-byte aligned.");
using namespace llvm::support;
offset_type NumBuckets =
endian::readNext<offset_type, little, aligned>(Buckets);
offset_type NumEntries =
endian::readNext<offset_type, little, aligned>(Buckets);
return std::make_pair(NumBuckets, NumEntries);
}
offset_type getNumBuckets() const { return NumBuckets; }
offset_type getNumEntries() const { return NumEntries; }
const unsigned char *getBase() const { return Base; }
const unsigned char *getBuckets() const { return Buckets; }
bool isEmpty() const { return NumEntries == 0; }
class iterator {
internal_key_type Key;
const unsigned char *const Data;
const offset_type Len;
Info *InfoObj;
public:
iterator() : Key(), Data(nullptr), Len(0), InfoObj(nullptr) {}
iterator(const internal_key_type K, const unsigned char *D, offset_type L,
Info *InfoObj)
: Key(K), Data(D), Len(L), InfoObj(InfoObj) {}
data_type operator*() const { return InfoObj->ReadData(Key, Data, Len); }
const unsigned char *getDataPtr() const { return Data; }
offset_type getDataLen() const { return Len; }
bool operator==(const iterator &X) const { return X.Data == Data; }
bool operator!=(const iterator &X) const { return X.Data != Data; }
};
/// Look up the stored data for a particular key.
iterator find(const external_key_type &EKey, Info *InfoPtr = nullptr) {
const internal_key_type &IKey = InfoObj.GetInternalKey(EKey);
hash_value_type KeyHash = InfoObj.ComputeHash(IKey);
return find_hashed(IKey, KeyHash, InfoPtr);
}
/// Look up the stored data for a particular key with a known hash.
iterator find_hashed(const internal_key_type &IKey, hash_value_type KeyHash,
Info *InfoPtr = nullptr) {
using namespace llvm::support;
if (!InfoPtr)
InfoPtr = &InfoObj;
// Each bucket is just an offset into the hash table file.
offset_type Idx = KeyHash & (NumBuckets - 1);
const unsigned char *Bucket = Buckets + sizeof(offset_type) * Idx;
offset_type Offset = endian::readNext<offset_type, little, aligned>(Bucket);
if (Offset == 0)
return iterator(); // Empty bucket.
const unsigned char *Items = Base + Offset;
// 'Items' starts with a 16-bit unsigned integer representing the
// number of items in this bucket.
unsigned Len = endian::readNext<uint16_t, little, unaligned>(Items);
for (unsigned i = 0; i < Len; ++i) {
// Read the hash.
hash_value_type ItemHash =
endian::readNext<hash_value_type, little, unaligned>(Items);
// Determine the length of the key and the data.
const std::pair<offset_type, offset_type> &L =
Info::ReadKeyDataLength(Items);
offset_type ItemLen = L.first + L.second;
// Compare the hashes. If they are not the same, skip the entry entirely.
if (ItemHash != KeyHash) {
Items += ItemLen;
continue;
}
// Read the key.
const internal_key_type &X =
InfoPtr->ReadKey((const unsigned char *const)Items, L.first);
// If the key doesn't match just skip reading the value.
if (!InfoPtr->EqualKey(X, IKey)) {
Items += ItemLen;
continue;
}
// The key matches!
return iterator(X, Items + L.first, L.second, InfoPtr);
}
return iterator();
}
iterator end() const { return iterator(); }
Info &getInfoObj() { return InfoObj; }
/// Create the hash table.
///
/// \param Buckets is the beginning of the hash table itself, which follows
/// the payload of entire structure. This is the value returned by
/// OnDiskHashTableGenerator::Emit.
///
/// \param Base is the point from which all offsets into the structure are
/// based. This is offset 0 in the stream that was used when Emitting the
/// table.
static OnDiskChainedHashTable *Create(const unsigned char *Buckets,
const unsigned char *const Base,
const Info &InfoObj = Info()) {
assert(Buckets > Base);
auto NumBucketsAndEntries = readNumBucketsAndEntries(Buckets);
return new OnDiskChainedHashTable<Info>(NumBucketsAndEntries.first,
NumBucketsAndEntries.second,
Buckets, Base, InfoObj);
}
};
/// Provides lookup and iteration over an on disk hash table.
///
/// \copydetails llvm::OnDiskChainedHashTable
template <typename Info>
class OnDiskIterableChainedHashTable : public OnDiskChainedHashTable<Info> {
const unsigned char *Payload;
public:
typedef OnDiskChainedHashTable<Info> base_type;
typedef typename base_type::internal_key_type internal_key_type;
typedef typename base_type::external_key_type external_key_type;
typedef typename base_type::data_type data_type;
typedef typename base_type::hash_value_type hash_value_type;
typedef typename base_type::offset_type offset_type;
private:
/// Iterates over all of the keys in the table.
class iterator_base {
const unsigned char *Ptr;
offset_type NumItemsInBucketLeft;
offset_type NumEntriesLeft;
public:
typedef external_key_type value_type;
iterator_base(const unsigned char *const Ptr, offset_type NumEntries)
: Ptr(Ptr), NumItemsInBucketLeft(0), NumEntriesLeft(NumEntries) {}
iterator_base()
: Ptr(nullptr), NumItemsInBucketLeft(0), NumEntriesLeft(0) {}
friend bool operator==(const iterator_base &X, const iterator_base &Y) {
return X.NumEntriesLeft == Y.NumEntriesLeft;
}
friend bool operator!=(const iterator_base &X, const iterator_base &Y) {
return X.NumEntriesLeft != Y.NumEntriesLeft;
}
/// Move to the next item.
void advance() {
using namespace llvm::support;
if (!NumItemsInBucketLeft) {
// 'Items' starts with a 16-bit unsigned integer representing the
// number of items in this bucket.
NumItemsInBucketLeft =
endian::readNext<uint16_t, little, unaligned>(Ptr);
}
Ptr += sizeof(hash_value_type); // Skip the hash.
// Determine the length of the key and the data.
const std::pair<offset_type, offset_type> &L =
Info::ReadKeyDataLength(Ptr);
Ptr += L.first + L.second;
assert(NumItemsInBucketLeft);
--NumItemsInBucketLeft;
assert(NumEntriesLeft);
--NumEntriesLeft;
}
/// Get the start of the item as written by the trait (after the hash and
/// immediately before the key and value length).
const unsigned char *getItem() const {
return Ptr + (NumItemsInBucketLeft ? 0 : 2) + sizeof(hash_value_type);
}
};
public:
OnDiskIterableChainedHashTable(offset_type NumBuckets, offset_type NumEntries,
const unsigned char *Buckets,
const unsigned char *Payload,
const unsigned char *Base,
const Info &InfoObj = Info())
: base_type(NumBuckets, NumEntries, Buckets, Base, InfoObj),
Payload(Payload) {}
/// Iterates over all of the keys in the table.
class key_iterator : public iterator_base {
Info *InfoObj;
public:
typedef external_key_type value_type;
key_iterator(const unsigned char *const Ptr, offset_type NumEntries,
Info *InfoObj)
: iterator_base(Ptr, NumEntries), InfoObj(InfoObj) {}
key_iterator() : iterator_base(), InfoObj() {}
key_iterator &operator++() {
this->advance();
return *this;
}
key_iterator operator++(int) { // Postincrement
key_iterator tmp = *this;
++*this;
return tmp;
}
internal_key_type getInternalKey() const {
auto *LocalPtr = this->getItem();
// Determine the length of the key and the data.
auto L = Info::ReadKeyDataLength(LocalPtr);
// Read the key.
return InfoObj->ReadKey(LocalPtr, L.first);
}
value_type operator*() const {
return InfoObj->GetExternalKey(getInternalKey());
}
};
key_iterator key_begin() {
return key_iterator(Payload, this->getNumEntries(), &this->getInfoObj());
}
key_iterator key_end() { return key_iterator(); }
iterator_range<key_iterator> keys() {
return make_range(key_begin(), key_end());
}
/// Iterates over all the entries in the table, returning the data.
class data_iterator : public iterator_base {
Info *InfoObj;
public:
typedef data_type value_type;
data_iterator(const unsigned char *const Ptr, offset_type NumEntries,
Info *InfoObj)
: iterator_base(Ptr, NumEntries), InfoObj(InfoObj) {}
data_iterator() : iterator_base(), InfoObj() {}
data_iterator &operator++() { // Preincrement
this->advance();
return *this;
}
data_iterator operator++(int) { // Postincrement
data_iterator tmp = *this;
++*this;
return tmp;
}
value_type operator*() const {
auto *LocalPtr = this->getItem();
// Determine the length of the key and the data.
auto L = Info::ReadKeyDataLength(LocalPtr);
// Read the key.
const internal_key_type &Key = InfoObj->ReadKey(LocalPtr, L.first);
return InfoObj->ReadData(Key, LocalPtr + L.first, L.second);
}
};
data_iterator data_begin() {
return data_iterator(Payload, this->getNumEntries(), &this->getInfoObj());
}
data_iterator data_end() { return data_iterator(); }
iterator_range<data_iterator> data() {
return make_range(data_begin(), data_end());
}
/// Create the hash table.
///
/// \param Buckets is the beginning of the hash table itself, which follows
/// the payload of entire structure. This is the value returned by
/// OnDiskHashTableGenerator::Emit.
///
/// \param Payload is the beginning of the data contained in the table. This
/// is Base plus any padding or header data that was stored, ie, the offset
/// that the stream was at when calling Emit.
///
/// \param Base is the point from which all offsets into the structure are
/// based. This is offset 0 in the stream that was used when Emitting the
/// table.
static OnDiskIterableChainedHashTable *
Create(const unsigned char *Buckets, const unsigned char *const Payload,
const unsigned char *const Base, const Info &InfoObj = Info()) {
assert(Buckets > Base);
auto NumBucketsAndEntries =
OnDiskIterableChainedHashTable<Info>::readNumBucketsAndEntries(Buckets);
return new OnDiskIterableChainedHashTable<Info>(
NumBucketsAndEntries.first, NumBucketsAndEntries.second,
Buckets, Payload, Base, InfoObj);
}
};
} // end namespace llvm
#endif
PK hwFZO�][Z Z Support/X86TargetParser.hnu �[��� //===-- llvm/Support/X86TargetParser.h --------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This header is deprecated in favour of
/// `llvm/TargetParser/X86TargetParser.h`.
///
//===----------------------------------------------------------------------===//
#include "llvm/TargetParser/X86TargetParser.h"
PK hwFZ<�� �
Support/CRC.hnu �[��� //===-- llvm/Support/CRC.h - Cyclic Redundancy Check-------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains implementations of CRC functions.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_CRC_H
#define LLVM_SUPPORT_CRC_H
#include "llvm/Support/DataTypes.h"
namespace llvm {
template <typename T> class ArrayRef;
// Compute the CRC-32 of Data.
uint32_t crc32(ArrayRef<uint8_t> Data);
// Compute the running CRC-32 of Data, with CRC being the previous value of the
// checksum.
uint32_t crc32(uint32_t CRC, ArrayRef<uint8_t> Data);
// Class for computing the JamCRC.
//
// We will use the "Rocksoft^tm Model CRC Algorithm" to describe the properties
// of this CRC:
// Width : 32
// Poly : 04C11DB7
// Init : FFFFFFFF
// RefIn : True
// RefOut : True
// XorOut : 00000000
// Check : 340BC6D9 (result of CRC for "123456789")
//
// In other words, this is the same as CRC-32, except that XorOut is 0 instead
// of FFFFFFFF.
//
// N.B. We permit flexibility of the "Init" value. Some consumers of this need
// it to be zero.
class JamCRC {
public:
JamCRC(uint32_t Init = 0xFFFFFFFFU) : CRC(Init) {}
// Update the CRC calculation with Data.
void update(ArrayRef<uint8_t> Data);
uint32_t getCRC() const { return CRC; }
private:
uint32_t CRC;
};
} // end namespace llvm
#endif
PK hwFZ�f�� � Support/TaskQueue.hnu �[��� //===-- llvm/Support/TaskQueue.h - A TaskQueue implementation ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines a crude C++11 based task queue.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_TASKQUEUE_H
#define LLVM_SUPPORT_TASKQUEUE_H
#include "llvm/Config/llvm-config.h"
#include "llvm/Support/ThreadPool.h"
#include "llvm/Support/thread.h"
#include <atomic>
#include <cassert>
#include <condition_variable>
#include <deque>
#include <functional>
#include <future>
#include <memory>
#include <mutex>
#include <utility>
namespace llvm {
/// TaskQueue executes serialized work on a user-defined Thread Pool. It
/// guarantees that if task B is enqueued after task A, task B begins after
/// task A completes and there is no overlap between the two.
class TaskQueue {
// Because we don't have init capture to use move-only local variables that
// are captured into a lambda, we create the promise inside an explicit
// callable struct. We want to do as much of the wrapping in the
// type-specialized domain (before type erasure) and then erase this into a
// std::function.
template <typename Callable> struct Task {
using ResultTy = std::invoke_result_t<Callable>;
explicit Task(Callable C, TaskQueue &Parent)
: C(std::move(C)), P(std::make_shared<std::promise<ResultTy>>()),
Parent(&Parent) {}
template<typename T>
void invokeCallbackAndSetPromise(T*) {
P->set_value(C());
}
void invokeCallbackAndSetPromise(void*) {
C();
P->set_value();
}
void operator()() noexcept {
ResultTy *Dummy = nullptr;
invokeCallbackAndSetPromise(Dummy);
Parent->completeTask();
}
Callable C;
std::shared_ptr<std::promise<ResultTy>> P;
TaskQueue *Parent;
};
public:
/// Construct a task queue with no work.
TaskQueue(ThreadPool &Scheduler) : Scheduler(Scheduler) { (void)Scheduler; }
/// Blocking destructor: the queue will wait for all work to complete.
~TaskQueue() {
Scheduler.wait();
assert(Tasks.empty());
}
/// Asynchronous submission of a task to the queue. The returned future can be
/// used to wait for the task (and all previous tasks that have not yet
/// completed) to finish.
template <typename Callable>
std::future<std::invoke_result_t<Callable>> async(Callable &&C) {
#if !LLVM_ENABLE_THREADS
static_assert(false,
"TaskQueue requires building with LLVM_ENABLE_THREADS!");
#endif
Task<Callable> T{std::move(C), *this};
using ResultTy = std::invoke_result_t<Callable>;
std::future<ResultTy> F = T.P->get_future();
{
std::lock_guard<std::mutex> Lock(QueueLock);
// If there's already a task in flight, just queue this one up. If
// there is not a task in flight, bypass the queue and schedule this
// task immediately.
if (IsTaskInFlight)
Tasks.push_back(std::move(T));
else {
Scheduler.async(std::move(T));
IsTaskInFlight = true;
}
}
return F;
}
private:
void completeTask() {
// We just completed a task. If there are no more tasks in the queue,
// update IsTaskInFlight to false and stop doing work. Otherwise
// schedule the next task (while not holding the lock).
std::function<void()> Continuation;
{
std::lock_guard<std::mutex> Lock(QueueLock);
if (Tasks.empty()) {
IsTaskInFlight = false;
return;
}
Continuation = std::move(Tasks.front());
Tasks.pop_front();
}
Scheduler.async(std::move(Continuation));
}
/// The thread pool on which to run the work.
ThreadPool &Scheduler;
/// State which indicates whether the queue currently is currently processing
/// any work.
bool IsTaskInFlight = false;
/// Mutex for synchronizing access to the Tasks array.
std::mutex QueueLock;
/// Tasks waiting for execution in the queue.
std::deque<std::function<void()>> Tasks;
};
} // namespace llvm
#endif // LLVM_SUPPORT_TASKQUEUE_H
PK hwFZb�m�
Support/ARMAttributeParser.hnu �[��� //===- ARMAttributeParser.h - ARM Attribute Information Printer -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ARMATTRIBUTEPARSER_H
#define LLVM_SUPPORT_ARMATTRIBUTEPARSER_H
#include "ARMBuildAttributes.h"
#include "ELFAttributeParser.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Error.h"
namespace llvm {
class ScopedPrinter;
class ARMAttributeParser : public ELFAttributeParser {
struct DisplayHandler {
ARMBuildAttrs::AttrType attribute;
Error (ARMAttributeParser::*routine)(ARMBuildAttrs::AttrType);
};
static const DisplayHandler displayRoutines[];
Error handler(uint64_t tag, bool &handled) override;
Error stringAttribute(ARMBuildAttrs::AttrType tag);
Error CPU_arch(ARMBuildAttrs::AttrType tag);
Error CPU_arch_profile(ARMBuildAttrs::AttrType tag);
Error ARM_ISA_use(ARMBuildAttrs::AttrType tag);
Error THUMB_ISA_use(ARMBuildAttrs::AttrType tag);
Error FP_arch(ARMBuildAttrs::AttrType tag);
Error WMMX_arch(ARMBuildAttrs::AttrType tag);
Error Advanced_SIMD_arch(ARMBuildAttrs::AttrType tag);
Error MVE_arch(ARMBuildAttrs::AttrType tag);
Error PCS_config(ARMBuildAttrs::AttrType tag);
Error ABI_PCS_R9_use(ARMBuildAttrs::AttrType tag);
Error ABI_PCS_RW_data(ARMBuildAttrs::AttrType tag);
Error ABI_PCS_RO_data(ARMBuildAttrs::AttrType tag);
Error ABI_PCS_GOT_use(ARMBuildAttrs::AttrType tag);
Error ABI_PCS_wchar_t(ARMBuildAttrs::AttrType tag);
Error ABI_FP_rounding(ARMBuildAttrs::AttrType tag);
Error ABI_FP_denormal(ARMBuildAttrs::AttrType tag);
Error ABI_FP_exceptions(ARMBuildAttrs::AttrType tag);
Error ABI_FP_user_exceptions(ARMBuildAttrs::AttrType tag);
Error ABI_FP_number_model(ARMBuildAttrs::AttrType tag);
Error ABI_align_needed(ARMBuildAttrs::AttrType tag);
Error ABI_align_preserved(ARMBuildAttrs::AttrType tag);
Error ABI_enum_size(ARMBuildAttrs::AttrType tag);
Error ABI_HardFP_use(ARMBuildAttrs::AttrType tag);
Error ABI_VFP_args(ARMBuildAttrs::AttrType tag);
Error ABI_WMMX_args(ARMBuildAttrs::AttrType tag);
Error ABI_optimization_goals(ARMBuildAttrs::AttrType tag);
Error ABI_FP_optimization_goals(ARMBuildAttrs::AttrType tag);
Error compatibility(ARMBuildAttrs::AttrType tag);
Error CPU_unaligned_access(ARMBuildAttrs::AttrType tag);
Error FP_HP_extension(ARMBuildAttrs::AttrType tag);
Error ABI_FP_16bit_format(ARMBuildAttrs::AttrType tag);
Error MPextension_use(ARMBuildAttrs::AttrType tag);
Error DIV_use(ARMBuildAttrs::AttrType tag);
Error DSP_extension(ARMBuildAttrs::AttrType tag);
Error T2EE_use(ARMBuildAttrs::AttrType tag);
Error Virtualization_use(ARMBuildAttrs::AttrType tag);
Error PAC_extension(ARMBuildAttrs::AttrType tag);
Error BTI_extension(ARMBuildAttrs::AttrType tag);
Error PACRET_use(ARMBuildAttrs::AttrType tag);
Error BTI_use(ARMBuildAttrs::AttrType tag);
Error nodefaults(ARMBuildAttrs::AttrType tag);
Error also_compatible_with(ARMBuildAttrs::AttrType tag);
public:
ARMAttributeParser(ScopedPrinter *sw)
: ELFAttributeParser(sw, ARMBuildAttrs::getARMAttributeTags(), "aeabi") {}
ARMAttributeParser()
: ELFAttributeParser(ARMBuildAttrs::getARMAttributeTags(), "aeabi") {}
};
}
#endif
PK hwFZ
vU Support/CSKYAttributes.hnu �[��� //===---- CSKYAttributes.h - CSKY Attributes --------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains enumerations for CSKY attributes.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_CSKYATTRIBUTES_H
#define LLVM_SUPPORT_CSKYATTRIBUTES_H
#include "llvm/Support/ELFAttributes.h"
namespace llvm {
namespace CSKYAttrs {
const TagNameMap &getCSKYAttributeTags();
enum AttrType {
CSKY_ARCH_NAME = 4,
CSKY_CPU_NAME = 5,
CSKY_ISA_FLAGS = 6,
CSKY_ISA_EXT_FLAGS = 7,
CSKY_DSP_VERSION = 8,
CSKY_VDSP_VERSION = 9,
CSKY_FPU_VERSION = 16,
CSKY_FPU_ABI = 17,
CSKY_FPU_ROUNDING = 18,
CSKY_FPU_DENORMAL = 19,
CSKY_FPU_EXCEPTION = 20,
CSKY_FPU_NUMBER_MODULE = 21,
CSKY_FPU_HARDFP = 22
};
enum ISA_FLAGS {
V2_ISA_E1 = 1 << 1,
V2_ISA_1E2 = 1 << 2,
V2_ISA_2E3 = 1 << 3,
V2_ISA_3E7 = 1 << 4,
V2_ISA_7E10 = 1 << 5,
V2_ISA_3E3R1 = 1 << 6,
V2_ISA_3E3R2 = 1 << 7,
V2_ISA_10E60 = 1 << 8,
V2_ISA_3E3R3 = 1 << 9,
ISA_TRUST = 1 << 11,
ISA_CACHE = 1 << 12,
ISA_NVIC = 1 << 13,
ISA_CP = 1 << 14,
ISA_MP = 1 << 15,
ISA_MP_1E2 = 1 << 16,
ISA_JAVA = 1 << 17,
ISA_MAC = 1 << 18,
ISA_MAC_DSP = 1 << 19,
ISA_DSP = 1 << 20,
ISA_DSP_1E2 = 1 << 21,
ISA_DSP_ENHANCE = 1 << 22,
ISA_DSP_SILAN = 1 << 23,
ISA_VDSP = 1 << 24,
ISA_VDSP_2 = 1 << 25,
ISA_VDSP_2E3 = 1 << 26,
V2_ISA_DSPE60 = 1 << 27,
ISA_VDSP_2E60F = 1 << 28
};
enum ISA_EXT_FLAGS {
ISA_FLOAT_E1 = 1 << 0,
ISA_FLOAT_1E2 = 1 << 1,
ISA_FLOAT_1E3 = 1 << 2,
ISA_FLOAT_3E4 = 1 << 3,
ISA_FLOAT_7E60 = 1 << 4
};
enum { NONE = 0, NEEDED = 1 };
enum DSP_VERSION { DSP_VERSION_EXTENSION = 1, DSP_VERSION_2 = 2 };
enum VDSP_VERSION { VDSP_VERSION_1 = 1, VDSP_VERSION_2 = 2 };
enum FPU_VERSION { FPU_VERSION_1 = 1, FPU_VERSION_2 = 2, FPU_VERSION_3 = 3 };
enum FPU_ABI { FPU_ABI_SOFT = 1, FPU_ABI_SOFTFP = 2, FPU_ABI_HARD = 3 };
enum FPU_HARDFP {
FPU_HARDFP_HALF = 1,
FPU_HARDFP_SINGLE = 2,
FPU_HARDFP_DOUBLE = 4
};
} // namespace CSKYAttrs
} // namespace llvm
#endif
PK hwFZtO6�&# &# Support/ModRef.hnu �[��� //===--- ModRef.h - Memory effect modelling ---------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Definitions of ModRefInfo and MemoryEffects, which are used to
// describe the memory effects of instructions.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_MODREF_H
#define LLVM_SUPPORT_MODREF_H
#include "llvm/ADT/BitmaskEnum.h"
#include "llvm/ADT/Sequence.h"
#include "llvm/Support/raw_ostream.h"
namespace llvm {
/// Flags indicating whether a memory access modifies or references memory.
///
/// This is no access at all, a modification, a reference, or both
/// a modification and a reference.
enum class ModRefInfo : uint8_t {
/// The access neither references nor modifies the value stored in memory.
NoModRef = 0,
/// The access may reference the value stored in memory.
Ref = 1,
/// The access may modify the value stored in memory.
Mod = 2,
/// The access may reference and may modify the value stored in memory.
ModRef = Ref | Mod,
LLVM_MARK_AS_BITMASK_ENUM(ModRef),
};
[[nodiscard]] inline bool isNoModRef(const ModRefInfo MRI) {
return MRI == ModRefInfo::NoModRef;
}
[[nodiscard]] inline bool isModOrRefSet(const ModRefInfo MRI) {
return MRI != ModRefInfo::NoModRef;
}
[[nodiscard]] inline bool isModAndRefSet(const ModRefInfo MRI) {
return MRI == ModRefInfo::ModRef;
}
[[nodiscard]] inline bool isModSet(const ModRefInfo MRI) {
return static_cast<int>(MRI) & static_cast<int>(ModRefInfo::Mod);
}
[[nodiscard]] inline bool isRefSet(const ModRefInfo MRI) {
return static_cast<int>(MRI) & static_cast<int>(ModRefInfo::Ref);
}
/// Debug print ModRefInfo.
raw_ostream &operator<<(raw_ostream &OS, ModRefInfo MR);
/// The locations at which a function might access memory.
enum class IRMemLocation {
/// Access to memory via argument pointers.
ArgMem = 0,
/// Memory that is inaccessible via LLVM IR.
InaccessibleMem = 1,
/// Any other memory.
Other = 2,
/// Helpers to iterate all locations in the MemoryEffectsBase class.
First = ArgMem,
Last = Other,
};
template <typename LocationEnum> class MemoryEffectsBase {
public:
using Location = LocationEnum;
private:
uint32_t Data = 0;
static constexpr uint32_t BitsPerLoc = 2;
static constexpr uint32_t LocMask = (1 << BitsPerLoc) - 1;
static uint32_t getLocationPos(Location Loc) {
return (uint32_t)Loc * BitsPerLoc;
}
MemoryEffectsBase(uint32_t Data) : Data(Data) {}
void setModRef(Location Loc, ModRefInfo MR) {
Data &= ~(LocMask << getLocationPos(Loc));
Data |= static_cast<uint32_t>(MR) << getLocationPos(Loc);
}
public:
/// Returns iterator over all supported location kinds.
static auto locations() {
return enum_seq_inclusive(Location::First, Location::Last,
force_iteration_on_noniterable_enum);
}
/// Create MemoryEffectsBase that can access only the given location with the
/// given ModRefInfo.
MemoryEffectsBase(Location Loc, ModRefInfo MR) { setModRef(Loc, MR); }
/// Create MemoryEffectsBase that can access any location with the given
/// ModRefInfo.
explicit MemoryEffectsBase(ModRefInfo MR) {
for (Location Loc : locations())
setModRef(Loc, MR);
}
/// Create MemoryEffectsBase that can read and write any memory.
static MemoryEffectsBase unknown() {
return MemoryEffectsBase(ModRefInfo::ModRef);
}
/// Create MemoryEffectsBase that cannot read or write any memory.
static MemoryEffectsBase none() {
return MemoryEffectsBase(ModRefInfo::NoModRef);
}
/// Create MemoryEffectsBase that can read any memory.
static MemoryEffectsBase readOnly() {
return MemoryEffectsBase(ModRefInfo::Ref);
}
/// Create MemoryEffectsBase that can write any memory.
static MemoryEffectsBase writeOnly() {
return MemoryEffectsBase(ModRefInfo::Mod);
}
/// Create MemoryEffectsBase that can only access argument memory.
static MemoryEffectsBase argMemOnly(ModRefInfo MR = ModRefInfo::ModRef) {
return MemoryEffectsBase(Location::ArgMem, MR);
}
/// Create MemoryEffectsBase that can only access inaccessible memory.
static MemoryEffectsBase
inaccessibleMemOnly(ModRefInfo MR = ModRefInfo::ModRef) {
return MemoryEffectsBase(Location::InaccessibleMem, MR);
}
/// Create MemoryEffectsBase that can only access inaccessible or argument
/// memory.
static MemoryEffectsBase
inaccessibleOrArgMemOnly(ModRefInfo MR = ModRefInfo::ModRef) {
MemoryEffectsBase FRMB = none();
FRMB.setModRef(Location::ArgMem, MR);
FRMB.setModRef(Location::InaccessibleMem, MR);
return FRMB;
}
/// Create MemoryEffectsBase from an encoded integer value (used by memory
/// attribute).
static MemoryEffectsBase createFromIntValue(uint32_t Data) {
return MemoryEffectsBase(Data);
}
/// Convert MemoryEffectsBase into an encoded integer value (used by memory
/// attribute).
uint32_t toIntValue() const {
return Data;
}
/// Get ModRefInfo for the given Location.
ModRefInfo getModRef(Location Loc) const {
return ModRefInfo((Data >> getLocationPos(Loc)) & LocMask);
}
/// Get new MemoryEffectsBase with modified ModRefInfo for Loc.
MemoryEffectsBase getWithModRef(Location Loc, ModRefInfo MR) const {
MemoryEffectsBase ME = *this;
ME.setModRef(Loc, MR);
return ME;
}
/// Get new MemoryEffectsBase with NoModRef on the given Loc.
MemoryEffectsBase getWithoutLoc(Location Loc) const {
MemoryEffectsBase ME = *this;
ME.setModRef(Loc, ModRefInfo::NoModRef);
return ME;
}
/// Get ModRefInfo for any location.
ModRefInfo getModRef() const {
ModRefInfo MR = ModRefInfo::NoModRef;
for (Location Loc : locations())
MR |= getModRef(Loc);
return MR;
}
/// Whether this function accesses no memory.
bool doesNotAccessMemory() const { return Data == 0; }
/// Whether this function only (at most) reads memory.
bool onlyReadsMemory() const { return !isModSet(getModRef()); }
/// Whether this function only (at most) writes memory.
bool onlyWritesMemory() const { return !isRefSet(getModRef()); }
/// Whether this function only (at most) accesses argument memory.
bool onlyAccessesArgPointees() const {
return getWithoutLoc(Location::ArgMem).doesNotAccessMemory();
}
/// Whether this function may access argument memory.
bool doesAccessArgPointees() const {
return isModOrRefSet(getModRef(Location::ArgMem));
}
/// Whether this function only (at most) accesses inaccessible memory.
bool onlyAccessesInaccessibleMem() const {
return getWithoutLoc(Location::InaccessibleMem).doesNotAccessMemory();
}
/// Whether this function only (at most) accesses argument and inaccessible
/// memory.
bool onlyAccessesInaccessibleOrArgMem() const {
return getWithoutLoc(Location::InaccessibleMem)
.getWithoutLoc(Location::ArgMem)
.doesNotAccessMemory();
}
/// Intersect with other MemoryEffectsBase.
MemoryEffectsBase operator&(MemoryEffectsBase Other) const {
return MemoryEffectsBase(Data & Other.Data);
}
/// Intersect (in-place) with other MemoryEffectsBase.
MemoryEffectsBase &operator&=(MemoryEffectsBase Other) {
Data &= Other.Data;
return *this;
}
/// Union with other MemoryEffectsBase.
MemoryEffectsBase operator|(MemoryEffectsBase Other) const {
return MemoryEffectsBase(Data | Other.Data);
}
/// Union (in-place) with other MemoryEffectsBase.
MemoryEffectsBase &operator|=(MemoryEffectsBase Other) {
Data |= Other.Data;
return *this;
}
/// Subtract other MemoryEffectsBase.
MemoryEffectsBase operator-(MemoryEffectsBase Other) const {
return MemoryEffectsBase(Data & ~Other.Data);
}
/// Subtract (in-place) with other MemoryEffectsBase.
MemoryEffectsBase &operator-=(MemoryEffectsBase Other) {
Data &= ~Other.Data;
return *this;
}
/// Check whether this is the same as other MemoryEffectsBase.
bool operator==(MemoryEffectsBase Other) const { return Data == Other.Data; }
/// Check whether this is different from other MemoryEffectsBase.
bool operator!=(MemoryEffectsBase Other) const { return !operator==(Other); }
};
/// Summary of how a function affects memory in the program.
///
/// Loads from constant globals are not considered memory accesses for this
/// interface. Also, functions may freely modify stack space local to their
/// invocation without having to report it through these interfaces.
using MemoryEffects = MemoryEffectsBase<IRMemLocation>;
/// Debug print MemoryEffects.
raw_ostream &operator<<(raw_ostream &OS, MemoryEffects RMRB);
// Legacy alias.
using FunctionModRefBehavior = MemoryEffects;
} // namespace llvm
#endif
PK hwFZ� :� � Support/RISCVAttributeParser.hnu �[��� //===-- RISCVAttributeParser.h - RISCV Attribute Parser ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_RISCVATTRIBUTEPARSER_H
#define LLVM_SUPPORT_RISCVATTRIBUTEPARSER_H
#include "llvm/Support/ELFAttributeParser.h"
#include "llvm/Support/RISCVAttributes.h"
namespace llvm {
class RISCVAttributeParser : public ELFAttributeParser {
struct DisplayHandler {
RISCVAttrs::AttrType attribute;
Error (RISCVAttributeParser::*routine)(unsigned);
};
static const DisplayHandler displayRoutines[];
Error handler(uint64_t tag, bool &handled) override;
Error unalignedAccess(unsigned tag);
Error stackAlign(unsigned tag);
public:
RISCVAttributeParser(ScopedPrinter *sw)
: ELFAttributeParser(sw, RISCVAttrs::getRISCVAttributeTags(), "riscv") {}
RISCVAttributeParser()
: ELFAttributeParser(RISCVAttrs::getRISCVAttributeTags(), "riscv") {}
};
} // namespace llvm
#endif
PK hwFZ�,p�� � Support/LockFileManager.hnu �[��� //===--- LockFileManager.h - File-level locking utility ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_LOCKFILEMANAGER_H
#define LLVM_SUPPORT_LOCKFILEMANAGER_H
#include "llvm/ADT/SmallString.h"
#include <optional>
#include <system_error>
#include <utility> // for std::pair
namespace llvm {
class StringRef;
/// Class that manages the creation of a lock file to aid
/// implicit coordination between different processes.
///
/// The implicit coordination works by creating a ".lock" file alongside
/// the file that we're coordinating for, using the atomicity of the file
/// system to ensure that only a single process can create that ".lock" file.
/// When the lock file is removed, the owning process has finished the
/// operation.
class LockFileManager {
public:
/// Describes the state of a lock file.
enum LockFileState {
/// The lock file has been created and is owned by this instance
/// of the object.
LFS_Owned,
/// The lock file already exists and is owned by some other
/// instance.
LFS_Shared,
/// An error occurred while trying to create or find the lock
/// file.
LFS_Error
};
/// Describes the result of waiting for the owner to release the lock.
enum WaitForUnlockResult {
/// The lock was released successfully.
Res_Success,
/// Owner died while holding the lock.
Res_OwnerDied,
/// Reached timeout while waiting for the owner to release the lock.
Res_Timeout
};
private:
SmallString<128> FileName;
SmallString<128> LockFileName;
SmallString<128> UniqueLockFileName;
std::optional<std::pair<std::string, int>> Owner;
std::error_code ErrorCode;
std::string ErrorDiagMsg;
LockFileManager(const LockFileManager &) = delete;
LockFileManager &operator=(const LockFileManager &) = delete;
static std::optional<std::pair<std::string, int>>
readLockFile(StringRef LockFileName);
static bool processStillExecuting(StringRef Hostname, int PID);
public:
LockFileManager(StringRef FileName);
~LockFileManager();
/// Determine the state of the lock file.
LockFileState getState() const;
operator LockFileState() const { return getState(); }
/// For a shared lock, wait until the owner releases the lock.
/// Total timeout for the file to appear is ~1.5 minutes.
/// \param MaxSeconds the maximum total wait time in seconds.
WaitForUnlockResult waitForUnlock(const unsigned MaxSeconds = 90);
/// Remove the lock file. This may delete a different lock file than
/// the one previously read if there is a race.
std::error_code unsafeRemoveLockFile();
/// Get error message, or "" if there is no error.
std::string getErrorMessage() const;
/// Set error and error message
void setError(const std::error_code &EC, StringRef ErrorMsg = "") {
ErrorCode = EC;
ErrorDiagMsg = ErrorMsg.str();
}
};
} // end namespace llvm
#endif // LLVM_SUPPORT_LOCKFILEMANAGER_H
PK hwFZ�kz z Support/Regex.hnu �[��� //===-- Regex.h - Regular Expression matcher implementation -*- C++ -*-----===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements a POSIX regular expression matcher. Both Basic and
// Extended POSIX regular expressions (ERE) are supported. EREs were extended
// to support backreferences in matches.
// This implementation also supports matching strings with embedded NUL chars.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_REGEX_H
#define LLVM_SUPPORT_REGEX_H
#include "llvm/ADT/BitmaskEnum.h"
#include <string>
struct llvm_regex;
namespace llvm {
class StringRef;
template<typename T> class SmallVectorImpl;
class Regex {
public:
enum RegexFlags : unsigned {
NoFlags = 0,
/// Compile for matching that ignores upper/lower case distinctions.
IgnoreCase = 1,
/// Compile for newline-sensitive matching. With this flag '[^' bracket
/// expressions and '.' never match newline. A ^ anchor matches the
/// null string after any newline in the string in addition to its normal
/// function, and the $ anchor matches the null string before any
/// newline in the string in addition to its normal function.
Newline = 2,
/// By default, the POSIX extended regular expression (ERE) syntax is
/// assumed. Pass this flag to turn on basic regular expressions (BRE)
/// instead.
BasicRegex = 4,
LLVM_MARK_AS_BITMASK_ENUM(BasicRegex)
};
Regex();
/// Compiles the given regular expression \p Regex.
///
/// \param Regex - referenced string is no longer needed after this
/// constructor does finish. Only its compiled form is kept stored.
Regex(StringRef Regex, RegexFlags Flags = NoFlags);
Regex(StringRef Regex, unsigned Flags);
Regex(const Regex &) = delete;
Regex &operator=(Regex regex) {
std::swap(preg, regex.preg);
std::swap(error, regex.error);
return *this;
}
Regex(Regex &®ex);
~Regex();
/// isValid - returns the error encountered during regex compilation, if
/// any.
bool isValid(std::string &Error) const;
bool isValid() const { return !error; }
/// getNumMatches - In a valid regex, return the number of parenthesized
/// matches it contains. The number filled in by match will include this
/// many entries plus one for the whole regex (as element 0).
unsigned getNumMatches() const;
/// matches - Match the regex against a given \p String.
///
/// \param Matches - If given, on a successful match this will be filled in
/// with references to the matched group expressions (inside \p String),
/// the first group is always the entire pattern.
///
/// \param Error - If non-null, any errors in the matching will be recorded
/// as a non-empty string. If there is no error, it will be an empty string.
///
/// This returns true on a successful match.
bool match(StringRef String, SmallVectorImpl<StringRef> *Matches = nullptr,
std::string *Error = nullptr) const;
/// sub - Return the result of replacing the first match of the regex in
/// \p String with the \p Repl string. Backreferences like "\0" in the
/// replacement string are replaced with the appropriate match substring.
///
/// Note that the replacement string has backslash escaping performed on
/// it. Invalid backreferences are ignored (replaced by empty strings).
///
/// \param Error If non-null, any errors in the substitution (invalid
/// backreferences, trailing backslashes) will be recorded as a non-empty
/// string. If there is no error, it will be an empty string.
std::string sub(StringRef Repl, StringRef String,
std::string *Error = nullptr) const;
/// If this function returns true, ^Str$ is an extended regular
/// expression that matches Str and only Str.
static bool isLiteralERE(StringRef Str);
/// Turn String into a regex by escaping its special characters.
static std::string escape(StringRef String);
private:
struct llvm_regex *preg;
int error;
};
}
#endif // LLVM_SUPPORT_REGEX_H
PK hwFZ�W�>Z Z Support/VersionTuple.hnu �[��� //===- VersionTuple.h - Version Number Handling -----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// Defines the llvm::VersionTuple class, which represents a version in
/// the form major[.minor[.subminor]].
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_VERSIONTUPLE_H
#define LLVM_SUPPORT_VERSIONTUPLE_H
#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/ADT/Hashing.h"
#include "llvm/Support/Endian.h"
#include <optional>
#include <string>
#include <tuple>
namespace llvm {
template <typename HasherT, support::endianness Endianness>
class HashBuilderImpl;
class raw_ostream;
class StringRef;
/// Represents a version number in the form major[.minor[.subminor[.build]]].
class VersionTuple {
unsigned Major : 32;
unsigned Minor : 31;
unsigned HasMinor : 1;
unsigned Subminor : 31;
unsigned HasSubminor : 1;
unsigned Build : 31;
unsigned HasBuild : 1;
public:
constexpr VersionTuple()
: Major(0), Minor(0), HasMinor(false), Subminor(0), HasSubminor(false),
Build(0), HasBuild(false) {}
explicit constexpr VersionTuple(unsigned Major)
: Major(Major), Minor(0), HasMinor(false), Subminor(0),
HasSubminor(false), Build(0), HasBuild(false) {}
explicit constexpr VersionTuple(unsigned Major, unsigned Minor)
: Major(Major), Minor(Minor), HasMinor(true), Subminor(0),
HasSubminor(false), Build(0), HasBuild(false) {}
explicit constexpr VersionTuple(unsigned Major, unsigned Minor,
unsigned Subminor)
: Major(Major), Minor(Minor), HasMinor(true), Subminor(Subminor),
HasSubminor(true), Build(0), HasBuild(false) {}
explicit constexpr VersionTuple(unsigned Major, unsigned Minor,
unsigned Subminor, unsigned Build)
: Major(Major), Minor(Minor), HasMinor(true), Subminor(Subminor),
HasSubminor(true), Build(Build), HasBuild(true) {}
/// Determine whether this version information is empty
/// (e.g., all version components are zero).
bool empty() const {
return Major == 0 && Minor == 0 && Subminor == 0 && Build == 0;
}
/// Retrieve the major version number.
unsigned getMajor() const { return Major; }
/// Retrieve the minor version number, if provided.
std::optional<unsigned> getMinor() const {
if (!HasMinor)
return std::nullopt;
return Minor;
}
/// Retrieve the subminor version number, if provided.
std::optional<unsigned> getSubminor() const {
if (!HasSubminor)
return std::nullopt;
return Subminor;
}
/// Retrieve the build version number, if provided.
std::optional<unsigned> getBuild() const {
if (!HasBuild)
return std::nullopt;
return Build;
}
/// Return a version tuple that contains only the first 3 version components.
VersionTuple withoutBuild() const {
if (HasBuild)
return VersionTuple(Major, Minor, Subminor);
return *this;
}
/// Return a version tuple that contains a different major version but
/// everything else is the same.
VersionTuple withMajorReplaced(unsigned NewMajor) const {
return VersionTuple(NewMajor, Minor, Subminor, Build);
}
/// Return a version tuple that contains only components that are non-zero.
VersionTuple normalize() const {
VersionTuple Result = *this;
if (Result.Build == 0) {
Result.HasBuild = false;
if (Result.Subminor == 0) {
Result.HasSubminor = false;
if (Result.Minor == 0)
Result.HasMinor = false;
}
}
return Result;
}
/// Determine if two version numbers are equivalent. If not
/// provided, minor and subminor version numbers are considered to be zero.
friend bool operator==(const VersionTuple &X, const VersionTuple &Y) {
return X.Major == Y.Major && X.Minor == Y.Minor &&
X.Subminor == Y.Subminor && X.Build == Y.Build;
}
/// Determine if two version numbers are not equivalent.
///
/// If not provided, minor and subminor version numbers are considered to be
/// zero.
friend bool operator!=(const VersionTuple &X, const VersionTuple &Y) {
return !(X == Y);
}
/// Determine whether one version number precedes another.
///
/// If not provided, minor and subminor version numbers are considered to be
/// zero.
friend bool operator<(const VersionTuple &X, const VersionTuple &Y) {
return std::tie(X.Major, X.Minor, X.Subminor, X.Build) <
std::tie(Y.Major, Y.Minor, Y.Subminor, Y.Build);
}
/// Determine whether one version number follows another.
///
/// If not provided, minor and subminor version numbers are considered to be
/// zero.
friend bool operator>(const VersionTuple &X, const VersionTuple &Y) {
return Y < X;
}
/// Determine whether one version number precedes or is
/// equivalent to another.
///
/// If not provided, minor and subminor version numbers are considered to be
/// zero.
friend bool operator<=(const VersionTuple &X, const VersionTuple &Y) {
return !(Y < X);
}
/// Determine whether one version number follows or is
/// equivalent to another.
///
/// If not provided, minor and subminor version numbers are considered to be
/// zero.
friend bool operator>=(const VersionTuple &X, const VersionTuple &Y) {
return !(X < Y);
}
friend hash_code hash_value(const VersionTuple &VT) {
return hash_combine(VT.Major, VT.Minor, VT.Subminor, VT.Build);
}
template <typename HasherT, llvm::support::endianness Endianness>
friend void addHash(HashBuilderImpl<HasherT, Endianness> &HBuilder,
const VersionTuple &VT) {
HBuilder.add(VT.Major, VT.Minor, VT.Subminor, VT.Build);
}
/// Retrieve a string representation of the version number.
std::string getAsString() const;
/// Try to parse the given string as a version number.
/// \returns \c true if the string does not match the regular expression
/// [0-9]+(\.[0-9]+){0,3}
bool tryParse(StringRef string);
};
/// Print a version number.
raw_ostream &operator<<(raw_ostream &Out, const VersionTuple &V);
// Provide DenseMapInfo for version tuples.
template <> struct DenseMapInfo<VersionTuple> {
static inline VersionTuple getEmptyKey() { return VersionTuple(0x7FFFFFFF); }
static inline VersionTuple getTombstoneKey() {
return VersionTuple(0x7FFFFFFE);
}
static unsigned getHashValue(const VersionTuple &Value) {
unsigned Result = Value.getMajor();
if (auto Minor = Value.getMinor())
Result = detail::combineHashValue(Result, *Minor);
if (auto Subminor = Value.getSubminor())
Result = detail::combineHashValue(Result, *Subminor);
if (auto Build = Value.getBuild())
Result = detail::combineHashValue(Result, *Build);
return Result;
}
static bool isEqual(const VersionTuple &LHS, const VersionTuple &RHS) {
return LHS == RHS;
}
};
} // end namespace llvm
#endif // LLVM_SUPPORT_VERSIONTUPLE_H
PK hwFZ�_`� � Support/Registry.hnu �[��� //=== Registry.h - Linker-supported plugin registries -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Defines a registry template for discovering pluggable modules.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_REGISTRY_H
#define LLVM_SUPPORT_REGISTRY_H
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/DynamicLibrary.h"
#include <memory>
namespace llvm {
/// A simple registry entry which provides only a name, description, and
/// no-argument constructor.
template <typename T>
class SimpleRegistryEntry {
StringRef Name, Desc;
std::unique_ptr<T> (*Ctor)();
public:
SimpleRegistryEntry(StringRef N, StringRef D, std::unique_ptr<T> (*C)())
: Name(N), Desc(D), Ctor(C) {}
StringRef getName() const { return Name; }
StringRef getDesc() const { return Desc; }
std::unique_ptr<T> instantiate() const { return Ctor(); }
};
/// A global registry used in conjunction with static constructors to make
/// pluggable components (like targets or garbage collectors) "just work" when
/// linked with an executable.
template <typename T>
class Registry {
public:
typedef T type;
typedef SimpleRegistryEntry<T> entry;
class node;
class iterator;
private:
Registry() = delete;
friend class node;
static node *Head, *Tail;
public:
/// Node in linked list of entries.
///
class node {
friend class iterator;
friend Registry<T>;
node *Next;
const entry& Val;
public:
node(const entry &V) : Next(nullptr), Val(V) {}
};
/// Add a node to the Registry: this is the interface between the plugin and
/// the executable.
///
/// This function is exported by the executable and called by the plugin to
/// add a node to the executable's registry. Therefore it's not defined here
/// to avoid it being instantiated in the plugin and is instead defined in
/// the executable (see LLVM_INSTANTIATE_REGISTRY below).
static void add_node(node *N);
/// Iterators for registry entries.
///
class iterator
: public llvm::iterator_facade_base<iterator, std::forward_iterator_tag,
const entry> {
const node *Cur;
public:
explicit iterator(const node *N) : Cur(N) {}
bool operator==(const iterator &That) const { return Cur == That.Cur; }
iterator &operator++() { Cur = Cur->Next; return *this; }
const entry &operator*() const { return Cur->Val; }
};
// begin is not defined here in order to avoid usage of an undefined static
// data member, instead it's instantiated by LLVM_INSTANTIATE_REGISTRY.
static iterator begin();
static iterator end() { return iterator(nullptr); }
static iterator_range<iterator> entries() {
return make_range(begin(), end());
}
/// A static registration template. Use like such:
///
/// Registry<Collector>::Add<FancyGC>
/// X("fancy-gc", "Newfangled garbage collector.");
///
/// Use of this template requires that:
///
/// 1. The registered subclass has a default constructor.
template <typename V>
class Add {
entry Entry;
node Node;
static std::unique_ptr<T> CtorFn() { return std::make_unique<V>(); }
public:
Add(StringRef Name, StringRef Desc)
: Entry(Name, Desc, CtorFn), Node(Entry) {
add_node(&Node);
}
};
};
} // end namespace llvm
/// Instantiate a registry class.
///
/// This provides template definitions of add_node, begin, and the Head and Tail
/// pointers, then explicitly instantiates them. We could explicitly specialize
/// them, instead of the two-step process of define then instantiate, but
/// strictly speaking that's not allowed by the C++ standard (we would need to
/// have explicit specialization declarations in all translation units where the
/// specialization is used) so we don't.
#define LLVM_INSTANTIATE_REGISTRY(REGISTRY_CLASS) \
namespace llvm { \
template<typename T> typename Registry<T>::node *Registry<T>::Head = nullptr;\
template<typename T> typename Registry<T>::node *Registry<T>::Tail = nullptr;\
template<typename T> \
void Registry<T>::add_node(typename Registry<T>::node *N) { \
if (Tail) \
Tail->Next = N; \
else \
Head = N; \
Tail = N; \
} \
template<typename T> typename Registry<T>::iterator Registry<T>::begin() { \
return iterator(Head); \
} \
template REGISTRY_CLASS::node *Registry<REGISTRY_CLASS::type>::Head; \
template REGISTRY_CLASS::node *Registry<REGISTRY_CLASS::type>::Tail; \
template \
void Registry<REGISTRY_CLASS::type>::add_node(REGISTRY_CLASS::node*); \
template REGISTRY_CLASS::iterator Registry<REGISTRY_CLASS::type>::begin(); \
}
#endif // LLVM_SUPPORT_REGISTRY_H
PK hwFZ�e��b b Support/AArch64TargetParser.hnu �[��� //===-- llvm/Support/AArch64TargetParser.h ----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This header is deprecated in favour of
/// `llvm/TargetParser/AArch64TargetParser.h`.
///
//===----------------------------------------------------------------------===//
#include "llvm/TargetParser/AArch64TargetParser.h"
PK hwFZTX �� � Support/SpecialCaseList.hnu �[��� //===-- SpecialCaseList.h - special case list for sanitizers ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//===----------------------------------------------------------------------===//
//
// This is a utility class used to parse user-provided text files with
// "special case lists" for code sanitizers. Such files are used to
// define an "ABI list" for DataFlowSanitizer and allow/exclusion lists for
// sanitizers like AddressSanitizer or UndefinedBehaviorSanitizer.
//
// Empty lines and lines starting with "#" are ignored. Sections are defined
// using a '[section_name]' header and can be used to specify sanitizers the
// entries below it apply to. Section names are regular expressions, and
// entries without a section header match all sections (e.g. an '[*]' header
// is assumed.)
// The remaining lines should have the form:
// prefix:wildcard_expression[=category]
// If category is not specified, it is assumed to be empty string.
// Definitions of "prefix" and "category" are sanitizer-specific. For example,
// sanitizer exclusion support prefixes "src", "mainfile", "fun" and "global".
// Wildcard expressions define, respectively, source files, main files,
// functions or globals which shouldn't be instrumented.
// Examples of categories:
// "functional": used in DFSan to list functions with pure functional
// semantics.
// "init": used in ASan exclusion list to disable initialization-order bugs
// detection for certain globals or source files.
// Full special case list file example:
// ---
// [address]
// # Excluded items:
// fun:*_ZN4base6subtle*
// global:*global_with_bad_access_or_initialization*
// global:*global_with_initialization_issues*=init
// type:*Namespace::ClassName*=init
// src:file_with_tricky_code.cc
// src:ignore-global-initializers-issues.cc=init
// mainfile:main_file.cc
//
// [dataflow]
// # Functions with pure functional semantics:
// fun:cos=functional
// fun:sin=functional
// ---
// Note that the wild card is in fact an llvm::Regex, but * is automatically
// replaced with .*
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_SPECIALCASELIST_H
#define LLVM_SUPPORT_SPECIALCASELIST_H
#include "llvm/ADT/StringMap.h"
#include "llvm/Support/Regex.h"
#include <memory>
#include <string>
#include <vector>
namespace llvm {
class MemoryBuffer;
class StringRef;
namespace vfs {
class FileSystem;
}
class SpecialCaseList {
public:
/// Parses the special case list entries from files. On failure, returns
/// 0 and writes an error message to string.
static std::unique_ptr<SpecialCaseList>
create(const std::vector<std::string> &Paths, llvm::vfs::FileSystem &FS,
std::string &Error);
/// Parses the special case list from a memory buffer. On failure, returns
/// 0 and writes an error message to string.
static std::unique_ptr<SpecialCaseList> create(const MemoryBuffer *MB,
std::string &Error);
/// Parses the special case list entries from files. On failure, reports a
/// fatal error.
static std::unique_ptr<SpecialCaseList>
createOrDie(const std::vector<std::string> &Paths, llvm::vfs::FileSystem &FS);
~SpecialCaseList();
/// Returns true, if special case list contains a line
/// \code
/// @Prefix:<E>=@Category
/// \endcode
/// where @Query satisfies wildcard expression <E> in a given @Section.
bool inSection(StringRef Section, StringRef Prefix, StringRef Query,
StringRef Category = StringRef()) const;
/// Returns the line number corresponding to the special case list entry if
/// the special case list contains a line
/// \code
/// @Prefix:<E>=@Category
/// \endcode
/// where @Query satisfies wildcard expression <E> in a given @Section.
/// Returns zero if there is no exclusion entry corresponding to this
/// expression.
unsigned inSectionBlame(StringRef Section, StringRef Prefix, StringRef Query,
StringRef Category = StringRef()) const;
protected:
// Implementations of the create*() functions that can also be used by derived
// classes.
bool createInternal(const std::vector<std::string> &Paths,
vfs::FileSystem &VFS, std::string &Error);
bool createInternal(const MemoryBuffer *MB, std::string &Error);
SpecialCaseList() = default;
SpecialCaseList(SpecialCaseList const &) = delete;
SpecialCaseList &operator=(SpecialCaseList const &) = delete;
/// Represents a set of regular expressions. Regular expressions which are
/// "literal" (i.e. no regex metacharacters) are stored in Strings. The
/// reason for doing so is efficiency; StringMap is much faster at matching
/// literal strings than Regex.
class Matcher {
public:
bool insert(std::string Regexp, unsigned LineNumber, std::string &REError);
// Returns the line number in the source file that this query matches to.
// Returns zero if no match is found.
unsigned match(StringRef Query) const;
private:
StringMap<unsigned> Strings;
std::vector<std::pair<std::unique_ptr<Regex>, unsigned>> RegExes;
};
using SectionEntries = StringMap<StringMap<Matcher>>;
struct Section {
Section(std::unique_ptr<Matcher> M) : SectionMatcher(std::move(M)){};
std::unique_ptr<Matcher> SectionMatcher;
SectionEntries Entries;
};
std::vector<Section> Sections;
/// Parses just-constructed SpecialCaseList entries from a memory buffer.
bool parse(const MemoryBuffer *MB, StringMap<size_t> &SectionsMap,
std::string &Error);
// Helper method for derived classes to search by Prefix, Query, and Category
// once they have already resolved a section entry.
unsigned inSectionBlame(const SectionEntries &Entries, StringRef Prefix,
StringRef Query, StringRef Category) const;
};
} // namespace llvm
#endif // LLVM_SUPPORT_SPECIALCASELIST_H
PK hwFZ�+�$ $ Support/raw_os_ostream.hnu �[��� //===- raw_os_ostream.h - std::ostream adaptor for raw_ostream --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the raw_os_ostream class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_RAW_OS_OSTREAM_H
#define LLVM_SUPPORT_RAW_OS_OSTREAM_H
#include "llvm/Support/raw_ostream.h"
#include <iosfwd>
namespace llvm {
/// raw_os_ostream - A raw_ostream that writes to an std::ostream. This is a
/// simple adaptor class. It does not check for output errors; clients should
/// use the underlying stream to detect errors.
class raw_os_ostream : public raw_ostream {
std::ostream &OS;
/// write_impl - See raw_ostream::write_impl.
void write_impl(const char *Ptr, size_t Size) override;
/// current_pos - Return the current position within the stream, not
/// counting the bytes currently in the buffer.
uint64_t current_pos() const override;
public:
raw_os_ostream(std::ostream &O) : OS(O) {}
~raw_os_ostream() override;
};
} // end llvm namespace
#endif
PK hwFZ|��-�$ �$ Support/Timer.hnu �[��� //===-- llvm/Support/Timer.h - Interval Timing Support ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_TIMER_H
#define LLVM_SUPPORT_TIMER_H
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/DataTypes.h"
#include <cassert>
#include <memory>
#include <string>
#include <vector>
namespace llvm {
class TimerGroup;
class raw_ostream;
class TimeRecord {
double WallTime = 0.0; ///< Wall clock time elapsed in seconds.
double UserTime = 0.0; ///< User time elapsed.
double SystemTime = 0.0; ///< System time elapsed.
ssize_t MemUsed = 0; ///< Memory allocated (in bytes).
uint64_t InstructionsExecuted = 0; ///< Number of instructions executed
public:
TimeRecord() = default;
/// Get the current time and memory usage. If Start is true we get the memory
/// usage before the time, otherwise we get time before memory usage. This
/// matters if the time to get the memory usage is significant and shouldn't
/// be counted as part of a duration.
static TimeRecord getCurrentTime(bool Start = true);
double getProcessTime() const { return UserTime + SystemTime; }
double getUserTime() const { return UserTime; }
double getSystemTime() const { return SystemTime; }
double getWallTime() const { return WallTime; }
ssize_t getMemUsed() const { return MemUsed; }
uint64_t getInstructionsExecuted() const { return InstructionsExecuted; }
bool operator<(const TimeRecord &T) const {
// Sort by Wall Time elapsed, as it is the only thing really accurate
return WallTime < T.WallTime;
}
void operator+=(const TimeRecord &RHS) {
WallTime += RHS.WallTime;
UserTime += RHS.UserTime;
SystemTime += RHS.SystemTime;
MemUsed += RHS.MemUsed;
InstructionsExecuted += RHS.InstructionsExecuted;
}
void operator-=(const TimeRecord &RHS) {
WallTime -= RHS.WallTime;
UserTime -= RHS.UserTime;
SystemTime -= RHS.SystemTime;
MemUsed -= RHS.MemUsed;
InstructionsExecuted -= RHS.InstructionsExecuted;
}
/// Print the current time record to \p OS, with a breakdown showing
/// contributions to the \p Total time record.
void print(const TimeRecord &Total, raw_ostream &OS) const;
};
/// This class is used to track the amount of time spent between invocations of
/// its startTimer()/stopTimer() methods. Given appropriate OS support it can
/// also keep track of the RSS of the program at various points. By default,
/// the Timer will print the amount of time it has captured to standard error
/// when the last timer is destroyed, otherwise it is printed when its
/// TimerGroup is destroyed. Timers do not print their information if they are
/// never started.
class Timer {
TimeRecord Time; ///< The total time captured.
TimeRecord StartTime; ///< The time startTimer() was last called.
std::string Name; ///< The name of this time variable.
std::string Description; ///< Description of this time variable.
bool Running = false; ///< Is the timer currently running?
bool Triggered = false; ///< Has the timer ever been triggered?
TimerGroup *TG = nullptr; ///< The TimerGroup this Timer is in.
Timer **Prev = nullptr; ///< Pointer to \p Next of previous timer in group.
Timer *Next = nullptr; ///< Next timer in the group.
public:
explicit Timer(StringRef TimerName, StringRef TimerDescription) {
init(TimerName, TimerDescription);
}
Timer(StringRef TimerName, StringRef TimerDescription, TimerGroup &tg) {
init(TimerName, TimerDescription, tg);
}
Timer(const Timer &RHS) {
assert(!RHS.TG && "Can only copy uninitialized timers");
}
const Timer &operator=(const Timer &T) {
assert(!TG && !T.TG && "Can only assign uninit timers");
return *this;
}
~Timer();
/// Create an uninitialized timer, client must use 'init'.
explicit Timer() = default;
void init(StringRef TimerName, StringRef TimerDescription);
void init(StringRef TimerName, StringRef TimerDescription, TimerGroup &tg);
const std::string &getName() const { return Name; }
const std::string &getDescription() const { return Description; }
bool isInitialized() const { return TG != nullptr; }
/// Check if the timer is currently running.
bool isRunning() const { return Running; }
/// Check if startTimer() has ever been called on this timer.
bool hasTriggered() const { return Triggered; }
/// Start the timer running. Time between calls to startTimer/stopTimer is
/// counted by the Timer class. Note that these calls must be correctly
/// paired.
void startTimer();
/// Stop the timer.
void stopTimer();
/// Clear the timer state.
void clear();
/// Return the duration for which this timer has been running.
TimeRecord getTotalTime() const { return Time; }
private:
friend class TimerGroup;
};
/// The TimeRegion class is used as a helper class to call the startTimer() and
/// stopTimer() methods of the Timer class. When the object is constructed, it
/// starts the timer specified as its argument. When it is destroyed, it stops
/// the relevant timer. This makes it easy to time a region of code.
class TimeRegion {
Timer *T;
TimeRegion(const TimeRegion &) = delete;
public:
explicit TimeRegion(Timer &t) : T(&t) {
T->startTimer();
}
explicit TimeRegion(Timer *t) : T(t) {
if (T) T->startTimer();
}
~TimeRegion() {
if (T) T->stopTimer();
}
};
/// This class is basically a combination of TimeRegion and Timer. It allows
/// you to declare a new timer, AND specify the region to time, all in one
/// statement. All timers with the same name are merged. This is primarily
/// used for debugging and for hunting performance problems.
struct NamedRegionTimer : public TimeRegion {
explicit NamedRegionTimer(StringRef Name, StringRef Description,
StringRef GroupName,
StringRef GroupDescription, bool Enabled = true);
};
/// The TimerGroup class is used to group together related timers into a single
/// report that is printed when the TimerGroup is destroyed. It is illegal to
/// destroy a TimerGroup object before all of the Timers in it are gone. A
/// TimerGroup can be specified for a newly created timer in its constructor.
class TimerGroup {
struct PrintRecord {
TimeRecord Time;
std::string Name;
std::string Description;
PrintRecord(const PrintRecord &Other) = default;
PrintRecord &operator=(const PrintRecord &Other) = default;
PrintRecord(const TimeRecord &Time, const std::string &Name,
const std::string &Description)
: Time(Time), Name(Name), Description(Description) {}
bool operator <(const PrintRecord &Other) const {
return Time < Other.Time;
}
};
std::string Name;
std::string Description;
Timer *FirstTimer = nullptr; ///< First timer in the group.
std::vector<PrintRecord> TimersToPrint;
TimerGroup **Prev; ///< Pointer to Next field of previous timergroup in list.
TimerGroup *Next; ///< Pointer to next timergroup in list.
TimerGroup(const TimerGroup &TG) = delete;
void operator=(const TimerGroup &TG) = delete;
public:
explicit TimerGroup(StringRef Name, StringRef Description);
explicit TimerGroup(StringRef Name, StringRef Description,
const StringMap<TimeRecord> &Records);
~TimerGroup();
void setName(StringRef NewName, StringRef NewDescription) {
Name.assign(NewName.begin(), NewName.end());
Description.assign(NewDescription.begin(), NewDescription.end());
}
/// Print any started timers in this group, optionally resetting timers after
/// printing them.
void print(raw_ostream &OS, bool ResetAfterPrint = false);
/// Clear all timers in this group.
void clear();
/// This static method prints all timers.
static void printAll(raw_ostream &OS);
/// Clear out all timers. This is mostly used to disable automatic
/// printing on shutdown, when timers have already been printed explicitly
/// using \c printAll or \c printJSONValues.
static void clearAll();
const char *printJSONValues(raw_ostream &OS, const char *delim);
/// Prints all timers as JSON key/value pairs.
static const char *printAllJSONValues(raw_ostream &OS, const char *delim);
/// Ensure global objects required for statistics printing are initialized.
/// This function is used by the Statistic code to ensure correct order of
/// global constructors and destructors.
static void constructForStatistics();
/// This makes the default group unmanaged, and lets the user manage the
/// group's lifetime.
static std::unique_ptr<TimerGroup> aquireDefaultGroup();
private:
friend class Timer;
friend void PrintStatisticsJSON(raw_ostream &OS);
void addTimer(Timer &T);
void removeTimer(Timer &T);
void prepareToPrintList(bool reset_time = false);
void PrintQueuedTimers(raw_ostream &OS);
void printJSONValue(raw_ostream &OS, const PrintRecord &R,
const char *suffix, double Value);
};
} // end namespace llvm
#endif
PK hwFZŗ��1 1 Support/ELFAttributes.hnu �[��� //===-- ELFAttributes.h - ELF Attributes ------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ELFATTRIBUTES_H
#define LLVM_SUPPORT_ELFATTRIBUTES_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include <optional>
namespace llvm {
struct TagNameItem {
unsigned attr;
StringRef tagName;
};
using TagNameMap = ArrayRef<TagNameItem>;
namespace ELFAttrs {
enum AttrType : unsigned { File = 1, Section = 2, Symbol = 3 };
StringRef attrTypeAsString(unsigned attr, TagNameMap tagNameMap,
bool hasTagPrefix = true);
std::optional<unsigned> attrTypeFromString(StringRef tag, TagNameMap tagNameMap);
// Magic numbers for ELF attributes.
enum AttrMagic { Format_Version = 0x41 };
} // namespace ELFAttrs
} // namespace llvm
#endif
PK hwFZ;�L��k �k Support/CSKYTargetParser.defnu �[��� //===- CSKYTargetParser.def - CSKY target parsing defines -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides defines to build up the CSKY target parser's logic.
//
//===----------------------------------------------------------------------===//
// NOTE: NO INCLUDE GUARD DESIRED!
#ifndef CSKY_FPU
#define CSKY_FPU(NAME, KIND, VERSION)
#endif
CSKY_FPU("invalid", FK_INVALID, FPUVersion::NONE)
CSKY_FPU("auto", FK_AUTO, FPUVersion::FPV2)
CSKY_FPU("fpv2", FK_FPV2, FPUVersion::FPV2)
CSKY_FPU("fpv2_divd", FK_FPV2_DIVD, FPUVersion::FPV2)
CSKY_FPU("fpv2_sf", FK_FPV2_SF, FPUVersion::FPV2)
CSKY_FPU("fpv3", FK_FPV3, FPUVersion::FPV3)
CSKY_FPU("fpv3_hf", FK_FPV3_HF, FPUVersion::FPV3)
CSKY_FPU("fpv3_hsf", FK_FPV3_HSF, FPUVersion::FPV3)
CSKY_FPU("fpv3_sdf", FK_FPV3_SDF, FPUVersion::FPV3)
#undef CSKY_FPU
#ifndef CSKY_ARCH
#define CSKY_ARCH(NAME, ID, ARCH_BASE_EXT)
#endif
CSKY_ARCH("invalid", INVALID, CSKY::AEK_INVALID)
CSKY_ARCH("ck801", CK801, CSKY::MAEK_E1 | CSKY::AEK_TRUST)
CSKY_ARCH("ck802", CK802, CSKY::MAEK_E2 | CSKY::AEK_TRUST | CSKY::AEK_NVIC)
CSKY_ARCH("ck803", CK803,
CSKY::MAEK_2E3 | CSKY::AEK_MP | CSKY::AEK_TRUST | CSKY::AEK_NVIC |
CSKY::AEK_HWDIV)
CSKY_ARCH("ck803s", CK803S,
CSKY::MAEK_2E3 | CSKY::AEK_MP | CSKY::AEK_TRUST | CSKY::AEK_NVIC |
CSKY::AEK_HWDIV)
CSKY_ARCH("ck804", CK804,
CSKY::MAEK_2E3 | CSKY::AEK_MP | CSKY::AEK_TRUST | CSKY::AEK_NVIC |
CSKY::AEK_HWDIV | CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3)
CSKY_ARCH("ck805", CK805,
CSKY::MAEK_2E3 | CSKY::AEK_MP | CSKY::AEK_TRUST | CSKY::AEK_NVIC |
CSKY::AEK_HWDIV | CSKY::AEK_HIGHREG | CSKY::MAEK_3E3R2 |
CSKY::AEK_3E3R3 | CSKY::AEK_VDSPV2 | CSKY::AEK_VDSP2E3)
CSKY_ARCH("ck807", CK807,
CSKY::MAEK_3E7 | CSKY::MAEK_MP | CSKY::MAEK_MP1E2 | CSKY::AEK_TRUST |
CSKY::AEK_HWDIV | CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 |
CSKY::AEK_DSPE60 | CSKY::AEK_HIGHREG | CSKY::AEK_HARDTP |
CSKY::AEK_NVIC | CSKY::AEK_CACHE)
CSKY_ARCH("ck810", CK810,
CSKY::MAEK_7E10 | CSKY::MAEK_MP | CSKY::MAEK_MP1E2 | CSKY::AEK_TRUST |
CSKY::AEK_HWDIV | CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 |
CSKY::AEK_DSPE60 | CSKY::AEK_HIGHREG | CSKY::AEK_HARDTP |
CSKY::AEK_NVIC | CSKY::AEK_CACHE)
CSKY_ARCH("ck810v", CK810V,
CSKY::MAEK_7E10 | CSKY::MAEK_MP | CSKY::MAEK_MP1E2 | CSKY::AEK_TRUST |
CSKY::AEK_HWDIV | CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 |
CSKY::AEK_DSPE60 | CSKY::AEK_HIGHREG | CSKY::AEK_HARDTP |
CSKY::AEK_NVIC | CSKY::AEK_CACHE | CSKY::AEK_VDSPV1)
CSKY_ARCH("ck860", CK860,
CSKY::MAEK_10E60 | CSKY::MAEK_MP | CSKY::MAEK_MP1E2 |
CSKY::AEK_TRUST | CSKY::AEK_HWDIV | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG | CSKY::AEK_HARDTP | CSKY::AEK_NVIC |
CSKY::AEK_CACHE | CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3)
CSKY_ARCH("ck860v", CK860V,
CSKY::MAEK_10E60 | CSKY::MAEK_MP | CSKY::MAEK_MP1E2 |
CSKY::AEK_TRUST | CSKY::AEK_HWDIV | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG | CSKY::AEK_HARDTP | CSKY::AEK_NVIC |
CSKY::AEK_CACHE | CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 |
CSKY::AEK_VDSPV2 | CSKY::AEK_VDSP2E60F)
#undef CSKY_ARCH
#ifndef CSKY_ARCH_EXT_NAME
#define CSKY_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE)
#endif
CSKY_ARCH_EXT_NAME("invalid", CSKY::AEK_INVALID, nullptr, nullptr)
CSKY_ARCH_EXT_NAME("none", CSKY::AEK_NONE, nullptr, nullptr)
CSKY_ARCH_EXT_NAME("fpuv2_sf", CSKY::AEK_FPUV2SF, "+fpuv2_sf", "-fpuv2_sf")
CSKY_ARCH_EXT_NAME("fpuv2_df", CSKY::AEK_FPUV2DF, "+fpuv2_df", "-fpuv2_df")
CSKY_ARCH_EXT_NAME("fdivdu", CSKY::AEK_FDIVDU, "+fdivdu", "-fdivdu")
CSKY_ARCH_EXT_NAME("fpuv3_hi", CSKY::AEK_FPUV3HI, "+fpuv3_hi", "-fpuv3_hi")
CSKY_ARCH_EXT_NAME("fpuv3_hf", CSKY::AEK_FPUV3HF, "+fpuv3_hf", "-fpuv3_hf")
CSKY_ARCH_EXT_NAME("fpuv3_sf", CSKY::AEK_FPUV3SF, "+fpuv3_sf", "-fpuv3_sf")
CSKY_ARCH_EXT_NAME("fpuv3_df", CSKY::AEK_FPUV3DF, "+fpuv3_df", "-fpuv3_df")
CSKY_ARCH_EXT_NAME("floate1", CSKY::AEK_FLOATE1, "+floate1", "-floate1")
CSKY_ARCH_EXT_NAME("float1e2", CSKY::AEK_FLOAT1E2, "+float1e2", "-float1e2")
CSKY_ARCH_EXT_NAME("float1e3", CSKY::AEK_FLOAT1E3, "+float1e3", "-float1e3")
CSKY_ARCH_EXT_NAME("float3e4", CSKY::AEK_FLOAT3E4, "+float3e4", "-float3e4")
CSKY_ARCH_EXT_NAME("float7e60", CSKY::AEK_FLOAT7E60, "+float7e60", "-float7e60")
CSKY_ARCH_EXT_NAME("hwdiv", CSKY::AEK_HWDIV, "+hwdiv", "-hwdiv")
CSKY_ARCH_EXT_NAME("multiple_stld", CSKY::AEK_STLD, "+multiple_stld",
"-multiple_stld")
CSKY_ARCH_EXT_NAME("pushpop", CSKY::AEK_PUSHPOP, "+pushpop", "-pushpop")
CSKY_ARCH_EXT_NAME("edsp", CSKY::AEK_EDSP, "+edsp", "-edsp")
CSKY_ARCH_EXT_NAME("dsp1e2", CSKY::AEK_DSP1E2, "+dsp1e2", "-dsp1e2")
CSKY_ARCH_EXT_NAME("dspe60", CSKY::AEK_DSPE60, "+dspe60", "-dspe60")
CSKY_ARCH_EXT_NAME("dspv2", CSKY::AEK_DSPV2, "+dspv2", "-dspv2")
CSKY_ARCH_EXT_NAME("dsp_silan", CSKY::AEK_DSPSILAN, "+dsp_silan", "-dsp_silan")
CSKY_ARCH_EXT_NAME("elrw", CSKY::AEK_ELRW, "+elrw", "-elrw")
CSKY_ARCH_EXT_NAME("trust", CSKY::AEK_TRUST, "+trust", "-trust")
CSKY_ARCH_EXT_NAME("java", CSKY::AEK_JAVA, "+java", "-java")
CSKY_ARCH_EXT_NAME("cache", CSKY::AEK_CACHE, "+cache", "-cache")
CSKY_ARCH_EXT_NAME("nvic", CSKY::AEK_NVIC, "+nvic", "-nvic")
CSKY_ARCH_EXT_NAME("doloop", CSKY::AEK_DOLOOP, "+doloop", "-doloop")
CSKY_ARCH_EXT_NAME("high-registers", CSKY::AEK_HIGHREG, "+high-registers",
"-high-registers")
CSKY_ARCH_EXT_NAME("smart", CSKY::AEK_SMART, "+smart", "-smart")
CSKY_ARCH_EXT_NAME("vdsp2e3", CSKY::AEK_VDSP2E3, "+vdsp2e3", "-vdsp2e3")
CSKY_ARCH_EXT_NAME("vdsp2e60f", CSKY::AEK_VDSP2E60F, "+vdsp2e60f", "-vdsp2e60f")
CSKY_ARCH_EXT_NAME("vdspv2", CSKY::AEK_VDSPV2, "+vdspv2", "-vdspv2")
CSKY_ARCH_EXT_NAME("hard-tp", CSKY::AEK_HARDTP, "+hard-tp", "-hard-tp")
CSKY_ARCH_EXT_NAME("soft-tp", CSKY::AEK_SOFTTP, "+soft-tp", "-soft-tp")
CSKY_ARCH_EXT_NAME("istack", CSKY::AEK_ISTACK, "+istack", "-istack")
CSKY_ARCH_EXT_NAME("constpool", CSKY::AEK_CONSTPOOL, "+constpool", "-constpool")
CSKY_ARCH_EXT_NAME("stack-size", CSKY::AEK_STACKSIZE, "+stack-size",
"-stack-size")
CSKY_ARCH_EXT_NAME("ccrt", CSKY::AEK_CCRT, "+ccrt", "-ccrt")
CSKY_ARCH_EXT_NAME("vdspv1", CSKY::AEK_VDSPV1, "+vdspv1", "-vdspv1")
CSKY_ARCH_EXT_NAME("e1", CSKY::AEK_E1, "+e1", "-e1")
CSKY_ARCH_EXT_NAME("e2", CSKY::AEK_E2, "+e2", "-e2")
CSKY_ARCH_EXT_NAME("2e3", CSKY::AEK_2E3, "+2e3", "-2e3")
CSKY_ARCH_EXT_NAME("mp", CSKY::AEK_MP, "+mp", "-mp")
CSKY_ARCH_EXT_NAME("3e3r1", CSKY::AEK_3E3R1, "+3e3r1", "-3e3r1")
CSKY_ARCH_EXT_NAME("3e3r2", CSKY::AEK_3E3R2, "+3e3r2", "-3e3r2")
CSKY_ARCH_EXT_NAME("3e3r3", CSKY::AEK_3E3R3, "+3e3r3", "-3e3r3")
CSKY_ARCH_EXT_NAME("3e7", CSKY::AEK_3E7, "+3e7", "-3e7")
CSKY_ARCH_EXT_NAME("mp1e2", CSKY::AEK_MP1E2, "+mp1e2", "-mp1e2")
CSKY_ARCH_EXT_NAME("7e10", CSKY::AEK_7E10, "+7e10", "-7e10")
CSKY_ARCH_EXT_NAME("10e60", CSKY::AEK_10E60, "+10e60", "-10e60")
#undef CSKY_ARCH_EXT_NAME
#ifndef CSKY_CPU_NAME
#define CSKY_CPU_NAME(NAME, ARCH_ID, DEFAULT_EXT)
#endif
CSKY_CPU_NAME("ck801", CK801, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck801t", CK801, CSKY::AEK_NONE)
CSKY_CPU_NAME("e801", CK801, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck802", CK802, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck802t", CK802, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck802j", CK802, CSKY::AEK_JAVA)
CSKY_CPU_NAME("e802", CK802, CSKY::AEK_NONE)
CSKY_CPU_NAME("e802t", CK802, CSKY::AEK_NONE)
CSKY_CPU_NAME("s802", CK802, CSKY::AEK_NONE)
CSKY_CPU_NAME("s802t", CK802, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck803", CK803, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck803h", CK803, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck803t", CK803, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck803ht", CK803, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck803f", CK803,
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck803fh", CK803,
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck803e", CK803,
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60)
CSKY_CPU_NAME("ck803eh", CK803,
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60)
CSKY_CPU_NAME("ck803et", CK803,
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60)
CSKY_CPU_NAME("ck803eht", CK803,
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60)
CSKY_CPU_NAME("ck803ef", CK803,
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck803efh", CK803,
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck803ft", CK803,
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck803eft", CK803,
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck803efht", CK803,
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck803r1", CK803,
CSKY::MAEK_3E3R1 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2)
CSKY_CPU_NAME("ck803r2", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2)
CSKY_CPU_NAME("ck803r3", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2)
CSKY_CPU_NAME("ck803hr1", CK803,
CSKY::MAEK_3E3R1 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2)
CSKY_CPU_NAME("ck803hr2", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2)
CSKY_CPU_NAME("ck803hr3", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2)
CSKY_CPU_NAME("ck803tr1", CK803,
CSKY::MAEK_3E3R1 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2)
CSKY_CPU_NAME("ck803tr2", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2)
CSKY_CPU_NAME("ck803tr3", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2)
CSKY_CPU_NAME("ck803htr1", CK803,
CSKY::MAEK_3E3R1 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2)
CSKY_CPU_NAME("ck803htr2", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2)
CSKY_CPU_NAME("ck803htr3", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2)
CSKY_CPU_NAME("ck803fr1", CK803,
CSKY::MAEK_3E3R1 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck803fr2", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck803fr3", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck803fhr1", CK803,
CSKY::MAEK_3E3R1 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck803fhr2", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck803fhr3", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck803er1", CK803,
CSKY::MAEK_3E3R1 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803er2", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803er3", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803ehr1", CK803,
CSKY::MAEK_3E3R1 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803ehr2", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803ehr3", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803etr1", CK803,
CSKY::MAEK_3E3R1 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803etr2", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803etr3", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803ehtr1", CK803,
CSKY::MAEK_3E3R1 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803ehtr2", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803ehtr3", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803efr1", CK803,
CSKY::MAEK_3E3R1 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803efr2", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803efr3", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803efhr1", CK803,
CSKY::MAEK_3E3R1 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803efhr2", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803efhr3", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803ftr1", CK803,
CSKY::MAEK_3E3R1 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck803ftr2", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck803ftr3", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck803eftr1", CK803,
CSKY::MAEK_3E3R1 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803eftr2", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803eftr3", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803efhtr1", CK803,
CSKY::MAEK_3E3R1 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803efhtr2", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck803efhtr3", CK803,
CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3 | CSKY::AEK_DSPV2 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("s803", CK803, CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3)
CSKY_CPU_NAME("s803t", CK803, CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3)
CSKY_CPU_NAME("e803", CK803, CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3)
CSKY_CPU_NAME("e803t", CK803, CSKY::MAEK_3E3R2 | CSKY::AEK_3E3R3)
CSKY_CPU_NAME("ck803s", CK803S, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck803st", CK803S, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck803se", CK803S,
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60)
CSKY_CPU_NAME("ck803sf", CK803S,
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck803sef", CK803S,
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck803seft", CK803S,
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck804", CK804, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck804h", CK804, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck804t", CK804, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck804ht", CK804, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck804f", CK804,
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck804fh", CK804,
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck804e", CK804,
CSKY::AEK_DSPV2 | CSKY::AEK_3E3R1 | CSKY::AEK_3E3R3 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck804eh", CK804,
CSKY::AEK_DSPV2 | CSKY::AEK_3E3R1 | CSKY::AEK_3E3R3 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck804et", CK804,
CSKY::AEK_DSPV2 | CSKY::AEK_3E3R1 | CSKY::AEK_3E3R3 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck804eht", CK804,
CSKY::AEK_DSPV2 | CSKY::AEK_3E3R1 | CSKY::AEK_3E3R3 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck804ef", CK804,
CSKY::AEK_DSPV2 | CSKY::AEK_3E3R1 | CSKY::AEK_3E3R3 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck804efh", CK804,
CSKY::AEK_DSPV2 | CSKY::AEK_3E3R1 | CSKY::AEK_3E3R3 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck804ft", CK804,
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck804eft", CK804,
CSKY::AEK_DSPV2 | CSKY::AEK_3E3R1 | CSKY::AEK_3E3R3 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck804efht", CK804,
CSKY::AEK_DSPV2 | CSKY::AEK_3E3R1 | CSKY::AEK_3E3R3 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("e804d", CK804,
CSKY::AEK_DSPV2 | CSKY::AEK_3E3R1 | CSKY::AEK_3E3R3 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("e804dt", CK804,
CSKY::AEK_DSPV2 | CSKY::AEK_3E3R1 | CSKY::AEK_3E3R3 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("e804f", CK804,
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("e804ft", CK804,
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("e804df", CK804,
CSKY::AEK_DSPV2 | CSKY::AEK_3E3R1 | CSKY::AEK_3E3R3 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("e804dft", CK804,
CSKY::AEK_DSPV2 | CSKY::AEK_3E3R1 | CSKY::AEK_3E3R3 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_HIGHREG)
CSKY_CPU_NAME("ck805", CK805, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck805e", CK805,
CSKY::AEK_DSPV2 | CSKY::AEK_3E3R1 | CSKY::AEK_3E3R3)
CSKY_CPU_NAME("ck805f", CK805,
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck805t", CK805, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck805ef", CK805,
CSKY::AEK_DSPV2 | CSKY::AEK_3E3R1 | CSKY::AEK_3E3R3 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck805et", CK805,
CSKY::AEK_DSPV2 | CSKY::AEK_3E3R1 | CSKY::AEK_3E3R3)
CSKY_CPU_NAME("ck805ft", CK805,
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck805eft", CK805,
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_DSPV2 | CSKY::AEK_3E3R1 | CSKY::AEK_3E3R3)
CSKY_CPU_NAME("i805", CK805, CSKY::AEK_NONE)
CSKY_CPU_NAME("i805f", CK805,
CSKY::AEK_FPUV2SF | CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E3)
CSKY_CPU_NAME("ck807", CK807, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck807e", CK807,
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60)
CSKY_CPU_NAME("ck807f", CK807,
CSKY::AEK_FPUV2SF | CSKY::AEK_FPUV2DF | CSKY::AEK_FDIVDU |
CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E2 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_FLOAT3E4)
CSKY_CPU_NAME("ck807ef", CK807,
CSKY::AEK_EDSP | CSKY::AEK_DSP1E2 | CSKY::AEK_DSPE60 |
CSKY::AEK_FPUV2SF | CSKY::AEK_FPUV2DF | CSKY::AEK_FDIVDU |
CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E2 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_FLOAT3E4)
CSKY_CPU_NAME("c807", CK807, CSKY::AEK_NONE)
CSKY_CPU_NAME("c807f", CK807,
CSKY::AEK_FPUV2SF | CSKY::AEK_FPUV2DF | CSKY::AEK_FDIVDU |
CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E2 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_FLOAT3E4)
CSKY_CPU_NAME("r807", CK807, CSKY::AEK_NONE)
CSKY_CPU_NAME("r807f", CK807,
CSKY::AEK_FPUV2SF | CSKY::AEK_FPUV2DF | CSKY::AEK_FDIVDU |
CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E2 | CSKY::AEK_FLOAT1E3 |
CSKY::AEK_FLOAT3E4)
CSKY_CPU_NAME("ck810e", CK810, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck810et", CK810, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck810ef", CK810,
CSKY::AEK_FPUV2SF | CSKY::AEK_FPUV2DF | CSKY::AEK_FDIVDU |
CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E2)
CSKY_CPU_NAME("ck810eft", CK810,
CSKY::AEK_FPUV2SF | CSKY::AEK_FPUV2DF | CSKY::AEK_FDIVDU |
CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E2)
CSKY_CPU_NAME("ck810", CK810, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck810f", CK810,
CSKY::AEK_FPUV2SF | CSKY::AEK_FPUV2DF | CSKY::AEK_FDIVDU |
CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E2)
CSKY_CPU_NAME("ck810t", CK810, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck810ft", CK810,
CSKY::AEK_FPUV2SF | CSKY::AEK_FPUV2DF | CSKY::AEK_FDIVDU |
CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E2)
CSKY_CPU_NAME("c810", CK810,
CSKY::AEK_FPUV2SF | CSKY::AEK_FPUV2DF | CSKY::AEK_FDIVDU |
CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E2)
CSKY_CPU_NAME("c810t", CK810,
CSKY::AEK_FPUV2SF | CSKY::AEK_FPUV2DF | CSKY::AEK_FDIVDU |
CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E2)
CSKY_CPU_NAME("ck810v", CK810V, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck810ev", CK810V, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck810tv", CK810V, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck810etv", CK810V, CSKY::AEK_NONE)
CSKY_CPU_NAME("c810v", CK810V,
CSKY::AEK_FPUV2SF | CSKY::AEK_FPUV2DF | CSKY::AEK_FDIVDU |
CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E2)
CSKY_CPU_NAME("ck810fv", CK810V,
CSKY::AEK_FPUV2SF | CSKY::AEK_FPUV2DF | CSKY::AEK_FDIVDU |
CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E2)
CSKY_CPU_NAME("ck810efv", CK810V,
CSKY::AEK_FPUV2SF | CSKY::AEK_FPUV2DF | CSKY::AEK_FDIVDU |
CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E2)
CSKY_CPU_NAME("ck810ftv", CK810V,
CSKY::AEK_FPUV2SF | CSKY::AEK_FPUV2DF | CSKY::AEK_FDIVDU |
CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E2)
CSKY_CPU_NAME("c810tv", CK810V,
CSKY::AEK_FPUV2SF | CSKY::AEK_FPUV2DF | CSKY::AEK_FDIVDU |
CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E2)
CSKY_CPU_NAME("c810eftv", CK810V,
CSKY::AEK_FPUV2SF | CSKY::AEK_FPUV2DF | CSKY::AEK_FDIVDU |
CSKY::AEK_FLOATE1 | CSKY::AEK_FLOAT1E2)
CSKY_CPU_NAME("ck860", CK860, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck860f", CK860,
CSKY::AEK_FPUV3HI | CSKY::AEK_FPUV3HF | CSKY::AEK_FPUV3SF |
CSKY::AEK_FPUV3DF | CSKY::AEK_FLOAT7E60)
CSKY_CPU_NAME("c860", CK860,
CSKY::AEK_FPUV3HI | CSKY::AEK_FPUV3HF | CSKY::AEK_FPUV3SF |
CSKY::AEK_FPUV3DF | CSKY::AEK_FLOAT7E60)
CSKY_CPU_NAME("ck860v", CK860V, CSKY::AEK_NONE)
CSKY_CPU_NAME("ck860fv", CK860V,
CSKY::AEK_FPUV3HI | CSKY::AEK_FPUV3HF | CSKY::AEK_FPUV3SF |
CSKY::AEK_FPUV3DF | CSKY::AEK_FLOAT7E60)
CSKY_CPU_NAME("c860v", CK860V,
CSKY::AEK_FPUV3HI | CSKY::AEK_FPUV3HF | CSKY::AEK_FPUV3SF |
CSKY::AEK_FPUV3DF | CSKY::AEK_FLOAT7E60)
// Invalid CPU
CSKY_CPU_NAME("invalid", INVALID, CSKY::AEK_INVALID)
#undef CSKY_CPU_NAME
PK hwFZ�� ^ ^ Support/X86TargetParser.defnu �[��� //===-- llvm/Support/X86TargetParser.def ------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This header is deprecated in favour of
/// `llvm/TargetParser/X86TargetParser.def`.
///
//===----------------------------------------------------------------------===//
#include "llvm/TargetParser/X86TargetParser.def"
PK hwFZ��DN�z �z Support/ScaledNumber.hnu �[��� //===- llvm/Support/ScaledNumber.h - Support for scaled numbers -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains functions (and a class) useful for working with scaled
// numbers -- in particular, pairs of integers where one represents digits and
// another represents a scale. The functions are helpers and live in the
// namespace ScaledNumbers. The class ScaledNumber is useful for modelling
// certain cost metrics that need simple, integer-like semantics that are easy
// to reason about.
//
// These might remind you of soft-floats. If you want one of those, you're in
// the wrong place. Look at include/llvm/ADT/APFloat.h instead.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_SCALEDNUMBER_H
#define LLVM_SUPPORT_SCALEDNUMBER_H
#include "llvm/Support/MathExtras.h"
#include <algorithm>
#include <cstdint>
#include <limits>
#include <string>
#include <tuple>
#include <utility>
namespace llvm {
namespace ScaledNumbers {
/// Maximum scale; same as APFloat for easy debug printing.
const int32_t MaxScale = 16383;
/// Maximum scale; same as APFloat for easy debug printing.
const int32_t MinScale = -16382;
/// Get the width of a number.
template <class DigitsT> inline int getWidth() { return sizeof(DigitsT) * 8; }
/// Conditionally round up a scaled number.
///
/// Given \c Digits and \c Scale, round up iff \c ShouldRound is \c true.
/// Always returns \c Scale unless there's an overflow, in which case it
/// returns \c 1+Scale.
///
/// \pre adding 1 to \c Scale will not overflow INT16_MAX.
template <class DigitsT>
inline std::pair<DigitsT, int16_t> getRounded(DigitsT Digits, int16_t Scale,
bool ShouldRound) {
static_assert(!std::numeric_limits<DigitsT>::is_signed, "expected unsigned");
if (ShouldRound)
if (!++Digits)
// Overflow.
return std::make_pair(DigitsT(1) << (getWidth<DigitsT>() - 1), Scale + 1);
return std::make_pair(Digits, Scale);
}
/// Convenience helper for 32-bit rounding.
inline std::pair<uint32_t, int16_t> getRounded32(uint32_t Digits, int16_t Scale,
bool ShouldRound) {
return getRounded(Digits, Scale, ShouldRound);
}
/// Convenience helper for 64-bit rounding.
inline std::pair<uint64_t, int16_t> getRounded64(uint64_t Digits, int16_t Scale,
bool ShouldRound) {
return getRounded(Digits, Scale, ShouldRound);
}
/// Adjust a 64-bit scaled number down to the appropriate width.
///
/// \pre Adding 64 to \c Scale will not overflow INT16_MAX.
template <class DigitsT>
inline std::pair<DigitsT, int16_t> getAdjusted(uint64_t Digits,
int16_t Scale = 0) {
static_assert(!std::numeric_limits<DigitsT>::is_signed, "expected unsigned");
const int Width = getWidth<DigitsT>();
if (Width == 64 || Digits <= std::numeric_limits<DigitsT>::max())
return std::make_pair(Digits, Scale);
// Shift right and round.
int Shift = llvm::bit_width(Digits) - Width;
return getRounded<DigitsT>(Digits >> Shift, Scale + Shift,
Digits & (UINT64_C(1) << (Shift - 1)));
}
/// Convenience helper for adjusting to 32 bits.
inline std::pair<uint32_t, int16_t> getAdjusted32(uint64_t Digits,
int16_t Scale = 0) {
return getAdjusted<uint32_t>(Digits, Scale);
}
/// Convenience helper for adjusting to 64 bits.
inline std::pair<uint64_t, int16_t> getAdjusted64(uint64_t Digits,
int16_t Scale = 0) {
return getAdjusted<uint64_t>(Digits, Scale);
}
/// Multiply two 64-bit integers to create a 64-bit scaled number.
///
/// Implemented with four 64-bit integer multiplies.
std::pair<uint64_t, int16_t> multiply64(uint64_t LHS, uint64_t RHS);
/// Multiply two 32-bit integers to create a 32-bit scaled number.
///
/// Implemented with one 64-bit integer multiply.
template <class DigitsT>
inline std::pair<DigitsT, int16_t> getProduct(DigitsT LHS, DigitsT RHS) {
static_assert(!std::numeric_limits<DigitsT>::is_signed, "expected unsigned");
if (getWidth<DigitsT>() <= 32 || (LHS <= UINT32_MAX && RHS <= UINT32_MAX))
return getAdjusted<DigitsT>(uint64_t(LHS) * RHS);
return multiply64(LHS, RHS);
}
/// Convenience helper for 32-bit product.
inline std::pair<uint32_t, int16_t> getProduct32(uint32_t LHS, uint32_t RHS) {
return getProduct(LHS, RHS);
}
/// Convenience helper for 64-bit product.
inline std::pair<uint64_t, int16_t> getProduct64(uint64_t LHS, uint64_t RHS) {
return getProduct(LHS, RHS);
}
/// Divide two 64-bit integers to create a 64-bit scaled number.
///
/// Implemented with long division.
///
/// \pre \c Dividend and \c Divisor are non-zero.
std::pair<uint64_t, int16_t> divide64(uint64_t Dividend, uint64_t Divisor);
/// Divide two 32-bit integers to create a 32-bit scaled number.
///
/// Implemented with one 64-bit integer divide/remainder pair.
///
/// \pre \c Dividend and \c Divisor are non-zero.
std::pair<uint32_t, int16_t> divide32(uint32_t Dividend, uint32_t Divisor);
/// Divide two 32-bit numbers to create a 32-bit scaled number.
///
/// Implemented with one 64-bit integer divide/remainder pair.
///
/// Returns \c (DigitsT_MAX, MaxScale) for divide-by-zero (0 for 0/0).
template <class DigitsT>
std::pair<DigitsT, int16_t> getQuotient(DigitsT Dividend, DigitsT Divisor) {
static_assert(!std::numeric_limits<DigitsT>::is_signed, "expected unsigned");
static_assert(sizeof(DigitsT) == 4 || sizeof(DigitsT) == 8,
"expected 32-bit or 64-bit digits");
// Check for zero.
if (!Dividend)
return std::make_pair(0, 0);
if (!Divisor)
return std::make_pair(std::numeric_limits<DigitsT>::max(), MaxScale);
if (getWidth<DigitsT>() == 64)
return divide64(Dividend, Divisor);
return divide32(Dividend, Divisor);
}
/// Convenience helper for 32-bit quotient.
inline std::pair<uint32_t, int16_t> getQuotient32(uint32_t Dividend,
uint32_t Divisor) {
return getQuotient(Dividend, Divisor);
}
/// Convenience helper for 64-bit quotient.
inline std::pair<uint64_t, int16_t> getQuotient64(uint64_t Dividend,
uint64_t Divisor) {
return getQuotient(Dividend, Divisor);
}
/// Implementation of getLg() and friends.
///
/// Returns the rounded lg of \c Digits*2^Scale and an int specifying whether
/// this was rounded up (1), down (-1), or exact (0).
///
/// Returns \c INT32_MIN when \c Digits is zero.
template <class DigitsT>
inline std::pair<int32_t, int> getLgImpl(DigitsT Digits, int16_t Scale) {
static_assert(!std::numeric_limits<DigitsT>::is_signed, "expected unsigned");
if (!Digits)
return std::make_pair(INT32_MIN, 0);
// Get the floor of the lg of Digits.
static_assert(sizeof(Digits) <= sizeof(uint64_t));
int32_t LocalFloor = llvm::Log2_64(Digits);
// Get the actual floor.
int32_t Floor = Scale + LocalFloor;
if (Digits == UINT64_C(1) << LocalFloor)
return std::make_pair(Floor, 0);
// Round based on the next digit.
assert(LocalFloor >= 1);
bool Round = Digits & UINT64_C(1) << (LocalFloor - 1);
return std::make_pair(Floor + Round, Round ? 1 : -1);
}
/// Get the lg (rounded) of a scaled number.
///
/// Get the lg of \c Digits*2^Scale.
///
/// Returns \c INT32_MIN when \c Digits is zero.
template <class DigitsT> int32_t getLg(DigitsT Digits, int16_t Scale) {
return getLgImpl(Digits, Scale).first;
}
/// Get the lg floor of a scaled number.
///
/// Get the floor of the lg of \c Digits*2^Scale.
///
/// Returns \c INT32_MIN when \c Digits is zero.
template <class DigitsT> int32_t getLgFloor(DigitsT Digits, int16_t Scale) {
auto Lg = getLgImpl(Digits, Scale);
return Lg.first - (Lg.second > 0);
}
/// Get the lg ceiling of a scaled number.
///
/// Get the ceiling of the lg of \c Digits*2^Scale.
///
/// Returns \c INT32_MIN when \c Digits is zero.
template <class DigitsT> int32_t getLgCeiling(DigitsT Digits, int16_t Scale) {
auto Lg = getLgImpl(Digits, Scale);
return Lg.first + (Lg.second < 0);
}
/// Implementation for comparing scaled numbers.
///
/// Compare two 64-bit numbers with different scales. Given that the scale of
/// \c L is higher than that of \c R by \c ScaleDiff, compare them. Return -1,
/// 1, and 0 for less than, greater than, and equal, respectively.
///
/// \pre 0 <= ScaleDiff < 64.
int compareImpl(uint64_t L, uint64_t R, int ScaleDiff);
/// Compare two scaled numbers.
///
/// Compare two scaled numbers. Returns 0 for equal, -1 for less than, and 1
/// for greater than.
template <class DigitsT>
int compare(DigitsT LDigits, int16_t LScale, DigitsT RDigits, int16_t RScale) {
static_assert(!std::numeric_limits<DigitsT>::is_signed, "expected unsigned");
// Check for zero.
if (!LDigits)
return RDigits ? -1 : 0;
if (!RDigits)
return 1;
// Check for the scale. Use getLgFloor to be sure that the scale difference
// is always lower than 64.
int32_t lgL = getLgFloor(LDigits, LScale), lgR = getLgFloor(RDigits, RScale);
if (lgL != lgR)
return lgL < lgR ? -1 : 1;
// Compare digits.
if (LScale < RScale)
return compareImpl(LDigits, RDigits, RScale - LScale);
return -compareImpl(RDigits, LDigits, LScale - RScale);
}
/// Match scales of two numbers.
///
/// Given two scaled numbers, match up their scales. Change the digits and
/// scales in place. Shift the digits as necessary to form equivalent numbers,
/// losing precision only when necessary.
///
/// If the output value of \c LDigits (\c RDigits) is \c 0, the output value of
/// \c LScale (\c RScale) is unspecified.
///
/// As a convenience, returns the matching scale. If the output value of one
/// number is zero, returns the scale of the other. If both are zero, which
/// scale is returned is unspecified.
template <class DigitsT>
int16_t matchScales(DigitsT &LDigits, int16_t &LScale, DigitsT &RDigits,
int16_t &RScale) {
static_assert(!std::numeric_limits<DigitsT>::is_signed, "expected unsigned");
if (LScale < RScale)
// Swap arguments.
return matchScales(RDigits, RScale, LDigits, LScale);
if (!LDigits)
return RScale;
if (!RDigits || LScale == RScale)
return LScale;
// Now LScale > RScale. Get the difference.
int32_t ScaleDiff = int32_t(LScale) - RScale;
if (ScaleDiff >= 2 * getWidth<DigitsT>()) {
// Don't bother shifting. RDigits will get zero-ed out anyway.
RDigits = 0;
return LScale;
}
// Shift LDigits left as much as possible, then shift RDigits right.
int32_t ShiftL = std::min<int32_t>(llvm::countl_zero(LDigits), ScaleDiff);
assert(ShiftL < getWidth<DigitsT>() && "can't shift more than width");
int32_t ShiftR = ScaleDiff - ShiftL;
if (ShiftR >= getWidth<DigitsT>()) {
// Don't bother shifting. RDigits will get zero-ed out anyway.
RDigits = 0;
return LScale;
}
LDigits <<= ShiftL;
RDigits >>= ShiftR;
LScale -= ShiftL;
RScale += ShiftR;
assert(LScale == RScale && "scales should match");
return LScale;
}
/// Get the sum of two scaled numbers.
///
/// Get the sum of two scaled numbers with as much precision as possible.
///
/// \pre Adding 1 to \c LScale (or \c RScale) will not overflow INT16_MAX.
template <class DigitsT>
std::pair<DigitsT, int16_t> getSum(DigitsT LDigits, int16_t LScale,
DigitsT RDigits, int16_t RScale) {
static_assert(!std::numeric_limits<DigitsT>::is_signed, "expected unsigned");
// Check inputs up front. This is only relevant if addition overflows, but
// testing here should catch more bugs.
assert(LScale < INT16_MAX && "scale too large");
assert(RScale < INT16_MAX && "scale too large");
// Normalize digits to match scales.
int16_t Scale = matchScales(LDigits, LScale, RDigits, RScale);
// Compute sum.
DigitsT Sum = LDigits + RDigits;
if (Sum >= RDigits)
return std::make_pair(Sum, Scale);
// Adjust sum after arithmetic overflow.
DigitsT HighBit = DigitsT(1) << (getWidth<DigitsT>() - 1);
return std::make_pair(HighBit | Sum >> 1, Scale + 1);
}
/// Convenience helper for 32-bit sum.
inline std::pair<uint32_t, int16_t> getSum32(uint32_t LDigits, int16_t LScale,
uint32_t RDigits, int16_t RScale) {
return getSum(LDigits, LScale, RDigits, RScale);
}
/// Convenience helper for 64-bit sum.
inline std::pair<uint64_t, int16_t> getSum64(uint64_t LDigits, int16_t LScale,
uint64_t RDigits, int16_t RScale) {
return getSum(LDigits, LScale, RDigits, RScale);
}
/// Get the difference of two scaled numbers.
///
/// Get LHS minus RHS with as much precision as possible.
///
/// Returns \c (0, 0) if the RHS is larger than the LHS.
template <class DigitsT>
std::pair<DigitsT, int16_t> getDifference(DigitsT LDigits, int16_t LScale,
DigitsT RDigits, int16_t RScale) {
static_assert(!std::numeric_limits<DigitsT>::is_signed, "expected unsigned");
// Normalize digits to match scales.
const DigitsT SavedRDigits = RDigits;
const int16_t SavedRScale = RScale;
matchScales(LDigits, LScale, RDigits, RScale);
// Compute difference.
if (LDigits <= RDigits)
return std::make_pair(0, 0);
if (RDigits || !SavedRDigits)
return std::make_pair(LDigits - RDigits, LScale);
// Check if RDigits just barely lost its last bit. E.g., for 32-bit:
//
// 1*2^32 - 1*2^0 == 0xffffffff != 1*2^32
const auto RLgFloor = getLgFloor(SavedRDigits, SavedRScale);
if (!compare(LDigits, LScale, DigitsT(1), RLgFloor + getWidth<DigitsT>()))
return std::make_pair(std::numeric_limits<DigitsT>::max(), RLgFloor);
return std::make_pair(LDigits, LScale);
}
/// Convenience helper for 32-bit difference.
inline std::pair<uint32_t, int16_t> getDifference32(uint32_t LDigits,
int16_t LScale,
uint32_t RDigits,
int16_t RScale) {
return getDifference(LDigits, LScale, RDigits, RScale);
}
/// Convenience helper for 64-bit difference.
inline std::pair<uint64_t, int16_t> getDifference64(uint64_t LDigits,
int16_t LScale,
uint64_t RDigits,
int16_t RScale) {
return getDifference(LDigits, LScale, RDigits, RScale);
}
} // end namespace ScaledNumbers
} // end namespace llvm
namespace llvm {
class raw_ostream;
class ScaledNumberBase {
public:
static constexpr int DefaultPrecision = 10;
static void dump(uint64_t D, int16_t E, int Width);
static raw_ostream &print(raw_ostream &OS, uint64_t D, int16_t E, int Width,
unsigned Precision);
static std::string toString(uint64_t D, int16_t E, int Width,
unsigned Precision);
static int countLeadingZeros32(uint32_t N) { return llvm::countl_zero(N); }
static int countLeadingZeros64(uint64_t N) { return llvm::countl_zero(N); }
static uint64_t getHalf(uint64_t N) { return (N >> 1) + (N & 1); }
static std::pair<uint64_t, bool> splitSigned(int64_t N) {
if (N >= 0)
return std::make_pair(N, false);
uint64_t Unsigned = N == INT64_MIN ? UINT64_C(1) << 63 : uint64_t(-N);
return std::make_pair(Unsigned, true);
}
static int64_t joinSigned(uint64_t U, bool IsNeg) {
if (U > uint64_t(INT64_MAX))
return IsNeg ? INT64_MIN : INT64_MAX;
return IsNeg ? -int64_t(U) : int64_t(U);
}
};
/// Simple representation of a scaled number.
///
/// ScaledNumber is a number represented by digits and a scale. It uses simple
/// saturation arithmetic and every operation is well-defined for every value.
/// It's somewhat similar in behaviour to a soft-float, but is *not* a
/// replacement for one. If you're doing numerics, look at \a APFloat instead.
/// Nevertheless, we've found these semantics useful for modelling certain cost
/// metrics.
///
/// The number is split into a signed scale and unsigned digits. The number
/// represented is \c getDigits()*2^getScale(). In this way, the digits are
/// much like the mantissa in the x87 long double, but there is no canonical
/// form so the same number can be represented by many bit representations.
///
/// ScaledNumber is templated on the underlying integer type for digits, which
/// is expected to be unsigned.
///
/// Unlike APFloat, ScaledNumber does not model architecture floating point
/// behaviour -- while this might make it a little faster and easier to reason
/// about, it certainly makes it more dangerous for general numerics.
///
/// ScaledNumber is totally ordered. However, there is no canonical form, so
/// there are multiple representations of most scalars. E.g.:
///
/// ScaledNumber(8u, 0) == ScaledNumber(4u, 1)
/// ScaledNumber(4u, 1) == ScaledNumber(2u, 2)
/// ScaledNumber(2u, 2) == ScaledNumber(1u, 3)
///
/// ScaledNumber implements most arithmetic operations. Precision is kept
/// where possible. Uses simple saturation arithmetic, so that operations
/// saturate to 0.0 or getLargest() rather than under or overflowing. It has
/// some extra arithmetic for unit inversion. 0.0/0.0 is defined to be 0.0.
/// Any other division by 0.0 is defined to be getLargest().
///
/// As a convenience for modifying the exponent, left and right shifting are
/// both implemented, and both interpret negative shifts as positive shifts in
/// the opposite direction.
///
/// Scales are limited to the range accepted by x87 long double. This makes
/// it trivial to add functionality to convert to APFloat (this is already
/// relied on for the implementation of printing).
///
/// Possible (and conflicting) future directions:
///
/// 1. Turn this into a wrapper around \a APFloat.
/// 2. Share the algorithm implementations with \a APFloat.
/// 3. Allow \a ScaledNumber to represent a signed number.
template <class DigitsT> class ScaledNumber : ScaledNumberBase {
public:
static_assert(!std::numeric_limits<DigitsT>::is_signed,
"only unsigned floats supported");
typedef DigitsT DigitsType;
private:
typedef std::numeric_limits<DigitsType> DigitsLimits;
static constexpr int Width = sizeof(DigitsType) * 8;
static_assert(Width <= 64, "invalid integer width for digits");
private:
DigitsType Digits = 0;
int16_t Scale = 0;
public:
ScaledNumber() = default;
constexpr ScaledNumber(DigitsType Digits, int16_t Scale)
: Digits(Digits), Scale(Scale) {}
private:
ScaledNumber(const std::pair<DigitsT, int16_t> &X)
: Digits(X.first), Scale(X.second) {}
public:
static ScaledNumber getZero() { return ScaledNumber(0, 0); }
static ScaledNumber getOne() { return ScaledNumber(1, 0); }
static ScaledNumber getLargest() {
return ScaledNumber(DigitsLimits::max(), ScaledNumbers::MaxScale);
}
static ScaledNumber get(uint64_t N) { return adjustToWidth(N, 0); }
static ScaledNumber getInverse(uint64_t N) {
return get(N).invert();
}
static ScaledNumber getFraction(DigitsType N, DigitsType D) {
return getQuotient(N, D);
}
int16_t getScale() const { return Scale; }
DigitsType getDigits() const { return Digits; }
/// Convert to the given integer type.
///
/// Convert to \c IntT using simple saturating arithmetic, truncating if
/// necessary.
template <class IntT> IntT toInt() const;
bool isZero() const { return !Digits; }
bool isLargest() const { return *this == getLargest(); }
bool isOne() const {
if (Scale > 0 || Scale <= -Width)
return false;
return Digits == DigitsType(1) << -Scale;
}
/// The log base 2, rounded.
///
/// Get the lg of the scalar. lg 0 is defined to be INT32_MIN.
int32_t lg() const { return ScaledNumbers::getLg(Digits, Scale); }
/// The log base 2, rounded towards INT32_MIN.
///
/// Get the lg floor. lg 0 is defined to be INT32_MIN.
int32_t lgFloor() const { return ScaledNumbers::getLgFloor(Digits, Scale); }
/// The log base 2, rounded towards INT32_MAX.
///
/// Get the lg ceiling. lg 0 is defined to be INT32_MIN.
int32_t lgCeiling() const {
return ScaledNumbers::getLgCeiling(Digits, Scale);
}
bool operator==(const ScaledNumber &X) const { return compare(X) == 0; }
bool operator<(const ScaledNumber &X) const { return compare(X) < 0; }
bool operator!=(const ScaledNumber &X) const { return compare(X) != 0; }
bool operator>(const ScaledNumber &X) const { return compare(X) > 0; }
bool operator<=(const ScaledNumber &X) const { return compare(X) <= 0; }
bool operator>=(const ScaledNumber &X) const { return compare(X) >= 0; }
bool operator!() const { return isZero(); }
/// Convert to a decimal representation in a string.
///
/// Convert to a string. Uses scientific notation for very large/small
/// numbers. Scientific notation is used roughly for numbers outside of the
/// range 2^-64 through 2^64.
///
/// \c Precision indicates the number of decimal digits of precision to use;
/// 0 requests the maximum available.
///
/// As a special case to make debugging easier, if the number is small enough
/// to convert without scientific notation and has more than \c Precision
/// digits before the decimal place, it's printed accurately to the first
/// digit past zero. E.g., assuming 10 digits of precision:
///
/// 98765432198.7654... => 98765432198.8
/// 8765432198.7654... => 8765432198.8
/// 765432198.7654... => 765432198.8
/// 65432198.7654... => 65432198.77
/// 5432198.7654... => 5432198.765
std::string toString(unsigned Precision = DefaultPrecision) {
return ScaledNumberBase::toString(Digits, Scale, Width, Precision);
}
/// Print a decimal representation.
///
/// Print a string. See toString for documentation.
raw_ostream &print(raw_ostream &OS,
unsigned Precision = DefaultPrecision) const {
return ScaledNumberBase::print(OS, Digits, Scale, Width, Precision);
}
void dump() const { return ScaledNumberBase::dump(Digits, Scale, Width); }
ScaledNumber &operator+=(const ScaledNumber &X) {
std::tie(Digits, Scale) =
ScaledNumbers::getSum(Digits, Scale, X.Digits, X.Scale);
// Check for exponent past MaxScale.
if (Scale > ScaledNumbers::MaxScale)
*this = getLargest();
return *this;
}
ScaledNumber &operator-=(const ScaledNumber &X) {
std::tie(Digits, Scale) =
ScaledNumbers::getDifference(Digits, Scale, X.Digits, X.Scale);
return *this;
}
ScaledNumber &operator*=(const ScaledNumber &X);
ScaledNumber &operator/=(const ScaledNumber &X);
ScaledNumber &operator<<=(int16_t Shift) {
shiftLeft(Shift);
return *this;
}
ScaledNumber &operator>>=(int16_t Shift) {
shiftRight(Shift);
return *this;
}
private:
void shiftLeft(int32_t Shift);
void shiftRight(int32_t Shift);
/// Adjust two floats to have matching exponents.
///
/// Adjust \c this and \c X to have matching exponents. Returns the new \c X
/// by value. Does nothing if \a isZero() for either.
///
/// The value that compares smaller will lose precision, and possibly become
/// \a isZero().
ScaledNumber matchScales(ScaledNumber X) {
ScaledNumbers::matchScales(Digits, Scale, X.Digits, X.Scale);
return X;
}
public:
/// Scale a large number accurately.
///
/// Scale N (multiply it by this). Uses full precision multiplication, even
/// if Width is smaller than 64, so information is not lost.
uint64_t scale(uint64_t N) const;
uint64_t scaleByInverse(uint64_t N) const {
// TODO: implement directly, rather than relying on inverse. Inverse is
// expensive.
return inverse().scale(N);
}
int64_t scale(int64_t N) const {
std::pair<uint64_t, bool> Unsigned = splitSigned(N);
return joinSigned(scale(Unsigned.first), Unsigned.second);
}
int64_t scaleByInverse(int64_t N) const {
std::pair<uint64_t, bool> Unsigned = splitSigned(N);
return joinSigned(scaleByInverse(Unsigned.first), Unsigned.second);
}
int compare(const ScaledNumber &X) const {
return ScaledNumbers::compare(Digits, Scale, X.Digits, X.Scale);
}
int compareTo(uint64_t N) const {
return ScaledNumbers::compare<uint64_t>(Digits, Scale, N, 0);
}
int compareTo(int64_t N) const { return N < 0 ? 1 : compareTo(uint64_t(N)); }
ScaledNumber &invert() { return *this = ScaledNumber::get(1) / *this; }
ScaledNumber inverse() const { return ScaledNumber(*this).invert(); }
private:
static ScaledNumber getProduct(DigitsType LHS, DigitsType RHS) {
return ScaledNumbers::getProduct(LHS, RHS);
}
static ScaledNumber getQuotient(DigitsType Dividend, DigitsType Divisor) {
return ScaledNumbers::getQuotient(Dividend, Divisor);
}
static int countLeadingZerosWidth(DigitsType Digits) {
if (Width == 64)
return countLeadingZeros64(Digits);
if (Width == 32)
return countLeadingZeros32(Digits);
return countLeadingZeros32(Digits) + Width - 32;
}
/// Adjust a number to width, rounding up if necessary.
///
/// Should only be called for \c Shift close to zero.
///
/// \pre Shift >= MinScale && Shift + 64 <= MaxScale.
static ScaledNumber adjustToWidth(uint64_t N, int32_t Shift) {
assert(Shift >= ScaledNumbers::MinScale && "Shift should be close to 0");
assert(Shift <= ScaledNumbers::MaxScale - 64 &&
"Shift should be close to 0");
auto Adjusted = ScaledNumbers::getAdjusted<DigitsT>(N, Shift);
return Adjusted;
}
static ScaledNumber getRounded(ScaledNumber P, bool Round) {
// Saturate.
if (P.isLargest())
return P;
return ScaledNumbers::getRounded(P.Digits, P.Scale, Round);
}
};
#define SCALED_NUMBER_BOP(op, base) \
template <class DigitsT> \
ScaledNumber<DigitsT> operator op(const ScaledNumber<DigitsT> &L, \
const ScaledNumber<DigitsT> &R) { \
return ScaledNumber<DigitsT>(L) base R; \
}
SCALED_NUMBER_BOP(+, += )
SCALED_NUMBER_BOP(-, -= )
SCALED_NUMBER_BOP(*, *= )
SCALED_NUMBER_BOP(/, /= )
#undef SCALED_NUMBER_BOP
template <class DigitsT>
ScaledNumber<DigitsT> operator<<(const ScaledNumber<DigitsT> &L,
int16_t Shift) {
return ScaledNumber<DigitsT>(L) <<= Shift;
}
template <class DigitsT>
ScaledNumber<DigitsT> operator>>(const ScaledNumber<DigitsT> &L,
int16_t Shift) {
return ScaledNumber<DigitsT>(L) >>= Shift;
}
template <class DigitsT>
raw_ostream &operator<<(raw_ostream &OS, const ScaledNumber<DigitsT> &X) {
return X.print(OS, 10);
}
#define SCALED_NUMBER_COMPARE_TO_TYPE(op, T1, T2) \
template <class DigitsT> \
bool operator op(const ScaledNumber<DigitsT> &L, T1 R) { \
return L.compareTo(T2(R)) op 0; \
} \
template <class DigitsT> \
bool operator op(T1 L, const ScaledNumber<DigitsT> &R) { \
return 0 op R.compareTo(T2(L)); \
}
#define SCALED_NUMBER_COMPARE_TO(op) \
SCALED_NUMBER_COMPARE_TO_TYPE(op, uint64_t, uint64_t) \
SCALED_NUMBER_COMPARE_TO_TYPE(op, uint32_t, uint64_t) \
SCALED_NUMBER_COMPARE_TO_TYPE(op, int64_t, int64_t) \
SCALED_NUMBER_COMPARE_TO_TYPE(op, int32_t, int64_t)
SCALED_NUMBER_COMPARE_TO(< )
SCALED_NUMBER_COMPARE_TO(> )
SCALED_NUMBER_COMPARE_TO(== )
SCALED_NUMBER_COMPARE_TO(!= )
SCALED_NUMBER_COMPARE_TO(<= )
SCALED_NUMBER_COMPARE_TO(>= )
#undef SCALED_NUMBER_COMPARE_TO
#undef SCALED_NUMBER_COMPARE_TO_TYPE
template <class DigitsT>
uint64_t ScaledNumber<DigitsT>::scale(uint64_t N) const {
if (Width == 64 || N <= DigitsLimits::max())
return (get(N) * *this).template toInt<uint64_t>();
// Defer to the 64-bit version.
return ScaledNumber<uint64_t>(Digits, Scale).scale(N);
}
template <class DigitsT>
template <class IntT>
IntT ScaledNumber<DigitsT>::toInt() const {
typedef std::numeric_limits<IntT> Limits;
if (*this < 1)
return 0;
if (*this >= Limits::max())
return Limits::max();
IntT N = Digits;
if (Scale > 0) {
assert(size_t(Scale) < sizeof(IntT) * 8);
return N << Scale;
}
if (Scale < 0) {
assert(size_t(-Scale) < sizeof(IntT) * 8);
return N >> -Scale;
}
return N;
}
template <class DigitsT>
ScaledNumber<DigitsT> &ScaledNumber<DigitsT>::
operator*=(const ScaledNumber &X) {
if (isZero())
return *this;
if (X.isZero())
return *this = X;
// Save the exponents.
int32_t Scales = int32_t(Scale) + int32_t(X.Scale);
// Get the raw product.
*this = getProduct(Digits, X.Digits);
// Combine with exponents.
return *this <<= Scales;
}
template <class DigitsT>
ScaledNumber<DigitsT> &ScaledNumber<DigitsT>::
operator/=(const ScaledNumber &X) {
if (isZero())
return *this;
if (X.isZero())
return *this = getLargest();
// Save the exponents.
int32_t Scales = int32_t(Scale) - int32_t(X.Scale);
// Get the raw quotient.
*this = getQuotient(Digits, X.Digits);
// Combine with exponents.
return *this <<= Scales;
}
template <class DigitsT> void ScaledNumber<DigitsT>::shiftLeft(int32_t Shift) {
if (!Shift || isZero())
return;
assert(Shift != INT32_MIN);
if (Shift < 0) {
shiftRight(-Shift);
return;
}
// Shift as much as we can in the exponent.
int32_t ScaleShift = std::min(Shift, ScaledNumbers::MaxScale - Scale);
Scale += ScaleShift;
if (ScaleShift == Shift)
return;
// Check this late, since it's rare.
if (isLargest())
return;
// Shift the digits themselves.
Shift -= ScaleShift;
if (Shift > countLeadingZerosWidth(Digits)) {
// Saturate.
*this = getLargest();
return;
}
Digits <<= Shift;
}
template <class DigitsT> void ScaledNumber<DigitsT>::shiftRight(int32_t Shift) {
if (!Shift || isZero())
return;
assert(Shift != INT32_MIN);
if (Shift < 0) {
shiftLeft(-Shift);
return;
}
// Shift as much as we can in the exponent.
int32_t ScaleShift = std::min(Shift, Scale - ScaledNumbers::MinScale);
Scale -= ScaleShift;
if (ScaleShift == Shift)
return;
// Shift the digits themselves.
Shift -= ScaleShift;
if (Shift >= Width) {
// Saturate.
*this = getZero();
return;
}
Digits >>= Shift;
}
} // end namespace llvm
#endif // LLVM_SUPPORT_SCALEDNUMBER_H
PK hwFZzb�&6 6 Support/FormatCommon.hnu �[��� //===- FormatCommon.h - Formatters for common LLVM types --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_FORMATCOMMON_H
#define LLVM_SUPPORT_FORMATCOMMON_H
#include "llvm/ADT/SmallString.h"
#include "llvm/Support/FormatVariadicDetails.h"
#include "llvm/Support/raw_ostream.h"
namespace llvm {
enum class AlignStyle { Left, Center, Right };
struct FmtAlign {
detail::format_adapter &Adapter;
AlignStyle Where;
size_t Amount;
char Fill;
FmtAlign(detail::format_adapter &Adapter, AlignStyle Where, size_t Amount,
char Fill = ' ')
: Adapter(Adapter), Where(Where), Amount(Amount), Fill(Fill) {}
void format(raw_ostream &S, StringRef Options) {
// If we don't need to align, we can format straight into the underlying
// stream. Otherwise we have to go through an intermediate stream first
// in order to calculate how long the output is so we can align it.
// TODO: Make the format method return the number of bytes written, that
// way we can also skip the intermediate stream for left-aligned output.
if (Amount == 0) {
Adapter.format(S, Options);
return;
}
SmallString<64> Item;
raw_svector_ostream Stream(Item);
Adapter.format(Stream, Options);
if (Amount <= Item.size()) {
S << Item;
return;
}
size_t PadAmount = Amount - Item.size();
switch (Where) {
case AlignStyle::Left:
S << Item;
fill(S, PadAmount);
break;
case AlignStyle::Center: {
size_t X = PadAmount / 2;
fill(S, X);
S << Item;
fill(S, PadAmount - X);
break;
}
default:
fill(S, PadAmount);
S << Item;
break;
}
}
private:
void fill(llvm::raw_ostream &S, uint32_t Count) {
for (uint32_t I = 0; I < Count; ++I)
S << Fill;
}
};
}
#endif
PK hwFZ#��C_ C_ Support/MathExtras.hnu �[��� //===-- llvm/Support/MathExtras.h - Useful math functions -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains some functions that are useful for math stuff.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_MATHEXTRAS_H
#define LLVM_SUPPORT_MATHEXTRAS_H
#include "llvm/ADT/bit.h"
#include "llvm/Support/Compiler.h"
#include <cassert>
#include <climits>
#include <cstdint>
#include <cstring>
#include <limits>
#include <type_traits>
namespace llvm {
/// Mathematical constants.
namespace numbers {
// TODO: Track C++20 std::numbers.
// TODO: Favor using the hexadecimal FP constants (requires C++17).
constexpr double e = 2.7182818284590452354, // (0x1.5bf0a8b145749P+1) https://oeis.org/A001113
egamma = .57721566490153286061, // (0x1.2788cfc6fb619P-1) https://oeis.org/A001620
ln2 = .69314718055994530942, // (0x1.62e42fefa39efP-1) https://oeis.org/A002162
ln10 = 2.3025850929940456840, // (0x1.24bb1bbb55516P+1) https://oeis.org/A002392
log2e = 1.4426950408889634074, // (0x1.71547652b82feP+0)
log10e = .43429448190325182765, // (0x1.bcb7b1526e50eP-2)
pi = 3.1415926535897932385, // (0x1.921fb54442d18P+1) https://oeis.org/A000796
inv_pi = .31830988618379067154, // (0x1.45f306bc9c883P-2) https://oeis.org/A049541
sqrtpi = 1.7724538509055160273, // (0x1.c5bf891b4ef6bP+0) https://oeis.org/A002161
inv_sqrtpi = .56418958354775628695, // (0x1.20dd750429b6dP-1) https://oeis.org/A087197
sqrt2 = 1.4142135623730950488, // (0x1.6a09e667f3bcdP+0) https://oeis.org/A00219
inv_sqrt2 = .70710678118654752440, // (0x1.6a09e667f3bcdP-1)
sqrt3 = 1.7320508075688772935, // (0x1.bb67ae8584caaP+0) https://oeis.org/A002194
inv_sqrt3 = .57735026918962576451, // (0x1.279a74590331cP-1)
phi = 1.6180339887498948482; // (0x1.9e3779b97f4a8P+0) https://oeis.org/A001622
constexpr float ef = 2.71828183F, // (0x1.5bf0a8P+1) https://oeis.org/A001113
egammaf = .577215665F, // (0x1.2788d0P-1) https://oeis.org/A001620
ln2f = .693147181F, // (0x1.62e430P-1) https://oeis.org/A002162
ln10f = 2.30258509F, // (0x1.26bb1cP+1) https://oeis.org/A002392
log2ef = 1.44269504F, // (0x1.715476P+0)
log10ef = .434294482F, // (0x1.bcb7b2P-2)
pif = 3.14159265F, // (0x1.921fb6P+1) https://oeis.org/A000796
inv_pif = .318309886F, // (0x1.45f306P-2) https://oeis.org/A049541
sqrtpif = 1.77245385F, // (0x1.c5bf8aP+0) https://oeis.org/A002161
inv_sqrtpif = .564189584F, // (0x1.20dd76P-1) https://oeis.org/A087197
sqrt2f = 1.41421356F, // (0x1.6a09e6P+0) https://oeis.org/A002193
inv_sqrt2f = .707106781F, // (0x1.6a09e6P-1)
sqrt3f = 1.73205081F, // (0x1.bb67aeP+0) https://oeis.org/A002194
inv_sqrt3f = .577350269F, // (0x1.279a74P-1)
phif = 1.61803399F; // (0x1.9e377aP+0) https://oeis.org/A001622
} // namespace numbers
/// Create a bitmask with the N right-most bits set to 1, and all other
/// bits set to 0. Only unsigned types are allowed.
template <typename T> T maskTrailingOnes(unsigned N) {
static_assert(std::is_unsigned_v<T>, "Invalid type!");
const unsigned Bits = CHAR_BIT * sizeof(T);
assert(N <= Bits && "Invalid bit index");
return N == 0 ? 0 : (T(-1) >> (Bits - N));
}
/// Create a bitmask with the N left-most bits set to 1, and all other
/// bits set to 0. Only unsigned types are allowed.
template <typename T> T maskLeadingOnes(unsigned N) {
return ~maskTrailingOnes<T>(CHAR_BIT * sizeof(T) - N);
}
/// Create a bitmask with the N right-most bits set to 0, and all other
/// bits set to 1. Only unsigned types are allowed.
template <typename T> T maskTrailingZeros(unsigned N) {
return maskLeadingOnes<T>(CHAR_BIT * sizeof(T) - N);
}
/// Create a bitmask with the N left-most bits set to 0, and all other
/// bits set to 1. Only unsigned types are allowed.
template <typename T> T maskLeadingZeros(unsigned N) {
return maskTrailingOnes<T>(CHAR_BIT * sizeof(T) - N);
}
/// Macro compressed bit reversal table for 256 bits.
///
/// http://graphics.stanford.edu/~seander/bithacks.html#BitReverseTable
static const unsigned char BitReverseTable256[256] = {
#define R2(n) n, n + 2 * 64, n + 1 * 64, n + 3 * 64
#define R4(n) R2(n), R2(n + 2 * 16), R2(n + 1 * 16), R2(n + 3 * 16)
#define R6(n) R4(n), R4(n + 2 * 4), R4(n + 1 * 4), R4(n + 3 * 4)
R6(0), R6(2), R6(1), R6(3)
#undef R2
#undef R4
#undef R6
};
/// Reverse the bits in \p Val.
template <typename T> T reverseBits(T Val) {
#if __has_builtin(__builtin_bitreverse8)
if constexpr (std::is_same_v<T, uint8_t>)
return __builtin_bitreverse8(Val);
#endif
#if __has_builtin(__builtin_bitreverse16)
if constexpr (std::is_same_v<T, uint16_t>)
return __builtin_bitreverse16(Val);
#endif
#if __has_builtin(__builtin_bitreverse32)
if constexpr (std::is_same_v<T, uint32_t>)
return __builtin_bitreverse32(Val);
#endif
#if __has_builtin(__builtin_bitreverse64)
if constexpr (std::is_same_v<T, uint64_t>)
return __builtin_bitreverse64(Val);
#endif
unsigned char in[sizeof(Val)];
unsigned char out[sizeof(Val)];
std::memcpy(in, &Val, sizeof(Val));
for (unsigned i = 0; i < sizeof(Val); ++i)
out[(sizeof(Val) - i) - 1] = BitReverseTable256[in[i]];
std::memcpy(&Val, out, sizeof(Val));
return Val;
}
// NOTE: The following support functions use the _32/_64 extensions instead of
// type overloading so that signed and unsigned integers can be used without
// ambiguity.
/// Return the high 32 bits of a 64 bit value.
constexpr inline uint32_t Hi_32(uint64_t Value) {
return static_cast<uint32_t>(Value >> 32);
}
/// Return the low 32 bits of a 64 bit value.
constexpr inline uint32_t Lo_32(uint64_t Value) {
return static_cast<uint32_t>(Value);
}
/// Make a 64-bit integer from a high / low pair of 32-bit integers.
constexpr inline uint64_t Make_64(uint32_t High, uint32_t Low) {
return ((uint64_t)High << 32) | (uint64_t)Low;
}
/// Checks if an integer fits into the given bit width.
template <unsigned N> constexpr inline bool isInt(int64_t x) {
if constexpr (N == 8)
return static_cast<int8_t>(x) == x;
if constexpr (N == 16)
return static_cast<int16_t>(x) == x;
if constexpr (N == 32)
return static_cast<int32_t>(x) == x;
if constexpr (N < 64)
return -(INT64_C(1) << (N - 1)) <= x && x < (INT64_C(1) << (N - 1));
(void)x; // MSVC v19.25 warns that x is unused.
return true;
}
/// Checks if a signed integer is an N bit number shifted left by S.
template <unsigned N, unsigned S>
constexpr inline bool isShiftedInt(int64_t x) {
static_assert(
N > 0, "isShiftedInt<0> doesn't make sense (refers to a 0-bit number.");
static_assert(N + S <= 64, "isShiftedInt<N, S> with N + S > 64 is too wide.");
return isInt<N + S>(x) && (x % (UINT64_C(1) << S) == 0);
}
/// Checks if an unsigned integer fits into the given bit width.
template <unsigned N> constexpr inline bool isUInt(uint64_t x) {
static_assert(N > 0, "isUInt<0> doesn't make sense");
if constexpr (N == 8)
return static_cast<uint8_t>(x) == x;
if constexpr (N == 16)
return static_cast<uint16_t>(x) == x;
if constexpr (N == 32)
return static_cast<uint32_t>(x) == x;
if constexpr (N < 64)
return x < (UINT64_C(1) << (N));
(void)x; // MSVC v19.25 warns that x is unused.
return true;
}
/// Checks if a unsigned integer is an N bit number shifted left by S.
template <unsigned N, unsigned S>
constexpr inline bool isShiftedUInt(uint64_t x) {
static_assert(
N > 0, "isShiftedUInt<0> doesn't make sense (refers to a 0-bit number)");
static_assert(N + S <= 64,
"isShiftedUInt<N, S> with N + S > 64 is too wide.");
// Per the two static_asserts above, S must be strictly less than 64. So
// 1 << S is not undefined behavior.
return isUInt<N + S>(x) && (x % (UINT64_C(1) << S) == 0);
}
/// Gets the maximum value for a N-bit unsigned integer.
inline uint64_t maxUIntN(uint64_t N) {
assert(N > 0 && N <= 64 && "integer width out of range");
// uint64_t(1) << 64 is undefined behavior, so we can't do
// (uint64_t(1) << N) - 1
// without checking first that N != 64. But this works and doesn't have a
// branch.
return UINT64_MAX >> (64 - N);
}
/// Gets the minimum value for a N-bit signed integer.
inline int64_t minIntN(int64_t N) {
assert(N > 0 && N <= 64 && "integer width out of range");
return UINT64_C(1) + ~(UINT64_C(1) << (N - 1));
}
/// Gets the maximum value for a N-bit signed integer.
inline int64_t maxIntN(int64_t N) {
assert(N > 0 && N <= 64 && "integer width out of range");
// This relies on two's complement wraparound when N == 64, so we convert to
// int64_t only at the very end to avoid UB.
return (UINT64_C(1) << (N - 1)) - 1;
}
/// Checks if an unsigned integer fits into the given (dynamic) bit width.
inline bool isUIntN(unsigned N, uint64_t x) {
return N >= 64 || x <= maxUIntN(N);
}
/// Checks if an signed integer fits into the given (dynamic) bit width.
inline bool isIntN(unsigned N, int64_t x) {
return N >= 64 || (minIntN(N) <= x && x <= maxIntN(N));
}
/// Return true if the argument is a non-empty sequence of ones starting at the
/// least significant bit with the remainder zero (32 bit version).
/// Ex. isMask_32(0x0000FFFFU) == true.
constexpr inline bool isMask_32(uint32_t Value) {
return Value && ((Value + 1) & Value) == 0;
}
/// Return true if the argument is a non-empty sequence of ones starting at the
/// least significant bit with the remainder zero (64 bit version).
constexpr inline bool isMask_64(uint64_t Value) {
return Value && ((Value + 1) & Value) == 0;
}
/// Return true if the argument contains a non-empty sequence of ones with the
/// remainder zero (32 bit version.) Ex. isShiftedMask_32(0x0000FF00U) == true.
constexpr inline bool isShiftedMask_32(uint32_t Value) {
return Value && isMask_32((Value - 1) | Value);
}
/// Return true if the argument contains a non-empty sequence of ones with the
/// remainder zero (64 bit version.)
constexpr inline bool isShiftedMask_64(uint64_t Value) {
return Value && isMask_64((Value - 1) | Value);
}
/// Return true if the argument is a power of two > 0.
/// Ex. isPowerOf2_32(0x00100000U) == true (32 bit edition.)
constexpr inline bool isPowerOf2_32(uint32_t Value) {
return llvm::has_single_bit(Value);
}
/// Return true if the argument is a power of two > 0 (64 bit edition.)
constexpr inline bool isPowerOf2_64(uint64_t Value) {
return llvm::has_single_bit(Value);
}
/// Return true if the argument contains a non-empty sequence of ones with the
/// remainder zero (32 bit version.) Ex. isShiftedMask_32(0x0000FF00U) == true.
/// If true, \p MaskIdx will specify the index of the lowest set bit and \p
/// MaskLen is updated to specify the length of the mask, else neither are
/// updated.
inline bool isShiftedMask_32(uint32_t Value, unsigned &MaskIdx,
unsigned &MaskLen) {
if (!isShiftedMask_32(Value))
return false;
MaskIdx = llvm::countr_zero(Value);
MaskLen = llvm::popcount(Value);
return true;
}
/// Return true if the argument contains a non-empty sequence of ones with the
/// remainder zero (64 bit version.) If true, \p MaskIdx will specify the index
/// of the lowest set bit and \p MaskLen is updated to specify the length of the
/// mask, else neither are updated.
inline bool isShiftedMask_64(uint64_t Value, unsigned &MaskIdx,
unsigned &MaskLen) {
if (!isShiftedMask_64(Value))
return false;
MaskIdx = llvm::countr_zero(Value);
MaskLen = llvm::popcount(Value);
return true;
}
/// Compile time Log2.
/// Valid only for positive powers of two.
template <size_t kValue> constexpr inline size_t CTLog2() {
static_assert(kValue > 0 && llvm::isPowerOf2_64(kValue),
"Value is not a valid power of 2");
return 1 + CTLog2<kValue / 2>();
}
template <> constexpr inline size_t CTLog2<1>() { return 0; }
/// Return the floor log base 2 of the specified value, -1 if the value is zero.
/// (32 bit edition.)
/// Ex. Log2_32(32) == 5, Log2_32(1) == 0, Log2_32(0) == -1, Log2_32(6) == 2
inline unsigned Log2_32(uint32_t Value) {
return 31 - llvm::countl_zero(Value);
}
/// Return the floor log base 2 of the specified value, -1 if the value is zero.
/// (64 bit edition.)
inline unsigned Log2_64(uint64_t Value) {
return 63 - llvm::countl_zero(Value);
}
/// Return the ceil log base 2 of the specified value, 32 if the value is zero.
/// (32 bit edition).
/// Ex. Log2_32_Ceil(32) == 5, Log2_32_Ceil(1) == 0, Log2_32_Ceil(6) == 3
inline unsigned Log2_32_Ceil(uint32_t Value) {
return 32 - llvm::countl_zero(Value - 1);
}
/// Return the ceil log base 2 of the specified value, 64 if the value is zero.
/// (64 bit edition.)
inline unsigned Log2_64_Ceil(uint64_t Value) {
return 64 - llvm::countl_zero(Value - 1);
}
/// A and B are either alignments or offsets. Return the minimum alignment that
/// may be assumed after adding the two together.
constexpr inline uint64_t MinAlign(uint64_t A, uint64_t B) {
// The largest power of 2 that divides both A and B.
//
// Replace "-Value" by "1+~Value" in the following commented code to avoid
// MSVC warning C4146
// return (A | B) & -(A | B);
return (A | B) & (1 + ~(A | B));
}
/// Returns the next power of two (in 64-bits) that is strictly greater than A.
/// Returns zero on overflow.
constexpr inline uint64_t NextPowerOf2(uint64_t A) {
A |= (A >> 1);
A |= (A >> 2);
A |= (A >> 4);
A |= (A >> 8);
A |= (A >> 16);
A |= (A >> 32);
return A + 1;
}
/// Returns the power of two which is greater than or equal to the given value.
/// Essentially, it is a ceil operation across the domain of powers of two.
inline uint64_t PowerOf2Ceil(uint64_t A) {
if (!A)
return 0;
return NextPowerOf2(A - 1);
}
/// Returns the next integer (mod 2**64) that is greater than or equal to
/// \p Value and is a multiple of \p Align. \p Align must be non-zero.
///
/// Examples:
/// \code
/// alignTo(5, 8) = 8
/// alignTo(17, 8) = 24
/// alignTo(~0LL, 8) = 0
/// alignTo(321, 255) = 510
/// \endcode
inline uint64_t alignTo(uint64_t Value, uint64_t Align) {
assert(Align != 0u && "Align can't be 0.");
return (Value + Align - 1) / Align * Align;
}
inline uint64_t alignToPowerOf2(uint64_t Value, uint64_t Align) {
assert(Align != 0 && (Align & (Align - 1)) == 0 &&
"Align must be a power of 2");
return (Value + Align - 1) & -Align;
}
/// If non-zero \p Skew is specified, the return value will be a minimal integer
/// that is greater than or equal to \p Size and equal to \p A * N + \p Skew for
/// some integer N. If \p Skew is larger than \p A, its value is adjusted to '\p
/// Skew mod \p A'. \p Align must be non-zero.
///
/// Examples:
/// \code
/// alignTo(5, 8, 7) = 7
/// alignTo(17, 8, 1) = 17
/// alignTo(~0LL, 8, 3) = 3
/// alignTo(321, 255, 42) = 552
/// \endcode
inline uint64_t alignTo(uint64_t Value, uint64_t Align, uint64_t Skew) {
assert(Align != 0u && "Align can't be 0.");
Skew %= Align;
return alignTo(Value - Skew, Align) + Skew;
}
/// Returns the next integer (mod 2**64) that is greater than or equal to
/// \p Value and is a multiple of \c Align. \c Align must be non-zero.
template <uint64_t Align> constexpr inline uint64_t alignTo(uint64_t Value) {
static_assert(Align != 0u, "Align must be non-zero");
return (Value + Align - 1) / Align * Align;
}
/// Returns the integer ceil(Numerator / Denominator).
inline uint64_t divideCeil(uint64_t Numerator, uint64_t Denominator) {
return alignTo(Numerator, Denominator) / Denominator;
}
/// Returns the integer nearest(Numerator / Denominator).
inline uint64_t divideNearest(uint64_t Numerator, uint64_t Denominator) {
return (Numerator + (Denominator / 2)) / Denominator;
}
/// Returns the largest uint64_t less than or equal to \p Value and is
/// \p Skew mod \p Align. \p Align must be non-zero
inline uint64_t alignDown(uint64_t Value, uint64_t Align, uint64_t Skew = 0) {
assert(Align != 0u && "Align can't be 0.");
Skew %= Align;
return (Value - Skew) / Align * Align + Skew;
}
/// Sign-extend the number in the bottom B bits of X to a 32-bit integer.
/// Requires 0 < B <= 32.
template <unsigned B> constexpr inline int32_t SignExtend32(uint32_t X) {
static_assert(B > 0, "Bit width can't be 0.");
static_assert(B <= 32, "Bit width out of range.");
return int32_t(X << (32 - B)) >> (32 - B);
}
/// Sign-extend the number in the bottom B bits of X to a 32-bit integer.
/// Requires 0 < B <= 32.
inline int32_t SignExtend32(uint32_t X, unsigned B) {
assert(B > 0 && "Bit width can't be 0.");
assert(B <= 32 && "Bit width out of range.");
return int32_t(X << (32 - B)) >> (32 - B);
}
/// Sign-extend the number in the bottom B bits of X to a 64-bit integer.
/// Requires 0 < B <= 64.
template <unsigned B> constexpr inline int64_t SignExtend64(uint64_t x) {
static_assert(B > 0, "Bit width can't be 0.");
static_assert(B <= 64, "Bit width out of range.");
return int64_t(x << (64 - B)) >> (64 - B);
}
/// Sign-extend the number in the bottom B bits of X to a 64-bit integer.
/// Requires 0 < B <= 64.
inline int64_t SignExtend64(uint64_t X, unsigned B) {
assert(B > 0 && "Bit width can't be 0.");
assert(B <= 64 && "Bit width out of range.");
return int64_t(X << (64 - B)) >> (64 - B);
}
/// Subtract two unsigned integers, X and Y, of type T and return the absolute
/// value of the result.
template <typename T>
std::enable_if_t<std::is_unsigned_v<T>, T> AbsoluteDifference(T X, T Y) {
return X > Y ? (X - Y) : (Y - X);
}
/// Add two unsigned integers, X and Y, of type T. Clamp the result to the
/// maximum representable value of T on overflow. ResultOverflowed indicates if
/// the result is larger than the maximum representable value of type T.
template <typename T>
std::enable_if_t<std::is_unsigned_v<T>, T>
SaturatingAdd(T X, T Y, bool *ResultOverflowed = nullptr) {
bool Dummy;
bool &Overflowed = ResultOverflowed ? *ResultOverflowed : Dummy;
// Hacker's Delight, p. 29
T Z = X + Y;
Overflowed = (Z < X || Z < Y);
if (Overflowed)
return std::numeric_limits<T>::max();
else
return Z;
}
/// Add multiple unsigned integers of type T. Clamp the result to the
/// maximum representable value of T on overflow.
template <class T, class... Ts>
std::enable_if_t<std::is_unsigned_v<T>, T> SaturatingAdd(T X, T Y, T Z,
Ts... Args) {
bool Overflowed = false;
T XY = SaturatingAdd(X, Y, &Overflowed);
if (Overflowed)
return SaturatingAdd(std::numeric_limits<T>::max(), T(1), Args...);
return SaturatingAdd(XY, Z, Args...);
}
/// Multiply two unsigned integers, X and Y, of type T. Clamp the result to the
/// maximum representable value of T on overflow. ResultOverflowed indicates if
/// the result is larger than the maximum representable value of type T.
template <typename T>
std::enable_if_t<std::is_unsigned_v<T>, T>
SaturatingMultiply(T X, T Y, bool *ResultOverflowed = nullptr) {
bool Dummy;
bool &Overflowed = ResultOverflowed ? *ResultOverflowed : Dummy;
// Hacker's Delight, p. 30 has a different algorithm, but we don't use that
// because it fails for uint16_t (where multiplication can have undefined
// behavior due to promotion to int), and requires a division in addition
// to the multiplication.
Overflowed = false;
// Log2(Z) would be either Log2Z or Log2Z + 1.
// Special case: if X or Y is 0, Log2_64 gives -1, and Log2Z
// will necessarily be less than Log2Max as desired.
int Log2Z = Log2_64(X) + Log2_64(Y);
const T Max = std::numeric_limits<T>::max();
int Log2Max = Log2_64(Max);
if (Log2Z < Log2Max) {
return X * Y;
}
if (Log2Z > Log2Max) {
Overflowed = true;
return Max;
}
// We're going to use the top bit, and maybe overflow one
// bit past it. Multiply all but the bottom bit then add
// that on at the end.
T Z = (X >> 1) * Y;
if (Z & ~(Max >> 1)) {
Overflowed = true;
return Max;
}
Z <<= 1;
if (X & 1)
return SaturatingAdd(Z, Y, ResultOverflowed);
return Z;
}
/// Multiply two unsigned integers, X and Y, and add the unsigned integer, A to
/// the product. Clamp the result to the maximum representable value of T on
/// overflow. ResultOverflowed indicates if the result is larger than the
/// maximum representable value of type T.
template <typename T>
std::enable_if_t<std::is_unsigned_v<T>, T>
SaturatingMultiplyAdd(T X, T Y, T A, bool *ResultOverflowed = nullptr) {
bool Dummy;
bool &Overflowed = ResultOverflowed ? *ResultOverflowed : Dummy;
T Product = SaturatingMultiply(X, Y, &Overflowed);
if (Overflowed)
return Product;
return SaturatingAdd(A, Product, &Overflowed);
}
/// Use this rather than HUGE_VALF; the latter causes warnings on MSVC.
extern const float huge_valf;
/// Add two signed integers, computing the two's complement truncated result,
/// returning true if overflow occurred.
template <typename T>
std::enable_if_t<std::is_signed_v<T>, T> AddOverflow(T X, T Y, T &Result) {
#if __has_builtin(__builtin_add_overflow)
return __builtin_add_overflow(X, Y, &Result);
#else
// Perform the unsigned addition.
using U = std::make_unsigned_t<T>;
const U UX = static_cast<U>(X);
const U UY = static_cast<U>(Y);
const U UResult = UX + UY;
// Convert to signed.
Result = static_cast<T>(UResult);
// Adding two positive numbers should result in a positive number.
if (X > 0 && Y > 0)
return Result <= 0;
// Adding two negatives should result in a negative number.
if (X < 0 && Y < 0)
return Result >= 0;
return false;
#endif
}
/// Subtract two signed integers, computing the two's complement truncated
/// result, returning true if an overflow ocurred.
template <typename T>
std::enable_if_t<std::is_signed_v<T>, T> SubOverflow(T X, T Y, T &Result) {
#if __has_builtin(__builtin_sub_overflow)
return __builtin_sub_overflow(X, Y, &Result);
#else
// Perform the unsigned addition.
using U = std::make_unsigned_t<T>;
const U UX = static_cast<U>(X);
const U UY = static_cast<U>(Y);
const U UResult = UX - UY;
// Convert to signed.
Result = static_cast<T>(UResult);
// Subtracting a positive number from a negative results in a negative number.
if (X <= 0 && Y > 0)
return Result >= 0;
// Subtracting a negative number from a positive results in a positive number.
if (X >= 0 && Y < 0)
return Result <= 0;
return false;
#endif
}
/// Multiply two signed integers, computing the two's complement truncated
/// result, returning true if an overflow ocurred.
template <typename T>
std::enable_if_t<std::is_signed_v<T>, T> MulOverflow(T X, T Y, T &Result) {
// Perform the unsigned multiplication on absolute values.
using U = std::make_unsigned_t<T>;
const U UX = X < 0 ? (0 - static_cast<U>(X)) : static_cast<U>(X);
const U UY = Y < 0 ? (0 - static_cast<U>(Y)) : static_cast<U>(Y);
const U UResult = UX * UY;
// Convert to signed.
const bool IsNegative = (X < 0) ^ (Y < 0);
Result = IsNegative ? (0 - UResult) : UResult;
// If any of the args was 0, result is 0 and no overflow occurs.
if (UX == 0 || UY == 0)
return false;
// UX and UY are in [1, 2^n], where n is the number of digits.
// Check how the max allowed absolute value (2^n for negative, 2^(n-1) for
// positive) divided by an argument compares to the other.
if (IsNegative)
return UX > (static_cast<U>(std::numeric_limits<T>::max()) + U(1)) / UY;
else
return UX > (static_cast<U>(std::numeric_limits<T>::max())) / UY;
}
} // End llvm namespace
#endif
PK hwFZ�+�U U Support/AllocatorBase.hnu �[��� //===- AllocatorBase.h - Simple memory allocation abstraction ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
///
/// This file defines MallocAllocator. MallocAllocator conforms to the LLVM
/// "Allocator" concept which consists of an Allocate method accepting a size
/// and alignment, and a Deallocate accepting a pointer and size. Further, the
/// LLVM "Allocator" concept has overloads of Allocate and Deallocate for
/// setting size and alignment based on the final type. These overloads are
/// typically provided by a base class template \c AllocatorBase.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ALLOCATORBASE_H
#define LLVM_SUPPORT_ALLOCATORBASE_H
#ifdef _MSC_VER
#define LLVM_ALLOCATORHOLDER_EMPTYBASE __declspec(empty_bases)
#else
#define LLVM_ALLOCATORHOLDER_EMPTYBASE
#endif // _MSC_VER
#include "llvm/Support/Compiler.h"
#include "llvm/Support/MemAlloc.h"
#include <type_traits>
namespace llvm {
/// CRTP base class providing obvious overloads for the core \c
/// Allocate() methods of LLVM-style allocators.
///
/// This base class both documents the full public interface exposed by all
/// LLVM-style allocators, and redirects all of the overloads to a single core
/// set of methods which the derived class must define.
template <typename DerivedT> class AllocatorBase {
public:
/// Allocate \a Size bytes of \a Alignment aligned memory. This method
/// must be implemented by \c DerivedT.
void *Allocate(size_t Size, size_t Alignment) {
#ifdef __clang__
static_assert(static_cast<void *(AllocatorBase::*)(size_t, size_t)>(
&AllocatorBase::Allocate) !=
static_cast<void *(DerivedT::*)(size_t, size_t)>(
&DerivedT::Allocate),
"Class derives from AllocatorBase without implementing the "
"core Allocate(size_t, size_t) overload!");
#endif
return static_cast<DerivedT *>(this)->Allocate(Size, Alignment);
}
/// Deallocate \a Ptr to \a Size bytes of memory allocated by this
/// allocator.
void Deallocate(const void *Ptr, size_t Size, size_t Alignment) {
#ifdef __clang__
static_assert(
static_cast<void (AllocatorBase::*)(const void *, size_t, size_t)>(
&AllocatorBase::Deallocate) !=
static_cast<void (DerivedT::*)(const void *, size_t, size_t)>(
&DerivedT::Deallocate),
"Class derives from AllocatorBase without implementing the "
"core Deallocate(void *) overload!");
#endif
return static_cast<DerivedT *>(this)->Deallocate(Ptr, Size, Alignment);
}
// The rest of these methods are helpers that redirect to one of the above
// core methods.
/// Allocate space for a sequence of objects without constructing them.
template <typename T> T *Allocate(size_t Num = 1) {
return static_cast<T *>(Allocate(Num * sizeof(T), alignof(T)));
}
/// Deallocate space for a sequence of objects without constructing them.
template <typename T>
std::enable_if_t<!std::is_same_v<std::remove_cv_t<T>, void>, void>
Deallocate(T *Ptr, size_t Num = 1) {
Deallocate(static_cast<const void *>(Ptr), Num * sizeof(T), alignof(T));
}
};
class MallocAllocator : public AllocatorBase<MallocAllocator> {
public:
void Reset() {}
LLVM_ATTRIBUTE_RETURNS_NONNULL void *Allocate(size_t Size, size_t Alignment) {
return allocate_buffer(Size, Alignment);
}
// Pull in base class overloads.
using AllocatorBase<MallocAllocator>::Allocate;
void Deallocate(const void *Ptr, size_t Size, size_t Alignment) {
deallocate_buffer(const_cast<void *>(Ptr), Size, Alignment);
}
// Pull in base class overloads.
using AllocatorBase<MallocAllocator>::Deallocate;
void PrintStats() const {}
};
namespace detail {
template <typename Alloc> class AllocatorHolder : Alloc {
public:
AllocatorHolder() = default;
AllocatorHolder(const Alloc &A) : Alloc(A) {}
AllocatorHolder(Alloc &&A) : Alloc(static_cast<Alloc &&>(A)) {}
Alloc &getAllocator() { return *this; }
const Alloc &getAllocator() const { return *this; }
};
template <typename Alloc> class AllocatorHolder<Alloc &> {
Alloc &A;
public:
AllocatorHolder(Alloc &A) : A(A) {}
Alloc &getAllocator() { return A; }
const Alloc &getAllocator() const { return A; }
};
} // namespace detail
} // namespace llvm
#endif // LLVM_SUPPORT_ALLOCATORBASE_H
PK hwFZ��
֢ ֢ Support/VirtualFileSystem.hnu �[��� //===- VirtualFileSystem.h - Virtual File System Layer ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file
/// Defines the virtual file system interface vfs::FileSystem.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_VIRTUALFILESYSTEM_H
#define LLVM_SUPPORT_VIRTUALFILESYSTEM_H
#include "llvm/ADT/IntrusiveRefCntPtr.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/STLFunctionalExtras.h"
#include "llvm/Support/Chrono.h"
#include "llvm/Support/ErrorOr.h"
#include "llvm/Support/Errc.h"
#include "llvm/Support/FileSystem.h"
#include "llvm/Support/Path.h"
#include "llvm/Support/SourceMgr.h"
#include <cassert>
#include <cstdint>
#include <ctime>
#include <memory>
#include <optional>
#include <stack>
#include <string>
#include <system_error>
#include <utility>
#include <vector>
namespace llvm {
class MemoryBuffer;
class MemoryBufferRef;
class Twine;
namespace vfs {
/// The result of a \p status operation.
class Status {
std::string Name;
llvm::sys::fs::UniqueID UID;
llvm::sys::TimePoint<> MTime;
uint32_t User;
uint32_t Group;
uint64_t Size;
llvm::sys::fs::file_type Type = llvm::sys::fs::file_type::status_error;
llvm::sys::fs::perms Perms;
public:
// FIXME: remove when files support multiple names
bool IsVFSMapped = false;
/// Whether this entity has an external path different from the virtual path,
/// and the external path is exposed by leaking it through the abstraction.
/// For example, a RedirectingFileSystem will set this for paths where
/// UseExternalName is true.
///
/// FIXME: Currently the external path is exposed by replacing the virtual
/// path in this Status object. Instead, we should leave the path in the
/// Status intact (matching the requested virtual path) - see
/// FileManager::getFileRef for how how we plan to fix this.
bool ExposesExternalVFSPath = false;
Status() = default;
Status(const llvm::sys::fs::file_status &Status);
Status(const Twine &Name, llvm::sys::fs::UniqueID UID,
llvm::sys::TimePoint<> MTime, uint32_t User, uint32_t Group,
uint64_t Size, llvm::sys::fs::file_type Type,
llvm::sys::fs::perms Perms);
/// Get a copy of a Status with a different size.
static Status copyWithNewSize(const Status &In, uint64_t NewSize);
/// Get a copy of a Status with a different name.
static Status copyWithNewName(const Status &In, const Twine &NewName);
static Status copyWithNewName(const llvm::sys::fs::file_status &In,
const Twine &NewName);
/// Returns the name that should be used for this file or directory.
StringRef getName() const { return Name; }
/// @name Status interface from llvm::sys::fs
/// @{
llvm::sys::fs::file_type getType() const { return Type; }
llvm::sys::fs::perms getPermissions() const { return Perms; }
llvm::sys::TimePoint<> getLastModificationTime() const { return MTime; }
llvm::sys::fs::UniqueID getUniqueID() const { return UID; }
uint32_t getUser() const { return User; }
uint32_t getGroup() const { return Group; }
uint64_t getSize() const { return Size; }
/// @}
/// @name Status queries
/// These are static queries in llvm::sys::fs.
/// @{
bool equivalent(const Status &Other) const;
bool isDirectory() const;
bool isRegularFile() const;
bool isOther() const;
bool isSymlink() const;
bool isStatusKnown() const;
bool exists() const;
/// @}
};
/// Represents an open file.
class File {
public:
/// Destroy the file after closing it (if open).
/// Sub-classes should generally call close() inside their destructors. We
/// cannot do that from the base class, since close is virtual.
virtual ~File();
/// Get the status of the file.
virtual llvm::ErrorOr<Status> status() = 0;
/// Get the name of the file
virtual llvm::ErrorOr<std::string> getName() {
if (auto Status = status())
return Status->getName().str();
else
return Status.getError();
}
/// Get the contents of the file as a \p MemoryBuffer.
virtual llvm::ErrorOr<std::unique_ptr<llvm::MemoryBuffer>>
getBuffer(const Twine &Name, int64_t FileSize = -1,
bool RequiresNullTerminator = true, bool IsVolatile = false) = 0;
/// Closes the file.
virtual std::error_code close() = 0;
// Get the same file with a different path.
static ErrorOr<std::unique_ptr<File>>
getWithPath(ErrorOr<std::unique_ptr<File>> Result, const Twine &P);
protected:
// Set the file's underlying path.
virtual void setPath(const Twine &Path) {}
};
/// A member of a directory, yielded by a directory_iterator.
/// Only information available on most platforms is included.
class directory_entry {
std::string Path;
llvm::sys::fs::file_type Type = llvm::sys::fs::file_type::type_unknown;
public:
directory_entry() = default;
directory_entry(std::string Path, llvm::sys::fs::file_type Type)
: Path(std::move(Path)), Type(Type) {}
llvm::StringRef path() const { return Path; }
llvm::sys::fs::file_type type() const { return Type; }
};
namespace detail {
/// An interface for virtual file systems to provide an iterator over the
/// (non-recursive) contents of a directory.
struct DirIterImpl {
virtual ~DirIterImpl();
/// Sets \c CurrentEntry to the next entry in the directory on success,
/// to directory_entry() at end, or returns a system-defined \c error_code.
virtual std::error_code increment() = 0;
directory_entry CurrentEntry;
};
} // namespace detail
/// An input iterator over the entries in a virtual path, similar to
/// llvm::sys::fs::directory_iterator.
class directory_iterator {
std::shared_ptr<detail::DirIterImpl> Impl; // Input iterator semantics on copy
public:
directory_iterator(std::shared_ptr<detail::DirIterImpl> I)
: Impl(std::move(I)) {
assert(Impl.get() != nullptr && "requires non-null implementation");
if (Impl->CurrentEntry.path().empty())
Impl.reset(); // Normalize the end iterator to Impl == nullptr.
}
/// Construct an 'end' iterator.
directory_iterator() = default;
/// Equivalent to operator++, with an error code.
directory_iterator &increment(std::error_code &EC) {
assert(Impl && "attempting to increment past end");
EC = Impl->increment();
if (Impl->CurrentEntry.path().empty())
Impl.reset(); // Normalize the end iterator to Impl == nullptr.
return *this;
}
const directory_entry &operator*() const { return Impl->CurrentEntry; }
const directory_entry *operator->() const { return &Impl->CurrentEntry; }
bool operator==(const directory_iterator &RHS) const {
if (Impl && RHS.Impl)
return Impl->CurrentEntry.path() == RHS.Impl->CurrentEntry.path();
return !Impl && !RHS.Impl;
}
bool operator!=(const directory_iterator &RHS) const {
return !(*this == RHS);
}
};
class FileSystem;
namespace detail {
/// Keeps state for the recursive_directory_iterator.
struct RecDirIterState {
std::stack<directory_iterator, std::vector<directory_iterator>> Stack;
bool HasNoPushRequest = false;
};
} // end namespace detail
/// An input iterator over the recursive contents of a virtual path,
/// similar to llvm::sys::fs::recursive_directory_iterator.
class recursive_directory_iterator {
FileSystem *FS;
std::shared_ptr<detail::RecDirIterState>
State; // Input iterator semantics on copy.
public:
recursive_directory_iterator(FileSystem &FS, const Twine &Path,
std::error_code &EC);
/// Construct an 'end' iterator.
recursive_directory_iterator() = default;
/// Equivalent to operator++, with an error code.
recursive_directory_iterator &increment(std::error_code &EC);
const directory_entry &operator*() const { return *State->Stack.top(); }
const directory_entry *operator->() const { return &*State->Stack.top(); }
bool operator==(const recursive_directory_iterator &Other) const {
return State == Other.State; // identity
}
bool operator!=(const recursive_directory_iterator &RHS) const {
return !(*this == RHS);
}
/// Gets the current level. Starting path is at level 0.
int level() const {
assert(!State->Stack.empty() &&
"Cannot get level without any iteration state");
return State->Stack.size() - 1;
}
void no_push() { State->HasNoPushRequest = true; }
};
/// The virtual file system interface.
class FileSystem : public llvm::ThreadSafeRefCountedBase<FileSystem> {
public:
virtual ~FileSystem();
/// Get the status of the entry at \p Path, if one exists.
virtual llvm::ErrorOr<Status> status(const Twine &Path) = 0;
/// Get a \p File object for the file at \p Path, if one exists.
virtual llvm::ErrorOr<std::unique_ptr<File>>
openFileForRead(const Twine &Path) = 0;
/// This is a convenience method that opens a file, gets its content and then
/// closes the file.
llvm::ErrorOr<std::unique_ptr<llvm::MemoryBuffer>>
getBufferForFile(const Twine &Name, int64_t FileSize = -1,
bool RequiresNullTerminator = true, bool IsVolatile = false);
/// Get a directory_iterator for \p Dir.
/// \note The 'end' iterator is directory_iterator().
virtual directory_iterator dir_begin(const Twine &Dir,
std::error_code &EC) = 0;
/// Set the working directory. This will affect all following operations on
/// this file system and may propagate down for nested file systems.
virtual std::error_code setCurrentWorkingDirectory(const Twine &Path) = 0;
/// Get the working directory of this file system.
virtual llvm::ErrorOr<std::string> getCurrentWorkingDirectory() const = 0;
/// Gets real path of \p Path e.g. collapse all . and .. patterns, resolve
/// symlinks. For real file system, this uses `llvm::sys::fs::real_path`.
/// This returns errc::operation_not_permitted if not implemented by subclass.
virtual std::error_code getRealPath(const Twine &Path,
SmallVectorImpl<char> &Output) const;
/// Check whether a file exists. Provided for convenience.
bool exists(const Twine &Path);
/// Is the file mounted on a local filesystem?
virtual std::error_code isLocal(const Twine &Path, bool &Result);
/// Make \a Path an absolute path.
///
/// Makes \a Path absolute using the current directory if it is not already.
/// An empty \a Path will result in the current directory.
///
/// /absolute/path => /absolute/path
/// relative/../path => <current-directory>/relative/../path
///
/// \param Path A path that is modified to be an absolute path.
/// \returns success if \a path has been made absolute, otherwise a
/// platform-specific error_code.
virtual std::error_code makeAbsolute(SmallVectorImpl<char> &Path) const;
enum class PrintType { Summary, Contents, RecursiveContents };
void print(raw_ostream &OS, PrintType Type = PrintType::Contents,
unsigned IndentLevel = 0) const {
printImpl(OS, Type, IndentLevel);
}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD void dump() const;
#endif
protected:
virtual void printImpl(raw_ostream &OS, PrintType Type,
unsigned IndentLevel) const {
printIndent(OS, IndentLevel);
OS << "FileSystem\n";
}
void printIndent(raw_ostream &OS, unsigned IndentLevel) const {
for (unsigned i = 0; i < IndentLevel; ++i)
OS << " ";
}
};
/// Gets an \p vfs::FileSystem for the 'real' file system, as seen by
/// the operating system.
/// The working directory is linked to the process's working directory.
/// (This is usually thread-hostile).
IntrusiveRefCntPtr<FileSystem> getRealFileSystem();
/// Create an \p vfs::FileSystem for the 'real' file system, as seen by
/// the operating system.
/// It has its own working directory, independent of (but initially equal to)
/// that of the process.
std::unique_ptr<FileSystem> createPhysicalFileSystem();
/// A file system that allows overlaying one \p AbstractFileSystem on top
/// of another.
///
/// Consists of a stack of >=1 \p FileSystem objects, which are treated as being
/// one merged file system. When there is a directory that exists in more than
/// one file system, the \p OverlayFileSystem contains a directory containing
/// the union of their contents. The attributes (permissions, etc.) of the
/// top-most (most recently added) directory are used. When there is a file
/// that exists in more than one file system, the file in the top-most file
/// system overrides the other(s).
class OverlayFileSystem : public FileSystem {
using FileSystemList = SmallVector<IntrusiveRefCntPtr<FileSystem>, 1>;
/// The stack of file systems, implemented as a list in order of
/// their addition.
FileSystemList FSList;
public:
OverlayFileSystem(IntrusiveRefCntPtr<FileSystem> Base);
/// Pushes a file system on top of the stack.
void pushOverlay(IntrusiveRefCntPtr<FileSystem> FS);
llvm::ErrorOr<Status> status(const Twine &Path) override;
llvm::ErrorOr<std::unique_ptr<File>>
openFileForRead(const Twine &Path) override;
directory_iterator dir_begin(const Twine &Dir, std::error_code &EC) override;
llvm::ErrorOr<std::string> getCurrentWorkingDirectory() const override;
std::error_code setCurrentWorkingDirectory(const Twine &Path) override;
std::error_code isLocal(const Twine &Path, bool &Result) override;
std::error_code getRealPath(const Twine &Path,
SmallVectorImpl<char> &Output) const override;
using iterator = FileSystemList::reverse_iterator;
using const_iterator = FileSystemList::const_reverse_iterator;
using reverse_iterator = FileSystemList::iterator;
using const_reverse_iterator = FileSystemList::const_iterator;
using range = iterator_range<iterator>;
using const_range = iterator_range<const_iterator>;
/// Get an iterator pointing to the most recently added file system.
iterator overlays_begin() { return FSList.rbegin(); }
const_iterator overlays_begin() const { return FSList.rbegin(); }
/// Get an iterator pointing one-past the least recently added file system.
iterator overlays_end() { return FSList.rend(); }
const_iterator overlays_end() const { return FSList.rend(); }
/// Get an iterator pointing to the least recently added file system.
reverse_iterator overlays_rbegin() { return FSList.begin(); }
const_reverse_iterator overlays_rbegin() const { return FSList.begin(); }
/// Get an iterator pointing one-past the most recently added file system.
reverse_iterator overlays_rend() { return FSList.end(); }
const_reverse_iterator overlays_rend() const { return FSList.end(); }
range overlays_range() { return llvm::reverse(FSList); }
const_range overlays_range() const { return llvm::reverse(FSList); }
protected:
void printImpl(raw_ostream &OS, PrintType Type,
unsigned IndentLevel) const override;
};
/// By default, this delegates all calls to the underlying file system. This
/// is useful when derived file systems want to override some calls and still
/// proxy other calls.
class ProxyFileSystem : public FileSystem {
public:
explicit ProxyFileSystem(IntrusiveRefCntPtr<FileSystem> FS)
: FS(std::move(FS)) {}
llvm::ErrorOr<Status> status(const Twine &Path) override {
return FS->status(Path);
}
llvm::ErrorOr<std::unique_ptr<File>>
openFileForRead(const Twine &Path) override {
return FS->openFileForRead(Path);
}
directory_iterator dir_begin(const Twine &Dir, std::error_code &EC) override {
return FS->dir_begin(Dir, EC);
}
llvm::ErrorOr<std::string> getCurrentWorkingDirectory() const override {
return FS->getCurrentWorkingDirectory();
}
std::error_code setCurrentWorkingDirectory(const Twine &Path) override {
return FS->setCurrentWorkingDirectory(Path);
}
std::error_code getRealPath(const Twine &Path,
SmallVectorImpl<char> &Output) const override {
return FS->getRealPath(Path, Output);
}
std::error_code isLocal(const Twine &Path, bool &Result) override {
return FS->isLocal(Path, Result);
}
protected:
FileSystem &getUnderlyingFS() const { return *FS; }
private:
IntrusiveRefCntPtr<FileSystem> FS;
virtual void anchor();
};
namespace detail {
class InMemoryDirectory;
class InMemoryNode;
struct NewInMemoryNodeInfo {
llvm::sys::fs::UniqueID DirUID;
StringRef Path;
StringRef Name;
time_t ModificationTime;
std::unique_ptr<llvm::MemoryBuffer> Buffer;
uint32_t User;
uint32_t Group;
llvm::sys::fs::file_type Type;
llvm::sys::fs::perms Perms;
Status makeStatus() const;
};
class NamedNodeOrError {
ErrorOr<std::pair<llvm::SmallString<128>, const detail::InMemoryNode *>>
Value;
public:
NamedNodeOrError(llvm::SmallString<128> Name,
const detail::InMemoryNode *Node)
: Value(std::make_pair(Name, Node)) {}
NamedNodeOrError(std::error_code EC) : Value(EC) {}
NamedNodeOrError(llvm::errc EC) : Value(EC) {}
StringRef getName() const { return (*Value).first; }
explicit operator bool() const { return static_cast<bool>(Value); }
operator std::error_code() const { return Value.getError(); }
std::error_code getError() const { return Value.getError(); }
const detail::InMemoryNode *operator*() const { return (*Value).second; }
};
} // namespace detail
/// An in-memory file system.
class InMemoryFileSystem : public FileSystem {
std::unique_ptr<detail::InMemoryDirectory> Root;
std::string WorkingDirectory;
bool UseNormalizedPaths = true;
using MakeNodeFn = llvm::function_ref<std::unique_ptr<detail::InMemoryNode>(
detail::NewInMemoryNodeInfo)>;
/// Create node with \p MakeNode and add it into this filesystem at \p Path.
bool addFile(const Twine &Path, time_t ModificationTime,
std::unique_ptr<llvm::MemoryBuffer> Buffer,
std::optional<uint32_t> User, std::optional<uint32_t> Group,
std::optional<llvm::sys::fs::file_type> Type,
std::optional<llvm::sys::fs::perms> Perms, MakeNodeFn MakeNode);
/// Looks up the in-memory node for the path \p P.
/// If \p FollowFinalSymlink is true, the returned node is guaranteed to
/// not be a symlink and its path may differ from \p P.
detail::NamedNodeOrError lookupNode(const Twine &P, bool FollowFinalSymlink,
size_t SymlinkDepth = 0) const;
class DirIterator;
public:
explicit InMemoryFileSystem(bool UseNormalizedPaths = true);
~InMemoryFileSystem() override;
/// Add a file containing a buffer or a directory to the VFS with a
/// path. The VFS owns the buffer. If present, User, Group, Type
/// and Perms apply to the newly-created file or directory.
/// \return true if the file or directory was successfully added,
/// false if the file or directory already exists in the file system with
/// different contents.
bool addFile(const Twine &Path, time_t ModificationTime,
std::unique_ptr<llvm::MemoryBuffer> Buffer,
std::optional<uint32_t> User = std::nullopt,
std::optional<uint32_t> Group = std::nullopt,
std::optional<llvm::sys::fs::file_type> Type = std::nullopt,
std::optional<llvm::sys::fs::perms> Perms = std::nullopt);
/// Add a hard link to a file.
///
/// Here hard links are not intended to be fully equivalent to the classical
/// filesystem. Both the hard link and the file share the same buffer and
/// status (and thus have the same UniqueID). Because of this there is no way
/// to distinguish between the link and the file after the link has been
/// added.
///
/// The \p Target path must be an existing file or a hardlink. The
/// \p NewLink file must not have been added before. The \p Target
/// path must not be a directory. The \p NewLink node is added as a hard
/// link which points to the resolved file of \p Target node.
/// \return true if the above condition is satisfied and hardlink was
/// successfully created, false otherwise.
bool addHardLink(const Twine &NewLink, const Twine &Target);
/// Arbitrary max depth to search through symlinks. We can get into problems
/// if a link links to a link that links back to the link, for example.
static constexpr size_t MaxSymlinkDepth = 16;
/// Add a symbolic link. Unlike a HardLink, because \p Target doesn't need
/// to refer to a file (or refer to anything, as it happens). Also, an
/// in-memory directory for \p Target isn't automatically created.
bool
addSymbolicLink(const Twine &NewLink, const Twine &Target,
time_t ModificationTime,
std::optional<uint32_t> User = std::nullopt,
std::optional<uint32_t> Group = std::nullopt,
std::optional<llvm::sys::fs::perms> Perms = std::nullopt);
/// Add a buffer to the VFS with a path. The VFS does not own the buffer.
/// If present, User, Group, Type and Perms apply to the newly-created file
/// or directory.
/// \return true if the file or directory was successfully added,
/// false if the file or directory already exists in the file system with
/// different contents.
bool addFileNoOwn(const Twine &Path, time_t ModificationTime,
const llvm::MemoryBufferRef &Buffer,
std::optional<uint32_t> User = std::nullopt,
std::optional<uint32_t> Group = std::nullopt,
std::optional<llvm::sys::fs::file_type> Type = std::nullopt,
std::optional<llvm::sys::fs::perms> Perms = std::nullopt);
std::string toString() const;
/// Return true if this file system normalizes . and .. in paths.
bool useNormalizedPaths() const { return UseNormalizedPaths; }
llvm::ErrorOr<Status> status(const Twine &Path) override;
llvm::ErrorOr<std::unique_ptr<File>>
openFileForRead(const Twine &Path) override;
directory_iterator dir_begin(const Twine &Dir, std::error_code &EC) override;
llvm::ErrorOr<std::string> getCurrentWorkingDirectory() const override {
return WorkingDirectory;
}
/// Canonicalizes \p Path by combining with the current working
/// directory and normalizing the path (e.g. remove dots). If the current
/// working directory is not set, this returns errc::operation_not_permitted.
///
/// This doesn't resolve symlinks as they are not supported in in-memory file
/// system.
std::error_code getRealPath(const Twine &Path,
SmallVectorImpl<char> &Output) const override;
std::error_code isLocal(const Twine &Path, bool &Result) override;
std::error_code setCurrentWorkingDirectory(const Twine &Path) override;
protected:
void printImpl(raw_ostream &OS, PrintType Type,
unsigned IndentLevel) const override;
};
/// Get a globally unique ID for a virtual file or directory.
llvm::sys::fs::UniqueID getNextVirtualUniqueID();
/// Gets a \p FileSystem for a virtual file system described in YAML
/// format.
std::unique_ptr<FileSystem>
getVFSFromYAML(std::unique_ptr<llvm::MemoryBuffer> Buffer,
llvm::SourceMgr::DiagHandlerTy DiagHandler,
StringRef YAMLFilePath, void *DiagContext = nullptr,
IntrusiveRefCntPtr<FileSystem> ExternalFS = getRealFileSystem());
struct YAMLVFSEntry {
template <typename T1, typename T2>
YAMLVFSEntry(T1 &&VPath, T2 &&RPath, bool IsDirectory = false)
: VPath(std::forward<T1>(VPath)), RPath(std::forward<T2>(RPath)),
IsDirectory(IsDirectory) {}
std::string VPath;
std::string RPath;
bool IsDirectory = false;
};
class RedirectingFSDirIterImpl;
class RedirectingFileSystemParser;
/// A virtual file system parsed from a YAML file.
///
/// Currently, this class allows creating virtual files and directories. Virtual
/// files map to existing external files in \c ExternalFS, and virtual
/// directories may either map to existing directories in \c ExternalFS or list
/// their contents in the form of other virtual directories and/or files.
///
/// The basic structure of the parsed file is:
/// \verbatim
/// {
/// 'version': <version number>,
/// <optional configuration>
/// 'roots': [
/// <directory entries>
/// ]
/// }
/// \endverbatim
///
/// The roots may be absolute or relative. If relative they will be made
/// absolute against either current working directory or the directory where
/// the Overlay YAML file is located, depending on the 'root-relative'
/// configuration.
///
/// All configuration options are optional.
/// 'case-sensitive': <boolean, default=(true for Posix, false for Windows)>
/// 'use-external-names': <boolean, default=true>
/// 'root-relative': <string, one of 'cwd' or 'overlay-dir', default='cwd'>
/// 'overlay-relative': <boolean, default=false>
/// 'fallthrough': <boolean, default=true, deprecated - use 'redirecting-with'
/// instead>
/// 'redirecting-with': <string, one of 'fallthrough', 'fallback', or
/// 'redirect-only', default='fallthrough'>
///
/// To clarify, 'root-relative' option will prepend the current working
/// directory, or the overlay directory to the 'roots->name' field only if
/// 'roots->name' is a relative path. On the other hand, when 'overlay-relative'
/// is set to 'true', external paths will always be prepended with the overlay
/// directory, even if external paths are not relative paths. The
/// 'root-relative' option has no interaction with the 'overlay-relative'
/// option.
///
/// Virtual directories that list their contents are represented as
/// \verbatim
/// {
/// 'type': 'directory',
/// 'name': <string>,
/// 'contents': [ <file or directory entries> ]
/// }
/// \endverbatim
///
/// The default attributes for such virtual directories are:
/// \verbatim
/// MTime = now() when created
/// Perms = 0777
/// User = Group = 0
/// Size = 0
/// UniqueID = unspecified unique value
/// \endverbatim
///
/// When a path prefix matches such a directory, the next component in the path
/// is matched against the entries in the 'contents' array.
///
/// Re-mapped directories, on the other hand, are represented as
/// /// \verbatim
/// {
/// 'type': 'directory-remap',
/// 'name': <string>,
/// 'use-external-name': <boolean>, # Optional
/// 'external-contents': <path to external directory>
/// }
/// \endverbatim
///
/// and inherit their attributes from the external directory. When a path
/// prefix matches such an entry, the unmatched components are appended to the
/// 'external-contents' path, and the resulting path is looked up in the
/// external file system instead.
///
/// Re-mapped files are represented as
/// \verbatim
/// {
/// 'type': 'file',
/// 'name': <string>,
/// 'use-external-name': <boolean>, # Optional
/// 'external-contents': <path to external file>
/// }
/// \endverbatim
///
/// Their attributes and file contents are determined by looking up the file at
/// their 'external-contents' path in the external file system.
///
/// For 'file', 'directory' and 'directory-remap' entries the 'name' field may
/// contain multiple path components (e.g. /path/to/file). However, any
/// directory in such a path that contains more than one child must be uniquely
/// represented by a 'directory' entry.
///
/// When the 'use-external-name' field is set, calls to \a vfs::File::status()
/// give the external (remapped) filesystem name instead of the name the file
/// was accessed by. This is an intentional leak through the \a
/// RedirectingFileSystem abstraction layer. It enables clients to discover
/// (and use) the external file location when communicating with users or tools
/// that don't use the same VFS overlay.
///
/// FIXME: 'use-external-name' causes behaviour that's inconsistent with how
/// "real" filesystems behave. Maybe there should be a separate channel for
/// this information.
class RedirectingFileSystem : public vfs::FileSystem {
public:
enum EntryKind { EK_Directory, EK_DirectoryRemap, EK_File };
enum NameKind { NK_NotSet, NK_External, NK_Virtual };
/// The type of redirection to perform.
enum class RedirectKind {
/// Lookup the redirected path first (ie. the one specified in
/// 'external-contents') and if that fails "fallthrough" to a lookup of the
/// originally provided path.
Fallthrough,
/// Lookup the provided path first and if that fails, "fallback" to a
/// lookup of the redirected path.
Fallback,
/// Only lookup the redirected path, do not lookup the originally provided
/// path.
RedirectOnly
};
/// The type of relative path used by Roots.
enum class RootRelativeKind {
/// The roots are relative to the current working directory.
CWD,
/// The roots are relative to the directory where the Overlay YAML file
// locates.
OverlayDir
};
/// A single file or directory in the VFS.
class Entry {
EntryKind Kind;
std::string Name;
public:
Entry(EntryKind K, StringRef Name) : Kind(K), Name(Name) {}
virtual ~Entry() = default;
StringRef getName() const { return Name; }
EntryKind getKind() const { return Kind; }
};
/// A directory in the vfs with explicitly specified contents.
class DirectoryEntry : public Entry {
std::vector<std::unique_ptr<Entry>> Contents;
Status S;
public:
/// Constructs a directory entry with explicitly specified contents.
DirectoryEntry(StringRef Name, std::vector<std::unique_ptr<Entry>> Contents,
Status S)
: Entry(EK_Directory, Name), Contents(std::move(Contents)),
S(std::move(S)) {}
/// Constructs an empty directory entry.
DirectoryEntry(StringRef Name, Status S)
: Entry(EK_Directory, Name), S(std::move(S)) {}
Status getStatus() { return S; }
void addContent(std::unique_ptr<Entry> Content) {
Contents.push_back(std::move(Content));
}
Entry *getLastContent() const { return Contents.back().get(); }
using iterator = decltype(Contents)::iterator;
iterator contents_begin() { return Contents.begin(); }
iterator contents_end() { return Contents.end(); }
static bool classof(const Entry *E) { return E->getKind() == EK_Directory; }
};
/// A file or directory in the vfs that is mapped to a file or directory in
/// the external filesystem.
class RemapEntry : public Entry {
std::string ExternalContentsPath;
NameKind UseName;
protected:
RemapEntry(EntryKind K, StringRef Name, StringRef ExternalContentsPath,
NameKind UseName)
: Entry(K, Name), ExternalContentsPath(ExternalContentsPath),
UseName(UseName) {}
public:
StringRef getExternalContentsPath() const { return ExternalContentsPath; }
/// Whether to use the external path as the name for this file or directory.
bool useExternalName(bool GlobalUseExternalName) const {
return UseName == NK_NotSet ? GlobalUseExternalName
: (UseName == NK_External);
}
NameKind getUseName() const { return UseName; }
static bool classof(const Entry *E) {
switch (E->getKind()) {
case EK_DirectoryRemap:
[[fallthrough]];
case EK_File:
return true;
case EK_Directory:
return false;
}
llvm_unreachable("invalid entry kind");
}
};
/// A directory in the vfs that maps to a directory in the external file
/// system.
class DirectoryRemapEntry : public RemapEntry {
public:
DirectoryRemapEntry(StringRef Name, StringRef ExternalContentsPath,
NameKind UseName)
: RemapEntry(EK_DirectoryRemap, Name, ExternalContentsPath, UseName) {}
static bool classof(const Entry *E) {
return E->getKind() == EK_DirectoryRemap;
}
};
/// A file in the vfs that maps to a file in the external file system.
class FileEntry : public RemapEntry {
public:
FileEntry(StringRef Name, StringRef ExternalContentsPath, NameKind UseName)
: RemapEntry(EK_File, Name, ExternalContentsPath, UseName) {}
static bool classof(const Entry *E) { return E->getKind() == EK_File; }
};
/// Represents the result of a path lookup into the RedirectingFileSystem.
struct LookupResult {
/// Chain of parent directory entries for \c E.
llvm::SmallVector<Entry *, 32> Parents;
/// The entry the looked-up path corresponds to.
Entry *E;
private:
/// When the found Entry is a DirectoryRemapEntry, stores the path in the
/// external file system that the looked-up path in the virtual file system
// corresponds to.
std::optional<std::string> ExternalRedirect;
public:
LookupResult(Entry *E, sys::path::const_iterator Start,
sys::path::const_iterator End);
/// If the found Entry maps the the input path to a path in the external
/// file system (i.e. it is a FileEntry or DirectoryRemapEntry), returns
/// that path.
std::optional<StringRef> getExternalRedirect() const {
if (isa<DirectoryRemapEntry>(E))
return StringRef(*ExternalRedirect);
if (auto *FE = dyn_cast<FileEntry>(E))
return FE->getExternalContentsPath();
return std::nullopt;
}
/// Get the (canonical) path of the found entry. This uses the as-written
/// path components from the VFS specification.
void getPath(llvm::SmallVectorImpl<char> &Path) const;
};
private:
friend class RedirectingFSDirIterImpl;
friend class RedirectingFileSystemParser;
/// Canonicalize path by removing ".", "..", "./", components. This is
/// a VFS request, do not bother about symlinks in the path components
/// but canonicalize in order to perform the correct entry search.
std::error_code makeCanonical(SmallVectorImpl<char> &Path) const;
/// Get the File status, or error, from the underlying external file system.
/// This returns the status with the originally requested name, while looking
/// up the entry using the canonical path.
ErrorOr<Status> getExternalStatus(const Twine &CanonicalPath,
const Twine &OriginalPath) const;
/// Make \a Path an absolute path.
///
/// Makes \a Path absolute using the \a WorkingDir if it is not already.
///
/// /absolute/path => /absolute/path
/// relative/../path => <WorkingDir>/relative/../path
///
/// \param WorkingDir A path that will be used as the base Dir if \a Path
/// is not already absolute.
/// \param Path A path that is modified to be an absolute path.
/// \returns success if \a path has been made absolute, otherwise a
/// platform-specific error_code.
std::error_code makeAbsolute(StringRef WorkingDir,
SmallVectorImpl<char> &Path) const;
// In a RedirectingFileSystem, keys can be specified in Posix or Windows
// style (or even a mixture of both), so this comparison helper allows
// slashes (representing a root) to match backslashes (and vice versa). Note
// that, other than the root, path components should not contain slashes or
// backslashes.
bool pathComponentMatches(llvm::StringRef lhs, llvm::StringRef rhs) const {
if ((CaseSensitive ? lhs.equals(rhs) : lhs.equals_insensitive(rhs)))
return true;
return (lhs == "/" && rhs == "\\") || (lhs == "\\" && rhs == "/");
}
/// The root(s) of the virtual file system.
std::vector<std::unique_ptr<Entry>> Roots;
/// The current working directory of the file system.
std::string WorkingDirectory;
/// The file system to use for external references.
IntrusiveRefCntPtr<FileSystem> ExternalFS;
/// This represents the directory path that the YAML file is located.
/// This will be prefixed to each 'external-contents' if IsRelativeOverlay
/// is set. This will also be prefixed to each 'roots->name' if RootRelative
/// is set to RootRelativeKind::OverlayDir and the path is relative.
std::string OverlayFileDir;
/// @name Configuration
/// @{
/// Whether to perform case-sensitive comparisons.
///
/// Currently, case-insensitive matching only works correctly with ASCII.
bool CaseSensitive = is_style_posix(sys::path::Style::native);
/// IsRelativeOverlay marks whether a OverlayFileDir path must
/// be prefixed in every 'external-contents' when reading from YAML files.
bool IsRelativeOverlay = false;
/// Whether to use to use the value of 'external-contents' for the
/// names of files. This global value is overridable on a per-file basis.
bool UseExternalNames = true;
/// Determines the lookups to perform, as well as their order. See
/// \c RedirectKind for details.
RedirectKind Redirection = RedirectKind::Fallthrough;
/// Determine the prefix directory if the roots are relative paths. See
/// \c RootRelativeKind for details.
RootRelativeKind RootRelative = RootRelativeKind::CWD;
/// @}
RedirectingFileSystem(IntrusiveRefCntPtr<FileSystem> ExternalFS);
/// Looks up the path <tt>[Start, End)</tt> in \p From, possibly recursing
/// into the contents of \p From if it is a directory. Returns a LookupResult
/// giving the matched entry and, if that entry is a FileEntry or
/// DirectoryRemapEntry, the path it redirects to in the external file system.
ErrorOr<LookupResult>
lookupPathImpl(llvm::sys::path::const_iterator Start,
llvm::sys::path::const_iterator End, Entry *From,
llvm::SmallVectorImpl<Entry *> &Entries) const;
/// Get the status for a path with the provided \c LookupResult.
ErrorOr<Status> status(const Twine &CanonicalPath, const Twine &OriginalPath,
const LookupResult &Result);
public:
/// Looks up \p Path in \c Roots and returns a LookupResult giving the
/// matched entry and, if the entry was a FileEntry or DirectoryRemapEntry,
/// the path it redirects to in the external file system.
ErrorOr<LookupResult> lookupPath(StringRef Path) const;
/// Parses \p Buffer, which is expected to be in YAML format and
/// returns a virtual file system representing its contents.
static std::unique_ptr<RedirectingFileSystem>
create(std::unique_ptr<MemoryBuffer> Buffer,
SourceMgr::DiagHandlerTy DiagHandler, StringRef YAMLFilePath,
void *DiagContext, IntrusiveRefCntPtr<FileSystem> ExternalFS);
/// Redirect each of the remapped files from first to second.
static std::unique_ptr<RedirectingFileSystem>
create(ArrayRef<std::pair<std::string, std::string>> RemappedFiles,
bool UseExternalNames, FileSystem &ExternalFS);
ErrorOr<Status> status(const Twine &Path) override;
ErrorOr<std::unique_ptr<File>> openFileForRead(const Twine &Path) override;
std::error_code getRealPath(const Twine &Path,
SmallVectorImpl<char> &Output) const override;
llvm::ErrorOr<std::string> getCurrentWorkingDirectory() const override;
std::error_code setCurrentWorkingDirectory(const Twine &Path) override;
std::error_code isLocal(const Twine &Path, bool &Result) override;
std::error_code makeAbsolute(SmallVectorImpl<char> &Path) const override;
directory_iterator dir_begin(const Twine &Dir, std::error_code &EC) override;
void setOverlayFileDir(StringRef PrefixDir);
StringRef getOverlayFileDir() const;
/// Sets the redirection kind to \c Fallthrough if true or \c RedirectOnly
/// otherwise. Will removed in the future, use \c setRedirection instead.
void setFallthrough(bool Fallthrough);
void setRedirection(RedirectingFileSystem::RedirectKind Kind);
std::vector<llvm::StringRef> getRoots() const;
void printEntry(raw_ostream &OS, Entry *E, unsigned IndentLevel = 0) const;
protected:
void printImpl(raw_ostream &OS, PrintType Type,
unsigned IndentLevel) const override;
};
/// Collect all pairs of <virtual path, real path> entries from the
/// \p YAMLFilePath. This is used by the module dependency collector to forward
/// the entries into the reproducer output VFS YAML file.
void collectVFSFromYAML(
std::unique_ptr<llvm::MemoryBuffer> Buffer,
llvm::SourceMgr::DiagHandlerTy DiagHandler, StringRef YAMLFilePath,
SmallVectorImpl<YAMLVFSEntry> &CollectedEntries,
void *DiagContext = nullptr,
IntrusiveRefCntPtr<FileSystem> ExternalFS = getRealFileSystem());
class YAMLVFSWriter {
std::vector<YAMLVFSEntry> Mappings;
std::optional<bool> IsCaseSensitive;
std::optional<bool> IsOverlayRelative;
std::optional<bool> UseExternalNames;
std::string OverlayDir;
void addEntry(StringRef VirtualPath, StringRef RealPath, bool IsDirectory);
public:
YAMLVFSWriter() = default;
void addFileMapping(StringRef VirtualPath, StringRef RealPath);
void addDirectoryMapping(StringRef VirtualPath, StringRef RealPath);
void setCaseSensitivity(bool CaseSensitive) {
IsCaseSensitive = CaseSensitive;
}
void setUseExternalNames(bool UseExtNames) { UseExternalNames = UseExtNames; }
void setOverlayDir(StringRef OverlayDirectory) {
IsOverlayRelative = true;
OverlayDir.assign(OverlayDirectory.str());
}
const std::vector<YAMLVFSEntry> &getMappings() const { return Mappings; }
void write(llvm::raw_ostream &OS);
};
} // namespace vfs
} // namespace llvm
#endif // LLVM_SUPPORT_VIRTUALFILESYSTEM_H
PK hwFZG}��" " Support/Printable.hnu �[��� //===--- Printable.h - Print function helpers -------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the Printable struct.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_PRINTABLE_H
#define LLVM_SUPPORT_PRINTABLE_H
#include <functional>
#include <utility>
namespace llvm {
class raw_ostream;
/// Simple wrapper around std::function<void(raw_ostream&)>.
/// This class is useful to construct print helpers for raw_ostream.
///
/// Example:
/// Printable printRegister(unsigned Register) {
/// return Printable([Register](raw_ostream &OS) {
/// OS << getRegisterName(Register);
/// });
/// }
/// ... OS << printRegister(Register); ...
///
/// Implementation note: Ideally this would just be a typedef, but doing so
/// leads to operator << being ambiguous as function has matching constructors
/// in some STL versions. I have seen the problem on gcc 4.6 libstdc++ and
/// microsoft STL.
class Printable {
public:
std::function<void(raw_ostream &OS)> Print;
Printable(std::function<void(raw_ostream &OS)> Print)
: Print(std::move(Print)) {}
};
inline raw_ostream &operator<<(raw_ostream &OS, const Printable &P) {
P.Print(OS);
return OS;
}
} // namespace llvm
#endif
PK hwFZ[f f Support/thread.hnu �[��� //===-- llvm/Support/thread.h - Wrapper for <thread> ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This header is a wrapper for <thread> that works around problems with the
// MSVC headers when exceptions are disabled. It also provides llvm::thread,
// which is either a typedef of std::thread or a replacement that calls the
// function synchronously depending on the value of LLVM_ENABLE_THREADS.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_THREAD_H
#define LLVM_SUPPORT_THREAD_H
#include "llvm/Config/llvm-config.h"
#include <optional>
#ifdef _WIN32
typedef unsigned long DWORD;
typedef void *PVOID;
typedef PVOID HANDLE;
#endif
#if LLVM_ENABLE_THREADS
#include <thread>
namespace llvm {
#if LLVM_ON_UNIX || _WIN32
/// LLVM thread following std::thread interface with added constructor to
/// specify stack size.
class thread {
template <typename CalleeTuple> static void GenericThreadProxy(void *Ptr) {
std::unique_ptr<CalleeTuple> Callee(static_cast<CalleeTuple *>(Ptr));
std::apply(
[](auto &&F, auto &&...Args) {
std::forward<decltype(F)>(F)(std::forward<decltype(Args)>(Args)...);
},
*Callee);
}
public:
#if LLVM_ON_UNIX
using native_handle_type = pthread_t;
using id = pthread_t;
using start_routine_type = void *(*)(void *);
template <typename CalleeTuple> static void *ThreadProxy(void *Ptr) {
GenericThreadProxy<CalleeTuple>(Ptr);
return nullptr;
}
#elif _WIN32
using native_handle_type = HANDLE;
using id = DWORD;
using start_routine_type = unsigned(__stdcall *)(void *);
template <typename CalleeTuple>
static unsigned __stdcall ThreadProxy(void *Ptr) {
GenericThreadProxy<CalleeTuple>(Ptr);
return 0;
}
#endif
static const std::optional<unsigned> DefaultStackSize;
thread() : Thread(native_handle_type()) {}
thread(thread &&Other) noexcept
: Thread(std::exchange(Other.Thread, native_handle_type())) {}
template <class Function, class... Args>
explicit thread(Function &&f, Args &&...args)
: thread(DefaultStackSize, f, args...) {}
template <class Function, class... Args>
explicit thread(std::optional<unsigned> StackSizeInBytes, Function &&f,
Args &&...args);
thread(const thread &) = delete;
~thread() {
if (joinable())
std::terminate();
}
thread &operator=(thread &&Other) noexcept {
if (joinable())
std::terminate();
Thread = std::exchange(Other.Thread, native_handle_type());
return *this;
}
bool joinable() const noexcept { return Thread != native_handle_type(); }
inline id get_id() const noexcept;
native_handle_type native_handle() const noexcept { return Thread; }
static unsigned hardware_concurrency() {
return std::thread::hardware_concurrency();
};
inline void join();
inline void detach();
void swap(llvm::thread &Other) noexcept { std::swap(Thread, Other.Thread); }
private:
native_handle_type Thread;
};
thread::native_handle_type
llvm_execute_on_thread_impl(thread::start_routine_type ThreadFunc, void *Arg,
std::optional<unsigned> StackSizeInBytes);
void llvm_thread_join_impl(thread::native_handle_type Thread);
void llvm_thread_detach_impl(thread::native_handle_type Thread);
thread::id llvm_thread_get_id_impl(thread::native_handle_type Thread);
thread::id llvm_thread_get_current_id_impl();
template <class Function, class... Args>
thread::thread(std::optional<unsigned> StackSizeInBytes, Function &&f,
Args &&...args) {
typedef std::tuple<std::decay_t<Function>, std::decay_t<Args>...> CalleeTuple;
std::unique_ptr<CalleeTuple> Callee(
new CalleeTuple(std::forward<Function>(f), std::forward<Args>(args)...));
Thread = llvm_execute_on_thread_impl(ThreadProxy<CalleeTuple>, Callee.get(),
StackSizeInBytes);
if (Thread != native_handle_type())
Callee.release();
}
thread::id thread::get_id() const noexcept {
return llvm_thread_get_id_impl(Thread);
}
void thread::join() {
llvm_thread_join_impl(Thread);
Thread = native_handle_type();
}
void thread::detach() {
llvm_thread_detach_impl(Thread);
Thread = native_handle_type();
}
namespace this_thread {
inline thread::id get_id() { return llvm_thread_get_current_id_impl(); }
} // namespace this_thread
#else // !LLVM_ON_UNIX && !_WIN32
/// std::thread backed implementation of llvm::thread interface that ignores the
/// stack size request.
class thread {
public:
using native_handle_type = std::thread::native_handle_type;
using id = std::thread::id;
thread() : Thread(std::thread()) {}
thread(thread &&Other) noexcept
: Thread(std::exchange(Other.Thread, std::thread())) {}
template <class Function, class... Args>
explicit thread(std::optional<unsigned> StackSizeInBytes, Function &&f,
Args &&...args)
: Thread(std::forward<Function>(f), std::forward<Args>(args)...) {}
template <class Function, class... Args>
explicit thread(Function &&f, Args &&...args) : Thread(f, args...) {}
thread(const thread &) = delete;
~thread() {}
thread &operator=(thread &&Other) noexcept {
Thread = std::exchange(Other.Thread, std::thread());
return *this;
}
bool joinable() const noexcept { return Thread.joinable(); }
id get_id() const noexcept { return Thread.get_id(); }
native_handle_type native_handle() noexcept { return Thread.native_handle(); }
static unsigned hardware_concurrency() {
return std::thread::hardware_concurrency();
};
inline void join() { Thread.join(); }
inline void detach() { Thread.detach(); }
void swap(llvm::thread &Other) noexcept { std::swap(Thread, Other.Thread); }
private:
std::thread Thread;
};
namespace this_thread {
inline thread::id get_id() { return std::this_thread::get_id(); }
}
#endif // LLVM_ON_UNIX || _WIN32
} // namespace llvm
#else // !LLVM_ENABLE_THREADS
#include <utility>
namespace llvm {
struct thread {
thread() {}
thread(thread &&other) {}
template <class Function, class... Args>
explicit thread(std::optional<unsigned> StackSizeInBytes, Function &&f,
Args &&...args) {
f(std::forward<Args>(args)...);
}
template <class Function, class... Args>
explicit thread(Function &&f, Args &&...args) {
f(std::forward<Args>(args)...);
}
thread(const thread &) = delete;
void detach() {
report_fatal_error("Detaching from a thread does not make sense with no "
"threading support");
}
void join() {}
static unsigned hardware_concurrency() { return 1; };
};
} // namespace llvm
#endif // LLVM_ENABLE_THREADS
#endif // LLVM_SUPPORT_THREAD_H
PK hwFZ�G5?: : Support/raw_sha1_ostream.hnu �[��� //==- raw_sha1_ostream.h - raw_ostream that compute SHA1 --*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the raw_sha1_ostream class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_RAW_SHA1_OSTREAM_H
#define LLVM_SUPPORT_RAW_SHA1_OSTREAM_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/Support/SHA1.h"
#include "llvm/Support/raw_ostream.h"
namespace llvm {
/// A raw_ostream that hash the content using the sha1 algorithm.
class raw_sha1_ostream : public raw_ostream {
SHA1 State;
/// See raw_ostream::write_impl.
void write_impl(const char *Ptr, size_t Size) override {
State.update(ArrayRef<uint8_t>((const uint8_t *)Ptr, Size));
}
public:
/// Return the current SHA1 hash for the content of the stream
std::array<uint8_t, 20> sha1() {
flush();
return State.result();
}
/// Reset the internal state to start over from scratch.
void resetHash() { State.init(); }
uint64_t current_pos() const override { return 0; }
};
} // end llvm namespace
#endif
PK hwFZ�V�] ] Support/PluginLoader.hnu �[��� //===-- llvm/Support/PluginLoader.h - Plugin Loader for Tools ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// A tool can #include this file to get a -load option that allows the user to
// load arbitrary shared objects into the tool's address space. Note that this
// header can only be included by a program ONCE, so it should never to used by
// library authors.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_PLUGINLOADER_H
#define LLVM_SUPPORT_PLUGINLOADER_H
#ifndef DONT_GET_PLUGIN_LOADER_OPTION
#include "llvm/Support/CommandLine.h"
#endif
#include <string>
namespace llvm {
struct PluginLoader {
void operator=(const std::string &Filename);
static unsigned getNumPlugins();
static std::string& getPlugin(unsigned num);
};
#ifndef DONT_GET_PLUGIN_LOADER_OPTION
// This causes operator= above to be invoked for every -load option.
static cl::opt<PluginLoader, false, cl::parser<std::string>>
LoadOpt("load", cl::value_desc("pluginfilename"),
cl::desc("Load the specified plugin"));
#endif
}
#endif
PK hwFZ� g� �
Support/COM.hnu �[��� //===- llvm/Support/COM.h ---------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
///
/// Provides a library for accessing COM functionality of the Host OS.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_COM_H
#define LLVM_SUPPORT_COM_H
namespace llvm {
namespace sys {
enum class COMThreadingMode { SingleThreaded, MultiThreaded };
class InitializeCOMRAII {
public:
explicit InitializeCOMRAII(COMThreadingMode Threading,
bool SpeedOverMemory = false);
~InitializeCOMRAII();
private:
InitializeCOMRAII(const InitializeCOMRAII &) = delete;
void operator=(const InitializeCOMRAII &) = delete;
};
}
}
#endif
PK hwFZ��o�! �! Support/InstructionCost.hnu �[��� //===- InstructionCost.h ----------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This file defines an InstructionCost class that is used when calculating
/// the cost of an instruction, or a group of instructions. In addition to a
/// numeric value representing the cost the class also contains a state that
/// can be used to encode particular properties, such as a cost being invalid.
/// Operations on InstructionCost implement saturation arithmetic, so that
/// accumulating costs on large cost-values don't overflow.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_INSTRUCTIONCOST_H
#define LLVM_SUPPORT_INSTRUCTIONCOST_H
#include "llvm/Support/MathExtras.h"
#include <limits>
#include <optional>
namespace llvm {
class raw_ostream;
class InstructionCost {
public:
using CostType = int64_t;
/// CostState describes the state of a cost.
enum CostState {
Valid, /// < The cost value represents a valid cost, even when the
/// cost-value is large.
Invalid /// < Invalid indicates there is no way to represent the cost as a
/// numeric value. This state exists to represent a possible issue,
/// e.g. if the cost-model knows the operation cannot be expanded
/// into a valid code-sequence by the code-generator. While some
/// passes may assert that the calculated cost must be valid, it is
/// up to individual passes how to interpret an Invalid cost. For
/// example, a transformation pass could choose not to perform a
/// transformation if the resulting cost would end up Invalid.
/// Because some passes may assert a cost is Valid, it is not
/// recommended to use Invalid costs to model 'Unknown'.
/// Note that Invalid is semantically different from a (very) high,
/// but valid cost, which intentionally indicates no issue, but
/// rather a strong preference not to select a certain operation.
};
private:
CostType Value = 0;
CostState State = Valid;
void propagateState(const InstructionCost &RHS) {
if (RHS.State == Invalid)
State = Invalid;
}
static CostType getMaxValue() { return std::numeric_limits<CostType>::max(); }
static CostType getMinValue() { return std::numeric_limits<CostType>::min(); }
public:
// A default constructed InstructionCost is a valid zero cost
InstructionCost() = default;
InstructionCost(CostState) = delete;
InstructionCost(CostType Val) : Value(Val), State(Valid) {}
static InstructionCost getMax() { return getMaxValue(); }
static InstructionCost getMin() { return getMinValue(); }
static InstructionCost getInvalid(CostType Val = 0) {
InstructionCost Tmp(Val);
Tmp.setInvalid();
return Tmp;
}
bool isValid() const { return State == Valid; }
void setValid() { State = Valid; }
void setInvalid() { State = Invalid; }
CostState getState() const { return State; }
/// This function is intended to be used as sparingly as possible, since the
/// class provides the full range of operator support required for arithmetic
/// and comparisons.
std::optional<CostType> getValue() const {
if (isValid())
return Value;
return std::nullopt;
}
/// For all of the arithmetic operators provided here any invalid state is
/// perpetuated and cannot be removed. Once a cost becomes invalid it stays
/// invalid, and it also inherits any invalid state from the RHS.
/// Arithmetic work on the actual values is implemented with saturation,
/// to avoid overflow when using more extreme cost values.
InstructionCost &operator+=(const InstructionCost &RHS) {
propagateState(RHS);
// Saturating addition.
InstructionCost::CostType Result;
if (AddOverflow(Value, RHS.Value, Result))
Result = RHS.Value > 0 ? getMaxValue() : getMinValue();
Value = Result;
return *this;
}
InstructionCost &operator+=(const CostType RHS) {
InstructionCost RHS2(RHS);
*this += RHS2;
return *this;
}
InstructionCost &operator-=(const InstructionCost &RHS) {
propagateState(RHS);
// Saturating subtract.
InstructionCost::CostType Result;
if (SubOverflow(Value, RHS.Value, Result))
Result = RHS.Value > 0 ? getMinValue() : getMaxValue();
Value = Result;
return *this;
}
InstructionCost &operator-=(const CostType RHS) {
InstructionCost RHS2(RHS);
*this -= RHS2;
return *this;
}
InstructionCost &operator*=(const InstructionCost &RHS) {
propagateState(RHS);
// Saturating multiply.
InstructionCost::CostType Result;
if (MulOverflow(Value, RHS.Value, Result)) {
if ((Value > 0 && RHS.Value > 0) || (Value < 0 && RHS.Value < 0))
Result = getMaxValue();
else
Result = getMinValue();
}
Value = Result;
return *this;
}
InstructionCost &operator*=(const CostType RHS) {
InstructionCost RHS2(RHS);
*this *= RHS2;
return *this;
}
InstructionCost &operator/=(const InstructionCost &RHS) {
propagateState(RHS);
Value /= RHS.Value;
return *this;
}
InstructionCost &operator/=(const CostType RHS) {
InstructionCost RHS2(RHS);
*this /= RHS2;
return *this;
}
InstructionCost &operator++() {
*this += 1;
return *this;
}
InstructionCost operator++(int) {
InstructionCost Copy = *this;
++*this;
return Copy;
}
InstructionCost &operator--() {
*this -= 1;
return *this;
}
InstructionCost operator--(int) {
InstructionCost Copy = *this;
--*this;
return Copy;
}
/// For the comparison operators we have chosen to use lexicographical
/// ordering where valid costs are always considered to be less than invalid
/// costs. This avoids having to add asserts to the comparison operators that
/// the states are valid and users can test for validity of the cost
/// explicitly.
bool operator<(const InstructionCost &RHS) const {
if (State != RHS.State)
return State < RHS.State;
return Value < RHS.Value;
}
// Implement in terms of operator< to ensure that the two comparisons stay in
// sync
bool operator==(const InstructionCost &RHS) const {
return !(*this < RHS) && !(RHS < *this);
}
bool operator!=(const InstructionCost &RHS) const { return !(*this == RHS); }
bool operator==(const CostType RHS) const {
InstructionCost RHS2(RHS);
return *this == RHS2;
}
bool operator!=(const CostType RHS) const { return !(*this == RHS); }
bool operator>(const InstructionCost &RHS) const { return RHS < *this; }
bool operator<=(const InstructionCost &RHS) const { return !(RHS < *this); }
bool operator>=(const InstructionCost &RHS) const { return !(*this < RHS); }
bool operator<(const CostType RHS) const {
InstructionCost RHS2(RHS);
return *this < RHS2;
}
bool operator>(const CostType RHS) const {
InstructionCost RHS2(RHS);
return *this > RHS2;
}
bool operator<=(const CostType RHS) const {
InstructionCost RHS2(RHS);
return *this <= RHS2;
}
bool operator>=(const CostType RHS) const {
InstructionCost RHS2(RHS);
return *this >= RHS2;
}
void print(raw_ostream &OS) const;
template <class Function>
auto map(const Function &F) const -> InstructionCost {
if (isValid())
return F(Value);
return getInvalid();
}
};
inline InstructionCost operator+(const InstructionCost &LHS,
const InstructionCost &RHS) {
InstructionCost LHS2(LHS);
LHS2 += RHS;
return LHS2;
}
inline InstructionCost operator-(const InstructionCost &LHS,
const InstructionCost &RHS) {
InstructionCost LHS2(LHS);
LHS2 -= RHS;
return LHS2;
}
inline InstructionCost operator*(const InstructionCost &LHS,
const InstructionCost &RHS) {
InstructionCost LHS2(LHS);
LHS2 *= RHS;
return LHS2;
}
inline InstructionCost operator/(const InstructionCost &LHS,
const InstructionCost &RHS) {
InstructionCost LHS2(LHS);
LHS2 /= RHS;
return LHS2;
}
inline raw_ostream &operator<<(raw_ostream &OS, const InstructionCost &V) {
V.print(OS);
return OS;
}
} // namespace llvm
#endif
PK hwFZ�ܴ��� �� Support/FileSystem.hnu �[��� //===- llvm/Support/FileSystem.h - File System OS Concept -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the llvm::sys::fs namespace. It is designed after
// TR2/boost filesystem (v3), but modified to remove exception handling and the
// path class.
//
// All functions return an error_code and their actual work via the last out
// argument. The out argument is defined if and only if errc::success is
// returned. A function may return any error code in the generic or system
// category. However, they shall be equivalent to any error conditions listed
// in each functions respective documentation if the condition applies. [ note:
// this does not guarantee that error_code will be in the set of explicitly
// listed codes, but it does guarantee that if any of the explicitly listed
// errors occur, the correct error_code will be used ]. All functions may
// return errc::not_enough_memory if there is not enough memory to complete the
// operation.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_FILESYSTEM_H
#define LLVM_SUPPORT_FILESYSTEM_H
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/Support/Chrono.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/ErrorOr.h"
#include "llvm/Support/FileSystem/UniqueID.h"
#include "llvm/Support/MD5.h"
#include <cassert>
#include <cstdint>
#include <ctime>
#include <memory>
#include <stack>
#include <string>
#include <system_error>
#include <vector>
#ifdef HAVE_SYS_STAT_H
#include <sys/stat.h>
#endif
namespace llvm {
namespace sys {
namespace fs {
#if defined(_WIN32)
// A Win32 HANDLE is a typedef of void*
using file_t = void *;
#else
using file_t = int;
#endif
extern const file_t kInvalidFile;
/// An enumeration for the file system's view of the type.
enum class file_type {
status_error,
file_not_found,
regular_file,
directory_file,
symlink_file,
block_file,
character_file,
fifo_file,
socket_file,
type_unknown
};
/// space_info - Self explanatory.
struct space_info {
uint64_t capacity;
uint64_t free;
uint64_t available;
};
enum perms {
no_perms = 0,
owner_read = 0400,
owner_write = 0200,
owner_exe = 0100,
owner_all = owner_read | owner_write | owner_exe,
group_read = 040,
group_write = 020,
group_exe = 010,
group_all = group_read | group_write | group_exe,
others_read = 04,
others_write = 02,
others_exe = 01,
others_all = others_read | others_write | others_exe,
all_read = owner_read | group_read | others_read,
all_write = owner_write | group_write | others_write,
all_exe = owner_exe | group_exe | others_exe,
all_all = owner_all | group_all | others_all,
set_uid_on_exe = 04000,
set_gid_on_exe = 02000,
sticky_bit = 01000,
all_perms = all_all | set_uid_on_exe | set_gid_on_exe | sticky_bit,
perms_not_known = 0xFFFF
};
// Helper functions so that you can use & and | to manipulate perms bits:
inline perms operator|(perms l, perms r) {
return static_cast<perms>(static_cast<unsigned short>(l) |
static_cast<unsigned short>(r));
}
inline perms operator&(perms l, perms r) {
return static_cast<perms>(static_cast<unsigned short>(l) &
static_cast<unsigned short>(r));
}
inline perms &operator|=(perms &l, perms r) {
l = l | r;
return l;
}
inline perms &operator&=(perms &l, perms r) {
l = l & r;
return l;
}
inline perms operator~(perms x) {
// Avoid UB by explicitly truncating the (unsigned) ~ result.
return static_cast<perms>(
static_cast<unsigned short>(~static_cast<unsigned short>(x)));
}
/// Represents the result of a call to directory_iterator::status(). This is a
/// subset of the information returned by a regular sys::fs::status() call, and
/// represents the information provided by Windows FileFirstFile/FindNextFile.
class basic_file_status {
protected:
#if defined(LLVM_ON_UNIX)
time_t fs_st_atime = 0;
time_t fs_st_mtime = 0;
uint32_t fs_st_atime_nsec = 0;
uint32_t fs_st_mtime_nsec = 0;
uid_t fs_st_uid = 0;
gid_t fs_st_gid = 0;
off_t fs_st_size = 0;
#elif defined (_WIN32)
uint32_t LastAccessedTimeHigh = 0;
uint32_t LastAccessedTimeLow = 0;
uint32_t LastWriteTimeHigh = 0;
uint32_t LastWriteTimeLow = 0;
uint32_t FileSizeHigh = 0;
uint32_t FileSizeLow = 0;
#endif
file_type Type = file_type::status_error;
perms Perms = perms_not_known;
public:
basic_file_status() = default;
explicit basic_file_status(file_type Type) : Type(Type) {}
#if defined(LLVM_ON_UNIX)
basic_file_status(file_type Type, perms Perms, time_t ATime,
uint32_t ATimeNSec, time_t MTime, uint32_t MTimeNSec,
uid_t UID, gid_t GID, off_t Size)
: fs_st_atime(ATime), fs_st_mtime(MTime),
fs_st_atime_nsec(ATimeNSec), fs_st_mtime_nsec(MTimeNSec),
fs_st_uid(UID), fs_st_gid(GID),
fs_st_size(Size), Type(Type), Perms(Perms) {}
#elif defined(_WIN32)
basic_file_status(file_type Type, perms Perms, uint32_t LastAccessTimeHigh,
uint32_t LastAccessTimeLow, uint32_t LastWriteTimeHigh,
uint32_t LastWriteTimeLow, uint32_t FileSizeHigh,
uint32_t FileSizeLow)
: LastAccessedTimeHigh(LastAccessTimeHigh),
LastAccessedTimeLow(LastAccessTimeLow),
LastWriteTimeHigh(LastWriteTimeHigh),
LastWriteTimeLow(LastWriteTimeLow), FileSizeHigh(FileSizeHigh),
FileSizeLow(FileSizeLow), Type(Type), Perms(Perms) {}
#endif
// getters
file_type type() const { return Type; }
perms permissions() const { return Perms; }
/// The file access time as reported from the underlying file system.
///
/// Also see comments on \c getLastModificationTime() related to the precision
/// of the returned value.
TimePoint<> getLastAccessedTime() const;
/// The file modification time as reported from the underlying file system.
///
/// The returned value allows for nanosecond precision but the actual
/// resolution is an implementation detail of the underlying file system.
/// There is no guarantee for what kind of resolution you can expect, the
/// resolution can differ across platforms and even across mountpoints on the
/// same machine.
TimePoint<> getLastModificationTime() const;
#if defined(LLVM_ON_UNIX)
uint32_t getUser() const { return fs_st_uid; }
uint32_t getGroup() const { return fs_st_gid; }
uint64_t getSize() const { return fs_st_size; }
#elif defined (_WIN32)
uint32_t getUser() const {
return 9999; // Not applicable to Windows, so...
}
uint32_t getGroup() const {
return 9999; // Not applicable to Windows, so...
}
uint64_t getSize() const {
return (uint64_t(FileSizeHigh) << 32) + FileSizeLow;
}
#endif
// setters
void type(file_type v) { Type = v; }
void permissions(perms p) { Perms = p; }
};
/// Represents the result of a call to sys::fs::status().
class file_status : public basic_file_status {
friend bool equivalent(file_status A, file_status B);
#if defined(LLVM_ON_UNIX)
dev_t fs_st_dev = 0;
nlink_t fs_st_nlinks = 0;
ino_t fs_st_ino = 0;
#elif defined (_WIN32)
uint32_t NumLinks = 0;
uint32_t VolumeSerialNumber = 0;
uint32_t FileIndexHigh = 0;
uint32_t FileIndexLow = 0;
#endif
public:
file_status() = default;
explicit file_status(file_type Type) : basic_file_status(Type) {}
#if defined(LLVM_ON_UNIX)
file_status(file_type Type, perms Perms, dev_t Dev, nlink_t Links, ino_t Ino,
time_t ATime, uint32_t ATimeNSec,
time_t MTime, uint32_t MTimeNSec,
uid_t UID, gid_t GID, off_t Size)
: basic_file_status(Type, Perms, ATime, ATimeNSec, MTime, MTimeNSec,
UID, GID, Size),
fs_st_dev(Dev), fs_st_nlinks(Links), fs_st_ino(Ino) {}
#elif defined(_WIN32)
file_status(file_type Type, perms Perms, uint32_t LinkCount,
uint32_t LastAccessTimeHigh, uint32_t LastAccessTimeLow,
uint32_t LastWriteTimeHigh, uint32_t LastWriteTimeLow,
uint32_t VolumeSerialNumber, uint32_t FileSizeHigh,
uint32_t FileSizeLow, uint32_t FileIndexHigh,
uint32_t FileIndexLow)
: basic_file_status(Type, Perms, LastAccessTimeHigh, LastAccessTimeLow,
LastWriteTimeHigh, LastWriteTimeLow, FileSizeHigh,
FileSizeLow),
NumLinks(LinkCount), VolumeSerialNumber(VolumeSerialNumber),
FileIndexHigh(FileIndexHigh), FileIndexLow(FileIndexLow) {}
#endif
UniqueID getUniqueID() const;
uint32_t getLinkCount() const;
};
/// @}
/// @name Physical Operators
/// @{
/// Make \a path an absolute path.
///
/// Makes \a path absolute using the \a current_directory if it is not already.
/// An empty \a path will result in the \a current_directory.
///
/// /absolute/path => /absolute/path
/// relative/../path => <current-directory>/relative/../path
///
/// @param path A path that is modified to be an absolute path.
void make_absolute(const Twine ¤t_directory, SmallVectorImpl<char> &path);
/// Make \a path an absolute path.
///
/// Makes \a path absolute using the current directory if it is not already. An
/// empty \a path will result in the current directory.
///
/// /absolute/path => /absolute/path
/// relative/../path => <current-directory>/relative/../path
///
/// @param path A path that is modified to be an absolute path.
/// @returns errc::success if \a path has been made absolute, otherwise a
/// platform-specific error_code.
std::error_code make_absolute(SmallVectorImpl<char> &path);
/// Create all the non-existent directories in path.
///
/// @param path Directories to create.
/// @returns errc::success if is_directory(path), otherwise a platform
/// specific error_code. If IgnoreExisting is false, also returns
/// error if the directory already existed.
std::error_code create_directories(const Twine &path,
bool IgnoreExisting = true,
perms Perms = owner_all | group_all);
/// Create the directory in path.
///
/// @param path Directory to create.
/// @returns errc::success if is_directory(path), otherwise a platform
/// specific error_code. If IgnoreExisting is false, also returns
/// error if the directory already existed.
std::error_code create_directory(const Twine &path, bool IgnoreExisting = true,
perms Perms = owner_all | group_all);
/// Create a link from \a from to \a to.
///
/// The link may be a soft or a hard link, depending on the platform. The caller
/// may not assume which one. Currently on windows it creates a hard link since
/// soft links require extra privileges. On unix, it creates a soft link since
/// hard links don't work on SMB file systems.
///
/// @param to The path to hard link to.
/// @param from The path to hard link from. This is created.
/// @returns errc::success if the link was created, otherwise a platform
/// specific error_code.
std::error_code create_link(const Twine &to, const Twine &from);
/// Create a hard link from \a from to \a to, or return an error.
///
/// @param to The path to hard link to.
/// @param from The path to hard link from. This is created.
/// @returns errc::success if the link was created, otherwise a platform
/// specific error_code.
std::error_code create_hard_link(const Twine &to, const Twine &from);
/// Collapse all . and .. patterns, resolve all symlinks, and optionally
/// expand ~ expressions to the user's home directory.
///
/// @param path The path to resolve.
/// @param output The location to store the resolved path.
/// @param expand_tilde If true, resolves ~ expressions to the user's home
/// directory.
std::error_code real_path(const Twine &path, SmallVectorImpl<char> &output,
bool expand_tilde = false);
/// Expands ~ expressions to the user's home directory. On Unix ~user
/// directories are resolved as well.
///
/// @param path The path to resolve.
void expand_tilde(const Twine &path, SmallVectorImpl<char> &output);
/// Get the current path.
///
/// @param result Holds the current path on return.
/// @returns errc::success if the current path has been stored in result,
/// otherwise a platform-specific error_code.
std::error_code current_path(SmallVectorImpl<char> &result);
/// Set the current path.
///
/// @param path The path to set.
/// @returns errc::success if the current path was successfully set,
/// otherwise a platform-specific error_code.
std::error_code set_current_path(const Twine &path);
/// Remove path. Equivalent to POSIX remove().
///
/// @param path Input path.
/// @returns errc::success if path has been removed or didn't exist, otherwise a
/// platform-specific error code. If IgnoreNonExisting is false, also
/// returns error if the file didn't exist.
std::error_code remove(const Twine &path, bool IgnoreNonExisting = true);
/// Recursively delete a directory.
///
/// @param path Input path.
/// @returns errc::success if path has been removed or didn't exist, otherwise a
/// platform-specific error code.
std::error_code remove_directories(const Twine &path, bool IgnoreErrors = true);
/// Rename \a from to \a to.
///
/// Files are renamed as if by POSIX rename(), except that on Windows there may
/// be a short interval of time during which the destination file does not
/// exist.
///
/// @param from The path to rename from.
/// @param to The path to rename to. This is created.
std::error_code rename(const Twine &from, const Twine &to);
/// Copy the contents of \a From to \a To.
///
/// @param From The path to copy from.
/// @param To The path to copy to. This is created.
std::error_code copy_file(const Twine &From, const Twine &To);
/// Copy the contents of \a From to \a To.
///
/// @param From The path to copy from.
/// @param ToFD The open file descriptor of the destination file.
std::error_code copy_file(const Twine &From, int ToFD);
/// Resize path to size. File is resized as if by POSIX truncate().
///
/// @param FD Input file descriptor.
/// @param Size Size to resize to.
/// @returns errc::success if \a path has been resized to \a size, otherwise a
/// platform-specific error_code.
std::error_code resize_file(int FD, uint64_t Size);
/// Resize \p FD to \p Size before mapping \a mapped_file_region::readwrite. On
/// non-Windows, this calls \a resize_file(). On Windows, this is a no-op,
/// since the subsequent mapping (via \c CreateFileMapping) automatically
/// extends the file.
inline std::error_code resize_file_before_mapping_readwrite(int FD,
uint64_t Size) {
#ifdef _WIN32
(void)FD;
(void)Size;
return std::error_code();
#else
return resize_file(FD, Size);
#endif
}
/// Compute an MD5 hash of a file's contents.
///
/// @param FD Input file descriptor.
/// @returns An MD5Result with the hash computed, if successful, otherwise a
/// std::error_code.
ErrorOr<MD5::MD5Result> md5_contents(int FD);
/// Version of compute_md5 that doesn't require an open file descriptor.
ErrorOr<MD5::MD5Result> md5_contents(const Twine &Path);
/// @}
/// @name Physical Observers
/// @{
/// Does file exist?
///
/// @param status A basic_file_status previously returned from stat.
/// @returns True if the file represented by status exists, false if it does
/// not.
bool exists(const basic_file_status &status);
enum class AccessMode { Exist, Write, Execute };
/// Can the file be accessed?
///
/// @param Path Input path.
/// @returns errc::success if the path can be accessed, otherwise a
/// platform-specific error_code.
std::error_code access(const Twine &Path, AccessMode Mode);
/// Does file exist?
///
/// @param Path Input path.
/// @returns True if it exists, false otherwise.
inline bool exists(const Twine &Path) {
return !access(Path, AccessMode::Exist);
}
/// Can we execute this file?
///
/// @param Path Input path.
/// @returns True if we can execute it, false otherwise.
bool can_execute(const Twine &Path);
/// Can we write this file?
///
/// @param Path Input path.
/// @returns True if we can write to it, false otherwise.
inline bool can_write(const Twine &Path) {
return !access(Path, AccessMode::Write);
}
/// Do file_status's represent the same thing?
///
/// @param A Input file_status.
/// @param B Input file_status.
///
/// assert(status_known(A) || status_known(B));
///
/// @returns True if A and B both represent the same file system entity, false
/// otherwise.
bool equivalent(file_status A, file_status B);
/// Do paths represent the same thing?
///
/// assert(status_known(A) || status_known(B));
///
/// @param A Input path A.
/// @param B Input path B.
/// @param result Set to true if stat(A) and stat(B) have the same device and
/// inode (or equivalent).
/// @returns errc::success if result has been successfully set, otherwise a
/// platform-specific error_code.
std::error_code equivalent(const Twine &A, const Twine &B, bool &result);
/// Simpler version of equivalent for clients that don't need to
/// differentiate between an error and false.
inline bool equivalent(const Twine &A, const Twine &B) {
bool result;
return !equivalent(A, B, result) && result;
}
/// Is the file mounted on a local filesystem?
///
/// @param path Input path.
/// @param result Set to true if \a path is on fixed media such as a hard disk,
/// false if it is not.
/// @returns errc::success if result has been successfully set, otherwise a
/// platform specific error_code.
std::error_code is_local(const Twine &path, bool &result);
/// Version of is_local accepting an open file descriptor.
std::error_code is_local(int FD, bool &result);
/// Simpler version of is_local for clients that don't need to
/// differentiate between an error and false.
inline bool is_local(const Twine &Path) {
bool Result;
return !is_local(Path, Result) && Result;
}
/// Simpler version of is_local accepting an open file descriptor for
/// clients that don't need to differentiate between an error and false.
inline bool is_local(int FD) {
bool Result;
return !is_local(FD, Result) && Result;
}
/// Does status represent a directory?
///
/// @param Path The path to get the type of.
/// @param Follow For symbolic links, indicates whether to return the file type
/// of the link itself, or of the target.
/// @returns A value from the file_type enumeration indicating the type of file.
file_type get_file_type(const Twine &Path, bool Follow = true);
/// Does status represent a directory?
///
/// @param status A basic_file_status previously returned from status.
/// @returns status.type() == file_type::directory_file.
bool is_directory(const basic_file_status &status);
/// Is path a directory?
///
/// @param path Input path.
/// @param result Set to true if \a path is a directory (after following
/// symlinks, false if it is not. Undefined otherwise.
/// @returns errc::success if result has been successfully set, otherwise a
/// platform-specific error_code.
std::error_code is_directory(const Twine &path, bool &result);
/// Simpler version of is_directory for clients that don't need to
/// differentiate between an error and false.
inline bool is_directory(const Twine &Path) {
bool Result;
return !is_directory(Path, Result) && Result;
}
/// Does status represent a regular file?
///
/// @param status A basic_file_status previously returned from status.
/// @returns status_known(status) && status.type() == file_type::regular_file.
bool is_regular_file(const basic_file_status &status);
/// Is path a regular file?
///
/// @param path Input path.
/// @param result Set to true if \a path is a regular file (after following
/// symlinks), false if it is not. Undefined otherwise.
/// @returns errc::success if result has been successfully set, otherwise a
/// platform-specific error_code.
std::error_code is_regular_file(const Twine &path, bool &result);
/// Simpler version of is_regular_file for clients that don't need to
/// differentiate between an error and false.
inline bool is_regular_file(const Twine &Path) {
bool Result;
if (is_regular_file(Path, Result))
return false;
return Result;
}
/// Does status represent a symlink file?
///
/// @param status A basic_file_status previously returned from status.
/// @returns status_known(status) && status.type() == file_type::symlink_file.
bool is_symlink_file(const basic_file_status &status);
/// Is path a symlink file?
///
/// @param path Input path.
/// @param result Set to true if \a path is a symlink file, false if it is not.
/// Undefined otherwise.
/// @returns errc::success if result has been successfully set, otherwise a
/// platform-specific error_code.
std::error_code is_symlink_file(const Twine &path, bool &result);
/// Simpler version of is_symlink_file for clients that don't need to
/// differentiate between an error and false.
inline bool is_symlink_file(const Twine &Path) {
bool Result;
if (is_symlink_file(Path, Result))
return false;
return Result;
}
/// Does this status represent something that exists but is not a
/// directory or regular file?
///
/// @param status A basic_file_status previously returned from status.
/// @returns exists(s) && !is_regular_file(s) && !is_directory(s)
bool is_other(const basic_file_status &status);
/// Is path something that exists but is not a directory,
/// regular file, or symlink?
///
/// @param path Input path.
/// @param result Set to true if \a path exists, but is not a directory, regular
/// file, or a symlink, false if it does not. Undefined otherwise.
/// @returns errc::success if result has been successfully set, otherwise a
/// platform-specific error_code.
std::error_code is_other(const Twine &path, bool &result);
/// Get file status as if by POSIX stat().
///
/// @param path Input path.
/// @param result Set to the file status.
/// @param follow When true, follows symlinks. Otherwise, the symlink itself is
/// statted.
/// @returns errc::success if result has been successfully set, otherwise a
/// platform-specific error_code.
std::error_code status(const Twine &path, file_status &result,
bool follow = true);
/// A version for when a file descriptor is already available.
std::error_code status(int FD, file_status &Result);
#ifdef _WIN32
/// A version for when a file descriptor is already available.
std::error_code status(file_t FD, file_status &Result);
#endif
/// Get file creation mode mask of the process.
///
/// @returns Mask reported by umask(2)
/// @note There is no umask on Windows. This function returns 0 always
/// on Windows. This function does not return an error_code because
/// umask(2) never fails. It is not thread safe.
unsigned getUmask();
/// Set file permissions.
///
/// @param Path File to set permissions on.
/// @param Permissions New file permissions.
/// @returns errc::success if the permissions were successfully set, otherwise
/// a platform-specific error_code.
/// @note On Windows, all permissions except *_write are ignored. Using any of
/// owner_write, group_write, or all_write will make the file writable.
/// Otherwise, the file will be marked as read-only.
std::error_code setPermissions(const Twine &Path, perms Permissions);
/// Vesion of setPermissions accepting a file descriptor.
/// TODO Delete the path based overload once we implement the FD based overload
/// on Windows.
std::error_code setPermissions(int FD, perms Permissions);
/// Get file permissions.
///
/// @param Path File to get permissions from.
/// @returns the permissions if they were successfully retrieved, otherwise a
/// platform-specific error_code.
/// @note On Windows, if the file does not have the FILE_ATTRIBUTE_READONLY
/// attribute, all_all will be returned. Otherwise, all_read | all_exe
/// will be returned.
ErrorOr<perms> getPermissions(const Twine &Path);
/// Get file size.
///
/// @param Path Input path.
/// @param Result Set to the size of the file in \a Path.
/// @returns errc::success if result has been successfully set, otherwise a
/// platform-specific error_code.
inline std::error_code file_size(const Twine &Path, uint64_t &Result) {
file_status Status;
std::error_code EC = status(Path, Status);
if (EC)
return EC;
Result = Status.getSize();
return std::error_code();
}
/// Set the file modification and access time.
///
/// @returns errc::success if the file times were successfully set, otherwise a
/// platform-specific error_code or errc::function_not_supported on
/// platforms where the functionality isn't available.
std::error_code setLastAccessAndModificationTime(int FD, TimePoint<> AccessTime,
TimePoint<> ModificationTime);
/// Simpler version that sets both file modification and access time to the same
/// time.
inline std::error_code setLastAccessAndModificationTime(int FD,
TimePoint<> Time) {
return setLastAccessAndModificationTime(FD, Time, Time);
}
/// Is status available?
///
/// @param s Input file status.
/// @returns True if status() != status_error.
bool status_known(const basic_file_status &s);
/// Is status available?
///
/// @param path Input path.
/// @param result Set to true if status() != status_error.
/// @returns errc::success if result has been successfully set, otherwise a
/// platform-specific error_code.
std::error_code status_known(const Twine &path, bool &result);
enum CreationDisposition : unsigned {
/// CD_CreateAlways - When opening a file:
/// * If it already exists, truncate it.
/// * If it does not already exist, create a new file.
CD_CreateAlways = 0,
/// CD_CreateNew - When opening a file:
/// * If it already exists, fail.
/// * If it does not already exist, create a new file.
CD_CreateNew = 1,
/// CD_OpenExisting - When opening a file:
/// * If it already exists, open the file with the offset set to 0.
/// * If it does not already exist, fail.
CD_OpenExisting = 2,
/// CD_OpenAlways - When opening a file:
/// * If it already exists, open the file with the offset set to 0.
/// * If it does not already exist, create a new file.
CD_OpenAlways = 3,
};
enum FileAccess : unsigned {
FA_Read = 1,
FA_Write = 2,
};
enum OpenFlags : unsigned {
OF_None = 0,
/// The file should be opened in text mode on platforms like z/OS that make
/// this distinction.
OF_Text = 1,
/// The file should use a carriage linefeed '\r\n'. This flag should only be
/// used with OF_Text. Only makes a difference on Windows.
OF_CRLF = 2,
/// The file should be opened in text mode and use a carriage linefeed '\r\n'.
/// This flag has the same functionality as OF_Text on z/OS but adds a
/// carriage linefeed on Windows.
OF_TextWithCRLF = OF_Text | OF_CRLF,
/// The file should be opened in append mode.
OF_Append = 4,
/// The returned handle can be used for deleting the file. Only makes a
/// difference on windows.
OF_Delete = 8,
/// When a child process is launched, this file should remain open in the
/// child process.
OF_ChildInherit = 16,
/// Force files Atime to be updated on access. Only makes a difference on
/// Windows.
OF_UpdateAtime = 32,
};
/// Create a potentially unique file name but does not create it.
///
/// Generates a unique path suitable for a temporary file but does not
/// open or create the file. The name is based on \a Model with '%'
/// replaced by a random char in [0-9a-f]. If \a MakeAbsolute is true
/// then the system's temp directory is prepended first. If \a MakeAbsolute
/// is false the current directory will be used instead.
///
/// This function does not check if the file exists. If you want to be sure
/// that the file does not yet exist, you should use use enough '%' characters
/// in your model to ensure this. Each '%' gives 4-bits of entropy so you can
/// use 32 of them to get 128 bits of entropy.
///
/// Example: clang-%%-%%-%%-%%-%%.s => clang-a0-b1-c2-d3-e4.s
///
/// @param Model Name to base unique path off of.
/// @param ResultPath Set to the file's path.
/// @param MakeAbsolute Whether to use the system temp directory.
void createUniquePath(const Twine &Model, SmallVectorImpl<char> &ResultPath,
bool MakeAbsolute);
/// Create a uniquely named file.
///
/// Generates a unique path suitable for a temporary file and then opens it as a
/// file. The name is based on \a Model with '%' replaced by a random char in
/// [0-9a-f]. If \a Model is not an absolute path, the temporary file will be
/// created in the current directory.
///
/// Example: clang-%%-%%-%%-%%-%%.s => clang-a0-b1-c2-d3-e4.s
///
/// This is an atomic operation. Either the file is created and opened, or the
/// file system is left untouched.
///
/// The intended use is for files that are to be kept, possibly after
/// renaming them. For example, when running 'clang -c foo.o', the file can
/// be first created as foo-abc123.o and then renamed.
///
/// @param Model Name to base unique path off of.
/// @param ResultFD Set to the opened file's file descriptor.
/// @param ResultPath Set to the opened file's absolute path.
/// @param Flags Set to the opened file's flags.
/// @param Mode Set to the opened file's permissions.
/// @returns errc::success if Result{FD,Path} have been successfully set,
/// otherwise a platform-specific error_code.
std::error_code createUniqueFile(const Twine &Model, int &ResultFD,
SmallVectorImpl<char> &ResultPath,
OpenFlags Flags = OF_None,
unsigned Mode = all_read | all_write);
/// Simpler version for clients that don't want an open file. An empty
/// file will still be created.
std::error_code createUniqueFile(const Twine &Model,
SmallVectorImpl<char> &ResultPath,
unsigned Mode = all_read | all_write);
/// Represents a temporary file.
///
/// The temporary file must be eventually discarded or given a final name and
/// kept.
///
/// The destructor doesn't implicitly discard because there is no way to
/// properly handle errors in a destructor.
class TempFile {
bool Done = false;
TempFile(StringRef Name, int FD);
public:
/// This creates a temporary file with createUniqueFile and schedules it for
/// deletion with sys::RemoveFileOnSignal.
static Expected<TempFile> create(const Twine &Model,
unsigned Mode = all_read | all_write,
OpenFlags ExtraFlags = OF_None);
TempFile(TempFile &&Other);
TempFile &operator=(TempFile &&Other);
// Name of the temporary file.
std::string TmpName;
// The open file descriptor.
int FD = -1;
#ifdef _WIN32
// Whether we need to manually remove the file on close.
bool RemoveOnClose = false;
#endif
// Keep this with the given name.
Error keep(const Twine &Name);
// Keep this with the temporary name.
Error keep();
// Delete the file.
Error discard();
// This checks that keep or delete was called.
~TempFile();
};
/// Create a file in the system temporary directory.
///
/// The filename is of the form prefix-random_chars.suffix. Since the directory
/// is not know to the caller, Prefix and Suffix cannot have path separators.
/// The files are created with mode 0600.
///
/// This should be used for things like a temporary .s that is removed after
/// running the assembler.
std::error_code createTemporaryFile(const Twine &Prefix, StringRef Suffix,
int &ResultFD,
SmallVectorImpl<char> &ResultPath,
OpenFlags Flags = OF_None);
/// Simpler version for clients that don't want an open file. An empty
/// file will still be created.
std::error_code createTemporaryFile(const Twine &Prefix, StringRef Suffix,
SmallVectorImpl<char> &ResultPath,
OpenFlags Flags = OF_None);
std::error_code createUniqueDirectory(const Twine &Prefix,
SmallVectorImpl<char> &ResultPath);
/// Get a unique name, not currently exisiting in the filesystem. Subject
/// to race conditions, prefer to use createUniqueFile instead.
///
/// Similar to createUniqueFile, but instead of creating a file only
/// checks if it exists. This function is subject to race conditions, if you
/// want to use the returned name to actually create a file, use
/// createUniqueFile instead.
std::error_code getPotentiallyUniqueFileName(const Twine &Model,
SmallVectorImpl<char> &ResultPath);
/// Get a unique temporary file name, not currently exisiting in the
/// filesystem. Subject to race conditions, prefer to use createTemporaryFile
/// instead.
///
/// Similar to createTemporaryFile, but instead of creating a file only
/// checks if it exists. This function is subject to race conditions, if you
/// want to use the returned name to actually create a file, use
/// createTemporaryFile instead.
std::error_code
getPotentiallyUniqueTempFileName(const Twine &Prefix, StringRef Suffix,
SmallVectorImpl<char> &ResultPath);
inline OpenFlags operator|(OpenFlags A, OpenFlags B) {
return OpenFlags(unsigned(A) | unsigned(B));
}
inline OpenFlags &operator|=(OpenFlags &A, OpenFlags B) {
A = A | B;
return A;
}
inline FileAccess operator|(FileAccess A, FileAccess B) {
return FileAccess(unsigned(A) | unsigned(B));
}
inline FileAccess &operator|=(FileAccess &A, FileAccess B) {
A = A | B;
return A;
}
/// @brief Opens a file with the specified creation disposition, access mode,
/// and flags and returns a file descriptor.
///
/// The caller is responsible for closing the file descriptor once they are
/// finished with it.
///
/// @param Name The path of the file to open, relative or absolute.
/// @param ResultFD If the file could be opened successfully, its descriptor
/// is stored in this location. Otherwise, this is set to -1.
/// @param Disp Value specifying the existing-file behavior.
/// @param Access Value specifying whether to open the file in read, write, or
/// read-write mode.
/// @param Flags Additional flags.
/// @param Mode The access permissions of the file, represented in octal.
/// @returns errc::success if \a Name has been opened, otherwise a
/// platform-specific error_code.
std::error_code openFile(const Twine &Name, int &ResultFD,
CreationDisposition Disp, FileAccess Access,
OpenFlags Flags, unsigned Mode = 0666);
/// @brief Opens a file with the specified creation disposition, access mode,
/// and flags and returns a platform-specific file object.
///
/// The caller is responsible for closing the file object once they are
/// finished with it.
///
/// @param Name The path of the file to open, relative or absolute.
/// @param Disp Value specifying the existing-file behavior.
/// @param Access Value specifying whether to open the file in read, write, or
/// read-write mode.
/// @param Flags Additional flags.
/// @param Mode The access permissions of the file, represented in octal.
/// @returns errc::success if \a Name has been opened, otherwise a
/// platform-specific error_code.
Expected<file_t> openNativeFile(const Twine &Name, CreationDisposition Disp,
FileAccess Access, OpenFlags Flags,
unsigned Mode = 0666);
/// Converts from a Posix file descriptor number to a native file handle.
/// On Windows, this retreives the underlying handle. On non-Windows, this is a
/// no-op.
file_t convertFDToNativeFile(int FD);
#ifndef _WIN32
inline file_t convertFDToNativeFile(int FD) { return FD; }
#endif
/// Return an open handle to standard in. On Unix, this is typically FD 0.
/// Returns kInvalidFile when the stream is closed.
file_t getStdinHandle();
/// Return an open handle to standard out. On Unix, this is typically FD 1.
/// Returns kInvalidFile when the stream is closed.
file_t getStdoutHandle();
/// Return an open handle to standard error. On Unix, this is typically FD 2.
/// Returns kInvalidFile when the stream is closed.
file_t getStderrHandle();
/// Reads \p Buf.size() bytes from \p FileHandle into \p Buf. Returns the number
/// of bytes actually read. On Unix, this is equivalent to `return ::read(FD,
/// Buf.data(), Buf.size())`, with error reporting. Returns 0 when reaching EOF.
///
/// @param FileHandle File to read from.
/// @param Buf Buffer to read into.
/// @returns The number of bytes read, or error.
Expected<size_t> readNativeFile(file_t FileHandle, MutableArrayRef<char> Buf);
/// Default chunk size for \a readNativeFileToEOF().
enum : size_t { DefaultReadChunkSize = 4 * 4096 };
/// Reads from \p FileHandle until EOF, appending to \p Buffer in chunks of
/// size \p ChunkSize.
///
/// This calls \a readNativeFile() in a loop. On Error, previous chunks that
/// were read successfully are left in \p Buffer and returned.
///
/// Note: For reading the final chunk at EOF, \p Buffer's capacity needs extra
/// storage of \p ChunkSize.
///
/// \param FileHandle File to read from.
/// \param Buffer Where to put the file content.
/// \param ChunkSize Size of chunks.
/// \returns The error if EOF was not found.
Error readNativeFileToEOF(file_t FileHandle, SmallVectorImpl<char> &Buffer,
ssize_t ChunkSize = DefaultReadChunkSize);
/// Reads \p Buf.size() bytes from \p FileHandle at offset \p Offset into \p
/// Buf. If 'pread' is available, this will use that, otherwise it will use
/// 'lseek'. Returns the number of bytes actually read. Returns 0 when reaching
/// EOF.
///
/// @param FileHandle File to read from.
/// @param Buf Buffer to read into.
/// @param Offset Offset into the file at which the read should occur.
/// @returns The number of bytes read, or error.
Expected<size_t> readNativeFileSlice(file_t FileHandle,
MutableArrayRef<char> Buf,
uint64_t Offset);
/// @brief Opens the file with the given name in a write-only or read-write
/// mode, returning its open file descriptor. If the file does not exist, it
/// is created.
///
/// The caller is responsible for closing the file descriptor once they are
/// finished with it.
///
/// @param Name The path of the file to open, relative or absolute.
/// @param ResultFD If the file could be opened successfully, its descriptor
/// is stored in this location. Otherwise, this is set to -1.
/// @param Flags Additional flags used to determine whether the file should be
/// opened in, for example, read-write or in write-only mode.
/// @param Mode The access permissions of the file, represented in octal.
/// @returns errc::success if \a Name has been opened, otherwise a
/// platform-specific error_code.
inline std::error_code
openFileForWrite(const Twine &Name, int &ResultFD,
CreationDisposition Disp = CD_CreateAlways,
OpenFlags Flags = OF_None, unsigned Mode = 0666) {
return openFile(Name, ResultFD, Disp, FA_Write, Flags, Mode);
}
/// @brief Opens the file with the given name in a write-only or read-write
/// mode, returning its open file descriptor. If the file does not exist, it
/// is created.
///
/// The caller is responsible for closing the freeing the file once they are
/// finished with it.
///
/// @param Name The path of the file to open, relative or absolute.
/// @param Flags Additional flags used to determine whether the file should be
/// opened in, for example, read-write or in write-only mode.
/// @param Mode The access permissions of the file, represented in octal.
/// @returns a platform-specific file descriptor if \a Name has been opened,
/// otherwise an error object.
inline Expected<file_t> openNativeFileForWrite(const Twine &Name,
CreationDisposition Disp,
OpenFlags Flags,
unsigned Mode = 0666) {
return openNativeFile(Name, Disp, FA_Write, Flags, Mode);
}
/// @brief Opens the file with the given name in a write-only or read-write
/// mode, returning its open file descriptor. If the file does not exist, it
/// is created.
///
/// The caller is responsible for closing the file descriptor once they are
/// finished with it.
///
/// @param Name The path of the file to open, relative or absolute.
/// @param ResultFD If the file could be opened successfully, its descriptor
/// is stored in this location. Otherwise, this is set to -1.
/// @param Flags Additional flags used to determine whether the file should be
/// opened in, for example, read-write or in write-only mode.
/// @param Mode The access permissions of the file, represented in octal.
/// @returns errc::success if \a Name has been opened, otherwise a
/// platform-specific error_code.
inline std::error_code openFileForReadWrite(const Twine &Name, int &ResultFD,
CreationDisposition Disp,
OpenFlags Flags,
unsigned Mode = 0666) {
return openFile(Name, ResultFD, Disp, FA_Write | FA_Read, Flags, Mode);
}
/// @brief Opens the file with the given name in a write-only or read-write
/// mode, returning its open file descriptor. If the file does not exist, it
/// is created.
///
/// The caller is responsible for closing the freeing the file once they are
/// finished with it.
///
/// @param Name The path of the file to open, relative or absolute.
/// @param Flags Additional flags used to determine whether the file should be
/// opened in, for example, read-write or in write-only mode.
/// @param Mode The access permissions of the file, represented in octal.
/// @returns a platform-specific file descriptor if \a Name has been opened,
/// otherwise an error object.
inline Expected<file_t> openNativeFileForReadWrite(const Twine &Name,
CreationDisposition Disp,
OpenFlags Flags,
unsigned Mode = 0666) {
return openNativeFile(Name, Disp, FA_Write | FA_Read, Flags, Mode);
}
/// @brief Opens the file with the given name in a read-only mode, returning
/// its open file descriptor.
///
/// The caller is responsible for closing the file descriptor once they are
/// finished with it.
///
/// @param Name The path of the file to open, relative or absolute.
/// @param ResultFD If the file could be opened successfully, its descriptor
/// is stored in this location. Otherwise, this is set to -1.
/// @param RealPath If nonnull, extra work is done to determine the real path
/// of the opened file, and that path is stored in this
/// location.
/// @returns errc::success if \a Name has been opened, otherwise a
/// platform-specific error_code.
std::error_code openFileForRead(const Twine &Name, int &ResultFD,
OpenFlags Flags = OF_None,
SmallVectorImpl<char> *RealPath = nullptr);
/// @brief Opens the file with the given name in a read-only mode, returning
/// its open file descriptor.
///
/// The caller is responsible for closing the freeing the file once they are
/// finished with it.
///
/// @param Name The path of the file to open, relative or absolute.
/// @param RealPath If nonnull, extra work is done to determine the real path
/// of the opened file, and that path is stored in this
/// location.
/// @returns a platform-specific file descriptor if \a Name has been opened,
/// otherwise an error object.
Expected<file_t>
openNativeFileForRead(const Twine &Name, OpenFlags Flags = OF_None,
SmallVectorImpl<char> *RealPath = nullptr);
/// Try to locks the file during the specified time.
///
/// This function implements advisory locking on entire file. If it returns
/// <em>errc::success</em>, the file is locked by the calling process. Until the
/// process unlocks the file by calling \a unlockFile, all attempts to lock the
/// same file will fail/block. The process that locked the file may assume that
/// none of other processes read or write this file, provided that all processes
/// lock the file prior to accessing its content.
///
/// @param FD The descriptor representing the file to lock.
/// @param Timeout Time in milliseconds that the process should wait before
/// reporting lock failure. Zero value means try to get lock only
/// once.
/// @returns errc::success if lock is successfully obtained,
/// errc::no_lock_available if the file cannot be locked, or platform-specific
/// error_code otherwise.
///
/// @note Care should be taken when using this function in a multithreaded
/// context, as it may not prevent other threads in the same process from
/// obtaining a lock on the same file, even if they are using a different file
/// descriptor.
std::error_code
tryLockFile(int FD,
std::chrono::milliseconds Timeout = std::chrono::milliseconds(0));
/// Lock the file.
///
/// This function acts as @ref tryLockFile but it waits infinitely.
std::error_code lockFile(int FD);
/// Unlock the file.
///
/// @param FD The descriptor representing the file to unlock.
/// @returns errc::success if lock is successfully released or platform-specific
/// error_code otherwise.
std::error_code unlockFile(int FD);
/// @brief Close the file object. This should be used instead of ::close for
/// portability. On error, the caller should assume the file is closed, as is
/// the case for Process::SafelyCloseFileDescriptor
///
/// @param F On input, this is the file to close. On output, the file is
/// set to kInvalidFile.
///
/// @returns An error code if closing the file failed. Typically, an error here
/// means that the filesystem may have failed to perform some buffered writes.
std::error_code closeFile(file_t &F);
#ifdef LLVM_ON_UNIX
/// @brief Change ownership of a file.
///
/// @param Owner The owner of the file to change to.
/// @param Group The group of the file to change to.
/// @returns errc::success if successfully updated file ownership, otherwise an
/// error code is returned.
std::error_code changeFileOwnership(int FD, uint32_t Owner, uint32_t Group);
#endif
/// RAII class that facilitates file locking.
class FileLocker {
int FD; ///< Locked file handle.
FileLocker(int FD) : FD(FD) {}
friend class llvm::raw_fd_ostream;
public:
FileLocker(const FileLocker &L) = delete;
FileLocker(FileLocker &&L) : FD(L.FD) { L.FD = -1; }
~FileLocker() {
if (FD != -1)
unlockFile(FD);
}
FileLocker &operator=(FileLocker &&L) {
FD = L.FD;
L.FD = -1;
return *this;
}
FileLocker &operator=(const FileLocker &L) = delete;
std::error_code unlock() {
if (FD != -1) {
std::error_code Result = unlockFile(FD);
FD = -1;
return Result;
}
return std::error_code();
}
};
std::error_code getUniqueID(const Twine Path, UniqueID &Result);
/// Get disk space usage information.
///
/// Note: Users must be careful about "Time Of Check, Time Of Use" kind of bug.
/// Note: Windows reports results according to the quota allocated to the user.
///
/// @param Path Input path.
/// @returns a space_info structure filled with the capacity, free, and
/// available space on the device \a Path is on. A platform specific error_code
/// is returned on error.
ErrorOr<space_info> disk_space(const Twine &Path);
/// This class represents a memory mapped file. It is based on
/// boost::iostreams::mapped_file.
class mapped_file_region {
public:
enum mapmode {
readonly, ///< May only access map via const_data as read only.
readwrite, ///< May access map via data and modify it. Written to path.
priv ///< May modify via data, but changes are lost on destruction.
};
private:
/// Platform-specific mapping state.
size_t Size = 0;
void *Mapping = nullptr;
#ifdef _WIN32
sys::fs::file_t FileHandle = nullptr;
#endif
mapmode Mode = readonly;
void copyFrom(const mapped_file_region &Copied) {
Size = Copied.Size;
Mapping = Copied.Mapping;
#ifdef _WIN32
FileHandle = Copied.FileHandle;
#endif
Mode = Copied.Mode;
}
void moveFromImpl(mapped_file_region &Moved) {
copyFrom(Moved);
Moved.copyFrom(mapped_file_region());
}
void unmapImpl();
void dontNeedImpl();
std::error_code init(sys::fs::file_t FD, uint64_t Offset, mapmode Mode);
public:
mapped_file_region() = default;
mapped_file_region(mapped_file_region &&Moved) { moveFromImpl(Moved); }
mapped_file_region &operator=(mapped_file_region &&Moved) {
unmap();
moveFromImpl(Moved);
return *this;
}
mapped_file_region(const mapped_file_region &) = delete;
mapped_file_region &operator=(const mapped_file_region &) = delete;
/// \param fd An open file descriptor to map. Does not take ownership of fd.
mapped_file_region(sys::fs::file_t fd, mapmode mode, size_t length, uint64_t offset,
std::error_code &ec);
~mapped_file_region() { unmapImpl(); }
/// Check if this is a valid mapping.
explicit operator bool() const { return Mapping; }
/// Unmap.
void unmap() {
unmapImpl();
copyFrom(mapped_file_region());
}
void dontNeed() { dontNeedImpl(); }
size_t size() const;
char *data() const;
/// Get a const view of the data. Modifying this memory has undefined
/// behavior.
const char *const_data() const;
/// \returns The minimum alignment offset must be.
static int alignment();
};
/// Return the path to the main executable, given the value of argv[0] from
/// program startup and the address of main itself. In extremis, this function
/// may fail and return an empty path.
std::string getMainExecutable(const char *argv0, void *MainExecAddr);
/// @}
/// @name Iterators
/// @{
/// directory_entry - A single entry in a directory.
class directory_entry {
// FIXME: different platforms make different information available "for free"
// when traversing a directory. The design of this class wraps most of the
// information in basic_file_status, so on platforms where we can't populate
// that whole structure, callers end up paying for a stat().
// std::filesystem::directory_entry may be a better model.
std::string Path;
file_type Type = file_type::type_unknown; // Most platforms can provide this.
bool FollowSymlinks = true; // Affects the behavior of status().
basic_file_status Status; // If available.
public:
explicit directory_entry(const Twine &Path, bool FollowSymlinks = true,
file_type Type = file_type::type_unknown,
basic_file_status Status = basic_file_status())
: Path(Path.str()), Type(Type), FollowSymlinks(FollowSymlinks),
Status(Status) {}
directory_entry() = default;
void replace_filename(const Twine &Filename, file_type Type,
basic_file_status Status = basic_file_status());
const std::string &path() const { return Path; }
// Get basic information about entry file (a subset of fs::status()).
// On most platforms this is a stat() call.
// On windows the information was already retrieved from the directory.
ErrorOr<basic_file_status> status() const;
// Get the type of this file.
// On most platforms (Linux/Mac/Windows/BSD), this was already retrieved.
// On some platforms (e.g. Solaris) this is a stat() call.
file_type type() const {
if (Type != file_type::type_unknown)
return Type;
auto S = status();
return S ? S->type() : file_type::type_unknown;
}
bool operator==(const directory_entry& RHS) const { return Path == RHS.Path; }
bool operator!=(const directory_entry& RHS) const { return !(*this == RHS); }
bool operator< (const directory_entry& RHS) const;
bool operator<=(const directory_entry& RHS) const;
bool operator> (const directory_entry& RHS) const;
bool operator>=(const directory_entry& RHS) const;
};
namespace detail {
struct DirIterState;
std::error_code directory_iterator_construct(DirIterState &, StringRef, bool);
std::error_code directory_iterator_increment(DirIterState &);
std::error_code directory_iterator_destruct(DirIterState &);
/// Keeps state for the directory_iterator.
struct DirIterState {
~DirIterState() {
directory_iterator_destruct(*this);
}
intptr_t IterationHandle = 0;
directory_entry CurrentEntry;
};
} // end namespace detail
/// directory_iterator - Iterates through the entries in path. There is no
/// operator++ because we need an error_code. If it's really needed we can make
/// it call report_fatal_error on error.
class directory_iterator {
std::shared_ptr<detail::DirIterState> State;
bool FollowSymlinks = true;
public:
explicit directory_iterator(const Twine &path, std::error_code &ec,
bool follow_symlinks = true)
: FollowSymlinks(follow_symlinks) {
State = std::make_shared<detail::DirIterState>();
SmallString<128> path_storage;
ec = detail::directory_iterator_construct(
*State, path.toStringRef(path_storage), FollowSymlinks);
}
explicit directory_iterator(const directory_entry &de, std::error_code &ec,
bool follow_symlinks = true)
: FollowSymlinks(follow_symlinks) {
State = std::make_shared<detail::DirIterState>();
ec = detail::directory_iterator_construct(
*State, de.path(), FollowSymlinks);
}
/// Construct end iterator.
directory_iterator() = default;
// No operator++ because we need error_code.
directory_iterator &increment(std::error_code &ec) {
ec = directory_iterator_increment(*State);
return *this;
}
const directory_entry &operator*() const { return State->CurrentEntry; }
const directory_entry *operator->() const { return &State->CurrentEntry; }
bool operator==(const directory_iterator &RHS) const {
if (State == RHS.State)
return true;
if (!RHS.State)
return State->CurrentEntry == directory_entry();
if (!State)
return RHS.State->CurrentEntry == directory_entry();
return State->CurrentEntry == RHS.State->CurrentEntry;
}
bool operator!=(const directory_iterator &RHS) const {
return !(*this == RHS);
}
};
namespace detail {
/// Keeps state for the recursive_directory_iterator.
struct RecDirIterState {
std::stack<directory_iterator, std::vector<directory_iterator>> Stack;
uint16_t Level = 0;
bool HasNoPushRequest = false;
};
} // end namespace detail
/// recursive_directory_iterator - Same as directory_iterator except for it
/// recurses down into child directories.
class recursive_directory_iterator {
std::shared_ptr<detail::RecDirIterState> State;
bool Follow;
public:
recursive_directory_iterator() = default;
explicit recursive_directory_iterator(const Twine &path, std::error_code &ec,
bool follow_symlinks = true)
: State(std::make_shared<detail::RecDirIterState>()),
Follow(follow_symlinks) {
State->Stack.push(directory_iterator(path, ec, Follow));
if (State->Stack.top() == directory_iterator())
State.reset();
}
// No operator++ because we need error_code.
recursive_directory_iterator &increment(std::error_code &ec) {
const directory_iterator end_itr = {};
if (State->HasNoPushRequest)
State->HasNoPushRequest = false;
else {
file_type type = State->Stack.top()->type();
if (type == file_type::symlink_file && Follow) {
// Resolve the symlink: is it a directory to recurse into?
ErrorOr<basic_file_status> status = State->Stack.top()->status();
if (status)
type = status->type();
// Otherwise broken symlink, and we'll continue.
}
if (type == file_type::directory_file) {
State->Stack.push(directory_iterator(*State->Stack.top(), ec, Follow));
if (State->Stack.top() != end_itr) {
++State->Level;
return *this;
}
State->Stack.pop();
}
}
while (!State->Stack.empty()
&& State->Stack.top().increment(ec) == end_itr) {
State->Stack.pop();
--State->Level;
}
// Check if we are done. If so, create an end iterator.
if (State->Stack.empty())
State.reset();
return *this;
}
const directory_entry &operator*() const { return *State->Stack.top(); }
const directory_entry *operator->() const { return &*State->Stack.top(); }
// observers
/// Gets the current level. Starting path is at level 0.
int level() const { return State->Level; }
/// Returns true if no_push has been called for this directory_entry.
bool no_push_request() const { return State->HasNoPushRequest; }
// modifiers
/// Goes up one level if Level > 0.
void pop() {
assert(State && "Cannot pop an end iterator!");
assert(State->Level > 0 && "Cannot pop an iterator with level < 1");
const directory_iterator end_itr = {};
std::error_code ec;
do {
if (ec)
report_fatal_error("Error incrementing directory iterator.");
State->Stack.pop();
--State->Level;
} while (!State->Stack.empty()
&& State->Stack.top().increment(ec) == end_itr);
// Check if we are done. If so, create an end iterator.
if (State->Stack.empty())
State.reset();
}
/// Does not go down into the current directory_entry.
void no_push() { State->HasNoPushRequest = true; }
bool operator==(const recursive_directory_iterator &RHS) const {
return State == RHS.State;
}
bool operator!=(const recursive_directory_iterator &RHS) const {
return !(*this == RHS);
}
};
/// @}
} // end namespace fs
} // end namespace sys
} // end namespace llvm
#endif // LLVM_SUPPORT_FILESYSTEM_H
PK hwFZd"�e� � Support/ExitCodes.hnu �[��� //===-- llvm/Support/ExitCodes.h - Exit codes for exit() -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file contains definitions of exit codes for exit() function. They are
/// either defined by sysexits.h if it is supported, or defined here if
/// sysexits.h is not supported.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_EXITCODES_H
#define LLVM_SUPPORT_EXITCODES_H
#include "llvm/Config/llvm-config.h"
#if HAVE_SYSEXITS_H
#include <sysexits.h>
#elif __MVS__ || defined(_WIN32)
// <sysexits.h> does not exist on z/OS and Windows. The only value used in LLVM
// is EX_IOERR, which is used to signal a special error condition (broken pipe).
// Define the macro with its usual value from BSD systems, which is chosen to
// not clash with more standard exit codes like 1.
#define EX_IOERR 74
#elif LLVM_ON_UNIX
#error Exit code EX_IOERR not available
#endif
#endif
PK hwFZE<X X Support/DivisionByConstantInfo.hnu �[��� //===- llvm/Support/DivisionByConstantInfo.h ---------------------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// This file implements support for optimizing divisions by a constant
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_DIVISIONBYCONSTANTINFO_H
#define LLVM_SUPPORT_DIVISIONBYCONSTANTINFO_H
#include "llvm/ADT/APInt.h"
namespace llvm {
/// Magic data for optimising signed division by a constant.
struct SignedDivisionByConstantInfo {
static SignedDivisionByConstantInfo get(const APInt &D);
APInt Magic; ///< magic number
unsigned ShiftAmount; ///< shift amount
};
/// Magic data for optimising unsigned division by a constant.
struct UnsignedDivisionByConstantInfo {
static UnsignedDivisionByConstantInfo
get(const APInt &D, unsigned LeadingZeros = 0,
bool AllowEvenDivisorOptimization = true);
APInt Magic; ///< magic number
bool IsAdd; ///< add indicator
unsigned PostShift; ///< post-shift amount
unsigned PreShift; ///< pre-shift amount
};
} // namespace llvm
#endif
PK hwFZJ� � Support/ELFAttributeParser.hnu �[��� //===- ELF AttributeParser.h - ELF Attribute Parser -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ELFATTRIBUTEPARSER_H
#define LLVM_SUPPORT_ELFATTRIBUTEPARSER_H
#include "ELFAttributes.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/Support/DataExtractor.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <optional>
#include <unordered_map>
namespace llvm {
class StringRef;
class ScopedPrinter;
class ELFAttributeParser {
StringRef vendor;
std::unordered_map<unsigned, unsigned> attributes;
std::unordered_map<unsigned, StringRef> attributesStr;
virtual Error handler(uint64_t tag, bool &handled) = 0;
protected:
ScopedPrinter *sw;
TagNameMap tagToStringMap;
DataExtractor de{ArrayRef<uint8_t>{}, true, 0};
DataExtractor::Cursor cursor{0};
void printAttribute(unsigned tag, unsigned value, StringRef valueDesc);
Error parseStringAttribute(const char *name, unsigned tag,
ArrayRef<const char *> strings);
Error parseAttributeList(uint32_t length);
void parseIndexList(SmallVectorImpl<uint8_t> &indexList);
Error parseSubsection(uint32_t length);
void setAttributeString(unsigned tag, StringRef value) {
attributesStr.emplace(tag, value);
}
public:
virtual ~ELFAttributeParser() { static_cast<void>(!cursor.takeError()); }
Error integerAttribute(unsigned tag);
Error stringAttribute(unsigned tag);
ELFAttributeParser(ScopedPrinter *sw, TagNameMap tagNameMap, StringRef vendor)
: vendor(vendor), sw(sw), tagToStringMap(tagNameMap) {}
ELFAttributeParser(TagNameMap tagNameMap, StringRef vendor)
: vendor(vendor), sw(nullptr), tagToStringMap(tagNameMap) {}
Error parse(ArrayRef<uint8_t> section, support::endianness endian);
std::optional<unsigned> getAttributeValue(unsigned tag) const {
auto I = attributes.find(tag);
if (I == attributes.end())
return std::nullopt;
return I->second;
}
std::optional<StringRef> getAttributeString(unsigned tag) const {
auto I = attributesStr.find(tag);
if (I == attributesStr.end())
return std::nullopt;
return I->second;
}
};
} // namespace llvm
#endif
PK hwFZ�Nk�� � Support/X86FoldTablesUtils.hnu �[��� //===-- X86FoldTablesUtils.h ------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_X86FOLDTABLESUTILS_H
#define LLVM_SUPPORT_X86FOLDTABLESUTILS_H
namespace llvm {
enum {
// Select which memory operand is being unfolded.
// (stored in bits 0 - 2)
TB_INDEX_0 = 0,
TB_INDEX_1 = 1,
TB_INDEX_2 = 2,
TB_INDEX_3 = 3,
TB_INDEX_4 = 4,
TB_INDEX_MASK = 0x7,
// Do not insert the reverse map (MemOp -> RegOp) into the table.
// This may be needed because there is a many -> one mapping.
TB_NO_REVERSE = 1 << 3,
// Do not insert the forward map (RegOp -> MemOp) into the table.
// This is needed for Native Client, which prohibits branch
// instructions from using a memory operand.
TB_NO_FORWARD = 1 << 4,
TB_FOLDED_LOAD = 1 << 5,
TB_FOLDED_STORE = 1 << 6,
TB_FOLDED_BCAST = 1 << 7,
// Minimum alignment required for load/store.
// Used for RegOp->MemOp conversion. Encoded as Log2(Align)
// (stored in bits 9 - 11)
TB_ALIGN_SHIFT = 8,
TB_ALIGN_1 = 0 << TB_ALIGN_SHIFT,
TB_ALIGN_16 = 4 << TB_ALIGN_SHIFT,
TB_ALIGN_32 = 5 << TB_ALIGN_SHIFT,
TB_ALIGN_64 = 6 << TB_ALIGN_SHIFT,
TB_ALIGN_MASK = 0x7 << TB_ALIGN_SHIFT,
// Broadcast type.
// (stored in bits 12 - 13)
TB_BCAST_TYPE_SHIFT = TB_ALIGN_SHIFT + 3,
TB_BCAST_D = 0 << TB_BCAST_TYPE_SHIFT,
TB_BCAST_Q = 1 << TB_BCAST_TYPE_SHIFT,
TB_BCAST_SS = 2 << TB_BCAST_TYPE_SHIFT,
TB_BCAST_SD = 3 << TB_BCAST_TYPE_SHIFT,
TB_BCAST_MASK = 0x3 << TB_BCAST_TYPE_SHIFT,
// Unused bits 14-15
};
} // namespace llvm
#endif // LLVM_SUPPORT_X86FOLDTABLESUTILS_H
PK hwFZ���� 5 5 Support/GraphWriter.hnu �[��� //===- llvm/Support/GraphWriter.h - Write graph to a .dot file --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines a simple interface that can be used to print out generic
// LLVM graphs to ".dot" files. "dot" is a tool that is part of the AT&T
// graphviz package (http://www.research.att.com/sw/tools/graphviz/) which can
// be used to turn the files output by this interface into a variety of
// different graphics formats.
//
// Graphs do not need to implement any interface past what is already required
// by the GraphTraits template, but they can choose to implement specializations
// of the DOTGraphTraits template if they want to customize the graphs output in
// any way.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_GRAPHWRITER_H
#define LLVM_SUPPORT_GRAPHWRITER_H
#include "llvm/ADT/GraphTraits.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Support/DOTGraphTraits.h"
#include "llvm/Support/FileSystem.h"
#include "llvm/Support/raw_ostream.h"
#include <iterator>
#include <string>
#include <type_traits>
#include <vector>
namespace llvm {
namespace DOT { // Private functions...
std::string EscapeString(const std::string &Label);
/// Get a color string for this node number. Simply round-robin selects
/// from a reasonable number of colors.
StringRef getColorString(unsigned NodeNumber);
} // end namespace DOT
namespace GraphProgram {
enum Name {
DOT,
FDP,
NEATO,
TWOPI,
CIRCO
};
} // end namespace GraphProgram
bool DisplayGraph(StringRef Filename, bool wait = true,
GraphProgram::Name program = GraphProgram::DOT);
template<typename GraphType>
class GraphWriter {
raw_ostream &O;
const GraphType &G;
bool RenderUsingHTML = false;
using DOTTraits = DOTGraphTraits<GraphType>;
using GTraits = GraphTraits<GraphType>;
using NodeRef = typename GTraits::NodeRef;
using node_iterator = typename GTraits::nodes_iterator;
using child_iterator = typename GTraits::ChildIteratorType;
DOTTraits DTraits;
static_assert(std::is_pointer_v<NodeRef>,
"FIXME: Currently GraphWriter requires the NodeRef type to be "
"a pointer.\nThe pointer usage should be moved to "
"DOTGraphTraits, and removed from GraphWriter itself.");
// Writes the edge labels of the node to O and returns true if there are any
// edge labels not equal to the empty string "".
bool getEdgeSourceLabels(raw_ostream &O, NodeRef Node) {
child_iterator EI = GTraits::child_begin(Node);
child_iterator EE = GTraits::child_end(Node);
bool hasEdgeSourceLabels = false;
if (RenderUsingHTML)
O << "</tr><tr>";
for (unsigned i = 0; EI != EE && i != 64; ++EI, ++i) {
std::string label = DTraits.getEdgeSourceLabel(Node, EI);
if (label.empty())
continue;
hasEdgeSourceLabels = true;
if (RenderUsingHTML)
O << "<td colspan=\"1\" port=\"s" << i << "\">" << label << "</td>";
else {
if (i)
O << "|";
O << "<s" << i << ">" << DOT::EscapeString(label);
}
}
if (EI != EE && hasEdgeSourceLabels) {
if (RenderUsingHTML)
O << "<td colspan=\"1\" port=\"s64\">truncated...</td>";
else
O << "|<s64>truncated...";
}
return hasEdgeSourceLabels;
}
public:
GraphWriter(raw_ostream &o, const GraphType &g, bool SN) : O(o), G(g) {
DTraits = DOTTraits(SN);
RenderUsingHTML = DTraits.renderNodesUsingHTML();
}
void writeGraph(const std::string &Title = "") {
// Output the header for the graph...
writeHeader(Title);
// Emit all of the nodes in the graph...
writeNodes();
// Output any customizations on the graph
DOTGraphTraits<GraphType>::addCustomGraphFeatures(G, *this);
// Output the end of the graph
writeFooter();
}
void writeHeader(const std::string &Title) {
std::string GraphName(DTraits.getGraphName(G));
if (!Title.empty())
O << "digraph \"" << DOT::EscapeString(Title) << "\" {\n";
else if (!GraphName.empty())
O << "digraph \"" << DOT::EscapeString(GraphName) << "\" {\n";
else
O << "digraph unnamed {\n";
if (DTraits.renderGraphFromBottomUp())
O << "\trankdir=\"BT\";\n";
if (!Title.empty())
O << "\tlabel=\"" << DOT::EscapeString(Title) << "\";\n";
else if (!GraphName.empty())
O << "\tlabel=\"" << DOT::EscapeString(GraphName) << "\";\n";
O << DTraits.getGraphProperties(G);
O << "\n";
}
void writeFooter() {
// Finish off the graph
O << "}\n";
}
void writeNodes() {
// Loop over the graph, printing it out...
for (const auto Node : nodes<GraphType>(G))
if (!isNodeHidden(Node))
writeNode(Node);
}
bool isNodeHidden(NodeRef Node) { return DTraits.isNodeHidden(Node, G); }
void writeNode(NodeRef Node) {
std::string NodeAttributes = DTraits.getNodeAttributes(Node, G);
O << "\tNode" << static_cast<const void *>(Node) << " [shape=";
if (RenderUsingHTML)
O << "none,";
else
O << "record,";
if (!NodeAttributes.empty()) O << NodeAttributes << ",";
O << "label=";
if (RenderUsingHTML) {
// Count the numbewr of edges out of the node to determine how
// many columns to span (max 64)
unsigned ColSpan = 0;
child_iterator EI = GTraits::child_begin(Node);
child_iterator EE = GTraits::child_end(Node);
for (; EI != EE && ColSpan != 64; ++EI, ++ColSpan)
;
if (ColSpan == 0)
ColSpan = 1;
// Include truncated messages when counting.
if (EI != EE)
++ColSpan;
O << "<<table border=\"0\" cellborder=\"1\" cellspacing=\"0\""
<< " cellpadding=\"0\"><tr><td align=\"text\" colspan=\"" << ColSpan
<< "\">";
} else
O << "\"{";
if (!DTraits.renderGraphFromBottomUp()) {
if (RenderUsingHTML)
O << DTraits.getNodeLabel(Node, G) << "</td>";
else
O << DOT::EscapeString(DTraits.getNodeLabel(Node, G));
// If we should include the address of the node in the label, do so now.
std::string Id = DTraits.getNodeIdentifierLabel(Node, G);
if (!Id.empty())
O << "|" << DOT::EscapeString(Id);
std::string NodeDesc = DTraits.getNodeDescription(Node, G);
if (!NodeDesc.empty())
O << "|" << DOT::EscapeString(NodeDesc);
}
std::string edgeSourceLabels;
raw_string_ostream EdgeSourceLabels(edgeSourceLabels);
bool hasEdgeSourceLabels = getEdgeSourceLabels(EdgeSourceLabels, Node);
if (hasEdgeSourceLabels) {
if (!DTraits.renderGraphFromBottomUp())
if (!RenderUsingHTML)
O << "|";
if (RenderUsingHTML)
O << EdgeSourceLabels.str();
else
O << "{" << EdgeSourceLabels.str() << "}";
if (DTraits.renderGraphFromBottomUp())
if (!RenderUsingHTML)
O << "|";
}
if (DTraits.renderGraphFromBottomUp()) {
if (RenderUsingHTML)
O << DTraits.getNodeLabel(Node, G);
else
O << DOT::EscapeString(DTraits.getNodeLabel(Node, G));
// If we should include the address of the node in the label, do so now.
std::string Id = DTraits.getNodeIdentifierLabel(Node, G);
if (!Id.empty())
O << "|" << DOT::EscapeString(Id);
std::string NodeDesc = DTraits.getNodeDescription(Node, G);
if (!NodeDesc.empty())
O << "|" << DOT::EscapeString(NodeDesc);
}
if (DTraits.hasEdgeDestLabels()) {
O << "|{";
unsigned i = 0, e = DTraits.numEdgeDestLabels(Node);
for (; i != e && i != 64; ++i) {
if (i) O << "|";
O << "<d" << i << ">"
<< DOT::EscapeString(DTraits.getEdgeDestLabel(Node, i));
}
if (i != e)
O << "|<d64>truncated...";
O << "}";
}
if (RenderUsingHTML)
O << "</tr></table>>";
else
O << "}\"";
O << "];\n"; // Finish printing the "node" line
// Output all of the edges now
child_iterator EI = GTraits::child_begin(Node);
child_iterator EE = GTraits::child_end(Node);
for (unsigned i = 0; EI != EE && i != 64; ++EI, ++i)
if (!DTraits.isNodeHidden(*EI, G))
writeEdge(Node, i, EI);
for (; EI != EE; ++EI)
if (!DTraits.isNodeHidden(*EI, G))
writeEdge(Node, 64, EI);
}
void writeEdge(NodeRef Node, unsigned edgeidx, child_iterator EI) {
if (NodeRef TargetNode = *EI) {
int DestPort = -1;
if (DTraits.edgeTargetsEdgeSource(Node, EI)) {
child_iterator TargetIt = DTraits.getEdgeTarget(Node, EI);
// Figure out which edge this targets...
unsigned Offset =
(unsigned)std::distance(GTraits::child_begin(TargetNode), TargetIt);
DestPort = static_cast<int>(Offset);
}
if (DTraits.getEdgeSourceLabel(Node, EI).empty())
edgeidx = -1;
emitEdge(static_cast<const void*>(Node), edgeidx,
static_cast<const void*>(TargetNode), DestPort,
DTraits.getEdgeAttributes(Node, EI, G));
}
}
/// emitSimpleNode - Outputs a simple (non-record) node
void emitSimpleNode(const void *ID, const std::string &Attr,
const std::string &Label, unsigned NumEdgeSources = 0,
const std::vector<std::string> *EdgeSourceLabels = nullptr) {
O << "\tNode" << ID << "[ ";
if (!Attr.empty())
O << Attr << ",";
O << " label =\"";
if (NumEdgeSources) O << "{";
O << DOT::EscapeString(Label);
if (NumEdgeSources) {
O << "|{";
for (unsigned i = 0; i != NumEdgeSources; ++i) {
if (i) O << "|";
O << "<s" << i << ">";
if (EdgeSourceLabels) O << DOT::EscapeString((*EdgeSourceLabels)[i]);
}
O << "}}";
}
O << "\"];\n";
}
/// emitEdge - Output an edge from a simple node into the graph...
void emitEdge(const void *SrcNodeID, int SrcNodePort,
const void *DestNodeID, int DestNodePort,
const std::string &Attrs) {
if (SrcNodePort > 64) return; // Eminating from truncated part?
if (DestNodePort > 64) DestNodePort = 64; // Targeting the truncated part?
O << "\tNode" << SrcNodeID;
if (SrcNodePort >= 0)
O << ":s" << SrcNodePort;
O << " -> Node" << DestNodeID;
if (DestNodePort >= 0 && DTraits.hasEdgeDestLabels())
O << ":d" << DestNodePort;
if (!Attrs.empty())
O << "[" << Attrs << "]";
O << ";\n";
}
/// getOStream - Get the raw output stream into the graph file. Useful to
/// write fancy things using addCustomGraphFeatures().
raw_ostream &getOStream() {
return O;
}
};
template<typename GraphType>
raw_ostream &WriteGraph(raw_ostream &O, const GraphType &G,
bool ShortNames = false,
const Twine &Title = "") {
// Start the graph emission process...
GraphWriter<GraphType> W(O, G, ShortNames);
// Emit the graph.
W.writeGraph(Title.str());
return O;
}
std::string createGraphFilename(const Twine &Name, int &FD);
/// Writes graph into a provided @c Filename.
/// If @c Filename is empty, generates a random one.
/// \return The resulting filename, or an empty string if writing
/// failed.
template <typename GraphType>
std::string WriteGraph(const GraphType &G, const Twine &Name,
bool ShortNames = false,
const Twine &Title = "",
std::string Filename = "") {
int FD;
if (Filename.empty()) {
Filename = createGraphFilename(Name.str(), FD);
} else {
std::error_code EC = sys::fs::openFileForWrite(
Filename, FD, sys::fs::CD_CreateAlways, sys::fs::OF_Text);
// Writing over an existing file is not considered an error.
if (EC == std::errc::file_exists) {
errs() << "file exists, overwriting" << "\n";
} else if (EC) {
errs() << "error writing into file" << "\n";
return "";
} else {
errs() << "writing to the newly created file " << Filename << "\n";
}
}
raw_fd_ostream O(FD, /*shouldClose=*/ true);
if (FD == -1) {
errs() << "error opening file '" << Filename << "' for writing!\n";
return "";
}
llvm::WriteGraph(O, G, ShortNames, Title);
errs() << " done. \n";
return Filename;
}
/// DumpDotGraph - Just dump a dot graph to the user-provided file name.
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
template <typename GraphType>
LLVM_DUMP_METHOD void
dumpDotGraphToFile(const GraphType &G, const Twine &FileName,
const Twine &Title, bool ShortNames = false,
const Twine &Name = "") {
llvm::WriteGraph(G, Name, ShortNames, Title, FileName.str());
}
#endif
/// ViewGraph - Emit a dot graph, run 'dot', run gv on the postscript file,
/// then cleanup. For use from the debugger.
///
template<typename GraphType>
void ViewGraph(const GraphType &G, const Twine &Name,
bool ShortNames = false, const Twine &Title = "",
GraphProgram::Name Program = GraphProgram::DOT) {
std::string Filename = llvm::WriteGraph(G, Name, ShortNames, Title);
if (Filename.empty())
return;
DisplayGraph(Filename, false, Program);
}
} // end namespace llvm
#endif // LLVM_SUPPORT_GRAPHWRITER_H
PK hwFZ��RS� � Support/FormattedStream.hnu �[��� //===-- llvm/Support/FormattedStream.h - Formatted streams ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains raw_ostream implementations for streams to do
// things like pretty-print comments.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_FORMATTEDSTREAM_H
#define LLVM_SUPPORT_FORMATTEDSTREAM_H
#include "llvm/ADT/SmallString.h"
#include "llvm/Support/raw_ostream.h"
#include <utility>
namespace llvm {
/// formatted_raw_ostream - A raw_ostream that wraps another one and keeps track
/// of line and column position, allowing padding out to specific column
/// boundaries and querying the number of lines written to the stream. This
/// assumes that the contents of the stream is valid UTF-8 encoded text. This
/// doesn't attempt to handle everything Unicode can do (combining characters,
/// right-to-left markers, etc), but should cover the cases likely to appear in
/// source code or diagnostic messages.
class formatted_raw_ostream : public raw_ostream {
/// TheStream - The real stream we output to. We set it to be
/// unbuffered, since we're already doing our own buffering.
///
raw_ostream *TheStream;
/// Position - The current output column and line of the data that's
/// been flushed and the portion of the buffer that's been
/// scanned. The line and column scheme is zero-based.
///
std::pair<unsigned, unsigned> Position;
/// Scanned - This points to one past the last character in the
/// buffer we've scanned.
///
const char *Scanned;
/// PartialUTF8Char - Either empty or a prefix of a UTF-8 code unit sequence
/// for a Unicode scalar value which should be prepended to the buffer for the
/// next call to ComputePosition. This is needed when the buffer is flushed
/// when it ends part-way through the UTF-8 encoding of a Unicode scalar
/// value, so that we can compute the display width of the character once we
/// have the rest of it.
SmallString<4> PartialUTF8Char;
void write_impl(const char *Ptr, size_t Size) override;
/// current_pos - Return the current position within the stream,
/// not counting the bytes currently in the buffer.
uint64_t current_pos() const override {
// Our current position in the stream is all the contents which have been
// written to the underlying stream (*not* the current position of the
// underlying stream).
return TheStream->tell();
}
/// ComputePosition - Examine the given output buffer and figure out the new
/// position after output. This is safe to call multiple times on the same
/// buffer, as it records the most recently scanned character and resumes from
/// there when the buffer has not been flushed.
void ComputePosition(const char *Ptr, size_t size);
/// UpdatePosition - scan the characters in [Ptr, Ptr+Size), and update the
/// line and column numbers. Unlike ComputePosition, this must be called
/// exactly once on each region of the buffer.
void UpdatePosition(const char *Ptr, size_t Size);
void setStream(raw_ostream &Stream) {
releaseStream();
TheStream = &Stream;
// This formatted_raw_ostream inherits from raw_ostream, so it'll do its
// own buffering, and it doesn't need or want TheStream to do another
// layer of buffering underneath. Resize the buffer to what TheStream
// had been using, and tell TheStream not to do its own buffering.
if (size_t BufferSize = TheStream->GetBufferSize())
SetBufferSize(BufferSize);
else
SetUnbuffered();
TheStream->SetUnbuffered();
Scanned = nullptr;
}
public:
/// formatted_raw_ostream - Open the specified file for
/// writing. If an error occurs, information about the error is
/// put into ErrorInfo, and the stream should be immediately
/// destroyed; the string will be empty if no error occurred.
///
/// As a side effect, the given Stream is set to be Unbuffered.
/// This is because formatted_raw_ostream does its own buffering,
/// so it doesn't want another layer of buffering to be happening
/// underneath it.
///
formatted_raw_ostream(raw_ostream &Stream)
: TheStream(nullptr), Position(0, 0) {
setStream(Stream);
}
explicit formatted_raw_ostream() : TheStream(nullptr), Position(0, 0) {
Scanned = nullptr;
}
~formatted_raw_ostream() override {
flush();
releaseStream();
}
/// PadToColumn - Align the output to some column number. If the current
/// column is already equal to or more than NewCol, PadToColumn inserts one
/// space.
///
/// \param NewCol - The column to move to.
formatted_raw_ostream &PadToColumn(unsigned NewCol);
unsigned getColumn() {
// Calculate current position, taking buffer contents into account.
ComputePosition(getBufferStart(), GetNumBytesInBuffer());
return Position.first;
}
unsigned getLine() {
// Calculate current position, taking buffer contents into account.
ComputePosition(getBufferStart(), GetNumBytesInBuffer());
return Position.second;
}
raw_ostream &resetColor() override {
TheStream->resetColor();
return *this;
}
raw_ostream &reverseColor() override {
TheStream->reverseColor();
return *this;
}
raw_ostream &changeColor(enum Colors Color, bool Bold, bool BG) override {
TheStream->changeColor(Color, Bold, BG);
return *this;
}
bool is_displayed() const override {
return TheStream->is_displayed();
}
private:
void releaseStream() {
// Transfer the buffer settings from this raw_ostream back to the underlying
// stream.
if (!TheStream)
return;
if (size_t BufferSize = GetBufferSize())
TheStream->SetBufferSize(BufferSize);
else
TheStream->SetUnbuffered();
}
};
/// fouts() - This returns a reference to a formatted_raw_ostream for
/// standard output. Use it like: fouts() << "foo" << "bar";
formatted_raw_ostream &fouts();
/// ferrs() - This returns a reference to a formatted_raw_ostream for
/// standard error. Use it like: ferrs() << "foo" << "bar";
formatted_raw_ostream &ferrs();
/// fdbgs() - This returns a reference to a formatted_raw_ostream for
/// debug output. Use it like: fdbgs() << "foo" << "bar";
formatted_raw_ostream &fdbgs();
} // end llvm namespace
#endif
PK hwFZ��ެI I Support/xxhash.hnu �[��� /*
xxHash - Extremely Fast Hash algorithm
Header File
Copyright (C) 2012-2016, Yann Collet.
BSD 2-Clause License (http://www.opensource.org/licenses/bsd-license.php)
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above
copyright notice, this list of conditions and the following disclaimer
in the documentation and/or other materials provided with the
distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
You can contact the author at :
- xxHash source repository : https://github.com/Cyan4973/xxHash
*/
/* based on revision d2df04efcbef7d7f6886d345861e5dfda4edacc1 Removed
* everything but a simple interface for computing XXh64. */
#ifndef LLVM_SUPPORT_XXHASH_H
#define LLVM_SUPPORT_XXHASH_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
namespace llvm {
uint64_t xxHash64(llvm::StringRef Data);
uint64_t xxHash64(llvm::ArrayRef<uint8_t> Data);
uint64_t xxh3_64bits(ArrayRef<uint8_t> data);
inline uint64_t xxh3_64bits(StringRef data) {
return xxh3_64bits(ArrayRef(data.bytes_begin(), data.size()));
}
}
#endif
PK hwFZ�AG ? ? Support/Unicode.hnu �[��� //===- llvm/Support/Unicode.h - Unicode character properties -*- C++ -*-=====//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines functions that allow querying certain properties of Unicode
// characters.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_UNICODE_H
#define LLVM_SUPPORT_UNICODE_H
#include "llvm/ADT/SmallString.h"
#include <optional>
#include <string>
namespace llvm {
class StringRef;
namespace sys {
namespace unicode {
enum ColumnWidthErrors {
ErrorInvalidUTF8 = -2,
ErrorNonPrintableCharacter = -1
};
/// Determines if a character is likely to be displayed correctly on the
/// terminal. Exact implementation would have to depend on the specific
/// terminal, so we define the semantic that should be suitable for generic case
/// of a terminal capable to output Unicode characters.
///
/// Printable codepoints are those in the categories L, M, N, P, S and Zs
/// \return true if the character is considered printable.
bool isPrintable(int UCS);
// Formatting codepoints are codepoints in the Cf category.
bool isFormatting(int UCS);
/// Gets the number of positions the UTF8-encoded \p Text is likely to occupy
/// when output on a terminal ("character width"). This depends on the
/// implementation of the terminal, and there's no standard definition of
/// character width.
///
/// The implementation defines it in a way that is expected to be compatible
/// with a generic Unicode-capable terminal.
///
/// \return Character width:
/// * ErrorNonPrintableCharacter (-1) if \p Text contains non-printable
/// characters (as identified by isPrintable);
/// * 0 for each non-spacing and enclosing combining mark;
/// * 2 for each CJK character excluding halfwidth forms;
/// * 1 for each of the remaining characters.
int columnWidthUTF8(StringRef Text);
/// Fold input unicode character according the Simple unicode case folding
/// rules.
int foldCharSimple(int C);
/// Maps the name or the alias of a Unicode character to its associated
/// codepoints.
/// The names and aliases are derived from UnicodeData.txt and NameAliases.txt
/// For compatibility with the semantics of named character escape sequences in
/// C++, this mapping does an exact match sensitive to casing and spacing.
/// \return The codepoint of the corresponding character, if any.
std::optional<char32_t> nameToCodepointStrict(StringRef Name);
struct LooseMatchingResult {
char32_t CodePoint;
SmallString<64> Name;
};
std::optional<LooseMatchingResult> nameToCodepointLooseMatching(StringRef Name);
struct MatchForCodepointName {
std::string Name;
uint32_t Distance = 0;
char32_t Value = 0;
};
SmallVector<MatchForCodepointName>
nearestMatchesForCodepointName(StringRef Pattern, std::size_t MaxMatchesCount);
} // namespace unicode
} // namespace sys
} // namespace llvm
#endif
PK hwFZ]+r�N N Support/Mutex.hnu �[��� //===- llvm/Support/Mutex.h - Mutex Operating System Concept -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the llvm::sys::Mutex class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_MUTEX_H
#define LLVM_SUPPORT_MUTEX_H
#include "llvm/Support/Threading.h"
#include <cassert>
#include <mutex>
namespace llvm
{
namespace sys
{
/// SmartMutex - A mutex with a compile time constant parameter that
/// indicates whether this mutex should become a no-op when we're not
/// running in multithreaded mode.
template<bool mt_only>
class SmartMutex {
std::recursive_mutex impl;
unsigned acquired = 0;
public:
bool lock() {
if (!mt_only || llvm_is_multithreaded()) {
impl.lock();
return true;
}
// Single-threaded debugging code. This would be racy in
// multithreaded mode, but provides not basic checks in single
// threaded mode.
++acquired;
return true;
}
bool unlock() {
if (!mt_only || llvm_is_multithreaded()) {
impl.unlock();
return true;
}
// Single-threaded debugging code. This would be racy in
// multithreaded mode, but provides not basic checks in single
// threaded mode.
assert(acquired && "Lock not acquired before release!");
--acquired;
return true;
}
bool try_lock() {
if (!mt_only || llvm_is_multithreaded())
return impl.try_lock();
return true;
}
};
/// Mutex - A standard, always enforced mutex.
typedef SmartMutex<false> Mutex;
template <bool mt_only>
using SmartScopedLock = std::lock_guard<SmartMutex<mt_only>>;
typedef SmartScopedLock<false> ScopedLock;
}
}
#endif
PK hwFZ-��n� � Support/OptimizedStructLayout.hnu �[��� //===-- OptimizedStructLayout.h - Struct layout algorithm ---------*- C++ -*-=//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file provides an interface for laying out a sequence of fields
/// as a struct in a way that attempts to minimizes the total space
/// requirements of the struct while still satisfying the layout
/// requirements of the individual fields. The resulting layout may be
/// substantially more compact than simply laying out the fields in their
/// original order.
///
/// Fields may be pre-assigned fixed offsets. They may also be given sizes
/// that are not multiples of their alignments. There is no currently no
/// way to describe that a field has interior padding that other fields may
/// be allocated into.
///
/// This algorithm does not claim to be "optimal" for several reasons:
///
/// - First, it does not guarantee that the result is minimal in size.
/// There is no known efficient algoorithm to achieve minimality for
/// unrestricted inputs. Nonetheless, this algorithm
///
/// - Second, there are other ways that a struct layout could be optimized
/// besides space usage, such as locality. This layout may have a mixed
/// impact on locality: less overall memory may be used, but adjacent
/// fields in the original array may be moved further from one another.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_OPTIMIZEDSTRUCTLAYOUT_H
#define LLVM_SUPPORT_OPTIMIZEDSTRUCTLAYOUT_H
#include "llvm/Support/Alignment.h"
#include "llvm/ADT/ArrayRef.h"
#include <utility>
namespace llvm {
/// A field in a structure.
struct OptimizedStructLayoutField {
/// A special value for Offset indicating that the field can be moved
/// anywhere.
static constexpr uint64_t FlexibleOffset = ~(uint64_t)0;
OptimizedStructLayoutField(const void *Id, uint64_t Size, Align Alignment,
uint64_t FixedOffset = FlexibleOffset)
: Offset(FixedOffset), Size(Size), Id(Id), Alignment(Alignment) {
assert(Size > 0 && "adding an empty field to the layout");
}
/// The offset of this field in the final layout. If this is
/// initialized to FlexibleOffset, layout will overwrite it with
/// the assigned offset of the field.
uint64_t Offset;
/// The required size of this field in bytes. Does not have to be
/// a multiple of Alignment. Must be non-zero.
uint64_t Size;
/// A opaque value which uniquely identifies this field.
const void *Id;
/// Private scratch space for the algorithm. The implementation
/// must treat this as uninitialized memory on entry.
void *Scratch;
/// The required alignment of this field.
Align Alignment;
/// Return true if this field has been assigned a fixed offset.
/// After layout, this will be true of all the fields.
bool hasFixedOffset() const {
return (Offset != FlexibleOffset);
}
/// Given that this field has a fixed offset, return the offset
/// of the first byte following it.
uint64_t getEndOffset() const {
assert(hasFixedOffset());
return Offset + Size;
}
};
/// Compute a layout for a struct containing the given fields, making a
/// best-effort attempt to minimize the amount of space required.
///
/// Two features are supported which require a more careful solution
/// than the well-known "sort by decreasing alignment" solution:
///
/// - Fields may be assigned a fixed offset in the layout. If there are
/// gaps among the fixed-offset fields, the algorithm may attempt
/// to allocate flexible-offset fields into those gaps. If that's
/// undesirable, the caller should "block out" those gaps by e.g.
/// just creating a single fixed-offset field that represents the
/// entire "header".
///
/// - The size of a field is not required to be a multiple of, or even
/// greater than, the field's required alignment. The only constraint
/// on fields is that they must not be zero-sized.
///
/// To simplify the implementation, any fixed-offset fields in the
/// layout must appear at the start of the field array, and they must
/// be ordered by increasing offset.
///
/// The algorithm will produce a guaranteed-minimal layout with no
/// interior padding in the following "C-style" case:
///
/// - every field's size is a multiple of its required alignment and
/// - either no fields have initially fixed offsets, or the fixed-offset
/// fields have no interior padding and end at an offset that is at
/// least as aligned as all the flexible-offset fields.
///
/// Otherwise, while the algorithm will make a best-effort attempt to
/// avoid padding, it cannot guarantee a minimal layout, as there is
/// no known efficient algorithm for doing so.
///
/// The layout produced by this algorithm may not be stable across LLVM
/// releases. Do not use this anywhere where ABI stability is required.
///
/// Flexible-offset fields with the same size and alignment will be ordered
/// the same way they were in the initial array. Otherwise the current
/// algorithm makes no effort to preserve the initial order of
/// flexible-offset fields.
///
/// On return, all fields will have been assigned a fixed offset, and the
/// array will be sorted in order of ascending offsets. Note that this
/// means that the fixed-offset fields may no longer form a strict prefix
/// if there's any padding before they end.
///
/// The return value is the total size of the struct and its required
/// alignment. Note that the total size is not rounded up to a multiple
/// of the required alignment; clients which require this can do so easily.
std::pair<uint64_t, Align> performOptimizedStructLayout(
MutableArrayRef<OptimizedStructLayoutField> Fields);
} // namespace llvm
#endif
PK hwFZ� �W, , Support/VCSRevision.hnu �[��� #undef LLVM_REVISION
#undef LLVM_REPOSITORY
PK hwFZ� & & # Support/PerThreadBumpPtrAllocator.hnu �[��� //===- PerThreadBumpPtrAllocator.h ------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_PERTHREADBUMPPTRALLOCATOR_H
#define LLVM_SUPPORT_PERTHREADBUMPPTRALLOCATOR_H
#include "llvm/Support/Allocator.h"
#include "llvm/Support/Parallel.h"
namespace llvm {
namespace parallel {
/// PerThreadAllocator is used in conjunction with ThreadPoolExecutor to allow
/// per-thread allocations. It wraps a possibly thread-unsafe allocator,
/// e.g. BumpPtrAllocator. PerThreadAllocator must be used with only main thread
/// or threads created by ThreadPoolExecutor, as it utilizes getThreadIndex,
/// which is set by ThreadPoolExecutor. To work properly, ThreadPoolExecutor
/// should be initialized before PerThreadAllocator is created.
/// TODO: The same approach might be implemented for ThreadPool.
template <typename AllocatorTy>
class PerThreadAllocator
: public AllocatorBase<PerThreadAllocator<AllocatorTy>> {
public:
PerThreadAllocator()
: NumOfAllocators(parallel::getThreadCount()),
Allocators(std::make_unique<AllocatorTy[]>(NumOfAllocators)) {}
/// \defgroup Methods which could be called asynchronously:
///
/// @{
using AllocatorBase<PerThreadAllocator<AllocatorTy>>::Allocate;
using AllocatorBase<PerThreadAllocator<AllocatorTy>>::Deallocate;
/// Allocate \a Size bytes of \a Alignment aligned memory.
void *Allocate(size_t Size, size_t Alignment) {
assert(getThreadIndex() < NumOfAllocators);
return Allocators[getThreadIndex()].Allocate(Size, Alignment);
}
/// Deallocate \a Ptr to \a Size bytes of memory allocated by this
/// allocator.
void Deallocate(const void *Ptr, size_t Size, size_t Alignment) {
assert(getThreadIndex() < NumOfAllocators);
return Allocators[getThreadIndex()].Deallocate(Ptr, Size, Alignment);
}
/// Return allocator corresponding to the current thread.
AllocatorTy &getThreadLocalAllocator() {
assert(getThreadIndex() < NumOfAllocators);
return Allocators[getThreadIndex()];
}
// Return number of used allocators.
size_t getNumberOfAllocators() const { return NumOfAllocators; }
/// @}
/// \defgroup Methods which could not be called asynchronously:
///
/// @{
/// Reset state of allocators.
void Reset() {
for (size_t Idx = 0; Idx < getNumberOfAllocators(); Idx++)
Allocators[Idx].Reset();
}
/// Return total memory size used by all allocators.
size_t getTotalMemory() const {
size_t TotalMemory = 0;
for (size_t Idx = 0; Idx < getNumberOfAllocators(); Idx++)
TotalMemory += Allocators[Idx].getTotalMemory();
return TotalMemory;
}
/// Return allocated size by all allocators.
size_t getBytesAllocated() const {
size_t BytesAllocated = 0;
for (size_t Idx = 0; Idx < getNumberOfAllocators(); Idx++)
BytesAllocated += Allocators[Idx].getBytesAllocated();
return BytesAllocated;
}
/// Set red zone for all allocators.
void setRedZoneSize(size_t NewSize) {
for (size_t Idx = 0; Idx < getNumberOfAllocators(); Idx++)
Allocators[Idx].setRedZoneSize(NewSize);
}
/// Print statistic for each allocator.
void PrintStats() const {
for (size_t Idx = 0; Idx < getNumberOfAllocators(); Idx++) {
errs() << "\n Allocator " << Idx << "\n";
Allocators[Idx].PrintStats();
}
}
/// @}
protected:
size_t NumOfAllocators;
std::unique_ptr<AllocatorTy[]> Allocators;
};
using PerThreadBumpPtrAllocator = PerThreadAllocator<BumpPtrAllocator>;
} // end namespace parallel
} // end namespace llvm
#endif // LLVM_SUPPORT_PERTHREADBUMPPTRALLOCATOR_H
PK hwFZ��X�� �� $ Support/GenericDomTreeConstruction.hnu �[��� //===- GenericDomTreeConstruction.h - Dominator Calculation ------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
///
/// Generic dominator tree construction - this file provides routines to
/// construct immediate dominator information for a flow-graph based on the
/// Semi-NCA algorithm described in this dissertation:
///
/// [1] Linear-Time Algorithms for Dominators and Related Problems
/// Loukas Georgiadis, Princeton University, November 2005, pp. 21-23:
/// ftp://ftp.cs.princeton.edu/reports/2005/737.pdf
///
/// Semi-NCA algorithm runs in O(n^2) worst-case time but usually slightly
/// faster than Simple Lengauer-Tarjan in practice.
///
/// O(n^2) worst cases happen when the computation of nearest common ancestors
/// requires O(n) average time, which is very unlikely in real world. If this
/// ever turns out to be an issue, consider implementing a hybrid algorithm
/// that uses SLT to perform full constructions and SemiNCA for incremental
/// updates.
///
/// The file uses the Depth Based Search algorithm to perform incremental
/// updates (insertion and deletions). The implemented algorithm is based on
/// this publication:
///
/// [2] An Experimental Study of Dynamic Dominators
/// Loukas Georgiadis, et al., April 12 2016, pp. 5-7, 9-10:
/// https://arxiv.org/pdf/1604.02711.pdf
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_GENERICDOMTREECONSTRUCTION_H
#define LLVM_SUPPORT_GENERICDOMTREECONSTRUCTION_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/DepthFirstIterator.h"
#include "llvm/ADT/PointerIntPair.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/GenericDomTree.h"
#include <optional>
#include <queue>
#define DEBUG_TYPE "dom-tree-builder"
namespace llvm {
namespace DomTreeBuilder {
template <typename DomTreeT>
struct SemiNCAInfo {
using NodePtr = typename DomTreeT::NodePtr;
using NodeT = typename DomTreeT::NodeType;
using TreeNodePtr = DomTreeNodeBase<NodeT> *;
using RootsT = decltype(DomTreeT::Roots);
static constexpr bool IsPostDom = DomTreeT::IsPostDominator;
using GraphDiffT = GraphDiff<NodePtr, IsPostDom>;
// Information record used by Semi-NCA during tree construction.
struct InfoRec {
unsigned DFSNum = 0;
unsigned Parent = 0;
unsigned Semi = 0;
NodePtr Label = nullptr;
NodePtr IDom = nullptr;
SmallVector<NodePtr, 2> ReverseChildren;
};
// Number to node mapping is 1-based. Initialize the mapping to start with
// a dummy element.
std::vector<NodePtr> NumToNode = {nullptr};
DenseMap<NodePtr, InfoRec> NodeToInfo;
using UpdateT = typename DomTreeT::UpdateType;
using UpdateKind = typename DomTreeT::UpdateKind;
struct BatchUpdateInfo {
// Note: Updates inside PreViewCFG are already legalized.
BatchUpdateInfo(GraphDiffT &PreViewCFG, GraphDiffT *PostViewCFG = nullptr)
: PreViewCFG(PreViewCFG), PostViewCFG(PostViewCFG),
NumLegalized(PreViewCFG.getNumLegalizedUpdates()) {}
// Remembers if the whole tree was recalculated at some point during the
// current batch update.
bool IsRecalculated = false;
GraphDiffT &PreViewCFG;
GraphDiffT *PostViewCFG;
const size_t NumLegalized;
};
BatchUpdateInfo *BatchUpdates;
using BatchUpdatePtr = BatchUpdateInfo *;
// If BUI is a nullptr, then there's no batch update in progress.
SemiNCAInfo(BatchUpdatePtr BUI) : BatchUpdates(BUI) {}
void clear() {
NumToNode = {nullptr}; // Restore to initial state with a dummy start node.
NodeToInfo.clear();
// Don't reset the pointer to BatchUpdateInfo here -- if there's an update
// in progress, we need this information to continue it.
}
template <bool Inversed>
static SmallVector<NodePtr, 8> getChildren(NodePtr N, BatchUpdatePtr BUI) {
if (BUI)
return BUI->PreViewCFG.template getChildren<Inversed>(N);
return getChildren<Inversed>(N);
}
template <bool Inversed>
static SmallVector<NodePtr, 8> getChildren(NodePtr N) {
using DirectedNodeT =
std::conditional_t<Inversed, Inverse<NodePtr>, NodePtr>;
auto R = children<DirectedNodeT>(N);
SmallVector<NodePtr, 8> Res(detail::reverse_if<!Inversed>(R));
// Remove nullptr children for clang.
llvm::erase_value(Res, nullptr);
return Res;
}
NodePtr getIDom(NodePtr BB) const {
auto InfoIt = NodeToInfo.find(BB);
if (InfoIt == NodeToInfo.end()) return nullptr;
return InfoIt->second.IDom;
}
TreeNodePtr getNodeForBlock(NodePtr BB, DomTreeT &DT) {
if (TreeNodePtr Node = DT.getNode(BB)) return Node;
// Haven't calculated this node yet? Get or calculate the node for the
// immediate dominator.
NodePtr IDom = getIDom(BB);
assert(IDom || DT.DomTreeNodes[nullptr]);
TreeNodePtr IDomNode = getNodeForBlock(IDom, DT);
// Add a new tree node for this NodeT, and link it as a child of
// IDomNode
return DT.createChild(BB, IDomNode);
}
static bool AlwaysDescend(NodePtr, NodePtr) { return true; }
struct BlockNamePrinter {
NodePtr N;
BlockNamePrinter(NodePtr Block) : N(Block) {}
BlockNamePrinter(TreeNodePtr TN) : N(TN ? TN->getBlock() : nullptr) {}
friend raw_ostream &operator<<(raw_ostream &O, const BlockNamePrinter &BP) {
if (!BP.N)
O << "nullptr";
else
BP.N->printAsOperand(O, false);
return O;
}
};
using NodeOrderMap = DenseMap<NodePtr, unsigned>;
// Custom DFS implementation which can skip nodes based on a provided
// predicate. It also collects ReverseChildren so that we don't have to spend
// time getting predecessors in SemiNCA.
//
// If IsReverse is set to true, the DFS walk will be performed backwards
// relative to IsPostDom -- using reverse edges for dominators and forward
// edges for postdominators.
//
// If SuccOrder is specified then in this order the DFS traverses the children
// otherwise the order is implied by the results of getChildren().
template <bool IsReverse = false, typename DescendCondition>
unsigned runDFS(NodePtr V, unsigned LastNum, DescendCondition Condition,
unsigned AttachToNum,
const NodeOrderMap *SuccOrder = nullptr) {
assert(V);
SmallVector<NodePtr, 64> WorkList = {V};
if (NodeToInfo.count(V) != 0) NodeToInfo[V].Parent = AttachToNum;
while (!WorkList.empty()) {
const NodePtr BB = WorkList.pop_back_val();
auto &BBInfo = NodeToInfo[BB];
// Visited nodes always have positive DFS numbers.
if (BBInfo.DFSNum != 0) continue;
BBInfo.DFSNum = BBInfo.Semi = ++LastNum;
BBInfo.Label = BB;
NumToNode.push_back(BB);
constexpr bool Direction = IsReverse != IsPostDom; // XOR.
auto Successors = getChildren<Direction>(BB, BatchUpdates);
if (SuccOrder && Successors.size() > 1)
llvm::sort(
Successors.begin(), Successors.end(), [=](NodePtr A, NodePtr B) {
return SuccOrder->find(A)->second < SuccOrder->find(B)->second;
});
for (const NodePtr Succ : Successors) {
const auto SIT = NodeToInfo.find(Succ);
// Don't visit nodes more than once but remember to collect
// ReverseChildren.
if (SIT != NodeToInfo.end() && SIT->second.DFSNum != 0) {
if (Succ != BB) SIT->second.ReverseChildren.push_back(BB);
continue;
}
if (!Condition(BB, Succ)) continue;
// It's fine to add Succ to the map, because we know that it will be
// visited later.
auto &SuccInfo = NodeToInfo[Succ];
WorkList.push_back(Succ);
SuccInfo.Parent = LastNum;
SuccInfo.ReverseChildren.push_back(BB);
}
}
return LastNum;
}
// V is a predecessor of W. eval() returns V if V < W, otherwise the minimum
// of sdom(U), where U > W and there is a virtual forest path from U to V. The
// virtual forest consists of linked edges of processed vertices.
//
// We can follow Parent pointers (virtual forest edges) to determine the
// ancestor U with minimum sdom(U). But it is slow and thus we employ the path
// compression technique to speed up to O(m*log(n)). Theoretically the virtual
// forest can be organized as balanced trees to achieve almost linear
// O(m*alpha(m,n)) running time. But it requires two auxiliary arrays (Size
// and Child) and is unlikely to be faster than the simple implementation.
//
// For each vertex V, its Label points to the vertex with the minimal sdom(U)
// (Semi) in its path from V (included) to NodeToInfo[V].Parent (excluded).
NodePtr eval(NodePtr V, unsigned LastLinked,
SmallVectorImpl<InfoRec *> &Stack) {
InfoRec *VInfo = &NodeToInfo[V];
if (VInfo->Parent < LastLinked)
return VInfo->Label;
// Store ancestors except the last (root of a virtual tree) into a stack.
assert(Stack.empty());
do {
Stack.push_back(VInfo);
VInfo = &NodeToInfo[NumToNode[VInfo->Parent]];
} while (VInfo->Parent >= LastLinked);
// Path compression. Point each vertex's Parent to the root and update its
// Label if any of its ancestors (PInfo->Label) has a smaller Semi.
const InfoRec *PInfo = VInfo;
const InfoRec *PLabelInfo = &NodeToInfo[PInfo->Label];
do {
VInfo = Stack.pop_back_val();
VInfo->Parent = PInfo->Parent;
const InfoRec *VLabelInfo = &NodeToInfo[VInfo->Label];
if (PLabelInfo->Semi < VLabelInfo->Semi)
VInfo->Label = PInfo->Label;
else
PLabelInfo = VLabelInfo;
PInfo = VInfo;
} while (!Stack.empty());
return VInfo->Label;
}
// This function requires DFS to be run before calling it.
void runSemiNCA(DomTreeT &DT, const unsigned MinLevel = 0) {
const unsigned NextDFSNum(NumToNode.size());
// Initialize IDoms to spanning tree parents.
for (unsigned i = 1; i < NextDFSNum; ++i) {
const NodePtr V = NumToNode[i];
auto &VInfo = NodeToInfo[V];
VInfo.IDom = NumToNode[VInfo.Parent];
}
// Step #1: Calculate the semidominators of all vertices.
SmallVector<InfoRec *, 32> EvalStack;
for (unsigned i = NextDFSNum - 1; i >= 2; --i) {
NodePtr W = NumToNode[i];
auto &WInfo = NodeToInfo[W];
// Initialize the semi dominator to point to the parent node.
WInfo.Semi = WInfo.Parent;
for (const auto &N : WInfo.ReverseChildren) {
if (NodeToInfo.count(N) == 0) // Skip unreachable predecessors.
continue;
const TreeNodePtr TN = DT.getNode(N);
// Skip predecessors whose level is above the subtree we are processing.
if (TN && TN->getLevel() < MinLevel)
continue;
unsigned SemiU = NodeToInfo[eval(N, i + 1, EvalStack)].Semi;
if (SemiU < WInfo.Semi) WInfo.Semi = SemiU;
}
}
// Step #2: Explicitly define the immediate dominator of each vertex.
// IDom[i] = NCA(SDom[i], SpanningTreeParent(i)).
// Note that the parents were stored in IDoms and later got invalidated
// during path compression in Eval.
for (unsigned i = 2; i < NextDFSNum; ++i) {
const NodePtr W = NumToNode[i];
auto &WInfo = NodeToInfo[W];
const unsigned SDomNum = NodeToInfo[NumToNode[WInfo.Semi]].DFSNum;
NodePtr WIDomCandidate = WInfo.IDom;
while (NodeToInfo[WIDomCandidate].DFSNum > SDomNum)
WIDomCandidate = NodeToInfo[WIDomCandidate].IDom;
WInfo.IDom = WIDomCandidate;
}
}
// PostDominatorTree always has a virtual root that represents a virtual CFG
// node that serves as a single exit from the function. All the other exits
// (CFG nodes with terminators and nodes in infinite loops are logically
// connected to this virtual CFG exit node).
// This functions maps a nullptr CFG node to the virtual root tree node.
void addVirtualRoot() {
assert(IsPostDom && "Only postdominators have a virtual root");
assert(NumToNode.size() == 1 && "SNCAInfo must be freshly constructed");
auto &BBInfo = NodeToInfo[nullptr];
BBInfo.DFSNum = BBInfo.Semi = 1;
BBInfo.Label = nullptr;
NumToNode.push_back(nullptr); // NumToNode[1] = nullptr;
}
// For postdominators, nodes with no forward successors are trivial roots that
// are always selected as tree roots. Roots with forward successors correspond
// to CFG nodes within infinite loops.
static bool HasForwardSuccessors(const NodePtr N, BatchUpdatePtr BUI) {
assert(N && "N must be a valid node");
return !getChildren<false>(N, BUI).empty();
}
static NodePtr GetEntryNode(const DomTreeT &DT) {
assert(DT.Parent && "Parent not set");
return GraphTraits<typename DomTreeT::ParentPtr>::getEntryNode(DT.Parent);
}
// Finds all roots without relaying on the set of roots already stored in the
// tree.
// We define roots to be some non-redundant set of the CFG nodes
static RootsT FindRoots(const DomTreeT &DT, BatchUpdatePtr BUI) {
assert(DT.Parent && "Parent pointer is not set");
RootsT Roots;
// For dominators, function entry CFG node is always a tree root node.
if (!IsPostDom) {
Roots.push_back(GetEntryNode(DT));
return Roots;
}
SemiNCAInfo SNCA(BUI);
// PostDominatorTree always has a virtual root.
SNCA.addVirtualRoot();
unsigned Num = 1;
LLVM_DEBUG(dbgs() << "\t\tLooking for trivial roots\n");
// Step #1: Find all the trivial roots that are going to will definitely
// remain tree roots.
unsigned Total = 0;
// It may happen that there are some new nodes in the CFG that are result of
// the ongoing batch update, but we cannot really pretend that they don't
// exist -- we won't see any outgoing or incoming edges to them, so it's
// fine to discover them here, as they would end up appearing in the CFG at
// some point anyway.
for (const NodePtr N : nodes(DT.Parent)) {
++Total;
// If it has no *successors*, it is definitely a root.
if (!HasForwardSuccessors(N, BUI)) {
Roots.push_back(N);
// Run DFS not to walk this part of CFG later.
Num = SNCA.runDFS(N, Num, AlwaysDescend, 1);
LLVM_DEBUG(dbgs() << "Found a new trivial root: " << BlockNamePrinter(N)
<< "\n");
LLVM_DEBUG(dbgs() << "Last visited node: "
<< BlockNamePrinter(SNCA.NumToNode[Num]) << "\n");
}
}
LLVM_DEBUG(dbgs() << "\t\tLooking for non-trivial roots\n");
// Step #2: Find all non-trivial root candidates. Those are CFG nodes that
// are reverse-unreachable were not visited by previous DFS walks (i.e. CFG
// nodes in infinite loops).
bool HasNonTrivialRoots = false;
// Accounting for the virtual exit, see if we had any reverse-unreachable
// nodes.
if (Total + 1 != Num) {
HasNonTrivialRoots = true;
// SuccOrder is the order of blocks in the function. It is needed to make
// the calculation of the FurthestAway node and the whole PostDomTree
// immune to swap successors transformation (e.g. canonicalizing branch
// predicates). SuccOrder is initialized lazily only for successors of
// reverse unreachable nodes.
std::optional<NodeOrderMap> SuccOrder;
auto InitSuccOrderOnce = [&]() {
SuccOrder = NodeOrderMap();
for (const auto Node : nodes(DT.Parent))
if (SNCA.NodeToInfo.count(Node) == 0)
for (const auto Succ : getChildren<false>(Node, SNCA.BatchUpdates))
SuccOrder->try_emplace(Succ, 0);
// Add mapping for all entries of SuccOrder.
unsigned NodeNum = 0;
for (const auto Node : nodes(DT.Parent)) {
++NodeNum;
auto Order = SuccOrder->find(Node);
if (Order != SuccOrder->end()) {
assert(Order->second == 0);
Order->second = NodeNum;
}
}
};
// Make another DFS pass over all other nodes to find the
// reverse-unreachable blocks, and find the furthest paths we'll be able
// to make.
// Note that this looks N^2, but it's really 2N worst case, if every node
// is unreachable. This is because we are still going to only visit each
// unreachable node once, we may just visit it in two directions,
// depending on how lucky we get.
for (const NodePtr I : nodes(DT.Parent)) {
if (SNCA.NodeToInfo.count(I) == 0) {
LLVM_DEBUG(dbgs()
<< "\t\t\tVisiting node " << BlockNamePrinter(I) << "\n");
// Find the furthest away we can get by following successors, then
// follow them in reverse. This gives us some reasonable answer about
// the post-dom tree inside any infinite loop. In particular, it
// guarantees we get to the farthest away point along *some*
// path. This also matches the GCC's behavior.
// If we really wanted a totally complete picture of dominance inside
// this infinite loop, we could do it with SCC-like algorithms to find
// the lowest and highest points in the infinite loop. In theory, it
// would be nice to give the canonical backedge for the loop, but it's
// expensive and does not always lead to a minimal set of roots.
LLVM_DEBUG(dbgs() << "\t\t\tRunning forward DFS\n");
if (!SuccOrder)
InitSuccOrderOnce();
assert(SuccOrder);
const unsigned NewNum =
SNCA.runDFS<true>(I, Num, AlwaysDescend, Num, &*SuccOrder);
const NodePtr FurthestAway = SNCA.NumToNode[NewNum];
LLVM_DEBUG(dbgs() << "\t\t\tFound a new furthest away node "
<< "(non-trivial root): "
<< BlockNamePrinter(FurthestAway) << "\n");
Roots.push_back(FurthestAway);
LLVM_DEBUG(dbgs() << "\t\t\tPrev DFSNum: " << Num << ", new DFSNum: "
<< NewNum << "\n\t\t\tRemoving DFS info\n");
for (unsigned i = NewNum; i > Num; --i) {
const NodePtr N = SNCA.NumToNode[i];
LLVM_DEBUG(dbgs() << "\t\t\t\tRemoving DFS info for "
<< BlockNamePrinter(N) << "\n");
SNCA.NodeToInfo.erase(N);
SNCA.NumToNode.pop_back();
}
const unsigned PrevNum = Num;
LLVM_DEBUG(dbgs() << "\t\t\tRunning reverse DFS\n");
Num = SNCA.runDFS(FurthestAway, Num, AlwaysDescend, 1);
for (unsigned i = PrevNum + 1; i <= Num; ++i)
LLVM_DEBUG(dbgs() << "\t\t\t\tfound node "
<< BlockNamePrinter(SNCA.NumToNode[i]) << "\n");
}
}
}
LLVM_DEBUG(dbgs() << "Total: " << Total << ", Num: " << Num << "\n");
LLVM_DEBUG(dbgs() << "Discovered CFG nodes:\n");
LLVM_DEBUG(for (size_t i = 0; i <= Num; ++i) dbgs()
<< i << ": " << BlockNamePrinter(SNCA.NumToNode[i]) << "\n");
assert((Total + 1 == Num) && "Everything should have been visited");
// Step #3: If we found some non-trivial roots, make them non-redundant.
if (HasNonTrivialRoots) RemoveRedundantRoots(DT, BUI, Roots);
LLVM_DEBUG(dbgs() << "Found roots: ");
LLVM_DEBUG(for (auto *Root
: Roots) dbgs()
<< BlockNamePrinter(Root) << " ");
LLVM_DEBUG(dbgs() << "\n");
return Roots;
}
// This function only makes sense for postdominators.
// We define roots to be some set of CFG nodes where (reverse) DFS walks have
// to start in order to visit all the CFG nodes (including the
// reverse-unreachable ones).
// When the search for non-trivial roots is done it may happen that some of
// the non-trivial roots are reverse-reachable from other non-trivial roots,
// which makes them redundant. This function removes them from the set of
// input roots.
static void RemoveRedundantRoots(const DomTreeT &DT, BatchUpdatePtr BUI,
RootsT &Roots) {
assert(IsPostDom && "This function is for postdominators only");
LLVM_DEBUG(dbgs() << "Removing redundant roots\n");
SemiNCAInfo SNCA(BUI);
for (unsigned i = 0; i < Roots.size(); ++i) {
auto &Root = Roots[i];
// Trivial roots are always non-redundant.
if (!HasForwardSuccessors(Root, BUI)) continue;
LLVM_DEBUG(dbgs() << "\tChecking if " << BlockNamePrinter(Root)
<< " remains a root\n");
SNCA.clear();
// Do a forward walk looking for the other roots.
const unsigned Num = SNCA.runDFS<true>(Root, 0, AlwaysDescend, 0);
// Skip the start node and begin from the second one (note that DFS uses
// 1-based indexing).
for (unsigned x = 2; x <= Num; ++x) {
const NodePtr N = SNCA.NumToNode[x];
// If we wound another root in a (forward) DFS walk, remove the current
// root from the set of roots, as it is reverse-reachable from the other
// one.
if (llvm::is_contained(Roots, N)) {
LLVM_DEBUG(dbgs() << "\tForward DFS walk found another root "
<< BlockNamePrinter(N) << "\n\tRemoving root "
<< BlockNamePrinter(Root) << "\n");
std::swap(Root, Roots.back());
Roots.pop_back();
// Root at the back takes the current root's place.
// Start the next loop iteration with the same index.
--i;
break;
}
}
}
}
template <typename DescendCondition>
void doFullDFSWalk(const DomTreeT &DT, DescendCondition DC) {
if (!IsPostDom) {
assert(DT.Roots.size() == 1 && "Dominators should have a singe root");
runDFS(DT.Roots[0], 0, DC, 0);
return;
}
addVirtualRoot();
unsigned Num = 1;
for (const NodePtr Root : DT.Roots) Num = runDFS(Root, Num, DC, 0);
}
static void CalculateFromScratch(DomTreeT &DT, BatchUpdatePtr BUI) {
auto *Parent = DT.Parent;
DT.reset();
DT.Parent = Parent;
// If the update is using the actual CFG, BUI is null. If it's using a view,
// BUI is non-null and the PreCFGView is used. When calculating from
// scratch, make the PreViewCFG equal to the PostCFGView, so Post is used.
BatchUpdatePtr PostViewBUI = nullptr;
if (BUI && BUI->PostViewCFG) {
BUI->PreViewCFG = *BUI->PostViewCFG;
PostViewBUI = BUI;
}
// This is rebuilding the whole tree, not incrementally, but PostViewBUI is
// used in case the caller needs a DT update with a CFGView.
SemiNCAInfo SNCA(PostViewBUI);
// Step #0: Number blocks in depth-first order and initialize variables used
// in later stages of the algorithm.
DT.Roots = FindRoots(DT, PostViewBUI);
SNCA.doFullDFSWalk(DT, AlwaysDescend);
SNCA.runSemiNCA(DT);
if (BUI) {
BUI->IsRecalculated = true;
LLVM_DEBUG(
dbgs() << "DomTree recalculated, skipping future batch updates\n");
}
if (DT.Roots.empty()) return;
// Add a node for the root. If the tree is a PostDominatorTree it will be
// the virtual exit (denoted by (BasicBlock *) nullptr) which postdominates
// all real exits (including multiple exit blocks, infinite loops).
NodePtr Root = IsPostDom ? nullptr : DT.Roots[0];
DT.RootNode = DT.createNode(Root);
SNCA.attachNewSubtree(DT, DT.RootNode);
}
void attachNewSubtree(DomTreeT& DT, const TreeNodePtr AttachTo) {
// Attach the first unreachable block to AttachTo.
NodeToInfo[NumToNode[1]].IDom = AttachTo->getBlock();
// Loop over all of the discovered blocks in the function...
for (size_t i = 1, e = NumToNode.size(); i != e; ++i) {
NodePtr W = NumToNode[i];
// Don't replace this with 'count', the insertion side effect is important
if (DT.DomTreeNodes[W]) continue; // Haven't calculated this node yet?
NodePtr ImmDom = getIDom(W);
// Get or calculate the node for the immediate dominator.
TreeNodePtr IDomNode = getNodeForBlock(ImmDom, DT);
// Add a new tree node for this BasicBlock, and link it as a child of
// IDomNode.
DT.createChild(W, IDomNode);
}
}
void reattachExistingSubtree(DomTreeT &DT, const TreeNodePtr AttachTo) {
NodeToInfo[NumToNode[1]].IDom = AttachTo->getBlock();
for (size_t i = 1, e = NumToNode.size(); i != e; ++i) {
const NodePtr N = NumToNode[i];
const TreeNodePtr TN = DT.getNode(N);
assert(TN);
const TreeNodePtr NewIDom = DT.getNode(NodeToInfo[N].IDom);
TN->setIDom(NewIDom);
}
}
// Helper struct used during edge insertions.
struct InsertionInfo {
struct Compare {
bool operator()(TreeNodePtr LHS, TreeNodePtr RHS) const {
return LHS->getLevel() < RHS->getLevel();
}
};
// Bucket queue of tree nodes ordered by descending level. For simplicity,
// we use a priority_queue here.
std::priority_queue<TreeNodePtr, SmallVector<TreeNodePtr, 8>,
Compare>
Bucket;
SmallDenseSet<TreeNodePtr, 8> Visited;
SmallVector<TreeNodePtr, 8> Affected;
#ifdef LLVM_ENABLE_ABI_BREAKING_CHECKS
SmallVector<TreeNodePtr, 8> VisitedUnaffected;
#endif
};
static void InsertEdge(DomTreeT &DT, const BatchUpdatePtr BUI,
const NodePtr From, const NodePtr To) {
assert((From || IsPostDom) &&
"From has to be a valid CFG node or a virtual root");
assert(To && "Cannot be a nullptr");
LLVM_DEBUG(dbgs() << "Inserting edge " << BlockNamePrinter(From) << " -> "
<< BlockNamePrinter(To) << "\n");
TreeNodePtr FromTN = DT.getNode(From);
if (!FromTN) {
// Ignore edges from unreachable nodes for (forward) dominators.
if (!IsPostDom) return;
// The unreachable node becomes a new root -- a tree node for it.
TreeNodePtr VirtualRoot = DT.getNode(nullptr);
FromTN = DT.createChild(From, VirtualRoot);
DT.Roots.push_back(From);
}
DT.DFSInfoValid = false;
const TreeNodePtr ToTN = DT.getNode(To);
if (!ToTN)
InsertUnreachable(DT, BUI, FromTN, To);
else
InsertReachable(DT, BUI, FromTN, ToTN);
}
// Determines if some existing root becomes reverse-reachable after the
// insertion. Rebuilds the whole tree if that situation happens.
static bool UpdateRootsBeforeInsertion(DomTreeT &DT, const BatchUpdatePtr BUI,
const TreeNodePtr From,
const TreeNodePtr To) {
assert(IsPostDom && "This function is only for postdominators");
// Destination node is not attached to the virtual root, so it cannot be a
// root.
if (!DT.isVirtualRoot(To->getIDom())) return false;
if (!llvm::is_contained(DT.Roots, To->getBlock()))
return false; // To is not a root, nothing to update.
LLVM_DEBUG(dbgs() << "\t\tAfter the insertion, " << BlockNamePrinter(To)
<< " is no longer a root\n\t\tRebuilding the tree!!!\n");
CalculateFromScratch(DT, BUI);
return true;
}
static bool isPermutation(const SmallVectorImpl<NodePtr> &A,
const SmallVectorImpl<NodePtr> &B) {
if (A.size() != B.size())
return false;
SmallPtrSet<NodePtr, 4> Set(A.begin(), A.end());
for (NodePtr N : B)
if (Set.count(N) == 0)
return false;
return true;
}
// Updates the set of roots after insertion or deletion. This ensures that
// roots are the same when after a series of updates and when the tree would
// be built from scratch.
static void UpdateRootsAfterUpdate(DomTreeT &DT, const BatchUpdatePtr BUI) {
assert(IsPostDom && "This function is only for postdominators");
// The tree has only trivial roots -- nothing to update.
if (llvm::none_of(DT.Roots, [BUI](const NodePtr N) {
return HasForwardSuccessors(N, BUI);
}))
return;
// Recalculate the set of roots.
RootsT Roots = FindRoots(DT, BUI);
if (!isPermutation(DT.Roots, Roots)) {
// The roots chosen in the CFG have changed. This is because the
// incremental algorithm does not really know or use the set of roots and
// can make a different (implicit) decision about which node within an
// infinite loop becomes a root.
LLVM_DEBUG(dbgs() << "Roots are different in updated trees\n"
<< "The entire tree needs to be rebuilt\n");
// It may be possible to update the tree without recalculating it, but
// we do not know yet how to do it, and it happens rarely in practice.
CalculateFromScratch(DT, BUI);
}
}
// Handles insertion to a node already in the dominator tree.
static void InsertReachable(DomTreeT &DT, const BatchUpdatePtr BUI,
const TreeNodePtr From, const TreeNodePtr To) {
LLVM_DEBUG(dbgs() << "\tReachable " << BlockNamePrinter(From->getBlock())
<< " -> " << BlockNamePrinter(To->getBlock()) << "\n");
if (IsPostDom && UpdateRootsBeforeInsertion(DT, BUI, From, To)) return;
// DT.findNCD expects both pointers to be valid. When From is a virtual
// root, then its CFG block pointer is a nullptr, so we have to 'compute'
// the NCD manually.
const NodePtr NCDBlock =
(From->getBlock() && To->getBlock())
? DT.findNearestCommonDominator(From->getBlock(), To->getBlock())
: nullptr;
assert(NCDBlock || DT.isPostDominator());
const TreeNodePtr NCD = DT.getNode(NCDBlock);
assert(NCD);
LLVM_DEBUG(dbgs() << "\t\tNCA == " << BlockNamePrinter(NCD) << "\n");
const unsigned NCDLevel = NCD->getLevel();
// Based on Lemma 2.5 from [2], after insertion of (From,To), v is affected
// iff depth(NCD)+1 < depth(v) && a path P from To to v exists where every
// w on P s.t. depth(v) <= depth(w)
//
// This reduces to a widest path problem (maximizing the depth of the
// minimum vertex in the path) which can be solved by a modified version of
// Dijkstra with a bucket queue (named depth-based search in [2]).
// To is in the path, so depth(NCD)+1 < depth(v) <= depth(To). Nothing
// affected if this does not hold.
if (NCDLevel + 1 >= To->getLevel())
return;
InsertionInfo II;
SmallVector<TreeNodePtr, 8> UnaffectedOnCurrentLevel;
II.Bucket.push(To);
II.Visited.insert(To);
while (!II.Bucket.empty()) {
TreeNodePtr TN = II.Bucket.top();
II.Bucket.pop();
II.Affected.push_back(TN);
const unsigned CurrentLevel = TN->getLevel();
LLVM_DEBUG(dbgs() << "Mark " << BlockNamePrinter(TN) <<
"as affected, CurrentLevel " << CurrentLevel << "\n");
assert(TN->getBlock() && II.Visited.count(TN) && "Preconditions!");
while (true) {
// Unlike regular Dijkstra, we have an inner loop to expand more
// vertices. The first iteration is for the (affected) vertex popped
// from II.Bucket and the rest are for vertices in
// UnaffectedOnCurrentLevel, which may eventually expand to affected
// vertices.
//
// Invariant: there is an optimal path from `To` to TN with the minimum
// depth being CurrentLevel.
for (const NodePtr Succ : getChildren<IsPostDom>(TN->getBlock(), BUI)) {
const TreeNodePtr SuccTN = DT.getNode(Succ);
assert(SuccTN &&
"Unreachable successor found at reachable insertion");
const unsigned SuccLevel = SuccTN->getLevel();
LLVM_DEBUG(dbgs() << "\tSuccessor " << BlockNamePrinter(Succ)
<< ", level = " << SuccLevel << "\n");
// There is an optimal path from `To` to Succ with the minimum depth
// being min(CurrentLevel, SuccLevel).
//
// If depth(NCD)+1 < depth(Succ) is not satisfied, Succ is unaffected
// and no affected vertex may be reached by a path passing through it.
// Stop here. Also, Succ may be visited by other predecessors but the
// first visit has the optimal path. Stop if Succ has been visited.
if (SuccLevel <= NCDLevel + 1 || !II.Visited.insert(SuccTN).second)
continue;
if (SuccLevel > CurrentLevel) {
// Succ is unaffected but it may (transitively) expand to affected
// vertices. Store it in UnaffectedOnCurrentLevel.
LLVM_DEBUG(dbgs() << "\t\tMarking visited not affected "
<< BlockNamePrinter(Succ) << "\n");
UnaffectedOnCurrentLevel.push_back(SuccTN);
#ifndef NDEBUG
II.VisitedUnaffected.push_back(SuccTN);
#endif
} else {
// The condition is satisfied (Succ is affected). Add Succ to the
// bucket queue.
LLVM_DEBUG(dbgs() << "\t\tAdd " << BlockNamePrinter(Succ)
<< " to a Bucket\n");
II.Bucket.push(SuccTN);
}
}
if (UnaffectedOnCurrentLevel.empty())
break;
TN = UnaffectedOnCurrentLevel.pop_back_val();
LLVM_DEBUG(dbgs() << " Next: " << BlockNamePrinter(TN) << "\n");
}
}
// Finish by updating immediate dominators and levels.
UpdateInsertion(DT, BUI, NCD, II);
}
// Updates immediate dominators and levels after insertion.
static void UpdateInsertion(DomTreeT &DT, const BatchUpdatePtr BUI,
const TreeNodePtr NCD, InsertionInfo &II) {
LLVM_DEBUG(dbgs() << "Updating NCD = " << BlockNamePrinter(NCD) << "\n");
for (const TreeNodePtr TN : II.Affected) {
LLVM_DEBUG(dbgs() << "\tIDom(" << BlockNamePrinter(TN)
<< ") = " << BlockNamePrinter(NCD) << "\n");
TN->setIDom(NCD);
}
#if defined(LLVM_ENABLE_ABI_BREAKING_CHECKS) && !defined(NDEBUG)
for (const TreeNodePtr TN : II.VisitedUnaffected)
assert(TN->getLevel() == TN->getIDom()->getLevel() + 1 &&
"TN should have been updated by an affected ancestor");
#endif
if (IsPostDom) UpdateRootsAfterUpdate(DT, BUI);
}
// Handles insertion to previously unreachable nodes.
static void InsertUnreachable(DomTreeT &DT, const BatchUpdatePtr BUI,
const TreeNodePtr From, const NodePtr To) {
LLVM_DEBUG(dbgs() << "Inserting " << BlockNamePrinter(From)
<< " -> (unreachable) " << BlockNamePrinter(To) << "\n");
// Collect discovered edges to already reachable nodes.
SmallVector<std::pair<NodePtr, TreeNodePtr>, 8> DiscoveredEdgesToReachable;
// Discover and connect nodes that became reachable with the insertion.
ComputeUnreachableDominators(DT, BUI, To, From, DiscoveredEdgesToReachable);
LLVM_DEBUG(dbgs() << "Inserted " << BlockNamePrinter(From)
<< " -> (prev unreachable) " << BlockNamePrinter(To)
<< "\n");
// Used the discovered edges and inset discovered connecting (incoming)
// edges.
for (const auto &Edge : DiscoveredEdgesToReachable) {
LLVM_DEBUG(dbgs() << "\tInserting discovered connecting edge "
<< BlockNamePrinter(Edge.first) << " -> "
<< BlockNamePrinter(Edge.second) << "\n");
InsertReachable(DT, BUI, DT.getNode(Edge.first), Edge.second);
}
}
// Connects nodes that become reachable with an insertion.
static void ComputeUnreachableDominators(
DomTreeT &DT, const BatchUpdatePtr BUI, const NodePtr Root,
const TreeNodePtr Incoming,
SmallVectorImpl<std::pair<NodePtr, TreeNodePtr>>
&DiscoveredConnectingEdges) {
assert(!DT.getNode(Root) && "Root must not be reachable");
// Visit only previously unreachable nodes.
auto UnreachableDescender = [&DT, &DiscoveredConnectingEdges](NodePtr From,
NodePtr To) {
const TreeNodePtr ToTN = DT.getNode(To);
if (!ToTN) return true;
DiscoveredConnectingEdges.push_back({From, ToTN});
return false;
};
SemiNCAInfo SNCA(BUI);
SNCA.runDFS(Root, 0, UnreachableDescender, 0);
SNCA.runSemiNCA(DT);
SNCA.attachNewSubtree(DT, Incoming);
LLVM_DEBUG(dbgs() << "After adding unreachable nodes\n");
}
static void DeleteEdge(DomTreeT &DT, const BatchUpdatePtr BUI,
const NodePtr From, const NodePtr To) {
assert(From && To && "Cannot disconnect nullptrs");
LLVM_DEBUG(dbgs() << "Deleting edge " << BlockNamePrinter(From) << " -> "
<< BlockNamePrinter(To) << "\n");
#ifdef LLVM_ENABLE_ABI_BREAKING_CHECKS
// Ensure that the edge was in fact deleted from the CFG before informing
// the DomTree about it.
// The check is O(N), so run it only in debug configuration.
auto IsSuccessor = [BUI](const NodePtr SuccCandidate, const NodePtr Of) {
auto Successors = getChildren<IsPostDom>(Of, BUI);
return llvm::is_contained(Successors, SuccCandidate);
};
(void)IsSuccessor;
assert(!IsSuccessor(To, From) && "Deleted edge still exists in the CFG!");
#endif
const TreeNodePtr FromTN = DT.getNode(From);
// Deletion in an unreachable subtree -- nothing to do.
if (!FromTN) return;
const TreeNodePtr ToTN = DT.getNode(To);
if (!ToTN) {
LLVM_DEBUG(
dbgs() << "\tTo (" << BlockNamePrinter(To)
<< ") already unreachable -- there is no edge to delete\n");
return;
}
const NodePtr NCDBlock = DT.findNearestCommonDominator(From, To);
const TreeNodePtr NCD = DT.getNode(NCDBlock);
// If To dominates From -- nothing to do.
if (ToTN != NCD) {
DT.DFSInfoValid = false;
const TreeNodePtr ToIDom = ToTN->getIDom();
LLVM_DEBUG(dbgs() << "\tNCD " << BlockNamePrinter(NCD) << ", ToIDom "
<< BlockNamePrinter(ToIDom) << "\n");
// To remains reachable after deletion.
// (Based on the caption under Figure 4. from [2].)
if (FromTN != ToIDom || HasProperSupport(DT, BUI, ToTN))
DeleteReachable(DT, BUI, FromTN, ToTN);
else
DeleteUnreachable(DT, BUI, ToTN);
}
if (IsPostDom) UpdateRootsAfterUpdate(DT, BUI);
}
// Handles deletions that leave destination nodes reachable.
static void DeleteReachable(DomTreeT &DT, const BatchUpdatePtr BUI,
const TreeNodePtr FromTN,
const TreeNodePtr ToTN) {
LLVM_DEBUG(dbgs() << "Deleting reachable " << BlockNamePrinter(FromTN)
<< " -> " << BlockNamePrinter(ToTN) << "\n");
LLVM_DEBUG(dbgs() << "\tRebuilding subtree\n");
// Find the top of the subtree that needs to be rebuilt.
// (Based on the lemma 2.6 from [2].)
const NodePtr ToIDom =
DT.findNearestCommonDominator(FromTN->getBlock(), ToTN->getBlock());
assert(ToIDom || DT.isPostDominator());
const TreeNodePtr ToIDomTN = DT.getNode(ToIDom);
assert(ToIDomTN);
const TreeNodePtr PrevIDomSubTree = ToIDomTN->getIDom();
// Top of the subtree to rebuild is the root node. Rebuild the tree from
// scratch.
if (!PrevIDomSubTree) {
LLVM_DEBUG(dbgs() << "The entire tree needs to be rebuilt\n");
CalculateFromScratch(DT, BUI);
return;
}
// Only visit nodes in the subtree starting at To.
const unsigned Level = ToIDomTN->getLevel();
auto DescendBelow = [Level, &DT](NodePtr, NodePtr To) {
return DT.getNode(To)->getLevel() > Level;
};
LLVM_DEBUG(dbgs() << "\tTop of subtree: " << BlockNamePrinter(ToIDomTN)
<< "\n");
SemiNCAInfo SNCA(BUI);
SNCA.runDFS(ToIDom, 0, DescendBelow, 0);
LLVM_DEBUG(dbgs() << "\tRunning Semi-NCA\n");
SNCA.runSemiNCA(DT, Level);
SNCA.reattachExistingSubtree(DT, PrevIDomSubTree);
}
// Checks if a node has proper support, as defined on the page 3 and later
// explained on the page 7 of [2].
static bool HasProperSupport(DomTreeT &DT, const BatchUpdatePtr BUI,
const TreeNodePtr TN) {
LLVM_DEBUG(dbgs() << "IsReachableFromIDom " << BlockNamePrinter(TN)
<< "\n");
auto TNB = TN->getBlock();
for (const NodePtr Pred : getChildren<!IsPostDom>(TNB, BUI)) {
LLVM_DEBUG(dbgs() << "\tPred " << BlockNamePrinter(Pred) << "\n");
if (!DT.getNode(Pred)) continue;
const NodePtr Support = DT.findNearestCommonDominator(TNB, Pred);
LLVM_DEBUG(dbgs() << "\tSupport " << BlockNamePrinter(Support) << "\n");
if (Support != TNB) {
LLVM_DEBUG(dbgs() << "\t" << BlockNamePrinter(TN)
<< " is reachable from support "
<< BlockNamePrinter(Support) << "\n");
return true;
}
}
return false;
}
// Handle deletions that make destination node unreachable.
// (Based on the lemma 2.7 from the [2].)
static void DeleteUnreachable(DomTreeT &DT, const BatchUpdatePtr BUI,
const TreeNodePtr ToTN) {
LLVM_DEBUG(dbgs() << "Deleting unreachable subtree "
<< BlockNamePrinter(ToTN) << "\n");
assert(ToTN);
assert(ToTN->getBlock());
if (IsPostDom) {
// Deletion makes a region reverse-unreachable and creates a new root.
// Simulate that by inserting an edge from the virtual root to ToTN and
// adding it as a new root.
LLVM_DEBUG(dbgs() << "\tDeletion made a region reverse-unreachable\n");
LLVM_DEBUG(dbgs() << "\tAdding new root " << BlockNamePrinter(ToTN)
<< "\n");
DT.Roots.push_back(ToTN->getBlock());
InsertReachable(DT, BUI, DT.getNode(nullptr), ToTN);
return;
}
SmallVector<NodePtr, 16> AffectedQueue;
const unsigned Level = ToTN->getLevel();
// Traverse destination node's descendants with greater level in the tree
// and collect visited nodes.
auto DescendAndCollect = [Level, &AffectedQueue, &DT](NodePtr, NodePtr To) {
const TreeNodePtr TN = DT.getNode(To);
assert(TN);
if (TN->getLevel() > Level) return true;
if (!llvm::is_contained(AffectedQueue, To))
AffectedQueue.push_back(To);
return false;
};
SemiNCAInfo SNCA(BUI);
unsigned LastDFSNum =
SNCA.runDFS(ToTN->getBlock(), 0, DescendAndCollect, 0);
TreeNodePtr MinNode = ToTN;
// Identify the top of the subtree to rebuild by finding the NCD of all
// the affected nodes.
for (const NodePtr N : AffectedQueue) {
const TreeNodePtr TN = DT.getNode(N);
const NodePtr NCDBlock =
DT.findNearestCommonDominator(TN->getBlock(), ToTN->getBlock());
assert(NCDBlock || DT.isPostDominator());
const TreeNodePtr NCD = DT.getNode(NCDBlock);
assert(NCD);
LLVM_DEBUG(dbgs() << "Processing affected node " << BlockNamePrinter(TN)
<< " with NCD = " << BlockNamePrinter(NCD)
<< ", MinNode =" << BlockNamePrinter(MinNode) << "\n");
if (NCD != TN && NCD->getLevel() < MinNode->getLevel()) MinNode = NCD;
}
// Root reached, rebuild the whole tree from scratch.
if (!MinNode->getIDom()) {
LLVM_DEBUG(dbgs() << "The entire tree needs to be rebuilt\n");
CalculateFromScratch(DT, BUI);
return;
}
// Erase the unreachable subtree in reverse preorder to process all children
// before deleting their parent.
for (unsigned i = LastDFSNum; i > 0; --i) {
const NodePtr N = SNCA.NumToNode[i];
const TreeNodePtr TN = DT.getNode(N);
LLVM_DEBUG(dbgs() << "Erasing node " << BlockNamePrinter(TN) << "\n");
EraseNode(DT, TN);
}
// The affected subtree start at the To node -- there's no extra work to do.
if (MinNode == ToTN) return;
LLVM_DEBUG(dbgs() << "DeleteUnreachable: running DFS with MinNode = "
<< BlockNamePrinter(MinNode) << "\n");
const unsigned MinLevel = MinNode->getLevel();
const TreeNodePtr PrevIDom = MinNode->getIDom();
assert(PrevIDom);
SNCA.clear();
// Identify nodes that remain in the affected subtree.
auto DescendBelow = [MinLevel, &DT](NodePtr, NodePtr To) {
const TreeNodePtr ToTN = DT.getNode(To);
return ToTN && ToTN->getLevel() > MinLevel;
};
SNCA.runDFS(MinNode->getBlock(), 0, DescendBelow, 0);
LLVM_DEBUG(dbgs() << "Previous IDom(MinNode) = "
<< BlockNamePrinter(PrevIDom) << "\nRunning Semi-NCA\n");
// Rebuild the remaining part of affected subtree.
SNCA.runSemiNCA(DT, MinLevel);
SNCA.reattachExistingSubtree(DT, PrevIDom);
}
// Removes leaf tree nodes from the dominator tree.
static void EraseNode(DomTreeT &DT, const TreeNodePtr TN) {
assert(TN);
assert(TN->getNumChildren() == 0 && "Not a tree leaf");
const TreeNodePtr IDom = TN->getIDom();
assert(IDom);
auto ChIt = llvm::find(IDom->Children, TN);
assert(ChIt != IDom->Children.end());
std::swap(*ChIt, IDom->Children.back());
IDom->Children.pop_back();
DT.DomTreeNodes.erase(TN->getBlock());
}
//~~
//===--------------------- DomTree Batch Updater --------------------------===
//~~
static void ApplyUpdates(DomTreeT &DT, GraphDiffT &PreViewCFG,
GraphDiffT *PostViewCFG) {
// Note: the PostViewCFG is only used when computing from scratch. It's data
// should already included in the PreViewCFG for incremental updates.
const size_t NumUpdates = PreViewCFG.getNumLegalizedUpdates();
if (NumUpdates == 0)
return;
// Take the fast path for a single update and avoid running the batch update
// machinery.
if (NumUpdates == 1) {
UpdateT Update = PreViewCFG.popUpdateForIncrementalUpdates();
if (!PostViewCFG) {
if (Update.getKind() == UpdateKind::Insert)
InsertEdge(DT, /*BUI=*/nullptr, Update.getFrom(), Update.getTo());
else
DeleteEdge(DT, /*BUI=*/nullptr, Update.getFrom(), Update.getTo());
} else {
BatchUpdateInfo BUI(*PostViewCFG, PostViewCFG);
if (Update.getKind() == UpdateKind::Insert)
InsertEdge(DT, &BUI, Update.getFrom(), Update.getTo());
else
DeleteEdge(DT, &BUI, Update.getFrom(), Update.getTo());
}
return;
}
BatchUpdateInfo BUI(PreViewCFG, PostViewCFG);
// Recalculate the DominatorTree when the number of updates
// exceeds a threshold, which usually makes direct updating slower than
// recalculation. We select this threshold proportional to the
// size of the DominatorTree. The constant is selected
// by choosing the one with an acceptable performance on some real-world
// inputs.
// Make unittests of the incremental algorithm work
if (DT.DomTreeNodes.size() <= 100) {
if (BUI.NumLegalized > DT.DomTreeNodes.size())
CalculateFromScratch(DT, &BUI);
} else if (BUI.NumLegalized > DT.DomTreeNodes.size() / 40)
CalculateFromScratch(DT, &BUI);
// If the DominatorTree was recalculated at some point, stop the batch
// updates. Full recalculations ignore batch updates and look at the actual
// CFG.
for (size_t i = 0; i < BUI.NumLegalized && !BUI.IsRecalculated; ++i)
ApplyNextUpdate(DT, BUI);
}
static void ApplyNextUpdate(DomTreeT &DT, BatchUpdateInfo &BUI) {
// Popping the next update, will move the PreViewCFG to the next snapshot.
UpdateT CurrentUpdate = BUI.PreViewCFG.popUpdateForIncrementalUpdates();
#if 0
// FIXME: The LLVM_DEBUG macro only plays well with a modular
// build of LLVM when the header is marked as textual, but doing
// so causes redefinition errors.
LLVM_DEBUG(dbgs() << "Applying update: ");
LLVM_DEBUG(CurrentUpdate.dump(); dbgs() << "\n");
#endif
if (CurrentUpdate.getKind() == UpdateKind::Insert)
InsertEdge(DT, &BUI, CurrentUpdate.getFrom(), CurrentUpdate.getTo());
else
DeleteEdge(DT, &BUI, CurrentUpdate.getFrom(), CurrentUpdate.getTo());
}
//~~
//===--------------- DomTree correctness verification ---------------------===
//~~
// Check if the tree has correct roots. A DominatorTree always has a single
// root which is the function's entry node. A PostDominatorTree can have
// multiple roots - one for each node with no successors and for infinite
// loops.
// Running time: O(N).
bool verifyRoots(const DomTreeT &DT) {
if (!DT.Parent && !DT.Roots.empty()) {
errs() << "Tree has no parent but has roots!\n";
errs().flush();
return false;
}
if (!IsPostDom) {
if (DT.Roots.empty()) {
errs() << "Tree doesn't have a root!\n";
errs().flush();
return false;
}
if (DT.getRoot() != GetEntryNode(DT)) {
errs() << "Tree's root is not its parent's entry node!\n";
errs().flush();
return false;
}
}
RootsT ComputedRoots = FindRoots(DT, nullptr);
if (!isPermutation(DT.Roots, ComputedRoots)) {
errs() << "Tree has different roots than freshly computed ones!\n";
errs() << "\tPDT roots: ";
for (const NodePtr N : DT.Roots) errs() << BlockNamePrinter(N) << ", ";
errs() << "\n\tComputed roots: ";
for (const NodePtr N : ComputedRoots)
errs() << BlockNamePrinter(N) << ", ";
errs() << "\n";
errs().flush();
return false;
}
return true;
}
// Checks if the tree contains all reachable nodes in the input graph.
// Running time: O(N).
bool verifyReachability(const DomTreeT &DT) {
clear();
doFullDFSWalk(DT, AlwaysDescend);
for (auto &NodeToTN : DT.DomTreeNodes) {
const TreeNodePtr TN = NodeToTN.second.get();
const NodePtr BB = TN->getBlock();
// Virtual root has a corresponding virtual CFG node.
if (DT.isVirtualRoot(TN)) continue;
if (NodeToInfo.count(BB) == 0) {
errs() << "DomTree node " << BlockNamePrinter(BB)
<< " not found by DFS walk!\n";
errs().flush();
return false;
}
}
for (const NodePtr N : NumToNode) {
if (N && !DT.getNode(N)) {
errs() << "CFG node " << BlockNamePrinter(N)
<< " not found in the DomTree!\n";
errs().flush();
return false;
}
}
return true;
}
// Check if for every parent with a level L in the tree all of its children
// have level L + 1.
// Running time: O(N).
static bool VerifyLevels(const DomTreeT &DT) {
for (auto &NodeToTN : DT.DomTreeNodes) {
const TreeNodePtr TN = NodeToTN.second.get();
const NodePtr BB = TN->getBlock();
if (!BB) continue;
const TreeNodePtr IDom = TN->getIDom();
if (!IDom && TN->getLevel() != 0) {
errs() << "Node without an IDom " << BlockNamePrinter(BB)
<< " has a nonzero level " << TN->getLevel() << "!\n";
errs().flush();
return false;
}
if (IDom && TN->getLevel() != IDom->getLevel() + 1) {
errs() << "Node " << BlockNamePrinter(BB) << " has level "
<< TN->getLevel() << " while its IDom "
<< BlockNamePrinter(IDom->getBlock()) << " has level "
<< IDom->getLevel() << "!\n";
errs().flush();
return false;
}
}
return true;
}
// Check if the computed DFS numbers are correct. Note that DFS info may not
// be valid, and when that is the case, we don't verify the numbers.
// Running time: O(N log(N)).
static bool VerifyDFSNumbers(const DomTreeT &DT) {
if (!DT.DFSInfoValid || !DT.Parent)
return true;
const NodePtr RootBB = IsPostDom ? nullptr : *DT.root_begin();
const TreeNodePtr Root = DT.getNode(RootBB);
auto PrintNodeAndDFSNums = [](const TreeNodePtr TN) {
errs() << BlockNamePrinter(TN) << " {" << TN->getDFSNumIn() << ", "
<< TN->getDFSNumOut() << '}';
};
// Verify the root's DFS In number. Although DFS numbering would also work
// if we started from some other value, we assume 0-based numbering.
if (Root->getDFSNumIn() != 0) {
errs() << "DFSIn number for the tree root is not:\n\t";
PrintNodeAndDFSNums(Root);
errs() << '\n';
errs().flush();
return false;
}
// For each tree node verify if children's DFS numbers cover their parent's
// DFS numbers with no gaps.
for (const auto &NodeToTN : DT.DomTreeNodes) {
const TreeNodePtr Node = NodeToTN.second.get();
// Handle tree leaves.
if (Node->isLeaf()) {
if (Node->getDFSNumIn() + 1 != Node->getDFSNumOut()) {
errs() << "Tree leaf should have DFSOut = DFSIn + 1:\n\t";
PrintNodeAndDFSNums(Node);
errs() << '\n';
errs().flush();
return false;
}
continue;
}
// Make a copy and sort it such that it is possible to check if there are
// no gaps between DFS numbers of adjacent children.
SmallVector<TreeNodePtr, 8> Children(Node->begin(), Node->end());
llvm::sort(Children, [](const TreeNodePtr Ch1, const TreeNodePtr Ch2) {
return Ch1->getDFSNumIn() < Ch2->getDFSNumIn();
});
auto PrintChildrenError = [Node, &Children, PrintNodeAndDFSNums](
const TreeNodePtr FirstCh, const TreeNodePtr SecondCh) {
assert(FirstCh);
errs() << "Incorrect DFS numbers for:\n\tParent ";
PrintNodeAndDFSNums(Node);
errs() << "\n\tChild ";
PrintNodeAndDFSNums(FirstCh);
if (SecondCh) {
errs() << "\n\tSecond child ";
PrintNodeAndDFSNums(SecondCh);
}
errs() << "\nAll children: ";
for (const TreeNodePtr Ch : Children) {
PrintNodeAndDFSNums(Ch);
errs() << ", ";
}
errs() << '\n';
errs().flush();
};
if (Children.front()->getDFSNumIn() != Node->getDFSNumIn() + 1) {
PrintChildrenError(Children.front(), nullptr);
return false;
}
if (Children.back()->getDFSNumOut() + 1 != Node->getDFSNumOut()) {
PrintChildrenError(Children.back(), nullptr);
return false;
}
for (size_t i = 0, e = Children.size() - 1; i != e; ++i) {
if (Children[i]->getDFSNumOut() + 1 != Children[i + 1]->getDFSNumIn()) {
PrintChildrenError(Children[i], Children[i + 1]);
return false;
}
}
}
return true;
}
// The below routines verify the correctness of the dominator tree relative to
// the CFG it's coming from. A tree is a dominator tree iff it has two
// properties, called the parent property and the sibling property. Tarjan
// and Lengauer prove (but don't explicitly name) the properties as part of
// the proofs in their 1972 paper, but the proofs are mostly part of proving
// things about semidominators and idoms, and some of them are simply asserted
// based on even earlier papers (see, e.g., lemma 2). Some papers refer to
// these properties as "valid" and "co-valid". See, e.g., "Dominators,
// directed bipolar orders, and independent spanning trees" by Loukas
// Georgiadis and Robert E. Tarjan, as well as "Dominator Tree Verification
// and Vertex-Disjoint Paths " by the same authors.
// A very simple and direct explanation of these properties can be found in
// "An Experimental Study of Dynamic Dominators", found at
// https://arxiv.org/abs/1604.02711
// The easiest way to think of the parent property is that it's a requirement
// of being a dominator. Let's just take immediate dominators. For PARENT to
// be an immediate dominator of CHILD, all paths in the CFG must go through
// PARENT before they hit CHILD. This implies that if you were to cut PARENT
// out of the CFG, there should be no paths to CHILD that are reachable. If
// there are, then you now have a path from PARENT to CHILD that goes around
// PARENT and still reaches CHILD, which by definition, means PARENT can't be
// a dominator of CHILD (let alone an immediate one).
// The sibling property is similar. It says that for each pair of sibling
// nodes in the dominator tree (LEFT and RIGHT) , they must not dominate each
// other. If sibling LEFT dominated sibling RIGHT, it means there are no
// paths in the CFG from sibling LEFT to sibling RIGHT that do not go through
// LEFT, and thus, LEFT is really an ancestor (in the dominator tree) of
// RIGHT, not a sibling.
// It is possible to verify the parent and sibling properties in linear time,
// but the algorithms are complex. Instead, we do it in a straightforward
// N^2 and N^3 way below, using direct path reachability.
// Checks if the tree has the parent property: if for all edges from V to W in
// the input graph, such that V is reachable, the parent of W in the tree is
// an ancestor of V in the tree.
// Running time: O(N^2).
//
// This means that if a node gets disconnected from the graph, then all of
// the nodes it dominated previously will now become unreachable.
bool verifyParentProperty(const DomTreeT &DT) {
for (auto &NodeToTN : DT.DomTreeNodes) {
const TreeNodePtr TN = NodeToTN.second.get();
const NodePtr BB = TN->getBlock();
if (!BB || TN->isLeaf())
continue;
LLVM_DEBUG(dbgs() << "Verifying parent property of node "
<< BlockNamePrinter(TN) << "\n");
clear();
doFullDFSWalk(DT, [BB](NodePtr From, NodePtr To) {
return From != BB && To != BB;
});
for (TreeNodePtr Child : TN->children())
if (NodeToInfo.count(Child->getBlock()) != 0) {
errs() << "Child " << BlockNamePrinter(Child)
<< " reachable after its parent " << BlockNamePrinter(BB)
<< " is removed!\n";
errs().flush();
return false;
}
}
return true;
}
// Check if the tree has sibling property: if a node V does not dominate a
// node W for all siblings V and W in the tree.
// Running time: O(N^3).
//
// This means that if a node gets disconnected from the graph, then all of its
// siblings will now still be reachable.
bool verifySiblingProperty(const DomTreeT &DT) {
for (auto &NodeToTN : DT.DomTreeNodes) {
const TreeNodePtr TN = NodeToTN.second.get();
const NodePtr BB = TN->getBlock();
if (!BB || TN->isLeaf())
continue;
for (const TreeNodePtr N : TN->children()) {
clear();
NodePtr BBN = N->getBlock();
doFullDFSWalk(DT, [BBN](NodePtr From, NodePtr To) {
return From != BBN && To != BBN;
});
for (const TreeNodePtr S : TN->children()) {
if (S == N) continue;
if (NodeToInfo.count(S->getBlock()) == 0) {
errs() << "Node " << BlockNamePrinter(S)
<< " not reachable when its sibling " << BlockNamePrinter(N)
<< " is removed!\n";
errs().flush();
return false;
}
}
}
}
return true;
}
// Check if the given tree is the same as a freshly computed one for the same
// Parent.
// Running time: O(N^2), but faster in practice (same as tree construction).
//
// Note that this does not check if that the tree construction algorithm is
// correct and should be only used for fast (but possibly unsound)
// verification.
static bool IsSameAsFreshTree(const DomTreeT &DT) {
DomTreeT FreshTree;
FreshTree.recalculate(*DT.Parent);
const bool Different = DT.compare(FreshTree);
if (Different) {
errs() << (DT.isPostDominator() ? "Post" : "")
<< "DominatorTree is different than a freshly computed one!\n"
<< "\tCurrent:\n";
DT.print(errs());
errs() << "\n\tFreshly computed tree:\n";
FreshTree.print(errs());
errs().flush();
}
return !Different;
}
};
template <class DomTreeT>
void Calculate(DomTreeT &DT) {
SemiNCAInfo<DomTreeT>::CalculateFromScratch(DT, nullptr);
}
template <typename DomTreeT>
void CalculateWithUpdates(DomTreeT &DT,
ArrayRef<typename DomTreeT::UpdateType> Updates) {
// FIXME: Updated to use the PreViewCFG and behave the same as until now.
// This behavior is however incorrect; this actually needs the PostViewCFG.
GraphDiff<typename DomTreeT::NodePtr, DomTreeT::IsPostDominator> PreViewCFG(
Updates, /*ReverseApplyUpdates=*/true);
typename SemiNCAInfo<DomTreeT>::BatchUpdateInfo BUI(PreViewCFG);
SemiNCAInfo<DomTreeT>::CalculateFromScratch(DT, &BUI);
}
template <class DomTreeT>
void InsertEdge(DomTreeT &DT, typename DomTreeT::NodePtr From,
typename DomTreeT::NodePtr To) {
if (DT.isPostDominator()) std::swap(From, To);
SemiNCAInfo<DomTreeT>::InsertEdge(DT, nullptr, From, To);
}
template <class DomTreeT>
void DeleteEdge(DomTreeT &DT, typename DomTreeT::NodePtr From,
typename DomTreeT::NodePtr To) {
if (DT.isPostDominator()) std::swap(From, To);
SemiNCAInfo<DomTreeT>::DeleteEdge(DT, nullptr, From, To);
}
template <class DomTreeT>
void ApplyUpdates(DomTreeT &DT,
GraphDiff<typename DomTreeT::NodePtr,
DomTreeT::IsPostDominator> &PreViewCFG,
GraphDiff<typename DomTreeT::NodePtr,
DomTreeT::IsPostDominator> *PostViewCFG) {
SemiNCAInfo<DomTreeT>::ApplyUpdates(DT, PreViewCFG, PostViewCFG);
}
template <class DomTreeT>
bool Verify(const DomTreeT &DT, typename DomTreeT::VerificationLevel VL) {
SemiNCAInfo<DomTreeT> SNCA(nullptr);
// Simplist check is to compare against a new tree. This will also
// usefully print the old and new trees, if they are different.
if (!SNCA.IsSameAsFreshTree(DT))
return false;
// Common checks to verify the properties of the tree. O(N log N) at worst.
if (!SNCA.verifyRoots(DT) || !SNCA.verifyReachability(DT) ||
!SNCA.VerifyLevels(DT) || !SNCA.VerifyDFSNumbers(DT))
return false;
// Extra checks depending on VerificationLevel. Up to O(N^3).
if (VL == DomTreeT::VerificationLevel::Basic ||
VL == DomTreeT::VerificationLevel::Full)
if (!SNCA.verifyParentProperty(DT))
return false;
if (VL == DomTreeT::VerificationLevel::Full)
if (!SNCA.verifySiblingProperty(DT))
return false;
return true;
}
} // namespace DomTreeBuilder
} // namespace llvm
#undef DEBUG_TYPE
#endif
PK hwFZ@�|�) ) Support/BinaryStreamError.hnu �[��� //===- BinaryStreamError.h - Error extensions for Binary Streams *- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_BINARYSTREAMERROR_H
#define LLVM_SUPPORT_BINARYSTREAMERROR_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Error.h"
#include <string>
namespace llvm {
enum class stream_error_code {
unspecified,
stream_too_short,
invalid_array_size,
invalid_offset,
filesystem_error
};
/// Base class for errors originating when parsing raw PDB files
class BinaryStreamError : public ErrorInfo<BinaryStreamError> {
public:
static char ID;
explicit BinaryStreamError(stream_error_code C);
explicit BinaryStreamError(StringRef Context);
BinaryStreamError(stream_error_code C, StringRef Context);
void log(raw_ostream &OS) const override;
std::error_code convertToErrorCode() const override;
StringRef getErrorMessage() const;
stream_error_code getErrorCode() const { return Code; }
private:
std::string ErrMsg;
stream_error_code Code;
};
} // namespace llvm
#endif // LLVM_SUPPORT_BINARYSTREAMERROR_H
PK hwFZ3s��� � Support/MemAlloc.hnu �[��� //===- MemAlloc.h - Memory allocation functions -----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
///
/// This file defines counterparts of C library allocation functions defined in
/// the namespace 'std'. The new allocation functions crash on allocation
/// failure instead of returning null pointer.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_MEMALLOC_H
#define LLVM_SUPPORT_MEMALLOC_H
#include "llvm/Support/Compiler.h"
#include "llvm/Support/ErrorHandling.h"
#include <cstdlib>
namespace llvm {
LLVM_ATTRIBUTE_RETURNS_NONNULL inline void *safe_malloc(size_t Sz) {
void *Result = std::malloc(Sz);
if (Result == nullptr) {
// It is implementation-defined whether allocation occurs if the space
// requested is zero (ISO/IEC 9899:2018 7.22.3). Retry, requesting
// non-zero, if the space requested was zero.
if (Sz == 0)
return safe_malloc(1);
report_bad_alloc_error("Allocation failed");
}
return Result;
}
LLVM_ATTRIBUTE_RETURNS_NONNULL inline void *safe_calloc(size_t Count,
size_t Sz) {
void *Result = std::calloc(Count, Sz);
if (Result == nullptr) {
// It is implementation-defined whether allocation occurs if the space
// requested is zero (ISO/IEC 9899:2018 7.22.3). Retry, requesting
// non-zero, if the space requested was zero.
if (Count == 0 || Sz == 0)
return safe_malloc(1);
report_bad_alloc_error("Allocation failed");
}
return Result;
}
LLVM_ATTRIBUTE_RETURNS_NONNULL inline void *safe_realloc(void *Ptr, size_t Sz) {
void *Result = std::realloc(Ptr, Sz);
if (Result == nullptr) {
// It is implementation-defined whether allocation occurs if the space
// requested is zero (ISO/IEC 9899:2018 7.22.3). Retry, requesting
// non-zero, if the space requested was zero.
if (Sz == 0)
return safe_malloc(1);
report_bad_alloc_error("Allocation failed");
}
return Result;
}
/// Allocate a buffer of memory with the given size and alignment.
///
/// When the compiler supports aligned operator new, this will use it to to
/// handle even over-aligned allocations.
///
/// However, this doesn't make any attempt to leverage the fancier techniques
/// like posix_memalign due to portability. It is mostly intended to allow
/// compatibility with platforms that, after aligned allocation was added, use
/// reduced default alignment.
LLVM_ATTRIBUTE_RETURNS_NONNULL LLVM_ATTRIBUTE_RETURNS_NOALIAS void *
allocate_buffer(size_t Size, size_t Alignment);
/// Deallocate a buffer of memory with the given size and alignment.
///
/// If supported, this will used the sized delete operator. Also if supported,
/// this will pass the alignment to the delete operator.
///
/// The pointer must have been allocated with the corresponding new operator,
/// most likely using the above helper.
void deallocate_buffer(void *Ptr, size_t Size, size_t Alignment);
} // namespace llvm
#endif
PK hwFZ͉� � Support/CodeGenCoverage.hnu �[��� //== llvm/Support/CodeGenCoverage.h ------------------------------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file This file provides rule coverage tracking for tablegen-erated CodeGen.
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_CODEGENCOVERAGE_H
#define LLVM_SUPPORT_CODEGENCOVERAGE_H
#include "llvm/ADT/BitVector.h"
namespace llvm {
class MemoryBuffer;
class CodeGenCoverage {
protected:
BitVector RuleCoverage;
public:
using const_covered_iterator = BitVector::const_set_bits_iterator;
CodeGenCoverage();
void setCovered(uint64_t RuleID);
bool isCovered(uint64_t RuleID) const;
iterator_range<const_covered_iterator> covered() const;
bool parse(MemoryBuffer &Buffer, StringRef BackendName);
bool emit(StringRef FilePrefix, StringRef BackendName) const;
void reset();
};
} // namespace llvm
#endif // LLVM_SUPPORT_CODEGENCOVERAGE_H
PK hwFZۂG��1 �1 Support/BinaryStreamArray.hnu �[��� //===- BinaryStreamArray.h - Array backed by an arbitrary stream *- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// Lightweight arrays that are backed by an arbitrary BinaryStream. This file
/// provides two different array implementations.
///
/// VarStreamArray - Arrays of variable length records. The user specifies
/// an Extractor type that can extract a record from a given offset and
/// return the number of bytes consumed by the record.
///
/// FixedStreamArray - Arrays of fixed length records. This is similar in
/// spirit to ArrayRef<T>, but since it is backed by a BinaryStream, the
/// elements of the array need not be laid out in contiguous memory.
///
#ifndef LLVM_SUPPORT_BINARYSTREAMARRAY_H
#define LLVM_SUPPORT_BINARYSTREAMARRAY_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/iterator.h"
#include "llvm/Support/Alignment.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Error.h"
#include <cassert>
#include <cstdint>
namespace llvm {
/// VarStreamArrayExtractor is intended to be specialized to provide customized
/// extraction logic. On input it receives a BinaryStreamRef pointing to the
/// beginning of the next record, but where the length of the record is not yet
/// known. Upon completion, it should return an appropriate Error instance if
/// a record could not be extracted, or if one could be extracted it should
/// return success and set Len to the number of bytes this record occupied in
/// the underlying stream, and it should fill out the fields of the value type
/// Item appropriately to represent the current record.
///
/// You can specialize this template for your own custom value types to avoid
/// having to specify a second template argument to VarStreamArray (documented
/// below).
template <typename T> struct VarStreamArrayExtractor {
// Method intentionally deleted. You must provide an explicit specialization
// with the following method implemented.
Error operator()(BinaryStreamRef Stream, uint32_t &Len,
T &Item) const = delete;
};
/// VarStreamArray represents an array of variable length records backed by a
/// stream. This could be a contiguous sequence of bytes in memory, it could
/// be a file on disk, or it could be a PDB stream where bytes are stored as
/// discontiguous blocks in a file. Usually it is desirable to treat arrays
/// as contiguous blocks of memory, but doing so with large PDB files, for
/// example, could mean allocating huge amounts of memory just to allow
/// re-ordering of stream data to be contiguous before iterating over it. By
/// abstracting this out, we need not duplicate this memory, and we can
/// iterate over arrays in arbitrarily formatted streams. Elements are parsed
/// lazily on iteration, so there is no upfront cost associated with building
/// or copying a VarStreamArray, no matter how large it may be.
///
/// You create a VarStreamArray by specifying a ValueType and an Extractor type.
/// If you do not specify an Extractor type, you are expected to specialize
/// VarStreamArrayExtractor<T> for your ValueType.
///
/// By default an Extractor is default constructed in the class, but in some
/// cases you might find it useful for an Extractor to maintain state across
/// extractions. In this case you can provide your own Extractor through a
/// secondary constructor. The following examples show various ways of
/// creating a VarStreamArray.
///
/// // Will use VarStreamArrayExtractor<MyType> as the extractor.
/// VarStreamArray<MyType> MyTypeArray;
///
/// // Will use a default-constructed MyExtractor as the extractor.
/// VarStreamArray<MyType, MyExtractor> MyTypeArray2;
///
/// // Will use the specific instance of MyExtractor provided.
/// // MyExtractor need not be default-constructible in this case.
/// MyExtractor E(SomeContext);
/// VarStreamArray<MyType, MyExtractor> MyTypeArray3(E);
///
template <typename ValueType, typename Extractor> class VarStreamArrayIterator;
template <typename ValueType,
typename Extractor = VarStreamArrayExtractor<ValueType>>
class VarStreamArray {
friend class VarStreamArrayIterator<ValueType, Extractor>;
public:
typedef VarStreamArrayIterator<ValueType, Extractor> Iterator;
VarStreamArray() = default;
explicit VarStreamArray(const Extractor &E) : E(E) {}
explicit VarStreamArray(BinaryStreamRef Stream, uint32_t Skew = 0)
: Stream(Stream), Skew(Skew) {}
VarStreamArray(BinaryStreamRef Stream, const Extractor &E, uint32_t Skew = 0)
: Stream(Stream), E(E), Skew(Skew) {}
Iterator begin(bool *HadError = nullptr) const {
return Iterator(*this, E, Skew, nullptr);
}
bool valid() const { return Stream.valid(); }
bool isOffsetValid(uint32_t Offset) const { return at(Offset) != end(); }
uint32_t skew() const { return Skew; }
Iterator end() const { return Iterator(E); }
bool empty() const { return Stream.getLength() == 0; }
VarStreamArray<ValueType, Extractor> substream(uint32_t Begin,
uint32_t End) const {
assert(Begin >= Skew);
// We should never cut off the beginning of the stream since it might be
// skewed, meaning the initial bytes are important.
BinaryStreamRef NewStream = Stream.slice(0, End);
return {NewStream, E, Begin};
}
/// given an offset into the array's underlying stream, return an
/// iterator to the record at that offset. This is considered unsafe
/// since the behavior is undefined if \p Offset does not refer to the
/// beginning of a valid record.
Iterator at(uint32_t Offset) const {
return Iterator(*this, E, Offset, nullptr);
}
const Extractor &getExtractor() const { return E; }
Extractor &getExtractor() { return E; }
BinaryStreamRef getUnderlyingStream() const { return Stream; }
void setUnderlyingStream(BinaryStreamRef NewStream, uint32_t NewSkew = 0) {
Stream = NewStream;
Skew = NewSkew;
}
void drop_front() { Skew += begin()->length(); }
private:
BinaryStreamRef Stream;
Extractor E;
uint32_t Skew = 0;
};
template <typename ValueType, typename Extractor>
class VarStreamArrayIterator
: public iterator_facade_base<VarStreamArrayIterator<ValueType, Extractor>,
std::forward_iterator_tag, const ValueType> {
typedef VarStreamArrayIterator<ValueType, Extractor> IterType;
typedef VarStreamArray<ValueType, Extractor> ArrayType;
public:
VarStreamArrayIterator(const ArrayType &Array, const Extractor &E,
uint32_t Offset, bool *HadError)
: IterRef(Array.Stream.drop_front(Offset)), Extract(E),
Array(&Array), AbsOffset(Offset), HadError(HadError) {
if (IterRef.getLength() == 0)
moveToEnd();
else {
auto EC = Extract(IterRef, ThisLen, ThisValue);
if (EC) {
consumeError(std::move(EC));
markError();
}
}
}
VarStreamArrayIterator() = default;
explicit VarStreamArrayIterator(const Extractor &E) : Extract(E) {}
~VarStreamArrayIterator() = default;
bool operator==(const IterType &R) const {
if (Array && R.Array) {
// Both have a valid array, make sure they're same.
assert(Array == R.Array);
return IterRef == R.IterRef;
}
// Both iterators are at the end.
if (!Array && !R.Array)
return true;
// One is not at the end and one is.
return false;
}
const ValueType &operator*() const {
assert(Array && !HasError);
return ThisValue;
}
IterType &operator+=(unsigned N) {
for (unsigned I = 0; I < N; ++I) {
// We are done with the current record, discard it so that we are
// positioned at the next record.
AbsOffset += ThisLen;
IterRef = IterRef.drop_front(ThisLen);
if (IterRef.getLength() == 0) {
// There is nothing after the current record, we must make this an end
// iterator.
moveToEnd();
} else {
// There is some data after the current record.
auto EC = Extract(IterRef, ThisLen, ThisValue);
if (EC) {
consumeError(std::move(EC));
markError();
} else if (ThisLen == 0) {
// An empty record? Make this an end iterator.
moveToEnd();
}
}
}
return *this;
}
uint32_t offset() const { return AbsOffset; }
uint32_t getRecordLength() const { return ThisLen; }
private:
void moveToEnd() {
Array = nullptr;
ThisLen = 0;
}
void markError() {
moveToEnd();
HasError = true;
if (HadError != nullptr)
*HadError = true;
}
ValueType ThisValue;
BinaryStreamRef IterRef;
Extractor Extract;
const ArrayType *Array{nullptr};
uint32_t ThisLen{0};
uint32_t AbsOffset{0};
bool HasError{false};
bool *HadError{nullptr};
};
template <typename T> class FixedStreamArrayIterator;
/// FixedStreamArray is similar to VarStreamArray, except with each record
/// having a fixed-length. As with VarStreamArray, there is no upfront
/// cost associated with building or copying a FixedStreamArray, as the
/// memory for each element is not read from the backing stream until that
/// element is iterated.
template <typename T> class FixedStreamArray {
friend class FixedStreamArrayIterator<T>;
public:
typedef FixedStreamArrayIterator<T> Iterator;
FixedStreamArray() = default;
explicit FixedStreamArray(BinaryStreamRef Stream) : Stream(Stream) {
assert(Stream.getLength() % sizeof(T) == 0);
}
bool operator==(const FixedStreamArray<T> &Other) const {
return Stream == Other.Stream;
}
bool operator!=(const FixedStreamArray<T> &Other) const {
return !(*this == Other);
}
FixedStreamArray(const FixedStreamArray &) = default;
FixedStreamArray &operator=(const FixedStreamArray &) = default;
const T &operator[](uint32_t Index) const {
assert(Index < size());
uint32_t Off = Index * sizeof(T);
ArrayRef<uint8_t> Data;
if (auto EC = Stream.readBytes(Off, sizeof(T), Data)) {
assert(false && "Unexpected failure reading from stream");
// This should never happen since we asserted that the stream length was
// an exact multiple of the element size.
consumeError(std::move(EC));
}
assert(isAddrAligned(Align::Of<T>(), Data.data()));
return *reinterpret_cast<const T *>(Data.data());
}
uint32_t size() const { return Stream.getLength() / sizeof(T); }
bool empty() const { return size() == 0; }
FixedStreamArrayIterator<T> begin() const {
return FixedStreamArrayIterator<T>(*this, 0);
}
FixedStreamArrayIterator<T> end() const {
return FixedStreamArrayIterator<T>(*this, size());
}
const T &front() const { return *begin(); }
const T &back() const {
FixedStreamArrayIterator<T> I = end();
return *(--I);
}
BinaryStreamRef getUnderlyingStream() const { return Stream; }
private:
BinaryStreamRef Stream;
};
template <typename T>
class FixedStreamArrayIterator
: public iterator_facade_base<FixedStreamArrayIterator<T>,
std::random_access_iterator_tag, const T> {
public:
FixedStreamArrayIterator(const FixedStreamArray<T> &Array, uint32_t Index)
: Array(Array), Index(Index) {}
FixedStreamArrayIterator(const FixedStreamArrayIterator<T> &Other)
: Array(Other.Array), Index(Other.Index) {}
FixedStreamArrayIterator<T> &
operator=(const FixedStreamArrayIterator<T> &Other) {
Array = Other.Array;
Index = Other.Index;
return *this;
}
const T &operator*() const { return Array[Index]; }
const T &operator*() { return Array[Index]; }
bool operator==(const FixedStreamArrayIterator<T> &R) const {
assert(Array == R.Array);
return (Index == R.Index) && (Array == R.Array);
}
FixedStreamArrayIterator<T> &operator+=(std::ptrdiff_t N) {
Index += N;
return *this;
}
FixedStreamArrayIterator<T> &operator-=(std::ptrdiff_t N) {
assert(std::ptrdiff_t(Index) >= N);
Index -= N;
return *this;
}
std::ptrdiff_t operator-(const FixedStreamArrayIterator<T> &R) const {
assert(Array == R.Array);
assert(Index >= R.Index);
return Index - R.Index;
}
bool operator<(const FixedStreamArrayIterator<T> &RHS) const {
assert(Array == RHS.Array);
return Index < RHS.Index;
}
private:
FixedStreamArray<T> Array;
uint32_t Index;
};
} // namespace llvm
#endif // LLVM_SUPPORT_BINARYSTREAMARRAY_H
PK hwFZ�2�C �C Support/Allocator.hnu �[��� //===- Allocator.h - Simple memory allocation abstraction -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
///
/// This file defines the BumpPtrAllocator interface. BumpPtrAllocator conforms
/// to the LLVM "Allocator" concept and is similar to MallocAllocator, but
/// objects cannot be deallocated. Their lifetime is tied to the lifetime of the
/// allocator.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ALLOCATOR_H
#define LLVM_SUPPORT_ALLOCATOR_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/Alignment.h"
#include "llvm/Support/AllocatorBase.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/MathExtras.h"
#include <algorithm>
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <iterator>
#include <optional>
#include <utility>
namespace llvm {
namespace detail {
// We call out to an external function to actually print the message as the
// printing code uses Allocator.h in its implementation.
void printBumpPtrAllocatorStats(unsigned NumSlabs, size_t BytesAllocated,
size_t TotalMemory);
} // end namespace detail
/// Allocate memory in an ever growing pool, as if by bump-pointer.
///
/// This isn't strictly a bump-pointer allocator as it uses backing slabs of
/// memory rather than relying on a boundless contiguous heap. However, it has
/// bump-pointer semantics in that it is a monotonically growing pool of memory
/// where every allocation is found by merely allocating the next N bytes in
/// the slab, or the next N bytes in the next slab.
///
/// Note that this also has a threshold for forcing allocations above a certain
/// size into their own slab.
///
/// The BumpPtrAllocatorImpl template defaults to using a MallocAllocator
/// object, which wraps malloc, to allocate memory, but it can be changed to
/// use a custom allocator.
///
/// The GrowthDelay specifies after how many allocated slabs the allocator
/// increases the size of the slabs.
template <typename AllocatorT = MallocAllocator, size_t SlabSize = 4096,
size_t SizeThreshold = SlabSize, size_t GrowthDelay = 128>
class BumpPtrAllocatorImpl
: public AllocatorBase<BumpPtrAllocatorImpl<AllocatorT, SlabSize,
SizeThreshold, GrowthDelay>>,
private detail::AllocatorHolder<AllocatorT> {
using AllocTy = detail::AllocatorHolder<AllocatorT>;
public:
static_assert(SizeThreshold <= SlabSize,
"The SizeThreshold must be at most the SlabSize to ensure "
"that objects larger than a slab go into their own memory "
"allocation.");
static_assert(GrowthDelay > 0,
"GrowthDelay must be at least 1 which already increases the"
"slab size after each allocated slab.");
BumpPtrAllocatorImpl() = default;
template <typename T>
BumpPtrAllocatorImpl(T &&Allocator)
: AllocTy(std::forward<T &&>(Allocator)) {}
// Manually implement a move constructor as we must clear the old allocator's
// slabs as a matter of correctness.
BumpPtrAllocatorImpl(BumpPtrAllocatorImpl &&Old)
: AllocTy(std::move(Old.getAllocator())), CurPtr(Old.CurPtr),
End(Old.End), Slabs(std::move(Old.Slabs)),
CustomSizedSlabs(std::move(Old.CustomSizedSlabs)),
BytesAllocated(Old.BytesAllocated), RedZoneSize(Old.RedZoneSize) {
Old.CurPtr = Old.End = nullptr;
Old.BytesAllocated = 0;
Old.Slabs.clear();
Old.CustomSizedSlabs.clear();
}
~BumpPtrAllocatorImpl() {
DeallocateSlabs(Slabs.begin(), Slabs.end());
DeallocateCustomSizedSlabs();
}
BumpPtrAllocatorImpl &operator=(BumpPtrAllocatorImpl &&RHS) {
DeallocateSlabs(Slabs.begin(), Slabs.end());
DeallocateCustomSizedSlabs();
CurPtr = RHS.CurPtr;
End = RHS.End;
BytesAllocated = RHS.BytesAllocated;
RedZoneSize = RHS.RedZoneSize;
Slabs = std::move(RHS.Slabs);
CustomSizedSlabs = std::move(RHS.CustomSizedSlabs);
AllocTy::operator=(std::move(RHS.getAllocator()));
RHS.CurPtr = RHS.End = nullptr;
RHS.BytesAllocated = 0;
RHS.Slabs.clear();
RHS.CustomSizedSlabs.clear();
return *this;
}
/// Deallocate all but the current slab and reset the current pointer
/// to the beginning of it, freeing all memory allocated so far.
void Reset() {
// Deallocate all but the first slab, and deallocate all custom-sized slabs.
DeallocateCustomSizedSlabs();
CustomSizedSlabs.clear();
if (Slabs.empty())
return;
// Reset the state.
BytesAllocated = 0;
CurPtr = (char *)Slabs.front();
End = CurPtr + SlabSize;
__asan_poison_memory_region(*Slabs.begin(), computeSlabSize(0));
DeallocateSlabs(std::next(Slabs.begin()), Slabs.end());
Slabs.erase(std::next(Slabs.begin()), Slabs.end());
}
/// Allocate space at the specified alignment.
// This method is *not* marked noalias, because
// SpecificBumpPtrAllocator::DestroyAll() loops over all allocations, and
// that loop is not based on the Allocate() return value.
//
// Allocate(0, N) is valid, it returns a non-null pointer (which should not
// be dereferenced).
LLVM_ATTRIBUTE_RETURNS_NONNULL void *Allocate(size_t Size, Align Alignment) {
// Keep track of how many bytes we've allocated.
BytesAllocated += Size;
size_t Adjustment = offsetToAlignedAddr(CurPtr, Alignment);
assert(Adjustment + Size >= Size && "Adjustment + Size must not overflow");
size_t SizeToAllocate = Size;
#if LLVM_ADDRESS_SANITIZER_BUILD
// Add trailing bytes as a "red zone" under ASan.
SizeToAllocate += RedZoneSize;
#endif
// Check if we have enough space.
if (Adjustment + SizeToAllocate <= size_t(End - CurPtr)
// We can't return nullptr even for a zero-sized allocation!
&& CurPtr != nullptr) {
char *AlignedPtr = CurPtr + Adjustment;
CurPtr = AlignedPtr + SizeToAllocate;
// Update the allocation point of this memory block in MemorySanitizer.
// Without this, MemorySanitizer messages for values originated from here
// will point to the allocation of the entire slab.
__msan_allocated_memory(AlignedPtr, Size);
// Similarly, tell ASan about this space.
__asan_unpoison_memory_region(AlignedPtr, Size);
return AlignedPtr;
}
// If Size is really big, allocate a separate slab for it.
size_t PaddedSize = SizeToAllocate + Alignment.value() - 1;
if (PaddedSize > SizeThreshold) {
void *NewSlab =
this->getAllocator().Allocate(PaddedSize, alignof(std::max_align_t));
// We own the new slab and don't want anyone reading anyting other than
// pieces returned from this method. So poison the whole slab.
__asan_poison_memory_region(NewSlab, PaddedSize);
CustomSizedSlabs.push_back(std::make_pair(NewSlab, PaddedSize));
uintptr_t AlignedAddr = alignAddr(NewSlab, Alignment);
assert(AlignedAddr + Size <= (uintptr_t)NewSlab + PaddedSize);
char *AlignedPtr = (char*)AlignedAddr;
__msan_allocated_memory(AlignedPtr, Size);
__asan_unpoison_memory_region(AlignedPtr, Size);
return AlignedPtr;
}
// Otherwise, start a new slab and try again.
StartNewSlab();
uintptr_t AlignedAddr = alignAddr(CurPtr, Alignment);
assert(AlignedAddr + SizeToAllocate <= (uintptr_t)End &&
"Unable to allocate memory!");
char *AlignedPtr = (char*)AlignedAddr;
CurPtr = AlignedPtr + SizeToAllocate;
__msan_allocated_memory(AlignedPtr, Size);
__asan_unpoison_memory_region(AlignedPtr, Size);
return AlignedPtr;
}
inline LLVM_ATTRIBUTE_RETURNS_NONNULL void *
Allocate(size_t Size, size_t Alignment) {
assert(Alignment > 0 && "0-byte alignment is not allowed. Use 1 instead.");
return Allocate(Size, Align(Alignment));
}
// Pull in base class overloads.
using AllocatorBase<BumpPtrAllocatorImpl>::Allocate;
// Bump pointer allocators are expected to never free their storage; and
// clients expect pointers to remain valid for non-dereferencing uses even
// after deallocation.
void Deallocate(const void *Ptr, size_t Size, size_t /*Alignment*/) {
__asan_poison_memory_region(Ptr, Size);
}
// Pull in base class overloads.
using AllocatorBase<BumpPtrAllocatorImpl>::Deallocate;
size_t GetNumSlabs() const { return Slabs.size() + CustomSizedSlabs.size(); }
/// \return An index uniquely and reproducibly identifying
/// an input pointer \p Ptr in the given allocator.
/// The returned value is negative iff the object is inside a custom-size
/// slab.
/// Returns an empty optional if the pointer is not found in the allocator.
std::optional<int64_t> identifyObject(const void *Ptr) {
const char *P = static_cast<const char *>(Ptr);
int64_t InSlabIdx = 0;
for (size_t Idx = 0, E = Slabs.size(); Idx < E; Idx++) {
const char *S = static_cast<const char *>(Slabs[Idx]);
if (P >= S && P < S + computeSlabSize(Idx))
return InSlabIdx + static_cast<int64_t>(P - S);
InSlabIdx += static_cast<int64_t>(computeSlabSize(Idx));
}
// Use negative index to denote custom sized slabs.
int64_t InCustomSizedSlabIdx = -1;
for (size_t Idx = 0, E = CustomSizedSlabs.size(); Idx < E; Idx++) {
const char *S = static_cast<const char *>(CustomSizedSlabs[Idx].first);
size_t Size = CustomSizedSlabs[Idx].second;
if (P >= S && P < S + Size)
return InCustomSizedSlabIdx - static_cast<int64_t>(P - S);
InCustomSizedSlabIdx -= static_cast<int64_t>(Size);
}
return std::nullopt;
}
/// A wrapper around identifyObject that additionally asserts that
/// the object is indeed within the allocator.
/// \return An index uniquely and reproducibly identifying
/// an input pointer \p Ptr in the given allocator.
int64_t identifyKnownObject(const void *Ptr) {
std::optional<int64_t> Out = identifyObject(Ptr);
assert(Out && "Wrong allocator used");
return *Out;
}
/// A wrapper around identifyKnownObject. Accepts type information
/// about the object and produces a smaller identifier by relying on
/// the alignment information. Note that sub-classes may have different
/// alignment, so the most base class should be passed as template parameter
/// in order to obtain correct results. For that reason automatic template
/// parameter deduction is disabled.
/// \return An index uniquely and reproducibly identifying
/// an input pointer \p Ptr in the given allocator. This identifier is
/// different from the ones produced by identifyObject and
/// identifyAlignedObject.
template <typename T>
int64_t identifyKnownAlignedObject(const void *Ptr) {
int64_t Out = identifyKnownObject(Ptr);
assert(Out % alignof(T) == 0 && "Wrong alignment information");
return Out / alignof(T);
}
size_t getTotalMemory() const {
size_t TotalMemory = 0;
for (auto I = Slabs.begin(), E = Slabs.end(); I != E; ++I)
TotalMemory += computeSlabSize(std::distance(Slabs.begin(), I));
for (const auto &PtrAndSize : CustomSizedSlabs)
TotalMemory += PtrAndSize.second;
return TotalMemory;
}
size_t getBytesAllocated() const { return BytesAllocated; }
void setRedZoneSize(size_t NewSize) {
RedZoneSize = NewSize;
}
void PrintStats() const {
detail::printBumpPtrAllocatorStats(Slabs.size(), BytesAllocated,
getTotalMemory());
}
private:
/// The current pointer into the current slab.
///
/// This points to the next free byte in the slab.
char *CurPtr = nullptr;
/// The end of the current slab.
char *End = nullptr;
/// The slabs allocated so far.
SmallVector<void *, 4> Slabs;
/// Custom-sized slabs allocated for too-large allocation requests.
SmallVector<std::pair<void *, size_t>, 0> CustomSizedSlabs;
/// How many bytes we've allocated.
///
/// Used so that we can compute how much space was wasted.
size_t BytesAllocated = 0;
/// The number of bytes to put between allocations when running under
/// a sanitizer.
size_t RedZoneSize = 1;
static size_t computeSlabSize(unsigned SlabIdx) {
// Scale the actual allocated slab size based on the number of slabs
// allocated. Every GrowthDelay slabs allocated, we double
// the allocated size to reduce allocation frequency, but saturate at
// multiplying the slab size by 2^30.
return SlabSize *
((size_t)1 << std::min<size_t>(30, SlabIdx / GrowthDelay));
}
/// Allocate a new slab and move the bump pointers over into the new
/// slab, modifying CurPtr and End.
void StartNewSlab() {
size_t AllocatedSlabSize = computeSlabSize(Slabs.size());
void *NewSlab = this->getAllocator().Allocate(AllocatedSlabSize,
alignof(std::max_align_t));
// We own the new slab and don't want anyone reading anything other than
// pieces returned from this method. So poison the whole slab.
__asan_poison_memory_region(NewSlab, AllocatedSlabSize);
Slabs.push_back(NewSlab);
CurPtr = (char *)(NewSlab);
End = ((char *)NewSlab) + AllocatedSlabSize;
}
/// Deallocate a sequence of slabs.
void DeallocateSlabs(SmallVectorImpl<void *>::iterator I,
SmallVectorImpl<void *>::iterator E) {
for (; I != E; ++I) {
size_t AllocatedSlabSize =
computeSlabSize(std::distance(Slabs.begin(), I));
this->getAllocator().Deallocate(*I, AllocatedSlabSize,
alignof(std::max_align_t));
}
}
/// Deallocate all memory for custom sized slabs.
void DeallocateCustomSizedSlabs() {
for (auto &PtrAndSize : CustomSizedSlabs) {
void *Ptr = PtrAndSize.first;
size_t Size = PtrAndSize.second;
this->getAllocator().Deallocate(Ptr, Size, alignof(std::max_align_t));
}
}
template <typename T> friend class SpecificBumpPtrAllocator;
};
/// The standard BumpPtrAllocator which just uses the default template
/// parameters.
typedef BumpPtrAllocatorImpl<> BumpPtrAllocator;
/// A BumpPtrAllocator that allows only elements of a specific type to be
/// allocated.
///
/// This allows calling the destructor in DestroyAll() and when the allocator is
/// destroyed.
template <typename T> class SpecificBumpPtrAllocator {
BumpPtrAllocator Allocator;
public:
SpecificBumpPtrAllocator() {
// Because SpecificBumpPtrAllocator walks the memory to call destructors,
// it can't have red zones between allocations.
Allocator.setRedZoneSize(0);
}
SpecificBumpPtrAllocator(SpecificBumpPtrAllocator &&Old)
: Allocator(std::move(Old.Allocator)) {}
~SpecificBumpPtrAllocator() { DestroyAll(); }
SpecificBumpPtrAllocator &operator=(SpecificBumpPtrAllocator &&RHS) {
Allocator = std::move(RHS.Allocator);
return *this;
}
/// Call the destructor of each allocated object and deallocate all but the
/// current slab and reset the current pointer to the beginning of it, freeing
/// all memory allocated so far.
void DestroyAll() {
auto DestroyElements = [](char *Begin, char *End) {
assert(Begin == (char *)alignAddr(Begin, Align::Of<T>()));
for (char *Ptr = Begin; Ptr + sizeof(T) <= End; Ptr += sizeof(T))
reinterpret_cast<T *>(Ptr)->~T();
};
for (auto I = Allocator.Slabs.begin(), E = Allocator.Slabs.end(); I != E;
++I) {
size_t AllocatedSlabSize = BumpPtrAllocator::computeSlabSize(
std::distance(Allocator.Slabs.begin(), I));
char *Begin = (char *)alignAddr(*I, Align::Of<T>());
char *End = *I == Allocator.Slabs.back() ? Allocator.CurPtr
: (char *)*I + AllocatedSlabSize;
DestroyElements(Begin, End);
}
for (auto &PtrAndSize : Allocator.CustomSizedSlabs) {
void *Ptr = PtrAndSize.first;
size_t Size = PtrAndSize.second;
DestroyElements((char *)alignAddr(Ptr, Align::Of<T>()),
(char *)Ptr + Size);
}
Allocator.Reset();
}
/// Allocate space for an array of objects without constructing them.
T *Allocate(size_t num = 1) { return Allocator.Allocate<T>(num); }
};
} // end namespace llvm
template <typename AllocatorT, size_t SlabSize, size_t SizeThreshold,
size_t GrowthDelay>
void *
operator new(size_t Size,
llvm::BumpPtrAllocatorImpl<AllocatorT, SlabSize, SizeThreshold,
GrowthDelay> &Allocator) {
return Allocator.Allocate(Size, std::min((size_t)llvm::NextPowerOf2(Size),
alignof(std::max_align_t)));
}
template <typename AllocatorT, size_t SlabSize, size_t SizeThreshold,
size_t GrowthDelay>
void operator delete(void *,
llvm::BumpPtrAllocatorImpl<AllocatorT, SlabSize,
SizeThreshold, GrowthDelay> &) {
}
#endif // LLVM_SUPPORT_ALLOCATOR_H
PK hwFZ|��� � Support/LLVMDriver.hnu �[��� //===- LLVMDriver.h ---------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_LLVMDRIVER_H
#define LLVM_SUPPORT_LLVMDRIVER_H
#include "llvm/ADT/SmallVector.h"
namespace llvm {
struct ToolContext {
const char *Path;
const char *PrependArg;
// PrependArg will be added unconditionally by the llvm-driver, but
// NeedsPrependArg will be false if Path is adequate to reinvoke the tool.
// This is useful if realpath is ever called on Path, in which case it will
// point to the llvm-driver executable, where PrependArg will be needed to
// invoke the correct tool.
bool NeedsPrependArg;
};
} // namespace llvm
#endif
PK hwFZP���N N Support/SMLoc.hnu �[��� //===- SMLoc.h - Source location for use with diagnostics -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the SMLoc class. This class encapsulates a location in
// source code for use in diagnostics.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_SMLOC_H
#define LLVM_SUPPORT_SMLOC_H
#include <cassert>
#include <optional>
namespace llvm {
/// Represents a location in source code.
class SMLoc {
const char *Ptr = nullptr;
public:
constexpr SMLoc() = default;
constexpr bool isValid() const { return Ptr != nullptr; }
constexpr bool operator==(const SMLoc &RHS) const { return RHS.Ptr == Ptr; }
constexpr bool operator!=(const SMLoc &RHS) const { return RHS.Ptr != Ptr; }
constexpr const char *getPointer() const { return Ptr; }
static SMLoc getFromPointer(const char *Ptr) {
SMLoc L;
L.Ptr = Ptr;
return L;
}
};
/// Represents a range in source code.
///
/// SMRange is implemented using a half-open range, as is the convention in C++.
/// In the string "abc", the range [1,3) represents the substring "bc", and the
/// range [2,2) represents an empty range between the characters "b" and "c".
class SMRange {
public:
SMLoc Start, End;
SMRange() = default;
SMRange(std::nullopt_t) {}
SMRange(SMLoc St, SMLoc En) : Start(St), End(En) {
assert(Start.isValid() == End.isValid() &&
"Start and End should either both be valid or both be invalid!");
}
bool isValid() const { return Start.isValid(); }
};
} // end namespace llvm
#endif // LLVM_SUPPORT_SMLOC_H
PK hwFZ~��z z Support/CachePruning.hnu �[��� //=- CachePruning.h - Helper to manage the pruning of a cache dir -*- C++ -*-=//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements pruning of a directory intended for cache storage, using
// various policies.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_CACHEPRUNING_H
#define LLVM_SUPPORT_CACHEPRUNING_H
#include "llvm/Support/MemoryBuffer.h"
#include <chrono>
#include <optional>
namespace llvm {
template <typename T> class Expected;
class StringRef;
/// Policy for the pruneCache() function. A default constructed
/// CachePruningPolicy provides a reasonable default policy.
struct CachePruningPolicy {
/// The pruning interval. This is intended to be used to avoid scanning the
/// directory too often. It does not impact the decision of which file to
/// prune. A value of 0 forces the scan to occur. A value of std::nullopt
/// disables pruning.
std::optional<std::chrono::seconds> Interval = std::chrono::seconds(1200);
/// The expiration for a file. When a file hasn't been accessed for Expiration
/// seconds, it is removed from the cache. A value of 0 disables the
/// expiration-based pruning.
std::chrono::seconds Expiration = std::chrono::hours(7 * 24); // 1w
/// The maximum size for the cache directory, in terms of percentage of the
/// available space on the disk. Set to 100 to indicate no limit, 50 to
/// indicate that the cache size will not be left over half the available disk
/// space. A value over 100 will be reduced to 100. A value of 0 disables the
/// percentage size-based pruning.
unsigned MaxSizePercentageOfAvailableSpace = 75;
/// The maximum size for the cache directory in bytes. A value over the amount
/// of available space on the disk will be reduced to the amount of available
/// space. A value of 0 disables the absolute size-based pruning.
uint64_t MaxSizeBytes = 0;
/// The maximum number of files in the cache directory. A value of 0 disables
/// the number of files based pruning.
///
/// This defaults to 1000000 because with that many files there are
/// diminishing returns on the effectiveness of the cache. Some systems have a
/// limit on total number of files, and some also limit the number of files
/// per directory, such as Linux ext4, with the default setting (block size is
/// 4096 and large_dir disabled), there is a per-directory entry limit of
/// 508*510*floor(4096/(40+8))~=20M for average filename length of 40.
uint64_t MaxSizeFiles = 1000000;
};
/// Parse the given string as a cache pruning policy. Defaults are taken from a
/// default constructed CachePruningPolicy object.
/// For example: "prune_interval=30s:prune_after=24h:cache_size=50%"
/// which means a pruning interval of 30 seconds, expiration time of 24 hours
/// and maximum cache size of 50% of available disk space.
Expected<CachePruningPolicy> parseCachePruningPolicy(StringRef PolicyStr);
/// Peform pruning using the supplied policy, returns true if pruning
/// occurred, i.e. if Policy.Interval was expired.
///
/// Check whether cache pruning happens using the supplied policy, adds a
/// ThinLTO warning if cache_size_bytes or cache_size_files is too small for the
/// current link job. The warning recommends the user to consider adjusting
/// --thinlto-cache-policy.
///
/// As a safeguard against data loss if the user specifies the wrong directory
/// as their cache directory, this function will ignore files not matching the
/// pattern "llvmcache-*".
bool pruneCache(StringRef Path, CachePruningPolicy Policy,
const std::vector<std::unique_ptr<MemoryBuffer>> &Files = {});
} // namespace llvm
#endif
PK hwFZ�� Support/YAMLTraits.hnu �[��� //===- llvm/Support/YAMLTraits.h --------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_YAMLTRAITS_H
#define LLVM_SUPPORT_YAMLTRAITS_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Support/AlignOf.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/SMLoc.h"
#include "llvm/Support/SourceMgr.h"
#include "llvm/Support/YAMLParser.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <map>
#include <memory>
#include <new>
#include <optional>
#include <string>
#include <system_error>
#include <type_traits>
#include <vector>
namespace llvm {
class VersionTuple;
namespace yaml {
enum class NodeKind : uint8_t {
Scalar,
Map,
Sequence,
};
struct EmptyContext {};
/// This class should be specialized by any type that needs to be converted
/// to/from a YAML mapping. For example:
///
/// struct MappingTraits<MyStruct> {
/// static void mapping(IO &io, MyStruct &s) {
/// io.mapRequired("name", s.name);
/// io.mapRequired("size", s.size);
/// io.mapOptional("age", s.age);
/// }
/// };
template<class T>
struct MappingTraits {
// Must provide:
// static void mapping(IO &io, T &fields);
// Optionally may provide:
// static std::string validate(IO &io, T &fields);
// static void enumInput(IO &io, T &value);
//
// The optional flow flag will cause generated YAML to use a flow mapping
// (e.g. { a: 0, b: 1 }):
// static const bool flow = true;
};
/// This class is similar to MappingTraits<T> but allows you to pass in
/// additional context for each map operation. For example:
///
/// struct MappingContextTraits<MyStruct, MyContext> {
/// static void mapping(IO &io, MyStruct &s, MyContext &c) {
/// io.mapRequired("name", s.name);
/// io.mapRequired("size", s.size);
/// io.mapOptional("age", s.age);
/// ++c.TimesMapped;
/// }
/// };
template <class T, class Context> struct MappingContextTraits {
// Must provide:
// static void mapping(IO &io, T &fields, Context &Ctx);
// Optionally may provide:
// static std::string validate(IO &io, T &fields, Context &Ctx);
//
// The optional flow flag will cause generated YAML to use a flow mapping
// (e.g. { a: 0, b: 1 }):
// static const bool flow = true;
};
/// This class should be specialized by any integral type that converts
/// to/from a YAML scalar where there is a one-to-one mapping between
/// in-memory values and a string in YAML. For example:
///
/// struct ScalarEnumerationTraits<Colors> {
/// static void enumeration(IO &io, Colors &value) {
/// io.enumCase(value, "red", cRed);
/// io.enumCase(value, "blue", cBlue);
/// io.enumCase(value, "green", cGreen);
/// }
/// };
template <typename T, typename Enable = void> struct ScalarEnumerationTraits {
// Must provide:
// static void enumeration(IO &io, T &value);
};
/// This class should be specialized by any integer type that is a union
/// of bit values and the YAML representation is a flow sequence of
/// strings. For example:
///
/// struct ScalarBitSetTraits<MyFlags> {
/// static void bitset(IO &io, MyFlags &value) {
/// io.bitSetCase(value, "big", flagBig);
/// io.bitSetCase(value, "flat", flagFlat);
/// io.bitSetCase(value, "round", flagRound);
/// }
/// };
template <typename T, typename Enable = void> struct ScalarBitSetTraits {
// Must provide:
// static void bitset(IO &io, T &value);
};
/// Describe which type of quotes should be used when quoting is necessary.
/// Some non-printable characters need to be double-quoted, while some others
/// are fine with simple-quoting, and some don't need any quoting.
enum class QuotingType { None, Single, Double };
/// This class should be specialized by type that requires custom conversion
/// to/from a yaml scalar. For example:
///
/// template<>
/// struct ScalarTraits<MyType> {
/// static void output(const MyType &val, void*, llvm::raw_ostream &out) {
/// // stream out custom formatting
/// out << llvm::format("%x", val);
/// }
/// static StringRef input(StringRef scalar, void*, MyType &value) {
/// // parse scalar and set `value`
/// // return empty string on success, or error string
/// return StringRef();
/// }
/// static QuotingType mustQuote(StringRef) { return QuotingType::Single; }
/// };
template <typename T, typename Enable = void> struct ScalarTraits {
// Must provide:
//
// Function to write the value as a string:
// static void output(const T &value, void *ctxt, llvm::raw_ostream &out);
//
// Function to convert a string to a value. Returns the empty
// StringRef on success or an error string if string is malformed:
// static StringRef input(StringRef scalar, void *ctxt, T &value);
//
// Function to determine if the value should be quoted.
// static QuotingType mustQuote(StringRef);
};
/// This class should be specialized by type that requires custom conversion
/// to/from a YAML literal block scalar. For example:
///
/// template <>
/// struct BlockScalarTraits<MyType> {
/// static void output(const MyType &Value, void*, llvm::raw_ostream &Out)
/// {
/// // stream out custom formatting
/// Out << Value;
/// }
/// static StringRef input(StringRef Scalar, void*, MyType &Value) {
/// // parse scalar and set `value`
/// // return empty string on success, or error string
/// return StringRef();
/// }
/// };
template <typename T>
struct BlockScalarTraits {
// Must provide:
//
// Function to write the value as a string:
// static void output(const T &Value, void *ctx, llvm::raw_ostream &Out);
//
// Function to convert a string to a value. Returns the empty
// StringRef on success or an error string if string is malformed:
// static StringRef input(StringRef Scalar, void *ctxt, T &Value);
//
// Optional:
// static StringRef inputTag(T &Val, std::string Tag)
// static void outputTag(const T &Val, raw_ostream &Out)
};
/// This class should be specialized by type that requires custom conversion
/// to/from a YAML scalar with optional tags. For example:
///
/// template <>
/// struct TaggedScalarTraits<MyType> {
/// static void output(const MyType &Value, void*, llvm::raw_ostream
/// &ScalarOut, llvm::raw_ostream &TagOut)
/// {
/// // stream out custom formatting including optional Tag
/// Out << Value;
/// }
/// static StringRef input(StringRef Scalar, StringRef Tag, void*, MyType
/// &Value) {
/// // parse scalar and set `value`
/// // return empty string on success, or error string
/// return StringRef();
/// }
/// static QuotingType mustQuote(const MyType &Value, StringRef) {
/// return QuotingType::Single;
/// }
/// };
template <typename T> struct TaggedScalarTraits {
// Must provide:
//
// Function to write the value and tag as strings:
// static void output(const T &Value, void *ctx, llvm::raw_ostream &ScalarOut,
// llvm::raw_ostream &TagOut);
//
// Function to convert a string to a value. Returns the empty
// StringRef on success or an error string if string is malformed:
// static StringRef input(StringRef Scalar, StringRef Tag, void *ctxt, T
// &Value);
//
// Function to determine if the value should be quoted.
// static QuotingType mustQuote(const T &Value, StringRef Scalar);
};
/// This class should be specialized by any type that needs to be converted
/// to/from a YAML sequence. For example:
///
/// template<>
/// struct SequenceTraits<MyContainer> {
/// static size_t size(IO &io, MyContainer &seq) {
/// return seq.size();
/// }
/// static MyType& element(IO &, MyContainer &seq, size_t index) {
/// if ( index >= seq.size() )
/// seq.resize(index+1);
/// return seq[index];
/// }
/// };
template<typename T, typename EnableIf = void>
struct SequenceTraits {
// Must provide:
// static size_t size(IO &io, T &seq);
// static T::value_type& element(IO &io, T &seq, size_t index);
//
// The following is option and will cause generated YAML to use
// a flow sequence (e.g. [a,b,c]).
// static const bool flow = true;
};
/// This class should be specialized by any type for which vectors of that
/// type need to be converted to/from a YAML sequence.
template<typename T, typename EnableIf = void>
struct SequenceElementTraits {
// Must provide:
// static const bool flow;
};
/// This class should be specialized by any type that needs to be converted
/// to/from a list of YAML documents.
template<typename T>
struct DocumentListTraits {
// Must provide:
// static size_t size(IO &io, T &seq);
// static T::value_type& element(IO &io, T &seq, size_t index);
};
/// This class should be specialized by any type that needs to be converted
/// to/from a YAML mapping in the case where the names of the keys are not known
/// in advance, e.g. a string map.
template <typename T>
struct CustomMappingTraits {
// static void inputOne(IO &io, StringRef key, T &elem);
// static void output(IO &io, T &elem);
};
/// This class should be specialized by any type that can be represented as
/// a scalar, map, or sequence, decided dynamically. For example:
///
/// typedef std::unique_ptr<MyBase> MyPoly;
///
/// template<>
/// struct PolymorphicTraits<MyPoly> {
/// static NodeKind getKind(const MyPoly &poly) {
/// return poly->getKind();
/// }
/// static MyScalar& getAsScalar(MyPoly &poly) {
/// if (!poly || !isa<MyScalar>(poly))
/// poly.reset(new MyScalar());
/// return *cast<MyScalar>(poly.get());
/// }
/// // ...
/// };
template <typename T> struct PolymorphicTraits {
// Must provide:
// static NodeKind getKind(const T &poly);
// static scalar_type &getAsScalar(T &poly);
// static map_type &getAsMap(T &poly);
// static sequence_type &getAsSequence(T &poly);
};
// Only used for better diagnostics of missing traits
template <typename T>
struct MissingTrait;
// Test if ScalarEnumerationTraits<T> is defined on type T.
template <class T>
struct has_ScalarEnumerationTraits
{
using Signature_enumeration = void (*)(class IO&, T&);
template <typename U>
static char test(SameType<Signature_enumeration, &U::enumeration>*);
template <typename U>
static double test(...);
static bool const value =
(sizeof(test<ScalarEnumerationTraits<T>>(nullptr)) == 1);
};
// Test if ScalarBitSetTraits<T> is defined on type T.
template <class T>
struct has_ScalarBitSetTraits
{
using Signature_bitset = void (*)(class IO&, T&);
template <typename U>
static char test(SameType<Signature_bitset, &U::bitset>*);
template <typename U>
static double test(...);
static bool const value = (sizeof(test<ScalarBitSetTraits<T>>(nullptr)) == 1);
};
// Test if ScalarTraits<T> is defined on type T.
template <class T>
struct has_ScalarTraits
{
using Signature_input = StringRef (*)(StringRef, void*, T&);
using Signature_output = void (*)(const T&, void*, raw_ostream&);
using Signature_mustQuote = QuotingType (*)(StringRef);
template <typename U>
static char test(SameType<Signature_input, &U::input> *,
SameType<Signature_output, &U::output> *,
SameType<Signature_mustQuote, &U::mustQuote> *);
template <typename U>
static double test(...);
static bool const value =
(sizeof(test<ScalarTraits<T>>(nullptr, nullptr, nullptr)) == 1);
};
// Test if BlockScalarTraits<T> is defined on type T.
template <class T>
struct has_BlockScalarTraits
{
using Signature_input = StringRef (*)(StringRef, void *, T &);
using Signature_output = void (*)(const T &, void *, raw_ostream &);
template <typename U>
static char test(SameType<Signature_input, &U::input> *,
SameType<Signature_output, &U::output> *);
template <typename U>
static double test(...);
static bool const value =
(sizeof(test<BlockScalarTraits<T>>(nullptr, nullptr)) == 1);
};
// Test if TaggedScalarTraits<T> is defined on type T.
template <class T> struct has_TaggedScalarTraits {
using Signature_input = StringRef (*)(StringRef, StringRef, void *, T &);
using Signature_output = void (*)(const T &, void *, raw_ostream &,
raw_ostream &);
using Signature_mustQuote = QuotingType (*)(const T &, StringRef);
template <typename U>
static char test(SameType<Signature_input, &U::input> *,
SameType<Signature_output, &U::output> *,
SameType<Signature_mustQuote, &U::mustQuote> *);
template <typename U> static double test(...);
static bool const value =
(sizeof(test<TaggedScalarTraits<T>>(nullptr, nullptr, nullptr)) == 1);
};
// Test if MappingContextTraits<T> is defined on type T.
template <class T, class Context> struct has_MappingTraits {
using Signature_mapping = void (*)(class IO &, T &, Context &);
template <typename U>
static char test(SameType<Signature_mapping, &U::mapping>*);
template <typename U>
static double test(...);
static bool const value =
(sizeof(test<MappingContextTraits<T, Context>>(nullptr)) == 1);
};
// Test if MappingTraits<T> is defined on type T.
template <class T> struct has_MappingTraits<T, EmptyContext> {
using Signature_mapping = void (*)(class IO &, T &);
template <typename U>
static char test(SameType<Signature_mapping, &U::mapping> *);
template <typename U> static double test(...);
static bool const value = (sizeof(test<MappingTraits<T>>(nullptr)) == 1);
};
// Test if MappingContextTraits<T>::validate() is defined on type T.
template <class T, class Context> struct has_MappingValidateTraits {
using Signature_validate = std::string (*)(class IO &, T &, Context &);
template <typename U>
static char test(SameType<Signature_validate, &U::validate>*);
template <typename U>
static double test(...);
static bool const value =
(sizeof(test<MappingContextTraits<T, Context>>(nullptr)) == 1);
};
// Test if MappingTraits<T>::validate() is defined on type T.
template <class T> struct has_MappingValidateTraits<T, EmptyContext> {
using Signature_validate = std::string (*)(class IO &, T &);
template <typename U>
static char test(SameType<Signature_validate, &U::validate> *);
template <typename U> static double test(...);
static bool const value = (sizeof(test<MappingTraits<T>>(nullptr)) == 1);
};
// Test if MappingContextTraits<T>::enumInput() is defined on type T.
template <class T, class Context> struct has_MappingEnumInputTraits {
using Signature_validate = void (*)(class IO &, T &);
template <typename U>
static char test(SameType<Signature_validate, &U::enumInput> *);
template <typename U> static double test(...);
static bool const value =
(sizeof(test<MappingContextTraits<T, Context>>(nullptr)) == 1);
};
// Test if MappingTraits<T>::enumInput() is defined on type T.
template <class T> struct has_MappingEnumInputTraits<T, EmptyContext> {
using Signature_validate = void (*)(class IO &, T &);
template <typename U>
static char test(SameType<Signature_validate, &U::enumInput> *);
template <typename U> static double test(...);
static bool const value = (sizeof(test<MappingTraits<T>>(nullptr)) == 1);
};
// Test if SequenceTraits<T> is defined on type T.
template <class T>
struct has_SequenceMethodTraits
{
using Signature_size = size_t (*)(class IO&, T&);
template <typename U>
static char test(SameType<Signature_size, &U::size>*);
template <typename U>
static double test(...);
static bool const value = (sizeof(test<SequenceTraits<T>>(nullptr)) == 1);
};
// Test if CustomMappingTraits<T> is defined on type T.
template <class T>
struct has_CustomMappingTraits
{
using Signature_input = void (*)(IO &io, StringRef key, T &v);
template <typename U>
static char test(SameType<Signature_input, &U::inputOne>*);
template <typename U>
static double test(...);
static bool const value =
(sizeof(test<CustomMappingTraits<T>>(nullptr)) == 1);
};
// has_FlowTraits<int> will cause an error with some compilers because
// it subclasses int. Using this wrapper only instantiates the
// real has_FlowTraits only if the template type is a class.
template <typename T, bool Enabled = std::is_class_v<T>> class has_FlowTraits {
public:
static const bool value = false;
};
// Some older gcc compilers don't support straight forward tests
// for members, so test for ambiguity cause by the base and derived
// classes both defining the member.
template <class T>
struct has_FlowTraits<T, true>
{
struct Fallback { bool flow; };
struct Derived : T, Fallback { };
template<typename C>
static char (&f(SameType<bool Fallback::*, &C::flow>*))[1];
template<typename C>
static char (&f(...))[2];
static bool const value = sizeof(f<Derived>(nullptr)) == 2;
};
// Test if SequenceTraits<T> is defined on type T
template<typename T>
struct has_SequenceTraits : public std::integral_constant<bool,
has_SequenceMethodTraits<T>::value > { };
// Test if DocumentListTraits<T> is defined on type T
template <class T>
struct has_DocumentListTraits
{
using Signature_size = size_t (*)(class IO &, T &);
template <typename U>
static char test(SameType<Signature_size, &U::size>*);
template <typename U>
static double test(...);
static bool const value = (sizeof(test<DocumentListTraits<T>>(nullptr))==1);
};
template <class T> struct has_PolymorphicTraits {
using Signature_getKind = NodeKind (*)(const T &);
template <typename U>
static char test(SameType<Signature_getKind, &U::getKind> *);
template <typename U> static double test(...);
static bool const value = (sizeof(test<PolymorphicTraits<T>>(nullptr)) == 1);
};
inline bool isNumeric(StringRef S) {
const auto skipDigits = [](StringRef Input) {
return Input.ltrim("0123456789");
};
// Make S.front() and S.drop_front().front() (if S.front() is [+-]) calls
// safe.
if (S.empty() || S.equals("+") || S.equals("-"))
return false;
if (S.equals(".nan") || S.equals(".NaN") || S.equals(".NAN"))
return true;
// Infinity and decimal numbers can be prefixed with sign.
StringRef Tail = (S.front() == '-' || S.front() == '+') ? S.drop_front() : S;
// Check for infinity first, because checking for hex and oct numbers is more
// expensive.
if (Tail.equals(".inf") || Tail.equals(".Inf") || Tail.equals(".INF"))
return true;
// Section 10.3.2 Tag Resolution
// YAML 1.2 Specification prohibits Base 8 and Base 16 numbers prefixed with
// [-+], so S should be used instead of Tail.
if (S.startswith("0o"))
return S.size() > 2 &&
S.drop_front(2).find_first_not_of("01234567") == StringRef::npos;
if (S.startswith("0x"))
return S.size() > 2 && S.drop_front(2).find_first_not_of(
"0123456789abcdefABCDEF") == StringRef::npos;
// Parse float: [-+]? (\. [0-9]+ | [0-9]+ (\. [0-9]* )?) ([eE] [-+]? [0-9]+)?
S = Tail;
// Handle cases when the number starts with '.' and hence needs at least one
// digit after dot (as opposed by number which has digits before the dot), but
// doesn't have one.
if (S.startswith(".") &&
(S.equals(".") ||
(S.size() > 1 && std::strchr("0123456789", S[1]) == nullptr)))
return false;
if (S.startswith("E") || S.startswith("e"))
return false;
enum ParseState {
Default,
FoundDot,
FoundExponent,
};
ParseState State = Default;
S = skipDigits(S);
// Accept decimal integer.
if (S.empty())
return true;
if (S.front() == '.') {
State = FoundDot;
S = S.drop_front();
} else if (S.front() == 'e' || S.front() == 'E') {
State = FoundExponent;
S = S.drop_front();
} else {
return false;
}
if (State == FoundDot) {
S = skipDigits(S);
if (S.empty())
return true;
if (S.front() == 'e' || S.front() == 'E') {
State = FoundExponent;
S = S.drop_front();
} else {
return false;
}
}
assert(State == FoundExponent && "Should have found exponent at this point.");
if (S.empty())
return false;
if (S.front() == '+' || S.front() == '-') {
S = S.drop_front();
if (S.empty())
return false;
}
return skipDigits(S).empty();
}
inline bool isNull(StringRef S) {
return S.equals("null") || S.equals("Null") || S.equals("NULL") ||
S.equals("~");
}
inline bool isBool(StringRef S) {
// FIXME: using parseBool is causing multiple tests to fail.
return S.equals("true") || S.equals("True") || S.equals("TRUE") ||
S.equals("false") || S.equals("False") || S.equals("FALSE");
}
// 5.1. Character Set
// The allowed character range explicitly excludes the C0 control block #x0-#x1F
// (except for TAB #x9, LF #xA, and CR #xD which are allowed), DEL #x7F, the C1
// control block #x80-#x9F (except for NEL #x85 which is allowed), the surrogate
// block #xD800-#xDFFF, #xFFFE, and #xFFFF.
inline QuotingType needsQuotes(StringRef S) {
if (S.empty())
return QuotingType::Single;
QuotingType MaxQuotingNeeded = QuotingType::None;
if (isSpace(static_cast<unsigned char>(S.front())) ||
isSpace(static_cast<unsigned char>(S.back())))
MaxQuotingNeeded = QuotingType::Single;
if (isNull(S))
MaxQuotingNeeded = QuotingType::Single;
if (isBool(S))
MaxQuotingNeeded = QuotingType::Single;
if (isNumeric(S))
MaxQuotingNeeded = QuotingType::Single;
// 7.3.3 Plain Style
// Plain scalars must not begin with most indicators, as this would cause
// ambiguity with other YAML constructs.
if (std::strchr(R"(-?:\,[]{}#&*!|>'"%@`)", S[0]) != nullptr)
MaxQuotingNeeded = QuotingType::Single;
for (unsigned char C : S) {
// Alphanum is safe.
if (isAlnum(C))
continue;
switch (C) {
// Safe scalar characters.
case '_':
case '-':
case '^':
case '.':
case ',':
case ' ':
// TAB (0x9) is allowed in unquoted strings.
case 0x9:
continue;
// LF(0xA) and CR(0xD) may delimit values and so require at least single
// quotes. LLVM YAML parser cannot handle single quoted multiline so use
// double quoting to produce valid YAML.
case 0xA:
case 0xD:
return QuotingType::Double;
// DEL (0x7F) are excluded from the allowed character range.
case 0x7F:
return QuotingType::Double;
// Forward slash is allowed to be unquoted, but we quote it anyway. We have
// many tests that use FileCheck against YAML output, and this output often
// contains paths. If we quote backslashes but not forward slashes then
// paths will come out either quoted or unquoted depending on which platform
// the test is run on, making FileCheck comparisons difficult.
case '/':
default: {
// C0 control block (0x0 - 0x1F) is excluded from the allowed character
// range.
if (C <= 0x1F)
return QuotingType::Double;
// Always double quote UTF-8.
if ((C & 0x80) != 0)
return QuotingType::Double;
// The character is not safe, at least simple quoting needed.
MaxQuotingNeeded = QuotingType::Single;
}
}
}
return MaxQuotingNeeded;
}
template <typename T, typename Context>
struct missingTraits
: public std::integral_constant<bool,
!has_ScalarEnumerationTraits<T>::value &&
!has_ScalarBitSetTraits<T>::value &&
!has_ScalarTraits<T>::value &&
!has_BlockScalarTraits<T>::value &&
!has_TaggedScalarTraits<T>::value &&
!has_MappingTraits<T, Context>::value &&
!has_SequenceTraits<T>::value &&
!has_CustomMappingTraits<T>::value &&
!has_DocumentListTraits<T>::value &&
!has_PolymorphicTraits<T>::value> {};
template <typename T, typename Context>
struct validatedMappingTraits
: public std::integral_constant<
bool, has_MappingTraits<T, Context>::value &&
has_MappingValidateTraits<T, Context>::value> {};
template <typename T, typename Context>
struct unvalidatedMappingTraits
: public std::integral_constant<
bool, has_MappingTraits<T, Context>::value &&
!has_MappingValidateTraits<T, Context>::value> {};
// Base class for Input and Output.
class IO {
public:
IO(void *Ctxt = nullptr);
virtual ~IO();
virtual bool outputting() const = 0;
virtual unsigned beginSequence() = 0;
virtual bool preflightElement(unsigned, void *&) = 0;
virtual void postflightElement(void*) = 0;
virtual void endSequence() = 0;
virtual bool canElideEmptySequence() = 0;
virtual unsigned beginFlowSequence() = 0;
virtual bool preflightFlowElement(unsigned, void *&) = 0;
virtual void postflightFlowElement(void*) = 0;
virtual void endFlowSequence() = 0;
virtual bool mapTag(StringRef Tag, bool Default=false) = 0;
virtual void beginMapping() = 0;
virtual void endMapping() = 0;
virtual bool preflightKey(const char*, bool, bool, bool &, void *&) = 0;
virtual void postflightKey(void*) = 0;
virtual std::vector<StringRef> keys() = 0;
virtual void beginFlowMapping() = 0;
virtual void endFlowMapping() = 0;
virtual void beginEnumScalar() = 0;
virtual bool matchEnumScalar(const char*, bool) = 0;
virtual bool matchEnumFallback() = 0;
virtual void endEnumScalar() = 0;
virtual bool beginBitSetScalar(bool &) = 0;
virtual bool bitSetMatch(const char*, bool) = 0;
virtual void endBitSetScalar() = 0;
virtual void scalarString(StringRef &, QuotingType) = 0;
virtual void blockScalarString(StringRef &) = 0;
virtual void scalarTag(std::string &) = 0;
virtual NodeKind getNodeKind() = 0;
virtual void setError(const Twine &) = 0;
virtual void setAllowUnknownKeys(bool Allow);
template <typename T>
void enumCase(T &Val, const char* Str, const T ConstVal) {
if ( matchEnumScalar(Str, outputting() && Val == ConstVal) ) {
Val = ConstVal;
}
}
// allow anonymous enum values to be used with LLVM_YAML_STRONG_TYPEDEF
template <typename T>
void enumCase(T &Val, const char* Str, const uint32_t ConstVal) {
if ( matchEnumScalar(Str, outputting() && Val == static_cast<T>(ConstVal)) ) {
Val = ConstVal;
}
}
template <typename FBT, typename T>
void enumFallback(T &Val) {
if (matchEnumFallback()) {
EmptyContext Context;
// FIXME: Force integral conversion to allow strong typedefs to convert.
FBT Res = static_cast<typename FBT::BaseType>(Val);
yamlize(*this, Res, true, Context);
Val = static_cast<T>(static_cast<typename FBT::BaseType>(Res));
}
}
template <typename T>
void bitSetCase(T &Val, const char* Str, const T ConstVal) {
if ( bitSetMatch(Str, outputting() && (Val & ConstVal) == ConstVal) ) {
Val = static_cast<T>(Val | ConstVal);
}
}
// allow anonymous enum values to be used with LLVM_YAML_STRONG_TYPEDEF
template <typename T>
void bitSetCase(T &Val, const char* Str, const uint32_t ConstVal) {
if ( bitSetMatch(Str, outputting() && (Val & ConstVal) == ConstVal) ) {
Val = static_cast<T>(Val | ConstVal);
}
}
template <typename T>
void maskedBitSetCase(T &Val, const char *Str, T ConstVal, T Mask) {
if (bitSetMatch(Str, outputting() && (Val & Mask) == ConstVal))
Val = Val | ConstVal;
}
template <typename T>
void maskedBitSetCase(T &Val, const char *Str, uint32_t ConstVal,
uint32_t Mask) {
if (bitSetMatch(Str, outputting() && (Val & Mask) == ConstVal))
Val = Val | ConstVal;
}
void *getContext() const;
void setContext(void *);
template <typename T> void mapRequired(const char *Key, T &Val) {
EmptyContext Ctx;
this->processKey(Key, Val, true, Ctx);
}
template <typename T, typename Context>
void mapRequired(const char *Key, T &Val, Context &Ctx) {
this->processKey(Key, Val, true, Ctx);
}
template <typename T> void mapOptional(const char *Key, T &Val) {
EmptyContext Ctx;
mapOptionalWithContext(Key, Val, Ctx);
}
template <typename T, typename DefaultT>
void mapOptional(const char *Key, T &Val, const DefaultT &Default) {
EmptyContext Ctx;
mapOptionalWithContext(Key, Val, Default, Ctx);
}
template <typename T, typename Context>
std::enable_if_t<has_SequenceTraits<T>::value, void>
mapOptionalWithContext(const char *Key, T &Val, Context &Ctx) {
// omit key/value instead of outputting empty sequence
if (this->canElideEmptySequence() && !(Val.begin() != Val.end()))
return;
this->processKey(Key, Val, false, Ctx);
}
template <typename T, typename Context>
void mapOptionalWithContext(const char *Key, std::optional<T> &Val,
Context &Ctx) {
this->processKeyWithDefault(Key, Val, std::optional<T>(),
/*Required=*/false, Ctx);
}
template <typename T, typename Context>
std::enable_if_t<!has_SequenceTraits<T>::value, void>
mapOptionalWithContext(const char *Key, T &Val, Context &Ctx) {
this->processKey(Key, Val, false, Ctx);
}
template <typename T, typename Context, typename DefaultT>
void mapOptionalWithContext(const char *Key, T &Val, const DefaultT &Default,
Context &Ctx) {
static_assert(std::is_convertible<DefaultT, T>::value,
"Default type must be implicitly convertible to value type!");
this->processKeyWithDefault(Key, Val, static_cast<const T &>(Default),
false, Ctx);
}
private:
template <typename T, typename Context>
void processKeyWithDefault(const char *Key, std::optional<T> &Val,
const std::optional<T> &DefaultValue,
bool Required, Context &Ctx);
template <typename T, typename Context>
void processKeyWithDefault(const char *Key, T &Val, const T &DefaultValue,
bool Required, Context &Ctx) {
void *SaveInfo;
bool UseDefault;
const bool sameAsDefault = outputting() && Val == DefaultValue;
if ( this->preflightKey(Key, Required, sameAsDefault, UseDefault,
SaveInfo) ) {
yamlize(*this, Val, Required, Ctx);
this->postflightKey(SaveInfo);
}
else {
if ( UseDefault )
Val = DefaultValue;
}
}
template <typename T, typename Context>
void processKey(const char *Key, T &Val, bool Required, Context &Ctx) {
void *SaveInfo;
bool UseDefault;
if ( this->preflightKey(Key, Required, false, UseDefault, SaveInfo) ) {
yamlize(*this, Val, Required, Ctx);
this->postflightKey(SaveInfo);
}
}
private:
void *Ctxt;
};
namespace detail {
template <typename T, typename Context>
void doMapping(IO &io, T &Val, Context &Ctx) {
MappingContextTraits<T, Context>::mapping(io, Val, Ctx);
}
template <typename T> void doMapping(IO &io, T &Val, EmptyContext &Ctx) {
MappingTraits<T>::mapping(io, Val);
}
} // end namespace detail
template <typename T>
std::enable_if_t<has_ScalarEnumerationTraits<T>::value, void>
yamlize(IO &io, T &Val, bool, EmptyContext &Ctx) {
io.beginEnumScalar();
ScalarEnumerationTraits<T>::enumeration(io, Val);
io.endEnumScalar();
}
template <typename T>
std::enable_if_t<has_ScalarBitSetTraits<T>::value, void>
yamlize(IO &io, T &Val, bool, EmptyContext &Ctx) {
bool DoClear;
if ( io.beginBitSetScalar(DoClear) ) {
if ( DoClear )
Val = T();
ScalarBitSetTraits<T>::bitset(io, Val);
io.endBitSetScalar();
}
}
template <typename T>
std::enable_if_t<has_ScalarTraits<T>::value, void> yamlize(IO &io, T &Val, bool,
EmptyContext &Ctx) {
if ( io.outputting() ) {
SmallString<128> Storage;
raw_svector_ostream Buffer(Storage);
ScalarTraits<T>::output(Val, io.getContext(), Buffer);
StringRef Str = Buffer.str();
io.scalarString(Str, ScalarTraits<T>::mustQuote(Str));
}
else {
StringRef Str;
io.scalarString(Str, ScalarTraits<T>::mustQuote(Str));
StringRef Result = ScalarTraits<T>::input(Str, io.getContext(), Val);
if ( !Result.empty() ) {
io.setError(Twine(Result));
}
}
}
template <typename T>
std::enable_if_t<has_BlockScalarTraits<T>::value, void>
yamlize(IO &YamlIO, T &Val, bool, EmptyContext &Ctx) {
if (YamlIO.outputting()) {
std::string Storage;
raw_string_ostream Buffer(Storage);
BlockScalarTraits<T>::output(Val, YamlIO.getContext(), Buffer);
StringRef Str = Buffer.str();
YamlIO.blockScalarString(Str);
} else {
StringRef Str;
YamlIO.blockScalarString(Str);
StringRef Result =
BlockScalarTraits<T>::input(Str, YamlIO.getContext(), Val);
if (!Result.empty())
YamlIO.setError(Twine(Result));
}
}
template <typename T>
std::enable_if_t<has_TaggedScalarTraits<T>::value, void>
yamlize(IO &io, T &Val, bool, EmptyContext &Ctx) {
if (io.outputting()) {
std::string ScalarStorage, TagStorage;
raw_string_ostream ScalarBuffer(ScalarStorage), TagBuffer(TagStorage);
TaggedScalarTraits<T>::output(Val, io.getContext(), ScalarBuffer,
TagBuffer);
io.scalarTag(TagBuffer.str());
StringRef ScalarStr = ScalarBuffer.str();
io.scalarString(ScalarStr,
TaggedScalarTraits<T>::mustQuote(Val, ScalarStr));
} else {
std::string Tag;
io.scalarTag(Tag);
StringRef Str;
io.scalarString(Str, QuotingType::None);
StringRef Result =
TaggedScalarTraits<T>::input(Str, Tag, io.getContext(), Val);
if (!Result.empty()) {
io.setError(Twine(Result));
}
}
}
template <typename T, typename Context>
std::enable_if_t<validatedMappingTraits<T, Context>::value, void>
yamlize(IO &io, T &Val, bool, Context &Ctx) {
if (has_FlowTraits<MappingTraits<T>>::value)
io.beginFlowMapping();
else
io.beginMapping();
if (io.outputting()) {
std::string Err = MappingTraits<T>::validate(io, Val);
if (!Err.empty()) {
errs() << Err << "\n";
assert(Err.empty() && "invalid struct trying to be written as yaml");
}
}
detail::doMapping(io, Val, Ctx);
if (!io.outputting()) {
std::string Err = MappingTraits<T>::validate(io, Val);
if (!Err.empty())
io.setError(Err);
}
if (has_FlowTraits<MappingTraits<T>>::value)
io.endFlowMapping();
else
io.endMapping();
}
template <typename T, typename Context>
std::enable_if_t<!has_MappingEnumInputTraits<T, Context>::value, bool>
yamlizeMappingEnumInput(IO &io, T &Val) {
return false;
}
template <typename T, typename Context>
std::enable_if_t<has_MappingEnumInputTraits<T, Context>::value, bool>
yamlizeMappingEnumInput(IO &io, T &Val) {
if (io.outputting())
return false;
io.beginEnumScalar();
MappingTraits<T>::enumInput(io, Val);
bool Matched = !io.matchEnumFallback();
io.endEnumScalar();
return Matched;
}
template <typename T, typename Context>
std::enable_if_t<unvalidatedMappingTraits<T, Context>::value, void>
yamlize(IO &io, T &Val, bool, Context &Ctx) {
if (yamlizeMappingEnumInput<T, Context>(io, Val))
return;
if (has_FlowTraits<MappingTraits<T>>::value) {
io.beginFlowMapping();
detail::doMapping(io, Val, Ctx);
io.endFlowMapping();
} else {
io.beginMapping();
detail::doMapping(io, Val, Ctx);
io.endMapping();
}
}
template <typename T>
std::enable_if_t<has_CustomMappingTraits<T>::value, void>
yamlize(IO &io, T &Val, bool, EmptyContext &Ctx) {
if ( io.outputting() ) {
io.beginMapping();
CustomMappingTraits<T>::output(io, Val);
io.endMapping();
} else {
io.beginMapping();
for (StringRef key : io.keys())
CustomMappingTraits<T>::inputOne(io, key, Val);
io.endMapping();
}
}
template <typename T>
std::enable_if_t<has_PolymorphicTraits<T>::value, void>
yamlize(IO &io, T &Val, bool, EmptyContext &Ctx) {
switch (io.outputting() ? PolymorphicTraits<T>::getKind(Val)
: io.getNodeKind()) {
case NodeKind::Scalar:
return yamlize(io, PolymorphicTraits<T>::getAsScalar(Val), true, Ctx);
case NodeKind::Map:
return yamlize(io, PolymorphicTraits<T>::getAsMap(Val), true, Ctx);
case NodeKind::Sequence:
return yamlize(io, PolymorphicTraits<T>::getAsSequence(Val), true, Ctx);
}
}
template <typename T>
std::enable_if_t<missingTraits<T, EmptyContext>::value, void>
yamlize(IO &io, T &Val, bool, EmptyContext &Ctx) {
char missing_yaml_trait_for_type[sizeof(MissingTrait<T>)];
}
template <typename T, typename Context>
std::enable_if_t<has_SequenceTraits<T>::value, void>
yamlize(IO &io, T &Seq, bool, Context &Ctx) {
if ( has_FlowTraits< SequenceTraits<T>>::value ) {
unsigned incnt = io.beginFlowSequence();
unsigned count = io.outputting() ? SequenceTraits<T>::size(io, Seq) : incnt;
for(unsigned i=0; i < count; ++i) {
void *SaveInfo;
if ( io.preflightFlowElement(i, SaveInfo) ) {
yamlize(io, SequenceTraits<T>::element(io, Seq, i), true, Ctx);
io.postflightFlowElement(SaveInfo);
}
}
io.endFlowSequence();
}
else {
unsigned incnt = io.beginSequence();
unsigned count = io.outputting() ? SequenceTraits<T>::size(io, Seq) : incnt;
for(unsigned i=0; i < count; ++i) {
void *SaveInfo;
if ( io.preflightElement(i, SaveInfo) ) {
yamlize(io, SequenceTraits<T>::element(io, Seq, i), true, Ctx);
io.postflightElement(SaveInfo);
}
}
io.endSequence();
}
}
template<>
struct ScalarTraits<bool> {
static void output(const bool &, void* , raw_ostream &);
static StringRef input(StringRef, void *, bool &);
static QuotingType mustQuote(StringRef) { return QuotingType::None; }
};
template<>
struct ScalarTraits<StringRef> {
static void output(const StringRef &, void *, raw_ostream &);
static StringRef input(StringRef, void *, StringRef &);
static QuotingType mustQuote(StringRef S) { return needsQuotes(S); }
};
template<>
struct ScalarTraits<std::string> {
static void output(const std::string &, void *, raw_ostream &);
static StringRef input(StringRef, void *, std::string &);
static QuotingType mustQuote(StringRef S) { return needsQuotes(S); }
};
template<>
struct ScalarTraits<uint8_t> {
static void output(const uint8_t &, void *, raw_ostream &);
static StringRef input(StringRef, void *, uint8_t &);
static QuotingType mustQuote(StringRef) { return QuotingType::None; }
};
template<>
struct ScalarTraits<uint16_t> {
static void output(const uint16_t &, void *, raw_ostream &);
static StringRef input(StringRef, void *, uint16_t &);
static QuotingType mustQuote(StringRef) { return QuotingType::None; }
};
template<>
struct ScalarTraits<uint32_t> {
static void output(const uint32_t &, void *, raw_ostream &);
static StringRef input(StringRef, void *, uint32_t &);
static QuotingType mustQuote(StringRef) { return QuotingType::None; }
};
template<>
struct ScalarTraits<uint64_t> {
static void output(const uint64_t &, void *, raw_ostream &);
static StringRef input(StringRef, void *, uint64_t &);
static QuotingType mustQuote(StringRef) { return QuotingType::None; }
};
template<>
struct ScalarTraits<int8_t> {
static void output(const int8_t &, void *, raw_ostream &);
static StringRef input(StringRef, void *, int8_t &);
static QuotingType mustQuote(StringRef) { return QuotingType::None; }
};
template<>
struct ScalarTraits<int16_t> {
static void output(const int16_t &, void *, raw_ostream &);
static StringRef input(StringRef, void *, int16_t &);
static QuotingType mustQuote(StringRef) { return QuotingType::None; }
};
template<>
struct ScalarTraits<int32_t> {
static void output(const int32_t &, void *, raw_ostream &);
static StringRef input(StringRef, void *, int32_t &);
static QuotingType mustQuote(StringRef) { return QuotingType::None; }
};
template<>
struct ScalarTraits<int64_t> {
static void output(const int64_t &, void *, raw_ostream &);
static StringRef input(StringRef, void *, int64_t &);
static QuotingType mustQuote(StringRef) { return QuotingType::None; }
};
template<>
struct ScalarTraits<float> {
static void output(const float &, void *, raw_ostream &);
static StringRef input(StringRef, void *, float &);
static QuotingType mustQuote(StringRef) { return QuotingType::None; }
};
template<>
struct ScalarTraits<double> {
static void output(const double &, void *, raw_ostream &);
static StringRef input(StringRef, void *, double &);
static QuotingType mustQuote(StringRef) { return QuotingType::None; }
};
// For endian types, we use existing scalar Traits class for the underlying
// type. This way endian aware types are supported whenever the traits are
// defined for the underlying type.
template <typename value_type, support::endianness endian, size_t alignment>
struct ScalarTraits<support::detail::packed_endian_specific_integral<
value_type, endian, alignment>,
std::enable_if_t<has_ScalarTraits<value_type>::value>> {
using endian_type =
support::detail::packed_endian_specific_integral<value_type, endian,
alignment>;
static void output(const endian_type &E, void *Ctx, raw_ostream &Stream) {
ScalarTraits<value_type>::output(static_cast<value_type>(E), Ctx, Stream);
}
static StringRef input(StringRef Str, void *Ctx, endian_type &E) {
value_type V;
auto R = ScalarTraits<value_type>::input(Str, Ctx, V);
E = static_cast<endian_type>(V);
return R;
}
static QuotingType mustQuote(StringRef Str) {
return ScalarTraits<value_type>::mustQuote(Str);
}
};
template <typename value_type, support::endianness endian, size_t alignment>
struct ScalarEnumerationTraits<
support::detail::packed_endian_specific_integral<value_type, endian,
alignment>,
std::enable_if_t<has_ScalarEnumerationTraits<value_type>::value>> {
using endian_type =
support::detail::packed_endian_specific_integral<value_type, endian,
alignment>;
static void enumeration(IO &io, endian_type &E) {
value_type V = E;
ScalarEnumerationTraits<value_type>::enumeration(io, V);
E = V;
}
};
template <typename value_type, support::endianness endian, size_t alignment>
struct ScalarBitSetTraits<
support::detail::packed_endian_specific_integral<value_type, endian,
alignment>,
std::enable_if_t<has_ScalarBitSetTraits<value_type>::value>> {
using endian_type =
support::detail::packed_endian_specific_integral<value_type, endian,
alignment>;
static void bitset(IO &io, endian_type &E) {
value_type V = E;
ScalarBitSetTraits<value_type>::bitset(io, V);
E = V;
}
};
// Utility for use within MappingTraits<>::mapping() method
// to [de]normalize an object for use with YAML conversion.
template <typename TNorm, typename TFinal>
struct MappingNormalization {
MappingNormalization(IO &i_o, TFinal &Obj)
: io(i_o), BufPtr(nullptr), Result(Obj) {
if ( io.outputting() ) {
BufPtr = new (&Buffer) TNorm(io, Obj);
}
else {
BufPtr = new (&Buffer) TNorm(io);
}
}
~MappingNormalization() {
if ( ! io.outputting() ) {
Result = BufPtr->denormalize(io);
}
BufPtr->~TNorm();
}
TNorm* operator->() { return BufPtr; }
private:
using Storage = AlignedCharArrayUnion<TNorm>;
Storage Buffer;
IO &io;
TNorm *BufPtr;
TFinal &Result;
};
// Utility for use within MappingTraits<>::mapping() method
// to [de]normalize an object for use with YAML conversion.
template <typename TNorm, typename TFinal>
struct MappingNormalizationHeap {
MappingNormalizationHeap(IO &i_o, TFinal &Obj, BumpPtrAllocator *allocator)
: io(i_o), Result(Obj) {
if ( io.outputting() ) {
BufPtr = new (&Buffer) TNorm(io, Obj);
}
else if (allocator) {
BufPtr = allocator->Allocate<TNorm>();
new (BufPtr) TNorm(io);
} else {
BufPtr = new TNorm(io);
}
}
~MappingNormalizationHeap() {
if ( io.outputting() ) {
BufPtr->~TNorm();
}
else {
Result = BufPtr->denormalize(io);
}
}
TNorm* operator->() { return BufPtr; }
private:
using Storage = AlignedCharArrayUnion<TNorm>;
Storage Buffer;
IO &io;
TNorm *BufPtr = nullptr;
TFinal &Result;
};
///
/// The Input class is used to parse a yaml document into in-memory structs
/// and vectors.
///
/// It works by using YAMLParser to do a syntax parse of the entire yaml
/// document, then the Input class builds a graph of HNodes which wraps
/// each yaml Node. The extra layer is buffering. The low level yaml
/// parser only lets you look at each node once. The buffering layer lets
/// you search and interate multiple times. This is necessary because
/// the mapRequired() method calls may not be in the same order
/// as the keys in the document.
///
class Input : public IO {
public:
// Construct a yaml Input object from a StringRef and optional
// user-data. The DiagHandler can be specified to provide
// alternative error reporting.
Input(StringRef InputContent,
void *Ctxt = nullptr,
SourceMgr::DiagHandlerTy DiagHandler = nullptr,
void *DiagHandlerCtxt = nullptr);
Input(MemoryBufferRef Input,
void *Ctxt = nullptr,
SourceMgr::DiagHandlerTy DiagHandler = nullptr,
void *DiagHandlerCtxt = nullptr);
~Input() override;
// Check if there was an syntax or semantic error during parsing.
std::error_code error();
private:
bool outputting() const override;
bool mapTag(StringRef, bool) override;
void beginMapping() override;
void endMapping() override;
bool preflightKey(const char *, bool, bool, bool &, void *&) override;
void postflightKey(void *) override;
std::vector<StringRef> keys() override;
void beginFlowMapping() override;
void endFlowMapping() override;
unsigned beginSequence() override;
void endSequence() override;
bool preflightElement(unsigned index, void *&) override;
void postflightElement(void *) override;
unsigned beginFlowSequence() override;
bool preflightFlowElement(unsigned , void *&) override;
void postflightFlowElement(void *) override;
void endFlowSequence() override;
void beginEnumScalar() override;
bool matchEnumScalar(const char*, bool) override;
bool matchEnumFallback() override;
void endEnumScalar() override;
bool beginBitSetScalar(bool &) override;
bool bitSetMatch(const char *, bool ) override;
void endBitSetScalar() override;
void scalarString(StringRef &, QuotingType) override;
void blockScalarString(StringRef &) override;
void scalarTag(std::string &) override;
NodeKind getNodeKind() override;
void setError(const Twine &message) override;
bool canElideEmptySequence() override;
class HNode {
virtual void anchor();
public:
HNode(Node *n) : _node(n) { }
virtual ~HNode() = default;
static bool classof(const HNode *) { return true; }
Node *_node;
};
class EmptyHNode : public HNode {
void anchor() override;
public:
EmptyHNode(Node *n) : HNode(n) { }
static bool classof(const HNode *n) { return NullNode::classof(n->_node); }
static bool classof(const EmptyHNode *) { return true; }
};
class ScalarHNode : public HNode {
void anchor() override;
public:
ScalarHNode(Node *n, StringRef s) : HNode(n), _value(s) { }
StringRef value() const { return _value; }
static bool classof(const HNode *n) {
return ScalarNode::classof(n->_node) ||
BlockScalarNode::classof(n->_node);
}
static bool classof(const ScalarHNode *) { return true; }
protected:
StringRef _value;
};
class MapHNode : public HNode {
void anchor() override;
public:
MapHNode(Node *n) : HNode(n) { }
static bool classof(const HNode *n) {
return MappingNode::classof(n->_node);
}
static bool classof(const MapHNode *) { return true; }
using NameToNodeAndLoc =
StringMap<std::pair<std::unique_ptr<HNode>, SMRange>>;
NameToNodeAndLoc Mapping;
SmallVector<std::string, 6> ValidKeys;
};
class SequenceHNode : public HNode {
void anchor() override;
public:
SequenceHNode(Node *n) : HNode(n) { }
static bool classof(const HNode *n) {
return SequenceNode::classof(n->_node);
}
static bool classof(const SequenceHNode *) { return true; }
std::vector<std::unique_ptr<HNode>> Entries;
};
std::unique_ptr<Input::HNode> createHNodes(Node *node);
void setError(HNode *hnode, const Twine &message);
void setError(Node *node, const Twine &message);
void setError(const SMRange &Range, const Twine &message);
void reportWarning(HNode *hnode, const Twine &message);
void reportWarning(Node *hnode, const Twine &message);
void reportWarning(const SMRange &Range, const Twine &message);
public:
// These are only used by operator>>. They could be private
// if those templated things could be made friends.
bool setCurrentDocument();
bool nextDocument();
/// Returns the current node that's being parsed by the YAML Parser.
const Node *getCurrentNode() const;
void setAllowUnknownKeys(bool Allow) override;
private:
SourceMgr SrcMgr; // must be before Strm
std::unique_ptr<llvm::yaml::Stream> Strm;
std::unique_ptr<HNode> TopNode;
std::error_code EC;
BumpPtrAllocator StringAllocator;
document_iterator DocIterator;
llvm::BitVector BitValuesUsed;
HNode *CurrentNode = nullptr;
bool ScalarMatchFound = false;
bool AllowUnknownKeys = false;
};
///
/// The Output class is used to generate a yaml document from in-memory structs
/// and vectors.
///
class Output : public IO {
public:
Output(raw_ostream &, void *Ctxt = nullptr, int WrapColumn = 70);
~Output() override;
/// Set whether or not to output optional values which are equal
/// to the default value. By default, when outputting if you attempt
/// to write a value that is equal to the default, the value gets ignored.
/// Sometimes, it is useful to be able to see these in the resulting YAML
/// anyway.
void setWriteDefaultValues(bool Write) { WriteDefaultValues = Write; }
bool outputting() const override;
bool mapTag(StringRef, bool) override;
void beginMapping() override;
void endMapping() override;
bool preflightKey(const char *key, bool, bool, bool &, void *&) override;
void postflightKey(void *) override;
std::vector<StringRef> keys() override;
void beginFlowMapping() override;
void endFlowMapping() override;
unsigned beginSequence() override;
void endSequence() override;
bool preflightElement(unsigned, void *&) override;
void postflightElement(void *) override;
unsigned beginFlowSequence() override;
bool preflightFlowElement(unsigned, void *&) override;
void postflightFlowElement(void *) override;
void endFlowSequence() override;
void beginEnumScalar() override;
bool matchEnumScalar(const char*, bool) override;
bool matchEnumFallback() override;
void endEnumScalar() override;
bool beginBitSetScalar(bool &) override;
bool bitSetMatch(const char *, bool ) override;
void endBitSetScalar() override;
void scalarString(StringRef &, QuotingType) override;
void blockScalarString(StringRef &) override;
void scalarTag(std::string &) override;
NodeKind getNodeKind() override;
void setError(const Twine &message) override;
bool canElideEmptySequence() override;
// These are only used by operator<<. They could be private
// if that templated operator could be made a friend.
void beginDocuments();
bool preflightDocument(unsigned);
void postflightDocument();
void endDocuments();
private:
void output(StringRef s);
void outputUpToEndOfLine(StringRef s);
void newLineCheck(bool EmptySequence = false);
void outputNewLine();
void paddedKey(StringRef key);
void flowKey(StringRef Key);
enum InState {
inSeqFirstElement,
inSeqOtherElement,
inFlowSeqFirstElement,
inFlowSeqOtherElement,
inMapFirstKey,
inMapOtherKey,
inFlowMapFirstKey,
inFlowMapOtherKey
};
static bool inSeqAnyElement(InState State);
static bool inFlowSeqAnyElement(InState State);
static bool inMapAnyKey(InState State);
static bool inFlowMapAnyKey(InState State);
raw_ostream &Out;
int WrapColumn;
SmallVector<InState, 8> StateStack;
int Column = 0;
int ColumnAtFlowStart = 0;
int ColumnAtMapFlowStart = 0;
bool NeedBitValueComma = false;
bool NeedFlowSequenceComma = false;
bool EnumerationMatchFound = false;
bool WriteDefaultValues = false;
StringRef Padding;
StringRef PaddingBeforeContainer;
};
template <typename T, typename Context>
void IO::processKeyWithDefault(const char *Key, std::optional<T> &Val,
const std::optional<T> &DefaultValue,
bool Required, Context &Ctx) {
assert(!DefaultValue && "std::optional<T> shouldn't have a value!");
void *SaveInfo;
bool UseDefault = true;
const bool sameAsDefault = outputting() && !Val;
if (!outputting() && !Val)
Val = T();
if (Val &&
this->preflightKey(Key, Required, sameAsDefault, UseDefault, SaveInfo)) {
// When reading an std::optional<X> key from a YAML description, we allow
// the special "<none>" value, which can be used to specify that no value
// was requested, i.e. the DefaultValue will be assigned. The DefaultValue
// is usually None.
bool IsNone = false;
if (!outputting())
if (const auto *Node =
dyn_cast<ScalarNode>(((Input *)this)->getCurrentNode()))
// We use rtrim to ignore possible white spaces that might exist when a
// comment is present on the same line.
IsNone = Node->getRawValue().rtrim(' ') == "<none>";
if (IsNone)
Val = DefaultValue;
else
yamlize(*this, *Val, Required, Ctx);
this->postflightKey(SaveInfo);
} else {
if (UseDefault)
Val = DefaultValue;
}
}
/// YAML I/O does conversion based on types. But often native data types
/// are just a typedef of built in intergral types (e.g. int). But the C++
/// type matching system sees through the typedef and all the typedefed types
/// look like a built in type. This will cause the generic YAML I/O conversion
/// to be used. To provide better control over the YAML conversion, you can
/// use this macro instead of typedef. It will create a class with one field
/// and automatic conversion operators to and from the base type.
/// Based on BOOST_STRONG_TYPEDEF
#define LLVM_YAML_STRONG_TYPEDEF(_base, _type) \
struct _type { \
_type() = default; \
_type(const _base v) : value(v) {} \
_type(const _type &v) = default; \
_type &operator=(const _type &rhs) = default; \
_type &operator=(const _base &rhs) { value = rhs; return *this; } \
operator const _base & () const { return value; } \
bool operator==(const _type &rhs) const { return value == rhs.value; } \
bool operator==(const _base &rhs) const { return value == rhs; } \
bool operator<(const _type &rhs) const { return value < rhs.value; } \
_base value; \
using BaseType = _base; \
};
///
/// Use these types instead of uintXX_t in any mapping to have
/// its yaml output formatted as hexadecimal.
///
LLVM_YAML_STRONG_TYPEDEF(uint8_t, Hex8)
LLVM_YAML_STRONG_TYPEDEF(uint16_t, Hex16)
LLVM_YAML_STRONG_TYPEDEF(uint32_t, Hex32)
LLVM_YAML_STRONG_TYPEDEF(uint64_t, Hex64)
template<>
struct ScalarTraits<Hex8> {
static void output(const Hex8 &, void *, raw_ostream &);
static StringRef input(StringRef, void *, Hex8 &);
static QuotingType mustQuote(StringRef) { return QuotingType::None; }
};
template<>
struct ScalarTraits<Hex16> {
static void output(const Hex16 &, void *, raw_ostream &);
static StringRef input(StringRef, void *, Hex16 &);
static QuotingType mustQuote(StringRef) { return QuotingType::None; }
};
template<>
struct ScalarTraits<Hex32> {
static void output(const Hex32 &, void *, raw_ostream &);
static StringRef input(StringRef, void *, Hex32 &);
static QuotingType mustQuote(StringRef) { return QuotingType::None; }
};
template<>
struct ScalarTraits<Hex64> {
static void output(const Hex64 &, void *, raw_ostream &);
static StringRef input(StringRef, void *, Hex64 &);
static QuotingType mustQuote(StringRef) { return QuotingType::None; }
};
template <> struct ScalarTraits<VersionTuple> {
static void output(const VersionTuple &Value, void *, llvm::raw_ostream &Out);
static StringRef input(StringRef, void *, VersionTuple &);
static QuotingType mustQuote(StringRef) { return QuotingType::None; }
};
// Define non-member operator>> so that Input can stream in a document list.
template <typename T>
inline std::enable_if_t<has_DocumentListTraits<T>::value, Input &>
operator>>(Input &yin, T &docList) {
int i = 0;
EmptyContext Ctx;
while ( yin.setCurrentDocument() ) {
yamlize(yin, DocumentListTraits<T>::element(yin, docList, i), true, Ctx);
if ( yin.error() )
return yin;
yin.nextDocument();
++i;
}
return yin;
}
// Define non-member operator>> so that Input can stream in a map as a document.
template <typename T>
inline std::enable_if_t<has_MappingTraits<T, EmptyContext>::value, Input &>
operator>>(Input &yin, T &docMap) {
EmptyContext Ctx;
yin.setCurrentDocument();
yamlize(yin, docMap, true, Ctx);
return yin;
}
// Define non-member operator>> so that Input can stream in a sequence as
// a document.
template <typename T>
inline std::enable_if_t<has_SequenceTraits<T>::value, Input &>
operator>>(Input &yin, T &docSeq) {
EmptyContext Ctx;
if (yin.setCurrentDocument())
yamlize(yin, docSeq, true, Ctx);
return yin;
}
// Define non-member operator>> so that Input can stream in a block scalar.
template <typename T>
inline std::enable_if_t<has_BlockScalarTraits<T>::value, Input &>
operator>>(Input &In, T &Val) {
EmptyContext Ctx;
if (In.setCurrentDocument())
yamlize(In, Val, true, Ctx);
return In;
}
// Define non-member operator>> so that Input can stream in a string map.
template <typename T>
inline std::enable_if_t<has_CustomMappingTraits<T>::value, Input &>
operator>>(Input &In, T &Val) {
EmptyContext Ctx;
if (In.setCurrentDocument())
yamlize(In, Val, true, Ctx);
return In;
}
// Define non-member operator>> so that Input can stream in a polymorphic type.
template <typename T>
inline std::enable_if_t<has_PolymorphicTraits<T>::value, Input &>
operator>>(Input &In, T &Val) {
EmptyContext Ctx;
if (In.setCurrentDocument())
yamlize(In, Val, true, Ctx);
return In;
}
// Provide better error message about types missing a trait specialization
template <typename T>
inline std::enable_if_t<missingTraits<T, EmptyContext>::value, Input &>
operator>>(Input &yin, T &docSeq) {
char missing_yaml_trait_for_type[sizeof(MissingTrait<T>)];
return yin;
}
// Define non-member operator<< so that Output can stream out document list.
template <typename T>
inline std::enable_if_t<has_DocumentListTraits<T>::value, Output &>
operator<<(Output &yout, T &docList) {
EmptyContext Ctx;
yout.beginDocuments();
const size_t count = DocumentListTraits<T>::size(yout, docList);
for(size_t i=0; i < count; ++i) {
if ( yout.preflightDocument(i) ) {
yamlize(yout, DocumentListTraits<T>::element(yout, docList, i), true,
Ctx);
yout.postflightDocument();
}
}
yout.endDocuments();
return yout;
}
// Define non-member operator<< so that Output can stream out a map.
template <typename T>
inline std::enable_if_t<has_MappingTraits<T, EmptyContext>::value, Output &>
operator<<(Output &yout, T &map) {
EmptyContext Ctx;
yout.beginDocuments();
if ( yout.preflightDocument(0) ) {
yamlize(yout, map, true, Ctx);
yout.postflightDocument();
}
yout.endDocuments();
return yout;
}
// Define non-member operator<< so that Output can stream out a sequence.
template <typename T>
inline std::enable_if_t<has_SequenceTraits<T>::value, Output &>
operator<<(Output &yout, T &seq) {
EmptyContext Ctx;
yout.beginDocuments();
if ( yout.preflightDocument(0) ) {
yamlize(yout, seq, true, Ctx);
yout.postflightDocument();
}
yout.endDocuments();
return yout;
}
// Define non-member operator<< so that Output can stream out a block scalar.
template <typename T>
inline std::enable_if_t<has_BlockScalarTraits<T>::value, Output &>
operator<<(Output &Out, T &Val) {
EmptyContext Ctx;
Out.beginDocuments();
if (Out.preflightDocument(0)) {
yamlize(Out, Val, true, Ctx);
Out.postflightDocument();
}
Out.endDocuments();
return Out;
}
// Define non-member operator<< so that Output can stream out a string map.
template <typename T>
inline std::enable_if_t<has_CustomMappingTraits<T>::value, Output &>
operator<<(Output &Out, T &Val) {
EmptyContext Ctx;
Out.beginDocuments();
if (Out.preflightDocument(0)) {
yamlize(Out, Val, true, Ctx);
Out.postflightDocument();
}
Out.endDocuments();
return Out;
}
// Define non-member operator<< so that Output can stream out a polymorphic
// type.
template <typename T>
inline std::enable_if_t<has_PolymorphicTraits<T>::value, Output &>
operator<<(Output &Out, T &Val) {
EmptyContext Ctx;
Out.beginDocuments();
if (Out.preflightDocument(0)) {
// FIXME: The parser does not support explicit documents terminated with a
// plain scalar; the end-marker is included as part of the scalar token.
assert(PolymorphicTraits<T>::getKind(Val) != NodeKind::Scalar && "plain scalar documents are not supported");
yamlize(Out, Val, true, Ctx);
Out.postflightDocument();
}
Out.endDocuments();
return Out;
}
// Provide better error message about types missing a trait specialization
template <typename T>
inline std::enable_if_t<missingTraits<T, EmptyContext>::value, Output &>
operator<<(Output &yout, T &seq) {
char missing_yaml_trait_for_type[sizeof(MissingTrait<T>)];
return yout;
}
template <bool B> struct IsFlowSequenceBase {};
template <> struct IsFlowSequenceBase<true> { static const bool flow = true; };
template <typename T, typename U = void>
struct IsResizable : std::false_type {};
template <typename T>
struct IsResizable<T, std::void_t<decltype(std::declval<T>().resize(0))>>
: public std::true_type {};
template <typename T, bool B> struct IsResizableBase {
using type = typename T::value_type;
static type &element(IO &io, T &seq, size_t index) {
if (index >= seq.size())
seq.resize(index + 1);
return seq[index];
}
};
template <typename T> struct IsResizableBase<T, false> {
using type = typename T::value_type;
static type &element(IO &io, T &seq, size_t index) {
if (index >= seq.size()) {
io.setError(Twine("value sequence extends beyond static size (") +
Twine(seq.size()) + ")");
return seq[0];
}
return seq[index];
}
};
template <typename T, bool Flow>
struct SequenceTraitsImpl
: IsFlowSequenceBase<Flow>, IsResizableBase<T, IsResizable<T>::value> {
static size_t size(IO &io, T &seq) { return seq.size(); }
};
// Simple helper to check an expression can be used as a bool-valued template
// argument.
template <bool> struct CheckIsBool { static const bool value = true; };
// If T has SequenceElementTraits, then vector<T> and SmallVector<T, N> have
// SequenceTraits that do the obvious thing.
template <typename T>
struct SequenceTraits<
std::vector<T>,
std::enable_if_t<CheckIsBool<SequenceElementTraits<T>::flow>::value>>
: SequenceTraitsImpl<std::vector<T>, SequenceElementTraits<T>::flow> {};
template <typename T, unsigned N>
struct SequenceTraits<
SmallVector<T, N>,
std::enable_if_t<CheckIsBool<SequenceElementTraits<T>::flow>::value>>
: SequenceTraitsImpl<SmallVector<T, N>, SequenceElementTraits<T>::flow> {};
template <typename T>
struct SequenceTraits<
SmallVectorImpl<T>,
std::enable_if_t<CheckIsBool<SequenceElementTraits<T>::flow>::value>>
: SequenceTraitsImpl<SmallVectorImpl<T>, SequenceElementTraits<T>::flow> {};
template <typename T>
struct SequenceTraits<
MutableArrayRef<T>,
std::enable_if_t<CheckIsBool<SequenceElementTraits<T>::flow>::value>>
: SequenceTraitsImpl<MutableArrayRef<T>, SequenceElementTraits<T>::flow> {};
// Sequences of fundamental types use flow formatting.
template <typename T>
struct SequenceElementTraits<T, std::enable_if_t<std::is_fundamental_v<T>>> {
static const bool flow = true;
};
// Sequences of strings use block formatting.
template<> struct SequenceElementTraits<std::string> {
static const bool flow = false;
};
template<> struct SequenceElementTraits<StringRef> {
static const bool flow = false;
};
template<> struct SequenceElementTraits<std::pair<std::string, std::string>> {
static const bool flow = false;
};
/// Implementation of CustomMappingTraits for std::map<std::string, T>.
template <typename T> struct StdMapStringCustomMappingTraitsImpl {
using map_type = std::map<std::string, T>;
static void inputOne(IO &io, StringRef key, map_type &v) {
io.mapRequired(key.str().c_str(), v[std::string(key)]);
}
static void output(IO &io, map_type &v) {
for (auto &p : v)
io.mapRequired(p.first.c_str(), p.second);
}
};
} // end namespace yaml
} // end namespace llvm
#define LLVM_YAML_IS_SEQUENCE_VECTOR_IMPL(TYPE, FLOW) \
namespace llvm { \
namespace yaml { \
static_assert( \
!std::is_fundamental_v<TYPE> && !std::is_same_v<TYPE, std::string> && \
!std::is_same_v<TYPE, llvm::StringRef>, \
"only use LLVM_YAML_IS_SEQUENCE_VECTOR for types you control"); \
template <> struct SequenceElementTraits<TYPE> { \
static const bool flow = FLOW; \
}; \
} \
}
/// Utility for declaring that a std::vector of a particular type
/// should be considered a YAML sequence.
#define LLVM_YAML_IS_SEQUENCE_VECTOR(type) \
LLVM_YAML_IS_SEQUENCE_VECTOR_IMPL(type, false)
/// Utility for declaring that a std::vector of a particular type
/// should be considered a YAML flow sequence.
#define LLVM_YAML_IS_FLOW_SEQUENCE_VECTOR(type) \
LLVM_YAML_IS_SEQUENCE_VECTOR_IMPL(type, true)
#define LLVM_YAML_DECLARE_MAPPING_TRAITS(Type) \
namespace llvm { \
namespace yaml { \
template <> struct MappingTraits<Type> { \
static void mapping(IO &IO, Type &Obj); \
}; \
} \
}
#define LLVM_YAML_DECLARE_ENUM_TRAITS(Type) \
namespace llvm { \
namespace yaml { \
template <> struct ScalarEnumerationTraits<Type> { \
static void enumeration(IO &io, Type &Value); \
}; \
} \
}
#define LLVM_YAML_DECLARE_BITSET_TRAITS(Type) \
namespace llvm { \
namespace yaml { \
template <> struct ScalarBitSetTraits<Type> { \
static void bitset(IO &IO, Type &Options); \
}; \
} \
}
#define LLVM_YAML_DECLARE_SCALAR_TRAITS(Type, MustQuote) \
namespace llvm { \
namespace yaml { \
template <> struct ScalarTraits<Type> { \
static void output(const Type &Value, void *ctx, raw_ostream &Out); \
static StringRef input(StringRef Scalar, void *ctxt, Type &Value); \
static QuotingType mustQuote(StringRef) { return MustQuote; } \
}; \
} \
}
/// Utility for declaring that a std::vector of a particular type
/// should be considered a YAML document list.
#define LLVM_YAML_IS_DOCUMENT_LIST_VECTOR(_type) \
namespace llvm { \
namespace yaml { \
template <unsigned N> \
struct DocumentListTraits<SmallVector<_type, N>> \
: public SequenceTraitsImpl<SmallVector<_type, N>, false> {}; \
template <> \
struct DocumentListTraits<std::vector<_type>> \
: public SequenceTraitsImpl<std::vector<_type>, false> {}; \
} \
}
/// Utility for declaring that std::map<std::string, _type> should be considered
/// a YAML map.
#define LLVM_YAML_IS_STRING_MAP(_type) \
namespace llvm { \
namespace yaml { \
template <> \
struct CustomMappingTraits<std::map<std::string, _type>> \
: public StdMapStringCustomMappingTraitsImpl<_type> {}; \
} \
}
LLVM_YAML_IS_FLOW_SEQUENCE_VECTOR(llvm::yaml::Hex64)
LLVM_YAML_IS_FLOW_SEQUENCE_VECTOR(llvm::yaml::Hex32)
LLVM_YAML_IS_FLOW_SEQUENCE_VECTOR(llvm::yaml::Hex16)
LLVM_YAML_IS_FLOW_SEQUENCE_VECTOR(llvm::yaml::Hex8)
#endif // LLVM_SUPPORT_YAMLTRAITS_H
PK hwFZ
l�.m m * Support/GenericIteratedDominanceFrontier.hnu �[��� //===- IteratedDominanceFrontier.h - Calculate IDF --------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// Compute iterated dominance frontiers using a linear time algorithm.
///
/// The algorithm used here is based on:
///
/// Sreedhar and Gao. A linear time algorithm for placing phi-nodes.
/// In Proceedings of the 22nd ACM SIGPLAN-SIGACT Symposium on Principles of
/// Programming Languages
/// POPL '95. ACM, New York, NY, 62-73.
///
/// It has been modified to not explicitly use the DJ graph data structure and
/// to directly compute pruned SSA using per-variable liveness information.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_GENERICITERATEDDOMINANCEFRONTIER_H
#define LLVM_SUPPORT_GENERICITERATEDDOMINANCEFRONTIER_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/GenericDomTree.h"
#include <queue>
namespace llvm {
namespace IDFCalculatorDetail {
/// Generic utility class used for getting the children of a basic block.
/// May be specialized if, for example, one wouldn't like to return nullpointer
/// successors.
template <class NodeTy, bool IsPostDom> struct ChildrenGetterTy {
using NodeRef = typename GraphTraits<NodeTy *>::NodeRef;
using ChildrenTy = SmallVector<NodeRef, 8>;
ChildrenTy get(const NodeRef &N);
};
} // end of namespace IDFCalculatorDetail
/// Determine the iterated dominance frontier, given a set of defining
/// blocks, and optionally, a set of live-in blocks.
///
/// In turn, the results can be used to place phi nodes.
///
/// This algorithm is a linear time computation of Iterated Dominance Frontiers,
/// pruned using the live-in set.
/// By default, liveness is not used to prune the IDF computation.
/// The template parameters should be of a CFG block type.
template <class NodeTy, bool IsPostDom> class IDFCalculatorBase {
public:
using OrderedNodeTy =
std::conditional_t<IsPostDom, Inverse<NodeTy *>, NodeTy *>;
using ChildrenGetterTy =
IDFCalculatorDetail::ChildrenGetterTy<NodeTy, IsPostDom>;
IDFCalculatorBase(DominatorTreeBase<NodeTy, IsPostDom> &DT) : DT(DT) {}
IDFCalculatorBase(DominatorTreeBase<NodeTy, IsPostDom> &DT,
const ChildrenGetterTy &C)
: DT(DT), ChildrenGetter(C) {}
/// Give the IDF calculator the set of blocks in which the value is
/// defined. This is equivalent to the set of starting blocks it should be
/// calculating the IDF for (though later gets pruned based on liveness).
///
/// Note: This set *must* live for the entire lifetime of the IDF calculator.
void setDefiningBlocks(const SmallPtrSetImpl<NodeTy *> &Blocks) {
DefBlocks = &Blocks;
}
/// Give the IDF calculator the set of blocks in which the value is
/// live on entry to the block. This is used to prune the IDF calculation to
/// not include blocks where any phi insertion would be dead.
///
/// Note: This set *must* live for the entire lifetime of the IDF calculator.
void setLiveInBlocks(const SmallPtrSetImpl<NodeTy *> &Blocks) {
LiveInBlocks = &Blocks;
useLiveIn = true;
}
/// Reset the live-in block set to be empty, and tell the IDF
/// calculator to not use liveness anymore.
void resetLiveInBlocks() {
LiveInBlocks = nullptr;
useLiveIn = false;
}
/// Calculate iterated dominance frontiers
///
/// This uses the linear-time phi algorithm based on DJ-graphs mentioned in
/// the file-level comment. It performs DF->IDF pruning using the live-in
/// set, to avoid computing the IDF for blocks where an inserted PHI node
/// would be dead.
void calculate(SmallVectorImpl<NodeTy *> &IDFBlocks);
private:
DominatorTreeBase<NodeTy, IsPostDom> &DT;
ChildrenGetterTy ChildrenGetter;
bool useLiveIn = false;
const SmallPtrSetImpl<NodeTy *> *LiveInBlocks;
const SmallPtrSetImpl<NodeTy *> *DefBlocks;
};
//===----------------------------------------------------------------------===//
// Implementation.
//===----------------------------------------------------------------------===//
namespace IDFCalculatorDetail {
template <class NodeTy, bool IsPostDom>
typename ChildrenGetterTy<NodeTy, IsPostDom>::ChildrenTy
ChildrenGetterTy<NodeTy, IsPostDom>::get(const NodeRef &N) {
using OrderedNodeTy =
typename IDFCalculatorBase<NodeTy, IsPostDom>::OrderedNodeTy;
auto Children = children<OrderedNodeTy>(N);
return {Children.begin(), Children.end()};
}
} // end of namespace IDFCalculatorDetail
template <class NodeTy, bool IsPostDom>
void IDFCalculatorBase<NodeTy, IsPostDom>::calculate(
SmallVectorImpl<NodeTy *> &IDFBlocks) {
// Use a priority queue keyed on dominator tree level so that inserted nodes
// are handled from the bottom of the dominator tree upwards. We also augment
// the level with a DFS number to ensure that the blocks are ordered in a
// deterministic way.
using DomTreeNodePair =
std::pair<DomTreeNodeBase<NodeTy> *, std::pair<unsigned, unsigned>>;
using IDFPriorityQueue =
std::priority_queue<DomTreeNodePair, SmallVector<DomTreeNodePair, 32>,
less_second>;
IDFPriorityQueue PQ;
DT.updateDFSNumbers();
SmallVector<DomTreeNodeBase<NodeTy> *, 32> Worklist;
SmallPtrSet<DomTreeNodeBase<NodeTy> *, 32> VisitedPQ;
SmallPtrSet<DomTreeNodeBase<NodeTy> *, 32> VisitedWorklist;
for (NodeTy *BB : *DefBlocks)
if (DomTreeNodeBase<NodeTy> *Node = DT.getNode(BB)) {
PQ.push({Node, std::make_pair(Node->getLevel(), Node->getDFSNumIn())});
VisitedWorklist.insert(Node);
}
while (!PQ.empty()) {
DomTreeNodePair RootPair = PQ.top();
PQ.pop();
DomTreeNodeBase<NodeTy> *Root = RootPair.first;
unsigned RootLevel = RootPair.second.first;
// Walk all dominator tree children of Root, inspecting their CFG edges with
// targets elsewhere on the dominator tree. Only targets whose level is at
// most Root's level are added to the iterated dominance frontier of the
// definition set.
assert(Worklist.empty());
Worklist.push_back(Root);
while (!Worklist.empty()) {
DomTreeNodeBase<NodeTy> *Node = Worklist.pop_back_val();
NodeTy *BB = Node->getBlock();
// Succ is the successor in the direction we are calculating IDF, so it is
// successor for IDF, and predecessor for Reverse IDF.
auto DoWork = [&](NodeTy *Succ) {
DomTreeNodeBase<NodeTy> *SuccNode = DT.getNode(Succ);
const unsigned SuccLevel = SuccNode->getLevel();
if (SuccLevel > RootLevel)
return;
if (!VisitedPQ.insert(SuccNode).second)
return;
NodeTy *SuccBB = SuccNode->getBlock();
if (useLiveIn && !LiveInBlocks->count(SuccBB))
return;
IDFBlocks.emplace_back(SuccBB);
if (!DefBlocks->count(SuccBB))
PQ.push(std::make_pair(
SuccNode, std::make_pair(SuccLevel, SuccNode->getDFSNumIn())));
};
for (auto *Succ : ChildrenGetter.get(BB))
DoWork(Succ);
for (auto DomChild : *Node) {
if (VisitedWorklist.insert(DomChild).second)
Worklist.push_back(DomChild);
}
}
}
}
} // end of namespace llvm
#endif
PK hwFZޑZ �y �y Support/DataExtractor.hnu �[��� //===-- DataExtractor.h -----------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_DATAEXTRACTOR_H
#define LLVM_SUPPORT_DATAEXTRACTOR_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/Error.h"
namespace llvm {
/// An auxiliary type to facilitate extraction of 3-byte entities.
struct Uint24 {
uint8_t Bytes[3];
Uint24(uint8_t U) {
Bytes[0] = Bytes[1] = Bytes[2] = U;
}
Uint24(uint8_t U0, uint8_t U1, uint8_t U2) {
Bytes[0] = U0; Bytes[1] = U1; Bytes[2] = U2;
}
uint32_t getAsUint32(bool IsLittleEndian) const {
int LoIx = IsLittleEndian ? 0 : 2;
return Bytes[LoIx] + (Bytes[1] << 8) + (Bytes[2-LoIx] << 16);
}
};
using uint24_t = Uint24;
static_assert(sizeof(uint24_t) == 3, "sizeof(uint24_t) != 3");
/// Needed by swapByteOrder().
inline uint24_t getSwappedBytes(uint24_t C) {
return uint24_t(C.Bytes[2], C.Bytes[1], C.Bytes[0]);
}
class DataExtractor {
StringRef Data;
uint8_t IsLittleEndian;
uint8_t AddressSize;
public:
/// A class representing a position in a DataExtractor, as well as any error
/// encountered during extraction. It enables one to extract a sequence of
/// values without error-checking and then checking for errors in bulk at the
/// end. The class holds an Error object, so failing to check the result of
/// the parse will result in a runtime error. The error flag is sticky and
/// will cause all subsequent extraction functions to fail without even
/// attempting to parse and without updating the Cursor offset. After clearing
/// the error flag, one can again use the Cursor object for parsing.
class Cursor {
uint64_t Offset;
Error Err;
friend class DataExtractor;
public:
/// Construct a cursor for extraction from the given offset.
explicit Cursor(uint64_t Offset) : Offset(Offset), Err(Error::success()) {}
/// Checks whether the cursor is valid (i.e. no errors were encountered). In
/// case of errors, this does not clear the error flag -- one must call
/// takeError() instead.
explicit operator bool() { return !Err; }
/// Return the current position of this Cursor. In the error state this is
/// the position of the Cursor before the first error was encountered.
uint64_t tell() const { return Offset; }
/// Set the cursor to the new offset. This does not impact the error state.
void seek(uint64_t NewOffSet) { Offset = NewOffSet; }
/// Return error contained inside this Cursor, if any. Clears the internal
/// Cursor state.
Error takeError() { return std::move(Err); }
};
/// Construct with a buffer that is owned by the caller.
///
/// This constructor allows us to use data that is owned by the
/// caller. The data must stay around as long as this object is
/// valid.
DataExtractor(StringRef Data, bool IsLittleEndian, uint8_t AddressSize)
: Data(Data), IsLittleEndian(IsLittleEndian), AddressSize(AddressSize) {}
DataExtractor(ArrayRef<uint8_t> Data, bool IsLittleEndian,
uint8_t AddressSize)
: Data(StringRef(reinterpret_cast<const char *>(Data.data()),
Data.size())),
IsLittleEndian(IsLittleEndian), AddressSize(AddressSize) {}
/// Get the data pointed to by this extractor.
StringRef getData() const { return Data; }
/// Get the endianness for this extractor.
bool isLittleEndian() const { return IsLittleEndian; }
/// Get the address size for this extractor.
uint8_t getAddressSize() const { return AddressSize; }
/// Set the address size for this extractor.
void setAddressSize(uint8_t Size) { AddressSize = Size; }
/// Extract a C string from \a *offset_ptr.
///
/// Returns a pointer to a C String from the data at the offset
/// pointed to by \a offset_ptr. A variable length NULL terminated C
/// string will be extracted and the \a offset_ptr will be
/// updated with the offset of the byte that follows the NULL
/// terminator byte.
///
/// @param[in,out] OffsetPtr
/// A pointer to an offset within the data that will be advanced
/// by the appropriate number of bytes if the value is extracted
/// correctly. If the offset is out of bounds or there are not
/// enough bytes to extract this value, the offset will be left
/// unmodified.
///
/// @param[in,out] Err
/// A pointer to an Error object. Upon return the Error object is set to
/// indicate the result (success/failure) of the function. If the Error
/// object is already set when calling this function, no extraction is
/// performed.
///
/// @return
/// A pointer to the C string value in the data. If the offset
/// pointed to by \a offset_ptr is out of bounds, or if the
/// offset plus the length of the C string is out of bounds,
/// NULL will be returned.
const char *getCStr(uint64_t *OffsetPtr, Error *Err = nullptr) const {
return getCStrRef(OffsetPtr, Err).data();
}
/// Extract a C string from the location given by the cursor. In case of an
/// extraction error, or if the cursor is already in an error state, a
/// nullptr is returned.
const char *getCStr(Cursor &C) const { return getCStrRef(C).data(); }
/// Extract a C string from \a *offset_ptr.
///
/// Returns a StringRef for the C String from the data at the offset
/// pointed to by \a offset_ptr. A variable length NULL terminated C
/// string will be extracted and the \a offset_ptr will be
/// updated with the offset of the byte that follows the NULL
/// terminator byte.
///
/// \param[in,out] OffsetPtr
/// A pointer to an offset within the data that will be advanced
/// by the appropriate number of bytes if the value is extracted
/// correctly. If the offset is out of bounds or there are not
/// enough bytes to extract this value, the offset will be left
/// unmodified.
///
/// @param[in,out] Err
/// A pointer to an Error object. Upon return the Error object is set to
/// indicate the result (success/failure) of the function. If the Error
/// object is already set when calling this function, no extraction is
/// performed.
///
/// \return
/// A StringRef for the C string value in the data. If the offset
/// pointed to by \a offset_ptr is out of bounds, or if the
/// offset plus the length of the C string is out of bounds,
/// a default-initialized StringRef will be returned.
StringRef getCStrRef(uint64_t *OffsetPtr, Error *Err = nullptr) const;
/// Extract a C string (as a StringRef) from the location given by the cursor.
/// In case of an extraction error, or if the cursor is already in an error
/// state, a default-initialized StringRef is returned.
StringRef getCStrRef(Cursor &C) const {
return getCStrRef(&C.Offset, &C.Err);
}
/// Extract a fixed length string from \a *OffsetPtr and consume \a Length
/// bytes.
///
/// Returns a StringRef for the string from the data at the offset
/// pointed to by \a OffsetPtr. A fixed length C string will be extracted
/// and the \a OffsetPtr will be advanced by \a Length bytes.
///
/// \param[in,out] OffsetPtr
/// A pointer to an offset within the data that will be advanced
/// by the appropriate number of bytes if the value is extracted
/// correctly. If the offset is out of bounds or there are not
/// enough bytes to extract this value, the offset will be left
/// unmodified.
///
/// \param[in] Length
/// The length of the fixed length string to extract. If there are not
/// enough bytes in the data to extract the full string, the offset will
/// be left unmodified.
///
/// \param[in] TrimChars
/// A set of characters to trim from the end of the string. Fixed length
/// strings are commonly either NULL terminated by one or more zero
/// bytes. Some clients have one or more spaces at the end of the string,
/// but a good default is to trim the NULL characters.
///
/// \return
/// A StringRef for the C string value in the data. If the offset
/// pointed to by \a OffsetPtr is out of bounds, or if the
/// offset plus the length of the C string is out of bounds,
/// a default-initialized StringRef will be returned.
StringRef getFixedLengthString(uint64_t *OffsetPtr,
uint64_t Length, StringRef TrimChars = {"\0", 1}) const;
/// Extract a fixed number of bytes from the specified offset.
///
/// Returns a StringRef for the bytes from the data at the offset
/// pointed to by \a OffsetPtr. A fixed length C string will be extracted
/// and the \a OffsetPtr will be advanced by \a Length bytes.
///
/// \param[in,out] OffsetPtr
/// A pointer to an offset within the data that will be advanced
/// by the appropriate number of bytes if the value is extracted
/// correctly. If the offset is out of bounds or there are not
/// enough bytes to extract this value, the offset will be left
/// unmodified.
///
/// \param[in] Length
/// The number of bytes to extract. If there are not enough bytes in the
/// data to extract all of the bytes, the offset will be left unmodified.
///
/// @param[in,out] Err
/// A pointer to an Error object. Upon return the Error object is set to
/// indicate the result (success/failure) of the function. If the Error
/// object is already set when calling this function, no extraction is
/// performed.
///
/// \return
/// A StringRef for the extracted bytes. If the offset pointed to by
/// \a OffsetPtr is out of bounds, or if the offset plus the length
/// is out of bounds, a default-initialized StringRef will be returned.
StringRef getBytes(uint64_t *OffsetPtr, uint64_t Length,
Error *Err = nullptr) const;
/// Extract a fixed number of bytes from the location given by the cursor. In
/// case of an extraction error, or if the cursor is already in an error
/// state, a default-initialized StringRef is returned.
StringRef getBytes(Cursor &C, uint64_t Length) {
return getBytes(&C.Offset, Length, &C.Err);
}
/// Extract an unsigned integer of size \a byte_size from \a
/// *offset_ptr.
///
/// Extract a single unsigned integer value and update the offset
/// pointed to by \a offset_ptr. The size of the extracted integer
/// is specified by the \a byte_size argument. \a byte_size should
/// have a value greater than or equal to one and less than or equal
/// to eight since the return value is 64 bits wide. Any
/// \a byte_size values less than 1 or greater than 8 will result in
/// nothing being extracted, and zero being returned.
///
/// @param[in,out] offset_ptr
/// A pointer to an offset within the data that will be advanced
/// by the appropriate number of bytes if the value is extracted
/// correctly. If the offset is out of bounds or there are not
/// enough bytes to extract this value, the offset will be left
/// unmodified.
///
/// @param[in] byte_size
/// The size in byte of the integer to extract.
///
/// @param[in,out] Err
/// A pointer to an Error object. Upon return the Error object is set to
/// indicate the result (success/failure) of the function. If the Error
/// object is already set when calling this function, no extraction is
/// performed.
///
/// @return
/// The unsigned integer value that was extracted, or zero on
/// failure.
uint64_t getUnsigned(uint64_t *offset_ptr, uint32_t byte_size,
Error *Err = nullptr) const;
/// Extract an unsigned integer of the given size from the location given by
/// the cursor. In case of an extraction error, or if the cursor is already in
/// an error state, zero is returned.
uint64_t getUnsigned(Cursor &C, uint32_t Size) const {
return getUnsigned(&C.Offset, Size, &C.Err);
}
/// Extract an signed integer of size \a byte_size from \a *offset_ptr.
///
/// Extract a single signed integer value (sign extending if required)
/// and update the offset pointed to by \a offset_ptr. The size of
/// the extracted integer is specified by the \a byte_size argument.
/// \a byte_size should have a value greater than or equal to one
/// and less than or equal to eight since the return value is 64
/// bits wide. Any \a byte_size values less than 1 or greater than
/// 8 will result in nothing being extracted, and zero being returned.
///
/// @param[in,out] offset_ptr
/// A pointer to an offset within the data that will be advanced
/// by the appropriate number of bytes if the value is extracted
/// correctly. If the offset is out of bounds or there are not
/// enough bytes to extract this value, the offset will be left
/// unmodified.
///
/// @param[in] size
/// The size in bytes of the integer to extract.
///
/// @return
/// The sign extended signed integer value that was extracted,
/// or zero on failure.
int64_t getSigned(uint64_t *offset_ptr, uint32_t size) const;
//------------------------------------------------------------------
/// Extract an pointer from \a *offset_ptr.
///
/// Extract a single pointer from the data and update the offset
/// pointed to by \a offset_ptr. The size of the extracted pointer
/// is \a getAddressSize(), so the address size has to be
/// set correctly prior to extracting any pointer values.
///
/// @param[in,out] offset_ptr
/// A pointer to an offset within the data that will be advanced
/// by the appropriate number of bytes if the value is extracted
/// correctly. If the offset is out of bounds or there are not
/// enough bytes to extract this value, the offset will be left
/// unmodified.
///
/// @return
/// The extracted pointer value as a 64 integer.
uint64_t getAddress(uint64_t *offset_ptr) const {
return getUnsigned(offset_ptr, AddressSize);
}
/// Extract a pointer-sized unsigned integer from the location given by the
/// cursor. In case of an extraction error, or if the cursor is already in
/// an error state, zero is returned.
uint64_t getAddress(Cursor &C) const { return getUnsigned(C, AddressSize); }
/// Extract a uint8_t value from \a *offset_ptr.
///
/// Extract a single uint8_t from the binary data at the offset
/// pointed to by \a offset_ptr, and advance the offset on success.
///
/// @param[in,out] offset_ptr
/// A pointer to an offset within the data that will be advanced
/// by the appropriate number of bytes if the value is extracted
/// correctly. If the offset is out of bounds or there are not
/// enough bytes to extract this value, the offset will be left
/// unmodified.
///
/// @param[in,out] Err
/// A pointer to an Error object. Upon return the Error object is set to
/// indicate the result (success/failure) of the function. If the Error
/// object is already set when calling this function, no extraction is
/// performed.
///
/// @return
/// The extracted uint8_t value.
uint8_t getU8(uint64_t *offset_ptr, Error *Err = nullptr) const;
/// Extract a single uint8_t value from the location given by the cursor. In
/// case of an extraction error, or if the cursor is already in an error
/// state, zero is returned.
uint8_t getU8(Cursor &C) const { return getU8(&C.Offset, &C.Err); }
/// Extract \a count uint8_t values from \a *offset_ptr.
///
/// Extract \a count uint8_t values from the binary data at the
/// offset pointed to by \a offset_ptr, and advance the offset on
/// success. The extracted values are copied into \a dst.
///
/// @param[in,out] offset_ptr
/// A pointer to an offset within the data that will be advanced
/// by the appropriate number of bytes if the value is extracted
/// correctly. If the offset is out of bounds or there are not
/// enough bytes to extract this value, the offset will be left
/// unmodified.
///
/// @param[out] dst
/// A buffer to copy \a count uint8_t values into. \a dst must
/// be large enough to hold all requested data.
///
/// @param[in] count
/// The number of uint8_t values to extract.
///
/// @return
/// \a dst if all values were properly extracted and copied,
/// NULL otherise.
uint8_t *getU8(uint64_t *offset_ptr, uint8_t *dst, uint32_t count) const;
/// Extract \a Count uint8_t values from the location given by the cursor and
/// store them into the destination buffer. In case of an extraction error, or
/// if the cursor is already in an error state, a nullptr is returned and the
/// destination buffer is left unchanged.
uint8_t *getU8(Cursor &C, uint8_t *Dst, uint32_t Count) const;
/// Extract \a Count uint8_t values from the location given by the cursor and
/// store them into the destination vector. The vector is resized to fit the
/// extracted data. In case of an extraction error, or if the cursor is
/// already in an error state, the destination vector is left unchanged and
/// cursor is placed into an error state.
void getU8(Cursor &C, SmallVectorImpl<uint8_t> &Dst, uint32_t Count) const {
if (isValidOffsetForDataOfSize(C.Offset, Count))
Dst.resize(Count);
// This relies on the fact that getU8 will not attempt to write to the
// buffer if isValidOffsetForDataOfSize(C.Offset, Count) is false.
getU8(C, Dst.data(), Count);
}
//------------------------------------------------------------------
/// Extract a uint16_t value from \a *offset_ptr.
///
/// Extract a single uint16_t from the binary data at the offset
/// pointed to by \a offset_ptr, and update the offset on success.
///
/// @param[in,out] offset_ptr
/// A pointer to an offset within the data that will be advanced
/// by the appropriate number of bytes if the value is extracted
/// correctly. If the offset is out of bounds or there are not
/// enough bytes to extract this value, the offset will be left
/// unmodified.
///
/// @param[in,out] Err
/// A pointer to an Error object. Upon return the Error object is set to
/// indicate the result (success/failure) of the function. If the Error
/// object is already set when calling this function, no extraction is
/// performed.
///
/// @return
/// The extracted uint16_t value.
//------------------------------------------------------------------
uint16_t getU16(uint64_t *offset_ptr, Error *Err = nullptr) const;
/// Extract a single uint16_t value from the location given by the cursor. In
/// case of an extraction error, or if the cursor is already in an error
/// state, zero is returned.
uint16_t getU16(Cursor &C) const { return getU16(&C.Offset, &C.Err); }
/// Extract \a count uint16_t values from \a *offset_ptr.
///
/// Extract \a count uint16_t values from the binary data at the
/// offset pointed to by \a offset_ptr, and advance the offset on
/// success. The extracted values are copied into \a dst.
///
/// @param[in,out] offset_ptr
/// A pointer to an offset within the data that will be advanced
/// by the appropriate number of bytes if the value is extracted
/// correctly. If the offset is out of bounds or there are not
/// enough bytes to extract this value, the offset will be left
/// unmodified.
///
/// @param[out] dst
/// A buffer to copy \a count uint16_t values into. \a dst must
/// be large enough to hold all requested data.
///
/// @param[in] count
/// The number of uint16_t values to extract.
///
/// @return
/// \a dst if all values were properly extracted and copied,
/// NULL otherise.
uint16_t *getU16(uint64_t *offset_ptr, uint16_t *dst, uint32_t count) const;
/// Extract a 24-bit unsigned value from \a *offset_ptr and return it
/// in a uint32_t.
///
/// Extract 3 bytes from the binary data at the offset pointed to by
/// \a offset_ptr, construct a uint32_t from them and update the offset
/// on success.
///
/// @param[in,out] OffsetPtr
/// A pointer to an offset within the data that will be advanced
/// by the 3 bytes if the value is extracted correctly. If the offset
/// is out of bounds or there are not enough bytes to extract this value,
/// the offset will be left unmodified.
///
/// @param[in,out] Err
/// A pointer to an Error object. Upon return the Error object is set to
/// indicate the result (success/failure) of the function. If the Error
/// object is already set when calling this function, no extraction is
/// performed.
///
/// @return
/// The extracted 24-bit value represented in a uint32_t.
uint32_t getU24(uint64_t *OffsetPtr, Error *Err = nullptr) const;
/// Extract a single 24-bit unsigned value from the location given by the
/// cursor. In case of an extraction error, or if the cursor is already in an
/// error state, zero is returned.
uint32_t getU24(Cursor &C) const { return getU24(&C.Offset, &C.Err); }
/// Extract a uint32_t value from \a *offset_ptr.
///
/// Extract a single uint32_t from the binary data at the offset
/// pointed to by \a offset_ptr, and update the offset on success.
///
/// @param[in,out] offset_ptr
/// A pointer to an offset within the data that will be advanced
/// by the appropriate number of bytes if the value is extracted
/// correctly. If the offset is out of bounds or there are not
/// enough bytes to extract this value, the offset will be left
/// unmodified.
///
/// @param[in,out] Err
/// A pointer to an Error object. Upon return the Error object is set to
/// indicate the result (success/failure) of the function. If the Error
/// object is already set when calling this function, no extraction is
/// performed.
///
/// @return
/// The extracted uint32_t value.
uint32_t getU32(uint64_t *offset_ptr, Error *Err = nullptr) const;
/// Extract a single uint32_t value from the location given by the cursor. In
/// case of an extraction error, or if the cursor is already in an error
/// state, zero is returned.
uint32_t getU32(Cursor &C) const { return getU32(&C.Offset, &C.Err); }
/// Extract \a count uint32_t values from \a *offset_ptr.
///
/// Extract \a count uint32_t values from the binary data at the
/// offset pointed to by \a offset_ptr, and advance the offset on
/// success. The extracted values are copied into \a dst.
///
/// @param[in,out] offset_ptr
/// A pointer to an offset within the data that will be advanced
/// by the appropriate number of bytes if the value is extracted
/// correctly. If the offset is out of bounds or there are not
/// enough bytes to extract this value, the offset will be left
/// unmodified.
///
/// @param[out] dst
/// A buffer to copy \a count uint32_t values into. \a dst must
/// be large enough to hold all requested data.
///
/// @param[in] count
/// The number of uint32_t values to extract.
///
/// @return
/// \a dst if all values were properly extracted and copied,
/// NULL otherise.
uint32_t *getU32(uint64_t *offset_ptr, uint32_t *dst, uint32_t count) const;
/// Extract a uint64_t value from \a *offset_ptr.
///
/// Extract a single uint64_t from the binary data at the offset
/// pointed to by \a offset_ptr, and update the offset on success.
///
/// @param[in,out] offset_ptr
/// A pointer to an offset within the data that will be advanced
/// by the appropriate number of bytes if the value is extracted
/// correctly. If the offset is out of bounds or there are not
/// enough bytes to extract this value, the offset will be left
/// unmodified.
///
/// @param[in,out] Err
/// A pointer to an Error object. Upon return the Error object is set to
/// indicate the result (success/failure) of the function. If the Error
/// object is already set when calling this function, no extraction is
/// performed.
///
/// @return
/// The extracted uint64_t value.
uint64_t getU64(uint64_t *offset_ptr, Error *Err = nullptr) const;
/// Extract a single uint64_t value from the location given by the cursor. In
/// case of an extraction error, or if the cursor is already in an error
/// state, zero is returned.
uint64_t getU64(Cursor &C) const { return getU64(&C.Offset, &C.Err); }
/// Extract \a count uint64_t values from \a *offset_ptr.
///
/// Extract \a count uint64_t values from the binary data at the
/// offset pointed to by \a offset_ptr, and advance the offset on
/// success. The extracted values are copied into \a dst.
///
/// @param[in,out] offset_ptr
/// A pointer to an offset within the data that will be advanced
/// by the appropriate number of bytes if the value is extracted
/// correctly. If the offset is out of bounds or there are not
/// enough bytes to extract this value, the offset will be left
/// unmodified.
///
/// @param[out] dst
/// A buffer to copy \a count uint64_t values into. \a dst must
/// be large enough to hold all requested data.
///
/// @param[in] count
/// The number of uint64_t values to extract.
///
/// @return
/// \a dst if all values were properly extracted and copied,
/// NULL otherise.
uint64_t *getU64(uint64_t *offset_ptr, uint64_t *dst, uint32_t count) const;
/// Extract a signed LEB128 value from \a *offset_ptr.
///
/// Extracts an signed LEB128 number from this object's data
/// starting at the offset pointed to by \a offset_ptr. The offset
/// pointed to by \a offset_ptr will be updated with the offset of
/// the byte following the last extracted byte.
///
/// @param[in,out] OffsetPtr
/// A pointer to an offset within the data that will be advanced
/// by the appropriate number of bytes if the value is extracted
/// correctly. If the offset is out of bounds or there are not
/// enough bytes to extract this value, the offset will be left
/// unmodified.
///
/// @param[in,out] Err
/// A pointer to an Error object. Upon return the Error object is set to
/// indicate the result (success/failure) of the function. If the Error
/// object is already set when calling this function, no extraction is
/// performed.
///
/// @return
/// The extracted signed integer value.
int64_t getSLEB128(uint64_t *OffsetPtr, Error *Err = nullptr) const;
/// Extract an signed LEB128 value from the location given by the cursor.
/// In case of an extraction error, or if the cursor is already in an error
/// state, zero is returned.
int64_t getSLEB128(Cursor &C) const { return getSLEB128(&C.Offset, &C.Err); }
/// Extract a unsigned LEB128 value from \a *offset_ptr.
///
/// Extracts an unsigned LEB128 number from this object's data
/// starting at the offset pointed to by \a offset_ptr. The offset
/// pointed to by \a offset_ptr will be updated with the offset of
/// the byte following the last extracted byte.
///
/// @param[in,out] offset_ptr
/// A pointer to an offset within the data that will be advanced
/// by the appropriate number of bytes if the value is extracted
/// correctly. If the offset is out of bounds or there are not
/// enough bytes to extract this value, the offset will be left
/// unmodified.
///
/// @param[in,out] Err
/// A pointer to an Error object. Upon return the Error object is set to
/// indicate the result (success/failure) of the function. If the Error
/// object is already set when calling this function, no extraction is
/// performed.
///
/// @return
/// The extracted unsigned integer value.
uint64_t getULEB128(uint64_t *offset_ptr, llvm::Error *Err = nullptr) const;
/// Extract an unsigned LEB128 value from the location given by the cursor.
/// In case of an extraction error, or if the cursor is already in an error
/// state, zero is returned.
uint64_t getULEB128(Cursor &C) const { return getULEB128(&C.Offset, &C.Err); }
/// Advance the Cursor position by the given number of bytes. No-op if the
/// cursor is in an error state.
void skip(Cursor &C, uint64_t Length) const;
/// Return true iff the cursor is at the end of the buffer, regardless of the
/// error state of the cursor. The only way both eof and error states can be
/// true is if one attempts a read while the cursor is at the very end of the
/// data buffer.
bool eof(const Cursor &C) const { return size() == C.Offset; }
/// Test the validity of \a offset.
///
/// @return
/// \b true if \a offset is a valid offset into the data in this
/// object, \b false otherwise.
bool isValidOffset(uint64_t offset) const { return size() > offset; }
/// Test the availability of \a length bytes of data from \a offset.
///
/// @return
/// \b true if \a offset is a valid offset and there are \a
/// length bytes available at that offset, \b false otherwise.
bool isValidOffsetForDataOfSize(uint64_t offset, uint64_t length) const {
return offset + length >= offset && isValidOffset(offset + length - 1);
}
/// Test the availability of enough bytes of data for a pointer from
/// \a offset. The size of a pointer is \a getAddressSize().
///
/// @return
/// \b true if \a offset is a valid offset and there are enough
/// bytes for a pointer available at that offset, \b false
/// otherwise.
bool isValidOffsetForAddress(uint64_t offset) const {
return isValidOffsetForDataOfSize(offset, AddressSize);
}
/// Return the number of bytes in the underlying buffer.
size_t size() const { return Data.size(); }
protected:
// Make it possible for subclasses to access these fields without making them
// public.
static uint64_t &getOffset(Cursor &C) { return C.Offset; }
static Error &getError(Cursor &C) { return C.Err; }
private:
/// If it is possible to read \a Size bytes at offset \a Offset, returns \b
/// true. Otherwise, returns \b false. If \a E is not nullptr, also sets the
/// error object to indicate an error.
bool prepareRead(uint64_t Offset, uint64_t Size, Error *E) const;
template <typename T> T getU(uint64_t *OffsetPtr, Error *Err) const;
template <typename T>
T *getUs(uint64_t *OffsetPtr, T *Dst, uint32_t Count, Error *Err) const;
};
} // namespace llvm
#endif
PK hwFZVh��� � ! Support/SmallVectorMemoryBuffer.hnu �[��� //===- SmallVectorMemoryBuffer.h --------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares a wrapper class to hold the memory into which an
// object will be generated.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_SMALLVECTORMEMORYBUFFER_H
#define LLVM_SUPPORT_SMALLVECTORMEMORYBUFFER_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Support/raw_ostream.h"
namespace llvm {
/// SmallVector-backed MemoryBuffer instance.
///
/// This class enables efficient construction of MemoryBuffers from SmallVector
/// instances. This is useful for MCJIT and Orc, where object files are streamed
/// into SmallVectors, then inspected using ObjectFile (which takes a
/// MemoryBuffer).
class SmallVectorMemoryBuffer : public MemoryBuffer {
public:
/// Construct a SmallVectorMemoryBuffer from the given SmallVector r-value.
SmallVectorMemoryBuffer(SmallVectorImpl<char> &&SV,
bool RequiresNullTerminator = true)
: SmallVectorMemoryBuffer(std::move(SV), "<in-memory object>",
RequiresNullTerminator) {}
/// Construct a named SmallVectorMemoryBuffer from the given SmallVector
/// r-value and StringRef.
SmallVectorMemoryBuffer(SmallVectorImpl<char> &&SV, StringRef Name,
bool RequiresNullTerminator = true)
: SV(std::move(SV)), BufferName(std::string(Name)) {
if (RequiresNullTerminator) {
this->SV.push_back('\0');
this->SV.pop_back();
}
init(this->SV.begin(), this->SV.end(), false);
}
// Key function.
~SmallVectorMemoryBuffer() override;
StringRef getBufferIdentifier() const override { return BufferName; }
BufferKind getBufferKind() const override { return MemoryBuffer_Malloc; }
private:
SmallVector<char, 0> SV;
std::string BufferName;
};
} // namespace llvm
#endif
PK hwFZ�|�? Support/WithColor.hnu �[��� //===- WithColor.h ----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_WITHCOLOR_H
#define LLVM_SUPPORT_WITHCOLOR_H
#include "llvm/Support/raw_ostream.h"
namespace llvm {
class Error;
class StringRef;
namespace cl {
class OptionCategory;
}
extern cl::OptionCategory &getColorCategory();
// Symbolic names for various syntax elements.
enum class HighlightColor {
Address,
String,
Tag,
Attribute,
Enumerator,
Macro,
Error,
Warning,
Note,
Remark
};
enum class ColorMode {
/// Determine whether to use color based on the command line argument and the
/// raw_ostream.
Auto,
/// Enable colors. Because raw_ostream is the one implementing colors, this
/// has no effect if the stream does not support colors or has colors
/// disabled.
Enable,
/// Disable colors.
Disable,
};
/// An RAII object that temporarily switches an output stream to a specific
/// color.
class WithColor {
public:
using AutoDetectFunctionType = bool (*)(const raw_ostream &OS);
/// To be used like this: WithColor(OS, HighlightColor::String) << "text";
/// @param OS The output stream
/// @param S Symbolic name for syntax element to color
/// @param Mode Enable, disable or compute whether to use colors.
WithColor(raw_ostream &OS, HighlightColor S,
ColorMode Mode = ColorMode::Auto);
/// To be used like this: WithColor(OS, raw_ostream::BLACK) << "text";
/// @param OS The output stream
/// @param Color ANSI color to use, the special SAVEDCOLOR can be used to
/// change only the bold attribute, and keep colors untouched
/// @param Bold Bold/brighter text, default false
/// @param BG If true, change the background, default: change foreground
/// @param Mode Enable, disable or compute whether to use colors.
WithColor(raw_ostream &OS,
raw_ostream::Colors Color = raw_ostream::SAVEDCOLOR,
bool Bold = false, bool BG = false,
ColorMode Mode = ColorMode::Auto)
: OS(OS), Mode(Mode) {
changeColor(Color, Bold, BG);
}
~WithColor();
raw_ostream &get() { return OS; }
operator raw_ostream &() { return OS; }
template <typename T> WithColor &operator<<(T &O) {
OS << O;
return *this;
}
template <typename T> WithColor &operator<<(const T &O) {
OS << O;
return *this;
}
/// Convenience method for printing "error: " to stderr.
static raw_ostream &error();
/// Convenience method for printing "warning: " to stderr.
static raw_ostream &warning();
/// Convenience method for printing "note: " to stderr.
static raw_ostream ¬e();
/// Convenience method for printing "remark: " to stderr.
static raw_ostream &remark();
/// Convenience method for printing "error: " to the given stream.
static raw_ostream &error(raw_ostream &OS, StringRef Prefix = "",
bool DisableColors = false);
/// Convenience method for printing "warning: " to the given stream.
static raw_ostream &warning(raw_ostream &OS, StringRef Prefix = "",
bool DisableColors = false);
/// Convenience method for printing "note: " to the given stream.
static raw_ostream ¬e(raw_ostream &OS, StringRef Prefix = "",
bool DisableColors = false);
/// Convenience method for printing "remark: " to the given stream.
static raw_ostream &remark(raw_ostream &OS, StringRef Prefix = "",
bool DisableColors = false);
/// Determine whether colors are displayed.
bool colorsEnabled();
/// Change the color of text that will be output from this point forward.
/// @param Color ANSI color to use, the special SAVEDCOLOR can be used to
/// change only the bold attribute, and keep colors untouched
/// @param Bold Bold/brighter text, default false
/// @param BG If true, change the background, default: change foreground
WithColor &changeColor(raw_ostream::Colors Color, bool Bold = false,
bool BG = false);
/// Reset the colors to terminal defaults. Call this when you are done
/// outputting colored text, or before program exit.
WithColor &resetColor();
/// Implement default handling for Error.
/// Print "error: " to stderr.
static void defaultErrorHandler(Error Err);
/// Implement default handling for Warning.
/// Print "warning: " to stderr.
static void defaultWarningHandler(Error Warning);
/// Retrieve the default color auto detection function.
static AutoDetectFunctionType defaultAutoDetectFunction();
/// Change the global auto detection function.
static void
setAutoDetectFunction(AutoDetectFunctionType NewAutoDetectFunction);
private:
raw_ostream &OS;
ColorMode Mode;
static AutoDetectFunctionType AutoDetectFunction;
};
} // end namespace llvm
#endif // LLVM_SUPPORT_WITHCOLOR_H
PK hwFZW�a' a' Support/FormatVariadic.hnu �[��� //===- FormatVariadic.h - Efficient type-safe string formatting --*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements the formatv() function which can be used with other LLVM
// subsystems to provide printf-like formatting, but with improved safety and
// flexibility. The result of `formatv` is an object which can be streamed to
// a raw_ostream or converted to a std::string or llvm::SmallString.
//
// // Convert to std::string.
// std::string S = formatv("{0} {1}", 1234.412, "test").str();
//
// // Convert to llvm::SmallString
// SmallString<8> S = formatv("{0} {1}", 1234.412, "test").sstr<8>();
//
// // Stream to an existing raw_ostream.
// OS << formatv("{0} {1}", 1234.412, "test");
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_FORMATVARIADIC_H
#define LLVM_SUPPORT_FORMATVARIADIC_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/FormatCommon.h"
#include "llvm/Support/FormatProviders.h"
#include "llvm/Support/FormatVariadicDetails.h"
#include "llvm/Support/raw_ostream.h"
#include <array>
#include <cstddef>
#include <optional>
#include <string>
#include <tuple>
#include <utility>
namespace llvm {
enum class ReplacementType { Empty, Format, Literal };
struct ReplacementItem {
ReplacementItem() = default;
explicit ReplacementItem(StringRef Literal)
: Type(ReplacementType::Literal), Spec(Literal) {}
ReplacementItem(StringRef Spec, size_t Index, size_t Align, AlignStyle Where,
char Pad, StringRef Options)
: Type(ReplacementType::Format), Spec(Spec), Index(Index), Align(Align),
Where(Where), Pad(Pad), Options(Options) {}
ReplacementType Type = ReplacementType::Empty;
StringRef Spec;
size_t Index = 0;
size_t Align = 0;
AlignStyle Where = AlignStyle::Right;
char Pad = 0;
StringRef Options;
};
class formatv_object_base {
protected:
StringRef Fmt;
ArrayRef<detail::format_adapter *> Adapters;
static bool consumeFieldLayout(StringRef &Spec, AlignStyle &Where,
size_t &Align, char &Pad);
static std::pair<ReplacementItem, StringRef>
splitLiteralAndReplacement(StringRef Fmt);
formatv_object_base(StringRef Fmt,
ArrayRef<detail::format_adapter *> Adapters)
: Fmt(Fmt), Adapters(Adapters) {}
formatv_object_base(formatv_object_base const &rhs) = delete;
formatv_object_base(formatv_object_base &&rhs) = default;
public:
void format(raw_ostream &S) const {
for (auto &R : parseFormatString(Fmt)) {
if (R.Type == ReplacementType::Empty)
continue;
if (R.Type == ReplacementType::Literal) {
S << R.Spec;
continue;
}
if (R.Index >= Adapters.size()) {
S << R.Spec;
continue;
}
auto *W = Adapters[R.Index];
FmtAlign Align(*W, R.Where, R.Align, R.Pad);
Align.format(S, R.Options);
}
}
static SmallVector<ReplacementItem, 2> parseFormatString(StringRef Fmt);
static std::optional<ReplacementItem> parseReplacementItem(StringRef Spec);
std::string str() const {
std::string Result;
raw_string_ostream Stream(Result);
Stream << *this;
Stream.flush();
return Result;
}
template <unsigned N> SmallString<N> sstr() const {
SmallString<N> Result;
raw_svector_ostream Stream(Result);
Stream << *this;
return Result;
}
template <unsigned N> operator SmallString<N>() const { return sstr<N>(); }
operator std::string() const { return str(); }
};
template <typename Tuple> class formatv_object : public formatv_object_base {
// Storage for the parameter adapters. Since the base class erases the type
// of the parameters, we have to own the storage for the parameters here, and
// have the base class store type-erased pointers into this tuple.
Tuple Parameters;
std::array<detail::format_adapter *, std::tuple_size<Tuple>::value>
ParameterPointers;
// The parameters are stored in a std::tuple, which does not provide runtime
// indexing capabilities. In order to enable runtime indexing, we use this
// structure to put the parameters into a std::array. Since the parameters
// are not all the same type, we use some type-erasure by wrapping the
// parameters in a template class that derives from a non-template superclass.
// Essentially, we are converting a std::tuple<Derived<Ts...>> to a
// std::array<Base*>.
struct create_adapters {
template <typename... Ts>
std::array<detail::format_adapter *, std::tuple_size<Tuple>::value>
operator()(Ts &... Items) {
return {{&Items...}};
}
};
public:
formatv_object(StringRef Fmt, Tuple &&Params)
: formatv_object_base(Fmt, ParameterPointers),
Parameters(std::move(Params)) {
ParameterPointers = std::apply(create_adapters(), Parameters);
}
formatv_object(formatv_object const &rhs) = delete;
formatv_object(formatv_object &&rhs)
: formatv_object_base(std::move(rhs)),
Parameters(std::move(rhs.Parameters)) {
ParameterPointers = std::apply(create_adapters(), Parameters);
Adapters = ParameterPointers;
}
};
// Format text given a format string and replacement parameters.
//
// ===General Description===
//
// Formats textual output. `Fmt` is a string consisting of one or more
// replacement sequences with the following grammar:
//
// rep_field ::= "{" index ["," layout] [":" format] "}"
// index ::= <non-negative integer>
// layout ::= [[[char]loc]width]
// format ::= <any string not containing "{" or "}">
// char ::= <any character except "{" or "}">
// loc ::= "-" | "=" | "+"
// width ::= <positive integer>
//
// index - A non-negative integer specifying the index of the item in the
// parameter pack to print. Any other value is invalid.
// layout - A string controlling how the field is laid out within the available
// space.
// format - A type-dependent string used to provide additional options to
// the formatting operation. Refer to the documentation of the
// various individual format providers for per-type options.
// char - The padding character. Defaults to ' ' (space). Only valid if
// `loc` is also specified.
// loc - Where to print the formatted text within the field. Only valid if
// `width` is also specified.
// '-' : The field is left aligned within the available space.
// '=' : The field is centered within the available space.
// '+' : The field is right aligned within the available space (this
// is the default).
// width - The width of the field within which to print the formatted text.
// If this is less than the required length then the `char` and `loc`
// fields are ignored, and the field is printed with no leading or
// trailing padding. If this is greater than the required length,
// then the text is output according to the value of `loc`, and padded
// as appropriate on the left and/or right by `char`.
//
// ===Special Characters===
//
// The characters '{' and '}' are reserved and cannot appear anywhere within a
// replacement sequence. Outside of a replacement sequence, in order to print
// a literal '{' it must be doubled as "{{".
//
// ===Parameter Indexing===
//
// `index` specifies the index of the parameter in the parameter pack to format
// into the output. Note that it is possible to refer to the same parameter
// index multiple times in a given format string. This makes it possible to
// output the same value multiple times without passing it multiple times to the
// function. For example:
//
// formatv("{0} {1} {0}", "a", "bb")
//
// would yield the string "abba". This can be convenient when it is expensive
// to compute the value of the parameter, and you would otherwise have had to
// save it to a temporary.
//
// ===Formatter Search===
//
// For a given parameter of type T, the following steps are executed in order
// until a match is found:
//
// 1. If the parameter is of class type, and inherits from format_adapter,
// Then format() is invoked on it to produce the formatted output. The
// implementation should write the formatted text into `Stream`.
// 2. If there is a suitable template specialization of format_provider<>
// for type T containing a method whose signature is:
// void format(const T &Obj, raw_ostream &Stream, StringRef Options)
// Then this method is invoked as described in Step 1.
// 3. If an appropriate operator<< for raw_ostream exists, it will be used.
// For this to work, (raw_ostream& << const T&) must return raw_ostream&.
//
// If a match cannot be found through either of the above methods, a compiler
// error is generated.
//
// ===Invalid Format String Handling===
//
// In the case of a format string which does not match the grammar described
// above, the output is undefined. With asserts enabled, LLVM will trigger an
// assertion. Otherwise, it will try to do something reasonable, but in general
// the details of what that is are undefined.
//
template <typename... Ts>
inline auto formatv(const char *Fmt, Ts &&... Vals) -> formatv_object<decltype(
std::make_tuple(detail::build_format_adapter(std::forward<Ts>(Vals))...))> {
using ParamTuple = decltype(
std::make_tuple(detail::build_format_adapter(std::forward<Ts>(Vals))...));
return formatv_object<ParamTuple>(
Fmt,
std::make_tuple(detail::build_format_adapter(std::forward<Ts>(Vals))...));
}
} // end namespace llvm
#endif // LLVM_SUPPORT_FORMATVARIADIC_H
PK hwFZ���>� � Support/Capacity.hnu �[��� //===--- Capacity.h - Generic computation of ADT memory use -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the capacity function that computes the amount of
// memory used by an ADT.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_CAPACITY_H
#define LLVM_SUPPORT_CAPACITY_H
#include <cstddef>
namespace llvm {
template <typename T>
static inline size_t capacity_in_bytes(const T &x) {
// This default definition of capacity should work for things like std::vector
// and friends. More specialized versions will work for others.
return x.capacity() * sizeof(typename T::value_type);
}
} // end namespace llvm
#endif
PK hwFZ��I�� � Support/Windows/WindowsSupport.hnu �[��� //===- WindowsSupport.h - Common Windows Include File -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines things specific to Windows implementations. In addition to
// providing some helpers for working with win32 APIs, this header wraps
// <windows.h> with some portability macros. Always include WindowsSupport.h
// instead of including <windows.h> directly.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//=== WARNING: Implementation here must contain only generic Win32 code that
//=== is guaranteed to work on *all* Win32 variants.
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_WINDOWSSUPPORT_H
#define LLVM_SUPPORT_WINDOWSSUPPORT_H
// mingw-w64 tends to define it as 0x0502 in its headers.
#undef _WIN32_WINNT
#undef _WIN32_IE
// Require at least Windows 7 API.
#define _WIN32_WINNT 0x0601
#define _WIN32_IE 0x0800 // MinGW at it again. FIXME: verify if still needed.
#define WIN32_LEAN_AND_MEAN
#ifndef NOMINMAX
#define NOMINMAX
#endif
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Config/llvm-config.h" // Get build system configuration settings
#include "llvm/Support/Allocator.h"
#include "llvm/Support/Chrono.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/VersionTuple.h"
#include <cassert>
#include <string>
#include <system_error>
#include <windows.h>
// Must be included after windows.h
#include <wincrypt.h>
namespace llvm {
/// Determines if the program is running on Windows 8 or newer. This
/// reimplements one of the helpers in the Windows 8.1 SDK, which are intended
/// to supercede raw calls to GetVersionEx. Old SDKs, Cygwin, and MinGW don't
/// yet have VersionHelpers.h, so we have our own helper.
bool RunningWindows8OrGreater();
/// Determines if the program is running on Windows 11 or Windows Server 2022.
bool RunningWindows11OrGreater();
/// Returns the Windows version as Major.Minor.0.BuildNumber. Uses
/// RtlGetVersion or GetVersionEx under the hood depending on what is available.
/// GetVersionEx is deprecated, but this API exposes the build number which can
/// be useful for working around certain kernel bugs.
llvm::VersionTuple GetWindowsOSVersion();
bool MakeErrMsg(std::string *ErrMsg, const std::string &prefix);
// Include GetLastError() in a fatal error message.
[[noreturn]] inline void ReportLastErrorFatal(const char *Msg) {
std::string ErrMsg;
MakeErrMsg(&ErrMsg, Msg);
llvm::report_fatal_error(Twine(ErrMsg));
}
template <typename HandleTraits>
class ScopedHandle {
typedef typename HandleTraits::handle_type handle_type;
handle_type Handle;
ScopedHandle(const ScopedHandle &other) = delete;
void operator=(const ScopedHandle &other) = delete;
public:
ScopedHandle()
: Handle(HandleTraits::GetInvalid()) {}
explicit ScopedHandle(handle_type h)
: Handle(h) {}
~ScopedHandle() {
if (HandleTraits::IsValid(Handle))
HandleTraits::Close(Handle);
}
handle_type take() {
handle_type t = Handle;
Handle = HandleTraits::GetInvalid();
return t;
}
ScopedHandle &operator=(handle_type h) {
if (HandleTraits::IsValid(Handle))
HandleTraits::Close(Handle);
Handle = h;
return *this;
}
// True if Handle is valid.
explicit operator bool() const {
return HandleTraits::IsValid(Handle) ? true : false;
}
operator handle_type() const {
return Handle;
}
};
struct CommonHandleTraits {
typedef HANDLE handle_type;
static handle_type GetInvalid() {
return INVALID_HANDLE_VALUE;
}
static void Close(handle_type h) {
::CloseHandle(h);
}
static bool IsValid(handle_type h) {
return h != GetInvalid();
}
};
struct JobHandleTraits : CommonHandleTraits {
static handle_type GetInvalid() {
return NULL;
}
};
struct CryptContextTraits : CommonHandleTraits {
typedef HCRYPTPROV handle_type;
static handle_type GetInvalid() {
return 0;
}
static void Close(handle_type h) {
::CryptReleaseContext(h, 0);
}
static bool IsValid(handle_type h) {
return h != GetInvalid();
}
};
struct RegTraits : CommonHandleTraits {
typedef HKEY handle_type;
static handle_type GetInvalid() {
return NULL;
}
static void Close(handle_type h) {
::RegCloseKey(h);
}
static bool IsValid(handle_type h) {
return h != GetInvalid();
}
};
struct FindHandleTraits : CommonHandleTraits {
static void Close(handle_type h) {
::FindClose(h);
}
};
struct FileHandleTraits : CommonHandleTraits {};
typedef ScopedHandle<CommonHandleTraits> ScopedCommonHandle;
typedef ScopedHandle<FileHandleTraits> ScopedFileHandle;
typedef ScopedHandle<CryptContextTraits> ScopedCryptContext;
typedef ScopedHandle<RegTraits> ScopedRegHandle;
typedef ScopedHandle<FindHandleTraits> ScopedFindHandle;
typedef ScopedHandle<JobHandleTraits> ScopedJobHandle;
template <class T>
class SmallVectorImpl;
template <class T>
typename SmallVectorImpl<T>::const_pointer
c_str(SmallVectorImpl<T> &str) {
str.push_back(0);
str.pop_back();
return str.data();
}
namespace sys {
inline std::chrono::nanoseconds toDuration(FILETIME Time) {
ULARGE_INTEGER TimeInteger;
TimeInteger.LowPart = Time.dwLowDateTime;
TimeInteger.HighPart = Time.dwHighDateTime;
// FILETIME's are # of 100 nanosecond ticks (1/10th of a microsecond)
return std::chrono::nanoseconds(100 * TimeInteger.QuadPart);
}
inline TimePoint<> toTimePoint(FILETIME Time) {
ULARGE_INTEGER TimeInteger;
TimeInteger.LowPart = Time.dwLowDateTime;
TimeInteger.HighPart = Time.dwHighDateTime;
// Adjust for different epoch
TimeInteger.QuadPart -= 11644473600ll * 10000000;
// FILETIME's are # of 100 nanosecond ticks (1/10th of a microsecond)
return TimePoint<>(std::chrono::nanoseconds(100 * TimeInteger.QuadPart));
}
inline FILETIME toFILETIME(TimePoint<> TP) {
ULARGE_INTEGER TimeInteger;
TimeInteger.QuadPart = TP.time_since_epoch().count() / 100;
TimeInteger.QuadPart += 11644473600ll * 10000000;
FILETIME Time;
Time.dwLowDateTime = TimeInteger.LowPart;
Time.dwHighDateTime = TimeInteger.HighPart;
return Time;
}
namespace windows {
// Returns command line arguments. Unlike arguments given to main(),
// this function guarantees that the returned arguments are encoded in
// UTF-8 regardless of the current code page setting.
std::error_code GetCommandLineArguments(SmallVectorImpl<const char *> &Args,
BumpPtrAllocator &Alloc);
/// Convert UTF-8 path to a suitable UTF-16 path for use with the Win32 Unicode
/// File API.
std::error_code widenPath(const Twine &Path8, SmallVectorImpl<wchar_t> &Path16,
size_t MaxPathLen = MAX_PATH);
} // end namespace windows
} // end namespace sys
} // end namespace llvm.
#endif
PK hwFZ�.�W W Support/InitLLVM.hnu �[��� //===- InitLLVM.h -----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_INITLLVM_H
#define LLVM_SUPPORT_INITLLVM_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/PrettyStackTrace.h"
#include <optional>
// The main() functions in typical LLVM tools start with InitLLVM which does
// the following one-time initializations:
//
// 1. Setting up a signal handler so that pretty stack trace is printed out
// if a process crashes. A signal handler that exits when a failed write to
// a pipe occurs may optionally be installed: this is on-by-default.
//
// 2. Set up the global new-handler which is called when a memory allocation
// attempt fails.
//
// 3. If running on Windows, obtain command line arguments using a
// multibyte character-aware API and convert arguments into UTF-8
// encoding, so that you can assume that command line arguments are
// always encoded in UTF-8 on any platform.
//
// InitLLVM calls llvm_shutdown() on destruction, which cleans up
// ManagedStatic objects.
namespace llvm {
class InitLLVM {
public:
InitLLVM(int &Argc, const char **&Argv,
bool InstallPipeSignalExitHandler = true);
InitLLVM(int &Argc, char **&Argv, bool InstallPipeSignalExitHandler = true)
: InitLLVM(Argc, const_cast<const char **&>(Argv),
InstallPipeSignalExitHandler) {}
~InitLLVM();
private:
BumpPtrAllocator Alloc;
SmallVector<const char *, 0> Args;
std::optional<PrettyStackTraceProgram> StackPrinter;
};
} // namespace llvm
#endif
PK hwFZė[�NJ NJ Support/AMDGPUMetadata.hnu �[��� //===--- AMDGPUMetadata.h ---------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file
/// AMDGPU metadata definitions and in-memory representations.
///
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_AMDGPUMETADATA_H
#define LLVM_SUPPORT_AMDGPUMETADATA_H
#include "llvm/ADT/StringRef.h"
#include <cstdint>
#include <string>
#include <system_error>
#include <vector>
namespace llvm {
namespace AMDGPU {
//===----------------------------------------------------------------------===//
// HSA metadata.
//===----------------------------------------------------------------------===//
namespace HSAMD {
/// HSA metadata major version for code object V2.
constexpr uint32_t VersionMajorV2 = 1;
/// HSA metadata minor version for code object V2.
constexpr uint32_t VersionMinorV2 = 0;
/// HSA metadata major version for code object V3.
constexpr uint32_t VersionMajorV3 = 1;
/// HSA metadata minor version for code object V3.
constexpr uint32_t VersionMinorV3 = 0;
/// HSA metadata major version for code object V4.
constexpr uint32_t VersionMajorV4 = 1;
/// HSA metadata minor version for code object V4.
constexpr uint32_t VersionMinorV4 = 1;
/// HSA metadata major version for code object V5.
constexpr uint32_t VersionMajorV5 = 1;
/// HSA metadata minor version for code object V5.
constexpr uint32_t VersionMinorV5 = 2;
/// HSA metadata beginning assembler directive.
constexpr char AssemblerDirectiveBegin[] = ".amd_amdgpu_hsa_metadata";
/// HSA metadata ending assembler directive.
constexpr char AssemblerDirectiveEnd[] = ".end_amd_amdgpu_hsa_metadata";
/// Access qualifiers.
enum class AccessQualifier : uint8_t {
Default = 0,
ReadOnly = 1,
WriteOnly = 2,
ReadWrite = 3,
Unknown = 0xff
};
/// Address space qualifiers.
enum class AddressSpaceQualifier : uint8_t {
Private = 0,
Global = 1,
Constant = 2,
Local = 3,
Generic = 4,
Region = 5,
Unknown = 0xff
};
/// Value kinds.
enum class ValueKind : uint8_t {
ByValue = 0,
GlobalBuffer = 1,
DynamicSharedPointer = 2,
Sampler = 3,
Image = 4,
Pipe = 5,
Queue = 6,
HiddenGlobalOffsetX = 7,
HiddenGlobalOffsetY = 8,
HiddenGlobalOffsetZ = 9,
HiddenNone = 10,
HiddenPrintfBuffer = 11,
HiddenDefaultQueue = 12,
HiddenCompletionAction = 13,
HiddenMultiGridSyncArg = 14,
HiddenHostcallBuffer = 15,
Unknown = 0xff
};
/// Value types. This is deprecated and only remains for compatibility parsing
/// of old metadata.
enum class ValueType : uint8_t {
Struct = 0,
I8 = 1,
U8 = 2,
I16 = 3,
U16 = 4,
F16 = 5,
I32 = 6,
U32 = 7,
F32 = 8,
I64 = 9,
U64 = 10,
F64 = 11,
Unknown = 0xff
};
//===----------------------------------------------------------------------===//
// Kernel Metadata.
//===----------------------------------------------------------------------===//
namespace Kernel {
//===----------------------------------------------------------------------===//
// Kernel Attributes Metadata.
//===----------------------------------------------------------------------===//
namespace Attrs {
namespace Key {
/// Key for Kernel::Attr::Metadata::mReqdWorkGroupSize.
constexpr char ReqdWorkGroupSize[] = "ReqdWorkGroupSize";
/// Key for Kernel::Attr::Metadata::mWorkGroupSizeHint.
constexpr char WorkGroupSizeHint[] = "WorkGroupSizeHint";
/// Key for Kernel::Attr::Metadata::mVecTypeHint.
constexpr char VecTypeHint[] = "VecTypeHint";
/// Key for Kernel::Attr::Metadata::mRuntimeHandle.
constexpr char RuntimeHandle[] = "RuntimeHandle";
} // end namespace Key
/// In-memory representation of kernel attributes metadata.
struct Metadata final {
/// 'reqd_work_group_size' attribute. Optional.
std::vector<uint32_t> mReqdWorkGroupSize = std::vector<uint32_t>();
/// 'work_group_size_hint' attribute. Optional.
std::vector<uint32_t> mWorkGroupSizeHint = std::vector<uint32_t>();
/// 'vec_type_hint' attribute. Optional.
std::string mVecTypeHint = std::string();
/// External symbol created by runtime to store the kernel address
/// for enqueued blocks.
std::string mRuntimeHandle = std::string();
/// Default constructor.
Metadata() = default;
/// \returns True if kernel attributes metadata is empty, false otherwise.
bool empty() const {
return !notEmpty();
}
/// \returns True if kernel attributes metadata is not empty, false otherwise.
bool notEmpty() const {
return !mReqdWorkGroupSize.empty() || !mWorkGroupSizeHint.empty() ||
!mVecTypeHint.empty() || !mRuntimeHandle.empty();
}
};
} // end namespace Attrs
//===----------------------------------------------------------------------===//
// Kernel Argument Metadata.
//===----------------------------------------------------------------------===//
namespace Arg {
namespace Key {
/// Key for Kernel::Arg::Metadata::mName.
constexpr char Name[] = "Name";
/// Key for Kernel::Arg::Metadata::mTypeName.
constexpr char TypeName[] = "TypeName";
/// Key for Kernel::Arg::Metadata::mSize.
constexpr char Size[] = "Size";
/// Key for Kernel::Arg::Metadata::mOffset.
constexpr char Offset[] = "Offset";
/// Key for Kernel::Arg::Metadata::mAlign.
constexpr char Align[] = "Align";
/// Key for Kernel::Arg::Metadata::mValueKind.
constexpr char ValueKind[] = "ValueKind";
/// Key for Kernel::Arg::Metadata::mValueType. (deprecated)
constexpr char ValueType[] = "ValueType";
/// Key for Kernel::Arg::Metadata::mPointeeAlign.
constexpr char PointeeAlign[] = "PointeeAlign";
/// Key for Kernel::Arg::Metadata::mAddrSpaceQual.
constexpr char AddrSpaceQual[] = "AddrSpaceQual";
/// Key for Kernel::Arg::Metadata::mAccQual.
constexpr char AccQual[] = "AccQual";
/// Key for Kernel::Arg::Metadata::mActualAccQual.
constexpr char ActualAccQual[] = "ActualAccQual";
/// Key for Kernel::Arg::Metadata::mIsConst.
constexpr char IsConst[] = "IsConst";
/// Key for Kernel::Arg::Metadata::mIsRestrict.
constexpr char IsRestrict[] = "IsRestrict";
/// Key for Kernel::Arg::Metadata::mIsVolatile.
constexpr char IsVolatile[] = "IsVolatile";
/// Key for Kernel::Arg::Metadata::mIsPipe.
constexpr char IsPipe[] = "IsPipe";
} // end namespace Key
/// In-memory representation of kernel argument metadata.
struct Metadata final {
/// Name. Optional.
std::string mName = std::string();
/// Type name. Optional.
std::string mTypeName = std::string();
/// Size in bytes. Required.
uint32_t mSize = 0;
/// Offset in bytes. Required for code object v3, unused for code object v2.
uint32_t mOffset = 0;
/// Alignment in bytes. Required.
uint32_t mAlign = 0;
/// Value kind. Required.
ValueKind mValueKind = ValueKind::Unknown;
/// Pointee alignment in bytes. Optional.
uint32_t mPointeeAlign = 0;
/// Address space qualifier. Optional.
AddressSpaceQualifier mAddrSpaceQual = AddressSpaceQualifier::Unknown;
/// Access qualifier. Optional.
AccessQualifier mAccQual = AccessQualifier::Unknown;
/// Actual access qualifier. Optional.
AccessQualifier mActualAccQual = AccessQualifier::Unknown;
/// True if 'const' qualifier is specified. Optional.
bool mIsConst = false;
/// True if 'restrict' qualifier is specified. Optional.
bool mIsRestrict = false;
/// True if 'volatile' qualifier is specified. Optional.
bool mIsVolatile = false;
/// True if 'pipe' qualifier is specified. Optional.
bool mIsPipe = false;
/// Default constructor.
Metadata() = default;
};
} // end namespace Arg
//===----------------------------------------------------------------------===//
// Kernel Code Properties Metadata.
//===----------------------------------------------------------------------===//
namespace CodeProps {
namespace Key {
/// Key for Kernel::CodeProps::Metadata::mKernargSegmentSize.
constexpr char KernargSegmentSize[] = "KernargSegmentSize";
/// Key for Kernel::CodeProps::Metadata::mGroupSegmentFixedSize.
constexpr char GroupSegmentFixedSize[] = "GroupSegmentFixedSize";
/// Key for Kernel::CodeProps::Metadata::mPrivateSegmentFixedSize.
constexpr char PrivateSegmentFixedSize[] = "PrivateSegmentFixedSize";
/// Key for Kernel::CodeProps::Metadata::mKernargSegmentAlign.
constexpr char KernargSegmentAlign[] = "KernargSegmentAlign";
/// Key for Kernel::CodeProps::Metadata::mWavefrontSize.
constexpr char WavefrontSize[] = "WavefrontSize";
/// Key for Kernel::CodeProps::Metadata::mNumSGPRs.
constexpr char NumSGPRs[] = "NumSGPRs";
/// Key for Kernel::CodeProps::Metadata::mNumVGPRs.
constexpr char NumVGPRs[] = "NumVGPRs";
/// Key for Kernel::CodeProps::Metadata::mMaxFlatWorkGroupSize.
constexpr char MaxFlatWorkGroupSize[] = "MaxFlatWorkGroupSize";
/// Key for Kernel::CodeProps::Metadata::mIsDynamicCallStack.
constexpr char IsDynamicCallStack[] = "IsDynamicCallStack";
/// Key for Kernel::CodeProps::Metadata::mIsXNACKEnabled.
constexpr char IsXNACKEnabled[] = "IsXNACKEnabled";
/// Key for Kernel::CodeProps::Metadata::mNumSpilledSGPRs.
constexpr char NumSpilledSGPRs[] = "NumSpilledSGPRs";
/// Key for Kernel::CodeProps::Metadata::mNumSpilledVGPRs.
constexpr char NumSpilledVGPRs[] = "NumSpilledVGPRs";
} // end namespace Key
/// In-memory representation of kernel code properties metadata.
struct Metadata final {
/// Size in bytes of the kernarg segment memory. Kernarg segment memory
/// holds the values of the arguments to the kernel. Required.
uint64_t mKernargSegmentSize = 0;
/// Size in bytes of the group segment memory required by a workgroup.
/// This value does not include any dynamically allocated group segment memory
/// that may be added when the kernel is dispatched. Required.
uint32_t mGroupSegmentFixedSize = 0;
/// Size in bytes of the private segment memory required by a workitem.
/// Private segment memory includes arg, spill and private segments. Required.
uint32_t mPrivateSegmentFixedSize = 0;
/// Maximum byte alignment of variables used by the kernel in the
/// kernarg memory segment. Required.
uint32_t mKernargSegmentAlign = 0;
/// Wavefront size. Required.
uint32_t mWavefrontSize = 0;
/// Total number of SGPRs used by a wavefront. Optional.
uint16_t mNumSGPRs = 0;
/// Total number of VGPRs used by a workitem. Optional.
uint16_t mNumVGPRs = 0;
/// Maximum flat work-group size supported by the kernel. Optional.
uint32_t mMaxFlatWorkGroupSize = 0;
/// True if the generated machine code is using a dynamically sized
/// call stack. Optional.
bool mIsDynamicCallStack = false;
/// True if the generated machine code is capable of supporting XNACK.
/// Optional.
bool mIsXNACKEnabled = false;
/// Number of SGPRs spilled by a wavefront. Optional.
uint16_t mNumSpilledSGPRs = 0;
/// Number of VGPRs spilled by a workitem. Optional.
uint16_t mNumSpilledVGPRs = 0;
/// Default constructor.
Metadata() = default;
/// \returns True if kernel code properties metadata is empty, false
/// otherwise.
bool empty() const {
return !notEmpty();
}
/// \returns True if kernel code properties metadata is not empty, false
/// otherwise.
bool notEmpty() const {
return true;
}
};
} // end namespace CodeProps
//===----------------------------------------------------------------------===//
// Kernel Debug Properties Metadata.
//===----------------------------------------------------------------------===//
namespace DebugProps {
namespace Key {
/// Key for Kernel::DebugProps::Metadata::mDebuggerABIVersion.
constexpr char DebuggerABIVersion[] = "DebuggerABIVersion";
/// Key for Kernel::DebugProps::Metadata::mReservedNumVGPRs.
constexpr char ReservedNumVGPRs[] = "ReservedNumVGPRs";
/// Key for Kernel::DebugProps::Metadata::mReservedFirstVGPR.
constexpr char ReservedFirstVGPR[] = "ReservedFirstVGPR";
/// Key for Kernel::DebugProps::Metadata::mPrivateSegmentBufferSGPR.
constexpr char PrivateSegmentBufferSGPR[] = "PrivateSegmentBufferSGPR";
/// Key for
/// Kernel::DebugProps::Metadata::mWavefrontPrivateSegmentOffsetSGPR.
constexpr char WavefrontPrivateSegmentOffsetSGPR[] =
"WavefrontPrivateSegmentOffsetSGPR";
} // end namespace Key
/// In-memory representation of kernel debug properties metadata.
struct Metadata final {
/// Debugger ABI version. Optional.
std::vector<uint32_t> mDebuggerABIVersion = std::vector<uint32_t>();
/// Consecutive number of VGPRs reserved for debugger use. Must be 0 if
/// mDebuggerABIVersion is not set. Optional.
uint16_t mReservedNumVGPRs = 0;
/// First fixed VGPR reserved. Must be uint16_t(-1) if
/// mDebuggerABIVersion is not set or mReservedFirstVGPR is 0. Optional.
uint16_t mReservedFirstVGPR = uint16_t(-1);
/// Fixed SGPR of the first of 4 SGPRs used to hold the scratch V# used
/// for the entire kernel execution. Must be uint16_t(-1) if
/// mDebuggerABIVersion is not set or SGPR not used or not known. Optional.
uint16_t mPrivateSegmentBufferSGPR = uint16_t(-1);
/// Fixed SGPR used to hold the wave scratch offset for the entire
/// kernel execution. Must be uint16_t(-1) if mDebuggerABIVersion is not set
/// or SGPR is not used or not known. Optional.
uint16_t mWavefrontPrivateSegmentOffsetSGPR = uint16_t(-1);
/// Default constructor.
Metadata() = default;
/// \returns True if kernel debug properties metadata is empty, false
/// otherwise.
bool empty() const {
return !notEmpty();
}
/// \returns True if kernel debug properties metadata is not empty, false
/// otherwise.
bool notEmpty() const {
return !mDebuggerABIVersion.empty();
}
};
} // end namespace DebugProps
namespace Key {
/// Key for Kernel::Metadata::mName.
constexpr char Name[] = "Name";
/// Key for Kernel::Metadata::mSymbolName.
constexpr char SymbolName[] = "SymbolName";
/// Key for Kernel::Metadata::mLanguage.
constexpr char Language[] = "Language";
/// Key for Kernel::Metadata::mLanguageVersion.
constexpr char LanguageVersion[] = "LanguageVersion";
/// Key for Kernel::Metadata::mAttrs.
constexpr char Attrs[] = "Attrs";
/// Key for Kernel::Metadata::mArgs.
constexpr char Args[] = "Args";
/// Key for Kernel::Metadata::mCodeProps.
constexpr char CodeProps[] = "CodeProps";
/// Key for Kernel::Metadata::mDebugProps.
constexpr char DebugProps[] = "DebugProps";
} // end namespace Key
/// In-memory representation of kernel metadata.
struct Metadata final {
/// Kernel source name. Required.
std::string mName = std::string();
/// Kernel descriptor name. Required.
std::string mSymbolName = std::string();
/// Language. Optional.
std::string mLanguage = std::string();
/// Language version. Optional.
std::vector<uint32_t> mLanguageVersion = std::vector<uint32_t>();
/// Attributes metadata. Optional.
Attrs::Metadata mAttrs = Attrs::Metadata();
/// Arguments metadata. Optional.
std::vector<Arg::Metadata> mArgs = std::vector<Arg::Metadata>();
/// Code properties metadata. Optional.
CodeProps::Metadata mCodeProps = CodeProps::Metadata();
/// Debug properties metadata. Optional.
DebugProps::Metadata mDebugProps = DebugProps::Metadata();
/// Default constructor.
Metadata() = default;
};
} // end namespace Kernel
namespace Key {
/// Key for HSA::Metadata::mVersion.
constexpr char Version[] = "Version";
/// Key for HSA::Metadata::mPrintf.
constexpr char Printf[] = "Printf";
/// Key for HSA::Metadata::mKernels.
constexpr char Kernels[] = "Kernels";
} // end namespace Key
/// In-memory representation of HSA metadata.
struct Metadata final {
/// HSA metadata version. Required.
std::vector<uint32_t> mVersion = std::vector<uint32_t>();
/// Printf metadata. Optional.
std::vector<std::string> mPrintf = std::vector<std::string>();
/// Kernels metadata. Required.
std::vector<Kernel::Metadata> mKernels = std::vector<Kernel::Metadata>();
/// Default constructor.
Metadata() = default;
};
/// Converts \p String to \p HSAMetadata.
std::error_code fromString(StringRef String, Metadata &HSAMetadata);
/// Converts \p HSAMetadata to \p String.
std::error_code toString(Metadata HSAMetadata, std::string &String);
//===----------------------------------------------------------------------===//
// HSA metadata for v3 code object.
//===----------------------------------------------------------------------===//
namespace V3 {
/// HSA metadata major version.
constexpr uint32_t VersionMajor = 1;
/// HSA metadata minor version.
constexpr uint32_t VersionMinor = 0;
/// HSA metadata beginning assembler directive.
constexpr char AssemblerDirectiveBegin[] = ".amdgpu_metadata";
/// HSA metadata ending assembler directive.
constexpr char AssemblerDirectiveEnd[] = ".end_amdgpu_metadata";
} // end namespace V3
} // end namespace HSAMD
//===----------------------------------------------------------------------===//
// PAL metadata.
//===----------------------------------------------------------------------===//
namespace PALMD {
/// PAL metadata (old linear format) assembler directive.
constexpr char AssemblerDirective[] = ".amd_amdgpu_pal_metadata";
/// PAL metadata (new MsgPack format) beginning assembler directive.
constexpr char AssemblerDirectiveBegin[] = ".amdgpu_pal_metadata";
/// PAL metadata (new MsgPack format) ending assembler directive.
constexpr char AssemblerDirectiveEnd[] = ".end_amdgpu_pal_metadata";
/// PAL metadata keys.
enum Key : uint32_t {
R_2E12_COMPUTE_PGM_RSRC1 = 0x2e12,
R_2D4A_SPI_SHADER_PGM_RSRC1_LS = 0x2d4a,
R_2D0A_SPI_SHADER_PGM_RSRC1_HS = 0x2d0a,
R_2CCA_SPI_SHADER_PGM_RSRC1_ES = 0x2cca,
R_2C8A_SPI_SHADER_PGM_RSRC1_GS = 0x2c8a,
R_2C4A_SPI_SHADER_PGM_RSRC1_VS = 0x2c4a,
R_2C0A_SPI_SHADER_PGM_RSRC1_PS = 0x2c0a,
R_2E00_COMPUTE_DISPATCH_INITIATOR = 0x2e00,
R_A1B3_SPI_PS_INPUT_ENA = 0xa1b3,
R_A1B4_SPI_PS_INPUT_ADDR = 0xa1b4,
R_A1B6_SPI_PS_IN_CONTROL = 0xa1b6,
R_A2D5_VGT_SHADER_STAGES_EN = 0xa2d5,
LS_NUM_USED_VGPRS = 0x10000021,
HS_NUM_USED_VGPRS = 0x10000022,
ES_NUM_USED_VGPRS = 0x10000023,
GS_NUM_USED_VGPRS = 0x10000024,
VS_NUM_USED_VGPRS = 0x10000025,
PS_NUM_USED_VGPRS = 0x10000026,
CS_NUM_USED_VGPRS = 0x10000027,
LS_NUM_USED_SGPRS = 0x10000028,
HS_NUM_USED_SGPRS = 0x10000029,
ES_NUM_USED_SGPRS = 0x1000002a,
GS_NUM_USED_SGPRS = 0x1000002b,
VS_NUM_USED_SGPRS = 0x1000002c,
PS_NUM_USED_SGPRS = 0x1000002d,
CS_NUM_USED_SGPRS = 0x1000002e,
LS_SCRATCH_SIZE = 0x10000044,
HS_SCRATCH_SIZE = 0x10000045,
ES_SCRATCH_SIZE = 0x10000046,
GS_SCRATCH_SIZE = 0x10000047,
VS_SCRATCH_SIZE = 0x10000048,
PS_SCRATCH_SIZE = 0x10000049,
CS_SCRATCH_SIZE = 0x1000004a
};
} // end namespace PALMD
} // end namespace AMDGPU
} // end namespace llvm
#endif // LLVM_SUPPORT_AMDGPUMETADATA_H
PK hwFZ���/� � Support/SuffixTreeNode.hnu �[��� //===- llvm/ADT/SuffixTreeNode.h - Nodes for SuffixTrees --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines nodes for use within a SuffixTree.
//
// Each node has either no children or at least two children, with the root
// being a exception in the empty tree.
//
// Children are represented as a map between unsigned integers and nodes. If
// a node N has a child M on unsigned integer k, then the mapping represented
// by N is a proper prefix of the mapping represented by M. Note that this,
// although similar to a trie is somewhat different: each node stores a full
// substring of the full mapping rather than a single character state.
//
// Each internal node contains a pointer to the internal node representing
// the same string, but with the first character chopped off. This is stored
// in \p Link. Each leaf node stores the start index of its respective
// suffix in \p SuffixIdx.
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_SUFFIXTREE_NODE_H
#define LLVM_SUPPORT_SUFFIXTREE_NODE_H
#include "llvm/ADT/DenseMap.h"
namespace llvm {
/// A node in a suffix tree which represents a substring or suffix.
struct SuffixTreeNode {
public:
/// Represents an undefined index in the suffix tree.
static const unsigned EmptyIdx = -1;
enum class NodeKind { ST_Leaf, ST_Internal };
private:
const NodeKind Kind;
/// The start index of this node's substring in the main string.
unsigned StartIdx = EmptyIdx;
/// The length of the string formed by concatenating the edge labels from
/// the root to this node.
unsigned ConcatLen = 0;
public:
// LLVM RTTI boilerplate.
NodeKind getKind() const { return Kind; }
/// \return the start index of this node's substring in the entire string.
unsigned getStartIdx() const;
/// \returns the end index of this node.
virtual unsigned getEndIdx() const = 0;
/// Advance this node's StartIdx by \p Inc.
void incrementStartIdx(unsigned Inc);
/// Set the length of the string from the root to this node to \p Len.
void setConcatLen(unsigned Len);
/// \returns the length of the string from the root to this node.
unsigned getConcatLen() const;
SuffixTreeNode(NodeKind Kind, unsigned StartIdx)
: Kind(Kind), StartIdx(StartIdx) {}
virtual ~SuffixTreeNode() = default;
};
// A node with two or more children, or the root.
struct SuffixTreeInternalNode : SuffixTreeNode {
private:
/// The end index of this node's substring in the main string.
///
/// Every leaf node must have its \p EndIdx incremented at the end of every
/// step in the construction algorithm. To avoid having to update O(N)
/// nodes individually at the end of every step, the end index is stored
/// as a pointer.
unsigned EndIdx = EmptyIdx;
/// A pointer to the internal node representing the same sequence with the
/// first character chopped off.
///
/// This acts as a shortcut in Ukkonen's algorithm. One of the things that
/// Ukkonen's algorithm does to achieve linear-time construction is
/// keep track of which node the next insert should be at. This makes each
/// insert O(1), and there are a total of O(N) inserts. The suffix link
/// helps with inserting children of internal nodes.
///
/// Say we add a child to an internal node with associated mapping S. The
/// next insertion must be at the node representing S - its first character.
/// This is given by the way that we iteratively build the tree in Ukkonen's
/// algorithm. The main idea is to look at the suffixes of each prefix in the
/// string, starting with the longest suffix of the prefix, and ending with
/// the shortest. Therefore, if we keep pointers between such nodes, we can
/// move to the next insertion point in O(1) time. If we don't, then we'd
/// have to query from the root, which takes O(N) time. This would make the
/// construction algorithm O(N^2) rather than O(N).
SuffixTreeInternalNode *Link = nullptr;
public:
// LLVM RTTI boilerplate.
static bool classof(const SuffixTreeNode *N) {
return N->getKind() == NodeKind::ST_Internal;
}
/// \returns true if this node is the root of its owning \p SuffixTree.
bool isRoot() const;
/// \returns the end index of this node's substring in the entire string.
unsigned getEndIdx() const override;
/// Sets \p Link to \p L. Assumes \p L is not null.
void setLink(SuffixTreeInternalNode *L);
/// \returns the pointer to the Link node.
SuffixTreeInternalNode *getLink() const;
/// The children of this node.
///
/// A child existing on an unsigned integer implies that from the mapping
/// represented by the current node, there is a way to reach another
/// mapping by tacking that character on the end of the current string.
DenseMap<unsigned, SuffixTreeNode *> Children;
SuffixTreeInternalNode(unsigned StartIdx, unsigned EndIdx,
SuffixTreeInternalNode *Link)
: SuffixTreeNode(NodeKind::ST_Internal, StartIdx), EndIdx(EndIdx),
Link(Link) {}
virtual ~SuffixTreeInternalNode() = default;
};
// A node representing a suffix.
struct SuffixTreeLeafNode : SuffixTreeNode {
private:
/// The start index of the suffix represented by this leaf.
unsigned SuffixIdx = EmptyIdx;
/// The end index of this node's substring in the main string.
///
/// Every leaf node must have its \p EndIdx incremented at the end of every
/// step in the construction algorithm. To avoid having to update O(N)
/// nodes individually at the end of every step, the end index is stored
/// as a pointer.
unsigned *EndIdx = nullptr;
public:
// LLVM RTTI boilerplate.
static bool classof(const SuffixTreeNode *N) {
return N->getKind() == NodeKind::ST_Leaf;
}
/// \returns the end index of this node's substring in the entire string.
unsigned getEndIdx() const override;
/// \returns the start index of the suffix represented by this leaf.
unsigned getSuffixIdx() const;
/// Sets the start index of the suffix represented by this leaf to \p Idx.
void setSuffixIdx(unsigned Idx);
SuffixTreeLeafNode(unsigned StartIdx, unsigned *EndIdx)
: SuffixTreeNode(NodeKind::ST_Leaf, StartIdx), EndIdx(EndIdx) {}
virtual ~SuffixTreeLeafNode() = default;
};
} // namespace llvm
#endif // LLVM_SUPPORT_SUFFIXTREE_NODE_HPK hwFZ'��q$< $< Support/HashBuilder.hnu �[��� //===- llvm/Support/HashBuilder.h - Convenient hashing interface-*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements an interface allowing to conveniently build hashes of
// various data types, without relying on the underlying hasher type to know
// about hashed data types.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_HASHBUILDER_H
#define LLVM_SUPPORT_HASHBUILDER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/Hashing.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/type_traits.h"
#include <iterator>
#include <optional>
#include <utility>
namespace llvm {
namespace hashbuilder_detail {
/// Trait to indicate whether a type's bits can be hashed directly (after
/// endianness correction).
template <typename U>
struct IsHashableData
: std::integral_constant<bool, is_integral_or_enum<U>::value> {};
} // namespace hashbuilder_detail
/// Declares the hasher member, and functions forwarding directly to the hasher.
template <typename HasherT> class HashBuilderBase {
public:
template <typename HasherT_ = HasherT>
using HashResultTy = decltype(std::declval<HasherT_ &>().final());
HasherT &getHasher() { return Hasher; }
/// Forward to `HasherT::update(ArrayRef<uint8_t>)`.
///
/// This may not take the size of `Data` into account.
/// Users of this function should pay attention to respect endianness
/// contraints.
void update(ArrayRef<uint8_t> Data) { this->getHasher().update(Data); }
/// Forward to `HasherT::update(ArrayRef<uint8_t>)`.
///
/// This may not take the size of `Data` into account.
/// Users of this function should pay attention to respect endianness
/// contraints.
void update(StringRef Data) {
update(
ArrayRef(reinterpret_cast<const uint8_t *>(Data.data()), Data.size()));
}
/// Forward to `HasherT::final()` if available.
template <typename HasherT_ = HasherT> HashResultTy<HasherT_> final() {
return this->getHasher().final();
}
/// Forward to `HasherT::result()` if available.
template <typename HasherT_ = HasherT> HashResultTy<HasherT_> result() {
return this->getHasher().result();
}
protected:
explicit HashBuilderBase(HasherT &Hasher) : Hasher(Hasher) {}
template <typename... ArgTypes>
explicit HashBuilderBase(ArgTypes &&...Args)
: OptionalHasher(std::in_place, std::forward<ArgTypes>(Args)...),
Hasher(*OptionalHasher) {}
private:
std::optional<HasherT> OptionalHasher;
HasherT &Hasher;
};
/// Implementation of the `HashBuilder` interface.
///
/// `support::endianness::native` is not supported. `HashBuilder` is
/// expected to canonicalize `support::endianness::native` to one of
/// `support::endianness::big` or `support::endianness::little`.
template <typename HasherT, support::endianness Endianness>
class HashBuilderImpl : public HashBuilderBase<HasherT> {
static_assert(Endianness != support::endianness::native,
"HashBuilder should canonicalize endianness");
public:
explicit HashBuilderImpl(HasherT &Hasher)
: HashBuilderBase<HasherT>(Hasher) {}
template <typename... ArgTypes>
explicit HashBuilderImpl(ArgTypes &&...Args)
: HashBuilderBase<HasherT>(Args...) {}
/// Implement hashing for hashable data types, e.g. integral or enum values.
template <typename T>
std::enable_if_t<hashbuilder_detail::IsHashableData<T>::value,
HashBuilderImpl &>
add(T Value) {
return adjustForEndiannessAndAdd(Value);
}
/// Support hashing `ArrayRef`.
///
/// `Value.size()` is taken into account to ensure cases like
/// ```
/// builder.add({1});
/// builder.add({2, 3});
/// ```
/// and
/// ```
/// builder.add({1, 2});
/// builder.add({3});
/// ```
/// do not collide.
template <typename T> HashBuilderImpl &add(ArrayRef<T> Value) {
// As of implementation time, simply calling `addRange(Value)` would also go
// through the `update` fast path. But that would rely on the implementation
// details of `ArrayRef::begin()` and `ArrayRef::end()`. Explicitly call
// `update` to guarantee the fast path.
add(Value.size());
if (hashbuilder_detail::IsHashableData<T>::value &&
Endianness == support::endian::system_endianness()) {
this->update(ArrayRef(reinterpret_cast<const uint8_t *>(Value.begin()),
Value.size() * sizeof(T)));
} else {
for (auto &V : Value)
add(V);
}
return *this;
}
/// Support hashing `StringRef`.
///
/// `Value.size()` is taken into account to ensure cases like
/// ```
/// builder.add("a");
/// builder.add("bc");
/// ```
/// and
/// ```
/// builder.add("ab");
/// builder.add("c");
/// ```
/// do not collide.
HashBuilderImpl &add(StringRef Value) {
// As of implementation time, simply calling `addRange(Value)` would also go
// through `update`. But that would rely on the implementation of
// `StringRef::begin()` and `StringRef::end()`. Explicitly call `update` to
// guarantee the fast path.
add(Value.size());
this->update(ArrayRef(reinterpret_cast<const uint8_t *>(Value.begin()),
Value.size()));
return *this;
}
template <typename T>
using HasAddHashT =
decltype(addHash(std::declval<HashBuilderImpl &>(), std::declval<T &>()));
/// Implement hashing for user-defined `struct`s.
///
/// Any user-define `struct` can participate in hashing via `HashBuilder` by
/// providing a `addHash` templated function.
///
/// ```
/// template <typename HasherT, support::endianness Endianness>
/// void addHash(HashBuilder<HasherT, Endianness> &HBuilder,
/// const UserDefinedStruct &Value);
/// ```
///
/// For example:
/// ```
/// struct SimpleStruct {
/// char c;
/// int i;
/// };
///
/// template <typename HasherT, support::endianness Endianness>
/// void addHash(HashBuilderImpl<HasherT, Endianness> &HBuilder,
/// const SimpleStruct &Value) {
/// HBuilder.add(Value.c);
/// HBuilder.add(Value.i);
/// }
/// ```
///
/// To avoid endianness issues, specializations of `addHash` should
/// generally rely on exising `add`, `addRange`, and `addRangeElements`
/// functions. If directly using `update`, an implementation must correctly
/// handle endianness.
///
/// ```
/// struct __attribute__ ((packed)) StructWithFastHash {
/// int I;
/// char C;
///
/// // If possible, we want to hash both `I` and `C` in a single
/// // `update` call for performance concerns.
/// template <typename HasherT, support::endianness Endianness>
/// friend void addHash(HashBuilderImpl<HasherT, Endianness> &HBuilder,
/// const StructWithFastHash &Value) {
/// if (Endianness == support::endian::system_endianness()) {
/// HBuilder.update(ArrayRef(
/// reinterpret_cast<const uint8_t *>(&Value), sizeof(Value)));
/// } else {
/// // Rely on existing `add` methods to handle endianness.
/// HBuilder.add(Value.I);
/// HBuilder.add(Value.C);
/// }
/// }
/// };
/// ```
///
/// To avoid collisions, specialization of `addHash` for variable-size
/// types must take the size into account.
///
/// For example:
/// ```
/// struct CustomContainer {
/// private:
/// size_t Size;
/// int Elements[100];
///
/// public:
/// CustomContainer(size_t Size) : Size(Size) {
/// for (size_t I = 0; I != Size; ++I)
/// Elements[I] = I;
/// }
/// template <typename HasherT, support::endianness Endianness>
/// friend void addHash(HashBuilderImpl<HasherT, Endianness> &HBuilder,
/// const CustomContainer &Value) {
/// if (Endianness == support::endian::system_endianness()) {
/// HBuilder.update(ArrayRef(
/// reinterpret_cast<const uint8_t *>(&Value.Size),
/// sizeof(Value.Size) + Value.Size * sizeof(Value.Elements[0])));
/// } else {
/// // `addRange` will take care of encoding the size.
/// HBuilder.addRange(&Value.Elements[0], &Value.Elements[0] +
/// Value.Size);
/// }
/// }
/// };
/// ```
template <typename T>
std::enable_if_t<is_detected<HasAddHashT, T>::value &&
!hashbuilder_detail::IsHashableData<T>::value,
HashBuilderImpl &>
add(const T &Value) {
addHash(*this, Value);
return *this;
}
template <typename T1, typename T2>
HashBuilderImpl &add(const std::pair<T1, T2> &Value) {
return add(Value.first, Value.second);
}
template <typename... Ts> HashBuilderImpl &add(const std::tuple<Ts...> &Arg) {
std::apply([this](const auto &...Args) { this->add(Args...); }, Arg);
return *this;
}
/// A convenenience variadic helper.
/// It simply iterates over its arguments, in order.
/// ```
/// add(Arg1, Arg2);
/// ```
/// is equivalent to
/// ```
/// add(Arg1)
/// add(Arg2)
/// ```
template <typename... Ts>
std::enable_if_t<(sizeof...(Ts) > 1), HashBuilderImpl &>
add(const Ts &...Args) {
return (add(Args), ...);
}
template <typename ForwardIteratorT>
HashBuilderImpl &addRange(ForwardIteratorT First, ForwardIteratorT Last) {
add(std::distance(First, Last));
return addRangeElements(First, Last);
}
template <typename RangeT> HashBuilderImpl &addRange(const RangeT &Range) {
return addRange(adl_begin(Range), adl_end(Range));
}
template <typename ForwardIteratorT>
HashBuilderImpl &addRangeElements(ForwardIteratorT First,
ForwardIteratorT Last) {
return addRangeElementsImpl(
First, Last,
typename std::iterator_traits<ForwardIteratorT>::iterator_category());
}
template <typename RangeT>
HashBuilderImpl &addRangeElements(const RangeT &Range) {
return addRangeElements(adl_begin(Range), adl_end(Range));
}
template <typename T>
using HasByteSwapT = decltype(support::endian::byte_swap(
std::declval<T &>(), support::endianness::little));
/// Adjust `Value` for the target endianness and add it to the hash.
template <typename T>
std::enable_if_t<is_detected<HasByteSwapT, T>::value, HashBuilderImpl &>
adjustForEndiannessAndAdd(const T &Value) {
T SwappedValue = support::endian::byte_swap(Value, Endianness);
this->update(ArrayRef(reinterpret_cast<const uint8_t *>(&SwappedValue),
sizeof(SwappedValue)));
return *this;
}
private:
// FIXME: Once available, specialize this function for `contiguous_iterator`s,
// and use it for `ArrayRef` and `StringRef`.
template <typename ForwardIteratorT>
HashBuilderImpl &addRangeElementsImpl(ForwardIteratorT First,
ForwardIteratorT Last,
std::forward_iterator_tag) {
for (auto It = First; It != Last; ++It)
add(*It);
return *this;
}
template <typename T>
std::enable_if_t<hashbuilder_detail::IsHashableData<T>::value &&
Endianness == support::endian::system_endianness(),
HashBuilderImpl &>
addRangeElementsImpl(T *First, T *Last, std::forward_iterator_tag) {
this->update(ArrayRef(reinterpret_cast<const uint8_t *>(First),
(Last - First) * sizeof(T)));
return *this;
}
};
/// Interface to help hash various types through a hasher type.
///
/// Via provided specializations of `add`, `addRange`, and `addRangeElements`
/// functions, various types (e.g. `ArrayRef`, `StringRef`, etc.) can be hashed
/// without requiring any knowledge of hashed types from the hasher type.
///
/// The only method expected from the templated hasher type `HasherT` is:
/// * void update(ArrayRef<uint8_t> Data)
///
/// Additionally, the following methods will be forwarded to the hasher type:
/// * decltype(std::declval<HasherT &>().final()) final()
/// * decltype(std::declval<HasherT &>().result()) result()
///
/// From a user point of view, the interface provides the following:
/// * `template<typename T> add(const T &Value)`
/// The `add` function implements hashing of various types.
/// * `template <typename ItT> void addRange(ItT First, ItT Last)`
/// The `addRange` function is designed to aid hashing a range of values.
/// It explicitly adds the size of the range in the hash.
/// * `template <typename ItT> void addRangeElements(ItT First, ItT Last)`
/// The `addRangeElements` function is also designed to aid hashing a range of
/// values. In contrast to `addRange`, it **ignores** the size of the range,
/// behaving as if elements were added one at a time with `add`.
///
/// User-defined `struct` types can participate in this interface by providing
/// an `addHash` templated function. See the associated template specialization
/// for details.
///
/// This interface does not impose requirements on the hasher
/// `update(ArrayRef<uint8_t> Data)` method. We want to avoid collisions for
/// variable-size types; for example for
/// ```
/// builder.add({1});
/// builder.add({2, 3});
/// ```
/// and
/// ```
/// builder.add({1, 2});
/// builder.add({3});
/// ```
/// . Thus, specializations of `add` and `addHash` for variable-size types must
/// not assume that the hasher type considers the size as part of the hash; they
/// must explicitly add the size to the hash. See for example specializations
/// for `ArrayRef` and `StringRef`.
///
/// Additionally, since types are eventually forwarded to the hasher's
/// `void update(ArrayRef<uint8_t>)` method, endianness plays a role in the hash
/// computation (for example when computing `add((int)123)`).
/// Specifiying a non-`native` `Endianness` template parameter allows to compute
/// stable hash across platforms with different endianness.
template <class HasherT, support::endianness Endianness>
using HashBuilder =
HashBuilderImpl<HasherT, (Endianness == support::endianness::native
? support::endian::system_endianness()
: Endianness)>;
namespace hashbuilder_detail {
class HashCodeHasher {
public:
HashCodeHasher() : Code(0) {}
void update(ArrayRef<uint8_t> Data) {
hash_code DataCode = hash_value(Data);
Code = hash_combine(Code, DataCode);
}
hash_code Code;
};
using HashCodeHashBuilder = HashBuilder<hashbuilder_detail::HashCodeHasher,
support::endianness::native>;
} // namespace hashbuilder_detail
/// Provide a default implementation of `hash_value` when `addHash(const T &)`
/// is supported.
template <typename T>
std::enable_if_t<
is_detected<hashbuilder_detail::HashCodeHashBuilder::HasAddHashT, T>::value,
hash_code>
hash_value(const T &Value) {
hashbuilder_detail::HashCodeHashBuilder HBuilder;
HBuilder.add(Value);
return HBuilder.getHasher().Code;
}
} // end namespace llvm
#endif // LLVM_SUPPORT_HASHBUILDER_H
PK hwFZ PECV V Support/Duration.hnu �[��� //===--- Duration.h - wrapper around std::chrono::Duration ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// The sole purpose of this file is to avoid the dependency on <chrono> in
// raw_ostream.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_DURATION_H
#define LLVM_SUPPORT_DURATION_H
#include <chrono>
namespace llvm {
class Duration {
std::chrono::milliseconds Value;
public:
Duration(std::chrono::milliseconds Value) : Value(Value) {}
std::chrono::milliseconds getDuration() const { return Value; }
};
}
#endif
PK hwFZ`��� � Support/Base64.hnu �[��� //===--- Base64.h - Base64 Encoder/Decoder ----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides generic base64 encoder/decoder.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_BASE64_H
#define LLVM_SUPPORT_BASE64_H
#include "llvm/Support/Error.h"
#include <cstdint>
#include <string>
#include <vector>
namespace llvm {
template <class InputBytes> std::string encodeBase64(InputBytes const &Bytes) {
static const char Table[] = "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
"abcdefghijklmnopqrstuvwxyz"
"0123456789+/";
std::string Buffer;
Buffer.resize(((Bytes.size() + 2) / 3) * 4);
size_t i = 0, j = 0;
for (size_t n = Bytes.size() / 3 * 3; i < n; i += 3, j += 4) {
uint32_t x = ((unsigned char)Bytes[i] << 16) |
((unsigned char)Bytes[i + 1] << 8) |
(unsigned char)Bytes[i + 2];
Buffer[j + 0] = Table[(x >> 18) & 63];
Buffer[j + 1] = Table[(x >> 12) & 63];
Buffer[j + 2] = Table[(x >> 6) & 63];
Buffer[j + 3] = Table[x & 63];
}
if (i + 1 == Bytes.size()) {
uint32_t x = ((unsigned char)Bytes[i] << 16);
Buffer[j + 0] = Table[(x >> 18) & 63];
Buffer[j + 1] = Table[(x >> 12) & 63];
Buffer[j + 2] = '=';
Buffer[j + 3] = '=';
} else if (i + 2 == Bytes.size()) {
uint32_t x =
((unsigned char)Bytes[i] << 16) | ((unsigned char)Bytes[i + 1] << 8);
Buffer[j + 0] = Table[(x >> 18) & 63];
Buffer[j + 1] = Table[(x >> 12) & 63];
Buffer[j + 2] = Table[(x >> 6) & 63];
Buffer[j + 3] = '=';
}
return Buffer;
}
llvm::Error decodeBase64(llvm::StringRef Input, std::vector<char> &Output);
} // end namespace llvm
#endif
PK hwFZ� �0�& �& Support/Automaton.hnu �[��� //===-- Automaton.h - Support for driving TableGen-produced DFAs ----------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements class that drive and introspect deterministic finite-
// state automata (DFAs) as generated by TableGen's -gen-automata backend.
//
// For a description of how to define an automaton, see
// include/llvm/TableGen/Automaton.td.
//
// One important detail is that these deterministic automata are created from
// (potentially) nondeterministic definitions. Therefore a unique sequence of
// input symbols will produce one path through the DFA but multiple paths
// through the original NFA. An automaton by default only returns "accepted" or
// "not accepted", but frequently we want to analyze what NFA path was taken.
// Finding a path through the NFA states that results in a DFA state can help
// answer *what* the solution to a problem was, not just that there exists a
// solution.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_AUTOMATON_H
#define LLVM_SUPPORT_AUTOMATON_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/Allocator.h"
#include <deque>
#include <map>
#include <memory>
#include <unordered_map>
#include <vector>
namespace llvm {
using NfaPath = SmallVector<uint64_t, 4>;
/// Forward define the pair type used by the automata transition info tables.
///
/// Experimental results with large tables have shown a significant (multiple
/// orders of magnitude) parsing speedup by using a custom struct here with a
/// trivial constructor rather than std::pair<uint64_t, uint64_t>.
struct NfaStatePair {
uint64_t FromDfaState, ToDfaState;
bool operator<(const NfaStatePair &Other) const {
return std::make_tuple(FromDfaState, ToDfaState) <
std::make_tuple(Other.FromDfaState, Other.ToDfaState);
}
};
namespace internal {
/// The internal class that maintains all possible paths through an NFA based
/// on a path through the DFA.
class NfaTranscriber {
private:
/// Cached transition table. This is a table of NfaStatePairs that contains
/// zero-terminated sequences pointed to by DFA transitions.
ArrayRef<NfaStatePair> TransitionInfo;
/// A simple linked-list of traversed states that can have a shared tail. The
/// traversed path is stored in reverse order with the latest state as the
/// head.
struct PathSegment {
uint64_t State;
PathSegment *Tail;
};
/// We allocate segment objects frequently. Allocate them upfront and dispose
/// at the end of a traversal rather than hammering the system allocator.
SpecificBumpPtrAllocator<PathSegment> Allocator;
/// Heads of each tracked path. These are not ordered.
std::deque<PathSegment *> Heads;
/// The returned paths. This is populated during getPaths.
SmallVector<NfaPath, 4> Paths;
/// Create a new segment and return it.
PathSegment *makePathSegment(uint64_t State, PathSegment *Tail) {
PathSegment *P = Allocator.Allocate();
*P = {State, Tail};
return P;
}
/// Pairs defines a sequence of possible NFA transitions for a single DFA
/// transition.
void transition(ArrayRef<NfaStatePair> Pairs) {
// Iterate over all existing heads. We will mutate the Heads deque during
// iteration.
unsigned NumHeads = Heads.size();
for (unsigned I = 0; I < NumHeads; ++I) {
PathSegment *Head = Heads[I];
// The sequence of pairs is sorted. Select the set of pairs that
// transition from the current head state.
auto PI = lower_bound(Pairs, NfaStatePair{Head->State, 0ULL});
auto PE = upper_bound(Pairs, NfaStatePair{Head->State, INT64_MAX});
// For every transition from the current head state, add a new path
// segment.
for (; PI != PE; ++PI)
if (PI->FromDfaState == Head->State)
Heads.push_back(makePathSegment(PI->ToDfaState, Head));
}
// Now we've iterated over all the initial heads and added new ones,
// dispose of the original heads.
Heads.erase(Heads.begin(), std::next(Heads.begin(), NumHeads));
}
public:
NfaTranscriber(ArrayRef<NfaStatePair> TransitionInfo)
: TransitionInfo(TransitionInfo) {
reset();
}
ArrayRef<NfaStatePair> getTransitionInfo() const {
return TransitionInfo;
}
void reset() {
Paths.clear();
Heads.clear();
Allocator.DestroyAll();
// The initial NFA state is 0.
Heads.push_back(makePathSegment(0ULL, nullptr));
}
void transition(unsigned TransitionInfoIdx) {
unsigned EndIdx = TransitionInfoIdx;
while (TransitionInfo[EndIdx].ToDfaState != 0)
++EndIdx;
ArrayRef<NfaStatePair> Pairs(&TransitionInfo[TransitionInfoIdx],
EndIdx - TransitionInfoIdx);
transition(Pairs);
}
ArrayRef<NfaPath> getPaths() {
Paths.clear();
for (auto *Head : Heads) {
NfaPath P;
while (Head->State != 0) {
P.push_back(Head->State);
Head = Head->Tail;
}
std::reverse(P.begin(), P.end());
Paths.push_back(std::move(P));
}
return Paths;
}
};
} // namespace internal
/// A deterministic finite-state automaton. The automaton is defined in
/// TableGen; this object drives an automaton defined by tblgen-emitted tables.
///
/// An automaton accepts a sequence of input tokens ("actions"). This class is
/// templated on the type of these actions.
template <typename ActionT> class Automaton {
/// Map from {State, Action} to {NewState, TransitionInfoIdx}.
/// TransitionInfoIdx is used by the DfaTranscriber to analyze the transition.
/// FIXME: This uses a std::map because ActionT can be a pair type including
/// an enum. In particular DenseMapInfo<ActionT> must be defined to use
/// DenseMap here.
/// This is a shared_ptr to allow very quick copy-construction of Automata; this
/// state is immutable after construction so this is safe.
using MapTy = std::map<std::pair<uint64_t, ActionT>, std::pair<uint64_t, unsigned>>;
std::shared_ptr<MapTy> M;
/// An optional transcription object. This uses much more state than simply
/// traversing the DFA for acceptance, so is heap allocated.
std::shared_ptr<internal::NfaTranscriber> Transcriber;
/// The initial DFA state is 1.
uint64_t State = 1;
/// True if we should transcribe and false if not (even if Transcriber is defined).
bool Transcribe;
public:
/// Create an automaton.
/// \param Transitions The Transitions table as created by TableGen. Note that
/// because the action type differs per automaton, the
/// table type is templated as ArrayRef<InfoT>.
/// \param TranscriptionTable The TransitionInfo table as created by TableGen.
///
/// Providing the TranscriptionTable argument as non-empty will enable the
/// use of transcription, which analyzes the possible paths in the original
/// NFA taken by the DFA. NOTE: This is substantially more work than simply
/// driving the DFA, so unless you require the getPaths() method leave this
/// empty.
template <typename InfoT>
Automaton(ArrayRef<InfoT> Transitions,
ArrayRef<NfaStatePair> TranscriptionTable = {}) {
if (!TranscriptionTable.empty())
Transcriber =
std::make_shared<internal::NfaTranscriber>(TranscriptionTable);
Transcribe = Transcriber != nullptr;
M = std::make_shared<MapTy>();
for (const auto &I : Transitions)
// Greedily read and cache the transition table.
M->emplace(std::make_pair(I.FromDfaState, I.Action),
std::make_pair(I.ToDfaState, I.InfoIdx));
}
Automaton(const Automaton &Other)
: M(Other.M), State(Other.State), Transcribe(Other.Transcribe) {
// Transcriber is not thread-safe, so create a new instance on copy.
if (Other.Transcriber)
Transcriber = std::make_shared<internal::NfaTranscriber>(
Other.Transcriber->getTransitionInfo());
}
/// Reset the automaton to its initial state.
void reset() {
State = 1;
if (Transcriber)
Transcriber->reset();
}
/// Enable or disable transcription. Transcription is only available if
/// TranscriptionTable was provided to the constructor.
void enableTranscription(bool Enable = true) {
assert(Transcriber &&
"Transcription is only available if TranscriptionTable was provided "
"to the Automaton constructor");
Transcribe = Enable;
}
/// Transition the automaton based on input symbol A. Return true if the
/// automaton transitioned to a valid state, false if the automaton
/// transitioned to an invalid state.
///
/// If this function returns false, all methods are undefined until reset() is
/// called.
bool add(const ActionT &A) {
auto I = M->find({State, A});
if (I == M->end())
return false;
if (Transcriber && Transcribe)
Transcriber->transition(I->second.second);
State = I->second.first;
return true;
}
/// Return true if the automaton can be transitioned based on input symbol A.
bool canAdd(const ActionT &A) {
auto I = M->find({State, A});
return I != M->end();
}
/// Obtain a set of possible paths through the input nondeterministic
/// automaton that could be obtained from the sequence of input actions
/// presented to this deterministic automaton.
ArrayRef<NfaPath> getNfaPaths() {
assert(Transcriber && Transcribe &&
"Can only obtain NFA paths if transcribing!");
return Transcriber->getPaths();
}
};
} // namespace llvm
#endif // LLVM_SUPPORT_AUTOMATON_H
PK hwFZ��̭� � Support/GenericDomTree.hnu �[��� //===- GenericDomTree.h - Generic dominator trees for graphs ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
///
/// This file defines a set of templates that efficiently compute a dominator
/// tree over a generic graph. This is used typically in LLVM for fast
/// dominance queries on the CFG, but is fully generic w.r.t. the underlying
/// graph types.
///
/// Unlike ADT/* graph algorithms, generic dominator tree has more requirements
/// on the graph's NodeRef. The NodeRef should be a pointer and,
/// either NodeRef->getParent() must return the parent node that is also a
/// pointer or DomTreeNodeTraits needs to be specialized.
///
/// FIXME: Maybe GenericDomTree needs a TreeTraits, instead of GraphTraits.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_GENERICDOMTREE_H
#define LLVM_SUPPORT_GENERICDOMTREE_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/GraphTraits.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/CFGDiff.h"
#include "llvm/Support/CFGUpdate.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include <cassert>
#include <cstddef>
#include <iterator>
#include <memory>
#include <type_traits>
#include <utility>
namespace llvm {
template <typename NodeT, bool IsPostDom>
class DominatorTreeBase;
namespace DomTreeBuilder {
template <typename DomTreeT>
struct SemiNCAInfo;
} // namespace DomTreeBuilder
/// Base class for the actual dominator tree node.
template <class NodeT> class DomTreeNodeBase {
friend class PostDominatorTree;
friend class DominatorTreeBase<NodeT, false>;
friend class DominatorTreeBase<NodeT, true>;
friend struct DomTreeBuilder::SemiNCAInfo<DominatorTreeBase<NodeT, false>>;
friend struct DomTreeBuilder::SemiNCAInfo<DominatorTreeBase<NodeT, true>>;
NodeT *TheBB;
DomTreeNodeBase *IDom;
unsigned Level;
SmallVector<DomTreeNodeBase *, 4> Children;
mutable unsigned DFSNumIn = ~0;
mutable unsigned DFSNumOut = ~0;
public:
DomTreeNodeBase(NodeT *BB, DomTreeNodeBase *iDom)
: TheBB(BB), IDom(iDom), Level(IDom ? IDom->Level + 1 : 0) {}
using iterator = typename SmallVector<DomTreeNodeBase *, 4>::iterator;
using const_iterator =
typename SmallVector<DomTreeNodeBase *, 4>::const_iterator;
iterator begin() { return Children.begin(); }
iterator end() { return Children.end(); }
const_iterator begin() const { return Children.begin(); }
const_iterator end() const { return Children.end(); }
DomTreeNodeBase *const &back() const { return Children.back(); }
DomTreeNodeBase *&back() { return Children.back(); }
iterator_range<iterator> children() { return make_range(begin(), end()); }
iterator_range<const_iterator> children() const {
return make_range(begin(), end());
}
NodeT *getBlock() const { return TheBB; }
DomTreeNodeBase *getIDom() const { return IDom; }
unsigned getLevel() const { return Level; }
std::unique_ptr<DomTreeNodeBase> addChild(
std::unique_ptr<DomTreeNodeBase> C) {
Children.push_back(C.get());
return C;
}
bool isLeaf() const { return Children.empty(); }
size_t getNumChildren() const { return Children.size(); }
void clearAllChildren() { Children.clear(); }
bool compare(const DomTreeNodeBase *Other) const {
if (getNumChildren() != Other->getNumChildren())
return true;
if (Level != Other->Level) return true;
SmallPtrSet<const NodeT *, 4> OtherChildren;
for (const DomTreeNodeBase *I : *Other) {
const NodeT *Nd = I->getBlock();
OtherChildren.insert(Nd);
}
for (const DomTreeNodeBase *I : *this) {
const NodeT *N = I->getBlock();
if (OtherChildren.count(N) == 0)
return true;
}
return false;
}
void setIDom(DomTreeNodeBase *NewIDom) {
assert(IDom && "No immediate dominator?");
if (IDom == NewIDom) return;
auto I = find(IDom->Children, this);
assert(I != IDom->Children.end() &&
"Not in immediate dominator children set!");
// I am no longer your child...
IDom->Children.erase(I);
// Switch to new dominator
IDom = NewIDom;
IDom->Children.push_back(this);
UpdateLevel();
}
/// getDFSNumIn/getDFSNumOut - These return the DFS visitation order for nodes
/// in the dominator tree. They are only guaranteed valid if
/// updateDFSNumbers() has been called.
unsigned getDFSNumIn() const { return DFSNumIn; }
unsigned getDFSNumOut() const { return DFSNumOut; }
private:
// Return true if this node is dominated by other. Use this only if DFS info
// is valid.
bool DominatedBy(const DomTreeNodeBase *other) const {
return this->DFSNumIn >= other->DFSNumIn &&
this->DFSNumOut <= other->DFSNumOut;
}
void UpdateLevel() {
assert(IDom);
if (Level == IDom->Level + 1) return;
SmallVector<DomTreeNodeBase *, 64> WorkStack = {this};
while (!WorkStack.empty()) {
DomTreeNodeBase *Current = WorkStack.pop_back_val();
Current->Level = Current->IDom->Level + 1;
for (DomTreeNodeBase *C : *Current) {
assert(C->IDom);
if (C->Level != C->IDom->Level + 1) WorkStack.push_back(C);
}
}
}
};
template <class NodeT>
raw_ostream &operator<<(raw_ostream &O, const DomTreeNodeBase<NodeT> *Node) {
if (Node->getBlock())
Node->getBlock()->printAsOperand(O, false);
else
O << " <<exit node>>";
O << " {" << Node->getDFSNumIn() << "," << Node->getDFSNumOut() << "} ["
<< Node->getLevel() << "]\n";
return O;
}
template <class NodeT>
void PrintDomTree(const DomTreeNodeBase<NodeT> *N, raw_ostream &O,
unsigned Lev) {
O.indent(2 * Lev) << "[" << Lev << "] " << N;
for (typename DomTreeNodeBase<NodeT>::const_iterator I = N->begin(),
E = N->end();
I != E; ++I)
PrintDomTree<NodeT>(*I, O, Lev + 1);
}
namespace DomTreeBuilder {
// The routines below are provided in a separate header but referenced here.
template <typename DomTreeT>
void Calculate(DomTreeT &DT);
template <typename DomTreeT>
void CalculateWithUpdates(DomTreeT &DT,
ArrayRef<typename DomTreeT::UpdateType> Updates);
template <typename DomTreeT>
void InsertEdge(DomTreeT &DT, typename DomTreeT::NodePtr From,
typename DomTreeT::NodePtr To);
template <typename DomTreeT>
void DeleteEdge(DomTreeT &DT, typename DomTreeT::NodePtr From,
typename DomTreeT::NodePtr To);
template <typename DomTreeT>
void ApplyUpdates(DomTreeT &DT,
GraphDiff<typename DomTreeT::NodePtr,
DomTreeT::IsPostDominator> &PreViewCFG,
GraphDiff<typename DomTreeT::NodePtr,
DomTreeT::IsPostDominator> *PostViewCFG);
template <typename DomTreeT>
bool Verify(const DomTreeT &DT, typename DomTreeT::VerificationLevel VL);
} // namespace DomTreeBuilder
/// Default DomTreeNode traits for NodeT. The default implementation assume a
/// Function-like NodeT. Can be specialized to support different node types.
template <typename NodeT> struct DomTreeNodeTraits {
using NodeType = NodeT;
using NodePtr = NodeT *;
using ParentPtr = decltype(std::declval<NodePtr>()->getParent());
static_assert(std::is_pointer_v<ParentPtr>,
"Currently NodeT's parent must be a pointer type");
using ParentType = std::remove_pointer_t<ParentPtr>;
static NodeT *getEntryNode(ParentPtr Parent) { return &Parent->front(); }
static ParentPtr getParent(NodePtr BB) { return BB->getParent(); }
};
/// Core dominator tree base class.
///
/// This class is a generic template over graph nodes. It is instantiated for
/// various graphs in the LLVM IR or in the code generator.
template <typename NodeT, bool IsPostDom>
class DominatorTreeBase {
public:
static_assert(std::is_pointer_v<typename GraphTraits<NodeT *>::NodeRef>,
"Currently DominatorTreeBase supports only pointer nodes");
using NodeTrait = DomTreeNodeTraits<NodeT>;
using NodeType = typename NodeTrait::NodeType;
using NodePtr = typename NodeTrait::NodePtr;
using ParentPtr = typename NodeTrait::ParentPtr;
static_assert(std::is_pointer_v<ParentPtr>,
"Currently NodeT's parent must be a pointer type");
using ParentType = std::remove_pointer_t<ParentPtr>;
static constexpr bool IsPostDominator = IsPostDom;
using UpdateType = cfg::Update<NodePtr>;
using UpdateKind = cfg::UpdateKind;
static constexpr UpdateKind Insert = UpdateKind::Insert;
static constexpr UpdateKind Delete = UpdateKind::Delete;
enum class VerificationLevel { Fast, Basic, Full };
protected:
// Dominators always have a single root, postdominators can have more.
SmallVector<NodeT *, IsPostDom ? 4 : 1> Roots;
using DomTreeNodeMapType =
DenseMap<NodeT *, std::unique_ptr<DomTreeNodeBase<NodeT>>>;
DomTreeNodeMapType DomTreeNodes;
DomTreeNodeBase<NodeT> *RootNode = nullptr;
ParentPtr Parent = nullptr;
mutable bool DFSInfoValid = false;
mutable unsigned int SlowQueries = 0;
friend struct DomTreeBuilder::SemiNCAInfo<DominatorTreeBase>;
public:
DominatorTreeBase() = default;
DominatorTreeBase(DominatorTreeBase &&Arg)
: Roots(std::move(Arg.Roots)),
DomTreeNodes(std::move(Arg.DomTreeNodes)),
RootNode(Arg.RootNode),
Parent(Arg.Parent),
DFSInfoValid(Arg.DFSInfoValid),
SlowQueries(Arg.SlowQueries) {
Arg.wipe();
}
DominatorTreeBase &operator=(DominatorTreeBase &&RHS) {
Roots = std::move(RHS.Roots);
DomTreeNodes = std::move(RHS.DomTreeNodes);
RootNode = RHS.RootNode;
Parent = RHS.Parent;
DFSInfoValid = RHS.DFSInfoValid;
SlowQueries = RHS.SlowQueries;
RHS.wipe();
return *this;
}
DominatorTreeBase(const DominatorTreeBase &) = delete;
DominatorTreeBase &operator=(const DominatorTreeBase &) = delete;
/// Iteration over roots.
///
/// This may include multiple blocks if we are computing post dominators.
/// For forward dominators, this will always be a single block (the entry
/// block).
using root_iterator = typename SmallVectorImpl<NodeT *>::iterator;
using const_root_iterator = typename SmallVectorImpl<NodeT *>::const_iterator;
root_iterator root_begin() { return Roots.begin(); }
const_root_iterator root_begin() const { return Roots.begin(); }
root_iterator root_end() { return Roots.end(); }
const_root_iterator root_end() const { return Roots.end(); }
size_t root_size() const { return Roots.size(); }
iterator_range<root_iterator> roots() {
return make_range(root_begin(), root_end());
}
iterator_range<const_root_iterator> roots() const {
return make_range(root_begin(), root_end());
}
/// isPostDominator - Returns true if analysis based of postdoms
///
bool isPostDominator() const { return IsPostDominator; }
/// compare - Return false if the other dominator tree base matches this
/// dominator tree base. Otherwise return true.
bool compare(const DominatorTreeBase &Other) const {
if (Parent != Other.Parent) return true;
if (Roots.size() != Other.Roots.size())
return true;
if (!std::is_permutation(Roots.begin(), Roots.end(), Other.Roots.begin()))
return true;
const DomTreeNodeMapType &OtherDomTreeNodes = Other.DomTreeNodes;
if (DomTreeNodes.size() != OtherDomTreeNodes.size())
return true;
for (const auto &DomTreeNode : DomTreeNodes) {
NodeT *BB = DomTreeNode.first;
typename DomTreeNodeMapType::const_iterator OI =
OtherDomTreeNodes.find(BB);
if (OI == OtherDomTreeNodes.end())
return true;
DomTreeNodeBase<NodeT> &MyNd = *DomTreeNode.second;
DomTreeNodeBase<NodeT> &OtherNd = *OI->second;
if (MyNd.compare(&OtherNd))
return true;
}
return false;
}
/// getNode - return the (Post)DominatorTree node for the specified basic
/// block. This is the same as using operator[] on this class. The result
/// may (but is not required to) be null for a forward (backwards)
/// statically unreachable block.
DomTreeNodeBase<NodeT> *getNode(const NodeT *BB) const {
auto I = DomTreeNodes.find(BB);
if (I != DomTreeNodes.end())
return I->second.get();
return nullptr;
}
/// See getNode.
DomTreeNodeBase<NodeT> *operator[](const NodeT *BB) const {
return getNode(BB);
}
/// getRootNode - This returns the entry node for the CFG of the function. If
/// this tree represents the post-dominance relations for a function, however,
/// this root may be a node with the block == NULL. This is the case when
/// there are multiple exit nodes from a particular function. Consumers of
/// post-dominance information must be capable of dealing with this
/// possibility.
///
DomTreeNodeBase<NodeT> *getRootNode() { return RootNode; }
const DomTreeNodeBase<NodeT> *getRootNode() const { return RootNode; }
/// Get all nodes dominated by R, including R itself.
void getDescendants(NodeT *R, SmallVectorImpl<NodeT *> &Result) const {
Result.clear();
const DomTreeNodeBase<NodeT> *RN = getNode(R);
if (!RN)
return; // If R is unreachable, it will not be present in the DOM tree.
SmallVector<const DomTreeNodeBase<NodeT> *, 8> WL;
WL.push_back(RN);
while (!WL.empty()) {
const DomTreeNodeBase<NodeT> *N = WL.pop_back_val();
Result.push_back(N->getBlock());
WL.append(N->begin(), N->end());
}
}
/// properlyDominates - Returns true iff A dominates B and A != B.
/// Note that this is not a constant time operation!
///
bool properlyDominates(const DomTreeNodeBase<NodeT> *A,
const DomTreeNodeBase<NodeT> *B) const {
if (!A || !B)
return false;
if (A == B)
return false;
return dominates(A, B);
}
bool properlyDominates(const NodeT *A, const NodeT *B) const;
/// isReachableFromEntry - Return true if A is dominated by the entry
/// block of the function containing it.
bool isReachableFromEntry(const NodeT *A) const {
assert(!this->isPostDominator() &&
"This is not implemented for post dominators");
return isReachableFromEntry(getNode(const_cast<NodeT *>(A)));
}
bool isReachableFromEntry(const DomTreeNodeBase<NodeT> *A) const { return A; }
/// dominates - Returns true iff A dominates B. Note that this is not a
/// constant time operation!
///
bool dominates(const DomTreeNodeBase<NodeT> *A,
const DomTreeNodeBase<NodeT> *B) const {
// A node trivially dominates itself.
if (B == A)
return true;
// An unreachable node is dominated by anything.
if (!isReachableFromEntry(B))
return true;
// And dominates nothing.
if (!isReachableFromEntry(A))
return false;
if (B->getIDom() == A) return true;
if (A->getIDom() == B) return false;
// A can only dominate B if it is higher in the tree.
if (A->getLevel() >= B->getLevel()) return false;
// Compare the result of the tree walk and the dfs numbers, if expensive
// checks are enabled.
#ifdef EXPENSIVE_CHECKS
assert((!DFSInfoValid ||
(dominatedBySlowTreeWalk(A, B) == B->DominatedBy(A))) &&
"Tree walk disagrees with dfs numbers!");
#endif
if (DFSInfoValid)
return B->DominatedBy(A);
// If we end up with too many slow queries, just update the
// DFS numbers on the theory that we are going to keep querying.
SlowQueries++;
if (SlowQueries > 32) {
updateDFSNumbers();
return B->DominatedBy(A);
}
return dominatedBySlowTreeWalk(A, B);
}
bool dominates(const NodeT *A, const NodeT *B) const;
NodeT *getRoot() const {
assert(this->Roots.size() == 1 && "Should always have entry node!");
return this->Roots[0];
}
/// Find nearest common dominator basic block for basic block A and B. A and B
/// must have tree nodes.
NodeT *findNearestCommonDominator(NodeT *A, NodeT *B) const {
assert(A && B && "Pointers are not valid");
assert(NodeTrait::getParent(A) == NodeTrait::getParent(B) &&
"Two blocks are not in same function");
// If either A or B is a entry block then it is nearest common dominator
// (for forward-dominators).
if (!isPostDominator()) {
NodeT &Entry =
*DomTreeNodeTraits<NodeT>::getEntryNode(NodeTrait::getParent(A));
if (A == &Entry || B == &Entry)
return &Entry;
}
DomTreeNodeBase<NodeT> *NodeA = getNode(A);
DomTreeNodeBase<NodeT> *NodeB = getNode(B);
assert(NodeA && "A must be in the tree");
assert(NodeB && "B must be in the tree");
// Use level information to go up the tree until the levels match. Then
// continue going up til we arrive at the same node.
while (NodeA != NodeB) {
if (NodeA->getLevel() < NodeB->getLevel()) std::swap(NodeA, NodeB);
NodeA = NodeA->IDom;
}
return NodeA->getBlock();
}
const NodeT *findNearestCommonDominator(const NodeT *A,
const NodeT *B) const {
// Cast away the const qualifiers here. This is ok since
// const is re-introduced on the return type.
return findNearestCommonDominator(const_cast<NodeT *>(A),
const_cast<NodeT *>(B));
}
bool isVirtualRoot(const DomTreeNodeBase<NodeT> *A) const {
return isPostDominator() && !A->getBlock();
}
//===--------------------------------------------------------------------===//
// API to update (Post)DominatorTree information based on modifications to
// the CFG...
/// Inform the dominator tree about a sequence of CFG edge insertions and
/// deletions and perform a batch update on the tree.
///
/// This function should be used when there were multiple CFG updates after
/// the last dominator tree update. It takes care of performing the updates
/// in sync with the CFG and optimizes away the redundant operations that
/// cancel each other.
/// The functions expects the sequence of updates to be balanced. Eg.:
/// - {{Insert, A, B}, {Delete, A, B}, {Insert, A, B}} is fine, because
/// logically it results in a single insertions.
/// - {{Insert, A, B}, {Insert, A, B}} is invalid, because it doesn't make
/// sense to insert the same edge twice.
///
/// What's more, the functions assumes that it's safe to ask every node in the
/// CFG about its children and inverse children. This implies that deletions
/// of CFG edges must not delete the CFG nodes before calling this function.
///
/// The applyUpdates function can reorder the updates and remove redundant
/// ones internally (as long as it is done in a deterministic fashion). The
/// batch updater is also able to detect sequences of zero and exactly one
/// update -- it's optimized to do less work in these cases.
///
/// Note that for postdominators it automatically takes care of applying
/// updates on reverse edges internally (so there's no need to swap the
/// From and To pointers when constructing DominatorTree::UpdateType).
/// The type of updates is the same for DomTreeBase<T> and PostDomTreeBase<T>
/// with the same template parameter T.
///
/// \param Updates An ordered sequence of updates to perform. The current CFG
/// and the reverse of these updates provides the pre-view of the CFG.
///
void applyUpdates(ArrayRef<UpdateType> Updates) {
GraphDiff<NodePtr, IsPostDominator> PreViewCFG(
Updates, /*ReverseApplyUpdates=*/true);
DomTreeBuilder::ApplyUpdates(*this, PreViewCFG, nullptr);
}
/// \param Updates An ordered sequence of updates to perform. The current CFG
/// and the reverse of these updates provides the pre-view of the CFG.
/// \param PostViewUpdates An ordered sequence of update to perform in order
/// to obtain a post-view of the CFG. The DT will be updated assuming the
/// obtained PostViewCFG is the desired end state.
void applyUpdates(ArrayRef<UpdateType> Updates,
ArrayRef<UpdateType> PostViewUpdates) {
if (Updates.empty()) {
GraphDiff<NodePtr, IsPostDom> PostViewCFG(PostViewUpdates);
DomTreeBuilder::ApplyUpdates(*this, PostViewCFG, &PostViewCFG);
} else {
// PreViewCFG needs to merge Updates and PostViewCFG. The updates in
// Updates need to be reversed, and match the direction in PostViewCFG.
// The PostViewCFG is created with updates reversed (equivalent to changes
// made to the CFG), so the PreViewCFG needs all the updates reverse
// applied.
SmallVector<UpdateType> AllUpdates(Updates.begin(), Updates.end());
append_range(AllUpdates, PostViewUpdates);
GraphDiff<NodePtr, IsPostDom> PreViewCFG(AllUpdates,
/*ReverseApplyUpdates=*/true);
GraphDiff<NodePtr, IsPostDom> PostViewCFG(PostViewUpdates);
DomTreeBuilder::ApplyUpdates(*this, PreViewCFG, &PostViewCFG);
}
}
/// Inform the dominator tree about a CFG edge insertion and update the tree.
///
/// This function has to be called just before or just after making the update
/// on the actual CFG. There cannot be any other updates that the dominator
/// tree doesn't know about.
///
/// Note that for postdominators it automatically takes care of inserting
/// a reverse edge internally (so there's no need to swap the parameters).
///
void insertEdge(NodeT *From, NodeT *To) {
assert(From);
assert(To);
assert(NodeTrait::getParent(From) == Parent);
assert(NodeTrait::getParent(To) == Parent);
DomTreeBuilder::InsertEdge(*this, From, To);
}
/// Inform the dominator tree about a CFG edge deletion and update the tree.
///
/// This function has to be called just after making the update on the actual
/// CFG. An internal functions checks if the edge doesn't exist in the CFG in
/// DEBUG mode. There cannot be any other updates that the
/// dominator tree doesn't know about.
///
/// Note that for postdominators it automatically takes care of deleting
/// a reverse edge internally (so there's no need to swap the parameters).
///
void deleteEdge(NodeT *From, NodeT *To) {
assert(From);
assert(To);
assert(NodeTrait::getParent(From) == Parent);
assert(NodeTrait::getParent(To) == Parent);
DomTreeBuilder::DeleteEdge(*this, From, To);
}
/// Add a new node to the dominator tree information.
///
/// This creates a new node as a child of DomBB dominator node, linking it
/// into the children list of the immediate dominator.
///
/// \param BB New node in CFG.
/// \param DomBB CFG node that is dominator for BB.
/// \returns New dominator tree node that represents new CFG node.
///
DomTreeNodeBase<NodeT> *addNewBlock(NodeT *BB, NodeT *DomBB) {
assert(getNode(BB) == nullptr && "Block already in dominator tree!");
DomTreeNodeBase<NodeT> *IDomNode = getNode(DomBB);
assert(IDomNode && "Not immediate dominator specified for block!");
DFSInfoValid = false;
return createChild(BB, IDomNode);
}
/// Add a new node to the forward dominator tree and make it a new root.
///
/// \param BB New node in CFG.
/// \returns New dominator tree node that represents new CFG node.
///
DomTreeNodeBase<NodeT> *setNewRoot(NodeT *BB) {
assert(getNode(BB) == nullptr && "Block already in dominator tree!");
assert(!this->isPostDominator() &&
"Cannot change root of post-dominator tree");
DFSInfoValid = false;
DomTreeNodeBase<NodeT> *NewNode = createNode(BB);
if (Roots.empty()) {
addRoot(BB);
} else {
assert(Roots.size() == 1);
NodeT *OldRoot = Roots.front();
auto &OldNode = DomTreeNodes[OldRoot];
OldNode = NewNode->addChild(std::move(DomTreeNodes[OldRoot]));
OldNode->IDom = NewNode;
OldNode->UpdateLevel();
Roots[0] = BB;
}
return RootNode = NewNode;
}
/// changeImmediateDominator - This method is used to update the dominator
/// tree information when a node's immediate dominator changes.
///
void changeImmediateDominator(DomTreeNodeBase<NodeT> *N,
DomTreeNodeBase<NodeT> *NewIDom) {
assert(N && NewIDom && "Cannot change null node pointers!");
DFSInfoValid = false;
N->setIDom(NewIDom);
}
void changeImmediateDominator(NodeT *BB, NodeT *NewBB) {
changeImmediateDominator(getNode(BB), getNode(NewBB));
}
/// eraseNode - Removes a node from the dominator tree. Block must not
/// dominate any other blocks. Removes node from its immediate dominator's
/// children list. Deletes dominator node associated with basic block BB.
void eraseNode(NodeT *BB) {
DomTreeNodeBase<NodeT> *Node = getNode(BB);
assert(Node && "Removing node that isn't in dominator tree.");
assert(Node->isLeaf() && "Node is not a leaf node.");
DFSInfoValid = false;
// Remove node from immediate dominator's children list.
DomTreeNodeBase<NodeT> *IDom = Node->getIDom();
if (IDom) {
const auto I = find(IDom->Children, Node);
assert(I != IDom->Children.end() &&
"Not in immediate dominator children set!");
// I am no longer your child...
IDom->Children.erase(I);
}
DomTreeNodes.erase(BB);
if (!IsPostDom) return;
// Remember to update PostDominatorTree roots.
auto RIt = llvm::find(Roots, BB);
if (RIt != Roots.end()) {
std::swap(*RIt, Roots.back());
Roots.pop_back();
}
}
/// splitBlock - BB is split and now it has one successor. Update dominator
/// tree to reflect this change.
void splitBlock(NodeT *NewBB) {
if (IsPostDominator)
Split<Inverse<NodeT *>>(NewBB);
else
Split<NodeT *>(NewBB);
}
/// print - Convert to human readable form
///
void print(raw_ostream &O) const {
O << "=============================--------------------------------\n";
if (IsPostDominator)
O << "Inorder PostDominator Tree: ";
else
O << "Inorder Dominator Tree: ";
if (!DFSInfoValid)
O << "DFSNumbers invalid: " << SlowQueries << " slow queries.";
O << "\n";
// The postdom tree can have a null root if there are no returns.
if (getRootNode()) PrintDomTree<NodeT>(getRootNode(), O, 1);
O << "Roots: ";
for (const NodePtr Block : Roots) {
Block->printAsOperand(O, false);
O << " ";
}
O << "\n";
}
public:
/// updateDFSNumbers - Assign In and Out numbers to the nodes while walking
/// dominator tree in dfs order.
void updateDFSNumbers() const {
if (DFSInfoValid) {
SlowQueries = 0;
return;
}
SmallVector<std::pair<const DomTreeNodeBase<NodeT> *,
typename DomTreeNodeBase<NodeT>::const_iterator>,
32> WorkStack;
const DomTreeNodeBase<NodeT> *ThisRoot = getRootNode();
assert((!Parent || ThisRoot) && "Empty constructed DomTree");
if (!ThisRoot)
return;
// Both dominators and postdominators have a single root node. In the case
// case of PostDominatorTree, this node is a virtual root.
WorkStack.push_back({ThisRoot, ThisRoot->begin()});
unsigned DFSNum = 0;
ThisRoot->DFSNumIn = DFSNum++;
while (!WorkStack.empty()) {
const DomTreeNodeBase<NodeT> *Node = WorkStack.back().first;
const auto ChildIt = WorkStack.back().second;
// If we visited all of the children of this node, "recurse" back up the
// stack setting the DFOutNum.
if (ChildIt == Node->end()) {
Node->DFSNumOut = DFSNum++;
WorkStack.pop_back();
} else {
// Otherwise, recursively visit this child.
const DomTreeNodeBase<NodeT> *Child = *ChildIt;
++WorkStack.back().second;
WorkStack.push_back({Child, Child->begin()});
Child->DFSNumIn = DFSNum++;
}
}
SlowQueries = 0;
DFSInfoValid = true;
}
/// recalculate - compute a dominator tree for the given function
void recalculate(ParentType &Func) {
Parent = &Func;
DomTreeBuilder::Calculate(*this);
}
void recalculate(ParentType &Func, ArrayRef<UpdateType> Updates) {
Parent = &Func;
DomTreeBuilder::CalculateWithUpdates(*this, Updates);
}
/// verify - checks if the tree is correct. There are 3 level of verification:
/// - Full -- verifies if the tree is correct by making sure all the
/// properties (including the parent and the sibling property)
/// hold.
/// Takes O(N^3) time.
///
/// - Basic -- checks if the tree is correct, but compares it to a freshly
/// constructed tree instead of checking the sibling property.
/// Takes O(N^2) time.
///
/// - Fast -- checks basic tree structure and compares it with a freshly
/// constructed tree.
/// Takes O(N^2) time worst case, but is faster in practise (same
/// as tree construction).
bool verify(VerificationLevel VL = VerificationLevel::Full) const {
return DomTreeBuilder::Verify(*this, VL);
}
void reset() {
DomTreeNodes.clear();
Roots.clear();
RootNode = nullptr;
Parent = nullptr;
DFSInfoValid = false;
SlowQueries = 0;
}
protected:
void addRoot(NodeT *BB) { this->Roots.push_back(BB); }
DomTreeNodeBase<NodeT> *createChild(NodeT *BB, DomTreeNodeBase<NodeT> *IDom) {
return (DomTreeNodes[BB] = IDom->addChild(
std::make_unique<DomTreeNodeBase<NodeT>>(BB, IDom)))
.get();
}
DomTreeNodeBase<NodeT> *createNode(NodeT *BB) {
return (DomTreeNodes[BB] =
std::make_unique<DomTreeNodeBase<NodeT>>(BB, nullptr))
.get();
}
// NewBB is split and now it has one successor. Update dominator tree to
// reflect this change.
template <class N>
void Split(typename GraphTraits<N>::NodeRef NewBB) {
using GraphT = GraphTraits<N>;
using NodeRef = typename GraphT::NodeRef;
assert(std::distance(GraphT::child_begin(NewBB),
GraphT::child_end(NewBB)) == 1 &&
"NewBB should have a single successor!");
NodeRef NewBBSucc = *GraphT::child_begin(NewBB);
SmallVector<NodeRef, 4> PredBlocks(children<Inverse<N>>(NewBB));
assert(!PredBlocks.empty() && "No predblocks?");
bool NewBBDominatesNewBBSucc = true;
for (auto *Pred : children<Inverse<N>>(NewBBSucc)) {
if (Pred != NewBB && !dominates(NewBBSucc, Pred) &&
isReachableFromEntry(Pred)) {
NewBBDominatesNewBBSucc = false;
break;
}
}
// Find NewBB's immediate dominator and create new dominator tree node for
// NewBB.
NodeT *NewBBIDom = nullptr;
unsigned i = 0;
for (i = 0; i < PredBlocks.size(); ++i)
if (isReachableFromEntry(PredBlocks[i])) {
NewBBIDom = PredBlocks[i];
break;
}
// It's possible that none of the predecessors of NewBB are reachable;
// in that case, NewBB itself is unreachable, so nothing needs to be
// changed.
if (!NewBBIDom) return;
for (i = i + 1; i < PredBlocks.size(); ++i) {
if (isReachableFromEntry(PredBlocks[i]))
NewBBIDom = findNearestCommonDominator(NewBBIDom, PredBlocks[i]);
}
// Create the new dominator tree node... and set the idom of NewBB.
DomTreeNodeBase<NodeT> *NewBBNode = addNewBlock(NewBB, NewBBIDom);
// If NewBB strictly dominates other blocks, then it is now the immediate
// dominator of NewBBSucc. Update the dominator tree as appropriate.
if (NewBBDominatesNewBBSucc) {
DomTreeNodeBase<NodeT> *NewBBSuccNode = getNode(NewBBSucc);
changeImmediateDominator(NewBBSuccNode, NewBBNode);
}
}
private:
bool dominatedBySlowTreeWalk(const DomTreeNodeBase<NodeT> *A,
const DomTreeNodeBase<NodeT> *B) const {
assert(A != B);
assert(isReachableFromEntry(B));
assert(isReachableFromEntry(A));
const unsigned ALevel = A->getLevel();
const DomTreeNodeBase<NodeT> *IDom;
// Don't walk nodes above A's subtree. When we reach A's level, we must
// either find A or be in some other subtree not dominated by A.
while ((IDom = B->getIDom()) != nullptr && IDom->getLevel() >= ALevel)
B = IDom; // Walk up the tree
return B == A;
}
/// Wipe this tree's state without releasing any resources.
///
/// This is essentially a post-move helper only. It leaves the object in an
/// assignable and destroyable state, but otherwise invalid.
void wipe() {
DomTreeNodes.clear();
RootNode = nullptr;
Parent = nullptr;
}
};
template <typename T>
using DomTreeBase = DominatorTreeBase<T, false>;
template <typename T>
using PostDomTreeBase = DominatorTreeBase<T, true>;
// These two functions are declared out of line as a workaround for building
// with old (< r147295) versions of clang because of pr11642.
template <typename NodeT, bool IsPostDom>
bool DominatorTreeBase<NodeT, IsPostDom>::dominates(const NodeT *A,
const NodeT *B) const {
if (A == B)
return true;
// Cast away the const qualifiers here. This is ok since
// this function doesn't actually return the values returned
// from getNode.
return dominates(getNode(const_cast<NodeT *>(A)),
getNode(const_cast<NodeT *>(B)));
}
template <typename NodeT, bool IsPostDom>
bool DominatorTreeBase<NodeT, IsPostDom>::properlyDominates(
const NodeT *A, const NodeT *B) const {
if (A == B)
return false;
// Cast away the const qualifiers here. This is ok since
// this function doesn't actually return the values returned
// from getNode.
return dominates(getNode(const_cast<NodeT *>(A)),
getNode(const_cast<NodeT *>(B)));
}
} // end namespace llvm
#endif // LLVM_SUPPORT_GENERICDOMTREE_H
PK hwFZ83�F� � Support/Host.hnu �[��� //===-- llvm/Support/Host.h -------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This header is deprecated in favour of `llvm/TargetParser/Host.h`.
///
//===----------------------------------------------------------------------===//
#ifdef __GNUC__
#pragma GCC warning \
"This header is deprecated, please use llvm/TargetParser/Host.h"
#endif
#include "llvm/TargetParser/Host.h"
PK hwFZ��L Support/DXILOperationCommon.hnu �[��� //===-- DXILOperationCommon.h - DXIL Operation ------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file is created to share common definitions used by both the
// DXILOpBuilder and the table
// generator.
// Documentation for DXIL can be found in
// https://github.com/Microsoft/DirectXShaderCompiler/blob/main/docs/DXIL.rst.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_DXILOPERATIONCOMMON_H
#define LLVM_SUPPORT_DXILOPERATIONCOMMON_H
#include "llvm/ADT/StringSwitch.h"
namespace llvm {
namespace dxil {
enum class ParameterKind : uint8_t {
INVALID = 0,
VOID,
HALF,
FLOAT,
DOUBLE,
I1,
I8,
I16,
I32,
I64,
OVERLOAD,
CBUFFER_RET,
RESOURCE_RET,
DXIL_HANDLE,
};
inline ParameterKind parameterTypeNameToKind(StringRef Name) {
return StringSwitch<ParameterKind>(Name)
.Case("void", ParameterKind::VOID)
.Case("half", ParameterKind::HALF)
.Case("float", ParameterKind::FLOAT)
.Case("double", ParameterKind::DOUBLE)
.Case("i1", ParameterKind::I1)
.Case("i8", ParameterKind::I8)
.Case("i16", ParameterKind::I16)
.Case("i32", ParameterKind::I32)
.Case("i64", ParameterKind::I64)
.Case("$o", ParameterKind::OVERLOAD)
.Case("dx.types.Handle", ParameterKind::DXIL_HANDLE)
.Case("dx.types.CBufRet", ParameterKind::CBUFFER_RET)
.Case("dx.types.ResRet", ParameterKind::RESOURCE_RET)
.Default(ParameterKind::INVALID);
}
} // namespace dxil
} // namespace llvm
#endif
PK hwFZ
�� � Support/PrettyStackTrace.hnu �[��� //===- llvm/Support/PrettyStackTrace.h - Pretty Crash Handling --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the PrettyStackTraceEntry class, which is used to make
// crashes give more contextual information about what the program was doing
// when it crashed.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_PRETTYSTACKTRACE_H
#define LLVM_SUPPORT_PRETTYSTACKTRACE_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/Compiler.h"
namespace llvm {
class raw_ostream;
/// Enables dumping a "pretty" stack trace when the program crashes.
///
/// \see PrettyStackTraceEntry
void EnablePrettyStackTrace();
/// Enables (or disables) dumping a "pretty" stack trace when the user sends
/// SIGINFO or SIGUSR1 to the current process.
///
/// This is a per-thread decision so that a program can choose to print stack
/// traces only on a primary thread, or on all threads that use
/// PrettyStackTraceEntry.
///
/// \see EnablePrettyStackTrace
/// \see PrettyStackTraceEntry
void EnablePrettyStackTraceOnSigInfoForThisThread(bool ShouldEnable = true);
/// Replaces the generic bug report message that is output upon
/// a crash.
void setBugReportMsg(const char *Msg);
/// Get the bug report message that will be output upon a crash.
const char *getBugReportMsg();
/// PrettyStackTraceEntry - This class is used to represent a frame of the
/// "pretty" stack trace that is dumped when a program crashes. You can define
/// subclasses of this and declare them on the program stack: when they are
/// constructed and destructed, they will add their symbolic frames to a
/// virtual stack trace. This gets dumped out if the program crashes.
class PrettyStackTraceEntry {
friend PrettyStackTraceEntry *ReverseStackTrace(PrettyStackTraceEntry *);
PrettyStackTraceEntry *NextEntry;
PrettyStackTraceEntry(const PrettyStackTraceEntry &) = delete;
void operator=(const PrettyStackTraceEntry &) = delete;
public:
PrettyStackTraceEntry();
virtual ~PrettyStackTraceEntry();
/// print - Emit information about this stack frame to OS.
virtual void print(raw_ostream &OS) const = 0;
/// getNextEntry - Return the next entry in the list of frames.
const PrettyStackTraceEntry *getNextEntry() const { return NextEntry; }
};
/// PrettyStackTraceString - This object prints a specified string (which
/// should not contain newlines) to the stream as the stack trace when a crash
/// occurs.
class PrettyStackTraceString : public PrettyStackTraceEntry {
const char *Str;
public:
PrettyStackTraceString(const char *str) : Str(str) {}
void print(raw_ostream &OS) const override;
};
/// PrettyStackTraceFormat - This object prints a string (which may use
/// printf-style formatting but should not contain newlines) to the stream
/// as the stack trace when a crash occurs.
class PrettyStackTraceFormat : public PrettyStackTraceEntry {
llvm::SmallVector<char, 32> Str;
public:
PrettyStackTraceFormat(const char *Format, ...);
void print(raw_ostream &OS) const override;
};
/// PrettyStackTraceProgram - This object prints a specified program arguments
/// to the stream as the stack trace when a crash occurs.
class PrettyStackTraceProgram : public PrettyStackTraceEntry {
int ArgC;
const char *const *ArgV;
public:
PrettyStackTraceProgram(int argc, const char * const*argv)
: ArgC(argc), ArgV(argv) {
EnablePrettyStackTrace();
}
void print(raw_ostream &OS) const override;
};
/// Returns the topmost element of the "pretty" stack state.
const void *SavePrettyStackState();
/// Restores the topmost element of the "pretty" stack state to State, which
/// should come from a previous call to SavePrettyStackState(). This is
/// useful when using a CrashRecoveryContext in code that also uses
/// PrettyStackTraceEntries, to make sure the stack that's printed if a crash
/// happens after a crash that's been recovered by CrashRecoveryContext
/// doesn't have frames on it that were added in code unwound by the
/// CrashRecoveryContext.
void RestorePrettyStackState(const void *State);
} // end namespace llvm
#endif
PK hwFZ:��h�/ �/ Support/SourceMgr.hnu �[��� //===- SourceMgr.h - Manager for Source Buffers & Diagnostics ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the SMDiagnostic and SourceMgr classes. This
// provides a simple substrate for diagnostics, #include handling, and other low
// level things for simple parsers.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_SOURCEMGR_H
#define LLVM_SUPPORT_SOURCEMGR_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Support/SMLoc.h"
#include <vector>
namespace llvm {
class raw_ostream;
class SMDiagnostic;
class SMFixIt;
/// This owns the files read by a parser, handles include stacks,
/// and handles diagnostic wrangling.
class SourceMgr {
public:
enum DiagKind {
DK_Error,
DK_Warning,
DK_Remark,
DK_Note,
};
/// Clients that want to handle their own diagnostics in a custom way can
/// register a function pointer+context as a diagnostic handler.
/// It gets called each time PrintMessage is invoked.
using DiagHandlerTy = void (*)(const SMDiagnostic &, void *Context);
private:
struct SrcBuffer {
/// The memory buffer for the file.
std::unique_ptr<MemoryBuffer> Buffer;
/// Vector of offsets into Buffer at which there are line-endings
/// (lazily populated). Once populated, the '\n' that marks the end of
/// line number N from [1..] is at Buffer[OffsetCache[N-1]]. Since
/// these offsets are in sorted (ascending) order, they can be
/// binary-searched for the first one after any given offset (eg. an
/// offset corresponding to a particular SMLoc).
///
/// Since we're storing offsets into relatively small files (often smaller
/// than 2^8 or 2^16 bytes), we select the offset vector element type
/// dynamically based on the size of Buffer.
mutable void *OffsetCache = nullptr;
/// Look up a given \p Ptr in in the buffer, determining which line it came
/// from.
unsigned getLineNumber(const char *Ptr) const;
template <typename T>
unsigned getLineNumberSpecialized(const char *Ptr) const;
/// Return a pointer to the first character of the specified line number or
/// null if the line number is invalid.
const char *getPointerForLineNumber(unsigned LineNo) const;
template <typename T>
const char *getPointerForLineNumberSpecialized(unsigned LineNo) const;
/// This is the location of the parent include, or null if at the top level.
SMLoc IncludeLoc;
SrcBuffer() = default;
SrcBuffer(SrcBuffer &&);
SrcBuffer(const SrcBuffer &) = delete;
SrcBuffer &operator=(const SrcBuffer &) = delete;
~SrcBuffer();
};
/// This is all of the buffers that we are reading from.
std::vector<SrcBuffer> Buffers;
// This is the list of directories we should search for include files in.
std::vector<std::string> IncludeDirectories;
DiagHandlerTy DiagHandler = nullptr;
void *DiagContext = nullptr;
bool isValidBufferID(unsigned i) const { return i && i <= Buffers.size(); }
public:
SourceMgr() = default;
SourceMgr(const SourceMgr &) = delete;
SourceMgr &operator=(const SourceMgr &) = delete;
SourceMgr(SourceMgr &&) = default;
SourceMgr &operator=(SourceMgr &&) = default;
~SourceMgr() = default;
/// Return the include directories of this source manager.
ArrayRef<std::string> getIncludeDirs() const { return IncludeDirectories; }
void setIncludeDirs(const std::vector<std::string> &Dirs) {
IncludeDirectories = Dirs;
}
/// Specify a diagnostic handler to be invoked every time PrintMessage is
/// called. \p Ctx is passed into the handler when it is invoked.
void setDiagHandler(DiagHandlerTy DH, void *Ctx = nullptr) {
DiagHandler = DH;
DiagContext = Ctx;
}
DiagHandlerTy getDiagHandler() const { return DiagHandler; }
void *getDiagContext() const { return DiagContext; }
const SrcBuffer &getBufferInfo(unsigned i) const {
assert(isValidBufferID(i));
return Buffers[i - 1];
}
const MemoryBuffer *getMemoryBuffer(unsigned i) const {
assert(isValidBufferID(i));
return Buffers[i - 1].Buffer.get();
}
unsigned getNumBuffers() const { return Buffers.size(); }
unsigned getMainFileID() const {
assert(getNumBuffers());
return 1;
}
SMLoc getParentIncludeLoc(unsigned i) const {
assert(isValidBufferID(i));
return Buffers[i - 1].IncludeLoc;
}
/// Add a new source buffer to this source manager. This takes ownership of
/// the memory buffer.
unsigned AddNewSourceBuffer(std::unique_ptr<MemoryBuffer> F,
SMLoc IncludeLoc) {
SrcBuffer NB;
NB.Buffer = std::move(F);
NB.IncludeLoc = IncludeLoc;
Buffers.push_back(std::move(NB));
return Buffers.size();
}
/// Takes the source buffers from the given source manager and append them to
/// the current manager. `MainBufferIncludeLoc` is an optional include
/// location to attach to the main buffer of `SrcMgr` after it gets moved to
/// the current manager.
void takeSourceBuffersFrom(SourceMgr &SrcMgr,
SMLoc MainBufferIncludeLoc = SMLoc()) {
if (SrcMgr.Buffers.empty())
return;
size_t OldNumBuffers = getNumBuffers();
std::move(SrcMgr.Buffers.begin(), SrcMgr.Buffers.end(),
std::back_inserter(Buffers));
SrcMgr.Buffers.clear();
Buffers[OldNumBuffers].IncludeLoc = MainBufferIncludeLoc;
}
/// Search for a file with the specified name in the current directory or in
/// one of the IncludeDirs.
///
/// If no file is found, this returns 0, otherwise it returns the buffer ID
/// of the stacked file. The full path to the included file can be found in
/// \p IncludedFile.
unsigned AddIncludeFile(const std::string &Filename, SMLoc IncludeLoc,
std::string &IncludedFile);
/// Search for a file with the specified name in the current directory or in
/// one of the IncludeDirs, and try to open it **without** adding to the
/// SourceMgr. If the opened file is intended to be added to the source
/// manager, prefer `AddIncludeFile` instead.
///
/// If no file is found, this returns an Error, otherwise it returns the
/// buffer of the stacked file. The full path to the included file can be
/// found in \p IncludedFile.
ErrorOr<std::unique_ptr<MemoryBuffer>>
OpenIncludeFile(const std::string &Filename, std::string &IncludedFile);
/// Return the ID of the buffer containing the specified location.
///
/// 0 is returned if the buffer is not found.
unsigned FindBufferContainingLoc(SMLoc Loc) const;
/// Find the line number for the specified location in the specified file.
/// This is not a fast method.
unsigned FindLineNumber(SMLoc Loc, unsigned BufferID = 0) const {
return getLineAndColumn(Loc, BufferID).first;
}
/// Find the line and column number for the specified location in the
/// specified file. This is not a fast method.
std::pair<unsigned, unsigned> getLineAndColumn(SMLoc Loc,
unsigned BufferID = 0) const;
/// Get a string with the \p SMLoc filename and line number
/// formatted in the standard style.
std::string getFormattedLocationNoOffset(SMLoc Loc,
bool IncludePath = false) const;
/// Given a line and column number in a mapped buffer, turn it into an SMLoc.
/// This will return a null SMLoc if the line/column location is invalid.
SMLoc FindLocForLineAndColumn(unsigned BufferID, unsigned LineNo,
unsigned ColNo);
/// Emit a message about the specified location with the specified string.
///
/// \param ShowColors Display colored messages if output is a terminal and
/// the default error handler is used.
void PrintMessage(raw_ostream &OS, SMLoc Loc, DiagKind Kind, const Twine &Msg,
ArrayRef<SMRange> Ranges = {},
ArrayRef<SMFixIt> FixIts = {},
bool ShowColors = true) const;
/// Emits a diagnostic to llvm::errs().
void PrintMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg,
ArrayRef<SMRange> Ranges = {},
ArrayRef<SMFixIt> FixIts = {},
bool ShowColors = true) const;
/// Emits a manually-constructed diagnostic to the given output stream.
///
/// \param ShowColors Display colored messages if output is a terminal and
/// the default error handler is used.
void PrintMessage(raw_ostream &OS, const SMDiagnostic &Diagnostic,
bool ShowColors = true) const;
/// Return an SMDiagnostic at the specified location with the specified
/// string.
///
/// \param Msg If non-null, the kind of message (e.g., "error") which is
/// prefixed to the message.
SMDiagnostic GetMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg,
ArrayRef<SMRange> Ranges = {},
ArrayRef<SMFixIt> FixIts = {}) const;
/// Prints the names of included files and the line of the file they were
/// included from. A diagnostic handler can use this before printing its
/// custom formatted message.
///
/// \param IncludeLoc The location of the include.
/// \param OS the raw_ostream to print on.
void PrintIncludeStack(SMLoc IncludeLoc, raw_ostream &OS) const;
};
/// Represents a single fixit, a replacement of one range of text with another.
class SMFixIt {
SMRange Range;
std::string Text;
public:
SMFixIt(SMRange R, const Twine &Replacement);
SMFixIt(SMLoc Loc, const Twine &Replacement)
: SMFixIt(SMRange(Loc, Loc), Replacement) {}
StringRef getText() const { return Text; }
SMRange getRange() const { return Range; }
bool operator<(const SMFixIt &Other) const {
if (Range.Start.getPointer() != Other.Range.Start.getPointer())
return Range.Start.getPointer() < Other.Range.Start.getPointer();
if (Range.End.getPointer() != Other.Range.End.getPointer())
return Range.End.getPointer() < Other.Range.End.getPointer();
return Text < Other.Text;
}
};
/// Instances of this class encapsulate one diagnostic report, allowing
/// printing to a raw_ostream as a caret diagnostic.
class SMDiagnostic {
const SourceMgr *SM = nullptr;
SMLoc Loc;
std::string Filename;
int LineNo = 0;
int ColumnNo = 0;
SourceMgr::DiagKind Kind = SourceMgr::DK_Error;
std::string Message, LineContents;
std::vector<std::pair<unsigned, unsigned>> Ranges;
SmallVector<SMFixIt, 4> FixIts;
public:
// Null diagnostic.
SMDiagnostic() = default;
// Diagnostic with no location (e.g. file not found, command line arg error).
SMDiagnostic(StringRef filename, SourceMgr::DiagKind Knd, StringRef Msg)
: Filename(filename), LineNo(-1), ColumnNo(-1), Kind(Knd), Message(Msg) {}
// Diagnostic with a location.
SMDiagnostic(const SourceMgr &sm, SMLoc L, StringRef FN, int Line, int Col,
SourceMgr::DiagKind Kind, StringRef Msg, StringRef LineStr,
ArrayRef<std::pair<unsigned, unsigned>> Ranges,
ArrayRef<SMFixIt> FixIts = {});
const SourceMgr *getSourceMgr() const { return SM; }
SMLoc getLoc() const { return Loc; }
StringRef getFilename() const { return Filename; }
int getLineNo() const { return LineNo; }
int getColumnNo() const { return ColumnNo; }
SourceMgr::DiagKind getKind() const { return Kind; }
StringRef getMessage() const { return Message; }
StringRef getLineContents() const { return LineContents; }
ArrayRef<std::pair<unsigned, unsigned>> getRanges() const { return Ranges; }
void addFixIt(const SMFixIt &Hint) { FixIts.push_back(Hint); }
ArrayRef<SMFixIt> getFixIts() const { return FixIts; }
void print(const char *ProgName, raw_ostream &S, bool ShowColors = true,
bool ShowKindLabel = true) const;
};
} // end namespace llvm
#endif // LLVM_SUPPORT_SOURCEMGR_H
PK hwFZLO�j Support/LineIterator.hnu �[��� //===- LineIterator.h - Iterator to read a text buffer's lines --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_LINEITERATOR_H
#define LLVM_SUPPORT_LINEITERATOR_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/MemoryBufferRef.h"
#include <iterator>
#include <optional>
namespace llvm {
class MemoryBuffer;
/// A forward iterator which reads text lines from a buffer.
///
/// This class provides a forward iterator interface for reading one line at
/// a time from a buffer. When default constructed the iterator will be the
/// "end" iterator.
///
/// The iterator is aware of what line number it is currently processing. It
/// strips blank lines by default, and comment lines given a comment-starting
/// character.
///
/// Note that this iterator requires the buffer to be nul terminated.
class line_iterator {
std::optional<MemoryBufferRef> Buffer;
char CommentMarker = '\0';
bool SkipBlanks = true;
unsigned LineNumber = 1;
StringRef CurrentLine;
public:
using iterator_category = std::forward_iterator_tag;
using value_type = StringRef;
using difference_type = std::ptrdiff_t;
using pointer = value_type *;
using reference = value_type &;
/// Default construct an "end" iterator.
line_iterator() = default;
/// Construct a new iterator around an unowned memory buffer.
explicit line_iterator(const MemoryBufferRef &Buffer, bool SkipBlanks = true,
char CommentMarker = '\0');
/// Construct a new iterator around some memory buffer.
explicit line_iterator(const MemoryBuffer &Buffer, bool SkipBlanks = true,
char CommentMarker = '\0');
/// Return true if we've reached EOF or are an "end" iterator.
bool is_at_eof() const { return !Buffer; }
/// Return true if we're an "end" iterator or have reached EOF.
bool is_at_end() const { return is_at_eof(); }
/// Return the current line number. May return any number at EOF.
int64_t line_number() const { return LineNumber; }
/// Advance to the next (non-empty, non-comment) line.
line_iterator &operator++() {
advance();
return *this;
}
line_iterator operator++(int) {
line_iterator tmp(*this);
advance();
return tmp;
}
/// Get the current line as a \c StringRef.
StringRef operator*() const { return CurrentLine; }
const StringRef *operator->() const { return &CurrentLine; }
friend bool operator==(const line_iterator &LHS, const line_iterator &RHS) {
return LHS.Buffer == RHS.Buffer &&
LHS.CurrentLine.begin() == RHS.CurrentLine.begin();
}
friend bool operator!=(const line_iterator &LHS, const line_iterator &RHS) {
return !(LHS == RHS);
}
private:
/// Advance the iterator to the next line.
void advance();
};
}
#endif
PK hwFZ�� - - Support/Extension.defnu �[��� //extension handlers
#undef HANDLE_EXTENSION
PK hwFZ���Cy y Support/CFGUpdate.hnu �[��� //===- CFGUpdate.h - Encode a CFG Edge Update. ------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines a CFG Edge Update: Insert or Delete, and two Nodes as the
// Edge ends.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_CFGUPDATE_H
#define LLVM_SUPPORT_CFGUPDATE_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/PointerIntPair.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
namespace llvm {
namespace cfg {
enum class UpdateKind : unsigned char { Insert, Delete };
template <typename NodePtr> class Update {
using NodeKindPair = PointerIntPair<NodePtr, 1, UpdateKind>;
NodePtr From;
NodeKindPair ToAndKind;
public:
Update(UpdateKind Kind, NodePtr From, NodePtr To)
: From(From), ToAndKind(To, Kind) {}
UpdateKind getKind() const { return ToAndKind.getInt(); }
NodePtr getFrom() const { return From; }
NodePtr getTo() const { return ToAndKind.getPointer(); }
bool operator==(const Update &RHS) const {
return From == RHS.From && ToAndKind == RHS.ToAndKind;
}
void print(raw_ostream &OS) const {
OS << (getKind() == UpdateKind::Insert ? "Insert " : "Delete ");
getFrom()->printAsOperand(OS, false);
OS << " -> ";
getTo()->printAsOperand(OS, false);
}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD void dump() const { print(dbgs()); }
#endif
};
// LegalizeUpdates function simplifies updates assuming a graph structure.
// This function serves double purpose:
// a) It removes redundant updates, which makes it easier to reverse-apply
// them when traversing CFG.
// b) It optimizes away updates that cancel each other out, as the end result
// is the same.
template <typename NodePtr>
void LegalizeUpdates(ArrayRef<Update<NodePtr>> AllUpdates,
SmallVectorImpl<Update<NodePtr>> &Result,
bool InverseGraph, bool ReverseResultOrder = false) {
// Count the total number of inserions of each edge.
// Each insertion adds 1 and deletion subtracts 1. The end number should be
// one of {-1 (deletion), 0 (NOP), +1 (insertion)}. Otherwise, the sequence
// of updates contains multiple updates of the same kind and we assert for
// that case.
SmallDenseMap<std::pair<NodePtr, NodePtr>, int, 4> Operations;
Operations.reserve(AllUpdates.size());
for (const auto &U : AllUpdates) {
NodePtr From = U.getFrom();
NodePtr To = U.getTo();
if (InverseGraph)
std::swap(From, To); // Reverse edge for postdominators.
Operations[{From, To}] += (U.getKind() == UpdateKind::Insert ? 1 : -1);
}
Result.clear();
Result.reserve(Operations.size());
for (auto &Op : Operations) {
const int NumInsertions = Op.second;
assert(std::abs(NumInsertions) <= 1 && "Unbalanced operations!");
if (NumInsertions == 0)
continue;
const UpdateKind UK =
NumInsertions > 0 ? UpdateKind::Insert : UpdateKind::Delete;
Result.push_back({UK, Op.first.first, Op.first.second});
}
// Make the order consistent by not relying on pointer values within the
// set. Reuse the old Operations map.
// In the future, we should sort by something else to minimize the amount
// of work needed to perform the series of updates.
for (size_t i = 0, e = AllUpdates.size(); i != e; ++i) {
const auto &U = AllUpdates[i];
if (!InverseGraph)
Operations[{U.getFrom(), U.getTo()}] = int(i);
else
Operations[{U.getTo(), U.getFrom()}] = int(i);
}
llvm::sort(Result, [&](const Update<NodePtr> &A, const Update<NodePtr> &B) {
const auto &OpA = Operations[{A.getFrom(), A.getTo()}];
const auto &OpB = Operations[{B.getFrom(), B.getTo()}];
return ReverseResultOrder ? OpA < OpB : OpA > OpB;
});
}
} // end namespace cfg
} // end namespace llvm
#endif // LLVM_SUPPORT_CFGUPDATE_H
PK hwFZ�K�[ [ Support/BinaryItemStream.hnu �[��� //===- BinaryItemStream.h ---------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_BINARYITEMSTREAM_H
#define LLVM_SUPPORT_BINARYITEMSTREAM_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/Support/BinaryStream.h"
#include "llvm/Support/BinaryStreamError.h"
#include "llvm/Support/Error.h"
#include <cstddef>
#include <cstdint>
namespace llvm {
template <typename T> struct BinaryItemTraits {
static size_t length(const T &Item) = delete;
static ArrayRef<uint8_t> bytes(const T &Item) = delete;
};
/// BinaryItemStream represents a sequence of objects stored in some kind of
/// external container but for which it is useful to view as a stream of
/// contiguous bytes. An example of this might be if you have a collection of
/// records and you serialize each one into a buffer, and store these serialized
/// records in a container. The pointers themselves are not laid out
/// contiguously in memory, but we may wish to read from or write to these
/// records as if they were.
template <typename T, typename Traits = BinaryItemTraits<T>>
class BinaryItemStream : public BinaryStream {
public:
explicit BinaryItemStream(llvm::support::endianness Endian)
: Endian(Endian) {}
llvm::support::endianness getEndian() const override { return Endian; }
Error readBytes(uint64_t Offset, uint64_t Size,
ArrayRef<uint8_t> &Buffer) override {
auto ExpectedIndex = translateOffsetIndex(Offset);
if (!ExpectedIndex)
return ExpectedIndex.takeError();
const auto &Item = Items[*ExpectedIndex];
if (auto EC = checkOffsetForRead(Offset, Size))
return EC;
if (Size > Traits::length(Item))
return make_error<BinaryStreamError>(stream_error_code::stream_too_short);
Buffer = Traits::bytes(Item).take_front(Size);
return Error::success();
}
Error readLongestContiguousChunk(uint64_t Offset,
ArrayRef<uint8_t> &Buffer) override {
auto ExpectedIndex = translateOffsetIndex(Offset);
if (!ExpectedIndex)
return ExpectedIndex.takeError();
Buffer = Traits::bytes(Items[*ExpectedIndex]);
return Error::success();
}
void setItems(ArrayRef<T> ItemArray) {
Items = ItemArray;
computeItemOffsets();
}
uint64_t getLength() override {
return ItemEndOffsets.empty() ? 0 : ItemEndOffsets.back();
}
private:
void computeItemOffsets() {
ItemEndOffsets.clear();
ItemEndOffsets.reserve(Items.size());
uint64_t CurrentOffset = 0;
for (const auto &Item : Items) {
uint64_t Len = Traits::length(Item);
assert(Len > 0 && "no empty items");
CurrentOffset += Len;
ItemEndOffsets.push_back(CurrentOffset);
}
}
Expected<uint32_t> translateOffsetIndex(uint64_t Offset) {
// Make sure the offset is somewhere in our items array.
if (Offset >= getLength())
return make_error<BinaryStreamError>(stream_error_code::stream_too_short);
++Offset;
auto Iter = llvm::lower_bound(ItemEndOffsets, Offset);
size_t Idx = std::distance(ItemEndOffsets.begin(), Iter);
assert(Idx < Items.size() && "binary search for offset failed");
return Idx;
}
llvm::support::endianness Endian;
ArrayRef<T> Items;
// Sorted vector of offsets to accelerate lookup.
std::vector<uint64_t> ItemEndOffsets;
};
} // end namespace llvm
#endif // LLVM_SUPPORT_BINARYITEMSTREAM_H
PK hwFZ[
� Support/AtomicOrdering.hnu �[��� //===-- llvm/Support/AtomicOrdering.h ---Atomic Ordering---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// Atomic ordering constants.
///
/// These values are used by LLVM to represent atomic ordering for C++11's
/// memory model and more, as detailed in docs/Atomics.rst.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ATOMICORDERING_H
#define LLVM_SUPPORT_ATOMICORDERING_H
#include <cstddef>
namespace llvm {
/// Atomic ordering for C11 / C++11's memory models.
///
/// These values cannot change because they are shared with standard library
/// implementations as well as with other compilers.
enum class AtomicOrderingCABI {
relaxed = 0,
consume = 1,
acquire = 2,
release = 3,
acq_rel = 4,
seq_cst = 5,
};
bool operator<(AtomicOrderingCABI, AtomicOrderingCABI) = delete;
bool operator>(AtomicOrderingCABI, AtomicOrderingCABI) = delete;
bool operator<=(AtomicOrderingCABI, AtomicOrderingCABI) = delete;
bool operator>=(AtomicOrderingCABI, AtomicOrderingCABI) = delete;
// Validate an integral value which isn't known to fit within the enum's range
// is a valid AtomicOrderingCABI.
template <typename Int> inline bool isValidAtomicOrderingCABI(Int I) {
return (Int)AtomicOrderingCABI::relaxed <= I &&
I <= (Int)AtomicOrderingCABI::seq_cst;
}
/// Atomic ordering for LLVM's memory model.
///
/// C++ defines ordering as a lattice. LLVM supplements this with NotAtomic and
/// Unordered, which are both below the C++ orders.
///
/// not_atomic-->unordered-->relaxed-->release--------------->acq_rel-->seq_cst
/// \-->consume-->acquire--/
enum class AtomicOrdering : unsigned {
NotAtomic = 0,
Unordered = 1,
Monotonic = 2, // Equivalent to C++'s relaxed.
// Consume = 3, // Not specified yet.
Acquire = 4,
Release = 5,
AcquireRelease = 6,
SequentiallyConsistent = 7,
LAST = SequentiallyConsistent
};
bool operator<(AtomicOrdering, AtomicOrdering) = delete;
bool operator>(AtomicOrdering, AtomicOrdering) = delete;
bool operator<=(AtomicOrdering, AtomicOrdering) = delete;
bool operator>=(AtomicOrdering, AtomicOrdering) = delete;
// Validate an integral value which isn't known to fit within the enum's range
// is a valid AtomicOrdering.
template <typename Int> inline bool isValidAtomicOrdering(Int I) {
return static_cast<Int>(AtomicOrdering::NotAtomic) <= I &&
I <= static_cast<Int>(AtomicOrdering::SequentiallyConsistent) &&
I != 3;
}
/// String used by LLVM IR to represent atomic ordering.
inline const char *toIRString(AtomicOrdering ao) {
static const char *names[8] = {"not_atomic", "unordered", "monotonic",
"consume", "acquire", "release",
"acq_rel", "seq_cst"};
return names[static_cast<size_t>(ao)];
}
/// Returns true if ao is stronger than other as defined by the AtomicOrdering
/// lattice, which is based on C++'s definition.
inline bool isStrongerThan(AtomicOrdering AO, AtomicOrdering Other) {
static const bool lookup[8][8] = {
// NA UN RX CO AC RE AR SC
/* NotAtomic */ {false, false, false, false, false, false, false, false},
/* Unordered */ { true, false, false, false, false, false, false, false},
/* relaxed */ { true, true, false, false, false, false, false, false},
/* consume */ { true, true, true, false, false, false, false, false},
/* acquire */ { true, true, true, true, false, false, false, false},
/* release */ { true, true, true, false, false, false, false, false},
/* acq_rel */ { true, true, true, true, true, true, false, false},
/* seq_cst */ { true, true, true, true, true, true, true, false},
};
return lookup[static_cast<size_t>(AO)][static_cast<size_t>(Other)];
}
inline bool isAtLeastOrStrongerThan(AtomicOrdering AO, AtomicOrdering Other) {
static const bool lookup[8][8] = {
// NA UN RX CO AC RE AR SC
/* NotAtomic */ { true, false, false, false, false, false, false, false},
/* Unordered */ { true, true, false, false, false, false, false, false},
/* relaxed */ { true, true, true, false, false, false, false, false},
/* consume */ { true, true, true, true, false, false, false, false},
/* acquire */ { true, true, true, true, true, false, false, false},
/* release */ { true, true, true, false, false, true, false, false},
/* acq_rel */ { true, true, true, true, true, true, true, false},
/* seq_cst */ { true, true, true, true, true, true, true, true},
};
return lookup[static_cast<size_t>(AO)][static_cast<size_t>(Other)];
}
inline bool isStrongerThanUnordered(AtomicOrdering AO) {
return isStrongerThan(AO, AtomicOrdering::Unordered);
}
inline bool isStrongerThanMonotonic(AtomicOrdering AO) {
return isStrongerThan(AO, AtomicOrdering::Monotonic);
}
inline bool isAcquireOrStronger(AtomicOrdering AO) {
return isAtLeastOrStrongerThan(AO, AtomicOrdering::Acquire);
}
inline bool isReleaseOrStronger(AtomicOrdering AO) {
return isAtLeastOrStrongerThan(AO, AtomicOrdering::Release);
}
/// Return a single atomic ordering that is at least as strong as both the \p AO
/// and \p Other orderings for an atomic operation.
inline AtomicOrdering getMergedAtomicOrdering(AtomicOrdering AO,
AtomicOrdering Other) {
if ((AO == AtomicOrdering::Acquire && Other == AtomicOrdering::Release) ||
(AO == AtomicOrdering::Release && Other == AtomicOrdering::Acquire))
return AtomicOrdering::AcquireRelease;
return isStrongerThan(AO, Other) ? AO : Other;
}
inline AtomicOrderingCABI toCABI(AtomicOrdering AO) {
static const AtomicOrderingCABI lookup[8] = {
/* NotAtomic */ AtomicOrderingCABI::relaxed,
/* Unordered */ AtomicOrderingCABI::relaxed,
/* relaxed */ AtomicOrderingCABI::relaxed,
/* consume */ AtomicOrderingCABI::consume,
/* acquire */ AtomicOrderingCABI::acquire,
/* release */ AtomicOrderingCABI::release,
/* acq_rel */ AtomicOrderingCABI::acq_rel,
/* seq_cst */ AtomicOrderingCABI::seq_cst,
};
return lookup[static_cast<size_t>(AO)];
}
} // end namespace llvm
#endif // LLVM_SUPPORT_ATOMICORDERING_H
PK hwFZ�$)-� � Support/PointerLikeTypeTraits.hnu �[��� //===- llvm/Support/PointerLikeTypeTraits.h - Pointer Traits ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the PointerLikeTypeTraits class. This allows data
// structures to reason about pointers and other things that are pointer sized.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_POINTERLIKETYPETRAITS_H
#define LLVM_SUPPORT_POINTERLIKETYPETRAITS_H
#include "llvm/Support/DataTypes.h"
#include <cassert>
#include <type_traits>
namespace llvm {
/// A traits type that is used to handle pointer types and things that are just
/// wrappers for pointers as a uniform entity.
template <typename T> struct PointerLikeTypeTraits;
namespace detail {
/// A tiny meta function to compute the log2 of a compile time constant.
template <size_t N>
struct ConstantLog2
: std::integral_constant<size_t, ConstantLog2<N / 2>::value + 1> {};
template <> struct ConstantLog2<1> : std::integral_constant<size_t, 0> {};
// Provide a trait to check if T is pointer-like.
template <typename T, typename U = void> struct HasPointerLikeTypeTraits {
static const bool value = false;
};
// sizeof(T) is valid only for a complete T.
template <typename T>
struct HasPointerLikeTypeTraits<
T, decltype((sizeof(PointerLikeTypeTraits<T>) + sizeof(T)), void())> {
static const bool value = true;
};
template <typename T> struct IsPointerLike {
static const bool value = HasPointerLikeTypeTraits<T>::value;
};
template <typename T> struct IsPointerLike<T *> {
static const bool value = true;
};
} // namespace detail
// Provide PointerLikeTypeTraits for non-cvr pointers.
template <typename T> struct PointerLikeTypeTraits<T *> {
static inline void *getAsVoidPointer(T *P) { return P; }
static inline T *getFromVoidPointer(void *P) { return static_cast<T *>(P); }
static constexpr int NumLowBitsAvailable =
detail::ConstantLog2<alignof(T)>::value;
};
template <> struct PointerLikeTypeTraits<void *> {
static inline void *getAsVoidPointer(void *P) { return P; }
static inline void *getFromVoidPointer(void *P) { return P; }
/// Note, we assume here that void* is related to raw malloc'ed memory and
/// that malloc returns objects at least 4-byte aligned. However, this may be
/// wrong, or pointers may be from something other than malloc. In this case,
/// you should specify a real typed pointer or avoid this template.
///
/// All clients should use assertions to do a run-time check to ensure that
/// this is actually true.
static constexpr int NumLowBitsAvailable = 2;
};
// Provide PointerLikeTypeTraits for const things.
template <typename T> struct PointerLikeTypeTraits<const T> {
typedef PointerLikeTypeTraits<T> NonConst;
static inline const void *getAsVoidPointer(const T P) {
return NonConst::getAsVoidPointer(P);
}
static inline const T getFromVoidPointer(const void *P) {
return NonConst::getFromVoidPointer(const_cast<void *>(P));
}
static constexpr int NumLowBitsAvailable = NonConst::NumLowBitsAvailable;
};
// Provide PointerLikeTypeTraits for const pointers.
template <typename T> struct PointerLikeTypeTraits<const T *> {
typedef PointerLikeTypeTraits<T *> NonConst;
static inline const void *getAsVoidPointer(const T *P) {
return NonConst::getAsVoidPointer(const_cast<T *>(P));
}
static inline const T *getFromVoidPointer(const void *P) {
return NonConst::getFromVoidPointer(const_cast<void *>(P));
}
static constexpr int NumLowBitsAvailable = NonConst::NumLowBitsAvailable;
};
// Provide PointerLikeTypeTraits for uintptr_t.
template <> struct PointerLikeTypeTraits<uintptr_t> {
static inline void *getAsVoidPointer(uintptr_t P) {
return reinterpret_cast<void *>(P);
}
static inline uintptr_t getFromVoidPointer(void *P) {
return reinterpret_cast<uintptr_t>(P);
}
// No bits are available!
static constexpr int NumLowBitsAvailable = 0;
};
/// Provide suitable custom traits struct for function pointers.
///
/// Function pointers can't be directly given these traits as functions can't
/// have their alignment computed with `alignof` and we need different casting.
///
/// To rely on higher alignment for a specialized use, you can provide a
/// customized form of this template explicitly with higher alignment, and
/// potentially use alignment attributes on functions to satisfy that.
template <int Alignment, typename FunctionPointerT>
struct FunctionPointerLikeTypeTraits {
static constexpr int NumLowBitsAvailable =
detail::ConstantLog2<Alignment>::value;
static inline void *getAsVoidPointer(FunctionPointerT P) {
assert((reinterpret_cast<uintptr_t>(P) &
~((uintptr_t)-1 << NumLowBitsAvailable)) == 0 &&
"Alignment not satisfied for an actual function pointer!");
return reinterpret_cast<void *>(P);
}
static inline FunctionPointerT getFromVoidPointer(void *P) {
return reinterpret_cast<FunctionPointerT>(P);
}
};
/// Provide a default specialization for function pointers that assumes 4-byte
/// alignment.
///
/// We assume here that functions used with this are always at least 4-byte
/// aligned. This means that, for example, thumb functions won't work or systems
/// with weird unaligned function pointers won't work. But all practical systems
/// we support satisfy this requirement.
template <typename ReturnT, typename... ParamTs>
struct PointerLikeTypeTraits<ReturnT (*)(ParamTs...)>
: FunctionPointerLikeTypeTraits<4, ReturnT (*)(ParamTs...)> {};
} // end namespace llvm
#endif
PK hwFZ�Ĝ7� � Support/ExtensibleRTTI.hnu �[��� //===-- llvm/Support/ExtensibleRTTI.h - ExtensibleRTTI support --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// \file
//
// Defines an extensible RTTI mechanism designed to work with Casting.h.
//
// Extensible RTTI differs from LLVM's primary RTTI mechanism (see
// llvm.org/docs/HowToSetUpLLVMStyleRTTI.html) by supporting open type
// hierarchies, where new types can be added from outside libraries without
// needing to change existing code. LLVM's primary RTTI mechanism should be
// preferred where possible, but where open hierarchies are needed this system
// can be used.
//
// The RTTIRoot class defines methods for comparing type ids. Implementations
// of these methods can be injected into new classes using the RTTIExtends
// class template.
//
// E.g.
//
// @code{.cpp}
// class MyBaseClass : public RTTIExtends<MyBaseClass, RTTIRoot> {
// public:
// static char ID;
// virtual void foo() = 0;
// };
//
// class MyDerivedClass1 : public RTTIExtends<MyDerivedClass1, MyBaseClass> {
// public:
// static char ID;
// void foo() override {}
// };
//
// class MyDerivedClass2 : public RTTIExtends<MyDerivedClass2, MyBaseClass> {
// public:
// static char ID;
// void foo() override {}
// };
//
// char MyBaseClass::ID = 0;
// char MyDerivedClass1::ID = 0;
// char MyDerivedClass2:: ID = 0;
//
// void fn() {
// std::unique_ptr<MyBaseClass> B = llvm::make_unique<MyDerivedClass1>();
// llvm::outs() << isa<MyBaseClass>(B) << "\n"; // Outputs "1".
// llvm::outs() << isa<MyDerivedClass1>(B) << "\n"; // Outputs "1".
// llvm::outs() << isa<MyDerivedClass2>(B) << "\n"; // Outputs "0'.
// }
//
// @endcode
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_EXTENSIBLERTTI_H
#define LLVM_SUPPORT_EXTENSIBLERTTI_H
namespace llvm {
/// Base class for the extensible RTTI hierarchy.
///
/// This class defines virtual methods, dynamicClassID and isA, that enable
/// type comparisons.
class RTTIRoot {
public:
virtual ~RTTIRoot() = default;
/// Returns the class ID for this type.
static const void *classID() { return &ID; }
/// Returns the class ID for the dynamic type of this RTTIRoot instance.
virtual const void *dynamicClassID() const = 0;
/// Returns true if this class's ID matches the given class ID.
virtual bool isA(const void *const ClassID) const {
return ClassID == classID();
}
/// Check whether this instance is a subclass of QueryT.
template <typename QueryT>
bool isA() const { return isA(QueryT::classID()); }
private:
virtual void anchor();
static char ID;
};
/// Inheritance utility for extensible RTTI.
///
/// Supports single inheritance only: A class can only have one
/// ExtensibleRTTI-parent (i.e. a parent for which the isa<> test will work),
/// though it can have many non-ExtensibleRTTI parents.
///
/// RTTIExtents uses CRTP so the first template argument to RTTIExtends is the
/// newly introduced type, and the *second* argument is the parent class.
///
/// class MyType : public RTTIExtends<MyType, RTTIRoot> {
/// public:
/// static char ID;
/// };
///
/// class MyDerivedType : public RTTIExtends<MyDerivedType, MyType> {
/// public:
/// static char ID;
/// };
///
template <typename ThisT, typename ParentT>
class RTTIExtends : public ParentT {
public:
// Inherit constructors from ParentT.
using ParentT::ParentT;
static const void *classID() { return &ThisT::ID; }
const void *dynamicClassID() const override { return &ThisT::ID; }
bool isA(const void *const ClassID) const override {
return ClassID == classID() || ParentT::isA(ClassID);
}
static bool classof(const RTTIRoot *R) { return R->isA<ThisT>(); }
};
} // end namespace llvm
#endif // LLVM_SUPPORT_EXTENSIBLERTTI_H
PK hwFZ@ñi2 2
Support/DJB.hnu �[��� //===-- llvm/Support/DJB.h ---DJB Hash --------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains support for the DJ Bernstein hash function.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_DJB_H
#define LLVM_SUPPORT_DJB_H
#include "llvm/ADT/StringRef.h"
namespace llvm {
/// The Bernstein hash function used by the DWARF accelerator tables.
inline uint32_t djbHash(StringRef Buffer, uint32_t H = 5381) {
for (unsigned char C : Buffer.bytes())
H = (H << 5) + H + C;
return H;
}
/// Computes the Bernstein hash after folding the input according to the Dwarf 5
/// standard case folding rules.
uint32_t caseFoldingDjbHash(StringRef Buffer, uint32_t H = 5381);
} // namespace llvm
#endif // LLVM_SUPPORT_DJB_H
PK hwFZw �� � Support/DebugCounter.hnu �[��� //===- llvm/Support/DebugCounter.h - Debug counter support ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This file provides an implementation of debug counters. Debug
/// counters are a tool that let you narrow down a miscompilation to a specific
/// thing happening.
///
/// To give a use case: Imagine you have a file, very large, and you
/// are trying to understand the minimal transformation that breaks it. Bugpoint
/// and bisection is often helpful here in narrowing it down to a specific pass,
/// but it's still a very large file, and a very complicated pass to try to
/// debug. That is where debug counting steps in. You can instrument the pass
/// with a debug counter before it does a certain thing, and depending on the
/// counts, it will either execute that thing or not. The debug counter itself
/// consists of a skip and a count. Skip is the number of times shouldExecute
/// needs to be called before it returns true. Count is the number of times to
/// return true once Skip is 0. So a skip=47, count=2 ,would skip the first 47
/// executions by returning false from shouldExecute, then execute twice, and
/// then return false again.
/// Note that a counter set to a negative number will always execute.
/// For a concrete example, during predicateinfo creation, the renaming pass
/// replaces each use with a renamed use.
////
/// If I use DEBUG_COUNTER to create a counter called "predicateinfo", and
/// variable name RenameCounter, and then instrument this renaming with a debug
/// counter, like so:
///
/// if (!DebugCounter::shouldExecute(RenameCounter)
/// <continue or return or whatever not executing looks like>
///
/// Now I can, from the command line, make it rename or not rename certain uses
/// by setting the skip and count.
/// So for example
/// bin/opt -debug-counter=predicateinfo-skip=47,predicateinfo-count=1
/// will skip renaming the first 47 uses, then rename one, then skip the rest.
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_DEBUGCOUNTER_H
#define LLVM_SUPPORT_DEBUGCOUNTER_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/UniqueVector.h"
#include "llvm/Support/Debug.h"
#include <string>
namespace llvm {
class raw_ostream;
class DebugCounter {
public:
/// Returns a reference to the singleton instance.
static DebugCounter &instance();
// Used by the command line option parser to push a new value it parsed.
void push_back(const std::string &);
// Register a counter with the specified name.
//
// FIXME: Currently, counter registration is required to happen before command
// line option parsing. The main reason to register counters is to produce a
// nice list of them on the command line, but i'm not sure this is worth it.
static unsigned registerCounter(StringRef Name, StringRef Desc) {
return instance().addCounter(std::string(Name), std::string(Desc));
}
inline static bool shouldExecute(unsigned CounterName) {
if (!isCountingEnabled())
return true;
auto &Us = instance();
auto Result = Us.Counters.find(CounterName);
if (Result != Us.Counters.end()) {
auto &CounterInfo = Result->second;
++CounterInfo.Count;
// We only execute while the Skip is not smaller than Count,
// and the StopAfter + Skip is larger than Count.
// Negative counters always execute.
if (CounterInfo.Skip < 0)
return true;
if (CounterInfo.Skip >= CounterInfo.Count)
return false;
if (CounterInfo.StopAfter < 0)
return true;
return CounterInfo.StopAfter + CounterInfo.Skip >= CounterInfo.Count;
}
// Didn't find the counter, should we warn?
return true;
}
// Return true if a given counter had values set (either programatically or on
// the command line). This will return true even if those values are
// currently in a state where the counter will always execute.
static bool isCounterSet(unsigned ID) {
return instance().Counters[ID].IsSet;
}
// Return the Count for a counter. This only works for set counters.
static int64_t getCounterValue(unsigned ID) {
auto &Us = instance();
auto Result = Us.Counters.find(ID);
assert(Result != Us.Counters.end() && "Asking about a non-set counter");
return Result->second.Count;
}
// Set a registered counter to a given Count value.
static void setCounterValue(unsigned ID, int64_t Count) {
auto &Us = instance();
Us.Counters[ID].Count = Count;
}
// Dump or print the current counter set into llvm::dbgs().
LLVM_DUMP_METHOD void dump() const;
void print(raw_ostream &OS) const;
// Get the counter ID for a given named counter, or return 0 if none is found.
unsigned getCounterId(const std::string &Name) const {
return RegisteredCounters.idFor(Name);
}
// Return the number of registered counters.
unsigned int getNumCounters() const { return RegisteredCounters.size(); }
// Return the name and description of the counter with the given ID.
std::pair<std::string, std::string> getCounterInfo(unsigned ID) const {
return std::make_pair(RegisteredCounters[ID], Counters.lookup(ID).Desc);
}
// Iterate through the registered counters
typedef UniqueVector<std::string> CounterVector;
CounterVector::const_iterator begin() const {
return RegisteredCounters.begin();
}
CounterVector::const_iterator end() const { return RegisteredCounters.end(); }
// Force-enables counting all DebugCounters.
//
// Since DebugCounters are incompatible with threading (not only do they not
// make sense, but we'll also see data races), this should only be used in
// contexts where we're certain we won't spawn threads.
static void enableAllCounters() { instance().Enabled = true; }
static bool isCountingEnabled() {
// Compile to nothing when debugging is off
#ifdef NDEBUG
return false;
#else
return instance().Enabled;
#endif
}
private:
unsigned addCounter(const std::string &Name, const std::string &Desc) {
unsigned Result = RegisteredCounters.insert(Name);
Counters[Result] = {};
Counters[Result].Desc = Desc;
return Result;
}
// Struct to store counter info.
struct CounterInfo {
int64_t Count = 0;
int64_t Skip = 0;
int64_t StopAfter = -1;
bool IsSet = false;
std::string Desc;
};
DenseMap<unsigned, CounterInfo> Counters;
CounterVector RegisteredCounters;
// Whether we should do DebugCounting at all. DebugCounters aren't
// thread-safe, so this should always be false in multithreaded scenarios.
bool Enabled = false;
};
#define DEBUG_COUNTER(VARNAME, COUNTERNAME, DESC) \
static const unsigned VARNAME = \
DebugCounter::registerCounter(COUNTERNAME, DESC)
} // namespace llvm
#endif
PK hwFZ�h�r r Support/CFGDiff.hnu �[��� //===- CFGDiff.h - Define a CFG snapshot. -----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines specializations of GraphTraits that allows generic
// algorithms to see a different snapshot of a CFG.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_CFGDIFF_H
#define LLVM_SUPPORT_CFGDIFF_H
#include "llvm/ADT/GraphTraits.h"
#include "llvm/ADT/iterator.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/Support/CFGUpdate.h"
#include "llvm/Support/type_traits.h"
#include <cassert>
#include <cstddef>
#include <iterator>
// Two booleans are used to define orders in graphs:
// InverseGraph defines when we need to reverse the whole graph and is as such
// also equivalent to applying updates in reverse.
// InverseEdge defines whether we want to change the edges direction. E.g., for
// a non-inversed graph, the children are naturally the successors when
// InverseEdge is false and the predecessors when InverseEdge is true.
namespace llvm {
namespace detail {
template <typename Range>
auto reverse_if_helper(Range &&R, std::integral_constant<bool, false>) {
return std::forward<Range>(R);
}
template <typename Range>
auto reverse_if_helper(Range &&R, std::integral_constant<bool, true>) {
return llvm::reverse(std::forward<Range>(R));
}
template <bool B, typename Range> auto reverse_if(Range &&R) {
return reverse_if_helper(std::forward<Range>(R),
std::integral_constant<bool, B>{});
}
} // namespace detail
// GraphDiff defines a CFG snapshot: given a set of Update<NodePtr>, provides
// a getChildren method to get a Node's children based on the additional updates
// in the snapshot. The current diff treats the CFG as a graph rather than a
// multigraph. Added edges are pruned to be unique, and deleted edges will
// remove all existing edges between two blocks.
template <typename NodePtr, bool InverseGraph = false> class GraphDiff {
struct DeletesInserts {
SmallVector<NodePtr, 2> DI[2];
};
using UpdateMapType = SmallDenseMap<NodePtr, DeletesInserts>;
UpdateMapType Succ;
UpdateMapType Pred;
// By default, it is assumed that, given a CFG and a set of updates, we wish
// to apply these updates as given. If UpdatedAreReverseApplied is set, the
// updates will be applied in reverse: deleted edges are considered re-added
// and inserted edges are considered deleted when returning children.
bool UpdatedAreReverseApplied;
// Keep the list of legalized updates for a deterministic order of updates
// when using a GraphDiff for incremental updates in the DominatorTree.
// The list is kept in reverse to allow popping from end.
SmallVector<cfg::Update<NodePtr>, 4> LegalizedUpdates;
void printMap(raw_ostream &OS, const UpdateMapType &M) const {
StringRef DIText[2] = {"Delete", "Insert"};
for (auto Pair : M) {
for (unsigned IsInsert = 0; IsInsert <= 1; ++IsInsert) {
OS << DIText[IsInsert] << " edges: \n";
for (auto Child : Pair.second.DI[IsInsert]) {
OS << "(";
Pair.first->printAsOperand(OS, false);
OS << ", ";
Child->printAsOperand(OS, false);
OS << ") ";
}
}
}
OS << "\n";
}
public:
GraphDiff() : UpdatedAreReverseApplied(false) {}
GraphDiff(ArrayRef<cfg::Update<NodePtr>> Updates,
bool ReverseApplyUpdates = false) {
cfg::LegalizeUpdates<NodePtr>(Updates, LegalizedUpdates, InverseGraph);
for (auto U : LegalizedUpdates) {
unsigned IsInsert =
(U.getKind() == cfg::UpdateKind::Insert) == !ReverseApplyUpdates;
Succ[U.getFrom()].DI[IsInsert].push_back(U.getTo());
Pred[U.getTo()].DI[IsInsert].push_back(U.getFrom());
}
UpdatedAreReverseApplied = ReverseApplyUpdates;
}
auto getLegalizedUpdates() const {
return make_range(LegalizedUpdates.begin(), LegalizedUpdates.end());
}
unsigned getNumLegalizedUpdates() const { return LegalizedUpdates.size(); }
cfg::Update<NodePtr> popUpdateForIncrementalUpdates() {
assert(!LegalizedUpdates.empty() && "No updates to apply!");
auto U = LegalizedUpdates.pop_back_val();
unsigned IsInsert =
(U.getKind() == cfg::UpdateKind::Insert) == !UpdatedAreReverseApplied;
auto &SuccDIList = Succ[U.getFrom()];
auto &SuccList = SuccDIList.DI[IsInsert];
assert(SuccList.back() == U.getTo());
SuccList.pop_back();
if (SuccList.empty() && SuccDIList.DI[!IsInsert].empty())
Succ.erase(U.getFrom());
auto &PredDIList = Pred[U.getTo()];
auto &PredList = PredDIList.DI[IsInsert];
assert(PredList.back() == U.getFrom());
PredList.pop_back();
if (PredList.empty() && PredDIList.DI[!IsInsert].empty())
Pred.erase(U.getTo());
return U;
}
using VectRet = SmallVector<NodePtr, 8>;
template <bool InverseEdge> VectRet getChildren(NodePtr N) const {
using DirectedNodeT =
std::conditional_t<InverseEdge, Inverse<NodePtr>, NodePtr>;
auto R = children<DirectedNodeT>(N);
VectRet Res = VectRet(detail::reverse_if<!InverseEdge>(R));
// Remove nullptr children for clang.
llvm::erase_value(Res, nullptr);
auto &Children = (InverseEdge != InverseGraph) ? Pred : Succ;
auto It = Children.find(N);
if (It == Children.end())
return Res;
// Remove children present in the CFG but not in the snapshot.
for (auto *Child : It->second.DI[0])
llvm::erase_value(Res, Child);
// Add children present in the snapshot for not in the real CFG.
auto &AddedChildren = It->second.DI[1];
llvm::append_range(Res, AddedChildren);
return Res;
}
void print(raw_ostream &OS) const {
OS << "===== GraphDiff: CFG edge changes to create a CFG snapshot. \n"
"===== (Note: notion of children/inverse_children depends on "
"the direction of edges and the graph.)\n";
OS << "Children to delete/insert:\n\t";
printMap(OS, Succ);
OS << "Inverse_children to delete/insert:\n\t";
printMap(OS, Pred);
OS << "\n";
}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD void dump() const { print(dbgs()); }
#endif
};
} // end namespace llvm
#endif // LLVM_SUPPORT_CFGDIFF_H
PK hwFZъn:6 6 Support/Debug.hnu �[��� //===- llvm/Support/Debug.h - Easy way to add debug output ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements a handy way of adding debugging information to your
// code, without it being enabled all of the time, and without having to add
// command line options to enable it.
//
// In particular, just wrap your code with the LLVM_DEBUG() macro, and it will
// be enabled automatically if you specify '-debug' on the command-line.
// LLVM_DEBUG() requires the DEBUG_TYPE macro to be defined. Set it to "foo"
// specify that your debug code belongs to class "foo". Be careful that you only
// do this after including Debug.h and not around any #include of headers.
// Headers should define and undef the macro acround the code that needs to use
// the LLVM_DEBUG() macro. Then, on the command line, you can specify
// '-debug-only=foo' to enable JUST the debug information for the foo class.
//
// When compiling without assertions, the -debug-* options and all code in
// LLVM_DEBUG() statements disappears, so it does not affect the runtime of the
// code.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_DEBUG_H
#define LLVM_SUPPORT_DEBUG_H
namespace llvm {
class raw_ostream;
#ifndef NDEBUG
/// isCurrentDebugType - Return true if the specified string is the debug type
/// specified on the command line, or if none was specified on the command line
/// with the -debug-only=X option.
///
bool isCurrentDebugType(const char *Type);
/// setCurrentDebugType - Set the current debug type, as if the -debug-only=X
/// option were specified. Note that DebugFlag also needs to be set to true for
/// debug output to be produced.
///
void setCurrentDebugType(const char *Type);
/// setCurrentDebugTypes - Set the current debug type, as if the
/// -debug-only=X,Y,Z option were specified. Note that DebugFlag
/// also needs to be set to true for debug output to be produced.
///
void setCurrentDebugTypes(const char **Types, unsigned Count);
/// DEBUG_WITH_TYPE macro - This macro should be used by passes to emit debug
/// information. In the '-debug' option is specified on the commandline, and if
/// this is a debug build, then the code specified as the option to the macro
/// will be executed. Otherwise it will not be. Example:
///
/// DEBUG_WITH_TYPE("bitset", dbgs() << "Bitset contains: " << Bitset << "\n");
///
/// This will emit the debug information if -debug is present, and -debug-only
/// is not specified, or is specified as "bitset".
#define DEBUG_WITH_TYPE(TYPE, X) \
do { if (::llvm::DebugFlag && ::llvm::isCurrentDebugType(TYPE)) { X; } \
} while (false)
#else
#define isCurrentDebugType(X) (false)
#define setCurrentDebugType(X) do { (void)(X); } while (false)
#define setCurrentDebugTypes(X, N) do { (void)(X); (void)(N); } while (false)
#define DEBUG_WITH_TYPE(TYPE, X) do { } while (false)
#endif
/// This boolean is set to true if the '-debug' command line option
/// is specified. This should probably not be referenced directly, instead, use
/// the DEBUG macro below.
///
extern bool DebugFlag;
/// EnableDebugBuffering - This defaults to false. If true, the debug
/// stream will install signal handlers to dump any buffered debug
/// output. It allows clients to selectively allow the debug stream
/// to install signal handlers if they are certain there will be no
/// conflict.
///
extern bool EnableDebugBuffering;
/// dbgs() - This returns a reference to a raw_ostream for debugging
/// messages. If debugging is disabled it returns errs(). Use it
/// like: dbgs() << "foo" << "bar";
raw_ostream &dbgs();
// DEBUG macro - This macro should be used by passes to emit debug information.
// In the '-debug' option is specified on the commandline, and if this is a
// debug build, then the code specified as the option to the macro will be
// executed. Otherwise it will not be. Example:
//
// LLVM_DEBUG(dbgs() << "Bitset contains: " << Bitset << "\n");
//
#define LLVM_DEBUG(X) DEBUG_WITH_TYPE(DEBUG_TYPE, X)
} // end namespace llvm
#endif // LLVM_SUPPORT_DEBUG_H
PK hwFZ��R^ Support/CodeGen.hnu �[��� //===-- llvm/Support/CodeGen.h - CodeGen Concepts ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file define some types which define code generation concepts. For
// example, relocation model.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_CODEGEN_H
#define LLVM_SUPPORT_CODEGEN_H
#include <cstdint>
#include <optional>
namespace llvm {
// Relocation model types.
namespace Reloc {
// Cannot be named PIC due to collision with -DPIC
enum Model { Static, PIC_, DynamicNoPIC, ROPI, RWPI, ROPI_RWPI };
}
// Code model types.
namespace CodeModel {
// Sync changes with CodeGenCWrappers.h.
enum Model { Tiny, Small, Kernel, Medium, Large };
}
namespace PICLevel {
// This is used to map -fpic/-fPIC.
enum Level { NotPIC=0, SmallPIC=1, BigPIC=2 };
}
namespace PIELevel {
enum Level { Default=0, Small=1, Large=2 };
}
// TLS models.
namespace TLSModel {
enum Model {
GeneralDynamic,
LocalDynamic,
InitialExec,
LocalExec
};
}
namespace CodeGenOpt {
/// Type for the unique integer IDs of code generation optimization levels.
using IDType = int;
/// Code generation optimization level.
enum Level : IDType {
None = 0, ///< -O0
Less = 1, ///< -O1
Default = 2, ///< -O2, -Os
Aggressive = 3 ///< -O3
};
/// Get the \c Level identified by the integer \p ID.
///
/// Returns std::nullopt if \p ID is invalid.
inline std::optional<Level> getLevel(IDType ID) {
if (ID < 0 || ID > 3)
return std::nullopt;
return static_cast<Level>(ID);
}
/// Parse \p C as a single digit integer ID and get matching \c Level.
///
/// Returns std::nullopt if the input is not a valid digit or not a valid ID.
inline std::optional<Level> parseLevel(char C) {
if (C < '0')
return std::nullopt;
return getLevel(static_cast<IDType>(C - '0'));
}
} // namespace CodeGenOpt
/// These enums are meant to be passed into addPassesToEmitFile to indicate
/// what type of file to emit, and returned by it to indicate what type of
/// file could actually be made.
enum CodeGenFileType {
CGFT_AssemblyFile,
CGFT_ObjectFile,
CGFT_Null // Do not emit any output.
};
// Specify what functions should keep the frame pointer.
enum class FramePointerKind { None, NonLeaf, All };
// Specify what type of zeroing callee-used registers.
namespace ZeroCallUsedRegs {
const unsigned ONLY_USED = 1U << 1;
const unsigned ONLY_GPR = 1U << 2;
const unsigned ONLY_ARG = 1U << 3;
enum class ZeroCallUsedRegsKind : unsigned int {
// Don't zero any call-used regs.
Skip = 1U << 0,
// Only zeros call-used GPRs used in the fn and pass args.
UsedGPRArg = ONLY_USED | ONLY_GPR | ONLY_ARG,
// Only zeros call-used GPRs used in the fn.
UsedGPR = ONLY_USED | ONLY_GPR,
// Only zeros call-used regs used in the fn and pass args.
UsedArg = ONLY_USED | ONLY_ARG,
// Only zeros call-used regs used in the fn.
Used = ONLY_USED,
// Zeros all call-used GPRs that pass args.
AllGPRArg = ONLY_GPR | ONLY_ARG,
// Zeros all call-used GPRs.
AllGPR = ONLY_GPR,
// Zeros all call-used regs that pass args.
AllArg = ONLY_ARG,
// Zeros all call-used regs.
All = 0,
};
} // namespace ZeroCallUsedRegs
enum class UWTableKind {
None = 0, ///< No unwind table requested
Sync = 1, ///< "Synchronous" unwind tables
Async = 2, ///< "Asynchronous" unwind tables (instr precise)
Default = 2,
};
enum class FunctionReturnThunksKind : unsigned int {
Keep = 0, ///< No function return thunk.
Extern = 1, ///< Replace returns with jump to thunk, don't emit thunk.
Invalid = 2, ///< Not used.
};
} // namespace llvm
#endif
PK hwFZ}.��i$ i$ Support/BinaryByteStream.hnu �[��� //===- BinaryByteStream.h ---------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//===----------------------------------------------------------------------===//
// A BinaryStream which stores data in a single continguous memory buffer.
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_BINARYBYTESTREAM_H
#define LLVM_SUPPORT_BINARYBYTESTREAM_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/BinaryStream.h"
#include "llvm/Support/BinaryStreamError.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/FileOutputBuffer.h"
#include "llvm/Support/MemoryBuffer.h"
#include <cstdint>
#include <cstring>
#include <memory>
namespace llvm {
/// An implementation of BinaryStream which holds its entire data set
/// in a single contiguous buffer. BinaryByteStream guarantees that no read
/// operation will ever incur a copy. Note that BinaryByteStream does not
/// own the underlying buffer.
class BinaryByteStream : public BinaryStream {
public:
BinaryByteStream() = default;
BinaryByteStream(ArrayRef<uint8_t> Data, llvm::support::endianness Endian)
: Endian(Endian), Data(Data) {}
BinaryByteStream(StringRef Data, llvm::support::endianness Endian)
: Endian(Endian), Data(Data.bytes_begin(), Data.bytes_end()) {}
llvm::support::endianness getEndian() const override { return Endian; }
Error readBytes(uint64_t Offset, uint64_t Size,
ArrayRef<uint8_t> &Buffer) override {
if (auto EC = checkOffsetForRead(Offset, Size))
return EC;
Buffer = Data.slice(Offset, Size);
return Error::success();
}
Error readLongestContiguousChunk(uint64_t Offset,
ArrayRef<uint8_t> &Buffer) override {
if (auto EC = checkOffsetForRead(Offset, 1))
return EC;
Buffer = Data.slice(Offset);
return Error::success();
}
uint64_t getLength() override { return Data.size(); }
ArrayRef<uint8_t> data() const { return Data; }
StringRef str() const {
const char *CharData = reinterpret_cast<const char *>(Data.data());
return StringRef(CharData, Data.size());
}
protected:
llvm::support::endianness Endian;
ArrayRef<uint8_t> Data;
};
/// An implementation of BinaryStream whose data is backed by an llvm
/// MemoryBuffer object. MemoryBufferByteStream owns the MemoryBuffer in
/// question. As with BinaryByteStream, reading from a MemoryBufferByteStream
/// will never cause a copy.
class MemoryBufferByteStream : public BinaryByteStream {
public:
MemoryBufferByteStream(std::unique_ptr<MemoryBuffer> Buffer,
llvm::support::endianness Endian)
: BinaryByteStream(Buffer->getBuffer(), Endian),
MemBuffer(std::move(Buffer)) {}
std::unique_ptr<MemoryBuffer> MemBuffer;
};
/// An implementation of BinaryStream which holds its entire data set
/// in a single contiguous buffer. As with BinaryByteStream, the mutable
/// version also guarantees that no read operation will ever incur a copy,
/// and similarly it does not own the underlying buffer.
class MutableBinaryByteStream : public WritableBinaryStream {
public:
MutableBinaryByteStream() = default;
MutableBinaryByteStream(MutableArrayRef<uint8_t> Data,
llvm::support::endianness Endian)
: Data(Data), ImmutableStream(Data, Endian) {}
llvm::support::endianness getEndian() const override {
return ImmutableStream.getEndian();
}
Error readBytes(uint64_t Offset, uint64_t Size,
ArrayRef<uint8_t> &Buffer) override {
return ImmutableStream.readBytes(Offset, Size, Buffer);
}
Error readLongestContiguousChunk(uint64_t Offset,
ArrayRef<uint8_t> &Buffer) override {
return ImmutableStream.readLongestContiguousChunk(Offset, Buffer);
}
uint64_t getLength() override { return ImmutableStream.getLength(); }
Error writeBytes(uint64_t Offset, ArrayRef<uint8_t> Buffer) override {
if (Buffer.empty())
return Error::success();
if (auto EC = checkOffsetForWrite(Offset, Buffer.size()))
return EC;
uint8_t *DataPtr = const_cast<uint8_t *>(Data.data());
::memcpy(DataPtr + Offset, Buffer.data(), Buffer.size());
return Error::success();
}
Error commit() override { return Error::success(); }
MutableArrayRef<uint8_t> data() const { return Data; }
private:
MutableArrayRef<uint8_t> Data;
BinaryByteStream ImmutableStream;
};
/// An implementation of WritableBinaryStream which can write at its end
/// causing the underlying data to grow. This class owns the underlying data.
class AppendingBinaryByteStream : public WritableBinaryStream {
std::vector<uint8_t> Data;
llvm::support::endianness Endian = llvm::support::little;
public:
AppendingBinaryByteStream() = default;
AppendingBinaryByteStream(llvm::support::endianness Endian)
: Endian(Endian) {}
void clear() { Data.clear(); }
llvm::support::endianness getEndian() const override { return Endian; }
Error readBytes(uint64_t Offset, uint64_t Size,
ArrayRef<uint8_t> &Buffer) override {
if (auto EC = checkOffsetForWrite(Offset, Buffer.size()))
return EC;
Buffer = ArrayRef(Data).slice(Offset, Size);
return Error::success();
}
void insert(uint64_t Offset, ArrayRef<uint8_t> Bytes) {
Data.insert(Data.begin() + Offset, Bytes.begin(), Bytes.end());
}
Error readLongestContiguousChunk(uint64_t Offset,
ArrayRef<uint8_t> &Buffer) override {
if (auto EC = checkOffsetForWrite(Offset, 1))
return EC;
Buffer = ArrayRef(Data).slice(Offset);
return Error::success();
}
uint64_t getLength() override { return Data.size(); }
Error writeBytes(uint64_t Offset, ArrayRef<uint8_t> Buffer) override {
if (Buffer.empty())
return Error::success();
// This is well-defined for any case except where offset is strictly
// greater than the current length. If offset is equal to the current
// length, we can still grow. If offset is beyond the current length, we
// would have to decide how to deal with the intermediate uninitialized
// bytes. So we punt on that case for simplicity and just say it's an
// error.
if (Offset > getLength())
return make_error<BinaryStreamError>(stream_error_code::invalid_offset);
uint64_t RequiredSize = Offset + Buffer.size();
if (RequiredSize > Data.size())
Data.resize(RequiredSize);
::memcpy(Data.data() + Offset, Buffer.data(), Buffer.size());
return Error::success();
}
Error commit() override { return Error::success(); }
/// Return the properties of this stream.
BinaryStreamFlags getFlags() const override { return BSF_Write | BSF_Append; }
MutableArrayRef<uint8_t> data() { return Data; }
};
/// An implementation of WritableBinaryStream backed by an llvm
/// FileOutputBuffer.
class FileBufferByteStream : public WritableBinaryStream {
private:
class StreamImpl : public MutableBinaryByteStream {
public:
StreamImpl(std::unique_ptr<FileOutputBuffer> Buffer,
llvm::support::endianness Endian)
: MutableBinaryByteStream(
MutableArrayRef<uint8_t>(Buffer->getBufferStart(),
Buffer->getBufferEnd()),
Endian),
FileBuffer(std::move(Buffer)) {}
Error commit() override {
if (FileBuffer->commit())
return make_error<BinaryStreamError>(
stream_error_code::filesystem_error);
return Error::success();
}
/// Returns a pointer to the start of the buffer.
uint8_t *getBufferStart() const { return FileBuffer->getBufferStart(); }
/// Returns a pointer to the end of the buffer.
uint8_t *getBufferEnd() const { return FileBuffer->getBufferEnd(); }
private:
std::unique_ptr<FileOutputBuffer> FileBuffer;
};
public:
FileBufferByteStream(std::unique_ptr<FileOutputBuffer> Buffer,
llvm::support::endianness Endian)
: Impl(std::move(Buffer), Endian) {}
llvm::support::endianness getEndian() const override {
return Impl.getEndian();
}
Error readBytes(uint64_t Offset, uint64_t Size,
ArrayRef<uint8_t> &Buffer) override {
return Impl.readBytes(Offset, Size, Buffer);
}
Error readLongestContiguousChunk(uint64_t Offset,
ArrayRef<uint8_t> &Buffer) override {
return Impl.readLongestContiguousChunk(Offset, Buffer);
}
uint64_t getLength() override { return Impl.getLength(); }
Error writeBytes(uint64_t Offset, ArrayRef<uint8_t> Data) override {
return Impl.writeBytes(Offset, Data);
}
Error commit() override { return Impl.commit(); }
/// Returns a pointer to the start of the buffer.
uint8_t *getBufferStart() const { return Impl.getBufferStart(); }
/// Returns a pointer to the end of the buffer.
uint8_t *getBufferEnd() const { return Impl.getBufferEnd(); }
private:
StreamImpl Impl;
};
} // end namespace llvm
#endif // LLVM_SUPPORT_BINARYBYTESTREAM_H
PK hwFZ��H'� � Support/FileCollector.hnu �[��� //===-- FileCollector.h -----------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_FILECOLLECTOR_H
#define LLVM_SUPPORT_FILECOLLECTOR_H
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringSet.h"
#include "llvm/Support/VirtualFileSystem.h"
#include <mutex>
#include <string>
namespace llvm {
class FileCollectorFileSystem;
class Twine;
class FileCollectorBase {
public:
FileCollectorBase();
virtual ~FileCollectorBase();
void addFile(const Twine &file);
void addDirectory(const Twine &Dir);
protected:
bool markAsSeen(StringRef Path) {
if (Path.empty())
return false;
return Seen.insert(Path).second;
}
virtual void addFileImpl(StringRef SrcPath) = 0;
virtual llvm::vfs::directory_iterator
addDirectoryImpl(const llvm::Twine &Dir,
IntrusiveRefCntPtr<vfs::FileSystem> FS,
std::error_code &EC) = 0;
/// Synchronizes access to internal data structures.
std::mutex Mutex;
/// Tracks already seen files so they can be skipped.
StringSet<> Seen;
};
/// Captures file system interaction and generates data to be later replayed
/// with the RedirectingFileSystem.
///
/// For any file that gets accessed we eventually create:
/// - a copy of the file inside Root
/// - a record in RedirectingFileSystem mapping that maps:
/// current real path -> path to the copy in Root
///
/// That intent is that later when the mapping is used by RedirectingFileSystem
/// it simulates the state of FS that we collected.
///
/// We generate file copies and mapping lazily - see writeMapping and copyFiles.
/// We don't try to capture the state of the file at the exact time when it's
/// accessed. Files might get changed, deleted ... we record only the "final"
/// state.
///
/// In order to preserve the relative topology of files we use their real paths
/// as relative paths inside of the Root.
class FileCollector : public FileCollectorBase {
public:
/// Helper utility that encapsulates the logic for canonicalizing a virtual
/// path and a path to copy from.
class PathCanonicalizer {
public:
struct PathStorage {
SmallString<256> CopyFrom;
SmallString<256> VirtualPath;
};
/// Canonicalize a pair of virtual and real paths.
PathStorage canonicalize(StringRef SrcPath);
private:
/// Replace with a (mostly) real path, or don't modify. Resolves symlinks
/// in the directory, using \a CachedDirs to avoid redundant lookups, but
/// leaves the filename as a possible symlink.
void updateWithRealPath(SmallVectorImpl<char> &Path);
StringMap<std::string> CachedDirs;
};
/// \p Root is the directory where collected files are will be stored.
/// \p OverlayRoot is VFS mapping root.
/// \p Root directory gets created in copyFiles unless it already exists.
FileCollector(std::string Root, std::string OverlayRoot);
/// Write the yaml mapping (for the VFS) to the given file.
std::error_code writeMapping(StringRef MappingFile);
/// Copy the files into the root directory.
///
/// When StopOnError is true (the default) we abort as soon as one file
/// cannot be copied. This is relatively common, for example when a file was
/// removed after it was added to the mapping.
std::error_code copyFiles(bool StopOnError = true);
/// Create a VFS that uses \p Collector to collect files accessed via \p
/// BaseFS.
static IntrusiveRefCntPtr<vfs::FileSystem>
createCollectorVFS(IntrusiveRefCntPtr<vfs::FileSystem> BaseFS,
std::shared_ptr<FileCollector> Collector);
private:
friend FileCollectorFileSystem;
void addFileToMapping(StringRef VirtualPath, StringRef RealPath) {
if (sys::fs::is_directory(VirtualPath))
VFSWriter.addDirectoryMapping(VirtualPath, RealPath);
else
VFSWriter.addFileMapping(VirtualPath, RealPath);
}
protected:
void addFileImpl(StringRef SrcPath) override;
llvm::vfs::directory_iterator
addDirectoryImpl(const llvm::Twine &Dir,
IntrusiveRefCntPtr<vfs::FileSystem> FS,
std::error_code &EC) override;
/// The directory where collected files are copied to in copyFiles().
const std::string Root;
/// The root directory where the VFS overlay lives.
const std::string OverlayRoot;
/// The yaml mapping writer.
vfs::YAMLVFSWriter VFSWriter;
/// Helper utility for canonicalizing paths.
PathCanonicalizer Canonicalizer;
};
} // end namespace llvm
#endif // LLVM_SUPPORT_FILECOLLECTOR_H
PK hwFZ�H��7 7 Support/FileUtilities.hnu �[��� //===- llvm/Support/FileUtilities.h - File System Utilities -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines a family of utility functions which are useful for doing
// various things with files.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_FILEUTILITIES_H
#define LLVM_SUPPORT_FILEUTILITIES_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/FileSystem.h"
#include <system_error>
namespace llvm {
/// DiffFilesWithTolerance - Compare the two files specified, returning 0 if
/// the files match, 1 if they are different, and 2 if there is a file error.
/// This function allows you to specify an absolute and relative FP error that
/// is allowed to exist. If you specify a string to fill in for the error
/// option, it will set the string to an error message if an error occurs, or
/// if the files are different.
///
int DiffFilesWithTolerance(StringRef FileA,
StringRef FileB,
double AbsTol, double RelTol,
std::string *Error = nullptr);
/// FileRemover - This class is a simple object meant to be stack allocated.
/// If an exception is thrown from a region, the object removes the filename
/// specified (if deleteIt is true).
///
class FileRemover {
SmallString<128> Filename;
bool DeleteIt;
public:
FileRemover() : DeleteIt(false) {}
explicit FileRemover(const Twine& filename, bool deleteIt = true)
: DeleteIt(deleteIt) {
filename.toVector(Filename);
}
~FileRemover() {
if (DeleteIt) {
// Ignore problems deleting the file.
sys::fs::remove(Filename);
}
}
/// setFile - Give ownership of the file to the FileRemover so it will
/// be removed when the object is destroyed. If the FileRemover already
/// had ownership of a file, remove it first.
void setFile(const Twine& filename, bool deleteIt = true) {
if (DeleteIt) {
// Ignore problems deleting the file.
sys::fs::remove(Filename);
}
Filename.clear();
filename.toVector(Filename);
DeleteIt = deleteIt;
}
/// releaseFile - Take ownership of the file away from the FileRemover so it
/// will not be removed when the object is destroyed.
void releaseFile() { DeleteIt = false; }
};
/// FilePermssionsApplier helps to copy permissions from an input file to
/// an output one. It memorizes the status of the input file and can apply
/// permissions and dates to the output file.
class FilePermissionsApplier {
public:
static Expected<FilePermissionsApplier> create(StringRef InputFilename);
/// Apply stored permissions to the \p OutputFilename.
/// Copy LastAccess and ModificationTime if \p CopyDates is true.
/// Overwrite stored permissions if \p OverwritePermissions is specified.
Error
apply(StringRef OutputFilename, bool CopyDates = false,
std::optional<sys::fs::perms> OverwritePermissions = std::nullopt);
private:
FilePermissionsApplier(StringRef InputFilename, sys::fs::file_status Status)
: InputFilename(InputFilename), InputStatus(Status) {}
StringRef InputFilename;
sys::fs::file_status InputStatus;
};
} // End llvm namespace
#endif
PK hwFZ3�f�� � Support/ErrorOr.hnu �[��� //===- llvm/Support/ErrorOr.h - Error Smart Pointer -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
///
/// Provides ErrorOr<T> smart pointer.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ERROROR_H
#define LLVM_SUPPORT_ERROROR_H
#include "llvm/Support/AlignOf.h"
#include <cassert>
#include <system_error>
#include <type_traits>
#include <utility>
namespace llvm {
/// Represents either an error or a value T.
///
/// ErrorOr<T> is a pointer-like class that represents the result of an
/// operation. The result is either an error, or a value of type T. This is
/// designed to emulate the usage of returning a pointer where nullptr indicates
/// failure. However instead of just knowing that the operation failed, we also
/// have an error_code and optional user data that describes why it failed.
///
/// It is used like the following.
/// \code
/// ErrorOr<Buffer> getBuffer();
///
/// auto buffer = getBuffer();
/// if (error_code ec = buffer.getError())
/// return ec;
/// buffer->write("adena");
/// \endcode
///
///
/// Implicit conversion to bool returns true if there is a usable value. The
/// unary * and -> operators provide pointer like access to the value. Accessing
/// the value when there is an error has undefined behavior.
///
/// When T is a reference type the behavior is slightly different. The reference
/// is held in a std::reference_wrapper<std::remove_reference<T>::type>, and
/// there is special handling to make operator -> work as if T was not a
/// reference.
///
/// T cannot be a rvalue reference.
template<class T>
class ErrorOr {
template <class OtherT> friend class ErrorOr;
static constexpr bool isRef = std::is_reference_v<T>;
using wrap = std::reference_wrapper<std::remove_reference_t<T>>;
public:
using storage_type = std::conditional_t<isRef, wrap, T>;
private:
using reference = std::remove_reference_t<T> &;
using const_reference = const std::remove_reference_t<T> &;
using pointer = std::remove_reference_t<T> *;
using const_pointer = const std::remove_reference_t<T> *;
public:
template <class E>
ErrorOr(E ErrorCode,
std::enable_if_t<std::is_error_code_enum<E>::value ||
std::is_error_condition_enum<E>::value,
void *> = nullptr)
: HasError(true) {
new (getErrorStorage()) std::error_code(make_error_code(ErrorCode));
}
ErrorOr(std::error_code EC) : HasError(true) {
new (getErrorStorage()) std::error_code(EC);
}
template <class OtherT>
ErrorOr(OtherT &&Val,
std::enable_if_t<std::is_convertible_v<OtherT, T>> * = nullptr)
: HasError(false) {
new (getStorage()) storage_type(std::forward<OtherT>(Val));
}
ErrorOr(const ErrorOr &Other) {
copyConstruct(Other);
}
template <class OtherT>
ErrorOr(const ErrorOr<OtherT> &Other,
std::enable_if_t<std::is_convertible_v<OtherT, T>> * = nullptr) {
copyConstruct(Other);
}
template <class OtherT>
explicit ErrorOr(
const ErrorOr<OtherT> &Other,
std::enable_if_t<!std::is_convertible_v<OtherT, const T &>> * = nullptr) {
copyConstruct(Other);
}
ErrorOr(ErrorOr &&Other) {
moveConstruct(std::move(Other));
}
template <class OtherT>
ErrorOr(ErrorOr<OtherT> &&Other,
std::enable_if_t<std::is_convertible_v<OtherT, T>> * = nullptr) {
moveConstruct(std::move(Other));
}
// This might eventually need SFINAE but it's more complex than is_convertible
// & I'm too lazy to write it right now.
template <class OtherT>
explicit ErrorOr(
ErrorOr<OtherT> &&Other,
std::enable_if_t<!std::is_convertible_v<OtherT, T>> * = nullptr) {
moveConstruct(std::move(Other));
}
ErrorOr &operator=(const ErrorOr &Other) {
copyAssign(Other);
return *this;
}
ErrorOr &operator=(ErrorOr &&Other) {
moveAssign(std::move(Other));
return *this;
}
~ErrorOr() {
if (!HasError)
getStorage()->~storage_type();
}
/// Return false if there is an error.
explicit operator bool() const {
return !HasError;
}
reference get() { return *getStorage(); }
const_reference get() const { return const_cast<ErrorOr<T> *>(this)->get(); }
std::error_code getError() const {
return HasError ? *getErrorStorage() : std::error_code();
}
pointer operator ->() {
return toPointer(getStorage());
}
const_pointer operator->() const { return toPointer(getStorage()); }
reference operator *() {
return *getStorage();
}
const_reference operator*() const { return *getStorage(); }
private:
template <class OtherT>
void copyConstruct(const ErrorOr<OtherT> &Other) {
if (!Other.HasError) {
// Get the other value.
HasError = false;
new (getStorage()) storage_type(*Other.getStorage());
} else {
// Get other's error.
HasError = true;
new (getErrorStorage()) std::error_code(Other.getError());
}
}
template <class T1>
static bool compareThisIfSameType(const T1 &a, const T1 &b) {
return &a == &b;
}
template <class T1, class T2>
static bool compareThisIfSameType(const T1 &a, const T2 &b) {
return false;
}
template <class OtherT>
void copyAssign(const ErrorOr<OtherT> &Other) {
if (compareThisIfSameType(*this, Other))
return;
this->~ErrorOr();
new (this) ErrorOr(Other);
}
template <class OtherT>
void moveConstruct(ErrorOr<OtherT> &&Other) {
if (!Other.HasError) {
// Get the other value.
HasError = false;
new (getStorage()) storage_type(std::move(*Other.getStorage()));
} else {
// Get other's error.
HasError = true;
new (getErrorStorage()) std::error_code(Other.getError());
}
}
template <class OtherT>
void moveAssign(ErrorOr<OtherT> &&Other) {
if (compareThisIfSameType(*this, Other))
return;
this->~ErrorOr();
new (this) ErrorOr(std::move(Other));
}
pointer toPointer(pointer Val) {
return Val;
}
const_pointer toPointer(const_pointer Val) const { return Val; }
pointer toPointer(wrap *Val) {
return &Val->get();
}
const_pointer toPointer(const wrap *Val) const { return &Val->get(); }
storage_type *getStorage() {
assert(!HasError && "Cannot get value when an error exists!");
return reinterpret_cast<storage_type *>(&TStorage);
}
const storage_type *getStorage() const {
assert(!HasError && "Cannot get value when an error exists!");
return reinterpret_cast<const storage_type *>(&TStorage);
}
std::error_code *getErrorStorage() {
assert(HasError && "Cannot get error when a value exists!");
return reinterpret_cast<std::error_code *>(&ErrorStorage);
}
const std::error_code *getErrorStorage() const {
return const_cast<ErrorOr<T> *>(this)->getErrorStorage();
}
union {
AlignedCharArrayUnion<storage_type> TStorage;
AlignedCharArrayUnion<std::error_code> ErrorStorage;
};
bool HasError : 1;
};
template <class T, class E>
std::enable_if_t<std::is_error_code_enum<E>::value ||
std::is_error_condition_enum<E>::value,
bool>
operator==(const ErrorOr<T> &Err, E Code) {
return Err.getError() == Code;
}
} // end namespace llvm
#endif // LLVM_SUPPORT_ERROROR_H
PK hwFZ�d2� � Support/ToolOutputFile.hnu �[��� //===- ToolOutputFile.h - Output files for compiler-like tools --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the ToolOutputFile class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_TOOLOUTPUTFILE_H
#define LLVM_SUPPORT_TOOLOUTPUTFILE_H
#include "llvm/Support/raw_ostream.h"
#include <optional>
namespace llvm {
/// This class contains a raw_fd_ostream and adds a few extra features commonly
/// needed for compiler-like tool output files:
/// - The file is automatically deleted if the process is killed.
/// - The file is automatically deleted when the ToolOutputFile
/// object is destroyed unless the client calls keep().
class ToolOutputFile {
/// This class is declared before the raw_fd_ostream so that it is constructed
/// before the raw_fd_ostream is constructed and destructed after the
/// raw_fd_ostream is destructed. It installs cleanups in its constructor and
/// uninstalls them in its destructor.
class CleanupInstaller {
public:
/// The name of the file.
std::string Filename;
/// The flag which indicates whether we should not delete the file.
bool Keep;
StringRef getFilename() { return Filename; }
explicit CleanupInstaller(StringRef Filename);
~CleanupInstaller();
} Installer;
/// Storage for the stream, if we're owning our own stream. This is
/// intentionally declared after Installer.
std::optional<raw_fd_ostream> OSHolder;
/// The actual stream to use.
raw_fd_ostream *OS;
public:
/// This constructor's arguments are passed to raw_fd_ostream's
/// constructor.
ToolOutputFile(StringRef Filename, std::error_code &EC,
sys::fs::OpenFlags Flags);
ToolOutputFile(StringRef Filename, int FD);
/// Return the contained raw_fd_ostream.
raw_fd_ostream &os() { return *OS; }
/// Return the filename initialized with.
StringRef getFilename() { return Installer.getFilename(); }
/// Indicate that the tool's job wrt this output file has been successful and
/// the file should not be deleted.
void keep() { Installer.Keep = true; }
const std::string &outputFilename() { return Installer.Filename; }
};
} // end llvm namespace
#endif
PK hwFZ��;Z Z Support/CSKYAttributeParser.hnu �[��� //===---- CSKYAttributeParser.h - CSKY Attribute Parser ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_CSKYATTRIBUTEPARSER_H
#define LLVM_SUPPORT_CSKYATTRIBUTEPARSER_H
#include "llvm/Support/CSKYAttributes.h"
#include "llvm/Support/ELFAttributeParser.h"
namespace llvm {
class CSKYAttributeParser : public ELFAttributeParser {
struct DisplayHandler {
CSKYAttrs::AttrType attribute;
Error (CSKYAttributeParser::*routine)(unsigned);
};
static const DisplayHandler displayRoutines[];
Error dspVersion(unsigned tag);
Error vdspVersion(unsigned tag);
Error fpuVersion(unsigned tag);
Error fpuABI(unsigned tag);
Error fpuRounding(unsigned tag);
Error fpuDenormal(unsigned tag);
Error fpuException(unsigned tag);
Error fpuHardFP(unsigned tag);
Error handler(uint64_t tag, bool &handled) override;
public:
CSKYAttributeParser(ScopedPrinter *sw)
: ELFAttributeParser(sw, CSKYAttrs::getCSKYAttributeTags(), "csky") {}
CSKYAttributeParser()
: ELFAttributeParser(CSKYAttrs::getCSKYAttributeTags(), "csky") {}
};
} // namespace llvm
#endif
PK hwFZ� �y
Support/StringSaver.hnu �[��� //===- llvm/Support/StringSaver.h -------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_STRINGSAVER_H
#define LLVM_SUPPORT_STRINGSAVER_H
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Support/Allocator.h"
namespace llvm {
/// Saves strings in the provided stable storage and returns a
/// StringRef with a stable character pointer.
class StringSaver final {
BumpPtrAllocator &Alloc;
public:
StringSaver(BumpPtrAllocator &Alloc) : Alloc(Alloc) {}
BumpPtrAllocator &getAllocator() const { return Alloc; }
// All returned strings are null-terminated: *save(S).end() == 0.
StringRef save(const char *S) { return save(StringRef(S)); }
StringRef save(StringRef S);
StringRef save(const Twine &S) { return save(StringRef(S.str())); }
StringRef save(const std::string &S) { return save(StringRef(S)); }
};
/// Saves strings in the provided stable storage and returns a StringRef with a
/// stable character pointer. Saving the same string yields the same StringRef.
///
/// Compared to StringSaver, it does more work but avoids saving the same string
/// multiple times.
///
/// Compared to StringPool, it performs fewer allocations but doesn't support
/// refcounting/deletion.
class UniqueStringSaver final {
StringSaver Strings;
llvm::DenseSet<llvm::StringRef> Unique;
public:
UniqueStringSaver(BumpPtrAllocator &Alloc) : Strings(Alloc) {}
// All returned strings are null-terminated: *save(S).end() == 0.
StringRef save(const char *S) { return save(StringRef(S)); }
StringRef save(StringRef S);
StringRef save(const Twine &S) { return save(StringRef(S.str())); }
StringRef save(const std::string &S) { return save(StringRef(S)); }
};
} // namespace llvm
#endif
PK hwFZk� r r Support/DOTGraphTraits.hnu �[��� //===-- llvm/Support/DOTGraphTraits.h - Customize .dot output ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines a template class that can be used to customize dot output
// graphs generated by the GraphWriter.h file. The default implementation of
// this file will produce a simple, but not very polished graph. By
// specializing this template, lots of customization opportunities are possible.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_DOTGRAPHTRAITS_H
#define LLVM_SUPPORT_DOTGRAPHTRAITS_H
#include <string>
namespace llvm {
/// DefaultDOTGraphTraits - This class provides the default implementations of
/// all of the DOTGraphTraits methods. If a specialization does not need to
/// override all methods here it should inherit so that it can get the default
/// implementations.
///
struct DefaultDOTGraphTraits {
private:
bool IsSimple;
protected:
bool isSimple() {
return IsSimple;
}
public:
explicit DefaultDOTGraphTraits(bool simple=false) : IsSimple (simple) {}
/// getGraphName - Return the label for the graph as a whole. Printed at the
/// top of the graph.
///
template<typename GraphType>
static std::string getGraphName(const GraphType &) { return ""; }
/// getGraphProperties - Return any custom properties that should be included
/// in the top level graph structure for dot.
///
template<typename GraphType>
static std::string getGraphProperties(const GraphType &) {
return "";
}
/// renderGraphFromBottomUp - If this function returns true, the graph is
/// emitted bottom-up instead of top-down. This requires graphviz 2.0 to work
/// though.
static bool renderGraphFromBottomUp() {
return false;
}
/// isNodeHidden - If the function returns true, the given node is not
/// displayed in the graph.
template <typename GraphType>
static bool isNodeHidden(const void *, const GraphType &) {
return false;
}
// renderNodesUsingHTML - If the function returns true, nodes will be
// rendered using HTML-like labels which allows colors, etc in the nodes
// and the edge source labels.
static bool renderNodesUsingHTML() { return false; }
/// getNodeLabel - Given a node and a pointer to the top level graph, return
/// the label to print in the node.
template<typename GraphType>
std::string getNodeLabel(const void *, const GraphType &) {
return "";
}
// getNodeIdentifierLabel - Returns a string representing the
// address or other unique identifier of the node. (Only used if
// non-empty.)
template <typename GraphType>
static std::string getNodeIdentifierLabel(const void *, const GraphType &) {
return "";
}
template<typename GraphType>
static std::string getNodeDescription(const void *, const GraphType &) {
return "";
}
/// If you want to specify custom node attributes, this is the place to do so
///
template<typename GraphType>
static std::string getNodeAttributes(const void *,
const GraphType &) {
return "";
}
/// If you want to override the dot attributes printed for a particular edge,
/// override this method.
template<typename EdgeIter, typename GraphType>
static std::string getEdgeAttributes(const void *, EdgeIter,
const GraphType &) {
return "";
}
/// getEdgeSourceLabel - If you want to label the edge source itself,
/// implement this method.
template<typename EdgeIter>
static std::string getEdgeSourceLabel(const void *, EdgeIter) {
return "";
}
/// edgeTargetsEdgeSource - This method returns true if this outgoing edge
/// should actually target another edge source, not a node. If this method is
/// implemented, getEdgeTarget should be implemented.
template<typename EdgeIter>
static bool edgeTargetsEdgeSource(const void *, EdgeIter) {
return false;
}
/// getEdgeTarget - If edgeTargetsEdgeSource returns true, this method is
/// called to determine which outgoing edge of Node is the target of this
/// edge.
template<typename EdgeIter>
static EdgeIter getEdgeTarget(const void *, EdgeIter I) {
return I;
}
/// hasEdgeDestLabels - If this function returns true, the graph is able
/// to provide labels for edge destinations.
static bool hasEdgeDestLabels() {
return false;
}
/// numEdgeDestLabels - If hasEdgeDestLabels, this function returns the
/// number of incoming edge labels the given node has.
static unsigned numEdgeDestLabels(const void *) {
return 0;
}
/// getEdgeDestLabel - If hasEdgeDestLabels, this function returns the
/// incoming edge label with the given index in the given node.
static std::string getEdgeDestLabel(const void *, unsigned) {
return "";
}
/// addCustomGraphFeatures - If a graph is made up of more than just
/// straight-forward nodes and edges, this is the place to put all of the
/// custom stuff necessary. The GraphWriter object, instantiated with your
/// GraphType is passed in as an argument. You may call arbitrary methods on
/// it to add things to the output graph.
///
template<typename GraphType, typename GraphWriter>
static void addCustomGraphFeatures(const GraphType &, GraphWriter &) {}
};
/// DOTGraphTraits - Template class that can be specialized to customize how
/// graphs are converted to 'dot' graphs. When specializing, you may inherit
/// from DefaultDOTGraphTraits if you don't need to override everything.
///
template <typename Ty>
struct DOTGraphTraits : public DefaultDOTGraphTraits {
DOTGraphTraits (bool simple=false) : DefaultDOTGraphTraits (simple) {}
};
} // End llvm namespace
#endif
PK hwFZ� � Support/EndianStream.hnu �[��� //===- EndianStream.h - Stream ops with endian specific data ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines utilities for operating on streams that have endian
// specific data.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ENDIANSTREAM_H
#define LLVM_SUPPORT_ENDIANSTREAM_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
namespace llvm {
namespace support {
namespace endian {
template <typename value_type>
inline void write(raw_ostream &os, value_type value, endianness endian) {
value = byte_swap<value_type>(value, endian);
os.write((const char *)&value, sizeof(value_type));
}
template <>
inline void write<float>(raw_ostream &os, float value, endianness endian) {
write(os, llvm::bit_cast<uint32_t>(value), endian);
}
template <>
inline void write<double>(raw_ostream &os, double value,
endianness endian) {
write(os, llvm::bit_cast<uint64_t>(value), endian);
}
template <typename value_type>
inline void write(raw_ostream &os, ArrayRef<value_type> vals,
endianness endian) {
for (value_type v : vals)
write(os, v, endian);
}
template <typename value_type>
inline void write(SmallVectorImpl<char> &Out, value_type V, endianness E) {
V = byte_swap<value_type>(V, E);
Out.append((const char *)&V, (const char *)&V + sizeof(value_type));
}
/// Adapter to write values to a stream in a particular byte order.
struct Writer {
raw_ostream &OS;
endianness Endian;
Writer(raw_ostream &OS, endianness Endian) : OS(OS), Endian(Endian) {}
template <typename value_type> void write(ArrayRef<value_type> Val) {
endian::write(OS, Val, Endian);
}
template <typename value_type> void write(value_type Val) {
endian::write(OS, Val, Endian);
}
};
} // end namespace endian
} // end namespace support
} // end namespace llvm
#endif
PK hwFZ�ӜF� � Support/BranchProbability.hnu �[��� //===- BranchProbability.h - Branch Probability Wrapper ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Definition of BranchProbability shared by IR and Machine Instructions.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_BRANCHPROBABILITY_H
#define LLVM_SUPPORT_BRANCHPROBABILITY_H
#include "llvm/Support/DataTypes.h"
#include <algorithm>
#include <cassert>
#include <iterator>
#include <numeric>
namespace llvm {
class raw_ostream;
// This class represents Branch Probability as a non-negative fraction that is
// no greater than 1. It uses a fixed-point-like implementation, in which the
// denominator is always a constant value (here we use 1<<31 for maximum
// precision).
class BranchProbability {
// Numerator
uint32_t N;
// Denominator, which is a constant value.
static constexpr uint32_t D = 1u << 31;
static constexpr uint32_t UnknownN = UINT32_MAX;
// Construct a BranchProbability with only numerator assuming the denominator
// is 1<<31. For internal use only.
explicit BranchProbability(uint32_t n) : N(n) {}
public:
BranchProbability() : N(UnknownN) {}
BranchProbability(uint32_t Numerator, uint32_t Denominator);
bool isZero() const { return N == 0; }
bool isUnknown() const { return N == UnknownN; }
static BranchProbability getZero() { return BranchProbability(0); }
static BranchProbability getOne() { return BranchProbability(D); }
static BranchProbability getUnknown() { return BranchProbability(UnknownN); }
// Create a BranchProbability object with the given numerator and 1<<31
// as denominator.
static BranchProbability getRaw(uint32_t N) { return BranchProbability(N); }
// Create a BranchProbability object from 64-bit integers.
static BranchProbability getBranchProbability(uint64_t Numerator,
uint64_t Denominator);
// Normalize given probabilties so that the sum of them becomes approximate
// one.
template <class ProbabilityIter>
static void normalizeProbabilities(ProbabilityIter Begin,
ProbabilityIter End);
uint32_t getNumerator() const { return N; }
static uint32_t getDenominator() { return D; }
// Return (1 - Probability).
BranchProbability getCompl() const { return BranchProbability(D - N); }
raw_ostream &print(raw_ostream &OS) const;
void dump() const;
/// Scale a large integer.
///
/// Scales \c Num. Guarantees full precision. Returns the floor of the
/// result.
///
/// \return \c Num times \c this.
uint64_t scale(uint64_t Num) const;
/// Scale a large integer by the inverse.
///
/// Scales \c Num by the inverse of \c this. Guarantees full precision.
/// Returns the floor of the result.
///
/// \return \c Num divided by \c this.
uint64_t scaleByInverse(uint64_t Num) const;
BranchProbability &operator+=(BranchProbability RHS) {
assert(N != UnknownN && RHS.N != UnknownN &&
"Unknown probability cannot participate in arithmetics.");
// Saturate the result in case of overflow.
N = (uint64_t(N) + RHS.N > D) ? D : N + RHS.N;
return *this;
}
BranchProbability &operator-=(BranchProbability RHS) {
assert(N != UnknownN && RHS.N != UnknownN &&
"Unknown probability cannot participate in arithmetics.");
// Saturate the result in case of underflow.
N = N < RHS.N ? 0 : N - RHS.N;
return *this;
}
BranchProbability &operator*=(BranchProbability RHS) {
assert(N != UnknownN && RHS.N != UnknownN &&
"Unknown probability cannot participate in arithmetics.");
N = (static_cast<uint64_t>(N) * RHS.N + D / 2) / D;
return *this;
}
BranchProbability &operator*=(uint32_t RHS) {
assert(N != UnknownN &&
"Unknown probability cannot participate in arithmetics.");
N = (uint64_t(N) * RHS > D) ? D : N * RHS;
return *this;
}
BranchProbability &operator/=(BranchProbability RHS) {
assert(N != UnknownN && RHS.N != UnknownN &&
"Unknown probability cannot participate in arithmetics.");
N = (static_cast<uint64_t>(N) * D + RHS.N / 2) / RHS.N;
return *this;
}
BranchProbability &operator/=(uint32_t RHS) {
assert(N != UnknownN &&
"Unknown probability cannot participate in arithmetics.");
assert(RHS > 0 && "The divider cannot be zero.");
N /= RHS;
return *this;
}
BranchProbability operator+(BranchProbability RHS) const {
BranchProbability Prob(*this);
Prob += RHS;
return Prob;
}
BranchProbability operator-(BranchProbability RHS) const {
BranchProbability Prob(*this);
Prob -= RHS;
return Prob;
}
BranchProbability operator*(BranchProbability RHS) const {
BranchProbability Prob(*this);
Prob *= RHS;
return Prob;
}
BranchProbability operator*(uint32_t RHS) const {
BranchProbability Prob(*this);
Prob *= RHS;
return Prob;
}
BranchProbability operator/(BranchProbability RHS) const {
BranchProbability Prob(*this);
Prob /= RHS;
return Prob;
}
BranchProbability operator/(uint32_t RHS) const {
BranchProbability Prob(*this);
Prob /= RHS;
return Prob;
}
bool operator==(BranchProbability RHS) const { return N == RHS.N; }
bool operator!=(BranchProbability RHS) const { return !(*this == RHS); }
bool operator<(BranchProbability RHS) const {
assert(N != UnknownN && RHS.N != UnknownN &&
"Unknown probability cannot participate in comparisons.");
return N < RHS.N;
}
bool operator>(BranchProbability RHS) const {
assert(N != UnknownN && RHS.N != UnknownN &&
"Unknown probability cannot participate in comparisons.");
return RHS < *this;
}
bool operator<=(BranchProbability RHS) const {
assert(N != UnknownN && RHS.N != UnknownN &&
"Unknown probability cannot participate in comparisons.");
return !(RHS < *this);
}
bool operator>=(BranchProbability RHS) const {
assert(N != UnknownN && RHS.N != UnknownN &&
"Unknown probability cannot participate in comparisons.");
return !(*this < RHS);
}
};
inline raw_ostream &operator<<(raw_ostream &OS, BranchProbability Prob) {
return Prob.print(OS);
}
template <class ProbabilityIter>
void BranchProbability::normalizeProbabilities(ProbabilityIter Begin,
ProbabilityIter End) {
if (Begin == End)
return;
unsigned UnknownProbCount = 0;
uint64_t Sum = std::accumulate(Begin, End, uint64_t(0),
[&](uint64_t S, const BranchProbability &BP) {
if (!BP.isUnknown())
return S + BP.N;
UnknownProbCount++;
return S;
});
if (UnknownProbCount > 0) {
BranchProbability ProbForUnknown = BranchProbability::getZero();
// If the sum of all known probabilities is less than one, evenly distribute
// the complement of sum to unknown probabilities. Otherwise, set unknown
// probabilities to zeros and continue to normalize known probabilities.
if (Sum < BranchProbability::getDenominator())
ProbForUnknown = BranchProbability::getRaw(
(BranchProbability::getDenominator() - Sum) / UnknownProbCount);
std::replace_if(Begin, End,
[](const BranchProbability &BP) { return BP.isUnknown(); },
ProbForUnknown);
if (Sum <= BranchProbability::getDenominator())
return;
}
if (Sum == 0) {
BranchProbability BP(1, std::distance(Begin, End));
std::fill(Begin, End, BP);
return;
}
for (auto I = Begin; I != End; ++I)
I->N = (I->N * uint64_t(D) + Sum / 2) / Sum;
}
}
#endif
PK hwFZ}QF��j �j Support/TargetOpcodes.defnu �[��� //===-- llvm/Support/TargetOpcodes.def - Target Indep Opcodes ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the target independent instruction opcodes.
//
//===----------------------------------------------------------------------===//
// NOTE: NO INCLUDE GUARD DESIRED!
/// HANDLE_TARGET_OPCODE defines an opcode and its associated enum value.
///
#ifndef HANDLE_TARGET_OPCODE
#define HANDLE_TARGET_OPCODE(OPC, NUM)
#endif
/// HANDLE_TARGET_OPCODE_MARKER defines an alternative identifier for an opcode.
///
#ifndef HANDLE_TARGET_OPCODE_MARKER
#define HANDLE_TARGET_OPCODE_MARKER(IDENT, OPC)
#endif
/// Every instruction defined here must also appear in Target.td.
///
HANDLE_TARGET_OPCODE(PHI)
HANDLE_TARGET_OPCODE(INLINEASM)
HANDLE_TARGET_OPCODE(INLINEASM_BR)
HANDLE_TARGET_OPCODE(CFI_INSTRUCTION)
HANDLE_TARGET_OPCODE(EH_LABEL)
HANDLE_TARGET_OPCODE(GC_LABEL)
HANDLE_TARGET_OPCODE(ANNOTATION_LABEL)
/// KILL - This instruction is a noop that is used only to adjust the
/// liveness of registers. This can be useful when dealing with
/// sub-registers.
HANDLE_TARGET_OPCODE(KILL)
/// EXTRACT_SUBREG - This instruction takes two operands: a register
/// that has subregisters, and a subregister index. It returns the
/// extracted subregister value. This is commonly used to implement
/// truncation operations on target architectures which support it.
HANDLE_TARGET_OPCODE(EXTRACT_SUBREG)
/// INSERT_SUBREG - This instruction takes three operands: a register that
/// has subregisters, a register providing an insert value, and a
/// subregister index. It returns the value of the first register with the
/// value of the second register inserted. The first register is often
/// defined by an IMPLICIT_DEF, because it is commonly used to implement
/// anyext operations on target architectures which support it.
HANDLE_TARGET_OPCODE(INSERT_SUBREG)
/// IMPLICIT_DEF - This is the MachineInstr-level equivalent of undef.
HANDLE_TARGET_OPCODE(IMPLICIT_DEF)
/// SUBREG_TO_REG - Assert the value of bits in a super register.
/// The result of this instruction is the value of the second operand inserted
/// into the subregister specified by the third operand. All other bits are
/// assumed to be equal to the bits in the immediate integer constant in the
/// first operand. This instruction just communicates information; No code
/// should be generated.
/// This is typically used after an instruction where the write to a subregister
/// implicitly cleared the bits in the super registers.
HANDLE_TARGET_OPCODE(SUBREG_TO_REG)
/// COPY_TO_REGCLASS - This instruction is a placeholder for a plain
/// register-to-register copy into a specific register class. This is only
/// used between instruction selection and MachineInstr creation, before
/// virtual registers have been created for all the instructions, and it's
/// only needed in cases where the register classes implied by the
/// instructions are insufficient. It is emitted as a COPY MachineInstr.
HANDLE_TARGET_OPCODE(COPY_TO_REGCLASS)
/// DBG_VALUE - a mapping of the llvm.dbg.value intrinsic
HANDLE_TARGET_OPCODE(DBG_VALUE)
/// DBG_VALUE - a mapping of the llvm.dbg.value intrinsic with a variadic
/// list of locations
HANDLE_TARGET_OPCODE(DBG_VALUE_LIST)
/// DBG_INSTR_REF - A mapping of llvm.dbg.value referring to the instruction
/// that defines the value, rather than a virtual register.
HANDLE_TARGET_OPCODE(DBG_INSTR_REF)
/// DBG_PHI - remainder of a PHI, identifies a program point where values
/// merge under control flow.
HANDLE_TARGET_OPCODE(DBG_PHI)
/// DBG_LABEL - a mapping of the llvm.dbg.label intrinsic
HANDLE_TARGET_OPCODE(DBG_LABEL)
/// REG_SEQUENCE - This variadic instruction is used to form a register that
/// represents a consecutive sequence of sub-registers. It's used as a
/// register coalescing / allocation aid and must be eliminated before code
/// emission.
// In SDNode form, the first operand encodes the register class created by
// the REG_SEQUENCE, while each subsequent pair names a vreg + subreg index
// pair. Once it has been lowered to a MachineInstr, the regclass operand
// is no longer present.
/// e.g. v1027 = REG_SEQUENCE v1024, 3, v1025, 4, v1026, 5
/// After register coalescing references of v1024 should be replace with
/// v1027:3, v1025 with v1027:4, etc.
HANDLE_TARGET_OPCODE(REG_SEQUENCE)
/// COPY - Target-independent register copy. This instruction can also be
/// used to copy between subregisters of virtual registers.
HANDLE_TARGET_OPCODE(COPY)
/// BUNDLE - This instruction represents an instruction bundle. Instructions
/// which immediately follow a BUNDLE instruction which are marked with
/// 'InsideBundle' flag are inside the bundle.
HANDLE_TARGET_OPCODE(BUNDLE)
/// Lifetime markers.
HANDLE_TARGET_OPCODE(LIFETIME_START)
HANDLE_TARGET_OPCODE(LIFETIME_END)
/// Pseudo probe
HANDLE_TARGET_OPCODE(PSEUDO_PROBE)
/// Arithmetic fence.
HANDLE_TARGET_OPCODE(ARITH_FENCE)
/// A Stackmap instruction captures the location of live variables at its
/// position in the instruction stream. It is followed by a shadow of bytes
/// that must lie within the function and not contain another stackmap.
HANDLE_TARGET_OPCODE(STACKMAP)
/// FEntry all - This is a marker instruction which gets translated into a raw fentry call.
HANDLE_TARGET_OPCODE(FENTRY_CALL)
/// Patchable call instruction - this instruction represents a call to a
/// constant address, followed by a series of NOPs. It is intended to
/// support optimizations for dynamic languages (such as javascript) that
/// rewrite calls to runtimes with more efficient code sequences.
/// This also implies a stack map.
HANDLE_TARGET_OPCODE(PATCHPOINT)
/// This pseudo-instruction loads the stack guard value. Targets which need
/// to prevent the stack guard value or address from being spilled to the
/// stack should override TargetLowering::emitLoadStackGuardNode and
/// additionally expand this pseudo after register allocation.
HANDLE_TARGET_OPCODE(LOAD_STACK_GUARD)
/// These are used to support call sites that must have the stack adjusted
/// before the call (e.g. to initialize an argument passed by value).
/// See llvm.call.preallocated.{setup,arg} in the LangRef for more details.
HANDLE_TARGET_OPCODE(PREALLOCATED_SETUP)
HANDLE_TARGET_OPCODE(PREALLOCATED_ARG)
/// Call instruction with associated vm state for deoptimization and list
/// of live pointers for relocation by the garbage collector. It is
/// intended to support garbage collection with fully precise relocating
/// collectors and deoptimizations in either the callee or caller.
HANDLE_TARGET_OPCODE(STATEPOINT)
/// Instruction that records the offset of a local stack allocation passed to
/// llvm.localescape. It has two arguments: the symbol for the label and the
/// frame index of the local stack allocation.
HANDLE_TARGET_OPCODE(LOCAL_ESCAPE)
/// Wraps a machine instruction which can fault, bundled with associated
/// information on how to handle such a fault.
/// For example loading instruction that may page fault, bundled with associated
/// information on how to handle such a page fault. It is intended to support
/// "zero cost" null checks in managed languages by allowing LLVM to fold
/// comparisons into existing memory operations.
HANDLE_TARGET_OPCODE(FAULTING_OP)
/// Wraps a machine instruction to add patchability constraints. An
/// instruction wrapped in PATCHABLE_OP has to either have a minimum
/// size or be preceded with a nop of that size. The first operand is
/// an immediate denoting the minimum size of the instruction, the
/// second operand is an immediate denoting the opcode of the original
/// instruction. The rest of the operands are the operands of the
/// original instruction.
/// PATCHABLE_OP can be used as second operand to only insert a nop of
/// required size.
HANDLE_TARGET_OPCODE(PATCHABLE_OP)
/// This is a marker instruction which gets translated into a nop sled, useful
/// for inserting instrumentation instructions at runtime.
HANDLE_TARGET_OPCODE(PATCHABLE_FUNCTION_ENTER)
/// Wraps a return instruction and its operands to enable adding nop sleds
/// either before or after the return. The nop sleds are useful for inserting
/// instrumentation instructions at runtime.
/// The patch here replaces the return instruction.
HANDLE_TARGET_OPCODE(PATCHABLE_RET)
/// This is a marker instruction which gets translated into a nop sled, useful
/// for inserting instrumentation instructions at runtime.
/// The patch here prepends the return instruction.
/// The same thing as in x86_64 is not possible for ARM because it has multiple
/// return instructions. Furthermore, CPU allows parametrized and even
/// conditional return instructions. In the current ARM implementation we are
/// making use of the fact that currently LLVM doesn't seem to generate
/// conditional return instructions.
/// On ARM, the same instruction can be used for popping multiple registers
/// from the stack and returning (it just pops pc register too), and LLVM
/// generates it sometimes. So we can't insert the sled between this stack
/// adjustment and the return without splitting the original instruction into 2
/// instructions. So on ARM, rather than jumping into the exit trampoline, we
/// call it, it does the tracing, preserves the stack and returns.
HANDLE_TARGET_OPCODE(PATCHABLE_FUNCTION_EXIT)
/// Wraps a tail call instruction and its operands to enable adding nop sleds
/// either before or after the tail exit. We use this as a disambiguation from
/// PATCHABLE_RET which specifically only works for return instructions.
HANDLE_TARGET_OPCODE(PATCHABLE_TAIL_CALL)
/// Wraps a logging call and its arguments with nop sleds. At runtime, this can
/// be patched to insert instrumentation instructions.
HANDLE_TARGET_OPCODE(PATCHABLE_EVENT_CALL)
/// Wraps a typed logging call and its argument with nop sleds. At runtime, this
/// can be patched to insert instrumentation instructions.
HANDLE_TARGET_OPCODE(PATCHABLE_TYPED_EVENT_CALL)
HANDLE_TARGET_OPCODE(ICALL_BRANCH_FUNNEL)
// This is a fence with the singlethread scope. It represents a compiler memory
// barrier, but does not correspond to any generated instruction.
HANDLE_TARGET_OPCODE(MEMBARRIER)
/// The following generic opcodes are not supposed to appear after ISel.
/// This is something we might want to relax, but for now, this is convenient
/// to produce diagnostics.
/// Instructions which should not exist past instruction selection, but do not
/// generate code. These instructions only act as optimization hints.
HANDLE_TARGET_OPCODE(G_ASSERT_SEXT)
HANDLE_TARGET_OPCODE(G_ASSERT_ZEXT)
HANDLE_TARGET_OPCODE(G_ASSERT_ALIGN)
HANDLE_TARGET_OPCODE_MARKER(PRE_ISEL_GENERIC_OPTIMIZATION_HINT_START,
G_ASSERT_SEXT)
HANDLE_TARGET_OPCODE_MARKER(PRE_ISEL_GENERIC_OPTIMIZATION_HINT_END,
G_ASSERT_ALIGN)
/// Generic ADD instruction. This is an integer add.
HANDLE_TARGET_OPCODE(G_ADD)
HANDLE_TARGET_OPCODE_MARKER(PRE_ISEL_GENERIC_OPCODE_START, G_ADD)
/// Generic SUB instruction. This is an integer sub.
HANDLE_TARGET_OPCODE(G_SUB)
// Generic multiply instruction.
HANDLE_TARGET_OPCODE(G_MUL)
// Generic signed division instruction.
HANDLE_TARGET_OPCODE(G_SDIV)
// Generic unsigned division instruction.
HANDLE_TARGET_OPCODE(G_UDIV)
// Generic signed remainder instruction.
HANDLE_TARGET_OPCODE(G_SREM)
// Generic unsigned remainder instruction.
HANDLE_TARGET_OPCODE(G_UREM)
// Generic signed divrem instruction.
HANDLE_TARGET_OPCODE(G_SDIVREM)
// Generic unsigned divrem instruction.
HANDLE_TARGET_OPCODE(G_UDIVREM)
/// Generic bitwise and instruction.
HANDLE_TARGET_OPCODE(G_AND)
/// Generic bitwise or instruction.
HANDLE_TARGET_OPCODE(G_OR)
/// Generic bitwise exclusive-or instruction.
HANDLE_TARGET_OPCODE(G_XOR)
HANDLE_TARGET_OPCODE(G_IMPLICIT_DEF)
/// Generic PHI instruction with types.
HANDLE_TARGET_OPCODE(G_PHI)
/// Generic instruction to materialize the address of an alloca or other
/// stack-based object.
HANDLE_TARGET_OPCODE(G_FRAME_INDEX)
/// Generic reference to global value.
HANDLE_TARGET_OPCODE(G_GLOBAL_VALUE)
/// Generic instruction to materialize the address of an object in the constant
/// pool.
HANDLE_TARGET_OPCODE(G_CONSTANT_POOL)
/// Generic instruction to extract blocks of bits from the register given
/// (typically a sub-register COPY after instruction selection).
HANDLE_TARGET_OPCODE(G_EXTRACT)
HANDLE_TARGET_OPCODE(G_UNMERGE_VALUES)
/// Generic instruction to insert blocks of bits from the registers given into
/// the source.
HANDLE_TARGET_OPCODE(G_INSERT)
/// Generic instruction to paste a variable number of components together into a
/// larger register.
HANDLE_TARGET_OPCODE(G_MERGE_VALUES)
/// Generic instruction to create a vector value from a number of scalar
/// components.
HANDLE_TARGET_OPCODE(G_BUILD_VECTOR)
/// Generic instruction to create a vector value from a number of scalar
/// components, which have types larger than the result vector elt type.
HANDLE_TARGET_OPCODE(G_BUILD_VECTOR_TRUNC)
/// Generic instruction to create a vector by concatenating multiple vectors.
HANDLE_TARGET_OPCODE(G_CONCAT_VECTORS)
/// Generic pointer to int conversion.
HANDLE_TARGET_OPCODE(G_PTRTOINT)
/// Generic int to pointer conversion.
HANDLE_TARGET_OPCODE(G_INTTOPTR)
/// Generic bitcast. The source and destination types must be different, or a
/// COPY is the relevant instruction.
HANDLE_TARGET_OPCODE(G_BITCAST)
/// Generic freeze.
HANDLE_TARGET_OPCODE(G_FREEZE)
/// Constant folding barrier.
HANDLE_TARGET_OPCODE(G_CONSTANT_FOLD_BARRIER)
// INTRINSIC fptrunc_round intrinsic.
HANDLE_TARGET_OPCODE(G_INTRINSIC_FPTRUNC_ROUND)
/// INTRINSIC trunc intrinsic.
HANDLE_TARGET_OPCODE(G_INTRINSIC_TRUNC)
/// INTRINSIC round intrinsic.
HANDLE_TARGET_OPCODE(G_INTRINSIC_ROUND)
/// INTRINSIC round to integer intrinsic.
HANDLE_TARGET_OPCODE(G_INTRINSIC_LRINT)
/// INTRINSIC roundeven intrinsic.
HANDLE_TARGET_OPCODE(G_INTRINSIC_ROUNDEVEN)
/// INTRINSIC readcyclecounter
HANDLE_TARGET_OPCODE(G_READCYCLECOUNTER)
/// Generic load (including anyext load)
HANDLE_TARGET_OPCODE(G_LOAD)
/// Generic signext load
HANDLE_TARGET_OPCODE(G_SEXTLOAD)
/// Generic zeroext load
HANDLE_TARGET_OPCODE(G_ZEXTLOAD)
/// Generic indexed load (including anyext load)
HANDLE_TARGET_OPCODE(G_INDEXED_LOAD)
/// Generic indexed signext load
HANDLE_TARGET_OPCODE(G_INDEXED_SEXTLOAD)
/// Generic indexed zeroext load
HANDLE_TARGET_OPCODE(G_INDEXED_ZEXTLOAD)
/// Generic store.
HANDLE_TARGET_OPCODE(G_STORE)
/// Generic indexed store.
HANDLE_TARGET_OPCODE(G_INDEXED_STORE)
/// Generic atomic cmpxchg with internal success check.
HANDLE_TARGET_OPCODE(G_ATOMIC_CMPXCHG_WITH_SUCCESS)
/// Generic atomic cmpxchg.
HANDLE_TARGET_OPCODE(G_ATOMIC_CMPXCHG)
/// Generic atomicrmw.
HANDLE_TARGET_OPCODE(G_ATOMICRMW_XCHG)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_ADD)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_SUB)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_AND)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_NAND)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_OR)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_XOR)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_MAX)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_MIN)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_UMAX)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_UMIN)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_FADD)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_FSUB)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_FMAX)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_FMIN)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_UINC_WRAP)
HANDLE_TARGET_OPCODE(G_ATOMICRMW_UDEC_WRAP)
// Marker for start of Generic AtomicRMW opcodes
HANDLE_TARGET_OPCODE_MARKER(GENERIC_ATOMICRMW_OP_START, G_ATOMICRMW_XCHG)
// Marker for end of Generic AtomicRMW opcodes
HANDLE_TARGET_OPCODE_MARKER(GENERIC_ATOMICRMW_OP_END, G_ATOMICRMW_UDEC_WRAP)
// Generic atomic fence
HANDLE_TARGET_OPCODE(G_FENCE)
/// Generic conditional branch instruction.
HANDLE_TARGET_OPCODE(G_BRCOND)
/// Generic indirect branch instruction.
HANDLE_TARGET_OPCODE(G_BRINDIRECT)
/// Begin an invoke region marker.
HANDLE_TARGET_OPCODE(G_INVOKE_REGION_START)
/// Generic intrinsic use (without side effects).
HANDLE_TARGET_OPCODE(G_INTRINSIC)
/// Generic intrinsic use (with side effects).
HANDLE_TARGET_OPCODE(G_INTRINSIC_W_SIDE_EFFECTS)
/// Generic extension allowing rubbish in high bits.
HANDLE_TARGET_OPCODE(G_ANYEXT)
/// Generic instruction to discard the high bits of a register. This differs
/// from (G_EXTRACT val, 0) on its action on vectors: G_TRUNC will truncate
/// each element individually, G_EXTRACT will typically discard the high
/// elements of the vector.
HANDLE_TARGET_OPCODE(G_TRUNC)
/// Generic integer constant.
HANDLE_TARGET_OPCODE(G_CONSTANT)
/// Generic floating constant.
HANDLE_TARGET_OPCODE(G_FCONSTANT)
/// Generic va_start instruction. Stores to its one pointer operand.
HANDLE_TARGET_OPCODE(G_VASTART)
/// Generic va_start instruction. Stores to its one pointer operand.
HANDLE_TARGET_OPCODE(G_VAARG)
// Generic sign extend
HANDLE_TARGET_OPCODE(G_SEXT)
HANDLE_TARGET_OPCODE(G_SEXT_INREG)
// Generic zero extend
HANDLE_TARGET_OPCODE(G_ZEXT)
// Generic left-shift
HANDLE_TARGET_OPCODE(G_SHL)
// Generic logical right-shift
HANDLE_TARGET_OPCODE(G_LSHR)
// Generic arithmetic right-shift
HANDLE_TARGET_OPCODE(G_ASHR)
// Generic funnel left shift
HANDLE_TARGET_OPCODE(G_FSHL)
// Generic funnel right shift
HANDLE_TARGET_OPCODE(G_FSHR)
// Generic right rotate
HANDLE_TARGET_OPCODE(G_ROTR)
// Generic left rotate
HANDLE_TARGET_OPCODE(G_ROTL)
/// Generic integer-base comparison, also applicable to vectors of integers.
HANDLE_TARGET_OPCODE(G_ICMP)
/// Generic floating-point comparison, also applicable to vectors.
HANDLE_TARGET_OPCODE(G_FCMP)
/// Generic select.
HANDLE_TARGET_OPCODE(G_SELECT)
/// Generic unsigned add instruction, consuming the normal operands and
/// producing the result and a carry flag.
HANDLE_TARGET_OPCODE(G_UADDO)
/// Generic unsigned add instruction, consuming the normal operands plus a carry
/// flag, and similarly producing the result and a carry flag.
HANDLE_TARGET_OPCODE(G_UADDE)
/// Generic unsigned sub instruction, consuming the normal operands and
/// producing the result and a carry flag.
HANDLE_TARGET_OPCODE(G_USUBO)
/// Generic unsigned subtract instruction, consuming the normal operands plus a
/// carry flag, and similarly producing the result and a carry flag.
HANDLE_TARGET_OPCODE(G_USUBE)
/// Generic signed add instruction, producing the result and a signed overflow
/// flag.
HANDLE_TARGET_OPCODE(G_SADDO)
/// Generic signed add instruction, consuming the normal operands plus a carry
/// flag, and similarly producing the result and a carry flag.
HANDLE_TARGET_OPCODE(G_SADDE)
/// Generic signed subtract instruction, producing the result and a signed
/// overflow flag.
HANDLE_TARGET_OPCODE(G_SSUBO)
/// Generic signed sub instruction, consuming the normal operands plus a carry
/// flag, and similarly producing the result and a carry flag.
HANDLE_TARGET_OPCODE(G_SSUBE)
/// Generic unsigned multiply instruction, producing the result and a signed
/// overflow flag.
HANDLE_TARGET_OPCODE(G_UMULO)
/// Generic signed multiply instruction, producing the result and a signed
/// overflow flag.
HANDLE_TARGET_OPCODE(G_SMULO)
// Multiply two numbers at twice the incoming bit width (unsigned) and return
// the high half of the result.
HANDLE_TARGET_OPCODE(G_UMULH)
// Multiply two numbers at twice the incoming bit width (signed) and return
// the high half of the result.
HANDLE_TARGET_OPCODE(G_SMULH)
/// Generic saturating unsigned addition.
HANDLE_TARGET_OPCODE(G_UADDSAT)
/// Generic saturating signed addition.
HANDLE_TARGET_OPCODE(G_SADDSAT)
/// Generic saturating unsigned subtraction.
HANDLE_TARGET_OPCODE(G_USUBSAT)
/// Generic saturating signed subtraction.
HANDLE_TARGET_OPCODE(G_SSUBSAT)
/// Generic saturating unsigned left shift.
HANDLE_TARGET_OPCODE(G_USHLSAT)
/// Generic saturating signed left shift.
HANDLE_TARGET_OPCODE(G_SSHLSAT)
// Perform signed fixed point multiplication
HANDLE_TARGET_OPCODE(G_SMULFIX)
// Perform unsigned fixed point multiplication
HANDLE_TARGET_OPCODE(G_UMULFIX)
// Perform signed, saturating fixed point multiplication
HANDLE_TARGET_OPCODE(G_SMULFIXSAT)
// Perform unsigned, saturating fixed point multiplication
HANDLE_TARGET_OPCODE(G_UMULFIXSAT)
// Perform signed fixed point division
HANDLE_TARGET_OPCODE(G_SDIVFIX)
// Perform unsigned fixed point division
HANDLE_TARGET_OPCODE(G_UDIVFIX)
// Perform signed, saturating fixed point division
HANDLE_TARGET_OPCODE(G_SDIVFIXSAT)
// Perform unsigned, saturating fixed point division
HANDLE_TARGET_OPCODE(G_UDIVFIXSAT)
/// Generic FP addition.
HANDLE_TARGET_OPCODE(G_FADD)
/// Generic FP subtraction.
HANDLE_TARGET_OPCODE(G_FSUB)
/// Generic FP multiplication.
HANDLE_TARGET_OPCODE(G_FMUL)
/// Generic FMA multiplication. Behaves like llvm fma intrinsic
HANDLE_TARGET_OPCODE(G_FMA)
/// Generic FP multiply and add. Behaves as separate fmul and fadd.
HANDLE_TARGET_OPCODE(G_FMAD)
/// Generic FP division.
HANDLE_TARGET_OPCODE(G_FDIV)
/// Generic FP remainder.
HANDLE_TARGET_OPCODE(G_FREM)
/// Generic FP exponentiation.
HANDLE_TARGET_OPCODE(G_FPOW)
/// Generic FP exponentiation, with an integer exponent.
HANDLE_TARGET_OPCODE(G_FPOWI)
/// Generic base-e exponential of a value.
HANDLE_TARGET_OPCODE(G_FEXP)
/// Generic base-2 exponential of a value.
HANDLE_TARGET_OPCODE(G_FEXP2)
/// Floating point base-e logarithm of a value.
HANDLE_TARGET_OPCODE(G_FLOG)
/// Floating point base-2 logarithm of a value.
HANDLE_TARGET_OPCODE(G_FLOG2)
/// Floating point base-10 logarithm of a value.
HANDLE_TARGET_OPCODE(G_FLOG10)
/// Floating point x * 2^n
HANDLE_TARGET_OPCODE(G_FLDEXP)
/// Floating point extract fraction and exponent.
HANDLE_TARGET_OPCODE(G_FFREXP)
/// Generic FP negation.
HANDLE_TARGET_OPCODE(G_FNEG)
/// Generic FP extension.
HANDLE_TARGET_OPCODE(G_FPEXT)
/// Generic float to signed-int conversion
HANDLE_TARGET_OPCODE(G_FPTRUNC)
/// Generic float to signed-int conversion
HANDLE_TARGET_OPCODE(G_FPTOSI)
/// Generic float to unsigned-int conversion
HANDLE_TARGET_OPCODE(G_FPTOUI)
/// Generic signed-int to float conversion
HANDLE_TARGET_OPCODE(G_SITOFP)
/// Generic unsigned-int to float conversion
HANDLE_TARGET_OPCODE(G_UITOFP)
/// Generic FP absolute value.
HANDLE_TARGET_OPCODE(G_FABS)
/// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This does
/// not require that X and Y have the same type, just that they are both
/// floating point. X and the result must have the same type. FCOPYSIGN(f32,
/// f64) is allowed.
HANDLE_TARGET_OPCODE(G_FCOPYSIGN)
/// Generic test for floating-point class.
HANDLE_TARGET_OPCODE(G_IS_FPCLASS)
/// Generic FP canonicalize value.
HANDLE_TARGET_OPCODE(G_FCANONICALIZE)
/// FP min/max matching libm's fmin/fmax
HANDLE_TARGET_OPCODE(G_FMINNUM)
HANDLE_TARGET_OPCODE(G_FMAXNUM)
/// FP min/max matching IEEE-754 2008's minnum/maxnum semantics.
HANDLE_TARGET_OPCODE(G_FMINNUM_IEEE)
HANDLE_TARGET_OPCODE(G_FMAXNUM_IEEE)
/// FP min/max matching IEEE-754 2018 draft semantics.
HANDLE_TARGET_OPCODE(G_FMINIMUM)
HANDLE_TARGET_OPCODE(G_FMAXIMUM)
/// Generic pointer offset
HANDLE_TARGET_OPCODE(G_PTR_ADD)
/// Clear the specified bits in a pointer.
HANDLE_TARGET_OPCODE(G_PTRMASK)
/// Generic signed integer minimum.
HANDLE_TARGET_OPCODE(G_SMIN)
/// Generic signed integer maximum.
HANDLE_TARGET_OPCODE(G_SMAX)
/// Generic unsigned integer maximum.
HANDLE_TARGET_OPCODE(G_UMIN)
/// Generic unsigned integer maximum.
HANDLE_TARGET_OPCODE(G_UMAX)
/// Generic integer absolute value.
HANDLE_TARGET_OPCODE(G_ABS)
HANDLE_TARGET_OPCODE(G_LROUND)
HANDLE_TARGET_OPCODE(G_LLROUND)
/// Generic BRANCH instruction. This is an unconditional branch.
HANDLE_TARGET_OPCODE(G_BR)
/// Generic branch to jump table entry.
HANDLE_TARGET_OPCODE(G_BRJT)
/// Generic insertelement.
HANDLE_TARGET_OPCODE(G_INSERT_VECTOR_ELT)
/// Generic extractelement.
HANDLE_TARGET_OPCODE(G_EXTRACT_VECTOR_ELT)
/// Generic shufflevector.
HANDLE_TARGET_OPCODE(G_SHUFFLE_VECTOR)
/// Generic count trailing zeroes.
HANDLE_TARGET_OPCODE(G_CTTZ)
/// Same as above, undefined for zero inputs.
HANDLE_TARGET_OPCODE(G_CTTZ_ZERO_UNDEF)
/// Generic count leading zeroes.
HANDLE_TARGET_OPCODE(G_CTLZ)
/// Same as above, undefined for zero inputs.
HANDLE_TARGET_OPCODE(G_CTLZ_ZERO_UNDEF)
/// Generic count bits.
HANDLE_TARGET_OPCODE(G_CTPOP)
/// Generic byte swap.
HANDLE_TARGET_OPCODE(G_BSWAP)
/// Generic bit reverse.
HANDLE_TARGET_OPCODE(G_BITREVERSE)
/// Floating point ceil.
HANDLE_TARGET_OPCODE(G_FCEIL)
/// Floating point cosine.
HANDLE_TARGET_OPCODE(G_FCOS)
/// Floating point sine.
HANDLE_TARGET_OPCODE(G_FSIN)
/// Floating point square root.
HANDLE_TARGET_OPCODE(G_FSQRT)
/// Floating point floor.
HANDLE_TARGET_OPCODE(G_FFLOOR)
/// Floating point round to next integer.
HANDLE_TARGET_OPCODE(G_FRINT)
/// Floating point round to nearest integer.
HANDLE_TARGET_OPCODE(G_FNEARBYINT)
/// Generic AddressSpaceCast.
HANDLE_TARGET_OPCODE(G_ADDRSPACE_CAST)
/// Generic block address
HANDLE_TARGET_OPCODE(G_BLOCK_ADDR)
/// Generic jump table address
HANDLE_TARGET_OPCODE(G_JUMP_TABLE)
/// Generic dynamic stack allocation.
HANDLE_TARGET_OPCODE(G_DYN_STACKALLOC)
/// Strict floating point instructions.
HANDLE_TARGET_OPCODE(G_STRICT_FADD)
HANDLE_TARGET_OPCODE(G_STRICT_FSUB)
HANDLE_TARGET_OPCODE(G_STRICT_FMUL)
HANDLE_TARGET_OPCODE(G_STRICT_FDIV)
HANDLE_TARGET_OPCODE(G_STRICT_FREM)
HANDLE_TARGET_OPCODE(G_STRICT_FMA)
HANDLE_TARGET_OPCODE(G_STRICT_FSQRT)
HANDLE_TARGET_OPCODE(G_STRICT_FLDEXP)
/// read_register intrinsic
HANDLE_TARGET_OPCODE(G_READ_REGISTER)
/// write_register intrinsic
HANDLE_TARGET_OPCODE(G_WRITE_REGISTER)
/// llvm.memcpy intrinsic
HANDLE_TARGET_OPCODE(G_MEMCPY)
/// llvm.memcpy.inline intrinsic
HANDLE_TARGET_OPCODE(G_MEMCPY_INLINE)
/// llvm.memmove intrinsic
HANDLE_TARGET_OPCODE(G_MEMMOVE)
/// llvm.memset intrinsic
HANDLE_TARGET_OPCODE(G_MEMSET)
HANDLE_TARGET_OPCODE(G_BZERO)
/// Vector reductions
HANDLE_TARGET_OPCODE(G_VECREDUCE_SEQ_FADD)
HANDLE_TARGET_OPCODE(G_VECREDUCE_SEQ_FMUL)
HANDLE_TARGET_OPCODE(G_VECREDUCE_FADD)
HANDLE_TARGET_OPCODE(G_VECREDUCE_FMUL)
HANDLE_TARGET_OPCODE(G_VECREDUCE_FMAX)
HANDLE_TARGET_OPCODE(G_VECREDUCE_FMIN)
HANDLE_TARGET_OPCODE(G_VECREDUCE_ADD)
HANDLE_TARGET_OPCODE(G_VECREDUCE_MUL)
HANDLE_TARGET_OPCODE(G_VECREDUCE_AND)
HANDLE_TARGET_OPCODE(G_VECREDUCE_OR)
HANDLE_TARGET_OPCODE(G_VECREDUCE_XOR)
HANDLE_TARGET_OPCODE(G_VECREDUCE_SMAX)
HANDLE_TARGET_OPCODE(G_VECREDUCE_SMIN)
HANDLE_TARGET_OPCODE(G_VECREDUCE_UMAX)
HANDLE_TARGET_OPCODE(G_VECREDUCE_UMIN)
HANDLE_TARGET_OPCODE(G_SBFX)
HANDLE_TARGET_OPCODE(G_UBFX)
/// Marker for the end of the generic opcode.
/// This is used to check if an opcode is in the range of the
/// generic opcodes.
HANDLE_TARGET_OPCODE_MARKER(PRE_ISEL_GENERIC_OPCODE_END, G_UBFX)
/// BUILTIN_OP_END - This must be the last enum value in this list.
/// The target-specific post-isel opcode values start here.
HANDLE_TARGET_OPCODE_MARKER(GENERIC_OP_END, PRE_ISEL_GENERIC_OPCODE_END)
PK hwFZ��wVV VV Support/ARMWinEH.hnu �[��� //===-- llvm/Support/ARMWinEH.h - Windows on ARM EH Constants ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ARMWINEH_H
#define LLVM_SUPPORT_ARMWINEH_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/Support/Endian.h"
namespace llvm {
namespace ARM {
namespace WinEH {
enum class RuntimeFunctionFlag {
RFF_Unpacked, /// unpacked entry
RFF_Packed, /// packed entry
RFF_PackedFragment, /// packed entry representing a fragment
RFF_Reserved, /// reserved
};
enum class ReturnType {
RT_POP, /// return via pop {pc} (L flag must be set)
RT_B, /// 16-bit branch
RT_BW, /// 32-bit branch
RT_NoEpilogue, /// no epilogue (fragment)
};
/// RuntimeFunction - An entry in the table of procedure data (.pdata)
///
/// This is ARM specific, but the Function Start RVA, Flag and
/// ExceptionInformationRVA fields work identically for ARM64.
///
/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
/// +---------------------------------------------------------------+
/// | Function Start RVA |
/// +-------------------+-+-+-+-----+-+---+---------------------+---+
/// | Stack Adjust |C|L|R| Reg |H|Ret| Function Length |Flg|
/// +-------------------+-+-+-+-----+-+---+---------------------+---+
///
/// Flag : 2-bit field with the following meanings:
/// - 00 = packed unwind data not used; reamining bits point to .xdata record
/// - 01 = packed unwind data
/// - 10 = packed unwind data, function assumed to have no prologue; useful
/// for function fragments that are discontiguous with the start of the
/// function
/// - 11 = reserved
/// Function Length : 11-bit field providing the length of the entire function
/// in bytes, divided by 2; if the function is greater than
/// 4KB, a full .xdata record must be used instead
/// Ret : 2-bit field indicating how the function returns
/// - 00 = return via pop {pc} (the L bit must be set)
/// - 01 = return via 16-bit branch
/// - 10 = return via 32-bit branch
/// - 11 = no epilogue; useful for function fragments that may only contain a
/// prologue but the epilogue is elsewhere
/// H : 1-bit flag indicating whether the function "homes" the integer parameter
/// registers (r0-r3), allocating 16-bytes on the stack
/// Reg : 3-bit field indicating the index of the last saved non-volatile
/// register. If the R bit is set to 0, then only integer registers are
/// saved (r4-rN, where N is 4 + Reg). If the R bit is set to 1, then
/// only floating-point registers are being saved (d8-dN, where N is
/// 8 + Reg). The special case of the R bit being set to 1 and Reg equal
/// to 7 indicates that no registers are saved.
/// R : 1-bit flag indicating whether the non-volatile registers are integer or
/// floating-point. 0 indicates integer, 1 indicates floating-point. The
/// special case of the R-flag being set and Reg being set to 7 indicates
/// that no non-volatile registers are saved.
/// L : 1-bit flag indicating whether the function saves/restores the link
/// register (LR)
/// C : 1-bit flag indicating whether the function includes extra instructions
/// to setup a frame chain for fast walking. If this flag is set, r11 is
/// implicitly added to the list of saved non-volatile integer registers.
/// Stack Adjust : 10-bit field indicating the number of bytes of stack that are
/// allocated for this function. Only values between 0x000 and
/// 0x3f3 can be directly encoded. If the value is 0x3f4 or
/// greater, then the low 4 bits have special meaning as follows:
/// - Bit 0-1
/// indicate the number of words' of adjustment (1-4), minus 1
/// - Bit 2
/// indicates if the prologue combined adjustment into push
/// - Bit 3
/// indicates if the epilogue combined adjustment into pop
///
/// RESTRICTIONS:
/// - IF C is SET:
/// + L flag must be set since frame chaining requires r11 and lr
/// + r11 must NOT be included in the set of registers described by Reg
/// - IF Ret is 0:
/// + L flag must be set
// NOTE: RuntimeFunction is meant to be a simple class that provides raw access
// to all fields in the structure. The accessor methods reflect the names of
// the bitfields that they correspond to. Although some obvious simplifications
// are possible via merging of methods, it would prevent the use of this class
// to fully inspect the contents of the data structure which is particularly
// useful for scenarios such as llvm-readobj to aid in testing.
class RuntimeFunction {
public:
const support::ulittle32_t BeginAddress;
const support::ulittle32_t UnwindData;
RuntimeFunction(const support::ulittle32_t *Data)
: BeginAddress(Data[0]), UnwindData(Data[1]) {}
RuntimeFunction(const support::ulittle32_t BeginAddress,
const support::ulittle32_t UnwindData)
: BeginAddress(BeginAddress), UnwindData(UnwindData) {}
RuntimeFunctionFlag Flag() const {
return RuntimeFunctionFlag(UnwindData & 0x3);
}
uint32_t ExceptionInformationRVA() const {
assert(Flag() == RuntimeFunctionFlag::RFF_Unpacked &&
"unpacked form required for this operation");
return (UnwindData & ~0x3);
}
uint32_t PackedUnwindData() const {
assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
"packed form required for this operation");
return (UnwindData & ~0x3);
}
uint32_t FunctionLength() const {
assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
"packed form required for this operation");
return (((UnwindData & 0x00001ffc) >> 2) << 1);
}
ReturnType Ret() const {
assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
"packed form required for this operation");
assert(((UnwindData & 0x00006000) || L()) && "L must be set to 1");
return ReturnType((UnwindData & 0x00006000) >> 13);
}
bool H() const {
assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
"packed form required for this operation");
return ((UnwindData & 0x00008000) >> 15);
}
uint8_t Reg() const {
assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
"packed form required for this operation");
return ((UnwindData & 0x00070000) >> 16);
}
bool R() const {
assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
"packed form required for this operation");
return ((UnwindData & 0x00080000) >> 19);
}
bool L() const {
assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
"packed form required for this operation");
return ((UnwindData & 0x00100000) >> 20);
}
bool C() const {
assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
"packed form required for this operation");
assert(((~UnwindData & 0x00200000) || L()) &&
"L flag must be set, chaining requires r11 and LR");
assert(((~UnwindData & 0x00200000) || (Reg() < 7) || R()) &&
"r11 must not be included in Reg; C implies r11");
return ((UnwindData & 0x00200000) >> 21);
}
uint16_t StackAdjust() const {
assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
"packed form required for this operation");
return ((UnwindData & 0xffc00000) >> 22);
}
};
/// PrologueFolding - pseudo-flag derived from Stack Adjust indicating that the
/// prologue has stack adjustment combined into the push
inline bool PrologueFolding(const RuntimeFunction &RF) {
return RF.StackAdjust() >= 0x3f4 && (RF.StackAdjust() & 0x4);
}
/// Epilogue - pseudo-flag derived from Stack Adjust indicating that the
/// epilogue has stack adjustment combined into the pop
inline bool EpilogueFolding(const RuntimeFunction &RF) {
return RF.StackAdjust() >= 0x3f4 && (RF.StackAdjust() & 0x8);
}
/// StackAdjustment - calculated stack adjustment in words. The stack
/// adjustment should be determined via this function to account for the special
/// handling the special encoding when the value is >= 0x3f4.
inline uint16_t StackAdjustment(const RuntimeFunction &RF) {
uint16_t Adjustment = RF.StackAdjust();
if (Adjustment >= 0x3f4)
return (Adjustment & 0x3) + 1;
return Adjustment;
}
/// SavedRegisterMask - Utility function to calculate the set of saved general
/// purpose (r0-r15) and VFP (d0-d31) registers.
std::pair<uint16_t, uint32_t> SavedRegisterMask(const RuntimeFunction &RF,
bool Prologue = true);
/// RuntimeFunctionARM64 - An entry in the table of procedure data (.pdata)
///
/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
/// +---------------------------------------------------------------+
/// | Function Start RVA |
/// +-----------------+---+-+-------+-----+---------------------+---+
/// | Frame Size |CR |H| RegI |RegF | Function Length |Flg|
/// +-----------------+---+-+-------+-----+---------------------+---+
///
/// See https://docs.microsoft.com/en-us/cpp/build/arm64-exception-handling
/// for the full reference for this struct.
class RuntimeFunctionARM64 {
public:
const support::ulittle32_t BeginAddress;
const support::ulittle32_t UnwindData;
RuntimeFunctionARM64(const support::ulittle32_t *Data)
: BeginAddress(Data[0]), UnwindData(Data[1]) {}
RuntimeFunctionARM64(const support::ulittle32_t BeginAddress,
const support::ulittle32_t UnwindData)
: BeginAddress(BeginAddress), UnwindData(UnwindData) {}
RuntimeFunctionFlag Flag() const {
return RuntimeFunctionFlag(UnwindData & 0x3);
}
uint32_t ExceptionInformationRVA() const {
assert(Flag() == RuntimeFunctionFlag::RFF_Unpacked &&
"unpacked form required for this operation");
return (UnwindData & ~0x3);
}
uint32_t PackedUnwindData() const {
assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
"packed form required for this operation");
return (UnwindData & ~0x3);
}
uint32_t FunctionLength() const {
assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
"packed form required for this operation");
return (((UnwindData & 0x00001ffc) >> 2) << 2);
}
uint8_t RegF() const {
assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
"packed form required for this operation");
return ((UnwindData & 0x0000e000) >> 13);
}
uint8_t RegI() const {
assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
"packed form required for this operation");
return ((UnwindData & 0x000f0000) >> 16);
}
bool H() const {
assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
"packed form required for this operation");
return ((UnwindData & 0x00100000) >> 20);
}
uint8_t CR() const {
assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
"packed form required for this operation");
return ((UnwindData & 0x600000) >> 21);
}
uint16_t FrameSize() const {
assert((Flag() == RuntimeFunctionFlag::RFF_Packed ||
Flag() == RuntimeFunctionFlag::RFF_PackedFragment) &&
"packed form required for this operation");
return ((UnwindData & 0xff800000) >> 23);
}
};
/// ExceptionDataRecord - An entry in the table of exception data (.xdata)
///
/// The format on ARM is:
///
/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
/// +-------+---------+-+-+-+---+-----------------------------------+
/// | C Wrd | Epi Cnt |F|E|X|Ver| Function Length |
/// +-------+--------+'-'-'-'---'---+-------------------------------+
/// | Reserved |Ex. Code Words| (Extended Epilogue Count) |
/// +-------+--------+--------------+-------------------------------+
///
/// The format on ARM64 is:
///
/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
/// +---------+---------+-+-+---+-----------------------------------+
/// | C Wrd | Epi Cnt |E|X|Ver| Function Length |
/// +---------+------+--'-'-'---'---+-------------------------------+
/// | Reserved |Ex. Code Words| (Extended Epilogue Count) |
/// +-------+--------+--------------+-------------------------------+
///
/// Function Length : 18-bit field indicating the total length of the function
/// in bytes divided by 2. If a function is larger than
/// 512KB, then multiple pdata and xdata records must be used.
/// Vers : 2-bit field describing the version of the remaining structure. Only
/// version 0 is currently defined (values 1-3 are not permitted).
/// X : 1-bit field indicating the presence of exception data
/// E : 1-bit field indicating that the single epilogue is packed into the
/// header
/// F : 1-bit field indicating that the record describes a function fragment
/// (implies that no prologue is present, and prologue processing should be
/// skipped) (ARM only)
/// Epilogue Count : 5-bit field that differs in meaning based on the E field.
///
/// If E is set, then this field specifies the index of the
/// first unwind code describing the (only) epilogue.
///
/// Otherwise, this field indicates the number of exception
/// scopes. If more than 31 scopes exist, then this field and
/// the Code Words field must both be set to 0 to indicate that
/// an extension word is required.
/// Code Words : 4-bit (5-bit on ARM64) field that specifies the number of
/// 32-bit words needed to contain all the unwind codes. If more
/// than 15 words (31 words on ARM64) are required, then this field
/// and the Epilogue Count field must both be set to 0 to indicate
/// that an extension word is required.
/// Extended Epilogue Count, Extended Code Words :
/// Valid only if Epilog Count and Code Words are both
/// set to 0. Provides an 8-bit extended code word
/// count and 16-bits for epilogue count
///
/// The epilogue scope format on ARM is:
///
/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
/// +----------------+------+---+---+-------------------------------+
/// | Ep Start Idx | Cond |Res| Epilogue Start Offset |
/// +----------------+------+---+-----------------------------------+
///
/// The epilogue scope format on ARM64 is:
///
/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
/// +-------------------+-------+---+-------------------------------+
/// | Ep Start Idx | Res | Epilogue Start Offset |
/// +-------------------+-------+-----------------------------------+
///
/// If the E bit is unset in the header, the header is followed by a series of
/// epilogue scopes, which are sorted by their offset.
///
/// Epilogue Start Offset: 18-bit field encoding the offset of epilogue relative
/// to the start of the function in bytes divided by two
/// Res : 2-bit field reserved for future expansion (must be set to 0)
/// Condition : (ARM only) 4-bit field providing the condition under which the
/// epilogue is executed. Unconditional epilogues should set this
/// field to 0xe. Epilogues must be entirely conditional or
/// unconditional, and in Thumb-2 mode. The epilogue begins with
/// the first instruction after the IT opcode.
/// Epilogue Start Index : 8-bit field indicating the byte index of the first
/// unwind code describing the epilogue
///
/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
/// +---------------+---------------+---------------+---------------+
/// | Unwind Code 3 | Unwind Code 2 | Unwind Code 1 | Unwind Code 0 |
/// +---------------+---------------+---------------+---------------+
///
/// Following the epilogue scopes, the byte code describing the unwinding
/// follows. This is padded to align up to word alignment. Bytes are stored in
/// little endian.
///
/// 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
/// 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
/// +---------------------------------------------------------------+
/// | Exception Handler RVA (requires X = 1) |
/// +---------------------------------------------------------------+
/// | (possibly followed by data required for exception handler) |
/// +---------------------------------------------------------------+
///
/// If the X bit is set in the header, the unwind byte code is followed by the
/// exception handler information. This constants of one Exception Handler RVA
/// which is the address to the exception handler, followed immediately by the
/// variable length data associated with the exception handler.
///
struct EpilogueScope {
const support::ulittle32_t ES;
EpilogueScope(const support::ulittle32_t Data) : ES(Data) {}
// Same for both ARM and AArch64.
uint32_t EpilogueStartOffset() const {
return (ES & 0x0003ffff);
}
// Different implementations for ARM and AArch64.
uint8_t ResARM() const {
return ((ES & 0x000c0000) >> 18);
}
uint8_t ResAArch64() const {
return ((ES & 0x000f0000) >> 18);
}
// Condition is only applicable to ARM.
uint8_t Condition() const {
return ((ES & 0x00f00000) >> 20);
}
// Different implementations for ARM and AArch64.
uint8_t EpilogueStartIndexARM() const {
return ((ES & 0xff000000) >> 24);
}
uint16_t EpilogueStartIndexAArch64() const {
return ((ES & 0xffc00000) >> 22);
}
};
struct ExceptionDataRecord;
inline size_t HeaderWords(const ExceptionDataRecord &XR);
struct ExceptionDataRecord {
const support::ulittle32_t *Data;
bool isAArch64;
ExceptionDataRecord(const support::ulittle32_t *Data, bool isAArch64) :
Data(Data), isAArch64(isAArch64) {}
uint32_t FunctionLength() const {
return (Data[0] & 0x0003ffff);
}
uint32_t FunctionLengthInBytesARM() const {
return FunctionLength() << 1;
}
uint32_t FunctionLengthInBytesAArch64() const {
return FunctionLength() << 2;
}
uint8_t Vers() const {
return (Data[0] & 0x000C0000) >> 18;
}
bool X() const {
return ((Data[0] & 0x00100000) >> 20);
}
bool E() const {
return ((Data[0] & 0x00200000) >> 21);
}
bool F() const {
assert(!isAArch64 && "Fragments are only supported on ARMv7 WinEH");
return ((Data[0] & 0x00400000) >> 22);
}
uint16_t EpilogueCount() const {
if (HeaderWords(*this) == 1) {
if (isAArch64)
return (Data[0] & 0x07C00000) >> 22;
return (Data[0] & 0x0f800000) >> 23;
}
return Data[1] & 0x0000ffff;
}
uint8_t CodeWords() const {
if (HeaderWords(*this) == 1) {
if (isAArch64)
return (Data[0] & 0xf8000000) >> 27;
return (Data[0] & 0xf0000000) >> 28;
}
return (Data[1] & 0x00ff0000) >> 16;
}
ArrayRef<support::ulittle32_t> EpilogueScopes() const {
assert(E() == 0 && "epilogue scopes are only present when the E bit is 0");
size_t Offset = HeaderWords(*this);
return ArrayRef(&Data[Offset], EpilogueCount());
}
ArrayRef<uint8_t> UnwindByteCode() const {
const size_t Offset = HeaderWords(*this)
+ (E() ? 0 : EpilogueCount());
const uint8_t *ByteCode =
reinterpret_cast<const uint8_t *>(&Data[Offset]);
return ArrayRef(ByteCode, CodeWords() * sizeof(uint32_t));
}
uint32_t ExceptionHandlerRVA() const {
assert(X() && "Exception Handler RVA is only valid if the X bit is set");
return Data[HeaderWords(*this) + (E() ? 0 : EpilogueCount()) + CodeWords()];
}
uint32_t ExceptionHandlerParameter() const {
assert(X() && "Exception Handler RVA is only valid if the X bit is set");
return Data[HeaderWords(*this) + (E() ? 0 : EpilogueCount()) + CodeWords() +
1];
}
};
inline size_t HeaderWords(const ExceptionDataRecord &XR) {
if (XR.isAArch64)
return (XR.Data[0] & 0xffc00000) ? 1 : 2;
return (XR.Data[0] & 0xff800000) ? 1 : 2;
}
}
}
}
#endif
PK hwFZ�y'?G ?G Support/Path.hnu �[��� //===- llvm/Support/Path.h - Path Operating System Concept ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the llvm::sys::path namespace. It is designed after
// TR2/boost filesystem (v3), but modified to remove exception handling and the
// path class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_PATH_H
#define LLVM_SUPPORT_PATH_H
#include "llvm/ADT/Twine.h"
#include "llvm/ADT/iterator.h"
#include "llvm/Support/DataTypes.h"
#include <iterator>
namespace llvm {
namespace sys {
namespace path {
enum class Style {
native,
posix,
windows_slash,
windows_backslash,
windows = windows_backslash, // deprecated
};
/// Check if \p S uses POSIX path rules.
constexpr bool is_style_posix(Style S) {
if (S == Style::posix)
return true;
if (S != Style::native)
return false;
#if defined(_WIN32)
return false;
#else
return true;
#endif
}
/// Check if \p S uses Windows path rules.
constexpr bool is_style_windows(Style S) { return !is_style_posix(S); }
/// @name Lexical Component Iterator
/// @{
/// Path iterator.
///
/// This is an input iterator that iterates over the individual components in
/// \a path. The traversal order is as follows:
/// * The root-name element, if present.
/// * The root-directory element, if present.
/// * Each successive filename element, if present.
/// * Dot, if one or more trailing non-root slash characters are present.
/// Traversing backwards is possible with \a reverse_iterator
///
/// Iteration examples. Each component is separated by ',':
/// @code
/// / => /
/// /foo => /,foo
/// foo/ => foo,.
/// /foo/bar => /,foo,bar
/// ../ => ..,.
/// C:\foo\bar => C:,\,foo,bar
/// @endcode
class const_iterator
: public iterator_facade_base<const_iterator, std::input_iterator_tag,
const StringRef> {
StringRef Path; ///< The entire path.
StringRef Component; ///< The current component. Not necessarily in Path.
size_t Position = 0; ///< The iterators current position within Path.
Style S = Style::native; ///< The path style to use.
// An end iterator has Position = Path.size() + 1.
friend const_iterator begin(StringRef path, Style style);
friend const_iterator end(StringRef path);
public:
reference operator*() const { return Component; }
const_iterator &operator++(); // preincrement
bool operator==(const const_iterator &RHS) const;
/// Difference in bytes between this and RHS.
ptrdiff_t operator-(const const_iterator &RHS) const;
};
/// Reverse path iterator.
///
/// This is an input iterator that iterates over the individual components in
/// \a path in reverse order. The traversal order is exactly reversed from that
/// of \a const_iterator
class reverse_iterator
: public iterator_facade_base<reverse_iterator, std::input_iterator_tag,
const StringRef> {
StringRef Path; ///< The entire path.
StringRef Component; ///< The current component. Not necessarily in Path.
size_t Position = 0; ///< The iterators current position within Path.
Style S = Style::native; ///< The path style to use.
friend reverse_iterator rbegin(StringRef path, Style style);
friend reverse_iterator rend(StringRef path);
public:
reference operator*() const { return Component; }
reverse_iterator &operator++(); // preincrement
bool operator==(const reverse_iterator &RHS) const;
/// Difference in bytes between this and RHS.
ptrdiff_t operator-(const reverse_iterator &RHS) const;
};
/// Get begin iterator over \a path.
/// @param path Input path.
/// @returns Iterator initialized with the first component of \a path.
const_iterator begin(StringRef path, Style style = Style::native);
/// Get end iterator over \a path.
/// @param path Input path.
/// @returns Iterator initialized to the end of \a path.
const_iterator end(StringRef path);
/// Get reverse begin iterator over \a path.
/// @param path Input path.
/// @returns Iterator initialized with the first reverse component of \a path.
reverse_iterator rbegin(StringRef path, Style style = Style::native);
/// Get reverse end iterator over \a path.
/// @param path Input path.
/// @returns Iterator initialized to the reverse end of \a path.
reverse_iterator rend(StringRef path);
/// @}
/// @name Lexical Modifiers
/// @{
/// Remove the last component from \a path unless it is the root dir.
///
/// Similar to the POSIX "dirname" utility.
///
/// @code
/// directory/filename.cpp => directory/
/// directory/ => directory
/// filename.cpp => <empty>
/// / => /
/// @endcode
///
/// @param path A path that is modified to not have a file component.
void remove_filename(SmallVectorImpl<char> &path, Style style = Style::native);
/// Replace the file extension of \a path with \a extension.
///
/// @code
/// ./filename.cpp => ./filename.extension
/// ./filename => ./filename.extension
/// ./ => ./.extension
/// @endcode
///
/// @param path A path that has its extension replaced with \a extension.
/// @param extension The extension to be added. It may be empty. It may also
/// optionally start with a '.', if it does not, one will be
/// prepended.
void replace_extension(SmallVectorImpl<char> &path, const Twine &extension,
Style style = Style::native);
/// Replace matching path prefix with another path.
///
/// @code
/// /foo, /old, /new => /foo
/// /old, /old, /new => /new
/// /old, /old/, /new => /old
/// /old/foo, /old, /new => /new/foo
/// /old/foo, /old/, /new => /new/foo
/// /old/foo, /old/, /new/ => /new/foo
/// /oldfoo, /old, /new => /oldfoo
/// /foo, <empty>, /new => /new/foo
/// /foo, <empty>, new => new/foo
/// /old/foo, /old, <empty> => /foo
/// @endcode
///
/// @param Path If \a Path starts with \a OldPrefix modify to instead
/// start with \a NewPrefix.
/// @param OldPrefix The path prefix to strip from \a Path.
/// @param NewPrefix The path prefix to replace \a NewPrefix with.
/// @param style The style used to match the prefix. Exact match using
/// Posix style, case/separator insensitive match for Windows style.
/// @result true if \a Path begins with OldPrefix
bool replace_path_prefix(SmallVectorImpl<char> &Path, StringRef OldPrefix,
StringRef NewPrefix,
Style style = Style::native);
/// Remove redundant leading "./" pieces and consecutive separators.
///
/// @param path Input path.
/// @result The cleaned-up \a path.
StringRef remove_leading_dotslash(StringRef path, Style style = Style::native);
/// In-place remove any './' and optionally '../' components from a path.
///
/// @param path processed path
/// @param remove_dot_dot specify if '../' (except for leading "../") should be
/// removed
/// @result True if path was changed
bool remove_dots(SmallVectorImpl<char> &path, bool remove_dot_dot = false,
Style style = Style::native);
/// Append to path.
///
/// @code
/// /foo + bar/f => /foo/bar/f
/// /foo/ + bar/f => /foo/bar/f
/// foo + bar/f => foo/bar/f
/// @endcode
///
/// @param path Set to \a path + \a component.
/// @param a The component to be appended to \a path.
void append(SmallVectorImpl<char> &path, const Twine &a,
const Twine &b = "",
const Twine &c = "",
const Twine &d = "");
void append(SmallVectorImpl<char> &path, Style style, const Twine &a,
const Twine &b = "", const Twine &c = "", const Twine &d = "");
/// Append to path.
///
/// @code
/// /foo + [bar,f] => /foo/bar/f
/// /foo/ + [bar,f] => /foo/bar/f
/// foo + [bar,f] => foo/bar/f
/// @endcode
///
/// @param path Set to \a path + [\a begin, \a end).
/// @param begin Start of components to append.
/// @param end One past the end of components to append.
void append(SmallVectorImpl<char> &path, const_iterator begin,
const_iterator end, Style style = Style::native);
/// @}
/// @name Transforms (or some other better name)
/// @{
/// Convert path to the native form. This is used to give paths to users and
/// operating system calls in the platform's normal way. For example, on Windows
/// all '/' are converted to '\'. On Unix, it converts all '\' to '/'.
///
/// @param path A path that is transformed to native format.
/// @param result Holds the result of the transformation.
void native(const Twine &path, SmallVectorImpl<char> &result,
Style style = Style::native);
/// Convert path to the native form in place. This is used to give paths to
/// users and operating system calls in the platform's normal way. For example,
/// on Windows all '/' are converted to '\'.
///
/// @param path A path that is transformed to native format.
void native(SmallVectorImpl<char> &path, Style style = Style::native);
/// For Windows path styles, convert path to use the preferred path separators.
/// For other styles, do nothing.
///
/// @param path A path that is transformed to preferred format.
inline void make_preferred(SmallVectorImpl<char> &path,
Style style = Style::native) {
if (!is_style_windows(style))
return;
native(path, style);
}
/// Replaces backslashes with slashes if Windows.
///
/// @param path processed path
/// @result The result of replacing backslashes with forward slashes if Windows.
/// On Unix, this function is a no-op because backslashes are valid path
/// chracters.
std::string convert_to_slash(StringRef path, Style style = Style::native);
/// @}
/// @name Lexical Observers
/// @{
/// Get root name.
///
/// @code
/// //net/hello => //net
/// c:/hello => c: (on Windows, on other platforms nothing)
/// /hello => <empty>
/// @endcode
///
/// @param path Input path.
/// @result The root name of \a path if it has one, otherwise "".
StringRef root_name(StringRef path, Style style = Style::native);
/// Get root directory.
///
/// @code
/// /goo/hello => /
/// c:/hello => /
/// d/file.txt => <empty>
/// @endcode
///
/// @param path Input path.
/// @result The root directory of \a path if it has one, otherwise
/// "".
StringRef root_directory(StringRef path, Style style = Style::native);
/// Get root path.
///
/// Equivalent to root_name + root_directory.
///
/// @param path Input path.
/// @result The root path of \a path if it has one, otherwise "".
StringRef root_path(StringRef path, Style style = Style::native);
/// Get relative path.
///
/// @code
/// C:\hello\world => hello\world
/// foo/bar => foo/bar
/// /foo/bar => foo/bar
/// @endcode
///
/// @param path Input path.
/// @result The path starting after root_path if one exists, otherwise "".
StringRef relative_path(StringRef path, Style style = Style::native);
/// Get parent path.
///
/// @code
/// / => <empty>
/// /foo => /
/// foo/../bar => foo/..
/// @endcode
///
/// @param path Input path.
/// @result The parent path of \a path if one exists, otherwise "".
StringRef parent_path(StringRef path, Style style = Style::native);
/// Get filename.
///
/// @code
/// /foo.txt => foo.txt
/// . => .
/// .. => ..
/// / => /
/// @endcode
///
/// @param path Input path.
/// @result The filename part of \a path. This is defined as the last component
/// of \a path. Similar to the POSIX "basename" utility.
StringRef filename(StringRef path, Style style = Style::native);
/// Get stem.
///
/// If filename contains a dot but not solely one or two dots, result is the
/// substring of filename ending at (but not including) the last dot. Otherwise
/// it is filename.
///
/// @code
/// /foo/bar.txt => bar
/// /foo/bar => bar
/// /foo/.txt => <empty>
/// /foo/. => .
/// /foo/.. => ..
/// @endcode
///
/// @param path Input path.
/// @result The stem of \a path.
StringRef stem(StringRef path, Style style = Style::native);
/// Get extension.
///
/// If filename contains a dot but not solely one or two dots, result is the
/// substring of filename starting at (and including) the last dot, and ending
/// at the end of \a path. Otherwise "".
///
/// @code
/// /foo/bar.txt => .txt
/// /foo/bar => <empty>
/// /foo/.txt => .txt
/// @endcode
///
/// @param path Input path.
/// @result The extension of \a path.
StringRef extension(StringRef path, Style style = Style::native);
/// Check whether the given char is a path separator on the host OS.
///
/// @param value a character
/// @result true if \a value is a path separator character on the host OS
bool is_separator(char value, Style style = Style::native);
/// Return the preferred separator for this platform.
///
/// @result StringRef of the preferred separator, null-terminated.
StringRef get_separator(Style style = Style::native);
/// Get the typical temporary directory for the system, e.g.,
/// "/var/tmp" or "C:/TEMP"
///
/// @param erasedOnReboot Whether to favor a path that is erased on reboot
/// rather than one that potentially persists longer. This parameter will be
/// ignored if the user or system has set the typical environment variable
/// (e.g., TEMP on Windows, TMPDIR on *nix) to specify a temporary directory.
///
/// @param result Holds the resulting path name.
void system_temp_directory(bool erasedOnReboot, SmallVectorImpl<char> &result);
/// Get the user's home directory.
///
/// @param result Holds the resulting path name.
/// @result True if a home directory is set, false otherwise.
bool home_directory(SmallVectorImpl<char> &result);
/// Get the directory where packages should read user-specific configurations.
/// e.g. $XDG_CONFIG_HOME.
///
/// @param result Holds the resulting path name.
/// @result True if the appropriate path was determined, it need not exist.
bool user_config_directory(SmallVectorImpl<char> &result);
/// Get the directory where installed packages should put their
/// machine-local cache, e.g. $XDG_CACHE_HOME.
///
/// @param result Holds the resulting path name.
/// @result True if the appropriate path was determined, it need not exist.
bool cache_directory(SmallVectorImpl<char> &result);
/// Has root name?
///
/// root_name != ""
///
/// @param path Input path.
/// @result True if the path has a root name, false otherwise.
bool has_root_name(const Twine &path, Style style = Style::native);
/// Has root directory?
///
/// root_directory != ""
///
/// @param path Input path.
/// @result True if the path has a root directory, false otherwise.
bool has_root_directory(const Twine &path, Style style = Style::native);
/// Has root path?
///
/// root_path != ""
///
/// @param path Input path.
/// @result True if the path has a root path, false otherwise.
bool has_root_path(const Twine &path, Style style = Style::native);
/// Has relative path?
///
/// relative_path != ""
///
/// @param path Input path.
/// @result True if the path has a relative path, false otherwise.
bool has_relative_path(const Twine &path, Style style = Style::native);
/// Has parent path?
///
/// parent_path != ""
///
/// @param path Input path.
/// @result True if the path has a parent path, false otherwise.
bool has_parent_path(const Twine &path, Style style = Style::native);
/// Has filename?
///
/// filename != ""
///
/// @param path Input path.
/// @result True if the path has a filename, false otherwise.
bool has_filename(const Twine &path, Style style = Style::native);
/// Has stem?
///
/// stem != ""
///
/// @param path Input path.
/// @result True if the path has a stem, false otherwise.
bool has_stem(const Twine &path, Style style = Style::native);
/// Has extension?
///
/// extension != ""
///
/// @param path Input path.
/// @result True if the path has a extension, false otherwise.
bool has_extension(const Twine &path, Style style = Style::native);
/// Is path absolute?
///
/// According to cppreference.com, C++17 states: "An absolute path is a path
/// that unambiguously identifies the location of a file without reference to
/// an additional starting location."
///
/// In other words, the rules are:
/// 1) POSIX style paths with nonempty root directory are absolute.
/// 2) Windows style paths with nonempty root name and root directory are
/// absolute.
/// 3) No other paths are absolute.
///
/// \see has_root_name
/// \see has_root_directory
///
/// @param path Input path.
/// @result True if the path is absolute, false if it is not.
bool is_absolute(const Twine &path, Style style = Style::native);
/// Is path absolute using GNU rules?
///
/// GNU rules are:
/// 1) Paths starting with a path separator are absolute.
/// 2) Windows style paths are also absolute if they start with a character
/// followed by ':'.
/// 3) No other paths are absolute.
///
/// On Windows style the path "C:\Users\Default" has "C:" as root name and "\"
/// as root directory.
///
/// Hence "C:" on Windows is absolute under GNU rules and not absolute under
/// C++17 because it has no root directory. Likewise "/" and "\" on Windows are
/// absolute under GNU and are not absolute under C++17 due to empty root name.
///
/// \see has_root_name
/// \see has_root_directory
///
/// @param path Input path.
/// @param style The style of \p path (e.g. Windows or POSIX). "native" style
/// means to derive the style from the host.
/// @result True if the path is absolute following GNU rules, false if it is
/// not.
bool is_absolute_gnu(const Twine &path, Style style = Style::native);
/// Is path relative?
///
/// @param path Input path.
/// @result True if the path is relative, false if it is not.
bool is_relative(const Twine &path, Style style = Style::native);
} // end namespace path
} // end namespace sys
} // end namespace llvm
#endif
PK hwFZ��g g Support/SymbolRemappingReader.hnu �[��� //===- SymbolRemappingReader.h - Read symbol remapping file -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains definitions needed for reading and applying symbol
// remapping files.
//
// Support is provided only for the Itanium C++ name mangling scheme for now.
//
// NOTE: If you are making changes to this file format, please remember
// to document them in the Clang documentation at
// tools/clang/docs/UsersManual.rst.
//
// File format
// -----------
//
// The symbol remappings are written as an ASCII text file. Blank lines and
// lines starting with a # are ignored. All other lines specify a kind of
// mangled name fragment, along with two fragments of that kind that should
// be treated as equivalent, separated by spaces.
//
// See http://itanium-cxx-abi.github.io/cxx-abi/abi.html#mangling for a
// description of the Itanium name mangling scheme.
//
// The accepted fragment kinds are:
//
// * name A <name>, such as 6foobar or St3__1
// * type A <type>, such as Ss or N4llvm9StringRefE
// * encoding An <encoding> (a complete mangling without the leading _Z)
//
// For example:
//
// # Ignore int / long differences to treat symbols from 32-bit and 64-bit
// # builds with differing size_t / ptrdiff_t / intptr_t as equivalent.
// type i l
// type j m
//
// # Ignore differences between libc++ and libstdc++, and between libstdc++'s
// # C++98 and C++11 ABIs.
// name 3std St3__1
// name 3std St7__cxx11
//
// # Remap a function overload to a specialization of a template (including
// # any local symbols declared within it).
// encoding N2NS1fEi N2NS1fIiEEvT_
//
// # Substitutions must be remapped separately from namespace 'std' for now.
// name Sa NSt3__19allocatorE
// name Sb NSt3__112basic_stringE
// type Ss NSt3__112basic_stringIcSt11char_traitsIcESaE
// # ...
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_SYMBOLREMAPPINGREADER_H
#define LLVM_SUPPORT_SYMBOLREMAPPINGREADER_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/ItaniumManglingCanonicalizer.h"
namespace llvm {
class MemoryBuffer;
class SymbolRemappingParseError : public ErrorInfo<SymbolRemappingParseError> {
public:
SymbolRemappingParseError(StringRef File, int64_t Line, const Twine &Message)
: File(File), Line(Line), Message(Message.str()) {}
void log(llvm::raw_ostream &OS) const override {
OS << File << ':' << Line << ": " << Message;
}
std::error_code convertToErrorCode() const override {
return llvm::inconvertibleErrorCode();
}
StringRef getFileName() const { return File; }
int64_t getLineNum() const { return Line; }
StringRef getMessage() const { return Message; }
static char ID;
private:
std::string File;
int64_t Line;
std::string Message;
};
/// Reader for symbol remapping files.
///
/// Remaps the symbol names in profile data to match those in the program
/// according to a set of rules specified in a given file.
class SymbolRemappingReader {
public:
/// Read remappings from the given buffer, which must live as long as
/// the remapper.
Error read(MemoryBuffer &B);
/// A Key represents an equivalence class of symbol names.
using Key = uintptr_t;
/// Construct a key for the given symbol, or return an existing one if an
/// equivalent name has already been inserted. The symbol name must live
/// as long as the remapper.
///
/// The result will be Key() if the name cannot be remapped (typically
/// because it is not a valid mangled name).
Key insert(StringRef FunctionName) {
return Canonicalizer.canonicalize(FunctionName);
}
/// Map the given symbol name into the key for the corresponding equivalence
/// class.
///
/// The result will typically be Key() if no equivalent symbol has been
/// inserted, but this is not guaranteed: a Key different from all keys ever
/// returned by \c insert may be returned instead.
Key lookup(StringRef FunctionName) {
return Canonicalizer.lookup(FunctionName);
}
private:
ItaniumManglingCanonicalizer Canonicalizer;
};
} // end namespace llvm
#endif // LLVM_SUPPORT_SYMBOLREMAPPINGREADER_H
PK hwFZ֊Š3 3 Support/Chrono.hnu �[��� //===- llvm/Support/Chrono.h - Utilities for Timing Manipulation-*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_CHRONO_H
#define LLVM_SUPPORT_CHRONO_H
#include "llvm/Support/Compiler.h"
#include "llvm/Support/FormatProviders.h"
#include <chrono>
#include <ctime>
#include <ratio>
namespace llvm {
class raw_ostream;
namespace sys {
/// A time point on the system clock. This is provided for two reasons:
/// - to insulate us against subtle differences in behavior to differences in
/// system clock precision (which is implementation-defined and differs
/// between platforms).
/// - to shorten the type name
/// The default precision is nanoseconds. If you need a specific precision
/// specify it explicitly. If unsure, use the default. If you need a time point
/// on a clock other than the system_clock, use std::chrono directly.
template <typename D = std::chrono::nanoseconds>
using TimePoint = std::chrono::time_point<std::chrono::system_clock, D>;
/// Convert a TimePoint to std::time_t
inline std::time_t toTimeT(TimePoint<> TP) {
using namespace std::chrono;
return system_clock::to_time_t(
time_point_cast<system_clock::time_point::duration>(TP));
}
/// Convert a std::time_t to a TimePoint
inline TimePoint<std::chrono::seconds>
toTimePoint(std::time_t T) {
using namespace std::chrono;
return time_point_cast<seconds>(system_clock::from_time_t(T));
}
/// Convert a std::time_t + nanoseconds to a TimePoint
inline TimePoint<>
toTimePoint(std::time_t T, uint32_t nsec) {
using namespace std::chrono;
return time_point_cast<nanoseconds>(system_clock::from_time_t(T))
+ nanoseconds(nsec);
}
} // namespace sys
raw_ostream &operator<<(raw_ostream &OS, sys::TimePoint<> TP);
/// Format provider for TimePoint<>
///
/// The options string is a strftime format string, with extensions:
/// - %L is millis: 000-999
/// - %f is micros: 000000-999999
/// - %N is nanos: 000000000 - 999999999
///
/// If no options are given, the default format is "%Y-%m-%d %H:%M:%S.%N".
template <>
struct format_provider<sys::TimePoint<>> {
static void format(const sys::TimePoint<> &TP, llvm::raw_ostream &OS,
StringRef Style);
};
namespace detail {
template <typename Period> struct unit { static const char value[]; };
template <typename Period> const char unit<Period>::value[] = "";
template <> struct unit<std::ratio<3600>> { static const char value[]; };
template <> struct unit<std::ratio<60>> { static const char value[]; };
template <> struct unit<std::ratio<1>> { static const char value[]; };
template <> struct unit<std::milli> { static const char value[]; };
template <> struct unit<std::micro> { static const char value[]; };
template <> struct unit<std::nano> { static const char value[]; };
} // namespace detail
/// Implementation of format_provider<T> for duration types.
///
/// The options string of a duration type has the grammar:
///
/// duration_options ::= [unit][show_unit [number_options]]
/// unit ::= `h`|`m`|`s`|`ms|`us`|`ns`
/// show_unit ::= `+` | `-`
/// number_options ::= options string for a integral or floating point type
///
/// Examples
/// =================================
/// | options | Input | Output |
/// =================================
/// | "" | 1s | 1 s |
/// | "ms" | 1s | 1000 ms |
/// | "ms-" | 1s | 1000 |
/// | "ms-n" | 1s | 1,000 |
/// | "" | 1.0s | 1.00 s |
/// =================================
///
/// If the unit of the duration type is not one of the units specified above,
/// it is still possible to format it, provided you explicitly request a
/// display unit or you request that the unit is not displayed.
template <typename Rep, typename Period>
struct format_provider<std::chrono::duration<Rep, Period>> {
private:
typedef std::chrono::duration<Rep, Period> Dur;
typedef std::conditional_t<std::chrono::treat_as_floating_point<Rep>::value,
double, intmax_t>
InternalRep;
template <typename AsPeriod> static InternalRep getAs(const Dur &D) {
using namespace std::chrono;
return duration_cast<duration<InternalRep, AsPeriod>>(D).count();
}
static std::pair<InternalRep, StringRef> consumeUnit(StringRef &Style,
const Dur &D) {
using namespace std::chrono;
if (Style.consume_front("ns"))
return {getAs<std::nano>(D), "ns"};
if (Style.consume_front("us"))
return {getAs<std::micro>(D), "us"};
if (Style.consume_front("ms"))
return {getAs<std::milli>(D), "ms"};
if (Style.consume_front("s"))
return {getAs<std::ratio<1>>(D), "s"};
if (Style.consume_front("m"))
return {getAs<std::ratio<60>>(D), "m"};
if (Style.consume_front("h"))
return {getAs<std::ratio<3600>>(D), "h"};
return {D.count(), detail::unit<Period>::value};
}
static bool consumeShowUnit(StringRef &Style) {
if (Style.empty())
return true;
if (Style.consume_front("-"))
return false;
if (Style.consume_front("+"))
return true;
assert(0 && "Unrecognised duration format");
return true;
}
public:
static void format(const Dur &D, llvm::raw_ostream &Stream, StringRef Style) {
InternalRep count;
StringRef unit;
std::tie(count, unit) = consumeUnit(Style, D);
bool show_unit = consumeShowUnit(Style);
format_provider<InternalRep>::format(count, Stream, Style);
if (show_unit) {
assert(!unit.empty());
Stream << " " << unit;
}
}
};
} // namespace llvm
#endif // LLVM_SUPPORT_CHRONO_H
PK hwFZ��穾 � Support/RWMutex.hnu �[��� //===- RWMutex.h - Reader/Writer Mutual Exclusion Lock ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the llvm::sys::RWMutex class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_RWMUTEX_H
#define LLVM_SUPPORT_RWMUTEX_H
#include "llvm/Config/llvm-config.h"
#include "llvm/Support/Threading.h"
#include <cassert>
#include <mutex>
#include <shared_mutex>
// std::shared_timed_mutex is only availble on macOS 10.12 and later.
#if defined(__APPLE__) && defined(__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__)
#if __ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ < 101200
#define LLVM_USE_RW_MUTEX_IMPL
#endif
#endif
namespace llvm {
namespace sys {
#if defined(LLVM_USE_RW_MUTEX_IMPL)
/// Platform agnostic RWMutex class.
class RWMutexImpl {
/// @name Constructors
/// @{
public:
/// Initializes the lock but doesn't acquire it.
/// Default Constructor.
explicit RWMutexImpl();
/// @}
/// @name Do Not Implement
/// @{
RWMutexImpl(const RWMutexImpl &original) = delete;
RWMutexImpl &operator=(const RWMutexImpl &) = delete;
/// @}
/// Releases and removes the lock
/// Destructor
~RWMutexImpl();
/// @}
/// @name Methods
/// @{
public:
/// Attempts to unconditionally acquire the lock in reader mode. If the
/// lock is held by a writer, this method will wait until it can acquire
/// the lock.
/// @returns false if any kind of error occurs, true otherwise.
/// Unconditionally acquire the lock in reader mode.
bool lock_shared();
/// Attempts to release the lock in reader mode.
/// @returns false if any kind of error occurs, true otherwise.
/// Unconditionally release the lock in reader mode.
bool unlock_shared();
/// Attempts to unconditionally acquire the lock in reader mode. If the
/// lock is held by any readers, this method will wait until it can
/// acquire the lock.
/// @returns false if any kind of error occurs, true otherwise.
/// Unconditionally acquire the lock in writer mode.
bool lock();
/// Attempts to release the lock in writer mode.
/// @returns false if any kind of error occurs, true otherwise.
/// Unconditionally release the lock in write mode.
bool unlock();
//@}
/// @name Platform Dependent Data
/// @{
private:
#if defined(LLVM_ENABLE_THREADS) && LLVM_ENABLE_THREADS != 0
void *data_ = nullptr; ///< We don't know what the data will be
#endif
};
#endif
/// SmartMutex - An R/W mutex with a compile time constant parameter that
/// indicates whether this mutex should become a no-op when we're not
/// running in multithreaded mode.
template <bool mt_only> class SmartRWMutex {
#if !defined(LLVM_USE_RW_MUTEX_IMPL)
std::shared_mutex impl;
#else
RWMutexImpl impl;
#endif
unsigned readers = 0;
unsigned writers = 0;
public:
bool lock_shared() {
if (!mt_only || llvm_is_multithreaded()) {
impl.lock_shared();
return true;
}
// Single-threaded debugging code. This would be racy in multithreaded
// mode, but provides not basic checks in single threaded mode.
++readers;
return true;
}
bool unlock_shared() {
if (!mt_only || llvm_is_multithreaded()) {
impl.unlock_shared();
return true;
}
// Single-threaded debugging code. This would be racy in multithreaded
// mode, but provides not basic checks in single threaded mode.
assert(readers > 0 && "Reader lock not acquired before release!");
--readers;
return true;
}
bool lock() {
if (!mt_only || llvm_is_multithreaded()) {
impl.lock();
return true;
}
// Single-threaded debugging code. This would be racy in multithreaded
// mode, but provides not basic checks in single threaded mode.
assert(writers == 0 && "Writer lock already acquired!");
++writers;
return true;
}
bool unlock() {
if (!mt_only || llvm_is_multithreaded()) {
impl.unlock();
return true;
}
// Single-threaded debugging code. This would be racy in multithreaded
// mode, but provides not basic checks in single threaded mode.
assert(writers == 1 && "Writer lock not acquired before release!");
--writers;
return true;
}
};
typedef SmartRWMutex<false> RWMutex;
/// ScopedReader - RAII acquisition of a reader lock
#if !defined(LLVM_USE_RW_MUTEX_IMPL)
template <bool mt_only>
using SmartScopedReader = const std::shared_lock<SmartRWMutex<mt_only>>;
#else
template <bool mt_only> struct SmartScopedReader {
SmartRWMutex<mt_only> &mutex;
explicit SmartScopedReader(SmartRWMutex<mt_only> &m) : mutex(m) {
mutex.lock_shared();
}
~SmartScopedReader() { mutex.unlock_shared(); }
};
#endif
typedef SmartScopedReader<false> ScopedReader;
/// ScopedWriter - RAII acquisition of a writer lock
#if !defined(LLVM_USE_RW_MUTEX_IMPL)
template <bool mt_only>
using SmartScopedWriter = std::lock_guard<SmartRWMutex<mt_only>>;
#else
template <bool mt_only> struct SmartScopedWriter {
SmartRWMutex<mt_only> &mutex;
explicit SmartScopedWriter(SmartRWMutex<mt_only> &m) : mutex(m) {
mutex.lock();
}
~SmartScopedWriter() { mutex.unlock(); }
};
#endif
typedef SmartScopedWriter<false> ScopedWriter;
} // end namespace sys
} // end namespace llvm
#endif // LLVM_SUPPORT_RWMUTEX_H
PK hwFZ���6 6 Support/Errc.hnu �[��� //===- llvm/Support/Errc.h - Defines the llvm::errc enum --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// While std::error_code works OK on all platforms we use, there are some
// some problems with std::errc that can be avoided by using our own
// enumeration:
//
// * std::errc is a namespace in some implementations. That means that ADL
// doesn't work and it is sometimes necessary to write std::make_error_code
// or in templates:
// using std::make_error_code;
// make_error_code(...);
//
// with this enum it is safe to always just use make_error_code.
//
// * Some implementations define fewer names than others. This header has
// the intersection of all the ones we support.
//
// * std::errc is just marked with is_error_condition_enum. This means that
// common patterns like AnErrorCode == errc::no_such_file_or_directory take
// 4 virtual calls instead of two comparisons.
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ERRC_H
#define LLVM_SUPPORT_ERRC_H
#include <system_error>
namespace llvm {
enum class errc {
argument_list_too_long = int(std::errc::argument_list_too_long),
argument_out_of_domain = int(std::errc::argument_out_of_domain),
bad_address = int(std::errc::bad_address),
bad_file_descriptor = int(std::errc::bad_file_descriptor),
broken_pipe = int(std::errc::broken_pipe),
device_or_resource_busy = int(std::errc::device_or_resource_busy),
directory_not_empty = int(std::errc::directory_not_empty),
executable_format_error = int(std::errc::executable_format_error),
file_exists = int(std::errc::file_exists),
file_too_large = int(std::errc::file_too_large),
filename_too_long = int(std::errc::filename_too_long),
function_not_supported = int(std::errc::function_not_supported),
illegal_byte_sequence = int(std::errc::illegal_byte_sequence),
inappropriate_io_control_operation =
int(std::errc::inappropriate_io_control_operation),
interrupted = int(std::errc::interrupted),
invalid_argument = int(std::errc::invalid_argument),
invalid_seek = int(std::errc::invalid_seek),
io_error = int(std::errc::io_error),
is_a_directory = int(std::errc::is_a_directory),
no_child_process = int(std::errc::no_child_process),
no_lock_available = int(std::errc::no_lock_available),
no_space_on_device = int(std::errc::no_space_on_device),
no_such_device_or_address = int(std::errc::no_such_device_or_address),
no_such_device = int(std::errc::no_such_device),
no_such_file_or_directory = int(std::errc::no_such_file_or_directory),
no_such_process = int(std::errc::no_such_process),
not_a_directory = int(std::errc::not_a_directory),
not_enough_memory = int(std::errc::not_enough_memory),
not_supported = int(std::errc::not_supported),
operation_not_permitted = int(std::errc::operation_not_permitted),
permission_denied = int(std::errc::permission_denied),
read_only_file_system = int(std::errc::read_only_file_system),
resource_deadlock_would_occur = int(std::errc::resource_deadlock_would_occur),
resource_unavailable_try_again =
int(std::errc::resource_unavailable_try_again),
result_out_of_range = int(std::errc::result_out_of_range),
too_many_files_open_in_system = int(std::errc::too_many_files_open_in_system),
too_many_files_open = int(std::errc::too_many_files_open),
too_many_links = int(std::errc::too_many_links)
};
inline std::error_code make_error_code(errc E) {
return std::error_code(static_cast<int>(E), std::generic_category());
}
}
namespace std {
template <> struct is_error_code_enum<llvm::errc> : std::true_type {};
}
#endif
PK hwFZ̰h Support/WindowsError.hnu �[��� //===-- WindowsError.h - Support for mapping windows errors to posix-------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_WINDOWSERROR_H
#define LLVM_SUPPORT_WINDOWSERROR_H
#include <system_error>
namespace llvm {
std::error_code mapWindowsError(unsigned EV);
}
#endif
PK hwFZ�[H
%
% Support/ThreadPool.hnu �[��� //===-- llvm/Support/ThreadPool.h - A ThreadPool implementation -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines a crude C++11 based thread pool.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_THREADPOOL_H
#define LLVM_SUPPORT_THREADPOOL_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/Support/RWMutex.h"
#include "llvm/Support/Threading.h"
#include "llvm/Support/thread.h"
#include <future>
#include <condition_variable>
#include <deque>
#include <functional>
#include <memory>
#include <mutex>
#include <utility>
namespace llvm {
class ThreadPoolTaskGroup;
/// A ThreadPool for asynchronous parallel execution on a defined number of
/// threads.
///
/// The pool keeps a vector of threads alive, waiting on a condition variable
/// for some work to become available.
///
/// It is possible to reuse one thread pool for different groups of tasks
/// by grouping tasks using ThreadPoolTaskGroup. All tasks are processed using
/// the same queue, but it is possible to wait only for a specific group of
/// tasks to finish.
///
/// It is also possible for worker threads to submit new tasks and wait for
/// them. Note that this may result in a deadlock in cases such as when a task
/// (directly or indirectly) tries to wait for its own completion, or when all
/// available threads are used up by tasks waiting for a task that has no thread
/// left to run on (this includes waiting on the returned future). It should be
/// generally safe to wait() for a group as long as groups do not form a cycle.
class ThreadPool {
public:
/// Construct a pool using the hardware strategy \p S for mapping hardware
/// execution resources (threads, cores, CPUs)
/// Defaults to using the maximum execution resources in the system, but
/// accounting for the affinity mask.
ThreadPool(ThreadPoolStrategy S = hardware_concurrency());
/// Blocking destructor: the pool will wait for all the threads to complete.
~ThreadPool();
/// Asynchronous submission of a task to the pool. The returned future can be
/// used to wait for the task to finish and is *non-blocking* on destruction.
template <typename Function, typename... Args>
auto async(Function &&F, Args &&...ArgList) {
auto Task =
std::bind(std::forward<Function>(F), std::forward<Args>(ArgList)...);
return async(std::move(Task));
}
/// Overload, task will be in the given task group.
template <typename Function, typename... Args>
auto async(ThreadPoolTaskGroup &Group, Function &&F, Args &&...ArgList) {
auto Task =
std::bind(std::forward<Function>(F), std::forward<Args>(ArgList)...);
return async(Group, std::move(Task));
}
/// Asynchronous submission of a task to the pool. The returned future can be
/// used to wait for the task to finish and is *non-blocking* on destruction.
template <typename Func>
auto async(Func &&F) -> std::shared_future<decltype(F())> {
return asyncImpl(std::function<decltype(F())()>(std::forward<Func>(F)),
nullptr);
}
template <typename Func>
auto async(ThreadPoolTaskGroup &Group, Func &&F)
-> std::shared_future<decltype(F())> {
return asyncImpl(std::function<decltype(F())()>(std::forward<Func>(F)),
&Group);
}
/// Blocking wait for all the threads to complete and the queue to be empty.
/// It is an error to try to add new tasks while blocking on this call.
/// Calling wait() from a task would deadlock waiting for itself.
void wait();
/// Blocking wait for only all the threads in the given group to complete.
/// It is possible to wait even inside a task, but waiting (directly or
/// indirectly) on itself will deadlock. If called from a task running on a
/// worker thread, the call may process pending tasks while waiting in order
/// not to waste the thread.
void wait(ThreadPoolTaskGroup &Group);
// TODO: misleading legacy name warning!
// Returns the maximum number of worker threads in the pool, not the current
// number of threads!
unsigned getThreadCount() const { return MaxThreadCount; }
/// Returns true if the current thread is a worker thread of this thread pool.
bool isWorkerThread() const;
private:
/// Helpers to create a promise and a callable wrapper of \p Task that sets
/// the result of the promise. Returns the callable and a future to access the
/// result.
template <typename ResTy>
static std::pair<std::function<void()>, std::future<ResTy>>
createTaskAndFuture(std::function<ResTy()> Task) {
std::shared_ptr<std::promise<ResTy>> Promise =
std::make_shared<std::promise<ResTy>>();
auto F = Promise->get_future();
return {
[Promise = std::move(Promise), Task]() { Promise->set_value(Task()); },
std::move(F)};
}
static std::pair<std::function<void()>, std::future<void>>
createTaskAndFuture(std::function<void()> Task) {
std::shared_ptr<std::promise<void>> Promise =
std::make_shared<std::promise<void>>();
auto F = Promise->get_future();
return {[Promise = std::move(Promise), Task]() {
Task();
Promise->set_value();
},
std::move(F)};
}
/// Returns true if all tasks in the given group have finished (nullptr means
/// all tasks regardless of their group). QueueLock must be locked.
bool workCompletedUnlocked(ThreadPoolTaskGroup *Group) const;
/// Asynchronous submission of a task to the pool. The returned future can be
/// used to wait for the task to finish and is *non-blocking* on destruction.
template <typename ResTy>
std::shared_future<ResTy> asyncImpl(std::function<ResTy()> Task,
ThreadPoolTaskGroup *Group) {
#if LLVM_ENABLE_THREADS
/// Wrap the Task in a std::function<void()> that sets the result of the
/// corresponding future.
auto R = createTaskAndFuture(Task);
int requestedThreads;
{
// Lock the queue and push the new task
std::unique_lock<std::mutex> LockGuard(QueueLock);
// Don't allow enqueueing after disabling the pool
assert(EnableFlag && "Queuing a thread during ThreadPool destruction");
Tasks.emplace_back(std::make_pair(std::move(R.first), Group));
requestedThreads = ActiveThreads + Tasks.size();
}
QueueCondition.notify_one();
grow(requestedThreads);
return R.second.share();
#else // LLVM_ENABLE_THREADS Disabled
// Get a Future with launch::deferred execution using std::async
auto Future = std::async(std::launch::deferred, std::move(Task)).share();
// Wrap the future so that both ThreadPool::wait() can operate and the
// returned future can be sync'ed on.
Tasks.emplace_back(std::make_pair([Future]() { Future.get(); }, Group));
return Future;
#endif
}
#if LLVM_ENABLE_THREADS
// Grow to ensure that we have at least `requested` Threads, but do not go
// over MaxThreadCount.
void grow(int requested);
void processTasks(ThreadPoolTaskGroup *WaitingForGroup);
#endif
/// Threads in flight
std::vector<llvm::thread> Threads;
/// Lock protecting access to the Threads vector.
mutable llvm::sys::RWMutex ThreadsLock;
/// Tasks waiting for execution in the pool.
std::deque<std::pair<std::function<void()>, ThreadPoolTaskGroup *>> Tasks;
/// Locking and signaling for accessing the Tasks queue.
std::mutex QueueLock;
std::condition_variable QueueCondition;
/// Signaling for job completion (all tasks or all tasks in a group).
std::condition_variable CompletionCondition;
/// Keep track of the number of thread actually busy
unsigned ActiveThreads = 0;
/// Number of threads active for tasks in the given group (only non-zero).
DenseMap<ThreadPoolTaskGroup *, unsigned> ActiveGroups;
#if LLVM_ENABLE_THREADS // avoids warning for unused variable
/// Signal for the destruction of the pool, asking thread to exit.
bool EnableFlag = true;
#endif
const ThreadPoolStrategy Strategy;
/// Maximum number of threads to potentially grow this pool to.
const unsigned MaxThreadCount;
};
/// A group of tasks to be run on a thread pool. Thread pool tasks in different
/// groups can run on the same threadpool but can be waited for separately.
/// It is even possible for tasks of one group to submit and wait for tasks
/// of another group, as long as this does not form a loop.
class ThreadPoolTaskGroup {
public:
/// The ThreadPool argument is the thread pool to forward calls to.
ThreadPoolTaskGroup(ThreadPool &Pool) : Pool(Pool) {}
/// Blocking destructor: will wait for all the tasks in the group to complete
/// by calling ThreadPool::wait().
~ThreadPoolTaskGroup() { wait(); }
/// Calls ThreadPool::async() for this group.
template <typename Function, typename... Args>
inline auto async(Function &&F, Args &&...ArgList) {
return Pool.async(*this, std::forward<Function>(F),
std::forward<Args>(ArgList)...);
}
/// Calls ThreadPool::wait() for this group.
void wait() { Pool.wait(*this); }
private:
ThreadPool &Pool;
};
} // namespace llvm
#endif // LLVM_SUPPORT_THREADPOOL_H
PK hwFZ*�� Support/FileSystem/UniqueID.hnu �[��� //===- llvm/Support/FileSystem/UniqueID.h - UniqueID for files --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file is cut out of llvm/Support/FileSystem.h to allow UniqueID to be
// reused without bloating the includes.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_FILESYSTEM_UNIQUEID_H
#define LLVM_SUPPORT_FILESYSTEM_UNIQUEID_H
#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/ADT/Hashing.h"
#include <cstdint>
#include <utility>
namespace llvm {
namespace sys {
namespace fs {
class UniqueID {
uint64_t Device;
uint64_t File;
public:
UniqueID() = default;
UniqueID(uint64_t Device, uint64_t File) : Device(Device), File(File) {}
bool operator==(const UniqueID &Other) const {
return Device == Other.Device && File == Other.File;
}
bool operator!=(const UniqueID &Other) const { return !(*this == Other); }
bool operator<(const UniqueID &Other) const {
/// Don't use std::tie since it bloats the compile time of this header.
if (Device < Other.Device)
return true;
if (Other.Device < Device)
return false;
return File < Other.File;
}
uint64_t getDevice() const { return Device; }
uint64_t getFile() const { return File; }
};
} // end namespace fs
} // end namespace sys
// Support UniqueIDs as DenseMap keys.
template <> struct DenseMapInfo<llvm::sys::fs::UniqueID> {
static inline llvm::sys::fs::UniqueID getEmptyKey() {
auto EmptyKey = DenseMapInfo<std::pair<uint64_t, uint64_t>>::getEmptyKey();
return {EmptyKey.first, EmptyKey.second};
}
static inline llvm::sys::fs::UniqueID getTombstoneKey() {
auto TombstoneKey =
DenseMapInfo<std::pair<uint64_t, uint64_t>>::getTombstoneKey();
return {TombstoneKey.first, TombstoneKey.second};
}
static hash_code getHashValue(const llvm::sys::fs::UniqueID &Tag) {
return hash_value(std::make_pair(Tag.getDevice(), Tag.getFile()));
}
static bool isEqual(const llvm::sys::fs::UniqueID &LHS,
const llvm::sys::fs::UniqueID &RHS) {
return LHS == RHS;
}
};
} // end namespace llvm
#endif // LLVM_SUPPORT_FILESYSTEM_UNIQUEID_H
PK hwFZ��L�\ \ Support/CSKYTargetParser.hnu �[��� //===-- llvm/Support/CSKYTargetParser.h -------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This header is deprecated in favour of
/// `llvm/TargetParser/CSKYTargetParser.h`.
///
//===----------------------------------------------------------------------===//
#include "llvm/TargetParser/CSKYTargetParser.h"
PK hwFZ�V�'5 5 Support/RISCVISAInfo.hnu �[��� //===-- RISCVISAInfo.h - RISC-V ISA Information -----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_RISCVISAINFO_H
#define LLVM_SUPPORT_RISCVISAINFO_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Error.h"
#include <map>
#include <string>
#include <vector>
namespace llvm {
struct RISCVExtensionInfo {
unsigned MajorVersion;
unsigned MinorVersion;
};
class RISCVISAInfo {
public:
RISCVISAInfo(const RISCVISAInfo &) = delete;
RISCVISAInfo &operator=(const RISCVISAInfo &) = delete;
static bool compareExtension(const std::string &LHS, const std::string &RHS);
/// Helper class for OrderedExtensionMap.
struct ExtensionComparator {
bool operator()(const std::string &LHS, const std::string &RHS) const {
return compareExtension(LHS, RHS);
}
};
/// OrderedExtensionMap is std::map, it's specialized to keep entries
/// in canonical order of extension.
typedef std::map<std::string, RISCVExtensionInfo, ExtensionComparator>
OrderedExtensionMap;
RISCVISAInfo(unsigned XLen, OrderedExtensionMap &Exts)
: XLen(XLen), FLen(0), MinVLen(0), MaxELen(0), MaxELenFp(0), Exts(Exts) {}
/// Parse RISC-V ISA info from arch string.
/// If IgnoreUnknown is set, any unrecognised extension names or
/// extensions with unrecognised versions will be silently dropped, except
/// for the special case of the base 'i' and 'e' extensions, where the
/// default version will be used (as ignoring the base is not possible).
static llvm::Expected<std::unique_ptr<RISCVISAInfo>>
parseArchString(StringRef Arch, bool EnableExperimentalExtension,
bool ExperimentalExtensionVersionCheck = true,
bool IgnoreUnknown = false);
/// Parse RISC-V ISA info from an arch string that is already in normalized
/// form (as defined in the psABI). Unlike parseArchString, this function
/// will not error for unrecognized extension names or extension versions.
static llvm::Expected<std::unique_ptr<RISCVISAInfo>>
parseNormalizedArchString(StringRef Arch);
/// Parse RISC-V ISA info from feature vector.
static llvm::Expected<std::unique_ptr<RISCVISAInfo>>
parseFeatures(unsigned XLen, const std::vector<std::string> &Features);
/// Convert RISC-V ISA info to a feature vector.
void toFeatures(std::vector<StringRef> &Features,
llvm::function_ref<StringRef(const Twine &)> StrAlloc,
bool AddAllExtensions) const;
const OrderedExtensionMap &getExtensions() const { return Exts; };
unsigned getXLen() const { return XLen; };
unsigned getFLen() const { return FLen; };
unsigned getMinVLen() const { return MinVLen; }
unsigned getMaxVLen() const { return 65536; }
unsigned getMaxELen() const { return MaxELen; }
unsigned getMaxELenFp() const { return MaxELenFp; }
bool hasExtension(StringRef Ext) const;
std::string toString() const;
std::vector<std::string> toFeatureVector() const;
StringRef computeDefaultABI() const;
static bool isSupportedExtensionFeature(StringRef Ext);
static bool isSupportedExtension(StringRef Ext);
static bool isSupportedExtension(StringRef Ext, unsigned MajorVersion,
unsigned MinorVersion);
static llvm::Expected<std::unique_ptr<RISCVISAInfo>>
postProcessAndChecking(std::unique_ptr<RISCVISAInfo> &&ISAInfo);
private:
RISCVISAInfo(unsigned XLen)
: XLen(XLen), FLen(0), MinVLen(0), MaxELen(0), MaxELenFp(0) {}
unsigned XLen;
unsigned FLen;
unsigned MinVLen;
unsigned MaxELen, MaxELenFp;
OrderedExtensionMap Exts;
void addExtension(StringRef ExtName, unsigned MajorVersion,
unsigned MinorVersion);
Error checkDependency();
void updateImplication();
void updateCombination();
void updateFLen();
void updateMinVLen();
void updateMaxELen();
};
} // namespace llvm
#endif
PK hwFZ�|J*�
�
Support/Caching.hnu �[��� //===- Caching.h - LLVM Local File Cache ------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the CachedFileStream and the localCache function, which
// simplifies caching files on the local filesystem in a directory whose
// contents are managed by a CachePruningPolicy.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_CACHING_H
#define LLVM_SUPPORT_CACHING_H
#include "llvm/Support/Error.h"
namespace llvm {
class MemoryBuffer;
/// This class wraps an output stream for a file. Most clients should just be
/// able to return an instance of this base class from the stream callback, but
/// if a client needs to perform some action after the stream is written to,
/// that can be done by deriving from this class and overriding the destructor.
class CachedFileStream {
public:
CachedFileStream(std::unique_ptr<raw_pwrite_stream> OS,
std::string OSPath = "")
: OS(std::move(OS)), ObjectPathName(OSPath) {}
std::unique_ptr<raw_pwrite_stream> OS;
std::string ObjectPathName;
virtual ~CachedFileStream() = default;
};
/// This type defines the callback to add a file that is generated on the fly.
///
/// Stream callbacks must be thread safe.
using AddStreamFn = std::function<Expected<std::unique_ptr<CachedFileStream>>(
unsigned Task, const Twine &ModuleName)>;
/// This is the type of a file cache. To request an item from the cache, pass a
/// unique string as the Key. For hits, the cached file will be added to the
/// link and this function will return AddStreamFn(). For misses, the cache will
/// return a stream callback which must be called at most once to produce
/// content for the stream. The file stream produced by the stream callback will
/// add the file to the link after the stream is written to. ModuleName is the
/// unique module identifier for the bitcode module the cache is being checked
/// for.
///
/// Clients generally look like this:
///
/// if (AddStreamFn AddStream = Cache(Task, Key, ModuleName))
/// ProduceContent(AddStream);
using FileCache = std::function<Expected<AddStreamFn>(
unsigned Task, StringRef Key, const Twine &ModuleName)>;
/// This type defines the callback to add a pre-existing file (e.g. in a cache).
///
/// Buffer callbacks must be thread safe.
using AddBufferFn = std::function<void(unsigned Task, const Twine &ModuleName,
std::unique_ptr<MemoryBuffer> MB)>;
/// Create a local file system cache which uses the given cache name, temporary
/// file prefix, cache directory and file callback. This function does not
/// immediately create the cache directory if it does not yet exist; this is
/// done lazily the first time a file is added. The cache name appears in error
/// messages for errors during caching. The temporary file prefix is used in the
/// temporary file naming scheme used when writing files atomically.
Expected<FileCache> localCache(
const Twine &CacheNameRef, const Twine &TempFilePrefixRef,
const Twine &CacheDirectoryPathRef,
AddBufferFn AddBuffer = [](size_t Task, const Twine &ModuleName,
std::unique_ptr<MemoryBuffer> MB) {});
} // namespace llvm
#endif
PK hwFZ�8�!� � Support/TimeProfiler.hnu �[��� //===- llvm/Support/TimeProfiler.h - Hierarchical Time Profiler -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This provides lightweight and dependency-free machinery to trace execution
// time around arbitrary code. Two API flavors are available.
//
// The primary API uses a RAII object to trigger tracing:
//
// \code
// {
// TimeTraceScope scope("my_event_name");
// ...my code...
// }
// \endcode
//
// If the code to be profiled does not have a natural lexical scope then
// it is also possible to start and end events with respect to an implicit
// per-thread stack of profiling entries:
//
// \code
// timeTraceProfilerBegin("my_event_name");
// ...my code...
// timeTraceProfilerEnd(); // must be called on all control flow paths
// \endcode
//
// Time profiling entries can be given an arbitrary name and, optionally,
// an arbitrary 'detail' string. The resulting trace will include 'Total'
// entries summing the time spent for each name. Thus, it's best to choose
// names to be fairly generic, and rely on the detail field to capture
// everything else of interest.
//
// To avoid lifetime issues name and detail strings are copied into the event
// entries at their time of creation. Care should be taken to make string
// construction cheap to prevent 'Heisenperf' effects. In particular, the
// 'detail' argument may be a string-returning closure:
//
// \code
// int n;
// {
// TimeTraceScope scope("my_event_name",
// [n]() { return (Twine("x=") + Twine(n)).str(); });
// ...my code...
// }
// \endcode
// The closure will not be called if tracing is disabled. Otherwise, the
// resulting string will be directly moved into the entry.
//
// The main process should begin with a timeTraceProfilerInitialize, and
// finish with timeTraceProfileWrite and timeTraceProfilerCleanup calls.
// Each new thread should begin with a timeTraceProfilerInitialize, and
// finish with a timeTraceProfilerFinishThread call.
//
// Timestamps come from std::chrono::stable_clock. Note that threads need
// not see the same time from that clock, and the resolution may not be
// the best available.
//
// Currently, there are a number of compatible viewers:
// - chrome://tracing is the original chromium trace viewer.
// - http://ui.perfetto.dev is the replacement for the above, under active
// development by Google as part of the 'Perfetto' project.
// - https://www.speedscope.app/ has also been reported as an option.
//
// Future work:
// - Support akin to LLVM_DEBUG for runtime enable/disable of named tracing
// families for non-debug builds which wish to support optional tracing.
// - Evaluate the detail closures at profile write time to avoid
// stringification costs interfering with tracing.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_TIMEPROFILER_H
#define LLVM_SUPPORT_TIMEPROFILER_H
#include "llvm/ADT/STLFunctionalExtras.h"
#include "llvm/Support/Error.h"
namespace llvm {
class raw_pwrite_stream;
struct TimeTraceProfiler;
TimeTraceProfiler *getTimeTraceProfilerInstance();
/// Initialize the time trace profiler.
/// This sets up the global \p TimeTraceProfilerInstance
/// variable to be the profiler instance.
void timeTraceProfilerInitialize(unsigned TimeTraceGranularity,
StringRef ProcName);
/// Cleanup the time trace profiler, if it was initialized.
void timeTraceProfilerCleanup();
/// Finish a time trace profiler running on a worker thread.
void timeTraceProfilerFinishThread();
/// Is the time trace profiler enabled, i.e. initialized?
inline bool timeTraceProfilerEnabled() {
return getTimeTraceProfilerInstance() != nullptr;
}
/// Write profiling data to output stream.
/// Data produced is JSON, in Chrome "Trace Event" format, see
/// https://docs.google.com/document/d/1CvAClvFfyA5R-PhYUmn5OOQtYMH4h6I0nSsKchNAySU/preview
void timeTraceProfilerWrite(raw_pwrite_stream &OS);
/// Write profiling data to a file.
/// The function will write to \p PreferredFileName if provided, if not
/// then will write to \p FallbackFileName appending .time-trace.
/// Returns a StringError indicating a failure if the function is
/// unable to open the file for writing.
Error timeTraceProfilerWrite(StringRef PreferredFileName,
StringRef FallbackFileName);
/// Manually begin a time section, with the given \p Name and \p Detail.
/// Profiler copies the string data, so the pointers can be given into
/// temporaries. Time sections can be hierarchical; every Begin must have a
/// matching End pair but they can nest.
void timeTraceProfilerBegin(StringRef Name, StringRef Detail);
void timeTraceProfilerBegin(StringRef Name,
llvm::function_ref<std::string()> Detail);
/// Manually end the last time section.
void timeTraceProfilerEnd();
/// The TimeTraceScope is a helper class to call the begin and end functions
/// of the time trace profiler. When the object is constructed, it begins
/// the section; and when it is destroyed, it stops it. If the time profiler
/// is not initialized, the overhead is a single branch.
struct TimeTraceScope {
TimeTraceScope() = delete;
TimeTraceScope(const TimeTraceScope &) = delete;
TimeTraceScope &operator=(const TimeTraceScope &) = delete;
TimeTraceScope(TimeTraceScope &&) = delete;
TimeTraceScope &operator=(TimeTraceScope &&) = delete;
TimeTraceScope(StringRef Name) {
if (getTimeTraceProfilerInstance() != nullptr)
timeTraceProfilerBegin(Name, StringRef(""));
}
TimeTraceScope(StringRef Name, StringRef Detail) {
if (getTimeTraceProfilerInstance() != nullptr)
timeTraceProfilerBegin(Name, Detail);
}
TimeTraceScope(StringRef Name, llvm::function_ref<std::string()> Detail) {
if (getTimeTraceProfilerInstance() != nullptr)
timeTraceProfilerBegin(Name, Detail);
}
~TimeTraceScope() {
if (getTimeTraceProfilerInstance() != nullptr)
timeTraceProfilerEnd();
}
};
} // end namespace llvm
#endif
PK hwFZ N� Support/BuryPointer.hnu �[��� //===- llvm/Support/BuryPointer.h - Memory Manipulation/Leak ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_BURYPOINTER_H
#define LLVM_SUPPORT_BURYPOINTER_H
#include <memory>
namespace llvm {
// In tools that will exit soon anyway, going through the process of explicitly
// deallocating resources can be unnecessary - better to leak the resources and
// let the OS clean them up when the process ends. Use this function to ensure
// the memory is not misdiagnosed as an unintentional leak by leak detection
// tools (this is achieved by preserving pointers to the object in a globally
// visible array).
void BuryPointer(const void *Ptr);
template <typename T> void BuryPointer(std::unique_ptr<T> Ptr) {
BuryPointer(Ptr.release());
}
} // namespace llvm
#endif
PK hwFZ@�5�� � Support/NativeFormatting.hnu �[��� //===- NativeFormatting.h - Low level formatting helpers ---------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_NATIVEFORMATTING_H
#define LLVM_SUPPORT_NATIVEFORMATTING_H
#include <cstdint>
#include <optional>
namespace llvm {
class raw_ostream;
enum class FloatStyle { Exponent, ExponentUpper, Fixed, Percent };
enum class IntegerStyle {
Integer,
Number,
};
enum class HexPrintStyle { Upper, Lower, PrefixUpper, PrefixLower };
size_t getDefaultPrecision(FloatStyle Style);
bool isPrefixedHexStyle(HexPrintStyle S);
void write_integer(raw_ostream &S, unsigned int N, size_t MinDigits,
IntegerStyle Style);
void write_integer(raw_ostream &S, int N, size_t MinDigits, IntegerStyle Style);
void write_integer(raw_ostream &S, unsigned long N, size_t MinDigits,
IntegerStyle Style);
void write_integer(raw_ostream &S, long N, size_t MinDigits,
IntegerStyle Style);
void write_integer(raw_ostream &S, unsigned long long N, size_t MinDigits,
IntegerStyle Style);
void write_integer(raw_ostream &S, long long N, size_t MinDigits,
IntegerStyle Style);
void write_hex(raw_ostream &S, uint64_t N, HexPrintStyle Style,
std::optional<size_t> Width = std::nullopt);
void write_double(raw_ostream &S, double D, FloatStyle Style,
std::optional<size_t> Precision = std::nullopt);
}
#endif
PK hwFZi��>{
{
Support/FileOutputBuffer.hnu �[��� //=== FileOutputBuffer.h - File Output Buffer -------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Utility for creating a in-memory buffer that will be written to a file.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_FILEOUTPUTBUFFER_H
#define LLVM_SUPPORT_FILEOUTPUTBUFFER_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/Error.h"
namespace llvm {
/// FileOutputBuffer - This interface provides simple way to create an in-memory
/// buffer which will be written to a file. During the lifetime of these
/// objects, the content or existence of the specified file is undefined. That
/// is, creating an OutputBuffer for a file may immediately remove the file.
/// If the FileOutputBuffer is committed, the target file's content will become
/// the buffer content at the time of the commit. If the FileOutputBuffer is
/// not committed, the file will be deleted in the FileOutputBuffer destructor.
class FileOutputBuffer {
public:
enum {
/// Set the 'x' bit on the resulting file.
F_executable = 1,
/// Don't use mmap and instead write an in-memory buffer to a file when this
/// buffer is closed.
F_no_mmap = 2,
};
/// Factory method to create an OutputBuffer object which manages a read/write
/// buffer of the specified size. When committed, the buffer will be written
/// to the file at the specified path.
///
/// When F_modify is specified and \p FilePath refers to an existing on-disk
/// file \p Size may be set to -1, in which case the entire file is used.
/// Otherwise, the file shrinks or grows as necessary based on the value of
/// \p Size. It is an error to specify F_modify and Size=-1 if \p FilePath
/// does not exist.
static Expected<std::unique_ptr<FileOutputBuffer>>
create(StringRef FilePath, size_t Size, unsigned Flags = 0);
/// Returns a pointer to the start of the buffer.
virtual uint8_t *getBufferStart() const = 0;
/// Returns a pointer to the end of the buffer.
virtual uint8_t *getBufferEnd() const = 0;
/// Returns size of the buffer.
virtual size_t getBufferSize() const = 0;
/// Returns path where file will show up if buffer is committed.
StringRef getPath() const { return FinalPath; }
/// Flushes the content of the buffer to its file and deallocates the
/// buffer. If commit() is not called before this object's destructor
/// is called, the file is deleted in the destructor. The optional parameter
/// is used if it turns out you want the file size to be smaller than
/// initially requested.
virtual Error commit() = 0;
/// If this object was previously committed, the destructor just deletes
/// this object. If this object was not committed, the destructor
/// deallocates the buffer and the target file is never written.
virtual ~FileOutputBuffer() = default;
/// This removes the temporary file (unless it already was committed)
/// but keeps the memory mapping alive.
virtual void discard() {}
protected:
FileOutputBuffer(StringRef Path) : FinalPath(Path) {}
std::string FinalPath;
};
} // end namespace llvm
#endif
PK hwFZ�1��X( X( Support/BinaryStreamRef.hnu �[��� //===- BinaryStreamRef.h - A copyable reference to a stream -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_BINARYSTREAMREF_H
#define LLVM_SUPPORT_BINARYSTREAMREF_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/Support/BinaryStream.h"
#include "llvm/Support/BinaryStreamError.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <memory>
#include <optional>
namespace llvm {
/// Common stuff for mutable and immutable StreamRefs.
template <class RefType, class StreamType> class BinaryStreamRefBase {
protected:
BinaryStreamRefBase() = default;
explicit BinaryStreamRefBase(StreamType &BorrowedImpl)
: BorrowedImpl(&BorrowedImpl), ViewOffset(0) {
if (!(BorrowedImpl.getFlags() & BSF_Append))
Length = BorrowedImpl.getLength();
}
BinaryStreamRefBase(std::shared_ptr<StreamType> SharedImpl, uint64_t Offset,
std::optional<uint64_t> Length)
: SharedImpl(SharedImpl), BorrowedImpl(SharedImpl.get()),
ViewOffset(Offset), Length(Length) {}
BinaryStreamRefBase(StreamType &BorrowedImpl, uint64_t Offset,
std::optional<uint64_t> Length)
: BorrowedImpl(&BorrowedImpl), ViewOffset(Offset), Length(Length) {}
BinaryStreamRefBase(const BinaryStreamRefBase &Other) = default;
BinaryStreamRefBase &operator=(const BinaryStreamRefBase &Other) = default;
BinaryStreamRefBase &operator=(BinaryStreamRefBase &&Other) = default;
BinaryStreamRefBase(BinaryStreamRefBase &&Other) = default;
public:
llvm::support::endianness getEndian() const {
return BorrowedImpl->getEndian();
}
uint64_t getLength() const {
if (Length)
return *Length;
return BorrowedImpl ? (BorrowedImpl->getLength() - ViewOffset) : 0;
}
/// Return a new BinaryStreamRef with the first \p N elements removed. If
/// this BinaryStreamRef is length-tracking, then the resulting one will be
/// too.
RefType drop_front(uint64_t N) const {
if (!BorrowedImpl)
return RefType();
N = std::min(N, getLength());
RefType Result(static_cast<const RefType &>(*this));
if (N == 0)
return Result;
Result.ViewOffset += N;
if (Result.Length)
*Result.Length -= N;
return Result;
}
/// Return a new BinaryStreamRef with the last \p N elements removed. If
/// this BinaryStreamRef is length-tracking and \p N is greater than 0, then
/// this BinaryStreamRef will no longer length-track.
RefType drop_back(uint64_t N) const {
if (!BorrowedImpl)
return RefType();
RefType Result(static_cast<const RefType &>(*this));
N = std::min(N, getLength());
if (N == 0)
return Result;
// Since we're dropping non-zero bytes from the end, stop length-tracking
// by setting the length of the resulting StreamRef to an explicit value.
if (!Result.Length)
Result.Length = getLength();
*Result.Length -= N;
return Result;
}
/// Return a new BinaryStreamRef with only the first \p N elements remaining.
RefType keep_front(uint64_t N) const {
assert(N <= getLength());
return drop_back(getLength() - N);
}
/// Return a new BinaryStreamRef with only the last \p N elements remaining.
RefType keep_back(uint64_t N) const {
assert(N <= getLength());
return drop_front(getLength() - N);
}
/// Return a new BinaryStreamRef with the first and last \p N elements
/// removed.
RefType drop_symmetric(uint64_t N) const {
return drop_front(N).drop_back(N);
}
/// Return a new BinaryStreamRef with the first \p Offset elements removed,
/// and retaining exactly \p Len elements.
RefType slice(uint64_t Offset, uint64_t Len) const {
return drop_front(Offset).keep_front(Len);
}
bool valid() const { return BorrowedImpl != nullptr; }
friend bool operator==(const RefType &LHS, const RefType &RHS) {
if (LHS.BorrowedImpl != RHS.BorrowedImpl)
return false;
if (LHS.ViewOffset != RHS.ViewOffset)
return false;
if (LHS.Length != RHS.Length)
return false;
return true;
}
protected:
Error checkOffsetForRead(uint64_t Offset, uint64_t DataSize) const {
if (Offset > getLength())
return make_error<BinaryStreamError>(stream_error_code::invalid_offset);
if (getLength() < DataSize + Offset)
return make_error<BinaryStreamError>(stream_error_code::stream_too_short);
return Error::success();
}
std::shared_ptr<StreamType> SharedImpl;
StreamType *BorrowedImpl = nullptr;
uint64_t ViewOffset = 0;
std::optional<uint64_t> Length;
};
/// BinaryStreamRef is to BinaryStream what ArrayRef is to an Array. It
/// provides copy-semantics and read only access to a "window" of the underlying
/// BinaryStream. Note that BinaryStreamRef is *not* a BinaryStream. That is to
/// say, it does not inherit and override the methods of BinaryStream. In
/// general, you should not pass around pointers or references to BinaryStreams
/// and use inheritance to achieve polymorphism. Instead, you should pass
/// around BinaryStreamRefs by value and achieve polymorphism that way.
class BinaryStreamRef
: public BinaryStreamRefBase<BinaryStreamRef, BinaryStream> {
friend BinaryStreamRefBase<BinaryStreamRef, BinaryStream>;
friend class WritableBinaryStreamRef;
BinaryStreamRef(std::shared_ptr<BinaryStream> Impl, uint64_t ViewOffset,
std::optional<uint64_t> Length)
: BinaryStreamRefBase(Impl, ViewOffset, Length) {}
public:
BinaryStreamRef() = default;
BinaryStreamRef(BinaryStream &Stream);
BinaryStreamRef(BinaryStream &Stream, uint64_t Offset,
std::optional<uint64_t> Length);
explicit BinaryStreamRef(ArrayRef<uint8_t> Data,
llvm::support::endianness Endian);
explicit BinaryStreamRef(StringRef Data, llvm::support::endianness Endian);
BinaryStreamRef(const BinaryStreamRef &Other) = default;
BinaryStreamRef &operator=(const BinaryStreamRef &Other) = default;
BinaryStreamRef(BinaryStreamRef &&Other) = default;
BinaryStreamRef &operator=(BinaryStreamRef &&Other) = default;
// Use BinaryStreamRef.slice() instead.
BinaryStreamRef(BinaryStreamRef &S, uint64_t Offset,
uint64_t Length) = delete;
/// Given an Offset into this StreamRef and a Size, return a reference to a
/// buffer owned by the stream.
///
/// \returns a success error code if the entire range of data is within the
/// bounds of this BinaryStreamRef's view and the implementation could read
/// the data, and an appropriate error code otherwise.
Error readBytes(uint64_t Offset, uint64_t Size,
ArrayRef<uint8_t> &Buffer) const;
/// Given an Offset into this BinaryStreamRef, return a reference to the
/// largest buffer the stream could support without necessitating a copy.
///
/// \returns a success error code if implementation could read the data,
/// and an appropriate error code otherwise.
Error readLongestContiguousChunk(uint64_t Offset,
ArrayRef<uint8_t> &Buffer) const;
};
struct BinarySubstreamRef {
uint64_t Offset = 0; // Offset in the parent stream
BinaryStreamRef StreamData; // Stream Data
BinarySubstreamRef slice(uint64_t Off, uint64_t Size) const {
BinaryStreamRef SubSub = StreamData.slice(Off, Size);
return {Off + Offset, SubSub};
}
BinarySubstreamRef drop_front(uint64_t N) const {
return slice(N, size() - N);
}
BinarySubstreamRef keep_front(uint64_t N) const { return slice(0, N); }
std::pair<BinarySubstreamRef, BinarySubstreamRef> split(uint64_t Off) const {
return std::make_pair(keep_front(Off), drop_front(Off));
}
uint64_t size() const { return StreamData.getLength(); }
bool empty() const { return size() == 0; }
};
class WritableBinaryStreamRef
: public BinaryStreamRefBase<WritableBinaryStreamRef,
WritableBinaryStream> {
friend BinaryStreamRefBase<WritableBinaryStreamRef, WritableBinaryStream>;
WritableBinaryStreamRef(std::shared_ptr<WritableBinaryStream> Impl,
uint64_t ViewOffset, std::optional<uint64_t> Length)
: BinaryStreamRefBase(Impl, ViewOffset, Length) {}
Error checkOffsetForWrite(uint64_t Offset, uint64_t DataSize) const {
if (!(BorrowedImpl->getFlags() & BSF_Append))
return checkOffsetForRead(Offset, DataSize);
if (Offset > getLength())
return make_error<BinaryStreamError>(stream_error_code::invalid_offset);
return Error::success();
}
public:
WritableBinaryStreamRef() = default;
WritableBinaryStreamRef(WritableBinaryStream &Stream);
WritableBinaryStreamRef(WritableBinaryStream &Stream, uint64_t Offset,
std::optional<uint64_t> Length);
explicit WritableBinaryStreamRef(MutableArrayRef<uint8_t> Data,
llvm::support::endianness Endian);
WritableBinaryStreamRef(const WritableBinaryStreamRef &Other) = default;
WritableBinaryStreamRef &
operator=(const WritableBinaryStreamRef &Other) = default;
WritableBinaryStreamRef(WritableBinaryStreamRef &&Other) = default;
WritableBinaryStreamRef &operator=(WritableBinaryStreamRef &&Other) = default;
// Use WritableBinaryStreamRef.slice() instead.
WritableBinaryStreamRef(WritableBinaryStreamRef &S, uint64_t Offset,
uint64_t Length) = delete;
/// Given an Offset into this WritableBinaryStreamRef and some input data,
/// writes the data to the underlying stream.
///
/// \returns a success error code if the data could fit within the underlying
/// stream at the specified location and the implementation could write the
/// data, and an appropriate error code otherwise.
Error writeBytes(uint64_t Offset, ArrayRef<uint8_t> Data) const;
/// Conver this WritableBinaryStreamRef to a read-only BinaryStreamRef.
operator BinaryStreamRef() const;
/// For buffered streams, commits changes to the backing store.
Error commit();
};
} // end namespace llvm
#endif // LLVM_SUPPORT_BINARYSTREAMREF_H
PK hwFZ�|�{�< �< Support/FormatProviders.hnu �[��� //===- FormatProviders.h - Formatters for common LLVM types -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements format providers for many common LLVM types, for example
// allowing precision and width specifiers for scalar and string types.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_FORMATPROVIDERS_H
#define LLVM_SUPPORT_FORMATPROVIDERS_H
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/ADT/Twine.h"
#include "llvm/Support/FormatVariadicDetails.h"
#include "llvm/Support/NativeFormatting.h"
#include <array>
#include <optional>
#include <type_traits>
namespace llvm {
namespace detail {
template <typename T>
struct use_integral_formatter
: public std::integral_constant<
bool, is_one_of<T, uint8_t, int16_t, uint16_t, int32_t, uint32_t,
int64_t, uint64_t, int, unsigned, long, unsigned long,
long long, unsigned long long>::value> {};
template <typename T>
struct use_char_formatter
: public std::integral_constant<bool, std::is_same_v<T, char>> {};
template <typename T>
struct is_cstring
: public std::integral_constant<bool,
is_one_of<T, char *, const char *>::value> {
};
template <typename T>
struct use_string_formatter
: public std::integral_constant<bool,
std::is_convertible_v<T, llvm::StringRef>> {
};
template <typename T>
struct use_pointer_formatter
: public std::integral_constant<bool, std::is_pointer_v<T> &&
!is_cstring<T>::value> {};
template <typename T>
struct use_double_formatter
: public std::integral_constant<bool, std::is_floating_point_v<T>> {};
class HelperFunctions {
protected:
static std::optional<size_t> parseNumericPrecision(StringRef Str) {
size_t Prec;
std::optional<size_t> Result;
if (Str.empty())
Result = std::nullopt;
else if (Str.getAsInteger(10, Prec)) {
assert(false && "Invalid precision specifier");
Result = std::nullopt;
} else {
assert(Prec < 100 && "Precision out of range");
Result = std::min<size_t>(99u, Prec);
}
return Result;
}
static bool consumeHexStyle(StringRef &Str, HexPrintStyle &Style) {
if (!Str.starts_with_insensitive("x"))
return false;
if (Str.consume_front("x-"))
Style = HexPrintStyle::Lower;
else if (Str.consume_front("X-"))
Style = HexPrintStyle::Upper;
else if (Str.consume_front("x+") || Str.consume_front("x"))
Style = HexPrintStyle::PrefixLower;
else if (Str.consume_front("X+") || Str.consume_front("X"))
Style = HexPrintStyle::PrefixUpper;
return true;
}
static size_t consumeNumHexDigits(StringRef &Str, HexPrintStyle Style,
size_t Default) {
Str.consumeInteger(10, Default);
if (isPrefixedHexStyle(Style))
Default += 2;
return Default;
}
};
}
/// Implementation of format_provider<T> for integral arithmetic types.
///
/// The options string of an integral type has the grammar:
///
/// integer_options :: [style][digits]
/// style :: <see table below>
/// digits :: <non-negative integer> 0-99
///
/// ==========================================================================
/// | style | Meaning | Example | Digits Meaning |
/// --------------------------------------------------------------------------
/// | | | Input | Output | |
/// ==========================================================================
/// | x- | Hex no prefix, lower | 42 | 2a | Minimum # digits |
/// | X- | Hex no prefix, upper | 42 | 2A | Minimum # digits |
/// | x+ / x | Hex + prefix, lower | 42 | 0x2a | Minimum # digits |
/// | X+ / X | Hex + prefix, upper | 42 | 0x2A | Minimum # digits |
/// | N / n | Digit grouped number | 123456 | 123,456 | Ignored |
/// | D / d | Integer | 100000 | 100000 | Ignored |
/// | (empty) | Same as D / d | | | |
/// ==========================================================================
///
template <typename T>
struct format_provider<
T, std::enable_if_t<detail::use_integral_formatter<T>::value>>
: public detail::HelperFunctions {
private:
public:
static void format(const T &V, llvm::raw_ostream &Stream, StringRef Style) {
HexPrintStyle HS;
size_t Digits = 0;
if (consumeHexStyle(Style, HS)) {
Digits = consumeNumHexDigits(Style, HS, 0);
write_hex(Stream, V, HS, Digits);
return;
}
IntegerStyle IS = IntegerStyle::Integer;
if (Style.consume_front("N") || Style.consume_front("n"))
IS = IntegerStyle::Number;
else if (Style.consume_front("D") || Style.consume_front("d"))
IS = IntegerStyle::Integer;
Style.consumeInteger(10, Digits);
assert(Style.empty() && "Invalid integral format style!");
write_integer(Stream, V, Digits, IS);
}
};
/// Implementation of format_provider<T> for integral pointer types.
///
/// The options string of a pointer type has the grammar:
///
/// pointer_options :: [style][precision]
/// style :: <see table below>
/// digits :: <non-negative integer> 0-sizeof(void*)
///
/// ==========================================================================
/// | S | Meaning | Example |
/// --------------------------------------------------------------------------
/// | | | Input | Output |
/// ==========================================================================
/// | x- | Hex no prefix, lower | 0xDEADBEEF | deadbeef |
/// | X- | Hex no prefix, upper | 0xDEADBEEF | DEADBEEF |
/// | x+ / x | Hex + prefix, lower | 0xDEADBEEF | 0xdeadbeef |
/// | X+ / X | Hex + prefix, upper | 0xDEADBEEF | 0xDEADBEEF |
/// | (empty) | Same as X+ / X | | |
/// ==========================================================================
///
/// The default precision is the number of nibbles in a machine word, and in all
/// cases indicates the minimum number of nibbles to print.
template <typename T>
struct format_provider<
T, std::enable_if_t<detail::use_pointer_formatter<T>::value>>
: public detail::HelperFunctions {
private:
public:
static void format(const T &V, llvm::raw_ostream &Stream, StringRef Style) {
HexPrintStyle HS = HexPrintStyle::PrefixUpper;
consumeHexStyle(Style, HS);
size_t Digits = consumeNumHexDigits(Style, HS, sizeof(void *) * 2);
write_hex(Stream, reinterpret_cast<std::uintptr_t>(V), HS, Digits);
}
};
/// Implementation of format_provider<T> for c-style strings and string
/// objects such as std::string and llvm::StringRef.
///
/// The options string of a string type has the grammar:
///
/// string_options :: [length]
///
/// where `length` is an optional integer specifying the maximum number of
/// characters in the string to print. If `length` is omitted, the string is
/// printed up to the null terminator.
template <typename T>
struct format_provider<
T, std::enable_if_t<detail::use_string_formatter<T>::value>> {
static void format(const T &V, llvm::raw_ostream &Stream, StringRef Style) {
size_t N = StringRef::npos;
if (!Style.empty() && Style.getAsInteger(10, N)) {
assert(false && "Style is not a valid integer");
}
llvm::StringRef S = V;
Stream << S.substr(0, N);
}
};
/// Implementation of format_provider<T> for llvm::Twine.
///
/// This follows the same rules as the string formatter.
template <> struct format_provider<Twine> {
static void format(const Twine &V, llvm::raw_ostream &Stream,
StringRef Style) {
format_provider<std::string>::format(V.str(), Stream, Style);
}
};
/// Implementation of format_provider<T> for characters.
///
/// The options string of a character type has the grammar:
///
/// char_options :: (empty) | [integer_options]
///
/// If `char_options` is empty, the character is displayed as an ASCII
/// character. Otherwise, it is treated as an integer options string.
///
template <typename T>
struct format_provider<T,
std::enable_if_t<detail::use_char_formatter<T>::value>> {
static void format(const char &V, llvm::raw_ostream &Stream,
StringRef Style) {
if (Style.empty())
Stream << V;
else {
int X = static_cast<int>(V);
format_provider<int>::format(X, Stream, Style);
}
}
};
/// Implementation of format_provider<T> for type `bool`
///
/// The options string of a boolean type has the grammar:
///
/// bool_options :: "" | "Y" | "y" | "D" | "d" | "T" | "t"
///
/// ==================================
/// | C | Meaning |
/// ==================================
/// | Y | YES / NO |
/// | y | yes / no |
/// | D / d | Integer 0 or 1 |
/// | T | TRUE / FALSE |
/// | t | true / false |
/// | (empty) | Equivalent to 't' |
/// ==================================
template <> struct format_provider<bool> {
static void format(const bool &B, llvm::raw_ostream &Stream,
StringRef Style) {
Stream << StringSwitch<const char *>(Style)
.Case("Y", B ? "YES" : "NO")
.Case("y", B ? "yes" : "no")
.CaseLower("D", B ? "1" : "0")
.Case("T", B ? "TRUE" : "FALSE")
.Cases("t", "", B ? "true" : "false")
.Default(B ? "1" : "0");
}
};
/// Implementation of format_provider<T> for floating point types.
///
/// The options string of a floating point type has the format:
///
/// float_options :: [style][precision]
/// style :: <see table below>
/// precision :: <non-negative integer> 0-99
///
/// =====================================================
/// | style | Meaning | Example |
/// -----------------------------------------------------
/// | | | Input | Output |
/// =====================================================
/// | P / p | Percentage | 0.05 | 5.00% |
/// | F / f | Fixed point | 1.0 | 1.00 |
/// | E | Exponential with E | 100000 | 1.0E+05 |
/// | e | Exponential with e | 100000 | 1.0e+05 |
/// | (empty) | Same as F / f | | |
/// =====================================================
///
/// The default precision is 6 for exponential (E / e) and 2 for everything
/// else.
template <typename T>
struct format_provider<T,
std::enable_if_t<detail::use_double_formatter<T>::value>>
: public detail::HelperFunctions {
static void format(const T &V, llvm::raw_ostream &Stream, StringRef Style) {
FloatStyle S;
if (Style.consume_front("P") || Style.consume_front("p"))
S = FloatStyle::Percent;
else if (Style.consume_front("F") || Style.consume_front("f"))
S = FloatStyle::Fixed;
else if (Style.consume_front("E"))
S = FloatStyle::ExponentUpper;
else if (Style.consume_front("e"))
S = FloatStyle::Exponent;
else
S = FloatStyle::Fixed;
std::optional<size_t> Precision = parseNumericPrecision(Style);
if (!Precision)
Precision = getDefaultPrecision(S);
write_double(Stream, static_cast<double>(V), S, Precision);
}
};
namespace detail {
template <typename IterT>
using IterValue = typename std::iterator_traits<IterT>::value_type;
template <typename IterT>
struct range_item_has_provider
: public std::integral_constant<
bool, !uses_missing_provider<IterValue<IterT>>::value> {};
}
/// Implementation of format_provider<T> for ranges.
///
/// This will print an arbitrary range as a delimited sequence of items.
///
/// The options string of a range type has the grammar:
///
/// range_style ::= [separator] [element_style]
/// separator ::= "$" delimeted_expr
/// element_style ::= "@" delimeted_expr
/// delimeted_expr ::= "[" expr "]" | "(" expr ")" | "<" expr ">"
/// expr ::= <any string not containing delimeter>
///
/// where the separator expression is the string to insert between consecutive
/// items in the range and the argument expression is the Style specification to
/// be used when formatting the underlying type. The default separator if
/// unspecified is ' ' (space). The syntax of the argument expression follows
/// whatever grammar is dictated by the format provider or format adapter used
/// to format the value type.
///
/// Note that attempting to format an `iterator_range<T>` where no format
/// provider can be found for T will result in a compile error.
///
template <typename IterT> class format_provider<llvm::iterator_range<IterT>> {
using value = typename std::iterator_traits<IterT>::value_type;
static StringRef consumeOneOption(StringRef &Style, char Indicator,
StringRef Default) {
if (Style.empty())
return Default;
if (Style.front() != Indicator)
return Default;
Style = Style.drop_front();
if (Style.empty()) {
assert(false && "Invalid range style");
return Default;
}
for (const char *D : std::array<const char *, 3>{"[]", "<>", "()"}) {
if (Style.front() != D[0])
continue;
size_t End = Style.find_first_of(D[1]);
if (End == StringRef::npos) {
assert(false && "Missing range option end delimeter!");
return Default;
}
StringRef Result = Style.slice(1, End);
Style = Style.drop_front(End + 1);
return Result;
}
assert(false && "Invalid range style!");
return Default;
}
static std::pair<StringRef, StringRef> parseOptions(StringRef Style) {
StringRef Sep = consumeOneOption(Style, '$', ", ");
StringRef Args = consumeOneOption(Style, '@', "");
assert(Style.empty() && "Unexpected text in range option string!");
return std::make_pair(Sep, Args);
}
public:
static_assert(detail::range_item_has_provider<IterT>::value,
"Range value_type does not have a format provider!");
static void format(const llvm::iterator_range<IterT> &V,
llvm::raw_ostream &Stream, StringRef Style) {
StringRef Sep;
StringRef ArgStyle;
std::tie(Sep, ArgStyle) = parseOptions(Style);
auto Begin = V.begin();
auto End = V.end();
if (Begin != End) {
auto Adapter = detail::build_format_adapter(*Begin);
Adapter.format(Stream, ArgStyle);
++Begin;
}
while (Begin != End) {
Stream << Sep;
auto Adapter = detail::build_format_adapter(*Begin);
Adapter.format(Stream, ArgStyle);
++Begin;
}
}
};
}
#endif
PK hwFZ�D��f f
Support/BCD.hnu �[��� //===- llvm/Support/BCD.h - Binary-Coded Decimal utility functions -*- C++ -*-//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares some utility functions for encoding/decoding BCD values.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_BCD_H
#define LLVM_SUPPORT_BCD_H
#include <assert.h>
#include <cstddef>
#include <cstdint>
namespace llvm {
// Decode a packed BCD value.
// Maximum value of int64_t is 9,223,372,036,854,775,807. These are 18 usable
// decimal digits. Thus BCD numbers of up to 9 bytes can be converted.
// Please note that s390 supports BCD numbers up to a length of 16 bytes.
inline int64_t decodePackedBCD(const uint8_t *Ptr, size_t ByteLen,
bool IsSigned = true) {
assert(ByteLen >= 1 && ByteLen <= 9 && "Invalid BCD number");
int64_t Value = 0;
size_t RunLen = ByteLen - static_cast<unsigned>(IsSigned);
for (size_t I = 0; I < RunLen; ++I) {
uint8_t DecodedByteValue = ((Ptr[I] >> 4) & 0x0f) * 10 + (Ptr[I] & 0x0f);
Value = (Value * 100) + DecodedByteValue;
}
if (IsSigned) {
uint8_t DecodedByteValue = (Ptr[ByteLen - 1] >> 4) & 0x0f;
uint8_t Sign = Ptr[ByteLen - 1] & 0x0f;
Value = (Value * 10) + DecodedByteValue;
if (Sign == 0x0d || Sign == 0x0b)
Value *= -1;
}
return Value;
}
template <typename ResultT, typename ValT>
inline ResultT decodePackedBCD(const ValT Val, bool IsSigned = true) {
return static_cast<ResultT>(decodePackedBCD(
reinterpret_cast<const uint8_t *>(&Val), sizeof(ValT), IsSigned));
}
} // namespace llvm
#endif // LLVM_SUPPORT_BCD_H
PK hwFZb�
K� � Support/Win64EH.hnu �[��� //===-- llvm/Support/Win64EH.h ---Win64 EH Constants-------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains constants and structures used for implementing
// exception handling on Win64 platforms. For more information, see
// http://msdn.microsoft.com/en-us/library/1eyas8tf.aspx
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_WIN64EH_H
#define LLVM_SUPPORT_WIN64EH_H
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/Endian.h"
namespace llvm {
namespace Win64EH {
/// UnwindOpcodes - Enumeration whose values specify a single operation in
/// the prolog of a function.
enum UnwindOpcodes {
// The following set of unwind opcodes is for x86_64. They are documented at
// https://docs.microsoft.com/en-us/cpp/build/exception-handling-x64.
// Some generic values from this set are used for other architectures too.
UOP_PushNonVol = 0,
UOP_AllocLarge,
UOP_AllocSmall,
UOP_SetFPReg,
UOP_SaveNonVol,
UOP_SaveNonVolBig,
UOP_Epilog,
UOP_SpareCode,
UOP_SaveXMM128,
UOP_SaveXMM128Big,
UOP_PushMachFrame,
// The following set of unwind opcodes is for ARM64. They are documented at
// https://docs.microsoft.com/en-us/cpp/build/arm64-exception-handling
UOP_AllocMedium,
UOP_SaveR19R20X,
UOP_SaveFPLRX,
UOP_SaveFPLR,
UOP_SaveReg,
UOP_SaveRegX,
UOP_SaveRegP,
UOP_SaveRegPX,
UOP_SaveLRPair,
UOP_SaveFReg,
UOP_SaveFRegX,
UOP_SaveFRegP,
UOP_SaveFRegPX,
UOP_SetFP,
UOP_AddFP,
UOP_Nop,
UOP_End,
UOP_SaveNext,
UOP_TrapFrame,
UOP_Context,
UOP_ClearUnwoundToCall,
UOP_PACSignLR,
UOP_SaveAnyRegI,
UOP_SaveAnyRegIP,
UOP_SaveAnyRegD,
UOP_SaveAnyRegDP,
UOP_SaveAnyRegQ,
UOP_SaveAnyRegQP,
UOP_SaveAnyRegIX,
UOP_SaveAnyRegIPX,
UOP_SaveAnyRegDX,
UOP_SaveAnyRegDPX,
UOP_SaveAnyRegQX,
UOP_SaveAnyRegQPX,
// The following set of unwind opcodes is for ARM. They are documented at
// https://docs.microsoft.com/en-us/cpp/build/arm-exception-handling
// Stack allocations use UOP_AllocSmall, UOP_AllocLarge from above, plus
// the following. AllocSmall, AllocLarge and AllocHuge represent a 16 bit
// instruction, while the WideAlloc* opcodes represent a 32 bit instruction.
// Small can represent a stack offset of 0x7f*4 (252) bytes, Medium can
// represent up to 0x3ff*4 (4092) bytes, Large up to 0xffff*4 (262140) bytes,
// and Huge up to 0xffffff*4 (67108860) bytes.
UOP_AllocHuge,
UOP_WideAllocMedium,
UOP_WideAllocLarge,
UOP_WideAllocHuge,
UOP_WideSaveRegMask,
UOP_SaveSP,
UOP_SaveRegsR4R7LR,
UOP_WideSaveRegsR4R11LR,
UOP_SaveFRegD8D15,
UOP_SaveRegMask,
UOP_SaveLR,
UOP_SaveFRegD0D15,
UOP_SaveFRegD16D31,
// Using UOP_Nop from above
UOP_WideNop,
// Using UOP_End from above
UOP_EndNop,
UOP_WideEndNop,
// A custom unspecified opcode, consisting of one or more bytes. This
// allows producing opcodes in the implementation defined/reserved range.
UOP_Custom,
};
/// UnwindCode - This union describes a single operation in a function prolog,
/// or part thereof.
union UnwindCode {
struct {
uint8_t CodeOffset;
uint8_t UnwindOpAndOpInfo;
} u;
support::ulittle16_t FrameOffset;
uint8_t getUnwindOp() const {
return u.UnwindOpAndOpInfo & 0x0F;
}
uint8_t getOpInfo() const {
return (u.UnwindOpAndOpInfo >> 4) & 0x0F;
}
};
enum {
/// UNW_ExceptionHandler - Specifies that this function has an exception
/// handler.
UNW_ExceptionHandler = 0x01,
/// UNW_TerminateHandler - Specifies that this function has a termination
/// handler.
UNW_TerminateHandler = 0x02,
/// UNW_ChainInfo - Specifies that this UnwindInfo structure is chained to
/// another one.
UNW_ChainInfo = 0x04
};
/// RuntimeFunction - An entry in the table of functions with unwind info.
struct RuntimeFunction {
support::ulittle32_t StartAddress;
support::ulittle32_t EndAddress;
support::ulittle32_t UnwindInfoOffset;
};
/// UnwindInfo - An entry in the exception table.
struct UnwindInfo {
uint8_t VersionAndFlags;
uint8_t PrologSize;
uint8_t NumCodes;
uint8_t FrameRegisterAndOffset;
UnwindCode UnwindCodes[1];
uint8_t getVersion() const {
return VersionAndFlags & 0x07;
}
uint8_t getFlags() const {
return (VersionAndFlags >> 3) & 0x1f;
}
uint8_t getFrameRegister() const {
return FrameRegisterAndOffset & 0x0f;
}
uint8_t getFrameOffset() const {
return (FrameRegisterAndOffset >> 4) & 0x0f;
}
// The data after unwindCodes depends on flags.
// If UNW_ExceptionHandler or UNW_TerminateHandler is set then follows
// the address of the language-specific exception handler.
// If UNW_ChainInfo is set then follows a RuntimeFunction which defines
// the chained unwind info.
// For more information please see MSDN at:
// http://msdn.microsoft.com/en-us/library/ddssxxy8.aspx
/// Return pointer to language specific data part of UnwindInfo.
void *getLanguageSpecificData() {
return reinterpret_cast<void *>(&UnwindCodes[(NumCodes+1) & ~1]);
}
/// Return pointer to language specific data part of UnwindInfo.
const void *getLanguageSpecificData() const {
return reinterpret_cast<const void *>(&UnwindCodes[(NumCodes + 1) & ~1]);
}
/// Return image-relative offset of language-specific exception handler.
uint32_t getLanguageSpecificHandlerOffset() const {
return *reinterpret_cast<const support::ulittle32_t *>(
getLanguageSpecificData());
}
/// Set image-relative offset of language-specific exception handler.
void setLanguageSpecificHandlerOffset(uint32_t offset) {
*reinterpret_cast<support::ulittle32_t *>(getLanguageSpecificData()) =
offset;
}
/// Return pointer to exception-specific data.
void *getExceptionData() {
return reinterpret_cast<void *>(reinterpret_cast<uint32_t *>(
getLanguageSpecificData())+1);
}
/// Return pointer to chained unwind info.
RuntimeFunction *getChainedFunctionEntry() {
return reinterpret_cast<RuntimeFunction *>(getLanguageSpecificData());
}
/// Return pointer to chained unwind info.
const RuntimeFunction *getChainedFunctionEntry() const {
return reinterpret_cast<const RuntimeFunction *>(getLanguageSpecificData());
}
};
} // End of namespace Win64EH
} // End of namespace llvm
#endif
PK hwFZ���� � Support/TargetSelect.hnu �[��� //===- TargetSelect.h - Target Selection & Registration ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides utilities to make sure that certain classes of targets are
// linked into the main application executable, and initialize them as
// appropriate.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_TARGETSELECT_H
#define LLVM_SUPPORT_TARGETSELECT_H
#include "llvm/Config/llvm-config.h"
extern "C" {
// Declare all of the target-initialization functions that are available.
#define LLVM_TARGET(TargetName) void LLVMInitialize##TargetName##TargetInfo();
#include "llvm/Config/Targets.def"
#define LLVM_TARGET(TargetName) void LLVMInitialize##TargetName##Target();
#include "llvm/Config/Targets.def"
// Declare all of the target-MC-initialization functions that are available.
#define LLVM_TARGET(TargetName) void LLVMInitialize##TargetName##TargetMC();
#include "llvm/Config/Targets.def"
// Declare all of the available assembly printer initialization functions.
#define LLVM_ASM_PRINTER(TargetName) void LLVMInitialize##TargetName##AsmPrinter();
#include "llvm/Config/AsmPrinters.def"
// Declare all of the available assembly parser initialization functions.
#define LLVM_ASM_PARSER(TargetName) void LLVMInitialize##TargetName##AsmParser();
#include "llvm/Config/AsmParsers.def"
// Declare all of the available disassembler initialization functions.
#define LLVM_DISASSEMBLER(TargetName) \
void LLVMInitialize##TargetName##Disassembler();
#include "llvm/Config/Disassemblers.def"
// Declare all of the available TargetMCA initialization functions.
#define LLVM_TARGETMCA(TargetName) void LLVMInitialize##TargetName##TargetMCA();
#include "llvm/Config/TargetMCAs.def"
}
namespace llvm {
/// InitializeAllTargetInfos - The main program should call this function if
/// it wants access to all available targets that LLVM is configured to
/// support, to make them available via the TargetRegistry.
///
/// It is legal for a client to make multiple calls to this function.
inline void InitializeAllTargetInfos() {
#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetInfo();
#include "llvm/Config/Targets.def"
}
/// InitializeAllTargets - The main program should call this function if it
/// wants access to all available target machines that LLVM is configured to
/// support, to make them available via the TargetRegistry.
///
/// It is legal for a client to make multiple calls to this function.
inline void InitializeAllTargets() {
// FIXME: Remove this, clients should do it.
InitializeAllTargetInfos();
#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##Target();
#include "llvm/Config/Targets.def"
}
/// InitializeAllTargetMCs - The main program should call this function if it
/// wants access to all available target MC that LLVM is configured to
/// support, to make them available via the TargetRegistry.
///
/// It is legal for a client to make multiple calls to this function.
inline void InitializeAllTargetMCs() {
#define LLVM_TARGET(TargetName) LLVMInitialize##TargetName##TargetMC();
#include "llvm/Config/Targets.def"
}
/// InitializeAllAsmPrinters - The main program should call this function if
/// it wants all asm printers that LLVM is configured to support, to make them
/// available via the TargetRegistry.
///
/// It is legal for a client to make multiple calls to this function.
inline void InitializeAllAsmPrinters() {
#define LLVM_ASM_PRINTER(TargetName) LLVMInitialize##TargetName##AsmPrinter();
#include "llvm/Config/AsmPrinters.def"
}
/// InitializeAllAsmParsers - The main program should call this function if it
/// wants all asm parsers that LLVM is configured to support, to make them
/// available via the TargetRegistry.
///
/// It is legal for a client to make multiple calls to this function.
inline void InitializeAllAsmParsers() {
#define LLVM_ASM_PARSER(TargetName) LLVMInitialize##TargetName##AsmParser();
#include "llvm/Config/AsmParsers.def"
}
/// InitializeAllDisassemblers - The main program should call this function if
/// it wants all disassemblers that LLVM is configured to support, to make
/// them available via the TargetRegistry.
///
/// It is legal for a client to make multiple calls to this function.
inline void InitializeAllDisassemblers() {
#define LLVM_DISASSEMBLER(TargetName) LLVMInitialize##TargetName##Disassembler();
#include "llvm/Config/Disassemblers.def"
}
/// InitializeNativeTarget - The main program should call this function to
/// initialize the native target corresponding to the host. This is useful
/// for JIT applications to ensure that the target gets linked in correctly.
///
/// It is legal for a client to make multiple calls to this function.
inline bool InitializeNativeTarget() {
// If we have a native target, initialize it to ensure it is linked in.
#ifdef LLVM_NATIVE_TARGET
LLVM_NATIVE_TARGETINFO();
LLVM_NATIVE_TARGET();
LLVM_NATIVE_TARGETMC();
return false;
#else
return true;
#endif
}
/// InitializeNativeTargetAsmPrinter - The main program should call
/// this function to initialize the native target asm printer.
inline bool InitializeNativeTargetAsmPrinter() {
// If we have a native target, initialize the corresponding asm printer.
#ifdef LLVM_NATIVE_ASMPRINTER
LLVM_NATIVE_ASMPRINTER();
return false;
#else
return true;
#endif
}
/// InitializeNativeTargetAsmParser - The main program should call
/// this function to initialize the native target asm parser.
inline bool InitializeNativeTargetAsmParser() {
// If we have a native target, initialize the corresponding asm parser.
#ifdef LLVM_NATIVE_ASMPARSER
LLVM_NATIVE_ASMPARSER();
return false;
#else
return true;
#endif
}
/// InitializeNativeTargetDisassembler - The main program should call
/// this function to initialize the native target disassembler.
inline bool InitializeNativeTargetDisassembler() {
// If we have a native target, initialize the corresponding disassembler.
#ifdef LLVM_NATIVE_DISASSEMBLER
LLVM_NATIVE_DISASSEMBLER();
return false;
#else
return true;
#endif
}
/// InitializeAllTargetMCAs - The main program should call
/// this function to initialize the target CustomBehaviour and
/// InstrPostProcess classes.
inline void InitializeAllTargetMCAs() {
#define LLVM_TARGETMCA(TargetName) LLVMInitialize##TargetName##TargetMCA();
#include "llvm/Config/TargetMCAs.def"
}
}
#endif
PK hwFZ���l l Support/SuffixTree.hnu �[��� //===- llvm/ADT/SuffixTree.h - Tree for substrings --------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// A data structure for fast substring queries.
//
// Suffix trees represent the suffixes of their input strings in their leaves.
// A suffix tree is a type of compressed trie structure where each node
// represents an entire substring rather than a single character. Each leaf
// of the tree is a suffix.
//
// A suffix tree can be seen as a type of state machine where each state is a
// substring of the full string. The tree is structured so that, for a string
// of length N, there are exactly N leaves in the tree. This structure allows
// us to quickly find repeated substrings of the input string.
//
// In this implementation, a "string" is a vector of unsigned integers.
// These integers may result from hashing some data type. A suffix tree can
// contain 1 or many strings, which can then be queried as one large string.
//
// The suffix tree is implemented using Ukkonen's algorithm for linear-time
// suffix tree construction. Ukkonen's algorithm is explained in more detail
// in the paper by Esko Ukkonen "On-line construction of suffix trees. The
// paper is available at
//
// https://www.cs.helsinki.fi/u/ukkonen/SuffixT1withFigs.pdf
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_SUFFIXTREE_H
#define LLVM_SUPPORT_SUFFIXTREE_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/SuffixTreeNode.h"
namespace llvm {
class SuffixTree {
public:
/// Each element is an integer representing an instruction in the module.
ArrayRef<unsigned> Str;
/// A repeated substring in the tree.
struct RepeatedSubstring {
/// The length of the string.
unsigned Length;
/// The start indices of each occurrence.
SmallVector<unsigned> StartIndices;
};
private:
/// Maintains internal nodes in the tree.
SpecificBumpPtrAllocator<SuffixTreeInternalNode> InternalNodeAllocator;
/// Maintains leaf nodes in the tree.
SpecificBumpPtrAllocator<SuffixTreeLeafNode> LeafNodeAllocator;
/// The root of the suffix tree.
///
/// The root represents the empty string. It is maintained by the
/// \p NodeAllocator like every other node in the tree.
SuffixTreeInternalNode *Root = nullptr;
/// The end index of each leaf in the tree.
unsigned LeafEndIdx = SuffixTreeNode::EmptyIdx;
/// Helper struct which keeps track of the next insertion point in
/// Ukkonen's algorithm.
struct ActiveState {
/// The next node to insert at.
SuffixTreeInternalNode *Node = nullptr;
/// The index of the first character in the substring currently being added.
unsigned Idx = SuffixTreeNode::EmptyIdx;
/// The length of the substring we have to add at the current step.
unsigned Len = 0;
};
/// The point the next insertion will take place at in the
/// construction algorithm.
ActiveState Active;
/// Allocate a leaf node and add it to the tree.
///
/// \param Parent The parent of this node.
/// \param StartIdx The start index of this node's associated string.
/// \param Edge The label on the edge leaving \p Parent to this node.
///
/// \returns A pointer to the allocated leaf node.
SuffixTreeNode *insertLeaf(SuffixTreeInternalNode &Parent, unsigned StartIdx,
unsigned Edge);
/// Allocate an internal node and add it to the tree.
///
/// \param Parent The parent of this node. Only null when allocating the root.
/// \param StartIdx The start index of this node's associated string.
/// \param EndIdx The end index of this node's associated string.
/// \param Edge The label on the edge leaving \p Parent to this node.
///
/// \returns A pointer to the allocated internal node.
SuffixTreeInternalNode *insertInternalNode(SuffixTreeInternalNode *Parent,
unsigned StartIdx, unsigned EndIdx,
unsigned Edge);
/// Allocate the root node and add it to the tree.
///
/// \returns A pointer to the root.
SuffixTreeInternalNode *insertRoot();
/// Set the suffix indices of the leaves to the start indices of their
/// respective suffixes.
void setSuffixIndices();
/// Construct the suffix tree for the prefix of the input ending at
/// \p EndIdx.
///
/// Used to construct the full suffix tree iteratively. At the end of each
/// step, the constructed suffix tree is either a valid suffix tree, or a
/// suffix tree with implicit suffixes. At the end of the final step, the
/// suffix tree is a valid tree.
///
/// \param EndIdx The end index of the current prefix in the main string.
/// \param SuffixesToAdd The number of suffixes that must be added
/// to complete the suffix tree at the current phase.
///
/// \returns The number of suffixes that have not been added at the end of
/// this step.
unsigned extend(unsigned EndIdx, unsigned SuffixesToAdd);
public:
/// Construct a suffix tree from a sequence of unsigned integers.
///
/// \param Str The string to construct the suffix tree for.
SuffixTree(const ArrayRef<unsigned> &Str);
/// Iterator for finding all repeated substrings in the suffix tree.
struct RepeatedSubstringIterator {
private:
/// The current node we're visiting.
SuffixTreeNode *N = nullptr;
/// The repeated substring associated with this node.
RepeatedSubstring RS;
/// The nodes left to visit.
SmallVector<SuffixTreeInternalNode *> InternalNodesToVisit;
/// The minimum length of a repeated substring to find.
/// Since we're outlining, we want at least two instructions in the range.
/// FIXME: This may not be true for targets like X86 which support many
/// instruction lengths.
const unsigned MinLength = 2;
/// Move the iterator to the next repeated substring.
void advance();
public:
/// Return the current repeated substring.
RepeatedSubstring &operator*() { return RS; }
RepeatedSubstringIterator &operator++() {
advance();
return *this;
}
RepeatedSubstringIterator operator++(int I) {
RepeatedSubstringIterator It(*this);
advance();
return It;
}
bool operator==(const RepeatedSubstringIterator &Other) const {
return N == Other.N;
}
bool operator!=(const RepeatedSubstringIterator &Other) const {
return !(*this == Other);
}
RepeatedSubstringIterator(SuffixTreeInternalNode *N) : N(N) {
// Do we have a non-null node?
if (!N)
return;
// Yes. At the first step, we need to visit all of N's children.
// Note: This means that we visit N last.
InternalNodesToVisit.push_back(N);
advance();
}
};
typedef RepeatedSubstringIterator iterator;
iterator begin() { return iterator(Root); }
iterator end() { return iterator(nullptr); }
};
} // namespace llvm
#endif // LLVM_SUPPORT_SUFFIXTREE_H
PK hwFZ��ԏ � Support/BlockFrequency.hnu �[��� //===-------- BlockFrequency.h - Block Frequency Wrapper --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements Block Frequency class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_BLOCKFREQUENCY_H
#define LLVM_SUPPORT_BLOCKFREQUENCY_H
#include <cassert>
#include <cstdint>
namespace llvm {
class BranchProbability;
// This class represents Block Frequency as a 64-bit value.
class BlockFrequency {
uint64_t Frequency;
public:
BlockFrequency(uint64_t Freq = 0) : Frequency(Freq) { }
/// Returns the maximum possible frequency, the saturation value.
static uint64_t getMaxFrequency() { return UINT64_MAX; }
/// Returns the frequency as a fixpoint number scaled by the entry
/// frequency.
uint64_t getFrequency() const { return Frequency; }
/// Multiplies with a branch probability. The computation will never
/// overflow.
BlockFrequency &operator*=(BranchProbability Prob);
BlockFrequency operator*(BranchProbability Prob) const;
/// Divide by a non-zero branch probability using saturating
/// arithmetic.
BlockFrequency &operator/=(BranchProbability Prob);
BlockFrequency operator/(BranchProbability Prob) const;
/// Adds another block frequency using saturating arithmetic.
BlockFrequency &operator+=(BlockFrequency Freq) {
uint64_t Before = Freq.Frequency;
Frequency += Freq.Frequency;
// If overflow, set frequency to the maximum value.
if (Frequency < Before)
Frequency = UINT64_MAX;
return *this;
}
BlockFrequency operator+(BlockFrequency Freq) const {
BlockFrequency NewFreq(Frequency);
NewFreq += Freq;
return NewFreq;
}
/// Subtracts another block frequency using saturating arithmetic.
BlockFrequency &operator-=(BlockFrequency Freq) {
// If underflow, set frequency to 0.
if (Frequency <= Freq.Frequency)
Frequency = 0;
else
Frequency -= Freq.Frequency;
return *this;
}
BlockFrequency operator-(BlockFrequency Freq) const {
BlockFrequency NewFreq(Frequency);
NewFreq -= Freq;
return NewFreq;
}
/// Shift block frequency to the right by count digits saturating to 1.
BlockFrequency &operator>>=(const unsigned count) {
// Frequency can never be 0 by design.
assert(Frequency != 0);
// Shift right by count.
Frequency >>= count;
// Saturate to 1 if we are 0.
Frequency |= Frequency == 0;
return *this;
}
bool operator<(BlockFrequency RHS) const {
return Frequency < RHS.Frequency;
}
bool operator<=(BlockFrequency RHS) const {
return Frequency <= RHS.Frequency;
}
bool operator>(BlockFrequency RHS) const {
return Frequency > RHS.Frequency;
}
bool operator>=(BlockFrequency RHS) const {
return Frequency >= RHS.Frequency;
}
bool operator==(BlockFrequency RHS) const {
return Frequency == RHS.Frequency;
}
};
} // namespace llvm
#endif
PK hwFZ��gЫ � Support/TarWriter.hnu �[��� //===-- llvm/Support/TarWriter.h - Tar archive file creator -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_TARWRITER_H
#define LLVM_SUPPORT_TARWRITER_H
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/StringSet.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/raw_ostream.h"
namespace llvm {
class TarWriter {
public:
static Expected<std::unique_ptr<TarWriter>> create(StringRef OutputPath,
StringRef BaseDir);
void append(StringRef Path, StringRef Data);
private:
TarWriter(int FD, StringRef BaseDir);
raw_fd_ostream OS;
std::string BaseDir;
StringSet<> Files;
};
}
#endif
PK hwFZ���ɑ& �& Support/AMDHSAKernelDescriptor.hnu �[��� //===--- AMDHSAKernelDescriptor.h -----------------------------*- C++ -*---===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file
/// AMDHSA kernel descriptor definitions. For more information, visit
/// https://llvm.org/docs/AMDGPUUsage.html#kernel-descriptor
///
/// \warning
/// Any changes to this file should also be audited for corresponding changes
/// needed in both the assembler and disassembler, namely:
/// * AMDGPUAsmPrinter.{cpp,h}
/// * AMDGPUTargetStreamer.{cpp,h}
/// * AMDGPUDisassembler.{cpp,h}
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_AMDHSAKERNELDESCRIPTOR_H
#define LLVM_SUPPORT_AMDHSAKERNELDESCRIPTOR_H
#include <cstddef>
#include <cstdint>
// Gets offset of specified member in specified type.
#ifndef offsetof
#define offsetof(TYPE, MEMBER) ((size_t)&((TYPE*)0)->MEMBER)
#endif // offsetof
// Creates enumeration entries used for packing bits into integers. Enumeration
// entries include bit shift amount, bit width, and bit mask.
#ifndef AMDHSA_BITS_ENUM_ENTRY
#define AMDHSA_BITS_ENUM_ENTRY(NAME, SHIFT, WIDTH) \
NAME ## _SHIFT = (SHIFT), \
NAME ## _WIDTH = (WIDTH), \
NAME = (((1 << (WIDTH)) - 1) << (SHIFT))
#endif // AMDHSA_BITS_ENUM_ENTRY
// Gets bits for specified bit mask from specified source.
#ifndef AMDHSA_BITS_GET
#define AMDHSA_BITS_GET(SRC, MSK) ((SRC & MSK) >> MSK ## _SHIFT)
#endif // AMDHSA_BITS_GET
// Sets bits for specified bit mask in specified destination.
#ifndef AMDHSA_BITS_SET
#define AMDHSA_BITS_SET(DST, MSK, VAL) \
DST &= ~MSK; \
DST |= ((VAL << MSK ## _SHIFT) & MSK)
#endif // AMDHSA_BITS_SET
namespace llvm {
namespace amdhsa {
// Floating point rounding modes. Must match hardware definition.
enum : uint8_t {
FLOAT_ROUND_MODE_NEAR_EVEN = 0,
FLOAT_ROUND_MODE_PLUS_INFINITY = 1,
FLOAT_ROUND_MODE_MINUS_INFINITY = 2,
FLOAT_ROUND_MODE_ZERO = 3,
};
// Floating point denorm modes. Must match hardware definition.
enum : uint8_t {
FLOAT_DENORM_MODE_FLUSH_SRC_DST = 0,
FLOAT_DENORM_MODE_FLUSH_DST = 1,
FLOAT_DENORM_MODE_FLUSH_SRC = 2,
FLOAT_DENORM_MODE_FLUSH_NONE = 3,
};
// System VGPR workitem IDs. Must match hardware definition.
enum : uint8_t {
SYSTEM_VGPR_WORKITEM_ID_X = 0,
SYSTEM_VGPR_WORKITEM_ID_X_Y = 1,
SYSTEM_VGPR_WORKITEM_ID_X_Y_Z = 2,
SYSTEM_VGPR_WORKITEM_ID_UNDEFINED = 3,
};
// Compute program resource register 1. Must match hardware definition.
#define COMPUTE_PGM_RSRC1(NAME, SHIFT, WIDTH) \
AMDHSA_BITS_ENUM_ENTRY(COMPUTE_PGM_RSRC1_ ## NAME, SHIFT, WIDTH)
enum : int32_t {
COMPUTE_PGM_RSRC1(GRANULATED_WORKITEM_VGPR_COUNT, 0, 6),
COMPUTE_PGM_RSRC1(GRANULATED_WAVEFRONT_SGPR_COUNT, 6, 4),
COMPUTE_PGM_RSRC1(PRIORITY, 10, 2),
COMPUTE_PGM_RSRC1(FLOAT_ROUND_MODE_32, 12, 2),
COMPUTE_PGM_RSRC1(FLOAT_ROUND_MODE_16_64, 14, 2),
COMPUTE_PGM_RSRC1(FLOAT_DENORM_MODE_32, 16, 2),
COMPUTE_PGM_RSRC1(FLOAT_DENORM_MODE_16_64, 18, 2),
COMPUTE_PGM_RSRC1(PRIV, 20, 1),
COMPUTE_PGM_RSRC1(ENABLE_DX10_CLAMP, 21, 1),
COMPUTE_PGM_RSRC1(DEBUG_MODE, 22, 1),
COMPUTE_PGM_RSRC1(ENABLE_IEEE_MODE, 23, 1),
COMPUTE_PGM_RSRC1(BULKY, 24, 1),
COMPUTE_PGM_RSRC1(CDBG_USER, 25, 1),
COMPUTE_PGM_RSRC1(FP16_OVFL, 26, 1), // GFX9+
COMPUTE_PGM_RSRC1(RESERVED0, 27, 2),
COMPUTE_PGM_RSRC1(WGP_MODE, 29, 1), // GFX10+
COMPUTE_PGM_RSRC1(MEM_ORDERED, 30, 1), // GFX10+
COMPUTE_PGM_RSRC1(FWD_PROGRESS, 31, 1), // GFX10+
};
#undef COMPUTE_PGM_RSRC1
// Compute program resource register 2. Must match hardware definition.
#define COMPUTE_PGM_RSRC2(NAME, SHIFT, WIDTH) \
AMDHSA_BITS_ENUM_ENTRY(COMPUTE_PGM_RSRC2_ ## NAME, SHIFT, WIDTH)
enum : int32_t {
COMPUTE_PGM_RSRC2(ENABLE_PRIVATE_SEGMENT, 0, 1),
COMPUTE_PGM_RSRC2(USER_SGPR_COUNT, 1, 5),
COMPUTE_PGM_RSRC2(ENABLE_TRAP_HANDLER, 6, 1),
COMPUTE_PGM_RSRC2(ENABLE_SGPR_WORKGROUP_ID_X, 7, 1),
COMPUTE_PGM_RSRC2(ENABLE_SGPR_WORKGROUP_ID_Y, 8, 1),
COMPUTE_PGM_RSRC2(ENABLE_SGPR_WORKGROUP_ID_Z, 9, 1),
COMPUTE_PGM_RSRC2(ENABLE_SGPR_WORKGROUP_INFO, 10, 1),
COMPUTE_PGM_RSRC2(ENABLE_VGPR_WORKITEM_ID, 11, 2),
COMPUTE_PGM_RSRC2(ENABLE_EXCEPTION_ADDRESS_WATCH, 13, 1),
COMPUTE_PGM_RSRC2(ENABLE_EXCEPTION_MEMORY, 14, 1),
COMPUTE_PGM_RSRC2(GRANULATED_LDS_SIZE, 15, 9),
COMPUTE_PGM_RSRC2(ENABLE_EXCEPTION_IEEE_754_FP_INVALID_OPERATION, 24, 1),
COMPUTE_PGM_RSRC2(ENABLE_EXCEPTION_FP_DENORMAL_SOURCE, 25, 1),
COMPUTE_PGM_RSRC2(ENABLE_EXCEPTION_IEEE_754_FP_DIVISION_BY_ZERO, 26, 1),
COMPUTE_PGM_RSRC2(ENABLE_EXCEPTION_IEEE_754_FP_OVERFLOW, 27, 1),
COMPUTE_PGM_RSRC2(ENABLE_EXCEPTION_IEEE_754_FP_UNDERFLOW, 28, 1),
COMPUTE_PGM_RSRC2(ENABLE_EXCEPTION_IEEE_754_FP_INEXACT, 29, 1),
COMPUTE_PGM_RSRC2(ENABLE_EXCEPTION_INT_DIVIDE_BY_ZERO, 30, 1),
COMPUTE_PGM_RSRC2(RESERVED0, 31, 1),
};
#undef COMPUTE_PGM_RSRC2
// Compute program resource register 3 for GFX90A+. Must match hardware
// definition.
#define COMPUTE_PGM_RSRC3_GFX90A(NAME, SHIFT, WIDTH) \
AMDHSA_BITS_ENUM_ENTRY(COMPUTE_PGM_RSRC3_GFX90A_ ## NAME, SHIFT, WIDTH)
enum : int32_t {
COMPUTE_PGM_RSRC3_GFX90A(ACCUM_OFFSET, 0, 6),
COMPUTE_PGM_RSRC3_GFX90A(RESERVED0, 6, 10),
COMPUTE_PGM_RSRC3_GFX90A(TG_SPLIT, 16, 1),
COMPUTE_PGM_RSRC3_GFX90A(RESERVED1, 17, 15),
};
#undef COMPUTE_PGM_RSRC3_GFX90A
// Compute program resource register 3 for GFX10+. Must match hardware
// definition.
#define COMPUTE_PGM_RSRC3_GFX10_PLUS(NAME, SHIFT, WIDTH) \
AMDHSA_BITS_ENUM_ENTRY(COMPUTE_PGM_RSRC3_GFX10_PLUS_ ## NAME, SHIFT, WIDTH)
enum : int32_t {
COMPUTE_PGM_RSRC3_GFX10_PLUS(SHARED_VGPR_COUNT, 0, 4), // GFX10+
COMPUTE_PGM_RSRC3_GFX10_PLUS(INST_PREF_SIZE, 4, 6), // GFX11+
COMPUTE_PGM_RSRC3_GFX10_PLUS(TRAP_ON_START, 10, 1), // GFX11+
COMPUTE_PGM_RSRC3_GFX10_PLUS(TRAP_ON_END, 11, 1), // GFX11+
COMPUTE_PGM_RSRC3_GFX10_PLUS(RESERVED0, 12, 19),
COMPUTE_PGM_RSRC3_GFX10_PLUS(IMAGE_OP, 31, 1), // GFX11+
};
#undef COMPUTE_PGM_RSRC3_GFX10_PLUS
// Kernel code properties. Must be kept backwards compatible.
#define KERNEL_CODE_PROPERTY(NAME, SHIFT, WIDTH) \
AMDHSA_BITS_ENUM_ENTRY(KERNEL_CODE_PROPERTY_ ## NAME, SHIFT, WIDTH)
enum : int32_t {
KERNEL_CODE_PROPERTY(ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER, 0, 1),
KERNEL_CODE_PROPERTY(ENABLE_SGPR_DISPATCH_PTR, 1, 1),
KERNEL_CODE_PROPERTY(ENABLE_SGPR_QUEUE_PTR, 2, 1),
KERNEL_CODE_PROPERTY(ENABLE_SGPR_KERNARG_SEGMENT_PTR, 3, 1),
KERNEL_CODE_PROPERTY(ENABLE_SGPR_DISPATCH_ID, 4, 1),
KERNEL_CODE_PROPERTY(ENABLE_SGPR_FLAT_SCRATCH_INIT, 5, 1),
KERNEL_CODE_PROPERTY(ENABLE_SGPR_PRIVATE_SEGMENT_SIZE, 6, 1),
KERNEL_CODE_PROPERTY(RESERVED0, 7, 3),
KERNEL_CODE_PROPERTY(ENABLE_WAVEFRONT_SIZE32, 10, 1), // GFX10+
KERNEL_CODE_PROPERTY(USES_DYNAMIC_STACK, 11, 1),
KERNEL_CODE_PROPERTY(RESERVED1, 12, 4),
};
#undef KERNEL_CODE_PROPERTY
// Kernel descriptor. Must be kept backwards compatible.
struct kernel_descriptor_t {
uint32_t group_segment_fixed_size;
uint32_t private_segment_fixed_size;
uint32_t kernarg_size;
uint8_t reserved0[4];
int64_t kernel_code_entry_byte_offset;
uint8_t reserved1[20];
uint32_t compute_pgm_rsrc3; // GFX10+ and GFX90A+
uint32_t compute_pgm_rsrc1;
uint32_t compute_pgm_rsrc2;
uint16_t kernel_code_properties;
uint8_t reserved2[6];
};
enum : uint32_t {
GROUP_SEGMENT_FIXED_SIZE_OFFSET = 0,
PRIVATE_SEGMENT_FIXED_SIZE_OFFSET = 4,
KERNARG_SIZE_OFFSET = 8,
RESERVED0_OFFSET = 12,
KERNEL_CODE_ENTRY_BYTE_OFFSET_OFFSET = 16,
RESERVED1_OFFSET = 24,
COMPUTE_PGM_RSRC3_OFFSET = 44,
COMPUTE_PGM_RSRC1_OFFSET = 48,
COMPUTE_PGM_RSRC2_OFFSET = 52,
KERNEL_CODE_PROPERTIES_OFFSET = 56,
RESERVED2_OFFSET = 58,
};
static_assert(
sizeof(kernel_descriptor_t) == 64,
"invalid size for kernel_descriptor_t");
static_assert(offsetof(kernel_descriptor_t, group_segment_fixed_size) ==
GROUP_SEGMENT_FIXED_SIZE_OFFSET,
"invalid offset for group_segment_fixed_size");
static_assert(offsetof(kernel_descriptor_t, private_segment_fixed_size) ==
PRIVATE_SEGMENT_FIXED_SIZE_OFFSET,
"invalid offset for private_segment_fixed_size");
static_assert(offsetof(kernel_descriptor_t, kernarg_size) ==
KERNARG_SIZE_OFFSET,
"invalid offset for kernarg_size");
static_assert(offsetof(kernel_descriptor_t, reserved0) == RESERVED0_OFFSET,
"invalid offset for reserved0");
static_assert(offsetof(kernel_descriptor_t, kernel_code_entry_byte_offset) ==
KERNEL_CODE_ENTRY_BYTE_OFFSET_OFFSET,
"invalid offset for kernel_code_entry_byte_offset");
static_assert(offsetof(kernel_descriptor_t, reserved1) == RESERVED1_OFFSET,
"invalid offset for reserved1");
static_assert(offsetof(kernel_descriptor_t, compute_pgm_rsrc3) ==
COMPUTE_PGM_RSRC3_OFFSET,
"invalid offset for compute_pgm_rsrc3");
static_assert(offsetof(kernel_descriptor_t, compute_pgm_rsrc1) ==
COMPUTE_PGM_RSRC1_OFFSET,
"invalid offset for compute_pgm_rsrc1");
static_assert(offsetof(kernel_descriptor_t, compute_pgm_rsrc2) ==
COMPUTE_PGM_RSRC2_OFFSET,
"invalid offset for compute_pgm_rsrc2");
static_assert(offsetof(kernel_descriptor_t, kernel_code_properties) ==
KERNEL_CODE_PROPERTIES_OFFSET,
"invalid offset for kernel_code_properties");
static_assert(offsetof(kernel_descriptor_t, reserved2) == RESERVED2_OFFSET,
"invalid offset for reserved2");
} // end namespace amdhsa
} // end namespace llvm
#endif // LLVM_SUPPORT_AMDHSAKERNELDESCRIPTOR_H
PK hwFZ��u��B �B Support/YAMLParser.hnu �[��� //===- YAMLParser.h - Simple YAML parser ------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This is a YAML 1.2 parser.
//
// See http://www.yaml.org/spec/1.2/spec.html for the full standard.
//
// This currently does not implement the following:
// * Tag resolution.
// * UTF-16.
// * BOMs anywhere other than the first Unicode scalar value in the file.
//
// The most important class here is Stream. This represents a YAML stream with
// 0, 1, or many documents.
//
// SourceMgr sm;
// StringRef input = getInput();
// yaml::Stream stream(input, sm);
//
// for (yaml::document_iterator di = stream.begin(), de = stream.end();
// di != de; ++di) {
// yaml::Node *n = di->getRoot();
// if (n) {
// // Do something with n...
// } else
// break;
// }
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_YAMLPARSER_H
#define LLVM_SUPPORT_YAMLPARSER_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/SMLoc.h"
#include "llvm/Support/SourceMgr.h"
#include <cassert>
#include <cstddef>
#include <iterator>
#include <map>
#include <memory>
#include <optional>
#include <string>
#include <system_error>
namespace llvm {
class MemoryBufferRef;
class raw_ostream;
class Twine;
namespace yaml {
class Document;
class document_iterator;
class Node;
class Scanner;
struct Token;
/// Dump all the tokens in this stream to OS.
/// \returns true if there was an error, false otherwise.
bool dumpTokens(StringRef Input, raw_ostream &);
/// Scans all tokens in input without outputting anything. This is used
/// for benchmarking the tokenizer.
/// \returns true if there was an error, false otherwise.
bool scanTokens(StringRef Input);
/// Escape \a Input for a double quoted scalar; if \p EscapePrintable
/// is true, all UTF8 sequences will be escaped, if \p EscapePrintable is
/// false, those UTF8 sequences encoding printable unicode scalars will not be
/// escaped, but emitted verbatim.
std::string escape(StringRef Input, bool EscapePrintable = true);
/// Parse \p S as a bool according to https://yaml.org/type/bool.html.
std::optional<bool> parseBool(StringRef S);
/// This class represents a YAML stream potentially containing multiple
/// documents.
class Stream {
public:
/// This keeps a reference to the string referenced by \p Input.
Stream(StringRef Input, SourceMgr &, bool ShowColors = true,
std::error_code *EC = nullptr);
Stream(MemoryBufferRef InputBuffer, SourceMgr &, bool ShowColors = true,
std::error_code *EC = nullptr);
~Stream();
document_iterator begin();
document_iterator end();
void skip();
bool failed();
bool validate() {
skip();
return !failed();
}
void printError(Node *N, const Twine &Msg,
SourceMgr::DiagKind Kind = SourceMgr::DK_Error);
void printError(const SMRange &Range, const Twine &Msg,
SourceMgr::DiagKind Kind = SourceMgr::DK_Error);
private:
friend class Document;
std::unique_ptr<Scanner> scanner;
std::unique_ptr<Document> CurrentDoc;
};
/// Abstract base class for all Nodes.
class Node {
virtual void anchor();
public:
enum NodeKind {
NK_Null,
NK_Scalar,
NK_BlockScalar,
NK_KeyValue,
NK_Mapping,
NK_Sequence,
NK_Alias
};
Node(unsigned int Type, std::unique_ptr<Document> &, StringRef Anchor,
StringRef Tag);
// It's not safe to copy YAML nodes; the document is streamed and the position
// is part of the state.
Node(const Node &) = delete;
void operator=(const Node &) = delete;
void *operator new(size_t Size, BumpPtrAllocator &Alloc,
size_t Alignment = 16) noexcept {
return Alloc.Allocate(Size, Alignment);
}
void operator delete(void *Ptr, BumpPtrAllocator &Alloc,
size_t Size) noexcept {
Alloc.Deallocate(Ptr, Size, 0);
}
void operator delete(void *) noexcept = delete;
/// Get the value of the anchor attached to this node. If it does not
/// have one, getAnchor().size() will be 0.
StringRef getAnchor() const { return Anchor; }
/// Get the tag as it was written in the document. This does not
/// perform tag resolution.
StringRef getRawTag() const { return Tag; }
/// Get the verbatium tag for a given Node. This performs tag resoluton
/// and substitution.
std::string getVerbatimTag() const;
SMRange getSourceRange() const { return SourceRange; }
void setSourceRange(SMRange SR) { SourceRange = SR; }
// These functions forward to Document and Scanner.
Token &peekNext();
Token getNext();
Node *parseBlockNode();
BumpPtrAllocator &getAllocator();
void setError(const Twine &Message, Token &Location) const;
bool failed() const;
virtual void skip() {}
unsigned int getType() const { return TypeID; }
protected:
std::unique_ptr<Document> &Doc;
SMRange SourceRange;
~Node() = default;
private:
unsigned int TypeID;
StringRef Anchor;
/// The tag as typed in the document.
StringRef Tag;
};
/// A null value.
///
/// Example:
/// !!null null
class NullNode final : public Node {
void anchor() override;
public:
NullNode(std::unique_ptr<Document> &D)
: Node(NK_Null, D, StringRef(), StringRef()) {}
static bool classof(const Node *N) { return N->getType() == NK_Null; }
};
/// A scalar node is an opaque datum that can be presented as a
/// series of zero or more Unicode scalar values.
///
/// Example:
/// Adena
class ScalarNode final : public Node {
void anchor() override;
public:
ScalarNode(std::unique_ptr<Document> &D, StringRef Anchor, StringRef Tag,
StringRef Val)
: Node(NK_Scalar, D, Anchor, Tag), Value(Val) {
SMLoc Start = SMLoc::getFromPointer(Val.begin());
SMLoc End = SMLoc::getFromPointer(Val.end());
SourceRange = SMRange(Start, End);
}
// Return Value without any escaping or folding or other fun YAML stuff. This
// is the exact bytes that are contained in the file (after conversion to
// utf8).
StringRef getRawValue() const { return Value; }
/// Gets the value of this node as a StringRef.
///
/// \param Storage is used to store the content of the returned StringRef if
/// it requires any modification from how it appeared in the source.
/// This happens with escaped characters and multi-line literals.
StringRef getValue(SmallVectorImpl<char> &Storage) const;
static bool classof(const Node *N) {
return N->getType() == NK_Scalar;
}
private:
StringRef Value;
StringRef unescapeDoubleQuoted(StringRef UnquotedValue,
StringRef::size_type Start,
SmallVectorImpl<char> &Storage) const;
};
/// A block scalar node is an opaque datum that can be presented as a
/// series of zero or more Unicode scalar values.
///
/// Example:
/// |
/// Hello
/// World
class BlockScalarNode final : public Node {
void anchor() override;
public:
BlockScalarNode(std::unique_ptr<Document> &D, StringRef Anchor, StringRef Tag,
StringRef Value, StringRef RawVal)
: Node(NK_BlockScalar, D, Anchor, Tag), Value(Value) {
SMLoc Start = SMLoc::getFromPointer(RawVal.begin());
SMLoc End = SMLoc::getFromPointer(RawVal.end());
SourceRange = SMRange(Start, End);
}
/// Gets the value of this node as a StringRef.
StringRef getValue() const { return Value; }
static bool classof(const Node *N) {
return N->getType() == NK_BlockScalar;
}
private:
StringRef Value;
};
/// A key and value pair. While not technically a Node under the YAML
/// representation graph, it is easier to treat them this way.
///
/// TODO: Consider making this not a child of Node.
///
/// Example:
/// Section: .text
class KeyValueNode final : public Node {
void anchor() override;
public:
KeyValueNode(std::unique_ptr<Document> &D)
: Node(NK_KeyValue, D, StringRef(), StringRef()) {}
/// Parse and return the key.
///
/// This may be called multiple times.
///
/// \returns The key, or nullptr if failed() == true.
Node *getKey();
/// Parse and return the value.
///
/// This may be called multiple times.
///
/// \returns The value, or nullptr if failed() == true.
Node *getValue();
void skip() override {
if (Node *Key = getKey()) {
Key->skip();
if (Node *Val = getValue())
Val->skip();
}
}
static bool classof(const Node *N) {
return N->getType() == NK_KeyValue;
}
private:
Node *Key = nullptr;
Node *Value = nullptr;
};
/// This is an iterator abstraction over YAML collections shared by both
/// sequences and maps.
///
/// BaseT must have a ValueT* member named CurrentEntry and a member function
/// increment() which must set CurrentEntry to 0 to create an end iterator.
template <class BaseT, class ValueT> class basic_collection_iterator {
public:
using iterator_category = std::input_iterator_tag;
using value_type = ValueT;
using difference_type = std::ptrdiff_t;
using pointer = value_type *;
using reference = value_type &;
basic_collection_iterator() = default;
basic_collection_iterator(BaseT *B) : Base(B) {}
ValueT *operator->() const {
assert(Base && Base->CurrentEntry && "Attempted to access end iterator!");
return Base->CurrentEntry;
}
ValueT &operator*() const {
assert(Base && Base->CurrentEntry &&
"Attempted to dereference end iterator!");
return *Base->CurrentEntry;
}
operator ValueT *() const {
assert(Base && Base->CurrentEntry && "Attempted to access end iterator!");
return Base->CurrentEntry;
}
/// Note on EqualityComparable:
///
/// The iterator is not re-entrant,
/// it is meant to be used for parsing YAML on-demand
/// Once iteration started - it can point only to one entry at a time
/// hence Base.CurrentEntry and Other.Base.CurrentEntry are equal
/// iff Base and Other.Base are equal.
bool operator==(const basic_collection_iterator &Other) const {
if (Base && (Base == Other.Base)) {
assert((Base->CurrentEntry == Other.Base->CurrentEntry)
&& "Equal Bases expected to point to equal Entries");
}
return Base == Other.Base;
}
bool operator!=(const basic_collection_iterator &Other) const {
return !(Base == Other.Base);
}
basic_collection_iterator &operator++() {
assert(Base && "Attempted to advance iterator past end!");
Base->increment();
// Create an end iterator.
if (!Base->CurrentEntry)
Base = nullptr;
return *this;
}
private:
BaseT *Base = nullptr;
};
// The following two templates are used for both MappingNode and Sequence Node.
template <class CollectionType>
typename CollectionType::iterator begin(CollectionType &C) {
assert(C.IsAtBeginning && "You may only iterate over a collection once!");
C.IsAtBeginning = false;
typename CollectionType::iterator ret(&C);
++ret;
return ret;
}
template <class CollectionType> void skip(CollectionType &C) {
// TODO: support skipping from the middle of a parsed collection ;/
assert((C.IsAtBeginning || C.IsAtEnd) && "Cannot skip mid parse!");
if (C.IsAtBeginning)
for (typename CollectionType::iterator i = begin(C), e = C.end(); i != e;
++i)
i->skip();
}
/// Represents a YAML map created from either a block map for a flow map.
///
/// This parses the YAML stream as increment() is called.
///
/// Example:
/// Name: _main
/// Scope: Global
class MappingNode final : public Node {
void anchor() override;
public:
enum MappingType {
MT_Block,
MT_Flow,
MT_Inline ///< An inline mapping node is used for "[key: value]".
};
MappingNode(std::unique_ptr<Document> &D, StringRef Anchor, StringRef Tag,
MappingType MT)
: Node(NK_Mapping, D, Anchor, Tag), Type(MT) {}
friend class basic_collection_iterator<MappingNode, KeyValueNode>;
using iterator = basic_collection_iterator<MappingNode, KeyValueNode>;
template <class T> friend typename T::iterator yaml::begin(T &);
template <class T> friend void yaml::skip(T &);
iterator begin() { return yaml::begin(*this); }
iterator end() { return iterator(); }
void skip() override { yaml::skip(*this); }
static bool classof(const Node *N) {
return N->getType() == NK_Mapping;
}
private:
MappingType Type;
bool IsAtBeginning = true;
bool IsAtEnd = false;
KeyValueNode *CurrentEntry = nullptr;
void increment();
};
/// Represents a YAML sequence created from either a block sequence for a
/// flow sequence.
///
/// This parses the YAML stream as increment() is called.
///
/// Example:
/// - Hello
/// - World
class SequenceNode final : public Node {
void anchor() override;
public:
enum SequenceType {
ST_Block,
ST_Flow,
// Use for:
//
// key:
// - val1
// - val2
//
// As a BlockMappingEntry and BlockEnd are not created in this case.
ST_Indentless
};
SequenceNode(std::unique_ptr<Document> &D, StringRef Anchor, StringRef Tag,
SequenceType ST)
: Node(NK_Sequence, D, Anchor, Tag), SeqType(ST) {}
friend class basic_collection_iterator<SequenceNode, Node>;
using iterator = basic_collection_iterator<SequenceNode, Node>;
template <class T> friend typename T::iterator yaml::begin(T &);
template <class T> friend void yaml::skip(T &);
void increment();
iterator begin() { return yaml::begin(*this); }
iterator end() { return iterator(); }
void skip() override { yaml::skip(*this); }
static bool classof(const Node *N) {
return N->getType() == NK_Sequence;
}
private:
SequenceType SeqType;
bool IsAtBeginning = true;
bool IsAtEnd = false;
bool WasPreviousTokenFlowEntry = true; // Start with an imaginary ','.
Node *CurrentEntry = nullptr;
};
/// Represents an alias to a Node with an anchor.
///
/// Example:
/// *AnchorName
class AliasNode final : public Node {
void anchor() override;
public:
AliasNode(std::unique_ptr<Document> &D, StringRef Val)
: Node(NK_Alias, D, StringRef(), StringRef()), Name(Val) {}
StringRef getName() const { return Name; }
static bool classof(const Node *N) { return N->getType() == NK_Alias; }
private:
StringRef Name;
};
/// A YAML Stream is a sequence of Documents. A document contains a root
/// node.
class Document {
public:
Document(Stream &ParentStream);
/// Root for parsing a node. Returns a single node.
Node *parseBlockNode();
/// Finish parsing the current document and return true if there are
/// more. Return false otherwise.
bool skip();
/// Parse and return the root level node.
Node *getRoot() {
if (Root)
return Root;
return Root = parseBlockNode();
}
const std::map<StringRef, StringRef> &getTagMap() const { return TagMap; }
private:
friend class Node;
friend class document_iterator;
/// Stream to read tokens from.
Stream &stream;
/// Used to allocate nodes to. All are destroyed without calling their
/// destructor when the document is destroyed.
BumpPtrAllocator NodeAllocator;
/// The root node. Used to support skipping a partially parsed
/// document.
Node *Root;
/// Maps tag prefixes to their expansion.
std::map<StringRef, StringRef> TagMap;
Token &peekNext();
Token getNext();
void setError(const Twine &Message, Token &Location) const;
bool failed() const;
/// Parse %BLAH directives and return true if any were encountered.
bool parseDirectives();
/// Parse %YAML
void parseYAMLDirective();
/// Parse %TAG
void parseTAGDirective();
/// Consume the next token and error if it is not \a TK.
bool expectToken(int TK);
};
/// Iterator abstraction for Documents over a Stream.
class document_iterator {
public:
document_iterator() = default;
document_iterator(std::unique_ptr<Document> &D) : Doc(&D) {}
bool operator==(const document_iterator &Other) const {
if (isAtEnd() || Other.isAtEnd())
return isAtEnd() && Other.isAtEnd();
return Doc == Other.Doc;
}
bool operator!=(const document_iterator &Other) const {
return !(*this == Other);
}
document_iterator operator++() {
assert(Doc && "incrementing iterator past the end.");
if (!(*Doc)->skip()) {
Doc->reset(nullptr);
} else {
Stream &S = (*Doc)->stream;
Doc->reset(new Document(S));
}
return *this;
}
Document &operator*() { return **Doc; }
std::unique_ptr<Document> &operator->() { return *Doc; }
private:
bool isAtEnd() const { return !Doc || !*Doc; }
std::unique_ptr<Document> *Doc = nullptr;
};
} // end namespace yaml
} // end namespace llvm
#endif // LLVM_SUPPORT_YAMLPARSER_H
PK hwFZ�� � Support/BinaryStream.hnu �[��� //===- BinaryStream.h - Base interface for a stream of data -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_BINARYSTREAM_H
#define LLVM_SUPPORT_BINARYSTREAM_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitmaskEnum.h"
#include "llvm/Support/BinaryStreamError.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <cstdint>
namespace llvm {
enum BinaryStreamFlags {
BSF_None = 0,
BSF_Write = 1, // Stream supports writing.
BSF_Append = 2, // Writing can occur at offset == length.
LLVM_MARK_AS_BITMASK_ENUM(/* LargestValue = */ BSF_Append)
};
/// An interface for accessing data in a stream-like format, but which
/// discourages copying. Instead of specifying a buffer in which to copy
/// data on a read, the API returns an ArrayRef to data owned by the stream's
/// implementation. Since implementations may not necessarily store data in a
/// single contiguous buffer (or even in memory at all), in such cases a it may
/// be necessary for an implementation to cache such a buffer so that it can
/// return it.
class BinaryStream {
public:
virtual ~BinaryStream() = default;
virtual llvm::support::endianness getEndian() const = 0;
/// Given an offset into the stream and a number of bytes, attempt to
/// read the bytes and set the output ArrayRef to point to data owned by the
/// stream.
virtual Error readBytes(uint64_t Offset, uint64_t Size,
ArrayRef<uint8_t> &Buffer) = 0;
/// Given an offset into the stream, read as much as possible without
/// copying any data.
virtual Error readLongestContiguousChunk(uint64_t Offset,
ArrayRef<uint8_t> &Buffer) = 0;
/// Return the number of bytes of data in this stream.
virtual uint64_t getLength() = 0;
/// Return the properties of this stream.
virtual BinaryStreamFlags getFlags() const { return BSF_None; }
protected:
Error checkOffsetForRead(uint64_t Offset, uint64_t DataSize) {
if (Offset > getLength())
return make_error<BinaryStreamError>(stream_error_code::invalid_offset);
if (getLength() < DataSize + Offset)
return make_error<BinaryStreamError>(stream_error_code::stream_too_short);
return Error::success();
}
};
/// A BinaryStream which can be read from as well as written to. Note
/// that writing to a BinaryStream always necessitates copying from the input
/// buffer to the stream's backing store. Streams are assumed to be buffered
/// so that to be portable it is necessary to call commit() on the stream when
/// all data has been written.
class WritableBinaryStream : public BinaryStream {
public:
~WritableBinaryStream() override = default;
/// Attempt to write the given bytes into the stream at the desired
/// offset. This will always necessitate a copy. Cannot shrink or grow the
/// stream, only writes into existing allocated space.
virtual Error writeBytes(uint64_t Offset, ArrayRef<uint8_t> Data) = 0;
/// For buffered streams, commits changes to the backing store.
virtual Error commit() = 0;
/// Return the properties of this stream.
BinaryStreamFlags getFlags() const override { return BSF_Write; }
protected:
Error checkOffsetForWrite(uint64_t Offset, uint64_t DataSize) {
if (!(getFlags() & BSF_Append))
return checkOffsetForRead(Offset, DataSize);
if (Offset > getLength())
return make_error<BinaryStreamError>(stream_error_code::invalid_offset);
return Error::success();
}
};
} // end namespace llvm
#endif // LLVM_SUPPORT_BINARYSTREAM_H
PK hwFZ�.�� ( ( Support/Threading.hnu �[��� //===-- llvm/Support/Threading.h - Control multithreading mode --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares helper functions for running LLVM in a multi-threaded
// environment.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_THREADING_H
#define LLVM_SUPPORT_THREADING_H
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Config/llvm-config.h" // for LLVM_ON_UNIX
#include "llvm/Support/Compiler.h"
#include <ciso646> // So we can check the C++ standard lib macros.
#include <optional>
#if defined(_MSC_VER)
// MSVC's call_once implementation worked since VS 2015, which is the minimum
// supported version as of this writing.
#define LLVM_THREADING_USE_STD_CALL_ONCE 1
#elif defined(LLVM_ON_UNIX) && \
(defined(_LIBCPP_VERSION) || \
!(defined(__NetBSD__) || defined(__OpenBSD__) || defined(__powerpc__)))
// std::call_once from libc++ is used on all Unix platforms. Other
// implementations like libstdc++ are known to have problems on NetBSD,
// OpenBSD and PowerPC.
#define LLVM_THREADING_USE_STD_CALL_ONCE 1
#elif defined(LLVM_ON_UNIX) && \
(defined(__powerpc__) && defined(__LITTLE_ENDIAN__))
#define LLVM_THREADING_USE_STD_CALL_ONCE 1
#else
#define LLVM_THREADING_USE_STD_CALL_ONCE 0
#endif
#if LLVM_THREADING_USE_STD_CALL_ONCE
#include <mutex>
#else
#include "llvm/Support/Atomic.h"
#endif
namespace llvm {
class Twine;
/// Returns true if LLVM is compiled with support for multi-threading, and
/// false otherwise.
constexpr bool llvm_is_multithreaded() { return LLVM_ENABLE_THREADS; }
#if LLVM_THREADING_USE_STD_CALL_ONCE
typedef std::once_flag once_flag;
#else
enum InitStatus { Uninitialized = 0, Wait = 1, Done = 2 };
/// The llvm::once_flag structure
///
/// This type is modeled after std::once_flag to use with llvm::call_once.
/// This structure must be used as an opaque object. It is a struct to force
/// autoinitialization and behave like std::once_flag.
struct once_flag {
volatile sys::cas_flag status = Uninitialized;
};
#endif
/// Execute the function specified as a parameter once.
///
/// Typical usage:
/// \code
/// void foo() {...};
/// ...
/// static once_flag flag;
/// call_once(flag, foo);
/// \endcode
///
/// \param flag Flag used for tracking whether or not this has run.
/// \param F Function to call once.
template <typename Function, typename... Args>
void call_once(once_flag &flag, Function &&F, Args &&... ArgList) {
#if LLVM_THREADING_USE_STD_CALL_ONCE
std::call_once(flag, std::forward<Function>(F),
std::forward<Args>(ArgList)...);
#else
// For other platforms we use a generic (if brittle) version based on our
// atomics.
sys::cas_flag old_val = sys::CompareAndSwap(&flag.status, Wait, Uninitialized);
if (old_val == Uninitialized) {
std::forward<Function>(F)(std::forward<Args>(ArgList)...);
sys::MemoryFence();
TsanIgnoreWritesBegin();
TsanHappensBefore(&flag.status);
flag.status = Done;
TsanIgnoreWritesEnd();
} else {
// Wait until any thread doing the call has finished.
sys::cas_flag tmp = flag.status;
sys::MemoryFence();
while (tmp != Done) {
tmp = flag.status;
sys::MemoryFence();
}
}
TsanHappensAfter(&flag.status);
#endif
}
/// This tells how a thread pool will be used
class ThreadPoolStrategy {
public:
// The default value (0) means all available threads should be used,
// taking the affinity mask into account. If set, this value only represents
// a suggested high bound, the runtime might choose a lower value (not
// higher).
unsigned ThreadsRequested = 0;
// If SMT is active, use hyper threads. If false, there will be only one
// std::thread per core.
bool UseHyperThreads = true;
// If set, will constrain 'ThreadsRequested' to the number of hardware
// threads, or hardware cores.
bool Limit = false;
/// Retrieves the max available threads for the current strategy. This
/// accounts for affinity masks and takes advantage of all CPU sockets.
unsigned compute_thread_count() const;
/// Assign the current thread to an ideal hardware CPU or NUMA node. In a
/// multi-socket system, this ensures threads are assigned to all CPU
/// sockets. \p ThreadPoolNum represents a number bounded by [0,
/// compute_thread_count()).
void apply_thread_strategy(unsigned ThreadPoolNum) const;
/// Finds the CPU socket where a thread should go. Returns 'std::nullopt' if
/// the thread shall remain on the actual CPU socket.
std::optional<unsigned> compute_cpu_socket(unsigned ThreadPoolNum) const;
};
/// Build a strategy from a number of threads as a string provided in \p Num.
/// When Num is above the max number of threads specified by the \p Default
/// strategy, we attempt to equally allocate the threads on all CPU sockets.
/// "0" or an empty string will return the \p Default strategy.
/// "all" for using all hardware threads.
std::optional<ThreadPoolStrategy>
get_threadpool_strategy(StringRef Num, ThreadPoolStrategy Default = {});
/// Returns a thread strategy for tasks requiring significant memory or other
/// resources. To be used for workloads where hardware_concurrency() proves to
/// be less efficient. Avoid this strategy if doing lots of I/O. Currently
/// based on physical cores, if available for the host system, otherwise falls
/// back to hardware_concurrency(). Returns 1 when LLVM is configured with
/// LLVM_ENABLE_THREADS = OFF.
inline ThreadPoolStrategy
heavyweight_hardware_concurrency(unsigned ThreadCount = 0) {
ThreadPoolStrategy S;
S.UseHyperThreads = false;
S.ThreadsRequested = ThreadCount;
return S;
}
/// Like heavyweight_hardware_concurrency() above, but builds a strategy
/// based on the rules described for get_threadpool_strategy().
/// If \p Num is invalid, returns a default strategy where one thread per
/// hardware core is used.
inline ThreadPoolStrategy heavyweight_hardware_concurrency(StringRef Num) {
std::optional<ThreadPoolStrategy> S =
get_threadpool_strategy(Num, heavyweight_hardware_concurrency());
if (S)
return *S;
return heavyweight_hardware_concurrency();
}
/// Returns a default thread strategy where all available hardware resources
/// are to be used, except for those initially excluded by an affinity mask.
/// This function takes affinity into consideration. Returns 1 when LLVM is
/// configured with LLVM_ENABLE_THREADS=OFF.
inline ThreadPoolStrategy hardware_concurrency(unsigned ThreadCount = 0) {
ThreadPoolStrategy S;
S.ThreadsRequested = ThreadCount;
return S;
}
/// Returns an optimal thread strategy to execute specified amount of tasks.
/// This strategy should prevent us from creating too many threads if we
/// occasionaly have an unexpectedly small amount of tasks.
inline ThreadPoolStrategy optimal_concurrency(unsigned TaskCount = 0) {
ThreadPoolStrategy S;
S.Limit = true;
S.ThreadsRequested = TaskCount;
return S;
}
/// Return the current thread id, as used in various OS system calls.
/// Note that not all platforms guarantee that the value returned will be
/// unique across the entire system, so portable code should not assume
/// this.
uint64_t get_threadid();
/// Get the maximum length of a thread name on this platform.
/// A value of 0 means there is no limit.
uint32_t get_max_thread_name_length();
/// Set the name of the current thread. Setting a thread's name can
/// be helpful for enabling useful diagnostics under a debugger or when
/// logging. The level of support for setting a thread's name varies
/// wildly across operating systems, and we only make a best effort to
/// perform the operation on supported platforms. No indication of success
/// or failure is returned.
void set_thread_name(const Twine &Name);
/// Get the name of the current thread. The level of support for
/// getting a thread's name varies wildly across operating systems, and it
/// is not even guaranteed that if you can successfully set a thread's name
/// that you can later get it back. This function is intended for diagnostic
/// purposes, and as with setting a thread's name no indication of whether
/// the operation succeeded or failed is returned.
void get_thread_name(SmallVectorImpl<char> &Name);
/// Returns a mask that represents on which hardware thread, core, CPU, NUMA
/// group, the calling thread can be executed. On Windows, threads cannot
/// cross CPU sockets boundaries.
llvm::BitVector get_thread_affinity_mask();
/// Returns how many physical CPUs or NUMA groups the system has.
unsigned get_cpus();
/// Returns how many physical cores (as opposed to logical cores returned from
/// thread::hardware_concurrency(), which includes hyperthreads).
/// Returns -1 if unknown for the current host system.
int get_physical_cores();
enum class ThreadPriority {
/// Lower the current thread's priority as much as possible. Can be used
/// for long-running tasks that are not time critical; more energy-
/// efficient than Low.
Background = 0,
/// Lower the current thread's priority such that it does not affect
/// foreground tasks significantly. This is a good default for long-
/// running, latency-insensitive tasks to make sure cpu is not hogged
/// by this task.
Low = 1,
/// Restore the current thread's priority to default scheduling priority.
Default = 2,
};
enum class SetThreadPriorityResult { FAILURE, SUCCESS };
SetThreadPriorityResult set_thread_priority(ThreadPriority Priority);
}
#endif
PK hwFZ{O(�n n Support/CBindingWrapping.hnu �[��� //===- llvm/Support/CBindingWrapping.h - C Interface Wrapping ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the wrapping macros for the C interface.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_CBINDINGWRAPPING_H
#define LLVM_SUPPORT_CBINDINGWRAPPING_H
#include "llvm-c/Types.h"
#include "llvm/Support/Casting.h"
#define DEFINE_SIMPLE_CONVERSION_FUNCTIONS(ty, ref) \
inline ty *unwrap(ref P) { \
return reinterpret_cast<ty*>(P); \
} \
\
inline ref wrap(const ty *P) { \
return reinterpret_cast<ref>(const_cast<ty*>(P)); \
}
#define DEFINE_ISA_CONVERSION_FUNCTIONS(ty, ref) \
DEFINE_SIMPLE_CONVERSION_FUNCTIONS(ty, ref) \
\
template<typename T> \
inline T *unwrap(ref P) { \
return cast<T>(unwrap(P)); \
}
#define DEFINE_STDCXX_CONVERSION_FUNCTIONS(ty, ref) \
DEFINE_SIMPLE_CONVERSION_FUNCTIONS(ty, ref) \
\
template<typename T> \
inline T *unwrap(ref P) { \
T *Q = (T*)unwrap(P); \
assert(Q && "Invalid cast!"); \
return Q; \
}
#endif
PK hwFZiX�� � Support/Watchdog.hnu �[��� //===--- Watchdog.h - Watchdog timer ----------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the llvm::sys::Watchdog class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_WATCHDOG_H
#define LLVM_SUPPORT_WATCHDOG_H
#include "llvm/Support/Compiler.h"
namespace llvm {
namespace sys {
/// This class provides an abstraction for a timeout around an operation
/// that must complete in a given amount of time. Failure to complete before
/// the timeout is an unrecoverable situation and no mechanisms to attempt
/// to handle it are provided.
class Watchdog {
public:
Watchdog(unsigned int seconds);
~Watchdog();
private:
// Noncopyable.
Watchdog(const Watchdog &other) = delete;
Watchdog &operator=(const Watchdog &other) = delete;
};
}
}
#endif
PK hwFZ�K�q q Support/GlobPattern.hnu �[��� //===-- GlobPattern.h - glob pattern matcher implementation -*- C++ -*-----===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements a glob pattern matcher. The glob pattern is the
// rule used by the shell.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_GLOBPATTERN_H
#define LLVM_SUPPORT_GLOBPATTERN_H
#include "llvm/ADT/BitVector.h"
#include "llvm/Support/Error.h"
#include <optional>
#include <vector>
// This class represents a glob pattern. Supported metacharacters
// are "*", "?", "\", "[<chars>]", "[^<chars>]", and "[!<chars>]".
namespace llvm {
template <typename T> class ArrayRef;
class StringRef;
class GlobPattern {
public:
static Expected<GlobPattern> create(StringRef Pat);
bool match(StringRef S) const;
// Returns true for glob pattern "*". Can be used to avoid expensive
// preparation/acquisition of the input for match().
bool isTrivialMatchAll() const {
if (Prefix && Prefix->empty()) {
assert(!Suffix);
return true;
}
return false;
}
private:
bool matchOne(ArrayRef<BitVector> Pat, StringRef S) const;
// Parsed glob pattern.
std::vector<BitVector> Tokens;
// The following members are for optimization.
std::optional<StringRef> Exact;
std::optional<StringRef> Prefix;
std::optional<StringRef> Suffix;
};
}
#endif // LLVM_SUPPORT_GLOBPATTERN_H
PK hwFZ�k%� Support/MSP430AttributeParser.hnu �[��� //===-- MSP430AttributeParser.h - MSP430 Attribute Parser -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file contains support routines for parsing MSP430 ELF build attributes.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_MSP430ATTRIBUTEPARSER_H
#define LLVM_SUPPORT_MSP430ATTRIBUTEPARSER_H
#include "llvm/Support/ELFAttributeParser.h"
#include "llvm/Support/MSP430Attributes.h"
namespace llvm {
class MSP430AttributeParser : public ELFAttributeParser {
struct DisplayHandler {
MSP430Attrs::AttrType Attribute;
Error (MSP430AttributeParser::*Routine)(MSP430Attrs::AttrType);
};
static const std::array<DisplayHandler, 4> DisplayRoutines;
Error parseISA(MSP430Attrs::AttrType Tag);
Error parseCodeModel(MSP430Attrs::AttrType Tag);
Error parseDataModel(MSP430Attrs::AttrType Tag);
Error parseEnumSize(MSP430Attrs::AttrType Tag);
Error handler(uint64_t Tag, bool &Handled) override;
public:
MSP430AttributeParser(ScopedPrinter *SW)
: ELFAttributeParser(SW, MSP430Attrs::getMSP430AttributeTags(),
"mspabi") {}
MSP430AttributeParser()
: ELFAttributeParser(MSP430Attrs::getMSP430AttributeTags(), "mspabi") {}
};
} // namespace llvm
#endif
PK hwFZK����% �% Support/Process.hnu �[��� //===- llvm/Support/Process.h -----------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
///
/// Provides a library for accessing information about this process and other
/// processes on the operating system. Also provides means of spawning
/// subprocess for commands. The design of this library is modeled after the
/// proposed design of the Boost.Process library, and is design specifically to
/// follow the style of standard libraries and potentially become a proposal
/// for a standard library.
///
/// This file declares the llvm::sys::Process class which contains a collection
/// of legacy static interfaces for extracting various information about the
/// current process. The goal is to migrate users of this API over to the new
/// interfaces.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_PROCESS_H
#define LLVM_SUPPORT_PROCESS_H
#include "llvm/Support/Chrono.h"
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/Program.h"
#include <optional>
#include <system_error>
namespace llvm {
template <typename T> class ArrayRef;
class StringRef;
namespace sys {
/// A collection of legacy interfaces for querying information about the
/// current executing process.
class Process {
public:
using Pid = int32_t;
/// Get the process's identifier.
static Pid getProcessId();
/// Get the process's page size.
/// This may fail if the underlying syscall returns an error. In most cases,
/// page size information is used for optimization, and this error can be
/// safely discarded by calling consumeError, and an estimated page size
/// substituted instead.
static Expected<unsigned> getPageSize();
/// Get the process's estimated page size.
/// This function always succeeds, but if the underlying syscall to determine
/// the page size fails then this will silently return an estimated page size.
/// The estimated page size is guaranteed to be a power of 2.
static unsigned getPageSizeEstimate() {
if (auto PageSize = getPageSize())
return *PageSize;
else {
consumeError(PageSize.takeError());
return 4096;
}
}
/// Return process memory usage.
/// This static function will return the total amount of memory allocated
/// by the process. This only counts the memory allocated via the malloc,
/// calloc and realloc functions and includes any "free" holes in the
/// allocated space.
static size_t GetMallocUsage();
/// This static function will set \p user_time to the amount of CPU time
/// spent in user (non-kernel) mode and \p sys_time to the amount of CPU
/// time spent in system (kernel) mode. If the operating system does not
/// support collection of these metrics, a zero duration will be for both
/// values.
/// \param elapsed Returns the system_clock::now() giving current time
/// \param user_time Returns the current amount of user time for the process
/// \param sys_time Returns the current amount of system time for the process
static void GetTimeUsage(TimePoint<> &elapsed,
std::chrono::nanoseconds &user_time,
std::chrono::nanoseconds &sys_time);
/// This function makes the necessary calls to the operating system to
/// prevent core files or any other kind of large memory dumps that can
/// occur when a program fails.
/// Prevent core file generation.
static void PreventCoreFiles();
/// true if PreventCoreFiles has been called, false otherwise.
static bool AreCoreFilesPrevented();
// This function returns the environment variable \arg name's value as a UTF-8
// string. \arg Name is assumed to be in UTF-8 encoding too.
static std::optional<std::string> GetEnv(StringRef name);
/// This function searches for an existing file in the list of directories
/// in a PATH like environment variable, and returns the first file found,
/// according to the order of the entries in the PATH like environment
/// variable. If an ignore list is specified, then any folder which is in
/// the PATH like environment variable but is also in IgnoreList is not
/// considered.
static std::optional<std::string>
FindInEnvPath(StringRef EnvName, StringRef FileName,
ArrayRef<std::string> IgnoreList,
char Separator = EnvPathSeparator);
static std::optional<std::string>
FindInEnvPath(StringRef EnvName, StringRef FileName,
char Separator = EnvPathSeparator);
// This functions ensures that the standard file descriptors (input, output,
// and error) are properly mapped to a file descriptor before we use any of
// them. This should only be called by standalone programs, library
// components should not call this.
static std::error_code FixupStandardFileDescriptors();
// This function safely closes a file descriptor. It is not safe to retry
// close(2) when it returns with errno equivalent to EINTR; this is because
// *nixen cannot agree if the file descriptor is, in fact, closed when this
// occurs.
//
// N.B. Some operating systems, due to thread cancellation, cannot properly
// guarantee that it will or will not be closed one way or the other!
static std::error_code SafelyCloseFileDescriptor(int FD);
/// This function determines if the standard input is connected directly
/// to a user's input (keyboard probably), rather than coming from a file
/// or pipe.
static bool StandardInIsUserInput();
/// This function determines if the standard output is connected to a
/// "tty" or "console" window. That is, the output would be displayed to
/// the user rather than being put on a pipe or stored in a file.
static bool StandardOutIsDisplayed();
/// This function determines if the standard error is connected to a
/// "tty" or "console" window. That is, the output would be displayed to
/// the user rather than being put on a pipe or stored in a file.
static bool StandardErrIsDisplayed();
/// This function determines if the given file descriptor is connected to
/// a "tty" or "console" window. That is, the output would be displayed to
/// the user rather than being put on a pipe or stored in a file.
static bool FileDescriptorIsDisplayed(int fd);
/// This function determines if the given file descriptor is displayd and
/// supports colors.
static bool FileDescriptorHasColors(int fd);
/// This function determines the number of columns in the window
/// if standard output is connected to a "tty" or "console"
/// window. If standard output is not connected to a tty or
/// console, or if the number of columns cannot be determined,
/// this routine returns zero.
static unsigned StandardOutColumns();
/// This function determines the number of columns in the window
/// if standard error is connected to a "tty" or "console"
/// window. If standard error is not connected to a tty or
/// console, or if the number of columns cannot be determined,
/// this routine returns zero.
static unsigned StandardErrColumns();
/// This function determines whether the terminal connected to standard
/// output supports colors. If standard output is not connected to a
/// terminal, this function returns false.
static bool StandardOutHasColors();
/// This function determines whether the terminal connected to standard
/// error supports colors. If standard error is not connected to a
/// terminal, this function returns false.
static bool StandardErrHasColors();
/// Enables or disables whether ANSI escape sequences are used to output
/// colors. This only has an effect on Windows.
/// Note: Setting this option is not thread-safe and should only be done
/// during initialization.
static void UseANSIEscapeCodes(bool enable);
/// Whether changing colors requires the output to be flushed.
/// This is needed on systems that don't support escape sequences for
/// changing colors.
static bool ColorNeedsFlush();
/// This function returns the colorcode escape sequences.
/// If ColorNeedsFlush() is true then this function will change the colors
/// and return an empty escape sequence. In that case it is the
/// responsibility of the client to flush the output stream prior to
/// calling this function.
static const char *OutputColor(char c, bool bold, bool bg);
/// Same as OutputColor, but only enables the bold attribute.
static const char *OutputBold(bool bg);
/// This function returns the escape sequence to reverse forground and
/// background colors.
static const char *OutputReverse();
/// Resets the terminals colors, or returns an escape sequence to do so.
static const char *ResetColor();
/// Get the result of a process wide random number generator. The
/// generator will be automatically seeded in non-deterministic fashion.
static unsigned GetRandomNumber();
/// Equivalent to ::exit(), except when running inside a CrashRecoveryContext.
/// In that case, the control flow will resume after RunSafely(), like for a
/// crash, rather than exiting the current process.
/// Use \arg NoCleanup for calling _exit() instead of exit().
[[noreturn]] static void Exit(int RetCode, bool NoCleanup = false);
private:
[[noreturn]] static void ExitNoCleanup(int RetCode);
};
}
}
#endif
PK hwFZ1!��J J Support/SHA1.hnu �[��� //==- SHA1.h - SHA1 implementation for LLVM --*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// This code is taken from public domain
// (http://oauth.googlecode.com/svn/code/c/liboauth/src/sha1.c)
// and modified by wrapping it in a C++ interface for LLVM,
// and removing unnecessary code.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_SHA1_H
#define LLVM_SUPPORT_SHA1_H
#include <array>
#include <cstdint>
namespace llvm {
template <typename T> class ArrayRef;
class StringRef;
/// A class that wrap the SHA1 algorithm.
class SHA1 {
public:
SHA1() { init(); }
/// Reinitialize the internal state
void init();
/// Digest more data.
void update(ArrayRef<uint8_t> Data);
/// Digest more data.
void update(StringRef Str);
/// Return the current raw 160-bits SHA1 for the digested data
/// since the last call to init(). This call will add data to the internal
/// state and as such is not suited for getting an intermediate result
/// (see result()).
std::array<uint8_t, 20> final();
/// Return the current raw 160-bits SHA1 for the digested data
/// since the last call to init(). This is suitable for getting the SHA1 at
/// any time without invalidating the internal state so that more calls can be
/// made into update.
std::array<uint8_t, 20> result();
/// Returns a raw 160-bit SHA1 hash for the given data.
static std::array<uint8_t, 20> hash(ArrayRef<uint8_t> Data);
private:
/// Define some constants.
/// "static constexpr" would be cleaner but MSVC does not support it yet.
enum { BLOCK_LENGTH = 64 };
enum { HASH_LENGTH = 20 };
// Internal State
struct {
union {
uint8_t C[BLOCK_LENGTH];
uint32_t L[BLOCK_LENGTH / 4];
} Buffer;
uint32_t State[HASH_LENGTH / 4];
uint32_t ByteCount;
uint8_t BufferOffset;
} InternalState;
// Helper
void writebyte(uint8_t data);
void hashBlock();
void addUncounted(uint8_t data);
void pad();
void final(std::array<uint32_t, HASH_LENGTH / 4> &HashResult);
};
} // end llvm namespace
#endif
PK hwFZ��I��
�
Support/FormatAdapters.hnu �[��� //===- FormatAdapters.h - Formatters for common LLVM types -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_FORMATADAPTERS_H
#define LLVM_SUPPORT_FORMATADAPTERS_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/FormatCommon.h"
#include "llvm/Support/FormatVariadicDetails.h"
#include "llvm/Support/raw_ostream.h"
namespace llvm {
template <typename T> class FormatAdapter : public detail::format_adapter {
protected:
explicit FormatAdapter(T &&Item) : Item(std::forward<T>(Item)) {}
T Item;
};
namespace detail {
template <typename T> class AlignAdapter final : public FormatAdapter<T> {
AlignStyle Where;
size_t Amount;
char Fill;
public:
AlignAdapter(T &&Item, AlignStyle Where, size_t Amount, char Fill)
: FormatAdapter<T>(std::forward<T>(Item)), Where(Where), Amount(Amount),
Fill(Fill) {}
void format(llvm::raw_ostream &Stream, StringRef Style) override {
auto Adapter = detail::build_format_adapter(std::forward<T>(this->Item));
FmtAlign(Adapter, Where, Amount, Fill).format(Stream, Style);
}
};
template <typename T> class PadAdapter final : public FormatAdapter<T> {
size_t Left;
size_t Right;
public:
PadAdapter(T &&Item, size_t Left, size_t Right)
: FormatAdapter<T>(std::forward<T>(Item)), Left(Left), Right(Right) {}
void format(llvm::raw_ostream &Stream, StringRef Style) override {
auto Adapter = detail::build_format_adapter(std::forward<T>(this->Item));
Stream.indent(Left);
Adapter.format(Stream, Style);
Stream.indent(Right);
}
};
template <typename T> class RepeatAdapter final : public FormatAdapter<T> {
size_t Count;
public:
RepeatAdapter(T &&Item, size_t Count)
: FormatAdapter<T>(std::forward<T>(Item)), Count(Count) {}
void format(llvm::raw_ostream &Stream, StringRef Style) override {
auto Adapter = detail::build_format_adapter(std::forward<T>(this->Item));
for (size_t I = 0; I < Count; ++I) {
Adapter.format(Stream, Style);
}
}
};
class ErrorAdapter : public FormatAdapter<Error> {
public:
ErrorAdapter(Error &&Item) : FormatAdapter(std::move(Item)) {}
ErrorAdapter(ErrorAdapter &&) = default;
~ErrorAdapter() { consumeError(std::move(Item)); }
void format(llvm::raw_ostream &Stream, StringRef Style) override {
Stream << Item;
}
};
}
template <typename T>
detail::AlignAdapter<T> fmt_align(T &&Item, AlignStyle Where, size_t Amount,
char Fill = ' ') {
return detail::AlignAdapter<T>(std::forward<T>(Item), Where, Amount, Fill);
}
template <typename T>
detail::PadAdapter<T> fmt_pad(T &&Item, size_t Left, size_t Right) {
return detail::PadAdapter<T>(std::forward<T>(Item), Left, Right);
}
template <typename T>
detail::RepeatAdapter<T> fmt_repeat(T &&Item, size_t Count) {
return detail::RepeatAdapter<T>(std::forward<T>(Item), Count);
}
// llvm::Error values must be consumed before being destroyed.
// Wrapping an error in fmt_consume explicitly indicates that the formatv_object
// should take ownership and consume it.
inline detail::ErrorAdapter fmt_consume(Error &&Item) {
return detail::ErrorAdapter(std::move(Item));
}
}
#endif
PK hwFZ����lf lf Support/ScopedPrinter.hnu �[��� //===-- ScopedPrinter.h ----------------------------------------*- C++ -*--===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_SCOPEDPRINTER_H
#define LLVM_SUPPORT_SCOPEDPRINTER_H
#include "llvm/ADT/APSInt.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/JSON.h"
#include "llvm/Support/raw_ostream.h"
namespace llvm {
template <typename T> struct EnumEntry {
StringRef Name;
// While Name suffices in most of the cases, in certain cases
// GNU style and LLVM style of ELFDumper do not
// display same string for same enum. The AltName if initialized appropriately
// will hold the string that GNU style emits.
// Example:
// "EM_X86_64" string on LLVM style for Elf_Ehdr->e_machine corresponds to
// "Advanced Micro Devices X86-64" on GNU style
StringRef AltName;
T Value;
constexpr EnumEntry(StringRef N, StringRef A, T V)
: Name(N), AltName(A), Value(V) {}
constexpr EnumEntry(StringRef N, T V) : Name(N), AltName(N), Value(V) {}
};
struct HexNumber {
// To avoid sign-extension we have to explicitly cast to the appropriate
// unsigned type. The overloads are here so that every type that is implicitly
// convertible to an integer (including enums and endian helpers) can be used
// without requiring type traits or call-site changes.
HexNumber(char Value) : Value(static_cast<unsigned char>(Value)) {}
HexNumber(signed char Value) : Value(static_cast<unsigned char>(Value)) {}
HexNumber(signed short Value) : Value(static_cast<unsigned short>(Value)) {}
HexNumber(signed int Value) : Value(static_cast<unsigned int>(Value)) {}
HexNumber(signed long Value) : Value(static_cast<unsigned long>(Value)) {}
HexNumber(signed long long Value)
: Value(static_cast<unsigned long long>(Value)) {}
HexNumber(unsigned char Value) : Value(Value) {}
HexNumber(unsigned short Value) : Value(Value) {}
HexNumber(unsigned int Value) : Value(Value) {}
HexNumber(unsigned long Value) : Value(Value) {}
HexNumber(unsigned long long Value) : Value(Value) {}
uint64_t Value;
};
struct FlagEntry {
FlagEntry(StringRef Name, char Value)
: Name(Name), Value(static_cast<unsigned char>(Value)) {}
FlagEntry(StringRef Name, signed char Value)
: Name(Name), Value(static_cast<unsigned char>(Value)) {}
FlagEntry(StringRef Name, signed short Value)
: Name(Name), Value(static_cast<unsigned short>(Value)) {}
FlagEntry(StringRef Name, signed int Value)
: Name(Name), Value(static_cast<unsigned int>(Value)) {}
FlagEntry(StringRef Name, signed long Value)
: Name(Name), Value(static_cast<unsigned long>(Value)) {}
FlagEntry(StringRef Name, signed long long Value)
: Name(Name), Value(static_cast<unsigned long long>(Value)) {}
FlagEntry(StringRef Name, unsigned char Value) : Name(Name), Value(Value) {}
FlagEntry(StringRef Name, unsigned short Value) : Name(Name), Value(Value) {}
FlagEntry(StringRef Name, unsigned int Value) : Name(Name), Value(Value) {}
FlagEntry(StringRef Name, unsigned long Value) : Name(Name), Value(Value) {}
FlagEntry(StringRef Name, unsigned long long Value)
: Name(Name), Value(Value) {}
StringRef Name;
uint64_t Value;
};
raw_ostream &operator<<(raw_ostream &OS, const HexNumber &Value);
template <class T> std::string to_string(const T &Value) {
std::string number;
raw_string_ostream stream(number);
stream << Value;
return stream.str();
}
template <typename T, typename TEnum>
std::string enumToString(T Value, ArrayRef<EnumEntry<TEnum>> EnumValues) {
for (const EnumEntry<TEnum> &EnumItem : EnumValues)
if (EnumItem.Value == Value)
return std::string(EnumItem.AltName);
return utohexstr(Value, true);
}
class ScopedPrinter {
public:
enum class ScopedPrinterKind {
Base,
JSON,
};
ScopedPrinter(raw_ostream &OS,
ScopedPrinterKind Kind = ScopedPrinterKind::Base)
: OS(OS), Kind(Kind) {}
ScopedPrinterKind getKind() const { return Kind; }
static bool classof(const ScopedPrinter *SP) {
return SP->getKind() == ScopedPrinterKind::Base;
}
virtual ~ScopedPrinter() = default;
void flush() { OS.flush(); }
void indent(int Levels = 1) { IndentLevel += Levels; }
void unindent(int Levels = 1) {
IndentLevel = IndentLevel > Levels ? IndentLevel - Levels : 0;
}
void resetIndent() { IndentLevel = 0; }
int getIndentLevel() { return IndentLevel; }
void setPrefix(StringRef P) { Prefix = P; }
void printIndent() {
OS << Prefix;
for (int i = 0; i < IndentLevel; ++i)
OS << " ";
}
template <typename T> HexNumber hex(T Value) { return HexNumber(Value); }
template <typename T, typename TEnum>
void printEnum(StringRef Label, T Value,
ArrayRef<EnumEntry<TEnum>> EnumValues) {
StringRef Name;
bool Found = false;
for (const auto &EnumItem : EnumValues) {
if (EnumItem.Value == Value) {
Name = EnumItem.Name;
Found = true;
break;
}
}
if (Found)
printHex(Label, Name, Value);
else
printHex(Label, Value);
}
template <typename T, typename TFlag>
void printFlags(StringRef Label, T Value, ArrayRef<EnumEntry<TFlag>> Flags,
TFlag EnumMask1 = {}, TFlag EnumMask2 = {},
TFlag EnumMask3 = {}) {
SmallVector<FlagEntry, 10> SetFlags;
for (const auto &Flag : Flags) {
if (Flag.Value == 0)
continue;
TFlag EnumMask{};
if (Flag.Value & EnumMask1)
EnumMask = EnumMask1;
else if (Flag.Value & EnumMask2)
EnumMask = EnumMask2;
else if (Flag.Value & EnumMask3)
EnumMask = EnumMask3;
bool IsEnum = (Flag.Value & EnumMask) != 0;
if ((!IsEnum && (Value & Flag.Value) == Flag.Value) ||
(IsEnum && (Value & EnumMask) == Flag.Value)) {
SetFlags.emplace_back(Flag.Name, Flag.Value);
}
}
llvm::sort(SetFlags, &flagName);
printFlagsImpl(Label, hex(Value), SetFlags);
}
template <typename T> void printFlags(StringRef Label, T Value) {
SmallVector<HexNumber, 10> SetFlags;
uint64_t Flag = 1;
uint64_t Curr = Value;
while (Curr > 0) {
if (Curr & 1)
SetFlags.emplace_back(Flag);
Curr >>= 1;
Flag <<= 1;
}
printFlagsImpl(Label, hex(Value), SetFlags);
}
virtual void printNumber(StringRef Label, char Value) {
startLine() << Label << ": " << static_cast<int>(Value) << "\n";
}
virtual void printNumber(StringRef Label, signed char Value) {
startLine() << Label << ": " << static_cast<int>(Value) << "\n";
}
virtual void printNumber(StringRef Label, unsigned char Value) {
startLine() << Label << ": " << static_cast<unsigned>(Value) << "\n";
}
virtual void printNumber(StringRef Label, short Value) {
startLine() << Label << ": " << Value << "\n";
}
virtual void printNumber(StringRef Label, unsigned short Value) {
startLine() << Label << ": " << Value << "\n";
}
virtual void printNumber(StringRef Label, int Value) {
startLine() << Label << ": " << Value << "\n";
}
virtual void printNumber(StringRef Label, unsigned int Value) {
startLine() << Label << ": " << Value << "\n";
}
virtual void printNumber(StringRef Label, long Value) {
startLine() << Label << ": " << Value << "\n";
}
virtual void printNumber(StringRef Label, unsigned long Value) {
startLine() << Label << ": " << Value << "\n";
}
virtual void printNumber(StringRef Label, long long Value) {
startLine() << Label << ": " << Value << "\n";
}
virtual void printNumber(StringRef Label, unsigned long long Value) {
startLine() << Label << ": " << Value << "\n";
}
virtual void printNumber(StringRef Label, const APSInt &Value) {
startLine() << Label << ": " << Value << "\n";
}
virtual void printNumber(StringRef Label, float Value) {
startLine() << Label << ": " << format("%5.1f", Value) << "\n";
}
virtual void printNumber(StringRef Label, double Value) {
startLine() << Label << ": " << format("%5.1f", Value) << "\n";
}
template <typename T>
void printNumber(StringRef Label, StringRef Str, T Value) {
printNumberImpl(Label, Str, to_string(Value));
}
virtual void printBoolean(StringRef Label, bool Value) {
startLine() << Label << ": " << (Value ? "Yes" : "No") << '\n';
}
template <typename... T> void printVersion(StringRef Label, T... Version) {
startLine() << Label << ": ";
printVersionInternal(Version...);
getOStream() << "\n";
}
template <typename T>
void printList(StringRef Label, const ArrayRef<T> List) {
SmallVector<std::string, 10> StringList;
for (const auto &Item : List)
StringList.emplace_back(to_string(Item));
printList(Label, StringList);
}
virtual void printList(StringRef Label, const ArrayRef<bool> List) {
printListImpl(Label, List);
}
virtual void printList(StringRef Label, const ArrayRef<std::string> List) {
printListImpl(Label, List);
}
virtual void printList(StringRef Label, const ArrayRef<uint64_t> List) {
printListImpl(Label, List);
}
virtual void printList(StringRef Label, const ArrayRef<uint32_t> List) {
printListImpl(Label, List);
}
virtual void printList(StringRef Label, const ArrayRef<uint16_t> List) {
printListImpl(Label, List);
}
virtual void printList(StringRef Label, const ArrayRef<uint8_t> List) {
SmallVector<unsigned> NumberList;
for (const uint8_t &Item : List)
NumberList.emplace_back(Item);
printListImpl(Label, NumberList);
}
virtual void printList(StringRef Label, const ArrayRef<int64_t> List) {
printListImpl(Label, List);
}
virtual void printList(StringRef Label, const ArrayRef<int32_t> List) {
printListImpl(Label, List);
}
virtual void printList(StringRef Label, const ArrayRef<int16_t> List) {
printListImpl(Label, List);
}
virtual void printList(StringRef Label, const ArrayRef<int8_t> List) {
SmallVector<int> NumberList;
for (const int8_t &Item : List)
NumberList.emplace_back(Item);
printListImpl(Label, NumberList);
}
virtual void printList(StringRef Label, const ArrayRef<APSInt> List) {
printListImpl(Label, List);
}
template <typename T, typename U>
void printList(StringRef Label, const T &List, const U &Printer) {
startLine() << Label << ": [";
ListSeparator LS;
for (const auto &Item : List) {
OS << LS;
Printer(OS, Item);
}
OS << "]\n";
}
template <typename T> void printHexList(StringRef Label, const T &List) {
SmallVector<HexNumber> HexList;
for (const auto &Item : List)
HexList.emplace_back(Item);
printHexListImpl(Label, HexList);
}
template <typename T> void printHex(StringRef Label, T Value) {
printHexImpl(Label, hex(Value));
}
template <typename T> void printHex(StringRef Label, StringRef Str, T Value) {
printHexImpl(Label, Str, hex(Value));
}
template <typename T>
void printSymbolOffset(StringRef Label, StringRef Symbol, T Value) {
printSymbolOffsetImpl(Label, Symbol, hex(Value));
}
virtual void printString(StringRef Value) { startLine() << Value << "\n"; }
virtual void printString(StringRef Label, StringRef Value) {
startLine() << Label << ": " << Value << "\n";
}
void printStringEscaped(StringRef Label, StringRef Value) {
printStringEscapedImpl(Label, Value);
}
void printBinary(StringRef Label, StringRef Str, ArrayRef<uint8_t> Value) {
printBinaryImpl(Label, Str, Value, false);
}
void printBinary(StringRef Label, StringRef Str, ArrayRef<char> Value) {
auto V =
ArrayRef(reinterpret_cast<const uint8_t *>(Value.data()), Value.size());
printBinaryImpl(Label, Str, V, false);
}
void printBinary(StringRef Label, ArrayRef<uint8_t> Value) {
printBinaryImpl(Label, StringRef(), Value, false);
}
void printBinary(StringRef Label, ArrayRef<char> Value) {
auto V =
ArrayRef(reinterpret_cast<const uint8_t *>(Value.data()), Value.size());
printBinaryImpl(Label, StringRef(), V, false);
}
void printBinary(StringRef Label, StringRef Value) {
auto V =
ArrayRef(reinterpret_cast<const uint8_t *>(Value.data()), Value.size());
printBinaryImpl(Label, StringRef(), V, false);
}
void printBinaryBlock(StringRef Label, ArrayRef<uint8_t> Value,
uint32_t StartOffset) {
printBinaryImpl(Label, StringRef(), Value, true, StartOffset);
}
void printBinaryBlock(StringRef Label, ArrayRef<uint8_t> Value) {
printBinaryImpl(Label, StringRef(), Value, true);
}
void printBinaryBlock(StringRef Label, StringRef Value) {
auto V =
ArrayRef(reinterpret_cast<const uint8_t *>(Value.data()), Value.size());
printBinaryImpl(Label, StringRef(), V, true);
}
template <typename T> void printObject(StringRef Label, const T &Value) {
printString(Label, to_string(Value));
}
virtual void objectBegin() { scopedBegin('{'); }
virtual void objectBegin(StringRef Label) { scopedBegin(Label, '{'); }
virtual void objectEnd() { scopedEnd('}'); }
virtual void arrayBegin() { scopedBegin('['); }
virtual void arrayBegin(StringRef Label) { scopedBegin(Label, '['); }
virtual void arrayEnd() { scopedEnd(']'); }
virtual raw_ostream &startLine() {
printIndent();
return OS;
}
virtual raw_ostream &getOStream() { return OS; }
private:
template <typename T> void printVersionInternal(T Value) {
getOStream() << Value;
}
template <typename S, typename T, typename... TArgs>
void printVersionInternal(S Value, T Value2, TArgs... Args) {
getOStream() << Value << ".";
printVersionInternal(Value2, Args...);
}
static bool flagName(const FlagEntry &LHS, const FlagEntry &RHS) {
return LHS.Name < RHS.Name;
}
virtual void printBinaryImpl(StringRef Label, StringRef Str,
ArrayRef<uint8_t> Value, bool Block,
uint32_t StartOffset = 0);
virtual void printFlagsImpl(StringRef Label, HexNumber Value,
ArrayRef<FlagEntry> Flags) {
startLine() << Label << " [ (" << Value << ")\n";
for (const auto &Flag : Flags)
startLine() << " " << Flag.Name << " (" << hex(Flag.Value) << ")\n";
startLine() << "]\n";
}
virtual void printFlagsImpl(StringRef Label, HexNumber Value,
ArrayRef<HexNumber> Flags) {
startLine() << Label << " [ (" << Value << ")\n";
for (const auto &Flag : Flags)
startLine() << " " << Flag << '\n';
startLine() << "]\n";
}
template <typename T> void printListImpl(StringRef Label, const T List) {
startLine() << Label << ": [";
ListSeparator LS;
for (const auto &Item : List)
OS << LS << Item;
OS << "]\n";
}
virtual void printHexListImpl(StringRef Label,
const ArrayRef<HexNumber> List) {
startLine() << Label << ": [";
ListSeparator LS;
for (const auto &Item : List)
OS << LS << hex(Item);
OS << "]\n";
}
virtual void printHexImpl(StringRef Label, HexNumber Value) {
startLine() << Label << ": " << Value << "\n";
}
virtual void printHexImpl(StringRef Label, StringRef Str, HexNumber Value) {
startLine() << Label << ": " << Str << " (" << Value << ")\n";
}
virtual void printSymbolOffsetImpl(StringRef Label, StringRef Symbol,
HexNumber Value) {
startLine() << Label << ": " << Symbol << '+' << Value << '\n';
}
virtual void printNumberImpl(StringRef Label, StringRef Str,
StringRef Value) {
startLine() << Label << ": " << Str << " (" << Value << ")\n";
}
virtual void printStringEscapedImpl(StringRef Label, StringRef Value) {
startLine() << Label << ": ";
OS.write_escaped(Value);
OS << '\n';
}
void scopedBegin(char Symbol) {
startLine() << Symbol << '\n';
indent();
}
void scopedBegin(StringRef Label, char Symbol) {
startLine() << Label;
if (!Label.empty())
OS << ' ';
OS << Symbol << '\n';
indent();
}
void scopedEnd(char Symbol) {
unindent();
startLine() << Symbol << '\n';
}
raw_ostream &OS;
int IndentLevel = 0;
StringRef Prefix;
ScopedPrinterKind Kind;
};
template <>
inline void
ScopedPrinter::printHex<support::ulittle16_t>(StringRef Label,
support::ulittle16_t Value) {
startLine() << Label << ": " << hex(Value) << "\n";
}
struct DelimitedScope;
class JSONScopedPrinter : public ScopedPrinter {
private:
enum class Scope {
Array,
Object,
};
enum class ScopeKind {
NoAttribute,
Attribute,
NestedAttribute,
};
struct ScopeContext {
Scope Context;
ScopeKind Kind;
ScopeContext(Scope Context, ScopeKind Kind = ScopeKind::NoAttribute)
: Context(Context), Kind(Kind) {}
};
SmallVector<ScopeContext, 8> ScopeHistory;
json::OStream JOS;
std::unique_ptr<DelimitedScope> OuterScope;
public:
JSONScopedPrinter(raw_ostream &OS, bool PrettyPrint = false,
std::unique_ptr<DelimitedScope> &&OuterScope =
std::unique_ptr<DelimitedScope>{});
static bool classof(const ScopedPrinter *SP) {
return SP->getKind() == ScopedPrinter::ScopedPrinterKind::JSON;
}
void printNumber(StringRef Label, char Value) override {
JOS.attribute(Label, Value);
}
void printNumber(StringRef Label, signed char Value) override {
JOS.attribute(Label, Value);
}
void printNumber(StringRef Label, unsigned char Value) override {
JOS.attribute(Label, Value);
}
void printNumber(StringRef Label, short Value) override {
JOS.attribute(Label, Value);
}
void printNumber(StringRef Label, unsigned short Value) override {
JOS.attribute(Label, Value);
}
void printNumber(StringRef Label, int Value) override {
JOS.attribute(Label, Value);
}
void printNumber(StringRef Label, unsigned int Value) override {
JOS.attribute(Label, Value);
}
void printNumber(StringRef Label, long Value) override {
JOS.attribute(Label, Value);
}
void printNumber(StringRef Label, unsigned long Value) override {
JOS.attribute(Label, Value);
}
void printNumber(StringRef Label, long long Value) override {
JOS.attribute(Label, Value);
}
void printNumber(StringRef Label, unsigned long long Value) override {
JOS.attribute(Label, Value);
}
void printNumber(StringRef Label, float Value) override {
JOS.attribute(Label, Value);
}
void printNumber(StringRef Label, double Value) override {
JOS.attribute(Label, Value);
}
void printNumber(StringRef Label, const APSInt &Value) override {
JOS.attributeBegin(Label);
printAPSInt(Value);
JOS.attributeEnd();
}
void printBoolean(StringRef Label, bool Value) override {
JOS.attribute(Label, Value);
}
void printList(StringRef Label, const ArrayRef<bool> List) override {
printListImpl(Label, List);
}
void printList(StringRef Label, const ArrayRef<std::string> List) override {
printListImpl(Label, List);
}
void printList(StringRef Label, const ArrayRef<uint64_t> List) override {
printListImpl(Label, List);
}
void printList(StringRef Label, const ArrayRef<uint32_t> List) override {
printListImpl(Label, List);
}
void printList(StringRef Label, const ArrayRef<uint16_t> List) override {
printListImpl(Label, List);
}
void printList(StringRef Label, const ArrayRef<uint8_t> List) override {
printListImpl(Label, List);
}
void printList(StringRef Label, const ArrayRef<int64_t> List) override {
printListImpl(Label, List);
}
void printList(StringRef Label, const ArrayRef<int32_t> List) override {
printListImpl(Label, List);
}
void printList(StringRef Label, const ArrayRef<int16_t> List) override {
printListImpl(Label, List);
}
void printList(StringRef Label, const ArrayRef<int8_t> List) override {
printListImpl(Label, List);
}
void printList(StringRef Label, const ArrayRef<APSInt> List) override {
JOS.attributeArray(Label, [&]() {
for (const APSInt &Item : List) {
printAPSInt(Item);
}
});
}
void printString(StringRef Value) override { JOS.value(Value); }
void printString(StringRef Label, StringRef Value) override {
JOS.attribute(Label, Value);
}
void objectBegin() override {
scopedBegin({Scope::Object, ScopeKind::NoAttribute});
}
void objectBegin(StringRef Label) override {
scopedBegin(Label, Scope::Object);
}
void objectEnd() override { scopedEnd(); }
void arrayBegin() override {
scopedBegin({Scope::Array, ScopeKind::NoAttribute});
}
void arrayBegin(StringRef Label) override {
scopedBegin(Label, Scope::Array);
}
void arrayEnd() override { scopedEnd(); }
private:
// Output HexNumbers as decimals so that they're easier to parse.
uint64_t hexNumberToInt(HexNumber Hex) { return Hex.Value; }
void printAPSInt(const APSInt &Value) {
JOS.rawValueBegin() << Value;
JOS.rawValueEnd();
}
void printFlagsImpl(StringRef Label, HexNumber Value,
ArrayRef<FlagEntry> Flags) override {
JOS.attributeObject(Label, [&]() {
JOS.attribute("Value", hexNumberToInt(Value));
JOS.attributeArray("Flags", [&]() {
for (const FlagEntry &Flag : Flags) {
JOS.objectBegin();
JOS.attribute("Name", Flag.Name);
JOS.attribute("Value", Flag.Value);
JOS.objectEnd();
}
});
});
}
void printFlagsImpl(StringRef Label, HexNumber Value,
ArrayRef<HexNumber> Flags) override {
JOS.attributeObject(Label, [&]() {
JOS.attribute("Value", hexNumberToInt(Value));
JOS.attributeArray("Flags", [&]() {
for (const HexNumber &Flag : Flags) {
JOS.value(Flag.Value);
}
});
});
}
template <typename T> void printListImpl(StringRef Label, const T &List) {
JOS.attributeArray(Label, [&]() {
for (const auto &Item : List)
JOS.value(Item);
});
}
void printHexListImpl(StringRef Label,
const ArrayRef<HexNumber> List) override {
JOS.attributeArray(Label, [&]() {
for (const HexNumber &Item : List) {
JOS.value(hexNumberToInt(Item));
}
});
}
void printHexImpl(StringRef Label, HexNumber Value) override {
JOS.attribute(Label, hexNumberToInt(Value));
}
void printHexImpl(StringRef Label, StringRef Str, HexNumber Value) override {
JOS.attributeObject(Label, [&]() {
JOS.attribute("Name", Str);
JOS.attribute("Value", hexNumberToInt(Value));
});
}
void printSymbolOffsetImpl(StringRef Label, StringRef Symbol,
HexNumber Value) override {
JOS.attributeObject(Label, [&]() {
JOS.attribute("SymName", Symbol);
JOS.attribute("Offset", hexNumberToInt(Value));
});
}
void printNumberImpl(StringRef Label, StringRef Str,
StringRef Value) override {
JOS.attributeObject(Label, [&]() {
JOS.attribute("Name", Str);
JOS.attributeBegin("Value");
JOS.rawValueBegin() << Value;
JOS.rawValueEnd();
JOS.attributeEnd();
});
}
void printBinaryImpl(StringRef Label, StringRef Str, ArrayRef<uint8_t> Value,
bool Block, uint32_t StartOffset = 0) override {
JOS.attributeObject(Label, [&]() {
if (!Str.empty())
JOS.attribute("Value", Str);
JOS.attribute("Offset", StartOffset);
JOS.attributeArray("Bytes", [&]() {
for (uint8_t Val : Value)
JOS.value(Val);
});
});
}
void scopedBegin(ScopeContext ScopeCtx) {
if (ScopeCtx.Context == Scope::Object)
JOS.objectBegin();
else if (ScopeCtx.Context == Scope::Array)
JOS.arrayBegin();
ScopeHistory.push_back(ScopeCtx);
}
void scopedBegin(StringRef Label, Scope Ctx) {
ScopeKind Kind = ScopeKind::Attribute;
if (ScopeHistory.empty() || ScopeHistory.back().Context != Scope::Object) {
JOS.objectBegin();
Kind = ScopeKind::NestedAttribute;
}
JOS.attributeBegin(Label);
scopedBegin({Ctx, Kind});
}
void scopedEnd() {
ScopeContext ScopeCtx = ScopeHistory.back();
if (ScopeCtx.Context == Scope::Object)
JOS.objectEnd();
else if (ScopeCtx.Context == Scope::Array)
JOS.arrayEnd();
if (ScopeCtx.Kind == ScopeKind::Attribute ||
ScopeCtx.Kind == ScopeKind::NestedAttribute)
JOS.attributeEnd();
if (ScopeCtx.Kind == ScopeKind::NestedAttribute)
JOS.objectEnd();
ScopeHistory.pop_back();
}
};
struct DelimitedScope {
DelimitedScope(ScopedPrinter &W) : W(&W) {}
DelimitedScope() : W(nullptr) {}
virtual ~DelimitedScope() = default;
virtual void setPrinter(ScopedPrinter &W) = 0;
ScopedPrinter *W;
};
struct DictScope : DelimitedScope {
explicit DictScope() = default;
explicit DictScope(ScopedPrinter &W) : DelimitedScope(W) { W.objectBegin(); }
DictScope(ScopedPrinter &W, StringRef N) : DelimitedScope(W) {
W.objectBegin(N);
}
void setPrinter(ScopedPrinter &W) override {
this->W = &W;
W.objectBegin();
}
~DictScope() {
if (W)
W->objectEnd();
}
};
struct ListScope : DelimitedScope {
explicit ListScope() = default;
explicit ListScope(ScopedPrinter &W) : DelimitedScope(W) { W.arrayBegin(); }
ListScope(ScopedPrinter &W, StringRef N) : DelimitedScope(W) {
W.arrayBegin(N);
}
void setPrinter(ScopedPrinter &W) override {
this->W = &W;
W.arrayBegin();
}
~ListScope() {
if (W)
W->arrayEnd();
}
};
} // namespace llvm
#endif
PK hwFZ9;��� � Support/ConvertEBCDIC.hnu �[��� //===--- ConvertEBCDIC.h - UTF8/EBCDIC CharSet Conversion -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file provides utility functions for converting between EBCDIC-1047 and
/// UTF-8.
///
///
//===----------------------------------------------------------------------===//
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include <system_error>
namespace llvm {
namespace ConverterEBCDIC {
std::error_code convertToEBCDIC(StringRef Source,
SmallVectorImpl<char> &Result);
void convertToUTF8(StringRef Source, SmallVectorImpl<char> &Result);
} // namespace ConverterEBCDIC
} // namespace llvm
PK hwFZe �� � Support/AlignOf.hnu �[��� //===--- AlignOf.h - Portable calculation of type alignment -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the AlignedCharArrayUnion class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_SUPPORT_ALIGNOF_H
#define LLVM_SUPPORT_ALIGNOF_H
#include <type_traits>
namespace llvm {
/// A suitably aligned and sized character array member which can hold elements
/// of any type.
///
/// This template is equivalent to std::aligned_union_t<1, ...>, but we cannot
/// use it due to a bug in the MSVC x86 compiler:
/// https://github.com/microsoft/STL/issues/1533
/// Using `alignas` here works around the bug.
template <typename T, typename... Ts> struct AlignedCharArrayUnion {
using AlignedUnion = std::aligned_union_t<1, T, Ts...>;
alignas(alignof(AlignedUnion)) char buffer[sizeof(AlignedUnion)];
};
} // end namespace llvm
#endif // LLVM_SUPPORT_ALIGNOF_H
PK hwFZP1�u u FileCheck/FileCheck.hnu �[��� //==-- llvm/FileCheck/FileCheck.h --------------------------------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file This file has some utilities to use FileCheck as an API
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_FILECHECK_FILECHECK_H
#define LLVM_FILECHECK_FILECHECK_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Regex.h"
#include "llvm/Support/SMLoc.h"
#include <bitset>
#include <memory>
#include <string>
#include <vector>
namespace llvm {
class MemoryBuffer;
class SourceMgr;
template <typename T> class SmallVectorImpl;
/// Contains info about various FileCheck options.
struct FileCheckRequest {
std::vector<StringRef> CheckPrefixes;
std::vector<StringRef> CommentPrefixes;
bool NoCanonicalizeWhiteSpace = false;
std::vector<StringRef> ImplicitCheckNot;
std::vector<StringRef> GlobalDefines;
bool AllowEmptyInput = false;
bool AllowUnusedPrefixes = false;
bool MatchFullLines = false;
bool IgnoreCase = false;
bool IsDefaultCheckPrefix = false;
bool EnableVarScope = false;
bool AllowDeprecatedDagOverlap = false;
bool Verbose = false;
bool VerboseVerbose = false;
};
namespace Check {
enum FileCheckKind {
CheckNone = 0,
CheckMisspelled,
CheckPlain,
CheckNext,
CheckSame,
CheckNot,
CheckDAG,
CheckLabel,
CheckEmpty,
CheckComment,
/// Indicates the pattern only matches the end of file. This is used for
/// trailing CHECK-NOTs.
CheckEOF,
/// Marks when parsing found a -NOT check combined with another CHECK suffix.
CheckBadNot,
/// Marks when parsing found a -COUNT directive with invalid count value.
CheckBadCount
};
enum FileCheckKindModifier {
/// Modifies directive to perform literal match.
ModifierLiteral = 0,
// The number of modifier.
Size
};
class FileCheckType {
FileCheckKind Kind;
int Count; ///< optional Count for some checks
/// Modifers for the check directive.
std::bitset<FileCheckKindModifier::Size> Modifiers;
public:
FileCheckType(FileCheckKind Kind = CheckNone) : Kind(Kind), Count(1) {}
FileCheckType(const FileCheckType &) = default;
FileCheckType &operator=(const FileCheckType &) = default;
operator FileCheckKind() const { return Kind; }
int getCount() const { return Count; }
FileCheckType &setCount(int C);
bool isLiteralMatch() const {
return Modifiers[FileCheckKindModifier::ModifierLiteral];
}
FileCheckType &setLiteralMatch(bool Literal = true) {
Modifiers.set(FileCheckKindModifier::ModifierLiteral, Literal);
return *this;
}
// \returns a description of \p Prefix.
std::string getDescription(StringRef Prefix) const;
// \returns a description of \p Modifiers.
std::string getModifiersDescription() const;
};
} // namespace Check
/// Summary of a FileCheck diagnostic.
struct FileCheckDiag {
/// What is the FileCheck directive for this diagnostic?
Check::FileCheckType CheckTy;
/// Where is the FileCheck directive for this diagnostic?
SMLoc CheckLoc;
/// What type of match result does this diagnostic describe?
///
/// A directive's supplied pattern is said to be either expected or excluded
/// depending on whether the pattern must have or must not have a match in
/// order for the directive to succeed. For example, a CHECK directive's
/// pattern is expected, and a CHECK-NOT directive's pattern is excluded.
///
/// There might be more than one match result for a single pattern. For
/// example, there might be several discarded matches
/// (MatchFoundButDiscarded) before either a good match
/// (MatchFoundAndExpected) or a failure to match (MatchNoneButExpected),
/// and there might be a fuzzy match (MatchFuzzy) after the latter.
enum MatchType {
/// Indicates a good match for an expected pattern.
MatchFoundAndExpected,
/// Indicates a match for an excluded pattern.
MatchFoundButExcluded,
/// Indicates a match for an expected pattern, but the match is on the
/// wrong line.
MatchFoundButWrongLine,
/// Indicates a discarded match for an expected pattern.
MatchFoundButDiscarded,
/// Indicates an error while processing a match after the match was found
/// for an expected or excluded pattern. The error is specified by \c Note,
/// to which it should be appropriate to prepend "error: " later. The full
/// match itself should be recorded in a preceding diagnostic of a different
/// \c MatchFound match type.
MatchFoundErrorNote,
/// Indicates no match for an excluded pattern.
MatchNoneAndExcluded,
/// Indicates no match for an expected pattern, but this might follow good
/// matches when multiple matches are expected for the pattern, or it might
/// follow discarded matches for the pattern.
MatchNoneButExpected,
/// Indicates no match due to an expected or excluded pattern that has
/// proven to be invalid at match time. The exact problems are usually
/// reported in subsequent diagnostics of the same match type but with
/// \c Note set.
MatchNoneForInvalidPattern,
/// Indicates a fuzzy match that serves as a suggestion for the next
/// intended match for an expected pattern with too few or no good matches.
MatchFuzzy,
} MatchTy;
/// The search range if MatchTy starts with MatchNone, or the match range
/// otherwise.
unsigned InputStartLine;
unsigned InputStartCol;
unsigned InputEndLine;
unsigned InputEndCol;
/// A note to replace the one normally indicated by MatchTy, or the empty
/// string if none.
std::string Note;
FileCheckDiag(const SourceMgr &SM, const Check::FileCheckType &CheckTy,
SMLoc CheckLoc, MatchType MatchTy, SMRange InputRange,
StringRef Note = "");
};
class FileCheckPatternContext;
struct FileCheckString;
/// FileCheck class takes the request and exposes various methods that
/// use information from the request.
class FileCheck {
FileCheckRequest Req;
std::unique_ptr<FileCheckPatternContext> PatternContext;
// C++17 TODO: make this a plain std::vector.
std::unique_ptr<std::vector<FileCheckString>> CheckStrings;
public:
explicit FileCheck(FileCheckRequest Req);
~FileCheck();
// Combines the check prefixes into a single regex so that we can efficiently
// scan for any of the set.
//
// The semantics are that the longest-match wins which matches our regex
// library.
Regex buildCheckPrefixRegex();
/// Reads the check file from \p Buffer and records the expected strings it
/// contains. Errors are reported against \p SM.
///
/// Only expected strings whose prefix is one of those listed in \p PrefixRE
/// are recorded. \returns true in case of an error, false otherwise.
///
/// If \p ImpPatBufferIDRange, then the range (inclusive start, exclusive end)
/// of IDs for source buffers added to \p SM for implicit patterns are
/// recorded in it. The range is empty if there are none.
bool
readCheckFile(SourceMgr &SM, StringRef Buffer, Regex &PrefixRE,
std::pair<unsigned, unsigned> *ImpPatBufferIDRange = nullptr);
bool ValidateCheckPrefixes();
/// Canonicalizes whitespaces in the file. Line endings are replaced with
/// UNIX-style '\n'.
StringRef CanonicalizeFile(MemoryBuffer &MB,
SmallVectorImpl<char> &OutputBuffer);
/// Checks the input to FileCheck provided in the \p Buffer against the
/// expected strings read from the check file and record diagnostics emitted
/// in \p Diags. Errors are recorded against \p SM.
///
/// \returns false if the input fails to satisfy the checks.
bool checkInput(SourceMgr &SM, StringRef Buffer,
std::vector<FileCheckDiag> *Diags = nullptr);
};
} // namespace llvm
#endif
PK hwFZ(�>� ( ToolDrivers/llvm-dlltool/DlltoolDriver.hnu �[��� //===- DlltoolDriver.h - dlltool.exe-compatible driver ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Defines an interface to a dlltool.exe-compatible driver.
// Used by llvm-dlltool.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TOOLDRIVERS_LLVM_DLLTOOL_DLLTOOLDRIVER_H
#define LLVM_TOOLDRIVERS_LLVM_DLLTOOL_DLLTOOLDRIVER_H
namespace llvm {
template <typename T> class ArrayRef;
int dlltoolDriverMain(ArrayRef<const char *> ArgsArr);
} // namespace llvm
#endif
PK hwFZ���� ToolDrivers/llvm-lib/LibDriver.hnu �[��� //===- llvm-lib/LibDriver.h - lib.exe-compatible driver ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Defines an interface to a lib.exe-compatible driver that also understands
// bitcode files. Used by llvm-lib and lld-link /lib.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TOOLDRIVERS_LLVM_LIB_LIBDRIVER_H
#define LLVM_TOOLDRIVERS_LLVM_LIB_LIBDRIVER_H
namespace llvm {
template <typename T> class ArrayRef;
int libDriverMain(ArrayRef<const char *> ARgs);
}
#endif
PK hwFZ�A(b b IRReader/IRReader.hnu �[��� //===---- llvm/IRReader/IRReader.h - Reader for LLVM IR files ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines functions for reading LLVM IR. They support both
// Bitcode and Assembly, automatically detecting the input format.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_IRREADER_IRREADER_H
#define LLVM_IRREADER_IRREADER_H
#include "llvm/ADT/STLFunctionalExtras.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Bitcode/BitcodeReader.h"
#include <memory>
#include <optional>
namespace llvm {
class MemoryBuffer;
class MemoryBufferRef;
class Module;
class SMDiagnostic;
class LLVMContext;
/// If the given MemoryBuffer holds a bitcode image, return a Module
/// for it which does lazy deserialization of function bodies. Otherwise,
/// attempt to parse it as LLVM Assembly and return a fully populated
/// Module. The ShouldLazyLoadMetadata flag is passed down to the bitcode
/// reader to optionally enable lazy metadata loading. This takes ownership
/// of \p Buffer.
std::unique_ptr<Module> getLazyIRModule(std::unique_ptr<MemoryBuffer> Buffer,
SMDiagnostic &Err, LLVMContext &Context,
bool ShouldLazyLoadMetadata = false);
/// If the given file holds a bitcode image, return a Module
/// for it which does lazy deserialization of function bodies. Otherwise,
/// attempt to parse it as LLVM Assembly and return a fully populated
/// Module. The ShouldLazyLoadMetadata flag is passed down to the bitcode
/// reader to optionally enable lazy metadata loading.
std::unique_ptr<Module>
getLazyIRFileModule(StringRef Filename, SMDiagnostic &Err, LLVMContext &Context,
bool ShouldLazyLoadMetadata = false);
/// If the given MemoryBuffer holds a bitcode image, return a Module
/// for it. Otherwise, attempt to parse it as LLVM Assembly and return
/// a Module for it.
/// \param DataLayoutCallback Override datalayout in the llvm assembly.
std::unique_ptr<Module> parseIR(MemoryBufferRef Buffer, SMDiagnostic &Err,
LLVMContext &Context,
ParserCallbacks Callbacks = {});
/// If the given file holds a bitcode image, return a Module for it.
/// Otherwise, attempt to parse it as LLVM Assembly and return a Module
/// for it.
/// \param DataLayoutCallback Override datalayout in the llvm assembly.
std::unique_ptr<Module> parseIRFile(StringRef Filename, SMDiagnostic &Err,
LLVMContext &Context,
ParserCallbacks Callbacks = {});
}
#endif
PK hwFZF�6�! ! TextAPI/TextAPIReader.hnu �[��� //===--- TextAPIReader.h - Text API Reader ----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TEXTAPI_TEXTAPIREADER_H
#define LLVM_TEXTAPI_TEXTAPIREADER_H
#include "llvm/Support/Error.h"
namespace llvm {
class MemoryBufferRef;
namespace MachO {
class InterfaceFile;
class TextAPIReader {
public:
static Expected<std::unique_ptr<InterfaceFile>>
get(MemoryBufferRef InputBuffer);
TextAPIReader() = delete;
};
} // end namespace MachO.
} // end namespace llvm.
#endif // LLVM_TEXTAPI_TEXTAPIREADER_H
PK hwFZ1]�K�7 �7 TextAPI/InterfaceFile.hnu �[��� //===- llvm/TextAPI/InterfaceFile.h - TAPI Interface File -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// A generic and abstract interface representation for linkable objects. This
// could be an MachO executable, bundle, dylib, or text-based stub file.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TEXTAPI_INTERFACEFILE_H
#define LLVM_TEXTAPI_INTERFACEFILE_H
#include "llvm/ADT/BitmaskEnum.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/Hashing.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator.h"
#include "llvm/Support/Allocator.h"
#include "llvm/TextAPI/ArchitectureSet.h"
#include "llvm/TextAPI/PackedVersion.h"
#include "llvm/TextAPI/Platform.h"
#include "llvm/TextAPI/Symbol.h"
#include "llvm/TextAPI/SymbolSet.h"
#include "llvm/TextAPI/Target.h"
namespace llvm {
namespace MachO {
/// Defines a list of Objective-C constraints.
enum class ObjCConstraintType : unsigned {
/// No constraint.
None = 0,
/// Retain/Release.
Retain_Release = 1,
/// Retain/Release for Simulator.
Retain_Release_For_Simulator = 2,
/// Retain/Release or Garbage Collection.
Retain_Release_Or_GC = 3,
/// Garbage Collection.
GC = 4,
};
// clang-format off
/// Defines the file type this file represents.
enum FileType : unsigned {
/// Invalid file type.
Invalid = 0U,
/// Text-based stub file (.tbd) version 1.0
TBD_V1 = 1U << 0,
/// Text-based stub file (.tbd) version 2.0
TBD_V2 = 1U << 1,
/// Text-based stub file (.tbd) version 3.0
TBD_V3 = 1U << 2,
/// Text-based stub file (.tbd) version 4.0
TBD_V4 = 1U << 3,
/// Text-based stub file (.tbd) version 5.0
TBD_V5 = 1U << 4,
All = ~0U,
LLVM_MARK_AS_BITMASK_ENUM(/*LargestValue=*/All),
};
// clang-format on
/// Reference to an interface file.
class InterfaceFileRef {
public:
InterfaceFileRef() = default;
InterfaceFileRef(StringRef InstallName) : InstallName(InstallName) {}
InterfaceFileRef(StringRef InstallName, const TargetList Targets)
: InstallName(InstallName), Targets(std::move(Targets)) {}
StringRef getInstallName() const { return InstallName; };
void addTarget(const Target &Target);
template <typename RangeT> void addTargets(RangeT &&Targets) {
for (const auto &Target : Targets)
addTarget(Target(Target));
}
using const_target_iterator = TargetList::const_iterator;
using const_target_range = llvm::iterator_range<const_target_iterator>;
const_target_range targets() const { return {Targets}; }
ArchitectureSet getArchitectures() const {
return mapToArchitectureSet(Targets);
}
PlatformSet getPlatforms() const { return mapToPlatformSet(Targets); }
bool operator==(const InterfaceFileRef &O) const {
return std::tie(InstallName, Targets) == std::tie(O.InstallName, O.Targets);
}
bool operator!=(const InterfaceFileRef &O) const {
return std::tie(InstallName, Targets) != std::tie(O.InstallName, O.Targets);
}
bool operator<(const InterfaceFileRef &O) const {
return std::tie(InstallName, Targets) < std::tie(O.InstallName, O.Targets);
}
private:
std::string InstallName;
TargetList Targets;
};
} // end namespace MachO.
namespace MachO {
/// Defines the interface file.
class InterfaceFile {
public:
InterfaceFile(std::unique_ptr<SymbolSet> &&InputSymbols)
: SymbolsSet(std::move(InputSymbols)) {}
InterfaceFile() : SymbolsSet(std::make_unique<SymbolSet>()){};
/// Set the path from which this file was generated (if applicable).
///
/// \param Path_ The path to the source file.
void setPath(StringRef Path_) { Path = std::string(Path_); }
/// Get the path from which this file was generated (if applicable).
///
/// \return The path to the source file or empty.
StringRef getPath() const { return Path; }
/// Set the file type.
///
/// This is used by the YAML writer to identify the specification it should
/// use for writing the file.
///
/// \param Kind The file type.
void setFileType(FileType Kind) { FileKind = Kind; }
/// Get the file type.
///
/// \return The file type.
FileType getFileType() const { return FileKind; }
/// Get the architectures.
///
/// \return The applicable architectures.
ArchitectureSet getArchitectures() const {
return mapToArchitectureSet(Targets);
}
/// Get the platforms.
///
/// \return The applicable platforms.
PlatformSet getPlatforms() const { return mapToPlatformSet(Targets); }
/// Set and add target.
///
/// \param Target the target to add into.
void addTarget(const Target &Target);
/// Set and add targets.
///
/// Add the subset of llvm::triples that is supported by Tapi
///
/// \param Targets the collection of targets.
template <typename RangeT> void addTargets(RangeT &&Targets) {
for (const auto &Target_ : Targets)
addTarget(Target(Target_));
}
using const_target_iterator = TargetList::const_iterator;
using const_target_range = llvm::iterator_range<const_target_iterator>;
const_target_range targets() const { return {Targets}; }
using const_filtered_target_iterator =
llvm::filter_iterator<const_target_iterator,
std::function<bool(const Target &)>>;
using const_filtered_target_range =
llvm::iterator_range<const_filtered_target_iterator>;
const_filtered_target_range targets(ArchitectureSet Archs) const;
/// Set the install name of the library.
void setInstallName(StringRef InstallName_) {
InstallName = std::string(InstallName_);
}
/// Get the install name of the library.
StringRef getInstallName() const { return InstallName; }
/// Set the current version of the library.
void setCurrentVersion(PackedVersion Version) { CurrentVersion = Version; }
/// Get the current version of the library.
PackedVersion getCurrentVersion() const { return CurrentVersion; }
/// Set the compatibility version of the library.
void setCompatibilityVersion(PackedVersion Version) {
CompatibilityVersion = Version;
}
/// Get the compatibility version of the library.
PackedVersion getCompatibilityVersion() const { return CompatibilityVersion; }
/// Set the Swift ABI version of the library.
void setSwiftABIVersion(uint8_t Version) { SwiftABIVersion = Version; }
/// Get the Swift ABI version of the library.
uint8_t getSwiftABIVersion() const { return SwiftABIVersion; }
/// Specify if the library uses two-level namespace (or flat namespace).
void setTwoLevelNamespace(bool V = true) { IsTwoLevelNamespace = V; }
/// Check if the library uses two-level namespace.
bool isTwoLevelNamespace() const { return IsTwoLevelNamespace; }
/// Specify if the library is application extension safe (or not).
void setApplicationExtensionSafe(bool V = true) { IsAppExtensionSafe = V; }
/// Check if the library is application extension safe.
bool isApplicationExtensionSafe() const { return IsAppExtensionSafe; }
/// Set the Objective-C constraint.
void setObjCConstraint(ObjCConstraintType Constraint) {
ObjcConstraint = Constraint;
}
/// Get the Objective-C constraint.
ObjCConstraintType getObjCConstraint() const { return ObjcConstraint; }
/// Set the parent umbrella frameworks.
/// \param Target_ The target applicable to Parent
/// \param Parent The name of Parent
void addParentUmbrella(const Target &Target_, StringRef Parent);
/// Get the list of Parent Umbrella frameworks.
///
/// \return Returns a list of target information and install name of parent
/// umbrellas.
const std::vector<std::pair<Target, std::string>> &umbrellas() const {
return ParentUmbrellas;
}
/// Add an allowable client.
///
/// Mach-O Dynamic libraries have the concept of allowable clients that are
/// checked during static link time. The name of the application or library
/// that is being generated needs to match one of the allowable clients or the
/// linker refuses to link this library.
///
/// \param InstallName The name of the client that is allowed to link this
/// library.
/// \param Target The target triple for which this applies.
void addAllowableClient(StringRef InstallName, const Target &Target);
/// Get the list of allowable clients.
///
/// \return Returns a list of allowable clients.
const std::vector<InterfaceFileRef> &allowableClients() const {
return AllowableClients;
}
/// Add a re-exported library.
///
/// \param InstallName The name of the library to re-export.
/// \param Target The target triple for which this applies.
void addReexportedLibrary(StringRef InstallName, const Target &Target);
/// Get the list of re-exported libraries.
///
/// \return Returns a list of re-exported libraries.
const std::vector<InterfaceFileRef> &reexportedLibraries() const {
return ReexportedLibraries;
}
/// Add a library for inlining to top level library.
///
///\param Document The library to inline with top level library.
void addDocument(std::shared_ptr<InterfaceFile> &&Document);
/// Returns the pointer to parent document if exists or nullptr otherwise.
InterfaceFile *getParent() const { return Parent; }
/// Get the list of inlined libraries.
///
/// \return Returns a list of the inlined frameworks.
const std::vector<std::shared_ptr<InterfaceFile>> &documents() const {
return Documents;
}
/// Set the runpath search paths.
/// \param InputTarget The target applicable to runpath search path.
/// \param RPath The name of runpath.
void addRPath(const Target &InputTarget, StringRef RPath);
/// Get the list of runpath search paths.
///
/// \return Returns a list of the rpaths per target.
const std::vector<std::pair<Target, std::string>> &rpaths() const {
return RPaths;
}
/// Get symbol if exists in file.
///
/// \param Kind The kind of global symbol to record.
/// \param Name The name of the symbol.
std::optional<const Symbol *> getSymbol(SymbolKind Kind,
StringRef Name) const {
if (auto *Sym = SymbolsSet->findSymbol(Kind, Name))
return Sym;
return std::nullopt;
}
/// Add a symbol to the symbols list or extend an existing one.
template <typename RangeT,
typename ElT = typename std::remove_reference<
decltype(*std::begin(std::declval<RangeT>()))>::type>
void addSymbol(SymbolKind Kind, StringRef Name, RangeT &&Targets,
SymbolFlags Flags = SymbolFlags::None) {
SymbolsSet->addGlobal(Kind, Name, Flags, Targets);
}
/// Add Symbol with multiple targets.
///
/// \param Kind The kind of global symbol to record.
/// \param Name The name of the symbol.
/// \param Targets The list of targets the symbol is defined in.
/// \param Flags The properties the symbol holds.
void addSymbol(SymbolKind Kind, StringRef Name, TargetList &&Targets,
SymbolFlags Flags = SymbolFlags::None) {
SymbolsSet->addGlobal(Kind, Name, Flags, Targets);
}
/// Add Symbol with single target.
///
/// \param Kind The kind of global symbol to record.
/// \param Name The name of the symbol.
/// \param Target The target the symbol is defined in.
/// \param Flags The properties the symbol holds.
void addSymbol(SymbolKind Kind, StringRef Name, Target &Target,
SymbolFlags Flags = SymbolFlags::None) {
SymbolsSet->addGlobal(Kind, Name, Flags, Target);
}
/// Get size of symbol set.
/// \return The number of symbols the file holds.
size_t symbolsCount() const { return SymbolsSet->size(); }
using const_symbol_range = SymbolSet::const_symbol_range;
using const_filtered_symbol_range = SymbolSet::const_filtered_symbol_range;
const_symbol_range symbols() const { return SymbolsSet->symbols(); };
const_filtered_symbol_range exports() const { return SymbolsSet->exports(); };
const_filtered_symbol_range reexports() const {
return SymbolsSet->reexports();
};
const_filtered_symbol_range undefineds() const {
return SymbolsSet->undefineds();
};
/// The equality is determined by attributes that impact linking
/// compatibilities. Path, & FileKind are irrelevant since these by
/// itself should not impact linking.
/// This is an expensive operation.
bool operator==(const InterfaceFile &O) const;
bool operator!=(const InterfaceFile &O) const { return !(*this == O); }
private:
llvm::BumpPtrAllocator Allocator;
StringRef copyString(StringRef String) {
if (String.empty())
return {};
void *Ptr = Allocator.Allocate(String.size(), 1);
memcpy(Ptr, String.data(), String.size());
return StringRef(reinterpret_cast<const char *>(Ptr), String.size());
}
TargetList Targets;
std::string Path;
FileType FileKind{FileType::Invalid};
std::string InstallName;
PackedVersion CurrentVersion;
PackedVersion CompatibilityVersion;
uint8_t SwiftABIVersion{0};
bool IsTwoLevelNamespace{false};
bool IsAppExtensionSafe{false};
ObjCConstraintType ObjcConstraint = ObjCConstraintType::None;
std::vector<std::pair<Target, std::string>> ParentUmbrellas;
std::vector<InterfaceFileRef> AllowableClients;
std::vector<InterfaceFileRef> ReexportedLibraries;
std::vector<std::shared_ptr<InterfaceFile>> Documents;
std::vector<std::pair<Target, std::string>> RPaths;
std::unique_ptr<SymbolSet> SymbolsSet;
InterfaceFile *Parent = nullptr;
};
// Keep containers that hold InterfaceFileRefs in sorted order and uniqued.
template <typename C>
typename C::iterator addEntry(C &Container, StringRef InstallName) {
auto I = partition_point(Container, [=](const InterfaceFileRef &O) {
return O.getInstallName() < InstallName;
});
if (I != Container.end() && I->getInstallName() == InstallName)
return I;
return Container.emplace(I, InstallName);
}
} // end namespace MachO.
} // end namespace llvm.
#endif // LLVM_TEXTAPI_INTERFACEFILE_H
PK hwFZ"��� � TextAPI/Architecture.defnu �[��� //===- llvm/TextAPI/Architecture.def - Architecture -----------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef ARCHINFO
#define ARCHINFO(arch)
#endif
///
/// X86 architectures sorted by cpu type and sub type id.
///
ARCHINFO(i386, MachO::CPU_TYPE_I386, MachO::CPU_SUBTYPE_I386_ALL, 32)
ARCHINFO(x86_64, MachO::CPU_TYPE_X86_64, MachO::CPU_SUBTYPE_X86_64_ALL, 64)
ARCHINFO(x86_64h, MachO::CPU_TYPE_X86_64, MachO::CPU_SUBTYPE_X86_64_H, 64)
///
/// ARM architectures sorted by cpu sub type id.
///
ARCHINFO(armv4t, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V4T, 32)
ARCHINFO(armv6, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V6, 32)
ARCHINFO(armv5, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V5TEJ, 32)
ARCHINFO(armv7, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7, 32)
ARCHINFO(armv7s, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7S, 32)
ARCHINFO(armv7k, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7K, 32)
ARCHINFO(armv6m, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V6M, 32)
ARCHINFO(armv7m, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7M, 32)
ARCHINFO(armv7em, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7EM, 32)
///
/// ARM64 architectures sorted by cpu sub type id.
///
ARCHINFO(arm64, MachO::CPU_TYPE_ARM64, MachO::CPU_SUBTYPE_ARM64_ALL, 64)
ARCHINFO(arm64e, MachO::CPU_TYPE_ARM64, MachO::CPU_SUBTYPE_ARM64E, 64)
///
/// ARM64_32 architectures sorted by cpu sub type id
///
ARCHINFO(arm64_32, MachO::CPU_TYPE_ARM64_32, MachO::CPU_SUBTYPE_ARM64_32_V8, 32)
PK hwFZ��\]t t TextAPI/Platform.hnu �[��� //===- llvm/TextAPI/Platform.h - Platform -----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Defines the Platforms supported by Tapi and helpers.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TEXTAPI_PLATFORM_H
#define LLVM_TEXTAPI_PLATFORM_H
#include "llvm/ADT/SmallSet.h"
#include "llvm/BinaryFormat/MachO.h"
#include "llvm/Support/VersionTuple.h"
namespace llvm {
namespace MachO {
using PlatformSet = SmallSet<PlatformType, 3>;
using PlatformVersionSet = SmallSet<std::pair<PlatformType, VersionTuple>, 3>;
PlatformType mapToPlatformType(PlatformType Platform, bool WantSim);
PlatformType mapToPlatformType(const Triple &Target);
PlatformSet mapToPlatformSet(ArrayRef<Triple> Targets);
StringRef getPlatformName(PlatformType Platform);
PlatformType getPlatformFromName(StringRef Name);
std::string getOSAndEnvironmentName(PlatformType Platform,
std::string Version = "");
VersionTuple mapToSupportedOSVersion(const Triple &Triple);
} // end namespace MachO.
} // end namespace llvm.
#endif // LLVM_TEXTAPI_PLATFORM_H
PK hwFZ9�M TextAPI/Architecture.hnu �[��� //===- llvm/TextAPI/Architecture.h - Architecture ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Defines the architecture enum and helper methods.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TEXTAPI_ARCHITECTURE_H
#define LLVM_TEXTAPI_ARCHITECTURE_H
#include <cstdint>
#include <utility>
namespace llvm {
class raw_ostream;
class StringRef;
class Triple;
namespace MachO {
/// Defines the architecture slices that are supported by Text-based Stub files.
enum Architecture : uint8_t {
#define ARCHINFO(Arch, Type, SubType, NumBits) AK_##Arch,
#include "llvm/TextAPI/Architecture.def"
#undef ARCHINFO
AK_unknown, // this has to go last.
};
/// Convert a CPU Type and Subtype pair to an architecture slice.
Architecture getArchitectureFromCpuType(uint32_t CPUType, uint32_t CPUSubType);
/// Convert a name to an architecture slice.
Architecture getArchitectureFromName(StringRef Name);
/// Convert an architecture slice to a string.
StringRef getArchitectureName(Architecture Arch);
/// Convert an architecture slice to a CPU Type and Subtype pair.
std::pair<uint32_t, uint32_t> getCPUTypeFromArchitecture(Architecture Arch);
/// Convert a target to an architecture slice.
Architecture mapToArchitecture(const llvm::Triple &Target);
/// Check if architecture is 64 bit.
bool is64Bit(Architecture);
raw_ostream &operator<<(raw_ostream &OS, Architecture Arch);
} // end namespace MachO.
} // end namespace llvm.
#endif // LLVM_TEXTAPI_ARCHITECTURE_H
PK hwFZ�&�{ { TextAPI/ArchitectureSet.hnu �[��� //===- llvm/TextAPI/ArchitectureSet.h - ArchitectureSet ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Defines the architecture set.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TEXTAPI_ARCHITECTURESET_H
#define LLVM_TEXTAPI_ARCHITECTURESET_H
#include "llvm/TextAPI/Architecture.h"
#include <cstddef>
#include <iterator>
#include <limits>
#include <string>
#include <tuple>
#include <vector>
namespace llvm {
class raw_ostream;
namespace MachO {
class ArchitectureSet {
private:
using ArchSetType = uint32_t;
const static ArchSetType EndIndexVal =
std::numeric_limits<ArchSetType>::max();
ArchSetType ArchSet{0};
public:
constexpr ArchitectureSet() = default;
constexpr ArchitectureSet(ArchSetType Raw) : ArchSet(Raw) {}
ArchitectureSet(Architecture Arch) : ArchitectureSet() { set(Arch); }
ArchitectureSet(const std::vector<Architecture> &Archs);
void set(Architecture Arch) {
if (Arch == AK_unknown)
return;
ArchSet |= 1U << static_cast<int>(Arch);
}
void clear(Architecture Arch) { ArchSet &= ~(1U << static_cast<int>(Arch)); }
bool has(Architecture Arch) const {
return ArchSet & (1U << static_cast<int>(Arch));
}
bool contains(ArchitectureSet Archs) const {
return (ArchSet & Archs.ArchSet) == Archs.ArchSet;
}
size_t count() const;
bool empty() const { return ArchSet == 0; }
ArchSetType rawValue() const { return ArchSet; }
bool hasX86() const {
return has(AK_i386) || has(AK_x86_64) || has(AK_x86_64h);
}
template <typename Ty> class arch_iterator {
public:
using iterator_category = std::forward_iterator_tag;
using value_type = Architecture;
using difference_type = std::size_t;
using pointer = value_type *;
using reference = value_type &;
private:
ArchSetType Index;
Ty *ArchSet;
void findNextSetBit() {
if (Index == EndIndexVal)
return;
while (++Index < sizeof(Ty) * 8) {
if (*ArchSet & (1UL << Index))
return;
}
Index = EndIndexVal;
}
public:
arch_iterator(Ty *ArchSet, ArchSetType Index = 0)
: Index(Index), ArchSet(ArchSet) {
if (Index != EndIndexVal && !(*ArchSet & (1UL << Index)))
findNextSetBit();
}
Architecture operator*() const { return static_cast<Architecture>(Index); }
arch_iterator &operator++() {
findNextSetBit();
return *this;
}
arch_iterator operator++(int) {
auto tmp = *this;
findNextSetBit();
return tmp;
}
bool operator==(const arch_iterator &o) const {
return std::tie(Index, ArchSet) == std::tie(o.Index, o.ArchSet);
}
bool operator!=(const arch_iterator &o) const { return !(*this == o); }
};
ArchitectureSet operator&(const ArchitectureSet &o) {
return {ArchSet & o.ArchSet};
}
ArchitectureSet operator|(const ArchitectureSet &o) {
return {ArchSet | o.ArchSet};
}
ArchitectureSet &operator|=(const ArchitectureSet &o) {
ArchSet |= o.ArchSet;
return *this;
}
ArchitectureSet &operator|=(const Architecture &Arch) {
set(Arch);
return *this;
}
bool operator==(const ArchitectureSet &o) const {
return ArchSet == o.ArchSet;
}
bool operator!=(const ArchitectureSet &o) const {
return ArchSet != o.ArchSet;
}
bool operator<(const ArchitectureSet &o) const { return ArchSet < o.ArchSet; }
using iterator = arch_iterator<ArchSetType>;
using const_iterator = arch_iterator<const ArchSetType>;
iterator begin() { return {&ArchSet}; }
iterator end() { return {&ArchSet, EndIndexVal}; }
const_iterator begin() const { return {&ArchSet}; }
const_iterator end() const { return {&ArchSet, EndIndexVal}; }
operator std::string() const;
operator std::vector<Architecture>() const;
void print(raw_ostream &OS) const;
};
inline ArchitectureSet operator|(const Architecture &lhs,
const Architecture &rhs) {
return ArchitectureSet(lhs) | ArchitectureSet(rhs);
}
raw_ostream &operator<<(raw_ostream &OS, ArchitectureSet Set);
} // end namespace MachO.
} // end namespace llvm.
#endif // LLVM_TEXTAPI_ARCHITECTURESET_H
PK hwFZ�~
^0 0 TextAPI/TextAPIWriter.hnu �[��� //===--- TextAPIWriter.h - Text API Writer ----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TEXTAPI_TEXTAPIWRITER_H
#define LLVM_TEXTAPI_TEXTAPIWRITER_H
namespace llvm {
class Error;
class raw_ostream;
namespace MachO {
class InterfaceFile;
class TextAPIWriter {
public:
TextAPIWriter() = delete;
static Error writeToStream(raw_ostream &OS, const InterfaceFile &File,
bool Compact = false);
};
} // end namespace MachO.
} // end namespace llvm.
#endif // LLVM_TEXTAPI_TEXTAPIWRITER_H
PK hwFZ#�
TextAPI/Target.hnu �[��� //===- llvm/TextAPI/Target.h - TAPI Target ----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TEXTAPI_TARGET_H
#define LLVM_TEXTAPI_TARGET_H
#include "llvm/Support/Error.h"
#include "llvm/Support/VersionTuple.h"
#include "llvm/TargetParser/Triple.h"
#include "llvm/TextAPI/Architecture.h"
#include "llvm/TextAPI/ArchitectureSet.h"
#include "llvm/TextAPI/Platform.h"
namespace llvm {
class Triple;
namespace MachO {
// This is similar to a llvm Triple, but the triple doesn't have all the
// information we need. For example there is no enum value for x86_64h. The
// only way to get that information is to parse the triple string.
class Target {
public:
Target() = default;
Target(Architecture Arch, PlatformType Platform,
VersionTuple MinDeployment = {})
: Arch(Arch), Platform(Platform), MinDeployment(MinDeployment) {}
explicit Target(const llvm::Triple &Triple)
: Arch(mapToArchitecture(Triple)), Platform(mapToPlatformType(Triple)),
MinDeployment(mapToSupportedOSVersion(Triple)) {}
static llvm::Expected<Target> create(StringRef Target);
operator std::string() const;
Architecture Arch;
PlatformType Platform;
VersionTuple MinDeployment;
};
inline bool operator==(const Target &LHS, const Target &RHS) {
// In most cases the deployment version is not useful to compare.
return std::tie(LHS.Arch, LHS.Platform) == std::tie(RHS.Arch, RHS.Platform);
}
inline bool operator!=(const Target &LHS, const Target &RHS) {
return !(LHS == RHS);
}
inline bool operator<(const Target &LHS, const Target &RHS) {
// In most cases the deployment version is not useful to compare.
return std::tie(LHS.Arch, LHS.Platform) < std::tie(RHS.Arch, RHS.Platform);
}
inline bool operator==(const Target &LHS, const Architecture &RHS) {
return LHS.Arch == RHS;
}
inline bool operator!=(const Target &LHS, const Architecture &RHS) {
return LHS.Arch != RHS;
}
PlatformVersionSet mapToPlatformVersionSet(ArrayRef<Target> Targets);
PlatformSet mapToPlatformSet(ArrayRef<Target> Targets);
ArchitectureSet mapToArchitectureSet(ArrayRef<Target> Targets);
std::string getTargetTripleName(const Target &Targ);
raw_ostream &operator<<(raw_ostream &OS, const Target &Target);
} // namespace MachO
} // namespace llvm
#endif // LLVM_TEXTAPI_TARGET_H
PK hwFZ5 ?
TextAPI/PackedVersion.hnu �[��� //===- llvm/TextAPI/PackedVersion.h - PackedVersion -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Defines the Mach-O packed version format.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TEXTAPI_PACKEDVERSION_H
#define LLVM_TEXTAPI_PACKEDVERSION_H
#include <cstdint>
#include <string>
#include <utility>
namespace llvm {
class raw_ostream;
class StringRef;
namespace MachO {
class PackedVersion {
uint32_t Version{0};
public:
constexpr PackedVersion() = default;
explicit constexpr PackedVersion(uint32_t RawVersion) : Version(RawVersion) {}
PackedVersion(unsigned Major, unsigned Minor, unsigned Subminor)
: Version((Major << 16) | ((Minor & 0xff) << 8) | (Subminor & 0xff)) {}
bool empty() const { return Version == 0; }
/// Retrieve the major version number.
unsigned getMajor() const { return Version >> 16; }
/// Retrieve the minor version number, if provided.
unsigned getMinor() const { return (Version >> 8) & 0xff; }
/// Retrieve the subminor version number, if provided.
unsigned getSubminor() const { return Version & 0xff; }
bool parse32(StringRef Str);
std::pair<bool, bool> parse64(StringRef Str);
bool operator<(const PackedVersion &O) const { return Version < O.Version; }
bool operator==(const PackedVersion &O) const { return Version == O.Version; }
bool operator!=(const PackedVersion &O) const { return Version != O.Version; }
uint32_t rawValue() const { return Version; }
operator std::string() const;
void print(raw_ostream &OS) const;
};
inline raw_ostream &operator<<(raw_ostream &OS, const PackedVersion &Version) {
Version.print(OS);
return OS;
}
} // end namespace MachO.
} // end namespace llvm.
#endif // LLVM_TEXTAPI_PACKEDVERSION_H
PK hwFZ~��
� � TextAPI/SymbolSet.hnu �[��� //===- llvm/TextAPI/SymbolSet.h - TAPI Symbol Set --------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TEXTAPI_SYMBOLSET_H
#define LLVM_TEXTAPI_SYMBOLSET_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/Hashing.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/Support/Allocator.h"
#include "llvm/TextAPI/Architecture.h"
#include "llvm/TextAPI/ArchitectureSet.h"
#include "llvm/TextAPI/Symbol.h"
#include <stddef.h>
namespace llvm {
struct SymbolsMapKey {
MachO::SymbolKind Kind;
StringRef Name;
SymbolsMapKey(MachO::SymbolKind Kind, StringRef Name)
: Kind(Kind), Name(Name) {}
};
template <> struct DenseMapInfo<SymbolsMapKey> {
static inline SymbolsMapKey getEmptyKey() {
return SymbolsMapKey(MachO::SymbolKind::GlobalSymbol, StringRef{});
}
static inline SymbolsMapKey getTombstoneKey() {
return SymbolsMapKey(MachO::SymbolKind::ObjectiveCInstanceVariable,
StringRef{});
}
static unsigned getHashValue(const SymbolsMapKey &Key) {
return hash_combine(hash_value(Key.Kind), hash_value(Key.Name));
}
static bool isEqual(const SymbolsMapKey &LHS, const SymbolsMapKey &RHS) {
return std::tie(LHS.Kind, LHS.Name) == std::tie(RHS.Kind, RHS.Name);
}
};
template <typename DerivedT, typename KeyInfoT, typename BucketT>
bool operator==(const DenseMapBase<DerivedT, SymbolsMapKey, MachO::Symbol *,
KeyInfoT, BucketT> &LHS,
const DenseMapBase<DerivedT, SymbolsMapKey, MachO::Symbol *,
KeyInfoT, BucketT> &RHS) {
if (LHS.size() != RHS.size())
return false;
for (const auto &KV : LHS) {
auto I = RHS.find(KV.first);
if (I == RHS.end() || *I->second != *KV.second)
return false;
}
return true;
}
template <typename DerivedT, typename KeyInfoT, typename BucketT>
bool operator!=(const DenseMapBase<DerivedT, SymbolsMapKey, MachO::Symbol *,
KeyInfoT, BucketT> &LHS,
const DenseMapBase<DerivedT, SymbolsMapKey, MachO::Symbol *,
KeyInfoT, BucketT> &RHS) {
return !(LHS == RHS);
}
namespace MachO {
class SymbolSet {
private:
llvm::BumpPtrAllocator Allocator;
StringRef copyString(StringRef String) {
if (String.empty())
return {};
void *Ptr = Allocator.Allocate(String.size(), 1);
memcpy(Ptr, String.data(), String.size());
return StringRef(reinterpret_cast<const char *>(Ptr), String.size());
}
using SymbolsMapType = llvm::DenseMap<SymbolsMapKey, Symbol *>;
SymbolsMapType Symbols;
Symbol *addGlobalImpl(SymbolKind, StringRef Name, SymbolFlags Flags);
public:
SymbolSet() = default;
Symbol *addGlobal(SymbolKind Kind, StringRef Name, SymbolFlags Flags,
const Target &Targ);
size_t size() const { return Symbols.size(); }
template <typename RangeT,
typename ElT = typename std::remove_reference<
decltype(*std::begin(std::declval<RangeT>()))>::type>
Symbol *addGlobal(SymbolKind Kind, StringRef Name, SymbolFlags Flags,
RangeT &&Targets) {
auto *Global = addGlobalImpl(Kind, Name, Flags);
for (const auto &Targ : Targets)
Global->addTarget(Targ);
if (Kind == SymbolKind::ObjectiveCClassEHType)
addGlobal(SymbolKind::ObjectiveCClass, Name, Flags, Targets);
return Global;
}
const Symbol *findSymbol(SymbolKind Kind, StringRef Name) const;
struct const_symbol_iterator
: public iterator_adaptor_base<
const_symbol_iterator, SymbolsMapType::const_iterator,
std::forward_iterator_tag, const Symbol *, ptrdiff_t,
const Symbol *, const Symbol *> {
const_symbol_iterator() = default;
template <typename U>
const_symbol_iterator(U &&u)
: iterator_adaptor_base(std::forward<U &&>(u)) {}
reference operator*() const { return I->second; }
pointer operator->() const { return I->second; }
};
using const_symbol_range = iterator_range<const_symbol_iterator>;
using const_filtered_symbol_iterator =
filter_iterator<const_symbol_iterator,
std::function<bool(const Symbol *)>>;
using const_filtered_symbol_range =
iterator_range<const_filtered_symbol_iterator>;
// Range that contains all symbols.
const_symbol_range symbols() const {
return {Symbols.begin(), Symbols.end()};
}
// Range that contains all defined and exported symbols.
const_filtered_symbol_range exports() const {
std::function<bool(const Symbol *)> fn = [](const Symbol *Symbol) {
return !Symbol->isUndefined() && !Symbol->isReexported();
};
return make_filter_range(
make_range<const_symbol_iterator>({Symbols.begin()}, {Symbols.end()}),
fn);
}
// Range that contains all reexported symbols.
const_filtered_symbol_range reexports() const {
std::function<bool(const Symbol *)> fn = [](const Symbol *Symbol) {
return Symbol->isReexported();
};
return make_filter_range(
make_range<const_symbol_iterator>({Symbols.begin()}, {Symbols.end()}),
fn);
}
// Range that contains all undefined and exported symbols.
const_filtered_symbol_range undefineds() const {
std::function<bool(const Symbol *)> fn = [](const Symbol *Symbol) {
return Symbol->isUndefined();
};
return make_filter_range(
make_range<const_symbol_iterator>({Symbols.begin()}, {Symbols.end()}),
fn);
}
bool operator==(const SymbolSet &O) const;
bool operator!=(const SymbolSet &O) const { return !(Symbols == O.Symbols); }
void *allocate(size_t Size, unsigned Align = 8) {
return Allocator.Allocate(Size, Align);
}
};
} // namespace MachO
} // namespace llvm
#endif // LLVM_TEXTAPI_SYMBOLSET_H
PK hwFZ,�Egs s TextAPI/Symbol.hnu �[��� //===- llvm/TextAPI/Symbol.h - TAPI Symbol ----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TEXTAPI_SYMBOL_H
#define LLVM_TEXTAPI_SYMBOL_H
#include "llvm/ADT/BitmaskEnum.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/TextAPI/ArchitectureSet.h"
#include "llvm/TextAPI/Target.h"
namespace llvm {
namespace MachO {
// clang-format off
/// Symbol flags.
enum class SymbolFlags : uint8_t {
/// No flags
None = 0,
/// Thread-local value symbol
ThreadLocalValue = 1U << 0,
/// Weak defined symbol
WeakDefined = 1U << 1,
/// Weak referenced symbol
WeakReferenced = 1U << 2,
/// Undefined
Undefined = 1U << 3,
/// Rexported
Rexported = 1U << 4,
/// Data Segment
Data = 1U << 5,
/// Text Segment
Text = 1U << 6,
LLVM_MARK_AS_BITMASK_ENUM(/*LargestValue=*/Text),
};
// clang-format on
enum class SymbolKind : uint8_t {
GlobalSymbol,
ObjectiveCClass,
ObjectiveCClassEHType,
ObjectiveCInstanceVariable,
};
constexpr StringLiteral ObjC1ClassNamePrefix = ".objc_class_name_";
constexpr StringLiteral ObjC2ClassNamePrefix = "_OBJC_CLASS_$_";
constexpr StringLiteral ObjC2MetaClassNamePrefix = "_OBJC_METACLASS_$_";
constexpr StringLiteral ObjC2EHTypePrefix = "_OBJC_EHTYPE_$_";
constexpr StringLiteral ObjC2IVarPrefix = "_OBJC_IVAR_$_";
using TargetList = SmallVector<Target, 5>;
// Keep containers that hold Targets in sorted order and uniqued.
template <typename C>
typename C::iterator addEntry(C &Container, const Target &Targ) {
auto Iter =
lower_bound(Container, Targ, [](const Target &LHS, const Target &RHS) {
return LHS < RHS;
});
if ((Iter != std::end(Container)) && !(Targ < *Iter))
return Iter;
return Container.insert(Iter, Targ);
}
class Symbol {
public:
Symbol(SymbolKind Kind, StringRef Name, TargetList Targets, SymbolFlags Flags)
: Name(Name), Targets(std::move(Targets)), Kind(Kind), Flags(Flags) {}
void addTarget(Target InputTarget) { addEntry(Targets, InputTarget); }
SymbolKind getKind() const { return Kind; }
StringRef getName() const { return Name; }
ArchitectureSet getArchitectures() const {
return mapToArchitectureSet(Targets);
}
SymbolFlags getFlags() const { return Flags; }
bool isWeakDefined() const {
return (Flags & SymbolFlags::WeakDefined) == SymbolFlags::WeakDefined;
}
bool isWeakReferenced() const {
return (Flags & SymbolFlags::WeakReferenced) == SymbolFlags::WeakReferenced;
}
bool isThreadLocalValue() const {
return (Flags & SymbolFlags::ThreadLocalValue) ==
SymbolFlags::ThreadLocalValue;
}
bool isUndefined() const {
return (Flags & SymbolFlags::Undefined) == SymbolFlags::Undefined;
}
bool isReexported() const {
return (Flags & SymbolFlags::Rexported) == SymbolFlags::Rexported;
}
bool isData() const {
return (Flags & SymbolFlags::Data) == SymbolFlags::Data;
}
bool isText() const {
return (Flags & SymbolFlags::Text) == SymbolFlags::Text;
}
using const_target_iterator = TargetList::const_iterator;
using const_target_range = llvm::iterator_range<const_target_iterator>;
const_target_range targets() const { return {Targets}; }
using const_filtered_target_iterator =
llvm::filter_iterator<const_target_iterator,
std::function<bool(const Target &)>>;
using const_filtered_target_range =
llvm::iterator_range<const_filtered_target_iterator>;
const_filtered_target_range targets(ArchitectureSet architectures) const;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump(raw_ostream &OS) const;
void dump() const { dump(llvm::errs()); }
#endif
bool operator==(const Symbol &O) const;
bool operator!=(const Symbol &O) const { return !(*this == O); }
bool operator<(const Symbol &O) const {
return std::tie(Name, Kind, Targets, Flags) <
std::tie(O.Name, O.Kind, O.Targets, O.Flags);
}
private:
StringRef Name;
TargetList Targets;
SymbolKind Kind;
SymbolFlags Flags;
};
} // end namespace MachO.
} // end namespace llvm.
#endif // LLVM_TEXTAPI_SYMBOL_H
PK hwFZu*Y�oM oM WindowsDriver/MSVCSetupApi.hnu �[��� // <copyright file="Program.cpp" company="Microsoft Corporation">
// Copyright (C) Microsoft Corporation. All rights reserved.
// Licensed under the MIT license.
// </copyright>
// <license>
// The MIT License (MIT)
//
// Copyright (C) Microsoft Corporation. All rights reserved.
//
// Permission is hereby granted, free of charge, to any person obtaining
// a copy of this software and associated documentation files (the "Software"),
// to deal in the Software without restriction, including without limitation the
// rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
// sell copies of the Software, and to permit persons to whom the Software is
// furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in
// all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
// SOFTWARE.
// </license>
#pragma once
#ifdef __clang__
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wnon-virtual-dtor"
#endif
// Constants
//
#ifndef E_NOTFOUND
#define E_NOTFOUND HRESULT_FROM_WIN32(ERROR_NOT_FOUND)
#endif
#ifndef E_FILENOTFOUND
#define E_FILENOTFOUND HRESULT_FROM_WIN32(ERROR_FILE_NOT_FOUND)
#endif
// Enumerations
//
/// <summary>
/// The state of an instance.
/// </summary>
enum InstanceState : unsigned {
/// <summary>
/// The instance state has not been determined.
/// </summary>
eNone = 0,
/// <summary>
/// The instance installation path exists.
/// </summary>
eLocal = 1,
/// <summary>
/// A product is registered to the instance.
/// </summary>
eRegistered = 2,
/// <summary>
/// No reboot is required for the instance.
/// </summary>
eNoRebootRequired = 4,
/// <summary>
/// The instance represents a complete install.
/// </summary>
eComplete = MAXUINT,
};
// Forward interface declarations
//
#ifndef __ISetupInstance_FWD_DEFINED__
#define __ISetupInstance_FWD_DEFINED__
typedef struct ISetupInstance ISetupInstance;
#endif
#ifndef __ISetupInstance2_FWD_DEFINED__
#define __ISetupInstance2_FWD_DEFINED__
typedef struct ISetupInstance2 ISetupInstance2;
#endif
#ifndef __IEnumSetupInstances_FWD_DEFINED__
#define __IEnumSetupInstances_FWD_DEFINED__
typedef struct IEnumSetupInstances IEnumSetupInstances;
#endif
#ifndef __ISetupConfiguration_FWD_DEFINED__
#define __ISetupConfiguration_FWD_DEFINED__
typedef struct ISetupConfiguration ISetupConfiguration;
#endif
#ifndef __ISetupConfiguration2_FWD_DEFINED__
#define __ISetupConfiguration2_FWD_DEFINED__
typedef struct ISetupConfiguration2 ISetupConfiguration2;
#endif
#ifndef __ISetupPackageReference_FWD_DEFINED__
#define __ISetupPackageReference_FWD_DEFINED__
typedef struct ISetupPackageReference ISetupPackageReference;
#endif
#ifndef __ISetupHelper_FWD_DEFINED__
#define __ISetupHelper_FWD_DEFINED__
typedef struct ISetupHelper ISetupHelper;
#endif
// Forward class declarations
//
#ifndef __SetupConfiguration_FWD_DEFINED__
#define __SetupConfiguration_FWD_DEFINED__
#ifdef __cplusplus
typedef class SetupConfiguration SetupConfiguration;
#endif
#endif
#ifdef __cplusplus
extern "C" {
#endif
// Interface definitions
//
EXTERN_C const IID IID_ISetupInstance;
#if defined(__cplusplus) && !defined(CINTERFACE)
/// <summary>
/// Information about an instance of a product.
/// </summary>
struct DECLSPEC_UUID("B41463C3-8866-43B5-BC33-2B0676F7F42E")
DECLSPEC_NOVTABLE ISetupInstance : public IUnknown {
/// <summary>
/// Gets the instance identifier (should match the name of the parent instance
/// directory).
/// </summary>
/// <param name="pbstrInstanceId">The instance identifier.</param>
/// <returns>Standard HRESULT indicating success or failure, including
/// E_FILENOTFOUND if the instance state does not exist.</returns>
STDMETHOD(GetInstanceId)(_Out_ BSTR *pbstrInstanceId) = 0;
/// <summary>
/// Gets the local date and time when the installation was originally
/// installed.
/// </summary>
/// <param name="pInstallDate">The local date and time when the installation
/// was originally installed.</param>
/// <returns>Standard HRESULT indicating success or failure, including
/// E_FILENOTFOUND if the instance state does not exist and E_NOTFOUND if the
/// property is not defined.</returns>
STDMETHOD(GetInstallDate)(_Out_ LPFILETIME pInstallDate) = 0;
/// <summary>
/// Gets the unique name of the installation, often indicating the branch and
/// other information used for telemetry.
/// </summary>
/// <param name="pbstrInstallationName">The unique name of the installation,
/// often indicating the branch and other information used for
/// telemetry.</param>
/// <returns>Standard HRESULT indicating success or failure, including
/// E_FILENOTFOUND if the instance state does not exist and E_NOTFOUND if the
/// property is not defined.</returns>
STDMETHOD(GetInstallationName)(_Out_ BSTR *pbstrInstallationName) = 0;
/// <summary>
/// Gets the path to the installation root of the product.
/// </summary>
/// <param name="pbstrInstallationPath">The path to the installation root of
/// the product.</param>
/// <returns>Standard HRESULT indicating success or failure, including
/// E_FILENOTFOUND if the instance state does not exist and E_NOTFOUND if the
/// property is not defined.</returns>
STDMETHOD(GetInstallationPath)(_Out_ BSTR *pbstrInstallationPath) = 0;
/// <summary>
/// Gets the version of the product installed in this instance.
/// </summary>
/// <param name="pbstrInstallationVersion">The version of the product
/// installed in this instance.</param>
/// <returns>Standard HRESULT indicating success or failure, including
/// E_FILENOTFOUND if the instance state does not exist and E_NOTFOUND if the
/// property is not defined.</returns>
STDMETHOD(GetInstallationVersion)(_Out_ BSTR *pbstrInstallationVersion) = 0;
/// <summary>
/// Gets the display name (title) of the product installed in this instance.
/// </summary>
/// <param name="lcid">The LCID for the display name.</param>
/// <param name="pbstrDisplayName">The display name (title) of the product
/// installed in this instance.</param>
/// <returns>Standard HRESULT indicating success or failure, including
/// E_FILENOTFOUND if the instance state does not exist and E_NOTFOUND if the
/// property is not defined.</returns>
STDMETHOD(GetDisplayName)(_In_ LCID lcid, _Out_ BSTR *pbstrDisplayName) = 0;
/// <summary>
/// Gets the description of the product installed in this instance.
/// </summary>
/// <param name="lcid">The LCID for the description.</param>
/// <param name="pbstrDescription">The description of the product installed in
/// this instance.</param>
/// <returns>Standard HRESULT indicating success or failure, including
/// E_FILENOTFOUND if the instance state does not exist and E_NOTFOUND if the
/// property is not defined.</returns>
STDMETHOD(GetDescription)(_In_ LCID lcid, _Out_ BSTR *pbstrDescription) = 0;
/// <summary>
/// Resolves the optional relative path to the root path of the instance.
/// </summary>
/// <param name="pwszRelativePath">A relative path within the instance to
/// resolve, or NULL to get the root path.</param>
/// <param name="pbstrAbsolutePath">The full path to the optional relative
/// path within the instance. If the relative path is NULL, the root path will
/// always terminate in a backslash.</param>
/// <returns>Standard HRESULT indicating success or failure, including
/// E_FILENOTFOUND if the instance state does not exist and E_NOTFOUND if the
/// property is not defined.</returns>
STDMETHOD(ResolvePath)
(_In_opt_z_ LPCOLESTR pwszRelativePath, _Out_ BSTR *pbstrAbsolutePath) = 0;
};
#endif
EXTERN_C const IID IID_ISetupInstance2;
#if defined(__cplusplus) && !defined(CINTERFACE)
/// <summary>
/// Information about an instance of a product.
/// </summary>
struct DECLSPEC_UUID("89143C9A-05AF-49B0-B717-72E218A2185C")
DECLSPEC_NOVTABLE ISetupInstance2 : public ISetupInstance {
/// <summary>
/// Gets the state of the instance.
/// </summary>
/// <param name="pState">The state of the instance.</param>
/// <returns>Standard HRESULT indicating success or failure, including
/// E_FILENOTFOUND if the instance state does not exist.</returns>
STDMETHOD(GetState)(_Out_ InstanceState *pState) = 0;
/// <summary>
/// Gets an array of package references registered to the instance.
/// </summary>
/// <param name="ppsaPackages">Pointer to an array of <see
/// cref="ISetupPackageReference"/>.</param>
/// <returns>Standard HRESULT indicating success or failure, including
/// E_FILENOTFOUND if the instance state does not exist and E_NOTFOUND if the
/// packages property is not defined.</returns>
STDMETHOD(GetPackages)(_Out_ LPSAFEARRAY *ppsaPackages) = 0;
/// <summary>
/// Gets a pointer to the <see cref="ISetupPackageReference"/> that represents
/// the registered product.
/// </summary>
/// <param name="ppPackage">Pointer to an instance of <see
/// cref="ISetupPackageReference"/>. This may be NULL if <see
/// cref="GetState"/> does not return <see cref="eComplete"/>.</param>
/// <returns>Standard HRESULT indicating success or failure, including
/// E_FILENOTFOUND if the instance state does not exist and E_NOTFOUND if the
/// packages property is not defined.</returns>
STDMETHOD(GetProduct)
(_Outptr_result_maybenull_ ISetupPackageReference **ppPackage) = 0;
/// <summary>
/// Gets the relative path to the product application, if available.
/// </summary>
/// <param name="pbstrProductPath">The relative path to the product
/// application, if available.</param>
/// <returns>Standard HRESULT indicating success or failure, including
/// E_FILENOTFOUND if the instance state does not exist.</returns>
STDMETHOD(GetProductPath)
(_Outptr_result_maybenull_ BSTR *pbstrProductPath) = 0;
};
#endif
EXTERN_C const IID IID_IEnumSetupInstances;
#if defined(__cplusplus) && !defined(CINTERFACE)
/// <summary>
/// A enumerator of installed <see cref="ISetupInstance"/> objects.
/// </summary>
struct DECLSPEC_UUID("6380BCFF-41D3-4B2E-8B2E-BF8A6810C848")
DECLSPEC_NOVTABLE IEnumSetupInstances : public IUnknown {
/// <summary>
/// Retrieves the next set of product instances in the enumeration sequence.
/// </summary>
/// <param name="celt">The number of product instances to retrieve.</param>
/// <param name="rgelt">A pointer to an array of <see
/// cref="ISetupInstance"/>.</param>
/// <param name="pceltFetched">A pointer to the number of product instances
/// retrieved. If celt is 1 this parameter may be NULL.</param>
/// <returns>S_OK if the number of elements were fetched, S_FALSE if nothing
/// was fetched (at end of enumeration), E_INVALIDARG if celt is greater than
/// 1 and pceltFetched is NULL, or E_OUTOFMEMORY if an <see
/// cref="ISetupInstance"/> could not be allocated.</returns>
STDMETHOD(Next)
(_In_ ULONG celt, _Out_writes_to_(celt, *pceltFetched) ISetupInstance **rgelt,
_Out_opt_ _Deref_out_range_(0, celt) ULONG *pceltFetched) = 0;
/// <summary>
/// Skips the next set of product instances in the enumeration sequence.
/// </summary>
/// <param name="celt">The number of product instances to skip.</param>
/// <returns>S_OK if the number of elements could be skipped; otherwise,
/// S_FALSE;</returns>
STDMETHOD(Skip)(_In_ ULONG celt) = 0;
/// <summary>
/// Resets the enumeration sequence to the beginning.
/// </summary>
/// <returns>Always returns S_OK;</returns>
STDMETHOD(Reset)(void) = 0;
/// <summary>
/// Creates a new enumeration object in the same state as the current
/// enumeration object: the new object points to the same place in the
/// enumeration sequence.
/// </summary>
/// <param name="ppenum">A pointer to a pointer to a new <see
/// cref="IEnumSetupInstances"/> interface. If the method fails, this
/// parameter is undefined.</param>
/// <returns>S_OK if a clone was returned; otherwise, E_OUTOFMEMORY.</returns>
STDMETHOD(Clone)(_Deref_out_opt_ IEnumSetupInstances **ppenum) = 0;
};
#endif
EXTERN_C const IID IID_ISetupConfiguration;
#if defined(__cplusplus) && !defined(CINTERFACE)
/// <summary>
/// Gets information about product instances set up on the machine.
/// </summary>
struct DECLSPEC_UUID("42843719-DB4C-46C2-8E7C-64F1816EFD5B")
DECLSPEC_NOVTABLE ISetupConfiguration : public IUnknown {
/// <summary>
/// Enumerates all completed product instances installed.
/// </summary>
/// <param name="ppEnumInstances">An enumeration of completed, installed
/// product instances.</param>
/// <returns>Standard HRESULT indicating success or failure.</returns>
STDMETHOD(EnumInstances)(_Out_ IEnumSetupInstances **ppEnumInstances) = 0;
/// <summary>
/// Gets the instance for the current process path.
/// </summary>
/// <param name="ppInstance">The instance for the current process
/// path.</param>
/// <returns>The instance for the current process path, or E_NOTFOUND if not
/// found.</returns>
STDMETHOD(GetInstanceForCurrentProcess)
(_Out_ ISetupInstance **ppInstance) = 0;
/// <summary>
/// Gets the instance for the given path.
/// </summary>
/// <param name="ppInstance">The instance for the given path.</param>
/// <returns>The instance for the given path, or E_NOTFOUND if not
/// found.</returns>
STDMETHOD(GetInstanceForPath)
(_In_z_ LPCWSTR wzPath, _Out_ ISetupInstance **ppInstance) = 0;
};
#endif
EXTERN_C const IID IID_ISetupConfiguration2;
#if defined(__cplusplus) && !defined(CINTERFACE)
/// <summary>
/// Gets information about product instances.
/// </summary>
struct DECLSPEC_UUID("26AAB78C-4A60-49D6-AF3B-3C35BC93365D")
DECLSPEC_NOVTABLE ISetupConfiguration2 : public ISetupConfiguration {
/// <summary>
/// Enumerates all product instances.
/// </summary>
/// <param name="ppEnumInstances">An enumeration of all product
/// instances.</param>
/// <returns>Standard HRESULT indicating success or failure.</returns>
STDMETHOD(EnumAllInstances)(_Out_ IEnumSetupInstances **ppEnumInstances) = 0;
};
#endif
EXTERN_C const IID IID_ISetupPackageReference;
#if defined(__cplusplus) && !defined(CINTERFACE)
/// <summary>
/// A reference to a package.
/// </summary>
struct DECLSPEC_UUID("da8d8a16-b2b6-4487-a2f1-594ccccd6bf5")
DECLSPEC_NOVTABLE ISetupPackageReference : public IUnknown {
/// <summary>
/// Gets the general package identifier.
/// </summary>
/// <param name="pbstrId">The general package identifier.</param>
/// <returns>Standard HRESULT indicating success or failure.</returns>
STDMETHOD(GetId)(_Out_ BSTR *pbstrId) = 0;
/// <summary>
/// Gets the version of the package.
/// </summary>
/// <param name="pbstrVersion">The version of the package.</param>
/// <returns>Standard HRESULT indicating success or failure.</returns>
STDMETHOD(GetVersion)(_Out_ BSTR *pbstrVersion) = 0;
/// <summary>
/// Gets the target process architecture of the package.
/// </summary>
/// <param name="pbstrChip">The target process architecture of the
/// package.</param>
/// <returns>Standard HRESULT indicating success or failure.</returns>
STDMETHOD(GetChip)(_Out_ BSTR *pbstrChip) = 0;
/// <summary>
/// Gets the language and optional region identifier.
/// </summary>
/// <param name="pbstrLanguage">The language and optional region
/// identifier.</param>
/// <returns>Standard HRESULT indicating success or failure.</returns>
STDMETHOD(GetLanguage)(_Out_ BSTR *pbstrLanguage) = 0;
/// <summary>
/// Gets the build branch of the package.
/// </summary>
/// <param name="pbstrBranch">The build branch of the package.</param>
/// <returns>Standard HRESULT indicating success or failure.</returns>
STDMETHOD(GetBranch)(_Out_ BSTR *pbstrBranch) = 0;
/// <summary>
/// Gets the type of the package.
/// </summary>
/// <param name="pbstrType">The type of the package.</param>
/// <returns>Standard HRESULT indicating success or failure.</returns>
STDMETHOD(GetType)(_Out_ BSTR *pbstrType) = 0;
/// <summary>
/// Gets the unique identifier consisting of all defined tokens.
/// </summary>
/// <param name="pbstrUniqueId">The unique identifier consisting of all
/// defined tokens.</param>
/// <returns>Standard HRESULT indicating success or failure, including
/// E_UNEXPECTED if no Id was defined (required).</returns>
STDMETHOD(GetUniqueId)(_Out_ BSTR *pbstrUniqueId) = 0;
};
#endif
EXTERN_C const IID IID_ISetupHelper;
#if defined(__cplusplus) && !defined(CINTERFACE)
/// <summary>
/// Helper functions.
/// </summary>
/// <remarks>
/// You can query for this interface from the <see cref="SetupConfiguration"/>
/// class.
/// </remarks>
struct DECLSPEC_UUID("42b21b78-6192-463e-87bf-d577838f1d5c")
DECLSPEC_NOVTABLE ISetupHelper : public IUnknown {
/// <summary>
/// Parses a dotted quad version string into a 64-bit unsigned integer.
/// </summary>
/// <param name="pwszVersion">The dotted quad version string to parse, e.g.
/// 1.2.3.4.</param>
/// <param name="pullVersion">A 64-bit unsigned integer representing the
/// version. You can compare this to other versions.</param>
/// <returns>Standard HRESULT indicating success or failure.</returns>
STDMETHOD(ParseVersion)
(_In_ LPCOLESTR pwszVersion, _Out_ PULONGLONG pullVersion) = 0;
/// <summary>
/// Parses a dotted quad version string into a 64-bit unsigned integer.
/// </summary>
/// <param name="pwszVersionRange">The string containing 1 or 2 dotted quad
/// version strings to parse, e.g. [1.0,) that means 1.0.0.0 or newer.</param>
/// <param name="pullMinVersion">A 64-bit unsigned integer representing the
/// minimum version, which may be 0. You can compare this to other
/// versions.</param>
/// <param name="pullMaxVersion">A 64-bit unsigned integer representing the
/// maximum version, which may be MAXULONGLONG. You can compare this to other
/// versions.</param>
/// <returns>Standard HRESULT indicating success or failure.</returns>
STDMETHOD(ParseVersionRange)
(_In_ LPCOLESTR pwszVersionRange, _Out_ PULONGLONG pullMinVersion,
_Out_ PULONGLONG pullMaxVersion) = 0;
};
#endif
// Class declarations
//
EXTERN_C const CLSID CLSID_SetupConfiguration;
#ifdef __cplusplus
/// <summary>
/// This class implements <see cref="ISetupConfiguration"/>, <see
/// cref="ISetupConfiguration2"/>, and <see cref="ISetupHelper"/>.
/// </summary>
class DECLSPEC_UUID("177F0C4A-1CD3-4DE7-A32C-71DBBB9FA36D") SetupConfiguration;
#endif
// Function declarations
//
/// <summary>
/// Gets an <see cref="ISetupConfiguration"/> that provides information about
/// product instances installed on the machine.
/// </summary>
/// <param name="ppConfiguration">The <see cref="ISetupConfiguration"/> that
/// provides information about product instances installed on the
/// machine.</param>
/// <param name="pReserved">Reserved for future use.</param>
/// <returns>Standard HRESULT indicating success or failure.</returns>
STDMETHODIMP GetSetupConfiguration(_Out_ ISetupConfiguration **ppConfiguration,
_Reserved_ LPVOID pReserved);
#ifdef __cplusplus
}
#endif
#ifdef __clang__
#pragma clang diagnostic pop
#endif
PK hwFZ2a^�� � WindowsDriver/MSVCPaths.hnu �[��� //===-- MSVCPaths.h - MSVC path-parsing helpers -----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_WINDOWSDRIVER_MSVCPATHS_H
#define LLVM_WINDOWSDRIVER_MSVCPATHS_H
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/TargetParser/Triple.h"
#include <optional>
#include <string>
namespace llvm {
namespace vfs {
class FileSystem;
}
enum class SubDirectoryType {
Bin,
Include,
Lib,
};
enum class ToolsetLayout {
OlderVS,
VS2017OrNewer,
DevDivInternal,
};
// Windows SDKs and VC Toolchains group their contents into subdirectories based
// on the target architecture. This function converts an llvm::Triple::ArchType
// to the corresponding subdirectory name.
const char *archToWindowsSDKArch(llvm::Triple::ArchType Arch);
// Similar to the above function, but for Visual Studios before VS2017.
const char *archToLegacyVCArch(llvm::Triple::ArchType Arch);
// Similar to the above function, but for DevDiv internal builds.
const char *archToDevDivInternalArch(llvm::Triple::ArchType Arch);
bool appendArchToWindowsSDKLibPath(int SDKMajor, llvm::SmallString<128> LibPath,
llvm::Triple::ArchType Arch,
std::string &path);
// Get the path to a specific subdirectory in the current toolchain for
// a given target architecture.
// VS2017 changed the VC toolchain layout, so this should be used instead
// of hardcoding paths.
std::string getSubDirectoryPath(SubDirectoryType Type, ToolsetLayout VSLayout,
const std::string &VCToolChainPath,
llvm::Triple::ArchType TargetArch,
llvm::StringRef SubdirParent = "");
// Check if the Include path of a specified version of Visual Studio contains
// specific header files. If not, they are probably shipped with Universal CRT.
bool useUniversalCRT(ToolsetLayout VSLayout, const std::string &VCToolChainPath,
llvm::Triple::ArchType TargetArch,
llvm::vfs::FileSystem &VFS);
/// Get Windows SDK installation directory.
bool getWindowsSDKDir(vfs::FileSystem &VFS,
std::optional<llvm::StringRef> WinSdkDir,
std::optional<llvm::StringRef> WinSdkVersion,
std::optional<llvm::StringRef> WinSysRoot,
std::string &Path, int &Major,
std::string &WindowsSDKIncludeVersion,
std::string &WindowsSDKLibVersion);
bool getUniversalCRTSdkDir(vfs::FileSystem &VFS,
std::optional<llvm::StringRef> WinSdkDir,
std::optional<llvm::StringRef> WinSdkVersion,
std::optional<llvm::StringRef> WinSysRoot,
std::string &Path, std::string &UCRTVersion);
// Check command line arguments to try and find a toolchain.
bool findVCToolChainViaCommandLine(
vfs::FileSystem &VFS, std::optional<llvm::StringRef> VCToolsDir,
std::optional<llvm::StringRef> VCToolsVersion,
std::optional<llvm::StringRef> WinSysRoot, std::string &Path,
ToolsetLayout &VSLayout);
// Check various environment variables to try and find a toolchain.
bool findVCToolChainViaEnvironment(vfs::FileSystem &VFS, std::string &Path,
ToolsetLayout &VSLayout);
// Query the Setup Config server for installs, then pick the newest version
// and find its default VC toolchain. If `VCToolsVersion` is specified, that
// version is preferred over the latest version.
//
// This is the preferred way to discover new Visual Studios, as they're no
// longer listed in the registry.
bool
findVCToolChainViaSetupConfig(vfs::FileSystem &VFS,
std::optional<llvm::StringRef> VCToolsVersion,
std::string &Path, ToolsetLayout &VSLayout);
// Look in the registry for Visual Studio installs, and use that to get
// a toolchain path. VS2017 and newer don't get added to the registry.
// So if we find something here, we know that it's an older version.
bool findVCToolChainViaRegistry(std::string &Path, ToolsetLayout &VSLayout);
} // namespace llvm
#endif
PK hwFZZl)+_ _ Testing/Support/Error.hnu �[��� //===- llvm/Testing/Support/Error.h ---------------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TESTING_SUPPORT_ERROR_H
#define LLVM_TESTING_SUPPORT_ERROR_H
#include "llvm/Support/Error.h"
#include "llvm/Testing/Support/SupportHelpers.h"
#include "gmock/gmock.h"
#include <ostream>
namespace llvm {
namespace detail {
ErrorHolder TakeError(Error Err);
template <typename T> ExpectedHolder<T> TakeExpected(Expected<T> &Exp) {
return {TakeError(Exp.takeError()), Exp};
}
template <typename T> ExpectedHolder<T> TakeExpected(Expected<T> &&Exp) {
return TakeExpected(Exp);
}
template <typename T>
class ValueMatchesMono
: public testing::MatcherInterface<const ExpectedHolder<T> &> {
public:
explicit ValueMatchesMono(const testing::Matcher<T> &Matcher)
: Matcher(Matcher) {}
bool MatchAndExplain(const ExpectedHolder<T> &Holder,
testing::MatchResultListener *listener) const override {
if (!Holder.Success())
return false;
bool result = Matcher.MatchAndExplain(*Holder.Exp, listener);
if (result || !listener->IsInterested())
return result;
*listener << "(";
Matcher.DescribeNegationTo(listener->stream());
*listener << ")";
return result;
}
void DescribeTo(std::ostream *OS) const override {
*OS << "succeeded with value (";
Matcher.DescribeTo(OS);
*OS << ")";
}
void DescribeNegationTo(std::ostream *OS) const override {
*OS << "did not succeed or value (";
Matcher.DescribeNegationTo(OS);
*OS << ")";
}
private:
testing::Matcher<T> Matcher;
};
template<typename M>
class ValueMatchesPoly {
public:
explicit ValueMatchesPoly(const M &Matcher) : Matcher(Matcher) {}
template <typename T>
operator testing::Matcher<const ExpectedHolder<T> &>() const {
return MakeMatcher(
new ValueMatchesMono<T>(testing::SafeMatcherCast<T>(Matcher)));
}
private:
M Matcher;
};
template <typename InfoT>
class ErrorMatchesMono : public testing::MatcherInterface<const ErrorHolder &> {
public:
explicit ErrorMatchesMono(std::optional<testing::Matcher<InfoT &>> Matcher)
: Matcher(std::move(Matcher)) {}
bool MatchAndExplain(const ErrorHolder &Holder,
testing::MatchResultListener *listener) const override {
if (Holder.Success())
return false;
if (Holder.Infos.size() > 1) {
*listener << "multiple errors";
return false;
}
auto &Info = *Holder.Infos[0];
if (!Info.isA<InfoT>()) {
*listener << "Error was not of given type";
return false;
}
if (!Matcher)
return true;
return Matcher->MatchAndExplain(static_cast<InfoT &>(Info), listener);
}
void DescribeTo(std::ostream *OS) const override {
*OS << "failed with Error of given type";
if (Matcher) {
*OS << " and the error ";
Matcher->DescribeTo(OS);
}
}
void DescribeNegationTo(std::ostream *OS) const override {
*OS << "succeeded or did not fail with the error of given type";
if (Matcher) {
*OS << " or the error ";
Matcher->DescribeNegationTo(OS);
}
}
private:
std::optional<testing::Matcher<InfoT &>> Matcher;
};
class ErrorMessageMatches
: public testing::MatcherInterface<const ErrorHolder &> {
public:
explicit ErrorMessageMatches(
testing::Matcher<std::vector<std::string>> Matcher)
: Matcher(std::move(Matcher)) {}
bool MatchAndExplain(const ErrorHolder &Holder,
testing::MatchResultListener *listener) const override {
std::vector<std::string> Messages;
Messages.reserve(Holder.Infos.size());
for (const std::shared_ptr<ErrorInfoBase> &Info : Holder.Infos)
Messages.push_back(Info->message());
return Matcher.MatchAndExplain(Messages, listener);
}
void DescribeTo(std::ostream *OS) const override {
*OS << "failed with Error whose message ";
Matcher.DescribeTo(OS);
}
void DescribeNegationTo(std::ostream *OS) const override {
*OS << "failed with an Error whose message ";
Matcher.DescribeNegationTo(OS);
}
private:
testing::Matcher<std::vector<std::string>> Matcher;
};
} // namespace detail
#define EXPECT_THAT_ERROR(Err, Matcher) \
EXPECT_THAT(llvm::detail::TakeError(Err), Matcher)
#define ASSERT_THAT_ERROR(Err, Matcher) \
ASSERT_THAT(llvm::detail::TakeError(Err), Matcher)
/// Helper macro for checking the result of an 'Expected<T>'
///
/// @code{.cpp}
/// // function to be tested
/// Expected<int> myDivide(int A, int B);
///
/// TEST(myDivideTests, GoodAndBad) {
/// // test good case
/// // if you only care about success or failure:
/// EXPECT_THAT_EXPECTED(myDivide(10, 5), Succeeded());
/// // if you also care about the value:
/// EXPECT_THAT_EXPECTED(myDivide(10, 5), HasValue(2));
///
/// // test the error case
/// EXPECT_THAT_EXPECTED(myDivide(10, 0), Failed());
/// // also check the error message
/// EXPECT_THAT_EXPECTED(myDivide(10, 0),
/// FailedWithMessage("B must not be zero!"));
/// }
/// @endcode
#define EXPECT_THAT_EXPECTED(Err, Matcher) \
EXPECT_THAT(llvm::detail::TakeExpected(Err), Matcher)
#define ASSERT_THAT_EXPECTED(Err, Matcher) \
ASSERT_THAT(llvm::detail::TakeExpected(Err), Matcher)
MATCHER(Succeeded, "") { return arg.Success(); }
MATCHER(Failed, "") { return !arg.Success(); }
template <typename InfoT>
testing::Matcher<const detail::ErrorHolder &> Failed() {
return MakeMatcher(new detail::ErrorMatchesMono<InfoT>(std::nullopt));
}
template <typename InfoT, typename M>
testing::Matcher<const detail::ErrorHolder &> Failed(M Matcher) {
return MakeMatcher(new detail::ErrorMatchesMono<InfoT>(
testing::SafeMatcherCast<InfoT &>(Matcher)));
}
template <typename... M>
testing::Matcher<const detail::ErrorHolder &> FailedWithMessage(M... Matcher) {
static_assert(sizeof...(M) > 0);
return MakeMatcher(
new detail::ErrorMessageMatches(testing::ElementsAre(Matcher...)));
}
template <typename M>
testing::Matcher<const detail::ErrorHolder &> FailedWithMessageArray(M Matcher) {
return MakeMatcher(new detail::ErrorMessageMatches(Matcher));
}
template <typename M>
detail::ValueMatchesPoly<M> HasValue(M Matcher) {
return detail::ValueMatchesPoly<M>(Matcher);
}
} // namespace llvm
#endif
PK hwFZU @�R R Testing/Support/SupportHelpers.hnu �[��� //===- Testing/Support/SupportHelpers.h -----------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TESTING_SUPPORT_SUPPORTHELPERS_H
#define LLVM_TESTING_SUPPORT_SUPPORTHELPERS_H
#include "llvm/ADT/SmallString.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/FileSystem.h"
#include "llvm/Support/Path.h"
#include "llvm/Support/raw_os_ostream.h"
#include "gmock/gmock-matchers.h"
#include "gtest/gtest-printers.h"
#include <optional>
#include <string>
namespace llvm {
namespace detail {
struct ErrorHolder {
std::vector<std::shared_ptr<ErrorInfoBase>> Infos;
bool Success() const { return Infos.empty(); }
};
template <typename T> struct ExpectedHolder : public ErrorHolder {
ExpectedHolder(ErrorHolder Err, Expected<T> &Exp)
: ErrorHolder(std::move(Err)), Exp(Exp) {}
Expected<T> &Exp;
};
inline void PrintTo(const ErrorHolder &Err, std::ostream *Out) {
raw_os_ostream OS(*Out);
OS << (Err.Success() ? "succeeded" : "failed");
if (!Err.Success()) {
const char *Delim = " (";
for (const auto &Info : Err.Infos) {
OS << Delim;
Delim = "; ";
Info->log(OS);
}
OS << ")";
}
}
template <typename T>
void PrintTo(const ExpectedHolder<T> &Item, std::ostream *Out) {
if (Item.Success()) {
*Out << "succeeded with value " << ::testing::PrintToString(*Item.Exp);
} else {
PrintTo(static_cast<const ErrorHolder &>(Item), Out);
}
}
template <class InnerMatcher> class ValueIsMatcher {
public:
explicit ValueIsMatcher(InnerMatcher ValueMatcher)
: ValueMatcher(ValueMatcher) {}
template <class T>
operator ::testing::Matcher<const std::optional<T> &>() const {
return ::testing::MakeMatcher(
new Impl<T>(::testing::SafeMatcherCast<T>(ValueMatcher)));
}
template <class T, class O = std::optional<T>>
class Impl : public ::testing::MatcherInterface<const O &> {
public:
explicit Impl(const ::testing::Matcher<T> &ValueMatcher)
: ValueMatcher(ValueMatcher) {}
bool MatchAndExplain(const O &Input,
testing::MatchResultListener *L) const override {
return Input && ValueMatcher.MatchAndExplain(*Input, L);
}
void DescribeTo(std::ostream *OS) const override {
*OS << "has a value that ";
ValueMatcher.DescribeTo(OS);
}
void DescribeNegationTo(std::ostream *OS) const override {
*OS << "does not have a value that ";
ValueMatcher.DescribeTo(OS);
}
private:
testing::Matcher<T> ValueMatcher;
};
private:
InnerMatcher ValueMatcher;
};
} // namespace detail
/// Matches an std::optional<T> with a value that conforms to an inner matcher.
/// To match std::nullopt you could use Eq(std::nullopt).
template <class InnerMatcher>
detail::ValueIsMatcher<InnerMatcher> ValueIs(const InnerMatcher &ValueMatcher) {
return detail::ValueIsMatcher<InnerMatcher>(ValueMatcher);
}
namespace unittest {
SmallString<128> getInputFileDirectory(const char *Argv0);
/// A RAII object that creates a temporary directory upon initialization and
/// removes it upon destruction.
class TempDir {
SmallString<128> Path;
public:
/// Creates a managed temporary directory.
///
/// @param Name The name of the directory to create.
/// @param Unique If true, the directory will be created using
/// llvm::sys::fs::createUniqueDirectory.
explicit TempDir(StringRef Name, bool Unique = false) {
std::error_code EC;
if (Unique) {
EC = llvm::sys::fs::createUniqueDirectory(Name, Path);
if (!EC) {
// Resolve any symlinks in the new directory.
std::string UnresolvedPath(Path.str());
EC = llvm::sys::fs::real_path(UnresolvedPath, Path);
}
} else {
Path = Name;
EC = llvm::sys::fs::create_directory(Path);
}
if (EC)
Path.clear();
EXPECT_FALSE(EC) << EC.message();
}
~TempDir() {
if (!Path.empty()) {
EXPECT_FALSE(llvm::sys::fs::remove_directories(Path.str()));
}
}
TempDir(const TempDir &) = delete;
TempDir &operator=(const TempDir &) = delete;
TempDir(TempDir &&) = default;
TempDir &operator=(TempDir &&) = default;
/// The path to the temporary directory.
StringRef path() const { return Path; }
/// The null-terminated C string pointing to the path.
const char *c_str() { return Path.c_str(); }
/// Creates a new path by appending the argument to the path of the managed
/// directory using the native path separator.
SmallString<128> path(StringRef component) const {
SmallString<128> Result(Path);
SmallString<128> ComponentToAppend(component);
llvm::sys::path::native(ComponentToAppend);
llvm::sys::path::append(Result, Twine(ComponentToAppend));
return Result;
}
};
/// A RAII object that creates a link upon initialization and
/// removes it upon destruction.
///
/// The link may be a soft or a hard link, depending on the platform.
class TempLink {
SmallString<128> Path;
public:
/// Creates a managed link at path Link pointing to Target.
TempLink(StringRef Target, StringRef Link) {
Path = Link;
std::error_code EC = sys::fs::create_link(Target, Link);
if (EC)
Path.clear();
EXPECT_FALSE(EC);
}
~TempLink() {
if (!Path.empty()) {
EXPECT_FALSE(llvm::sys::fs::remove(Path.str()));
}
}
TempLink(const TempLink &) = delete;
TempLink &operator=(const TempLink &) = delete;
TempLink(TempLink &&) = default;
TempLink &operator=(TempLink &&) = default;
/// The path to the link.
StringRef path() const { return Path; }
};
/// A RAII object that creates a file upon initialization and
/// removes it upon destruction.
class TempFile {
SmallString<128> Path;
public:
/// Creates a managed file.
///
/// @param Name The name of the file to create.
/// @param Contents The string to write to the file.
/// @param Unique If true, the file will be created using
/// llvm::sys::fs::createTemporaryFile.
TempFile(StringRef Name, StringRef Suffix = "", StringRef Contents = "",
bool Unique = false) {
std::error_code EC;
int fd;
if (Unique) {
EC = llvm::sys::fs::createTemporaryFile(Name, Suffix, fd, Path);
} else {
Path = Name;
if (!Suffix.empty()) {
Path.append(".");
Path.append(Suffix);
}
EC = llvm::sys::fs::openFileForWrite(Path, fd);
}
EXPECT_FALSE(EC);
raw_fd_ostream OS(fd, /*shouldClose*/ true);
OS << Contents;
OS.flush();
EXPECT_FALSE(OS.error());
if (EC || OS.error())
Path.clear();
}
~TempFile() {
if (!Path.empty()) {
EXPECT_FALSE(llvm::sys::fs::remove(Path.str()));
}
}
TempFile(const TempFile &) = delete;
TempFile &operator=(const TempFile &) = delete;
TempFile(TempFile &&) = default;
TempFile &operator=(TempFile &&) = default;
/// The path to the file.
StringRef path() const { return Path; }
};
} // namespace unittest
} // namespace llvm
#endif
PK hwFZqT~�� � Testing/Support/Annotations.hnu �[��� //===--- Annotations.h - Annotated source code for tests ---------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TESTING_SUPPORT_ANNOTATIONS_H
#define LLVM_TESTING_SUPPORT_ANNOTATIONS_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include <tuple>
#include <vector>
namespace llvm {
class raw_ostream;
/// Annotations lets you mark points and ranges inside source code, for tests:
///
/// Annotations Example(R"cpp(
/// int complete() { x.pri^ } // ^ indicates a point
/// void err() { [["hello" == 42]]; } // [[this is a range]]
/// $definition^class Foo{}; // points can be named: "definition"
/// $fail[[static_assert(false, "")]] // ranges can be named too: "fail"
/// )cpp");
///
/// StringRef Code = Example.code(); // annotations stripped.
/// std::vector<size_t> PP = Example.points(); // all unnamed points
/// size_t P = Example.point(); // there must be exactly one
/// llvm::Range R = Example.range("fail"); // find named ranges
///
/// Points/ranges are coordinated into `code()` which is stripped of
/// annotations.
///
/// Ranges may be nested (and points can be inside ranges), but there's no way
/// to define general overlapping ranges.
///
/// FIXME: the choice of the marking syntax makes it impossible to represent
/// some of the C++ and Objective C constructs (including common ones
/// like C++ attributes). We can fix this by:
/// 1. introducing an escaping mechanism for the special characters,
/// 2. making characters for marking points and ranges configurable,
/// 3. changing the syntax to something less commonly used,
/// 4. ...
class Annotations {
public:
/// Two offsets pointing to a continuous substring. End is not included, i.e.
/// represents a half-open range.
struct Range {
size_t Begin = 0;
size_t End = 0;
friend bool operator==(const Range &L, const Range &R) {
return std::tie(L.Begin, L.End) == std::tie(R.Begin, R.End);
}
friend bool operator!=(const Range &L, const Range &R) { return !(L == R); }
};
/// Parses the annotations from Text. Crashes if it's malformed.
Annotations(llvm::StringRef Text);
/// The input text with all annotations stripped.
/// All points and ranges are relative to this stripped text.
llvm::StringRef code() const { return Code; }
/// Returns the position of the point marked by ^ (or $name^) in the text.
/// Crashes if there isn't exactly one.
size_t point(llvm::StringRef Name = "") const;
/// Returns the position of all points marked by ^ (or $name^) in the text.
/// Order matches the order within the text.
std::vector<size_t> points(llvm::StringRef Name = "") const;
/// Returns the location of the range marked by [[ ]] (or $name[[ ]]).
/// Crashes if there isn't exactly one.
Range range(llvm::StringRef Name = "") const;
/// Returns the location of all ranges marked by [[ ]] (or $name[[ ]]).
/// They are ordered by start position within the text.
std::vector<Range> ranges(llvm::StringRef Name = "") const;
private:
std::string Code;
llvm::StringMap<llvm::SmallVector<size_t, 1>> Points;
llvm::StringMap<llvm::SmallVector<Range, 1>> Ranges;
};
llvm::raw_ostream &operator<<(llvm::raw_ostream &O,
const llvm::Annotations::Range &R);
} // namespace llvm
#endif
PK hwFZ��/�G G ! Testing/Annotations/Annotations.hnu �[��� //===--- Annotations.h - Annotated source code for tests ---------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TESTING_SUPPORT_ANNOTATIONS_H
#define LLVM_TESTING_SUPPORT_ANNOTATIONS_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include <tuple>
#include <vector>
namespace llvm {
class raw_ostream;
/// Annotations lets you mark points and ranges inside source code, for tests:
///
/// Annotations Example(R"cpp(
/// int complete() { x.pri^ } // ^ indicates a point
/// void err() { [["hello" == 42]]; } // [[this is a range]]
/// $definition^class Foo{}; // points can be named: "definition"
/// $(foo)^class Foo{}; // ...or have a payload: "foo"
/// $definition(foo)^class Foo{}; // ...or both
/// $fail(runtime)[[assert(false)]] // ranges can have names/payloads too
/// )cpp");
///
/// StringRef Code = Example.code(); // annotations stripped.
/// std::vector<size_t> PP = Example.points(); // all unnamed points
/// size_t P = Example.point(); // there must be exactly one
/// llvm::Range R = Example.range("fail"); // find named ranges
///
/// Points/ranges are coordinated into `code()` which is stripped of
/// annotations.
///
/// Names consist of only alphanumeric characters or '_'.
/// Payloads can contain any character expect '(' and ')'.
///
/// Ranges may be nested (and points can be inside ranges), but there's no way
/// to define general overlapping ranges.
///
/// FIXME: the choice of the marking syntax makes it impossible to represent
/// some of the C++ and Objective C constructs (including common ones
/// like C++ attributes). We can fix this by:
/// 1. introducing an escaping mechanism for the special characters,
/// 2. making characters for marking points and ranges configurable,
/// 3. changing the syntax to something less commonly used,
/// 4. ...
class Annotations {
public:
/// Two offsets pointing to a continuous substring. End is not included, i.e.
/// represents a half-open range.
struct Range {
size_t Begin = 0;
size_t End = 0;
friend bool operator==(const Range &L, const Range &R) {
return std::tie(L.Begin, L.End) == std::tie(R.Begin, R.End);
}
friend bool operator!=(const Range &L, const Range &R) { return !(L == R); }
};
/// Parses the annotations from Text. Crashes if it's malformed.
Annotations(llvm::StringRef Text);
/// The input text with all annotations stripped.
/// All points and ranges are relative to this stripped text.
llvm::StringRef code() const { return Code; }
/// Returns the position of the point marked by ^ (or $name^) in the text.
/// Crashes if there isn't exactly one.
size_t point(llvm::StringRef Name = "") const;
/// Returns the position of the point with \p Name and its payload (if any).
std::pair<size_t, llvm::StringRef>
pointWithPayload(llvm::StringRef Name = "") const;
/// Returns the position of all points marked by ^ (or $name^) in the text.
/// Order matches the order within the text.
std::vector<size_t> points(llvm::StringRef Name = "") const;
/// Returns the positions and payloads (if any) of all points named \p Name
std::vector<std::pair<size_t, llvm::StringRef>>
pointsWithPayload(llvm::StringRef Name = "") const;
/// Returns the mapping of all names of points marked in the text to their
/// position. Unnamed points are mapped to the empty string. The positions are
/// sorted.
/// FIXME Remove this and expose `All` directly (currently used out-of-tree)
llvm::StringMap<llvm::SmallVector<size_t, 1>> all_points() const;
/// Returns the location of the range marked by [[ ]] (or $name[[ ]]).
/// Crashes if there isn't exactly one.
Range range(llvm::StringRef Name = "") const;
/// Returns the location and payload of the range marked by [[ ]]
/// (or $name(payload)[[ ]]). Crashes if there isn't exactly one.
std::pair<Range, llvm::StringRef>
rangeWithPayload(llvm::StringRef Name = "") const;
/// Returns the location of all ranges marked by [[ ]] (or $name[[ ]]).
/// They are ordered by start position within the text.
std::vector<Range> ranges(llvm::StringRef Name = "") const;
/// Returns the location of all ranges marked by [[ ]]
/// (or $name(payload)[[ ]]).
/// They are ordered by start position within the text.
std::vector<std::pair<Range, llvm::StringRef>>
rangesWithPayload(llvm::StringRef Name = "") const;
/// Returns the mapping of all names of ranges marked in the text to their
/// location. Unnamed ranges are mapped to the empty string. The ranges are
/// sorted by their start position.
llvm::StringMap<llvm::SmallVector<Range, 1>> all_ranges() const;
private:
std::string Code;
/// Either a Point (Only Start) or a Range (Start and End)
struct Annotation {
size_t Begin;
size_t End = -1;
bool isPoint() const { return End == size_t(-1); }
llvm::StringRef Name;
llvm::StringRef Payload;
};
std::vector<Annotation> All;
// Values are the indices into All
llvm::StringMap<llvm::SmallVector<size_t, 1>> Points;
llvm::StringMap<llvm::SmallVector<size_t, 1>> Ranges;
};
llvm::raw_ostream &operator<<(llvm::raw_ostream &O,
const llvm::Annotations::Range &R);
} // namespace llvm
#endif
PK hwFZ�Ʃ: : Testing/ADT/StringMapEntry.hnu �[��� //===- llvm/Testing/ADT/StringMapEntry.h ----------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TESTING_ADT_STRINGMAPENTRY_H_
#define LLVM_TESTING_ADT_STRINGMAPENTRY_H_
#include "llvm/ADT/StringMapEntry.h"
#include "gmock/gmock.h"
#include <ostream>
#include <type_traits>
namespace llvm {
namespace detail {
template <typename T, typename = std::void_t<>>
struct CanOutputToOStream : std::false_type {};
template <typename T>
struct CanOutputToOStream<T, std::void_t<decltype(std::declval<std::ostream &>()
<< std::declval<T>())>>
: std::true_type {};
} // namespace detail
/// Support for printing to std::ostream, for use with e.g. producing more
/// useful error messages with Google Test.
template <typename T>
std::ostream &operator<<(std::ostream &OS, const StringMapEntry<T> &E) {
OS << "{\"" << E.getKey().data() << "\": ";
if constexpr (detail::CanOutputToOStream<decltype(E.getValue())>::value) {
OS << E.getValue();
} else {
OS << "non-printable value";
}
return OS << "}";
}
namespace detail {
template <typename StringMapEntryT>
class StringMapEntryMatcherImpl
: public testing::MatcherInterface<StringMapEntryT> {
public:
using ValueT = typename std::remove_reference_t<StringMapEntryT>::ValueType;
template <typename KeyMatcherT, typename ValueMatcherT>
StringMapEntryMatcherImpl(KeyMatcherT KeyMatcherArg,
ValueMatcherT ValueMatcherArg)
: KeyMatcher(
testing::SafeMatcherCast<const std::string &>(KeyMatcherArg)),
ValueMatcher(
testing::SafeMatcherCast<const ValueT &>(ValueMatcherArg)) {}
void DescribeTo(std::ostream *OS) const override {
*OS << "has a string key that ";
KeyMatcher.DescribeTo(OS);
*OS << ", and has a value that ";
ValueMatcher.DescribeTo(OS);
}
void DescribeNegationTo(std::ostream *OS) const override {
*OS << "has a string key that ";
KeyMatcher.DescribeNegationTo(OS);
*OS << ", or has a value that ";
ValueMatcher.DescribeNegationTo(OS);
}
bool
MatchAndExplain(StringMapEntryT Entry,
testing::MatchResultListener *ResultListener) const override {
testing::StringMatchResultListener KeyListener;
if (!KeyMatcher.MatchAndExplain(Entry.getKey().data(), &KeyListener)) {
*ResultListener << ("which has a string key " +
(KeyListener.str().empty() ? "that doesn't match"
: KeyListener.str()));
return false;
}
testing::StringMatchResultListener ValueListener;
if (!ValueMatcher.MatchAndExplain(Entry.getValue(), &ValueListener)) {
*ResultListener << ("which has a value " + (ValueListener.str().empty()
? "that doesn't match"
: ValueListener.str()));
return false;
}
*ResultListener << "which is a match";
return true;
}
private:
const testing::Matcher<const std::string &> KeyMatcher;
const testing::Matcher<const ValueT &> ValueMatcher;
};
template <typename KeyMatcherT, typename ValueMatcherT>
class StringMapEntryMatcher {
public:
StringMapEntryMatcher(KeyMatcherT KMArg, ValueMatcherT VMArg)
: KM(std::move(KMArg)), VM(std::move(VMArg)) {}
template <typename StringMapEntryT>
operator testing::Matcher<StringMapEntryT>() const { // NOLINT
return testing::Matcher<StringMapEntryT>(
new StringMapEntryMatcherImpl<const StringMapEntryT &>(KM, VM));
}
private:
const KeyMatcherT KM;
const ValueMatcherT VM;
};
} // namespace detail
/// Returns a gMock matcher that matches a `StringMapEntry` whose string key
/// matches `KeyMatcher`, and whose value matches `ValueMatcher`.
template <typename KeyMatcherT, typename ValueMatcherT>
detail::StringMapEntryMatcher<KeyMatcherT, ValueMatcherT>
IsStringMapEntry(KeyMatcherT KM, ValueMatcherT VM) {
return detail::StringMapEntryMatcher<KeyMatcherT, ValueMatcherT>(
std::move(KM), std::move(VM));
}
} // namespace llvm
#endif
PK hwFZ!��$ $ Testing/ADT/StringMap.hnu �[��� //===- llvm/Testing/ADT/StringMap.h ---------------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TESTING_ADT_STRINGMAP_H_
#define LLVM_TESTING_ADT_STRINGMAP_H_
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/Support/FormatVariadic.h"
#include "llvm/Testing/ADT/StringMapEntry.h"
#include <ostream>
#include <sstream>
namespace llvm {
/// Support for printing to std::ostream, for use with e.g. producing more
/// useful error messages with Google Test.
template <typename T>
std::ostream &operator<<(std::ostream &OS, const StringMap<T> &M) {
if (M.empty()) {
return OS << "{ }";
}
std::vector<std::string> Lines;
for (const auto &E : M) {
std::ostringstream SS;
SS << E << ",";
Lines.push_back(SS.str());
}
llvm::sort(Lines);
Lines.insert(Lines.begin(), "{");
Lines.insert(Lines.end(), "}");
return OS << llvm::formatv("{0:$[\n]}",
make_range(Lines.begin(), Lines.end()))
.str();
}
} // namespace llvm
#endif
PK hwFZ-� � % DebugInfo/DWARF/DWARFDebugArangeSet.hnu �[��� //===- DWARFDebugArangeSet.h ------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFDEBUGARANGESET_H
#define LLVM_DEBUGINFO_DWARF_DWARFDEBUGARANGESET_H
#include "llvm/ADT/iterator_range.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <vector>
namespace llvm {
class raw_ostream;
class DWARFDataExtractor;
class DWARFDebugArangeSet {
public:
struct Header {
/// The total length of the entries for that set, not including the length
/// field itself.
uint64_t Length;
/// The DWARF format of the set.
dwarf::DwarfFormat Format;
/// The offset from the beginning of the .debug_info section of the
/// compilation unit entry referenced by the table.
uint64_t CuOffset;
/// The DWARF version number.
uint16_t Version;
/// The size in bytes of an address on the target architecture. For segmented
/// addressing, this is the size of the offset portion of the address.
uint8_t AddrSize;
/// The size in bytes of a segment descriptor on the target architecture.
/// If the target system uses a flat address space, this value is 0.
uint8_t SegSize;
};
struct Descriptor {
uint64_t Address;
uint64_t Length;
uint64_t getEndAddress() const { return Address + Length; }
void dump(raw_ostream &OS, uint32_t AddressSize) const;
};
private:
using DescriptorColl = std::vector<Descriptor>;
using desc_iterator_range = iterator_range<DescriptorColl::const_iterator>;
uint64_t Offset;
Header HeaderData;
DescriptorColl ArangeDescriptors;
public:
DWARFDebugArangeSet() { clear(); }
void clear();
Error extract(DWARFDataExtractor data, uint64_t *offset_ptr,
function_ref<void(Error)> WarningHandler);
void dump(raw_ostream &OS) const;
uint64_t getCompileUnitDIEOffset() const { return HeaderData.CuOffset; }
const Header &getHeader() const { return HeaderData; }
desc_iterator_range descriptors() const {
return desc_iterator_range(ArangeDescriptors.begin(),
ArangeDescriptors.end());
}
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFDEBUGARANGESET_H
PK hwFZ� �T�- �- DebugInfo/DWARF/DWARFListTable.hnu �[��� //===- DWARFListTable.h -----------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFLISTTABLE_H
#define LLVM_DEBUGINFO_DWARF_DWARFLISTTABLE_H
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/DebugInfo/DIContext.h"
#include "llvm/DebugInfo/DWARF/DWARFDataExtractor.h"
#include "llvm/Support/Errc.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/raw_ostream.h"
#include <cstdint>
#include <map>
#include <vector>
namespace llvm {
/// A base class for DWARF list entries, such as range or location list
/// entries.
struct DWARFListEntryBase {
/// The offset at which the entry is located in the section.
uint64_t Offset;
/// The DWARF encoding (DW_RLE_* or DW_LLE_*).
uint8_t EntryKind;
/// The index of the section this entry belongs to.
uint64_t SectionIndex;
};
/// A base class for lists of entries that are extracted from a particular
/// section, such as range lists or location lists.
template <typename ListEntryType> class DWARFListType {
using EntryType = ListEntryType;
using ListEntries = std::vector<EntryType>;
protected:
ListEntries Entries;
public:
const ListEntries &getEntries() const { return Entries; }
bool empty() const { return Entries.empty(); }
void clear() { Entries.clear(); }
Error extract(DWARFDataExtractor Data, uint64_t HeaderOffset,
uint64_t *OffsetPtr, StringRef SectionName,
StringRef ListStringName);
};
/// A class representing the header of a list table such as the range list
/// table in the .debug_rnglists section.
class DWARFListTableHeader {
struct Header {
/// The total length of the entries for this table, not including the length
/// field itself.
uint64_t Length = 0;
/// The DWARF version number.
uint16_t Version;
/// The size in bytes of an address on the target architecture. For
/// segmented addressing, this is the size of the offset portion of the
/// address.
uint8_t AddrSize;
/// The size in bytes of a segment selector on the target architecture.
/// If the target system uses a flat address space, this value is 0.
uint8_t SegSize;
/// The number of offsets that follow the header before the range lists.
uint32_t OffsetEntryCount;
};
Header HeaderData;
/// The table's format, either DWARF32 or DWARF64.
dwarf::DwarfFormat Format;
/// The offset at which the header (and hence the table) is located within
/// its section.
uint64_t HeaderOffset;
/// The name of the section the list is located in.
StringRef SectionName;
/// A characterization of the list for dumping purposes, e.g. "range" or
/// "location".
StringRef ListTypeString;
public:
DWARFListTableHeader(StringRef SectionName, StringRef ListTypeString)
: SectionName(SectionName), ListTypeString(ListTypeString) {}
void clear() {
HeaderData = {};
}
uint64_t getHeaderOffset() const { return HeaderOffset; }
uint8_t getAddrSize() const { return HeaderData.AddrSize; }
uint64_t getLength() const { return HeaderData.Length; }
uint16_t getVersion() const { return HeaderData.Version; }
uint32_t getOffsetEntryCount() const { return HeaderData.OffsetEntryCount; }
StringRef getSectionName() const { return SectionName; }
StringRef getListTypeString() const { return ListTypeString; }
dwarf::DwarfFormat getFormat() const { return Format; }
/// Return the size of the table header including the length but not including
/// the offsets.
static uint8_t getHeaderSize(dwarf::DwarfFormat Format) {
switch (Format) {
case dwarf::DwarfFormat::DWARF32:
return 12;
case dwarf::DwarfFormat::DWARF64:
return 20;
}
llvm_unreachable("Invalid DWARF format (expected DWARF32 or DWARF64");
}
void dump(DataExtractor Data, raw_ostream &OS,
DIDumpOptions DumpOpts = {}) const;
std::optional<uint64_t> getOffsetEntry(DataExtractor Data,
uint32_t Index) const {
if (Index >= HeaderData.OffsetEntryCount)
return std::nullopt;
return getOffsetEntry(Data, getHeaderOffset() + getHeaderSize(Format), Format, Index);
}
static std::optional<uint64_t> getOffsetEntry(DataExtractor Data,
uint64_t OffsetTableOffset,
dwarf::DwarfFormat Format,
uint32_t Index) {
uint8_t OffsetByteSize = Format == dwarf::DWARF64 ? 8 : 4;
uint64_t Offset = OffsetTableOffset + OffsetByteSize * Index;
auto R = Data.getUnsigned(&Offset, OffsetByteSize);
return R;
}
/// Extract the table header and the array of offsets.
Error extract(DWARFDataExtractor Data, uint64_t *OffsetPtr);
/// Returns the length of the table, including the length field, or 0 if the
/// length has not been determined (e.g. because the table has not yet been
/// parsed, or there was a problem in parsing).
uint64_t length() const;
};
/// A class representing a table of lists as specified in the DWARF v5
/// standard for location lists and range lists. The table consists of a header
/// followed by an array of offsets into a DWARF section, followed by zero or
/// more list entries. The list entries are kept in a map where the keys are
/// the lists' section offsets.
template <typename DWARFListType> class DWARFListTableBase {
DWARFListTableHeader Header;
/// A mapping between file offsets and lists. It is used to find a particular
/// list based on an offset (obtained from DW_AT_ranges, for example).
std::map<uint64_t, DWARFListType> ListMap;
/// This string is displayed as a heading before the list is dumped
/// (e.g. "ranges:").
StringRef HeaderString;
protected:
DWARFListTableBase(StringRef SectionName, StringRef HeaderString,
StringRef ListTypeString)
: Header(SectionName, ListTypeString), HeaderString(HeaderString) {}
public:
void clear() {
Header.clear();
ListMap.clear();
}
/// Extract the table header and the array of offsets.
Error extractHeaderAndOffsets(DWARFDataExtractor Data, uint64_t *OffsetPtr) {
return Header.extract(Data, OffsetPtr);
}
/// Extract an entire table, including all list entries.
Error extract(DWARFDataExtractor Data, uint64_t *OffsetPtr);
/// Look up a list based on a given offset. Extract it and enter it into the
/// list map if necessary.
Expected<DWARFListType> findList(DWARFDataExtractor Data,
uint64_t Offset) const;
uint64_t getHeaderOffset() const { return Header.getHeaderOffset(); }
uint8_t getAddrSize() const { return Header.getAddrSize(); }
uint32_t getOffsetEntryCount() const { return Header.getOffsetEntryCount(); }
dwarf::DwarfFormat getFormat() const { return Header.getFormat(); }
void
dump(DWARFDataExtractor Data, raw_ostream &OS,
llvm::function_ref<std::optional<object::SectionedAddress>(uint32_t)>
LookupPooledAddress,
DIDumpOptions DumpOpts = {}) const;
/// Return the contents of the offset entry designated by a given index.
std::optional<uint64_t> getOffsetEntry(DataExtractor Data,
uint32_t Index) const {
return Header.getOffsetEntry(Data, Index);
}
/// Return the size of the table header including the length but not including
/// the offsets. This is dependent on the table format, which is unambiguously
/// derived from parsing the table.
uint8_t getHeaderSize() const {
return DWARFListTableHeader::getHeaderSize(getFormat());
}
uint64_t length() { return Header.length(); }
};
template <typename DWARFListType>
Error DWARFListTableBase<DWARFListType>::extract(DWARFDataExtractor Data,
uint64_t *OffsetPtr) {
clear();
if (Error E = extractHeaderAndOffsets(Data, OffsetPtr))
return E;
Data.setAddressSize(Header.getAddrSize());
Data = DWARFDataExtractor(Data, getHeaderOffset() + Header.length());
while (Data.isValidOffset(*OffsetPtr)) {
DWARFListType CurrentList;
uint64_t Off = *OffsetPtr;
if (Error E = CurrentList.extract(Data, getHeaderOffset(), OffsetPtr,
Header.getSectionName(),
Header.getListTypeString()))
return E;
ListMap[Off] = CurrentList;
}
assert(*OffsetPtr == Data.size() &&
"mismatch between expected length of table and length "
"of extracted data");
return Error::success();
}
template <typename ListEntryType>
Error DWARFListType<ListEntryType>::extract(DWARFDataExtractor Data,
uint64_t HeaderOffset,
uint64_t *OffsetPtr,
StringRef SectionName,
StringRef ListTypeString) {
if (*OffsetPtr < HeaderOffset || *OffsetPtr >= Data.size())
return createStringError(errc::invalid_argument,
"invalid %s list offset 0x%" PRIx64,
ListTypeString.data(), *OffsetPtr);
Entries.clear();
while (Data.isValidOffset(*OffsetPtr)) {
ListEntryType Entry;
if (Error E = Entry.extract(Data, OffsetPtr))
return E;
Entries.push_back(Entry);
if (Entry.isSentinel())
return Error::success();
}
return createStringError(errc::illegal_byte_sequence,
"no end of list marker detected at end of %s table "
"starting at offset 0x%" PRIx64,
SectionName.data(), HeaderOffset);
}
template <typename DWARFListType>
void DWARFListTableBase<DWARFListType>::dump(
DWARFDataExtractor Data, raw_ostream &OS,
llvm::function_ref<std::optional<object::SectionedAddress>(uint32_t)>
LookupPooledAddress,
DIDumpOptions DumpOpts) const {
Header.dump(Data, OS, DumpOpts);
OS << HeaderString << "\n";
// Determine the length of the longest encoding string we have in the table,
// so we can align the output properly. We only need this in verbose mode.
size_t MaxEncodingStringLength = 0;
if (DumpOpts.Verbose) {
for (const auto &List : ListMap)
for (const auto &Entry : List.second.getEntries())
MaxEncodingStringLength =
std::max(MaxEncodingStringLength,
dwarf::RangeListEncodingString(Entry.EntryKind).size());
}
uint64_t CurrentBase = 0;
for (const auto &List : ListMap)
for (const auto &Entry : List.second.getEntries())
Entry.dump(OS, getAddrSize(), MaxEncodingStringLength, CurrentBase,
DumpOpts, LookupPooledAddress);
}
template <typename DWARFListType>
Expected<DWARFListType>
DWARFListTableBase<DWARFListType>::findList(DWARFDataExtractor Data,
uint64_t Offset) const {
// Extract the list from the section and enter it into the list map.
DWARFListType List;
if (Header.length())
Data = DWARFDataExtractor(Data, getHeaderOffset() + Header.length());
if (Error E =
List.extract(Data, Header.length() ? getHeaderOffset() : 0, &Offset,
Header.getSectionName(), Header.getListTypeString()))
return std::move(E);
return List;
}
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFLISTTABLE_H
PK hwFZU��U� � DebugInfo/DWARF/DWARFSection.hnu �[��� //===- DWARFSection.h -------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFSECTION_H
#define LLVM_DEBUGINFO_DWARF_DWARFSECTION_H
#include "llvm/ADT/StringRef.h"
namespace llvm {
struct DWARFSection {
StringRef Data;
uint64_t Address = 0;
};
struct SectionName {
StringRef Name;
bool IsNameUnique;
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFSECTION_H
PK hwFZd2A~ ~ DebugInfo/DWARF/DWARFDebugLoc.hnu �[��� //===- DWARFDebugLoc.h ------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFDEBUGLOC_H
#define LLVM_DEBUGINFO_DWARF_DWARFDEBUGLOC_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/DebugInfo/DWARF/DWARFDataExtractor.h"
#include "llvm/Support/Errc.h"
#include <cstdint>
namespace llvm {
class DWARFUnit;
class MCRegisterInfo;
class raw_ostream;
class DWARFObject;
struct DIDumpOptions;
struct DWARFLocationExpression;
namespace object {
struct SectionedAddress;
}
/// A single location within a location list. Entries are stored in the DWARF5
/// form even if they originally come from a DWARF<=4 location list.
struct DWARFLocationEntry {
/// The entry kind (DW_LLE_***).
uint8_t Kind;
/// The first value of the location entry (if applicable).
uint64_t Value0;
/// The second value of the location entry (if applicable).
uint64_t Value1;
/// The index of the section this entry is relative to (if applicable).
uint64_t SectionIndex;
/// The location expression itself (if applicable).
SmallVector<uint8_t, 4> Loc;
};
/// An abstract base class for various kinds of location tables (.debug_loc,
/// .debug_loclists, and their dwo variants).
class DWARFLocationTable {
public:
DWARFLocationTable(DWARFDataExtractor Data) : Data(std::move(Data)) {}
virtual ~DWARFLocationTable() = default;
/// Call the user-provided callback for each entry (including the end-of-list
/// entry) in the location list starting at \p Offset. The callback can return
/// false to terminate the iteration early. Returns an error if it was unable
/// to parse the entire location list correctly. Upon successful termination
/// \p Offset will be updated point past the end of the list.
virtual Error visitLocationList(
uint64_t *Offset,
function_ref<bool(const DWARFLocationEntry &)> Callback) const = 0;
/// Dump the location list at the given \p Offset. The function returns true
/// iff it has successfully reched the end of the list. This means that one
/// can attempt to parse another list after the current one (\p Offset will be
/// updated to point past the end of the current list).
bool dumpLocationList(uint64_t *Offset, raw_ostream &OS,
std::optional<object::SectionedAddress> BaseAddr,
const DWARFObject &Obj, DWARFUnit *U,
DIDumpOptions DumpOpts, unsigned Indent) const;
Error visitAbsoluteLocationList(
uint64_t Offset, std::optional<object::SectionedAddress> BaseAddr,
std::function<std::optional<object::SectionedAddress>(uint32_t)>
LookupAddr,
function_ref<bool(Expected<DWARFLocationExpression>)> Callback) const;
const DWARFDataExtractor &getData() { return Data; }
protected:
DWARFDataExtractor Data;
virtual void dumpRawEntry(const DWARFLocationEntry &Entry, raw_ostream &OS,
unsigned Indent, DIDumpOptions DumpOpts,
const DWARFObject &Obj) const = 0;
};
class DWARFDebugLoc final : public DWARFLocationTable {
public:
/// A list of locations that contain one variable.
struct LocationList {
/// The beginning offset where this location list is stored in the debug_loc
/// section.
uint64_t Offset;
/// All the locations in which the variable is stored.
SmallVector<DWARFLocationEntry, 2> Entries;
};
private:
using LocationLists = SmallVector<LocationList, 4>;
/// A list of all the variables in the debug_loc section, each one describing
/// the locations in which the variable is stored.
LocationLists Locations;
public:
DWARFDebugLoc(DWARFDataExtractor Data)
: DWARFLocationTable(std::move(Data)) {}
/// Print the location lists found within the debug_loc section.
void dump(raw_ostream &OS, const DWARFObject &Obj, DIDumpOptions DumpOpts,
std::optional<uint64_t> Offset) const;
Error visitLocationList(
uint64_t *Offset,
function_ref<bool(const DWARFLocationEntry &)> Callback) const override;
protected:
void dumpRawEntry(const DWARFLocationEntry &Entry, raw_ostream &OS,
unsigned Indent, DIDumpOptions DumpOpts,
const DWARFObject &Obj) const override;
};
class DWARFDebugLoclists final : public DWARFLocationTable {
public:
DWARFDebugLoclists(DWARFDataExtractor Data, uint16_t Version)
: DWARFLocationTable(std::move(Data)), Version(Version) {}
Error visitLocationList(
uint64_t *Offset,
function_ref<bool(const DWARFLocationEntry &)> Callback) const override;
/// Dump all location lists within the given range.
void dumpRange(uint64_t StartOffset, uint64_t Size, raw_ostream &OS,
const DWARFObject &Obj, DIDumpOptions DumpOpts);
protected:
void dumpRawEntry(const DWARFLocationEntry &Entry, raw_ostream &OS,
unsigned Indent, DIDumpOptions DumpOpts,
const DWARFObject &Obj) const override;
private:
uint16_t Version;
};
class ResolverError : public ErrorInfo<ResolverError> {
public:
static char ID;
ResolverError(uint32_t Index, dwarf::LoclistEntries Kind) : Index(Index), Kind(Kind) {}
void log(raw_ostream &OS) const override;
std::error_code convertToErrorCode() const override {
return llvm::errc::invalid_argument;
}
private:
uint32_t Index;
dwarf::LoclistEntries Kind;
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFDEBUGLOC_H
PK hwFZp�W( ( " DebugInfo/DWARF/DWARFCompileUnit.hnu �[��� //===- DWARFCompileUnit.h ---------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFCOMPILEUNIT_H
#define LLVM_DEBUGINFO_DWARF_DWARFCOMPILEUNIT_H
#include "llvm/DebugInfo/DWARF/DWARFUnit.h"
namespace llvm {
class DWARFContext;
class DWARFDebugAbbrev;
class raw_ostream;
struct DIDumpOptions;
struct DWARFSection;
class DWARFCompileUnit : public DWARFUnit {
public:
DWARFCompileUnit(DWARFContext &Context, const DWARFSection &Section,
const DWARFUnitHeader &Header, const DWARFDebugAbbrev *DA,
const DWARFSection *RS, const DWARFSection *LocSection,
StringRef SS, const DWARFSection &SOS,
const DWARFSection *AOS, const DWARFSection &LS, bool LE,
bool IsDWO, const DWARFUnitVector &UnitVector)
: DWARFUnit(Context, Section, Header, DA, RS, LocSection, SS, SOS, AOS,
LS, LE, IsDWO, UnitVector) {}
/// VTable anchor.
~DWARFCompileUnit() override;
/// Dump this compile unit to \p OS.
void dump(raw_ostream &OS, DIDumpOptions DumpOpts) override;
/// Enable LLVM-style RTTI.
static bool classof(const DWARFUnit *U) { return !U->isTypeUnit(); }
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFCOMPILEUNIT_H
PK hwFZ���&�
�
DebugInfo/DWARF/DWARFDebugAddr.hnu �[��� //===- DWARFDebugAddr.h -------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFDEBUGADDR_H
#define LLVM_DEBUGINFO_DWARF_DWARFDEBUGADDR_H
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/DebugInfo/DIContext.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <vector>
namespace llvm {
class raw_ostream;
class DWARFDataExtractor;
/// A class representing an address table as specified in DWARF v5.
/// The table consists of a header followed by an array of address values from
/// .debug_addr section.
class DWARFDebugAddrTable {
dwarf::DwarfFormat Format;
uint64_t Offset;
/// The total length of the entries for this table, not including the length
/// field itself.
uint64_t Length = 0;
/// The DWARF version number.
uint16_t Version;
/// The size in bytes of an address on the target architecture. For
/// segmented addressing, this is the size of the offset portion of the
/// address.
uint8_t AddrSize;
/// The size in bytes of a segment selector on the target architecture.
/// If the target system uses a flat address space, this value is 0.
uint8_t SegSize;
std::vector<uint64_t> Addrs;
/// Invalidate Length field to stop further processing.
void invalidateLength() { Length = 0; }
Error extractAddresses(const DWARFDataExtractor &Data, uint64_t *OffsetPtr,
uint64_t EndOffset);
public:
/// Extract the entire table, including all addresses.
Error extract(const DWARFDataExtractor &Data, uint64_t *OffsetPtr,
uint16_t CUVersion, uint8_t CUAddrSize,
std::function<void(Error)> WarnCallback);
/// Extract a DWARFv5 address table.
Error extractV5(const DWARFDataExtractor &Data, uint64_t *OffsetPtr,
uint8_t CUAddrSize, std::function<void(Error)> WarnCallback);
/// Extract a pre-DWARFv5 address table. Such tables do not have a header
/// and consist only of a series of addresses.
/// See https://gcc.gnu.org/wiki/DebugFission for details.
Error extractPreStandard(const DWARFDataExtractor &Data, uint64_t *OffsetPtr,
uint16_t CUVersion, uint8_t CUAddrSize);
void dump(raw_ostream &OS, DIDumpOptions DumpOpts = {}) const;
/// Return the address based on a given index.
Expected<uint64_t> getAddrEntry(uint32_t Index) const;
/// Return the full length of this table, including the length field.
/// Return std::nullopt if the length cannot be identified reliably.
std::optional<uint64_t> getFullLength() const;
/// Return the DWARF format of this table.
dwarf::DwarfFormat getFormat() const { return Format; }
/// Return the length of this table.
uint64_t getLength() const { return Length; }
/// Return the version of this table.
uint16_t getVersion() const { return Version; }
/// Return the address size of this table.
uint8_t getAddressSize() const { return AddrSize; }
/// Return the segment selector size of this table.
uint8_t getSegmentSelectorSize() const { return SegSize; }
/// Return the parsed addresses of this table.
ArrayRef<uint64_t> getAddressEntries() const { return Addrs; }
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFDEBUGADDR_H
PK hwFZ�{�A �A DebugInfo/DWARF/DWARFDebugLine.hnu �[��� //===- DWARFDebugLine.h -----------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFDEBUGLINE_H
#define LLVM_DEBUGINFO_DWARF_DWARFDEBUGLINE_H
#include "llvm/ADT/StringRef.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/DebugInfo/DIContext.h"
#include "llvm/DebugInfo/DWARF/DWARFFormValue.h"
#include "llvm/DebugInfo/DWARF/DWARFUnit.h"
#include "llvm/Support/MD5.h"
#include "llvm/Support/Path.h"
#include <cstdint>
#include <map>
#include <string>
#include <vector>
namespace llvm {
class raw_ostream;
class DWARFDebugLine {
public:
struct FileNameEntry {
FileNameEntry() = default;
DWARFFormValue Name;
uint64_t DirIdx = 0;
uint64_t ModTime = 0;
uint64_t Length = 0;
MD5::MD5Result Checksum;
DWARFFormValue Source;
};
/// Tracks which optional content types are present in a DWARF file name
/// entry format.
struct ContentTypeTracker {
ContentTypeTracker() = default;
/// Whether filename entries provide a modification timestamp.
bool HasModTime = false;
/// Whether filename entries provide a file size.
bool HasLength = false;
/// For v5, whether filename entries provide an MD5 checksum.
bool HasMD5 = false;
/// For v5, whether filename entries provide source text.
bool HasSource = false;
/// Update tracked content types with \p ContentType.
void trackContentType(dwarf::LineNumberEntryFormat ContentType);
};
struct Prologue {
Prologue();
/// The size in bytes of the statement information for this compilation unit
/// (not including the total_length field itself).
uint64_t TotalLength;
/// Version, address size (starting in v5), and DWARF32/64 format; these
/// parameters affect interpretation of forms (used in the directory and
/// file tables starting with v5).
dwarf::FormParams FormParams;
/// The number of bytes following the prologue_length field to the beginning
/// of the first byte of the statement program itself.
uint64_t PrologueLength;
/// In v5, size in bytes of a segment selector.
uint8_t SegSelectorSize;
/// The size in bytes of the smallest target machine instruction. Statement
/// program opcodes that alter the address register first multiply their
/// operands by this value.
uint8_t MinInstLength;
/// The maximum number of individual operations that may be encoded in an
/// instruction.
uint8_t MaxOpsPerInst;
/// The initial value of theis_stmtregister.
uint8_t DefaultIsStmt;
/// This parameter affects the meaning of the special opcodes. See below.
int8_t LineBase;
/// This parameter affects the meaning of the special opcodes. See below.
uint8_t LineRange;
/// The number assigned to the first special opcode.
uint8_t OpcodeBase;
/// This tracks which optional file format content types are present.
ContentTypeTracker ContentTypes;
std::vector<uint8_t> StandardOpcodeLengths;
std::vector<DWARFFormValue> IncludeDirectories;
std::vector<FileNameEntry> FileNames;
const dwarf::FormParams getFormParams() const { return FormParams; }
uint16_t getVersion() const { return FormParams.Version; }
uint8_t getAddressSize() const { return FormParams.AddrSize; }
bool isDWARF64() const { return FormParams.Format == dwarf::DWARF64; }
uint32_t sizeofTotalLength() const { return isDWARF64() ? 12 : 4; }
uint32_t sizeofPrologueLength() const { return isDWARF64() ? 8 : 4; }
bool totalLengthIsValid() const;
/// Length of the prologue in bytes.
uint64_t getLength() const;
/// Get DWARF-version aware access to the file name entry at the provided
/// index.
const llvm::DWARFDebugLine::FileNameEntry &
getFileNameEntry(uint64_t Index) const;
bool hasFileAtIndex(uint64_t FileIndex) const;
std::optional<uint64_t> getLastValidFileIndex() const;
bool
getFileNameByIndex(uint64_t FileIndex, StringRef CompDir,
DILineInfoSpecifier::FileLineInfoKind Kind,
std::string &Result,
sys::path::Style Style = sys::path::Style::native) const;
void clear();
void dump(raw_ostream &OS, DIDumpOptions DumpOptions) const;
Error parse(DWARFDataExtractor Data, uint64_t *OffsetPtr,
function_ref<void(Error)> RecoverableErrorHandler,
const DWARFContext &Ctx, const DWARFUnit *U = nullptr);
};
/// Standard .debug_line state machine structure.
struct Row {
explicit Row(bool DefaultIsStmt = false);
/// Called after a row is appended to the matrix.
void postAppend();
void reset(bool DefaultIsStmt);
void dump(raw_ostream &OS) const;
static void dumpTableHeader(raw_ostream &OS, unsigned Indent);
static bool orderByAddress(const Row &LHS, const Row &RHS) {
return std::tie(LHS.Address.SectionIndex, LHS.Address.Address) <
std::tie(RHS.Address.SectionIndex, RHS.Address.Address);
}
/// The program-counter value corresponding to a machine instruction
/// generated by the compiler and section index pointing to the section
/// containg this PC. If relocation information is present then section
/// index is the index of the section which contains above address.
/// Otherwise this is object::SectionedAddress::Undef value.
object::SectionedAddress Address;
/// An unsigned integer indicating a source line number. Lines are numbered
/// beginning at 1. The compiler may emit the value 0 in cases where an
/// instruction cannot be attributed to any source line.
uint32_t Line;
/// An unsigned integer indicating a column number within a source line.
/// Columns are numbered beginning at 1. The value 0 is reserved to indicate
/// that a statement begins at the 'left edge' of the line.
uint16_t Column;
/// An unsigned integer indicating the identity of the source file
/// corresponding to a machine instruction.
uint16_t File;
/// An unsigned integer representing the DWARF path discriminator value
/// for this location.
uint32_t Discriminator;
/// An unsigned integer whose value encodes the applicable instruction set
/// architecture for the current instruction.
uint8_t Isa;
/// An unsigned integer representing the index of an operation within a
/// VLIW instruction. The index of the first operation is 0.
/// For non-VLIW architectures, this register will always be 0.
uint8_t OpIndex;
/// A boolean indicating that the current instruction is the beginning of a
/// statement.
uint8_t IsStmt : 1,
/// A boolean indicating that the current instruction is the
/// beginning of a basic block.
BasicBlock : 1,
/// A boolean indicating that the current address is that of the
/// first byte after the end of a sequence of target machine
/// instructions.
EndSequence : 1,
/// A boolean indicating that the current address is one (of possibly
/// many) where execution should be suspended for an entry breakpoint
/// of a function.
PrologueEnd : 1,
/// A boolean indicating that the current address is one (of possibly
/// many) where execution should be suspended for an exit breakpoint
/// of a function.
EpilogueBegin : 1;
};
/// Represents a series of contiguous machine instructions. Line table for
/// each compilation unit may consist of multiple sequences, which are not
/// guaranteed to be in the order of ascending instruction address.
struct Sequence {
Sequence();
/// Sequence describes instructions at address range [LowPC, HighPC)
/// and is described by line table rows [FirstRowIndex, LastRowIndex).
uint64_t LowPC;
uint64_t HighPC;
/// If relocation information is present then this is the index of the
/// section which contains above addresses. Otherwise this is
/// object::SectionedAddress::Undef value.
uint64_t SectionIndex;
unsigned FirstRowIndex;
unsigned LastRowIndex;
bool Empty;
void reset();
static bool orderByHighPC(const Sequence &LHS, const Sequence &RHS) {
return std::tie(LHS.SectionIndex, LHS.HighPC) <
std::tie(RHS.SectionIndex, RHS.HighPC);
}
bool isValid() const {
return !Empty && (LowPC < HighPC) && (FirstRowIndex < LastRowIndex);
}
bool containsPC(object::SectionedAddress PC) const {
return SectionIndex == PC.SectionIndex &&
(LowPC <= PC.Address && PC.Address < HighPC);
}
};
struct LineTable {
LineTable();
/// Represents an invalid row
const uint32_t UnknownRowIndex = UINT32_MAX;
void appendRow(const DWARFDebugLine::Row &R) { Rows.push_back(R); }
void appendSequence(const DWARFDebugLine::Sequence &S) {
Sequences.push_back(S);
}
/// Returns the index of the row with file/line info for a given address,
/// or UnknownRowIndex if there is no such row.
uint32_t lookupAddress(object::SectionedAddress Address) const;
bool lookupAddressRange(object::SectionedAddress Address, uint64_t Size,
std::vector<uint32_t> &Result) const;
bool hasFileAtIndex(uint64_t FileIndex) const {
return Prologue.hasFileAtIndex(FileIndex);
}
std::optional<uint64_t> getLastValidFileIndex() const {
return Prologue.getLastValidFileIndex();
}
/// Extracts filename by its index in filename table in prologue.
/// In Dwarf 4, the files are 1-indexed and the current compilation file
/// name is not represented in the list. In DWARF v5, the files are
/// 0-indexed and the primary source file has the index 0.
/// Returns true on success.
bool getFileNameByIndex(uint64_t FileIndex, StringRef CompDir,
DILineInfoSpecifier::FileLineInfoKind Kind,
std::string &Result) const {
return Prologue.getFileNameByIndex(FileIndex, CompDir, Kind, Result);
}
/// Fills the Result argument with the file and line information
/// corresponding to Address. Returns true on success.
bool getFileLineInfoForAddress(object::SectionedAddress Address,
const char *CompDir,
DILineInfoSpecifier::FileLineInfoKind Kind,
DILineInfo &Result) const;
/// Extracts directory name by its Entry in include directories table
/// in prologue. Returns true on success.
bool getDirectoryForEntry(const FileNameEntry &Entry,
std::string &Directory) const;
void dump(raw_ostream &OS, DIDumpOptions DumpOptions) const;
void clear();
/// Parse prologue and all rows.
Error parse(DWARFDataExtractor &DebugLineData, uint64_t *OffsetPtr,
const DWARFContext &Ctx, const DWARFUnit *U,
function_ref<void(Error)> RecoverableErrorHandler,
raw_ostream *OS = nullptr, bool Verbose = false);
using RowVector = std::vector<Row>;
using RowIter = RowVector::const_iterator;
using SequenceVector = std::vector<Sequence>;
using SequenceIter = SequenceVector::const_iterator;
struct Prologue Prologue;
RowVector Rows;
SequenceVector Sequences;
private:
uint32_t findRowInSeq(const DWARFDebugLine::Sequence &Seq,
object::SectionedAddress Address) const;
std::optional<StringRef>
getSourceByIndex(uint64_t FileIndex,
DILineInfoSpecifier::FileLineInfoKind Kind) const;
uint32_t lookupAddressImpl(object::SectionedAddress Address) const;
bool lookupAddressRangeImpl(object::SectionedAddress Address, uint64_t Size,
std::vector<uint32_t> &Result) const;
};
const LineTable *getLineTable(uint64_t Offset) const;
Expected<const LineTable *>
getOrParseLineTable(DWARFDataExtractor &DebugLineData, uint64_t Offset,
const DWARFContext &Ctx, const DWARFUnit *U,
function_ref<void(Error)> RecoverableErrorHandler);
void clearLineTable(uint64_t Offset);
/// Helper to allow for parsing of an entire .debug_line section in sequence.
class SectionParser {
public:
using LineToUnitMap = std::map<uint64_t, DWARFUnit *>;
SectionParser(DWARFDataExtractor &Data, const DWARFContext &C,
DWARFUnitVector::iterator_range Units);
/// Get the next line table from the section. Report any issues via the
/// handlers.
///
/// \param RecoverableErrorHandler - any issues that don't prevent further
/// parsing of the table will be reported through this handler.
/// \param UnrecoverableErrorHandler - any issues that prevent further
/// parsing of the table will be reported through this handler.
/// \param OS - if not null, the parser will print information about the
/// table as it parses it.
/// \param Verbose - if true, the parser will print verbose information when
/// printing to the output.
LineTable parseNext(function_ref<void(Error)> RecoverableErrorHandler,
function_ref<void(Error)> UnrecoverableErrorHandler,
raw_ostream *OS = nullptr, bool Verbose = false);
/// Skip the current line table and go to the following line table (if
/// present) immediately.
///
/// \param RecoverableErrorHandler - report any recoverable prologue
/// parsing issues via this handler.
/// \param UnrecoverableErrorHandler - report any unrecoverable prologue
/// parsing issues via this handler.
void skip(function_ref<void(Error)> RecoverableErrorHandler,
function_ref<void(Error)> UnrecoverableErrorHandler);
/// Indicates if the parser has parsed as much as possible.
///
/// \note Certain problems with the line table structure might mean that
/// parsing stops before the end of the section is reached.
bool done() const { return Done; }
/// Get the offset the parser has reached.
uint64_t getOffset() const { return Offset; }
private:
DWARFUnit *prepareToParse(uint64_t Offset);
void moveToNextTable(uint64_t OldOffset, const Prologue &P);
bool hasValidVersion(uint64_t Offset);
LineToUnitMap LineToUnit;
DWARFDataExtractor &DebugLineData;
const DWARFContext &Context;
uint64_t Offset = 0;
bool Done = false;
};
private:
struct ParsingState {
ParsingState(struct LineTable *LT, uint64_t TableOffset,
function_ref<void(Error)> ErrorHandler);
void resetRowAndSequence();
void appendRowToMatrix();
struct AddrOpIndexDelta {
uint64_t AddrOffset;
int16_t OpIndexDelta;
};
/// Advance the address and op-index by the \p OperationAdvance value.
/// \returns the amount advanced by.
AddrOpIndexDelta advanceAddrOpIndex(uint64_t OperationAdvance,
uint8_t Opcode, uint64_t OpcodeOffset);
struct OpcodeAdvanceResults {
uint64_t AddrDelta;
int16_t OpIndexDelta;
uint8_t AdjustedOpcode;
};
/// Advance the address and op-index as required by the specified \p Opcode.
/// \returns the amount advanced by and the calculated adjusted opcode.
OpcodeAdvanceResults advanceForOpcode(uint8_t Opcode,
uint64_t OpcodeOffset);
struct SpecialOpcodeDelta {
uint64_t Address;
int32_t Line;
int16_t OpIndex;
};
/// Advance the line, address and op-index as required by the specified
/// special \p Opcode. \returns the address, op-index and line delta.
SpecialOpcodeDelta handleSpecialOpcode(uint8_t Opcode,
uint64_t OpcodeOffset);
/// Line table we're currently parsing.
struct LineTable *LineTable;
struct Row Row;
struct Sequence Sequence;
private:
uint64_t LineTableOffset;
bool ReportAdvanceAddrProblem = true;
bool ReportBadLineRange = true;
function_ref<void(Error)> ErrorHandler;
};
using LineTableMapTy = std::map<uint64_t, LineTable>;
using LineTableIter = LineTableMapTy::iterator;
using LineTableConstIter = LineTableMapTy::const_iterator;
LineTableMapTy LineTableMap;
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFDEBUGLINE_H
PK hwFZ� PG� � ! DebugInfo/DWARF/DWARFDebugMacro.hnu �[��� //===- DWARFDebugMacro.h ----------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFDEBUGMACRO_H
#define LLVM_DEBUGINFO_DWARF_DWARFDEBUGMACRO_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/DebugInfo/DWARF/DWARFDataExtractor.h"
#include "llvm/DebugInfo/DWARF/DWARFUnit.h"
#include "llvm/Support/Error.h"
#include <cstdint>
namespace llvm {
class raw_ostream;
class DwarfStreamer;
class DWARFDebugMacro {
friend DwarfStreamer;
/// DWARFv5 section 6.3.1 Macro Information Header.
enum HeaderFlagMask {
#define HANDLE_MACRO_FLAG(ID, NAME) MACRO_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
};
struct MacroHeader {
/// Macro version information number.
uint16_t Version = 0;
/// The bits of the flags field are interpreted as a set of flags, some of
/// which may indicate that additional fields follow. The following flags,
/// beginning with the least significant bit, are defined:
/// offset_size_flag:
/// If the offset_size_flag is zero, the header is for a 32-bit DWARF
/// format macro section and all offsets are 4 bytes long; if it is one,
/// the header is for a 64-bit DWARF format macro section and all offsets
/// are 8 bytes long.
/// debug_line_offset_flag:
/// If the debug_line_offset_flag is one, the debug_line_offset field (see
/// below) is present. If zero, that field is omitted.
/// opcode_operands_table_flag:
/// If the opcode_operands_table_flag is one, the opcode_operands_table
/// field (see below) is present. If zero, that field is omitted.
uint8_t Flags = 0;
/// debug_line_offset
/// An offset in the .debug_line section of the beginning of the line
/// number information in the containing compilation unit, encoded as a
/// 4-byte offset for a 32-bit DWARF format macro section and an 8-byte
/// offset for a 64-bit DWARF format macro section.
uint64_t DebugLineOffset;
/// Print the macro header from the debug_macro section.
void dumpMacroHeader(raw_ostream &OS) const;
/// Parse the debug_macro header.
Error parseMacroHeader(DWARFDataExtractor Data, uint64_t *Offset);
/// Get the DWARF format according to the flags.
dwarf::DwarfFormat getDwarfFormat() const;
/// Get the size of a reference according to the DWARF format.
uint8_t getOffsetByteSize() const;
};
/// A single macro entry within a macro list.
struct Entry {
/// The type of the macro entry.
uint32_t Type;
union {
/// The source line where the macro is defined.
uint64_t Line;
/// Vendor extension constant value.
uint64_t ExtConstant;
/// Macro unit import offset.
uint64_t ImportOffset;
};
union {
/// The string (name, value) of the macro entry.
const char *MacroStr;
// An unsigned integer indicating the identity of the source file.
uint64_t File;
/// Vendor extension string.
const char *ExtStr;
};
};
struct MacroList {
// A value 0 in the `Header.Version` field indicates that we're parsing
// a macinfo[.dwo] section which doesn't have header itself, hence
// for that case other fields in the `Header` are uninitialized.
MacroHeader Header;
SmallVector<Entry, 4> Macros;
uint64_t Offset;
/// Whether or not this is a .debug_macro section.
bool IsDebugMacro;
};
/// A list of all the macro entries in the debug_macinfo section.
std::vector<MacroList> MacroLists;
public:
DWARFDebugMacro() = default;
/// Print the macro list found within the debug_macinfo/debug_macro section.
void dump(raw_ostream &OS) const;
Error parseMacro(DWARFUnitVector::compile_unit_range Units,
DataExtractor StringExtractor,
DWARFDataExtractor MacroData) {
return parseImpl(Units, StringExtractor, MacroData, /*IsMacro=*/true);
}
Error parseMacinfo(DWARFDataExtractor MacroData) {
return parseImpl(std::nullopt, std::nullopt, MacroData, /*IsMacro=*/false);
}
/// Return whether the section has any entries.
bool empty() const { return MacroLists.empty(); }
bool hasEntryForOffset(uint64_t Offset) const {
for (const MacroList &List : MacroLists)
if (Offset == List.Offset)
return true;
return false;
}
private:
/// Parse the debug_macinfo/debug_macro section accessible via the 'MacroData'
/// parameter.
Error parseImpl(std::optional<DWARFUnitVector::compile_unit_range> Units,
std::optional<DataExtractor> StringExtractor,
DWARFDataExtractor Data, bool IsMacro);
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFDEBUGMACRO_H
PK hwFZ�E�s s DebugInfo/DWARF/DWARFTypeUnit.hnu �[��� //===- DWARFTypeUnit.h ------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFTYPEUNIT_H
#define LLVM_DEBUGINFO_DWARF_DWARFTYPEUNIT_H
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/DWARF/DWARFUnit.h"
#include <cstdint>
namespace llvm {
struct DIDumpOptions;
class DWARFContext;
class DWARFDebugAbbrev;
struct DWARFSection;
class raw_ostream;
class DWARFTypeUnit : public DWARFUnit {
public:
DWARFTypeUnit(DWARFContext &Context, const DWARFSection &Section,
const DWARFUnitHeader &Header, const DWARFDebugAbbrev *DA,
const DWARFSection *RS, const DWARFSection *LocSection,
StringRef SS, const DWARFSection &SOS, const DWARFSection *AOS,
const DWARFSection &LS, bool LE, bool IsDWO,
const DWARFUnitVector &UnitVector)
: DWARFUnit(Context, Section, Header, DA, RS, LocSection, SS, SOS, AOS,
LS, LE, IsDWO, UnitVector) {}
uint64_t getTypeHash() const { return getHeader().getTypeHash(); }
uint64_t getTypeOffset() const { return getHeader().getTypeOffset(); }
void dump(raw_ostream &OS, DIDumpOptions DumpOpts = {}) override;
// Enable LLVM-style RTTI.
static bool classof(const DWARFUnit *U) { return U->isTypeUnit(); }
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFTYPEUNIT_H
PK hwFZD���� � ) DebugInfo/DWARF/DWARFLocationExpression.hnu �[��� //===- DWARFLocationExpression.h --------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFLOCATIONEXPRESSION_H
#define LLVM_DEBUGINFO_DWARF_DWARFLOCATIONEXPRESSION_H
#include "llvm/DebugInfo/DWARF/DWARFAddressRange.h"
namespace llvm {
class raw_ostream;
/// Represents a single DWARF expression, whose value is location-dependent.
/// Typically used in DW_AT_location attributes to describe the location of
/// objects.
struct DWARFLocationExpression {
/// The address range in which this expression is valid. std::nullopt denotes a
/// default entry which is valid in addresses not covered by other location
/// expressions, or everywhere if there are no other expressions.
std::optional<DWARFAddressRange> Range;
/// The expression itself.
SmallVector<uint8_t, 4> Expr;
};
inline bool operator==(const DWARFLocationExpression &L,
const DWARFLocationExpression &R) {
return L.Range == R.Range && L.Expr == R.Expr;
}
inline bool operator!=(const DWARFLocationExpression &L,
const DWARFLocationExpression &R) {
return !(L == R);
}
raw_ostream &operator<<(raw_ostream &OS, const DWARFLocationExpression &Loc);
/// Represents a set of absolute location expressions.
using DWARFLocationExpressionsVector = std::vector<DWARFLocationExpression>;
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFLOCATIONEXPRESSION_H
PK hwFZ�-`1� � DebugInfo/DWARF/DWARFGdbIndex.hnu �[��� //===- DWARFGdbIndex.h ------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFGDBINDEX_H
#define LLVM_DEBUGINFO_DWARF_DWARFGDBINDEX_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include <cstdint>
#include <utility>
namespace llvm {
class raw_ostream;
class DataExtractor;
class DWARFGdbIndex {
uint32_t Version;
uint32_t CuListOffset;
uint32_t TuListOffset;
uint32_t AddressAreaOffset;
uint32_t SymbolTableOffset;
uint32_t ConstantPoolOffset;
struct CompUnitEntry {
uint64_t Offset; /// Offset of a CU in the .debug_info section.
uint64_t Length; /// Length of that CU.
};
SmallVector<CompUnitEntry, 0> CuList;
struct TypeUnitEntry {
uint64_t Offset;
uint64_t TypeOffset;
uint64_t TypeSignature;
};
SmallVector<TypeUnitEntry, 0> TuList;
struct AddressEntry {
uint64_t LowAddress; /// The low address.
uint64_t HighAddress; /// The high address.
uint32_t CuIndex; /// The CU index.
};
SmallVector<AddressEntry, 0> AddressArea;
struct SymTableEntry {
uint32_t NameOffset; /// Offset of the symbol's name in the constant pool.
uint32_t VecOffset; /// Offset of the CU vector in the constant pool.
};
SmallVector<SymTableEntry, 0> SymbolTable;
/// Each value is CU index + attributes.
SmallVector<std::pair<uint32_t, SmallVector<uint32_t, 0>>, 0>
ConstantPoolVectors;
StringRef ConstantPoolStrings;
uint32_t StringPoolOffset;
void dumpCUList(raw_ostream &OS) const;
void dumpTUList(raw_ostream &OS) const;
void dumpAddressArea(raw_ostream &OS) const;
void dumpSymbolTable(raw_ostream &OS) const;
void dumpConstantPool(raw_ostream &OS) const;
bool parseImpl(DataExtractor Data);
public:
void dump(raw_ostream &OS);
void parse(DataExtractor Data);
bool HasContent = false;
bool HasError = false;
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFGDBINDEX_H
PK hwFZ�\�)�7 �7 DebugInfo/DWARF/DWARFFormValue.hnu �[��� //===- DWARFFormValue.h -----------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFFORMVALUE_H
#define LLVM_DEBUGINFO_DWARF_DWARFFORMVALUE_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/DebugInfo/DIContext.h"
#include "llvm/Support/DataExtractor.h"
#include <cstdint>
namespace llvm {
class DWARFContext;
class DWARFObject;
class DWARFDataExtractor;
class DWARFUnit;
class raw_ostream;
class DWARFFormValue {
public:
enum FormClass {
FC_Unknown,
FC_Address,
FC_Block,
FC_Constant,
FC_String,
FC_Flag,
FC_Reference,
FC_Indirect,
FC_SectionOffset,
FC_Exprloc
};
struct ValueType {
ValueType() { uval = 0; }
ValueType(int64_t V) : sval(V) {}
ValueType(uint64_t V) : uval(V) {}
ValueType(const char *V) : cstr(V) {}
union {
uint64_t uval;
int64_t sval;
const char *cstr;
};
const uint8_t *data = nullptr;
uint64_t SectionIndex; /// Section index for reference forms.
};
private:
dwarf::Form Form; /// Form for this value.
dwarf::DwarfFormat Format =
dwarf::DWARF32; /// Remember the DWARF format at extract time.
ValueType Value; /// Contains all data for the form.
const DWARFUnit *U = nullptr; /// Remember the DWARFUnit at extract time.
const DWARFContext *C = nullptr; /// Context for extract time.
DWARFFormValue(dwarf::Form F, ValueType V) : Form(F), Value(V) {}
public:
DWARFFormValue(dwarf::Form F = dwarf::Form(0)) : Form(F) {}
static DWARFFormValue createFromSValue(dwarf::Form F, int64_t V);
static DWARFFormValue createFromUValue(dwarf::Form F, uint64_t V);
static DWARFFormValue createFromPValue(dwarf::Form F, const char *V);
static DWARFFormValue createFromBlockValue(dwarf::Form F,
ArrayRef<uint8_t> D);
static DWARFFormValue createFromUnit(dwarf::Form F, const DWARFUnit *Unit,
uint64_t *OffsetPtr);
static std::optional<object::SectionedAddress>
getAsSectionedAddress(const ValueType &Val, const dwarf::Form Form,
const DWARFUnit *U);
dwarf::Form getForm() const { return Form; }
uint64_t getRawUValue() const { return Value.uval; }
bool isFormClass(FormClass FC) const;
const DWARFUnit *getUnit() const { return U; }
void dump(raw_ostream &OS, DIDumpOptions DumpOpts = DIDumpOptions()) const;
void dumpSectionedAddress(raw_ostream &OS, DIDumpOptions DumpOpts,
object::SectionedAddress SA) const;
void dumpAddress(raw_ostream &OS, uint64_t Address) const;
static void dumpAddress(raw_ostream &OS, uint8_t AddressSize,
uint64_t Address);
static void dumpAddressSection(const DWARFObject &Obj, raw_ostream &OS,
DIDumpOptions DumpOpts, uint64_t SectionIndex);
/// Extracts a value in \p Data at offset \p *OffsetPtr. The information
/// in \p FormParams is needed to interpret some forms. The optional
/// \p Context and \p Unit allows extracting information if the form refers
/// to other sections (e.g., .debug_str).
bool extractValue(const DWARFDataExtractor &Data, uint64_t *OffsetPtr,
dwarf::FormParams FormParams,
const DWARFContext *Context = nullptr,
const DWARFUnit *Unit = nullptr);
bool extractValue(const DWARFDataExtractor &Data, uint64_t *OffsetPtr,
dwarf::FormParams FormParams, const DWARFUnit *U) {
return extractValue(Data, OffsetPtr, FormParams, nullptr, U);
}
/// getAsFoo functions below return the extracted value as Foo if only
/// DWARFFormValue has form class is suitable for representing Foo.
std::optional<uint64_t> getAsReference() const;
struct UnitOffset {
DWARFUnit *Unit;
uint64_t Offset;
};
std::optional<UnitOffset> getAsRelativeReference() const;
std::optional<uint64_t> getAsUnsignedConstant() const;
std::optional<int64_t> getAsSignedConstant() const;
Expected<const char *> getAsCString() const;
std::optional<uint64_t> getAsAddress() const;
std::optional<object::SectionedAddress> getAsSectionedAddress() const;
std::optional<uint64_t> getAsSectionOffset() const;
std::optional<ArrayRef<uint8_t>> getAsBlock() const;
std::optional<uint64_t> getAsCStringOffset() const;
std::optional<uint64_t> getAsReferenceUVal() const;
/// Correctly extract any file paths from a form value.
///
/// These attributes can be in the from DW_AT_decl_file or DW_AT_call_file
/// attributes. We need to use the file index in the correct DWARFUnit's line
/// table prologue, and each DWARFFormValue has the DWARFUnit the form value
/// was extracted from.
///
/// \param Kind The kind of path to extract.
///
/// \returns A valid string value on success, or std::nullopt if the form
/// class is not FC_Constant, or if the file index is not valid.
std::optional<std::string>
getAsFile(DILineInfoSpecifier::FileLineInfoKind Kind) const;
/// Skip a form's value in \p DebugInfoData at the offset specified by
/// \p OffsetPtr.
///
/// Skips the bytes for the current form and updates the offset.
///
/// \param DebugInfoData The data where we want to skip the value.
/// \param OffsetPtr A reference to the offset that will be updated.
/// \param Params DWARF parameters to help interpret forms.
/// \returns true on success, false if the form was not skipped.
bool skipValue(DataExtractor DebugInfoData, uint64_t *OffsetPtr,
const dwarf::FormParams Params) const {
return DWARFFormValue::skipValue(Form, DebugInfoData, OffsetPtr, Params);
}
/// Skip a form's value in \p DebugInfoData at the offset specified by
/// \p OffsetPtr.
///
/// Skips the bytes for the specified form and updates the offset.
///
/// \param Form The DW_FORM enumeration that indicates the form to skip.
/// \param DebugInfoData The data where we want to skip the value.
/// \param OffsetPtr A reference to the offset that will be updated.
/// \param FormParams DWARF parameters to help interpret forms.
/// \returns true on success, false if the form was not skipped.
static bool skipValue(dwarf::Form Form, DataExtractor DebugInfoData,
uint64_t *OffsetPtr,
const dwarf::FormParams FormParams);
private:
void dumpString(raw_ostream &OS) const;
};
namespace dwarf {
/// Take an optional DWARFFormValue and try to extract a string value from it.
///
/// \param V and optional DWARFFormValue to attempt to extract the value from.
/// \returns an optional value that contains a value if the form value
/// was valid and was a string.
inline std::optional<const char *>
toString(const std::optional<DWARFFormValue> &V) {
if (!V)
return std::nullopt;
Expected<const char*> E = V->getAsCString();
if (!E) {
consumeError(E.takeError());
return std::nullopt;
}
return *E;
}
/// Take an optional DWARFFormValue and try to extract a string value from it.
///
/// \param V and optional DWARFFormValue to attempt to extract the value from.
/// \returns an optional value that contains a value if the form value
/// was valid and was a string.
inline StringRef toStringRef(const std::optional<DWARFFormValue> &V,
StringRef Default = {}) {
if (!V)
return Default;
auto S = V->getAsCString();
if (!S) {
consumeError(S.takeError());
return Default;
}
if (!*S)
return Default;
return *S;
}
/// Take an optional DWARFFormValue and extract a string value from it.
///
/// \param V and optional DWARFFormValue to attempt to extract the value from.
/// \param Default the default value to return in case of failure.
/// \returns the string value or Default if the V doesn't have a value or the
/// form value's encoding wasn't a string.
inline const char *toString(const std::optional<DWARFFormValue> &V,
const char *Default) {
if (auto E = toString(V))
return *E;
return Default;
}
/// Take an optional DWARFFormValue and try to extract an unsigned constant.
///
/// \param V and optional DWARFFormValue to attempt to extract the value from.
/// \returns an optional value that contains a value if the form value
/// was valid and has a unsigned constant form.
inline std::optional<uint64_t>
toUnsigned(const std::optional<DWARFFormValue> &V) {
if (V)
return V->getAsUnsignedConstant();
return std::nullopt;
}
/// Take an optional DWARFFormValue and extract a unsigned constant.
///
/// \param V and optional DWARFFormValue to attempt to extract the value from.
/// \param Default the default value to return in case of failure.
/// \returns the extracted unsigned value or Default if the V doesn't have a
/// value or the form value's encoding wasn't an unsigned constant form.
inline uint64_t toUnsigned(const std::optional<DWARFFormValue> &V,
uint64_t Default) {
return toUnsigned(V).value_or(Default);
}
/// Take an optional DWARFFormValue and try to extract an reference.
///
/// \param V and optional DWARFFormValue to attempt to extract the value from.
/// \returns an optional value that contains a value if the form value
/// was valid and has a reference form.
inline std::optional<uint64_t>
toReference(const std::optional<DWARFFormValue> &V) {
if (V)
return V->getAsReference();
return std::nullopt;
}
/// Take an optional DWARFFormValue and extract a reference.
///
/// \param V and optional DWARFFormValue to attempt to extract the value from.
/// \param Default the default value to return in case of failure.
/// \returns the extracted reference value or Default if the V doesn't have a
/// value or the form value's encoding wasn't a reference form.
inline uint64_t toReference(const std::optional<DWARFFormValue> &V,
uint64_t Default) {
return toReference(V).value_or(Default);
}
/// Take an optional DWARFFormValue and try to extract an signed constant.
///
/// \param V and optional DWARFFormValue to attempt to extract the value from.
/// \returns an optional value that contains a value if the form value
/// was valid and has a signed constant form.
inline std::optional<int64_t> toSigned(const std::optional<DWARFFormValue> &V) {
if (V)
return V->getAsSignedConstant();
return std::nullopt;
}
/// Take an optional DWARFFormValue and extract a signed integer.
///
/// \param V and optional DWARFFormValue to attempt to extract the value from.
/// \param Default the default value to return in case of failure.
/// \returns the extracted signed integer value or Default if the V doesn't
/// have a value or the form value's encoding wasn't a signed integer form.
inline int64_t toSigned(const std::optional<DWARFFormValue> &V,
int64_t Default) {
return toSigned(V).value_or(Default);
}
/// Take an optional DWARFFormValue and try to extract an address.
///
/// \param V and optional DWARFFormValue to attempt to extract the value from.
/// \returns an optional value that contains a value if the form value
/// was valid and has a address form.
inline std::optional<uint64_t>
toAddress(const std::optional<DWARFFormValue> &V) {
if (V)
return V->getAsAddress();
return std::nullopt;
}
inline std::optional<object::SectionedAddress>
toSectionedAddress(const std::optional<DWARFFormValue> &V) {
if (V)
return V->getAsSectionedAddress();
return std::nullopt;
}
/// Take an optional DWARFFormValue and extract a address.
///
/// \param V and optional DWARFFormValue to attempt to extract the value from.
/// \param Default the default value to return in case of failure.
/// \returns the extracted address value or Default if the V doesn't have a
/// value or the form value's encoding wasn't an address form.
inline uint64_t toAddress(const std::optional<DWARFFormValue> &V,
uint64_t Default) {
return toAddress(V).value_or(Default);
}
/// Take an optional DWARFFormValue and try to extract an section offset.
///
/// \param V and optional DWARFFormValue to attempt to extract the value from.
/// \returns an optional value that contains a value if the form value
/// was valid and has a section offset form.
inline std::optional<uint64_t>
toSectionOffset(const std::optional<DWARFFormValue> &V) {
if (V)
return V->getAsSectionOffset();
return std::nullopt;
}
/// Take an optional DWARFFormValue and extract a section offset.
///
/// \param V and optional DWARFFormValue to attempt to extract the value from.
/// \param Default the default value to return in case of failure.
/// \returns the extracted section offset value or Default if the V doesn't
/// have a value or the form value's encoding wasn't a section offset form.
inline uint64_t toSectionOffset(const std::optional<DWARFFormValue> &V,
uint64_t Default) {
return toSectionOffset(V).value_or(Default);
}
/// Take an optional DWARFFormValue and try to extract block data.
///
/// \param V and optional DWARFFormValue to attempt to extract the value from.
/// \returns an optional value that contains a value if the form value
/// was valid and has a block form.
inline std::optional<ArrayRef<uint8_t>>
toBlock(const std::optional<DWARFFormValue> &V) {
if (V)
return V->getAsBlock();
return std::nullopt;
}
/// Check whether specified \p Form belongs to the \p FC class.
/// \param Form an attribute form.
/// \param FC an attribute form class to check.
/// \param DwarfVersion the version of DWARF debug info keeping the attribute.
/// \returns true if specified \p Form belongs to the \p FC class.
bool doesFormBelongToClass(dwarf::Form Form, DWARFFormValue::FormClass FC,
uint16_t DwarfVersion);
} // end namespace dwarf
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFFORMVALUE_H
PK hwFZi��nU
U
$ DebugInfo/DWARF/DWARFDebugPubTable.hnu �[��� //===- DWARFDebugPubTable.h -------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFDEBUGPUBTABLE_H
#define LLVM_DEBUGINFO_DWARF_DWARFDEBUGPUBTABLE_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/STLFunctionalExtras.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include <cstdint>
#include <vector>
namespace llvm {
class raw_ostream;
class DWARFDataExtractor;
class Error;
/// Represents structure for holding and parsing .debug_pub* tables.
class DWARFDebugPubTable {
public:
struct Entry {
/// Section offset from the beginning of the compilation unit.
uint64_t SecOffset;
/// An entry of the various gnu_pub* debug sections.
dwarf::PubIndexEntryDescriptor Descriptor;
/// The name of the object as given by the DW_AT_name attribute of the
/// referenced DIE.
StringRef Name;
};
/// Each table consists of sets of variable length entries. Each set describes
/// the names of global objects and functions, or global types, respectively,
/// whose definitions are represented by debugging information entries owned
/// by a single compilation unit.
struct Set {
/// The total length of the entries for that set, not including the length
/// field itself.
uint64_t Length;
/// The DWARF format of the set.
dwarf::DwarfFormat Format;
/// This number is specific to the name lookup table and is independent of
/// the DWARF version number.
uint16_t Version;
/// The offset from the beginning of the .debug_info section of the
/// compilation unit header referenced by the set.
uint64_t Offset;
/// The size in bytes of the contents of the .debug_info section generated
/// to represent that compilation unit.
uint64_t Size;
std::vector<Entry> Entries;
};
private:
std::vector<Set> Sets;
/// gnu styled tables contains additional information.
/// This flag determines whether or not section we parse is debug_gnu* table.
bool GnuStyle = false;
public:
DWARFDebugPubTable() = default;
void extract(DWARFDataExtractor Data, bool GnuStyle,
function_ref<void(Error)> RecoverableErrorHandler);
void dump(raw_ostream &OS) const;
ArrayRef<Set> getData() { return Sets; }
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFDEBUGPUBTABLE_H
PK hwFZ�F�d
d
$ DebugInfo/DWARF/DWARFDebugRnglists.hnu �[��� //===- DWARFDebugRnglists.h -------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFDEBUGRNGLISTS_H
#define LLVM_DEBUGINFO_DWARF_DWARFDEBUGRNGLISTS_H
#include "llvm/ADT/STLFunctionalExtras.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/DebugInfo/DWARF/DWARFAddressRange.h"
#include "llvm/DebugInfo/DWARF/DWARFListTable.h"
#include <cstdint>
namespace llvm {
class Error;
class raw_ostream;
class DWARFUnit;
class DWARFDataExtractor;
struct DIDumpOptions;
namespace object {
struct SectionedAddress;
}
/// A class representing a single range list entry.
struct RangeListEntry : public DWARFListEntryBase {
/// The values making up the range list entry. Most represent a range with
/// a start and end address or a start address and a length. Others are
/// single value base addresses or end-of-list with no values. The unneeded
/// values are semantically undefined, but initialized to 0.
uint64_t Value0;
uint64_t Value1;
Error extract(DWARFDataExtractor Data, uint64_t *OffsetPtr);
void
dump(raw_ostream &OS, uint8_t AddrSize, uint8_t MaxEncodingStringLength,
uint64_t &CurrentBase, DIDumpOptions DumpOpts,
llvm::function_ref<std::optional<object::SectionedAddress>(uint32_t)>
LookupPooledAddress) const;
bool isSentinel() const { return EntryKind == dwarf::DW_RLE_end_of_list; }
};
/// A class representing a single rangelist.
class DWARFDebugRnglist : public DWARFListType<RangeListEntry> {
public:
/// Build a DWARFAddressRangesVector from a rangelist.
DWARFAddressRangesVector getAbsoluteRanges(
std::optional<object::SectionedAddress> BaseAddr, uint8_t AddressByteSize,
function_ref<std::optional<object::SectionedAddress>(uint32_t)>
LookupPooledAddress) const;
/// Build a DWARFAddressRangesVector from a rangelist.
DWARFAddressRangesVector
getAbsoluteRanges(std::optional<object::SectionedAddress> BaseAddr,
DWARFUnit &U) const;
};
class DWARFDebugRnglistTable : public DWARFListTableBase<DWARFDebugRnglist> {
public:
DWARFDebugRnglistTable()
: DWARFListTableBase(/* SectionName = */ ".debug_rnglists",
/* HeaderString = */ "ranges:",
/* ListTypeString = */ "range") {}
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFDEBUGRNGLISTS_H
PK hwFZx��"� � # DebugInfo/DWARF/DWARFDebugAranges.hnu �[��� //===- DWARFDebugAranges.h --------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFDEBUGARANGES_H
#define LLVM_DEBUGINFO_DWARF_DWARFDEBUGARANGES_H
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/STLFunctionalExtras.h"
#include <cstdint>
#include <vector>
namespace llvm {
class DWARFDataExtractor;
class Error;
class DWARFContext;
class DWARFDebugAranges {
public:
void generate(DWARFContext *CTX);
uint64_t findAddress(uint64_t Address) const;
private:
void clear();
void extract(DWARFDataExtractor DebugArangesData,
function_ref<void(Error)> RecoverableErrorHandler,
function_ref<void(Error)> WarningHandler);
/// Call appendRange multiple times and then call construct.
void appendRange(uint64_t CUOffset, uint64_t LowPC, uint64_t HighPC);
void construct();
struct Range {
explicit Range(uint64_t LowPC, uint64_t HighPC, uint64_t CUOffset)
: LowPC(LowPC), Length(HighPC - LowPC), CUOffset(CUOffset) {}
void setHighPC(uint64_t HighPC) {
if (HighPC == -1ULL || HighPC <= LowPC)
Length = 0;
else
Length = HighPC - LowPC;
}
uint64_t HighPC() const {
if (Length)
return LowPC + Length;
return -1ULL;
}
bool operator<(const Range &other) const {
return LowPC < other.LowPC;
}
uint64_t LowPC; /// Start of address range.
uint64_t Length; /// End of address range (not including this address).
uint64_t CUOffset; /// Offset of the compile unit or die.
};
struct RangeEndpoint {
uint64_t Address;
uint64_t CUOffset;
bool IsRangeStart;
RangeEndpoint(uint64_t Address, uint64_t CUOffset, bool IsRangeStart)
: Address(Address), CUOffset(CUOffset), IsRangeStart(IsRangeStart) {}
bool operator<(const RangeEndpoint &Other) const {
return Address < Other.Address;
}
};
using RangeColl = std::vector<Range>;
using RangeCollIterator = RangeColl::const_iterator;
std::vector<RangeEndpoint> Endpoints;
RangeColl Aranges;
DenseSet<uint64_t> ParsedCUOffsets;
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFDEBUGARANGES_H
PK hwFZm ��. . # DebugInfo/DWARF/DWARFAddressRange.hnu �[��� //===- DWARFAddressRange.h --------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFADDRESSRANGE_H
#define LLVM_DEBUGINFO_DWARF_DWARFADDRESSRANGE_H
#include "llvm/DebugInfo/DIContext.h"
#include "llvm/Object/ObjectFile.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
#include <tuple>
#include <vector>
namespace llvm {
class raw_ostream;
class DWARFObject;
struct DWARFAddressRange {
uint64_t LowPC;
uint64_t HighPC;
uint64_t SectionIndex;
DWARFAddressRange() = default;
/// Used for unit testing.
DWARFAddressRange(
uint64_t LowPC, uint64_t HighPC,
uint64_t SectionIndex = object::SectionedAddress::UndefSection)
: LowPC(LowPC), HighPC(HighPC), SectionIndex(SectionIndex) {}
/// Returns true if LowPC is smaller or equal to HighPC. This accounts for
/// dead-stripped ranges.
bool valid() const { return LowPC <= HighPC; }
/// Returns true if [LowPC, HighPC) intersects with [RHS.LowPC, RHS.HighPC).
bool intersects(const DWARFAddressRange &RHS) const {
assert(valid() && RHS.valid());
if (SectionIndex != RHS.SectionIndex)
return false;
// Empty ranges can't intersect.
if (LowPC == HighPC || RHS.LowPC == RHS.HighPC)
return false;
return LowPC < RHS.HighPC && RHS.LowPC < HighPC;
}
/// Union two address ranges if they intersect.
///
/// This function will union two address ranges if they intersect by
/// modifying this range to be the union of both ranges. If the two ranges
/// don't intersect this range will be left alone.
///
/// \param RHS Another address range to combine with.
///
/// \returns false if the ranges don't intersect, true if they do and the
/// ranges were combined.
bool merge(const DWARFAddressRange &RHS) {
if (!intersects(RHS))
return false;
LowPC = std::min<uint64_t>(LowPC, RHS.LowPC);
HighPC = std::max<uint64_t>(HighPC, RHS.HighPC);
return true;
}
void dump(raw_ostream &OS, uint32_t AddressSize, DIDumpOptions DumpOpts = {},
const DWARFObject *Obj = nullptr) const;
};
inline bool operator<(const DWARFAddressRange &LHS,
const DWARFAddressRange &RHS) {
return std::tie(LHS.SectionIndex, LHS.LowPC, LHS.HighPC) < std::tie(RHS.SectionIndex, RHS.LowPC, RHS.HighPC);
}
inline bool operator==(const DWARFAddressRange &LHS,
const DWARFAddressRange &RHS) {
return std::tie(LHS.SectionIndex, LHS.LowPC, LHS.HighPC) == std::tie(RHS.SectionIndex, RHS.LowPC, RHS.HighPC);
}
raw_ostream &operator<<(raw_ostream &OS, const DWARFAddressRange &R);
/// DWARFAddressRangesVector - represents a set of absolute address ranges.
using DWARFAddressRangesVector = std::vector<DWARFAddressRange>;
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFADDRESSRANGE_H
PK hwFZ��gm0G 0G DebugInfo/DWARF/DWARFDie.hnu �[��� //===- DWARFDie.h -----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFDIE_H
#define LLVM_DEBUGINFO_DWARF_DWARFDIE_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/iterator.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/DebugInfo/DIContext.h"
#include "llvm/DebugInfo/DWARF/DWARFAddressRange.h"
#include "llvm/DebugInfo/DWARF/DWARFAttribute.h"
#include "llvm/DebugInfo/DWARF/DWARFDebugInfoEntry.h"
#include "llvm/DebugInfo/DWARF/DWARFLocationExpression.h"
#include <cassert>
#include <cstdint>
#include <iterator>
namespace llvm {
class DWARFUnit;
class raw_ostream;
//===----------------------------------------------------------------------===//
/// Utility class that carries the DWARF compile/type unit and the debug info
/// entry in an object.
///
/// When accessing information from a debug info entry we always need to DWARF
/// compile/type unit in order to extract the info correctly as some information
/// is relative to the compile/type unit. Prior to this class the DWARFUnit and
/// the DWARFDebugInfoEntry was passed around separately and there was the
/// possibility for error if the wrong DWARFUnit was used to extract a unit
/// relative offset. This class helps to ensure that this doesn't happen and
/// also simplifies the attribute extraction calls by not having to specify the
/// DWARFUnit for each call.
class DWARFDie {
DWARFUnit *U = nullptr;
const DWARFDebugInfoEntry *Die = nullptr;
public:
DWARFDie() = default;
DWARFDie(DWARFUnit *Unit, const DWARFDebugInfoEntry *D) : U(Unit), Die(D) {}
bool isValid() const { return U && Die; }
explicit operator bool() const { return isValid(); }
const DWARFDebugInfoEntry *getDebugInfoEntry() const { return Die; }
DWARFUnit *getDwarfUnit() const { return U; }
/// Get the abbreviation declaration for this DIE.
///
/// \returns the abbreviation declaration or NULL for null tags.
const DWARFAbbreviationDeclaration *getAbbreviationDeclarationPtr() const {
assert(isValid() && "must check validity prior to calling");
return Die->getAbbreviationDeclarationPtr();
}
/// Get the absolute offset into the debug info or types section.
///
/// \returns the DIE offset or -1U if invalid.
uint64_t getOffset() const {
assert(isValid() && "must check validity prior to calling");
return Die->getOffset();
}
dwarf::Tag getTag() const {
auto AbbrevDecl = getAbbreviationDeclarationPtr();
if (AbbrevDecl)
return AbbrevDecl->getTag();
return dwarf::DW_TAG_null;
}
bool hasChildren() const {
assert(isValid() && "must check validity prior to calling");
return Die->hasChildren();
}
/// Returns true for a valid DIE that terminates a sibling chain.
bool isNULL() const { return getAbbreviationDeclarationPtr() == nullptr; }
/// Returns true if DIE represents a subprogram (not inlined).
bool isSubprogramDIE() const;
/// Returns true if DIE represents a subprogram or an inlined subroutine.
bool isSubroutineDIE() const;
/// Get the parent of this DIE object.
///
/// \returns a valid DWARFDie instance if this object has a parent or an
/// invalid DWARFDie instance if it doesn't.
DWARFDie getParent() const;
/// Get the sibling of this DIE object.
///
/// \returns a valid DWARFDie instance if this object has a sibling or an
/// invalid DWARFDie instance if it doesn't.
DWARFDie getSibling() const;
/// Get the previous sibling of this DIE object.
///
/// \returns a valid DWARFDie instance if this object has a sibling or an
/// invalid DWARFDie instance if it doesn't.
DWARFDie getPreviousSibling() const;
/// Get the first child of this DIE object.
///
/// \returns a valid DWARFDie instance if this object has children or an
/// invalid DWARFDie instance if it doesn't.
DWARFDie getFirstChild() const;
/// Get the last child of this DIE object.
///
/// \returns a valid null DWARFDie instance if this object has children or an
/// invalid DWARFDie instance if it doesn't.
DWARFDie getLastChild() const;
/// Dump the DIE and all of its attributes to the supplied stream.
///
/// \param OS the stream to use for output.
/// \param indent the number of characters to indent each line that is output.
void dump(raw_ostream &OS, unsigned indent = 0,
DIDumpOptions DumpOpts = DIDumpOptions()) const;
/// Convenience zero-argument overload for debugging.
LLVM_DUMP_METHOD void dump() const;
/// Extract the specified attribute from this DIE.
///
/// Extract an attribute value from this DIE only. This call doesn't look
/// for the attribute value in any DW_AT_specification or
/// DW_AT_abstract_origin referenced DIEs.
///
/// \param Attr the attribute to extract.
/// \returns an optional DWARFFormValue that will have the form value if the
/// attribute was successfully extracted.
std::optional<DWARFFormValue> find(dwarf::Attribute Attr) const;
/// Extract the first value of any attribute in Attrs from this DIE.
///
/// Extract the first attribute that matches from this DIE only. This call
/// doesn't look for the attribute value in any DW_AT_specification or
/// DW_AT_abstract_origin referenced DIEs. The attributes will be searched
/// linearly in the order they are specified within Attrs.
///
/// \param Attrs an array of DWARF attribute to look for.
/// \returns an optional that has a valid DWARFFormValue for the first
/// matching attribute in Attrs, or std::nullopt if none of the attributes in
/// Attrs exist in this DIE.
std::optional<DWARFFormValue> find(ArrayRef<dwarf::Attribute> Attrs) const;
/// Extract the first value of any attribute in Attrs from this DIE and
/// recurse into any DW_AT_specification or DW_AT_abstract_origin referenced
/// DIEs.
///
/// \param Attrs an array of DWARF attribute to look for.
/// \returns an optional that has a valid DWARFFormValue for the first
/// matching attribute in Attrs, or std::nullopt if none of the attributes in
/// Attrs exist in this DIE or in any DW_AT_specification or
/// DW_AT_abstract_origin DIEs.
std::optional<DWARFFormValue>
findRecursively(ArrayRef<dwarf::Attribute> Attrs) const;
/// Extract the specified attribute from this DIE as the referenced DIE.
///
/// Regardless of the reference type, return the correct DWARFDie instance if
/// the attribute exists. The returned DWARFDie object might be from another
/// DWARFUnit, but that is all encapsulated in the new DWARFDie object.
///
/// Extract an attribute value from this DIE only. This call doesn't look
/// for the attribute value in any DW_AT_specification or
/// DW_AT_abstract_origin referenced DIEs.
///
/// \param Attr the attribute to extract.
/// \returns a valid DWARFDie instance if the attribute exists, or an invalid
/// DWARFDie object if it doesn't.
DWARFDie getAttributeValueAsReferencedDie(dwarf::Attribute Attr) const;
DWARFDie getAttributeValueAsReferencedDie(const DWARFFormValue &V) const;
DWARFDie resolveTypeUnitReference() const;
/// Extract the range base attribute from this DIE as absolute section offset.
///
/// This is a utility function that checks for either the DW_AT_rnglists_base
/// or DW_AT_GNU_ranges_base attribute.
///
/// \returns anm optional absolute section offset value for the attribute.
std::optional<uint64_t> getRangesBaseAttribute() const;
std::optional<uint64_t> getLocBaseAttribute() const;
/// Get the DW_AT_high_pc attribute value as an address.
///
/// In DWARF version 4 and later the high PC can be encoded as an offset from
/// the DW_AT_low_pc. This function takes care of extracting the value as an
/// address or offset and adds it to the low PC if needed and returns the
/// value as an optional in case the DIE doesn't have a DW_AT_high_pc
/// attribute.
///
/// \param LowPC the low PC that might be needed to calculate the high PC.
/// \returns an optional address value for the attribute.
std::optional<uint64_t> getHighPC(uint64_t LowPC) const;
/// Retrieves DW_AT_low_pc and DW_AT_high_pc from CU.
/// Returns true if both attributes are present.
bool getLowAndHighPC(uint64_t &LowPC, uint64_t &HighPC,
uint64_t &SectionIndex) const;
/// Get the address ranges for this DIE.
///
/// Get the hi/low PC range if both attributes are available or exrtracts the
/// non-contiguous address ranges from the DW_AT_ranges attribute.
///
/// Extracts the range information from this DIE only. This call doesn't look
/// for the range in any DW_AT_specification or DW_AT_abstract_origin DIEs.
///
/// \returns a address range vector that might be empty if no address range
/// information is available.
Expected<DWARFAddressRangesVector> getAddressRanges() const;
bool addressRangeContainsAddress(const uint64_t Address) const;
Expected<DWARFLocationExpressionsVector>
getLocations(dwarf::Attribute Attr) const;
/// If a DIE represents a subprogram (or inlined subroutine), returns its
/// mangled name (or short name, if mangled is missing). This name may be
/// fetched from specification or abstract origin for this subprogram.
/// Returns null if no name is found.
const char *getSubroutineName(DINameKind Kind) const;
/// Return the DIE name resolving DW_AT_specification or DW_AT_abstract_origin
/// references if necessary. For the LinkageName case it additionaly searches
/// for ShortName if LinkageName is not found.
/// Returns null if no name is found.
const char *getName(DINameKind Kind) const;
void getFullName(raw_string_ostream &,
std::string *OriginalFullName = nullptr) const;
/// Return the DIE short name resolving DW_AT_specification or
/// DW_AT_abstract_origin references if necessary. Returns null if no name
/// is found.
const char *getShortName() const;
/// Return the DIE linkage name resolving DW_AT_specification or
/// DW_AT_abstract_origin references if necessary. Returns null if no name
/// is found.
const char *getLinkageName() const;
/// Returns the declaration line (start line) for a DIE, assuming it specifies
/// a subprogram. This may be fetched from specification or abstract origin
/// for this subprogram by resolving DW_AT_sepcification or
/// DW_AT_abstract_origin references if necessary.
uint64_t getDeclLine() const;
std::string getDeclFile(DILineInfoSpecifier::FileLineInfoKind Kind) const;
/// Retrieves values of DW_AT_call_file, DW_AT_call_line and DW_AT_call_column
/// from DIE (or zeroes if they are missing). This function looks for
/// DW_AT_call attributes in this DIE only, it will not resolve the attribute
/// values in any DW_AT_specification or DW_AT_abstract_origin DIEs.
/// \param CallFile filled in with non-zero if successful, zero if there is no
/// DW_AT_call_file attribute in this DIE.
/// \param CallLine filled in with non-zero if successful, zero if there is no
/// DW_AT_call_line attribute in this DIE.
/// \param CallColumn filled in with non-zero if successful, zero if there is
/// no DW_AT_call_column attribute in this DIE.
/// \param CallDiscriminator filled in with non-zero if successful, zero if
/// there is no DW_AT_GNU_discriminator attribute in this DIE.
void getCallerFrame(uint32_t &CallFile, uint32_t &CallLine,
uint32_t &CallColumn, uint32_t &CallDiscriminator) const;
class attribute_iterator;
/// Get an iterator range to all attributes in the current DIE only.
///
/// \returns an iterator range for the attributes of the current DIE.
iterator_range<attribute_iterator> attributes() const;
/// Gets the type size (in bytes) for this DIE.
///
/// \param PointerSize the pointer size of the containing CU.
/// \returns if this is a type DIE, or this DIE contains a DW_AT_type, returns
/// the size of the type.
std::optional<uint64_t> getTypeSize(uint64_t PointerSize);
class iterator;
iterator begin() const;
iterator end() const;
std::reverse_iterator<iterator> rbegin() const;
std::reverse_iterator<iterator> rend() const;
iterator_range<iterator> children() const;
};
class DWARFDie::attribute_iterator
: public iterator_facade_base<attribute_iterator, std::forward_iterator_tag,
const DWARFAttribute> {
/// The DWARF DIE we are extracting attributes from.
DWARFDie Die;
/// The value vended to clients via the operator*() or operator->().
DWARFAttribute AttrValue;
/// The attribute index within the abbreviation declaration in Die.
uint32_t Index;
friend bool operator==(const attribute_iterator &LHS,
const attribute_iterator &RHS);
/// Update the attribute index and attempt to read the attribute value. If the
/// attribute is able to be read, update AttrValue and the Index member
/// variable. If the attribute value is not able to be read, an appropriate
/// error will be set if the Err member variable is non-NULL and the iterator
/// will be set to the end value so iteration stops.
void updateForIndex(const DWARFAbbreviationDeclaration &AbbrDecl, uint32_t I);
public:
attribute_iterator() = delete;
explicit attribute_iterator(DWARFDie D, bool End);
attribute_iterator &operator++();
attribute_iterator &operator--();
explicit operator bool() const { return AttrValue.isValid(); }
const DWARFAttribute &operator*() const { return AttrValue; }
};
inline bool operator==(const DWARFDie::attribute_iterator &LHS,
const DWARFDie::attribute_iterator &RHS) {
return LHS.Index == RHS.Index;
}
inline bool operator!=(const DWARFDie::attribute_iterator &LHS,
const DWARFDie::attribute_iterator &RHS) {
return !(LHS == RHS);
}
inline bool operator==(const DWARFDie &LHS, const DWARFDie &RHS) {
return LHS.getDebugInfoEntry() == RHS.getDebugInfoEntry() &&
LHS.getDwarfUnit() == RHS.getDwarfUnit();
}
inline bool operator!=(const DWARFDie &LHS, const DWARFDie &RHS) {
return !(LHS == RHS);
}
inline bool operator<(const DWARFDie &LHS, const DWARFDie &RHS) {
return LHS.getOffset() < RHS.getOffset();
}
class DWARFDie::iterator
: public iterator_facade_base<iterator, std::bidirectional_iterator_tag,
const DWARFDie> {
DWARFDie Die;
friend std::reverse_iterator<llvm::DWARFDie::iterator>;
friend bool operator==(const DWARFDie::iterator &LHS,
const DWARFDie::iterator &RHS);
public:
iterator() = default;
explicit iterator(DWARFDie D) : Die(D) {}
iterator &operator++() {
Die = Die.getSibling();
return *this;
}
iterator &operator--() {
Die = Die.getPreviousSibling();
return *this;
}
const DWARFDie &operator*() const { return Die; }
};
inline bool operator==(const DWARFDie::iterator &LHS,
const DWARFDie::iterator &RHS) {
return LHS.Die == RHS.Die;
}
// These inline functions must follow the DWARFDie::iterator definition above
// as they use functions from that class.
inline DWARFDie::iterator DWARFDie::begin() const {
return iterator(getFirstChild());
}
inline DWARFDie::iterator DWARFDie::end() const {
return iterator(getLastChild());
}
inline iterator_range<DWARFDie::iterator> DWARFDie::children() const {
return make_range(begin(), end());
}
} // end namespace llvm
namespace std {
template <>
class reverse_iterator<llvm::DWARFDie::iterator>
: public llvm::iterator_facade_base<
reverse_iterator<llvm::DWARFDie::iterator>,
bidirectional_iterator_tag, const llvm::DWARFDie> {
private:
llvm::DWARFDie Die;
bool AtEnd;
public:
reverse_iterator(llvm::DWARFDie::iterator It)
: Die(It.Die), AtEnd(!It.Die.getPreviousSibling()) {
if (!AtEnd)
Die = Die.getPreviousSibling();
}
llvm::DWARFDie::iterator base() const {
return llvm::DWARFDie::iterator(AtEnd ? Die : Die.getSibling());
}
reverse_iterator<llvm::DWARFDie::iterator> &operator++() {
assert(!AtEnd && "Incrementing rend");
llvm::DWARFDie D = Die.getPreviousSibling();
if (D)
Die = D;
else
AtEnd = true;
return *this;
}
reverse_iterator<llvm::DWARFDie::iterator> &operator--() {
if (AtEnd) {
AtEnd = false;
return *this;
}
Die = Die.getSibling();
assert(!Die.isNULL() && "Decrementing rbegin");
return *this;
}
const llvm::DWARFDie &operator*() const {
assert(Die.isValid());
return Die;
}
// FIXME: We should be able to specify the equals operator as a friend, but
// that causes the compiler to think the operator overload is ambiguous
// with the friend declaration and the actual definition as candidates.
bool equals(const reverse_iterator<llvm::DWARFDie::iterator> &RHS) const {
return Die == RHS.Die && AtEnd == RHS.AtEnd;
}
};
} // namespace std
namespace llvm {
inline bool operator==(const std::reverse_iterator<DWARFDie::iterator> &LHS,
const std::reverse_iterator<DWARFDie::iterator> &RHS) {
return LHS.equals(RHS);
}
inline bool operator!=(const std::reverse_iterator<DWARFDie::iterator> &LHS,
const std::reverse_iterator<DWARFDie::iterator> &RHS) {
return !(LHS == RHS);
}
inline std::reverse_iterator<DWARFDie::iterator> DWARFDie::rbegin() const {
return std::make_reverse_iterator(end());
}
inline std::reverse_iterator<DWARFDie::iterator> DWARFDie::rend() const {
return std::make_reverse_iterator(begin());
}
void dumpTypeQualifiedName(const DWARFDie &DIE, raw_ostream &OS);
void dumpTypeUnqualifiedName(const DWARFDie &DIE, raw_ostream &OS,
std::string *OriginalFullName = nullptr);
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFDIE_H
PK hwFZ����r �r ! DebugInfo/DWARF/DWARFDebugFrame.hnu �[��� //===- DWARFDebugFrame.h - Parsing of .debug_frame --------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFDEBUGFRAME_H
#define LLVM_DEBUGINFO_DWARF_DWARFDEBUGFRAME_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/iterator.h"
#include "llvm/DebugInfo/DWARF/DWARFExpression.h"
#include "llvm/Support/Error.h"
#include "llvm/TargetParser/Triple.h"
#include <map>
#include <memory>
#include <vector>
namespace llvm {
class raw_ostream;
class DWARFDataExtractor;
class MCRegisterInfo;
struct DIDumpOptions;
namespace dwarf {
constexpr uint32_t InvalidRegisterNumber = UINT32_MAX;
/// A class that represents a location for the Call Frame Address (CFA) or a
/// register. This is decoded from the DWARF Call Frame Information
/// instructions and put into an UnwindRow.
class UnwindLocation {
public:
enum Location {
/// Not specified.
Unspecified,
/// Register is not available and can't be recovered.
Undefined,
/// Register value is in the register, nothing needs to be done to unwind
/// it:
/// reg = reg
Same,
/// Register is in or at the CFA plus an offset:
/// reg = CFA + offset
/// reg = defef(CFA + offset)
CFAPlusOffset,
/// Register or CFA is in or at a register plus offset, optionally in
/// an address space:
/// reg = reg + offset [in addrspace]
/// reg = deref(reg + offset [in addrspace])
RegPlusOffset,
/// Register or CFA value is in or at a value found by evaluating a DWARF
/// expression:
/// reg = eval(dwarf_expr)
/// reg = deref(eval(dwarf_expr))
DWARFExpr,
/// Value is a constant value contained in "Offset":
/// reg = Offset
Constant,
};
private:
Location Kind; /// The type of the location that describes how to unwind it.
uint32_t RegNum; /// The register number for Kind == RegPlusOffset.
int32_t Offset; /// The offset for Kind == CFAPlusOffset or RegPlusOffset.
std::optional<uint32_t> AddrSpace; /// The address space for Kind ==
/// RegPlusOffset for CFA.
std::optional<DWARFExpression> Expr; /// The DWARF expression for Kind ==
/// DWARFExpression.
bool Dereference; /// If true, the resulting location must be dereferenced
/// after the location value is computed.
// Constructors are private to force people to use the create static
// functions.
UnwindLocation(Location K)
: Kind(K), RegNum(InvalidRegisterNumber), Offset(0),
AddrSpace(std::nullopt), Dereference(false) {}
UnwindLocation(Location K, uint32_t Reg, int32_t Off,
std::optional<uint32_t> AS, bool Deref)
: Kind(K), RegNum(Reg), Offset(Off), AddrSpace(AS), Dereference(Deref) {}
UnwindLocation(DWARFExpression E, bool Deref)
: Kind(DWARFExpr), RegNum(InvalidRegisterNumber), Offset(0), Expr(E),
Dereference(Deref) {}
public:
/// Create a location whose rule is set to Unspecified. This means the
/// register value might be in the same register but it wasn't specified in
/// the unwind opcodes.
static UnwindLocation createUnspecified();
/// Create a location where the value is undefined and not available. This can
/// happen when a register is volatile and can't be recovered.
static UnwindLocation createUndefined();
/// Create a location where the value is known to be in the register itself.
static UnwindLocation createSame();
/// Create a location that is in (Deref == false) or at (Deref == true) the
/// CFA plus an offset. Most registers that are spilled onto the stack use
/// this rule. The rule for the register will use this rule and specify a
/// unique offset from the CFA with \a Deref set to true. This value will be
/// relative to a CFA value which is typically defined using the register
/// plus offset location. \see createRegisterPlusOffset(...) for more
/// information.
static UnwindLocation createIsCFAPlusOffset(int32_t Off);
static UnwindLocation createAtCFAPlusOffset(int32_t Off);
/// Create a location where the saved value is in (Deref == false) or at
/// (Deref == true) a regiser plus an offset and, optionally, in the specified
/// address space (used mostly for the CFA).
///
/// The CFA is usually defined using this rule by using the stack pointer or
/// frame pointer as the register, with an offset that accounts for all
/// spilled registers and all local variables in a function, and Deref ==
/// false.
static UnwindLocation
createIsRegisterPlusOffset(uint32_t Reg, int32_t Off,
std::optional<uint32_t> AddrSpace = std::nullopt);
static UnwindLocation
createAtRegisterPlusOffset(uint32_t Reg, int32_t Off,
std::optional<uint32_t> AddrSpace = std::nullopt);
/// Create a location whose value is the result of evaluating a DWARF
/// expression. This allows complex expressions to be evaluated in order to
/// unwind a register or CFA value.
static UnwindLocation createIsDWARFExpression(DWARFExpression Expr);
static UnwindLocation createAtDWARFExpression(DWARFExpression Expr);
static UnwindLocation createIsConstant(int32_t Value);
Location getLocation() const { return Kind; }
uint32_t getRegister() const { return RegNum; }
int32_t getOffset() const { return Offset; }
uint32_t getAddressSpace() const {
assert(Kind == RegPlusOffset && AddrSpace);
return *AddrSpace;
}
int32_t getConstant() const { return Offset; }
/// Some opcodes will modify the CFA location's register only, so we need
/// to be able to modify the CFA register when evaluating DWARF Call Frame
/// Information opcodes.
void setRegister(uint32_t NewRegNum) { RegNum = NewRegNum; }
/// Some opcodes will modify the CFA location's offset only, so we need
/// to be able to modify the CFA offset when evaluating DWARF Call Frame
/// Information opcodes.
void setOffset(int32_t NewOffset) { Offset = NewOffset; }
/// Some opcodes modify a constant value and we need to be able to update
/// the constant value (DW_CFA_GNU_window_save which is also known as
// DW_CFA_AARCH64_negate_ra_state).
void setConstant(int32_t Value) { Offset = Value; }
std::optional<DWARFExpression> getDWARFExpressionBytes() const {
return Expr;
}
/// Dump a location expression as text and use the register information if
/// some is provided.
///
/// \param OS the stream to use for output.
///
/// \param MRI register information that helps emit register names insteead
/// of raw register numbers.
///
/// \param IsEH true if the DWARF Call Frame Information is from .eh_frame
/// instead of from .debug_frame. This is needed for register number
/// conversion because some register numbers differ between the two sections
/// for certain architectures like x86.
void dump(raw_ostream &OS, DIDumpOptions DumpOpts) const;
bool operator==(const UnwindLocation &RHS) const;
};
raw_ostream &operator<<(raw_ostream &OS, const UnwindLocation &R);
/// A class that can track all registers with locations in a UnwindRow object.
///
/// Register locations use a map where the key is the register number and the
/// the value is a UnwindLocation.
///
/// The register maps are put into a class so that all register locations can
/// be copied when parsing the unwind opcodes DW_CFA_remember_state and
/// DW_CFA_restore_state.
class RegisterLocations {
std::map<uint32_t, UnwindLocation> Locations;
public:
/// Return the location for the register in \a RegNum if there is a location.
///
/// \param RegNum the register number to find a location for.
///
/// \returns A location if one is available for \a RegNum, or std::nullopt
/// otherwise.
std::optional<UnwindLocation> getRegisterLocation(uint32_t RegNum) const {
auto Pos = Locations.find(RegNum);
if (Pos == Locations.end())
return std::nullopt;
return Pos->second;
}
/// Set the location for the register in \a RegNum to \a Location.
///
/// \param RegNum the register number to set the location for.
///
/// \param Location the UnwindLocation that describes how to unwind the value.
void setRegisterLocation(uint32_t RegNum, const UnwindLocation &Location) {
Locations.erase(RegNum);
Locations.insert(std::make_pair(RegNum, Location));
}
/// Removes any rule for the register in \a RegNum.
///
/// \param RegNum the register number to remove the location for.
void removeRegisterLocation(uint32_t RegNum) { Locations.erase(RegNum); }
/// Dump all registers + locations that are currently defined in this object.
///
/// \param OS the stream to use for output.
///
/// \param MRI register information that helps emit register names insteead
/// of raw register numbers.
///
/// \param IsEH true if the DWARF Call Frame Information is from .eh_frame
/// instead of from .debug_frame. This is needed for register number
/// conversion because some register numbers differ between the two sections
/// for certain architectures like x86.
void dump(raw_ostream &OS, DIDumpOptions DumpOpts) const;
/// Returns true if we have any register locations in this object.
bool hasLocations() const { return !Locations.empty(); }
size_t size() const { return Locations.size(); }
bool operator==(const RegisterLocations &RHS) const {
return Locations == RHS.Locations;
}
};
raw_ostream &operator<<(raw_ostream &OS, const RegisterLocations &RL);
/// A class that represents a single row in the unwind table that is decoded by
/// parsing the DWARF Call Frame Information opcodes.
///
/// The row consists of an optional address, the rule to unwind the CFA and all
/// rules to unwind any registers. If the address doesn't have a value, this
/// row represents the initial instructions for a CIE. If the address has a
/// value the UnwindRow represents a row in the UnwindTable for a FDE. The
/// address is the first address for which the CFA location and register rules
/// are valid within a function.
///
/// UnwindRow objects are created by parsing opcodes in the DWARF Call Frame
/// Information and UnwindRow objects are lazily populated and pushed onto a
/// stack in the UnwindTable when evaluating this state machine. Accessors are
/// needed for the address, CFA value, and register locations as the opcodes
/// encode a state machine that produces a sorted array of UnwindRow objects
/// \see UnwindTable.
class UnwindRow {
/// The address will be valid when parsing the instructions in a FDE. If
/// invalid, this object represents the initial instructions of a CIE.
std::optional<uint64_t> Address; ///< Address for row in FDE, invalid for CIE.
UnwindLocation CFAValue; ///< How to unwind the Call Frame Address (CFA).
RegisterLocations RegLocs; ///< How to unwind all registers in this list.
public:
UnwindRow() : CFAValue(UnwindLocation::createUnspecified()) {}
/// Returns true if the address is valid in this object.
bool hasAddress() const { return Address.has_value(); }
/// Get the address for this row.
///
/// Clients should only call this function after verifying it has a valid
/// address with a call to \see hasAddress().
uint64_t getAddress() const { return *Address; }
/// Set the address for this UnwindRow.
///
/// The address represents the first address for which the CFAValue and
/// RegLocs are valid within a function.
void setAddress(uint64_t Addr) { Address = Addr; }
/// Offset the address for this UnwindRow.
///
/// The address represents the first address for which the CFAValue and
/// RegLocs are valid within a function. Clients must ensure that this object
/// already has an address (\see hasAddress()) prior to calling this
/// function.
void slideAddress(uint64_t Offset) { *Address += Offset; }
UnwindLocation &getCFAValue() { return CFAValue; }
const UnwindLocation &getCFAValue() const { return CFAValue; }
RegisterLocations &getRegisterLocations() { return RegLocs; }
const RegisterLocations &getRegisterLocations() const { return RegLocs; }
/// Dump the UnwindRow to the stream.
///
/// \param OS the stream to use for output.
///
/// \param MRI register information that helps emit register names insteead
/// of raw register numbers.
///
/// \param IsEH true if the DWARF Call Frame Information is from .eh_frame
/// instead of from .debug_frame. This is needed for register number
/// conversion because some register numbers differ between the two sections
/// for certain architectures like x86.
///
/// \param IndentLevel specify the indent level as an integer. The UnwindRow
/// will be output to the stream preceded by 2 * IndentLevel number of spaces.
void dump(raw_ostream &OS, DIDumpOptions DumpOpts,
unsigned IndentLevel = 0) const;
};
raw_ostream &operator<<(raw_ostream &OS, const UnwindRow &Row);
class CFIProgram;
class CIE;
class FDE;
/// A class that contains all UnwindRow objects for an FDE or a single unwind
/// row for a CIE. To unwind an address the rows, which are sorted by start
/// address, can be searched to find the UnwindRow with the lowest starting
/// address that is greater than or equal to the address that is being looked
/// up.
class UnwindTable {
public:
using RowContainer = std::vector<UnwindRow>;
using iterator = RowContainer::iterator;
using const_iterator = RowContainer::const_iterator;
size_t size() const { return Rows.size(); }
iterator begin() { return Rows.begin(); }
const_iterator begin() const { return Rows.begin(); }
iterator end() { return Rows.end(); }
const_iterator end() const { return Rows.end(); }
const UnwindRow &operator[](size_t Index) const {
assert(Index < size());
return Rows[Index];
}
/// Dump the UnwindTable to the stream.
///
/// \param OS the stream to use for output.
///
/// \param MRI register information that helps emit register names insteead
/// of raw register numbers.
///
/// \param IsEH true if the DWARF Call Frame Information is from .eh_frame
/// instead of from .debug_frame. This is needed for register number
/// conversion because some register numbers differ between the two sections
/// for certain architectures like x86.
///
/// \param IndentLevel specify the indent level as an integer. The UnwindRow
/// will be output to the stream preceded by 2 * IndentLevel number of spaces.
void dump(raw_ostream &OS, DIDumpOptions DumpOpts,
unsigned IndentLevel = 0) const;
/// Create an UnwindTable from a Common Information Entry (CIE).
///
/// \param Cie The Common Information Entry to extract the table from. The
/// CFIProgram is retrieved from the \a Cie object and used to create the
/// UnwindTable.
///
/// \returns An error if the DWARF Call Frame Information opcodes have state
/// machine errors, or a valid UnwindTable otherwise.
static Expected<UnwindTable> create(const CIE *Cie);
/// Create an UnwindTable from a Frame Descriptor Entry (FDE).
///
/// \param Fde The Frame Descriptor Entry to extract the table from. The
/// CFIProgram is retrieved from the \a Fde object and used to create the
/// UnwindTable.
///
/// \returns An error if the DWARF Call Frame Information opcodes have state
/// machine errors, or a valid UnwindTable otherwise.
static Expected<UnwindTable> create(const FDE *Fde);
private:
RowContainer Rows;
/// The end address when data is extracted from a FDE. This value will be
/// invalid when a UnwindTable is extracted from a CIE.
std::optional<uint64_t> EndAddress;
/// Parse the information in the CFIProgram and update the CurrRow object
/// that the state machine describes.
///
/// This is an internal implementation that emulates the state machine
/// described in the DWARF Call Frame Information opcodes and will push
/// CurrRow onto the Rows container when needed.
///
/// \param CFIP the CFI program that contains the opcodes from a CIE or FDE.
///
/// \param CurrRow the current row to modify while parsing the state machine.
///
/// \param InitialLocs If non-NULL, we are parsing a FDE and this contains
/// the initial register locations from the CIE. If NULL, then a CIE's
/// opcodes are being parsed and this is not needed. This is used for the
/// DW_CFA_restore and DW_CFA_restore_extended opcodes.
Error parseRows(const CFIProgram &CFIP, UnwindRow &CurrRow,
const RegisterLocations *InitialLocs);
};
raw_ostream &operator<<(raw_ostream &OS, const UnwindTable &Rows);
/// Represent a sequence of Call Frame Information instructions that, when read
/// in order, construct a table mapping PC to frame state. This can also be
/// referred to as "CFI rules" in DWARF literature to avoid confusion with
/// computer programs in the broader sense, and in this context each instruction
/// would be a rule to establish the mapping. Refer to pg. 172 in the DWARF5
/// manual, "6.4.1 Structure of Call Frame Information".
class CFIProgram {
public:
static constexpr size_t MaxOperands = 3;
typedef SmallVector<uint64_t, MaxOperands> Operands;
/// An instruction consists of a DWARF CFI opcode and an optional sequence of
/// operands. If it refers to an expression, then this expression has its own
/// sequence of operations and operands handled separately by DWARFExpression.
struct Instruction {
Instruction(uint8_t Opcode) : Opcode(Opcode) {}
uint8_t Opcode;
Operands Ops;
// Associated DWARF expression in case this instruction refers to one
std::optional<DWARFExpression> Expression;
Expected<uint64_t> getOperandAsUnsigned(const CFIProgram &CFIP,
uint32_t OperandIdx) const;
Expected<int64_t> getOperandAsSigned(const CFIProgram &CFIP,
uint32_t OperandIdx) const;
};
using InstrList = std::vector<Instruction>;
using iterator = InstrList::iterator;
using const_iterator = InstrList::const_iterator;
iterator begin() { return Instructions.begin(); }
const_iterator begin() const { return Instructions.begin(); }
iterator end() { return Instructions.end(); }
const_iterator end() const { return Instructions.end(); }
unsigned size() const { return (unsigned)Instructions.size(); }
bool empty() const { return Instructions.empty(); }
uint64_t codeAlign() const { return CodeAlignmentFactor; }
int64_t dataAlign() const { return DataAlignmentFactor; }
Triple::ArchType triple() const { return Arch; }
CFIProgram(uint64_t CodeAlignmentFactor, int64_t DataAlignmentFactor,
Triple::ArchType Arch)
: CodeAlignmentFactor(CodeAlignmentFactor),
DataAlignmentFactor(DataAlignmentFactor),
Arch(Arch) {}
/// Parse and store a sequence of CFI instructions from Data,
/// starting at *Offset and ending at EndOffset. *Offset is updated
/// to EndOffset upon successful parsing, or indicates the offset
/// where a problem occurred in case an error is returned.
Error parse(DWARFDataExtractor Data, uint64_t *Offset, uint64_t EndOffset);
void dump(raw_ostream &OS, DIDumpOptions DumpOpts,
unsigned IndentLevel = 1) const;
void addInstruction(const Instruction &I) { Instructions.push_back(I); }
/// Get a DWARF CFI call frame string for the given DW_CFA opcode.
StringRef callFrameString(unsigned Opcode) const;
private:
std::vector<Instruction> Instructions;
const uint64_t CodeAlignmentFactor;
const int64_t DataAlignmentFactor;
Triple::ArchType Arch;
/// Convenience method to add a new instruction with the given opcode.
void addInstruction(uint8_t Opcode) {
Instructions.push_back(Instruction(Opcode));
}
/// Add a new single-operand instruction.
void addInstruction(uint8_t Opcode, uint64_t Operand1) {
Instructions.push_back(Instruction(Opcode));
Instructions.back().Ops.push_back(Operand1);
}
/// Add a new instruction that has two operands.
void addInstruction(uint8_t Opcode, uint64_t Operand1, uint64_t Operand2) {
Instructions.push_back(Instruction(Opcode));
Instructions.back().Ops.push_back(Operand1);
Instructions.back().Ops.push_back(Operand2);
}
/// Add a new instruction that has three operands.
void addInstruction(uint8_t Opcode, uint64_t Operand1, uint64_t Operand2,
uint64_t Operand3) {
Instructions.push_back(Instruction(Opcode));
Instructions.back().Ops.push_back(Operand1);
Instructions.back().Ops.push_back(Operand2);
Instructions.back().Ops.push_back(Operand3);
}
/// Types of operands to CFI instructions
/// In DWARF, this type is implicitly tied to a CFI instruction opcode and
/// thus this type doesn't need to be explictly written to the file (this is
/// not a DWARF encoding). The relationship of instrs to operand types can
/// be obtained from getOperandTypes() and is only used to simplify
/// instruction printing.
enum OperandType {
OT_Unset,
OT_None,
OT_Address,
OT_Offset,
OT_FactoredCodeOffset,
OT_SignedFactDataOffset,
OT_UnsignedFactDataOffset,
OT_Register,
OT_AddressSpace,
OT_Expression
};
/// Get the OperandType as a "const char *".
static const char *operandTypeString(OperandType OT);
/// Retrieve the array describing the types of operands according to the enum
/// above. This is indexed by opcode.
static ArrayRef<OperandType[MaxOperands]> getOperandTypes();
/// Print \p Opcode's operand number \p OperandIdx which has value \p Operand.
void printOperand(raw_ostream &OS, DIDumpOptions DumpOpts,
const Instruction &Instr, unsigned OperandIdx,
uint64_t Operand) const;
};
/// An entry in either debug_frame or eh_frame. This entry can be a CIE or an
/// FDE.
class FrameEntry {
public:
enum FrameKind { FK_CIE, FK_FDE };
FrameEntry(FrameKind K, bool IsDWARF64, uint64_t Offset, uint64_t Length,
uint64_t CodeAlign, int64_t DataAlign, Triple::ArchType Arch)
: Kind(K), IsDWARF64(IsDWARF64), Offset(Offset), Length(Length),
CFIs(CodeAlign, DataAlign, Arch) {}
virtual ~FrameEntry() = default;
FrameKind getKind() const { return Kind; }
uint64_t getOffset() const { return Offset; }
uint64_t getLength() const { return Length; }
const CFIProgram &cfis() const { return CFIs; }
CFIProgram &cfis() { return CFIs; }
/// Dump the instructions in this CFI fragment
virtual void dump(raw_ostream &OS, DIDumpOptions DumpOpts) const = 0;
protected:
const FrameKind Kind;
const bool IsDWARF64;
/// Offset of this entry in the section.
const uint64_t Offset;
/// Entry length as specified in DWARF.
const uint64_t Length;
CFIProgram CFIs;
};
/// DWARF Common Information Entry (CIE)
class CIE : public FrameEntry {
public:
// CIEs (and FDEs) are simply container classes, so the only sensible way to
// create them is by providing the full parsed contents in the constructor.
CIE(bool IsDWARF64, uint64_t Offset, uint64_t Length, uint8_t Version,
SmallString<8> Augmentation, uint8_t AddressSize,
uint8_t SegmentDescriptorSize, uint64_t CodeAlignmentFactor,
int64_t DataAlignmentFactor, uint64_t ReturnAddressRegister,
SmallString<8> AugmentationData, uint32_t FDEPointerEncoding,
uint32_t LSDAPointerEncoding, std::optional<uint64_t> Personality,
std::optional<uint32_t> PersonalityEnc, Triple::ArchType Arch)
: FrameEntry(FK_CIE, IsDWARF64, Offset, Length, CodeAlignmentFactor,
DataAlignmentFactor, Arch),
Version(Version), Augmentation(std::move(Augmentation)),
AddressSize(AddressSize), SegmentDescriptorSize(SegmentDescriptorSize),
CodeAlignmentFactor(CodeAlignmentFactor),
DataAlignmentFactor(DataAlignmentFactor),
ReturnAddressRegister(ReturnAddressRegister),
AugmentationData(std::move(AugmentationData)),
FDEPointerEncoding(FDEPointerEncoding),
LSDAPointerEncoding(LSDAPointerEncoding), Personality(Personality),
PersonalityEnc(PersonalityEnc) {}
static bool classof(const FrameEntry *FE) { return FE->getKind() == FK_CIE; }
StringRef getAugmentationString() const { return Augmentation; }
uint64_t getCodeAlignmentFactor() const { return CodeAlignmentFactor; }
int64_t getDataAlignmentFactor() const { return DataAlignmentFactor; }
uint8_t getVersion() const { return Version; }
uint64_t getReturnAddressRegister() const { return ReturnAddressRegister; }
std::optional<uint64_t> getPersonalityAddress() const { return Personality; }
std::optional<uint32_t> getPersonalityEncoding() const {
return PersonalityEnc;
}
StringRef getAugmentationData() const { return AugmentationData; }
uint32_t getFDEPointerEncoding() const { return FDEPointerEncoding; }
uint32_t getLSDAPointerEncoding() const { return LSDAPointerEncoding; }
void dump(raw_ostream &OS, DIDumpOptions DumpOpts) const override;
private:
/// The following fields are defined in section 6.4.1 of the DWARF standard v4
const uint8_t Version;
const SmallString<8> Augmentation;
const uint8_t AddressSize;
const uint8_t SegmentDescriptorSize;
const uint64_t CodeAlignmentFactor;
const int64_t DataAlignmentFactor;
const uint64_t ReturnAddressRegister;
// The following are used when the CIE represents an EH frame entry.
const SmallString<8> AugmentationData;
const uint32_t FDEPointerEncoding;
const uint32_t LSDAPointerEncoding;
const std::optional<uint64_t> Personality;
const std::optional<uint32_t> PersonalityEnc;
};
/// DWARF Frame Description Entry (FDE)
class FDE : public FrameEntry {
public:
FDE(bool IsDWARF64, uint64_t Offset, uint64_t Length, uint64_t CIEPointer,
uint64_t InitialLocation, uint64_t AddressRange, CIE *Cie,
std::optional<uint64_t> LSDAAddress, Triple::ArchType Arch)
: FrameEntry(FK_FDE, IsDWARF64, Offset, Length,
Cie ? Cie->getCodeAlignmentFactor() : 0,
Cie ? Cie->getDataAlignmentFactor() : 0, Arch),
CIEPointer(CIEPointer), InitialLocation(InitialLocation),
AddressRange(AddressRange), LinkedCIE(Cie), LSDAAddress(LSDAAddress) {}
~FDE() override = default;
const CIE *getLinkedCIE() const { return LinkedCIE; }
uint64_t getCIEPointer() const { return CIEPointer; }
uint64_t getInitialLocation() const { return InitialLocation; }
uint64_t getAddressRange() const { return AddressRange; }
std::optional<uint64_t> getLSDAAddress() const { return LSDAAddress; }
void dump(raw_ostream &OS, DIDumpOptions DumpOpts) const override;
static bool classof(const FrameEntry *FE) { return FE->getKind() == FK_FDE; }
private:
/// The following fields are defined in section 6.4.1 of the DWARFv3 standard.
/// Note that CIE pointers in EH FDEs, unlike DWARF FDEs, contain relative
/// offsets to the linked CIEs. See the following link for more info:
/// https://refspecs.linuxfoundation.org/LSB_5.0.0/LSB-Core-generic/LSB-Core-generic/ehframechpt.html
const uint64_t CIEPointer;
const uint64_t InitialLocation;
const uint64_t AddressRange;
const CIE *LinkedCIE;
const std::optional<uint64_t> LSDAAddress;
};
} // end namespace dwarf
/// A parsed .debug_frame or .eh_frame section
class DWARFDebugFrame {
const Triple::ArchType Arch;
// True if this is parsing an eh_frame section.
const bool IsEH;
// Not zero for sane pointer values coming out of eh_frame
const uint64_t EHFrameAddress;
std::vector<std::unique_ptr<dwarf::FrameEntry>> Entries;
using iterator = pointee_iterator<decltype(Entries)::const_iterator>;
/// Return the entry at the given offset or nullptr.
dwarf::FrameEntry *getEntryAtOffset(uint64_t Offset) const;
public:
// If IsEH is true, assume it is a .eh_frame section. Otherwise,
// it is a .debug_frame section. EHFrameAddress should be different
// than zero for correct parsing of .eh_frame addresses when they
// use a PC-relative encoding.
DWARFDebugFrame(Triple::ArchType Arch,
bool IsEH = false, uint64_t EHFrameAddress = 0);
~DWARFDebugFrame();
/// Dump the section data into the given stream.
void dump(raw_ostream &OS, DIDumpOptions DumpOpts,
std::optional<uint64_t> Offset) const;
/// Parse the section from raw data. \p Data is assumed to contain the whole
/// frame section contents to be parsed.
Error parse(DWARFDataExtractor Data);
/// Return whether the section has any entries.
bool empty() const { return Entries.empty(); }
/// DWARF Frame entries accessors
iterator begin() const { return Entries.begin(); }
iterator end() const { return Entries.end(); }
iterator_range<iterator> entries() const {
return iterator_range<iterator>(Entries.begin(), Entries.end());
}
uint64_t getEHFrameAddress() const { return EHFrameAddress; }
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFDEBUGFRAME_H
PK hwFZ��3f$ $ " DebugInfo/DWARF/DWARFTypePrinter.hnu �[��� //===- DWARFTypePrinter.h ---------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFTYPEPRINTER_H
#define LLVM_DEBUGINFO_DWARF_DWARFTYPEPRINTER_H
#include "llvm/ADT/StringRef.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/DebugInfo/DWARF/DWARFDie.h"
#include <string>
namespace llvm {
class raw_ostream;
// FIXME: We should have pretty printers per language. Currently we print
// everything as if it was C++ and fall back to the TAG type name.
struct DWARFTypePrinter {
raw_ostream &OS;
bool Word = true;
bool EndedWithTemplate = false;
DWARFTypePrinter(raw_ostream &OS) : OS(OS) {}
/// Dump the name encoded in the type tag.
void appendTypeTagName(dwarf::Tag T);
void appendArrayType(const DWARFDie &D);
DWARFDie skipQualifiers(DWARFDie D);
bool needsParens(DWARFDie D);
void appendPointerLikeTypeBefore(DWARFDie D, DWARFDie Inner, StringRef Ptr);
DWARFDie appendUnqualifiedNameBefore(DWARFDie D,
std::string *OriginalFullName = nullptr);
void appendUnqualifiedNameAfter(DWARFDie D, DWARFDie Inner,
bool SkipFirstParamIfArtificial = false);
void appendQualifiedName(DWARFDie D);
DWARFDie appendQualifiedNameBefore(DWARFDie D);
bool appendTemplateParameters(DWARFDie D, bool *FirstParameter = nullptr);
void decomposeConstVolatile(DWARFDie &N, DWARFDie &T, DWARFDie &C,
DWARFDie &V);
void appendConstVolatileQualifierAfter(DWARFDie N);
void appendConstVolatileQualifierBefore(DWARFDie N);
/// Recursively append the DIE type name when applicable.
void appendUnqualifiedName(DWARFDie D,
std::string *OriginalFullName = nullptr);
void appendSubroutineNameAfter(DWARFDie D, DWARFDie Inner,
bool SkipFirstParamIfArtificial, bool Const,
bool Volatile);
void appendScopes(DWARFDie D);
};
} // namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFTYPEPRINTER_H
PK hwFZ ��d d % DebugInfo/DWARF/DWARFDebugInfoEntry.hnu �[��� //===- DWARFDebugInfoEntry.h ------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFDEBUGINFOENTRY_H
#define LLVM_DEBUGINFO_DWARF_DWARFDEBUGINFOENTRY_H
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/DebugInfo/DWARF/DWARFAbbreviationDeclaration.h"
#include <cstdint>
namespace llvm {
class DWARFUnit;
class DWARFDataExtractor;
/// DWARFDebugInfoEntry - A DIE with only the minimum required data.
class DWARFDebugInfoEntry {
/// Offset within the .debug_info of the start of this entry.
uint64_t Offset = 0;
/// Index of the parent die. UINT32_MAX if there is no parent.
uint32_t ParentIdx = UINT32_MAX;
/// Index of the sibling die. Zero if there is no sibling.
uint32_t SiblingIdx = 0;
const DWARFAbbreviationDeclaration *AbbrevDecl = nullptr;
public:
DWARFDebugInfoEntry() = default;
/// Extracts a debug info entry, which is a child of a given unit,
/// starting at a given offset. If DIE can't be extracted, returns false and
/// doesn't change OffsetPtr.
/// High performance extraction should use this call.
bool extractFast(const DWARFUnit &U, uint64_t *OffsetPtr,
const DWARFDataExtractor &DebugInfoData, uint64_t UEndOffset,
uint32_t ParentIdx);
uint64_t getOffset() const { return Offset; }
/// Returns index of the parent die.
std::optional<uint32_t> getParentIdx() const {
if (ParentIdx == UINT32_MAX)
return std::nullopt;
return ParentIdx;
}
/// Returns index of the sibling die.
std::optional<uint32_t> getSiblingIdx() const {
if (SiblingIdx == 0)
return std::nullopt;
return SiblingIdx;
}
/// Set index of sibling.
void setSiblingIdx(uint32_t Idx) { SiblingIdx = Idx; }
dwarf::Tag getTag() const {
return AbbrevDecl ? AbbrevDecl->getTag() : dwarf::DW_TAG_null;
}
bool hasChildren() const { return AbbrevDecl && AbbrevDecl->hasChildren(); }
const DWARFAbbreviationDeclaration *getAbbreviationDeclarationPtr() const {
return AbbrevDecl;
}
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFDEBUGINFOENTRY_H
PK hwFZbw��� � . DebugInfo/DWARF/DWARFAbbreviationDeclaration.hnu �[��� //===- DWARFAbbreviationDeclaration.h ---------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFABBREVIATIONDECLARATION_H
#define LLVM_DEBUGINFO_DWARF_DWARFABBREVIATIONDECLARATION_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/DebugInfo/DWARF/DWARFFormValue.h"
#include <cassert>
#include <cstddef>
#include <cstdint>
namespace llvm {
class DataExtractor;
class DWARFUnit;
class raw_ostream;
class DWARFAbbreviationDeclaration {
public:
enum class ExtractState { Complete, MoreItems };
struct AttributeSpec {
AttributeSpec(dwarf::Attribute A, dwarf::Form F, int64_t Value)
: Attr(A), Form(F), Value(Value) {
assert(isImplicitConst());
}
AttributeSpec(dwarf::Attribute A, dwarf::Form F,
std::optional<uint8_t> ByteSize)
: Attr(A), Form(F) {
assert(!isImplicitConst());
this->ByteSize.HasByteSize = ByteSize.has_value();
if (this->ByteSize.HasByteSize)
this->ByteSize.ByteSize = *ByteSize;
}
DWARFFormValue getFormValue() const {
if (Form == dwarf::DW_FORM_implicit_const)
return DWARFFormValue::createFromSValue(Form, getImplicitConstValue());
return DWARFFormValue(Form);
}
dwarf::Attribute Attr;
dwarf::Form Form;
private:
/// The following field is used for ByteSize for non-implicit_const
/// attributes and as value for implicit_const ones, indicated by
/// Form == DW_FORM_implicit_const.
/// The following cases are distinguished:
/// * Form != DW_FORM_implicit_const and HasByteSize is true:
/// ByteSize contains the fixed size in bytes for the Form in this
/// object.
/// * Form != DW_FORM_implicit_const and HasByteSize is false:
/// byte size of Form either varies according to the DWARFUnit
/// that it is contained in or the value size varies and must be
/// decoded from the debug information in order to determine its size.
/// * Form == DW_FORM_implicit_const:
/// Value contains value for the implicit_const attribute.
struct ByteSizeStorage {
bool HasByteSize;
uint8_t ByteSize;
};
union {
ByteSizeStorage ByteSize;
int64_t Value;
};
public:
bool isImplicitConst() const {
return Form == dwarf::DW_FORM_implicit_const;
}
int64_t getImplicitConstValue() const {
assert(isImplicitConst());
return Value;
}
/// Get the fixed byte size of this Form if possible. This function might
/// use the DWARFUnit to calculate the size of the Form, like for
/// DW_AT_address and DW_AT_ref_addr, so this isn't just an accessor for
/// the ByteSize member.
std::optional<int64_t> getByteSize(const DWARFUnit &U) const;
};
using AttributeSpecVector = SmallVector<AttributeSpec, 8>;
DWARFAbbreviationDeclaration();
uint32_t getCode() const { return Code; }
uint8_t getCodeByteSize() const { return CodeByteSize; }
dwarf::Tag getTag() const { return Tag; }
bool hasChildren() const { return HasChildren; }
using attr_iterator_range =
iterator_range<AttributeSpecVector::const_iterator>;
attr_iterator_range attributes() const {
return attr_iterator_range(AttributeSpecs.begin(), AttributeSpecs.end());
}
dwarf::Form getFormByIndex(uint32_t idx) const {
assert(idx < AttributeSpecs.size());
return AttributeSpecs[idx].Form;
}
size_t getNumAttributes() const {
return AttributeSpecs.size();
}
dwarf::Attribute getAttrByIndex(uint32_t idx) const {
assert(idx < AttributeSpecs.size());
return AttributeSpecs[idx].Attr;
}
bool getAttrIsImplicitConstByIndex(uint32_t idx) const {
assert(idx < AttributeSpecs.size());
return AttributeSpecs[idx].isImplicitConst();
}
int64_t getAttrImplicitConstValueByIndex(uint32_t idx) const {
assert(idx < AttributeSpecs.size());
return AttributeSpecs[idx].getImplicitConstValue();
}
/// Get the index of the specified attribute.
///
/// Searches the this abbreviation declaration for the index of the specified
/// attribute.
///
/// \param attr DWARF attribute to search for.
/// \returns Optional index of the attribute if found, std::nullopt otherwise.
std::optional<uint32_t> findAttributeIndex(dwarf::Attribute attr) const;
/// Extract a DWARF form value from a DIE specified by DIE offset.
///
/// Extract an attribute value for a DWARFUnit given the DIE offset and the
/// attribute.
///
/// \param DIEOffset the DIE offset that points to the ULEB128 abbreviation
/// code in the .debug_info data.
/// \param Attr DWARF attribute to search for.
/// \param U the DWARFUnit the contains the DIE.
/// \returns Optional DWARF form value if the attribute was extracted.
std::optional<DWARFFormValue> getAttributeValue(const uint64_t DIEOffset,
const dwarf::Attribute Attr,
const DWARFUnit &U) const;
/// Compute an offset from a DIE specified by DIE offset and attribute index.
///
/// \param AttrIndex an index of DWARF attribute.
/// \param DIEOffset the DIE offset that points to the ULEB128 abbreviation
/// code in the .debug_info data.
/// \param U the DWARFUnit the contains the DIE.
/// \returns an offset of the attribute.
uint64_t getAttributeOffsetFromIndex(uint32_t AttrIndex, uint64_t DIEOffset,
const DWARFUnit &U) const;
/// Extract a DWARF form value from a DIE speccified by attribute index and
/// its offset.
///
/// \param AttrIndex an index of DWARF attribute.
/// \param Offset offset of the attribute.
/// \param U the DWARFUnit the contains the DIE.
/// \returns Optional DWARF form value if the attribute was extracted.
std::optional<DWARFFormValue>
getAttributeValueFromOffset(uint32_t AttrIndex, uint64_t Offset,
const DWARFUnit &U) const;
llvm::Expected<ExtractState> extract(DataExtractor Data, uint64_t *OffsetPtr);
void dump(raw_ostream &OS) const;
// Return an optional byte size of all attribute data in this abbreviation
// if a constant byte size can be calculated given a DWARFUnit. This allows
// DWARF parsing to be faster as many DWARF DIEs have a fixed byte size.
std::optional<size_t> getFixedAttributesByteSize(const DWARFUnit &U) const;
private:
void clear();
/// A helper structure that can quickly determine the size in bytes of an
/// abbreviation declaration.
struct FixedSizeInfo {
/// The fixed byte size for fixed size forms.
uint16_t NumBytes = 0;
/// Number of DW_FORM_address forms in this abbrevation declaration.
uint8_t NumAddrs = 0;
/// Number of DW_FORM_ref_addr forms in this abbrevation declaration.
uint8_t NumRefAddrs = 0;
/// Number of 4 byte in DWARF32 and 8 byte in DWARF64 forms.
uint8_t NumDwarfOffsets = 0;
FixedSizeInfo() = default;
/// Calculate the fixed size in bytes given a DWARFUnit.
///
/// \param U the DWARFUnit to use when determing the byte size.
/// \returns the size in bytes for all attribute data in this abbreviation.
/// The returned size does not include bytes for the ULEB128 abbreviation
/// code
size_t getByteSize(const DWARFUnit &U) const;
};
uint32_t Code;
dwarf::Tag Tag;
uint8_t CodeByteSize;
bool HasChildren;
AttributeSpecVector AttributeSpecs;
/// If this abbreviation has a fixed byte size then FixedAttributeSize member
/// variable below will have a value.
std::optional<FixedSizeInfo> FixedAttributeSize;
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFABBREVIATIONDECLARATION_H
PK hwFZo��g �g ' DebugInfo/DWARF/DWARFAcceleratorTable.hnu �[��� //===- DWARFAcceleratorTable.h ----------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFACCELERATORTABLE_H
#define LLVM_DEBUGINFO_DWARF_DWARFACCELERATORTABLE_H
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/DebugInfo/DWARF/DWARFDataExtractor.h"
#include "llvm/DebugInfo/DWARF/DWARFFormValue.h"
#include <cstdint>
#include <utility>
namespace llvm {
class raw_ostream;
class ScopedPrinter;
/// The accelerator tables are designed to allow efficient random access
/// (using a symbol name as a key) into debug info by providing an index of the
/// debug info DIEs. This class implements the common functionality of Apple and
/// DWARF 5 accelerator tables.
/// TODO: Generalize the rest of the AppleAcceleratorTable interface and move it
/// to this class.
class DWARFAcceleratorTable {
protected:
DWARFDataExtractor AccelSection;
DataExtractor StringSection;
public:
/// An abstract class representing a single entry in the accelerator tables.
class Entry {
protected:
SmallVector<DWARFFormValue, 3> Values;
Entry() = default;
// Make these protected so only (final) subclasses can be copied around.
Entry(const Entry &) = default;
Entry(Entry &&) = default;
Entry &operator=(const Entry &) = default;
Entry &operator=(Entry &&) = default;
~Entry() = default;
public:
/// Returns the Offset of the Compilation Unit associated with this
/// Accelerator Entry or std::nullopt if the Compilation Unit offset is not
/// recorded in this Accelerator Entry.
virtual std::optional<uint64_t> getCUOffset() const = 0;
/// Returns the Tag of the Debug Info Entry associated with this
/// Accelerator Entry or std::nullopt if the Tag is not recorded in this
/// Accelerator Entry.
virtual std::optional<dwarf::Tag> getTag() const = 0;
/// Returns the raw values of fields in the Accelerator Entry. In general,
/// these can only be interpreted with the help of the metadata in the
/// owning Accelerator Table.
ArrayRef<DWARFFormValue> getValues() const { return Values; }
};
DWARFAcceleratorTable(const DWARFDataExtractor &AccelSection,
DataExtractor StringSection)
: AccelSection(AccelSection), StringSection(StringSection) {}
virtual ~DWARFAcceleratorTable();
virtual Error extract() = 0;
virtual void dump(raw_ostream &OS) const = 0;
DWARFAcceleratorTable(const DWARFAcceleratorTable &) = delete;
void operator=(const DWARFAcceleratorTable &) = delete;
};
/// This implements the Apple accelerator table format, a precursor of the
/// DWARF 5 accelerator table format.
class AppleAcceleratorTable : public DWARFAcceleratorTable {
struct Header {
uint32_t Magic;
uint16_t Version;
uint16_t HashFunction;
uint32_t BucketCount;
uint32_t HashCount;
uint32_t HeaderDataLength;
void dump(ScopedPrinter &W) const;
};
struct HeaderData {
using AtomType = uint16_t;
using Form = dwarf::Form;
uint64_t DIEOffsetBase;
SmallVector<std::pair<AtomType, Form>, 3> Atoms;
std::optional<uint64_t>
extractOffset(std::optional<DWARFFormValue> Value) const;
};
Header Hdr;
HeaderData HdrData;
dwarf::FormParams FormParams;
uint32_t HashDataEntryLength;
bool IsValid = false;
/// Returns true if we should continue scanning for entries or false if we've
/// reached the last (sentinel) entry of encountered a parsing error.
bool dumpName(ScopedPrinter &W, SmallVectorImpl<DWARFFormValue> &AtomForms,
uint64_t *DataOffset) const;
/// Reads an uint32_t from the accelerator table at Offset, which is
/// incremented by the number of bytes read.
std::optional<uint32_t> readU32FromAccel(uint64_t &Offset,
bool UseRelocation = false) const;
/// Reads a StringRef from the string table at Offset.
std::optional<StringRef>
readStringFromStrSection(uint64_t StringSectionOffset) const;
/// Return the offset into the section where the Buckets begin.
uint64_t getBucketBase() const { return sizeof(Hdr) + Hdr.HeaderDataLength; }
/// Return the offset into the section where the I-th bucket is.
uint64_t getIthBucketBase(uint32_t I) const {
return getBucketBase() + I * 4;
}
/// Return the offset into the section where the hash list begins.
uint64_t getHashBase() const { return getBucketBase() + getNumBuckets() * 4; }
/// Return the offset into the section where the I-th hash is.
uint64_t getIthHashBase(uint32_t I) const { return getHashBase() + I * 4; }
/// Return the offset into the section where the offset list begins.
uint64_t getOffsetBase() const { return getHashBase() + getNumHashes() * 4; }
/// Return the offset into the section where the table entries begin.
uint64_t getEntriesBase() const {
return getOffsetBase() + getNumHashes() * 4;
}
/// Return the offset into the section where the I-th offset is.
uint64_t getIthOffsetBase(uint32_t I) const {
return getOffsetBase() + I * 4;
}
/// Returns the index of the bucket where a hypothetical Hash would be.
uint32_t hashToBucketIdx(uint32_t Hash) const {
return Hash % getNumBuckets();
}
/// Returns true iff a hypothetical Hash would be assigned to the BucketIdx-th
/// bucket.
bool wouldHashBeInBucket(uint32_t Hash, uint32_t BucketIdx) const {
return hashToBucketIdx(Hash) == BucketIdx;
}
/// Reads the contents of the I-th bucket, that is, the index in the hash list
/// where the hashes corresponding to this bucket begin.
std::optional<uint32_t> readIthBucket(uint32_t I) const {
uint64_t Offset = getIthBucketBase(I);
return readU32FromAccel(Offset);
}
/// Reads the I-th hash in the hash list.
std::optional<uint32_t> readIthHash(uint32_t I) const {
uint64_t Offset = getIthHashBase(I);
return readU32FromAccel(Offset);
}
/// Reads the I-th offset in the offset list.
std::optional<uint32_t> readIthOffset(uint32_t I) const {
uint64_t Offset = getIthOffsetBase(I);
return readU32FromAccel(Offset);
}
/// Reads a string offset from the accelerator table at Offset, which is
/// incremented by the number of bytes read.
std::optional<uint32_t> readStringOffsetAt(uint64_t &Offset) const {
return readU32FromAccel(Offset, /*UseRelocation*/ true);
}
/// Scans through all Hashes in the BucketIdx-th bucket, attempting to find
/// HashToFind. If it is found, its index in the list of hashes is returned.
std::optional<uint32_t> idxOfHashInBucket(uint32_t HashToFind,
uint32_t BucketIdx) const;
public:
/// Apple-specific implementation of an Accelerator Entry.
class Entry final : public DWARFAcceleratorTable::Entry {
const AppleAcceleratorTable &Table;
Entry(const AppleAcceleratorTable &Table);
void extract(uint64_t *Offset);
public:
std::optional<uint64_t> getCUOffset() const override;
/// Returns the Section Offset of the Debug Info Entry associated with this
/// Accelerator Entry or std::nullopt if the DIE offset is not recorded in
/// this Accelerator Entry. The returned offset is relative to the start of
/// the Section containing the DIE.
std::optional<uint64_t> getDIESectionOffset() const;
std::optional<dwarf::Tag> getTag() const override;
/// Returns the value of the Atom in this Accelerator Entry, if the Entry
/// contains such Atom.
std::optional<DWARFFormValue> lookup(HeaderData::AtomType Atom) const;
friend class AppleAcceleratorTable;
friend class ValueIterator;
};
/// An iterator for Entries all having the same string as key.
class SameNameIterator
: public iterator_facade_base<SameNameIterator, std::forward_iterator_tag,
Entry> {
Entry Current;
uint64_t Offset = 0;
public:
/// Construct a new iterator for the entries at \p DataOffset.
SameNameIterator(const AppleAcceleratorTable &AccelTable,
uint64_t DataOffset);
const Entry &operator*() {
uint64_t OffsetCopy = Offset;
Current.extract(&OffsetCopy);
return Current;
}
SameNameIterator &operator++() {
Offset += Current.Table.getHashDataEntryLength();
return *this;
}
friend bool operator==(const SameNameIterator &A,
const SameNameIterator &B) {
return A.Offset == B.Offset;
}
};
struct EntryWithName {
EntryWithName(const AppleAcceleratorTable &Table)
: BaseEntry(Table), StrOffset(0) {}
std::optional<StringRef> readName() const {
return BaseEntry.Table.readStringFromStrSection(StrOffset);
}
Entry BaseEntry;
uint32_t StrOffset;
};
/// An iterator for all entries in the table.
class Iterator
: public iterator_facade_base<Iterator, std::forward_iterator_tag,
EntryWithName> {
constexpr static auto EndMarker = std::numeric_limits<uint64_t>::max();
EntryWithName Current;
uint64_t Offset = EndMarker;
uint32_t NumEntriesToCome = 0;
void setToEnd() { Offset = EndMarker; }
bool isEnd() const { return Offset == EndMarker; }
const AppleAcceleratorTable &getTable() const {
return Current.BaseEntry.Table;
}
/// Reads the next Entry in the table, populating `Current`.
/// If not possible (e.g. end of the section), becomes the end iterator.
void prepareNextEntryOrEnd();
/// Reads the next string pointer and the entry count for that string,
/// populating `NumEntriesToCome`.
/// If not possible (e.g. end of the section), becomes the end iterator.
/// Assumes `Offset` points to a string reference.
void prepareNextStringOrEnd();
public:
Iterator(const AppleAcceleratorTable &Table, bool SetEnd = false);
Iterator &operator++() {
prepareNextEntryOrEnd();
return *this;
}
bool operator==(const Iterator &It) const { return Offset == It.Offset; }
const EntryWithName &operator*() const {
assert(!isEnd() && "dereferencing end iterator");
return Current;
}
};
AppleAcceleratorTable(const DWARFDataExtractor &AccelSection,
DataExtractor StringSection)
: DWARFAcceleratorTable(AccelSection, StringSection) {}
Error extract() override;
uint32_t getNumBuckets() const;
uint32_t getNumHashes() const;
uint32_t getSizeHdr() const;
uint32_t getHeaderDataLength() const;
/// Returns the size of one HashData entry.
uint32_t getHashDataEntryLength() const { return HashDataEntryLength; }
/// Return the Atom description, which can be used to interpret the raw values
/// of the Accelerator Entries in this table.
ArrayRef<std::pair<HeaderData::AtomType, HeaderData::Form>> getAtomsDesc();
/// Returns true iff `AtomTy` is one of the atoms available in Entries of this
/// table.
bool containsAtomType(HeaderData::AtomType AtomTy) const {
return is_contained(make_first_range(HdrData.Atoms), AtomTy);
}
bool validateForms();
/// Return information related to the DWARF DIE we're looking for when
/// performing a lookup by name.
///
/// \param HashDataOffset an offset into the hash data table
/// \returns <DieOffset, DieTag>
/// DieOffset is the offset into the .debug_info section for the DIE
/// related to the input hash data offset.
/// DieTag is the tag of the DIE
std::pair<uint64_t, dwarf::Tag> readAtoms(uint64_t *HashDataOffset);
void dump(raw_ostream &OS) const override;
/// Look up all entries in the accelerator table matching \c Key.
iterator_range<SameNameIterator> equal_range(StringRef Key) const;
/// Lookup all entries in the accelerator table.
auto entries() const {
return make_range(Iterator(*this), Iterator(*this, /*SetEnd*/ true));
}
};
/// .debug_names section consists of one or more units. Each unit starts with a
/// header, which is followed by a list of compilation units, local and foreign
/// type units.
///
/// These may be followed by an (optional) hash lookup table, which consists of
/// an array of buckets and hashes similar to the apple tables above. The only
/// difference is that the hashes array is 1-based, and consequently an empty
/// bucket is denoted by 0 and not UINT32_MAX.
///
/// Next is the name table, which consists of an array of names and array of
/// entry offsets. This is different from the apple tables, which store names
/// next to the actual entries.
///
/// The structure of the entries is described by an abbreviations table, which
/// comes after the name table. Unlike the apple tables, which have a uniform
/// entry structure described in the header, each .debug_names entry may have
/// different index attributes (DW_IDX_???) attached to it.
///
/// The last segment consists of a list of entries, which is a 0-terminated list
/// referenced by the name table and interpreted with the help of the
/// abbreviation table.
class DWARFDebugNames : public DWARFAcceleratorTable {
public:
class NameIndex;
class NameIterator;
class ValueIterator;
/// DWARF v5 Name Index header.
struct Header {
uint64_t UnitLength;
dwarf::DwarfFormat Format;
uint16_t Version;
uint32_t CompUnitCount;
uint32_t LocalTypeUnitCount;
uint32_t ForeignTypeUnitCount;
uint32_t BucketCount;
uint32_t NameCount;
uint32_t AbbrevTableSize;
uint32_t AugmentationStringSize;
SmallString<8> AugmentationString;
Error extract(const DWARFDataExtractor &AS, uint64_t *Offset);
void dump(ScopedPrinter &W) const;
};
/// Index attribute and its encoding.
struct AttributeEncoding {
dwarf::Index Index;
dwarf::Form Form;
constexpr AttributeEncoding(dwarf::Index Index, dwarf::Form Form)
: Index(Index), Form(Form) {}
friend bool operator==(const AttributeEncoding &LHS,
const AttributeEncoding &RHS) {
return LHS.Index == RHS.Index && LHS.Form == RHS.Form;
}
};
/// Abbreviation describing the encoding of Name Index entries.
struct Abbrev {
uint32_t Code; ///< Abbreviation code
dwarf::Tag Tag; ///< Dwarf Tag of the described entity.
std::vector<AttributeEncoding> Attributes; ///< List of index attributes.
Abbrev(uint32_t Code, dwarf::Tag Tag,
std::vector<AttributeEncoding> Attributes)
: Code(Code), Tag(Tag), Attributes(std::move(Attributes)) {}
void dump(ScopedPrinter &W) const;
};
/// DWARF v5-specific implementation of an Accelerator Entry.
class Entry final : public DWARFAcceleratorTable::Entry {
const NameIndex *NameIdx;
const Abbrev *Abbr;
Entry(const NameIndex &NameIdx, const Abbrev &Abbr);
public:
std::optional<uint64_t> getCUOffset() const override;
std::optional<dwarf::Tag> getTag() const override { return tag(); }
/// Returns the Index into the Compilation Unit list of the owning Name
/// Index or std::nullopt if this Accelerator Entry does not have an
/// associated Compilation Unit. It is up to the user to verify that the
/// returned Index is valid in the owning NameIndex (or use getCUOffset(),
/// which will handle that check itself). Note that entries in NameIndexes
/// which index just a single Compilation Unit are implicitly associated
/// with that unit, so this function will return 0 even without an explicit
/// DW_IDX_compile_unit attribute.
std::optional<uint64_t> getCUIndex() const;
/// .debug_names-specific getter, which always succeeds (DWARF v5 index
/// entries always have a tag).
dwarf::Tag tag() const { return Abbr->Tag; }
/// Returns the Offset of the DIE within the containing CU or TU.
std::optional<uint64_t> getDIEUnitOffset() const;
/// Return the Abbreviation that can be used to interpret the raw values of
/// this Accelerator Entry.
const Abbrev &getAbbrev() const { return *Abbr; }
/// Returns the value of the Index Attribute in this Accelerator Entry, if
/// the Entry contains such Attribute.
std::optional<DWARFFormValue> lookup(dwarf::Index Index) const;
void dump(ScopedPrinter &W) const;
friend class NameIndex;
friend class ValueIterator;
};
/// Error returned by NameIndex::getEntry to report it has reached the end of
/// the entry list.
class SentinelError : public ErrorInfo<SentinelError> {
public:
static char ID;
void log(raw_ostream &OS) const override { OS << "Sentinel"; }
std::error_code convertToErrorCode() const override;
};
private:
/// DenseMapInfo for struct Abbrev.
struct AbbrevMapInfo {
static Abbrev getEmptyKey();
static Abbrev getTombstoneKey();
static unsigned getHashValue(uint32_t Code) {
return DenseMapInfo<uint32_t>::getHashValue(Code);
}
static unsigned getHashValue(const Abbrev &Abbr) {
return getHashValue(Abbr.Code);
}
static bool isEqual(uint32_t LHS, const Abbrev &RHS) {
return LHS == RHS.Code;
}
static bool isEqual(const Abbrev &LHS, const Abbrev &RHS) {
return LHS.Code == RHS.Code;
}
};
public:
/// A single entry in the Name Table (DWARF v5 sect. 6.1.1.4.6) of the Name
/// Index.
class NameTableEntry {
DataExtractor StrData;
uint32_t Index;
uint64_t StringOffset;
uint64_t EntryOffset;
public:
NameTableEntry(const DataExtractor &StrData, uint32_t Index,
uint64_t StringOffset, uint64_t EntryOffset)
: StrData(StrData), Index(Index), StringOffset(StringOffset),
EntryOffset(EntryOffset) {}
/// Return the index of this name in the parent Name Index.
uint32_t getIndex() const { return Index; }
/// Returns the offset of the name of the described entities.
uint64_t getStringOffset() const { return StringOffset; }
/// Return the string referenced by this name table entry or nullptr if the
/// string offset is not valid.
const char *getString() const {
uint64_t Off = StringOffset;
return StrData.getCStr(&Off);
}
/// Returns the offset of the first Entry in the list.
uint64_t getEntryOffset() const { return EntryOffset; }
};
/// Represents a single accelerator table within the DWARF v5 .debug_names
/// section.
class NameIndex {
DenseSet<Abbrev, AbbrevMapInfo> Abbrevs;
struct Header Hdr;
const DWARFDebugNames &Section;
// Base of the whole unit and of various important tables, as offsets from
// the start of the section.
uint64_t Base;
uint64_t CUsBase;
uint64_t BucketsBase;
uint64_t HashesBase;
uint64_t StringOffsetsBase;
uint64_t EntryOffsetsBase;
uint64_t EntriesBase;
void dumpCUs(ScopedPrinter &W) const;
void dumpLocalTUs(ScopedPrinter &W) const;
void dumpForeignTUs(ScopedPrinter &W) const;
void dumpAbbreviations(ScopedPrinter &W) const;
bool dumpEntry(ScopedPrinter &W, uint64_t *Offset) const;
void dumpName(ScopedPrinter &W, const NameTableEntry &NTE,
std::optional<uint32_t> Hash) const;
void dumpBucket(ScopedPrinter &W, uint32_t Bucket) const;
Expected<AttributeEncoding> extractAttributeEncoding(uint64_t *Offset);
Expected<std::vector<AttributeEncoding>>
extractAttributeEncodings(uint64_t *Offset);
Expected<Abbrev> extractAbbrev(uint64_t *Offset);
public:
NameIndex(const DWARFDebugNames &Section, uint64_t Base)
: Section(Section), Base(Base) {}
/// Reads offset of compilation unit CU. CU is 0-based.
uint64_t getCUOffset(uint32_t CU) const;
uint32_t getCUCount() const { return Hdr.CompUnitCount; }
/// Reads offset of local type unit TU, TU is 0-based.
uint64_t getLocalTUOffset(uint32_t TU) const;
uint32_t getLocalTUCount() const { return Hdr.LocalTypeUnitCount; }
/// Reads signature of foreign type unit TU. TU is 0-based.
uint64_t getForeignTUSignature(uint32_t TU) const;
uint32_t getForeignTUCount() const { return Hdr.ForeignTypeUnitCount; }
/// Reads an entry in the Bucket Array for the given Bucket. The returned
/// value is a (1-based) index into the Names, StringOffsets and
/// EntryOffsets arrays. The input Bucket index is 0-based.
uint32_t getBucketArrayEntry(uint32_t Bucket) const;
uint32_t getBucketCount() const { return Hdr.BucketCount; }
/// Reads an entry in the Hash Array for the given Index. The input Index
/// is 1-based.
uint32_t getHashArrayEntry(uint32_t Index) const;
/// Reads an entry in the Name Table for the given Index. The Name Table
/// consists of two arrays -- String Offsets and Entry Offsets. The returned
/// offsets are relative to the starts of respective sections. Input Index
/// is 1-based.
NameTableEntry getNameTableEntry(uint32_t Index) const;
uint32_t getNameCount() const { return Hdr.NameCount; }
const DenseSet<Abbrev, AbbrevMapInfo> &getAbbrevs() const {
return Abbrevs;
}
Expected<Entry> getEntry(uint64_t *Offset) const;
/// Look up all entries in this Name Index matching \c Key.
iterator_range<ValueIterator> equal_range(StringRef Key) const;
NameIterator begin() const { return NameIterator(this, 1); }
NameIterator end() const { return NameIterator(this, getNameCount() + 1); }
Error extract();
uint64_t getUnitOffset() const { return Base; }
uint64_t getNextUnitOffset() const {
return Base + dwarf::getUnitLengthFieldByteSize(Hdr.Format) +
Hdr.UnitLength;
}
void dump(ScopedPrinter &W) const;
friend class DWARFDebugNames;
};
class ValueIterator {
public:
using iterator_category = std::input_iterator_tag;
using value_type = Entry;
using difference_type = std::ptrdiff_t;
using pointer = value_type *;
using reference = value_type &;
private:
/// The Name Index we are currently iterating through. The implementation
/// relies on the fact that this can also be used as an iterator into the
/// "NameIndices" vector in the Accelerator section.
const NameIndex *CurrentIndex = nullptr;
/// Whether this is a local iterator (searches in CurrentIndex only) or not
/// (searches all name indices).
bool IsLocal;
std::optional<Entry> CurrentEntry;
uint64_t DataOffset = 0; ///< Offset into the section.
std::string Key; ///< The Key we are searching for.
std::optional<uint32_t> Hash; ///< Hash of Key, if it has been computed.
bool getEntryAtCurrentOffset();
std::optional<uint64_t> findEntryOffsetInCurrentIndex();
bool findInCurrentIndex();
void searchFromStartOfCurrentIndex();
void next();
/// Set the iterator to the "end" state.
void setEnd() { *this = ValueIterator(); }
public:
/// Create a "begin" iterator for looping over all entries in the
/// accelerator table matching Key. The iterator will run through all Name
/// Indexes in the section in sequence.
ValueIterator(const DWARFDebugNames &AccelTable, StringRef Key);
/// Create a "begin" iterator for looping over all entries in a specific
/// Name Index. Other indices in the section will not be visited.
ValueIterator(const NameIndex &NI, StringRef Key);
/// End marker.
ValueIterator() = default;
const Entry &operator*() const { return *CurrentEntry; }
ValueIterator &operator++() {
next();
return *this;
}
ValueIterator operator++(int) {
ValueIterator I = *this;
next();
return I;
}
friend bool operator==(const ValueIterator &A, const ValueIterator &B) {
return A.CurrentIndex == B.CurrentIndex && A.DataOffset == B.DataOffset;
}
friend bool operator!=(const ValueIterator &A, const ValueIterator &B) {
return !(A == B);
}
};
class NameIterator {
/// The Name Index we are iterating through.
const NameIndex *CurrentIndex;
/// The current name in the Name Index.
uint32_t CurrentName;
void next() {
assert(CurrentName <= CurrentIndex->getNameCount());
++CurrentName;
}
public:
using iterator_category = std::input_iterator_tag;
using value_type = NameTableEntry;
using difference_type = uint32_t;
using pointer = NameTableEntry *;
using reference = NameTableEntry; // We return entries by value.
/// Creates an iterator whose initial position is name CurrentName in
/// CurrentIndex.
NameIterator(const NameIndex *CurrentIndex, uint32_t CurrentName)
: CurrentIndex(CurrentIndex), CurrentName(CurrentName) {}
NameTableEntry operator*() const {
return CurrentIndex->getNameTableEntry(CurrentName);
}
NameIterator &operator++() {
next();
return *this;
}
NameIterator operator++(int) {
NameIterator I = *this;
next();
return I;
}
friend bool operator==(const NameIterator &A, const NameIterator &B) {
return A.CurrentIndex == B.CurrentIndex && A.CurrentName == B.CurrentName;
}
friend bool operator!=(const NameIterator &A, const NameIterator &B) {
return !(A == B);
}
};
private:
SmallVector<NameIndex, 0> NameIndices;
DenseMap<uint64_t, const NameIndex *> CUToNameIndex;
public:
DWARFDebugNames(const DWARFDataExtractor &AccelSection,
DataExtractor StringSection)
: DWARFAcceleratorTable(AccelSection, StringSection) {}
Error extract() override;
void dump(raw_ostream &OS) const override;
/// Look up all entries in the accelerator table matching \c Key.
iterator_range<ValueIterator> equal_range(StringRef Key) const;
using const_iterator = SmallVector<NameIndex, 0>::const_iterator;
const_iterator begin() const { return NameIndices.begin(); }
const_iterator end() const { return NameIndices.end(); }
/// Return the Name Index covering the compile unit at CUOffset, or nullptr if
/// there is no Name Index covering that unit.
const NameIndex *getCUNameIndex(uint64_t CUOffset);
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFACCELERATORTABLE_H
PK hwFZ�J� � � $ DebugInfo/DWARF/DWARFDataExtractor.hnu �[��� //===- DWARFDataExtractor.h -------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFDATAEXTRACTOR_H
#define LLVM_DEBUGINFO_DWARF_DWARFDATAEXTRACTOR_H
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/DebugInfo/DWARF/DWARFSection.h"
#include "llvm/Support/DataExtractor.h"
namespace llvm {
class DWARFObject;
/// A DataExtractor (typically for an in-memory copy of an object-file section)
/// plus a relocation map for that section, if there is one.
class DWARFDataExtractor : public DataExtractor {
const DWARFObject *Obj = nullptr;
const DWARFSection *Section = nullptr;
public:
/// Constructor for the normal case of extracting data from a DWARF section.
/// The DWARFSection's lifetime must be at least as long as the extractor's.
DWARFDataExtractor(const DWARFObject &Obj, const DWARFSection &Section,
bool IsLittleEndian, uint8_t AddressSize)
: DataExtractor(Section.Data, IsLittleEndian, AddressSize), Obj(&Obj),
Section(&Section) {}
/// Constructor for cases when there are no relocations.
DWARFDataExtractor(StringRef Data, bool IsLittleEndian, uint8_t AddressSize)
: DataExtractor(Data, IsLittleEndian, AddressSize) {}
DWARFDataExtractor(ArrayRef<uint8_t> Data, bool IsLittleEndian,
uint8_t AddressSize)
: DataExtractor(
StringRef(reinterpret_cast<const char *>(Data.data()), Data.size()),
IsLittleEndian, AddressSize) {}
/// Truncating constructor
DWARFDataExtractor(const DWARFDataExtractor &Other, size_t Length)
: DataExtractor(Other.getData().substr(0, Length), Other.isLittleEndian(),
Other.getAddressSize()),
Obj(Other.Obj), Section(Other.Section) {}
/// Extracts the DWARF "initial length" field, which can either be a 32-bit
/// value smaller than 0xfffffff0, or the value 0xffffffff followed by a
/// 64-bit length. Returns the actual length, and the DWARF format which is
/// encoded in the field. In case of errors, it returns {0, DWARF32} and
/// leaves the offset unchanged.
std::pair<uint64_t, dwarf::DwarfFormat>
getInitialLength(uint64_t *Off, Error *Err = nullptr) const;
std::pair<uint64_t, dwarf::DwarfFormat> getInitialLength(Cursor &C) const {
return getInitialLength(&getOffset(C), &getError(C));
}
/// Extracts a value and applies a relocation to the result if
/// one exists for the given offset.
uint64_t getRelocatedValue(uint32_t Size, uint64_t *Off,
uint64_t *SectionIndex = nullptr,
Error *Err = nullptr) const;
uint64_t getRelocatedValue(Cursor &C, uint32_t Size,
uint64_t *SectionIndex = nullptr) const {
return getRelocatedValue(Size, &getOffset(C), SectionIndex, &getError(C));
}
/// Extracts an address-sized value and applies a relocation to the result if
/// one exists for the given offset.
uint64_t getRelocatedAddress(uint64_t *Off, uint64_t *SecIx = nullptr) const {
return getRelocatedValue(getAddressSize(), Off, SecIx);
}
uint64_t getRelocatedAddress(Cursor &C, uint64_t *SecIx = nullptr) const {
return getRelocatedValue(getAddressSize(), &getOffset(C), SecIx,
&getError(C));
}
/// Extracts a DWARF-encoded pointer in \p Offset using \p Encoding.
/// There is a DWARF encoding that uses a PC-relative adjustment.
/// For these values, \p AbsPosOffset is used to fix them, which should
/// reflect the absolute address of this pointer.
std::optional<uint64_t> getEncodedPointer(uint64_t *Offset, uint8_t Encoding,
uint64_t AbsPosOffset = 0) const;
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFDATAEXTRACTOR_H
PK hwFZ>�1I� � ! DebugInfo/DWARF/DWARFExpression.hnu �[��� //===--- DWARFExpression.h - DWARF Expression handling ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFEXPRESSION_H
#define LLVM_DEBUGINFO_DWARF_DWARFEXPRESSION_H
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/Support/DataExtractor.h"
namespace llvm {
class DWARFUnit;
struct DIDumpOptions;
class MCRegisterInfo;
class raw_ostream;
class DWARFExpression {
public:
class iterator;
/// This class represents an Operation in the Expression.
///
/// An Operation can be in Error state (check with isError()). This
/// means that it couldn't be decoded successfully and if it is the
/// case, all others fields contain undefined values.
class Operation {
public:
/// Size and signedness of expression operations' operands.
enum Encoding : uint8_t {
Size1 = 0,
Size2 = 1,
Size4 = 2,
Size8 = 3,
SizeLEB = 4,
SizeAddr = 5,
SizeRefAddr = 6,
SizeBlock = 7, ///< Preceding operand contains block size
BaseTypeRef = 8,
/// The operand is a ULEB128 encoded SubOpcode. This is only valid
/// for the first operand of an operation.
SizeSubOpLEB = 9,
WasmLocationArg = 30,
SignBit = 0x80,
SignedSize1 = SignBit | Size1,
SignedSize2 = SignBit | Size2,
SignedSize4 = SignBit | Size4,
SignedSize8 = SignBit | Size8,
SignedSizeLEB = SignBit | SizeLEB,
};
enum DwarfVersion : uint8_t {
DwarfNA, ///< Serves as a marker for unused entries
Dwarf2 = 2,
Dwarf3,
Dwarf4,
Dwarf5
};
/// Description of the encoding of one expression Op.
struct Description {
DwarfVersion Version; ///< Dwarf version where the Op was introduced.
SmallVector<Encoding> Op; ///< Encoding for Op operands.
template <typename... Ts>
Description(DwarfVersion Version, Ts... Op)
: Version(Version), Op{Op...} {}
Description() : Description(DwarfNA) {}
~Description() = default;
};
private:
friend class DWARFExpression::iterator;
uint8_t Opcode; ///< The Op Opcode, DW_OP_<something>.
Description Desc;
bool Error = false;
uint64_t EndOffset;
SmallVector<uint64_t> Operands;
SmallVector<uint64_t> OperandEndOffsets;
public:
const Description &getDescription() const { return Desc; }
uint8_t getCode() const { return Opcode; }
std::optional<unsigned> getSubCode() const;
uint64_t getNumOperands() const { return Operands.size(); }
ArrayRef<uint64_t> getRawOperands() const { return Operands; };
uint64_t getRawOperand(unsigned Idx) const { return Operands[Idx]; }
ArrayRef<uint64_t> getOperandEndOffsets() const {
return OperandEndOffsets;
}
uint64_t getOperandEndOffset(unsigned Idx) const {
return OperandEndOffsets[Idx];
}
uint64_t getEndOffset() const { return EndOffset; }
bool isError() const { return Error; }
bool print(raw_ostream &OS, DIDumpOptions DumpOpts,
const DWARFExpression *Expr, DWARFUnit *U) const;
/// Verify \p Op. Does not affect the return of \a isError().
static bool verify(const Operation &Op, DWARFUnit *U);
private:
bool extract(DataExtractor Data, uint8_t AddressSize, uint64_t Offset,
std::optional<dwarf::DwarfFormat> Format);
};
/// An iterator to go through the expression operations.
class iterator
: public iterator_facade_base<iterator, std::forward_iterator_tag,
const Operation> {
friend class DWARFExpression;
const DWARFExpression *Expr;
uint64_t Offset;
Operation Op;
iterator(const DWARFExpression *Expr, uint64_t Offset)
: Expr(Expr), Offset(Offset) {
Op.Error =
Offset >= Expr->Data.getData().size() ||
!Op.extract(Expr->Data, Expr->AddressSize, Offset, Expr->Format);
}
public:
iterator &operator++() {
Offset = Op.isError() ? Expr->Data.getData().size() : Op.EndOffset;
Op.Error =
Offset >= Expr->Data.getData().size() ||
!Op.extract(Expr->Data, Expr->AddressSize, Offset, Expr->Format);
return *this;
}
const Operation &operator*() const { return Op; }
iterator skipBytes(uint64_t Add) const {
return iterator(Expr, Op.EndOffset + Add);
}
// Comparison operators are provided out of line.
friend bool operator==(const iterator &, const iterator &);
};
DWARFExpression(DataExtractor Data, uint8_t AddressSize,
std::optional<dwarf::DwarfFormat> Format = std::nullopt)
: Data(Data), AddressSize(AddressSize), Format(Format) {
assert(AddressSize == 8 || AddressSize == 4 || AddressSize == 2);
}
iterator begin() const { return iterator(this, 0); }
iterator end() const { return iterator(this, Data.getData().size()); }
void print(raw_ostream &OS, DIDumpOptions DumpOpts, DWARFUnit *U,
bool IsEH = false) const;
/// Print the expression in a format intended to be compact and useful to a
/// user, but not perfectly unambiguous, or capable of representing every
/// valid DWARF expression. Returns true if the expression was sucessfully
/// printed.
bool printCompact(raw_ostream &OS,
std::function<StringRef(uint64_t RegNum, bool IsEH)>
GetNameForDWARFReg = nullptr);
bool verify(DWARFUnit *U);
bool operator==(const DWARFExpression &RHS) const;
StringRef getData() const { return Data.getData(); }
static bool prettyPrintRegisterOp(DWARFUnit *U, raw_ostream &OS,
DIDumpOptions DumpOpts, uint8_t Opcode,
const ArrayRef<uint64_t> Operands);
private:
DataExtractor Data;
uint8_t AddressSize;
std::optional<dwarf::DwarfFormat> Format;
};
inline bool operator==(const DWARFExpression::iterator &LHS,
const DWARFExpression::iterator &RHS) {
return LHS.Expr == RHS.Expr && LHS.Offset == RHS.Offset;
}
}
#endif
PK hwFZ��d d DebugInfo/DWARF/DWARFUnitIndex.hnu �[��� //===- DWARFUnitIndex.h -----------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFUNITINDEX_H
#define LLVM_DEBUGINFO_DWARF_DWARFUNITINDEX_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include <cstdint>
#include <memory>
namespace llvm {
class raw_ostream;
class DataExtractor;
/// The enum of section identifiers to be used in internal interfaces.
///
/// Pre-standard implementation of package files defined a number of section
/// identifiers with values that clash definitions in the DWARFv5 standard.
/// See https://gcc.gnu.org/wiki/DebugFissionDWP and Section 7.3.5.3 in DWARFv5.
///
/// The following identifiers are the same in the proposal and in DWARFv5:
/// - DW_SECT_INFO = 1 (.debug_info.dwo)
/// - DW_SECT_ABBREV = 3 (.debug_abbrev.dwo)
/// - DW_SECT_LINE = 4 (.debug_line.dwo)
/// - DW_SECT_STR_OFFSETS = 6 (.debug_str_offsets.dwo)
///
/// The following identifiers are defined only in DWARFv5:
/// - DW_SECT_LOCLISTS = 5 (.debug_loclists.dwo)
/// - DW_SECT_RNGLISTS = 8 (.debug_rnglists.dwo)
///
/// The following identifiers are defined only in the GNU proposal:
/// - DW_SECT_TYPES = 2 (.debug_types.dwo)
/// - DW_SECT_LOC = 5 (.debug_loc.dwo)
/// - DW_SECT_MACINFO = 7 (.debug_macinfo.dwo)
///
/// DW_SECT_MACRO for the .debug_macro.dwo section is defined in both standards,
/// but with different values, 8 in GNU and 7 in DWARFv5.
///
/// This enum defines constants to represent the identifiers of both sets.
/// For DWARFv5 ones, the values are the same as defined in the standard.
/// For pre-standard ones that correspond to sections being deprecated in
/// DWARFv5, the values are chosen arbitrary and a tag "_EXT_" is added to
/// the names.
///
/// The enum is for internal use only. The user should not expect the values
/// to correspond to any input/output constants. Special conversion functions,
/// serializeSectionKind() and deserializeSectionKind(), should be used for
/// the translation.
enum DWARFSectionKind {
/// Denotes a value read from an index section that does not correspond
/// to any of the supported standards.
DW_SECT_EXT_unknown = 0,
#define HANDLE_DW_SECT(ID, NAME) DW_SECT_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
DW_SECT_EXT_TYPES = 2,
DW_SECT_EXT_LOC = 9,
DW_SECT_EXT_MACINFO = 10,
};
inline const char *toString(DWARFSectionKind Kind) {
switch (Kind) {
case DW_SECT_EXT_unknown:
return "Unknown DW_SECT value 0";
#define STRINGIZE(X) #X
#define HANDLE_DW_SECT(ID, NAME) \
case DW_SECT_##NAME: \
return "DW_SECT_" STRINGIZE(NAME);
#include "llvm/BinaryFormat/Dwarf.def"
case DW_SECT_EXT_TYPES:
return "DW_SECT_TYPES";
case DW_SECT_EXT_LOC:
return "DW_SECT_LOC";
case DW_SECT_EXT_MACINFO:
return "DW_SECT_MACINFO";
}
llvm_unreachable("unknown DWARFSectionKind");
}
/// Convert the internal value for a section kind to an on-disk value.
///
/// The conversion depends on the version of the index section.
/// IndexVersion is expected to be either 2 for pre-standard GNU proposal
/// or 5 for DWARFv5 package file.
uint32_t serializeSectionKind(DWARFSectionKind Kind, unsigned IndexVersion);
/// Convert a value read from an index section to the internal representation.
///
/// The conversion depends on the index section version, which is expected
/// to be either 2 for pre-standard GNU proposal or 5 for DWARFv5 package file.
DWARFSectionKind deserializeSectionKind(uint32_t Value, unsigned IndexVersion);
class DWARFUnitIndex {
struct Header {
uint32_t Version;
uint32_t NumColumns;
uint32_t NumUnits;
uint32_t NumBuckets = 0;
bool parse(DataExtractor IndexData, uint64_t *OffsetPtr);
void dump(raw_ostream &OS) const;
};
public:
class Entry {
public:
class SectionContribution {
private:
uint64_t Offset;
uint64_t Length;
public:
SectionContribution() : Offset(0), Length(0) {}
SectionContribution(uint64_t Offset, uint64_t Length)
: Offset(Offset), Length(Length) {}
void setOffset(uint64_t Value) { Offset = Value; }
void setLength(uint64_t Value) { Length = Value; }
uint64_t getOffset() const { return Offset; }
uint64_t getLength() const { return Length; }
uint32_t getOffset32() const { return (uint32_t)Offset; }
uint32_t getLength32() const { return (uint32_t)Length; }
};
private:
const DWARFUnitIndex *Index;
uint64_t Signature;
std::unique_ptr<SectionContribution[]> Contributions;
friend class DWARFUnitIndex;
public:
const SectionContribution *getContribution(DWARFSectionKind Sec) const;
const SectionContribution *getContribution() const;
SectionContribution &getContribution();
const SectionContribution *getContributions() const {
return Contributions.get();
}
uint64_t getSignature() const { return Signature; }
bool isValid() { return Index; }
};
private:
struct Header Header;
DWARFSectionKind InfoColumnKind;
int InfoColumn = -1;
std::unique_ptr<DWARFSectionKind[]> ColumnKinds;
// This is a parallel array of section identifiers as they read from the input
// file. The mapping from raw values to DWARFSectionKind is not revertable in
// case of unknown identifiers, so we keep them here.
std::unique_ptr<uint32_t[]> RawSectionIds;
std::unique_ptr<Entry[]> Rows;
mutable std::vector<Entry *> OffsetLookup;
static StringRef getColumnHeader(DWARFSectionKind DS);
bool parseImpl(DataExtractor IndexData);
public:
DWARFUnitIndex(DWARFSectionKind InfoColumnKind)
: InfoColumnKind(InfoColumnKind) {}
explicit operator bool() const { return Header.NumBuckets; }
bool parse(DataExtractor IndexData);
void dump(raw_ostream &OS) const;
uint32_t getVersion() const { return Header.Version; }
const Entry *getFromOffset(uint64_t Offset) const;
const Entry *getFromHash(uint64_t Offset) const;
ArrayRef<DWARFSectionKind> getColumnKinds() const {
return ArrayRef(ColumnKinds.get(), Header.NumColumns);
}
ArrayRef<Entry> getRows() const {
return ArrayRef(Rows.get(), Header.NumBuckets);
}
MutableArrayRef<Entry> getMutableRows() {
return MutableArrayRef(Rows.get(), Header.NumBuckets);
}
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFUNITINDEX_H
PK hwFZv��[ �[ DebugInfo/DWARF/DWARFUnit.hnu �[��� //===- DWARFUnit.h ----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFUNIT_H
#define LLVM_DEBUGINFO_DWARF_DWARFUNIT_H
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/DebugInfo/DWARF/DWARFAddressRange.h"
#include "llvm/DebugInfo/DWARF/DWARFDataExtractor.h"
#include "llvm/DebugInfo/DWARF/DWARFDebugInfoEntry.h"
#include "llvm/DebugInfo/DWARF/DWARFDie.h"
#include "llvm/DebugInfo/DWARF/DWARFLocationExpression.h"
#include "llvm/DebugInfo/DWARF/DWARFUnitIndex.h"
#include "llvm/Support/DataExtractor.h"
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <map>
#include <memory>
#include <set>
#include <utility>
#include <vector>
namespace llvm {
class DWARFAbbreviationDeclarationSet;
class DWARFContext;
class DWARFDebugAbbrev;
class DWARFUnit;
class DWARFDebugRangeList;
class DWARFLocationTable;
class DWARFObject;
class raw_ostream;
struct DIDumpOptions;
struct DWARFSection;
namespace dwarflinker_parallel {
class CompileUnit;
}
/// Base class describing the header of any kind of "unit." Some information
/// is specific to certain unit types. We separate this class out so we can
/// parse the header before deciding what specific kind of unit to construct.
class DWARFUnitHeader {
// Offset within section.
uint64_t Offset = 0;
// Version, address size, and DWARF format.
dwarf::FormParams FormParams;
uint64_t Length = 0;
uint64_t AbbrOffset = 0;
// For DWO units only.
const DWARFUnitIndex::Entry *IndexEntry = nullptr;
// For type units only.
uint64_t TypeHash = 0;
uint64_t TypeOffset = 0;
// For v5 split or skeleton compile units only.
std::optional<uint64_t> DWOId;
// Unit type as parsed, or derived from the section kind.
uint8_t UnitType = 0;
// Size as parsed. uint8_t for compactness.
uint8_t Size = 0;
public:
/// Parse a unit header from \p debug_info starting at \p offset_ptr.
/// Note that \p SectionKind is used as a hint to guess the unit type
/// for DWARF formats prior to DWARFv5. In DWARFv5 the unit type is
/// explicitly defined in the header and the hint is ignored.
bool extract(DWARFContext &Context, const DWARFDataExtractor &debug_info,
uint64_t *offset_ptr, DWARFSectionKind SectionKind);
// For units in DWARF Package File, remember the index entry and update
// the abbreviation offset read by extract().
bool applyIndexEntry(const DWARFUnitIndex::Entry *Entry);
uint64_t getOffset() const { return Offset; }
const dwarf::FormParams &getFormParams() const { return FormParams; }
uint16_t getVersion() const { return FormParams.Version; }
dwarf::DwarfFormat getFormat() const { return FormParams.Format; }
uint8_t getAddressByteSize() const { return FormParams.AddrSize; }
uint8_t getRefAddrByteSize() const { return FormParams.getRefAddrByteSize(); }
uint8_t getDwarfOffsetByteSize() const {
return FormParams.getDwarfOffsetByteSize();
}
uint64_t getLength() const { return Length; }
uint64_t getAbbrOffset() const { return AbbrOffset; }
std::optional<uint64_t> getDWOId() const { return DWOId; }
void setDWOId(uint64_t Id) {
assert((!DWOId || *DWOId == Id) && "setting DWOId to a different value");
DWOId = Id;
}
const DWARFUnitIndex::Entry *getIndexEntry() const { return IndexEntry; }
uint64_t getTypeHash() const { return TypeHash; }
uint64_t getTypeOffset() const { return TypeOffset; }
uint8_t getUnitType() const { return UnitType; }
bool isTypeUnit() const {
return UnitType == dwarf::DW_UT_type || UnitType == dwarf::DW_UT_split_type;
}
uint8_t getSize() const { return Size; }
uint8_t getUnitLengthFieldByteSize() const {
return dwarf::getUnitLengthFieldByteSize(FormParams.Format);
}
uint64_t getNextUnitOffset() const {
return Offset + Length + getUnitLengthFieldByteSize();
}
};
const DWARFUnitIndex &getDWARFUnitIndex(DWARFContext &Context,
DWARFSectionKind Kind);
bool isCompileUnit(const std::unique_ptr<DWARFUnit> &U);
/// Describe a collection of units. Intended to hold all units either from
/// .debug_info and .debug_types, or from .debug_info.dwo and .debug_types.dwo.
class DWARFUnitVector final : public SmallVector<std::unique_ptr<DWARFUnit>, 1> {
std::function<std::unique_ptr<DWARFUnit>(uint64_t, DWARFSectionKind,
const DWARFSection *,
const DWARFUnitIndex::Entry *)>
Parser;
int NumInfoUnits = -1;
public:
using UnitVector = SmallVectorImpl<std::unique_ptr<DWARFUnit>>;
using iterator = typename UnitVector::iterator;
using iterator_range = llvm::iterator_range<typename UnitVector::iterator>;
using compile_unit_range =
decltype(make_filter_range(std::declval<iterator_range>(), isCompileUnit));
DWARFUnit *getUnitForOffset(uint64_t Offset) const;
DWARFUnit *getUnitForIndexEntry(const DWARFUnitIndex::Entry &E);
/// Read units from a .debug_info or .debug_types section. Calls made
/// before finishedInfoUnits() are assumed to be for .debug_info sections,
/// calls after finishedInfoUnits() are for .debug_types sections. Caller
/// must not mix calls to addUnitsForSection and addUnitsForDWOSection.
void addUnitsForSection(DWARFContext &C, const DWARFSection &Section,
DWARFSectionKind SectionKind);
/// Read units from a .debug_info.dwo or .debug_types.dwo section. Calls
/// made before finishedInfoUnits() are assumed to be for .debug_info.dwo
/// sections, calls after finishedInfoUnits() are for .debug_types.dwo
/// sections. Caller must not mix calls to addUnitsForSection and
/// addUnitsForDWOSection.
void addUnitsForDWOSection(DWARFContext &C, const DWARFSection &DWOSection,
DWARFSectionKind SectionKind, bool Lazy = false);
/// Add an existing DWARFUnit to this UnitVector. This is used by the DWARF
/// verifier to process unit separately.
DWARFUnit *addUnit(std::unique_ptr<DWARFUnit> Unit);
/// Returns number of all units held by this instance.
unsigned getNumUnits() const { return size(); }
/// Returns number of units from all .debug_info[.dwo] sections.
unsigned getNumInfoUnits() const {
return NumInfoUnits == -1 ? size() : NumInfoUnits;
}
/// Returns number of units from all .debug_types[.dwo] sections.
unsigned getNumTypesUnits() const { return size() - NumInfoUnits; }
/// Indicate that parsing .debug_info[.dwo] is done, and remaining units
/// will be from .debug_types[.dwo].
void finishedInfoUnits() { NumInfoUnits = size(); }
private:
void addUnitsImpl(DWARFContext &Context, const DWARFObject &Obj,
const DWARFSection &Section, const DWARFDebugAbbrev *DA,
const DWARFSection *RS, const DWARFSection *LocSection,
StringRef SS, const DWARFSection &SOS,
const DWARFSection *AOS, const DWARFSection &LS, bool LE,
bool IsDWO, bool Lazy, DWARFSectionKind SectionKind);
};
/// Represents base address of the CU.
/// Represents a unit's contribution to the string offsets table.
struct StrOffsetsContributionDescriptor {
uint64_t Base = 0;
/// The contribution size not including the header.
uint64_t Size = 0;
/// Format and version.
dwarf::FormParams FormParams = {0, 0, dwarf::DwarfFormat::DWARF32};
StrOffsetsContributionDescriptor(uint64_t Base, uint64_t Size,
uint8_t Version, dwarf::DwarfFormat Format)
: Base(Base), Size(Size), FormParams({Version, 0, Format}) {}
StrOffsetsContributionDescriptor() = default;
uint8_t getVersion() const { return FormParams.Version; }
dwarf::DwarfFormat getFormat() const { return FormParams.Format; }
uint8_t getDwarfOffsetByteSize() const {
return FormParams.getDwarfOffsetByteSize();
}
/// Determine whether a contribution to the string offsets table is
/// consistent with the relevant section size and that its length is
/// a multiple of the size of one of its entries.
Expected<StrOffsetsContributionDescriptor>
validateContributionSize(DWARFDataExtractor &DA);
};
class DWARFUnit {
DWARFContext &Context;
/// Section containing this DWARFUnit.
const DWARFSection &InfoSection;
DWARFUnitHeader Header;
const DWARFDebugAbbrev *Abbrev;
const DWARFSection *RangeSection;
uint64_t RangeSectionBase;
uint64_t LocSectionBase;
/// Location table of this unit.
std::unique_ptr<DWARFLocationTable> LocTable;
const DWARFSection &LineSection;
StringRef StringSection;
const DWARFSection &StringOffsetSection;
const DWARFSection *AddrOffsetSection;
DWARFUnit *SU;
std::optional<uint64_t> AddrOffsetSectionBase;
bool IsLittleEndian;
bool IsDWO;
const DWARFUnitVector &UnitVector;
/// Start, length, and DWARF format of the unit's contribution to the string
/// offsets table (DWARF v5).
std::optional<StrOffsetsContributionDescriptor>
StringOffsetsTableContribution;
mutable const DWARFAbbreviationDeclarationSet *Abbrevs;
std::optional<object::SectionedAddress> BaseAddr;
/// The compile unit debug information entry items.
std::vector<DWARFDebugInfoEntry> DieArray;
/// Map from range's start address to end address and corresponding DIE.
/// IntervalMap does not support range removal, as a result, we use the
/// std::map::upper_bound for address range lookup.
std::map<uint64_t, std::pair<uint64_t, DWARFDie>> AddrDieMap;
/// Map from the location (interpreted DW_AT_location) of a DW_TAG_variable,
/// to the end address and the corresponding DIE.
std::map<uint64_t, std::pair<uint64_t, DWARFDie>> VariableDieMap;
DenseSet<uint64_t> RootsParsedForVariables;
using die_iterator_range =
iterator_range<std::vector<DWARFDebugInfoEntry>::iterator>;
std::shared_ptr<DWARFUnit> DWO;
protected:
friend dwarflinker_parallel::CompileUnit;
/// Return the index of a \p Die entry inside the unit's DIE vector.
///
/// It is illegal to call this method with a DIE that hasn't be
/// created by this unit. In other word, it's illegal to call this
/// method on a DIE that isn't accessible by following
/// children/sibling links starting from this unit's getUnitDIE().
uint32_t getDIEIndex(const DWARFDebugInfoEntry *Die) const {
auto First = DieArray.data();
assert(Die >= First && Die < First + DieArray.size());
return Die - First;
}
/// Return DWARFDebugInfoEntry for the specified index \p Index.
const DWARFDebugInfoEntry *getDebugInfoEntry(unsigned Index) const {
assert(Index < DieArray.size());
return &DieArray[Index];
}
const DWARFDebugInfoEntry *
getParentEntry(const DWARFDebugInfoEntry *Die) const;
const DWARFDebugInfoEntry *
getSiblingEntry(const DWARFDebugInfoEntry *Die) const;
const DWARFDebugInfoEntry *
getPreviousSiblingEntry(const DWARFDebugInfoEntry *Die) const;
const DWARFDebugInfoEntry *
getFirstChildEntry(const DWARFDebugInfoEntry *Die) const;
const DWARFDebugInfoEntry *
getLastChildEntry(const DWARFDebugInfoEntry *Die) const;
const DWARFUnitHeader &getHeader() const { return Header; }
/// Find the unit's contribution to the string offsets table and determine its
/// length and form. The given offset is expected to be derived from the unit
/// DIE's DW_AT_str_offsets_base attribute.
Expected<std::optional<StrOffsetsContributionDescriptor>>
determineStringOffsetsTableContribution(DWARFDataExtractor &DA);
/// Find the unit's contribution to the string offsets table and determine its
/// length and form. The given offset is expected to be 0 in a dwo file or,
/// in a dwp file, the start of the unit's contribution to the string offsets
/// table section (as determined by the index table).
Expected<std::optional<StrOffsetsContributionDescriptor>>
determineStringOffsetsTableContributionDWO(DWARFDataExtractor &DA);
public:
DWARFUnit(DWARFContext &Context, const DWARFSection &Section,
const DWARFUnitHeader &Header, const DWARFDebugAbbrev *DA,
const DWARFSection *RS, const DWARFSection *LocSection,
StringRef SS, const DWARFSection &SOS, const DWARFSection *AOS,
const DWARFSection &LS, bool LE, bool IsDWO,
const DWARFUnitVector &UnitVector);
virtual ~DWARFUnit();
bool isLittleEndian() const { return IsLittleEndian; }
bool isDWOUnit() const { return IsDWO; }
DWARFContext& getContext() const { return Context; }
const DWARFSection &getInfoSection() const { return InfoSection; }
uint64_t getOffset() const { return Header.getOffset(); }
const dwarf::FormParams &getFormParams() const {
return Header.getFormParams();
}
uint16_t getVersion() const { return Header.getVersion(); }
uint8_t getAddressByteSize() const { return Header.getAddressByteSize(); }
uint8_t getRefAddrByteSize() const { return Header.getRefAddrByteSize(); }
uint8_t getDwarfOffsetByteSize() const {
return Header.getDwarfOffsetByteSize();
}
/// Size in bytes of the parsed unit header.
uint32_t getHeaderSize() const { return Header.getSize(); }
uint64_t getLength() const { return Header.getLength(); }
dwarf::DwarfFormat getFormat() const { return Header.getFormat(); }
uint8_t getUnitType() const { return Header.getUnitType(); }
bool isTypeUnit() const { return Header.isTypeUnit(); }
uint64_t getAbbrOffset() const { return Header.getAbbrOffset(); }
uint64_t getNextUnitOffset() const { return Header.getNextUnitOffset(); }
const DWARFSection &getLineSection() const { return LineSection; }
StringRef getStringSection() const { return StringSection; }
const DWARFSection &getStringOffsetSection() const {
return StringOffsetSection;
}
void setSkeletonUnit(DWARFUnit *SU) { this->SU = SU; }
// Returns itself if not using Split DWARF, or if the unit is a skeleton unit
// - otherwise returns the split full unit's corresponding skeleton, if
// available.
DWARFUnit *getLinkedUnit() { return IsDWO ? SU : this; }
void setAddrOffsetSection(const DWARFSection *AOS, uint64_t Base) {
AddrOffsetSection = AOS;
AddrOffsetSectionBase = Base;
}
std::optional<uint64_t> getAddrOffsetSectionBase() const {
return AddrOffsetSectionBase;
}
/// Returns offset to the indexed address value inside .debug_addr section.
std::optional<uint64_t> getIndexedAddressOffset(uint64_t Index) {
if (std::optional<uint64_t> AddrOffsetSectionBase =
getAddrOffsetSectionBase())
return *AddrOffsetSectionBase + Index * getAddressByteSize();
return std::nullopt;
}
/// Recursively update address to Die map.
void updateAddressDieMap(DWARFDie Die);
/// Recursively update address to variable Die map.
void updateVariableDieMap(DWARFDie Die);
void setRangesSection(const DWARFSection *RS, uint64_t Base) {
RangeSection = RS;
RangeSectionBase = Base;
}
uint64_t getLocSectionBase() const {
return LocSectionBase;
}
std::optional<object::SectionedAddress>
getAddrOffsetSectionItem(uint32_t Index) const;
Expected<uint64_t> getStringOffsetSectionItem(uint32_t Index) const;
DWARFDataExtractor getDebugInfoExtractor() const;
DataExtractor getStringExtractor() const {
return DataExtractor(StringSection, false, 0);
}
const DWARFLocationTable &getLocationTable() { return *LocTable; }
/// Extract the range list referenced by this compile unit from the
/// .debug_ranges section. If the extraction is unsuccessful, an error
/// is returned. Successful extraction requires that the compile unit
/// has already been extracted.
Error extractRangeList(uint64_t RangeListOffset,
DWARFDebugRangeList &RangeList) const;
void clear();
const std::optional<StrOffsetsContributionDescriptor> &
getStringOffsetsTableContribution() const {
return StringOffsetsTableContribution;
}
uint8_t getDwarfStringOffsetsByteSize() const {
assert(StringOffsetsTableContribution);
return StringOffsetsTableContribution->getDwarfOffsetByteSize();
}
uint64_t getStringOffsetsBase() const {
assert(StringOffsetsTableContribution);
return StringOffsetsTableContribution->Base;
}
uint64_t getAbbreviationsOffset() const { return Header.getAbbrOffset(); }
const DWARFAbbreviationDeclarationSet *getAbbreviations() const;
static bool isMatchingUnitTypeAndTag(uint8_t UnitType, dwarf::Tag Tag) {
switch (UnitType) {
case dwarf::DW_UT_compile:
return Tag == dwarf::DW_TAG_compile_unit;
case dwarf::DW_UT_type:
return Tag == dwarf::DW_TAG_type_unit;
case dwarf::DW_UT_partial:
return Tag == dwarf::DW_TAG_partial_unit;
case dwarf::DW_UT_skeleton:
return Tag == dwarf::DW_TAG_skeleton_unit;
case dwarf::DW_UT_split_compile:
case dwarf::DW_UT_split_type:
return dwarf::isUnitType(Tag);
}
return false;
}
std::optional<object::SectionedAddress> getBaseAddress();
DWARFDie getUnitDIE(bool ExtractUnitDIEOnly = true) {
extractDIEsIfNeeded(ExtractUnitDIEOnly);
if (DieArray.empty())
return DWARFDie();
return DWARFDie(this, &DieArray[0]);
}
DWARFDie getNonSkeletonUnitDIE(bool ExtractUnitDIEOnly = true,
StringRef DWOAlternativeLocation = {}) {
parseDWO(DWOAlternativeLocation);
return DWO ? DWO->getUnitDIE(ExtractUnitDIEOnly)
: getUnitDIE(ExtractUnitDIEOnly);
}
const char *getCompilationDir();
std::optional<uint64_t> getDWOId() {
extractDIEsIfNeeded(/*CUDieOnly*/ true);
return getHeader().getDWOId();
}
void setDWOId(uint64_t NewID) { Header.setDWOId(NewID); }
/// Return a vector of address ranges resulting from a (possibly encoded)
/// range list starting at a given offset in the appropriate ranges section.
Expected<DWARFAddressRangesVector> findRnglistFromOffset(uint64_t Offset);
/// Return a vector of address ranges retrieved from an encoded range
/// list whose offset is found via a table lookup given an index (DWARF v5
/// and later).
Expected<DWARFAddressRangesVector> findRnglistFromIndex(uint32_t Index);
/// Return a rangelist's offset based on an index. The index designates
/// an entry in the rangelist table's offset array and is supplied by
/// DW_FORM_rnglistx.
std::optional<uint64_t> getRnglistOffset(uint32_t Index);
std::optional<uint64_t> getLoclistOffset(uint32_t Index);
Expected<DWARFAddressRangesVector> collectAddressRanges();
Expected<DWARFLocationExpressionsVector>
findLoclistFromOffset(uint64_t Offset);
/// Returns subprogram DIE with address range encompassing the provided
/// address. The pointer is alive as long as parsed compile unit DIEs are not
/// cleared.
DWARFDie getSubroutineForAddress(uint64_t Address);
/// Returns variable DIE for the address provided. The pointer is alive as
/// long as parsed compile unit DIEs are not cleared.
DWARFDie getVariableForAddress(uint64_t Address);
/// getInlinedChainForAddress - fetches inlined chain for a given address.
/// Returns empty chain if there is no subprogram containing address. The
/// chain is valid as long as parsed compile unit DIEs are not cleared.
void getInlinedChainForAddress(uint64_t Address,
SmallVectorImpl<DWARFDie> &InlinedChain);
/// Return the DWARFUnitVector containing this unit.
const DWARFUnitVector &getUnitVector() const { return UnitVector; }
/// Returns the number of DIEs in the unit. Parses the unit
/// if necessary.
unsigned getNumDIEs() {
extractDIEsIfNeeded(false);
return DieArray.size();
}
/// Return the index of a DIE inside the unit's DIE vector.
///
/// It is illegal to call this method with a DIE that hasn't be
/// created by this unit. In other word, it's illegal to call this
/// method on a DIE that isn't accessible by following
/// children/sibling links starting from this unit's getUnitDIE().
uint32_t getDIEIndex(const DWARFDie &D) const {
return getDIEIndex(D.getDebugInfoEntry());
}
/// Return the DIE object at the given index \p Index.
DWARFDie getDIEAtIndex(unsigned Index) {
return DWARFDie(this, getDebugInfoEntry(Index));
}
DWARFDie getParent(const DWARFDebugInfoEntry *Die);
DWARFDie getSibling(const DWARFDebugInfoEntry *Die);
DWARFDie getPreviousSibling(const DWARFDebugInfoEntry *Die);
DWARFDie getFirstChild(const DWARFDebugInfoEntry *Die);
DWARFDie getLastChild(const DWARFDebugInfoEntry *Die);
/// Return the DIE object for a given offset \p Offset inside the
/// unit's DIE vector.
DWARFDie getDIEForOffset(uint64_t Offset) {
if (std::optional<uint32_t> DieIdx = getDIEIndexForOffset(Offset))
return DWARFDie(this, &DieArray[*DieIdx]);
return DWARFDie();
}
/// Return the DIE index for a given offset \p Offset inside the
/// unit's DIE vector.
std::optional<uint32_t> getDIEIndexForOffset(uint64_t Offset) {
extractDIEsIfNeeded(false);
auto It =
llvm::partition_point(DieArray, [=](const DWARFDebugInfoEntry &DIE) {
return DIE.getOffset() < Offset;
});
if (It != DieArray.end() && It->getOffset() == Offset)
return It - DieArray.begin();
return std::nullopt;
}
uint32_t getLineTableOffset() const {
if (auto IndexEntry = Header.getIndexEntry())
if (const auto *Contrib = IndexEntry->getContribution(DW_SECT_LINE))
return Contrib->getOffset32();
return 0;
}
die_iterator_range dies() {
extractDIEsIfNeeded(false);
return die_iterator_range(DieArray.begin(), DieArray.end());
}
virtual void dump(raw_ostream &OS, DIDumpOptions DumpOpts) = 0;
Error tryExtractDIEsIfNeeded(bool CUDieOnly);
private:
/// Size in bytes of the .debug_info data associated with this compile unit.
size_t getDebugInfoSize() const {
return Header.getLength() + Header.getUnitLengthFieldByteSize() -
getHeaderSize();
}
/// extractDIEsIfNeeded - Parses a compile unit and indexes its DIEs if it
/// hasn't already been done
void extractDIEsIfNeeded(bool CUDieOnly);
/// extractDIEsToVector - Appends all parsed DIEs to a vector.
void extractDIEsToVector(bool AppendCUDie, bool AppendNonCUDIEs,
std::vector<DWARFDebugInfoEntry> &DIEs) const;
/// clearDIEs - Clear parsed DIEs to keep memory usage low.
void clearDIEs(bool KeepCUDie);
/// parseDWO - Parses .dwo file for current compile unit. Returns true if
/// it was actually constructed.
/// The \p AlternativeLocation specifies an alternative location to get
/// the DWARF context for the DWO object; this is the case when it has
/// been moved from its original location.
bool parseDWO(StringRef AlternativeLocation = {});
};
inline bool isCompileUnit(const std::unique_ptr<DWARFUnit> &U) {
return !U->isTypeUnit();
}
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFUNIT_H
PK hwFZ%5qRBC BC DebugInfo/DWARF/DWARFContext.hnu �[��� //===- DWARFContext.h -------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===/
#ifndef LLVM_DEBUGINFO_DWARF_DWARFCONTEXT_H
#define LLVM_DEBUGINFO_DWARF_DWARFCONTEXT_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/DIContext.h"
#include "llvm/DebugInfo/DWARF/DWARFDebugLine.h"
#include "llvm/DebugInfo/DWARF/DWARFDie.h"
#include "llvm/DebugInfo/DWARF/DWARFObject.h"
#include "llvm/DebugInfo/DWARF/DWARFUnit.h"
#include "llvm/Object/Binary.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/Support/DataExtractor.h"
#include "llvm/Support/Error.h"
#include "llvm/TargetParser/Host.h"
#include <cstdint>
#include <memory>
namespace llvm {
class MemoryBuffer;
class AppleAcceleratorTable;
class DWARFCompileUnit;
class DWARFDebugAbbrev;
class DWARFDebugAranges;
class DWARFDebugFrame;
class DWARFDebugLoc;
class DWARFDebugMacro;
class DWARFDebugNames;
class DWARFGdbIndex;
class DWARFTypeUnit;
class DWARFUnitIndex;
/// DWARFContext
/// This data structure is the top level entity that deals with dwarf debug
/// information parsing. The actual data is supplied through DWARFObj.
class DWARFContext : public DIContext {
DWARFUnitVector NormalUnits;
std::optional<DenseMap<uint64_t, DWARFTypeUnit *>> NormalTypeUnits;
std::unique_ptr<DWARFUnitIndex> CUIndex;
std::unique_ptr<DWARFGdbIndex> GdbIndex;
std::unique_ptr<DWARFUnitIndex> TUIndex;
std::unique_ptr<DWARFDebugAbbrev> Abbrev;
std::unique_ptr<DWARFDebugLoc> Loc;
std::unique_ptr<DWARFDebugAranges> Aranges;
std::unique_ptr<DWARFDebugLine> Line;
std::unique_ptr<DWARFDebugFrame> DebugFrame;
std::unique_ptr<DWARFDebugFrame> EHFrame;
std::unique_ptr<DWARFDebugMacro> Macro;
std::unique_ptr<DWARFDebugMacro> Macinfo;
std::unique_ptr<DWARFDebugNames> Names;
std::unique_ptr<AppleAcceleratorTable> AppleNames;
std::unique_ptr<AppleAcceleratorTable> AppleTypes;
std::unique_ptr<AppleAcceleratorTable> AppleNamespaces;
std::unique_ptr<AppleAcceleratorTable> AppleObjC;
DWARFUnitVector DWOUnits;
std::optional<DenseMap<uint64_t, DWARFTypeUnit *>> DWOTypeUnits;
std::unique_ptr<DWARFDebugAbbrev> AbbrevDWO;
std::unique_ptr<DWARFDebugMacro> MacinfoDWO;
std::unique_ptr<DWARFDebugMacro> MacroDWO;
/// The maximum DWARF version of all units.
unsigned MaxVersion = 0;
struct DWOFile {
object::OwningBinary<object::ObjectFile> File;
std::unique_ptr<DWARFContext> Context;
};
StringMap<std::weak_ptr<DWOFile>> DWOFiles;
std::weak_ptr<DWOFile> DWP;
bool CheckedForDWP = false;
std::string DWPName;
std::function<void(Error)> RecoverableErrorHandler =
WithColor::defaultErrorHandler;
std::function<void(Error)> WarningHandler = WithColor::defaultWarningHandler;
/// Read compile units from the debug_info section (if necessary)
/// and type units from the debug_types sections (if necessary)
/// and store them in NormalUnits.
void parseNormalUnits();
/// Read compile units from the debug_info.dwo section (if necessary)
/// and type units from the debug_types.dwo section (if necessary)
/// and store them in DWOUnits.
/// If \p Lazy is true, set up to parse but don't actually parse them.
enum { EagerParse = false, LazyParse = true };
void parseDWOUnits(bool Lazy = false);
std::unique_ptr<const DWARFObject> DObj;
/// Helper enum to distinguish between macro[.dwo] and macinfo[.dwo]
/// section.
enum MacroSecType {
MacinfoSection,
MacinfoDwoSection,
MacroSection,
MacroDwoSection
};
// When set parses debug_info.dwo/debug_abbrev.dwo manually and populates CU
// Index, and TU Index for DWARF5.
bool ParseCUTUIndexManually = false;
public:
DWARFContext(std::unique_ptr<const DWARFObject> DObj,
std::string DWPName = "",
std::function<void(Error)> RecoverableErrorHandler =
WithColor::defaultErrorHandler,
std::function<void(Error)> WarningHandler =
WithColor::defaultWarningHandler);
~DWARFContext() override;
DWARFContext(DWARFContext &) = delete;
DWARFContext &operator=(DWARFContext &) = delete;
const DWARFObject &getDWARFObj() const { return *DObj; }
static bool classof(const DIContext *DICtx) {
return DICtx->getKind() == CK_DWARF;
}
/// Dump a textual representation to \p OS. If any \p DumpOffsets are present,
/// dump only the record at the specified offset.
void dump(raw_ostream &OS, DIDumpOptions DumpOpts,
std::array<std::optional<uint64_t>, DIDT_ID_Count> DumpOffsets);
void dump(raw_ostream &OS, DIDumpOptions DumpOpts) override {
std::array<std::optional<uint64_t>, DIDT_ID_Count> DumpOffsets;
dump(OS, DumpOpts, DumpOffsets);
}
bool verify(raw_ostream &OS, DIDumpOptions DumpOpts = {}) override;
using unit_iterator_range = DWARFUnitVector::iterator_range;
using compile_unit_range = DWARFUnitVector::compile_unit_range;
/// Get units from .debug_info in this context.
unit_iterator_range info_section_units() {
parseNormalUnits();
return unit_iterator_range(NormalUnits.begin(),
NormalUnits.begin() +
NormalUnits.getNumInfoUnits());
}
const DWARFUnitVector &getNormalUnitsVector() {
parseNormalUnits();
return NormalUnits;
}
/// Get units from .debug_types in this context.
unit_iterator_range types_section_units() {
parseNormalUnits();
return unit_iterator_range(
NormalUnits.begin() + NormalUnits.getNumInfoUnits(), NormalUnits.end());
}
/// Get compile units in this context.
compile_unit_range compile_units() {
return make_filter_range(info_section_units(), isCompileUnit);
}
// If you want type_units(), it'll need to be a concat iterator of a filter of
// TUs in info_section + all the (all type) units in types_section
/// Get all normal compile/type units in this context.
unit_iterator_range normal_units() {
parseNormalUnits();
return unit_iterator_range(NormalUnits.begin(), NormalUnits.end());
}
/// Get units from .debug_info..dwo in the DWO context.
unit_iterator_range dwo_info_section_units() {
parseDWOUnits();
return unit_iterator_range(DWOUnits.begin(),
DWOUnits.begin() + DWOUnits.getNumInfoUnits());
}
const DWARFUnitVector &getDWOUnitsVector() {
parseDWOUnits();
return DWOUnits;
}
/// Get units from .debug_types.dwo in the DWO context.
unit_iterator_range dwo_types_section_units() {
parseDWOUnits();
return unit_iterator_range(DWOUnits.begin() + DWOUnits.getNumInfoUnits(),
DWOUnits.end());
}
/// Get compile units in the DWO context.
compile_unit_range dwo_compile_units() {
return make_filter_range(dwo_info_section_units(), isCompileUnit);
}
// If you want dwo_type_units(), it'll need to be a concat iterator of a
// filter of TUs in dwo_info_section + all the (all type) units in
// dwo_types_section.
/// Get all units in the DWO context.
unit_iterator_range dwo_units() {
parseDWOUnits();
return unit_iterator_range(DWOUnits.begin(), DWOUnits.end());
}
/// Get the number of compile units in this context.
unsigned getNumCompileUnits() {
parseNormalUnits();
return NormalUnits.getNumInfoUnits();
}
/// Get the number of type units in this context.
unsigned getNumTypeUnits() {
parseNormalUnits();
return NormalUnits.getNumTypesUnits();
}
/// Get the number of compile units in the DWO context.
unsigned getNumDWOCompileUnits() {
parseDWOUnits();
return DWOUnits.getNumInfoUnits();
}
/// Get the number of type units in the DWO context.
unsigned getNumDWOTypeUnits() {
parseDWOUnits();
return DWOUnits.getNumTypesUnits();
}
/// Get the unit at the specified index.
DWARFUnit *getUnitAtIndex(unsigned index) {
parseNormalUnits();
return NormalUnits[index].get();
}
/// Get the unit at the specified index for the DWO units.
DWARFUnit *getDWOUnitAtIndex(unsigned index) {
parseDWOUnits();
return DWOUnits[index].get();
}
DWARFCompileUnit *getDWOCompileUnitForHash(uint64_t Hash);
DWARFTypeUnit *getTypeUnitForHash(uint16_t Version, uint64_t Hash, bool IsDWO);
/// Return the compile unit that includes an offset (relative to .debug_info).
DWARFCompileUnit *getCompileUnitForOffset(uint64_t Offset);
/// Get a DIE given an exact offset.
DWARFDie getDIEForOffset(uint64_t Offset);
unsigned getMaxVersion() {
// Ensure info units have been parsed to discover MaxVersion
info_section_units();
return MaxVersion;
}
unsigned getMaxDWOVersion() {
// Ensure DWO info units have been parsed to discover MaxVersion
dwo_info_section_units();
return MaxVersion;
}
void setMaxVersionIfGreater(unsigned Version) {
if (Version > MaxVersion)
MaxVersion = Version;
}
const DWARFUnitIndex &getCUIndex();
DWARFGdbIndex &getGdbIndex();
const DWARFUnitIndex &getTUIndex();
/// Get a pointer to the parsed DebugAbbrev object.
const DWARFDebugAbbrev *getDebugAbbrev();
/// Get a pointer to the parsed DebugLoc object.
const DWARFDebugLoc *getDebugLoc();
/// Get a pointer to the parsed dwo abbreviations object.
const DWARFDebugAbbrev *getDebugAbbrevDWO();
/// Get a pointer to the parsed DebugAranges object.
const DWARFDebugAranges *getDebugAranges();
/// Get a pointer to the parsed frame information object.
Expected<const DWARFDebugFrame *> getDebugFrame();
/// Get a pointer to the parsed eh frame information object.
Expected<const DWARFDebugFrame *> getEHFrame();
/// Get a pointer to the parsed DebugMacinfo information object.
const DWARFDebugMacro *getDebugMacinfo();
/// Get a pointer to the parsed DebugMacinfoDWO information object.
const DWARFDebugMacro *getDebugMacinfoDWO();
/// Get a pointer to the parsed DebugMacro information object.
const DWARFDebugMacro *getDebugMacro();
/// Get a pointer to the parsed DebugMacroDWO information object.
const DWARFDebugMacro *getDebugMacroDWO();
/// Get a reference to the parsed accelerator table object.
const DWARFDebugNames &getDebugNames();
/// Get a reference to the parsed accelerator table object.
const AppleAcceleratorTable &getAppleNames();
/// Get a reference to the parsed accelerator table object.
const AppleAcceleratorTable &getAppleTypes();
/// Get a reference to the parsed accelerator table object.
const AppleAcceleratorTable &getAppleNamespaces();
/// Get a reference to the parsed accelerator table object.
const AppleAcceleratorTable &getAppleObjC();
/// Get a pointer to a parsed line table corresponding to a compile unit.
/// Report any parsing issues as warnings on stderr.
const DWARFDebugLine::LineTable *getLineTableForUnit(DWARFUnit *U);
/// Get a pointer to a parsed line table corresponding to a compile unit.
/// Report any recoverable parsing problems using the handler.
Expected<const DWARFDebugLine::LineTable *>
getLineTableForUnit(DWARFUnit *U,
function_ref<void(Error)> RecoverableErrorHandler);
// Clear the line table object corresponding to a compile unit for memory
// management purpose. When it's referred to again, it'll be re-populated.
void clearLineTableForUnit(DWARFUnit *U);
DataExtractor getStringExtractor() const {
return DataExtractor(DObj->getStrSection(), false, 0);
}
DataExtractor getStringDWOExtractor() const {
return DataExtractor(DObj->getStrDWOSection(), false, 0);
}
DataExtractor getLineStringExtractor() const {
return DataExtractor(DObj->getLineStrSection(), false, 0);
}
/// Wraps the returned DIEs for a given address.
struct DIEsForAddress {
DWARFCompileUnit *CompileUnit = nullptr;
DWARFDie FunctionDIE;
DWARFDie BlockDIE;
explicit operator bool() const { return CompileUnit != nullptr; }
};
/// Get the compilation unit, the function DIE and lexical block DIE for the
/// given address where applicable.
/// TODO: change input parameter from "uint64_t Address"
/// into "SectionedAddress Address"
DIEsForAddress getDIEsForAddress(uint64_t Address);
DILineInfo getLineInfoForAddress(
object::SectionedAddress Address,
DILineInfoSpecifier Specifier = DILineInfoSpecifier()) override;
DILineInfo
getLineInfoForDataAddress(object::SectionedAddress Address) override;
DILineInfoTable getLineInfoForAddressRange(
object::SectionedAddress Address, uint64_t Size,
DILineInfoSpecifier Specifier = DILineInfoSpecifier()) override;
DIInliningInfo getInliningInfoForAddress(
object::SectionedAddress Address,
DILineInfoSpecifier Specifier = DILineInfoSpecifier()) override;
std::vector<DILocal>
getLocalsForAddress(object::SectionedAddress Address) override;
bool isLittleEndian() const { return DObj->isLittleEndian(); }
static unsigned getMaxSupportedVersion() { return 5; }
static bool isSupportedVersion(unsigned version) {
return version >= 2 && version <= getMaxSupportedVersion();
}
static SmallVector<uint8_t, 3> getSupportedAddressSizes() {
return {2, 4, 8};
}
static bool isAddressSizeSupported(unsigned AddressSize) {
return llvm::is_contained(getSupportedAddressSizes(), AddressSize);
}
template <typename... Ts>
static Error checkAddressSizeSupported(unsigned AddressSize,
std::error_code EC, char const *Fmt,
const Ts &...Vals) {
if (isAddressSizeSupported(AddressSize))
return Error::success();
std::string Buffer;
raw_string_ostream Stream(Buffer);
Stream << format(Fmt, Vals...)
<< " has unsupported address size: " << AddressSize
<< " (supported are ";
ListSeparator LS;
for (unsigned Size : DWARFContext::getSupportedAddressSizes())
Stream << LS << Size;
Stream << ')';
return make_error<StringError>(Stream.str(), EC);
}
std::shared_ptr<DWARFContext> getDWOContext(StringRef AbsolutePath);
function_ref<void(Error)> getRecoverableErrorHandler() {
return RecoverableErrorHandler;
}
function_ref<void(Error)> getWarningHandler() { return WarningHandler; }
enum class ProcessDebugRelocations { Process, Ignore };
static std::unique_ptr<DWARFContext>
create(const object::ObjectFile &Obj,
ProcessDebugRelocations RelocAction = ProcessDebugRelocations::Process,
const LoadedObjectInfo *L = nullptr, std::string DWPName = "",
std::function<void(Error)> RecoverableErrorHandler =
WithColor::defaultErrorHandler,
std::function<void(Error)> WarningHandler =
WithColor::defaultWarningHandler);
static std::unique_ptr<DWARFContext>
create(const StringMap<std::unique_ptr<MemoryBuffer>> &Sections,
uint8_t AddrSize, bool isLittleEndian = sys::IsLittleEndianHost,
std::function<void(Error)> RecoverableErrorHandler =
WithColor::defaultErrorHandler,
std::function<void(Error)> WarningHandler =
WithColor::defaultWarningHandler);
/// Get address size from CUs.
/// TODO: refactor compile_units() to make this const.
uint8_t getCUAddrSize();
Triple::ArchType getArch() const {
return getDWARFObj().getFile()->getArch();
}
/// Return the compile unit which contains instruction with provided
/// address.
/// TODO: change input parameter from "uint64_t Address"
/// into "SectionedAddress Address"
DWARFCompileUnit *getCompileUnitForCodeAddress(uint64_t Address);
/// Return the compile unit which contains data with the provided address.
/// Note: This is more expensive than `getCompileUnitForAddress`, as if
/// `Address` isn't found in the CU ranges (which is cheap), then it falls
/// back to an expensive O(n) walk of all CU's looking for data that spans the
/// address.
/// TODO: change input parameter from "uint64_t Address" into
/// "SectionedAddress Address"
DWARFCompileUnit *getCompileUnitForDataAddress(uint64_t Address);
/// Returns whether CU/TU should be populated manually. TU Index populated
/// manually only for DWARF5.
bool getParseCUTUIndexManually() const { return ParseCUTUIndexManually; }
/// Sets whether CU/TU should be populated manually. TU Index populated
/// manually only for DWARF5.
void setParseCUTUIndexManually(bool PCUTU) { ParseCUTUIndexManually = PCUTU; }
private:
/// Parse a macro[.dwo] or macinfo[.dwo] section.
std::unique_ptr<DWARFDebugMacro>
parseMacroOrMacinfo(MacroSecType SectionType);
void addLocalsForDie(DWARFCompileUnit *CU, DWARFDie Subprogram, DWARFDie Die,
std::vector<DILocal> &Result);
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFCONTEXT_H
PK hwFZ�WY� � DebugInfo/DWARF/DWARFAttribute.hnu �[��� //===- DWARFAttribute.h -----------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFATTRIBUTE_H
#define LLVM_DEBUGINFO_DWARF_DWARFATTRIBUTE_H
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/DebugInfo/DWARF/DWARFFormValue.h"
#include <cstdint>
namespace llvm {
//===----------------------------------------------------------------------===//
/// Encapsulates a DWARF attribute value and all of the data required to
/// describe the attribute value.
///
/// This class is designed to be used by clients that want to iterate across all
/// attributes in a DWARFDie.
struct DWARFAttribute {
/// The debug info/types offset for this attribute.
uint64_t Offset = 0;
/// The debug info/types section byte size of the data for this attribute.
uint32_t ByteSize = 0;
/// The attribute enumeration of this attribute.
dwarf::Attribute Attr = dwarf::Attribute(0);
/// The form and value for this attribute.
DWARFFormValue Value;
bool isValid() const {
return Offset != 0 && Attr != dwarf::Attribute(0);
}
explicit operator bool() const {
return isValid();
}
/// Identify DWARF attributes that may contain a pointer to a location list.
static bool mayHaveLocationList(dwarf::Attribute Attr);
/// Identifies DWARF attributes that may contain a reference to a
/// DWARF expression.
static bool mayHaveLocationExpr(dwarf::Attribute Attr);
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFATTRIBUTE_H
PK hwFZg�^R^ ^ DebugInfo/DWARF/DWARFObject.hnu �[��� //===- DWARFObject.h --------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===-----------------------------------------------------------------------===/
#ifndef LLVM_DEBUGINFO_DWARF_DWARFOBJECT_H
#define LLVM_DEBUGINFO_DWARF_DWARFOBJECT_H
#include "llvm/DebugInfo/DWARF/DWARFRelocMap.h"
#include "llvm/DebugInfo/DWARF/DWARFSection.h"
#include "llvm/Object/ObjectFile.h"
#include <optional>
namespace llvm {
// This is responsible for low level access to the object file. It
// knows how to find the required sections and compute relocated
// values.
// The default implementations of the get<Section> methods return dummy values.
// This is to allow clients that only need some of those to implement just the
// ones they need. We can't use unreachable for as many cases because the parser
// implementation is eager and will call some of these methods even if the
// result is not used.
class DWARFObject {
DWARFSection Dummy;
public:
virtual ~DWARFObject() = default;
virtual StringRef getFileName() const { llvm_unreachable("unimplemented"); }
virtual const object::ObjectFile *getFile() const { return nullptr; }
virtual ArrayRef<SectionName> getSectionNames() const { return {}; }
virtual bool isLittleEndian() const = 0;
virtual uint8_t getAddressSize() const { llvm_unreachable("unimplemented"); }
virtual void
forEachInfoSections(function_ref<void(const DWARFSection &)> F) const {}
virtual void
forEachTypesSections(function_ref<void(const DWARFSection &)> F) const {}
virtual StringRef getAbbrevSection() const { return ""; }
virtual const DWARFSection &getLocSection() const { return Dummy; }
virtual const DWARFSection &getLoclistsSection() const { return Dummy; }
virtual StringRef getArangesSection() const { return ""; }
virtual const DWARFSection &getFrameSection() const { return Dummy; }
virtual const DWARFSection &getEHFrameSection() const { return Dummy; }
virtual const DWARFSection &getLineSection() const { return Dummy; }
virtual StringRef getLineStrSection() const { return ""; }
virtual StringRef getStrSection() const { return ""; }
virtual const DWARFSection &getRangesSection() const { return Dummy; }
virtual const DWARFSection &getRnglistsSection() const { return Dummy; }
virtual const DWARFSection &getMacroSection() const { return Dummy; }
virtual StringRef getMacroDWOSection() const { return ""; }
virtual StringRef getMacinfoSection() const { return ""; }
virtual StringRef getMacinfoDWOSection() const { return ""; }
virtual const DWARFSection &getPubnamesSection() const { return Dummy; }
virtual const DWARFSection &getPubtypesSection() const { return Dummy; }
virtual const DWARFSection &getGnuPubnamesSection() const { return Dummy; }
virtual const DWARFSection &getGnuPubtypesSection() const { return Dummy; }
virtual const DWARFSection &getStrOffsetsSection() const { return Dummy; }
virtual void
forEachInfoDWOSections(function_ref<void(const DWARFSection &)> F) const {}
virtual void
forEachTypesDWOSections(function_ref<void(const DWARFSection &)> F) const {}
virtual StringRef getAbbrevDWOSection() const { return ""; }
virtual const DWARFSection &getLineDWOSection() const { return Dummy; }
virtual const DWARFSection &getLocDWOSection() const { return Dummy; }
virtual const DWARFSection &getLoclistsDWOSection() const { return Dummy; }
virtual StringRef getStrDWOSection() const { return ""; }
virtual const DWARFSection &getStrOffsetsDWOSection() const {
return Dummy;
}
virtual const DWARFSection &getRangesDWOSection() const { return Dummy; }
virtual const DWARFSection &getRnglistsDWOSection() const { return Dummy; }
virtual const DWARFSection &getAddrSection() const { return Dummy; }
virtual const DWARFSection &getAppleNamesSection() const { return Dummy; }
virtual const DWARFSection &getAppleTypesSection() const { return Dummy; }
virtual const DWARFSection &getAppleNamespacesSection() const {
return Dummy;
}
virtual const DWARFSection &getNamesSection() const { return Dummy; }
virtual const DWARFSection &getAppleObjCSection() const { return Dummy; }
virtual StringRef getCUIndexSection() const { return ""; }
virtual StringRef getGdbIndexSection() const { return ""; }
virtual StringRef getTUIndexSection() const { return ""; }
virtual std::optional<RelocAddrEntry> find(const DWARFSection &Sec,
uint64_t Pos) const = 0;
};
} // namespace llvm
#endif
PK hwFZ�~�z z % DebugInfo/DWARF/DWARFDebugRangeList.hnu �[��� //===- DWARFDebugRangeList.h ------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFDEBUGRANGELIST_H
#define LLVM_DEBUGINFO_DWARF_DWARFDEBUGRANGELIST_H
#include "llvm/DebugInfo/DWARF/DWARFAddressRange.h"
#include <cstdint>
#include <vector>
namespace llvm {
class raw_ostream;
class DWARFDataExtractor;
namespace object {
struct SectionedAddress;
}
class DWARFDebugRangeList {
public:
struct RangeListEntry {
/// A beginning address offset. This address offset has the size of an
/// address and is relative to the applicable base address of the
/// compilation unit referencing this range list. It marks the beginning
/// of an address range.
uint64_t StartAddress;
/// An ending address offset. This address offset again has the size of
/// an address and is relative to the applicable base address of the
/// compilation unit referencing this range list. It marks the first
/// address past the end of the address range. The ending address must
/// be greater than or equal to the beginning address.
uint64_t EndAddress;
/// A section index this range belongs to.
uint64_t SectionIndex;
/// The end of any given range list is marked by an end of list entry,
/// which consists of a 0 for the beginning address offset
/// and a 0 for the ending address offset.
bool isEndOfListEntry() const {
return (StartAddress == 0) && (EndAddress == 0);
}
/// A base address selection entry consists of:
/// 1. The value of the largest representable address offset
/// (for example, 0xffffffff when the size of an address is 32 bits).
/// 2. An address, which defines the appropriate base address for
/// use in interpreting the beginning and ending address offsets of
/// subsequent entries of the location list.
bool isBaseAddressSelectionEntry(uint8_t AddressSize) const;
};
private:
/// Offset in .debug_ranges section.
uint64_t Offset;
uint8_t AddressSize;
std::vector<RangeListEntry> Entries;
public:
DWARFDebugRangeList() { clear(); }
void clear();
void dump(raw_ostream &OS) const;
Error extract(const DWARFDataExtractor &data, uint64_t *offset_ptr);
const std::vector<RangeListEntry> &getEntries() { return Entries; }
/// getAbsoluteRanges - Returns absolute address ranges defined by this range
/// list. Has to be passed base address of the compile unit referencing this
/// range list.
DWARFAddressRangesVector
getAbsoluteRanges(std::optional<object::SectionedAddress> BaseAddr) const;
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFDEBUGRANGELIST_H
PK hwFZ�s� � " DebugInfo/DWARF/DWARFDebugAbbrev.hnu �[��� //===- DWARFDebugAbbrev.h ---------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFDEBUGABBREV_H
#define LLVM_DEBUGINFO_DWARF_DWARFDEBUGABBREV_H
#include "llvm/DebugInfo/DWARF/DWARFAbbreviationDeclaration.h"
#include "llvm/Support/DataExtractor.h"
#include <cstdint>
#include <map>
#include <vector>
namespace llvm {
class raw_ostream;
class DWARFAbbreviationDeclarationSet {
uint64_t Offset;
/// Code of the first abbreviation, if all abbreviations in the set have
/// consecutive codes. UINT32_MAX otherwise.
uint32_t FirstAbbrCode;
std::vector<DWARFAbbreviationDeclaration> Decls;
using const_iterator =
std::vector<DWARFAbbreviationDeclaration>::const_iterator;
public:
DWARFAbbreviationDeclarationSet();
uint64_t getOffset() const { return Offset; }
void dump(raw_ostream &OS) const;
Error extract(DataExtractor Data, uint64_t *OffsetPtr);
const DWARFAbbreviationDeclaration *
getAbbreviationDeclaration(uint32_t AbbrCode) const;
const_iterator begin() const {
return Decls.begin();
}
const_iterator end() const {
return Decls.end();
}
std::string getCodeRange() const;
uint32_t getFirstAbbrCode() const { return FirstAbbrCode; }
private:
void clear();
};
class DWARFDebugAbbrev {
using DWARFAbbreviationDeclarationSetMap =
std::map<uint64_t, DWARFAbbreviationDeclarationSet>;
mutable DWARFAbbreviationDeclarationSetMap AbbrDeclSets;
mutable DWARFAbbreviationDeclarationSetMap::const_iterator PrevAbbrOffsetPos;
mutable std::optional<DataExtractor> Data;
public:
DWARFDebugAbbrev(DataExtractor Data);
Expected<const DWARFAbbreviationDeclarationSet *>
getAbbreviationDeclarationSet(uint64_t CUAbbrOffset) const;
void dump(raw_ostream &OS) const;
void parse() const;
DWARFAbbreviationDeclarationSetMap::const_iterator begin() const {
assert(!Data && "Must call parse before iterating over DWARFDebugAbbrev");
return AbbrDeclSets.begin();
}
DWARFAbbreviationDeclarationSetMap::const_iterator end() const {
return AbbrDeclSets.end();
}
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFDEBUGABBREV_H
PK hwFZ4Q>� � DebugInfo/DWARF/DWARFRelocMap.hnu �[��� //===- DWARFRelocMap.h ------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFRELOCMAP_H
#define LLVM_DEBUGINFO_DWARF_DWARFRELOCMAP_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/Object/RelocationResolver.h"
#include <cstdint>
namespace llvm {
/// RelocAddrEntry contains relocated value and section index.
/// Section index is -1LL if relocation points to absolute symbol.
struct RelocAddrEntry {
uint64_t SectionIndex;
object::RelocationRef Reloc;
uint64_t SymbolValue;
std::optional<object::RelocationRef> Reloc2;
uint64_t SymbolValue2;
object::RelocationResolver Resolver;
};
/// In place of applying the relocations to the data we've read from disk we use
/// a separate mapping table to the side and checking that at locations in the
/// dwarf where we expect relocated values. This adds a bit of complexity to the
/// dwarf parsing/extraction at the benefit of not allocating memory for the
/// entire size of the debug info sections.
using RelocAddrMap = DenseMap<uint64_t, RelocAddrEntry>;
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFRELOCMAP_H
PK hwFZ�y��8 �8 DebugInfo/DWARF/DWARFVerifier.hnu �[��� //===- DWARFVerifier.h ----------------------------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DWARF_DWARFVERIFIER_H
#define LLVM_DEBUGINFO_DWARF_DWARFVERIFIER_H
#include "llvm/DebugInfo/DIContext.h"
#include "llvm/DebugInfo/DWARF/DWARFAcceleratorTable.h"
#include "llvm/DebugInfo/DWARF/DWARFAddressRange.h"
#include "llvm/DebugInfo/DWARF/DWARFDie.h"
#include "llvm/DebugInfo/DWARF/DWARFUnitIndex.h"
#include <cstdint>
#include <map>
#include <set>
namespace llvm {
class raw_ostream;
struct DWARFAddressRange;
class DWARFUnit;
class DWARFUnitVector;
struct DWARFAttribute;
class DWARFContext;
class DWARFDataExtractor;
class DWARFDebugAbbrev;
class DataExtractor;
struct DWARFSection;
/// A class that verifies DWARF debug information given a DWARF Context.
class DWARFVerifier {
public:
/// A class that keeps the address range information for a single DIE.
struct DieRangeInfo {
DWARFDie Die;
/// Sorted DWARFAddressRanges.
std::vector<DWARFAddressRange> Ranges;
/// Sorted DWARFAddressRangeInfo.
std::set<DieRangeInfo> Children;
DieRangeInfo() = default;
DieRangeInfo(DWARFDie Die) : Die(Die) {}
/// Used for unit testing.
DieRangeInfo(std::vector<DWARFAddressRange> Ranges)
: Ranges(std::move(Ranges)) {}
typedef std::set<DieRangeInfo>::const_iterator die_range_info_iterator;
/// Inserts the address range. If the range overlaps with an existing
/// range, the range that it overlaps with will be returned and the two
/// address ranges will be unioned together in "Ranges".
///
/// This is used for finding overlapping ranges in the DW_AT_ranges
/// attribute of a DIE. It is also used as a set of address ranges that
/// children address ranges must all be contained in.
std::optional<DWARFAddressRange> insert(const DWARFAddressRange &R);
/// Inserts the address range info. If any of its ranges overlaps with a
/// range in an existing range info, the range info is *not* added and an
/// iterator to the overlapping range info.
///
/// This is used for finding overlapping children of the same DIE.
die_range_info_iterator insert(const DieRangeInfo &RI);
/// Return true if ranges in this object contains all ranges within RHS.
bool contains(const DieRangeInfo &RHS) const;
/// Return true if any range in this object intersects with any range in
/// RHS.
bool intersects(const DieRangeInfo &RHS) const;
};
private:
raw_ostream &OS;
DWARFContext &DCtx;
DIDumpOptions DumpOpts;
uint32_t NumDebugLineErrors = 0;
// Used to relax some checks that do not currently work portably
bool IsObjectFile;
bool IsMachOObject;
using ReferenceMap = std::map<uint64_t, std::set<uint64_t>>;
raw_ostream &error() const;
raw_ostream &warn() const;
raw_ostream ¬e() const;
raw_ostream &dump(const DWARFDie &Die, unsigned indent = 0) const;
/// Verifies the abbreviations section.
///
/// This function currently checks that:
/// --No abbreviation declaration has more than one attributes with the same
/// name.
///
/// \param Abbrev Pointer to the abbreviations section we are verifying
/// Abbrev can be a pointer to either .debug_abbrev or debug_abbrev.dwo.
///
/// \returns The number of errors that occurred during verification.
unsigned verifyAbbrevSection(const DWARFDebugAbbrev *Abbrev);
/// Verifies the header of a unit in a .debug_info or .debug_types section.
///
/// This function currently checks for:
/// - Unit is in 32-bit DWARF format. The function can be modified to
/// support 64-bit format.
/// - The DWARF version is valid
/// - The unit type is valid (if unit is in version >=5)
/// - The unit doesn't extend beyond the containing section
/// - The address size is valid
/// - The offset in the .debug_abbrev section is valid
///
/// \param DebugInfoData The section data
/// \param Offset A reference to the offset start of the unit. The offset will
/// be updated to point to the next unit in the section
/// \param UnitIndex The index of the unit to be verified
/// \param UnitType A reference to the type of the unit
/// \param isUnitDWARF64 A reference to a flag that shows whether the unit is
/// in 64-bit format.
///
/// \returns true if the header is verified successfully, false otherwise.
bool verifyUnitHeader(const DWARFDataExtractor DebugInfoData,
uint64_t *Offset, unsigned UnitIndex, uint8_t &UnitType,
bool &isUnitDWARF64);
bool verifyName(const DWARFDie &Die);
/// Verifies the header of a unit in a .debug_info or .debug_types section.
///
/// This function currently verifies:
/// - The debug info attributes.
/// - The debug info form=s.
/// - The presence of a root DIE.
/// - That the root DIE is a unit DIE.
/// - If a unit type is provided, that the unit DIE matches the unit type.
/// - The DIE ranges.
/// - That call site entries are only nested within subprograms with a
/// DW_AT_call attribute.
///
/// \param Unit The DWARF Unit to verify.
///
/// \returns The number of errors that occurred during verification.
unsigned verifyUnitContents(DWARFUnit &Unit,
ReferenceMap &UnitLocalReferences,
ReferenceMap &CrossUnitReferences);
/// Verifies the unit headers and contents in a .debug_info or .debug_types
/// section.
///
/// \param S The DWARF Section to verify.
///
/// \returns The number of errors that occurred during verification.
unsigned verifyUnitSection(const DWARFSection &S);
unsigned verifyUnits(const DWARFUnitVector &Units);
unsigned verifyIndexes(const DWARFObject &DObj);
unsigned verifyIndex(StringRef Name, DWARFSectionKind SectionKind,
StringRef Index);
/// Verifies that a call site entry is nested within a subprogram with a
/// DW_AT_call attribute.
///
/// \returns Number of errors that occurred during verification.
unsigned verifyDebugInfoCallSite(const DWARFDie &Die);
/// Verify that all Die ranges are valid.
///
/// This function currently checks for:
/// - cases in which lowPC >= highPC
///
/// \returns Number of errors that occurred during verification.
unsigned verifyDieRanges(const DWARFDie &Die, DieRangeInfo &ParentRI);
/// Verifies the attribute's DWARF attribute and its value.
///
/// This function currently checks for:
/// - DW_AT_ranges values is a valid .debug_ranges offset
/// - DW_AT_stmt_list is a valid .debug_line offset
///
/// \param Die The DWARF DIE that owns the attribute value
/// \param AttrValue The DWARF attribute value to check
///
/// \returns NumErrors The number of errors occurred during verification of
/// attributes' values in a unit
unsigned verifyDebugInfoAttribute(const DWARFDie &Die,
DWARFAttribute &AttrValue);
/// Verifies the attribute's DWARF form.
///
/// This function currently checks for:
/// - All DW_FORM_ref values that are CU relative have valid CU offsets
/// - All DW_FORM_ref_addr values have valid section offsets
/// - All DW_FORM_strp values have valid .debug_str offsets
///
/// \param Die The DWARF DIE that owns the attribute value
/// \param AttrValue The DWARF attribute value to check
///
/// \returns NumErrors The number of errors occurred during verification of
/// attributes' forms in a unit
unsigned verifyDebugInfoForm(const DWARFDie &Die, DWARFAttribute &AttrValue,
ReferenceMap &UnitLocalReferences,
ReferenceMap &CrossUnitReferences);
/// Verifies the all valid references that were found when iterating through
/// all of the DIE attributes.
///
/// This function will verify that all references point to DIEs whose DIE
/// offset matches. This helps to ensure if a DWARF link phase moved things
/// around, that it doesn't create invalid references by failing to relocate
/// CU relative and absolute references.
///
/// \returns NumErrors The number of errors occurred during verification of
/// references for the .debug_info and .debug_types sections
unsigned verifyDebugInfoReferences(
const ReferenceMap &,
llvm::function_ref<DWARFUnit *(uint64_t)> GetUnitForDieOffset);
/// Verify the DW_AT_stmt_list encoding and value and ensure that no
/// compile units that have the same DW_AT_stmt_list value.
void verifyDebugLineStmtOffsets();
/// Verify that all of the rows in the line table are valid.
///
/// This function currently checks for:
/// - addresses within a sequence that decrease in value
/// - invalid file indexes
void verifyDebugLineRows();
/// Verify that an Apple-style accelerator table is valid.
///
/// This function currently checks that:
/// - The fixed part of the header fits in the section
/// - The size of the section is as large as what the header describes
/// - There is at least one atom
/// - The form for each atom is valid
/// - The tag for each DIE in the table is valid
/// - The buckets have a valid index, or they are empty
/// - Each hashdata offset is valid
/// - Each DIE is valid
///
/// \param AccelSection pointer to the section containing the acceleration table
/// \param StrData pointer to the string section
/// \param SectionName the name of the table we're verifying
///
/// \returns The number of errors occurred during verification
unsigned verifyAppleAccelTable(const DWARFSection *AccelSection,
DataExtractor *StrData,
const char *SectionName);
unsigned verifyDebugNamesCULists(const DWARFDebugNames &AccelTable);
unsigned verifyNameIndexBuckets(const DWARFDebugNames::NameIndex &NI,
const DataExtractor &StrData);
unsigned verifyNameIndexAbbrevs(const DWARFDebugNames::NameIndex &NI);
unsigned verifyNameIndexAttribute(const DWARFDebugNames::NameIndex &NI,
const DWARFDebugNames::Abbrev &Abbr,
DWARFDebugNames::AttributeEncoding AttrEnc);
unsigned verifyNameIndexEntries(const DWARFDebugNames::NameIndex &NI,
const DWARFDebugNames::NameTableEntry &NTE);
unsigned verifyNameIndexCompleteness(const DWARFDie &Die,
const DWARFDebugNames::NameIndex &NI);
/// Verify that the DWARF v5 accelerator table is valid.
///
/// This function currently checks that:
/// - Headers individual Name Indices fit into the section and can be parsed.
/// - Abbreviation tables can be parsed and contain valid index attributes
/// with correct form encodings.
/// - The CU lists reference existing compile units.
/// - The buckets have a valid index, or they are empty.
/// - All names are reachable via the hash table (they have the correct hash,
/// and the hash is in the correct bucket).
/// - Information in the index entries is complete (all required entries are
/// present) and consistent with the debug_info section DIEs.
///
/// \param AccelSection section containing the acceleration table
/// \param StrData string section
///
/// \returns The number of errors occurred during verification
unsigned verifyDebugNames(const DWARFSection &AccelSection,
const DataExtractor &StrData);
public:
DWARFVerifier(raw_ostream &S, DWARFContext &D,
DIDumpOptions DumpOpts = DIDumpOptions::getForSingleDIE());
/// Verify the information in any of the following sections, if available:
/// .debug_abbrev, debug_abbrev.dwo
///
/// Any errors are reported to the stream that was this object was
/// constructed with.
///
/// \returns true if .debug_abbrev and .debug_abbrev.dwo verify successfully,
/// false otherwise.
bool handleDebugAbbrev();
/// Verify the information in the .debug_info and .debug_types sections.
///
/// Any errors are reported to the stream that this object was
/// constructed with.
///
/// \returns true if all sections verify successfully, false otherwise.
bool handleDebugInfo();
/// Verify the information in the .debug_cu_index section.
///
/// Any errors are reported to the stream that was this object was
/// constructed with.
///
/// \returns true if the .debug_cu_index verifies successfully, false
/// otherwise.
bool handleDebugCUIndex();
/// Verify the information in the .debug_tu_index section.
///
/// Any errors are reported to the stream that was this object was
/// constructed with.
///
/// \returns true if the .debug_tu_index verifies successfully, false
/// otherwise.
bool handleDebugTUIndex();
/// Verify the information in the .debug_line section.
///
/// Any errors are reported to the stream that was this object was
/// constructed with.
///
/// \returns true if the .debug_line verifies successfully, false otherwise.
bool handleDebugLine();
/// Verify the information in accelerator tables, if they exist.
///
/// Any errors are reported to the stream that was this object was
/// constructed with.
///
/// \returns true if the existing Apple-style accelerator tables verify
/// successfully, false otherwise.
bool handleAccelTables();
/// Verify the information in the .debug_str_offsets[.dwo].
///
/// Any errors are reported to the stream that was this object was
/// constructed with.
///
/// \returns true if the .debug_line verifies successfully, false otherwise.
bool handleDebugStrOffsets();
bool verifyDebugStrOffsets(
StringRef SectionName, const DWARFSection &Section, StringRef StrData,
void (DWARFObject::*)(function_ref<void(const DWARFSection &)>) const);
};
static inline bool operator<(const DWARFVerifier::DieRangeInfo &LHS,
const DWARFVerifier::DieRangeInfo &RHS) {
return std::tie(LHS.Ranges, LHS.Die) < std::tie(RHS.Ranges, RHS.Die);
}
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DWARF_DWARFVERIFIER_H
PK hwFZ�K�:� � DebugInfo/MSF/MSFCommon.hnu �[��� //===- MSFCommon.h - Common types and functions for MSF files ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_MSF_MSFCOMMON_H
#define LLVM_DEBUGINFO_MSF_MSFCOMMON_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MathExtras.h"
#include <cstdint>
#include <vector>
namespace llvm {
namespace msf {
static const char Magic[] = {'M', 'i', 'c', 'r', 'o', 's', 'o', 'f',
't', ' ', 'C', '/', 'C', '+', '+', ' ',
'M', 'S', 'F', ' ', '7', '.', '0', '0',
'\r', '\n', '\x1a', 'D', 'S', '\0', '\0', '\0'};
// The superblock is overlaid at the beginning of the file (offset 0).
// It starts with a magic header and is followed by information which
// describes the layout of the file system.
struct SuperBlock {
char MagicBytes[sizeof(Magic)];
// The file system is split into a variable number of fixed size elements.
// These elements are referred to as blocks. The size of a block may vary
// from system to system.
support::ulittle32_t BlockSize;
// The index of the free block map.
support::ulittle32_t FreeBlockMapBlock;
// This contains the number of blocks resident in the file system. In
// practice, NumBlocks * BlockSize is equivalent to the size of the MSF
// file.
support::ulittle32_t NumBlocks;
// This contains the number of bytes which make up the directory.
support::ulittle32_t NumDirectoryBytes;
// This field's purpose is not yet known.
support::ulittle32_t Unknown1;
// This contains the block # of the block map.
support::ulittle32_t BlockMapAddr;
};
struct MSFLayout {
MSFLayout() = default;
uint32_t mainFpmBlock() const {
assert(SB->FreeBlockMapBlock == 1 || SB->FreeBlockMapBlock == 2);
return SB->FreeBlockMapBlock;
}
uint32_t alternateFpmBlock() const {
// If mainFpmBlock is 1, this is 2. If mainFpmBlock is 2, this is 1.
return 3U - mainFpmBlock();
}
const SuperBlock *SB = nullptr;
BitVector FreePageMap;
ArrayRef<support::ulittle32_t> DirectoryBlocks;
ArrayRef<support::ulittle32_t> StreamSizes;
std::vector<ArrayRef<support::ulittle32_t>> StreamMap;
};
/// Describes the layout of a stream in an MSF layout. A "stream" here
/// is defined as any logical unit of data which may be arranged inside the MSF
/// file as a sequence of (possibly discontiguous) blocks. When we want to read
/// from a particular MSF Stream, we fill out a stream layout structure and the
/// reader uses it to determine which blocks in the underlying MSF file contain
/// the data, so that it can be pieced together in the right order.
class MSFStreamLayout {
public:
uint32_t Length;
std::vector<support::ulittle32_t> Blocks;
};
/// Determine the layout of the FPM stream, given the MSF layout. An FPM
/// stream spans 1 or more blocks, each at equally spaced intervals throughout
/// the file.
MSFStreamLayout getFpmStreamLayout(const MSFLayout &Msf,
bool IncludeUnusedFpmData = false,
bool AltFpm = false);
inline bool isValidBlockSize(uint32_t Size) {
switch (Size) {
case 512:
case 1024:
case 2048:
case 4096:
case 8192:
case 16384:
case 32768:
return true;
}
return false;
}
/// Given the specified block size, returns the maximum possible file size.
/// Block Size | Max File Size
/// <= 4096 | 4GB
/// 8192 | 8GB
/// 16384 | 16GB
/// 32768 | 32GB
/// \p Size - the block size of the MSF
inline uint64_t getMaxFileSizeFromBlockSize(uint32_t Size) {
switch (Size) {
case 8192:
return (uint64_t)UINT32_MAX * 2ULL;
case 16384:
return (uint64_t)UINT32_MAX * 3ULL;
case 32768:
return (uint64_t)UINT32_MAX * 4ULL;
default:
return (uint64_t)UINT32_MAX;
}
}
// Super Block, Fpm0, Fpm1, and Block Map
inline uint32_t getMinimumBlockCount() { return 4; }
// Super Block, Fpm0, and Fpm1 are reserved. The Block Map, although required
// need not be at block 3.
inline uint32_t getFirstUnreservedBlock() { return 3; }
inline uint64_t bytesToBlocks(uint64_t NumBytes, uint64_t BlockSize) {
return divideCeil(NumBytes, BlockSize);
}
inline uint64_t blockToOffset(uint64_t BlockNumber, uint64_t BlockSize) {
return BlockNumber * BlockSize;
}
inline uint32_t getFpmIntervalLength(const MSFLayout &L) {
return L.SB->BlockSize;
}
/// Given an MSF with the specified block size and number of blocks, determine
/// how many pieces the specified Fpm is split into.
/// \p BlockSize - the block size of the MSF
/// \p NumBlocks - the total number of blocks in the MSF
/// \p IncludeUnusedFpmData - When true, this will count every block that is
/// both in the file and matches the form of an FPM block, even if some of
/// those FPM blocks are unused (a single FPM block can describe the
/// allocation status of up to 32,767 blocks, although one appears only
/// every 4,096 blocks). So there are 8x as many blocks that match the
/// form as there are blocks that are necessary to describe the allocation
/// status of the file. When this parameter is false, these extraneous
/// trailing blocks are not counted.
inline uint32_t getNumFpmIntervals(uint32_t BlockSize, uint32_t NumBlocks,
bool IncludeUnusedFpmData, int FpmNumber) {
assert(FpmNumber == 1 || FpmNumber == 2);
if (IncludeUnusedFpmData) {
// This calculation determines how many times a number of the form
// BlockSize * k + N appears in the range [0, NumBlocks). We only need to
// do this when unused data is included, since the number of blocks dwarfs
// the number of fpm blocks.
return divideCeil(NumBlocks - FpmNumber, BlockSize);
}
// We want the minimum number of intervals required, where each interval can
// represent BlockSize * 8 blocks.
return divideCeil(NumBlocks, 8 * BlockSize);
}
inline uint32_t getNumFpmIntervals(const MSFLayout &L,
bool IncludeUnusedFpmData = false,
bool AltFpm = false) {
return getNumFpmIntervals(L.SB->BlockSize, L.SB->NumBlocks,
IncludeUnusedFpmData,
AltFpm ? L.alternateFpmBlock() : L.mainFpmBlock());
}
Error validateSuperBlock(const SuperBlock &SB);
} // end namespace msf
} // end namespace llvm
#endif // LLVM_DEBUGINFO_MSF_MSFCOMMON_H
PK hwFZ��T�8 8 DebugInfo/MSF/IMSFFile.hnu �[��� //===- IMSFFile.h - Abstract base class for an MSF file ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_MSF_IMSFFILE_H
#define LLVM_DEBUGINFO_MSF_IMSFFILE_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <cstdint>
namespace llvm {
namespace msf {
class IMSFFile {
public:
virtual ~IMSFFile() = default;
virtual uint32_t getBlockSize() const = 0;
virtual uint32_t getBlockCount() const = 0;
virtual uint32_t getNumStreams() const = 0;
virtual uint32_t getStreamByteSize(uint32_t StreamIndex) const = 0;
virtual ArrayRef<support::ulittle32_t>
getStreamBlockList(uint32_t StreamIndex) const = 0;
virtual Expected<ArrayRef<uint8_t>> getBlockData(uint32_t BlockIndex,
uint32_t NumBytes) const = 0;
virtual Error setBlockData(uint32_t BlockIndex, uint32_t Offset,
ArrayRef<uint8_t> Data) const = 0;
};
} // end namespace msf
} // end namespace llvm
#endif // LLVM_DEBUGINFO_MSF_IMSFFILE_H
PK hwFZad%� � DebugInfo/MSF/MSFBuilder.hnu �[��� //===- MSFBuilder.h - MSF Directory & Metadata Builder ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_MSF_MSFBUILDER_H
#define LLVM_DEBUGINFO_MSF_MSFBUILDER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <utility>
#include <vector>
namespace llvm {
class FileBufferByteStream;
namespace msf {
struct MSFLayout;
class MSFBuilder {
public:
/// Create a new `MSFBuilder`.
///
/// \param BlockSize The internal block size used by the PDB file. See
/// isValidBlockSize() for a list of valid block sizes.
///
/// \param MinBlockCount Causes the builder to reserve up front space for
/// at least `MinBlockCount` blocks. This is useful when using `MSFBuilder`
/// to read an existing MSF that you want to write back out later. The
/// original MSF file's SuperBlock contains the exact number of blocks used
/// by the file, so is a good hint as to how many blocks the new MSF file
/// will contain. Furthermore, it is actually necessary in this case. To
/// preserve stability of the file's layout, it is helpful to try to keep
/// all streams mapped to their original block numbers. To ensure that this
/// is possible, space for all blocks must be allocated beforehand so that
/// streams can be assigned to them.
///
/// \param CanGrow If true, any operation which results in an attempt to
/// locate a free block when all available blocks have been exhausted will
/// allocate a new block, thereby growing the size of the final MSF file.
/// When false, any such attempt will result in an error. This is especially
/// useful in testing scenarios when you know your test isn't going to do
/// anything to increase the size of the file, so having an Error returned if
/// it were to happen would catch a programming error
///
/// \returns an llvm::Error representing whether the operation succeeded or
/// failed. Currently the only way this can fail is if an invalid block size
/// is specified, or `MinBlockCount` does not leave enough room for the
/// mandatory reserved blocks required by an MSF file.
static Expected<MSFBuilder> create(BumpPtrAllocator &Allocator,
uint32_t BlockSize,
uint32_t MinBlockCount = 0,
bool CanGrow = true);
/// Request the block map to be at a specific block address. This is useful
/// when editing a MSF and you want the layout to be as stable as possible.
Error setBlockMapAddr(uint32_t Addr);
Error setDirectoryBlocksHint(ArrayRef<uint32_t> DirBlocks);
void setFreePageMap(uint32_t Fpm);
void setUnknown1(uint32_t Unk1);
/// Add a stream to the MSF file with the given size, occupying the given
/// list of blocks. This is useful when reading a MSF file and you want a
/// particular stream to occupy the original set of blocks. If the given
/// blocks are already allocated, or if the number of blocks specified is
/// incorrect for the given stream size, this function will return an Error.
Expected<uint32_t> addStream(uint32_t Size, ArrayRef<uint32_t> Blocks);
/// Add a stream to the MSF file with the given size, occupying any available
/// blocks that the builder decides to use. This is useful when building a
/// new PDB file from scratch and you don't care what blocks a stream occupies
/// but you just want it to work.
Expected<uint32_t> addStream(uint32_t Size);
/// Update the size of an existing stream. This will allocate or deallocate
/// blocks as needed to match the requested size. This can fail if `CanGrow`
/// was set to false when initializing the `MSFBuilder`.
Error setStreamSize(uint32_t Idx, uint32_t Size);
/// Get the total number of streams in the MSF layout. This should return 1
/// for every call to `addStream`.
uint32_t getNumStreams() const;
/// Get the size of a stream by index.
uint32_t getStreamSize(uint32_t StreamIdx) const;
/// Get the list of blocks allocated to a particular stream.
ArrayRef<uint32_t> getStreamBlocks(uint32_t StreamIdx) const;
/// Get the total number of blocks that will be allocated to actual data in
/// this MSF file.
uint32_t getNumUsedBlocks() const;
/// Get the total number of blocks that exist in the MSF file but are not
/// allocated to any valid data.
uint32_t getNumFreeBlocks() const;
/// Get the total number of blocks in the MSF file. In practice this is equal
/// to `getNumUsedBlocks() + getNumFreeBlocks()`.
uint32_t getTotalBlockCount() const;
/// Check whether a particular block is allocated or free.
bool isBlockFree(uint32_t Idx) const;
/// Finalize the layout and build the headers and structures that describe the
/// MSF layout and can be written directly to the MSF file.
Expected<MSFLayout> generateLayout();
/// Write the MSF layout to the underlying file.
Expected<FileBufferByteStream> commit(StringRef Path, MSFLayout &Layout);
BumpPtrAllocator &getAllocator() { return Allocator; }
private:
MSFBuilder(uint32_t BlockSize, uint32_t MinBlockCount, bool CanGrow,
BumpPtrAllocator &Allocator);
Error allocateBlocks(uint32_t NumBlocks, MutableArrayRef<uint32_t> Blocks);
uint32_t computeDirectoryByteSize() const;
using BlockList = std::vector<uint32_t>;
BumpPtrAllocator &Allocator;
bool IsGrowable;
uint32_t FreePageMap;
uint32_t Unknown1 = 0;
uint32_t BlockSize;
uint32_t BlockMapAddr;
BitVector FreeBlocks;
std::vector<uint32_t> DirectoryBlocks;
std::vector<std::pair<uint32_t, BlockList>> StreamData;
};
} // end namespace msf
} // end namespace llvm
#endif // LLVM_DEBUGINFO_MSF_MSFBUILDER_H
PK hwFZ5o�� � DebugInfo/MSF/MSFError.hnu �[��� //===- MSFError.h - Error extensions for MSF Files --------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_MSF_MSFERROR_H
#define LLVM_DEBUGINFO_MSF_MSFERROR_H
#include "llvm/Support/Error.h"
namespace llvm {
namespace msf {
enum class msf_error_code {
unspecified = 1,
insufficient_buffer,
not_writable,
no_stream,
invalid_format,
block_in_use,
size_overflow_4096,
size_overflow_8192,
size_overflow_16384,
size_overflow_32768,
stream_directory_overflow,
};
} // namespace msf
} // namespace llvm
namespace std {
template <>
struct is_error_code_enum<llvm::msf::msf_error_code> : std::true_type {};
} // namespace std
namespace llvm {
namespace msf {
const std::error_category &MSFErrCategory();
inline std::error_code make_error_code(msf_error_code E) {
return std::error_code(static_cast<int>(E), MSFErrCategory());
}
/// Base class for errors originating when parsing raw PDB files
class MSFError : public ErrorInfo<MSFError, StringError> {
public:
using ErrorInfo<MSFError, StringError>::ErrorInfo; // inherit constructors
MSFError(const Twine &S) : ErrorInfo(S, msf_error_code::unspecified) {}
bool isPageOverflow() const {
switch (static_cast<msf_error_code>(convertToErrorCode().value())) {
case msf_error_code::unspecified:
case msf_error_code::insufficient_buffer:
case msf_error_code::not_writable:
case msf_error_code::no_stream:
case msf_error_code::invalid_format:
case msf_error_code::block_in_use:
return false;
case msf_error_code::size_overflow_4096:
case msf_error_code::size_overflow_8192:
case msf_error_code::size_overflow_16384:
case msf_error_code::size_overflow_32768:
case msf_error_code::stream_directory_overflow:
return true;
}
llvm_unreachable("msf error code not implemented");
}
static char ID;
};
} // namespace msf
} // namespace llvm
#endif // LLVM_DEBUGINFO_MSF_MSFERROR_H
PK hwFZ��[ � � ! DebugInfo/MSF/MappedBlockStream.hnu �[��� //==- MappedBlockStream.h - Discontiguous stream data in an MSF --*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_MSF_MAPPEDBLOCKSTREAM_H
#define LLVM_DEBUGINFO_MSF_MAPPEDBLOCKSTREAM_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/DebugInfo/MSF/MSFCommon.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/BinaryStream.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <memory>
#include <vector>
namespace llvm {
namespace msf {
/// MappedBlockStream represents data stored in an MSF file into chunks of a
/// particular size (called the Block Size), and whose chunks may not be
/// necessarily contiguous. The arrangement of these chunks MSF the file
/// is described by some other metadata contained within the MSF file. In
/// the case of a standard MSF Stream, the layout of the stream's blocks
/// is described by the MSF "directory", but in the case of the directory
/// itself, the layout is described by an array at a fixed location within
/// the MSF. MappedBlockStream provides methods for reading from and writing
/// to one of these streams transparently, as if it were a contiguous sequence
/// of bytes.
class MappedBlockStream : public BinaryStream {
friend class WritableMappedBlockStream;
public:
static std::unique_ptr<MappedBlockStream>
createStream(uint32_t BlockSize, const MSFStreamLayout &Layout,
BinaryStreamRef MsfData, BumpPtrAllocator &Allocator);
static std::unique_ptr<MappedBlockStream>
createIndexedStream(const MSFLayout &Layout, BinaryStreamRef MsfData,
uint32_t StreamIndex, BumpPtrAllocator &Allocator);
static std::unique_ptr<MappedBlockStream>
createFpmStream(const MSFLayout &Layout, BinaryStreamRef MsfData,
BumpPtrAllocator &Allocator);
static std::unique_ptr<MappedBlockStream>
createDirectoryStream(const MSFLayout &Layout, BinaryStreamRef MsfData,
BumpPtrAllocator &Allocator);
support::endianness getEndian() const override {
return support::little;
}
Error readBytes(uint64_t Offset, uint64_t Size,
ArrayRef<uint8_t> &Buffer) override;
Error readLongestContiguousChunk(uint64_t Offset,
ArrayRef<uint8_t> &Buffer) override;
uint64_t getLength() override;
BumpPtrAllocator &getAllocator() { return Allocator; }
void invalidateCache();
uint32_t getBlockSize() const { return BlockSize; }
uint32_t getNumBlocks() const { return StreamLayout.Blocks.size(); }
uint32_t getStreamLength() const { return StreamLayout.Length; }
protected:
MappedBlockStream(uint32_t BlockSize, const MSFStreamLayout &StreamLayout,
BinaryStreamRef MsfData, BumpPtrAllocator &Allocator);
private:
const MSFStreamLayout &getStreamLayout() const { return StreamLayout; }
void fixCacheAfterWrite(uint64_t Offset, ArrayRef<uint8_t> Data) const;
Error readBytes(uint64_t Offset, MutableArrayRef<uint8_t> Buffer);
bool tryReadContiguously(uint64_t Offset, uint64_t Size,
ArrayRef<uint8_t> &Buffer);
const uint32_t BlockSize;
const MSFStreamLayout StreamLayout;
BinaryStreamRef MsfData;
using CacheEntry = MutableArrayRef<uint8_t>;
// We just store the allocator by reference. We use this to allocate
// contiguous memory for things like arrays or strings that cross a block
// boundary, and this memory is expected to outlive the stream. For example,
// someone could create a stream, read some stuff, then close the stream, and
// we would like outstanding references to fields to remain valid since the
// entire file is mapped anyway. Because of that, the user must supply the
// allocator to allocate broken records from.
BumpPtrAllocator &Allocator;
DenseMap<uint32_t, std::vector<CacheEntry>> CacheMap;
};
class WritableMappedBlockStream : public WritableBinaryStream {
public:
static std::unique_ptr<WritableMappedBlockStream>
createStream(uint32_t BlockSize, const MSFStreamLayout &Layout,
WritableBinaryStreamRef MsfData, BumpPtrAllocator &Allocator);
static std::unique_ptr<WritableMappedBlockStream>
createIndexedStream(const MSFLayout &Layout, WritableBinaryStreamRef MsfData,
uint32_t StreamIndex, BumpPtrAllocator &Allocator);
static std::unique_ptr<WritableMappedBlockStream>
createDirectoryStream(const MSFLayout &Layout,
WritableBinaryStreamRef MsfData,
BumpPtrAllocator &Allocator);
static std::unique_ptr<WritableMappedBlockStream>
createFpmStream(const MSFLayout &Layout, WritableBinaryStreamRef MsfData,
BumpPtrAllocator &Allocator, bool AltFpm = false);
support::endianness getEndian() const override {
return support::little;
}
Error readBytes(uint64_t Offset, uint64_t Size,
ArrayRef<uint8_t> &Buffer) override;
Error readLongestContiguousChunk(uint64_t Offset,
ArrayRef<uint8_t> &Buffer) override;
uint64_t getLength() override;
Error writeBytes(uint64_t Offset, ArrayRef<uint8_t> Buffer) override;
Error commit() override;
const MSFStreamLayout &getStreamLayout() const {
return ReadInterface.getStreamLayout();
}
uint32_t getBlockSize() const { return ReadInterface.getBlockSize(); }
uint32_t getNumBlocks() const { return ReadInterface.getNumBlocks(); }
uint32_t getStreamLength() const { return ReadInterface.getStreamLength(); }
protected:
WritableMappedBlockStream(uint32_t BlockSize,
const MSFStreamLayout &StreamLayout,
WritableBinaryStreamRef MsfData,
BumpPtrAllocator &Allocator);
private:
MappedBlockStream ReadInterface;
WritableBinaryStreamRef WriteInterface;
};
} // namespace msf
} // end namespace llvm
#endif // LLVM_DEBUGINFO_MSF_MAPPEDBLOCKSTREAM_H
PK hwFZ�/F`{/ {/ DebugInfo/GSYM/GsymReader.hnu �[��� //===- GsymReader.h ---------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_GSYM_GSYMREADER_H
#define LLVM_DEBUGINFO_GSYM_GSYMREADER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/DebugInfo/GSYM/FileEntry.h"
#include "llvm/DebugInfo/GSYM/FunctionInfo.h"
#include "llvm/DebugInfo/GSYM/Header.h"
#include "llvm/DebugInfo/GSYM/LineEntry.h"
#include "llvm/DebugInfo/GSYM/StringTable.h"
#include "llvm/Support/DataExtractor.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/ErrorOr.h"
#include <inttypes.h>
#include <memory>
#include <stdint.h>
#include <vector>
namespace llvm {
class MemoryBuffer;
class raw_ostream;
namespace gsym {
/// GsymReader is used to read GSYM data from a file or buffer.
///
/// This class is optimized for very quick lookups when the endianness matches
/// the host system. The Header, address table, address info offsets, and file
/// table is designed to be mmap'ed as read only into memory and used without
/// any parsing needed. If the endianness doesn't match, we swap these objects
/// and tables into GsymReader::SwappedData and then point our header and
/// ArrayRefs to this swapped internal data.
///
/// GsymReader objects must use one of the static functions to create an
/// instance: GsymReader::openFile(...) and GsymReader::copyBuffer(...).
class GsymReader {
GsymReader(std::unique_ptr<MemoryBuffer> Buffer);
llvm::Error parse();
std::unique_ptr<MemoryBuffer> MemBuffer;
StringRef GsymBytes;
llvm::support::endianness Endian;
const Header *Hdr = nullptr;
ArrayRef<uint8_t> AddrOffsets;
ArrayRef<uint32_t> AddrInfoOffsets;
ArrayRef<FileEntry> Files;
StringTable StrTab;
/// When the GSYM file's endianness doesn't match the host system then
/// we must decode all data structures that need to be swapped into
/// local storage and set point the ArrayRef objects above to these swapped
/// copies.
struct SwappedData {
Header Hdr;
std::vector<uint8_t> AddrOffsets;
std::vector<uint32_t> AddrInfoOffsets;
std::vector<FileEntry> Files;
};
std::unique_ptr<SwappedData> Swap;
public:
GsymReader(GsymReader &&RHS);
~GsymReader();
/// Construct a GsymReader from a file on disk.
///
/// \param Path The file path the GSYM file to read.
/// \returns An expected GsymReader that contains the object or an error
/// object that indicates reason for failing to read the GSYM.
static llvm::Expected<GsymReader> openFile(StringRef Path);
/// Construct a GsymReader from a buffer.
///
/// \param Bytes A set of bytes that will be copied and owned by the
/// returned object on success.
/// \returns An expected GsymReader that contains the object or an error
/// object that indicates reason for failing to read the GSYM.
static llvm::Expected<GsymReader> copyBuffer(StringRef Bytes);
/// Access the GSYM header.
/// \returns A native endian version of the GSYM header.
const Header &getHeader() const;
/// Get the full function info for an address.
///
/// This should be called when a client will store a copy of the complete
/// FunctionInfo for a given address. For one off lookups, use the lookup()
/// function below.
///
/// Symbolication server processes might want to parse the entire function
/// info for a given address and cache it if the process stays around to
/// service many symbolication addresses, like for parsing profiling
/// information.
///
/// \param Addr A virtual address from the orignal object file to lookup.
///
/// \returns An expected FunctionInfo that contains the function info object
/// or an error object that indicates reason for failing to lookup the
/// address.
llvm::Expected<FunctionInfo> getFunctionInfo(uint64_t Addr) const;
/// Lookup an address in the a GSYM.
///
/// Lookup just the information needed for a specific address \a Addr. This
/// function is faster that calling getFunctionInfo() as it will only return
/// information that pertains to \a Addr and allows the parsing to skip any
/// extra information encoded for other addresses. For example the line table
/// parsing can stop when a matching LineEntry has been fouhnd, and the
/// InlineInfo can stop parsing early once a match has been found and also
/// skip information that doesn't match. This avoids memory allocations and
/// is much faster for lookups.
///
/// \param Addr A virtual address from the orignal object file to lookup.
/// \returns An expected LookupResult that contains only the information
/// needed for the current address, or an error object that indicates reason
/// for failing to lookup the address.
llvm::Expected<LookupResult> lookup(uint64_t Addr) const;
/// Get a string from the string table.
///
/// \param Offset The string table offset for the string to retrieve.
/// \returns The string from the strin table.
StringRef getString(uint32_t Offset) const { return StrTab[Offset]; }
/// Get the a file entry for the suppplied file index.
///
/// Used to convert any file indexes in the FunctionInfo data back into
/// files. This function can be used for iteration, but is more commonly used
/// for random access when doing lookups.
///
/// \param Index An index into the file table.
/// \returns An optional FileInfo that will be valid if the file index is
/// valid, or std::nullopt if the file index is out of bounds,
std::optional<FileEntry> getFile(uint32_t Index) const {
if (Index < Files.size())
return Files[Index];
return std::nullopt;
}
/// Dump the entire Gsym data contained in this object.
///
/// \param OS The output stream to dump to.
void dump(raw_ostream &OS);
/// Dump a FunctionInfo object.
///
/// This function will convert any string table indexes and file indexes
/// into human readable format.
///
/// \param OS The output stream to dump to.
///
/// \param FI The object to dump.
void dump(raw_ostream &OS, const FunctionInfo &FI);
/// Dump a LineTable object.
///
/// This function will convert any string table indexes and file indexes
/// into human readable format.
///
///
/// \param OS The output stream to dump to.
///
/// \param LT The object to dump.
void dump(raw_ostream &OS, const LineTable <);
/// Dump a InlineInfo object.
///
/// This function will convert any string table indexes and file indexes
/// into human readable format.
///
/// \param OS The output stream to dump to.
///
/// \param II The object to dump.
///
/// \param Indent The indentation as number of spaces. Used for recurive
/// dumping.
void dump(raw_ostream &OS, const InlineInfo &II, uint32_t Indent = 0);
/// Dump a FileEntry object.
///
/// This function will convert any string table indexes into human readable
/// format.
///
/// \param OS The output stream to dump to.
///
/// \param FE The object to dump.
void dump(raw_ostream &OS, std::optional<FileEntry> FE);
/// Get the number of addresses in this Gsym file.
uint32_t getNumAddresses() const {
return Hdr->NumAddresses;
}
/// Gets an address from the address table.
///
/// Addresses are stored as offsets frrom the gsym::Header::BaseAddress.
///
/// \param Index A index into the address table.
/// \returns A resolved virtual address for adddress in the address table
/// or std::nullopt if Index is out of bounds.
std::optional<uint64_t> getAddress(size_t Index) const;
protected:
/// Get an appropriate address info offsets array.
///
/// The address table in the GSYM file is stored as array of 1, 2, 4 or 8
/// byte offsets from the The gsym::Header::BaseAddress. The table is stored
/// internally as a array of bytes that are in the correct endianness. When
/// we access this table we must get an array that matches those sizes. This
/// templatized helper function is used when accessing address offsets in the
/// AddrOffsets member variable.
///
/// \returns An ArrayRef of an appropriate address offset size.
template <class T> ArrayRef<T>
getAddrOffsets() const {
return ArrayRef<T>(reinterpret_cast<const T *>(AddrOffsets.data()),
AddrOffsets.size()/sizeof(T));
}
/// Get an appropriate address from the address table.
///
/// The address table in the GSYM file is stored as array of 1, 2, 4 or 8
/// byte address offsets from the The gsym::Header::BaseAddress. The table is
/// stored internally as a array of bytes that are in the correct endianness.
/// In order to extract an address from the address table we must access the
/// address offset using the correct size and then add it to the BaseAddress
/// in the header.
///
/// \param Index An index into the AddrOffsets array.
/// \returns An virtual address that matches the original object file for the
/// address as the specified index, or std::nullopt if Index is out of bounds.
template <class T>
std::optional<uint64_t> addressForIndex(size_t Index) const {
ArrayRef<T> AIO = getAddrOffsets<T>();
if (Index < AIO.size())
return AIO[Index] + Hdr->BaseAddress;
return std::nullopt;
}
/// Lookup an address offset in the AddrOffsets table.
///
/// Given an address offset, look it up using a binary search of the
/// AddrOffsets table.
///
/// \param AddrOffset An address offset, that has already been computed by
/// subtracting the gsym::Header::BaseAddress.
/// \returns The matching address offset index. This index will be used to
/// extract the FunctionInfo data's offset from the AddrInfoOffsets array.
template <class T>
std::optional<uint64_t>
getAddressOffsetIndex(const uint64_t AddrOffset) const {
ArrayRef<T> AIO = getAddrOffsets<T>();
const auto Begin = AIO.begin();
const auto End = AIO.end();
auto Iter = std::lower_bound(Begin, End, AddrOffset);
// Watch for addresses that fall between the gsym::Header::BaseAddress and
// the first address offset.
if (Iter == Begin && AddrOffset < *Begin)
return std::nullopt;
if (Iter == End || AddrOffset < *Iter)
--Iter;
return std::distance(Begin, Iter);
}
/// Create a GSYM from a memory buffer.
///
/// Called by both openFile() and copyBuffer(), this function does all of the
/// work of parsing the GSYM file and returning an error.
///
/// \param MemBuffer A memory buffer that will transfer ownership into the
/// GsymReader.
/// \returns An expected GsymReader that contains the object or an error
/// object that indicates reason for failing to read the GSYM.
static llvm::Expected<llvm::gsym::GsymReader>
create(std::unique_ptr<MemoryBuffer> &MemBuffer);
/// Given an address, find the address index.
///
/// Binary search the address table and find the matching address index.
///
/// \param Addr A virtual address that matches the original object file
/// to lookup.
/// \returns An index into the address table. This index can be used to
/// extract the FunctionInfo data's offset from the AddrInfoOffsets array.
/// Returns an error if the address isn't in the GSYM with details of why.
Expected<uint64_t> getAddressIndex(const uint64_t Addr) const;
/// Given an address index, get the offset for the FunctionInfo.
///
/// Looking up an address is done by finding the corresponding address
/// index for the address. This index is then used to get the offset of the
/// FunctionInfo data that we will decode using this function.
///
/// \param Index An index into the address table.
/// \returns An optional GSYM data offset for the offset of the FunctionInfo
/// that needs to be decoded.
std::optional<uint64_t> getAddressInfoOffset(size_t Index) const;
};
} // namespace gsym
} // namespace llvm
#endif // LLVM_DEBUGINFO_GSYM_GSYMREADER_H
PK hwFZ.F(�' ' DebugInfo/GSYM/Header.hnu �[��� //===- Header.h -------------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_GSYM_HEADER_H
#define LLVM_DEBUGINFO_GSYM_HEADER_H
#include "llvm/Support/Error.h"
#include <cstddef>
#include <cstdint>
namespace llvm {
class raw_ostream;
class DataExtractor;
namespace gsym {
class FileWriter;
constexpr uint32_t GSYM_MAGIC = 0x4753594d; // 'GSYM'
constexpr uint32_t GSYM_CIGAM = 0x4d595347; // 'MYSG'
constexpr uint32_t GSYM_VERSION = 1;
constexpr size_t GSYM_MAX_UUID_SIZE = 20;
/// The GSYM header.
///
/// The GSYM header is found at the start of a stand alone GSYM file, or as
/// the first bytes in a section when GSYM is contained in a section of an
/// executable file (ELF, mach-o, COFF).
///
/// The structure is encoded exactly as it appears in the structure definition
/// with no gaps between members. Alignment should not change from system to
/// system as the members were laid out so that they shouldn't align
/// differently on different architectures.
///
/// When endianness of the system loading a GSYM file matches, the file can
/// be mmap'ed in and a pointer to the header can be cast to the first bytes
/// of the file (stand alone GSYM file) or section data (GSYM in a section).
/// When endianness is swapped, the Header::decode() function should be used to
/// decode the header.
struct Header {
/// The magic bytes should be set to GSYM_MAGIC. This helps detect if a file
/// is a GSYM file by scanning the first 4 bytes of a file or section.
/// This value might appear byte swapped
uint32_t Magic;
/// The version can number determines how the header is decoded and how each
/// InfoType in FunctionInfo is encoded/decoded. As version numbers increase,
/// "Magic" and "Version" members should always appear at offset zero and 4
/// respectively to ensure clients figure out if they can parse the format.
uint16_t Version;
/// The size in bytes of each address offset in the address offsets table.
uint8_t AddrOffSize;
/// The size in bytes of the UUID encoded in the "UUID" member.
uint8_t UUIDSize;
/// The 64 bit base address that all address offsets in the address offsets
/// table are relative to. Storing a full 64 bit address allows our address
/// offsets table to be smaller on disk.
uint64_t BaseAddress;
/// The number of addresses stored in the address offsets table.
uint32_t NumAddresses;
/// The file relative offset of the start of the string table for strings
/// contained in the GSYM file. If the GSYM in contained in a stand alone
/// file this will be the file offset of the start of the string table. If
/// the GSYM is contained in a section within an executable file, this can
/// be the offset of the first string used in the GSYM file and can possibly
/// span one or more executable string tables. This allows the strings to
/// share string tables in an ELF or mach-o file.
uint32_t StrtabOffset;
/// The size in bytes of the string table. For a stand alone GSYM file, this
/// will be the exact size in bytes of the string table. When the GSYM data
/// is in a section within an executable file, this size can span one or more
/// sections that contains strings. This allows any strings that are already
/// stored in the executable file to be re-used, and any extra strings could
/// be added to another string table and the string table offset and size
/// can be set to span all needed string tables.
uint32_t StrtabSize;
/// The UUID of the original executable file. This is stored to allow
/// matching a GSYM file to an executable file when symbolication is
/// required. Only the first "UUIDSize" bytes of the UUID are valid. Any
/// bytes in the UUID value that appear after the first UUIDSize bytes should
/// be set to zero.
uint8_t UUID[GSYM_MAX_UUID_SIZE];
/// Check if a header is valid and return an error if anything is wrong.
///
/// This function can be used prior to encoding a header to ensure it is
/// valid, or after decoding a header to ensure it is valid and supported.
///
/// Check a correctly byte swapped header for errors:
/// - check magic value
/// - check that version number is supported
/// - check that the address offset size is supported
/// - check that the UUID size is valid
///
/// \returns An error if anything is wrong in the header, or Error::success()
/// if there are no errors.
llvm::Error checkForError() const;
/// Decode an object from a binary data stream.
///
/// \param Data The binary stream to read the data from. This object must
/// have the data for the object starting at offset zero. The data
/// can contain more data than needed.
///
/// \returns A Header or an error describing the issue that was
/// encountered during decoding.
static llvm::Expected<Header> decode(DataExtractor &Data);
/// Encode this object into FileWriter stream.
///
/// \param O The binary stream to write the data to at the current file
/// position.
///
/// \returns An error object that indicates success or failure of the
/// encoding process.
llvm::Error encode(FileWriter &O) const;
};
bool operator==(const Header &LHS, const Header &RHS);
raw_ostream &operator<<(raw_ostream &OS, const llvm::gsym::Header &H);
} // namespace gsym
} // namespace llvm
#endif // LLVM_DEBUGINFO_GSYM_HEADER_H
PK hwFZ2
8)4R 4R DebugInfo/GSYM/GsymCreator.hnu �[��� //===- GsymCreator.h --------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_GSYM_GSYMCREATOR_H
#define LLVM_DEBUGINFO_GSYM_GSYMCREATOR_H
#include <functional>
#include <memory>
#include <mutex>
#include <thread>
#include "llvm/ADT/AddressRanges.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringSet.h"
#include "llvm/DebugInfo/GSYM/FileEntry.h"
#include "llvm/DebugInfo/GSYM/FunctionInfo.h"
#include "llvm/MC/StringTableBuilder.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/Path.h"
namespace llvm {
namespace gsym {
class FileWriter;
/// GsymCreator is used to emit GSYM data to a stand alone file or section
/// within a file.
///
/// The GsymCreator is designed to be used in 3 stages:
/// - Create FunctionInfo objects and add them
/// - Finalize the GsymCreator object
/// - Save to file or section
///
/// The first stage involves creating FunctionInfo objects from another source
/// of information like compiler debug info metadata, DWARF or Breakpad files.
/// Any strings in the FunctionInfo or contained information, like InlineInfo
/// or LineTable objects, should get the string table offsets by calling
/// GsymCreator::insertString(...). Any file indexes that are needed should be
/// obtained by calling GsymCreator::insertFile(...). All of the function calls
/// in GsymCreator are thread safe. This allows multiple threads to create and
/// add FunctionInfo objects while parsing debug information.
///
/// Once all of the FunctionInfo objects have been added, the
/// GsymCreator::finalize(...) must be called prior to saving. This function
/// will sort the FunctionInfo objects, finalize the string table, and do any
/// other passes on the information needed to prepare the information to be
/// saved.
///
/// Once the object has been finalized, it can be saved to a file or section.
///
/// ENCODING
///
/// GSYM files are designed to be memory mapped into a process as shared, read
/// only data, and used as is.
///
/// The GSYM file format when in a stand alone file consists of:
/// - Header
/// - Address Table
/// - Function Info Offsets
/// - File Table
/// - String Table
/// - Function Info Data
///
/// HEADER
///
/// The header is fully described in "llvm/DebugInfo/GSYM/Header.h".
///
/// ADDRESS TABLE
///
/// The address table immediately follows the header in the file and consists
/// of Header.NumAddresses address offsets. These offsets are sorted and can be
/// binary searched for efficient lookups. Addresses in the address table are
/// stored as offsets from a 64 bit base address found in Header.BaseAddress.
/// This allows the address table to contain 8, 16, or 32 offsets. This allows
/// the address table to not require full 64 bit addresses for each address.
/// The resulting GSYM size is smaller and causes fewer pages to be touched
/// during address lookups when the address table is smaller. The size of the
/// address offsets in the address table is specified in the header in
/// Header.AddrOffSize. The first offset in the address table is aligned to
/// Header.AddrOffSize alignment to ensure efficient access when loaded into
/// memory.
///
/// FUNCTION INFO OFFSETS TABLE
///
/// The function info offsets table immediately follows the address table and
/// consists of Header.NumAddresses 32 bit file offsets: one for each address
/// in the address table. This data is aligned to a 4 byte boundary. The
/// offsets in this table are the relative offsets from the start offset of the
/// GSYM header and point to the function info data for each address in the
/// address table. Keeping this data separate from the address table helps to
/// reduce the number of pages that are touched when address lookups occur on a
/// GSYM file.
///
/// FILE TABLE
///
/// The file table immediately follows the function info offsets table. The
/// encoding of the FileTable is:
///
/// struct FileTable {
/// uint32_t Count;
/// FileEntry Files[];
/// };
///
/// The file table starts with a 32 bit count of the number of files that are
/// used in all of the function info, followed by that number of FileEntry
/// structures. The file table is aligned to a 4 byte boundary, Each file in
/// the file table is represented with a FileEntry structure.
/// See "llvm/DebugInfo/GSYM/FileEntry.h" for details.
///
/// STRING TABLE
///
/// The string table follows the file table in stand alone GSYM files and
/// contains all strings for everything contained in the GSYM file. Any string
/// data should be added to the string table and any references to strings
/// inside GSYM information must be stored as 32 bit string table offsets into
/// this string table. The string table always starts with an empty string at
/// offset zero and is followed by any strings needed by the GSYM information.
/// The start of the string table is not aligned to any boundary.
///
/// FUNCTION INFO DATA
///
/// The function info data is the payload that contains information about the
/// address that is being looked up. It contains all of the encoded
/// FunctionInfo objects. Each encoded FunctionInfo's data is pointed to by an
/// entry in the Function Info Offsets Table. For details on the exact encoding
/// of FunctionInfo objects, see "llvm/DebugInfo/GSYM/FunctionInfo.h".
class GsymCreator {
// Private member variables require Mutex protections
mutable std::mutex Mutex;
std::vector<FunctionInfo> Funcs;
StringTableBuilder StrTab;
StringSet<> StringStorage;
DenseMap<llvm::gsym::FileEntry, uint32_t> FileEntryToIndex;
// Needed for mapping string offsets back to the string stored in \a StrTab.
DenseMap<uint64_t, CachedHashStringRef> StringOffsetMap;
std::vector<llvm::gsym::FileEntry> Files;
std::vector<uint8_t> UUID;
std::optional<AddressRanges> ValidTextRanges;
AddressRanges Ranges;
std::optional<uint64_t> BaseAddress;
bool Finalized = false;
bool Quiet;
/// Get the first function start address.
///
/// \returns The start address of the first FunctionInfo or std::nullopt if
/// there are no function infos.
std::optional<uint64_t> getFirstFunctionAddress() const;
/// Get the last function address.
///
/// \returns The start address of the last FunctionInfo or std::nullopt if
/// there are no function infos.
std::optional<uint64_t> getLastFunctionAddress() const;
/// Get the base address to use for this GSYM file.
///
/// \returns The base address to put into the header and to use when creating
/// the address offset table or std::nullpt if there are no valid
/// function infos or if the base address wasn't specified.
std::optional<uint64_t> getBaseAddress() const;
/// Get the size of an address offset in the address offset table.
///
/// GSYM files store offsets from the base address in the address offset table
/// and we store the size of the address offsets in the GSYM header. This
/// function will calculate the size in bytes of these address offsets based
/// on the current contents of the GSYM file.
///
/// \returns The size in byets of the address offsets.
uint8_t getAddressOffsetSize() const;
/// Get the maximum address offset for the current address offset size.
///
/// This is used when creating the address offset table to ensure we have
/// values that are in range so we don't end up truncating address offsets
/// when creating GSYM files as the code evolves.
///
/// \returns The maximum address offset value that will be encoded into a GSYM
/// file.
uint64_t getMaxAddressOffset() const;
/// Calculate the byte size of the GSYM header and tables sizes.
///
/// This function will calculate the exact size in bytes of the encocded GSYM
/// for the following items:
/// - The GSYM header
/// - The Address offset table
/// - The Address info offset table
/// - The file table
/// - The string table
///
/// This is used to help split GSYM files into segments.
///
/// \returns Size in bytes the GSYM header and tables.
uint64_t calculateHeaderAndTableSize() const;
/// Copy a FunctionInfo from the \a SrcGC GSYM creator into this creator.
///
/// Copy the function info and only the needed files and strings and add a
/// converted FunctionInfo into this object. This is used to segment GSYM
/// files into separate files while only transferring the files and strings
/// that are needed from \a SrcGC.
///
/// \param SrcGC The source gsym creator to copy from.
/// \param FuncInfoIdx The function info index within \a SrcGC to copy.
/// \returns The number of bytes it will take to encode the function info in
/// this GsymCreator. This helps calculate the size of the current GSYM
/// segment file.
uint64_t copyFunctionInfo(const GsymCreator &SrcGC, size_t FuncInfoIdx);
/// Copy a string from \a SrcGC into this object.
///
/// Copy a string from \a SrcGC by string table offset into this GSYM creator.
/// If a string has already been copied, the uniqued string table offset will
/// be returned, otherwise the string will be copied and a unique offset will
/// be returned.
///
/// \param SrcGC The source gsym creator to copy from.
/// \param StrOff The string table offset from \a SrcGC to copy.
/// \returns The new string table offset of the string within this object.
uint32_t copyString(const GsymCreator &SrcGC, uint32_t StrOff);
/// Copy a file from \a SrcGC into this object.
///
/// Copy a file from \a SrcGC by file index into this GSYM creator. Files
/// consist of two string table entries, one for the directory and one for the
/// filename, this function will copy any needed strings ensure the file is
/// uniqued within this object. If a file already exists in this GSYM creator
/// the uniqued index will be returned, else the stirngs will be copied and
/// the new file index will be returned.
///
/// \param SrcGC The source gsym creator to copy from.
/// \param FileIdx The 1 based file table index within \a SrcGC to copy. A
/// file index of zero will always return zero as the zero is a reserved file
/// index that means no file.
/// \returns The new file index of the file within this object.
uint32_t copyFile(const GsymCreator &SrcGC, uint32_t FileIdx);
/// Inserts a FileEntry into the file table.
///
/// This is used to insert a file entry in a thread safe way into this object.
///
/// \param FE A file entry object that contains valid string table offsets
/// from this object already.
uint32_t insertFileEntry(FileEntry FE);
/// Fixup any string and file references by updating any file indexes and
/// strings offsets in the InlineInfo parameter.
///
/// When copying InlineInfo entries, we can simply make a copy of the object
/// and then fixup the files and strings for efficiency.
///
/// \param SrcGC The source gsym creator to copy from.
/// \param II The inline info that contains file indexes and string offsets
/// that come from \a SrcGC. The entries will be updated by coping any files
/// and strings over into this object.
void fixupInlineInfo(const GsymCreator &SrcGC, InlineInfo &II);
/// Save this GSYM file into segments that are roughly \a SegmentSize in size.
///
/// When segemented GSYM files are saved to disk, they will use \a Path as a
/// prefix and then have the first function info address appended to the path
/// when each segment is saved. Each segmented GSYM file has a only the
/// strings and files that are needed to save the function infos that are in
/// each segment. These smaller files are easy to compress and download
/// separately and allow for efficient lookups with very large GSYM files and
/// segmenting them allows servers to download only the segments that are
/// needed.
///
/// \param Path The path prefix to use when saving the GSYM files.
/// \param ByteOrder The endianness to use when saving the file.
/// \param SegmentSize The size in bytes to segment the GSYM file into.
llvm::Error saveSegments(StringRef Path,
llvm::support::endianness ByteOrder,
uint64_t SegmentSize) const;
public:
GsymCreator(bool Quiet = false);
/// Save a GSYM file to a stand alone file.
///
/// \param Path The file path to save the GSYM file to.
/// \param ByteOrder The endianness to use when saving the file.
/// \param SegmentSize The size in bytes to segment the GSYM file into. If
/// this option is set this function will create N segments
/// that are all around \a SegmentSize bytes in size. This
/// allows a very large GSYM file to be broken up into
/// shards. Each GSYM file will have its own file table,
/// and string table that only have the files and strings
/// needed for the shared. If this argument has no value,
/// a single GSYM file that contains all function
/// information will be created.
/// \returns An error object that indicates success or failure of the save.
llvm::Error save(StringRef Path, llvm::support::endianness ByteOrder,
std::optional<uint64_t> SegmentSize = std::nullopt) const;
/// Encode a GSYM into the file writer stream at the current position.
///
/// \param O The stream to save the binary data to
/// \returns An error object that indicates success or failure of the save.
llvm::Error encode(FileWriter &O) const;
/// Insert a string into the GSYM string table.
///
/// All strings used by GSYM files must be uniqued by adding them to this
/// string pool and using the returned offset for any string values.
///
/// \param S The string to insert into the string table.
/// \param Copy If true, then make a backing copy of the string. If false,
/// the string is owned by another object that will stay around
/// long enough for the GsymCreator to save the GSYM file.
/// \returns The unique 32 bit offset into the string table.
uint32_t insertString(StringRef S, bool Copy = true);
/// Insert a file into this GSYM creator.
///
/// Inserts a file by adding a FileEntry into the "Files" member variable if
/// the file has not already been added. The file path is split into
/// directory and filename which are both added to the string table. This
/// allows paths to be stored efficiently by reusing the directories that are
/// common between multiple files.
///
/// \param Path The path to the file to insert.
/// \param Style The path style for the "Path" parameter.
/// \returns The unique file index for the inserted file.
uint32_t insertFile(StringRef Path,
sys::path::Style Style = sys::path::Style::native);
/// Add a function info to this GSYM creator.
///
/// All information in the FunctionInfo object must use the
/// GsymCreator::insertString(...) function when creating string table
/// offsets for names and other strings.
///
/// \param FI The function info object to emplace into our functions list.
void addFunctionInfo(FunctionInfo &&FI);
/// Finalize the data in the GSYM creator prior to saving the data out.
///
/// Finalize must be called after all FunctionInfo objects have been added
/// and before GsymCreator::save() is called.
///
/// \param OS Output stream to report duplicate function infos, overlapping
/// function infos, and function infos that were merged or removed.
/// \returns An error object that indicates success or failure of the
/// finalize.
llvm::Error finalize(llvm::raw_ostream &OS);
/// Set the UUID value.
///
/// \param UUIDBytes The new UUID bytes.
void setUUID(llvm::ArrayRef<uint8_t> UUIDBytes) {
UUID.assign(UUIDBytes.begin(), UUIDBytes.end());
}
/// Thread safe iteration over all function infos.
///
/// \param Callback A callback function that will get called with each
/// FunctionInfo. If the callback returns false, stop iterating.
void forEachFunctionInfo(
std::function<bool(FunctionInfo &)> const &Callback);
/// Thread safe const iteration over all function infos.
///
/// \param Callback A callback function that will get called with each
/// FunctionInfo. If the callback returns false, stop iterating.
void forEachFunctionInfo(
std::function<bool(const FunctionInfo &)> const &Callback) const;
/// Get the current number of FunctionInfo objects contained in this
/// object.
size_t getNumFunctionInfos() const;
/// Check if an address has already been added as a function info.
///
/// FunctionInfo data can come from many sources: debug info, symbol tables,
/// exception information, and more. Symbol tables should be added after
/// debug info and can use this function to see if a symbol's start address
/// has already been added to the GsymReader. Calling this before adding
/// a function info from a source other than debug info avoids clients adding
/// many redundant FunctionInfo objects from many sources only for them to be
/// removed during the finalize() call.
bool hasFunctionInfoForAddress(uint64_t Addr) const;
/// Set valid .text address ranges that all functions must be contained in.
void SetValidTextRanges(AddressRanges &TextRanges) {
ValidTextRanges = TextRanges;
}
/// Get the valid text ranges.
const std::optional<AddressRanges> GetValidTextRanges() const {
return ValidTextRanges;
}
/// Check if an address is a valid code address.
///
/// Any functions whose addresses do not exist within these function bounds
/// will not be converted into the final GSYM. This allows the object file
/// to figure out the valid file address ranges of all the code sections
/// and ensure we don't add invalid functions to the final output. Many
/// linkers have issues when dead stripping functions from DWARF debug info
/// where they set the DW_AT_low_pc to zero, but newer DWARF has the
/// DW_AT_high_pc as an offset from the DW_AT_low_pc and these size
/// attributes have no relocations that can be applied. This results in DWARF
/// where many functions have an DW_AT_low_pc of zero and a valid offset size
/// for DW_AT_high_pc. If we extract all valid ranges from an object file
/// that are marked with executable permissions, we can properly ensure that
/// these functions are removed.
///
/// \param Addr An address to check.
///
/// \returns True if the address is in the valid text ranges or if no valid
/// text ranges have been set, false otherwise.
bool IsValidTextAddress(uint64_t Addr) const;
/// Set the base address to use for the GSYM file.
///
/// Setting the base address to use for the GSYM file. Object files typically
/// get loaded from a base address when the OS loads them into memory. Using
/// GSYM files for symbolication becomes easier if the base address in the
/// GSYM header is the same address as it allows addresses to be easily slid
/// and allows symbolication without needing to find the original base
/// address in the original object file.
///
/// \param Addr The address to use as the base address of the GSYM file
/// when it is saved to disk.
void setBaseAddress(uint64_t Addr) {
BaseAddress = Addr;
}
/// Whether the transformation should be quiet, i.e. not output warnings.
bool isQuiet() const { return Quiet; }
/// Create a segmented GSYM creator starting with function info index
/// \a FuncIdx.
///
/// This function will create a GsymCreator object that will encode into
/// roughly \a SegmentSize bytes and return it. It is used by the private
/// saveSegments(...) function and also is used by the GSYM unit tests to test
/// segmenting of GSYM files. The returned GsymCreator can be finalized and
/// encoded.
///
/// \param [in] SegmentSize The size in bytes to roughly segment the GSYM file
/// into.
/// \param [in,out] FuncIdx The index of the first function info to encode
/// into the returned GsymCreator. This index will be updated so it can be
/// used in subsequent calls to this function to allow more segments to be
/// created.
/// \returns An expected unique pointer to a GsymCreator or an error. The
/// returned unique pointer can be NULL if there are no more functions to
/// encode.
llvm::Expected<std::unique_ptr<GsymCreator>>
createSegment(uint64_t SegmentSize, size_t &FuncIdx) const;
};
} // namespace gsym
} // namespace llvm
#endif // LLVM_DEBUGINFO_GSYM_GSYMCREATOR_H
PK hwFZP:{�
�
DebugInfo/GSYM/LookupResult.hnu �[��� //===- LookupResult.h -------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_GSYM_LOOKUPRESULT_H
#define LLVM_DEBUGINFO_GSYM_LOOKUPRESULT_H
#include "llvm/ADT/AddressRanges.h"
#include "llvm/ADT/StringRef.h"
#include <inttypes.h>
#include <vector>
namespace llvm {
class raw_ostream;
namespace gsym {
struct SourceLocation {
StringRef Name; ///< Function or symbol name.
StringRef Dir; ///< Line entry source file directory path.
StringRef Base; ///< Line entry source file basename.
uint32_t Line = 0; ///< Source file line number.
uint32_t Offset = 0; ///< Byte size offset within the named function.
};
inline bool operator==(const SourceLocation &LHS, const SourceLocation &RHS) {
return LHS.Name == RHS.Name && LHS.Dir == RHS.Dir && LHS.Base == RHS.Base &&
LHS.Line == RHS.Line && LHS.Offset == RHS.Offset;
}
raw_ostream &operator<<(raw_ostream &OS, const SourceLocation &R);
using SourceLocations = std::vector<SourceLocation>;
struct LookupResult {
uint64_t LookupAddr = 0; ///< The address that this lookup pertains to.
AddressRange FuncRange; ///< The concrete function address range.
StringRef FuncName; ///< The concrete function name that contains LookupAddr.
/// The source locations that match this address. This information will only
/// be filled in if the FunctionInfo contains a line table. If an address is
/// for a concrete function with no inlined functions, this array will have
/// one entry. If an address points to an inline function, there will be one
/// SourceLocation for each inlined function with the last entry pointing to
/// the concrete function itself. This allows one address to generate
/// multiple locations and allows unwinding of inline call stacks. The
/// deepest inline function will appear at index zero in the source locations
/// array, and the concrete function will appear at the end of the array.
SourceLocations Locations;
std::string getSourceFile(uint32_t Index) const;
};
inline bool operator==(const LookupResult &LHS, const LookupResult &RHS) {
if (LHS.LookupAddr != RHS.LookupAddr)
return false;
if (LHS.FuncRange != RHS.FuncRange)
return false;
if (LHS.FuncName != RHS.FuncName)
return false;
return LHS.Locations == RHS.Locations;
}
raw_ostream &operator<<(raw_ostream &OS, const LookupResult &R);
} // namespace gsym
} // namespace llvm
#endif // LLVM_DEBUGINFO_GSYM_LOOKUPRESULT_H
PK hwFZ��$ $ DebugInfo/GSYM/LineTable.hnu �[��� //===- LineTable.h ----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_GSYM_LINETABLE_H
#define LLVM_DEBUGINFO_GSYM_LINETABLE_H
#include "llvm/DebugInfo/GSYM/LineEntry.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <vector>
namespace llvm {
namespace gsym {
struct FunctionInfo;
class FileWriter;
/// LineTable class contains deserialized versions of line tables for each
/// function's address ranges.
///
/// When saved to disk, the line table is encoded using a modified version of
/// the DWARF line tables that only tracks address to source file and line.
///
/// ENCODING
///
/// The line table starts with a small prolog that contains the following
/// values:
///
/// ENCODING NAME DESCRIPTION
/// ======== =========== ====================================================
/// SLEB MinDelta The min line delta for special opcodes that advance
/// the address and line number.
/// SLEB MaxDelta The max line delta for single byte opcodes that
/// advance the address and line number.
/// ULEB FirstLine The value of the first source line number to
/// initialize the LineEntry with.
///
/// Once these prolog items are read, we initialize a LineEntry struct with
/// the start address of the function from the FunctionInfo's address range,
/// a default file index of 1, and the line number set to "FirstLine" from
/// the prolog above:
///
/// LineEntry Row(BaseAddr, 1, FirstLine);
///
/// The line table state machine is now initialized and ready to be parsed.
/// The stream that follows this encodes the line entries in a compact
/// form. Some opcodes cause "Row" to be modified and some opcodes may also
/// push "Row" onto the end of the "LineTable.Lines" vector. The end result
/// is a vector of LineEntry structs that is sorted in ascending address
/// order.
///
/// NORMAL OPCODES
///
/// The opcodes 0 through 3 are normal in opcodes. Their encoding and
/// descriptions are listed below:
///
/// ENCODING ENUMERATION VALUE DESCRIPTION
/// ======== ================ ===== ========================================
/// LTOC_EndSequence 0x00 Parsing is done.
/// ULEB LTOC_SetFile 0x01 Row.File = ULEB
/// ULEB LTOC_AdvancePC 0x02 Row.Addr += ULEB, push "Row".
/// SLEB LTOC_AdvanceLine 0x03 Row.Line += SLEB
/// LTOC_FirstSpecial 0x04 First special opcode (see SPECIAL
/// OPCODES below).
///
/// SPECIAL OPCODES
///
/// Opcodes LTOC_FirstSpecial through 255 are special opcodes that always
/// increment both the Row.Addr and Row.Line and push "Row" onto the
/// LineEntry.Lines array. They do this by using some of the bits to
/// increment/decrement the source line number, and some of the bits to
/// increment the address. Line numbers can go up or down when making line
/// tables, where addresses always only increase since line tables are sorted
/// by address.
///
/// In order to calculate the amount to increment the line and address for
/// these special opcodes, we calculate the number of values reserved for the
/// line increment/decrement using the "MinDelta" and "MaxDelta" from the
/// prolog:
///
/// const int64_t LineRange = MaxDelta - MinDelta + 1;
///
/// Then we can adjust the opcode to not include any of the normal opcodes:
///
/// const uint8_t AdjustedOp = Opcode - LTOC_FirstSpecial;
///
/// And we can calculate the line offset, and address offset:
///
/// const int64_t LineDelta = MinDelta + (AdjustedOp % LineRange);
/// const uint64_t AddrDelta = (AdjustedOp / LineRange);
///
/// And use these to modify our "Row":
///
/// Row.Line += LineDelta;
/// Row.Addr += AddrDelta;
///
/// And push a row onto the line table:
///
/// Lines.push_back(Row);
///
/// This is verify similar to the way that DWARF encodes its line tables. The
/// only difference is the DWARF line tables have more normal opcodes and the
/// "Row" contains more members, like source column number, bools for end of
/// prologue, beginnging of epilogue, is statement and many others. There are
/// also more complex rules that happen for the extra normal opcodes. By
/// leaving these extra opcodes out, we leave more bits for the special
/// opcodes that allows us to encode line tables in fewer bytes than standard
/// DWARF encodings.
///
/// Opcodes that will push "Row" onto the LineEntry.Lines include the
/// LTOC_AdvancePC opcode and all special opcodes. All other opcodes
/// only modify the current "Row", or cause the line table to end.
class LineTable {
typedef std::vector<gsym::LineEntry> Collection;
Collection Lines; ///< All line entries in the line table.
public:
/// Lookup a single address within a line table's data.
///
/// Clients have the option to decode an entire line table using
/// LineTable::decode() or just find a single matching entry using this
/// function. The benefit of using this function is that parsed LineEntry
/// objects that do not match will not be stored in an array. This will avoid
/// memory allocation costs and parsing can stop once a match has been found.
///
/// \param Data The binary stream to read the data from. This object must
/// have the data for the LineTable object starting at offset zero. The data
/// can contain more data than needed.
///
/// \param BaseAddr The base address to use when decoding the line table.
/// This will be the FunctionInfo's start address and will be used to
/// initialize the line table row prior to parsing any opcodes.
///
/// \returns An LineEntry object if a match is found, error otherwise.
static Expected<LineEntry> lookup(DataExtractor &Data, uint64_t BaseAddr,
uint64_t Addr);
/// Decode an LineTable object from a binary data stream.
///
/// \param Data The binary stream to read the data from. This object must
/// have the data for the LineTable object starting at offset zero. The data
/// can contain more data than needed.
///
/// \param BaseAddr The base address to use when decoding the line table.
/// This will be the FunctionInfo's start address and will be used to
/// initialize the line table row prior to parsing any opcodes.
///
/// \returns An LineTable or an error describing the issue that was
/// encountered during decoding.
static llvm::Expected<LineTable> decode(DataExtractor &Data,
uint64_t BaseAddr);
/// Encode this LineTable object into FileWriter stream.
///
/// \param O The binary stream to write the data to at the current file
/// position.
///
/// \param BaseAddr The base address to use when decoding the line table.
/// This will be the FunctionInfo's start address.
///
/// \returns An error object that indicates success or failure or the
/// encoding process.
llvm::Error encode(FileWriter &O, uint64_t BaseAddr) const;
bool empty() const { return Lines.empty(); }
void clear() { Lines.clear(); }
/// Return the first line entry if the line table isn't empty.
///
/// \returns An optional line entry with the first line entry if the line
/// table isn't empty, or std::nullopt if the line table is emtpy.
std::optional<LineEntry> first() const {
if (Lines.empty())
return std::nullopt;
return Lines.front();
}
/// Return the last line entry if the line table isn't empty.
///
/// \returns An optional line entry with the last line entry if the line
/// table isn't empty, or std::nullopt if the line table is emtpy.
std::optional<LineEntry> last() const {
if (Lines.empty())
return std::nullopt;
return Lines.back();
}
void push(const LineEntry &LE) {
Lines.push_back(LE);
}
size_t isValid() const {
return !Lines.empty();
}
size_t size() const {
return Lines.size();
}
LineEntry &get(size_t i) {
assert(i < Lines.size());
return Lines[i];
}
const LineEntry &get(size_t i) const {
assert(i < Lines.size());
return Lines[i];
}
LineEntry &operator[](size_t i) {
return get(i);
}
const LineEntry &operator[](size_t i) const {
return get(i);
}
bool operator==(const LineTable &RHS) const {
return Lines == RHS.Lines;
}
bool operator!=(const LineTable &RHS) const {
return Lines != RHS.Lines;
}
bool operator<(const LineTable &RHS) const {
const auto LHSSize = Lines.size();
const auto RHSSize = RHS.Lines.size();
if (LHSSize == RHSSize)
return Lines < RHS.Lines;
return LHSSize < RHSSize;
}
Collection::const_iterator begin() const { return Lines.begin(); }
Collection::const_iterator end() const { return Lines.end(); }
};
raw_ostream &operator<<(raw_ostream &OS, const gsym::LineTable <);
} // namespace gsym
} // namespace llvm
#endif // LLVM_DEBUGINFO_GSYM_LINETABLE_H
PK hwFZA�)��# �# DebugInfo/GSYM/FunctionInfo.hnu �[��� //===- FunctionInfo.h -------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_GSYM_FUNCTIONINFO_H
#define LLVM_DEBUGINFO_GSYM_FUNCTIONINFO_H
#include "llvm/ADT/SmallString.h"
#include "llvm/DebugInfo/GSYM/ExtractRanges.h"
#include "llvm/DebugInfo/GSYM/InlineInfo.h"
#include "llvm/DebugInfo/GSYM/LineTable.h"
#include "llvm/DebugInfo/GSYM/LookupResult.h"
#include "llvm/DebugInfo/GSYM/StringTable.h"
#include <cstdint>
#include <tuple>
namespace llvm {
class raw_ostream;
namespace gsym {
class GsymReader;
/// Function information in GSYM files encodes information for one contiguous
/// address range. If a function has discontiguous address ranges, they will
/// need to be encoded using multiple FunctionInfo objects.
///
/// ENCODING
///
/// The function information gets the function start address as an argument
/// to the FunctionInfo::decode(...) function. This information is calculated
/// from the GSYM header and an address offset from the GSYM address offsets
/// table. The encoded FunctionInfo information must be aligned to a 4 byte
/// boundary.
///
/// The encoded data for a FunctionInfo starts with fixed data that all
/// function info objects have:
///
/// ENCODING NAME DESCRIPTION
/// ========= =========== ====================================================
/// uint32_t Size The size in bytes of this function.
/// uint32_t Name The string table offset of the function name.
///
/// The optional data in a FunctionInfo object follows this fixed information
/// and consists of a stream of tuples that consist of:
///
/// ENCODING NAME DESCRIPTION
/// ========= =========== ====================================================
/// uint32_t InfoType An "InfoType" enumeration that describes the type
/// of optional data that is encoded.
/// uint32_t InfoLength The size in bytes of the encoded data that
/// immediately follows this length if this value is
/// greater than zero.
/// uint8_t[] InfoData Encoded bytes that represent the data for the
/// "InfoType". These bytes are only present if
/// "InfoLength" is greater than zero.
///
/// The "InfoType" is an enumeration:
///
/// enum InfoType {
/// EndOfList = 0u,
/// LineTableInfo = 1u,
/// InlineInfo = 2u
/// };
///
/// This stream of tuples is terminated by a "InfoType" whose value is
/// InfoType::EndOfList and a zero for "InfoLength". This signifies the end of
/// the optional information list. This format allows us to add new optional
/// information data to a FunctionInfo object over time and allows older
/// clients to still parse the format and skip over any data that they don't
/// understand or want to parse.
///
/// So the function information encoding essientially looks like:
///
/// struct {
/// uint32_t Size;
/// uint32_t Name;
/// struct {
/// uint32_t InfoType;
/// uint32_t InfoLength;
/// uint8_t InfoData[InfoLength];
/// }[N];
/// }
///
/// Where "N" is the number of tuples.
struct FunctionInfo {
AddressRange Range;
uint32_t Name; ///< String table offset in the string table.
std::optional<LineTable> OptLineTable;
std::optional<InlineInfo> Inline;
/// If we encode a FunctionInfo during segmenting so we know its size, we can
/// cache that encoding here so we don't need to re-encode it when saving the
/// GSYM file.
SmallString<32> EncodingCache;
FunctionInfo(uint64_t Addr = 0, uint64_t Size = 0, uint32_t N = 0)
: Range(Addr, Addr + Size), Name(N) {}
/// Query if a FunctionInfo has rich debug info.
///
/// \returns A bool that indicates if this object has something else than
/// range and name. When converting information from a symbol table and from
/// debug info, we might end up with multiple FunctionInfo objects for the
/// same range and we need to be able to tell which one is the better object
/// to use.
bool hasRichInfo() const { return OptLineTable || Inline; }
/// Query if a FunctionInfo object is valid.
///
/// Address and size can be zero and there can be no line entries for a
/// symbol so the only indication this entry is valid is if the name is
/// not zero. This can happen when extracting information from symbol
/// tables that do not encode symbol sizes. In that case only the
/// address and name will be filled in.
///
/// \returns A boolean indicating if this FunctionInfo is valid.
bool isValid() const {
return Name != 0;
}
/// Decode an object from a binary data stream.
///
/// \param Data The binary stream to read the data from. This object must
/// have the data for the object starting at offset zero. The data
/// can contain more data than needed.
///
/// \param BaseAddr The FunctionInfo's start address and will be used as the
/// base address when decoding any contained information like the line table
/// and the inline info.
///
/// \returns An FunctionInfo or an error describing the issue that was
/// encountered during decoding.
static llvm::Expected<FunctionInfo> decode(DataExtractor &Data,
uint64_t BaseAddr);
/// Encode this object into FileWriter stream.
///
/// \param O The binary stream to write the data to at the current file
/// position.
///
/// \returns An error object that indicates failure or the offset of the
/// function info that was successfully written into the stream.
llvm::Expected<uint64_t> encode(FileWriter &O) const;
/// Encode this function info into the internal byte cache and return the size
/// in bytes.
///
/// When segmenting GSYM files we need to know how big each FunctionInfo will
/// encode into so we can generate segments of the right size. We don't want
/// to have to encode a FunctionInfo twice, so we can cache the encoded bytes
/// and re-use then when calling FunctionInfo::encode(...).
///
/// \returns The size in bytes of the FunctionInfo if it were to be encoded
/// into a byte stream.
uint64_t cacheEncoding();
/// Lookup an address within a FunctionInfo object's data stream.
///
/// Instead of decoding an entire FunctionInfo object when doing lookups,
/// we can decode only the information we need from the FunctionInfo's data
/// for the specific address. The lookup result information is returned as
/// a LookupResult.
///
/// \param Data The binary stream to read the data from. This object must
/// have the data for the object starting at offset zero. The data
/// can contain more data than needed.
///
/// \param GR The GSYM reader that contains the string and file table that
/// will be used to fill in information in the returned result.
///
/// \param FuncAddr The function start address decoded from the GsymReader.
///
/// \param Addr The address to lookup.
///
/// \returns An LookupResult or an error describing the issue that was
/// encountered during decoding. An error should only be returned if the
/// address is not contained in the FunctionInfo or if the data is corrupted.
static llvm::Expected<LookupResult> lookup(DataExtractor &Data,
const GsymReader &GR,
uint64_t FuncAddr,
uint64_t Addr);
uint64_t startAddress() const { return Range.start(); }
uint64_t endAddress() const { return Range.end(); }
uint64_t size() const { return Range.size(); }
void clear() {
Range = {0, 0};
Name = 0;
OptLineTable = std::nullopt;
Inline = std::nullopt;
}
};
inline bool operator==(const FunctionInfo &LHS, const FunctionInfo &RHS) {
return LHS.Range == RHS.Range && LHS.Name == RHS.Name &&
LHS.OptLineTable == RHS.OptLineTable && LHS.Inline == RHS.Inline;
}
inline bool operator!=(const FunctionInfo &LHS, const FunctionInfo &RHS) {
return !(LHS == RHS);
}
/// This sorting will order things consistently by address range first, but then
/// followed by inlining being valid and line tables. We might end up with a
/// FunctionInfo from debug info that will have the same range as one from the
/// symbol table, but we want to quickly be able to sort and use the best version
/// when creating the final GSYM file.
inline bool operator<(const FunctionInfo &LHS, const FunctionInfo &RHS) {
// First sort by address range
if (LHS.Range != RHS.Range)
return LHS.Range < RHS.Range;
// Then sort by inline
if (LHS.Inline.has_value() != RHS.Inline.has_value())
return RHS.Inline.has_value();
return LHS.OptLineTable < RHS.OptLineTable;
}
raw_ostream &operator<<(raw_ostream &OS, const FunctionInfo &R);
} // namespace gsym
} // namespace llvm
#endif // LLVM_DEBUGINFO_GSYM_FUNCTIONINFO_H
PK hwFZ �Ŕ DebugInfo/GSYM/LineEntry.hnu �[��� //===- LineEntry.h ----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_GSYM_LINEENTRY_H
#define LLVM_DEBUGINFO_GSYM_LINEENTRY_H
#include "llvm/DebugInfo/GSYM/ExtractRanges.h"
namespace llvm {
namespace gsym {
/// Line entries are used to encode the line tables in FunctionInfo objects.
/// They are stored as a sorted vector of these objects and store the
/// address, file and line of the line table row for a given address. The
/// size of a line table entry is calculated by looking at the next entry
/// in the FunctionInfo's vector of entries.
struct LineEntry {
uint64_t Addr; ///< Start address of this line entry.
uint32_t File; ///< 1 based index of file in FileTable
uint32_t Line; ///< Source line number.
LineEntry(uint64_t A = 0, uint32_t F = 0, uint32_t L = 0)
: Addr(A), File(F), Line(L) {}
bool isValid() { return File != 0; }
};
inline raw_ostream &operator<<(raw_ostream &OS, const LineEntry &LE) {
return OS << "addr=" << HEX64(LE.Addr) << ", file=" << format("%3u", LE.File)
<< ", line=" << format("%3u", LE.Line);
}
inline bool operator==(const LineEntry &LHS, const LineEntry &RHS) {
return LHS.Addr == RHS.Addr && LHS.File == RHS.File && LHS.Line == RHS.Line;
}
inline bool operator!=(const LineEntry &LHS, const LineEntry &RHS) {
return !(LHS == RHS);
}
inline bool operator<(const LineEntry &LHS, const LineEntry &RHS) {
return LHS.Addr < RHS.Addr;
}
} // namespace gsym
} // namespace llvm
#endif // LLVM_DEBUGINFO_GSYM_LINEENTRY_H
PK hwFZq� & DebugInfo/GSYM/ObjectFileTransformer.hnu �[��� //===- ObjectFileTransformer.h ----------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_GSYM_OBJECTFILETRANSFORMER_H
#define LLVM_DEBUGINFO_GSYM_OBJECTFILETRANSFORMER_H
#include "llvm/Support/Error.h"
namespace llvm {
class raw_ostream;
namespace object {
class ObjectFile;
}
namespace gsym {
class GsymCreator;
class ObjectFileTransformer {
public:
/// Extract any object file data that is needed by the GsymCreator.
///
/// The extracted information includes the UUID of the binary and converting
/// all function symbols from any symbol tables into FunctionInfo objects.
///
/// \param Obj The object file that contains the DWARF debug info.
///
/// \param Log The stream to log warnings and non fatal issues to.
///
/// \param Gsym The GSYM creator to populate with the function information
/// from the debug info.
///
/// \returns An error indicating any fatal issues that happen when parsing
/// the DWARF, or Error::success() if all goes well.
static llvm::Error convert(const object::ObjectFile &Obj,
raw_ostream &Log,
GsymCreator &Gsym);
};
} // namespace gsym
} // namespace llvm
#endif // LLVM_DEBUGINFO_GSYM_OBJECTFILETRANSFORMER_H
PK hwFZ(���^ ^ ! DebugInfo/GSYM/DwarfTransformer.hnu �[��� //===- DwarfTransformer.h ---------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_GSYM_DWARFTRANSFORMER_H
#define LLVM_DEBUGINFO_GSYM_DWARFTRANSFORMER_H
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/GSYM/ExtractRanges.h"
#include "llvm/Support/Error.h"
namespace llvm {
class raw_ostream;
namespace gsym {
struct CUInfo;
struct FunctionInfo;
class GsymCreator;
/// A class that transforms the DWARF in a DWARFContext into GSYM information
/// by populating the GsymCreator object that it is constructed with. This
/// class supports converting all DW_TAG_subprogram DIEs into
/// gsym::FunctionInfo objects that includes line table information and inline
/// function information. Creating a separate class to transform this data
/// allows this class to be unit tested.
class DwarfTransformer {
public:
/// Create a DWARF transformer.
///
/// \param D The DWARF to use when converting to GSYM.
///
/// \param OS The stream to log warnings and non fatal issues to.
///
/// \param G The GSYM creator to populate with the function information
/// from the debug info.
DwarfTransformer(DWARFContext &D, raw_ostream &OS, GsymCreator &G) :
DICtx(D), Log(OS), Gsym(G) {}
/// Extract the DWARF from the supplied object file and convert it into the
/// Gsym format in the GsymCreator object that is passed in. Returns an
/// error if something fatal is encountered.
///
/// \returns An error indicating any fatal issues that happen when parsing
/// the DWARF, or Error::success() if all goes well.
llvm::Error convert(uint32_t NumThreads);
llvm::Error verify(StringRef GsymPath);
private:
/// Parse the DWARF in the object file and convert it into the GsymCreator.
Error parse();
/// Handle any DIE (debug info entry) from the DWARF.
///
/// This function will find all DW_TAG_subprogram DIEs that convert them into
/// GSYM FuntionInfo objects and add them to the GsymCreator supplied during
/// construction. The DIE and all its children will be recursively parsed
/// with calls to this function.
///
/// \param Strm The thread specific log stream for any non fatal errors and
/// warnings. Once a thread has finished parsing an entire compile unit, all
/// information in this temporary stream will be forwarded to the member
/// variable log. This keeps logging thread safe.
///
/// \param CUI The compile unit specific information that contains the DWARF
/// line table, cached file list, and other compile unit specific
/// information.
///
/// \param Die The DWARF debug info entry to parse.
void handleDie(raw_ostream &Strm, CUInfo &CUI, DWARFDie Die);
DWARFContext &DICtx;
raw_ostream &Log;
GsymCreator &Gsym;
friend class DwarfTransformerTest;
};
} // namespace gsym
} // namespace llvm
#endif // LLVM_DEBUGINFO_GSYM_DWARFTRANSFORMER_H
PK hwFZO
� � DebugInfo/GSYM/Range.hnu �[��� //===- Range.h --------------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_GSYM_RANGE_H
#define LLVM_DEBUGINFO_GSYM_RANGE_H
#include "llvm/ADT/Optional.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include <stdint.h>
#include <vector>
#define HEX8(v) llvm::format_hex(v, 4)
#define HEX16(v) llvm::format_hex(v, 6)
#define HEX32(v) llvm::format_hex(v, 10)
#define HEX64(v) llvm::format_hex(v, 18)
namespace llvm {
class DataExtractor;
class raw_ostream;
namespace gsym {
class FileWriter;
/// A class that represents an address range. The range is specified using
/// a start and an end address.
struct AddressRange {
uint64_t Start;
uint64_t End;
AddressRange() : Start(0), End(0) {}
AddressRange(uint64_t S, uint64_t E) : Start(S), End(E) {}
uint64_t size() const { return End - Start; }
bool contains(uint64_t Addr) const { return Start <= Addr && Addr < End; }
bool intersects(const AddressRange &R) const {
return Start < R.End && R.Start < End;
}
bool operator==(const AddressRange &R) const {
return Start == R.Start && End == R.End;
}
bool operator!=(const AddressRange &R) const {
return !(*this == R);
}
bool operator<(const AddressRange &R) const {
return std::make_pair(Start, End) < std::make_pair(R.Start, R.End);
}
/// AddressRange objects are encoded and decoded to be relative to a base
/// address. This will be the FunctionInfo's start address if the AddressRange
/// is directly contained in a FunctionInfo, or a base address of the
/// containing parent AddressRange or AddressRanges. This allows address
/// ranges to be efficiently encoded using ULEB128 encodings as we encode the
/// offset and size of each range instead of full addresses. This also makes
/// encoded addresses easy to relocate as we just need to relocate one base
/// address.
/// @{
void decode(DataExtractor &Data, uint64_t BaseAddr, uint64_t &Offset);
void encode(FileWriter &O, uint64_t BaseAddr) const;
/// @}
/// Skip an address range object in the specified data a the specified
/// offset.
///
/// \param Data The binary stream to read the data from.
///
/// \param Offset The byte offset within \a Data.
static void skip(DataExtractor &Data, uint64_t &Offset);
};
raw_ostream &operator<<(raw_ostream &OS, const AddressRange &R);
/// The AddressRanges class helps normalize address range collections.
/// This class keeps a sorted vector of AddressRange objects and can perform
/// insertions and searches efficiently. The address ranges are always sorted
/// and never contain any invalid or empty address ranges. This allows us to
/// emit address ranges into the GSYM file efficiently. Intersecting address
/// ranges are combined during insertion so that we can emit the most compact
/// representation for address ranges when writing to disk.
class AddressRanges {
protected:
using Collection = std::vector<AddressRange>;
Collection Ranges;
public:
void clear() { Ranges.clear(); }
bool empty() const { return Ranges.empty(); }
bool contains(uint64_t Addr) const;
bool contains(AddressRange Range) const;
Optional<AddressRange> getRangeThatContains(uint64_t Addr) const;
void insert(AddressRange Range);
size_t size() const { return Ranges.size(); }
bool operator==(const AddressRanges &RHS) const {
return Ranges == RHS.Ranges;
}
const AddressRange &operator[](size_t i) const {
assert(i < Ranges.size());
return Ranges[i];
}
Collection::const_iterator begin() const { return Ranges.begin(); }
Collection::const_iterator end() const { return Ranges.end(); }
/// Address ranges are decoded and encoded to be relative to a base address.
/// See the AddressRange comment for the encode and decode methods for full
/// details.
/// @{
void decode(DataExtractor &Data, uint64_t BaseAddr, uint64_t &Offset);
void encode(FileWriter &O, uint64_t BaseAddr) const;
/// @}
/// Skip an address range object in the specified data a the specified
/// offset.
///
/// \param Data The binary stream to read the data from.
///
/// \param Offset The byte offset within \a Data.
///
/// \returns The number of address ranges that were skipped.
static uint64_t skip(DataExtractor &Data, uint64_t &Offset);
};
raw_ostream &operator<<(raw_ostream &OS, const AddressRanges &AR);
} // namespace gsym
} // namespace llvm
#endif // LLVM_DEBUGINFO_GSYM_RANGE_H
PK hwFZv����
�
DebugInfo/GSYM/ExtractRanges.hnu �[��� //===- ExtractRanges.h ------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_GSYM_EXTRACTRANGES_H
#define LLVM_DEBUGINFO_GSYM_EXTRACTRANGES_H
#include "llvm/ADT/AddressRanges.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include <stdint.h>
#include <vector>
#define HEX8(v) llvm::format_hex(v, 4)
#define HEX16(v) llvm::format_hex(v, 6)
#define HEX32(v) llvm::format_hex(v, 10)
#define HEX64(v) llvm::format_hex(v, 18)
namespace llvm {
class DataExtractor;
class raw_ostream;
namespace gsym {
class FileWriter;
/// AddressRange objects are encoded and decoded to be relative to a base
/// address. This will be the FunctionInfo's start address if the AddressRange
/// is directly contained in a FunctionInfo, or a base address of the
/// containing parent AddressRange or AddressRanges. This allows address
/// ranges to be efficiently encoded using ULEB128 encodings as we encode the
/// offset and size of each range instead of full addresses. This also makes
/// encoded addresses easy to relocate as we just need to relocate one base
/// address.
/// @{
AddressRange decodeRange(DataExtractor &Data, uint64_t BaseAddr,
uint64_t &Offset);
void encodeRange(const AddressRange &Range, FileWriter &O, uint64_t BaseAddr);
/// @}
/// Skip an address range object in the specified data a the specified
/// offset.
///
/// \param Data The binary stream to read the data from.
///
/// \param Offset The byte offset within \a Data.
void skipRange(DataExtractor &Data, uint64_t &Offset);
/// Address ranges are decoded and encoded to be relative to a base address.
/// See the AddressRange comment for the encode and decode methods for full
/// details.
/// @{
void decodeRanges(AddressRanges &Ranges, DataExtractor &Data, uint64_t BaseAddr,
uint64_t &Offset);
void encodeRanges(const AddressRanges &Ranges, FileWriter &O,
uint64_t BaseAddr);
/// @}
/// Skip an address range object in the specified data a the specified
/// offset.
///
/// \param Data The binary stream to read the data from.
///
/// \param Offset The byte offset within \a Data.
///
/// \returns The number of address ranges that were skipped.
uint64_t skipRanges(DataExtractor &Data, uint64_t &Offset);
} // namespace gsym
raw_ostream &operator<<(raw_ostream &OS, const AddressRange &R);
raw_ostream &operator<<(raw_ostream &OS, const AddressRanges &AR);
} // namespace llvm
#endif // LLVM_DEBUGINFO_GSYM_EXTRACTRANGES_H
PK hwFZ�g�� � DebugInfo/GSYM/FileWriter.hnu �[��� //===- FileWriter.h ---------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_GSYM_FILEWRITER_H
#define LLVM_DEBUGINFO_GSYM_FILEWRITER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/Support/Endian.h"
#include <stddef.h>
#include <stdint.h>
#include <sys/types.h>
namespace llvm {
class raw_pwrite_stream;
namespace gsym {
/// A simplified binary data writer class that doesn't require targets, target
/// definitions, architectures, or require any other optional compile time
/// libraries to be enabled via the build process. This class needs the ability
/// to seek to different spots in the binary stream that is produces to fixup
/// offsets and sizes.
class FileWriter {
llvm::raw_pwrite_stream &OS;
llvm::support::endianness ByteOrder;
public:
FileWriter(llvm::raw_pwrite_stream &S, llvm::support::endianness B)
: OS(S), ByteOrder(B) {}
~FileWriter();
/// Write a single uint8_t value into the stream at the current file
/// position.
///
/// \param Value The value to write into the stream.
void writeU8(uint8_t Value);
/// Write a single uint16_t value into the stream at the current file
/// position. The value will be byte swapped if needed to match the byte
/// order specified during construction.
///
/// \param Value The value to write into the stream.
void writeU16(uint16_t Value);
/// Write a single uint32_t value into the stream at the current file
/// position. The value will be byte swapped if needed to match the byte
/// order specified during construction.
///
/// \param Value The value to write into the stream.
void writeU32(uint32_t Value);
/// Write a single uint64_t value into the stream at the current file
/// position. The value will be byte swapped if needed to match the byte
/// order specified during construction.
///
/// \param Value The value to write into the stream.
void writeU64(uint64_t Value);
/// Write the value into the stream encoded using signed LEB128 at the
/// current file position.
///
/// \param Value The value to write into the stream.
void writeSLEB(int64_t Value);
/// Write the value into the stream encoded using unsigned LEB128 at the
/// current file position.
///
/// \param Value The value to write into the stream.
void writeULEB(uint64_t Value);
/// Write an array of uint8_t values into the stream at the current file
/// position.
///
/// \param Data An array of values to write into the stream.
void writeData(llvm::ArrayRef<uint8_t> Data);
/// Write a NULL terminated C string into the stream at the current file
/// position. The entire contents of Str will be written into the steam at
/// the current file position and then an extra NULL termation byte will be
/// written. It is up to the user to ensure that Str doesn't contain any NULL
/// characters unless the additional NULL characters are desired.
///
/// \param Str The value to write into the stream.
void writeNullTerminated(llvm::StringRef Str);
/// Fixup a uint32_t value at the specified offset in the stream. This
/// function will save the current file position, seek to the specified
/// offset, overwrite the data using Value, and then restore the file
/// position to the previous file position.
///
/// \param Value The value to write into the stream.
/// \param Offset The offset at which to write the Value within the stream.
void fixup32(uint32_t Value, uint64_t Offset);
/// Pad with zeroes at the current file position until the current file
/// position matches the specified alignment.
///
/// \param Align An integer speciying the desired alignment. This does not
/// need to be a power of two.
void alignTo(size_t Align);
/// Return the current offset within the file.
///
/// \return The unsigned offset from the start of the file of the current
/// file position.
uint64_t tell();
llvm::raw_pwrite_stream &get_stream() {
return OS;
}
llvm::support::endianness getByteOrder() const { return ByteOrder; }
private:
FileWriter(const FileWriter &rhs) = delete;
void operator=(const FileWriter &rhs) = delete;
};
} // namespace gsym
} // namespace llvm
#endif // LLVM_DEBUGINFO_GSYM_FILEWRITER_H
PK hwFZ� +�! ! DebugInfo/GSYM/StringTable.hnu �[��� //===- StringTable.h --------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_GSYM_STRINGTABLE_H
#define LLVM_DEBUGINFO_GSYM_STRINGTABLE_H
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/GSYM/ExtractRanges.h"
#include <stdint.h>
namespace llvm {
namespace gsym {
/// String tables in GSYM files are required to start with an empty
/// string at offset zero. Strings must be UTF8 NULL terminated strings.
struct StringTable {
StringRef Data;
StringTable() = default;
StringTable(StringRef D) : Data(D) {}
StringRef operator[](size_t Offset) const { return getString(Offset); }
StringRef getString(uint32_t Offset) const {
if (Offset < Data.size()) {
auto End = Data.find('\0', Offset);
return Data.substr(Offset, End - Offset);
}
return StringRef();
}
void clear() { Data = StringRef(); }
};
inline raw_ostream &operator<<(raw_ostream &OS, const StringTable &S) {
OS << "String table:\n";
uint32_t Offset = 0;
const size_t Size = S.Data.size();
while (Offset < Size) {
StringRef Str = S.getString(Offset);
OS << HEX32(Offset) << ": \"" << Str << "\"\n";
Offset += Str.size() + 1;
}
return OS;
}
} // namespace gsym
} // namespace llvm
#endif // LLVM_DEBUGINFO_GSYM_STRINGTABLE_H
PK hwFZ� �b' ' DebugInfo/GSYM/InlineInfo.hnu �[��� //===- InlineInfo.h ---------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_GSYM_INLINEINFO_H
#define LLVM_DEBUGINFO_GSYM_INLINEINFO_H
#include "llvm/DebugInfo/GSYM/ExtractRanges.h"
#include "llvm/DebugInfo/GSYM/LineEntry.h"
#include "llvm/DebugInfo/GSYM/LookupResult.h"
#include "llvm/Support/Error.h"
#include <stdint.h>
#include <vector>
namespace llvm {
class raw_ostream;
namespace gsym {
class GsymReader;
/// Inline information stores the name of the inline function along with
/// an array of address ranges. It also stores the call file and call line
/// that called this inline function. This allows us to unwind inline call
/// stacks back to the inline or concrete function that called this
/// function. Inlined functions contained in this function are stored in the
/// "Children" variable. All address ranges must be sorted and all address
/// ranges of all children must be contained in the ranges of this function.
/// Any clients that encode information will need to ensure the ranges are
/// all contined correctly or lookups could fail. Add ranges in these objects
/// must be contained in the top level FunctionInfo address ranges as well.
///
/// ENCODING
///
/// When saved to disk, the inline info encodes all ranges to be relative to
/// a parent address range. This will be the FunctionInfo's start address if
/// the InlineInfo is directly contained in a FunctionInfo, or a the start
/// address of the containing parent InlineInfo's first "Ranges" member. This
/// allows address ranges to be efficiently encoded using ULEB128 encodings as
/// we encode the offset and size of each range instead of full addresses. This
/// also makes any encoded addresses easy to relocate as we just need to
/// relocate the FunctionInfo's start address.
///
/// - The AddressRanges member "Ranges" is encoded using an appropriate base
/// address as described above.
/// - UINT8 boolean value that specifies if the InlineInfo object has children.
/// - UINT32 string table offset that points to the name of the inline
/// function.
/// - ULEB128 integer that specifies the file of the call site that called
/// this function.
/// - ULEB128 integer that specifies the source line of the call site that
/// called this function.
/// - if this object has children, enocode each child InlineInfo using the
/// the first address range's start address as the base address.
///
struct InlineInfo {
uint32_t Name; ///< String table offset in the string table.
uint32_t CallFile; ///< 1 based file index in the file table.
uint32_t CallLine; ///< Source line number.
AddressRanges Ranges;
std::vector<InlineInfo> Children;
InlineInfo() : Name(0), CallFile(0), CallLine(0) {}
void clear() {
Name = 0;
CallFile = 0;
CallLine = 0;
Ranges.clear();
Children.clear();
}
bool isValid() const { return !Ranges.empty(); }
using InlineArray = std::vector<const InlineInfo *>;
/// Lookup a single address within the inline info data.
///
/// Clients have the option to decode an entire InlineInfo object (using
/// InlineInfo::decode() ) or just find the matching inline info using this
/// function. The benefit of using this function is that only the information
/// needed for the lookup will be extracted, other info can be skipped and
/// parsing can stop as soon as the deepest match is found. This allows
/// symbolication tools to be fast and efficient and avoid allocation costs
/// when doing lookups.
///
/// This function will augment the SourceLocations array \a SrcLocs with any
/// inline information that pertains to \a Addr. If no inline information
/// exists for \a Addr, then \a SrcLocs will be left untouched. If there is
/// inline information for \a Addr, then \a SrcLocs will be modifiied to
/// contain the deepest most inline function's SourceLocation at index zero
/// in the array and proceed up the the concrete function source file and
/// line at the end of the array.
///
/// \param GR The GSYM reader that contains the string and file table that
/// will be used to fill in the source locations.
///
/// \param Data The binary stream to read the data from. This object must
/// have the data for the LineTable object starting at offset zero. The data
/// can contain more data than needed.
///
/// \param BaseAddr The base address to use when decoding the line table.
/// This will be the FunctionInfo's start address and will be used to
/// decode the correct addresses for the inline information.
///
/// \param Addr The address to lookup.
///
/// \param SrcLocs The inline source locations that matches \a Addr. This
/// array must be initialized with the matching line entry
/// from the line table upon entry. The name of the concrete
/// function must be supplied since it will get pushed to
/// the last SourceLocation entry and the inline information
/// will fill in the source file and line from the inline
/// information.
///
/// \returns An error if the inline information is corrupt, or
/// Error::success() for all other cases, even when no information
/// is added to \a SrcLocs.
static llvm::Error lookup(const GsymReader &GR, DataExtractor &Data,
uint64_t BaseAddr, uint64_t Addr,
SourceLocations &SrcLocs);
/// Lookup an address in the InlineInfo object
///
/// This function is used to symbolicate an inline call stack and can
/// turn one address in the program into one or more inline call stacks
/// and have the stack trace show the original call site from
/// non-inlined code.
///
/// \param Addr the address to lookup
///
/// \returns optional vector of InlineInfo objects that describe the
/// inline call stack for a given address, false otherwise.
std::optional<InlineArray> getInlineStack(uint64_t Addr) const;
/// Decode an InlineInfo object from a binary data stream.
///
/// \param Data The binary stream to read the data from. This object must
/// have the data for the InlineInfo object starting at offset zero. The data
/// can contain more data than needed.
///
/// \param BaseAddr The base address to use when decoding all address ranges.
/// This will be the FunctionInfo's start address if this object is directly
/// contained in a FunctionInfo object, or the start address of the first
/// address range in an InlineInfo object of this object is a child of
/// another InlineInfo object.
/// \returns An InlineInfo or an error describing the issue that was
/// encountered during decoding.
static llvm::Expected<InlineInfo> decode(DataExtractor &Data,
uint64_t BaseAddr);
/// Encode this InlineInfo object into FileWriter stream.
///
/// \param O The binary stream to write the data to at the current file
/// position.
///
/// \param BaseAddr The base address to use when encoding all address ranges.
/// This will be the FunctionInfo's start address if this object is directly
/// contained in a FunctionInfo object, or the start address of the first
/// address range in an InlineInfo object of this object is a child of
/// another InlineInfo object.
///
/// \returns An error object that indicates success or failure or the
/// encoding process.
llvm::Error encode(FileWriter &O, uint64_t BaseAddr) const;
};
inline bool operator==(const InlineInfo &LHS, const InlineInfo &RHS) {
return LHS.Name == RHS.Name && LHS.CallFile == RHS.CallFile &&
LHS.CallLine == RHS.CallLine && LHS.Ranges == RHS.Ranges &&
LHS.Children == RHS.Children;
}
raw_ostream &operator<<(raw_ostream &OS, const InlineInfo &FI);
} // namespace gsym
} // namespace llvm
#endif // LLVM_DEBUGINFO_GSYM_INLINEINFO_H
PK hwFZ��d@2 2 DebugInfo/GSYM/FileEntry.hnu �[��� //===- FileEntry.h ----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_GSYM_FILEENTRY_H
#define LLVM_DEBUGINFO_GSYM_FILEENTRY_H
#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/ADT/Hashing.h"
#include <functional>
#include <stdint.h>
namespace llvm {
namespace gsym {
/// Files in GSYM are contained in FileEntry structs where we split the
/// directory and basename into two different strings in the string
/// table. This allows paths to shared commont directory and filename
/// strings and saves space.
struct FileEntry {
/// Offsets in the string table.
/// @{
uint32_t Dir = 0;
uint32_t Base = 0;
/// @}
FileEntry() = default;
FileEntry(uint32_t D, uint32_t B) : Dir(D), Base(B) {}
// Implement operator== so that FileEntry can be used as key in
// unordered containers.
bool operator==(const FileEntry &RHS) const {
return Base == RHS.Base && Dir == RHS.Dir;
};
bool operator!=(const FileEntry &RHS) const {
return Base != RHS.Base || Dir != RHS.Dir;
};
};
} // namespace gsym
template <> struct DenseMapInfo<gsym::FileEntry> {
static inline gsym::FileEntry getEmptyKey() {
uint32_t key = DenseMapInfo<uint32_t>::getEmptyKey();
return gsym::FileEntry(key, key);
}
static inline gsym::FileEntry getTombstoneKey() {
uint32_t key = DenseMapInfo<uint32_t>::getTombstoneKey();
return gsym::FileEntry(key, key);
}
static unsigned getHashValue(const gsym::FileEntry &Val) {
return llvm::hash_combine(DenseMapInfo<uint32_t>::getHashValue(Val.Dir),
DenseMapInfo<uint32_t>::getHashValue(Val.Base));
}
static bool isEqual(const gsym::FileEntry &LHS, const gsym::FileEntry &RHS) {
return LHS == RHS;
}
};
} // namespace llvm
#endif // LLVM_DEBUGINFO_GSYM_FILEENTRY_H
PK hwFZ���,H H DebugInfo/PDB/IPDBSourceFile.hnu �[��� //===- IPDBSourceFile.h - base interface for a PDB source file --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_IPDBSOURCEFILE_H
#define LLVM_DEBUGINFO_PDB_IPDBSOURCEFILE_H
#include "PDBTypes.h"
#include <memory>
#include <string>
namespace llvm {
class raw_ostream;
namespace pdb {
/// IPDBSourceFile defines an interface used to represent source files whose
/// information are stored in the PDB.
class IPDBSourceFile {
public:
virtual ~IPDBSourceFile();
void dump(raw_ostream &OS, int Indent) const;
virtual std::string getFileName() const = 0;
virtual uint32_t getUniqueId() const = 0;
virtual std::string getChecksum() const = 0;
virtual PDB_Checksum getChecksumType() const = 0;
virtual std::unique_ptr<IPDBEnumChildren<PDBSymbolCompiland>>
getCompilands() const = 0;
};
}
}
#endif
PK hwFZ��C%� � DebugInfo/PDB/PDBExtras.hnu �[��� //===- PDBExtras.h - helper functions and classes for PDBs ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBEXTRAS_H
#define LLVM_DEBUGINFO_PDB_PDBEXTRAS_H
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
#include "llvm/Support/raw_ostream.h"
#include <cstdint>
#include <unordered_map>
namespace llvm {
namespace pdb {
using TagStats = std::unordered_map<PDB_SymType, int>;
raw_ostream &operator<<(raw_ostream &OS, const PDB_VariantType &Value);
raw_ostream &operator<<(raw_ostream &OS, const PDB_CallingConv &Conv);
raw_ostream &operator<<(raw_ostream &OS, const PDB_BuiltinType &Type);
raw_ostream &operator<<(raw_ostream &OS, const PDB_DataKind &Data);
raw_ostream &operator<<(raw_ostream &OS,
const llvm::codeview::CPURegister &CpuReg);
raw_ostream &operator<<(raw_ostream &OS, const PDB_LocType &Loc);
raw_ostream &operator<<(raw_ostream &OS, const codeview::ThunkOrdinal &Thunk);
raw_ostream &operator<<(raw_ostream &OS, const PDB_Checksum &Checksum);
raw_ostream &operator<<(raw_ostream &OS, const PDB_Lang &Lang);
raw_ostream &operator<<(raw_ostream &OS, const PDB_SymType &Tag);
raw_ostream &operator<<(raw_ostream &OS, const PDB_MemberAccess &Access);
raw_ostream &operator<<(raw_ostream &OS, const PDB_UdtType &Type);
raw_ostream &operator<<(raw_ostream &OS, const PDB_Machine &Machine);
raw_ostream &operator<<(raw_ostream &OS, const Variant &Value);
raw_ostream &operator<<(raw_ostream &OS, const VersionInfo &Version);
raw_ostream &operator<<(raw_ostream &OS, const TagStats &Stats);
raw_ostream& dumpPDBSourceCompression(raw_ostream& OS, uint32_t Compression);
template <typename T>
void dumpSymbolField(raw_ostream &OS, StringRef Name, T Value, int Indent) {
OS << "\n";
OS.indent(Indent);
OS << Name << ": " << Value;
}
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBEXTRAS_H
PK hwFZat�z,
,
DebugInfo/PDB/PDBSymDumper.hnu �[��� //===- PDBSymDumper.h - base interface for PDB symbol dumper *- C++ -----*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMDUMPER_H
#define LLVM_DEBUGINFO_PDB_PDBSYMDUMPER_H
#include "PDBTypes.h"
namespace llvm {
class raw_ostream;
namespace pdb {
class PDBSymDumper {
public:
PDBSymDumper(bool ShouldRequireImpl);
virtual ~PDBSymDumper();
virtual void dump(const PDBSymbolAnnotation &Symbol);
virtual void dump(const PDBSymbolBlock &Symbol);
virtual void dump(const PDBSymbolCompiland &Symbol);
virtual void dump(const PDBSymbolCompilandDetails &Symbol);
virtual void dump(const PDBSymbolCompilandEnv &Symbol);
virtual void dump(const PDBSymbolCustom &Symbol);
virtual void dump(const PDBSymbolData &Symbol);
virtual void dump(const PDBSymbolExe &Symbol);
virtual void dump(const PDBSymbolFunc &Symbol);
virtual void dump(const PDBSymbolFuncDebugEnd &Symbol);
virtual void dump(const PDBSymbolFuncDebugStart &Symbol);
virtual void dump(const PDBSymbolLabel &Symbol);
virtual void dump(const PDBSymbolPublicSymbol &Symbol);
virtual void dump(const PDBSymbolThunk &Symbol);
virtual void dump(const PDBSymbolTypeArray &Symbol);
virtual void dump(const PDBSymbolTypeBaseClass &Symbol);
virtual void dump(const PDBSymbolTypeBuiltin &Symbol);
virtual void dump(const PDBSymbolTypeCustom &Symbol);
virtual void dump(const PDBSymbolTypeDimension &Symbol);
virtual void dump(const PDBSymbolTypeEnum &Symbol);
virtual void dump(const PDBSymbolTypeFriend &Symbol);
virtual void dump(const PDBSymbolTypeFunctionArg &Symbol);
virtual void dump(const PDBSymbolTypeFunctionSig &Symbol);
virtual void dump(const PDBSymbolTypeManaged &Symbol);
virtual void dump(const PDBSymbolTypePointer &Symbol);
virtual void dump(const PDBSymbolTypeTypedef &Symbol);
virtual void dump(const PDBSymbolTypeUDT &Symbol);
virtual void dump(const PDBSymbolTypeVTable &Symbol);
virtual void dump(const PDBSymbolTypeVTableShape &Symbol);
virtual void dump(const PDBSymbolUnknown &Symbol);
virtual void dump(const PDBSymbolUsingNamespace &Symbol);
virtual void dumpRight(const PDBSymbolTypeArray &Symbol) {}
virtual void dumpRight(const PDBSymbolTypeBaseClass &Symbol) {}
virtual void dumpRight(const PDBSymbolTypeBuiltin &Symbol) {}
virtual void dumpRight(const PDBSymbolTypeCustom &Symbol) {}
virtual void dumpRight(const PDBSymbolTypeDimension &Symbol) {}
virtual void dumpRight(const PDBSymbolTypeEnum &Symbol) {}
virtual void dumpRight(const PDBSymbolTypeFriend &Symbol) {}
virtual void dumpRight(const PDBSymbolTypeFunctionArg &Symbol) {}
virtual void dumpRight(const PDBSymbolTypeFunctionSig &Symbol) {}
virtual void dumpRight(const PDBSymbolTypeManaged &Symbol) {}
virtual void dumpRight(const PDBSymbolTypePointer &Symbol) {}
virtual void dumpRight(const PDBSymbolTypeTypedef &Symbol) {}
virtual void dumpRight(const PDBSymbolTypeUDT &Symbol) {}
virtual void dumpRight(const PDBSymbolTypeVTable &Symbol) {}
virtual void dumpRight(const PDBSymbolTypeVTableShape &Symbol) {}
private:
bool RequireImpl;
};
}
}
#endif
PK hwFZ;�2� � DebugInfo/PDB/UDTLayout.hnu �[��� //===- UDTLayout.h - UDT layout info ----------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_UDTLAYOUT_H
#define LLVM_DEBUGINFO_PDB_UDTLAYOUT_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/PDB/PDBSymbol.h"
#include "llvm/DebugInfo/PDB/PDBSymbolData.h"
#include "llvm/DebugInfo/PDB/PDBSymbolTypeBaseClass.h"
#include "llvm/DebugInfo/PDB/PDBSymbolTypeBuiltin.h"
#include "llvm/DebugInfo/PDB/PDBSymbolTypeUDT.h"
#include "llvm/DebugInfo/PDB/PDBSymbolTypeVTable.h"
#include <cstdint>
#include <memory>
#include <string>
#include <vector>
namespace llvm {
namespace pdb {
class BaseClassLayout;
class ClassLayout;
class UDTLayoutBase;
class LayoutItemBase {
public:
LayoutItemBase(const UDTLayoutBase *Parent, const PDBSymbol *Symbol,
const std::string &Name, uint32_t OffsetInParent,
uint32_t Size, bool IsElided);
virtual ~LayoutItemBase() = default;
uint32_t deepPaddingSize() const;
virtual uint32_t immediatePadding() const { return 0; }
virtual uint32_t tailPadding() const;
const UDTLayoutBase *getParent() const { return Parent; }
StringRef getName() const { return Name; }
uint32_t getOffsetInParent() const { return OffsetInParent; }
uint32_t getSize() const { return SizeOf; }
uint32_t getLayoutSize() const { return LayoutSize; }
const PDBSymbol *getSymbol() const { return Symbol; }
const BitVector &usedBytes() const { return UsedBytes; }
bool isElided() const { return IsElided; }
virtual bool isVBPtr() const { return false; }
uint32_t containsOffset(uint32_t Off) const {
uint32_t Begin = getOffsetInParent();
uint32_t End = Begin + getSize();
return (Off >= Begin && Off < End);
}
protected:
const PDBSymbol *Symbol = nullptr;
const UDTLayoutBase *Parent = nullptr;
BitVector UsedBytes;
std::string Name;
uint32_t OffsetInParent = 0;
uint32_t SizeOf = 0;
uint32_t LayoutSize = 0;
bool IsElided = false;
};
class VBPtrLayoutItem : public LayoutItemBase {
public:
VBPtrLayoutItem(const UDTLayoutBase &Parent,
std::unique_ptr<PDBSymbolTypeBuiltin> Sym, uint32_t Offset,
uint32_t Size);
bool isVBPtr() const override { return true; }
private:
std::unique_ptr<PDBSymbolTypeBuiltin> Type;
};
class DataMemberLayoutItem : public LayoutItemBase {
public:
DataMemberLayoutItem(const UDTLayoutBase &Parent,
std::unique_ptr<PDBSymbolData> DataMember);
const PDBSymbolData &getDataMember();
bool hasUDTLayout() const;
const ClassLayout &getUDTLayout() const;
private:
std::unique_ptr<PDBSymbolData> DataMember;
std::unique_ptr<ClassLayout> UdtLayout;
};
class VTableLayoutItem : public LayoutItemBase {
public:
VTableLayoutItem(const UDTLayoutBase &Parent,
std::unique_ptr<PDBSymbolTypeVTable> VTable);
uint32_t getElementSize() const { return ElementSize; }
private:
uint32_t ElementSize = 0;
std::unique_ptr<PDBSymbolTypeVTable> VTable;
};
class UDTLayoutBase : public LayoutItemBase {
template <typename T> using UniquePtrVector = std::vector<std::unique_ptr<T>>;
public:
UDTLayoutBase(const UDTLayoutBase *Parent, const PDBSymbol &Sym,
const std::string &Name, uint32_t OffsetInParent, uint32_t Size,
bool IsElided);
uint32_t tailPadding() const override;
ArrayRef<LayoutItemBase *> layout_items() const { return LayoutItems; }
ArrayRef<BaseClassLayout *> bases() const { return AllBases; }
ArrayRef<BaseClassLayout *> regular_bases() const { return NonVirtualBases; }
ArrayRef<BaseClassLayout *> virtual_bases() const { return VirtualBases; }
uint32_t directVirtualBaseCount() const { return DirectVBaseCount; }
ArrayRef<std::unique_ptr<PDBSymbolFunc>> funcs() const { return Funcs; }
ArrayRef<std::unique_ptr<PDBSymbol>> other_items() const { return Other; }
protected:
bool hasVBPtrAtOffset(uint32_t Off) const;
void initializeChildren(const PDBSymbol &Sym);
void addChildToLayout(std::unique_ptr<LayoutItemBase> Child);
uint32_t DirectVBaseCount = 0;
UniquePtrVector<PDBSymbol> Other;
UniquePtrVector<PDBSymbolFunc> Funcs;
UniquePtrVector<LayoutItemBase> ChildStorage;
std::vector<LayoutItemBase *> LayoutItems;
std::vector<BaseClassLayout *> AllBases;
ArrayRef<BaseClassLayout *> NonVirtualBases;
ArrayRef<BaseClassLayout *> VirtualBases;
VTableLayoutItem *VTable = nullptr;
VBPtrLayoutItem *VBPtr = nullptr;
};
class BaseClassLayout : public UDTLayoutBase {
public:
BaseClassLayout(const UDTLayoutBase &Parent, uint32_t OffsetInParent,
bool Elide, std::unique_ptr<PDBSymbolTypeBaseClass> Base);
const PDBSymbolTypeBaseClass &getBase() const { return *Base; }
bool isVirtualBase() const { return IsVirtualBase; }
bool isEmptyBase() { return SizeOf == 1 && LayoutSize == 0; }
private:
std::unique_ptr<PDBSymbolTypeBaseClass> Base;
bool IsVirtualBase;
};
class ClassLayout : public UDTLayoutBase {
public:
explicit ClassLayout(const PDBSymbolTypeUDT &UDT);
explicit ClassLayout(std::unique_ptr<PDBSymbolTypeUDT> UDT);
ClassLayout(ClassLayout &&Other) = default;
const PDBSymbolTypeUDT &getClass() const { return UDT; }
uint32_t immediatePadding() const override;
private:
BitVector ImmediateUsedBytes;
std::unique_ptr<PDBSymbolTypeUDT> OwnedStorage;
const PDBSymbolTypeUDT &UDT;
};
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_UDTLAYOUT_H
PK hwFZ҈(�Z Z ( DebugInfo/PDB/ConcreteSymbolEnumerator.hnu �[��� //===- ConcreteSymbolEnumerator.h -------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_CONCRETESYMBOLENUMERATOR_H
#define LLVM_DEBUGINFO_PDB_CONCRETESYMBOLENUMERATOR_H
#include "llvm/DebugInfo/PDB/IPDBEnumChildren.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
#include "llvm/Support/Casting.h"
#include <algorithm>
#include <cstdint>
#include <memory>
namespace llvm {
namespace pdb {
template <typename ChildType>
class ConcreteSymbolEnumerator : public IPDBEnumChildren<ChildType> {
public:
ConcreteSymbolEnumerator(std::unique_ptr<IPDBEnumSymbols> SymbolEnumerator)
: Enumerator(std::move(SymbolEnumerator)) {}
~ConcreteSymbolEnumerator() override = default;
uint32_t getChildCount() const override {
return Enumerator->getChildCount();
}
std::unique_ptr<ChildType> getChildAtIndex(uint32_t Index) const override {
std::unique_ptr<PDBSymbol> Child = Enumerator->getChildAtIndex(Index);
return unique_dyn_cast_or_null<ChildType>(Child);
}
std::unique_ptr<ChildType> getNext() override {
return unique_dyn_cast_or_null<ChildType>(Enumerator->getNext());
}
void reset() override { Enumerator->reset(); }
private:
std::unique_ptr<IPDBEnumSymbols> Enumerator;
};
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_CONCRETESYMBOLENUMERATOR_H
PK hwFZUu � � DebugInfo/PDB/IPDBEnumChildren.hnu �[��� //===- IPDBEnumChildren.h - base interface for child enumerator -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_IPDBENUMCHILDREN_H
#define LLVM_DEBUGINFO_PDB_IPDBENUMCHILDREN_H
#include "llvm/DebugInfo/CodeView/LazyRandomTypeCollection.h"
#include <cassert>
#include <cstdint>
#include <memory>
namespace llvm {
namespace pdb {
template <typename ChildType> class IPDBEnumChildren {
public:
using ChildTypePtr = std::unique_ptr<ChildType>;
using MyType = IPDBEnumChildren<ChildType>;
virtual ~IPDBEnumChildren() = default;
virtual uint32_t getChildCount() const = 0;
virtual ChildTypePtr getChildAtIndex(uint32_t Index) const = 0;
virtual ChildTypePtr getNext() = 0;
virtual void reset() = 0;
};
template <typename ChildType>
class NullEnumerator : public IPDBEnumChildren<ChildType> {
uint32_t getChildCount() const override { return 0; }
std::unique_ptr<ChildType> getChildAtIndex(uint32_t Index) const override {
return nullptr;
}
std::unique_ptr<ChildType> getNext() override { return nullptr; }
void reset() override {}
};
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_IPDBENUMCHILDREN_H
PK hwFZ
�@ �@ DebugInfo/PDB/PDBTypes.hnu �[��� //===- PDBTypes.h - Defines enums for various fields contained in PDB ----====//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBTYPES_H
#define LLVM_DEBUGINFO_PDB_PDBTYPES_H
#include "llvm/ADT/APFloat.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/PDB/IPDBEnumChildren.h"
#include "llvm/DebugInfo/PDB/IPDBFrameData.h"
#include "llvm/DebugInfo/PDB/Native/RawTypes.h"
#include <cctype>
#include <cstddef>
#include <cstdint>
#include <cstring>
#include <functional>
namespace llvm {
namespace pdb {
typedef uint32_t SymIndexId;
class IPDBDataStream;
class IPDBInjectedSource;
class IPDBLineNumber;
class IPDBSectionContrib;
class IPDBSession;
class IPDBSourceFile;
class IPDBTable;
class PDBSymDumper;
class PDBSymbol;
class PDBSymbolExe;
class PDBSymbolCompiland;
class PDBSymbolCompilandDetails;
class PDBSymbolCompilandEnv;
class PDBSymbolFunc;
class PDBSymbolBlock;
class PDBSymbolData;
class PDBSymbolAnnotation;
class PDBSymbolLabel;
class PDBSymbolPublicSymbol;
class PDBSymbolTypeUDT;
class PDBSymbolTypeEnum;
class PDBSymbolTypeFunctionSig;
class PDBSymbolTypePointer;
class PDBSymbolTypeArray;
class PDBSymbolTypeBuiltin;
class PDBSymbolTypeTypedef;
class PDBSymbolTypeBaseClass;
class PDBSymbolTypeFriend;
class PDBSymbolTypeFunctionArg;
class PDBSymbolFuncDebugStart;
class PDBSymbolFuncDebugEnd;
class PDBSymbolUsingNamespace;
class PDBSymbolTypeVTableShape;
class PDBSymbolTypeVTable;
class PDBSymbolCustom;
class PDBSymbolThunk;
class PDBSymbolTypeCustom;
class PDBSymbolTypeManaged;
class PDBSymbolTypeDimension;
class PDBSymbolUnknown;
using IPDBEnumSymbols = IPDBEnumChildren<PDBSymbol>;
using IPDBEnumSourceFiles = IPDBEnumChildren<IPDBSourceFile>;
using IPDBEnumDataStreams = IPDBEnumChildren<IPDBDataStream>;
using IPDBEnumLineNumbers = IPDBEnumChildren<IPDBLineNumber>;
using IPDBEnumTables = IPDBEnumChildren<IPDBTable>;
using IPDBEnumInjectedSources = IPDBEnumChildren<IPDBInjectedSource>;
using IPDBEnumSectionContribs = IPDBEnumChildren<IPDBSectionContrib>;
using IPDBEnumFrameData = IPDBEnumChildren<IPDBFrameData>;
/// Specifies which PDB reader implementation is to be used. Only a value
/// of PDB_ReaderType::DIA is currently supported, but Native is in the works.
enum class PDB_ReaderType {
DIA = 0,
Native = 1,
};
/// An enumeration indicating the type of data contained in this table.
enum class PDB_TableType {
TableInvalid = 0,
Symbols,
SourceFiles,
LineNumbers,
SectionContribs,
Segments,
InjectedSources,
FrameData,
InputAssemblyFiles,
Dbg
};
/// Defines flags used for enumerating child symbols. This corresponds to the
/// NameSearchOptions enumeration which is documented here:
/// https://msdn.microsoft.com/en-us/library/yat28ads.aspx
enum PDB_NameSearchFlags {
NS_Default = 0x0,
NS_CaseSensitive = 0x1,
NS_CaseInsensitive = 0x2,
NS_FileNameExtMatch = 0x4,
NS_Regex = 0x8,
NS_UndecoratedName = 0x10,
// For backward compatibility.
NS_CaseInFileNameExt = NS_CaseInsensitive | NS_FileNameExtMatch,
NS_CaseRegex = NS_Regex | NS_CaseSensitive,
NS_CaseInRex = NS_Regex | NS_CaseInsensitive
};
/// Specifies the hash algorithm that a source file from a PDB was hashed with.
/// This corresponds to the CV_SourceChksum_t enumeration and are documented
/// here: https://msdn.microsoft.com/en-us/library/e96az21x.aspx
enum class PDB_Checksum { None = 0, MD5 = 1, SHA1 = 2, SHA256 = 3 };
/// These values correspond to the CV_CPU_TYPE_e enumeration, and are documented
/// here: https://msdn.microsoft.com/en-us/library/b2fc64ek.aspx
using PDB_Cpu = codeview::CPUType;
enum class PDB_Machine {
Invalid = 0xffff,
Unknown = 0x0,
Am33 = 0x13,
Amd64 = 0x8664,
Arm = 0x1C0,
Arm64 = 0xaa64,
ArmNT = 0x1C4,
Ebc = 0xEBC,
x86 = 0x14C,
Ia64 = 0x200,
M32R = 0x9041,
Mips16 = 0x266,
MipsFpu = 0x366,
MipsFpu16 = 0x466,
PowerPC = 0x1F0,
PowerPCFP = 0x1F1,
R4000 = 0x166,
SH3 = 0x1A2,
SH3DSP = 0x1A3,
SH4 = 0x1A6,
SH5 = 0x1A8,
Thumb = 0x1C2,
WceMipsV2 = 0x169
};
// A struct with an inner unnamed enum with explicit underlying type resuls
// in an enum class that can implicitly convert to the underlying type, which
// is convenient for this enum.
struct PDB_SourceCompression {
enum : uint32_t {
// No compression. Produced e.g. by `link.exe /natvis:foo.natvis`.
None,
// Not known what produces this.
RunLengthEncoded,
// Not known what produces this.
Huffman,
// Not known what produces this.
LZ,
// Produced e.g. by `csc /debug`. The encoded data is its own mini-stream
// with the following layout (in little endian):
// GUID LanguageTypeGuid;
// GUID LanguageVendorGuid;
// GUID DocumentTypeGuid;
// GUID HashFunctionGuid;
// uint32_t HashDataSize;
// uint32_t CompressedDataSize;
// Followed by HashDataSize bytes containing a hash checksum,
// followed by CompressedDataSize bytes containing source contents.
//
// CompressedDataSize can be 0, in this case only the hash data is present.
// (CompressedDataSize is != 0 e.g. if `/embed` is passed to csc.exe.)
// The compressed data format is:
// uint32_t UncompressedDataSize;
// If UncompressedDataSize is 0, the data is stored uncompressed and
// CompressedDataSize stores the uncompressed size.
// If UncompressedDataSize is != 0, then the data is in raw deflate
// encoding as described in rfc1951.
//
// A GUID is 16 bytes, stored in the usual
// uint32_t
// uint16_t
// uint16_t
// uint8_t[24]
// layout.
//
// Well-known GUIDs for LanguageTypeGuid are:
// 63a08714-fc37-11d2-904c-00c04fa302a1 C
// 3a12d0b7-c26c-11d0-b442-00a0244a1dd2 C++
// 3f5162f8-07c6-11d3-9053-00c04fa302a1 C#
// af046cd1-d0e1-11d2-977c-00a0c9b4d50c Cobol
// ab4f38c9-b6e6-43ba-be3b-58080b2ccce3 F#
// 3a12d0b4-c26c-11d0-b442-00a0244a1dd2 Java
// 3a12d0b6-c26c-11d0-b442-00a0244a1dd2 JScript
// af046cd2-d0e1-11d2-977c-00a0c9b4d50c Pascal
// 3a12d0b8-c26c-11d0-b442-00a0244a1dd2 Visual Basic
//
// Well-known GUIDs for LanguageVendorGuid are:
// 994b45c4-e6e9-11d2-903f-00c04fa302a1 Microsoft
//
// Well-known GUIDs for DocumentTypeGuid are:
// 5a869d0b-6611-11d3-bd2a-0000f80849bd Text
//
// Well-known GUIDs for HashFunctionGuid are:
// 406ea660-64cf-4c82-b6f0-42d48172a799 MD5 (HashDataSize is 16)
// ff1816ec-aa5e-4d10-87f7-6f4963833460 SHA1 (HashDataSize is 20)
// 8829d00f-11b8-4213-878b-770e8597ac16 SHA256 (HashDataSize is 32)
DotNet = 101,
};
};
/// These values correspond to the CV_call_e enumeration, and are documented
/// at the following locations:
/// https://msdn.microsoft.com/en-us/library/b2fc64ek.aspx
/// https://msdn.microsoft.com/en-us/library/windows/desktop/ms680207(v=vs.85).aspx
using PDB_CallingConv = codeview::CallingConvention;
/// These values correspond to the CV_CFL_LANG enumeration, and are documented
/// here: https://msdn.microsoft.com/en-us/library/bw3aekw6.aspx
using PDB_Lang = codeview::SourceLanguage;
/// These values correspond to the DataKind enumeration, and are documented
/// here: https://msdn.microsoft.com/en-us/library/b2x2t313.aspx
enum class PDB_DataKind {
Unknown,
Local,
StaticLocal,
Param,
ObjectPtr,
FileStatic,
Global,
Member,
StaticMember,
Constant
};
/// These values correspond to the SymTagEnum enumeration, and are documented
/// here: https://msdn.microsoft.com/en-us/library/bkedss5f.aspx
enum class PDB_SymType {
None,
Exe,
Compiland,
CompilandDetails,
CompilandEnv,
Function,
Block,
Data,
Annotation,
Label,
PublicSymbol,
UDT,
Enum,
FunctionSig,
PointerType,
ArrayType,
BuiltinType,
Typedef,
BaseClass,
Friend,
FunctionArg,
FuncDebugStart,
FuncDebugEnd,
UsingNamespace,
VTableShape,
VTable,
Custom,
Thunk,
CustomType,
ManagedType,
Dimension,
CallSite,
InlineSite,
BaseInterface,
VectorType,
MatrixType,
HLSLType,
Caller,
Callee,
Export,
HeapAllocationSite,
CoffGroup,
Inlinee,
Max
};
/// These values correspond to the LocationType enumeration, and are documented
/// here: https://msdn.microsoft.com/en-us/library/f57kaez3.aspx
enum class PDB_LocType {
Null,
Static,
TLS,
RegRel,
ThisRel,
Enregistered,
BitField,
Slot,
IlRel,
MetaData,
Constant,
RegRelAliasIndir,
Max
};
/// These values correspond to the UdtKind enumeration, and are documented
/// here: https://msdn.microsoft.com/en-us/library/wcstk66t.aspx
enum class PDB_UdtType { Struct, Class, Union, Interface };
/// These values correspond to the StackFrameTypeEnum enumeration, and are
/// documented here: https://msdn.microsoft.com/en-us/library/bc5207xw.aspx.
enum class PDB_StackFrameType : uint16_t {
FPO,
KernelTrap,
KernelTSS,
EBP,
FrameData,
Unknown = 0xffff
};
/// These values correspond to the MemoryTypeEnum enumeration, and are
/// documented here: https://msdn.microsoft.com/en-us/library/ms165609.aspx.
enum class PDB_MemoryType : uint16_t {
Code,
Data,
Stack,
HeapCode,
Any = 0xffff
};
/// These values correspond to the Basictype enumeration, and are documented
/// here: https://msdn.microsoft.com/en-us/library/4szdtzc3.aspx
enum class PDB_BuiltinType {
None = 0,
Void = 1,
Char = 2,
WCharT = 3,
Int = 6,
UInt = 7,
Float = 8,
BCD = 9,
Bool = 10,
Long = 13,
ULong = 14,
Currency = 25,
Date = 26,
Variant = 27,
Complex = 28,
Bitfield = 29,
BSTR = 30,
HResult = 31,
Char16 = 32,
Char32 = 33,
Char8 = 34,
};
/// These values correspond to the flags that can be combined to control the
/// return of an undecorated name for a C++ decorated name, and are documented
/// here: https://msdn.microsoft.com/en-us/library/kszfk0fs.aspx
enum PDB_UndnameFlags : uint32_t {
Undname_Complete = 0x0,
Undname_NoLeadingUnderscores = 0x1,
Undname_NoMsKeywords = 0x2,
Undname_NoFuncReturns = 0x4,
Undname_NoAllocModel = 0x8,
Undname_NoAllocLang = 0x10,
Undname_Reserved1 = 0x20,
Undname_Reserved2 = 0x40,
Undname_NoThisType = 0x60,
Undname_NoAccessSpec = 0x80,
Undname_NoThrowSig = 0x100,
Undname_NoMemberType = 0x200,
Undname_NoReturnUDTModel = 0x400,
Undname_32BitDecode = 0x800,
Undname_NameOnly = 0x1000,
Undname_TypeOnly = 0x2000,
Undname_HaveParams = 0x4000,
Undname_NoECSU = 0x8000,
Undname_NoIdentCharCheck = 0x10000,
Undname_NoPTR64 = 0x20000
};
enum class PDB_MemberAccess { Private = 1, Protected = 2, Public = 3 };
struct VersionInfo {
uint32_t Major;
uint32_t Minor;
uint32_t Build;
uint32_t QFE;
};
enum PDB_VariantType {
Empty,
Unknown,
Int8,
Int16,
Int32,
Int64,
Single,
Double,
UInt8,
UInt16,
UInt32,
UInt64,
Bool,
String
};
struct Variant {
Variant() = default;
explicit Variant(bool V) : Type(PDB_VariantType::Bool) { Value.Bool = V; }
explicit Variant(int8_t V) : Type(PDB_VariantType::Int8) { Value.Int8 = V; }
explicit Variant(int16_t V) : Type(PDB_VariantType::Int16) {
Value.Int16 = V;
}
explicit Variant(int32_t V) : Type(PDB_VariantType::Int32) {
Value.Int32 = V;
}
explicit Variant(int64_t V) : Type(PDB_VariantType::Int64) {
Value.Int64 = V;
}
explicit Variant(float V) : Type(PDB_VariantType::Single) {
Value.Single = V;
}
explicit Variant(double V) : Type(PDB_VariantType::Double) {
Value.Double = V;
}
explicit Variant(uint8_t V) : Type(PDB_VariantType::UInt8) {
Value.UInt8 = V;
}
explicit Variant(uint16_t V) : Type(PDB_VariantType::UInt16) {
Value.UInt16 = V;
}
explicit Variant(uint32_t V) : Type(PDB_VariantType::UInt32) {
Value.UInt32 = V;
}
explicit Variant(uint64_t V) : Type(PDB_VariantType::UInt64) {
Value.UInt64 = V;
}
Variant(const Variant &Other) {
*this = Other;
}
~Variant() {
if (Type == PDB_VariantType::String)
delete[] Value.String;
}
PDB_VariantType Type = PDB_VariantType::Empty;
union {
bool Bool;
int8_t Int8;
int16_t Int16;
int32_t Int32;
int64_t Int64;
float Single;
double Double;
uint8_t UInt8;
uint16_t UInt16;
uint32_t UInt32;
uint64_t UInt64;
char *String;
} Value;
bool isIntegralType() const {
switch (Type) {
case Bool:
case Int8:
case Int16:
case Int32:
case Int64:
case UInt8:
case UInt16:
case UInt32:
case UInt64:
return true;
default:
return false;
}
}
#define VARIANT_WIDTH(Enum, NumBits) \
case PDB_VariantType::Enum: \
return NumBits;
unsigned getBitWidth() const {
switch (Type) {
VARIANT_WIDTH(Bool, 1u)
VARIANT_WIDTH(Int8, 8u)
VARIANT_WIDTH(Int16, 16u)
VARIANT_WIDTH(Int32, 32u)
VARIANT_WIDTH(Int64, 64u)
VARIANT_WIDTH(Single, 32u)
VARIANT_WIDTH(Double, 64u)
VARIANT_WIDTH(UInt8, 8u)
VARIANT_WIDTH(UInt16, 16u)
VARIANT_WIDTH(UInt32, 32u)
VARIANT_WIDTH(UInt64, 64u)
default:
assert(false && "Variant::toAPSInt called on non-numeric type");
return 0u;
}
}
#undef VARIANT_WIDTH
#define VARIANT_APSINT(Enum, NumBits, IsUnsigned) \
case PDB_VariantType::Enum: \
return APSInt(APInt(NumBits, Value.Enum), IsUnsigned);
APSInt toAPSInt() const {
switch (Type) {
VARIANT_APSINT(Bool, 1u, true)
VARIANT_APSINT(Int8, 8u, false)
VARIANT_APSINT(Int16, 16u, false)
VARIANT_APSINT(Int32, 32u, false)
VARIANT_APSINT(Int64, 64u, false)
VARIANT_APSINT(UInt8, 8u, true)
VARIANT_APSINT(UInt16, 16u, true)
VARIANT_APSINT(UInt32, 32u, true)
VARIANT_APSINT(UInt64, 64u, true)
default:
assert(false && "Variant::toAPSInt called on non-integral type");
return APSInt();
}
}
#undef VARIANT_APSINT
APFloat toAPFloat() const {
// Float constants may be tagged as integers.
switch (Type) {
case PDB_VariantType::Single:
case PDB_VariantType::UInt32:
case PDB_VariantType::Int32:
return APFloat(Value.Single);
case PDB_VariantType::Double:
case PDB_VariantType::UInt64:
case PDB_VariantType::Int64:
return APFloat(Value.Double);
default:
assert(false && "Variant::toAPFloat called on non-floating-point type");
return APFloat::getZero(APFloat::IEEEsingle());
}
}
#define VARIANT_EQUAL_CASE(Enum) \
case PDB_VariantType::Enum: \
return Value.Enum == Other.Value.Enum;
bool operator==(const Variant &Other) const {
if (Type != Other.Type)
return false;
switch (Type) {
VARIANT_EQUAL_CASE(Bool)
VARIANT_EQUAL_CASE(Int8)
VARIANT_EQUAL_CASE(Int16)
VARIANT_EQUAL_CASE(Int32)
VARIANT_EQUAL_CASE(Int64)
VARIANT_EQUAL_CASE(Single)
VARIANT_EQUAL_CASE(Double)
VARIANT_EQUAL_CASE(UInt8)
VARIANT_EQUAL_CASE(UInt16)
VARIANT_EQUAL_CASE(UInt32)
VARIANT_EQUAL_CASE(UInt64)
VARIANT_EQUAL_CASE(String)
default:
return true;
}
}
#undef VARIANT_EQUAL_CASE
bool operator!=(const Variant &Other) const { return !(*this == Other); }
Variant &operator=(const Variant &Other) {
if (this == &Other)
return *this;
if (Type == PDB_VariantType::String)
delete[] Value.String;
Type = Other.Type;
Value = Other.Value;
if (Other.Type == PDB_VariantType::String &&
Other.Value.String != nullptr) {
Value.String = new char[strlen(Other.Value.String) + 1];
::strcpy(Value.String, Other.Value.String);
}
return *this;
}
};
} // end namespace pdb
} // end namespace llvm
namespace std {
template <> struct hash<llvm::pdb::PDB_SymType> {
using argument_type = llvm::pdb::PDB_SymType;
using result_type = std::size_t;
result_type operator()(const argument_type &Arg) const {
return std::hash<int>()(static_cast<int>(Arg));
}
};
} // end namespace std
#endif // LLVM_DEBUGINFO_PDB_PDBTYPES_H
PK hwFZ��e�= = % DebugInfo/PDB/PDBSymbolPublicSymbol.hnu �[��� //===- PDBSymbolPublicSymbol.h - public symbol info -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLPUBLICSYMBOL_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLPUBLICSYMBOL_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolPublicSymbol : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::PublicSymbol)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(getAddressOffset)
FORWARD_SYMBOL_METHOD(getAddressSection)
FORWARD_SYMBOL_METHOD(isCode)
FORWARD_SYMBOL_METHOD(isFunction)
FORWARD_SYMBOL_METHOD(getLength)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(getLocationType)
FORWARD_SYMBOL_METHOD(isManagedCode)
FORWARD_SYMBOL_METHOD(isMSILCode)
FORWARD_SYMBOL_METHOD(getName)
FORWARD_SYMBOL_METHOD(getRelativeVirtualAddress)
FORWARD_SYMBOL_METHOD(getVirtualAddress)
FORWARD_SYMBOL_METHOD(getUndecoratedName)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLPUBLICSYMBOL_H
PK hwFZƯpՎ � ' DebugInfo/PDB/PDBSymbolUsingNamespace.hnu �[��� //===- PDBSymbolUsingNamespace.h - using namespace info ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLUSINGNAMESPACE_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLUSINGNAMESPACE_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolUsingNamespace : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::UsingNamespace)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(getName)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLUSINGNAMESPACE_H
PK hwFZԗ+�� � DebugInfo/PDB/PDBSymbolData.hnu �[��� //===- PDBSymbolData.h - PDB data (e.g. variable) accessors -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLDATA_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLDATA_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
#include "llvm/DebugInfo/PDB/IPDBRawSymbol.h"
namespace llvm {
namespace pdb {
class PDBSymDumper;
class PDBSymbolData : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::Data)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(getAccess)
FORWARD_SYMBOL_METHOD(getAddressOffset)
FORWARD_SYMBOL_METHOD(getAddressSection)
FORWARD_SYMBOL_METHOD(getAddressTaken)
FORWARD_SYMBOL_METHOD(getBitPosition)
FORWARD_SYMBOL_ID_METHOD(getClassParent)
FORWARD_SYMBOL_METHOD(isCompilerGenerated)
FORWARD_SYMBOL_METHOD(isConstType)
FORWARD_SYMBOL_METHOD(getDataKind)
FORWARD_SYMBOL_METHOD(isAggregated)
FORWARD_SYMBOL_METHOD(isSplitted)
FORWARD_SYMBOL_METHOD(getLength)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(getLocationType)
FORWARD_SYMBOL_METHOD(getName)
FORWARD_SYMBOL_METHOD(getOffset)
FORWARD_SYMBOL_METHOD(getRegisterId)
FORWARD_SYMBOL_METHOD(getRelativeVirtualAddress)
FORWARD_SYMBOL_METHOD(getSlot)
FORWARD_SYMBOL_METHOD(getToken)
FORWARD_SYMBOL_ID_METHOD(getType)
FORWARD_SYMBOL_METHOD(isUnalignedType)
FORWARD_SYMBOL_METHOD(getValue)
FORWARD_SYMBOL_METHOD(getVirtualAddress)
FORWARD_SYMBOL_METHOD(isVolatileType)
std::unique_ptr<IPDBEnumLineNumbers> getLineNumbers() const;
uint32_t getCompilandId() const;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLDATA_H
PK hwFZ���0� � " DebugInfo/PDB/IPDBInjectedSource.hnu �[��� //===- IPDBInjectedSource.h - base class for PDB injected file --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_IPDBINJECTEDSOURCE_H
#define LLVM_DEBUGINFO_PDB_IPDBINJECTEDSOURCE_H
#include <cstdint>
#include <string>
namespace llvm {
namespace pdb {
/// IPDBInjectedSource defines an interface used to represent source files
/// which were injected directly into the PDB file during the compilation
/// process. This is used, for example, to add natvis files to a PDB, but
/// in theory could be used to add arbitrary source code.
class IPDBInjectedSource {
public:
virtual ~IPDBInjectedSource();
virtual uint32_t getCrc32() const = 0;
virtual uint64_t getCodeByteSize() const = 0;
virtual std::string getFileName() const = 0;
virtual std::string getObjectFileName() const = 0;
virtual std::string getVirtualFileName() const = 0;
// The returned value depends on the PDB producer,
// but 0 is guaranteed to mean "no compression".
// The enum PDB_SourceCompression lists known return values.
virtual uint32_t getCompression() const = 0;
virtual std::string getCode() const = 0;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_IPDBINJECTEDSOURCE_H
PK hwFZA%��_ _ DebugInfo/PDB/PDBContext.hnu �[��� //===-- PDBContext.h --------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===/
#ifndef LLVM_DEBUGINFO_PDB_PDBCONTEXT_H
#define LLVM_DEBUGINFO_PDB_PDBCONTEXT_H
#include "llvm/DebugInfo/DIContext.h"
#include "llvm/DebugInfo/PDB/IPDBSession.h"
#include <cstdint>
#include <memory>
#include <string>
namespace llvm {
namespace object {
class COFFObjectFile;
} // end namespace object
namespace pdb {
/// PDBContext
/// This data structure is the top level entity that deals with PDB debug
/// information parsing. This data structure exists only when there is a
/// need for a transparent interface to different debug information formats
/// (e.g. PDB and DWARF). More control and power over the debug information
/// access can be had by using the PDB interfaces directly.
class PDBContext : public DIContext {
public:
PDBContext(const object::COFFObjectFile &Object,
std::unique_ptr<IPDBSession> PDBSession);
PDBContext(PDBContext &) = delete;
PDBContext &operator=(PDBContext &) = delete;
static bool classof(const DIContext *DICtx) {
return DICtx->getKind() == CK_PDB;
}
void dump(raw_ostream &OS, DIDumpOptions DIDumpOpts) override;
DILineInfo getLineInfoForAddress(
object::SectionedAddress Address,
DILineInfoSpecifier Specifier = DILineInfoSpecifier()) override;
DILineInfo
getLineInfoForDataAddress(object::SectionedAddress Address) override;
DILineInfoTable getLineInfoForAddressRange(
object::SectionedAddress Address, uint64_t Size,
DILineInfoSpecifier Specifier = DILineInfoSpecifier()) override;
DIInliningInfo getInliningInfoForAddress(
object::SectionedAddress Address,
DILineInfoSpecifier Specifier = DILineInfoSpecifier()) override;
std::vector<DILocal>
getLocalsForAddress(object::SectionedAddress Address) override;
private:
std::string getFunctionName(uint64_t Address, DINameKind NameKind) const;
std::unique_ptr<IPDBSession> Session;
};
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBCONTEXT_H
PK hwFZ4 �� � DebugInfo/PDB/PDB.hnu �[��� //===- PDB.h - base header file for creating a PDB reader -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDB_H
#define LLVM_DEBUGINFO_PDB_PDB_H
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
#include "llvm/Support/Error.h"
#include <memory>
namespace llvm {
namespace pdb {
class IPDBSession;
Error loadDataForPDB(PDB_ReaderType Type, StringRef Path,
std::unique_ptr<IPDBSession> &Session);
Error loadDataForEXE(PDB_ReaderType Type, StringRef Path,
std::unique_ptr<IPDBSession> &Session);
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDB_H
PK hwFZ�PU�� � ( DebugInfo/PDB/PDBSymbolTypeFunctionSig.hnu �[��� //===- PDBSymbolTypeFunctionSig.h - function signature type info *- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEFUNCTIONSIG_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEFUNCTIONSIG_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
class raw_ostream;
namespace pdb {
class PDBSymbolTypeFunctionSig : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::FunctionSig)
public:
std::unique_ptr<IPDBEnumSymbols> getArguments() const;
void dump(PDBSymDumper &Dumper) const override;
void dumpRight(PDBSymDumper &Dumper) const override;
void dumpArgList(raw_ostream &OS) const;
bool isCVarArgs() const;
FORWARD_SYMBOL_METHOD(getCallingConvention)
FORWARD_SYMBOL_ID_METHOD(getClassParent)
FORWARD_SYMBOL_ID_METHOD(getUnmodifiedType)
FORWARD_SYMBOL_METHOD(isConstType)
FORWARD_SYMBOL_METHOD(getCount)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
// FORWARD_SYMBOL_METHOD(getObjectPointerType)
FORWARD_SYMBOL_METHOD(getThisAdjust)
FORWARD_SYMBOL_ID_METHOD_WITH_NAME(getType, getReturnType)
FORWARD_SYMBOL_METHOD(isUnalignedType)
FORWARD_SYMBOL_METHOD(isVolatileType)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEFUNCTIONSIG_H
PK hwFZ�[�|� � DebugInfo/PDB/IPDBLineNumber.hnu �[��� //===- IPDBLineNumber.h - base interface for PDB line no. info ---*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_IPDBLINENUMBER_H
#define LLVM_DEBUGINFO_PDB_IPDBLINENUMBER_H
#include <cstdint>
namespace llvm {
namespace pdb {
class IPDBLineNumber {
public:
virtual ~IPDBLineNumber();
virtual uint32_t getLineNumber() const = 0;
virtual uint32_t getLineNumberEnd() const = 0;
virtual uint32_t getColumnNumber() const = 0;
virtual uint32_t getColumnNumberEnd() const = 0;
virtual uint32_t getAddressSection() const = 0;
virtual uint32_t getAddressOffset() const = 0;
virtual uint32_t getRelativeVirtualAddress() const = 0;
virtual uint64_t getVirtualAddress() const = 0;
virtual uint32_t getLength() const = 0;
virtual uint32_t getSourceFileId() const = 0;
virtual uint32_t getCompilandId() const = 0;
virtual bool isStatement() const = 0;
};
}
}
#endif
PK hwFZ�Ⱦ�& & " DebugInfo/PDB/PDBSymbolCompiland.hnu �[��� //===- PDBSymbolCompiland.h - Accessors for querying PDB compilands -----*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLCOMPILAND_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLCOMPILAND_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
#include <string>
namespace llvm {
class raw_ostream;
namespace pdb {
class PDBSymbolCompiland : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::Compiland)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(isEditAndContinueEnabled)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(getLibraryName)
FORWARD_SYMBOL_METHOD(getName)
std::string getSourceFileName() const;
std::string getSourceFileFullPath() const;
};
}
}
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLCOMPILAND_H
PK hwFZ��yp DebugInfo/PDB/PDBSymbolCustom.hnu �[��� //===- PDBSymbolCustom.h - compiler-specific types --------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLCUSTOM_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLCUSTOM_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
#include "llvm/ADT/SmallVector.h"
namespace llvm {
namespace pdb {
/// PDBSymbolCustom represents symbols that are compiler-specific and do not
/// fit anywhere else in the lexical hierarchy.
/// https://msdn.microsoft.com/en-us/library/d88sf09h.aspx
class PDBSymbolCustom : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::Custom)
public:
void dump(PDBSymDumper &Dumper) const override;
void getDataBytes(llvm::SmallVector<uint8_t, 32> &bytes);
};
} // namespace llvm
}
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLCUSTOM_H
PK hwFZ
s� � � DebugInfo/PDB/IPDBDataStream.hnu �[��� //===- IPDBDataStream.h - base interface for child enumerator ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_IPDBDATASTREAM_H
#define LLVM_DEBUGINFO_PDB_IPDBDATASTREAM_H
#include "llvm/ADT/SmallVector.h"
#include <cstdint>
#include <optional>
#include <string>
namespace llvm {
namespace pdb {
/// IPDBDataStream defines an interface used to represent a stream consisting
/// of a name and a series of records whose formats depend on the particular
/// stream type.
class IPDBDataStream {
public:
using RecordType = SmallVector<uint8_t, 32>;
virtual ~IPDBDataStream();
virtual uint32_t getRecordCount() const = 0;
virtual std::string getName() const = 0;
virtual std::optional<RecordType> getItemAtIndex(uint32_t Index) const = 0;
virtual bool getNext(RecordType &Record) = 0;
virtual void reset() = 0;
};
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_IPDBDATASTREAM_H
PK hwFZ �{� � % DebugInfo/PDB/PDBSymbolCompilandEnv.hnu �[��� //===- PDBSymbolCompilandEnv.h - compiland environment variables *- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLCOMPILANDENV_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLCOMPILANDENV_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolCompilandEnv : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::CompilandEnv)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(getName)
std::string getValue() const;
};
} // namespace llvm
}
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLCOMPILANDENV_H
PK hwFZ��s�x x DebugInfo/PDB/GenericError.hnu �[��� //===- GenericError.h - system_error extensions for PDB ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_GENERICERROR_H
#define LLVM_DEBUGINFO_PDB_GENERICERROR_H
#include "llvm/Support/Error.h"
namespace llvm {
namespace pdb {
enum class pdb_error_code {
invalid_utf8_path = 1,
dia_sdk_not_present,
dia_failed_loading,
signature_out_of_date,
no_matching_pch,
unspecified,
};
} // namespace pdb
} // namespace llvm
namespace std {
template <>
struct is_error_code_enum<llvm::pdb::pdb_error_code> : std::true_type {};
} // namespace std
namespace llvm {
namespace pdb {
const std::error_category &PDBErrCategory();
inline std::error_code make_error_code(pdb_error_code E) {
return std::error_code(static_cast<int>(E), PDBErrCategory());
}
/// Base class for errors originating when parsing raw PDB files
class PDBError : public ErrorInfo<PDBError, StringError> {
public:
using ErrorInfo<PDBError, StringError>::ErrorInfo; // inherit constructors
PDBError(const Twine &S) : ErrorInfo(S, pdb_error_code::unspecified) {}
static char ID;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZk @qp p ) DebugInfo/PDB/Native/NativePublicSymbol.hnu �[��� //===- NativePublicSymbol.h - info about public symbols ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVEPUBLICSYMBOL_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVEPUBLICSYMBOL_H
#include "llvm/DebugInfo/CodeView/SymbolRecord.h"
#include "llvm/DebugInfo/PDB/Native/NativeRawSymbol.h"
namespace llvm {
class raw_ostream;
namespace pdb {
class NativeSession;
class NativePublicSymbol : public NativeRawSymbol {
public:
NativePublicSymbol(NativeSession &Session, SymIndexId Id,
const codeview::PublicSym32 &Sym);
~NativePublicSymbol() override;
void dump(raw_ostream &OS, int Indent, PdbSymbolIdField ShowIdFields,
PdbSymbolIdField RecurseIdFields) const override;
uint32_t getAddressOffset() const override;
uint32_t getAddressSection() const override;
std::string getName() const override;
uint32_t getRelativeVirtualAddress() const override;
uint64_t getVirtualAddress() const override;
protected:
const codeview::PublicSym32 Sym;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_NATIVEPUBLICSYMBOL_H
PK hwFZ��M� � ( DebugInfo/PDB/Native/NativeTypeVTShape.hnu �[��� //===- NativeTypeVTShape.h - info about virtual table shape ------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEVTSHAPE_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEVTSHAPE_H
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
#include "llvm/DebugInfo/CodeView/TypeRecord.h"
#include "llvm/DebugInfo/PDB/IPDBRawSymbol.h"
#include "llvm/DebugInfo/PDB/Native/NativeRawSymbol.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
namespace llvm {
namespace pdb {
class NativeSession;
class NativeTypeVTShape : public NativeRawSymbol {
public:
// Create a pointer record for a non-simple type.
NativeTypeVTShape(NativeSession &Session, SymIndexId Id,
codeview::TypeIndex TI, codeview::VFTableShapeRecord SR);
~NativeTypeVTShape() override;
void dump(raw_ostream &OS, int Indent, PdbSymbolIdField ShowIdFields,
PdbSymbolIdField RecurseIdFields) const override;
bool isConstType() const override;
bool isVolatileType() const override;
bool isUnalignedType() const override;
uint32_t getCount() const override;
protected:
codeview::TypeIndex TI;
codeview::VFTableShapeRecord Record;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEVTSHAPE_H
PK hwFZ �� � ( DebugInfo/PDB/Native/NativeEnumGlobals.hnu �[��� //==- NativeEnumGlobals.h - Native Global Enumerator impl --------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVEENUMGLOBALS_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVEENUMGLOBALS_H
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/PDB/IPDBEnumChildren.h"
#include "llvm/DebugInfo/PDB/PDBSymbol.h"
#include <vector>
namespace llvm {
namespace pdb {
class NativeSession;
class NativeEnumGlobals : public IPDBEnumChildren<PDBSymbol> {
public:
NativeEnumGlobals(NativeSession &Session,
std::vector<codeview::SymbolKind> Kinds);
uint32_t getChildCount() const override;
std::unique_ptr<PDBSymbol> getChildAtIndex(uint32_t Index) const override;
std::unique_ptr<PDBSymbol> getNext() override;
void reset() override;
private:
std::vector<uint32_t> MatchOffsets;
uint32_t Index;
NativeSession &Session;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ�- J
J
$ DebugInfo/PDB/Native/NativeTypeUDT.hnu �[��� //===- NativeTypeUDT.h - info about class/struct type ------------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEUDT_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEUDT_H
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
#include "llvm/DebugInfo/CodeView/TypeRecord.h"
#include "llvm/DebugInfo/PDB/IPDBRawSymbol.h"
#include "llvm/DebugInfo/PDB/Native/NativeRawSymbol.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
namespace llvm {
class raw_ostream;
namespace pdb {
class NativeSession;
class NativeTypeUDT : public NativeRawSymbol {
public:
NativeTypeUDT(NativeSession &Session, SymIndexId Id, codeview::TypeIndex TI,
codeview::ClassRecord Class);
NativeTypeUDT(NativeSession &Session, SymIndexId Id, codeview::TypeIndex TI,
codeview::UnionRecord Union);
NativeTypeUDT(NativeSession &Session, SymIndexId Id,
NativeTypeUDT &UnmodifiedType,
codeview::ModifierRecord Modifier);
~NativeTypeUDT() override;
void dump(raw_ostream &OS, int Indent, PdbSymbolIdField ShowIdFields,
PdbSymbolIdField RecurseIdFields) const override;
std::string getName() const override;
SymIndexId getLexicalParentId() const override;
SymIndexId getUnmodifiedTypeId() const override;
SymIndexId getVirtualTableShapeId() const override;
uint64_t getLength() const override;
PDB_UdtType getUdtKind() const override;
bool hasConstructor() const override;
bool isConstType() const override;
bool hasAssignmentOperator() const override;
bool hasCastOperator() const override;
bool hasNestedTypes() const override;
bool hasOverloadedOperator() const override;
bool isInterfaceUdt() const override;
bool isIntrinsic() const override;
bool isNested() const override;
bool isPacked() const override;
bool isRefUdt() const override;
bool isScoped() const override;
bool isValueUdt() const override;
bool isUnalignedType() const override;
bool isVolatileType() const override;
protected:
codeview::TypeIndex Index;
std::optional<codeview::ClassRecord> Class;
std::optional<codeview::UnionRecord> Union;
NativeTypeUDT *UnmodifiedType = nullptr;
codeview::TagRecord *Tag = nullptr;
std::optional<codeview::ModifierRecord> Modifiers;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEUDT_H
PK hwFZW��� � & DebugInfo/PDB/Native/NativeExeSymbol.hnu �[��� //===- NativeExeSymbol.h - native impl for PDBSymbolExe ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVEEXESYMBOL_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVEEXESYMBOL_H
#include "llvm/DebugInfo/CodeView/GUID.h"
#include "llvm/DebugInfo/PDB/Native/NativeRawSymbol.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
namespace llvm {
namespace pdb {
class NativeSession;
class DbiStream;
class NativeExeSymbol : public NativeRawSymbol {
// EXE symbol is the authority on the various symbol types.
DbiStream *Dbi = nullptr;
public:
NativeExeSymbol(NativeSession &Session, SymIndexId Id);
std::unique_ptr<IPDBEnumSymbols>
findChildren(PDB_SymType Type) const override;
uint32_t getAge() const override;
std::string getSymbolsFileName() const override;
codeview::GUID getGuid() const override;
bool hasCTypes() const override;
bool hasPrivateSymbols() const override;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZJ,�<� � " DebugInfo/PDB/Native/SymbolCache.hnu �[��� //==- SymbolCache.h - Cache of native symbols and ids ------------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_SYMBOLCACHE_H
#define LLVM_DEBUGINFO_PDB_NATIVE_SYMBOLCACHE_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/Line.h"
#include "llvm/DebugInfo/CodeView/TypeDeserializer.h"
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
#include "llvm/DebugInfo/PDB/Native/NativeRawSymbol.h"
#include "llvm/DebugInfo/PDB/Native/NativeSourceFile.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
#include <memory>
#include <vector>
namespace llvm {
namespace codeview {
class InlineSiteSym;
struct FileChecksumEntry;
} // namespace codeview
namespace pdb {
class IPDBSourceFile;
class NativeSession;
class PDBSymbol;
class PDBSymbolCompiland;
class DbiStream;
class SymbolCache {
NativeSession &Session;
DbiStream *Dbi = nullptr;
/// Cache of all stable symbols, indexed by SymIndexId. Just because a
/// symbol has been parsed does not imply that it will be stable and have
/// an Id. Id allocation is an implementation, with the only guarantee
/// being that once an Id is allocated, the symbol can be assumed to be
/// cached.
mutable std::vector<std::unique_ptr<NativeRawSymbol>> Cache;
/// For type records from the TPI stream which have been paresd and cached,
/// stores a mapping to SymIndexId of the cached symbol.
mutable DenseMap<codeview::TypeIndex, SymIndexId> TypeIndexToSymbolId;
/// For field list members which have been parsed and cached, stores a mapping
/// from (IndexOfClass, MemberIndex) to the corresponding SymIndexId of the
/// cached symbol.
mutable DenseMap<std::pair<codeview::TypeIndex, uint32_t>, SymIndexId>
FieldListMembersToSymbolId;
/// List of SymIndexIds for each compiland, indexed by compiland index as they
/// appear in the PDB file.
mutable std::vector<SymIndexId> Compilands;
/// List of source files, indexed by unique source file index.
mutable std::vector<std::unique_ptr<NativeSourceFile>> SourceFiles;
/// Map from string table offset to source file Id.
mutable DenseMap<uint32_t, SymIndexId> FileNameOffsetToId;
/// Map from global symbol offset to SymIndexId.
mutable DenseMap<uint32_t, SymIndexId> GlobalOffsetToSymbolId;
/// Map from segment and code offset to function symbols.
mutable DenseMap<std::pair<uint32_t, uint32_t>, SymIndexId> AddressToSymbolId;
/// Map from segment and code offset to public symbols.
mutable DenseMap<std::pair<uint32_t, uint32_t>, SymIndexId>
AddressToPublicSymId;
/// Map from module index and symbol table offset to SymIndexId.
mutable DenseMap<std::pair<uint16_t, uint32_t>, SymIndexId>
SymTabOffsetToSymbolId;
struct LineTableEntry {
uint64_t Addr;
codeview::LineInfo Line;
uint32_t ColumnNumber;
uint32_t FileNameIndex;
bool IsTerminalEntry;
};
std::vector<LineTableEntry> findLineTable(uint16_t Modi) const;
mutable DenseMap<uint16_t, std::vector<LineTableEntry>> LineTable;
SymIndexId createSymbolPlaceholder() const {
SymIndexId Id = Cache.size();
Cache.push_back(nullptr);
return Id;
}
template <typename ConcreteSymbolT, typename CVRecordT, typename... Args>
SymIndexId createSymbolForType(codeview::TypeIndex TI, codeview::CVType CVT,
Args &&...ConstructorArgs) const {
CVRecordT Record;
if (auto EC =
codeview::TypeDeserializer::deserializeAs<CVRecordT>(CVT, Record)) {
consumeError(std::move(EC));
return 0;
}
return createSymbol<ConcreteSymbolT>(
TI, std::move(Record), std::forward<Args>(ConstructorArgs)...);
}
SymIndexId createSymbolForModifiedType(codeview::TypeIndex ModifierTI,
codeview::CVType CVT) const;
SymIndexId createSimpleType(codeview::TypeIndex TI,
codeview::ModifierOptions Mods) const;
std::unique_ptr<PDBSymbol> findFunctionSymbolBySectOffset(uint32_t Sect,
uint32_t Offset);
std::unique_ptr<PDBSymbol> findPublicSymbolBySectOffset(uint32_t Sect,
uint32_t Offset);
public:
SymbolCache(NativeSession &Session, DbiStream *Dbi);
template <typename ConcreteSymbolT, typename... Args>
SymIndexId createSymbol(Args &&...ConstructorArgs) const {
SymIndexId Id = Cache.size();
// Initial construction must not access the cache, since it must be done
// atomically.
auto Result = std::make_unique<ConcreteSymbolT>(
Session, Id, std::forward<Args>(ConstructorArgs)...);
Result->SymbolId = Id;
NativeRawSymbol *NRS = static_cast<NativeRawSymbol *>(Result.get());
Cache.push_back(std::move(Result));
// After the item is in the cache, we can do further initialization which
// is then allowed to access the cache.
NRS->initialize();
return Id;
}
std::unique_ptr<IPDBEnumSymbols>
createTypeEnumerator(codeview::TypeLeafKind Kind);
std::unique_ptr<IPDBEnumSymbols>
createTypeEnumerator(std::vector<codeview::TypeLeafKind> Kinds);
std::unique_ptr<IPDBEnumSymbols>
createGlobalsEnumerator(codeview::SymbolKind Kind);
SymIndexId findSymbolByTypeIndex(codeview::TypeIndex TI) const;
template <typename ConcreteSymbolT, typename... Args>
SymIndexId getOrCreateFieldListMember(codeview::TypeIndex FieldListTI,
uint32_t Index,
Args &&... ConstructorArgs) {
SymIndexId SymId = Cache.size();
std::pair<codeview::TypeIndex, uint32_t> Key{FieldListTI, Index};
auto Result = FieldListMembersToSymbolId.try_emplace(Key, SymId);
if (Result.second)
SymId =
createSymbol<ConcreteSymbolT>(std::forward<Args>(ConstructorArgs)...);
else
SymId = Result.first->second;
return SymId;
}
SymIndexId getOrCreateGlobalSymbolByOffset(uint32_t Offset);
SymIndexId getOrCreateInlineSymbol(codeview::InlineSiteSym Sym,
uint64_t ParentAddr, uint16_t Modi,
uint32_t RecordOffset) const;
std::unique_ptr<PDBSymbol>
findSymbolBySectOffset(uint32_t Sect, uint32_t Offset, PDB_SymType Type);
std::unique_ptr<IPDBEnumLineNumbers>
findLineNumbersByVA(uint64_t VA, uint32_t Length) const;
std::unique_ptr<PDBSymbolCompiland> getOrCreateCompiland(uint32_t Index);
uint32_t getNumCompilands() const;
std::unique_ptr<PDBSymbol> getSymbolById(SymIndexId SymbolId) const;
NativeRawSymbol &getNativeSymbolById(SymIndexId SymbolId) const;
template <typename ConcreteT>
ConcreteT &getNativeSymbolById(SymIndexId SymbolId) const {
return static_cast<ConcreteT &>(getNativeSymbolById(SymbolId));
}
std::unique_ptr<IPDBSourceFile> getSourceFileById(SymIndexId FileId) const;
SymIndexId
getOrCreateSourceFile(const codeview::FileChecksumEntry &Checksum) const;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ�CCQ Q ! DebugInfo/PDB/Native/FormatUtil.hnu �[��� //===- FormatUtil.h ------------------------------------------- *- C++ --*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_FORMATUTIL_H
#define LLVM_DEBUGINFO_PDB_NATIVE_FORMATUTIL_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/FormatAdapters.h"
#include "llvm/Support/FormatVariadic.h"
#include <string>
#include <type_traits>
namespace llvm {
namespace pdb {
#define PUSH_MASKED_FLAG(Enum, Mask, TheOpt, Value, Text) \
if (Enum::TheOpt == (Value & Mask)) \
Opts.push_back(Text);
#define PUSH_FLAG(Enum, TheOpt, Value, Text) \
PUSH_MASKED_FLAG(Enum, Enum::TheOpt, TheOpt, Value, Text)
#define RETURN_CASE(Enum, X, Ret) \
case Enum::X: \
return Ret;
template <typename T> std::string formatUnknownEnum(T Value) {
return formatv("unknown ({0})", static_cast<std::underlying_type_t<T>>(Value))
.str();
}
std::string formatSegmentOffset(uint16_t Segment, uint32_t Offset);
enum class CharacteristicStyle {
HeaderDefinition, // format as windows header definition
Descriptive, // format as human readable words
};
std::string formatSectionCharacteristics(
uint32_t IndentLevel, uint32_t C, uint32_t FlagsPerLine,
StringRef Separator,
CharacteristicStyle Style = CharacteristicStyle::HeaderDefinition);
std::string typesetItemList(ArrayRef<std::string> Opts, uint32_t IndentLevel,
uint32_t GroupSize, StringRef Sep);
std::string typesetStringList(uint32_t IndentLevel,
ArrayRef<StringRef> Strings);
std::string formatChunkKind(codeview::DebugSubsectionKind Kind,
bool Friendly = true);
std::string formatSymbolKind(codeview::SymbolKind K);
std::string formatTypeLeafKind(codeview::TypeLeafKind K);
/// Returns the number of digits in the given integer.
inline int NumDigits(uint64_t N) {
if (N < 10ULL)
return 1;
if (N < 100ULL)
return 2;
if (N < 1000ULL)
return 3;
if (N < 10000ULL)
return 4;
if (N < 100000ULL)
return 5;
if (N < 1000000ULL)
return 6;
if (N < 10000000ULL)
return 7;
if (N < 100000000ULL)
return 8;
if (N < 1000000000ULL)
return 9;
if (N < 10000000000ULL)
return 10;
if (N < 100000000000ULL)
return 11;
if (N < 1000000000000ULL)
return 12;
if (N < 10000000000000ULL)
return 13;
if (N < 100000000000000ULL)
return 14;
if (N < 1000000000000000ULL)
return 15;
if (N < 10000000000000000ULL)
return 16;
if (N < 100000000000000000ULL)
return 17;
if (N < 1000000000000000000ULL)
return 18;
if (N < 10000000000000000000ULL)
return 19;
return 20;
}
namespace detail {
template <typename T>
struct EndianAdapter final
: public FormatAdapter<support::detail::packed_endian_specific_integral<
T, support::little, support::unaligned>> {
using EndianType =
support::detail::packed_endian_specific_integral<T, support::little,
support::unaligned>;
explicit EndianAdapter(EndianType &&Item)
: FormatAdapter<EndianType>(std::move(Item)) {}
void format(llvm::raw_ostream &Stream, StringRef Style) override {
format_provider<T>::format(static_cast<T>(this->Item), Stream, Style);
}
};
} // namespace detail
template <typename T>
detail::EndianAdapter<T>
fmtle(support::detail::packed_endian_specific_integral<T, support::little,
support::unaligned>
Value) {
return detail::EndianAdapter<T>(std::move(Value));
}
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ��e� � DebugInfo/PDB/Native/DbiStream.hnu �[��� //===- DbiStream.h - PDB Dbi Stream (Stream 3) Access -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_DBISTREAM_H
#define LLVM_DEBUGINFO_PDB_NATIVE_DBISTREAM_H
#include "llvm/DebugInfo/CodeView/DebugFrameDataSubsection.h"
#include "llvm/DebugInfo/PDB/Native/DbiModuleList.h"
#include "llvm/DebugInfo/PDB/Native/PDBStringTable.h"
#include "llvm/DebugInfo/PDB/Native/RawConstants.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
namespace llvm {
class BinaryStream;
namespace object {
struct FpoData;
struct coff_section;
}
namespace msf {
class MappedBlockStream;
}
namespace pdb {
struct DbiStreamHeader;
struct SecMapEntry;
struct SectionContrib2;
struct SectionContrib;
class PDBFile;
class ISectionContribVisitor;
class DbiStream {
friend class DbiStreamBuilder;
public:
explicit DbiStream(std::unique_ptr<BinaryStream> Stream);
~DbiStream();
Error reload(PDBFile *Pdb);
PdbRaw_DbiVer getDbiVersion() const;
uint32_t getAge() const;
uint16_t getPublicSymbolStreamIndex() const;
uint16_t getGlobalSymbolStreamIndex() const;
uint16_t getFlags() const;
bool isIncrementallyLinked() const;
bool hasCTypes() const;
bool isStripped() const;
uint16_t getBuildNumber() const;
uint16_t getBuildMajorVersion() const;
uint16_t getBuildMinorVersion() const;
uint16_t getPdbDllRbld() const;
uint32_t getPdbDllVersion() const;
uint32_t getSymRecordStreamIndex() const;
PDB_Machine getMachineType() const;
const DbiStreamHeader *getHeader() const { return Header; }
BinarySubstreamRef getSectionContributionData() const;
BinarySubstreamRef getSecMapSubstreamData() const;
BinarySubstreamRef getModiSubstreamData() const;
BinarySubstreamRef getFileInfoSubstreamData() const;
BinarySubstreamRef getTypeServerMapSubstreamData() const;
BinarySubstreamRef getECSubstreamData() const;
/// If the given stream type is present, returns its stream index. If it is
/// not present, returns InvalidStreamIndex.
uint32_t getDebugStreamIndex(DbgHeaderType Type) const;
const DbiModuleList &modules() const;
FixedStreamArray<object::coff_section> getSectionHeaders() const;
bool hasOldFpoRecords() const;
FixedStreamArray<object::FpoData> getOldFpoRecords() const;
bool hasNewFpoRecords() const;
const codeview::DebugFrameDataSubsectionRef &getNewFpoRecords() const;
FixedStreamArray<SecMapEntry> getSectionMap() const;
void visitSectionContributions(ISectionContribVisitor &Visitor) const;
Expected<StringRef> getECName(uint32_t NI) const;
private:
Error initializeSectionContributionData();
Error initializeSectionHeadersData(PDBFile *Pdb);
Error initializeSectionMapData();
Error initializeOldFpoRecords(PDBFile *Pdb);
Error initializeNewFpoRecords(PDBFile *Pdb);
Expected<std::unique_ptr<msf::MappedBlockStream>>
createIndexedStreamForHeaderType(PDBFile *Pdb, DbgHeaderType Type) const;
std::unique_ptr<BinaryStream> Stream;
PDBStringTable ECNames;
BinarySubstreamRef SecContrSubstream;
BinarySubstreamRef SecMapSubstream;
BinarySubstreamRef ModiSubstream;
BinarySubstreamRef FileInfoSubstream;
BinarySubstreamRef TypeServerMapSubstream;
BinarySubstreamRef ECSubstream;
DbiModuleList Modules;
FixedStreamArray<support::ulittle16_t> DbgStreams;
PdbRaw_DbiSecContribVer SectionContribVersion =
PdbRaw_DbiSecContribVer::DbiSecContribVer60;
FixedStreamArray<SectionContrib> SectionContribs;
FixedStreamArray<SectionContrib2> SectionContribs2;
FixedStreamArray<SecMapEntry> SectionMap;
std::unique_ptr<msf::MappedBlockStream> SectionHeaderStream;
FixedStreamArray<object::coff_section> SectionHeaders;
std::unique_ptr<msf::MappedBlockStream> OldFpoStream;
FixedStreamArray<object::FpoData> OldFpoRecords;
std::unique_ptr<msf::MappedBlockStream> NewFpoStream;
codeview::DebugFrameDataSubsectionRef NewFpoRecords;
const DbiStreamHeader *Header;
};
}
}
#endif
PK hwFZ��
\ \ $ DebugInfo/PDB/Native/GlobalsStream.hnu �[��� //===- GlobalsStream.h - PDB Index of Symbols by Name -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_GLOBALSSTREAM_H
#define LLVM_DEBUGINFO_PDB_NATIVE_GLOBALSSTREAM_H
#include "llvm/ADT/iterator.h"
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/PDB/Native/RawTypes.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
namespace llvm {
class BinaryStreamReader;
namespace msf {
class MappedBlockStream;
}
namespace pdb {
class SymbolStream;
/// Iterator over hash records producing symbol record offsets. Abstracts away
/// the fact that symbol record offsets on disk are off-by-one.
class GSIHashIterator
: public iterator_adaptor_base<
GSIHashIterator, FixedStreamArrayIterator<PSHashRecord>,
std::random_access_iterator_tag, const uint32_t> {
public:
template <typename T>
GSIHashIterator(T &&v)
: GSIHashIterator::iterator_adaptor_base(std::forward<T &&>(v)) {}
uint32_t operator*() const {
uint32_t Off = this->I->Off;
return --Off;
}
};
/// From https://github.com/Microsoft/microsoft-pdb/blob/master/PDB/dbi/gsi.cpp
enum : unsigned { IPHR_HASH = 4096 };
/// A readonly view of a hash table used in the globals and publics streams.
/// Most clients will only want to iterate this to get symbol record offsets
/// into the PDB symbol stream.
class GSIHashTable {
public:
const GSIHashHeader *HashHdr;
FixedStreamArray<PSHashRecord> HashRecords;
FixedStreamArray<support::ulittle32_t> HashBitmap;
FixedStreamArray<support::ulittle32_t> HashBuckets;
std::array<int32_t, IPHR_HASH + 1> BucketMap;
Error read(BinaryStreamReader &Reader);
uint32_t getVerSignature() const { return HashHdr->VerSignature; }
uint32_t getVerHeader() const { return HashHdr->VerHdr; }
uint32_t getHashRecordSize() const { return HashHdr->HrSize; }
uint32_t getNumBuckets() const { return HashHdr->NumBuckets; }
typedef GSIHashHeader iterator;
GSIHashIterator begin() const { return GSIHashIterator(HashRecords.begin()); }
GSIHashIterator end() const { return GSIHashIterator(HashRecords.end()); }
};
class GlobalsStream {
public:
explicit GlobalsStream(std::unique_ptr<msf::MappedBlockStream> Stream);
~GlobalsStream();
const GSIHashTable &getGlobalsTable() const { return GlobalsTable; }
Error reload();
std::vector<std::pair<uint32_t, codeview::CVSymbol>>
findRecordsByName(StringRef Name, const SymbolStream &Symbols) const;
private:
GSIHashTable GlobalsTable;
std::unique_ptr<msf::MappedBlockStream> Stream;
};
} // namespace pdb
}
#endif
PK hwFZ �̋ ( DebugInfo/PDB/Native/NativeEnumModules.hnu �[��� //==- NativeEnumModules.h - Native Module Enumerator impl --------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVEENUMMODULES_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVEENUMMODULES_H
#include "llvm/DebugInfo/PDB/IPDBEnumChildren.h"
#include "llvm/DebugInfo/PDB/PDBSymbol.h"
namespace llvm {
namespace pdb {
class NativeSession;
class NativeEnumModules : public IPDBEnumChildren<PDBSymbol> {
public:
NativeEnumModules(NativeSession &Session, uint32_t Index = 0);
uint32_t getChildCount() const override;
std::unique_ptr<PDBSymbol> getChildAtIndex(uint32_t Index) const override;
std::unique_ptr<PDBSymbol> getNext() override;
void reset() override;
private:
NativeSession &Session;
uint32_t Index;
};
}
}
#endif
PK hwFZx�V�5 5 - DebugInfo/PDB/Native/NativeInlineSiteSymbol.hnu �[��� //===- NativeInlineSiteSymbol.h - info about inline sites -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVEINLINESITESYMBOL_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVEINLINESITESYMBOL_H
#include "llvm/DebugInfo/CodeView/SymbolRecord.h"
#include "llvm/DebugInfo/PDB/IPDBRawSymbol.h"
#include "llvm/DebugInfo/PDB/Native/NativeRawSymbol.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
namespace llvm {
namespace pdb {
class NativeSession;
class NativeInlineSiteSymbol : public NativeRawSymbol {
public:
NativeInlineSiteSymbol(NativeSession &Session, SymIndexId Id,
const codeview::InlineSiteSym &Sym,
uint64_t ParentAddr);
~NativeInlineSiteSymbol() override;
void dump(raw_ostream &OS, int Indent, PdbSymbolIdField ShowIdFields,
PdbSymbolIdField RecurseIdFields) const override;
std::string getName() const override;
std::unique_ptr<IPDBEnumLineNumbers>
findInlineeLinesByVA(uint64_t VA, uint32_t Length) const override;
private:
const codeview::InlineSiteSym Sym;
uint64_t ParentAddr;
void getLineOffset(uint32_t OffsetInFunc, uint32_t &LineOffset,
uint32_t &FileOffset) const;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_NATIVEINLINESITESYMBOL_H
PK hwFZ��� , DebugInfo/PDB/Native/NativeTypeFunctionSig.hnu �[��� //===- NativeTypeFunctionSig.h - info about function signature ---*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEFUNCTIONSIG_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEFUNCTIONSIG_H
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
#include "llvm/DebugInfo/CodeView/TypeRecord.h"
#include "llvm/DebugInfo/PDB/IPDBRawSymbol.h"
#include "llvm/DebugInfo/PDB/Native/NativeRawSymbol.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
namespace llvm {
namespace pdb {
class NativeTypeFunctionSig : public NativeRawSymbol {
protected:
void initialize() override;
public:
NativeTypeFunctionSig(NativeSession &Session, SymIndexId Id,
codeview::TypeIndex TI, codeview::ProcedureRecord Proc);
NativeTypeFunctionSig(NativeSession &Session, SymIndexId Id,
codeview::TypeIndex TI,
codeview::MemberFunctionRecord MemberFunc);
~NativeTypeFunctionSig() override;
void dump(raw_ostream &OS, int Indent, PdbSymbolIdField ShowIdFields,
PdbSymbolIdField RecurseIdFields) const override;
std::unique_ptr<IPDBEnumSymbols>
findChildren(PDB_SymType Type) const override;
SymIndexId getClassParentId() const override;
PDB_CallingConv getCallingConvention() const override;
uint32_t getCount() const override;
SymIndexId getTypeId() const override;
int32_t getThisAdjust() const override;
bool hasConstructor() const override;
bool isConstType() const override;
bool isConstructorVirtualBase() const override;
bool isCxxReturnUdt() const override;
bool isUnalignedType() const override;
bool isVolatileType() const override;
private:
void initializeArgList(codeview::TypeIndex ArgListTI);
union {
codeview::MemberFunctionRecord MemberFunc;
codeview::ProcedureRecord Proc;
};
SymIndexId ClassParentId = 0;
codeview::TypeIndex Index;
codeview::ArgListRecord ArgList;
bool IsMemberFunction = false;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEFUNCTIONSIG_H
PK hwFZ����� � DebugInfo/PDB/Native/RawError.hnu �[��� //===- RawError.h - Error extensions for raw PDB implementation -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_RAWERROR_H
#define LLVM_DEBUGINFO_PDB_NATIVE_RAWERROR_H
#include "llvm/Support/Error.h"
namespace llvm {
namespace pdb {
enum class raw_error_code {
unspecified = 1,
feature_unsupported,
invalid_format,
corrupt_file,
insufficient_buffer,
no_stream,
index_out_of_bounds,
invalid_block_address,
duplicate_entry,
no_entry,
not_writable,
stream_too_long,
invalid_tpi_hash,
};
} // namespace pdb
} // namespace llvm
namespace std {
template <>
struct is_error_code_enum<llvm::pdb::raw_error_code> : std::true_type {};
} // namespace std
namespace llvm {
namespace pdb {
const std::error_category &RawErrCategory();
inline std::error_code make_error_code(raw_error_code E) {
return std::error_code(static_cast<int>(E), RawErrCategory());
}
/// Base class for errors originating when parsing raw PDB files
class RawError : public ErrorInfo<RawError, StringError> {
public:
using ErrorInfo<RawError, StringError>::ErrorInfo; // inherit constructors
RawError(const Twine &S) : ErrorInfo(S, raw_error_code::unspecified) {}
static char ID;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ��g� + DebugInfo/PDB/Native/NativeFunctionSymbol.hnu �[��� //===- NativeFunctionSymbol.h - info about function symbols -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVEFUNCTIONSYMBOL_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVEFUNCTIONSYMBOL_H
#include "llvm/DebugInfo/CodeView/SymbolRecord.h"
#include "llvm/DebugInfo/PDB/IPDBRawSymbol.h"
#include "llvm/DebugInfo/PDB/Native/NativeRawSymbol.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
namespace llvm {
class raw_ostream;
namespace pdb {
class NativeSession;
class NativeFunctionSymbol : public NativeRawSymbol {
public:
NativeFunctionSymbol(NativeSession &Session, SymIndexId Id,
const codeview::ProcSym &Sym, uint32_t RecordOffset);
~NativeFunctionSymbol() override;
void dump(raw_ostream &OS, int Indent, PdbSymbolIdField ShowIdFields,
PdbSymbolIdField RecurseIdFields) const override;
uint32_t getAddressOffset() const override;
uint32_t getAddressSection() const override;
std::string getName() const override;
uint64_t getLength() const override;
uint32_t getRelativeVirtualAddress() const override;
uint64_t getVirtualAddress() const override;
std::unique_ptr<IPDBEnumSymbols>
findInlineFramesByVA(uint64_t VA) const override;
protected:
const codeview::ProcSym Sym;
uint32_t RecordOffset = 0;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_NATIVEFUNCTIONSYMBOL_H
PK hwFZ�~. L L ( DebugInfo/PDB/Native/NativeTypeTypedef.hnu �[��� //===- NativeTypeTypedef.h - info about typedef ------------------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPETYPEDEF_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPETYPEDEF_H
#include "llvm/DebugInfo/CodeView/SymbolRecord.h"
#include "llvm/DebugInfo/PDB/IPDBRawSymbol.h"
#include "llvm/DebugInfo/PDB/Native/NativeRawSymbol.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
namespace llvm {
class raw_ostream;
namespace pdb {
class NativeSession;
class NativeTypeTypedef : public NativeRawSymbol {
public:
// Create a pointer record for a non-simple type.
NativeTypeTypedef(NativeSession &Session, SymIndexId Id,
codeview::UDTSym Typedef);
~NativeTypeTypedef() override;
void dump(raw_ostream &OS, int Indent, PdbSymbolIdField ShowIdFields,
PdbSymbolIdField RecurseIdFields) const override;
std::string getName() const override;
SymIndexId getTypeId() const override;
protected:
codeview::UDTSym Record;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPETYPEDEF_H
PK hwFZ^"}� " DebugInfo/PDB/Native/LinePrinter.hnu �[��� //===- LinePrinter.h ------------------------------------------ *- C++ --*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_LINEPRINTER_H
#define LLVM_DEBUGINFO_PDB_NATIVE_LINEPRINTER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/Twine.h"
#include "llvm/DebugInfo/PDB/Native/FormatUtil.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/FormatVariadic.h"
#include "llvm/Support/Regex.h"
#include "llvm/Support/raw_ostream.h"
#include <list>
// Container for filter options to control which elements will be printed.
struct FilterOptions {
std::list<std::string> ExcludeTypes;
std::list<std::string> ExcludeSymbols;
std::list<std::string> ExcludeCompilands;
std::list<std::string> IncludeTypes;
std::list<std::string> IncludeSymbols;
std::list<std::string> IncludeCompilands;
uint32_t PaddingThreshold;
uint32_t SizeThreshold;
std::optional<uint32_t> DumpModi;
std::optional<uint32_t> ParentRecurseDepth;
std::optional<uint32_t> ChildrenRecurseDepth;
std::optional<uint32_t> SymbolOffset;
bool JustMyCode;
};
namespace llvm {
namespace msf {
class MSFStreamLayout;
} // namespace msf
namespace pdb {
class ClassLayout;
class PDBFile;
class SymbolGroup;
class LinePrinter {
friend class WithColor;
public:
LinePrinter(int Indent, bool UseColor, raw_ostream &Stream,
const FilterOptions &Filters);
void Indent(uint32_t Amount = 0);
void Unindent(uint32_t Amount = 0);
void NewLine();
void printLine(const Twine &T);
void print(const Twine &T);
template <typename... Ts> void formatLine(const char *Fmt, Ts &&...Items) {
printLine(formatv(Fmt, std::forward<Ts>(Items)...));
}
template <typename... Ts> void format(const char *Fmt, Ts &&...Items) {
print(formatv(Fmt, std::forward<Ts>(Items)...));
}
void formatBinary(StringRef Label, ArrayRef<uint8_t> Data,
uint64_t StartOffset);
void formatBinary(StringRef Label, ArrayRef<uint8_t> Data, uint64_t BaseAddr,
uint64_t StartOffset);
void formatMsfStreamData(StringRef Label, PDBFile &File, uint32_t StreamIdx,
StringRef StreamPurpose, uint64_t Offset,
uint64_t Size);
void formatMsfStreamData(StringRef Label, PDBFile &File,
const msf::MSFStreamLayout &Stream,
BinarySubstreamRef Substream);
void formatMsfStreamBlocks(PDBFile &File, const msf::MSFStreamLayout &Stream);
bool hasColor() const { return UseColor; }
raw_ostream &getStream() { return OS; }
int getIndentLevel() const { return CurrentIndent; }
bool IsClassExcluded(const ClassLayout &Class);
bool IsTypeExcluded(llvm::StringRef TypeName, uint64_t Size);
bool IsSymbolExcluded(llvm::StringRef SymbolName);
bool IsCompilandExcluded(llvm::StringRef CompilandName);
const FilterOptions &getFilters() const { return Filters; }
private:
template <typename Iter>
void SetFilters(std::list<Regex> &List, Iter Begin, Iter End) {
List.clear();
for (; Begin != End; ++Begin)
List.emplace_back(StringRef(*Begin));
}
raw_ostream &OS;
int IndentSpaces;
int CurrentIndent;
bool UseColor;
const FilterOptions &Filters;
std::list<Regex> ExcludeCompilandFilters;
std::list<Regex> ExcludeTypeFilters;
std::list<Regex> ExcludeSymbolFilters;
std::list<Regex> IncludeCompilandFilters;
std::list<Regex> IncludeTypeFilters;
std::list<Regex> IncludeSymbolFilters;
};
struct PrintScope {
explicit PrintScope(LinePrinter &P, uint32_t IndentLevel)
: P(P), IndentLevel(IndentLevel) {}
explicit PrintScope(const PrintScope &Other, uint32_t LabelWidth)
: P(Other.P), IndentLevel(Other.IndentLevel), LabelWidth(LabelWidth) {}
LinePrinter &P;
uint32_t IndentLevel;
uint32_t LabelWidth = 0;
};
inline PrintScope withLabelWidth(const PrintScope &Scope, uint32_t W) {
return PrintScope{Scope, W};
}
struct AutoIndent {
explicit AutoIndent(LinePrinter &L, uint32_t Amount = 0)
: L(&L), Amount(Amount) {
L.Indent(Amount);
}
explicit AutoIndent(const PrintScope &Scope) {
L = &Scope.P;
Amount = Scope.IndentLevel;
}
~AutoIndent() {
if (L)
L->Unindent(Amount);
}
LinePrinter *L = nullptr;
uint32_t Amount = 0;
};
template <class T>
inline raw_ostream &operator<<(LinePrinter &Printer, const T &Item) {
return Printer.getStream() << Item;
}
enum class PDB_ColorItem {
None,
Address,
Type,
Comment,
Padding,
Keyword,
Offset,
Identifier,
Path,
SectionHeader,
LiteralValue,
Register,
};
class WithColor {
public:
WithColor(LinePrinter &P, PDB_ColorItem C);
~WithColor();
raw_ostream &get() { return OS; }
private:
void applyColor(PDB_ColorItem C);
raw_ostream &OS;
bool UseColor;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZUP�nj j , DebugInfo/PDB/Native/NativeEnumLineNumbers.hnu �[��� //==- NativeEnumLineNumbers.h - Native Line Number Enumerator ------------*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVEENUMLINENUMBERS_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVEENUMLINENUMBERS_H
#include "llvm/DebugInfo/PDB/IPDBEnumChildren.h"
#include "llvm/DebugInfo/PDB/IPDBLineNumber.h"
#include "llvm/DebugInfo/PDB/Native/NativeLineNumber.h"
#include <vector>
namespace llvm {
namespace pdb {
class NativeEnumLineNumbers : public IPDBEnumChildren<IPDBLineNumber> {
public:
explicit NativeEnumLineNumbers(std::vector<NativeLineNumber> LineNums);
uint32_t getChildCount() const override;
ChildTypePtr getChildAtIndex(uint32_t Index) const override;
ChildTypePtr getNext() override;
void reset() override;
private:
std::vector<NativeLineNumber> Lines;
uint32_t Index;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ�Zj�l l 0 DebugInfo/PDB/Native/NativeEnumInjectedSources.hnu �[��� //==- NativeEnumInjectedSources.cpp - Native Injected Source Enumerator --*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVEENUMINJECTEDSOURCES_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVEENUMINJECTEDSOURCES_H
#include "llvm/DebugInfo/PDB/IPDBEnumChildren.h"
#include "llvm/DebugInfo/PDB/IPDBInjectedSource.h"
#include "llvm/DebugInfo/PDB/Native/InjectedSourceStream.h"
namespace llvm {
namespace pdb {
class InjectedSourceStream;
class PDBFile;
class PDBStringTable;
class NativeEnumInjectedSources : public IPDBEnumChildren<IPDBInjectedSource> {
public:
NativeEnumInjectedSources(PDBFile &File, const InjectedSourceStream &IJS,
const PDBStringTable &Strings);
uint32_t getChildCount() const override;
std::unique_ptr<IPDBInjectedSource>
getChildAtIndex(uint32_t Index) const override;
std::unique_ptr<IPDBInjectedSource> getNext() override;
void reset() override;
private:
PDBFile &File;
const InjectedSourceStream &Stream;
const PDBStringTable &Strings;
InjectedSourceStream::const_iterator Cur;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ��!N N $ DebugInfo/PDB/Native/PublicsStream.hnu �[��� //===- PublicsStream.h - PDB Public Symbol Stream -------- ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_PUBLICSSTREAM_H
#define LLVM_DEBUGINFO_PDB_NATIVE_PUBLICSSTREAM_H
#include "llvm/DebugInfo/PDB/Native/GlobalsStream.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace msf {
class MappedBlockStream;
}
namespace pdb {
struct PublicsStreamHeader;
struct SectionOffset;
class PublicsStream {
public:
PublicsStream(std::unique_ptr<msf::MappedBlockStream> Stream);
~PublicsStream();
Error reload();
uint32_t getSymHash() const;
uint16_t getThunkTableSection() const;
uint32_t getThunkTableOffset() const;
const GSIHashTable &getPublicsTable() const { return PublicsTable; }
FixedStreamArray<support::ulittle32_t> getAddressMap() const {
return AddressMap;
}
FixedStreamArray<support::ulittle32_t> getThunkMap() const {
return ThunkMap;
}
FixedStreamArray<SectionOffset> getSectionOffsets() const {
return SectionOffsets;
}
private:
std::unique_ptr<msf::MappedBlockStream> Stream;
GSIHashTable PublicsTable;
FixedStreamArray<support::ulittle32_t> AddressMap;
FixedStreamArray<support::ulittle32_t> ThunkMap;
FixedStreamArray<SectionOffset> SectionOffsets;
const PublicsStreamHeader *Header;
};
}
}
#endif
PK hwFZL��
�
DebugInfo/PDB/Native/TpiStream.hnu �[��� //===- TpiStream.cpp - PDB Type Info (TPI) Stream 2 Access ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_TPISTREAM_H
#define LLVM_DEBUGINFO_PDB_NATIVE_TPISTREAM_H
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/PDB/Native/HashTable.h"
#include "llvm/DebugInfo/PDB/Native/RawConstants.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Error.h"
namespace llvm {
class BinaryStream;
namespace codeview {
class TypeIndex;
struct TypeIndexOffset;
class LazyRandomTypeCollection;
}
namespace msf {
class MappedBlockStream;
}
namespace pdb {
struct TpiStreamHeader;
class PDBFile;
class TpiStream {
friend class TpiStreamBuilder;
public:
TpiStream(PDBFile &File, std::unique_ptr<msf::MappedBlockStream> Stream);
~TpiStream();
Error reload();
PdbRaw_TpiVer getTpiVersion() const;
uint32_t TypeIndexBegin() const;
uint32_t TypeIndexEnd() const;
uint32_t getNumTypeRecords() const;
uint16_t getTypeHashStreamIndex() const;
uint16_t getTypeHashStreamAuxIndex() const;
uint32_t getHashKeySize() const;
uint32_t getNumHashBuckets() const;
FixedStreamArray<support::ulittle32_t> getHashValues() const;
FixedStreamArray<codeview::TypeIndexOffset> getTypeIndexOffsets() const;
HashTable<support::ulittle32_t> &getHashAdjusters();
codeview::CVTypeRange types(bool *HadError) const;
const codeview::CVTypeArray &typeArray() const { return TypeRecords; }
codeview::LazyRandomTypeCollection &typeCollection() { return *Types; }
Expected<codeview::TypeIndex>
findFullDeclForForwardRef(codeview::TypeIndex ForwardRefTI) const;
std::vector<codeview::TypeIndex> findRecordsByName(StringRef Name) const;
codeview::CVType getType(codeview::TypeIndex Index);
BinarySubstreamRef getTypeRecordsSubstream() const;
Error commit();
void buildHashMap();
bool supportsTypeLookup() const;
private:
PDBFile &Pdb;
std::unique_ptr<msf::MappedBlockStream> Stream;
std::unique_ptr<codeview::LazyRandomTypeCollection> Types;
BinarySubstreamRef TypeRecordsSubstream;
codeview::CVTypeArray TypeRecords;
std::unique_ptr<BinaryStream> HashStream;
FixedStreamArray<support::ulittle32_t> HashValues;
FixedStreamArray<codeview::TypeIndexOffset> TypeIndexOffsets;
HashTable<support::ulittle32_t> HashAdjusters;
std::vector<std::vector<codeview::TypeIndex>> HashMap;
const TpiStreamHeader *Header;
};
}
}
#endif
PK hwFZ��D D + DebugInfo/PDB/Native/InjectedSourceStream.hnu �[��� //===- InjectedSourceStream.h - PDB Headerblock Stream Access ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_INJECTEDSOURCESTREAM_H
#define LLVM_DEBUGINFO_PDB_NATIVE_INJECTEDSOURCESTREAM_H
#include "llvm/DebugInfo/MSF/MappedBlockStream.h"
#include "llvm/DebugInfo/PDB/Native/HashTable.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace pdb {
struct SrcHeaderBlockEntry;
struct SrcHeaderBlockHeader;
class PDBStringTable;
class InjectedSourceStream {
public:
InjectedSourceStream(std::unique_ptr<msf::MappedBlockStream> Stream);
Error reload(const PDBStringTable &Strings);
using const_iterator = HashTable<SrcHeaderBlockEntry>::const_iterator;
const_iterator begin() const { return InjectedSourceTable.begin(); }
const_iterator end() const { return InjectedSourceTable.end(); }
uint32_t size() const { return InjectedSourceTable.size(); }
private:
std::unique_ptr<msf::MappedBlockStream> Stream;
const SrcHeaderBlockHeader* Header;
HashTable<SrcHeaderBlockEntry> InjectedSourceTable;
};
}
} // namespace llvm
#endif
PK hwFZv^� � $ DebugInfo/PDB/Native/NativeSession.hnu �[��� //===- NativeSession.h - Native implementation of IPDBSession ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVESESSION_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVESESSION_H
#include "llvm/ADT/IntervalMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/PDB/IPDBSession.h"
#include "llvm/DebugInfo/PDB/Native/SymbolCache.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/Error.h"
namespace llvm {
class MemoryBuffer;
namespace pdb {
class PDBFile;
class NativeExeSymbol;
class IPDBSourceFile;
class ModuleDebugStreamRef;
class PDBSymbol;
class PDBSymbolCompiland;
class PDBSymbolExe;
template <typename ChildType> class IPDBEnumChildren;
class NativeSession : public IPDBSession {
struct PdbSearchOptions {
StringRef ExePath;
// FIXME: Add other PDB search options (_NT_SYMBOL_PATH, symsrv)
};
public:
NativeSession(std::unique_ptr<PDBFile> PdbFile,
std::unique_ptr<BumpPtrAllocator> Allocator);
~NativeSession() override;
static Error createFromPdb(std::unique_ptr<MemoryBuffer> MB,
std::unique_ptr<IPDBSession> &Session);
static Error createFromPdbPath(StringRef PdbPath,
std::unique_ptr<IPDBSession> &Session);
static Error createFromExe(StringRef Path,
std::unique_ptr<IPDBSession> &Session);
static Expected<std::string> searchForPdb(const PdbSearchOptions &Opts);
uint64_t getLoadAddress() const override;
bool setLoadAddress(uint64_t Address) override;
std::unique_ptr<PDBSymbolExe> getGlobalScope() override;
std::unique_ptr<PDBSymbol> getSymbolById(SymIndexId SymbolId) const override;
bool addressForVA(uint64_t VA, uint32_t &Section,
uint32_t &Offset) const override;
bool addressForRVA(uint32_t RVA, uint32_t &Section,
uint32_t &Offset) const override;
std::unique_ptr<PDBSymbol> findSymbolByAddress(uint64_t Address,
PDB_SymType Type) override;
std::unique_ptr<PDBSymbol> findSymbolByRVA(uint32_t RVA,
PDB_SymType Type) override;
std::unique_ptr<PDBSymbol> findSymbolBySectOffset(uint32_t Sect,
uint32_t Offset,
PDB_SymType Type) override;
std::unique_ptr<IPDBEnumLineNumbers>
findLineNumbers(const PDBSymbolCompiland &Compiland,
const IPDBSourceFile &File) const override;
std::unique_ptr<IPDBEnumLineNumbers>
findLineNumbersByAddress(uint64_t Address, uint32_t Length) const override;
std::unique_ptr<IPDBEnumLineNumbers>
findLineNumbersByRVA(uint32_t RVA, uint32_t Length) const override;
std::unique_ptr<IPDBEnumLineNumbers>
findLineNumbersBySectOffset(uint32_t Section, uint32_t Offset,
uint32_t Length) const override;
std::unique_ptr<IPDBEnumSourceFiles>
findSourceFiles(const PDBSymbolCompiland *Compiland, llvm::StringRef Pattern,
PDB_NameSearchFlags Flags) const override;
std::unique_ptr<IPDBSourceFile>
findOneSourceFile(const PDBSymbolCompiland *Compiland,
llvm::StringRef Pattern,
PDB_NameSearchFlags Flags) const override;
std::unique_ptr<IPDBEnumChildren<PDBSymbolCompiland>>
findCompilandsForSourceFile(llvm::StringRef Pattern,
PDB_NameSearchFlags Flags) const override;
std::unique_ptr<PDBSymbolCompiland>
findOneCompilandForSourceFile(llvm::StringRef Pattern,
PDB_NameSearchFlags Flags) const override;
std::unique_ptr<IPDBEnumSourceFiles> getAllSourceFiles() const override;
std::unique_ptr<IPDBEnumSourceFiles> getSourceFilesForCompiland(
const PDBSymbolCompiland &Compiland) const override;
std::unique_ptr<IPDBSourceFile>
getSourceFileById(uint32_t FileId) const override;
std::unique_ptr<IPDBEnumDataStreams> getDebugStreams() const override;
std::unique_ptr<IPDBEnumTables> getEnumTables() const override;
std::unique_ptr<IPDBEnumInjectedSources> getInjectedSources() const override;
std::unique_ptr<IPDBEnumSectionContribs> getSectionContribs() const override;
std::unique_ptr<IPDBEnumFrameData> getFrameData() const override;
PDBFile &getPDBFile() { return *Pdb; }
const PDBFile &getPDBFile() const { return *Pdb; }
NativeExeSymbol &getNativeGlobalScope() const;
SymbolCache &getSymbolCache() { return Cache; }
const SymbolCache &getSymbolCache() const { return Cache; }
uint32_t getRVAFromSectOffset(uint32_t Section, uint32_t Offset) const;
uint64_t getVAFromSectOffset(uint32_t Section, uint32_t Offset) const;
bool moduleIndexForVA(uint64_t VA, uint16_t &ModuleIndex) const;
bool moduleIndexForSectOffset(uint32_t Sect, uint32_t Offset,
uint16_t &ModuleIndex) const;
Expected<ModuleDebugStreamRef> getModuleDebugStream(uint32_t Index) const;
private:
void initializeExeSymbol();
void parseSectionContribs();
std::unique_ptr<PDBFile> Pdb;
std::unique_ptr<BumpPtrAllocator> Allocator;
SymbolCache Cache;
SymIndexId ExeSymbol = 0;
uint64_t LoadAddress = 0;
/// Map from virtual address to module index.
using IMap =
IntervalMap<uint64_t, uint16_t, 8, IntervalMapHalfOpenInfo<uint64_t>>;
IMap::Allocator IMapAllocator;
IMap AddrToModuleIndex;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ�0^��/ �/ DebugInfo/PDB/Native/RawTypes.hnu �[��� //===- RawTypes.h -----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_RAWTYPES_H
#define LLVM_DEBUGINFO_PDB_NATIVE_RAWTYPES_H
#include "llvm/DebugInfo/CodeView/GUID.h"
#include "llvm/DebugInfo/CodeView/TypeRecord.h"
#include "llvm/Support/Endian.h"
namespace llvm {
namespace pdb {
// This struct is defined as "SO" in langapi/include/pdb.h.
struct SectionOffset {
support::ulittle32_t Off;
support::ulittle16_t Isect;
char Padding[2];
};
/// Header of the hash tables found in the globals and publics sections.
/// Based on GSIHashHdr in
/// https://github.com/Microsoft/microsoft-pdb/blob/master/PDB/dbi/gsi.h
struct GSIHashHeader {
enum : unsigned {
HdrSignature = ~0U,
HdrVersion = 0xeffe0000 + 19990810,
};
support::ulittle32_t VerSignature;
support::ulittle32_t VerHdr;
support::ulittle32_t HrSize;
support::ulittle32_t NumBuckets;
};
// This is HRFile.
struct PSHashRecord {
support::ulittle32_t Off; // Offset in the symbol record stream
support::ulittle32_t CRef;
};
// This struct is defined as `SC` in include/dbicommon.h
struct SectionContrib {
support::ulittle16_t ISect;
char Padding[2];
support::little32_t Off;
support::little32_t Size;
support::ulittle32_t Characteristics;
support::ulittle16_t Imod;
char Padding2[2];
support::ulittle32_t DataCrc;
support::ulittle32_t RelocCrc;
};
// This struct is defined as `SC2` in include/dbicommon.h
struct SectionContrib2 {
// To guarantee SectionContrib2 is standard layout, we cannot use inheritance.
SectionContrib Base;
support::ulittle32_t ISectCoff;
};
// This corresponds to the `OMFSegMap` structure.
struct SecMapHeader {
support::ulittle16_t SecCount; // Number of segment descriptors in table
support::ulittle16_t SecCountLog; // Number of logical segment descriptors
};
// This corresponds to the `OMFSegMapDesc` structure. The definition is not
// present in the reference implementation, but the layout is derived from
// code that accesses the fields.
struct SecMapEntry {
support::ulittle16_t Flags; // Descriptor flags. See OMFSegDescFlags
support::ulittle16_t Ovl; // Logical overlay number.
support::ulittle16_t Group; // Group index into descriptor array.
support::ulittle16_t Frame;
support::ulittle16_t SecName; // Byte index of the segment or group name
// in the sstSegName table, or 0xFFFF.
support::ulittle16_t ClassName; // Byte index of the class name in the
// sstSegName table, or 0xFFFF.
support::ulittle32_t Offset; // Byte offset of the logical segment
// within the specified physical segment.
// If group is set in flags, offset is the
// offset of the group.
support::ulittle32_t SecByteLength; // Byte count of the segment or group.
};
/// Some of the values are stored in bitfields. Since this needs to be portable
/// across compilers and architectures (big / little endian in particular) we
/// can't use the actual structures below, but must instead do the shifting
/// and masking ourselves. The struct definitions are provided for reference.
struct DbiFlags {
/// uint16_t IncrementalLinking : 1; // True if linked incrementally
/// uint16_t IsStripped : 1; // True if private symbols were
/// stripped.
/// uint16_t HasCTypes : 1; // True if linked with /debug:ctypes.
/// uint16_t Reserved : 13;
static const uint16_t FlagIncrementalMask = 0x0001;
static const uint16_t FlagStrippedMask = 0x0002;
static const uint16_t FlagHasCTypesMask = 0x0004;
};
struct DbiBuildNo {
/// uint16_t MinorVersion : 8;
/// uint16_t MajorVersion : 7;
/// uint16_t NewVersionFormat : 1;
static const uint16_t BuildMinorMask = 0x00FF;
static const uint16_t BuildMinorShift = 0;
static const uint16_t BuildMajorMask = 0x7F00;
static const uint16_t BuildMajorShift = 8;
static const uint16_t NewVersionFormatMask = 0x8000;
};
/// The fixed size header that appears at the beginning of the DBI Stream.
struct DbiStreamHeader {
support::little32_t VersionSignature;
support::ulittle32_t VersionHeader;
/// How "old" is this DBI Stream. Should match the age of the PDB InfoStream.
support::ulittle32_t Age;
/// Global symbol stream #
support::ulittle16_t GlobalSymbolStreamIndex;
/// See DbiBuildNo structure.
support::ulittle16_t BuildNumber;
/// Public symbols stream #
support::ulittle16_t PublicSymbolStreamIndex;
/// version of mspdbNNN.dll
support::ulittle16_t PdbDllVersion;
/// Symbol records stream #
support::ulittle16_t SymRecordStreamIndex;
/// rbld number of mspdbNNN.dll
support::ulittle16_t PdbDllRbld;
/// Size of module info stream
support::little32_t ModiSubstreamSize;
/// Size of sec. contrib stream
support::little32_t SecContrSubstreamSize;
/// Size of sec. map substream
support::little32_t SectionMapSize;
/// Size of file info substream
support::little32_t FileInfoSize;
/// Size of type server map
support::little32_t TypeServerSize;
/// Index of MFC Type Server
support::ulittle32_t MFCTypeServerIndex;
/// Size of DbgHeader info
support::little32_t OptionalDbgHdrSize;
/// Size of EC stream (what is EC?)
support::little32_t ECSubstreamSize;
/// See DbiFlags enum.
support::ulittle16_t Flags;
/// See PDB_MachineType enum.
support::ulittle16_t MachineType;
/// Pad to 64 bytes
support::ulittle32_t Reserved;
};
static_assert(sizeof(DbiStreamHeader) == 64, "Invalid DbiStreamHeader size!");
/// The header preceding the File Info Substream of the DBI stream.
struct FileInfoSubstreamHeader {
/// Total # of modules, should match number of records in the ModuleInfo
/// substream.
support::ulittle16_t NumModules;
/// Total # of source files. This value is not accurate because PDB actually
/// supports more than 64k source files, so we ignore it and compute the value
/// from other stream fields.
support::ulittle16_t NumSourceFiles;
/// Following this header the File Info Substream is laid out as follows:
/// ulittle16_t ModIndices[NumModules];
/// ulittle16_t ModFileCounts[NumModules];
/// ulittle32_t FileNameOffsets[NumSourceFiles];
/// char Names[][NumSourceFiles];
/// with the caveat that `NumSourceFiles` cannot be trusted, so
/// it is computed by summing the `ModFileCounts` array.
};
struct ModInfoFlags {
/// uint16_t fWritten : 1; // True if DbiModuleDescriptor is dirty
/// uint16_t fECEnabled : 1; // Is EC symbolic info present? (What is EC?)
/// uint16_t unused : 6; // Reserved
/// uint16_t iTSM : 8; // Type Server Index for this module
static const uint16_t HasECFlagMask = 0x2;
static const uint16_t TypeServerIndexMask = 0xFF00;
static const uint16_t TypeServerIndexShift = 8;
};
/// The header preceding each entry in the Module Info substream of the DBI
/// stream. Corresponds to the type MODI in the reference implementation.
struct ModuleInfoHeader {
/// Currently opened module. This field is a pointer in the reference
/// implementation, but that won't work on 64-bit systems, and anyway it
/// doesn't make sense to read a pointer from a file. For now it is unused,
/// so just ignore it.
support::ulittle32_t Mod;
/// First section contribution of this module.
SectionContrib SC;
/// See ModInfoFlags definition.
support::ulittle16_t Flags;
/// Stream Number of module debug info
support::ulittle16_t ModDiStream;
/// Size of local symbol debug info in above stream
support::ulittle32_t SymBytes;
/// Size of C11 line number info in above stream
support::ulittle32_t C11Bytes;
/// Size of C13 line number info in above stream
support::ulittle32_t C13Bytes;
/// Number of files contributing to this module
support::ulittle16_t NumFiles;
/// Padding so the next field is 4-byte aligned.
char Padding1[2];
/// Array of [0..NumFiles) DBI name buffer offsets. In the reference
/// implementation this field is a pointer. But since you can't portably
/// serialize a pointer, on 64-bit platforms they copy all the values except
/// this one into the 32-bit version of the struct and use that for
/// serialization. Regardless, this field is unused, it is only there to
/// store a pointer that can be accessed at runtime.
support::ulittle32_t FileNameOffs;
/// Name Index for src file name
support::ulittle32_t SrcFileNameNI;
/// Name Index for path to compiler PDB
support::ulittle32_t PdbFilePathNI;
/// Following this header are two zero terminated strings.
/// char ModuleName[];
/// char ObjFileName[];
};
// This is PSGSIHDR struct defined in
// https://github.com/Microsoft/microsoft-pdb/blob/master/PDB/dbi/gsi.h
struct PublicsStreamHeader {
support::ulittle32_t SymHash;
support::ulittle32_t AddrMap;
support::ulittle32_t NumThunks;
support::ulittle32_t SizeOfThunk;
support::ulittle16_t ISectThunkTable;
char Padding[2];
support::ulittle32_t OffThunkTable;
support::ulittle32_t NumSections;
};
// The header preceding the global TPI stream.
// This corresponds to `HDR` in PDB/dbi/tpi.h.
struct TpiStreamHeader {
struct EmbeddedBuf {
support::little32_t Off;
support::ulittle32_t Length;
};
support::ulittle32_t Version;
support::ulittle32_t HeaderSize;
support::ulittle32_t TypeIndexBegin;
support::ulittle32_t TypeIndexEnd;
support::ulittle32_t TypeRecordBytes;
// The following members correspond to `TpiHash` in PDB/dbi/tpi.h.
support::ulittle16_t HashStreamIndex;
support::ulittle16_t HashAuxStreamIndex;
support::ulittle32_t HashKeySize;
support::ulittle32_t NumHashBuckets;
EmbeddedBuf HashValueBuffer;
EmbeddedBuf IndexOffsetBuffer;
EmbeddedBuf HashAdjBuffer;
};
const uint32_t MinTpiHashBuckets = 0x1000;
const uint32_t MaxTpiHashBuckets = 0x40000;
/// The header preceding the global PDB Stream (Stream 1)
struct InfoStreamHeader {
support::ulittle32_t Version;
support::ulittle32_t Signature;
support::ulittle32_t Age;
codeview::GUID Guid;
};
/// The header preceding the /names stream.
struct PDBStringTableHeader {
support::ulittle32_t Signature; // PDBStringTableSignature
support::ulittle32_t HashVersion; // 1 or 2
support::ulittle32_t ByteSize; // Number of bytes of names buffer.
};
const uint32_t PDBStringTableSignature = 0xEFFEEFFE;
/// The header preceding the /src/headerblock stream.
struct SrcHeaderBlockHeader {
support::ulittle32_t Version; // PdbRaw_SrcHeaderBlockVer enumeration.
support::ulittle32_t Size; // Size of entire stream.
uint64_t FileTime; // Time stamp (Windows FILETIME format).
support::ulittle32_t Age; // Age
uint8_t Padding[44]; // Pad to 64 bytes.
};
static_assert(sizeof(SrcHeaderBlockHeader) == 64, "Incorrect struct size!");
/// A single file record entry within the /src/headerblock stream.
struct SrcHeaderBlockEntry {
support::ulittle32_t Size; // Record Length.
support::ulittle32_t Version; // PdbRaw_SrcHeaderBlockVer enumeration.
support::ulittle32_t CRC; // CRC of the original file contents.
support::ulittle32_t FileSize; // Size of original source file.
support::ulittle32_t FileNI; // String table index of file name.
support::ulittle32_t ObjNI; // String table index of object name.
support::ulittle32_t VFileNI; // String table index of virtual file name.
uint8_t Compression; // PDB_SourceCompression enumeration.
uint8_t IsVirtual; // Is this a virtual file (injected)?
short Padding; // Pad to 4 bytes.
char Reserved[8];
};
static_assert(sizeof(SrcHeaderBlockEntry) == 40, "Incorrect struct size!");
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ�i��r' r' & DebugInfo/PDB/Native/NativeRawSymbol.hnu �[��� //==- NativeRawSymbol.h - Native implementation of IPDBRawSymbol -*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVERAWSYMBOL_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVERAWSYMBOL_H
#include "llvm/DebugInfo/PDB/IPDBRawSymbol.h"
#include <cstdint>
#include <memory>
namespace llvm {
namespace pdb {
class NativeSession;
class NativeRawSymbol : public IPDBRawSymbol {
friend class SymbolCache;
virtual void initialize() {}
public:
NativeRawSymbol(NativeSession &PDBSession, PDB_SymType Tag,
SymIndexId SymbolId);
void dump(raw_ostream &OS, int Indent, PdbSymbolIdField ShowIdFields,
PdbSymbolIdField RecurseIdFields) const override;
std::unique_ptr<IPDBEnumSymbols>
findChildren(PDB_SymType Type) const override;
std::unique_ptr<IPDBEnumSymbols>
findChildren(PDB_SymType Type, StringRef Name,
PDB_NameSearchFlags Flags) const override;
std::unique_ptr<IPDBEnumSymbols>
findChildrenByAddr(PDB_SymType Type, StringRef Name,
PDB_NameSearchFlags Flags,
uint32_t Section, uint32_t Offset) const override;
std::unique_ptr<IPDBEnumSymbols>
findChildrenByVA(PDB_SymType Type, StringRef Name, PDB_NameSearchFlags Flags,
uint64_t VA) const override;
std::unique_ptr<IPDBEnumSymbols>
findChildrenByRVA(PDB_SymType Type, StringRef Name, PDB_NameSearchFlags Flags,
uint32_t RVA) const override;
std::unique_ptr<IPDBEnumSymbols>
findInlineFramesByAddr(uint32_t Section, uint32_t Offset) const override;
std::unique_ptr<IPDBEnumSymbols>
findInlineFramesByRVA(uint32_t RVA) const override;
std::unique_ptr<IPDBEnumSymbols>
findInlineFramesByVA(uint64_t VA) const override;
std::unique_ptr<IPDBEnumLineNumbers> findInlineeLines() const override;
std::unique_ptr<IPDBEnumLineNumbers>
findInlineeLinesByAddr(uint32_t Section, uint32_t Offset,
uint32_t Length) const override;
std::unique_ptr<IPDBEnumLineNumbers>
findInlineeLinesByRVA(uint32_t RVA, uint32_t Length) const override;
std::unique_ptr<IPDBEnumLineNumbers>
findInlineeLinesByVA(uint64_t VA, uint32_t Length) const override;
void getDataBytes(SmallVector<uint8_t, 32> &Bytes) const override;
void getFrontEndVersion(VersionInfo &Version) const override;
void getBackEndVersion(VersionInfo &Version) const override;
PDB_MemberAccess getAccess() const override;
uint32_t getAddressOffset() const override;
uint32_t getAddressSection() const override;
uint32_t getAge() const override;
SymIndexId getArrayIndexTypeId() const override;
uint32_t getBaseDataOffset() const override;
uint32_t getBaseDataSlot() const override;
SymIndexId getBaseSymbolId() const override;
PDB_BuiltinType getBuiltinType() const override;
uint32_t getBitPosition() const override;
PDB_CallingConv getCallingConvention() const override;
SymIndexId getClassParentId() const override;
std::string getCompilerName() const override;
uint32_t getCount() const override;
uint32_t getCountLiveRanges() const override;
PDB_Lang getLanguage() const override;
SymIndexId getLexicalParentId() const override;
std::string getLibraryName() const override;
uint32_t getLiveRangeStartAddressOffset() const override;
uint32_t getLiveRangeStartAddressSection() const override;
uint32_t getLiveRangeStartRelativeVirtualAddress() const override;
codeview::RegisterId getLocalBasePointerRegisterId() const override;
SymIndexId getLowerBoundId() const override;
uint32_t getMemorySpaceKind() const override;
std::string getName() const override;
uint32_t getNumberOfAcceleratorPointerTags() const override;
uint32_t getNumberOfColumns() const override;
uint32_t getNumberOfModifiers() const override;
uint32_t getNumberOfRegisterIndices() const override;
uint32_t getNumberOfRows() const override;
std::string getObjectFileName() const override;
uint32_t getOemId() const override;
SymIndexId getOemSymbolId() const override;
uint32_t getOffsetInUdt() const override;
PDB_Cpu getPlatform() const override;
uint32_t getRank() const override;
codeview::RegisterId getRegisterId() const override;
uint32_t getRegisterType() const override;
uint32_t getRelativeVirtualAddress() const override;
uint32_t getSamplerSlot() const override;
uint32_t getSignature() const override;
uint32_t getSizeInUdt() const override;
uint32_t getSlot() const override;
std::string getSourceFileName() const override;
std::unique_ptr<IPDBLineNumber> getSrcLineOnTypeDefn() const override;
uint32_t getStride() const override;
SymIndexId getSubTypeId() const override;
std::string getSymbolsFileName() const override;
SymIndexId getSymIndexId() const override;
uint32_t getTargetOffset() const override;
uint32_t getTargetRelativeVirtualAddress() const override;
uint64_t getTargetVirtualAddress() const override;
uint32_t getTargetSection() const override;
uint32_t getTextureSlot() const override;
uint32_t getTimeStamp() const override;
uint32_t getToken() const override;
SymIndexId getTypeId() const override;
uint32_t getUavSlot() const override;
std::string getUndecoratedName() const override;
std::string getUndecoratedNameEx(PDB_UndnameFlags Flags) const override;
SymIndexId getUnmodifiedTypeId() const override;
SymIndexId getUpperBoundId() const override;
Variant getValue() const override;
uint32_t getVirtualBaseDispIndex() const override;
uint32_t getVirtualBaseOffset() const override;
SymIndexId getVirtualTableShapeId() const override;
std::unique_ptr<PDBSymbolTypeBuiltin>
getVirtualBaseTableType() const override;
PDB_DataKind getDataKind() const override;
PDB_SymType getSymTag() const override;
codeview::GUID getGuid() const override;
int32_t getOffset() const override;
int32_t getThisAdjust() const override;
int32_t getVirtualBasePointerOffset() const override;
PDB_LocType getLocationType() const override;
PDB_Machine getMachineType() const override;
codeview::ThunkOrdinal getThunkOrdinal() const override;
uint64_t getLength() const override;
uint64_t getLiveRangeLength() const override;
uint64_t getVirtualAddress() const override;
PDB_UdtType getUdtKind() const override;
bool hasConstructor() const override;
bool hasCustomCallingConvention() const override;
bool hasFarReturn() const override;
bool isCode() const override;
bool isCompilerGenerated() const override;
bool isConstType() const override;
bool isEditAndContinueEnabled() const override;
bool isFunction() const override;
bool getAddressTaken() const override;
bool getNoStackOrdering() const override;
bool hasAlloca() const override;
bool hasAssignmentOperator() const override;
bool hasCTypes() const override;
bool hasCastOperator() const override;
bool hasDebugInfo() const override;
bool hasEH() const override;
bool hasEHa() const override;
bool hasInlAsm() const override;
bool hasInlineAttribute() const override;
bool hasInterruptReturn() const override;
bool hasFramePointer() const override;
bool hasLongJump() const override;
bool hasManagedCode() const override;
bool hasNestedTypes() const override;
bool hasNoInlineAttribute() const override;
bool hasNoReturnAttribute() const override;
bool hasOptimizedCodeDebugInfo() const override;
bool hasOverloadedOperator() const override;
bool hasSEH() const override;
bool hasSecurityChecks() const override;
bool hasSetJump() const override;
bool hasStrictGSCheck() const override;
bool isAcceleratorGroupSharedLocal() const override;
bool isAcceleratorPointerTagLiveRange() const override;
bool isAcceleratorStubFunction() const override;
bool isAggregated() const override;
bool isIntroVirtualFunction() const override;
bool isCVTCIL() const override;
bool isConstructorVirtualBase() const override;
bool isCxxReturnUdt() const override;
bool isDataAligned() const override;
bool isHLSLData() const override;
bool isHotpatchable() const override;
bool isIndirectVirtualBaseClass() const override;
bool isInterfaceUdt() const override;
bool isIntrinsic() const override;
bool isLTCG() const override;
bool isLocationControlFlowDependent() const override;
bool isMSILNetmodule() const override;
bool isMatrixRowMajor() const override;
bool isManagedCode() const override;
bool isMSILCode() const override;
bool isMultipleInheritance() const override;
bool isNaked() const override;
bool isNested() const override;
bool isOptimizedAway() const override;
bool isPacked() const override;
bool isPointerBasedOnSymbolValue() const override;
bool isPointerToDataMember() const override;
bool isPointerToMemberFunction() const override;
bool isPureVirtual() const override;
bool isRValueReference() const override;
bool isRefUdt() const override;
bool isReference() const override;
bool isRestrictedType() const override;
bool isReturnValue() const override;
bool isSafeBuffers() const override;
bool isScoped() const override;
bool isSdl() const override;
bool isSingleInheritance() const override;
bool isSplitted() const override;
bool isStatic() const override;
bool hasPrivateSymbols() const override;
bool isUnalignedType() const override;
bool isUnreached() const override;
bool isValueUdt() const override;
bool isVirtual() const override;
bool isVirtualBaseClass() const override;
bool isVirtualInheritance() const override;
bool isVolatileType() const override;
bool wasInlined() const override;
std::string getUnused() const override;
protected:
NativeSession &Session;
PDB_SymType Tag;
SymIndexId SymbolId;
};
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_NATIVERAWSYMBOL_H
PK hwFZ&g��
( DebugInfo/PDB/Native/InfoStreamBuilder.hnu �[��� //===- InfoStreamBuilder.h - PDB Info Stream Creation -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_INFOSTREAMBUILDER_H
#define LLVM_DEBUGINFO_PDB_NATIVE_INFOSTREAMBUILDER_H
#include "llvm/Support/Error.h"
#include "llvm/DebugInfo/CodeView/GUID.h"
#include "llvm/DebugInfo/PDB/Native/RawConstants.h"
namespace llvm {
class WritableBinaryStreamRef;
namespace msf {
class MSFBuilder;
struct MSFLayout;
}
namespace pdb {
class NamedStreamMap;
class InfoStreamBuilder {
public:
InfoStreamBuilder(msf::MSFBuilder &Msf, NamedStreamMap &NamedStreams);
InfoStreamBuilder(const InfoStreamBuilder &) = delete;
InfoStreamBuilder &operator=(const InfoStreamBuilder &) = delete;
void setVersion(PdbRaw_ImplVer V);
void addFeature(PdbRaw_FeatureSig Sig);
// If this is true, the PDB contents are hashed and this hash is used as
// PDB GUID and as Signature. The age is always 1.
void setHashPDBContentsToGUID(bool B);
// These only have an effect if hashPDBContentsToGUID() is false.
void setSignature(uint32_t S);
void setAge(uint32_t A);
void setGuid(codeview::GUID G);
bool hashPDBContentsToGUID() const { return HashPDBContentsToGUID; }
uint32_t getAge() const { return Age; }
codeview::GUID getGuid() const { return Guid; }
std::optional<uint32_t> getSignature() const { return Signature; }
uint32_t finalize();
Error finalizeMsfLayout();
Error commit(const msf::MSFLayout &Layout,
WritableBinaryStreamRef Buffer) const;
private:
msf::MSFBuilder &Msf;
std::vector<PdbRaw_FeatureSig> Features;
PdbRaw_ImplVer Ver;
uint32_t Age;
std::optional<uint32_t> Signature;
codeview::GUID Guid;
bool HashPDBContentsToGUID = false;
NamedStreamMap &NamedStreams;
};
} // namespace pdb
}
#endif
PK hwFZ��}# # # DebugInfo/PDB/Native/RawConstants.hnu �[��� //===- RawConstants.h -------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_RAWCONSTANTS_H
#define LLVM_DEBUGINFO_PDB_NATIVE_RAWCONSTANTS_H
#include "llvm/ADT/BitmaskEnum.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include <cstdint>
namespace llvm {
namespace pdb {
const uint16_t kInvalidStreamIndex = 0xFFFF;
enum PdbRaw_ImplVer : uint32_t {
PdbImplVC2 = 19941610,
PdbImplVC4 = 19950623,
PdbImplVC41 = 19950814,
PdbImplVC50 = 19960307,
PdbImplVC98 = 19970604,
PdbImplVC70Dep = 19990604, // deprecated
PdbImplVC70 = 20000404,
PdbImplVC80 = 20030901,
PdbImplVC110 = 20091201,
PdbImplVC140 = 20140508,
};
enum class PdbRaw_SrcHeaderBlockVer : uint32_t { SrcVerOne = 19980827 };
enum class PdbRaw_FeatureSig : uint32_t {
VC110 = PdbImplVC110,
VC140 = PdbImplVC140,
NoTypeMerge = 0x4D544F4E,
MinimalDebugInfo = 0x494E494D,
};
enum PdbRaw_Features : uint32_t {
PdbFeatureNone = 0x0,
PdbFeatureContainsIdStream = 0x1,
PdbFeatureMinimalDebugInfo = 0x2,
PdbFeatureNoTypeMerging = 0x4,
LLVM_MARK_AS_BITMASK_ENUM(/* LargestValue = */ PdbFeatureNoTypeMerging)
};
enum PdbRaw_DbiVer : uint32_t {
PdbDbiVC41 = 930803,
PdbDbiV50 = 19960307,
PdbDbiV60 = 19970606,
PdbDbiV70 = 19990903,
PdbDbiV110 = 20091201
};
enum PdbRaw_TpiVer : uint32_t {
PdbTpiV40 = 19950410,
PdbTpiV41 = 19951122,
PdbTpiV50 = 19961031,
PdbTpiV70 = 19990903,
PdbTpiV80 = 20040203,
};
enum PdbRaw_DbiSecContribVer : uint32_t {
DbiSecContribVer60 = 0xeffe0000 + 19970605,
DbiSecContribV2 = 0xeffe0000 + 20140516
};
enum SpecialStream : uint32_t {
// Stream 0 contains the copy of previous version of the MSF directory.
// We are not currently using it, but technically if we find the main
// MSF is corrupted, we could fallback to it.
OldMSFDirectory = 0,
StreamPDB = 1,
StreamTPI = 2,
StreamDBI = 3,
StreamIPI = 4,
kSpecialStreamCount
};
enum class DbgHeaderType : uint16_t {
FPO,
Exception,
Fixup,
OmapToSrc,
OmapFromSrc,
SectionHdr,
TokenRidMap,
Xdata,
Pdata,
NewFPO,
SectionHdrOrig,
Max
};
enum class OMFSegDescFlags : uint16_t {
None = 0,
Read = 1 << 0, // Segment is readable.
Write = 1 << 1, // Segment is writable.
Execute = 1 << 2, // Segment is executable.
AddressIs32Bit = 1 << 3, // Descriptor describes a 32-bit linear address.
IsSelector = 1 << 8, // Frame represents a selector.
IsAbsoluteAddress = 1 << 9, // Frame represents an absolute address.
IsGroup = 1 << 10, // If set, descriptor represents a group.
LLVM_MARK_AS_BITMASK_ENUM(/* LargestValue = */ IsGroup)
};
LLVM_ENABLE_BITMASK_ENUMS_IN_NAMESPACE();
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_RAWCONSTANTS_H
PK hwFZ�X�.� � $ DebugInfo/PDB/Native/DbiModuleList.hnu �[��� //===- DbiModuleList.h - PDB module information list ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_DBIMODULELIST_H
#define LLVM_DEBUGINFO_PDB_NATIVE_DBIMODULELIST_H
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/DebugInfo/PDB/Native/DbiModuleDescriptor.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <cstddef>
#include <cstdint>
#include <iterator>
#include <vector>
namespace llvm {
namespace pdb {
class DbiModuleList;
struct FileInfoSubstreamHeader;
class DbiModuleSourceFilesIterator
: public iterator_facade_base<DbiModuleSourceFilesIterator,
std::random_access_iterator_tag, StringRef> {
using BaseType = typename DbiModuleSourceFilesIterator::iterator_facade_base;
public:
DbiModuleSourceFilesIterator(const DbiModuleList &Modules, uint32_t Modi,
uint16_t Filei);
DbiModuleSourceFilesIterator() = default;
DbiModuleSourceFilesIterator(const DbiModuleSourceFilesIterator &R) = default;
DbiModuleSourceFilesIterator &
operator=(const DbiModuleSourceFilesIterator &R) = default;
bool operator==(const DbiModuleSourceFilesIterator &R) const;
const StringRef &operator*() const { return ThisValue; }
StringRef &operator*() { return ThisValue; }
bool operator<(const DbiModuleSourceFilesIterator &RHS) const;
std::ptrdiff_t operator-(const DbiModuleSourceFilesIterator &R) const;
DbiModuleSourceFilesIterator &operator+=(std::ptrdiff_t N);
DbiModuleSourceFilesIterator &operator-=(std::ptrdiff_t N);
private:
void setValue();
bool isEnd() const;
bool isCompatible(const DbiModuleSourceFilesIterator &R) const;
bool isUniversalEnd() const;
StringRef ThisValue;
const DbiModuleList *Modules{nullptr};
uint32_t Modi{0};
uint16_t Filei{0};
};
class DbiModuleList {
friend DbiModuleSourceFilesIterator;
public:
Error initialize(BinaryStreamRef ModInfo, BinaryStreamRef FileInfo);
Expected<StringRef> getFileName(uint32_t Index) const;
uint32_t getModuleCount() const;
uint32_t getSourceFileCount() const;
uint16_t getSourceFileCount(uint32_t Modi) const;
iterator_range<DbiModuleSourceFilesIterator>
source_files(uint32_t Modi) const;
DbiModuleDescriptor getModuleDescriptor(uint32_t Modi) const;
private:
Error initializeModInfo(BinaryStreamRef ModInfo);
Error initializeFileInfo(BinaryStreamRef FileInfo);
VarStreamArray<DbiModuleDescriptor> Descriptors;
FixedStreamArray<support::little32_t> FileNameOffsets;
FixedStreamArray<support::ulittle16_t> ModFileCountArray;
// For each module, there are multiple filenames, which can be obtained by
// knowing the index of the file. Given the index of the file, one can use
// that as an offset into the FileNameOffsets array, which contains the
// absolute offset of the file name in NamesBuffer. Thus, for each module
// we store the first index in the FileNameOffsets array for this module.
// The number of files for the corresponding module is stored in
// ModFileCountArray.
std::vector<uint32_t> ModuleInitialFileIndex;
// In order to provide random access into the Descriptors array, we iterate it
// once up front to find the offsets of the individual items and store them in
// this array.
std::vector<uint32_t> ModuleDescriptorOffsets;
const FileInfoSubstreamHeader *FileInfoHeader = nullptr;
BinaryStreamRef ModInfoSubstream;
BinaryStreamRef FileInfoSubstream;
BinaryStreamRef NamesBuffer;
};
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_DBIMODULELIST_H
PK hwFZw}�ߓ � ( DebugInfo/PDB/Native/NativeEnumSymbols.hnu �[��� //==- NativeEnumSymbols.h - Native Symbols Enumerator impl -------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVEENUMSYMBOLS_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVEENUMSYMBOLS_H
#include "llvm/DebugInfo/PDB/IPDBEnumChildren.h"
#include "llvm/DebugInfo/PDB/PDBSymbol.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
#include <vector>
namespace llvm {
namespace pdb {
class NativeSession;
class NativeEnumSymbols : public IPDBEnumChildren<PDBSymbol> {
public:
NativeEnumSymbols(NativeSession &Session, std::vector<SymIndexId> Symbols);
uint32_t getChildCount() const override;
std::unique_ptr<PDBSymbol> getChildAtIndex(uint32_t Index) const override;
std::unique_ptr<PDBSymbol> getNext() override;
void reset() override;
private:
std::vector<SymIndexId> Symbols;
uint32_t Index;
NativeSession &Session;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZS�DJ� � , DebugInfo/PDB/Native/NativeCompilandSymbol.hnu �[��� //===- NativeCompilandSymbol.h - native impl for compiland syms -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVECOMPILANDSYMBOL_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVECOMPILANDSYMBOL_H
#include "llvm/DebugInfo/PDB/Native/DbiModuleDescriptor.h"
#include "llvm/DebugInfo/PDB/Native/NativeRawSymbol.h"
namespace llvm {
namespace pdb {
class NativeCompilandSymbol : public NativeRawSymbol {
public:
NativeCompilandSymbol(NativeSession &Session, SymIndexId SymbolId,
DbiModuleDescriptor MI);
void dump(raw_ostream &OS, int Indent, PdbSymbolIdField ShowIdFields,
PdbSymbolIdField RecurseIdFields) const override;
PDB_SymType getSymTag() const override;
bool isEditAndContinueEnabled() const override;
SymIndexId getLexicalParentId() const override;
std::string getLibraryName() const override;
std::string getName() const override;
private:
DbiModuleDescriptor Module;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ.q�T
T
% DebugInfo/PDB/Native/NativeTypeEnum.hnu �[��� //===- NativeTypeEnum.h - info about enum type ------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEENUM_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEENUM_H
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
#include "llvm/DebugInfo/CodeView/TypeRecord.h"
#include "llvm/DebugInfo/PDB/IPDBRawSymbol.h"
#include "llvm/DebugInfo/PDB/Native/NativeRawSymbol.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
namespace llvm {
class raw_ostream;
namespace pdb {
class NativeTypeBuiltin;
class NativeTypeEnum : public NativeRawSymbol {
public:
NativeTypeEnum(NativeSession &Session, SymIndexId Id, codeview::TypeIndex TI,
codeview::EnumRecord Record);
NativeTypeEnum(NativeSession &Session, SymIndexId Id,
NativeTypeEnum &UnmodifiedType,
codeview::ModifierRecord Modifier);
~NativeTypeEnum() override;
void dump(raw_ostream &OS, int Indent, PdbSymbolIdField ShowIdFields,
PdbSymbolIdField RecurseIdFields) const override;
std::unique_ptr<IPDBEnumSymbols>
findChildren(PDB_SymType Type) const override;
PDB_BuiltinType getBuiltinType() const override;
PDB_SymType getSymTag() const override;
SymIndexId getUnmodifiedTypeId() const override;
bool hasConstructor() const override;
bool hasAssignmentOperator() const override;
bool hasCastOperator() const override;
uint64_t getLength() const override;
std::string getName() const override;
bool isConstType() const override;
bool isVolatileType() const override;
bool isUnalignedType() const override;
bool isNested() const override;
bool hasOverloadedOperator() const override;
bool hasNestedTypes() const override;
bool isIntrinsic() const override;
bool isPacked() const override;
bool isScoped() const override;
SymIndexId getTypeId() const override;
bool isRefUdt() const override;
bool isValueUdt() const override;
bool isInterfaceUdt() const override;
const NativeTypeBuiltin &getUnderlyingBuiltinType() const;
const codeview::EnumRecord &getEnumRecord() const { return *Record; }
protected:
codeview::TypeIndex Index;
std::optional<codeview::EnumRecord> Record;
NativeTypeEnum *UnmodifiedType = nullptr;
std::optional<codeview::ModifierRecord> Modifiers;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEENUM_H
PK hwFZ�R�R� � ( DebugInfo/PDB/Native/NativeTypeBuiltin.hnu �[��� //===- NativeTypeBuiltin.h ---------------------------------------- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEBUILTIN_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEBUILTIN_H
#include "llvm/DebugInfo/PDB/Native/NativeRawSymbol.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
namespace llvm {
namespace pdb {
class NativeSession;
class NativeTypeBuiltin : public NativeRawSymbol {
public:
NativeTypeBuiltin(NativeSession &PDBSession, SymIndexId Id,
codeview::ModifierOptions Mods, PDB_BuiltinType T,
uint64_t L);
~NativeTypeBuiltin() override;
void dump(raw_ostream &OS, int Indent, PdbSymbolIdField ShowIdFields,
PdbSymbolIdField RecurseIdFields) const override;
PDB_SymType getSymTag() const override;
PDB_BuiltinType getBuiltinType() const override;
bool isConstType() const override;
uint64_t getLength() const override;
bool isUnalignedType() const override;
bool isVolatileType() const override;
protected:
NativeSession &Session;
codeview::ModifierOptions Mods;
PDB_BuiltinType Type;
uint64_t Length;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ��߫ � ! DebugInfo/PDB/Native/EnumTables.hnu �[��� //===- EnumTables.h - Enum to string conversion tables ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_ENUMTABLES_H
#define LLVM_DEBUGINFO_PDB_NATIVE_ENUMTABLES_H
#include "llvm/ADT/ArrayRef.h"
namespace llvm {
template <typename T> struct EnumEntry;
namespace pdb {
ArrayRef<EnumEntry<uint16_t>> getOMFSegMapDescFlagNames();
}
}
#endif // LLVM_DEBUGINFO_PDB_NATIVE_ENUMTABLES_H
PK hwFZ_]��� � ' DebugInfo/PDB/Native/DbiStreamBuilder.hnu �[��� //===- DbiStreamBuilder.h - PDB Dbi Stream Creation -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_DBISTREAMBUILDER_H
#define LLVM_DEBUGINFO_PDB_NATIVE_DBISTREAMBUILDER_H
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/BinaryFormat/COFF.h"
#include "llvm/Object/COFF.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/Error.h"
#include "llvm/DebugInfo/CodeView/DebugFrameDataSubsection.h"
#include "llvm/DebugInfo/PDB/Native/PDBStringTableBuilder.h"
#include "llvm/DebugInfo/PDB/Native/RawConstants.h"
#include "llvm/DebugInfo/PDB/Native/RawTypes.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
#include "llvm/Support/BinaryByteStream.h"
#include "llvm/Support/BinaryStreamRef.h"
namespace llvm {
class BinaryStreamWriter;
namespace codeview {
struct FrameData;
}
namespace msf {
class MSFBuilder;
struct MSFLayout;
}
namespace pdb {
class DbiModuleDescriptorBuilder;
class DbiStreamBuilder {
public:
DbiStreamBuilder(msf::MSFBuilder &Msf);
~DbiStreamBuilder();
DbiStreamBuilder(const DbiStreamBuilder &) = delete;
DbiStreamBuilder &operator=(const DbiStreamBuilder &) = delete;
void setVersionHeader(PdbRaw_DbiVer V);
void setAge(uint32_t A);
void setBuildNumber(uint16_t B);
void setBuildNumber(uint8_t Major, uint8_t Minor);
void setPdbDllVersion(uint16_t V);
void setPdbDllRbld(uint16_t R);
void setFlags(uint16_t F);
void setMachineType(PDB_Machine M);
void setMachineType(COFF::MachineTypes M);
// Add given bytes as a new stream.
Error addDbgStream(pdb::DbgHeaderType Type, ArrayRef<uint8_t> Data);
uint32_t addECName(StringRef Name);
uint32_t calculateSerializedLength() const;
void setGlobalsStreamIndex(uint32_t Index);
void setPublicsStreamIndex(uint32_t Index);
void setSymbolRecordStreamIndex(uint32_t Index);
void addNewFpoData(const codeview::FrameData &FD);
void addOldFpoData(const object::FpoData &Fpo);
Expected<DbiModuleDescriptorBuilder &> addModuleInfo(StringRef ModuleName);
Error addModuleSourceFile(DbiModuleDescriptorBuilder &Module, StringRef File);
Expected<uint32_t> getSourceFileNameIndex(StringRef FileName);
Error finalizeMsfLayout();
Error commit(const msf::MSFLayout &Layout, WritableBinaryStreamRef MsfBuffer);
void addSectionContrib(const SectionContrib &SC) {
SectionContribs.emplace_back(SC);
}
// Populate the Section Map from COFF section headers.
void createSectionMap(ArrayRef<llvm::object::coff_section> SecHdrs);
private:
struct DebugStream {
std::function<Error(BinaryStreamWriter &)> WriteFn;
uint32_t Size = 0;
uint16_t StreamNumber = kInvalidStreamIndex;
};
Error finalize();
uint32_t calculateModiSubstreamSize() const;
uint32_t calculateNamesOffset() const;
uint32_t calculateSectionContribsStreamSize() const;
uint32_t calculateSectionMapStreamSize() const;
uint32_t calculateFileInfoSubstreamSize() const;
uint32_t calculateNamesBufferSize() const;
uint32_t calculateDbgStreamsSize() const;
Error generateFileInfoSubstream();
msf::MSFBuilder &Msf;
BumpPtrAllocator &Allocator;
std::optional<PdbRaw_DbiVer> VerHeader;
uint32_t Age;
uint16_t BuildNumber;
uint16_t PdbDllVersion;
uint16_t PdbDllRbld;
uint16_t Flags;
PDB_Machine MachineType;
uint32_t GlobalsStreamIndex = kInvalidStreamIndex;
uint32_t PublicsStreamIndex = kInvalidStreamIndex;
uint32_t SymRecordStreamIndex = kInvalidStreamIndex;
const DbiStreamHeader *Header;
std::vector<std::unique_ptr<DbiModuleDescriptorBuilder>> ModiList;
std::optional<codeview::DebugFrameDataSubsection> NewFpoData;
std::vector<object::FpoData> OldFpoData;
StringMap<uint32_t> SourceFileNames;
PDBStringTableBuilder ECNamesBuilder;
WritableBinaryStreamRef NamesBuffer;
MutableBinaryByteStream FileInfoBuffer;
std::vector<SectionContrib> SectionContribs;
std::vector<SecMapEntry> SectionMap;
std::array<std::optional<DebugStream>, (int)DbgHeaderType::Max> DbgStreams;
};
} // namespace pdb
}
#endif
PK hwFZ�p
' DebugInfo/PDB/Native/TpiStreamBuilder.hnu �[��� //===- TpiStreamBuilder.h - PDB Tpi Stream Creation -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_TPISTREAMBUILDER_H
#define LLVM_DEBUGINFO_PDB_NATIVE_TPISTREAMBUILDER_H
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
#include "llvm/DebugInfo/PDB/Native/RawConstants.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Error.h"
#include <vector>
namespace llvm {
class BinaryByteStream;
template <typename T> struct BinaryItemTraits;
template <> struct BinaryItemTraits<llvm::codeview::CVType> {
static size_t length(const codeview::CVType &Item) { return Item.length(); }
static ArrayRef<uint8_t> bytes(const codeview::CVType &Item) {
return Item.data();
}
};
namespace msf {
class MSFBuilder;
struct MSFLayout;
}
namespace pdb {
struct TpiStreamHeader;
class TpiStreamBuilder {
public:
explicit TpiStreamBuilder(msf::MSFBuilder &Msf, uint32_t StreamIdx);
~TpiStreamBuilder();
TpiStreamBuilder(const TpiStreamBuilder &) = delete;
TpiStreamBuilder &operator=(const TpiStreamBuilder &) = delete;
void setVersionHeader(PdbRaw_TpiVer Version);
void addTypeRecord(ArrayRef<uint8_t> Type, std::optional<uint32_t> Hash);
void addTypeRecords(ArrayRef<uint8_t> Types, ArrayRef<uint16_t> Sizes,
ArrayRef<uint32_t> Hashes);
Error finalizeMsfLayout();
uint32_t getRecordCount() const { return TypeRecordCount; }
Error commit(const msf::MSFLayout &Layout, WritableBinaryStreamRef Buffer);
uint32_t calculateSerializedLength();
private:
void updateTypeIndexOffsets(ArrayRef<uint16_t> Sizes);
uint32_t calculateHashBufferSize() const;
uint32_t calculateIndexOffsetSize() const;
Error finalize();
msf::MSFBuilder &Msf;
BumpPtrAllocator &Allocator;
uint32_t TypeRecordCount = 0;
size_t TypeRecordBytes = 0;
PdbRaw_TpiVer VerHeader = PdbRaw_TpiVer::PdbTpiV80;
std::vector<ArrayRef<uint8_t>> TypeRecBuffers;
std::vector<uint32_t> TypeHashes;
std::vector<codeview::TypeIndexOffset> TypeIndexOffsets;
uint32_t HashStreamIndex = kInvalidStreamIndex;
std::unique_ptr<BinaryByteStream> HashValueStream;
const TpiStreamHeader *Header;
uint32_t Idx;
};
} // namespace pdb
}
#endif
PK hwFZ��= ( DebugInfo/PDB/Native/ModuleDebugStream.hnu �[��� //===- ModuleDebugStream.h - PDB Module Info Stream Access ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_MODULEDEBUGSTREAM_H
#define LLVM_DEBUGINFO_PDB_NATIVE_MODULEDEBUGSTREAM_H
#include "llvm/ADT/iterator_range.h"
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/DebugSubsectionRecord.h"
#include "llvm/DebugInfo/PDB/Native/DbiModuleDescriptor.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <memory>
namespace llvm {
class BinaryStreamReader;
namespace codeview {
class DebugChecksumsSubsectionRef;
}
namespace msf {
class MappedBlockStream;
}
namespace pdb {
class ModuleDebugStreamRef {
using DebugSubsectionIterator = codeview::DebugSubsectionArray::Iterator;
public:
ModuleDebugStreamRef(const DbiModuleDescriptor &Module,
std::unique_ptr<msf::MappedBlockStream> Stream);
ModuleDebugStreamRef(ModuleDebugStreamRef &&Other) = default;
ModuleDebugStreamRef(const ModuleDebugStreamRef &Other) = default;
~ModuleDebugStreamRef();
Error reload();
uint32_t signature() const { return Signature; }
iterator_range<codeview::CVSymbolArray::Iterator>
symbols(bool *HadError) const;
const codeview::CVSymbolArray &getSymbolArray() const { return SymbolArray; }
const codeview::CVSymbolArray
getSymbolArrayForScope(uint32_t ScopeBegin) const;
BinarySubstreamRef getSymbolsSubstream() const;
BinarySubstreamRef getC11LinesSubstream() const;
BinarySubstreamRef getC13LinesSubstream() const;
BinarySubstreamRef getGlobalRefsSubstream() const;
ModuleDebugStreamRef &operator=(ModuleDebugStreamRef &&Other) = delete;
codeview::CVSymbol readSymbolAtOffset(uint32_t Offset) const;
iterator_range<DebugSubsectionIterator> subsections() const;
codeview::DebugSubsectionArray getSubsectionsArray() const {
return Subsections;
}
bool hasDebugSubsections() const;
Error commit();
Expected<codeview::DebugChecksumsSubsectionRef>
findChecksumsSubsection() const;
private:
Error reloadSerialize(BinaryStreamReader &Reader);
DbiModuleDescriptor Mod;
uint32_t Signature;
std::shared_ptr<msf::MappedBlockStream> Stream;
codeview::CVSymbolArray SymbolArray;
BinarySubstreamRef SymbolsSubstream;
BinarySubstreamRef C11LinesSubstream;
BinarySubstreamRef C13LinesSubstream;
BinarySubstreamRef GlobalRefsSubstream;
codeview::DebugSubsectionArray Subsections;
};
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_MODULEDEBUGSTREAM_H
PK hwFZ�%��
�
% DebugInfo/PDB/Native/PDBFileBuilder.hnu �[��� //===- PDBFileBuilder.h - PDB File Creation ---------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_PDBFILEBUILDER_H
#define LLVM_DEBUGINFO_PDB_NATIVE_PDBFILEBUILDER_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/DebugInfo/PDB/Native/HashTable.h"
#include "llvm/DebugInfo/PDB/Native/NamedStreamMap.h"
#include "llvm/DebugInfo/PDB/Native/PDBStringTableBuilder.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MemoryBuffer.h"
#include <memory>
namespace llvm {
class WritableBinaryStream;
namespace codeview {
struct GUID;
}
namespace msf {
class MSFBuilder;
struct MSFLayout;
}
namespace pdb {
struct SrcHeaderBlockEntry;
class DbiStreamBuilder;
class InfoStreamBuilder;
class GSIStreamBuilder;
class TpiStreamBuilder;
class PDBFileBuilder {
public:
explicit PDBFileBuilder(BumpPtrAllocator &Allocator);
~PDBFileBuilder();
PDBFileBuilder(const PDBFileBuilder &) = delete;
PDBFileBuilder &operator=(const PDBFileBuilder &) = delete;
Error initialize(uint32_t BlockSize);
msf::MSFBuilder &getMsfBuilder();
InfoStreamBuilder &getInfoBuilder();
DbiStreamBuilder &getDbiBuilder();
TpiStreamBuilder &getTpiBuilder();
TpiStreamBuilder &getIpiBuilder();
PDBStringTableBuilder &getStringTableBuilder();
GSIStreamBuilder &getGsiBuilder();
// If HashPDBContentsToGUID is true on the InfoStreamBuilder, Guid is filled
// with the computed PDB GUID on return.
Error commit(StringRef Filename, codeview::GUID *Guid);
Expected<uint32_t> getNamedStreamIndex(StringRef Name) const;
Error addNamedStream(StringRef Name, StringRef Data);
void addInjectedSource(StringRef Name, std::unique_ptr<MemoryBuffer> Buffer);
private:
struct InjectedSourceDescriptor {
// The full name of the stream that contains the contents of this injected
// source. This is built as a concatenation of the literal "/src/files"
// plus the "vname".
std::string StreamName;
// The exact name of the file name as specified by the user.
uint32_t NameIndex;
// The string table index of the "vname" of the file. As far as we
// understand, this is the same as the name, except it is lowercased and
// forward slashes are converted to backslashes.
uint32_t VNameIndex;
std::unique_ptr<MemoryBuffer> Content;
};
Error finalizeMsfLayout();
Expected<uint32_t> allocateNamedStream(StringRef Name, uint32_t Size);
void commitInjectedSources(WritableBinaryStream &MsfBuffer,
const msf::MSFLayout &Layout);
void commitSrcHeaderBlock(WritableBinaryStream &MsfBuffer,
const msf::MSFLayout &Layout);
BumpPtrAllocator &Allocator;
std::unique_ptr<msf::MSFBuilder> Msf;
std::unique_ptr<InfoStreamBuilder> Info;
std::unique_ptr<DbiStreamBuilder> Dbi;
std::unique_ptr<GSIStreamBuilder> Gsi;
std::unique_ptr<TpiStreamBuilder> Tpi;
std::unique_ptr<TpiStreamBuilder> Ipi;
PDBStringTableBuilder Strings;
StringTableHashTraits InjectedSourceHashTraits;
HashTable<SrcHeaderBlockEntry> InjectedSourceTable;
SmallVector<InjectedSourceDescriptor, 2> InjectedSources;
NamedStreamMap NamedStreams;
DenseMap<uint32_t, std::string> NamedStreamData;
};
}
}
#endif
PK hwFZ���\m m * DebugInfo/PDB/Native/DbiModuleDescriptor.hnu �[��� //===- DbiModuleDescriptor.h - PDB module information -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_DBIMODULEDESCRIPTOR_H
#define LLVM_DEBUGINFO_PDB_NATIVE_DBIMODULEDESCRIPTOR_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Error.h"
#include <cstdint>
namespace llvm {
template <typename T> struct VarStreamArrayExtractor;
namespace pdb {
struct ModuleInfoHeader;
struct SectionContrib;
class DbiModuleDescriptor {
friend class DbiStreamBuilder;
public:
DbiModuleDescriptor() = default;
DbiModuleDescriptor(const DbiModuleDescriptor &Info) = default;
DbiModuleDescriptor &operator=(const DbiModuleDescriptor &Info) = default;
static Error initialize(BinaryStreamRef Stream, DbiModuleDescriptor &Info);
bool hasECInfo() const;
uint16_t getTypeServerIndex() const;
uint16_t getModuleStreamIndex() const;
uint32_t getSymbolDebugInfoByteSize() const;
uint32_t getC11LineInfoByteSize() const;
uint32_t getC13LineInfoByteSize() const;
uint32_t getNumberOfFiles() const;
uint32_t getSourceFileNameIndex() const;
uint32_t getPdbFilePathNameIndex() const;
StringRef getModuleName() const;
StringRef getObjFileName() const;
uint32_t getRecordLength() const;
const SectionContrib &getSectionContrib() const;
private:
StringRef ModuleName;
StringRef ObjFileName;
const ModuleInfoHeader *Layout = nullptr;
};
} // end namespace pdb
template <> struct VarStreamArrayExtractor<pdb::DbiModuleDescriptor> {
Error operator()(BinaryStreamRef Stream, uint32_t &Length,
pdb::DbiModuleDescriptor &Info) {
if (auto EC = pdb::DbiModuleDescriptor::initialize(Stream, Info))
return EC;
Length = Info.getRecordLength();
return Error::success();
}
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_DBIMODULEDESCRIPTOR_H
PK hwFZ^��D ' DebugInfo/PDB/Native/NativeLineNumber.hnu �[��� //===- NativeLineNumber.h - Native line number implementation ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVELINENUMBER_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVELINENUMBER_H
#include "llvm/DebugInfo/CodeView/Line.h"
#include "llvm/DebugInfo/PDB/IPDBLineNumber.h"
namespace llvm {
namespace pdb {
class NativeSession;
class NativeLineNumber : public IPDBLineNumber {
public:
explicit NativeLineNumber(const NativeSession &Session,
const codeview::LineInfo Line,
uint32_t ColumnNumber, uint32_t Length,
uint32_t Section, uint32_t Offset,
uint32_t SrcFileId, uint32_t CompilandId);
uint32_t getLineNumber() const override;
uint32_t getLineNumberEnd() const override;
uint32_t getColumnNumber() const override;
uint32_t getColumnNumberEnd() const override;
uint32_t getAddressSection() const override;
uint32_t getAddressOffset() const override;
uint32_t getRelativeVirtualAddress() const override;
uint64_t getVirtualAddress() const override;
uint32_t getLength() const override;
uint32_t getSourceFileId() const override;
uint32_t getCompilandId() const override;
bool isStatement() const override;
private:
const NativeSession &Session;
const codeview::LineInfo Line;
uint32_t ColumnNumber;
uint32_t Section;
uint32_t Offset;
uint32_t Length;
uint32_t SrcFileId;
uint32_t CompilandId;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZG��� � ' DebugInfo/PDB/Native/GSIStreamBuilder.hnu �[��� //===- GSIStreamBuilder.h - PDB Publics/Globals Stream Creation -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_GSISTREAMBUILDER_H
#define LLVM_DEBUGINFO_PDB_NATIVE_GSISTREAMBUILDER_H
#include "llvm/ADT/DenseSet.h"
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/PDB/Native/GlobalsStream.h"
#include "llvm/DebugInfo/PDB/Native/RawConstants.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace codeview {
class ConstantSym;
class DataSym;
class ProcRefSym;
} // namespace codeview
template <typename T> struct BinaryItemTraits;
template <> struct BinaryItemTraits<codeview::CVSymbol> {
static size_t length(const codeview::CVSymbol &Item) {
return Item.RecordData.size();
}
static ArrayRef<uint8_t> bytes(const codeview::CVSymbol &Item) {
return Item.RecordData;
}
};
namespace msf {
class MSFBuilder;
struct MSFLayout;
} // namespace msf
namespace pdb {
struct GSIHashStreamBuilder;
struct BulkPublic;
struct SymbolDenseMapInfo;
class GSIStreamBuilder {
public:
explicit GSIStreamBuilder(msf::MSFBuilder &Msf);
~GSIStreamBuilder();
GSIStreamBuilder(const GSIStreamBuilder &) = delete;
GSIStreamBuilder &operator=(const GSIStreamBuilder &) = delete;
Error finalizeMsfLayout();
Error commit(const msf::MSFLayout &Layout, WritableBinaryStreamRef Buffer);
uint32_t getPublicsStreamIndex() const { return PublicsStreamIndex; }
uint32_t getGlobalsStreamIndex() const { return GlobalsStreamIndex; }
uint32_t getRecordStreamIndex() const { return RecordStreamIndex; }
// Add public symbols in bulk.
void addPublicSymbols(std::vector<BulkPublic> &&PublicsIn);
void addGlobalSymbol(const codeview::ProcRefSym &Sym);
void addGlobalSymbol(const codeview::DataSym &Sym);
void addGlobalSymbol(const codeview::ConstantSym &Sym);
// Add a pre-serialized global symbol record. The caller must ensure that the
// symbol data remains alive until the global stream is committed to disk.
void addGlobalSymbol(const codeview::CVSymbol &Sym);
private:
void finalizePublicBuckets();
void finalizeGlobalBuckets(uint32_t RecordZeroOffset);
template <typename T> void serializeAndAddGlobal(const T &Symbol);
uint32_t calculatePublicsHashStreamSize() const;
uint32_t calculateGlobalsHashStreamSize() const;
Error commitSymbolRecordStream(WritableBinaryStreamRef Stream);
Error commitPublicsHashStream(WritableBinaryStreamRef Stream);
Error commitGlobalsHashStream(WritableBinaryStreamRef Stream);
uint32_t PublicsStreamIndex = kInvalidStreamIndex;
uint32_t GlobalsStreamIndex = kInvalidStreamIndex;
uint32_t RecordStreamIndex = kInvalidStreamIndex;
msf::MSFBuilder &Msf;
std::unique_ptr<GSIHashStreamBuilder> PSH;
std::unique_ptr<GSIHashStreamBuilder> GSH;
// List of all of the public records. These are stored unserialized so that we
// can defer copying the names until we are ready to commit the PDB.
std::vector<BulkPublic> Publics;
// List of all of the global records.
std::vector<codeview::CVSymbol> Globals;
// Hash table for deduplicating global typedef and constant records. Only used
// for globals.
llvm::DenseSet<codeview::CVSymbol, SymbolDenseMapInfo> GlobalsSeen;
};
/// This struct is equivalent to codeview::PublicSym32, but it has been
/// optimized for size to speed up bulk serialization and sorting operations
/// during PDB writing.
struct BulkPublic {
BulkPublic() : Flags(0), BucketIdx(0) {}
const char *Name = nullptr;
uint32_t NameLen = 0;
// Offset of the symbol record in the publics stream.
uint32_t SymOffset = 0;
// Section offset of the symbol in the image.
uint32_t Offset = 0;
// Section index of the section containing the symbol.
uint16_t Segment = 0;
// PublicSymFlags.
uint16_t Flags : 4;
// GSI hash table bucket index. The maximum value is IPHR_HASH.
uint16_t BucketIdx : 12;
static_assert(IPHR_HASH <= 1 << 12, "bitfield too small");
void setFlags(codeview::PublicSymFlags F) {
Flags = uint32_t(F);
assert(Flags == uint32_t(F) && "truncated");
}
void setBucketIdx(uint16_t B) {
assert(B < IPHR_HASH);
BucketIdx = B;
}
StringRef getName() const { return StringRef(Name, NameLen); }
};
static_assert(sizeof(BulkPublic) <= 24, "unexpected size increase");
static_assert(std::is_trivially_copyable<BulkPublic>::value,
"should be trivial");
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ��e� DebugInfo/PDB/Native/Hash.hnu �[��� //===- Hash.h - PDB hash functions ------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_HASH_H
#define LLVM_DEBUGINFO_PDB_NATIVE_HASH_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include <cstdint>
namespace llvm {
namespace pdb {
uint32_t hashStringV1(StringRef Str);
uint32_t hashStringV2(StringRef Str);
uint32_t hashBufferV8(ArrayRef<uint8_t> Data);
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_HASH_H
PK hwFZ�8f� ! DebugInfo/PDB/Native/Formatters.hnu �[��� //===- Formatters.h ---------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_FORMATTERS_H
#define LLVM_DEBUGINFO_PDB_NATIVE_FORMATTERS_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/Formatters.h"
#include "llvm/DebugInfo/PDB/Native/RawConstants.h"
#include "llvm/DebugInfo/PDB/Native/RawTypes.h"
#include "llvm/Support/FormatProviders.h"
#define FORMAT_CASE(Value, Name) \
case Value: \
Stream << Name; \
break;
namespace llvm {
template <> struct format_provider<pdb::PdbRaw_ImplVer> {
static void format(const pdb::PdbRaw_ImplVer &V, llvm::raw_ostream &Stream,
StringRef Style) {
switch (V) {
FORMAT_CASE(pdb::PdbRaw_ImplVer::PdbImplVC110, "VC110")
FORMAT_CASE(pdb::PdbRaw_ImplVer::PdbImplVC140, "VC140")
FORMAT_CASE(pdb::PdbRaw_ImplVer::PdbImplVC2, "VC2")
FORMAT_CASE(pdb::PdbRaw_ImplVer::PdbImplVC4, "VC4")
FORMAT_CASE(pdb::PdbRaw_ImplVer::PdbImplVC41, "VC41")
FORMAT_CASE(pdb::PdbRaw_ImplVer::PdbImplVC50, "VC50")
FORMAT_CASE(pdb::PdbRaw_ImplVer::PdbImplVC70, "VC70")
FORMAT_CASE(pdb::PdbRaw_ImplVer::PdbImplVC70Dep, "VC70Dep")
FORMAT_CASE(pdb::PdbRaw_ImplVer::PdbImplVC80, "VC80")
FORMAT_CASE(pdb::PdbRaw_ImplVer::PdbImplVC98, "VC98")
}
}
};
}
#endif
PK hwFZ% �a a ! DebugInfo/PDB/Native/InfoStream.hnu �[��� //===- InfoStream.h - PDB Info Stream (Stream 1) Access ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_INFOSTREAM_H
#define LLVM_DEBUGINFO_PDB_NATIVE_INFOSTREAM_H
#include "llvm/ADT/StringMap.h"
#include "llvm/DebugInfo/CodeView/GUID.h"
#include "llvm/DebugInfo/PDB/Native/NamedStreamMap.h"
#include "llvm/DebugInfo/PDB/Native/RawConstants.h"
#include "llvm/Support/BinaryStream.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace pdb {
struct InfoStreamHeader;
class InfoStream {
friend class InfoStreamBuilder;
public:
InfoStream(std::unique_ptr<BinaryStream> Stream);
Error reload();
uint32_t getStreamSize() const;
const InfoStreamHeader *getHeader() const { return Header; }
bool containsIdStream() const;
PdbRaw_ImplVer getVersion() const;
uint32_t getSignature() const;
uint32_t getAge() const;
codeview::GUID getGuid() const;
uint32_t getNamedStreamMapByteSize() const;
PdbRaw_Features getFeatures() const;
ArrayRef<PdbRaw_FeatureSig> getFeatureSignatures() const;
const NamedStreamMap &getNamedStreams() const;
BinarySubstreamRef getNamedStreamsBuffer() const;
Expected<uint32_t> getNamedStreamIndex(llvm::StringRef Name) const;
StringMap<uint32_t> named_streams() const;
private:
std::unique_ptr<BinaryStream> Stream;
const InfoStreamHeader *Header;
BinarySubstreamRef SubNamedStreams;
std::vector<PdbRaw_FeatureSig> FeatureSignatures;
PdbRaw_Features Features = PdbFeatureNone;
uint32_t NamedStreamMapByteSize = 0;
NamedStreamMap NamedStreams;
};
}
}
#endif
PK hwFZ[�)� � & DebugInfo/PDB/Native/NativeEnumTypes.hnu �[��� //==- NativeEnumTypes.h - Native Type Enumerator impl ------------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVEENUMTYPES_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVEENUMTYPES_H
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
#include "llvm/DebugInfo/PDB/IPDBEnumChildren.h"
#include "llvm/DebugInfo/PDB/PDBSymbol.h"
#include <vector>
namespace llvm {
namespace codeview {
class LazyRandomTypeCollection;
}
namespace pdb {
class NativeSession;
class NativeEnumTypes : public IPDBEnumChildren<PDBSymbol> {
public:
NativeEnumTypes(NativeSession &Session,
codeview::LazyRandomTypeCollection &TypeCollection,
std::vector<codeview::TypeLeafKind> Kinds);
NativeEnumTypes(NativeSession &Session,
std::vector<codeview::TypeIndex> Indices);
uint32_t getChildCount() const override;
std::unique_ptr<PDBSymbol> getChildAtIndex(uint32_t Index) const override;
std::unique_ptr<PDBSymbol> getNext() override;
void reset() override;
private:
std::vector<codeview::TypeIndex> Matches;
uint32_t Index;
NativeSession &Session;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZl���\ \ ( DebugInfo/PDB/Native/NativeTypePointer.hnu �[��� //===- NativeTypePointer.h - info about pointer type -------------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEPOINTER_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEPOINTER_H
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
#include "llvm/DebugInfo/CodeView/TypeRecord.h"
#include "llvm/DebugInfo/PDB/IPDBRawSymbol.h"
#include "llvm/DebugInfo/PDB/Native/NativeRawSymbol.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
namespace llvm {
namespace pdb {
class NativeTypePointer : public NativeRawSymbol {
public:
// Create a pointer record for a simple type.
NativeTypePointer(NativeSession &Session, SymIndexId Id,
codeview::TypeIndex TI);
// Create a pointer record for a non-simple type.
NativeTypePointer(NativeSession &Session, SymIndexId Id,
codeview::TypeIndex TI, codeview::PointerRecord PR);
~NativeTypePointer() override;
void dump(raw_ostream &OS, int Indent, PdbSymbolIdField ShowIdFields,
PdbSymbolIdField RecurseIdFields) const override;
SymIndexId getClassParentId() const override;
bool isConstType() const override;
uint64_t getLength() const override;
bool isReference() const override;
bool isRValueReference() const override;
bool isPointerToDataMember() const override;
bool isPointerToMemberFunction() const override;
SymIndexId getTypeId() const override;
bool isRestrictedType() const override;
bool isVolatileType() const override;
bool isUnalignedType() const override;
bool isSingleInheritance() const override;
bool isMultipleInheritance() const override;
bool isVirtualInheritance() const override;
protected:
bool isMemberPointer() const;
codeview::TypeIndex TI;
std::optional<codeview::PointerRecord> Record;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEPOINTER_H
PK hwFZƇ��f f ' DebugInfo/PDB/Native/NativeSourceFile.hnu �[��� //===- NativeSourceFile.h - Native source file implementation ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVESOURCEFILE_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVESOURCEFILE_H
#include "llvm/DebugInfo/CodeView/DebugChecksumsSubsection.h"
#include "llvm/DebugInfo/PDB/IPDBSourceFile.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolCompiland;
template <typename ChildType> class IPDBEnumChildren;
class NativeSession;
class NativeSourceFile : public IPDBSourceFile {
public:
explicit NativeSourceFile(NativeSession &Session, uint32_t FileId,
const codeview::FileChecksumEntry &Checksum);
std::string getFileName() const override;
uint32_t getUniqueId() const override;
std::string getChecksum() const override;
PDB_Checksum getChecksumType() const override;
std::unique_ptr<IPDBEnumChildren<PDBSymbolCompiland>>
getCompilands() const override;
private:
NativeSession &Session;
uint32_t FileId;
const codeview::FileChecksumEntry Checksum;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ�G�t( t( DebugInfo/PDB/Native/HashTable.hnu �[��� //===- HashTable.h - PDB Hash Table -----------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_HASHTABLE_H
#define LLVM_DEBUGINFO_PDB_NATIVE_HASHTABLE_H
#include "llvm/ADT/SparseBitVector.h"
#include "llvm/ADT/iterator.h"
#include "llvm/DebugInfo/PDB/Native/RawError.h"
#include "llvm/Support/BinaryStreamReader.h"
#include "llvm/Support/BinaryStreamWriter.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <iterator>
#include <utility>
#include <vector>
namespace llvm {
namespace pdb {
Error readSparseBitVector(BinaryStreamReader &Stream, SparseBitVector<> &V);
Error writeSparseBitVector(BinaryStreamWriter &Writer, SparseBitVector<> &Vec);
template <typename ValueT> class HashTable;
template <typename ValueT>
class HashTableIterator
: public iterator_facade_base<HashTableIterator<ValueT>,
std::forward_iterator_tag,
const std::pair<uint32_t, ValueT>> {
using BaseT = typename HashTableIterator::iterator_facade_base;
friend HashTable<ValueT>;
HashTableIterator(const HashTable<ValueT> &Map, uint32_t Index,
bool IsEnd)
: Map(&Map), Index(Index), IsEnd(IsEnd) {}
public:
HashTableIterator(const HashTable<ValueT> &Map) : Map(&Map) {
int I = Map.Present.find_first();
if (I == -1) {
Index = 0;
IsEnd = true;
} else {
Index = static_cast<uint32_t>(I);
IsEnd = false;
}
}
HashTableIterator(const HashTableIterator &R) = default;
HashTableIterator &operator=(const HashTableIterator &R) {
Map = R.Map;
return *this;
}
bool operator==(const HashTableIterator &R) const {
if (IsEnd && R.IsEnd)
return true;
if (IsEnd != R.IsEnd)
return false;
return (Map == R.Map) && (Index == R.Index);
}
const std::pair<uint32_t, ValueT> &operator*() const {
assert(Map->Present.test(Index));
return Map->Buckets[Index];
}
// Implement postfix op++ in terms of prefix op++ by using the superclass
// implementation.
using BaseT::operator++;
HashTableIterator &operator++() {
while (Index < Map->Buckets.size()) {
++Index;
if (Map->Present.test(Index))
return *this;
}
IsEnd = true;
return *this;
}
private:
bool isEnd() const { return IsEnd; }
uint32_t index() const { return Index; }
const HashTable<ValueT> *Map;
uint32_t Index;
bool IsEnd;
};
template <typename ValueT>
class HashTable {
struct Header {
support::ulittle32_t Size;
support::ulittle32_t Capacity;
};
using BucketList = std::vector<std::pair<uint32_t, ValueT>>;
public:
using const_iterator = HashTableIterator<ValueT>;
friend const_iterator;
HashTable() { Buckets.resize(8); }
explicit HashTable(uint32_t Capacity) {
Buckets.resize(Capacity);
}
Error load(BinaryStreamReader &Stream) {
const Header *H;
if (auto EC = Stream.readObject(H))
return EC;
if (H->Capacity == 0)
return make_error<RawError>(raw_error_code::corrupt_file,
"Invalid Hash Table Capacity");
if (H->Size > maxLoad(H->Capacity))
return make_error<RawError>(raw_error_code::corrupt_file,
"Invalid Hash Table Size");
Buckets.resize(H->Capacity);
if (auto EC = readSparseBitVector(Stream, Present))
return EC;
if (Present.count() != H->Size)
return make_error<RawError>(raw_error_code::corrupt_file,
"Present bit vector does not match size!");
if (auto EC = readSparseBitVector(Stream, Deleted))
return EC;
if (Present.intersects(Deleted))
return make_error<RawError>(raw_error_code::corrupt_file,
"Present bit vector intersects deleted!");
for (uint32_t P : Present) {
if (auto EC = Stream.readInteger(Buckets[P].first))
return EC;
const ValueT *Value;
if (auto EC = Stream.readObject(Value))
return EC;
Buckets[P].second = *Value;
}
return Error::success();
}
uint32_t calculateSerializedLength() const {
uint32_t Size = sizeof(Header);
constexpr int BitsPerWord = 8 * sizeof(uint32_t);
int NumBitsP = Present.find_last() + 1;
int NumBitsD = Deleted.find_last() + 1;
uint32_t NumWordsP = alignTo(NumBitsP, BitsPerWord) / BitsPerWord;
uint32_t NumWordsD = alignTo(NumBitsD, BitsPerWord) / BitsPerWord;
// Present bit set number of words (4 bytes), followed by that many actual
// words (4 bytes each).
Size += sizeof(uint32_t);
Size += NumWordsP * sizeof(uint32_t);
// Deleted bit set number of words (4 bytes), followed by that many actual
// words (4 bytes each).
Size += sizeof(uint32_t);
Size += NumWordsD * sizeof(uint32_t);
// One (Key, ValueT) pair for each entry Present.
Size += (sizeof(uint32_t) + sizeof(ValueT)) * size();
return Size;
}
Error commit(BinaryStreamWriter &Writer) const {
Header H;
H.Size = size();
H.Capacity = capacity();
if (auto EC = Writer.writeObject(H))
return EC;
if (auto EC = writeSparseBitVector(Writer, Present))
return EC;
if (auto EC = writeSparseBitVector(Writer, Deleted))
return EC;
for (const auto &Entry : *this) {
if (auto EC = Writer.writeInteger(Entry.first))
return EC;
if (auto EC = Writer.writeObject(Entry.second))
return EC;
}
return Error::success();
}
void clear() {
Buckets.resize(8);
Present.clear();
Deleted.clear();
}
bool empty() const { return size() == 0; }
uint32_t capacity() const { return Buckets.size(); }
uint32_t size() const { return Present.count(); }
const_iterator begin() const { return const_iterator(*this); }
const_iterator end() const { return const_iterator(*this, 0, true); }
/// Find the entry whose key has the specified hash value, using the specified
/// traits defining hash function and equality.
template <typename Key, typename TraitsT>
const_iterator find_as(const Key &K, TraitsT &Traits) const {
uint32_t H = Traits.hashLookupKey(K) % capacity();
uint32_t I = H;
std::optional<uint32_t> FirstUnused;
do {
if (isPresent(I)) {
if (Traits.storageKeyToLookupKey(Buckets[I].first) == K)
return const_iterator(*this, I, false);
} else {
if (!FirstUnused)
FirstUnused = I;
// Insertion occurs via linear probing from the slot hint, and will be
// inserted at the first empty / deleted location. Therefore, if we are
// probing and find a location that is neither present nor deleted, then
// nothing must have EVER been inserted at this location, and thus it is
// not possible for a matching value to occur later.
if (!isDeleted(I))
break;
}
I = (I + 1) % capacity();
} while (I != H);
// The only way FirstUnused would not be set is if every single entry in the
// table were Present. But this would violate the load factor constraints
// that we impose, so it should never happen.
assert(FirstUnused);
return const_iterator(*this, *FirstUnused, true);
}
/// Set the entry using a key type that the specified Traits can convert
/// from a real key to an internal key.
template <typename Key, typename TraitsT>
bool set_as(const Key &K, ValueT V, TraitsT &Traits) {
return set_as_internal(K, std::move(V), Traits, std::nullopt);
}
template <typename Key, typename TraitsT>
ValueT get(const Key &K, TraitsT &Traits) const {
auto Iter = find_as(K, Traits);
assert(Iter != end());
return (*Iter).second;
}
protected:
bool isPresent(uint32_t K) const { return Present.test(K); }
bool isDeleted(uint32_t K) const { return Deleted.test(K); }
BucketList Buckets;
mutable SparseBitVector<> Present;
mutable SparseBitVector<> Deleted;
private:
/// Set the entry using a key type that the specified Traits can convert
/// from a real key to an internal key.
template <typename Key, typename TraitsT>
bool set_as_internal(const Key &K, ValueT V, TraitsT &Traits,
std::optional<uint32_t> InternalKey) {
auto Entry = find_as(K, Traits);
if (Entry != end()) {
assert(isPresent(Entry.index()));
assert(Traits.storageKeyToLookupKey(Buckets[Entry.index()].first) == K);
// We're updating, no need to do anything special.
Buckets[Entry.index()].second = V;
return false;
}
auto &B = Buckets[Entry.index()];
assert(!isPresent(Entry.index()));
assert(Entry.isEnd());
B.first = InternalKey ? *InternalKey : Traits.lookupKeyToStorageKey(K);
B.second = V;
Present.set(Entry.index());
Deleted.reset(Entry.index());
grow(Traits);
assert((find_as(K, Traits)) != end());
return true;
}
static uint32_t maxLoad(uint32_t capacity) { return capacity * 2 / 3 + 1; }
template <typename TraitsT>
void grow(TraitsT &Traits) {
uint32_t S = size();
uint32_t MaxLoad = maxLoad(capacity());
if (S < maxLoad(capacity()))
return;
assert(capacity() != UINT32_MAX && "Can't grow Hash table!");
uint32_t NewCapacity = (capacity() <= INT32_MAX) ? MaxLoad * 2 : UINT32_MAX;
// Growing requires rebuilding the table and re-hashing every item. Make a
// copy with a larger capacity, insert everything into the copy, then swap
// it in.
HashTable NewMap(NewCapacity);
for (auto I : Present) {
auto LookupKey = Traits.storageKeyToLookupKey(Buckets[I].first);
NewMap.set_as_internal(LookupKey, Buckets[I].second, Traits,
Buckets[I].first);
}
Buckets.swap(NewMap.Buckets);
std::swap(Present, NewMap.Present);
std::swap(Deleted, NewMap.Deleted);
assert(capacity() == NewCapacity);
assert(size() == S);
}
};
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_HASHTABLE_H
PK hwFZS�H�� � DebugInfo/PDB/Native/InputFile.hnu �[��� //===- InputFile.h -------------------------------------------- *- C++ --*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_INPUTFILE_H
#define LLVM_DEBUGINFO_PDB_NATIVE_INPUTFILE_H
#include "llvm/ADT/PointerUnion.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/iterator.h"
#include "llvm/DebugInfo/CodeView/DebugChecksumsSubsection.h"
#include "llvm/DebugInfo/CodeView/StringsAndChecksums.h"
#include "llvm/DebugInfo/PDB/Native/LinePrinter.h"
#include "llvm/DebugInfo/PDB/Native/ModuleDebugStream.h"
#include "llvm/Object/Binary.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace codeview {
class LazyRandomTypeCollection;
}
namespace object {
class COFFObjectFile;
} // namespace object
namespace pdb {
class InputFile;
class LinePrinter;
class PDBFile;
class NativeSession;
class SymbolGroupIterator;
class SymbolGroup;
class InputFile {
InputFile();
std::unique_ptr<NativeSession> PdbSession;
object::OwningBinary<object::Binary> CoffObject;
std::unique_ptr<MemoryBuffer> UnknownFile;
PointerUnion<PDBFile *, object::COFFObjectFile *, MemoryBuffer *> PdbOrObj;
using TypeCollectionPtr = std::unique_ptr<codeview::LazyRandomTypeCollection>;
TypeCollectionPtr Types;
TypeCollectionPtr Ids;
enum TypeCollectionKind { kTypes, kIds };
codeview::LazyRandomTypeCollection &
getOrCreateTypeCollection(TypeCollectionKind Kind);
public:
InputFile(PDBFile *Pdb) { PdbOrObj = Pdb; }
InputFile(object::COFFObjectFile *Obj) { PdbOrObj = Obj; }
InputFile(MemoryBuffer *Buffer) { PdbOrObj = Buffer; }
~InputFile();
InputFile(InputFile &&Other) = default;
static Expected<InputFile> open(StringRef Path,
bool AllowUnknownFile = false);
PDBFile &pdb();
const PDBFile &pdb() const;
object::COFFObjectFile &obj();
const object::COFFObjectFile &obj() const;
MemoryBuffer &unknown();
const MemoryBuffer &unknown() const;
StringRef getFilePath() const;
bool hasTypes() const;
bool hasIds() const;
codeview::LazyRandomTypeCollection &types();
codeview::LazyRandomTypeCollection &ids();
iterator_range<SymbolGroupIterator> symbol_groups();
SymbolGroupIterator symbol_groups_begin();
SymbolGroupIterator symbol_groups_end();
bool isPdb() const;
bool isObj() const;
bool isUnknown() const;
};
class SymbolGroup {
friend class SymbolGroupIterator;
public:
explicit SymbolGroup(InputFile *File, uint32_t GroupIndex = 0);
Expected<StringRef> getNameFromStringTable(uint32_t Offset) const;
Expected<StringRef> getNameFromChecksums(uint32_t Offset) const;
void formatFromFileName(LinePrinter &Printer, StringRef File,
bool Append = false) const;
void formatFromChecksumsOffset(LinePrinter &Printer, uint32_t Offset,
bool Append = false) const;
StringRef name() const;
codeview::DebugSubsectionArray getDebugSubsections() const {
return Subsections;
}
const ModuleDebugStreamRef &getPdbModuleStream() const;
const InputFile &getFile() const { return *File; }
InputFile &getFile() { return *File; }
bool hasDebugStream() const { return DebugStream != nullptr; }
private:
void initializeForPdb(uint32_t Modi);
void updatePdbModi(uint32_t Modi);
void updateDebugS(const codeview::DebugSubsectionArray &SS);
void rebuildChecksumMap();
InputFile *File = nullptr;
StringRef Name;
codeview::DebugSubsectionArray Subsections;
std::shared_ptr<ModuleDebugStreamRef> DebugStream;
codeview::StringsAndChecksumsRef SC;
StringMap<codeview::FileChecksumEntry> ChecksumsByFile;
};
class SymbolGroupIterator
: public iterator_facade_base<SymbolGroupIterator,
std::forward_iterator_tag, SymbolGroup> {
public:
SymbolGroupIterator();
explicit SymbolGroupIterator(InputFile &File);
SymbolGroupIterator(const SymbolGroupIterator &Other) = default;
SymbolGroupIterator &operator=(const SymbolGroupIterator &R) = default;
const SymbolGroup &operator*() const;
SymbolGroup &operator*();
bool operator==(const SymbolGroupIterator &R) const;
SymbolGroupIterator &operator++();
private:
void scanToNextDebugS();
bool isEnd() const;
uint32_t Index = 0;
std::optional<object::section_iterator> SectionIter;
SymbolGroup Value;
};
Expected<ModuleDebugStreamRef>
getModuleDebugStream(PDBFile &File, StringRef &ModuleName, uint32_t Index);
Expected<ModuleDebugStreamRef> getModuleDebugStream(PDBFile &File,
uint32_t Index);
bool shouldDumpSymbolGroup(uint32_t Idx, const SymbolGroup &Group,
const FilterOptions &Filters);
// TODO: Change these callbacks to be function_refs (de-templatify them).
template <typename CallbackT>
Error iterateOneModule(InputFile &File, const PrintScope &HeaderScope,
const SymbolGroup &SG, uint32_t Modi,
CallbackT Callback) {
HeaderScope.P.formatLine(
"Mod {0:4} | `{1}`: ",
fmt_align(Modi, AlignStyle::Right, HeaderScope.LabelWidth), SG.name());
AutoIndent Indent(HeaderScope);
return Callback(Modi, SG);
}
template <typename CallbackT>
Error iterateSymbolGroups(InputFile &Input, const PrintScope &HeaderScope,
CallbackT Callback) {
AutoIndent Indent(HeaderScope);
FilterOptions Filters = HeaderScope.P.getFilters();
if (Filters.DumpModi) {
uint32_t Modi = *Filters.DumpModi;
SymbolGroup SG(&Input, Modi);
return iterateOneModule(Input, withLabelWidth(HeaderScope, NumDigits(Modi)),
SG, Modi, Callback);
}
uint32_t I = 0;
for (const auto &SG : Input.symbol_groups()) {
if (shouldDumpSymbolGroup(I, SG, Filters))
if (auto Err =
iterateOneModule(Input, withLabelWidth(HeaderScope, NumDigits(I)),
SG, I, Callback))
return Err;
++I;
}
return Error::success();
}
template <typename SubsectionT>
Error iterateModuleSubsections(
InputFile &File, const PrintScope &HeaderScope,
llvm::function_ref<Error(uint32_t, const SymbolGroup &, SubsectionT &)>
Callback) {
return iterateSymbolGroups(
File, HeaderScope, [&](uint32_t Modi, const SymbolGroup &SG) -> Error {
for (const auto &SS : SG.getDebugSubsections()) {
SubsectionT Subsection;
if (SS.kind() != Subsection.kind())
continue;
BinaryStreamReader Reader(SS.getRecordData());
if (auto Err = Subsection.initialize(Reader))
continue;
if (auto Err = Callback(Modi, SG, Subsection))
return Err;
}
return Error::success();
});
}
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ� H1� � 1 DebugInfo/PDB/Native/DbiModuleDescriptorBuilder.hnu �[��� //===- DbiModuleDescriptorBuilder.h - PDB module information ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_DBIMODULEDESCRIPTORBUILDER_H
#define LLVM_DEBUGINFO_PDB_NATIVE_DBIMODULEDESCRIPTORBUILDER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/DebugSubsectionRecord.h"
#include "llvm/DebugInfo/PDB/Native/RawTypes.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <string>
#include <vector>
namespace llvm {
class BinaryStreamWriter;
namespace codeview {
class DebugSubsection;
}
namespace msf {
class MSFBuilder;
struct MSFLayout;
}
namespace pdb {
// Represents merged or unmerged symbols. Merged symbols can be written to the
// output file as is, but unmerged symbols must be rewritten first. In either
// case, the size must be known up front.
struct SymbolListWrapper {
explicit SymbolListWrapper(ArrayRef<uint8_t> Syms)
: SymPtr(const_cast<uint8_t *>(Syms.data())), SymSize(Syms.size()),
NeedsToBeMerged(false) {}
explicit SymbolListWrapper(void *SymSrc, uint32_t Length)
: SymPtr(SymSrc), SymSize(Length), NeedsToBeMerged(true) {}
ArrayRef<uint8_t> asArray() const {
return ArrayRef<uint8_t>(static_cast<const uint8_t *>(SymPtr), SymSize);
}
uint32_t size() const { return SymSize; }
void *SymPtr = nullptr;
uint32_t SymSize = 0;
bool NeedsToBeMerged = false;
};
/// Represents a string table reference at some offset in the module symbol
/// stream.
struct StringTableFixup {
uint32_t StrTabOffset = 0;
uint32_t SymOffsetOfReference = 0;
};
class DbiModuleDescriptorBuilder {
friend class DbiStreamBuilder;
public:
DbiModuleDescriptorBuilder(StringRef ModuleName, uint32_t ModIndex,
msf::MSFBuilder &Msf);
~DbiModuleDescriptorBuilder();
DbiModuleDescriptorBuilder(const DbiModuleDescriptorBuilder &) = delete;
DbiModuleDescriptorBuilder &
operator=(const DbiModuleDescriptorBuilder &) = delete;
void setPdbFilePathNI(uint32_t NI);
void setObjFileName(StringRef Name);
// Callback to merge one source of unmerged symbols.
using MergeSymbolsCallback = Error (*)(void *Ctx, void *Symbols,
BinaryStreamWriter &Writer);
void setMergeSymbolsCallback(void *Ctx, MergeSymbolsCallback Callback) {
MergeSymsCtx = Ctx;
MergeSymsCallback = Callback;
}
void setStringTableFixups(std::vector<StringTableFixup> &&Fixups) {
StringTableFixups = std::move(Fixups);
}
void setFirstSectionContrib(const SectionContrib &SC);
void addSymbol(codeview::CVSymbol Symbol);
void addSymbolsInBulk(ArrayRef<uint8_t> BulkSymbols);
// Add symbols of known size which will be merged (rewritten) when committing
// the PDB to disk.
void addUnmergedSymbols(void *SymSrc, uint32_t SymLength);
void
addDebugSubsection(std::shared_ptr<codeview::DebugSubsection> Subsection);
void
addDebugSubsection(const codeview::DebugSubsectionRecord &SubsectionContents);
uint16_t getStreamIndex() const;
StringRef getModuleName() const { return ModuleName; }
StringRef getObjFileName() const { return ObjFileName; }
unsigned getModuleIndex() const { return Layout.Mod; }
ArrayRef<std::string> source_files() const { return SourceFiles; }
uint32_t calculateSerializedLength() const;
/// Return the offset within the module symbol stream of the next symbol
/// record passed to addSymbol. Add four to account for the signature.
uint32_t getNextSymbolOffset() const { return SymbolByteSize + 4; }
void finalize();
Error finalizeMsfLayout();
/// Commit the DBI descriptor to the DBI stream.
Error commit(BinaryStreamWriter &ModiWriter);
/// Commit the accumulated symbols to the module symbol stream. Safe to call
/// in parallel on different DbiModuleDescriptorBuilder objects. Only modifies
/// the pre-allocated stream in question.
Error commitSymbolStream(const msf::MSFLayout &MsfLayout,
WritableBinaryStreamRef MsfBuffer);
private:
uint32_t calculateC13DebugInfoSize() const;
void addSourceFile(StringRef Path);
msf::MSFBuilder &MSF;
uint32_t SymbolByteSize = 0;
uint32_t PdbFilePathNI = 0;
std::string ModuleName;
std::string ObjFileName;
std::vector<std::string> SourceFiles;
std::vector<SymbolListWrapper> Symbols;
void *MergeSymsCtx = nullptr;
MergeSymbolsCallback MergeSymsCallback = nullptr;
std::vector<StringTableFixup> StringTableFixups;
std::vector<codeview::DebugSubsectionRecordBuilder> C13Builders;
ModuleInfoHeader Layout;
};
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_DBIMODULEDESCRIPTORBUILDER_H
PK hwFZ?O�� � % DebugInfo/PDB/Native/NamedStreamMap.hnu �[��� //===- NamedStreamMap.h - PDB Named Stream Map ------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NAMEDSTREAMMAP_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NAMEDSTREAMMAP_H
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/PDB/Native/HashTable.h"
#include "llvm/Support/Error.h"
#include <cstdint>
namespace llvm {
class BinaryStreamReader;
class BinaryStreamWriter;
namespace pdb {
class NamedStreamMap;
struct NamedStreamMapTraits {
NamedStreamMap *NS;
explicit NamedStreamMapTraits(NamedStreamMap &NS);
uint16_t hashLookupKey(StringRef S) const;
StringRef storageKeyToLookupKey(uint32_t Offset) const;
uint32_t lookupKeyToStorageKey(StringRef S);
};
class NamedStreamMap {
friend class NamedStreamMapBuilder;
public:
NamedStreamMap();
Error load(BinaryStreamReader &Stream);
Error commit(BinaryStreamWriter &Writer) const;
uint32_t calculateSerializedLength() const;
uint32_t size() const;
bool get(StringRef Stream, uint32_t &StreamNo) const;
void set(StringRef Stream, uint32_t StreamNo);
uint32_t appendStringData(StringRef S);
StringRef getString(uint32_t Offset) const;
uint32_t hashString(uint32_t Offset) const;
StringMap<uint32_t> entries() const;
private:
NamedStreamMapTraits HashTraits;
/// Closed hash table from Offset -> StreamNumber, where Offset is the offset
/// of the stream name in NamesBuffer.
HashTable<support::ulittle32_t> OffsetIndexMap;
/// Buffer of string data.
std::vector<char> NamesBuffer;
};
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_NAMEDSTREAMMAP_H
PK hwFZ}�U�* * , DebugInfo/PDB/Native/PDBStringTableBuilder.hnu �[��� //===- PDBStringTableBuilder.h - PDB String Table Builder -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file creates the "/names" stream.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_PDBSTRINGTABLEBUILDER_H
#define LLVM_DEBUGINFO_PDB_NATIVE_PDBSTRINGTABLEBUILDER_H
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/DebugStringTableSubsection.h"
#include "llvm/Support/Error.h"
#include <cstdint>
namespace llvm {
class BinaryStreamWriter;
class WritableBinaryStreamRef;
namespace msf {
struct MSFLayout;
}
namespace pdb {
class PDBFileBuilder;
class PDBStringTableBuilder;
struct StringTableHashTraits {
PDBStringTableBuilder *Table;
explicit StringTableHashTraits(PDBStringTableBuilder &Table);
uint32_t hashLookupKey(StringRef S) const;
StringRef storageKeyToLookupKey(uint32_t Offset) const;
uint32_t lookupKeyToStorageKey(StringRef S);
};
class PDBStringTableBuilder {
public:
// If string S does not exist in the string table, insert it.
// Returns the ID for S.
uint32_t insert(StringRef S);
uint32_t getIdForString(StringRef S) const;
StringRef getStringForId(uint32_t Id) const;
uint32_t calculateSerializedSize() const;
Error commit(BinaryStreamWriter &Writer) const;
void setStrings(const codeview::DebugStringTableSubsection &Strings);
private:
uint32_t calculateHashTableSize() const;
Error writeHeader(BinaryStreamWriter &Writer) const;
Error writeStrings(BinaryStreamWriter &Writer) const;
Error writeHashTable(BinaryStreamWriter &Writer) const;
Error writeEpilogue(BinaryStreamWriter &Writer) const;
codeview::DebugStringTableSubsection Strings;
};
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_PDBSTRINGTABLEBUILDER_H
PK hwFZ����� � ! DebugInfo/PDB/Native/TpiHashing.hnu �[��� //===- TpiHashing.h ---------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_TPIHASHING_H
#define LLVM_DEBUGINFO_PDB_NATIVE_TPIHASHING_H
#include "llvm/DebugInfo/CodeView/TypeRecord.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace pdb {
Expected<uint32_t> hashTypeRecord(const llvm::codeview::CVType &Type);
struct TagRecordHash {
explicit TagRecordHash(codeview::ClassRecord CR, uint32_t Full,
uint32_t Forward)
: FullRecordHash(Full), ForwardDeclHash(Forward), Class(std::move(CR)) {
State = 0;
}
explicit TagRecordHash(codeview::EnumRecord ER, uint32_t Full,
uint32_t Forward)
: FullRecordHash(Full), ForwardDeclHash(Forward), Enum(std::move(ER)) {
State = 1;
}
explicit TagRecordHash(codeview::UnionRecord UR, uint32_t Full,
uint32_t Forward)
: FullRecordHash(Full), ForwardDeclHash(Forward), Union(std::move(UR)) {
State = 2;
}
uint32_t FullRecordHash;
uint32_t ForwardDeclHash;
codeview::TagRecord &getRecord() {
switch (State) {
case 0:
return Class;
case 1:
return Enum;
case 2:
return Union;
}
llvm_unreachable("unreachable!");
}
private:
union {
codeview::ClassRecord Class;
codeview::EnumRecord Enum;
codeview::UnionRecord Union;
};
uint8_t State = 0;
};
/// Given a CVType referring to a class, structure, union, or enum, compute
/// the hash of its forward decl and full decl.
Expected<TagRecordHash> hashTagRecord(const codeview::CVType &Type);
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_TPIHASHING_H
PK hwFZ��v[ [ DebugInfo/PDB/Native/PDBFile.hnu �[��� //===- PDBFile.h - Low level interface to a PDB file ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_PDBFILE_H
#define LLVM_DEBUGINFO_PDB_NATIVE_PDBFILE_H
#include "llvm/DebugInfo/MSF/IMSFFile.h"
#include "llvm/DebugInfo/MSF/MSFCommon.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <memory>
namespace llvm {
class BinaryStream;
namespace msf {
class MappedBlockStream;
}
namespace pdb {
class DbiStream;
class GlobalsStream;
class InfoStream;
class InjectedSourceStream;
class PDBStringTable;
class PDBFileBuilder;
class PublicsStream;
class SymbolStream;
class TpiStream;
class PDBFile : public msf::IMSFFile {
friend PDBFileBuilder;
public:
PDBFile(StringRef Path, std::unique_ptr<BinaryStream> PdbFileBuffer,
BumpPtrAllocator &Allocator);
~PDBFile() override;
StringRef getFileDirectory() const;
StringRef getFilePath() const;
uint32_t getFreeBlockMapBlock() const;
uint32_t getUnknown1() const;
uint32_t getBlockSize() const override;
uint32_t getBlockCount() const override;
uint32_t getNumDirectoryBytes() const;
uint32_t getBlockMapIndex() const;
uint32_t getNumDirectoryBlocks() const;
uint64_t getBlockMapOffset() const;
uint32_t getNumStreams() const override;
uint32_t getMaxStreamSize() const;
uint32_t getStreamByteSize(uint32_t StreamIndex) const override;
ArrayRef<support::ulittle32_t>
getStreamBlockList(uint32_t StreamIndex) const override;
uint64_t getFileSize() const;
Expected<ArrayRef<uint8_t>> getBlockData(uint32_t BlockIndex,
uint32_t NumBytes) const override;
Error setBlockData(uint32_t BlockIndex, uint32_t Offset,
ArrayRef<uint8_t> Data) const override;
ArrayRef<support::ulittle32_t> getStreamSizes() const {
return ContainerLayout.StreamSizes;
}
ArrayRef<ArrayRef<support::ulittle32_t>> getStreamMap() const {
return ContainerLayout.StreamMap;
}
const msf::MSFLayout &getMsfLayout() const { return ContainerLayout; }
BinaryStreamRef getMsfBuffer() const { return *Buffer; }
ArrayRef<support::ulittle32_t> getDirectoryBlockArray() const;
std::unique_ptr<msf::MappedBlockStream>
createIndexedStream(uint16_t SN) const;
Expected<std::unique_ptr<msf::MappedBlockStream>>
safelyCreateIndexedStream(uint32_t StreamIndex) const;
Expected<std::unique_ptr<msf::MappedBlockStream>>
safelyCreateNamedStream(StringRef Name);
msf::MSFStreamLayout getStreamLayout(uint32_t StreamIdx) const;
msf::MSFStreamLayout getFpmStreamLayout() const;
Error parseFileHeaders();
Error parseStreamData();
Expected<InfoStream &> getPDBInfoStream();
Expected<DbiStream &> getPDBDbiStream();
Expected<GlobalsStream &> getPDBGlobalsStream();
Expected<TpiStream &> getPDBTpiStream();
Expected<TpiStream &> getPDBIpiStream();
Expected<PublicsStream &> getPDBPublicsStream();
Expected<SymbolStream &> getPDBSymbolStream();
Expected<PDBStringTable &> getStringTable();
Expected<InjectedSourceStream &> getInjectedSourceStream();
BumpPtrAllocator &getAllocator() { return Allocator; }
bool hasPDBDbiStream() const;
bool hasPDBGlobalsStream();
bool hasPDBInfoStream() const;
bool hasPDBIpiStream() const;
bool hasPDBPublicsStream();
bool hasPDBSymbolStream();
bool hasPDBTpiStream() const;
bool hasPDBStringTable();
bool hasPDBInjectedSourceStream();
uint32_t getPointerSize();
private:
std::string FilePath;
BumpPtrAllocator &Allocator;
std::unique_ptr<BinaryStream> Buffer;
msf::MSFLayout ContainerLayout;
std::unique_ptr<GlobalsStream> Globals;
std::unique_ptr<InfoStream> Info;
std::unique_ptr<DbiStream> Dbi;
std::unique_ptr<TpiStream> Tpi;
std::unique_ptr<TpiStream> Ipi;
std::unique_ptr<PublicsStream> Publics;
std::unique_ptr<SymbolStream> Symbols;
std::unique_ptr<msf::MappedBlockStream> DirectoryStream;
std::unique_ptr<msf::MappedBlockStream> StringTableStream;
std::unique_ptr<InjectedSourceStream> InjectedSources;
std::unique_ptr<PDBStringTable> Strings;
};
}
}
#endif
PK hwFZ=u � - DebugInfo/PDB/Native/NativeSymbolEnumerator.hnu �[��� //===- NativeSymbolEnumerator.h - info about enumerator values --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVESYMBOLENUMERATOR_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVESYMBOLENUMERATOR_H
#include "llvm/DebugInfo/CodeView/TypeRecord.h"
#include "llvm/DebugInfo/PDB/IPDBRawSymbol.h"
#include "llvm/DebugInfo/PDB/Native/NativeRawSymbol.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
namespace llvm {
class raw_ostream;
namespace pdb {
class NativeSession;
class NativeTypeEnum;
class NativeSymbolEnumerator : public NativeRawSymbol {
public:
NativeSymbolEnumerator(NativeSession &Session, SymIndexId Id,
const NativeTypeEnum &Parent,
codeview::EnumeratorRecord Record);
~NativeSymbolEnumerator() override;
void dump(raw_ostream &OS, int Indent, PdbSymbolIdField ShowIdFields,
PdbSymbolIdField RecurseIdFields) const override;
SymIndexId getClassParentId() const override;
SymIndexId getLexicalParentId() const override;
std::string getName() const override;
SymIndexId getTypeId() const override;
PDB_DataKind getDataKind() const override;
PDB_LocType getLocationType() const override;
bool isConstType() const override;
bool isVolatileType() const override;
bool isUnalignedType() const override;
Variant getValue() const override;
protected:
const NativeTypeEnum &Parent;
codeview::EnumeratorRecord Record;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_NATIVESYMBOLENUMERATOR_H
PK hwFZ M�M� � & DebugInfo/PDB/Native/NativeTypeArray.hnu �[��� //===- NativeTypeArray.h ------------------------------------------ C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEARRAY_H
#define LLVM_DEBUGINFO_PDB_NATIVE_NATIVETYPEARRAY_H
#include "llvm/DebugInfo/PDB/Native/NativeRawSymbol.h"
#include "llvm/DebugInfo/CodeView/TypeRecord.h"
#include "llvm/DebugInfo/PDB/PDBTypes.h"
namespace llvm {
namespace pdb {
class NativeSession;
class NativeTypeArray : public NativeRawSymbol {
public:
NativeTypeArray(NativeSession &Session, SymIndexId Id, codeview::TypeIndex TI,
codeview::ArrayRecord Record);
~NativeTypeArray() override;
void dump(raw_ostream &OS, int Indent, PdbSymbolIdField ShowIdFields,
PdbSymbolIdField RecurseIdFields) const override;
SymIndexId getArrayIndexTypeId() const override;
bool isConstType() const override;
bool isUnalignedType() const override;
bool isVolatileType() const override;
uint32_t getCount() const override;
SymIndexId getTypeId() const override;
uint64_t getLength() const override;
protected:
codeview::ArrayRecord Record;
codeview::TypeIndex Index;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ�Xewj j - DebugInfo/PDB/Native/ISectionContribVisitor.hnu �[��� //===- ISectionContribVisitor.h ---------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_ISECTIONCONTRIBVISITOR_H
#define LLVM_DEBUGINFO_PDB_NATIVE_ISECTIONCONTRIBVISITOR_H
namespace llvm {
namespace pdb {
struct SectionContrib;
struct SectionContrib2;
class ISectionContribVisitor {
public:
virtual ~ISectionContribVisitor() = default;
virtual void visit(const SectionContrib &C) = 0;
virtual void visit(const SectionContrib2 &C) = 0;
};
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_ISECTIONCONTRIBVISITOR_H
PK hwFZgD�w w # DebugInfo/PDB/Native/SymbolStream.hnu �[��� //===- SymbolStream.cpp - PDB Symbol Stream Access --------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_SYMBOLSTREAM_H
#define LLVM_DEBUGINFO_PDB_NATIVE_SYMBOLSTREAM_H
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace msf {
class MappedBlockStream;
}
namespace pdb {
class SymbolStream {
public:
SymbolStream(std::unique_ptr<msf::MappedBlockStream> Stream);
~SymbolStream();
Error reload();
const codeview::CVSymbolArray &getSymbolArray() const {
return SymbolRecords;
}
codeview::CVSymbol readRecord(uint32_t Offset) const;
iterator_range<codeview::CVSymbolArray::Iterator>
getSymbols(bool *HadError) const;
Error commit();
private:
codeview::CVSymbolArray SymbolRecords;
std::unique_ptr<msf::MappedBlockStream> Stream;
};
} // namespace pdb
}
#endif
PK hwFZ����� � % DebugInfo/PDB/Native/PDBStringTable.hnu �[��� //===- PDBStringTable.h - PDB String Table -----------------------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_NATIVE_PDBSTRINGTABLE_H
#define LLVM_DEBUGINFO_PDB_NATIVE_PDBSTRINGTABLE_H
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/DebugStringTableSubsection.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <cstdint>
namespace llvm {
class BinaryStreamReader;
namespace pdb {
struct PDBStringTableHeader;
class PDBStringTable {
public:
Error reload(BinaryStreamReader &Reader);
uint32_t getByteSize() const;
uint32_t getNameCount() const;
uint32_t getHashVersion() const;
uint32_t getSignature() const;
Expected<StringRef> getStringForID(uint32_t ID) const;
Expected<uint32_t> getIDForString(StringRef Str) const;
FixedStreamArray<support::ulittle32_t> name_ids() const;
const codeview::DebugStringTableSubsectionRef &getStringTable() const;
private:
Error readHeader(BinaryStreamReader &Reader);
Error readStrings(BinaryStreamReader &Reader);
Error readHashTable(BinaryStreamReader &Reader);
Error readEpilogue(BinaryStreamReader &Reader);
const PDBStringTableHeader *Header = nullptr;
codeview::DebugStringTableSubsectionRef Strings;
FixedStreamArray<support::ulittle32_t> IDs;
uint32_t NameCount = 0;
};
} // end namespace pdb
} // end namespace llvm
#endif // LLVM_DEBUGINFO_PDB_NATIVE_PDBSTRINGTABLE_H
PK hwFZ �I� � DebugInfo/PDB/PDBSymbolFunc.hnu �[��� //===- PDBSymbolFunc.h - class representing a function instance -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLFUNC_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLFUNC_H
#include "llvm/DebugInfo/PDB/IPDBRawSymbol.h"
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymDumper;
class PDBSymbolData;
class PDBSymbolTypeFunctionSig;
template <typename ChildType> class IPDBEnumChildren;
class PDBSymbolFunc : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::Function)
public:
void dump(PDBSymDumper &Dumper) const override;
bool isDestructor() const;
std::unique_ptr<IPDBEnumChildren<PDBSymbolData>> getArguments() const;
FORWARD_SYMBOL_METHOD(getAccess)
FORWARD_SYMBOL_METHOD(getAddressOffset)
FORWARD_SYMBOL_METHOD(getAddressSection)
FORWARD_SYMBOL_ID_METHOD(getClassParent)
FORWARD_SYMBOL_METHOD(isCompilerGenerated)
FORWARD_SYMBOL_METHOD(isConstructorVirtualBase)
FORWARD_SYMBOL_METHOD(isConstType)
FORWARD_SYMBOL_METHOD(isCxxReturnUdt)
FORWARD_SYMBOL_METHOD(hasCustomCallingConvention)
FORWARD_SYMBOL_METHOD(hasFarReturn)
FORWARD_SYMBOL_METHOD(hasAlloca)
FORWARD_SYMBOL_METHOD(hasEH)
FORWARD_SYMBOL_METHOD(hasEHa)
FORWARD_SYMBOL_METHOD(hasInlAsm)
FORWARD_SYMBOL_METHOD(hasLongJump)
FORWARD_SYMBOL_METHOD(hasSEH)
FORWARD_SYMBOL_METHOD(hasSecurityChecks)
FORWARD_SYMBOL_METHOD(hasSetJump)
FORWARD_SYMBOL_METHOD(hasInterruptReturn)
FORWARD_SYMBOL_METHOD(isIntroVirtualFunction)
FORWARD_SYMBOL_METHOD(hasInlineAttribute)
FORWARD_SYMBOL_METHOD(isNaked)
FORWARD_SYMBOL_METHOD(isStatic)
FORWARD_SYMBOL_METHOD(getLength)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(getLocalBasePointerRegisterId)
FORWARD_SYMBOL_METHOD(getLocationType)
FORWARD_SYMBOL_METHOD(getName)
FORWARD_SYMBOL_METHOD(hasFramePointer)
FORWARD_SYMBOL_METHOD(hasNoInlineAttribute)
FORWARD_SYMBOL_METHOD(hasNoReturnAttribute)
FORWARD_SYMBOL_METHOD(isUnreached)
FORWARD_SYMBOL_METHOD(getNoStackOrdering)
FORWARD_SYMBOL_METHOD(hasOptimizedCodeDebugInfo)
FORWARD_SYMBOL_METHOD(isPureVirtual)
FORWARD_SYMBOL_METHOD(getRelativeVirtualAddress)
FORWARD_SYMBOL_METHOD(getToken)
FORWARD_CONCRETE_SYMBOL_ID_METHOD_WITH_NAME(PDBSymbolTypeFunctionSig, getType,
getSignature)
FORWARD_SYMBOL_METHOD(isUnalignedType)
FORWARD_SYMBOL_METHOD(getUndecoratedName)
FORWARD_SYMBOL_METHOD(isVirtual)
FORWARD_SYMBOL_METHOD(getVirtualAddress)
FORWARD_SYMBOL_METHOD(getVirtualBaseOffset)
FORWARD_SYMBOL_METHOD(isVolatileType)
std::unique_ptr<IPDBEnumLineNumbers> getLineNumbers() const;
uint32_t getCompilandId() const;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLFUNC_H
PK hwFZ�LU� ( DebugInfo/PDB/PDBSymbolTypeVTableShape.hnu �[��� //===- PDBSymbolTypeVTableShape.h - VTable shape info -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEVTABLESHAPE_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEVTABLESHAPE_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolTypeVTableShape : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::VTableShape)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(isConstType)
FORWARD_SYMBOL_METHOD(getCount)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(isUnalignedType)
FORWARD_SYMBOL_METHOD(isVolatileType)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEVTABLESHAPE_H
PK hwFZ[&�'A A $ DebugInfo/PDB/PDBSymbolTypeTypedef.hnu �[��� //===- PDBSymbolTypeTypedef.h - typedef type info ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPETYPEDEF_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPETYPEDEF_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolTypeTypedef : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::Typedef)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(getBuiltinType)
FORWARD_SYMBOL_ID_METHOD(getClassParent)
FORWARD_SYMBOL_METHOD(hasConstructor)
FORWARD_SYMBOL_METHOD(isConstType)
FORWARD_SYMBOL_METHOD(hasAssignmentOperator)
FORWARD_SYMBOL_METHOD(hasCastOperator)
FORWARD_SYMBOL_METHOD(hasNestedTypes)
FORWARD_SYMBOL_METHOD(getLength)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(getName)
FORWARD_SYMBOL_METHOD(isNested)
FORWARD_SYMBOL_METHOD(hasOverloadedOperator)
FORWARD_SYMBOL_METHOD(isPacked)
FORWARD_SYMBOL_METHOD(isReference)
FORWARD_SYMBOL_METHOD(isScoped)
FORWARD_SYMBOL_ID_METHOD(getType)
FORWARD_SYMBOL_METHOD(getUdtKind)
FORWARD_SYMBOL_METHOD(isUnalignedType)
FORWARD_SYMBOL_ID_METHOD(getVirtualTableShape)
FORWARD_SYMBOL_METHOD(isVolatileType)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPETYPEDEF_H
PK hwFZ7
@Q Q $ DebugInfo/PDB/PDBSymbolTypeManaged.hnu �[��� //===- PDBSymbolTypeManaged.h - managed type info ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEMANAGED_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEMANAGED_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolTypeManaged : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::ManagedType)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(getName)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEMANAGED_H
PK hwFZr��܅ � DebugInfo/PDB/IPDBSession.hnu �[��� //===- IPDBSession.h - base interface for a PDB symbol context --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_IPDBSESSION_H
#define LLVM_DEBUGINFO_PDB_IPDBSESSION_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Casting.h"
#include <memory>
namespace llvm {
namespace pdb {
class PDBSymbolCompiland;
class PDBSymbolExe;
/// IPDBSession defines an interface used to provide a context for querying
/// debug information from a debug data source (for example, a PDB).
class IPDBSession {
public:
virtual ~IPDBSession();
virtual uint64_t getLoadAddress() const = 0;
virtual bool setLoadAddress(uint64_t Address) = 0;
virtual std::unique_ptr<PDBSymbolExe> getGlobalScope() = 0;
virtual std::unique_ptr<PDBSymbol>
getSymbolById(SymIndexId SymbolId) const = 0;
virtual bool addressForVA(uint64_t VA, uint32_t &Section,
uint32_t &Offset) const = 0;
virtual bool addressForRVA(uint32_t RVA, uint32_t &Section,
uint32_t &Offset) const = 0;
template <typename T>
std::unique_ptr<T> getConcreteSymbolById(SymIndexId SymbolId) const {
return unique_dyn_cast_or_null<T>(getSymbolById(SymbolId));
}
virtual std::unique_ptr<PDBSymbol> findSymbolByAddress(uint64_t Address,
PDB_SymType Type) = 0;
virtual std::unique_ptr<PDBSymbol> findSymbolByRVA(uint32_t RVA,
PDB_SymType Type) = 0;
virtual std::unique_ptr<PDBSymbol>
findSymbolBySectOffset(uint32_t Sect, uint32_t Offset, PDB_SymType Type) = 0;
virtual std::unique_ptr<IPDBEnumLineNumbers>
findLineNumbers(const PDBSymbolCompiland &Compiland,
const IPDBSourceFile &File) const = 0;
virtual std::unique_ptr<IPDBEnumLineNumbers>
findLineNumbersByAddress(uint64_t Address, uint32_t Length) const = 0;
virtual std::unique_ptr<IPDBEnumLineNumbers>
findLineNumbersByRVA(uint32_t RVA, uint32_t Length) const = 0;
virtual std::unique_ptr<IPDBEnumLineNumbers>
findLineNumbersBySectOffset(uint32_t Section, uint32_t Offset,
uint32_t Length) const = 0;
virtual std::unique_ptr<IPDBEnumSourceFiles>
findSourceFiles(const PDBSymbolCompiland *Compiland, llvm::StringRef Pattern,
PDB_NameSearchFlags Flags) const = 0;
virtual std::unique_ptr<IPDBSourceFile>
findOneSourceFile(const PDBSymbolCompiland *Compiland,
llvm::StringRef Pattern,
PDB_NameSearchFlags Flags) const = 0;
virtual std::unique_ptr<IPDBEnumChildren<PDBSymbolCompiland>>
findCompilandsForSourceFile(llvm::StringRef Pattern,
PDB_NameSearchFlags Flags) const = 0;
virtual std::unique_ptr<PDBSymbolCompiland>
findOneCompilandForSourceFile(llvm::StringRef Pattern,
PDB_NameSearchFlags Flags) const = 0;
virtual std::unique_ptr<IPDBEnumSourceFiles> getAllSourceFiles() const = 0;
virtual std::unique_ptr<IPDBEnumSourceFiles>
getSourceFilesForCompiland(const PDBSymbolCompiland &Compiland) const = 0;
virtual std::unique_ptr<IPDBSourceFile>
getSourceFileById(uint32_t FileId) const = 0;
virtual std::unique_ptr<IPDBEnumDataStreams> getDebugStreams() const = 0;
virtual std::unique_ptr<IPDBEnumTables> getEnumTables() const = 0;
virtual std::unique_ptr<IPDBEnumInjectedSources>
getInjectedSources() const = 0;
virtual std::unique_ptr<IPDBEnumSectionContribs>
getSectionContribs() const = 0;
virtual std::unique_ptr<IPDBEnumFrameData>
getFrameData() const = 0;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ�x��� � DebugInfo/PDB/PDBSymbolThunk.hnu �[��� //===- PDBSymbolThunk.h - Support for querying PDB thunks ---------------*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLTHUNK_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLTHUNK_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolThunk : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::Thunk)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(getAccess)
FORWARD_SYMBOL_METHOD(getAddressOffset)
FORWARD_SYMBOL_METHOD(getAddressSection)
FORWARD_SYMBOL_ID_METHOD(getClassParent)
FORWARD_SYMBOL_METHOD(isConstType)
FORWARD_SYMBOL_METHOD(isIntroVirtualFunction)
FORWARD_SYMBOL_METHOD(isStatic)
FORWARD_SYMBOL_METHOD(getLength)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(getName)
FORWARD_SYMBOL_METHOD(isPureVirtual)
FORWARD_SYMBOL_METHOD(getRelativeVirtualAddress)
FORWARD_SYMBOL_METHOD(getTargetOffset)
FORWARD_SYMBOL_METHOD(getTargetRelativeVirtualAddress)
FORWARD_SYMBOL_METHOD(getTargetVirtualAddress)
FORWARD_SYMBOL_METHOD(getTargetSection)
FORWARD_SYMBOL_METHOD(getThunkOrdinal)
FORWARD_SYMBOL_ID_METHOD(getType)
FORWARD_SYMBOL_METHOD(isUnalignedType)
FORWARD_SYMBOL_METHOD(isVirtual)
FORWARD_SYMBOL_METHOD(getVirtualAddress)
FORWARD_SYMBOL_METHOD(getVirtualBaseOffset)
FORWARD_SYMBOL_METHOD(isVolatileType)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLTHUNK_H
PK hwFZIY�� ' DebugInfo/PDB/DIA/DIAEnumDebugStreams.hnu �[��� //==- DIAEnumDebugStreams.h - DIA Debug Stream Enumerator impl ---*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIAENUMDEBUGSTREAMS_H
#define LLVM_DEBUGINFO_PDB_DIA_DIAENUMDEBUGSTREAMS_H
#include "DIASupport.h"
#include "llvm/DebugInfo/PDB/IPDBDataStream.h"
#include "llvm/DebugInfo/PDB/IPDBEnumChildren.h"
namespace llvm {
namespace pdb {
class IPDBDataStream;
class DIAEnumDebugStreams : public IPDBEnumChildren<IPDBDataStream> {
public:
explicit DIAEnumDebugStreams(CComPtr<IDiaEnumDebugStreams> DiaEnumerator);
uint32_t getChildCount() const override;
ChildTypePtr getChildAtIndex(uint32_t Index) const override;
ChildTypePtr getNext() override;
void reset() override;
private:
CComPtr<IDiaEnumDebugStreams> Enumerator;
};
}
}
#endif
PK hwFZ�l-� ! DebugInfo/PDB/DIA/DIALineNumber.hnu �[��� //===- DIALineNumber.h - DIA implementation of IPDBLineNumber ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIALINENUMBER_H
#define LLVM_DEBUGINFO_PDB_DIA_DIALINENUMBER_H
#include "DIASupport.h"
#include "llvm/DebugInfo/PDB/IPDBLineNumber.h"
namespace llvm {
namespace pdb {
class DIALineNumber : public IPDBLineNumber {
public:
explicit DIALineNumber(CComPtr<IDiaLineNumber> DiaLineNumber);
uint32_t getLineNumber() const override;
uint32_t getLineNumberEnd() const override;
uint32_t getColumnNumber() const override;
uint32_t getColumnNumberEnd() const override;
uint32_t getAddressSection() const override;
uint32_t getAddressOffset() const override;
uint32_t getRelativeVirtualAddress() const override;
uint64_t getVirtualAddress() const override;
uint32_t getLength() const override;
uint32_t getSourceFileId() const override;
uint32_t getCompilandId() const override;
bool isStatement() const override;
private:
CComPtr<IDiaLineNumber> LineNumber;
};
}
}
#endif
PK hwFZ�s��� � * DebugInfo/PDB/DIA/DIAEnumSectionContribs.hnu �[��� //==- DIAEnumSectionContribs.h --------------------------------- -*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIAENUMSECTIONCONTRIBS_H
#define LLVM_DEBUGINFO_PDB_DIA_DIAENUMSECTIONCONTRIBS_H
#include "DIASupport.h"
#include "llvm/DebugInfo/PDB/IPDBEnumChildren.h"
#include "llvm/DebugInfo/PDB/IPDBSectionContrib.h"
namespace llvm {
namespace pdb {
class DIASession;
class DIAEnumSectionContribs : public IPDBEnumChildren<IPDBSectionContrib> {
public:
explicit DIAEnumSectionContribs(
const DIASession &PDBSession,
CComPtr<IDiaEnumSectionContribs> DiaEnumerator);
uint32_t getChildCount() const override;
ChildTypePtr getChildAtIndex(uint32_t Index) const override;
ChildTypePtr getNext() override;
void reset() override;
private:
const DIASession &Session;
CComPtr<IDiaEnumSectionContribs> Enumerator;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_DIA_DIAENUMSECTIONCONTRIBS_H
PK hwFZ��T�� � ! DebugInfo/PDB/DIA/DIADataStream.hnu �[��� //===- DIADataStream.h - DIA implementation of IPDBDataStream ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIADATASTREAM_H
#define LLVM_DEBUGINFO_PDB_DIA_DIADATASTREAM_H
#include "DIASupport.h"
#include "llvm/DebugInfo/PDB/IPDBDataStream.h"
namespace llvm {
namespace pdb {
class DIADataStream : public IPDBDataStream {
public:
explicit DIADataStream(CComPtr<IDiaEnumDebugStreamData> DiaStreamData);
uint32_t getRecordCount() const override;
std::string getName() const override;
std::optional<RecordType> getItemAtIndex(uint32_t Index) const override;
bool getNext(RecordType &Record) override;
void reset() override;
private:
CComPtr<IDiaEnumDebugStreamData> StreamData;
};
}
}
#endif
PK hwFZXO�1d d & DebugInfo/PDB/DIA/DIAEnumSourceFiles.hnu �[��� //==- DIAEnumSourceFiles.h - DIA Source File Enumerator impl -----*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIAENUMSOURCEFILES_H
#define LLVM_DEBUGINFO_PDB_DIA_DIAENUMSOURCEFILES_H
#include "DIASupport.h"
#include "llvm/DebugInfo/PDB/IPDBEnumChildren.h"
#include "llvm/DebugInfo/PDB/IPDBSourceFile.h"
namespace llvm {
namespace pdb {
class DIASession;
class DIAEnumSourceFiles : public IPDBEnumChildren<IPDBSourceFile> {
public:
explicit DIAEnumSourceFiles(const DIASession &PDBSession,
CComPtr<IDiaEnumSourceFiles> DiaEnumerator);
uint32_t getChildCount() const override;
ChildTypePtr getChildAtIndex(uint32_t Index) const override;
ChildTypePtr getNext() override;
void reset() override;
private:
const DIASession &Session;
CComPtr<IDiaEnumSourceFiles> Enumerator;
};
}
}
#endif
PK hwFZ=
�� � ! DebugInfo/PDB/DIA/DIASourceFile.hnu �[��� //===- DIASourceFile.h - DIA implementation of IPDBSourceFile ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIASOURCEFILE_H
#define LLVM_DEBUGINFO_PDB_DIA_DIASOURCEFILE_H
#include "DIASupport.h"
#include "llvm/DebugInfo/PDB/IPDBSourceFile.h"
namespace llvm {
namespace pdb {
class DIASession;
class DIASourceFile : public IPDBSourceFile {
public:
explicit DIASourceFile(const DIASession &Session,
CComPtr<IDiaSourceFile> DiaSourceFile);
std::string getFileName() const override;
uint32_t getUniqueId() const override;
std::string getChecksum() const override;
PDB_Checksum getChecksumType() const override;
std::unique_ptr<IPDBEnumChildren<PDBSymbolCompiland>>
getCompilands() const override;
CComPtr<IDiaSourceFile> getDiaFile() const { return SourceFile; }
private:
const DIASession &Session;
CComPtr<IDiaSourceFile> SourceFile;
};
}
}
#endif
PK hwFZW��'� � % DebugInfo/PDB/DIA/DIAInjectedSource.hnu �[��� //===- DIAInjectedSource.h - DIA impl for IPDBInjectedSource ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIAINJECTEDSOURCE_H
#define LLVM_DEBUGINFO_PDB_DIA_DIAINJECTEDSOURCE_H
#include "DIASupport.h"
#include "llvm/DebugInfo/PDB/IPDBInjectedSource.h"
namespace llvm {
namespace pdb {
class DIASession;
class DIAInjectedSource : public IPDBInjectedSource {
public:
explicit DIAInjectedSource(CComPtr<IDiaInjectedSource> DiaSourceFile);
uint32_t getCrc32() const override;
uint64_t getCodeByteSize() const override;
std::string getFileName() const override;
std::string getObjectFileName() const override;
std::string getVirtualFileName() const override;
uint32_t getCompression() const override;
std::string getCode() const override;
private:
CComPtr<IDiaInjectedSource> SourceFile;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_DIA_DIAINJECTEDSOURCE_H
PK hwFZ� <�v v * DebugInfo/PDB/DIA/DIAEnumInjectedSources.hnu �[��� //==- DIAEnumInjectedSources.h - DIA Injected Sources Enumerator -*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIAENUMINJECTEDSOURCES_H
#define LLVM_DEBUGINFO_PDB_DIA_DIAENUMINJECTEDSOURCES_H
#include "DIASupport.h"
#include "llvm/DebugInfo/PDB/IPDBEnumChildren.h"
#include "llvm/DebugInfo/PDB/IPDBInjectedSource.h"
namespace llvm {
namespace pdb {
class DIAEnumInjectedSources : public IPDBEnumChildren<IPDBInjectedSource> {
public:
explicit DIAEnumInjectedSources(
CComPtr<IDiaEnumInjectedSources> DiaEnumerator);
uint32_t getChildCount() const override;
ChildTypePtr getChildAtIndex(uint32_t Index) const override;
ChildTypePtr getNext() override;
void reset() override;
private:
CComPtr<IDiaEnumInjectedSources> Enumerator;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_DIA_DIAENUMINJECTEDSOURCES_H
PK hwFZ�2�� DebugInfo/PDB/DIA/DIAUtils.hnu �[��� //===- DIAUtils.h - Utility functions for working with DIA ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIAUTILS_H
#define LLVM_DEBUGINFO_PDB_DIA_DIAUTILS_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/Support/ConvertUTF.h"
template <typename Obj>
std::string invokeBstrMethod(Obj &Object,
HRESULT (__stdcall Obj::*Func)(BSTR *)) {
CComBSTR Str16;
HRESULT Result = (Object.*Func)(&Str16);
if (S_OK != Result)
return std::string();
std::string Str8;
llvm::ArrayRef<char> StrBytes(reinterpret_cast<char *>(Str16.m_str),
Str16.ByteLength());
llvm::convertUTF16ToUTF8String(StrBytes, Str8);
return Str8;
}
#endif // LLVM_DEBUGINFO_PDB_DIA_DIAUTILS_H
PK hwFZ���( ( ! DebugInfo/PDB/DIA/DIAEnumTables.hnu �[��� //===- DIAEnumTables.h - DIA Tables Enumerator Impl -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIAENUMTABLES_H
#define LLVM_DEBUGINFO_PDB_DIA_DIAENUMTABLES_H
#include "DIASupport.h"
#include "llvm/DebugInfo/PDB/IPDBEnumChildren.h"
#include "llvm/DebugInfo/PDB/IPDBTable.h"
namespace llvm {
namespace pdb {
class IPDBTable;
class DIAEnumTables : public IPDBEnumChildren<IPDBTable> {
public:
explicit DIAEnumTables(CComPtr<IDiaEnumTables> DiaEnumerator);
uint32_t getChildCount() const override;
std::unique_ptr<IPDBTable> getChildAtIndex(uint32_t Index) const override;
std::unique_ptr<IPDBTable> getNext() override;
void reset() override;
private:
CComPtr<IDiaEnumTables> Enumerator;
};
}
}
#endif // LLVM_DEBUGINFO_PDB_DIA_DIAENUMTABLES_H
PK hwFZk�qD $ DebugInfo/PDB/DIA/DIAEnumFrameData.hnu �[��� //==- DIAEnumFrameData.h --------------------------------------- -*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIAENUMFRAMEDATA_H
#define LLVM_DEBUGINFO_PDB_DIA_DIAENUMFRAMEDATA_H
#include "DIASupport.h"
#include "llvm/DebugInfo/PDB/IPDBEnumChildren.h"
#include "llvm/DebugInfo/PDB/IPDBFrameData.h"
namespace llvm {
namespace pdb {
class DIAEnumFrameData : public IPDBEnumChildren<IPDBFrameData> {
public:
explicit DIAEnumFrameData(CComPtr<IDiaEnumFrameData> DiaEnumerator);
uint32_t getChildCount() const override;
ChildTypePtr getChildAtIndex(uint32_t Index) const override;
ChildTypePtr getNext() override;
void reset() override;
private:
CComPtr<IDiaEnumFrameData> Enumerator;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZT�{k�& �& DebugInfo/PDB/DIA/DIARawSymbol.hnu �[��� //===- DIARawSymbol.h - DIA implementation of IPDBRawSymbol ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIARAWSYMBOL_H
#define LLVM_DEBUGINFO_PDB_DIA_DIARAWSYMBOL_H
#include "DIASupport.h"
#include "llvm/DebugInfo/PDB/IPDBRawSymbol.h"
namespace llvm {
namespace pdb {
class DIASession;
class DIARawSymbol : public IPDBRawSymbol {
public:
DIARawSymbol(const DIASession &PDBSession, CComPtr<IDiaSymbol> DiaSymbol);
void dump(raw_ostream &OS, int Indent, PdbSymbolIdField ShowIdFields,
PdbSymbolIdField RecurseIdFields) const override;
CComPtr<IDiaSymbol> getDiaSymbol() const { return Symbol; }
std::unique_ptr<IPDBEnumSymbols>
findChildren(PDB_SymType Type) const override;
std::unique_ptr<IPDBEnumSymbols>
findChildren(PDB_SymType Type, StringRef Name,
PDB_NameSearchFlags Flags) const override;
std::unique_ptr<IPDBEnumSymbols>
findChildrenByAddr(PDB_SymType Type, StringRef Name,
PDB_NameSearchFlags Flags,
uint32_t Section, uint32_t Offset) const override;
std::unique_ptr<IPDBEnumSymbols>
findChildrenByVA(PDB_SymType Type, StringRef Name, PDB_NameSearchFlags Flags,
uint64_t VA) const override;
std::unique_ptr<IPDBEnumSymbols>
findChildrenByRVA(PDB_SymType Type, StringRef Name, PDB_NameSearchFlags Flags,
uint32_t RVA) const override;
std::unique_ptr<IPDBEnumSymbols>
findInlineFramesByAddr(uint32_t Section, uint32_t Offset) const override;
std::unique_ptr<IPDBEnumSymbols>
findInlineFramesByRVA(uint32_t RVA) const override;
std::unique_ptr<IPDBEnumSymbols>
findInlineFramesByVA(uint64_t VA) const override;
std::unique_ptr<IPDBEnumLineNumbers> findInlineeLines() const override;
std::unique_ptr<IPDBEnumLineNumbers>
findInlineeLinesByAddr(uint32_t Section, uint32_t Offset,
uint32_t Length) const override;
std::unique_ptr<IPDBEnumLineNumbers>
findInlineeLinesByRVA(uint32_t RVA, uint32_t Length) const override;
std::unique_ptr<IPDBEnumLineNumbers>
findInlineeLinesByVA(uint64_t VA, uint32_t Length) const override;
void getDataBytes(llvm::SmallVector<uint8_t, 32> &bytes) const override;
void getFrontEndVersion(VersionInfo &Version) const override;
void getBackEndVersion(VersionInfo &Version) const override;
PDB_MemberAccess getAccess() const override;
uint32_t getAddressOffset() const override;
uint32_t getAddressSection() const override;
uint32_t getAge() const override;
SymIndexId getArrayIndexTypeId() const override;
uint32_t getBaseDataOffset() const override;
uint32_t getBaseDataSlot() const override;
SymIndexId getBaseSymbolId() const override;
PDB_BuiltinType getBuiltinType() const override;
uint32_t getBitPosition() const override;
PDB_CallingConv getCallingConvention() const override;
SymIndexId getClassParentId() const override;
std::string getCompilerName() const override;
uint32_t getCount() const override;
uint32_t getCountLiveRanges() const override;
PDB_Lang getLanguage() const override;
SymIndexId getLexicalParentId() const override;
std::string getLibraryName() const override;
uint32_t getLiveRangeStartAddressOffset() const override;
uint32_t getLiveRangeStartAddressSection() const override;
uint32_t getLiveRangeStartRelativeVirtualAddress() const override;
codeview::RegisterId getLocalBasePointerRegisterId() const override;
SymIndexId getLowerBoundId() const override;
uint32_t getMemorySpaceKind() const override;
std::string getName() const override;
uint32_t getNumberOfAcceleratorPointerTags() const override;
uint32_t getNumberOfColumns() const override;
uint32_t getNumberOfModifiers() const override;
uint32_t getNumberOfRegisterIndices() const override;
uint32_t getNumberOfRows() const override;
std::string getObjectFileName() const override;
uint32_t getOemId() const override;
SymIndexId getOemSymbolId() const override;
uint32_t getOffsetInUdt() const override;
PDB_Cpu getPlatform() const override;
uint32_t getRank() const override;
codeview::RegisterId getRegisterId() const override;
uint32_t getRegisterType() const override;
uint32_t getRelativeVirtualAddress() const override;
uint32_t getSamplerSlot() const override;
uint32_t getSignature() const override;
uint32_t getSizeInUdt() const override;
uint32_t getSlot() const override;
std::string getSourceFileName() const override;
std::unique_ptr<IPDBLineNumber> getSrcLineOnTypeDefn() const override;
uint32_t getStride() const override;
SymIndexId getSubTypeId() const override;
std::string getSymbolsFileName() const override;
SymIndexId getSymIndexId() const override;
uint32_t getTargetOffset() const override;
uint32_t getTargetRelativeVirtualAddress() const override;
uint64_t getTargetVirtualAddress() const override;
uint32_t getTargetSection() const override;
uint32_t getTextureSlot() const override;
uint32_t getTimeStamp() const override;
uint32_t getToken() const override;
SymIndexId getTypeId() const override;
uint32_t getUavSlot() const override;
std::string getUndecoratedName() const override;
std::string getUndecoratedNameEx(PDB_UndnameFlags Flags) const override;
SymIndexId getUnmodifiedTypeId() const override;
SymIndexId getUpperBoundId() const override;
Variant getValue() const override;
uint32_t getVirtualBaseDispIndex() const override;
uint32_t getVirtualBaseOffset() const override;
SymIndexId getVirtualTableShapeId() const override;
std::unique_ptr<PDBSymbolTypeBuiltin>
getVirtualBaseTableType() const override;
PDB_DataKind getDataKind() const override;
PDB_SymType getSymTag() const override;
codeview::GUID getGuid() const override;
int32_t getOffset() const override;
int32_t getThisAdjust() const override;
int32_t getVirtualBasePointerOffset() const override;
PDB_LocType getLocationType() const override;
PDB_Machine getMachineType() const override;
codeview::ThunkOrdinal getThunkOrdinal() const override;
uint64_t getLength() const override;
uint64_t getLiveRangeLength() const override;
uint64_t getVirtualAddress() const override;
PDB_UdtType getUdtKind() const override;
bool hasConstructor() const override;
bool hasCustomCallingConvention() const override;
bool hasFarReturn() const override;
bool isCode() const override;
bool isCompilerGenerated() const override;
bool isConstType() const override;
bool isEditAndContinueEnabled() const override;
bool isFunction() const override;
bool getAddressTaken() const override;
bool getNoStackOrdering() const override;
bool hasAlloca() const override;
bool hasAssignmentOperator() const override;
bool hasCTypes() const override;
bool hasCastOperator() const override;
bool hasDebugInfo() const override;
bool hasEH() const override;
bool hasEHa() const override;
bool hasInlAsm() const override;
bool hasInlineAttribute() const override;
bool hasInterruptReturn() const override;
bool hasFramePointer() const override;
bool hasLongJump() const override;
bool hasManagedCode() const override;
bool hasNestedTypes() const override;
bool hasNoInlineAttribute() const override;
bool hasNoReturnAttribute() const override;
bool hasOptimizedCodeDebugInfo() const override;
bool hasOverloadedOperator() const override;
bool hasSEH() const override;
bool hasSecurityChecks() const override;
bool hasSetJump() const override;
bool hasStrictGSCheck() const override;
bool isAcceleratorGroupSharedLocal() const override;
bool isAcceleratorPointerTagLiveRange() const override;
bool isAcceleratorStubFunction() const override;
bool isAggregated() const override;
bool isIntroVirtualFunction() const override;
bool isCVTCIL() const override;
bool isConstructorVirtualBase() const override;
bool isCxxReturnUdt() const override;
bool isDataAligned() const override;
bool isHLSLData() const override;
bool isHotpatchable() const override;
bool isIndirectVirtualBaseClass() const override;
bool isInterfaceUdt() const override;
bool isIntrinsic() const override;
bool isLTCG() const override;
bool isLocationControlFlowDependent() const override;
bool isMSILNetmodule() const override;
bool isMatrixRowMajor() const override;
bool isManagedCode() const override;
bool isMSILCode() const override;
bool isMultipleInheritance() const override;
bool isNaked() const override;
bool isNested() const override;
bool isOptimizedAway() const override;
bool isPacked() const override;
bool isPointerBasedOnSymbolValue() const override;
bool isPointerToDataMember() const override;
bool isPointerToMemberFunction() const override;
bool isPureVirtual() const override;
bool isRValueReference() const override;
bool isRefUdt() const override;
bool isReference() const override;
bool isRestrictedType() const override;
bool isReturnValue() const override;
bool isSafeBuffers() const override;
bool isScoped() const override;
bool isSdl() const override;
bool isSingleInheritance() const override;
bool isSplitted() const override;
bool isStatic() const override;
bool hasPrivateSymbols() const override;
bool isUnalignedType() const override;
bool isUnreached() const override;
bool isValueUdt() const override;
bool isVirtual() const override;
bool isVirtualBaseClass() const override;
bool isVirtualInheritance() const override;
bool isVolatileType() const override;
bool wasInlined() const override;
std::string getUnused() const override;
private:
const DIASession &Session;
CComPtr<IDiaSymbol> Symbol;
};
}
}
#endif
PK hwFZa��� DebugInfo/PDB/DIA/DIAError.hnu �[��� //===- DIAError.h - Error extensions for PDB DIA implementation -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIAERROR_H
#define LLVM_DEBUGINFO_PDB_DIA_DIAERROR_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace pdb {
enum class dia_error_code {
unspecified = 1,
could_not_create_impl,
invalid_file_format,
invalid_parameter,
already_loaded,
debug_info_mismatch,
};
} // namespace pdb
} // namespace llvm
namespace std {
template <>
struct is_error_code_enum<llvm::pdb::dia_error_code> : std::true_type {};
} // namespace std
namespace llvm {
namespace pdb {
const std::error_category &DIAErrCategory();
inline std::error_code make_error_code(dia_error_code E) {
return std::error_code(static_cast<int>(E), DIAErrCategory());
}
/// Base class for errors originating in DIA SDK, e.g. COM calls
class DIAError : public ErrorInfo<DIAError, StringError> {
public:
using ErrorInfo<DIAError, StringError>::ErrorInfo;
DIAError(const Twine &S) : ErrorInfo(S, dia_error_code::unspecified) {}
static char ID;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ6��9 9 DebugInfo/PDB/DIA/DIAFrameData.hnu �[��� //===- DIAFrameData.h - DIA Impl. of IPDBFrameData ---------------- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIAFRAMEDATA_H
#define LLVM_DEBUGINFO_PDB_DIA_DIAFRAMEDATA_H
#include "DIASupport.h"
#include "llvm/DebugInfo/PDB/IPDBFrameData.h"
namespace llvm {
namespace pdb {
class DIASession;
class DIAFrameData : public IPDBFrameData {
public:
explicit DIAFrameData(CComPtr<IDiaFrameData> DiaFrameData);
uint32_t getAddressOffset() const override;
uint32_t getAddressSection() const override;
uint32_t getLengthBlock() const override;
std::string getProgram() const override;
uint32_t getRelativeVirtualAddress() const override;
uint64_t getVirtualAddress() const override;
private:
CComPtr<IDiaFrameData> FrameData;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ�R�W W " DebugInfo/PDB/DIA/DIAEnumSymbols.hnu �[��� //==- DIAEnumSymbols.h - DIA Symbol Enumerator impl --------------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIAENUMSYMBOLS_H
#define LLVM_DEBUGINFO_PDB_DIA_DIAENUMSYMBOLS_H
#include "DIASupport.h"
#include "llvm/DebugInfo/PDB/IPDBEnumChildren.h"
#include "llvm/DebugInfo/PDB/PDBSymbol.h"
namespace llvm {
namespace pdb {
class DIASession;
class DIAEnumSymbols : public IPDBEnumChildren<PDBSymbol> {
public:
explicit DIAEnumSymbols(const DIASession &Session,
CComPtr<IDiaEnumSymbols> DiaEnumerator);
uint32_t getChildCount() const override;
std::unique_ptr<PDBSymbol> getChildAtIndex(uint32_t Index) const override;
std::unique_ptr<PDBSymbol> getNext() override;
void reset() override;
private:
const DIASession &Session;
CComPtr<IDiaEnumSymbols> Enumerator;
};
}
}
#endif
PK hwFZ^.(� & DebugInfo/PDB/DIA/DIAEnumLineNumbers.hnu �[��� //==- DIAEnumLineNumbers.h - DIA Line Number Enumerator impl -----*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIAENUMLINENUMBERS_H
#define LLVM_DEBUGINFO_PDB_DIA_DIAENUMLINENUMBERS_H
#include "DIASupport.h"
#include "llvm/DebugInfo/PDB/IPDBEnumChildren.h"
#include "llvm/DebugInfo/PDB/IPDBLineNumber.h"
namespace llvm {
namespace pdb {
class IPDBLineNumber;
class DIAEnumLineNumbers : public IPDBEnumChildren<IPDBLineNumber> {
public:
explicit DIAEnumLineNumbers(CComPtr<IDiaEnumLineNumbers> DiaEnumerator);
uint32_t getChildCount() const override;
ChildTypePtr getChildAtIndex(uint32_t Index) const override;
ChildTypePtr getNext() override;
void reset() override;
private:
CComPtr<IDiaEnumLineNumbers> Enumerator;
};
}
}
#endif
PK hwFZ�5l DebugInfo/PDB/DIA/DIASupport.hnu �[��� //===- DIASupport.h - Common header includes for DIA ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// Common defines and header includes for all LLVMDebugInfoPDBDIA. The
// definitions here configure the necessary #defines and include system headers
// in the proper order for using DIA.
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIASUPPORT_H
#define LLVM_DEBUGINFO_PDB_DIA_DIASUPPORT_H
// Require at least Vista
#define NTDDI_VERSION NTDDI_VISTA
#define _WIN32_WINNT _WIN32_WINNT_VISTA
#define WINVER _WIN32_WINNT_VISTA
#ifndef NOMINMAX
#define NOMINMAX
#endif
// atlbase.h has to come before windows.h
#include <atlbase.h>
#include <windows.h>
// DIA headers must come after windows headers.
#include <cvconst.h>
#ifdef __clang__
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wnon-virtual-dtor"
#endif
#include <dia2.h>
#ifdef __clang__
#pragma clang diagnostic pop
#endif
#include <diacreate.h>
#endif // LLVM_DEBUGINFO_PDB_DIA_DIASUPPORT_H
PK hwFZ���e e DebugInfo/PDB/DIA/DIATable.hnu �[��� //===- DIATable.h - DIA implementation of IPDBTable -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIATABLE_H
#define LLVM_DEBUGINFO_PDB_DIA_DIATABLE_H
#include "DIASupport.h"
#include "llvm/DebugInfo/PDB/IPDBTable.h"
namespace llvm {
namespace pdb {
class DIATable : public IPDBTable {
public:
explicit DIATable(CComPtr<IDiaTable> DiaTable);
uint32_t getItemCount() const override;
std::string getName() const override;
PDB_TableType getTableType() const override;
private:
CComPtr<IDiaTable> Table;
};
}
}
#endif // LLVM_DEBUGINFO_PDB_DIA_DIATABLE_H
PK hwFZ�.��d d % DebugInfo/PDB/DIA/DIASectionContrib.hnu �[��� //===- DIASectionContrib.h - DIA Impl. of IPDBSectionContrib ------ C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIASECTIONCONTRIB_H
#define LLVM_DEBUGINFO_PDB_DIA_DIASECTIONCONTRIB_H
#include "DIASupport.h"
#include "llvm/DebugInfo/PDB/IPDBSectionContrib.h"
namespace llvm {
namespace pdb {
class DIASession;
class DIASectionContrib : public IPDBSectionContrib {
public:
explicit DIASectionContrib(const DIASession &PDBSession,
CComPtr<IDiaSectionContrib> DiaSection);
std::unique_ptr<PDBSymbolCompiland> getCompiland() const override;
uint32_t getAddressSection() const override;
uint32_t getAddressOffset() const override;
uint32_t getRelativeVirtualAddress() const override;
uint64_t getVirtualAddress() const override;
uint32_t getLength() const override;
bool isNotPaged() const override;
bool hasCode() const override;
bool hasCode16Bit() const override;
bool hasInitializedData() const override;
bool hasUninitializedData() const override;
bool isRemoved() const override;
bool hasComdat() const override;
bool isDiscardable() const override;
bool isNotCached() const override;
bool isShared() const override;
bool isExecutable() const override;
bool isReadable() const override;
bool isWritable() const override;
uint32_t getDataCrc32() const override;
uint32_t getRelocationsCrc32() const override;
uint32_t getCompilandId() const override;
private:
const DIASession &Session;
CComPtr<IDiaSectionContrib> Section;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_DIA_DIASECTIONCONTRIB_H
PK hwFZ��1m m DebugInfo/PDB/DIA/DIASession.hnu �[��� //===- DIASession.h - DIA implementation of IPDBSession ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_DIA_DIASESSION_H
#define LLVM_DEBUGINFO_PDB_DIA_DIASESSION_H
#include "DIASupport.h"
#include "llvm/DebugInfo/PDB/IPDBSession.h"
#include "llvm/Support/Error.h"
#include <system_error>
namespace llvm {
class StringRef;
namespace pdb {
class DIASession : public IPDBSession {
public:
explicit DIASession(CComPtr<IDiaSession> DiaSession);
static Error createFromPdb(StringRef Path,
std::unique_ptr<IPDBSession> &Session);
static Error createFromExe(StringRef Path,
std::unique_ptr<IPDBSession> &Session);
uint64_t getLoadAddress() const override;
bool setLoadAddress(uint64_t Address) override;
std::unique_ptr<PDBSymbolExe> getGlobalScope() override;
std::unique_ptr<PDBSymbol> getSymbolById(SymIndexId SymbolId) const override;
bool addressForVA(uint64_t VA, uint32_t &Section,
uint32_t &Offset) const override;
bool addressForRVA(uint32_t RVA, uint32_t &Section,
uint32_t &Offset) const override;
std::unique_ptr<PDBSymbol> findSymbolByAddress(uint64_t Address,
PDB_SymType Type) override;
std::unique_ptr<PDBSymbol> findSymbolByRVA(uint32_t RVA,
PDB_SymType Type) override;
std::unique_ptr<PDBSymbol> findSymbolBySectOffset(uint32_t Section,
uint32_t Offset,
PDB_SymType Type) override;
std::unique_ptr<IPDBEnumLineNumbers>
findLineNumbers(const PDBSymbolCompiland &Compiland,
const IPDBSourceFile &File) const override;
std::unique_ptr<IPDBEnumLineNumbers>
findLineNumbersByAddress(uint64_t Address, uint32_t Length) const override;
std::unique_ptr<IPDBEnumLineNumbers>
findLineNumbersByRVA(uint32_t RVA, uint32_t Length) const override;
std::unique_ptr<IPDBEnumLineNumbers>
findLineNumbersBySectOffset(uint32_t Section, uint32_t Offset,
uint32_t Length) const override;
std::unique_ptr<IPDBEnumSourceFiles>
findSourceFiles(const PDBSymbolCompiland *Compiland, llvm::StringRef Pattern,
PDB_NameSearchFlags Flags) const override;
std::unique_ptr<IPDBSourceFile>
findOneSourceFile(const PDBSymbolCompiland *Compiland,
llvm::StringRef Pattern,
PDB_NameSearchFlags Flags) const override;
std::unique_ptr<IPDBEnumChildren<PDBSymbolCompiland>>
findCompilandsForSourceFile(llvm::StringRef Pattern,
PDB_NameSearchFlags Flags) const override;
std::unique_ptr<PDBSymbolCompiland>
findOneCompilandForSourceFile(llvm::StringRef Pattern,
PDB_NameSearchFlags Flags) const override;
std::unique_ptr<IPDBEnumSourceFiles> getAllSourceFiles() const override;
std::unique_ptr<IPDBEnumSourceFiles> getSourceFilesForCompiland(
const PDBSymbolCompiland &Compiland) const override;
std::unique_ptr<IPDBSourceFile>
getSourceFileById(uint32_t FileId) const override;
std::unique_ptr<IPDBEnumDataStreams> getDebugStreams() const override;
std::unique_ptr<IPDBEnumTables> getEnumTables() const override;
std::unique_ptr<IPDBEnumInjectedSources> getInjectedSources() const override;
std::unique_ptr<IPDBEnumSectionContribs> getSectionContribs() const override;
std::unique_ptr<IPDBEnumFrameData> getFrameData() const override;
private:
CComPtr<IDiaSession> Session;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZc, c, DebugInfo/PDB/IPDBRawSymbol.hnu �[��� //===- IPDBRawSymbol.h - base interface for PDB symbol types ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_IPDBRAWSYMBOL_H
#define LLVM_DEBUGINFO_PDB_IPDBRAWSYMBOL_H
#include "PDBTypes.h"
#include "llvm/ADT/BitmaskEnum.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include <memory>
namespace llvm {
class raw_ostream;
class StringRef;
namespace pdb {
enum class PdbSymbolIdField : uint32_t {
None = 0,
SymIndexId = 1 << 0,
LexicalParent = 1 << 1,
ClassParent = 1 << 2,
Type = 1 << 3,
UnmodifiedType = 1 << 4,
All = 0xFFFFFFFF,
LLVM_MARK_AS_BITMASK_ENUM(/* LargestValue = */ All)
};
void dumpSymbolIdField(raw_ostream &OS, StringRef Name, SymIndexId Value,
int Indent, const IPDBSession &Session,
PdbSymbolIdField FieldId, PdbSymbolIdField ShowFlags,
PdbSymbolIdField RecurseFlags);
/// IPDBRawSymbol defines an interface used to represent an arbitrary symbol.
/// It exposes a monolithic interface consisting of accessors for the union of
/// all properties that are valid for any symbol type. This interface is then
/// wrapped by a concrete class which exposes only those set of methods valid
/// for this particular symbol type. See PDBSymbol.h for more details.
class IPDBRawSymbol {
public:
virtual ~IPDBRawSymbol();
virtual void dump(raw_ostream &OS, int Indent, PdbSymbolIdField ShowIdFields,
PdbSymbolIdField RecurseIdFields) const = 0;
virtual std::unique_ptr<IPDBEnumSymbols>
findChildren(PDB_SymType Type) const = 0;
virtual std::unique_ptr<IPDBEnumSymbols>
findChildren(PDB_SymType Type, StringRef Name,
PDB_NameSearchFlags Flags) const = 0;
virtual std::unique_ptr<IPDBEnumSymbols>
findChildrenByAddr(PDB_SymType Type, StringRef Name,
PDB_NameSearchFlags Flags,
uint32_t Section, uint32_t Offset) const = 0;
virtual std::unique_ptr<IPDBEnumSymbols>
findChildrenByVA(PDB_SymType Type, StringRef Name, PDB_NameSearchFlags Flags,
uint64_t VA) const = 0;
virtual std::unique_ptr<IPDBEnumSymbols>
findChildrenByRVA(PDB_SymType Type, StringRef Name, PDB_NameSearchFlags Flags,
uint32_t RVA) const = 0;
virtual std::unique_ptr<IPDBEnumSymbols>
findInlineFramesByAddr(uint32_t Section, uint32_t Offset) const = 0;
virtual std::unique_ptr<IPDBEnumSymbols>
findInlineFramesByRVA(uint32_t RVA) const = 0;
virtual std::unique_ptr<IPDBEnumSymbols>
findInlineFramesByVA(uint64_t VA) const = 0;
virtual std::unique_ptr<IPDBEnumLineNumbers> findInlineeLines() const = 0;
virtual std::unique_ptr<IPDBEnumLineNumbers>
findInlineeLinesByAddr(uint32_t Section, uint32_t Offset,
uint32_t Length) const = 0;
virtual std::unique_ptr<IPDBEnumLineNumbers>
findInlineeLinesByRVA(uint32_t RVA, uint32_t Length) const = 0;
virtual std::unique_ptr<IPDBEnumLineNumbers>
findInlineeLinesByVA(uint64_t VA, uint32_t Length) const = 0;
virtual void getDataBytes(llvm::SmallVector<uint8_t, 32> &bytes) const = 0;
virtual void getBackEndVersion(VersionInfo &Version) const = 0;
virtual PDB_MemberAccess getAccess() const = 0;
virtual uint32_t getAddressOffset() const = 0;
virtual uint32_t getAddressSection() const = 0;
virtual uint32_t getAge() const = 0;
virtual SymIndexId getArrayIndexTypeId() const = 0;
virtual uint32_t getBaseDataOffset() const = 0;
virtual uint32_t getBaseDataSlot() const = 0;
virtual SymIndexId getBaseSymbolId() const = 0;
virtual PDB_BuiltinType getBuiltinType() const = 0;
virtual uint32_t getBitPosition() const = 0;
virtual PDB_CallingConv getCallingConvention() const = 0;
virtual SymIndexId getClassParentId() const = 0;
virtual std::string getCompilerName() const = 0;
virtual uint32_t getCount() const = 0;
virtual uint32_t getCountLiveRanges() const = 0;
virtual void getFrontEndVersion(VersionInfo &Version) const = 0;
virtual PDB_Lang getLanguage() const = 0;
virtual SymIndexId getLexicalParentId() const = 0;
virtual std::string getLibraryName() const = 0;
virtual uint32_t getLiveRangeStartAddressOffset() const = 0;
virtual uint32_t getLiveRangeStartAddressSection() const = 0;
virtual uint32_t getLiveRangeStartRelativeVirtualAddress() const = 0;
virtual codeview::RegisterId getLocalBasePointerRegisterId() const = 0;
virtual SymIndexId getLowerBoundId() const = 0;
virtual uint32_t getMemorySpaceKind() const = 0;
virtual std::string getName() const = 0;
virtual uint32_t getNumberOfAcceleratorPointerTags() const = 0;
virtual uint32_t getNumberOfColumns() const = 0;
virtual uint32_t getNumberOfModifiers() const = 0;
virtual uint32_t getNumberOfRegisterIndices() const = 0;
virtual uint32_t getNumberOfRows() const = 0;
virtual std::string getObjectFileName() const = 0;
virtual uint32_t getOemId() const = 0;
virtual SymIndexId getOemSymbolId() const = 0;
virtual uint32_t getOffsetInUdt() const = 0;
virtual PDB_Cpu getPlatform() const = 0;
virtual uint32_t getRank() const = 0;
virtual codeview::RegisterId getRegisterId() const = 0;
virtual uint32_t getRegisterType() const = 0;
virtual uint32_t getRelativeVirtualAddress() const = 0;
virtual uint32_t getSamplerSlot() const = 0;
virtual uint32_t getSignature() const = 0;
virtual uint32_t getSizeInUdt() const = 0;
virtual uint32_t getSlot() const = 0;
virtual std::string getSourceFileName() const = 0;
virtual std::unique_ptr<IPDBLineNumber>
getSrcLineOnTypeDefn() const = 0;
virtual uint32_t getStride() const = 0;
virtual SymIndexId getSubTypeId() const = 0;
virtual std::string getSymbolsFileName() const = 0;
virtual SymIndexId getSymIndexId() const = 0;
virtual uint32_t getTargetOffset() const = 0;
virtual uint32_t getTargetRelativeVirtualAddress() const = 0;
virtual uint64_t getTargetVirtualAddress() const = 0;
virtual uint32_t getTargetSection() const = 0;
virtual uint32_t getTextureSlot() const = 0;
virtual uint32_t getTimeStamp() const = 0;
virtual uint32_t getToken() const = 0;
virtual SymIndexId getTypeId() const = 0;
virtual uint32_t getUavSlot() const = 0;
virtual std::string getUndecoratedName() const = 0;
virtual std::string getUndecoratedNameEx(PDB_UndnameFlags Flags) const = 0;
virtual SymIndexId getUnmodifiedTypeId() const = 0;
virtual SymIndexId getUpperBoundId() const = 0;
virtual Variant getValue() const = 0;
virtual uint32_t getVirtualBaseDispIndex() const = 0;
virtual uint32_t getVirtualBaseOffset() const = 0;
virtual std::unique_ptr<PDBSymbolTypeBuiltin>
getVirtualBaseTableType() const = 0;
virtual SymIndexId getVirtualTableShapeId() const = 0;
virtual PDB_DataKind getDataKind() const = 0;
virtual PDB_SymType getSymTag() const = 0;
virtual codeview::GUID getGuid() const = 0;
virtual int32_t getOffset() const = 0;
virtual int32_t getThisAdjust() const = 0;
virtual int32_t getVirtualBasePointerOffset() const = 0;
virtual PDB_LocType getLocationType() const = 0;
virtual PDB_Machine getMachineType() const = 0;
virtual codeview::ThunkOrdinal getThunkOrdinal() const = 0;
virtual uint64_t getLength() const = 0;
virtual uint64_t getLiveRangeLength() const = 0;
virtual uint64_t getVirtualAddress() const = 0;
virtual PDB_UdtType getUdtKind() const = 0;
virtual bool hasConstructor() const = 0;
virtual bool hasCustomCallingConvention() const = 0;
virtual bool hasFarReturn() const = 0;
virtual bool isCode() const = 0;
virtual bool isCompilerGenerated() const = 0;
virtual bool isConstType() const = 0;
virtual bool isEditAndContinueEnabled() const = 0;
virtual bool isFunction() const = 0;
virtual bool getAddressTaken() const = 0;
virtual bool getNoStackOrdering() const = 0;
virtual bool hasAlloca() const = 0;
virtual bool hasAssignmentOperator() const = 0;
virtual bool hasCTypes() const = 0;
virtual bool hasCastOperator() const = 0;
virtual bool hasDebugInfo() const = 0;
virtual bool hasEH() const = 0;
virtual bool hasEHa() const = 0;
virtual bool hasFramePointer() const = 0;
virtual bool hasInlAsm() const = 0;
virtual bool hasInlineAttribute() const = 0;
virtual bool hasInterruptReturn() const = 0;
virtual bool hasLongJump() const = 0;
virtual bool hasManagedCode() const = 0;
virtual bool hasNestedTypes() const = 0;
virtual bool hasNoInlineAttribute() const = 0;
virtual bool hasNoReturnAttribute() const = 0;
virtual bool hasOptimizedCodeDebugInfo() const = 0;
virtual bool hasOverloadedOperator() const = 0;
virtual bool hasSEH() const = 0;
virtual bool hasSecurityChecks() const = 0;
virtual bool hasSetJump() const = 0;
virtual bool hasStrictGSCheck() const = 0;
virtual bool isAcceleratorGroupSharedLocal() const = 0;
virtual bool isAcceleratorPointerTagLiveRange() const = 0;
virtual bool isAcceleratorStubFunction() const = 0;
virtual bool isAggregated() const = 0;
virtual bool isIntroVirtualFunction() const = 0;
virtual bool isCVTCIL() const = 0;
virtual bool isConstructorVirtualBase() const = 0;
virtual bool isCxxReturnUdt() const = 0;
virtual bool isDataAligned() const = 0;
virtual bool isHLSLData() const = 0;
virtual bool isHotpatchable() const = 0;
virtual bool isIndirectVirtualBaseClass() const = 0;
virtual bool isInterfaceUdt() const = 0;
virtual bool isIntrinsic() const = 0;
virtual bool isLTCG() const = 0;
virtual bool isLocationControlFlowDependent() const = 0;
virtual bool isMSILNetmodule() const = 0;
virtual bool isMatrixRowMajor() const = 0;
virtual bool isManagedCode() const = 0;
virtual bool isMSILCode() const = 0;
virtual bool isMultipleInheritance() const = 0;
virtual bool isNaked() const = 0;
virtual bool isNested() const = 0;
virtual bool isOptimizedAway() const = 0;
virtual bool isPacked() const = 0;
virtual bool isPointerBasedOnSymbolValue() const = 0;
virtual bool isPointerToDataMember() const = 0;
virtual bool isPointerToMemberFunction() const = 0;
virtual bool isPureVirtual() const = 0;
virtual bool isRValueReference() const = 0;
virtual bool isRefUdt() const = 0;
virtual bool isReference() const = 0;
virtual bool isRestrictedType() const = 0;
virtual bool isReturnValue() const = 0;
virtual bool isSafeBuffers() const = 0;
virtual bool isScoped() const = 0;
virtual bool isSdl() const = 0;
virtual bool isSingleInheritance() const = 0;
virtual bool isSplitted() const = 0;
virtual bool isStatic() const = 0;
virtual bool hasPrivateSymbols() const = 0;
virtual bool isUnalignedType() const = 0;
virtual bool isUnreached() const = 0;
virtual bool isValueUdt() const = 0;
virtual bool isVirtual() const = 0;
virtual bool isVirtualBaseClass() const = 0;
virtual bool isVirtualInheritance() const = 0;
virtual bool isVolatileType() const = 0;
virtual bool wasInlined() const = 0;
virtual std::string getUnused() const = 0;
};
LLVM_ENABLE_BITMASK_ENUMS_IN_NAMESPACE();
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ+�L�8 8 ) DebugInfo/PDB/PDBSymbolCompilandDetails.hnu �[��� //===- PDBSymbolCompilandDetails.h - PDB compiland details ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLCOMPILANDDETAILS_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLCOMPILANDDETAILS_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolCompilandDetails : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::CompilandDetails)
public:
void dump(PDBSymDumper &Dumper) const override;
void getFrontEndVersion(VersionInfo &Version) const {
RawSymbol->getFrontEndVersion(Version);
}
void getBackEndVersion(VersionInfo &Version) const {
RawSymbol->getBackEndVersion(Version);
}
FORWARD_SYMBOL_METHOD(getCompilerName)
FORWARD_SYMBOL_METHOD(isEditAndContinueEnabled)
FORWARD_SYMBOL_METHOD(hasDebugInfo)
FORWARD_SYMBOL_METHOD(hasManagedCode)
FORWARD_SYMBOL_METHOD(hasSecurityChecks)
FORWARD_SYMBOL_METHOD(isCVTCIL)
FORWARD_SYMBOL_METHOD(isDataAligned)
FORWARD_SYMBOL_METHOD(isHotpatchable)
FORWARD_SYMBOL_METHOD(isLTCG)
FORWARD_SYMBOL_METHOD(isMSILNetmodule)
FORWARD_SYMBOL_METHOD(getLanguage)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(getPlatform)
FORWARD_SYMBOL_METHOD(getSourceFileName)
};
} // namespace llvm
}
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLCOMPILANDDETAILS_H
PK hwFZ[�' $ DebugInfo/PDB/PDBSymbolTypeBuiltin.hnu �[��� //===- PDBSymbolTypeBuiltin.h - builtin type information --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEBUILTIN_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEBUILTIN_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolTypeBuiltin : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::BuiltinType)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(getBuiltinType)
FORWARD_SYMBOL_METHOD(isConstType)
FORWARD_SYMBOL_METHOD(getLength)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(isUnalignedType)
FORWARD_SYMBOL_METHOD(isVolatileType)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEBUILTIN_H
PK hwFZL���< < # DebugInfo/PDB/PDBSymbolTypeVTable.hnu �[��� //===- PDBSymbolTypeVTable.h - VTable type info -----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEVTABLE_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEVTABLE_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolTypeVTable : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::VTable)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_ID_METHOD(getClassParent)
FORWARD_SYMBOL_METHOD(getOffset)
FORWARD_SYMBOL_METHOD(isConstType)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_ID_METHOD(getType)
FORWARD_SYMBOL_METHOD(isUnalignedType)
FORWARD_SYMBOL_METHOD(isVolatileType)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEVTABLE_H
PK hwFZA�F
� � ! DebugInfo/PDB/PDBSymbolTypeEnum.hnu �[��� //===- PDBSymbolTypeEnum.h - enum type info ---------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEENUM_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEENUM_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
#include "llvm/DebugInfo/PDB/IPDBRawSymbol.h"
namespace llvm {
namespace pdb {
class PDBSymDumper;
class PDBSymbolTypeBuiltin;
class PDBSymbolTypeEnum : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::Enum)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(getBuiltinType)
FORWARD_SYMBOL_ID_METHOD(getClassParent)
FORWARD_SYMBOL_METHOD(hasConstructor)
FORWARD_SYMBOL_METHOD(isConstType)
FORWARD_SYMBOL_METHOD(hasAssignmentOperator)
FORWARD_SYMBOL_METHOD(hasCastOperator)
FORWARD_SYMBOL_METHOD(hasNestedTypes)
FORWARD_SYMBOL_METHOD(getLength)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_ID_METHOD(getUnmodifiedType)
FORWARD_SYMBOL_METHOD(getName)
FORWARD_SYMBOL_METHOD(getSrcLineOnTypeDefn)
FORWARD_SYMBOL_METHOD(isNested)
FORWARD_SYMBOL_METHOD(hasOverloadedOperator)
FORWARD_SYMBOL_METHOD(isPacked)
FORWARD_SYMBOL_METHOD(isScoped)
FORWARD_CONCRETE_SYMBOL_ID_METHOD_WITH_NAME(PDBSymbolTypeBuiltin, getType,
getUnderlyingType)
FORWARD_SYMBOL_METHOD(isUnalignedType)
FORWARD_SYMBOL_METHOD(isVolatileType)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEENUM_H
PK hwFZx*� # DebugInfo/PDB/PDBSymbolAnnotation.hnu �[��� //===- PDBSymbolAnnotation.h - Accessors for querying PDB annotations ---*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLANNOTATION_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLANNOTATION_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolAnnotation : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::Annotation)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(getAddressOffset)
FORWARD_SYMBOL_METHOD(getAddressSection)
FORWARD_SYMBOL_METHOD(getDataKind)
FORWARD_SYMBOL_METHOD(getRelativeVirtualAddress)
// FORWARD_SYMBOL_METHOD(getValue)
FORWARD_SYMBOL_METHOD(getVirtualAddress)
};
}
}
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLANNOTATION_H
PK hwFZ,K�)� � # DebugInfo/PDB/PDBSymbolTypeFriend.hnu �[��� //===- PDBSymbolTypeFriend.h - friend type info -----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEFRIEND_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEFRIEND_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolTypeFriend : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::Friend)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_ID_METHOD(getClassParent)
FORWARD_SYMBOL_METHOD(getName)
FORWARD_SYMBOL_ID_METHOD(getType)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEFRIEND_H
PK hwFZ�� L DebugInfo/PDB/IPDBFrameData.hnu �[��� //===- IPDBFrameData.h - base interface for frame data ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_IPDBFRAMEDATA_H
#define LLVM_DEBUGINFO_PDB_IPDBFRAMEDATA_H
#include <cstdint>
#include <string>
namespace llvm {
namespace pdb {
/// IPDBFrameData defines an interface used to represent a frame data of some
/// code block.
class IPDBFrameData {
public:
virtual ~IPDBFrameData();
virtual uint32_t getAddressOffset() const = 0;
virtual uint32_t getAddressSection() const = 0;
virtual uint32_t getLengthBlock() const = 0;
virtual std::string getProgram() const = 0;
virtual uint32_t getRelativeVirtualAddress() const = 0;
virtual uint64_t getVirtualAddress() const = 0;
};
} // namespace pdb
} // namespace llvm
#endif
PK hwFZ�a � � % DebugInfo/PDB/PDBSymbolFuncDebugEnd.hnu �[��� //===- PDBSymbolFuncDebugEnd.h - function end bounds info -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLFUNCDEBUGEND_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLFUNCDEBUGEND_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolFuncDebugEnd : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::FuncDebugEnd)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(getAddressOffset)
FORWARD_SYMBOL_METHOD(getAddressSection)
FORWARD_SYMBOL_METHOD(hasCustomCallingConvention)
FORWARD_SYMBOL_METHOD(hasFarReturn)
FORWARD_SYMBOL_METHOD(hasInterruptReturn)
FORWARD_SYMBOL_METHOD(isStatic)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(getLocationType)
FORWARD_SYMBOL_METHOD(hasNoInlineAttribute)
FORWARD_SYMBOL_METHOD(hasNoReturnAttribute)
FORWARD_SYMBOL_METHOD(isUnreached)
FORWARD_SYMBOL_METHOD(getOffset)
FORWARD_SYMBOL_METHOD(hasOptimizedCodeDebugInfo)
FORWARD_SYMBOL_METHOD(getRelativeVirtualAddress)
FORWARD_SYMBOL_METHOD(getVirtualAddress)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLFUNCDEBUGEND_H
PK hwFZ Z\%r r $ DebugInfo/PDB/PDBSymbolTypePointer.hnu �[��� //===- PDBSymbolTypePointer.h - pointer type info ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEPOINTER_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEPOINTER_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolTypePointer : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::PointerType)
public:
void dump(PDBSymDumper &Dumper) const override;
void dumpRight(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(isConstType)
FORWARD_SYMBOL_ID_METHOD(getClassParent)
FORWARD_SYMBOL_METHOD(getLength)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(isReference)
FORWARD_SYMBOL_METHOD(isRValueReference)
FORWARD_SYMBOL_METHOD(isPointerToDataMember)
FORWARD_SYMBOL_METHOD(isPointerToMemberFunction)
FORWARD_SYMBOL_ID_METHOD_WITH_NAME(getType, getPointeeType)
FORWARD_SYMBOL_METHOD(isRestrictedType)
FORWARD_SYMBOL_METHOD(isUnalignedType)
FORWARD_SYMBOL_METHOD(isVolatileType)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEPOINTER_H
PK hwFZ�� �� � & DebugInfo/PDB/PDBSymbolTypeDimension.hnu �[��� //===- PDBSymbolTypeDimension.h - array dimension type info -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEDIMENSION_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEDIMENSION_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolTypeDimension : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::Dimension)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(getLowerBoundId)
FORWARD_SYMBOL_METHOD(getUpperBoundId)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEDIMENSION_H
PK hwFZ�7|]� � ( DebugInfo/PDB/PDBSymbolTypeFunctionArg.hnu �[��� //===- PDBSymbolTypeFunctionArg.h - function arg type info ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEFUNCTIONARG_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEFUNCTIONARG_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolTypeFunctionArg : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::FunctionArg)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_ID_METHOD(getClassParent)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_ID_METHOD(getType)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEFUNCTIONARG_H
PK hwFZ}�@Z Z DebugInfo/PDB/PDBSymbolUnknown.hnu �[��� //===- PDBSymbolUnknown.h - unknown symbol type -----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLUNKNOWN_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLUNKNOWN_H
#include "PDBSymbol.h"
namespace llvm {
namespace pdb {
class PDBSymbolUnknown : public PDBSymbol {
DECLARE_PDB_SYMBOL_CUSTOM_TYPE(S->getSymTag() == PDB_SymType::None ||
S->getSymTag() >= PDB_SymType::Max)
public:
void dump(PDBSymDumper &Dumper) const override;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLUNKNOWN_H
PK hwFZ�jP~m m DebugInfo/PDB/PDBSymbolTypeUDT.hnu �[��� //===- PDBSymbolTypeUDT.h - UDT type info -----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEUDT_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEUDT_H
#include "llvm/DebugInfo/PDB/IPDBRawSymbol.h"
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymDumper;
class PDBSymbolTypeUDT : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::UDT)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_ID_METHOD(getClassParent)
FORWARD_SYMBOL_ID_METHOD(getUnmodifiedType)
FORWARD_SYMBOL_METHOD(hasConstructor)
FORWARD_SYMBOL_METHOD(isConstType)
FORWARD_SYMBOL_METHOD(hasAssignmentOperator)
FORWARD_SYMBOL_METHOD(hasCastOperator)
FORWARD_SYMBOL_METHOD(hasNestedTypes)
FORWARD_SYMBOL_METHOD(getLength)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(getName)
FORWARD_SYMBOL_METHOD(getSrcLineOnTypeDefn)
FORWARD_SYMBOL_METHOD(isNested)
FORWARD_SYMBOL_METHOD(hasOverloadedOperator)
FORWARD_SYMBOL_METHOD(isPacked)
FORWARD_SYMBOL_METHOD(isScoped)
FORWARD_SYMBOL_METHOD(getUdtKind)
FORWARD_SYMBOL_METHOD(isUnalignedType)
FORWARD_SYMBOL_ID_METHOD(getVirtualTableShape)
FORWARD_SYMBOL_METHOD(isVolatileType)
FORWARD_SYMBOL_METHOD(getAccess)
};
}
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEUDT_H
PK hwFZ�� � & DebugInfo/PDB/PDBSymbolTypeBaseClass.hnu �[��� //===- PDBSymbolTypeBaseClass.h - base class type information ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEBASECLASS_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEBASECLASS_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
#include "llvm/DebugInfo/PDB/IPDBRawSymbol.h"
namespace llvm {
namespace pdb {
class PDBSymDumper;
class PDBSymbolTypeBaseClass : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::BaseClass)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(getAccess)
FORWARD_SYMBOL_ID_METHOD(getClassParent)
FORWARD_SYMBOL_METHOD(hasConstructor)
FORWARD_SYMBOL_METHOD(isConstType)
FORWARD_SYMBOL_METHOD(hasAssignmentOperator)
FORWARD_SYMBOL_METHOD(hasCastOperator)
FORWARD_SYMBOL_METHOD(hasNestedTypes)
FORWARD_SYMBOL_METHOD(isIndirectVirtualBaseClass)
FORWARD_SYMBOL_METHOD(getLength)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(getName)
FORWARD_SYMBOL_METHOD(isNested)
FORWARD_SYMBOL_METHOD(getOffset)
FORWARD_SYMBOL_METHOD(hasOverloadedOperator)
FORWARD_SYMBOL_METHOD(isPacked)
FORWARD_SYMBOL_METHOD(isScoped)
FORWARD_SYMBOL_ID_METHOD(getType)
FORWARD_SYMBOL_METHOD(getUdtKind)
FORWARD_SYMBOL_METHOD(isUnalignedType)
FORWARD_SYMBOL_METHOD(isVirtualBaseClass)
FORWARD_SYMBOL_METHOD(getVirtualBaseDispIndex)
FORWARD_SYMBOL_METHOD(getVirtualBasePointerOffset)
// FORWARD_SYMBOL_METHOD(getVirtualBaseTableType)
FORWARD_SYMBOL_ID_METHOD(getVirtualTableShape)
FORWARD_SYMBOL_METHOD(isVolatileType)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEBASECLASS_H
PK hwFZ:�,�� � DebugInfo/PDB/IPDBTable.hnu �[��� //===- IPDBTable.h - Base Interface for a PDB Symbol Context ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_IPDBTABLE_H
#define LLVM_DEBUGINFO_PDB_IPDBTABLE_H
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class IPDBTable {
public:
virtual ~IPDBTable();
virtual std::string getName() const = 0;
virtual uint32_t getItemCount() const = 0;
virtual PDB_TableType getTableType() const = 0;
};
}
}
#endif // LLVM_DEBUGINFO_PDB_IPDBTABLE_H
PK hwFZi��q� � DebugInfo/PDB/PDBSymbolExe.hnu �[��� //===- PDBSymbolExe.h - Accessors for querying executables in a PDB ----*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLEXE_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLEXE_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
class raw_ostream;
namespace pdb {
class PDBSymbolExe : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::Exe)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(getAge)
FORWARD_SYMBOL_METHOD(getGuid)
FORWARD_SYMBOL_METHOD(hasCTypes)
FORWARD_SYMBOL_METHOD(hasPrivateSymbols)
FORWARD_SYMBOL_METHOD(getMachineType)
FORWARD_SYMBOL_METHOD(getName)
FORWARD_SYMBOL_METHOD(getSignature)
FORWARD_SYMBOL_METHOD(getSymbolsFileName)
uint32_t getPointerByteSize() const;
private:
void dumpChildren(raw_ostream &OS, StringRef Label, PDB_SymType ChildType,
int Indent) const;
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLEXE_H
PK hwFZ��4I: : DebugInfo/PDB/PDBSymbolBlock.hnu �[��� //===- PDBSymbolBlock.h - Accessors for querying PDB blocks -------------*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLBLOCK_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLBLOCK_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolBlock : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::Block)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(getAddressOffset)
FORWARD_SYMBOL_METHOD(getAddressSection)
FORWARD_SYMBOL_METHOD(getLength)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(getLocationType)
FORWARD_SYMBOL_METHOD(getName)
FORWARD_SYMBOL_METHOD(getRelativeVirtualAddress)
FORWARD_SYMBOL_METHOD(getVirtualAddress)
};
}
}
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLBLOCK_H
PK hwFZ���� � DebugInfo/PDB/PDBSymbolLabel.hnu �[��� //===- PDBSymbolLabel.h - label info ----------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLLABEL_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLLABEL_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolLabel : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::Label)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(getAddressOffset)
FORWARD_SYMBOL_METHOD(getAddressSection)
FORWARD_SYMBOL_METHOD(hasCustomCallingConvention)
FORWARD_SYMBOL_METHOD(hasFarReturn)
FORWARD_SYMBOL_METHOD(hasInterruptReturn)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(getLocationType)
FORWARD_SYMBOL_METHOD(getName)
FORWARD_SYMBOL_METHOD(hasNoInlineAttribute)
FORWARD_SYMBOL_METHOD(hasNoReturnAttribute)
FORWARD_SYMBOL_METHOD(isUnreached)
FORWARD_SYMBOL_METHOD(getOffset)
FORWARD_SYMBOL_METHOD(hasOptimizedCodeDebugInfo)
FORWARD_SYMBOL_METHOD(getRelativeVirtualAddress)
FORWARD_SYMBOL_METHOD(getVirtualAddress)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLLABEL_H
PK hwFZ���Y� � " DebugInfo/PDB/PDBSymbolTypeArray.hnu �[��� //===- PDBSymbolTypeArray.h - array type information ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEARRAY_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEARRAY_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolTypeArray : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::ArrayType)
public:
void dump(PDBSymDumper &Dumper) const override;
void dumpRight(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_ID_METHOD(getArrayIndexType)
FORWARD_SYMBOL_METHOD(isConstType)
FORWARD_SYMBOL_METHOD(getCount)
FORWARD_SYMBOL_METHOD(getLength)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(getRank)
FORWARD_SYMBOL_ID_METHOD_WITH_NAME(getType, getElementType)
FORWARD_SYMBOL_METHOD(isUnalignedType)
FORWARD_SYMBOL_METHOD(isVolatileType)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPEARRAY_H
PK hwFZ��b�� � DebugInfo/PDB/PDBSymbol.hnu �[��� //===- PDBSymbol.h - base class for user-facing symbol types -----*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOL_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOL_H
#include "IPDBRawSymbol.h"
#include "PDBExtras.h"
#include "PDBTypes.h"
#include "llvm/Support/Casting.h"
#define FORWARD_SYMBOL_METHOD(MethodName) \
decltype(auto) MethodName() const { return RawSymbol->MethodName(); }
#define FORWARD_CONCRETE_SYMBOL_ID_METHOD_WITH_NAME(ConcreteType, PrivateName, \
PublicName) \
decltype(auto) PublicName##Id() const { \
return RawSymbol->PrivateName##Id(); \
} \
std::unique_ptr<ConcreteType> PublicName() const { \
uint32_t Id = PublicName##Id(); \
return getConcreteSymbolByIdHelper<ConcreteType>(Id); \
}
#define FORWARD_SYMBOL_ID_METHOD_WITH_NAME(PrivateName, PublicName) \
FORWARD_CONCRETE_SYMBOL_ID_METHOD_WITH_NAME(PDBSymbol, PrivateName, \
PublicName)
#define FORWARD_SYMBOL_ID_METHOD(MethodName) \
FORWARD_SYMBOL_ID_METHOD_WITH_NAME(MethodName, MethodName)
namespace llvm {
class StringRef;
class raw_ostream;
namespace pdb {
class IPDBSession;
class PDBSymDumper;
class PDBSymbol;
template <typename ChildType> class ConcreteSymbolEnumerator;
#define DECLARE_PDB_SYMBOL_CONCRETE_TYPE(TagValue) \
private: \
using PDBSymbol::PDBSymbol; \
friend class PDBSymbol; \
\
public: \
static const PDB_SymType Tag = TagValue; \
static bool classof(const PDBSymbol *S) { return S->getSymTag() == Tag; }
#define DECLARE_PDB_SYMBOL_CUSTOM_TYPE(Condition) \
private: \
using PDBSymbol::PDBSymbol; \
friend class PDBSymbol; \
\
public: \
static bool classof(const PDBSymbol *S) { return Condition; }
/// PDBSymbol defines the base of the inheritance hierarchy for concrete symbol
/// types (e.g. functions, executables, vtables, etc). All concrete symbol
/// types inherit from PDBSymbol and expose the exact set of methods that are
/// valid for that particular symbol type, as described in the Microsoft
/// reference "Lexical and Class Hierarchy of Symbol Types":
/// https://msdn.microsoft.com/en-us/library/370hs6k4.aspx
class PDBSymbol {
static std::unique_ptr<PDBSymbol> createSymbol(const IPDBSession &PDBSession,
PDB_SymType Tag);
protected:
explicit PDBSymbol(const IPDBSession &PDBSession);
PDBSymbol(PDBSymbol &&Other);
public:
static std::unique_ptr<PDBSymbol>
create(const IPDBSession &PDBSession,
std::unique_ptr<IPDBRawSymbol> RawSymbol);
static std::unique_ptr<PDBSymbol> create(const IPDBSession &PDBSession,
IPDBRawSymbol &RawSymbol);
template <typename ConcreteT>
static std::unique_ptr<ConcreteT>
createAs(const IPDBSession &PDBSession,
std::unique_ptr<IPDBRawSymbol> RawSymbol) {
std::unique_ptr<PDBSymbol> S = create(PDBSession, std::move(RawSymbol));
return unique_dyn_cast_or_null<ConcreteT>(std::move(S));
}
template <typename ConcreteT>
static std::unique_ptr<ConcreteT> createAs(const IPDBSession &PDBSession,
IPDBRawSymbol &RawSymbol) {
std::unique_ptr<PDBSymbol> S = create(PDBSession, RawSymbol);
return unique_dyn_cast_or_null<ConcreteT>(std::move(S));
}
virtual ~PDBSymbol();
/// Dumps the contents of a symbol a raw_ostream. By default this will just
/// call dump() on the underlying RawSymbol, which allows us to discover
/// unknown properties, but individual implementations of PDBSymbol may
/// override the behavior to only dump known fields.
virtual void dump(PDBSymDumper &Dumper) const = 0;
/// For certain PDBSymbolTypes, dumps additional information for the type that
/// normally goes on the right side of the symbol.
virtual void dumpRight(PDBSymDumper &Dumper) const {}
void defaultDump(raw_ostream &OS, int Indent, PdbSymbolIdField ShowFlags,
PdbSymbolIdField RecurseFlags) const;
void dumpProperties() const;
void dumpChildStats() const;
PDB_SymType getSymTag() const;
uint32_t getSymIndexId() const;
template <typename T> std::unique_ptr<T> findOneChild() const {
auto Enumerator(findAllChildren<T>());
if (!Enumerator)
return nullptr;
return Enumerator->getNext();
}
template <typename T>
std::unique_ptr<ConcreteSymbolEnumerator<T>> findAllChildren() const {
auto BaseIter = RawSymbol->findChildren(T::Tag);
if (!BaseIter)
return nullptr;
return std::make_unique<ConcreteSymbolEnumerator<T>>(std::move(BaseIter));
}
std::unique_ptr<IPDBEnumSymbols> findAllChildren(PDB_SymType Type) const;
std::unique_ptr<IPDBEnumSymbols> findAllChildren() const;
std::unique_ptr<IPDBEnumSymbols>
findChildren(PDB_SymType Type, StringRef Name,
PDB_NameSearchFlags Flags) const;
std::unique_ptr<IPDBEnumSymbols> findChildrenByRVA(PDB_SymType Type,
StringRef Name,
PDB_NameSearchFlags Flags,
uint32_t RVA) const;
std::unique_ptr<IPDBEnumSymbols> findInlineFramesByVA(uint64_t VA) const;
std::unique_ptr<IPDBEnumSymbols> findInlineFramesByRVA(uint32_t RVA) const;
std::unique_ptr<IPDBEnumLineNumbers>
findInlineeLinesByVA(uint64_t VA, uint32_t Length) const;
std::unique_ptr<IPDBEnumLineNumbers>
findInlineeLinesByRVA(uint32_t RVA, uint32_t Length) const;
std::string getName() const;
const IPDBRawSymbol &getRawSymbol() const { return *RawSymbol; }
IPDBRawSymbol &getRawSymbol() { return *RawSymbol; }
const IPDBSession &getSession() const { return Session; }
std::unique_ptr<IPDBEnumSymbols> getChildStats(TagStats &Stats) const;
protected:
std::unique_ptr<PDBSymbol> getSymbolByIdHelper(uint32_t Id) const;
template <typename ConcreteType>
std::unique_ptr<ConcreteType> getConcreteSymbolByIdHelper(uint32_t Id) const {
return unique_dyn_cast_or_null<ConcreteType>(getSymbolByIdHelper(Id));
}
const IPDBSession &Session;
std::unique_ptr<IPDBRawSymbol> OwnedRawSymbol;
IPDBRawSymbol *RawSymbol = nullptr;
};
} // namespace llvm
}
#endif
PK hwFZ�� � � " DebugInfo/PDB/IPDBSectionContrib.hnu �[��� //==- IPDBSectionContrib.h - Interfaces for PDB SectionContribs --*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_IPDBSECTIONCONTRIB_H
#define LLVM_DEBUGINFO_PDB_IPDBSECTIONCONTRIB_H
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
/// IPDBSectionContrib defines an interface used to represent section
/// contributions whose information are stored in the PDB.
class IPDBSectionContrib {
public:
virtual ~IPDBSectionContrib();
virtual std::unique_ptr<PDBSymbolCompiland> getCompiland() const = 0;
virtual uint32_t getAddressSection() const = 0;
virtual uint32_t getAddressOffset() const = 0;
virtual uint32_t getRelativeVirtualAddress() const = 0;
virtual uint64_t getVirtualAddress() const = 0;
virtual uint32_t getLength() const = 0;
virtual bool isNotPaged() const = 0;
virtual bool hasCode() const = 0;
virtual bool hasCode16Bit() const = 0;
virtual bool hasInitializedData() const = 0;
virtual bool hasUninitializedData() const = 0;
virtual bool isRemoved() const = 0;
virtual bool hasComdat() const = 0;
virtual bool isDiscardable() const = 0;
virtual bool isNotCached() const = 0;
virtual bool isShared() const = 0;
virtual bool isExecutable() const = 0;
virtual bool isReadable() const = 0;
virtual bool isWritable() const = 0;
virtual uint32_t getDataCrc32() const = 0;
virtual uint32_t getRelocationsCrc32() const = 0;
virtual uint32_t getCompilandId() const = 0;
};
}
}
#endif // LLVM_DEBUGINFO_PDB_IPDBSECTIONCONTRIB_H
PK hwFZY1��� � ' DebugInfo/PDB/PDBSymbolFuncDebugStart.hnu �[��� //===- PDBSymbolFuncDebugStart.h - function start bounds info ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLFUNCDEBUGSTART_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLFUNCDEBUGSTART_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolFuncDebugStart : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::FuncDebugStart)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(getAddressOffset)
FORWARD_SYMBOL_METHOD(getAddressSection)
FORWARD_SYMBOL_METHOD(hasCustomCallingConvention)
FORWARD_SYMBOL_METHOD(hasFarReturn)
FORWARD_SYMBOL_METHOD(hasInterruptReturn)
FORWARD_SYMBOL_METHOD(isStatic)
FORWARD_SYMBOL_ID_METHOD(getLexicalParent)
FORWARD_SYMBOL_METHOD(getLocationType)
FORWARD_SYMBOL_METHOD(hasNoInlineAttribute)
FORWARD_SYMBOL_METHOD(hasNoReturnAttribute)
FORWARD_SYMBOL_METHOD(isUnreached)
FORWARD_SYMBOL_METHOD(getOffset)
FORWARD_SYMBOL_METHOD(hasOptimizedCodeDebugInfo)
FORWARD_SYMBOL_METHOD(getRelativeVirtualAddress)
FORWARD_SYMBOL_METHOD(getVirtualAddress)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLFUNCDEBUGSTART_H
PK hwFZ�m��u u # DebugInfo/PDB/PDBSymbolTypeCustom.hnu �[��� //===- PDBSymbolTypeCustom.h - custom compiler type information -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPECUSTOM_H
#define LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPECUSTOM_H
#include "PDBSymbol.h"
#include "PDBTypes.h"
namespace llvm {
namespace pdb {
class PDBSymbolTypeCustom : public PDBSymbol {
DECLARE_PDB_SYMBOL_CONCRETE_TYPE(PDB_SymType::CustomType)
public:
void dump(PDBSymDumper &Dumper) const override;
FORWARD_SYMBOL_METHOD(getOemId)
FORWARD_SYMBOL_METHOD(getOemSymbolId)
};
} // namespace pdb
} // namespace llvm
#endif // LLVM_DEBUGINFO_PDB_PDBSYMBOLTYPECUSTOM_H
PK hwFZ����� � DebugInfo/BTF/BTFContext.hnu �[��� //===- BTFContext.h ---------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// BTFContext interface is used by llvm-objdump tool to print source
// code alongside disassembly.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_BTF_BTFCONTEXT_H
#define LLVM_DEBUGINFO_BTF_BTFCONTEXT_H
#include "llvm/DebugInfo/BTF/BTFParser.h"
#include "llvm/DebugInfo/DIContext.h"
namespace llvm {
class BTFContext final : public DIContext {
BTFParser BTF;
public:
BTFContext() : DIContext(CK_BTF) {}
void dump(raw_ostream &OS, DIDumpOptions DumpOpts) override {
// This function is called from objdump when --dwarf=? option is set.
// BTF is no DWARF, so ignore this operation for now.
}
DILineInfo getLineInfoForAddress(
object::SectionedAddress Address,
DILineInfoSpecifier Specifier = DILineInfoSpecifier()) override;
DILineInfo
getLineInfoForDataAddress(object::SectionedAddress Address) override;
DILineInfoTable getLineInfoForAddressRange(
object::SectionedAddress Address, uint64_t Size,
DILineInfoSpecifier Specifier = DILineInfoSpecifier()) override;
DIInliningInfo getInliningInfoForAddress(
object::SectionedAddress Address,
DILineInfoSpecifier Specifier = DILineInfoSpecifier()) override;
std::vector<DILocal>
getLocalsForAddress(object::SectionedAddress Address) override;
static std::unique_ptr<BTFContext> create(
const object::ObjectFile &Obj,
std::function<void(Error)> ErrorHandler = WithColor::defaultErrorHandler);
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_BTF_BTFCONTEXT_H
PK hwFZ��+# # DebugInfo/BTF/BTF.hnu �[��� //===-- BTF.h --------------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file contains the layout of .BTF and .BTF.ext ELF sections.
///
/// The binary layout for .BTF section:
/// struct Header
/// Type and Str subsections
/// The Type subsection is a collection of types with type id starting with 1.
/// The Str subsection is simply a collection of strings.
///
/// The binary layout for .BTF.ext section:
/// struct ExtHeader
/// FuncInfo, LineInfo, FieldReloc and ExternReloc subsections
/// The FuncInfo subsection is defined as below:
/// BTFFuncInfo Size
/// struct SecFuncInfo for ELF section #1
/// A number of struct BPFFuncInfo for ELF section #1
/// struct SecFuncInfo for ELF section #2
/// A number of struct BPFFuncInfo for ELF section #2
/// ...
/// The LineInfo subsection is defined as below:
/// BPFLineInfo Size
/// struct SecLineInfo for ELF section #1
/// A number of struct BPFLineInfo for ELF section #1
/// struct SecLineInfo for ELF section #2
/// A number of struct BPFLineInfo for ELF section #2
/// ...
/// The FieldReloc subsection is defined as below:
/// BPFFieldReloc Size
/// struct SecFieldReloc for ELF section #1
/// A number of struct BPFFieldReloc for ELF section #1
/// struct SecFieldReloc for ELF section #2
/// A number of struct BPFFieldReloc for ELF section #2
/// ...
///
/// The section formats are also defined at
/// https://github.com/torvalds/linux/blob/master/include/uapi/linux/btf.h
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_BPF_BTF_H
#define LLVM_LIB_TARGET_BPF_BTF_H
#include <cstdint>
namespace llvm {
namespace BTF {
enum : uint32_t { MAGIC = 0xeB9F, VERSION = 1 };
/// Sizes in bytes of various things in the BTF format.
enum {
HeaderSize = 24,
ExtHeaderSize = 32,
CommonTypeSize = 12,
BTFArraySize = 12,
BTFEnumSize = 8,
BTFEnum64Size = 12,
BTFMemberSize = 12,
BTFParamSize = 8,
BTFDataSecVarSize = 12,
SecFuncInfoSize = 8,
SecLineInfoSize = 8,
SecFieldRelocSize = 8,
BPFFuncInfoSize = 8,
BPFLineInfoSize = 16,
BPFFieldRelocSize = 16,
};
/// The .BTF section header definition.
struct Header {
uint16_t Magic; ///< Magic value
uint8_t Version; ///< Version number
uint8_t Flags; ///< Extra flags
uint32_t HdrLen; ///< Length of this header
/// All offsets are in bytes relative to the end of this header.
uint32_t TypeOff; ///< Offset of type section
uint32_t TypeLen; ///< Length of type section
uint32_t StrOff; ///< Offset of string section
uint32_t StrLen; ///< Length of string section
};
enum : uint32_t {
MAX_VLEN = 0xffff ///< Max # of struct/union/enum members or func args
};
enum TypeKinds : uint8_t {
#define HANDLE_BTF_KIND(ID, NAME) BTF_KIND_##NAME = ID,
#include "BTF.def"
};
/// The BTF common type definition. Different kinds may have
/// additional information after this structure data.
struct CommonType {
/// Type name offset in the string table.
uint32_t NameOff;
/// "Info" bits arrangement:
/// Bits 0-15: vlen (e.g. # of struct's members)
/// Bits 16-23: unused
/// Bits 24-27: kind (e.g. int, ptr, array...etc)
/// Bits 28-30: unused
/// Bit 31: kind_flag, currently used by
/// struct, union and fwd
uint32_t Info;
/// "Size" is used by INT, ENUM, STRUCT and UNION.
/// "Size" tells the size of the type it is describing.
///
/// "Type" is used by PTR, TYPEDEF, VOLATILE, CONST, RESTRICT,
/// FUNC, FUNC_PROTO, VAR, DECL_TAG and TYPE_TAG.
/// "Type" is a type_id referring to another type.
union {
uint32_t Size;
uint32_t Type;
};
};
// For some specific BTF_KIND, "struct CommonType" is immediately
// followed by extra data.
// BTF_KIND_INT is followed by a u32 and the following
// is the 32 bits arrangement:
// BTF_INT_ENCODING(VAL) : (((VAL) & 0x0f000000) >> 24)
// BTF_INT_OFFSET(VAL) : (((VAL & 0x00ff0000)) >> 16)
// BTF_INT_BITS(VAL) : ((VAL) & 0x000000ff)
/// Attributes stored in the INT_ENCODING.
enum : uint8_t {
INT_SIGNED = (1 << 0),
INT_CHAR = (1 << 1),
INT_BOOL = (1 << 2)
};
/// BTF_KIND_ENUM is followed by multiple "struct BTFEnum".
/// The exact number of btf_enum is stored in the vlen (of the
/// info in "struct CommonType").
struct BTFEnum {
uint32_t NameOff; ///< Enum name offset in the string table
int32_t Val; ///< Enum member value
};
/// BTF_KIND_ENUM64 is followed by multiple "struct BTFEnum64".
/// The exact number of BTFEnum64 is stored in the vlen (of the
/// info in "struct CommonType").
struct BTFEnum64 {
uint32_t NameOff; ///< Enum name offset in the string table
uint32_t Val_Lo32; ///< Enum member lo32 value
uint32_t Val_Hi32; ///< Enum member hi32 value
};
/// BTF_KIND_ARRAY is followed by one "struct BTFArray".
struct BTFArray {
uint32_t ElemType; ///< Element type
uint32_t IndexType; ///< Index type
uint32_t Nelems; ///< Number of elements for this array
};
/// BTF_KIND_STRUCT and BTF_KIND_UNION are followed
/// by multiple "struct BTFMember". The exact number
/// of BTFMember is stored in the vlen (of the info in
/// "struct CommonType").
///
/// If the struct/union contains any bitfield member,
/// the Offset below represents BitOffset (bits 0 - 23)
/// and BitFieldSize(bits 24 - 31) with BitFieldSize = 0
/// for non bitfield members. Otherwise, the Offset
/// represents the BitOffset.
struct BTFMember {
uint32_t NameOff; ///< Member name offset in the string table
uint32_t Type; ///< Member type
uint32_t Offset; ///< BitOffset or BitFieldSize+BitOffset
};
/// BTF_KIND_FUNC_PROTO are followed by multiple "struct BTFParam".
/// The exist number of BTFParam is stored in the vlen (of the info
/// in "struct CommonType").
struct BTFParam {
uint32_t NameOff;
uint32_t Type;
};
/// BTF_KIND_FUNC can be global, static or extern.
enum : uint8_t {
FUNC_STATIC = 0,
FUNC_GLOBAL = 1,
FUNC_EXTERN = 2,
};
/// Variable scoping information.
enum : uint8_t {
VAR_STATIC = 0, ///< Linkage: InternalLinkage
VAR_GLOBAL_ALLOCATED = 1, ///< Linkage: ExternalLinkage
VAR_GLOBAL_EXTERNAL = 2, ///< Linkage: ExternalLinkage
};
/// BTF_KIND_DATASEC are followed by multiple "struct BTFDataSecVar".
/// The exist number of BTFDataSec is stored in the vlen (of the info
/// in "struct CommonType").
struct BTFDataSec {
uint32_t Type; ///< A BTF_KIND_VAR type
uint32_t Offset; ///< In-section offset
uint32_t Size; ///< Occupied memory size
};
/// The .BTF.ext section header definition.
struct ExtHeader {
uint16_t Magic;
uint8_t Version;
uint8_t Flags;
uint32_t HdrLen;
uint32_t FuncInfoOff; ///< Offset of func info section
uint32_t FuncInfoLen; ///< Length of func info section
uint32_t LineInfoOff; ///< Offset of line info section
uint32_t LineInfoLen; ///< Length of line info section
uint32_t FieldRelocOff; ///< Offset of offset reloc section
uint32_t FieldRelocLen; ///< Length of offset reloc section
};
/// Specifying one function info.
struct BPFFuncInfo {
uint32_t InsnOffset; ///< Byte offset in the section
uint32_t TypeId; ///< Type id referring to .BTF type section
};
/// Specifying function info's in one section.
struct SecFuncInfo {
uint32_t SecNameOff; ///< Section name index in the .BTF string table
uint32_t NumFuncInfo; ///< Number of func info's in this section
};
/// Specifying one line info.
struct BPFLineInfo {
uint32_t InsnOffset; ///< Byte offset in this section
uint32_t FileNameOff; ///< File name index in the .BTF string table
uint32_t LineOff; ///< Line index in the .BTF string table
uint32_t LineCol; ///< Line num: line_col >> 10,
/// col num: line_col & 0x3ff
uint32_t getLine() const { return LineCol >> 10; }
uint32_t getCol() const { return LineCol & 0x3ff; }
};
/// Specifying line info's in one section.
struct SecLineInfo {
uint32_t SecNameOff; ///< Section name index in the .BTF string table
uint32_t NumLineInfo; ///< Number of line info's in this section
};
/// Specifying one offset relocation.
struct BPFFieldReloc {
uint32_t InsnOffset; ///< Byte offset in this section
uint32_t TypeID; ///< TypeID for the relocation
uint32_t OffsetNameOff; ///< The string to traverse types
uint32_t RelocKind; ///< What to patch the instruction
};
/// Specifying offset relocation's in one section.
struct SecFieldReloc {
uint32_t SecNameOff; ///< Section name index in the .BTF string table
uint32_t NumFieldReloc; ///< Number of offset reloc's in this section
};
} // End namespace BTF.
} // End namespace llvm.
#endif
PK hwFZ R�j j DebugInfo/BTF/BTF.defnu �[��� //===- BTF.def - BTF definitions --------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Macros for BTF.
//
//===----------------------------------------------------------------------===//
#if !defined(HANDLE_BTF_KIND)
#error "Missing macro definition of HANDLE_BTF_*"
#endif
HANDLE_BTF_KIND(0, UNKN)
HANDLE_BTF_KIND(1, INT)
HANDLE_BTF_KIND(2, PTR)
HANDLE_BTF_KIND(3, ARRAY)
HANDLE_BTF_KIND(4, STRUCT)
HANDLE_BTF_KIND(5, UNION)
HANDLE_BTF_KIND(6, ENUM)
HANDLE_BTF_KIND(7, FWD)
HANDLE_BTF_KIND(8, TYPEDEF)
HANDLE_BTF_KIND(9, VOLATILE)
HANDLE_BTF_KIND(10, CONST)
HANDLE_BTF_KIND(11, RESTRICT)
HANDLE_BTF_KIND(12, FUNC)
HANDLE_BTF_KIND(13, FUNC_PROTO)
HANDLE_BTF_KIND(14, VAR)
HANDLE_BTF_KIND(15, DATASEC)
HANDLE_BTF_KIND(16, FLOAT)
HANDLE_BTF_KIND(17, DECL_TAG)
HANDLE_BTF_KIND(18, TYPE_TAG)
HANDLE_BTF_KIND(19, ENUM64)
#undef HANDLE_BTF_KIND
PK hwFZ,�n8 DebugInfo/BTF/BTFParser.hnu �[��� //===- BTFParser.h ----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// BTFParser reads .BTF and .BTF.ext ELF sections generated by LLVM
// BPF backend and provides introspection for the stored information.
// Currently the following information is accessible:
// - string table;
// - instruction offset to line information mapping.
//
// See llvm/DebugInfo/BTF/BTF.h for some details about binary format
// and links to Linux Kernel documentation.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_BTF_BTFPARSER_H
#define LLVM_DEBUGINFO_BTF_BTFPARSER_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/DebugInfo/BTF/BTF.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/Support/DataExtractor.h"
namespace llvm {
using object::ObjectFile;
using object::SectionedAddress;
using object::SectionRef;
class BTFParser {
using BTFLinesVector = SmallVector<BTF::BPFLineInfo, 0>;
// In BTF strings are stored as a continuous memory region with
// individual strings separated by 0 bytes. Strings are identified
// by an offset in such region.
// The `StringsTable` points to this region in the parsed ObjectFile.
StringRef StringsTable;
// Maps ELF section number to instruction line number information.
// Each BTFLinesVector is sorted by `InsnOffset` to allow fast lookups.
DenseMap<uint64_t, BTFLinesVector> SectionLines;
struct ParseContext;
Error parseBTF(ParseContext &Ctx, SectionRef BTF);
Error parseBTFExt(ParseContext &Ctx, SectionRef BTFExt);
Error parseLineInfo(ParseContext &Ctx, DataExtractor &Extractor,
uint64_t LineInfoStart, uint64_t LineInfoEnd);
public:
// Looks-up a string in the .BTF section's string table.
// Offset is relative to string table start.
StringRef findString(uint32_t Offset) const;
// Search for line information for a specific address,
// address match is exact (contrary to DWARFContext).
// Return nullptr if no information found.
// If information is present, return a pointer to object
// owned by this class.
const BTF::BPFLineInfo *findLineInfo(SectionedAddress Address) const;
// Fills instance of BTFParser with information stored in .BTF and
// .BTF.ext sections of the `Obj`. If this instance was already
// filled, old data is discarded.
//
// If information cannot be parsed:
// - return an error describing the failure;
// - state of the BTFParser might be incomplete but is not invalid,
// queries might be run against it, but some (or all) information
// might be unavailable;
Error parse(const ObjectFile &Obj);
// Return true if `Obj` has .BTF and .BTF.ext sections.
static bool hasBTFSections(const ObjectFile &Obj);
};
} // namespace llvm
#endif // LLVM_DEBUGINFO_BTF_BTFPARSER_H
PK hwFZ���r= = , DebugInfo/Symbolize/SymbolizableObjectFile.hnu �[��� //===- SymbolizableObjectFile.h ---------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the SymbolizableObjectFile class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_SYMBOLIZE_SYMBOLIZABLEOBJECTFILE_H
#define LLVM_DEBUGINFO_SYMBOLIZE_SYMBOLIZABLEOBJECTFILE_H
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/DIContext.h"
#include "llvm/DebugInfo/Symbolize/SymbolizableModule.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <memory>
#include <string>
#include <utility>
#include <vector>
namespace llvm {
class DataExtractor;
namespace symbolize {
class SymbolizableObjectFile : public SymbolizableModule {
public:
static Expected<std::unique_ptr<SymbolizableObjectFile>>
create(const object::ObjectFile *Obj, std::unique_ptr<DIContext> DICtx,
bool UntagAddresses);
DILineInfo symbolizeCode(object::SectionedAddress ModuleOffset,
DILineInfoSpecifier LineInfoSpecifier,
bool UseSymbolTable) const override;
DIInliningInfo symbolizeInlinedCode(object::SectionedAddress ModuleOffset,
DILineInfoSpecifier LineInfoSpecifier,
bool UseSymbolTable) const override;
DIGlobal symbolizeData(object::SectionedAddress ModuleOffset) const override;
std::vector<DILocal>
symbolizeFrame(object::SectionedAddress ModuleOffset) const override;
// Return true if this is a 32-bit x86 PE COFF module.
bool isWin32Module() const override;
// Returns the preferred base of the module, i.e. where the loader would place
// it in memory assuming there were no conflicts.
uint64_t getModulePreferredBase() const override;
private:
bool shouldOverrideWithSymbolTable(FunctionNameKind FNKind,
bool UseSymbolTable) const;
bool getNameFromSymbolTable(uint64_t Address, std::string &Name,
uint64_t &Addr, uint64_t &Size,
std::string &FileName) const;
// For big-endian PowerPC64 ELF, OpdAddress is the address of the .opd
// (function descriptor) section and OpdExtractor refers to its contents.
Error addSymbol(const object::SymbolRef &Symbol, uint64_t SymbolSize,
DataExtractor *OpdExtractor = nullptr,
uint64_t OpdAddress = 0);
Error addCoffExportSymbols(const object::COFFObjectFile *CoffObj);
/// Search for the first occurence of specified Address in ObjectFile.
uint64_t getModuleSectionIndexForAddress(uint64_t Address) const;
const object::ObjectFile *Module;
std::unique_ptr<DIContext> DebugInfoContext;
bool UntagAddresses;
struct SymbolDesc {
uint64_t Addr;
// If size is 0, assume that symbol occupies the whole memory range up to
// the following symbol.
uint64_t Size;
StringRef Name;
// Non-zero if this is an ELF local symbol. See the comment in
// getNameFromSymbolTable.
uint32_t ELFLocalSymIdx;
bool operator<(const SymbolDesc &RHS) const {
return Addr != RHS.Addr ? Addr < RHS.Addr : Size < RHS.Size;
}
};
std::vector<SymbolDesc> Symbols;
// (index, filename) pairs of ELF STT_FILE symbols.
std::vector<std::pair<uint32_t, StringRef>> FileSymbols;
SymbolizableObjectFile(const object::ObjectFile *Obj,
std::unique_ptr<DIContext> DICtx,
bool UntagAddresses);
};
} // end namespace symbolize
} // end namespace llvm
#endif // LLVM_DEBUGINFO_SYMBOLIZE_SYMBOLIZABLEOBJECTFILE_H
PK hwFZ]�^ � � " DebugInfo/Symbolize/MarkupFilter.hnu �[��� //===- MarkupFilter.h -------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file declares a filter that replaces symbolizer markup with
/// human-readable expressions.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_SYMBOLIZE_MARKUPFILTER_H
#define LLVM_DEBUGINFO_SYMBOLIZE_MARKUPFILTER_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/DebugInfo/Symbolize/Markup.h"
#include "llvm/Object/BuildID.h"
#include "llvm/Support/WithColor.h"
#include "llvm/Support/raw_ostream.h"
#include <map>
namespace llvm {
namespace symbolize {
class LLVMSymbolizer;
/// Filter to convert parsed log symbolizer markup elements into human-readable
/// text.
class MarkupFilter {
public:
MarkupFilter(raw_ostream &OS, LLVMSymbolizer &Symbolizer,
std::optional<bool> ColorsEnabled = std::nullopt);
/// Filters a line containing symbolizer markup and writes the human-readable
/// results to the output stream.
///
/// Invalid or unimplemented markup elements are removed. Some output may be
/// deferred until future filter() or finish() call.
void filter(StringRef Line);
/// Records that the input stream has ended and writes any deferred output.
void finish();
private:
struct Module {
uint64_t ID;
std::string Name;
SmallVector<uint8_t> BuildID;
};
struct MMap {
uint64_t Addr;
uint64_t Size;
const Module *Mod;
std::string Mode; // Lowercase
uint64_t ModuleRelativeAddr;
bool contains(uint64_t Addr) const;
uint64_t getModuleRelativeAddr(uint64_t Addr) const;
};
// An informational module line currently being constructed. As many mmap
// elements as possible are folded into one ModuleInfo line.
struct ModuleInfoLine {
const Module *Mod;
SmallVector<const MMap *> MMaps = {};
};
// The semantics of a possible program counter value.
enum class PCType {
// The address is a return address and must be adjusted to point to the call
// itself.
ReturnAddress,
// The address is the precise location in the code and needs no adjustment.
PreciseCode,
};
bool tryContextualElement(const MarkupNode &Node,
const SmallVector<MarkupNode> &DeferredNodes);
bool tryMMap(const MarkupNode &Element,
const SmallVector<MarkupNode> &DeferredNodes);
bool tryReset(const MarkupNode &Element,
const SmallVector<MarkupNode> &DeferredNodes);
bool tryModule(const MarkupNode &Element,
const SmallVector<MarkupNode> &DeferredNodes);
void beginModuleInfoLine(const Module *M);
void endAnyModuleInfoLine();
void filterNode(const MarkupNode &Node);
bool tryPresentation(const MarkupNode &Node);
bool trySymbol(const MarkupNode &Node);
bool tryPC(const MarkupNode &Node);
bool tryBackTrace(const MarkupNode &Node);
bool tryData(const MarkupNode &Node);
bool trySGR(const MarkupNode &Node);
void highlight();
void highlightValue();
void restoreColor();
void resetColor();
void printRawElement(const MarkupNode &Element);
void printValue(Twine Value);
std::optional<Module> parseModule(const MarkupNode &Element) const;
std::optional<MMap> parseMMap(const MarkupNode &Element) const;
std::optional<uint64_t> parseAddr(StringRef Str) const;
std::optional<uint64_t> parseModuleID(StringRef Str) const;
std::optional<uint64_t> parseSize(StringRef Str) const;
object::BuildID parseBuildID(StringRef Str) const;
std::optional<std::string> parseMode(StringRef Str) const;
std::optional<PCType> parsePCType(StringRef Str) const;
std::optional<uint64_t> parseFrameNumber(StringRef Str) const;
bool checkTag(const MarkupNode &Node) const;
bool checkNumFields(const MarkupNode &Element, size_t Size) const;
bool checkNumFieldsAtLeast(const MarkupNode &Element, size_t Size) const;
void warnNumFieldsAtMost(const MarkupNode &Element, size_t Size) const;
void reportTypeError(StringRef Str, StringRef TypeName) const;
void reportLocation(StringRef::iterator Loc) const;
const MMap *getOverlappingMMap(const MMap &Map) const;
const MMap *getContainingMMap(uint64_t Addr) const;
uint64_t adjustAddr(uint64_t Addr, PCType Type) const;
StringRef lineEnding() const;
raw_ostream &OS;
LLVMSymbolizer &Symbolizer;
const bool ColorsEnabled;
MarkupParser Parser;
// Current line being filtered.
StringRef Line;
// A module info line currently being built. This incorporates as much mmap
// information as possible before being emitted.
std::optional<ModuleInfoLine> MIL;
// SGR state.
std::optional<raw_ostream::Colors> Color;
bool Bold = false;
// Map from Module ID to Module.
DenseMap<uint64_t, std::unique_ptr<Module>> Modules;
// Ordered map from starting address to mmap.
std::map<uint64_t, MMap> MMaps;
};
} // end namespace symbolize
} // end namespace llvm
#endif // LLVM_DEBUGINFO_SYMBOLIZE_MARKUPFILTER_H
PK hwFZB�K�x x DebugInfo/Symbolize/Markup.hnu �[��� //===- Markup.h -------------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file declares the log symbolizer markup data model and parser.
///
/// See https://llvm.org/docs/SymbolizerMarkupFormat.html
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_SYMBOLIZE_MARKUP_H
#define LLVM_DEBUGINFO_SYMBOLIZE_MARKUP_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/StringSet.h"
#include "llvm/Support/Regex.h"
namespace llvm {
namespace symbolize {
/// A node of symbolizer markup.
///
/// If only the Text field is set, this represents a region of text outside a
/// markup element. ANSI SGR control codes are also reported this way; if
/// detected, then the control code will be the entirety of the Text field, and
/// any surrounding text will be reported as preceding and following nodes.
struct MarkupNode {
/// The full text of this node in the input.
StringRef Text;
/// If this represents an element, the tag. Otherwise, empty.
StringRef Tag;
/// If this represents an element with fields, a list of the field contents.
/// Otherwise, empty.
SmallVector<StringRef> Fields;
bool operator==(const MarkupNode &Other) const {
return Text == Other.Text && Tag == Other.Tag && Fields == Other.Fields;
}
bool operator!=(const MarkupNode &Other) const { return !(*this == Other); }
};
/// Parses a log containing symbolizer markup into a sequence of nodes.
class MarkupParser {
public:
MarkupParser(StringSet<> MultilineTags = {});
/// Parses an individual \p Line of input.
///
/// Nodes from the previous parseLine() call that haven't yet been extracted
/// by nextNode() are discarded. The nodes returned by nextNode() may
/// reference the input string, so it must be retained by the caller until the
/// last use.
///
/// Note that some elements may span multiple lines. If a line ends with the
/// start of one of these elements, then no nodes will be produced until the
/// either the end or something that cannot be part of an element is
/// encountered. This may only occur after multiple calls to parseLine(),
/// corresponding to the lines of the multi-line element.
void parseLine(StringRef Line);
/// Inform the parser of that the input stream has ended.
///
/// This allows the parser to finish any deferred processing (e.g., an
/// in-progress multi-line element) and may cause nextNode() to return
/// additional nodes.
void flush();
/// Returns the next node in the input sequence.
///
/// Calling nextNode() may invalidate the contents of the node returned by the
/// previous call.
///
/// \returns the next markup node or std::nullopt if none remain.
std::optional<MarkupNode> nextNode();
bool isSGR(const MarkupNode &Node) const {
return SGRSyntax.match(Node.Text);
}
private:
std::optional<MarkupNode> parseElement(StringRef Line);
void parseTextOutsideMarkup(StringRef Text);
std::optional<StringRef> parseMultiLineBegin(StringRef Line);
std::optional<StringRef> parseMultiLineEnd(StringRef Line);
// Tags of elements that can span multiple lines.
const StringSet<> MultilineTags;
// Contents of a multi-line element that has finished being parsed. Retained
// to keep returned StringRefs for the contents valid.
std::string FinishedMultiline;
// Contents of a multi-line element that is still in the process of receiving
// lines.
std::string InProgressMultiline;
// The line currently being parsed.
StringRef Line;
// Buffer for nodes parsed from the current line.
SmallVector<MarkupNode> Buffer;
// Next buffer index to return.
size_t NextIdx;
// Regular expression matching supported ANSI SGR escape sequences.
const Regex SGRSyntax;
};
} // end namespace symbolize
} // end namespace llvm
#endif // LLVM_DEBUGINFO_SYMBOLIZE_MARKUP_H
PK hwFZ����x$ x$ DebugInfo/Symbolize/Symbolize.hnu �[��� //===- Symbolize.h ----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Header for LLVM symbolization library.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_SYMBOLIZE_SYMBOLIZE_H
#define LLVM_DEBUGINFO_SYMBOLIZE_SYMBOLIZE_H
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/ilist_node.h"
#include "llvm/ADT/simple_ilist.h"
#include "llvm/DebugInfo/DIContext.h"
#include "llvm/Object/Binary.h"
#include "llvm/Object/BuildID.h"
#include "llvm/Support/Error.h"
#include <algorithm>
#include <cstdint>
#include <map>
#include <memory>
#include <string>
#include <utility>
#include <vector>
namespace llvm {
namespace object {
class ELFObjectFileBase;
class MachOObjectFile;
class ObjectFile;
struct SectionedAddress;
} // namespace object
namespace symbolize {
class SymbolizableModule;
using namespace object;
using FunctionNameKind = DILineInfoSpecifier::FunctionNameKind;
using FileLineInfoKind = DILineInfoSpecifier::FileLineInfoKind;
class CachedBinary;
class LLVMSymbolizer {
public:
struct Options {
FunctionNameKind PrintFunctions = FunctionNameKind::LinkageName;
FileLineInfoKind PathStyle = FileLineInfoKind::AbsoluteFilePath;
bool UseSymbolTable = true;
bool Demangle = true;
bool RelativeAddresses = false;
bool UntagAddresses = false;
bool UseDIA = false;
std::string DefaultArch;
std::vector<std::string> DsymHints;
std::string FallbackDebugPath;
std::string DWPName;
std::vector<std::string> DebugFileDirectory;
size_t MaxCacheSize =
sizeof(size_t) == 4
? 512 * 1024 * 1024 /* 512 MiB */
: static_cast<size_t>(4ULL * 1024 * 1024 * 1024) /* 4 GiB */;
};
LLVMSymbolizer();
LLVMSymbolizer(const Options &Opts);
~LLVMSymbolizer();
// Overloads accepting ObjectFile does not support COFF currently
Expected<DILineInfo> symbolizeCode(const ObjectFile &Obj,
object::SectionedAddress ModuleOffset);
Expected<DILineInfo> symbolizeCode(const std::string &ModuleName,
object::SectionedAddress ModuleOffset);
Expected<DILineInfo> symbolizeCode(ArrayRef<uint8_t> BuildID,
object::SectionedAddress ModuleOffset);
Expected<DIInliningInfo>
symbolizeInlinedCode(const ObjectFile &Obj,
object::SectionedAddress ModuleOffset);
Expected<DIInliningInfo>
symbolizeInlinedCode(const std::string &ModuleName,
object::SectionedAddress ModuleOffset);
Expected<DIInliningInfo>
symbolizeInlinedCode(ArrayRef<uint8_t> BuildID,
object::SectionedAddress ModuleOffset);
Expected<DIGlobal> symbolizeData(const ObjectFile &Obj,
object::SectionedAddress ModuleOffset);
Expected<DIGlobal> symbolizeData(const std::string &ModuleName,
object::SectionedAddress ModuleOffset);
Expected<DIGlobal> symbolizeData(ArrayRef<uint8_t> BuildID,
object::SectionedAddress ModuleOffset);
Expected<std::vector<DILocal>>
symbolizeFrame(const ObjectFile &Obj, object::SectionedAddress ModuleOffset);
Expected<std::vector<DILocal>>
symbolizeFrame(const std::string &ModuleName,
object::SectionedAddress ModuleOffset);
Expected<std::vector<DILocal>>
symbolizeFrame(ArrayRef<uint8_t> BuildID,
object::SectionedAddress ModuleOffset);
void flush();
// Evict entries from the binary cache until it is under the maximum size
// given in the options. Calling this invalidates references in the DI...
// objects returned by the methods above.
void pruneCache();
static std::string
DemangleName(const std::string &Name,
const SymbolizableModule *DbiModuleDescriptor);
void setBuildIDFetcher(std::unique_ptr<BuildIDFetcher> Fetcher) {
BIDFetcher = std::move(Fetcher);
}
/// Returns a SymbolizableModule or an error if loading debug info failed.
/// Only one attempt is made to load a module, and errors during loading are
/// only reported once. Subsequent calls to get module info for a module that
/// failed to load will return nullptr.
Expected<SymbolizableModule *>
getOrCreateModuleInfo(const std::string &ModuleName);
private:
// Bundles together object file with code/data and object file with
// corresponding debug info. These objects can be the same.
using ObjectPair = std::pair<const ObjectFile *, const ObjectFile *>;
template <typename T>
Expected<DILineInfo>
symbolizeCodeCommon(const T &ModuleSpecifier,
object::SectionedAddress ModuleOffset);
template <typename T>
Expected<DIInliningInfo>
symbolizeInlinedCodeCommon(const T &ModuleSpecifier,
object::SectionedAddress ModuleOffset);
template <typename T>
Expected<DIGlobal> symbolizeDataCommon(const T &ModuleSpecifier,
object::SectionedAddress ModuleOffset);
template <typename T>
Expected<std::vector<DILocal>>
symbolizeFrameCommon(const T &ModuleSpecifier,
object::SectionedAddress ModuleOffset);
Expected<SymbolizableModule *> getOrCreateModuleInfo(const ObjectFile &Obj);
/// Returns a SymbolizableModule or an error if loading debug info failed.
/// Unlike the above, errors are reported each time, since they are more
/// likely to be transient.
Expected<SymbolizableModule *>
getOrCreateModuleInfo(ArrayRef<uint8_t> BuildID);
Expected<SymbolizableModule *>
createModuleInfo(const ObjectFile *Obj, std::unique_ptr<DIContext> Context,
StringRef ModuleName);
ObjectFile *lookUpDsymFile(const std::string &Path,
const MachOObjectFile *ExeObj,
const std::string &ArchName);
ObjectFile *lookUpDebuglinkObject(const std::string &Path,
const ObjectFile *Obj,
const std::string &ArchName);
ObjectFile *lookUpBuildIDObject(const std::string &Path,
const ELFObjectFileBase *Obj,
const std::string &ArchName);
bool findDebugBinary(const std::string &OrigPath,
const std::string &DebuglinkName, uint32_t CRCHash,
std::string &Result);
bool getOrFindDebugBinary(const ArrayRef<uint8_t> BuildID,
std::string &Result);
/// Returns pair of pointers to object and debug object.
Expected<ObjectPair> getOrCreateObjectPair(const std::string &Path,
const std::string &ArchName);
/// Return a pointer to object file at specified path, for a specified
/// architecture (e.g. if path refers to a Mach-O universal binary, only one
/// object file from it will be returned).
Expected<ObjectFile *> getOrCreateObject(const std::string &Path,
const std::string &ArchName);
/// Update the LRU cache order when a binary is accessed.
void recordAccess(CachedBinary &Bin);
std::map<std::string, std::unique_ptr<SymbolizableModule>, std::less<>>
Modules;
StringMap<std::string> BuildIDPaths;
/// Contains cached results of getOrCreateObjectPair().
std::map<std::pair<std::string, std::string>, ObjectPair>
ObjectPairForPathArch;
/// Contains parsed binary for each path, or parsing error.
std::map<std::string, CachedBinary> BinaryForPath;
/// A list of cached binaries in LRU order.
simple_ilist<CachedBinary> LRUBinaries;
/// Sum of the sizes of the cached binaries.
size_t CacheSize = 0;
/// Parsed object file for path/architecture pair, where "path" refers
/// to Mach-O universal binary.
std::map<std::pair<std::string, std::string>, std::unique_ptr<ObjectFile>>
ObjectForUBPathAndArch;
Options Opts;
std::unique_ptr<BuildIDFetcher> BIDFetcher;
};
// A binary intrusively linked into a LRU cache list. If the binary is empty,
// then the entry marks that an error occurred, and it is not part of the LRU
// list.
class CachedBinary : public ilist_node<CachedBinary> {
public:
CachedBinary() = default;
CachedBinary(OwningBinary<Binary> Bin) : Bin(std::move(Bin)) {}
OwningBinary<Binary> &operator*() { return Bin; }
OwningBinary<Binary> *operator->() { return &Bin; }
// Add an action to be performed when the binary is evicted, before all
// previously registered evictors.
void pushEvictor(std::function<void()> Evictor);
// Run all registered evictors in the reverse of the order in which they were
// added.
void evict() {
if (Evictor)
Evictor();
}
size_t size() { return Bin.getBinary()->getData().size(); }
private:
OwningBinary<Binary> Bin;
std::function<void()> Evictor;
};
} // end namespace symbolize
} // end namespace llvm
#endif // LLVM_DEBUGINFO_SYMBOLIZE_SYMBOLIZE_H
PK hwFZ�%"QM M ( DebugInfo/Symbolize/SymbolizableModule.hnu �[��� //===- SymbolizableModule.h -------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the SymbolizableModule interface.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_SYMBOLIZE_SYMBOLIZABLEMODULE_H
#define LLVM_DEBUGINFO_SYMBOLIZE_SYMBOLIZABLEMODULE_H
#include "llvm/DebugInfo/DIContext.h"
#include <cstdint>
namespace llvm {
namespace symbolize {
using FunctionNameKind = DILineInfoSpecifier::FunctionNameKind;
class SymbolizableModule {
public:
virtual ~SymbolizableModule() = default;
virtual DILineInfo symbolizeCode(object::SectionedAddress ModuleOffset,
DILineInfoSpecifier LineInfoSpecifier,
bool UseSymbolTable) const = 0;
virtual DIInliningInfo
symbolizeInlinedCode(object::SectionedAddress ModuleOffset,
DILineInfoSpecifier LineInfoSpecifier,
bool UseSymbolTable) const = 0;
virtual DIGlobal
symbolizeData(object::SectionedAddress ModuleOffset) const = 0;
virtual std::vector<DILocal>
symbolizeFrame(object::SectionedAddress ModuleOffset) const = 0;
// Return true if this is a 32-bit x86 PE COFF module.
virtual bool isWin32Module() const = 0;
// Returns the preferred base of the module, i.e. where the loader would place
// it in memory assuming there were no conflicts.
virtual uint64_t getModulePreferredBase() const = 0;
};
} // end namespace symbolize
} // end namespace llvm
#endif // LLVM_DEBUGINFO_SYMBOLIZE_SYMBOLIZABLEMODULE_H
PK hwFZL�� DebugInfo/Symbolize/DIFetcher.hnu �[��� //===-- llvm/DebugInfo/Symbolize/DIFetcher.h --------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file declares a DIFetcher abstraction for obtaining debug info from an
/// arbitrary outside source.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_SYMBOLIZE_DIFETCHER_H
#define LLVM_DEBUGINFO_SYMBOLIZE_DIFETCHER_H
#include <cstdint>
#include <string>
#include "llvm/ADT/ArrayRef.h"
namespace llvm {
namespace symbolize {
/// The DIFetcher interface provides arbitrary mechanisms for obtaining debug
/// info from an outside source.
class DIFetcher {
public:
virtual ~DIFetcher() = default;
virtual Optional<std::string>
fetchBuildID(ArrayRef<uint8_t> BuildID) const = 0;
};
/// LocalDIFetcher searches local cache directories for debug info.
class LocalDIFetcher : public DIFetcher {
public:
LocalDIFetcher(ArrayRef<std::string> DebugFileDirectory)
: DebugFileDirectory(DebugFileDirectory){};
virtual ~LocalDIFetcher() = default;
Optional<std::string> fetchBuildID(ArrayRef<uint8_t> BuildID) const override;
private:
const ArrayRef<std::string> DebugFileDirectory;
};
} // end namespace symbolize
} // end namespace llvm
#endif // LLVM_DEBUGINFO_SYMBOLIZE_DIFETCHER_H
PK hwFZoۿ�� � DebugInfo/Symbolize/DIPrinter.hnu �[��� //===- llvm/DebugInfo/Symbolize/DIPrinter.h ---------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the DIPrinter class, which is responsible for printing
// structures defined in DebugInfo/DIContext.h
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_SYMBOLIZE_DIPRINTER_H
#define LLVM_DEBUGINFO_SYMBOLIZE_DIPRINTER_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/JSON.h"
#include <memory>
#include <vector>
namespace llvm {
struct DILineInfo;
class DIInliningInfo;
struct DIGlobal;
struct DILocal;
class ErrorInfoBase;
class raw_ostream;
namespace symbolize {
class SourceCode;
struct Request {
StringRef ModuleName;
std::optional<uint64_t> Address;
};
class DIPrinter {
public:
DIPrinter() = default;
virtual ~DIPrinter() = default;
virtual void print(const Request &Request, const DILineInfo &Info) = 0;
virtual void print(const Request &Request, const DIInliningInfo &Info) = 0;
virtual void print(const Request &Request, const DIGlobal &Global) = 0;
virtual void print(const Request &Request,
const std::vector<DILocal> &Locals) = 0;
virtual void printInvalidCommand(const Request &Request,
StringRef Command) = 0;
virtual bool printError(const Request &Request,
const ErrorInfoBase &ErrorInfo) = 0;
virtual void listBegin() = 0;
virtual void listEnd() = 0;
};
struct PrinterConfig {
bool PrintAddress;
bool PrintFunctions;
bool Pretty;
bool Verbose;
int SourceContextLines;
};
using ErrorHandler = function_ref<void(const ErrorInfoBase &, StringRef)>;
class PlainPrinterBase : public DIPrinter {
protected:
raw_ostream &OS;
ErrorHandler ErrHandler;
PrinterConfig Config;
void print(const DILineInfo &Info, bool Inlined);
void printFunctionName(StringRef FunctionName, bool Inlined);
virtual void printSimpleLocation(StringRef Filename,
const DILineInfo &Info) = 0;
void printContext(SourceCode SourceCode);
void printVerbose(StringRef Filename, const DILineInfo &Info);
virtual void printStartAddress(const DILineInfo &Info) {}
virtual void printFooter() {}
private:
void printHeader(uint64_t Address);
public:
PlainPrinterBase(raw_ostream &OS, ErrorHandler EH, PrinterConfig &Config)
: OS(OS), ErrHandler(EH), Config(Config) {}
void print(const Request &Request, const DILineInfo &Info) override;
void print(const Request &Request, const DIInliningInfo &Info) override;
void print(const Request &Request, const DIGlobal &Global) override;
void print(const Request &Request,
const std::vector<DILocal> &Locals) override;
void printInvalidCommand(const Request &Request, StringRef Command) override;
bool printError(const Request &Request,
const ErrorInfoBase &ErrorInfo) override;
void listBegin() override {}
void listEnd() override {}
};
class LLVMPrinter : public PlainPrinterBase {
private:
void printSimpleLocation(StringRef Filename, const DILineInfo &Info) override;
void printStartAddress(const DILineInfo &Info) override;
void printFooter() override;
public:
LLVMPrinter(raw_ostream &OS, ErrorHandler EH, PrinterConfig &Config)
: PlainPrinterBase(OS, EH, Config) {}
};
class GNUPrinter : public PlainPrinterBase {
private:
void printSimpleLocation(StringRef Filename, const DILineInfo &Info) override;
public:
GNUPrinter(raw_ostream &OS, ErrorHandler EH, PrinterConfig &Config)
: PlainPrinterBase(OS, EH, Config) {}
};
class JSONPrinter : public DIPrinter {
private:
raw_ostream &OS;
PrinterConfig Config;
std::unique_ptr<json::Array> ObjectList;
void printJSON(const json::Value &V) {
json::OStream JOS(OS, Config.Pretty ? 2 : 0);
JOS.value(V);
OS << '\n';
}
public:
JSONPrinter(raw_ostream &OS, PrinterConfig &Config)
: OS(OS), Config(Config) {}
void print(const Request &Request, const DILineInfo &Info) override;
void print(const Request &Request, const DIInliningInfo &Info) override;
void print(const Request &Request, const DIGlobal &Global) override;
void print(const Request &Request,
const std::vector<DILocal> &Locals) override;
void printInvalidCommand(const Request &Request, StringRef Command) override;
bool printError(const Request &Request,
const ErrorInfoBase &ErrorInfo) override;
void listBegin() override;
void listEnd() override;
};
} // namespace symbolize
} // namespace llvm
#endif
PK hwFZ��]z;0 ;0 & DebugInfo/LogicalView/Core/LVElement.hnu �[��� //===-- LVElement.h ---------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the LVElement class, which is used to describe a debug
// information element.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVELEMENT_H
#define LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVELEMENT_H
#include "llvm/DebugInfo/LogicalView/Core/LVObject.h"
#include "llvm/Support/Casting.h"
#include <map>
#include <set>
#include <vector>
namespace llvm {
namespace logicalview {
// RTTI Subclasses ID.
enum class LVSubclassID : unsigned char {
LV_ELEMENT,
LV_LINE_FIRST,
LV_LINE,
LV_LINE_DEBUG,
LV_LINE_ASSEMBLER,
LV_LINE_LAST,
lV_SCOPE_FIRST,
LV_SCOPE,
LV_SCOPE_AGGREGATE,
LV_SCOPE_ALIAS,
LV_SCOPE_ARRAY,
LV_SCOPE_COMPILE_UNIT,
LV_SCOPE_ENUMERATION,
LV_SCOPE_FORMAL_PACK,
LV_SCOPE_FUNCTION,
LV_SCOPE_FUNCTION_INLINED,
LV_SCOPE_FUNCTION_TYPE,
LV_SCOPE_NAMESPACE,
LV_SCOPE_ROOT,
LV_SCOPE_TEMPLATE_PACK,
LV_SCOPE_LAST,
LV_SYMBOL_FIRST,
LV_SYMBOL,
LV_SYMBOL_LAST,
LV_TYPE_FIRST,
LV_TYPE,
LV_TYPE_DEFINITION,
LV_TYPE_ENUMERATOR,
LV_TYPE_IMPORT,
LV_TYPE_PARAM,
LV_TYPE_SUBRANGE,
LV_TYPE_LAST
};
enum class LVElementKind { Discarded, Global, Optimized, LastEntry };
using LVElementKindSet = std::set<LVElementKind>;
using LVElementDispatch = std::map<LVElementKind, LVElementGetFunction>;
using LVElementRequest = std::vector<LVElementGetFunction>;
class LVElement : public LVObject {
enum class Property {
IsLine, // A logical line.
IsScope, // A logical scope.
IsSymbol, // A logical symbol.
IsType, // A logical type.
IsEnumClass,
IsExternal,
HasType,
HasAugmentedName,
IsTypedefReduced,
IsArrayResolved,
IsMemberPointerResolved,
IsTemplateResolved,
IsInlined,
IsInlinedAbstract,
InvalidFilename,
HasReference,
HasReferenceAbstract,
HasReferenceExtension,
HasReferenceSpecification,
QualifiedResolved,
IncludeInPrint,
IsStatic,
TransformName,
IsScoped, // CodeView local type.
IsNested, // CodeView nested type.
IsScopedAlready, // CodeView nested type inserted in correct scope.
IsArtificial,
IsReferencedType,
IsSystem,
OffsetFromTypeIndex,
IsAnonymous,
LastEntry
};
// Typed bitvector with properties for this element.
LVProperties<Property> Properties;
static LVElementDispatch Dispatch;
/// RTTI.
const LVSubclassID SubclassID;
// Indexes in the String Pool.
size_t NameIndex = 0;
size_t QualifiedNameIndex = 0;
size_t FilenameIndex = 0;
uint16_t AccessibilityCode : 2; // DW_AT_accessibility.
uint16_t InlineCode : 2; // DW_AT_inline.
uint16_t VirtualityCode : 2; // DW_AT_virtuality.
// The given Specification points to an element that is connected via the
// DW_AT_specification, DW_AT_abstract_origin or DW_AT_extension attribute.
void setFileLine(LVElement *Specification);
// Get the qualified name that include its parents name.
void resolveQualifiedName();
protected:
// Type of this element.
LVElement *ElementType = nullptr;
// Print the FileName Index.
void printFileIndex(raw_ostream &OS, bool Full = true) const override;
public:
LVElement(LVSubclassID ID)
: LVObject(), SubclassID(ID), AccessibilityCode(0), InlineCode(0),
VirtualityCode(0) {}
LVElement(const LVElement &) = delete;
LVElement &operator=(const LVElement &) = delete;
virtual ~LVElement() = default;
LVSubclassID getSubclassID() const { return SubclassID; }
PROPERTY(Property, IsLine);
PROPERTY(Property, IsScope);
PROPERTY(Property, IsSymbol);
PROPERTY(Property, IsType);
PROPERTY(Property, IsEnumClass);
PROPERTY(Property, IsExternal);
PROPERTY(Property, HasType);
PROPERTY(Property, HasAugmentedName);
PROPERTY(Property, IsTypedefReduced);
PROPERTY(Property, IsArrayResolved);
PROPERTY(Property, IsMemberPointerResolved);
PROPERTY(Property, IsTemplateResolved);
PROPERTY(Property, IsInlined);
PROPERTY(Property, IsInlinedAbstract);
PROPERTY(Property, InvalidFilename);
PROPERTY(Property, HasReference);
PROPERTY(Property, HasReferenceAbstract);
PROPERTY(Property, HasReferenceExtension);
PROPERTY(Property, HasReferenceSpecification);
PROPERTY(Property, QualifiedResolved);
PROPERTY(Property, IncludeInPrint);
PROPERTY(Property, IsStatic);
PROPERTY(Property, TransformName);
PROPERTY(Property, IsScoped);
PROPERTY(Property, IsNested);
PROPERTY(Property, IsScopedAlready);
PROPERTY(Property, IsArtificial);
PROPERTY(Property, IsReferencedType);
PROPERTY(Property, IsSystem);
PROPERTY(Property, OffsetFromTypeIndex);
PROPERTY(Property, IsAnonymous);
bool isNamed() const override { return NameIndex != 0; }
bool isTyped() const override { return ElementType != nullptr; }
bool isFiled() const override { return FilenameIndex != 0; }
// The Element class type can point to a Type or Scope.
bool getIsKindType() const { return ElementType && ElementType->getIsType(); }
bool getIsKindScope() const {
return ElementType && ElementType->getIsScope();
}
StringRef getName() const override {
return getStringPool().getString(NameIndex);
}
void setName(StringRef ElementName) override;
// Get pathname associated with the Element.
StringRef getPathname() const {
return getStringPool().getString(getFilenameIndex());
}
// Set filename associated with the Element.
void setFilename(StringRef Filename);
// Set the Element qualified name.
void setQualifiedName(StringRef Name) {
QualifiedNameIndex = getStringPool().getIndex(Name);
}
StringRef getQualifiedName() const {
return getStringPool().getString(QualifiedNameIndex);
}
size_t getNameIndex() const { return NameIndex; }
size_t getQualifiedNameIndex() const { return QualifiedNameIndex; }
void setInnerComponent() { setInnerComponent(getName()); }
void setInnerComponent(StringRef Name);
// Element type name.
StringRef getTypeName() const;
virtual StringRef getProducer() const { return StringRef(); }
virtual void setProducer(StringRef ProducerName) {}
virtual bool isCompileUnit() const { return false; }
virtual bool isRoot() const { return false; }
virtual void setReference(LVElement *Element) {}
virtual void setReference(LVScope *Scope) {}
virtual void setReference(LVSymbol *Symbol) {}
virtual void setReference(LVType *Type) {}
virtual void setLinkageName(StringRef LinkageName) {}
virtual StringRef getLinkageName() const { return StringRef(); }
virtual size_t getLinkageNameIndex() const { return 0; }
virtual uint32_t getCallLineNumber() const { return 0; }
virtual void setCallLineNumber(uint32_t Number) {}
virtual size_t getCallFilenameIndex() const { return 0; }
virtual void setCallFilenameIndex(size_t Index) {}
size_t getFilenameIndex() const { return FilenameIndex; }
void setFilenameIndex(size_t Index) { FilenameIndex = Index; }
// Set the File location for the Element.
void setFile(LVElement *Reference = nullptr);
virtual bool isBase() const { return false; }
virtual bool isTemplateParam() const { return false; }
virtual uint32_t getBitSize() const { return 0; }
virtual void setBitSize(uint32_t Size) {}
virtual int64_t getCount() const { return 0; }
virtual void setCount(int64_t Value) {}
virtual int64_t getLowerBound() const { return 0; }
virtual void setLowerBound(int64_t Value) {}
virtual int64_t getUpperBound() const { return 0; }
virtual void setUpperBound(int64_t Value) {}
virtual std::pair<unsigned, unsigned> getBounds() const { return {}; }
virtual void setBounds(unsigned Lower, unsigned Upper) {}
// Access DW_AT_GNU_discriminator attribute.
virtual uint32_t getDiscriminator() const { return 0; }
virtual void setDiscriminator(uint32_t Value) {}
// Process the values for a DW_TAG_enumerator.
virtual StringRef getValue() const { return {}; }
virtual void setValue(StringRef Value) {}
virtual size_t getValueIndex() const { return 0; }
// DWARF Accessibility Codes.
uint32_t getAccessibilityCode() const { return AccessibilityCode; }
void setAccessibilityCode(uint32_t Access) { AccessibilityCode = Access; }
StringRef
accessibilityString(uint32_t Access = dwarf::DW_ACCESS_private) const;
// CodeView Accessibility Codes.
std::optional<uint32_t> getAccessibilityCode(codeview::MemberAccess Access);
void setAccessibilityCode(codeview::MemberAccess Access) {
if (std::optional<uint32_t> Code = getAccessibilityCode(Access))
AccessibilityCode = Code.value();
}
// DWARF Inline Codes.
uint32_t getInlineCode() const { return InlineCode; }
void setInlineCode(uint32_t Code) { InlineCode = Code; }
StringRef inlineCodeString(uint32_t Code) const;
// DWARF Virtuality Codes.
uint32_t getVirtualityCode() const { return VirtualityCode; }
void setVirtualityCode(uint32_t Virtuality) { VirtualityCode = Virtuality; }
StringRef
virtualityString(uint32_t Virtuality = dwarf::DW_VIRTUALITY_none) const;
// CodeView Virtuality Codes.
std::optional<uint32_t> getVirtualityCode(codeview::MethodKind Virtuality);
void setVirtualityCode(codeview::MethodKind Virtuality) {
if (std::optional<uint32_t> Code = getVirtualityCode(Virtuality))
VirtualityCode = Code.value();
}
// DWARF Extern Codes.
StringRef externalString() const;
LVElement *getType() const { return ElementType; }
LVType *getTypeAsType() const;
LVScope *getTypeAsScope() const;
void setType(LVElement *Element = nullptr) {
ElementType = Element;
if (Element) {
setHasType();
Element->setIsReferencedType();
}
}
// Set the type for the element, handling template parameters.
void setGenericType(LVElement *Element);
StringRef getTypeQualifiedName() const {
return ElementType ? ElementType->getQualifiedName() : "";
}
StringRef typeAsString() const;
std::string typeOffsetAsString() const;
std::string discriminatorAsString() const;
LVScope *traverseParents(LVScopeGetFunction GetFunction) const;
LVScope *getFunctionParent() const;
virtual LVScope *getCompileUnitParent() const;
// Print any referenced element.
void printReference(raw_ostream &OS, bool Full, LVElement *Parent) const;
// Print the linkage name (Symbols and functions).
void printLinkageName(raw_ostream &OS, bool Full, LVElement *Parent,
LVScope *Scope) const;
void printLinkageName(raw_ostream &OS, bool Full, LVElement *Parent) const;
// Generate the full name for the Element.
void resolveFullname(LVElement *BaseType, StringRef Name = emptyString());
// Generate a name for unnamed elements.
void generateName(std::string &Prefix) const;
void generateName();
virtual bool removeElement(LVElement *Element) { return false; }
virtual void updateLevel(LVScope *Parent, bool Moved = false);
// During the parsing of the debug information, the logical elements are
// created with information extracted from its description entries (DIE).
// But they are not complete for the logical view concept. A second pass
// is executed in order to collect their additional information.
// The following functions 'resolve' some of their properties, such as
// name, references, parents, extra information based on the element kind.
virtual void resolve();
virtual void resolveExtra() {}
virtual void resolveName();
virtual void resolveReferences() {}
void resolveParents();
bool referenceMatch(const LVElement *Element) const;
// Returns true if current element is logically equal to the given 'Element'.
bool equals(const LVElement *Element) const;
// Report the current element as missing or added during comparison.
virtual void report(LVComparePass Pass) {}
static LVElementDispatch &getDispatch() { return Dispatch; }
};
} // end namespace logicalview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVELEMENT_H
PK hwFZ�p��w �w $ DebugInfo/LogicalView/Core/LVScope.hnu �[��� //===-- LVScope.h -----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the LVScope class, which is used to describe a debug
// information scope.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVSCOPE_H
#define LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVSCOPE_H
#include "llvm/DebugInfo/LogicalView/Core/LVElement.h"
#include "llvm/DebugInfo/LogicalView/Core/LVLocation.h"
#include "llvm/DebugInfo/LogicalView/Core/LVSort.h"
#include "llvm/Object/ObjectFile.h"
#include <list>
#include <map>
#include <set>
namespace llvm {
namespace logicalview {
// Name address, Code size.
using LVNameInfo = std::pair<LVAddress, uint64_t>;
using LVPublicNames = std::map<LVScope *, LVNameInfo>;
using LVPublicAddresses = std::map<LVAddress, LVNameInfo>;
class LVRange;
enum class LVScopeKind {
IsAggregate,
IsArray,
IsBlock,
IsCallSite,
IsCatchBlock,
IsClass,
IsCompileUnit,
IsEntryPoint,
IsEnumeration,
IsFunction,
IsFunctionType,
IsInlinedFunction,
IsLabel,
IsLexicalBlock,
IsMember,
IsNamespace,
IsRoot,
IsStructure,
IsSubprogram,
IsTemplate,
IsTemplateAlias,
IsTemplatePack,
IsTryBlock,
IsUnion,
LastEntry
};
using LVScopeKindSet = std::set<LVScopeKind>;
using LVScopeDispatch = std::map<LVScopeKind, LVScopeGetFunction>;
using LVScopeRequest = std::vector<LVScopeGetFunction>;
using LVOffsetElementMap = std::map<LVOffset, LVElement *>;
using LVOffsetLinesMap = std::map<LVOffset, LVLines>;
using LVOffsetLocationsMap = std::map<LVOffset, LVLocations>;
using LVOffsetSymbolMap = std::map<LVOffset, LVSymbol *>;
using LVTagOffsetsMap = std::map<dwarf::Tag, LVOffsets>;
// Class to represent a DWARF Scope.
class LVScope : public LVElement {
enum class Property {
HasDiscriminator,
CanHaveRanges,
CanHaveLines,
HasGlobals,
HasLocals,
HasLines,
HasScopes,
HasSymbols,
HasTypes,
IsComdat,
HasComdatScopes, // Compile Unit has comdat functions.
HasRanges,
AddedMissing, // Added missing referenced symbols.
LastEntry
};
// Typed bitvector with kinds and properties for this scope.
LVProperties<LVScopeKind> Kinds;
LVProperties<Property> Properties;
static LVScopeDispatch Dispatch;
// Coverage factor in units (bytes).
unsigned CoverageFactor = 0;
// Calculate coverage factor.
void calculateCoverage() {
float CoveragePercentage = 0;
LVLocation::calculateCoverage(Ranges.get(), CoverageFactor,
CoveragePercentage);
}
// Decide if the scope will be printed, using some conditions given by:
// only-globals, only-locals, a-pattern.
bool resolvePrinting() const;
// Find the current scope in the given 'Targets'.
LVScope *findIn(const LVScopes *Targets) const;
// Traverse the scope parent tree, executing the given callback function
// on each scope.
void traverseParents(LVScopeGetFunction GetFunction,
LVScopeSetFunction SetFunction);
protected:
// Types, Symbols, Scopes, Lines, Locations in this scope.
std::unique_ptr<LVTypes> Types;
std::unique_ptr<LVSymbols> Symbols;
std::unique_ptr<LVScopes> Scopes;
std::unique_ptr<LVLines> Lines;
std::unique_ptr<LVLocations> Ranges;
// Vector of elements (types, scopes and symbols).
// It is the union of (*Types, *Symbols and *Scopes) to be used for
// the following reasons:
// - Preserve the order the logical elements are read in.
// - To have a single container with all the logical elements, when
// the traversal does not require any specific element kind.
std::unique_ptr<LVElements> Children;
// Resolve the template parameters/arguments relationship.
void resolveTemplate();
void printEncodedArgs(raw_ostream &OS, bool Full) const;
void printActiveRanges(raw_ostream &OS, bool Full = true) const;
virtual void printSizes(raw_ostream &OS) const {}
virtual void printSummary(raw_ostream &OS) const {}
// Encoded template arguments.
virtual StringRef getEncodedArgs() const { return StringRef(); }
virtual void setEncodedArgs(StringRef EncodedArgs) {}
public:
LVScope() : LVElement(LVSubclassID::LV_SCOPE) {
setIsScope();
setIncludeInPrint();
}
LVScope(const LVScope &) = delete;
LVScope &operator=(const LVScope &) = delete;
virtual ~LVScope() = default;
static bool classof(const LVElement *Element) {
return Element->getSubclassID() == LVSubclassID::LV_SCOPE;
}
KIND(LVScopeKind, IsAggregate);
KIND(LVScopeKind, IsArray);
KIND_2(LVScopeKind, IsBlock, CanHaveRanges, CanHaveLines);
KIND_1(LVScopeKind, IsCallSite, IsFunction);
KIND_1(LVScopeKind, IsCatchBlock, IsBlock);
KIND_1(LVScopeKind, IsClass, IsAggregate);
KIND_3(LVScopeKind, IsCompileUnit, CanHaveRanges, CanHaveLines,
TransformName);
KIND_1(LVScopeKind, IsEntryPoint, IsFunction);
KIND(LVScopeKind, IsEnumeration);
KIND_2(LVScopeKind, IsFunction, CanHaveRanges, CanHaveLines);
KIND_1(LVScopeKind, IsFunctionType, IsFunction);
KIND_2(LVScopeKind, IsInlinedFunction, IsFunction, IsInlined);
KIND_1(LVScopeKind, IsLabel, IsFunction);
KIND_1(LVScopeKind, IsLexicalBlock, IsBlock);
KIND(LVScopeKind, IsMember);
KIND(LVScopeKind, IsNamespace);
KIND_1(LVScopeKind, IsRoot, TransformName);
KIND_1(LVScopeKind, IsStructure, IsAggregate);
KIND_1(LVScopeKind, IsSubprogram, IsFunction);
KIND(LVScopeKind, IsTemplate);
KIND(LVScopeKind, IsTemplateAlias);
KIND(LVScopeKind, IsTemplatePack);
KIND_1(LVScopeKind, IsTryBlock, IsBlock);
KIND_1(LVScopeKind, IsUnion, IsAggregate);
PROPERTY(Property, HasDiscriminator);
PROPERTY(Property, CanHaveRanges);
PROPERTY(Property, CanHaveLines);
PROPERTY(Property, HasGlobals);
PROPERTY(Property, HasLocals);
PROPERTY(Property, HasLines);
PROPERTY(Property, HasScopes);
PROPERTY(Property, HasSymbols);
PROPERTY(Property, HasTypes);
PROPERTY(Property, IsComdat);
PROPERTY(Property, HasComdatScopes);
PROPERTY(Property, HasRanges);
PROPERTY(Property, AddedMissing);
bool isCompileUnit() const override { return getIsCompileUnit(); }
bool isRoot() const override { return getIsRoot(); }
const char *kind() const override;
// Get the specific children.
const LVLines *getLines() const { return Lines.get(); }
const LVLocations *getRanges() const { return Ranges.get(); }
const LVScopes *getScopes() const { return Scopes.get(); }
const LVSymbols *getSymbols() const { return Symbols.get(); }
const LVTypes *getTypes() const { return Types.get(); }
const LVElements *getChildren() const { return Children.get(); }
void addElement(LVElement *Element);
void addElement(LVLine *Line);
void addElement(LVScope *Scope);
void addElement(LVSymbol *Symbol);
void addElement(LVType *Type);
void addObject(LVLocation *Location);
void addObject(LVAddress LowerAddress, LVAddress UpperAddress);
void addToChildren(LVElement *Element);
// Add the missing elements from the given 'Reference', which is the
// scope associated with any DW_AT_specification, DW_AT_abstract_origin.
void addMissingElements(LVScope *Reference);
// Traverse the scope parent tree and the children, executing the given
// callback function on each element.
void traverseParentsAndChildren(LVObjectGetFunction GetFunction,
LVObjectSetFunction SetFunction);
// Get the size of specific children.
size_t lineCount() const { return Lines ? Lines->size() : 0; }
size_t rangeCount() const { return Ranges ? Ranges->size() : 0; }
size_t scopeCount() const { return Scopes ? Scopes->size() : 0; }
size_t symbolCount() const { return Symbols ? Symbols->size() : 0; }
size_t typeCount() const { return Types ? Types->size() : 0; }
// Find containing parent for the given address.
LVScope *outermostParent(LVAddress Address);
// Get all the locations associated with symbols.
void getLocations(LVLocations &LocationList, LVValidLocation ValidLocation,
bool RecordInvalid = false);
void getRanges(LVLocations &LocationList, LVValidLocation ValidLocation,
bool RecordInvalid = false);
void getRanges(LVRange &RangeList);
unsigned getCoverageFactor() const { return CoverageFactor; }
Error doPrint(bool Split, bool Match, bool Print, raw_ostream &OS,
bool Full = true) const override;
// Sort the logical elements using the criteria specified by the
// command line option '--output-sort'.
void sort();
// Get template parameter types.
bool getTemplateParameterTypes(LVTypes &Params);
// DW_AT_specification, DW_AT_abstract_origin, DW_AT_extension.
virtual LVScope *getReference() const { return nullptr; }
LVScope *getCompileUnitParent() const override {
return LVElement::getCompileUnitParent();
}
// Follow a chain of references given by DW_AT_abstract_origin and/or
// DW_AT_specification and update the scope name.
StringRef resolveReferencesChain();
bool removeElement(LVElement *Element) override;
void updateLevel(LVScope *Parent, bool Moved) override;
void resolve() override;
void resolveName() override;
void resolveReferences() override;
// Return the chain of parents as a string.
void getQualifiedName(std::string &QualifiedName) const;
// Encode the template arguments.
void encodeTemplateArguments(std::string &Name) const;
void encodeTemplateArguments(std::string &Name, const LVTypes *Types) const;
void resolveElements();
// Iterate through the 'References' set and check that all its elements
// are present in the 'Targets' set. For a missing element, mark its
// parents as missing.
static void markMissingParents(const LVScopes *References,
const LVScopes *Targets,
bool TraverseChildren);
// Checks if the current scope is contained within the target scope.
// Depending on the result, the callback may be performed.
virtual void markMissingParents(const LVScope *Target, bool TraverseChildren);
// Returns true if the current scope and the given 'Scope' have the
// same number of children.
virtual bool equalNumberOfChildren(const LVScope *Scope) const;
// Returns true if current scope is logically equal to the given 'Scope'.
virtual bool equals(const LVScope *Scope) const;
// Returns true if the given 'References' are logically equal to the
// given 'Targets'.
static bool equals(const LVScopes *References, const LVScopes *Targets);
// For the given 'Scopes' returns a scope that is logically equal
// to the current scope; otherwise 'nullptr'.
virtual LVScope *findEqualScope(const LVScopes *Scopes) const;
// Report the current scope as missing or added during comparison.
void report(LVComparePass Pass) override;
static LVScopeDispatch &getDispatch() { return Dispatch; }
void print(raw_ostream &OS, bool Full = true) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
virtual void printWarnings(raw_ostream &OS, bool Full = true) const {}
virtual void printMatchedElements(raw_ostream &OS, bool UseMatchedElements) {}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump() const override { print(dbgs()); }
#endif
};
// Class to represent a DWARF Union/Structure/Class.
class LVScopeAggregate final : public LVScope {
LVScope *Reference = nullptr; // DW_AT_specification, DW_AT_abstract_origin.
size_t EncodedArgsIndex = 0; // Template encoded arguments.
public:
LVScopeAggregate() : LVScope() {}
LVScopeAggregate(const LVScopeAggregate &) = delete;
LVScopeAggregate &operator=(const LVScopeAggregate &) = delete;
~LVScopeAggregate() = default;
// DW_AT_specification, DW_AT_abstract_origin.
LVScope *getReference() const override { return Reference; }
void setReference(LVScope *Scope) override {
Reference = Scope;
setHasReference();
}
void setReference(LVElement *Element) override {
setReference(static_cast<LVScope *>(Element));
}
StringRef getEncodedArgs() const override {
return getStringPool().getString(EncodedArgsIndex);
}
void setEncodedArgs(StringRef EncodedArgs) override {
EncodedArgsIndex = getStringPool().getIndex(EncodedArgs);
}
// Returns true if current scope is logically equal to the given 'Scope'.
bool equals(const LVScope *Scope) const override;
// For the given 'Scopes' returns a scope that is logically equal
// to the current scope; otherwise 'nullptr'.
LVScope *findEqualScope(const LVScopes *Scopes) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
};
// Class to represent a DWARF Template alias.
class LVScopeAlias final : public LVScope {
public:
LVScopeAlias() : LVScope() {
setIsTemplateAlias();
setIsTemplate();
}
LVScopeAlias(const LVScopeAlias &) = delete;
LVScopeAlias &operator=(const LVScopeAlias &) = delete;
~LVScopeAlias() = default;
// Returns true if current scope is logically equal to the given 'Scope'.
bool equals(const LVScope *Scope) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
};
// Class to represent a DWARF array (DW_TAG_array_type).
class LVScopeArray final : public LVScope {
public:
LVScopeArray() : LVScope() { setIsArray(); }
LVScopeArray(const LVScopeArray &) = delete;
LVScopeArray &operator=(const LVScopeArray &) = delete;
~LVScopeArray() = default;
void resolveExtra() override;
// Returns true if current scope is logically equal to the given 'Scope'.
bool equals(const LVScope *Scope) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
};
// Class to represent a DWARF Compilation Unit (CU).
class LVScopeCompileUnit final : public LVScope {
// Names (files and directories) used by the Compile Unit.
std::vector<size_t> Filenames;
// As the .debug_pubnames section has been removed in DWARF5, we have a
// similar functionality, which is used by the decoded functions. We use
// the low-pc and high-pc for those scopes that are marked as public, in
// order to support DWARF and CodeView.
LVPublicNames PublicNames;
// Toolchain producer.
size_t ProducerIndex = 0;
// Compilation directory name.
size_t CompilationDirectoryIndex = 0;
// Used by the CodeView Reader.
codeview::CPUType CompilationCPUType = codeview::CPUType::X64;
// Keep record of elements. They are needed at the compilation unit level
// to print the summary at the end of the printing.
LVCounter Allocated;
LVCounter Found;
LVCounter Printed;
// Elements that match a given command line pattern.
LVElements MatchedElements;
LVScopes MatchedScopes;
// It records the mapping between logical lines representing a debug line
// entry and its address in the text section. It is used to find a line
// giving its exact or closest address. To support comdat functions, all
// addresses for the same section are recorded in the same map.
using LVAddressToLine = std::map<LVAddress, LVLine *>;
LVDoubleMap<LVSectionIndex, LVAddress, LVLine *> SectionMappings;
// DWARF Tags (Tag, Element list).
LVTagOffsetsMap DebugTags;
// Offsets associated with objects being flagged as having invalid data
// (ranges, locations, lines zero or coverages).
LVOffsetElementMap WarningOffsets;
// Symbols with invalid locations. (Symbol, Location List).
LVOffsetLocationsMap InvalidLocations;
// Symbols with invalid coverage values.
LVOffsetSymbolMap InvalidCoverages;
// Scopes with invalid ranges (Scope, Range list).
LVOffsetLocationsMap InvalidRanges;
// Scopes with lines zero (Scope, Line list).
LVOffsetLinesMap LinesZero;
// Record scopes contribution in bytes to the debug information.
using LVSizesMap = std::map<const LVScope *, LVOffset>;
LVSizesMap Sizes;
LVOffset CUContributionSize = 0;
// Helper function to add an invalid location/range.
void addInvalidLocationOrRange(LVLocation *Location, LVElement *Element,
LVOffsetLocationsMap *Map) {
LVOffset Offset = Element->getOffset();
addInvalidOffset(Offset, Element);
addItem<LVOffsetLocationsMap, LVOffset, LVLocation *>(Map, Offset,
Location);
}
// Record scope sizes indexed by lexical level.
// Setting an initial size that will cover a very deep nested scopes.
const size_t TotalInitialSize = 8;
using LVTotalsEntry = std::pair<unsigned, float>;
SmallVector<LVTotalsEntry> Totals;
// Maximum seen lexical level. It is used to control how many entries
// in the 'Totals' vector are valid values.
LVLevel MaxSeenLevel = 0;
// Get the line located at the given address.
LVLine *lineLowerBound(LVAddress Address, LVScope *Scope) const;
LVLine *lineUpperBound(LVAddress Address, LVScope *Scope) const;
void printScopeSize(const LVScope *Scope, raw_ostream &OS);
void printScopeSize(const LVScope *Scope, raw_ostream &OS) const {
(const_cast<LVScopeCompileUnit *>(this))->printScopeSize(Scope, OS);
}
void printTotals(raw_ostream &OS) const;
protected:
void printSizes(raw_ostream &OS) const override;
void printSummary(raw_ostream &OS) const override;
public:
LVScopeCompileUnit() : LVScope(), Totals(TotalInitialSize, {0, 0.0}) {
setIsCompileUnit();
}
LVScopeCompileUnit(const LVScopeCompileUnit &) = delete;
LVScopeCompileUnit &operator=(const LVScopeCompileUnit &) = delete;
~LVScopeCompileUnit() = default;
LVScope *getCompileUnitParent() const override {
return static_cast<LVScope *>(const_cast<LVScopeCompileUnit *>(this));
}
// Add line to address mapping.
void addMapping(LVLine *Line, LVSectionIndex SectionIndex);
LVLineRange lineRange(LVLocation *Location) const;
LVNameInfo NameNone = {UINT64_MAX, 0};
void addPublicName(LVScope *Scope, LVAddress LowPC, LVAddress HighPC) {
PublicNames.emplace(std::piecewise_construct, std::forward_as_tuple(Scope),
std::forward_as_tuple(LowPC, HighPC - LowPC));
}
const LVNameInfo &findPublicName(LVScope *Scope) {
LVPublicNames::iterator Iter = PublicNames.find(Scope);
return (Iter != PublicNames.end()) ? Iter->second : NameNone;
}
const LVPublicNames &getPublicNames() const { return PublicNames; }
// The base address of the scope for any of the debugging information
// entries listed, is given by either the DW_AT_low_pc attribute or the
// first address in the first range entry in the list of ranges given by
// the DW_AT_ranges attribute.
LVAddress getBaseAddress() const {
return Ranges ? Ranges->front()->getLowerAddress() : 0;
}
StringRef getCompilationDirectory() const {
return getStringPool().getString(CompilationDirectoryIndex);
}
void setCompilationDirectory(StringRef CompilationDirectory) {
CompilationDirectoryIndex = getStringPool().getIndex(CompilationDirectory);
}
StringRef getFilename(size_t Index) const;
void addFilename(StringRef Name) {
Filenames.push_back(getStringPool().getIndex(Name));
}
StringRef getProducer() const override {
return getStringPool().getString(ProducerIndex);
}
void setProducer(StringRef ProducerName) override {
ProducerIndex = getStringPool().getIndex(ProducerName);
}
void setCPUType(codeview::CPUType Type) { CompilationCPUType = Type; }
codeview::CPUType getCPUType() { return CompilationCPUType; }
// Record DWARF tags.
void addDebugTag(dwarf::Tag Target, LVOffset Offset);
// Record elements with invalid offsets.
void addInvalidOffset(LVOffset Offset, LVElement *Element);
// Record symbols with invalid coverage values.
void addInvalidCoverage(LVSymbol *Symbol);
// Record symbols with invalid locations.
void addInvalidLocation(LVLocation *Location);
// Record scopes with invalid ranges.
void addInvalidRange(LVLocation *Location);
// Record line zero.
void addLineZero(LVLine *Line);
const LVTagOffsetsMap &getDebugTags() const { return DebugTags; }
const LVOffsetElementMap &getWarningOffsets() const { return WarningOffsets; }
const LVOffsetLocationsMap &getInvalidLocations() const {
return InvalidLocations;
}
const LVOffsetSymbolMap &getInvalidCoverages() const {
return InvalidCoverages;
}
const LVOffsetLocationsMap &getInvalidRanges() const { return InvalidRanges; }
const LVOffsetLinesMap &getLinesZero() const { return LinesZero; }
// Process ranges, locations and calculate coverage.
void processRangeLocationCoverage(
LVValidLocation ValidLocation = &LVLocation::validateRanges);
// Add matched element.
void addMatched(LVElement *Element) { MatchedElements.push_back(Element); }
void addMatched(LVScope *Scope) { MatchedScopes.push_back(Scope); }
void propagatePatternMatch();
const LVElements &getMatchedElements() const { return MatchedElements; }
const LVScopes &getMatchedScopes() const { return MatchedScopes; }
void printLocalNames(raw_ostream &OS, bool Full = true) const;
void printSummary(raw_ostream &OS, const LVCounter &Counter,
const char *Header) const;
void incrementPrintedLines();
void incrementPrintedScopes();
void incrementPrintedSymbols();
void incrementPrintedTypes();
// Values are used by '--summary' option (allocated).
void increment(LVLine *Line);
void increment(LVScope *Scope);
void increment(LVSymbol *Symbol);
void increment(LVType *Type);
// A new element has been added to the scopes tree. Take the following steps:
// Increase the added element counters, for printing summary.
// During comparison notify the Reader of the new element.
void addedElement(LVLine *Line);
void addedElement(LVScope *Scope);
void addedElement(LVSymbol *Symbol);
void addedElement(LVType *Type);
void addSize(LVScope *Scope, LVOffset Lower, LVOffset Upper);
// Returns true if current scope is logically equal to the given 'Scope'.
bool equals(const LVScope *Scope) const override;
void print(raw_ostream &OS, bool Full = true) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
void printWarnings(raw_ostream &OS, bool Full = true) const override;
void printMatchedElements(raw_ostream &OS, bool UseMatchedElements) override;
};
// Class to represent a DWARF enumerator (DW_TAG_enumeration_type).
class LVScopeEnumeration final : public LVScope {
public:
LVScopeEnumeration() : LVScope() { setIsEnumeration(); }
LVScopeEnumeration(const LVScopeEnumeration &) = delete;
LVScopeEnumeration &operator=(const LVScopeEnumeration &) = delete;
~LVScopeEnumeration() = default;
// Returns true if current scope is logically equal to the given 'Scope'.
bool equals(const LVScope *Scope) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
};
// Class to represent a DWARF formal parameter pack
// (DW_TAG_GNU_formal_parameter_pack).
class LVScopeFormalPack final : public LVScope {
public:
LVScopeFormalPack() : LVScope() { setIsTemplatePack(); }
LVScopeFormalPack(const LVScopeFormalPack &) = delete;
LVScopeFormalPack &operator=(const LVScopeFormalPack &) = delete;
~LVScopeFormalPack() = default;
// Returns true if current scope is logically equal to the given 'Scope'.
bool equals(const LVScope *Scope) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
};
// Class to represent a DWARF Function.
class LVScopeFunction : public LVScope {
LVScope *Reference = nullptr; // DW_AT_specification, DW_AT_abstract_origin.
size_t LinkageNameIndex = 0; // Function DW_AT_linkage_name attribute.
size_t EncodedArgsIndex = 0; // Template encoded arguments.
public:
LVScopeFunction() : LVScope() {}
LVScopeFunction(const LVScopeFunction &) = delete;
LVScopeFunction &operator=(const LVScopeFunction &) = delete;
virtual ~LVScopeFunction() = default;
// DW_AT_specification, DW_AT_abstract_origin.
LVScope *getReference() const override { return Reference; }
void setReference(LVScope *Scope) override {
Reference = Scope;
setHasReference();
}
void setReference(LVElement *Element) override {
setReference(static_cast<LVScope *>(Element));
}
StringRef getEncodedArgs() const override {
return getStringPool().getString(EncodedArgsIndex);
}
void setEncodedArgs(StringRef EncodedArgs) override {
EncodedArgsIndex = getStringPool().getIndex(EncodedArgs);
}
void setLinkageName(StringRef LinkageName) override {
LinkageNameIndex = getStringPool().getIndex(LinkageName);
}
StringRef getLinkageName() const override {
return getStringPool().getString(LinkageNameIndex);
}
size_t getLinkageNameIndex() const override { return LinkageNameIndex; }
void setName(StringRef ObjectName) override;
void resolveExtra() override;
void resolveReferences() override;
// Returns true if current scope is logically equal to the given 'Scope'.
bool equals(const LVScope *Scope) const override;
// For the given 'Scopes' returns a scope that is logically equal
// to the current scope; otherwise 'nullptr'.
LVScope *findEqualScope(const LVScopes *Scopes) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
};
// Class to represent a DWARF inlined function.
class LVScopeFunctionInlined final : public LVScopeFunction {
size_t CallFilenameIndex = 0;
uint32_t CallLineNumber = 0;
uint32_t Discriminator = 0;
public:
LVScopeFunctionInlined() : LVScopeFunction() { setIsInlinedFunction(); }
LVScopeFunctionInlined(const LVScopeFunctionInlined &) = delete;
LVScopeFunctionInlined &operator=(const LVScopeFunctionInlined &) = delete;
~LVScopeFunctionInlined() = default;
uint32_t getDiscriminator() const override { return Discriminator; }
void setDiscriminator(uint32_t Value) override {
Discriminator = Value;
setHasDiscriminator();
}
uint32_t getCallLineNumber() const override { return CallLineNumber; }
void setCallLineNumber(uint32_t Number) override { CallLineNumber = Number; }
size_t getCallFilenameIndex() const override { return CallFilenameIndex; }
void setCallFilenameIndex(size_t Index) override {
CallFilenameIndex = Index;
}
// Line number for display; in the case of Inlined Functions, we use the
// DW_AT_call_line attribute; otherwise use DW_AT_decl_line attribute.
std::string lineNumberAsString(bool ShowZero = false) const override {
return lineAsString(getCallLineNumber(), getDiscriminator(), ShowZero);
}
void resolveExtra() override;
// Returns true if current scope is logically equal to the given 'Scope'.
bool equals(const LVScope *Scope) const override;
// For the given 'Scopes' returns a scope that is logically equal
// to the current scope; otherwise 'nullptr'.
LVScope *findEqualScope(const LVScopes *Scopes) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
};
// Class to represent a DWARF subroutine type.
class LVScopeFunctionType final : public LVScopeFunction {
public:
LVScopeFunctionType() : LVScopeFunction() { setIsFunctionType(); }
LVScopeFunctionType(const LVScopeFunctionType &) = delete;
LVScopeFunctionType &operator=(const LVScopeFunctionType &) = delete;
~LVScopeFunctionType() = default;
void resolveExtra() override;
};
// Class to represent a DWARF Namespace.
class LVScopeNamespace final : public LVScope {
LVScope *Reference = nullptr; // Reference to DW_AT_extension attribute.
public:
LVScopeNamespace() : LVScope() { setIsNamespace(); }
LVScopeNamespace(const LVScopeNamespace &) = delete;
LVScopeNamespace &operator=(const LVScopeNamespace &) = delete;
~LVScopeNamespace() = default;
// Access DW_AT_extension reference.
LVScope *getReference() const override { return Reference; }
void setReference(LVScope *Scope) override {
Reference = Scope;
setHasReference();
}
void setReference(LVElement *Element) override {
setReference(static_cast<LVScope *>(Element));
}
// Returns true if current scope is logically equal to the given 'Scope'.
bool equals(const LVScope *Scope) const override;
// For the given 'Scopes' returns a scope that is logically equal
// to the current scope; otherwise 'nullptr'.
LVScope *findEqualScope(const LVScopes *Scopes) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
};
// Class to represent the binary file being analyzed.
class LVScopeRoot final : public LVScope {
size_t FileFormatNameIndex = 0;
public:
LVScopeRoot() : LVScope() { setIsRoot(); }
LVScopeRoot(const LVScopeRoot &) = delete;
LVScopeRoot &operator=(const LVScopeRoot &) = delete;
~LVScopeRoot() = default;
StringRef getFileFormatName() const {
return getStringPool().getString(FileFormatNameIndex);
}
void setFileFormatName(StringRef FileFormatName) {
FileFormatNameIndex = getStringPool().getIndex(FileFormatName);
}
// The CodeView Reader uses scoped names. Recursively transform the
// element name to use just the most inner component.
void transformScopedName();
// Process the collected location, ranges and calculate coverage.
void processRangeInformation();
// Returns true if current scope is logically equal to the given 'Scope'.
bool equals(const LVScope *Scope) const override;
void print(raw_ostream &OS, bool Full = true) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
Error doPrintMatches(bool Split, raw_ostream &OS,
bool UseMatchedElements) const;
};
// Class to represent a DWARF template parameter pack
// (DW_TAG_GNU_template_parameter_pack).
class LVScopeTemplatePack final : public LVScope {
public:
LVScopeTemplatePack() : LVScope() { setIsTemplatePack(); }
LVScopeTemplatePack(const LVScopeTemplatePack &) = delete;
LVScopeTemplatePack &operator=(const LVScopeTemplatePack &) = delete;
~LVScopeTemplatePack() = default;
// Returns true if current scope is logically equal to the given 'Scope'.
bool equals(const LVScope *Scope) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
};
} // end namespace logicalview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVSCOPE_H
PK hwFZ�q�55) 5) & DebugInfo/LogicalView/Core/LVSupport.hnu �[��� //===-- LVSupport.h ---------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines support functions.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVSUPPORT_H
#define LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVSUPPORT_H
#include "llvm/ADT/SmallBitVector.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/Twine.h"
#include "llvm/DebugInfo/LogicalView/Core/LVStringPool.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/Path.h"
#include "llvm/Support/raw_ostream.h"
#include <cctype>
#include <map>
#include <sstream>
namespace llvm {
namespace logicalview {
// Returns the unique string pool instance.
LVStringPool &getStringPool();
using LVStringRefs = std::vector<StringRef>;
using LVLexicalComponent = std::tuple<StringRef, StringRef>;
using LVLexicalIndex =
std::tuple<LVStringRefs::size_type, LVStringRefs::size_type>;
// Used to record specific characteristics about the objects.
template <typename T> class LVProperties {
SmallBitVector Bits = SmallBitVector(static_cast<unsigned>(T::LastEntry) + 1);
public:
LVProperties() = default;
void set(T Idx) { Bits[static_cast<unsigned>(Idx)] = 1; }
void reset(T Idx) { Bits[static_cast<unsigned>(Idx)] = 0; }
bool get(T Idx) const { return Bits[static_cast<unsigned>(Idx)]; }
};
// Generate get, set and reset 'bool' functions for LVProperties instances.
// FAMILY: instance name.
// ENUM: enumeration instance.
// FIELD: enumerator instance.
// F1, F2, F3: optional 'set' functions to be called.
#define BOOL_BIT(FAMILY, ENUM, FIELD) \
bool get##FIELD() const { return FAMILY.get(ENUM::FIELD); } \
void set##FIELD() { FAMILY.set(ENUM::FIELD); } \
void reset##FIELD() { FAMILY.reset(ENUM::FIELD); }
#define BOOL_BIT_1(FAMILY, ENUM, FIELD, F1) \
bool get##FIELD() const { return FAMILY.get(ENUM::FIELD); } \
void set##FIELD() { \
FAMILY.set(ENUM::FIELD); \
set##F1(); \
} \
void reset##FIELD() { FAMILY.reset(ENUM::FIELD); }
#define BOOL_BIT_2(FAMILY, ENUM, FIELD, F1, F2) \
bool get##FIELD() const { return FAMILY.get(ENUM::FIELD); } \
void set##FIELD() { \
FAMILY.set(ENUM::FIELD); \
set##F1(); \
set##F2(); \
} \
void reset##FIELD() { FAMILY.reset(ENUM::FIELD); }
#define BOOL_BIT_3(FAMILY, ENUM, FIELD, F1, F2, F3) \
bool get##FIELD() const { return FAMILY.get(ENUM::FIELD); } \
void set##FIELD() { \
FAMILY.set(ENUM::FIELD); \
set##F1(); \
set##F2(); \
set##F3(); \
} \
void reset##FIELD() { FAMILY.reset(ENUM::FIELD); }
// Generate get, set and reset functions for 'properties'.
#define PROPERTY(ENUM, FIELD) BOOL_BIT(Properties, ENUM, FIELD)
#define PROPERTY_1(ENUM, FIELD, F1) BOOL_BIT_1(Properties, ENUM, FIELD, F1)
#define PROPERTY_2(ENUM, FIELD, F1, F2) \
BOOL_BIT_2(Properties, ENUM, FIELD, F1, F2)
#define PROPERTY_3(ENUM, FIELD, F1, F2, F3) \
BOOL_BIT_3(Properties, ENUM, FIELD, F1, F2, F3)
// Generate get, set and reset functions for 'kinds'.
#define KIND(ENUM, FIELD) BOOL_BIT(Kinds, ENUM, FIELD)
#define KIND_1(ENUM, FIELD, F1) BOOL_BIT_1(Kinds, ENUM, FIELD, F1)
#define KIND_2(ENUM, FIELD, F1, F2) BOOL_BIT_2(Kinds, ENUM, FIELD, F1, F2)
#define KIND_3(ENUM, FIELD, F1, F2, F3) \
BOOL_BIT_3(Kinds, ENUM, FIELD, F1, F2, F3)
const int HEX_WIDTH = 12;
inline FormattedNumber hexValue(uint64_t N, unsigned Width = HEX_WIDTH,
bool Upper = false) {
return format_hex(N, Width, Upper);
}
// Output the hexadecimal representation of 'Value' using '[0x%08x]' format.
inline std::string hexString(uint64_t Value, size_t Width = HEX_WIDTH) {
std::string String;
raw_string_ostream Stream(String);
Stream << hexValue(Value, Width, false);
return Stream.str();
}
// Get a hexadecimal string representation for the given value.
inline std::string hexSquareString(uint64_t Value) {
return (Twine("[") + Twine(hexString(Value)) + Twine("]")).str();
}
// Return a string with the First and Others separated by spaces.
template <typename... Args>
std::string formatAttributes(const StringRef First, Args... Others) {
const auto List = {First, Others...};
std::stringstream Stream;
size_t Size = 0;
for (const StringRef &Item : List) {
Stream << (Size ? " " : "") << Item.str();
Size = Item.size();
}
Stream << (Size ? " " : "");
return Stream.str();
}
// Add an item to a map with second being a small vector.
template <typename MapType, typename KeyType, typename ValueType>
void addItem(MapType *Map, KeyType Key, ValueType Value) {
(*Map)[Key].push_back(Value);
}
// Double map data structure.
template <typename FirstKeyType, typename SecondKeyType, typename ValueType>
class LVDoubleMap {
static_assert(std::is_pointer<ValueType>::value,
"ValueType must be a pointer.");
using LVSecondMapType = std::map<SecondKeyType, ValueType>;
using LVFirstMapType =
std::map<FirstKeyType, std::unique_ptr<LVSecondMapType>>;
using LVAuxMapType = std::map<SecondKeyType, FirstKeyType>;
using LVValueTypes = std::vector<ValueType>;
LVFirstMapType FirstMap;
LVAuxMapType AuxMap;
public:
void add(FirstKeyType FirstKey, SecondKeyType SecondKey, ValueType Value) {
typename LVFirstMapType::iterator FirstIter = FirstMap.find(FirstKey);
if (FirstIter == FirstMap.end()) {
auto SecondMapSP = std::make_unique<LVSecondMapType>();
SecondMapSP->emplace(SecondKey, Value);
FirstMap.emplace(FirstKey, std::move(SecondMapSP));
} else {
LVSecondMapType *SecondMap = FirstIter->second.get();
if (SecondMap->find(SecondKey) == SecondMap->end())
SecondMap->emplace(SecondKey, Value);
}
typename LVAuxMapType::iterator AuxIter = AuxMap.find(SecondKey);
if (AuxIter == AuxMap.end()) {
AuxMap.emplace(SecondKey, FirstKey);
}
}
LVSecondMapType *findMap(FirstKeyType FirstKey) const {
typename LVFirstMapType::const_iterator FirstIter = FirstMap.find(FirstKey);
if (FirstIter == FirstMap.end())
return nullptr;
return FirstIter->second.get();
}
ValueType find(FirstKeyType FirstKey, SecondKeyType SecondKey) const {
LVSecondMapType *SecondMap = findMap(FirstKey);
if (!SecondMap)
return nullptr;
typename LVSecondMapType::const_iterator SecondIter =
SecondMap->find(SecondKey);
return (SecondIter != SecondMap->end()) ? SecondIter->second : nullptr;
}
ValueType find(SecondKeyType SecondKey) const {
typename LVAuxMapType::const_iterator AuxIter = AuxMap.find(SecondKey);
if (AuxIter == AuxMap.end())
return nullptr;
return find(AuxIter->second, SecondKey);
}
// Return a vector with all the 'ValueType' values.
LVValueTypes find() const {
LVValueTypes Values;
if (FirstMap.empty())
return Values;
for (typename LVFirstMapType::const_reference FirstEntry : FirstMap) {
LVSecondMapType &SecondMap = *FirstEntry.second;
for (typename LVSecondMapType::const_reference SecondEntry : SecondMap)
Values.push_back(SecondEntry.second);
}
return Values;
}
};
// Unified and flattened pathnames.
std::string transformPath(StringRef Path);
std::string flattenedFilePath(StringRef Path);
inline std::string formattedKind(StringRef Kind) {
return (Twine("{") + Twine(Kind) + Twine("}")).str();
}
inline std::string formattedName(StringRef Name) {
return (Twine("'") + Twine(Name) + Twine("'")).str();
}
inline std::string formattedNames(StringRef Name1, StringRef Name2) {
return (Twine("'") + Twine(Name1) + Twine(Name2) + Twine("'")).str();
}
// The given string represents a symbol or type name with optional enclosing
// scopes, such as: name, name<..>, scope::name, scope::..::name, etc.
// The string can have multiple references to template instantiations.
// It returns the inner most component.
LVLexicalComponent getInnerComponent(StringRef Name);
LVStringRefs getAllLexicalComponents(StringRef Name);
std::string getScopedName(const LVStringRefs &Components,
StringRef BaseName = {});
// These are the values assigned to the debug location record IDs.
// See DebugInfo/CodeView/CodeViewSymbols.def.
// S_DEFRANGE 0x113f
// S_DEFRANGE_SUBFIELD 0x1140
// S_DEFRANGE_REGISTER 0x1141
// S_DEFRANGE_FRAMEPOINTER_REL 0x1142
// S_DEFRANGE_SUBFIELD_REGISTER 0x1143
// S_DEFRANGE_FRAMEPOINTER_REL_FULL_SCOPE 0x1144
// S_DEFRANGE_REGISTER_REL 0x1145
// When recording CodeView debug location, the above values are truncated
// to a uint8_t value in order to fit the 'OpCode' used for the logical
// debug location operations.
// Return the original CodeView enum value.
inline uint16_t getCodeViewOperationCode(uint8_t Code) { return 0x1100 | Code; }
} // end namespace logicalview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVSUPPORT_H
PK hwFZ� �2k k ' DebugInfo/LogicalView/Core/LVLocation.hnu �[��� //===-- LVLocation.h --------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the LVOperation and LVLocation classes, which are used
// to describe variable locations.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVLOCATION_H
#define LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVLOCATION_H
#include "llvm/DebugInfo/LogicalView/Core/LVObject.h"
namespace llvm {
namespace logicalview {
using LVLineRange = std::pair<LVLine *, LVLine *>;
// The DW_AT_data_member_location attribute is a simple member offset.
const LVSmall LVLocationMemberOffset = 0;
class LVOperation final {
// To describe an operation:
// OpCode
// Operands[0]: First operand.
// Operands[1]: Second operand.
// OP_bregx, OP_bit_piece, OP_[GNU_]const_type,
// OP_[GNU_]deref_type, OP_[GNU_]entry_value, OP_implicit_value,
// OP_[GNU_]implicit_pointer, OP_[GNU_]regval_type, OP_xderef_type.
LVSmall Opcode = 0;
SmallVector<uint64_t> Operands;
public:
LVOperation() = delete;
LVOperation(LVSmall Opcode, ArrayRef<LVUnsigned> Operands)
: Opcode(Opcode), Operands(Operands) {}
LVOperation(const LVOperation &) = delete;
LVOperation &operator=(const LVOperation &) = delete;
~LVOperation() = default;
LVSmall getOpcode() const { return Opcode; }
std::string getOperandsDWARFInfo();
std::string getOperandsCodeViewInfo();
void print(raw_ostream &OS, bool Full = true) const;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump() { print(dbgs()); }
#endif
};
class LVLocation : public LVObject {
enum class Property {
IsAddressRange,
IsBaseClassOffset,
IsBaseClassStep,
IsClassOffset,
IsFixedAddress,
IsLocationSimple,
IsGapEntry,
IsOperation,
IsOperationList,
IsRegister,
IsStackOffset,
IsDiscardedRange,
IsInvalidRange,
IsInvalidLower,
IsInvalidUpper,
IsCallSite,
LastEntry
};
// Typed bitvector with properties for this location.
LVProperties<Property> Properties;
// True if the location it is associated with a debug range.
bool hasAssociatedRange() const {
return !getIsClassOffset() && !getIsDiscardedRange();
}
protected:
// Line numbers associated with locations ranges.
LVLine *LowerLine = nullptr;
LVLine *UpperLine = nullptr;
// Active range:
// LowPC: an offset from an applicable base address, not a PC value.
// HighPC: an offset from an applicable base address, or a length.
LVAddress LowPC = 0;
LVAddress HighPC = 0;
void setKind();
public:
LVLocation() : LVObject() { setIsLocation(); }
LVLocation(const LVLocation &) = delete;
LVLocation &operator=(const LVLocation &) = delete;
virtual ~LVLocation() = default;
PROPERTY(Property, IsAddressRange);
PROPERTY(Property, IsBaseClassOffset);
PROPERTY(Property, IsBaseClassStep);
PROPERTY_1(Property, IsClassOffset, IsLocationSimple);
PROPERTY_1(Property, IsFixedAddress, IsLocationSimple);
PROPERTY(Property, IsLocationSimple);
PROPERTY(Property, IsGapEntry);
PROPERTY(Property, IsOperationList);
PROPERTY(Property, IsOperation);
PROPERTY(Property, IsRegister);
PROPERTY_1(Property, IsStackOffset, IsLocationSimple);
PROPERTY(Property, IsDiscardedRange);
PROPERTY(Property, IsInvalidRange);
PROPERTY(Property, IsInvalidLower);
PROPERTY(Property, IsInvalidUpper);
PROPERTY(Property, IsCallSite);
const char *kind() const override;
// Mark the locations that have only DW_OP_fbreg as stack offset based.
virtual void updateKind() {}
// Line numbers for locations.
const LVLine *getLowerLine() const { return LowerLine; }
void setLowerLine(LVLine *Line) { LowerLine = Line; }
const LVLine *getUpperLine() const { return UpperLine; }
void setUpperLine(LVLine *Line) { UpperLine = Line; }
// Addresses for locations.
LVAddress getLowerAddress() const override { return LowPC; }
void setLowerAddress(LVAddress Address) override { LowPC = Address; }
LVAddress getUpperAddress() const override { return HighPC; }
void setUpperAddress(LVAddress Address) override { HighPC = Address; }
std::string getIntervalInfo() const;
bool validateRanges();
// In order to calculate a symbol coverage (percentage), take the ranges
// and obtain the number of units (bytes) covered by those ranges. We can't
// use the line numbers, because they can be zero or invalid.
// We return:
// false: No locations or multiple locations.
// true: a single location.
static bool calculateCoverage(LVLocations *Locations, unsigned &Factor,
float &Percentage);
virtual void addObject(LVAddress LowPC, LVAddress HighPC,
LVUnsigned SectionOffset, uint64_t LocDescOffset) {}
virtual void addObject(LVSmall Opcode, ArrayRef<LVUnsigned> Operands) {}
static void print(LVLocations *Locations, raw_ostream &OS, bool Full = true);
void printInterval(raw_ostream &OS, bool Full = true) const;
void printRaw(raw_ostream &OS, bool Full = true) const;
virtual void printRawExtra(raw_ostream &OS, bool Full = true) const {}
void print(raw_ostream &OS, bool Full = true) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump() const override { print(dbgs()); }
#endif
};
class LVLocationSymbol final : public LVLocation {
// Location descriptors for the active range.
std::unique_ptr<LVOperations> Entries;
void updateKind() override;
public:
LVLocationSymbol() : LVLocation() {}
LVLocationSymbol(const LVLocationSymbol &) = delete;
LVLocationSymbol &operator=(const LVLocationSymbol &) = delete;
~LVLocationSymbol() = default;
void addObject(LVAddress LowPC, LVAddress HighPC, LVUnsigned SectionOffset,
uint64_t LocDescOffset) override;
void addObject(LVSmall Opcode, ArrayRef<LVUnsigned> Operands) override;
void printRawExtra(raw_ostream &OS, bool Full = true) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
};
} // end namespace logicalview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVLOCATION_H
PK hwFZ�'�_DW DW & DebugInfo/LogicalView/Core/LVOptions.hnu �[��� //===-- LVOptions.h ---------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the LVOptions class, which is used to record the command
// line options.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVOPTIONS_H
#define LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVOPTIONS_H
#include "llvm/ADT/StringSet.h"
#include "llvm/DebugInfo/LogicalView/Core/LVLine.h"
#include "llvm/DebugInfo/LogicalView/Core/LVScope.h"
#include "llvm/DebugInfo/LogicalView/Core/LVSymbol.h"
#include "llvm/DebugInfo/LogicalView/Core/LVType.h"
#include "llvm/Support/Regex.h"
#include <set>
#include <string>
namespace llvm {
namespace logicalview {
// Generate get and set 'bool' functions.
#define BOOL_FUNCTION(FAMILY, FIELD) \
bool get##FAMILY##FIELD() const { return FAMILY.FIELD; } \
void set##FAMILY##FIELD() { FAMILY.FIELD = true; } \
void reset##FAMILY##FIELD() { FAMILY.FIELD = false; }
// Generate get and set 'unsigned' functions.
#define UNSIGNED_FUNCTION(FAMILY, FIELD) \
unsigned get##FAMILY##FIELD() const { return FAMILY.FIELD; } \
void set##FAMILY##FIELD(unsigned Value) { FAMILY.FIELD = Value; } \
void reset##FAMILY##FIELD() { FAMILY.FIELD = -1U; }
// Generate get and set 'std::string' functions.
#define STD_STRING_FUNCTION(FAMILY, FIELD) \
std::string get##FAMILY##FIELD() const { return FAMILY.FIELD; } \
void set##FAMILY##FIELD(std::string FIELD) { FAMILY.FIELD = FIELD; } \
void reset##FAMILY##FIELD() { FAMILY.FIELD = ""; }
// Generate get and set 'std::set' functions.
#define STDSET_FUNCTION_4(FAMILY, FIELD, TYPE, SET) \
bool get##FAMILY##FIELD() const { \
return FAMILY.SET.find(TYPE::FIELD) != FAMILY.SET.end(); \
} \
void set##FAMILY##FIELD() { FAMILY.SET.insert(TYPE::FIELD); } \
void reset##FAMILY##FIELD() { \
std::set<TYPE>::iterator Iter = FAMILY.SET.find(TYPE::FIELD); \
if (Iter != FAMILY.SET.end()) \
FAMILY.SET.erase(Iter); \
}
#define STDSET_FUNCTION_5(FAMILY, FIELD, ENTRY, TYPE, SET) \
bool get##FAMILY##FIELD##ENTRY() const { \
return FAMILY.SET.find(TYPE::ENTRY) != FAMILY.SET.end(); \
} \
void set##FAMILY##FIELD##ENTRY() { FAMILY.SET.insert(TYPE::ENTRY); }
// Generate get and set functions for '--attribute'
#define ATTRIBUTE_OPTION(FIELD) \
STDSET_FUNCTION_4(Attribute, FIELD, LVAttributeKind, Kinds)
// Generate get and set functions for '--output'
#define OUTPUT_OPTION(FIELD) \
STDSET_FUNCTION_4(Output, FIELD, LVOutputKind, Kinds)
// Generate get and set functions for '--print'
#define PRINT_OPTION(FIELD) STDSET_FUNCTION_4(Print, FIELD, LVPrintKind, Kinds)
// Generate get and set functions for '--warning'
#define WARNING_OPTION(FIELD) \
STDSET_FUNCTION_4(Warning, FIELD, LVWarningKind, Kinds)
// Generate get and set functions for '--compare'
#define COMPARE_OPTION(FIELD) \
STDSET_FUNCTION_4(Compare, FIELD, LVCompareKind, Elements)
// Generate get and set functions for '--report'
#define REPORT_OPTION(FIELD) \
STDSET_FUNCTION_4(Report, FIELD, LVReportKind, Kinds)
// Generate get and set functions for '--internal'
#define INTERNAL_OPTION(FIELD) \
STDSET_FUNCTION_4(Internal, FIELD, LVInternalKind, Kinds)
using LVOffsetSet = std::set<uint64_t>;
enum class LVAttributeKind {
All, // --attribute=all
Argument, // --attribute=argument
Base, // --attribute=base
Coverage, // --attribute=coverage
Directories, // --attribute=directories
Discarded, // --attribute=discarded
Discriminator, // --attribute=discriminator
Encoded, // --attribute=encoded
Extended, // --attribute=extended
Filename, // --attribute=filename
Files, // --attribute=files
Format, // --attribute=format
Gaps, // --attribute=gaps
Generated, // --attribute=generated
Global, // --attribute=global
Inserted, // --attribute=inserted
Level, // --attribute=level
Linkage, // --attribute=linkage
Local, // --attribute=local
Location, // --attribute=location
Offset, // --attribute=offset
Pathname, // --attribute=pathname
Producer, // --attribute=producer
Publics, // --attribute=publics
Qualified, // --attribute=qualified
Qualifier, // --attribute=qualifier
Range, // --attribute=range
Reference, // --attribute=reference
Register, // --attribute=register
Standard, // --attribute=standard
Subrange, // --attribute=subrange
System, // --attribute=system
Typename, // --attribute=typename
Underlying, // --attribute=underlying
Zero // --attribute=zero
};
using LVAttributeKindSet = std::set<LVAttributeKind>;
enum class LVCompareKind {
All, // --compare=all
Lines, // --compare=lines
Scopes, // --compare=scopes
Symbols, // --compare=symbols
Types // --compare=types
};
using LVCompareKindSet = std::set<LVCompareKind>;
enum class LVOutputKind {
All, // --output=all
Split, // --output=split
Json, // --output=json
Text // --output=text
};
using LVOutputKindSet = std::set<LVOutputKind>;
enum class LVPrintKind {
All, // --print=all
Elements, // --print=elements
Instructions, // --print=instructions
Lines, // --print=lines
Scopes, // --print=scopes
Sizes, // --print=sizes
Symbols, // --print=symbols
Summary, // --print=summary
Types, // --print=types
Warnings // --print=warnings
};
using LVPrintKindSet = std::set<LVPrintKind>;
enum class LVReportKind {
All, // --report=all
Children, // --report=children
List, // --report=list
Parents, // --report=parents
View // --report=view
};
using LVReportKindSet = std::set<LVReportKind>;
enum class LVWarningKind {
All, // --warning=all
Coverages, // --warning=coverages
Lines, // --warning=lines
Locations, // --warning=locations
Ranges // --warning=ranges
};
using LVWarningKindSet = std::set<LVWarningKind>;
enum class LVInternalKind {
All, // --internal=all
Cmdline, // --internal=cmdline
ID, // --internal=id
Integrity, // --internal=integrity
None, // --internal=none
Tag // --internal=tag
};
using LVInternalKindSet = std::set<LVInternalKind>;
// The 'Kinds' members are a one-to-one mapping to the associated command
// options that supports comma separated values. There are other 'bool'
// members that in very few cases point to a command option (see associated
// comment). Other cases for 'bool' refers to internal values derivated from
// the command options.
class LVOptions {
class LVAttribute {
public:
LVAttributeKindSet Kinds; // --attribute=<Kind>
bool Added = false; // Added elements found during comparison.
bool AnyLocation = false; // Any kind of location information.
bool AnySource = false; // Any kind of source information.
bool Missing = false; // Missing elements found during comparison.
};
class LVCompare {
public:
LVCompareKindSet Elements; // --compare=<kind>
bool Context = false; // --compare-context
bool Execute = false; // Compare requested.
bool Print = false; // Enable any printing.
};
class LVPrint {
public:
LVPrintKindSet Kinds; // --print=<Kind>
bool AnyElement = false; // Request to print any element.
bool AnyLine = false; // Print 'lines' or 'instructions'.
bool Execute = false; // Print requested.
bool Formatting = true; // Disable formatting during printing.
bool Offset = false; // Print offsets while formatting is disabled.
bool SizesSummary = false; // Print 'sizes' or 'summary'.
};
class LVReport {
public:
LVReportKindSet Kinds; // --report=<kind>
bool AnyView = false; // View, Parents or Children.
bool Execute = false; // Report requested.
};
class LVSelect {
public:
bool IgnoreCase = false; // --select-ignore-case
bool UseRegex = false; // --select-use-regex
bool Execute = false; // Select requested.
bool GenericKind = false; // We have collected generic kinds.
bool GenericPattern = false; // We have collected generic patterns.
bool OffsetPattern = false; // We have collected offset patterns.
StringSet<> Generic; // --select=<Pattern>
LVOffsetSet Offsets; // --select-offset=<Offset>
LVElementKindSet Elements; // --select-elements=<Kind>
LVLineKindSet Lines; // --select-lines=<Kind>
LVScopeKindSet Scopes; // --select-scopes=<Kind>
LVSymbolKindSet Symbols; // --select-symbols=<Kind>
LVTypeKindSelection Types; // --select-types=<Kind>
};
class LVOutput {
public:
LVOutputKindSet Kinds; // --output=<kind>
LVSortMode SortMode = LVSortMode::None; // --output-sort=<SortMode>
std::string Folder; // --output-folder=<Folder>
unsigned Level = -1U; // --output-level=<level>
};
class LVWarning {
public:
LVWarningKindSet Kinds; // --warning=<Kind>
};
class LVInternal {
public:
LVInternalKindSet Kinds; // --internal=<Kind>
};
class LVGeneral {
public:
bool CollectRanges = false; // Collect ranges information.
};
// Filters the output of the filename associated with the element being
// printed in order to see clearly which logical elements belongs to
// a particular filename. It is value is reset after the element
// that represents the Compile Unit is printed.
size_t LastFilenameIndex = 0;
// Controls the amount of additional spaces to insert when printing
// object attributes, in order to get a consistent printing layout.
size_t IndentationSize = 0;
// Calculate the indentation size, so we can use that value when printing
// additional attributes to objects, such as location.
void calculateIndentationSize();
public:
void resetFilenameIndex() { LastFilenameIndex = 0; }
bool changeFilenameIndex(size_t Index) {
bool IndexChanged = (Index != LastFilenameIndex);
if (IndexChanged)
LastFilenameIndex = Index;
return IndexChanged;
}
// Access to command line options, pattern and printing information.
static LVOptions *getOptions();
static void setOptions(LVOptions *Options);
LVOptions() = default;
LVOptions(const LVOptions &) = default;
LVOptions &operator=(const LVOptions &) = default;
~LVOptions() = default;
// Some command line options support shortcuts. For example:
// The command line option '--print=elements' is a shortcut for:
// '--print=instructions,lines,scopes,symbols,types'.
// In the case of logical view comparison, some options related to
// attributes must be set or reset for a proper comparison.
// Resolve any dependencies between command line options.
void resolveDependencies();
size_t indentationSize() const { return IndentationSize; }
LVAttribute Attribute;
LVCompare Compare;
LVOutput Output;
LVPrint Print;
LVReport Report;
LVSelect Select;
LVWarning Warning;
LVInternal Internal;
LVGeneral General;
// --attribute.
ATTRIBUTE_OPTION(All);
ATTRIBUTE_OPTION(Argument);
ATTRIBUTE_OPTION(Base);
ATTRIBUTE_OPTION(Coverage);
ATTRIBUTE_OPTION(Directories);
ATTRIBUTE_OPTION(Discarded);
ATTRIBUTE_OPTION(Discriminator);
ATTRIBUTE_OPTION(Encoded);
ATTRIBUTE_OPTION(Extended);
ATTRIBUTE_OPTION(Filename);
ATTRIBUTE_OPTION(Files);
ATTRIBUTE_OPTION(Format);
ATTRIBUTE_OPTION(Gaps);
ATTRIBUTE_OPTION(Generated);
ATTRIBUTE_OPTION(Global);
ATTRIBUTE_OPTION(Inserted);
ATTRIBUTE_OPTION(Level);
ATTRIBUTE_OPTION(Linkage);
ATTRIBUTE_OPTION(Location);
ATTRIBUTE_OPTION(Local);
ATTRIBUTE_OPTION(Offset);
ATTRIBUTE_OPTION(Pathname);
ATTRIBUTE_OPTION(Producer);
ATTRIBUTE_OPTION(Publics);
ATTRIBUTE_OPTION(Qualified);
ATTRIBUTE_OPTION(Qualifier);
ATTRIBUTE_OPTION(Range);
ATTRIBUTE_OPTION(Reference);
ATTRIBUTE_OPTION(Register);
ATTRIBUTE_OPTION(Standard);
ATTRIBUTE_OPTION(Subrange);
ATTRIBUTE_OPTION(System);
ATTRIBUTE_OPTION(Typename);
ATTRIBUTE_OPTION(Underlying);
ATTRIBUTE_OPTION(Zero);
BOOL_FUNCTION(Attribute, Added);
BOOL_FUNCTION(Attribute, AnyLocation);
BOOL_FUNCTION(Attribute, AnySource);
BOOL_FUNCTION(Attribute, Missing);
// --compare.
COMPARE_OPTION(All);
COMPARE_OPTION(Lines);
COMPARE_OPTION(Scopes);
COMPARE_OPTION(Symbols);
COMPARE_OPTION(Types);
BOOL_FUNCTION(Compare, Context);
BOOL_FUNCTION(Compare, Execute);
BOOL_FUNCTION(Compare, Print);
// --output.
OUTPUT_OPTION(All);
OUTPUT_OPTION(Split);
OUTPUT_OPTION(Text);
OUTPUT_OPTION(Json);
STD_STRING_FUNCTION(Output, Folder);
UNSIGNED_FUNCTION(Output, Level);
LVSortMode getSortMode() const { return Output.SortMode; }
void setSortMode(LVSortMode SortMode) { Output.SortMode = SortMode; }
// --print.
PRINT_OPTION(All);
PRINT_OPTION(Elements);
PRINT_OPTION(Instructions);
PRINT_OPTION(Lines);
PRINT_OPTION(Scopes);
PRINT_OPTION(Sizes);
PRINT_OPTION(Symbols);
PRINT_OPTION(Summary);
PRINT_OPTION(Types);
PRINT_OPTION(Warnings);
BOOL_FUNCTION(Print, AnyElement);
BOOL_FUNCTION(Print, AnyLine);
BOOL_FUNCTION(Print, Execute);
BOOL_FUNCTION(Print, Formatting);
BOOL_FUNCTION(Print, Offset);
BOOL_FUNCTION(Print, SizesSummary);
// --report.
REPORT_OPTION(All);
REPORT_OPTION(Children);
REPORT_OPTION(List);
REPORT_OPTION(Parents);
REPORT_OPTION(View);
BOOL_FUNCTION(Report, AnyView);
BOOL_FUNCTION(Report, Execute);
// --select.
BOOL_FUNCTION(Select, IgnoreCase);
BOOL_FUNCTION(Select, UseRegex);
BOOL_FUNCTION(Select, Execute);
BOOL_FUNCTION(Select, GenericKind);
BOOL_FUNCTION(Select, GenericPattern);
BOOL_FUNCTION(Select, OffsetPattern);
// --warning.
WARNING_OPTION(All);
WARNING_OPTION(Coverages);
WARNING_OPTION(Lines);
WARNING_OPTION(Locations);
WARNING_OPTION(Ranges);
// --internal.
INTERNAL_OPTION(All);
INTERNAL_OPTION(Cmdline);
INTERNAL_OPTION(ID);
INTERNAL_OPTION(Integrity);
INTERNAL_OPTION(None);
INTERNAL_OPTION(Tag);
// General shortcuts to some combinations.
BOOL_FUNCTION(General, CollectRanges);
void print(raw_ostream &OS) const;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump() const { print(dbgs()); }
#endif
};
inline LVOptions &options() { return (*LVOptions::getOptions()); }
inline void setOptions(LVOptions *Options) { LVOptions::setOptions(Options); }
class LVPatterns final {
// Pattern Mode.
enum class LVMatchMode {
None = 0, // No given pattern.
Match, // Perfect match.
NoCase, // Ignore case.
Regex // Regular expression.
};
// Keep the search pattern information.
struct LVMatch {
std::string Pattern; // Normal pattern.
std::shared_ptr<Regex> RE; // Regular Expression Pattern.
LVMatchMode Mode = LVMatchMode::None; // Match mode.
};
using LVMatchInfo = std::vector<LVMatch>;
LVMatchInfo GenericMatchInfo;
using LVMatchOffsets = std::vector<uint64_t>;
LVMatchOffsets OffsetMatchInfo;
// Element selection.
LVElementDispatch ElementDispatch;
LVLineDispatch LineDispatch;
LVScopeDispatch ScopeDispatch;
LVSymbolDispatch SymbolDispatch;
LVTypeDispatch TypeDispatch;
// Element selection request.
LVElementRequest ElementRequest;
LVLineRequest LineRequest;
LVScopeRequest ScopeRequest;
LVSymbolRequest SymbolRequest;
LVTypeRequest TypeRequest;
// Check an element printing Request.
template <typename T, typename U>
bool checkElementRequest(const T *Element, const U &Requests) const {
assert(Element && "Element must not be nullptr");
for (const auto &Request : Requests)
if ((Element->*Request)())
return true;
// Check generic element requests.
for (const LVElementGetFunction &Request : ElementRequest)
if ((Element->*Request)())
return true;
return false;
}
// Add an element printing request based on its kind.
template <typename T, typename U, typename V>
void addRequest(const T &Selection, const U &Dispatch, V &Request) const {
for (const auto &Entry : Selection) {
// Find target function to fullfit request.
typename U::const_iterator Iter = Dispatch.find(Entry);
if (Iter != Dispatch.end())
Request.push_back(Iter->second);
}
}
void addElement(LVElement *Element);
template <typename T, typename U>
void resolveGenericPatternMatch(T *Element, const U &Requests) {
assert(Element && "Element must not be nullptr");
auto CheckPattern = [=]() -> bool {
return (Element->isNamed() &&
(matchGenericPattern(Element->getName()) ||
matchGenericPattern(Element->getLinkageName()))) ||
(Element->isTyped() &&
matchGenericPattern(Element->getTypeName()));
};
auto CheckOffset = [=]() -> bool {
return matchOffsetPattern(Element->getOffset());
};
if ((options().getSelectGenericPattern() && CheckPattern()) ||
(options().getSelectOffsetPattern() && CheckOffset()) ||
((Requests.size() || ElementRequest.size()) &&
checkElementRequest(Element, Requests)))
addElement(Element);
}
template <typename U>
void resolveGenericPatternMatch(LVLine *Line, const U &Requests) {
assert(Line && "Line must not be nullptr");
auto CheckPattern = [=]() -> bool {
return matchGenericPattern(Line->lineNumberAsStringStripped()) ||
matchGenericPattern(Line->getName()) ||
matchGenericPattern(Line->getPathname());
};
auto CheckOffset = [=]() -> bool {
return matchOffsetPattern(Line->getAddress());
};
if ((options().getSelectGenericPattern() && CheckPattern()) ||
(options().getSelectOffsetPattern() && CheckOffset()) ||
(Requests.size() && checkElementRequest(Line, Requests)))
addElement(Line);
}
Error createMatchEntry(LVMatchInfo &Filters, StringRef Pattern,
bool IgnoreCase, bool UseRegex);
public:
static LVPatterns *getPatterns();
LVPatterns() {
ElementDispatch = LVElement::getDispatch();
LineDispatch = LVLine::getDispatch();
ScopeDispatch = LVScope::getDispatch();
SymbolDispatch = LVSymbol::getDispatch();
TypeDispatch = LVType::getDispatch();
}
LVPatterns(const LVPatterns &) = delete;
LVPatterns &operator=(const LVPatterns &) = delete;
~LVPatterns() = default;
// Clear any existing patterns.
void clear() {
GenericMatchInfo.clear();
OffsetMatchInfo.clear();
ElementRequest.clear();
LineRequest.clear();
ScopeRequest.clear();
SymbolRequest.clear();
TypeRequest.clear();
options().resetSelectGenericKind();
options().resetSelectGenericPattern();
options().resetSelectOffsetPattern();
}
void addRequest(LVElementKindSet &Selection) {
addRequest(Selection, ElementDispatch, ElementRequest);
}
void addRequest(LVLineKindSet &Selection) {
addRequest(Selection, LineDispatch, LineRequest);
}
void addRequest(LVScopeKindSet &Selection) {
addRequest(Selection, ScopeDispatch, ScopeRequest);
}
void addRequest(LVSymbolKindSet &Selection) {
addRequest(Selection, SymbolDispatch, SymbolRequest);
}
void addRequest(LVTypeKindSelection &Selection) {
addRequest(Selection, TypeDispatch, TypeRequest);
}
void updateReportOptions();
bool matchPattern(StringRef Input, const LVMatchInfo &MatchInfo);
// Match a pattern (--select='pattern').
bool matchGenericPattern(StringRef Input) {
return matchPattern(Input, GenericMatchInfo);
}
bool matchOffsetPattern(LVOffset Offset) {
return llvm::is_contained(OffsetMatchInfo, Offset);
}
void resolvePatternMatch(LVLine *Line) {
resolveGenericPatternMatch(Line, LineRequest);
}
void resolvePatternMatch(LVScope *Scope) {
resolveGenericPatternMatch(Scope, ScopeRequest);
}
void resolvePatternMatch(LVSymbol *Symbol) {
resolveGenericPatternMatch(Symbol, SymbolRequest);
}
void resolvePatternMatch(LVType *Type) {
resolveGenericPatternMatch(Type, TypeRequest);
}
void addPatterns(StringSet<> &Patterns, LVMatchInfo &Filters);
// Add generic and offset patterns info.
void addGenericPatterns(StringSet<> &Patterns);
void addOffsetPatterns(const LVOffsetSet &Patterns);
// Conditions to print an object.
bool printElement(const LVLine *Line) const;
bool printObject(const LVLocation *Location) const;
bool printElement(const LVScope *Scope) const;
bool printElement(const LVSymbol *Symbol) const;
bool printElement(const LVType *Type) const;
void print(raw_ostream &OS) const;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump() const { print(dbgs()); }
#endif
};
inline LVPatterns &patterns() { return *LVPatterns::getPatterns(); }
} // namespace logicalview
} // namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVOPTIONS_H
PK hwFZqt[ [ & DebugInfo/LogicalView/Core/LVCompare.hnu �[��� //===-- LVCompare.h ---------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the LVCompare class, which is used to describe a logical
// view comparison.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVCOMPARE_H
#define LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVCOMPARE_H
#include "llvm/DebugInfo/LogicalView/Core/LVObject.h"
namespace llvm {
namespace logicalview {
class LVReader;
// Record the elements missing or added and their compare pass.
using LVPassEntry = std::tuple<LVReader *, LVElement *, LVComparePass>;
using LVPassTable = std::vector<LVPassEntry>;
class LVCompare final {
raw_ostream &OS;
LVScopes ScopeStack;
// As the comparison is performed twice (by exchanging the reference
// and target readers) the element missing/added status does specify
// the comparison pass.
// By recording each missing/added elements along with its pass, it
// allows checking which elements were missing/added during each pass.
LVPassTable PassTable;
// Reader used on the LHS of the comparison.
// In the 'Missing' pass, it points to the reference reader.
// In the 'Added' pass it points to the target reader.
LVReader *Reader = nullptr;
bool FirstMissing = true;
bool PrintLines = false;
bool PrintScopes = false;
bool PrintSymbols = false;
bool PrintTypes = false;
static void setInstance(LVCompare *Compare);
void printCurrentStack();
void printSummary() const;
public:
LVCompare() = delete;
LVCompare(raw_ostream &OS);
LVCompare(const LVCompare &) = delete;
LVCompare &operator=(const LVCompare &) = delete;
~LVCompare() = default;
static LVCompare &getInstance();
// Scopes stack used during the missing/added reporting.
void push(LVScope *Scope) { ScopeStack.push_back(Scope); }
void pop() { ScopeStack.pop_back(); }
// Perform comparison between the 'Reference' and 'Target' scopes tree.
Error execute(LVReader *ReferenceReader, LVReader *TargetReader);
void addPassEntry(LVReader *Reader, LVElement *Element, LVComparePass Pass) {
PassTable.emplace_back(Reader, Element, Pass);
}
const LVPassTable &getPassTable() const & { return PassTable; }
void printItem(LVElement *Element, LVComparePass Pass);
void print(raw_ostream &OS) const;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump() const { print(dbgs()); }
#endif
};
inline LVCompare &getComparator() { return LVCompare::getInstance(); }
} // end namespace logicalview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVCOMPARE_H
PK hwFZ�\��! ! % DebugInfo/LogicalView/Core/LVSymbol.hnu �[��� //===-- LVSymbol.h ----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the LVSymbol class, which is used to describe a debug
// information symbol.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVSYMBOL_H
#define LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVSYMBOL_H
#include "llvm/DebugInfo/LogicalView/Core/LVElement.h"
namespace llvm {
namespace logicalview {
enum class LVSymbolKind {
IsCallSiteParameter,
IsConstant,
IsInheritance,
IsMember,
IsParameter,
IsUnspecified,
IsVariable,
LastEntry
};
using LVSymbolKindSet = std::set<LVSymbolKind>;
using LVSymbolDispatch = std::map<LVSymbolKind, LVSymbolGetFunction>;
using LVSymbolRequest = std::vector<LVSymbolGetFunction>;
class LVSymbol final : public LVElement {
enum class Property { HasLocation, FillGaps, LastEntry };
// Typed bitvector with kinds and properties for this symbol.
LVProperties<LVSymbolKind> Kinds;
LVProperties<Property> Properties;
static LVSymbolDispatch Dispatch;
// CodeView symbol Linkage name.
size_t LinkageNameIndex = 0;
// Reference to DW_AT_specification, DW_AT_abstract_origin attribute.
LVSymbol *Reference = nullptr;
std::unique_ptr<LVLocations> Locations;
LVLocation *CurrentLocation = nullptr;
// Bitfields length.
uint32_t BitSize = 0;
// Index in the String pool representing any initial value.
size_t ValueIndex = 0;
// Coverage factor in units (bytes).
unsigned CoverageFactor = 0;
float CoveragePercentage = 0;
// Add a location gap into the location list.
LVLocations::iterator addLocationGap(LVLocations::iterator Pos,
LVAddress LowPC, LVAddress HighPC);
// Find the current symbol in the given 'Targets'.
LVSymbol *findIn(const LVSymbols *Targets) const;
public:
LVSymbol() : LVElement(LVSubclassID::LV_SYMBOL) {
setIsSymbol();
setIncludeInPrint();
}
LVSymbol(const LVSymbol &) = delete;
LVSymbol &operator=(const LVSymbol &) = delete;
~LVSymbol() = default;
static bool classof(const LVElement *Element) {
return Element->getSubclassID() == LVSubclassID::LV_SYMBOL;
}
KIND(LVSymbolKind, IsCallSiteParameter);
KIND(LVSymbolKind, IsConstant);
KIND(LVSymbolKind, IsInheritance);
KIND(LVSymbolKind, IsMember);
KIND(LVSymbolKind, IsParameter);
KIND(LVSymbolKind, IsUnspecified);
KIND(LVSymbolKind, IsVariable);
PROPERTY(Property, HasLocation);
PROPERTY(Property, FillGaps);
const char *kind() const override;
// Access DW_AT_specification, DW_AT_abstract_origin reference.
LVSymbol *getReference() const { return Reference; }
void setReference(LVSymbol *Symbol) override {
Reference = Symbol;
setHasReference();
}
void setReference(LVElement *Element) override {
assert((!Element || isa<LVSymbol>(Element)) && "Invalid element");
setReference(static_cast<LVSymbol *>(Element));
}
void setLinkageName(StringRef LinkageName) override {
LinkageNameIndex = getStringPool().getIndex(LinkageName);
}
StringRef getLinkageName() const override {
return getStringPool().getString(LinkageNameIndex);
}
size_t getLinkageNameIndex() const override { return LinkageNameIndex; }
uint32_t getBitSize() const override { return BitSize; }
void setBitSize(uint32_t Size) override { BitSize = Size; }
// Process the values for a DW_AT_const_value.
StringRef getValue() const override {
return getStringPool().getString(ValueIndex);
}
void setValue(StringRef Value) override {
ValueIndex = getStringPool().getIndex(Value);
}
size_t getValueIndex() const override { return ValueIndex; }
// Add a Location Entry.
void addLocationConstant(dwarf::Attribute Attr, LVUnsigned Constant,
uint64_t LocDescOffset);
void addLocationOperands(LVSmall Opcode, ArrayRef<uint64_t> Operands);
void addLocation(dwarf::Attribute Attr, LVAddress LowPC, LVAddress HighPC,
LVUnsigned SectionOffset, uint64_t LocDescOffset,
bool CallSiteLocation = false);
// Fill gaps in the location list.
void fillLocationGaps();
// Get all the locations associated with symbols.
void getLocations(LVLocations &LocationList, LVValidLocation ValidLocation,
bool RecordInvalid = false);
void getLocations(LVLocations &LocationList) const;
// Calculate coverage factor.
void calculateCoverage();
unsigned getCoverageFactor() const { return CoverageFactor; }
void setCoverageFactor(unsigned Value) { CoverageFactor = Value; }
float getCoveragePercentage() const { return CoveragePercentage; }
void setCoveragePercentage(float Value) { CoveragePercentage = Value; }
// Print location in raw format.
void printLocations(raw_ostream &OS, bool Full = true) const;
// Follow a chain of references given by DW_AT_abstract_origin and/or
// DW_AT_specification and update the symbol name.
StringRef resolveReferencesChain();
void resolveName() override;
void resolveReferences() override;
static LVSymbolDispatch &getDispatch() { return Dispatch; }
static bool parametersMatch(const LVSymbols *References,
const LVSymbols *Targets);
static void getParameters(const LVSymbols *Symbols, LVSymbols *Parameters);
// Iterate through the 'References' set and check that all its elements
// are present in the 'Targets' set. For a missing element, mark its
// parents as missing.
static void markMissingParents(const LVSymbols *References,
const LVSymbols *Targets);
// Returns true if current type is logically equal to the given 'Symbol'.
bool equals(const LVSymbol *Symbol) const;
// Returns true if the given 'References' are logically equal to the
// given 'Targets'.
static bool equals(const LVSymbols *References, const LVSymbols *Targets);
// Report the current symbol as missing or added during comparison.
void report(LVComparePass Pass) override;
void print(raw_ostream &OS, bool Full = true) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump() const override { print(dbgs()); }
#endif
};
} // end namespace logicalview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVSYMBOL_H
PK hwFZ*T�=E E # DebugInfo/LogicalView/Core/LVSort.hnu �[��� //===-- LVSort.h ------------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the sort algorithms.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVSORT_H
#define LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVSORT_H
namespace llvm {
namespace logicalview {
class LVObject;
// Object Sorting Mode.
enum class LVSortMode {
None = 0, // No given sort.
Kind, // Sort by kind.
Line, // Sort by line.
Name, // Sort by name.
Offset // Sort by offset.
};
// Type of function to be called when sorting an object.
using LVSortValue = int;
using LVSortFunction = LVSortValue (*)(const LVObject *LHS,
const LVObject *RHS);
// Get the comparator function, based on the command line options.
LVSortFunction getSortFunction();
// Comparator functions that can be used for sorting.
LVSortValue compareKind(const LVObject *LHS, const LVObject *RHS);
LVSortValue compareLine(const LVObject *LHS, const LVObject *RHS);
LVSortValue compareName(const LVObject *LHS, const LVObject *RHS);
LVSortValue compareOffset(const LVObject *LHS, const LVObject *RHS);
LVSortValue compareRange(const LVObject *LHS, const LVObject *RHS);
LVSortValue sortByKind(const LVObject *LHS, const LVObject *RHS);
LVSortValue sortByLine(const LVObject *LHS, const LVObject *RHS);
LVSortValue sortByName(const LVObject *LHS, const LVObject *RHS);
} // end namespace logicalview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVSORT_H
PK hwFZZ�j $ DebugInfo/LogicalView/Core/LVRange.hnu �[��� //===-- LVRange.h -----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the LVRange class, which is used to describe a debug
// information range.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVRANGE_H
#define LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVRANGE_H
#include "llvm/ADT/IntervalTree.h"
#include "llvm/DebugInfo/LogicalView/Core/LVObject.h"
namespace llvm {
namespace logicalview {
using LVAddressRange = std::pair<LVAddress, LVAddress>;
class LVRangeEntry final {
LVAddress Lower = 0;
LVAddress Upper = 0;
LVScope *Scope = nullptr;
public:
using RangeType = LVAddress;
LVRangeEntry() = delete;
LVRangeEntry(LVAddress LowerAddress, LVAddress UpperAddress, LVScope *Scope)
: Lower(LowerAddress), Upper(UpperAddress), Scope(Scope) {}
RangeType lower() const { return Lower; }
RangeType upper() const { return Upper; }
LVAddressRange addressRange() const {
return LVAddressRange(lower(), upper());
}
LVScope *scope() const { return Scope; }
};
// Class to represent a list of range addresses associated with a
// scope; the addresses are stored in ascending order and can overlap.
using LVRangeEntries = std::vector<LVRangeEntry>;
class LVRange final : public LVObject {
/// Map of where a user value is live, and its location.
using LVRangesTree = IntervalTree<LVAddress, LVScope *>;
using LVAllocator = LVRangesTree::Allocator;
LVAllocator Allocator;
LVRangesTree RangesTree;
LVRangeEntries RangeEntries;
LVAddress Lower = MaxAddress;
LVAddress Upper = 0;
public:
LVRange() : LVObject(), RangesTree(Allocator) {}
LVRange(const LVRange &) = delete;
LVRange &operator=(const LVRange &) = delete;
~LVRange() = default;
void addEntry(LVScope *Scope, LVAddress LowerAddress, LVAddress UpperAddress);
void addEntry(LVScope *Scope);
LVScope *getEntry(LVAddress Address) const;
LVScope *getEntry(LVAddress LowerAddress, LVAddress UpperAddress) const;
bool hasEntry(LVAddress Low, LVAddress High) const;
LVAddress getLower() const { return Lower; }
LVAddress getUpper() const { return Upper; }
const LVRangeEntries &getEntries() const { return RangeEntries; }
void clear() {
RangeEntries.clear();
Lower = MaxAddress;
Upper = 0;
}
bool empty() const { return RangeEntries.empty(); }
void sort();
void startSearch();
void endSearch() {}
void print(raw_ostream &OS, bool Full = true) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override {}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump() const override { print(dbgs()); }
#endif
};
} // end namespace logicalview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVRANGE_H
PK hwFZ�����+ �+ % DebugInfo/LogicalView/Core/LVReader.hnu �[��� //===-- LVReader.h ----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the LVReader class, which is used to describe a debug
// information reader.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVREADER_H
#define LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVREADER_H
#include "llvm/DebugInfo/LogicalView/Core/LVOptions.h"
#include "llvm/DebugInfo/LogicalView/Core/LVRange.h"
#include "llvm/Support/Errc.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/ScopedPrinter.h"
#include "llvm/Support/ToolOutputFile.h"
#include <map>
namespace llvm {
namespace logicalview {
constexpr LVSectionIndex UndefinedSectionIndex = 0;
class LVScopeCompileUnit;
class LVObject;
class LVSplitContext final {
std::unique_ptr<ToolOutputFile> OutputFile;
std::string Location;
public:
LVSplitContext() = default;
LVSplitContext(const LVSplitContext &) = delete;
LVSplitContext &operator=(const LVSplitContext &) = delete;
~LVSplitContext() = default;
Error createSplitFolder(StringRef Where);
std::error_code open(std::string Name, std::string Extension,
raw_ostream &OS);
void close() {
if (OutputFile) {
OutputFile->os().close();
OutputFile = nullptr;
}
}
std::string getLocation() const { return Location; }
raw_fd_ostream &os() { return OutputFile->os(); }
};
/// The logical reader owns of all the logical elements created during
/// the debug information parsing. For its creation it uses a specific
/// bump allocator for each type of logical element.
class LVReader {
LVBinaryType BinaryType;
// Context used by '--output=split' command line option.
LVSplitContext SplitContext;
// Compile Units DIE Offset => Scope.
using LVCompileUnits = std::map<LVOffset, LVScopeCompileUnit *>;
LVCompileUnits CompileUnits;
// Added elements to be used during elements comparison.
LVLines Lines;
LVScopes Scopes;
LVSymbols Symbols;
LVTypes Types;
// Create split folder.
Error createSplitFolder();
bool OutputSplit = false;
// Define a specific bump allocator for the given KIND.
#define LV_OBJECT_ALLOCATOR(KIND) \
llvm::SpecificBumpPtrAllocator<LV##KIND> Allocated##KIND;
// Lines allocator.
LV_OBJECT_ALLOCATOR(Line)
LV_OBJECT_ALLOCATOR(LineDebug)
LV_OBJECT_ALLOCATOR(LineAssembler)
// Locations allocator.
LV_OBJECT_ALLOCATOR(Location)
LV_OBJECT_ALLOCATOR(LocationSymbol)
// Operations allocator.
LV_OBJECT_ALLOCATOR(Operation)
// Scopes allocator.
LV_OBJECT_ALLOCATOR(Scope)
LV_OBJECT_ALLOCATOR(ScopeAggregate)
LV_OBJECT_ALLOCATOR(ScopeAlias)
LV_OBJECT_ALLOCATOR(ScopeArray)
LV_OBJECT_ALLOCATOR(ScopeCompileUnit)
LV_OBJECT_ALLOCATOR(ScopeEnumeration)
LV_OBJECT_ALLOCATOR(ScopeFormalPack)
LV_OBJECT_ALLOCATOR(ScopeFunction)
LV_OBJECT_ALLOCATOR(ScopeFunctionInlined)
LV_OBJECT_ALLOCATOR(ScopeFunctionType)
LV_OBJECT_ALLOCATOR(ScopeNamespace)
LV_OBJECT_ALLOCATOR(ScopeRoot)
LV_OBJECT_ALLOCATOR(ScopeTemplatePack)
// Symbols allocator.
LV_OBJECT_ALLOCATOR(Symbol)
// Types allocator.
LV_OBJECT_ALLOCATOR(Type)
LV_OBJECT_ALLOCATOR(TypeDefinition)
LV_OBJECT_ALLOCATOR(TypeEnumerator)
LV_OBJECT_ALLOCATOR(TypeImport)
LV_OBJECT_ALLOCATOR(TypeParam)
LV_OBJECT_ALLOCATOR(TypeSubrange)
#undef LV_OBJECT_ALLOCATOR
protected:
LVScopeRoot *Root = nullptr;
std::string InputFilename;
std::string FileFormatName;
ScopedPrinter &W;
raw_ostream &OS;
LVScopeCompileUnit *CompileUnit = nullptr;
// Only for ELF format. The CodeView is handled in a different way.
LVSectionIndex DotTextSectionIndex = UndefinedSectionIndex;
// Record Compilation Unit entry.
void addCompileUnitOffset(LVOffset Offset, LVScopeCompileUnit *CompileUnit) {
CompileUnits.emplace(Offset, CompileUnit);
}
// Create the Scope Root.
virtual Error createScopes() {
Root = createScopeRoot();
Root->setName(getFilename());
if (options().getAttributeFormat())
Root->setFileFormatName(FileFormatName);
return Error::success();
}
// Return a pathname composed by: parent_path(InputFilename)/filename(From).
// This is useful when a type server (PDB file associated with an object
// file or a precompiled header file) or a DWARF split object have been
// moved from their original location. That is the case when running
// regression tests, where object files are created in one location and
// executed in a different location.
std::string createAlternativePath(StringRef From) {
// During the reader initialization, any backslashes in 'InputFilename'
// are converted to forward slashes.
SmallString<128> Path;
sys::path::append(Path, sys::path::Style::posix,
sys::path::parent_path(InputFilename),
sys::path::filename(sys::path::convert_to_slash(
From, sys::path::Style::windows)));
return std::string(Path);
}
virtual Error printScopes();
virtual Error printMatchedElements(bool UseMatchedElements);
virtual void sortScopes() {}
public:
LVReader() = delete;
LVReader(StringRef InputFilename, StringRef FileFormatName, ScopedPrinter &W,
LVBinaryType BinaryType = LVBinaryType::NONE)
: BinaryType(BinaryType), OutputSplit(options().getOutputSplit()),
InputFilename(InputFilename), FileFormatName(FileFormatName), W(W),
OS(W.getOStream()) {}
LVReader(const LVReader &) = delete;
LVReader &operator=(const LVReader &) = delete;
virtual ~LVReader() = default;
// Creates a logical object of the given KIND. The signature for the created
// functions looks like:
// ...
// LVScope *createScope()
// LVScopeRoot *creatScopeRoot()
// LVType *createType();
// ...
#define LV_CREATE_OBJECT(KIND) \
LV##KIND *create##KIND() { \
return new (Allocated##KIND.Allocate()) LV##KIND(); \
}
// Lines creation.
LV_CREATE_OBJECT(Line)
LV_CREATE_OBJECT(LineDebug)
LV_CREATE_OBJECT(LineAssembler)
// Locations creation.
LV_CREATE_OBJECT(Location)
LV_CREATE_OBJECT(LocationSymbol)
// Scopes creation.
LV_CREATE_OBJECT(Scope)
LV_CREATE_OBJECT(ScopeAggregate)
LV_CREATE_OBJECT(ScopeAlias)
LV_CREATE_OBJECT(ScopeArray)
LV_CREATE_OBJECT(ScopeCompileUnit)
LV_CREATE_OBJECT(ScopeEnumeration)
LV_CREATE_OBJECT(ScopeFormalPack)
LV_CREATE_OBJECT(ScopeFunction)
LV_CREATE_OBJECT(ScopeFunctionInlined)
LV_CREATE_OBJECT(ScopeFunctionType)
LV_CREATE_OBJECT(ScopeNamespace)
LV_CREATE_OBJECT(ScopeRoot)
LV_CREATE_OBJECT(ScopeTemplatePack)
// Symbols creation.
LV_CREATE_OBJECT(Symbol)
// Types creation.
LV_CREATE_OBJECT(Type)
LV_CREATE_OBJECT(TypeDefinition)
LV_CREATE_OBJECT(TypeEnumerator)
LV_CREATE_OBJECT(TypeImport)
LV_CREATE_OBJECT(TypeParam)
LV_CREATE_OBJECT(TypeSubrange)
#undef LV_CREATE_OBJECT
// Operations creation.
LVOperation *createOperation(LVSmall OpCode, ArrayRef<LVUnsigned> Operands) {
return new (AllocatedOperation.Allocate()) LVOperation(OpCode, Operands);
}
StringRef getFilename(LVObject *Object, size_t Index) const;
StringRef getFilename() const { return InputFilename; }
void setFilename(std::string Name) { InputFilename = std::move(Name); }
StringRef getFileFormatName() const { return FileFormatName; }
raw_ostream &outputStream() { return OS; }
bool isBinaryTypeNone() const { return BinaryType == LVBinaryType::NONE; }
bool isBinaryTypeELF() const { return BinaryType == LVBinaryType::ELF; }
bool isBinaryTypeCOFF() const { return BinaryType == LVBinaryType::COFF; }
LVScopeCompileUnit *getCompileUnit() const { return CompileUnit; }
void setCompileUnit(LVScope *Scope) {
assert(Scope && Scope->isCompileUnit() && "Scope is not a compile unit");
CompileUnit = static_cast<LVScopeCompileUnit *>(Scope);
}
void setCompileUnitCPUType(codeview::CPUType Type) {
CompileUnit->setCPUType(Type);
}
codeview::CPUType getCompileUnitCPUType() {
return CompileUnit->getCPUType();
}
// Access to the scopes root.
LVScopeRoot *getScopesRoot() const { return Root; }
Error doPrint();
Error doLoad();
virtual std::string getRegisterName(LVSmall Opcode,
ArrayRef<uint64_t> Operands) {
llvm_unreachable("Invalid instance reader.");
return {};
}
LVSectionIndex getDotTextSectionIndex() const { return DotTextSectionIndex; }
virtual LVSectionIndex getSectionIndex(LVScope *Scope) {
return getDotTextSectionIndex();
}
virtual bool isSystemEntry(LVElement *Element, StringRef Name = {}) const {
return false;
};
// Access to split context.
LVSplitContext &getSplitContext() { return SplitContext; }
// In the case of element comparison, register that added element.
void notifyAddedElement(LVLine *Line) {
if (!options().getCompareContext() && options().getCompareLines())
Lines.push_back(Line);
}
void notifyAddedElement(LVScope *Scope) {
if (!options().getCompareContext() && options().getCompareScopes())
Scopes.push_back(Scope);
}
void notifyAddedElement(LVSymbol *Symbol) {
if (!options().getCompareContext() && options().getCompareSymbols())
Symbols.push_back(Symbol);
}
void notifyAddedElement(LVType *Type) {
if (!options().getCompareContext() && options().getCompareTypes())
Types.push_back(Type);
}
const LVLines &getLines() const { return Lines; }
const LVScopes &getScopes() const { return Scopes; }
const LVSymbols &getSymbols() const { return Symbols; }
const LVTypes &getTypes() const { return Types; }
// Conditions to print an object.
bool doPrintLine(const LVLine *Line) const {
return patterns().printElement(Line);
}
bool doPrintLocation(const LVLocation *Location) const {
return patterns().printObject(Location);
}
bool doPrintScope(const LVScope *Scope) const {
return patterns().printElement(Scope);
}
bool doPrintSymbol(const LVSymbol *Symbol) const {
return patterns().printElement(Symbol);
}
bool doPrintType(const LVType *Type) const {
return patterns().printElement(Type);
}
static LVReader &getInstance();
static void setInstance(LVReader *Reader);
void print(raw_ostream &OS) const;
virtual void printRecords(raw_ostream &OS) const {}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump() const { print(dbgs()); }
#endif
};
inline LVReader &getReader() { return LVReader::getInstance(); }
inline LVSplitContext &getReaderSplitContext() {
return getReader().getSplitContext();
}
inline LVScopeCompileUnit *getReaderCompileUnit() {
return getReader().getCompileUnit();
}
} // end namespace logicalview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVREADER_H
PK hwFZ_g�yv v ) DebugInfo/LogicalView/Core/LVStringPool.hnu �[��� //===-- LVStringPool.h ------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the LVStringPool class, which is used to implement a
// basic string pool table.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVSTRINGPOOL_H
#define LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVSTRINGPOOL_H
#include "llvm/ADT/StringMap.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include <iomanip>
#include <vector>
namespace llvm {
namespace logicalview {
class LVStringPool {
static constexpr size_t BadIndex = std::numeric_limits<size_t>::max();
using TableType = StringMap<size_t, BumpPtrAllocator>;
using ValueType = TableType::value_type;
BumpPtrAllocator Allocator;
TableType StringTable;
std::vector<ValueType *> Entries;
public:
LVStringPool() { getIndex(""); }
LVStringPool(LVStringPool const &other) = delete;
LVStringPool(LVStringPool &&other) = delete;
~LVStringPool() = default;
bool isValidIndex(size_t Index) const { return Index != BadIndex; }
// Return number of strings in the pool. The empty string is allocated
// at the slot zero. We substract 1 to indicate the number of non empty
// strings.
size_t getSize() const { return Entries.size() - 1; }
// Return the index for the specified key, otherwise 'BadIndex'.
size_t findIndex(StringRef Key) const {
TableType::const_iterator Iter = StringTable.find(Key);
if (Iter != StringTable.end())
return Iter->second;
return BadIndex;
}
// Return an index for the specified key.
size_t getIndex(StringRef Key) {
size_t Index = findIndex(Key);
if (isValidIndex(Index))
return Index;
size_t Value = Entries.size();
ValueType *Entry = ValueType::create(Key, Allocator, std::move(Value));
StringTable.insert(Entry);
Entries.push_back(Entry);
return Value;
}
// Given the index, return its corresponding string.
StringRef getString(size_t Index) const {
return (Index >= Entries.size()) ? StringRef() : Entries[Index]->getKey();
}
void print(raw_ostream &OS) const {
if (!Entries.empty()) {
OS << "\nString Pool:\n";
for (const ValueType *Entry : Entries)
OS << "Index: " << Entry->getValue() << ", "
<< "Key: '" << Entry->getKey() << "'\n";
}
}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump() const { print(dbgs()); }
#endif
};
} // namespace logicalview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVSTRINGPOOL_H
PK hwFZ��� # DebugInfo/LogicalView/Core/LVLine.hnu �[��� //===-- LVLine.h ------------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the LVLine class, which is used to describe a debug
// information line.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVLINE_H
#define LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVLINE_H
#include "llvm/DebugInfo/LogicalView/Core/LVElement.h"
namespace llvm {
namespace logicalview {
enum class LVLineKind {
IsBasicBlock,
IsDiscriminator,
IsEndSequence,
IsEpilogueBegin,
IsLineDebug,
IsLineAssembler,
IsNewStatement, // Shared with CodeView 'IsStatement' flag.
IsPrologueEnd,
IsAlwaysStepInto, // CodeView
IsNeverStepInto, // CodeView
LastEntry
};
using LVLineKindSet = std::set<LVLineKind>;
using LVLineDispatch = std::map<LVLineKind, LVLineGetFunction>;
using LVLineRequest = std::vector<LVLineGetFunction>;
// Class to represent a logical line.
class LVLine : public LVElement {
// Typed bitvector with kinds for this line.
LVProperties<LVLineKind> Kinds;
static LVLineDispatch Dispatch;
// Find the current line in the given 'Targets'.
LVLine *findIn(const LVLines *Targets) const;
public:
LVLine() : LVElement(LVSubclassID::LV_LINE) {
setIsLine();
setIncludeInPrint();
}
LVLine(const LVLine &) = delete;
LVLine &operator=(const LVLine &) = delete;
virtual ~LVLine() = default;
static bool classof(const LVElement *Element) {
return Element->getSubclassID() == LVSubclassID::LV_LINE;
}
KIND(LVLineKind, IsBasicBlock);
KIND(LVLineKind, IsDiscriminator);
KIND(LVLineKind, IsEndSequence);
KIND(LVLineKind, IsEpilogueBegin);
KIND(LVLineKind, IsLineDebug);
KIND(LVLineKind, IsLineAssembler);
KIND(LVLineKind, IsNewStatement);
KIND(LVLineKind, IsPrologueEnd);
KIND(LVLineKind, IsAlwaysStepInto);
KIND(LVLineKind, IsNeverStepInto);
const char *kind() const override;
// Use the offset to store the line address.
uint64_t getAddress() const { return getOffset(); }
void setAddress(uint64_t address) { setOffset(address); }
// String used for printing objects with no line number.
std::string noLineAsString(bool ShowZero = false) const override;
// Line number for display; in the case of Inlined Functions, we use the
// DW_AT_call_line attribute; otherwise use DW_AT_decl_line attribute.
std::string lineNumberAsString(bool ShowZero = false) const override {
return lineAsString(getLineNumber(), getDiscriminator(), ShowZero);
}
static LVLineDispatch &getDispatch() { return Dispatch; }
// Iterate through the 'References' set and check that all its elements
// are present in the 'Targets' set. For a missing element, mark its
// parents as missing.
static void markMissingParents(const LVLines *References,
const LVLines *Targets);
// Returns true if current line is logically equal to the given 'Line'.
virtual bool equals(const LVLine *Line) const;
// Returns true if the given 'References' are logically equal to the
// given 'Targets'.
static bool equals(const LVLines *References, const LVLines *Targets);
// Report the current line as missing or added during comparison.
void report(LVComparePass Pass) override;
void print(raw_ostream &OS, bool Full = true) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override {}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump() const override { print(dbgs()); }
#endif
};
// Class to represent a DWARF line record object.
class LVLineDebug final : public LVLine {
// Discriminator value (DW_LNE_set_discriminator). The DWARF standard
// defines the discriminator as an unsigned LEB128 integer.
uint32_t Discriminator = 0;
public:
LVLineDebug() : LVLine() { setIsLineDebug(); }
LVLineDebug(const LVLineDebug &) = delete;
LVLineDebug &operator=(const LVLineDebug &) = delete;
~LVLineDebug() = default;
// Additional line information. It includes attributes that describes
// states in the machine instructions (basic block, end prologue, etc).
std::string statesInfo(bool Formatted) const;
// Access DW_LNE_set_discriminator attribute.
uint32_t getDiscriminator() const override { return Discriminator; }
void setDiscriminator(uint32_t Value) override {
Discriminator = Value;
setIsDiscriminator();
}
// Returns true if current line is logically equal to the given 'Line'.
bool equals(const LVLine *Line) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
};
// Class to represent an assembler line extracted from the text section.
class LVLineAssembler final : public LVLine {
public:
LVLineAssembler() : LVLine() { setIsLineAssembler(); }
LVLineAssembler(const LVLineAssembler &) = delete;
LVLineAssembler &operator=(const LVLineAssembler &) = delete;
~LVLineAssembler() = default;
// Print blanks as the line number.
std::string noLineAsString(bool ShowZero) const override {
return std::string(8, ' ');
};
// Returns true if current line is logically equal to the given 'Line'.
bool equals(const LVLine *Line) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
};
} // end namespace logicalview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVLINE_H
PK hwFZj`�X�$ �$ # DebugInfo/LogicalView/Core/LVType.hnu �[��� //===-- LVType.h ------------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the LVType class, which is used to describe a debug
// information type.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVTYPE_H
#define LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVTYPE_H
#include "llvm/DebugInfo/LogicalView/Core/LVElement.h"
namespace llvm {
namespace logicalview {
enum class LVTypeKind {
IsBase,
IsConst,
IsEnumerator,
IsImport,
IsImportDeclaration,
IsImportModule,
IsPointer,
IsPointerMember,
IsReference,
IsRestrict,
IsRvalueReference,
IsSubrange,
IsTemplateParam,
IsTemplateTemplateParam,
IsTemplateTypeParam,
IsTemplateValueParam,
IsTypedef,
IsUnaligned,
IsUnspecified,
IsVolatile,
IsModifier, // CodeView - LF_MODIFIER
LastEntry
};
using LVTypeKindSelection = std::set<LVTypeKind>;
using LVTypeDispatch = std::map<LVTypeKind, LVTypeGetFunction>;
using LVTypeRequest = std::vector<LVTypeGetFunction>;
// Class to represent a DWARF Type.
class LVType : public LVElement {
enum class Property { IsSubrangeCount, LastEntry };
// Typed bitvector with kinds and properties for this type.
LVProperties<LVTypeKind> Kinds;
LVProperties<Property> Properties;
static LVTypeDispatch Dispatch;
// Find the current type in the given 'Targets'.
LVType *findIn(const LVTypes *Targets) const;
public:
LVType() : LVElement(LVSubclassID::LV_TYPE) { setIsType(); }
LVType(const LVType &) = delete;
LVType &operator=(const LVType &) = delete;
virtual ~LVType() = default;
static bool classof(const LVElement *Element) {
return Element->getSubclassID() == LVSubclassID::LV_TYPE;
}
KIND(LVTypeKind, IsBase);
KIND(LVTypeKind, IsConst);
KIND(LVTypeKind, IsEnumerator);
KIND(LVTypeKind, IsImport);
KIND_1(LVTypeKind, IsImportDeclaration, IsImport);
KIND_1(LVTypeKind, IsImportModule, IsImport);
KIND(LVTypeKind, IsPointer);
KIND(LVTypeKind, IsPointerMember);
KIND(LVTypeKind, IsReference);
KIND(LVTypeKind, IsRestrict);
KIND(LVTypeKind, IsRvalueReference);
KIND(LVTypeKind, IsSubrange);
KIND(LVTypeKind, IsTemplateParam);
KIND_1(LVTypeKind, IsTemplateTemplateParam, IsTemplateParam);
KIND_1(LVTypeKind, IsTemplateTypeParam, IsTemplateParam);
KIND_1(LVTypeKind, IsTemplateValueParam, IsTemplateParam);
KIND(LVTypeKind, IsTypedef);
KIND(LVTypeKind, IsUnaligned);
KIND(LVTypeKind, IsUnspecified);
KIND(LVTypeKind, IsVolatile);
KIND(LVTypeKind, IsModifier);
PROPERTY(Property, IsSubrangeCount);
const char *kind() const override;
// Follow a chain of references given by DW_AT_abstract_origin and/or
// DW_AT_specification and update the type name.
StringRef resolveReferencesChain();
bool isBase() const override { return getIsBase(); }
bool isTemplateParam() const override { return getIsTemplateParam(); }
// Encode the specific template argument.
virtual void encodeTemplateArgument(std::string &Name) const {}
// Return the underlying type for a type definition.
virtual LVElement *getUnderlyingType() { return nullptr; }
virtual void setUnderlyingType(LVElement *Element) {}
void resolveName() override;
void resolveReferences() override;
static LVTypeDispatch &getDispatch() { return Dispatch; }
static bool parametersMatch(const LVTypes *References,
const LVTypes *Targets);
static void getParameters(const LVTypes *Types, LVTypes *TypesParam,
LVScopes *ScopesParam);
// Iterate through the 'References' set and check that all its elements
// are present in the 'Targets' set. For a missing element, mark its
// parents as missing.
static void markMissingParents(const LVTypes *References,
const LVTypes *Targets);
// Returns true if current type is logically equal to the given 'Type'.
virtual bool equals(const LVType *Type) const;
// Returns true if the given 'References' are logically equal to the
// given 'Targets'.
static bool equals(const LVTypes *References, const LVTypes *Targets);
// Report the current type as missing or added during comparison.
void report(LVComparePass Pass) override;
void print(raw_ostream &OS, bool Full = true) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump() const override { print(dbgs()); }
#endif
};
// Class to represent DW_TAG_typedef_type.
class LVTypeDefinition final : public LVType {
public:
LVTypeDefinition() : LVType() {
setIsTypedef();
setIncludeInPrint();
}
LVTypeDefinition(const LVTypeDefinition &) = delete;
LVTypeDefinition &operator=(const LVTypeDefinition &) = delete;
~LVTypeDefinition() = default;
// Return the underlying type for a type definition.
LVElement *getUnderlyingType() override;
void setUnderlyingType(LVElement *Element) override { setType(Element); }
void resolveExtra() override;
// Returns true if current type is logically equal to the given 'Type'.
bool equals(const LVType *Type) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
};
// Class to represent a DW_TAG_enumerator.
class LVTypeEnumerator final : public LVType {
// Index in the String pool representing any initial value.
size_t ValueIndex = 0;
public:
LVTypeEnumerator() : LVType() {
setIsEnumerator();
setIncludeInPrint();
}
LVTypeEnumerator(const LVTypeEnumerator &) = delete;
LVTypeEnumerator &operator=(const LVTypeEnumerator &) = delete;
~LVTypeEnumerator() = default;
// Process the values for a DW_TAG_enumerator.
StringRef getValue() const override {
return getStringPool().getString(ValueIndex);
}
void setValue(StringRef Value) override {
ValueIndex = getStringPool().getIndex(Value);
}
size_t getValueIndex() const override { return ValueIndex; }
// Returns true if current type is logically equal to the given 'Type'.
bool equals(const LVType *Type) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
};
// Class to represent DW_TAG_imported_module / DW_TAG_imported_declaration.
class LVTypeImport final : public LVType {
public:
LVTypeImport() : LVType() { setIncludeInPrint(); }
LVTypeImport(const LVTypeImport &) = delete;
LVTypeImport &operator=(const LVTypeImport &) = delete;
~LVTypeImport() = default;
// Returns true if current type is logically equal to the given 'Type'.
bool equals(const LVType *Type) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
};
// Class to represent a DWARF Template parameter holder (type or param).
class LVTypeParam final : public LVType {
// Index in the String pool representing any initial value.
size_t ValueIndex = 0;
public:
LVTypeParam();
LVTypeParam(const LVTypeParam &) = delete;
LVTypeParam &operator=(const LVTypeParam &) = delete;
~LVTypeParam() = default;
// Template parameter value.
StringRef getValue() const override {
return getStringPool().getString(ValueIndex);
}
void setValue(StringRef Value) override {
ValueIndex = getStringPool().getIndex(Value);
}
size_t getValueIndex() const override { return ValueIndex; }
// Encode the specific template argument.
void encodeTemplateArgument(std::string &Name) const override;
// Returns true if current type is logically equal to the given 'Type'.
bool equals(const LVType *Type) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
};
// Class to represent a DW_TAG_subrange_type.
class LVTypeSubrange final : public LVType {
// Values describing the subrange bounds.
int64_t LowerBound = 0; // DW_AT_lower_bound or DW_AT_count value.
int64_t UpperBound = 0; // DW_AT_upper_bound value.
public:
LVTypeSubrange() : LVType() {
setIsSubrange();
setIncludeInPrint();
}
LVTypeSubrange(const LVTypeSubrange &) = delete;
LVTypeSubrange &operator=(const LVTypeSubrange &) = delete;
~LVTypeSubrange() = default;
int64_t getCount() const override {
return getIsSubrangeCount() ? LowerBound : 0;
}
void setCount(int64_t Value) override {
LowerBound = Value;
setIsSubrangeCount();
}
int64_t getLowerBound() const override { return LowerBound; }
void setLowerBound(int64_t Value) override { LowerBound = Value; }
int64_t getUpperBound() const override { return UpperBound; }
void setUpperBound(int64_t Value) override { UpperBound = Value; }
std::pair<unsigned, unsigned> getBounds() const override {
return {LowerBound, UpperBound};
}
void setBounds(unsigned Lower, unsigned Upper) override {
LowerBound = Lower;
UpperBound = Upper;
}
void resolveExtra() override;
// Returns true if current type is logically equal to the given 'Type'.
bool equals(const LVType *Type) const override;
void printExtra(raw_ostream &OS, bool Full = true) const override;
};
} // end namespace logicalview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVTYPE_H
PK hwFZ�$��\- \- % DebugInfo/LogicalView/Core/LVObject.hnu �[��� //===-- LVObject.h ----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the LVObject class, which is used to describe a debug
// information object.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVOBJECT_H
#define LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVOBJECT_H
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
#include "llvm/DebugInfo/LogicalView/Core/LVSupport.h"
#include <limits>
#include <list>
#include <map>
#include <string>
namespace llvm {
namespace dwarf {
// Support for CodeView ModifierOptions::Unaligned.
constexpr Tag DW_TAG_unaligned = Tag(dwarf::DW_TAG_hi_user + 1);
} // namespace dwarf
} // namespace llvm
namespace llvm {
namespace logicalview {
using LVSectionIndex = uint64_t;
using LVAddress = uint64_t;
using LVHalf = uint16_t;
using LVLevel = uint32_t;
using LVOffset = uint64_t;
using LVSigned = int64_t;
using LVUnsigned = uint64_t;
using LVSmall = uint8_t;
class LVElement;
class LVLine;
class LVLocation;
class LVLocationSymbol;
class LVObject;
class LVOperation;
class LVScope;
class LVSymbol;
class LVType;
class LVOptions;
class LVPatterns;
StringRef typeNone();
StringRef typeVoid();
StringRef typeInt();
StringRef typeUnknown();
StringRef emptyString();
using LVElementSetFunction = void (LVElement::*)();
using LVElementGetFunction = bool (LVElement::*)() const;
using LVLineSetFunction = void (LVLine::*)();
using LVLineGetFunction = bool (LVLine::*)() const;
using LVObjectSetFunction = void (LVObject::*)();
using LVObjectGetFunction = bool (LVObject::*)() const;
using LVScopeSetFunction = void (LVScope::*)();
using LVScopeGetFunction = bool (LVScope::*)() const;
using LVSymbolSetFunction = void (LVSymbol::*)();
using LVSymbolGetFunction = bool (LVSymbol::*)() const;
using LVTypeSetFunction = void (LVType::*)();
using LVTypeGetFunction = bool (LVType::*)() const;
using LVElements = SmallVector<LVElement *, 8>;
using LVLines = SmallVector<LVLine *, 8>;
using LVLocations = SmallVector<LVLocation *, 8>;
using LVOperations = SmallVector<LVOperation *, 8>;
using LVScopes = SmallVector<LVScope *, 8>;
using LVSymbols = SmallVector<LVSymbol *, 8>;
using LVTypes = SmallVector<LVType *, 8>;
using LVOffsets = SmallVector<LVOffset, 8>;
const LVAddress MaxAddress = std::numeric_limits<uint64_t>::max();
enum class LVBinaryType { NONE, ELF, COFF };
enum class LVComparePass { Missing, Added };
// Validate functions.
using LVValidLocation = bool (LVLocation::*)();
// Keep counters of objects.
struct LVCounter {
unsigned Lines = 0;
unsigned Scopes = 0;
unsigned Symbols = 0;
unsigned Types = 0;
void reset() {
Lines = 0;
Scopes = 0;
Symbols = 0;
Types = 0;
}
};
class LVObject {
enum class Property {
IsLocation, // Location.
IsGlobalReference, // This object is being referenced from another CU.
IsGeneratedName, // The Object name was generated.
IsResolved, // Object has been resolved.
IsResolvedName, // Object name has been resolved.
IsDiscarded, // Object has been stripped by the linker.
IsOptimized, // Object has been optimized by the compiler.
IsAdded, // Object has been 'added'.
IsMatched, // Object has been matched to a given pattern.
IsMissing, // Object is 'missing'.
IsMissingLink, // Object is indirectly 'missing'.
IsInCompare, // In 'compare' mode.
IsFileFromReference, // File ID from specification.
IsLineFromReference, // Line No from specification.
HasMoved, // The object was moved from 'target' to 'reference'.
HasPattern, // The object has a pattern.
IsFinalized, // CodeView object is finalized.
IsReferenced, // CodeView object being referenced.
HasCodeViewLocation, // CodeView object with debug location.
LastEntry
};
// Typed bitvector with properties for this object.
LVProperties<Property> Properties;
LVOffset Offset = 0;
uint32_t LineNumber = 0;
LVLevel ScopeLevel = 0;
union {
dwarf::Tag Tag;
dwarf::Attribute Attr;
LVSmall Opcode;
} TagAttrOpcode = {dwarf::DW_TAG_null};
// The parent of this object (nullptr if the root scope). For locations,
// the parent is a symbol object; otherwise it is a scope object.
union {
LVElement *Element;
LVScope *Scope;
LVSymbol *Symbol;
} Parent = {nullptr};
// We do not support any object duplication, as they are created by parsing
// the debug information. There is only the case where we need a very basic
// object, to manipulate its offset, line number and scope level. Allow the
// copy constructor to create that object; it is used to print a reference
// to another object and in the case of templates, to print its encoded args.
LVObject(const LVObject &Object) {
#ifndef NDEBUG
incID();
#endif
Properties = Object.Properties;
Offset = Object.Offset;
LineNumber = Object.LineNumber;
ScopeLevel = Object.ScopeLevel;
TagAttrOpcode = Object.TagAttrOpcode;
Parent = Object.Parent;
}
#ifndef NDEBUG
// This is an internal ID used for debugging logical elements. It is used
// for cases where an unique offset within the binary input file is not
// available.
static uint64_t GID;
uint64_t ID = 0;
void incID() {
++GID;
ID = GID;
}
#endif
protected:
// Get a string representation for the given number and discriminator.
std::string lineAsString(uint32_t LineNumber, LVHalf Discriminator,
bool ShowZero) const;
// Get a string representation for the given number.
std::string referenceAsString(uint32_t LineNumber, bool Spaces) const;
// Print the Filename or Pathname.
// Empty implementation for those objects that do not have any user
// source file references, such as debug locations.
virtual void printFileIndex(raw_ostream &OS, bool Full = true) const {}
public:
LVObject() {
#ifndef NDEBUG
incID();
#endif
};
LVObject &operator=(const LVObject &) = delete;
virtual ~LVObject() = default;
PROPERTY(Property, IsLocation);
PROPERTY(Property, IsGlobalReference);
PROPERTY(Property, IsGeneratedName);
PROPERTY(Property, IsResolved);
PROPERTY(Property, IsResolvedName);
PROPERTY(Property, IsDiscarded);
PROPERTY(Property, IsOptimized);
PROPERTY(Property, IsAdded);
PROPERTY(Property, IsMatched);
PROPERTY(Property, IsMissing);
PROPERTY(Property, IsMissingLink);
PROPERTY(Property, IsInCompare);
PROPERTY(Property, IsFileFromReference);
PROPERTY(Property, IsLineFromReference);
PROPERTY(Property, HasMoved);
PROPERTY(Property, HasPattern);
PROPERTY(Property, IsFinalized);
PROPERTY(Property, IsReferenced);
PROPERTY(Property, HasCodeViewLocation);
// True if the scope has been named or typed or with line number.
virtual bool isNamed() const { return false; }
virtual bool isTyped() const { return false; }
virtual bool isFiled() const { return false; }
bool isLined() const { return LineNumber != 0; }
// DWARF tag, attribute or expression opcode.
dwarf::Tag getTag() const { return TagAttrOpcode.Tag; }
void setTag(dwarf::Tag Tag) { TagAttrOpcode.Tag = Tag; }
dwarf::Attribute getAttr() const { return TagAttrOpcode.Attr; }
void setAttr(dwarf::Attribute Attr) { TagAttrOpcode.Attr = Attr; }
LVSmall getOpcode() const { return TagAttrOpcode.Opcode; }
void setOpcode(LVSmall Opcode) { TagAttrOpcode.Opcode = Opcode; }
// DIE offset.
LVOffset getOffset() const { return Offset; }
void setOffset(LVOffset DieOffset) { Offset = DieOffset; }
// Level where this object is located.
LVLevel getLevel() const { return ScopeLevel; }
void setLevel(LVLevel Level) { ScopeLevel = Level; }
virtual StringRef getName() const { return StringRef(); }
virtual void setName(StringRef ObjectName) {}
LVElement *getParent() const {
assert((!Parent.Element ||
(Parent.Element && static_cast<LVElement *>(Parent.Element))) &&
"Invalid element");
return Parent.Element;
}
LVScope *getParentScope() const {
assert((!Parent.Scope ||
(Parent.Scope && static_cast<LVScope *>(Parent.Scope))) &&
"Invalid scope");
return Parent.Scope;
}
LVSymbol *getParentSymbol() const {
assert((!Parent.Symbol ||
(Parent.Symbol && static_cast<LVSymbol *>(Parent.Symbol))) &&
"Invalid symbol");
return Parent.Symbol;
}
void setParent(LVScope *Scope);
void setParent(LVSymbol *Symbol);
void resetParent() { Parent = {nullptr}; }
virtual LVAddress getLowerAddress() const { return 0; }
virtual void setLowerAddress(LVAddress Address) {}
virtual LVAddress getUpperAddress() const { return 0; }
virtual void setUpperAddress(LVAddress Address) {}
uint32_t getLineNumber() const { return LineNumber; }
void setLineNumber(uint32_t Number) { LineNumber = Number; }
virtual const char *kind() const { return nullptr; }
std::string indentAsString() const;
std::string indentAsString(LVLevel Level) const;
// String used as padding for printing objects with no line number.
virtual std::string noLineAsString(bool ShowZero) const;
// Line number for display; in the case of inlined functions, we use the
// DW_AT_call_line attribute; otherwise use DW_AT_decl_line attribute.
virtual std::string lineNumberAsString(bool ShowZero = false) const {
return lineAsString(getLineNumber(), 0, ShowZero);
}
std::string lineNumberAsStringStripped(bool ShowZero = false) const;
// This function prints the logical view to an output stream.
// Split: Prints the compilation unit view to a file.
// Match: Prints the object only if it satisfies the patterns collected
// from the command line. See the '--select' option.
// Print: Print the object only if satisfies the conditions specified by
// the different '--print' options.
// Full: Prints full information for objects representing debug locations,
// aggregated scopes, compile unit, functions and namespaces.
virtual Error doPrint(bool Split, bool Match, bool Print, raw_ostream &OS,
bool Full = true) const;
void printAttributes(raw_ostream &OS, bool Full = true) const;
void printAttributes(raw_ostream &OS, bool Full, StringRef Name,
LVObject *Parent, StringRef Value,
bool UseQuotes = false, bool PrintRef = false) const;
// Mark branch as missing (current element and parents).
void markBranchAsMissing();
// Prints the common information for an object (name, type, etc).
virtual void print(raw_ostream &OS, bool Full = true) const;
// Prints additional information for an object, depending on its kind
// (class attributes, debug ranges, files, directories, etc).
virtual void printExtra(raw_ostream &OS, bool Full = true) const {}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
virtual void dump() const { print(dbgs()); }
#endif
uint64_t getID() const {
return
#ifndef NDEBUG
ID;
#else
0;
#endif
}
};
} // end namespace logicalview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_CORE_LVOBJECT_H
PK hwFZw+%!W$ W$ 0 DebugInfo/LogicalView/Readers/LVCodeViewReader.hnu �[��� //===-- LVCodeViewReader.h --------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the LVCodeViewReader class, which is used to describe a
// debug information (COFF) reader.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_READERS_CODEVIEWREADER_H
#define LLVM_DEBUGINFO_LOGICALVIEW_READERS_CODEVIEWREADER_H
#include "llvm/DebugInfo/CodeView/AppendingTypeTableBuilder.h"
#include "llvm/DebugInfo/CodeView/DebugInlineeLinesSubsection.h"
#include "llvm/DebugInfo/CodeView/DebugLinesSubsection.h"
#include "llvm/DebugInfo/CodeView/DebugStringTableSubsection.h"
#include "llvm/DebugInfo/CodeView/TypeRecord.h"
#include "llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h"
#include "llvm/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.h"
#include "llvm/DebugInfo/PDB/Native/NativeSession.h"
#include "llvm/DebugInfo/PDB/PDB.h"
#include "llvm/Support/BinaryByteStream.h"
#include "llvm/Support/BinaryItemStream.h"
#include "llvm/Support/BinaryStreamArray.h"
namespace llvm {
template <> struct BinaryItemTraits<codeview::CVType> {
static size_t length(const codeview::CVType &Item) { return Item.length(); }
static ArrayRef<uint8_t> bytes(const codeview::CVType &Item) {
return Item.data();
}
};
namespace codeview {
class LazyRandomTypeCollection;
}
namespace object {
struct coff_section;
}
namespace pdb {
class SymbolGroup;
}
namespace logicalview {
class LVElement;
class LVLine;
class LVScope;
class LVScopeCompileUnit;
class LVSymbol;
class LVType;
class LVTypeVisitor;
class LVSymbolVisitor;
class LVSymbolVisitorDelegate;
using LVNames = SmallVector<StringRef, 16>;
// The ELF reader uses the DWARF constants to create the logical elements.
// The DW_TAG_* and DW_AT_* are used to select the logical object and to
// set specific attributes, such as name, type, etc.
// As the CodeView constants are different to the DWARF constants, the
// CodeView reader will map them to the DWARF ones.
class LVCodeViewReader final : public LVBinaryReader {
friend class LVTypeVisitor;
friend class LVSymbolVisitor;
friend class LVSymbolVisitorDelegate;
using LVModules = std::vector<LVScope *>;
LVModules Modules;
// Encapsulates access to the input file and any dependent type server,
// including any precompiled header object.
llvm::pdb::InputFile Input;
std::shared_ptr<llvm::pdb::InputFile> TypeServer;
std::shared_ptr<LazyRandomTypeCollection> PrecompHeader;
// Persistance data when loading a type server.
ErrorOr<std::unique_ptr<MemoryBuffer>> BuffOrErr = nullptr;
std::unique_ptr<MemoryBuffer> MemBuffer;
std::unique_ptr<llvm::pdb::IPDBSession> Session;
std::unique_ptr<llvm::pdb::NativeSession> PdbSession;
// Persistance data when loading a precompiled header.
BumpPtrAllocator BuilderAllocator;
std::unique_ptr<AppendingTypeTableBuilder> Builder;
std::unique_ptr<BinaryItemStream<CVType>> ItemStream;
std::unique_ptr<BinaryStreamReader> ReaderPrecomp;
std::vector<CVType> TypeArray;
CVTypeArray TypeStream;
CVTypeArray CVTypesPrecomp;
// Persistance data when loading an executable file.
std::unique_ptr<MemoryBuffer> BinaryBuffer;
std::unique_ptr<llvm::object::Binary> BinaryExecutable;
Error loadTargetInfo(const object::ObjectFile &Obj);
Error loadTargetInfo(const llvm::pdb::PDBFile &Pdb);
void mapRangeAddress(const object::ObjectFile &Obj,
const object::SectionRef &Section,
bool IsComdat) override;
llvm::object::COFFObjectFile &getObj() { return Input.obj(); }
llvm::pdb::PDBFile &getPdb() { return Input.pdb(); }
bool isObj() const { return Input.isObj(); }
bool isPdb() const { return Input.isPdb(); }
StringRef getFileName() { return Input.getFilePath(); }
// Pathname to executable image.
std::string ExePath;
LVOffset CurrentOffset = 0;
int32_t CurrentModule = -1;
using RelocMapTy = DenseMap<const llvm::object::coff_section *,
std::vector<llvm::object::RelocationRef>>;
RelocMapTy RelocMap;
// Object files have only one type stream that contains both types and ids.
// Precompiled header objects don't contain an IPI stream. Use the TPI.
LazyRandomTypeCollection &types() {
return TypeServer ? TypeServer->types()
: (PrecompHeader ? *PrecompHeader : Input.types());
}
LazyRandomTypeCollection &ids() {
return TypeServer ? TypeServer->ids()
: (PrecompHeader ? *PrecompHeader : Input.ids());
}
LVLogicalVisitor LogicalVisitor;
Expected<StringRef>
getFileNameForFileOffset(uint32_t FileOffset,
const llvm::pdb::SymbolGroup *SG = nullptr);
void printRelocatedField(StringRef Label,
const llvm::object::coff_section *CoffSection,
uint32_t RelocOffset, uint32_t Offset,
StringRef *RelocSym);
Error printFileNameForOffset(StringRef Label, uint32_t FileOffset,
const llvm::pdb::SymbolGroup *SG = nullptr);
Error loadPrecompiledObject(PrecompRecord &Precomp, CVTypeArray &CVTypesObj);
Error loadTypeServer(TypeServer2Record &TS);
Error traverseTypes(llvm::pdb::PDBFile &Pdb, LazyRandomTypeCollection &Types,
LazyRandomTypeCollection &Ids);
Error collectInlineeInfo(DebugInlineeLinesSubsectionRef &Lines,
const llvm::pdb::SymbolGroup *SG = nullptr);
void cacheRelocations();
Error resolveSymbol(const llvm::object::coff_section *CoffSection,
uint64_t Offset, llvm::object::SymbolRef &Sym);
Error resolveSymbolName(const llvm::object::coff_section *CoffSection,
uint64_t Offset, StringRef &Name);
Error traverseTypeSection(StringRef SectionName,
const llvm::object::SectionRef &Section);
Error traverseSymbolSection(StringRef SectionName,
const llvm::object::SectionRef &Section);
Error traverseInlineeLines(StringRef Subsection);
DebugChecksumsSubsectionRef CVFileChecksumTable;
DebugStringTableSubsectionRef CVStringTable;
Error traverseSymbolsSubsection(StringRef Subsection,
const llvm::object::SectionRef &Section,
StringRef SectionContents);
/// Given a .debug$S section, find the string table and file checksum table.
/// This function taken from (COFFDumper.cpp).
/// TODO: It can be moved to the COFF library.
Error initializeFileAndStringTables(BinaryStreamReader &Reader);
Error createLines(const FixedStreamArray<LineNumberEntry> &LineNumbers,
LVAddress Addendum, uint32_t Segment, uint32_t Begin,
uint32_t Size, uint32_t NameIndex,
const llvm::pdb::SymbolGroup *SG = nullptr);
Error createScopes(llvm::object::COFFObjectFile &Obj);
Error createScopes(llvm::pdb::PDBFile &Pdb);
Error processModule();
protected:
Error createScopes() override;
void sortScopes() override;
public:
LVCodeViewReader() = delete;
LVCodeViewReader(StringRef Filename, StringRef FileFormatName,
llvm::object::COFFObjectFile &Obj, ScopedPrinter &W,
StringRef ExePath)
: LVBinaryReader(Filename, FileFormatName, W, LVBinaryType::COFF),
Input(&Obj), ExePath(ExePath), LogicalVisitor(this, W, Input) {}
LVCodeViewReader(StringRef Filename, StringRef FileFormatName,
llvm::pdb::PDBFile &Pdb, ScopedPrinter &W, StringRef ExePath)
: LVBinaryReader(Filename, FileFormatName, W, LVBinaryType::COFF),
Input(&Pdb), ExePath(ExePath), LogicalVisitor(this, W, Input) {}
LVCodeViewReader(const LVCodeViewReader &) = delete;
LVCodeViewReader &operator=(const LVCodeViewReader &) = delete;
~LVCodeViewReader() = default;
void getLinkageName(const llvm::object::coff_section *CoffSection,
uint32_t RelocOffset, uint32_t Offset,
StringRef *RelocSym);
void addModule(LVScope *Scope) { Modules.push_back(Scope); }
LVScope *getScopeForModule(uint32_t Modi) {
return Modi >= Modules.size() ? nullptr : Modules[Modi];
}
// Get the string representation for the CodeView symbols.
static StringRef getSymbolKindName(SymbolKind Kind);
static std::string formatRegisterId(RegisterId Register, CPUType CPU);
std::string getRegisterName(LVSmall Opcode,
ArrayRef<uint64_t> Operands) override;
bool isSystemEntry(LVElement *Element, StringRef Name) const override;
void print(raw_ostream &OS) const;
void printRecords(raw_ostream &OS) const override {
LogicalVisitor.printRecords(OS);
};
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump() const { print(dbgs()); }
#endif
};
} // end namespace logicalview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_READERS_CODEVIEWREADER_H
PK hwFZ� "� � . DebugInfo/LogicalView/Readers/LVBinaryReader.hnu �[��� //===-- LVBinaryReader.h ----------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the LVBinaryReader class, which is used to describe a
// binary reader.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_READERS_LVBINARYREADER_H
#define LLVM_DEBUGINFO_LOGICALVIEW_READERS_LVBINARYREADER_H
#include "llvm/DebugInfo/LogicalView/Core/LVReader.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCInstPrinter.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCObjectFileInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Object/COFF.h"
#include "llvm/Object/ObjectFile.h"
namespace llvm {
namespace logicalview {
constexpr bool UpdateHighAddress = false;
// Logical scope, Section address, Section index, IsComdat.
struct LVSymbolTableEntry final {
LVScope *Scope = nullptr;
LVAddress Address = 0;
LVSectionIndex SectionIndex = 0;
bool IsComdat = false;
LVSymbolTableEntry() = default;
LVSymbolTableEntry(LVScope *Scope, LVAddress Address,
LVSectionIndex SectionIndex, bool IsComdat)
: Scope(Scope), Address(Address), SectionIndex(SectionIndex),
IsComdat(IsComdat) {}
};
// Function names extracted from the object symbol table.
class LVSymbolTable final {
using LVSymbolNames = std::map<std::string, LVSymbolTableEntry>;
LVSymbolNames SymbolNames;
public:
LVSymbolTable() = default;
void add(StringRef Name, LVScope *Function, LVSectionIndex SectionIndex = 0);
void add(StringRef Name, LVAddress Address, LVSectionIndex SectionIndex,
bool IsComdat);
LVSectionIndex update(LVScope *Function);
const LVSymbolTableEntry &getEntry(StringRef Name);
LVAddress getAddress(StringRef Name);
LVSectionIndex getIndex(StringRef Name);
bool getIsComdat(StringRef Name);
void print(raw_ostream &OS);
};
class LVBinaryReader : public LVReader {
// Function names extracted from the object symbol table.
LVSymbolTable SymbolTable;
// It contains the LVLineDebug elements representing the inlined logical
// lines for the current compile unit, created by parsing the CodeView
// S_INLINESITE symbol annotation data.
using LVInlineeLine = std::map<LVScope *, std::unique_ptr<LVLines>>;
LVInlineeLine CUInlineeLines;
// Instruction lines for a logical scope. These instructions are fetched
// during its merge with the debug lines.
LVDoubleMap<LVSectionIndex, LVScope *, LVLines *> ScopeInstructions;
// Links the scope with its first assembler address line.
LVDoubleMap<LVSectionIndex, LVAddress, LVScope *> AssemblerMappings;
// Mapping from virtual address to section.
// The virtual address refers to the address where the section is loaded.
using LVSectionAddresses = std::map<LVSectionIndex, object::SectionRef>;
LVSectionAddresses SectionAddresses;
void addSectionAddress(const object::SectionRef &Section) {
if (SectionAddresses.find(Section.getAddress()) == SectionAddresses.end())
SectionAddresses.emplace(Section.getAddress(), Section);
}
// Scopes with ranges for current compile unit. It is used to find a line
// giving its exact or closest address. To support comdat functions, all
// addresses for the same section are recorded in the same map.
using LVSectionRanges = std::map<LVSectionIndex, std::unique_ptr<LVRange>>;
LVSectionRanges SectionRanges;
// Image base and virtual address for Executable file.
uint64_t ImageBaseAddress = 0;
uint64_t VirtualAddress = 0;
// Object sections with machine code.
using LVSections = std::map<LVSectionIndex, object::SectionRef>;
LVSections Sections;
std::vector<std::unique_ptr<LVLines>> DiscoveredLines;
protected:
// It contains the LVLineDebug elements representing the logical lines for
// the current compile unit, created by parsing the debug line section.
LVLines CULines;
std::unique_ptr<const MCRegisterInfo> MRI;
std::unique_ptr<const MCAsmInfo> MAI;
std::unique_ptr<const MCSubtargetInfo> STI;
std::unique_ptr<const MCInstrInfo> MII;
std::unique_ptr<const MCDisassembler> MD;
std::unique_ptr<MCContext> MC;
std::unique_ptr<MCInstPrinter> MIP;
// Loads all info for the architecture of the provided object file.
Error loadGenericTargetInfo(StringRef TheTriple, StringRef TheFeatures);
virtual void mapRangeAddress(const object::ObjectFile &Obj) {}
virtual void mapRangeAddress(const object::ObjectFile &Obj,
const object::SectionRef &Section,
bool IsComdat) {}
// Create a mapping from virtual address to section.
void mapVirtualAddress(const object::ObjectFile &Obj);
void mapVirtualAddress(const object::COFFObjectFile &COFFObj);
Expected<std::pair<LVSectionIndex, object::SectionRef>>
getSection(LVScope *Scope, LVAddress Address, LVSectionIndex SectionIndex);
void addSectionRange(LVSectionIndex SectionIndex, LVScope *Scope);
void addSectionRange(LVSectionIndex SectionIndex, LVScope *Scope,
LVAddress LowerAddress, LVAddress UpperAddress);
LVRange *getSectionRanges(LVSectionIndex SectionIndex);
void includeInlineeLines(LVSectionIndex SectionIndex, LVScope *Function);
Error createInstructions();
Error createInstructions(LVScope *Function, LVSectionIndex SectionIndex);
Error createInstructions(LVScope *Function, LVSectionIndex SectionIndex,
const LVNameInfo &NameInfo);
void processLines(LVLines *DebugLines, LVSectionIndex SectionIndex);
void processLines(LVLines *DebugLines, LVSectionIndex SectionIndex,
LVScope *Function);
public:
LVBinaryReader() = delete;
LVBinaryReader(StringRef Filename, StringRef FileFormatName, ScopedPrinter &W,
LVBinaryType BinaryType)
: LVReader(Filename, FileFormatName, W, BinaryType) {}
LVBinaryReader(const LVBinaryReader &) = delete;
LVBinaryReader &operator=(const LVBinaryReader &) = delete;
virtual ~LVBinaryReader() = default;
void addInlineeLines(LVScope *Scope, LVLines &Lines) {
CUInlineeLines.emplace(Scope, std::make_unique<LVLines>(std::move(Lines)));
}
// Convert Segment::Offset pair to absolute address.
LVAddress linearAddress(uint16_t Segment, uint32_t Offset,
LVAddress Addendum = 0) {
return ImageBaseAddress + (Segment * VirtualAddress) + Offset + Addendum;
}
void addToSymbolTable(StringRef Name, LVScope *Function,
LVSectionIndex SectionIndex = 0);
void addToSymbolTable(StringRef Name, LVAddress Address,
LVSectionIndex SectionIndex, bool IsComdat);
LVSectionIndex updateSymbolTable(LVScope *Function);
const LVSymbolTableEntry &getSymbolTableEntry(StringRef Name);
LVAddress getSymbolTableAddress(StringRef Name);
LVSectionIndex getSymbolTableIndex(StringRef Name);
bool getSymbolTableIsComdat(StringRef Name);
LVSectionIndex getSectionIndex(LVScope *Scope) override {
return Scope ? getSymbolTableIndex(Scope->getLinkageName())
: DotTextSectionIndex;
}
void print(raw_ostream &OS) const;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump() const { print(dbgs()); }
#endif
};
} // end namespace logicalview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_READERS_LVBINARYREADER_H
PK hwFZ���HO HO 1 DebugInfo/LogicalView/Readers/LVCodeViewVisitor.hnu �[��� //===-- LVCodeViewVisitor.h -------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the LVCodeViewVisitor class, which is used to describe a
// debug information (CodeView) visitor.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_READERS_CODEVIEWVISITOR_H
#define LLVM_DEBUGINFO_LOGICALVIEW_READERS_CODEVIEWVISITOR_H
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/iterator.h"
#include "llvm/DebugInfo/CodeView/SymbolDumpDelegate.h"
#include "llvm/DebugInfo/CodeView/SymbolVisitorCallbacks.h"
#include "llvm/DebugInfo/CodeView/TypeDeserializer.h"
#include "llvm/DebugInfo/CodeView/TypeVisitorCallbacks.h"
#include "llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h"
#include "llvm/DebugInfo/PDB/Native/InputFile.h"
#include "llvm/Object/Binary.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/Support/Error.h"
#include <stack>
#include <utility>
namespace llvm {
namespace logicalview {
using namespace llvm::codeview;
class LVCodeViewReader;
class LVLogicalVisitor;
struct LVShared;
class LVTypeVisitor final : public TypeVisitorCallbacks {
ScopedPrinter &W;
LVLogicalVisitor *LogicalVisitor;
LazyRandomTypeCollection &Types;
LazyRandomTypeCollection &Ids;
uint32_t StreamIdx;
LVShared *Shared = nullptr;
// In a PDB, a type index may refer to a type (TPI) or an item ID (IPI).
// In a COFF or PDB (/Z7), the type index always refer to a type (TPI).
// When creating logical elements, we must access the correct element
// table, while searching for a type index.
bool HasIds = false;
// Current type index during the types traversal.
TypeIndex CurrentTypeIndex = TypeIndex::None();
void printTypeIndex(StringRef FieldName, TypeIndex TI,
uint32_t StreamIdx) const;
public:
LVTypeVisitor(ScopedPrinter &W, LVLogicalVisitor *LogicalVisitor,
LazyRandomTypeCollection &Types, LazyRandomTypeCollection &Ids,
uint32_t StreamIdx, LVShared *Shared)
: TypeVisitorCallbacks(), W(W), LogicalVisitor(LogicalVisitor),
Types(Types), Ids(Ids), StreamIdx(StreamIdx), Shared(Shared) {
HasIds = &Types != &Ids;
}
Error visitTypeBegin(CVType &Record) override;
Error visitTypeBegin(CVType &Record, TypeIndex TI) override;
Error visitMemberBegin(CVMemberRecord &Record) override;
Error visitMemberEnd(CVMemberRecord &Record) override;
Error visitUnknownMember(CVMemberRecord &Record) override;
Error visitKnownRecord(CVType &Record, BuildInfoRecord &Args) override;
Error visitKnownRecord(CVType &Record, ClassRecord &Class) override;
Error visitKnownRecord(CVType &Record, EnumRecord &Enum) override;
Error visitKnownRecord(CVType &Record, FuncIdRecord &Func) override;
Error visitKnownRecord(CVType &Record, ProcedureRecord &Proc) override;
Error visitKnownRecord(CVType &Record, StringIdRecord &String) override;
Error visitKnownRecord(CVType &Record, UdtSourceLineRecord &Line) override;
Error visitKnownRecord(CVType &Record, UnionRecord &Union) override;
Error visitUnknownType(CVType &Record) override;
};
class LVSymbolVisitorDelegate final : public SymbolVisitorDelegate {
LVCodeViewReader *Reader;
const llvm::object::coff_section *CoffSection;
StringRef SectionContents;
public:
LVSymbolVisitorDelegate(LVCodeViewReader *Reader,
const llvm::object::SectionRef &Section,
const llvm::object::COFFObjectFile *Obj,
StringRef SectionContents)
: Reader(Reader), SectionContents(SectionContents) {
CoffSection = Obj->getCOFFSection(Section);
}
uint32_t getRecordOffset(BinaryStreamReader Reader) override {
ArrayRef<uint8_t> Data;
if (Error Err = Reader.readLongestContiguousChunk(Data)) {
llvm::consumeError(std::move(Err));
return 0;
}
return Data.data() - SectionContents.bytes_begin();
}
void printRelocatedField(StringRef Label, uint32_t RelocOffset,
uint32_t Offset, StringRef *RelocSym = nullptr);
void getLinkageName(uint32_t RelocOffset, uint32_t Offset,
StringRef *RelocSym = nullptr);
StringRef getFileNameForFileOffset(uint32_t FileOffset) override;
DebugStringTableSubsectionRef getStringTable() override;
};
class LVElement;
class LVScope;
class LVSymbol;
class LVType;
// Visitor for CodeView symbol streams found in COFF object files and PDB files.
class LVSymbolVisitor final : public SymbolVisitorCallbacks {
LVCodeViewReader *Reader;
ScopedPrinter &W;
LVLogicalVisitor *LogicalVisitor;
LazyRandomTypeCollection &Types;
LazyRandomTypeCollection &Ids;
LVSymbolVisitorDelegate *ObjDelegate;
LVShared *Shared;
// Symbol offset when processing PDB streams.
uint32_t CurrentOffset = 0;
// Current object name collected from S_OBJNAME.
StringRef CurrentObjectName;
// Last symbol processed by S_LOCAL.
LVSymbol *LocalSymbol = nullptr;
bool HasIds;
bool InFunctionScope = false;
bool IsCompileUnit = false;
// Register for the locals and parameters symbols in the current frame.
RegisterId LocalFrameRegister = RegisterId::NONE;
RegisterId ParamFrameRegister = RegisterId::NONE;
void printLocalVariableAddrRange(const LocalVariableAddrRange &Range,
uint32_t RelocationOffset);
void printLocalVariableAddrGap(ArrayRef<LocalVariableAddrGap> Gaps);
void printTypeIndex(StringRef FieldName, TypeIndex TI) const;
// Return true if this symbol is a Compile Unit.
bool symbolIsCompileUnit(SymbolKind Kind) {
switch (Kind) {
case SymbolKind::S_COMPILE2:
case SymbolKind::S_COMPILE3:
return true;
default:
return false;
}
}
// Determine symbol kind (local or parameter).
void determineSymbolKind(LVSymbol *Symbol, RegisterId Register) {
if (Register == LocalFrameRegister) {
Symbol->setIsVariable();
return;
}
if (Register == ParamFrameRegister) {
Symbol->setIsParameter();
return;
}
// Assume is a variable.
Symbol->setIsVariable();
}
public:
LVSymbolVisitor(LVCodeViewReader *Reader, ScopedPrinter &W,
LVLogicalVisitor *LogicalVisitor,
LazyRandomTypeCollection &Types,
LazyRandomTypeCollection &Ids,
LVSymbolVisitorDelegate *ObjDelegate, LVShared *Shared)
: Reader(Reader), W(W), LogicalVisitor(LogicalVisitor), Types(Types),
Ids(Ids), ObjDelegate(ObjDelegate), Shared(Shared) {
HasIds = &Types != &Ids;
}
Error visitSymbolBegin(CVSymbol &Record) override;
Error visitSymbolBegin(CVSymbol &Record, uint32_t Offset) override;
Error visitSymbolEnd(CVSymbol &Record) override;
Error visitUnknownSymbol(CVSymbol &Record) override;
Error visitKnownRecord(CVSymbol &Record, BlockSym &Block) override;
Error visitKnownRecord(CVSymbol &Record, BPRelativeSym &Local) override;
Error visitKnownRecord(CVSymbol &Record, BuildInfoSym &BuildInfo) override;
Error visitKnownRecord(CVSymbol &Record, Compile2Sym &Compile2) override;
Error visitKnownRecord(CVSymbol &Record, Compile3Sym &Compile3) override;
Error visitKnownRecord(CVSymbol &Record, ConstantSym &Constant) override;
Error visitKnownRecord(CVSymbol &Record, DataSym &Data) override;
Error visitKnownRecord(CVSymbol &Record,
DefRangeFramePointerRelFullScopeSym
&DefRangeFramePointerRelFullScope) override;
Error visitKnownRecord(
CVSymbol &Record,
DefRangeFramePointerRelSym &DefRangeFramePointerRel) override;
Error visitKnownRecord(CVSymbol &Record,
DefRangeRegisterRelSym &DefRangeRegisterRel) override;
Error visitKnownRecord(CVSymbol &Record,
DefRangeRegisterSym &DefRangeRegister) override;
Error visitKnownRecord(
CVSymbol &Record,
DefRangeSubfieldRegisterSym &DefRangeSubfieldRegister) override;
Error visitKnownRecord(CVSymbol &Record,
DefRangeSubfieldSym &DefRangeSubfield) override;
Error visitKnownRecord(CVSymbol &Record, DefRangeSym &DefRange) override;
Error visitKnownRecord(CVSymbol &Record, FrameProcSym &FrameProc) override;
Error visitKnownRecord(CVSymbol &Record, InlineSiteSym &InlineSite) override;
Error visitKnownRecord(CVSymbol &Record, LocalSym &Local) override;
Error visitKnownRecord(CVSymbol &Record, ObjNameSym &ObjName) override;
Error visitKnownRecord(CVSymbol &Record, ProcSym &Proc) override;
Error visitKnownRecord(CVSymbol &Record, RegRelativeSym &Local) override;
Error visitKnownRecord(CVSymbol &Record, ScopeEndSym &ScopeEnd) override;
Error visitKnownRecord(CVSymbol &Record, Thunk32Sym &Thunk) override;
Error visitKnownRecord(CVSymbol &Record, UDTSym &UDT) override;
Error visitKnownRecord(CVSymbol &Record, UsingNamespaceSym &UN) override;
};
// Visitor for CodeView types and symbols to populate elements.
class LVLogicalVisitor final {
LVCodeViewReader *Reader;
ScopedPrinter &W;
// Encapsulates access to the input file and any dependent type server,
// including any precompiled header object.
llvm::pdb::InputFile &Input;
std::shared_ptr<llvm::pdb::InputFile> TypeServer = nullptr;
std::shared_ptr<LazyRandomTypeCollection> PrecompHeader = nullptr;
std::shared_ptr<LVShared> Shared;
// Object files have only one type stream that contains both types and ids.
// Precompiled header objects don't contain an IPI stream. Use the TPI.
LazyRandomTypeCollection &types() {
return TypeServer ? TypeServer->types()
: (PrecompHeader ? *PrecompHeader : Input.types());
}
LazyRandomTypeCollection &ids() {
return TypeServer ? TypeServer->ids()
: (PrecompHeader ? *PrecompHeader : Input.ids());
}
using LVScopeStack = std::stack<LVScope *>;
LVScopeStack ScopeStack;
LVScope *ReaderParent = nullptr;
LVScope *ReaderScope = nullptr;
bool InCompileUnitScope = false;
// Allow processing of argument list.
bool ProcessArgumentList = false;
StringRef OverloadedMethodName;
std::string CompileUnitName;
// Inlined functions source information.
using LVInlineeEntry = std::pair<uint32_t, StringRef>;
using LVInlineeInfo = std::map<TypeIndex, LVInlineeEntry>;
LVInlineeInfo InlineeInfo;
Error visitFieldListMemberStream(TypeIndex TI, LVElement *Element,
ArrayRef<uint8_t> FieldList);
LVType *createBaseType(TypeIndex TI, StringRef TypeName);
LVType *createPointerType(TypeIndex TI, StringRef TypeName);
LVSymbol *createParameter(TypeIndex TI, StringRef Name, LVScope *Parent);
LVSymbol *createParameter(LVElement *Element, StringRef Name,
LVScope *Parent);
void createDataMember(CVMemberRecord &Record, LVScope *Parent, StringRef Name,
TypeIndex Type, MemberAccess Access);
void createParents(StringRef ScopedName, LVElement *Element);
public:
LVLogicalVisitor(LVCodeViewReader *Reader, ScopedPrinter &W,
llvm::pdb::InputFile &Input);
// Current elements during the processing of a RecordType or RecordSymbol.
// They are shared with the SymbolVisitor.
LVElement *CurrentElement = nullptr;
LVScope *CurrentScope = nullptr;
LVSymbol *CurrentSymbol = nullptr;
LVType *CurrentType = nullptr;
// Input source in the case of type server or precompiled header.
void setInput(std::shared_ptr<llvm::pdb::InputFile> TypeServer) {
this->TypeServer = TypeServer;
}
void setInput(std::shared_ptr<LazyRandomTypeCollection> PrecompHeader) {
this->PrecompHeader = PrecompHeader;
}
void addInlineeInfo(TypeIndex TI, uint32_t LineNumber, StringRef Filename) {
InlineeInfo.emplace(std::piecewise_construct, std::forward_as_tuple(TI),
std::forward_as_tuple(LineNumber, Filename));
}
void printTypeIndex(StringRef FieldName, TypeIndex TI, uint32_t StreamIdx);
void printMemberAttributes(MemberAttributes Attrs);
void printMemberAttributes(MemberAccess Access, MethodKind Kind,
MethodOptions Options);
LVElement *createElement(TypeLeafKind Kind);
LVElement *createElement(SymbolKind Kind);
LVElement *createElement(TypeIndex TI, TypeLeafKind Kind);
// Break down the annotation byte code and calculate code and line offsets.
Error inlineSiteAnnotation(LVScope *AbstractFunction,
LVScope *InlinedFunction,
InlineSiteSym &InlineSite);
void pushScope(LVScope *Scope) {
ScopeStack.push(ReaderParent);
ReaderParent = ReaderScope;
ReaderScope = Scope;
}
void popScope() {
ReaderScope = ReaderParent;
ReaderParent = ScopeStack.top();
ScopeStack.pop();
}
void closeScope() {
if (InCompileUnitScope) {
InCompileUnitScope = false;
popScope();
}
}
void setRoot(LVScope *Root) { ReaderScope = Root; }
void addElement(LVScope *Scope, bool IsCompileUnit);
void addElement(LVSymbol *Symbol);
void addElement(LVType *Type);
std::string getCompileUnitName() { return CompileUnitName; }
void setCompileUnitName(std::string Name) {
CompileUnitName = std::move(Name);
}
LVElement *getElement(uint32_t StreamIdx, TypeIndex TI,
LVScope *Parent = nullptr);
LVShared *getShared() { return Shared.get(); }
LVScope *getReaderScope() const { return ReaderScope; }
void printTypeBegin(CVType &Record, TypeIndex TI, LVElement *Element,
uint32_t StreamIdx);
void printTypeEnd(CVType &Record);
void printMemberBegin(CVMemberRecord &Record, TypeIndex TI,
LVElement *Element, uint32_t StreamIdx);
void printMemberEnd(CVMemberRecord &Record);
void startProcessArgumentList() { ProcessArgumentList = true; }
void stopProcessArgumentList() { ProcessArgumentList = false; }
void processFiles();
void processLines();
void processNamespaces();
void printRecords(raw_ostream &OS) const;
Error visitUnknownType(CVType &Record, TypeIndex TI);
Error visitKnownRecord(CVType &Record, ArgListRecord &Args, TypeIndex TI,
LVElement *Element);
Error visitKnownRecord(CVType &Record, ArrayRecord &AT, TypeIndex TI,
LVElement *Element);
Error visitKnownRecord(CVType &Record, BitFieldRecord &BF, TypeIndex TI,
LVElement *Element);
Error visitKnownRecord(CVType &Record, BuildInfoRecord &BI, TypeIndex TI,
LVElement *Element);
Error visitKnownRecord(CVType &Record, ClassRecord &Class, TypeIndex TI,
LVElement *Element);
Error visitKnownRecord(CVType &Record, EnumRecord &Enum, TypeIndex TI,
LVElement *Element);
Error visitKnownRecord(CVType &Record, FieldListRecord &FieldList,
TypeIndex TI, LVElement *Element);
Error visitKnownRecord(CVType &Record, FuncIdRecord &Func, TypeIndex TI,
LVElement *Element);
Error visitKnownRecord(CVType &Record, LabelRecord &LR, TypeIndex TI,
LVElement *Element);
Error visitKnownRecord(CVType &Record, ModifierRecord &Mod, TypeIndex TI,
LVElement *Element);
Error visitKnownRecord(CVType &Record, MemberFuncIdRecord &Id, TypeIndex TI,
LVElement *Element);
Error visitKnownRecord(CVType &Record, MemberFunctionRecord &MF, TypeIndex TI,
LVElement *Element);
Error visitKnownRecord(CVType &Record, MethodOverloadListRecord &Overloads,
TypeIndex TI, LVElement *Element);
Error visitKnownRecord(CVType &Record, PointerRecord &Ptr, TypeIndex TI,
LVElement *Element);
Error visitKnownRecord(CVType &Record, ProcedureRecord &Proc, TypeIndex TI,
LVElement *Element);
Error visitKnownRecord(CVType &Record, UnionRecord &Union, TypeIndex TI,
LVElement *Element);
Error visitKnownRecord(CVType &Record, TypeServer2Record &TS, TypeIndex TI,
LVElement *Element);
Error visitKnownRecord(CVType &Record, VFTableRecord &VFT, TypeIndex TI,
LVElement *Element);
Error visitKnownRecord(CVType &Record, VFTableShapeRecord &Shape,
TypeIndex TI, LVElement *Element);
Error visitKnownRecord(CVType &Record, StringListRecord &Strings,
TypeIndex TI, LVElement *Element);
Error visitKnownRecord(CVType &Record, StringIdRecord &String, TypeIndex TI,
LVElement *Element);
Error visitKnownRecord(CVType &Record, UdtSourceLineRecord &SourceLine,
TypeIndex TI, LVElement *Element);
Error visitKnownRecord(CVType &Record, UdtModSourceLineRecord &ModSourceLine,
TypeIndex TI, LVElement *Element);
Error visitKnownRecord(CVType &Record, PrecompRecord &Precomp, TypeIndex TI,
LVElement *Element);
Error visitKnownRecord(CVType &Record, EndPrecompRecord &EndPrecomp,
TypeIndex TI, LVElement *Element);
Error visitUnknownMember(CVMemberRecord &Record, TypeIndex TI);
Error visitKnownMember(CVMemberRecord &Record, BaseClassRecord &Base,
TypeIndex TI, LVElement *Element);
Error visitKnownMember(CVMemberRecord &Record, DataMemberRecord &Field,
TypeIndex TI, LVElement *Element);
Error visitKnownMember(CVMemberRecord &Record, EnumeratorRecord &Enum,
TypeIndex TI, LVElement *Element);
Error visitKnownMember(CVMemberRecord &Record, ListContinuationRecord &Cont,
TypeIndex TI, LVElement *Element);
Error visitKnownMember(CVMemberRecord &Record, NestedTypeRecord &Nested,
TypeIndex TI, LVElement *Element);
Error visitKnownMember(CVMemberRecord &Record, OneMethodRecord &Method,
TypeIndex TI, LVElement *Element);
Error visitKnownMember(CVMemberRecord &Record, OverloadedMethodRecord &Method,
TypeIndex TI, LVElement *Element);
Error visitKnownMember(CVMemberRecord &Record, StaticDataMemberRecord &Field,
TypeIndex TI, LVElement *Element);
Error visitKnownMember(CVMemberRecord &Record, VFPtrRecord &VFTable,
TypeIndex TI, LVElement *Element);
Error visitKnownMember(CVMemberRecord &Record, VirtualBaseClassRecord &Base,
TypeIndex TI, LVElement *Element);
template <typename T>
Error visitKnownMember(CVMemberRecord &Record,
TypeVisitorCallbacks &Callbacks, TypeIndex TI,
LVElement *Element) {
TypeRecordKind RK = static_cast<TypeRecordKind>(Record.Kind);
T KnownRecord(RK);
if (Error Err = Callbacks.visitKnownMember(Record, KnownRecord))
return Err;
if (Error Err = visitKnownMember(Record, KnownRecord, TI, Element))
return Err;
return Error::success();
}
template <typename T>
Error visitKnownRecord(CVType &Record, TypeIndex TI, LVElement *Element) {
TypeRecordKind RK = static_cast<TypeRecordKind>(Record.kind());
T KnownRecord(RK);
if (Error Err = TypeDeserializer::deserializeAs(
const_cast<CVType &>(Record), KnownRecord))
return Err;
if (Error Err = visitKnownRecord(Record, KnownRecord, TI, Element))
return Err;
return Error::success();
}
Error visitMemberRecord(CVMemberRecord &Record,
TypeVisitorCallbacks &Callbacks, TypeIndex TI,
LVElement *Element);
Error finishVisitation(CVType &Record, TypeIndex TI, LVElement *Element);
};
} // namespace logicalview
} // namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_READERS_CODEVIEWVISITOR_H
PK hwFZ;� � + DebugInfo/LogicalView/Readers/LVELFReader.hnu �[��� //===-- LVELFReader.h -------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the LVELFReader class, which is used to describe a
// debug information (DWARF) reader.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_READERS_LVELFREADER_H
#define LLVM_DEBUGINFO_LOGICALVIEW_READERS_LVELFREADER_H
#include "llvm/DebugInfo/DWARF/DWARFAbbreviationDeclaration.h"
#include "llvm/DebugInfo/DWARF/DWARFContext.h"
#include "llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h"
#include <unordered_set>
namespace llvm {
namespace logicalview {
class LVElement;
class LVLine;
class LVScopeCompileUnit;
class LVSymbol;
class LVType;
using AttributeSpec = DWARFAbbreviationDeclaration::AttributeSpec;
class LVELFReader final : public LVBinaryReader {
object::ObjectFile &Obj;
// Indicates if ranges data are available; in the case of split DWARF any
// reference to ranges is valid only if the skeleton DIE has been loaded.
bool RangesDataAvailable = false;
LVAddress CUBaseAddress = 0;
LVAddress CUHighAddress = 0;
// Current elements during the processing of a DIE.
LVElement *CurrentElement = nullptr;
LVScope *CurrentScope = nullptr;
LVSymbol *CurrentSymbol = nullptr;
LVType *CurrentType = nullptr;
LVOffset CurrentOffset = 0;
LVOffset CurrentEndOffset = 0;
// In DWARF v4, the files are 1-indexed.
// In DWARF v5, the files are 0-indexed.
// The ELF reader expects the indexes as 1-indexed.
bool IncrementFileIndex = false;
// Address ranges collected for current DIE.
std::vector<LVAddressRange> CurrentRanges;
// Symbols with locations for current compile unit.
LVSymbols SymbolsWithLocations;
// Global Offsets (Offset, Element).
LVOffsetElementMap GlobalOffsets;
// Low PC and High PC values for DIE being processed.
LVAddress CurrentLowPC = 0;
LVAddress CurrentHighPC = 0;
bool FoundLowPC = false;
bool FoundHighPC = false;
// Cross references (Elements).
using LVElementSet = std::unordered_set<LVElement *>;
struct LVElementEntry {
LVElement *Element;
LVElementSet References;
LVElementSet Types;
LVElementEntry(LVElement *Element = nullptr) : Element(Element) {}
};
using LVElementReference = std::unordered_map<LVOffset, LVElementEntry>;
LVElementReference ElementTable;
Error loadTargetInfo(const object::ObjectFile &Obj);
void mapRangeAddress(const object::ObjectFile &Obj) override;
LVElement *createElement(dwarf::Tag Tag);
void traverseDieAndChildren(DWARFDie &DIE, LVScope *Parent,
DWARFDie &SkeletonDie);
// Process the attributes for the given DIE.
LVScope *processOneDie(const DWARFDie &InputDIE, LVScope *Parent,
DWARFDie &SkeletonDie);
void processOneAttribute(const DWARFDie &Die, LVOffset *OffsetPtr,
const AttributeSpec &AttrSpec);
void createLineAndFileRecords(const DWARFDebugLine::LineTable *Lines);
void processLocationGaps();
// Add offset to global map.
void addGlobalOffset(LVOffset Offset) {
if (GlobalOffsets.find(Offset) == GlobalOffsets.end())
// Just associate the DIE offset with a null element, as we do not
// know if the referenced element has been created.
GlobalOffsets.emplace(Offset, nullptr);
}
// Remove offset from global map.
void removeGlobalOffset(LVOffset Offset) {
LVOffsetElementMap::iterator Iter = GlobalOffsets.find(Offset);
if (Iter != GlobalOffsets.end())
GlobalOffsets.erase(Iter);
}
// Get the location information for DW_AT_data_member_location.
void processLocationMember(dwarf::Attribute Attr,
const DWARFFormValue &FormValue,
const DWARFDie &Die, uint64_t OffsetOnEntry);
void processLocationList(dwarf::Attribute Attr,
const DWARFFormValue &FormValue, const DWARFDie &Die,
uint64_t OffsetOnEntry,
bool CallSiteLocation = false);
void updateReference(dwarf::Attribute Attr, const DWARFFormValue &FormValue);
// Get an element given the DIE offset.
LVElement *getElementForOffset(LVOffset offset, LVElement *Element,
bool IsType);
protected:
Error createScopes() override;
void sortScopes() override;
public:
LVELFReader() = delete;
LVELFReader(StringRef Filename, StringRef FileFormatName,
object::ObjectFile &Obj, ScopedPrinter &W)
: LVBinaryReader(Filename, FileFormatName, W, LVBinaryType::ELF),
Obj(Obj) {}
LVELFReader(const LVELFReader &) = delete;
LVELFReader &operator=(const LVELFReader &) = delete;
~LVELFReader() = default;
LVAddress getCUBaseAddress() const { return CUBaseAddress; }
void setCUBaseAddress(LVAddress Address) { CUBaseAddress = Address; }
LVAddress getCUHighAddress() const { return CUHighAddress; }
void setCUHighAddress(LVAddress Address) { CUHighAddress = Address; }
const LVSymbols &GetSymbolsWithLocations() const {
return SymbolsWithLocations;
}
std::string getRegisterName(LVSmall Opcode,
ArrayRef<uint64_t> Operands) override;
void print(raw_ostream &OS) const;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump() const { print(dbgs()); }
#endif
};
} // end namespace logicalview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_READERS_LVELFREADER_H
PK hwFZ���
�
' DebugInfo/LogicalView/LVReaderHandler.hnu �[��� //===-- LVReaderHandler.h ---------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This class implements the Reader handler.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_LOGICALVIEW_READERS_LVREADERHANDLER_H
#define LLVM_DEBUGINFO_LOGICALVIEW_READERS_LVREADERHANDLER_H
#include "llvm/ADT/PointerUnion.h"
#include "llvm/DebugInfo/LogicalView/Core/LVReader.h"
#include "llvm/DebugInfo/PDB/Native/PDBFile.h"
#include "llvm/Object/Archive.h"
#include "llvm/Object/MachOUniversal.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/Support/ScopedPrinter.h"
#include <string>
#include <vector>
namespace llvm {
namespace logicalview {
using LVReaders = std::vector<std::unique_ptr<LVReader>>;
using ArgVector = std::vector<std::string>;
using PdbOrObj = PointerUnion<object::ObjectFile *, pdb::PDBFile *>;
// This class performs the following tasks:
// - Creates a logical reader for every binary file in the command line,
// that parses the debug information and creates a high level logical
// view representation containing scopes, symbols, types and lines.
// - Prints and compares the logical views.
//
// The supported binary formats are: ELF, Mach-O and CodeView.
class LVReaderHandler {
ArgVector &Objects;
ScopedPrinter &W;
raw_ostream &OS;
LVReaders TheReaders;
Error createReaders();
Error printReaders();
Error compareReaders();
Error handleArchive(LVReaders &Readers, StringRef Filename,
object::Archive &Arch);
Error handleBuffer(LVReaders &Readers, StringRef Filename,
MemoryBufferRef Buffer, StringRef ExePath = {});
Error handleFile(LVReaders &Readers, StringRef Filename,
StringRef ExePath = {});
Error handleMach(LVReaders &Readers, StringRef Filename,
object::MachOUniversalBinary &Mach);
Error handleObject(LVReaders &Readers, StringRef Filename,
object::Binary &Binary);
Error handleObject(LVReaders &Readers, StringRef Filename, StringRef Buffer,
StringRef ExePath);
Error createReader(StringRef Filename, LVReaders &Readers, PdbOrObj &Input,
StringRef FileFormatName, StringRef ExePath = {});
public:
LVReaderHandler() = delete;
LVReaderHandler(ArgVector &Objects, ScopedPrinter &W,
LVOptions &ReaderOptions)
: Objects(Objects), W(W), OS(W.getOStream()) {
setOptions(&ReaderOptions);
}
LVReaderHandler(const LVReaderHandler &) = delete;
LVReaderHandler &operator=(const LVReaderHandler &) = delete;
Error createReader(StringRef Filename, LVReaders &Readers) {
return handleFile(Readers, Filename);
}
Error process();
Expected<std::unique_ptr<LVReader>> createReader(StringRef Pathname) {
LVReaders Readers;
if (Error Err = createReader(Pathname, Readers))
return std::move(Err);
return std::move(Readers[0]);
}
void print(raw_ostream &OS) const;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump() const { print(dbgs()); }
#endif
};
} // end namespace logicalview
} // namespace llvm
#endif // LLVM_DEBUGINFO_LOGICALVIEW_READERS_LVREADERHANDLER_H
PK hwFZM��+ �+ DebugInfo/DIContext.hnu �[��� //===- DIContext.h ----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines DIContext, an abstract data structure that holds
// debug information data.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_DICONTEXT_H
#define LLVM_DEBUGINFO_DICONTEXT_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/Support/WithColor.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <cstdint>
#include <memory>
#include <optional>
#include <string>
#include <tuple>
#include <utility>
namespace llvm {
/// A format-neutral container for source line information.
struct DILineInfo {
// DILineInfo contains "<invalid>" for function/filename it cannot fetch.
static constexpr const char *const BadString = "<invalid>";
// Use "??" instead of "<invalid>" to make our output closer to addr2line.
static constexpr const char *const Addr2LineBadString = "??";
std::string FileName;
std::string FunctionName;
std::string StartFileName;
// Full source corresponding to `FileName`
std::optional<StringRef> Source;
// Source code for this particular line
// (in case if `Source` is not available)
std::optional<StringRef> LineSource;
uint32_t Line = 0;
uint32_t Column = 0;
uint32_t StartLine = 0;
std::optional<uint64_t> StartAddress;
// DWARF-specific.
uint32_t Discriminator = 0;
DILineInfo()
: FileName(BadString), FunctionName(BadString), StartFileName(BadString) {
}
bool operator==(const DILineInfo &RHS) const {
return Line == RHS.Line && Column == RHS.Column &&
FileName == RHS.FileName && FunctionName == RHS.FunctionName &&
StartFileName == RHS.StartFileName && StartLine == RHS.StartLine &&
Discriminator == RHS.Discriminator;
}
bool operator!=(const DILineInfo &RHS) const { return !(*this == RHS); }
bool operator<(const DILineInfo &RHS) const {
return std::tie(FileName, FunctionName, StartFileName, Line, Column,
StartLine, Discriminator) <
std::tie(RHS.FileName, RHS.FunctionName, RHS.StartFileName, RHS.Line,
RHS.Column, RHS.StartLine, RHS.Discriminator);
}
explicit operator bool() const { return *this != DILineInfo(); }
void dump(raw_ostream &OS) {
OS << "Line info: ";
if (FileName != BadString)
OS << "file '" << FileName << "', ";
if (FunctionName != BadString)
OS << "function '" << FunctionName << "', ";
OS << "line " << Line << ", ";
OS << "column " << Column << ", ";
if (StartFileName != BadString)
OS << "start file '" << StartFileName << "', ";
OS << "start line " << StartLine << '\n';
}
};
using DILineInfoTable = SmallVector<std::pair<uint64_t, DILineInfo>, 16>;
/// A format-neutral container for inlined code description.
class DIInliningInfo {
SmallVector<DILineInfo, 4> Frames;
public:
DIInliningInfo() = default;
/// Returns the frame at `Index`. Frames are stored in bottom-up
/// (leaf-to-root) order with increasing index.
const DILineInfo &getFrame(unsigned Index) const {
assert(Index < Frames.size());
return Frames[Index];
}
DILineInfo *getMutableFrame(unsigned Index) {
assert(Index < Frames.size());
return &Frames[Index];
}
uint32_t getNumberOfFrames() const { return Frames.size(); }
void addFrame(const DILineInfo &Frame) { Frames.push_back(Frame); }
void resize(unsigned i) { Frames.resize(i); }
};
/// Container for description of a global variable.
struct DIGlobal {
std::string Name;
uint64_t Start = 0;
uint64_t Size = 0;
std::string DeclFile;
uint64_t DeclLine = 0;
DIGlobal() : Name(DILineInfo::BadString) {}
};
struct DILocal {
std::string FunctionName;
std::string Name;
std::string DeclFile;
uint64_t DeclLine = 0;
std::optional<int64_t> FrameOffset;
std::optional<uint64_t> Size;
std::optional<uint64_t> TagOffset;
};
/// A DINameKind is passed to name search methods to specify a
/// preference regarding the type of name resolution the caller wants.
enum class DINameKind { None, ShortName, LinkageName };
/// Controls which fields of DILineInfo container should be filled
/// with data.
struct DILineInfoSpecifier {
enum class FileLineInfoKind {
None,
// RawValue is whatever the compiler stored in the filename table. Could be
// a full path, could be something else.
RawValue,
BaseNameOnly,
// Relative to the compilation directory.
RelativeFilePath,
AbsoluteFilePath
};
using FunctionNameKind = DINameKind;
FileLineInfoKind FLIKind;
FunctionNameKind FNKind;
DILineInfoSpecifier(FileLineInfoKind FLIKind = FileLineInfoKind::RawValue,
FunctionNameKind FNKind = FunctionNameKind::None)
: FLIKind(FLIKind), FNKind(FNKind) {}
inline bool operator==(const DILineInfoSpecifier &RHS) const {
return FLIKind == RHS.FLIKind && FNKind == RHS.FNKind;
}
};
/// This is just a helper to programmatically construct DIDumpType.
enum DIDumpTypeCounter {
#define HANDLE_DWARF_SECTION(ENUM_NAME, ELF_NAME, CMDLINE_NAME, OPTION) \
DIDT_ID_##ENUM_NAME,
#include "llvm/BinaryFormat/Dwarf.def"
#undef HANDLE_DWARF_SECTION
DIDT_ID_UUID,
DIDT_ID_Count
};
static_assert(DIDT_ID_Count <= 32, "section types overflow storage");
/// Selects which debug sections get dumped.
enum DIDumpType : unsigned {
DIDT_Null,
DIDT_All = ~0U,
#define HANDLE_DWARF_SECTION(ENUM_NAME, ELF_NAME, CMDLINE_NAME, OPTION) \
DIDT_##ENUM_NAME = 1U << DIDT_ID_##ENUM_NAME,
#include "llvm/BinaryFormat/Dwarf.def"
#undef HANDLE_DWARF_SECTION
DIDT_UUID = 1 << DIDT_ID_UUID,
};
/// Container for dump options that control which debug information will be
/// dumped.
struct DIDumpOptions {
unsigned DumpType = DIDT_All;
unsigned ChildRecurseDepth = -1U;
unsigned ParentRecurseDepth = -1U;
uint16_t Version = 0; // DWARF version to assume when extracting.
uint8_t AddrSize = 4; // Address byte size to assume when extracting.
bool ShowAddresses = true;
bool ShowChildren = false;
bool ShowParents = false;
bool ShowForm = false;
bool SummarizeTypes = false;
bool Verbose = false;
bool DisplayRawContents = false;
bool IsEH = false;
std::function<llvm::StringRef(uint64_t DwarfRegNum, bool IsEH)>
GetNameForDWARFReg;
/// Return default option set for printing a single DIE without children.
static DIDumpOptions getForSingleDIE() {
DIDumpOptions Opts;
Opts.ChildRecurseDepth = 0;
Opts.ParentRecurseDepth = 0;
return Opts;
}
/// Return the options with RecurseDepth set to 0 unless explicitly required.
DIDumpOptions noImplicitRecursion() const {
DIDumpOptions Opts = *this;
if (ChildRecurseDepth == -1U && !ShowChildren)
Opts.ChildRecurseDepth = 0;
if (ParentRecurseDepth == -1U && !ShowParents)
Opts.ParentRecurseDepth = 0;
return Opts;
}
std::function<void(Error)> RecoverableErrorHandler =
WithColor::defaultErrorHandler;
std::function<void(Error)> WarningHandler = WithColor::defaultWarningHandler;
};
class DIContext {
public:
enum DIContextKind { CK_DWARF, CK_PDB, CK_BTF };
DIContext(DIContextKind K) : Kind(K) {}
virtual ~DIContext() = default;
DIContextKind getKind() const { return Kind; }
virtual void dump(raw_ostream &OS, DIDumpOptions DumpOpts) = 0;
virtual bool verify(raw_ostream &OS, DIDumpOptions DumpOpts = {}) {
// No verifier? Just say things went well.
return true;
}
virtual DILineInfo getLineInfoForAddress(
object::SectionedAddress Address,
DILineInfoSpecifier Specifier = DILineInfoSpecifier()) = 0;
virtual DILineInfo
getLineInfoForDataAddress(object::SectionedAddress Address) = 0;
virtual DILineInfoTable getLineInfoForAddressRange(
object::SectionedAddress Address, uint64_t Size,
DILineInfoSpecifier Specifier = DILineInfoSpecifier()) = 0;
virtual DIInliningInfo getInliningInfoForAddress(
object::SectionedAddress Address,
DILineInfoSpecifier Specifier = DILineInfoSpecifier()) = 0;
virtual std::vector<DILocal>
getLocalsForAddress(object::SectionedAddress Address) = 0;
private:
const DIContextKind Kind;
};
/// An inferface for inquiring the load address of a loaded object file
/// to be used by the DIContext implementations when applying relocations
/// on the fly.
class LoadedObjectInfo {
protected:
LoadedObjectInfo() = default;
LoadedObjectInfo(const LoadedObjectInfo &) = default;
public:
virtual ~LoadedObjectInfo() = default;
/// Obtain the Load Address of a section by SectionRef.
///
/// Calculate the address of the given section.
/// The section need not be present in the local address space. The addresses
/// need to be consistent with the addresses used to query the DIContext and
/// the output of this function should be deterministic, i.e. repeated calls
/// with the same Sec should give the same address.
virtual uint64_t getSectionLoadAddress(const object::SectionRef &Sec) const {
return 0;
}
/// If conveniently available, return the content of the given Section.
///
/// When the section is available in the local address space, in relocated
/// (loaded) form, e.g. because it was relocated by a JIT for execution, this
/// function should provide the contents of said section in `Data`. If the
/// loaded section is not available, or the cost of retrieving it would be
/// prohibitive, this function should return false. In that case, relocations
/// will be read from the local (unrelocated) object file and applied on the
/// fly. Note that this method is used purely for optimzation purposes in the
/// common case of JITting in the local address space, so returning false
/// should always be correct.
virtual bool getLoadedSectionContents(const object::SectionRef &Sec,
StringRef &Data) const {
return false;
}
// FIXME: This is untested and unused anywhere in the LLVM project, it's
// used/needed by Julia (an external project). It should have some coverage
// (at least tests, but ideally example functionality).
/// Obtain a copy of this LoadedObjectInfo.
virtual std::unique_ptr<LoadedObjectInfo> clone() const = 0;
};
template <typename Derived, typename Base = LoadedObjectInfo>
struct LoadedObjectInfoHelper : Base {
protected:
LoadedObjectInfoHelper(const LoadedObjectInfoHelper &) = default;
LoadedObjectInfoHelper() = default;
public:
template <typename... Ts>
LoadedObjectInfoHelper(Ts &&...Args) : Base(std::forward<Ts>(Args)...) {}
std::unique_ptr<llvm::LoadedObjectInfo> clone() const override {
return std::make_unique<Derived>(static_cast<const Derived &>(*this));
}
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_DICONTEXT_H
PK hwFZ%zZnF nF DebugInfo/CodeView/CodeView.hnu �[��� //===- CodeView.h -----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Defines constants and basic types describing CodeView debug information.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_CODEVIEW_H
#define LLVM_DEBUGINFO_CODEVIEW_CODEVIEW_H
#include <cinttypes>
#include <type_traits>
#include "llvm/Support/Endian.h"
namespace llvm {
namespace codeview {
/// Distinguishes individual records in .debug$T or .debug$P section or PDB type
/// stream. The documentation and headers talk about this as the "leaf" type.
enum class TypeRecordKind : uint16_t {
#define TYPE_RECORD(lf_ename, value, name) name = value,
#include "CodeViewTypes.def"
};
/// Duplicate copy of the above enum, but using the official CV names. Useful
/// for reference purposes and when dealing with unknown record types.
enum TypeLeafKind : uint16_t {
#define CV_TYPE(name, val) name = val,
#include "CodeViewTypes.def"
};
/// Distinguishes individual records in the Symbols subsection of a .debug$S
/// section. Equivalent to SYM_ENUM_e in cvinfo.h.
enum class SymbolRecordKind : uint16_t {
#define SYMBOL_RECORD(lf_ename, value, name) name = value,
#include "CodeViewSymbols.def"
};
/// Duplicate copy of the above enum, but using the official CV names. Useful
/// for reference purposes and when dealing with unknown record types.
enum SymbolKind : uint16_t {
#define CV_SYMBOL(name, val) name = val,
#include "CodeViewSymbols.def"
};
#define CV_DEFINE_ENUM_CLASS_FLAGS_OPERATORS(Class) \
inline Class operator|(Class a, Class b) { \
return static_cast<Class>(static_cast<std::underlying_type_t<Class>>(a) | \
static_cast<std::underlying_type_t<Class>>(b)); \
} \
inline Class operator&(Class a, Class b) { \
return static_cast<Class>(static_cast<std::underlying_type_t<Class>>(a) & \
static_cast<std::underlying_type_t<Class>>(b)); \
} \
inline Class operator~(Class a) { \
return static_cast<Class>(~static_cast<std::underlying_type_t<Class>>(a)); \
} \
inline Class &operator|=(Class &a, Class b) { \
a = a | b; \
return a; \
} \
inline Class &operator&=(Class &a, Class b) { \
a = a & b; \
return a; \
}
/// These values correspond to the CV_CPU_TYPE_e enumeration, and are documented
/// here: https://msdn.microsoft.com/en-us/library/b2fc64ek.aspx
enum class CPUType : uint16_t {
Intel8080 = 0x0,
Intel8086 = 0x1,
Intel80286 = 0x2,
Intel80386 = 0x3,
Intel80486 = 0x4,
Pentium = 0x5,
PentiumPro = 0x6,
Pentium3 = 0x7,
MIPS = 0x10,
MIPS16 = 0x11,
MIPS32 = 0x12,
MIPS64 = 0x13,
MIPSI = 0x14,
MIPSII = 0x15,
MIPSIII = 0x16,
MIPSIV = 0x17,
MIPSV = 0x18,
M68000 = 0x20,
M68010 = 0x21,
M68020 = 0x22,
M68030 = 0x23,
M68040 = 0x24,
Alpha = 0x30,
Alpha21164 = 0x31,
Alpha21164A = 0x32,
Alpha21264 = 0x33,
Alpha21364 = 0x34,
PPC601 = 0x40,
PPC603 = 0x41,
PPC604 = 0x42,
PPC620 = 0x43,
PPCFP = 0x44,
PPCBE = 0x45,
SH3 = 0x50,
SH3E = 0x51,
SH3DSP = 0x52,
SH4 = 0x53,
SHMedia = 0x54,
ARM3 = 0x60,
ARM4 = 0x61,
ARM4T = 0x62,
ARM5 = 0x63,
ARM5T = 0x64,
ARM6 = 0x65,
ARM_XMAC = 0x66,
ARM_WMMX = 0x67,
ARM7 = 0x68,
Omni = 0x70,
Ia64 = 0x80,
Ia64_2 = 0x81,
CEE = 0x90,
AM33 = 0xa0,
M32R = 0xb0,
TriCore = 0xc0,
X64 = 0xd0,
EBC = 0xe0,
Thumb = 0xf0,
ARMNT = 0xf4,
ARM64 = 0xf6,
HybridX86ARM64 = 0xf7,
ARM64EC = 0xf8,
ARM64X = 0xf9,
D3D11_Shader = 0x100,
};
/// These values correspond to the CV_CFL_LANG enumeration in the Microsoft
/// Debug Interface Access SDK
enum SourceLanguage : uint8_t {
C = 0x00,
Cpp = 0x01,
Fortran = 0x02,
Masm = 0x03,
Pascal = 0x04,
Basic = 0x05,
Cobol = 0x06,
Link = 0x07,
Cvtres = 0x08,
Cvtpgd = 0x09,
CSharp = 0x0a,
VB = 0x0b,
ILAsm = 0x0c,
Java = 0x0d,
JScript = 0x0e,
MSIL = 0x0f,
HLSL = 0x10,
ObjC = 0x11,
ObjCpp = 0x12,
Rust = 0x15,
/// The DMD & Swift compilers emit 'D' and 'S', respectively, for the CV
/// source language. Microsoft does not have enumerators for them yet.
D = 'D',
Swift = 'S',
};
/// These values correspond to the CV_call_e enumeration, and are documented
/// at the following locations:
/// https://msdn.microsoft.com/en-us/library/b2fc64ek.aspx
/// https://msdn.microsoft.com/en-us/library/windows/desktop/ms680207(v=vs.85).aspx
///
enum class CallingConvention : uint8_t {
NearC = 0x00, // near right to left push, caller pops stack
FarC = 0x01, // far right to left push, caller pops stack
NearPascal = 0x02, // near left to right push, callee pops stack
FarPascal = 0x03, // far left to right push, callee pops stack
NearFast = 0x04, // near left to right push with regs, callee pops stack
FarFast = 0x05, // far left to right push with regs, callee pops stack
NearStdCall = 0x07, // near standard call
FarStdCall = 0x08, // far standard call
NearSysCall = 0x09, // near sys call
FarSysCall = 0x0a, // far sys call
ThisCall = 0x0b, // this call (this passed in register)
MipsCall = 0x0c, // Mips call
Generic = 0x0d, // Generic call sequence
AlphaCall = 0x0e, // Alpha call
PpcCall = 0x0f, // PPC call
SHCall = 0x10, // Hitachi SuperH call
ArmCall = 0x11, // ARM call
AM33Call = 0x12, // AM33 call
TriCall = 0x13, // TriCore Call
SH5Call = 0x14, // Hitachi SuperH-5 call
M32RCall = 0x15, // M32R Call
ClrCall = 0x16, // clr call
Inline =
0x17, // Marker for routines always inlined and thus lacking a convention
NearVector = 0x18 // near left to right push with regs, callee pops stack
};
enum class ClassOptions : uint16_t {
None = 0x0000,
Packed = 0x0001,
HasConstructorOrDestructor = 0x0002,
HasOverloadedOperator = 0x0004,
Nested = 0x0008,
ContainsNestedClass = 0x0010,
HasOverloadedAssignmentOperator = 0x0020,
HasConversionOperator = 0x0040,
ForwardReference = 0x0080,
Scoped = 0x0100,
HasUniqueName = 0x0200,
Sealed = 0x0400,
Intrinsic = 0x2000
};
CV_DEFINE_ENUM_CLASS_FLAGS_OPERATORS(ClassOptions)
enum class FrameProcedureOptions : uint32_t {
None = 0x00000000,
HasAlloca = 0x00000001,
HasSetJmp = 0x00000002,
HasLongJmp = 0x00000004,
HasInlineAssembly = 0x00000008,
HasExceptionHandling = 0x00000010,
MarkedInline = 0x00000020,
HasStructuredExceptionHandling = 0x00000040,
Naked = 0x00000080,
SecurityChecks = 0x00000100,
AsynchronousExceptionHandling = 0x00000200,
NoStackOrderingForSecurityChecks = 0x00000400,
Inlined = 0x00000800,
StrictSecurityChecks = 0x00001000,
SafeBuffers = 0x00002000,
EncodedLocalBasePointerMask = 0x0000C000,
EncodedParamBasePointerMask = 0x00030000,
ProfileGuidedOptimization = 0x00040000,
ValidProfileCounts = 0x00080000,
OptimizedForSpeed = 0x00100000,
GuardCfg = 0x00200000,
GuardCfw = 0x00400000
};
CV_DEFINE_ENUM_CLASS_FLAGS_OPERATORS(FrameProcedureOptions)
enum class FunctionOptions : uint8_t {
None = 0x00,
CxxReturnUdt = 0x01,
Constructor = 0x02,
ConstructorWithVirtualBases = 0x04
};
CV_DEFINE_ENUM_CLASS_FLAGS_OPERATORS(FunctionOptions)
enum class HfaKind : uint8_t {
None = 0x00,
Float = 0x01,
Double = 0x02,
Other = 0x03
};
/// Source-level access specifier. (CV_access_e)
enum class MemberAccess : uint8_t {
None = 0,
Private = 1,
Protected = 2,
Public = 3
};
/// Part of member attribute flags. (CV_methodprop_e)
enum class MethodKind : uint8_t {
Vanilla = 0x00,
Virtual = 0x01,
Static = 0x02,
Friend = 0x03,
IntroducingVirtual = 0x04,
PureVirtual = 0x05,
PureIntroducingVirtual = 0x06
};
/// Equivalent to CV_fldattr_t bitfield.
enum class MethodOptions : uint16_t {
None = 0x0000,
AccessMask = 0x0003,
MethodKindMask = 0x001c,
Pseudo = 0x0020,
NoInherit = 0x0040,
NoConstruct = 0x0080,
CompilerGenerated = 0x0100,
Sealed = 0x0200
};
CV_DEFINE_ENUM_CLASS_FLAGS_OPERATORS(MethodOptions)
/// Equivalent to CV_LABEL_TYPE_e.
enum class LabelType : uint16_t {
Near = 0x0,
Far = 0x4,
};
/// Equivalent to CV_modifier_t.
/// TODO: Add flag for _Atomic modifier
enum class ModifierOptions : uint16_t {
None = 0x0000,
Const = 0x0001,
Volatile = 0x0002,
Unaligned = 0x0004
};
CV_DEFINE_ENUM_CLASS_FLAGS_OPERATORS(ModifierOptions)
// If the subsection kind has this bit set, then the linker should ignore it.
enum : uint32_t { SubsectionIgnoreFlag = 0x80000000 };
enum class DebugSubsectionKind : uint32_t {
None = 0,
Symbols = 0xf1,
Lines = 0xf2,
StringTable = 0xf3,
FileChecksums = 0xf4,
FrameData = 0xf5,
InlineeLines = 0xf6,
CrossScopeImports = 0xf7,
CrossScopeExports = 0xf8,
// These appear to relate to .Net assembly info.
ILLines = 0xf9,
FuncMDTokenMap = 0xfa,
TypeMDTokenMap = 0xfb,
MergedAssemblyInput = 0xfc,
CoffSymbolRVA = 0xfd,
XfgHashType = 0xff,
XfgHashVirtual = 0x100,
};
/// Equivalent to CV_ptrtype_e.
enum class PointerKind : uint8_t {
Near16 = 0x00, // 16 bit pointer
Far16 = 0x01, // 16:16 far pointer
Huge16 = 0x02, // 16:16 huge pointer
BasedOnSegment = 0x03, // based on segment
BasedOnValue = 0x04, // based on value of base
BasedOnSegmentValue = 0x05, // based on segment value of base
BasedOnAddress = 0x06, // based on address of base
BasedOnSegmentAddress = 0x07, // based on segment address of base
BasedOnType = 0x08, // based on type
BasedOnSelf = 0x09, // based on self
Near32 = 0x0a, // 32 bit pointer
Far32 = 0x0b, // 16:32 pointer
Near64 = 0x0c // 64 bit pointer
};
/// Equivalent to CV_ptrmode_e.
enum class PointerMode : uint8_t {
Pointer = 0x00, // "normal" pointer
LValueReference = 0x01, // "old" reference
PointerToDataMember = 0x02, // pointer to data member
PointerToMemberFunction = 0x03, // pointer to member function
RValueReference = 0x04 // r-value reference
};
/// Equivalent to misc lfPointerAttr bitfields.
enum class PointerOptions : uint32_t {
None = 0x00000000,
Flat32 = 0x00000100,
Volatile = 0x00000200,
Const = 0x00000400,
Unaligned = 0x00000800,
Restrict = 0x00001000,
WinRTSmartPointer = 0x00080000,
LValueRefThisPointer = 0x00100000,
RValueRefThisPointer = 0x00200000
};
CV_DEFINE_ENUM_CLASS_FLAGS_OPERATORS(PointerOptions)
/// Equivalent to CV_pmtype_e.
enum class PointerToMemberRepresentation : uint16_t {
Unknown = 0x00, // not specified (pre VC8)
SingleInheritanceData = 0x01, // member data, single inheritance
MultipleInheritanceData = 0x02, // member data, multiple inheritance
VirtualInheritanceData = 0x03, // member data, virtual inheritance
GeneralData = 0x04, // member data, most general
SingleInheritanceFunction = 0x05, // member function, single inheritance
MultipleInheritanceFunction = 0x06, // member function, multiple inheritance
VirtualInheritanceFunction = 0x07, // member function, virtual inheritance
GeneralFunction = 0x08 // member function, most general
};
enum class VFTableSlotKind : uint8_t {
Near16 = 0x00,
Far16 = 0x01,
This = 0x02,
Outer = 0x03,
Meta = 0x04,
Near = 0x05,
Far = 0x06
};
enum class WindowsRTClassKind : uint8_t {
None = 0x00,
RefClass = 0x01,
ValueClass = 0x02,
Interface = 0x03
};
/// Corresponds to CV_LVARFLAGS bitfield.
enum class LocalSymFlags : uint16_t {
None = 0,
IsParameter = 1 << 0,
IsAddressTaken = 1 << 1,
IsCompilerGenerated = 1 << 2,
IsAggregate = 1 << 3,
IsAggregated = 1 << 4,
IsAliased = 1 << 5,
IsAlias = 1 << 6,
IsReturnValue = 1 << 7,
IsOptimizedOut = 1 << 8,
IsEnregisteredGlobal = 1 << 9,
IsEnregisteredStatic = 1 << 10,
};
CV_DEFINE_ENUM_CLASS_FLAGS_OPERATORS(LocalSymFlags)
/// Corresponds to the CV_PUBSYMFLAGS bitfield.
enum class PublicSymFlags : uint32_t {
None = 0,
Code = 1 << 0,
Function = 1 << 1,
Managed = 1 << 2,
MSIL = 1 << 3,
};
CV_DEFINE_ENUM_CLASS_FLAGS_OPERATORS(PublicSymFlags)
/// Corresponds to the CV_PROCFLAGS bitfield.
enum class ProcSymFlags : uint8_t {
None = 0,
HasFP = 1 << 0,
HasIRET = 1 << 1,
HasFRET = 1 << 2,
IsNoReturn = 1 << 3,
IsUnreachable = 1 << 4,
HasCustomCallingConv = 1 << 5,
IsNoInline = 1 << 6,
HasOptimizedDebugInfo = 1 << 7,
};
CV_DEFINE_ENUM_CLASS_FLAGS_OPERATORS(ProcSymFlags)
/// Corresponds to COMPILESYM2::Flags bitfield.
enum class CompileSym2Flags : uint32_t {
None = 0,
SourceLanguageMask = 0xFF,
EC = 1 << 8,
NoDbgInfo = 1 << 9,
LTCG = 1 << 10,
NoDataAlign = 1 << 11,
ManagedPresent = 1 << 12,
SecurityChecks = 1 << 13,
HotPatch = 1 << 14,
CVTCIL = 1 << 15,
MSILModule = 1 << 16,
};
CV_DEFINE_ENUM_CLASS_FLAGS_OPERATORS(CompileSym2Flags)
/// Corresponds to COMPILESYM3::Flags bitfield.
enum class CompileSym3Flags : uint32_t {
None = 0,
SourceLanguageMask = 0xFF,
EC = 1 << 8,
NoDbgInfo = 1 << 9,
LTCG = 1 << 10,
NoDataAlign = 1 << 11,
ManagedPresent = 1 << 12,
SecurityChecks = 1 << 13,
HotPatch = 1 << 14,
CVTCIL = 1 << 15,
MSILModule = 1 << 16,
Sdl = 1 << 17,
PGO = 1 << 18,
Exp = 1 << 19,
};
CV_DEFINE_ENUM_CLASS_FLAGS_OPERATORS(CompileSym3Flags)
enum class ExportFlags : uint16_t {
None = 0,
IsConstant = 1 << 0,
IsData = 1 << 1,
IsPrivate = 1 << 2,
HasNoName = 1 << 3,
HasExplicitOrdinal = 1 << 4,
IsForwarder = 1 << 5
};
CV_DEFINE_ENUM_CLASS_FLAGS_OPERATORS(ExportFlags)
// Corresponds to BinaryAnnotationOpcode enum.
enum class BinaryAnnotationsOpCode : uint32_t {
Invalid,
CodeOffset,
ChangeCodeOffsetBase,
ChangeCodeOffset,
ChangeCodeLength,
ChangeFile,
ChangeLineOffset,
ChangeLineEndDelta,
ChangeRangeKind,
ChangeColumnStart,
ChangeColumnEndDelta,
ChangeCodeOffsetAndLineOffset,
ChangeCodeLengthAndCodeOffset,
ChangeColumnEnd,
};
// Corresponds to CV_cookietype_e enum.
enum class FrameCookieKind : uint8_t {
Copy,
XorStackPointer,
XorFramePointer,
XorR13,
};
// Corresponds to CV_HREG_e enum.
enum class RegisterId : uint16_t {
#define CV_REGISTERS_ALL
#define CV_REGISTER(name, value) name = value,
#include "CodeViewRegisters.def"
#undef CV_REGISTER
#undef CV_REGISTERS_ALL
};
// Register Ids are shared between architectures in CodeView. CPUType is needed
// to map register Id to name.
struct CPURegister {
CPURegister() = delete;
CPURegister(CPUType Cpu, codeview::RegisterId Reg) {
this->Cpu = Cpu;
this->Reg = Reg;
}
CPUType Cpu;
RegisterId Reg;
};
/// Two-bit value indicating which register is the designated frame pointer
/// register. Appears in the S_FRAMEPROC record flags.
enum class EncodedFramePtrReg : uint8_t {
None = 0,
StackPtr = 1,
FramePtr = 2,
BasePtr = 3,
};
RegisterId decodeFramePtrReg(EncodedFramePtrReg EncodedReg, CPUType CPU);
EncodedFramePtrReg encodeFramePtrReg(RegisterId Reg, CPUType CPU);
/// These values correspond to the THUNK_ORDINAL enumeration.
enum class ThunkOrdinal : uint8_t {
Standard,
ThisAdjustor,
Vcall,
Pcode,
UnknownLoad,
TrampIncremental,
BranchIsland
};
enum class TrampolineType : uint16_t { TrampIncremental, BranchIsland };
// These values correspond to the CV_SourceChksum_t enumeration.
enum class FileChecksumKind : uint8_t { None, MD5, SHA1, SHA256 };
enum LineFlags : uint16_t {
LF_None = 0,
LF_HaveColumns = 1, // CV_LINES_HAVE_COLUMNS
};
/// Data in the SUBSEC_FRAMEDATA subection.
struct FrameData {
support::ulittle32_t RvaStart;
support::ulittle32_t CodeSize;
support::ulittle32_t LocalSize;
support::ulittle32_t ParamsSize;
support::ulittle32_t MaxStackSize;
support::ulittle32_t FrameFunc;
support::ulittle16_t PrologSize;
support::ulittle16_t SavedRegsSize;
support::ulittle32_t Flags;
enum : uint32_t {
HasSEH = 1 << 0,
HasEH = 1 << 1,
IsFunctionStart = 1 << 2,
};
};
// Corresponds to LocalIdAndGlobalIdPair structure.
// This structure information allows cross-referencing between PDBs. For
// example, when a PDB is being built during compilation it is not yet known
// what other modules may end up in the PDB at link time. So certain types of
// IDs may clash between the various compile time PDBs. For each affected
// module, a subsection would be put into the PDB containing a mapping from its
// local IDs to a single ID namespace for all items in the PDB file.
struct CrossModuleExport {
support::ulittle32_t Local;
support::ulittle32_t Global;
};
struct CrossModuleImport {
support::ulittle32_t ModuleNameOffset;
support::ulittle32_t Count; // Number of elements
// support::ulittle32_t ids[Count]; // id from referenced module
};
enum class CodeViewContainer { ObjectFile, Pdb };
inline uint32_t alignOf(CodeViewContainer Container) {
if (Container == CodeViewContainer::ObjectFile)
return 1;
return 4;
}
}
}
#endif
PK hwFZ��GX
X
2 DebugInfo/CodeView/SymbolVisitorCallbackPipeline.hnu �[��� //===- SymbolVisitorCallbackPipeline.h --------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_SYMBOLVISITORCALLBACKPIPELINE_H
#define LLVM_DEBUGINFO_CODEVIEW_SYMBOLVISITORCALLBACKPIPELINE_H
#include "llvm/DebugInfo/CodeView/SymbolRecord.h"
#include "llvm/DebugInfo/CodeView/SymbolVisitorCallbacks.h"
#include "llvm/Support/Error.h"
#include <vector>
namespace llvm {
namespace codeview {
class SymbolVisitorCallbackPipeline : public SymbolVisitorCallbacks {
public:
SymbolVisitorCallbackPipeline() = default;
Error visitUnknownSymbol(CVSymbol &Record) override {
for (auto *Visitor : Pipeline) {
if (auto EC = Visitor->visitUnknownSymbol(Record))
return EC;
}
return Error::success();
}
Error visitSymbolBegin(CVSymbol &Record, uint32_t Offset) override {
for (auto *Visitor : Pipeline) {
if (auto EC = Visitor->visitSymbolBegin(Record, Offset))
return EC;
}
return Error::success();
}
Error visitSymbolBegin(CVSymbol &Record) override {
for (auto *Visitor : Pipeline) {
if (auto EC = Visitor->visitSymbolBegin(Record))
return EC;
}
return Error::success();
}
Error visitSymbolEnd(CVSymbol &Record) override {
for (auto *Visitor : Pipeline) {
if (auto EC = Visitor->visitSymbolEnd(Record))
return EC;
}
return Error::success();
}
void addCallbackToPipeline(SymbolVisitorCallbacks &Callbacks) {
Pipeline.push_back(&Callbacks);
}
#define SYMBOL_RECORD(EnumName, EnumVal, Name) \
Error visitKnownRecord(CVSymbol &CVR, Name &Record) override { \
for (auto Visitor : Pipeline) { \
if (auto EC = Visitor->visitKnownRecord(CVR, Record)) \
return EC; \
} \
return Error::success(); \
}
#define SYMBOL_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
#include "llvm/DebugInfo/CodeView/CodeViewSymbols.def"
private:
std::vector<SymbolVisitorCallbacks *> Pipeline;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_SYMBOLVISITORCALLBACKPIPELINE_H
PK hwFZ�ߑ�I I DebugInfo/CodeView/EnumTables.hnu �[��� //===- EnumTables.h - Enum to string conversion tables ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_ENUMTABLES_H
#define LLVM_DEBUGINFO_CODEVIEW_ENUMTABLES_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/BinaryFormat/COFF.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include <cstdint>
namespace llvm {
template <typename T> struct EnumEntry;
namespace codeview {
ArrayRef<EnumEntry<SymbolKind>> getSymbolTypeNames();
ArrayRef<EnumEntry<TypeLeafKind>> getTypeLeafNames();
ArrayRef<EnumEntry<uint16_t>> getRegisterNames(CPUType Cpu);
ArrayRef<EnumEntry<uint32_t>> getPublicSymFlagNames();
ArrayRef<EnumEntry<uint8_t>> getProcSymFlagNames();
ArrayRef<EnumEntry<uint16_t>> getLocalFlagNames();
ArrayRef<EnumEntry<uint8_t>> getFrameCookieKindNames();
ArrayRef<EnumEntry<SourceLanguage>> getSourceLanguageNames();
ArrayRef<EnumEntry<uint32_t>> getCompileSym2FlagNames();
ArrayRef<EnumEntry<uint32_t>> getCompileSym3FlagNames();
ArrayRef<EnumEntry<uint32_t>> getFileChecksumNames();
ArrayRef<EnumEntry<unsigned>> getCPUTypeNames();
ArrayRef<EnumEntry<uint32_t>> getFrameProcSymFlagNames();
ArrayRef<EnumEntry<uint16_t>> getExportSymFlagNames();
ArrayRef<EnumEntry<uint32_t>> getModuleSubstreamKindNames();
ArrayRef<EnumEntry<uint8_t>> getThunkOrdinalNames();
ArrayRef<EnumEntry<uint16_t>> getTrampolineNames();
ArrayRef<EnumEntry<COFF::SectionCharacteristics>>
getImageSectionCharacteristicNames();
ArrayRef<EnumEntry<uint16_t>> getClassOptionNames();
ArrayRef<EnumEntry<uint8_t>> getMemberAccessNames();
ArrayRef<EnumEntry<uint16_t>> getMethodOptionNames();
ArrayRef<EnumEntry<uint16_t>> getMemberKindNames();
ArrayRef<EnumEntry<uint8_t>> getPtrKindNames();
ArrayRef<EnumEntry<uint8_t>> getPtrModeNames();
ArrayRef<EnumEntry<uint16_t>> getPtrMemberRepNames();
ArrayRef<EnumEntry<uint16_t>> getTypeModifierNames();
ArrayRef<EnumEntry<uint8_t>> getCallingConventions();
ArrayRef<EnumEntry<uint8_t>> getFunctionOptionEnum();
ArrayRef<EnumEntry<uint16_t>> getLabelTypeEnum();
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_ENUMTABLES_H
PK hwFZ� �*
*
$ DebugInfo/CodeView/TypeDumpVisitor.hnu �[��� //===-- TypeDumpVisitor.h - CodeView type info dumper -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_TYPEDUMPVISITOR_H
#define LLVM_DEBUGINFO_CODEVIEW_TYPEDUMPVISITOR_H
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/TypeVisitorCallbacks.h"
namespace llvm {
class ScopedPrinter;
namespace codeview {
class TypeIndex;
struct CVMemberRecord;
struct MemberAttributes;
class TypeCollection;
/// Dumper for CodeView type streams found in COFF object files and PDB files.
class TypeDumpVisitor : public TypeVisitorCallbacks {
public:
TypeDumpVisitor(TypeCollection &TpiTypes, ScopedPrinter *W,
bool PrintRecordBytes)
: W(W), PrintRecordBytes(PrintRecordBytes), TpiTypes(TpiTypes) {}
/// When dumping types from an IPI stream in a PDB, a type index may refer to
/// a type or an item ID. The dumper will lookup the "name" of the index in
/// the item database if appropriate. If ItemDB is null, it will use TypeDB,
/// which is correct when dumping types from an object file (/Z7).
void setIpiTypes(TypeCollection &Types) { IpiTypes = &Types; }
void printTypeIndex(StringRef FieldName, TypeIndex TI) const;
void printItemIndex(StringRef FieldName, TypeIndex TI) const;
/// Action to take on unknown types. By default, they are ignored.
Error visitUnknownType(CVType &Record) override;
Error visitUnknownMember(CVMemberRecord &Record) override;
/// Paired begin/end actions for all types. Receives all record data,
/// including the fixed-length record prefix.
Error visitTypeBegin(CVType &Record) override;
Error visitTypeBegin(CVType &Record, TypeIndex Index) override;
Error visitTypeEnd(CVType &Record) override;
Error visitMemberBegin(CVMemberRecord &Record) override;
Error visitMemberEnd(CVMemberRecord &Record) override;
#define TYPE_RECORD(EnumName, EnumVal, Name) \
Error visitKnownRecord(CVType &CVR, Name##Record &Record) override;
#define MEMBER_RECORD(EnumName, EnumVal, Name) \
Error visitKnownMember(CVMemberRecord &CVR, Name##Record &Record) override;
#define TYPE_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
#define MEMBER_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
#include "llvm/DebugInfo/CodeView/CodeViewTypes.def"
private:
void printMemberAttributes(MemberAttributes Attrs);
void printMemberAttributes(MemberAccess Access, MethodKind Kind,
MethodOptions Options);
/// Get the database of indices for the stream that we are dumping. If ItemDB
/// is set, then we must be dumping an item (IPI) stream. This will also
/// always get the appropriate DB for printing item names.
TypeCollection &getSourceTypes() const {
return IpiTypes ? *IpiTypes : TpiTypes;
}
ScopedPrinter *W;
bool PrintRecordBytes = false;
TypeCollection &TpiTypes;
TypeCollection *IpiTypes = nullptr;
};
} // end namespace codeview
} // end namespace llvm
#endif
PK hwFZ��K�t t - DebugInfo/CodeView/DebugFrameDataSubsection.hnu �[��� //===- DebugFrameDataSubsection.h ------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_DEBUGFRAMEDATASUBSECTION_H
#define LLVM_DEBUGINFO_CODEVIEW_DEBUGFRAMEDATASUBSECTION_H
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/DebugSubsection.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
namespace llvm {
class BinaryStreamReader;
class BinaryStreamWriter;
namespace codeview {
class DebugFrameDataSubsectionRef final : public DebugSubsectionRef {
public:
DebugFrameDataSubsectionRef()
: DebugSubsectionRef(DebugSubsectionKind::FrameData) {}
static bool classof(const DebugSubsection *S) {
return S->kind() == DebugSubsectionKind::FrameData;
}
Error initialize(BinaryStreamReader Reader);
Error initialize(BinaryStreamRef Stream);
FixedStreamArray<FrameData>::Iterator begin() const { return Frames.begin(); }
FixedStreamArray<FrameData>::Iterator end() const { return Frames.end(); }
const support::ulittle32_t *getRelocPtr() const { return RelocPtr; }
private:
const support::ulittle32_t *RelocPtr = nullptr;
FixedStreamArray<FrameData> Frames;
};
class DebugFrameDataSubsection final : public DebugSubsection {
public:
DebugFrameDataSubsection(bool IncludeRelocPtr)
: DebugSubsection(DebugSubsectionKind::FrameData),
IncludeRelocPtr(IncludeRelocPtr) {}
static bool classof(const DebugSubsection *S) {
return S->kind() == DebugSubsectionKind::FrameData;
}
uint32_t calculateSerializedSize() const override;
Error commit(BinaryStreamWriter &Writer) const override;
void addFrameData(const FrameData &Frame);
void setFrames(ArrayRef<FrameData> Frames);
private:
bool IncludeRelocPtr = false;
std::vector<FrameData> Frames;
};
}
}
#endif
PK hwFZ�/< � � 0 DebugInfo/CodeView/TypeVisitorCallbackPipeline.hnu �[��� //===- TypeVisitorCallbackPipeline.h ----------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_TYPEVISITORCALLBACKPIPELINE_H
#define LLVM_DEBUGINFO_CODEVIEW_TYPEVISITORCALLBACKPIPELINE_H
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/TypeRecord.h"
#include "llvm/DebugInfo/CodeView/TypeVisitorCallbacks.h"
#include "llvm/Support/Error.h"
#include <vector>
namespace llvm {
namespace codeview {
class TypeVisitorCallbackPipeline : public TypeVisitorCallbacks {
public:
TypeVisitorCallbackPipeline() = default;
Error visitUnknownType(CVRecord<TypeLeafKind> &Record) override {
for (auto *Visitor : Pipeline) {
if (auto EC = Visitor->visitUnknownType(Record))
return EC;
}
return Error::success();
}
Error visitUnknownMember(CVMemberRecord &Record) override {
for (auto *Visitor : Pipeline) {
if (auto EC = Visitor->visitUnknownMember(Record))
return EC;
}
return Error::success();
}
Error visitTypeBegin(CVType &Record) override {
for (auto *Visitor : Pipeline) {
if (auto EC = Visitor->visitTypeBegin(Record))
return EC;
}
return Error::success();
}
Error visitTypeBegin(CVType &Record, TypeIndex Index) override {
for (auto *Visitor : Pipeline) {
if (auto EC = Visitor->visitTypeBegin(Record, Index))
return EC;
}
return Error::success();
}
Error visitTypeEnd(CVType &Record) override {
for (auto *Visitor : Pipeline) {
if (auto EC = Visitor->visitTypeEnd(Record))
return EC;
}
return Error::success();
}
Error visitMemberBegin(CVMemberRecord &Record) override {
for (auto *Visitor : Pipeline) {
if (auto EC = Visitor->visitMemberBegin(Record))
return EC;
}
return Error::success();
}
Error visitMemberEnd(CVMemberRecord &Record) override {
for (auto *Visitor : Pipeline) {
if (auto EC = Visitor->visitMemberEnd(Record))
return EC;
}
return Error::success();
}
void addCallbackToPipeline(TypeVisitorCallbacks &Callbacks) {
Pipeline.push_back(&Callbacks);
}
#define TYPE_RECORD(EnumName, EnumVal, Name) \
Error visitKnownRecord(CVType &CVR, Name##Record &Record) override { \
return visitKnownRecordImpl(CVR, Record); \
}
#define MEMBER_RECORD(EnumName, EnumVal, Name) \
Error visitKnownMember(CVMemberRecord &CVMR, Name##Record &Record) \
override { \
return visitKnownMemberImpl(CVMR, Record); \
}
#define TYPE_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
#define MEMBER_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
#include "llvm/DebugInfo/CodeView/CodeViewTypes.def"
private:
template <typename T> Error visitKnownRecordImpl(CVType &CVR, T &Record) {
for (auto *Visitor : Pipeline) {
if (auto EC = Visitor->visitKnownRecord(CVR, Record))
return EC;
}
return Error::success();
}
template <typename T>
Error visitKnownMemberImpl(CVMemberRecord &CVMR, T &Record) {
for (auto *Visitor : Pipeline) {
if (auto EC = Visitor->visitKnownMember(CVMR, Record))
return EC;
}
return Error::success();
}
std::vector<TypeVisitorCallbacks *> Pipeline;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_TYPEVISITORCALLBACKPIPELINE_H
PK hwFZ��Q�} �} DebugInfo/CodeView/TypeRecord.hnu �[��� //===- TypeRecord.h ---------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_TYPERECORD_H
#define LLVM_DEBUGINFO_CODEVIEW_TYPERECORD_H
#include "llvm/ADT/APSInt.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/GUID.h"
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/Endian.h"
#include <algorithm>
#include <cstdint>
#include <optional>
#include <vector>
namespace llvm {
namespace codeview {
using support::little32_t;
using support::ulittle16_t;
using support::ulittle32_t;
struct CVMemberRecord {
TypeLeafKind Kind;
ArrayRef<uint8_t> Data;
};
/// Equvalent to CV_fldattr_t in cvinfo.h.
struct MemberAttributes {
uint16_t Attrs = 0;
enum {
MethodKindShift = 2,
};
MemberAttributes() = default;
explicit MemberAttributes(MemberAccess Access)
: Attrs(static_cast<uint16_t>(Access)) {}
MemberAttributes(MemberAccess Access, MethodKind Kind, MethodOptions Flags) {
Attrs = static_cast<uint16_t>(Access);
Attrs |= (static_cast<uint16_t>(Kind) << MethodKindShift);
Attrs |= static_cast<uint16_t>(Flags);
}
/// Get the access specifier. Valid for any kind of member.
MemberAccess getAccess() const {
return MemberAccess(unsigned(Attrs) & unsigned(MethodOptions::AccessMask));
}
/// Indicates if a method is defined with friend, virtual, static, etc.
MethodKind getMethodKind() const {
return MethodKind(
(unsigned(Attrs) & unsigned(MethodOptions::MethodKindMask)) >>
MethodKindShift);
}
/// Get the flags that are not included in access control or method
/// properties.
MethodOptions getFlags() const {
return MethodOptions(
unsigned(Attrs) &
~unsigned(MethodOptions::AccessMask | MethodOptions::MethodKindMask));
}
/// Is this method virtual.
bool isVirtual() const {
auto MP = getMethodKind();
return MP != MethodKind::Vanilla && MP != MethodKind::Friend &&
MP != MethodKind::Static;
}
/// Does this member introduce a new virtual method.
bool isIntroducedVirtual() const {
auto MP = getMethodKind();
return MP == MethodKind::IntroducingVirtual ||
MP == MethodKind::PureIntroducingVirtual;
}
/// Is this method static.
bool isStatic() const {
return getMethodKind() == MethodKind::Static;
}
};
// Does not correspond to any tag, this is the tail of an LF_POINTER record
// if it represents a member pointer.
class MemberPointerInfo {
public:
MemberPointerInfo() = default;
MemberPointerInfo(TypeIndex ContainingType,
PointerToMemberRepresentation Representation)
: ContainingType(ContainingType), Representation(Representation) {}
TypeIndex getContainingType() const { return ContainingType; }
PointerToMemberRepresentation getRepresentation() const {
return Representation;
}
TypeIndex ContainingType;
PointerToMemberRepresentation Representation =
PointerToMemberRepresentation::Unknown;
};
class TypeRecord {
protected:
TypeRecord() = default;
explicit TypeRecord(TypeRecordKind Kind) : Kind(Kind) {}
public:
TypeRecordKind getKind() const { return Kind; }
TypeRecordKind Kind;
};
// LF_MODIFIER
class ModifierRecord : public TypeRecord {
public:
ModifierRecord() = default;
explicit ModifierRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
ModifierRecord(TypeIndex ModifiedType, ModifierOptions Modifiers)
: TypeRecord(TypeRecordKind::Modifier), ModifiedType(ModifiedType),
Modifiers(Modifiers) {}
TypeIndex getModifiedType() const { return ModifiedType; }
ModifierOptions getModifiers() const { return Modifiers; }
TypeIndex ModifiedType;
ModifierOptions Modifiers = ModifierOptions::None;
};
// LF_PROCEDURE
class ProcedureRecord : public TypeRecord {
public:
ProcedureRecord() = default;
explicit ProcedureRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
ProcedureRecord(TypeIndex ReturnType, CallingConvention CallConv,
FunctionOptions Options, uint16_t ParameterCount,
TypeIndex ArgumentList)
: TypeRecord(TypeRecordKind::Procedure), ReturnType(ReturnType),
CallConv(CallConv), Options(Options), ParameterCount(ParameterCount),
ArgumentList(ArgumentList) {}
TypeIndex getReturnType() const { return ReturnType; }
CallingConvention getCallConv() const { return CallConv; }
FunctionOptions getOptions() const { return Options; }
uint16_t getParameterCount() const { return ParameterCount; }
TypeIndex getArgumentList() const { return ArgumentList; }
TypeIndex ReturnType;
CallingConvention CallConv = CallingConvention::NearC;
FunctionOptions Options = FunctionOptions::None;
uint16_t ParameterCount = 0;
TypeIndex ArgumentList;
};
// LF_MFUNCTION
class MemberFunctionRecord : public TypeRecord {
public:
MemberFunctionRecord() = default;
explicit MemberFunctionRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
MemberFunctionRecord(TypeIndex ReturnType, TypeIndex ClassType,
TypeIndex ThisType, CallingConvention CallConv,
FunctionOptions Options, uint16_t ParameterCount,
TypeIndex ArgumentList, int32_t ThisPointerAdjustment)
: TypeRecord(TypeRecordKind::MemberFunction), ReturnType(ReturnType),
ClassType(ClassType), ThisType(ThisType), CallConv(CallConv),
Options(Options), ParameterCount(ParameterCount),
ArgumentList(ArgumentList),
ThisPointerAdjustment(ThisPointerAdjustment) {}
TypeIndex getReturnType() const { return ReturnType; }
TypeIndex getClassType() const { return ClassType; }
TypeIndex getThisType() const { return ThisType; }
CallingConvention getCallConv() const { return CallConv; }
FunctionOptions getOptions() const { return Options; }
uint16_t getParameterCount() const { return ParameterCount; }
TypeIndex getArgumentList() const { return ArgumentList; }
int32_t getThisPointerAdjustment() const { return ThisPointerAdjustment; }
TypeIndex ReturnType;
TypeIndex ClassType;
TypeIndex ThisType;
CallingConvention CallConv = CallingConvention::NearC;
FunctionOptions Options = FunctionOptions::None;
uint16_t ParameterCount = 0;
TypeIndex ArgumentList;
int32_t ThisPointerAdjustment = 0;
};
// LF_LABEL
class LabelRecord : public TypeRecord {
public:
LabelRecord() = default;
explicit LabelRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
LabelRecord(LabelType Mode) : TypeRecord(TypeRecordKind::Label), Mode(Mode) {}
LabelType Mode = LabelType::Near;
};
// LF_MFUNC_ID
class MemberFuncIdRecord : public TypeRecord {
public:
MemberFuncIdRecord() = default;
explicit MemberFuncIdRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
MemberFuncIdRecord(TypeIndex ClassType, TypeIndex FunctionType,
StringRef Name)
: TypeRecord(TypeRecordKind::MemberFuncId), ClassType(ClassType),
FunctionType(FunctionType), Name(Name) {}
TypeIndex getClassType() const { return ClassType; }
TypeIndex getFunctionType() const { return FunctionType; }
StringRef getName() const { return Name; }
TypeIndex ClassType;
TypeIndex FunctionType;
StringRef Name;
};
// LF_ARGLIST
class ArgListRecord : public TypeRecord {
public:
ArgListRecord() = default;
explicit ArgListRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
ArgListRecord(TypeRecordKind Kind, ArrayRef<TypeIndex> Indices)
: TypeRecord(Kind), ArgIndices(Indices) {}
ArrayRef<TypeIndex> getIndices() const { return ArgIndices; }
std::vector<TypeIndex> ArgIndices;
};
// LF_SUBSTR_LIST
class StringListRecord : public TypeRecord {
public:
StringListRecord() = default;
explicit StringListRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
StringListRecord(TypeRecordKind Kind, ArrayRef<TypeIndex> Indices)
: TypeRecord(Kind), StringIndices(Indices) {}
ArrayRef<TypeIndex> getIndices() const { return StringIndices; }
std::vector<TypeIndex> StringIndices;
};
// LF_POINTER
class PointerRecord : public TypeRecord {
public:
// ---------------------------XXXXX
static const uint32_t PointerKindShift = 0;
static const uint32_t PointerKindMask = 0x1F;
// ------------------------XXX-----
static const uint32_t PointerModeShift = 5;
static const uint32_t PointerModeMask = 0x07;
// ----------XXX------XXXXX--------
static const uint32_t PointerOptionMask = 0x381f00;
// -------------XXXXXX------------
static const uint32_t PointerSizeShift = 13;
static const uint32_t PointerSizeMask = 0xFF;
PointerRecord() = default;
explicit PointerRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
PointerRecord(TypeIndex ReferentType, uint32_t Attrs)
: TypeRecord(TypeRecordKind::Pointer), ReferentType(ReferentType),
Attrs(Attrs) {}
PointerRecord(TypeIndex ReferentType, PointerKind PK, PointerMode PM,
PointerOptions PO, uint8_t Size)
: TypeRecord(TypeRecordKind::Pointer), ReferentType(ReferentType),
Attrs(calcAttrs(PK, PM, PO, Size)) {}
PointerRecord(TypeIndex ReferentType, PointerKind PK, PointerMode PM,
PointerOptions PO, uint8_t Size, const MemberPointerInfo &MPI)
: TypeRecord(TypeRecordKind::Pointer), ReferentType(ReferentType),
Attrs(calcAttrs(PK, PM, PO, Size)), MemberInfo(MPI) {}
TypeIndex getReferentType() const { return ReferentType; }
PointerKind getPointerKind() const {
return static_cast<PointerKind>((Attrs >> PointerKindShift) &
PointerKindMask);
}
PointerMode getMode() const {
return static_cast<PointerMode>((Attrs >> PointerModeShift) &
PointerModeMask);
}
PointerOptions getOptions() const {
return static_cast<PointerOptions>(Attrs & PointerOptionMask);
}
uint8_t getSize() const {
return (Attrs >> PointerSizeShift) & PointerSizeMask;
}
MemberPointerInfo getMemberInfo() const { return *MemberInfo; }
bool isPointerToMember() const {
return getMode() == PointerMode::PointerToDataMember ||
getMode() == PointerMode::PointerToMemberFunction;
}
bool isFlat() const { return !!(Attrs & uint32_t(PointerOptions::Flat32)); }
bool isConst() const { return !!(Attrs & uint32_t(PointerOptions::Const)); }
bool isVolatile() const {
return !!(Attrs & uint32_t(PointerOptions::Volatile));
}
bool isUnaligned() const {
return !!(Attrs & uint32_t(PointerOptions::Unaligned));
}
bool isRestrict() const {
return !!(Attrs & uint32_t(PointerOptions::Restrict));
}
bool isLValueReferenceThisPtr() const {
return !!(Attrs & uint32_t(PointerOptions::LValueRefThisPointer));
}
bool isRValueReferenceThisPtr() const {
return !!(Attrs & uint32_t(PointerOptions::RValueRefThisPointer));
}
TypeIndex ReferentType;
uint32_t Attrs = 0;
std::optional<MemberPointerInfo> MemberInfo;
void setAttrs(PointerKind PK, PointerMode PM, PointerOptions PO,
uint8_t Size) {
Attrs = calcAttrs(PK, PM, PO, Size);
}
private:
static uint32_t calcAttrs(PointerKind PK, PointerMode PM, PointerOptions PO,
uint8_t Size) {
uint32_t A = 0;
A |= static_cast<uint32_t>(PK);
A |= static_cast<uint32_t>(PO);
A |= (static_cast<uint32_t>(PM) << PointerModeShift);
A |= (static_cast<uint32_t>(Size) << PointerSizeShift);
return A;
}
};
// LF_NESTTYPE
class NestedTypeRecord : public TypeRecord {
public:
NestedTypeRecord() = default;
explicit NestedTypeRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
NestedTypeRecord(TypeIndex Type, StringRef Name)
: TypeRecord(TypeRecordKind::NestedType), Type(Type), Name(Name) {}
TypeIndex getNestedType() const { return Type; }
StringRef getName() const { return Name; }
TypeIndex Type;
StringRef Name;
};
// LF_FIELDLIST
class FieldListRecord : public TypeRecord {
public:
FieldListRecord() = default;
explicit FieldListRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
explicit FieldListRecord(ArrayRef<uint8_t> Data)
: TypeRecord(TypeRecordKind::FieldList), Data(Data) {}
ArrayRef<uint8_t> Data;
};
// LF_ARRAY
class ArrayRecord : public TypeRecord {
public:
ArrayRecord() = default;
explicit ArrayRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
ArrayRecord(TypeIndex ElementType, TypeIndex IndexType, uint64_t Size,
StringRef Name)
: TypeRecord(TypeRecordKind::Array), ElementType(ElementType),
IndexType(IndexType), Size(Size), Name(Name) {}
TypeIndex getElementType() const { return ElementType; }
TypeIndex getIndexType() const { return IndexType; }
uint64_t getSize() const { return Size; }
StringRef getName() const { return Name; }
TypeIndex ElementType;
TypeIndex IndexType;
uint64_t Size = 0;
StringRef Name;
};
class TagRecord : public TypeRecord {
protected:
TagRecord() = default;
explicit TagRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
TagRecord(TypeRecordKind Kind, uint16_t MemberCount, ClassOptions Options,
TypeIndex FieldList, StringRef Name, StringRef UniqueName)
: TypeRecord(Kind), MemberCount(MemberCount), Options(Options),
FieldList(FieldList), Name(Name), UniqueName(UniqueName) {}
public:
static const int HfaKindShift = 11;
static const int HfaKindMask = 0x1800;
static const int WinRTKindShift = 14;
static const int WinRTKindMask = 0xC000;
bool hasUniqueName() const {
return (Options & ClassOptions::HasUniqueName) != ClassOptions::None;
}
bool isNested() const {
return (Options & ClassOptions::Nested) != ClassOptions::None;
}
bool isForwardRef() const {
return (Options & ClassOptions::ForwardReference) != ClassOptions::None;
}
bool containsNestedClass() const {
return (Options & ClassOptions::ContainsNestedClass) != ClassOptions::None;
}
bool isScoped() const {
return (Options & ClassOptions::Scoped) != ClassOptions::None;
}
uint16_t getMemberCount() const { return MemberCount; }
ClassOptions getOptions() const { return Options; }
TypeIndex getFieldList() const { return FieldList; }
StringRef getName() const { return Name; }
StringRef getUniqueName() const { return UniqueName; }
uint16_t MemberCount = 0;
ClassOptions Options = ClassOptions::None;
TypeIndex FieldList;
StringRef Name;
StringRef UniqueName;
};
// LF_CLASS, LF_STRUCTURE, LF_INTERFACE
class ClassRecord : public TagRecord {
public:
ClassRecord() = default;
explicit ClassRecord(TypeRecordKind Kind) : TagRecord(Kind) {}
ClassRecord(TypeRecordKind Kind, uint16_t MemberCount, ClassOptions Options,
TypeIndex FieldList, TypeIndex DerivationList,
TypeIndex VTableShape, uint64_t Size, StringRef Name,
StringRef UniqueName)
: TagRecord(Kind, MemberCount, Options, FieldList, Name, UniqueName),
DerivationList(DerivationList), VTableShape(VTableShape), Size(Size) {}
HfaKind getHfa() const {
uint16_t Value = static_cast<uint16_t>(Options);
Value = (Value & HfaKindMask) >> HfaKindShift;
return static_cast<HfaKind>(Value);
}
WindowsRTClassKind getWinRTKind() const {
uint16_t Value = static_cast<uint16_t>(Options);
Value = (Value & WinRTKindMask) >> WinRTKindShift;
return static_cast<WindowsRTClassKind>(Value);
}
TypeIndex getDerivationList() const { return DerivationList; }
TypeIndex getVTableShape() const { return VTableShape; }
uint64_t getSize() const { return Size; }
TypeIndex DerivationList;
TypeIndex VTableShape;
uint64_t Size = 0;
};
// LF_UNION
struct UnionRecord : public TagRecord {
UnionRecord() = default;
explicit UnionRecord(TypeRecordKind Kind) : TagRecord(Kind) {}
UnionRecord(uint16_t MemberCount, ClassOptions Options, TypeIndex FieldList,
uint64_t Size, StringRef Name, StringRef UniqueName)
: TagRecord(TypeRecordKind::Union, MemberCount, Options, FieldList, Name,
UniqueName),
Size(Size) {}
HfaKind getHfa() const {
uint16_t Value = static_cast<uint16_t>(Options);
Value = (Value & HfaKindMask) >> HfaKindShift;
return static_cast<HfaKind>(Value);
}
uint64_t getSize() const { return Size; }
uint64_t Size = 0;
};
// LF_ENUM
class EnumRecord : public TagRecord {
public:
EnumRecord() = default;
explicit EnumRecord(TypeRecordKind Kind) : TagRecord(Kind) {}
EnumRecord(uint16_t MemberCount, ClassOptions Options, TypeIndex FieldList,
StringRef Name, StringRef UniqueName, TypeIndex UnderlyingType)
: TagRecord(TypeRecordKind::Enum, MemberCount, Options, FieldList, Name,
UniqueName),
UnderlyingType(UnderlyingType) {}
TypeIndex getUnderlyingType() const { return UnderlyingType; }
TypeIndex UnderlyingType;
};
// LF_BITFIELD
class BitFieldRecord : public TypeRecord {
public:
BitFieldRecord() = default;
explicit BitFieldRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
BitFieldRecord(TypeIndex Type, uint8_t BitSize, uint8_t BitOffset)
: TypeRecord(TypeRecordKind::BitField), Type(Type), BitSize(BitSize),
BitOffset(BitOffset) {}
TypeIndex getType() const { return Type; }
uint8_t getBitOffset() const { return BitOffset; }
uint8_t getBitSize() const { return BitSize; }
TypeIndex Type;
uint8_t BitSize = 0;
uint8_t BitOffset = 0;
};
// LF_VTSHAPE
class VFTableShapeRecord : public TypeRecord {
public:
VFTableShapeRecord() = default;
explicit VFTableShapeRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
explicit VFTableShapeRecord(ArrayRef<VFTableSlotKind> Slots)
: TypeRecord(TypeRecordKind::VFTableShape), SlotsRef(Slots) {}
explicit VFTableShapeRecord(std::vector<VFTableSlotKind> Slots)
: TypeRecord(TypeRecordKind::VFTableShape), Slots(std::move(Slots)) {}
ArrayRef<VFTableSlotKind> getSlots() const {
if (!SlotsRef.empty())
return SlotsRef;
return Slots;
}
uint32_t getEntryCount() const { return getSlots().size(); }
ArrayRef<VFTableSlotKind> SlotsRef;
std::vector<VFTableSlotKind> Slots;
};
// LF_TYPESERVER2
class TypeServer2Record : public TypeRecord {
public:
TypeServer2Record() = default;
explicit TypeServer2Record(TypeRecordKind Kind) : TypeRecord(Kind) {}
TypeServer2Record(StringRef GuidStr, uint32_t Age, StringRef Name)
: TypeRecord(TypeRecordKind::TypeServer2), Age(Age), Name(Name) {
assert(GuidStr.size() == 16 && "guid isn't 16 bytes");
::memcpy(Guid.Guid, GuidStr.data(), 16);
}
const GUID &getGuid() const { return Guid; }
uint32_t getAge() const { return Age; }
StringRef getName() const { return Name; }
GUID Guid = {};
uint32_t Age = 0;
StringRef Name;
};
// LF_STRING_ID
class StringIdRecord : public TypeRecord {
public:
StringIdRecord() = default;
explicit StringIdRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
StringIdRecord(TypeIndex Id, StringRef String)
: TypeRecord(TypeRecordKind::StringId), Id(Id), String(String) {}
TypeIndex getId() const { return Id; }
StringRef getString() const { return String; }
TypeIndex Id;
StringRef String;
};
// LF_FUNC_ID
class FuncIdRecord : public TypeRecord {
public:
FuncIdRecord() = default;
explicit FuncIdRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
FuncIdRecord(TypeIndex ParentScope, TypeIndex FunctionType, StringRef Name)
: TypeRecord(TypeRecordKind::FuncId), ParentScope(ParentScope),
FunctionType(FunctionType), Name(Name) {}
TypeIndex getParentScope() const { return ParentScope; }
TypeIndex getFunctionType() const { return FunctionType; }
StringRef getName() const { return Name; }
TypeIndex ParentScope;
TypeIndex FunctionType;
StringRef Name;
};
// LF_UDT_SRC_LINE
class UdtSourceLineRecord : public TypeRecord {
public:
UdtSourceLineRecord() = default;
explicit UdtSourceLineRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
UdtSourceLineRecord(TypeIndex UDT, TypeIndex SourceFile, uint32_t LineNumber)
: TypeRecord(TypeRecordKind::UdtSourceLine), UDT(UDT),
SourceFile(SourceFile), LineNumber(LineNumber) {}
TypeIndex getUDT() const { return UDT; }
TypeIndex getSourceFile() const { return SourceFile; }
uint32_t getLineNumber() const { return LineNumber; }
TypeIndex UDT;
TypeIndex SourceFile;
uint32_t LineNumber = 0;
};
// LF_UDT_MOD_SRC_LINE
class UdtModSourceLineRecord : public TypeRecord {
public:
UdtModSourceLineRecord() = default;
explicit UdtModSourceLineRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
UdtModSourceLineRecord(TypeIndex UDT, TypeIndex SourceFile,
uint32_t LineNumber, uint16_t Module)
: TypeRecord(TypeRecordKind::UdtSourceLine), UDT(UDT),
SourceFile(SourceFile), LineNumber(LineNumber), Module(Module) {}
TypeIndex getUDT() const { return UDT; }
TypeIndex getSourceFile() const { return SourceFile; }
uint32_t getLineNumber() const { return LineNumber; }
uint16_t getModule() const { return Module; }
TypeIndex UDT;
TypeIndex SourceFile;
uint32_t LineNumber = 0;
uint16_t Module = 0;
};
// LF_BUILDINFO
class BuildInfoRecord : public TypeRecord {
public:
BuildInfoRecord() = default;
explicit BuildInfoRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
BuildInfoRecord(ArrayRef<TypeIndex> ArgIndices)
: TypeRecord(TypeRecordKind::BuildInfo),
ArgIndices(ArgIndices.begin(), ArgIndices.end()) {}
ArrayRef<TypeIndex> getArgs() const { return ArgIndices; }
/// Indices of known build info arguments.
enum BuildInfoArg {
CurrentDirectory, ///< Absolute CWD path
BuildTool, ///< Absolute compiler path
SourceFile, ///< Path to main source file, relative or absolute
TypeServerPDB, ///< Absolute path of type server PDB (/Fd)
CommandLine, ///< Full canonical command line (maybe -cc1)
MaxArgs
};
SmallVector<TypeIndex, MaxArgs> ArgIndices;
};
// LF_VFTABLE
class VFTableRecord : public TypeRecord {
public:
VFTableRecord() = default;
explicit VFTableRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
VFTableRecord(TypeIndex CompleteClass, TypeIndex OverriddenVFTable,
uint32_t VFPtrOffset, StringRef Name,
ArrayRef<StringRef> Methods)
: TypeRecord(TypeRecordKind::VFTable), CompleteClass(CompleteClass),
OverriddenVFTable(OverriddenVFTable), VFPtrOffset(VFPtrOffset) {
MethodNames.push_back(Name);
llvm::append_range(MethodNames, Methods);
}
TypeIndex getCompleteClass() const { return CompleteClass; }
TypeIndex getOverriddenVTable() const { return OverriddenVFTable; }
uint32_t getVFPtrOffset() const { return VFPtrOffset; }
StringRef getName() const { return ArrayRef(MethodNames).front(); }
ArrayRef<StringRef> getMethodNames() const {
return ArrayRef(MethodNames).drop_front();
}
TypeIndex CompleteClass;
TypeIndex OverriddenVFTable;
uint32_t VFPtrOffset = 0;
std::vector<StringRef> MethodNames;
};
// LF_ONEMETHOD
class OneMethodRecord : public TypeRecord {
public:
OneMethodRecord() = default;
explicit OneMethodRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
OneMethodRecord(TypeIndex Type, MemberAttributes Attrs, int32_t VFTableOffset,
StringRef Name)
: TypeRecord(TypeRecordKind::OneMethod), Type(Type), Attrs(Attrs),
VFTableOffset(VFTableOffset), Name(Name) {}
OneMethodRecord(TypeIndex Type, MemberAccess Access, MethodKind MK,
MethodOptions Options, int32_t VFTableOffset, StringRef Name)
: TypeRecord(TypeRecordKind::OneMethod), Type(Type),
Attrs(Access, MK, Options), VFTableOffset(VFTableOffset), Name(Name) {}
TypeIndex getType() const { return Type; }
MethodKind getMethodKind() const { return Attrs.getMethodKind(); }
MethodOptions getOptions() const { return Attrs.getFlags(); }
MemberAccess getAccess() const { return Attrs.getAccess(); }
int32_t getVFTableOffset() const { return VFTableOffset; }
StringRef getName() const { return Name; }
bool isIntroducingVirtual() const {
return getMethodKind() == MethodKind::IntroducingVirtual ||
getMethodKind() == MethodKind::PureIntroducingVirtual;
}
TypeIndex Type;
MemberAttributes Attrs;
int32_t VFTableOffset = 0;
StringRef Name;
};
// LF_METHODLIST
class MethodOverloadListRecord : public TypeRecord {
public:
MethodOverloadListRecord() = default;
explicit MethodOverloadListRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
MethodOverloadListRecord(ArrayRef<OneMethodRecord> Methods)
: TypeRecord(TypeRecordKind::MethodOverloadList), Methods(Methods) {}
ArrayRef<OneMethodRecord> getMethods() const { return Methods; }
std::vector<OneMethodRecord> Methods;
};
/// For method overload sets. LF_METHOD
class OverloadedMethodRecord : public TypeRecord {
public:
OverloadedMethodRecord() = default;
explicit OverloadedMethodRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
OverloadedMethodRecord(uint16_t NumOverloads, TypeIndex MethodList,
StringRef Name)
: TypeRecord(TypeRecordKind::OverloadedMethod),
NumOverloads(NumOverloads), MethodList(MethodList), Name(Name) {}
uint16_t getNumOverloads() const { return NumOverloads; }
TypeIndex getMethodList() const { return MethodList; }
StringRef getName() const { return Name; }
uint16_t NumOverloads = 0;
TypeIndex MethodList;
StringRef Name;
};
// LF_MEMBER
class DataMemberRecord : public TypeRecord {
public:
DataMemberRecord() = default;
explicit DataMemberRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
DataMemberRecord(MemberAttributes Attrs, TypeIndex Type, uint64_t Offset,
StringRef Name)
: TypeRecord(TypeRecordKind::DataMember), Attrs(Attrs), Type(Type),
FieldOffset(Offset), Name(Name) {}
DataMemberRecord(MemberAccess Access, TypeIndex Type, uint64_t Offset,
StringRef Name)
: TypeRecord(TypeRecordKind::DataMember), Attrs(Access), Type(Type),
FieldOffset(Offset), Name(Name) {}
MemberAccess getAccess() const { return Attrs.getAccess(); }
TypeIndex getType() const { return Type; }
uint64_t getFieldOffset() const { return FieldOffset; }
StringRef getName() const { return Name; }
MemberAttributes Attrs;
TypeIndex Type;
uint64_t FieldOffset = 0;
StringRef Name;
};
// LF_STMEMBER
class StaticDataMemberRecord : public TypeRecord {
public:
StaticDataMemberRecord() = default;
explicit StaticDataMemberRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
StaticDataMemberRecord(MemberAttributes Attrs, TypeIndex Type, StringRef Name)
: TypeRecord(TypeRecordKind::StaticDataMember), Attrs(Attrs), Type(Type),
Name(Name) {}
StaticDataMemberRecord(MemberAccess Access, TypeIndex Type, StringRef Name)
: TypeRecord(TypeRecordKind::StaticDataMember), Attrs(Access), Type(Type),
Name(Name) {}
MemberAccess getAccess() const { return Attrs.getAccess(); }
TypeIndex getType() const { return Type; }
StringRef getName() const { return Name; }
MemberAttributes Attrs;
TypeIndex Type;
StringRef Name;
};
// LF_ENUMERATE
class EnumeratorRecord : public TypeRecord {
public:
EnumeratorRecord() = default;
explicit EnumeratorRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
EnumeratorRecord(MemberAttributes Attrs, APSInt Value, StringRef Name)
: TypeRecord(TypeRecordKind::Enumerator), Attrs(Attrs),
Value(std::move(Value)), Name(Name) {}
EnumeratorRecord(MemberAccess Access, APSInt Value, StringRef Name)
: TypeRecord(TypeRecordKind::Enumerator), Attrs(Access),
Value(std::move(Value)), Name(Name) {}
MemberAccess getAccess() const { return Attrs.getAccess(); }
APSInt getValue() const { return Value; }
StringRef getName() const { return Name; }
MemberAttributes Attrs;
APSInt Value;
StringRef Name;
};
// LF_VFUNCTAB
class VFPtrRecord : public TypeRecord {
public:
VFPtrRecord() = default;
explicit VFPtrRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
VFPtrRecord(TypeIndex Type)
: TypeRecord(TypeRecordKind::VFPtr), Type(Type) {}
TypeIndex getType() const { return Type; }
TypeIndex Type;
};
// LF_BCLASS, LF_BINTERFACE
class BaseClassRecord : public TypeRecord {
public:
BaseClassRecord() = default;
explicit BaseClassRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
BaseClassRecord(MemberAttributes Attrs, TypeIndex Type, uint64_t Offset)
: TypeRecord(TypeRecordKind::BaseClass), Attrs(Attrs), Type(Type),
Offset(Offset) {}
BaseClassRecord(MemberAccess Access, TypeIndex Type, uint64_t Offset)
: TypeRecord(TypeRecordKind::BaseClass), Attrs(Access), Type(Type),
Offset(Offset) {}
MemberAccess getAccess() const { return Attrs.getAccess(); }
TypeIndex getBaseType() const { return Type; }
uint64_t getBaseOffset() const { return Offset; }
MemberAttributes Attrs;
TypeIndex Type;
uint64_t Offset = 0;
};
// LF_VBCLASS, LF_IVBCLASS
class VirtualBaseClassRecord : public TypeRecord {
public:
VirtualBaseClassRecord() = default;
explicit VirtualBaseClassRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
VirtualBaseClassRecord(TypeRecordKind Kind, MemberAttributes Attrs,
TypeIndex BaseType, TypeIndex VBPtrType,
uint64_t Offset, uint64_t Index)
: TypeRecord(Kind), Attrs(Attrs), BaseType(BaseType),
VBPtrType(VBPtrType), VBPtrOffset(Offset), VTableIndex(Index) {}
VirtualBaseClassRecord(TypeRecordKind Kind, MemberAccess Access,
TypeIndex BaseType, TypeIndex VBPtrType,
uint64_t Offset, uint64_t Index)
: TypeRecord(Kind), Attrs(Access), BaseType(BaseType),
VBPtrType(VBPtrType), VBPtrOffset(Offset), VTableIndex(Index) {}
MemberAccess getAccess() const { return Attrs.getAccess(); }
TypeIndex getBaseType() const { return BaseType; }
TypeIndex getVBPtrType() const { return VBPtrType; }
uint64_t getVBPtrOffset() const { return VBPtrOffset; }
uint64_t getVTableIndex() const { return VTableIndex; }
MemberAttributes Attrs;
TypeIndex BaseType;
TypeIndex VBPtrType;
uint64_t VBPtrOffset = 0;
uint64_t VTableIndex = 0;
};
/// LF_INDEX - Used to chain two large LF_FIELDLIST or LF_METHODLIST records
/// together. The first will end in an LF_INDEX record that points to the next.
class ListContinuationRecord : public TypeRecord {
public:
ListContinuationRecord() = default;
explicit ListContinuationRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
ListContinuationRecord(TypeIndex ContinuationIndex)
: TypeRecord(TypeRecordKind::ListContinuation),
ContinuationIndex(ContinuationIndex) {}
TypeIndex getContinuationIndex() const { return ContinuationIndex; }
TypeIndex ContinuationIndex;
};
// LF_PRECOMP
class PrecompRecord : public TypeRecord {
public:
PrecompRecord() = default;
explicit PrecompRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
uint32_t getStartTypeIndex() const { return StartTypeIndex; }
uint32_t getTypesCount() const { return TypesCount; }
uint32_t getSignature() const { return Signature; }
StringRef getPrecompFilePath() const { return PrecompFilePath; }
uint32_t StartTypeIndex = 0;
uint32_t TypesCount = 0;
uint32_t Signature = 0;
StringRef PrecompFilePath;
};
// LF_ENDPRECOMP
class EndPrecompRecord : public TypeRecord {
public:
EndPrecompRecord() = default;
explicit EndPrecompRecord(TypeRecordKind Kind) : TypeRecord(Kind) {}
uint32_t getSignature() const { return Signature; }
uint32_t Signature = 0;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_TYPERECORD_H
PK hwFZ���� � DebugInfo/CodeView/CVRecord.hnu �[��� //===- CVRecord.h -----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_CVRECORD_H
#define LLVM_DEBUGINFO_CODEVIEW_CVRECORD_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/CodeViewError.h"
#include "llvm/DebugInfo/CodeView/RecordSerialization.h"
#include "llvm/Support/BinaryStreamReader.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <cstdint>
namespace llvm {
namespace codeview {
/// CVRecord is a fat pointer (base + size pair) to a symbol or type record.
/// Carrying the size separately instead of trusting the size stored in the
/// record prefix provides some extra safety and flexibility.
template <typename Kind> class CVRecord {
public:
CVRecord() = default;
CVRecord(ArrayRef<uint8_t> Data) : RecordData(Data) {}
CVRecord(const RecordPrefix *P, size_t Size)
: RecordData(reinterpret_cast<const uint8_t *>(P), Size) {}
bool valid() const { return kind() != Kind(0); }
uint32_t length() const { return RecordData.size(); }
Kind kind() const {
if (RecordData.size() < sizeof(RecordPrefix))
return Kind(0);
return static_cast<Kind>(static_cast<uint16_t>(
reinterpret_cast<const RecordPrefix *>(RecordData.data())->RecordKind));
}
ArrayRef<uint8_t> data() const { return RecordData; }
StringRef str_data() const {
return StringRef(reinterpret_cast<const char *>(RecordData.data()),
RecordData.size());
}
ArrayRef<uint8_t> content() const {
return RecordData.drop_front(sizeof(RecordPrefix));
}
ArrayRef<uint8_t> RecordData;
};
// There are two kinds of codeview records: type and symbol records.
using CVType = CVRecord<TypeLeafKind>;
using CVSymbol = CVRecord<SymbolKind>;
template <typename Record, typename Func>
Error forEachCodeViewRecord(ArrayRef<uint8_t> StreamBuffer, Func F) {
while (!StreamBuffer.empty()) {
if (StreamBuffer.size() < sizeof(RecordPrefix))
return make_error<CodeViewError>(cv_error_code::corrupt_record);
const RecordPrefix *Prefix =
reinterpret_cast<const RecordPrefix *>(StreamBuffer.data());
size_t RealLen = Prefix->RecordLen + 2;
if (StreamBuffer.size() < RealLen)
return make_error<CodeViewError>(cv_error_code::corrupt_record);
ArrayRef<uint8_t> Data = StreamBuffer.take_front(RealLen);
StreamBuffer = StreamBuffer.drop_front(RealLen);
Record R(Data);
if (auto EC = F(R))
return EC;
}
return Error::success();
}
/// Read a complete record from a stream at a random offset.
template <typename Kind>
inline Expected<CVRecord<Kind>> readCVRecordFromStream(BinaryStreamRef Stream,
uint32_t Offset) {
const RecordPrefix *Prefix = nullptr;
BinaryStreamReader Reader(Stream);
Reader.setOffset(Offset);
if (auto EC = Reader.readObject(Prefix))
return std::move(EC);
if (Prefix->RecordLen < 2)
return make_error<CodeViewError>(cv_error_code::corrupt_record);
Reader.setOffset(Offset);
ArrayRef<uint8_t> RawData;
if (auto EC = Reader.readBytes(RawData, Prefix->RecordLen + sizeof(uint16_t)))
return std::move(EC);
return codeview::CVRecord<Kind>(RawData);
}
} // end namespace codeview
template <typename Kind>
struct VarStreamArrayExtractor<codeview::CVRecord<Kind>> {
Error operator()(BinaryStreamRef Stream, uint32_t &Len,
codeview::CVRecord<Kind> &Item) {
auto ExpectedRec = codeview::readCVRecordFromStream<Kind>(Stream, 0);
if (!ExpectedRec)
return ExpectedRec.takeError();
Item = *ExpectedRec;
Len = ExpectedRec->length();
return Error::success();
}
};
namespace codeview {
using CVSymbolArray = VarStreamArray<CVSymbol>;
using CVTypeArray = VarStreamArray<CVType>;
using CVTypeRange = iterator_range<CVTypeArray::Iterator>;
} // namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_CVRECORD_H
PK hwFZr�|� , DebugInfo/CodeView/DebugCrossImpSubsection.hnu �[��� //===- DebugCrossImpSubsection.h --------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_DEBUGCROSSIMPSUBSECTION_H
#define LLVM_DEBUGINFO_CODEVIEW_DEBUGCROSSIMPSUBSECTION_H
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/DebugSubsection.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <vector>
namespace llvm {
class BinaryStreamReader;
class BinaryStreamWriter;
namespace codeview {
struct CrossModuleImportItem {
const CrossModuleImport *Header = nullptr;
FixedStreamArray<support::ulittle32_t> Imports;
};
} // end namespace codeview
template <> struct VarStreamArrayExtractor<codeview::CrossModuleImportItem> {
public:
using ContextType = void;
Error operator()(BinaryStreamRef Stream, uint32_t &Len,
codeview::CrossModuleImportItem &Item);
};
namespace codeview {
class DebugStringTableSubsection;
class DebugCrossModuleImportsSubsectionRef final : public DebugSubsectionRef {
using ReferenceArray = VarStreamArray<CrossModuleImportItem>;
using Iterator = ReferenceArray::Iterator;
public:
DebugCrossModuleImportsSubsectionRef()
: DebugSubsectionRef(DebugSubsectionKind::CrossScopeImports) {}
static bool classof(const DebugSubsectionRef *S) {
return S->kind() == DebugSubsectionKind::CrossScopeImports;
}
Error initialize(BinaryStreamReader Reader);
Error initialize(BinaryStreamRef Stream);
Iterator begin() const { return References.begin(); }
Iterator end() const { return References.end(); }
private:
ReferenceArray References;
};
class DebugCrossModuleImportsSubsection final : public DebugSubsection {
public:
explicit DebugCrossModuleImportsSubsection(
DebugStringTableSubsection &Strings)
: DebugSubsection(DebugSubsectionKind::CrossScopeImports),
Strings(Strings) {}
static bool classof(const DebugSubsection *S) {
return S->kind() == DebugSubsectionKind::CrossScopeImports;
}
void addImport(StringRef Module, uint32_t ImportId);
uint32_t calculateSerializedSize() const override;
Error commit(BinaryStreamWriter &Writer) const override;
private:
DebugStringTableSubsection &Strings;
StringMap<std::vector<support::ulittle32_t>> Mappings;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_DEBUGCROSSIMPSUBSECTION_H
PK hwFZ�x x + DebugInfo/CodeView/DebugSubsectionVisitor.hnu �[��� //===- DebugSubsectionVisitor.h -----------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_DEBUGSUBSECTIONVISITOR_H
#define LLVM_DEBUGINFO_CODEVIEW_DEBUGSUBSECTIONVISITOR_H
#include "llvm/DebugInfo/CodeView/StringsAndChecksums.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace codeview {
class DebugChecksumsSubsectionRef;
class DebugSubsectionRecord;
class DebugInlineeLinesSubsectionRef;
class DebugCrossModuleExportsSubsectionRef;
class DebugCrossModuleImportsSubsectionRef;
class DebugFrameDataSubsectionRef;
class DebugLinesSubsectionRef;
class DebugStringTableSubsectionRef;
class DebugSymbolRVASubsectionRef;
class DebugSymbolsSubsectionRef;
class DebugUnknownSubsectionRef;
class DebugSubsectionVisitor {
public:
virtual ~DebugSubsectionVisitor() = default;
virtual Error visitUnknown(DebugUnknownSubsectionRef &Unknown) {
return Error::success();
}
virtual Error visitLines(DebugLinesSubsectionRef &Lines,
const StringsAndChecksumsRef &State) = 0;
virtual Error visitFileChecksums(DebugChecksumsSubsectionRef &Checksums,
const StringsAndChecksumsRef &State) = 0;
virtual Error visitInlineeLines(DebugInlineeLinesSubsectionRef &Inlinees,
const StringsAndChecksumsRef &State) = 0;
virtual Error
visitCrossModuleExports(DebugCrossModuleExportsSubsectionRef &CSE,
const StringsAndChecksumsRef &State) = 0;
virtual Error
visitCrossModuleImports(DebugCrossModuleImportsSubsectionRef &CSE,
const StringsAndChecksumsRef &State) = 0;
virtual Error visitStringTable(DebugStringTableSubsectionRef &ST,
const StringsAndChecksumsRef &State) = 0;
virtual Error visitSymbols(DebugSymbolsSubsectionRef &CSE,
const StringsAndChecksumsRef &State) = 0;
virtual Error visitFrameData(DebugFrameDataSubsectionRef &FD,
const StringsAndChecksumsRef &State) = 0;
virtual Error visitCOFFSymbolRVAs(DebugSymbolRVASubsectionRef &RVAs,
const StringsAndChecksumsRef &State) = 0;
};
Error visitDebugSubsection(const DebugSubsectionRecord &R,
DebugSubsectionVisitor &V,
const StringsAndChecksumsRef &State);
namespace detail {
template <typename T>
Error visitDebugSubsections(T &&FragmentRange, DebugSubsectionVisitor &V,
StringsAndChecksumsRef &State) {
State.initialize(std::forward<T>(FragmentRange));
for (const DebugSubsectionRecord &L : FragmentRange) {
if (auto EC = visitDebugSubsection(L, V, State))
return EC;
}
return Error::success();
}
} // namespace detail
template <typename T>
Error visitDebugSubsections(T &&FragmentRange, DebugSubsectionVisitor &V) {
StringsAndChecksumsRef State;
return detail::visitDebugSubsections(std::forward<T>(FragmentRange), V,
State);
}
template <typename T>
Error visitDebugSubsections(T &&FragmentRange, DebugSubsectionVisitor &V,
const DebugStringTableSubsectionRef &Strings) {
StringsAndChecksumsRef State(Strings);
return detail::visitDebugSubsections(std::forward<T>(FragmentRange), V,
State);
}
template <typename T>
Error visitDebugSubsections(T &&FragmentRange, DebugSubsectionVisitor &V,
const DebugStringTableSubsectionRef &Strings,
const DebugChecksumsSubsectionRef &Checksums) {
StringsAndChecksumsRef State(Strings, Checksums);
return detail::visitDebugSubsections(std::forward<T>(FragmentRange), V,
State);
}
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_DEBUGSUBSECTIONVISITOR_H
PK hwFZ�hU��' �' DebugInfo/CodeView/TypeIndex.hnu �[��� //===- TypeIndex.h ----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_TYPEINDEX_H
#define LLVM_DEBUGINFO_CODEVIEW_TYPEINDEX_H
#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/Support/Endian.h"
#include <cassert>
#include <cinttypes>
namespace llvm {
class ScopedPrinter;
class StringRef;
namespace codeview {
class TypeCollection;
enum class SimpleTypeKind : uint32_t {
None = 0x0000, // uncharacterized type (no type)
Void = 0x0003, // void
NotTranslated = 0x0007, // type not translated by cvpack
HResult = 0x0008, // OLE/COM HRESULT
SignedCharacter = 0x0010, // 8 bit signed
UnsignedCharacter = 0x0020, // 8 bit unsigned
NarrowCharacter = 0x0070, // really a char
WideCharacter = 0x0071, // wide char
Character16 = 0x007a, // char16_t
Character32 = 0x007b, // char32_t
Character8 = 0x007c, // char8_t
SByte = 0x0068, // 8 bit signed int
Byte = 0x0069, // 8 bit unsigned int
Int16Short = 0x0011, // 16 bit signed
UInt16Short = 0x0021, // 16 bit unsigned
Int16 = 0x0072, // 16 bit signed int
UInt16 = 0x0073, // 16 bit unsigned int
Int32Long = 0x0012, // 32 bit signed
UInt32Long = 0x0022, // 32 bit unsigned
Int32 = 0x0074, // 32 bit signed int
UInt32 = 0x0075, // 32 bit unsigned int
Int64Quad = 0x0013, // 64 bit signed
UInt64Quad = 0x0023, // 64 bit unsigned
Int64 = 0x0076, // 64 bit signed int
UInt64 = 0x0077, // 64 bit unsigned int
Int128Oct = 0x0014, // 128 bit signed int
UInt128Oct = 0x0024, // 128 bit unsigned int
Int128 = 0x0078, // 128 bit signed int
UInt128 = 0x0079, // 128 bit unsigned int
Float16 = 0x0046, // 16 bit real
Float32 = 0x0040, // 32 bit real
Float32PartialPrecision = 0x0045, // 32 bit PP real
Float48 = 0x0044, // 48 bit real
Float64 = 0x0041, // 64 bit real
Float80 = 0x0042, // 80 bit real
Float128 = 0x0043, // 128 bit real
Complex16 = 0x0056, // 16 bit complex
Complex32 = 0x0050, // 32 bit complex
Complex32PartialPrecision = 0x0055, // 32 bit PP complex
Complex48 = 0x0054, // 48 bit complex
Complex64 = 0x0051, // 64 bit complex
Complex80 = 0x0052, // 80 bit complex
Complex128 = 0x0053, // 128 bit complex
Boolean8 = 0x0030, // 8 bit boolean
Boolean16 = 0x0031, // 16 bit boolean
Boolean32 = 0x0032, // 32 bit boolean
Boolean64 = 0x0033, // 64 bit boolean
Boolean128 = 0x0034, // 128 bit boolean
};
enum class SimpleTypeMode : uint32_t {
Direct = 0x00000000, // Not a pointer
NearPointer = 0x00000100, // Near pointer
FarPointer = 0x00000200, // Far pointer
HugePointer = 0x00000300, // Huge pointer
NearPointer32 = 0x00000400, // 32 bit near pointer
FarPointer32 = 0x00000500, // 32 bit far pointer
NearPointer64 = 0x00000600, // 64 bit near pointer
NearPointer128 = 0x00000700 // 128 bit near pointer
};
/// A 32-bit type reference. Types are indexed by their order of appearance in
/// .debug$T plus 0x1000. Type indices less than 0x1000 are "simple" types,
/// composed of a SimpleTypeMode byte followed by a SimpleTypeKind byte.
class TypeIndex {
public:
static const uint32_t FirstNonSimpleIndex = 0x1000;
static const uint32_t SimpleKindMask = 0x000000ff;
static const uint32_t SimpleModeMask = 0x00000700;
static const uint32_t DecoratedItemIdMask = 0x80000000;
public:
TypeIndex() : Index(static_cast<uint32_t>(SimpleTypeKind::None)) {}
explicit TypeIndex(uint32_t Index) : Index(Index) {}
explicit TypeIndex(SimpleTypeKind Kind)
: Index(static_cast<uint32_t>(Kind)) {}
TypeIndex(SimpleTypeKind Kind, SimpleTypeMode Mode)
: Index(static_cast<uint32_t>(Kind) | static_cast<uint32_t>(Mode)) {}
uint32_t getIndex() const { return Index; }
void setIndex(uint32_t I) { Index = I; }
bool isSimple() const { return Index < FirstNonSimpleIndex; }
bool isDecoratedItemId() const { return !!(Index & DecoratedItemIdMask); }
bool isNoneType() const { return *this == None(); }
uint32_t toArrayIndex() const {
assert(!isSimple());
return (getIndex() & ~DecoratedItemIdMask) - FirstNonSimpleIndex;
}
static TypeIndex fromArrayIndex(uint32_t Index) {
return TypeIndex(Index + FirstNonSimpleIndex);
}
static TypeIndex fromDecoratedArrayIndex(bool IsItem, uint32_t Index) {
return TypeIndex((Index + FirstNonSimpleIndex) |
(IsItem ? DecoratedItemIdMask : 0));
}
TypeIndex removeDecoration() {
return TypeIndex(Index & ~DecoratedItemIdMask);
}
SimpleTypeKind getSimpleKind() const {
assert(isSimple());
return static_cast<SimpleTypeKind>(Index & SimpleKindMask);
}
SimpleTypeMode getSimpleMode() const {
assert(isSimple());
return static_cast<SimpleTypeMode>(Index & SimpleModeMask);
}
TypeIndex makeDirect() const { return TypeIndex{getSimpleKind()}; }
static TypeIndex None() { return TypeIndex(SimpleTypeKind::None); }
static TypeIndex Void() { return TypeIndex(SimpleTypeKind::Void); }
static TypeIndex VoidPointer32() {
return TypeIndex(SimpleTypeKind::Void, SimpleTypeMode::NearPointer32);
}
static TypeIndex VoidPointer64() {
return TypeIndex(SimpleTypeKind::Void, SimpleTypeMode::NearPointer64);
}
static TypeIndex NullptrT() {
// std::nullptr_t uses the pointer mode that doesn't indicate bit-width,
// presumably because std::nullptr_t is intended to be compatible with any
// pointer type.
return TypeIndex(SimpleTypeKind::Void, SimpleTypeMode::NearPointer);
}
static TypeIndex SignedCharacter() {
return TypeIndex(SimpleTypeKind::SignedCharacter);
}
static TypeIndex UnsignedCharacter() {
return TypeIndex(SimpleTypeKind::UnsignedCharacter);
}
static TypeIndex NarrowCharacter() {
return TypeIndex(SimpleTypeKind::NarrowCharacter);
}
static TypeIndex WideCharacter() {
return TypeIndex(SimpleTypeKind::WideCharacter);
}
static TypeIndex Int16Short() {
return TypeIndex(SimpleTypeKind::Int16Short);
}
static TypeIndex UInt16Short() {
return TypeIndex(SimpleTypeKind::UInt16Short);
}
static TypeIndex Int32() { return TypeIndex(SimpleTypeKind::Int32); }
static TypeIndex UInt32() { return TypeIndex(SimpleTypeKind::UInt32); }
static TypeIndex Int32Long() { return TypeIndex(SimpleTypeKind::Int32Long); }
static TypeIndex UInt32Long() {
return TypeIndex(SimpleTypeKind::UInt32Long);
}
static TypeIndex Int64() { return TypeIndex(SimpleTypeKind::Int64); }
static TypeIndex UInt64() { return TypeIndex(SimpleTypeKind::UInt64); }
static TypeIndex Int64Quad() { return TypeIndex(SimpleTypeKind::Int64Quad); }
static TypeIndex UInt64Quad() {
return TypeIndex(SimpleTypeKind::UInt64Quad);
}
static TypeIndex Float32() { return TypeIndex(SimpleTypeKind::Float32); }
static TypeIndex Float64() { return TypeIndex(SimpleTypeKind::Float64); }
TypeIndex &operator+=(unsigned N) {
Index += N;
return *this;
}
TypeIndex &operator++() {
Index += 1;
return *this;
}
TypeIndex operator++(int) {
TypeIndex Copy = *this;
operator++();
return Copy;
}
TypeIndex &operator-=(unsigned N) {
assert(Index >= N);
Index -= N;
return *this;
}
TypeIndex &operator--() {
Index -= 1;
return *this;
}
TypeIndex operator--(int) {
TypeIndex Copy = *this;
operator--();
return Copy;
}
friend inline bool operator==(const TypeIndex &A, const TypeIndex &B) {
return A.getIndex() == B.getIndex();
}
friend inline bool operator!=(const TypeIndex &A, const TypeIndex &B) {
return A.getIndex() != B.getIndex();
}
friend inline bool operator<(const TypeIndex &A, const TypeIndex &B) {
return A.getIndex() < B.getIndex();
}
friend inline bool operator<=(const TypeIndex &A, const TypeIndex &B) {
return A.getIndex() <= B.getIndex();
}
friend inline bool operator>(const TypeIndex &A, const TypeIndex &B) {
return A.getIndex() > B.getIndex();
}
friend inline bool operator>=(const TypeIndex &A, const TypeIndex &B) {
return A.getIndex() >= B.getIndex();
}
friend inline TypeIndex operator+(const TypeIndex &A, uint32_t N) {
TypeIndex Result(A);
Result += N;
return Result;
}
friend inline TypeIndex operator-(const TypeIndex &A, uint32_t N) {
assert(A.getIndex() >= N);
TypeIndex Result(A);
Result -= N;
return Result;
}
friend inline uint32_t operator-(const TypeIndex &A, const TypeIndex &B) {
assert(A >= B);
return A.toArrayIndex() - B.toArrayIndex();
}
static StringRef simpleTypeName(TypeIndex TI);
private:
support::ulittle32_t Index;
};
// Used for pseudo-indexing an array of type records. An array of such records
// sorted by TypeIndex can allow log(N) lookups even though such a type record
// stream does not provide random access.
struct TypeIndexOffset {
TypeIndex Type;
support::ulittle32_t Offset;
};
void printTypeIndex(ScopedPrinter &Printer, StringRef FieldName, TypeIndex TI,
TypeCollection &Types);
}
template <> struct DenseMapInfo<codeview::TypeIndex> {
static inline codeview::TypeIndex getEmptyKey() {
return codeview::TypeIndex{DenseMapInfo<uint32_t>::getEmptyKey()};
}
static inline codeview::TypeIndex getTombstoneKey() {
return codeview::TypeIndex{DenseMapInfo<uint32_t>::getTombstoneKey()};
}
static unsigned getHashValue(const codeview::TypeIndex &TI) {
return DenseMapInfo<uint32_t>::getHashValue(TI.getIndex());
}
static bool isEqual(const codeview::TypeIndex &LHS,
const codeview::TypeIndex &RHS) {
return LHS == RHS;
}
};
} // namespace llvm
#endif
PK hwFZ���U�# �# DebugInfo/CodeView/TypeHashing.hnu �[��� //===- TypeHashing.h ---------------------------------------------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_TYPEHASHING_H
#define LLVM_DEBUGINFO_CODEVIEW_TYPEHASHING_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/Hashing.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/TypeCollection.h"
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
#include "llvm/Support/FormatProviders.h"
#include <type_traits>
namespace llvm {
class raw_ostream;
namespace codeview {
/// A locally hashed type represents a straightforward hash code of a serialized
/// record. The record is simply serialized, and then the bytes are hashed by
/// a standard algorithm. This is sufficient for the case of de-duplicating
/// records within a single sequence of types, because if two records both have
/// a back-reference to the same type in the same stream, they will both have
/// the same numeric value for the TypeIndex of the back reference.
struct LocallyHashedType {
hash_code Hash;
ArrayRef<uint8_t> RecordData;
/// Given a type, compute its local hash.
static LocallyHashedType hashType(ArrayRef<uint8_t> RecordData);
/// Given a sequence of types, compute all of the local hashes.
template <typename Range>
static std::vector<LocallyHashedType> hashTypes(Range &&Records) {
std::vector<LocallyHashedType> Hashes;
Hashes.reserve(std::distance(std::begin(Records), std::end(Records)));
for (const auto &R : Records)
Hashes.push_back(hashType(R));
return Hashes;
}
static std::vector<LocallyHashedType>
hashTypeCollection(TypeCollection &Types) {
std::vector<LocallyHashedType> Hashes;
Types.ForEachRecord([&Hashes](TypeIndex TI, const CVType &Type) {
Hashes.push_back(hashType(Type.RecordData));
});
return Hashes;
}
};
enum class GlobalTypeHashAlg : uint16_t {
SHA1 = 0, // standard 20-byte SHA1 hash
SHA1_8, // last 8-bytes of standard SHA1 hash
BLAKE3, // truncated 8-bytes BLAKE3
};
/// A globally hashed type represents a hash value that is sufficient to
/// uniquely identify a record across multiple type streams or type sequences.
/// This works by, for any given record A which references B, replacing the
/// TypeIndex that refers to B with a previously-computed global hash for B. As
/// this is a recursive algorithm (e.g. the global hash of B also depends on the
/// global hashes of the types that B refers to), a global hash can uniquely
/// identify identify that A occurs in another stream that has a completely
/// different graph structure. Although the hash itself is slower to compute,
/// probing is much faster with a globally hashed type, because the hash itself
/// is considered "as good as" the original type. Since type records can be
/// quite large, this makes the equality comparison of the hash much faster than
/// equality comparison of a full record.
struct GloballyHashedType {
GloballyHashedType() = default;
GloballyHashedType(StringRef H)
: GloballyHashedType(ArrayRef<uint8_t>(H.bytes_begin(), H.bytes_end())) {}
GloballyHashedType(ArrayRef<uint8_t> H) {
assert(H.size() == 8);
::memcpy(Hash.data(), H.data(), 8);
}
std::array<uint8_t, 8> Hash;
bool empty() const { return *(const uint64_t*)Hash.data() == 0; }
friend inline bool operator==(const GloballyHashedType &L,
const GloballyHashedType &R) {
return L.Hash == R.Hash;
}
friend inline bool operator!=(const GloballyHashedType &L,
const GloballyHashedType &R) {
return !(L.Hash == R.Hash);
}
/// Given a sequence of bytes representing a record, compute a global hash for
/// this record. Due to the nature of global hashes incorporating the hashes
/// of referenced records, this function requires a list of types and ids
/// that RecordData might reference, indexable by TypeIndex.
static GloballyHashedType hashType(ArrayRef<uint8_t> RecordData,
ArrayRef<GloballyHashedType> PreviousTypes,
ArrayRef<GloballyHashedType> PreviousIds);
/// Given a sequence of bytes representing a record, compute a global hash for
/// this record. Due to the nature of global hashes incorporating the hashes
/// of referenced records, this function requires a list of types and ids
/// that RecordData might reference, indexable by TypeIndex.
static GloballyHashedType hashType(CVType Type,
ArrayRef<GloballyHashedType> PreviousTypes,
ArrayRef<GloballyHashedType> PreviousIds) {
return hashType(Type.RecordData, PreviousTypes, PreviousIds);
}
/// Given a sequence of combined type and ID records, compute global hashes
/// for each of them, returning the results in a vector of hashed types.
template <typename Range>
static std::vector<GloballyHashedType> hashTypes(Range &&Records) {
std::vector<GloballyHashedType> Hashes;
bool UnresolvedRecords = false;
for (const auto &R : Records) {
GloballyHashedType H = hashType(R, Hashes, Hashes);
if (H.empty())
UnresolvedRecords = true;
Hashes.push_back(H);
}
// In some rare cases, there might be records with forward references in the
// stream. Several passes might be needed to fully hash each record in the
// Type stream. However this occurs on very small OBJs generated by MASM,
// with a dozen records at most. Therefore this codepath isn't
// time-critical, as it isn't taken in 99% of cases.
while (UnresolvedRecords) {
UnresolvedRecords = false;
auto HashIt = Hashes.begin();
for (const auto &R : Records) {
if (HashIt->empty()) {
GloballyHashedType H = hashType(R, Hashes, Hashes);
if (H.empty())
UnresolvedRecords = true;
else
*HashIt = H;
}
++HashIt;
}
}
return Hashes;
}
/// Given a sequence of combined type and ID records, compute global hashes
/// for each of them, returning the results in a vector of hashed types.
template <typename Range>
static std::vector<GloballyHashedType>
hashIds(Range &&Records, ArrayRef<GloballyHashedType> TypeHashes) {
std::vector<GloballyHashedType> IdHashes;
for (const auto &R : Records)
IdHashes.push_back(hashType(R, TypeHashes, IdHashes));
return IdHashes;
}
static std::vector<GloballyHashedType>
hashTypeCollection(TypeCollection &Types) {
std::vector<GloballyHashedType> Hashes;
Types.ForEachRecord([&Hashes](TypeIndex TI, const CVType &Type) {
Hashes.push_back(hashType(Type.RecordData, Hashes, Hashes));
});
return Hashes;
}
};
static_assert(std::is_trivially_copyable<GloballyHashedType>::value,
"GloballyHashedType must be trivially copyable so that we can "
"reinterpret_cast arrays of hash data to arrays of "
"GloballyHashedType");
} // namespace codeview
template <> struct DenseMapInfo<codeview::LocallyHashedType> {
static codeview::LocallyHashedType Empty;
static codeview::LocallyHashedType Tombstone;
static codeview::LocallyHashedType getEmptyKey() { return Empty; }
static codeview::LocallyHashedType getTombstoneKey() { return Tombstone; }
static unsigned getHashValue(codeview::LocallyHashedType Val) {
return Val.Hash;
}
static bool isEqual(codeview::LocallyHashedType LHS,
codeview::LocallyHashedType RHS) {
if (LHS.Hash != RHS.Hash)
return false;
return LHS.RecordData == RHS.RecordData;
}
};
template <> struct DenseMapInfo<codeview::GloballyHashedType> {
static codeview::GloballyHashedType Empty;
static codeview::GloballyHashedType Tombstone;
static codeview::GloballyHashedType getEmptyKey() { return Empty; }
static codeview::GloballyHashedType getTombstoneKey() { return Tombstone; }
static unsigned getHashValue(codeview::GloballyHashedType Val) {
return *reinterpret_cast<const unsigned *>(Val.Hash.data());
}
static bool isEqual(codeview::GloballyHashedType LHS,
codeview::GloballyHashedType RHS) {
return LHS == RHS;
}
};
template <> struct format_provider<codeview::LocallyHashedType> {
public:
static void format(const codeview::LocallyHashedType &V,
llvm::raw_ostream &Stream, StringRef Style) {
write_hex(Stream, V.Hash, HexPrintStyle::Upper, 8);
}
};
template <> struct format_provider<codeview::GloballyHashedType> {
public:
static void format(const codeview::GloballyHashedType &V,
llvm::raw_ostream &Stream, StringRef Style) {
for (uint8_t B : V.Hash) {
write_hex(Stream, B, HexPrintStyle::Upper, 2);
}
}
};
} // namespace llvm
#endif
PK hwFZ@^�Q� � % DebugInfo/CodeView/TypeStreamMerger.hnu �[��� //===- TypeStreamMerger.h ---------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_TYPESTREAMMERGER_H
#define LLVM_DEBUGINFO_CODEVIEW_TYPESTREAMMERGER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/Support/Error.h"
namespace llvm {
template <typename T> class SmallVectorImpl;
namespace codeview {
class TypeIndex;
struct GloballyHashedType;
class GlobalTypeTableBuilder;
class MergingTypeTableBuilder;
/// Used to forward information about PCH.OBJ (precompiled) files, when
/// applicable.
struct PCHMergerInfo {
uint32_t PCHSignature{};
uint32_t EndPrecompIndex = ~0U;
};
/// Merge one set of type records into another. This method assumes
/// that all records are type records, and there are no Id records present.
///
/// \param Dest The table to store the re-written type records into.
///
/// \param SourceToDest A vector, indexed by the TypeIndex in the source
/// type stream, that contains the index of the corresponding type record
/// in the destination stream.
///
/// \param Types The collection of types to merge in.
///
/// \returns Error::success() if the operation succeeded, otherwise an
/// appropriate error code.
Error mergeTypeRecords(MergingTypeTableBuilder &Dest,
SmallVectorImpl<TypeIndex> &SourceToDest,
const CVTypeArray &Types);
/// Merge one set of id records into another. This method assumes
/// that all records are id records, and there are no Type records present.
/// However, since Id records can refer back to Type records, this method
/// assumes that the referenced type records have also been merged into
/// another type stream (for example using the above method), and accepts
/// the mapping from source to dest for that stream so that it can re-write
/// the type record mappings accordingly.
///
/// \param Dest The table to store the re-written id records into.
///
/// \param Types The mapping to use for the type records that these id
/// records refer to.
///
/// \param SourceToDest A vector, indexed by the TypeIndex in the source
/// id stream, that contains the index of the corresponding id record
/// in the destination stream.
///
/// \param Ids The collection of id records to merge in.
///
/// \returns Error::success() if the operation succeeded, otherwise an
/// appropriate error code.
Error mergeIdRecords(MergingTypeTableBuilder &Dest, ArrayRef<TypeIndex> Types,
SmallVectorImpl<TypeIndex> &SourceToDest,
const CVTypeArray &Ids);
/// Merge a unified set of type and id records, splitting them into
/// separate output streams.
///
/// \param DestIds The table to store the re-written id records into.
///
/// \param DestTypes the table to store the re-written type records into.
///
/// \param SourceToDest A vector, indexed by the TypeIndex in the source
/// id stream, that contains the index of the corresponding id record
/// in the destination stream.
///
/// \param IdsAndTypes The collection of id records to merge in.
///
/// \returns Error::success() if the operation succeeded, otherwise an
/// appropriate error code.
Error mergeTypeAndIdRecords(MergingTypeTableBuilder &DestIds,
MergingTypeTableBuilder &DestTypes,
SmallVectorImpl<TypeIndex> &SourceToDest,
const CVTypeArray &IdsAndTypes,
std::optional<PCHMergerInfo> &PCHInfo);
Error mergeTypeAndIdRecords(GlobalTypeTableBuilder &DestIds,
GlobalTypeTableBuilder &DestTypes,
SmallVectorImpl<TypeIndex> &SourceToDest,
const CVTypeArray &IdsAndTypes,
ArrayRef<GloballyHashedType> Hashes,
std::optional<PCHMergerInfo> &PCHInfo);
Error mergeTypeRecords(GlobalTypeTableBuilder &Dest,
SmallVectorImpl<TypeIndex> &SourceToDest,
const CVTypeArray &Types,
ArrayRef<GloballyHashedType> Hashes,
std::optional<PCHMergerInfo> &PCHInfo);
Error mergeIdRecords(GlobalTypeTableBuilder &Dest, ArrayRef<TypeIndex> Types,
SmallVectorImpl<TypeIndex> &SourceToDest,
const CVTypeArray &Ids,
ArrayRef<GloballyHashedType> Hashes);
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_TYPESTREAMMERGER_H
PK hwFZ!@ ( DebugInfo/CodeView/SymbolRecordMapping.hnu �[��� //===- SymbolRecordMapping.h ------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_SYMBOLRECORDMAPPING_H
#define LLVM_DEBUGINFO_CODEVIEW_SYMBOLRECORDMAPPING_H
#include "llvm/DebugInfo/CodeView/CodeViewRecordIO.h"
#include "llvm/DebugInfo/CodeView/SymbolVisitorCallbacks.h"
namespace llvm {
class BinaryStreamReader;
class BinaryStreamWriter;
namespace codeview {
class SymbolRecordMapping : public SymbolVisitorCallbacks {
public:
explicit SymbolRecordMapping(BinaryStreamReader &Reader,
CodeViewContainer Container)
: IO(Reader), Container(Container) {}
explicit SymbolRecordMapping(BinaryStreamWriter &Writer,
CodeViewContainer Container)
: IO(Writer), Container(Container) {}
Error visitSymbolBegin(CVSymbol &Record) override;
Error visitSymbolEnd(CVSymbol &Record) override;
#define SYMBOL_RECORD(EnumName, EnumVal, Name) \
Error visitKnownRecord(CVSymbol &CVR, Name &Record) override;
#define SYMBOL_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
#include "llvm/DebugInfo/CodeView/CodeViewSymbols.def"
private:
std::optional<SymbolKind> Kind;
CodeViewRecordIO IO;
CodeViewContainer Container;
};
}
}
#endif
PK hwFZ��<)H H 0 DebugInfo/CodeView/DebugInlineeLinesSubsection.hnu �[��� //===- DebugInlineeLinesSubsection.h ----------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_DEBUGINLINEELINESSUBSECTION_H
#define LLVM_DEBUGINFO_CODEVIEW_DEBUGINLINEELINESSUBSECTION_H
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/DebugSubsection.h"
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/BinaryStreamReader.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <vector>
namespace llvm {
namespace codeview {
class DebugChecksumsSubsection;
enum class InlineeLinesSignature : uint32_t {
Normal, // CV_INLINEE_SOURCE_LINE_SIGNATURE
ExtraFiles // CV_INLINEE_SOURCE_LINE_SIGNATURE_EX
};
struct InlineeSourceLineHeader {
TypeIndex Inlinee; // ID of the function that was inlined.
support::ulittle32_t FileID; // Offset into FileChecksums subsection.
support::ulittle32_t SourceLineNum; // First line of inlined code.
// If extra files present:
// ulittle32_t ExtraFileCount;
// ulittle32_t Files[];
};
struct InlineeSourceLine {
const InlineeSourceLineHeader *Header;
FixedStreamArray<support::ulittle32_t> ExtraFiles;
};
} // end namespace codeview
template <> struct VarStreamArrayExtractor<codeview::InlineeSourceLine> {
Error operator()(BinaryStreamRef Stream, uint32_t &Len,
codeview::InlineeSourceLine &Item);
bool HasExtraFiles = false;
};
namespace codeview {
class DebugInlineeLinesSubsectionRef final : public DebugSubsectionRef {
using LinesArray = VarStreamArray<InlineeSourceLine>;
using Iterator = LinesArray::Iterator;
public:
DebugInlineeLinesSubsectionRef();
static bool classof(const DebugSubsectionRef *S) {
return S->kind() == DebugSubsectionKind::InlineeLines;
}
Error initialize(BinaryStreamReader Reader);
Error initialize(BinaryStreamRef Section) {
return initialize(BinaryStreamReader(Section));
}
bool valid() const { return Lines.valid(); }
bool hasExtraFiles() const;
Iterator begin() const { return Lines.begin(); }
Iterator end() const { return Lines.end(); }
private:
InlineeLinesSignature Signature;
LinesArray Lines;
};
class DebugInlineeLinesSubsection final : public DebugSubsection {
public:
struct Entry {
std::vector<support::ulittle32_t> ExtraFiles;
InlineeSourceLineHeader Header;
};
DebugInlineeLinesSubsection(DebugChecksumsSubsection &Checksums,
bool HasExtraFiles = false);
static bool classof(const DebugSubsection *S) {
return S->kind() == DebugSubsectionKind::InlineeLines;
}
Error commit(BinaryStreamWriter &Writer) const override;
uint32_t calculateSerializedSize() const override;
void addInlineSite(TypeIndex FuncId, StringRef FileName, uint32_t SourceLine);
void addExtraFile(StringRef FileName);
bool hasExtraFiles() const { return HasExtraFiles; }
void setHasExtraFiles(bool Has) { HasExtraFiles = Has; }
std::vector<Entry>::const_iterator begin() const { return Entries.begin(); }
std::vector<Entry>::const_iterator end() const { return Entries.end(); }
private:
DebugChecksumsSubsection &Checksums;
bool HasExtraFiles = false;
uint32_t ExtraFileCount = 0;
std::vector<Entry> Entries;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_DEBUGINLINEELINESSUBSECTION_H
PK hwFZ Yv^ " DebugInfo/CodeView/CVTypeVisitor.hnu �[��� //===- CVTypeVisitor.h ------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_CVTYPEVISITOR_H
#define LLVM_DEBUGINFO_CODEVIEW_CVTYPEVISITOR_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace codeview {
class TypeIndex;
class TypeCollection;
class TypeVisitorCallbacks;
struct CVMemberRecord;
enum VisitorDataSource {
VDS_BytesPresent, // The record bytes are passed into the visitation
// function. The algorithm should first deserialize them
// before passing them on through the pipeline.
VDS_BytesExternal // The record bytes are not present, and it is the
// responsibility of the visitor callback interface to
// supply the bytes.
};
Error visitTypeRecord(CVType &Record, TypeIndex Index,
TypeVisitorCallbacks &Callbacks,
VisitorDataSource Source = VDS_BytesPresent);
Error visitTypeRecord(CVType &Record, TypeVisitorCallbacks &Callbacks,
VisitorDataSource Source = VDS_BytesPresent);
Error visitMemberRecord(CVMemberRecord Record, TypeVisitorCallbacks &Callbacks,
VisitorDataSource Source = VDS_BytesPresent);
Error visitMemberRecord(TypeLeafKind Kind, ArrayRef<uint8_t> Record,
TypeVisitorCallbacks &Callbacks);
Error visitMemberRecordStream(ArrayRef<uint8_t> FieldList,
TypeVisitorCallbacks &Callbacks);
Error visitTypeStream(const CVTypeArray &Types, TypeVisitorCallbacks &Callbacks,
VisitorDataSource Source = VDS_BytesPresent);
Error visitTypeStream(CVTypeRange Types, TypeVisitorCallbacks &Callbacks);
Error visitTypeStream(TypeCollection &Types, TypeVisitorCallbacks &Callbacks);
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_CVTYPEVISITOR_H
PK hwFZ�P�� � ) DebugInfo/CodeView/SimpleTypeSerializer.hnu �[��� //===- SimpleTypeSerializer.h -----------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_SIMPLETYPESERIALIZER_H
#define LLVM_DEBUGINFO_CODEVIEW_SIMPLETYPESERIALIZER_H
#include "llvm/ADT/ArrayRef.h"
#include <vector>
namespace llvm {
namespace codeview {
class FieldListRecord;
class SimpleTypeSerializer {
std::vector<uint8_t> ScratchBuffer;
public:
SimpleTypeSerializer();
~SimpleTypeSerializer();
// This template is explicitly instantiated in the implementation file for all
// supported types. The method itself is ugly, so inlining it into the header
// file clutters an otherwise straightforward interface.
template <typename T> ArrayRef<uint8_t> serialize(T &Record);
// Don't allow serialization of field list records using this interface.
ArrayRef<uint8_t> serialize(const FieldListRecord &Record) = delete;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_SIMPLETYPESERIALIZER_H
PK hwFZ����M M - DebugInfo/CodeView/DebugSymbolRVASubsection.hnu �[��� //===- DebugSymbolRVASubsection.h -------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_DEBUGSYMBOLRVASUBSECTION_H
#define LLVM_DEBUGINFO_CODEVIEW_DEBUGSYMBOLRVASUBSECTION_H
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/DebugSubsection.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <vector>
namespace llvm {
class BinaryStreamReader;
namespace codeview {
class DebugSymbolRVASubsectionRef final : public DebugSubsectionRef {
public:
using ArrayType = FixedStreamArray<support::ulittle32_t>;
DebugSymbolRVASubsectionRef();
static bool classof(const DebugSubsectionRef *S) {
return S->kind() == DebugSubsectionKind::CoffSymbolRVA;
}
ArrayType::Iterator begin() const { return RVAs.begin(); }
ArrayType::Iterator end() const { return RVAs.end(); }
Error initialize(BinaryStreamReader &Reader);
private:
ArrayType RVAs;
};
class DebugSymbolRVASubsection final : public DebugSubsection {
public:
DebugSymbolRVASubsection();
static bool classof(const DebugSubsection *S) {
return S->kind() == DebugSubsectionKind::CoffSymbolRVA;
}
Error commit(BinaryStreamWriter &Writer) const override;
uint32_t calculateSerializedSize() const override;
void addRVA(uint32_t RVA) { RVAs.push_back(support::ulittle32_t(RVA)); }
private:
std::vector<support::ulittle32_t> RVAs;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_DEBUGSYMBOLRVASUBSECTION_H
PK hwFZ ���I& I& & DebugInfo/CodeView/CodeViewSymbols.defnu �[��� //===-- CodeViewSymbols.def - All CodeView leaf types -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// See LEAF_ENUM_e in cvinfo.h. This should match the constants there.
//
//===----------------------------------------------------------------------===//
#ifndef CV_SYMBOL
#define CV_SYMBOL(ename, value)
#endif
#ifndef SYMBOL_RECORD
#define SYMBOL_RECORD(lf_ename, value, name) CV_SYMBOL(lf_ename, value)
#endif
#ifndef SYMBOL_RECORD_ALIAS
#define SYMBOL_RECORD_ALIAS(lf_ename, value, name, alias_name) \
SYMBOL_RECORD(lf_ename, value, name)
#endif
// 16 bit symbol types. Not very useful, provided only for reference.
CV_SYMBOL(S_COMPILE , 0x0001)
CV_SYMBOL(S_REGISTER_16t , 0x0002)
CV_SYMBOL(S_CONSTANT_16t , 0x0003)
CV_SYMBOL(S_UDT_16t , 0x0004)
CV_SYMBOL(S_SSEARCH , 0x0005)
CV_SYMBOL(S_SKIP , 0x0007)
CV_SYMBOL(S_CVRESERVE , 0x0008)
CV_SYMBOL(S_OBJNAME_ST , 0x0009)
CV_SYMBOL(S_ENDARG , 0x000a)
CV_SYMBOL(S_COBOLUDT_16t , 0x000b)
CV_SYMBOL(S_MANYREG_16t , 0x000c)
CV_SYMBOL(S_RETURN , 0x000d)
CV_SYMBOL(S_ENTRYTHIS , 0x000e)
CV_SYMBOL(S_BPREL16 , 0x0100)
CV_SYMBOL(S_LDATA16 , 0x0101)
CV_SYMBOL(S_GDATA16 , 0x0102)
CV_SYMBOL(S_PUB16 , 0x0103)
CV_SYMBOL(S_LPROC16 , 0x0104)
CV_SYMBOL(S_GPROC16 , 0x0105)
CV_SYMBOL(S_THUNK16 , 0x0106)
CV_SYMBOL(S_BLOCK16 , 0x0107)
CV_SYMBOL(S_WITH16 , 0x0108)
CV_SYMBOL(S_LABEL16 , 0x0109)
CV_SYMBOL(S_CEXMODEL16 , 0x010a)
CV_SYMBOL(S_VFTABLE16 , 0x010b)
CV_SYMBOL(S_REGREL16 , 0x010c)
CV_SYMBOL(S_BPREL32_16t , 0x0200)
CV_SYMBOL(S_LDATA32_16t , 0x0201)
CV_SYMBOL(S_GDATA32_16t , 0x0202)
CV_SYMBOL(S_PUB32_16t , 0x0203)
CV_SYMBOL(S_LPROC32_16t , 0x0204)
CV_SYMBOL(S_GPROC32_16t , 0x0205)
CV_SYMBOL(S_THUNK32_ST , 0x0206)
CV_SYMBOL(S_BLOCK32_ST , 0x0207)
CV_SYMBOL(S_WITH32_ST , 0x0208)
CV_SYMBOL(S_LABEL32_ST , 0x0209)
CV_SYMBOL(S_CEXMODEL32 , 0x020a)
CV_SYMBOL(S_VFTABLE32_16t , 0x020b)
CV_SYMBOL(S_REGREL32_16t , 0x020c)
CV_SYMBOL(S_LTHREAD32_16t , 0x020d)
CV_SYMBOL(S_GTHREAD32_16t , 0x020e)
CV_SYMBOL(S_SLINK32 , 0x020f)
CV_SYMBOL(S_LPROCMIPS_16t , 0x0300)
CV_SYMBOL(S_GPROCMIPS_16t , 0x0301)
CV_SYMBOL(S_PROCREF_ST , 0x0400)
CV_SYMBOL(S_DATAREF_ST , 0x0401)
CV_SYMBOL(S_ALIGN , 0x0402)
CV_SYMBOL(S_LPROCREF_ST , 0x0403)
CV_SYMBOL(S_OEM , 0x0404)
// All post 16 bit symbol types have the 0x1000 bit set.
CV_SYMBOL(S_TI16_MAX , 0x1000)
// Mostly unused "start" symbol types.
CV_SYMBOL(S_REGISTER_ST , 0x1001)
CV_SYMBOL(S_CONSTANT_ST , 0x1002)
CV_SYMBOL(S_UDT_ST , 0x1003)
CV_SYMBOL(S_COBOLUDT_ST , 0x1004)
CV_SYMBOL(S_MANYREG_ST , 0x1005)
CV_SYMBOL(S_BPREL32_ST , 0x1006)
CV_SYMBOL(S_LDATA32_ST , 0x1007)
CV_SYMBOL(S_GDATA32_ST , 0x1008)
CV_SYMBOL(S_PUB32_ST , 0x1009)
CV_SYMBOL(S_LPROC32_ST , 0x100a)
CV_SYMBOL(S_GPROC32_ST , 0x100b)
CV_SYMBOL(S_VFTABLE32 , 0x100c)
CV_SYMBOL(S_REGREL32_ST , 0x100d)
CV_SYMBOL(S_LTHREAD32_ST , 0x100e)
CV_SYMBOL(S_GTHREAD32_ST , 0x100f)
CV_SYMBOL(S_LPROCMIPS_ST , 0x1010)
CV_SYMBOL(S_GPROCMIPS_ST , 0x1011)
CV_SYMBOL(S_COMPILE2_ST , 0x1013)
CV_SYMBOL(S_MANYREG2_ST , 0x1014)
CV_SYMBOL(S_LPROCIA64_ST , 0x1015)
CV_SYMBOL(S_GPROCIA64_ST , 0x1016)
CV_SYMBOL(S_LOCALSLOT_ST , 0x1017)
CV_SYMBOL(S_PARAMSLOT_ST , 0x1018)
CV_SYMBOL(S_GMANPROC_ST , 0x101a)
CV_SYMBOL(S_LMANPROC_ST , 0x101b)
CV_SYMBOL(S_RESERVED1 , 0x101c)
CV_SYMBOL(S_RESERVED2 , 0x101d)
CV_SYMBOL(S_RESERVED3 , 0x101e)
CV_SYMBOL(S_RESERVED4 , 0x101f)
CV_SYMBOL(S_LMANDATA_ST , 0x1020)
CV_SYMBOL(S_GMANDATA_ST , 0x1021)
CV_SYMBOL(S_MANFRAMEREL_ST, 0x1022)
CV_SYMBOL(S_MANREGISTER_ST, 0x1023)
CV_SYMBOL(S_MANSLOT_ST , 0x1024)
CV_SYMBOL(S_MANMANYREG_ST , 0x1025)
CV_SYMBOL(S_MANREGREL_ST , 0x1026)
CV_SYMBOL(S_MANMANYREG2_ST, 0x1027)
CV_SYMBOL(S_MANTYPREF , 0x1028)
CV_SYMBOL(S_UNAMESPACE_ST , 0x1029)
// End of S_*_ST symbols, which do not appear to be generated by modern
// compilers.
CV_SYMBOL(S_ST_MAX , 0x1100)
CV_SYMBOL(S_WITH32 , 0x1104)
CV_SYMBOL(S_MANYREG , 0x110a)
CV_SYMBOL(S_LPROCMIPS , 0x1114)
CV_SYMBOL(S_GPROCMIPS , 0x1115)
CV_SYMBOL(S_MANYREG2 , 0x1117)
CV_SYMBOL(S_LPROCIA64 , 0x1118)
CV_SYMBOL(S_GPROCIA64 , 0x1119)
CV_SYMBOL(S_LOCALSLOT , 0x111a)
CV_SYMBOL(S_PARAMSLOT , 0x111b)
// Managed code symbols.
CV_SYMBOL(S_MANFRAMEREL , 0x111e)
CV_SYMBOL(S_MANREGISTER , 0x111f)
CV_SYMBOL(S_MANSLOT , 0x1120)
CV_SYMBOL(S_MANMANYREG , 0x1121)
CV_SYMBOL(S_MANREGREL , 0x1122)
CV_SYMBOL(S_MANMANYREG2 , 0x1123)
CV_SYMBOL(S_DATAREF , 0x1126)
CV_SYMBOL(S_ANNOTATIONREF , 0x1128)
CV_SYMBOL(S_TOKENREF , 0x1129)
CV_SYMBOL(S_GMANPROC , 0x112a)
CV_SYMBOL(S_LMANPROC , 0x112b)
CV_SYMBOL(S_ATTR_FRAMEREL , 0x112e)
CV_SYMBOL(S_ATTR_REGISTER , 0x112f)
CV_SYMBOL(S_ATTR_REGREL , 0x1130)
CV_SYMBOL(S_ATTR_MANYREG , 0x1131)
CV_SYMBOL(S_SEPCODE , 0x1132)
CV_SYMBOL(S_LOCAL_2005 , 0x1133)
CV_SYMBOL(S_DEFRANGE_2005 , 0x1134)
CV_SYMBOL(S_DEFRANGE2_2005, 0x1135)
CV_SYMBOL(S_DISCARDED , 0x113b)
// Current symbol types for most procedures as of this writing.
CV_SYMBOL(S_LPROCMIPS_ID , 0x1148)
CV_SYMBOL(S_GPROCMIPS_ID , 0x1149)
CV_SYMBOL(S_LPROCIA64_ID , 0x114a)
CV_SYMBOL(S_GPROCIA64_ID , 0x114b)
CV_SYMBOL(S_DEFRANGE_HLSL , 0x1150)
CV_SYMBOL(S_GDATA_HLSL , 0x1151)
CV_SYMBOL(S_LDATA_HLSL , 0x1152)
CV_SYMBOL(S_LOCAL_DPC_GROUPSHARED, 0x1154)
CV_SYMBOL(S_DEFRANGE_DPC_PTR_TAG, 0x1157)
CV_SYMBOL(S_DPC_SYM_TAG_MAP, 0x1158)
CV_SYMBOL(S_ARMSWITCHTABLE , 0x1159)
CV_SYMBOL(S_POGODATA , 0x115c)
CV_SYMBOL(S_INLINESITE2 , 0x115d)
CV_SYMBOL(S_MOD_TYPEREF , 0x115f)
CV_SYMBOL(S_REF_MINIPDB , 0x1160)
CV_SYMBOL(S_PDBMAP , 0x1161)
CV_SYMBOL(S_GDATA_HLSL32 , 0x1162)
CV_SYMBOL(S_LDATA_HLSL32 , 0x1163)
CV_SYMBOL(S_GDATA_HLSL32_EX, 0x1164)
CV_SYMBOL(S_LDATA_HLSL32_EX, 0x1165)
CV_SYMBOL(S_FASTLINK, 0x1167) // Undocumented
SYMBOL_RECORD_ALIAS(S_INLINEES, 0x1168, InlineesSym, CallerSym) // Undocumented
// Known symbol types
SYMBOL_RECORD(S_END , 0x0006, ScopeEndSym)
SYMBOL_RECORD_ALIAS(S_INLINESITE_END , 0x114e, InlineSiteEnd, ScopeEndSym)
SYMBOL_RECORD_ALIAS(S_PROC_ID_END , 0x114f, ProcEnd, ScopeEndSym)
SYMBOL_RECORD(S_THUNK32 , 0x1102, Thunk32Sym)
SYMBOL_RECORD(S_TRAMPOLINE , 0x112c, TrampolineSym)
SYMBOL_RECORD(S_SECTION , 0x1136, SectionSym)
SYMBOL_RECORD(S_COFFGROUP , 0x1137, CoffGroupSym)
SYMBOL_RECORD(S_EXPORT , 0x1138, ExportSym)
SYMBOL_RECORD(S_LPROC32 , 0x110f, ProcSym)
SYMBOL_RECORD_ALIAS(S_GPROC32 , 0x1110, GlobalProcSym, ProcSym)
SYMBOL_RECORD_ALIAS(S_LPROC32_ID , 0x1146, ProcIdSym, ProcSym)
SYMBOL_RECORD_ALIAS(S_GPROC32_ID , 0x1147, GlobalProcIdSym, ProcSym)
SYMBOL_RECORD_ALIAS(S_LPROC32_DPC , 0x1155, DPCProcSym, ProcSym)
SYMBOL_RECORD_ALIAS(S_LPROC32_DPC_ID , 0x1156, DPCProcIdSym, ProcSym)
SYMBOL_RECORD(S_REGISTER , 0x1106, RegisterSym)
SYMBOL_RECORD(S_PUB32 , 0x110e, PublicSym32)
SYMBOL_RECORD(S_PROCREF , 0x1125, ProcRefSym)
SYMBOL_RECORD_ALIAS(S_LPROCREF, 0x1127, LocalProcRef, ProcRefSym)
SYMBOL_RECORD(S_ENVBLOCK , 0x113d, EnvBlockSym)
SYMBOL_RECORD(S_INLINESITE , 0x114d, InlineSiteSym)
SYMBOL_RECORD(S_LOCAL , 0x113e, LocalSym)
SYMBOL_RECORD(S_DEFRANGE , 0x113f, DefRangeSym)
SYMBOL_RECORD(S_DEFRANGE_SUBFIELD, 0x1140, DefRangeSubfieldSym)
SYMBOL_RECORD(S_DEFRANGE_REGISTER, 0x1141, DefRangeRegisterSym)
SYMBOL_RECORD(S_DEFRANGE_FRAMEPOINTER_REL, 0x1142, DefRangeFramePointerRelSym)
SYMBOL_RECORD(S_DEFRANGE_SUBFIELD_REGISTER, 0x1143, DefRangeSubfieldRegisterSym)
SYMBOL_RECORD(S_DEFRANGE_FRAMEPOINTER_REL_FULL_SCOPE, 0x1144, DefRangeFramePointerRelFullScopeSym)
SYMBOL_RECORD(S_DEFRANGE_REGISTER_REL, 0x1145, DefRangeRegisterRelSym)
SYMBOL_RECORD(S_BLOCK32 , 0x1103, BlockSym)
SYMBOL_RECORD(S_LABEL32 , 0x1105, LabelSym)
SYMBOL_RECORD(S_OBJNAME , 0x1101, ObjNameSym)
SYMBOL_RECORD(S_COMPILE2 , 0x1116, Compile2Sym)
SYMBOL_RECORD(S_COMPILE3 , 0x113c, Compile3Sym)
SYMBOL_RECORD(S_FRAMEPROC , 0x1012, FrameProcSym)
SYMBOL_RECORD(S_CALLSITEINFO , 0x1139, CallSiteInfoSym)
SYMBOL_RECORD(S_FILESTATIC , 0x1153, FileStaticSym)
SYMBOL_RECORD(S_HEAPALLOCSITE , 0x115e, HeapAllocationSiteSym)
SYMBOL_RECORD(S_FRAMECOOKIE , 0x113a, FrameCookieSym)
SYMBOL_RECORD(S_CALLEES , 0x115a, CallerSym)
SYMBOL_RECORD_ALIAS(S_CALLERS, 0x115b, CalleeSym, CallerSym)
SYMBOL_RECORD(S_UDT , 0x1108, UDTSym)
SYMBOL_RECORD_ALIAS(S_COBOLUDT , 0x1109, CobolUDT, UDTSym)
SYMBOL_RECORD(S_BUILDINFO , 0x114c, BuildInfoSym)
SYMBOL_RECORD(S_BPREL32 , 0x110b, BPRelativeSym)
SYMBOL_RECORD(S_REGREL32 , 0x1111, RegRelativeSym)
SYMBOL_RECORD(S_CONSTANT , 0x1107, ConstantSym)
SYMBOL_RECORD_ALIAS(S_MANCONSTANT , 0x112d, ManagedConstant, ConstantSym)
SYMBOL_RECORD(S_LDATA32 , 0x110c, DataSym)
SYMBOL_RECORD_ALIAS(S_GDATA32 , 0x110d, GlobalData, DataSym)
SYMBOL_RECORD_ALIAS(S_LMANDATA , 0x111c, ManagedLocalData, DataSym)
SYMBOL_RECORD_ALIAS(S_GMANDATA , 0x111d, ManagedGlobalData, DataSym)
SYMBOL_RECORD(S_LTHREAD32 , 0x1112, ThreadLocalDataSym)
SYMBOL_RECORD_ALIAS(S_GTHREAD32 , 0x1113, GlobalTLS, ThreadLocalDataSym)
SYMBOL_RECORD(S_UNAMESPACE , 0x1124, UsingNamespaceSym)
SYMBOL_RECORD(S_ANNOTATION , 0x1019, AnnotationSym)
#undef CV_SYMBOL
#undef SYMBOL_RECORD
#undef SYMBOL_RECORD_ALIAS
PK hwFZ���% % % DebugInfo/CodeView/CodeViewRecordIO.hnu �[��� //===- CodeViewRecordIO.h ---------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_CODEVIEWRECORDIO_H
#define LLVM_DEBUGINFO_CODEVIEW_CODEVIEWRECORDIO_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/CodeViewError.h"
#include "llvm/Support/BinaryStreamReader.h"
#include "llvm/Support/BinaryStreamWriter.h"
#include "llvm/Support/Error.h"
#include <cassert>
#include <cstdint>
#include <type_traits>
namespace llvm {
template <typename T> class ArrayRef;
class APSInt;
namespace codeview {
class TypeIndex;
struct GUID;
class CodeViewRecordStreamer {
public:
virtual void emitBytes(StringRef Data) = 0;
virtual void emitIntValue(uint64_t Value, unsigned Size) = 0;
virtual void emitBinaryData(StringRef Data) = 0;
virtual void AddComment(const Twine &T) = 0;
virtual void AddRawComment(const Twine &T) = 0;
virtual bool isVerboseAsm() = 0;
virtual std::string getTypeName(TypeIndex TI) = 0;
virtual ~CodeViewRecordStreamer() = default;
};
class CodeViewRecordIO {
uint32_t getCurrentOffset() const {
if (isWriting())
return Writer->getOffset();
else if (isReading())
return Reader->getOffset();
else
return 0;
}
public:
// deserializes records to structures
explicit CodeViewRecordIO(BinaryStreamReader &Reader) : Reader(&Reader) {}
// serializes records to buffer
explicit CodeViewRecordIO(BinaryStreamWriter &Writer) : Writer(&Writer) {}
// writes records to assembly file using MC library interface
explicit CodeViewRecordIO(CodeViewRecordStreamer &Streamer)
: Streamer(&Streamer) {}
Error beginRecord(std::optional<uint32_t> MaxLength);
Error endRecord();
Error mapInteger(TypeIndex &TypeInd, const Twine &Comment = "");
bool isStreaming() const {
return (Streamer != nullptr) && (Reader == nullptr) && (Writer == nullptr);
}
bool isReading() const {
return (Reader != nullptr) && (Streamer == nullptr) && (Writer == nullptr);
}
bool isWriting() const {
return (Writer != nullptr) && (Streamer == nullptr) && (Reader == nullptr);
}
uint32_t maxFieldLength() const;
template <typename T> Error mapObject(T &Value) {
if (isStreaming()) {
StringRef BytesSR =
StringRef((reinterpret_cast<const char *>(&Value)), sizeof(Value));
Streamer->emitBytes(BytesSR);
incrStreamedLen(sizeof(T));
return Error::success();
}
if (isWriting())
return Writer->writeObject(Value);
const T *ValuePtr;
if (auto EC = Reader->readObject(ValuePtr))
return EC;
Value = *ValuePtr;
return Error::success();
}
template <typename T> Error mapInteger(T &Value, const Twine &Comment = "") {
if (isStreaming()) {
emitComment(Comment);
Streamer->emitIntValue((int)Value, sizeof(T));
incrStreamedLen(sizeof(T));
return Error::success();
}
if (isWriting())
return Writer->writeInteger(Value);
return Reader->readInteger(Value);
}
template <typename T> Error mapEnum(T &Value, const Twine &Comment = "") {
if (!isStreaming() && sizeof(Value) > maxFieldLength())
return make_error<CodeViewError>(cv_error_code::insufficient_buffer);
using U = std::underlying_type_t<T>;
U X;
if (isWriting() || isStreaming())
X = static_cast<U>(Value);
if (auto EC = mapInteger(X, Comment))
return EC;
if (isReading())
Value = static_cast<T>(X);
return Error::success();
}
Error mapEncodedInteger(int64_t &Value, const Twine &Comment = "");
Error mapEncodedInteger(uint64_t &Value, const Twine &Comment = "");
Error mapEncodedInteger(APSInt &Value, const Twine &Comment = "");
Error mapStringZ(StringRef &Value, const Twine &Comment = "");
Error mapGuid(GUID &Guid, const Twine &Comment = "");
Error mapStringZVectorZ(std::vector<StringRef> &Value,
const Twine &Comment = "");
template <typename SizeType, typename T, typename ElementMapper>
Error mapVectorN(T &Items, const ElementMapper &Mapper,
const Twine &Comment = "") {
SizeType Size;
if (isStreaming()) {
Size = static_cast<SizeType>(Items.size());
emitComment(Comment);
Streamer->emitIntValue(Size, sizeof(Size));
incrStreamedLen(sizeof(Size)); // add 1 for the delimiter
for (auto &X : Items) {
if (auto EC = Mapper(*this, X))
return EC;
}
} else if (isWriting()) {
Size = static_cast<SizeType>(Items.size());
if (auto EC = Writer->writeInteger(Size))
return EC;
for (auto &X : Items) {
if (auto EC = Mapper(*this, X))
return EC;
}
} else {
if (auto EC = Reader->readInteger(Size))
return EC;
for (SizeType I = 0; I < Size; ++I) {
typename T::value_type Item;
if (auto EC = Mapper(*this, Item))
return EC;
Items.push_back(Item);
}
}
return Error::success();
}
template <typename T, typename ElementMapper>
Error mapVectorTail(T &Items, const ElementMapper &Mapper,
const Twine &Comment = "") {
emitComment(Comment);
if (isStreaming() || isWriting()) {
for (auto &Item : Items) {
if (auto EC = Mapper(*this, Item))
return EC;
}
} else {
typename T::value_type Field;
// Stop when we run out of bytes or we hit record padding bytes.
while (!Reader->empty() && Reader->peek() < 0xf0 /* LF_PAD0 */) {
if (auto EC = Mapper(*this, Field))
return EC;
Items.push_back(Field);
}
}
return Error::success();
}
Error mapByteVectorTail(ArrayRef<uint8_t> &Bytes, const Twine &Comment = "");
Error mapByteVectorTail(std::vector<uint8_t> &Bytes,
const Twine &Comment = "");
Error padToAlignment(uint32_t Align);
Error skipPadding();
uint64_t getStreamedLen() {
if (isStreaming())
return StreamedLen;
return 0;
}
void emitRawComment(const Twine &T) {
if (isStreaming() && Streamer->isVerboseAsm())
Streamer->AddRawComment(T);
}
private:
void emitEncodedSignedInteger(const int64_t &Value,
const Twine &Comment = "");
void emitEncodedUnsignedInteger(const uint64_t &Value,
const Twine &Comment = "");
Error writeEncodedSignedInteger(const int64_t &Value);
Error writeEncodedUnsignedInteger(const uint64_t &Value);
void incrStreamedLen(const uint64_t &Len) {
if (isStreaming())
StreamedLen += Len;
}
void resetStreamedLen() {
if (isStreaming())
StreamedLen = 4; // The record prefix is 4 bytes long
}
void emitComment(const Twine &Comment) {
if (isStreaming() && Streamer->isVerboseAsm()) {
Twine TComment(Comment);
if (!TComment.isTriviallyEmpty())
Streamer->AddComment(TComment);
}
}
struct RecordLimit {
uint32_t BeginOffset;
std::optional<uint32_t> MaxLength;
std::optional<uint32_t> bytesRemaining(uint32_t CurrentOffset) const {
if (!MaxLength)
return std::nullopt;
assert(CurrentOffset >= BeginOffset);
uint32_t BytesUsed = CurrentOffset - BeginOffset;
if (BytesUsed >= *MaxLength)
return 0;
return *MaxLength - BytesUsed;
}
};
SmallVector<RecordLimit, 2> Limits;
BinaryStreamReader *Reader = nullptr;
BinaryStreamWriter *Writer = nullptr;
CodeViewRecordStreamer *Streamer = nullptr;
uint64_t StreamedLen = 0;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_CODEVIEWRECORDIO_H
PK hwFZF�J�( ( ( DebugInfo/CodeView/RecordSerialization.hnu �[��� //===- RecordSerialization.h ------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_RECORDSERIALIZATION_H
#define LLVM_DEBUGINFO_CODEVIEW_RECORDSERIALIZATION_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/CodeViewError.h"
#include "llvm/Support/BinaryStreamReader.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <cinttypes>
namespace llvm {
class APSInt;
namespace codeview {
using llvm::support::little32_t;
using llvm::support::ulittle16_t;
using llvm::support::ulittle32_t;
/// Limit on the size of all codeview symbol and type records, including the
/// RecordPrefix. MSVC does not emit any records larger than this.
enum : unsigned { MaxRecordLength = 0xFF00 };
struct RecordPrefix {
RecordPrefix() = default;
explicit RecordPrefix(uint16_t Kind) : RecordLen(2), RecordKind(Kind) {}
ulittle16_t RecordLen; // Record length, starting from &RecordKind.
ulittle16_t RecordKind; // Record kind enum (SymRecordKind or TypeRecordKind)
};
/// Reinterpret a byte array as an array of characters. Does not interpret as
/// a C string, as StringRef has several helpers (split) that make that easy.
StringRef getBytesAsCharacters(ArrayRef<uint8_t> LeafData);
StringRef getBytesAsCString(ArrayRef<uint8_t> LeafData);
inline Error consume(BinaryStreamReader &Reader) { return Error::success(); }
/// Decodes a numeric "leaf" value. These are integer literals encountered in
/// the type stream. If the value is positive and less than LF_NUMERIC (1 <<
/// 15), it is emitted directly in Data. Otherwise, it has a tag like LF_CHAR
/// that indicates the bitwidth and sign of the numeric data.
Error consume(BinaryStreamReader &Reader, APSInt &Num);
/// Decodes a numeric leaf value that is known to be a particular type.
Error consume_numeric(BinaryStreamReader &Reader, uint64_t &Value);
/// Decodes signed and unsigned fixed-length integers.
Error consume(BinaryStreamReader &Reader, uint32_t &Item);
Error consume(BinaryStreamReader &Reader, int32_t &Item);
/// Decodes a null terminated string.
Error consume(BinaryStreamReader &Reader, StringRef &Item);
Error consume(StringRef &Data, APSInt &Num);
Error consume(StringRef &Data, uint32_t &Item);
/// Decodes an arbitrary object whose layout matches that of the underlying
/// byte sequence, and returns a pointer to the object.
template <typename T> Error consume(BinaryStreamReader &Reader, T *&Item) {
return Reader.readObject(Item);
}
template <typename T, typename U> struct serialize_conditional_impl {
serialize_conditional_impl(T &Item, U Func) : Item(Item), Func(Func) {}
Error deserialize(BinaryStreamReader &Reader) const {
if (!Func())
return Error::success();
return consume(Reader, Item);
}
T &Item;
U Func;
};
template <typename T, typename U>
serialize_conditional_impl<T, U> serialize_conditional(T &Item, U Func) {
return serialize_conditional_impl<T, U>(Item, Func);
}
template <typename T, typename U> struct serialize_array_impl {
serialize_array_impl(ArrayRef<T> &Item, U Func) : Item(Item), Func(Func) {}
Error deserialize(BinaryStreamReader &Reader) const {
return Reader.readArray(Item, Func());
}
ArrayRef<T> &Item;
U Func;
};
template <typename T> struct serialize_vector_tail_impl {
serialize_vector_tail_impl(std::vector<T> &Item) : Item(Item) {}
Error deserialize(BinaryStreamReader &Reader) const {
T Field;
// Stop when we run out of bytes or we hit record padding bytes.
while (!Reader.empty() && Reader.peek() < LF_PAD0) {
if (auto EC = consume(Reader, Field))
return EC;
Item.push_back(Field);
}
return Error::success();
}
std::vector<T> &Item;
};
struct serialize_null_term_string_array_impl {
serialize_null_term_string_array_impl(std::vector<StringRef> &Item)
: Item(Item) {}
Error deserialize(BinaryStreamReader &Reader) const {
if (Reader.empty())
return make_error<CodeViewError>(cv_error_code::insufficient_buffer,
"Null terminated string is empty!");
while (Reader.peek() != 0) {
StringRef Field;
if (auto EC = Reader.readCString(Field))
return EC;
Item.push_back(Field);
}
return Reader.skip(1);
}
std::vector<StringRef> &Item;
};
template <typename T> struct serialize_arrayref_tail_impl {
serialize_arrayref_tail_impl(ArrayRef<T> &Item) : Item(Item) {}
Error deserialize(BinaryStreamReader &Reader) const {
uint32_t Count = Reader.bytesRemaining() / sizeof(T);
return Reader.readArray(Item, Count);
}
ArrayRef<T> &Item;
};
template <typename T> struct serialize_numeric_impl {
serialize_numeric_impl(T &Item) : Item(Item) {}
Error deserialize(BinaryStreamReader &Reader) const {
return consume_numeric(Reader, Item);
}
T &Item;
};
template <typename T, typename U>
serialize_array_impl<T, U> serialize_array(ArrayRef<T> &Item, U Func) {
return serialize_array_impl<T, U>(Item, Func);
}
inline serialize_null_term_string_array_impl
serialize_null_term_string_array(std::vector<StringRef> &Item) {
return serialize_null_term_string_array_impl(Item);
}
template <typename T>
serialize_vector_tail_impl<T> serialize_array_tail(std::vector<T> &Item) {
return serialize_vector_tail_impl<T>(Item);
}
template <typename T>
serialize_arrayref_tail_impl<T> serialize_array_tail(ArrayRef<T> &Item) {
return serialize_arrayref_tail_impl<T>(Item);
}
template <typename T> serialize_numeric_impl<T> serialize_numeric(T &Item) {
return serialize_numeric_impl<T>(Item);
}
template <typename T, typename U>
Error consume(BinaryStreamReader &Reader,
const serialize_conditional_impl<T, U> &Item) {
return Item.deserialize(Reader);
}
template <typename T, typename U>
Error consume(BinaryStreamReader &Reader,
const serialize_array_impl<T, U> &Item) {
return Item.deserialize(Reader);
}
inline Error consume(BinaryStreamReader &Reader,
const serialize_null_term_string_array_impl &Item) {
return Item.deserialize(Reader);
}
template <typename T>
Error consume(BinaryStreamReader &Reader,
const serialize_vector_tail_impl<T> &Item) {
return Item.deserialize(Reader);
}
template <typename T>
Error consume(BinaryStreamReader &Reader,
const serialize_arrayref_tail_impl<T> &Item) {
return Item.deserialize(Reader);
}
template <typename T>
Error consume(BinaryStreamReader &Reader,
const serialize_numeric_impl<T> &Item) {
return Item.deserialize(Reader);
}
template <typename T, typename U, typename... Args>
Error consume(BinaryStreamReader &Reader, T &&X, U &&Y, Args &&... Rest) {
if (auto EC = consume(Reader, X))
return EC;
return consume(Reader, Y, std::forward<Args>(Rest)...);
}
}
}
#endif
PK hwFZ�M�< DebugInfo/CodeView/Line.hnu �[��� //===- Line.h ---------------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_LINE_H
#define LLVM_DEBUGINFO_CODEVIEW_LINE_H
#include "llvm/Support/Endian.h"
#include <cinttypes>
namespace llvm {
namespace codeview {
using llvm::support::ulittle32_t;
class LineInfo {
public:
enum : uint32_t {
AlwaysStepIntoLineNumber = 0xfeefee,
NeverStepIntoLineNumber = 0xf00f00
};
enum : int { EndLineDeltaShift = 24 };
enum : uint32_t {
StartLineMask = 0x00ffffff,
EndLineDeltaMask = 0x7f000000,
StatementFlag = 0x80000000u
};
LineInfo(uint32_t StartLine, uint32_t EndLine, bool IsStatement);
LineInfo(uint32_t LineData) : LineData(LineData) {}
uint32_t getStartLine() const { return LineData & StartLineMask; }
uint32_t getLineDelta() const {
return (LineData & EndLineDeltaMask) >> EndLineDeltaShift;
}
uint32_t getEndLine() const { return getStartLine() + getLineDelta(); }
bool isStatement() const { return (LineData & StatementFlag) != 0; }
uint32_t getRawData() const { return LineData; }
bool isAlwaysStepInto() const {
return getStartLine() == AlwaysStepIntoLineNumber;
}
bool isNeverStepInto() const {
return getStartLine() == NeverStepIntoLineNumber;
}
private:
uint32_t LineData;
};
class ColumnInfo {
private:
static const uint32_t StartColumnMask = 0x0000ffffu;
static const uint32_t EndColumnMask = 0xffff0000u;
static const int EndColumnShift = 16;
public:
ColumnInfo(uint16_t StartColumn, uint16_t EndColumn) {
ColumnData =
(static_cast<uint32_t>(StartColumn) & StartColumnMask) |
((static_cast<uint32_t>(EndColumn) << EndColumnShift) & EndColumnMask);
}
uint16_t getStartColumn() const {
return static_cast<uint16_t>(ColumnData & StartColumnMask);
}
uint16_t getEndColumn() const {
return static_cast<uint16_t>((ColumnData & EndColumnMask) >>
EndColumnShift);
}
uint32_t getRawData() const { return ColumnData; }
private:
uint32_t ColumnData;
};
class Line {
private:
int32_t CodeOffset;
LineInfo LineInf;
ColumnInfo ColumnInf;
public:
Line(int32_t CodeOffset, uint32_t StartLine, uint32_t EndLine,
uint16_t StartColumn, uint16_t EndColumn, bool IsStatement)
: CodeOffset(CodeOffset), LineInf(StartLine, EndLine, IsStatement),
ColumnInf(StartColumn, EndColumn) {}
Line(int32_t CodeOffset, LineInfo LineInf, ColumnInfo ColumnInf)
: CodeOffset(CodeOffset), LineInf(LineInf), ColumnInf(ColumnInf) {}
LineInfo getLineInfo() const { return LineInf; }
ColumnInfo getColumnInfo() const { return ColumnInf; }
int32_t getCodeOffset() const { return CodeOffset; }
uint32_t getStartLine() const { return LineInf.getStartLine(); }
uint32_t getLineDelta() const { return LineInf.getLineDelta(); }
uint32_t getEndLine() const { return LineInf.getEndLine(); }
uint16_t getStartColumn() const { return ColumnInf.getStartColumn(); }
uint16_t getEndColumn() const { return ColumnInf.getEndColumn(); }
bool isStatement() const { return LineInf.isStatement(); }
bool isAlwaysStepInto() const { return LineInf.isAlwaysStepInto(); }
bool isNeverStepInto() const { return LineInf.isNeverStepInto(); }
};
} // namespace codeview
} // namespace llvm
#endif
PK hwFZ�AOV * DebugInfo/CodeView/SymbolVisitorDelegate.hnu �[��� //===-- SymbolVisitorDelegate.h ---------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_SYMBOLVISITORDELEGATE_H
#define LLVM_DEBUGINFO_CODEVIEW_SYMBOLVISITORDELEGATE_H
#include "llvm/ADT/StringRef.h"
#include <cstdint>
namespace llvm {
class BinaryStreamReader;
namespace codeview {
class DebugStringTableSubsectionRef;
class SymbolVisitorDelegate {
public:
virtual ~SymbolVisitorDelegate() = default;
virtual uint32_t getRecordOffset(BinaryStreamReader Reader) = 0;
virtual StringRef getFileNameForFileOffset(uint32_t FileOffset) = 0;
virtual DebugStringTableSubsectionRef getStringTable() = 0;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_SYMBOLVISITORDELEGATE_H
PK hwFZ�\ d� � " DebugInfo/CodeView/CodeViewError.hnu �[��� //===- CodeViewError.h - Error extensions for CodeView ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_CODEVIEWERROR_H
#define LLVM_DEBUGINFO_CODEVIEW_CODEVIEWERROR_H
#include "llvm/Support/Error.h"
namespace llvm {
namespace codeview {
enum class cv_error_code {
unspecified = 1,
insufficient_buffer,
operation_unsupported,
corrupt_record,
no_records,
unknown_member_record,
};
} // namespace codeview
} // namespace llvm
namespace std {
template <>
struct is_error_code_enum<llvm::codeview::cv_error_code> : std::true_type {};
} // namespace std
namespace llvm {
namespace codeview {
const std::error_category &CVErrorCategory();
inline std::error_code make_error_code(cv_error_code E) {
return std::error_code(static_cast<int>(E), CVErrorCategory());
}
/// Base class for errors originating when parsing raw PDB files
class CodeViewError : public ErrorInfo<CodeViewError, StringError> {
public:
using ErrorInfo<CodeViewError,
StringError>::ErrorInfo; // inherit constructors
CodeViewError(const Twine &S) : ErrorInfo(S, cv_error_code::unspecified) {}
static char ID;
};
} // namespace codeview
} // namespace llvm
#endif
PK hwFZ>�ȗ�
�
, DebugInfo/CodeView/MergingTypeTableBuilder.hnu �[��� //===- MergingTypeTableBuilder.h ---------------------------------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_MERGINGTYPETABLEBUILDER_H
#define LLVM_DEBUGINFO_CODEVIEW_MERGINGTYPETABLEBUILDER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/SimpleTypeSerializer.h"
#include "llvm/DebugInfo/CodeView/TypeCollection.h"
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
#include "llvm/Support/Allocator.h"
#include <cstdint>
namespace llvm {
namespace codeview {
struct LocallyHashedType;
class ContinuationRecordBuilder;
class MergingTypeTableBuilder : public TypeCollection {
/// Storage for records. These need to outlive the TypeTableBuilder.
BumpPtrAllocator &RecordStorage;
/// A serializer that can write non-continuation leaf types. Only used as
/// a convenience function so that we can provide an interface method to
/// write an unserialized record.
SimpleTypeSerializer SimpleSerializer;
/// Hash table.
DenseMap<LocallyHashedType, TypeIndex> HashedRecords;
/// Contains a list of all records indexed by TypeIndex.toArrayIndex().
SmallVector<ArrayRef<uint8_t>, 2> SeenRecords;
public:
explicit MergingTypeTableBuilder(BumpPtrAllocator &Storage);
~MergingTypeTableBuilder();
// TypeCollection overrides
std::optional<TypeIndex> getFirst() override;
std::optional<TypeIndex> getNext(TypeIndex Prev) override;
CVType getType(TypeIndex Index) override;
StringRef getTypeName(TypeIndex Index) override;
bool contains(TypeIndex Index) override;
uint32_t size() override;
uint32_t capacity() override;
bool replaceType(TypeIndex &Index, CVType Data, bool Stabilize) override;
// public interface
void reset();
TypeIndex nextTypeIndex() const;
BumpPtrAllocator &getAllocator() { return RecordStorage; }
ArrayRef<ArrayRef<uint8_t>> records() const;
TypeIndex insertRecordAs(hash_code Hash, ArrayRef<uint8_t> &Record);
TypeIndex insertRecordBytes(ArrayRef<uint8_t> &Record);
TypeIndex insertRecord(ContinuationRecordBuilder &Builder);
template <typename T> TypeIndex writeLeafType(T &Record) {
ArrayRef<uint8_t> Data = SimpleSerializer.serialize(Record);
return insertRecordBytes(Data);
}
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_MERGINGTYPETABLEBUILDER_H
PK hwFZ
��'� � ' DebugInfo/CodeView/TypeIndexDiscovery.hnu �[��� //===- TypeIndexDiscovery.h -------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_TYPEINDEXDISCOVERY_H
#define LLVM_DEBUGINFO_CODEVIEW_TYPEINDEXDISCOVERY_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/DebugInfo/CodeView/CVRecord.h"
namespace llvm {
template <typename T> class SmallVectorImpl;
namespace codeview {
class TypeIndex;
enum class TiRefKind { TypeRef, IndexRef };
struct TiReference {
TiRefKind Kind;
uint32_t Offset;
uint32_t Count;
};
void discoverTypeIndices(ArrayRef<uint8_t> RecordData,
SmallVectorImpl<TiReference> &Refs);
void discoverTypeIndices(const CVType &Type,
SmallVectorImpl<TiReference> &Refs);
void discoverTypeIndices(const CVType &Type,
SmallVectorImpl<TypeIndex> &Indices);
void discoverTypeIndices(ArrayRef<uint8_t> RecordData,
SmallVectorImpl<TypeIndex> &Indices);
/// Discover type indices in symbol records. Returns false if this is an unknown
/// record.
bool discoverTypeIndicesInSymbol(const CVSymbol &Symbol,
SmallVectorImpl<TiReference> &Refs);
bool discoverTypeIndicesInSymbol(ArrayRef<uint8_t> RecordData,
SmallVectorImpl<TiReference> &Refs);
bool discoverTypeIndicesInSymbol(ArrayRef<uint8_t> RecordData,
SmallVectorImpl<TypeIndex> &Indices);
}
}
#endif
PK hwFZi���u u + DebugInfo/CodeView/GlobalTypeTableBuilder.hnu �[��� //===- GlobalTypeTableBuilder.h ----------------------------------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_GLOBALTYPETABLEBUILDER_H
#define LLVM_DEBUGINFO_CODEVIEW_GLOBALTYPETABLEBUILDER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/SimpleTypeSerializer.h"
#include "llvm/DebugInfo/CodeView/TypeCollection.h"
#include "llvm/DebugInfo/CodeView/TypeHashing.h"
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
#include "llvm/Support/Allocator.h"
#include <cassert>
#include <cstdint>
namespace llvm {
namespace codeview {
class ContinuationRecordBuilder;
class GlobalTypeTableBuilder : public TypeCollection {
/// Storage for records. These need to outlive the TypeTableBuilder.
BumpPtrAllocator &RecordStorage;
/// A serializer that can write non-continuation leaf types. Only used as
/// a convenience function so that we can provide an interface method to
/// write an unserialized record.
SimpleTypeSerializer SimpleSerializer;
/// Hash table.
DenseMap<GloballyHashedType, TypeIndex> HashedRecords;
/// Contains a list of all records indexed by TypeIndex.toArrayIndex().
SmallVector<ArrayRef<uint8_t>, 2> SeenRecords;
/// Contains a list of all hash values indexed by TypeIndex.toArrayIndex().
SmallVector<GloballyHashedType, 2> SeenHashes;
public:
explicit GlobalTypeTableBuilder(BumpPtrAllocator &Storage);
~GlobalTypeTableBuilder();
// TypeCollection overrides
std::optional<TypeIndex> getFirst() override;
std::optional<TypeIndex> getNext(TypeIndex Prev) override;
CVType getType(TypeIndex Index) override;
StringRef getTypeName(TypeIndex Index) override;
bool contains(TypeIndex Index) override;
uint32_t size() override;
uint32_t capacity() override;
bool replaceType(TypeIndex &Index, CVType Data, bool Stabilize) override;
// public interface
void reset();
TypeIndex nextTypeIndex() const;
BumpPtrAllocator &getAllocator() { return RecordStorage; }
ArrayRef<ArrayRef<uint8_t>> records() const;
ArrayRef<GloballyHashedType> hashes() const;
template <typename CreateFunc>
TypeIndex insertRecordAs(GloballyHashedType Hash, size_t RecordSize,
CreateFunc Create) {
assert(RecordSize < UINT32_MAX && "Record too big");
assert(RecordSize % 4 == 0 &&
"RecordSize is not a multiple of 4 bytes which will cause "
"misalignment in the output TPI stream!");
auto Result = HashedRecords.try_emplace(Hash, nextTypeIndex());
if (LLVM_UNLIKELY(Result.second /*inserted*/ ||
Result.first->second.isSimple())) {
uint8_t *Stable = RecordStorage.Allocate<uint8_t>(RecordSize);
MutableArrayRef<uint8_t> Data(Stable, RecordSize);
ArrayRef<uint8_t> StableRecord = Create(Data);
if (StableRecord.empty()) {
// Records with forward references into the Type stream will be deferred
// for insertion at a later time, on the second pass.
Result.first->getSecond() = TypeIndex(SimpleTypeKind::NotTranslated);
return TypeIndex(SimpleTypeKind::NotTranslated);
}
if (Result.first->second.isSimple()) {
assert(Result.first->second.getIndex() ==
(uint32_t)SimpleTypeKind::NotTranslated);
// On the second pass, update with index to remapped record. The
// (initially misbehaved) record will now come *after* other records
// resolved in the first pass, with proper *back* references in the
// stream.
Result.first->second = nextTypeIndex();
}
SeenRecords.push_back(StableRecord);
SeenHashes.push_back(Hash);
}
return Result.first->second;
}
TypeIndex insertRecordBytes(ArrayRef<uint8_t> Data);
TypeIndex insertRecord(ContinuationRecordBuilder &Builder);
template <typename T> TypeIndex writeLeafType(T &Record) {
ArrayRef<uint8_t> Data = SimpleSerializer.serialize(Record);
return insertRecordBytes(Data);
}
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_GLOBALTYPETABLEBUILDER_H
PK hwFZ�/�c� � % DebugInfo/CodeView/SymbolSerializer.hnu �[��� //===- SymbolSerializer.h ---------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_SYMBOLSERIALIZER_H
#define LLVM_DEBUGINFO_CODEVIEW_SYMBOLSERIALIZER_H
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/RecordSerialization.h"
#include "llvm/DebugInfo/CodeView/SymbolRecordMapping.h"
#include "llvm/DebugInfo/CodeView/SymbolVisitorCallbacks.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/BinaryByteStream.h"
#include "llvm/Support/BinaryStreamWriter.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <array>
#include <cstdint>
namespace llvm {
namespace codeview {
class SymbolSerializer : public SymbolVisitorCallbacks {
BumpPtrAllocator &Storage;
// Since this is a fixed size buffer, use a stack allocated buffer. This
// yields measurable performance increase over the repeated heap allocations
// when serializing many independent records via writeOneSymbol.
std::array<uint8_t, MaxRecordLength> RecordBuffer;
MutableBinaryByteStream Stream;
BinaryStreamWriter Writer;
SymbolRecordMapping Mapping;
std::optional<SymbolKind> CurrentSymbol;
Error writeRecordPrefix(SymbolKind Kind) {
RecordPrefix Prefix;
Prefix.RecordKind = Kind;
Prefix.RecordLen = 0;
if (auto EC = Writer.writeObject(Prefix))
return EC;
return Error::success();
}
public:
SymbolSerializer(BumpPtrAllocator &Storage, CodeViewContainer Container);
template <typename SymType>
static CVSymbol writeOneSymbol(SymType &Sym, BumpPtrAllocator &Storage,
CodeViewContainer Container) {
RecordPrefix Prefix{uint16_t(Sym.Kind)};
CVSymbol Result(&Prefix, sizeof(Prefix));
SymbolSerializer Serializer(Storage, Container);
consumeError(Serializer.visitSymbolBegin(Result));
consumeError(Serializer.visitKnownRecord(Result, Sym));
consumeError(Serializer.visitSymbolEnd(Result));
return Result;
}
Error visitSymbolBegin(CVSymbol &Record) override;
Error visitSymbolEnd(CVSymbol &Record) override;
#define SYMBOL_RECORD(EnumName, EnumVal, Name) \
Error visitKnownRecord(CVSymbol &CVR, Name &Record) override { \
return visitKnownRecordImpl(CVR, Record); \
}
#define SYMBOL_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
#include "llvm/DebugInfo/CodeView/CodeViewSymbols.def"
private:
template <typename RecordKind>
Error visitKnownRecordImpl(CVSymbol &CVR, RecordKind &Record) {
return Mapping.visitKnownRecord(CVR, Record);
}
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_SYMBOLSERIALIZER_H
PK hwFZ1Ƨ � $ DebugInfo/CodeView/DebugSubsection.hnu �[��� //===- DebugSubsection.h ------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_DEBUGSUBSECTION_H
#define LLVM_DEBUGINFO_CODEVIEW_DEBUGSUBSECTION_H
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/Support/Error.h"
#include <cstdint>
namespace llvm {
class BinaryStreamWriter;
namespace codeview {
class DebugSubsectionRef {
public:
explicit DebugSubsectionRef(DebugSubsectionKind Kind) : Kind(Kind) {}
virtual ~DebugSubsectionRef();
static bool classof(const DebugSubsectionRef *S) { return true; }
DebugSubsectionKind kind() const { return Kind; }
protected:
DebugSubsectionKind Kind;
};
class DebugSubsection {
public:
explicit DebugSubsection(DebugSubsectionKind Kind) : Kind(Kind) {}
virtual ~DebugSubsection();
static bool classof(const DebugSubsection *S) { return true; }
DebugSubsectionKind kind() const { return Kind; }
virtual Error commit(BinaryStreamWriter &Writer) const = 0;
virtual uint32_t calculateSerializedSize() const = 0;
protected:
DebugSubsectionKind Kind;
};
} // namespace codeview
} // namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_DEBUGSUBSECTION_H
PK hwFZ����5 5 & DebugInfo/CodeView/TypeRecordMapping.hnu �[��� //===- TypeRecordMapping.h --------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_TYPERECORDMAPPING_H
#define LLVM_DEBUGINFO_CODEVIEW_TYPERECORDMAPPING_H
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/CodeViewRecordIO.h"
#include "llvm/DebugInfo/CodeView/TypeVisitorCallbacks.h"
#include "llvm/Support/Error.h"
#include <optional>
namespace llvm {
class BinaryStreamReader;
class BinaryStreamWriter;
namespace codeview {
class TypeIndex;
struct CVMemberRecord;
class TypeRecordMapping : public TypeVisitorCallbacks {
public:
explicit TypeRecordMapping(BinaryStreamReader &Reader) : IO(Reader) {}
explicit TypeRecordMapping(BinaryStreamWriter &Writer) : IO(Writer) {}
explicit TypeRecordMapping(CodeViewRecordStreamer &Streamer) : IO(Streamer) {}
using TypeVisitorCallbacks::visitTypeBegin;
Error visitTypeBegin(CVType &Record) override;
Error visitTypeBegin(CVType &Record, TypeIndex Index) override;
Error visitTypeEnd(CVType &Record) override;
Error visitMemberBegin(CVMemberRecord &Record) override;
Error visitMemberEnd(CVMemberRecord &Record) override;
#define TYPE_RECORD(EnumName, EnumVal, Name) \
Error visitKnownRecord(CVType &CVR, Name##Record &Record) override;
#define MEMBER_RECORD(EnumName, EnumVal, Name) \
Error visitKnownMember(CVMemberRecord &CVR, Name##Record &Record) override;
#define TYPE_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
#define MEMBER_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
#include "llvm/DebugInfo/CodeView/CodeViewTypes.def"
private:
std::optional<TypeLeafKind> TypeKind;
std::optional<TypeLeafKind> MemberKind;
CodeViewRecordIO IO;
};
}
}
#endif
PK hwFZbFB B - DebugInfo/CodeView/DebugChecksumsSubsection.hnu �[��� //===- DebugChecksumsSubsection.h -------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_DEBUGCHECKSUMSSUBSECTION_H
#define LLVM_DEBUGINFO_CODEVIEW_DEBUGCHECKSUMSSUBSECTION_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/DebugSubsection.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <vector>
namespace llvm {
class BinaryStreamReader;
class BinaryStreamWriter;
namespace codeview {
class DebugStringTableSubsection;
struct FileChecksumEntry {
uint32_t FileNameOffset; // Byte offset of filename in global stringtable.
FileChecksumKind Kind; // The type of checksum.
ArrayRef<uint8_t> Checksum; // The bytes of the checksum.
};
} // end namespace codeview
template <> struct VarStreamArrayExtractor<codeview::FileChecksumEntry> {
public:
using ContextType = void;
Error operator()(BinaryStreamRef Stream, uint32_t &Len,
codeview::FileChecksumEntry &Item);
};
namespace codeview {
class DebugChecksumsSubsectionRef final : public DebugSubsectionRef {
using FileChecksumArray = VarStreamArray<codeview::FileChecksumEntry>;
using Iterator = FileChecksumArray::Iterator;
public:
DebugChecksumsSubsectionRef()
: DebugSubsectionRef(DebugSubsectionKind::FileChecksums) {}
static bool classof(const DebugSubsectionRef *S) {
return S->kind() == DebugSubsectionKind::FileChecksums;
}
bool valid() const { return Checksums.valid(); }
Error initialize(BinaryStreamReader Reader);
Error initialize(BinaryStreamRef Stream);
Iterator begin() const { return Checksums.begin(); }
Iterator end() const { return Checksums.end(); }
const FileChecksumArray &getArray() const { return Checksums; }
private:
FileChecksumArray Checksums;
};
class DebugChecksumsSubsection final : public DebugSubsection {
public:
explicit DebugChecksumsSubsection(DebugStringTableSubsection &Strings);
static bool classof(const DebugSubsection *S) {
return S->kind() == DebugSubsectionKind::FileChecksums;
}
void addChecksum(StringRef FileName, FileChecksumKind Kind,
ArrayRef<uint8_t> Bytes);
uint32_t calculateSerializedSize() const override;
Error commit(BinaryStreamWriter &Writer) const override;
uint32_t mapChecksumOffset(StringRef FileName) const;
private:
DebugStringTableSubsection &Strings;
DenseMap<uint32_t, uint32_t> OffsetMap;
uint32_t SerializedSize = 0;
BumpPtrAllocator Storage;
std::vector<FileChecksumEntry> Checksums;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_DEBUGCHECKSUMSSUBSECTION_H
PK hwFZ�P��o o & DebugInfo/CodeView/TypeRecordHelpers.hnu �[��� //===- TypeRecordHelpers.h --------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_TYPERECORDHELPERS_H
#define LLVM_DEBUGINFO_CODEVIEW_TYPERECORDHELPERS_H
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
namespace llvm {
namespace codeview {
/// Given an arbitrary codeview type, determine if it is an LF_STRUCTURE,
/// LF_CLASS, LF_INTERFACE, LF_UNION, or LF_ENUM with the forward ref class
/// option.
bool isUdtForwardRef(CVType CVT);
/// Given a CVType which is assumed to be an LF_MODIFIER, return the
/// TypeIndex of the type that the LF_MODIFIER modifies.
TypeIndex getModifiedType(const CVType &CVT);
/// Return true if this record should be in the IPI stream of a PDB. In an
/// object file, these record kinds will appear mixed into the .debug$T section.
inline bool isIdRecord(TypeLeafKind K) {
switch (K) {
case TypeLeafKind::LF_FUNC_ID:
case TypeLeafKind::LF_MFUNC_ID:
case TypeLeafKind::LF_STRING_ID:
case TypeLeafKind::LF_SUBSTR_LIST:
case TypeLeafKind::LF_BUILDINFO:
case TypeLeafKind::LF_UDT_SRC_LINE:
case TypeLeafKind::LF_UDT_MOD_SRC_LINE:
return true;
default:
return false;
}
}
/// Given an arbitrary codeview type, determine if it is an LF_STRUCTURE,
/// LF_CLASS, LF_INTERFACE, LF_UNION.
inline bool isAggregate(CVType CVT) {
switch (CVT.kind()) {
case LF_STRUCTURE:
case LF_CLASS:
case LF_INTERFACE:
case LF_UNION:
return true;
default:
return false;
}
}
/// Given an arbitrary codeview type index, determine its size.
uint64_t getSizeInBytesForTypeIndex(TypeIndex TI);
/// Given an arbitrary codeview type, return the type's size in the case
/// of aggregate (LF_STRUCTURE, LF_CLASS, LF_INTERFACE, LF_UNION).
uint64_t getSizeInBytesForTypeRecord(CVType CVT);
} // namespace codeview
} // namespace llvm
#endif
PK hwFZ̻��o o + DebugInfo/CodeView/DebugCrossExSubsection.hnu �[��� //===- DebugCrossExSubsection.h ---------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_DEBUGCROSSEXSUBSECTION_H
#define LLVM_DEBUGINFO_CODEVIEW_DEBUGCROSSEXSUBSECTION_H
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/DebugSubsection.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <map>
namespace llvm {
class BinaryStreamReader;
class BinaryStreamWriter;
namespace codeview {
class DebugCrossModuleExportsSubsectionRef final : public DebugSubsectionRef {
using ReferenceArray = FixedStreamArray<CrossModuleExport>;
using Iterator = ReferenceArray::Iterator;
public:
DebugCrossModuleExportsSubsectionRef()
: DebugSubsectionRef(DebugSubsectionKind::CrossScopeExports) {}
static bool classof(const DebugSubsectionRef *S) {
return S->kind() == DebugSubsectionKind::CrossScopeExports;
}
Error initialize(BinaryStreamReader Reader);
Error initialize(BinaryStreamRef Stream);
Iterator begin() const { return References.begin(); }
Iterator end() const { return References.end(); }
private:
FixedStreamArray<CrossModuleExport> References;
};
class DebugCrossModuleExportsSubsection final : public DebugSubsection {
public:
DebugCrossModuleExportsSubsection()
: DebugSubsection(DebugSubsectionKind::CrossScopeExports) {}
static bool classof(const DebugSubsection *S) {
return S->kind() == DebugSubsectionKind::CrossScopeExports;
}
void addMapping(uint32_t Local, uint32_t Global);
uint32_t calculateSerializedSize() const override;
Error commit(BinaryStreamWriter &Writer) const override;
private:
std::map<uint32_t, uint32_t> Mappings;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_DEBUGCROSSEXSUBSECTION_H
PK hwFZ���] ( DebugInfo/CodeView/TypeTableCollection.hnu �[��� //===- TypeTableCollection.h ---------------------------------- *- C++ --*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_TYPETABLECOLLECTION_H
#define LLVM_DEBUGINFO_CODEVIEW_TYPETABLECOLLECTION_H
#include "llvm/DebugInfo/CodeView/TypeCollection.h"
#include "llvm/Support/StringSaver.h"
#include <vector>
namespace llvm {
namespace codeview {
class TypeTableCollection : public TypeCollection {
public:
explicit TypeTableCollection(ArrayRef<ArrayRef<uint8_t>> Records);
std::optional<TypeIndex> getFirst() override;
std::optional<TypeIndex> getNext(TypeIndex Prev) override;
CVType getType(TypeIndex Index) override;
StringRef getTypeName(TypeIndex Index) override;
bool contains(TypeIndex Index) override;
uint32_t size() override;
uint32_t capacity() override;
bool replaceType(TypeIndex &Index, CVType Data, bool Stabilize) override;
private:
BumpPtrAllocator Allocator;
StringSaver NameStorage;
std::vector<StringRef> Names;
ArrayRef<ArrayRef<uint8_t>> Records;
};
}
}
#endif
PK hwFZ?�R�j j # DebugInfo/CodeView/TypeCollection.hnu �[��� //===- TypeCollection.h - A collection of CodeView type records -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_TYPECOLLECTION_H
#define LLVM_DEBUGINFO_CODEVIEW_TYPECOLLECTION_H
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
namespace llvm {
namespace codeview {
class TypeCollection {
public:
virtual ~TypeCollection() = default;
bool empty() { return size() == 0; }
virtual std::optional<TypeIndex> getFirst() = 0;
virtual std::optional<TypeIndex> getNext(TypeIndex Prev) = 0;
virtual CVType getType(TypeIndex Index) = 0;
virtual StringRef getTypeName(TypeIndex Index) = 0;
virtual bool contains(TypeIndex Index) = 0;
virtual uint32_t size() = 0;
virtual uint32_t capacity() = 0;
virtual bool replaceType(TypeIndex &Index, CVType Data, bool Stabilize) = 0;
template <typename TFunc> void ForEachRecord(TFunc Func) {
std::optional<TypeIndex> Next = getFirst();
while (Next) {
TypeIndex N = *Next;
Func(N, getType(N));
Next = getNext(N);
}
}
};
}
}
#endif
PK hwFZ ���� � ( DebugInfo/CodeView/StringsAndChecksums.hnu �[��� //===- StringsAndChecksums.h ------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_STRINGSANDCHECKSUMS_H
#define LLVM_DEBUGINFO_CODEVIEW_STRINGSANDCHECKSUMS_H
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/DebugSubsectionRecord.h"
#include <memory>
namespace llvm {
namespace codeview {
class DebugChecksumsSubsection;
class DebugChecksumsSubsectionRef;
class DebugStringTableSubsection;
class DebugStringTableSubsectionRef;
class StringsAndChecksumsRef {
public:
// If no subsections are known about initially, we find as much as we can.
StringsAndChecksumsRef();
// If only a string table subsection is given, we find a checksums subsection.
explicit StringsAndChecksumsRef(const DebugStringTableSubsectionRef &Strings);
// If both subsections are given, we don't need to find anything.
StringsAndChecksumsRef(const DebugStringTableSubsectionRef &Strings,
const DebugChecksumsSubsectionRef &Checksums);
void setStrings(const DebugStringTableSubsectionRef &Strings);
void setChecksums(const DebugChecksumsSubsectionRef &CS);
void reset();
void resetStrings();
void resetChecksums();
template <typename T> void initialize(T &&FragmentRange) {
for (const DebugSubsectionRecord &R : FragmentRange) {
if (Strings && Checksums)
return;
if (R.kind() == DebugSubsectionKind::FileChecksums) {
initializeChecksums(R);
continue;
}
if (R.kind() == DebugSubsectionKind::StringTable && !Strings) {
// While in practice we should never encounter a string table even
// though the string table is already initialized, in theory it's
// possible. PDBs are supposed to have one global string table and
// then this subsection should not appear. Whereas object files are
// supposed to have this subsection appear exactly once. However,
// for testing purposes it's nice to be able to test this subsection
// independently of one format or the other, so for some tests we
// manually construct a PDB that contains this subsection in addition
// to a global string table.
initializeStrings(R);
continue;
}
}
}
const DebugStringTableSubsectionRef &strings() const { return *Strings; }
const DebugChecksumsSubsectionRef &checksums() const { return *Checksums; }
bool hasStrings() const { return Strings != nullptr; }
bool hasChecksums() const { return Checksums != nullptr; }
private:
void initializeStrings(const DebugSubsectionRecord &SR);
void initializeChecksums(const DebugSubsectionRecord &FCR);
std::shared_ptr<DebugStringTableSubsectionRef> OwnedStrings;
std::shared_ptr<DebugChecksumsSubsectionRef> OwnedChecksums;
const DebugStringTableSubsectionRef *Strings = nullptr;
const DebugChecksumsSubsectionRef *Checksums = nullptr;
};
class StringsAndChecksums {
public:
using StringsPtr = std::shared_ptr<DebugStringTableSubsection>;
using ChecksumsPtr = std::shared_ptr<DebugChecksumsSubsection>;
// If no subsections are known about initially, we find as much as we can.
StringsAndChecksums() = default;
void setStrings(const StringsPtr &SP) { Strings = SP; }
void setChecksums(const ChecksumsPtr &CP) { Checksums = CP; }
const StringsPtr &strings() const { return Strings; }
const ChecksumsPtr &checksums() const { return Checksums; }
bool hasStrings() const { return Strings != nullptr; }
bool hasChecksums() const { return Checksums != nullptr; }
private:
StringsPtr Strings;
ChecksumsPtr Checksums;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_STRINGSANDCHECKSUMS_H
PK hwFZ�>�W W $ DebugInfo/CodeView/CodeViewTypes.defnu �[��� //===-- CodeViewTypes.def - All CodeView leaf types -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// See LEAF_ENUM_e in cvinfo.h. This should match the constants there.
//
//===----------------------------------------------------------------------===//
// If the type is known, then we have a record describing it in TypeRecord.h.
#ifndef CV_TYPE
#define CV_TYPE(lf_ename, value)
#endif
// If the type is known, then we have a record describing it in TypeRecord.h.
#ifndef TYPE_RECORD
#define TYPE_RECORD(lf_ename, value, name) CV_TYPE(lf_ename, value)
#endif
#ifndef TYPE_RECORD_ALIAS
#define TYPE_RECORD_ALIAS(lf_ename, value, name, alias_name) \
TYPE_RECORD(lf_ename, value, name)
#endif
#ifndef MEMBER_RECORD
#define MEMBER_RECORD(lf_ename, value, name) TYPE_RECORD(lf_ename, value, name)
#endif
#ifndef MEMBER_RECORD_ALIAS
#define MEMBER_RECORD_ALIAS(lf_ename, value, name, alias_name) \
MEMBER_RECORD(lf_ename, value, name)
#endif
TYPE_RECORD(LF_POINTER, 0x1002, Pointer)
TYPE_RECORD(LF_MODIFIER, 0x1001, Modifier)
TYPE_RECORD(LF_PROCEDURE, 0x1008, Procedure)
TYPE_RECORD(LF_MFUNCTION, 0x1009, MemberFunction)
TYPE_RECORD(LF_LABEL, 0x000e, Label)
TYPE_RECORD(LF_ARGLIST, 0x1201, ArgList)
TYPE_RECORD(LF_FIELDLIST, 0x1203, FieldList)
TYPE_RECORD(LF_ARRAY, 0x1503, Array)
TYPE_RECORD(LF_CLASS, 0x1504, Class)
TYPE_RECORD_ALIAS(LF_STRUCTURE, 0x1505, Struct, Class)
TYPE_RECORD_ALIAS(LF_INTERFACE, 0x1519, Interface, Class)
TYPE_RECORD(LF_UNION, 0x1506, Union)
TYPE_RECORD(LF_ENUM, 0x1507, Enum)
TYPE_RECORD(LF_TYPESERVER2, 0x1515, TypeServer2)
TYPE_RECORD(LF_VFTABLE, 0x151d, VFTable)
TYPE_RECORD(LF_VTSHAPE, 0x000a, VFTableShape)
TYPE_RECORD(LF_BITFIELD, 0x1205, BitField)
// Member type records. These are generally not length prefixed, and appear
// inside of a field list record.
MEMBER_RECORD(LF_BCLASS, 0x1400, BaseClass)
MEMBER_RECORD_ALIAS(LF_BINTERFACE, 0x151a, BaseInterface, BaseClass)
MEMBER_RECORD(LF_VBCLASS, 0x1401, VirtualBaseClass)
MEMBER_RECORD_ALIAS(LF_IVBCLASS, 0x1402, IndirectVirtualBaseClass,
VirtualBaseClass)
MEMBER_RECORD(LF_VFUNCTAB, 0x1409, VFPtr)
MEMBER_RECORD(LF_STMEMBER, 0x150e, StaticDataMember)
MEMBER_RECORD(LF_METHOD, 0x150f, OverloadedMethod)
MEMBER_RECORD(LF_MEMBER, 0x150d, DataMember)
MEMBER_RECORD(LF_NESTTYPE, 0x1510, NestedType)
MEMBER_RECORD(LF_ONEMETHOD, 0x1511, OneMethod)
MEMBER_RECORD(LF_ENUMERATE, 0x1502, Enumerator)
MEMBER_RECORD(LF_INDEX, 0x1404, ListContinuation)
// ID leaf records. Subsequent leaf types may be referenced from .debug$S.
TYPE_RECORD(LF_FUNC_ID, 0x1601, FuncId)
TYPE_RECORD(LF_MFUNC_ID, 0x1602, MemberFuncId)
TYPE_RECORD(LF_BUILDINFO, 0x1603, BuildInfo)
TYPE_RECORD(LF_SUBSTR_LIST, 0x1604, StringList)
TYPE_RECORD(LF_STRING_ID, 0x1605, StringId)
TYPE_RECORD(LF_UDT_SRC_LINE, 0x1606, UdtSourceLine)
TYPE_RECORD(LF_UDT_MOD_SRC_LINE, 0x1607, UdtModSourceLine)
TYPE_RECORD(LF_METHODLIST, 0x1206, MethodOverloadList)
TYPE_RECORD(LF_PRECOMP, 0x1509, Precomp)
TYPE_RECORD(LF_ENDPRECOMP, 0x0014, EndPrecomp)
// 16 bit type records.
CV_TYPE(LF_MODIFIER_16t, 0x0001)
CV_TYPE(LF_POINTER_16t, 0x0002)
CV_TYPE(LF_ARRAY_16t, 0x0003)
CV_TYPE(LF_CLASS_16t, 0x0004)
CV_TYPE(LF_STRUCTURE_16t, 0x0005)
CV_TYPE(LF_UNION_16t, 0x0006)
CV_TYPE(LF_ENUM_16t, 0x0007)
CV_TYPE(LF_PROCEDURE_16t, 0x0008)
CV_TYPE(LF_MFUNCTION_16t, 0x0009)
CV_TYPE(LF_COBOL0_16t, 0x000b)
CV_TYPE(LF_COBOL1, 0x000c)
CV_TYPE(LF_BARRAY_16t, 0x000d)
CV_TYPE(LF_NULLLEAF, 0x000f) // LF_NULL
CV_TYPE(LF_NOTTRAN, 0x0010)
CV_TYPE(LF_DIMARRAY_16t, 0x0011)
CV_TYPE(LF_VFTPATH_16t, 0x0012)
CV_TYPE(LF_PRECOMP_16t, 0x0013)
CV_TYPE(LF_OEM_16t, 0x0015)
CV_TYPE(LF_TYPESERVER_ST, 0x0016)
CV_TYPE(LF_SKIP_16t, 0x0200)
CV_TYPE(LF_ARGLIST_16t, 0x0201)
CV_TYPE(LF_DEFARG_16t, 0x0202)
CV_TYPE(LF_LIST, 0x0203)
CV_TYPE(LF_FIELDLIST_16t, 0x0204)
CV_TYPE(LF_DERIVED_16t, 0x0205)
CV_TYPE(LF_BITFIELD_16t, 0x0206)
CV_TYPE(LF_METHODLIST_16t, 0x0207)
CV_TYPE(LF_DIMCONU_16t, 0x0208)
CV_TYPE(LF_DIMCONLU_16t, 0x0209)
CV_TYPE(LF_DIMVARU_16t, 0x020a)
CV_TYPE(LF_DIMVARLU_16t, 0x020b)
CV_TYPE(LF_REFSYM, 0x020c)
// 16 bit member types. Generally not length prefixed.
CV_TYPE(LF_BCLASS_16t, 0x0400)
CV_TYPE(LF_VBCLASS_16t, 0x0401)
CV_TYPE(LF_IVBCLASS_16t, 0x0402)
CV_TYPE(LF_ENUMERATE_ST, 0x0403)
CV_TYPE(LF_FRIENDFCN_16t, 0x0404)
CV_TYPE(LF_INDEX_16t, 0x0405)
CV_TYPE(LF_MEMBER_16t, 0x0406)
CV_TYPE(LF_STMEMBER_16t, 0x0407)
CV_TYPE(LF_METHOD_16t, 0x0408)
CV_TYPE(LF_NESTTYPE_16t, 0x0409)
CV_TYPE(LF_VFUNCTAB_16t, 0x040a)
CV_TYPE(LF_FRIENDCLS_16t, 0x040b)
CV_TYPE(LF_ONEMETHOD_16t, 0x040c)
CV_TYPE(LF_VFUNCOFF_16t, 0x040d)
CV_TYPE(LF_TI16_MAX, 0x1000)
CV_TYPE(LF_ARRAY_ST, 0x1003)
CV_TYPE(LF_CLASS_ST, 0x1004)
CV_TYPE(LF_STRUCTURE_ST, 0x1005)
CV_TYPE(LF_UNION_ST, 0x1006)
CV_TYPE(LF_ENUM_ST, 0x1007)
CV_TYPE(LF_COBOL0, 0x100a)
CV_TYPE(LF_BARRAY, 0x100b)
CV_TYPE(LF_DIMARRAY_ST, 0x100c)
CV_TYPE(LF_VFTPATH, 0x100d)
CV_TYPE(LF_PRECOMP_ST, 0x100e)
CV_TYPE(LF_OEM, 0x100f)
CV_TYPE(LF_ALIAS_ST, 0x1010)
CV_TYPE(LF_OEM2, 0x1011)
CV_TYPE(LF_SKIP, 0x1200)
CV_TYPE(LF_DEFARG_ST, 0x1202)
CV_TYPE(LF_DERIVED, 0x1204)
CV_TYPE(LF_DIMCONU, 0x1207)
CV_TYPE(LF_DIMCONLU, 0x1208)
CV_TYPE(LF_DIMVARU, 0x1209)
CV_TYPE(LF_DIMVARLU, 0x120a)
// Member type records. These are generally not length prefixed, and appear
// inside of a field list record.
CV_TYPE(LF_FRIENDFCN_ST, 0x1403)
CV_TYPE(LF_MEMBER_ST, 0x1405)
CV_TYPE(LF_STMEMBER_ST, 0x1406)
CV_TYPE(LF_METHOD_ST, 0x1407)
CV_TYPE(LF_NESTTYPE_ST, 0x1408)
CV_TYPE(LF_FRIENDCLS, 0x140a)
CV_TYPE(LF_ONEMETHOD_ST, 0x140b)
CV_TYPE(LF_VFUNCOFF, 0x140c)
CV_TYPE(LF_NESTTYPEEX_ST, 0x140d)
CV_TYPE(LF_MEMBERMODIFY_ST, 0x140e)
CV_TYPE(LF_MANAGED_ST, 0x140f)
CV_TYPE(LF_ST_MAX, 0x1500)
CV_TYPE(LF_TYPESERVER, 0x1501)
CV_TYPE(LF_DIMARRAY, 0x1508)
CV_TYPE(LF_ALIAS, 0x150a)
CV_TYPE(LF_DEFARG, 0x150b)
CV_TYPE(LF_FRIENDFCN, 0x150c)
CV_TYPE(LF_NESTTYPEEX, 0x1512)
CV_TYPE(LF_MEMBERMODIFY, 0x1513)
CV_TYPE(LF_MANAGED, 0x1514)
CV_TYPE(LF_STRIDED_ARRAY, 0x1516)
CV_TYPE(LF_HLSL, 0x1517)
CV_TYPE(LF_MODIFIER_EX, 0x1518)
CV_TYPE(LF_VECTOR, 0x151b)
CV_TYPE(LF_MATRIX, 0x151c)
// ID leaf records. Subsequent leaf types may be referenced from .debug$S.
// Numeric leaf types. These are generally contained in other records, and not
// encountered in the main type stream.
CV_TYPE(LF_NUMERIC, 0x8000)
CV_TYPE(LF_CHAR, 0x8000)
CV_TYPE(LF_SHORT, 0x8001)
CV_TYPE(LF_USHORT, 0x8002)
CV_TYPE(LF_LONG, 0x8003)
CV_TYPE(LF_ULONG, 0x8004)
CV_TYPE(LF_REAL32, 0x8005)
CV_TYPE(LF_REAL64, 0x8006)
CV_TYPE(LF_REAL80, 0x8007)
CV_TYPE(LF_REAL128, 0x8008)
CV_TYPE(LF_QUADWORD, 0x8009)
CV_TYPE(LF_UQUADWORD, 0x800a)
CV_TYPE(LF_REAL48, 0x800b)
CV_TYPE(LF_COMPLEX32, 0x800c)
CV_TYPE(LF_COMPLEX64, 0x800d)
CV_TYPE(LF_COMPLEX80, 0x800e)
CV_TYPE(LF_COMPLEX128, 0x800f)
CV_TYPE(LF_VARSTRING, 0x8010)
CV_TYPE(LF_OCTWORD, 0x8017)
CV_TYPE(LF_UOCTWORD, 0x8018)
CV_TYPE(LF_DECIMAL, 0x8019)
CV_TYPE(LF_DATE, 0x801a)
CV_TYPE(LF_UTF8STRING, 0x801b)
CV_TYPE(LF_REAL16, 0x801c)
// Padding bytes. These are emitted into alignment bytes in the type stream.
CV_TYPE(LF_PAD0, 0xf0)
CV_TYPE(LF_PAD1, 0xf1)
CV_TYPE(LF_PAD2, 0xf2)
CV_TYPE(LF_PAD3, 0xf3)
CV_TYPE(LF_PAD4, 0xf4)
CV_TYPE(LF_PAD5, 0xf5)
CV_TYPE(LF_PAD6, 0xf6)
CV_TYPE(LF_PAD7, 0xf7)
CV_TYPE(LF_PAD8, 0xf8)
CV_TYPE(LF_PAD9, 0xf9)
CV_TYPE(LF_PAD10, 0xfa)
CV_TYPE(LF_PAD11, 0xfb)
CV_TYPE(LF_PAD12, 0xfc)
CV_TYPE(LF_PAD13, 0xfd)
CV_TYPE(LF_PAD14, 0xfe)
CV_TYPE(LF_PAD15, 0xff)
#undef CV_TYPE
#undef TYPE_RECORD
#undef TYPE_RECORD_ALIAS
#undef MEMBER_RECORD
#undef MEMBER_RECORD_ALIAS
PK hwFZ��
f f + DebugInfo/CodeView/DebugSymbolsSubsection.hnu �[��� //===- DebugSymbolsSubsection.h --------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_DEBUGSYMBOLSSUBSECTION_H
#define LLVM_DEBUGINFO_CODEVIEW_DEBUGSYMBOLSSUBSECTION_H
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/DebugSubsection.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace codeview {
class DebugSymbolsSubsectionRef final : public DebugSubsectionRef {
public:
DebugSymbolsSubsectionRef()
: DebugSubsectionRef(DebugSubsectionKind::Symbols) {}
static bool classof(const DebugSubsectionRef *S) {
return S->kind() == DebugSubsectionKind::Symbols;
}
Error initialize(BinaryStreamReader Reader);
CVSymbolArray::Iterator begin() const { return Records.begin(); }
CVSymbolArray::Iterator end() const { return Records.end(); }
private:
CVSymbolArray Records;
};
class DebugSymbolsSubsection final : public DebugSubsection {
public:
DebugSymbolsSubsection() : DebugSubsection(DebugSubsectionKind::Symbols) {}
static bool classof(const DebugSubsection *S) {
return S->kind() == DebugSubsectionKind::Symbols;
}
uint32_t calculateSerializedSize() const override;
Error commit(BinaryStreamWriter &Writer) const override;
void addSymbol(CVSymbol Symbol);
private:
uint32_t Length = 0;
std::vector<CVSymbol> Records;
};
}
}
#endif
PK hwFZ,�
�t t & DebugInfo/CodeView/TypeSymbolEmitter.hnu �[��� //===- TypeSymbolEmitter.h --------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_TYPESYMBOLEMITTER_H
#define LLVM_DEBUGINFO_CODEVIEW_TYPESYMBOLEMITTER_H
namespace llvm {
class StringRef;
namespace codeview {
class TypeIndex;
class TypeSymbolEmitter {
private:
TypeSymbolEmitter(const TypeSymbolEmitter &) = delete;
TypeSymbolEmitter &operator=(const TypeSymbolEmitter &) = delete;
protected:
TypeSymbolEmitter() {}
public:
virtual ~TypeSymbolEmitter() {}
public:
virtual void writeUserDefinedType(TypeIndex TI, StringRef Name) = 0;
};
}
}
#endif
PK hwFZ� G�+n +n ! DebugInfo/CodeView/SymbolRecord.hnu �[��� //===- SymbolRecord.h -------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_SYMBOLRECORD_H
#define LLVM_DEBUGINFO_CODEVIEW_SYMBOLRECORD_H
#include "llvm/ADT/APSInt.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/RecordSerialization.h"
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/Endian.h"
#include <cstdint>
#include <vector>
namespace llvm {
namespace codeview {
class SymbolRecord {
protected:
explicit SymbolRecord(SymbolRecordKind Kind) : Kind(Kind) {}
public:
SymbolRecordKind getKind() const { return Kind; }
SymbolRecordKind Kind;
};
// S_GPROC32, S_LPROC32, S_GPROC32_ID, S_LPROC32_ID, S_LPROC32_DPC or
// S_LPROC32_DPC_ID
class ProcSym : public SymbolRecord {
static constexpr uint32_t RelocationOffset = 32;
public:
explicit ProcSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
ProcSym(SymbolRecordKind Kind, uint32_t RecordOffset)
: SymbolRecord(Kind), RecordOffset(RecordOffset) {}
uint32_t getRelocationOffset() const {
return RecordOffset + RelocationOffset;
}
uint32_t Parent = 0;
uint32_t End = 0;
uint32_t Next = 0;
uint32_t CodeSize = 0;
uint32_t DbgStart = 0;
uint32_t DbgEnd = 0;
TypeIndex FunctionType;
uint32_t CodeOffset = 0;
uint16_t Segment = 0;
ProcSymFlags Flags = ProcSymFlags::None;
StringRef Name;
uint32_t RecordOffset = 0;
};
// S_THUNK32
class Thunk32Sym : public SymbolRecord {
public:
explicit Thunk32Sym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
Thunk32Sym(SymbolRecordKind Kind, uint32_t RecordOffset)
: SymbolRecord(Kind), RecordOffset(RecordOffset) {}
uint32_t Parent = 0;
uint32_t End = 0;
uint32_t Next = 0;
uint32_t Offset = 0;
uint16_t Segment = 0;
uint16_t Length = 0;
ThunkOrdinal Thunk = ThunkOrdinal::Standard;
StringRef Name;
ArrayRef<uint8_t> VariantData;
uint32_t RecordOffset = 0;
};
// S_TRAMPOLINE
class TrampolineSym : public SymbolRecord {
public:
explicit TrampolineSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
TrampolineSym(SymbolRecordKind Kind, uint32_t RecordOffset)
: SymbolRecord(Kind), RecordOffset(RecordOffset) {}
TrampolineType Type;
uint16_t Size = 0;
uint32_t ThunkOffset = 0;
uint32_t TargetOffset = 0;
uint16_t ThunkSection = 0;
uint16_t TargetSection = 0;
uint32_t RecordOffset = 0;
};
// S_SECTION
class SectionSym : public SymbolRecord {
public:
explicit SectionSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
SectionSym(SymbolRecordKind Kind, uint32_t RecordOffset)
: SymbolRecord(Kind), RecordOffset(RecordOffset) {}
uint16_t SectionNumber = 0;
uint8_t Alignment = 0;
uint32_t Rva = 0;
uint32_t Length = 0;
uint32_t Characteristics = 0;
StringRef Name;
uint32_t RecordOffset = 0;
};
// S_COFFGROUP
class CoffGroupSym : public SymbolRecord {
public:
explicit CoffGroupSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
CoffGroupSym(SymbolRecordKind Kind, uint32_t RecordOffset)
: SymbolRecord(Kind), RecordOffset(RecordOffset) {}
uint32_t Size = 0;
uint32_t Characteristics = 0;
uint32_t Offset = 0;
uint16_t Segment = 0;
StringRef Name;
uint32_t RecordOffset = 0;
};
class ScopeEndSym : public SymbolRecord {
public:
explicit ScopeEndSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
ScopeEndSym(SymbolRecordKind Kind, uint32_t RecordOffset)
: SymbolRecord(Kind), RecordOffset(RecordOffset) {}
uint32_t RecordOffset = 0;
};
class CallerSym : public SymbolRecord {
public:
explicit CallerSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
CallerSym(SymbolRecordKind Kind, uint32_t RecordOffset)
: SymbolRecord(Kind), RecordOffset(RecordOffset) {}
std::vector<TypeIndex> Indices;
uint32_t RecordOffset = 0;
};
struct DecodedAnnotation {
StringRef Name;
ArrayRef<uint8_t> Bytes;
BinaryAnnotationsOpCode OpCode = BinaryAnnotationsOpCode::Invalid;
uint32_t U1 = 0;
uint32_t U2 = 0;
int32_t S1 = 0;
};
struct BinaryAnnotationIterator
: public iterator_facade_base<BinaryAnnotationIterator,
std::forward_iterator_tag,
DecodedAnnotation> {
BinaryAnnotationIterator() = default;
BinaryAnnotationIterator(ArrayRef<uint8_t> Annotations) : Data(Annotations) {}
BinaryAnnotationIterator(const BinaryAnnotationIterator &Other)
: Data(Other.Data) {}
bool operator==(BinaryAnnotationIterator Other) const {
return Data == Other.Data;
}
BinaryAnnotationIterator &operator=(const BinaryAnnotationIterator Other) {
Data = Other.Data;
return *this;
}
BinaryAnnotationIterator &operator++() {
if (!ParseCurrentAnnotation()) {
*this = BinaryAnnotationIterator();
return *this;
}
Data = Next;
Next = ArrayRef<uint8_t>();
Current.reset();
return *this;
}
const DecodedAnnotation &operator*() {
ParseCurrentAnnotation();
return *Current;
}
private:
static uint32_t GetCompressedAnnotation(ArrayRef<uint8_t> &Annotations) {
if (Annotations.empty())
return -1;
uint8_t FirstByte = Annotations.front();
Annotations = Annotations.drop_front();
if ((FirstByte & 0x80) == 0x00)
return FirstByte;
if (Annotations.empty())
return -1;
uint8_t SecondByte = Annotations.front();
Annotations = Annotations.drop_front();
if ((FirstByte & 0xC0) == 0x80)
return ((FirstByte & 0x3F) << 8) | SecondByte;
if (Annotations.empty())
return -1;
uint8_t ThirdByte = Annotations.front();
Annotations = Annotations.drop_front();
if (Annotations.empty())
return -1;
uint8_t FourthByte = Annotations.front();
Annotations = Annotations.drop_front();
if ((FirstByte & 0xE0) == 0xC0)
return ((FirstByte & 0x1F) << 24) | (SecondByte << 16) |
(ThirdByte << 8) | FourthByte;
return -1;
}
static int32_t DecodeSignedOperand(uint32_t Operand) {
if (Operand & 1)
return -(Operand >> 1);
return Operand >> 1;
}
static int32_t DecodeSignedOperand(ArrayRef<uint8_t> &Annotations) {
return DecodeSignedOperand(GetCompressedAnnotation(Annotations));
}
bool ParseCurrentAnnotation() {
if (Current)
return true;
Next = Data;
uint32_t Op = GetCompressedAnnotation(Next);
DecodedAnnotation Result;
Result.OpCode = static_cast<BinaryAnnotationsOpCode>(Op);
switch (Result.OpCode) {
case BinaryAnnotationsOpCode::Invalid:
Result.Name = "Invalid";
Next = ArrayRef<uint8_t>();
break;
case BinaryAnnotationsOpCode::CodeOffset:
Result.Name = "CodeOffset";
Result.U1 = GetCompressedAnnotation(Next);
break;
case BinaryAnnotationsOpCode::ChangeCodeOffsetBase:
Result.Name = "ChangeCodeOffsetBase";
Result.U1 = GetCompressedAnnotation(Next);
break;
case BinaryAnnotationsOpCode::ChangeCodeOffset:
Result.Name = "ChangeCodeOffset";
Result.U1 = GetCompressedAnnotation(Next);
break;
case BinaryAnnotationsOpCode::ChangeCodeLength:
Result.Name = "ChangeCodeLength";
Result.U1 = GetCompressedAnnotation(Next);
break;
case BinaryAnnotationsOpCode::ChangeFile:
Result.Name = "ChangeFile";
Result.U1 = GetCompressedAnnotation(Next);
break;
case BinaryAnnotationsOpCode::ChangeLineEndDelta:
Result.Name = "ChangeLineEndDelta";
Result.U1 = GetCompressedAnnotation(Next);
break;
case BinaryAnnotationsOpCode::ChangeRangeKind:
Result.Name = "ChangeRangeKind";
Result.U1 = GetCompressedAnnotation(Next);
break;
case BinaryAnnotationsOpCode::ChangeColumnStart:
Result.Name = "ChangeColumnStart";
Result.U1 = GetCompressedAnnotation(Next);
break;
case BinaryAnnotationsOpCode::ChangeColumnEnd:
Result.Name = "ChangeColumnEnd";
Result.U1 = GetCompressedAnnotation(Next);
break;
case BinaryAnnotationsOpCode::ChangeLineOffset:
Result.Name = "ChangeLineOffset";
Result.S1 = DecodeSignedOperand(Next);
break;
case BinaryAnnotationsOpCode::ChangeColumnEndDelta:
Result.Name = "ChangeColumnEndDelta";
Result.S1 = DecodeSignedOperand(Next);
break;
case BinaryAnnotationsOpCode::ChangeCodeOffsetAndLineOffset: {
Result.Name = "ChangeCodeOffsetAndLineOffset";
uint32_t Annotation = GetCompressedAnnotation(Next);
Result.S1 = DecodeSignedOperand(Annotation >> 4);
Result.U1 = Annotation & 0xf;
break;
}
case BinaryAnnotationsOpCode::ChangeCodeLengthAndCodeOffset: {
Result.Name = "ChangeCodeLengthAndCodeOffset";
Result.U1 = GetCompressedAnnotation(Next);
Result.U2 = GetCompressedAnnotation(Next);
break;
}
}
Result.Bytes = Data.take_front(Data.size() - Next.size());
Current = Result;
return true;
}
std::optional<DecodedAnnotation> Current;
ArrayRef<uint8_t> Data;
ArrayRef<uint8_t> Next;
};
// S_INLINESITE
class InlineSiteSym : public SymbolRecord {
public:
explicit InlineSiteSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit InlineSiteSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::InlineSiteSym),
RecordOffset(RecordOffset) {}
iterator_range<BinaryAnnotationIterator> annotations() const {
return make_range(BinaryAnnotationIterator(AnnotationData),
BinaryAnnotationIterator());
}
uint32_t Parent = 0;
uint32_t End = 0;
TypeIndex Inlinee;
std::vector<uint8_t> AnnotationData;
uint32_t RecordOffset = 0;
};
struct PublicSym32Header {
ulittle32_t Flags;
ulittle32_t Offset;
ulittle16_t Segment;
// char Name[];
};
// S_PUB32
class PublicSym32 : public SymbolRecord {
public:
PublicSym32() : SymbolRecord(SymbolRecordKind::PublicSym32) {}
explicit PublicSym32(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit PublicSym32(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::PublicSym32),
RecordOffset(RecordOffset) {}
PublicSymFlags Flags = PublicSymFlags::None;
uint32_t Offset = 0;
uint16_t Segment = 0;
StringRef Name;
uint32_t RecordOffset = 0;
};
// S_REGISTER
class RegisterSym : public SymbolRecord {
public:
explicit RegisterSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit RegisterSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::RegisterSym),
RecordOffset(RecordOffset) {}
TypeIndex Index;
RegisterId Register;
StringRef Name;
uint32_t RecordOffset = 0;
};
// S_PROCREF, S_LPROCREF
class ProcRefSym : public SymbolRecord {
public:
explicit ProcRefSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit ProcRefSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::ProcRefSym), RecordOffset(RecordOffset) {
}
uint32_t SumName = 0;
uint32_t SymOffset = 0;
uint16_t Module = 0;
StringRef Name;
uint16_t modi() const { return Module - 1; }
uint32_t RecordOffset = 0;
};
// S_LOCAL
class LocalSym : public SymbolRecord {
public:
explicit LocalSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit LocalSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::LocalSym), RecordOffset(RecordOffset) {}
TypeIndex Type;
LocalSymFlags Flags = LocalSymFlags::None;
StringRef Name;
uint32_t RecordOffset = 0;
};
struct LocalVariableAddrRange {
uint32_t OffsetStart = 0;
uint16_t ISectStart = 0;
uint16_t Range = 0;
};
struct LocalVariableAddrGap {
uint16_t GapStartOffset = 0;
uint16_t Range = 0;
};
enum : uint16_t { MaxDefRange = 0xf000 };
// S_DEFRANGE
class DefRangeSym : public SymbolRecord {
static constexpr uint32_t RelocationOffset = 8;
public:
explicit DefRangeSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit DefRangeSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::DefRangeSym),
RecordOffset(RecordOffset) {}
uint32_t getRelocationOffset() const {
return RecordOffset + RelocationOffset;
}
uint32_t Program = 0;
LocalVariableAddrRange Range;
std::vector<LocalVariableAddrGap> Gaps;
uint32_t RecordOffset = 0;
};
// S_DEFRANGE_SUBFIELD
class DefRangeSubfieldSym : public SymbolRecord {
static constexpr uint32_t RelocationOffset = 12;
public:
explicit DefRangeSubfieldSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit DefRangeSubfieldSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::DefRangeSubfieldSym),
RecordOffset(RecordOffset) {}
uint32_t getRelocationOffset() const {
return RecordOffset + RelocationOffset;
}
uint32_t Program = 0;
uint16_t OffsetInParent = 0;
LocalVariableAddrRange Range;
std::vector<LocalVariableAddrGap> Gaps;
uint32_t RecordOffset = 0;
};
struct DefRangeRegisterHeader {
ulittle16_t Register;
ulittle16_t MayHaveNoName;
};
// S_DEFRANGE_REGISTER
class DefRangeRegisterSym : public SymbolRecord {
public:
explicit DefRangeRegisterSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit DefRangeRegisterSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::DefRangeRegisterSym),
RecordOffset(RecordOffset) {}
uint32_t getRelocationOffset() const { return RecordOffset + sizeof(DefRangeRegisterHeader); }
DefRangeRegisterHeader Hdr;
LocalVariableAddrRange Range;
std::vector<LocalVariableAddrGap> Gaps;
uint32_t RecordOffset = 0;
};
struct DefRangeSubfieldRegisterHeader {
ulittle16_t Register;
ulittle16_t MayHaveNoName;
ulittle32_t OffsetInParent;
};
// S_DEFRANGE_SUBFIELD_REGISTER
class DefRangeSubfieldRegisterSym : public SymbolRecord {
public:
explicit DefRangeSubfieldRegisterSym(SymbolRecordKind Kind)
: SymbolRecord(Kind) {}
explicit DefRangeSubfieldRegisterSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::DefRangeSubfieldRegisterSym),
RecordOffset(RecordOffset) {}
uint32_t getRelocationOffset() const { return RecordOffset + sizeof(DefRangeSubfieldRegisterHeader); }
DefRangeSubfieldRegisterHeader Hdr;
LocalVariableAddrRange Range;
std::vector<LocalVariableAddrGap> Gaps;
uint32_t RecordOffset = 0;
};
struct DefRangeFramePointerRelHeader {
little32_t Offset;
};
// S_DEFRANGE_FRAMEPOINTER_REL
class DefRangeFramePointerRelSym : public SymbolRecord {
static constexpr uint32_t RelocationOffset = 8;
public:
explicit DefRangeFramePointerRelSym(SymbolRecordKind Kind)
: SymbolRecord(Kind) {}
explicit DefRangeFramePointerRelSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::DefRangeFramePointerRelSym),
RecordOffset(RecordOffset) {}
uint32_t getRelocationOffset() const {
return RecordOffset + RelocationOffset;
}
DefRangeFramePointerRelHeader Hdr;
LocalVariableAddrRange Range;
std::vector<LocalVariableAddrGap> Gaps;
uint32_t RecordOffset = 0;
};
struct DefRangeRegisterRelHeader {
ulittle16_t Register;
ulittle16_t Flags;
little32_t BasePointerOffset;
};
// S_DEFRANGE_REGISTER_REL
class DefRangeRegisterRelSym : public SymbolRecord {
public:
explicit DefRangeRegisterRelSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit DefRangeRegisterRelSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::DefRangeRegisterRelSym),
RecordOffset(RecordOffset) {}
// The flags implement this notional bitfield:
// uint16_t IsSubfield : 1;
// uint16_t Padding : 3;
// uint16_t OffsetInParent : 12;
enum : uint16_t {
IsSubfieldFlag = 1,
OffsetInParentShift = 4,
};
bool hasSpilledUDTMember() const { return Hdr.Flags & IsSubfieldFlag; }
uint16_t offsetInParent() const { return Hdr.Flags >> OffsetInParentShift; }
uint32_t getRelocationOffset() const { return RecordOffset + sizeof(DefRangeRegisterRelHeader); }
DefRangeRegisterRelHeader Hdr;
LocalVariableAddrRange Range;
std::vector<LocalVariableAddrGap> Gaps;
uint32_t RecordOffset = 0;
};
// S_DEFRANGE_FRAMEPOINTER_REL_FULL_SCOPE
class DefRangeFramePointerRelFullScopeSym : public SymbolRecord {
public:
explicit DefRangeFramePointerRelFullScopeSym(SymbolRecordKind Kind)
: SymbolRecord(Kind) {}
explicit DefRangeFramePointerRelFullScopeSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::DefRangeFramePointerRelFullScopeSym),
RecordOffset(RecordOffset) {}
int32_t Offset = 0;
uint32_t RecordOffset = 0;
};
// S_BLOCK32
class BlockSym : public SymbolRecord {
static constexpr uint32_t RelocationOffset = 16;
public:
explicit BlockSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit BlockSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::BlockSym), RecordOffset(RecordOffset) {}
uint32_t getRelocationOffset() const {
return RecordOffset + RelocationOffset;
}
uint32_t Parent = 0;
uint32_t End = 0;
uint32_t CodeSize = 0;
uint32_t CodeOffset = 0;
uint16_t Segment = 0;
StringRef Name;
uint32_t RecordOffset = 0;
};
// S_LABEL32
class LabelSym : public SymbolRecord {
static constexpr uint32_t RelocationOffset = 4;
public:
explicit LabelSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit LabelSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::LabelSym), RecordOffset(RecordOffset) {}
uint32_t getRelocationOffset() const {
return RecordOffset + RelocationOffset;
}
uint32_t CodeOffset = 0;
uint16_t Segment = 0;
ProcSymFlags Flags = ProcSymFlags::None;
StringRef Name;
uint32_t RecordOffset = 0;
};
// S_OBJNAME
class ObjNameSym : public SymbolRecord {
public:
explicit ObjNameSym() : SymbolRecord(SymbolRecordKind::ObjNameSym) {}
explicit ObjNameSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit ObjNameSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::ObjNameSym), RecordOffset(RecordOffset) {
}
uint32_t Signature = 0;
StringRef Name;
uint32_t RecordOffset = 0;
};
// S_ENVBLOCK
class EnvBlockSym : public SymbolRecord {
public:
explicit EnvBlockSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit EnvBlockSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::EnvBlockSym),
RecordOffset(RecordOffset) {}
std::vector<StringRef> Fields;
uint32_t RecordOffset = 0;
};
// S_EXPORT
class ExportSym : public SymbolRecord {
public:
explicit ExportSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit ExportSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::ExportSym), RecordOffset(RecordOffset) {}
uint16_t Ordinal = 0;
ExportFlags Flags = ExportFlags::None;
StringRef Name;
uint32_t RecordOffset = 0;
};
// S_FILESTATIC
class FileStaticSym : public SymbolRecord {
public:
explicit FileStaticSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit FileStaticSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::FileStaticSym),
RecordOffset(RecordOffset) {}
TypeIndex Index;
uint32_t ModFilenameOffset = 0;
LocalSymFlags Flags = LocalSymFlags::None;
StringRef Name;
uint32_t RecordOffset = 0;
};
// S_COMPILE2
class Compile2Sym : public SymbolRecord {
public:
explicit Compile2Sym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit Compile2Sym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::Compile2Sym),
RecordOffset(RecordOffset) {}
CompileSym2Flags Flags = CompileSym2Flags::None;
CPUType Machine;
uint16_t VersionFrontendMajor = 0;
uint16_t VersionFrontendMinor = 0;
uint16_t VersionFrontendBuild = 0;
uint16_t VersionBackendMajor = 0;
uint16_t VersionBackendMinor = 0;
uint16_t VersionBackendBuild = 0;
StringRef Version;
std::vector<StringRef> ExtraStrings;
uint8_t getLanguage() const { return static_cast<uint32_t>(Flags) & 0xFF; }
uint32_t getFlags() const { return static_cast<uint32_t>(Flags) & ~0xFF; }
uint32_t RecordOffset = 0;
};
// S_COMPILE3
class Compile3Sym : public SymbolRecord {
public:
Compile3Sym() : SymbolRecord(SymbolRecordKind::Compile3Sym) {}
explicit Compile3Sym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit Compile3Sym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::Compile3Sym),
RecordOffset(RecordOffset) {}
CompileSym3Flags Flags = CompileSym3Flags::None;
CPUType Machine;
uint16_t VersionFrontendMajor = 0;
uint16_t VersionFrontendMinor = 0;
uint16_t VersionFrontendBuild = 0;
uint16_t VersionFrontendQFE = 0;
uint16_t VersionBackendMajor = 0;
uint16_t VersionBackendMinor = 0;
uint16_t VersionBackendBuild = 0;
uint16_t VersionBackendQFE = 0;
StringRef Version;
void setLanguage(SourceLanguage Lang) {
Flags = CompileSym3Flags((uint32_t(Flags) & 0xFFFFFF00) | uint32_t(Lang));
}
SourceLanguage getLanguage() const {
return static_cast<SourceLanguage>(static_cast<uint32_t>(Flags) & 0xFF);
}
CompileSym3Flags getFlags() const {
return static_cast<CompileSym3Flags>(static_cast<uint32_t>(Flags) & ~0xFF);
}
bool hasOptimizations() const {
return CompileSym3Flags::None !=
(getFlags() & (CompileSym3Flags::PGO | CompileSym3Flags::LTCG));
}
uint32_t RecordOffset = 0;
};
// S_FRAMEPROC
class FrameProcSym : public SymbolRecord {
public:
explicit FrameProcSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit FrameProcSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::FrameProcSym),
RecordOffset(RecordOffset) {}
uint32_t TotalFrameBytes = 0;
uint32_t PaddingFrameBytes = 0;
uint32_t OffsetToPadding = 0;
uint32_t BytesOfCalleeSavedRegisters = 0;
uint32_t OffsetOfExceptionHandler = 0;
uint16_t SectionIdOfExceptionHandler = 0;
FrameProcedureOptions Flags = FrameProcedureOptions::None;
/// Extract the register this frame uses to refer to local variables.
RegisterId getLocalFramePtrReg(CPUType CPU) const {
return decodeFramePtrReg(
EncodedFramePtrReg((uint32_t(Flags) >> 14U) & 0x3U), CPU);
}
/// Extract the register this frame uses to refer to parameters.
RegisterId getParamFramePtrReg(CPUType CPU) const {
return decodeFramePtrReg(
EncodedFramePtrReg((uint32_t(Flags) >> 16U) & 0x3U), CPU);
}
uint32_t RecordOffset = 0;
private:
};
// S_CALLSITEINFO
class CallSiteInfoSym : public SymbolRecord {
static constexpr uint32_t RelocationOffset = 4;
public:
explicit CallSiteInfoSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit CallSiteInfoSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::CallSiteInfoSym) {}
uint32_t getRelocationOffset() const {
return RecordOffset + RelocationOffset;
}
uint32_t CodeOffset = 0;
uint16_t Segment = 0;
TypeIndex Type;
uint32_t RecordOffset = 0;
};
// S_HEAPALLOCSITE
class HeapAllocationSiteSym : public SymbolRecord {
static constexpr uint32_t RelocationOffset = 4;
public:
explicit HeapAllocationSiteSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit HeapAllocationSiteSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::HeapAllocationSiteSym),
RecordOffset(RecordOffset) {}
uint32_t getRelocationOffset() const {
return RecordOffset + RelocationOffset;
}
uint32_t CodeOffset = 0;
uint16_t Segment = 0;
uint16_t CallInstructionSize = 0;
TypeIndex Type;
uint32_t RecordOffset = 0;
};
// S_FRAMECOOKIE
class FrameCookieSym : public SymbolRecord {
static constexpr uint32_t RelocationOffset = 4;
public:
explicit FrameCookieSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit FrameCookieSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::FrameCookieSym) {}
uint32_t getRelocationOffset() const {
return RecordOffset + RelocationOffset;
}
uint32_t CodeOffset = 0;
uint16_t Register = 0;
FrameCookieKind CookieKind;
uint8_t Flags = 0;
uint32_t RecordOffset = 0;
};
// S_UDT, S_COBOLUDT
class UDTSym : public SymbolRecord {
public:
explicit UDTSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit UDTSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::UDTSym) {}
TypeIndex Type;
StringRef Name;
uint32_t RecordOffset = 0;
};
// S_BUILDINFO
class BuildInfoSym : public SymbolRecord {
public:
explicit BuildInfoSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit BuildInfoSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::BuildInfoSym),
RecordOffset(RecordOffset) {}
TypeIndex BuildId;
uint32_t RecordOffset = 0;
};
// S_BPREL32
class BPRelativeSym : public SymbolRecord {
public:
explicit BPRelativeSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit BPRelativeSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::BPRelativeSym),
RecordOffset(RecordOffset) {}
int32_t Offset = 0;
TypeIndex Type;
StringRef Name;
uint32_t RecordOffset = 0;
};
// S_REGREL32
class RegRelativeSym : public SymbolRecord {
public:
explicit RegRelativeSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit RegRelativeSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::RegRelativeSym),
RecordOffset(RecordOffset) {}
uint32_t Offset = 0;
TypeIndex Type;
RegisterId Register;
StringRef Name;
uint32_t RecordOffset = 0;
};
// S_CONSTANT, S_MANCONSTANT
class ConstantSym : public SymbolRecord {
public:
explicit ConstantSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit ConstantSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::ConstantSym),
RecordOffset(RecordOffset) {}
TypeIndex Type;
APSInt Value;
StringRef Name;
uint32_t RecordOffset = 0;
};
// S_LDATA32, S_GDATA32, S_LMANDATA, S_GMANDATA
class DataSym : public SymbolRecord {
static constexpr uint32_t RelocationOffset = 8;
public:
explicit DataSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit DataSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::DataSym), RecordOffset(RecordOffset) {}
uint32_t getRelocationOffset() const {
return RecordOffset + RelocationOffset;
}
TypeIndex Type;
uint32_t DataOffset = 0;
uint16_t Segment = 0;
StringRef Name;
uint32_t RecordOffset = 0;
};
// S_LTHREAD32, S_GTHREAD32
class ThreadLocalDataSym : public SymbolRecord {
static constexpr uint32_t RelocationOffset = 8;
public:
explicit ThreadLocalDataSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit ThreadLocalDataSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::ThreadLocalDataSym),
RecordOffset(RecordOffset) {}
uint32_t getRelocationOffset() const {
return RecordOffset + RelocationOffset;
}
TypeIndex Type;
uint32_t DataOffset = 0;
uint16_t Segment = 0;
StringRef Name;
uint32_t RecordOffset = 0;
};
// S_UNAMESPACE
class UsingNamespaceSym : public SymbolRecord {
public:
explicit UsingNamespaceSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit UsingNamespaceSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::UsingNamespaceSym),
RecordOffset(RecordOffset) {}
StringRef Name;
uint32_t RecordOffset = 0;
};
// S_ANNOTATION
class AnnotationSym : public SymbolRecord {
public:
explicit AnnotationSym(SymbolRecordKind Kind) : SymbolRecord(Kind) {}
explicit AnnotationSym(uint32_t RecordOffset)
: SymbolRecord(SymbolRecordKind::AnnotationSym),
RecordOffset(RecordOffset) {}
uint32_t CodeOffset = 0;
uint16_t Segment = 0;
std::vector<StringRef> Strings;
uint32_t RecordOffset = 0;
};
Expected<CVSymbol> readSymbolFromStream(BinaryStreamRef Stream,
uint32_t Offset);
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_SYMBOLRECORD_H
PK hwFZ�jv� DebugInfo/CodeView/RecordName.hnu �[��� //===- RecordName.h ------------------------------------------- *- C++ --*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_RECORDNAME_H
#define LLVM_DEBUGINFO_CODEVIEW_RECORDNAME_H
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include <string>
namespace llvm {
namespace codeview {
class TypeCollection;
class TypeIndex;
std::string computeTypeName(TypeCollection &Types, TypeIndex Index);
StringRef getSymbolName(CVSymbol Sym);
} // namespace codeview
} // namespace llvm
#endif
PK hwFZg�� � . DebugInfo/CodeView/AppendingTypeTableBuilder.hnu �[��� //===- AppendingTypeTableBuilder.h -------------------------------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_APPENDINGTYPETABLEBUILDER_H
#define LLVM_DEBUGINFO_CODEVIEW_APPENDINGTYPETABLEBUILDER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/SimpleTypeSerializer.h"
#include "llvm/DebugInfo/CodeView/TypeCollection.h"
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
#include "llvm/Support/Allocator.h"
#include <cstdint>
namespace llvm {
namespace codeview {
class ContinuationRecordBuilder;
class AppendingTypeTableBuilder : public TypeCollection {
BumpPtrAllocator &RecordStorage;
SimpleTypeSerializer SimpleSerializer;
/// Contains a list of all records indexed by TypeIndex.toArrayIndex().
SmallVector<ArrayRef<uint8_t>, 2> SeenRecords;
public:
explicit AppendingTypeTableBuilder(BumpPtrAllocator &Storage);
~AppendingTypeTableBuilder();
// TypeCollection overrides
std::optional<TypeIndex> getFirst() override;
std::optional<TypeIndex> getNext(TypeIndex Prev) override;
CVType getType(TypeIndex Index) override;
StringRef getTypeName(TypeIndex Index) override;
bool contains(TypeIndex Index) override;
uint32_t size() override;
uint32_t capacity() override;
bool replaceType(TypeIndex &Index, CVType Data, bool Stabilize) override;
// public interface
void reset();
TypeIndex nextTypeIndex() const;
BumpPtrAllocator &getAllocator() { return RecordStorage; }
ArrayRef<ArrayRef<uint8_t>> records() const;
TypeIndex insertRecordBytes(ArrayRef<uint8_t> &Record);
TypeIndex insertRecord(ContinuationRecordBuilder &Builder);
template <typename T> TypeIndex writeLeafType(T &Record) {
ArrayRef<uint8_t> Data = SimpleSerializer.serialize(Record);
return insertRecordBytes(Data);
}
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_APPENDINGTYPETABLEBUILDER_H
PK hwFZ#N�6� � % DebugInfo/CodeView/TypeDeserializer.hnu �[��� //===- TypeDeserializer.h ---------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_TYPEDESERIALIZER_H
#define LLVM_DEBUGINFO_CODEVIEW_TYPEDESERIALIZER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/TypeRecord.h"
#include "llvm/DebugInfo/CodeView/TypeRecordMapping.h"
#include "llvm/DebugInfo/CodeView/TypeVisitorCallbacks.h"
#include "llvm/Support/BinaryByteStream.h"
#include "llvm/Support/BinaryStreamReader.h"
#include "llvm/Support/Error.h"
#include <cassert>
#include <cstdint>
#include <memory>
namespace llvm {
namespace codeview {
class TypeDeserializer : public TypeVisitorCallbacks {
struct MappingInfo {
explicit MappingInfo(ArrayRef<uint8_t> RecordData)
: Stream(RecordData, llvm::support::little), Reader(Stream),
Mapping(Reader) {}
BinaryByteStream Stream;
BinaryStreamReader Reader;
TypeRecordMapping Mapping;
};
public:
TypeDeserializer() = default;
template <typename T> static Error deserializeAs(CVType &CVT, T &Record) {
Record.Kind = static_cast<TypeRecordKind>(CVT.kind());
MappingInfo I(CVT.content());
if (auto EC = I.Mapping.visitTypeBegin(CVT))
return EC;
if (auto EC = I.Mapping.visitKnownRecord(CVT, Record))
return EC;
if (auto EC = I.Mapping.visitTypeEnd(CVT))
return EC;
return Error::success();
}
template <typename T>
static Expected<T> deserializeAs(ArrayRef<uint8_t> Data) {
const RecordPrefix *Prefix =
reinterpret_cast<const RecordPrefix *>(Data.data());
TypeRecordKind K =
static_cast<TypeRecordKind>(uint16_t(Prefix->RecordKind));
T Record(K);
CVType CVT(Data);
if (auto EC = deserializeAs<T>(CVT, Record))
return std::move(EC);
return Record;
}
Error visitTypeBegin(CVType &Record) override {
assert(!Mapping && "Already in a type mapping!");
Mapping = std::make_unique<MappingInfo>(Record.content());
return Mapping->Mapping.visitTypeBegin(Record);
}
Error visitTypeBegin(CVType &Record, TypeIndex Index) override {
return visitTypeBegin(Record);
}
Error visitTypeEnd(CVType &Record) override {
assert(Mapping && "Not in a type mapping!");
auto EC = Mapping->Mapping.visitTypeEnd(Record);
Mapping.reset();
return EC;
}
#define TYPE_RECORD(EnumName, EnumVal, Name) \
Error visitKnownRecord(CVType &CVR, Name##Record &Record) override { \
return visitKnownRecordImpl<Name##Record>(CVR, Record); \
}
#define MEMBER_RECORD(EnumName, EnumVal, Name)
#define TYPE_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
#define MEMBER_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
#include "llvm/DebugInfo/CodeView/CodeViewTypes.def"
private:
template <typename RecordType>
Error visitKnownRecordImpl(CVType &CVR, RecordType &Record) {
return Mapping->Mapping.visitKnownRecord(CVR, Record);
}
std::unique_ptr<MappingInfo> Mapping;
};
class FieldListDeserializer : public TypeVisitorCallbacks {
struct MappingInfo {
explicit MappingInfo(BinaryStreamReader &R)
: Reader(R), Mapping(Reader), StartOffset(0) {}
BinaryStreamReader &Reader;
TypeRecordMapping Mapping;
uint32_t StartOffset;
};
public:
explicit FieldListDeserializer(BinaryStreamReader &Reader) : Mapping(Reader) {
RecordPrefix Pre(static_cast<uint16_t>(TypeLeafKind::LF_FIELDLIST));
CVType FieldList(&Pre, sizeof(Pre));
consumeError(Mapping.Mapping.visitTypeBegin(FieldList));
}
~FieldListDeserializer() override {
RecordPrefix Pre(static_cast<uint16_t>(TypeLeafKind::LF_FIELDLIST));
CVType FieldList(&Pre, sizeof(Pre));
consumeError(Mapping.Mapping.visitTypeEnd(FieldList));
}
Error visitMemberBegin(CVMemberRecord &Record) override {
Mapping.StartOffset = Mapping.Reader.getOffset();
return Mapping.Mapping.visitMemberBegin(Record);
}
Error visitMemberEnd(CVMemberRecord &Record) override {
if (auto EC = Mapping.Mapping.visitMemberEnd(Record))
return EC;
return Error::success();
}
#define TYPE_RECORD(EnumName, EnumVal, Name)
#define MEMBER_RECORD(EnumName, EnumVal, Name) \
Error visitKnownMember(CVMemberRecord &CVR, Name##Record &Record) override { \
return visitKnownMemberImpl<Name##Record>(CVR, Record); \
}
#define TYPE_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
#define MEMBER_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
#include "llvm/DebugInfo/CodeView/CodeViewTypes.def"
private:
template <typename RecordType>
Error visitKnownMemberImpl(CVMemberRecord &CVR, RecordType &Record) {
if (auto EC = Mapping.Mapping.visitKnownMember(CVR, Record))
return EC;
uint32_t EndOffset = Mapping.Reader.getOffset();
uint32_t RecordLength = EndOffset - Mapping.StartOffset;
Mapping.Reader.setOffset(Mapping.StartOffset);
if (auto EC = Mapping.Reader.readBytes(CVR.Data, RecordLength))
return EC;
assert(Mapping.Reader.getOffset() == EndOffset);
return Error::success();
}
MappingInfo Mapping;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_TYPEDESERIALIZER_H
PK hwFZ_�2 2 ! DebugInfo/CodeView/SymbolDumper.hnu �[��� //===-- SymbolDumper.h - CodeView symbol info dumper ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_SYMBOLDUMPER_H
#define LLVM_DEBUGINFO_CODEVIEW_SYMBOLDUMPER_H
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/SymbolDumpDelegate.h"
#include "llvm/Support/Error.h"
#include <memory>
#include <utility>
namespace llvm {
class ScopedPrinter;
namespace codeview {
class TypeCollection;
/// Dumper for CodeView symbol streams found in COFF object files and PDB files.
class CVSymbolDumper {
public:
CVSymbolDumper(ScopedPrinter &W, TypeCollection &Types,
CodeViewContainer Container,
std::unique_ptr<SymbolDumpDelegate> ObjDelegate, CPUType CPU,
bool PrintRecordBytes)
: W(W), Types(Types), Container(Container),
ObjDelegate(std::move(ObjDelegate)), CompilationCPUType(CPU),
PrintRecordBytes(PrintRecordBytes) {}
/// Dumps one type record. Returns false if there was a type parsing error,
/// and true otherwise. This should be called in order, since the dumper
/// maintains state about previous records which are necessary for cross
/// type references.
Error dump(CVRecord<SymbolKind> &Record);
/// Dumps the type records in Data. Returns false if there was a type stream
/// parse error, and true otherwise.
Error dump(const CVSymbolArray &Symbols);
CPUType getCompilationCPUType() const { return CompilationCPUType; }
private:
ScopedPrinter &W;
TypeCollection &Types;
CodeViewContainer Container;
std::unique_ptr<SymbolDumpDelegate> ObjDelegate;
CPUType CompilationCPUType;
bool PrintRecordBytes;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_SYMBOLDUMPER_H
PK hwFZ[n�� � DebugInfo/CodeView/Formatters.hnu �[��� //===- Formatters.h ---------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_FORMATTERS_H
#define LLVM_DEBUGINFO_CODEVIEW_FORMATTERS_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/GUID.h"
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
#include "llvm/Support/FormatAdapters.h"
#include "llvm/Support/FormatVariadic.h"
#include "llvm/Support/raw_ostream.h"
#include <cstdint>
namespace llvm {
namespace codeview {
struct GUID;
namespace detail {
class GuidAdapter final : public FormatAdapter<ArrayRef<uint8_t>> {
ArrayRef<uint8_t> Guid;
public:
explicit GuidAdapter(ArrayRef<uint8_t> Guid);
explicit GuidAdapter(StringRef Guid);
void format(raw_ostream &Stream, StringRef Style) override;
};
} // end namespace detail
inline detail::GuidAdapter fmt_guid(StringRef Item) {
return detail::GuidAdapter(Item);
}
inline detail::GuidAdapter fmt_guid(ArrayRef<uint8_t> Item) {
return detail::GuidAdapter(Item);
}
} // end namespace codeview
template <> struct format_provider<codeview::TypeIndex> {
public:
static void format(const codeview::TypeIndex &V, raw_ostream &Stream,
StringRef Style) {
if (V.isNoneType())
Stream << "<no type>";
else {
Stream << formatv("{0:X+4}", V.getIndex());
if (V.isSimple())
Stream << " (" << codeview::TypeIndex::simpleTypeName(V) << ")";
}
}
};
template <> struct format_provider<codeview::GUID> {
static void format(const codeview::GUID &V, llvm::raw_ostream &Stream,
StringRef Style) {
Stream << V;
}
};
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_FORMATTERS_H
PK hwFZ�a� ) DebugInfo/CodeView/DebugLinesSubsection.hnu �[��� //===- DebugLinesSubsection.h -----------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_DEBUGLINESSUBSECTION_H
#define LLVM_DEBUGINFO_CODEVIEW_DEBUGLINESSUBSECTION_H
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/DebugSubsection.h"
#include "llvm/DebugInfo/CodeView/Line.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include <cstdint>
#include <vector>
namespace llvm {
class BinaryStreamReader;
class BinaryStreamWriter;
namespace codeview {
class DebugChecksumsSubsection;
class DebugStringTableSubsection;
// Corresponds to the `CV_DebugSLinesHeader_t` structure.
struct LineFragmentHeader {
support::ulittle32_t RelocOffset; // Code offset of line contribution.
support::ulittle16_t RelocSegment; // Code segment of line contribution.
support::ulittle16_t Flags; // See LineFlags enumeration.
support::ulittle32_t CodeSize; // Code size of this line contribution.
};
// Corresponds to the `CV_DebugSLinesFileBlockHeader_t` structure.
struct LineBlockFragmentHeader {
support::ulittle32_t NameIndex; // Offset of FileChecksum entry in File
// checksums buffer. The checksum entry then
// contains another offset into the string
// table of the actual name.
support::ulittle32_t NumLines; // Number of lines
support::ulittle32_t BlockSize; // Code size of block, in bytes.
// The following two variable length arrays appear immediately after the
// header. The structure definitions follow.
// LineNumberEntry Lines[NumLines];
// ColumnNumberEntry Columns[NumLines];
};
// Corresponds to `CV_Line_t` structure
struct LineNumberEntry {
support::ulittle32_t Offset; // Offset to start of code bytes for line number
support::ulittle32_t Flags; // Start:24, End:7, IsStatement:1
};
// Corresponds to `CV_Column_t` structure
struct ColumnNumberEntry {
support::ulittle16_t StartColumn;
support::ulittle16_t EndColumn;
};
struct LineColumnEntry {
support::ulittle32_t NameIndex;
FixedStreamArray<LineNumberEntry> LineNumbers;
FixedStreamArray<ColumnNumberEntry> Columns;
};
class LineColumnExtractor {
public:
Error operator()(BinaryStreamRef Stream, uint32_t &Len,
LineColumnEntry &Item);
const LineFragmentHeader *Header = nullptr;
};
class DebugLinesSubsectionRef final : public DebugSubsectionRef {
friend class LineColumnExtractor;
using LineInfoArray = VarStreamArray<LineColumnEntry, LineColumnExtractor>;
using Iterator = LineInfoArray::Iterator;
public:
DebugLinesSubsectionRef();
static bool classof(const DebugSubsectionRef *S) {
return S->kind() == DebugSubsectionKind::Lines;
}
Error initialize(BinaryStreamReader Reader);
Iterator begin() const { return LinesAndColumns.begin(); }
Iterator end() const { return LinesAndColumns.end(); }
const LineFragmentHeader *header() const { return Header; }
bool hasColumnInfo() const;
private:
const LineFragmentHeader *Header = nullptr;
LineInfoArray LinesAndColumns;
};
class DebugLinesSubsection final : public DebugSubsection {
struct Block {
Block(uint32_t ChecksumBufferOffset)
: ChecksumBufferOffset(ChecksumBufferOffset) {}
uint32_t ChecksumBufferOffset;
std::vector<LineNumberEntry> Lines;
std::vector<ColumnNumberEntry> Columns;
};
public:
DebugLinesSubsection(DebugChecksumsSubsection &Checksums,
DebugStringTableSubsection &Strings);
static bool classof(const DebugSubsection *S) {
return S->kind() == DebugSubsectionKind::Lines;
}
void createBlock(StringRef FileName);
void addLineInfo(uint32_t Offset, const LineInfo &Line);
void addLineAndColumnInfo(uint32_t Offset, const LineInfo &Line,
uint32_t ColStart, uint32_t ColEnd);
uint32_t calculateSerializedSize() const override;
Error commit(BinaryStreamWriter &Writer) const override;
void setRelocationAddress(uint16_t Segment, uint32_t Offset);
void setCodeSize(uint32_t Size);
void setFlags(LineFlags Flags);
bool hasColumnInfo() const;
private:
DebugChecksumsSubsection &Checksums;
uint32_t RelocOffset = 0;
uint16_t RelocSegment = 0;
uint32_t CodeSize = 0;
LineFlags Flags = LF_None;
std::vector<Block> Blocks;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_DEBUGLINESSUBSECTION_H
PK hwFZ��L �L ( DebugInfo/CodeView/CodeViewRegisters.defnu �[��� //===-- CodeViewRegisters.def - CodeView registers --------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// See CV_HREG_e in cvconst.h. This should match the constants there.
//
//===----------------------------------------------------------------------===//
#ifndef CV_REGISTER
#define CV_REGISTER(name, value)
#endif
#if !defined(CV_REGISTERS_ALL) && !defined(CV_REGISTERS_X86) && \
!defined(CV_REGISTERS_ARM) && \
!defined(CV_REGISTERS_ARM64)
#error Need include at least one register set.
#endif
// This currently only contains the "register subset shared by all processor
// types" (ERR etc.) and the x86/arm64 registers.
#if defined(CV_REGISTERS_ALL) || defined(CV_REGISTERS_X86)
// Some system headers define macros that conflict with our enums. Every
// compiler supported by LLVM has the push_macro and pop_macro pragmas, so use
// them to avoid the conflict.
#pragma push_macro("CR0")
#pragma push_macro("CR1")
#pragma push_macro("CR2")
#pragma push_macro("CR3")
#pragma push_macro("CR4")
CV_REGISTER(ERR, 30000)
CV_REGISTER(TEB, 30001)
CV_REGISTER(TIMER, 30002)
CV_REGISTER(EFAD1, 30003)
CV_REGISTER(EFAD2, 30004)
CV_REGISTER(EFAD3, 30005)
CV_REGISTER(VFRAME, 30006)
CV_REGISTER(HANDLE, 30007)
CV_REGISTER(PARAMS, 30008)
CV_REGISTER(LOCALS, 30009)
CV_REGISTER(TID, 30010)
CV_REGISTER(ENV, 30011)
CV_REGISTER(CMDLN, 30012)
CV_REGISTER(NONE, 0)
CV_REGISTER(AL, 1)
CV_REGISTER(CL, 2)
CV_REGISTER(DL, 3)
CV_REGISTER(BL, 4)
CV_REGISTER(AH, 5)
CV_REGISTER(CH, 6)
CV_REGISTER(DH, 7)
CV_REGISTER(BH, 8)
CV_REGISTER(AX, 9)
CV_REGISTER(CX, 10)
CV_REGISTER(DX, 11)
CV_REGISTER(BX, 12)
CV_REGISTER(SP, 13)
CV_REGISTER(BP, 14)
CV_REGISTER(SI, 15)
CV_REGISTER(DI, 16)
CV_REGISTER(EAX, 17)
CV_REGISTER(ECX, 18)
CV_REGISTER(EDX, 19)
CV_REGISTER(EBX, 20)
CV_REGISTER(ESP, 21)
CV_REGISTER(EBP, 22)
CV_REGISTER(ESI, 23)
CV_REGISTER(EDI, 24)
CV_REGISTER(ES, 25)
CV_REGISTER(CS, 26)
CV_REGISTER(SS, 27)
CV_REGISTER(DS, 28)
CV_REGISTER(FS, 29)
CV_REGISTER(GS, 30)
CV_REGISTER(IP, 31)
CV_REGISTER(FLAGS, 32)
CV_REGISTER(EIP, 33)
CV_REGISTER(EFLAGS, 34)
CV_REGISTER(TEMP, 40)
CV_REGISTER(TEMPH, 41)
CV_REGISTER(QUOTE, 42)
CV_REGISTER(PCDR3, 43)
CV_REGISTER(PCDR4, 44)
CV_REGISTER(PCDR5, 45)
CV_REGISTER(PCDR6, 46)
CV_REGISTER(PCDR7, 47)
CV_REGISTER(CR0, 80)
CV_REGISTER(CR1, 81)
CV_REGISTER(CR2, 82)
CV_REGISTER(CR3, 83)
CV_REGISTER(CR4, 84)
CV_REGISTER(DR0, 90)
CV_REGISTER(DR1, 91)
CV_REGISTER(DR2, 92)
CV_REGISTER(DR3, 93)
CV_REGISTER(DR4, 94)
CV_REGISTER(DR5, 95)
CV_REGISTER(DR6, 96)
CV_REGISTER(DR7, 97)
CV_REGISTER(GDTR, 110)
CV_REGISTER(GDTL, 111)
CV_REGISTER(IDTR, 112)
CV_REGISTER(IDTL, 113)
CV_REGISTER(LDTR, 114)
CV_REGISTER(TR, 115)
CV_REGISTER(PSEUDO1, 116)
CV_REGISTER(PSEUDO2, 117)
CV_REGISTER(PSEUDO3, 118)
CV_REGISTER(PSEUDO4, 119)
CV_REGISTER(PSEUDO5, 120)
CV_REGISTER(PSEUDO6, 121)
CV_REGISTER(PSEUDO7, 122)
CV_REGISTER(PSEUDO8, 123)
CV_REGISTER(PSEUDO9, 124)
CV_REGISTER(ST0, 128)
CV_REGISTER(ST1, 129)
CV_REGISTER(ST2, 130)
CV_REGISTER(ST3, 131)
CV_REGISTER(ST4, 132)
CV_REGISTER(ST5, 133)
CV_REGISTER(ST6, 134)
CV_REGISTER(ST7, 135)
CV_REGISTER(CTRL, 136)
CV_REGISTER(STAT, 137)
CV_REGISTER(TAG, 138)
CV_REGISTER(FPIP, 139)
CV_REGISTER(FPCS, 140)
CV_REGISTER(FPDO, 141)
CV_REGISTER(FPDS, 142)
CV_REGISTER(ISEM, 143)
CV_REGISTER(FPEIP, 144)
CV_REGISTER(FPEDO, 145)
CV_REGISTER(MM0, 146)
CV_REGISTER(MM1, 147)
CV_REGISTER(MM2, 148)
CV_REGISTER(MM3, 149)
CV_REGISTER(MM4, 150)
CV_REGISTER(MM5, 151)
CV_REGISTER(MM6, 152)
CV_REGISTER(MM7, 153)
CV_REGISTER(XMM0, 154)
CV_REGISTER(XMM1, 155)
CV_REGISTER(XMM2, 156)
CV_REGISTER(XMM3, 157)
CV_REGISTER(XMM4, 158)
CV_REGISTER(XMM5, 159)
CV_REGISTER(XMM6, 160)
CV_REGISTER(XMM7, 161)
CV_REGISTER(MXCSR, 211)
CV_REGISTER(EDXEAX, 212)
CV_REGISTER(EMM0L, 220)
CV_REGISTER(EMM1L, 221)
CV_REGISTER(EMM2L, 222)
CV_REGISTER(EMM3L, 223)
CV_REGISTER(EMM4L, 224)
CV_REGISTER(EMM5L, 225)
CV_REGISTER(EMM6L, 226)
CV_REGISTER(EMM7L, 227)
CV_REGISTER(EMM0H, 228)
CV_REGISTER(EMM1H, 229)
CV_REGISTER(EMM2H, 230)
CV_REGISTER(EMM3H, 231)
CV_REGISTER(EMM4H, 232)
CV_REGISTER(EMM5H, 233)
CV_REGISTER(EMM6H, 234)
CV_REGISTER(EMM7H, 235)
CV_REGISTER(MM00, 236)
CV_REGISTER(MM01, 237)
CV_REGISTER(MM10, 238)
CV_REGISTER(MM11, 239)
CV_REGISTER(MM20, 240)
CV_REGISTER(MM21, 241)
CV_REGISTER(MM30, 242)
CV_REGISTER(MM31, 243)
CV_REGISTER(MM40, 244)
CV_REGISTER(MM41, 245)
CV_REGISTER(MM50, 246)
CV_REGISTER(MM51, 247)
CV_REGISTER(MM60, 248)
CV_REGISTER(MM61, 249)
CV_REGISTER(MM70, 250)
CV_REGISTER(MM71, 251)
CV_REGISTER(BND0, 396)
CV_REGISTER(BND1, 397)
CV_REGISTER(BND2, 398)
CV_REGISTER(XMM8, 252)
CV_REGISTER(XMM9, 253)
CV_REGISTER(XMM10, 254)
CV_REGISTER(XMM11, 255)
CV_REGISTER(XMM12, 256)
CV_REGISTER(XMM13, 257)
CV_REGISTER(XMM14, 258)
CV_REGISTER(XMM15, 259)
CV_REGISTER(SIL, 324)
CV_REGISTER(DIL, 325)
CV_REGISTER(BPL, 326)
CV_REGISTER(SPL, 327)
CV_REGISTER(RAX, 328)
CV_REGISTER(RBX, 329)
CV_REGISTER(RCX, 330)
CV_REGISTER(RDX, 331)
CV_REGISTER(RSI, 332)
CV_REGISTER(RDI, 333)
CV_REGISTER(RBP, 334)
CV_REGISTER(RSP, 335)
CV_REGISTER(R8, 336)
CV_REGISTER(R9, 337)
CV_REGISTER(R10, 338)
CV_REGISTER(R11, 339)
CV_REGISTER(R12, 340)
CV_REGISTER(R13, 341)
CV_REGISTER(R14, 342)
CV_REGISTER(R15, 343)
CV_REGISTER(R8B, 344)
CV_REGISTER(R9B, 345)
CV_REGISTER(R10B, 346)
CV_REGISTER(R11B, 347)
CV_REGISTER(R12B, 348)
CV_REGISTER(R13B, 349)
CV_REGISTER(R14B, 350)
CV_REGISTER(R15B, 351)
CV_REGISTER(R8W, 352)
CV_REGISTER(R9W, 353)
CV_REGISTER(R10W, 354)
CV_REGISTER(R11W, 355)
CV_REGISTER(R12W, 356)
CV_REGISTER(R13W, 357)
CV_REGISTER(R14W, 358)
CV_REGISTER(R15W, 359)
CV_REGISTER(R8D, 360)
CV_REGISTER(R9D, 361)
CV_REGISTER(R10D, 362)
CV_REGISTER(R11D, 363)
CV_REGISTER(R12D, 364)
CV_REGISTER(R13D, 365)
CV_REGISTER(R14D, 366)
CV_REGISTER(R15D, 367)
// cvconst.h defines both CV_REG_YMM0 (252) and CV_AMD64_YMM0 (368). Keep the
// original prefix to distinguish them.
CV_REGISTER(AMD64_YMM0, 368)
CV_REGISTER(AMD64_YMM1, 369)
CV_REGISTER(AMD64_YMM2, 370)
CV_REGISTER(AMD64_YMM3, 371)
CV_REGISTER(AMD64_YMM4, 372)
CV_REGISTER(AMD64_YMM5, 373)
CV_REGISTER(AMD64_YMM6, 374)
CV_REGISTER(AMD64_YMM7, 375)
CV_REGISTER(AMD64_YMM8, 376)
CV_REGISTER(AMD64_YMM9, 377)
CV_REGISTER(AMD64_YMM10, 378)
CV_REGISTER(AMD64_YMM11, 379)
CV_REGISTER(AMD64_YMM12, 380)
CV_REGISTER(AMD64_YMM13, 381)
CV_REGISTER(AMD64_YMM14, 382)
CV_REGISTER(AMD64_YMM15, 383)
CV_REGISTER(AMD64_XMM16, 694)
CV_REGISTER(AMD64_XMM17, 695)
CV_REGISTER(AMD64_XMM18, 696)
CV_REGISTER(AMD64_XMM19, 697)
CV_REGISTER(AMD64_XMM20, 698)
CV_REGISTER(AMD64_XMM21, 699)
CV_REGISTER(AMD64_XMM22, 700)
CV_REGISTER(AMD64_XMM23, 701)
CV_REGISTER(AMD64_XMM24, 702)
CV_REGISTER(AMD64_XMM25, 703)
CV_REGISTER(AMD64_XMM26, 704)
CV_REGISTER(AMD64_XMM27, 705)
CV_REGISTER(AMD64_XMM28, 706)
CV_REGISTER(AMD64_XMM29, 707)
CV_REGISTER(AMD64_XMM30, 708)
CV_REGISTER(AMD64_XMM31, 709)
CV_REGISTER(AMD64_YMM16, 710)
CV_REGISTER(AMD64_YMM17, 711)
CV_REGISTER(AMD64_YMM18, 712)
CV_REGISTER(AMD64_YMM19, 713)
CV_REGISTER(AMD64_YMM20, 714)
CV_REGISTER(AMD64_YMM21, 715)
CV_REGISTER(AMD64_YMM22, 716)
CV_REGISTER(AMD64_YMM23, 717)
CV_REGISTER(AMD64_YMM24, 718)
CV_REGISTER(AMD64_YMM25, 719)
CV_REGISTER(AMD64_YMM26, 720)
CV_REGISTER(AMD64_YMM27, 721)
CV_REGISTER(AMD64_YMM28, 722)
CV_REGISTER(AMD64_YMM29, 723)
CV_REGISTER(AMD64_YMM30, 724)
CV_REGISTER(AMD64_YMM31, 725)
CV_REGISTER(AMD64_ZMM0, 726)
CV_REGISTER(AMD64_ZMM1, 727)
CV_REGISTER(AMD64_ZMM2, 728)
CV_REGISTER(AMD64_ZMM3, 729)
CV_REGISTER(AMD64_ZMM4, 730)
CV_REGISTER(AMD64_ZMM5, 731)
CV_REGISTER(AMD64_ZMM6, 732)
CV_REGISTER(AMD64_ZMM7, 733)
CV_REGISTER(AMD64_ZMM8, 734)
CV_REGISTER(AMD64_ZMM9, 735)
CV_REGISTER(AMD64_ZMM10, 736)
CV_REGISTER(AMD64_ZMM11, 737)
CV_REGISTER(AMD64_ZMM12, 738)
CV_REGISTER(AMD64_ZMM13, 739)
CV_REGISTER(AMD64_ZMM14, 740)
CV_REGISTER(AMD64_ZMM15, 741)
CV_REGISTER(AMD64_ZMM16, 742)
CV_REGISTER(AMD64_ZMM17, 743)
CV_REGISTER(AMD64_ZMM18, 744)
CV_REGISTER(AMD64_ZMM19, 745)
CV_REGISTER(AMD64_ZMM20, 746)
CV_REGISTER(AMD64_ZMM21, 747)
CV_REGISTER(AMD64_ZMM22, 748)
CV_REGISTER(AMD64_ZMM23, 749)
CV_REGISTER(AMD64_ZMM24, 750)
CV_REGISTER(AMD64_ZMM25, 751)
CV_REGISTER(AMD64_ZMM26, 752)
CV_REGISTER(AMD64_ZMM27, 753)
CV_REGISTER(AMD64_ZMM28, 754)
CV_REGISTER(AMD64_ZMM29, 755)
CV_REGISTER(AMD64_ZMM30, 756)
CV_REGISTER(AMD64_ZMM31, 757)
CV_REGISTER(AMD64_K0, 758)
CV_REGISTER(AMD64_K1, 759)
CV_REGISTER(AMD64_K2, 760)
CV_REGISTER(AMD64_K3, 761)
CV_REGISTER(AMD64_K4, 762)
CV_REGISTER(AMD64_K5, 763)
CV_REGISTER(AMD64_K6, 764)
CV_REGISTER(AMD64_K7, 765)
#pragma pop_macro("CR0")
#pragma pop_macro("CR1")
#pragma pop_macro("CR2")
#pragma pop_macro("CR3")
#pragma pop_macro("CR4")
#endif // defined(CV_REGISTERS_ALL) || defined(CV_REGISTERS_X86)
#if defined(CV_REGISTERS_ALL) || defined(CV_REGISTERS_ARM)
// ARM registers
CV_REGISTER(ARM_NOREG, 0)
// General purpose 32-bit integer registers
CV_REGISTER(ARM_R0, 10)
CV_REGISTER(ARM_R1, 11)
CV_REGISTER(ARM_R2, 12)
CV_REGISTER(ARM_R3, 13)
CV_REGISTER(ARM_R4, 14)
CV_REGISTER(ARM_R5, 15)
CV_REGISTER(ARM_R6, 16)
CV_REGISTER(ARM_R7, 17)
CV_REGISTER(ARM_R8, 18)
CV_REGISTER(ARM_R9, 19)
CV_REGISTER(ARM_R10, 20)
CV_REGISTER(ARM_R11, 21)
CV_REGISTER(ARM_R12, 22)
CV_REGISTER(ARM_SP, 23)
CV_REGISTER(ARM_LR, 24)
CV_REGISTER(ARM_PC, 25)
// Status register
CV_REGISTER(ARM_CPSR, 26)
// ARM VFPv1 registers
CV_REGISTER(ARM_FPSCR, 40)
CV_REGISTER(ARM_FPEXC, 41)
CV_REGISTER(ARM_FS0, 50)
CV_REGISTER(ARM_FS1, 51)
CV_REGISTER(ARM_FS2, 52)
CV_REGISTER(ARM_FS3, 53)
CV_REGISTER(ARM_FS4, 54)
CV_REGISTER(ARM_FS5, 55)
CV_REGISTER(ARM_FS6, 56)
CV_REGISTER(ARM_FS7, 57)
CV_REGISTER(ARM_FS8, 58)
CV_REGISTER(ARM_FS9, 59)
CV_REGISTER(ARM_FS10, 60)
CV_REGISTER(ARM_FS11, 61)
CV_REGISTER(ARM_FS12, 62)
CV_REGISTER(ARM_FS13, 63)
CV_REGISTER(ARM_FS14, 64)
CV_REGISTER(ARM_FS15, 65)
CV_REGISTER(ARM_FS16, 66)
CV_REGISTER(ARM_FS17, 67)
CV_REGISTER(ARM_FS18, 68)
CV_REGISTER(ARM_FS19, 69)
CV_REGISTER(ARM_FS20, 70)
CV_REGISTER(ARM_FS21, 71)
CV_REGISTER(ARM_FS22, 72)
CV_REGISTER(ARM_FS23, 73)
CV_REGISTER(ARM_FS24, 74)
CV_REGISTER(ARM_FS25, 75)
CV_REGISTER(ARM_FS26, 76)
CV_REGISTER(ARM_FS27, 77)
CV_REGISTER(ARM_FS28, 78)
CV_REGISTER(ARM_FS29, 79)
CV_REGISTER(ARM_FS30, 80)
CV_REGISTER(ARM_FS31, 81)
// ARM VFPv3/NEON registers
CV_REGISTER(ARM_FS32, 200)
CV_REGISTER(ARM_FS33, 201)
CV_REGISTER(ARM_FS34, 202)
CV_REGISTER(ARM_FS35, 203)
CV_REGISTER(ARM_FS36, 204)
CV_REGISTER(ARM_FS37, 205)
CV_REGISTER(ARM_FS38, 206)
CV_REGISTER(ARM_FS39, 207)
CV_REGISTER(ARM_FS40, 208)
CV_REGISTER(ARM_FS41, 209)
CV_REGISTER(ARM_FS42, 210)
CV_REGISTER(ARM_FS43, 211)
CV_REGISTER(ARM_FS44, 212)
CV_REGISTER(ARM_FS45, 213)
CV_REGISTER(ARM_FS46, 214)
CV_REGISTER(ARM_FS47, 215)
CV_REGISTER(ARM_FS48, 216)
CV_REGISTER(ARM_FS49, 217)
CV_REGISTER(ARM_FS50, 218)
CV_REGISTER(ARM_FS51, 219)
CV_REGISTER(ARM_FS52, 220)
CV_REGISTER(ARM_FS53, 221)
CV_REGISTER(ARM_FS54, 222)
CV_REGISTER(ARM_FS55, 223)
CV_REGISTER(ARM_FS56, 224)
CV_REGISTER(ARM_FS57, 225)
CV_REGISTER(ARM_FS58, 226)
CV_REGISTER(ARM_FS59, 227)
CV_REGISTER(ARM_FS60, 228)
CV_REGISTER(ARM_FS61, 229)
CV_REGISTER(ARM_FS62, 230)
CV_REGISTER(ARM_FS63, 231)
CV_REGISTER(ARM_ND0, 300)
CV_REGISTER(ARM_ND1, 301)
CV_REGISTER(ARM_ND2, 302)
CV_REGISTER(ARM_ND3, 303)
CV_REGISTER(ARM_ND4, 304)
CV_REGISTER(ARM_ND5, 305)
CV_REGISTER(ARM_ND6, 306)
CV_REGISTER(ARM_ND7, 307)
CV_REGISTER(ARM_ND8, 308)
CV_REGISTER(ARM_ND9, 309)
CV_REGISTER(ARM_ND10, 310)
CV_REGISTER(ARM_ND11, 311)
CV_REGISTER(ARM_ND12, 312)
CV_REGISTER(ARM_ND13, 313)
CV_REGISTER(ARM_ND14, 314)
CV_REGISTER(ARM_ND15, 315)
CV_REGISTER(ARM_ND16, 316)
CV_REGISTER(ARM_ND17, 317)
CV_REGISTER(ARM_ND18, 318)
CV_REGISTER(ARM_ND19, 319)
CV_REGISTER(ARM_ND20, 320)
CV_REGISTER(ARM_ND21, 321)
CV_REGISTER(ARM_ND22, 322)
CV_REGISTER(ARM_ND23, 323)
CV_REGISTER(ARM_ND24, 324)
CV_REGISTER(ARM_ND25, 325)
CV_REGISTER(ARM_ND26, 326)
CV_REGISTER(ARM_ND27, 327)
CV_REGISTER(ARM_ND28, 328)
CV_REGISTER(ARM_ND29, 329)
CV_REGISTER(ARM_ND30, 330)
CV_REGISTER(ARM_ND31, 331)
CV_REGISTER(ARM_NQ0, 400)
CV_REGISTER(ARM_NQ1, 401)
CV_REGISTER(ARM_NQ2, 402)
CV_REGISTER(ARM_NQ3, 403)
CV_REGISTER(ARM_NQ4, 404)
CV_REGISTER(ARM_NQ5, 405)
CV_REGISTER(ARM_NQ6, 406)
CV_REGISTER(ARM_NQ7, 407)
CV_REGISTER(ARM_NQ8, 408)
CV_REGISTER(ARM_NQ9, 409)
CV_REGISTER(ARM_NQ10, 410)
CV_REGISTER(ARM_NQ11, 411)
CV_REGISTER(ARM_NQ12, 412)
CV_REGISTER(ARM_NQ13, 413)
CV_REGISTER(ARM_NQ14, 414)
CV_REGISTER(ARM_NQ15, 415)
#endif // defined(CV_REGISTERS_ALL) || defined(CV_REGISTERS_ARM)
#if defined(CV_REGISTERS_ALL) || defined(CV_REGISTERS_ARM64)
// arm64intr.h from MSVC defines ARM64_FPSR and ARM64_FPCR, which conflicts with
// these declarations.
#pragma push_macro("ARM64_FPSR")
#pragma push_macro("ARM64_FPCR")
#undef ARM64_FPSR
#undef ARM64_FPCR
// ARM64 registers
CV_REGISTER(ARM64_NOREG, 0)
// General purpose 32-bit integer registers
CV_REGISTER(ARM64_W0, 10)
CV_REGISTER(ARM64_W1, 11)
CV_REGISTER(ARM64_W2, 12)
CV_REGISTER(ARM64_W3, 13)
CV_REGISTER(ARM64_W4, 14)
CV_REGISTER(ARM64_W5, 15)
CV_REGISTER(ARM64_W6, 16)
CV_REGISTER(ARM64_W7, 17)
CV_REGISTER(ARM64_W8, 18)
CV_REGISTER(ARM64_W9, 19)
CV_REGISTER(ARM64_W10, 20)
CV_REGISTER(ARM64_W11, 21)
CV_REGISTER(ARM64_W12, 22)
CV_REGISTER(ARM64_W13, 23)
CV_REGISTER(ARM64_W14, 24)
CV_REGISTER(ARM64_W15, 25)
CV_REGISTER(ARM64_W16, 26)
CV_REGISTER(ARM64_W17, 27)
CV_REGISTER(ARM64_W18, 28)
CV_REGISTER(ARM64_W19, 29)
CV_REGISTER(ARM64_W20, 30)
CV_REGISTER(ARM64_W21, 31)
CV_REGISTER(ARM64_W22, 32)
CV_REGISTER(ARM64_W23, 33)
CV_REGISTER(ARM64_W24, 34)
CV_REGISTER(ARM64_W25, 35)
CV_REGISTER(ARM64_W26, 36)
CV_REGISTER(ARM64_W27, 37)
CV_REGISTER(ARM64_W28, 38)
CV_REGISTER(ARM64_W29, 39)
CV_REGISTER(ARM64_W30, 40)
CV_REGISTER(ARM64_WZR, 41)
// General purpose 64-bit integer registers
CV_REGISTER(ARM64_X0, 50)
CV_REGISTER(ARM64_X1, 51)
CV_REGISTER(ARM64_X2, 52)
CV_REGISTER(ARM64_X3, 53)
CV_REGISTER(ARM64_X4, 54)
CV_REGISTER(ARM64_X5, 55)
CV_REGISTER(ARM64_X6, 56)
CV_REGISTER(ARM64_X7, 57)
CV_REGISTER(ARM64_X8, 58)
CV_REGISTER(ARM64_X9, 59)
CV_REGISTER(ARM64_X10, 60)
CV_REGISTER(ARM64_X11, 61)
CV_REGISTER(ARM64_X12, 62)
CV_REGISTER(ARM64_X13, 63)
CV_REGISTER(ARM64_X14, 64)
CV_REGISTER(ARM64_X15, 65)
CV_REGISTER(ARM64_X16, 66)
CV_REGISTER(ARM64_X17, 67)
CV_REGISTER(ARM64_X18, 68)
CV_REGISTER(ARM64_X19, 69)
CV_REGISTER(ARM64_X20, 70)
CV_REGISTER(ARM64_X21, 71)
CV_REGISTER(ARM64_X22, 72)
CV_REGISTER(ARM64_X23, 73)
CV_REGISTER(ARM64_X24, 74)
CV_REGISTER(ARM64_X25, 75)
CV_REGISTER(ARM64_X26, 76)
CV_REGISTER(ARM64_X27, 77)
CV_REGISTER(ARM64_X28, 78)
CV_REGISTER(ARM64_FP, 79)
CV_REGISTER(ARM64_LR, 80)
CV_REGISTER(ARM64_SP, 81)
CV_REGISTER(ARM64_ZR, 82)
// status register
CV_REGISTER(ARM64_NZCV, 90)
// 32-bit floating point registers
CV_REGISTER(ARM64_S0, 100)
CV_REGISTER(ARM64_S1, 101)
CV_REGISTER(ARM64_S2, 102)
CV_REGISTER(ARM64_S3, 103)
CV_REGISTER(ARM64_S4, 104)
CV_REGISTER(ARM64_S5, 105)
CV_REGISTER(ARM64_S6, 106)
CV_REGISTER(ARM64_S7, 107)
CV_REGISTER(ARM64_S8, 108)
CV_REGISTER(ARM64_S9, 109)
CV_REGISTER(ARM64_S10, 110)
CV_REGISTER(ARM64_S11, 111)
CV_REGISTER(ARM64_S12, 112)
CV_REGISTER(ARM64_S13, 113)
CV_REGISTER(ARM64_S14, 114)
CV_REGISTER(ARM64_S15, 115)
CV_REGISTER(ARM64_S16, 116)
CV_REGISTER(ARM64_S17, 117)
CV_REGISTER(ARM64_S18, 118)
CV_REGISTER(ARM64_S19, 119)
CV_REGISTER(ARM64_S20, 120)
CV_REGISTER(ARM64_S21, 121)
CV_REGISTER(ARM64_S22, 122)
CV_REGISTER(ARM64_S23, 123)
CV_REGISTER(ARM64_S24, 124)
CV_REGISTER(ARM64_S25, 125)
CV_REGISTER(ARM64_S26, 126)
CV_REGISTER(ARM64_S27, 127)
CV_REGISTER(ARM64_S28, 128)
CV_REGISTER(ARM64_S29, 129)
CV_REGISTER(ARM64_S30, 130)
CV_REGISTER(ARM64_S31, 131)
// 64-bit floating point registers
CV_REGISTER(ARM64_D0, 140)
CV_REGISTER(ARM64_D1, 141)
CV_REGISTER(ARM64_D2, 142)
CV_REGISTER(ARM64_D3, 143)
CV_REGISTER(ARM64_D4, 144)
CV_REGISTER(ARM64_D5, 145)
CV_REGISTER(ARM64_D6, 146)
CV_REGISTER(ARM64_D7, 147)
CV_REGISTER(ARM64_D8, 148)
CV_REGISTER(ARM64_D9, 149)
CV_REGISTER(ARM64_D10, 150)
CV_REGISTER(ARM64_D11, 151)
CV_REGISTER(ARM64_D12, 152)
CV_REGISTER(ARM64_D13, 153)
CV_REGISTER(ARM64_D14, 154)
CV_REGISTER(ARM64_D15, 155)
CV_REGISTER(ARM64_D16, 156)
CV_REGISTER(ARM64_D17, 157)
CV_REGISTER(ARM64_D18, 158)
CV_REGISTER(ARM64_D19, 159)
CV_REGISTER(ARM64_D20, 160)
CV_REGISTER(ARM64_D21, 161)
CV_REGISTER(ARM64_D22, 162)
CV_REGISTER(ARM64_D23, 163)
CV_REGISTER(ARM64_D24, 164)
CV_REGISTER(ARM64_D25, 165)
CV_REGISTER(ARM64_D26, 166)
CV_REGISTER(ARM64_D27, 167)
CV_REGISTER(ARM64_D28, 168)
CV_REGISTER(ARM64_D29, 169)
CV_REGISTER(ARM64_D30, 170)
CV_REGISTER(ARM64_D31, 171)
// 128-bit SIMD registers
CV_REGISTER(ARM64_Q0, 180)
CV_REGISTER(ARM64_Q1, 181)
CV_REGISTER(ARM64_Q2, 182)
CV_REGISTER(ARM64_Q3, 183)
CV_REGISTER(ARM64_Q4, 184)
CV_REGISTER(ARM64_Q5, 185)
CV_REGISTER(ARM64_Q6, 186)
CV_REGISTER(ARM64_Q7, 187)
CV_REGISTER(ARM64_Q8, 188)
CV_REGISTER(ARM64_Q9, 189)
CV_REGISTER(ARM64_Q10, 190)
CV_REGISTER(ARM64_Q11, 191)
CV_REGISTER(ARM64_Q12, 192)
CV_REGISTER(ARM64_Q13, 193)
CV_REGISTER(ARM64_Q14, 194)
CV_REGISTER(ARM64_Q15, 195)
CV_REGISTER(ARM64_Q16, 196)
CV_REGISTER(ARM64_Q17, 197)
CV_REGISTER(ARM64_Q18, 198)
CV_REGISTER(ARM64_Q19, 199)
CV_REGISTER(ARM64_Q20, 200)
CV_REGISTER(ARM64_Q21, 201)
CV_REGISTER(ARM64_Q22, 202)
CV_REGISTER(ARM64_Q23, 203)
CV_REGISTER(ARM64_Q24, 204)
CV_REGISTER(ARM64_Q25, 205)
CV_REGISTER(ARM64_Q26, 206)
CV_REGISTER(ARM64_Q27, 207)
CV_REGISTER(ARM64_Q28, 208)
CV_REGISTER(ARM64_Q29, 209)
CV_REGISTER(ARM64_Q30, 210)
CV_REGISTER(ARM64_Q31, 211)
// Floating point status register
CV_REGISTER(ARM64_FPSR, 220)
CV_REGISTER(ARM64_FPCR, 221)
// 8 bit floating point registers
CV_REGISTER(ARM64_B0, 230)
CV_REGISTER(ARM64_B1, 231)
CV_REGISTER(ARM64_B2, 232)
CV_REGISTER(ARM64_B3, 233)
CV_REGISTER(ARM64_B4, 234)
CV_REGISTER(ARM64_B5, 235)
CV_REGISTER(ARM64_B6, 236)
CV_REGISTER(ARM64_B7, 237)
CV_REGISTER(ARM64_B8, 238)
CV_REGISTER(ARM64_B9, 239)
CV_REGISTER(ARM64_B10, 240)
CV_REGISTER(ARM64_B11, 241)
CV_REGISTER(ARM64_B12, 242)
CV_REGISTER(ARM64_B13, 243)
CV_REGISTER(ARM64_B14, 244)
CV_REGISTER(ARM64_B15, 245)
CV_REGISTER(ARM64_B16, 246)
CV_REGISTER(ARM64_B17, 247)
CV_REGISTER(ARM64_B18, 248)
CV_REGISTER(ARM64_B19, 249)
CV_REGISTER(ARM64_B20, 250)
CV_REGISTER(ARM64_B21, 251)
CV_REGISTER(ARM64_B22, 252)
CV_REGISTER(ARM64_B23, 253)
CV_REGISTER(ARM64_B24, 254)
CV_REGISTER(ARM64_B25, 255)
CV_REGISTER(ARM64_B26, 256)
CV_REGISTER(ARM64_B27, 257)
CV_REGISTER(ARM64_B28, 258)
CV_REGISTER(ARM64_B29, 259)
CV_REGISTER(ARM64_B30, 260)
CV_REGISTER(ARM64_B31, 261)
// 16 bit floating point registers
CV_REGISTER(ARM64_H0, 270)
CV_REGISTER(ARM64_H1, 271)
CV_REGISTER(ARM64_H2, 272)
CV_REGISTER(ARM64_H3, 273)
CV_REGISTER(ARM64_H4, 274)
CV_REGISTER(ARM64_H5, 275)
CV_REGISTER(ARM64_H6, 276)
CV_REGISTER(ARM64_H7, 277)
CV_REGISTER(ARM64_H8, 278)
CV_REGISTER(ARM64_H9, 279)
CV_REGISTER(ARM64_H10, 280)
CV_REGISTER(ARM64_H11, 281)
CV_REGISTER(ARM64_H12, 282)
CV_REGISTER(ARM64_H13, 283)
CV_REGISTER(ARM64_H14, 284)
CV_REGISTER(ARM64_H15, 285)
CV_REGISTER(ARM64_H16, 286)
CV_REGISTER(ARM64_H17, 287)
CV_REGISTER(ARM64_H18, 288)
CV_REGISTER(ARM64_H19, 289)
CV_REGISTER(ARM64_H20, 290)
CV_REGISTER(ARM64_H21, 291)
CV_REGISTER(ARM64_H22, 292)
CV_REGISTER(ARM64_H23, 293)
CV_REGISTER(ARM64_H24, 294)
CV_REGISTER(ARM64_H25, 295)
CV_REGISTER(ARM64_H26, 296)
CV_REGISTER(ARM64_H27, 297)
CV_REGISTER(ARM64_H28, 298)
CV_REGISTER(ARM64_H29, 299)
CV_REGISTER(ARM64_H30, 300)
CV_REGISTER(ARM64_H31, 301)
#pragma pop_macro("ARM64_FPSR")
#pragma pop_macro("ARM64_FPCR")
#endif // defined(CV_REGISTERS_ALL) || defined(CV_REGISTERS_ARM64)
PK hwFZ����w w . DebugInfo/CodeView/ContinuationRecordBuilder.hnu �[��� //===- ContinuationRecordBuilder.h ------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_CONTINUATIONRECORDBUILDER_H
#define LLVM_DEBUGINFO_CODEVIEW_CONTINUATIONRECORDBUILDER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/TypeRecordMapping.h"
#include "llvm/Support/BinaryByteStream.h"
#include "llvm/Support/BinaryStreamWriter.h"
#include <cstdint>
#include <vector>
namespace llvm {
namespace codeview {
class TypeIndex;
enum class ContinuationRecordKind { FieldList, MethodOverloadList };
class ContinuationRecordBuilder {
SmallVector<uint32_t, 4> SegmentOffsets;
std::optional<ContinuationRecordKind> Kind;
AppendingBinaryByteStream Buffer;
BinaryStreamWriter SegmentWriter;
TypeRecordMapping Mapping;
ArrayRef<uint8_t> InjectedSegmentBytes;
uint32_t getCurrentSegmentLength() const;
void insertSegmentEnd(uint32_t Offset);
CVType createSegmentRecord(uint32_t OffBegin, uint32_t OffEnd,
std::optional<TypeIndex> RefersTo);
public:
ContinuationRecordBuilder();
~ContinuationRecordBuilder();
void begin(ContinuationRecordKind RecordKind);
// This template is explicitly instantiated in the implementation file for all
// supported types. The method itself is ugly, so inlining it into the header
// file clutters an otherwise straightforward interface.
template <typename RecordType> void writeMemberType(RecordType &Record);
std::vector<CVType> end(TypeIndex Index);
};
} // namespace codeview
} // namespace llvm
#endif
PK hwFZ"���E E ( DebugInfo/CodeView/SymbolRecordHelpers.hnu �[��� //===- SymbolRecordHelpers.h ------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_SYMBOLRECORDHELPERS_H
#define LLVM_DEBUGINFO_CODEVIEW_SYMBOLRECORDHELPERS_H
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
namespace llvm {
namespace codeview {
/// Return true if this symbol opens a scope. This implies that the symbol has
/// "parent" and "end" fields, which contain the offset of the S_END or
/// S_INLINESITE_END record.
inline bool symbolOpensScope(SymbolKind Kind) {
switch (Kind) {
case SymbolKind::S_GPROC32:
case SymbolKind::S_LPROC32:
case SymbolKind::S_LPROC32_ID:
case SymbolKind::S_GPROC32_ID:
case SymbolKind::S_BLOCK32:
case SymbolKind::S_SEPCODE:
case SymbolKind::S_THUNK32:
case SymbolKind::S_INLINESITE:
case SymbolKind::S_INLINESITE2:
return true;
default:
break;
}
return false;
}
/// Return true if this ssymbol ends a scope.
inline bool symbolEndsScope(SymbolKind Kind) {
switch (Kind) {
case SymbolKind::S_END:
case SymbolKind::S_PROC_ID_END:
case SymbolKind::S_INLINESITE_END:
return true;
default:
break;
}
return false;
}
/// Given a symbol P for which symbolOpensScope(P) == true, return the
/// corresponding end offset.
uint32_t getScopeEndOffset(const CVSymbol &Symbol);
uint32_t getScopeParentOffset(const CVSymbol &Symbol);
CVSymbolArray limitSymbolArrayToScope(const CVSymbolArray &Symbols,
uint32_t ScopeBegin);
} // namespace codeview
} // namespace llvm
#endif
PK hwFZ�Ĕ ` ` DebugInfo/CodeView/GUID.hnu �[��� //===- GUID.h ---------------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_GUID_H
#define LLVM_DEBUGINFO_CODEVIEW_GUID_H
#include <cstdint>
#include <cstring>
namespace llvm {
class raw_ostream;
namespace codeview {
/// This represents the 'GUID' type from windows.h.
struct GUID {
uint8_t Guid[16];
};
inline bool operator==(const GUID &LHS, const GUID &RHS) {
return 0 == ::memcmp(LHS.Guid, RHS.Guid, sizeof(LHS.Guid));
}
inline bool operator<(const GUID &LHS, const GUID &RHS) {
return ::memcmp(LHS.Guid, RHS.Guid, sizeof(LHS.Guid)) < 0;
}
inline bool operator<=(const GUID &LHS, const GUID &RHS) {
return ::memcmp(LHS.Guid, RHS.Guid, sizeof(LHS.Guid)) <= 0;
}
inline bool operator>(const GUID &LHS, const GUID &RHS) {
return !(LHS <= RHS);
}
inline bool operator>=(const GUID &LHS, const GUID &RHS) {
return !(LHS < RHS);
}
inline bool operator!=(const GUID &LHS, const GUID &RHS) {
return !(LHS == RHS);
}
raw_ostream &operator<<(raw_ostream &OS, const GUID &Guid);
} // namespace codeview
} // namespace llvm
#endif
PK hwFZ�9�A A + DebugInfo/CodeView/SymbolVisitorCallbacks.hnu �[��� //===- SymbolVisitorCallbacks.h ---------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_SYMBOLVISITORCALLBACKS_H
#define LLVM_DEBUGINFO_CODEVIEW_SYMBOLVISITORCALLBACKS_H
#include "llvm/DebugInfo/CodeView/SymbolRecord.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace codeview {
class SymbolVisitorCallbacks {
friend class CVSymbolVisitor;
public:
virtual ~SymbolVisitorCallbacks() = default;
/// Action to take on unknown symbols. By default, they are ignored.
virtual Error visitUnknownSymbol(CVSymbol &Record) {
return Error::success();
}
/// Paired begin/end actions for all symbols. Receives all record data,
/// including the fixed-length record prefix. visitSymbolBegin() should
/// return the type of the Symbol, or an error if it cannot be determined.
virtual Error visitSymbolBegin(CVSymbol &Record, uint32_t Offset) {
return Error::success();
}
virtual Error visitSymbolBegin(CVSymbol &Record) { return Error::success(); }
virtual Error visitSymbolEnd(CVSymbol &Record) { return Error::success(); }
#define SYMBOL_RECORD(EnumName, EnumVal, Name) \
virtual Error visitKnownRecord(CVSymbol &CVR, Name &Record) { \
return Error::success(); \
}
#define SYMBOL_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
#include "llvm/DebugInfo/CodeView/CodeViewSymbols.def"
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_SYMBOLVISITORCALLBACKS_H
PK hwFZ�<Ϭ
�
) DebugInfo/CodeView/TypeVisitorCallbacks.hnu �[��� //===- TypeVisitorCallbacks.h -----------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_TYPEVISITORCALLBACKS_H
#define LLVM_DEBUGINFO_CODEVIEW_TYPEVISITORCALLBACKS_H
#include "llvm/DebugInfo/CodeView/TypeRecord.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace codeview {
class TypeVisitorCallbacks {
public:
virtual ~TypeVisitorCallbacks() = default;
/// Action to take on unknown types. By default, they are ignored.
virtual Error visitUnknownType(CVType &Record) { return Error::success(); }
/// Paired begin/end actions for all types. Receives all record data,
/// including the fixed-length record prefix. visitTypeBegin() should return
/// the type of the Record, or an error if it cannot be determined. Exactly
/// one of the two visitTypeBegin methods will be called, depending on whether
/// records are being visited sequentially or randomly. An implementation
/// should be prepared to handle both (or assert if it can't handle random
/// access visitation).
virtual Error visitTypeBegin(CVType &Record) { return Error::success(); }
virtual Error visitTypeBegin(CVType &Record, TypeIndex Index) {
return Error::success();
}
virtual Error visitTypeEnd(CVType &Record) { return Error::success(); }
virtual Error visitUnknownMember(CVMemberRecord &Record) {
return Error::success();
}
virtual Error visitMemberBegin(CVMemberRecord &Record) {
return Error::success();
}
virtual Error visitMemberEnd(CVMemberRecord &Record) {
return Error::success();
}
#define TYPE_RECORD(EnumName, EnumVal, Name) \
virtual Error visitKnownRecord(CVType &CVR, Name##Record &Record) { \
return Error::success(); \
}
#define MEMBER_RECORD(EnumName, EnumVal, Name) \
virtual Error visitKnownMember(CVMemberRecord &CVM, Name##Record &Record) { \
return Error::success(); \
}
#define TYPE_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
#define MEMBER_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
#include "llvm/DebugInfo/CodeView/CodeViewTypes.def"
#undef TYPE_RECORD
#undef TYPE_RECORD_ALIAS
#undef MEMBER_RECORD
#undef MEMBER_RECORD_ALIAS
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_TYPEVISITORCALLBACKS_H
PK hwFZ�!�� � ' DebugInfo/CodeView/SymbolDumpDelegate.hnu �[��� //===-- SymbolDumpDelegate.h ------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_SYMBOLDUMPDELEGATE_H
#define LLVM_DEBUGINFO_CODEVIEW_SYMBOLDUMPDELEGATE_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/SymbolVisitorDelegate.h"
#include <cstdint>
namespace llvm {
namespace codeview {
class SymbolDumpDelegate : public SymbolVisitorDelegate {
public:
~SymbolDumpDelegate() override = default;
virtual void printRelocatedField(StringRef Label, uint32_t RelocOffset,
uint32_t Offset,
StringRef *RelocSym = nullptr) = 0;
virtual void printBinaryBlockWithRelocs(StringRef Label,
ArrayRef<uint8_t> Block) = 0;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_SYMBOLDUMPDELEGATE_H
PK hwFZ1�f� $ DebugInfo/CodeView/CVSymbolVisitor.hnu �[��� //===- CVSymbolVisitor.h ----------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_CVSYMBOLVISITOR_H
#define LLVM_DEBUGINFO_CODEVIEW_CVSYMBOLVISITOR_H
#include "llvm/DebugInfo/CodeView/CVRecord.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace codeview {
class SymbolVisitorCallbacks;
class CVSymbolVisitor {
public:
struct FilterOptions {
std::optional<uint32_t> SymbolOffset;
std::optional<uint32_t> ParentRecursiveDepth;
std::optional<uint32_t> ChildRecursiveDepth;
};
CVSymbolVisitor(SymbolVisitorCallbacks &Callbacks);
Error visitSymbolRecord(CVSymbol &Record);
Error visitSymbolRecord(CVSymbol &Record, uint32_t Offset);
Error visitSymbolStream(const CVSymbolArray &Symbols);
Error visitSymbolStream(const CVSymbolArray &Symbols, uint32_t InitialOffset);
Error visitSymbolStreamFiltered(const CVSymbolArray &Symbols,
const FilterOptions &Filter);
private:
SymbolVisitorCallbacks &Callbacks;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_CVSYMBOLVISITOR_H
PK hwFZ!�9T T - DebugInfo/CodeView/LazyRandomTypeCollection.hnu �[��� //===- LazyRandomTypeCollection.h -------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_LAZYRANDOMTYPECOLLECTION_H
#define LLVM_DEBUGINFO_CODEVIEW_LAZYRANDOMTYPECOLLECTION_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/TypeCollection.h"
#include "llvm/DebugInfo/CodeView/TypeIndex.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/StringSaver.h"
#include <cstdint>
#include <vector>
namespace llvm {
namespace codeview {
/// Provides amortized O(1) random access to a CodeView type stream.
/// Normally to access a type from a type stream, you must know its byte
/// offset into the type stream, because type records are variable-lengthed.
/// However, this is not the way we prefer to access them. For example, given
/// a symbol record one of the fields may be the TypeIndex of the symbol's
/// type record. Or given a type record such as an array type, there might
/// be a TypeIndex for the element type. Sequential access is perfect when
/// we're just dumping every entry, but it's very poor for real world usage.
///
/// Type streams in PDBs contain an additional field which is a list of pairs
/// containing indices and their corresponding offsets, roughly every ~8KB of
/// record data. This general idea need not be confined to PDBs though. By
/// supplying such an array, the producer of a type stream can allow the
/// consumer much better access time, because the consumer can find the nearest
/// index in this array, and do a linear scan forward only from there.
///
/// LazyRandomTypeCollection implements this algorithm, but additionally goes
/// one step further by caching offsets of every record that has been visited at
/// least once. This way, even repeated visits of the same record will never
/// require more than one linear scan. For a type stream of N elements divided
/// into M chunks of roughly equal size, this yields a worst case lookup time
/// of O(N/M) and an amortized time of O(1).
class LazyRandomTypeCollection : public TypeCollection {
using PartialOffsetArray = FixedStreamArray<TypeIndexOffset>;
struct CacheEntry {
CVType Type;
uint32_t Offset;
StringRef Name;
};
public:
explicit LazyRandomTypeCollection(uint32_t RecordCountHint);
LazyRandomTypeCollection(StringRef Data, uint32_t RecordCountHint);
LazyRandomTypeCollection(ArrayRef<uint8_t> Data, uint32_t RecordCountHint);
LazyRandomTypeCollection(const CVTypeArray &Types, uint32_t RecordCountHint,
PartialOffsetArray PartialOffsets);
LazyRandomTypeCollection(const CVTypeArray &Types, uint32_t RecordCountHint);
void reset(ArrayRef<uint8_t> Data, uint32_t RecordCountHint);
void reset(StringRef Data, uint32_t RecordCountHint);
void reset(BinaryStreamReader &Reader, uint32_t RecordCountHint);
uint32_t getOffsetOfType(TypeIndex Index);
std::optional<CVType> tryGetType(TypeIndex Index);
CVType getType(TypeIndex Index) override;
StringRef getTypeName(TypeIndex Index) override;
bool contains(TypeIndex Index) override;
uint32_t size() override;
uint32_t capacity() override;
std::optional<TypeIndex> getFirst() override;
std::optional<TypeIndex> getNext(TypeIndex Prev) override;
bool replaceType(TypeIndex &Index, CVType Data, bool Stabilize) override;
private:
Error ensureTypeExists(TypeIndex Index);
void ensureCapacityFor(TypeIndex Index);
Error visitRangeForType(TypeIndex TI);
Error fullScanForType(TypeIndex TI);
void visitRange(TypeIndex Begin, uint32_t BeginOffset, TypeIndex End);
/// Number of actual records.
uint32_t Count = 0;
/// The largest type index which we've visited.
TypeIndex LargestTypeIndex = TypeIndex::None();
BumpPtrAllocator Allocator;
StringSaver NameStorage;
/// The type array to allow random access visitation of.
CVTypeArray Types;
std::vector<CacheEntry> Records;
/// An array of index offsets for the given type stream, allowing log(N)
/// lookups of a type record by index. Similar to KnownOffsets but only
/// contains offsets for some type indices, some of which may not have
/// ever been visited.
PartialOffsetArray PartialOffsets;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_LAZYRANDOMTYPECOLLECTION_H
PK hwFZR � + DebugInfo/CodeView/DebugUnknownSubsection.hnu �[��� //===- DebugUnknownSubsection.h -----------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_DEBUGUNKNOWNSUBSECTION_H
#define LLVM_DEBUGINFO_CODEVIEW_DEBUGUNKNOWNSUBSECTION_H
#include "llvm/DebugInfo/CodeView/DebugSubsection.h"
#include "llvm/Support/BinaryStreamRef.h"
namespace llvm {
namespace codeview {
class DebugUnknownSubsectionRef final : public DebugSubsectionRef {
public:
DebugUnknownSubsectionRef(DebugSubsectionKind Kind, BinaryStreamRef Data)
: DebugSubsectionRef(Kind), Data(Data) {}
BinaryStreamRef getData() const { return Data; }
private:
BinaryStreamRef Data;
};
}
}
#endif
PK hwFZG �)�
�
' DebugInfo/CodeView/SymbolDeserializer.hnu �[��� //===- SymbolDeserializer.h -------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_SYMBOLDESERIALIZER_H
#define LLVM_DEBUGINFO_CODEVIEW_SYMBOLDESERIALIZER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/DebugInfo/CodeView/SymbolRecord.h"
#include "llvm/DebugInfo/CodeView/SymbolRecordMapping.h"
#include "llvm/DebugInfo/CodeView/SymbolVisitorCallbacks.h"
#include "llvm/DebugInfo/CodeView/SymbolVisitorDelegate.h"
#include "llvm/Support/BinaryByteStream.h"
#include "llvm/Support/BinaryStreamReader.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace codeview {
class SymbolVisitorDelegate;
class SymbolDeserializer : public SymbolVisitorCallbacks {
struct MappingInfo {
MappingInfo(ArrayRef<uint8_t> RecordData, CodeViewContainer Container)
: Stream(RecordData, llvm::support::little), Reader(Stream),
Mapping(Reader, Container) {}
BinaryByteStream Stream;
BinaryStreamReader Reader;
SymbolRecordMapping Mapping;
};
public:
template <typename T> static Error deserializeAs(CVSymbol Symbol, T &Record) {
// If we're just deserializing one record, then don't worry about alignment
// as there's nothing that comes after.
SymbolDeserializer S(nullptr, CodeViewContainer::ObjectFile);
if (auto EC = S.visitSymbolBegin(Symbol))
return EC;
if (auto EC = S.visitKnownRecord(Symbol, Record))
return EC;
if (auto EC = S.visitSymbolEnd(Symbol))
return EC;
return Error::success();
}
template <typename T> static Expected<T> deserializeAs(CVSymbol Symbol) {
T Record(static_cast<SymbolRecordKind>(Symbol.kind()));
if (auto EC = deserializeAs<T>(Symbol, Record))
return std::move(EC);
return Record;
}
explicit SymbolDeserializer(SymbolVisitorDelegate *Delegate,
CodeViewContainer Container)
: Delegate(Delegate), Container(Container) {}
Error visitSymbolBegin(CVSymbol &Record, uint32_t Offset) override {
return visitSymbolBegin(Record);
}
Error visitSymbolBegin(CVSymbol &Record) override {
assert(!Mapping && "Already in a symbol mapping!");
Mapping = std::make_unique<MappingInfo>(Record.content(), Container);
return Mapping->Mapping.visitSymbolBegin(Record);
}
Error visitSymbolEnd(CVSymbol &Record) override {
assert(Mapping && "Not in a symbol mapping!");
auto EC = Mapping->Mapping.visitSymbolEnd(Record);
Mapping.reset();
return EC;
}
#define SYMBOL_RECORD(EnumName, EnumVal, Name) \
Error visitKnownRecord(CVSymbol &CVR, Name &Record) override { \
return visitKnownRecordImpl(CVR, Record); \
}
#define SYMBOL_RECORD_ALIAS(EnumName, EnumVal, Name, AliasName)
#include "llvm/DebugInfo/CodeView/CodeViewSymbols.def"
private:
template <typename T> Error visitKnownRecordImpl(CVSymbol &CVR, T &Record) {
Record.RecordOffset =
Delegate ? Delegate->getRecordOffset(Mapping->Reader) : 0;
if (auto EC = Mapping->Mapping.visitKnownRecord(CVR, Record))
return EC;
return Error::success();
}
SymbolVisitorDelegate *Delegate;
CodeViewContainer Container;
std::unique_ptr<MappingInfo> Mapping;
};
}
}
#endif
PK hwFZީJ� � / DebugInfo/CodeView/DebugStringTableSubsection.hnu �[��� //===- DebugStringTableSubsection.h - CodeView String Table -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_DEBUGSTRINGTABLESUBSECTION_H
#define LLVM_DEBUGINFO_CODEVIEW_DEBUGSTRINGTABLESUBSECTION_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/DebugInfo/CodeView/DebugSubsection.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Error.h"
#include <cstdint>
namespace llvm {
class BinaryStreamReader;
namespace codeview {
/// Represents a read-only view of a CodeView string table. This is a very
/// simple flat buffer consisting of null-terminated strings, where strings
/// are retrieved by their offset in the buffer. DebugStringTableSubsectionRef
/// does not own the underlying storage for the buffer.
class DebugStringTableSubsectionRef : public DebugSubsectionRef {
public:
DebugStringTableSubsectionRef();
static bool classof(const DebugSubsectionRef *S) {
return S->kind() == DebugSubsectionKind::StringTable;
}
Error initialize(BinaryStreamRef Contents);
Error initialize(BinaryStreamReader &Reader);
Expected<StringRef> getString(uint32_t Offset) const;
bool valid() const { return Stream.valid(); }
BinaryStreamRef getBuffer() const { return Stream; }
private:
BinaryStreamRef Stream;
};
/// Represents a read-write view of a CodeView string table.
/// DebugStringTableSubsection owns the underlying storage for the table, and is
/// capable of serializing the string table into a format understood by
/// DebugStringTableSubsectionRef.
class DebugStringTableSubsection : public DebugSubsection {
public:
DebugStringTableSubsection();
static bool classof(const DebugSubsection *S) {
return S->kind() == DebugSubsectionKind::StringTable;
}
// If string S does not exist in the string table, insert it.
// Returns the ID for S.
uint32_t insert(StringRef S);
// Return the ID for string S. Assumes S exists in the table.
uint32_t getIdForString(StringRef S) const;
StringRef getStringForId(uint32_t Id) const;
uint32_t calculateSerializedSize() const override;
Error commit(BinaryStreamWriter &Writer) const override;
uint32_t size() const;
StringMap<uint32_t>::const_iterator begin() const {
return StringToId.begin();
}
StringMap<uint32_t>::const_iterator end() const { return StringToId.end(); }
std::vector<uint32_t> sortedIds() const;
private:
DenseMap<uint32_t, StringRef> IdToString;
StringMap<uint32_t> StringToId;
uint32_t StringSize = 1;
};
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_DEBUGSTRINGTABLESUBSECTION_H
PK hwFZ*/�q` ` * DebugInfo/CodeView/DebugSubsectionRecord.hnu �[��� //===- DebugSubsectionRecord.h ----------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_DEBUGSUBSECTIONRECORD_H
#define LLVM_DEBUGINFO_CODEVIEW_DEBUGSUBSECTIONRECORD_H
#include "llvm/DebugInfo/CodeView/CodeView.h"
#include "llvm/Support/BinaryStreamArray.h"
#include "llvm/Support/BinaryStreamRef.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MathExtras.h"
#include <cstdint>
#include <memory>
namespace llvm {
class BinaryStreamWriter;
namespace codeview {
class DebugSubsection;
// Corresponds to the `CV_DebugSSubsectionHeader_t` structure.
struct DebugSubsectionHeader {
support::ulittle32_t Kind; // codeview::DebugSubsectionKind enum
support::ulittle32_t Length; // number of bytes occupied by this record.
};
class DebugSubsectionRecord {
public:
DebugSubsectionRecord();
DebugSubsectionRecord(DebugSubsectionKind Kind, BinaryStreamRef Data);
static Error initialize(BinaryStreamRef Stream, DebugSubsectionRecord &Info);
uint32_t getRecordLength() const;
DebugSubsectionKind kind() const;
BinaryStreamRef getRecordData() const;
private:
DebugSubsectionKind Kind = DebugSubsectionKind::None;
BinaryStreamRef Data;
};
class DebugSubsectionRecordBuilder {
public:
DebugSubsectionRecordBuilder(std::shared_ptr<DebugSubsection> Subsection);
/// Use this to copy existing subsections directly from source to destination.
/// For example, line table subsections in an object file only need to be
/// relocated before being copied into the PDB.
DebugSubsectionRecordBuilder(const DebugSubsectionRecord &Contents);
uint32_t calculateSerializedLength() const;
Error commit(BinaryStreamWriter &Writer, CodeViewContainer Container) const;
private:
/// The subsection to build. Will be null if Contents is non-empty.
std::shared_ptr<DebugSubsection> Subsection;
/// The bytes of the subsection. Only non-empty if Subsection is null.
/// FIXME: Reduce the size of this.
DebugSubsectionRecord Contents;
};
} // end namespace codeview
template <> struct VarStreamArrayExtractor<codeview::DebugSubsectionRecord> {
Error operator()(BinaryStreamRef Stream, uint32_t &Length,
codeview::DebugSubsectionRecord &Info) {
// FIXME: We need to pass the container type through to this function. In
// practice this isn't super important since the subsection header describes
// its length and we can just skip it. It's more important when writing.
if (auto EC = codeview::DebugSubsectionRecord::initialize(Stream, Info))
return EC;
Length = alignTo(Info.getRecordLength(), 4);
return Error::success();
}
};
namespace codeview {
using DebugSubsectionArray = VarStreamArray<DebugSubsectionRecord>;
} // end namespace codeview
} // end namespace llvm
#endif // LLVM_DEBUGINFO_CODEVIEW_DEBUGSUBSECTIONRECORD_H
PK hwFZ'�B_ _ DebugInfo/CodeView/FunctionId.hnu �[��� //===- FunctionId.h ---------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_DEBUGINFO_CODEVIEW_FUNCTIONID_H
#define LLVM_DEBUGINFO_CODEVIEW_FUNCTIONID_H
#include <cinttypes>
namespace llvm {
namespace codeview {
class FunctionId {
public:
FunctionId() : Index(0) {}
explicit FunctionId(uint32_t Index) : Index(Index) {}
uint32_t getIndex() const { return Index; }
private:
uint32_t Index;
};
inline bool operator==(const FunctionId &A, const FunctionId &B) {
return A.getIndex() == B.getIndex();
}
inline bool operator!=(const FunctionId &A, const FunctionId &B) {
return A.getIndex() != B.getIndex();
}
inline bool operator<(const FunctionId &A, const FunctionId &B) {
return A.getIndex() < B.getIndex();
}
inline bool operator<=(const FunctionId &A, const FunctionId &B) {
return A.getIndex() <= B.getIndex();
}
inline bool operator>(const FunctionId &A, const FunctionId &B) {
return A.getIndex() > B.getIndex();
}
inline bool operator>=(const FunctionId &A, const FunctionId &B) {
return A.getIndex() >= B.getIndex();
}
}
}
#endif
PK hwFZ>O�w� � BinaryFormat/Swift.hnu �[��� //===-- llvm/BinaryFormat/Swift.h ---Swift Constants-------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
#ifndef LLVM_BINARYFORMAT_SWIFT_H
#define LLVM_BINARYFORMAT_SWIFT_H
namespace llvm {
namespace binaryformat {
enum Swift5ReflectionSectionKind {
#define HANDLE_SWIFT_SECTION(KIND, MACHO, ELF, COFF) KIND,
#include "llvm/BinaryFormat/Swift.def"
#undef HANDLE_SWIFT_SECTION
unknown,
last = unknown
};
} // end of namespace binaryformat
} // end of namespace llvm
#endif
PK hwFZr
BinaryFormat/WasmTraits.hnu �[��� //===- WasmTraits.h - DenseMap traits for the Wasm structures ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides llvm::DenseMapInfo traits for the Wasm structures.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_BINARYFORMAT_WASMTRAITS_H
#define LLVM_BINARYFORMAT_WASMTRAITS_H
#include "llvm/ADT/Hashing.h"
#include "llvm/BinaryFormat/Wasm.h"
namespace llvm {
// Traits for using WasmSignature in a DenseMap.
template <> struct DenseMapInfo<wasm::WasmSignature, void> {
static wasm::WasmSignature getEmptyKey() {
wasm::WasmSignature Sig;
Sig.State = wasm::WasmSignature::Empty;
return Sig;
}
static wasm::WasmSignature getTombstoneKey() {
wasm::WasmSignature Sig;
Sig.State = wasm::WasmSignature::Tombstone;
return Sig;
}
static unsigned getHashValue(const wasm::WasmSignature &Sig) {
uintptr_t H = hash_value(Sig.State);
for (auto Ret : Sig.Returns)
H = hash_combine(H, Ret);
for (auto Param : Sig.Params)
H = hash_combine(H, Param);
return H;
}
static bool isEqual(const wasm::WasmSignature &LHS,
const wasm::WasmSignature &RHS) {
return LHS == RHS;
}
};
// Traits for using WasmGlobalType in a DenseMap
template <> struct DenseMapInfo<wasm::WasmGlobalType, void> {
static wasm::WasmGlobalType getEmptyKey() {
return wasm::WasmGlobalType{1, true};
}
static wasm::WasmGlobalType getTombstoneKey() {
return wasm::WasmGlobalType{2, true};
}
static unsigned getHashValue(const wasm::WasmGlobalType &GlobalType) {
return hash_combine(GlobalType.Type, GlobalType.Mutable);
}
static bool isEqual(const wasm::WasmGlobalType &LHS,
const wasm::WasmGlobalType &RHS) {
return LHS == RHS;
}
};
// Traits for using WasmLimits in a DenseMap
template <> struct DenseMapInfo<wasm::WasmLimits, void> {
static wasm::WasmLimits getEmptyKey() {
return wasm::WasmLimits{0xff, 0xff, 0xff};
}
static wasm::WasmLimits getTombstoneKey() {
return wasm::WasmLimits{0xee, 0xee, 0xee};
}
static unsigned getHashValue(const wasm::WasmLimits &Limits) {
unsigned Hash = hash_value(Limits.Flags);
Hash = hash_combine(Hash, Limits.Minimum);
if (Limits.Flags & llvm::wasm::WASM_LIMITS_FLAG_HAS_MAX) {
Hash = hash_combine(Hash, Limits.Maximum);
}
return Hash;
}
static bool isEqual(const wasm::WasmLimits &LHS,
const wasm::WasmLimits &RHS) {
return LHS == RHS;
}
};
// Traits for using WasmTableType in a DenseMap
template <> struct DenseMapInfo<wasm::WasmTableType, void> {
static wasm::WasmTableType getEmptyKey() {
return wasm::WasmTableType{
0, DenseMapInfo<wasm::WasmLimits, void>::getEmptyKey()};
}
static wasm::WasmTableType getTombstoneKey() {
return wasm::WasmTableType{
1, DenseMapInfo<wasm::WasmLimits, void>::getTombstoneKey()};
}
static unsigned getHashValue(const wasm::WasmTableType &TableType) {
return hash_combine(
TableType.ElemType,
DenseMapInfo<wasm::WasmLimits, void>::getHashValue(TableType.Limits));
}
static bool isEqual(const wasm::WasmTableType &LHS,
const wasm::WasmTableType &RHS) {
return LHS == RHS;
}
};
} // end namespace llvm
#endif // LLVM_BINARYFORMAT_WASMTRAITS_H
PK hwFZ�\P�E E BinaryFormat/MsgPackReader.hnu �[��� //===- MsgPackReader.h - Simple MsgPack reader ------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This is a MessagePack reader.
///
/// See https://github.com/msgpack/msgpack/blob/master/spec.md for the full
/// standard.
///
/// Typical usage:
/// \code
/// StringRef input = GetInput();
/// msgpack::Reader MPReader(input);
/// msgpack::Object Obj;
///
/// while (MPReader.read(Obj)) {
/// switch (Obj.Kind) {
/// case msgpack::Type::Int:
// // Use Obj.Int
/// break;
/// // ...
/// }
/// }
/// \endcode
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_BINARYFORMAT_MSGPACKREADER_H
#define LLVM_BINARYFORMAT_MSGPACKREADER_H
#include "llvm/Support/Error.h"
#include "llvm/Support/MemoryBufferRef.h"
#include <cstdint>
namespace llvm {
namespace msgpack {
/// MessagePack types as defined in the standard, with the exception of Integer
/// being divided into a signed Int and unsigned UInt variant in order to map
/// directly to C++ types.
///
/// The types map onto corresponding union members of the \c Object struct.
enum class Type : uint8_t {
Int,
UInt,
Nil,
Boolean,
Float,
String,
Binary,
Array,
Map,
Extension,
Empty, // Used by MsgPackDocument to represent an empty node
};
/// Extension types are composed of a user-defined type ID and an uninterpreted
/// sequence of bytes.
struct ExtensionType {
/// User-defined extension type.
int8_t Type;
/// Raw bytes of the extension object.
StringRef Bytes;
};
/// MessagePack object, represented as a tagged union of C++ types.
///
/// All types except \c Type::Nil (which has only one value, and so is
/// completely represented by the \c Kind itself) map to a exactly one union
/// member.
struct Object {
Type Kind;
union {
/// Value for \c Type::Int.
int64_t Int;
/// Value for \c Type::Uint.
uint64_t UInt;
/// Value for \c Type::Boolean.
bool Bool;
/// Value for \c Type::Float.
double Float;
/// Value for \c Type::String and \c Type::Binary.
StringRef Raw;
/// Value for \c Type::Array and \c Type::Map.
size_t Length;
/// Value for \c Type::Extension.
ExtensionType Extension;
};
Object() : Kind(Type::Int), Int(0) {}
};
/// Reads MessagePack objects from memory, one at a time.
class Reader {
public:
/// Construct a reader, keeping a reference to the \p InputBuffer.
Reader(MemoryBufferRef InputBuffer);
/// Construct a reader, keeping a reference to the \p Input.
Reader(StringRef Input);
Reader(const Reader &) = delete;
Reader &operator=(const Reader &) = delete;
/// Read one object from the input buffer, advancing past it.
///
/// The \p Obj is updated with the kind of the object read, and the
/// corresponding union member is updated.
///
/// For the collection objects (Array and Map), only the length is read, and
/// the caller must make and additional \c N calls (in the case of Array) or
/// \c N*2 calls (in the case of Map) to \c Read to retrieve the collection
/// elements.
///
/// \param [out] Obj filled with next object on success.
///
/// \returns true when object successfully read, false when at end of
/// input (and so \p Obj was not updated), otherwise an error.
Expected<bool> read(Object &Obj);
private:
MemoryBufferRef InputBuffer;
StringRef::iterator Current;
StringRef::iterator End;
size_t remainingSpace() {
// The rest of the code maintains the invariant that End >= Current, so
// that this cast is always defined behavior.
return static_cast<size_t>(End - Current);
}
template <class T> Expected<bool> readRaw(Object &Obj);
template <class T> Expected<bool> readInt(Object &Obj);
template <class T> Expected<bool> readUInt(Object &Obj);
template <class T> Expected<bool> readLength(Object &Obj);
template <class T> Expected<bool> readExt(Object &Obj);
Expected<bool> createRaw(Object &Obj, uint32_t Size);
Expected<bool> createExt(Object &Obj, uint32_t Size);
};
} // end namespace msgpack
} // end namespace llvm
#endif // LLVM_BINARYFORMAT_MSGPACKREADER_H
PK hwFZ n��e e BinaryFormat/ELF.hnu �[��� //===- llvm/BinaryFormat/ELF.h - ELF constants and structures ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This header contains common, non-processor-specific data structures and
// constants for the ELF file format.
//
// The details of the ELF32 bits in this file are largely based on the Tool
// Interface Standard (TIS) Executable and Linking Format (ELF) Specification
// Version 1.2, May 1995. The ELF64 stuff is based on ELF-64 Object File Format
// Version 1.5, Draft 2, May 1998 as well as OpenBSD header files.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_BINARYFORMAT_ELF_H
#define LLVM_BINARYFORMAT_ELF_H
#include "llvm/ADT/StringRef.h"
#include <cstdint>
#include <cstring>
namespace llvm {
namespace ELF {
using Elf32_Addr = uint32_t; // Program address
using Elf32_Off = uint32_t; // File offset
using Elf32_Half = uint16_t;
using Elf32_Word = uint32_t;
using Elf32_Sword = int32_t;
using Elf64_Addr = uint64_t;
using Elf64_Off = uint64_t;
using Elf64_Half = uint16_t;
using Elf64_Word = uint32_t;
using Elf64_Sword = int32_t;
using Elf64_Xword = uint64_t;
using Elf64_Sxword = int64_t;
// Object file magic string.
static const char ElfMagic[] = {0x7f, 'E', 'L', 'F', '\0'};
// e_ident size and indices.
enum {
EI_MAG0 = 0, // File identification index.
EI_MAG1 = 1, // File identification index.
EI_MAG2 = 2, // File identification index.
EI_MAG3 = 3, // File identification index.
EI_CLASS = 4, // File class.
EI_DATA = 5, // Data encoding.
EI_VERSION = 6, // File version.
EI_OSABI = 7, // OS/ABI identification.
EI_ABIVERSION = 8, // ABI version.
EI_PAD = 9, // Start of padding bytes.
EI_NIDENT = 16 // Number of bytes in e_ident.
};
struct Elf32_Ehdr {
unsigned char e_ident[EI_NIDENT]; // ELF Identification bytes
Elf32_Half e_type; // Type of file (see ET_* below)
Elf32_Half e_machine; // Required architecture for this file (see EM_*)
Elf32_Word e_version; // Must be equal to 1
Elf32_Addr e_entry; // Address to jump to in order to start program
Elf32_Off e_phoff; // Program header table's file offset, in bytes
Elf32_Off e_shoff; // Section header table's file offset, in bytes
Elf32_Word e_flags; // Processor-specific flags
Elf32_Half e_ehsize; // Size of ELF header, in bytes
Elf32_Half e_phentsize; // Size of an entry in the program header table
Elf32_Half e_phnum; // Number of entries in the program header table
Elf32_Half e_shentsize; // Size of an entry in the section header table
Elf32_Half e_shnum; // Number of entries in the section header table
Elf32_Half e_shstrndx; // Sect hdr table index of sect name string table
bool checkMagic() const {
return (memcmp(e_ident, ElfMagic, strlen(ElfMagic))) == 0;
}
unsigned char getFileClass() const { return e_ident[EI_CLASS]; }
unsigned char getDataEncoding() const { return e_ident[EI_DATA]; }
};
// 64-bit ELF header. Fields are the same as for ELF32, but with different
// types (see above).
struct Elf64_Ehdr {
unsigned char e_ident[EI_NIDENT];
Elf64_Half e_type;
Elf64_Half e_machine;
Elf64_Word e_version;
Elf64_Addr e_entry;
Elf64_Off e_phoff;
Elf64_Off e_shoff;
Elf64_Word e_flags;
Elf64_Half e_ehsize;
Elf64_Half e_phentsize;
Elf64_Half e_phnum;
Elf64_Half e_shentsize;
Elf64_Half e_shnum;
Elf64_Half e_shstrndx;
bool checkMagic() const {
return (memcmp(e_ident, ElfMagic, strlen(ElfMagic))) == 0;
}
unsigned char getFileClass() const { return e_ident[EI_CLASS]; }
unsigned char getDataEncoding() const { return e_ident[EI_DATA]; }
};
// File types.
// See current registered ELF types at:
// http://www.sco.com/developers/gabi/latest/ch4.eheader.html
enum {
ET_NONE = 0, // No file type
ET_REL = 1, // Relocatable file
ET_EXEC = 2, // Executable file
ET_DYN = 3, // Shared object file
ET_CORE = 4, // Core file
ET_LOOS = 0xfe00, // Beginning of operating system-specific codes
ET_HIOS = 0xfeff, // Operating system-specific
ET_LOPROC = 0xff00, // Beginning of processor-specific codes
ET_HIPROC = 0xffff // Processor-specific
};
// Versioning
enum { EV_NONE = 0, EV_CURRENT = 1 };
// Machine architectures
// See current registered ELF machine architectures at:
// http://www.uxsglobal.com/developers/gabi/latest/ch4.eheader.html
enum {
EM_NONE = 0, // No machine
EM_M32 = 1, // AT&T WE 32100
EM_SPARC = 2, // SPARC
EM_386 = 3, // Intel 386
EM_68K = 4, // Motorola 68000
EM_88K = 5, // Motorola 88000
EM_IAMCU = 6, // Intel MCU
EM_860 = 7, // Intel 80860
EM_MIPS = 8, // MIPS R3000
EM_S370 = 9, // IBM System/370
EM_MIPS_RS3_LE = 10, // MIPS RS3000 Little-endian
EM_PARISC = 15, // Hewlett-Packard PA-RISC
EM_VPP500 = 17, // Fujitsu VPP500
EM_SPARC32PLUS = 18, // Enhanced instruction set SPARC
EM_960 = 19, // Intel 80960
EM_PPC = 20, // PowerPC
EM_PPC64 = 21, // PowerPC64
EM_S390 = 22, // IBM System/390
EM_SPU = 23, // IBM SPU/SPC
EM_V800 = 36, // NEC V800
EM_FR20 = 37, // Fujitsu FR20
EM_RH32 = 38, // TRW RH-32
EM_RCE = 39, // Motorola RCE
EM_ARM = 40, // ARM
EM_ALPHA = 41, // DEC Alpha
EM_SH = 42, // Hitachi SH
EM_SPARCV9 = 43, // SPARC V9
EM_TRICORE = 44, // Siemens TriCore
EM_ARC = 45, // Argonaut RISC Core
EM_H8_300 = 46, // Hitachi H8/300
EM_H8_300H = 47, // Hitachi H8/300H
EM_H8S = 48, // Hitachi H8S
EM_H8_500 = 49, // Hitachi H8/500
EM_IA_64 = 50, // Intel IA-64 processor architecture
EM_MIPS_X = 51, // Stanford MIPS-X
EM_COLDFIRE = 52, // Motorola ColdFire
EM_68HC12 = 53, // Motorola M68HC12
EM_MMA = 54, // Fujitsu MMA Multimedia Accelerator
EM_PCP = 55, // Siemens PCP
EM_NCPU = 56, // Sony nCPU embedded RISC processor
EM_NDR1 = 57, // Denso NDR1 microprocessor
EM_STARCORE = 58, // Motorola Star*Core processor
EM_ME16 = 59, // Toyota ME16 processor
EM_ST100 = 60, // STMicroelectronics ST100 processor
EM_TINYJ = 61, // Advanced Logic Corp. TinyJ embedded processor family
EM_X86_64 = 62, // AMD x86-64 architecture
EM_PDSP = 63, // Sony DSP Processor
EM_PDP10 = 64, // Digital Equipment Corp. PDP-10
EM_PDP11 = 65, // Digital Equipment Corp. PDP-11
EM_FX66 = 66, // Siemens FX66 microcontroller
EM_ST9PLUS = 67, // STMicroelectronics ST9+ 8/16 bit microcontroller
EM_ST7 = 68, // STMicroelectronics ST7 8-bit microcontroller
EM_68HC16 = 69, // Motorola MC68HC16 Microcontroller
EM_68HC11 = 70, // Motorola MC68HC11 Microcontroller
EM_68HC08 = 71, // Motorola MC68HC08 Microcontroller
EM_68HC05 = 72, // Motorola MC68HC05 Microcontroller
EM_SVX = 73, // Silicon Graphics SVx
EM_ST19 = 74, // STMicroelectronics ST19 8-bit microcontroller
EM_VAX = 75, // Digital VAX
EM_CRIS = 76, // Axis Communications 32-bit embedded processor
EM_JAVELIN = 77, // Infineon Technologies 32-bit embedded processor
EM_FIREPATH = 78, // Element 14 64-bit DSP Processor
EM_ZSP = 79, // LSI Logic 16-bit DSP Processor
EM_MMIX = 80, // Donald Knuth's educational 64-bit processor
EM_HUANY = 81, // Harvard University machine-independent object files
EM_PRISM = 82, // SiTera Prism
EM_AVR = 83, // Atmel AVR 8-bit microcontroller
EM_FR30 = 84, // Fujitsu FR30
EM_D10V = 85, // Mitsubishi D10V
EM_D30V = 86, // Mitsubishi D30V
EM_V850 = 87, // NEC v850
EM_M32R = 88, // Mitsubishi M32R
EM_MN10300 = 89, // Matsushita MN10300
EM_MN10200 = 90, // Matsushita MN10200
EM_PJ = 91, // picoJava
EM_OPENRISC = 92, // OpenRISC 32-bit embedded processor
EM_ARC_COMPACT = 93, // ARC International ARCompact processor (old
// spelling/synonym: EM_ARC_A5)
EM_XTENSA = 94, // Tensilica Xtensa Architecture
EM_VIDEOCORE = 95, // Alphamosaic VideoCore processor
EM_TMM_GPP = 96, // Thompson Multimedia General Purpose Processor
EM_NS32K = 97, // National Semiconductor 32000 series
EM_TPC = 98, // Tenor Network TPC processor
EM_SNP1K = 99, // Trebia SNP 1000 processor
EM_ST200 = 100, // STMicroelectronics (www.st.com) ST200
EM_IP2K = 101, // Ubicom IP2xxx microcontroller family
EM_MAX = 102, // MAX Processor
EM_CR = 103, // National Semiconductor CompactRISC microprocessor
EM_F2MC16 = 104, // Fujitsu F2MC16
EM_MSP430 = 105, // Texas Instruments embedded microcontroller msp430
EM_BLACKFIN = 106, // Analog Devices Blackfin (DSP) processor
EM_SE_C33 = 107, // S1C33 Family of Seiko Epson processors
EM_SEP = 108, // Sharp embedded microprocessor
EM_ARCA = 109, // Arca RISC Microprocessor
EM_UNICORE = 110, // Microprocessor series from PKU-Unity Ltd. and MPRC
// of Peking University
EM_EXCESS = 111, // eXcess: 16/32/64-bit configurable embedded CPU
EM_DXP = 112, // Icera Semiconductor Inc. Deep Execution Processor
EM_ALTERA_NIOS2 = 113, // Altera Nios II soft-core processor
EM_CRX = 114, // National Semiconductor CompactRISC CRX
EM_XGATE = 115, // Motorola XGATE embedded processor
EM_C166 = 116, // Infineon C16x/XC16x processor
EM_M16C = 117, // Renesas M16C series microprocessors
EM_DSPIC30F = 118, // Microchip Technology dsPIC30F Digital Signal
// Controller
EM_CE = 119, // Freescale Communication Engine RISC core
EM_M32C = 120, // Renesas M32C series microprocessors
EM_TSK3000 = 131, // Altium TSK3000 core
EM_RS08 = 132, // Freescale RS08 embedded processor
EM_SHARC = 133, // Analog Devices SHARC family of 32-bit DSP
// processors
EM_ECOG2 = 134, // Cyan Technology eCOG2 microprocessor
EM_SCORE7 = 135, // Sunplus S+core7 RISC processor
EM_DSP24 = 136, // New Japan Radio (NJR) 24-bit DSP Processor
EM_VIDEOCORE3 = 137, // Broadcom VideoCore III processor
EM_LATTICEMICO32 = 138, // RISC processor for Lattice FPGA architecture
EM_SE_C17 = 139, // Seiko Epson C17 family
EM_TI_C6000 = 140, // The Texas Instruments TMS320C6000 DSP family
EM_TI_C2000 = 141, // The Texas Instruments TMS320C2000 DSP family
EM_TI_C5500 = 142, // The Texas Instruments TMS320C55x DSP family
EM_MMDSP_PLUS = 160, // STMicroelectronics 64bit VLIW Data Signal Processor
EM_CYPRESS_M8C = 161, // Cypress M8C microprocessor
EM_R32C = 162, // Renesas R32C series microprocessors
EM_TRIMEDIA = 163, // NXP Semiconductors TriMedia architecture family
EM_HEXAGON = 164, // Qualcomm Hexagon processor
EM_8051 = 165, // Intel 8051 and variants
EM_STXP7X = 166, // STMicroelectronics STxP7x family of configurable
// and extensible RISC processors
EM_NDS32 = 167, // Andes Technology compact code size embedded RISC
// processor family
EM_ECOG1 = 168, // Cyan Technology eCOG1X family
EM_ECOG1X = 168, // Cyan Technology eCOG1X family
EM_MAXQ30 = 169, // Dallas Semiconductor MAXQ30 Core Micro-controllers
EM_XIMO16 = 170, // New Japan Radio (NJR) 16-bit DSP Processor
EM_MANIK = 171, // M2000 Reconfigurable RISC Microprocessor
EM_CRAYNV2 = 172, // Cray Inc. NV2 vector architecture
EM_RX = 173, // Renesas RX family
EM_METAG = 174, // Imagination Technologies META processor
// architecture
EM_MCST_ELBRUS = 175, // MCST Elbrus general purpose hardware architecture
EM_ECOG16 = 176, // Cyan Technology eCOG16 family
EM_CR16 = 177, // National Semiconductor CompactRISC CR16 16-bit
// microprocessor
EM_ETPU = 178, // Freescale Extended Time Processing Unit
EM_SLE9X = 179, // Infineon Technologies SLE9X core
EM_L10M = 180, // Intel L10M
EM_K10M = 181, // Intel K10M
EM_AARCH64 = 183, // ARM AArch64
EM_AVR32 = 185, // Atmel Corporation 32-bit microprocessor family
EM_STM8 = 186, // STMicroeletronics STM8 8-bit microcontroller
EM_TILE64 = 187, // Tilera TILE64 multicore architecture family
EM_TILEPRO = 188, // Tilera TILEPro multicore architecture family
EM_MICROBLAZE = 189, // Xilinx MicroBlaze 32-bit RISC soft processor core
EM_CUDA = 190, // NVIDIA CUDA architecture
EM_TILEGX = 191, // Tilera TILE-Gx multicore architecture family
EM_CLOUDSHIELD = 192, // CloudShield architecture family
EM_COREA_1ST = 193, // KIPO-KAIST Core-A 1st generation processor family
EM_COREA_2ND = 194, // KIPO-KAIST Core-A 2nd generation processor family
EM_ARC_COMPACT2 = 195, // Synopsys ARCompact V2
EM_OPEN8 = 196, // Open8 8-bit RISC soft processor core
EM_RL78 = 197, // Renesas RL78 family
EM_VIDEOCORE5 = 198, // Broadcom VideoCore V processor
EM_78KOR = 199, // Renesas 78KOR family
EM_56800EX = 200, // Freescale 56800EX Digital Signal Controller (DSC)
EM_BA1 = 201, // Beyond BA1 CPU architecture
EM_BA2 = 202, // Beyond BA2 CPU architecture
EM_XCORE = 203, // XMOS xCORE processor family
EM_MCHP_PIC = 204, // Microchip 8-bit PIC(r) family
EM_INTEL205 = 205, // Reserved by Intel
EM_INTEL206 = 206, // Reserved by Intel
EM_INTEL207 = 207, // Reserved by Intel
EM_INTEL208 = 208, // Reserved by Intel
EM_INTEL209 = 209, // Reserved by Intel
EM_KM32 = 210, // KM211 KM32 32-bit processor
EM_KMX32 = 211, // KM211 KMX32 32-bit processor
EM_KMX16 = 212, // KM211 KMX16 16-bit processor
EM_KMX8 = 213, // KM211 KMX8 8-bit processor
EM_KVARC = 214, // KM211 KVARC processor
EM_CDP = 215, // Paneve CDP architecture family
EM_COGE = 216, // Cognitive Smart Memory Processor
EM_COOL = 217, // iCelero CoolEngine
EM_NORC = 218, // Nanoradio Optimized RISC
EM_CSR_KALIMBA = 219, // CSR Kalimba architecture family
EM_AMDGPU = 224, // AMD GPU architecture
EM_RISCV = 243, // RISC-V
EM_LANAI = 244, // Lanai 32-bit processor
EM_BPF = 247, // Linux kernel bpf virtual machine
EM_VE = 251, // NEC SX-Aurora VE
EM_CSKY = 252, // C-SKY 32-bit processor
EM_LOONGARCH = 258, // LoongArch
};
// Object file classes.
enum {
ELFCLASSNONE = 0,
ELFCLASS32 = 1, // 32-bit object file
ELFCLASS64 = 2 // 64-bit object file
};
// Object file byte orderings.
enum {
ELFDATANONE = 0, // Invalid data encoding.
ELFDATA2LSB = 1, // Little-endian object file
ELFDATA2MSB = 2 // Big-endian object file
};
// OS ABI identification.
enum {
ELFOSABI_NONE = 0, // UNIX System V ABI
ELFOSABI_HPUX = 1, // HP-UX operating system
ELFOSABI_NETBSD = 2, // NetBSD
ELFOSABI_GNU = 3, // GNU/Linux
ELFOSABI_LINUX = 3, // Historical alias for ELFOSABI_GNU.
ELFOSABI_HURD = 4, // GNU/Hurd
ELFOSABI_SOLARIS = 6, // Solaris
ELFOSABI_AIX = 7, // AIX
ELFOSABI_IRIX = 8, // IRIX
ELFOSABI_FREEBSD = 9, // FreeBSD
ELFOSABI_TRU64 = 10, // TRU64 UNIX
ELFOSABI_MODESTO = 11, // Novell Modesto
ELFOSABI_OPENBSD = 12, // OpenBSD
ELFOSABI_OPENVMS = 13, // OpenVMS
ELFOSABI_NSK = 14, // Hewlett-Packard Non-Stop Kernel
ELFOSABI_AROS = 15, // AROS
ELFOSABI_FENIXOS = 16, // FenixOS
ELFOSABI_CLOUDABI = 17, // Nuxi CloudABI
ELFOSABI_FIRST_ARCH = 64, // First architecture-specific OS ABI
ELFOSABI_AMDGPU_HSA = 64, // AMD HSA runtime
ELFOSABI_AMDGPU_PAL = 65, // AMD PAL runtime
ELFOSABI_AMDGPU_MESA3D = 66, // AMD GCN GPUs (GFX6+) for MESA runtime
ELFOSABI_ARM = 97, // ARM
ELFOSABI_C6000_ELFABI = 64, // Bare-metal TMS320C6000
ELFOSABI_C6000_LINUX = 65, // Linux TMS320C6000
ELFOSABI_STANDALONE = 255, // Standalone (embedded) application
ELFOSABI_LAST_ARCH = 255 // Last Architecture-specific OS ABI
};
// AMDGPU OS ABI Version identification.
enum {
// ELFABIVERSION_AMDGPU_HSA_V1 does not exist because OS ABI identification
// was never defined for V1.
ELFABIVERSION_AMDGPU_HSA_V2 = 0,
ELFABIVERSION_AMDGPU_HSA_V3 = 1,
ELFABIVERSION_AMDGPU_HSA_V4 = 2,
ELFABIVERSION_AMDGPU_HSA_V5 = 3
};
#define ELF_RELOC(name, value) name = value,
// X86_64 relocations.
enum {
#include "ELFRelocs/x86_64.def"
};
// i386 relocations.
enum {
#include "ELFRelocs/i386.def"
};
// ELF Relocation types for PPC32
enum {
#include "ELFRelocs/PowerPC.def"
};
// Specific e_flags for PPC64
enum {
// e_flags bits specifying ABI:
// 1 for original ABI using function descriptors,
// 2 for revised ABI without function descriptors,
// 0 for unspecified or not using any features affected by the differences.
EF_PPC64_ABI = 3
};
// Special values for the st_other field in the symbol table entry for PPC64.
enum {
STO_PPC64_LOCAL_BIT = 5,
STO_PPC64_LOCAL_MASK = (7 << STO_PPC64_LOCAL_BIT)
};
static inline int64_t decodePPC64LocalEntryOffset(unsigned Other) {
unsigned Val = (Other & STO_PPC64_LOCAL_MASK) >> STO_PPC64_LOCAL_BIT;
return ((1 << Val) >> 2) << 2;
}
// ELF Relocation types for PPC64
enum {
#include "ELFRelocs/PowerPC64.def"
};
// ELF Relocation types for AArch64
enum {
#include "ELFRelocs/AArch64.def"
};
// Special values for the st_other field in the symbol table entry for AArch64.
enum {
// Symbol may follow different calling convention than base PCS.
STO_AARCH64_VARIANT_PCS = 0x80
};
// ARM Specific e_flags
enum : unsigned {
EF_ARM_SOFT_FLOAT = 0x00000200U, // Legacy pre EABI_VER5
EF_ARM_ABI_FLOAT_SOFT = 0x00000200U, // EABI_VER5
EF_ARM_VFP_FLOAT = 0x00000400U, // Legacy pre EABI_VER5
EF_ARM_ABI_FLOAT_HARD = 0x00000400U, // EABI_VER5
EF_ARM_BE8 = 0x00800000U,
EF_ARM_EABI_UNKNOWN = 0x00000000U,
EF_ARM_EABI_VER1 = 0x01000000U,
EF_ARM_EABI_VER2 = 0x02000000U,
EF_ARM_EABI_VER3 = 0x03000000U,
EF_ARM_EABI_VER4 = 0x04000000U,
EF_ARM_EABI_VER5 = 0x05000000U,
EF_ARM_EABIMASK = 0xFF000000U
};
// ELF Relocation types for ARM
enum {
#include "ELFRelocs/ARM.def"
};
// ARC Specific e_flags
enum : unsigned {
EF_ARC_MACH_MSK = 0x000000ff,
EF_ARC_OSABI_MSK = 0x00000f00,
E_ARC_MACH_ARC600 = 0x00000002,
E_ARC_MACH_ARC601 = 0x00000004,
E_ARC_MACH_ARC700 = 0x00000003,
EF_ARC_CPU_ARCV2EM = 0x00000005,
EF_ARC_CPU_ARCV2HS = 0x00000006,
E_ARC_OSABI_ORIG = 0x00000000,
E_ARC_OSABI_V2 = 0x00000200,
E_ARC_OSABI_V3 = 0x00000300,
E_ARC_OSABI_V4 = 0x00000400,
EF_ARC_PIC = 0x00000100
};
// ELF Relocation types for ARC
enum {
#include "ELFRelocs/ARC.def"
};
// AVR specific e_flags
enum : unsigned {
EF_AVR_ARCH_AVR1 = 1,
EF_AVR_ARCH_AVR2 = 2,
EF_AVR_ARCH_AVR25 = 25,
EF_AVR_ARCH_AVR3 = 3,
EF_AVR_ARCH_AVR31 = 31,
EF_AVR_ARCH_AVR35 = 35,
EF_AVR_ARCH_AVR4 = 4,
EF_AVR_ARCH_AVR5 = 5,
EF_AVR_ARCH_AVR51 = 51,
EF_AVR_ARCH_AVR6 = 6,
EF_AVR_ARCH_AVRTINY = 100,
EF_AVR_ARCH_XMEGA1 = 101,
EF_AVR_ARCH_XMEGA2 = 102,
EF_AVR_ARCH_XMEGA3 = 103,
EF_AVR_ARCH_XMEGA4 = 104,
EF_AVR_ARCH_XMEGA5 = 105,
EF_AVR_ARCH_XMEGA6 = 106,
EF_AVR_ARCH_XMEGA7 = 107,
EF_AVR_ARCH_MASK = 0x7f, // EF_AVR_ARCH_xxx selection mask
EF_AVR_LINKRELAX_PREPARED = 0x80, // The file is prepared for linker
// relaxation to be applied
};
// ELF Relocation types for AVR
enum {
#include "ELFRelocs/AVR.def"
};
// Mips Specific e_flags
enum : unsigned {
EF_MIPS_NOREORDER = 0x00000001, // Don't reorder instructions
EF_MIPS_PIC = 0x00000002, // Position independent code
EF_MIPS_CPIC = 0x00000004, // Call object with Position independent code
EF_MIPS_ABI2 = 0x00000020, // File uses N32 ABI
EF_MIPS_32BITMODE = 0x00000100, // Code compiled for a 64-bit machine
// in 32-bit mode
EF_MIPS_FP64 = 0x00000200, // Code compiled for a 32-bit machine
// but uses 64-bit FP registers
EF_MIPS_NAN2008 = 0x00000400, // Uses IEE 754-2008 NaN encoding
// ABI flags
EF_MIPS_ABI_O32 = 0x00001000, // This file follows the first MIPS 32 bit ABI
EF_MIPS_ABI_O64 = 0x00002000, // O32 ABI extended for 64-bit architecture.
EF_MIPS_ABI_EABI32 = 0x00003000, // EABI in 32 bit mode.
EF_MIPS_ABI_EABI64 = 0x00004000, // EABI in 64 bit mode.
EF_MIPS_ABI = 0x0000f000, // Mask for selecting EF_MIPS_ABI_ variant.
// MIPS machine variant
EF_MIPS_MACH_NONE = 0x00000000, // A standard MIPS implementation.
EF_MIPS_MACH_3900 = 0x00810000, // Toshiba R3900
EF_MIPS_MACH_4010 = 0x00820000, // LSI R4010
EF_MIPS_MACH_4100 = 0x00830000, // NEC VR4100
EF_MIPS_MACH_4650 = 0x00850000, // MIPS R4650
EF_MIPS_MACH_4120 = 0x00870000, // NEC VR4120
EF_MIPS_MACH_4111 = 0x00880000, // NEC VR4111/VR4181
EF_MIPS_MACH_SB1 = 0x008a0000, // Broadcom SB-1
EF_MIPS_MACH_OCTEON = 0x008b0000, // Cavium Networks Octeon
EF_MIPS_MACH_XLR = 0x008c0000, // RMI Xlr
EF_MIPS_MACH_OCTEON2 = 0x008d0000, // Cavium Networks Octeon2
EF_MIPS_MACH_OCTEON3 = 0x008e0000, // Cavium Networks Octeon3
EF_MIPS_MACH_5400 = 0x00910000, // NEC VR5400
EF_MIPS_MACH_5900 = 0x00920000, // MIPS R5900
EF_MIPS_MACH_5500 = 0x00980000, // NEC VR5500
EF_MIPS_MACH_9000 = 0x00990000, // Unknown
EF_MIPS_MACH_LS2E = 0x00a00000, // ST Microelectronics Loongson 2E
EF_MIPS_MACH_LS2F = 0x00a10000, // ST Microelectronics Loongson 2F
EF_MIPS_MACH_LS3A = 0x00a20000, // Loongson 3A
EF_MIPS_MACH = 0x00ff0000, // EF_MIPS_MACH_xxx selection mask
// ARCH_ASE
EF_MIPS_MICROMIPS = 0x02000000, // microMIPS
EF_MIPS_ARCH_ASE_M16 = 0x04000000, // Has Mips-16 ISA extensions
EF_MIPS_ARCH_ASE_MDMX = 0x08000000, // Has MDMX multimedia extensions
EF_MIPS_ARCH_ASE = 0x0f000000, // Mask for EF_MIPS_ARCH_ASE_xxx flags
// ARCH
EF_MIPS_ARCH_1 = 0x00000000, // MIPS1 instruction set
EF_MIPS_ARCH_2 = 0x10000000, // MIPS2 instruction set
EF_MIPS_ARCH_3 = 0x20000000, // MIPS3 instruction set
EF_MIPS_ARCH_4 = 0x30000000, // MIPS4 instruction set
EF_MIPS_ARCH_5 = 0x40000000, // MIPS5 instruction set
EF_MIPS_ARCH_32 = 0x50000000, // MIPS32 instruction set per linux not elf.h
EF_MIPS_ARCH_64 = 0x60000000, // MIPS64 instruction set per linux not elf.h
EF_MIPS_ARCH_32R2 = 0x70000000, // mips32r2, mips32r3, mips32r5
EF_MIPS_ARCH_64R2 = 0x80000000, // mips64r2, mips64r3, mips64r5
EF_MIPS_ARCH_32R6 = 0x90000000, // mips32r6
EF_MIPS_ARCH_64R6 = 0xa0000000, // mips64r6
EF_MIPS_ARCH = 0xf0000000 // Mask for applying EF_MIPS_ARCH_ variant
};
// MIPS-specific section indexes
enum {
SHN_MIPS_ACOMMON = 0xff00, // Common symbols which are defined and allocated
SHN_MIPS_TEXT = 0xff01, // Not ABI compliant
SHN_MIPS_DATA = 0xff02, // Not ABI compliant
SHN_MIPS_SCOMMON = 0xff03, // Common symbols for global data area
SHN_MIPS_SUNDEFINED = 0xff04 // Undefined symbols for global data area
};
// ELF Relocation types for Mips
enum {
#include "ELFRelocs/Mips.def"
};
// Special values for the st_other field in the symbol table entry for MIPS.
enum {
STO_MIPS_OPTIONAL = 0x04, // Symbol whose definition is optional
STO_MIPS_PLT = 0x08, // PLT entry related dynamic table record
STO_MIPS_PIC = 0x20, // PIC func in an object mixes PIC/non-PIC
STO_MIPS_MICROMIPS = 0x80, // MIPS Specific ISA for MicroMips
STO_MIPS_MIPS16 = 0xf0 // MIPS Specific ISA for Mips16
};
// .MIPS.options section descriptor kinds
enum {
ODK_NULL = 0, // Undefined
ODK_REGINFO = 1, // Register usage information
ODK_EXCEPTIONS = 2, // Exception processing options
ODK_PAD = 3, // Section padding options
ODK_HWPATCH = 4, // Hardware patches applied
ODK_FILL = 5, // Linker fill value
ODK_TAGS = 6, // Space for tool identification
ODK_HWAND = 7, // Hardware AND patches applied
ODK_HWOR = 8, // Hardware OR patches applied
ODK_GP_GROUP = 9, // GP group to use for text/data sections
ODK_IDENT = 10, // ID information
ODK_PAGESIZE = 11 // Page size information
};
// Hexagon-specific e_flags
enum {
// Object processor version flags, bits[11:0]
EF_HEXAGON_MACH_V2 = 0x00000001, // Hexagon V2
EF_HEXAGON_MACH_V3 = 0x00000002, // Hexagon V3
EF_HEXAGON_MACH_V4 = 0x00000003, // Hexagon V4
EF_HEXAGON_MACH_V5 = 0x00000004, // Hexagon V5
EF_HEXAGON_MACH_V55 = 0x00000005, // Hexagon V55
EF_HEXAGON_MACH_V60 = 0x00000060, // Hexagon V60
EF_HEXAGON_MACH_V62 = 0x00000062, // Hexagon V62
EF_HEXAGON_MACH_V65 = 0x00000065, // Hexagon V65
EF_HEXAGON_MACH_V66 = 0x00000066, // Hexagon V66
EF_HEXAGON_MACH_V67 = 0x00000067, // Hexagon V67
EF_HEXAGON_MACH_V67T = 0x00008067, // Hexagon V67T
EF_HEXAGON_MACH_V68 = 0x00000068, // Hexagon V68
EF_HEXAGON_MACH_V69 = 0x00000069, // Hexagon V69
EF_HEXAGON_MACH_V71 = 0x00000071, // Hexagon V71
EF_HEXAGON_MACH_V71T = 0x00008071, // Hexagon V71T
EF_HEXAGON_MACH_V73 = 0x00000073, // Hexagon V73
EF_HEXAGON_MACH = 0x000003ff, // Hexagon V..
// Highest ISA version flags
EF_HEXAGON_ISA_MACH = 0x00000000, // Same as specified in bits[11:0]
// of e_flags
EF_HEXAGON_ISA_V2 = 0x00000010, // Hexagon V2 ISA
EF_HEXAGON_ISA_V3 = 0x00000020, // Hexagon V3 ISA
EF_HEXAGON_ISA_V4 = 0x00000030, // Hexagon V4 ISA
EF_HEXAGON_ISA_V5 = 0x00000040, // Hexagon V5 ISA
EF_HEXAGON_ISA_V55 = 0x00000050, // Hexagon V55 ISA
EF_HEXAGON_ISA_V60 = 0x00000060, // Hexagon V60 ISA
EF_HEXAGON_ISA_V62 = 0x00000062, // Hexagon V62 ISA
EF_HEXAGON_ISA_V65 = 0x00000065, // Hexagon V65 ISA
EF_HEXAGON_ISA_V66 = 0x00000066, // Hexagon V66 ISA
EF_HEXAGON_ISA_V67 = 0x00000067, // Hexagon V67 ISA
EF_HEXAGON_ISA_V68 = 0x00000068, // Hexagon V68 ISA
EF_HEXAGON_ISA_V69 = 0x00000069, // Hexagon V69 ISA
EF_HEXAGON_ISA_V71 = 0x00000071, // Hexagon V71 ISA
EF_HEXAGON_ISA_V73 = 0x00000073, // Hexagon V73 ISA
EF_HEXAGON_ISA_V75 = 0x00000075, // Hexagon V75 ISA
EF_HEXAGON_ISA = 0x000003ff, // Hexagon V.. ISA
};
// Hexagon-specific section indexes for common small data
enum {
SHN_HEXAGON_SCOMMON = 0xff00, // Other access sizes
SHN_HEXAGON_SCOMMON_1 = 0xff01, // Byte-sized access
SHN_HEXAGON_SCOMMON_2 = 0xff02, // Half-word-sized access
SHN_HEXAGON_SCOMMON_4 = 0xff03, // Word-sized access
SHN_HEXAGON_SCOMMON_8 = 0xff04 // Double-word-size access
};
// ELF Relocation types for Hexagon
enum {
#include "ELFRelocs/Hexagon.def"
};
// ELF Relocation type for Lanai.
enum {
#include "ELFRelocs/Lanai.def"
};
// RISCV Specific e_flags
enum : unsigned {
EF_RISCV_RVC = 0x0001,
EF_RISCV_FLOAT_ABI = 0x0006,
EF_RISCV_FLOAT_ABI_SOFT = 0x0000,
EF_RISCV_FLOAT_ABI_SINGLE = 0x0002,
EF_RISCV_FLOAT_ABI_DOUBLE = 0x0004,
EF_RISCV_FLOAT_ABI_QUAD = 0x0006,
EF_RISCV_RVE = 0x0008,
EF_RISCV_TSO = 0x0010,
};
// ELF Relocation types for RISC-V
enum {
#include "ELFRelocs/RISCV.def"
};
enum {
// Symbol may follow different calling convention than the standard calling
// convention.
STO_RISCV_VARIANT_CC = 0x80
};
// ELF Relocation types for S390/zSeries
enum {
#include "ELFRelocs/SystemZ.def"
};
// ELF Relocation type for Sparc.
enum {
#include "ELFRelocs/Sparc.def"
};
// AMDGPU specific e_flags.
enum : unsigned {
// Processor selection mask for EF_AMDGPU_MACH_* values.
EF_AMDGPU_MACH = 0x0ff,
// Not specified processor.
EF_AMDGPU_MACH_NONE = 0x000,
// R600-based processors.
// Radeon HD 2000/3000 Series (R600).
EF_AMDGPU_MACH_R600_R600 = 0x001,
EF_AMDGPU_MACH_R600_R630 = 0x002,
EF_AMDGPU_MACH_R600_RS880 = 0x003,
EF_AMDGPU_MACH_R600_RV670 = 0x004,
// Radeon HD 4000 Series (R700).
EF_AMDGPU_MACH_R600_RV710 = 0x005,
EF_AMDGPU_MACH_R600_RV730 = 0x006,
EF_AMDGPU_MACH_R600_RV770 = 0x007,
// Radeon HD 5000 Series (Evergreen).
EF_AMDGPU_MACH_R600_CEDAR = 0x008,
EF_AMDGPU_MACH_R600_CYPRESS = 0x009,
EF_AMDGPU_MACH_R600_JUNIPER = 0x00a,
EF_AMDGPU_MACH_R600_REDWOOD = 0x00b,
EF_AMDGPU_MACH_R600_SUMO = 0x00c,
// Radeon HD 6000 Series (Northern Islands).
EF_AMDGPU_MACH_R600_BARTS = 0x00d,
EF_AMDGPU_MACH_R600_CAICOS = 0x00e,
EF_AMDGPU_MACH_R600_CAYMAN = 0x00f,
EF_AMDGPU_MACH_R600_TURKS = 0x010,
// Reserved for R600-based processors.
EF_AMDGPU_MACH_R600_RESERVED_FIRST = 0x011,
EF_AMDGPU_MACH_R600_RESERVED_LAST = 0x01f,
// First/last R600-based processors.
EF_AMDGPU_MACH_R600_FIRST = EF_AMDGPU_MACH_R600_R600,
EF_AMDGPU_MACH_R600_LAST = EF_AMDGPU_MACH_R600_TURKS,
// AMDGCN-based processors.
EF_AMDGPU_MACH_AMDGCN_GFX600 = 0x020,
EF_AMDGPU_MACH_AMDGCN_GFX601 = 0x021,
EF_AMDGPU_MACH_AMDGCN_GFX700 = 0x022,
EF_AMDGPU_MACH_AMDGCN_GFX701 = 0x023,
EF_AMDGPU_MACH_AMDGCN_GFX702 = 0x024,
EF_AMDGPU_MACH_AMDGCN_GFX703 = 0x025,
EF_AMDGPU_MACH_AMDGCN_GFX704 = 0x026,
EF_AMDGPU_MACH_AMDGCN_RESERVED_0X27 = 0x027,
EF_AMDGPU_MACH_AMDGCN_GFX801 = 0x028,
EF_AMDGPU_MACH_AMDGCN_GFX802 = 0x029,
EF_AMDGPU_MACH_AMDGCN_GFX803 = 0x02a,
EF_AMDGPU_MACH_AMDGCN_GFX810 = 0x02b,
EF_AMDGPU_MACH_AMDGCN_GFX900 = 0x02c,
EF_AMDGPU_MACH_AMDGCN_GFX902 = 0x02d,
EF_AMDGPU_MACH_AMDGCN_GFX904 = 0x02e,
EF_AMDGPU_MACH_AMDGCN_GFX906 = 0x02f,
EF_AMDGPU_MACH_AMDGCN_GFX908 = 0x030,
EF_AMDGPU_MACH_AMDGCN_GFX909 = 0x031,
EF_AMDGPU_MACH_AMDGCN_GFX90C = 0x032,
EF_AMDGPU_MACH_AMDGCN_GFX1010 = 0x033,
EF_AMDGPU_MACH_AMDGCN_GFX1011 = 0x034,
EF_AMDGPU_MACH_AMDGCN_GFX1012 = 0x035,
EF_AMDGPU_MACH_AMDGCN_GFX1030 = 0x036,
EF_AMDGPU_MACH_AMDGCN_GFX1031 = 0x037,
EF_AMDGPU_MACH_AMDGCN_GFX1032 = 0x038,
EF_AMDGPU_MACH_AMDGCN_GFX1033 = 0x039,
EF_AMDGPU_MACH_AMDGCN_GFX602 = 0x03a,
EF_AMDGPU_MACH_AMDGCN_GFX705 = 0x03b,
EF_AMDGPU_MACH_AMDGCN_GFX805 = 0x03c,
EF_AMDGPU_MACH_AMDGCN_GFX1035 = 0x03d,
EF_AMDGPU_MACH_AMDGCN_GFX1034 = 0x03e,
EF_AMDGPU_MACH_AMDGCN_GFX90A = 0x03f,
EF_AMDGPU_MACH_AMDGCN_GFX940 = 0x040,
EF_AMDGPU_MACH_AMDGCN_GFX1100 = 0x041,
EF_AMDGPU_MACH_AMDGCN_GFX1013 = 0x042,
EF_AMDGPU_MACH_AMDGCN_GFX1150 = 0x043,
EF_AMDGPU_MACH_AMDGCN_GFX1103 = 0x044,
EF_AMDGPU_MACH_AMDGCN_GFX1036 = 0x045,
EF_AMDGPU_MACH_AMDGCN_GFX1101 = 0x046,
EF_AMDGPU_MACH_AMDGCN_GFX1102 = 0x047,
EF_AMDGPU_MACH_AMDGCN_RESERVED_0X48 = 0x048,
EF_AMDGPU_MACH_AMDGCN_RESERVED_0X49 = 0x049,
EF_AMDGPU_MACH_AMDGCN_GFX1151 = 0x04a,
EF_AMDGPU_MACH_AMDGCN_GFX941 = 0x04b,
EF_AMDGPU_MACH_AMDGCN_GFX942 = 0x04c,
// First/last AMDGCN-based processors.
EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600,
EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX942,
// Indicates if the "xnack" target feature is enabled for all code contained
// in the object.
//
// Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V2.
EF_AMDGPU_FEATURE_XNACK_V2 = 0x01,
// Indicates if the trap handler is enabled for all code contained
// in the object.
//
// Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V2.
EF_AMDGPU_FEATURE_TRAP_HANDLER_V2 = 0x02,
// Indicates if the "xnack" target feature is enabled for all code contained
// in the object.
//
// Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V3.
EF_AMDGPU_FEATURE_XNACK_V3 = 0x100,
// Indicates if the "sramecc" target feature is enabled for all code
// contained in the object.
//
// Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V3.
EF_AMDGPU_FEATURE_SRAMECC_V3 = 0x200,
// XNACK selection mask for EF_AMDGPU_FEATURE_XNACK_* values.
//
// Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V4.
EF_AMDGPU_FEATURE_XNACK_V4 = 0x300,
// XNACK is not supported.
EF_AMDGPU_FEATURE_XNACK_UNSUPPORTED_V4 = 0x000,
// XNACK is any/default/unspecified.
EF_AMDGPU_FEATURE_XNACK_ANY_V4 = 0x100,
// XNACK is off.
EF_AMDGPU_FEATURE_XNACK_OFF_V4 = 0x200,
// XNACK is on.
EF_AMDGPU_FEATURE_XNACK_ON_V4 = 0x300,
// SRAMECC selection mask for EF_AMDGPU_FEATURE_SRAMECC_* values.
//
// Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V4.
EF_AMDGPU_FEATURE_SRAMECC_V4 = 0xc00,
// SRAMECC is not supported.
EF_AMDGPU_FEATURE_SRAMECC_UNSUPPORTED_V4 = 0x000,
// SRAMECC is any/default/unspecified.
EF_AMDGPU_FEATURE_SRAMECC_ANY_V4 = 0x400,
// SRAMECC is off.
EF_AMDGPU_FEATURE_SRAMECC_OFF_V4 = 0x800,
// SRAMECC is on.
EF_AMDGPU_FEATURE_SRAMECC_ON_V4 = 0xc00,
};
// ELF Relocation types for AMDGPU
enum {
#include "ELFRelocs/AMDGPU.def"
};
// ELF Relocation types for BPF
enum {
#include "ELFRelocs/BPF.def"
};
// ELF Relocation types for M68k
enum {
#include "ELFRelocs/M68k.def"
};
// MSP430 specific e_flags
enum : unsigned {
EF_MSP430_MACH_MSP430x11 = 11,
EF_MSP430_MACH_MSP430x11x1 = 110,
EF_MSP430_MACH_MSP430x12 = 12,
EF_MSP430_MACH_MSP430x13 = 13,
EF_MSP430_MACH_MSP430x14 = 14,
EF_MSP430_MACH_MSP430x15 = 15,
EF_MSP430_MACH_MSP430x16 = 16,
EF_MSP430_MACH_MSP430x20 = 20,
EF_MSP430_MACH_MSP430x22 = 22,
EF_MSP430_MACH_MSP430x23 = 23,
EF_MSP430_MACH_MSP430x24 = 24,
EF_MSP430_MACH_MSP430x26 = 26,
EF_MSP430_MACH_MSP430x31 = 31,
EF_MSP430_MACH_MSP430x32 = 32,
EF_MSP430_MACH_MSP430x33 = 33,
EF_MSP430_MACH_MSP430x41 = 41,
EF_MSP430_MACH_MSP430x42 = 42,
EF_MSP430_MACH_MSP430x43 = 43,
EF_MSP430_MACH_MSP430x44 = 44,
EF_MSP430_MACH_MSP430X = 45,
EF_MSP430_MACH_MSP430x46 = 46,
EF_MSP430_MACH_MSP430x47 = 47,
EF_MSP430_MACH_MSP430x54 = 54,
};
// ELF Relocation types for MSP430
enum {
#include "ELFRelocs/MSP430.def"
};
// ELF Relocation type for VE.
enum {
#include "ELFRelocs/VE.def"
};
// CSKY Specific e_flags
enum : unsigned {
EF_CSKY_801 = 0xa,
EF_CSKY_802 = 0x10,
EF_CSKY_803 = 0x9,
EF_CSKY_805 = 0x11,
EF_CSKY_807 = 0x6,
EF_CSKY_810 = 0x8,
EF_CSKY_860 = 0xb,
EF_CSKY_800 = 0x1f,
EF_CSKY_FLOAT = 0x2000,
EF_CSKY_DSP = 0x4000,
EF_CSKY_ABIV2 = 0x20000000,
EF_CSKY_EFV1 = 0x1000000,
EF_CSKY_EFV2 = 0x2000000,
EF_CSKY_EFV3 = 0x3000000
};
// ELF Relocation types for CSKY
enum {
#include "ELFRelocs/CSKY.def"
};
// LoongArch Specific e_flags
enum : unsigned {
// Definitions from LoongArch ELF psABI v2.01.
// Reference: https://github.com/loongson/LoongArch-Documentation
// (commit hash 296de4def055c871809068e0816325a4ac04eb12)
// Base ABI Modifiers
EF_LOONGARCH_ABI_SOFT_FLOAT = 0x1,
EF_LOONGARCH_ABI_SINGLE_FLOAT = 0x2,
EF_LOONGARCH_ABI_DOUBLE_FLOAT = 0x3,
EF_LOONGARCH_ABI_MODIFIER_MASK = 0x7,
// Object file ABI versions
EF_LOONGARCH_OBJABI_V0 = 0x0,
EF_LOONGARCH_OBJABI_V1 = 0x40,
EF_LOONGARCH_OBJABI_MASK = 0xC0,
};
// ELF Relocation types for LoongArch
enum {
#include "ELFRelocs/LoongArch.def"
};
// Xtensa specific e_flags
enum : unsigned {
// Four-bit Xtensa machine type mask.
EF_XTENSA_MACH = 0x0000000f,
// Various CPU types.
EF_XTENSA_MACH_NONE = 0x00000000, // A base Xtensa implementation
EF_XTENSA_XT_INSN = 0x00000100,
EF_XTENSA_XT_LIT = 0x00000200,
};
// ELF Relocation types for Xtensa
enum {
#include "ELFRelocs/Xtensa.def"
};
#undef ELF_RELOC
// Section header.
struct Elf32_Shdr {
Elf32_Word sh_name; // Section name (index into string table)
Elf32_Word sh_type; // Section type (SHT_*)
Elf32_Word sh_flags; // Section flags (SHF_*)
Elf32_Addr sh_addr; // Address where section is to be loaded
Elf32_Off sh_offset; // File offset of section data, in bytes
Elf32_Word sh_size; // Size of section, in bytes
Elf32_Word sh_link; // Section type-specific header table index link
Elf32_Word sh_info; // Section type-specific extra information
Elf32_Word sh_addralign; // Section address alignment
Elf32_Word sh_entsize; // Size of records contained within the section
};
// Section header for ELF64 - same fields as ELF32, different types.
struct Elf64_Shdr {
Elf64_Word sh_name;
Elf64_Word sh_type;
Elf64_Xword sh_flags;
Elf64_Addr sh_addr;
Elf64_Off sh_offset;
Elf64_Xword sh_size;
Elf64_Word sh_link;
Elf64_Word sh_info;
Elf64_Xword sh_addralign;
Elf64_Xword sh_entsize;
};
// Special section indices.
enum {
SHN_UNDEF = 0, // Undefined, missing, irrelevant, or meaningless
SHN_LORESERVE = 0xff00, // Lowest reserved index
SHN_LOPROC = 0xff00, // Lowest processor-specific index
SHN_HIPROC = 0xff1f, // Highest processor-specific index
SHN_LOOS = 0xff20, // Lowest operating system-specific index
SHN_HIOS = 0xff3f, // Highest operating system-specific index
SHN_ABS = 0xfff1, // Symbol has absolute value; does not need relocation
SHN_COMMON = 0xfff2, // FORTRAN COMMON or C external global variables
SHN_XINDEX = 0xffff, // Mark that the index is >= SHN_LORESERVE
SHN_HIRESERVE = 0xffff // Highest reserved index
};
// Section types.
enum : unsigned {
SHT_NULL = 0, // No associated section (inactive entry).
SHT_PROGBITS = 1, // Program-defined contents.
SHT_SYMTAB = 2, // Symbol table.
SHT_STRTAB = 3, // String table.
SHT_RELA = 4, // Relocation entries; explicit addends.
SHT_HASH = 5, // Symbol hash table.
SHT_DYNAMIC = 6, // Information for dynamic linking.
SHT_NOTE = 7, // Information about the file.
SHT_NOBITS = 8, // Data occupies no space in the file.
SHT_REL = 9, // Relocation entries; no explicit addends.
SHT_SHLIB = 10, // Reserved.
SHT_DYNSYM = 11, // Symbol table.
SHT_INIT_ARRAY = 14, // Pointers to initialization functions.
SHT_FINI_ARRAY = 15, // Pointers to termination functions.
SHT_PREINIT_ARRAY = 16, // Pointers to pre-init functions.
SHT_GROUP = 17, // Section group.
SHT_SYMTAB_SHNDX = 18, // Indices for SHN_XINDEX entries.
// Experimental support for SHT_RELR sections. For details, see proposal
// at https://groups.google.com/forum/#!topic/generic-abi/bX460iggiKg
SHT_RELR = 19, // Relocation entries; only offsets.
SHT_LOOS = 0x60000000, // Lowest operating system-specific type.
// Android packed relocation section types.
// https://android.googlesource.com/platform/bionic/+/6f12bfece5dcc01325e0abba56a46b1bcf991c69/tools/relocation_packer/src/elf_file.cc#37
SHT_ANDROID_REL = 0x60000001,
SHT_ANDROID_RELA = 0x60000002,
SHT_LLVM_ODRTAB = 0x6fff4c00, // LLVM ODR table.
SHT_LLVM_LINKER_OPTIONS = 0x6fff4c01, // LLVM Linker Options.
SHT_LLVM_ADDRSIG = 0x6fff4c03, // List of address-significant symbols
// for safe ICF.
SHT_LLVM_DEPENDENT_LIBRARIES =
0x6fff4c04, // LLVM Dependent Library Specifiers.
SHT_LLVM_SYMPART = 0x6fff4c05, // Symbol partition specification.
SHT_LLVM_PART_EHDR = 0x6fff4c06, // ELF header for loadable partition.
SHT_LLVM_PART_PHDR = 0x6fff4c07, // Phdrs for loadable partition.
SHT_LLVM_BB_ADDR_MAP_V0 =
0x6fff4c08, // LLVM Basic Block Address Map (old version kept for
// backward-compatibility).
SHT_LLVM_CALL_GRAPH_PROFILE = 0x6fff4c09, // LLVM Call Graph Profile.
SHT_LLVM_BB_ADDR_MAP = 0x6fff4c0a, // LLVM Basic Block Address Map.
SHT_LLVM_OFFLOADING = 0x6fff4c0b, // LLVM device offloading data.
SHT_LLVM_LTO = 0x6fff4c0c, // .llvm.lto for fat LTO.
// Android's experimental support for SHT_RELR sections.
// https://android.googlesource.com/platform/bionic/+/b7feec74547f84559a1467aca02708ff61346d2a/libc/include/elf.h#512
SHT_ANDROID_RELR = 0x6fffff00, // Relocation entries; only offsets.
SHT_GNU_ATTRIBUTES = 0x6ffffff5, // Object attributes.
SHT_GNU_HASH = 0x6ffffff6, // GNU-style hash table.
SHT_GNU_verdef = 0x6ffffffd, // GNU version definitions.
SHT_GNU_verneed = 0x6ffffffe, // GNU version references.
SHT_GNU_versym = 0x6fffffff, // GNU symbol versions table.
SHT_HIOS = 0x6fffffff, // Highest operating system-specific type.
SHT_LOPROC = 0x70000000, // Lowest processor arch-specific type.
// Fixme: All this is duplicated in MCSectionELF. Why??
// Exception Index table
SHT_ARM_EXIDX = 0x70000001U,
// BPABI DLL dynamic linking pre-emption map
SHT_ARM_PREEMPTMAP = 0x70000002U,
// Object file compatibility attributes
SHT_ARM_ATTRIBUTES = 0x70000003U,
SHT_ARM_DEBUGOVERLAY = 0x70000004U,
SHT_ARM_OVERLAYSECTION = 0x70000005U,
// Special aarch64-specific sections for MTE support, as described in:
// https://github.com/ARM-software/abi-aa/blob/main/memtagabielf64/memtagabielf64.rst#7section-types
SHT_AARCH64_MEMTAG_GLOBALS_STATIC = 0x70000007U,
SHT_AARCH64_MEMTAG_GLOBALS_DYNAMIC = 0x70000008U,
SHT_HEX_ORDERED = 0x70000000, // Link editor is to sort the entries in
// this section based on their sizes
SHT_X86_64_UNWIND = 0x70000001, // Unwind information
SHT_MIPS_REGINFO = 0x70000006, // Register usage information
SHT_MIPS_OPTIONS = 0x7000000d, // General options
SHT_MIPS_DWARF = 0x7000001e, // DWARF debugging section.
SHT_MIPS_ABIFLAGS = 0x7000002a, // ABI information.
SHT_MSP430_ATTRIBUTES = 0x70000003U,
SHT_RISCV_ATTRIBUTES = 0x70000003U,
SHT_CSKY_ATTRIBUTES = 0x70000001U,
SHT_HIPROC = 0x7fffffff, // Highest processor arch-specific type.
SHT_LOUSER = 0x80000000, // Lowest type reserved for applications.
SHT_HIUSER = 0xffffffff // Highest type reserved for applications.
};
// Section flags.
enum : unsigned {
// Section data should be writable during execution.
SHF_WRITE = 0x1,
// Section occupies memory during program execution.
SHF_ALLOC = 0x2,
// Section contains executable machine instructions.
SHF_EXECINSTR = 0x4,
// The data in this section may be merged.
SHF_MERGE = 0x10,
// The data in this section is null-terminated strings.
SHF_STRINGS = 0x20,
// A field in this section holds a section header table index.
SHF_INFO_LINK = 0x40U,
// Adds special ordering requirements for link editors.
SHF_LINK_ORDER = 0x80U,
// This section requires special OS-specific processing to avoid incorrect
// behavior.
SHF_OS_NONCONFORMING = 0x100U,
// This section is a member of a section group.
SHF_GROUP = 0x200U,
// This section holds Thread-Local Storage.
SHF_TLS = 0x400U,
// Identifies a section containing compressed data.
SHF_COMPRESSED = 0x800U,
// This section should not be garbage collected by the linker.
SHF_GNU_RETAIN = 0x200000,
// This section is excluded from the final executable or shared library.
SHF_EXCLUDE = 0x80000000U,
// Start of target-specific flags.
SHF_MASKOS = 0x0ff00000,
// Solaris equivalent of SHF_GNU_RETAIN.
SHF_SUNW_NODISCARD = 0x00100000,
// Bits indicating processor-specific flags.
SHF_MASKPROC = 0xf0000000,
/// All sections with the "d" flag are grouped together by the linker to form
/// the data section and the dp register is set to the start of the section by
/// the boot code.
XCORE_SHF_DP_SECTION = 0x10000000,
/// All sections with the "c" flag are grouped together by the linker to form
/// the constant pool and the cp register is set to the start of the constant
/// pool by the boot code.
XCORE_SHF_CP_SECTION = 0x20000000,
// If an object file section does not have this flag set, then it may not hold
// more than 2GB and can be freely referred to in objects using smaller code
// models. Otherwise, only objects using larger code models can refer to them.
// For example, a medium code model object can refer to data in a section that
// sets this flag besides being able to refer to data in a section that does
// not set it; likewise, a small code model object can refer only to code in a
// section that does not set this flag.
SHF_X86_64_LARGE = 0x10000000,
// All sections with the GPREL flag are grouped into a global data area
// for faster accesses
SHF_HEX_GPREL = 0x10000000,
// Section contains text/data which may be replicated in other sections.
// Linker must retain only one copy.
SHF_MIPS_NODUPES = 0x01000000,
// Linker must generate implicit hidden weak names.
SHF_MIPS_NAMES = 0x02000000,
// Section data local to process.
SHF_MIPS_LOCAL = 0x04000000,
// Do not strip this section.
SHF_MIPS_NOSTRIP = 0x08000000,
// Section must be part of global data area.
SHF_MIPS_GPREL = 0x10000000,
// This section should be merged.
SHF_MIPS_MERGE = 0x20000000,
// Address size to be inferred from section entry size.
SHF_MIPS_ADDR = 0x40000000,
// Section data is string data by default.
SHF_MIPS_STRING = 0x80000000,
// Make code section unreadable when in execute-only mode
SHF_ARM_PURECODE = 0x20000000
};
// Section Group Flags
enum : unsigned {
GRP_COMDAT = 0x1,
GRP_MASKOS = 0x0ff00000,
GRP_MASKPROC = 0xf0000000
};
// Symbol table entries for ELF32.
struct Elf32_Sym {
Elf32_Word st_name; // Symbol name (index into string table)
Elf32_Addr st_value; // Value or address associated with the symbol
Elf32_Word st_size; // Size of the symbol
unsigned char st_info; // Symbol's type and binding attributes
unsigned char st_other; // Must be zero; reserved
Elf32_Half st_shndx; // Which section (header table index) it's defined in
// These accessors and mutators correspond to the ELF32_ST_BIND,
// ELF32_ST_TYPE, and ELF32_ST_INFO macros defined in the ELF specification:
unsigned char getBinding() const { return st_info >> 4; }
unsigned char getType() const { return st_info & 0x0f; }
void setBinding(unsigned char b) { setBindingAndType(b, getType()); }
void setType(unsigned char t) { setBindingAndType(getBinding(), t); }
void setBindingAndType(unsigned char b, unsigned char t) {
st_info = (b << 4) + (t & 0x0f);
}
};
// Symbol table entries for ELF64.
struct Elf64_Sym {
Elf64_Word st_name; // Symbol name (index into string table)
unsigned char st_info; // Symbol's type and binding attributes
unsigned char st_other; // Must be zero; reserved
Elf64_Half st_shndx; // Which section (header tbl index) it's defined in
Elf64_Addr st_value; // Value or address associated with the symbol
Elf64_Xword st_size; // Size of the symbol
// These accessors and mutators are identical to those defined for ELF32
// symbol table entries.
unsigned char getBinding() const { return st_info >> 4; }
unsigned char getType() const { return st_info & 0x0f; }
void setBinding(unsigned char b) { setBindingAndType(b, getType()); }
void setType(unsigned char t) { setBindingAndType(getBinding(), t); }
void setBindingAndType(unsigned char b, unsigned char t) {
st_info = (b << 4) + (t & 0x0f);
}
};
// The size (in bytes) of symbol table entries.
enum {
SYMENTRY_SIZE32 = 16, // 32-bit symbol entry size
SYMENTRY_SIZE64 = 24 // 64-bit symbol entry size.
};
// Symbol bindings.
enum {
STB_LOCAL = 0, // Local symbol, not visible outside obj file containing def
STB_GLOBAL = 1, // Global symbol, visible to all object files being combined
STB_WEAK = 2, // Weak symbol, like global but lower-precedence
STB_GNU_UNIQUE = 10,
STB_LOOS = 10, // Lowest operating system-specific binding type
STB_HIOS = 12, // Highest operating system-specific binding type
STB_LOPROC = 13, // Lowest processor-specific binding type
STB_HIPROC = 15 // Highest processor-specific binding type
};
// Symbol types.
enum {
STT_NOTYPE = 0, // Symbol's type is not specified
STT_OBJECT = 1, // Symbol is a data object (variable, array, etc.)
STT_FUNC = 2, // Symbol is executable code (function, etc.)
STT_SECTION = 3, // Symbol refers to a section
STT_FILE = 4, // Local, absolute symbol that refers to a file
STT_COMMON = 5, // An uninitialized common block
STT_TLS = 6, // Thread local data object
STT_GNU_IFUNC = 10, // GNU indirect function
STT_LOOS = 10, // Lowest operating system-specific symbol type
STT_HIOS = 12, // Highest operating system-specific symbol type
STT_LOPROC = 13, // Lowest processor-specific symbol type
STT_HIPROC = 15, // Highest processor-specific symbol type
// AMDGPU symbol types
STT_AMDGPU_HSA_KERNEL = 10
};
enum {
STV_DEFAULT = 0, // Visibility is specified by binding type
STV_INTERNAL = 1, // Defined by processor supplements
STV_HIDDEN = 2, // Not visible to other components
STV_PROTECTED = 3 // Visible in other components but not preemptable
};
// Symbol number.
enum { STN_UNDEF = 0 };
// Special relocation symbols used in the MIPS64 ELF relocation entries
enum {
RSS_UNDEF = 0, // None
RSS_GP = 1, // Value of gp
RSS_GP0 = 2, // Value of gp used to create object being relocated
RSS_LOC = 3 // Address of location being relocated
};
// Relocation entry, without explicit addend.
struct Elf32_Rel {
Elf32_Addr r_offset; // Location (file byte offset, or program virtual addr)
Elf32_Word r_info; // Symbol table index and type of relocation to apply
// These accessors and mutators correspond to the ELF32_R_SYM, ELF32_R_TYPE,
// and ELF32_R_INFO macros defined in the ELF specification:
Elf32_Word getSymbol() const { return (r_info >> 8); }
unsigned char getType() const { return (unsigned char)(r_info & 0x0ff); }
void setSymbol(Elf32_Word s) { setSymbolAndType(s, getType()); }
void setType(unsigned char t) { setSymbolAndType(getSymbol(), t); }
void setSymbolAndType(Elf32_Word s, unsigned char t) {
r_info = (s << 8) + t;
}
};
// Relocation entry with explicit addend.
struct Elf32_Rela {
Elf32_Addr r_offset; // Location (file byte offset, or program virtual addr)
Elf32_Word r_info; // Symbol table index and type of relocation to apply
Elf32_Sword r_addend; // Compute value for relocatable field by adding this
// These accessors and mutators correspond to the ELF32_R_SYM, ELF32_R_TYPE,
// and ELF32_R_INFO macros defined in the ELF specification:
Elf32_Word getSymbol() const { return (r_info >> 8); }
unsigned char getType() const { return (unsigned char)(r_info & 0x0ff); }
void setSymbol(Elf32_Word s) { setSymbolAndType(s, getType()); }
void setType(unsigned char t) { setSymbolAndType(getSymbol(), t); }
void setSymbolAndType(Elf32_Word s, unsigned char t) {
r_info = (s << 8) + t;
}
};
// Relocation entry without explicit addend or info (relative relocations only).
typedef Elf32_Word Elf32_Relr; // offset/bitmap for relative relocations
// Relocation entry, without explicit addend.
struct Elf64_Rel {
Elf64_Addr r_offset; // Location (file byte offset, or program virtual addr).
Elf64_Xword r_info; // Symbol table index and type of relocation to apply.
// These accessors and mutators correspond to the ELF64_R_SYM, ELF64_R_TYPE,
// and ELF64_R_INFO macros defined in the ELF specification:
Elf64_Word getSymbol() const { return (r_info >> 32); }
Elf64_Word getType() const { return (Elf64_Word)(r_info & 0xffffffffL); }
void setSymbol(Elf64_Word s) { setSymbolAndType(s, getType()); }
void setType(Elf64_Word t) { setSymbolAndType(getSymbol(), t); }
void setSymbolAndType(Elf64_Word s, Elf64_Word t) {
r_info = ((Elf64_Xword)s << 32) + (t & 0xffffffffL);
}
};
// Relocation entry with explicit addend.
struct Elf64_Rela {
Elf64_Addr r_offset; // Location (file byte offset, or program virtual addr).
Elf64_Xword r_info; // Symbol table index and type of relocation to apply.
Elf64_Sxword r_addend; // Compute value for relocatable field by adding this.
// These accessors and mutators correspond to the ELF64_R_SYM, ELF64_R_TYPE,
// and ELF64_R_INFO macros defined in the ELF specification:
Elf64_Word getSymbol() const { return (r_info >> 32); }
Elf64_Word getType() const { return (Elf64_Word)(r_info & 0xffffffffL); }
void setSymbol(Elf64_Word s) { setSymbolAndType(s, getType()); }
void setType(Elf64_Word t) { setSymbolAndType(getSymbol(), t); }
void setSymbolAndType(Elf64_Word s, Elf64_Word t) {
r_info = ((Elf64_Xword)s << 32) + (t & 0xffffffffL);
}
};
// Relocation entry without explicit addend or info (relative relocations only).
typedef Elf64_Xword Elf64_Relr; // offset/bitmap for relative relocations
// Program header for ELF32.
struct Elf32_Phdr {
Elf32_Word p_type; // Type of segment
Elf32_Off p_offset; // File offset where segment is located, in bytes
Elf32_Addr p_vaddr; // Virtual address of beginning of segment
Elf32_Addr p_paddr; // Physical address of beginning of segment (OS-specific)
Elf32_Word p_filesz; // Num. of bytes in file image of segment (may be zero)
Elf32_Word p_memsz; // Num. of bytes in mem image of segment (may be zero)
Elf32_Word p_flags; // Segment flags
Elf32_Word p_align; // Segment alignment constraint
};
// Program header for ELF64.
struct Elf64_Phdr {
Elf64_Word p_type; // Type of segment
Elf64_Word p_flags; // Segment flags
Elf64_Off p_offset; // File offset where segment is located, in bytes
Elf64_Addr p_vaddr; // Virtual address of beginning of segment
Elf64_Addr p_paddr; // Physical addr of beginning of segment (OS-specific)
Elf64_Xword p_filesz; // Num. of bytes in file image of segment (may be zero)
Elf64_Xword p_memsz; // Num. of bytes in mem image of segment (may be zero)
Elf64_Xword p_align; // Segment alignment constraint
};
// Segment types.
enum {
PT_NULL = 0, // Unused segment.
PT_LOAD = 1, // Loadable segment.
PT_DYNAMIC = 2, // Dynamic linking information.
PT_INTERP = 3, // Interpreter pathname.
PT_NOTE = 4, // Auxiliary information.
PT_SHLIB = 5, // Reserved.
PT_PHDR = 6, // The program header table itself.
PT_TLS = 7, // The thread-local storage template.
PT_LOOS = 0x60000000, // Lowest operating system-specific pt entry type.
PT_HIOS = 0x6fffffff, // Highest operating system-specific pt entry type.
PT_LOPROC = 0x70000000, // Lowest processor-specific program hdr entry type.
PT_HIPROC = 0x7fffffff, // Highest processor-specific program hdr entry type.
// x86-64 program header types.
// These all contain stack unwind tables.
PT_GNU_EH_FRAME = 0x6474e550,
PT_SUNW_EH_FRAME = 0x6474e550,
PT_SUNW_UNWIND = 0x6464e550,
PT_GNU_STACK = 0x6474e551, // Indicates stack executability.
PT_GNU_RELRO = 0x6474e552, // Read-only after relocation.
PT_GNU_PROPERTY = 0x6474e553, // .note.gnu.property notes sections.
PT_OPENBSD_MUTABLE = 0x65a3dbe5, // Like bss, but not immutable.
PT_OPENBSD_RANDOMIZE = 0x65a3dbe6, // Fill with random data.
PT_OPENBSD_WXNEEDED = 0x65a3dbe7, // Program does W^X violations.
PT_OPENBSD_NOBTCFI = 0x65a3dbe8, // Do not enforce branch target CFI.
PT_OPENBSD_BOOTDATA = 0x65a41be6, // Section for boot arguments.
// ARM program header types.
PT_ARM_ARCHEXT = 0x70000000, // Platform architecture compatibility info
// These all contain stack unwind tables.
PT_ARM_EXIDX = 0x70000001,
PT_ARM_UNWIND = 0x70000001,
// MTE memory tag segment type
PT_AARCH64_MEMTAG_MTE = 0x70000002,
// MIPS program header types.
PT_MIPS_REGINFO = 0x70000000, // Register usage information.
PT_MIPS_RTPROC = 0x70000001, // Runtime procedure table.
PT_MIPS_OPTIONS = 0x70000002, // Options segment.
PT_MIPS_ABIFLAGS = 0x70000003, // Abiflags segment.
// RISCV program header types.
PT_RISCV_ATTRIBUTES = 0x70000003,
};
// Segment flag bits.
enum : unsigned {
PF_X = 1, // Execute
PF_W = 2, // Write
PF_R = 4, // Read
PF_MASKOS = 0x0ff00000, // Bits for operating system-specific semantics.
PF_MASKPROC = 0xf0000000 // Bits for processor-specific semantics.
};
// Dynamic table entry for ELF32.
struct Elf32_Dyn {
Elf32_Sword d_tag; // Type of dynamic table entry.
union {
Elf32_Word d_val; // Integer value of entry.
Elf32_Addr d_ptr; // Pointer value of entry.
} d_un;
};
// Dynamic table entry for ELF64.
struct Elf64_Dyn {
Elf64_Sxword d_tag; // Type of dynamic table entry.
union {
Elf64_Xword d_val; // Integer value of entry.
Elf64_Addr d_ptr; // Pointer value of entry.
} d_un;
};
// Dynamic table entry tags.
enum {
#define DYNAMIC_TAG(name, value) DT_##name = value,
#include "DynamicTags.def"
#undef DYNAMIC_TAG
};
// DT_FLAGS values.
enum {
DF_ORIGIN = 0x01, // The object may reference $ORIGIN.
DF_SYMBOLIC = 0x02, // Search the shared lib before searching the exe.
DF_TEXTREL = 0x04, // Relocations may modify a non-writable segment.
DF_BIND_NOW = 0x08, // Process all relocations on load.
DF_STATIC_TLS = 0x10 // Reject attempts to load dynamically.
};
// State flags selectable in the `d_un.d_val' element of the DT_FLAGS_1 entry.
enum {
DF_1_NOW = 0x00000001, // Set RTLD_NOW for this object.
DF_1_GLOBAL = 0x00000002, // Set RTLD_GLOBAL for this object.
DF_1_GROUP = 0x00000004, // Set RTLD_GROUP for this object.
DF_1_NODELETE = 0x00000008, // Set RTLD_NODELETE for this object.
DF_1_LOADFLTR = 0x00000010, // Trigger filtee loading at runtime.
DF_1_INITFIRST = 0x00000020, // Set RTLD_INITFIRST for this object.
DF_1_NOOPEN = 0x00000040, // Set RTLD_NOOPEN for this object.
DF_1_ORIGIN = 0x00000080, // $ORIGIN must be handled.
DF_1_DIRECT = 0x00000100, // Direct binding enabled.
DF_1_TRANS = 0x00000200,
DF_1_INTERPOSE = 0x00000400, // Object is used to interpose.
DF_1_NODEFLIB = 0x00000800, // Ignore default lib search path.
DF_1_NODUMP = 0x00001000, // Object can't be dldump'ed.
DF_1_CONFALT = 0x00002000, // Configuration alternative created.
DF_1_ENDFILTEE = 0x00004000, // Filtee terminates filters search.
DF_1_DISPRELDNE = 0x00008000, // Disp reloc applied at build time.
DF_1_DISPRELPND = 0x00010000, // Disp reloc applied at run-time.
DF_1_NODIRECT = 0x00020000, // Object has no-direct binding.
DF_1_IGNMULDEF = 0x00040000,
DF_1_NOKSYMS = 0x00080000,
DF_1_NOHDR = 0x00100000,
DF_1_EDITED = 0x00200000, // Object is modified after built.
DF_1_NORELOC = 0x00400000,
DF_1_SYMINTPOSE = 0x00800000, // Object has individual interposers.
DF_1_GLOBAUDIT = 0x01000000, // Global auditing required.
DF_1_SINGLETON = 0x02000000, // Singleton symbols are used.
DF_1_PIE = 0x08000000, // Object is a position-independent executable.
};
// DT_MIPS_FLAGS values.
enum {
RHF_NONE = 0x00000000, // No flags.
RHF_QUICKSTART = 0x00000001, // Uses shortcut pointers.
RHF_NOTPOT = 0x00000002, // Hash size is not a power of two.
RHS_NO_LIBRARY_REPLACEMENT = 0x00000004, // Ignore LD_LIBRARY_PATH.
RHF_NO_MOVE = 0x00000008, // DSO address may not be relocated.
RHF_SGI_ONLY = 0x00000010, // SGI specific features.
RHF_GUARANTEE_INIT = 0x00000020, // Guarantee that .init will finish
// executing before any non-init
// code in DSO is called.
RHF_DELTA_C_PLUS_PLUS = 0x00000040, // Contains Delta C++ code.
RHF_GUARANTEE_START_INIT = 0x00000080, // Guarantee that .init will start
// executing before any non-init
// code in DSO is called.
RHF_PIXIE = 0x00000100, // Generated by pixie.
RHF_DEFAULT_DELAY_LOAD = 0x00000200, // Delay-load DSO by default.
RHF_REQUICKSTART = 0x00000400, // Object may be requickstarted
RHF_REQUICKSTARTED = 0x00000800, // Object has been requickstarted
RHF_CORD = 0x00001000, // Generated by cord.
RHF_NO_UNRES_UNDEF = 0x00002000, // Object contains no unresolved
// undef symbols.
RHF_RLD_ORDER_SAFE = 0x00004000 // Symbol table is in a safe order.
};
// ElfXX_VerDef structure version (GNU versioning)
enum { VER_DEF_NONE = 0, VER_DEF_CURRENT = 1 };
// VerDef Flags (ElfXX_VerDef::vd_flags)
enum { VER_FLG_BASE = 0x1, VER_FLG_WEAK = 0x2, VER_FLG_INFO = 0x4 };
// Special constants for the version table. (SHT_GNU_versym/.gnu.version)
enum {
VER_NDX_LOCAL = 0, // Unversioned local symbol
VER_NDX_GLOBAL = 1, // Unversioned global symbol
VERSYM_VERSION = 0x7fff, // Version Index mask
VERSYM_HIDDEN = 0x8000 // Hidden bit (non-default version)
};
// ElfXX_VerNeed structure version (GNU versioning)
enum { VER_NEED_NONE = 0, VER_NEED_CURRENT = 1 };
// SHT_NOTE section types.
// Generic note types.
enum : unsigned {
NT_VERSION = 1,
NT_ARCH = 2,
NT_GNU_BUILD_ATTRIBUTE_OPEN = 0x100,
NT_GNU_BUILD_ATTRIBUTE_FUNC = 0x101,
};
// Core note types.
enum : unsigned {
NT_PRSTATUS = 1,
NT_FPREGSET = 2,
NT_PRPSINFO = 3,
NT_TASKSTRUCT = 4,
NT_AUXV = 6,
NT_PSTATUS = 10,
NT_FPREGS = 12,
NT_PSINFO = 13,
NT_LWPSTATUS = 16,
NT_LWPSINFO = 17,
NT_WIN32PSTATUS = 18,
NT_PPC_VMX = 0x100,
NT_PPC_VSX = 0x102,
NT_PPC_TAR = 0x103,
NT_PPC_PPR = 0x104,
NT_PPC_DSCR = 0x105,
NT_PPC_EBB = 0x106,
NT_PPC_PMU = 0x107,
NT_PPC_TM_CGPR = 0x108,
NT_PPC_TM_CFPR = 0x109,
NT_PPC_TM_CVMX = 0x10a,
NT_PPC_TM_CVSX = 0x10b,
NT_PPC_TM_SPR = 0x10c,
NT_PPC_TM_CTAR = 0x10d,
NT_PPC_TM_CPPR = 0x10e,
NT_PPC_TM_CDSCR = 0x10f,
NT_386_TLS = 0x200,
NT_386_IOPERM = 0x201,
NT_X86_XSTATE = 0x202,
NT_S390_HIGH_GPRS = 0x300,
NT_S390_TIMER = 0x301,
NT_S390_TODCMP = 0x302,
NT_S390_TODPREG = 0x303,
NT_S390_CTRS = 0x304,
NT_S390_PREFIX = 0x305,
NT_S390_LAST_BREAK = 0x306,
NT_S390_SYSTEM_CALL = 0x307,
NT_S390_TDB = 0x308,
NT_S390_VXRS_LOW = 0x309,
NT_S390_VXRS_HIGH = 0x30a,
NT_S390_GS_CB = 0x30b,
NT_S390_GS_BC = 0x30c,
NT_ARM_VFP = 0x400,
NT_ARM_TLS = 0x401,
NT_ARM_HW_BREAK = 0x402,
NT_ARM_HW_WATCH = 0x403,
NT_ARM_SVE = 0x405,
NT_ARM_PAC_MASK = 0x406,
NT_ARM_SSVE = 0x40b,
NT_ARM_ZA = 0x40c,
NT_ARM_ZT = 0x40d,
NT_FILE = 0x46494c45,
NT_PRXFPREG = 0x46e62b7f,
NT_SIGINFO = 0x53494749,
};
// LLVM-specific notes.
enum {
NT_LLVM_HWASAN_GLOBALS = 3,
};
// GNU note types.
enum {
NT_GNU_ABI_TAG = 1,
NT_GNU_HWCAP = 2,
NT_GNU_BUILD_ID = 3,
NT_GNU_GOLD_VERSION = 4,
NT_GNU_PROPERTY_TYPE_0 = 5,
FDO_PACKAGING_METADATA = 0xcafe1a7e,
};
// Android note types.
enum {
NT_ANDROID_TYPE_IDENT = 1,
NT_ANDROID_TYPE_KUSER = 3,
NT_ANDROID_TYPE_MEMTAG = 4,
};
// Memory tagging values used in NT_ANDROID_TYPE_MEMTAG notes.
enum {
// Enumeration to determine the tagging mode. In Android-land, 'SYNC' means
// running all threads in MTE Synchronous mode, and 'ASYNC' means to use the
// kernels auto-upgrade feature to allow for either MTE Asynchronous,
// Asymmetric, or Synchronous mode. This allows silicon vendors to specify, on
// a per-cpu basis what 'ASYNC' should mean. Generally, the expectation is
// "pick the most precise mode that's very fast".
NT_MEMTAG_LEVEL_NONE = 0,
NT_MEMTAG_LEVEL_ASYNC = 1,
NT_MEMTAG_LEVEL_SYNC = 2,
NT_MEMTAG_LEVEL_MASK = 3,
// Bits indicating whether the loader should prepare for MTE to be enabled on
// the heap and/or stack.
NT_MEMTAG_HEAP = 4,
NT_MEMTAG_STACK = 8,
};
// Property types used in GNU_PROPERTY_TYPE_0 notes.
enum : unsigned {
GNU_PROPERTY_STACK_SIZE = 1,
GNU_PROPERTY_NO_COPY_ON_PROTECTED = 2,
GNU_PROPERTY_AARCH64_FEATURE_1_AND = 0xc0000000,
GNU_PROPERTY_X86_FEATURE_1_AND = 0xc0000002,
GNU_PROPERTY_X86_UINT32_OR_LO = 0xc0008000,
GNU_PROPERTY_X86_FEATURE_2_NEEDED = GNU_PROPERTY_X86_UINT32_OR_LO + 1,
GNU_PROPERTY_X86_ISA_1_NEEDED = GNU_PROPERTY_X86_UINT32_OR_LO + 2,
GNU_PROPERTY_X86_UINT32_OR_AND_LO = 0xc0010000,
GNU_PROPERTY_X86_FEATURE_2_USED = GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1,
GNU_PROPERTY_X86_ISA_1_USED = GNU_PROPERTY_X86_UINT32_OR_AND_LO + 2,
};
// aarch64 processor feature bits.
enum : unsigned {
GNU_PROPERTY_AARCH64_FEATURE_1_BTI = 1 << 0,
GNU_PROPERTY_AARCH64_FEATURE_1_PAC = 1 << 1,
};
// x86 processor feature bits.
enum : unsigned {
GNU_PROPERTY_X86_FEATURE_1_IBT = 1 << 0,
GNU_PROPERTY_X86_FEATURE_1_SHSTK = 1 << 1,
GNU_PROPERTY_X86_FEATURE_2_X86 = 1 << 0,
GNU_PROPERTY_X86_FEATURE_2_X87 = 1 << 1,
GNU_PROPERTY_X86_FEATURE_2_MMX = 1 << 2,
GNU_PROPERTY_X86_FEATURE_2_XMM = 1 << 3,
GNU_PROPERTY_X86_FEATURE_2_YMM = 1 << 4,
GNU_PROPERTY_X86_FEATURE_2_ZMM = 1 << 5,
GNU_PROPERTY_X86_FEATURE_2_FXSR = 1 << 6,
GNU_PROPERTY_X86_FEATURE_2_XSAVE = 1 << 7,
GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT = 1 << 8,
GNU_PROPERTY_X86_FEATURE_2_XSAVEC = 1 << 9,
GNU_PROPERTY_X86_ISA_1_BASELINE = 1 << 0,
GNU_PROPERTY_X86_ISA_1_V2 = 1 << 1,
GNU_PROPERTY_X86_ISA_1_V3 = 1 << 2,
GNU_PROPERTY_X86_ISA_1_V4 = 1 << 3,
};
// FreeBSD note types.
enum {
NT_FREEBSD_ABI_TAG = 1,
NT_FREEBSD_NOINIT_TAG = 2,
NT_FREEBSD_ARCH_TAG = 3,
NT_FREEBSD_FEATURE_CTL = 4,
};
// NT_FREEBSD_FEATURE_CTL values (see FreeBSD's sys/sys/elf_common.h).
enum {
NT_FREEBSD_FCTL_ASLR_DISABLE = 0x00000001,
NT_FREEBSD_FCTL_PROTMAX_DISABLE = 0x00000002,
NT_FREEBSD_FCTL_STKGAP_DISABLE = 0x00000004,
NT_FREEBSD_FCTL_WXNEEDED = 0x00000008,
NT_FREEBSD_FCTL_LA48 = 0x00000010,
NT_FREEBSD_FCTL_ASG_DISABLE = 0x00000020,
};
// FreeBSD core note types.
enum {
NT_FREEBSD_THRMISC = 7,
NT_FREEBSD_PROCSTAT_PROC = 8,
NT_FREEBSD_PROCSTAT_FILES = 9,
NT_FREEBSD_PROCSTAT_VMMAP = 10,
NT_FREEBSD_PROCSTAT_GROUPS = 11,
NT_FREEBSD_PROCSTAT_UMASK = 12,
NT_FREEBSD_PROCSTAT_RLIMIT = 13,
NT_FREEBSD_PROCSTAT_OSREL = 14,
NT_FREEBSD_PROCSTAT_PSSTRINGS = 15,
NT_FREEBSD_PROCSTAT_AUXV = 16,
};
// NetBSD core note types.
enum {
NT_NETBSDCORE_PROCINFO = 1,
NT_NETBSDCORE_AUXV = 2,
NT_NETBSDCORE_LWPSTATUS = 24,
};
// OpenBSD core note types.
enum {
NT_OPENBSD_PROCINFO = 10,
NT_OPENBSD_AUXV = 11,
NT_OPENBSD_REGS = 20,
NT_OPENBSD_FPREGS = 21,
NT_OPENBSD_XFPREGS = 22,
NT_OPENBSD_WCOOKIE = 23,
};
// AMDGPU-specific section indices.
enum {
SHN_AMDGPU_LDS = 0xff00, // Variable in LDS; symbol encoded like SHN_COMMON
};
// AMD vendor specific notes. (Code Object V2)
enum {
NT_AMD_HSA_CODE_OBJECT_VERSION = 1,
NT_AMD_HSA_HSAIL = 2,
NT_AMD_HSA_ISA_VERSION = 3,
// Note types with values between 4 and 9 (inclusive) are reserved.
NT_AMD_HSA_METADATA = 10,
NT_AMD_HSA_ISA_NAME = 11,
NT_AMD_PAL_METADATA = 12
};
// AMDGPU vendor specific notes. (Code Object V3)
enum {
// Note types with values between 0 and 31 (inclusive) are reserved.
NT_AMDGPU_METADATA = 32
};
// LLVMOMPOFFLOAD specific notes.
enum : unsigned {
NT_LLVM_OPENMP_OFFLOAD_VERSION = 1,
NT_LLVM_OPENMP_OFFLOAD_PRODUCER = 2,
NT_LLVM_OPENMP_OFFLOAD_PRODUCER_VERSION = 3
};
enum {
GNU_ABI_TAG_LINUX = 0,
GNU_ABI_TAG_HURD = 1,
GNU_ABI_TAG_SOLARIS = 2,
GNU_ABI_TAG_FREEBSD = 3,
GNU_ABI_TAG_NETBSD = 4,
GNU_ABI_TAG_SYLLABLE = 5,
GNU_ABI_TAG_NACL = 6,
};
constexpr const char *ELF_NOTE_GNU = "GNU";
// Android packed relocation group flags.
enum {
RELOCATION_GROUPED_BY_INFO_FLAG = 1,
RELOCATION_GROUPED_BY_OFFSET_DELTA_FLAG = 2,
RELOCATION_GROUPED_BY_ADDEND_FLAG = 4,
RELOCATION_GROUP_HAS_ADDEND_FLAG = 8,
};
// Compressed section header for ELF32.
struct Elf32_Chdr {
Elf32_Word ch_type;
Elf32_Word ch_size;
Elf32_Word ch_addralign;
};
// Compressed section header for ELF64.
struct Elf64_Chdr {
Elf64_Word ch_type;
Elf64_Word ch_reserved;
Elf64_Xword ch_size;
Elf64_Xword ch_addralign;
};
// Note header for ELF32.
struct Elf32_Nhdr {
Elf32_Word n_namesz;
Elf32_Word n_descsz;
Elf32_Word n_type;
};
// Note header for ELF64.
struct Elf64_Nhdr {
Elf64_Word n_namesz;
Elf64_Word n_descsz;
Elf64_Word n_type;
};
// Legal values for ch_type field of compressed section header.
enum {
ELFCOMPRESS_ZLIB = 1, // ZLIB/DEFLATE algorithm.
ELFCOMPRESS_ZSTD = 2, // Zstandard algorithm
ELFCOMPRESS_LOOS = 0x60000000, // Start of OS-specific.
ELFCOMPRESS_HIOS = 0x6fffffff, // End of OS-specific.
ELFCOMPRESS_LOPROC = 0x70000000, // Start of processor-specific.
ELFCOMPRESS_HIPROC = 0x7fffffff // End of processor-specific.
};
/// Convert an architecture name into ELF's e_machine value.
uint16_t convertArchNameToEMachine(StringRef Arch);
/// Convert an ELF's e_machine value into an architecture name.
StringRef convertEMachineToArchName(uint16_t EMachine);
} // end namespace ELF
} // end namespace llvm
#endif // LLVM_BINARYFORMAT_ELF_H
PK hwFZ �Ƣ�: �: BinaryFormat/MsgPackDocument.hnu �[��� //===-- MsgPackDocument.h - MsgPack Document --------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This file declares a class that exposes a simple in-memory representation
/// of a document of MsgPack objects, that can be read from MsgPack, written to
/// MsgPack, and inspected and modified in memory. This is intended to be a
/// lighter-weight (in terms of memory allocations) replacement for
/// MsgPackTypes.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_BINARYFORMAT_MSGPACKDOCUMENT_H
#define LLVM_BINARYFORMAT_MSGPACKDOCUMENT_H
#include "llvm/BinaryFormat/MsgPackReader.h"
#include <map>
namespace llvm {
namespace msgpack {
class ArrayDocNode;
class Document;
class MapDocNode;
/// The kind of a DocNode and its owning Document.
struct KindAndDocument {
Document *Doc;
Type Kind;
};
/// A node in a MsgPack Document. This is a simple copyable and
/// passable-by-value type that does not own any memory.
class DocNode {
friend Document;
public:
typedef std::map<DocNode, DocNode> MapTy;
typedef std::vector<DocNode> ArrayTy;
private:
// Using KindAndDocument allows us to squeeze Kind and a pointer to the
// owning Document into the same word. Having a pointer to the owning
// Document makes the API of DocNode more convenient, and allows its use in
// YAMLIO.
const KindAndDocument *KindAndDoc;
protected:
// The union of different values.
union {
int64_t Int;
uint64_t UInt;
bool Bool;
double Float;
StringRef Raw;
ArrayTy *Array;
MapTy *Map;
};
public:
// Default constructor gives an empty node with no associated Document. All
// you can do with it is "isEmpty()".
DocNode() : KindAndDoc(nullptr) {}
// Type methods
bool isMap() const { return getKind() == Type::Map; }
bool isArray() const { return getKind() == Type::Array; }
bool isScalar() const { return !isMap() && !isArray(); }
bool isString() const { return getKind() == Type::String; }
// Accessors. isEmpty() returns true for both a default-constructed DocNode
// that has no associated Document, and the result of getEmptyNode(), which
// does have an associated document.
bool isEmpty() const { return !KindAndDoc || getKind() == Type::Empty; }
Type getKind() const { return KindAndDoc->Kind; }
Document *getDocument() const { return KindAndDoc->Doc; }
int64_t &getInt() {
assert(getKind() == Type::Int);
return Int;
}
uint64_t &getUInt() {
assert(getKind() == Type::UInt);
return UInt;
}
bool &getBool() {
assert(getKind() == Type::Boolean);
return Bool;
}
double &getFloat() {
assert(getKind() == Type::Float);
return Float;
}
int64_t getInt() const {
assert(getKind() == Type::Int);
return Int;
}
uint64_t getUInt() const {
assert(getKind() == Type::UInt);
return UInt;
}
bool getBool() const {
assert(getKind() == Type::Boolean);
return Bool;
}
double getFloat() const {
assert(getKind() == Type::Float);
return Float;
}
StringRef getString() const {
assert(getKind() == Type::String);
return Raw;
}
MemoryBufferRef getBinary() const {
assert(getKind() == Type::Binary);
return MemoryBufferRef(Raw, "");
}
/// Get an ArrayDocNode for an array node. If Convert, convert the node to an
/// array node if necessary.
ArrayDocNode &getArray(bool Convert = false) {
if (getKind() != Type::Array) {
assert(Convert);
convertToArray();
}
// This could be a static_cast, except ArrayDocNode is a forward reference.
return *reinterpret_cast<ArrayDocNode *>(this);
}
/// Get a MapDocNode for a map node. If Convert, convert the node to a map
/// node if necessary.
MapDocNode &getMap(bool Convert = false) {
if (getKind() != Type::Map) {
assert(Convert);
convertToMap();
}
// This could be a static_cast, except MapDocNode is a forward reference.
return *reinterpret_cast<MapDocNode *>(this);
}
/// Comparison operator, used for map keys.
friend bool operator<(const DocNode &Lhs, const DocNode &Rhs) {
// This has to cope with one or both of the nodes being default-constructed,
// such that KindAndDoc is not set.
if (Rhs.isEmpty())
return false;
if (Lhs.KindAndDoc != Rhs.KindAndDoc) {
if (Lhs.isEmpty())
return true;
return (unsigned)Lhs.getKind() < (unsigned)Rhs.getKind();
}
switch (Lhs.getKind()) {
case Type::Int:
return Lhs.Int < Rhs.Int;
case Type::UInt:
return Lhs.UInt < Rhs.UInt;
case Type::Nil:
return false;
case Type::Boolean:
return Lhs.Bool < Rhs.Bool;
case Type::Float:
return Lhs.Float < Rhs.Float;
case Type::String:
case Type::Binary:
return Lhs.Raw < Rhs.Raw;
default:
llvm_unreachable("bad map key type");
}
}
/// Equality operator
friend bool operator==(const DocNode &Lhs, const DocNode &Rhs) {
return !(Lhs < Rhs) && !(Rhs < Lhs);
}
/// Inequality operator
friend bool operator!=(const DocNode &Lhs, const DocNode &Rhs) {
return !(Lhs == Rhs);
}
/// Convert this node to a string, assuming it is scalar.
std::string toString() const;
/// Convert the StringRef and use it to set this DocNode (assuming scalar). If
/// it is a string, copy the string into the Document's strings list so we do
/// not rely on S having a lifetime beyond this call. Tag is "" or a YAML tag.
StringRef fromString(StringRef S, StringRef Tag = "");
/// Convenience assignment operators. This only works if the destination
/// DocNode has an associated Document, i.e. it was not constructed using the
/// default constructor. The string one does not copy, so the string must
/// remain valid for the lifetime of the Document. Use fromString to avoid
/// that restriction.
DocNode &operator=(const char *Val) { return *this = StringRef(Val); }
DocNode &operator=(StringRef Val);
DocNode &operator=(MemoryBufferRef Val);
DocNode &operator=(bool Val);
DocNode &operator=(int Val);
DocNode &operator=(unsigned Val);
DocNode &operator=(int64_t Val);
DocNode &operator=(uint64_t Val);
private:
// Private constructor setting KindAndDoc, used by methods in Document.
DocNode(const KindAndDocument *KindAndDoc) : KindAndDoc(KindAndDoc) {}
void convertToArray();
void convertToMap();
};
/// A DocNode that is a map.
class MapDocNode : public DocNode {
public:
MapDocNode() = default;
MapDocNode(DocNode &N) : DocNode(N) { assert(getKind() == Type::Map); }
// Map access methods.
size_t size() const { return Map->size(); }
bool empty() const { return !size(); }
MapTy::iterator begin() { return Map->begin(); }
MapTy::iterator end() { return Map->end(); }
MapTy::iterator find(DocNode Key) { return Map->find(Key); }
MapTy::iterator find(StringRef Key);
MapTy::iterator erase(MapTy::const_iterator I) { return Map->erase(I); }
size_t erase(DocNode Key) { return Map->erase(Key); }
MapTy::iterator erase(MapTy::const_iterator First,
MapTy::const_iterator Second) {
return Map->erase(First, Second);
}
/// Member access. The string data must remain valid for the lifetime of the
/// Document.
DocNode &operator[](StringRef S);
/// Member access, with convenience versions for an integer key.
DocNode &operator[](DocNode Key);
DocNode &operator[](int Key);
DocNode &operator[](unsigned Key);
DocNode &operator[](int64_t Key);
DocNode &operator[](uint64_t Key);
};
/// A DocNode that is an array.
class ArrayDocNode : public DocNode {
public:
ArrayDocNode() = default;
ArrayDocNode(DocNode &N) : DocNode(N) { assert(getKind() == Type::Array); }
// Array access methods.
size_t size() const { return Array->size(); }
bool empty() const { return !size(); }
DocNode &back() const { return Array->back(); }
ArrayTy::iterator begin() { return Array->begin(); }
ArrayTy::iterator end() { return Array->end(); }
void push_back(DocNode N) {
assert(N.isEmpty() || N.getDocument() == getDocument());
Array->push_back(N);
}
/// Element access. This extends the array if necessary, with empty nodes.
DocNode &operator[](size_t Index);
};
/// Simple in-memory representation of a document of msgpack objects with
/// ability to find and create array and map elements. Does not currently cope
/// with any extension types.
class Document {
// Maps, arrays and strings used by nodes in the document. No attempt is made
// to free unused ones.
std::vector<std::unique_ptr<DocNode::MapTy>> Maps;
std::vector<std::unique_ptr<DocNode::ArrayTy>> Arrays;
std::vector<std::unique_ptr<char[]>> Strings;
// The root node of the document.
DocNode Root;
// The KindAndDocument structs pointed to by nodes in the document.
KindAndDocument KindAndDocs[size_t(Type::Empty) + 1];
// Whether YAML output uses hex for UInt.
bool HexMode = false;
public:
Document() {
clear();
for (unsigned T = 0; T != unsigned(Type::Empty) + 1; ++T)
KindAndDocs[T] = {this, Type(T)};
}
/// Get ref to the document's root element.
DocNode &getRoot() { return Root; }
/// Restore the Document to an empty state.
void clear() { getRoot() = getEmptyNode(); }
/// Create an empty node associated with this Document.
DocNode getEmptyNode() {
auto N = DocNode(&KindAndDocs[size_t(Type::Empty)]);
return N;
}
/// Create a nil node associated with this Document.
DocNode getNode() {
auto N = DocNode(&KindAndDocs[size_t(Type::Nil)]);
return N;
}
/// Create an Int node associated with this Document.
DocNode getNode(int64_t V) {
auto N = DocNode(&KindAndDocs[size_t(Type::Int)]);
N.Int = V;
return N;
}
/// Create an Int node associated with this Document.
DocNode getNode(int V) {
auto N = DocNode(&KindAndDocs[size_t(Type::Int)]);
N.Int = V;
return N;
}
/// Create a UInt node associated with this Document.
DocNode getNode(uint64_t V) {
auto N = DocNode(&KindAndDocs[size_t(Type::UInt)]);
N.UInt = V;
return N;
}
/// Create a UInt node associated with this Document.
DocNode getNode(unsigned V) {
auto N = DocNode(&KindAndDocs[size_t(Type::UInt)]);
N.UInt = V;
return N;
}
/// Create a Boolean node associated with this Document.
DocNode getNode(bool V) {
auto N = DocNode(&KindAndDocs[size_t(Type::Boolean)]);
N.Bool = V;
return N;
}
/// Create a Float node associated with this Document.
DocNode getNode(double V) {
auto N = DocNode(&KindAndDocs[size_t(Type::Float)]);
N.Float = V;
return N;
}
/// Create a String node associated with this Document. If !Copy, the passed
/// string must remain valid for the lifetime of the Document.
DocNode getNode(StringRef V, bool Copy = false) {
if (Copy)
V = addString(V);
auto N = DocNode(&KindAndDocs[size_t(Type::String)]);
N.Raw = V;
return N;
}
/// Create a String node associated with this Document. If !Copy, the passed
/// string must remain valid for the lifetime of the Document.
DocNode getNode(const char *V, bool Copy = false) {
return getNode(StringRef(V), Copy);
}
/// Create a Binary node associated with this Document. If !Copy, the passed
/// buffer must remain valid for the lifetime of the Document.
DocNode getNode(MemoryBufferRef V, bool Copy = false) {
auto Raw = V.getBuffer();
if (Copy)
Raw = addString(Raw);
auto N = DocNode(&KindAndDocs[size_t(Type::Binary)]);
N.Raw = Raw;
return N;
}
/// Create an empty Map node associated with this Document.
MapDocNode getMapNode() {
auto N = DocNode(&KindAndDocs[size_t(Type::Map)]);
Maps.push_back(std::unique_ptr<DocNode::MapTy>(new DocNode::MapTy));
N.Map = Maps.back().get();
return N.getMap();
}
/// Create an empty Array node associated with this Document.
ArrayDocNode getArrayNode() {
auto N = DocNode(&KindAndDocs[size_t(Type::Array)]);
Arrays.push_back(std::unique_ptr<DocNode::ArrayTy>(new DocNode::ArrayTy));
N.Array = Arrays.back().get();
return N.getArray();
}
/// Read a document from a binary msgpack blob, merging into anything already
/// in the Document. The blob data must remain valid for the lifetime of this
/// Document (because a string object in the document contains a StringRef
/// into the original blob). If Multi, then this sets root to an array and
/// adds top-level objects to it. If !Multi, then it only reads a single
/// top-level object, even if there are more, and sets root to that. Returns
/// false if failed due to illegal format or merge error.
///
/// The Merger arg is a callback function that is called when the merge has a
/// conflict, that is, it is trying to set an item that is already set. If the
/// conflict cannot be resolved, the callback function returns -1. If the
/// conflict can be resolved, the callback returns a non-negative number and
/// sets *DestNode to the resolved node. The returned non-negative number is
/// significant only for an array node; it is then the array index to start
/// populating at. That allows Merger to choose whether to merge array
/// elements (returns 0) or append new elements (returns existing size).
///
/// If SrcNode is an array or map, the resolution must be that *DestNode is an
/// array or map respectively, although it could be the array or map
/// (respectively) that was already there. MapKey is the key if *DestNode is a
/// map entry, a nil node otherwise.
///
/// The default for Merger is to disallow any conflict.
bool readFromBlob(
StringRef Blob, bool Multi,
function_ref<int(DocNode *DestNode, DocNode SrcNode, DocNode MapKey)>
Merger = [](DocNode *DestNode, DocNode SrcNode, DocNode MapKey) {
return -1;
});
/// Write a MsgPack document to a binary MsgPack blob.
void writeToBlob(std::string &Blob);
/// Copy a string into the Document's strings list, and return the copy that
/// is owned by the Document.
StringRef addString(StringRef S) {
Strings.push_back(std::unique_ptr<char[]>(new char[S.size()]));
memcpy(&Strings.back()[0], S.data(), S.size());
return StringRef(&Strings.back()[0], S.size());
}
/// Set whether YAML output uses hex for UInt. Default off.
void setHexMode(bool Val = true) { HexMode = Val; }
/// Get Hexmode flag.
bool getHexMode() const { return HexMode; }
/// Convert MsgPack Document to YAML text.
void toYAML(raw_ostream &OS);
/// Read YAML text into the MsgPack document. Returns false on failure.
bool fromYAML(StringRef S);
};
} // namespace msgpack
} // namespace llvm
#endif // LLVM_BINARYFORMAT_MSGPACKDOCUMENT_H
PK hwFZpMنr' r' BinaryFormat/DXContainer.hnu �[��� //===-- llvm/BinaryFormat/DXContainer.h - The DXBC file format --*- C++/-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines manifest constants for the DXContainer object file format.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_BINARYFORMAT_DXCONTAINER_H
#define LLVM_BINARYFORMAT_DXCONTAINER_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/SwapByteOrder.h"
#include "llvm/TargetParser/Triple.h"
#include <stdint.h>
namespace llvm {
// The DXContainer file format is arranged as a header and "parts". Semantically
// parts are similar to sections in other object file formats. The File format
// structure is roughly:
// ┌────────────────────────────────┐
// │ Header │
// ├────────────────────────────────┤
// │ Part │
// ├────────────────────────────────┤
// │ Part │
// ├────────────────────────────────┤
// │ ... │
// └────────────────────────────────┘
namespace dxbc {
inline Triple::EnvironmentType getShaderStage(uint32_t Kind) {
assert(Kind <= Triple::Amplification - Triple::Pixel &&
"Shader kind out of expected range.");
return static_cast<Triple::EnvironmentType>(Triple::Pixel + Kind);
}
struct Hash {
uint8_t Digest[16];
};
enum class HashFlags : uint32_t {
None = 0, // No flags defined.
IncludesSource = 1, // This flag indicates that the shader hash was computed
// taking into account source information (-Zss)
};
struct ShaderHash {
uint32_t Flags; // dxbc::HashFlags
uint8_t Digest[16];
bool isPopulated();
void swapBytes() { sys::swapByteOrder(Flags); }
};
struct ContainerVersion {
uint16_t Major;
uint16_t Minor;
void swapBytes() {
sys::swapByteOrder(Major);
sys::swapByteOrder(Minor);
}
};
struct Header {
uint8_t Magic[4]; // "DXBC"
Hash FileHash;
ContainerVersion Version;
uint32_t FileSize;
uint32_t PartCount;
void swapBytes() {
Version.swapBytes();
sys::swapByteOrder(FileSize);
sys::swapByteOrder(PartCount);
}
// Structure is followed by part offsets: uint32_t PartOffset[PartCount];
// The offset is to a PartHeader, which is followed by the Part Data.
};
/// Use this type to describe the size and type of a DXIL container part.
struct PartHeader {
uint8_t Name[4];
uint32_t Size;
void swapBytes() { sys::swapByteOrder(Size); }
StringRef getName() const {
return StringRef(reinterpret_cast<const char *>(&Name[0]), 4);
}
// Structure is followed directly by part data: uint8_t PartData[PartSize].
};
struct BitcodeHeader {
uint8_t Magic[4]; // ACSII "DXIL".
uint8_t MajorVersion; // DXIL version.
uint8_t MinorVersion; // DXIL version.
uint16_t Unused;
uint32_t Offset; // Offset to LLVM bitcode (from start of header).
uint32_t Size; // Size of LLVM bitcode (in bytes).
// Followed by uint8_t[BitcodeHeader.Size] at &BitcodeHeader + Header.Offset
void swapBytes() {
sys::swapByteOrder(MinorVersion);
sys::swapByteOrder(MajorVersion);
sys::swapByteOrder(Offset);
sys::swapByteOrder(Size);
}
};
struct ProgramHeader {
uint8_t MinorVersion : 4;
uint8_t MajorVersion : 4;
uint8_t Unused;
uint16_t ShaderKind;
uint32_t Size; // Size in uint32_t words including this header.
BitcodeHeader Bitcode;
void swapBytes() {
sys::swapByteOrder(ShaderKind);
sys::swapByteOrder(Size);
Bitcode.swapBytes();
}
};
static_assert(sizeof(ProgramHeader) == 24, "ProgramHeader Size incorrect!");
#define CONTAINER_PART(Part) Part,
enum class PartType {
Unknown = 0,
#include "DXContainerConstants.def"
};
#define SHADER_FLAG(Num, Val, Str) Val = 1ull << Num,
enum class FeatureFlags : uint64_t {
#include "DXContainerConstants.def"
};
static_assert((uint64_t)FeatureFlags::NextUnusedBit <= 1ull << 63,
"Shader flag bits exceed enum size.");
PartType parsePartType(StringRef S);
struct VertexPSVInfo {
uint8_t OutputPositionPresent;
uint8_t Unused[3];
void swapBytes() {
// nothing to swap
}
};
struct HullPSVInfo {
uint32_t InputControlPointCount;
uint32_t OutputControlPointCount;
uint32_t TessellatorDomain;
uint32_t TessellatorOutputPrimitive;
void swapBytes() {
sys::swapByteOrder(InputControlPointCount);
sys::swapByteOrder(OutputControlPointCount);
sys::swapByteOrder(TessellatorDomain);
sys::swapByteOrder(TessellatorOutputPrimitive);
}
};
struct DomainPSVInfo {
uint32_t InputControlPointCount;
uint8_t OutputPositionPresent;
uint8_t Unused[3];
uint32_t TessellatorDomain;
void swapBytes() {
sys::swapByteOrder(InputControlPointCount);
sys::swapByteOrder(TessellatorDomain);
}
};
struct GeometryPSVInfo {
uint32_t InputPrimitive;
uint32_t OutputTopology;
uint32_t OutputStreamMask;
uint8_t OutputPositionPresent;
uint8_t Unused[3];
void swapBytes() {
sys::swapByteOrder(InputPrimitive);
sys::swapByteOrder(OutputTopology);
sys::swapByteOrder(OutputStreamMask);
}
};
struct PixelPSVInfo {
uint8_t DepthOutput;
uint8_t SampleFrequency;
uint8_t Unused[2];
void swapBytes() {
// nothing to swap
}
};
struct MeshPSVInfo {
uint32_t GroupSharedBytesUsed;
uint32_t GroupSharedBytesDependentOnViewID;
uint32_t PayloadSizeInBytes;
uint16_t MaxOutputVertices;
uint16_t MaxOutputPrimitives;
void swapBytes() {
sys::swapByteOrder(GroupSharedBytesUsed);
sys::swapByteOrder(GroupSharedBytesDependentOnViewID);
sys::swapByteOrder(PayloadSizeInBytes);
sys::swapByteOrder(MaxOutputVertices);
sys::swapByteOrder(MaxOutputPrimitives);
}
};
struct AmplificationPSVInfo {
uint32_t PayloadSizeInBytes;
void swapBytes() { sys::swapByteOrder(PayloadSizeInBytes); }
};
union PipelinePSVInfo {
VertexPSVInfo VS;
HullPSVInfo HS;
DomainPSVInfo DS;
GeometryPSVInfo GS;
PixelPSVInfo PS;
MeshPSVInfo MS;
AmplificationPSVInfo AS;
void swapBytes(Triple::EnvironmentType Stage) {
switch (Stage) {
case Triple::EnvironmentType::Pixel:
PS.swapBytes();
break;
case Triple::EnvironmentType::Vertex:
VS.swapBytes();
break;
case Triple::EnvironmentType::Geometry:
GS.swapBytes();
break;
case Triple::EnvironmentType::Hull:
HS.swapBytes();
break;
case Triple::EnvironmentType::Domain:
DS.swapBytes();
break;
case Triple::EnvironmentType::Mesh:
MS.swapBytes();
break;
case Triple::EnvironmentType::Amplification:
AS.swapBytes();
break;
default:
break;
}
}
};
static_assert(sizeof(PipelinePSVInfo) == 4 * sizeof(uint32_t),
"Pipeline-specific PSV info must fit in 16 bytes.");
namespace PSV {
namespace v0 {
struct RuntimeInfo {
PipelinePSVInfo StageInfo;
uint32_t MinimumWaveLaneCount; // minimum lane count required, 0 if unused
uint32_t MaximumWaveLaneCount; // maximum lane count required,
// 0xffffffff if unused
void swapBytes() {
// Skip the union because we don't know which field it has
sys::swapByteOrder(MinimumWaveLaneCount);
sys::swapByteOrder(MaximumWaveLaneCount);
}
void swapBytes(Triple::EnvironmentType Stage) { StageInfo.swapBytes(Stage); }
};
struct ResourceBindInfo {
uint32_t Type;
uint32_t Space;
uint32_t LowerBound;
uint32_t UpperBound;
void swapBytes() {
sys::swapByteOrder(Type);
sys::swapByteOrder(Space);
sys::swapByteOrder(LowerBound);
sys::swapByteOrder(UpperBound);
}
};
} // namespace v0
namespace v1 {
struct MeshRuntimeInfo {
uint8_t SigPrimVectors; // Primitive output for MS
uint8_t MeshOutputTopology;
};
union GeometryExtraInfo {
uint16_t MaxVertexCount; // MaxVertexCount for GS only (max 1024)
uint8_t SigPatchConstOrPrimVectors; // Output for HS; Input for DS;
// Primitive output for MS (overlaps
// MeshInfo::SigPrimVectors)
MeshRuntimeInfo MeshInfo;
};
struct RuntimeInfo : public v0::RuntimeInfo {
uint8_t ShaderStage; // PSVShaderKind
uint8_t UsesViewID;
GeometryExtraInfo GeomData;
// PSVSignatureElement counts
uint8_t SigInputElements;
uint8_t SigOutputElements;
uint8_t SigPatchConstOrPrimElements;
// Number of packed vectors per signature
uint8_t SigInputVectors;
uint8_t SigOutputVectors[4];
void swapBytes() {
// nothing to swap since everything is single-byte or a union field
}
void swapBytes(Triple::EnvironmentType Stage) {
v0::RuntimeInfo::swapBytes(Stage);
if (Stage == Triple::EnvironmentType::Geometry)
sys::swapByteOrder(GeomData.MaxVertexCount);
}
};
} // namespace v1
namespace v2 {
struct RuntimeInfo : public v1::RuntimeInfo {
uint32_t NumThreadsX;
uint32_t NumThreadsY;
uint32_t NumThreadsZ;
void swapBytes() {
sys::swapByteOrder(NumThreadsX);
sys::swapByteOrder(NumThreadsY);
sys::swapByteOrder(NumThreadsZ);
}
void swapBytes(Triple::EnvironmentType Stage) {
v1::RuntimeInfo::swapBytes(Stage);
}
};
struct ResourceBindInfo : public v0::ResourceBindInfo {
uint32_t Kind;
uint32_t Flags;
void swapBytes() {
v0::ResourceBindInfo::swapBytes();
sys::swapByteOrder(Kind);
sys::swapByteOrder(Flags);
}
};
} // namespace v2
} // namespace PSV
} // namespace dxbc
} // namespace llvm
#endif // LLVM_BINARYFORMAT_DXCONTAINER_H
PK hwFZ�e�]% % % BinaryFormat/DXContainerConstants.defnu �[���
#ifdef CONTAINER_PART
CONTAINER_PART(DXIL)
CONTAINER_PART(SFI0)
CONTAINER_PART(HASH)
CONTAINER_PART(PSV0)
#undef CONTAINER_PART
#endif
#ifdef SHADER_FLAG
SHADER_FLAG(0, Doubles, "Double-precision floating point")
SHADER_FLAG(1, ComputeShadersPlusRawAndStructuredBuffers, "Raw and Structured buffers")
SHADER_FLAG(2, UAVsAtEveryStage, "UAVs at every shader stage")
SHADER_FLAG(3, Max64UAVs, "64 UAV slots")
SHADER_FLAG(4, MinimumPrecision, "Minimum-precision data types")
SHADER_FLAG(5, DX11_1_DoubleExtensions, "Double-precision extensions for 11.1")
SHADER_FLAG(6, DX11_1_ShaderExtensions, "Shader extensions for 11.1")
SHADER_FLAG(7, LEVEL9ComparisonFiltering, "Comparison filtering for feature level 9")
SHADER_FLAG(8, TiledResources, "Tiled resources")
SHADER_FLAG(9, StencilRef, "PS Output Stencil Ref")
SHADER_FLAG(10, InnerCoverage, "PS Inner Coverage")
SHADER_FLAG(11, TypedUAVLoadAdditionalFormats, "Typed UAV Load Additional Formats")
SHADER_FLAG(12, ROVs, "Raster Ordered UAVs")
SHADER_FLAG(13, ViewportAndRTArrayIndexFromAnyShaderFeedingRasterizer, "SV_RenderTargetArrayIndex or SV_ViewportArrayIndex from any shader feeding rasterizer")
SHADER_FLAG(14, WaveOps, "Wave level operations")
SHADER_FLAG(15, Int64Ops, "64-Bit integer")
SHADER_FLAG(16, ViewID, "View Instancing")
SHADER_FLAG(17, Barycentrics, "Barycentrics")
SHADER_FLAG(18, NativeLowPrecision, "Use native low precision")
SHADER_FLAG(19, ShadingRate, "Shading Rate")
SHADER_FLAG(20, Raytracing_Tier_1_1, "Raytracing tier 1.1 features")
SHADER_FLAG(21, SamplerFeedback, "Sampler feedback")
SHADER_FLAG(22, AtomicInt64OnTypedResource, "64-bit Atomics on Typed Resources")
SHADER_FLAG(23, AtomicInt64OnGroupShared, "64-bit Atomics on Group Shared")
SHADER_FLAG(24, DerivativesInMeshAndAmpShaders, "Derivatives in mesh and amplification shaders")
SHADER_FLAG(25, ResourceDescriptorHeapIndexing, "Resource descriptor heap indexing")
SHADER_FLAG(26, SamplerDescriptorHeapIndexing, "Sampler descriptor heap indexing")
SHADER_FLAG(27, RESERVED, "<RESERVED>")
SHADER_FLAG(28, AtomicInt64OnHeapResource, "64-bit Atomics on Heap Resources")
SHADER_FLAG(29, AdvancedTextureOps, "Advanced Texture Ops")
SHADER_FLAG(30, WriteableMSAATextures, "Writeable MSAA Textures")
SHADER_FLAG(31, NextUnusedBit, "Next reserved shader flag bit (not a flag)")
#undef SHADER_FLAG
#endif
PK hwFZu>�N8 8 BinaryFormat/MsgPackWriter.hnu �[��� //===- MsgPackWriter.h - Simple MsgPack writer ------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file contains a MessagePack writer.
///
/// See https://github.com/msgpack/msgpack/blob/master/spec.md for the full
/// specification.
///
/// Typical usage:
/// \code
/// raw_ostream output = GetOutputStream();
/// msgpack::Writer MPWriter(output);
/// MPWriter.writeNil();
/// MPWriter.write(false);
/// MPWriter.write("string");
/// // ...
/// \endcode
///
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_BINARYFORMAT_MSGPACKWRITER_H
#define LLVM_BINARYFORMAT_MSGPACKWRITER_H
#include "llvm/Support/EndianStream.h"
#include "llvm/Support/MemoryBufferRef.h"
namespace llvm {
class raw_ostream;
namespace msgpack {
/// Writes MessagePack objects to an output stream, one at a time.
class Writer {
public:
/// Construct a writer, optionally enabling "Compatibility Mode" as defined
/// in the MessagePack specification.
///
/// When in \p Compatible mode, the writer will write \c Str16 formats
/// instead of \c Str8 formats, and will refuse to write any \c Bin formats.
///
/// \param OS stream to output MessagePack objects to.
/// \param Compatible when set, write in "Compatibility Mode".
Writer(raw_ostream &OS, bool Compatible = false);
Writer(const Writer &) = delete;
Writer &operator=(const Writer &) = delete;
/// Write a \em Nil to the output stream.
///
/// The output will be the \em nil format.
void writeNil();
/// Write a \em Boolean to the output stream.
///
/// The output will be a \em bool format.
void write(bool b);
/// Write a signed integer to the output stream.
///
/// The output will be in the smallest possible \em int format.
///
/// The format chosen may be for an unsigned integer.
void write(int64_t i);
/// Write an unsigned integer to the output stream.
///
/// The output will be in the smallest possible \em int format.
void write(uint64_t u);
/// Write a floating point number to the output stream.
///
/// The output will be in the smallest possible \em float format.
void write(double d);
/// Write a string to the output stream.
///
/// The output will be in the smallest possible \em str format.
void write(StringRef s);
/// Write a memory buffer to the output stream.
///
/// The output will be in the smallest possible \em bin format.
///
/// \warning Do not use this overload if in \c Compatible mode.
void write(MemoryBufferRef Buffer);
/// Write the header for an \em Array of the given size.
///
/// The output will be in the smallest possible \em array format.
//
/// The header contains an identifier for the \em array format used, as well
/// as an encoding of the size of the array.
///
/// N.B. The caller must subsequently call \c Write an additional \p Size
/// times to complete the array.
void writeArraySize(uint32_t Size);
/// Write the header for a \em Map of the given size.
///
/// The output will be in the smallest possible \em map format.
//
/// The header contains an identifier for the \em map format used, as well
/// as an encoding of the size of the map.
///
/// N.B. The caller must subsequently call \c Write and additional \c Size*2
/// times to complete the map. Each even numbered call to \c Write defines a
/// new key, and each odd numbered call defines the previous key's value.
void writeMapSize(uint32_t Size);
/// Write a typed memory buffer (an extension type) to the output stream.
///
/// The output will be in the smallest possible \em ext format.
void writeExt(int8_t Type, MemoryBufferRef Buffer);
private:
support::endian::Writer EW;
bool Compatible;
};
} // end namespace msgpack
} // end namespace llvm
#endif // LLVM_BINARYFORMAT_MSGPACKWRITER_H
PK hwFZܙ�S� � BinaryFormat/MachO.defnu �[��� //,,,-- llvm/Support/MachO.def - The MachO file definitions -----*- C++ -*-,,,//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//,,,----------------------------------------------------------------------,,,//
//
// Definitions for MachO files
//
//,,,----------------------------------------------------------------------,,,//
#ifdef HANDLE_LOAD_COMMAND
HANDLE_LOAD_COMMAND(LC_SEGMENT, 0x00000001u, segment_command)
HANDLE_LOAD_COMMAND(LC_SYMTAB, 0x00000002u, symtab_command)
// LC_SYMSEG is obsolete and no longer supported.
HANDLE_LOAD_COMMAND(LC_SYMSEG, 0x00000003u, symseg_command)
HANDLE_LOAD_COMMAND(LC_THREAD, 0x00000004u, thread_command)
HANDLE_LOAD_COMMAND(LC_UNIXTHREAD, 0x00000005u, thread_command)
// LC_LOADFVMLIB is obsolete and no longer supported.
HANDLE_LOAD_COMMAND(LC_LOADFVMLIB, 0x00000006u, fvmlib_command)
// LC_IDFVMLIB is obsolete and no longer supported.
HANDLE_LOAD_COMMAND(LC_IDFVMLIB, 0x00000007u, fvmlib_command)
// LC_IDENT is obsolete and no longer supported.
HANDLE_LOAD_COMMAND(LC_IDENT, 0x00000008u, ident_command)
// LC_FVMFILE is obsolete and no longer supported.
HANDLE_LOAD_COMMAND(LC_FVMFILE, 0x00000009u, fvmfile_command)
// LC_PREPAGE is obsolete and no longer supported.
HANDLE_LOAD_COMMAND(LC_PREPAGE, 0x0000000Au, load_command)
HANDLE_LOAD_COMMAND(LC_DYSYMTAB, 0x0000000Bu, dysymtab_command)
HANDLE_LOAD_COMMAND(LC_LOAD_DYLIB, 0x0000000Cu, dylib_command)
HANDLE_LOAD_COMMAND(LC_ID_DYLIB, 0x0000000Du, dylib_command)
HANDLE_LOAD_COMMAND(LC_LOAD_DYLINKER, 0x0000000Eu, dylinker_command)
HANDLE_LOAD_COMMAND(LC_ID_DYLINKER, 0x0000000Fu, dylinker_command)
// LC_PREBOUND_DYLIB is obsolete and no longer supported.
HANDLE_LOAD_COMMAND(LC_PREBOUND_DYLIB, 0x00000010u, prebound_dylib_command)
HANDLE_LOAD_COMMAND(LC_ROUTINES, 0x00000011u, routines_command)
HANDLE_LOAD_COMMAND(LC_SUB_FRAMEWORK, 0x00000012u, sub_framework_command)
HANDLE_LOAD_COMMAND(LC_SUB_UMBRELLA, 0x00000013u, sub_umbrella_command)
HANDLE_LOAD_COMMAND(LC_SUB_CLIENT, 0x00000014u, sub_client_command)
HANDLE_LOAD_COMMAND(LC_SUB_LIBRARY, 0x00000015u, sub_library_command)
// LC_TWOLEVEL_HINTS is obsolete and no longer supported.
HANDLE_LOAD_COMMAND(LC_TWOLEVEL_HINTS, 0x00000016u, twolevel_hints_command)
// LC_PREBIND_CKSUM is obsolete and no longer supported.
HANDLE_LOAD_COMMAND(LC_PREBIND_CKSUM, 0x00000017u, prebind_cksum_command)
// LC_LOAD_WEAK_DYLIB is obsolete and no longer supported.
HANDLE_LOAD_COMMAND(LC_LOAD_WEAK_DYLIB, 0x80000018u, dylib_command)
HANDLE_LOAD_COMMAND(LC_SEGMENT_64, 0x00000019u, segment_command_64)
HANDLE_LOAD_COMMAND(LC_ROUTINES_64, 0x0000001Au, routines_command_64)
HANDLE_LOAD_COMMAND(LC_UUID, 0x0000001Bu, uuid_command)
HANDLE_LOAD_COMMAND(LC_RPATH, 0x8000001Cu, rpath_command)
HANDLE_LOAD_COMMAND(LC_CODE_SIGNATURE, 0x0000001Du, linkedit_data_command)
HANDLE_LOAD_COMMAND(LC_SEGMENT_SPLIT_INFO, 0x0000001Eu, linkedit_data_command)
HANDLE_LOAD_COMMAND(LC_REEXPORT_DYLIB, 0x8000001Fu, dylib_command)
HANDLE_LOAD_COMMAND(LC_LAZY_LOAD_DYLIB, 0x00000020u, dylib_command)
HANDLE_LOAD_COMMAND(LC_ENCRYPTION_INFO, 0x00000021u, encryption_info_command)
HANDLE_LOAD_COMMAND(LC_DYLD_INFO, 0x00000022u, dyld_info_command)
HANDLE_LOAD_COMMAND(LC_DYLD_INFO_ONLY, 0x80000022u, dyld_info_command)
HANDLE_LOAD_COMMAND(LC_LOAD_UPWARD_DYLIB, 0x80000023u, dylib_command)
HANDLE_LOAD_COMMAND(LC_VERSION_MIN_MACOSX, 0x00000024u, version_min_command)
HANDLE_LOAD_COMMAND(LC_VERSION_MIN_IPHONEOS, 0x00000025u, version_min_command)
HANDLE_LOAD_COMMAND(LC_FUNCTION_STARTS, 0x00000026u, linkedit_data_command)
HANDLE_LOAD_COMMAND(LC_DYLD_ENVIRONMENT, 0x00000027u, dylinker_command)
HANDLE_LOAD_COMMAND(LC_MAIN, 0x80000028u, entry_point_command)
HANDLE_LOAD_COMMAND(LC_DATA_IN_CODE, 0x00000029u, linkedit_data_command)
HANDLE_LOAD_COMMAND(LC_SOURCE_VERSION, 0x0000002Au, source_version_command)
HANDLE_LOAD_COMMAND(LC_DYLIB_CODE_SIGN_DRS, 0x0000002Bu, linkedit_data_command)
HANDLE_LOAD_COMMAND(LC_ENCRYPTION_INFO_64, 0x0000002Cu,
encryption_info_command_64)
HANDLE_LOAD_COMMAND(LC_LINKER_OPTION, 0x0000002Du, linker_option_command)
HANDLE_LOAD_COMMAND(LC_LINKER_OPTIMIZATION_HINT, 0x0000002Eu, linkedit_data_command)
HANDLE_LOAD_COMMAND(LC_VERSION_MIN_TVOS, 0x0000002Fu, version_min_command)
HANDLE_LOAD_COMMAND(LC_VERSION_MIN_WATCHOS, 0x00000030u, version_min_command)
HANDLE_LOAD_COMMAND(LC_NOTE, 0x00000031u, note_command)
HANDLE_LOAD_COMMAND(LC_BUILD_VERSION, 0x00000032u, build_version_command)
HANDLE_LOAD_COMMAND(LC_DYLD_EXPORTS_TRIE, 0x80000033u, linkedit_data_command)
HANDLE_LOAD_COMMAND(LC_DYLD_CHAINED_FIXUPS, 0x80000034u, linkedit_data_command)
HANDLE_LOAD_COMMAND(LC_FILESET_ENTRY, 0x80000035u, fileset_entry_command)
HANDLE_LOAD_COMMAND(LC_ATOM_INFO, 0x00000036u, linkedit_data_command)
#endif
#ifdef LOAD_COMMAND_STRUCT
LOAD_COMMAND_STRUCT(dyld_info_command)
LOAD_COMMAND_STRUCT(dylib_command)
LOAD_COMMAND_STRUCT(dylinker_command)
LOAD_COMMAND_STRUCT(dysymtab_command)
LOAD_COMMAND_STRUCT(encryption_info_command)
LOAD_COMMAND_STRUCT(encryption_info_command_64)
LOAD_COMMAND_STRUCT(entry_point_command)
LOAD_COMMAND_STRUCT(fvmfile_command)
LOAD_COMMAND_STRUCT(fvmlib_command)
LOAD_COMMAND_STRUCT(ident_command)
LOAD_COMMAND_STRUCT(linkedit_data_command)
LOAD_COMMAND_STRUCT(linker_option_command)
LOAD_COMMAND_STRUCT(load_command)
LOAD_COMMAND_STRUCT(prebind_cksum_command)
LOAD_COMMAND_STRUCT(prebound_dylib_command)
LOAD_COMMAND_STRUCT(routines_command)
LOAD_COMMAND_STRUCT(routines_command_64)
LOAD_COMMAND_STRUCT(rpath_command)
LOAD_COMMAND_STRUCT(segment_command)
LOAD_COMMAND_STRUCT(segment_command_64)
LOAD_COMMAND_STRUCT(source_version_command)
LOAD_COMMAND_STRUCT(sub_client_command)
LOAD_COMMAND_STRUCT(sub_framework_command)
LOAD_COMMAND_STRUCT(sub_library_command)
LOAD_COMMAND_STRUCT(sub_umbrella_command)
LOAD_COMMAND_STRUCT(symseg_command)
LOAD_COMMAND_STRUCT(symtab_command)
LOAD_COMMAND_STRUCT(thread_command)
LOAD_COMMAND_STRUCT(twolevel_hints_command)
LOAD_COMMAND_STRUCT(uuid_command)
LOAD_COMMAND_STRUCT(version_min_command)
LOAD_COMMAND_STRUCT(note_command)
LOAD_COMMAND_STRUCT(build_version_command)
LOAD_COMMAND_STRUCT(fileset_entry_command)
#endif
#undef HANDLE_LOAD_COMMAND
#undef LOAD_COMMAND_STRUCT
PK hwFZ�d'/�
�
% BinaryFormat/AMDGPUMetadataVerifier.hnu �[��� //===- AMDGPUMetadataVerifier.h - MsgPack Types -----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file
/// This is a verifier for AMDGPU HSA metadata, which can verify both
/// well-typed metadata and untyped metadata. When verifying in the non-strict
/// mode, untyped metadata is coerced into the correct type if possible.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_BINARYFORMAT_AMDGPUMETADATAVERIFIER_H
#define LLVM_BINARYFORMAT_AMDGPUMETADATAVERIFIER_H
#include "llvm/ADT/STLFunctionalExtras.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/BinaryFormat/MsgPackReader.h"
#include <cstddef>
#include <optional>
namespace llvm {
namespace msgpack {
class DocNode;
class MapDocNode;
}
namespace AMDGPU {
namespace HSAMD {
namespace V3 {
/// Verifier for AMDGPU HSA metadata.
///
/// Operates in two modes:
///
/// In strict mode, metadata must already be well-typed.
///
/// In non-strict mode, metadata is coerced into expected types when possible.
class MetadataVerifier {
bool Strict;
bool verifyScalar(msgpack::DocNode &Node, msgpack::Type SKind,
function_ref<bool(msgpack::DocNode &)> verifyValue = {});
bool verifyInteger(msgpack::DocNode &Node);
bool verifyArray(msgpack::DocNode &Node,
function_ref<bool(msgpack::DocNode &)> verifyNode,
std::optional<size_t> Size = std::nullopt);
bool verifyEntry(msgpack::MapDocNode &MapNode, StringRef Key, bool Required,
function_ref<bool(msgpack::DocNode &)> verifyNode);
bool
verifyScalarEntry(msgpack::MapDocNode &MapNode, StringRef Key, bool Required,
msgpack::Type SKind,
function_ref<bool(msgpack::DocNode &)> verifyValue = {});
bool verifyIntegerEntry(msgpack::MapDocNode &MapNode, StringRef Key,
bool Required);
bool verifyKernelArgs(msgpack::DocNode &Node);
bool verifyKernel(msgpack::DocNode &Node);
public:
/// Construct a MetadataVerifier, specifying whether it will operate in \p
/// Strict mode.
MetadataVerifier(bool Strict) : Strict(Strict) {}
/// Verify given HSA metadata.
///
/// \returns True when successful, false when metadata is invalid.
bool verify(msgpack::DocNode &HSAMetadataRoot);
};
} // end namespace V3
} // end namespace HSAMD
} // end namespace AMDGPU
} // end namespace llvm
#endif // LLVM_BINARYFORMAT_AMDGPUMETADATAVERIFIER_H
PK hwFZ7���6 6 BinaryFormat/Swift.defnu �[��� //===- llvm/BinaryFormat/Swift.def - Swift definitions ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Macros for running through Swift enumerators.
//
//===----------------------------------------------------------------------===//
#if !(defined HANDLE_SWIFT_SECTION)
#error "Missing macro definition of HANDLE_SWIFT_SECTION"
#endif
#ifndef HANDLE_SWIFT_SECTION
#define HANDLE_SWIFT_SECTION(KIND, MACHO, ELF, COFF)
#endif
HANDLE_SWIFT_SECTION(fieldmd, "__swift5_fieldmd", "swift5_fieldmd", ".sw5flmd")
HANDLE_SWIFT_SECTION(assocty, "__swift5_assocty", "swift5_assocty", ".sw5asty")
HANDLE_SWIFT_SECTION(builtin, "__swift5_builtin", "swift5_builtin", ".sw5bltn")
HANDLE_SWIFT_SECTION(capture, "__swift5_capture", "swift5_capture", ".sw5cptr")
HANDLE_SWIFT_SECTION(typeref, "__swift5_typeref", "swift5_typeref", ".sw5tyrf")
HANDLE_SWIFT_SECTION(reflstr, "__swift5_reflstr", "swift5_reflstr", ".sw5rfst")
HANDLE_SWIFT_SECTION(conform, "__swift5_proto", "swift5_protocol_conformances",
".sw5prtc$B")
HANDLE_SWIFT_SECTION(protocs, "__swift5_protos", "swift5_protocols",
".sw5prt$B")
HANDLE_SWIFT_SECTION(acfuncs, "__swift5_acfuncs", "swift5_accessible_functions",
".sw5acfn$B")
HANDLE_SWIFT_SECTION(mpenum, "__swift5_mpenum", "swift5_mpenum", ".sw5mpen$B")
PK hwFZ;��?�
�
BinaryFormat/Magic.hnu �[��� //===- llvm/BinaryFormat/Magic.h - File magic identification ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_BINARYFORMAT_MAGIC_H
#define LLVM_BINARYFORMAT_MAGIC_H
#include <system_error>
namespace llvm {
class StringRef;
class Twine;
/// file_magic - An "enum class" enumeration of file types based on magic (the
/// first N bytes of the file).
struct file_magic {
enum Impl {
unknown = 0, ///< Unrecognized file
bitcode, ///< Bitcode file
archive, ///< ar style archive file
elf, ///< ELF Unknown type
elf_relocatable, ///< ELF Relocatable object file
elf_executable, ///< ELF Executable image
elf_shared_object, ///< ELF dynamically linked shared lib
elf_core, ///< ELF core image
goff_object, ///< GOFF object file
macho_object, ///< Mach-O Object file
macho_executable, ///< Mach-O Executable
macho_fixed_virtual_memory_shared_lib, ///< Mach-O Shared Lib, FVM
macho_core, ///< Mach-O Core File
macho_preload_executable, ///< Mach-O Preloaded Executable
macho_dynamically_linked_shared_lib, ///< Mach-O dynlinked shared lib
macho_dynamic_linker, ///< The Mach-O dynamic linker
macho_bundle, ///< Mach-O Bundle file
macho_dynamically_linked_shared_lib_stub, ///< Mach-O Shared lib stub
macho_dsym_companion, ///< Mach-O dSYM companion file
macho_kext_bundle, ///< Mach-O kext bundle file
macho_universal_binary, ///< Mach-O universal binary
macho_file_set, ///< Mach-O file set binary
minidump, ///< Windows minidump file
coff_cl_gl_object, ///< Microsoft cl.exe's intermediate code file
coff_object, ///< COFF object file
coff_import_library, ///< COFF import library
pecoff_executable, ///< PECOFF executable file
windows_resource, ///< Windows compiled resource file (.res)
xcoff_object_32, ///< 32-bit XCOFF object file
xcoff_object_64, ///< 64-bit XCOFF object file
wasm_object, ///< WebAssembly Object file
pdb, ///< Windows PDB debug info file
tapi_file, ///< Text-based Dynamic Library Stub file
cuda_fatbinary, ///< CUDA Fatbinary object file
offload_binary, ///< LLVM offload object file
dxcontainer_object, ///< DirectX container file
};
bool is_object() const { return V != unknown; }
file_magic() = default;
file_magic(Impl V) : V(V) {}
operator Impl() const { return V; }
private:
Impl V = unknown;
};
/// Identify the type of a binary file based on how magical it is.
file_magic identify_magic(StringRef magic);
/// Get and identify \a path's type based on its content.
///
/// @param path Input path.
/// @param result Set to the type of file, or file_magic::unknown.
/// @returns errc::success if result has been successfully set, otherwise a
/// platform-specific error_code.
std::error_code identify_magic(const Twine &path, file_magic &result);
} // namespace llvm
#endif
PK hwFZ��{+i i BinaryFormat/COFF.hnu �[��� //===-- llvm/BinaryFormat/COFF.h --------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains an definitions used in Windows COFF Files.
//
// Structures and enums defined within this file where created using
// information from Microsoft's publicly available PE/COFF format document:
//
// Microsoft Portable Executable and Common Object File Format Specification
// Revision 8.1 - February 15, 2008
//
// As of 5/2/2010, hosted by Microsoft at:
// http://www.microsoft.com/whdc/system/platform/firmware/pecoff.mspx
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_BINARYFORMAT_COFF_H
#define LLVM_BINARYFORMAT_COFF_H
#include "llvm/Support/DataTypes.h"
#include <cassert>
namespace llvm {
namespace COFF {
// The maximum number of sections that a COFF object can have (inclusive).
const int32_t MaxNumberOfSections16 = 65279;
// The PE signature bytes that follows the DOS stub header.
static const char PEMagic[] = {'P', 'E', '\0', '\0'};
static const char BigObjMagic[] = {
'\xc7', '\xa1', '\xba', '\xd1', '\xee', '\xba', '\xa9', '\x4b',
'\xaf', '\x20', '\xfa', '\xf6', '\x6a', '\xa4', '\xdc', '\xb8',
};
static const char ClGlObjMagic[] = {
'\x38', '\xfe', '\xb3', '\x0c', '\xa5', '\xd9', '\xab', '\x4d',
'\xac', '\x9b', '\xd6', '\xb6', '\x22', '\x26', '\x53', '\xc2',
};
// The signature bytes that start a .res file.
static const char WinResMagic[] = {
'\x00', '\x00', '\x00', '\x00', '\x20', '\x00', '\x00', '\x00',
'\xff', '\xff', '\x00', '\x00', '\xff', '\xff', '\x00', '\x00',
};
// Sizes in bytes of various things in the COFF format.
enum {
Header16Size = 20,
Header32Size = 56,
NameSize = 8,
Symbol16Size = 18,
Symbol32Size = 20,
SectionSize = 40,
RelocationSize = 10
};
struct header {
uint16_t Machine;
int32_t NumberOfSections;
uint32_t TimeDateStamp;
uint32_t PointerToSymbolTable;
uint32_t NumberOfSymbols;
uint16_t SizeOfOptionalHeader;
uint16_t Characteristics;
};
struct BigObjHeader {
enum : uint16_t { MinBigObjectVersion = 2 };
uint16_t Sig1; ///< Must be IMAGE_FILE_MACHINE_UNKNOWN (0).
uint16_t Sig2; ///< Must be 0xFFFF.
uint16_t Version;
uint16_t Machine;
uint32_t TimeDateStamp;
uint8_t UUID[16];
uint32_t unused1;
uint32_t unused2;
uint32_t unused3;
uint32_t unused4;
uint32_t NumberOfSections;
uint32_t PointerToSymbolTable;
uint32_t NumberOfSymbols;
};
enum MachineTypes : unsigned {
MT_Invalid = 0xffff,
IMAGE_FILE_MACHINE_UNKNOWN = 0x0,
IMAGE_FILE_MACHINE_AM33 = 0x1D3,
IMAGE_FILE_MACHINE_AMD64 = 0x8664,
IMAGE_FILE_MACHINE_ARM = 0x1C0,
IMAGE_FILE_MACHINE_ARMNT = 0x1C4,
IMAGE_FILE_MACHINE_ARM64 = 0xAA64,
IMAGE_FILE_MACHINE_ARM64EC = 0xA641,
IMAGE_FILE_MACHINE_ARM64X = 0xA64E,
IMAGE_FILE_MACHINE_EBC = 0xEBC,
IMAGE_FILE_MACHINE_I386 = 0x14C,
IMAGE_FILE_MACHINE_IA64 = 0x200,
IMAGE_FILE_MACHINE_M32R = 0x9041,
IMAGE_FILE_MACHINE_MIPS16 = 0x266,
IMAGE_FILE_MACHINE_MIPSFPU = 0x366,
IMAGE_FILE_MACHINE_MIPSFPU16 = 0x466,
IMAGE_FILE_MACHINE_POWERPC = 0x1F0,
IMAGE_FILE_MACHINE_POWERPCFP = 0x1F1,
IMAGE_FILE_MACHINE_R4000 = 0x166,
IMAGE_FILE_MACHINE_RISCV32 = 0x5032,
IMAGE_FILE_MACHINE_RISCV64 = 0x5064,
IMAGE_FILE_MACHINE_RISCV128 = 0x5128,
IMAGE_FILE_MACHINE_SH3 = 0x1A2,
IMAGE_FILE_MACHINE_SH3DSP = 0x1A3,
IMAGE_FILE_MACHINE_SH4 = 0x1A6,
IMAGE_FILE_MACHINE_SH5 = 0x1A8,
IMAGE_FILE_MACHINE_THUMB = 0x1C2,
IMAGE_FILE_MACHINE_WCEMIPSV2 = 0x169
};
template <typename T> bool isArm64EC(T Machine) {
return Machine == IMAGE_FILE_MACHINE_ARM64EC ||
Machine == IMAGE_FILE_MACHINE_ARM64X;
}
template <typename T> bool isAnyArm64(T Machine) {
return Machine == IMAGE_FILE_MACHINE_ARM64 || isArm64EC(Machine);
}
template <typename T> bool is64Bit(T Machine) {
return Machine == IMAGE_FILE_MACHINE_AMD64 || isAnyArm64(Machine);
}
enum Characteristics : unsigned {
C_Invalid = 0,
/// The file does not contain base relocations and must be loaded at its
/// preferred base. If this cannot be done, the loader will error.
IMAGE_FILE_RELOCS_STRIPPED = 0x0001,
/// The file is valid and can be run.
IMAGE_FILE_EXECUTABLE_IMAGE = 0x0002,
/// COFF line numbers have been stripped. This is deprecated and should be
/// 0.
IMAGE_FILE_LINE_NUMS_STRIPPED = 0x0004,
/// COFF symbol table entries for local symbols have been removed. This is
/// deprecated and should be 0.
IMAGE_FILE_LOCAL_SYMS_STRIPPED = 0x0008,
/// Aggressively trim working set. This is deprecated and must be 0.
IMAGE_FILE_AGGRESSIVE_WS_TRIM = 0x0010,
/// Image can handle > 2GiB addresses.
IMAGE_FILE_LARGE_ADDRESS_AWARE = 0x0020,
/// Little endian: the LSB precedes the MSB in memory. This is deprecated
/// and should be 0.
IMAGE_FILE_BYTES_REVERSED_LO = 0x0080,
/// Machine is based on a 32bit word architecture.
IMAGE_FILE_32BIT_MACHINE = 0x0100,
/// Debugging info has been removed.
IMAGE_FILE_DEBUG_STRIPPED = 0x0200,
/// If the image is on removable media, fully load it and copy it to swap.
IMAGE_FILE_REMOVABLE_RUN_FROM_SWAP = 0x0400,
/// If the image is on network media, fully load it and copy it to swap.
IMAGE_FILE_NET_RUN_FROM_SWAP = 0x0800,
/// The image file is a system file, not a user program.
IMAGE_FILE_SYSTEM = 0x1000,
/// The image file is a DLL.
IMAGE_FILE_DLL = 0x2000,
/// This file should only be run on a uniprocessor machine.
IMAGE_FILE_UP_SYSTEM_ONLY = 0x4000,
/// Big endian: the MSB precedes the LSB in memory. This is deprecated
/// and should be 0.
IMAGE_FILE_BYTES_REVERSED_HI = 0x8000
};
enum ResourceTypeID : unsigned {
RID_Cursor = 1,
RID_Bitmap = 2,
RID_Icon = 3,
RID_Menu = 4,
RID_Dialog = 5,
RID_String = 6,
RID_FontDir = 7,
RID_Font = 8,
RID_Accelerator = 9,
RID_RCData = 10,
RID_MessageTable = 11,
RID_Group_Cursor = 12,
RID_Group_Icon = 14,
RID_Version = 16,
RID_DLGInclude = 17,
RID_PlugPlay = 19,
RID_VXD = 20,
RID_AniCursor = 21,
RID_AniIcon = 22,
RID_HTML = 23,
RID_Manifest = 24,
};
struct symbol {
char Name[NameSize];
uint32_t Value;
int32_t SectionNumber;
uint16_t Type;
uint8_t StorageClass;
uint8_t NumberOfAuxSymbols;
};
enum SymbolSectionNumber : int32_t {
IMAGE_SYM_DEBUG = -2,
IMAGE_SYM_ABSOLUTE = -1,
IMAGE_SYM_UNDEFINED = 0
};
/// Storage class tells where and what the symbol represents
enum SymbolStorageClass {
SSC_Invalid = 0xff,
IMAGE_SYM_CLASS_END_OF_FUNCTION = -1, ///< Physical end of function
IMAGE_SYM_CLASS_NULL = 0, ///< No symbol
IMAGE_SYM_CLASS_AUTOMATIC = 1, ///< Stack variable
IMAGE_SYM_CLASS_EXTERNAL = 2, ///< External symbol
IMAGE_SYM_CLASS_STATIC = 3, ///< Static
IMAGE_SYM_CLASS_REGISTER = 4, ///< Register variable
IMAGE_SYM_CLASS_EXTERNAL_DEF = 5, ///< External definition
IMAGE_SYM_CLASS_LABEL = 6, ///< Label
IMAGE_SYM_CLASS_UNDEFINED_LABEL = 7, ///< Undefined label
IMAGE_SYM_CLASS_MEMBER_OF_STRUCT = 8, ///< Member of structure
IMAGE_SYM_CLASS_ARGUMENT = 9, ///< Function argument
IMAGE_SYM_CLASS_STRUCT_TAG = 10, ///< Structure tag
IMAGE_SYM_CLASS_MEMBER_OF_UNION = 11, ///< Member of union
IMAGE_SYM_CLASS_UNION_TAG = 12, ///< Union tag
IMAGE_SYM_CLASS_TYPE_DEFINITION = 13, ///< Type definition
IMAGE_SYM_CLASS_UNDEFINED_STATIC = 14, ///< Undefined static
IMAGE_SYM_CLASS_ENUM_TAG = 15, ///< Enumeration tag
IMAGE_SYM_CLASS_MEMBER_OF_ENUM = 16, ///< Member of enumeration
IMAGE_SYM_CLASS_REGISTER_PARAM = 17, ///< Register parameter
IMAGE_SYM_CLASS_BIT_FIELD = 18, ///< Bit field
/// ".bb" or ".eb" - beginning or end of block
IMAGE_SYM_CLASS_BLOCK = 100,
/// ".bf" or ".ef" - beginning or end of function
IMAGE_SYM_CLASS_FUNCTION = 101,
IMAGE_SYM_CLASS_END_OF_STRUCT = 102, ///< End of structure
IMAGE_SYM_CLASS_FILE = 103, ///< File name
/// Line number, reformatted as symbol
IMAGE_SYM_CLASS_SECTION = 104,
IMAGE_SYM_CLASS_WEAK_EXTERNAL = 105, ///< Duplicate tag
/// External symbol in dmert public lib
IMAGE_SYM_CLASS_CLR_TOKEN = 107
};
enum SymbolBaseType : unsigned {
IMAGE_SYM_TYPE_NULL = 0, ///< No type information or unknown base type.
IMAGE_SYM_TYPE_VOID = 1, ///< Used with void pointers and functions.
IMAGE_SYM_TYPE_CHAR = 2, ///< A character (signed byte).
IMAGE_SYM_TYPE_SHORT = 3, ///< A 2-byte signed integer.
IMAGE_SYM_TYPE_INT = 4, ///< A natural integer type on the target.
IMAGE_SYM_TYPE_LONG = 5, ///< A 4-byte signed integer.
IMAGE_SYM_TYPE_FLOAT = 6, ///< A 4-byte floating-point number.
IMAGE_SYM_TYPE_DOUBLE = 7, ///< An 8-byte floating-point number.
IMAGE_SYM_TYPE_STRUCT = 8, ///< A structure.
IMAGE_SYM_TYPE_UNION = 9, ///< An union.
IMAGE_SYM_TYPE_ENUM = 10, ///< An enumerated type.
IMAGE_SYM_TYPE_MOE = 11, ///< A member of enumeration (a specific value).
IMAGE_SYM_TYPE_BYTE = 12, ///< A byte; unsigned 1-byte integer.
IMAGE_SYM_TYPE_WORD = 13, ///< A word; unsigned 2-byte integer.
IMAGE_SYM_TYPE_UINT = 14, ///< An unsigned integer of natural size.
IMAGE_SYM_TYPE_DWORD = 15 ///< An unsigned 4-byte integer.
};
enum SymbolComplexType : unsigned {
IMAGE_SYM_DTYPE_NULL = 0, ///< No complex type; simple scalar variable.
IMAGE_SYM_DTYPE_POINTER = 1, ///< A pointer to base type.
IMAGE_SYM_DTYPE_FUNCTION = 2, ///< A function that returns a base type.
IMAGE_SYM_DTYPE_ARRAY = 3, ///< An array of base type.
/// Type is formed as (base + (derived << SCT_COMPLEX_TYPE_SHIFT))
SCT_COMPLEX_TYPE_SHIFT = 4
};
enum AuxSymbolType { IMAGE_AUX_SYMBOL_TYPE_TOKEN_DEF = 1 };
struct section {
char Name[NameSize];
uint32_t VirtualSize;
uint32_t VirtualAddress;
uint32_t SizeOfRawData;
uint32_t PointerToRawData;
uint32_t PointerToRelocations;
uint32_t PointerToLineNumbers;
uint16_t NumberOfRelocations;
uint16_t NumberOfLineNumbers;
uint32_t Characteristics;
};
enum SectionCharacteristics : uint32_t {
SC_Invalid = 0xffffffff,
IMAGE_SCN_TYPE_NOLOAD = 0x00000002,
IMAGE_SCN_TYPE_NO_PAD = 0x00000008,
IMAGE_SCN_CNT_CODE = 0x00000020,
IMAGE_SCN_CNT_INITIALIZED_DATA = 0x00000040,
IMAGE_SCN_CNT_UNINITIALIZED_DATA = 0x00000080,
IMAGE_SCN_LNK_OTHER = 0x00000100,
IMAGE_SCN_LNK_INFO = 0x00000200,
IMAGE_SCN_LNK_REMOVE = 0x00000800,
IMAGE_SCN_LNK_COMDAT = 0x00001000,
IMAGE_SCN_GPREL = 0x00008000,
IMAGE_SCN_MEM_PURGEABLE = 0x00020000,
IMAGE_SCN_MEM_16BIT = 0x00020000,
IMAGE_SCN_MEM_LOCKED = 0x00040000,
IMAGE_SCN_MEM_PRELOAD = 0x00080000,
IMAGE_SCN_ALIGN_1BYTES = 0x00100000,
IMAGE_SCN_ALIGN_2BYTES = 0x00200000,
IMAGE_SCN_ALIGN_4BYTES = 0x00300000,
IMAGE_SCN_ALIGN_8BYTES = 0x00400000,
IMAGE_SCN_ALIGN_16BYTES = 0x00500000,
IMAGE_SCN_ALIGN_32BYTES = 0x00600000,
IMAGE_SCN_ALIGN_64BYTES = 0x00700000,
IMAGE_SCN_ALIGN_128BYTES = 0x00800000,
IMAGE_SCN_ALIGN_256BYTES = 0x00900000,
IMAGE_SCN_ALIGN_512BYTES = 0x00A00000,
IMAGE_SCN_ALIGN_1024BYTES = 0x00B00000,
IMAGE_SCN_ALIGN_2048BYTES = 0x00C00000,
IMAGE_SCN_ALIGN_4096BYTES = 0x00D00000,
IMAGE_SCN_ALIGN_8192BYTES = 0x00E00000,
IMAGE_SCN_ALIGN_MASK = 0x00F00000,
IMAGE_SCN_LNK_NRELOC_OVFL = 0x01000000,
IMAGE_SCN_MEM_DISCARDABLE = 0x02000000,
IMAGE_SCN_MEM_NOT_CACHED = 0x04000000,
IMAGE_SCN_MEM_NOT_PAGED = 0x08000000,
IMAGE_SCN_MEM_SHARED = 0x10000000,
IMAGE_SCN_MEM_EXECUTE = 0x20000000,
IMAGE_SCN_MEM_READ = 0x40000000,
IMAGE_SCN_MEM_WRITE = 0x80000000
};
struct relocation {
uint32_t VirtualAddress;
uint32_t SymbolTableIndex;
uint16_t Type;
};
enum RelocationTypeI386 : unsigned {
IMAGE_REL_I386_ABSOLUTE = 0x0000,
IMAGE_REL_I386_DIR16 = 0x0001,
IMAGE_REL_I386_REL16 = 0x0002,
IMAGE_REL_I386_DIR32 = 0x0006,
IMAGE_REL_I386_DIR32NB = 0x0007,
IMAGE_REL_I386_SEG12 = 0x0009,
IMAGE_REL_I386_SECTION = 0x000A,
IMAGE_REL_I386_SECREL = 0x000B,
IMAGE_REL_I386_TOKEN = 0x000C,
IMAGE_REL_I386_SECREL7 = 0x000D,
IMAGE_REL_I386_REL32 = 0x0014
};
enum RelocationTypeAMD64 : unsigned {
IMAGE_REL_AMD64_ABSOLUTE = 0x0000,
IMAGE_REL_AMD64_ADDR64 = 0x0001,
IMAGE_REL_AMD64_ADDR32 = 0x0002,
IMAGE_REL_AMD64_ADDR32NB = 0x0003,
IMAGE_REL_AMD64_REL32 = 0x0004,
IMAGE_REL_AMD64_REL32_1 = 0x0005,
IMAGE_REL_AMD64_REL32_2 = 0x0006,
IMAGE_REL_AMD64_REL32_3 = 0x0007,
IMAGE_REL_AMD64_REL32_4 = 0x0008,
IMAGE_REL_AMD64_REL32_5 = 0x0009,
IMAGE_REL_AMD64_SECTION = 0x000A,
IMAGE_REL_AMD64_SECREL = 0x000B,
IMAGE_REL_AMD64_SECREL7 = 0x000C,
IMAGE_REL_AMD64_TOKEN = 0x000D,
IMAGE_REL_AMD64_SREL32 = 0x000E,
IMAGE_REL_AMD64_PAIR = 0x000F,
IMAGE_REL_AMD64_SSPAN32 = 0x0010
};
enum RelocationTypesARM : unsigned {
IMAGE_REL_ARM_ABSOLUTE = 0x0000,
IMAGE_REL_ARM_ADDR32 = 0x0001,
IMAGE_REL_ARM_ADDR32NB = 0x0002,
IMAGE_REL_ARM_BRANCH24 = 0x0003,
IMAGE_REL_ARM_BRANCH11 = 0x0004,
IMAGE_REL_ARM_TOKEN = 0x0005,
IMAGE_REL_ARM_BLX24 = 0x0008,
IMAGE_REL_ARM_BLX11 = 0x0009,
IMAGE_REL_ARM_REL32 = 0x000A,
IMAGE_REL_ARM_SECTION = 0x000E,
IMAGE_REL_ARM_SECREL = 0x000F,
IMAGE_REL_ARM_MOV32A = 0x0010,
IMAGE_REL_ARM_MOV32T = 0x0011,
IMAGE_REL_ARM_BRANCH20T = 0x0012,
IMAGE_REL_ARM_BRANCH24T = 0x0014,
IMAGE_REL_ARM_BLX23T = 0x0015,
IMAGE_REL_ARM_PAIR = 0x0016,
};
enum RelocationTypesARM64 : unsigned {
IMAGE_REL_ARM64_ABSOLUTE = 0x0000,
IMAGE_REL_ARM64_ADDR32 = 0x0001,
IMAGE_REL_ARM64_ADDR32NB = 0x0002,
IMAGE_REL_ARM64_BRANCH26 = 0x0003,
IMAGE_REL_ARM64_PAGEBASE_REL21 = 0x0004,
IMAGE_REL_ARM64_REL21 = 0x0005,
IMAGE_REL_ARM64_PAGEOFFSET_12A = 0x0006,
IMAGE_REL_ARM64_PAGEOFFSET_12L = 0x0007,
IMAGE_REL_ARM64_SECREL = 0x0008,
IMAGE_REL_ARM64_SECREL_LOW12A = 0x0009,
IMAGE_REL_ARM64_SECREL_HIGH12A = 0x000A,
IMAGE_REL_ARM64_SECREL_LOW12L = 0x000B,
IMAGE_REL_ARM64_TOKEN = 0x000C,
IMAGE_REL_ARM64_SECTION = 0x000D,
IMAGE_REL_ARM64_ADDR64 = 0x000E,
IMAGE_REL_ARM64_BRANCH19 = 0x000F,
IMAGE_REL_ARM64_BRANCH14 = 0x0010,
IMAGE_REL_ARM64_REL32 = 0x0011,
};
enum COMDATType : uint8_t {
IMAGE_COMDAT_SELECT_NODUPLICATES = 1,
IMAGE_COMDAT_SELECT_ANY,
IMAGE_COMDAT_SELECT_SAME_SIZE,
IMAGE_COMDAT_SELECT_EXACT_MATCH,
IMAGE_COMDAT_SELECT_ASSOCIATIVE,
IMAGE_COMDAT_SELECT_LARGEST,
IMAGE_COMDAT_SELECT_NEWEST
};
// Auxiliary Symbol Formats
struct AuxiliaryFunctionDefinition {
uint32_t TagIndex;
uint32_t TotalSize;
uint32_t PointerToLinenumber;
uint32_t PointerToNextFunction;
char unused[2];
};
struct AuxiliarybfAndefSymbol {
uint8_t unused1[4];
uint16_t Linenumber;
uint8_t unused2[6];
uint32_t PointerToNextFunction;
uint8_t unused3[2];
};
struct AuxiliaryWeakExternal {
uint32_t TagIndex;
uint32_t Characteristics;
uint8_t unused[10];
};
enum WeakExternalCharacteristics : unsigned {
IMAGE_WEAK_EXTERN_SEARCH_NOLIBRARY = 1,
IMAGE_WEAK_EXTERN_SEARCH_LIBRARY = 2,
IMAGE_WEAK_EXTERN_SEARCH_ALIAS = 3,
IMAGE_WEAK_EXTERN_ANTI_DEPENDENCY = 4
};
struct AuxiliarySectionDefinition {
uint32_t Length;
uint16_t NumberOfRelocations;
uint16_t NumberOfLinenumbers;
uint32_t CheckSum;
uint32_t Number;
uint8_t Selection;
char unused;
};
struct AuxiliaryCLRToken {
uint8_t AuxType;
uint8_t unused1;
uint32_t SymbolTableIndex;
char unused2[12];
};
union Auxiliary {
AuxiliaryFunctionDefinition FunctionDefinition;
AuxiliarybfAndefSymbol bfAndefSymbol;
AuxiliaryWeakExternal WeakExternal;
AuxiliarySectionDefinition SectionDefinition;
};
/// The Import Directory Table.
///
/// There is a single array of these and one entry per imported DLL.
struct ImportDirectoryTableEntry {
uint32_t ImportLookupTableRVA;
uint32_t TimeDateStamp;
uint32_t ForwarderChain;
uint32_t NameRVA;
uint32_t ImportAddressTableRVA;
};
/// The PE32 Import Lookup Table.
///
/// There is an array of these for each imported DLL. It represents either
/// the ordinal to import from the target DLL, or a name to lookup and import
/// from the target DLL.
///
/// This also happens to be the same format used by the Import Address Table
/// when it is initially written out to the image.
struct ImportLookupTableEntry32 {
uint32_t data;
/// Is this entry specified by ordinal, or name?
bool isOrdinal() const { return data & 0x80000000; }
/// Get the ordinal value of this entry. isOrdinal must be true.
uint16_t getOrdinal() const {
assert(isOrdinal() && "ILT entry is not an ordinal!");
return data & 0xFFFF;
}
/// Set the ordinal value and set isOrdinal to true.
void setOrdinal(uint16_t o) {
data = o;
data |= 0x80000000;
}
/// Get the Hint/Name entry RVA. isOrdinal must be false.
uint32_t getHintNameRVA() const {
assert(!isOrdinal() && "ILT entry is not a Hint/Name RVA!");
return data;
}
/// Set the Hint/Name entry RVA and set isOrdinal to false.
void setHintNameRVA(uint32_t rva) { data = rva; }
};
/// The DOS compatible header at the front of all PEs.
struct DOSHeader {
uint16_t Magic;
uint16_t UsedBytesInTheLastPage;
uint16_t FileSizeInPages;
uint16_t NumberOfRelocationItems;
uint16_t HeaderSizeInParagraphs;
uint16_t MinimumExtraParagraphs;
uint16_t MaximumExtraParagraphs;
uint16_t InitialRelativeSS;
uint16_t InitialSP;
uint16_t Checksum;
uint16_t InitialIP;
uint16_t InitialRelativeCS;
uint16_t AddressOfRelocationTable;
uint16_t OverlayNumber;
uint16_t Reserved[4];
uint16_t OEMid;
uint16_t OEMinfo;
uint16_t Reserved2[10];
uint32_t AddressOfNewExeHeader;
};
struct PE32Header {
enum { PE32 = 0x10b, PE32_PLUS = 0x20b };
uint16_t Magic;
uint8_t MajorLinkerVersion;
uint8_t MinorLinkerVersion;
uint32_t SizeOfCode;
uint32_t SizeOfInitializedData;
uint32_t SizeOfUninitializedData;
uint32_t AddressOfEntryPoint; // RVA
uint32_t BaseOfCode; // RVA
uint32_t BaseOfData; // RVA
uint64_t ImageBase;
uint32_t SectionAlignment;
uint32_t FileAlignment;
uint16_t MajorOperatingSystemVersion;
uint16_t MinorOperatingSystemVersion;
uint16_t MajorImageVersion;
uint16_t MinorImageVersion;
uint16_t MajorSubsystemVersion;
uint16_t MinorSubsystemVersion;
uint32_t Win32VersionValue;
uint32_t SizeOfImage;
uint32_t SizeOfHeaders;
uint32_t CheckSum;
uint16_t Subsystem;
// FIXME: This should be DllCharacteristics to match the COFF spec.
uint16_t DLLCharacteristics;
uint64_t SizeOfStackReserve;
uint64_t SizeOfStackCommit;
uint64_t SizeOfHeapReserve;
uint64_t SizeOfHeapCommit;
uint32_t LoaderFlags;
// FIXME: This should be NumberOfRvaAndSizes to match the COFF spec.
uint32_t NumberOfRvaAndSize;
};
struct DataDirectory {
uint32_t RelativeVirtualAddress;
uint32_t Size;
};
enum DataDirectoryIndex : unsigned {
EXPORT_TABLE = 0,
IMPORT_TABLE,
RESOURCE_TABLE,
EXCEPTION_TABLE,
CERTIFICATE_TABLE,
BASE_RELOCATION_TABLE,
DEBUG_DIRECTORY,
ARCHITECTURE,
GLOBAL_PTR,
TLS_TABLE,
LOAD_CONFIG_TABLE,
BOUND_IMPORT,
IAT,
DELAY_IMPORT_DESCRIPTOR,
CLR_RUNTIME_HEADER,
NUM_DATA_DIRECTORIES
};
enum WindowsSubsystem : unsigned {
IMAGE_SUBSYSTEM_UNKNOWN = 0, ///< An unknown subsystem.
IMAGE_SUBSYSTEM_NATIVE = 1, ///< Device drivers and native Windows processes
IMAGE_SUBSYSTEM_WINDOWS_GUI = 2, ///< The Windows GUI subsystem.
IMAGE_SUBSYSTEM_WINDOWS_CUI = 3, ///< The Windows character subsystem.
IMAGE_SUBSYSTEM_OS2_CUI = 5, ///< The OS/2 character subsystem.
IMAGE_SUBSYSTEM_POSIX_CUI = 7, ///< The POSIX character subsystem.
IMAGE_SUBSYSTEM_NATIVE_WINDOWS = 8, ///< Native Windows 9x driver.
IMAGE_SUBSYSTEM_WINDOWS_CE_GUI = 9, ///< Windows CE.
IMAGE_SUBSYSTEM_EFI_APPLICATION = 10, ///< An EFI application.
IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER = 11, ///< An EFI driver with boot
/// services.
IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER = 12, ///< An EFI driver with run-time
/// services.
IMAGE_SUBSYSTEM_EFI_ROM = 13, ///< An EFI ROM image.
IMAGE_SUBSYSTEM_XBOX = 14, ///< XBOX.
IMAGE_SUBSYSTEM_WINDOWS_BOOT_APPLICATION = 16 ///< A BCD application.
};
enum DLLCharacteristics : unsigned {
/// ASLR with 64 bit address space.
IMAGE_DLL_CHARACTERISTICS_HIGH_ENTROPY_VA = 0x0020,
/// DLL can be relocated at load time.
IMAGE_DLL_CHARACTERISTICS_DYNAMIC_BASE = 0x0040,
/// Code integrity checks are enforced.
IMAGE_DLL_CHARACTERISTICS_FORCE_INTEGRITY = 0x0080,
///< Image is NX compatible.
IMAGE_DLL_CHARACTERISTICS_NX_COMPAT = 0x0100,
/// Isolation aware, but do not isolate the image.
IMAGE_DLL_CHARACTERISTICS_NO_ISOLATION = 0x0200,
/// Does not use structured exception handling (SEH). No SEH handler may be
/// called in this image.
IMAGE_DLL_CHARACTERISTICS_NO_SEH = 0x0400,
/// Do not bind the image.
IMAGE_DLL_CHARACTERISTICS_NO_BIND = 0x0800,
///< Image should execute in an AppContainer.
IMAGE_DLL_CHARACTERISTICS_APPCONTAINER = 0x1000,
///< A WDM driver.
IMAGE_DLL_CHARACTERISTICS_WDM_DRIVER = 0x2000,
///< Image supports Control Flow Guard.
IMAGE_DLL_CHARACTERISTICS_GUARD_CF = 0x4000,
/// Terminal Server aware.
IMAGE_DLL_CHARACTERISTICS_TERMINAL_SERVER_AWARE = 0x8000
};
enum ExtendedDLLCharacteristics : unsigned {
/// Image is CET compatible
IMAGE_DLL_CHARACTERISTICS_EX_CET_COMPAT = 0x0001
};
enum DebugType : unsigned {
IMAGE_DEBUG_TYPE_UNKNOWN = 0,
IMAGE_DEBUG_TYPE_COFF = 1,
IMAGE_DEBUG_TYPE_CODEVIEW = 2,
IMAGE_DEBUG_TYPE_FPO = 3,
IMAGE_DEBUG_TYPE_MISC = 4,
IMAGE_DEBUG_TYPE_EXCEPTION = 5,
IMAGE_DEBUG_TYPE_FIXUP = 6,
IMAGE_DEBUG_TYPE_OMAP_TO_SRC = 7,
IMAGE_DEBUG_TYPE_OMAP_FROM_SRC = 8,
IMAGE_DEBUG_TYPE_BORLAND = 9,
IMAGE_DEBUG_TYPE_RESERVED10 = 10,
IMAGE_DEBUG_TYPE_CLSID = 11,
IMAGE_DEBUG_TYPE_VC_FEATURE = 12,
IMAGE_DEBUG_TYPE_POGO = 13,
IMAGE_DEBUG_TYPE_ILTCG = 14,
IMAGE_DEBUG_TYPE_MPX = 15,
IMAGE_DEBUG_TYPE_REPRO = 16,
IMAGE_DEBUG_TYPE_EX_DLLCHARACTERISTICS = 20,
};
enum BaseRelocationType : unsigned {
IMAGE_REL_BASED_ABSOLUTE = 0,
IMAGE_REL_BASED_HIGH = 1,
IMAGE_REL_BASED_LOW = 2,
IMAGE_REL_BASED_HIGHLOW = 3,
IMAGE_REL_BASED_HIGHADJ = 4,
IMAGE_REL_BASED_MIPS_JMPADDR = 5,
IMAGE_REL_BASED_ARM_MOV32A = 5,
IMAGE_REL_BASED_ARM_MOV32T = 7,
IMAGE_REL_BASED_MIPS_JMPADDR16 = 9,
IMAGE_REL_BASED_DIR64 = 10
};
enum ImportType : unsigned {
IMPORT_CODE = 0,
IMPORT_DATA = 1,
IMPORT_CONST = 2
};
enum ImportNameType : unsigned {
/// Import is by ordinal. This indicates that the value in the Ordinal/Hint
/// field of the import header is the import's ordinal. If this constant is
/// not specified, then the Ordinal/Hint field should always be interpreted
/// as the import's hint.
IMPORT_ORDINAL = 0,
/// The import name is identical to the public symbol name
IMPORT_NAME = 1,
/// The import name is the public symbol name, but skipping the leading ?,
/// @, or optionally _.
IMPORT_NAME_NOPREFIX = 2,
/// The import name is the public symbol name, but skipping the leading ?,
/// @, or optionally _, and truncating at the first @.
IMPORT_NAME_UNDECORATE = 3
};
enum class GuardFlags : uint32_t {
/// Module performs control flow integrity checks using system-supplied
/// support.
CF_INSTRUMENTED = 0x100,
/// Module performs control flow and write integrity checks.
CFW_INSTRUMENTED = 0x200,
/// Module contains valid control flow target metadata.
CF_FUNCTION_TABLE_PRESENT = 0x400,
/// Module does not make use of the /GS security cookie.
SECURITY_COOKIE_UNUSED = 0x800,
/// Module supports read only delay load IAT.
PROTECT_DELAYLOAD_IAT = 0x1000,
/// Delayload import table in its own .didat section (with nothing else in it)
/// that can be freely reprotected.
DELAYLOAD_IAT_IN_ITS_OWN_SECTION = 0x2000,
/// Module contains suppressed export information. This also infers that the
/// address taken IAT table is also present in the load config.
CF_EXPORT_SUPPRESSION_INFO_PRESENT = 0x4000,
/// Module enables suppression of exports.
CF_ENABLE_EXPORT_SUPPRESSION = 0x8000,
/// Module contains longjmp target information.
CF_LONGJUMP_TABLE_PRESENT = 0x10000,
/// Module contains EH continuation target information.
EH_CONTINUATION_TABLE_PRESENT = 0x400000,
/// Mask for the subfield that contains the stride of Control Flow Guard
/// function table entries (that is, the additional count of bytes per table
/// entry).
CF_FUNCTION_TABLE_SIZE_MASK = 0xF0000000,
CF_FUNCTION_TABLE_SIZE_5BYTES = 0x10000000,
CF_FUNCTION_TABLE_SIZE_6BYTES = 0x20000000,
CF_FUNCTION_TABLE_SIZE_7BYTES = 0x30000000,
CF_FUNCTION_TABLE_SIZE_8BYTES = 0x40000000,
CF_FUNCTION_TABLE_SIZE_9BYTES = 0x50000000,
CF_FUNCTION_TABLE_SIZE_10BYTES = 0x60000000,
CF_FUNCTION_TABLE_SIZE_11BYTES = 0x70000000,
CF_FUNCTION_TABLE_SIZE_12BYTES = 0x80000000,
CF_FUNCTION_TABLE_SIZE_13BYTES = 0x90000000,
CF_FUNCTION_TABLE_SIZE_14BYTES = 0xA0000000,
CF_FUNCTION_TABLE_SIZE_15BYTES = 0xB0000000,
CF_FUNCTION_TABLE_SIZE_16BYTES = 0xC0000000,
CF_FUNCTION_TABLE_SIZE_17BYTES = 0xD0000000,
CF_FUNCTION_TABLE_SIZE_18BYTES = 0xE0000000,
CF_FUNCTION_TABLE_SIZE_19BYTES = 0xF0000000,
};
struct ImportHeader {
uint16_t Sig1; ///< Must be IMAGE_FILE_MACHINE_UNKNOWN (0).
uint16_t Sig2; ///< Must be 0xFFFF.
uint16_t Version;
uint16_t Machine;
uint32_t TimeDateStamp;
uint32_t SizeOfData;
uint16_t OrdinalHint;
uint16_t TypeInfo;
ImportType getType() const { return static_cast<ImportType>(TypeInfo & 0x3); }
ImportNameType getNameType() const {
return static_cast<ImportNameType>((TypeInfo & 0x1C) >> 2);
}
};
enum CodeViewIdentifiers {
DEBUG_SECTION_MAGIC = 0x4,
DEBUG_HASHES_SECTION_MAGIC = 0x133C9C5
};
// These flags show up in the @feat.00 symbol. They appear to be some kind of
// compiler features bitfield read by link.exe.
enum Feat00Flags : uint32_t {
// Object is compatible with /safeseh.
SafeSEH = 0x1,
// Object was compiled with /GS.
GuardStack = 0x100,
// Object was compiled with /sdl.
SDL = 0x200,
// Object was compiled with /guard:cf.
GuardCF = 0x800,
// Object was compiled with /guard:ehcont.
GuardEHCont = 0x4000,
// Object was compiled with /kernel.
Kernel = 0x40000000,
};
inline bool isReservedSectionNumber(int32_t SectionNumber) {
return SectionNumber <= 0;
}
/// Encode section name based on string table offset.
/// The size of Out must be at least COFF::NameSize.
bool encodeSectionName(char *Out, uint64_t Offset);
} // End namespace COFF.
} // End namespace llvm.
#endif
PK hwFZ|� �]
]
BinaryFormat/MsgPack.hnu �[��� //===-- MsgPack.h - MessagePack Constants -----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file contains constants used for implementing MessagePack support.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_BINARYFORMAT_MSGPACK_H
#define LLVM_BINARYFORMAT_MSGPACK_H
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/Endian.h"
namespace llvm {
namespace msgpack {
/// The endianness of all multi-byte encoded values in MessagePack.
constexpr support::endianness Endianness = support::big;
/// The first byte identifiers of MessagePack object formats.
namespace FirstByte {
#define HANDLE_MP_FIRST_BYTE(ID, NAME) constexpr uint8_t NAME = ID;
#include "llvm/BinaryFormat/MsgPack.def"
}
/// Most significant bits used to identify "Fix" variants in MessagePack.
///
/// For example, FixStr objects encode their size in the five least significant
/// bits of their first byte, which is identified by the bit pattern "101" in
/// the three most significant bits. So FixBits::String contains 0b10100000.
///
/// A corresponding mask of the bit pattern is found in \c FixBitsMask.
namespace FixBits {
#define HANDLE_MP_FIX_BITS(ID, NAME) constexpr uint8_t NAME = ID;
#include "llvm/BinaryFormat/MsgPack.def"
}
/// Mask of bits used to identify "Fix" variants in MessagePack.
///
/// For example, FixStr objects encode their size in the five least significant
/// bits of their first byte, which is identified by the bit pattern "101" in
/// the three most significant bits. So FixBitsMask::String contains
/// 0b11100000.
///
/// The corresponding bit pattern to mask for is found in FixBits.
namespace FixBitsMask {
#define HANDLE_MP_FIX_BITS_MASK(ID, NAME) constexpr uint8_t NAME = ID;
#include "llvm/BinaryFormat/MsgPack.def"
}
/// The maximum value or size encodable in "Fix" variants of formats.
///
/// For example, FixStr objects encode their size in the five least significant
/// bits of their first byte, so the largest encodable size is 0b00011111.
namespace FixMax {
#define HANDLE_MP_FIX_MAX(ID, NAME) constexpr uint8_t NAME = ID;
#include "llvm/BinaryFormat/MsgPack.def"
}
/// The exact size encodable in "Fix" variants of formats.
///
/// The only objects for which an exact size makes sense are of Extension type.
///
/// For example, FixExt4 stores an extension type containing exactly four bytes.
namespace FixLen {
#define HANDLE_MP_FIX_LEN(ID, NAME) constexpr uint8_t NAME = ID;
#include "llvm/BinaryFormat/MsgPack.def"
}
/// The minimum value or size encodable in "Fix" variants of formats.
///
/// The only object for which a minimum makes sense is a negative FixNum.
///
/// Negative FixNum objects encode their signed integer value in one byte, but
/// they must have the pattern "111" as their three most significant bits. This
/// means all values are negative, and the smallest representable value is
/// 0b11100000.
namespace FixMin {
#define HANDLE_MP_FIX_MIN(ID, NAME) constexpr int8_t NAME = ID;
#include "llvm/BinaryFormat/MsgPack.def"
}
} // end namespace msgpack
} // end namespace llvm
#endif // LLVM_BINARYFORMAT_MSGPACK_H
PK hwFZB>�g"O "O BinaryFormat/XCOFF.hnu �[��� //===-- llvm/BinaryFormat/XCOFF.h - The XCOFF file format -------*- C++/-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines manifest constants for the XCOFF object file format.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_BINARYFORMAT_XCOFF_H
#define LLVM_BINARYFORMAT_XCOFF_H
#include <stddef.h>
#include <stdint.h>
namespace llvm {
class StringRef;
template <unsigned> class SmallString;
template <typename T> class Expected;
namespace XCOFF {
// Constants used in the XCOFF definition.
constexpr size_t FileNamePadSize = 6;
constexpr size_t NameSize = 8;
constexpr size_t FileHeaderSize32 = 20;
constexpr size_t FileHeaderSize64 = 24;
constexpr size_t AuxFileHeaderSize32 = 72;
constexpr size_t AuxFileHeaderSize64 = 110;
constexpr size_t AuxFileHeaderSizeShort = 28;
constexpr size_t SectionHeaderSize32 = 40;
constexpr size_t SectionHeaderSize64 = 72;
constexpr size_t SymbolTableEntrySize = 18;
constexpr size_t RelocationSerializationSize32 = 10;
constexpr size_t RelocationSerializationSize64 = 14;
constexpr size_t ExceptionSectionEntrySize32 = 6;
constexpr size_t ExceptionSectionEntrySize64 = 10;
constexpr uint16_t RelocOverflow = 65535;
constexpr uint8_t AllocRegNo = 31;
enum ReservedSectionNum : int16_t { N_DEBUG = -2, N_ABS = -1, N_UNDEF = 0 };
enum MagicNumber : uint16_t { XCOFF32 = 0x01DF, XCOFF64 = 0x01F7 };
// Masks for packing/unpacking the r_rsize field of relocations.
// The msb is used to indicate if the bits being relocated are signed or
// unsigned.
static constexpr uint8_t XR_SIGN_INDICATOR_MASK = 0x80;
// The 2nd msb is used to indicate that the binder has replaced/modified the
// original instruction.
static constexpr uint8_t XR_FIXUP_INDICATOR_MASK = 0x40;
// The remaining bits specify the bit length of the relocatable reference
// minus one.
static constexpr uint8_t XR_BIASED_LENGTH_MASK = 0x3f;
// This field only exists in the XCOFF64 definition.
enum AuxHeaderFlags64 : uint16_t {
SHR_SYMTAB = 0x8000, ///< At exec time, create shared symbol table for program
///< (main program only).
FORK_POLICY = 0x4000, ///< Forktree policy specified (main program only).
FORK_COR = 0x2000 ///< If _AOUT_FORK_POLICY is set, specify copy-on-reference
///< if this bit is set. Specify copy-on- write otherwise.
///< If _AOUT_FORK_POLICY is 0, this bit is reserved for
///< future use and should be set to 0.
};
enum XCOFFInterpret : uint16_t {
OLD_XCOFF_INTERPRET = 1,
NEW_XCOFF_INTERPRET = 2
};
enum FileFlag : uint16_t {
F_RELFLG = 0x0001, ///< relocation info stripped from file
F_EXEC = 0x0002, ///< file is executable (i.e., it
///< has a loader section)
F_LNNO = 0x0004, ///< line numbers stripped from file
F_LSYMS = 0x0008, ///< local symbols stripped from file
F_FDPR_PROF = 0x0010, ///< file was profiled with FDPR
F_FDPR_OPTI = 0x0020, ///< file was reordered with FDPR
F_DSA = 0x0040, ///< file uses Dynamic Segment Allocation (32-bit
///< only)
F_DEP_1 = 0x0080, ///< Data Execution Protection bit 1
F_VARPG = 0x0100, ///< executable requests using variable size pages
F_LPTEXT = 0x0400, ///< executable requires large pages for text
F_LPDATA = 0x0800, ///< executable requires large pages for data
F_DYNLOAD = 0x1000, ///< file is dynamically loadable and
///< executable (equivalent to F_EXEC on AIX)
F_SHROBJ = 0x2000, ///< file is a shared object
F_LOADONLY =
0x4000, ///< file can be loaded by the system loader, but it is
///< ignored by the linker if it is a member of an archive.
F_DEP_2 = 0x8000 ///< Data Execution Protection bit 2
};
// x_smclas field of x_csect from system header: /usr/include/syms.h
/// Storage Mapping Class definitions.
enum StorageMappingClass : uint8_t {
// READ ONLY CLASSES
XMC_PR = 0, ///< Program Code
XMC_RO = 1, ///< Read Only Constant
XMC_DB = 2, ///< Debug Dictionary Table
XMC_GL = 6, ///< Global Linkage (Interfile Interface Code)
XMC_XO = 7, ///< Extended Operation (Pseudo Machine Instruction)
XMC_SV = 8, ///< Supervisor Call (32-bit process only)
XMC_SV64 = 17, ///< Supervisor Call for 64-bit process
XMC_SV3264 = 18, ///< Supervisor Call for both 32- and 64-bit processes
XMC_TI = 12, ///< Traceback Index csect
XMC_TB = 13, ///< Traceback Table csect
// READ WRITE CLASSES
XMC_RW = 5, ///< Read Write Data
XMC_TC0 = 15, ///< TOC Anchor for TOC Addressability
XMC_TC = 3, ///< General TOC item
XMC_TD = 16, ///< Scalar data item in the TOC
XMC_DS = 10, ///< Descriptor csect
XMC_UA = 4, ///< Unclassified - Treated as Read Write
XMC_BS = 9, ///< BSS class (uninitialized static internal)
XMC_UC = 11, ///< Un-named Fortran Common
XMC_TL = 20, ///< Initialized thread-local variable
XMC_UL = 21, ///< Uninitialized thread-local variable
XMC_TE = 22 ///< Symbol mapped at the end of TOC
};
// Flags for defining the section type. Masks for use with the (signed, 32-bit)
// s_flags field of the section header structure, selecting for values in the
// lower 16 bits. Defined in the system header `scnhdr.h`.
enum SectionTypeFlags : int32_t {
STYP_PAD = 0x0008,
STYP_DWARF = 0x0010,
STYP_TEXT = 0x0020,
STYP_DATA = 0x0040,
STYP_BSS = 0x0080,
STYP_EXCEPT = 0x0100,
STYP_INFO = 0x0200,
STYP_TDATA = 0x0400,
STYP_TBSS = 0x0800,
STYP_LOADER = 0x1000,
STYP_DEBUG = 0x2000,
STYP_TYPCHK = 0x4000,
STYP_OVRFLO = 0x8000
};
/// Values for defining the section subtype of sections of type STYP_DWARF as
/// they would appear in the (signed, 32-bit) s_flags field of the section
/// header structure, contributing to the 16 most significant bits. Defined in
/// the system header `scnhdr.h`.
enum DwarfSectionSubtypeFlags : int32_t {
SSUBTYP_DWINFO = 0x1'0000, ///< DWARF info section
SSUBTYP_DWLINE = 0x2'0000, ///< DWARF line section
SSUBTYP_DWPBNMS = 0x3'0000, ///< DWARF pubnames section
SSUBTYP_DWPBTYP = 0x4'0000, ///< DWARF pubtypes section
SSUBTYP_DWARNGE = 0x5'0000, ///< DWARF aranges section
SSUBTYP_DWABREV = 0x6'0000, ///< DWARF abbrev section
SSUBTYP_DWSTR = 0x7'0000, ///< DWARF str section
SSUBTYP_DWRNGES = 0x8'0000, ///< DWARF ranges section
SSUBTYP_DWLOC = 0x9'0000, ///< DWARF loc section
SSUBTYP_DWFRAME = 0xA'0000, ///< DWARF frame section
SSUBTYP_DWMAC = 0xB'0000 ///< DWARF macinfo section
};
// STORAGE CLASSES, n_sclass field of syment.
// The values come from `storclass.h` and `dbxstclass.h`.
enum StorageClass : uint8_t {
// Storage classes used for symbolic debugging symbols.
C_FILE = 103, // File name
C_BINCL = 108, // Beginning of include file
C_EINCL = 109, // Ending of include file
C_GSYM = 128, // Global variable
C_STSYM = 133, // Statically allocated symbol
C_BCOMM = 135, // Beginning of common block
C_ECOMM = 137, // End of common block
C_ENTRY = 141, // Alternate entry
C_BSTAT = 143, // Beginning of static block
C_ESTAT = 144, // End of static block
C_GTLS = 145, // Global thread-local variable
C_STTLS = 146, // Static thread-local variable
// Storage classes used for DWARF symbols.
C_DWARF = 112, // DWARF section symbol
// Storage classes used for absolute symbols.
C_LSYM = 129, // Automatic variable allocated on stack
C_PSYM = 130, // Argument to subroutine allocated on stack
C_RSYM = 131, // Register variable
C_RPSYM = 132, // Argument to function or procedure stored in register
C_ECOML = 136, // Local member of common block
C_FUN = 142, // Function or procedure
// Storage classes used for undefined external symbols or
// symbols of general sections.
C_EXT = 2, // External symbol
C_WEAKEXT = 111, // Weak external symbol
// Storage classes used for symbols of general sections.
C_NULL = 0,
C_STAT = 3, // Static
C_BLOCK = 100, // ".bb" or ".eb"
C_FCN = 101, // ".bf" or ".ef"
C_HIDEXT = 107, // Un-named external symbol
C_INFO = 110, // Comment string in .info section
C_DECL = 140, // Declaration of object (type)
// Storage classes - Obsolete/Undocumented.
C_AUTO = 1, // Automatic variable
C_REG = 4, // Register variable
C_EXTDEF = 5, // External definition
C_LABEL = 6, // Label
C_ULABEL = 7, // Undefined label
C_MOS = 8, // Member of structure
C_ARG = 9, // Function argument
C_STRTAG = 10, // Structure tag
C_MOU = 11, // Member of union
C_UNTAG = 12, // Union tag
C_TPDEF = 13, // Type definition
C_USTATIC = 14, // Undefined static
C_ENTAG = 15, // Enumeration tag
C_MOE = 16, // Member of enumeration
C_REGPARM = 17, // Register parameter
C_FIELD = 18, // Bit field
C_EOS = 102, // End of structure
C_LINE = 104,
C_ALIAS = 105, // Duplicate tag
C_HIDDEN = 106, // Special storage class for external
C_EFCN = 255, // Physical end of function
// Storage classes - reserved
C_TCSYM = 134 // Reserved
};
// Flags for defining the symbol type. Values to be encoded into the lower 3
// bits of the (unsigned, 8-bit) x_smtyp field of csect auxiliary symbol table
// entries. Defined in the system header `syms.h`.
enum SymbolType : uint8_t {
XTY_ER = 0, ///< External reference.
XTY_SD = 1, ///< Csect definition for initialized storage.
XTY_LD = 2, ///< Label definition.
///< Defines an entry point to an initialized csect.
XTY_CM = 3 ///< Common csect definition. For uninitialized storage.
};
/// Values for visibility as they would appear when encoded in the high 4 bits
/// of the 16-bit unsigned n_type field of symbol table entries. Valid for
/// 32-bit XCOFF only when the vstamp in the auxiliary header is greater than 1.
enum VisibilityType : uint16_t {
SYM_V_UNSPECIFIED = 0x0000,
SYM_V_INTERNAL = 0x1000,
SYM_V_HIDDEN = 0x2000,
SYM_V_PROTECTED = 0x3000,
SYM_V_EXPORTED = 0x4000
};
constexpr uint16_t VISIBILITY_MASK = 0x7000;
// Relocation types, defined in `/usr/include/reloc.h`.
enum RelocationType : uint8_t {
R_POS = 0x00, ///< Positive relocation. Provides the address of the referenced
///< symbol.
R_RL = 0x0c, ///< Positive indirect load relocation. Modifiable instruction.
R_RLA = 0x0d, ///< Positive load address relocation. Modifiable instruction.
R_NEG = 0x01, ///< Negative relocation. Provides the negative of the address
///< of the referenced symbol.
R_REL = 0x02, ///< Relative to self relocation. Provides a displacement value
///< between the address of the referenced symbol and the
///< address being relocated.
R_TOC = 0x03, ///< Relative to the TOC relocation. Provides a displacement
///< that is the difference between the address of the
///< referenced symbol and the TOC anchor csect.
R_TRL = 0x12, ///< TOC relative indirect load relocation. Similar to R_TOC,
///< but not modifiable instruction.
R_TRLA =
0x13, ///< Relative to the TOC or to the thread-local storage base
///< relocation. Compilers are not permitted to generate this
///< relocation type. It is the result of a reversible
///< transformation by the linker of an R_TOC relation that turned a
///< load instruction into an add-immediate instruction.
R_GL = 0x05, ///< Global linkage-external TOC address relocation. Provides the
///< address of the external TOC associated with a defined
///< external symbol.
R_TCL = 0x06, ///< Local object TOC address relocation. Provides the address
///< of the local TOC entry of a defined external symbol.
R_REF = 0x0f, ///< A non-relocating relocation. Used to prevent the binder
///< from garbage collecting a csect (such as code used for
///< dynamic initialization of non-local statics) for which
///< another csect has an implicit dependency.
R_BA = 0x08, ///< Branch absolute relocation. Provides the address of the
///< referenced symbol. References a non-modifiable instruction.
R_BR = 0x0a, ///< Branch relative to self relocation. Provides the
///< displacement that is the difference between the address of
///< the referenced symbol and the address of the referenced
///< branch instruction. References a non-modifiable instruction.
R_RBA = 0x18, ///< Branch absolute relocation. Similar to R_BA but
///< references a modifiable instruction.
R_RBR = 0x1a, ///< Branch relative to self relocation. Similar to the R_BR
///< relocation type, but references a modifiable instruction.
R_TLS = 0x20, ///< General-dynamic reference to TLS symbol.
R_TLS_IE = 0x21, ///< Initial-exec reference to TLS symbol.
R_TLS_LD = 0x22, ///< Local-dynamic reference to TLS symbol.
R_TLS_LE = 0x23, ///< Local-exec reference to TLS symbol.
R_TLSM = 0x24, ///< Module reference to TLS. Provides a handle for the module
///< containing the referenced symbol.
R_TLSML = 0x25, ///< Module reference to the local TLS storage.
R_TOCU = 0x30, ///< Relative to TOC upper. Specifies the high-order 16 bits of
///< a large code model TOC-relative relocation.
R_TOCL = 0x31 ///< Relative to TOC lower. Specifies the low-order 16 bits of a
///< large code model TOC-relative relocation.
};
enum CFileStringType : uint8_t {
XFT_FN = 0, ///< Specifies the source-file name.
XFT_CT = 1, ///< Specifies the compiler time stamp.
XFT_CV = 2, ///< Specifies the compiler version number.
XFT_CD = 128 ///< Specifies compiler-defined information.
};
enum CFileLangId : uint8_t {
TB_C = 0, ///< C language.
TB_Fortran = 1, ///< Fortran language.
TB_CPLUSPLUS = 9 ///< C++ language.
};
enum CFileCpuId : uint8_t {
TCPU_PPC64 = 2, ///< PowerPC common architecture 64-bit mode.
TCPU_COM = 3, ///< POWER and PowerPC architecture common.
TCPU_970 = 19 ///< PPC970 - PowerPC 64-bit architecture.
};
enum SymbolAuxType : uint8_t {
AUX_EXCEPT = 255, ///< Identifies an exception auxiliary entry.
AUX_FCN = 254, ///< Identifies a function auxiliary entry.
AUX_SYM = 253, ///< Identifies a symbol auxiliary entry.
AUX_FILE = 252, ///< Identifies a file auxiliary entry.
AUX_CSECT = 251, ///< Identifies a csect auxiliary entry.
AUX_SECT = 250 ///< Identifies a SECT auxiliary entry.
}; // 64-bit XCOFF file only.
StringRef getMappingClassString(XCOFF::StorageMappingClass SMC);
StringRef getRelocationTypeString(XCOFF::RelocationType Type);
Expected<SmallString<32>> parseParmsType(uint32_t Value, unsigned FixedParmsNum,
unsigned FloatingParmsNum);
Expected<SmallString<32>> parseParmsTypeWithVecInfo(uint32_t Value,
unsigned FixedParmsNum,
unsigned FloatingParmsNum,
unsigned VectorParmsNum);
Expected<SmallString<32>> parseVectorParmsType(uint32_t Value,
unsigned ParmsNum);
struct TracebackTable {
enum LanguageID : uint8_t {
C,
Fortran,
Pascal,
Ada,
PL1,
Basic,
Lisp,
Cobol,
Modula2,
CPlusPlus,
Rpg,
PL8,
PLIX = PL8,
Assembly,
Java,
ObjectiveC
};
// Byte 1
static constexpr uint32_t VersionMask = 0xFF00'0000;
static constexpr uint8_t VersionShift = 24;
// Byte 2
static constexpr uint32_t LanguageIdMask = 0x00FF'0000;
static constexpr uint8_t LanguageIdShift = 16;
// Byte 3
static constexpr uint32_t IsGlobaLinkageMask = 0x0000'8000;
static constexpr uint32_t IsOutOfLineEpilogOrPrologueMask = 0x0000'4000;
static constexpr uint32_t HasTraceBackTableOffsetMask = 0x0000'2000;
static constexpr uint32_t IsInternalProcedureMask = 0x0000'1000;
static constexpr uint32_t HasControlledStorageMask = 0x0000'0800;
static constexpr uint32_t IsTOClessMask = 0x0000'0400;
static constexpr uint32_t IsFloatingPointPresentMask = 0x0000'0200;
static constexpr uint32_t IsFloatingPointOperationLogOrAbortEnabledMask =
0x0000'0100;
// Byte 4
static constexpr uint32_t IsInterruptHandlerMask = 0x0000'0080;
static constexpr uint32_t IsFunctionNamePresentMask = 0x0000'0040;
static constexpr uint32_t IsAllocaUsedMask = 0x0000'0020;
static constexpr uint32_t OnConditionDirectiveMask = 0x0000'001C;
static constexpr uint32_t IsCRSavedMask = 0x0000'0002;
static constexpr uint32_t IsLRSavedMask = 0x0000'0001;
static constexpr uint8_t OnConditionDirectiveShift = 2;
// Byte 5
static constexpr uint32_t IsBackChainStoredMask = 0x8000'0000;
static constexpr uint32_t IsFixupMask = 0x4000'0000;
static constexpr uint32_t FPRSavedMask = 0x3F00'0000;
static constexpr uint32_t FPRSavedShift = 24;
// Byte 6
static constexpr uint32_t HasExtensionTableMask = 0x0080'0000;
static constexpr uint32_t HasVectorInfoMask = 0x0040'0000;
static constexpr uint32_t GPRSavedMask = 0x003F'0000;
static constexpr uint32_t GPRSavedShift = 16;
// Byte 7
static constexpr uint32_t NumberOfFixedParmsMask = 0x0000'FF00;
static constexpr uint8_t NumberOfFixedParmsShift = 8;
// Byte 8
static constexpr uint32_t NumberOfFloatingPointParmsMask = 0x0000'00FE;
static constexpr uint32_t HasParmsOnStackMask = 0x0000'0001;
static constexpr uint8_t NumberOfFloatingPointParmsShift = 1;
// Masks to select leftmost bits for decoding parameter type information.
// Bit to use when vector info is not presented.
static constexpr uint32_t ParmTypeIsFloatingBit = 0x8000'0000;
static constexpr uint32_t ParmTypeFloatingIsDoubleBit = 0x4000'0000;
// Bits to use when vector info is presented.
static constexpr uint32_t ParmTypeIsFixedBits = 0x0000'0000;
static constexpr uint32_t ParmTypeIsVectorBits = 0x4000'0000;
static constexpr uint32_t ParmTypeIsFloatingBits = 0x8000'0000;
static constexpr uint32_t ParmTypeIsDoubleBits = 0xC000'0000;
static constexpr uint32_t ParmTypeMask = 0xC000'0000;
// Vector extension
static constexpr uint16_t NumberOfVRSavedMask = 0xFC00;
static constexpr uint16_t IsVRSavedOnStackMask = 0x0200;
static constexpr uint16_t HasVarArgsMask = 0x0100;
static constexpr uint8_t NumberOfVRSavedShift = 10;
static constexpr uint16_t NumberOfVectorParmsMask = 0x00FE;
static constexpr uint16_t HasVMXInstructionMask = 0x0001;
static constexpr uint8_t NumberOfVectorParmsShift = 1;
static constexpr uint32_t ParmTypeIsVectorCharBit = 0x0000'0000;
static constexpr uint32_t ParmTypeIsVectorShortBit = 0x4000'0000;
static constexpr uint32_t ParmTypeIsVectorIntBit = 0x8000'0000;
static constexpr uint32_t ParmTypeIsVectorFloatBit = 0xC000'0000;
static constexpr uint8_t WidthOfParamType = 2;
};
// Extended Traceback table flags.
enum ExtendedTBTableFlag : uint8_t {
TB_OS1 = 0x80, ///< Reserved for OS use.
TB_RESERVED = 0x40, ///< Reserved for compiler.
TB_SSP_CANARY = 0x20, ///< stack smasher canary present on stack.
TB_OS2 = 0x10, ///< Reserved for OS use.
TB_EH_INFO = 0x08, ///< Exception handling info present.
TB_LONGTBTABLE2 = 0x01 ///< Additional tbtable extension exists.
};
StringRef getNameForTracebackTableLanguageId(TracebackTable::LanguageID LangId);
SmallString<32> getExtendedTBTableFlagString(uint8_t Flag);
struct CsectProperties {
CsectProperties(StorageMappingClass SMC, SymbolType ST)
: MappingClass(SMC), Type(ST) {}
StorageMappingClass MappingClass;
SymbolType Type;
};
} // end namespace XCOFF
} // end namespace llvm
#endif
PK hwFZE B�
�
BinaryFormat/GOFF.hnu �[��� //===-- llvm/BinaryFormat/GOFF.h - GOFF definitions --------------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This header contains common, non-processor-specific data structures and
// constants for the GOFF file format.
//
// GOFF specifics can be found in MVS Program Management: Advanced Facilities.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_BINARYFORMAT_GOFF_H
#define LLVM_BINARYFORMAT_GOFF_H
#include "llvm/Support/DataTypes.h"
namespace llvm {
namespace GOFF {
constexpr uint8_t RecordLength = 80;
constexpr uint8_t RecordPrefixLength = 3;
constexpr uint8_t PayloadLength = 77;
// Prefix byte on every record. This indicates GOFF format.
constexpr uint8_t PTVPrefix = 0x03;
enum RecordType : uint8_t {
RT_ESD = 0,
RT_TXT = 1,
RT_RLD = 2,
RT_LEN = 3,
RT_END = 4,
RT_HDR = 15,
};
enum ESDSymbolType : uint8_t {
ESD_ST_SectionDefinition = 0,
ESD_ST_ElementDefinition = 1,
ESD_ST_LabelDefinition = 2,
ESD_ST_PartReference = 3,
ESD_ST_ExternalReference = 4,
};
enum ESDNameSpaceId : uint8_t {
ESD_NS_ProgramManagementBinder = 0,
ESD_NS_NormalName = 1,
ESD_NS_PseudoRegister = 2,
ESD_NS_Parts = 3
};
enum ESDReserveQwords : uint8_t {
ESD_RQ_0 = 0,
ESD_RQ_1 = 1,
ESD_RQ_2 = 2,
ESD_RQ_3 = 3
};
enum ESDAmode : uint8_t {
ESD_AMODE_None = 0,
ESD_AMODE_24 = 1,
ESD_AMODE_31 = 2,
ESD_AMODE_ANY = 3,
ESD_AMODE_64 = 4,
ESD_AMODE_MIN = 16,
};
enum ESDRmode : uint8_t {
ESD_RMODE_None = 0,
ESD_RMODE_24 = 1,
ESD_RMODE_31 = 3,
ESD_RMODE_64 = 4,
};
enum ESDTextStyle : uint8_t {
ESD_TS_ByteOriented = 0,
ESD_TS_Structured = 1,
ESD_TS_Unstructured = 2,
};
enum ESDBindingAlgorithm : uint8_t {
ESD_BA_Concatenate = 0,
ESD_BA_Merge = 1,
};
enum ESDTaskingBehavior : uint8_t {
ESD_TA_Unspecified = 0,
ESD_TA_NonReus = 1,
ESD_TA_Reus = 2,
ESD_TA_Rent = 3,
};
enum ESDExecutable : uint8_t {
ESD_EXE_Unspecified = 0,
ESD_EXE_DATA = 1,
ESD_EXE_CODE = 2,
};
enum ESDDuplicateSymbolSeverity : uint8_t {
ESD_DSS_NoWarning = 0,
ESD_DSS_Warning = 1,
ESD_DSS_Error = 2,
ESD_DSS_Reserved = 3,
};
enum ESDBindingStrength : uint8_t {
ESD_BST_Strong = 0,
ESD_BST_Weak = 1,
};
enum ESDLoadingBehavior : uint8_t {
ESD_LB_Initial = 0,
ESD_LB_Deferred = 1,
ESD_LB_NoLoad = 2,
ESD_LB_Reserved = 3,
};
enum ESDBindingScope : uint8_t {
ESD_BSC_Unspecified = 0,
ESD_BSC_Section = 1,
ESD_BSC_Module = 2,
ESD_BSC_Library = 3,
ESD_BSC_ImportExport = 4,
};
enum ESDLinkageType : uint8_t { ESD_LT_OS = 0, ESD_LT_XPLink = 1 };
enum ESDAlignment : uint8_t {
ESD_ALIGN_Byte = 0,
ESD_ALIGN_Halfword = 1,
ESD_ALIGN_Fullword = 2,
ESD_ALIGN_Doubleword = 3,
ESD_ALIGN_Quadword = 4,
ESD_ALIGN_32byte = 5,
ESD_ALIGN_64byte = 6,
ESD_ALIGN_128byte = 7,
ESD_ALIGN_256byte = 8,
ESD_ALIGN_512byte = 9,
ESD_ALIGN_1024byte = 10,
ESD_ALIGN_2Kpage = 11,
ESD_ALIGN_4Kpage = 12,
};
enum ENDEntryPointRequest : uint8_t {
END_EPR_None = 0,
END_EPR_EsdidOffset = 1,
END_EPR_ExternalName = 2,
END_EPR_Reserved = 3,
};
// \brief Subsections of the primary C_CODE section in the object file.
enum SubsectionKind : uint8_t {
SK_PPA1 = 2,
};
} // end namespace GOFF
} // end namespace llvm
#endif // LLVM_BINARYFORMAT_GOFF_H
PK hwFZ/!��7 7 BinaryFormat/DynamicTags.defnu �[��� #ifndef DYNAMIC_TAG
#error "DYNAMIC_TAG must be defined"
#endif
// Add separate macros for the architecture specific tags and the markers
// such as DT_HIOS, etc. to allow using this file to in other contexts.
// For example we can use it to generate a stringification switch statement.
#ifndef AARCH64_DYNAMIC_TAG
#define AARCH64_DYNAMIC_TAG(name, value) DYNAMIC_TAG(name, value)
#define AARCH64_DYNAMIC_TAG_DEFINED
#endif
#ifndef HEXAGON_DYNAMIC_TAG
#define HEXAGON_DYNAMIC_TAG(name, value) DYNAMIC_TAG(name, value)
#define HEXAGON_DYNAMIC_TAG_DEFINED
#endif
#ifndef MIPS_DYNAMIC_TAG
#define MIPS_DYNAMIC_TAG(name, value) DYNAMIC_TAG(name, value)
#define MIPS_DYNAMIC_TAG_DEFINED
#endif
#ifndef PPC_DYNAMIC_TAG
#define PPC_DYNAMIC_TAG(name, value) DYNAMIC_TAG(name, value)
#define PPC_DYNAMIC_TAG_DEFINED
#endif
#ifndef PPC64_DYNAMIC_TAG
#define PPC64_DYNAMIC_TAG(name, value) DYNAMIC_TAG(name, value)
#define PPC64_DYNAMIC_TAG_DEFINED
#endif
#ifndef RISCV_DYNAMIC_TAG
#define RISCV_DYNAMIC_TAG(name, value) DYNAMIC_TAG(name, value)
#define RISCV_DYNAMIC_TAG_DEFINED
#endif
#ifndef DYNAMIC_TAG_MARKER
#define DYNAMIC_TAG_MARKER(name, value) DYNAMIC_TAG(name, value)
#define DYNAMIC_TAG_MARKER_DEFINED
#endif
DYNAMIC_TAG(NULL, 0) // Marks end of dynamic array.
DYNAMIC_TAG(NEEDED, 1) // String table offset of needed library.
DYNAMIC_TAG(PLTRELSZ, 2) // Size of relocation entries in PLT.
DYNAMIC_TAG(PLTGOT, 3) // Address associated with linkage table.
DYNAMIC_TAG(HASH, 4) // Address of symbolic hash table.
DYNAMIC_TAG(STRTAB, 5) // Address of dynamic string table.
DYNAMIC_TAG(SYMTAB, 6) // Address of dynamic symbol table.
DYNAMIC_TAG(RELA, 7) // Address of relocation table (Rela entries).
DYNAMIC_TAG(RELASZ, 8) // Size of Rela relocation table.
DYNAMIC_TAG(RELAENT, 9) // Size of a Rela relocation entry.
DYNAMIC_TAG(STRSZ, 10) // Total size of the string table.
DYNAMIC_TAG(SYMENT, 11) // Size of a symbol table entry.
DYNAMIC_TAG(INIT, 12) // Address of initialization function.
DYNAMIC_TAG(FINI, 13) // Address of termination function.
DYNAMIC_TAG(SONAME, 14) // String table offset of a shared objects name.
DYNAMIC_TAG(RPATH, 15) // String table offset of library search path.
DYNAMIC_TAG(SYMBOLIC, 16) // Changes symbol resolution algorithm.
DYNAMIC_TAG(REL, 17) // Address of relocation table (Rel entries).
DYNAMIC_TAG(RELSZ, 18) // Size of Rel relocation table.
DYNAMIC_TAG(RELENT, 19) // Size of a Rel relocation entry.
DYNAMIC_TAG(PLTREL, 20) // Type of relocation entry used for linking.
DYNAMIC_TAG(DEBUG, 21) // Reserved for debugger.
DYNAMIC_TAG(TEXTREL, 22) // Relocations exist for non-writable segments.
DYNAMIC_TAG(JMPREL, 23) // Address of relocations associated with PLT.
DYNAMIC_TAG(BIND_NOW, 24) // Process all relocations before execution.
DYNAMIC_TAG(INIT_ARRAY, 25) // Pointer to array of initialization functions.
DYNAMIC_TAG(FINI_ARRAY, 26) // Pointer to array of termination functions.
DYNAMIC_TAG(INIT_ARRAYSZ, 27) // Size of DT_INIT_ARRAY.
DYNAMIC_TAG(FINI_ARRAYSZ, 28) // Size of DT_FINI_ARRAY.
DYNAMIC_TAG(RUNPATH, 29) // String table offset of lib search path.
DYNAMIC_TAG(FLAGS, 30) // Flags.
DYNAMIC_TAG_MARKER(ENCODING, 32) // Values from here to DT_LOOS follow the rules
// for the interpretation of the d_un union.
DYNAMIC_TAG(PREINIT_ARRAY, 32) // Pointer to array of preinit functions.
DYNAMIC_TAG(PREINIT_ARRAYSZ, 33) // Size of the DT_PREINIT_ARRAY array.
DYNAMIC_TAG(SYMTAB_SHNDX, 34) // Address of the SHT_SYMTAB_SHNDX section.
// Experimental support for SHT_RELR sections. For details, see proposal
// at https://groups.google.com/forum/#!topic/generic-abi/bX460iggiKg
DYNAMIC_TAG(RELRSZ, 35) // Size of Relr relocation table.
DYNAMIC_TAG(RELR, 36) // Address of relocation table (Relr entries).
DYNAMIC_TAG(RELRENT, 37) // Size of a Relr relocation entry.
DYNAMIC_TAG_MARKER(LOOS, 0x60000000) // Start of environment specific tags.
DYNAMIC_TAG_MARKER(HIOS, 0x6FFFFFFF) // End of environment specific tags.
DYNAMIC_TAG_MARKER(LOPROC, 0x70000000) // Start of processor specific tags.
DYNAMIC_TAG_MARKER(HIPROC, 0x7FFFFFFF) // End of processor specific tags.
// Android packed relocation section tags.
// https://android.googlesource.com/platform/bionic/+/6f12bfece5dcc01325e0abba56a46b1bcf991c69/tools/relocation_packer/src/elf_file.cc#31
DYNAMIC_TAG(ANDROID_REL, 0x6000000F)
DYNAMIC_TAG(ANDROID_RELSZ, 0x60000010)
DYNAMIC_TAG(ANDROID_RELA, 0x60000011)
DYNAMIC_TAG(ANDROID_RELASZ, 0x60000012)
// Android's experimental support for SHT_RELR sections.
// https://android.googlesource.com/platform/bionic/+/b7feec74547f84559a1467aca02708ff61346d2a/libc/include/elf.h#253
DYNAMIC_TAG(ANDROID_RELR, 0x6FFFE000) // Address of relocation table (Relr entries).
DYNAMIC_TAG(ANDROID_RELRSZ, 0x6FFFE001) // Size of Relr relocation table.
DYNAMIC_TAG(ANDROID_RELRENT, 0x6FFFE003) // Size of a Relr relocation entry.
DYNAMIC_TAG(GNU_HASH, 0x6FFFFEF5) // Reference to the GNU hash table.
DYNAMIC_TAG(TLSDESC_PLT, 0x6FFFFEF6) // Location of PLT entry for TLS
// descriptor resolver calls.
DYNAMIC_TAG(TLSDESC_GOT, 0x6FFFFEF7) // Location of GOT entry used by TLS
// descriptor resolver PLT entry.
DYNAMIC_TAG(RELACOUNT, 0x6FFFFFF9) // ELF32_Rela count.
DYNAMIC_TAG(RELCOUNT, 0x6FFFFFFA) // ELF32_Rel count.
DYNAMIC_TAG(FLAGS_1, 0X6FFFFFFB) // Flags_1.
DYNAMIC_TAG(VERSYM, 0x6FFFFFF0) // The address of .gnu.version section.
DYNAMIC_TAG(VERDEF, 0X6FFFFFFC) // The address of the version definition
// table.
DYNAMIC_TAG(VERDEFNUM, 0X6FFFFFFD) // The number of entries in DT_VERDEF.
DYNAMIC_TAG(VERNEED, 0X6FFFFFFE) // The address of the version dependency
// table.
DYNAMIC_TAG(VERNEEDNUM, 0X6FFFFFFF) // The number of entries in DT_VERNEED.
// AArch64 specific dynamic table entries
AARCH64_DYNAMIC_TAG(AARCH64_BTI_PLT, 0x70000001)
AARCH64_DYNAMIC_TAG(AARCH64_PAC_PLT, 0x70000003)
AARCH64_DYNAMIC_TAG(AARCH64_VARIANT_PCS, 0x70000005)
AARCH64_DYNAMIC_TAG(AARCH64_MEMTAG_MODE, 0x70000009)
AARCH64_DYNAMIC_TAG(AARCH64_MEMTAG_HEAP, 0x7000000b)
AARCH64_DYNAMIC_TAG(AARCH64_MEMTAG_STACK, 0x7000000c)
AARCH64_DYNAMIC_TAG(AARCH64_MEMTAG_GLOBALS, 0x7000000d)
AARCH64_DYNAMIC_TAG(AARCH64_MEMTAG_GLOBALSSZ, 0x7000000f)
// Hexagon specific dynamic table entries
HEXAGON_DYNAMIC_TAG(HEXAGON_SYMSZ, 0x70000000)
HEXAGON_DYNAMIC_TAG(HEXAGON_VER, 0x70000001)
HEXAGON_DYNAMIC_TAG(HEXAGON_PLT, 0x70000002)
// Mips specific dynamic table entry tags.
MIPS_DYNAMIC_TAG(MIPS_RLD_VERSION, 0x70000001) // 32 bit version number for
// runtime linker interface.
MIPS_DYNAMIC_TAG(MIPS_TIME_STAMP, 0x70000002) // Time stamp.
MIPS_DYNAMIC_TAG(MIPS_ICHECKSUM, 0x70000003) // Checksum of external strings
// and common sizes.
MIPS_DYNAMIC_TAG(MIPS_IVERSION, 0x70000004) // Index of version string
// in string table.
MIPS_DYNAMIC_TAG(MIPS_FLAGS, 0x70000005) // 32 bits of flags.
MIPS_DYNAMIC_TAG(MIPS_BASE_ADDRESS, 0x70000006) // Base address of the segment.
MIPS_DYNAMIC_TAG(MIPS_MSYM, 0x70000007) // Address of .msym section.
MIPS_DYNAMIC_TAG(MIPS_CONFLICT, 0x70000008) // Address of .conflict section.
MIPS_DYNAMIC_TAG(MIPS_LIBLIST, 0x70000009) // Address of .liblist section.
MIPS_DYNAMIC_TAG(MIPS_LOCAL_GOTNO, 0x7000000a) // Number of local global offset
// table entries.
MIPS_DYNAMIC_TAG(MIPS_CONFLICTNO, 0x7000000b) // Number of entries
// in the .conflict section.
MIPS_DYNAMIC_TAG(MIPS_LIBLISTNO, 0x70000010) // Number of entries
// in the .liblist section.
MIPS_DYNAMIC_TAG(MIPS_SYMTABNO, 0x70000011) // Number of entries
// in the .dynsym section.
MIPS_DYNAMIC_TAG(MIPS_UNREFEXTNO, 0x70000012) // Index of first external dynamic
// symbol not referenced locally.
MIPS_DYNAMIC_TAG(MIPS_GOTSYM, 0x70000013) // Index of first dynamic symbol
// in global offset table.
MIPS_DYNAMIC_TAG(MIPS_HIPAGENO, 0x70000014) // Number of page table entries
// in global offset table.
MIPS_DYNAMIC_TAG(MIPS_RLD_MAP, 0x70000016) // Address of run time loader map
// used for debugging.
MIPS_DYNAMIC_TAG(MIPS_DELTA_CLASS, 0x70000017) // Delta C++ class definition.
MIPS_DYNAMIC_TAG(MIPS_DELTA_CLASS_NO, 0x70000018) // Number of entries
// in DT_MIPS_DELTA_CLASS.
MIPS_DYNAMIC_TAG(MIPS_DELTA_INSTANCE, 0x70000019) // Delta C++ class instances.
MIPS_DYNAMIC_TAG(MIPS_DELTA_INSTANCE_NO, 0x7000001A) // Number of entries
// in DT_MIPS_DELTA_INSTANCE.
MIPS_DYNAMIC_TAG(MIPS_DELTA_RELOC, 0x7000001B) // Delta relocations.
MIPS_DYNAMIC_TAG(MIPS_DELTA_RELOC_NO, 0x7000001C) // Number of entries
// in DT_MIPS_DELTA_RELOC.
MIPS_DYNAMIC_TAG(MIPS_DELTA_SYM, 0x7000001D) // Delta symbols that Delta
// relocations refer to.
MIPS_DYNAMIC_TAG(MIPS_DELTA_SYM_NO, 0x7000001E) // Number of entries
// in DT_MIPS_DELTA_SYM.
MIPS_DYNAMIC_TAG(MIPS_DELTA_CLASSSYM, 0x70000020) // Delta symbols that hold
// class declarations.
MIPS_DYNAMIC_TAG(MIPS_DELTA_CLASSSYM_NO, 0x70000021) // Number of entries
// in DT_MIPS_DELTA_CLASSSYM.
MIPS_DYNAMIC_TAG(MIPS_CXX_FLAGS, 0x70000022) // Flags indicating information
// about C++ flavor.
MIPS_DYNAMIC_TAG(MIPS_PIXIE_INIT, 0x70000023) // Pixie information.
MIPS_DYNAMIC_TAG(MIPS_SYMBOL_LIB, 0x70000024) // Address of .MIPS.symlib
MIPS_DYNAMIC_TAG(MIPS_LOCALPAGE_GOTIDX, 0x70000025) // The GOT index of the first PTE
// for a segment
MIPS_DYNAMIC_TAG(MIPS_LOCAL_GOTIDX, 0x70000026) // The GOT index of the first PTE
// for a local symbol
MIPS_DYNAMIC_TAG(MIPS_HIDDEN_GOTIDX, 0x70000027) // The GOT index of the first PTE
// for a hidden symbol
MIPS_DYNAMIC_TAG(MIPS_PROTECTED_GOTIDX, 0x70000028) // The GOT index of the first PTE
// for a protected symbol
MIPS_DYNAMIC_TAG(MIPS_OPTIONS, 0x70000029) // Address of `.MIPS.options'.
MIPS_DYNAMIC_TAG(MIPS_INTERFACE, 0x7000002A) // Address of `.interface'.
MIPS_DYNAMIC_TAG(MIPS_DYNSTR_ALIGN, 0x7000002B) // Unknown.
MIPS_DYNAMIC_TAG(MIPS_INTERFACE_SIZE, 0x7000002C) // Size of the .interface section.
MIPS_DYNAMIC_TAG(MIPS_RLD_TEXT_RESOLVE_ADDR, 0x7000002D) // Size of rld_text_resolve
// function stored in the GOT.
MIPS_DYNAMIC_TAG(MIPS_PERF_SUFFIX, 0x7000002E) // Default suffix of DSO to be added
// by rld on dlopen() calls.
MIPS_DYNAMIC_TAG(MIPS_COMPACT_SIZE, 0x7000002F) // Size of compact relocation
// section (O32).
MIPS_DYNAMIC_TAG(MIPS_GP_VALUE, 0x70000030) // GP value for auxiliary GOTs.
MIPS_DYNAMIC_TAG(MIPS_AUX_DYNAMIC, 0x70000031) // Address of auxiliary .dynamic.
MIPS_DYNAMIC_TAG(MIPS_PLTGOT, 0x70000032) // Address of the base of the PLTGOT.
MIPS_DYNAMIC_TAG(MIPS_RWPLT, 0x70000034) // Points to the base
// of a writable PLT.
MIPS_DYNAMIC_TAG(MIPS_RLD_MAP_REL, 0x70000035) // Relative offset of run time loader
// map, used for debugging.
MIPS_DYNAMIC_TAG(MIPS_XHASH, 0x70000036) // GNU-style hash table with xlat.
// PPC specific dynamic table entries.
PPC_DYNAMIC_TAG(PPC_GOT, 0x70000000) // Uses Secure PLT ABI.
PPC_DYNAMIC_TAG(PPC_OPT, 0x70000001) // Has TLS optimization.
// PPC64 specific dynamic table entries.
PPC64_DYNAMIC_TAG(PPC64_GLINK, 0x70000000) // Address of 32 bytes before the
// first glink lazy resolver stub.
PPC64_DYNAMIC_TAG(PPC64_OPT, 0x70000003) // Flags to control optimizations
// for TLS and multiple TOCs.
// RISC-V specific dynamic array tags.
RISCV_DYNAMIC_TAG(RISCV_VARIANT_CC, 0x70000001)
// Sun machine-independent extensions.
DYNAMIC_TAG(AUXILIARY, 0x7FFFFFFD) // Shared object to load before self
DYNAMIC_TAG(USED, 0x7FFFFFFE) // Same as DT_NEEDED
DYNAMIC_TAG(FILTER, 0x7FFFFFFF) // Shared object to get values from
#ifdef DYNAMIC_TAG_MARKER_DEFINED
#undef DYNAMIC_TAG_MARKER
#undef DYNAMIC_TAG_MARKER_DEFINED
#endif
#ifdef AARCH64_DYNAMIC_TAG_DEFINED
#undef AARCH64_DYNAMIC_TAG
#undef AARCH64_DYNAMIC_TAG_DEFINED
#endif
#ifdef MIPS_DYNAMIC_TAG_DEFINED
#undef MIPS_DYNAMIC_TAG
#undef MIPS_DYNAMIC_TAG_DEFINED
#endif
#ifdef HEXAGON_DYNAMIC_TAG_DEFINED
#undef HEXAGON_DYNAMIC_TAG
#undef HEXAGON_DYNAMIC_TAG_DEFINED
#endif
#ifdef PPC_DYNAMIC_TAG_DEFINED
#undef PPC_DYNAMIC_TAG
#undef PPC_DYNAMIC_TAG_DEFINED
#endif
#ifdef PPC64_DYNAMIC_TAG_DEFINED
#undef PPC64_DYNAMIC_TAG
#undef PPC64_DYNAMIC_TAG_DEFINED
#endif
#ifdef RISCV_DYNAMIC_TAG_DEFINED
#undef RISCV_DYNAMIC_TAG
#undef RISCV_DYNAMIC_TAG_DEFINED
#endif
PK hwFZ�,�VJ2 J2 BinaryFormat/Wasm.hnu �[��� //===- Wasm.h - Wasm object file format -------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines manifest constants for the wasm object file format.
// See: https://github.com/WebAssembly/design/blob/main/BinaryEncoding.md
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_BINARYFORMAT_WASM_H
#define LLVM_BINARYFORMAT_WASM_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include <optional>
namespace llvm {
namespace wasm {
// Object file magic string.
const char WasmMagic[] = {'\0', 'a', 's', 'm'};
// Wasm binary format version
const uint32_t WasmVersion = 0x1;
// Wasm linking metadata version
const uint32_t WasmMetadataVersion = 0x2;
// Wasm uses a 64k page size
const uint32_t WasmPageSize = 65536;
struct WasmObjectHeader {
StringRef Magic;
uint32_t Version;
};
struct WasmDylinkImportInfo {
StringRef Module;
StringRef Field;
uint32_t Flags;
};
struct WasmDylinkExportInfo {
StringRef Name;
uint32_t Flags;
};
struct WasmDylinkInfo {
uint32_t MemorySize; // Memory size in bytes
uint32_t MemoryAlignment; // P2 alignment of memory
uint32_t TableSize; // Table size in elements
uint32_t TableAlignment; // P2 alignment of table
std::vector<StringRef> Needed; // Shared library dependencies
std::vector<WasmDylinkImportInfo> ImportInfo;
std::vector<WasmDylinkExportInfo> ExportInfo;
};
struct WasmProducerInfo {
std::vector<std::pair<std::string, std::string>> Languages;
std::vector<std::pair<std::string, std::string>> Tools;
std::vector<std::pair<std::string, std::string>> SDKs;
};
struct WasmFeatureEntry {
uint8_t Prefix;
std::string Name;
};
struct WasmExport {
StringRef Name;
uint8_t Kind;
uint32_t Index;
};
struct WasmLimits {
uint8_t Flags;
uint64_t Minimum;
uint64_t Maximum;
};
struct WasmTableType {
uint8_t ElemType;
WasmLimits Limits;
};
struct WasmTable {
uint32_t Index;
WasmTableType Type;
StringRef SymbolName; // from the "linking" section
};
struct WasmInitExprMVP {
uint8_t Opcode;
union {
int32_t Int32;
int64_t Int64;
uint32_t Float32;
uint64_t Float64;
uint32_t Global;
} Value;
};
struct WasmInitExpr {
uint8_t Extended; // Set to non-zero if extended const is used (i.e. more than
// one instruction)
WasmInitExprMVP Inst;
ArrayRef<uint8_t> Body;
};
struct WasmGlobalType {
uint8_t Type;
bool Mutable;
};
struct WasmGlobal {
uint32_t Index;
WasmGlobalType Type;
WasmInitExpr InitExpr;
StringRef SymbolName; // from the "linking" section
};
struct WasmTag {
uint32_t Index;
uint32_t SigIndex;
StringRef SymbolName; // from the "linking" section
};
struct WasmImport {
StringRef Module;
StringRef Field;
uint8_t Kind;
union {
uint32_t SigIndex;
WasmGlobalType Global;
WasmTableType Table;
WasmLimits Memory;
};
};
struct WasmLocalDecl {
uint8_t Type;
uint32_t Count;
};
struct WasmFunction {
uint32_t Index;
uint32_t SigIndex;
std::vector<WasmLocalDecl> Locals;
ArrayRef<uint8_t> Body;
uint32_t CodeSectionOffset;
uint32_t Size;
uint32_t CodeOffset; // start of Locals and Body
std::optional<StringRef> ExportName; // from the "export" section
StringRef SymbolName; // from the "linking" section
StringRef DebugName; // from the "name" section
uint32_t Comdat; // from the "comdat info" section
};
struct WasmDataSegment {
uint32_t InitFlags;
// Present if InitFlags & WASM_DATA_SEGMENT_HAS_MEMINDEX.
uint32_t MemoryIndex;
// Present if InitFlags & WASM_DATA_SEGMENT_IS_PASSIVE == 0.
WasmInitExpr Offset;
ArrayRef<uint8_t> Content;
StringRef Name; // from the "segment info" section
uint32_t Alignment;
uint32_t LinkingFlags;
uint32_t Comdat; // from the "comdat info" section
};
struct WasmElemSegment {
uint32_t Flags;
uint32_t TableNumber;
uint8_t ElemKind;
WasmInitExpr Offset;
std::vector<uint32_t> Functions;
};
// Represents the location of a Wasm data symbol within a WasmDataSegment, as
// the index of the segment, and the offset and size within the segment.
struct WasmDataReference {
uint32_t Segment;
uint64_t Offset;
uint64_t Size;
};
struct WasmRelocation {
uint8_t Type; // The type of the relocation.
uint32_t Index; // Index into either symbol or type index space.
uint64_t Offset; // Offset from the start of the section.
int64_t Addend; // A value to add to the symbol.
};
struct WasmInitFunc {
uint32_t Priority;
uint32_t Symbol;
};
struct WasmSymbolInfo {
StringRef Name;
uint8_t Kind;
uint32_t Flags;
// For undefined symbols the module of the import
std::optional<StringRef> ImportModule;
// For undefined symbols the name of the import
std::optional<StringRef> ImportName;
// For symbols to be exported from the final module
std::optional<StringRef> ExportName;
union {
// For function, table, or global symbols, the index in function, table, or
// global index space.
uint32_t ElementIndex;
// For a data symbols, the address of the data relative to segment.
WasmDataReference DataRef;
};
};
enum class NameType {
FUNCTION,
GLOBAL,
DATA_SEGMENT,
};
struct WasmDebugName {
NameType Type;
uint32_t Index;
StringRef Name;
};
struct WasmLinkingData {
uint32_t Version;
std::vector<WasmInitFunc> InitFunctions;
std::vector<StringRef> Comdats;
std::vector<WasmSymbolInfo> SymbolTable;
};
enum : unsigned {
WASM_SEC_CUSTOM = 0, // Custom / User-defined section
WASM_SEC_TYPE = 1, // Function signature declarations
WASM_SEC_IMPORT = 2, // Import declarations
WASM_SEC_FUNCTION = 3, // Function declarations
WASM_SEC_TABLE = 4, // Indirect function table and other tables
WASM_SEC_MEMORY = 5, // Memory attributes
WASM_SEC_GLOBAL = 6, // Global declarations
WASM_SEC_EXPORT = 7, // Exports
WASM_SEC_START = 8, // Start function declaration
WASM_SEC_ELEM = 9, // Elements section
WASM_SEC_CODE = 10, // Function bodies (code)
WASM_SEC_DATA = 11, // Data segments
WASM_SEC_DATACOUNT = 12, // Data segment count
WASM_SEC_TAG = 13, // Tag declarations
WASM_SEC_LAST_KNOWN = WASM_SEC_TAG,
};
// Type immediate encodings used in various contexts.
enum : unsigned {
WASM_TYPE_I32 = 0x7F,
WASM_TYPE_I64 = 0x7E,
WASM_TYPE_F32 = 0x7D,
WASM_TYPE_F64 = 0x7C,
WASM_TYPE_V128 = 0x7B,
WASM_TYPE_FUNCREF = 0x70,
WASM_TYPE_EXTERNREF = 0x6F,
WASM_TYPE_FUNC = 0x60,
WASM_TYPE_NORESULT = 0x40, // for blocks with no result values
};
// Kinds of externals (for imports and exports).
enum : unsigned {
WASM_EXTERNAL_FUNCTION = 0x0,
WASM_EXTERNAL_TABLE = 0x1,
WASM_EXTERNAL_MEMORY = 0x2,
WASM_EXTERNAL_GLOBAL = 0x3,
WASM_EXTERNAL_TAG = 0x4,
};
// Opcodes used in initializer expressions.
enum : unsigned {
WASM_OPCODE_END = 0x0b,
WASM_OPCODE_CALL = 0x10,
WASM_OPCODE_LOCAL_GET = 0x20,
WASM_OPCODE_LOCAL_SET = 0x21,
WASM_OPCODE_LOCAL_TEE = 0x22,
WASM_OPCODE_GLOBAL_GET = 0x23,
WASM_OPCODE_GLOBAL_SET = 0x24,
WASM_OPCODE_I32_STORE = 0x36,
WASM_OPCODE_I64_STORE = 0x37,
WASM_OPCODE_I32_CONST = 0x41,
WASM_OPCODE_I64_CONST = 0x42,
WASM_OPCODE_F32_CONST = 0x43,
WASM_OPCODE_F64_CONST = 0x44,
WASM_OPCODE_I32_ADD = 0x6a,
WASM_OPCODE_I32_SUB = 0x6b,
WASM_OPCODE_I32_MUL = 0x6c,
WASM_OPCODE_I64_ADD = 0x7c,
WASM_OPCODE_I64_SUB = 0x7d,
WASM_OPCODE_I64_MUL = 0x7e,
WASM_OPCODE_REF_NULL = 0xd0,
};
// Opcodes used in synthetic functions.
enum : unsigned {
WASM_OPCODE_BLOCK = 0x02,
WASM_OPCODE_BR = 0x0c,
WASM_OPCODE_BR_TABLE = 0x0e,
WASM_OPCODE_RETURN = 0x0f,
WASM_OPCODE_DROP = 0x1a,
WASM_OPCODE_MISC_PREFIX = 0xfc,
WASM_OPCODE_MEMORY_INIT = 0x08,
WASM_OPCODE_MEMORY_FILL = 0x0b,
WASM_OPCODE_DATA_DROP = 0x09,
WASM_OPCODE_ATOMICS_PREFIX = 0xfe,
WASM_OPCODE_ATOMIC_NOTIFY = 0x00,
WASM_OPCODE_I32_ATOMIC_WAIT = 0x01,
WASM_OPCODE_I32_ATOMIC_STORE = 0x17,
WASM_OPCODE_I32_RMW_CMPXCHG = 0x48,
};
enum : unsigned {
WASM_LIMITS_FLAG_NONE = 0x0,
WASM_LIMITS_FLAG_HAS_MAX = 0x1,
WASM_LIMITS_FLAG_IS_SHARED = 0x2,
WASM_LIMITS_FLAG_IS_64 = 0x4,
};
enum : unsigned {
WASM_DATA_SEGMENT_IS_PASSIVE = 0x01,
WASM_DATA_SEGMENT_HAS_MEMINDEX = 0x02,
};
enum : unsigned {
WASM_ELEM_SEGMENT_IS_PASSIVE = 0x01,
WASM_ELEM_SEGMENT_HAS_TABLE_NUMBER = 0x02,
WASM_ELEM_SEGMENT_HAS_INIT_EXPRS = 0x04,
};
const unsigned WASM_ELEM_SEGMENT_MASK_HAS_ELEM_KIND = 0x3;
// Feature policy prefixes used in the custom "target_features" section
enum : uint8_t {
WASM_FEATURE_PREFIX_USED = '+',
WASM_FEATURE_PREFIX_REQUIRED = '=',
WASM_FEATURE_PREFIX_DISALLOWED = '-',
};
// Kind codes used in the custom "name" section
enum : unsigned {
WASM_NAMES_FUNCTION = 1,
WASM_NAMES_LOCAL = 2,
WASM_NAMES_GLOBAL = 7,
WASM_NAMES_DATA_SEGMENT = 9,
};
// Kind codes used in the custom "linking" section
enum : unsigned {
WASM_SEGMENT_INFO = 0x5,
WASM_INIT_FUNCS = 0x6,
WASM_COMDAT_INFO = 0x7,
WASM_SYMBOL_TABLE = 0x8,
};
// Kind codes used in the custom "dylink" section
enum : unsigned {
WASM_DYLINK_MEM_INFO = 0x1,
WASM_DYLINK_NEEDED = 0x2,
WASM_DYLINK_EXPORT_INFO = 0x3,
WASM_DYLINK_IMPORT_INFO = 0x4,
};
// Kind codes used in the custom "linking" section in the WASM_COMDAT_INFO
enum : unsigned {
WASM_COMDAT_DATA = 0x0,
WASM_COMDAT_FUNCTION = 0x1,
// GLOBAL, TAG, and TABLE are in here but LLVM doesn't use them yet.
WASM_COMDAT_SECTION = 0x5,
};
// Kind codes used in the custom "linking" section in the WASM_SYMBOL_TABLE
enum WasmSymbolType : unsigned {
WASM_SYMBOL_TYPE_FUNCTION = 0x0,
WASM_SYMBOL_TYPE_DATA = 0x1,
WASM_SYMBOL_TYPE_GLOBAL = 0x2,
WASM_SYMBOL_TYPE_SECTION = 0x3,
WASM_SYMBOL_TYPE_TAG = 0x4,
WASM_SYMBOL_TYPE_TABLE = 0x5,
};
enum WasmSegmentFlag : unsigned {
WASM_SEG_FLAG_STRINGS = 0x1,
WASM_SEG_FLAG_TLS = 0x2,
};
// Kinds of tag attributes.
enum WasmTagAttribute : uint8_t {
WASM_TAG_ATTRIBUTE_EXCEPTION = 0x0,
};
const unsigned WASM_SYMBOL_BINDING_MASK = 0x3;
const unsigned WASM_SYMBOL_VISIBILITY_MASK = 0xc;
const unsigned WASM_SYMBOL_BINDING_GLOBAL = 0x0;
const unsigned WASM_SYMBOL_BINDING_WEAK = 0x1;
const unsigned WASM_SYMBOL_BINDING_LOCAL = 0x2;
const unsigned WASM_SYMBOL_VISIBILITY_DEFAULT = 0x0;
const unsigned WASM_SYMBOL_VISIBILITY_HIDDEN = 0x4;
const unsigned WASM_SYMBOL_UNDEFINED = 0x10;
const unsigned WASM_SYMBOL_EXPORTED = 0x20;
const unsigned WASM_SYMBOL_EXPLICIT_NAME = 0x40;
const unsigned WASM_SYMBOL_NO_STRIP = 0x80;
const unsigned WASM_SYMBOL_TLS = 0x100;
#define WASM_RELOC(name, value) name = value,
enum : unsigned {
#include "WasmRelocs.def"
};
#undef WASM_RELOC
// Subset of types that a value can have
enum class ValType {
I32 = WASM_TYPE_I32,
I64 = WASM_TYPE_I64,
F32 = WASM_TYPE_F32,
F64 = WASM_TYPE_F64,
V128 = WASM_TYPE_V128,
FUNCREF = WASM_TYPE_FUNCREF,
EXTERNREF = WASM_TYPE_EXTERNREF,
};
struct WasmSignature {
SmallVector<ValType, 1> Returns;
SmallVector<ValType, 4> Params;
// Support empty and tombstone instances, needed by DenseMap.
enum { Plain, Empty, Tombstone } State = Plain;
WasmSignature(SmallVector<ValType, 1> &&InReturns,
SmallVector<ValType, 4> &&InParams)
: Returns(InReturns), Params(InParams) {}
WasmSignature() = default;
};
// Useful comparison operators
inline bool operator==(const WasmSignature &LHS, const WasmSignature &RHS) {
return LHS.State == RHS.State && LHS.Returns == RHS.Returns &&
LHS.Params == RHS.Params;
}
inline bool operator!=(const WasmSignature &LHS, const WasmSignature &RHS) {
return !(LHS == RHS);
}
inline bool operator==(const WasmGlobalType &LHS, const WasmGlobalType &RHS) {
return LHS.Type == RHS.Type && LHS.Mutable == RHS.Mutable;
}
inline bool operator!=(const WasmGlobalType &LHS, const WasmGlobalType &RHS) {
return !(LHS == RHS);
}
inline bool operator==(const WasmLimits &LHS, const WasmLimits &RHS) {
return LHS.Flags == RHS.Flags && LHS.Minimum == RHS.Minimum &&
(LHS.Flags & WASM_LIMITS_FLAG_HAS_MAX ? LHS.Maximum == RHS.Maximum
: true);
}
inline bool operator==(const WasmTableType &LHS, const WasmTableType &RHS) {
return LHS.ElemType == RHS.ElemType && LHS.Limits == RHS.Limits;
}
llvm::StringRef toString(WasmSymbolType type);
llvm::StringRef relocTypetoString(uint32_t type);
llvm::StringRef sectionTypeToString(uint32_t type);
bool relocTypeHasAddend(uint32_t type);
} // end namespace wasm
} // end namespace llvm
#endif
PK hwFZ+��i �i BinaryFormat/Dwarf.hnu �[��� //===-- llvm/BinaryFormat/Dwarf.h ---Dwarf Constants-------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file
/// This file contains constants used for implementing Dwarf
/// debug support.
///
/// For details on the Dwarf specfication see the latest DWARF Debugging
/// Information Format standard document on http://www.dwarfstd.org. This
/// file often includes support for non-released standard features.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_BINARYFORMAT_DWARF_H
#define LLVM_BINARYFORMAT_DWARF_H
#include "llvm/Support/Compiler.h"
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/FormatVariadicDetails.h"
#include "llvm/TargetParser/Triple.h"
#include <limits>
namespace llvm {
class StringRef;
namespace dwarf {
//===----------------------------------------------------------------------===//
// DWARF constants as gleaned from the DWARF Debugging Information Format V.5
// reference manual http://www.dwarfstd.org/.
//
// Do not mix the following two enumerations sets. DW_TAG_invalid changes the
// enumeration base type.
enum LLVMConstants : uint32_t {
/// LLVM mock tags (see also llvm/BinaryFormat/Dwarf.def).
/// \{
DW_TAG_invalid = ~0U, ///< Tag for invalid results.
DW_VIRTUALITY_invalid = ~0U, ///< Virtuality for invalid results.
DW_MACINFO_invalid = ~0U, ///< Macinfo type for invalid results.
/// \}
/// Special values for an initial length field.
/// \{
DW_LENGTH_lo_reserved = 0xfffffff0, ///< Lower bound of the reserved range.
DW_LENGTH_DWARF64 = 0xffffffff, ///< Indicator of 64-bit DWARF format.
DW_LENGTH_hi_reserved = 0xffffffff, ///< Upper bound of the reserved range.
/// \}
/// Other constants.
/// \{
DWARF_VERSION = 4, ///< Default dwarf version we output.
DW_PUBTYPES_VERSION = 2, ///< Section version number for .debug_pubtypes.
DW_PUBNAMES_VERSION = 2, ///< Section version number for .debug_pubnames.
DW_ARANGES_VERSION = 2, ///< Section version number for .debug_aranges.
/// \}
/// Identifiers we use to distinguish vendor extensions.
/// \{
DWARF_VENDOR_DWARF = 0, ///< Defined in v2 or later of the DWARF standard.
DWARF_VENDOR_APPLE = 1,
DWARF_VENDOR_BORLAND = 2,
DWARF_VENDOR_GNU = 3,
DWARF_VENDOR_GOOGLE = 4,
DWARF_VENDOR_LLVM = 5,
DWARF_VENDOR_MIPS = 6,
DWARF_VENDOR_WASM = 7,
DWARF_VENDOR_ALTIUM,
DWARF_VENDOR_COMPAQ,
DWARF_VENDOR_GHS,
DWARF_VENDOR_GO,
DWARF_VENDOR_HP,
DWARF_VENDOR_IBM,
DWARF_VENDOR_INTEL,
DWARF_VENDOR_PGI,
DWARF_VENDOR_SUN,
DWARF_VENDOR_UPC,
///\}
};
/// Constants that define the DWARF format as 32 or 64 bit.
enum DwarfFormat : uint8_t { DWARF32, DWARF64 };
/// Special ID values that distinguish a CIE from a FDE in DWARF CFI.
/// Not inside an enum because a 64-bit value is needed.
/// @{
const uint32_t DW_CIE_ID = UINT32_MAX;
const uint64_t DW64_CIE_ID = UINT64_MAX;
/// @}
/// Identifier of an invalid DIE offset in the .debug_info section.
const uint32_t DW_INVALID_OFFSET = UINT32_MAX;
enum Tag : uint16_t {
#define HANDLE_DW_TAG(ID, NAME, VERSION, VENDOR, KIND) DW_TAG_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
DW_TAG_lo_user = 0x4080,
DW_TAG_hi_user = 0xffff,
DW_TAG_user_base = 0x1000 ///< Recommended base for user tags.
};
inline bool isType(Tag T) {
switch (T) {
default:
return false;
#define HANDLE_DW_TAG(ID, NAME, VERSION, VENDOR, KIND) \
case DW_TAG_##NAME: \
return (KIND == DW_KIND_TYPE);
#include "llvm/BinaryFormat/Dwarf.def"
}
}
/// Attributes.
enum Attribute : uint16_t {
#define HANDLE_DW_AT(ID, NAME, VERSION, VENDOR) DW_AT_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
DW_AT_lo_user = 0x2000,
DW_AT_hi_user = 0x3fff,
};
enum Form : uint16_t {
#define HANDLE_DW_FORM(ID, NAME, VERSION, VENDOR) DW_FORM_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
DW_FORM_lo_user = 0x1f00, ///< Not specified by DWARF.
};
enum LocationAtom {
#define HANDLE_DW_OP(ID, NAME, VERSION, VENDOR) DW_OP_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
DW_OP_lo_user = 0xe0,
DW_OP_hi_user = 0xff,
DW_OP_LLVM_fragment = 0x1000, ///< Only used in LLVM metadata.
DW_OP_LLVM_convert = 0x1001, ///< Only used in LLVM metadata.
DW_OP_LLVM_tag_offset = 0x1002, ///< Only used in LLVM metadata.
DW_OP_LLVM_entry_value = 0x1003, ///< Only used in LLVM metadata.
DW_OP_LLVM_implicit_pointer = 0x1004, ///< Only used in LLVM metadata.
DW_OP_LLVM_arg = 0x1005, ///< Only used in LLVM metadata.
};
enum LlvmUserLocationAtom {
#define HANDLE_DW_OP_LLVM_USEROP(ID, NAME) DW_OP_LLVM_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
};
enum TypeKind : uint8_t {
#define HANDLE_DW_ATE(ID, NAME, VERSION, VENDOR) DW_ATE_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
DW_ATE_lo_user = 0x80,
DW_ATE_hi_user = 0xff
};
enum DecimalSignEncoding {
// Decimal sign attribute values
DW_DS_unsigned = 0x01,
DW_DS_leading_overpunch = 0x02,
DW_DS_trailing_overpunch = 0x03,
DW_DS_leading_separate = 0x04,
DW_DS_trailing_separate = 0x05
};
enum EndianityEncoding {
// Endianity attribute values
#define HANDLE_DW_END(ID, NAME) DW_END_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
DW_END_lo_user = 0x40,
DW_END_hi_user = 0xff
};
enum AccessAttribute {
// Accessibility codes
DW_ACCESS_public = 0x01,
DW_ACCESS_protected = 0x02,
DW_ACCESS_private = 0x03
};
enum VisibilityAttribute {
// Visibility codes
DW_VIS_local = 0x01,
DW_VIS_exported = 0x02,
DW_VIS_qualified = 0x03
};
enum VirtualityAttribute {
#define HANDLE_DW_VIRTUALITY(ID, NAME) DW_VIRTUALITY_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
DW_VIRTUALITY_max = 0x02
};
enum DefaultedMemberAttribute {
#define HANDLE_DW_DEFAULTED(ID, NAME) DW_DEFAULTED_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
DW_DEFAULTED_max = 0x02
};
enum SourceLanguage {
#define HANDLE_DW_LANG(ID, NAME, LOWER_BOUND, VERSION, VENDOR) \
DW_LANG_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
DW_LANG_lo_user = 0x8000,
DW_LANG_hi_user = 0xffff
};
inline bool isCPlusPlus(SourceLanguage S) {
bool result = false;
// Deliberately enumerate all the language options so we get a warning when
// new language options are added (-Wswitch) that'll hopefully help keep this
// switch up-to-date when new C++ versions are added.
switch (S) {
case DW_LANG_C_plus_plus:
case DW_LANG_C_plus_plus_03:
case DW_LANG_C_plus_plus_11:
case DW_LANG_C_plus_plus_14:
case DW_LANG_C_plus_plus_17:
case DW_LANG_C_plus_plus_20:
result = true;
break;
case DW_LANG_C89:
case DW_LANG_C:
case DW_LANG_Ada83:
case DW_LANG_Cobol74:
case DW_LANG_Cobol85:
case DW_LANG_Fortran77:
case DW_LANG_Fortran90:
case DW_LANG_Pascal83:
case DW_LANG_Modula2:
case DW_LANG_Java:
case DW_LANG_C99:
case DW_LANG_Ada95:
case DW_LANG_Fortran95:
case DW_LANG_PLI:
case DW_LANG_ObjC:
case DW_LANG_ObjC_plus_plus:
case DW_LANG_UPC:
case DW_LANG_D:
case DW_LANG_Python:
case DW_LANG_OpenCL:
case DW_LANG_Go:
case DW_LANG_Modula3:
case DW_LANG_Haskell:
case DW_LANG_OCaml:
case DW_LANG_Rust:
case DW_LANG_C11:
case DW_LANG_Swift:
case DW_LANG_Julia:
case DW_LANG_Dylan:
case DW_LANG_Fortran03:
case DW_LANG_Fortran08:
case DW_LANG_RenderScript:
case DW_LANG_BLISS:
case DW_LANG_Mips_Assembler:
case DW_LANG_GOOGLE_RenderScript:
case DW_LANG_BORLAND_Delphi:
case DW_LANG_lo_user:
case DW_LANG_hi_user:
case DW_LANG_Kotlin:
case DW_LANG_Zig:
case DW_LANG_Crystal:
case DW_LANG_C17:
case DW_LANG_Fortran18:
case DW_LANG_Ada2005:
case DW_LANG_Ada2012:
case DW_LANG_Mojo:
result = false;
break;
}
return result;
}
inline bool isFortran(SourceLanguage S) {
bool result = false;
// Deliberately enumerate all the language options so we get a warning when
// new language options are added (-Wswitch) that'll hopefully help keep this
// switch up-to-date when new Fortran versions are added.
switch (S) {
case DW_LANG_Fortran77:
case DW_LANG_Fortran90:
case DW_LANG_Fortran95:
case DW_LANG_Fortran03:
case DW_LANG_Fortran08:
case DW_LANG_Fortran18:
result = true;
break;
case DW_LANG_C89:
case DW_LANG_C:
case DW_LANG_Ada83:
case DW_LANG_C_plus_plus:
case DW_LANG_Cobol74:
case DW_LANG_Cobol85:
case DW_LANG_Pascal83:
case DW_LANG_Modula2:
case DW_LANG_Java:
case DW_LANG_C99:
case DW_LANG_Ada95:
case DW_LANG_PLI:
case DW_LANG_ObjC:
case DW_LANG_ObjC_plus_plus:
case DW_LANG_UPC:
case DW_LANG_D:
case DW_LANG_Python:
case DW_LANG_OpenCL:
case DW_LANG_Go:
case DW_LANG_Modula3:
case DW_LANG_Haskell:
case DW_LANG_C_plus_plus_03:
case DW_LANG_C_plus_plus_11:
case DW_LANG_OCaml:
case DW_LANG_Rust:
case DW_LANG_C11:
case DW_LANG_Swift:
case DW_LANG_Julia:
case DW_LANG_Dylan:
case DW_LANG_C_plus_plus_14:
case DW_LANG_RenderScript:
case DW_LANG_BLISS:
case DW_LANG_Mips_Assembler:
case DW_LANG_GOOGLE_RenderScript:
case DW_LANG_BORLAND_Delphi:
case DW_LANG_lo_user:
case DW_LANG_hi_user:
case DW_LANG_Kotlin:
case DW_LANG_Zig:
case DW_LANG_Crystal:
case DW_LANG_C_plus_plus_17:
case DW_LANG_C_plus_plus_20:
case DW_LANG_C17:
case DW_LANG_Ada2005:
case DW_LANG_Ada2012:
case DW_LANG_Mojo:
result = false;
break;
}
return result;
}
inline bool isC(SourceLanguage S) {
// Deliberately enumerate all the language options so we get a warning when
// new language options are added (-Wswitch) that'll hopefully help keep this
// switch up-to-date when new C++ versions are added.
switch (S) {
case DW_LANG_C11:
case DW_LANG_C17:
case DW_LANG_C89:
case DW_LANG_C99:
case DW_LANG_C:
case DW_LANG_ObjC:
return true;
case DW_LANG_C_plus_plus:
case DW_LANG_C_plus_plus_03:
case DW_LANG_C_plus_plus_11:
case DW_LANG_C_plus_plus_14:
case DW_LANG_C_plus_plus_17:
case DW_LANG_C_plus_plus_20:
case DW_LANG_Ada83:
case DW_LANG_Cobol74:
case DW_LANG_Cobol85:
case DW_LANG_Fortran77:
case DW_LANG_Fortran90:
case DW_LANG_Pascal83:
case DW_LANG_Modula2:
case DW_LANG_Java:
case DW_LANG_Ada95:
case DW_LANG_Fortran95:
case DW_LANG_PLI:
case DW_LANG_ObjC_plus_plus:
case DW_LANG_UPC:
case DW_LANG_D:
case DW_LANG_Python:
case DW_LANG_OpenCL:
case DW_LANG_Go:
case DW_LANG_Modula3:
case DW_LANG_Haskell:
case DW_LANG_OCaml:
case DW_LANG_Rust:
case DW_LANG_Swift:
case DW_LANG_Julia:
case DW_LANG_Dylan:
case DW_LANG_Fortran03:
case DW_LANG_Fortran08:
case DW_LANG_RenderScript:
case DW_LANG_BLISS:
case DW_LANG_Mips_Assembler:
case DW_LANG_GOOGLE_RenderScript:
case DW_LANG_BORLAND_Delphi:
case DW_LANG_lo_user:
case DW_LANG_hi_user:
case DW_LANG_Kotlin:
case DW_LANG_Zig:
case DW_LANG_Crystal:
case DW_LANG_Fortran18:
case DW_LANG_Ada2005:
case DW_LANG_Ada2012:
case DW_LANG_Mojo:
return false;
}
llvm_unreachable("Unknown language kind.");
}
inline TypeKind getArrayIndexTypeEncoding(SourceLanguage S) {
return isFortran(S) ? DW_ATE_signed : DW_ATE_unsigned;
}
enum CaseSensitivity {
// Identifier case codes
DW_ID_case_sensitive = 0x00,
DW_ID_up_case = 0x01,
DW_ID_down_case = 0x02,
DW_ID_case_insensitive = 0x03
};
enum CallingConvention {
// Calling convention codes
#define HANDLE_DW_CC(ID, NAME) DW_CC_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
DW_CC_lo_user = 0x40,
DW_CC_hi_user = 0xff
};
enum InlineAttribute {
// Inline codes
DW_INL_not_inlined = 0x00,
DW_INL_inlined = 0x01,
DW_INL_declared_not_inlined = 0x02,
DW_INL_declared_inlined = 0x03
};
enum ArrayDimensionOrdering {
// Array ordering
DW_ORD_row_major = 0x00,
DW_ORD_col_major = 0x01
};
enum DiscriminantList {
// Discriminant descriptor values
DW_DSC_label = 0x00,
DW_DSC_range = 0x01
};
/// Line Number Standard Opcode Encodings.
enum LineNumberOps : uint8_t {
#define HANDLE_DW_LNS(ID, NAME) DW_LNS_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
};
/// Line Number Extended Opcode Encodings.
enum LineNumberExtendedOps {
#define HANDLE_DW_LNE(ID, NAME) DW_LNE_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
DW_LNE_lo_user = 0x80,
DW_LNE_hi_user = 0xff
};
enum LineNumberEntryFormat {
#define HANDLE_DW_LNCT(ID, NAME) DW_LNCT_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
DW_LNCT_lo_user = 0x2000,
DW_LNCT_hi_user = 0x3fff,
};
enum MacinfoRecordType {
// Macinfo Type Encodings
DW_MACINFO_define = 0x01,
DW_MACINFO_undef = 0x02,
DW_MACINFO_start_file = 0x03,
DW_MACINFO_end_file = 0x04,
DW_MACINFO_vendor_ext = 0xff
};
/// DWARF v5 macro information entry type encodings.
enum MacroEntryType {
#define HANDLE_DW_MACRO(ID, NAME) DW_MACRO_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
DW_MACRO_lo_user = 0xe0,
DW_MACRO_hi_user = 0xff
};
/// GNU .debug_macro macro information entry type encodings.
enum GnuMacroEntryType {
#define HANDLE_DW_MACRO_GNU(ID, NAME) DW_MACRO_GNU_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
DW_MACRO_GNU_lo_user = 0xe0,
DW_MACRO_GNU_hi_user = 0xff
};
/// DWARF v5 range list entry encoding values.
enum RnglistEntries {
#define HANDLE_DW_RLE(ID, NAME) DW_RLE_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
};
/// DWARF v5 loc list entry encoding values.
enum LoclistEntries {
#define HANDLE_DW_LLE(ID, NAME) DW_LLE_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
};
/// Call frame instruction encodings.
enum CallFrameInfo {
#define HANDLE_DW_CFA(ID, NAME) DW_CFA_##NAME = ID,
#define HANDLE_DW_CFA_PRED(ID, NAME, ARCH) DW_CFA_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
DW_CFA_extended = 0x00,
DW_CFA_lo_user = 0x1c,
DW_CFA_hi_user = 0x3f
};
enum Constants {
// Children flag
DW_CHILDREN_no = 0x00,
DW_CHILDREN_yes = 0x01,
DW_EH_PE_absptr = 0x00,
DW_EH_PE_omit = 0xff,
DW_EH_PE_uleb128 = 0x01,
DW_EH_PE_udata2 = 0x02,
DW_EH_PE_udata4 = 0x03,
DW_EH_PE_udata8 = 0x04,
DW_EH_PE_sleb128 = 0x09,
DW_EH_PE_sdata2 = 0x0A,
DW_EH_PE_sdata4 = 0x0B,
DW_EH_PE_sdata8 = 0x0C,
DW_EH_PE_signed = 0x08,
DW_EH_PE_pcrel = 0x10,
DW_EH_PE_textrel = 0x20,
DW_EH_PE_datarel = 0x30,
DW_EH_PE_funcrel = 0x40,
DW_EH_PE_aligned = 0x50,
DW_EH_PE_indirect = 0x80
};
/// Constants for the DW_APPLE_PROPERTY_attributes attribute.
/// Keep this list in sync with clang's DeclObjCCommon.h
/// ObjCPropertyAttribute::Kind!
enum ApplePropertyAttributes {
#define HANDLE_DW_APPLE_PROPERTY(ID, NAME) DW_APPLE_PROPERTY_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
};
/// Constants for unit types in DWARF v5.
enum UnitType : unsigned char {
#define HANDLE_DW_UT(ID, NAME) DW_UT_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
DW_UT_lo_user = 0x80,
DW_UT_hi_user = 0xff
};
enum Index {
#define HANDLE_DW_IDX(ID, NAME) DW_IDX_##NAME = ID,
#include "llvm/BinaryFormat/Dwarf.def"
DW_IDX_lo_user = 0x2000,
DW_IDX_hi_user = 0x3fff
};
inline bool isUnitType(uint8_t UnitType) {
switch (UnitType) {
case DW_UT_compile:
case DW_UT_type:
case DW_UT_partial:
case DW_UT_skeleton:
case DW_UT_split_compile:
case DW_UT_split_type:
return true;
default:
return false;
}
}
inline bool isUnitType(dwarf::Tag T) {
switch (T) {
case DW_TAG_compile_unit:
case DW_TAG_type_unit:
case DW_TAG_partial_unit:
case DW_TAG_skeleton_unit:
return true;
default:
return false;
}
}
// Constants for the DWARF v5 Accelerator Table Proposal
enum AcceleratorTable {
// Data layout descriptors.
DW_ATOM_null = 0u, /// Marker as the end of a list of atoms.
DW_ATOM_die_offset = 1u, // DIE offset in the debug_info section.
DW_ATOM_cu_offset = 2u, // Offset of the compile unit header that contains the
// item in question.
DW_ATOM_die_tag = 3u, // A tag entry.
DW_ATOM_type_flags = 4u, // Set of flags for a type.
DW_ATOM_type_type_flags = 5u, // Dsymutil type extension.
DW_ATOM_qual_name_hash = 6u, // Dsymutil qualified hash extension.
// DW_ATOM_type_flags values.
// Always set for C++, only set for ObjC if this is the @implementation for a
// class.
DW_FLAG_type_implementation = 2u,
// Hash functions.
// Daniel J. Bernstein hash.
DW_hash_function_djb = 0u
};
// Constants for the GNU pubnames/pubtypes extensions supporting gdb index.
enum GDBIndexEntryKind {
GIEK_NONE,
GIEK_TYPE,
GIEK_VARIABLE,
GIEK_FUNCTION,
GIEK_OTHER,
GIEK_UNUSED5,
GIEK_UNUSED6,
GIEK_UNUSED7
};
enum GDBIndexEntryLinkage { GIEL_EXTERNAL, GIEL_STATIC };
/// \defgroup DwarfConstantsDumping Dwarf constants dumping functions
///
/// All these functions map their argument's value back to the
/// corresponding enumerator name or return an empty StringRef if the value
/// isn't known.
///
/// @{
StringRef TagString(unsigned Tag);
StringRef ChildrenString(unsigned Children);
StringRef AttributeString(unsigned Attribute);
StringRef FormEncodingString(unsigned Encoding);
StringRef OperationEncodingString(unsigned Encoding);
StringRef SubOperationEncodingString(unsigned OpEncoding,
unsigned SubOpEncoding);
StringRef AttributeEncodingString(unsigned Encoding);
StringRef DecimalSignString(unsigned Sign);
StringRef EndianityString(unsigned Endian);
StringRef AccessibilityString(unsigned Access);
StringRef DefaultedMemberString(unsigned DefaultedEncodings);
StringRef VisibilityString(unsigned Visibility);
StringRef VirtualityString(unsigned Virtuality);
StringRef LanguageString(unsigned Language);
StringRef CaseString(unsigned Case);
StringRef ConventionString(unsigned Convention);
StringRef InlineCodeString(unsigned Code);
StringRef ArrayOrderString(unsigned Order);
StringRef LNStandardString(unsigned Standard);
StringRef LNExtendedString(unsigned Encoding);
StringRef MacinfoString(unsigned Encoding);
StringRef MacroString(unsigned Encoding);
StringRef GnuMacroString(unsigned Encoding);
StringRef RangeListEncodingString(unsigned Encoding);
StringRef LocListEncodingString(unsigned Encoding);
StringRef CallFrameString(unsigned Encoding, Triple::ArchType Arch);
StringRef ApplePropertyString(unsigned);
StringRef UnitTypeString(unsigned);
StringRef AtomTypeString(unsigned Atom);
StringRef GDBIndexEntryKindString(GDBIndexEntryKind Kind);
StringRef GDBIndexEntryLinkageString(GDBIndexEntryLinkage Linkage);
StringRef IndexString(unsigned Idx);
StringRef FormatString(DwarfFormat Format);
StringRef FormatString(bool IsDWARF64);
StringRef RLEString(unsigned RLE);
/// @}
/// \defgroup DwarfConstantsParsing Dwarf constants parsing functions
///
/// These functions map their strings back to the corresponding enumeration
/// value or return 0 if there is none, except for these exceptions:
///
/// \li \a getTag() returns \a DW_TAG_invalid on invalid input.
/// \li \a getVirtuality() returns \a DW_VIRTUALITY_invalid on invalid input.
/// \li \a getMacinfo() returns \a DW_MACINFO_invalid on invalid input.
///
/// @{
unsigned getTag(StringRef TagString);
unsigned getOperationEncoding(StringRef OperationEncodingString);
unsigned getSubOperationEncoding(unsigned OpEncoding,
StringRef SubOperationEncodingString);
unsigned getVirtuality(StringRef VirtualityString);
unsigned getLanguage(StringRef LanguageString);
unsigned getCallingConvention(StringRef LanguageString);
unsigned getAttributeEncoding(StringRef EncodingString);
unsigned getMacinfo(StringRef MacinfoString);
unsigned getMacro(StringRef MacroString);
/// @}
/// \defgroup DwarfConstantsVersioning Dwarf version for constants
///
/// For constants defined by DWARF, returns the DWARF version when the constant
/// was first defined. For vendor extensions, if there is a version-related
/// policy for when to emit it, returns a version number for that policy.
/// Otherwise returns 0.
///
/// @{
unsigned TagVersion(Tag T);
unsigned AttributeVersion(Attribute A);
unsigned FormVersion(Form F);
unsigned OperationVersion(LocationAtom O);
unsigned AttributeEncodingVersion(TypeKind E);
unsigned LanguageVersion(SourceLanguage L);
/// @}
/// \defgroup DwarfConstantsVendor Dwarf "vendor" for constants
///
/// These functions return an identifier describing "who" defined the constant,
/// either the DWARF standard itself or the vendor who defined the extension.
///
/// @{
unsigned TagVendor(Tag T);
unsigned AttributeVendor(Attribute A);
unsigned FormVendor(Form F);
unsigned OperationVendor(LocationAtom O);
unsigned AttributeEncodingVendor(TypeKind E);
unsigned LanguageVendor(SourceLanguage L);
/// @}
std::optional<unsigned> LanguageLowerBound(SourceLanguage L);
/// The size of a reference determined by the DWARF 32/64-bit format.
inline uint8_t getDwarfOffsetByteSize(DwarfFormat Format) {
switch (Format) {
case DwarfFormat::DWARF32:
return 4;
case DwarfFormat::DWARF64:
return 8;
}
llvm_unreachable("Invalid Format value");
}
/// A helper struct providing information about the byte size of DW_FORM
/// values that vary in size depending on the DWARF version, address byte
/// size, or DWARF32/DWARF64.
struct FormParams {
uint16_t Version;
uint8_t AddrSize;
DwarfFormat Format;
/// True if DWARF v2 output generally uses relocations for references
/// to other .debug_* sections.
bool DwarfUsesRelocationsAcrossSections = false;
/// The definition of the size of form DW_FORM_ref_addr depends on the
/// version. In DWARF v2 it's the size of an address; after that, it's the
/// size of a reference.
uint8_t getRefAddrByteSize() const {
if (Version == 2)
return AddrSize;
return getDwarfOffsetByteSize();
}
/// The size of a reference is determined by the DWARF 32/64-bit format.
uint8_t getDwarfOffsetByteSize() const {
return dwarf::getDwarfOffsetByteSize(Format);
}
explicit operator bool() const { return Version && AddrSize; }
};
/// Get the byte size of the unit length field depending on the DWARF format.
inline uint8_t getUnitLengthFieldByteSize(DwarfFormat Format) {
switch (Format) {
case DwarfFormat::DWARF32:
return 4;
case DwarfFormat::DWARF64:
return 12;
}
llvm_unreachable("Invalid Format value");
}
/// Get the fixed byte size for a given form.
///
/// If the form has a fixed byte size, then an Optional with a value will be
/// returned. If the form is always encoded using a variable length storage
/// format (ULEB or SLEB numbers or blocks) then std::nullopt will be returned.
///
/// \param Form DWARF form to get the fixed byte size for.
/// \param Params DWARF parameters to help interpret forms.
/// \returns std::optional<uint8_t> value with the fixed byte size or
/// std::nullopt if \p Form doesn't have a fixed byte size.
std::optional<uint8_t> getFixedFormByteSize(dwarf::Form Form,
FormParams Params);
/// Tells whether the specified form is defined in the specified version,
/// or is an extension if extensions are allowed.
bool isValidFormForVersion(Form F, unsigned Version, bool ExtensionsOk = true);
/// Returns the symbolic string representing Val when used as a value
/// for attribute Attr.
StringRef AttributeValueString(uint16_t Attr, unsigned Val);
/// Returns the symbolic string representing Val when used as a value
/// for atom Atom.
StringRef AtomValueString(uint16_t Atom, unsigned Val);
/// Describes an entry of the various gnu_pub* debug sections.
///
/// The gnu_pub* kind looks like:
///
/// 0-3 reserved
/// 4-6 symbol kind
/// 7 0 == global, 1 == static
///
/// A gdb_index descriptor includes the above kind, shifted 24 bits up with the
/// offset of the cu within the debug_info section stored in those 24 bits.
struct PubIndexEntryDescriptor {
GDBIndexEntryKind Kind;
GDBIndexEntryLinkage Linkage;
PubIndexEntryDescriptor(GDBIndexEntryKind Kind, GDBIndexEntryLinkage Linkage)
: Kind(Kind), Linkage(Linkage) {}
/* implicit */ PubIndexEntryDescriptor(GDBIndexEntryKind Kind)
: Kind(Kind), Linkage(GIEL_EXTERNAL) {}
explicit PubIndexEntryDescriptor(uint8_t Value)
: Kind(
static_cast<GDBIndexEntryKind>((Value & KIND_MASK) >> KIND_OFFSET)),
Linkage(static_cast<GDBIndexEntryLinkage>((Value & LINKAGE_MASK) >>
LINKAGE_OFFSET)) {}
uint8_t toBits() const {
return Kind << KIND_OFFSET | Linkage << LINKAGE_OFFSET;
}
private:
enum {
KIND_OFFSET = 4,
KIND_MASK = 7 << KIND_OFFSET,
LINKAGE_OFFSET = 7,
LINKAGE_MASK = 1 << LINKAGE_OFFSET
};
};
template <typename Enum> struct EnumTraits : public std::false_type {};
template <> struct EnumTraits<Attribute> : public std::true_type {
static constexpr char Type[3] = "AT";
static constexpr StringRef (*StringFn)(unsigned) = &AttributeString;
};
template <> struct EnumTraits<Form> : public std::true_type {
static constexpr char Type[5] = "FORM";
static constexpr StringRef (*StringFn)(unsigned) = &FormEncodingString;
};
template <> struct EnumTraits<Index> : public std::true_type {
static constexpr char Type[4] = "IDX";
static constexpr StringRef (*StringFn)(unsigned) = &IndexString;
};
template <> struct EnumTraits<Tag> : public std::true_type {
static constexpr char Type[4] = "TAG";
static constexpr StringRef (*StringFn)(unsigned) = &TagString;
};
template <> struct EnumTraits<LineNumberOps> : public std::true_type {
static constexpr char Type[4] = "LNS";
static constexpr StringRef (*StringFn)(unsigned) = &LNStandardString;
};
template <> struct EnumTraits<LocationAtom> : public std::true_type {
static constexpr char Type[3] = "OP";
static constexpr StringRef (*StringFn)(unsigned) = &OperationEncodingString;
};
inline uint64_t computeTombstoneAddress(uint8_t AddressByteSize) {
return std::numeric_limits<uint64_t>::max() >> (8 - AddressByteSize) * 8;
}
} // End of namespace dwarf
/// Dwarf constants format_provider
///
/// Specialization of the format_provider template for dwarf enums. Unlike the
/// dumping functions above, these format unknown enumerator values as
/// DW_TYPE_unknown_1234 (e.g. DW_TAG_unknown_ffff).
template <typename Enum>
struct format_provider<Enum, std::enable_if_t<dwarf::EnumTraits<Enum>::value>> {
static void format(const Enum &E, raw_ostream &OS, StringRef Style) {
StringRef Str = dwarf::EnumTraits<Enum>::StringFn(E);
if (Str.empty()) {
OS << "DW_" << dwarf::EnumTraits<Enum>::Type << "_unknown_"
<< llvm::format("%x", E);
} else
OS << Str;
}
};
} // End of namespace llvm
#endif
PK hwFZr�8{ BinaryFormat/WasmRelocs.defnu �[��� #ifndef WASM_RELOC
#error "WASM_RELOC must be defined"
#endif
WASM_RELOC(R_WASM_FUNCTION_INDEX_LEB, 0)
WASM_RELOC(R_WASM_TABLE_INDEX_SLEB, 1)
WASM_RELOC(R_WASM_TABLE_INDEX_I32, 2)
WASM_RELOC(R_WASM_MEMORY_ADDR_LEB, 3)
WASM_RELOC(R_WASM_MEMORY_ADDR_SLEB, 4)
WASM_RELOC(R_WASM_MEMORY_ADDR_I32, 5)
WASM_RELOC(R_WASM_TYPE_INDEX_LEB, 6)
WASM_RELOC(R_WASM_GLOBAL_INDEX_LEB, 7)
WASM_RELOC(R_WASM_FUNCTION_OFFSET_I32, 8)
WASM_RELOC(R_WASM_SECTION_OFFSET_I32, 9)
WASM_RELOC(R_WASM_TAG_INDEX_LEB, 10)
WASM_RELOC(R_WASM_MEMORY_ADDR_REL_SLEB, 11)
WASM_RELOC(R_WASM_TABLE_INDEX_REL_SLEB, 12)
WASM_RELOC(R_WASM_GLOBAL_INDEX_I32, 13)
WASM_RELOC(R_WASM_MEMORY_ADDR_LEB64, 14)
WASM_RELOC(R_WASM_MEMORY_ADDR_SLEB64, 15)
WASM_RELOC(R_WASM_MEMORY_ADDR_I64, 16)
WASM_RELOC(R_WASM_MEMORY_ADDR_REL_SLEB64, 17)
WASM_RELOC(R_WASM_TABLE_INDEX_SLEB64, 18)
WASM_RELOC(R_WASM_TABLE_INDEX_I64, 19)
WASM_RELOC(R_WASM_TABLE_NUMBER_LEB, 20)
WASM_RELOC(R_WASM_MEMORY_ADDR_TLS_SLEB, 21)
WASM_RELOC(R_WASM_FUNCTION_OFFSET_I64, 22)
WASM_RELOC(R_WASM_MEMORY_ADDR_LOCREL_I32, 23)
WASM_RELOC(R_WASM_TABLE_INDEX_REL_SLEB64, 24)
WASM_RELOC(R_WASM_MEMORY_ADDR_TLS_SLEB64, 25)
WASM_RELOC(R_WASM_FUNCTION_INDEX_I32, 26)
PK hwFZ�i�9# 9# BinaryFormat/Minidump.hnu �[��� //===- Minidump.h - Minidump constants and structures -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This header constants and data structures pertaining to the Windows Minidump
// core file format.
//
// Reference:
// https://msdn.microsoft.com/en-us/library/windows/desktop/ms679293(v=vs.85).aspx
// https://chromium.googlesource.com/breakpad/breakpad/
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_BINARYFORMAT_MINIDUMP_H
#define LLVM_BINARYFORMAT_MINIDUMP_H
#include "llvm/ADT/BitmaskEnum.h"
#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/Support/Endian.h"
namespace llvm {
namespace minidump {
LLVM_ENABLE_BITMASK_ENUMS_IN_NAMESPACE();
/// The minidump header is the first part of a minidump file. It identifies the
/// file as a minidump file, and gives the location of the stream directory.
struct Header {
static constexpr uint32_t MagicSignature = 0x504d444d; // PMDM
static constexpr uint16_t MagicVersion = 0xa793;
support::ulittle32_t Signature;
// The high 16 bits of version field are implementation specific. The low 16
// bits should be MagicVersion.
support::ulittle32_t Version;
support::ulittle32_t NumberOfStreams;
support::ulittle32_t StreamDirectoryRVA;
support::ulittle32_t Checksum;
support::ulittle32_t TimeDateStamp;
support::ulittle64_t Flags;
};
static_assert(sizeof(Header) == 32);
/// The type of a minidump stream identifies its contents. Streams numbers after
/// LastReserved are for application-defined data streams.
enum class StreamType : uint32_t {
#define HANDLE_MDMP_STREAM_TYPE(CODE, NAME) NAME = CODE,
#include "llvm/BinaryFormat/MinidumpConstants.def"
Unused = 0,
LastReserved = 0x0000ffff,
};
/// Specifies the location (and size) of various objects in the minidump file.
/// The location is relative to the start of the file.
struct LocationDescriptor {
support::ulittle32_t DataSize;
support::ulittle32_t RVA;
};
static_assert(sizeof(LocationDescriptor) == 8);
/// Describes a single memory range (both its VM address and where to find it in
/// the file) of the process from which this minidump file was generated.
struct MemoryDescriptor {
support::ulittle64_t StartOfMemoryRange;
LocationDescriptor Memory;
};
static_assert(sizeof(MemoryDescriptor) == 16);
struct MemoryInfoListHeader {
support::ulittle32_t SizeOfHeader;
support::ulittle32_t SizeOfEntry;
support::ulittle64_t NumberOfEntries;
MemoryInfoListHeader() = default;
MemoryInfoListHeader(uint32_t SizeOfHeader, uint32_t SizeOfEntry,
uint64_t NumberOfEntries)
: SizeOfHeader(SizeOfHeader), SizeOfEntry(SizeOfEntry),
NumberOfEntries(NumberOfEntries) {}
};
static_assert(sizeof(MemoryInfoListHeader) == 16);
enum class MemoryProtection : uint32_t {
#define HANDLE_MDMP_PROTECT(CODE, NAME, NATIVENAME) NAME = CODE,
#include "llvm/BinaryFormat/MinidumpConstants.def"
LLVM_MARK_AS_BITMASK_ENUM(/*LargestValue=*/0xffffffffu),
};
enum class MemoryState : uint32_t {
#define HANDLE_MDMP_MEMSTATE(CODE, NAME, NATIVENAME) NAME = CODE,
#include "llvm/BinaryFormat/MinidumpConstants.def"
LLVM_MARK_AS_BITMASK_ENUM(/*LargestValue=*/0xffffffffu),
};
enum class MemoryType : uint32_t {
#define HANDLE_MDMP_MEMTYPE(CODE, NAME, NATIVENAME) NAME = CODE,
#include "llvm/BinaryFormat/MinidumpConstants.def"
LLVM_MARK_AS_BITMASK_ENUM(/*LargestValue=*/0xffffffffu),
};
struct MemoryInfo {
support::ulittle64_t BaseAddress;
support::ulittle64_t AllocationBase;
support::little_t<MemoryProtection> AllocationProtect;
support::ulittle32_t Reserved0;
support::ulittle64_t RegionSize;
support::little_t<MemoryState> State;
support::little_t<MemoryProtection> Protect;
support::little_t<MemoryType> Type;
support::ulittle32_t Reserved1;
};
static_assert(sizeof(MemoryInfo) == 48);
/// Specifies the location and type of a single stream in the minidump file. The
/// minidump stream directory is an array of entries of this type, with its size
/// given by Header.NumberOfStreams.
struct Directory {
support::little_t<StreamType> Type;
LocationDescriptor Location;
};
static_assert(sizeof(Directory) == 12);
/// The processor architecture of the system that generated this minidump. Used
/// in the ProcessorArch field of the SystemInfo stream.
enum class ProcessorArchitecture : uint16_t {
#define HANDLE_MDMP_ARCH(CODE, NAME) NAME = CODE,
#include "llvm/BinaryFormat/MinidumpConstants.def"
};
/// The OS Platform of the system that generated this minidump. Used in the
/// PlatformId field of the SystemInfo stream.
enum class OSPlatform : uint32_t {
#define HANDLE_MDMP_PLATFORM(CODE, NAME) NAME = CODE,
#include "llvm/BinaryFormat/MinidumpConstants.def"
};
/// Detailed information about the processor of the system that generated this
/// minidump. Its interpretation depends on the ProcessorArchitecture enum.
union CPUInfo {
struct X86Info {
char VendorID[12]; // cpuid 0: ebx, edx, ecx
support::ulittle32_t VersionInfo; // cpuid 1: eax
support::ulittle32_t FeatureInfo; // cpuid 1: edx
support::ulittle32_t AMDExtendedFeatures; // cpuid 0x80000001, ebx
} X86;
struct ArmInfo {
support::ulittle32_t CPUID;
support::ulittle32_t ElfHWCaps; // linux specific, 0 otherwise
} Arm;
struct OtherInfo {
uint8_t ProcessorFeatures[16];
} Other;
};
static_assert(sizeof(CPUInfo) == 24);
/// The SystemInfo stream, containing various information about the system where
/// this minidump was generated.
struct SystemInfo {
support::little_t<ProcessorArchitecture> ProcessorArch;
support::ulittle16_t ProcessorLevel;
support::ulittle16_t ProcessorRevision;
uint8_t NumberOfProcessors;
uint8_t ProductType;
support::ulittle32_t MajorVersion;
support::ulittle32_t MinorVersion;
support::ulittle32_t BuildNumber;
support::little_t<OSPlatform> PlatformId;
support::ulittle32_t CSDVersionRVA;
support::ulittle16_t SuiteMask;
support::ulittle16_t Reserved;
CPUInfo CPU;
};
static_assert(sizeof(SystemInfo) == 56);
struct VSFixedFileInfo {
support::ulittle32_t Signature;
support::ulittle32_t StructVersion;
support::ulittle32_t FileVersionHigh;
support::ulittle32_t FileVersionLow;
support::ulittle32_t ProductVersionHigh;
support::ulittle32_t ProductVersionLow;
support::ulittle32_t FileFlagsMask;
support::ulittle32_t FileFlags;
support::ulittle32_t FileOS;
support::ulittle32_t FileType;
support::ulittle32_t FileSubtype;
support::ulittle32_t FileDateHigh;
support::ulittle32_t FileDateLow;
};
static_assert(sizeof(VSFixedFileInfo) == 52);
inline bool operator==(const VSFixedFileInfo &LHS, const VSFixedFileInfo &RHS) {
return memcmp(&LHS, &RHS, sizeof(VSFixedFileInfo)) == 0;
}
struct Module {
support::ulittle64_t BaseOfImage;
support::ulittle32_t SizeOfImage;
support::ulittle32_t Checksum;
support::ulittle32_t TimeDateStamp;
support::ulittle32_t ModuleNameRVA;
VSFixedFileInfo VersionInfo;
LocationDescriptor CvRecord;
LocationDescriptor MiscRecord;
support::ulittle64_t Reserved0;
support::ulittle64_t Reserved1;
};
static_assert(sizeof(Module) == 108);
/// Describes a single thread in the minidump file. Part of the ThreadList
/// stream.
struct Thread {
support::ulittle32_t ThreadId;
support::ulittle32_t SuspendCount;
support::ulittle32_t PriorityClass;
support::ulittle32_t Priority;
support::ulittle64_t EnvironmentBlock;
MemoryDescriptor Stack;
LocationDescriptor Context;
};
static_assert(sizeof(Thread) == 48);
struct Exception {
static constexpr size_t MaxParameters = 15;
support::ulittle32_t ExceptionCode;
support::ulittle32_t ExceptionFlags;
support::ulittle64_t ExceptionRecord;
support::ulittle64_t ExceptionAddress;
support::ulittle32_t NumberParameters;
support::ulittle32_t UnusedAlignment;
support::ulittle64_t ExceptionInformation[MaxParameters];
};
static_assert(sizeof(Exception) == 152);
struct ExceptionStream {
support::ulittle32_t ThreadId;
support::ulittle32_t UnusedAlignment;
Exception ExceptionRecord;
LocationDescriptor ThreadContext;
};
static_assert(sizeof(ExceptionStream) == 168);
} // namespace minidump
template <> struct DenseMapInfo<minidump::StreamType> {
static minidump::StreamType getEmptyKey() { return minidump::StreamType(-1); }
static minidump::StreamType getTombstoneKey() {
return minidump::StreamType(-2);
}
static unsigned getHashValue(minidump::StreamType Val) {
return DenseMapInfo<uint32_t>::getHashValue(static_cast<uint32_t>(Val));
}
static bool isEqual(minidump::StreamType LHS, minidump::StreamType RHS) {
return LHS == RHS;
}
};
} // namespace llvm
#endif // LLVM_BINARYFORMAT_MINIDUMP_H
PK hwFZ��zҔ� �� BinaryFormat/MachO.hnu �[��� //===-- llvm/BinaryFormat/MachO.h - The MachO file format -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines manifest constants for the MachO object file format.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_BINARYFORMAT_MACHO_H
#define LLVM_BINARYFORMAT_MACHO_H
#include "llvm/Support/Compiler.h"
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/SwapByteOrder.h"
namespace llvm {
class Triple;
namespace MachO {
// Enums from <mach-o/loader.h>
enum : uint32_t {
// Constants for the "magic" field in llvm::MachO::mach_header and
// llvm::MachO::mach_header_64
MH_MAGIC = 0xFEEDFACEu,
MH_CIGAM = 0xCEFAEDFEu,
MH_MAGIC_64 = 0xFEEDFACFu,
MH_CIGAM_64 = 0xCFFAEDFEu,
FAT_MAGIC = 0xCAFEBABEu,
FAT_CIGAM = 0xBEBAFECAu,
FAT_MAGIC_64 = 0xCAFEBABFu,
FAT_CIGAM_64 = 0xBFBAFECAu
};
enum HeaderFileType {
// Constants for the "filetype" field in llvm::MachO::mach_header and
// llvm::MachO::mach_header_64
MH_OBJECT = 0x1u,
MH_EXECUTE = 0x2u,
MH_FVMLIB = 0x3u,
MH_CORE = 0x4u,
MH_PRELOAD = 0x5u,
MH_DYLIB = 0x6u,
MH_DYLINKER = 0x7u,
MH_BUNDLE = 0x8u,
MH_DYLIB_STUB = 0x9u,
MH_DSYM = 0xAu,
MH_KEXT_BUNDLE = 0xBu,
MH_FILESET = 0xCu,
};
enum {
// Constant bits for the "flags" field in llvm::MachO::mach_header and
// llvm::MachO::mach_header_64
MH_NOUNDEFS = 0x00000001u,
MH_INCRLINK = 0x00000002u,
MH_DYLDLINK = 0x00000004u,
MH_BINDATLOAD = 0x00000008u,
MH_PREBOUND = 0x00000010u,
MH_SPLIT_SEGS = 0x00000020u,
MH_LAZY_INIT = 0x00000040u,
MH_TWOLEVEL = 0x00000080u,
MH_FORCE_FLAT = 0x00000100u,
MH_NOMULTIDEFS = 0x00000200u,
MH_NOFIXPREBINDING = 0x00000400u,
MH_PREBINDABLE = 0x00000800u,
MH_ALLMODSBOUND = 0x00001000u,
MH_SUBSECTIONS_VIA_SYMBOLS = 0x00002000u,
MH_CANONICAL = 0x00004000u,
MH_WEAK_DEFINES = 0x00008000u,
MH_BINDS_TO_WEAK = 0x00010000u,
MH_ALLOW_STACK_EXECUTION = 0x00020000u,
MH_ROOT_SAFE = 0x00040000u,
MH_SETUID_SAFE = 0x00080000u,
MH_NO_REEXPORTED_DYLIBS = 0x00100000u,
MH_PIE = 0x00200000u,
MH_DEAD_STRIPPABLE_DYLIB = 0x00400000u,
MH_HAS_TLV_DESCRIPTORS = 0x00800000u,
MH_NO_HEAP_EXECUTION = 0x01000000u,
MH_APP_EXTENSION_SAFE = 0x02000000u,
MH_NLIST_OUTOFSYNC_WITH_DYLDINFO = 0x04000000u,
MH_SIM_SUPPORT = 0x08000000u,
MH_DYLIB_IN_CACHE = 0x80000000u,
};
enum : uint32_t {
// Flags for the "cmd" field in llvm::MachO::load_command
LC_REQ_DYLD = 0x80000000u
};
#define HANDLE_LOAD_COMMAND(LCName, LCValue, LCStruct) LCName = LCValue,
enum LoadCommandType : uint32_t {
#include "llvm/BinaryFormat/MachO.def"
};
#undef HANDLE_LOAD_COMMAND
enum : uint32_t {
// Constant bits for the "flags" field in llvm::MachO::segment_command
SG_HIGHVM = 0x1u,
SG_FVMLIB = 0x2u,
SG_NORELOC = 0x4u,
SG_PROTECTED_VERSION_1 = 0x8u,
SG_READ_ONLY = 0x10u,
// Constant masks for the "flags" field in llvm::MachO::section and
// llvm::MachO::section_64
SECTION_TYPE = 0x000000ffu, // SECTION_TYPE
SECTION_ATTRIBUTES = 0xffffff00u, // SECTION_ATTRIBUTES
SECTION_ATTRIBUTES_USR = 0xff000000u, // SECTION_ATTRIBUTES_USR
SECTION_ATTRIBUTES_SYS = 0x00ffff00u // SECTION_ATTRIBUTES_SYS
};
/// These are the section type and attributes fields. A MachO section can
/// have only one Type, but can have any of the attributes specified.
enum SectionType : uint32_t {
// Constant masks for the "flags[7:0]" field in llvm::MachO::section and
// llvm::MachO::section_64 (mask "flags" with SECTION_TYPE)
/// S_REGULAR - Regular section.
S_REGULAR = 0x00u,
/// S_ZEROFILL - Zero fill on demand section.
S_ZEROFILL = 0x01u,
/// S_CSTRING_LITERALS - Section with literal C strings.
S_CSTRING_LITERALS = 0x02u,
/// S_4BYTE_LITERALS - Section with 4 byte literals.
S_4BYTE_LITERALS = 0x03u,
/// S_8BYTE_LITERALS - Section with 8 byte literals.
S_8BYTE_LITERALS = 0x04u,
/// S_LITERAL_POINTERS - Section with pointers to literals.
S_LITERAL_POINTERS = 0x05u,
/// S_NON_LAZY_SYMBOL_POINTERS - Section with non-lazy symbol pointers.
S_NON_LAZY_SYMBOL_POINTERS = 0x06u,
/// S_LAZY_SYMBOL_POINTERS - Section with lazy symbol pointers.
S_LAZY_SYMBOL_POINTERS = 0x07u,
/// S_SYMBOL_STUBS - Section with symbol stubs, byte size of stub in
/// the Reserved2 field.
S_SYMBOL_STUBS = 0x08u,
/// S_MOD_INIT_FUNC_POINTERS - Section with only function pointers for
/// initialization.
S_MOD_INIT_FUNC_POINTERS = 0x09u,
/// S_MOD_TERM_FUNC_POINTERS - Section with only function pointers for
/// termination.
S_MOD_TERM_FUNC_POINTERS = 0x0au,
/// S_COALESCED - Section contains symbols that are to be coalesced.
S_COALESCED = 0x0bu,
/// S_GB_ZEROFILL - Zero fill on demand section (that can be larger than 4
/// gigabytes).
S_GB_ZEROFILL = 0x0cu,
/// S_INTERPOSING - Section with only pairs of function pointers for
/// interposing.
S_INTERPOSING = 0x0du,
/// S_16BYTE_LITERALS - Section with only 16 byte literals.
S_16BYTE_LITERALS = 0x0eu,
/// S_DTRACE_DOF - Section contains DTrace Object Format.
S_DTRACE_DOF = 0x0fu,
/// S_LAZY_DYLIB_SYMBOL_POINTERS - Section with lazy symbol pointers to
/// lazy loaded dylibs.
S_LAZY_DYLIB_SYMBOL_POINTERS = 0x10u,
/// S_THREAD_LOCAL_REGULAR - Thread local data section.
S_THREAD_LOCAL_REGULAR = 0x11u,
/// S_THREAD_LOCAL_ZEROFILL - Thread local zerofill section.
S_THREAD_LOCAL_ZEROFILL = 0x12u,
/// S_THREAD_LOCAL_VARIABLES - Section with thread local variable
/// structure data.
S_THREAD_LOCAL_VARIABLES = 0x13u,
/// S_THREAD_LOCAL_VARIABLE_POINTERS - Section with pointers to thread
/// local structures.
S_THREAD_LOCAL_VARIABLE_POINTERS = 0x14u,
/// S_THREAD_LOCAL_INIT_FUNCTION_POINTERS - Section with thread local
/// variable initialization pointers to functions.
S_THREAD_LOCAL_INIT_FUNCTION_POINTERS = 0x15u,
/// S_INIT_FUNC_OFFSETS - Section with 32-bit offsets to initializer
/// functions.
S_INIT_FUNC_OFFSETS = 0x16u,
LAST_KNOWN_SECTION_TYPE = S_INIT_FUNC_OFFSETS
};
enum : uint32_t {
// Constant masks for the "flags[31:24]" field in llvm::MachO::section and
// llvm::MachO::section_64 (mask "flags" with SECTION_ATTRIBUTES_USR)
/// S_ATTR_PURE_INSTRUCTIONS - Section contains only true machine
/// instructions.
S_ATTR_PURE_INSTRUCTIONS = 0x80000000u,
/// S_ATTR_NO_TOC - Section contains coalesced symbols that are not to be
/// in a ranlib table of contents.
S_ATTR_NO_TOC = 0x40000000u,
/// S_ATTR_STRIP_STATIC_SYMS - Ok to strip static symbols in this section
/// in files with the MY_DYLDLINK flag.
S_ATTR_STRIP_STATIC_SYMS = 0x20000000u,
/// S_ATTR_NO_DEAD_STRIP - No dead stripping.
S_ATTR_NO_DEAD_STRIP = 0x10000000u,
/// S_ATTR_LIVE_SUPPORT - Blocks are live if they reference live blocks.
S_ATTR_LIVE_SUPPORT = 0x08000000u,
/// S_ATTR_SELF_MODIFYING_CODE - Used with i386 code stubs written on by
/// dyld.
S_ATTR_SELF_MODIFYING_CODE = 0x04000000u,
/// S_ATTR_DEBUG - A debug section.
S_ATTR_DEBUG = 0x02000000u,
// Constant masks for the "flags[23:8]" field in llvm::MachO::section and
// llvm::MachO::section_64 (mask "flags" with SECTION_ATTRIBUTES_SYS)
/// S_ATTR_SOME_INSTRUCTIONS - Section contains some machine instructions.
S_ATTR_SOME_INSTRUCTIONS = 0x00000400u,
/// S_ATTR_EXT_RELOC - Section has external relocation entries.
S_ATTR_EXT_RELOC = 0x00000200u,
/// S_ATTR_LOC_RELOC - Section has local relocation entries.
S_ATTR_LOC_RELOC = 0x00000100u,
// Constant masks for the value of an indirect symbol in an indirect
// symbol table
INDIRECT_SYMBOL_LOCAL = 0x80000000u,
INDIRECT_SYMBOL_ABS = 0x40000000u
};
enum DataRegionType {
// Constants for the "kind" field in a data_in_code_entry structure
DICE_KIND_DATA = 1u,
DICE_KIND_JUMP_TABLE8 = 2u,
DICE_KIND_JUMP_TABLE16 = 3u,
DICE_KIND_JUMP_TABLE32 = 4u,
DICE_KIND_ABS_JUMP_TABLE32 = 5u
};
enum RebaseType {
REBASE_TYPE_POINTER = 1u,
REBASE_TYPE_TEXT_ABSOLUTE32 = 2u,
REBASE_TYPE_TEXT_PCREL32 = 3u
};
enum { REBASE_OPCODE_MASK = 0xF0u, REBASE_IMMEDIATE_MASK = 0x0Fu };
enum RebaseOpcode {
REBASE_OPCODE_DONE = 0x00u,
REBASE_OPCODE_SET_TYPE_IMM = 0x10u,
REBASE_OPCODE_SET_SEGMENT_AND_OFFSET_ULEB = 0x20u,
REBASE_OPCODE_ADD_ADDR_ULEB = 0x30u,
REBASE_OPCODE_ADD_ADDR_IMM_SCALED = 0x40u,
REBASE_OPCODE_DO_REBASE_IMM_TIMES = 0x50u,
REBASE_OPCODE_DO_REBASE_ULEB_TIMES = 0x60u,
REBASE_OPCODE_DO_REBASE_ADD_ADDR_ULEB = 0x70u,
REBASE_OPCODE_DO_REBASE_ULEB_TIMES_SKIPPING_ULEB = 0x80u
};
enum BindType {
BIND_TYPE_POINTER = 1u,
BIND_TYPE_TEXT_ABSOLUTE32 = 2u,
BIND_TYPE_TEXT_PCREL32 = 3u
};
enum BindSpecialDylib {
BIND_SPECIAL_DYLIB_SELF = 0,
BIND_SPECIAL_DYLIB_MAIN_EXECUTABLE = -1,
BIND_SPECIAL_DYLIB_FLAT_LOOKUP = -2,
BIND_SPECIAL_DYLIB_WEAK_LOOKUP = -3
};
enum {
BIND_SYMBOL_FLAGS_WEAK_IMPORT = 0x1u,
BIND_SYMBOL_FLAGS_NON_WEAK_DEFINITION = 0x8u,
BIND_OPCODE_MASK = 0xF0u,
BIND_IMMEDIATE_MASK = 0x0Fu
};
enum BindOpcode {
BIND_OPCODE_DONE = 0x00u,
BIND_OPCODE_SET_DYLIB_ORDINAL_IMM = 0x10u,
BIND_OPCODE_SET_DYLIB_ORDINAL_ULEB = 0x20u,
BIND_OPCODE_SET_DYLIB_SPECIAL_IMM = 0x30u,
BIND_OPCODE_SET_SYMBOL_TRAILING_FLAGS_IMM = 0x40u,
BIND_OPCODE_SET_TYPE_IMM = 0x50u,
BIND_OPCODE_SET_ADDEND_SLEB = 0x60u,
BIND_OPCODE_SET_SEGMENT_AND_OFFSET_ULEB = 0x70u,
BIND_OPCODE_ADD_ADDR_ULEB = 0x80u,
BIND_OPCODE_DO_BIND = 0x90u,
BIND_OPCODE_DO_BIND_ADD_ADDR_ULEB = 0xA0u,
BIND_OPCODE_DO_BIND_ADD_ADDR_IMM_SCALED = 0xB0u,
BIND_OPCODE_DO_BIND_ULEB_TIMES_SKIPPING_ULEB = 0xC0u
};
enum {
EXPORT_SYMBOL_FLAGS_KIND_MASK = 0x03u,
EXPORT_SYMBOL_FLAGS_WEAK_DEFINITION = 0x04u,
EXPORT_SYMBOL_FLAGS_REEXPORT = 0x08u,
EXPORT_SYMBOL_FLAGS_STUB_AND_RESOLVER = 0x10u
};
enum ExportSymbolKind {
EXPORT_SYMBOL_FLAGS_KIND_REGULAR = 0x00u,
EXPORT_SYMBOL_FLAGS_KIND_THREAD_LOCAL = 0x01u,
EXPORT_SYMBOL_FLAGS_KIND_ABSOLUTE = 0x02u
};
enum {
// Constant masks for the "n_type" field in llvm::MachO::nlist and
// llvm::MachO::nlist_64
N_STAB = 0xe0,
N_PEXT = 0x10,
N_TYPE = 0x0e,
N_EXT = 0x01
};
enum NListType : uint8_t {
// Constants for the "n_type & N_TYPE" llvm::MachO::nlist and
// llvm::MachO::nlist_64
N_UNDF = 0x0u,
N_ABS = 0x2u,
N_SECT = 0xeu,
N_PBUD = 0xcu,
N_INDR = 0xau
};
enum SectionOrdinal {
// Constants for the "n_sect" field in llvm::MachO::nlist and
// llvm::MachO::nlist_64
NO_SECT = 0u,
MAX_SECT = 0xffu
};
enum {
// Constant masks for the "n_desc" field in llvm::MachO::nlist and
// llvm::MachO::nlist_64
// The low 3 bits are the for the REFERENCE_TYPE.
REFERENCE_TYPE = 0x7,
REFERENCE_FLAG_UNDEFINED_NON_LAZY = 0,
REFERENCE_FLAG_UNDEFINED_LAZY = 1,
REFERENCE_FLAG_DEFINED = 2,
REFERENCE_FLAG_PRIVATE_DEFINED = 3,
REFERENCE_FLAG_PRIVATE_UNDEFINED_NON_LAZY = 4,
REFERENCE_FLAG_PRIVATE_UNDEFINED_LAZY = 5,
// Flag bits (some overlap with the library ordinal bits).
N_ARM_THUMB_DEF = 0x0008u,
REFERENCED_DYNAMICALLY = 0x0010u,
N_NO_DEAD_STRIP = 0x0020u,
N_WEAK_REF = 0x0040u,
N_WEAK_DEF = 0x0080u,
N_SYMBOL_RESOLVER = 0x0100u,
N_ALT_ENTRY = 0x0200u,
N_COLD_FUNC = 0x0400u,
// For undefined symbols coming from libraries, see GET_LIBRARY_ORDINAL()
// as these are in the top 8 bits.
SELF_LIBRARY_ORDINAL = 0x0,
MAX_LIBRARY_ORDINAL = 0xfd,
DYNAMIC_LOOKUP_ORDINAL = 0xfe,
EXECUTABLE_ORDINAL = 0xff
};
enum StabType {
// Constant values for the "n_type" field in llvm::MachO::nlist and
// llvm::MachO::nlist_64 when "(n_type & N_STAB) != 0"
N_GSYM = 0x20u,
N_FNAME = 0x22u,
N_FUN = 0x24u,
N_STSYM = 0x26u,
N_LCSYM = 0x28u,
N_BNSYM = 0x2Eu,
N_PC = 0x30u,
N_AST = 0x32u,
N_OPT = 0x3Cu,
N_RSYM = 0x40u,
N_SLINE = 0x44u,
N_ENSYM = 0x4Eu,
N_SSYM = 0x60u,
N_SO = 0x64u,
N_OSO = 0x66u,
N_LSYM = 0x80u,
N_BINCL = 0x82u,
N_SOL = 0x84u,
N_PARAMS = 0x86u,
N_VERSION = 0x88u,
N_OLEVEL = 0x8Au,
N_PSYM = 0xA0u,
N_EINCL = 0xA2u,
N_ENTRY = 0xA4u,
N_LBRAC = 0xC0u,
N_EXCL = 0xC2u,
N_RBRAC = 0xE0u,
N_BCOMM = 0xE2u,
N_ECOMM = 0xE4u,
N_ECOML = 0xE8u,
N_LENG = 0xFEu
};
enum : uint32_t {
// Constant values for the r_symbolnum field in an
// llvm::MachO::relocation_info structure when r_extern is 0.
R_ABS = 0,
// Constant bits for the r_address field in an
// llvm::MachO::relocation_info structure.
R_SCATTERED = 0x80000000
};
enum RelocationInfoType {
// Constant values for the r_type field in an
// llvm::MachO::relocation_info or llvm::MachO::scattered_relocation_info
// structure.
GENERIC_RELOC_INVALID = 0xff,
GENERIC_RELOC_VANILLA = 0,
GENERIC_RELOC_PAIR = 1,
GENERIC_RELOC_SECTDIFF = 2,
GENERIC_RELOC_PB_LA_PTR = 3,
GENERIC_RELOC_LOCAL_SECTDIFF = 4,
GENERIC_RELOC_TLV = 5,
// Constant values for the r_type field in a PowerPC architecture
// llvm::MachO::relocation_info or llvm::MachO::scattered_relocation_info
// structure.
PPC_RELOC_VANILLA = GENERIC_RELOC_VANILLA,
PPC_RELOC_PAIR = GENERIC_RELOC_PAIR,
PPC_RELOC_BR14 = 2,
PPC_RELOC_BR24 = 3,
PPC_RELOC_HI16 = 4,
PPC_RELOC_LO16 = 5,
PPC_RELOC_HA16 = 6,
PPC_RELOC_LO14 = 7,
PPC_RELOC_SECTDIFF = 8,
PPC_RELOC_PB_LA_PTR = 9,
PPC_RELOC_HI16_SECTDIFF = 10,
PPC_RELOC_LO16_SECTDIFF = 11,
PPC_RELOC_HA16_SECTDIFF = 12,
PPC_RELOC_JBSR = 13,
PPC_RELOC_LO14_SECTDIFF = 14,
PPC_RELOC_LOCAL_SECTDIFF = 15,
// Constant values for the r_type field in an ARM architecture
// llvm::MachO::relocation_info or llvm::MachO::scattered_relocation_info
// structure.
ARM_RELOC_VANILLA = GENERIC_RELOC_VANILLA,
ARM_RELOC_PAIR = GENERIC_RELOC_PAIR,
ARM_RELOC_SECTDIFF = GENERIC_RELOC_SECTDIFF,
ARM_RELOC_LOCAL_SECTDIFF = 3,
ARM_RELOC_PB_LA_PTR = 4,
ARM_RELOC_BR24 = 5,
ARM_THUMB_RELOC_BR22 = 6,
ARM_THUMB_32BIT_BRANCH = 7, // obsolete
ARM_RELOC_HALF = 8,
ARM_RELOC_HALF_SECTDIFF = 9,
// Constant values for the r_type field in an ARM64 architecture
// llvm::MachO::relocation_info or llvm::MachO::scattered_relocation_info
// structure.
// For pointers.
ARM64_RELOC_UNSIGNED = 0,
// Must be followed by an ARM64_RELOC_UNSIGNED
ARM64_RELOC_SUBTRACTOR = 1,
// A B/BL instruction with 26-bit displacement.
ARM64_RELOC_BRANCH26 = 2,
// PC-rel distance to page of target.
ARM64_RELOC_PAGE21 = 3,
// Offset within page, scaled by r_length.
ARM64_RELOC_PAGEOFF12 = 4,
// PC-rel distance to page of GOT slot.
ARM64_RELOC_GOT_LOAD_PAGE21 = 5,
// Offset within page of GOT slot, scaled by r_length.
ARM64_RELOC_GOT_LOAD_PAGEOFF12 = 6,
// For pointers to GOT slots.
ARM64_RELOC_POINTER_TO_GOT = 7,
// PC-rel distance to page of TLVP slot.
ARM64_RELOC_TLVP_LOAD_PAGE21 = 8,
// Offset within page of TLVP slot, scaled by r_length.
ARM64_RELOC_TLVP_LOAD_PAGEOFF12 = 9,
// Must be followed by ARM64_RELOC_PAGE21 or ARM64_RELOC_PAGEOFF12.
ARM64_RELOC_ADDEND = 10,
// An authenticated pointer.
ARM64_RELOC_AUTHENTICATED_POINTER = 11,
// Constant values for the r_type field in an x86_64 architecture
// llvm::MachO::relocation_info or llvm::MachO::scattered_relocation_info
// structure
X86_64_RELOC_UNSIGNED = 0,
X86_64_RELOC_SIGNED = 1,
X86_64_RELOC_BRANCH = 2,
X86_64_RELOC_GOT_LOAD = 3,
X86_64_RELOC_GOT = 4,
X86_64_RELOC_SUBTRACTOR = 5,
X86_64_RELOC_SIGNED_1 = 6,
X86_64_RELOC_SIGNED_2 = 7,
X86_64_RELOC_SIGNED_4 = 8,
X86_64_RELOC_TLV = 9
};
// Values for segment_command.initprot.
// From <mach/vm_prot.h>
enum { VM_PROT_READ = 0x1, VM_PROT_WRITE = 0x2, VM_PROT_EXECUTE = 0x4 };
// Values for platform field in build_version_command.
enum PlatformType {
PLATFORM_UNKNOWN = 0,
PLATFORM_MACOS = 1,
PLATFORM_IOS = 2,
PLATFORM_TVOS = 3,
PLATFORM_WATCHOS = 4,
PLATFORM_BRIDGEOS = 5,
PLATFORM_MACCATALYST = 6,
PLATFORM_IOSSIMULATOR = 7,
PLATFORM_TVOSSIMULATOR = 8,
PLATFORM_WATCHOSSIMULATOR = 9,
PLATFORM_DRIVERKIT = 10,
};
// Values for tools enum in build_tool_version.
enum { TOOL_CLANG = 1, TOOL_SWIFT = 2, TOOL_LD = 3, TOOL_LLD = 4 };
// Structs from <mach-o/loader.h>
struct mach_header {
uint32_t magic;
uint32_t cputype;
uint32_t cpusubtype;
uint32_t filetype;
uint32_t ncmds;
uint32_t sizeofcmds;
uint32_t flags;
};
struct mach_header_64 {
uint32_t magic;
uint32_t cputype;
uint32_t cpusubtype;
uint32_t filetype;
uint32_t ncmds;
uint32_t sizeofcmds;
uint32_t flags;
uint32_t reserved;
};
struct load_command {
uint32_t cmd;
uint32_t cmdsize;
};
struct segment_command {
uint32_t cmd;
uint32_t cmdsize;
char segname[16];
uint32_t vmaddr;
uint32_t vmsize;
uint32_t fileoff;
uint32_t filesize;
uint32_t maxprot;
uint32_t initprot;
uint32_t nsects;
uint32_t flags;
};
struct segment_command_64 {
uint32_t cmd;
uint32_t cmdsize;
char segname[16];
uint64_t vmaddr;
uint64_t vmsize;
uint64_t fileoff;
uint64_t filesize;
uint32_t maxprot;
uint32_t initprot;
uint32_t nsects;
uint32_t flags;
};
struct section {
char sectname[16];
char segname[16];
uint32_t addr;
uint32_t size;
uint32_t offset;
uint32_t align;
uint32_t reloff;
uint32_t nreloc;
uint32_t flags;
uint32_t reserved1;
uint32_t reserved2;
};
struct section_64 {
char sectname[16];
char segname[16];
uint64_t addr;
uint64_t size;
uint32_t offset;
uint32_t align;
uint32_t reloff;
uint32_t nreloc;
uint32_t flags;
uint32_t reserved1;
uint32_t reserved2;
uint32_t reserved3;
};
inline bool isVirtualSection(uint8_t type) {
return (type == MachO::S_ZEROFILL || type == MachO::S_GB_ZEROFILL ||
type == MachO::S_THREAD_LOCAL_ZEROFILL);
}
struct fvmlib {
uint32_t name;
uint32_t minor_version;
uint32_t header_addr;
};
// The fvmlib_command is obsolete and no longer supported.
struct fvmlib_command {
uint32_t cmd;
uint32_t cmdsize;
struct fvmlib fvmlib;
};
struct dylib {
uint32_t name;
uint32_t timestamp;
uint32_t current_version;
uint32_t compatibility_version;
};
struct dylib_command {
uint32_t cmd;
uint32_t cmdsize;
struct dylib dylib;
};
struct sub_framework_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t umbrella;
};
struct sub_client_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t client;
};
struct sub_umbrella_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t sub_umbrella;
};
struct sub_library_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t sub_library;
};
// The prebound_dylib_command is obsolete and no longer supported.
struct prebound_dylib_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t name;
uint32_t nmodules;
uint32_t linked_modules;
};
struct dylinker_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t name;
};
struct thread_command {
uint32_t cmd;
uint32_t cmdsize;
};
struct routines_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t init_address;
uint32_t init_module;
uint32_t reserved1;
uint32_t reserved2;
uint32_t reserved3;
uint32_t reserved4;
uint32_t reserved5;
uint32_t reserved6;
};
struct routines_command_64 {
uint32_t cmd;
uint32_t cmdsize;
uint64_t init_address;
uint64_t init_module;
uint64_t reserved1;
uint64_t reserved2;
uint64_t reserved3;
uint64_t reserved4;
uint64_t reserved5;
uint64_t reserved6;
};
struct symtab_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t symoff;
uint32_t nsyms;
uint32_t stroff;
uint32_t strsize;
};
struct dysymtab_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t ilocalsym;
uint32_t nlocalsym;
uint32_t iextdefsym;
uint32_t nextdefsym;
uint32_t iundefsym;
uint32_t nundefsym;
uint32_t tocoff;
uint32_t ntoc;
uint32_t modtaboff;
uint32_t nmodtab;
uint32_t extrefsymoff;
uint32_t nextrefsyms;
uint32_t indirectsymoff;
uint32_t nindirectsyms;
uint32_t extreloff;
uint32_t nextrel;
uint32_t locreloff;
uint32_t nlocrel;
};
struct dylib_table_of_contents {
uint32_t symbol_index;
uint32_t module_index;
};
struct dylib_module {
uint32_t module_name;
uint32_t iextdefsym;
uint32_t nextdefsym;
uint32_t irefsym;
uint32_t nrefsym;
uint32_t ilocalsym;
uint32_t nlocalsym;
uint32_t iextrel;
uint32_t nextrel;
uint32_t iinit_iterm;
uint32_t ninit_nterm;
uint32_t objc_module_info_addr;
uint32_t objc_module_info_size;
};
struct dylib_module_64 {
uint32_t module_name;
uint32_t iextdefsym;
uint32_t nextdefsym;
uint32_t irefsym;
uint32_t nrefsym;
uint32_t ilocalsym;
uint32_t nlocalsym;
uint32_t iextrel;
uint32_t nextrel;
uint32_t iinit_iterm;
uint32_t ninit_nterm;
uint32_t objc_module_info_size;
uint64_t objc_module_info_addr;
};
struct dylib_reference {
uint32_t isym : 24, flags : 8;
};
// The twolevel_hints_command is obsolete and no longer supported.
struct twolevel_hints_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t offset;
uint32_t nhints;
};
// The twolevel_hints_command is obsolete and no longer supported.
struct twolevel_hint {
uint32_t isub_image : 8, itoc : 24;
};
// The prebind_cksum_command is obsolete and no longer supported.
struct prebind_cksum_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t cksum;
};
struct uuid_command {
uint32_t cmd;
uint32_t cmdsize;
uint8_t uuid[16];
};
struct rpath_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t path;
};
struct linkedit_data_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t dataoff;
uint32_t datasize;
};
struct data_in_code_entry {
uint32_t offset;
uint16_t length;
uint16_t kind;
};
struct source_version_command {
uint32_t cmd;
uint32_t cmdsize;
uint64_t version;
};
struct encryption_info_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t cryptoff;
uint32_t cryptsize;
uint32_t cryptid;
};
struct encryption_info_command_64 {
uint32_t cmd;
uint32_t cmdsize;
uint32_t cryptoff;
uint32_t cryptsize;
uint32_t cryptid;
uint32_t pad;
};
struct version_min_command {
uint32_t cmd; // LC_VERSION_MIN_MACOSX or
// LC_VERSION_MIN_IPHONEOS
uint32_t cmdsize; // sizeof(struct version_min_command)
uint32_t version; // X.Y.Z is encoded in nibbles xxxx.yy.zz
uint32_t sdk; // X.Y.Z is encoded in nibbles xxxx.yy.zz
};
struct note_command {
uint32_t cmd; // LC_NOTE
uint32_t cmdsize; // sizeof(struct note_command)
char data_owner[16]; // owner name for this LC_NOTE
uint64_t offset; // file offset of this data
uint64_t size; // length of data region
};
struct build_tool_version {
uint32_t tool; // enum for the tool
uint32_t version; // version of the tool
};
struct build_version_command {
uint32_t cmd; // LC_BUILD_VERSION
uint32_t cmdsize; // sizeof(struct build_version_command) +
// ntools * sizeof(struct build_tool_version)
uint32_t platform; // platform
uint32_t minos; // X.Y.Z is encoded in nibbles xxxx.yy.zz
uint32_t sdk; // X.Y.Z is encoded in nibbles xxxx.yy.zz
uint32_t ntools; // number of tool entries following this
};
struct dyld_env_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t name;
};
struct dyld_info_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t rebase_off;
uint32_t rebase_size;
uint32_t bind_off;
uint32_t bind_size;
uint32_t weak_bind_off;
uint32_t weak_bind_size;
uint32_t lazy_bind_off;
uint32_t lazy_bind_size;
uint32_t export_off;
uint32_t export_size;
};
struct linker_option_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t count;
};
struct fileset_entry_command {
uint32_t cmd;
uint32_t cmdsize;
uint64_t vmaddr;
uint64_t fileoff;
uint32_t entry_id;
};
// The symseg_command is obsolete and no longer supported.
struct symseg_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t offset;
uint32_t size;
};
// The ident_command is obsolete and no longer supported.
struct ident_command {
uint32_t cmd;
uint32_t cmdsize;
};
// The fvmfile_command is obsolete and no longer supported.
struct fvmfile_command {
uint32_t cmd;
uint32_t cmdsize;
uint32_t name;
uint32_t header_addr;
};
struct tlv_descriptor_32 {
uint32_t thunk;
uint32_t key;
uint32_t offset;
};
struct tlv_descriptor_64 {
uint64_t thunk;
uint64_t key;
uint64_t offset;
};
struct tlv_descriptor {
uintptr_t thunk;
uintptr_t key;
uintptr_t offset;
};
struct entry_point_command {
uint32_t cmd;
uint32_t cmdsize;
uint64_t entryoff;
uint64_t stacksize;
};
// Structs from <mach-o/fat.h>
struct fat_header {
uint32_t magic;
uint32_t nfat_arch;
};
struct fat_arch {
uint32_t cputype;
uint32_t cpusubtype;
uint32_t offset;
uint32_t size;
uint32_t align;
};
struct fat_arch_64 {
uint32_t cputype;
uint32_t cpusubtype;
uint64_t offset;
uint64_t size;
uint32_t align;
uint32_t reserved;
};
// Structs from <mach-o/reloc.h>
struct relocation_info {
int32_t r_address;
uint32_t r_symbolnum : 24, r_pcrel : 1, r_length : 2, r_extern : 1,
r_type : 4;
};
struct scattered_relocation_info {
#if defined(BYTE_ORDER) && defined(BIG_ENDIAN) && (BYTE_ORDER == BIG_ENDIAN)
uint32_t r_scattered : 1, r_pcrel : 1, r_length : 2, r_type : 4,
r_address : 24;
#else
uint32_t r_address : 24, r_type : 4, r_length : 2, r_pcrel : 1,
r_scattered : 1;
#endif
int32_t r_value;
};
// Structs NOT from <mach-o/reloc.h>, but that make LLVM's life easier
struct any_relocation_info {
uint32_t r_word0, r_word1;
};
// Structs from <mach-o/nlist.h>
struct nlist_base {
uint32_t n_strx;
uint8_t n_type;
uint8_t n_sect;
uint16_t n_desc;
};
struct nlist {
uint32_t n_strx;
uint8_t n_type;
uint8_t n_sect;
int16_t n_desc;
uint32_t n_value;
};
struct nlist_64 {
uint32_t n_strx;
uint8_t n_type;
uint8_t n_sect;
uint16_t n_desc;
uint64_t n_value;
};
// Values for dyld_chained_fixups_header::imports_format.
enum ChainedImportFormat {
DYLD_CHAINED_IMPORT = 1,
DYLD_CHAINED_IMPORT_ADDEND = 2,
DYLD_CHAINED_IMPORT_ADDEND64 = 3,
};
// Values for dyld_chained_fixups_header::symbols_format.
enum {
DYLD_CHAINED_SYMBOL_UNCOMPRESSED = 0,
DYLD_CHAINED_SYMBOL_ZLIB = 1,
};
// Values for dyld_chained_starts_in_segment::page_start.
enum {
DYLD_CHAINED_PTR_START_NONE = 0xFFFF,
DYLD_CHAINED_PTR_START_MULTI = 0x8000, // page which has multiple starts
DYLD_CHAINED_PTR_START_LAST = 0x8000, // last chain_start for a given page
};
// Values for dyld_chained_starts_in_segment::pointer_format.
enum {
DYLD_CHAINED_PTR_ARM64E = 1,
DYLD_CHAINED_PTR_64 = 2,
DYLD_CHAINED_PTR_32 = 3,
DYLD_CHAINED_PTR_32_CACHE = 4,
DYLD_CHAINED_PTR_32_FIRMWARE = 5,
DYLD_CHAINED_PTR_64_OFFSET = 6,
DYLD_CHAINED_PTR_ARM64E_KERNEL = 7,
DYLD_CHAINED_PTR_64_KERNEL_CACHE = 8,
DYLD_CHAINED_PTR_ARM64E_USERLAND = 9,
DYLD_CHAINED_PTR_ARM64E_FIRMWARE = 10,
DYLD_CHAINED_PTR_X86_64_KERNEL_CACHE = 11,
DYLD_CHAINED_PTR_ARM64E_USERLAND24 = 12,
};
/// Structs for dyld chained fixups.
/// dyld_chained_fixups_header is the data pointed to by LC_DYLD_CHAINED_FIXUPS
/// load command.
struct dyld_chained_fixups_header {
uint32_t fixups_version; ///< 0
uint32_t starts_offset; ///< Offset of dyld_chained_starts_in_image.
uint32_t imports_offset; ///< Offset of imports table in chain_data.
uint32_t symbols_offset; ///< Offset of symbol strings in chain_data.
uint32_t imports_count; ///< Number of imported symbol names.
uint32_t imports_format; ///< DYLD_CHAINED_IMPORT*
uint32_t symbols_format; ///< 0 => uncompressed, 1 => zlib compressed
};
/// dyld_chained_starts_in_image is embedded in LC_DYLD_CHAINED_FIXUPS payload.
/// Each each seg_info_offset entry is the offset into this struct for that
/// segment followed by pool of dyld_chain_starts_in_segment data.
struct dyld_chained_starts_in_image {
uint32_t seg_count;
uint32_t seg_info_offset[1];
};
struct dyld_chained_starts_in_segment {
uint32_t size; ///< Size of this, including chain_starts entries
uint16_t page_size; ///< Page size in bytes (0x1000 or 0x4000)
uint16_t pointer_format; ///< DYLD_CHAINED_PTR*
uint64_t segment_offset; ///< VM offset from the __TEXT segment
uint32_t max_valid_pointer; ///< Values beyond this are not pointers on 32-bit
uint16_t page_count; ///< Length of the page_start array
uint16_t page_start[1]; ///< Page offset of first fixup on each page, or
///< DYLD_CHAINED_PTR_START_NONE if no fixups
};
// DYLD_CHAINED_IMPORT
struct dyld_chained_import {
uint32_t lib_ordinal : 8;
uint32_t weak_import : 1;
uint32_t name_offset : 23;
};
// DYLD_CHAINED_IMPORT_ADDEND
struct dyld_chained_import_addend {
uint32_t lib_ordinal : 8;
uint32_t weak_import : 1;
uint32_t name_offset : 23;
int32_t addend;
};
// DYLD_CHAINED_IMPORT_ADDEND64
struct dyld_chained_import_addend64 {
uint64_t lib_ordinal : 16;
uint64_t weak_import : 1;
uint64_t reserved : 15;
uint64_t name_offset : 32;
uint64_t addend;
};
// The `bind` field (most significant bit) of the encoded fixup determines
// whether it is dyld_chained_ptr_64_bind or dyld_chained_ptr_64_rebase.
// DYLD_CHAINED_PTR_64/DYLD_CHAINED_PTR_64_OFFSET
struct dyld_chained_ptr_64_bind {
uint64_t ordinal : 24;
uint64_t addend : 8;
uint64_t reserved : 19;
uint64_t next : 12;
uint64_t bind : 1; // set to 1
};
// DYLD_CHAINED_PTR_64/DYLD_CHAINED_PTR_64_OFFSET
struct dyld_chained_ptr_64_rebase {
uint64_t target : 36;
uint64_t high8 : 8;
uint64_t reserved : 7;
uint64_t next : 12;
uint64_t bind : 1; // set to 0
};
// Byte order swapping functions for MachO structs
inline void swapStruct(fat_header &mh) {
sys::swapByteOrder(mh.magic);
sys::swapByteOrder(mh.nfat_arch);
}
inline void swapStruct(fat_arch &mh) {
sys::swapByteOrder(mh.cputype);
sys::swapByteOrder(mh.cpusubtype);
sys::swapByteOrder(mh.offset);
sys::swapByteOrder(mh.size);
sys::swapByteOrder(mh.align);
}
inline void swapStruct(fat_arch_64 &mh) {
sys::swapByteOrder(mh.cputype);
sys::swapByteOrder(mh.cpusubtype);
sys::swapByteOrder(mh.offset);
sys::swapByteOrder(mh.size);
sys::swapByteOrder(mh.align);
sys::swapByteOrder(mh.reserved);
}
inline void swapStruct(mach_header &mh) {
sys::swapByteOrder(mh.magic);
sys::swapByteOrder(mh.cputype);
sys::swapByteOrder(mh.cpusubtype);
sys::swapByteOrder(mh.filetype);
sys::swapByteOrder(mh.ncmds);
sys::swapByteOrder(mh.sizeofcmds);
sys::swapByteOrder(mh.flags);
}
inline void swapStruct(mach_header_64 &H) {
sys::swapByteOrder(H.magic);
sys::swapByteOrder(H.cputype);
sys::swapByteOrder(H.cpusubtype);
sys::swapByteOrder(H.filetype);
sys::swapByteOrder(H.ncmds);
sys::swapByteOrder(H.sizeofcmds);
sys::swapByteOrder(H.flags);
sys::swapByteOrder(H.reserved);
}
inline void swapStruct(load_command &lc) {
sys::swapByteOrder(lc.cmd);
sys::swapByteOrder(lc.cmdsize);
}
inline void swapStruct(symtab_command &lc) {
sys::swapByteOrder(lc.cmd);
sys::swapByteOrder(lc.cmdsize);
sys::swapByteOrder(lc.symoff);
sys::swapByteOrder(lc.nsyms);
sys::swapByteOrder(lc.stroff);
sys::swapByteOrder(lc.strsize);
}
inline void swapStruct(segment_command_64 &seg) {
sys::swapByteOrder(seg.cmd);
sys::swapByteOrder(seg.cmdsize);
sys::swapByteOrder(seg.vmaddr);
sys::swapByteOrder(seg.vmsize);
sys::swapByteOrder(seg.fileoff);
sys::swapByteOrder(seg.filesize);
sys::swapByteOrder(seg.maxprot);
sys::swapByteOrder(seg.initprot);
sys::swapByteOrder(seg.nsects);
sys::swapByteOrder(seg.flags);
}
inline void swapStruct(segment_command &seg) {
sys::swapByteOrder(seg.cmd);
sys::swapByteOrder(seg.cmdsize);
sys::swapByteOrder(seg.vmaddr);
sys::swapByteOrder(seg.vmsize);
sys::swapByteOrder(seg.fileoff);
sys::swapByteOrder(seg.filesize);
sys::swapByteOrder(seg.maxprot);
sys::swapByteOrder(seg.initprot);
sys::swapByteOrder(seg.nsects);
sys::swapByteOrder(seg.flags);
}
inline void swapStruct(section_64 §) {
sys::swapByteOrder(sect.addr);
sys::swapByteOrder(sect.size);
sys::swapByteOrder(sect.offset);
sys::swapByteOrder(sect.align);
sys::swapByteOrder(sect.reloff);
sys::swapByteOrder(sect.nreloc);
sys::swapByteOrder(sect.flags);
sys::swapByteOrder(sect.reserved1);
sys::swapByteOrder(sect.reserved2);
}
inline void swapStruct(section §) {
sys::swapByteOrder(sect.addr);
sys::swapByteOrder(sect.size);
sys::swapByteOrder(sect.offset);
sys::swapByteOrder(sect.align);
sys::swapByteOrder(sect.reloff);
sys::swapByteOrder(sect.nreloc);
sys::swapByteOrder(sect.flags);
sys::swapByteOrder(sect.reserved1);
sys::swapByteOrder(sect.reserved2);
}
inline void swapStruct(dyld_info_command &info) {
sys::swapByteOrder(info.cmd);
sys::swapByteOrder(info.cmdsize);
sys::swapByteOrder(info.rebase_off);
sys::swapByteOrder(info.rebase_size);
sys::swapByteOrder(info.bind_off);
sys::swapByteOrder(info.bind_size);
sys::swapByteOrder(info.weak_bind_off);
sys::swapByteOrder(info.weak_bind_size);
sys::swapByteOrder(info.lazy_bind_off);
sys::swapByteOrder(info.lazy_bind_size);
sys::swapByteOrder(info.export_off);
sys::swapByteOrder(info.export_size);
}
inline void swapStruct(dylib_command &d) {
sys::swapByteOrder(d.cmd);
sys::swapByteOrder(d.cmdsize);
sys::swapByteOrder(d.dylib.name);
sys::swapByteOrder(d.dylib.timestamp);
sys::swapByteOrder(d.dylib.current_version);
sys::swapByteOrder(d.dylib.compatibility_version);
}
inline void swapStruct(sub_framework_command &s) {
sys::swapByteOrder(s.cmd);
sys::swapByteOrder(s.cmdsize);
sys::swapByteOrder(s.umbrella);
}
inline void swapStruct(sub_umbrella_command &s) {
sys::swapByteOrder(s.cmd);
sys::swapByteOrder(s.cmdsize);
sys::swapByteOrder(s.sub_umbrella);
}
inline void swapStruct(sub_library_command &s) {
sys::swapByteOrder(s.cmd);
sys::swapByteOrder(s.cmdsize);
sys::swapByteOrder(s.sub_library);
}
inline void swapStruct(sub_client_command &s) {
sys::swapByteOrder(s.cmd);
sys::swapByteOrder(s.cmdsize);
sys::swapByteOrder(s.client);
}
inline void swapStruct(routines_command &r) {
sys::swapByteOrder(r.cmd);
sys::swapByteOrder(r.cmdsize);
sys::swapByteOrder(r.init_address);
sys::swapByteOrder(r.init_module);
sys::swapByteOrder(r.reserved1);
sys::swapByteOrder(r.reserved2);
sys::swapByteOrder(r.reserved3);
sys::swapByteOrder(r.reserved4);
sys::swapByteOrder(r.reserved5);
sys::swapByteOrder(r.reserved6);
}
inline void swapStruct(routines_command_64 &r) {
sys::swapByteOrder(r.cmd);
sys::swapByteOrder(r.cmdsize);
sys::swapByteOrder(r.init_address);
sys::swapByteOrder(r.init_module);
sys::swapByteOrder(r.reserved1);
sys::swapByteOrder(r.reserved2);
sys::swapByteOrder(r.reserved3);
sys::swapByteOrder(r.reserved4);
sys::swapByteOrder(r.reserved5);
sys::swapByteOrder(r.reserved6);
}
inline void swapStruct(thread_command &t) {
sys::swapByteOrder(t.cmd);
sys::swapByteOrder(t.cmdsize);
}
inline void swapStruct(dylinker_command &d) {
sys::swapByteOrder(d.cmd);
sys::swapByteOrder(d.cmdsize);
sys::swapByteOrder(d.name);
}
inline void swapStruct(uuid_command &u) {
sys::swapByteOrder(u.cmd);
sys::swapByteOrder(u.cmdsize);
}
inline void swapStruct(rpath_command &r) {
sys::swapByteOrder(r.cmd);
sys::swapByteOrder(r.cmdsize);
sys::swapByteOrder(r.path);
}
inline void swapStruct(source_version_command &s) {
sys::swapByteOrder(s.cmd);
sys::swapByteOrder(s.cmdsize);
sys::swapByteOrder(s.version);
}
inline void swapStruct(entry_point_command &e) {
sys::swapByteOrder(e.cmd);
sys::swapByteOrder(e.cmdsize);
sys::swapByteOrder(e.entryoff);
sys::swapByteOrder(e.stacksize);
}
inline void swapStruct(encryption_info_command &e) {
sys::swapByteOrder(e.cmd);
sys::swapByteOrder(e.cmdsize);
sys::swapByteOrder(e.cryptoff);
sys::swapByteOrder(e.cryptsize);
sys::swapByteOrder(e.cryptid);
}
inline void swapStruct(encryption_info_command_64 &e) {
sys::swapByteOrder(e.cmd);
sys::swapByteOrder(e.cmdsize);
sys::swapByteOrder(e.cryptoff);
sys::swapByteOrder(e.cryptsize);
sys::swapByteOrder(e.cryptid);
sys::swapByteOrder(e.pad);
}
inline void swapStruct(dysymtab_command &dst) {
sys::swapByteOrder(dst.cmd);
sys::swapByteOrder(dst.cmdsize);
sys::swapByteOrder(dst.ilocalsym);
sys::swapByteOrder(dst.nlocalsym);
sys::swapByteOrder(dst.iextdefsym);
sys::swapByteOrder(dst.nextdefsym);
sys::swapByteOrder(dst.iundefsym);
sys::swapByteOrder(dst.nundefsym);
sys::swapByteOrder(dst.tocoff);
sys::swapByteOrder(dst.ntoc);
sys::swapByteOrder(dst.modtaboff);
sys::swapByteOrder(dst.nmodtab);
sys::swapByteOrder(dst.extrefsymoff);
sys::swapByteOrder(dst.nextrefsyms);
sys::swapByteOrder(dst.indirectsymoff);
sys::swapByteOrder(dst.nindirectsyms);
sys::swapByteOrder(dst.extreloff);
sys::swapByteOrder(dst.nextrel);
sys::swapByteOrder(dst.locreloff);
sys::swapByteOrder(dst.nlocrel);
}
inline void swapStruct(any_relocation_info &reloc) {
sys::swapByteOrder(reloc.r_word0);
sys::swapByteOrder(reloc.r_word1);
}
inline void swapStruct(nlist_base &S) {
sys::swapByteOrder(S.n_strx);
sys::swapByteOrder(S.n_desc);
}
inline void swapStruct(nlist &sym) {
sys::swapByteOrder(sym.n_strx);
sys::swapByteOrder(sym.n_desc);
sys::swapByteOrder(sym.n_value);
}
inline void swapStruct(nlist_64 &sym) {
sys::swapByteOrder(sym.n_strx);
sys::swapByteOrder(sym.n_desc);
sys::swapByteOrder(sym.n_value);
}
inline void swapStruct(linkedit_data_command &C) {
sys::swapByteOrder(C.cmd);
sys::swapByteOrder(C.cmdsize);
sys::swapByteOrder(C.dataoff);
sys::swapByteOrder(C.datasize);
}
inline void swapStruct(linker_option_command &C) {
sys::swapByteOrder(C.cmd);
sys::swapByteOrder(C.cmdsize);
sys::swapByteOrder(C.count);
}
inline void swapStruct(fileset_entry_command &C) {
sys::swapByteOrder(C.cmd);
sys::swapByteOrder(C.cmdsize);
sys::swapByteOrder(C.vmaddr);
sys::swapByteOrder(C.fileoff);
sys::swapByteOrder(C.entry_id);
}
inline void swapStruct(version_min_command &C) {
sys::swapByteOrder(C.cmd);
sys::swapByteOrder(C.cmdsize);
sys::swapByteOrder(C.version);
sys::swapByteOrder(C.sdk);
}
inline void swapStruct(note_command &C) {
sys::swapByteOrder(C.cmd);
sys::swapByteOrder(C.cmdsize);
sys::swapByteOrder(C.offset);
sys::swapByteOrder(C.size);
}
inline void swapStruct(build_version_command &C) {
sys::swapByteOrder(C.cmd);
sys::swapByteOrder(C.cmdsize);
sys::swapByteOrder(C.platform);
sys::swapByteOrder(C.minos);
sys::swapByteOrder(C.sdk);
sys::swapByteOrder(C.ntools);
}
inline void swapStruct(build_tool_version &C) {
sys::swapByteOrder(C.tool);
sys::swapByteOrder(C.version);
}
inline void swapStruct(data_in_code_entry &C) {
sys::swapByteOrder(C.offset);
sys::swapByteOrder(C.length);
sys::swapByteOrder(C.kind);
}
inline void swapStruct(uint32_t &C) { sys::swapByteOrder(C); }
// The prebind_cksum_command is obsolete and no longer supported.
inline void swapStruct(prebind_cksum_command &C) {
sys::swapByteOrder(C.cmd);
sys::swapByteOrder(C.cmdsize);
sys::swapByteOrder(C.cksum);
}
// The twolevel_hints_command is obsolete and no longer supported.
inline void swapStruct(twolevel_hints_command &C) {
sys::swapByteOrder(C.cmd);
sys::swapByteOrder(C.cmdsize);
sys::swapByteOrder(C.offset);
sys::swapByteOrder(C.nhints);
}
// The prebound_dylib_command is obsolete and no longer supported.
inline void swapStruct(prebound_dylib_command &C) {
sys::swapByteOrder(C.cmd);
sys::swapByteOrder(C.cmdsize);
sys::swapByteOrder(C.name);
sys::swapByteOrder(C.nmodules);
sys::swapByteOrder(C.linked_modules);
}
// The fvmfile_command is obsolete and no longer supported.
inline void swapStruct(fvmfile_command &C) {
sys::swapByteOrder(C.cmd);
sys::swapByteOrder(C.cmdsize);
sys::swapByteOrder(C.name);
sys::swapByteOrder(C.header_addr);
}
// The symseg_command is obsolete and no longer supported.
inline void swapStruct(symseg_command &C) {
sys::swapByteOrder(C.cmd);
sys::swapByteOrder(C.cmdsize);
sys::swapByteOrder(C.offset);
sys::swapByteOrder(C.size);
}
// The ident_command is obsolete and no longer supported.
inline void swapStruct(ident_command &C) {
sys::swapByteOrder(C.cmd);
sys::swapByteOrder(C.cmdsize);
}
inline void swapStruct(fvmlib &C) {
sys::swapByteOrder(C.name);
sys::swapByteOrder(C.minor_version);
sys::swapByteOrder(C.header_addr);
}
// The fvmlib_command is obsolete and no longer supported.
inline void swapStruct(fvmlib_command &C) {
sys::swapByteOrder(C.cmd);
sys::swapByteOrder(C.cmdsize);
swapStruct(C.fvmlib);
}
// Get/Set functions from <mach-o/nlist.h>
inline uint16_t GET_LIBRARY_ORDINAL(uint16_t n_desc) {
return (((n_desc) >> 8u) & 0xffu);
}
inline void SET_LIBRARY_ORDINAL(uint16_t &n_desc, uint8_t ordinal) {
n_desc = (((n_desc)&0x00ff) | (((ordinal)&0xff) << 8));
}
inline uint8_t GET_COMM_ALIGN(uint16_t n_desc) {
return (n_desc >> 8u) & 0x0fu;
}
inline void SET_COMM_ALIGN(uint16_t &n_desc, uint8_t align) {
n_desc = ((n_desc & 0xf0ffu) | ((align & 0x0fu) << 8u));
}
// Enums from <mach/machine.h>
enum : uint32_t {
// Capability bits used in the definition of cpu_type.
CPU_ARCH_MASK = 0xff000000, // Mask for architecture bits
CPU_ARCH_ABI64 = 0x01000000, // 64 bit ABI
CPU_ARCH_ABI64_32 = 0x02000000, // ILP32 ABI on 64-bit hardware
};
// Constants for the cputype field.
enum CPUType {
CPU_TYPE_ANY = -1,
CPU_TYPE_X86 = 7,
CPU_TYPE_I386 = CPU_TYPE_X86,
CPU_TYPE_X86_64 = CPU_TYPE_X86 | CPU_ARCH_ABI64,
/* CPU_TYPE_MIPS = 8, */
CPU_TYPE_MC98000 = 10, // Old Motorola PowerPC
CPU_TYPE_ARM = 12,
CPU_TYPE_ARM64 = CPU_TYPE_ARM | CPU_ARCH_ABI64,
CPU_TYPE_ARM64_32 = CPU_TYPE_ARM | CPU_ARCH_ABI64_32,
CPU_TYPE_SPARC = 14,
CPU_TYPE_POWERPC = 18,
CPU_TYPE_POWERPC64 = CPU_TYPE_POWERPC | CPU_ARCH_ABI64
};
enum : uint32_t {
// Capability bits used in the definition of cpusubtype.
CPU_SUBTYPE_MASK = 0xff000000, // Mask for architecture bits
CPU_SUBTYPE_LIB64 = 0x80000000, // 64 bit libraries
// Special CPU subtype constants.
CPU_SUBTYPE_MULTIPLE = ~0u
};
// Constants for the cpusubtype field.
enum CPUSubTypeX86 {
CPU_SUBTYPE_I386_ALL = 3,
CPU_SUBTYPE_386 = 3,
CPU_SUBTYPE_486 = 4,
CPU_SUBTYPE_486SX = 0x84,
CPU_SUBTYPE_586 = 5,
CPU_SUBTYPE_PENT = CPU_SUBTYPE_586,
CPU_SUBTYPE_PENTPRO = 0x16,
CPU_SUBTYPE_PENTII_M3 = 0x36,
CPU_SUBTYPE_PENTII_M5 = 0x56,
CPU_SUBTYPE_CELERON = 0x67,
CPU_SUBTYPE_CELERON_MOBILE = 0x77,
CPU_SUBTYPE_PENTIUM_3 = 0x08,
CPU_SUBTYPE_PENTIUM_3_M = 0x18,
CPU_SUBTYPE_PENTIUM_3_XEON = 0x28,
CPU_SUBTYPE_PENTIUM_M = 0x09,
CPU_SUBTYPE_PENTIUM_4 = 0x0a,
CPU_SUBTYPE_PENTIUM_4_M = 0x1a,
CPU_SUBTYPE_ITANIUM = 0x0b,
CPU_SUBTYPE_ITANIUM_2 = 0x1b,
CPU_SUBTYPE_XEON = 0x0c,
CPU_SUBTYPE_XEON_MP = 0x1c,
CPU_SUBTYPE_X86_ALL = 3,
CPU_SUBTYPE_X86_64_ALL = 3,
CPU_SUBTYPE_X86_ARCH1 = 4,
CPU_SUBTYPE_X86_64_H = 8
};
inline int CPU_SUBTYPE_INTEL(int Family, int Model) {
return Family | (Model << 4);
}
inline int CPU_SUBTYPE_INTEL_FAMILY(CPUSubTypeX86 ST) {
return ((int)ST) & 0x0f;
}
inline int CPU_SUBTYPE_INTEL_MODEL(CPUSubTypeX86 ST) { return ((int)ST) >> 4; }
enum { CPU_SUBTYPE_INTEL_FAMILY_MAX = 15, CPU_SUBTYPE_INTEL_MODEL_ALL = 0 };
enum CPUSubTypeARM {
CPU_SUBTYPE_ARM_ALL = 0,
CPU_SUBTYPE_ARM_V4T = 5,
CPU_SUBTYPE_ARM_V6 = 6,
CPU_SUBTYPE_ARM_V5 = 7,
CPU_SUBTYPE_ARM_V5TEJ = 7,
CPU_SUBTYPE_ARM_XSCALE = 8,
CPU_SUBTYPE_ARM_V7 = 9,
// unused ARM_V7F = 10,
CPU_SUBTYPE_ARM_V7S = 11,
CPU_SUBTYPE_ARM_V7K = 12,
CPU_SUBTYPE_ARM_V6M = 14,
CPU_SUBTYPE_ARM_V7M = 15,
CPU_SUBTYPE_ARM_V7EM = 16
};
enum CPUSubTypeARM64 {
CPU_SUBTYPE_ARM64_ALL = 0,
CPU_SUBTYPE_ARM64_V8 = 1,
CPU_SUBTYPE_ARM64E = 2,
};
enum CPUSubTypeARM64_32 { CPU_SUBTYPE_ARM64_32_V8 = 1 };
enum CPUSubTypeSPARC { CPU_SUBTYPE_SPARC_ALL = 0 };
enum CPUSubTypePowerPC {
CPU_SUBTYPE_POWERPC_ALL = 0,
CPU_SUBTYPE_POWERPC_601 = 1,
CPU_SUBTYPE_POWERPC_602 = 2,
CPU_SUBTYPE_POWERPC_603 = 3,
CPU_SUBTYPE_POWERPC_603e = 4,
CPU_SUBTYPE_POWERPC_603ev = 5,
CPU_SUBTYPE_POWERPC_604 = 6,
CPU_SUBTYPE_POWERPC_604e = 7,
CPU_SUBTYPE_POWERPC_620 = 8,
CPU_SUBTYPE_POWERPC_750 = 9,
CPU_SUBTYPE_POWERPC_7400 = 10,
CPU_SUBTYPE_POWERPC_7450 = 11,
CPU_SUBTYPE_POWERPC_970 = 100,
CPU_SUBTYPE_MC980000_ALL = CPU_SUBTYPE_POWERPC_ALL,
CPU_SUBTYPE_MC98601 = CPU_SUBTYPE_POWERPC_601
};
Expected<uint32_t> getCPUType(const Triple &T);
Expected<uint32_t> getCPUSubType(const Triple &T);
struct x86_thread_state32_t {
uint32_t eax;
uint32_t ebx;
uint32_t ecx;
uint32_t edx;
uint32_t edi;
uint32_t esi;
uint32_t ebp;
uint32_t esp;
uint32_t ss;
uint32_t eflags;
uint32_t eip;
uint32_t cs;
uint32_t ds;
uint32_t es;
uint32_t fs;
uint32_t gs;
};
struct x86_thread_state64_t {
uint64_t rax;
uint64_t rbx;
uint64_t rcx;
uint64_t rdx;
uint64_t rdi;
uint64_t rsi;
uint64_t rbp;
uint64_t rsp;
uint64_t r8;
uint64_t r9;
uint64_t r10;
uint64_t r11;
uint64_t r12;
uint64_t r13;
uint64_t r14;
uint64_t r15;
uint64_t rip;
uint64_t rflags;
uint64_t cs;
uint64_t fs;
uint64_t gs;
};
enum x86_fp_control_precis {
x86_FP_PREC_24B = 0,
x86_FP_PREC_53B = 2,
x86_FP_PREC_64B = 3
};
enum x86_fp_control_rc {
x86_FP_RND_NEAR = 0,
x86_FP_RND_DOWN = 1,
x86_FP_RND_UP = 2,
x86_FP_CHOP = 3
};
struct fp_control_t {
unsigned short invalid : 1, denorm : 1, zdiv : 1, ovrfl : 1, undfl : 1,
precis : 1, : 2, pc : 2, rc : 2, : 1, : 3;
};
struct fp_status_t {
unsigned short invalid : 1, denorm : 1, zdiv : 1, ovrfl : 1, undfl : 1,
precis : 1, stkflt : 1, errsumm : 1, c0 : 1, c1 : 1, c2 : 1, tos : 3,
c3 : 1, busy : 1;
};
struct mmst_reg_t {
char mmst_reg[10];
char mmst_rsrv[6];
};
struct xmm_reg_t {
char xmm_reg[16];
};
struct x86_float_state64_t {
int32_t fpu_reserved[2];
fp_control_t fpu_fcw;
fp_status_t fpu_fsw;
uint8_t fpu_ftw;
uint8_t fpu_rsrv1;
uint16_t fpu_fop;
uint32_t fpu_ip;
uint16_t fpu_cs;
uint16_t fpu_rsrv2;
uint32_t fpu_dp;
uint16_t fpu_ds;
uint16_t fpu_rsrv3;
uint32_t fpu_mxcsr;
uint32_t fpu_mxcsrmask;
mmst_reg_t fpu_stmm0;
mmst_reg_t fpu_stmm1;
mmst_reg_t fpu_stmm2;
mmst_reg_t fpu_stmm3;
mmst_reg_t fpu_stmm4;
mmst_reg_t fpu_stmm5;
mmst_reg_t fpu_stmm6;
mmst_reg_t fpu_stmm7;
xmm_reg_t fpu_xmm0;
xmm_reg_t fpu_xmm1;
xmm_reg_t fpu_xmm2;
xmm_reg_t fpu_xmm3;
xmm_reg_t fpu_xmm4;
xmm_reg_t fpu_xmm5;
xmm_reg_t fpu_xmm6;
xmm_reg_t fpu_xmm7;
xmm_reg_t fpu_xmm8;
xmm_reg_t fpu_xmm9;
xmm_reg_t fpu_xmm10;
xmm_reg_t fpu_xmm11;
xmm_reg_t fpu_xmm12;
xmm_reg_t fpu_xmm13;
xmm_reg_t fpu_xmm14;
xmm_reg_t fpu_xmm15;
char fpu_rsrv4[6 * 16];
uint32_t fpu_reserved1;
};
struct x86_exception_state64_t {
uint16_t trapno;
uint16_t cpu;
uint32_t err;
uint64_t faultvaddr;
};
inline void swapStruct(x86_thread_state32_t &x) {
sys::swapByteOrder(x.eax);
sys::swapByteOrder(x.ebx);
sys::swapByteOrder(x.ecx);
sys::swapByteOrder(x.edx);
sys::swapByteOrder(x.edi);
sys::swapByteOrder(x.esi);
sys::swapByteOrder(x.ebp);
sys::swapByteOrder(x.esp);
sys::swapByteOrder(x.ss);
sys::swapByteOrder(x.eflags);
sys::swapByteOrder(x.eip);
sys::swapByteOrder(x.cs);
sys::swapByteOrder(x.ds);
sys::swapByteOrder(x.es);
sys::swapByteOrder(x.fs);
sys::swapByteOrder(x.gs);
}
inline void swapStruct(x86_thread_state64_t &x) {
sys::swapByteOrder(x.rax);
sys::swapByteOrder(x.rbx);
sys::swapByteOrder(x.rcx);
sys::swapByteOrder(x.rdx);
sys::swapByteOrder(x.rdi);
sys::swapByteOrder(x.rsi);
sys::swapByteOrder(x.rbp);
sys::swapByteOrder(x.rsp);
sys::swapByteOrder(x.r8);
sys::swapByteOrder(x.r9);
sys::swapByteOrder(x.r10);
sys::swapByteOrder(x.r11);
sys::swapByteOrder(x.r12);
sys::swapByteOrder(x.r13);
sys::swapByteOrder(x.r14);
sys::swapByteOrder(x.r15);
sys::swapByteOrder(x.rip);
sys::swapByteOrder(x.rflags);
sys::swapByteOrder(x.cs);
sys::swapByteOrder(x.fs);
sys::swapByteOrder(x.gs);
}
inline void swapStruct(x86_float_state64_t &x) {
sys::swapByteOrder(x.fpu_reserved[0]);
sys::swapByteOrder(x.fpu_reserved[1]);
// TODO swap: fp_control_t fpu_fcw;
// TODO swap: fp_status_t fpu_fsw;
sys::swapByteOrder(x.fpu_fop);
sys::swapByteOrder(x.fpu_ip);
sys::swapByteOrder(x.fpu_cs);
sys::swapByteOrder(x.fpu_rsrv2);
sys::swapByteOrder(x.fpu_dp);
sys::swapByteOrder(x.fpu_ds);
sys::swapByteOrder(x.fpu_rsrv3);
sys::swapByteOrder(x.fpu_mxcsr);
sys::swapByteOrder(x.fpu_mxcsrmask);
sys::swapByteOrder(x.fpu_reserved1);
}
inline void swapStruct(x86_exception_state64_t &x) {
sys::swapByteOrder(x.trapno);
sys::swapByteOrder(x.cpu);
sys::swapByteOrder(x.err);
sys::swapByteOrder(x.faultvaddr);
}
struct x86_state_hdr_t {
uint32_t flavor;
uint32_t count;
};
struct x86_thread_state_t {
x86_state_hdr_t tsh;
union {
x86_thread_state64_t ts64;
x86_thread_state32_t ts32;
} uts;
};
struct x86_float_state_t {
x86_state_hdr_t fsh;
union {
x86_float_state64_t fs64;
} ufs;
};
struct x86_exception_state_t {
x86_state_hdr_t esh;
union {
x86_exception_state64_t es64;
} ues;
};
inline void swapStruct(x86_state_hdr_t &x) {
sys::swapByteOrder(x.flavor);
sys::swapByteOrder(x.count);
}
enum X86ThreadFlavors {
x86_THREAD_STATE32 = 1,
x86_FLOAT_STATE32 = 2,
x86_EXCEPTION_STATE32 = 3,
x86_THREAD_STATE64 = 4,
x86_FLOAT_STATE64 = 5,
x86_EXCEPTION_STATE64 = 6,
x86_THREAD_STATE = 7,
x86_FLOAT_STATE = 8,
x86_EXCEPTION_STATE = 9,
x86_DEBUG_STATE32 = 10,
x86_DEBUG_STATE64 = 11,
x86_DEBUG_STATE = 12
};
inline void swapStruct(x86_thread_state_t &x) {
swapStruct(x.tsh);
if (x.tsh.flavor == x86_THREAD_STATE64)
swapStruct(x.uts.ts64);
}
inline void swapStruct(x86_float_state_t &x) {
swapStruct(x.fsh);
if (x.fsh.flavor == x86_FLOAT_STATE64)
swapStruct(x.ufs.fs64);
}
inline void swapStruct(x86_exception_state_t &x) {
swapStruct(x.esh);
if (x.esh.flavor == x86_EXCEPTION_STATE64)
swapStruct(x.ues.es64);
}
const uint32_t x86_THREAD_STATE32_COUNT =
sizeof(x86_thread_state32_t) / sizeof(uint32_t);
const uint32_t x86_THREAD_STATE64_COUNT =
sizeof(x86_thread_state64_t) / sizeof(uint32_t);
const uint32_t x86_FLOAT_STATE64_COUNT =
sizeof(x86_float_state64_t) / sizeof(uint32_t);
const uint32_t x86_EXCEPTION_STATE64_COUNT =
sizeof(x86_exception_state64_t) / sizeof(uint32_t);
const uint32_t x86_THREAD_STATE_COUNT =
sizeof(x86_thread_state_t) / sizeof(uint32_t);
const uint32_t x86_FLOAT_STATE_COUNT =
sizeof(x86_float_state_t) / sizeof(uint32_t);
const uint32_t x86_EXCEPTION_STATE_COUNT =
sizeof(x86_exception_state_t) / sizeof(uint32_t);
struct arm_thread_state32_t {
uint32_t r[13];
uint32_t sp;
uint32_t lr;
uint32_t pc;
uint32_t cpsr;
};
inline void swapStruct(arm_thread_state32_t &x) {
for (int i = 0; i < 13; i++)
sys::swapByteOrder(x.r[i]);
sys::swapByteOrder(x.sp);
sys::swapByteOrder(x.lr);
sys::swapByteOrder(x.pc);
sys::swapByteOrder(x.cpsr);
}
struct arm_thread_state64_t {
uint64_t x[29];
uint64_t fp;
uint64_t lr;
uint64_t sp;
uint64_t pc;
uint32_t cpsr;
uint32_t pad;
};
inline void swapStruct(arm_thread_state64_t &x) {
for (int i = 0; i < 29; i++)
sys::swapByteOrder(x.x[i]);
sys::swapByteOrder(x.fp);
sys::swapByteOrder(x.lr);
sys::swapByteOrder(x.sp);
sys::swapByteOrder(x.pc);
sys::swapByteOrder(x.cpsr);
}
struct arm_state_hdr_t {
uint32_t flavor;
uint32_t count;
};
struct arm_thread_state_t {
arm_state_hdr_t tsh;
union {
arm_thread_state32_t ts32;
} uts;
};
inline void swapStruct(arm_state_hdr_t &x) {
sys::swapByteOrder(x.flavor);
sys::swapByteOrder(x.count);
}
enum ARMThreadFlavors {
ARM_THREAD_STATE = 1,
ARM_VFP_STATE = 2,
ARM_EXCEPTION_STATE = 3,
ARM_DEBUG_STATE = 4,
ARN_THREAD_STATE_NONE = 5,
ARM_THREAD_STATE64 = 6,
ARM_EXCEPTION_STATE64 = 7
};
inline void swapStruct(arm_thread_state_t &x) {
swapStruct(x.tsh);
if (x.tsh.flavor == ARM_THREAD_STATE)
swapStruct(x.uts.ts32);
}
const uint32_t ARM_THREAD_STATE_COUNT =
sizeof(arm_thread_state32_t) / sizeof(uint32_t);
const uint32_t ARM_THREAD_STATE64_COUNT =
sizeof(arm_thread_state64_t) / sizeof(uint32_t);
struct ppc_thread_state32_t {
uint32_t srr0;
uint32_t srr1;
uint32_t r0;
uint32_t r1;
uint32_t r2;
uint32_t r3;
uint32_t r4;
uint32_t r5;
uint32_t r6;
uint32_t r7;
uint32_t r8;
uint32_t r9;
uint32_t r10;
uint32_t r11;
uint32_t r12;
uint32_t r13;
uint32_t r14;
uint32_t r15;
uint32_t r16;
uint32_t r17;
uint32_t r18;
uint32_t r19;
uint32_t r20;
uint32_t r21;
uint32_t r22;
uint32_t r23;
uint32_t r24;
uint32_t r25;
uint32_t r26;
uint32_t r27;
uint32_t r28;
uint32_t r29;
uint32_t r30;
uint32_t r31;
uint32_t ct;
uint32_t xer;
uint32_t lr;
uint32_t ctr;
uint32_t mq;
uint32_t vrsave;
};
inline void swapStruct(ppc_thread_state32_t &x) {
sys::swapByteOrder(x.srr0);
sys::swapByteOrder(x.srr1);
sys::swapByteOrder(x.r0);
sys::swapByteOrder(x.r1);
sys::swapByteOrder(x.r2);
sys::swapByteOrder(x.r3);
sys::swapByteOrder(x.r4);
sys::swapByteOrder(x.r5);
sys::swapByteOrder(x.r6);
sys::swapByteOrder(x.r7);
sys::swapByteOrder(x.r8);
sys::swapByteOrder(x.r9);
sys::swapByteOrder(x.r10);
sys::swapByteOrder(x.r11);
sys::swapByteOrder(x.r12);
sys::swapByteOrder(x.r13);
sys::swapByteOrder(x.r14);
sys::swapByteOrder(x.r15);
sys::swapByteOrder(x.r16);
sys::swapByteOrder(x.r17);
sys::swapByteOrder(x.r18);
sys::swapByteOrder(x.r19);
sys::swapByteOrder(x.r20);
sys::swapByteOrder(x.r21);
sys::swapByteOrder(x.r22);
sys::swapByteOrder(x.r23);
sys::swapByteOrder(x.r24);
sys::swapByteOrder(x.r25);
sys::swapByteOrder(x.r26);
sys::swapByteOrder(x.r27);
sys::swapByteOrder(x.r28);
sys::swapByteOrder(x.r29);
sys::swapByteOrder(x.r30);
sys::swapByteOrder(x.r31);
sys::swapByteOrder(x.ct);
sys::swapByteOrder(x.xer);
sys::swapByteOrder(x.lr);
sys::swapByteOrder(x.ctr);
sys::swapByteOrder(x.mq);
sys::swapByteOrder(x.vrsave);
}
struct ppc_state_hdr_t {
uint32_t flavor;
uint32_t count;
};
struct ppc_thread_state_t {
ppc_state_hdr_t tsh;
union {
ppc_thread_state32_t ts32;
} uts;
};
inline void swapStruct(ppc_state_hdr_t &x) {
sys::swapByteOrder(x.flavor);
sys::swapByteOrder(x.count);
}
enum PPCThreadFlavors {
PPC_THREAD_STATE = 1,
PPC_FLOAT_STATE = 2,
PPC_EXCEPTION_STATE = 3,
PPC_VECTOR_STATE = 4,
PPC_THREAD_STATE64 = 5,
PPC_EXCEPTION_STATE64 = 6,
PPC_THREAD_STATE_NONE = 7
};
inline void swapStruct(ppc_thread_state_t &x) {
swapStruct(x.tsh);
if (x.tsh.flavor == PPC_THREAD_STATE)
swapStruct(x.uts.ts32);
}
const uint32_t PPC_THREAD_STATE_COUNT =
sizeof(ppc_thread_state32_t) / sizeof(uint32_t);
// Define a union of all load command structs
#define LOAD_COMMAND_STRUCT(LCStruct) LCStruct LCStruct##_data;
LLVM_PACKED_START
union alignas(4) macho_load_command {
#include "llvm/BinaryFormat/MachO.def"
};
LLVM_PACKED_END
inline void swapStruct(dyld_chained_fixups_header &C) {
sys::swapByteOrder(C.fixups_version);
sys::swapByteOrder(C.starts_offset);
sys::swapByteOrder(C.imports_offset);
sys::swapByteOrder(C.symbols_offset);
sys::swapByteOrder(C.imports_count);
sys::swapByteOrder(C.imports_format);
sys::swapByteOrder(C.symbols_format);
}
inline void swapStruct(dyld_chained_starts_in_image &C) {
sys::swapByteOrder(C.seg_count);
// getStructOrErr() cannot copy the variable-length seg_info_offset array.
// Its elements must be byte swapped manually.
}
inline void swapStruct(dyld_chained_starts_in_segment &C) {
sys::swapByteOrder(C.size);
sys::swapByteOrder(C.page_size);
sys::swapByteOrder(C.pointer_format);
sys::swapByteOrder(C.segment_offset);
sys::swapByteOrder(C.max_valid_pointer);
sys::swapByteOrder(C.page_count);
// seg_info_offset entries must be byte swapped manually.
}
/* code signing attributes of a process */
enum CodeSignAttrs {
CS_VALID = 0x00000001, /* dynamically valid */
CS_ADHOC = 0x00000002, /* ad hoc signed */
CS_GET_TASK_ALLOW = 0x00000004, /* has get-task-allow entitlement */
CS_INSTALLER = 0x00000008, /* has installer entitlement */
CS_FORCED_LV =
0x00000010, /* Library Validation required by Hardened System Policy */
CS_INVALID_ALLOWED = 0x00000020, /* (macOS Only) Page invalidation allowed by
task port policy */
CS_HARD = 0x00000100, /* don't load invalid pages */
CS_KILL = 0x00000200, /* kill process if it becomes invalid */
CS_CHECK_EXPIRATION = 0x00000400, /* force expiration checking */
CS_RESTRICT = 0x00000800, /* tell dyld to treat restricted */
CS_ENFORCEMENT = 0x00001000, /* require enforcement */
CS_REQUIRE_LV = 0x00002000, /* require library validation */
CS_ENTITLEMENTS_VALIDATED =
0x00004000, /* code signature permits restricted entitlements */
CS_NVRAM_UNRESTRICTED =
0x00008000, /* has com.apple.rootless.restricted-nvram-variables.heritable
entitlement */
CS_RUNTIME = 0x00010000, /* Apply hardened runtime policies */
CS_LINKER_SIGNED = 0x00020000, /* Automatically signed by the linker */
CS_ALLOWED_MACHO =
(CS_ADHOC | CS_HARD | CS_KILL | CS_CHECK_EXPIRATION | CS_RESTRICT |
CS_ENFORCEMENT | CS_REQUIRE_LV | CS_RUNTIME | CS_LINKER_SIGNED),
CS_EXEC_SET_HARD = 0x00100000, /* set CS_HARD on any exec'ed process */
CS_EXEC_SET_KILL = 0x00200000, /* set CS_KILL on any exec'ed process */
CS_EXEC_SET_ENFORCEMENT =
0x00400000, /* set CS_ENFORCEMENT on any exec'ed process */
CS_EXEC_INHERIT_SIP =
0x00800000, /* set CS_INSTALLER on any exec'ed process */
CS_KILLED = 0x01000000, /* was killed by kernel for invalidity */
CS_DYLD_PLATFORM =
0x02000000, /* dyld used to load this is a platform binary */
CS_PLATFORM_BINARY = 0x04000000, /* this is a platform binary */
CS_PLATFORM_PATH =
0x08000000, /* platform binary by the fact of path (osx only) */
CS_DEBUGGED = 0x10000000, /* process is currently or has previously been
debugged and allowed to run with invalid pages */
CS_SIGNED = 0x20000000, /* process has a signature (may have gone invalid) */
CS_DEV_CODE =
0x40000000, /* code is dev signed, cannot be loaded into prod signed code
(will go away with rdar://problem/28322552) */
CS_DATAVAULT_CONTROLLER =
0x80000000, /* has Data Vault controller entitlement */
CS_ENTITLEMENT_FLAGS = (CS_GET_TASK_ALLOW | CS_INSTALLER |
CS_DATAVAULT_CONTROLLER | CS_NVRAM_UNRESTRICTED),
};
/* executable segment flags */
enum CodeSignExecSegFlags {
CS_EXECSEG_MAIN_BINARY = 0x1, /* executable segment denotes main binary */
CS_EXECSEG_ALLOW_UNSIGNED = 0x10, /* allow unsigned pages (for debugging) */
CS_EXECSEG_DEBUGGER = 0x20, /* main binary is debugger */
CS_EXECSEG_JIT = 0x40, /* JIT enabled */
CS_EXECSEG_SKIP_LV = 0x80, /* OBSOLETE: skip library validation */
CS_EXECSEG_CAN_LOAD_CDHASH = 0x100, /* can bless cdhash for execution */
CS_EXECSEG_CAN_EXEC_CDHASH = 0x200, /* can execute blessed cdhash */
};
/* Magic numbers used by Code Signing */
enum CodeSignMagic {
CSMAGIC_REQUIREMENT = 0xfade0c00, /* single Requirement blob */
CSMAGIC_REQUIREMENTS =
0xfade0c01, /* Requirements vector (internal requirements) */
CSMAGIC_CODEDIRECTORY = 0xfade0c02, /* CodeDirectory blob */
CSMAGIC_EMBEDDED_SIGNATURE = 0xfade0cc0, /* embedded form of signature data */
CSMAGIC_EMBEDDED_SIGNATURE_OLD = 0xfade0b02, /* XXX */
CSMAGIC_EMBEDDED_ENTITLEMENTS = 0xfade7171, /* embedded entitlements */
CSMAGIC_DETACHED_SIGNATURE =
0xfade0cc1, /* multi-arch collection of embedded signatures */
CSMAGIC_BLOBWRAPPER = 0xfade0b01, /* CMS Signature, among other things */
CS_SUPPORTSSCATTER = 0x20100,
CS_SUPPORTSTEAMID = 0x20200,
CS_SUPPORTSCODELIMIT64 = 0x20300,
CS_SUPPORTSEXECSEG = 0x20400,
CS_SUPPORTSRUNTIME = 0x20500,
CS_SUPPORTSLINKAGE = 0x20600,
CSSLOT_CODEDIRECTORY = 0, /* slot index for CodeDirectory */
CSSLOT_INFOSLOT = 1,
CSSLOT_REQUIREMENTS = 2,
CSSLOT_RESOURCEDIR = 3,
CSSLOT_APPLICATION = 4,
CSSLOT_ENTITLEMENTS = 5,
CSSLOT_ALTERNATE_CODEDIRECTORIES =
0x1000, /* first alternate CodeDirectory, if any */
CSSLOT_ALTERNATE_CODEDIRECTORY_MAX = 5, /* max number of alternate CD slots */
CSSLOT_ALTERNATE_CODEDIRECTORY_LIMIT =
CSSLOT_ALTERNATE_CODEDIRECTORIES +
CSSLOT_ALTERNATE_CODEDIRECTORY_MAX, /* one past the last */
CSSLOT_SIGNATURESLOT = 0x10000, /* CMS Signature */
CSSLOT_IDENTIFICATIONSLOT = 0x10001,
CSSLOT_TICKETSLOT = 0x10002,
CSTYPE_INDEX_REQUIREMENTS = 0x00000002, /* compat with amfi */
CSTYPE_INDEX_ENTITLEMENTS = 0x00000005, /* compat with amfi */
CS_HASHTYPE_SHA1 = 1,
CS_HASHTYPE_SHA256 = 2,
CS_HASHTYPE_SHA256_TRUNCATED = 3,
CS_HASHTYPE_SHA384 = 4,
CS_SHA1_LEN = 20,
CS_SHA256_LEN = 32,
CS_SHA256_TRUNCATED_LEN = 20,
CS_CDHASH_LEN = 20, /* always - larger hashes are truncated */
CS_HASH_MAX_SIZE = 48, /* max size of the hash we'll support */
/*
* Currently only to support Legacy VPN plugins, and Mac App Store
* but intended to replace all the various platform code, dev code etc. bits.
*/
CS_SIGNER_TYPE_UNKNOWN = 0,
CS_SIGNER_TYPE_LEGACYVPN = 5,
CS_SIGNER_TYPE_MAC_APP_STORE = 6,
CS_SUPPL_SIGNER_TYPE_UNKNOWN = 0,
CS_SUPPL_SIGNER_TYPE_TRUSTCACHE = 7,
CS_SUPPL_SIGNER_TYPE_LOCAL = 8,
};
struct CS_CodeDirectory {
uint32_t magic; /* magic number (CSMAGIC_CODEDIRECTORY) */
uint32_t length; /* total length of CodeDirectory blob */
uint32_t version; /* compatibility version */
uint32_t flags; /* setup and mode flags */
uint32_t hashOffset; /* offset of hash slot element at index zero */
uint32_t identOffset; /* offset of identifier string */
uint32_t nSpecialSlots; /* number of special hash slots */
uint32_t nCodeSlots; /* number of ordinary (code) hash slots */
uint32_t codeLimit; /* limit to main image signature range */
uint8_t hashSize; /* size of each hash in bytes */
uint8_t hashType; /* type of hash (cdHashType* constants) */
uint8_t platform; /* platform identifier; zero if not platform binary */
uint8_t pageSize; /* log2(page size in bytes); 0 => infinite */
uint32_t spare2; /* unused (must be zero) */
/* Version 0x20100 */
uint32_t scatterOffset; /* offset of optional scatter vector */
/* Version 0x20200 */
uint32_t teamOffset; /* offset of optional team identifier */
/* Version 0x20300 */
uint32_t spare3; /* unused (must be zero) */
uint64_t codeLimit64; /* limit to main image signature range, 64 bits */
/* Version 0x20400 */
uint64_t execSegBase; /* offset of executable segment */
uint64_t execSegLimit; /* limit of executable segment */
uint64_t execSegFlags; /* executable segment flags */
};
static_assert(sizeof(CS_CodeDirectory) == 88);
struct CS_BlobIndex {
uint32_t type; /* type of entry */
uint32_t offset; /* offset of entry */
};
struct CS_SuperBlob {
uint32_t magic; /* magic number */
uint32_t length; /* total length of SuperBlob */
uint32_t count; /* number of index entries following */
/* followed by Blobs in no particular order as indicated by index offsets */
};
enum SecCSDigestAlgorithm {
kSecCodeSignatureNoHash = 0, /* null value */
kSecCodeSignatureHashSHA1 = 1, /* SHA-1 */
kSecCodeSignatureHashSHA256 = 2, /* SHA-256 */
kSecCodeSignatureHashSHA256Truncated =
3, /* SHA-256 truncated to first 20 bytes */
kSecCodeSignatureHashSHA384 = 4, /* SHA-384 */
kSecCodeSignatureHashSHA512 = 5, /* SHA-512 */
};
enum LinkerOptimizationHintKind {
LOH_ARM64_ADRP_ADRP = 1,
LOH_ARM64_ADRP_LDR = 2,
LOH_ARM64_ADRP_ADD_LDR = 3,
LOH_ARM64_ADRP_LDR_GOT_LDR = 4,
LOH_ARM64_ADRP_ADD_STR = 5,
LOH_ARM64_ADRP_LDR_GOT_STR = 6,
LOH_ARM64_ADRP_ADD = 7,
LOH_ARM64_ADRP_LDR_GOT = 8,
};
} // end namespace MachO
} // end namespace llvm
#endif
PK hwFZ� s�� � BinaryFormat/MsgPack.defnu �[��� //===- MsgPack.def - MessagePack definitions --------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// Macros for running through MessagePack enumerators.
///
//===----------------------------------------------------------------------===//
#if !( \
defined HANDLE_MP_FIRST_BYTE || defined HANDLE_MP_FIX_BITS || \
defined HANDLE_MP_FIX_BITS_MASK || defined HANDLE_MP_FIX_MAX || \
defined HANDLE_MP_FIX_LEN || defined HANDLE_MP_FIX_MIN)
#error "Missing macro definition of HANDLE_MP*"
#endif
#ifndef HANDLE_MP_FIRST_BYTE
#define HANDLE_MP_FIRST_BYTE(ID, NAME)
#endif
#ifndef HANDLE_MP_FIX_BITS
#define HANDLE_MP_FIX_BITS(ID, NAME)
#endif
#ifndef HANDLE_MP_FIX_BITS_MASK
#define HANDLE_MP_FIX_BITS_MASK(ID, NAME)
#endif
#ifndef HANDLE_MP_FIX_MAX
#define HANDLE_MP_FIX_MAX(ID, NAME)
#endif
#ifndef HANDLE_MP_FIX_LEN
#define HANDLE_MP_FIX_LEN(ID, NAME)
#endif
#ifndef HANDLE_MP_FIX_MIN
#define HANDLE_MP_FIX_MIN(ID, NAME)
#endif
HANDLE_MP_FIRST_BYTE(0xc0, Nil)
HANDLE_MP_FIRST_BYTE(0xc2, False)
HANDLE_MP_FIRST_BYTE(0xc3, True)
HANDLE_MP_FIRST_BYTE(0xc4, Bin8)
HANDLE_MP_FIRST_BYTE(0xc5, Bin16)
HANDLE_MP_FIRST_BYTE(0xc6, Bin32)
HANDLE_MP_FIRST_BYTE(0xc7, Ext8)
HANDLE_MP_FIRST_BYTE(0xc8, Ext16)
HANDLE_MP_FIRST_BYTE(0xc9, Ext32)
HANDLE_MP_FIRST_BYTE(0xca, Float32)
HANDLE_MP_FIRST_BYTE(0xcb, Float64)
HANDLE_MP_FIRST_BYTE(0xcc, UInt8)
HANDLE_MP_FIRST_BYTE(0xcd, UInt16)
HANDLE_MP_FIRST_BYTE(0xce, UInt32)
HANDLE_MP_FIRST_BYTE(0xcf, UInt64)
HANDLE_MP_FIRST_BYTE(0xd0, Int8)
HANDLE_MP_FIRST_BYTE(0xd1, Int16)
HANDLE_MP_FIRST_BYTE(0xd2, Int32)
HANDLE_MP_FIRST_BYTE(0xd3, Int64)
HANDLE_MP_FIRST_BYTE(0xd4, FixExt1)
HANDLE_MP_FIRST_BYTE(0xd5, FixExt2)
HANDLE_MP_FIRST_BYTE(0xd6, FixExt4)
HANDLE_MP_FIRST_BYTE(0xd7, FixExt8)
HANDLE_MP_FIRST_BYTE(0xd8, FixExt16)
HANDLE_MP_FIRST_BYTE(0xd9, Str8)
HANDLE_MP_FIRST_BYTE(0xda, Str16)
HANDLE_MP_FIRST_BYTE(0xdb, Str32)
HANDLE_MP_FIRST_BYTE(0xdc, Array16)
HANDLE_MP_FIRST_BYTE(0xdd, Array32)
HANDLE_MP_FIRST_BYTE(0xde, Map16)
HANDLE_MP_FIRST_BYTE(0xdf, Map32)
HANDLE_MP_FIX_BITS(0x00, PositiveInt)
HANDLE_MP_FIX_BITS(0x80, Map)
HANDLE_MP_FIX_BITS(0x90, Array)
HANDLE_MP_FIX_BITS(0xa0, String)
HANDLE_MP_FIX_BITS(0xe0, NegativeInt)
HANDLE_MP_FIX_BITS_MASK(0x80, PositiveInt)
HANDLE_MP_FIX_BITS_MASK(0xf0, Map)
HANDLE_MP_FIX_BITS_MASK(0xf0, Array)
HANDLE_MP_FIX_BITS_MASK(0xe0, String)
HANDLE_MP_FIX_BITS_MASK(0xe0, NegativeInt)
HANDLE_MP_FIX_MAX(0x7f, PositiveInt)
HANDLE_MP_FIX_MAX(0x0f, Map)
HANDLE_MP_FIX_MAX(0x0f, Array)
HANDLE_MP_FIX_MAX(0x1f, String)
HANDLE_MP_FIX_LEN(0x01, Ext1)
HANDLE_MP_FIX_LEN(0x02, Ext2)
HANDLE_MP_FIX_LEN(0x04, Ext4)
HANDLE_MP_FIX_LEN(0x08, Ext8)
HANDLE_MP_FIX_LEN(0x10, Ext16)
HANDLE_MP_FIX_MIN(-0x20, NegativeInt)
#undef HANDLE_MP_FIRST_BYTE
#undef HANDLE_MP_FIX_BITS
#undef HANDLE_MP_FIX_BITS_MASK
#undef HANDLE_MP_FIX_MAX
#undef HANDLE_MP_FIX_LEN
#undef HANDLE_MP_FIX_MIN
PK hwFZ�7�Q Q " BinaryFormat/MinidumpConstants.defnu �[��� //===- MinidumpConstants.def - Iteration over minidump constants-*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#if !(defined(HANDLE_MDMP_STREAM_TYPE) || defined(HANDLE_MDMP_ARCH) || \
defined(HANDLE_MDMP_PLATFORM) || defined(HANDLE_MDMP_PROTECT) || \
defined(HANDLE_MDMP_MEMSTATE) || defined(HANDLE_MDMP_MEMTYPE))
#error "Missing HANDLE_MDMP definition"
#endif
#ifndef HANDLE_MDMP_STREAM_TYPE
#define HANDLE_MDMP_STREAM_TYPE(CODE, NAME)
#endif
#ifndef HANDLE_MDMP_ARCH
#define HANDLE_MDMP_ARCH(CODE, NAME)
#endif
#ifndef HANDLE_MDMP_PLATFORM
#define HANDLE_MDMP_PLATFORM(CODE, NAME)
#endif
#ifndef HANDLE_MDMP_PROTECT
#define HANDLE_MDMP_PROTECT(CODE, NAME, NATIVENAME)
#endif
#ifndef HANDLE_MDMP_MEMSTATE
#define HANDLE_MDMP_MEMSTATE(CODE, NAME, NATIVENAME)
#endif
#ifndef HANDLE_MDMP_MEMTYPE
#define HANDLE_MDMP_MEMTYPE(CODE, NAME, NATIVENAME)
#endif
HANDLE_MDMP_STREAM_TYPE(0x0003, ThreadList)
HANDLE_MDMP_STREAM_TYPE(0x0004, ModuleList)
HANDLE_MDMP_STREAM_TYPE(0x0005, MemoryList)
HANDLE_MDMP_STREAM_TYPE(0x0006, Exception)
HANDLE_MDMP_STREAM_TYPE(0x0007, SystemInfo)
HANDLE_MDMP_STREAM_TYPE(0x0008, ThreadExList)
HANDLE_MDMP_STREAM_TYPE(0x0009, Memory64List)
HANDLE_MDMP_STREAM_TYPE(0x000a, CommentA)
HANDLE_MDMP_STREAM_TYPE(0x000b, CommentW)
HANDLE_MDMP_STREAM_TYPE(0x000c, HandleData)
HANDLE_MDMP_STREAM_TYPE(0x000d, FunctionTable)
HANDLE_MDMP_STREAM_TYPE(0x000e, UnloadedModuleList)
HANDLE_MDMP_STREAM_TYPE(0x000f, MiscInfo)
HANDLE_MDMP_STREAM_TYPE(0x0010, MemoryInfoList)
HANDLE_MDMP_STREAM_TYPE(0x0011, ThreadInfoList)
HANDLE_MDMP_STREAM_TYPE(0x0012, HandleOperationList)
HANDLE_MDMP_STREAM_TYPE(0x0013, Token)
HANDLE_MDMP_STREAM_TYPE(0x0014, JavascriptData)
HANDLE_MDMP_STREAM_TYPE(0x0015, SystemMemoryInfo)
HANDLE_MDMP_STREAM_TYPE(0x0016, ProcessVMCounters)
// Breakpad extension types. 0x4767 = "Gg"
HANDLE_MDMP_STREAM_TYPE(0x47670001, BreakpadInfo)
HANDLE_MDMP_STREAM_TYPE(0x47670002, AssertionInfo)
// These are additional minidump stream values which are specific to the linux
// breakpad implementation.
HANDLE_MDMP_STREAM_TYPE(0x47670003, LinuxCPUInfo) // /proc/cpuinfo
HANDLE_MDMP_STREAM_TYPE(0x47670004, LinuxProcStatus) // /proc/$x/status
HANDLE_MDMP_STREAM_TYPE(0x47670005, LinuxLSBRelease) // /etc/lsb-release
HANDLE_MDMP_STREAM_TYPE(0x47670006, LinuxCMDLine) // /proc/$x/cmdline
HANDLE_MDMP_STREAM_TYPE(0x47670007, LinuxEnviron) // /proc/$x/environ
HANDLE_MDMP_STREAM_TYPE(0x47670008, LinuxAuxv) // /proc/$x/auxv
HANDLE_MDMP_STREAM_TYPE(0x47670009, LinuxMaps) // /proc/$x/maps
HANDLE_MDMP_STREAM_TYPE(0x4767000A, LinuxDSODebug)
HANDLE_MDMP_STREAM_TYPE(0x4767000B, LinuxProcStat) // /proc/$x/stat
HANDLE_MDMP_STREAM_TYPE(0x4767000C, LinuxProcUptime) // uptime
HANDLE_MDMP_STREAM_TYPE(0x4767000D, LinuxProcFD) // /proc/$x/fd
// Facebook-defined stream types
HANDLE_MDMP_STREAM_TYPE(0xFACE1CA7, FacebookLogcat)
HANDLE_MDMP_STREAM_TYPE(0xFACECAFA, FacebookAppCustomData)
HANDLE_MDMP_STREAM_TYPE(0xFACECAFB, FacebookBuildID)
HANDLE_MDMP_STREAM_TYPE(0xFACECAFC, FacebookAppVersionName)
HANDLE_MDMP_STREAM_TYPE(0xFACECAFD, FacebookJavaStack)
HANDLE_MDMP_STREAM_TYPE(0xFACECAFE, FacebookDalvikInfo)
HANDLE_MDMP_STREAM_TYPE(0xFACECAFF, FacebookUnwindSymbols)
HANDLE_MDMP_STREAM_TYPE(0xFACECB00, FacebookDumpErrorLog)
HANDLE_MDMP_STREAM_TYPE(0xFACECCCC, FacebookAppStateLog)
HANDLE_MDMP_STREAM_TYPE(0xFACEDEAD, FacebookAbortReason)
HANDLE_MDMP_STREAM_TYPE(0xFACEE000, FacebookThreadName)
HANDLE_MDMP_ARCH(0x0000, X86) // PROCESSOR_ARCHITECTURE_INTEL
HANDLE_MDMP_ARCH(0x0001, MIPS) // PROCESSOR_ARCHITECTURE_MIPS
HANDLE_MDMP_ARCH(0x0002, Alpha) // PROCESSOR_ARCHITECTURE_ALPHA
HANDLE_MDMP_ARCH(0x0003, PPC) // PROCESSOR_ARCHITECTURE_PPC
HANDLE_MDMP_ARCH(0x0004, SHX) // PROCESSOR_ARCHITECTURE_SHX (Super-H)
HANDLE_MDMP_ARCH(0x0005, ARM) // PROCESSOR_ARCHITECTURE_ARM
HANDLE_MDMP_ARCH(0x0006, IA64) // PROCESSOR_ARCHITECTURE_IA64
HANDLE_MDMP_ARCH(0x0007, Alpha64) // PROCESSOR_ARCHITECTURE_ALPHA64
HANDLE_MDMP_ARCH(0x0008, MSIL) // PROCESSOR_ARCHITECTURE_MSIL
HANDLE_MDMP_ARCH(0x0009, AMD64) // PROCESSOR_ARCHITECTURE_AMD64
HANDLE_MDMP_ARCH(0x000a, X86Win64) // PROCESSOR_ARCHITECTURE_IA32_ON_WIN64
HANDLE_MDMP_ARCH(0x000c, ARM64) // PROCESSOR_ARCHITECTURE_ARM64
HANDLE_MDMP_ARCH(0x8001, BP_SPARC) // Breakpad-defined value for SPARC
HANDLE_MDMP_ARCH(0x8002, BP_PPC64) // Breakpad-defined value for PPC64
HANDLE_MDMP_ARCH(0x8003, BP_ARM64) // Breakpad-defined value for ARM64
HANDLE_MDMP_ARCH(0x8004, BP_MIPS64) // Breakpad-defined value for MIPS64
HANDLE_MDMP_PLATFORM(0x0000, Win32S) // Win32 on Windows 3.1
HANDLE_MDMP_PLATFORM(0x0001, Win32Windows) // Windows 95-98-Me
HANDLE_MDMP_PLATFORM(0x0002, Win32NT) // Windows NT, 2000+
HANDLE_MDMP_PLATFORM(0x0003, Win32CE) // Windows CE, Windows Mobile, "Handheld"
// Breakpad-defined values.
HANDLE_MDMP_PLATFORM(0x8000, Unix) // Generic Unix-ish
HANDLE_MDMP_PLATFORM(0x8101, MacOSX) // Mac OS X/Darwin
HANDLE_MDMP_PLATFORM(0x8102, IOS) // iOS
HANDLE_MDMP_PLATFORM(0x8201, Linux) // Linux
HANDLE_MDMP_PLATFORM(0x8202, Solaris) // Solaris
HANDLE_MDMP_PLATFORM(0x8203, Android) // Android
HANDLE_MDMP_PLATFORM(0x8204, PS3) // PS3
HANDLE_MDMP_PLATFORM(0x8205, NaCl) // Native Client (NaCl)
HANDLE_MDMP_PLATFORM(0x8206, OpenHOS) // OpenHarmony OS
HANDLE_MDMP_PROTECT(0x01, NoAccess, PAGE_NO_ACCESS)
HANDLE_MDMP_PROTECT(0x02, ReadOnly, PAGE_READ_ONLY)
HANDLE_MDMP_PROTECT(0x04, ReadWrite, PAGE_READ_WRITE)
HANDLE_MDMP_PROTECT(0x08, WriteCopy, PAGE_WRITE_COPY)
HANDLE_MDMP_PROTECT(0x10, Execute, PAGE_EXECUTE)
HANDLE_MDMP_PROTECT(0x20, ExecuteRead, PAGE_EXECUTE_READ)
HANDLE_MDMP_PROTECT(0x40, ExecuteReadWrite, PAGE_EXECUTE_READ_WRITE)
HANDLE_MDMP_PROTECT(0x80, ExeciteWriteCopy, PAGE_EXECUTE_WRITE_COPY)
HANDLE_MDMP_PROTECT(0x100, Guard, PAGE_GUARD)
HANDLE_MDMP_PROTECT(0x200, NoCache, PAGE_NOCACHE)
HANDLE_MDMP_PROTECT(0x400, WriteCombine, PAGE_WRITECOMBINE)
HANDLE_MDMP_PROTECT(0x40000000, TargetsInvalid, PAGE_TARGETS_INVALID)
HANDLE_MDMP_MEMSTATE(0x01000, Commit, MEM_COMMIT)
HANDLE_MDMP_MEMSTATE(0x02000, Reserve, MEM_RESERVE)
HANDLE_MDMP_MEMSTATE(0x10000, Free, MEM_FREE)
HANDLE_MDMP_MEMTYPE(0x0020000, Private, MEM_PRIVATE)
HANDLE_MDMP_MEMTYPE(0x0040000, Mapped, MEM_MAPPED)
HANDLE_MDMP_MEMTYPE(0x1000000, Image, MEM_IMAGE)
#undef HANDLE_MDMP_STREAM_TYPE
#undef HANDLE_MDMP_ARCH
#undef HANDLE_MDMP_PLATFORM
#undef HANDLE_MDMP_PROTECT
#undef HANDLE_MDMP_MEMSTATE
#undef HANDLE_MDMP_MEMTYPE
PK hwFZΦL�I I " BinaryFormat/ELFRelocs/Hexagon.defnu �[���
#ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
// Release 5 ABI
ELF_RELOC(R_HEX_NONE, 0)
ELF_RELOC(R_HEX_B22_PCREL, 1)
ELF_RELOC(R_HEX_B15_PCREL, 2)
ELF_RELOC(R_HEX_B7_PCREL, 3)
ELF_RELOC(R_HEX_LO16, 4)
ELF_RELOC(R_HEX_HI16, 5)
ELF_RELOC(R_HEX_32, 6)
ELF_RELOC(R_HEX_16, 7)
ELF_RELOC(R_HEX_8, 8)
ELF_RELOC(R_HEX_GPREL16_0, 9)
ELF_RELOC(R_HEX_GPREL16_1, 10)
ELF_RELOC(R_HEX_GPREL16_2, 11)
ELF_RELOC(R_HEX_GPREL16_3, 12)
ELF_RELOC(R_HEX_HL16, 13)
ELF_RELOC(R_HEX_B13_PCREL, 14)
ELF_RELOC(R_HEX_B9_PCREL, 15)
ELF_RELOC(R_HEX_B32_PCREL_X, 16)
ELF_RELOC(R_HEX_32_6_X, 17)
ELF_RELOC(R_HEX_B22_PCREL_X, 18)
ELF_RELOC(R_HEX_B15_PCREL_X, 19)
ELF_RELOC(R_HEX_B13_PCREL_X, 20)
ELF_RELOC(R_HEX_B9_PCREL_X, 21)
ELF_RELOC(R_HEX_B7_PCREL_X, 22)
ELF_RELOC(R_HEX_16_X, 23)
ELF_RELOC(R_HEX_12_X, 24)
ELF_RELOC(R_HEX_11_X, 25)
ELF_RELOC(R_HEX_10_X, 26)
ELF_RELOC(R_HEX_9_X, 27)
ELF_RELOC(R_HEX_8_X, 28)
ELF_RELOC(R_HEX_7_X, 29)
ELF_RELOC(R_HEX_6_X, 30)
ELF_RELOC(R_HEX_32_PCREL, 31)
ELF_RELOC(R_HEX_COPY, 32)
ELF_RELOC(R_HEX_GLOB_DAT, 33)
ELF_RELOC(R_HEX_JMP_SLOT, 34)
ELF_RELOC(R_HEX_RELATIVE, 35)
ELF_RELOC(R_HEX_PLT_B22_PCREL, 36)
ELF_RELOC(R_HEX_GOTREL_LO16, 37)
ELF_RELOC(R_HEX_GOTREL_HI16, 38)
ELF_RELOC(R_HEX_GOTREL_32, 39)
ELF_RELOC(R_HEX_GOT_LO16, 40)
ELF_RELOC(R_HEX_GOT_HI16, 41)
ELF_RELOC(R_HEX_GOT_32, 42)
ELF_RELOC(R_HEX_GOT_16, 43)
ELF_RELOC(R_HEX_DTPMOD_32, 44)
ELF_RELOC(R_HEX_DTPREL_LO16, 45)
ELF_RELOC(R_HEX_DTPREL_HI16, 46)
ELF_RELOC(R_HEX_DTPREL_32, 47)
ELF_RELOC(R_HEX_DTPREL_16, 48)
ELF_RELOC(R_HEX_GD_PLT_B22_PCREL, 49)
ELF_RELOC(R_HEX_GD_GOT_LO16, 50)
ELF_RELOC(R_HEX_GD_GOT_HI16, 51)
ELF_RELOC(R_HEX_GD_GOT_32, 52)
ELF_RELOC(R_HEX_GD_GOT_16, 53)
ELF_RELOC(R_HEX_IE_LO16, 54)
ELF_RELOC(R_HEX_IE_HI16, 55)
ELF_RELOC(R_HEX_IE_32, 56)
ELF_RELOC(R_HEX_IE_GOT_LO16, 57)
ELF_RELOC(R_HEX_IE_GOT_HI16, 58)
ELF_RELOC(R_HEX_IE_GOT_32, 59)
ELF_RELOC(R_HEX_IE_GOT_16, 60)
ELF_RELOC(R_HEX_TPREL_LO16, 61)
ELF_RELOC(R_HEX_TPREL_HI16, 62)
ELF_RELOC(R_HEX_TPREL_32, 63)
ELF_RELOC(R_HEX_TPREL_16, 64)
ELF_RELOC(R_HEX_6_PCREL_X, 65)
ELF_RELOC(R_HEX_GOTREL_32_6_X, 66)
ELF_RELOC(R_HEX_GOTREL_16_X, 67)
ELF_RELOC(R_HEX_GOTREL_11_X, 68)
ELF_RELOC(R_HEX_GOT_32_6_X, 69)
ELF_RELOC(R_HEX_GOT_16_X, 70)
ELF_RELOC(R_HEX_GOT_11_X, 71)
ELF_RELOC(R_HEX_DTPREL_32_6_X, 72)
ELF_RELOC(R_HEX_DTPREL_16_X, 73)
ELF_RELOC(R_HEX_DTPREL_11_X, 74)
ELF_RELOC(R_HEX_GD_GOT_32_6_X, 75)
ELF_RELOC(R_HEX_GD_GOT_16_X, 76)
ELF_RELOC(R_HEX_GD_GOT_11_X, 77)
ELF_RELOC(R_HEX_IE_32_6_X, 78)
ELF_RELOC(R_HEX_IE_16_X, 79)
ELF_RELOC(R_HEX_IE_GOT_32_6_X, 80)
ELF_RELOC(R_HEX_IE_GOT_16_X, 81)
ELF_RELOC(R_HEX_IE_GOT_11_X, 82)
ELF_RELOC(R_HEX_TPREL_32_6_X, 83)
ELF_RELOC(R_HEX_TPREL_16_X, 84)
ELF_RELOC(R_HEX_TPREL_11_X, 85)
ELF_RELOC(R_HEX_LD_PLT_B22_PCREL, 86)
ELF_RELOC(R_HEX_LD_GOT_LO16, 87)
ELF_RELOC(R_HEX_LD_GOT_HI16, 88)
ELF_RELOC(R_HEX_LD_GOT_32, 89)
ELF_RELOC(R_HEX_LD_GOT_16, 90)
ELF_RELOC(R_HEX_LD_GOT_32_6_X, 91)
ELF_RELOC(R_HEX_LD_GOT_16_X, 92)
ELF_RELOC(R_HEX_LD_GOT_11_X, 93)
ELF_RELOC(R_HEX_23_REG, 94)
ELF_RELOC(R_HEX_GD_PLT_B22_PCREL_X, 95)
ELF_RELOC(R_HEX_GD_PLT_B32_PCREL_X, 96)
ELF_RELOC(R_HEX_LD_PLT_B22_PCREL_X, 97)
ELF_RELOC(R_HEX_LD_PLT_B32_PCREL_X, 98)
ELF_RELOC(R_HEX_27_REG, 99)
PK hwFZ*
� 0 0 ! BinaryFormat/ELFRelocs/Xtensa.defnu �[��� #ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
ELF_RELOC(R_XTENSA_NONE, 0)
ELF_RELOC(R_XTENSA_32, 1)
ELF_RELOC(R_XTENSA_RTLD, 2)
ELF_RELOC(R_XTENSA_GLOB_DAT, 3)
ELF_RELOC(R_XTENSA_JMP_SLOT, 4)
ELF_RELOC(R_XTENSA_RELATIVE, 5)
ELF_RELOC(R_XTENSA_PLT, 6)
// RELOC '7' currently is not used.
ELF_RELOC(R_XTENSA_OP0, 8)
ELF_RELOC(R_XTENSA_OP1, 9)
ELF_RELOC(R_XTENSA_OP2, 10)
ELF_RELOC(R_XTENSA_ASM_EXPAND, 11)
ELF_RELOC(R_XTENSA_ASM_SIMPLIFY, 12)
ELF_RELOC(R_XTENSA_32_PCREL, 14)
ELF_RELOC(R_XTENSA_GNU_VTINHERIT, 15)
ELF_RELOC(R_XTENSA_GNU_VTENTRY, 16)
ELF_RELOC(R_XTENSA_DIFF8, 17)
ELF_RELOC(R_XTENSA_DIFF16, 18)
ELF_RELOC(R_XTENSA_DIFF32, 19)
ELF_RELOC(R_XTENSA_SLOT0_OP, 20)
ELF_RELOC(R_XTENSA_SLOT1_OP, 21)
ELF_RELOC(R_XTENSA_SLOT2_OP, 22)
ELF_RELOC(R_XTENSA_SLOT3_OP, 23)
ELF_RELOC(R_XTENSA_SLOT4_OP, 24)
ELF_RELOC(R_XTENSA_SLOT5_OP, 25)
ELF_RELOC(R_XTENSA_SLOT6_OP, 26)
ELF_RELOC(R_XTENSA_SLOT7_OP, 27)
ELF_RELOC(R_XTENSA_SLOT8_OP, 28)
ELF_RELOC(R_XTENSA_SLOT9_OP, 29)
ELF_RELOC(R_XTENSA_SLOT10_OP, 30)
ELF_RELOC(R_XTENSA_SLOT11_OP, 31)
ELF_RELOC(R_XTENSA_SLOT12_OP, 32)
ELF_RELOC(R_XTENSA_SLOT13_OP, 33)
ELF_RELOC(R_XTENSA_SLOT14_OP, 34)
ELF_RELOC(R_XTENSA_SLOT0_ALT, 35)
ELF_RELOC(R_XTENSA_SLOT1_ALT, 36)
ELF_RELOC(R_XTENSA_SLOT2_ALT, 37)
ELF_RELOC(R_XTENSA_SLOT3_ALT, 38)
ELF_RELOC(R_XTENSA_SLOT4_ALT, 39)
ELF_RELOC(R_XTENSA_SLOT5_ALT, 40)
ELF_RELOC(R_XTENSA_SLOT6_ALT, 41)
ELF_RELOC(R_XTENSA_SLOT7_ALT, 42)
ELF_RELOC(R_XTENSA_SLOT8_ALT, 43)
ELF_RELOC(R_XTENSA_SLOT9_ALT, 44)
ELF_RELOC(R_XTENSA_SLOT10_ALT, 45)
ELF_RELOC(R_XTENSA_SLOT11_ALT, 46)
ELF_RELOC(R_XTENSA_SLOT12_ALT, 47)
ELF_RELOC(R_XTENSA_SLOT13_ALT, 48)
ELF_RELOC(R_XTENSA_SLOT14_ALT, 49)
ELF_RELOC(R_XTENSA_TLSDESC_FN, 50)
ELF_RELOC(R_XTENSA_TLSDESC_ARG, 51)
ELF_RELOC(R_XTENSA_TLS_DTPOFF, 52)
ELF_RELOC(R_XTENSA_TLS_TPOFF, 53)
ELF_RELOC(R_XTENSA_TLS_FUNC, 54)
ELF_RELOC(R_XTENSA_TLS_ARG, 55)
ELF_RELOC(R_XTENSA_TLS_CALL, 56)
PK hwFZ����
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BinaryFormat/ELFRelocs/CSKY.defnu �[���
#ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
ELF_RELOC(R_CKCORE_NONE, 0)
ELF_RELOC(R_CKCORE_ADDR32, 1)
ELF_RELOC(R_CKCORE_PCREL_IMM8_4, 2)
ELF_RELOC(R_CKCORE_PCREL_IMM11_2, 3)
ELF_RELOC(R_CKCORE_PCREL_IMM4_2, 4)
ELF_RELOC(R_CKCORE_PCREL32, 5)
ELF_RELOC(R_CKCORE_PCREL_JSR_IMM11_2, 6)
ELF_RELOC(R_CKCORE_GNU_VTINHERIT, 7)
ELF_RELOC(R_CKCORE_GNU_VTENTRY, 8)
ELF_RELOC(R_CKCORE_RELATIVE, 9)
ELF_RELOC(R_CKCORE_COPY, 10)
ELF_RELOC(R_CKCORE_GLOB_DAT, 11)
ELF_RELOC(R_CKCORE_JUMP_SLOT, 12)
ELF_RELOC(R_CKCORE_GOTOFF, 13)
ELF_RELOC(R_CKCORE_GOTPC, 14)
ELF_RELOC(R_CKCORE_GOT32, 15)
ELF_RELOC(R_CKCORE_PLT32, 16)
ELF_RELOC(R_CKCORE_ADDRGOT, 17)
ELF_RELOC(R_CKCORE_ADDRPLT, 18)
ELF_RELOC(R_CKCORE_PCREL_IMM26_2, 19)
ELF_RELOC(R_CKCORE_PCREL_IMM16_2, 20)
ELF_RELOC(R_CKCORE_PCREL_IMM16_4, 21)
ELF_RELOC(R_CKCORE_PCREL_IMM10_2, 22)
ELF_RELOC(R_CKCORE_PCREL_IMM10_4, 23)
ELF_RELOC(R_CKCORE_ADDR_HI16, 24)
ELF_RELOC(R_CKCORE_ADDR_LO16, 25)
ELF_RELOC(R_CKCORE_GOTPC_HI16, 26)
ELF_RELOC(R_CKCORE_GOTPC_LO16, 27)
ELF_RELOC(R_CKCORE_GOTOFF_HI16, 28)
ELF_RELOC(R_CKCORE_GOTOFF_LO16, 29)
ELF_RELOC(R_CKCORE_GOT12, 30)
ELF_RELOC(R_CKCORE_GOT_HI16, 31)
ELF_RELOC(R_CKCORE_GOT_LO16, 32)
ELF_RELOC(R_CKCORE_PLT12, 33)
ELF_RELOC(R_CKCORE_PLT_HI16, 34)
ELF_RELOC(R_CKCORE_PLT_LO16, 35)
ELF_RELOC(R_CKCORE_ADDRGOT_HI16, 36)
ELF_RELOC(R_CKCORE_ADDRGOT_LO16, 37)
ELF_RELOC(R_CKCORE_ADDRPLT_HI16, 38)
ELF_RELOC(R_CKCORE_ADDRPLT_LO16, 39)
ELF_RELOC(R_CKCORE_PCREL_JSR_IMM26_2, 40)
ELF_RELOC(R_CKCORE_TOFFSET_LO16, 41)
ELF_RELOC(R_CKCORE_DOFFSET_LO16, 42)
ELF_RELOC(R_CKCORE_PCREL_IMM18_2, 43)
ELF_RELOC(R_CKCORE_DOFFSET_IMM18, 44)
ELF_RELOC(R_CKCORE_DOFFSET_IMM18_2, 45)
ELF_RELOC(R_CKCORE_DOFFSET_IMM18_4, 46)
ELF_RELOC(R_CKCORE_GOTOFF_IMM18, 47)
ELF_RELOC(R_CKCORE_GOT_IMM18_4, 48)
ELF_RELOC(R_CKCORE_PLT_IMM18_4, 49)
ELF_RELOC(R_CKCORE_PCREL_IMM7_4, 50)
ELF_RELOC(R_CKCORE_TLS_LE32, 51)
ELF_RELOC(R_CKCORE_TLS_IE32, 52)
ELF_RELOC(R_CKCORE_TLS_GD32, 53)
ELF_RELOC(R_CKCORE_TLS_LDM32, 54)
ELF_RELOC(R_CKCORE_TLS_LDO32, 55)
ELF_RELOC(R_CKCORE_TLS_DTPMOD32, 56)
ELF_RELOC(R_CKCORE_TLS_DTPOFF32, 57)
ELF_RELOC(R_CKCORE_TLS_TPOFF32, 58)
ELF_RELOC(R_CKCORE_PCREL_FLRW_IMM8_4, 59)
ELF_RELOC(R_CKCORE_NOJSRI, 60)
ELF_RELOC(R_CKCORE_CALLGRAPH, 61)
ELF_RELOC(R_CKCORE_IRELATIVE, 62)
ELF_RELOC(R_CKCORE_PCREL_BLOOP_IMM4_4, 63)
ELF_RELOC(R_CKCORE_PCREL_BLOOP_IMM12_4, 64)
ELF_RELOC(R_CKCORE_PCREL_VLRW_IMM12_1, 65)
ELF_RELOC(R_CKCORE_PCREL_VLRW_IMM12_2, 66)
ELF_RELOC(R_CKCORE_PCREL_VLRW_IMM12_4, 67)
ELF_RELOC(R_CKCORE_PCREL_VLRW_IMM12_8, 68)
PK hwFZ�� w
! BinaryFormat/ELFRelocs/MSP430.defnu �[���
#ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
ELF_RELOC(R_MSP430_NONE, 0)
ELF_RELOC(R_MSP430_32, 1)
ELF_RELOC(R_MSP430_10_PCREL, 2)
ELF_RELOC(R_MSP430_16, 3)
ELF_RELOC(R_MSP430_16_PCREL, 4)
ELF_RELOC(R_MSP430_16_BYTE, 5)
ELF_RELOC(R_MSP430_16_PCREL_BYTE, 6)
ELF_RELOC(R_MSP430_2X_PCREL, 7)
ELF_RELOC(R_MSP430_RL_PCREL, 8)
ELF_RELOC(R_MSP430_8, 9)
ELF_RELOC(R_MSP430_SYM_DIFF, 10)
PK hwFZ��nG� � $ BinaryFormat/ELFRelocs/LoongArch.defnu �[��� #ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
// These types and values are from the LoongArch ELF psABI which can be found at
// https://github.com/loongson/LoongArch-Documentation
// and these definitions has been adopted by binutils (include/elf/loongarch.h).
// The commit hash (main branch) we reference is:
// 9b3bd9f4a497115913c22f1a2a47863798fbc02a
ELF_RELOC(R_LARCH_NONE, 0)
ELF_RELOC(R_LARCH_32, 1)
ELF_RELOC(R_LARCH_64, 2)
ELF_RELOC(R_LARCH_RELATIVE, 3)
ELF_RELOC(R_LARCH_COPY, 4)
ELF_RELOC(R_LARCH_JUMP_SLOT, 5)
ELF_RELOC(R_LARCH_TLS_DTPMOD32, 6)
ELF_RELOC(R_LARCH_TLS_DTPMOD64, 7)
ELF_RELOC(R_LARCH_TLS_DTPREL32, 8)
ELF_RELOC(R_LARCH_TLS_DTPREL64, 9)
ELF_RELOC(R_LARCH_TLS_TPREL32, 10)
ELF_RELOC(R_LARCH_TLS_TPREL64, 11)
ELF_RELOC(R_LARCH_IRELATIVE, 12)
ELF_RELOC(R_LARCH_MARK_LA, 20)
ELF_RELOC(R_LARCH_MARK_PCREL, 21)
ELF_RELOC(R_LARCH_SOP_PUSH_PCREL, 22)
ELF_RELOC(R_LARCH_SOP_PUSH_ABSOLUTE, 23)
ELF_RELOC(R_LARCH_SOP_PUSH_DUP, 24)
ELF_RELOC(R_LARCH_SOP_PUSH_GPREL, 25)
ELF_RELOC(R_LARCH_SOP_PUSH_TLS_TPREL, 26)
ELF_RELOC(R_LARCH_SOP_PUSH_TLS_GOT, 27)
ELF_RELOC(R_LARCH_SOP_PUSH_TLS_GD, 28)
ELF_RELOC(R_LARCH_SOP_PUSH_PLT_PCREL, 29)
ELF_RELOC(R_LARCH_SOP_ASSERT, 30)
ELF_RELOC(R_LARCH_SOP_NOT, 31)
ELF_RELOC(R_LARCH_SOP_SUB, 32)
ELF_RELOC(R_LARCH_SOP_SL, 33)
ELF_RELOC(R_LARCH_SOP_SR, 34)
ELF_RELOC(R_LARCH_SOP_ADD, 35)
ELF_RELOC(R_LARCH_SOP_AND, 36)
ELF_RELOC(R_LARCH_SOP_IF_ELSE, 37)
ELF_RELOC(R_LARCH_SOP_POP_32_S_10_5, 38)
ELF_RELOC(R_LARCH_SOP_POP_32_U_10_12, 39)
ELF_RELOC(R_LARCH_SOP_POP_32_S_10_12, 40)
ELF_RELOC(R_LARCH_SOP_POP_32_S_10_16, 41)
ELF_RELOC(R_LARCH_SOP_POP_32_S_10_16_S2, 42)
ELF_RELOC(R_LARCH_SOP_POP_32_S_5_20, 43)
ELF_RELOC(R_LARCH_SOP_POP_32_S_0_5_10_16_S2, 44)
ELF_RELOC(R_LARCH_SOP_POP_32_S_0_10_10_16_S2, 45)
ELF_RELOC(R_LARCH_SOP_POP_32_U, 46)
ELF_RELOC(R_LARCH_ADD8, 47)
ELF_RELOC(R_LARCH_ADD16, 48)
ELF_RELOC(R_LARCH_ADD24, 49)
ELF_RELOC(R_LARCH_ADD32, 50)
ELF_RELOC(R_LARCH_ADD64, 51)
ELF_RELOC(R_LARCH_SUB8, 52)
ELF_RELOC(R_LARCH_SUB16, 53)
ELF_RELOC(R_LARCH_SUB24, 54)
ELF_RELOC(R_LARCH_SUB32, 55)
ELF_RELOC(R_LARCH_SUB64, 56)
ELF_RELOC(R_LARCH_GNU_VTINHERIT, 57)
ELF_RELOC(R_LARCH_GNU_VTENTRY, 58)
// Relocs whose processing do not require a stack machine.
//
// Spec addition: https://github.com/loongson/LoongArch-Documentation/pull/57
// Binutils commit 6d13722a97cee3fd397e116bde3bcedbb1e220be
// and commit 9801120721c3a702ce3bd50433ef920f92a83502
ELF_RELOC(R_LARCH_B16, 64)
ELF_RELOC(R_LARCH_B21, 65)
ELF_RELOC(R_LARCH_B26, 66)
ELF_RELOC(R_LARCH_ABS_HI20, 67)
ELF_RELOC(R_LARCH_ABS_LO12, 68)
ELF_RELOC(R_LARCH_ABS64_LO20, 69)
ELF_RELOC(R_LARCH_ABS64_HI12, 70)
ELF_RELOC(R_LARCH_PCALA_HI20, 71)
ELF_RELOC(R_LARCH_PCALA_LO12, 72)
ELF_RELOC(R_LARCH_PCALA64_LO20, 73)
ELF_RELOC(R_LARCH_PCALA64_HI12, 74)
ELF_RELOC(R_LARCH_GOT_PC_HI20, 75)
ELF_RELOC(R_LARCH_GOT_PC_LO12, 76)
ELF_RELOC(R_LARCH_GOT64_PC_LO20, 77)
ELF_RELOC(R_LARCH_GOT64_PC_HI12, 78)
ELF_RELOC(R_LARCH_GOT_HI20, 79)
ELF_RELOC(R_LARCH_GOT_LO12, 80)
ELF_RELOC(R_LARCH_GOT64_LO20, 81)
ELF_RELOC(R_LARCH_GOT64_HI12, 82)
ELF_RELOC(R_LARCH_TLS_LE_HI20, 83)
ELF_RELOC(R_LARCH_TLS_LE_LO12, 84)
ELF_RELOC(R_LARCH_TLS_LE64_LO20, 85)
ELF_RELOC(R_LARCH_TLS_LE64_HI12, 86)
ELF_RELOC(R_LARCH_TLS_IE_PC_HI20, 87)
ELF_RELOC(R_LARCH_TLS_IE_PC_LO12, 88)
ELF_RELOC(R_LARCH_TLS_IE64_PC_LO20, 89)
ELF_RELOC(R_LARCH_TLS_IE64_PC_HI12, 90)
ELF_RELOC(R_LARCH_TLS_IE_HI20, 91)
ELF_RELOC(R_LARCH_TLS_IE_LO12, 92)
ELF_RELOC(R_LARCH_TLS_IE64_LO20, 93)
ELF_RELOC(R_LARCH_TLS_IE64_HI12, 94)
ELF_RELOC(R_LARCH_TLS_LD_PC_HI20, 95)
ELF_RELOC(R_LARCH_TLS_LD_HI20, 96)
ELF_RELOC(R_LARCH_TLS_GD_PC_HI20, 97)
ELF_RELOC(R_LARCH_TLS_GD_HI20, 98)
ELF_RELOC(R_LARCH_32_PCREL, 99)
ELF_RELOC(R_LARCH_RELAX, 100)
// Relocs added in ELF for the LoongArch™ Architecture v20230519, part of the
// v2.10 LoongArch ABI specs.
//
// Spec addition: https://github.com/loongson/la-abi-specs/pull/1
// Binutils commit 57a930e3bfe4b2c7fd6463ed39311e1938513138
ELF_RELOC(R_LARCH_DELETE, 101)
ELF_RELOC(R_LARCH_ALIGN, 102)
ELF_RELOC(R_LARCH_PCREL20_S2, 103)
ELF_RELOC(R_LARCH_CFA, 104)
ELF_RELOC(R_LARCH_ADD6, 105)
ELF_RELOC(R_LARCH_SUB6, 106)
ELF_RELOC(R_LARCH_ADD_ULEB128, 107)
ELF_RELOC(R_LARCH_SUB_ULEB128, 108)
ELF_RELOC(R_LARCH_64_PCREL, 109)
PK hwFZx0ŖK3 K3 " BinaryFormat/ELFRelocs/AArch64.defnu �[���
#ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
// Based on ABI release 1.1-beta, dated 6 November 2013. NB: The cover page of
// this document, IHI0056C_beta_aaelf64.pdf, on infocenter.arm.com, still
// labels this as release 1.0.
ELF_RELOC(R_AARCH64_NONE, 0)
ELF_RELOC(R_AARCH64_ABS64, 0x101)
ELF_RELOC(R_AARCH64_ABS32, 0x102)
ELF_RELOC(R_AARCH64_ABS16, 0x103)
ELF_RELOC(R_AARCH64_PREL64, 0x104)
ELF_RELOC(R_AARCH64_PREL32, 0x105)
ELF_RELOC(R_AARCH64_PREL16, 0x106)
ELF_RELOC(R_AARCH64_MOVW_UABS_G0, 0x107)
ELF_RELOC(R_AARCH64_MOVW_UABS_G0_NC, 0x108)
ELF_RELOC(R_AARCH64_MOVW_UABS_G1, 0x109)
ELF_RELOC(R_AARCH64_MOVW_UABS_G1_NC, 0x10a)
ELF_RELOC(R_AARCH64_MOVW_UABS_G2, 0x10b)
ELF_RELOC(R_AARCH64_MOVW_UABS_G2_NC, 0x10c)
ELF_RELOC(R_AARCH64_MOVW_UABS_G3, 0x10d)
ELF_RELOC(R_AARCH64_MOVW_SABS_G0, 0x10e)
ELF_RELOC(R_AARCH64_MOVW_SABS_G1, 0x10f)
ELF_RELOC(R_AARCH64_MOVW_SABS_G2, 0x110)
ELF_RELOC(R_AARCH64_LD_PREL_LO19, 0x111)
ELF_RELOC(R_AARCH64_ADR_PREL_LO21, 0x112)
ELF_RELOC(R_AARCH64_ADR_PREL_PG_HI21, 0x113)
ELF_RELOC(R_AARCH64_ADR_PREL_PG_HI21_NC, 0x114)
ELF_RELOC(R_AARCH64_ADD_ABS_LO12_NC, 0x115)
ELF_RELOC(R_AARCH64_LDST8_ABS_LO12_NC, 0x116)
ELF_RELOC(R_AARCH64_TSTBR14, 0x117)
ELF_RELOC(R_AARCH64_CONDBR19, 0x118)
ELF_RELOC(R_AARCH64_JUMP26, 0x11a)
ELF_RELOC(R_AARCH64_CALL26, 0x11b)
ELF_RELOC(R_AARCH64_LDST16_ABS_LO12_NC, 0x11c)
ELF_RELOC(R_AARCH64_LDST32_ABS_LO12_NC, 0x11d)
ELF_RELOC(R_AARCH64_LDST64_ABS_LO12_NC, 0x11e)
ELF_RELOC(R_AARCH64_MOVW_PREL_G0, 0x11f)
ELF_RELOC(R_AARCH64_MOVW_PREL_G0_NC, 0x120)
ELF_RELOC(R_AARCH64_MOVW_PREL_G1, 0x121)
ELF_RELOC(R_AARCH64_MOVW_PREL_G1_NC, 0x122)
ELF_RELOC(R_AARCH64_MOVW_PREL_G2, 0x123)
ELF_RELOC(R_AARCH64_MOVW_PREL_G2_NC, 0x124)
ELF_RELOC(R_AARCH64_MOVW_PREL_G3, 0x125)
ELF_RELOC(R_AARCH64_LDST128_ABS_LO12_NC, 0x12b)
ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G0, 0x12c)
ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G0_NC, 0x12d)
ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G1, 0x12e)
ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G1_NC, 0x12f)
ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G2, 0x130)
ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G2_NC, 0x131)
ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G3, 0x132)
ELF_RELOC(R_AARCH64_GOTREL64, 0x133)
ELF_RELOC(R_AARCH64_GOTREL32, 0x134)
ELF_RELOC(R_AARCH64_GOT_LD_PREL19, 0x135)
ELF_RELOC(R_AARCH64_LD64_GOTOFF_LO15, 0x136)
ELF_RELOC(R_AARCH64_ADR_GOT_PAGE, 0x137)
ELF_RELOC(R_AARCH64_LD64_GOT_LO12_NC, 0x138)
ELF_RELOC(R_AARCH64_LD64_GOTPAGE_LO15, 0x139)
ELF_RELOC(R_AARCH64_PLT32, 0x13a)
ELF_RELOC(R_AARCH64_TLSGD_ADR_PREL21, 0x200)
ELF_RELOC(R_AARCH64_TLSGD_ADR_PAGE21, 0x201)
ELF_RELOC(R_AARCH64_TLSGD_ADD_LO12_NC, 0x202)
ELF_RELOC(R_AARCH64_TLSGD_MOVW_G1, 0x203)
ELF_RELOC(R_AARCH64_TLSGD_MOVW_G0_NC, 0x204)
ELF_RELOC(R_AARCH64_TLSLD_ADR_PREL21, 0x205)
ELF_RELOC(R_AARCH64_TLSLD_ADR_PAGE21, 0x206)
ELF_RELOC(R_AARCH64_TLSLD_ADD_LO12_NC, 0x207)
ELF_RELOC(R_AARCH64_TLSLD_MOVW_G1, 0x208)
ELF_RELOC(R_AARCH64_TLSLD_MOVW_G0_NC, 0x209)
ELF_RELOC(R_AARCH64_TLSLD_LD_PREL19, 0x20a)
ELF_RELOC(R_AARCH64_TLSLD_MOVW_DTPREL_G2, 0x20b)
ELF_RELOC(R_AARCH64_TLSLD_MOVW_DTPREL_G1, 0x20c)
ELF_RELOC(R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, 0x20d)
ELF_RELOC(R_AARCH64_TLSLD_MOVW_DTPREL_G0, 0x20e)
ELF_RELOC(R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, 0x20f)
ELF_RELOC(R_AARCH64_TLSLD_ADD_DTPREL_HI12, 0x210)
ELF_RELOC(R_AARCH64_TLSLD_ADD_DTPREL_LO12, 0x211)
ELF_RELOC(R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC, 0x212)
ELF_RELOC(R_AARCH64_TLSLD_LDST8_DTPREL_LO12, 0x213)
ELF_RELOC(R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC, 0x214)
ELF_RELOC(R_AARCH64_TLSLD_LDST16_DTPREL_LO12, 0x215)
ELF_RELOC(R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, 0x216)
ELF_RELOC(R_AARCH64_TLSLD_LDST32_DTPREL_LO12, 0x217)
ELF_RELOC(R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, 0x218)
ELF_RELOC(R_AARCH64_TLSLD_LDST64_DTPREL_LO12, 0x219)
ELF_RELOC(R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC, 0x21a)
ELF_RELOC(R_AARCH64_TLSIE_MOVW_GOTTPREL_G1, 0x21b)
ELF_RELOC(R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC, 0x21c)
ELF_RELOC(R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21, 0x21d)
ELF_RELOC(R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC, 0x21e)
ELF_RELOC(R_AARCH64_TLSIE_LD_GOTTPREL_PREL19, 0x21f)
ELF_RELOC(R_AARCH64_TLSLE_MOVW_TPREL_G2, 0x220)
ELF_RELOC(R_AARCH64_TLSLE_MOVW_TPREL_G1, 0x221)
ELF_RELOC(R_AARCH64_TLSLE_MOVW_TPREL_G1_NC, 0x222)
ELF_RELOC(R_AARCH64_TLSLE_MOVW_TPREL_G0, 0x223)
ELF_RELOC(R_AARCH64_TLSLE_MOVW_TPREL_G0_NC, 0x224)
ELF_RELOC(R_AARCH64_TLSLE_ADD_TPREL_HI12, 0x225)
ELF_RELOC(R_AARCH64_TLSLE_ADD_TPREL_LO12, 0x226)
ELF_RELOC(R_AARCH64_TLSLE_ADD_TPREL_LO12_NC, 0x227)
ELF_RELOC(R_AARCH64_TLSLE_LDST8_TPREL_LO12, 0x228)
ELF_RELOC(R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC, 0x229)
ELF_RELOC(R_AARCH64_TLSLE_LDST16_TPREL_LO12, 0x22a)
ELF_RELOC(R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC, 0x22b)
ELF_RELOC(R_AARCH64_TLSLE_LDST32_TPREL_LO12, 0x22c)
ELF_RELOC(R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC, 0x22d)
ELF_RELOC(R_AARCH64_TLSLE_LDST64_TPREL_LO12, 0x22e)
ELF_RELOC(R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC, 0x22f)
ELF_RELOC(R_AARCH64_TLSDESC_LD_PREL19, 0x230)
ELF_RELOC(R_AARCH64_TLSDESC_ADR_PREL21, 0x231)
ELF_RELOC(R_AARCH64_TLSDESC_ADR_PAGE21, 0x232)
ELF_RELOC(R_AARCH64_TLSDESC_LD64_LO12, 0x233)
ELF_RELOC(R_AARCH64_TLSDESC_ADD_LO12, 0x234)
ELF_RELOC(R_AARCH64_TLSDESC_OFF_G1, 0x235)
ELF_RELOC(R_AARCH64_TLSDESC_OFF_G0_NC, 0x236)
ELF_RELOC(R_AARCH64_TLSDESC_LDR, 0x237)
ELF_RELOC(R_AARCH64_TLSDESC_ADD, 0x238)
ELF_RELOC(R_AARCH64_TLSDESC_CALL, 0x239)
ELF_RELOC(R_AARCH64_TLSLE_LDST128_TPREL_LO12, 0x23a)
ELF_RELOC(R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC, 0x23b)
ELF_RELOC(R_AARCH64_TLSLD_LDST128_DTPREL_LO12, 0x23c)
ELF_RELOC(R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NC, 0x23d)
// Dynamic relocations start
ELF_RELOC(R_AARCH64_COPY, 0x400)
ELF_RELOC(R_AARCH64_GLOB_DAT, 0x401)
ELF_RELOC(R_AARCH64_JUMP_SLOT, 0x402)
ELF_RELOC(R_AARCH64_RELATIVE, 0x403)
// 0x404 and 0x405 are now R_AARCH64_TLS_IMPDEF1 and R_AARCH64_TLS_IMPDEF2
// We follow GNU and define TLS_IMPDEF1 as TLS_DTPMOD64 and TLS_IMPDEF2 as
// TLS_DTPREL64
ELF_RELOC(R_AARCH64_TLS_DTPMOD64, 0x404)
ELF_RELOC(R_AARCH64_TLS_DTPREL64, 0x405)
ELF_RELOC(R_AARCH64_TLS_TPREL64, 0x406)
ELF_RELOC(R_AARCH64_TLSDESC, 0x407)
ELF_RELOC(R_AARCH64_IRELATIVE, 0x408)
// ELF_RELOC(R_AARCH64_P32_NONE, 0)
ELF_RELOC(R_AARCH64_P32_ABS32, 0x001)
ELF_RELOC(R_AARCH64_P32_ABS16, 0x002)
ELF_RELOC(R_AARCH64_P32_PREL32, 0x003)
ELF_RELOC(R_AARCH64_P32_PREL16, 0x004)
ELF_RELOC(R_AARCH64_P32_MOVW_UABS_G0, 0x005)
ELF_RELOC(R_AARCH64_P32_MOVW_UABS_G0_NC, 0x006)
ELF_RELOC(R_AARCH64_P32_MOVW_UABS_G1, 0x007)
ELF_RELOC(R_AARCH64_P32_MOVW_SABS_G0, 0x008)
ELF_RELOC(R_AARCH64_P32_LD_PREL_LO19, 0x009)
ELF_RELOC(R_AARCH64_P32_ADR_PREL_LO21, 0x00a)
ELF_RELOC(R_AARCH64_P32_ADR_PREL_PG_HI21, 0x00b)
ELF_RELOC(R_AARCH64_P32_ADD_ABS_LO12_NC, 0x00c)
ELF_RELOC(R_AARCH64_P32_LDST8_ABS_LO12_NC, 0x00d)
ELF_RELOC(R_AARCH64_P32_LDST16_ABS_LO12_NC, 0x00e)
ELF_RELOC(R_AARCH64_P32_LDST32_ABS_LO12_NC, 0x00f)
ELF_RELOC(R_AARCH64_P32_LDST64_ABS_LO12_NC, 0x010)
ELF_RELOC(R_AARCH64_P32_LDST128_ABS_LO12_NC, 0x011)
ELF_RELOC(R_AARCH64_P32_TSTBR14, 0x012)
ELF_RELOC(R_AARCH64_P32_CONDBR19, 0x013)
ELF_RELOC(R_AARCH64_P32_JUMP26, 0x014)
ELF_RELOC(R_AARCH64_P32_CALL26, 0x015)
ELF_RELOC(R_AARCH64_P32_MOVW_PREL_G0, 0x016)
ELF_RELOC(R_AARCH64_P32_MOVW_PREL_G0_NC, 0x017)
ELF_RELOC(R_AARCH64_P32_MOVW_PREL_G1, 0x018)
ELF_RELOC(R_AARCH64_P32_GOT_LD_PREL19, 0x019)
ELF_RELOC(R_AARCH64_P32_ADR_GOT_PAGE, 0x01a)
ELF_RELOC(R_AARCH64_P32_LD32_GOT_LO12_NC, 0x01b)
ELF_RELOC(R_AARCH64_P32_LD32_GOTPAGE_LO14, 0x01c)
ELF_RELOC(R_AARCH64_P32_PLT32, 0x01d)
ELF_RELOC(R_AARCH64_P32_TLSGD_ADR_PREL21, 0x050)
ELF_RELOC(R_AARCH64_P32_TLSGD_ADR_PAGE21, 0x051)
ELF_RELOC(R_AARCH64_P32_TLSGD_ADD_LO12_NC, 0x052)
ELF_RELOC(R_AARCH64_P32_TLSLD_ADR_PREL21, 0x053)
ELF_RELOC(R_AARCH64_P32_TLSLD_ADR_PAGE21, 0x054)
ELF_RELOC(R_AARCH64_P32_TLSLD_ADD_LO12_NC, 0x055)
ELF_RELOC(R_AARCH64_P32_TLSLD_LD_PREL19, 0x056)
ELF_RELOC(R_AARCH64_P32_TLSLD_MOVW_DTPREL_G1, 0x057)
ELF_RELOC(R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0, 0x058)
ELF_RELOC(R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0_NC, 0x059)
ELF_RELOC(R_AARCH64_P32_TLSLD_ADD_DTPREL_HI12, 0x05a)
ELF_RELOC(R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12, 0x05b)
ELF_RELOC(R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC, 0x05c)
ELF_RELOC(R_AARCH64_P32_TLSLD_LDST8_DTPREL_LO12, 0x05d)
ELF_RELOC(R_AARCH64_P32_TLSLD_LDST8_DTPREL_LO12_NC, 0x05e)
ELF_RELOC(R_AARCH64_P32_TLSLD_LDST16_DTPREL_LO12, 0x05f)
ELF_RELOC(R_AARCH64_P32_TLSLD_LDST16_DTPREL_LO12_NC, 0x060)
ELF_RELOC(R_AARCH64_P32_TLSLD_LDST32_DTPREL_LO12, 0x061)
ELF_RELOC(R_AARCH64_P32_TLSLD_LDST32_DTPREL_LO12_NC, 0x062)
ELF_RELOC(R_AARCH64_P32_TLSLD_LDST64_DTPREL_LO12, 0x063)
ELF_RELOC(R_AARCH64_P32_TLSLD_LDST64_DTPREL_LO12_NC, 0x064)
ELF_RELOC(R_AARCH64_P32_TLSLD_LDST128_DTPREL_LO12, 0x065)
ELF_RELOC(R_AARCH64_P32_TLSLD_LDST128_DTPREL_LO12_NC,0x066)
ELF_RELOC(R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21, 0x067)
ELF_RELOC(R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC, 0x068)
ELF_RELOC(R_AARCH64_P32_TLSIE_LD_GOTTPREL_PREL19, 0x069)
ELF_RELOC(R_AARCH64_P32_TLSLE_MOVW_TPREL_G1, 0x06a)
ELF_RELOC(R_AARCH64_P32_TLSLE_MOVW_TPREL_G0, 0x06b)
ELF_RELOC(R_AARCH64_P32_TLSLE_MOVW_TPREL_G0_NC, 0x06c)
ELF_RELOC(R_AARCH64_P32_TLSLE_ADD_TPREL_HI12, 0x06d)
ELF_RELOC(R_AARCH64_P32_TLSLE_ADD_TPREL_LO12, 0x06e)
ELF_RELOC(R_AARCH64_P32_TLSLE_ADD_TPREL_LO12_NC, 0x06f)
ELF_RELOC(R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12, 0x070)
ELF_RELOC(R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC, 0x071)
ELF_RELOC(R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12, 0x072)
ELF_RELOC(R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC, 0x073)
ELF_RELOC(R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12, 0x074)
ELF_RELOC(R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC, 0x075)
ELF_RELOC(R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12, 0x076)
ELF_RELOC(R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC, 0x077)
ELF_RELOC(R_AARCH64_P32_TLSLE_LDST128_TPREL_LO12, 0x078)
ELF_RELOC(R_AARCH64_P32_TLSLE_LDST128_TPREL_LO12_NC, 0x079)
ELF_RELOC(R_AARCH64_P32_TLSDESC_LD_PREL19, 0x07a)
ELF_RELOC(R_AARCH64_P32_TLSDESC_ADR_PREL21, 0x07b)
ELF_RELOC(R_AARCH64_P32_TLSDESC_ADR_PAGE21, 0x07c)
ELF_RELOC(R_AARCH64_P32_TLSDESC_LD32_LO12, 0x07d)
ELF_RELOC(R_AARCH64_P32_TLSDESC_ADD_LO12, 0x07e)
ELF_RELOC(R_AARCH64_P32_TLSDESC_CALL, 0x07f)
// Dynamic relocations start
ELF_RELOC(R_AARCH64_P32_COPY, 0x0b4)
ELF_RELOC(R_AARCH64_P32_GLOB_DAT, 0x0b5)
ELF_RELOC(R_AARCH64_P32_JUMP_SLOT, 0x0b6)
ELF_RELOC(R_AARCH64_P32_RELATIVE, 0x0b7)
ELF_RELOC(R_AARCH64_P32_TLS_DTPREL, 0x0b8)
ELF_RELOC(R_AARCH64_P32_TLS_DTPMOD, 0x0b9)
ELF_RELOC(R_AARCH64_P32_TLS_TPREL, 0x0ba)
ELF_RELOC(R_AARCH64_P32_TLSDESC, 0x0bb)
ELF_RELOC(R_AARCH64_P32_IRELATIVE, 0x0bc)
PK hwFZ� BinaryFormat/ELFRelocs/i386.defnu �[���
#ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
// TODO: this is just a subset
ELF_RELOC(R_386_NONE, 0)
ELF_RELOC(R_386_32, 1)
ELF_RELOC(R_386_PC32, 2)
ELF_RELOC(R_386_GOT32, 3)
ELF_RELOC(R_386_PLT32, 4)
ELF_RELOC(R_386_COPY, 5)
ELF_RELOC(R_386_GLOB_DAT, 6)
ELF_RELOC(R_386_JUMP_SLOT, 7)
ELF_RELOC(R_386_RELATIVE, 8)
ELF_RELOC(R_386_GOTOFF, 9)
ELF_RELOC(R_386_GOTPC, 10)
ELF_RELOC(R_386_32PLT, 11)
ELF_RELOC(R_386_TLS_TPOFF, 14)
ELF_RELOC(R_386_TLS_IE, 15)
ELF_RELOC(R_386_TLS_GOTIE, 16)
ELF_RELOC(R_386_TLS_LE, 17)
ELF_RELOC(R_386_TLS_GD, 18)
ELF_RELOC(R_386_TLS_LDM, 19)
ELF_RELOC(R_386_16, 20)
ELF_RELOC(R_386_PC16, 21)
ELF_RELOC(R_386_8, 22)
ELF_RELOC(R_386_PC8, 23)
ELF_RELOC(R_386_TLS_GD_32, 24)
ELF_RELOC(R_386_TLS_GD_PUSH, 25)
ELF_RELOC(R_386_TLS_GD_CALL, 26)
ELF_RELOC(R_386_TLS_GD_POP, 27)
ELF_RELOC(R_386_TLS_LDM_32, 28)
ELF_RELOC(R_386_TLS_LDM_PUSH, 29)
ELF_RELOC(R_386_TLS_LDM_CALL, 30)
ELF_RELOC(R_386_TLS_LDM_POP, 31)
ELF_RELOC(R_386_TLS_LDO_32, 32)
ELF_RELOC(R_386_TLS_IE_32, 33)
ELF_RELOC(R_386_TLS_LE_32, 34)
ELF_RELOC(R_386_TLS_DTPMOD32, 35)
ELF_RELOC(R_386_TLS_DTPOFF32, 36)
ELF_RELOC(R_386_TLS_TPOFF32, 37)
ELF_RELOC(R_386_TLS_GOTDESC, 39)
ELF_RELOC(R_386_TLS_DESC_CALL, 40)
ELF_RELOC(R_386_TLS_DESC, 41)
ELF_RELOC(R_386_IRELATIVE, 42)
ELF_RELOC(R_386_GOT32X, 43)
PK hwFZTCc � � BinaryFormat/ELFRelocs/RISCV.defnu �[���
#ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
ELF_RELOC(R_RISCV_NONE, 0)
ELF_RELOC(R_RISCV_32, 1)
ELF_RELOC(R_RISCV_64, 2)
ELF_RELOC(R_RISCV_RELATIVE, 3)
ELF_RELOC(R_RISCV_COPY, 4)
ELF_RELOC(R_RISCV_JUMP_SLOT, 5)
ELF_RELOC(R_RISCV_TLS_DTPMOD32, 6)
ELF_RELOC(R_RISCV_TLS_DTPMOD64, 7)
ELF_RELOC(R_RISCV_TLS_DTPREL32, 8)
ELF_RELOC(R_RISCV_TLS_DTPREL64, 9)
ELF_RELOC(R_RISCV_TLS_TPREL32, 10)
ELF_RELOC(R_RISCV_TLS_TPREL64, 11)
ELF_RELOC(R_RISCV_BRANCH, 16)
ELF_RELOC(R_RISCV_JAL, 17)
ELF_RELOC(R_RISCV_CALL, 18)
ELF_RELOC(R_RISCV_CALL_PLT, 19)
ELF_RELOC(R_RISCV_GOT_HI20, 20)
ELF_RELOC(R_RISCV_TLS_GOT_HI20, 21)
ELF_RELOC(R_RISCV_TLS_GD_HI20, 22)
ELF_RELOC(R_RISCV_PCREL_HI20, 23)
ELF_RELOC(R_RISCV_PCREL_LO12_I, 24)
ELF_RELOC(R_RISCV_PCREL_LO12_S, 25)
ELF_RELOC(R_RISCV_HI20, 26)
ELF_RELOC(R_RISCV_LO12_I, 27)
ELF_RELOC(R_RISCV_LO12_S, 28)
ELF_RELOC(R_RISCV_TPREL_HI20, 29)
ELF_RELOC(R_RISCV_TPREL_LO12_I, 30)
ELF_RELOC(R_RISCV_TPREL_LO12_S, 31)
ELF_RELOC(R_RISCV_TPREL_ADD, 32)
ELF_RELOC(R_RISCV_ADD8, 33)
ELF_RELOC(R_RISCV_ADD16, 34)
ELF_RELOC(R_RISCV_ADD32, 35)
ELF_RELOC(R_RISCV_ADD64, 36)
ELF_RELOC(R_RISCV_SUB8, 37)
ELF_RELOC(R_RISCV_SUB16, 38)
ELF_RELOC(R_RISCV_SUB32, 39)
ELF_RELOC(R_RISCV_SUB64, 40)
ELF_RELOC(R_RISCV_GNU_VTINHERIT, 41)
ELF_RELOC(R_RISCV_GNU_VTENTRY, 42)
ELF_RELOC(R_RISCV_ALIGN, 43)
ELF_RELOC(R_RISCV_RVC_BRANCH, 44)
ELF_RELOC(R_RISCV_RVC_JUMP, 45)
ELF_RELOC(R_RISCV_RVC_LUI, 46)
ELF_RELOC(R_RISCV_RELAX, 51)
ELF_RELOC(R_RISCV_SUB6, 52)
ELF_RELOC(R_RISCV_SET6, 53)
ELF_RELOC(R_RISCV_SET8, 54)
ELF_RELOC(R_RISCV_SET16, 55)
ELF_RELOC(R_RISCV_SET32, 56)
ELF_RELOC(R_RISCV_32_PCREL, 57)
ELF_RELOC(R_RISCV_IRELATIVE, 58)
ELF_RELOC(R_RISCV_PLT32, 59)
PK hwFZ�Kzf BinaryFormat/ELFRelocs/BPF.defnu �[��� #ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
// No relocation
ELF_RELOC(R_BPF_NONE, 0)
ELF_RELOC(R_BPF_64_64, 1)
ELF_RELOC(R_BPF_64_ABS64, 2)
ELF_RELOC(R_BPF_64_ABS32, 3)
ELF_RELOC(R_BPF_64_NODYLD32, 4)
ELF_RELOC(R_BPF_64_32, 10)
PK hwFZ��D D BinaryFormat/ELFRelocs/Sparc.defnu �[���
#ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
ELF_RELOC(R_SPARC_NONE, 0)
ELF_RELOC(R_SPARC_8, 1)
ELF_RELOC(R_SPARC_16, 2)
ELF_RELOC(R_SPARC_32, 3)
ELF_RELOC(R_SPARC_DISP8, 4)
ELF_RELOC(R_SPARC_DISP16, 5)
ELF_RELOC(R_SPARC_DISP32, 6)
ELF_RELOC(R_SPARC_WDISP30, 7)
ELF_RELOC(R_SPARC_WDISP22, 8)
ELF_RELOC(R_SPARC_HI22, 9)
ELF_RELOC(R_SPARC_22, 10)
ELF_RELOC(R_SPARC_13, 11)
ELF_RELOC(R_SPARC_LO10, 12)
ELF_RELOC(R_SPARC_GOT10, 13)
ELF_RELOC(R_SPARC_GOT13, 14)
ELF_RELOC(R_SPARC_GOT22, 15)
ELF_RELOC(R_SPARC_PC10, 16)
ELF_RELOC(R_SPARC_PC22, 17)
ELF_RELOC(R_SPARC_WPLT30, 18)
ELF_RELOC(R_SPARC_COPY, 19)
ELF_RELOC(R_SPARC_GLOB_DAT, 20)
ELF_RELOC(R_SPARC_JMP_SLOT, 21)
ELF_RELOC(R_SPARC_RELATIVE, 22)
ELF_RELOC(R_SPARC_UA32, 23)
ELF_RELOC(R_SPARC_PLT32, 24)
ELF_RELOC(R_SPARC_HIPLT22, 25)
ELF_RELOC(R_SPARC_LOPLT10, 26)
ELF_RELOC(R_SPARC_PCPLT32, 27)
ELF_RELOC(R_SPARC_PCPLT22, 28)
ELF_RELOC(R_SPARC_PCPLT10, 29)
ELF_RELOC(R_SPARC_10, 30)
ELF_RELOC(R_SPARC_11, 31)
ELF_RELOC(R_SPARC_64, 32)
ELF_RELOC(R_SPARC_OLO10, 33)
ELF_RELOC(R_SPARC_HH22, 34)
ELF_RELOC(R_SPARC_HM10, 35)
ELF_RELOC(R_SPARC_LM22, 36)
ELF_RELOC(R_SPARC_PC_HH22, 37)
ELF_RELOC(R_SPARC_PC_HM10, 38)
ELF_RELOC(R_SPARC_PC_LM22, 39)
ELF_RELOC(R_SPARC_WDISP16, 40)
ELF_RELOC(R_SPARC_WDISP19, 41)
ELF_RELOC(R_SPARC_7, 43)
ELF_RELOC(R_SPARC_5, 44)
ELF_RELOC(R_SPARC_6, 45)
ELF_RELOC(R_SPARC_DISP64, 46)
ELF_RELOC(R_SPARC_PLT64, 47)
ELF_RELOC(R_SPARC_HIX22, 48)
ELF_RELOC(R_SPARC_LOX10, 49)
ELF_RELOC(R_SPARC_H44, 50)
ELF_RELOC(R_SPARC_M44, 51)
ELF_RELOC(R_SPARC_L44, 52)
ELF_RELOC(R_SPARC_REGISTER, 53)
ELF_RELOC(R_SPARC_UA64, 54)
ELF_RELOC(R_SPARC_UA16, 55)
ELF_RELOC(R_SPARC_TLS_GD_HI22, 56)
ELF_RELOC(R_SPARC_TLS_GD_LO10, 57)
ELF_RELOC(R_SPARC_TLS_GD_ADD, 58)
ELF_RELOC(R_SPARC_TLS_GD_CALL, 59)
ELF_RELOC(R_SPARC_TLS_LDM_HI22, 60)
ELF_RELOC(R_SPARC_TLS_LDM_LO10, 61)
ELF_RELOC(R_SPARC_TLS_LDM_ADD, 62)
ELF_RELOC(R_SPARC_TLS_LDM_CALL, 63)
ELF_RELOC(R_SPARC_TLS_LDO_HIX22, 64)
ELF_RELOC(R_SPARC_TLS_LDO_LOX10, 65)
ELF_RELOC(R_SPARC_TLS_LDO_ADD, 66)
ELF_RELOC(R_SPARC_TLS_IE_HI22, 67)
ELF_RELOC(R_SPARC_TLS_IE_LO10, 68)
ELF_RELOC(R_SPARC_TLS_IE_LD, 69)
ELF_RELOC(R_SPARC_TLS_IE_LDX, 70)
ELF_RELOC(R_SPARC_TLS_IE_ADD, 71)
ELF_RELOC(R_SPARC_TLS_LE_HIX22, 72)
ELF_RELOC(R_SPARC_TLS_LE_LOX10, 73)
ELF_RELOC(R_SPARC_TLS_DTPMOD32, 74)
ELF_RELOC(R_SPARC_TLS_DTPMOD64, 75)
ELF_RELOC(R_SPARC_TLS_DTPOFF32, 76)
ELF_RELOC(R_SPARC_TLS_DTPOFF64, 77)
ELF_RELOC(R_SPARC_TLS_TPOFF32, 78)
ELF_RELOC(R_SPARC_TLS_TPOFF64, 79)
ELF_RELOC(R_SPARC_GOTDATA_HIX22, 80)
ELF_RELOC(R_SPARC_GOTDATA_LOX10, 81)
ELF_RELOC(R_SPARC_GOTDATA_OP_HIX22, 82)
ELF_RELOC(R_SPARC_GOTDATA_OP_LOX10, 83)
ELF_RELOC(R_SPARC_GOTDATA_OP, 84)
PK hwFZ/��Q Q BinaryFormat/ELFRelocs/ARM.defnu �[���
#ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
// Meets 2.09 ABI Specs.
ELF_RELOC(R_ARM_NONE, 0x00)
ELF_RELOC(R_ARM_PC24, 0x01)
ELF_RELOC(R_ARM_ABS32, 0x02)
ELF_RELOC(R_ARM_REL32, 0x03)
ELF_RELOC(R_ARM_LDR_PC_G0, 0x04)
ELF_RELOC(R_ARM_ABS16, 0x05)
ELF_RELOC(R_ARM_ABS12, 0x06)
ELF_RELOC(R_ARM_THM_ABS5, 0x07)
ELF_RELOC(R_ARM_ABS8, 0x08)
ELF_RELOC(R_ARM_SBREL32, 0x09)
ELF_RELOC(R_ARM_THM_CALL, 0x0a)
ELF_RELOC(R_ARM_THM_PC8, 0x0b)
ELF_RELOC(R_ARM_BREL_ADJ, 0x0c)
ELF_RELOC(R_ARM_TLS_DESC, 0x0d)
ELF_RELOC(R_ARM_THM_SWI8, 0x0e)
ELF_RELOC(R_ARM_XPC25, 0x0f)
ELF_RELOC(R_ARM_THM_XPC22, 0x10)
ELF_RELOC(R_ARM_TLS_DTPMOD32, 0x11)
ELF_RELOC(R_ARM_TLS_DTPOFF32, 0x12)
ELF_RELOC(R_ARM_TLS_TPOFF32, 0x13)
ELF_RELOC(R_ARM_COPY, 0x14)
ELF_RELOC(R_ARM_GLOB_DAT, 0x15)
ELF_RELOC(R_ARM_JUMP_SLOT, 0x16)
ELF_RELOC(R_ARM_RELATIVE, 0x17)
ELF_RELOC(R_ARM_GOTOFF32, 0x18)
ELF_RELOC(R_ARM_BASE_PREL, 0x19)
ELF_RELOC(R_ARM_GOT_BREL, 0x1a)
ELF_RELOC(R_ARM_PLT32, 0x1b)
ELF_RELOC(R_ARM_CALL, 0x1c)
ELF_RELOC(R_ARM_JUMP24, 0x1d)
ELF_RELOC(R_ARM_THM_JUMP24, 0x1e)
ELF_RELOC(R_ARM_BASE_ABS, 0x1f)
ELF_RELOC(R_ARM_ALU_PCREL_7_0, 0x20)
ELF_RELOC(R_ARM_ALU_PCREL_15_8, 0x21)
ELF_RELOC(R_ARM_ALU_PCREL_23_15, 0x22)
ELF_RELOC(R_ARM_LDR_SBREL_11_0_NC, 0x23)
ELF_RELOC(R_ARM_ALU_SBREL_19_12_NC, 0x24)
ELF_RELOC(R_ARM_ALU_SBREL_27_20_CK, 0x25)
ELF_RELOC(R_ARM_TARGET1, 0x26)
ELF_RELOC(R_ARM_SBREL31, 0x27)
ELF_RELOC(R_ARM_V4BX, 0x28)
ELF_RELOC(R_ARM_TARGET2, 0x29)
ELF_RELOC(R_ARM_PREL31, 0x2a)
ELF_RELOC(R_ARM_MOVW_ABS_NC, 0x2b)
ELF_RELOC(R_ARM_MOVT_ABS, 0x2c)
ELF_RELOC(R_ARM_MOVW_PREL_NC, 0x2d)
ELF_RELOC(R_ARM_MOVT_PREL, 0x2e)
ELF_RELOC(R_ARM_THM_MOVW_ABS_NC, 0x2f)
ELF_RELOC(R_ARM_THM_MOVT_ABS, 0x30)
ELF_RELOC(R_ARM_THM_MOVW_PREL_NC, 0x31)
ELF_RELOC(R_ARM_THM_MOVT_PREL, 0x32)
ELF_RELOC(R_ARM_THM_JUMP19, 0x33)
ELF_RELOC(R_ARM_THM_JUMP6, 0x34)
ELF_RELOC(R_ARM_THM_ALU_PREL_11_0, 0x35)
ELF_RELOC(R_ARM_THM_PC12, 0x36)
ELF_RELOC(R_ARM_ABS32_NOI, 0x37)
ELF_RELOC(R_ARM_REL32_NOI, 0x38)
ELF_RELOC(R_ARM_ALU_PC_G0_NC, 0x39)
ELF_RELOC(R_ARM_ALU_PC_G0, 0x3a)
ELF_RELOC(R_ARM_ALU_PC_G1_NC, 0x3b)
ELF_RELOC(R_ARM_ALU_PC_G1, 0x3c)
ELF_RELOC(R_ARM_ALU_PC_G2, 0x3d)
ELF_RELOC(R_ARM_LDR_PC_G1, 0x3e)
ELF_RELOC(R_ARM_LDR_PC_G2, 0x3f)
ELF_RELOC(R_ARM_LDRS_PC_G0, 0x40)
ELF_RELOC(R_ARM_LDRS_PC_G1, 0x41)
ELF_RELOC(R_ARM_LDRS_PC_G2, 0x42)
ELF_RELOC(R_ARM_LDC_PC_G0, 0x43)
ELF_RELOC(R_ARM_LDC_PC_G1, 0x44)
ELF_RELOC(R_ARM_LDC_PC_G2, 0x45)
ELF_RELOC(R_ARM_ALU_SB_G0_NC, 0x46)
ELF_RELOC(R_ARM_ALU_SB_G0, 0x47)
ELF_RELOC(R_ARM_ALU_SB_G1_NC, 0x48)
ELF_RELOC(R_ARM_ALU_SB_G1, 0x49)
ELF_RELOC(R_ARM_ALU_SB_G2, 0x4a)
ELF_RELOC(R_ARM_LDR_SB_G0, 0x4b)
ELF_RELOC(R_ARM_LDR_SB_G1, 0x4c)
ELF_RELOC(R_ARM_LDR_SB_G2, 0x4d)
ELF_RELOC(R_ARM_LDRS_SB_G0, 0x4e)
ELF_RELOC(R_ARM_LDRS_SB_G1, 0x4f)
ELF_RELOC(R_ARM_LDRS_SB_G2, 0x50)
ELF_RELOC(R_ARM_LDC_SB_G0, 0x51)
ELF_RELOC(R_ARM_LDC_SB_G1, 0x52)
ELF_RELOC(R_ARM_LDC_SB_G2, 0x53)
ELF_RELOC(R_ARM_MOVW_BREL_NC, 0x54)
ELF_RELOC(R_ARM_MOVT_BREL, 0x55)
ELF_RELOC(R_ARM_MOVW_BREL, 0x56)
ELF_RELOC(R_ARM_THM_MOVW_BREL_NC, 0x57)
ELF_RELOC(R_ARM_THM_MOVT_BREL, 0x58)
ELF_RELOC(R_ARM_THM_MOVW_BREL, 0x59)
ELF_RELOC(R_ARM_TLS_GOTDESC, 0x5a)
ELF_RELOC(R_ARM_TLS_CALL, 0x5b)
ELF_RELOC(R_ARM_TLS_DESCSEQ, 0x5c)
ELF_RELOC(R_ARM_THM_TLS_CALL, 0x5d)
ELF_RELOC(R_ARM_PLT32_ABS, 0x5e)
ELF_RELOC(R_ARM_GOT_ABS, 0x5f)
ELF_RELOC(R_ARM_GOT_PREL, 0x60)
ELF_RELOC(R_ARM_GOT_BREL12, 0x61)
ELF_RELOC(R_ARM_GOTOFF12, 0x62)
ELF_RELOC(R_ARM_GOTRELAX, 0x63)
ELF_RELOC(R_ARM_GNU_VTENTRY, 0x64)
ELF_RELOC(R_ARM_GNU_VTINHERIT, 0x65)
ELF_RELOC(R_ARM_THM_JUMP11, 0x66)
ELF_RELOC(R_ARM_THM_JUMP8, 0x67)
ELF_RELOC(R_ARM_TLS_GD32, 0x68)
ELF_RELOC(R_ARM_TLS_LDM32, 0x69)
ELF_RELOC(R_ARM_TLS_LDO32, 0x6a)
ELF_RELOC(R_ARM_TLS_IE32, 0x6b)
ELF_RELOC(R_ARM_TLS_LE32, 0x6c)
ELF_RELOC(R_ARM_TLS_LDO12, 0x6d)
ELF_RELOC(R_ARM_TLS_LE12, 0x6e)
ELF_RELOC(R_ARM_TLS_IE12GP, 0x6f)
ELF_RELOC(R_ARM_PRIVATE_0, 0x70)
ELF_RELOC(R_ARM_PRIVATE_1, 0x71)
ELF_RELOC(R_ARM_PRIVATE_2, 0x72)
ELF_RELOC(R_ARM_PRIVATE_3, 0x73)
ELF_RELOC(R_ARM_PRIVATE_4, 0x74)
ELF_RELOC(R_ARM_PRIVATE_5, 0x75)
ELF_RELOC(R_ARM_PRIVATE_6, 0x76)
ELF_RELOC(R_ARM_PRIVATE_7, 0x77)
ELF_RELOC(R_ARM_PRIVATE_8, 0x78)
ELF_RELOC(R_ARM_PRIVATE_9, 0x79)
ELF_RELOC(R_ARM_PRIVATE_10, 0x7a)
ELF_RELOC(R_ARM_PRIVATE_11, 0x7b)
ELF_RELOC(R_ARM_PRIVATE_12, 0x7c)
ELF_RELOC(R_ARM_PRIVATE_13, 0x7d)
ELF_RELOC(R_ARM_PRIVATE_14, 0x7e)
ELF_RELOC(R_ARM_PRIVATE_15, 0x7f)
ELF_RELOC(R_ARM_ME_TOO, 0x80)
ELF_RELOC(R_ARM_THM_TLS_DESCSEQ16, 0x81)
ELF_RELOC(R_ARM_THM_TLS_DESCSEQ32, 0x82)
ELF_RELOC(R_ARM_THM_ALU_ABS_G0_NC, 0x84)
ELF_RELOC(R_ARM_THM_ALU_ABS_G1_NC, 0x85)
ELF_RELOC(R_ARM_THM_ALU_ABS_G2_NC, 0x86)
ELF_RELOC(R_ARM_THM_ALU_ABS_G3, 0x87)
ELF_RELOC(R_ARM_THM_BF16, 0x88)
ELF_RELOC(R_ARM_THM_BF12, 0x89)
ELF_RELOC(R_ARM_THM_BF18, 0x8a)
ELF_RELOC(R_ARM_IRELATIVE, 0xa0)
PK hwFZ�15~� � BinaryFormat/ELFRelocs/M68k.defnu �[��� #ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
ELF_RELOC(R_68K_NONE, 0) /* No reloc */
ELF_RELOC(R_68K_32, 1) /* Direct 32 bit */
ELF_RELOC(R_68K_16, 2) /* Direct 16 bit */
ELF_RELOC(R_68K_8, 3) /* Direct 8 bit */
ELF_RELOC(R_68K_PC32, 4) /* PC relative 32 bit */
ELF_RELOC(R_68K_PC16, 5) /* PC relative 16 bit */
ELF_RELOC(R_68K_PC8, 6) /* PC relative 8 bit */
ELF_RELOC(R_68K_GOTPCREL32, 7) /* 32 bit PC relative GOT entry */
ELF_RELOC(R_68K_GOTPCREL16, 8) /* 16 bit PC relative GOT entry */
ELF_RELOC(R_68K_GOTPCREL8, 9) /* 8 bit PC relative GOT entry */
ELF_RELOC(R_68K_GOTOFF32, 10) /* 32 bit GOT offset */
ELF_RELOC(R_68K_GOTOFF16, 11) /* 16 bit GOT offset */
ELF_RELOC(R_68K_GOTOFF8, 12) /* 8 bit GOT offset */
ELF_RELOC(R_68K_PLT32, 13) /* 32 bit PC relative PLT address */
ELF_RELOC(R_68K_PLT16, 14) /* 16 bit PC relative PLT address */
ELF_RELOC(R_68K_PLT8, 15) /* 8 bit PC relative PLT address */
ELF_RELOC(R_68K_PLTOFF32, 16) /* 32 bit PLT offset */
ELF_RELOC(R_68K_PLTOFF16, 17) /* 16 bit PLT offset */
ELF_RELOC(R_68K_PLTOFF8, 18) /* 8 bit PLT offset */
ELF_RELOC(R_68K_COPY, 19) /* Copy symbol at runtime */
ELF_RELOC(R_68K_GLOB_DAT, 20) /* Create GOT entry */
ELF_RELOC(R_68K_JMP_SLOT, 21) /* Create PLT entry */
ELF_RELOC(R_68K_RELATIVE, 22) /* Adjust by program base */
/* These are GNU extensions to enable C++ vtable garbage collection. */
ELF_RELOC(R_68K_GNU_VTINHERIT, 23)
ELF_RELOC(R_68K_GNU_VTENTRY, 24)
/* TLS static relocations. */
ELF_RELOC(R_68K_TLS_GD32, 25)
ELF_RELOC(R_68K_TLS_GD16, 26)
ELF_RELOC(R_68K_TLS_GD8, 27)
ELF_RELOC(R_68K_TLS_LDM32, 28)
ELF_RELOC(R_68K_TLS_LDM16, 29)
ELF_RELOC(R_68K_TLS_LDM8, 30)
ELF_RELOC(R_68K_TLS_LDO32, 31)
ELF_RELOC(R_68K_TLS_LDO16, 32)
ELF_RELOC(R_68K_TLS_LDO8, 33)
ELF_RELOC(R_68K_TLS_IE32, 34)
ELF_RELOC(R_68K_TLS_IE16, 35)
ELF_RELOC(R_68K_TLS_IE8, 36)
ELF_RELOC(R_68K_TLS_LE32, 37)
ELF_RELOC(R_68K_TLS_LE16, 38)
ELF_RELOC(R_68K_TLS_LE8, 39)
ELF_RELOC(R_68K_TLS_DTPMOD32, 40)
ELF_RELOC(R_68K_TLS_DTPREL32, 41)
ELF_RELOC(R_68K_TLS_TPREL32, 42)
PK hwFZK
�1� � BinaryFormat/ELFRelocs/ARC.defnu �[���
#ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
ELF_RELOC(R_ARC_NONE, 0)
ELF_RELOC(R_ARC_8, 1)
ELF_RELOC(R_ARC_16, 2)
ELF_RELOC(R_ARC_24, 3)
ELF_RELOC(R_ARC_32, 4)
ELF_RELOC(R_ARC_N8, 8)
ELF_RELOC(R_ARC_N16, 9)
ELF_RELOC(R_ARC_N24, 10)
ELF_RELOC(R_ARC_N32, 11)
ELF_RELOC(R_ARC_SDA, 12)
ELF_RELOC(R_ARC_SECTOFF, 13)
ELF_RELOC(R_ARC_S21H_PCREL, 14)
ELF_RELOC(R_ARC_S21W_PCREL, 15)
ELF_RELOC(R_ARC_S25H_PCREL, 16)
ELF_RELOC(R_ARC_S25W_PCREL, 17)
ELF_RELOC(R_ARC_SDA32, 18)
ELF_RELOC(R_ARC_SDA_LDST, 19)
ELF_RELOC(R_ARC_SDA_LDST1, 20)
ELF_RELOC(R_ARC_SDA_LDST2, 21)
ELF_RELOC(R_ARC_SDA16_LD, 22)
ELF_RELOC(R_ARC_SDA16_LD1, 23)
ELF_RELOC(R_ARC_SDA16_LD2, 24)
ELF_RELOC(R_ARC_S13_PCREL, 25)
ELF_RELOC(R_ARC_W, 26)
ELF_RELOC(R_ARC_32_ME, 27)
ELF_RELOC(R_ARC_32_ME_S, 105)
ELF_RELOC(R_ARC_N32_ME, 28)
ELF_RELOC(R_ARC_SECTOFF_ME, 29)
ELF_RELOC(R_ARC_SDA32_ME, 30)
ELF_RELOC(R_ARC_W_ME, 31)
ELF_RELOC(R_AC_SECTOFF_U8, 35)
ELF_RELOC(R_AC_SECTOFF_U8_1, 36)
ELF_RELOC(R_AC_SECTOFF_U8_2, 37)
ELF_RELOC(R_AC_SECTOFF_S9, 38)
ELF_RELOC(R_AC_SECTOFF_S9_1, 39)
ELF_RELOC(R_AC_SECTOFF_S9_2, 40)
ELF_RELOC(R_ARC_SECTOFF_ME_1, 41)
ELF_RELOC(R_ARC_SECTOFF_ME_2, 42)
ELF_RELOC(R_ARC_SECTOFF_1, 43)
ELF_RELOC(R_ARC_SECTOFF_2, 44)
ELF_RELOC(R_ARC_SDA_12, 45)
ELF_RELOC(R_ARC_SDA16_ST2, 48)
ELF_RELOC(R_ARC_32_PCREL, 49)
ELF_RELOC(R_ARC_PC32, 50)
ELF_RELOC(R_ARC_GOT32, 59)
ELF_RELOC(R_ARC_GOTPC32, 51)
ELF_RELOC(R_ARC_PLT32, 52)
ELF_RELOC(R_ARC_COPY, 53)
ELF_RELOC(R_ARC_GLOB_DAT, 54)
ELF_RELOC(R_ARC_JMP_SLOT, 55)
ELF_RELOC(R_ARC_RELATIVE, 56)
ELF_RELOC(R_ARC_GOTOFF, 57)
ELF_RELOC(R_ARC_GOTPC, 58)
ELF_RELOC(R_ARC_S21W_PCREL_PLT, 60)
ELF_RELOC(R_ARC_S25H_PCREL_PLT, 61)
ELF_RELOC(R_ARC_JLI_SECTOFF, 63)
ELF_RELOC(R_ARC_TLS_DTPMOD, 66)
ELF_RELOC(R_ARC_TLS_TPOFF, 68)
ELF_RELOC(R_ARC_TLS_GD_GOT, 69)
ELF_RELOC(R_ARC_TLS_GD_LD, 70)
ELF_RELOC(R_ARC_TLS_GD_CALL, 71)
ELF_RELOC(R_ARC_TLS_IE_GOT, 72)
ELF_RELOC(R_ARC_TLS_DTPOFF, 67)
ELF_RELOC(R_ARC_TLS_DTPOFF_S9, 73)
ELF_RELOC(R_ARC_TLS_LE_S9, 74)
ELF_RELOC(R_ARC_TLS_LE_32, 75)
ELF_RELOC(R_ARC_S25W_PCREL_PLT, 76)
ELF_RELOC(R_ARC_S21H_PCREL_PLT, 77)
ELF_RELOC(R_ARC_NPS_CMEM16, 78)
PK hwFZ��1g� � ! BinaryFormat/ELFRelocs/x86_64.defnu �[���
#ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
ELF_RELOC(R_X86_64_NONE, 0)
ELF_RELOC(R_X86_64_64, 1)
ELF_RELOC(R_X86_64_PC32, 2)
ELF_RELOC(R_X86_64_GOT32, 3)
ELF_RELOC(R_X86_64_PLT32, 4)
ELF_RELOC(R_X86_64_COPY, 5)
ELF_RELOC(R_X86_64_GLOB_DAT, 6)
ELF_RELOC(R_X86_64_JUMP_SLOT, 7)
ELF_RELOC(R_X86_64_RELATIVE, 8)
ELF_RELOC(R_X86_64_GOTPCREL, 9)
ELF_RELOC(R_X86_64_32, 10)
ELF_RELOC(R_X86_64_32S, 11)
ELF_RELOC(R_X86_64_16, 12)
ELF_RELOC(R_X86_64_PC16, 13)
ELF_RELOC(R_X86_64_8, 14)
ELF_RELOC(R_X86_64_PC8, 15)
ELF_RELOC(R_X86_64_DTPMOD64, 16)
ELF_RELOC(R_X86_64_DTPOFF64, 17)
ELF_RELOC(R_X86_64_TPOFF64, 18)
ELF_RELOC(R_X86_64_TLSGD, 19)
ELF_RELOC(R_X86_64_TLSLD, 20)
ELF_RELOC(R_X86_64_DTPOFF32, 21)
ELF_RELOC(R_X86_64_GOTTPOFF, 22)
ELF_RELOC(R_X86_64_TPOFF32, 23)
ELF_RELOC(R_X86_64_PC64, 24)
ELF_RELOC(R_X86_64_GOTOFF64, 25)
ELF_RELOC(R_X86_64_GOTPC32, 26)
ELF_RELOC(R_X86_64_GOT64, 27)
ELF_RELOC(R_X86_64_GOTPCREL64, 28)
ELF_RELOC(R_X86_64_GOTPC64, 29)
ELF_RELOC(R_X86_64_GOTPLT64, 30)
ELF_RELOC(R_X86_64_PLTOFF64, 31)
ELF_RELOC(R_X86_64_SIZE32, 32)
ELF_RELOC(R_X86_64_SIZE64, 33)
ELF_RELOC(R_X86_64_GOTPC32_TLSDESC, 34)
ELF_RELOC(R_X86_64_TLSDESC_CALL, 35)
ELF_RELOC(R_X86_64_TLSDESC, 36)
ELF_RELOC(R_X86_64_IRELATIVE, 37)
ELF_RELOC(R_X86_64_GOTPCRELX, 41)
ELF_RELOC(R_X86_64_REX_GOTPCRELX, 42)
PK hwFZ{���� � BinaryFormat/ELFRelocs/Mips.defnu �[���
#ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
ELF_RELOC(R_MIPS_NONE, 0)
ELF_RELOC(R_MIPS_16, 1)
ELF_RELOC(R_MIPS_32, 2)
ELF_RELOC(R_MIPS_REL32, 3)
ELF_RELOC(R_MIPS_26, 4)
ELF_RELOC(R_MIPS_HI16, 5)
ELF_RELOC(R_MIPS_LO16, 6)
ELF_RELOC(R_MIPS_GPREL16, 7)
ELF_RELOC(R_MIPS_LITERAL, 8)
ELF_RELOC(R_MIPS_GOT16, 9)
ELF_RELOC(R_MIPS_PC16, 10)
ELF_RELOC(R_MIPS_CALL16, 11)
ELF_RELOC(R_MIPS_GPREL32, 12)
ELF_RELOC(R_MIPS_UNUSED1, 13)
ELF_RELOC(R_MIPS_UNUSED2, 14)
ELF_RELOC(R_MIPS_UNUSED3, 15)
ELF_RELOC(R_MIPS_SHIFT5, 16)
ELF_RELOC(R_MIPS_SHIFT6, 17)
ELF_RELOC(R_MIPS_64, 18)
ELF_RELOC(R_MIPS_GOT_DISP, 19)
ELF_RELOC(R_MIPS_GOT_PAGE, 20)
ELF_RELOC(R_MIPS_GOT_OFST, 21)
ELF_RELOC(R_MIPS_GOT_HI16, 22)
ELF_RELOC(R_MIPS_GOT_LO16, 23)
ELF_RELOC(R_MIPS_SUB, 24)
ELF_RELOC(R_MIPS_INSERT_A, 25)
ELF_RELOC(R_MIPS_INSERT_B, 26)
ELF_RELOC(R_MIPS_DELETE, 27)
ELF_RELOC(R_MIPS_HIGHER, 28)
ELF_RELOC(R_MIPS_HIGHEST, 29)
ELF_RELOC(R_MIPS_CALL_HI16, 30)
ELF_RELOC(R_MIPS_CALL_LO16, 31)
ELF_RELOC(R_MIPS_SCN_DISP, 32)
ELF_RELOC(R_MIPS_REL16, 33)
ELF_RELOC(R_MIPS_ADD_IMMEDIATE, 34)
ELF_RELOC(R_MIPS_PJUMP, 35)
ELF_RELOC(R_MIPS_RELGOT, 36)
ELF_RELOC(R_MIPS_JALR, 37)
ELF_RELOC(R_MIPS_TLS_DTPMOD32, 38)
ELF_RELOC(R_MIPS_TLS_DTPREL32, 39)
ELF_RELOC(R_MIPS_TLS_DTPMOD64, 40)
ELF_RELOC(R_MIPS_TLS_DTPREL64, 41)
ELF_RELOC(R_MIPS_TLS_GD, 42)
ELF_RELOC(R_MIPS_TLS_LDM, 43)
ELF_RELOC(R_MIPS_TLS_DTPREL_HI16, 44)
ELF_RELOC(R_MIPS_TLS_DTPREL_LO16, 45)
ELF_RELOC(R_MIPS_TLS_GOTTPREL, 46)
ELF_RELOC(R_MIPS_TLS_TPREL32, 47)
ELF_RELOC(R_MIPS_TLS_TPREL64, 48)
ELF_RELOC(R_MIPS_TLS_TPREL_HI16, 49)
ELF_RELOC(R_MIPS_TLS_TPREL_LO16, 50)
ELF_RELOC(R_MIPS_GLOB_DAT, 51)
ELF_RELOC(R_MIPS_PC21_S2, 60)
ELF_RELOC(R_MIPS_PC26_S2, 61)
ELF_RELOC(R_MIPS_PC18_S3, 62)
ELF_RELOC(R_MIPS_PC19_S2, 63)
ELF_RELOC(R_MIPS_PCHI16, 64)
ELF_RELOC(R_MIPS_PCLO16, 65)
ELF_RELOC(R_MIPS16_26, 100)
ELF_RELOC(R_MIPS16_GPREL, 101)
ELF_RELOC(R_MIPS16_GOT16, 102)
ELF_RELOC(R_MIPS16_CALL16, 103)
ELF_RELOC(R_MIPS16_HI16, 104)
ELF_RELOC(R_MIPS16_LO16, 105)
ELF_RELOC(R_MIPS16_TLS_GD, 106)
ELF_RELOC(R_MIPS16_TLS_LDM, 107)
ELF_RELOC(R_MIPS16_TLS_DTPREL_HI16, 108)
ELF_RELOC(R_MIPS16_TLS_DTPREL_LO16, 109)
ELF_RELOC(R_MIPS16_TLS_GOTTPREL, 110)
ELF_RELOC(R_MIPS16_TLS_TPREL_HI16, 111)
ELF_RELOC(R_MIPS16_TLS_TPREL_LO16, 112)
ELF_RELOC(R_MIPS_COPY, 126)
ELF_RELOC(R_MIPS_JUMP_SLOT, 127)
ELF_RELOC(R_MICROMIPS_26_S1, 133)
ELF_RELOC(R_MICROMIPS_HI16, 134)
ELF_RELOC(R_MICROMIPS_LO16, 135)
ELF_RELOC(R_MICROMIPS_GPREL16, 136)
ELF_RELOC(R_MICROMIPS_LITERAL, 137)
ELF_RELOC(R_MICROMIPS_GOT16, 138)
ELF_RELOC(R_MICROMIPS_PC7_S1, 139)
ELF_RELOC(R_MICROMIPS_PC10_S1, 140)
ELF_RELOC(R_MICROMIPS_PC16_S1, 141)
ELF_RELOC(R_MICROMIPS_CALL16, 142)
ELF_RELOC(R_MICROMIPS_GOT_DISP, 145)
ELF_RELOC(R_MICROMIPS_GOT_PAGE, 146)
ELF_RELOC(R_MICROMIPS_GOT_OFST, 147)
ELF_RELOC(R_MICROMIPS_GOT_HI16, 148)
ELF_RELOC(R_MICROMIPS_GOT_LO16, 149)
ELF_RELOC(R_MICROMIPS_SUB, 150)
ELF_RELOC(R_MICROMIPS_HIGHER, 151)
ELF_RELOC(R_MICROMIPS_HIGHEST, 152)
ELF_RELOC(R_MICROMIPS_CALL_HI16, 153)
ELF_RELOC(R_MICROMIPS_CALL_LO16, 154)
ELF_RELOC(R_MICROMIPS_SCN_DISP, 155)
ELF_RELOC(R_MICROMIPS_JALR, 156)
ELF_RELOC(R_MICROMIPS_HI0_LO16, 157)
ELF_RELOC(R_MICROMIPS_TLS_GD, 162)
ELF_RELOC(R_MICROMIPS_TLS_LDM, 163)
ELF_RELOC(R_MICROMIPS_TLS_DTPREL_HI16, 164)
ELF_RELOC(R_MICROMIPS_TLS_DTPREL_LO16, 165)
ELF_RELOC(R_MICROMIPS_TLS_GOTTPREL, 166)
ELF_RELOC(R_MICROMIPS_TLS_TPREL_HI16, 169)
ELF_RELOC(R_MICROMIPS_TLS_TPREL_LO16, 170)
ELF_RELOC(R_MICROMIPS_GPREL7_S2, 172)
ELF_RELOC(R_MICROMIPS_PC23_S2, 173)
ELF_RELOC(R_MICROMIPS_PC21_S1, 174)
ELF_RELOC(R_MICROMIPS_PC26_S1, 175)
ELF_RELOC(R_MICROMIPS_PC18_S3, 176)
ELF_RELOC(R_MICROMIPS_PC19_S2, 177)
ELF_RELOC(R_MIPS_NUM, 218)
ELF_RELOC(R_MIPS_PC32, 248)
ELF_RELOC(R_MIPS_EH, 249)
PK hwFZ�!�� � BinaryFormat/ELFRelocs/VE.defnu �[���
#ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
// Relocation types defined in following documents.
//
// - System V Application Binary Interface - VE Architecture
// Processor Supplement
// - ELF Handling For Thread-Local Storage - VE Architecture
// Processor Supplement
ELF_RELOC(R_VE_NONE, 0)
ELF_RELOC(R_VE_REFLONG, 1)
ELF_RELOC(R_VE_REFQUAD, 2)
ELF_RELOC(R_VE_SREL32, 3)
ELF_RELOC(R_VE_HI32, 4)
ELF_RELOC(R_VE_LO32, 5)
ELF_RELOC(R_VE_PC_HI32, 6)
ELF_RELOC(R_VE_PC_LO32, 7)
ELF_RELOC(R_VE_GOT32, 8)
ELF_RELOC(R_VE_GOT_HI32, 9)
ELF_RELOC(R_VE_GOT_LO32, 10)
ELF_RELOC(R_VE_GOTOFF32, 11)
ELF_RELOC(R_VE_GOTOFF_HI32, 12)
ELF_RELOC(R_VE_GOTOFF_LO32, 13)
ELF_RELOC(R_VE_PLT32, 14)
ELF_RELOC(R_VE_PLT_HI32, 15)
ELF_RELOC(R_VE_PLT_LO32, 16)
ELF_RELOC(R_VE_RELATIVE, 17)
ELF_RELOC(R_VE_GLOB_DAT, 18)
ELF_RELOC(R_VE_JUMP_SLOT, 19)
ELF_RELOC(R_VE_COPY, 20)
ELF_RELOC(R_VE_DTPMOD64, 22)
ELF_RELOC(R_VE_DTPOFF64, 23)
// ELF_RELOC(R_VE_TPOFF64, 24)
ELF_RELOC(R_VE_TLS_GD_HI32, 25)
ELF_RELOC(R_VE_TLS_GD_LO32, 26)
// ELF_RELOC(R_VE_TLS_LD_HI32, 27)
// ELF_RELOC(R_VE_TLS_LD_LO32, 28)
// ELF_RELOC(R_VE_DTPOFF32, 29)
// ELF_RELOC(R_VE_TLS_IE_HI32, 30)
// ELF_RELOC(R_VE_TLS_IE_LO32, 31)
ELF_RELOC(R_VE_TPOFF_HI32, 32)
ELF_RELOC(R_VE_TPOFF_LO32, 33)
// ELF_RELOC(R_VE_TPOFF32, 34)
ELF_RELOC(R_VE_CALL_HI32, 35)
ELF_RELOC(R_VE_CALL_LO32, 36)
PK hwFZ�)�& & BinaryFormat/ELFRelocs/AVR.defnu �[���
#ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
ELF_RELOC(R_AVR_NONE, 0)
ELF_RELOC(R_AVR_32, 1)
ELF_RELOC(R_AVR_7_PCREL, 2)
ELF_RELOC(R_AVR_13_PCREL, 3)
ELF_RELOC(R_AVR_16, 4)
ELF_RELOC(R_AVR_16_PM, 5)
ELF_RELOC(R_AVR_LO8_LDI, 6)
ELF_RELOC(R_AVR_HI8_LDI, 7)
ELF_RELOC(R_AVR_HH8_LDI, 8)
ELF_RELOC(R_AVR_LO8_LDI_NEG, 9)
ELF_RELOC(R_AVR_HI8_LDI_NEG, 10)
ELF_RELOC(R_AVR_HH8_LDI_NEG, 11)
ELF_RELOC(R_AVR_LO8_LDI_PM, 12)
ELF_RELOC(R_AVR_HI8_LDI_PM, 13)
ELF_RELOC(R_AVR_HH8_LDI_PM, 14)
ELF_RELOC(R_AVR_LO8_LDI_PM_NEG, 15)
ELF_RELOC(R_AVR_HI8_LDI_PM_NEG, 16)
ELF_RELOC(R_AVR_HH8_LDI_PM_NEG, 17)
ELF_RELOC(R_AVR_CALL, 18)
ELF_RELOC(R_AVR_LDI, 19)
ELF_RELOC(R_AVR_6, 20)
ELF_RELOC(R_AVR_6_ADIW, 21)
ELF_RELOC(R_AVR_MS8_LDI, 22)
ELF_RELOC(R_AVR_MS8_LDI_NEG, 23)
ELF_RELOC(R_AVR_LO8_LDI_GS, 24)
ELF_RELOC(R_AVR_HI8_LDI_GS, 25)
ELF_RELOC(R_AVR_8, 26)
ELF_RELOC(R_AVR_8_LO8, 27)
ELF_RELOC(R_AVR_8_HI8, 28)
ELF_RELOC(R_AVR_8_HLO8, 29)
ELF_RELOC(R_AVR_DIFF8, 30)
ELF_RELOC(R_AVR_DIFF16, 31)
ELF_RELOC(R_AVR_DIFF32, 32)
ELF_RELOC(R_AVR_LDS_STS_16, 33)
ELF_RELOC(R_AVR_PORT6, 34)
ELF_RELOC(R_AVR_PORT5, 35)
PK hwFZh6& Q Q ! BinaryFormat/ELFRelocs/AMDGPU.defnu �[��� #ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
ELF_RELOC(R_AMDGPU_NONE, 0)
ELF_RELOC(R_AMDGPU_ABS32_LO, 1)
ELF_RELOC(R_AMDGPU_ABS32_HI, 2)
ELF_RELOC(R_AMDGPU_ABS64, 3)
ELF_RELOC(R_AMDGPU_REL32, 4)
ELF_RELOC(R_AMDGPU_REL64, 5)
ELF_RELOC(R_AMDGPU_ABS32, 6)
ELF_RELOC(R_AMDGPU_GOTPCREL, 7)
ELF_RELOC(R_AMDGPU_GOTPCREL32_LO, 8)
ELF_RELOC(R_AMDGPU_GOTPCREL32_HI, 9)
ELF_RELOC(R_AMDGPU_REL32_LO, 10)
ELF_RELOC(R_AMDGPU_REL32_HI, 11)
ELF_RELOC(R_AMDGPU_RELATIVE64, 13)
ELF_RELOC(R_AMDGPU_REL16, 14)
PK hwFZ��_d d " BinaryFormat/ELFRelocs/PowerPC.defnu �[���
#ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
// glibc's PowerPC asm/sigcontext.h, when compiling for PPC64, has the
// unfortunate behavior of including asm/elf.h, which defines R_PPC_NONE, etc.
// to their corresponding integer values. As a result, we need to undef them
// here before continuing.
#undef R_PPC_NONE
#undef R_PPC_ADDR32
#undef R_PPC_ADDR24
#undef R_PPC_ADDR16
#undef R_PPC_ADDR16_LO
#undef R_PPC_ADDR16_HI
#undef R_PPC_ADDR16_HA
#undef R_PPC_ADDR14
#undef R_PPC_ADDR14_BRTAKEN
#undef R_PPC_ADDR14_BRNTAKEN
#undef R_PPC_REL24
#undef R_PPC_REL14
#undef R_PPC_REL14_BRTAKEN
#undef R_PPC_REL14_BRNTAKEN
#undef R_PPC_GOT16
#undef R_PPC_GOT16_LO
#undef R_PPC_GOT16_HI
#undef R_PPC_GOT16_HA
#undef R_PPC_PLTREL24
#undef R_PPC_COPY
#undef R_PPC_GLOB_DAT
#undef R_PPC_JMP_SLOT
#undef R_PPC_RELATIVE
#undef R_PPC_LOCAL24PC
#undef R_PPC_UADDR32
#undef R_PPC_UADDR16
#undef R_PPC_REL32
#undef R_PPC_PLT32
#undef R_PPC_PLTREL32
#undef R_PPC_PLT16_LO
#undef R_PPC_PLT16_HI
#undef R_PPC_PLT16_HA
#undef R_PPC_SDAREL16
#undef R_PPC_SECTOFF
#undef R_PPC_SECTOFF_LO
#undef R_PPC_SECTOFF_HI
#undef R_PPC_SECTOFF_HA
#undef R_PPC_ADDR30
#undef R_PPC_TLS
#undef R_PPC_DTPMOD32
#undef R_PPC_TPREL16
#undef R_PPC_TPREL16_LO
#undef R_PPC_TPREL16_HI
#undef R_PPC_TPREL16_HA
#undef R_PPC_TPREL32
#undef R_PPC_DTPREL16
#undef R_PPC_DTPREL16_LO
#undef R_PPC_DTPREL16_HI
#undef R_PPC_DTPREL16_HA
#undef R_PPC_DTPREL32
#undef R_PPC_GOT_TLSGD16
#undef R_PPC_GOT_TLSGD16_LO
#undef R_PPC_GOT_TLSGD16_HI
#undef R_PPC_GOT_TLSGD16_HA
#undef R_PPC_GOT_TLSLD16
#undef R_PPC_GOT_TLSLD16_LO
#undef R_PPC_GOT_TLSLD16_HI
#undef R_PPC_GOT_TLSLD16_HA
#undef R_PPC_GOT_TPREL16
#undef R_PPC_GOT_TPREL16_LO
#undef R_PPC_GOT_TPREL16_HI
#undef R_PPC_GOT_TPREL16_HA
#undef R_PPC_GOT_DTPREL16
#undef R_PPC_GOT_DTPREL16_LO
#undef R_PPC_GOT_DTPREL16_HI
#undef R_PPC_GOT_DTPREL16_HA
#undef R_PPC_TLSGD
#undef R_PPC_TLSLD
#undef R_PPC_REL16
#undef R_PPC_REL16_LO
#undef R_PPC_REL16_HI
#undef R_PPC_REL16_HA
ELF_RELOC(R_PPC_NONE, 0) /* No relocation. */
ELF_RELOC(R_PPC_ADDR32, 1)
ELF_RELOC(R_PPC_ADDR24, 2)
ELF_RELOC(R_PPC_ADDR16, 3)
ELF_RELOC(R_PPC_ADDR16_LO, 4)
ELF_RELOC(R_PPC_ADDR16_HI, 5)
ELF_RELOC(R_PPC_ADDR16_HA, 6)
ELF_RELOC(R_PPC_ADDR14, 7)
ELF_RELOC(R_PPC_ADDR14_BRTAKEN, 8)
ELF_RELOC(R_PPC_ADDR14_BRNTAKEN, 9)
ELF_RELOC(R_PPC_REL24, 10)
ELF_RELOC(R_PPC_REL14, 11)
ELF_RELOC(R_PPC_REL14_BRTAKEN, 12)
ELF_RELOC(R_PPC_REL14_BRNTAKEN, 13)
ELF_RELOC(R_PPC_GOT16, 14)
ELF_RELOC(R_PPC_GOT16_LO, 15)
ELF_RELOC(R_PPC_GOT16_HI, 16)
ELF_RELOC(R_PPC_GOT16_HA, 17)
ELF_RELOC(R_PPC_PLTREL24, 18)
ELF_RELOC(R_PPC_COPY, 19)
ELF_RELOC(R_PPC_GLOB_DAT, 20)
ELF_RELOC(R_PPC_JMP_SLOT, 21)
ELF_RELOC(R_PPC_RELATIVE, 22)
ELF_RELOC(R_PPC_LOCAL24PC, 23)
ELF_RELOC(R_PPC_UADDR32, 24)
ELF_RELOC(R_PPC_UADDR16, 25)
ELF_RELOC(R_PPC_REL32, 26)
ELF_RELOC(R_PPC_PLT32, 27)
ELF_RELOC(R_PPC_PLTREL32, 28)
ELF_RELOC(R_PPC_PLT16_LO, 29)
ELF_RELOC(R_PPC_PLT16_HI, 30)
ELF_RELOC(R_PPC_PLT16_HA, 31)
ELF_RELOC(R_PPC_SDAREL16, 32)
ELF_RELOC(R_PPC_SECTOFF, 33)
ELF_RELOC(R_PPC_SECTOFF_LO, 34)
ELF_RELOC(R_PPC_SECTOFF_HI, 35)
ELF_RELOC(R_PPC_SECTOFF_HA, 36)
ELF_RELOC(R_PPC_ADDR30, 37)
ELF_RELOC(R_PPC_TLS, 67)
ELF_RELOC(R_PPC_DTPMOD32, 68)
ELF_RELOC(R_PPC_TPREL16, 69)
ELF_RELOC(R_PPC_TPREL16_LO, 70)
ELF_RELOC(R_PPC_TPREL16_HI, 71)
ELF_RELOC(R_PPC_TPREL16_HA, 72)
ELF_RELOC(R_PPC_TPREL32, 73)
ELF_RELOC(R_PPC_DTPREL16, 74)
ELF_RELOC(R_PPC_DTPREL16_LO, 75)
ELF_RELOC(R_PPC_DTPREL16_HI, 76)
ELF_RELOC(R_PPC_DTPREL16_HA, 77)
ELF_RELOC(R_PPC_DTPREL32, 78)
ELF_RELOC(R_PPC_GOT_TLSGD16, 79)
ELF_RELOC(R_PPC_GOT_TLSGD16_LO, 80)
ELF_RELOC(R_PPC_GOT_TLSGD16_HI, 81)
ELF_RELOC(R_PPC_GOT_TLSGD16_HA, 82)
ELF_RELOC(R_PPC_GOT_TLSLD16, 83)
ELF_RELOC(R_PPC_GOT_TLSLD16_LO, 84)
ELF_RELOC(R_PPC_GOT_TLSLD16_HI, 85)
ELF_RELOC(R_PPC_GOT_TLSLD16_HA, 86)
ELF_RELOC(R_PPC_GOT_TPREL16, 87)
ELF_RELOC(R_PPC_GOT_TPREL16_LO, 88)
ELF_RELOC(R_PPC_GOT_TPREL16_HI, 89)
ELF_RELOC(R_PPC_GOT_TPREL16_HA, 90)
ELF_RELOC(R_PPC_GOT_DTPREL16, 91)
ELF_RELOC(R_PPC_GOT_DTPREL16_LO, 92)
ELF_RELOC(R_PPC_GOT_DTPREL16_HI, 93)
ELF_RELOC(R_PPC_GOT_DTPREL16_HA, 94)
ELF_RELOC(R_PPC_TLSGD, 95)
ELF_RELOC(R_PPC_TLSLD, 96)
ELF_RELOC(R_PPC_IRELATIVE, 248)
ELF_RELOC(R_PPC_REL16, 249)
ELF_RELOC(R_PPC_REL16_LO, 250)
ELF_RELOC(R_PPC_REL16_HI, 251)
ELF_RELOC(R_PPC_REL16_HA, 252)
PK hwFZ��
�i i $ BinaryFormat/ELFRelocs/PowerPC64.defnu �[���
#ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
// glibc's PowerPC asm/sigcontext.h, when compiling for PPC64, has the
// unfortunate behavior of including asm/elf.h, which defines R_PPC_NONE, etc.
// to their corresponding integer values. As a result, we need to undef them
// here before continuing.
#undef R_PPC64_NONE
#undef R_PPC64_ADDR32
#undef R_PPC64_ADDR24
#undef R_PPC64_ADDR16
#undef R_PPC64_ADDR16_LO
#undef R_PPC64_ADDR16_HI
#undef R_PPC64_ADDR16_HA
#undef R_PPC64_ADDR14
#undef R_PPC64_ADDR14_BRTAKEN
#undef R_PPC64_ADDR14_BRNTAKEN
#undef R_PPC64_REL24
#undef R_PPC64_REL14
#undef R_PPC64_REL14_BRTAKEN
#undef R_PPC64_REL14_BRNTAKEN
#undef R_PPC64_GOT16
#undef R_PPC64_GOT16_LO
#undef R_PPC64_GOT16_HI
#undef R_PPC64_GOT16_HA
#undef R_PPC64_COPY
#undef R_PPC64_GLOB_DAT
#undef R_PPC64_JMP_SLOT
#undef R_PPC64_RELATIVE
#undef R_PPC64_REL32
#undef R_PPC64_ADDR64
#undef R_PPC64_ADDR16_HIGHER
#undef R_PPC64_ADDR16_HIGHERA
#undef R_PPC64_ADDR16_HIGHEST
#undef R_PPC64_ADDR16_HIGHESTA
#undef R_PPC64_REL64
#undef R_PPC64_TOC16
#undef R_PPC64_TOC16_LO
#undef R_PPC64_TOC16_HI
#undef R_PPC64_TOC16_HA
#undef R_PPC64_TOC
#undef R_PPC64_ADDR16_DS
#undef R_PPC64_ADDR16_LO_DS
#undef R_PPC64_GOT16_DS
#undef R_PPC64_GOT16_LO_DS
#undef R_PPC64_TOC16_DS
#undef R_PPC64_TOC16_LO_DS
#undef R_PPC64_TLS
#undef R_PPC64_DTPMOD64
#undef R_PPC64_TPREL16
#undef R_PPC64_TPREL16_LO
#undef R_PPC64_TPREL16_HI
#undef R_PPC64_TPREL16_HA
#undef R_PPC64_TPREL64
#undef R_PPC64_DTPREL16
#undef R_PPC64_DTPREL16_LO
#undef R_PPC64_DTPREL16_HI
#undef R_PPC64_DTPREL16_HA
#undef R_PPC64_DTPREL64
#undef R_PPC64_GOT_TLSGD16
#undef R_PPC64_GOT_TLSGD16_LO
#undef R_PPC64_GOT_TLSGD16_HI
#undef R_PPC64_GOT_TLSGD16_HA
#undef R_PPC64_GOT_TLSLD16
#undef R_PPC64_GOT_TLSLD16_LO
#undef R_PPC64_GOT_TLSLD16_HI
#undef R_PPC64_GOT_TLSLD16_HA
#undef R_PPC64_GOT_TPREL16_DS
#undef R_PPC64_GOT_TPREL16_LO_DS
#undef R_PPC64_GOT_TPREL16_HI
#undef R_PPC64_GOT_TPREL16_HA
#undef R_PPC64_GOT_DTPREL16_DS
#undef R_PPC64_GOT_DTPREL16_LO_DS
#undef R_PPC64_GOT_DTPREL16_HI
#undef R_PPC64_GOT_DTPREL16_HA
#undef R_PPC64_TPREL16_DS
#undef R_PPC64_TPREL16_LO_DS
#undef R_PPC64_TPREL16_HIGHER
#undef R_PPC64_TPREL16_HIGHERA
#undef R_PPC64_TPREL16_HIGHEST
#undef R_PPC64_TPREL16_HIGHESTA
#undef R_PPC64_DTPREL16_DS
#undef R_PPC64_DTPREL16_LO_DS
#undef R_PPC64_DTPREL16_HIGHER
#undef R_PPC64_DTPREL16_HIGHERA
#undef R_PPC64_DTPREL16_HIGHEST
#undef R_PPC64_DTPREL16_HIGHESTA
#undef R_PPC64_TLSGD
#undef R_PPC64_TLSLD
#undef R_PPC64_ADDR16_HIGH
#undef R_PPC64_ADDR16_HIGHA
#undef R_PPC64_TPREL16_HIGH
#undef R_PPC64_TPREL16_HIGHA
#undef R_PPC64_DTPREL16_HIGH
#undef R_PPC64_DTPREL16_HIGHA
#undef R_PPC64_REL24_NOTOC
#undef R_PPC64_PCREL_OPT
#undef R_PPC64_PCREL34
#undef R_PPC64_GOT_PCREL34
#undef R_PPC64_TPREL34
#undef R_PPC64_DTPREL34
#undef R_PPC64_GOT_TLSGD_PCREL34
#undef R_PPC64_GOT_TLSLD_PCREL34
#undef R_PPC64_GOT_TPREL_PCREL34
#undef R_PPC64_IRELATIVE
#undef R_PPC64_REL16
#undef R_PPC64_REL16_LO
#undef R_PPC64_REL16_HI
#undef R_PPC64_REL16_HA
ELF_RELOC(R_PPC64_NONE, 0)
ELF_RELOC(R_PPC64_ADDR32, 1)
ELF_RELOC(R_PPC64_ADDR24, 2)
ELF_RELOC(R_PPC64_ADDR16, 3)
ELF_RELOC(R_PPC64_ADDR16_LO, 4)
ELF_RELOC(R_PPC64_ADDR16_HI, 5)
ELF_RELOC(R_PPC64_ADDR16_HA, 6)
ELF_RELOC(R_PPC64_ADDR14, 7)
ELF_RELOC(R_PPC64_ADDR14_BRTAKEN, 8)
ELF_RELOC(R_PPC64_ADDR14_BRNTAKEN, 9)
ELF_RELOC(R_PPC64_REL24, 10)
ELF_RELOC(R_PPC64_REL14, 11)
ELF_RELOC(R_PPC64_REL14_BRTAKEN, 12)
ELF_RELOC(R_PPC64_REL14_BRNTAKEN, 13)
ELF_RELOC(R_PPC64_GOT16, 14)
ELF_RELOC(R_PPC64_GOT16_LO, 15)
ELF_RELOC(R_PPC64_GOT16_HI, 16)
ELF_RELOC(R_PPC64_GOT16_HA, 17)
ELF_RELOC(R_PPC64_COPY, 19)
ELF_RELOC(R_PPC64_GLOB_DAT, 20)
ELF_RELOC(R_PPC64_JMP_SLOT, 21)
ELF_RELOC(R_PPC64_RELATIVE, 22)
ELF_RELOC(R_PPC64_REL32, 26)
ELF_RELOC(R_PPC64_ADDR64, 38)
ELF_RELOC(R_PPC64_ADDR16_HIGHER, 39)
ELF_RELOC(R_PPC64_ADDR16_HIGHERA, 40)
ELF_RELOC(R_PPC64_ADDR16_HIGHEST, 41)
ELF_RELOC(R_PPC64_ADDR16_HIGHESTA, 42)
ELF_RELOC(R_PPC64_REL64, 44)
ELF_RELOC(R_PPC64_TOC16, 47)
ELF_RELOC(R_PPC64_TOC16_LO, 48)
ELF_RELOC(R_PPC64_TOC16_HI, 49)
ELF_RELOC(R_PPC64_TOC16_HA, 50)
ELF_RELOC(R_PPC64_TOC, 51)
ELF_RELOC(R_PPC64_ADDR16_DS, 56)
ELF_RELOC(R_PPC64_ADDR16_LO_DS, 57)
ELF_RELOC(R_PPC64_GOT16_DS, 58)
ELF_RELOC(R_PPC64_GOT16_LO_DS, 59)
ELF_RELOC(R_PPC64_TOC16_DS, 63)
ELF_RELOC(R_PPC64_TOC16_LO_DS, 64)
ELF_RELOC(R_PPC64_TLS, 67)
ELF_RELOC(R_PPC64_DTPMOD64, 68)
ELF_RELOC(R_PPC64_TPREL16, 69)
ELF_RELOC(R_PPC64_TPREL16_LO, 70)
ELF_RELOC(R_PPC64_TPREL16_HI, 71)
ELF_RELOC(R_PPC64_TPREL16_HA, 72)
ELF_RELOC(R_PPC64_TPREL64, 73)
ELF_RELOC(R_PPC64_DTPREL16, 74)
ELF_RELOC(R_PPC64_DTPREL16_LO, 75)
ELF_RELOC(R_PPC64_DTPREL16_HI, 76)
ELF_RELOC(R_PPC64_DTPREL16_HA, 77)
ELF_RELOC(R_PPC64_DTPREL64, 78)
ELF_RELOC(R_PPC64_GOT_TLSGD16, 79)
ELF_RELOC(R_PPC64_GOT_TLSGD16_LO, 80)
ELF_RELOC(R_PPC64_GOT_TLSGD16_HI, 81)
ELF_RELOC(R_PPC64_GOT_TLSGD16_HA, 82)
ELF_RELOC(R_PPC64_GOT_TLSLD16, 83)
ELF_RELOC(R_PPC64_GOT_TLSLD16_LO, 84)
ELF_RELOC(R_PPC64_GOT_TLSLD16_HI, 85)
ELF_RELOC(R_PPC64_GOT_TLSLD16_HA, 86)
ELF_RELOC(R_PPC64_GOT_TPREL16_DS, 87)
ELF_RELOC(R_PPC64_GOT_TPREL16_LO_DS, 88)
ELF_RELOC(R_PPC64_GOT_TPREL16_HI, 89)
ELF_RELOC(R_PPC64_GOT_TPREL16_HA, 90)
ELF_RELOC(R_PPC64_GOT_DTPREL16_DS, 91)
ELF_RELOC(R_PPC64_GOT_DTPREL16_LO_DS, 92)
ELF_RELOC(R_PPC64_GOT_DTPREL16_HI, 93)
ELF_RELOC(R_PPC64_GOT_DTPREL16_HA, 94)
ELF_RELOC(R_PPC64_TPREL16_DS, 95)
ELF_RELOC(R_PPC64_TPREL16_LO_DS, 96)
ELF_RELOC(R_PPC64_TPREL16_HIGHER, 97)
ELF_RELOC(R_PPC64_TPREL16_HIGHERA, 98)
ELF_RELOC(R_PPC64_TPREL16_HIGHEST, 99)
ELF_RELOC(R_PPC64_TPREL16_HIGHESTA, 100)
ELF_RELOC(R_PPC64_DTPREL16_DS, 101)
ELF_RELOC(R_PPC64_DTPREL16_LO_DS, 102)
ELF_RELOC(R_PPC64_DTPREL16_HIGHER, 103)
ELF_RELOC(R_PPC64_DTPREL16_HIGHERA, 104)
ELF_RELOC(R_PPC64_DTPREL16_HIGHEST, 105)
ELF_RELOC(R_PPC64_DTPREL16_HIGHESTA, 106)
ELF_RELOC(R_PPC64_TLSGD, 107)
ELF_RELOC(R_PPC64_TLSLD, 108)
ELF_RELOC(R_PPC64_ADDR16_HIGH, 110)
ELF_RELOC(R_PPC64_ADDR16_HIGHA, 111)
ELF_RELOC(R_PPC64_TPREL16_HIGH, 112)
ELF_RELOC(R_PPC64_TPREL16_HIGHA, 113)
ELF_RELOC(R_PPC64_DTPREL16_HIGH, 114)
ELF_RELOC(R_PPC64_DTPREL16_HIGHA, 115)
ELF_RELOC(R_PPC64_REL24_NOTOC, 116)
ELF_RELOC(R_PPC64_PCREL_OPT, 123)
ELF_RELOC(R_PPC64_PCREL34, 132)
ELF_RELOC(R_PPC64_GOT_PCREL34, 133)
ELF_RELOC(R_PPC64_TPREL34, 146)
ELF_RELOC(R_PPC64_DTPREL34, 147)
ELF_RELOC(R_PPC64_GOT_TLSGD_PCREL34, 148)
ELF_RELOC(R_PPC64_GOT_TLSLD_PCREL34, 149)
ELF_RELOC(R_PPC64_GOT_TPREL_PCREL34, 150)
ELF_RELOC(R_PPC64_IRELATIVE, 248)
ELF_RELOC(R_PPC64_REL16, 249)
ELF_RELOC(R_PPC64_REL16_LO, 250)
ELF_RELOC(R_PPC64_REL16_HI, 251)
ELF_RELOC(R_PPC64_REL16_HA, 252)
PK hwFZ+�.� BinaryFormat/ELFRelocs/Lanai.defnu �[���
#ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
// No relocation
ELF_RELOC(R_LANAI_NONE, 0)
// 21-bit symbol relocation
ELF_RELOC(R_LANAI_21, 1)
// 21-bit symbol relocation with last two bits masked to 0
ELF_RELOC(R_LANAI_21_F, 2)
// 25-bit branch targets
ELF_RELOC(R_LANAI_25, 3)
// General 32-bit relocation
ELF_RELOC(R_LANAI_32, 4)
// Upper 16-bits of a symbolic relocation
ELF_RELOC(R_LANAI_HI16, 5)
// Lower 16-bits of a symbolic relocation
ELF_RELOC(R_LANAI_LO16, 6)
PK hwFZ:'n " BinaryFormat/ELFRelocs/SystemZ.defnu �[���
#ifndef ELF_RELOC
#error "ELF_RELOC must be defined"
#endif
ELF_RELOC(R_390_NONE, 0)
ELF_RELOC(R_390_8, 1)
ELF_RELOC(R_390_12, 2)
ELF_RELOC(R_390_16, 3)
ELF_RELOC(R_390_32, 4)
ELF_RELOC(R_390_PC32, 5)
ELF_RELOC(R_390_GOT12, 6)
ELF_RELOC(R_390_GOT32, 7)
ELF_RELOC(R_390_PLT32, 8)
ELF_RELOC(R_390_COPY, 9)
ELF_RELOC(R_390_GLOB_DAT, 10)
ELF_RELOC(R_390_JMP_SLOT, 11)
ELF_RELOC(R_390_RELATIVE, 12)
ELF_RELOC(R_390_GOTOFF, 13)
ELF_RELOC(R_390_GOTPC, 14)
ELF_RELOC(R_390_GOT16, 15)
ELF_RELOC(R_390_PC16, 16)
ELF_RELOC(R_390_PC16DBL, 17)
ELF_RELOC(R_390_PLT16DBL, 18)
ELF_RELOC(R_390_PC32DBL, 19)
ELF_RELOC(R_390_PLT32DBL, 20)
ELF_RELOC(R_390_GOTPCDBL, 21)
ELF_RELOC(R_390_64, 22)
ELF_RELOC(R_390_PC64, 23)
ELF_RELOC(R_390_GOT64, 24)
ELF_RELOC(R_390_PLT64, 25)
ELF_RELOC(R_390_GOTENT, 26)
ELF_RELOC(R_390_GOTOFF16, 27)
ELF_RELOC(R_390_GOTOFF64, 28)
ELF_RELOC(R_390_GOTPLT12, 29)
ELF_RELOC(R_390_GOTPLT16, 30)
ELF_RELOC(R_390_GOTPLT32, 31)
ELF_RELOC(R_390_GOTPLT64, 32)
ELF_RELOC(R_390_GOTPLTENT, 33)
ELF_RELOC(R_390_PLTOFF16, 34)
ELF_RELOC(R_390_PLTOFF32, 35)
ELF_RELOC(R_390_PLTOFF64, 36)
ELF_RELOC(R_390_TLS_LOAD, 37)
ELF_RELOC(R_390_TLS_GDCALL, 38)
ELF_RELOC(R_390_TLS_LDCALL, 39)
ELF_RELOC(R_390_TLS_GD32, 40)
ELF_RELOC(R_390_TLS_GD64, 41)
ELF_RELOC(R_390_TLS_GOTIE12, 42)
ELF_RELOC(R_390_TLS_GOTIE32, 43)
ELF_RELOC(R_390_TLS_GOTIE64, 44)
ELF_RELOC(R_390_TLS_LDM32, 45)
ELF_RELOC(R_390_TLS_LDM64, 46)
ELF_RELOC(R_390_TLS_IE32, 47)
ELF_RELOC(R_390_TLS_IE64, 48)
ELF_RELOC(R_390_TLS_IEENT, 49)
ELF_RELOC(R_390_TLS_LE32, 50)
ELF_RELOC(R_390_TLS_LE64, 51)
ELF_RELOC(R_390_TLS_LDO32, 52)
ELF_RELOC(R_390_TLS_LDO64, 53)
ELF_RELOC(R_390_TLS_DTPMOD, 54)
ELF_RELOC(R_390_TLS_DTPOFF, 55)
ELF_RELOC(R_390_TLS_TPOFF, 56)
ELF_RELOC(R_390_20, 57)
ELF_RELOC(R_390_GOT20, 58)
ELF_RELOC(R_390_GOTPLT20, 59)
ELF_RELOC(R_390_TLS_GOTIE20, 60)
ELF_RELOC(R_390_IRELATIVE, 61)
ELF_RELOC(R_390_PC12DBL, 62)
ELF_RELOC(R_390_PLT12DBL, 63)
ELF_RELOC(R_390_PC24DBL, 64)
ELF_RELOC(R_390_PLT24DBL, 65)
PK hwFZ�D1�s� s� BinaryFormat/Dwarf.defnu �[��� //===- llvm/Support/Dwarf.def - Dwarf definitions ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Macros for running through Dwarf enumerators.
//
//===----------------------------------------------------------------------===//
// TODO: Add other DW-based macros.
#if !( \
defined HANDLE_DW_TAG || defined HANDLE_DW_AT || defined HANDLE_DW_FORM || \
defined HANDLE_DW_OP || defined HANDLE_DW_OP_LLVM_USEROP || \
defined HANDLE_DW_LANG || defined HANDLE_DW_ATE || \
defined HANDLE_DW_VIRTUALITY || defined HANDLE_DW_DEFAULTED || \
defined HANDLE_DW_CC || defined HANDLE_DW_LNS || defined HANDLE_DW_LNE || \
defined HANDLE_DW_LNCT || defined HANDLE_DW_MACRO || \
defined HANDLE_DW_MACRO_GNU || defined HANDLE_MACRO_FLAG || \
defined HANDLE_DW_RLE || defined HANDLE_DW_LLE || \
(defined HANDLE_DW_CFA && defined HANDLE_DW_CFA_PRED) || \
defined HANDLE_DW_APPLE_PROPERTY || defined HANDLE_DW_UT || \
defined HANDLE_DWARF_SECTION || defined HANDLE_DW_IDX || \
defined HANDLE_DW_END || defined HANDLE_DW_SECT)
#error "Missing macro definition of HANDLE_DW*"
#endif
#ifndef HANDLE_DW_TAG
#define HANDLE_DW_TAG(ID, NAME, VERSION, VENDOR, KIND)
#endif
// Note that DW_KIND is not a DWARF concept, but rather a way for us to
// generate a list of tags that belong together.
#ifndef DW_KIND_NONE
#define DW_KIND_NONE 0
#endif
#ifndef DW_KIND_TYPE
#define DW_KIND_TYPE 1
#endif
#ifndef HANDLE_DW_AT
#define HANDLE_DW_AT(ID, NAME, VERSION, VENDOR)
#endif
#ifndef HANDLE_DW_FORM
#define HANDLE_DW_FORM(ID, NAME, VERSION, VENDOR)
#endif
#ifndef HANDLE_DW_OP
#define HANDLE_DW_OP(ID, NAME, VERSION, VENDOR)
#endif
#ifndef HANDLE_DW_OP_LLVM_USEROP
#define HANDLE_DW_OP_LLVM_USEROP(ID, NAME)
#endif
#ifndef HANDLE_DW_LANG
#define HANDLE_DW_LANG(ID, NAME, LOWER_BOUND, VERSION, VENDOR)
#endif
#ifndef HANDLE_DW_ATE
#define HANDLE_DW_ATE(ID, NAME, VERSION, VENDOR)
#endif
#ifndef HANDLE_DW_VIRTUALITY
#define HANDLE_DW_VIRTUALITY(ID, NAME)
#endif
#ifndef HANDLE_DW_DEFAULTED
#define HANDLE_DW_DEFAULTED(ID, NAME)
#endif
#ifndef HANDLE_DW_CC
#define HANDLE_DW_CC(ID, NAME)
#endif
#ifndef HANDLE_DW_LNS
#define HANDLE_DW_LNS(ID, NAME)
#endif
#ifndef HANDLE_DW_LNE
#define HANDLE_DW_LNE(ID, NAME)
#endif
#ifndef HANDLE_DW_LNCT
#define HANDLE_DW_LNCT(ID, NAME)
#endif
#ifndef HANDLE_DW_MACRO
#define HANDLE_DW_MACRO(ID, NAME)
#endif
#ifndef HANDLE_DW_MACRO_GNU
#define HANDLE_DW_MACRO_GNU(ID, NAME)
#endif
#ifndef HANDLE_MACRO_FLAG
#define HANDLE_MACRO_FLAG(ID, NAME)
#endif
#ifndef HANDLE_DW_RLE
#define HANDLE_DW_RLE(ID, NAME)
#endif
#ifndef HANDLE_DW_LLE
#define HANDLE_DW_LLE(ID, NAME)
#endif
#ifndef HANDLE_DW_CFA
#define HANDLE_DW_CFA(ID, NAME)
#endif
#ifndef HANDLE_DW_CFA_PRED
#define HANDLE_DW_CFA_PRED(ID, NAME, PRED)
#endif
#ifndef HANDLE_DW_APPLE_PROPERTY
#define HANDLE_DW_APPLE_PROPERTY(ID, NAME)
#endif
#ifndef HANDLE_DW_UT
#define HANDLE_DW_UT(ID, NAME)
#endif
#ifndef HANDLE_DWARF_SECTION
#define HANDLE_DWARF_SECTION(ENUM_NAME, ELF_NAME, CMDLINE_NAME, OPTION)
#endif
#ifndef HANDLE_DW_IDX
#define HANDLE_DW_IDX(ID, NAME)
#endif
#ifndef HANDLE_DW_END
#define HANDLE_DW_END(ID, NAME)
#endif
#ifndef HANDLE_DW_SECT
#define HANDLE_DW_SECT(ID, NAME)
#endif
HANDLE_DW_TAG(0x0000, null, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0001, array_type, 2, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0002, class_type, 2, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0003, entry_point, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0004, enumeration_type, 2, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0005, formal_parameter, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0008, imported_declaration, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x000a, label, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x000b, lexical_block, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x000d, member, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x000f, pointer_type, 2, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0010, reference_type, 2, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0011, compile_unit, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0012, string_type, 2, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0013, structure_type, 2, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0015, subroutine_type, 2, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0016, typedef, 2, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0017, union_type, 2, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0018, unspecified_parameters, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0019, variant, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x001a, common_block, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x001b, common_inclusion, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x001c, inheritance, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x001d, inlined_subroutine, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x001e, module, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x001f, ptr_to_member_type, 2, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0020, set_type, 2, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0021, subrange_type, 2, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0022, with_stmt, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0023, access_declaration, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0024, base_type, 2, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0025, catch_block, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0026, const_type, 2, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0027, constant, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0028, enumerator, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0029, file_type, 2, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x002a, friend, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x002b, namelist, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x002c, namelist_item, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x002d, packed_type, 2, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x002e, subprogram, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x002f, template_type_parameter, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0030, template_value_parameter, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0031, thrown_type, 2, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0032, try_block, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0033, variant_part, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0034, variable, 2, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0035, volatile_type, 2, DWARF, DW_KIND_TYPE)
// New in DWARF v3:
HANDLE_DW_TAG(0x0036, dwarf_procedure, 3, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0037, restrict_type, 3, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0038, interface_type, 3, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0039, namespace, 3, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x003a, imported_module, 3, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x003b, unspecified_type, 3, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x003c, partial_unit, 3, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x003d, imported_unit, 3, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x003f, condition, 3, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0040, shared_type, 3, DWARF, DW_KIND_TYPE)
// New in DWARF v4:
HANDLE_DW_TAG(0x0041, type_unit, 4, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0042, rvalue_reference_type, 4, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0043, template_alias, 4, DWARF, DW_KIND_NONE)
// New in DWARF v5:
HANDLE_DW_TAG(0x0044, coarray_type, 5, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0045, generic_subrange, 5, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0046, dynamic_type, 5, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0047, atomic_type, 5, DWARF, DW_KIND_TYPE)
HANDLE_DW_TAG(0x0048, call_site, 5, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x0049, call_site_parameter, 5, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x004a, skeleton_unit, 5, DWARF, DW_KIND_NONE)
HANDLE_DW_TAG(0x004b, immutable_type, 5, DWARF, DW_KIND_TYPE)
// Vendor extensions:
HANDLE_DW_TAG(0x4081, MIPS_loop, 0, MIPS, DW_KIND_NONE)
// Conflicting:
// HANDLE_DW_TAG(0x4081, HP_array_descriptor, 0, HP, DW_KIND_NONE)
HANDLE_DW_TAG(0x4101, format_label, 0, GNU, DW_KIND_NONE)
HANDLE_DW_TAG(0x4102, function_template, 0, GNU, DW_KIND_NONE)
HANDLE_DW_TAG(0x4103, class_template, 0, GNU, DW_KIND_NONE)
HANDLE_DW_TAG(0x4104, GNU_BINCL, 0, GNU, DW_KIND_NONE)
HANDLE_DW_TAG(0x4105, GNU_EINCL, 0, GNU, DW_KIND_NONE)
HANDLE_DW_TAG(0x4106, GNU_template_template_param, 0, GNU, DW_KIND_NONE)
HANDLE_DW_TAG(0x4107, GNU_template_parameter_pack, 0, GNU, DW_KIND_NONE)
HANDLE_DW_TAG(0x4108, GNU_formal_parameter_pack, 0, GNU, DW_KIND_NONE)
HANDLE_DW_TAG(0x4109, GNU_call_site, 0, GNU, DW_KIND_NONE)
HANDLE_DW_TAG(0x410a, GNU_call_site_parameter, 0, GNU, DW_KIND_NONE)
HANDLE_DW_TAG(0x4200, APPLE_property, 0, APPLE, DW_KIND_NONE)
HANDLE_DW_TAG(0x4201, SUN_function_template, 0, SUN, DW_KIND_NONE)
HANDLE_DW_TAG(0x4202, SUN_class_template, 0, SUN, DW_KIND_NONE)
HANDLE_DW_TAG(0x4203, SUN_struct_template, 0, SUN, DW_KIND_NONE)
HANDLE_DW_TAG(0x4204, SUN_union_template, 0, SUN, DW_KIND_NONE)
HANDLE_DW_TAG(0x4205, SUN_indirect_inheritance, 0, SUN, DW_KIND_NONE)
HANDLE_DW_TAG(0x4206, SUN_codeflags, 0, SUN, DW_KIND_NONE)
HANDLE_DW_TAG(0x4207, SUN_memop_info, 0, SUN, DW_KIND_NONE)
HANDLE_DW_TAG(0x4208, SUN_omp_child_func, 0, SUN, DW_KIND_NONE)
HANDLE_DW_TAG(0x4209, SUN_rtti_descriptor, 0, SUN, DW_KIND_NONE)
HANDLE_DW_TAG(0x420a, SUN_dtor_info, 0, SUN, DW_KIND_NONE)
HANDLE_DW_TAG(0x420b, SUN_dtor, 0, SUN, DW_KIND_NONE)
HANDLE_DW_TAG(0x420c, SUN_f90_interface, 0, SUN, DW_KIND_NONE)
HANDLE_DW_TAG(0x420d, SUN_fortran_vax_structure, 0, SUN, DW_KIND_NONE)
HANDLE_DW_TAG(0x42ff, SUN_hi, 0, SUN, DW_KIND_NONE)
// LLVM
HANDLE_DW_TAG(0x4300, LLVM_ptrauth_type, 0, LLVM, DW_KIND_TYPE)
// DSP-C/Starcore __circ, _rev
HANDLE_DW_TAG(0x5101, ALTIUM_circ_type, 0, ALTIUM, DW_KIND_NONE)
HANDLE_DW_TAG(0x5102, ALTIUM_mwa_circ_type, 0, ALTIUM, DW_KIND_NONE)
HANDLE_DW_TAG(0x5103, ALTIUM_rev_carry_type, 0, ALTIUM, DW_KIND_NONE)
// M16 __rom qualifier
HANDLE_DW_TAG(0x5111, ALTIUM_rom, 0, ALTIUM, DW_KIND_NONE)
// LLVM
HANDLE_DW_TAG(0x6000, LLVM_annotation, 0, LLVM, DW_KIND_NONE)
// Green Hills.
HANDLE_DW_TAG(0x8004, GHS_namespace, 0, GHS, DW_KIND_NONE)
HANDLE_DW_TAG(0x8005, GHS_using_namespace, 0, GHS, DW_KIND_NONE)
HANDLE_DW_TAG(0x8006, GHS_using_declaration, 0, GHS, DW_KIND_NONE)
HANDLE_DW_TAG(0x8007, GHS_template_templ_param, 0, GHS, DW_KIND_NONE)
// Unified Parallel C.
HANDLE_DW_TAG(0x8765, UPC_shared_type, 0, UPC, DW_KIND_NONE)
HANDLE_DW_TAG(0x8766, UPC_strict_type, 0, UPC, DW_KIND_NONE)
HANDLE_DW_TAG(0x8767, UPC_relaxed, 0, UPC, DW_KIND_NONE)
HANDLE_DW_TAG(0xa000, PGI_kanji_type, 0, PGI, DW_KIND_NONE)
HANDLE_DW_TAG(0xa020, PGI_interface_block, 0, PGI, DW_KIND_NONE)
HANDLE_DW_TAG(0xb000, BORLAND_property, 0, BORLAND, DW_KIND_NONE)
HANDLE_DW_TAG(0xb001, BORLAND_Delphi_string, 0, BORLAND, DW_KIND_TYPE)
HANDLE_DW_TAG(0xb002, BORLAND_Delphi_dynamic_array, 0, BORLAND, DW_KIND_TYPE)
HANDLE_DW_TAG(0xb003, BORLAND_Delphi_set, 0, BORLAND, DW_KIND_TYPE)
HANDLE_DW_TAG(0xb004, BORLAND_Delphi_variant, 0, BORLAND, DW_KIND_TYPE)
// Attributes.
HANDLE_DW_AT(0x01, sibling, 2, DWARF)
HANDLE_DW_AT(0x02, location, 2, DWARF)
HANDLE_DW_AT(0x03, name, 2, DWARF)
HANDLE_DW_AT(0x09, ordering, 2, DWARF)
HANDLE_DW_AT(0x0b, byte_size, 2, DWARF)
HANDLE_DW_AT(0x0c, bit_offset, 2, DWARF)
HANDLE_DW_AT(0x0d, bit_size, 2, DWARF)
HANDLE_DW_AT(0x10, stmt_list, 2, DWARF)
HANDLE_DW_AT(0x11, low_pc, 2, DWARF)
HANDLE_DW_AT(0x12, high_pc, 2, DWARF)
HANDLE_DW_AT(0x13, language, 2, DWARF)
HANDLE_DW_AT(0x15, discr, 2, DWARF)
HANDLE_DW_AT(0x16, discr_value, 2, DWARF)
HANDLE_DW_AT(0x17, visibility, 2, DWARF)
HANDLE_DW_AT(0x18, import, 2, DWARF)
HANDLE_DW_AT(0x19, string_length, 2, DWARF)
HANDLE_DW_AT(0x1a, common_reference, 2, DWARF)
HANDLE_DW_AT(0x1b, comp_dir, 2, DWARF)
HANDLE_DW_AT(0x1c, const_value, 2, DWARF)
HANDLE_DW_AT(0x1d, containing_type, 2, DWARF)
HANDLE_DW_AT(0x1e, default_value, 2, DWARF)
HANDLE_DW_AT(0x20, inline, 2, DWARF)
HANDLE_DW_AT(0x21, is_optional, 2, DWARF)
HANDLE_DW_AT(0x22, lower_bound, 2, DWARF)
HANDLE_DW_AT(0x25, producer, 2, DWARF)
HANDLE_DW_AT(0x27, prototyped, 2, DWARF)
HANDLE_DW_AT(0x2a, return_addr, 2, DWARF)
HANDLE_DW_AT(0x2c, start_scope, 2, DWARF)
HANDLE_DW_AT(0x2e, bit_stride, 2, DWARF)
HANDLE_DW_AT(0x2f, upper_bound, 2, DWARF)
HANDLE_DW_AT(0x31, abstract_origin, 2, DWARF)
HANDLE_DW_AT(0x32, accessibility, 2, DWARF)
HANDLE_DW_AT(0x33, address_class, 2, DWARF)
HANDLE_DW_AT(0x34, artificial, 2, DWARF)
HANDLE_DW_AT(0x35, base_types, 2, DWARF)
HANDLE_DW_AT(0x36, calling_convention, 2, DWARF)
HANDLE_DW_AT(0x37, count, 2, DWARF)
HANDLE_DW_AT(0x38, data_member_location, 2, DWARF)
HANDLE_DW_AT(0x39, decl_column, 2, DWARF)
HANDLE_DW_AT(0x3a, decl_file, 2, DWARF)
HANDLE_DW_AT(0x3b, decl_line, 2, DWARF)
HANDLE_DW_AT(0x3c, declaration, 2, DWARF)
HANDLE_DW_AT(0x3d, discr_list, 2, DWARF)
HANDLE_DW_AT(0x3e, encoding, 2, DWARF)
HANDLE_DW_AT(0x3f, external, 2, DWARF)
HANDLE_DW_AT(0x40, frame_base, 2, DWARF)
HANDLE_DW_AT(0x41, friend, 2, DWARF)
HANDLE_DW_AT(0x42, identifier_case, 2, DWARF)
HANDLE_DW_AT(0x43, macro_info, 2, DWARF)
HANDLE_DW_AT(0x44, namelist_item, 2, DWARF)
HANDLE_DW_AT(0x45, priority, 2, DWARF)
HANDLE_DW_AT(0x46, segment, 2, DWARF)
HANDLE_DW_AT(0x47, specification, 2, DWARF)
HANDLE_DW_AT(0x48, static_link, 2, DWARF)
HANDLE_DW_AT(0x49, type, 2, DWARF)
HANDLE_DW_AT(0x4a, use_location, 2, DWARF)
HANDLE_DW_AT(0x4b, variable_parameter, 2, DWARF)
HANDLE_DW_AT(0x4c, virtuality, 2, DWARF)
HANDLE_DW_AT(0x4d, vtable_elem_location, 2, DWARF)
// New in DWARF v3:
HANDLE_DW_AT(0x4e, allocated, 3, DWARF)
HANDLE_DW_AT(0x4f, associated, 3, DWARF)
HANDLE_DW_AT(0x50, data_location, 3, DWARF)
HANDLE_DW_AT(0x51, byte_stride, 3, DWARF)
HANDLE_DW_AT(0x52, entry_pc, 3, DWARF)
HANDLE_DW_AT(0x53, use_UTF8, 3, DWARF)
HANDLE_DW_AT(0x54, extension, 3, DWARF)
HANDLE_DW_AT(0x55, ranges, 3, DWARF)
HANDLE_DW_AT(0x56, trampoline, 3, DWARF)
HANDLE_DW_AT(0x57, call_column, 3, DWARF)
HANDLE_DW_AT(0x58, call_file, 3, DWARF)
HANDLE_DW_AT(0x59, call_line, 3, DWARF)
HANDLE_DW_AT(0x5a, description, 3, DWARF)
HANDLE_DW_AT(0x5b, binary_scale, 3, DWARF)
HANDLE_DW_AT(0x5c, decimal_scale, 3, DWARF)
HANDLE_DW_AT(0x5d, small, 3, DWARF)
HANDLE_DW_AT(0x5e, decimal_sign, 3, DWARF)
HANDLE_DW_AT(0x5f, digit_count, 3, DWARF)
HANDLE_DW_AT(0x60, picture_string, 3, DWARF)
HANDLE_DW_AT(0x61, mutable, 3, DWARF)
HANDLE_DW_AT(0x62, threads_scaled, 3, DWARF)
HANDLE_DW_AT(0x63, explicit, 3, DWARF)
HANDLE_DW_AT(0x64, object_pointer, 3, DWARF)
HANDLE_DW_AT(0x65, endianity, 3, DWARF)
HANDLE_DW_AT(0x66, elemental, 3, DWARF)
HANDLE_DW_AT(0x67, pure, 3, DWARF)
HANDLE_DW_AT(0x68, recursive, 3, DWARF)
// New in DWARF v4:
HANDLE_DW_AT(0x69, signature, 4, DWARF)
HANDLE_DW_AT(0x6a, main_subprogram, 4, DWARF)
HANDLE_DW_AT(0x6b, data_bit_offset, 4, DWARF)
HANDLE_DW_AT(0x6c, const_expr, 4, DWARF)
HANDLE_DW_AT(0x6d, enum_class, 4, DWARF)
HANDLE_DW_AT(0x6e, linkage_name, 4, DWARF)
// New in DWARF v5:
HANDLE_DW_AT(0x6f, string_length_bit_size, 5, DWARF)
HANDLE_DW_AT(0x70, string_length_byte_size, 5, DWARF)
HANDLE_DW_AT(0x71, rank, 5, DWARF)
HANDLE_DW_AT(0x72, str_offsets_base, 5, DWARF)
HANDLE_DW_AT(0x73, addr_base, 5, DWARF)
HANDLE_DW_AT(0x74, rnglists_base, 5, DWARF)
HANDLE_DW_AT(0x75, dwo_id, 0, DWARF) ///< Retracted from DWARF v5.
HANDLE_DW_AT(0x76, dwo_name, 5, DWARF)
HANDLE_DW_AT(0x77, reference, 5, DWARF)
HANDLE_DW_AT(0x78, rvalue_reference, 5, DWARF)
HANDLE_DW_AT(0x79, macros, 5, DWARF)
HANDLE_DW_AT(0x7a, call_all_calls, 5, DWARF)
HANDLE_DW_AT(0x7b, call_all_source_calls, 5, DWARF)
HANDLE_DW_AT(0x7c, call_all_tail_calls, 5, DWARF)
HANDLE_DW_AT(0x7d, call_return_pc, 5, DWARF)
HANDLE_DW_AT(0x7e, call_value, 5, DWARF)
HANDLE_DW_AT(0x7f, call_origin, 5, DWARF)
HANDLE_DW_AT(0x80, call_parameter, 5, DWARF)
HANDLE_DW_AT(0x81, call_pc, 5, DWARF)
HANDLE_DW_AT(0x82, call_tail_call, 5, DWARF)
HANDLE_DW_AT(0x83, call_target, 5, DWARF)
HANDLE_DW_AT(0x84, call_target_clobbered, 5, DWARF)
HANDLE_DW_AT(0x85, call_data_location, 5, DWARF)
HANDLE_DW_AT(0x86, call_data_value, 5, DWARF)
HANDLE_DW_AT(0x87, noreturn, 5, DWARF)
HANDLE_DW_AT(0x88, alignment, 5, DWARF)
HANDLE_DW_AT(0x89, export_symbols, 5, DWARF)
HANDLE_DW_AT(0x8a, deleted, 5, DWARF)
HANDLE_DW_AT(0x8b, defaulted, 5, DWARF)
HANDLE_DW_AT(0x8c, loclists_base, 5, DWARF)
// Vendor extensions:
HANDLE_DW_AT(0x806, GHS_namespace_alias, 0, GHS)
HANDLE_DW_AT(0x807, GHS_using_namespace, 0, GHS)
HANDLE_DW_AT(0x808, GHS_using_declaration, 0, GHS)
HANDLE_DW_AT(0x2001, MIPS_fde, 0, MIPS)
HANDLE_DW_AT(0x2002, MIPS_loop_begin, 0, MIPS)
HANDLE_DW_AT(0x2003, MIPS_tail_loop_begin, 0, MIPS)
HANDLE_DW_AT(0x2004, MIPS_epilog_begin, 0, MIPS)
HANDLE_DW_AT(0x2005, MIPS_loop_unroll_factor, 0, MIPS)
HANDLE_DW_AT(0x2006, MIPS_software_pipeline_depth, 0, MIPS)
HANDLE_DW_AT(0x2007, MIPS_linkage_name, 0, MIPS)
// Conflicting:
// HANDLE_DW_AT(0x2007, GHS_mangled, 0, GHS)
HANDLE_DW_AT(0x2008, MIPS_stride, 0, MIPS)
HANDLE_DW_AT(0x2009, MIPS_abstract_name, 0, MIPS)
HANDLE_DW_AT(0x200a, MIPS_clone_origin, 0, MIPS)
HANDLE_DW_AT(0x200b, MIPS_has_inlines, 0, MIPS)
HANDLE_DW_AT(0x200c, MIPS_stride_byte, 0, MIPS)
HANDLE_DW_AT(0x200d, MIPS_stride_elem, 0, MIPS)
HANDLE_DW_AT(0x200e, MIPS_ptr_dopetype, 0, MIPS)
HANDLE_DW_AT(0x200f, MIPS_allocatable_dopetype, 0, MIPS)
HANDLE_DW_AT(0x2010, MIPS_assumed_shape_dopetype, 0, MIPS)
// This one appears to have only been implemented by Open64 for
// fortran and may conflict with other extensions.
HANDLE_DW_AT(0x2011, MIPS_assumed_size, 0, MIPS)
// HP 0x2001-0x2011 conflict with MIPS
// HANDLE_DW_AT(0x2001, HP_unmodifiable, 0, HP)
// HANDLE_DW_AT(0x2005, HP_prologue, 0, HP)
// HANDLE_DW_AT(0x2008, HP_epilogue, 0, HP)
// HANDLE_DW_AT(0x2010, HP_actuals_stmt_list, 0, HP)
// HANDLE_DW_AT(0x2011, HP_proc_per_section, 0, HP)
HANDLE_DW_AT(0x2012, HP_raw_data_ptr, 0, HP)
HANDLE_DW_AT(0x2013, HP_pass_by_reference, 0, HP)
HANDLE_DW_AT(0x2014, HP_opt_level, 0, HP)
HANDLE_DW_AT(0x2015, HP_prof_version_id, 0, HP)
HANDLE_DW_AT(0x2016, HP_opt_flags, 0, HP)
HANDLE_DW_AT(0x2017, HP_cold_region_low_pc, 0, HP)
HANDLE_DW_AT(0x2018, HP_cold_region_high_pc, 0, HP)
HANDLE_DW_AT(0x2019, HP_all_variables_modifiable, 0, HP)
HANDLE_DW_AT(0x201a, HP_linkage_name, 0, HP)
HANDLE_DW_AT(0x201b, HP_prof_flags, 0, HP)
HANDLE_DW_AT(0x201f, HP_unit_name, 0, HP)
HANDLE_DW_AT(0x2020, HP_unit_size, 0, HP)
HANDLE_DW_AT(0x2021, HP_widened_byte_size, 0, HP)
HANDLE_DW_AT(0x2022, HP_definition_points, 0, HP)
HANDLE_DW_AT(0x2023, HP_default_location, 0, HP)
HANDLE_DW_AT(0x2029, HP_is_result_param, 0, HP)
// COMPAQ/HP Conflicts with MIPS/HP 0x2001 - 0x2005
// HANDLE_DW_AT(0x2001, CPQ_discontig_ranges, 0, COMPAQ)
// HANDLE_DW_AT(0x2002, CPQ_semantic_events, 0, COMPAQ)
// HANDLE_DW_AT(0x2003, CPQ_split_lifetimes_var, 0, COMPAQ)
// HANDLE_DW_AT(0x2004, CPQ_split_lifetimes_rtn, 0, COMPAQ)
// HANDLE_DW_AT(0x2005, CPQ_prologue_length, 0, COMPAQ)
HANDLE_DW_AT(0x2026, DW_AT_INTEL_other_endian, 0, INTEL)
// Green Hills.
HANDLE_DW_AT(0x2083, GHS_rsm, 0, GHS)
HANDLE_DW_AT(0x2085, GHS_frsm, 0, GHS)
HANDLE_DW_AT(0x2086, GHS_frames, 0, GHS)
HANDLE_DW_AT(0x2087, GHS_rso, 0, GHS)
HANDLE_DW_AT(0x2092, GHS_subcpu, 0, GHS)
HANDLE_DW_AT(0x2093, GHS_lbrace_line, 0, GHS)
// GNU extensions
HANDLE_DW_AT(0x2101, sf_names, 0, GNU)
HANDLE_DW_AT(0x2102, src_info, 0, GNU)
HANDLE_DW_AT(0x2103, mac_info, 0, GNU)
HANDLE_DW_AT(0x2104, src_coords, 0, GNU)
HANDLE_DW_AT(0x2105, body_begin, 0, GNU)
HANDLE_DW_AT(0x2106, body_end, 0, GNU)
HANDLE_DW_AT(0x2107, GNU_vector, 0, GNU)
HANDLE_DW_AT(0x210f, GNU_odr_signature, 0, GNU)
HANDLE_DW_AT(0x2110, GNU_template_name, 0, GNU)
HANDLE_DW_AT(0x2111, GNU_call_site_value, 0, GNU)
HANDLE_DW_AT(0x2112, GNU_call_site_data_value, 0, GNU)
HANDLE_DW_AT(0x2113, GNU_call_site_target, 0, GNU)
HANDLE_DW_AT(0x2114, GNU_call_site_target_clobbered, 0, GNU)
HANDLE_DW_AT(0x2115, GNU_tail_call, 0, GNU)
HANDLE_DW_AT(0x2116, GNU_all_tail_call_sites, 0, GNU)
HANDLE_DW_AT(0x2117, GNU_all_call_sites, 0, GNU)
HANDLE_DW_AT(0x2118, GNU_all_source_call_sites, 0, GNU)
HANDLE_DW_AT(0x2119, GNU_macros, 0, GNU)
HANDLE_DW_AT(0x211a, GNU_deleted, 0, GNU)
// Extensions for Fission proposal.
HANDLE_DW_AT(0x2130, GNU_dwo_name, 0, GNU)
HANDLE_DW_AT(0x2131, GNU_dwo_id, 0, GNU)
HANDLE_DW_AT(0x2132, GNU_ranges_base, 0, GNU)
HANDLE_DW_AT(0x2133, GNU_addr_base, 0, GNU)
HANDLE_DW_AT(0x2134, GNU_pubnames, 0, GNU)
HANDLE_DW_AT(0x2135, GNU_pubtypes, 0, GNU)
HANDLE_DW_AT(0x2136, GNU_discriminator, 0, GNU)
HANDLE_DW_AT(0x2137, GNU_locviews, 0, GNU)
HANDLE_DW_AT(0x2138, GNU_entry_view, 0, GNU)
HANDLE_DW_AT(0x2201, SUN_template, 0, SUN)
// Conflicting:
// HANDLE_DW_AT(0x2201, VMS_rtnbeg_pd_address);
HANDLE_DW_AT(0x2202, SUN_alignment, 0, SUN)
HANDLE_DW_AT(0x2203, SUN_vtable, 0, SUN)
HANDLE_DW_AT(0x2204, SUN_count_guarantee, 0, SUN)
HANDLE_DW_AT(0x2205, SUN_command_line, 0, SUN)
HANDLE_DW_AT(0x2206, SUN_vbase, 0, SUN)
HANDLE_DW_AT(0x2207, SUN_compile_options, 0, SUN)
HANDLE_DW_AT(0x2208, SUN_language, 0, SUN)
HANDLE_DW_AT(0x2209, SUN_browser_file, 0, SUN)
HANDLE_DW_AT(0x2210, SUN_vtable_abi, 0, SUN)
HANDLE_DW_AT(0x2211, SUN_func_offsets, 0, SUN)
HANDLE_DW_AT(0x2212, SUN_cf_kind, 0, SUN)
HANDLE_DW_AT(0x2213, SUN_vtable_index, 0, SUN)
HANDLE_DW_AT(0x2214, SUN_omp_tpriv_addr, 0, SUN)
HANDLE_DW_AT(0x2215, SUN_omp_child_func, 0, SUN)
HANDLE_DW_AT(0x2216, SUN_func_offset, 0, SUN)
HANDLE_DW_AT(0x2217, SUN_memop_type_ref, 0, SUN)
HANDLE_DW_AT(0x2218, SUN_profile_id, 0, SUN)
HANDLE_DW_AT(0x2219, SUN_memop_signature, 0, SUN)
HANDLE_DW_AT(0x2220, SUN_obj_dir, 0, SUN)
HANDLE_DW_AT(0x2221, SUN_obj_file, 0, SUN)
HANDLE_DW_AT(0x2222, SUN_original_name, 0, SUN)
HANDLE_DW_AT(0x2223, SUN_hwcprof_signature, 0, SUN)
HANDLE_DW_AT(0x2224, SUN_amd64_parmdump, 0, SUN)
HANDLE_DW_AT(0x2225, SUN_part_link_name, 0, SUN)
HANDLE_DW_AT(0x2226, SUN_link_name, 0, SUN)
HANDLE_DW_AT(0x2227, SUN_pass_with_const, 0, SUN)
HANDLE_DW_AT(0x2228, SUN_return_with_const, 0, SUN)
HANDLE_DW_AT(0x2229, SUN_import_by_name, 0, SUN)
HANDLE_DW_AT(0x222a, SUN_90_pointer, 0, SUN)
HANDLE_DW_AT(0x222b, SUN_pass_by_ref, 0, SUN)
HANDLE_DW_AT(0x222c, SUN_f90_allocatable, 0, SUN)
HANDLE_DW_AT(0x222d, SUN_f90_assumed_shape_array, 0, SUN)
HANDLE_DW_AT(0x222e, SUN_c_vla, 0, SUN)
HANDLE_DW_AT(0x2230, SUN_return_value_ptr, 0, SUN)
HANDLE_DW_AT(0x2231, SUN_dtor_start, 0, SUN)
HANDLE_DW_AT(0x2232, SUN_dtor_length, 0, SUN)
HANDLE_DW_AT(0x2233, SUN_dtor_state_initial, 0, SUN)
HANDLE_DW_AT(0x2234, SUN_dtor_state_final, 0, SUN)
HANDLE_DW_AT(0x2235, SUN_dtor_state_deltas, 0, SUN)
HANDLE_DW_AT(0x2236, SUN_import_by_lname, 0, SUN)
HANDLE_DW_AT(0x2237, SUN_f90_use_only, 0, SUN)
HANDLE_DW_AT(0x2238, SUN_namelist_spec, 0, SUN)
HANDLE_DW_AT(0x2239, SUN_is_omp_child_func, 0, SUN)
HANDLE_DW_AT(0x223a, SUN_fortran_main_alias, 0, SUN)
HANDLE_DW_AT(0x223b, SUN_fortran_based, 0, SUN)
HANDLE_DW_AT(0x2300, ALTIUM_loclist, 0, ALTIUM)
HANDLE_DW_AT(0x2301, use_GNAT_descriptive_type, 0, GNU)
HANDLE_DW_AT(0x2302, GNAT_descriptive_type, 0, GNU)
HANDLE_DW_AT(0x2303, GNU_numerator, 0, GNU)
HANDLE_DW_AT(0x2304, GNU_denominator, 0, GNU)
HANDLE_DW_AT(0x2305, GNU_bias, 0, GNU)
HANDLE_DW_AT(0x2900, GO_kind, 0, GO)
HANDLE_DW_AT(0x2901, GO_key, 0, GO)
HANDLE_DW_AT(0x2902, GO_elem, 0, GO)
HANDLE_DW_AT(0x2903, GO_embedded_field, 0, GO)
HANDLE_DW_AT(0x2904, GO_runtime_type, 0, GO)
HANDLE_DW_AT(0x3210, UPC_threads_scaled, 0, UPC)
HANDLE_DW_AT(0x393e, IBM_wsa_addr, 0, IBM)
HANDLE_DW_AT(0x393f, IBM_home_location, 0, IBM)
HANDLE_DW_AT(0x3940, IBM_alt_srcview, 0, IBM)
// PGI extensions (STMicroelectronics)
HANDLE_DW_AT(0x3a00, PGI_lbase, 0, PGI)
HANDLE_DW_AT(0x3a01, PGI_soffset, 0, PGI)
HANDLE_DW_AT(0x3a02, PGI_lstride, 0, PGI)
// Borland extensions.
HANDLE_DW_AT(0x3b11, BORLAND_property_read, 0, BORLAND)
HANDLE_DW_AT(0x3b12, BORLAND_property_write, 0, BORLAND)
HANDLE_DW_AT(0x3b13, BORLAND_property_implements, 0, BORLAND)
HANDLE_DW_AT(0x3b14, BORLAND_property_index, 0, BORLAND)
HANDLE_DW_AT(0x3b15, BORLAND_property_default, 0, BORLAND)
HANDLE_DW_AT(0x3b20, BORLAND_Delphi_unit, 0, BORLAND)
HANDLE_DW_AT(0x3b21, BORLAND_Delphi_class, 0, BORLAND)
HANDLE_DW_AT(0x3b22, BORLAND_Delphi_record, 0, BORLAND)
HANDLE_DW_AT(0x3b23, BORLAND_Delphi_metaclass, 0, BORLAND)
HANDLE_DW_AT(0x3b24, BORLAND_Delphi_constructor, 0, BORLAND)
HANDLE_DW_AT(0x3b25, BORLAND_Delphi_destructor, 0, BORLAND)
HANDLE_DW_AT(0x3b26, BORLAND_Delphi_anonymous_method, 0, BORLAND)
HANDLE_DW_AT(0x3b27, BORLAND_Delphi_interface, 0, BORLAND)
HANDLE_DW_AT(0x3b28, BORLAND_Delphi_ABI, 0, BORLAND)
HANDLE_DW_AT(0x3b29, BORLAND_Delphi_return, 0, BORLAND)
HANDLE_DW_AT(0x3b30, BORLAND_Delphi_frameptr, 0, BORLAND)
HANDLE_DW_AT(0x3b31, BORLAND_closure, 0, BORLAND)
// LLVM project extensions.
HANDLE_DW_AT(0x3e00, LLVM_include_path, 0, LLVM)
HANDLE_DW_AT(0x3e01, LLVM_config_macros, 0, LLVM)
HANDLE_DW_AT(0x3e02, LLVM_sysroot, 0, LLVM)
HANDLE_DW_AT(0x3e03, LLVM_tag_offset, 0, LLVM)
HANDLE_DW_AT(0x3e04, LLVM_ptrauth_key, 0, LLVM)
HANDLE_DW_AT(0x3e05, LLVM_ptrauth_address_discriminated, 0, LLVM)
HANDLE_DW_AT(0x3e06, LLVM_ptrauth_extra_discriminator, 0, LLVM)
HANDLE_DW_AT(0x3e07, LLVM_apinotes, 0, APPLE)
HANDLE_DW_AT(0x3e08, LLVM_ptrauth_isa_pointer, 0, LLVM)
HANDLE_DW_AT(0x3e09, LLVM_ptrauth_authenticates_null_values, 0, LLVM)
// Apple extensions.
HANDLE_DW_AT(0x3fe1, APPLE_optimized, 0, APPLE)
HANDLE_DW_AT(0x3fe2, APPLE_flags, 0, APPLE)
HANDLE_DW_AT(0x3fe3, APPLE_isa, 0, APPLE)
HANDLE_DW_AT(0x3fe4, APPLE_block, 0, APPLE)
HANDLE_DW_AT(0x3fe5, APPLE_major_runtime_vers, 0, APPLE)
HANDLE_DW_AT(0x3fe6, APPLE_runtime_class, 0, APPLE)
HANDLE_DW_AT(0x3fe7, APPLE_omit_frame_ptr, 0, APPLE)
HANDLE_DW_AT(0x3fe8, APPLE_property_name, 0, APPLE)
HANDLE_DW_AT(0x3fe9, APPLE_property_getter, 0, APPLE)
HANDLE_DW_AT(0x3fea, APPLE_property_setter, 0, APPLE)
HANDLE_DW_AT(0x3feb, APPLE_property_attribute, 0, APPLE)
HANDLE_DW_AT(0x3fec, APPLE_objc_complete_type, 0, APPLE)
HANDLE_DW_AT(0x3fed, APPLE_property, 0, APPLE)
HANDLE_DW_AT(0x3fee, APPLE_objc_direct, 0, APPLE)
HANDLE_DW_AT(0x3fef, APPLE_sdk, 0, APPLE)
// Attribute form encodings.
HANDLE_DW_FORM(0x01, addr, 2, DWARF)
HANDLE_DW_FORM(0x03, block2, 2, DWARF)
HANDLE_DW_FORM(0x04, block4, 2, DWARF)
HANDLE_DW_FORM(0x05, data2, 2, DWARF)
HANDLE_DW_FORM(0x06, data4, 2, DWARF)
HANDLE_DW_FORM(0x07, data8, 2, DWARF)
HANDLE_DW_FORM(0x08, string, 2, DWARF)
HANDLE_DW_FORM(0x09, block, 2, DWARF)
HANDLE_DW_FORM(0x0a, block1, 2, DWARF)
HANDLE_DW_FORM(0x0b, data1, 2, DWARF)
HANDLE_DW_FORM(0x0c, flag, 2, DWARF)
HANDLE_DW_FORM(0x0d, sdata, 2, DWARF)
HANDLE_DW_FORM(0x0e, strp, 2, DWARF)
HANDLE_DW_FORM(0x0f, udata, 2, DWARF)
HANDLE_DW_FORM(0x10, ref_addr, 2, DWARF)
HANDLE_DW_FORM(0x11, ref1, 2, DWARF)
HANDLE_DW_FORM(0x12, ref2, 2, DWARF)
HANDLE_DW_FORM(0x13, ref4, 2, DWARF)
HANDLE_DW_FORM(0x14, ref8, 2, DWARF)
HANDLE_DW_FORM(0x15, ref_udata, 2, DWARF)
HANDLE_DW_FORM(0x16, indirect, 2, DWARF)
// New in DWARF v4:
HANDLE_DW_FORM(0x17, sec_offset, 4, DWARF)
HANDLE_DW_FORM(0x18, exprloc, 4, DWARF)
HANDLE_DW_FORM(0x19, flag_present, 4, DWARF)
// This was defined out of sequence.
HANDLE_DW_FORM(0x20, ref_sig8, 4, DWARF)
// New in DWARF v5:
HANDLE_DW_FORM(0x1a, strx, 5, DWARF)
HANDLE_DW_FORM(0x1b, addrx, 5, DWARF)
HANDLE_DW_FORM(0x1c, ref_sup4, 5, DWARF)
HANDLE_DW_FORM(0x1d, strp_sup, 5, DWARF)
HANDLE_DW_FORM(0x1e, data16, 5, DWARF)
HANDLE_DW_FORM(0x1f, line_strp, 5, DWARF)
HANDLE_DW_FORM(0x21, implicit_const, 5, DWARF)
HANDLE_DW_FORM(0x22, loclistx, 5, DWARF)
HANDLE_DW_FORM(0x23, rnglistx, 5, DWARF)
HANDLE_DW_FORM(0x24, ref_sup8, 5, DWARF)
HANDLE_DW_FORM(0x25, strx1, 5, DWARF)
HANDLE_DW_FORM(0x26, strx2, 5, DWARF)
HANDLE_DW_FORM(0x27, strx3, 5, DWARF)
HANDLE_DW_FORM(0x28, strx4, 5, DWARF)
HANDLE_DW_FORM(0x29, addrx1, 5, DWARF)
HANDLE_DW_FORM(0x2a, addrx2, 5, DWARF)
HANDLE_DW_FORM(0x2b, addrx3, 5, DWARF)
HANDLE_DW_FORM(0x2c, addrx4, 5, DWARF)
// Extensions for Fission proposal
HANDLE_DW_FORM(0x1f01, GNU_addr_index, 0, GNU)
HANDLE_DW_FORM(0x1f02, GNU_str_index, 0, GNU)
// Alternate debug sections proposal (output of "dwz" tool).
HANDLE_DW_FORM(0x1f20, GNU_ref_alt, 0, GNU)
HANDLE_DW_FORM(0x1f21, GNU_strp_alt, 0, GNU)
// LLVM addr+offset extension
HANDLE_DW_FORM(0x2001, LLVM_addrx_offset, 0, LLVM)
// DWARF Expression operators.
HANDLE_DW_OP(0x03, addr, 2, DWARF)
HANDLE_DW_OP(0x06, deref, 2, DWARF)
HANDLE_DW_OP(0x08, const1u, 2, DWARF)
HANDLE_DW_OP(0x09, const1s, 2, DWARF)
HANDLE_DW_OP(0x0a, const2u, 2, DWARF)
HANDLE_DW_OP(0x0b, const2s, 2, DWARF)
HANDLE_DW_OP(0x0c, const4u, 2, DWARF)
HANDLE_DW_OP(0x0d, const4s, 2, DWARF)
HANDLE_DW_OP(0x0e, const8u, 2, DWARF)
HANDLE_DW_OP(0x0f, const8s, 2, DWARF)
HANDLE_DW_OP(0x10, constu, 2, DWARF)
HANDLE_DW_OP(0x11, consts, 2, DWARF)
HANDLE_DW_OP(0x12, dup, 2, DWARF)
HANDLE_DW_OP(0x13, drop, 2, DWARF)
HANDLE_DW_OP(0x14, over, 2, DWARF)
HANDLE_DW_OP(0x15, pick, 2, DWARF)
HANDLE_DW_OP(0x16, swap, 2, DWARF)
HANDLE_DW_OP(0x17, rot, 2, DWARF)
HANDLE_DW_OP(0x18, xderef, 2, DWARF)
HANDLE_DW_OP(0x19, abs, 2, DWARF)
HANDLE_DW_OP(0x1a, and, 2, DWARF)
HANDLE_DW_OP(0x1b, div, 2, DWARF)
HANDLE_DW_OP(0x1c, minus, 2, DWARF)
HANDLE_DW_OP(0x1d, mod, 2, DWARF)
HANDLE_DW_OP(0x1e, mul, 2, DWARF)
HANDLE_DW_OP(0x1f, neg, 2, DWARF)
HANDLE_DW_OP(0x20, not, 2, DWARF)
HANDLE_DW_OP(0x21, or, 2, DWARF)
HANDLE_DW_OP(0x22, plus, 2, DWARF)
HANDLE_DW_OP(0x23, plus_uconst, 2, DWARF)
HANDLE_DW_OP(0x24, shl, 2, DWARF)
HANDLE_DW_OP(0x25, shr, 2, DWARF)
HANDLE_DW_OP(0x26, shra, 2, DWARF)
HANDLE_DW_OP(0x27, xor, 2, DWARF)
HANDLE_DW_OP(0x28, bra, 2, DWARF)
HANDLE_DW_OP(0x29, eq, 2, DWARF)
HANDLE_DW_OP(0x2a, ge, 2, DWARF)
HANDLE_DW_OP(0x2b, gt, 2, DWARF)
HANDLE_DW_OP(0x2c, le, 2, DWARF)
HANDLE_DW_OP(0x2d, lt, 2, DWARF)
HANDLE_DW_OP(0x2e, ne, 2, DWARF)
HANDLE_DW_OP(0x2f, skip, 2, DWARF)
HANDLE_DW_OP(0x30, lit0, 2, DWARF)
HANDLE_DW_OP(0x31, lit1, 2, DWARF)
HANDLE_DW_OP(0x32, lit2, 2, DWARF)
HANDLE_DW_OP(0x33, lit3, 2, DWARF)
HANDLE_DW_OP(0x34, lit4, 2, DWARF)
HANDLE_DW_OP(0x35, lit5, 2, DWARF)
HANDLE_DW_OP(0x36, lit6, 2, DWARF)
HANDLE_DW_OP(0x37, lit7, 2, DWARF)
HANDLE_DW_OP(0x38, lit8, 2, DWARF)
HANDLE_DW_OP(0x39, lit9, 2, DWARF)
HANDLE_DW_OP(0x3a, lit10, 2, DWARF)
HANDLE_DW_OP(0x3b, lit11, 2, DWARF)
HANDLE_DW_OP(0x3c, lit12, 2, DWARF)
HANDLE_DW_OP(0x3d, lit13, 2, DWARF)
HANDLE_DW_OP(0x3e, lit14, 2, DWARF)
HANDLE_DW_OP(0x3f, lit15, 2, DWARF)
HANDLE_DW_OP(0x40, lit16, 2, DWARF)
HANDLE_DW_OP(0x41, lit17, 2, DWARF)
HANDLE_DW_OP(0x42, lit18, 2, DWARF)
HANDLE_DW_OP(0x43, lit19, 2, DWARF)
HANDLE_DW_OP(0x44, lit20, 2, DWARF)
HANDLE_DW_OP(0x45, lit21, 2, DWARF)
HANDLE_DW_OP(0x46, lit22, 2, DWARF)
HANDLE_DW_OP(0x47, lit23, 2, DWARF)
HANDLE_DW_OP(0x48, lit24, 2, DWARF)
HANDLE_DW_OP(0x49, lit25, 2, DWARF)
HANDLE_DW_OP(0x4a, lit26, 2, DWARF)
HANDLE_DW_OP(0x4b, lit27, 2, DWARF)
HANDLE_DW_OP(0x4c, lit28, 2, DWARF)
HANDLE_DW_OP(0x4d, lit29, 2, DWARF)
HANDLE_DW_OP(0x4e, lit30, 2, DWARF)
HANDLE_DW_OP(0x4f, lit31, 2, DWARF)
HANDLE_DW_OP(0x50, reg0, 2, DWARF)
HANDLE_DW_OP(0x51, reg1, 2, DWARF)
HANDLE_DW_OP(0x52, reg2, 2, DWARF)
HANDLE_DW_OP(0x53, reg3, 2, DWARF)
HANDLE_DW_OP(0x54, reg4, 2, DWARF)
HANDLE_DW_OP(0x55, reg5, 2, DWARF)
HANDLE_DW_OP(0x56, reg6, 2, DWARF)
HANDLE_DW_OP(0x57, reg7, 2, DWARF)
HANDLE_DW_OP(0x58, reg8, 2, DWARF)
HANDLE_DW_OP(0x59, reg9, 2, DWARF)
HANDLE_DW_OP(0x5a, reg10, 2, DWARF)
HANDLE_DW_OP(0x5b, reg11, 2, DWARF)
HANDLE_DW_OP(0x5c, reg12, 2, DWARF)
HANDLE_DW_OP(0x5d, reg13, 2, DWARF)
HANDLE_DW_OP(0x5e, reg14, 2, DWARF)
HANDLE_DW_OP(0x5f, reg15, 2, DWARF)
HANDLE_DW_OP(0x60, reg16, 2, DWARF)
HANDLE_DW_OP(0x61, reg17, 2, DWARF)
HANDLE_DW_OP(0x62, reg18, 2, DWARF)
HANDLE_DW_OP(0x63, reg19, 2, DWARF)
HANDLE_DW_OP(0x64, reg20, 2, DWARF)
HANDLE_DW_OP(0x65, reg21, 2, DWARF)
HANDLE_DW_OP(0x66, reg22, 2, DWARF)
HANDLE_DW_OP(0x67, reg23, 2, DWARF)
HANDLE_DW_OP(0x68, reg24, 2, DWARF)
HANDLE_DW_OP(0x69, reg25, 2, DWARF)
HANDLE_DW_OP(0x6a, reg26, 2, DWARF)
HANDLE_DW_OP(0x6b, reg27, 2, DWARF)
HANDLE_DW_OP(0x6c, reg28, 2, DWARF)
HANDLE_DW_OP(0x6d, reg29, 2, DWARF)
HANDLE_DW_OP(0x6e, reg30, 2, DWARF)
HANDLE_DW_OP(0x6f, reg31, 2, DWARF)
HANDLE_DW_OP(0x70, breg0, 2, DWARF)
HANDLE_DW_OP(0x71, breg1, 2, DWARF)
HANDLE_DW_OP(0x72, breg2, 2, DWARF)
HANDLE_DW_OP(0x73, breg3, 2, DWARF)
HANDLE_DW_OP(0x74, breg4, 2, DWARF)
HANDLE_DW_OP(0x75, breg5, 2, DWARF)
HANDLE_DW_OP(0x76, breg6, 2, DWARF)
HANDLE_DW_OP(0x77, breg7, 2, DWARF)
HANDLE_DW_OP(0x78, breg8, 2, DWARF)
HANDLE_DW_OP(0x79, breg9, 2, DWARF)
HANDLE_DW_OP(0x7a, breg10, 2, DWARF)
HANDLE_DW_OP(0x7b, breg11, 2, DWARF)
HANDLE_DW_OP(0x7c, breg12, 2, DWARF)
HANDLE_DW_OP(0x7d, breg13, 2, DWARF)
HANDLE_DW_OP(0x7e, breg14, 2, DWARF)
HANDLE_DW_OP(0x7f, breg15, 2, DWARF)
HANDLE_DW_OP(0x80, breg16, 2, DWARF)
HANDLE_DW_OP(0x81, breg17, 2, DWARF)
HANDLE_DW_OP(0x82, breg18, 2, DWARF)
HANDLE_DW_OP(0x83, breg19, 2, DWARF)
HANDLE_DW_OP(0x84, breg20, 2, DWARF)
HANDLE_DW_OP(0x85, breg21, 2, DWARF)
HANDLE_DW_OP(0x86, breg22, 2, DWARF)
HANDLE_DW_OP(0x87, breg23, 2, DWARF)
HANDLE_DW_OP(0x88, breg24, 2, DWARF)
HANDLE_DW_OP(0x89, breg25, 2, DWARF)
HANDLE_DW_OP(0x8a, breg26, 2, DWARF)
HANDLE_DW_OP(0x8b, breg27, 2, DWARF)
HANDLE_DW_OP(0x8c, breg28, 2, DWARF)
HANDLE_DW_OP(0x8d, breg29, 2, DWARF)
HANDLE_DW_OP(0x8e, breg30, 2, DWARF)
HANDLE_DW_OP(0x8f, breg31, 2, DWARF)
HANDLE_DW_OP(0x90, regx, 2, DWARF)
HANDLE_DW_OP(0x91, fbreg, 2, DWARF)
HANDLE_DW_OP(0x92, bregx, 2, DWARF)
HANDLE_DW_OP(0x93, piece, 2, DWARF)
HANDLE_DW_OP(0x94, deref_size, 2, DWARF)
HANDLE_DW_OP(0x95, xderef_size, 2, DWARF)
HANDLE_DW_OP(0x96, nop, 2, DWARF)
// New in DWARF v3:
HANDLE_DW_OP(0x97, push_object_address, 3, DWARF)
HANDLE_DW_OP(0x98, call2, 3, DWARF)
HANDLE_DW_OP(0x99, call4, 3, DWARF)
HANDLE_DW_OP(0x9a, call_ref, 3, DWARF)
HANDLE_DW_OP(0x9b, form_tls_address, 3, DWARF)
HANDLE_DW_OP(0x9c, call_frame_cfa, 3, DWARF)
HANDLE_DW_OP(0x9d, bit_piece, 3, DWARF)
// New in DWARF v4:
HANDLE_DW_OP(0x9e, implicit_value, 4, DWARF)
HANDLE_DW_OP(0x9f, stack_value, 4, DWARF)
// New in DWARF v5:
HANDLE_DW_OP(0xa0, implicit_pointer, 5, DWARF)
HANDLE_DW_OP(0xa1, addrx, 5, DWARF)
HANDLE_DW_OP(0xa2, constx, 5, DWARF)
HANDLE_DW_OP(0xa3, entry_value, 5, DWARF)
HANDLE_DW_OP(0xa4, const_type, 5, DWARF)
HANDLE_DW_OP(0xa5, regval_type, 5, DWARF)
HANDLE_DW_OP(0xa6, deref_type, 5, DWARF)
HANDLE_DW_OP(0xa7, xderef_type, 5, DWARF)
HANDLE_DW_OP(0xa8, convert, 5, DWARF)
HANDLE_DW_OP(0xa9, reinterpret, 5, DWARF)
// Vendor extensions:
// Extensions for GNU-style thread-local storage.
HANDLE_DW_OP(0xe0, GNU_push_tls_address, 0, GNU)
// Conflicting:
// HANDLE_DW_OP(0xe0, HP_unknown, 0, HP)
HANDLE_DW_OP(0xe1, HP_is_value, 0, HP)
HANDLE_DW_OP(0xe2, HP_fltconst4, 0, HP)
HANDLE_DW_OP(0xe3, HP_fltconst8, 0, HP)
HANDLE_DW_OP(0xe4, HP_mod_range, 0, HP)
HANDLE_DW_OP(0xe5, HP_unmod_range, 0, HP)
HANDLE_DW_OP(0xe6, HP_tls, 0, HP)
HANDLE_DW_OP(0xe8, INTEL_bit_piece, 0, INTEL)
// Extensions for WebAssembly.
HANDLE_DW_OP(0xed, WASM_location, 0, WASM)
HANDLE_DW_OP(0xee, WASM_location_int, 0, WASM)
// Historic and not implemented in LLVM.
HANDLE_DW_OP(0xf0, APPLE_uninit, 0, APPLE)
// The GNU entry value extension.
HANDLE_DW_OP(0xf3, GNU_entry_value, 0, GNU)
HANDLE_DW_OP(0xf8, PGI_omp_thread_num, 0, PGI)
// Extensions for Fission proposal.
HANDLE_DW_OP(0xfb, GNU_addr_index, 0, GNU)
HANDLE_DW_OP(0xfc, GNU_const_index, 0, GNU)
// DW_OP_LLVM_user has two operands:
// (1) An unsigned LEB128 "LLVM Vendor Extension Opcode".
// (2) Zero or more literal operands, the number and type of which are
// implied by the opcode (1).
// DW_OP_LLVM_user acts as an extension multiplexer, opening up the encoding
// space to accommodate an infinite number of extensions. This better reflects
// the de-facto permanent allocation of extensions.
HANDLE_DW_OP(0xe9, LLVM_user, 0, LLVM)
// "LLVM Vendor Extension" operations under the DW_OP_LLVM_user encoding
// scheme. This list is authoritative and exhaustive. Once an operation is
// registered here it cannot be removed nor have its encoding changed. The
// encoding space must skip zero (which is reserved) and have no gaps.
//
// The DW_OP_LLVM_user DW_OP_LLVM_nop operation has no effect on the
// location stack or any of its values. It is defined as a placeholder for
// testing purposes.
HANDLE_DW_OP_LLVM_USEROP(0x0001, nop)
// DWARF languages.
HANDLE_DW_LANG(0x0001, C89, 0, 2, DWARF)
HANDLE_DW_LANG(0x0002, C, 0, 2, DWARF)
HANDLE_DW_LANG(0x0003, Ada83, 1, 2, DWARF)
HANDLE_DW_LANG(0x0004, C_plus_plus, 0, 2, DWARF)
HANDLE_DW_LANG(0x0005, Cobol74, 1, 2, DWARF)
HANDLE_DW_LANG(0x0006, Cobol85, 1, 2, DWARF)
HANDLE_DW_LANG(0x0007, Fortran77, 1, 2, DWARF)
HANDLE_DW_LANG(0x0008, Fortran90, 1, 2, DWARF)
HANDLE_DW_LANG(0x0009, Pascal83, 1, 2, DWARF)
HANDLE_DW_LANG(0x000a, Modula2, 1, 2, DWARF)
// New in DWARF v3:
HANDLE_DW_LANG(0x000b, Java, 0, 3, DWARF)
HANDLE_DW_LANG(0x000c, C99, 0, 3, DWARF)
HANDLE_DW_LANG(0x000d, Ada95, 1, 3, DWARF)
HANDLE_DW_LANG(0x000e, Fortran95, 1, 3, DWARF)
HANDLE_DW_LANG(0x000f, PLI, 1, 3, DWARF)
HANDLE_DW_LANG(0x0010, ObjC, 0, 3, DWARF)
HANDLE_DW_LANG(0x0011, ObjC_plus_plus, 0, 3, DWARF)
HANDLE_DW_LANG(0x0012, UPC, 0, 3, DWARF)
HANDLE_DW_LANG(0x0013, D, 0, 3, DWARF)
// New in DWARF v4:
HANDLE_DW_LANG(0x0014, Python, 0, 4, DWARF)
// New in DWARF v5:
HANDLE_DW_LANG(0x0015, OpenCL, 0, 5, DWARF)
HANDLE_DW_LANG(0x0016, Go, 0, 5, DWARF)
HANDLE_DW_LANG(0x0017, Modula3, 1, 5, DWARF)
HANDLE_DW_LANG(0x0018, Haskell, 0, 5, DWARF)
HANDLE_DW_LANG(0x0019, C_plus_plus_03, 0, 5, DWARF)
HANDLE_DW_LANG(0x001a, C_plus_plus_11, 0, 5, DWARF)
HANDLE_DW_LANG(0x001b, OCaml, 0, 5, DWARF)
HANDLE_DW_LANG(0x001c, Rust, 0, 5, DWARF)
HANDLE_DW_LANG(0x001d, C11, 0, 5, DWARF)
HANDLE_DW_LANG(0x001e, Swift, 0, 5, DWARF)
HANDLE_DW_LANG(0x001f, Julia, 1, 5, DWARF)
HANDLE_DW_LANG(0x0020, Dylan, 0, 5, DWARF)
HANDLE_DW_LANG(0x0021, C_plus_plus_14, 0, 5, DWARF)
HANDLE_DW_LANG(0x0022, Fortran03, 1, 5, DWARF)
HANDLE_DW_LANG(0x0023, Fortran08, 1, 5, DWARF)
HANDLE_DW_LANG(0x0024, RenderScript, 0, 5, DWARF)
HANDLE_DW_LANG(0x0025, BLISS, 0, 5, DWARF)
// New since DWARF v5:
HANDLE_DW_LANG(0x0026, Kotlin, 0, 0, DWARF)
HANDLE_DW_LANG(0x0027, Zig, 0, 0, DWARF)
HANDLE_DW_LANG(0x0028, Crystal, 0, 0, DWARF)
HANDLE_DW_LANG(0x002a, C_plus_plus_17, 0, 0, DWARF)
HANDLE_DW_LANG(0x002b, C_plus_plus_20, 0, 0, DWARF)
HANDLE_DW_LANG(0x002c, C17, 0, 0, DWARF)
HANDLE_DW_LANG(0x002d, Fortran18, 0, 0, DWARF)
HANDLE_DW_LANG(0x002e, Ada2005, 0, 0, DWARF)
HANDLE_DW_LANG(0x002f, Ada2012, 0, 0, DWARF)
HANDLE_DW_LANG(0x0033, Mojo, 0, 0, DWARF)
// Vendor extensions:
HANDLE_DW_LANG(0x8001, Mips_Assembler, std::nullopt, 0, MIPS)
HANDLE_DW_LANG(0x8e57, GOOGLE_RenderScript, 0, 0, GOOGLE)
HANDLE_DW_LANG(0xb000, BORLAND_Delphi, 0, 0, BORLAND)
// DWARF attribute type encodings.
HANDLE_DW_ATE(0x01, address, 2, DWARF)
HANDLE_DW_ATE(0x02, boolean, 2, DWARF)
HANDLE_DW_ATE(0x03, complex_float, 2, DWARF)
HANDLE_DW_ATE(0x04, float, 2, DWARF)
HANDLE_DW_ATE(0x05, signed, 2, DWARF)
HANDLE_DW_ATE(0x06, signed_char, 2, DWARF)
HANDLE_DW_ATE(0x07, unsigned, 2, DWARF)
HANDLE_DW_ATE(0x08, unsigned_char, 2, DWARF)
// New in DWARF v3:
HANDLE_DW_ATE(0x09, imaginary_float, 3, DWARF)
HANDLE_DW_ATE(0x0a, packed_decimal, 3, DWARF)
HANDLE_DW_ATE(0x0b, numeric_string, 3, DWARF)
HANDLE_DW_ATE(0x0c, edited, 3, DWARF)
HANDLE_DW_ATE(0x0d, signed_fixed, 3, DWARF)
HANDLE_DW_ATE(0x0e, unsigned_fixed, 3, DWARF)
HANDLE_DW_ATE(0x0f, decimal_float, 3, DWARF)
// New in DWARF v4:
HANDLE_DW_ATE(0x10, UTF, 4, DWARF)
// New in DWARF v5:
HANDLE_DW_ATE(0x11, UCS, 5, DWARF)
HANDLE_DW_ATE(0x12, ASCII, 5, DWARF)
// The version numbers of all vendor extensions >0x80 were guessed.
// Conflicting:
// HANDLE_DW_ATE(0x80, ALTIUM_fract, 2, ALTIUM) = DW_ATE_low_user
// HANDLE_DW_ATE(0x81, ALTIUM_accum, 2, ALTIUM)
HANDLE_DW_ATE(0x81, HP_complex_float, 2, HP)
HANDLE_DW_ATE(0x82, HP_float128, 2, HP)
HANDLE_DW_ATE(0x83, HP_complex_float128, 2, HP)
HANDLE_DW_ATE(0x84, HP_floathpintel, 2, HP)
HANDLE_DW_ATE(0x85, HP_imaginary_float90, 2, HP)
HANDLE_DW_ATE(0x86, HP_imaginary_float128, 2, HP)
// Conflicting:
// HANDLE_DW_ATE(0x86, SUN_imaginary_float, 2, SUN)
// DWARF attribute endianity
HANDLE_DW_END(0x00, default)
HANDLE_DW_END(0x01, big)
HANDLE_DW_END(0x02, little)
// DWARF virtuality codes.
HANDLE_DW_VIRTUALITY(0x00, none)
HANDLE_DW_VIRTUALITY(0x01, virtual)
HANDLE_DW_VIRTUALITY(0x02, pure_virtual)
// DWARF v5 Defaulted Member Encodings.
HANDLE_DW_DEFAULTED(0x00, no)
HANDLE_DW_DEFAULTED(0x01, in_class)
HANDLE_DW_DEFAULTED(0x02, out_of_class)
// DWARF calling convention codes.
HANDLE_DW_CC(0x01, normal)
HANDLE_DW_CC(0x02, program)
HANDLE_DW_CC(0x03, nocall)
// New in DWARF v5:
HANDLE_DW_CC(0x04, pass_by_reference)
HANDLE_DW_CC(0x05, pass_by_value)
// Vendor extensions:
HANDLE_DW_CC(0x40, GNU_renesas_sh)
HANDLE_DW_CC(0x41, GNU_borland_fastcall_i386)
HANDLE_DW_CC(0xb0, BORLAND_safecall)
HANDLE_DW_CC(0xb1, BORLAND_stdcall)
HANDLE_DW_CC(0xb2, BORLAND_pascal)
HANDLE_DW_CC(0xb3, BORLAND_msfastcall)
HANDLE_DW_CC(0xb4, BORLAND_msreturn)
HANDLE_DW_CC(0xb5, BORLAND_thiscall)
HANDLE_DW_CC(0xb6, BORLAND_fastcall)
HANDLE_DW_CC(0xc0, LLVM_vectorcall)
HANDLE_DW_CC(0xc1, LLVM_Win64)
HANDLE_DW_CC(0xc2, LLVM_X86_64SysV)
HANDLE_DW_CC(0xc3, LLVM_AAPCS)
HANDLE_DW_CC(0xc4, LLVM_AAPCS_VFP)
HANDLE_DW_CC(0xc5, LLVM_IntelOclBicc)
HANDLE_DW_CC(0xc6, LLVM_SpirFunction)
HANDLE_DW_CC(0xc7, LLVM_OpenCLKernel)
HANDLE_DW_CC(0xc8, LLVM_Swift)
HANDLE_DW_CC(0xc9, LLVM_PreserveMost)
HANDLE_DW_CC(0xca, LLVM_PreserveAll)
HANDLE_DW_CC(0xcb, LLVM_X86RegCall)
// From GCC source code (include/dwarf2.h): This DW_CC_ value is not currently
// generated by any toolchain. It is used internally to GDB to indicate OpenCL
// C functions that have been compiled with the IBM XL C for OpenCL compiler and
// use a non-platform calling convention for passing OpenCL C vector types.
HANDLE_DW_CC(0xff, GDB_IBM_OpenCL)
// Line Number Extended Opcode Encodings
HANDLE_DW_LNE(0x01, end_sequence)
HANDLE_DW_LNE(0x02, set_address)
HANDLE_DW_LNE(0x03, define_file)
// New in DWARF v4:
HANDLE_DW_LNE(0x04, set_discriminator)
// Line Number Standard Opcode Encodings.
HANDLE_DW_LNS(0x00, extended_op)
HANDLE_DW_LNS(0x01, copy)
HANDLE_DW_LNS(0x02, advance_pc)
HANDLE_DW_LNS(0x03, advance_line)
HANDLE_DW_LNS(0x04, set_file)
HANDLE_DW_LNS(0x05, set_column)
HANDLE_DW_LNS(0x06, negate_stmt)
HANDLE_DW_LNS(0x07, set_basic_block)
HANDLE_DW_LNS(0x08, const_add_pc)
HANDLE_DW_LNS(0x09, fixed_advance_pc)
// New in DWARF v3:
HANDLE_DW_LNS(0x0a, set_prologue_end)
HANDLE_DW_LNS(0x0b, set_epilogue_begin)
HANDLE_DW_LNS(0x0c, set_isa)
// DWARF v5 Line number header entry format.
HANDLE_DW_LNCT(0x01, path)
HANDLE_DW_LNCT(0x02, directory_index)
HANDLE_DW_LNCT(0x03, timestamp)
HANDLE_DW_LNCT(0x04, size)
HANDLE_DW_LNCT(0x05, MD5)
// A vendor extension until http://dwarfstd.org/ShowIssue.php?issue=180201.1 is
// accepted and incorporated into the next DWARF standard.
HANDLE_DW_LNCT(0x2001, LLVM_source)
// DWARF v5 Macro information.
HANDLE_DW_MACRO(0x01, define)
HANDLE_DW_MACRO(0x02, undef)
HANDLE_DW_MACRO(0x03, start_file)
HANDLE_DW_MACRO(0x04, end_file)
HANDLE_DW_MACRO(0x05, define_strp)
HANDLE_DW_MACRO(0x06, undef_strp)
HANDLE_DW_MACRO(0x07, import)
HANDLE_DW_MACRO(0x08, define_sup)
HANDLE_DW_MACRO(0x09, undef_sup)
HANDLE_DW_MACRO(0x0a, import_sup)
HANDLE_DW_MACRO(0x0b, define_strx)
HANDLE_DW_MACRO(0x0c, undef_strx)
// GNU .debug_macro extension.
HANDLE_DW_MACRO_GNU(0x01, define)
HANDLE_DW_MACRO_GNU(0x02, undef)
HANDLE_DW_MACRO_GNU(0x03, start_file)
HANDLE_DW_MACRO_GNU(0x04, end_file)
HANDLE_DW_MACRO_GNU(0x05, define_indirect)
HANDLE_DW_MACRO_GNU(0x06, undef_indirect)
HANDLE_DW_MACRO_GNU(0x07, transparent_include)
HANDLE_DW_MACRO_GNU(0x08, define_indirect_alt)
HANDLE_DW_MACRO_GNU(0x09, undef_indirect_alt)
HANDLE_DW_MACRO_GNU(0x0a, transparent_include_alt)
// DWARF v5 Macro header flags.
HANDLE_MACRO_FLAG(0x01, OFFSET_SIZE)
HANDLE_MACRO_FLAG(0x02, DEBUG_LINE_OFFSET)
HANDLE_MACRO_FLAG(0x04, OPCODE_OPERANDS_TABLE)
// DWARF v5 Range List Entry encoding values.
HANDLE_DW_RLE(0x00, end_of_list)
HANDLE_DW_RLE(0x01, base_addressx)
HANDLE_DW_RLE(0x02, startx_endx)
HANDLE_DW_RLE(0x03, startx_length)
HANDLE_DW_RLE(0x04, offset_pair)
HANDLE_DW_RLE(0x05, base_address)
HANDLE_DW_RLE(0x06, start_end)
HANDLE_DW_RLE(0x07, start_length)
// DWARF v5 Loc List Entry encoding values.
HANDLE_DW_LLE(0x00, end_of_list)
HANDLE_DW_LLE(0x01, base_addressx)
HANDLE_DW_LLE(0x02, startx_endx)
HANDLE_DW_LLE(0x03, startx_length)
HANDLE_DW_LLE(0x04, offset_pair)
HANDLE_DW_LLE(0x05, default_location)
HANDLE_DW_LLE(0x06, base_address)
HANDLE_DW_LLE(0x07, start_end)
HANDLE_DW_LLE(0x08, start_length)
// Call frame instruction encodings.
HANDLE_DW_CFA(0x00, nop)
HANDLE_DW_CFA(0x40, advance_loc)
HANDLE_DW_CFA(0x80, offset)
HANDLE_DW_CFA(0xc0, restore)
HANDLE_DW_CFA(0x01, set_loc)
HANDLE_DW_CFA(0x02, advance_loc1)
HANDLE_DW_CFA(0x03, advance_loc2)
HANDLE_DW_CFA(0x04, advance_loc4)
HANDLE_DW_CFA(0x05, offset_extended)
HANDLE_DW_CFA(0x06, restore_extended)
HANDLE_DW_CFA(0x07, undefined)
HANDLE_DW_CFA(0x08, same_value)
HANDLE_DW_CFA(0x09, register)
HANDLE_DW_CFA(0x0a, remember_state)
HANDLE_DW_CFA(0x0b, restore_state)
HANDLE_DW_CFA(0x0c, def_cfa)
HANDLE_DW_CFA(0x0d, def_cfa_register)
HANDLE_DW_CFA(0x0e, def_cfa_offset)
// New in DWARF v3:
HANDLE_DW_CFA(0x0f, def_cfa_expression)
HANDLE_DW_CFA(0x10, expression)
HANDLE_DW_CFA(0x11, offset_extended_sf)
HANDLE_DW_CFA(0x12, def_cfa_sf)
HANDLE_DW_CFA(0x13, def_cfa_offset_sf)
HANDLE_DW_CFA(0x14, val_offset)
HANDLE_DW_CFA(0x15, val_offset_sf)
HANDLE_DW_CFA(0x16, val_expression)
// Vendor extensions:
HANDLE_DW_CFA_PRED(0x1d, MIPS_advance_loc8, SELECT_MIPS64)
HANDLE_DW_CFA_PRED(0x2d, GNU_window_save, SELECT_SPARC)
HANDLE_DW_CFA_PRED(0x2d, AARCH64_negate_ra_state, SELECT_AARCH64)
HANDLE_DW_CFA_PRED(0x2e, GNU_args_size, SELECT_X86)
// Heterogeneous Debugging Extension defined at
// https://llvm.org/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.html#cfa-definition-instructions
HANDLE_DW_CFA(0x30, LLVM_def_aspace_cfa)
HANDLE_DW_CFA(0x31, LLVM_def_aspace_cfa_sf)
// Apple Objective-C Property Attributes.
// Keep this list in sync with clang's DeclObjCCommon.h
// ObjCPropertyAttribute::Kind!
HANDLE_DW_APPLE_PROPERTY(0x01, readonly)
HANDLE_DW_APPLE_PROPERTY(0x02, getter)
HANDLE_DW_APPLE_PROPERTY(0x04, assign)
HANDLE_DW_APPLE_PROPERTY(0x08, readwrite)
HANDLE_DW_APPLE_PROPERTY(0x10, retain)
HANDLE_DW_APPLE_PROPERTY(0x20, copy)
HANDLE_DW_APPLE_PROPERTY(0x40, nonatomic)
HANDLE_DW_APPLE_PROPERTY(0x80, setter)
HANDLE_DW_APPLE_PROPERTY(0x100, atomic)
HANDLE_DW_APPLE_PROPERTY(0x200, weak)
HANDLE_DW_APPLE_PROPERTY(0x400, strong)
HANDLE_DW_APPLE_PROPERTY(0x800, unsafe_unretained)
HANDLE_DW_APPLE_PROPERTY(0x1000, nullability)
HANDLE_DW_APPLE_PROPERTY(0x2000, null_resettable)
HANDLE_DW_APPLE_PROPERTY(0x4000, class)
// DWARF v5 Unit Types.
HANDLE_DW_UT(0x01, compile)
HANDLE_DW_UT(0x02, type)
HANDLE_DW_UT(0x03, partial)
HANDLE_DW_UT(0x04, skeleton)
HANDLE_DW_UT(0x05, split_compile)
HANDLE_DW_UT(0x06, split_type)
// DWARF section types. (enum name, ELF name, ELF DWO name, cmdline name,
// option) Note that these IDs don't mean anything.
// TODO: Add Mach-O and COFF names.
// Official DWARF sections.
HANDLE_DWARF_SECTION(DebugAbbrev, ".debug_abbrev", "debug-abbrev", BoolOption)
HANDLE_DWARF_SECTION(DebugAddr, ".debug_addr", "debug-addr", BoolOption)
HANDLE_DWARF_SECTION(DebugAranges, ".debug_aranges", "debug-aranges",
BoolOption)
HANDLE_DWARF_SECTION(DebugInfo, ".debug_info", "debug-info", OffsetOption)
HANDLE_DWARF_SECTION(DebugTypes, ".debug_types", "debug-types", OffsetOption)
HANDLE_DWARF_SECTION(DebugLine, ".debug_line", "debug-line", OffsetOption)
HANDLE_DWARF_SECTION(DebugLineStr, ".debug_line_str", "debug-line-str",
BoolOption)
HANDLE_DWARF_SECTION(DebugLoc, ".debug_loc", "debug-loc", OffsetOption)
HANDLE_DWARF_SECTION(DebugLoclists, ".debug_loclists", "debug-loclists",
OffsetOption)
HANDLE_DWARF_SECTION(DebugFrame, ".debug_frame", "debug-frame", OffsetOption)
HANDLE_DWARF_SECTION(DebugMacro, ".debug_macro", "debug-macro", BoolOption)
HANDLE_DWARF_SECTION(DebugNames, ".debug_names", "debug-names", BoolOption)
HANDLE_DWARF_SECTION(DebugPubnames, ".debug_pubnames", "debug-pubnames",
BoolOption)
HANDLE_DWARF_SECTION(DebugPubtypes, ".debug_pubtypes", "debug-pubtypes",
BoolOption)
HANDLE_DWARF_SECTION(DebugGnuPubnames, ".debug_gnu_pubnames",
"debug-gnu-pubnames", BoolOption)
HANDLE_DWARF_SECTION(DebugGnuPubtypes, ".debug_gnu_pubtypes",
"debug-gnu-pubtypes", BoolOption)
HANDLE_DWARF_SECTION(DebugRanges, ".debug_ranges", "debug-ranges", BoolOption)
HANDLE_DWARF_SECTION(DebugRnglists, ".debug_rnglists", "debug-rnglists",
BoolOption)
HANDLE_DWARF_SECTION(DebugStr, ".debug_str", "debug-str", BoolOption)
HANDLE_DWARF_SECTION(DebugStrOffsets, ".debug_str_offsets", "debug-str-offsets",
BoolOption)
HANDLE_DWARF_SECTION(DebugCUIndex, ".debug_cu_index", "debug-cu-index",
BoolOption)
HANDLE_DWARF_SECTION(DebugTUIndex, ".debug_tu_index", "debug-tu-index",
BoolOption)
// Vendor extensions.
HANDLE_DWARF_SECTION(AppleNames, ".apple_names", "apple-names", BoolOption)
HANDLE_DWARF_SECTION(AppleTypes, ".apple_types", "apple-types", BoolOption)
HANDLE_DWARF_SECTION(AppleNamespaces, ".apple_namespaces", "apple-namespaces",
BoolOption)
HANDLE_DWARF_SECTION(AppleObjC, ".apple_objc", "apple-objc", BoolOption)
HANDLE_DWARF_SECTION(GdbIndex, ".gdb_index", "gdb-index", BoolOption)
HANDLE_DW_IDX(0x01, compile_unit)
HANDLE_DW_IDX(0x02, type_unit)
HANDLE_DW_IDX(0x03, die_offset)
HANDLE_DW_IDX(0x04, parent)
HANDLE_DW_IDX(0x05, type_hash)
HANDLE_DW_IDX(0x2000, GNU_internal)
HANDLE_DW_IDX(0x2001, GNU_external)
// DWARF package file section identifiers.
// DWARFv5, section 7.3.5.3, table 7.1.
HANDLE_DW_SECT(1, INFO)
HANDLE_DW_SECT(3, ABBREV)
HANDLE_DW_SECT(4, LINE)
HANDLE_DW_SECT(5, LOCLISTS)
HANDLE_DW_SECT(6, STR_OFFSETS)
HANDLE_DW_SECT(7, MACRO)
HANDLE_DW_SECT(8, RNGLISTS)
#undef HANDLE_DW_TAG
#undef HANDLE_DW_AT
#undef HANDLE_DW_FORM
#undef HANDLE_DW_OP
#undef HANDLE_DW_OP_LLVM_USEROP
#undef HANDLE_DW_LANG
#undef HANDLE_DW_ATE
#undef HANDLE_DW_VIRTUALITY
#undef HANDLE_DW_DEFAULTED
#undef HANDLE_DW_CC
#undef HANDLE_DW_LNS
#undef HANDLE_DW_LNE
#undef HANDLE_DW_LNCT
#undef HANDLE_DW_MACRO
#undef HANDLE_DW_MACRO_GNU
#undef HANDLE_MACRO_FLAG
#undef HANDLE_DW_RLE
#undef HANDLE_DW_LLE
#undef HANDLE_DW_CFA
#undef HANDLE_DW_CFA_PRED
#undef HANDLE_DW_APPLE_PROPERTY
#undef HANDLE_DW_UT
#undef HANDLE_DWARF_SECTION
#undef HANDLE_DW_IDX
#undef HANDLE_DW_END
#undef HANDLE_DW_SECT
PK hwFZ���r PassRegistry.hnu �[��� //===- llvm/PassRegistry.h - Pass Information Registry ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines PassRegistry, a class that is used in the initialization
// and registration of passes. At application startup, passes are registered
// with the PassRegistry, which is later provided to the PassManager for
// dependency resolution and similar tasks.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_PASSREGISTRY_H
#define LLVM_PASSREGISTRY_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/RWMutex.h"
#include <memory>
#include <vector>
namespace llvm {
class PassInfo;
struct PassRegistrationListener;
/// PassRegistry - This class manages the registration and intitialization of
/// the pass subsystem as application startup, and assists the PassManager
/// in resolving pass dependencies.
/// NOTE: PassRegistry is NOT thread-safe. If you want to use LLVM on multiple
/// threads simultaneously, you will need to use a separate PassRegistry on
/// each thread.
class PassRegistry {
mutable sys::SmartRWMutex<true> Lock;
/// PassInfoMap - Keep track of the PassInfo object for each registered pass.
using MapType = DenseMap<const void *, const PassInfo *>;
MapType PassInfoMap;
using StringMapType = StringMap<const PassInfo *>;
StringMapType PassInfoStringMap;
std::vector<std::unique_ptr<const PassInfo>> ToFree;
std::vector<PassRegistrationListener *> Listeners;
public:
PassRegistry() = default;
~PassRegistry();
/// getPassRegistry - Access the global registry object, which is
/// automatically initialized at application launch and destroyed by
/// llvm_shutdown.
static PassRegistry *getPassRegistry();
/// getPassInfo - Look up a pass' corresponding PassInfo, indexed by the pass'
/// type identifier (&MyPass::ID).
const PassInfo *getPassInfo(const void *TI) const;
/// getPassInfo - Look up a pass' corresponding PassInfo, indexed by the pass'
/// argument string.
const PassInfo *getPassInfo(StringRef Arg) const;
/// registerPass - Register a pass (by means of its PassInfo) with the
/// registry. Required in order to use the pass with a PassManager.
void registerPass(const PassInfo &PI, bool ShouldFree = false);
/// registerAnalysisGroup - Register an analysis group (or a pass implementing
// an analysis group) with the registry. Like registerPass, this is required
// in order for a PassManager to be able to use this group/pass.
void registerAnalysisGroup(const void *InterfaceID, const void *PassID,
PassInfo &Registeree, bool isDefault,
bool ShouldFree = false);
/// enumerateWith - Enumerate the registered passes, calling the provided
/// PassRegistrationListener's passEnumerate() callback on each of them.
void enumerateWith(PassRegistrationListener *L);
/// addRegistrationListener - Register the given PassRegistrationListener
/// to receive passRegistered() callbacks whenever a new pass is registered.
void addRegistrationListener(PassRegistrationListener *L);
/// removeRegistrationListener - Unregister a PassRegistrationListener so that
/// it no longer receives passRegistered() callbacks.
void removeRegistrationListener(PassRegistrationListener *L);
};
} // end namespace llvm
#endif // LLVM_PASSREGISTRY_H
PK hwFZ�Y'
'
CodeGen/MachineSSAContext.hnu �[��� //===- MachineSSAContext.h --------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
///
/// This file declares a specialization of the GenericSSAContext<X>
/// template class for Machine IR.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINESSACONTEXT_H
#define LLVM_CODEGEN_MACHINESSACONTEXT_H
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/Support/Printable.h"
namespace llvm {
class MachineRegisterInfo;
class MachineInstr;
class MachineFunction;
class Register;
template <typename _FunctionT> class GenericSSAContext;
template <typename, bool> class DominatorTreeBase;
inline unsigned succ_size(const MachineBasicBlock *BB) {
return BB->succ_size();
}
inline unsigned pred_size(const MachineBasicBlock *BB) {
return BB->pred_size();
}
inline auto instrs(const MachineBasicBlock &BB) { return BB.instrs(); }
template <> class GenericSSAContext<MachineFunction> {
const MachineRegisterInfo *RegInfo = nullptr;
MachineFunction *MF = nullptr;
public:
using BlockT = MachineBasicBlock;
using FunctionT = MachineFunction;
using InstructionT = MachineInstr;
using ValueRefT = Register;
using ConstValueRefT = Register;
using UseT = MachineOperand;
using DominatorTreeT = DominatorTreeBase<BlockT, false>;
static constexpr Register ValueRefNull = 0;
void setFunction(MachineFunction &Fn);
MachineFunction *getFunction() const { return MF; }
static MachineBasicBlock *getEntryBlock(MachineFunction &F);
static void appendBlockDefs(SmallVectorImpl<Register> &defs,
const MachineBasicBlock &block);
static void appendBlockTerms(SmallVectorImpl<MachineInstr *> &terms,
MachineBasicBlock &block);
static void appendBlockTerms(SmallVectorImpl<const MachineInstr *> &terms,
const MachineBasicBlock &block);
MachineBasicBlock *getDefBlock(Register) const;
static bool isConstantOrUndefValuePhi(const MachineInstr &Phi);
Printable print(const MachineBasicBlock *Block) const;
Printable print(const MachineInstr *Inst) const;
Printable print(Register Value) const;
};
using MachineSSAContext = GenericSSAContext<MachineFunction>;
} // namespace llvm
#endif // LLVM_CODEGEN_MACHINESSACONTEXT_H
PK hwFZ�8�� � CodeGen/AsmPrinterHandler.hnu �[��� //===-- llvm/CodeGen/AsmPrinterHandler.h -----------------------*- C++ -*--===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains a generic interface for AsmPrinter handlers,
// like debug and EH info emitters.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_ASMPRINTERHANDLER_H
#define LLVM_CODEGEN_ASMPRINTERHANDLER_H
#include "llvm/Support/DataTypes.h"
namespace llvm {
class AsmPrinter;
class MachineBasicBlock;
class MachineFunction;
class MachineInstr;
class MCSymbol;
class Module;
typedef MCSymbol *ExceptionSymbolProvider(AsmPrinter *Asm,
const MachineBasicBlock *MBB);
/// Collects and handles AsmPrinter objects required to build debug
/// or EH information.
class AsmPrinterHandler {
public:
virtual ~AsmPrinterHandler();
/// For symbols that have a size designated (e.g. common symbols),
/// this tracks that size.
virtual void setSymbolSize(const MCSymbol *Sym, uint64_t Size) = 0;
virtual void beginModule(Module *M) {}
/// Emit all sections that should come after the content.
virtual void endModule() = 0;
/// Gather pre-function debug information.
/// Every beginFunction(MF) call should be followed by an endFunction(MF)
/// call.
virtual void beginFunction(const MachineFunction *MF) = 0;
// Emit any of function marker (like .cfi_endproc). This is called
// before endFunction and cannot switch sections.
virtual void markFunctionEnd();
/// Gather post-function debug information.
virtual void endFunction(const MachineFunction *MF) = 0;
/// Process the beginning of a new basic-block-section within a
/// function. Always called immediately after beginFunction for the first
/// basic-block. When basic-block-sections are enabled, called before the
/// first block of each such section.
virtual void beginBasicBlockSection(const MachineBasicBlock &MBB) {}
/// Process the end of a basic-block-section within a function. When
/// basic-block-sections are enabled, called after the last block in each such
/// section (including the last section in the function). When
/// basic-block-sections are disabled, called at the end of a function,
/// immediately prior to markFunctionEnd.
virtual void endBasicBlockSection(const MachineBasicBlock &MBB) {}
/// Emit target-specific EH funclet machinery.
virtual void beginFunclet(const MachineBasicBlock &MBB,
MCSymbol *Sym = nullptr) {}
virtual void endFunclet() {}
/// Process beginning of an instruction.
virtual void beginInstruction(const MachineInstr *MI) = 0;
/// Process end of an instruction.
virtual void endInstruction() = 0;
};
} // End of namespace llvm
#endif
PK hwFZs��' �' CodeGen/LexicalScopes.hnu �[��� //===- LexicalScopes.cpp - Collecting lexical scope info --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements LexicalScopes analysis.
//
// This pass collects lexical scope information and maps machine instructions
// to respective lexical scopes.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LEXICALSCOPES_H
#define LLVM_CODEGEN_LEXICALSCOPES_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/IR/DebugInfoMetadata.h"
#include <cassert>
#include <unordered_map>
#include <utility>
namespace llvm {
class MachineBasicBlock;
class MachineFunction;
class MachineInstr;
class MDNode;
//===----------------------------------------------------------------------===//
/// InsnRange - This is used to track range of instructions with identical
/// lexical scope.
///
using InsnRange = std::pair<const MachineInstr *, const MachineInstr *>;
//===----------------------------------------------------------------------===//
/// LexicalScope - This class is used to track scope information.
///
class LexicalScope {
public:
LexicalScope(LexicalScope *P, const DILocalScope *D, const DILocation *I,
bool A)
: Parent(P), Desc(D), InlinedAtLocation(I), AbstractScope(A) {
assert(D);
assert(D->getSubprogram()->getUnit()->getEmissionKind() !=
DICompileUnit::NoDebug &&
"Don't build lexical scopes for non-debug locations");
assert(D->isResolved() && "Expected resolved node");
assert((!I || I->isResolved()) && "Expected resolved node");
if (Parent)
Parent->addChild(this);
}
// Accessors.
LexicalScope *getParent() const { return Parent; }
const MDNode *getDesc() const { return Desc; }
const DILocation *getInlinedAt() const { return InlinedAtLocation; }
const DILocalScope *getScopeNode() const { return Desc; }
bool isAbstractScope() const { return AbstractScope; }
SmallVectorImpl<LexicalScope *> &getChildren() { return Children; }
SmallVectorImpl<InsnRange> &getRanges() { return Ranges; }
/// addChild - Add a child scope.
void addChild(LexicalScope *S) { Children.push_back(S); }
/// openInsnRange - This scope covers instruction range starting from MI.
void openInsnRange(const MachineInstr *MI) {
if (!FirstInsn)
FirstInsn = MI;
if (Parent)
Parent->openInsnRange(MI);
}
/// extendInsnRange - Extend the current instruction range covered by
/// this scope.
void extendInsnRange(const MachineInstr *MI) {
assert(FirstInsn && "MI Range is not open!");
LastInsn = MI;
if (Parent)
Parent->extendInsnRange(MI);
}
/// closeInsnRange - Create a range based on FirstInsn and LastInsn collected
/// until now. This is used when a new scope is encountered while walking
/// machine instructions.
void closeInsnRange(LexicalScope *NewScope = nullptr) {
assert(LastInsn && "Last insn missing!");
Ranges.push_back(InsnRange(FirstInsn, LastInsn));
FirstInsn = nullptr;
LastInsn = nullptr;
// If Parent dominates NewScope then do not close Parent's instruction
// range.
if (Parent && (!NewScope || !Parent->dominates(NewScope)))
Parent->closeInsnRange(NewScope);
}
/// dominates - Return true if current scope dominates given lexical scope.
bool dominates(const LexicalScope *S) const {
if (S == this)
return true;
if (DFSIn < S->getDFSIn() && DFSOut > S->getDFSOut())
return true;
return false;
}
// Depth First Search support to walk and manipulate LexicalScope hierarchy.
unsigned getDFSOut() const { return DFSOut; }
void setDFSOut(unsigned O) { DFSOut = O; }
unsigned getDFSIn() const { return DFSIn; }
void setDFSIn(unsigned I) { DFSIn = I; }
/// dump - print lexical scope.
void dump(unsigned Indent = 0) const;
private:
LexicalScope *Parent; // Parent to this scope.
const DILocalScope *Desc; // Debug info descriptor.
const DILocation *InlinedAtLocation; // Location at which this
// scope is inlined.
bool AbstractScope; // Abstract Scope
SmallVector<LexicalScope *, 4> Children; // Scopes defined in scope.
// Contents not owned.
SmallVector<InsnRange, 4> Ranges;
const MachineInstr *LastInsn = nullptr; // Last instruction of this scope.
const MachineInstr *FirstInsn = nullptr; // First instruction of this scope.
unsigned DFSIn = 0; // In & Out Depth use to determine scope nesting.
unsigned DFSOut = 0;
};
//===----------------------------------------------------------------------===//
/// LexicalScopes - This class provides interface to collect and use lexical
/// scoping information from machine instruction.
///
class LexicalScopes {
public:
LexicalScopes() = default;
/// initialize - Scan machine function and constuct lexical scope nest, resets
/// the instance if necessary.
void initialize(const MachineFunction &);
/// releaseMemory - release memory.
void reset();
/// empty - Return true if there is any lexical scope information available.
bool empty() { return CurrentFnLexicalScope == nullptr; }
/// getCurrentFunctionScope - Return lexical scope for the current function.
LexicalScope *getCurrentFunctionScope() const {
return CurrentFnLexicalScope;
}
/// getMachineBasicBlocks - Populate given set using machine basic blocks
/// which have machine instructions that belong to lexical scope identified by
/// DebugLoc.
void getMachineBasicBlocks(const DILocation *DL,
SmallPtrSetImpl<const MachineBasicBlock *> &MBBs);
/// Return true if DebugLoc's lexical scope dominates at least one machine
/// instruction's lexical scope in a given machine basic block.
bool dominates(const DILocation *DL, MachineBasicBlock *MBB);
/// findLexicalScope - Find lexical scope, either regular or inlined, for the
/// given DebugLoc. Return NULL if not found.
LexicalScope *findLexicalScope(const DILocation *DL);
/// getAbstractScopesList - Return a reference to list of abstract scopes.
ArrayRef<LexicalScope *> getAbstractScopesList() const {
return AbstractScopesList;
}
/// findAbstractScope - Find an abstract scope or return null.
LexicalScope *findAbstractScope(const DILocalScope *N) {
auto I = AbstractScopeMap.find(N);
return I != AbstractScopeMap.end() ? &I->second : nullptr;
}
/// findInlinedScope - Find an inlined scope for the given scope/inlined-at.
LexicalScope *findInlinedScope(const DILocalScope *N, const DILocation *IA) {
auto I = InlinedLexicalScopeMap.find(std::make_pair(N, IA));
return I != InlinedLexicalScopeMap.end() ? &I->second : nullptr;
}
/// findLexicalScope - Find regular lexical scope or return null.
LexicalScope *findLexicalScope(const DILocalScope *N) {
auto I = LexicalScopeMap.find(N);
return I != LexicalScopeMap.end() ? &I->second : nullptr;
}
/// getOrCreateAbstractScope - Find or create an abstract lexical scope.
LexicalScope *getOrCreateAbstractScope(const DILocalScope *Scope);
private:
/// getOrCreateLexicalScope - Find lexical scope for the given Scope/IA. If
/// not available then create new lexical scope.
LexicalScope *getOrCreateLexicalScope(const DILocalScope *Scope,
const DILocation *IA = nullptr);
LexicalScope *getOrCreateLexicalScope(const DILocation *DL) {
return DL ? getOrCreateLexicalScope(DL->getScope(), DL->getInlinedAt())
: nullptr;
}
/// getOrCreateRegularScope - Find or create a regular lexical scope.
LexicalScope *getOrCreateRegularScope(const DILocalScope *Scope);
/// getOrCreateInlinedScope - Find or create an inlined lexical scope.
LexicalScope *getOrCreateInlinedScope(const DILocalScope *Scope,
const DILocation *InlinedAt);
/// extractLexicalScopes - Extract instruction ranges for each lexical scopes
/// for the given machine function.
void extractLexicalScopes(SmallVectorImpl<InsnRange> &MIRanges,
DenseMap<const MachineInstr *, LexicalScope *> &M);
void constructScopeNest(LexicalScope *Scope);
void
assignInstructionRanges(SmallVectorImpl<InsnRange> &MIRanges,
DenseMap<const MachineInstr *, LexicalScope *> &M);
const MachineFunction *MF = nullptr;
/// LexicalScopeMap - Tracks the scopes in the current function.
// Use an unordered_map to ensure value pointer validity over insertion.
std::unordered_map<const DILocalScope *, LexicalScope> LexicalScopeMap;
/// InlinedLexicalScopeMap - Tracks inlined function scopes in current
/// function.
std::unordered_map<std::pair<const DILocalScope *, const DILocation *>,
LexicalScope,
pair_hash<const DILocalScope *, const DILocation *>>
InlinedLexicalScopeMap;
/// AbstractScopeMap - These scopes are not included LexicalScopeMap.
// Use an unordered_map to ensure value pointer validity over insertion.
std::unordered_map<const DILocalScope *, LexicalScope> AbstractScopeMap;
/// AbstractScopesList - Tracks abstract scopes constructed while processing
/// a function.
SmallVector<LexicalScope *, 4> AbstractScopesList;
/// CurrentFnLexicalScope - Top level scope for the current function.
///
LexicalScope *CurrentFnLexicalScope = nullptr;
/// Map a location to the set of basic blocks it dominates. This is a cache
/// for \ref LexicalScopes::getMachineBasicBlocks results.
using BlockSetT = SmallPtrSet<const MachineBasicBlock *, 4>;
DenseMap<const DILocation *, std::unique_ptr<BlockSetT>> DominatedBlocks;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_LEXICALSCOPES_H
PK hwFZL0�zz% z% * CodeGen/MachineOptimizationRemarkEmitter.hnu �[��� ///===- MachineOptimizationRemarkEmitter.h - Opt Diagnostics -*- C++ -*----===//
///
/// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
/// See https://llvm.org/LICENSE.txt for license information.
/// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
///
///===---------------------------------------------------------------------===//
/// \file
/// Optimization diagnostic interfaces for machine passes. It's packaged as an
/// analysis pass so that by using this service passes become dependent on MBFI
/// as well. MBFI is used to compute the "hotness" of the diagnostic message.
///
///===---------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEOPTIMIZATIONREMARKEMITTER_H
#define LLVM_CODEGEN_MACHINEOPTIMIZATIONREMARKEMITTER_H
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/IR/Function.h"
#include <optional>
namespace llvm {
class MachineBasicBlock;
class MachineBlockFrequencyInfo;
class MachineInstr;
/// Common features for diagnostics dealing with optimization remarks
/// that are used by machine passes.
class DiagnosticInfoMIROptimization : public DiagnosticInfoOptimizationBase {
public:
DiagnosticInfoMIROptimization(enum DiagnosticKind Kind, const char *PassName,
StringRef RemarkName,
const DiagnosticLocation &Loc,
const MachineBasicBlock *MBB)
: DiagnosticInfoOptimizationBase(Kind, DS_Remark, PassName, RemarkName,
MBB->getParent()->getFunction(), Loc),
MBB(MBB) {}
/// MI-specific kinds of diagnostic Arguments.
struct MachineArgument : public DiagnosticInfoOptimizationBase::Argument {
/// Print an entire MachineInstr.
MachineArgument(StringRef Key, const MachineInstr &MI);
};
static bool classof(const DiagnosticInfo *DI) {
return DI->getKind() >= DK_FirstMachineRemark &&
DI->getKind() <= DK_LastMachineRemark;
}
const MachineBasicBlock *getBlock() const { return MBB; }
private:
const MachineBasicBlock *MBB;
};
/// Diagnostic information for applied optimization remarks.
class MachineOptimizationRemark : public DiagnosticInfoMIROptimization {
public:
/// \p PassName is the name of the pass emitting this diagnostic. If this name
/// matches the regular expression given in -Rpass=, then the diagnostic will
/// be emitted. \p RemarkName is a textual identifier for the remark. \p
/// Loc is the debug location and \p MBB is the block that the optimization
/// operates in.
MachineOptimizationRemark(const char *PassName, StringRef RemarkName,
const DiagnosticLocation &Loc,
const MachineBasicBlock *MBB)
: DiagnosticInfoMIROptimization(DK_MachineOptimizationRemark, PassName,
RemarkName, Loc, MBB) {}
static bool classof(const DiagnosticInfo *DI) {
return DI->getKind() == DK_MachineOptimizationRemark;
}
/// \see DiagnosticInfoOptimizationBase::isEnabled.
bool isEnabled() const override {
const Function &Fn = getFunction();
LLVMContext &Ctx = Fn.getContext();
return Ctx.getDiagHandlerPtr()->isPassedOptRemarkEnabled(getPassName());
}
};
/// Diagnostic information for missed-optimization remarks.
class MachineOptimizationRemarkMissed : public DiagnosticInfoMIROptimization {
public:
/// \p PassName is the name of the pass emitting this diagnostic. If this name
/// matches the regular expression given in -Rpass-missed=, then the
/// diagnostic will be emitted. \p RemarkName is a textual identifier for the
/// remark. \p Loc is the debug location and \p MBB is the block that the
/// optimization operates in.
MachineOptimizationRemarkMissed(const char *PassName, StringRef RemarkName,
const DiagnosticLocation &Loc,
const MachineBasicBlock *MBB)
: DiagnosticInfoMIROptimization(DK_MachineOptimizationRemarkMissed,
PassName, RemarkName, Loc, MBB) {}
static bool classof(const DiagnosticInfo *DI) {
return DI->getKind() == DK_MachineOptimizationRemarkMissed;
}
/// \see DiagnosticInfoOptimizationBase::isEnabled.
bool isEnabled() const override {
const Function &Fn = getFunction();
LLVMContext &Ctx = Fn.getContext();
return Ctx.getDiagHandlerPtr()->isMissedOptRemarkEnabled(getPassName());
}
};
/// Diagnostic information for optimization analysis remarks.
class MachineOptimizationRemarkAnalysis : public DiagnosticInfoMIROptimization {
public:
/// \p PassName is the name of the pass emitting this diagnostic. If this name
/// matches the regular expression given in -Rpass-analysis=, then the
/// diagnostic will be emitted. \p RemarkName is a textual identifier for the
/// remark. \p Loc is the debug location and \p MBB is the block that the
/// optimization operates in.
MachineOptimizationRemarkAnalysis(const char *PassName, StringRef RemarkName,
const DiagnosticLocation &Loc,
const MachineBasicBlock *MBB)
: DiagnosticInfoMIROptimization(DK_MachineOptimizationRemarkAnalysis,
PassName, RemarkName, Loc, MBB) {}
MachineOptimizationRemarkAnalysis(const char *PassName, StringRef RemarkName,
const MachineInstr *MI)
: DiagnosticInfoMIROptimization(DK_MachineOptimizationRemarkAnalysis,
PassName, RemarkName, MI->getDebugLoc(),
MI->getParent()) {}
static bool classof(const DiagnosticInfo *DI) {
return DI->getKind() == DK_MachineOptimizationRemarkAnalysis;
}
/// \see DiagnosticInfoOptimizationBase::isEnabled.
bool isEnabled() const override {
const Function &Fn = getFunction();
LLVMContext &Ctx = Fn.getContext();
return Ctx.getDiagHandlerPtr()->isAnalysisRemarkEnabled(getPassName());
}
};
/// Extend llvm::ore:: with MI-specific helper names.
namespace ore {
using MNV = DiagnosticInfoMIROptimization::MachineArgument;
}
/// The optimization diagnostic interface.
///
/// It allows reporting when optimizations are performed and when they are not
/// along with the reasons for it. Hotness information of the corresponding
/// code region can be included in the remark if DiagnosticsHotnessRequested is
/// enabled in the LLVM context.
class MachineOptimizationRemarkEmitter {
public:
MachineOptimizationRemarkEmitter(MachineFunction &MF,
MachineBlockFrequencyInfo *MBFI)
: MF(MF), MBFI(MBFI) {}
/// Emit an optimization remark.
void emit(DiagnosticInfoOptimizationBase &OptDiag);
/// Whether we allow for extra compile-time budget to perform more
/// analysis to be more informative.
///
/// This is useful to enable additional missed optimizations to be reported
/// that are normally too noisy. In this mode, we can use the extra analysis
/// (1) to filter trivial false positives or (2) to provide more context so
/// that non-trivial false positives can be quickly detected by the user.
bool allowExtraAnalysis(StringRef PassName) const {
return (
MF.getFunction().getContext().getLLVMRemarkStreamer() ||
MF.getFunction().getContext().getDiagHandlerPtr()->isAnyRemarkEnabled(
PassName));
}
/// Take a lambda that returns a remark which will be emitted. Second
/// argument is only used to restrict this to functions.
template <typename T>
void emit(T RemarkBuilder, decltype(RemarkBuilder()) * = nullptr) {
// Avoid building the remark unless we know there are at least *some*
// remarks enabled. We can't currently check whether remarks are requested
// for the calling pass since that requires actually building the remark.
if (MF.getFunction().getContext().getLLVMRemarkStreamer() ||
MF.getFunction()
.getContext()
.getDiagHandlerPtr()
->isAnyRemarkEnabled()) {
auto R = RemarkBuilder();
emit((DiagnosticInfoOptimizationBase &)R);
}
}
MachineBlockFrequencyInfo *getBFI() {
return MBFI;
}
private:
MachineFunction &MF;
/// MBFI is only set if hotness is requested.
MachineBlockFrequencyInfo *MBFI;
/// Compute hotness from IR value (currently assumed to be a block) if PGO is
/// available.
std::optional<uint64_t> computeHotness(const MachineBasicBlock &MBB);
/// Similar but use value from \p OptDiag and update hotness there.
void computeHotness(DiagnosticInfoMIROptimization &Remark);
/// Only allow verbose messages if we know we're filtering by hotness
/// (BFI is only set in this case).
bool shouldEmitVerbose() { return MBFI != nullptr; }
};
/// The analysis pass
///
/// Note that this pass shouldn't generally be marked as preserved by other
/// passes. It's holding onto BFI, so if the pass does not preserve BFI, BFI
/// could be freed.
class MachineOptimizationRemarkEmitterPass : public MachineFunctionPass {
std::unique_ptr<MachineOptimizationRemarkEmitter> ORE;
public:
MachineOptimizationRemarkEmitterPass();
bool runOnMachineFunction(MachineFunction &MF) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
MachineOptimizationRemarkEmitter &getORE() {
assert(ORE && "pass not run yet");
return *ORE;
}
static char ID;
};
}
#endif
PK hwFZ��I.\ .\ CodeGen/MachinePipeliner.hnu �[��� //===- MachinePipeliner.h - Machine Software Pipeliner Pass -------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// An implementation of the Swing Modulo Scheduling (SMS) software pipeliner.
//
// Software pipelining (SWP) is an instruction scheduling technique for loops
// that overlap loop iterations and exploits ILP via a compiler transformation.
//
// Swing Modulo Scheduling is an implementation of software pipelining
// that generates schedules that are near optimal in terms of initiation
// interval, register requirements, and stage count. See the papers:
//
// "Swing Modulo Scheduling: A Lifetime-Sensitive Approach", by J. Llosa,
// A. Gonzalez, E. Ayguade, and M. Valero. In PACT '96 Proceedings of the 1996
// Conference on Parallel Architectures and Compilation Techiniques.
//
// "Lifetime-Sensitive Modulo Scheduling in a Production Environment", by J.
// Llosa, E. Ayguade, A. Gonzalez, M. Valero, and J. Eckhardt. In IEEE
// Transactions on Computers, Vol. 50, No. 3, 2001.
//
// "An Implementation of Swing Modulo Scheduling With Extensions for
// Superblocks", by T. Lattner, Master's Thesis, University of Illinois at
// Urbana-Champaign, 2005.
//
//
// The SMS algorithm consists of three main steps after computing the minimal
// initiation interval (MII).
// 1) Analyze the dependence graph and compute information about each
// instruction in the graph.
// 2) Order the nodes (instructions) by priority based upon the heuristics
// described in the algorithm.
// 3) Attempt to schedule the nodes in the specified order using the MII.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEPIPELINER_H
#define LLVM_CODEGEN_MACHINEPIPELINER_H
#include "llvm/ADT/SetVector.h"
#include "llvm/CodeGen/DFAPacketizer.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
#include "llvm/CodeGen/ScheduleDAGInstrs.h"
#include "llvm/CodeGen/ScheduleDAGMutation.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/InitializePasses.h"
#include <deque>
namespace llvm {
class AAResults;
class NodeSet;
class SMSchedule;
extern cl::opt<bool> SwpEnableCopyToPhi;
extern cl::opt<int> SwpForceIssueWidth;
/// The main class in the implementation of the target independent
/// software pipeliner pass.
class MachinePipeliner : public MachineFunctionPass {
public:
MachineFunction *MF = nullptr;
MachineOptimizationRemarkEmitter *ORE = nullptr;
const MachineLoopInfo *MLI = nullptr;
const MachineDominatorTree *MDT = nullptr;
const InstrItineraryData *InstrItins = nullptr;
const TargetInstrInfo *TII = nullptr;
RegisterClassInfo RegClassInfo;
bool disabledByPragma = false;
unsigned II_setByPragma = 0;
#ifndef NDEBUG
static int NumTries;
#endif
/// Cache the target analysis information about the loop.
struct LoopInfo {
MachineBasicBlock *TBB = nullptr;
MachineBasicBlock *FBB = nullptr;
SmallVector<MachineOperand, 4> BrCond;
MachineInstr *LoopInductionVar = nullptr;
MachineInstr *LoopCompare = nullptr;
std::unique_ptr<TargetInstrInfo::PipelinerLoopInfo> LoopPipelinerInfo =
nullptr;
};
LoopInfo LI;
static char ID;
MachinePipeliner() : MachineFunctionPass(ID) {
initializeMachinePipelinerPass(*PassRegistry::getPassRegistry());
}
bool runOnMachineFunction(MachineFunction &MF) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
private:
void preprocessPhiNodes(MachineBasicBlock &B);
bool canPipelineLoop(MachineLoop &L);
bool scheduleLoop(MachineLoop &L);
bool swingModuloScheduler(MachineLoop &L);
void setPragmaPipelineOptions(MachineLoop &L);
};
/// This class builds the dependence graph for the instructions in a loop,
/// and attempts to schedule the instructions using the SMS algorithm.
class SwingSchedulerDAG : public ScheduleDAGInstrs {
MachinePipeliner &Pass;
/// The minimum initiation interval between iterations for this schedule.
unsigned MII = 0;
/// The maximum initiation interval between iterations for this schedule.
unsigned MAX_II = 0;
/// Set to true if a valid pipelined schedule is found for the loop.
bool Scheduled = false;
MachineLoop &Loop;
LiveIntervals &LIS;
const RegisterClassInfo &RegClassInfo;
unsigned II_setByPragma = 0;
TargetInstrInfo::PipelinerLoopInfo *LoopPipelinerInfo = nullptr;
/// A toplogical ordering of the SUnits, which is needed for changing
/// dependences and iterating over the SUnits.
ScheduleDAGTopologicalSort Topo;
struct NodeInfo {
int ASAP = 0;
int ALAP = 0;
int ZeroLatencyDepth = 0;
int ZeroLatencyHeight = 0;
NodeInfo() = default;
};
/// Computed properties for each node in the graph.
std::vector<NodeInfo> ScheduleInfo;
enum OrderKind { BottomUp = 0, TopDown = 1 };
/// Computed node ordering for scheduling.
SetVector<SUnit *> NodeOrder;
using NodeSetType = SmallVector<NodeSet, 8>;
using ValueMapTy = DenseMap<unsigned, unsigned>;
using MBBVectorTy = SmallVectorImpl<MachineBasicBlock *>;
using InstrMapTy = DenseMap<MachineInstr *, MachineInstr *>;
/// Instructions to change when emitting the final schedule.
DenseMap<SUnit *, std::pair<unsigned, int64_t>> InstrChanges;
/// We may create a new instruction, so remember it because it
/// must be deleted when the pass is finished.
DenseMap<MachineInstr*, MachineInstr *> NewMIs;
/// Ordered list of DAG postprocessing steps.
std::vector<std::unique_ptr<ScheduleDAGMutation>> Mutations;
/// Helper class to implement Johnson's circuit finding algorithm.
class Circuits {
std::vector<SUnit> &SUnits;
SetVector<SUnit *> Stack;
BitVector Blocked;
SmallVector<SmallPtrSet<SUnit *, 4>, 10> B;
SmallVector<SmallVector<int, 4>, 16> AdjK;
// Node to Index from ScheduleDAGTopologicalSort
std::vector<int> *Node2Idx;
unsigned NumPaths = 0u;
static unsigned MaxPaths;
public:
Circuits(std::vector<SUnit> &SUs, ScheduleDAGTopologicalSort &Topo)
: SUnits(SUs), Blocked(SUs.size()), B(SUs.size()), AdjK(SUs.size()) {
Node2Idx = new std::vector<int>(SUs.size());
unsigned Idx = 0;
for (const auto &NodeNum : Topo)
Node2Idx->at(NodeNum) = Idx++;
}
Circuits &operator=(const Circuits &other) = delete;
Circuits(const Circuits &other) = delete;
~Circuits() { delete Node2Idx; }
/// Reset the data structures used in the circuit algorithm.
void reset() {
Stack.clear();
Blocked.reset();
B.assign(SUnits.size(), SmallPtrSet<SUnit *, 4>());
NumPaths = 0;
}
void createAdjacencyStructure(SwingSchedulerDAG *DAG);
bool circuit(int V, int S, NodeSetType &NodeSets, bool HasBackedge = false);
void unblock(int U);
};
struct CopyToPhiMutation : public ScheduleDAGMutation {
void apply(ScheduleDAGInstrs *DAG) override;
};
public:
SwingSchedulerDAG(MachinePipeliner &P, MachineLoop &L, LiveIntervals &lis,
const RegisterClassInfo &rci, unsigned II,
TargetInstrInfo::PipelinerLoopInfo *PLI)
: ScheduleDAGInstrs(*P.MF, P.MLI, false), Pass(P), Loop(L), LIS(lis),
RegClassInfo(rci), II_setByPragma(II), LoopPipelinerInfo(PLI),
Topo(SUnits, &ExitSU) {
P.MF->getSubtarget().getSMSMutations(Mutations);
if (SwpEnableCopyToPhi)
Mutations.push_back(std::make_unique<CopyToPhiMutation>());
}
void schedule() override;
void finishBlock() override;
/// Return true if the loop kernel has been scheduled.
bool hasNewSchedule() { return Scheduled; }
/// Return the earliest time an instruction may be scheduled.
int getASAP(SUnit *Node) { return ScheduleInfo[Node->NodeNum].ASAP; }
/// Return the latest time an instruction my be scheduled.
int getALAP(SUnit *Node) { return ScheduleInfo[Node->NodeNum].ALAP; }
/// The mobility function, which the number of slots in which
/// an instruction may be scheduled.
int getMOV(SUnit *Node) { return getALAP(Node) - getASAP(Node); }
/// The depth, in the dependence graph, for a node.
unsigned getDepth(SUnit *Node) { return Node->getDepth(); }
/// The maximum unweighted length of a path from an arbitrary node to the
/// given node in which each edge has latency 0
int getZeroLatencyDepth(SUnit *Node) {
return ScheduleInfo[Node->NodeNum].ZeroLatencyDepth;
}
/// The height, in the dependence graph, for a node.
unsigned getHeight(SUnit *Node) { return Node->getHeight(); }
/// The maximum unweighted length of a path from the given node to an
/// arbitrary node in which each edge has latency 0
int getZeroLatencyHeight(SUnit *Node) {
return ScheduleInfo[Node->NodeNum].ZeroLatencyHeight;
}
/// Return true if the dependence is a back-edge in the data dependence graph.
/// Since the DAG doesn't contain cycles, we represent a cycle in the graph
/// using an anti dependence from a Phi to an instruction.
bool isBackedge(SUnit *Source, const SDep &Dep) {
if (Dep.getKind() != SDep::Anti)
return false;
return Source->getInstr()->isPHI() || Dep.getSUnit()->getInstr()->isPHI();
}
bool isLoopCarriedDep(SUnit *Source, const SDep &Dep, bool isSucc = true);
/// The distance function, which indicates that operation V of iteration I
/// depends on operations U of iteration I-distance.
unsigned getDistance(SUnit *U, SUnit *V, const SDep &Dep) {
// Instructions that feed a Phi have a distance of 1. Computing larger
// values for arrays requires data dependence information.
if (V->getInstr()->isPHI() && Dep.getKind() == SDep::Anti)
return 1;
return 0;
}
void applyInstrChange(MachineInstr *MI, SMSchedule &Schedule);
void fixupRegisterOverlaps(std::deque<SUnit *> &Instrs);
/// Return the new base register that was stored away for the changed
/// instruction.
unsigned getInstrBaseReg(SUnit *SU) {
DenseMap<SUnit *, std::pair<unsigned, int64_t>>::iterator It =
InstrChanges.find(SU);
if (It != InstrChanges.end())
return It->second.first;
return 0;
}
void addMutation(std::unique_ptr<ScheduleDAGMutation> Mutation) {
Mutations.push_back(std::move(Mutation));
}
static bool classof(const ScheduleDAGInstrs *DAG) { return true; }
private:
void addLoopCarriedDependences(AAResults *AA);
void updatePhiDependences();
void changeDependences();
unsigned calculateResMII();
unsigned calculateRecMII(NodeSetType &RecNodeSets);
void findCircuits(NodeSetType &NodeSets);
void fuseRecs(NodeSetType &NodeSets);
void removeDuplicateNodes(NodeSetType &NodeSets);
void computeNodeFunctions(NodeSetType &NodeSets);
void registerPressureFilter(NodeSetType &NodeSets);
void colocateNodeSets(NodeSetType &NodeSets);
void checkNodeSets(NodeSetType &NodeSets);
void groupRemainingNodes(NodeSetType &NodeSets);
void addConnectedNodes(SUnit *SU, NodeSet &NewSet,
SetVector<SUnit *> &NodesAdded);
void computeNodeOrder(NodeSetType &NodeSets);
void checkValidNodeOrder(const NodeSetType &Circuits) const;
bool schedulePipeline(SMSchedule &Schedule);
bool computeDelta(MachineInstr &MI, unsigned &Delta);
MachineInstr *findDefInLoop(Register Reg);
bool canUseLastOffsetValue(MachineInstr *MI, unsigned &BasePos,
unsigned &OffsetPos, unsigned &NewBase,
int64_t &NewOffset);
void postProcessDAG();
/// Set the Minimum Initiation Interval for this schedule attempt.
void setMII(unsigned ResMII, unsigned RecMII);
/// Set the Maximum Initiation Interval for this schedule attempt.
void setMAX_II();
};
/// A NodeSet contains a set of SUnit DAG nodes with additional information
/// that assigns a priority to the set.
class NodeSet {
SetVector<SUnit *> Nodes;
bool HasRecurrence = false;
unsigned RecMII = 0;
int MaxMOV = 0;
unsigned MaxDepth = 0;
unsigned Colocate = 0;
SUnit *ExceedPressure = nullptr;
unsigned Latency = 0;
public:
using iterator = SetVector<SUnit *>::const_iterator;
NodeSet() = default;
NodeSet(iterator S, iterator E) : Nodes(S, E), HasRecurrence(true) {
Latency = 0;
for (const SUnit *Node : Nodes) {
DenseMap<SUnit *, unsigned> SuccSUnitLatency;
for (const SDep &Succ : Node->Succs) {
auto SuccSUnit = Succ.getSUnit();
if (!Nodes.count(SuccSUnit))
continue;
unsigned CurLatency = Succ.getLatency();
unsigned MaxLatency = 0;
if (SuccSUnitLatency.count(SuccSUnit))
MaxLatency = SuccSUnitLatency[SuccSUnit];
if (CurLatency > MaxLatency)
SuccSUnitLatency[SuccSUnit] = CurLatency;
}
for (auto SUnitLatency : SuccSUnitLatency)
Latency += SUnitLatency.second;
}
}
bool insert(SUnit *SU) { return Nodes.insert(SU); }
void insert(iterator S, iterator E) { Nodes.insert(S, E); }
template <typename UnaryPredicate> bool remove_if(UnaryPredicate P) {
return Nodes.remove_if(P);
}
unsigned count(SUnit *SU) const { return Nodes.count(SU); }
bool hasRecurrence() { return HasRecurrence; };
unsigned size() const { return Nodes.size(); }
bool empty() const { return Nodes.empty(); }
SUnit *getNode(unsigned i) const { return Nodes[i]; };
void setRecMII(unsigned mii) { RecMII = mii; };
void setColocate(unsigned c) { Colocate = c; };
void setExceedPressure(SUnit *SU) { ExceedPressure = SU; }
bool isExceedSU(SUnit *SU) { return ExceedPressure == SU; }
int compareRecMII(NodeSet &RHS) { return RecMII - RHS.RecMII; }
int getRecMII() { return RecMII; }
/// Summarize node functions for the entire node set.
void computeNodeSetInfo(SwingSchedulerDAG *SSD) {
for (SUnit *SU : *this) {
MaxMOV = std::max(MaxMOV, SSD->getMOV(SU));
MaxDepth = std::max(MaxDepth, SSD->getDepth(SU));
}
}
unsigned getLatency() { return Latency; }
unsigned getMaxDepth() { return MaxDepth; }
void clear() {
Nodes.clear();
RecMII = 0;
HasRecurrence = false;
MaxMOV = 0;
MaxDepth = 0;
Colocate = 0;
ExceedPressure = nullptr;
}
operator SetVector<SUnit *> &() { return Nodes; }
/// Sort the node sets by importance. First, rank them by recurrence MII,
/// then by mobility (least mobile done first), and finally by depth.
/// Each node set may contain a colocate value which is used as the first
/// tie breaker, if it's set.
bool operator>(const NodeSet &RHS) const {
if (RecMII == RHS.RecMII) {
if (Colocate != 0 && RHS.Colocate != 0 && Colocate != RHS.Colocate)
return Colocate < RHS.Colocate;
if (MaxMOV == RHS.MaxMOV)
return MaxDepth > RHS.MaxDepth;
return MaxMOV < RHS.MaxMOV;
}
return RecMII > RHS.RecMII;
}
bool operator==(const NodeSet &RHS) const {
return RecMII == RHS.RecMII && MaxMOV == RHS.MaxMOV &&
MaxDepth == RHS.MaxDepth;
}
bool operator!=(const NodeSet &RHS) const { return !operator==(RHS); }
iterator begin() { return Nodes.begin(); }
iterator end() { return Nodes.end(); }
void print(raw_ostream &os) const;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD void dump() const;
#endif
};
// 16 was selected based on the number of ProcResource kinds for all
// existing Subtargets, so that SmallVector don't need to resize too often.
static const int DefaultProcResSize = 16;
class ResourceManager {
private:
const MCSubtargetInfo *STI;
const MCSchedModel &SM;
const TargetSubtargetInfo *ST;
const TargetInstrInfo *TII;
SwingSchedulerDAG *DAG;
const bool UseDFA;
/// DFA resources for each slot
llvm::SmallVector<std::unique_ptr<DFAPacketizer>> DFAResources;
/// Modulo Reservation Table. When a resource with ID R is consumed in cycle
/// C, it is counted in MRT[C mod II][R]. (Used when UseDFA == F)
llvm::SmallVector<llvm::SmallVector<uint64_t, DefaultProcResSize>> MRT;
/// The number of scheduled micro operations for each slot. Micro operations
/// are assumed to be scheduled one per cycle, starting with the cycle in
/// which the instruction is scheduled.
llvm::SmallVector<int> NumScheduledMops;
/// Each processor resource is associated with a so-called processor resource
/// mask. This vector allows to correlate processor resource IDs with
/// processor resource masks. There is exactly one element per each processor
/// resource declared by the scheduling model.
llvm::SmallVector<uint64_t, DefaultProcResSize> ProcResourceMasks;
int InitiationInterval = 0;
/// The number of micro operations that can be scheduled at a cycle.
int IssueWidth;
int calculateResMIIDFA() const;
/// Check if MRT is overbooked
bool isOverbooked() const;
/// Reserve resources on MRT
void reserveResources(const MCSchedClassDesc *SCDesc, int Cycle);
/// Unreserve resources on MRT
void unreserveResources(const MCSchedClassDesc *SCDesc, int Cycle);
/// Return M satisfying Dividend = Divisor * X + M, 0 < M < Divisor.
/// The slot on MRT to reserve a resource for the cycle C is positiveModulo(C,
/// II).
int positiveModulo(int Dividend, int Divisor) const {
assert(Divisor > 0);
int R = Dividend % Divisor;
if (R < 0)
R += Divisor;
return R;
}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD void dumpMRT() const;
#endif
public:
ResourceManager(const TargetSubtargetInfo *ST, SwingSchedulerDAG *DAG)
: STI(ST), SM(ST->getSchedModel()), ST(ST), TII(ST->getInstrInfo()),
DAG(DAG), UseDFA(ST->useDFAforSMS()),
ProcResourceMasks(SM.getNumProcResourceKinds(), 0),
IssueWidth(SM.IssueWidth) {
initProcResourceVectors(SM, ProcResourceMasks);
if (IssueWidth <= 0)
// If IssueWidth is not specified, set a sufficiently large value
IssueWidth = 100;
if (SwpForceIssueWidth > 0)
IssueWidth = SwpForceIssueWidth;
}
void initProcResourceVectors(const MCSchedModel &SM,
SmallVectorImpl<uint64_t> &Masks);
/// Check if the resources occupied by a machine instruction are available
/// in the current state.
bool canReserveResources(SUnit &SU, int Cycle);
/// Reserve the resources occupied by a machine instruction and change the
/// current state to reflect that change.
void reserveResources(SUnit &SU, int Cycle);
int calculateResMII() const;
/// Initialize resources with the initiation interval II.
void init(int II);
};
/// This class represents the scheduled code. The main data structure is a
/// map from scheduled cycle to instructions. During scheduling, the
/// data structure explicitly represents all stages/iterations. When
/// the algorithm finshes, the schedule is collapsed into a single stage,
/// which represents instructions from different loop iterations.
///
/// The SMS algorithm allows negative values for cycles, so the first cycle
/// in the schedule is the smallest cycle value.
class SMSchedule {
private:
/// Map from execution cycle to instructions.
DenseMap<int, std::deque<SUnit *>> ScheduledInstrs;
/// Map from instruction to execution cycle.
std::map<SUnit *, int> InstrToCycle;
/// Keep track of the first cycle value in the schedule. It starts
/// as zero, but the algorithm allows negative values.
int FirstCycle = 0;
/// Keep track of the last cycle value in the schedule.
int LastCycle = 0;
/// The initiation interval (II) for the schedule.
int InitiationInterval = 0;
/// Target machine information.
const TargetSubtargetInfo &ST;
/// Virtual register information.
MachineRegisterInfo &MRI;
ResourceManager ProcItinResources;
public:
SMSchedule(MachineFunction *mf, SwingSchedulerDAG *DAG)
: ST(mf->getSubtarget()), MRI(mf->getRegInfo()),
ProcItinResources(&ST, DAG) {}
void reset() {
ScheduledInstrs.clear();
InstrToCycle.clear();
FirstCycle = 0;
LastCycle = 0;
InitiationInterval = 0;
}
/// Set the initiation interval for this schedule.
void setInitiationInterval(int ii) {
InitiationInterval = ii;
ProcItinResources.init(ii);
}
/// Return the initiation interval for this schedule.
int getInitiationInterval() const { return InitiationInterval; }
/// Return the first cycle in the completed schedule. This
/// can be a negative value.
int getFirstCycle() const { return FirstCycle; }
/// Return the last cycle in the finalized schedule.
int getFinalCycle() const { return FirstCycle + InitiationInterval - 1; }
/// Return the cycle of the earliest scheduled instruction in the dependence
/// chain.
int earliestCycleInChain(const SDep &Dep);
/// Return the cycle of the latest scheduled instruction in the dependence
/// chain.
int latestCycleInChain(const SDep &Dep);
void computeStart(SUnit *SU, int *MaxEarlyStart, int *MinLateStart,
int *MinEnd, int *MaxStart, int II, SwingSchedulerDAG *DAG);
bool insert(SUnit *SU, int StartCycle, int EndCycle, int II);
/// Iterators for the cycle to instruction map.
using sched_iterator = DenseMap<int, std::deque<SUnit *>>::iterator;
using const_sched_iterator =
DenseMap<int, std::deque<SUnit *>>::const_iterator;
/// Return true if the instruction is scheduled at the specified stage.
bool isScheduledAtStage(SUnit *SU, unsigned StageNum) {
return (stageScheduled(SU) == (int)StageNum);
}
/// Return the stage for a scheduled instruction. Return -1 if
/// the instruction has not been scheduled.
int stageScheduled(SUnit *SU) const {
std::map<SUnit *, int>::const_iterator it = InstrToCycle.find(SU);
if (it == InstrToCycle.end())
return -1;
return (it->second - FirstCycle) / InitiationInterval;
}
/// Return the cycle for a scheduled instruction. This function normalizes
/// the first cycle to be 0.
unsigned cycleScheduled(SUnit *SU) const {
std::map<SUnit *, int>::const_iterator it = InstrToCycle.find(SU);
assert(it != InstrToCycle.end() && "Instruction hasn't been scheduled.");
return (it->second - FirstCycle) % InitiationInterval;
}
/// Return the maximum stage count needed for this schedule.
unsigned getMaxStageCount() {
return (LastCycle - FirstCycle) / InitiationInterval;
}
/// Return the instructions that are scheduled at the specified cycle.
std::deque<SUnit *> &getInstructions(int cycle) {
return ScheduledInstrs[cycle];
}
SmallSet<SUnit *, 8>
computeUnpipelineableNodes(SwingSchedulerDAG *SSD,
TargetInstrInfo::PipelinerLoopInfo *PLI);
bool
normalizeNonPipelinedInstructions(SwingSchedulerDAG *SSD,
TargetInstrInfo::PipelinerLoopInfo *PLI);
bool isValidSchedule(SwingSchedulerDAG *SSD);
void finalizeSchedule(SwingSchedulerDAG *SSD);
void orderDependence(SwingSchedulerDAG *SSD, SUnit *SU,
std::deque<SUnit *> &Insts);
bool isLoopCarried(SwingSchedulerDAG *SSD, MachineInstr &Phi);
bool isLoopCarriedDefOfUse(SwingSchedulerDAG *SSD, MachineInstr *Def,
MachineOperand &MO);
void print(raw_ostream &os) const;
void dump() const;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINEPIPELINER_H
PK hwFZ7�o�� � CodeGen/ExpandReductions.hnu �[��� //===- ExpandReductions.h - Expand reduction intrinsics ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_EXPANDREDUCTIONS_H
#define LLVM_CODEGEN_EXPANDREDUCTIONS_H
#include "llvm/IR/PassManager.h"
namespace llvm {
class ExpandReductionsPass
: public PassInfoMixin<ExpandReductionsPass> {
public:
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_EXPANDREDUCTIONS_H
PK hwFZ㕣��
�
CodeGen/LiveStacks.hnu �[��� //===- LiveStacks.h - Live Stack Slot Analysis ------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements the live stack slot analysis pass. It is analogous to
// live interval analysis except it's analyzing liveness of stack slots rather
// than registers.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LIVESTACKS_H
#define LLVM_CODEGEN_LIVESTACKS_H
#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/InitializePasses.h"
#include "llvm/PassRegistry.h"
#include <cassert>
#include <map>
#include <unordered_map>
namespace llvm {
class AnalysisUsage;
class MachineFunction;
class Module;
class raw_ostream;
class TargetRegisterClass;
class TargetRegisterInfo;
class LiveStacks : public MachineFunctionPass {
const TargetRegisterInfo *TRI = nullptr;
/// Special pool allocator for VNInfo's (LiveInterval val#).
///
VNInfo::Allocator VNInfoAllocator;
/// S2IMap - Stack slot indices to live interval mapping.
using SS2IntervalMap = std::unordered_map<int, LiveInterval>;
SS2IntervalMap S2IMap;
/// S2RCMap - Stack slot indices to register class mapping.
std::map<int, const TargetRegisterClass *> S2RCMap;
public:
static char ID; // Pass identification, replacement for typeid
LiveStacks() : MachineFunctionPass(ID) {
initializeLiveStacksPass(*PassRegistry::getPassRegistry());
}
using iterator = SS2IntervalMap::iterator;
using const_iterator = SS2IntervalMap::const_iterator;
const_iterator begin() const { return S2IMap.begin(); }
const_iterator end() const { return S2IMap.end(); }
iterator begin() { return S2IMap.begin(); }
iterator end() { return S2IMap.end(); }
unsigned getNumIntervals() const { return (unsigned)S2IMap.size(); }
LiveInterval &getOrCreateInterval(int Slot, const TargetRegisterClass *RC);
LiveInterval &getInterval(int Slot) {
assert(Slot >= 0 && "Spill slot indice must be >= 0");
SS2IntervalMap::iterator I = S2IMap.find(Slot);
assert(I != S2IMap.end() && "Interval does not exist for stack slot");
return I->second;
}
const LiveInterval &getInterval(int Slot) const {
assert(Slot >= 0 && "Spill slot indice must be >= 0");
SS2IntervalMap::const_iterator I = S2IMap.find(Slot);
assert(I != S2IMap.end() && "Interval does not exist for stack slot");
return I->second;
}
bool hasInterval(int Slot) const { return S2IMap.count(Slot); }
const TargetRegisterClass *getIntervalRegClass(int Slot) const {
assert(Slot >= 0 && "Spill slot indice must be >= 0");
std::map<int, const TargetRegisterClass *>::const_iterator I =
S2RCMap.find(Slot);
assert(I != S2RCMap.end() &&
"Register class info does not exist for stack slot");
return I->second;
}
VNInfo::Allocator &getVNInfoAllocator() { return VNInfoAllocator; }
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override;
/// runOnMachineFunction - pass entry point
bool runOnMachineFunction(MachineFunction &) override;
/// print - Implement the dump method.
void print(raw_ostream &O, const Module * = nullptr) const override;
};
} // end namespace llvm
#endif
PK hwFZ��x�� � CodeGen/RegAllocCommon.hnu �[��� //===- RegAllocCommon.h - Utilities shared between allocators ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_REGALLOCCOMMON_H
#define LLVM_CODEGEN_REGALLOCCOMMON_H
#include <functional>
namespace llvm {
class TargetRegisterClass;
class TargetRegisterInfo;
typedef std::function<bool(const TargetRegisterInfo &TRI,
const TargetRegisterClass &RC)> RegClassFilterFunc;
/// Default register class filter function for register allocation. All virtual
/// registers should be allocated.
static inline bool allocateAllRegClasses(const TargetRegisterInfo &,
const TargetRegisterClass &) {
return true;
}
}
#endif // LLVM_CODEGEN_REGALLOCCOMMON_H
PK hwFZB�i� � CodeGen/AntiDepBreaker.hnu �[��� //===- llvm/CodeGen/AntiDepBreaker.h - Anti-Dependence Breaking -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements the AntiDepBreaker class, which implements
// anti-dependence breaking heuristics for post-register-allocation scheduling.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_ANTIDEPBREAKER_H
#define LLVM_CODEGEN_ANTIDEPBREAKER_H
#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/Support/Compiler.h"
#include <cassert>
#include <utility>
#include <vector>
namespace llvm {
class RegisterClassInfo;
/// This class works in conjunction with the post-RA scheduler to rename
/// registers to break register anti-dependencies (WAR hazards).
class AntiDepBreaker {
public:
using DbgValueVector =
std::vector<std::pair<MachineInstr *, MachineInstr *>>;
virtual ~AntiDepBreaker();
/// Initialize anti-dep breaking for a new basic block.
virtual void StartBlock(MachineBasicBlock *BB) = 0;
/// Identifiy anti-dependencies within a basic-block region and break them by
/// renaming registers. Return the number of anti-dependencies broken.
virtual unsigned BreakAntiDependencies(const std::vector<SUnit> &SUnits,
MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned InsertPosIndex,
DbgValueVector &DbgValues) = 0;
/// Update liveness information to account for the current
/// instruction, which will not be scheduled.
virtual void Observe(MachineInstr &MI, unsigned Count,
unsigned InsertPosIndex) = 0;
/// Finish anti-dep breaking for a basic block.
virtual void FinishBlock() = 0;
/// Update DBG_VALUE or DBG_PHI if dependency breaker is updating
/// other machine instruction to use NewReg.
void UpdateDbgValue(MachineInstr &MI, unsigned OldReg, unsigned NewReg) {
if (MI.isDebugValue()) {
if (MI.getDebugOperand(0).isReg() &&
MI.getDebugOperand(0).getReg() == OldReg)
MI.getDebugOperand(0).setReg(NewReg);
} else if (MI.isDebugPHI()) {
if (MI.getOperand(0).isReg() &&
MI.getOperand(0).getReg() == OldReg)
MI.getOperand(0).setReg(NewReg);
} else {
llvm_unreachable("MI is not DBG_VALUE / DBG_PHI!");
}
}
/// Update all DBG_VALUE instructions that may be affected by the dependency
/// breaker's update of ParentMI to use NewReg.
void UpdateDbgValues(const DbgValueVector &DbgValues, MachineInstr *ParentMI,
unsigned OldReg, unsigned NewReg) {
// The following code is dependent on the order in which the DbgValues are
// constructed in ScheduleDAGInstrs::buildSchedGraph.
MachineInstr *PrevDbgMI = nullptr;
for (const auto &DV : make_range(DbgValues.crbegin(), DbgValues.crend())) {
MachineInstr *PrevMI = DV.second;
if ((PrevMI == ParentMI) || (PrevMI == PrevDbgMI)) {
MachineInstr *DbgMI = DV.first;
UpdateDbgValue(*DbgMI, OldReg, NewReg);
PrevDbgMI = DbgMI;
} else if (PrevDbgMI) {
break; // If no match and already found a DBG_VALUE, we're done.
}
}
}
};
AntiDepBreaker *createAggressiveAntiDepBreaker(
MachineFunction &MFi, const RegisterClassInfo &RCI,
TargetSubtargetInfo::RegClassVector &CriticalPathRCs);
AntiDepBreaker *createCriticalAntiDepBreaker(MachineFunction &MFi,
const RegisterClassInfo &RCI);
} // end namespace llvm
#endif // LLVM_CODEGEN_ANTIDEPBREAKER_H
PK hwFZTߎ� � CodeGen/MachineFunctionPass.hnu �[��� //===-- MachineFunctionPass.h - Pass for MachineFunctions --------*-C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the MachineFunctionPass class. MachineFunctionPass's are
// just FunctionPass's, except they operate on machine code as part of a code
// generator. Because they operate on machine code, not the LLVM
// representation, MachineFunctionPass's are not allowed to modify the LLVM
// representation. Due to this limitation, the MachineFunctionPass class takes
// care of declaring that no LLVM passes are invalidated.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEFUNCTIONPASS_H
#define LLVM_CODEGEN_MACHINEFUNCTIONPASS_H
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/Pass.h"
namespace llvm {
/// MachineFunctionPass - This class adapts the FunctionPass interface to
/// allow convenient creation of passes that operate on the MachineFunction
/// representation. Instead of overriding runOnFunction, subclasses
/// override runOnMachineFunction.
class MachineFunctionPass : public FunctionPass {
public:
bool doInitialization(Module&) override {
// Cache the properties info at module-init time so we don't have to
// construct them for every function.
RequiredProperties = getRequiredProperties();
SetProperties = getSetProperties();
ClearedProperties = getClearedProperties();
return false;
}
protected:
explicit MachineFunctionPass(char &ID) : FunctionPass(ID) {}
/// runOnMachineFunction - This method must be overloaded to perform the
/// desired machine code transformation or analysis.
///
virtual bool runOnMachineFunction(MachineFunction &MF) = 0;
/// getAnalysisUsage - Subclasses that override getAnalysisUsage
/// must call this.
///
/// For MachineFunctionPasses, calling AU.preservesCFG() indicates that
/// the pass does not modify the MachineBasicBlock CFG.
///
void getAnalysisUsage(AnalysisUsage &AU) const override;
virtual MachineFunctionProperties getRequiredProperties() const {
return MachineFunctionProperties();
}
virtual MachineFunctionProperties getSetProperties() const {
return MachineFunctionProperties();
}
virtual MachineFunctionProperties getClearedProperties() const {
return MachineFunctionProperties();
}
private:
MachineFunctionProperties RequiredProperties;
MachineFunctionProperties SetProperties;
MachineFunctionProperties ClearedProperties;
/// createPrinterPass - Get a machine function printer pass.
Pass *createPrinterPass(raw_ostream &O,
const std::string &Banner) const override;
bool runOnFunction(Function &F) override;
};
} // End llvm namespace
#endif
PK hwFZjn�~ֲ ֲ CodeGen/CodeGenPassBuilder.hnu �[��� //===- Construction of codegen pass pipelines ------------------*- C++ -*--===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
///
/// Interfaces for registering analysis passes, producing common pass manager
/// configurations, and parsing of pass pipelines.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_CODEGENPASSBUILDER_H
#define LLVM_CODEGEN_CODEGENPASSBUILDER_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Analysis/BasicAliasAnalysis.h"
#include "llvm/Analysis/ScopedNoAliasAA.h"
#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/Analysis/TypeBasedAliasAnalysis.h"
#include "llvm/CodeGen/ExpandReductions.h"
#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/PreISelIntrinsicLowering.h"
#include "llvm/CodeGen/ReplaceWithVeclib.h"
#include "llvm/CodeGen/UnreachableBlockElim.h"
#include "llvm/IR/PassManager.h"
#include "llvm/IR/Verifier.h"
#include "llvm/IRPrinter/IRPrintingPasses.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCTargetOptions.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/CGPassBuilderOption.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Transforms/Scalar/ConstantHoisting.h"
#include "llvm/Transforms/Scalar/LoopPassManager.h"
#include "llvm/Transforms/Scalar/LoopStrengthReduce.h"
#include "llvm/Transforms/Scalar/LowerConstantIntrinsics.h"
#include "llvm/Transforms/Scalar/MergeICmps.h"
#include "llvm/Transforms/Scalar/PartiallyInlineLibCalls.h"
#include "llvm/Transforms/Scalar/ScalarizeMaskedMemIntrin.h"
#include "llvm/Transforms/Utils/EntryExitInstrumenter.h"
#include "llvm/Transforms/Utils/LowerInvoke.h"
#include <cassert>
#include <type_traits>
#include <utility>
namespace llvm {
// FIXME: Dummy target independent passes definitions that have not yet been
// ported to new pass manager. Once they do, remove these.
#define DUMMY_FUNCTION_PASS(NAME, PASS_NAME, CONSTRUCTOR) \
struct PASS_NAME : public PassInfoMixin<PASS_NAME> { \
template <typename... Ts> PASS_NAME(Ts &&...) {} \
PreservedAnalyses run(Function &, FunctionAnalysisManager &) { \
return PreservedAnalyses::all(); \
} \
};
#define DUMMY_MODULE_PASS(NAME, PASS_NAME, CONSTRUCTOR) \
struct PASS_NAME : public PassInfoMixin<PASS_NAME> { \
template <typename... Ts> PASS_NAME(Ts &&...) {} \
PreservedAnalyses run(Module &, ModuleAnalysisManager &) { \
return PreservedAnalyses::all(); \
} \
};
#define DUMMY_MACHINE_MODULE_PASS(NAME, PASS_NAME, CONSTRUCTOR) \
struct PASS_NAME : public PassInfoMixin<PASS_NAME> { \
template <typename... Ts> PASS_NAME(Ts &&...) {} \
Error run(Module &, MachineFunctionAnalysisManager &) { \
return Error::success(); \
} \
PreservedAnalyses run(MachineFunction &, \
MachineFunctionAnalysisManager &) { \
llvm_unreachable("this api is to make new PM api happy"); \
} \
static AnalysisKey Key; \
};
#define DUMMY_MACHINE_FUNCTION_PASS(NAME, PASS_NAME, CONSTRUCTOR) \
struct PASS_NAME : public PassInfoMixin<PASS_NAME> { \
template <typename... Ts> PASS_NAME(Ts &&...) {} \
PreservedAnalyses run(MachineFunction &, \
MachineFunctionAnalysisManager &) { \
return PreservedAnalyses::all(); \
} \
static AnalysisKey Key; \
};
#include "MachinePassRegistry.def"
/// This class provides access to building LLVM's passes.
///
/// Its members provide the baseline state available to passes during their
/// construction. The \c MachinePassRegistry.def file specifies how to construct
/// all of the built-in passes, and those may reference these members during
/// construction.
template <typename DerivedT> class CodeGenPassBuilder {
public:
explicit CodeGenPassBuilder(LLVMTargetMachine &TM, CGPassBuilderOption Opts,
PassInstrumentationCallbacks *PIC)
: TM(TM), Opt(Opts), PIC(PIC) {
// Target could set CGPassBuilderOption::MISchedPostRA to true to achieve
// substitutePass(&PostRASchedulerID, &PostMachineSchedulerID)
// Target should override TM.Options.EnableIPRA in their target-specific
// LLVMTM ctor. See TargetMachine::setGlobalISel for example.
if (Opt.EnableIPRA)
TM.Options.EnableIPRA = *Opt.EnableIPRA;
if (Opt.EnableGlobalISelAbort)
TM.Options.GlobalISelAbort = *Opt.EnableGlobalISelAbort;
if (!Opt.OptimizeRegAlloc)
Opt.OptimizeRegAlloc = getOptLevel() != CodeGenOpt::None;
}
Error buildPipeline(ModulePassManager &MPM, MachineFunctionPassManager &MFPM,
raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,
CodeGenFileType FileType) const;
void registerModuleAnalyses(ModuleAnalysisManager &) const;
void registerFunctionAnalyses(FunctionAnalysisManager &) const;
void registerMachineFunctionAnalyses(MachineFunctionAnalysisManager &) const;
std::pair<StringRef, bool> getPassNameFromLegacyName(StringRef) const;
void registerAnalyses(MachineFunctionAnalysisManager &MFAM) const {
registerModuleAnalyses(*MFAM.MAM);
registerFunctionAnalyses(*MFAM.FAM);
registerMachineFunctionAnalyses(MFAM);
}
PassInstrumentationCallbacks *getPassInstrumentationCallbacks() const {
return PIC;
}
protected:
template <typename PassT> using has_key_t = decltype(PassT::Key);
template <typename PassT>
using is_module_pass_t = decltype(std::declval<PassT &>().run(
std::declval<Module &>(), std::declval<ModuleAnalysisManager &>()));
template <typename PassT>
using is_function_pass_t = decltype(std::declval<PassT &>().run(
std::declval<Function &>(), std::declval<FunctionAnalysisManager &>()));
// Function object to maintain state while adding codegen IR passes.
class AddIRPass {
public:
AddIRPass(ModulePassManager &MPM, bool DebugPM, bool Check = true)
: MPM(MPM) {
if (Check)
AddingFunctionPasses = false;
}
~AddIRPass() {
MPM.addPass(createModuleToFunctionPassAdaptor(std::move(FPM)));
}
// Add Function Pass
template <typename PassT>
std::enable_if_t<is_detected<is_function_pass_t, PassT>::value>
operator()(PassT &&Pass) {
if (AddingFunctionPasses && !*AddingFunctionPasses)
AddingFunctionPasses = true;
FPM.addPass(std::forward<PassT>(Pass));
}
// Add Module Pass
template <typename PassT>
std::enable_if_t<is_detected<is_module_pass_t, PassT>::value &&
!is_detected<is_function_pass_t, PassT>::value>
operator()(PassT &&Pass) {
assert((!AddingFunctionPasses || !*AddingFunctionPasses) &&
"could not add module pass after adding function pass");
MPM.addPass(std::forward<PassT>(Pass));
}
private:
ModulePassManager &MPM;
FunctionPassManager FPM;
// The codegen IR pipeline are mostly function passes with the exceptions of
// a few loop and module passes. `AddingFunctionPasses` make sures that
// we could only add module passes at the beginning of the pipeline. Once
// we begin adding function passes, we could no longer add module passes.
// This special-casing introduces less adaptor passes. If we have the need
// of adding module passes after function passes, we could change the
// implementation to accommodate that.
std::optional<bool> AddingFunctionPasses;
};
// Function object to maintain state while adding codegen machine passes.
class AddMachinePass {
public:
AddMachinePass(MachineFunctionPassManager &PM) : PM(PM) {}
template <typename PassT> void operator()(PassT &&Pass) {
static_assert(
is_detected<has_key_t, PassT>::value,
"Machine function pass must define a static member variable `Key`.");
for (auto &C : BeforeCallbacks)
if (!C(&PassT::Key))
return;
PM.addPass(std::forward<PassT>(Pass));
for (auto &C : AfterCallbacks)
C(&PassT::Key);
}
template <typename PassT> void insertPass(AnalysisKey *ID, PassT Pass) {
AfterCallbacks.emplace_back(
[this, ID, Pass = std::move(Pass)](AnalysisKey *PassID) {
if (PassID == ID)
this->PM.addPass(std::move(Pass));
});
}
void disablePass(AnalysisKey *ID) {
BeforeCallbacks.emplace_back(
[ID](AnalysisKey *PassID) { return PassID != ID; });
}
MachineFunctionPassManager releasePM() { return std::move(PM); }
private:
MachineFunctionPassManager &PM;
SmallVector<llvm::unique_function<bool(AnalysisKey *)>, 4> BeforeCallbacks;
SmallVector<llvm::unique_function<void(AnalysisKey *)>, 4> AfterCallbacks;
};
LLVMTargetMachine &TM;
CGPassBuilderOption Opt;
PassInstrumentationCallbacks *PIC;
/// Target override these hooks to parse target-specific analyses.
void registerTargetAnalysis(ModuleAnalysisManager &) const {}
void registerTargetAnalysis(FunctionAnalysisManager &) const {}
void registerTargetAnalysis(MachineFunctionAnalysisManager &) const {}
std::pair<StringRef, bool> getTargetPassNameFromLegacyName(StringRef) const {
return {"", false};
}
template <typename TMC> TMC &getTM() const { return static_cast<TMC &>(TM); }
CodeGenOpt::Level getOptLevel() const { return TM.getOptLevel(); }
/// Check whether or not GlobalISel should abort on error.
/// When this is disabled, GlobalISel will fall back on SDISel instead of
/// erroring out.
bool isGlobalISelAbortEnabled() const {
return TM.Options.GlobalISelAbort == GlobalISelAbortMode::Enable;
}
/// Check whether or not a diagnostic should be emitted when GlobalISel
/// uses the fallback path. In other words, it will emit a diagnostic
/// when GlobalISel failed and isGlobalISelAbortEnabled is false.
bool reportDiagnosticWhenGlobalISelFallback() const {
return TM.Options.GlobalISelAbort == GlobalISelAbortMode::DisableWithDiag;
}
/// addInstSelector - This method should install an instruction selector pass,
/// which converts from LLVM code to machine instructions.
Error addInstSelector(AddMachinePass &) const {
return make_error<StringError>("addInstSelector is not overridden",
inconvertibleErrorCode());
}
/// Add passes that optimize instruction level parallelism for out-of-order
/// targets. These passes are run while the machine code is still in SSA
/// form, so they can use MachineTraceMetrics to control their heuristics.
///
/// All passes added here should preserve the MachineDominatorTree,
/// MachineLoopInfo, and MachineTraceMetrics analyses.
void addILPOpts(AddMachinePass &) const {}
/// This method may be implemented by targets that want to run passes
/// immediately before register allocation.
void addPreRegAlloc(AddMachinePass &) const {}
/// addPreRewrite - Add passes to the optimized register allocation pipeline
/// after register allocation is complete, but before virtual registers are
/// rewritten to physical registers.
///
/// These passes must preserve VirtRegMap and LiveIntervals, and when running
/// after RABasic or RAGreedy, they should take advantage of LiveRegMatrix.
/// When these passes run, VirtRegMap contains legal physreg assignments for
/// all virtual registers.
///
/// Note if the target overloads addRegAssignAndRewriteOptimized, this may not
/// be honored. This is also not generally used for the the fast variant,
/// where the allocation and rewriting are done in one pass.
void addPreRewrite(AddMachinePass &) const {}
/// Add passes to be run immediately after virtual registers are rewritten
/// to physical registers.
void addPostRewrite(AddMachinePass &) const {}
/// This method may be implemented by targets that want to run passes after
/// register allocation pass pipeline but before prolog-epilog insertion.
void addPostRegAlloc(AddMachinePass &) const {}
/// This method may be implemented by targets that want to run passes after
/// prolog-epilog insertion and before the second instruction scheduling pass.
void addPreSched2(AddMachinePass &) const {}
/// This pass may be implemented by targets that want to run passes
/// immediately before machine code is emitted.
void addPreEmitPass(AddMachinePass &) const {}
/// Targets may add passes immediately before machine code is emitted in this
/// callback. This is called even later than `addPreEmitPass`.
// FIXME: Rename `addPreEmitPass` to something more sensible given its actual
// position and remove the `2` suffix here as this callback is what
// `addPreEmitPass` *should* be but in reality isn't.
void addPreEmitPass2(AddMachinePass &) const {}
/// {{@ For GlobalISel
///
/// addPreISel - This method should add any "last minute" LLVM->LLVM
/// passes (which are run just before instruction selector).
void addPreISel(AddIRPass &) const {
llvm_unreachable("addPreISel is not overridden");
}
/// This method should install an IR translator pass, which converts from
/// LLVM code to machine instructions with possibly generic opcodes.
Error addIRTranslator(AddMachinePass &) const {
return make_error<StringError>("addIRTranslator is not overridden",
inconvertibleErrorCode());
}
/// This method may be implemented by targets that want to run passes
/// immediately before legalization.
void addPreLegalizeMachineIR(AddMachinePass &) const {}
/// This method should install a legalize pass, which converts the instruction
/// sequence into one that can be selected by the target.
Error addLegalizeMachineIR(AddMachinePass &) const {
return make_error<StringError>("addLegalizeMachineIR is not overridden",
inconvertibleErrorCode());
}
/// This method may be implemented by targets that want to run passes
/// immediately before the register bank selection.
void addPreRegBankSelect(AddMachinePass &) const {}
/// This method should install a register bank selector pass, which
/// assigns register banks to virtual registers without a register
/// class or register banks.
Error addRegBankSelect(AddMachinePass &) const {
return make_error<StringError>("addRegBankSelect is not overridden",
inconvertibleErrorCode());
}
/// This method may be implemented by targets that want to run passes
/// immediately before the (global) instruction selection.
void addPreGlobalInstructionSelect(AddMachinePass &) const {}
/// This method should install a (global) instruction selector pass, which
/// converts possibly generic instructions to fully target-specific
/// instructions, thereby constraining all generic virtual registers to
/// register classes.
Error addGlobalInstructionSelect(AddMachinePass &) const {
return make_error<StringError>(
"addGlobalInstructionSelect is not overridden",
inconvertibleErrorCode());
}
/// @}}
/// High level function that adds all passes necessary to go from llvm IR
/// representation to the MI representation.
/// Adds IR based lowering and target specific optimization passes and finally
/// the core instruction selection passes.
void addISelPasses(AddIRPass &) const;
/// Add the actual instruction selection passes. This does not include
/// preparation passes on IR.
Error addCoreISelPasses(AddMachinePass &) const;
/// Add the complete, standard set of LLVM CodeGen passes.
/// Fully developed targets will not generally override this.
Error addMachinePasses(AddMachinePass &) const;
/// Add passes to lower exception handling for the code generator.
void addPassesToHandleExceptions(AddIRPass &) const;
/// Add common target configurable passes that perform LLVM IR to IR
/// transforms following machine independent optimization.
void addIRPasses(AddIRPass &) const;
/// Add pass to prepare the LLVM IR for code generation. This should be done
/// before exception handling preparation passes.
void addCodeGenPrepare(AddIRPass &) const;
/// Add common passes that perform LLVM IR to IR transforms in preparation for
/// instruction selection.
void addISelPrepare(AddIRPass &) const;
/// Methods with trivial inline returns are convenient points in the common
/// codegen pass pipeline where targets may insert passes. Methods with
/// out-of-line standard implementations are major CodeGen stages called by
/// addMachinePasses. Some targets may override major stages when inserting
/// passes is insufficient, but maintaining overriden stages is more work.
///
/// addMachineSSAOptimization - Add standard passes that optimize machine
/// instructions in SSA form.
void addMachineSSAOptimization(AddMachinePass &) const;
/// addFastRegAlloc - Add the minimum set of target-independent passes that
/// are required for fast register allocation.
Error addFastRegAlloc(AddMachinePass &) const;
/// addOptimizedRegAlloc - Add passes related to register allocation.
/// LLVMTargetMachine provides standard regalloc passes for most targets.
void addOptimizedRegAlloc(AddMachinePass &) const;
/// Add passes that optimize machine instructions after register allocation.
void addMachineLateOptimization(AddMachinePass &) const;
/// addGCPasses - Add late codegen passes that analyze code for garbage
/// collection. This should return true if GC info should be printed after
/// these passes.
void addGCPasses(AddMachinePass &) const {}
/// Add standard basic block placement passes.
void addBlockPlacement(AddMachinePass &) const;
using CreateMCStreamer =
std::function<Expected<std::unique_ptr<MCStreamer>>(MCContext &)>;
void addAsmPrinter(AddMachinePass &, CreateMCStreamer) const {
llvm_unreachable("addAsmPrinter is not overridden");
}
/// Utilities for targets to add passes to the pass manager.
///
/// createTargetRegisterAllocator - Create the register allocator pass for
/// this target at the current optimization level.
void addTargetRegisterAllocator(AddMachinePass &, bool Optimized) const;
/// addMachinePasses helper to create the target-selected or overriden
/// regalloc pass.
void addRegAllocPass(AddMachinePass &, bool Optimized) const;
/// Add core register alloator passes which do the actual register assignment
/// and rewriting. \returns true if any passes were added.
Error addRegAssignmentFast(AddMachinePass &) const;
Error addRegAssignmentOptimized(AddMachinePass &) const;
private:
DerivedT &derived() { return static_cast<DerivedT &>(*this); }
const DerivedT &derived() const {
return static_cast<const DerivedT &>(*this);
}
};
template <typename Derived>
Error CodeGenPassBuilder<Derived>::buildPipeline(
ModulePassManager &MPM, MachineFunctionPassManager &MFPM,
raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,
CodeGenFileType FileType) const {
AddIRPass addIRPass(MPM, Opt.DebugPM);
addISelPasses(addIRPass);
AddMachinePass addPass(MFPM);
if (auto Err = addCoreISelPasses(addPass))
return std::move(Err);
if (auto Err = derived().addMachinePasses(addPass))
return std::move(Err);
derived().addAsmPrinter(
addPass, [this, &Out, DwoOut, FileType](MCContext &Ctx) {
return this->TM.createMCStreamer(Out, DwoOut, FileType, Ctx);
});
addPass(FreeMachineFunctionPass());
return Error::success();
}
static inline AAManager registerAAAnalyses() {
AAManager AA;
// The order in which these are registered determines their priority when
// being queried.
// Basic AliasAnalysis support.
// Add TypeBasedAliasAnalysis before BasicAliasAnalysis so that
// BasicAliasAnalysis wins if they disagree. This is intended to help
// support "obvious" type-punning idioms.
AA.registerFunctionAnalysis<TypeBasedAA>();
AA.registerFunctionAnalysis<ScopedNoAliasAA>();
AA.registerFunctionAnalysis<BasicAA>();
return AA;
}
template <typename Derived>
void CodeGenPassBuilder<Derived>::registerModuleAnalyses(
ModuleAnalysisManager &MAM) const {
#define MODULE_ANALYSIS(NAME, PASS_NAME, CONSTRUCTOR) \
MAM.registerPass([&] { return PASS_NAME CONSTRUCTOR; });
#include "MachinePassRegistry.def"
derived().registerTargetAnalysis(MAM);
}
template <typename Derived>
void CodeGenPassBuilder<Derived>::registerFunctionAnalyses(
FunctionAnalysisManager &FAM) const {
FAM.registerPass([this] { return registerAAAnalyses(); });
#define FUNCTION_ANALYSIS(NAME, PASS_NAME, CONSTRUCTOR) \
FAM.registerPass([&] { return PASS_NAME CONSTRUCTOR; });
#include "MachinePassRegistry.def"
derived().registerTargetAnalysis(FAM);
}
template <typename Derived>
void CodeGenPassBuilder<Derived>::registerMachineFunctionAnalyses(
MachineFunctionAnalysisManager &MFAM) const {
#define MACHINE_FUNCTION_ANALYSIS(NAME, PASS_NAME, CONSTRUCTOR) \
MFAM.registerPass([&] { return PASS_NAME CONSTRUCTOR; });
#include "MachinePassRegistry.def"
derived().registerTargetAnalysis(MFAM);
}
// FIXME: For new PM, use pass name directly in commandline seems good.
// Translate stringfied pass name to its old commandline name. Returns the
// matching legacy name and a boolean value indicating if the pass is a machine
// pass.
template <typename Derived>
std::pair<StringRef, bool>
CodeGenPassBuilder<Derived>::getPassNameFromLegacyName(StringRef Name) const {
std::pair<StringRef, bool> Ret;
if (Name.empty())
return Ret;
#define FUNCTION_PASS(NAME, PASS_NAME, CONSTRUCTOR) \
if (Name == NAME) \
Ret = {#PASS_NAME, false};
#define DUMMY_FUNCTION_PASS(NAME, PASS_NAME, CONSTRUCTOR) \
if (Name == NAME) \
Ret = {#PASS_NAME, false};
#define MODULE_PASS(NAME, PASS_NAME, CONSTRUCTOR) \
if (Name == NAME) \
Ret = {#PASS_NAME, false};
#define DUMMY_MODULE_PASS(NAME, PASS_NAME, CONSTRUCTOR) \
if (Name == NAME) \
Ret = {#PASS_NAME, false};
#define MACHINE_MODULE_PASS(NAME, PASS_NAME, CONSTRUCTOR) \
if (Name == NAME) \
Ret = {#PASS_NAME, true};
#define DUMMY_MACHINE_MODULE_PASS(NAME, PASS_NAME, CONSTRUCTOR) \
if (Name == NAME) \
Ret = {#PASS_NAME, true};
#define MACHINE_FUNCTION_PASS(NAME, PASS_NAME, CONSTRUCTOR) \
if (Name == NAME) \
Ret = {#PASS_NAME, true};
#define DUMMY_MACHINE_FUNCTION_PASS(NAME, PASS_NAME, CONSTRUCTOR) \
if (Name == NAME) \
Ret = {#PASS_NAME, true};
#include "llvm/CodeGen/MachinePassRegistry.def"
if (Ret.first.empty())
Ret = derived().getTargetPassNameFromLegacyName(Name);
if (Ret.first.empty())
report_fatal_error(Twine('\"') + Twine(Name) +
Twine("\" pass could not be found."));
return Ret;
}
template <typename Derived>
void CodeGenPassBuilder<Derived>::addISelPasses(AddIRPass &addPass) const {
if (TM.useEmulatedTLS())
addPass(LowerEmuTLSPass());
addPass(PreISelIntrinsicLoweringPass(TM));
derived().addIRPasses(addPass);
derived().addCodeGenPrepare(addPass);
addPassesToHandleExceptions(addPass);
derived().addISelPrepare(addPass);
}
/// Add common target configurable passes that perform LLVM IR to IR transforms
/// following machine independent optimization.
template <typename Derived>
void CodeGenPassBuilder<Derived>::addIRPasses(AddIRPass &addPass) const {
// Before running any passes, run the verifier to determine if the input
// coming from the front-end and/or optimizer is valid.
if (!Opt.DisableVerify)
addPass(VerifierPass());
// Run loop strength reduction before anything else.
if (getOptLevel() != CodeGenOpt::None && !Opt.DisableLSR) {
addPass(createFunctionToLoopPassAdaptor(
LoopStrengthReducePass(), /*UseMemorySSA*/ true, Opt.DebugPM));
// FIXME: use -stop-after so we could remove PrintLSR
if (Opt.PrintLSR)
addPass(PrintFunctionPass(dbgs(), "\n\n*** Code after LSR ***\n"));
}
if (getOptLevel() != CodeGenOpt::None) {
// The MergeICmpsPass tries to create memcmp calls by grouping sequences of
// loads and compares. ExpandMemCmpPass then tries to expand those calls
// into optimally-sized loads and compares. The transforms are enabled by a
// target lowering hook.
if (!Opt.DisableMergeICmps)
addPass(MergeICmpsPass());
addPass(ExpandMemCmpPass());
}
// Run GC lowering passes for builtin collectors
// TODO: add a pass insertion point here
addPass(GCLoweringPass());
addPass(ShadowStackGCLoweringPass());
addPass(LowerConstantIntrinsicsPass());
// Make sure that no unreachable blocks are instruction selected.
addPass(UnreachableBlockElimPass());
// Prepare expensive constants for SelectionDAG.
if (getOptLevel() != CodeGenOpt::None && !Opt.DisableConstantHoisting)
addPass(ConstantHoistingPass());
// Replace calls to LLVM intrinsics (e.g., exp, log) operating on vector
// operands with calls to the corresponding functions in a vector library.
if (getOptLevel() != CodeGenOpt::None)
addPass(ReplaceWithVeclib());
if (getOptLevel() != CodeGenOpt::None && !Opt.DisablePartialLibcallInlining)
addPass(PartiallyInlineLibCallsPass());
// Instrument function entry and exit, e.g. with calls to mcount().
addPass(EntryExitInstrumenterPass(/*PostInlining=*/true));
// Add scalarization of target's unsupported masked memory intrinsics pass.
// the unsupported intrinsic will be replaced with a chain of basic blocks,
// that stores/loads element one-by-one if the appropriate mask bit is set.
addPass(ScalarizeMaskedMemIntrinPass());
// Expand reduction intrinsics into shuffle sequences if the target wants to.
addPass(ExpandReductionsPass());
// Convert conditional moves to conditional jumps when profitable.
if (getOptLevel() != CodeGenOpt::None && !Opt.DisableSelectOptimize)
addPass(SelectOptimizePass());
}
/// Turn exception handling constructs into something the code generators can
/// handle.
template <typename Derived>
void CodeGenPassBuilder<Derived>::addPassesToHandleExceptions(
AddIRPass &addPass) const {
const MCAsmInfo *MCAI = TM.getMCAsmInfo();
assert(MCAI && "No MCAsmInfo");
switch (MCAI->getExceptionHandlingType()) {
case ExceptionHandling::SjLj:
// SjLj piggy-backs on dwarf for this bit. The cleanups done apply to both
// Dwarf EH prepare needs to be run after SjLj prepare. Otherwise,
// catch info can get misplaced when a selector ends up more than one block
// removed from the parent invoke(s). This could happen when a landing
// pad is shared by multiple invokes and is also a target of a normal
// edge from elsewhere.
addPass(SjLjEHPreparePass());
[[fallthrough]];
case ExceptionHandling::DwarfCFI:
case ExceptionHandling::ARM:
case ExceptionHandling::AIX:
addPass(DwarfEHPass(getOptLevel()));
break;
case ExceptionHandling::WinEH:
// We support using both GCC-style and MSVC-style exceptions on Windows, so
// add both preparation passes. Each pass will only actually run if it
// recognizes the personality function.
addPass(WinEHPass());
addPass(DwarfEHPass(getOptLevel()));
break;
case ExceptionHandling::Wasm:
// Wasm EH uses Windows EH instructions, but it does not need to demote PHIs
// on catchpads and cleanuppads because it does not outline them into
// funclets. Catchswitch blocks are not lowered in SelectionDAG, so we
// should remove PHIs there.
addPass(WinEHPass(/*DemoteCatchSwitchPHIOnly=*/false));
addPass(WasmEHPass());
break;
case ExceptionHandling::None:
addPass(LowerInvokePass());
// The lower invoke pass may create unreachable code. Remove it.
addPass(UnreachableBlockElimPass());
break;
}
}
/// Add pass to prepare the LLVM IR for code generation. This should be done
/// before exception handling preparation passes.
template <typename Derived>
void CodeGenPassBuilder<Derived>::addCodeGenPrepare(AddIRPass &addPass) const {
if (getOptLevel() != CodeGenOpt::None && !Opt.DisableCGP)
addPass(CodeGenPreparePass());
// TODO: Default ctor'd RewriteSymbolPass is no-op.
// addPass(RewriteSymbolPass());
}
/// Add common passes that perform LLVM IR to IR transforms in preparation for
/// instruction selection.
template <typename Derived>
void CodeGenPassBuilder<Derived>::addISelPrepare(AddIRPass &addPass) const {
derived().addPreISel(addPass);
addPass(CallBrPrepare());
// Add both the safe stack and the stack protection passes: each of them will
// only protect functions that have corresponding attributes.
addPass(SafeStackPass());
addPass(StackProtectorPass());
if (Opt.PrintISelInput)
addPass(PrintFunctionPass(dbgs(),
"\n\n*** Final LLVM Code input to ISel ***\n"));
// All passes which modify the LLVM IR are now complete; run the verifier
// to ensure that the IR is valid.
if (!Opt.DisableVerify)
addPass(VerifierPass());
}
template <typename Derived>
Error CodeGenPassBuilder<Derived>::addCoreISelPasses(
AddMachinePass &addPass) const {
// Enable FastISel with -fast-isel, but allow that to be overridden.
TM.setO0WantsFastISel(Opt.EnableFastISelOption.value_or(true));
// Determine an instruction selector.
enum class SelectorType { SelectionDAG, FastISel, GlobalISel };
SelectorType Selector;
if (Opt.EnableFastISelOption && *Opt.EnableFastISelOption == true)
Selector = SelectorType::FastISel;
else if ((Opt.EnableGlobalISelOption &&
*Opt.EnableGlobalISelOption == true) ||
(TM.Options.EnableGlobalISel &&
(!Opt.EnableGlobalISelOption ||
*Opt.EnableGlobalISelOption == false)))
Selector = SelectorType::GlobalISel;
else if (TM.getOptLevel() == CodeGenOpt::None && TM.getO0WantsFastISel())
Selector = SelectorType::FastISel;
else
Selector = SelectorType::SelectionDAG;
// Set consistently TM.Options.EnableFastISel and EnableGlobalISel.
if (Selector == SelectorType::FastISel) {
TM.setFastISel(true);
TM.setGlobalISel(false);
} else if (Selector == SelectorType::GlobalISel) {
TM.setFastISel(false);
TM.setGlobalISel(true);
}
// Add instruction selector passes.
if (Selector == SelectorType::GlobalISel) {
if (auto Err = derived().addIRTranslator(addPass))
return std::move(Err);
derived().addPreLegalizeMachineIR(addPass);
if (auto Err = derived().addLegalizeMachineIR(addPass))
return std::move(Err);
// Before running the register bank selector, ask the target if it
// wants to run some passes.
derived().addPreRegBankSelect(addPass);
if (auto Err = derived().addRegBankSelect(addPass))
return std::move(Err);
derived().addPreGlobalInstructionSelect(addPass);
if (auto Err = derived().addGlobalInstructionSelect(addPass))
return std::move(Err);
// Pass to reset the MachineFunction if the ISel failed.
addPass(ResetMachineFunctionPass(reportDiagnosticWhenGlobalISelFallback(),
isGlobalISelAbortEnabled()));
// Provide a fallback path when we do not want to abort on
// not-yet-supported input.
if (!isGlobalISelAbortEnabled())
if (auto Err = derived().addInstSelector(addPass))
return std::move(Err);
} else if (auto Err = derived().addInstSelector(addPass))
return std::move(Err);
// Expand pseudo-instructions emitted by ISel. Don't run the verifier before
// FinalizeISel.
addPass(FinalizeISelPass());
// // Print the instruction selected machine code...
// printAndVerify("After Instruction Selection");
return Error::success();
}
/// Add the complete set of target-independent postISel code generator passes.
///
/// This can be read as the standard order of major LLVM CodeGen stages. Stages
/// with nontrivial configuration or multiple passes are broken out below in
/// add%Stage routines.
///
/// Any CodeGenPassBuilder<Derived>::addXX routine may be overriden by the
/// Target. The addPre/Post methods with empty header implementations allow
/// injecting target-specific fixups just before or after major stages.
/// Additionally, targets have the flexibility to change pass order within a
/// stage by overriding default implementation of add%Stage routines below. Each
/// technique has maintainability tradeoffs because alternate pass orders are
/// not well supported. addPre/Post works better if the target pass is easily
/// tied to a common pass. But if it has subtle dependencies on multiple passes,
/// the target should override the stage instead.
template <typename Derived>
Error CodeGenPassBuilder<Derived>::addMachinePasses(
AddMachinePass &addPass) const {
// Add passes that optimize machine instructions in SSA form.
if (getOptLevel() != CodeGenOpt::None) {
derived().addMachineSSAOptimization(addPass);
} else {
// If the target requests it, assign local variables to stack slots relative
// to one another and simplify frame index references where possible.
addPass(LocalStackSlotPass());
}
if (TM.Options.EnableIPRA)
addPass(RegUsageInfoPropagationPass());
// Run pre-ra passes.
derived().addPreRegAlloc(addPass);
// Run register allocation and passes that are tightly coupled with it,
// including phi elimination and scheduling.
if (*Opt.OptimizeRegAlloc) {
derived().addOptimizedRegAlloc(addPass);
} else {
if (auto Err = derived().addFastRegAlloc(addPass))
return Err;
}
// Run post-ra passes.
derived().addPostRegAlloc(addPass);
addPass(RemoveRedundantDebugValuesPass());
// Insert prolog/epilog code. Eliminate abstract frame index references...
if (getOptLevel() != CodeGenOpt::None) {
addPass(PostRAMachineSinkingPass());
addPass(ShrinkWrapPass());
}
addPass(PrologEpilogInserterPass());
/// Add passes that optimize machine instructions after register allocation.
if (getOptLevel() != CodeGenOpt::None)
derived().addMachineLateOptimization(addPass);
// Expand pseudo instructions before second scheduling pass.
addPass(ExpandPostRAPseudosPass());
// Run pre-sched2 passes.
derived().addPreSched2(addPass);
if (Opt.EnableImplicitNullChecks)
addPass(ImplicitNullChecksPass());
// Second pass scheduler.
// Let Target optionally insert this pass by itself at some other
// point.
if (getOptLevel() != CodeGenOpt::None &&
!TM.targetSchedulesPostRAScheduling()) {
if (Opt.MISchedPostRA)
addPass(PostMachineSchedulerPass());
else
addPass(PostRASchedulerPass());
}
// GC
derived().addGCPasses(addPass);
// Basic block placement.
if (getOptLevel() != CodeGenOpt::None)
derived().addBlockPlacement(addPass);
// Insert before XRay Instrumentation.
addPass(FEntryInserterPass());
addPass(XRayInstrumentationPass());
addPass(PatchableFunctionPass());
derived().addPreEmitPass(addPass);
if (TM.Options.EnableIPRA)
// Collect register usage information and produce a register mask of
// clobbered registers, to be used to optimize call sites.
addPass(RegUsageInfoCollectorPass());
addPass(FuncletLayoutPass());
addPass(StackMapLivenessPass());
addPass(LiveDebugValuesPass());
addPass(MachineSanitizerBinaryMetadata());
if (TM.Options.EnableMachineOutliner && getOptLevel() != CodeGenOpt::None &&
Opt.EnableMachineOutliner != RunOutliner::NeverOutline) {
bool RunOnAllFunctions =
(Opt.EnableMachineOutliner == RunOutliner::AlwaysOutline);
bool AddOutliner = RunOnAllFunctions || TM.Options.SupportsDefaultOutlining;
if (AddOutliner)
addPass(MachineOutlinerPass(RunOnAllFunctions));
}
// Add passes that directly emit MI after all other MI passes.
derived().addPreEmitPass2(addPass);
return Error::success();
}
/// Add passes that optimize machine instructions in SSA form.
template <typename Derived>
void CodeGenPassBuilder<Derived>::addMachineSSAOptimization(
AddMachinePass &addPass) const {
// Pre-ra tail duplication.
addPass(EarlyTailDuplicatePass());
// Optimize PHIs before DCE: removing dead PHI cycles may make more
// instructions dead.
addPass(OptimizePHIsPass());
// This pass merges large allocas. StackSlotColoring is a different pass
// which merges spill slots.
addPass(StackColoringPass());
// If the target requests it, assign local variables to stack slots relative
// to one another and simplify frame index references where possible.
addPass(LocalStackSlotPass());
// With optimization, dead code should already be eliminated. However
// there is one known exception: lowered code for arguments that are only
// used by tail calls, where the tail calls reuse the incoming stack
// arguments directly (see t11 in test/CodeGen/X86/sibcall.ll).
addPass(DeadMachineInstructionElimPass());
// Allow targets to insert passes that improve instruction level parallelism,
// like if-conversion. Such passes will typically need dominator trees and
// loop info, just like LICM and CSE below.
derived().addILPOpts(addPass);
addPass(EarlyMachineLICMPass());
addPass(MachineCSEPass());
addPass(MachineSinkingPass());
addPass(PeepholeOptimizerPass());
// Clean-up the dead code that may have been generated by peephole
// rewriting.
addPass(DeadMachineInstructionElimPass());
}
//===---------------------------------------------------------------------===//
/// Register Allocation Pass Configuration
//===---------------------------------------------------------------------===//
/// Instantiate the default register allocator pass for this target for either
/// the optimized or unoptimized allocation path. This will be added to the pass
/// manager by addFastRegAlloc in the unoptimized case or addOptimizedRegAlloc
/// in the optimized case.
///
/// A target that uses the standard regalloc pass order for fast or optimized
/// allocation may still override this for per-target regalloc
/// selection. But -regalloc=... always takes precedence.
template <typename Derived>
void CodeGenPassBuilder<Derived>::addTargetRegisterAllocator(
AddMachinePass &addPass, bool Optimized) const {
if (Optimized)
addPass(RAGreedyPass());
else
addPass(RAFastPass());
}
/// Find and instantiate the register allocation pass requested by this target
/// at the current optimization level. Different register allocators are
/// defined as separate passes because they may require different analysis.
template <typename Derived>
void CodeGenPassBuilder<Derived>::addRegAllocPass(AddMachinePass &addPass,
bool Optimized) const {
if (Opt.RegAlloc == RegAllocType::Default)
// With no -regalloc= override, ask the target for a regalloc pass.
derived().addTargetRegisterAllocator(addPass, Optimized);
else if (Opt.RegAlloc == RegAllocType::Basic)
addPass(RABasicPass());
else if (Opt.RegAlloc == RegAllocType::Fast)
addPass(RAFastPass());
else if (Opt.RegAlloc == RegAllocType::Greedy)
addPass(RAGreedyPass());
else if (Opt.RegAlloc == RegAllocType::PBQP)
addPass(RAPBQPPass());
else
llvm_unreachable("unknonwn register allocator type");
}
template <typename Derived>
Error CodeGenPassBuilder<Derived>::addRegAssignmentFast(
AddMachinePass &addPass) const {
if (Opt.RegAlloc != RegAllocType::Default &&
Opt.RegAlloc != RegAllocType::Fast)
return make_error<StringError>(
"Must use fast (default) register allocator for unoptimized regalloc.",
inconvertibleErrorCode());
addRegAllocPass(addPass, false);
return Error::success();
}
template <typename Derived>
Error CodeGenPassBuilder<Derived>::addRegAssignmentOptimized(
AddMachinePass &addPass) const {
// Add the selected register allocation pass.
addRegAllocPass(addPass, true);
// Allow targets to change the register assignments before rewriting.
derived().addPreRewrite(addPass);
// Finally rewrite virtual registers.
addPass(VirtRegRewriterPass());
// Perform stack slot coloring and post-ra machine LICM.
//
// FIXME: Re-enable coloring with register when it's capable of adding
// kill markers.
addPass(StackSlotColoringPass());
return Error::success();
}
/// Add the minimum set of target-independent passes that are required for
/// register allocation. No coalescing or scheduling.
template <typename Derived>
Error CodeGenPassBuilder<Derived>::addFastRegAlloc(
AddMachinePass &addPass) const {
addPass(PHIEliminationPass());
addPass(TwoAddressInstructionPass());
return derived().addRegAssignmentFast(addPass);
}
/// Add standard target-independent passes that are tightly coupled with
/// optimized register allocation, including coalescing, machine instruction
/// scheduling, and register allocation itself.
template <typename Derived>
void CodeGenPassBuilder<Derived>::addOptimizedRegAlloc(
AddMachinePass &addPass) const {
addPass(DetectDeadLanesPass());
addPass(ProcessImplicitDefsPass());
// Edge splitting is smarter with machine loop info.
addPass(PHIEliminationPass());
// Eventually, we want to run LiveIntervals before PHI elimination.
if (Opt.EarlyLiveIntervals)
addPass(LiveIntervalsPass());
addPass(TwoAddressInstructionPass());
addPass(RegisterCoalescerPass());
// The machine scheduler may accidentally create disconnected components
// when moving subregister definitions around, avoid this by splitting them to
// separate vregs before. Splitting can also improve reg. allocation quality.
addPass(RenameIndependentSubregsPass());
// PreRA instruction scheduling.
addPass(MachineSchedulerPass());
if (derived().addRegAssignmentOptimized(addPass)) {
// Allow targets to expand pseudo instructions depending on the choice of
// registers before MachineCopyPropagation.
derived().addPostRewrite(addPass);
// Copy propagate to forward register uses and try to eliminate COPYs that
// were not coalesced.
addPass(MachineCopyPropagationPass());
// Run post-ra machine LICM to hoist reloads / remats.
//
// FIXME: can this move into MachineLateOptimization?
addPass(MachineLICMPass());
}
}
//===---------------------------------------------------------------------===//
/// Post RegAlloc Pass Configuration
//===---------------------------------------------------------------------===//
/// Add passes that optimize machine instructions after register allocation.
template <typename Derived>
void CodeGenPassBuilder<Derived>::addMachineLateOptimization(
AddMachinePass &addPass) const {
// Branch folding must be run after regalloc and prolog/epilog insertion.
addPass(BranchFolderPass());
// Tail duplication.
// Note that duplicating tail just increases code size and degrades
// performance for targets that require Structured Control Flow.
// In addition it can also make CFG irreducible. Thus we disable it.
if (!TM.requiresStructuredCFG())
addPass(TailDuplicatePass());
// Cleanup of redundant (identical) address/immediate loads.
addPass(MachineLateInstrsCleanupPass());
// Copy propagation.
addPass(MachineCopyPropagationPass());
}
/// Add standard basic block placement passes.
template <typename Derived>
void CodeGenPassBuilder<Derived>::addBlockPlacement(
AddMachinePass &addPass) const {
addPass(MachineBlockPlacementPass());
// Run a separate pass to collect block placement statistics.
if (Opt.EnableBlockPlacementStats)
addPass(MachineBlockPlacementStatsPass());
}
} // namespace llvm
#endif // LLVM_CODEGEN_CODEGENPASSBUILDER_H
PK hwFZ���Q �Q CodeGen/CallingConvLower.hnu �[��� //===- llvm/CallingConvLower.h - Calling Conventions ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the CCState and CCValAssign classes, used for lowering
// and implementing calling conventions.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_CALLINGCONVLOWER_H
#define LLVM_CODEGEN_CALLINGCONVLOWER_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/Register.h"
#include "llvm/CodeGen/TargetCallingConv.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/Support/Alignment.h"
#include <variant>
#include <vector>
namespace llvm {
class CCState;
class MachineFunction;
class MVT;
class TargetRegisterInfo;
/// CCValAssign - Represent assignment of one arg/retval to a location.
class CCValAssign {
public:
enum LocInfo {
Full, // The value fills the full location.
SExt, // The value is sign extended in the location.
ZExt, // The value is zero extended in the location.
AExt, // The value is extended with undefined upper bits.
SExtUpper, // The value is in the upper bits of the location and should be
// sign extended when retrieved.
ZExtUpper, // The value is in the upper bits of the location and should be
// zero extended when retrieved.
AExtUpper, // The value is in the upper bits of the location and should be
// extended with undefined upper bits when retrieved.
BCvt, // The value is bit-converted in the location.
Trunc, // The value is truncated in the location.
VExt, // The value is vector-widened in the location.
// FIXME: Not implemented yet. Code that uses AExt to mean
// vector-widen should be fixed to use VExt instead.
FPExt, // The floating-point value is fp-extended in the location.
Indirect // The location contains pointer to the value.
// TODO: a subset of the value is in the location.
};
private:
// Holds one of:
// - the register that the value is assigned to;
// - the memory offset at which the value resides;
// - additional information about pending location; the exact interpretation
// of the data is target-dependent.
std::variant<Register, int64_t, unsigned> Data;
/// ValNo - This is the value number being assigned (e.g. an argument number).
unsigned ValNo;
/// isCustom - True if this arg/retval requires special handling.
unsigned isCustom : 1;
/// Information about how the value is assigned.
LocInfo HTP : 6;
/// ValVT - The type of the value being assigned.
MVT ValVT;
/// LocVT - The type of the location being assigned to.
MVT LocVT;
CCValAssign(LocInfo HTP, unsigned ValNo, MVT ValVT, MVT LocVT, bool IsCustom)
: ValNo(ValNo), isCustom(IsCustom), HTP(HTP), ValVT(ValVT), LocVT(LocVT) {
}
public:
static CCValAssign getReg(unsigned ValNo, MVT ValVT, unsigned RegNo,
MVT LocVT, LocInfo HTP, bool IsCustom = false) {
CCValAssign Ret(HTP, ValNo, ValVT, LocVT, IsCustom);
Ret.Data = Register(RegNo);
return Ret;
}
static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT, unsigned RegNo,
MVT LocVT, LocInfo HTP) {
return getReg(ValNo, ValVT, RegNo, LocVT, HTP, /*IsCustom=*/true);
}
static CCValAssign getMem(unsigned ValNo, MVT ValVT, int64_t Offset,
MVT LocVT, LocInfo HTP, bool IsCustom = false) {
CCValAssign Ret(HTP, ValNo, ValVT, LocVT, IsCustom);
Ret.Data = Offset;
return Ret;
}
static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT, int64_t Offset,
MVT LocVT, LocInfo HTP) {
return getMem(ValNo, ValVT, Offset, LocVT, HTP, /*IsCustom=*/true);
}
static CCValAssign getPending(unsigned ValNo, MVT ValVT, MVT LocVT,
LocInfo HTP, unsigned ExtraInfo = 0) {
CCValAssign Ret(HTP, ValNo, ValVT, LocVT, false);
Ret.Data = ExtraInfo;
return Ret;
}
void convertToReg(unsigned RegNo) { Data = Register(RegNo); }
void convertToMem(int64_t Offset) { Data = Offset; }
unsigned getValNo() const { return ValNo; }
MVT getValVT() const { return ValVT; }
bool isRegLoc() const { return std::holds_alternative<Register>(Data); }
bool isMemLoc() const { return std::holds_alternative<int64_t>(Data); }
bool isPendingLoc() const { return std::holds_alternative<unsigned>(Data); }
bool needsCustom() const { return isCustom; }
Register getLocReg() const { return std::get<Register>(Data); }
int64_t getLocMemOffset() const { return std::get<int64_t>(Data); }
unsigned getExtraInfo() const { return std::get<unsigned>(Data); }
MVT getLocVT() const { return LocVT; }
LocInfo getLocInfo() const { return HTP; }
bool isExtInLoc() const {
return (HTP == AExt || HTP == SExt || HTP == ZExt);
}
bool isUpperBitsInLoc() const {
return HTP == AExtUpper || HTP == SExtUpper || HTP == ZExtUpper;
}
};
/// Describes a register that needs to be forwarded from the prologue to a
/// musttail call.
struct ForwardedRegister {
ForwardedRegister(Register VReg, MCPhysReg PReg, MVT VT)
: VReg(VReg), PReg(PReg), VT(VT) {}
Register VReg;
MCPhysReg PReg;
MVT VT;
};
/// CCAssignFn - This function assigns a location for Val, updating State to
/// reflect the change. It returns 'true' if it failed to handle Val.
typedef bool CCAssignFn(unsigned ValNo, MVT ValVT,
MVT LocVT, CCValAssign::LocInfo LocInfo,
ISD::ArgFlagsTy ArgFlags, CCState &State);
/// CCCustomFn - This function assigns a location for Val, possibly updating
/// all args to reflect changes and indicates if it handled it. It must set
/// isCustom if it handles the arg and returns true.
typedef bool CCCustomFn(unsigned &ValNo, MVT &ValVT,
MVT &LocVT, CCValAssign::LocInfo &LocInfo,
ISD::ArgFlagsTy &ArgFlags, CCState &State);
/// CCState - This class holds information needed while lowering arguments and
/// return values. It captures which registers are already assigned and which
/// stack slots are used. It provides accessors to allocate these values.
class CCState {
private:
CallingConv::ID CallingConv;
bool IsVarArg;
bool AnalyzingMustTailForwardedRegs = false;
MachineFunction &MF;
const TargetRegisterInfo &TRI;
SmallVectorImpl<CCValAssign> &Locs;
LLVMContext &Context;
// True if arguments should be allocated at negative offsets.
bool NegativeOffsets;
uint64_t StackSize;
Align MaxStackArgAlign;
SmallVector<uint32_t, 16> UsedRegs;
SmallVector<CCValAssign, 4> PendingLocs;
SmallVector<ISD::ArgFlagsTy, 4> PendingArgFlags;
// ByValInfo and SmallVector<ByValInfo, 4> ByValRegs:
//
// Vector of ByValInfo instances (ByValRegs) is introduced for byval registers
// tracking.
// Or, in another words it tracks byval parameters that are stored in
// general purpose registers.
//
// For 4 byte stack alignment,
// instance index means byval parameter number in formal
// arguments set. Assume, we have some "struct_type" with size = 4 bytes,
// then, for function "foo":
//
// i32 foo(i32 %p, %struct_type* %r, i32 %s, %struct_type* %t)
//
// ByValRegs[0] describes how "%r" is stored (Begin == r1, End == r2)
// ByValRegs[1] describes how "%t" is stored (Begin == r3, End == r4).
//
// In case of 8 bytes stack alignment,
// In function shown above, r3 would be wasted according to AAPCS rules.
// ByValRegs vector size still would be 2,
// while "%t" goes to the stack: it wouldn't be described in ByValRegs.
//
// Supposed use-case for this collection:
// 1. Initially ByValRegs is empty, InRegsParamsProcessed is 0.
// 2. HandleByVal fills up ByValRegs.
// 3. Argument analysis (LowerFormatArguments, for example). After
// some byval argument was analyzed, InRegsParamsProcessed is increased.
struct ByValInfo {
ByValInfo(unsigned B, unsigned E) : Begin(B), End(E) {}
// First register allocated for current parameter.
unsigned Begin;
// First after last register allocated for current parameter.
unsigned End;
};
SmallVector<ByValInfo, 4 > ByValRegs;
// InRegsParamsProcessed - shows how many instances of ByValRegs was proceed
// during argument analysis.
unsigned InRegsParamsProcessed;
public:
CCState(CallingConv::ID CC, bool IsVarArg, MachineFunction &MF,
SmallVectorImpl<CCValAssign> &Locs, LLVMContext &Context,
bool NegativeOffsets = false);
void addLoc(const CCValAssign &V) {
Locs.push_back(V);
}
LLVMContext &getContext() const { return Context; }
MachineFunction &getMachineFunction() const { return MF; }
CallingConv::ID getCallingConv() const { return CallingConv; }
bool isVarArg() const { return IsVarArg; }
/// Returns the size of the currently allocated portion of the stack.
uint64_t getStackSize() const { return StackSize; }
/// getAlignedCallFrameSize - Return the size of the call frame needed to
/// be able to store all arguments and such that the alignment requirement
/// of each of the arguments is satisfied.
uint64_t getAlignedCallFrameSize() const {
return alignTo(StackSize, MaxStackArgAlign);
}
/// isAllocated - Return true if the specified register (or an alias) is
/// allocated.
bool isAllocated(MCRegister Reg) const {
return UsedRegs[Reg / 32] & (1 << (Reg & 31));
}
/// AnalyzeFormalArguments - Analyze an array of argument values,
/// incorporating info about the formals into this state.
void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
CCAssignFn Fn);
/// The function will invoke AnalyzeFormalArguments.
void AnalyzeArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
CCAssignFn Fn) {
AnalyzeFormalArguments(Ins, Fn);
}
/// AnalyzeReturn - Analyze the returned values of a return,
/// incorporating info about the result values into this state.
void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
CCAssignFn Fn);
/// CheckReturn - Analyze the return values of a function, returning
/// true if the return can be performed without sret-demotion, and
/// false otherwise.
bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
CCAssignFn Fn);
/// AnalyzeCallOperands - Analyze the outgoing arguments to a call,
/// incorporating info about the passed values into this state.
void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
CCAssignFn Fn);
/// AnalyzeCallOperands - Same as above except it takes vectors of types
/// and argument flags.
void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
CCAssignFn Fn);
/// The function will invoke AnalyzeCallOperands.
void AnalyzeArguments(const SmallVectorImpl<ISD::OutputArg> &Outs,
CCAssignFn Fn) {
AnalyzeCallOperands(Outs, Fn);
}
/// AnalyzeCallResult - Analyze the return values of a call,
/// incorporating info about the passed values into this state.
void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
CCAssignFn Fn);
/// A shadow allocated register is a register that was allocated
/// but wasn't added to the location list (Locs).
/// \returns true if the register was allocated as shadow or false otherwise.
bool IsShadowAllocatedReg(MCRegister Reg) const;
/// AnalyzeCallResult - Same as above except it's specialized for calls which
/// produce a single value.
void AnalyzeCallResult(MVT VT, CCAssignFn Fn);
/// getFirstUnallocated - Return the index of the first unallocated register
/// in the set, or Regs.size() if they are all allocated.
unsigned getFirstUnallocated(ArrayRef<MCPhysReg> Regs) const {
for (unsigned i = 0; i < Regs.size(); ++i)
if (!isAllocated(Regs[i]))
return i;
return Regs.size();
}
void DeallocateReg(MCPhysReg Reg) {
assert(isAllocated(Reg) && "Trying to deallocate an unallocated register");
MarkUnallocated(Reg);
}
/// AllocateReg - Attempt to allocate one register. If it is not available,
/// return zero. Otherwise, return the register, marking it and any aliases
/// as allocated.
MCRegister AllocateReg(MCPhysReg Reg) {
if (isAllocated(Reg))
return MCRegister();
MarkAllocated(Reg);
return Reg;
}
/// Version of AllocateReg with extra register to be shadowed.
MCRegister AllocateReg(MCPhysReg Reg, MCPhysReg ShadowReg) {
if (isAllocated(Reg))
return MCRegister();
MarkAllocated(Reg);
MarkAllocated(ShadowReg);
return Reg;
}
/// AllocateReg - Attempt to allocate one of the specified registers. If none
/// are available, return zero. Otherwise, return the first one available,
/// marking it and any aliases as allocated.
MCPhysReg AllocateReg(ArrayRef<MCPhysReg> Regs) {
unsigned FirstUnalloc = getFirstUnallocated(Regs);
if (FirstUnalloc == Regs.size())
return MCRegister(); // Didn't find the reg.
// Mark the register and any aliases as allocated.
MCPhysReg Reg = Regs[FirstUnalloc];
MarkAllocated(Reg);
return Reg;
}
/// AllocateRegBlock - Attempt to allocate a block of RegsRequired consecutive
/// registers. If this is not possible, return zero. Otherwise, return the first
/// register of the block that were allocated, marking the entire block as allocated.
MCPhysReg AllocateRegBlock(ArrayRef<MCPhysReg> Regs, unsigned RegsRequired) {
if (RegsRequired > Regs.size())
return 0;
for (unsigned StartIdx = 0; StartIdx <= Regs.size() - RegsRequired;
++StartIdx) {
bool BlockAvailable = true;
// Check for already-allocated regs in this block
for (unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
if (isAllocated(Regs[StartIdx + BlockIdx])) {
BlockAvailable = false;
break;
}
}
if (BlockAvailable) {
// Mark the entire block as allocated
for (unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
MarkAllocated(Regs[StartIdx + BlockIdx]);
}
return Regs[StartIdx];
}
}
// No block was available
return 0;
}
/// Version of AllocateReg with list of registers to be shadowed.
MCRegister AllocateReg(ArrayRef<MCPhysReg> Regs, const MCPhysReg *ShadowRegs) {
unsigned FirstUnalloc = getFirstUnallocated(Regs);
if (FirstUnalloc == Regs.size())
return MCRegister(); // Didn't find the reg.
// Mark the register and any aliases as allocated.
MCRegister Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
MarkAllocated(Reg);
MarkAllocated(ShadowReg);
return Reg;
}
/// AllocateStack - Allocate a chunk of stack space with the specified size
/// and alignment.
int64_t AllocateStack(unsigned Size, Align Alignment) {
int64_t Offset;
if (NegativeOffsets) {
StackSize = alignTo(StackSize + Size, Alignment);
Offset = -StackSize;
} else {
Offset = alignTo(StackSize, Alignment);
StackSize = Offset + Size;
}
MaxStackArgAlign = std::max(Alignment, MaxStackArgAlign);
ensureMaxAlignment(Alignment);
return Offset;
}
void ensureMaxAlignment(Align Alignment);
/// Version of AllocateStack with list of extra registers to be shadowed.
/// Note that, unlike AllocateReg, this shadows ALL of the shadow registers.
int64_t AllocateStack(unsigned Size, Align Alignment,
ArrayRef<MCPhysReg> ShadowRegs) {
for (MCPhysReg Reg : ShadowRegs)
MarkAllocated(Reg);
return AllocateStack(Size, Alignment);
}
// HandleByVal - Allocate a stack slot large enough to pass an argument by
// value. The size and alignment information of the argument is encoded in its
// parameter attribute.
void HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT,
CCValAssign::LocInfo LocInfo, int MinSize, Align MinAlign,
ISD::ArgFlagsTy ArgFlags);
// Returns count of byval arguments that are to be stored (even partly)
// in registers.
unsigned getInRegsParamsCount() const { return ByValRegs.size(); }
// Returns count of byval in-regs arguments processed.
unsigned getInRegsParamsProcessed() const { return InRegsParamsProcessed; }
// Get information about N-th byval parameter that is stored in registers.
// Here "ByValParamIndex" is N.
void getInRegsParamInfo(unsigned InRegsParamRecordIndex,
unsigned& BeginReg, unsigned& EndReg) const {
assert(InRegsParamRecordIndex < ByValRegs.size() &&
"Wrong ByVal parameter index");
const ByValInfo& info = ByValRegs[InRegsParamRecordIndex];
BeginReg = info.Begin;
EndReg = info.End;
}
// Add information about parameter that is kept in registers.
void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd) {
ByValRegs.push_back(ByValInfo(RegBegin, RegEnd));
}
// Goes either to next byval parameter (excluding "waste" record), or
// to the end of collection.
// Returns false, if end is reached.
bool nextInRegsParam() {
unsigned e = ByValRegs.size();
if (InRegsParamsProcessed < e)
++InRegsParamsProcessed;
return InRegsParamsProcessed < e;
}
// Clear byval registers tracking info.
void clearByValRegsInfo() {
InRegsParamsProcessed = 0;
ByValRegs.clear();
}
// Rewind byval registers tracking info.
void rewindByValRegsInfo() {
InRegsParamsProcessed = 0;
}
// Get list of pending assignments
SmallVectorImpl<CCValAssign> &getPendingLocs() {
return PendingLocs;
}
// Get a list of argflags for pending assignments.
SmallVectorImpl<ISD::ArgFlagsTy> &getPendingArgFlags() {
return PendingArgFlags;
}
/// Compute the remaining unused register parameters that would be used for
/// the given value type. This is useful when varargs are passed in the
/// registers that normal prototyped parameters would be passed in, or for
/// implementing perfect forwarding.
void getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs, MVT VT,
CCAssignFn Fn);
/// Compute the set of registers that need to be preserved and forwarded to
/// any musttail calls.
void analyzeMustTailForwardedRegisters(
SmallVectorImpl<ForwardedRegister> &Forwards, ArrayRef<MVT> RegParmTypes,
CCAssignFn Fn);
/// Returns true if the results of the two calling conventions are compatible.
/// This is usually part of the check for tailcall eligibility.
static bool resultsCompatible(CallingConv::ID CalleeCC,
CallingConv::ID CallerCC, MachineFunction &MF,
LLVMContext &C,
const SmallVectorImpl<ISD::InputArg> &Ins,
CCAssignFn CalleeFn, CCAssignFn CallerFn);
/// The function runs an additional analysis pass over function arguments.
/// It will mark each argument with the attribute flag SecArgPass.
/// After running, it will sort the locs list.
template <class T>
void AnalyzeArgumentsSecondPass(const SmallVectorImpl<T> &Args,
CCAssignFn Fn) {
unsigned NumFirstPassLocs = Locs.size();
/// Creates similar argument list to \p Args in which each argument is
/// marked using SecArgPass flag.
SmallVector<T, 16> SecPassArg;
// SmallVector<ISD::InputArg, 16> SecPassArg;
for (auto Arg : Args) {
Arg.Flags.setSecArgPass();
SecPassArg.push_back(Arg);
}
// Run the second argument pass
AnalyzeArguments(SecPassArg, Fn);
// Sort the locations of the arguments according to their original position.
SmallVector<CCValAssign, 16> TmpArgLocs;
TmpArgLocs.swap(Locs);
auto B = TmpArgLocs.begin(), E = TmpArgLocs.end();
std::merge(B, B + NumFirstPassLocs, B + NumFirstPassLocs, E,
std::back_inserter(Locs),
[](const CCValAssign &A, const CCValAssign &B) -> bool {
return A.getValNo() < B.getValNo();
});
}
private:
/// MarkAllocated - Mark a register and all of its aliases as allocated.
void MarkAllocated(MCPhysReg Reg);
void MarkUnallocated(MCPhysReg Reg);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_CALLINGCONVLOWER_H
PK hwFZ4��o o CodeGen/MachineSizeOpts.hnu �[��� //===- MachineSizeOpts.h - machine size optimization ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains some shared machine IR code size optimization related
// code.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINESIZEOPTS_H
#define LLVM_CODEGEN_MACHINESIZEOPTS_H
#include "llvm/Transforms/Utils/SizeOpts.h"
namespace llvm {
class ProfileSummaryInfo;
class MachineBasicBlock;
class MachineBlockFrequencyInfo;
class MachineFunction;
class MBFIWrapper;
/// Returns true if machine function \p MF is suggested to be size-optimized
/// based on the profile.
bool shouldOptimizeForSize(const MachineFunction *MF, ProfileSummaryInfo *PSI,
const MachineBlockFrequencyInfo *BFI,
PGSOQueryType QueryType = PGSOQueryType::Other);
/// Returns true if machine basic block \p MBB is suggested to be size-optimized
/// based on the profile.
bool shouldOptimizeForSize(const MachineBasicBlock *MBB,
ProfileSummaryInfo *PSI,
const MachineBlockFrequencyInfo *MBFI,
PGSOQueryType QueryType = PGSOQueryType::Other);
/// Returns true if machine basic block \p MBB is suggested to be size-optimized
/// based on the profile.
bool shouldOptimizeForSize(const MachineBasicBlock *MBB,
ProfileSummaryInfo *PSI,
MBFIWrapper *MBFIWrapper,
PGSOQueryType QueryType = PGSOQueryType::Other);
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINESIZEOPTS_H
PK hwFZNq_�>+ >+ CodeGen/FunctionLoweringInfo.hnu �[��� //===- FunctionLoweringInfo.h - Lower functions from LLVM IR ---*- C++ -*--===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This implements routines for translating functions from LLVM IR into
// Machine IR.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
#define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/IndexedMap.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/Type.h"
#include "llvm/IR/Value.h"
#include "llvm/Support/KnownBits.h"
#include <cassert>
#include <utility>
#include <vector>
namespace llvm {
class Argument;
class BasicBlock;
class BranchProbabilityInfo;
class DbgDeclareInst;
class Function;
class Instruction;
class MachineFunction;
class MachineInstr;
class MachineRegisterInfo;
class MVT;
class SelectionDAG;
class TargetLowering;
template <typename T> class GenericSSAContext;
using SSAContext = GenericSSAContext<Function>;
template <typename T> class GenericUniformityInfo;
using UniformityInfo = GenericUniformityInfo<SSAContext>;
//===--------------------------------------------------------------------===//
/// FunctionLoweringInfo - This contains information that is global to a
/// function that is used when lowering a region of the function.
///
class FunctionLoweringInfo {
public:
const Function *Fn;
MachineFunction *MF;
const TargetLowering *TLI;
MachineRegisterInfo *RegInfo;
BranchProbabilityInfo *BPI;
const UniformityInfo *UA;
/// CanLowerReturn - true iff the function's return value can be lowered to
/// registers.
bool CanLowerReturn;
/// True if part of the CSRs will be handled via explicit copies.
bool SplitCSR;
/// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg
/// allocated to hold a pointer to the hidden sret parameter.
Register DemoteRegister;
/// MBBMap - A mapping from LLVM basic blocks to their machine code entry.
DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap;
/// ValueMap - Since we emit code for the function a basic block at a time,
/// we must remember which virtual registers hold the values for
/// cross-basic-block values.
DenseMap<const Value *, Register> ValueMap;
/// VirtReg2Value map is needed by the Divergence Analysis driven
/// instruction selection. It is reverted ValueMap. It is computed
/// in lazy style - on demand. It is used to get the Value corresponding
/// to the live in virtual register and is called from the
/// TargetLowerinInfo::isSDNodeSourceOfDivergence.
DenseMap<Register, const Value*> VirtReg2Value;
/// This method is called from TargetLowerinInfo::isSDNodeSourceOfDivergence
/// to get the Value corresponding to the live-in virtual register.
const Value *getValueFromVirtualReg(Register Vreg);
/// Track virtual registers created for exception pointers.
DenseMap<const Value *, Register> CatchPadExceptionPointers;
/// Helper object to track which of three possible relocation mechanisms are
/// used for a particular value being relocated over a statepoint.
struct StatepointRelocationRecord {
enum RelocType {
// Value did not need to be relocated and can be used directly.
NoRelocate,
// Value was spilled to stack and needs filled at the gc.relocate.
Spill,
// Value was lowered to tied def and gc.relocate should be replaced with
// copy from vreg.
VReg,
// Value was lowered to tied def and gc.relocate should be replaced with
// SDValue kept in StatepointLoweringInfo structure. This valid for local
// relocates only.
SDValueNode,
} type = NoRelocate;
// Payload contains either frame index of the stack slot in which the value
// was spilled, or virtual register which contains the re-definition.
union payload_t {
payload_t() : FI(-1) {}
int FI;
Register Reg;
} payload;
};
/// Keep track of each value which was relocated and the strategy used to
/// relocate that value. This information is required when visiting
/// gc.relocates which may appear in following blocks.
using StatepointSpillMapTy =
DenseMap<const Value *, StatepointRelocationRecord>;
DenseMap<const Instruction *, StatepointSpillMapTy> StatepointRelocationMaps;
/// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in
/// the entry block. This allows the allocas to be efficiently referenced
/// anywhere in the function.
DenseMap<const AllocaInst*, int> StaticAllocaMap;
/// ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
DenseMap<const Argument*, int> ByValArgFrameIndexMap;
/// ArgDbgValues - A list of DBG_VALUE instructions created during isel for
/// function arguments that are inserted after scheduling is completed.
SmallVector<MachineInstr*, 8> ArgDbgValues;
/// Bitvector with a bit set if corresponding argument is described in
/// ArgDbgValues. Using arg numbers according to Argument numbering.
BitVector DescribedArgs;
/// RegFixups - Registers which need to be replaced after isel is done.
DenseMap<Register, Register> RegFixups;
DenseSet<Register> RegsWithFixups;
/// StatepointStackSlots - A list of temporary stack slots (frame indices)
/// used to spill values at a statepoint. We store them here to enable
/// reuse of the same stack slots across different statepoints in different
/// basic blocks.
SmallVector<unsigned, 50> StatepointStackSlots;
/// MBB - The current block.
MachineBasicBlock *MBB;
/// MBB - The current insert position inside the current block.
MachineBasicBlock::iterator InsertPt;
struct LiveOutInfo {
unsigned NumSignBits : 31;
unsigned IsValid : 1;
KnownBits Known = 1;
LiveOutInfo() : NumSignBits(0), IsValid(true) {}
};
/// Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND)
/// for a value.
DenseMap<const Value *, ISD::NodeType> PreferredExtendType;
/// VisitedBBs - The set of basic blocks visited thus far by instruction
/// selection.
SmallPtrSet<const BasicBlock*, 4> VisitedBBs;
/// PHINodesToUpdate - A list of phi instructions whose operand list will
/// be updated after processing the current basic block.
/// TODO: This isn't per-function state, it's per-basic-block state. But
/// there's no other convenient place for it to live right now.
std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate;
unsigned OrigNumPHINodesToUpdate;
/// If the current MBB is a landing pad, the exception pointer and exception
/// selector registers are copied into these virtual registers by
/// SelectionDAGISel::PrepareEHLandingPad().
unsigned ExceptionPointerVirtReg, ExceptionSelectorVirtReg;
/// Collection of dbg.declare instructions handled after argument
/// lowering and before ISel proper.
SmallPtrSet<const DbgDeclareInst *, 8> PreprocessedDbgDeclares;
/// set - Initialize this FunctionLoweringInfo with the given Function
/// and its associated MachineFunction.
///
void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG);
/// clear - Clear out all the function-specific state. This returns this
/// FunctionLoweringInfo to an empty state, ready to be used for a
/// different function.
void clear();
/// isExportedInst - Return true if the specified value is an instruction
/// exported from its block.
bool isExportedInst(const Value *V) const {
return ValueMap.count(V);
}
Register CreateReg(MVT VT, bool isDivergent = false);
Register CreateRegs(const Value *V);
Register CreateRegs(Type *Ty, bool isDivergent = false);
Register InitializeRegForValue(const Value *V) {
// Tokens never live in vregs.
if (V->getType()->isTokenTy())
return 0;
Register &R = ValueMap[V];
assert(R == 0 && "Already initialized this value register!");
assert(VirtReg2Value.empty());
return R = CreateRegs(V);
}
/// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
/// register is a PHI destination and the PHI's LiveOutInfo is not valid.
const LiveOutInfo *GetLiveOutRegInfo(Register Reg) {
if (!LiveOutRegInfo.inBounds(Reg))
return nullptr;
const LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
if (!LOI->IsValid)
return nullptr;
return LOI;
}
/// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
/// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
/// the register's LiveOutInfo is for a smaller bit width, it is extended to
/// the larger bit width by zero extension. The bit width must be no smaller
/// than the LiveOutInfo's existing bit width.
const LiveOutInfo *GetLiveOutRegInfo(Register Reg, unsigned BitWidth);
/// AddLiveOutRegInfo - Adds LiveOutInfo for a register.
void AddLiveOutRegInfo(Register Reg, unsigned NumSignBits,
const KnownBits &Known) {
// Only install this information if it tells us something.
if (NumSignBits == 1 && Known.isUnknown())
return;
LiveOutRegInfo.grow(Reg);
LiveOutInfo &LOI = LiveOutRegInfo[Reg];
LOI.NumSignBits = NumSignBits;
LOI.Known.One = Known.One;
LOI.Known.Zero = Known.Zero;
}
/// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
/// register based on the LiveOutInfo of its operands.
void ComputePHILiveOutRegInfo(const PHINode*);
/// InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be
/// called when a block is visited before all of its predecessors.
void InvalidatePHILiveOutRegInfo(const PHINode *PN) {
// PHIs with no uses have no ValueMap entry.
DenseMap<const Value*, Register>::const_iterator It = ValueMap.find(PN);
if (It == ValueMap.end())
return;
Register Reg = It->second;
if (Reg == 0)
return;
LiveOutRegInfo.grow(Reg);
LiveOutRegInfo[Reg].IsValid = false;
}
/// setArgumentFrameIndex - Record frame index for the byval
/// argument.
void setArgumentFrameIndex(const Argument *A, int FI);
/// getArgumentFrameIndex - Get frame index for the byval argument.
int getArgumentFrameIndex(const Argument *A);
Register getCatchPadExceptionPointerVReg(const Value *CPI,
const TargetRegisterClass *RC);
private:
/// LiveOutRegInfo - Information about live out vregs.
IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
PK hwFZ. c c CodeGen/LatencyPriorityQueue.hnu �[��� //===---- LatencyPriorityQueue.h - A latency-oriented priority queue ------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the LatencyPriorityQueue class, which is a
// SchedulingPriorityQueue that schedules using latency information to
// reduce the length of the critical path through the basic block.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LATENCYPRIORITYQUEUE_H
#define LLVM_CODEGEN_LATENCYPRIORITYQUEUE_H
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/Config/llvm-config.h"
namespace llvm {
class LatencyPriorityQueue;
/// Sorting functions for the Available queue.
struct latency_sort {
LatencyPriorityQueue *PQ;
explicit latency_sort(LatencyPriorityQueue *pq) : PQ(pq) {}
bool operator()(const SUnit* LHS, const SUnit* RHS) const;
};
class LatencyPriorityQueue : public SchedulingPriorityQueue {
// SUnits - The SUnits for the current graph.
std::vector<SUnit> *SUnits = nullptr;
/// NumNodesSolelyBlocking - This vector contains, for every node in the
/// Queue, the number of nodes that the node is the sole unscheduled
/// predecessor for. This is used as a tie-breaker heuristic for better
/// mobility.
std::vector<unsigned> NumNodesSolelyBlocking;
/// Queue - The queue.
std::vector<SUnit*> Queue;
latency_sort Picker;
public:
LatencyPriorityQueue() : Picker(this) {
}
bool isBottomUp() const override { return false; }
void initNodes(std::vector<SUnit> &sunits) override {
SUnits = &sunits;
NumNodesSolelyBlocking.resize(SUnits->size(), 0);
}
void addNode(const SUnit *SU) override {
NumNodesSolelyBlocking.resize(SUnits->size(), 0);
}
void updateNode(const SUnit *SU) override {
}
void releaseState() override {
SUnits = nullptr;
}
unsigned getLatency(unsigned NodeNum) const {
assert(NodeNum < (*SUnits).size());
return (*SUnits)[NodeNum].getHeight();
}
unsigned getNumSolelyBlockNodes(unsigned NodeNum) const {
assert(NodeNum < NumNodesSolelyBlocking.size());
return NumNodesSolelyBlocking[NodeNum];
}
bool empty() const override { return Queue.empty(); }
void push(SUnit *U) override;
SUnit *pop() override;
void remove(SUnit *SU) override;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD void dump(ScheduleDAG *DAG) const override;
#endif
// scheduledNode - As nodes are scheduled, we look to see if there are any
// successor nodes that have a single unscheduled predecessor. If so, that
// single predecessor has a higher priority, since scheduling it will make
// the node available.
void scheduledNode(SUnit *SU) override;
private:
void AdjustPriorityOfUnscheduledPreds(SUnit *SU);
SUnit *getSingleUnscheduledPred(SUnit *SU);
};
}
#endif
PK hwFZsJJ"� � CodeGen/TargetOpcodes.hnu �[��� //===-- llvm/CodeGen/TargetOpcodes.h - Target Indep Opcodes -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the target independent instruction opcodes.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_TARGETOPCODES_H
#define LLVM_CODEGEN_TARGETOPCODES_H
namespace llvm {
/// Invariant opcodes: All instruction sets have these as their low opcodes.
///
namespace TargetOpcode {
enum {
#define HANDLE_TARGET_OPCODE(OPC) OPC,
#define HANDLE_TARGET_OPCODE_MARKER(IDENT, OPC) IDENT = OPC,
#include "llvm/Support/TargetOpcodes.def"
};
} // end namespace TargetOpcode
/// Check whether the given Opcode is a generic opcode that is not supposed
/// to appear after ISel.
inline bool isPreISelGenericOpcode(unsigned Opcode) {
return Opcode >= TargetOpcode::PRE_ISEL_GENERIC_OPCODE_START &&
Opcode <= TargetOpcode::PRE_ISEL_GENERIC_OPCODE_END;
}
/// Check whether the given Opcode is a target-specific opcode.
inline bool isTargetSpecificOpcode(unsigned Opcode) {
return Opcode > TargetOpcode::PRE_ISEL_GENERIC_OPCODE_END;
}
/// \returns true if \p Opcode is an optimization hint opcode which is not
/// supposed to appear after ISel.
inline bool isPreISelGenericOptimizationHint(unsigned Opcode) {
return Opcode >= TargetOpcode::PRE_ISEL_GENERIC_OPTIMIZATION_HINT_START &&
Opcode <= TargetOpcode::PRE_ISEL_GENERIC_OPTIMIZATION_HINT_END;
}
} // end namespace llvm
#endif
PK hwFZ��� � � CodeGen/GCMetadata.hnu �[��� //===- GCMetadata.h - Garbage collector metadata ----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the GCFunctionInfo and GCModuleInfo classes, which are
// used as a communication channel from the target code generator to the target
// garbage collectors. This interface allows code generators and garbage
// collectors to be developed independently.
//
// The GCFunctionInfo class logs the data necessary to build a type accurate
// stack map. The code generator outputs:
//
// - Safe points as specified by the GCStrategy's NeededSafePoints.
// - Stack offsets for GC roots, as specified by calls to llvm.gcroot
//
// As a refinement, liveness analysis calculates the set of live roots at each
// safe point. Liveness analysis is not presently performed by the code
// generator, so all roots are assumed live.
//
// GCModuleInfo simply collects GCFunctionInfo instances for each Function as
// they are compiled. This accretion is necessary for collectors which must emit
// a stack map for the compilation unit as a whole. Therefore, GCFunctionInfo
// outlives the MachineFunction from which it is derived and must not refer to
// any code generator data structures.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GCMETADATA_H
#define LLVM_CODEGEN_GCMETADATA_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/GCStrategy.h"
#include "llvm/Pass.h"
#include <algorithm>
#include <cstddef>
#include <cstdint>
#include <memory>
#include <vector>
namespace llvm {
class Constant;
class Function;
class MCSymbol;
/// GCPoint - Metadata for a collector-safe point in machine code.
///
struct GCPoint {
MCSymbol *Label; ///< A label.
DebugLoc Loc;
GCPoint(MCSymbol *L, DebugLoc DL)
: Label(L), Loc(std::move(DL)) {}
};
/// GCRoot - Metadata for a pointer to an object managed by the garbage
/// collector.
struct GCRoot {
int Num; ///< Usually a frame index.
int StackOffset = -1; ///< Offset from the stack pointer.
const Constant *Metadata; ///< Metadata straight from the call
///< to llvm.gcroot.
GCRoot(int N, const Constant *MD) : Num(N), Metadata(MD) {}
};
/// Garbage collection metadata for a single function. Currently, this
/// information only applies to GCStrategies which use GCRoot.
class GCFunctionInfo {
public:
using iterator = std::vector<GCPoint>::iterator;
using roots_iterator = std::vector<GCRoot>::iterator;
using live_iterator = std::vector<GCRoot>::const_iterator;
private:
const Function &F;
GCStrategy &S;
uint64_t FrameSize;
std::vector<GCRoot> Roots;
std::vector<GCPoint> SafePoints;
// FIXME: Liveness. A 2D BitVector, perhaps?
//
// BitVector Liveness;
//
// bool islive(int point, int root) =
// Liveness[point * SafePoints.size() + root]
//
// The bit vector is the more compact representation where >3.2% of roots
// are live per safe point (1.5% on 64-bit hosts).
public:
GCFunctionInfo(const Function &F, GCStrategy &S);
~GCFunctionInfo();
/// getFunction - Return the function to which this metadata applies.
const Function &getFunction() const { return F; }
/// getStrategy - Return the GC strategy for the function.
GCStrategy &getStrategy() { return S; }
/// addStackRoot - Registers a root that lives on the stack. Num is the
/// stack object ID for the alloca (if the code generator is
// using MachineFrameInfo).
void addStackRoot(int Num, const Constant *Metadata) {
Roots.push_back(GCRoot(Num, Metadata));
}
/// removeStackRoot - Removes a root.
roots_iterator removeStackRoot(roots_iterator position) {
return Roots.erase(position);
}
/// addSafePoint - Notes the existence of a safe point. Num is the ID of the
/// label just prior to the safe point (if the code generator is using
/// MachineModuleInfo).
void addSafePoint(MCSymbol *Label, const DebugLoc &DL) {
SafePoints.emplace_back(Label, DL);
}
/// getFrameSize/setFrameSize - Records the function's frame size.
uint64_t getFrameSize() const { return FrameSize; }
void setFrameSize(uint64_t S) { FrameSize = S; }
/// begin/end - Iterators for safe points.
iterator begin() { return SafePoints.begin(); }
iterator end() { return SafePoints.end(); }
size_t size() const { return SafePoints.size(); }
/// roots_begin/roots_end - Iterators for all roots in the function.
roots_iterator roots_begin() { return Roots.begin(); }
roots_iterator roots_end() { return Roots.end(); }
size_t roots_size() const { return Roots.size(); }
/// live_begin/live_end - Iterators for live roots at a given safe point.
live_iterator live_begin(const iterator &p) { return roots_begin(); }
live_iterator live_end(const iterator &p) { return roots_end(); }
size_t live_size(const iterator &p) const { return roots_size(); }
};
/// An analysis pass which caches information about the entire Module.
/// Records both the function level information used by GCRoots and a
/// cache of the 'active' gc strategy objects for the current Module.
class GCModuleInfo : public ImmutablePass {
/// An owning list of all GCStrategies which have been created
SmallVector<std::unique_ptr<GCStrategy>, 1> GCStrategyList;
/// A helper map to speedup lookups into the above list
StringMap<GCStrategy*> GCStrategyMap;
public:
/// Lookup the GCStrategy object associated with the given gc name.
/// Objects are owned internally; No caller should attempt to delete the
/// returned objects.
GCStrategy *getGCStrategy(const StringRef Name);
/// List of per function info objects. In theory, Each of these
/// may be associated with a different GC.
using FuncInfoVec = std::vector<std::unique_ptr<GCFunctionInfo>>;
FuncInfoVec::iterator funcinfo_begin() { return Functions.begin(); }
FuncInfoVec::iterator funcinfo_end() { return Functions.end(); }
private:
/// Owning list of all GCFunctionInfos associated with this Module
FuncInfoVec Functions;
/// Non-owning map to bypass linear search when finding the GCFunctionInfo
/// associated with a particular Function.
using finfo_map_type = DenseMap<const Function *, GCFunctionInfo *>;
finfo_map_type FInfoMap;
public:
using iterator = SmallVector<std::unique_ptr<GCStrategy>, 1>::const_iterator;
static char ID;
GCModuleInfo();
/// clear - Resets the pass. Any pass, which uses GCModuleInfo, should
/// call it in doFinalization().
///
void clear();
/// begin/end - Iterators for used strategies.
///
iterator begin() const { return GCStrategyList.begin(); }
iterator end() const { return GCStrategyList.end(); }
/// get - Look up function metadata. This is currently assumed
/// have the side effect of initializing the associated GCStrategy. That
/// will soon change.
GCFunctionInfo &getFunctionInfo(const Function &F);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_GCMETADATA_H
PK hwFZ(�c7& & CodeGen/MachineSSAUpdater.hnu �[��� //===- MachineSSAUpdater.h - Unstructured SSA Update Tool -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the MachineSSAUpdater class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINESSAUPDATER_H
#define LLVM_CODEGEN_MACHINESSAUPDATER_H
#include "llvm/CodeGen/Register.h"
namespace llvm {
class MachineBasicBlock;
class MachineFunction;
class MachineInstr;
class MachineOperand;
class MachineRegisterInfo;
class TargetInstrInfo;
class TargetRegisterClass;
template<typename T> class SmallVectorImpl;
template<typename T> class SSAUpdaterTraits;
/// MachineSSAUpdater - This class updates SSA form for a set of virtual
/// registers defined in multiple blocks. This is used when code duplication
/// or another unstructured transformation wants to rewrite a set of uses of one
/// vreg with uses of a set of vregs.
class MachineSSAUpdater {
friend class SSAUpdaterTraits<MachineSSAUpdater>;
private:
/// AvailableVals - This keeps track of which value to use on a per-block
/// basis. When we insert PHI nodes, we keep track of them here.
//typedef DenseMap<MachineBasicBlock*, Register> AvailableValsTy;
void *AV = nullptr;
/// VRC - Register class of the current virtual register.
const TargetRegisterClass *VRC = nullptr;
/// InsertedPHIs - If this is non-null, the MachineSSAUpdater adds all PHI
/// nodes that it creates to the vector.
SmallVectorImpl<MachineInstr*> *InsertedPHIs;
const TargetInstrInfo *TII = nullptr;
MachineRegisterInfo *MRI = nullptr;
public:
/// MachineSSAUpdater constructor. If InsertedPHIs is specified, it will be
/// filled in with all PHI Nodes created by rewriting.
explicit MachineSSAUpdater(MachineFunction &MF,
SmallVectorImpl<MachineInstr*> *NewPHI = nullptr);
MachineSSAUpdater(const MachineSSAUpdater &) = delete;
MachineSSAUpdater &operator=(const MachineSSAUpdater &) = delete;
~MachineSSAUpdater();
/// Initialize - Reset this object to get ready for a new set of SSA
/// updates.
void Initialize(Register V);
void Initialize(const TargetRegisterClass *RC);
/// AddAvailableValue - Indicate that a rewritten value is available at the
/// end of the specified block with the specified value.
void AddAvailableValue(MachineBasicBlock *BB, Register V);
/// HasValueForBlock - Return true if the MachineSSAUpdater already has a
/// value for the specified block.
bool HasValueForBlock(MachineBasicBlock *BB) const;
/// GetValueAtEndOfBlock - Construct SSA form, materializing a value that is
/// live at the end of the specified block.
Register GetValueAtEndOfBlock(MachineBasicBlock *BB);
/// GetValueInMiddleOfBlock - Construct SSA form, materializing a value that
/// is live in the middle of the specified block. If ExistingValueOnly is
/// true then this will only return an existing value or $noreg; otherwise new
/// instructions may be inserted to materialize a value.
///
/// GetValueInMiddleOfBlock is the same as GetValueAtEndOfBlock except in one
/// important case: if there is a definition of the rewritten value after the
/// 'use' in BB. Consider code like this:
///
/// X1 = ...
/// SomeBB:
/// use(X)
/// X2 = ...
/// br Cond, SomeBB, OutBB
///
/// In this case, there are two values (X1 and X2) added to the AvailableVals
/// set by the client of the rewriter, and those values are both live out of
/// their respective blocks. However, the use of X happens in the *middle* of
/// a block. Because of this, we need to insert a new PHI node in SomeBB to
/// merge the appropriate values, and this value isn't live out of the block.
Register GetValueInMiddleOfBlock(MachineBasicBlock *BB,
bool ExistingValueOnly = false);
/// RewriteUse - Rewrite a use of the symbolic value. This handles PHI nodes,
/// which use their value in the corresponding predecessor. Note that this
/// will not work if the use is supposed to be rewritten to a value defined in
/// the same block as the use, but above it. Any 'AddAvailableValue's added
/// for the use's block will be considered to be below it.
void RewriteUse(MachineOperand &U);
private:
// If ExistingValueOnly is true, will not create any new instructions. Used
// for debug values, which cannot modify Codegen.
Register GetValueAtEndOfBlockInternal(MachineBasicBlock *BB,
bool ExistingValueOnly = false);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINESSAUPDATER_H
PK hwFZw��5
5
CodeGen/StackProtector.hnu �[��� //===- StackProtector.h - Stack Protector Insertion -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This pass inserts stack protectors into functions which need them. A variable
// with a random value in it is stored onto the stack before the local variables
// are allocated. Upon exiting the block, the stored value is checked. If it's
// changed, then there was some sort of violation and the program aborts.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_STACKPROTECTOR_H
#define LLVM_CODEGEN_STACKPROTECTOR_H
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/Analysis/DomTreeUpdater.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/IR/Instructions.h"
#include "llvm/Pass.h"
#include "llvm/TargetParser/Triple.h"
namespace llvm {
class BasicBlock;
class Function;
class Module;
class TargetLoweringBase;
class TargetMachine;
class StackProtector : public FunctionPass {
private:
static constexpr unsigned DefaultSSPBufferSize = 8;
/// A mapping of AllocaInsts to their required SSP layout.
using SSPLayoutMap = DenseMap<const AllocaInst *,
MachineFrameInfo::SSPLayoutKind>;
const TargetMachine *TM = nullptr;
/// TLI - Keep a pointer of a TargetLowering to consult for determining
/// target type sizes.
const TargetLoweringBase *TLI = nullptr;
Triple Trip;
Function *F = nullptr;
Module *M = nullptr;
std::optional<DomTreeUpdater> DTU;
/// Layout - Mapping of allocations to the required SSPLayoutKind.
/// StackProtector analysis will update this map when determining if an
/// AllocaInst triggers a stack protector.
SSPLayoutMap Layout;
/// The minimum size of buffers that will receive stack smashing
/// protection when -fstack-protection is used.
unsigned SSPBufferSize = DefaultSSPBufferSize;
// A prologue is generated.
bool HasPrologue = false;
// IR checking code is generated.
bool HasIRCheck = false;
/// InsertStackProtectors - Insert code into the prologue and epilogue of
/// the function.
///
/// - The prologue code loads and stores the stack guard onto the stack.
/// - The epilogue checks the value stored in the prologue against the
/// original value. It calls __stack_chk_fail if they differ.
bool InsertStackProtectors();
/// CreateFailBB - Create a basic block to jump to when the stack protector
/// check fails.
BasicBlock *CreateFailBB();
public:
static char ID; // Pass identification, replacement for typeid.
StackProtector();
void getAnalysisUsage(AnalysisUsage &AU) const override;
// Return true if StackProtector is supposed to be handled by SelectionDAG.
bool shouldEmitSDCheck(const BasicBlock &BB) const;
bool runOnFunction(Function &Fn) override;
void copyToMachineFrameInfo(MachineFrameInfo &MFI) const;
/// Check whether or not \p F needs a stack protector based upon the stack
/// protector level.
static bool requiresStackProtector(Function *F, SSPLayoutMap *Layout = nullptr);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_STACKPROTECTOR_H
PK hwFZ��� # CodeGen/ComplexDeinterleavingPass.hnu �[��� //===- ComplexDeinterleavingPass.h - Complex Deinterleaving Pass *- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This pass implements generation of target-specific intrinsics to support
// handling of complex number arithmetic and deinterleaving.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_COMPLEXDEINTERLEAVING_H
#define LLVM_CODEGEN_COMPLEXDEINTERLEAVING_H
#include "llvm/IR/PassManager.h"
namespace llvm {
class Function;
class TargetMachine;
struct ComplexDeinterleavingPass
: public PassInfoMixin<ComplexDeinterleavingPass> {
private:
TargetMachine *TM;
public:
ComplexDeinterleavingPass(TargetMachine *TM) : TM(TM) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
enum class ComplexDeinterleavingOperation {
CAdd,
CMulPartial,
// The following 'operations' are used to represent internal states. Backends
// are not expected to try and support these in any capacity.
Deinterleave,
Splat,
Symmetric,
ReductionPHI,
ReductionOperation,
ReductionSelect,
};
enum class ComplexDeinterleavingRotation {
Rotation_0 = 0,
Rotation_90 = 1,
Rotation_180 = 2,
Rotation_270 = 3,
};
} // namespace llvm
#endif // LLVM_CODEGEN_COMPLEXDEINTERLEAVING_H
PK hwFZ��5�< �< CodeGen/ScheduleDAGInstrs.hnu �[��� //===- ScheduleDAGInstrs.h - MachineInstr Scheduling ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file Implements the ScheduleDAGInstrs class, which implements scheduling
/// for a MachineInstr-based dependency graph.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_SCHEDULEDAGINSTRS_H
#define LLVM_CODEGEN_SCHEDULEDAGINSTRS_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/PointerIntPair.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/SparseMultiSet.h"
#include "llvm/ADT/SparseSet.h"
#include "llvm/ADT/identity.h"
#include "llvm/CodeGen/LivePhysRegs.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSchedule.h"
#include "llvm/MC/LaneBitmask.h"
#include <cassert>
#include <cstdint>
#include <list>
#include <string>
#include <utility>
#include <vector>
namespace llvm {
class AAResults;
class LiveIntervals;
class MachineFrameInfo;
class MachineFunction;
class MachineInstr;
class MachineLoopInfo;
class MachineOperand;
struct MCSchedClassDesc;
class PressureDiffs;
class PseudoSourceValue;
class RegPressureTracker;
class UndefValue;
class Value;
/// An individual mapping from virtual register number to SUnit.
struct VReg2SUnit {
unsigned VirtReg;
LaneBitmask LaneMask;
SUnit *SU;
VReg2SUnit(unsigned VReg, LaneBitmask LaneMask, SUnit *SU)
: VirtReg(VReg), LaneMask(LaneMask), SU(SU) {}
unsigned getSparseSetIndex() const {
return Register::virtReg2Index(VirtReg);
}
};
/// Mapping from virtual register to SUnit including an operand index.
struct VReg2SUnitOperIdx : public VReg2SUnit {
unsigned OperandIndex;
VReg2SUnitOperIdx(unsigned VReg, LaneBitmask LaneMask,
unsigned OperandIndex, SUnit *SU)
: VReg2SUnit(VReg, LaneMask, SU), OperandIndex(OperandIndex) {}
};
/// Record a physical register access.
/// For non-data-dependent uses, OpIdx == -1.
struct PhysRegSUOper {
SUnit *SU;
int OpIdx;
unsigned Reg;
PhysRegSUOper(SUnit *su, int op, unsigned R): SU(su), OpIdx(op), Reg(R) {}
unsigned getSparseSetIndex() const { return Reg; }
};
/// Use a SparseMultiSet to track physical registers. Storage is only
/// allocated once for the pass. It can be cleared in constant time and reused
/// without any frees.
using Reg2SUnitsMap =
SparseMultiSet<PhysRegSUOper, identity<unsigned>, uint16_t>;
/// Use SparseSet as a SparseMap by relying on the fact that it never
/// compares ValueT's, only unsigned keys. This allows the set to be cleared
/// between scheduling regions in constant time as long as ValueT does not
/// require a destructor.
using VReg2SUnitMap = SparseSet<VReg2SUnit, VirtReg2IndexFunctor>;
/// Track local uses of virtual registers. These uses are gathered by the DAG
/// builder and may be consulted by the scheduler to avoid iterating an entire
/// vreg use list.
using VReg2SUnitMultiMap = SparseMultiSet<VReg2SUnit, VirtReg2IndexFunctor>;
using VReg2SUnitOperIdxMultiMap =
SparseMultiSet<VReg2SUnitOperIdx, VirtReg2IndexFunctor>;
using ValueType = PointerUnion<const Value *, const PseudoSourceValue *>;
struct UnderlyingObject : PointerIntPair<ValueType, 1, bool> {
UnderlyingObject(ValueType V, bool MayAlias)
: PointerIntPair<ValueType, 1, bool>(V, MayAlias) {}
ValueType getValue() const { return getPointer(); }
bool mayAlias() const { return getInt(); }
};
using UnderlyingObjectsVector = SmallVector<UnderlyingObject, 4>;
/// A ScheduleDAG for scheduling lists of MachineInstr.
class ScheduleDAGInstrs : public ScheduleDAG {
protected:
const MachineLoopInfo *MLI = nullptr;
const MachineFrameInfo &MFI;
/// TargetSchedModel provides an interface to the machine model.
TargetSchedModel SchedModel;
/// True if the DAG builder should remove kill flags (in preparation for
/// rescheduling).
bool RemoveKillFlags;
/// The standard DAG builder does not normally include terminators as DAG
/// nodes because it does not create the necessary dependencies to prevent
/// reordering. A specialized scheduler can override
/// TargetInstrInfo::isSchedulingBoundary then enable this flag to indicate
/// it has taken responsibility for scheduling the terminator correctly.
bool CanHandleTerminators = false;
/// Whether lane masks should get tracked.
bool TrackLaneMasks = false;
// State specific to the current scheduling region.
// ------------------------------------------------
/// The block in which to insert instructions
MachineBasicBlock *BB = nullptr;
/// The beginning of the range to be scheduled.
MachineBasicBlock::iterator RegionBegin;
/// The end of the range to be scheduled.
MachineBasicBlock::iterator RegionEnd;
/// Instructions in this region (distance(RegionBegin, RegionEnd)).
unsigned NumRegionInstrs = 0;
/// After calling BuildSchedGraph, each machine instruction in the current
/// scheduling region is mapped to an SUnit.
DenseMap<MachineInstr*, SUnit*> MISUnitMap;
// State internal to DAG building.
// -------------------------------
/// Defs, Uses - Remember where defs and uses of each register are as we
/// iterate upward through the instructions. This is allocated here instead
/// of inside BuildSchedGraph to avoid the need for it to be initialized and
/// destructed for each block.
Reg2SUnitsMap Defs;
Reg2SUnitsMap Uses;
/// Tracks the last instruction(s) in this region defining each virtual
/// register. There may be multiple current definitions for a register with
/// disjunct lanemasks.
VReg2SUnitMultiMap CurrentVRegDefs;
/// Tracks the last instructions in this region using each virtual register.
VReg2SUnitOperIdxMultiMap CurrentVRegUses;
AAResults *AAForDep = nullptr;
/// Remember a generic side-effecting instruction as we proceed.
/// No other SU ever gets scheduled around it (except in the special
/// case of a huge region that gets reduced).
SUnit *BarrierChain = nullptr;
public:
/// A list of SUnits, used in Value2SUsMap, during DAG construction.
/// Note: to gain speed it might be worth investigating an optimized
/// implementation of this data structure, such as a singly linked list
/// with a memory pool (SmallVector was tried but slow and SparseSet is not
/// applicable).
using SUList = std::list<SUnit *>;
protected:
/// A map from ValueType to SUList, used during DAG construction, as
/// a means of remembering which SUs depend on which memory locations.
class Value2SUsMap;
/// Reduces maps in FIFO order, by N SUs. This is better than turning
/// every Nth memory SU into BarrierChain in buildSchedGraph(), since
/// it avoids unnecessary edges between seen SUs above the new BarrierChain,
/// and those below it.
void reduceHugeMemNodeMaps(Value2SUsMap &stores,
Value2SUsMap &loads, unsigned N);
/// Adds a chain edge between SUa and SUb, but only if both
/// AAResults and Target fail to deny the dependency.
void addChainDependency(SUnit *SUa, SUnit *SUb,
unsigned Latency = 0);
/// Adds dependencies as needed from all SUs in list to SU.
void addChainDependencies(SUnit *SU, SUList &SUs, unsigned Latency) {
for (SUnit *Entry : SUs)
addChainDependency(SU, Entry, Latency);
}
/// Adds dependencies as needed from all SUs in map, to SU.
void addChainDependencies(SUnit *SU, Value2SUsMap &Val2SUsMap);
/// Adds dependencies as needed to SU, from all SUs mapped to V.
void addChainDependencies(SUnit *SU, Value2SUsMap &Val2SUsMap,
ValueType V);
/// Adds barrier chain edges from all SUs in map, and then clear the map.
/// This is equivalent to insertBarrierChain(), but optimized for the common
/// case where the new BarrierChain (a global memory object) has a higher
/// NodeNum than all SUs in map. It is assumed BarrierChain has been set
/// before calling this.
void addBarrierChain(Value2SUsMap &map);
/// Inserts a barrier chain in a huge region, far below current SU.
/// Adds barrier chain edges from all SUs in map with higher NodeNums than
/// this new BarrierChain, and remove them from map. It is assumed
/// BarrierChain has been set before calling this.
void insertBarrierChain(Value2SUsMap &map);
/// For an unanalyzable memory access, this Value is used in maps.
UndefValue *UnknownValue;
/// Topo - A topological ordering for SUnits which permits fast IsReachable
/// and similar queries.
ScheduleDAGTopologicalSort Topo;
using DbgValueVector =
std::vector<std::pair<MachineInstr *, MachineInstr *>>;
/// Remember instruction that precedes DBG_VALUE.
/// These are generated by buildSchedGraph but persist so they can be
/// referenced when emitting the final schedule.
DbgValueVector DbgValues;
MachineInstr *FirstDbgValue = nullptr;
/// Set of live physical registers for updating kill flags.
LivePhysRegs LiveRegs;
public:
explicit ScheduleDAGInstrs(MachineFunction &mf,
const MachineLoopInfo *mli,
bool RemoveKillFlags = false);
~ScheduleDAGInstrs() override = default;
/// Gets the machine model for instruction scheduling.
const TargetSchedModel *getSchedModel() const { return &SchedModel; }
/// Resolves and cache a resolved scheduling class for an SUnit.
const MCSchedClassDesc *getSchedClass(SUnit *SU) const {
if (!SU->SchedClass && SchedModel.hasInstrSchedModel())
SU->SchedClass = SchedModel.resolveSchedClass(SU->getInstr());
return SU->SchedClass;
}
/// IsReachable - Checks if SU is reachable from TargetSU.
bool IsReachable(SUnit *SU, SUnit *TargetSU) {
return Topo.IsReachable(SU, TargetSU);
}
/// Returns an iterator to the top of the current scheduling region.
MachineBasicBlock::iterator begin() const { return RegionBegin; }
/// Returns an iterator to the bottom of the current scheduling region.
MachineBasicBlock::iterator end() const { return RegionEnd; }
/// Creates a new SUnit and return a ptr to it.
SUnit *newSUnit(MachineInstr *MI);
/// Returns an existing SUnit for this MI, or nullptr.
SUnit *getSUnit(MachineInstr *MI) const;
/// If this method returns true, handling of the scheduling regions
/// themselves (in case of a scheduling boundary in MBB) will be done
/// beginning with the topmost region of MBB.
virtual bool doMBBSchedRegionsTopDown() const { return false; }
/// Prepares to perform scheduling in the given block.
virtual void startBlock(MachineBasicBlock *BB);
/// Cleans up after scheduling in the given block.
virtual void finishBlock();
/// Initialize the DAG and common scheduler state for a new
/// scheduling region. This does not actually create the DAG, only clears
/// it. The scheduling driver may call BuildSchedGraph multiple times per
/// scheduling region.
virtual void enterRegion(MachineBasicBlock *bb,
MachineBasicBlock::iterator begin,
MachineBasicBlock::iterator end,
unsigned regioninstrs);
/// Called when the scheduler has finished scheduling the current region.
virtual void exitRegion();
/// Builds SUnits for the current region.
/// If \p RPTracker is non-null, compute register pressure as a side effect.
/// The DAG builder is an efficient place to do it because it already visits
/// operands.
void buildSchedGraph(AAResults *AA,
RegPressureTracker *RPTracker = nullptr,
PressureDiffs *PDiffs = nullptr,
LiveIntervals *LIS = nullptr,
bool TrackLaneMasks = false);
/// Adds dependencies from instructions in the current list of
/// instructions being scheduled to scheduling barrier. We want to make sure
/// instructions which define registers that are either used by the
/// terminator or are live-out are properly scheduled. This is especially
/// important when the definition latency of the return value(s) are too
/// high to be hidden by the branch or when the liveout registers used by
/// instructions in the fallthrough block.
void addSchedBarrierDeps();
/// Orders nodes according to selected style.
///
/// Typically, a scheduling algorithm will implement schedule() without
/// overriding enterRegion() or exitRegion().
virtual void schedule() = 0;
/// Allow targets to perform final scheduling actions at the level of the
/// whole MachineFunction. By default does nothing.
virtual void finalizeSchedule() {}
void dumpNode(const SUnit &SU) const override;
void dump() const override;
/// Returns a label for a DAG node that points to an instruction.
std::string getGraphNodeLabel(const SUnit *SU) const override;
/// Returns a label for the region of code covered by the DAG.
std::string getDAGName() const override;
/// Fixes register kill flags that scheduling has made invalid.
void fixupKills(MachineBasicBlock &MBB);
/// True if an edge can be added from PredSU to SuccSU without creating
/// a cycle.
bool canAddEdge(SUnit *SuccSU, SUnit *PredSU);
/// Add a DAG edge to the given SU with the given predecessor
/// dependence data.
///
/// \returns true if the edge may be added without creating a cycle OR if an
/// equivalent edge already existed (false indicates failure).
bool addEdge(SUnit *SuccSU, const SDep &PredDep);
protected:
void initSUnits();
void addPhysRegDataDeps(SUnit *SU, unsigned OperIdx);
void addPhysRegDeps(SUnit *SU, unsigned OperIdx);
void addVRegDefDeps(SUnit *SU, unsigned OperIdx);
void addVRegUseDeps(SUnit *SU, unsigned OperIdx);
/// Returns a mask for which lanes get read/written by the given (register)
/// machine operand.
LaneBitmask getLaneMaskForMO(const MachineOperand &MO) const;
/// Returns true if the def register in \p MO has no uses.
bool deadDefHasNoUse(const MachineOperand &MO);
};
/// Creates a new SUnit and return a ptr to it.
inline SUnit *ScheduleDAGInstrs::newSUnit(MachineInstr *MI) {
#ifndef NDEBUG
const SUnit *Addr = SUnits.empty() ? nullptr : &SUnits[0];
#endif
SUnits.emplace_back(MI, (unsigned)SUnits.size());
assert((Addr == nullptr || Addr == &SUnits[0]) &&
"SUnits std::vector reallocated on the fly!");
return &SUnits.back();
}
/// Returns an existing SUnit for this MI, or nullptr.
inline SUnit *ScheduleDAGInstrs::getSUnit(MachineInstr *MI) const {
return MISUnitMap.lookup(MI);
}
} // end namespace llvm
#endif // LLVM_CODEGEN_SCHEDULEDAGINSTRS_H
PK hwFZ�M,\� � CodeGen/LiveRegMatrix.hnu �[��� //===- LiveRegMatrix.h - Track register interference ----------*- C++ -*---===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// The LiveRegMatrix analysis pass keeps track of virtual register interference
// along two dimensions: Slot indexes and register units. The matrix is used by
// register allocators to ensure that no interfering virtual registers get
// assigned to overlapping physical registers.
//
// Register units are defined in MCRegisterInfo.h, they represent the smallest
// unit of interference when dealing with overlapping physical registers. The
// LiveRegMatrix is represented as a LiveIntervalUnion per register unit. When
// a virtual register is assigned to a physical register, the live range for
// the virtual register is inserted into the LiveIntervalUnion for each regunit
// in the physreg.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LIVEREGMATRIX_H
#define LLVM_CODEGEN_LIVEREGMATRIX_H
#include "llvm/ADT/BitVector.h"
#include "llvm/CodeGen/LiveIntervalUnion.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include <memory>
namespace llvm {
class AnalysisUsage;
class LiveInterval;
class LiveIntervals;
class MachineFunction;
class TargetRegisterInfo;
class VirtRegMap;
class LiveRegMatrix : public MachineFunctionPass {
const TargetRegisterInfo *TRI = nullptr;
LiveIntervals *LIS = nullptr;
VirtRegMap *VRM = nullptr;
// UserTag changes whenever virtual registers have been modified.
unsigned UserTag = 0;
// The matrix is represented as a LiveIntervalUnion per register unit.
LiveIntervalUnion::Allocator LIUAlloc;
LiveIntervalUnion::Array Matrix;
// Cached queries per register unit.
std::unique_ptr<LiveIntervalUnion::Query[]> Queries;
// Cached register mask interference info.
unsigned RegMaskTag = 0;
unsigned RegMaskVirtReg = 0;
BitVector RegMaskUsable;
// MachineFunctionPass boilerplate.
void getAnalysisUsage(AnalysisUsage &) const override;
bool runOnMachineFunction(MachineFunction &) override;
void releaseMemory() override;
public:
static char ID;
LiveRegMatrix();
//===--------------------------------------------------------------------===//
// High-level interface.
//===--------------------------------------------------------------------===//
//
// Check for interference before assigning virtual registers to physical
// registers.
//
/// Invalidate cached interference queries after modifying virtual register
/// live ranges. Interference checks may return stale information unless
/// caches are invalidated.
void invalidateVirtRegs() { ++UserTag; }
enum InterferenceKind {
/// No interference, go ahead and assign.
IK_Free = 0,
/// Virtual register interference. There are interfering virtual registers
/// assigned to PhysReg or its aliases. This interference could be resolved
/// by unassigning those other virtual registers.
IK_VirtReg,
/// Register unit interference. A fixed live range is in the way, typically
/// argument registers for a call. This can't be resolved by unassigning
/// other virtual registers.
IK_RegUnit,
/// RegMask interference. The live range is crossing an instruction with a
/// regmask operand that doesn't preserve PhysReg. This typically means
/// VirtReg is live across a call, and PhysReg isn't call-preserved.
IK_RegMask
};
/// Check for interference before assigning VirtReg to PhysReg.
/// If this function returns IK_Free, it is legal to assign(VirtReg, PhysReg).
/// When there is more than one kind of interference, the InterferenceKind
/// with the highest enum value is returned.
InterferenceKind checkInterference(const LiveInterval &VirtReg,
MCRegister PhysReg);
/// Check for interference in the segment [Start, End) that may prevent
/// assignment to PhysReg. If this function returns true, there is
/// interference in the segment [Start, End) of some other interval already
/// assigned to PhysReg. If this function returns false, PhysReg is free at
/// the segment [Start, End).
bool checkInterference(SlotIndex Start, SlotIndex End, MCRegister PhysReg);
/// Assign VirtReg to PhysReg.
/// This will mark VirtReg's live range as occupied in the LiveRegMatrix and
/// update VirtRegMap. The live range is expected to be available in PhysReg.
void assign(const LiveInterval &VirtReg, MCRegister PhysReg);
/// Unassign VirtReg from its PhysReg.
/// Assuming that VirtReg was previously assigned to a PhysReg, this undoes
/// the assignment and updates VirtRegMap accordingly.
void unassign(const LiveInterval &VirtReg);
/// Returns true if the given \p PhysReg has any live intervals assigned.
bool isPhysRegUsed(MCRegister PhysReg) const;
//===--------------------------------------------------------------------===//
// Low-level interface.
//===--------------------------------------------------------------------===//
//
// Provide access to the underlying LiveIntervalUnions.
//
/// Check for regmask interference only.
/// Return true if VirtReg crosses a regmask operand that clobbers PhysReg.
/// If PhysReg is null, check if VirtReg crosses any regmask operands.
bool checkRegMaskInterference(const LiveInterval &VirtReg,
MCRegister PhysReg = MCRegister::NoRegister);
/// Check for regunit interference only.
/// Return true if VirtReg overlaps a fixed assignment of one of PhysRegs's
/// register units.
bool checkRegUnitInterference(const LiveInterval &VirtReg,
MCRegister PhysReg);
/// Query a line of the assigned virtual register matrix directly.
/// Use MCRegUnitIterator to enumerate all regunits in the desired PhysReg.
/// This returns a reference to an internal Query data structure that is only
/// valid until the next query() call.
LiveIntervalUnion::Query &query(const LiveRange &LR, MCRegister RegUnit);
/// Directly access the live interval unions per regunit.
/// This returns an array indexed by the regunit number.
LiveIntervalUnion *getLiveUnions() { return &Matrix[0]; }
Register getOneVReg(unsigned PhysReg) const;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_LIVEREGMATRIX_H
PK hwFZ�J:ݒ ݒ CodeGen/BasicTTIImpl.hnu �[��� //===- BasicTTIImpl.h -------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file
/// This file provides a helper that implements much of the TTI interface in
/// terms of the target-independent code generator and TargetLowering
/// interfaces.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_BASICTTIIMPL_H
#define LLVM_CODEGEN_BASICTTIIMPL_H
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Analysis/LoopInfo.h"
#include "llvm/Analysis/OptimizationRemarkEmitter.h"
#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/Analysis/TargetTransformInfoImpl.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/MachineValueType.h"
#include "llvm/CodeGen/TargetLowering.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/Constant.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/InstrTypes.h"
#include "llvm/IR/Instruction.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/Operator.h"
#include "llvm/IR/Type.h"
#include "llvm/IR/Value.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
#include <limits>
#include <optional>
#include <utility>
namespace llvm {
class Function;
class GlobalValue;
class LLVMContext;
class ScalarEvolution;
class SCEV;
class TargetMachine;
extern cl::opt<unsigned> PartialUnrollingThreshold;
/// Base class which can be used to help build a TTI implementation.
///
/// This class provides as much implementation of the TTI interface as is
/// possible using the target independent parts of the code generator.
///
/// In order to subclass it, your class must implement a getST() method to
/// return the subtarget, and a getTLI() method to return the target lowering.
/// We need these methods implemented in the derived class so that this class
/// doesn't have to duplicate storage for them.
template <typename T>
class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
private:
using BaseT = TargetTransformInfoImplCRTPBase<T>;
using TTI = TargetTransformInfo;
/// Helper function to access this as a T.
T *thisT() { return static_cast<T *>(this); }
/// Estimate a cost of Broadcast as an extract and sequence of insert
/// operations.
InstructionCost getBroadcastShuffleOverhead(FixedVectorType *VTy,
TTI::TargetCostKind CostKind) {
InstructionCost Cost = 0;
// Broadcast cost is equal to the cost of extracting the zero'th element
// plus the cost of inserting it into every element of the result vector.
Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
CostKind, 0, nullptr, nullptr);
for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
CostKind, i, nullptr, nullptr);
}
return Cost;
}
/// Estimate a cost of shuffle as a sequence of extract and insert
/// operations.
InstructionCost getPermuteShuffleOverhead(FixedVectorType *VTy,
TTI::TargetCostKind CostKind) {
InstructionCost Cost = 0;
// Shuffle cost is equal to the cost of extracting element from its argument
// plus the cost of inserting them onto the result vector.
// e.g. <4 x float> has a mask of <0,5,2,7> i.e we need to extract from
// index 0 of first vector, index 1 of second vector,index 2 of first
// vector and finally index 3 of second vector and insert them at index
// <0,1,2,3> of result vector.
for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
CostKind, i, nullptr, nullptr);
Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
CostKind, i, nullptr, nullptr);
}
return Cost;
}
/// Estimate a cost of subvector extraction as a sequence of extract and
/// insert operations.
InstructionCost getExtractSubvectorOverhead(VectorType *VTy,
TTI::TargetCostKind CostKind,
int Index,
FixedVectorType *SubVTy) {
assert(VTy && SubVTy &&
"Can only extract subvectors from vectors");
int NumSubElts = SubVTy->getNumElements();
assert((!isa<FixedVectorType>(VTy) ||
(Index + NumSubElts) <=
(int)cast<FixedVectorType>(VTy)->getNumElements()) &&
"SK_ExtractSubvector index out of range");
InstructionCost Cost = 0;
// Subvector extraction cost is equal to the cost of extracting element from
// the source type plus the cost of inserting them into the result vector
// type.
for (int i = 0; i != NumSubElts; ++i) {
Cost +=
thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
CostKind, i + Index, nullptr, nullptr);
Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, SubVTy,
CostKind, i, nullptr, nullptr);
}
return Cost;
}
/// Estimate a cost of subvector insertion as a sequence of extract and
/// insert operations.
InstructionCost getInsertSubvectorOverhead(VectorType *VTy,
TTI::TargetCostKind CostKind,
int Index,
FixedVectorType *SubVTy) {
assert(VTy && SubVTy &&
"Can only insert subvectors into vectors");
int NumSubElts = SubVTy->getNumElements();
assert((!isa<FixedVectorType>(VTy) ||
(Index + NumSubElts) <=
(int)cast<FixedVectorType>(VTy)->getNumElements()) &&
"SK_InsertSubvector index out of range");
InstructionCost Cost = 0;
// Subvector insertion cost is equal to the cost of extracting element from
// the source type plus the cost of inserting them into the result vector
// type.
for (int i = 0; i != NumSubElts; ++i) {
Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, SubVTy,
CostKind, i, nullptr, nullptr);
Cost +=
thisT()->getVectorInstrCost(Instruction::InsertElement, VTy, CostKind,
i + Index, nullptr, nullptr);
}
return Cost;
}
/// Local query method delegates up to T which *must* implement this!
const TargetSubtargetInfo *getST() const {
return static_cast<const T *>(this)->getST();
}
/// Local query method delegates up to T which *must* implement this!
const TargetLoweringBase *getTLI() const {
return static_cast<const T *>(this)->getTLI();
}
static ISD::MemIndexedMode getISDIndexedMode(TTI::MemIndexedMode M) {
switch (M) {
case TTI::MIM_Unindexed:
return ISD::UNINDEXED;
case TTI::MIM_PreInc:
return ISD::PRE_INC;
case TTI::MIM_PreDec:
return ISD::PRE_DEC;
case TTI::MIM_PostInc:
return ISD::POST_INC;
case TTI::MIM_PostDec:
return ISD::POST_DEC;
}
llvm_unreachable("Unexpected MemIndexedMode");
}
InstructionCost getCommonMaskedMemoryOpCost(unsigned Opcode, Type *DataTy,
Align Alignment,
bool VariableMask,
bool IsGatherScatter,
TTI::TargetCostKind CostKind) {
// We cannot scalarize scalable vectors, so return Invalid.
if (isa<ScalableVectorType>(DataTy))
return InstructionCost::getInvalid();
auto *VT = cast<FixedVectorType>(DataTy);
// Assume the target does not have support for gather/scatter operations
// and provide a rough estimate.
//
// First, compute the cost of the individual memory operations.
InstructionCost AddrExtractCost =
IsGatherScatter
? getVectorInstrCost(Instruction::ExtractElement,
FixedVectorType::get(
PointerType::get(VT->getElementType(), 0),
VT->getNumElements()),
CostKind, -1, nullptr, nullptr)
: 0;
InstructionCost LoadCost =
VT->getNumElements() *
(AddrExtractCost +
getMemoryOpCost(Opcode, VT->getElementType(), Alignment, 0, CostKind));
// Next, compute the cost of packing the result in a vector.
InstructionCost PackingCost =
getScalarizationOverhead(VT, Opcode != Instruction::Store,
Opcode == Instruction::Store, CostKind);
InstructionCost ConditionalCost = 0;
if (VariableMask) {
// Compute the cost of conditionally executing the memory operations with
// variable masks. This includes extracting the individual conditions, a
// branches and PHIs to combine the results.
// NOTE: Estimating the cost of conditionally executing the memory
// operations accurately is quite difficult and the current solution
// provides a very rough estimate only.
ConditionalCost =
VT->getNumElements() *
(getVectorInstrCost(
Instruction::ExtractElement,
FixedVectorType::get(Type::getInt1Ty(DataTy->getContext()),
VT->getNumElements()),
CostKind, -1, nullptr, nullptr) +
getCFInstrCost(Instruction::Br, CostKind) +
getCFInstrCost(Instruction::PHI, CostKind));
}
return LoadCost + PackingCost + ConditionalCost;
}
protected:
explicit BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
: BaseT(DL) {}
virtual ~BasicTTIImplBase() = default;
using TargetTransformInfoImplBase::DL;
public:
/// \name Scalar TTI Implementations
/// @{
bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth,
unsigned AddressSpace, Align Alignment,
unsigned *Fast) const {
EVT E = EVT::getIntegerVT(Context, BitWidth);
return getTLI()->allowsMisalignedMemoryAccesses(
E, AddressSpace, Alignment, MachineMemOperand::MONone, Fast);
}
bool hasBranchDivergence(const Function *F = nullptr) { return false; }
bool isSourceOfDivergence(const Value *V) { return false; }
bool isAlwaysUniform(const Value *V) { return false; }
bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const {
return false;
}
bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const {
return true;
}
unsigned getFlatAddressSpace() {
// Return an invalid address space.
return -1;
}
bool collectFlatAddressOperands(SmallVectorImpl<int> &OpIndexes,
Intrinsic::ID IID) const {
return false;
}
bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const {
return getTLI()->getTargetMachine().isNoopAddrSpaceCast(FromAS, ToAS);
}
unsigned getAssumedAddrSpace(const Value *V) const {
return getTLI()->getTargetMachine().getAssumedAddrSpace(V);
}
bool isSingleThreaded() const {
return getTLI()->getTargetMachine().Options.ThreadModel ==
ThreadModel::Single;
}
std::pair<const Value *, unsigned>
getPredicatedAddrSpace(const Value *V) const {
return getTLI()->getTargetMachine().getPredicatedAddrSpace(V);
}
Value *rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV,
Value *NewV) const {
return nullptr;
}
bool isLegalAddImmediate(int64_t imm) {
return getTLI()->isLegalAddImmediate(imm);
}
bool isLegalICmpImmediate(int64_t imm) {
return getTLI()->isLegalICmpImmediate(imm);
}
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
bool HasBaseReg, int64_t Scale,
unsigned AddrSpace, Instruction *I = nullptr) {
TargetLoweringBase::AddrMode AM;
AM.BaseGV = BaseGV;
AM.BaseOffs = BaseOffset;
AM.HasBaseReg = HasBaseReg;
AM.Scale = Scale;
return getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace, I);
}
unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy,
Type *ScalarValTy) const {
auto &&IsSupportedByTarget = [this, ScalarMemTy, ScalarValTy](unsigned VF) {
auto *SrcTy = FixedVectorType::get(ScalarMemTy, VF / 2);
EVT VT = getTLI()->getValueType(DL, SrcTy);
if (getTLI()->isOperationLegal(ISD::STORE, VT) ||
getTLI()->isOperationCustom(ISD::STORE, VT))
return true;
EVT ValVT =
getTLI()->getValueType(DL, FixedVectorType::get(ScalarValTy, VF / 2));
EVT LegalizedVT =
getTLI()->getTypeToTransformTo(ScalarMemTy->getContext(), VT);
return getTLI()->isTruncStoreLegal(LegalizedVT, ValVT);
};
while (VF > 2 && IsSupportedByTarget(VF))
VF /= 2;
return VF;
}
bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty,
const DataLayout &DL) const {
EVT VT = getTLI()->getValueType(DL, Ty);
return getTLI()->isIndexedLoadLegal(getISDIndexedMode(M), VT);
}
bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty,
const DataLayout &DL) const {
EVT VT = getTLI()->getValueType(DL, Ty);
return getTLI()->isIndexedStoreLegal(getISDIndexedMode(M), VT);
}
bool isLSRCostLess(TTI::LSRCost C1, TTI::LSRCost C2) {
return TargetTransformInfoImplBase::isLSRCostLess(C1, C2);
}
bool isNumRegsMajorCostOfLSR() {
return TargetTransformInfoImplBase::isNumRegsMajorCostOfLSR();
}
bool isProfitableLSRChainElement(Instruction *I) {
return TargetTransformInfoImplBase::isProfitableLSRChainElement(I);
}
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
int64_t BaseOffset, bool HasBaseReg,
int64_t Scale, unsigned AddrSpace) {
TargetLoweringBase::AddrMode AM;
AM.BaseGV = BaseGV;
AM.BaseOffs = BaseOffset;
AM.HasBaseReg = HasBaseReg;
AM.Scale = Scale;
if (getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace))
return 0;
return -1;
}
bool isTruncateFree(Type *Ty1, Type *Ty2) {
return getTLI()->isTruncateFree(Ty1, Ty2);
}
bool isProfitableToHoist(Instruction *I) {
return getTLI()->isProfitableToHoist(I);
}
bool useAA() const { return getST()->useAA(); }
bool isTypeLegal(Type *Ty) {
EVT VT = getTLI()->getValueType(DL, Ty);
return getTLI()->isTypeLegal(VT);
}
unsigned getRegUsageForType(Type *Ty) {
EVT ETy = getTLI()->getValueType(DL, Ty);
return getTLI()->getNumRegisters(Ty->getContext(), ETy);
}
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr,
ArrayRef<const Value *> Operands, Type *AccessType,
TTI::TargetCostKind CostKind) {
return BaseT::getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
}
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
unsigned &JumpTableSize,
ProfileSummaryInfo *PSI,
BlockFrequencyInfo *BFI) {
/// Try to find the estimated number of clusters. Note that the number of
/// clusters identified in this function could be different from the actual
/// numbers found in lowering. This function ignore switches that are
/// lowered with a mix of jump table / bit test / BTree. This function was
/// initially intended to be used when estimating the cost of switch in
/// inline cost heuristic, but it's a generic cost model to be used in other
/// places (e.g., in loop unrolling).
unsigned N = SI.getNumCases();
const TargetLoweringBase *TLI = getTLI();
const DataLayout &DL = this->getDataLayout();
JumpTableSize = 0;
bool IsJTAllowed = TLI->areJTsAllowed(SI.getParent()->getParent());
// Early exit if both a jump table and bit test are not allowed.
if (N < 1 || (!IsJTAllowed && DL.getIndexSizeInBits(0u) < N))
return N;
APInt MaxCaseVal = SI.case_begin()->getCaseValue()->getValue();
APInt MinCaseVal = MaxCaseVal;
for (auto CI : SI.cases()) {
const APInt &CaseVal = CI.getCaseValue()->getValue();
if (CaseVal.sgt(MaxCaseVal))
MaxCaseVal = CaseVal;
if (CaseVal.slt(MinCaseVal))
MinCaseVal = CaseVal;
}
// Check if suitable for a bit test
if (N <= DL.getIndexSizeInBits(0u)) {
SmallPtrSet<const BasicBlock *, 4> Dests;
for (auto I : SI.cases())
Dests.insert(I.getCaseSuccessor());
if (TLI->isSuitableForBitTests(Dests.size(), N, MinCaseVal, MaxCaseVal,
DL))
return 1;
}
// Check if suitable for a jump table.
if (IsJTAllowed) {
if (N < 2 || N < TLI->getMinimumJumpTableEntries())
return N;
uint64_t Range =
(MaxCaseVal - MinCaseVal)
.getLimitedValue(std::numeric_limits<uint64_t>::max() - 1) + 1;
// Check whether a range of clusters is dense enough for a jump table
if (TLI->isSuitableForJumpTable(&SI, N, Range, PSI, BFI)) {
JumpTableSize = Range;
return 1;
}
}
return N;
}
bool shouldBuildLookupTables() {
const TargetLoweringBase *TLI = getTLI();
return TLI->isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
TLI->isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
}
bool shouldBuildRelLookupTables() const {
const TargetMachine &TM = getTLI()->getTargetMachine();
// If non-PIC mode, do not generate a relative lookup table.
if (!TM.isPositionIndependent())
return false;
/// Relative lookup table entries consist of 32-bit offsets.
/// Do not generate relative lookup tables for large code models
/// in 64-bit achitectures where 32-bit offsets might not be enough.
if (TM.getCodeModel() == CodeModel::Medium ||
TM.getCodeModel() == CodeModel::Large)
return false;
Triple TargetTriple = TM.getTargetTriple();
if (!TargetTriple.isArch64Bit())
return false;
// TODO: Triggers issues on aarch64 on darwin, so temporarily disable it
// there.
if (TargetTriple.getArch() == Triple::aarch64 && TargetTriple.isOSDarwin())
return false;
return true;
}
bool haveFastSqrt(Type *Ty) {
const TargetLoweringBase *TLI = getTLI();
EVT VT = TLI->getValueType(DL, Ty);
return TLI->isTypeLegal(VT) &&
TLI->isOperationLegalOrCustom(ISD::FSQRT, VT);
}
bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) {
return true;
}
InstructionCost getFPOpCost(Type *Ty) {
// Check whether FADD is available, as a proxy for floating-point in
// general.
const TargetLoweringBase *TLI = getTLI();
EVT VT = TLI->getValueType(DL, Ty);
if (TLI->isOperationLegalOrCustomOrPromote(ISD::FADD, VT))
return TargetTransformInfo::TCC_Basic;
return TargetTransformInfo::TCC_Expensive;
}
unsigned getInliningThresholdMultiplier() const { return 1; }
unsigned adjustInliningThreshold(const CallBase *CB) { return 0; }
unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const {
return 0;
}
int getInlinerVectorBonusPercent() const { return 150; }
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
TTI::UnrollingPreferences &UP,
OptimizationRemarkEmitter *ORE) {
// This unrolling functionality is target independent, but to provide some
// motivation for its intended use, for x86:
// According to the Intel 64 and IA-32 Architectures Optimization Reference
// Manual, Intel Core models and later have a loop stream detector (and
// associated uop queue) that can benefit from partial unrolling.
// The relevant requirements are:
// - The loop must have no more than 4 (8 for Nehalem and later) branches
// taken, and none of them may be calls.
// - The loop can have no more than 18 (28 for Nehalem and later) uops.
// According to the Software Optimization Guide for AMD Family 15h
// Processors, models 30h-4fh (Steamroller and later) have a loop predictor
// and loop buffer which can benefit from partial unrolling.
// The relevant requirements are:
// - The loop must have fewer than 16 branches
// - The loop must have less than 40 uops in all executed loop branches
// The number of taken branches in a loop is hard to estimate here, and
// benchmarking has revealed that it is better not to be conservative when
// estimating the branch count. As a result, we'll ignore the branch limits
// until someone finds a case where it matters in practice.
unsigned MaxOps;
const TargetSubtargetInfo *ST = getST();
if (PartialUnrollingThreshold.getNumOccurrences() > 0)
MaxOps = PartialUnrollingThreshold;
else if (ST->getSchedModel().LoopMicroOpBufferSize > 0)
MaxOps = ST->getSchedModel().LoopMicroOpBufferSize;
else
return;
// Scan the loop: don't unroll loops with calls.
for (BasicBlock *BB : L->blocks()) {
for (Instruction &I : *BB) {
if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
if (const Function *F = cast<CallBase>(I).getCalledFunction()) {
if (!thisT()->isLoweredToCall(F))
continue;
}
if (ORE) {
ORE->emit([&]() {
return OptimizationRemark("TTI", "DontUnroll", L->getStartLoc(),
L->getHeader())
<< "advising against unrolling the loop because it "
"contains a "
<< ore::NV("Call", &I);
});
}
return;
}
}
}
// Enable runtime and partial unrolling up to the specified size.
// Enable using trip count upper bound to unroll loops.
UP.Partial = UP.Runtime = UP.UpperBound = true;
UP.PartialThreshold = MaxOps;
// Avoid unrolling when optimizing for size.
UP.OptSizeThreshold = 0;
UP.PartialOptSizeThreshold = 0;
// Set number of instructions optimized when "back edge"
// becomes "fall through" to default value of 2.
UP.BEInsns = 2;
}
void getPeelingPreferences(Loop *L, ScalarEvolution &SE,
TTI::PeelingPreferences &PP) {
PP.PeelCount = 0;
PP.AllowPeeling = true;
PP.AllowLoopNestsPeeling = false;
PP.PeelProfiledIterations = true;
}
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE,
AssumptionCache &AC,
TargetLibraryInfo *LibInfo,
HardwareLoopInfo &HWLoopInfo) {
return BaseT::isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
}
bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) {
return BaseT::preferPredicateOverEpilogue(TFI);
}
TailFoldingStyle
getPreferredTailFoldingStyle(bool IVUpdateMayOverflow = true) {
return BaseT::getPreferredTailFoldingStyle(IVUpdateMayOverflow);
}
std::optional<Instruction *> instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) {
return BaseT::instCombineIntrinsic(IC, II);
}
std::optional<Value *>
simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II,
APInt DemandedMask, KnownBits &Known,
bool &KnownBitsComputed) {
return BaseT::simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
KnownBitsComputed);
}
std::optional<Value *> simplifyDemandedVectorEltsIntrinsic(
InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
APInt &UndefElts2, APInt &UndefElts3,
std::function<void(Instruction *, unsigned, APInt, APInt &)>
SimplifyAndSetOp) {
return BaseT::simplifyDemandedVectorEltsIntrinsic(
IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
SimplifyAndSetOp);
}
virtual std::optional<unsigned>
getCacheSize(TargetTransformInfo::CacheLevel Level) const {
return std::optional<unsigned>(
getST()->getCacheSize(static_cast<unsigned>(Level)));
}
virtual std::optional<unsigned>
getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const {
std::optional<unsigned> TargetResult =
getST()->getCacheAssociativity(static_cast<unsigned>(Level));
if (TargetResult)
return TargetResult;
return BaseT::getCacheAssociativity(Level);
}
virtual unsigned getCacheLineSize() const {
return getST()->getCacheLineSize();
}
virtual unsigned getPrefetchDistance() const {
return getST()->getPrefetchDistance();
}
virtual unsigned getMinPrefetchStride(unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
unsigned NumPrefetches,
bool HasCall) const {
return getST()->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
NumPrefetches, HasCall);
}
virtual unsigned getMaxPrefetchIterationsAhead() const {
return getST()->getMaxPrefetchIterationsAhead();
}
virtual bool enableWritePrefetching() const {
return getST()->enableWritePrefetching();
}
virtual bool shouldPrefetchAddressSpace(unsigned AS) const {
return getST()->shouldPrefetchAddressSpace(AS);
}
/// @}
/// \name Vector TTI Implementations
/// @{
TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const {
return TypeSize::getFixed(32);
}
std::optional<unsigned> getMaxVScale() const { return std::nullopt; }
std::optional<unsigned> getVScaleForTuning() const { return std::nullopt; }
bool isVScaleKnownToBeAPowerOfTwo() const { return false; }
/// Estimate the overhead of scalarizing an instruction. Insert and Extract
/// are set if the demanded result elements need to be inserted and/or
/// extracted from vectors.
InstructionCost getScalarizationOverhead(VectorType *InTy,
const APInt &DemandedElts,
bool Insert, bool Extract,
TTI::TargetCostKind CostKind) {
/// FIXME: a bitfield is not a reasonable abstraction for talking about
/// which elements are needed from a scalable vector
if (isa<ScalableVectorType>(InTy))
return InstructionCost::getInvalid();
auto *Ty = cast<FixedVectorType>(InTy);
assert(DemandedElts.getBitWidth() == Ty->getNumElements() &&
"Vector size mismatch");
InstructionCost Cost = 0;
for (int i = 0, e = Ty->getNumElements(); i < e; ++i) {
if (!DemandedElts[i])
continue;
if (Insert)
Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, Ty,
CostKind, i, nullptr, nullptr);
if (Extract)
Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
CostKind, i, nullptr, nullptr);
}
return Cost;
}
/// Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
InstructionCost getScalarizationOverhead(VectorType *InTy, bool Insert,
bool Extract,
TTI::TargetCostKind CostKind) {
if (isa<ScalableVectorType>(InTy))
return InstructionCost::getInvalid();
auto *Ty = cast<FixedVectorType>(InTy);
APInt DemandedElts = APInt::getAllOnes(Ty->getNumElements());
return thisT()->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
CostKind);
}
/// Estimate the overhead of scalarizing an instructions unique
/// non-constant operands. The (potentially vector) types to use for each of
/// argument are passes via Tys.
InstructionCost
getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
ArrayRef<Type *> Tys,
TTI::TargetCostKind CostKind) {
assert(Args.size() == Tys.size() && "Expected matching Args and Tys");
InstructionCost Cost = 0;
SmallPtrSet<const Value*, 4> UniqueOperands;
for (int I = 0, E = Args.size(); I != E; I++) {
// Disregard things like metadata arguments.
const Value *A = Args[I];
Type *Ty = Tys[I];
if (!Ty->isIntOrIntVectorTy() && !Ty->isFPOrFPVectorTy() &&
!Ty->isPtrOrPtrVectorTy())
continue;
if (!isa<Constant>(A) && UniqueOperands.insert(A).second) {
if (auto *VecTy = dyn_cast<VectorType>(Ty))
Cost += getScalarizationOverhead(VecTy, /*Insert*/ false,
/*Extract*/ true, CostKind);
}
}
return Cost;
}
/// Estimate the overhead of scalarizing the inputs and outputs of an
/// instruction, with return type RetTy and arguments Args of type Tys. If
/// Args are unknown (empty), then the cost associated with one argument is
/// added as a heuristic.
InstructionCost getScalarizationOverhead(VectorType *RetTy,
ArrayRef<const Value *> Args,
ArrayRef<Type *> Tys,
TTI::TargetCostKind CostKind) {
InstructionCost Cost = getScalarizationOverhead(
RetTy, /*Insert*/ true, /*Extract*/ false, CostKind);
if (!Args.empty())
Cost += getOperandsScalarizationOverhead(Args, Tys, CostKind);
else
// When no information on arguments is provided, we add the cost
// associated with one argument as a heuristic.
Cost += getScalarizationOverhead(RetTy, /*Insert*/ false,
/*Extract*/ true, CostKind);
return Cost;
}
/// Estimate the cost of type-legalization and the legalized type.
std::pair<InstructionCost, MVT> getTypeLegalizationCost(Type *Ty) const {
LLVMContext &C = Ty->getContext();
EVT MTy = getTLI()->getValueType(DL, Ty);
InstructionCost Cost = 1;
// We keep legalizing the type until we find a legal kind. We assume that
// the only operation that costs anything is the split. After splitting
// we need to handle two types.
while (true) {
TargetLoweringBase::LegalizeKind LK = getTLI()->getTypeConversion(C, MTy);
if (LK.first == TargetLoweringBase::TypeScalarizeScalableVector) {
// Ensure we return a sensible simple VT here, since many callers of
// this function require it.
MVT VT = MTy.isSimple() ? MTy.getSimpleVT() : MVT::i64;
return std::make_pair(InstructionCost::getInvalid(), VT);
}
if (LK.first == TargetLoweringBase::TypeLegal)
return std::make_pair(Cost, MTy.getSimpleVT());
if (LK.first == TargetLoweringBase::TypeSplitVector ||
LK.first == TargetLoweringBase::TypeExpandInteger)
Cost *= 2;
// Do not loop with f128 type.
if (MTy == LK.second)
return std::make_pair(Cost, MTy.getSimpleVT());
// Keep legalizing the type.
MTy = LK.second;
}
}
unsigned getMaxInterleaveFactor(ElementCount VF) { return 1; }
InstructionCost getArithmeticInstrCost(
unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
TTI::OperandValueInfo Opd1Info = {TTI::OK_AnyValue, TTI::OP_None},
TTI::OperandValueInfo Opd2Info = {TTI::OK_AnyValue, TTI::OP_None},
ArrayRef<const Value *> Args = ArrayRef<const Value *>(),
const Instruction *CxtI = nullptr) {
// Check if any of the operands are vector operands.
const TargetLoweringBase *TLI = getTLI();
int ISD = TLI->InstructionOpcodeToISD(Opcode);
assert(ISD && "Invalid opcode");
// TODO: Handle more cost kinds.
if (CostKind != TTI::TCK_RecipThroughput)
return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind,
Opd1Info, Opd2Info,
Args, CxtI);
std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Ty);
bool IsFloat = Ty->isFPOrFPVectorTy();
// Assume that floating point arithmetic operations cost twice as much as
// integer operations.
InstructionCost OpCost = (IsFloat ? 2 : 1);
if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
// The operation is legal. Assume it costs 1.
// TODO: Once we have extract/insert subvector cost we need to use them.
return LT.first * OpCost;
}
if (!TLI->isOperationExpand(ISD, LT.second)) {
// If the operation is custom lowered, then assume that the code is twice
// as expensive.
return LT.first * 2 * OpCost;
}
// An 'Expand' of URem and SRem is special because it may default
// to expanding the operation into a sequence of sub-operations
// i.e. X % Y -> X-(X/Y)*Y.
if (ISD == ISD::UREM || ISD == ISD::SREM) {
bool IsSigned = ISD == ISD::SREM;
if (TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIVREM : ISD::UDIVREM,
LT.second) ||
TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIV : ISD::UDIV,
LT.second)) {
unsigned DivOpc = IsSigned ? Instruction::SDiv : Instruction::UDiv;
InstructionCost DivCost = thisT()->getArithmeticInstrCost(
DivOpc, Ty, CostKind, Opd1Info, Opd2Info);
InstructionCost MulCost =
thisT()->getArithmeticInstrCost(Instruction::Mul, Ty, CostKind);
InstructionCost SubCost =
thisT()->getArithmeticInstrCost(Instruction::Sub, Ty, CostKind);
return DivCost + MulCost + SubCost;
}
}
// We cannot scalarize scalable vectors, so return Invalid.
if (isa<ScalableVectorType>(Ty))
return InstructionCost::getInvalid();
// Else, assume that we need to scalarize this op.
// TODO: If one of the types get legalized by splitting, handle this
// similarly to what getCastInstrCost() does.
if (auto *VTy = dyn_cast<FixedVectorType>(Ty)) {
InstructionCost Cost = thisT()->getArithmeticInstrCost(
Opcode, VTy->getScalarType(), CostKind, Opd1Info, Opd2Info,
Args, CxtI);
// Return the cost of multiple scalar invocation plus the cost of
// inserting and extracting the values.
SmallVector<Type *> Tys(Args.size(), Ty);
return getScalarizationOverhead(VTy, Args, Tys, CostKind) +
VTy->getNumElements() * Cost;
}
// We don't know anything about this scalar instruction.
return OpCost;
}
TTI::ShuffleKind improveShuffleKindFromMask(TTI::ShuffleKind Kind,
ArrayRef<int> Mask) const {
int Limit = Mask.size() * 2;
if (Mask.empty() ||
// Extra check required by isSingleSourceMaskImpl function (called by
// ShuffleVectorInst::isSingleSourceMask).
any_of(Mask, [Limit](int I) { return I >= Limit; }))
return Kind;
int Index;
switch (Kind) {
case TTI::SK_PermuteSingleSrc:
if (ShuffleVectorInst::isReverseMask(Mask))
return TTI::SK_Reverse;
if (ShuffleVectorInst::isZeroEltSplatMask(Mask))
return TTI::SK_Broadcast;
break;
case TTI::SK_PermuteTwoSrc:
if (ShuffleVectorInst::isSelectMask(Mask))
return TTI::SK_Select;
if (ShuffleVectorInst::isTransposeMask(Mask))
return TTI::SK_Transpose;
if (ShuffleVectorInst::isSpliceMask(Mask, Index))
return TTI::SK_Splice;
break;
case TTI::SK_Select:
case TTI::SK_Reverse:
case TTI::SK_Broadcast:
case TTI::SK_Transpose:
case TTI::SK_InsertSubvector:
case TTI::SK_ExtractSubvector:
case TTI::SK_Splice:
break;
}
return Kind;
}
InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *Tp,
ArrayRef<int> Mask,
TTI::TargetCostKind CostKind, int Index,
VectorType *SubTp,
ArrayRef<const Value *> Args = std::nullopt) {
switch (improveShuffleKindFromMask(Kind, Mask)) {
case TTI::SK_Broadcast:
if (auto *FVT = dyn_cast<FixedVectorType>(Tp))
return getBroadcastShuffleOverhead(FVT, CostKind);
return InstructionCost::getInvalid();
case TTI::SK_Select:
case TTI::SK_Splice:
case TTI::SK_Reverse:
case TTI::SK_Transpose:
case TTI::SK_PermuteSingleSrc:
case TTI::SK_PermuteTwoSrc:
if (auto *FVT = dyn_cast<FixedVectorType>(Tp))
return getPermuteShuffleOverhead(FVT, CostKind);
return InstructionCost::getInvalid();
case TTI::SK_ExtractSubvector:
return getExtractSubvectorOverhead(Tp, CostKind, Index,
cast<FixedVectorType>(SubTp));
case TTI::SK_InsertSubvector:
return getInsertSubvectorOverhead(Tp, CostKind, Index,
cast<FixedVectorType>(SubTp));
}
llvm_unreachable("Unknown TTI::ShuffleKind");
}
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
TTI::CastContextHint CCH,
TTI::TargetCostKind CostKind,
const Instruction *I = nullptr) {
if (BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I) == 0)
return 0;
const TargetLoweringBase *TLI = getTLI();
int ISD = TLI->InstructionOpcodeToISD(Opcode);
assert(ISD && "Invalid opcode");
std::pair<InstructionCost, MVT> SrcLT = getTypeLegalizationCost(Src);
std::pair<InstructionCost, MVT> DstLT = getTypeLegalizationCost(Dst);
TypeSize SrcSize = SrcLT.second.getSizeInBits();
TypeSize DstSize = DstLT.second.getSizeInBits();
bool IntOrPtrSrc = Src->isIntegerTy() || Src->isPointerTy();
bool IntOrPtrDst = Dst->isIntegerTy() || Dst->isPointerTy();
switch (Opcode) {
default:
break;
case Instruction::Trunc:
// Check for NOOP conversions.
if (TLI->isTruncateFree(SrcLT.second, DstLT.second))
return 0;
[[fallthrough]];
case Instruction::BitCast:
// Bitcast between types that are legalized to the same type are free and
// assume int to/from ptr of the same size is also free.
if (SrcLT.first == DstLT.first && IntOrPtrSrc == IntOrPtrDst &&
SrcSize == DstSize)
return 0;
break;
case Instruction::FPExt:
if (I && getTLI()->isExtFree(I))
return 0;
break;
case Instruction::ZExt:
if (TLI->isZExtFree(SrcLT.second, DstLT.second))
return 0;
[[fallthrough]];
case Instruction::SExt:
if (I && getTLI()->isExtFree(I))
return 0;
// If this is a zext/sext of a load, return 0 if the corresponding
// extending load exists on target and the result type is legal.
if (CCH == TTI::CastContextHint::Normal) {
EVT ExtVT = EVT::getEVT(Dst);
EVT LoadVT = EVT::getEVT(Src);
unsigned LType =
((Opcode == Instruction::ZExt) ? ISD::ZEXTLOAD : ISD::SEXTLOAD);
if (DstLT.first == SrcLT.first &&
TLI->isLoadExtLegal(LType, ExtVT, LoadVT))
return 0;
}
break;
case Instruction::AddrSpaceCast:
if (TLI->isFreeAddrSpaceCast(Src->getPointerAddressSpace(),
Dst->getPointerAddressSpace()))
return 0;
break;
}
auto *SrcVTy = dyn_cast<VectorType>(Src);
auto *DstVTy = dyn_cast<VectorType>(Dst);
// If the cast is marked as legal (or promote) then assume low cost.
if (SrcLT.first == DstLT.first &&
TLI->isOperationLegalOrPromote(ISD, DstLT.second))
return SrcLT.first;
// Handle scalar conversions.
if (!SrcVTy && !DstVTy) {
// Just check the op cost. If the operation is legal then assume it costs
// 1.
if (!TLI->isOperationExpand(ISD, DstLT.second))
return 1;
// Assume that illegal scalar instruction are expensive.
return 4;
}
// Check vector-to-vector casts.
if (DstVTy && SrcVTy) {
// If the cast is between same-sized registers, then the check is simple.
if (SrcLT.first == DstLT.first && SrcSize == DstSize) {
// Assume that Zext is done using AND.
if (Opcode == Instruction::ZExt)
return SrcLT.first;
// Assume that sext is done using SHL and SRA.
if (Opcode == Instruction::SExt)
return SrcLT.first * 2;
// Just check the op cost. If the operation is legal then assume it
// costs
// 1 and multiply by the type-legalization overhead.
if (!TLI->isOperationExpand(ISD, DstLT.second))
return SrcLT.first * 1;
}
// If we are legalizing by splitting, query the concrete TTI for the cost
// of casting the original vector twice. We also need to factor in the
// cost of the split itself. Count that as 1, to be consistent with
// getTypeLegalizationCost().
bool SplitSrc =
TLI->getTypeAction(Src->getContext(), TLI->getValueType(DL, Src)) ==
TargetLowering::TypeSplitVector;
bool SplitDst =
TLI->getTypeAction(Dst->getContext(), TLI->getValueType(DL, Dst)) ==
TargetLowering::TypeSplitVector;
if ((SplitSrc || SplitDst) && SrcVTy->getElementCount().isVector() &&
DstVTy->getElementCount().isVector()) {
Type *SplitDstTy = VectorType::getHalfElementsVectorType(DstVTy);
Type *SplitSrcTy = VectorType::getHalfElementsVectorType(SrcVTy);
T *TTI = static_cast<T *>(this);
// If both types need to be split then the split is free.
InstructionCost SplitCost =
(!SplitSrc || !SplitDst) ? TTI->getVectorSplitCost() : 0;
return SplitCost +
(2 * TTI->getCastInstrCost(Opcode, SplitDstTy, SplitSrcTy, CCH,
CostKind, I));
}
// Scalarization cost is Invalid, can't assume any num elements.
if (isa<ScalableVectorType>(DstVTy))
return InstructionCost::getInvalid();
// In other cases where the source or destination are illegal, assume
// the operation will get scalarized.
unsigned Num = cast<FixedVectorType>(DstVTy)->getNumElements();
InstructionCost Cost = thisT()->getCastInstrCost(
Opcode, Dst->getScalarType(), Src->getScalarType(), CCH, CostKind, I);
// Return the cost of multiple scalar invocation plus the cost of
// inserting and extracting the values.
return getScalarizationOverhead(DstVTy, /*Insert*/ true, /*Extract*/ true,
CostKind) +
Num * Cost;
}
// We already handled vector-to-vector and scalar-to-scalar conversions.
// This
// is where we handle bitcast between vectors and scalars. We need to assume
// that the conversion is scalarized in one way or another.
if (Opcode == Instruction::BitCast) {
// Illegal bitcasts are done by storing and loading from a stack slot.
return (SrcVTy ? getScalarizationOverhead(SrcVTy, /*Insert*/ false,
/*Extract*/ true, CostKind)
: 0) +
(DstVTy ? getScalarizationOverhead(DstVTy, /*Insert*/ true,
/*Extract*/ false, CostKind)
: 0);
}
llvm_unreachable("Unhandled cast");
}
InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst,
VectorType *VecTy, unsigned Index) {
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput;
return thisT()->getVectorInstrCost(Instruction::ExtractElement, VecTy,
CostKind, Index, nullptr, nullptr) +
thisT()->getCastInstrCost(Opcode, Dst, VecTy->getElementType(),
TTI::CastContextHint::None, CostKind);
}
InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind,
const Instruction *I = nullptr) {
return BaseT::getCFInstrCost(Opcode, CostKind, I);
}
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
CmpInst::Predicate VecPred,
TTI::TargetCostKind CostKind,
const Instruction *I = nullptr) {
const TargetLoweringBase *TLI = getTLI();
int ISD = TLI->InstructionOpcodeToISD(Opcode);
assert(ISD && "Invalid opcode");
// TODO: Handle other cost kinds.
if (CostKind != TTI::TCK_RecipThroughput)
return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind,
I);
// Selects on vectors are actually vector selects.
if (ISD == ISD::SELECT) {
assert(CondTy && "CondTy must exist");
if (CondTy->isVectorTy())
ISD = ISD::VSELECT;
}
std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(ValTy);
if (!(ValTy->isVectorTy() && !LT.second.isVector()) &&
!TLI->isOperationExpand(ISD, LT.second)) {
// The operation is legal. Assume it costs 1. Multiply
// by the type-legalization overhead.
return LT.first * 1;
}
// Otherwise, assume that the cast is scalarized.
// TODO: If one of the types get legalized by splitting, handle this
// similarly to what getCastInstrCost() does.
if (auto *ValVTy = dyn_cast<VectorType>(ValTy)) {
if (isa<ScalableVectorType>(ValTy))
return InstructionCost::getInvalid();
unsigned Num = cast<FixedVectorType>(ValVTy)->getNumElements();
if (CondTy)
CondTy = CondTy->getScalarType();
InstructionCost Cost = thisT()->getCmpSelInstrCost(
Opcode, ValVTy->getScalarType(), CondTy, VecPred, CostKind, I);
// Return the cost of multiple scalar invocation plus the cost of
// inserting and extracting the values.
return getScalarizationOverhead(ValVTy, /*Insert*/ true,
/*Extract*/ false, CostKind) +
Num * Cost;
}
// Unknown scalar opcode.
return 1;
}
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0, Value *Op1) {
return getRegUsageForType(Val->getScalarType());
}
InstructionCost getVectorInstrCost(const Instruction &I, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index) {
Value *Op0 = nullptr;
Value *Op1 = nullptr;
if (auto *IE = dyn_cast<InsertElementInst>(&I)) {
Op0 = IE->getOperand(0);
Op1 = IE->getOperand(1);
}
return thisT()->getVectorInstrCost(I.getOpcode(), Val, CostKind, Index, Op0,
Op1);
}
InstructionCost getReplicationShuffleCost(Type *EltTy, int ReplicationFactor,
int VF,
const APInt &DemandedDstElts,
TTI::TargetCostKind CostKind) {
assert(DemandedDstElts.getBitWidth() == (unsigned)VF * ReplicationFactor &&
"Unexpected size of DemandedDstElts.");
InstructionCost Cost;
auto *SrcVT = FixedVectorType::get(EltTy, VF);
auto *ReplicatedVT = FixedVectorType::get(EltTy, VF * ReplicationFactor);
// The Mask shuffling cost is extract all the elements of the Mask
// and insert each of them Factor times into the wide vector:
//
// E.g. an interleaved group with factor 3:
// %mask = icmp ult <8 x i32> %vec1, %vec2
// %interleaved.mask = shufflevector <8 x i1> %mask, <8 x i1> undef,
// <24 x i32> <0,0,0,1,1,1,2,2,2,3,3,3,4,4,4,5,5,5,6,6,6,7,7,7>
// The cost is estimated as extract all mask elements from the <8xi1> mask
// vector and insert them factor times into the <24xi1> shuffled mask
// vector.
APInt DemandedSrcElts = APIntOps::ScaleBitMask(DemandedDstElts, VF);
Cost += thisT()->getScalarizationOverhead(SrcVT, DemandedSrcElts,
/*Insert*/ false,
/*Extract*/ true, CostKind);
Cost += thisT()->getScalarizationOverhead(ReplicatedVT, DemandedDstElts,
/*Insert*/ true,
/*Extract*/ false, CostKind);
return Cost;
}
InstructionCost
getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment,
unsigned AddressSpace, TTI::TargetCostKind CostKind,
TTI::OperandValueInfo OpInfo = {TTI::OK_AnyValue, TTI::OP_None},
const Instruction *I = nullptr) {
assert(!Src->isVoidTy() && "Invalid type");
// Assume types, such as structs, are expensive.
if (getTLI()->getValueType(DL, Src, true) == MVT::Other)
return 4;
std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Src);
// Assuming that all loads of legal types cost 1.
InstructionCost Cost = LT.first;
if (CostKind != TTI::TCK_RecipThroughput)
return Cost;
const DataLayout &DL = this->getDataLayout();
if (Src->isVectorTy() &&
// In practice it's not currently possible to have a change in lane
// length for extending loads or truncating stores so both types should
// have the same scalable property.
TypeSize::isKnownLT(DL.getTypeStoreSizeInBits(Src),
LT.second.getSizeInBits())) {
// This is a vector load that legalizes to a larger type than the vector
// itself. Unless the corresponding extending load or truncating store is
// legal, then this will scalarize.
TargetLowering::LegalizeAction LA = TargetLowering::Expand;
EVT MemVT = getTLI()->getValueType(DL, Src);
if (Opcode == Instruction::Store)
LA = getTLI()->getTruncStoreAction(LT.second, MemVT);
else
LA = getTLI()->getLoadExtAction(ISD::EXTLOAD, LT.second, MemVT);
if (LA != TargetLowering::Legal && LA != TargetLowering::Custom) {
// This is a vector load/store for some illegal type that is scalarized.
// We must account for the cost of building or decomposing the vector.
Cost += getScalarizationOverhead(
cast<VectorType>(Src), Opcode != Instruction::Store,
Opcode == Instruction::Store, CostKind);
}
}
return Cost;
}
InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *DataTy,
Align Alignment, unsigned AddressSpace,
TTI::TargetCostKind CostKind) {
return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment, true, false,
CostKind);
}
InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
const Value *Ptr, bool VariableMask,
Align Alignment,
TTI::TargetCostKind CostKind,
const Instruction *I = nullptr) {
return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment, VariableMask,
true, CostKind);
}
InstructionCost getInterleavedMemoryOpCost(
unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
bool UseMaskForCond = false, bool UseMaskForGaps = false) {
// We cannot scalarize scalable vectors, so return Invalid.
if (isa<ScalableVectorType>(VecTy))
return InstructionCost::getInvalid();
auto *VT = cast<FixedVectorType>(VecTy);
unsigned NumElts = VT->getNumElements();
assert(Factor > 1 && NumElts % Factor == 0 && "Invalid interleave factor");
unsigned NumSubElts = NumElts / Factor;
auto *SubVT = FixedVectorType::get(VT->getElementType(), NumSubElts);
// Firstly, the cost of load/store operation.
InstructionCost Cost;
if (UseMaskForCond || UseMaskForGaps)
Cost = thisT()->getMaskedMemoryOpCost(Opcode, VecTy, Alignment,
AddressSpace, CostKind);
else
Cost = thisT()->getMemoryOpCost(Opcode, VecTy, Alignment, AddressSpace,
CostKind);
// Legalize the vector type, and get the legalized and unlegalized type
// sizes.
MVT VecTyLT = getTypeLegalizationCost(VecTy).second;
unsigned VecTySize = thisT()->getDataLayout().getTypeStoreSize(VecTy);
unsigned VecTyLTSize = VecTyLT.getStoreSize();
// Scale the cost of the memory operation by the fraction of legalized
// instructions that will actually be used. We shouldn't account for the
// cost of dead instructions since they will be removed.
//
// E.g., An interleaved load of factor 8:
// %vec = load <16 x i64>, <16 x i64>* %ptr
// %v0 = shufflevector %vec, undef, <0, 8>
//
// If <16 x i64> is legalized to 8 v2i64 loads, only 2 of the loads will be
// used (those corresponding to elements [0:1] and [8:9] of the unlegalized
// type). The other loads are unused.
//
// TODO: Note that legalization can turn masked loads/stores into unmasked
// (legalized) loads/stores. This can be reflected in the cost.
if (Cost.isValid() && VecTySize > VecTyLTSize) {
// The number of loads of a legal type it will take to represent a load
// of the unlegalized vector type.
unsigned NumLegalInsts = divideCeil(VecTySize, VecTyLTSize);
// The number of elements of the unlegalized type that correspond to a
// single legal instruction.
unsigned NumEltsPerLegalInst = divideCeil(NumElts, NumLegalInsts);
// Determine which legal instructions will be used.
BitVector UsedInsts(NumLegalInsts, false);
for (unsigned Index : Indices)
for (unsigned Elt = 0; Elt < NumSubElts; ++Elt)
UsedInsts.set((Index + Elt * Factor) / NumEltsPerLegalInst);
// Scale the cost of the load by the fraction of legal instructions that
// will be used.
Cost = divideCeil(UsedInsts.count() * *Cost.getValue(), NumLegalInsts);
}
// Then plus the cost of interleave operation.
assert(Indices.size() <= Factor &&
"Interleaved memory op has too many members");
const APInt DemandedAllSubElts = APInt::getAllOnes(NumSubElts);
const APInt DemandedAllResultElts = APInt::getAllOnes(NumElts);
APInt DemandedLoadStoreElts = APInt::getZero(NumElts);
for (unsigned Index : Indices) {
assert(Index < Factor && "Invalid index for interleaved memory op");
for (unsigned Elm = 0; Elm < NumSubElts; Elm++)
DemandedLoadStoreElts.setBit(Index + Elm * Factor);
}
if (Opcode == Instruction::Load) {
// The interleave cost is similar to extract sub vectors' elements
// from the wide vector, and insert them into sub vectors.
//
// E.g. An interleaved load of factor 2 (with one member of index 0):
// %vec = load <8 x i32>, <8 x i32>* %ptr
// %v0 = shuffle %vec, undef, <0, 2, 4, 6> ; Index 0
// The cost is estimated as extract elements at 0, 2, 4, 6 from the
// <8 x i32> vector and insert them into a <4 x i32> vector.
InstructionCost InsSubCost = thisT()->getScalarizationOverhead(
SubVT, DemandedAllSubElts,
/*Insert*/ true, /*Extract*/ false, CostKind);
Cost += Indices.size() * InsSubCost;
Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
/*Insert*/ false,
/*Extract*/ true, CostKind);
} else {
// The interleave cost is extract elements from sub vectors, and
// insert them into the wide vector.
//
// E.g. An interleaved store of factor 3 with 2 members at indices 0,1:
// (using VF=4):
// %v0_v1 = shuffle %v0, %v1, <0,4,undef,1,5,undef,2,6,undef,3,7,undef>
// %gaps.mask = <true, true, false, true, true, false,
// true, true, false, true, true, false>
// call llvm.masked.store <12 x i32> %v0_v1, <12 x i32>* %ptr,
// i32 Align, <12 x i1> %gaps.mask
// The cost is estimated as extract all elements (of actual members,
// excluding gaps) from both <4 x i32> vectors and insert into the <12 x
// i32> vector.
InstructionCost ExtSubCost = thisT()->getScalarizationOverhead(
SubVT, DemandedAllSubElts,
/*Insert*/ false, /*Extract*/ true, CostKind);
Cost += ExtSubCost * Indices.size();
Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
/*Insert*/ true,
/*Extract*/ false, CostKind);
}
if (!UseMaskForCond)
return Cost;
Type *I8Type = Type::getInt8Ty(VT->getContext());
Cost += thisT()->getReplicationShuffleCost(
I8Type, Factor, NumSubElts,
UseMaskForGaps ? DemandedLoadStoreElts : DemandedAllResultElts,
CostKind);
// The Gaps mask is invariant and created outside the loop, therefore the
// cost of creating it is not accounted for here. However if we have both
// a MaskForGaps and some other mask that guards the execution of the
// memory access, we need to account for the cost of And-ing the two masks
// inside the loop.
if (UseMaskForGaps) {
auto *MaskVT = FixedVectorType::get(I8Type, NumElts);
Cost += thisT()->getArithmeticInstrCost(BinaryOperator::And, MaskVT,
CostKind);
}
return Cost;
}
/// Get intrinsic cost based on arguments.
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
TTI::TargetCostKind CostKind) {
// Check for generically free intrinsics.
if (BaseT::getIntrinsicInstrCost(ICA, CostKind) == 0)
return 0;
// Assume that target intrinsics are cheap.
Intrinsic::ID IID = ICA.getID();
if (Function::isTargetIntrinsic(IID))
return TargetTransformInfo::TCC_Basic;
if (ICA.isTypeBasedOnly())
return getTypeBasedIntrinsicInstrCost(ICA, CostKind);
Type *RetTy = ICA.getReturnType();
ElementCount RetVF =
(RetTy->isVectorTy() ? cast<VectorType>(RetTy)->getElementCount()
: ElementCount::getFixed(1));
const IntrinsicInst *I = ICA.getInst();
const SmallVectorImpl<const Value *> &Args = ICA.getArgs();
FastMathFlags FMF = ICA.getFlags();
switch (IID) {
default:
break;
case Intrinsic::powi:
if (auto *RHSC = dyn_cast<ConstantInt>(Args[1])) {
bool ShouldOptForSize = I->getParent()->getParent()->hasOptSize();
if (getTLI()->isBeneficialToExpandPowI(RHSC->getSExtValue(),
ShouldOptForSize)) {
// The cost is modeled on the expansion performed by ExpandPowI in
// SelectionDAGBuilder.
APInt Exponent = RHSC->getValue().abs();
unsigned ActiveBits = Exponent.getActiveBits();
unsigned PopCount = Exponent.popcount();
InstructionCost Cost = (ActiveBits + PopCount - 2) *
thisT()->getArithmeticInstrCost(
Instruction::FMul, RetTy, CostKind);
if (RHSC->isNegative())
Cost += thisT()->getArithmeticInstrCost(Instruction::FDiv, RetTy,
CostKind);
return Cost;
}
}
break;
case Intrinsic::cttz:
// FIXME: If necessary, this should go in target-specific overrides.
if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCttz(RetTy))
return TargetTransformInfo::TCC_Basic;
break;
case Intrinsic::ctlz:
// FIXME: If necessary, this should go in target-specific overrides.
if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCtlz(RetTy))
return TargetTransformInfo::TCC_Basic;
break;
case Intrinsic::memcpy:
return thisT()->getMemcpyCost(ICA.getInst());
case Intrinsic::masked_scatter: {
const Value *Mask = Args[3];
bool VarMask = !isa<Constant>(Mask);
Align Alignment = cast<ConstantInt>(Args[2])->getAlignValue();
return thisT()->getGatherScatterOpCost(Instruction::Store,
ICA.getArgTypes()[0], Args[1],
VarMask, Alignment, CostKind, I);
}
case Intrinsic::masked_gather: {
const Value *Mask = Args[2];
bool VarMask = !isa<Constant>(Mask);
Align Alignment = cast<ConstantInt>(Args[1])->getAlignValue();
return thisT()->getGatherScatterOpCost(Instruction::Load, RetTy, Args[0],
VarMask, Alignment, CostKind, I);
}
case Intrinsic::experimental_stepvector: {
if (isa<ScalableVectorType>(RetTy))
return BaseT::getIntrinsicInstrCost(ICA, CostKind);
// The cost of materialising a constant integer vector.
return TargetTransformInfo::TCC_Basic;
}
case Intrinsic::vector_extract: {
// FIXME: Handle case where a scalable vector is extracted from a scalable
// vector
if (isa<ScalableVectorType>(RetTy))
return BaseT::getIntrinsicInstrCost(ICA, CostKind);
unsigned Index = cast<ConstantInt>(Args[1])->getZExtValue();
return thisT()->getShuffleCost(
TTI::SK_ExtractSubvector, cast<VectorType>(Args[0]->getType()),
std::nullopt, CostKind, Index, cast<VectorType>(RetTy));
}
case Intrinsic::vector_insert: {
// FIXME: Handle case where a scalable vector is inserted into a scalable
// vector
if (isa<ScalableVectorType>(Args[1]->getType()))
return BaseT::getIntrinsicInstrCost(ICA, CostKind);
unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue();
return thisT()->getShuffleCost(
TTI::SK_InsertSubvector, cast<VectorType>(Args[0]->getType()),
std::nullopt, CostKind, Index, cast<VectorType>(Args[1]->getType()));
}
case Intrinsic::experimental_vector_reverse: {
return thisT()->getShuffleCost(
TTI::SK_Reverse, cast<VectorType>(Args[0]->getType()), std::nullopt,
CostKind, 0, cast<VectorType>(RetTy));
}
case Intrinsic::experimental_vector_splice: {
unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue();
return thisT()->getShuffleCost(
TTI::SK_Splice, cast<VectorType>(Args[0]->getType()), std::nullopt,
CostKind, Index, cast<VectorType>(RetTy));
}
case Intrinsic::vector_reduce_add:
case Intrinsic::vector_reduce_mul:
case Intrinsic::vector_reduce_and:
case Intrinsic::vector_reduce_or:
case Intrinsic::vector_reduce_xor:
case Intrinsic::vector_reduce_smax:
case Intrinsic::vector_reduce_smin:
case Intrinsic::vector_reduce_fmax:
case Intrinsic::vector_reduce_fmin:
case Intrinsic::vector_reduce_fmaximum:
case Intrinsic::vector_reduce_fminimum:
case Intrinsic::vector_reduce_umax:
case Intrinsic::vector_reduce_umin: {
IntrinsicCostAttributes Attrs(IID, RetTy, Args[0]->getType(), FMF, I, 1);
return getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
}
case Intrinsic::vector_reduce_fadd:
case Intrinsic::vector_reduce_fmul: {
IntrinsicCostAttributes Attrs(
IID, RetTy, {Args[0]->getType(), Args[1]->getType()}, FMF, I, 1);
return getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
}
case Intrinsic::fshl:
case Intrinsic::fshr: {
const Value *X = Args[0];
const Value *Y = Args[1];
const Value *Z = Args[2];
const TTI::OperandValueInfo OpInfoX = TTI::getOperandInfo(X);
const TTI::OperandValueInfo OpInfoY = TTI::getOperandInfo(Y);
const TTI::OperandValueInfo OpInfoZ = TTI::getOperandInfo(Z);
const TTI::OperandValueInfo OpInfoBW =
{TTI::OK_UniformConstantValue,
isPowerOf2_32(RetTy->getScalarSizeInBits()) ? TTI::OP_PowerOf2
: TTI::OP_None};
// fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
// fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
InstructionCost Cost = 0;
Cost +=
thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
Cost +=
thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy, CostKind);
Cost += thisT()->getArithmeticInstrCost(
BinaryOperator::Shl, RetTy, CostKind, OpInfoX,
{OpInfoZ.Kind, TTI::OP_None});
Cost += thisT()->getArithmeticInstrCost(
BinaryOperator::LShr, RetTy, CostKind, OpInfoY,
{OpInfoZ.Kind, TTI::OP_None});
// Non-constant shift amounts requires a modulo.
if (!OpInfoZ.isConstant())
Cost += thisT()->getArithmeticInstrCost(BinaryOperator::URem, RetTy,
CostKind, OpInfoZ, OpInfoBW);
// For non-rotates (X != Y) we must add shift-by-zero handling costs.
if (X != Y) {
Type *CondTy = RetTy->getWithNewBitWidth(1);
Cost +=
thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
CmpInst::ICMP_EQ, CostKind);
Cost +=
thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
CmpInst::ICMP_EQ, CostKind);
}
return Cost;
}
case Intrinsic::get_active_lane_mask: {
EVT ResVT = getTLI()->getValueType(DL, RetTy, true);
EVT ArgType = getTLI()->getValueType(DL, ICA.getArgTypes()[0], true);
// If we're not expanding the intrinsic then we assume this is cheap
// to implement.
if (!getTLI()->shouldExpandGetActiveLaneMask(ResVT, ArgType)) {
return getTypeLegalizationCost(RetTy).first;
}
// Create the expanded types that will be used to calculate the uadd_sat
// operation.
Type *ExpRetTy = VectorType::get(
ICA.getArgTypes()[0], cast<VectorType>(RetTy)->getElementCount());
IntrinsicCostAttributes Attrs(Intrinsic::uadd_sat, ExpRetTy, {}, FMF);
InstructionCost Cost =
thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, ExpRetTy, RetTy,
CmpInst::ICMP_ULT, CostKind);
return Cost;
}
}
// Assume that we need to scalarize this intrinsic.
// Compute the scalarization overhead based on Args for a vector
// intrinsic.
InstructionCost ScalarizationCost = InstructionCost::getInvalid();
if (RetVF.isVector() && !RetVF.isScalable()) {
ScalarizationCost = 0;
if (!RetTy->isVoidTy())
ScalarizationCost += getScalarizationOverhead(
cast<VectorType>(RetTy),
/*Insert*/ true, /*Extract*/ false, CostKind);
ScalarizationCost +=
getOperandsScalarizationOverhead(Args, ICA.getArgTypes(), CostKind);
}
IntrinsicCostAttributes Attrs(IID, RetTy, ICA.getArgTypes(), FMF, I,
ScalarizationCost);
return thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
}
/// Get intrinsic cost based on argument types.
/// If ScalarizationCostPassed is std::numeric_limits<unsigned>::max(), the
/// cost of scalarizing the arguments and the return value will be computed
/// based on types.
InstructionCost
getTypeBasedIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
TTI::TargetCostKind CostKind) {
Intrinsic::ID IID = ICA.getID();
Type *RetTy = ICA.getReturnType();
const SmallVectorImpl<Type *> &Tys = ICA.getArgTypes();
FastMathFlags FMF = ICA.getFlags();
InstructionCost ScalarizationCostPassed = ICA.getScalarizationCost();
bool SkipScalarizationCost = ICA.skipScalarizationCost();
VectorType *VecOpTy = nullptr;
if (!Tys.empty()) {
// The vector reduction operand is operand 0 except for fadd/fmul.
// Their operand 0 is a scalar start value, so the vector op is operand 1.
unsigned VecTyIndex = 0;
if (IID == Intrinsic::vector_reduce_fadd ||
IID == Intrinsic::vector_reduce_fmul)
VecTyIndex = 1;
assert(Tys.size() > VecTyIndex && "Unexpected IntrinsicCostAttributes");
VecOpTy = dyn_cast<VectorType>(Tys[VecTyIndex]);
}
// Library call cost - other than size, make it expensive.
unsigned SingleCallCost = CostKind == TTI::TCK_CodeSize ? 1 : 10;
unsigned ISD = 0;
switch (IID) {
default: {
// Scalable vectors cannot be scalarized, so return Invalid.
if (isa<ScalableVectorType>(RetTy) || any_of(Tys, [](const Type *Ty) {
return isa<ScalableVectorType>(Ty);
}))
return InstructionCost::getInvalid();
// Assume that we need to scalarize this intrinsic.
InstructionCost ScalarizationCost =
SkipScalarizationCost ? ScalarizationCostPassed : 0;
unsigned ScalarCalls = 1;
Type *ScalarRetTy = RetTy;
if (auto *RetVTy = dyn_cast<VectorType>(RetTy)) {
if (!SkipScalarizationCost)
ScalarizationCost = getScalarizationOverhead(
RetVTy, /*Insert*/ true, /*Extract*/ false, CostKind);
ScalarCalls = std::max(ScalarCalls,
cast<FixedVectorType>(RetVTy)->getNumElements());
ScalarRetTy = RetTy->getScalarType();
}
SmallVector<Type *, 4> ScalarTys;
for (unsigned i = 0, ie = Tys.size(); i != ie; ++i) {
Type *Ty = Tys[i];
if (auto *VTy = dyn_cast<VectorType>(Ty)) {
if (!SkipScalarizationCost)
ScalarizationCost += getScalarizationOverhead(
VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
ScalarCalls = std::max(ScalarCalls,
cast<FixedVectorType>(VTy)->getNumElements());
Ty = Ty->getScalarType();
}
ScalarTys.push_back(Ty);
}
if (ScalarCalls == 1)
return 1; // Return cost of a scalar intrinsic. Assume it to be cheap.
IntrinsicCostAttributes ScalarAttrs(IID, ScalarRetTy, ScalarTys, FMF);
InstructionCost ScalarCost =
thisT()->getIntrinsicInstrCost(ScalarAttrs, CostKind);
return ScalarCalls * ScalarCost + ScalarizationCost;
}
// Look for intrinsics that can be lowered directly or turned into a scalar
// intrinsic call.
case Intrinsic::sqrt:
ISD = ISD::FSQRT;
break;
case Intrinsic::sin:
ISD = ISD::FSIN;
break;
case Intrinsic::cos:
ISD = ISD::FCOS;
break;
case Intrinsic::exp:
ISD = ISD::FEXP;
break;
case Intrinsic::exp2:
ISD = ISD::FEXP2;
break;
case Intrinsic::log:
ISD = ISD::FLOG;
break;
case Intrinsic::log10:
ISD = ISD::FLOG10;
break;
case Intrinsic::log2:
ISD = ISD::FLOG2;
break;
case Intrinsic::fabs:
ISD = ISD::FABS;
break;
case Intrinsic::canonicalize:
ISD = ISD::FCANONICALIZE;
break;
case Intrinsic::minnum:
ISD = ISD::FMINNUM;
break;
case Intrinsic::maxnum:
ISD = ISD::FMAXNUM;
break;
case Intrinsic::minimum:
ISD = ISD::FMINIMUM;
break;
case Intrinsic::maximum:
ISD = ISD::FMAXIMUM;
break;
case Intrinsic::copysign:
ISD = ISD::FCOPYSIGN;
break;
case Intrinsic::floor:
ISD = ISD::FFLOOR;
break;
case Intrinsic::ceil:
ISD = ISD::FCEIL;
break;
case Intrinsic::trunc:
ISD = ISD::FTRUNC;
break;
case Intrinsic::nearbyint:
ISD = ISD::FNEARBYINT;
break;
case Intrinsic::rint:
ISD = ISD::FRINT;
break;
case Intrinsic::round:
ISD = ISD::FROUND;
break;
case Intrinsic::roundeven:
ISD = ISD::FROUNDEVEN;
break;
case Intrinsic::pow:
ISD = ISD::FPOW;
break;
case Intrinsic::fma:
ISD = ISD::FMA;
break;
case Intrinsic::fmuladd:
ISD = ISD::FMA;
break;
case Intrinsic::experimental_constrained_fmuladd:
ISD = ISD::STRICT_FMA;
break;
// FIXME: We should return 0 whenever getIntrinsicCost == TCC_Free.
case Intrinsic::lifetime_start:
case Intrinsic::lifetime_end:
case Intrinsic::sideeffect:
case Intrinsic::pseudoprobe:
case Intrinsic::arithmetic_fence:
return 0;
case Intrinsic::masked_store: {
Type *Ty = Tys[0];
Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
return thisT()->getMaskedMemoryOpCost(Instruction::Store, Ty, TyAlign, 0,
CostKind);
}
case Intrinsic::masked_load: {
Type *Ty = RetTy;
Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
return thisT()->getMaskedMemoryOpCost(Instruction::Load, Ty, TyAlign, 0,
CostKind);
}
case Intrinsic::vector_reduce_add:
return thisT()->getArithmeticReductionCost(Instruction::Add, VecOpTy,
std::nullopt, CostKind);
case Intrinsic::vector_reduce_mul:
return thisT()->getArithmeticReductionCost(Instruction::Mul, VecOpTy,
std::nullopt, CostKind);
case Intrinsic::vector_reduce_and:
return thisT()->getArithmeticReductionCost(Instruction::And, VecOpTy,
std::nullopt, CostKind);
case Intrinsic::vector_reduce_or:
return thisT()->getArithmeticReductionCost(Instruction::Or, VecOpTy,
std::nullopt, CostKind);
case Intrinsic::vector_reduce_xor:
return thisT()->getArithmeticReductionCost(Instruction::Xor, VecOpTy,
std::nullopt, CostKind);
case Intrinsic::vector_reduce_fadd:
return thisT()->getArithmeticReductionCost(Instruction::FAdd, VecOpTy,
FMF, CostKind);
case Intrinsic::vector_reduce_fmul:
return thisT()->getArithmeticReductionCost(Instruction::FMul, VecOpTy,
FMF, CostKind);
case Intrinsic::vector_reduce_smax:
return thisT()->getMinMaxReductionCost(Intrinsic::smax, VecOpTy,
ICA.getFlags(), CostKind);
case Intrinsic::vector_reduce_smin:
return thisT()->getMinMaxReductionCost(Intrinsic::smin, VecOpTy,
ICA.getFlags(), CostKind);
case Intrinsic::vector_reduce_umax:
return thisT()->getMinMaxReductionCost(Intrinsic::umax, VecOpTy,
ICA.getFlags(), CostKind);
case Intrinsic::vector_reduce_umin:
return thisT()->getMinMaxReductionCost(Intrinsic::umin, VecOpTy,
ICA.getFlags(), CostKind);
case Intrinsic::vector_reduce_fmax:
return thisT()->getMinMaxReductionCost(Intrinsic::maxnum, VecOpTy,
ICA.getFlags(), CostKind);
case Intrinsic::vector_reduce_fmin:
return thisT()->getMinMaxReductionCost(Intrinsic::minnum, VecOpTy,
ICA.getFlags(), CostKind);
case Intrinsic::vector_reduce_fmaximum:
return thisT()->getMinMaxReductionCost(Intrinsic::maximum, VecOpTy,
ICA.getFlags(), CostKind);
case Intrinsic::vector_reduce_fminimum:
return thisT()->getMinMaxReductionCost(Intrinsic::minimum, VecOpTy,
ICA.getFlags(), CostKind);
case Intrinsic::abs: {
// abs(X) = select(icmp(X,0),X,sub(0,X))
Type *CondTy = RetTy->getWithNewBitWidth(1);
CmpInst::Predicate Pred = CmpInst::ICMP_SGT;
InstructionCost Cost = 0;
Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
Pred, CostKind);
Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
Pred, CostKind);
// TODO: Should we add an OperandValueProperties::OP_Zero property?
Cost += thisT()->getArithmeticInstrCost(
BinaryOperator::Sub, RetTy, CostKind, {TTI::OK_UniformConstantValue, TTI::OP_None});
return Cost;
}
case Intrinsic::smax:
case Intrinsic::smin:
case Intrinsic::umax:
case Intrinsic::umin: {
// minmax(X,Y) = select(icmp(X,Y),X,Y)
Type *CondTy = RetTy->getWithNewBitWidth(1);
bool IsUnsigned = IID == Intrinsic::umax || IID == Intrinsic::umin;
CmpInst::Predicate Pred =
IsUnsigned ? CmpInst::ICMP_UGT : CmpInst::ICMP_SGT;
InstructionCost Cost = 0;
Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
Pred, CostKind);
Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
Pred, CostKind);
return Cost;
}
case Intrinsic::sadd_sat:
case Intrinsic::ssub_sat: {
Type *CondTy = RetTy->getWithNewBitWidth(1);
Type *OpTy = StructType::create({RetTy, CondTy});
Intrinsic::ID OverflowOp = IID == Intrinsic::sadd_sat
? Intrinsic::sadd_with_overflow
: Intrinsic::ssub_with_overflow;
CmpInst::Predicate Pred = CmpInst::ICMP_SGT;
// SatMax -> Overflow && SumDiff < 0
// SatMin -> Overflow && SumDiff >= 0
InstructionCost Cost = 0;
IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
nullptr, ScalarizationCostPassed);
Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
Pred, CostKind);
Cost += 2 * thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy,
CondTy, Pred, CostKind);
return Cost;
}
case Intrinsic::uadd_sat:
case Intrinsic::usub_sat: {
Type *CondTy = RetTy->getWithNewBitWidth(1);
Type *OpTy = StructType::create({RetTy, CondTy});
Intrinsic::ID OverflowOp = IID == Intrinsic::uadd_sat
? Intrinsic::uadd_with_overflow
: Intrinsic::usub_with_overflow;
InstructionCost Cost = 0;
IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
nullptr, ScalarizationCostPassed);
Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
Cost +=
thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
CmpInst::BAD_ICMP_PREDICATE, CostKind);
return Cost;
}
case Intrinsic::smul_fix:
case Intrinsic::umul_fix: {
unsigned ExtSize = RetTy->getScalarSizeInBits() * 2;
Type *ExtTy = RetTy->getWithNewBitWidth(ExtSize);
unsigned ExtOp =
IID == Intrinsic::smul_fix ? Instruction::SExt : Instruction::ZExt;
TTI::CastContextHint CCH = TTI::CastContextHint::None;
InstructionCost Cost = 0;
Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, RetTy, CCH, CostKind);
Cost +=
thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, RetTy, ExtTy,
CCH, CostKind);
Cost += thisT()->getArithmeticInstrCost(Instruction::LShr, RetTy,
CostKind,
{TTI::OK_AnyValue, TTI::OP_None},
{TTI::OK_UniformConstantValue, TTI::OP_None});
Cost += thisT()->getArithmeticInstrCost(Instruction::Shl, RetTy, CostKind,
{TTI::OK_AnyValue, TTI::OP_None},
{TTI::OK_UniformConstantValue, TTI::OP_None});
Cost += thisT()->getArithmeticInstrCost(Instruction::Or, RetTy, CostKind);
return Cost;
}
case Intrinsic::sadd_with_overflow:
case Intrinsic::ssub_with_overflow: {
Type *SumTy = RetTy->getContainedType(0);
Type *OverflowTy = RetTy->getContainedType(1);
unsigned Opcode = IID == Intrinsic::sadd_with_overflow
? BinaryOperator::Add
: BinaryOperator::Sub;
// Add:
// Overflow -> (Result < LHS) ^ (RHS < 0)
// Sub:
// Overflow -> (Result < LHS) ^ (RHS > 0)
InstructionCost Cost = 0;
Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
Cost += 2 * thisT()->getCmpSelInstrCost(
Instruction::ICmp, SumTy, OverflowTy,
CmpInst::ICMP_SGT, CostKind);
Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Xor, OverflowTy,
CostKind);
return Cost;
}
case Intrinsic::uadd_with_overflow:
case Intrinsic::usub_with_overflow: {
Type *SumTy = RetTy->getContainedType(0);
Type *OverflowTy = RetTy->getContainedType(1);
unsigned Opcode = IID == Intrinsic::uadd_with_overflow
? BinaryOperator::Add
: BinaryOperator::Sub;
CmpInst::Predicate Pred = IID == Intrinsic::uadd_with_overflow
? CmpInst::ICMP_ULT
: CmpInst::ICMP_UGT;
InstructionCost Cost = 0;
Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
Cost +=
thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, SumTy, OverflowTy,
Pred, CostKind);
return Cost;
}
case Intrinsic::smul_with_overflow:
case Intrinsic::umul_with_overflow: {
Type *MulTy = RetTy->getContainedType(0);
Type *OverflowTy = RetTy->getContainedType(1);
unsigned ExtSize = MulTy->getScalarSizeInBits() * 2;
Type *ExtTy = MulTy->getWithNewBitWidth(ExtSize);
bool IsSigned = IID == Intrinsic::smul_with_overflow;
unsigned ExtOp = IsSigned ? Instruction::SExt : Instruction::ZExt;
TTI::CastContextHint CCH = TTI::CastContextHint::None;
InstructionCost Cost = 0;
Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, MulTy, CCH, CostKind);
Cost +=
thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, MulTy, ExtTy,
CCH, CostKind);
Cost += thisT()->getArithmeticInstrCost(Instruction::LShr, ExtTy,
CostKind,
{TTI::OK_AnyValue, TTI::OP_None},
{TTI::OK_UniformConstantValue, TTI::OP_None});
if (IsSigned)
Cost += thisT()->getArithmeticInstrCost(Instruction::AShr, MulTy,
CostKind,
{TTI::OK_AnyValue, TTI::OP_None},
{TTI::OK_UniformConstantValue, TTI::OP_None});
Cost += thisT()->getCmpSelInstrCost(
BinaryOperator::ICmp, MulTy, OverflowTy, CmpInst::ICMP_NE, CostKind);
return Cost;
}
case Intrinsic::fptosi_sat:
case Intrinsic::fptoui_sat: {
if (Tys.empty())
break;
Type *FromTy = Tys[0];
bool IsSigned = IID == Intrinsic::fptosi_sat;
InstructionCost Cost = 0;
IntrinsicCostAttributes Attrs1(Intrinsic::minnum, FromTy,
{FromTy, FromTy});
Cost += thisT()->getIntrinsicInstrCost(Attrs1, CostKind);
IntrinsicCostAttributes Attrs2(Intrinsic::maxnum, FromTy,
{FromTy, FromTy});
Cost += thisT()->getIntrinsicInstrCost(Attrs2, CostKind);
Cost += thisT()->getCastInstrCost(
IsSigned ? Instruction::FPToSI : Instruction::FPToUI, RetTy, FromTy,
TTI::CastContextHint::None, CostKind);
if (IsSigned) {
Type *CondTy = RetTy->getWithNewBitWidth(1);
Cost += thisT()->getCmpSelInstrCost(
BinaryOperator::FCmp, FromTy, CondTy, CmpInst::FCMP_UNO, CostKind);
Cost += thisT()->getCmpSelInstrCost(
BinaryOperator::Select, RetTy, CondTy, CmpInst::FCMP_UNO, CostKind);
}
return Cost;
}
case Intrinsic::ctpop:
ISD = ISD::CTPOP;
// In case of legalization use TCC_Expensive. This is cheaper than a
// library call but still not a cheap instruction.
SingleCallCost = TargetTransformInfo::TCC_Expensive;
break;
case Intrinsic::ctlz:
ISD = ISD::CTLZ;
break;
case Intrinsic::cttz:
ISD = ISD::CTTZ;
break;
case Intrinsic::bswap:
ISD = ISD::BSWAP;
break;
case Intrinsic::bitreverse:
ISD = ISD::BITREVERSE;
break;
}
const TargetLoweringBase *TLI = getTLI();
std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(RetTy);
if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
if (IID == Intrinsic::fabs && LT.second.isFloatingPoint() &&
TLI->isFAbsFree(LT.second)) {
return 0;
}
// The operation is legal. Assume it costs 1.
// If the type is split to multiple registers, assume that there is some
// overhead to this.
// TODO: Once we have extract/insert subvector cost we need to use them.
if (LT.first > 1)
return (LT.first * 2);
else
return (LT.first * 1);
} else if (!TLI->isOperationExpand(ISD, LT.second)) {
// If the operation is custom lowered then assume
// that the code is twice as expensive.
return (LT.first * 2);
}
// If we can't lower fmuladd into an FMA estimate the cost as a floating
// point mul followed by an add.
if (IID == Intrinsic::fmuladd)
return thisT()->getArithmeticInstrCost(BinaryOperator::FMul, RetTy,
CostKind) +
thisT()->getArithmeticInstrCost(BinaryOperator::FAdd, RetTy,
CostKind);
if (IID == Intrinsic::experimental_constrained_fmuladd) {
IntrinsicCostAttributes FMulAttrs(
Intrinsic::experimental_constrained_fmul, RetTy, Tys);
IntrinsicCostAttributes FAddAttrs(
Intrinsic::experimental_constrained_fadd, RetTy, Tys);
return thisT()->getIntrinsicInstrCost(FMulAttrs, CostKind) +
thisT()->getIntrinsicInstrCost(FAddAttrs, CostKind);
}
// Else, assume that we need to scalarize this intrinsic. For math builtins
// this will emit a costly libcall, adding call overhead and spills. Make it
// very expensive.
if (auto *RetVTy = dyn_cast<VectorType>(RetTy)) {
// Scalable vectors cannot be scalarized, so return Invalid.
if (isa<ScalableVectorType>(RetTy) || any_of(Tys, [](const Type *Ty) {
return isa<ScalableVectorType>(Ty);
}))
return InstructionCost::getInvalid();
InstructionCost ScalarizationCost =
SkipScalarizationCost
? ScalarizationCostPassed
: getScalarizationOverhead(RetVTy, /*Insert*/ true,
/*Extract*/ false, CostKind);
unsigned ScalarCalls = cast<FixedVectorType>(RetVTy)->getNumElements();
SmallVector<Type *, 4> ScalarTys;
for (unsigned i = 0, ie = Tys.size(); i != ie; ++i) {
Type *Ty = Tys[i];
if (Ty->isVectorTy())
Ty = Ty->getScalarType();
ScalarTys.push_back(Ty);
}
IntrinsicCostAttributes Attrs(IID, RetTy->getScalarType(), ScalarTys, FMF);
InstructionCost ScalarCost =
thisT()->getIntrinsicInstrCost(Attrs, CostKind);
for (unsigned i = 0, ie = Tys.size(); i != ie; ++i) {
if (auto *VTy = dyn_cast<VectorType>(Tys[i])) {
if (!ICA.skipScalarizationCost())
ScalarizationCost += getScalarizationOverhead(
VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
ScalarCalls = std::max(ScalarCalls,
cast<FixedVectorType>(VTy)->getNumElements());
}
}
return ScalarCalls * ScalarCost + ScalarizationCost;
}
// This is going to be turned into a library call, make it expensive.
return SingleCallCost;
}
/// Compute a cost of the given call instruction.
///
/// Compute the cost of calling function F with return type RetTy and
/// argument types Tys. F might be nullptr, in this case the cost of an
/// arbitrary call with the specified signature will be returned.
/// This is used, for instance, when we estimate call of a vector
/// counterpart of the given function.
/// \param F Called function, might be nullptr.
/// \param RetTy Return value types.
/// \param Tys Argument types.
/// \returns The cost of Call instruction.
InstructionCost getCallInstrCost(Function *F, Type *RetTy,
ArrayRef<Type *> Tys,
TTI::TargetCostKind CostKind) {
return 10;
}
unsigned getNumberOfParts(Type *Tp) {
std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Tp);
return LT.first.isValid() ? *LT.first.getValue() : 0;
}
InstructionCost getAddressComputationCost(Type *Ty, ScalarEvolution *,
const SCEV *) {
return 0;
}
/// Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
/// We're assuming that reduction operation are performing the following way:
///
/// %val1 = shufflevector<n x t> %val, <n x t> %undef,
/// <n x i32> <i32 n/2, i32 n/2 + 1, ..., i32 n, i32 undef, ..., i32 undef>
/// \----------------v-------------/ \----------v------------/
/// n/2 elements n/2 elements
/// %red1 = op <n x t> %val, <n x t> val1
/// After this operation we have a vector %red1 where only the first n/2
/// elements are meaningful, the second n/2 elements are undefined and can be
/// dropped. All other operations are actually working with the vector of
/// length n/2, not n, though the real vector length is still n.
/// %val2 = shufflevector<n x t> %red1, <n x t> %undef,
/// <n x i32> <i32 n/4, i32 n/4 + 1, ..., i32 n/2, i32 undef, ..., i32 undef>
/// \----------------v-------------/ \----------v------------/
/// n/4 elements 3*n/4 elements
/// %red2 = op <n x t> %red1, <n x t> val2 - working with the vector of
/// length n/2, the resulting vector has length n/4 etc.
///
/// The cost model should take into account that the actual length of the
/// vector is reduced on each iteration.
InstructionCost getTreeReductionCost(unsigned Opcode, VectorType *Ty,
TTI::TargetCostKind CostKind) {
// Targets must implement a default value for the scalable case, since
// we don't know how many lanes the vector has.
if (isa<ScalableVectorType>(Ty))
return InstructionCost::getInvalid();
Type *ScalarTy = Ty->getElementType();
unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
if ((Opcode == Instruction::Or || Opcode == Instruction::And) &&
ScalarTy == IntegerType::getInt1Ty(Ty->getContext()) &&
NumVecElts >= 2) {
// Or reduction for i1 is represented as:
// %val = bitcast <ReduxWidth x i1> to iReduxWidth
// %res = cmp ne iReduxWidth %val, 0
// And reduction for i1 is represented as:
// %val = bitcast <ReduxWidth x i1> to iReduxWidth
// %res = cmp eq iReduxWidth %val, 11111
Type *ValTy = IntegerType::get(Ty->getContext(), NumVecElts);
return thisT()->getCastInstrCost(Instruction::BitCast, ValTy, Ty,
TTI::CastContextHint::None, CostKind) +
thisT()->getCmpSelInstrCost(Instruction::ICmp, ValTy,
CmpInst::makeCmpResultType(ValTy),
CmpInst::BAD_ICMP_PREDICATE, CostKind);
}
unsigned NumReduxLevels = Log2_32(NumVecElts);
InstructionCost ArithCost = 0;
InstructionCost ShuffleCost = 0;
std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
unsigned LongVectorCount = 0;
unsigned MVTLen =
LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
while (NumVecElts > MVTLen) {
NumVecElts /= 2;
VectorType *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
ShuffleCost +=
thisT()->getShuffleCost(TTI::SK_ExtractSubvector, Ty, std::nullopt,
CostKind, NumVecElts, SubTy);
ArithCost += thisT()->getArithmeticInstrCost(Opcode, SubTy, CostKind);
Ty = SubTy;
++LongVectorCount;
}
NumReduxLevels -= LongVectorCount;
// The minimal length of the vector is limited by the real length of vector
// operations performed on the current platform. That's why several final
// reduction operations are performed on the vectors with the same
// architecture-dependent length.
// By default reductions need one shuffle per reduction level.
ShuffleCost +=
NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
std::nullopt, CostKind, 0, Ty);
ArithCost +=
NumReduxLevels * thisT()->getArithmeticInstrCost(Opcode, Ty, CostKind);
return ShuffleCost + ArithCost +
thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
CostKind, 0, nullptr, nullptr);
}
/// Try to calculate the cost of performing strict (in-order) reductions,
/// which involves doing a sequence of floating point additions in lane
/// order, starting with an initial value. For example, consider a scalar
/// initial value 'InitVal' of type float and a vector of type <4 x float>:
///
/// Vector = <float %v0, float %v1, float %v2, float %v3>
///
/// %add1 = %InitVal + %v0
/// %add2 = %add1 + %v1
/// %add3 = %add2 + %v2
/// %add4 = %add3 + %v3
///
/// As a simple estimate we can say the cost of such a reduction is 4 times
/// the cost of a scalar FP addition. We can only estimate the costs for
/// fixed-width vectors here because for scalable vectors we do not know the
/// runtime number of operations.
InstructionCost getOrderedReductionCost(unsigned Opcode, VectorType *Ty,
TTI::TargetCostKind CostKind) {
// Targets must implement a default value for the scalable case, since
// we don't know how many lanes the vector has.
if (isa<ScalableVectorType>(Ty))
return InstructionCost::getInvalid();
auto *VTy = cast<FixedVectorType>(Ty);
InstructionCost ExtractCost = getScalarizationOverhead(
VTy, /*Insert=*/false, /*Extract=*/true, CostKind);
InstructionCost ArithCost = thisT()->getArithmeticInstrCost(
Opcode, VTy->getElementType(), CostKind);
ArithCost *= VTy->getNumElements();
return ExtractCost + ArithCost;
}
InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty,
std::optional<FastMathFlags> FMF,
TTI::TargetCostKind CostKind) {
assert(Ty && "Unknown reduction vector type");
if (TTI::requiresOrderedReduction(FMF))
return getOrderedReductionCost(Opcode, Ty, CostKind);
return getTreeReductionCost(Opcode, Ty, CostKind);
}
/// Try to calculate op costs for min/max reduction operations.
/// \param CondTy Conditional type for the Select instruction.
InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty,
FastMathFlags FMF,
TTI::TargetCostKind CostKind) {
// Targets must implement a default value for the scalable case, since
// we don't know how many lanes the vector has.
if (isa<ScalableVectorType>(Ty))
return InstructionCost::getInvalid();
Type *ScalarTy = Ty->getElementType();
unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
unsigned NumReduxLevels = Log2_32(NumVecElts);
InstructionCost MinMaxCost = 0;
InstructionCost ShuffleCost = 0;
std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
unsigned LongVectorCount = 0;
unsigned MVTLen =
LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
while (NumVecElts > MVTLen) {
NumVecElts /= 2;
auto *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
ShuffleCost +=
thisT()->getShuffleCost(TTI::SK_ExtractSubvector, Ty, std::nullopt,
CostKind, NumVecElts, SubTy);
IntrinsicCostAttributes Attrs(IID, SubTy, {SubTy, SubTy}, FMF);
MinMaxCost += getIntrinsicInstrCost(Attrs, CostKind);
Ty = SubTy;
++LongVectorCount;
}
NumReduxLevels -= LongVectorCount;
// The minimal length of the vector is limited by the real length of vector
// operations performed on the current platform. That's why several final
// reduction opertions are perfomed on the vectors with the same
// architecture-dependent length.
ShuffleCost +=
NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
std::nullopt, CostKind, 0, Ty);
IntrinsicCostAttributes Attrs(IID, Ty, {Ty, Ty}, FMF);
MinMaxCost += NumReduxLevels * getIntrinsicInstrCost(Attrs, CostKind);
// The last min/max should be in vector registers and we counted it above.
// So just need a single extractelement.
return ShuffleCost + MinMaxCost +
thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
CostKind, 0, nullptr, nullptr);
}
InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned,
Type *ResTy, VectorType *Ty,
FastMathFlags FMF,
TTI::TargetCostKind CostKind) {
// Without any native support, this is equivalent to the cost of
// vecreduce.opcode(ext(Ty A)).
VectorType *ExtTy = VectorType::get(ResTy, Ty);
InstructionCost RedCost =
thisT()->getArithmeticReductionCost(Opcode, ExtTy, FMF, CostKind);
InstructionCost ExtCost = thisT()->getCastInstrCost(
IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
TTI::CastContextHint::None, CostKind);
return RedCost + ExtCost;
}
InstructionCost getMulAccReductionCost(bool IsUnsigned, Type *ResTy,
VectorType *Ty,
TTI::TargetCostKind CostKind) {
// Without any native support, this is equivalent to the cost of
// vecreduce.add(mul(ext(Ty A), ext(Ty B))) or
// vecreduce.add(mul(A, B)).
VectorType *ExtTy = VectorType::get(ResTy, Ty);
InstructionCost RedCost = thisT()->getArithmeticReductionCost(
Instruction::Add, ExtTy, std::nullopt, CostKind);
InstructionCost ExtCost = thisT()->getCastInstrCost(
IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
TTI::CastContextHint::None, CostKind);
InstructionCost MulCost =
thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
return RedCost + MulCost + 2 * ExtCost;
}
InstructionCost getVectorSplitCost() { return 1; }
/// @}
};
/// Concrete BasicTTIImpl that can be used if no further customization
/// is needed.
class BasicTTIImpl : public BasicTTIImplBase<BasicTTIImpl> {
using BaseT = BasicTTIImplBase<BasicTTIImpl>;
friend class BasicTTIImplBase<BasicTTIImpl>;
const TargetSubtargetInfo *ST;
const TargetLoweringBase *TLI;
const TargetSubtargetInfo *getST() const { return ST; }
const TargetLoweringBase *getTLI() const { return TLI; }
public:
explicit BasicTTIImpl(const TargetMachine *TM, const Function &F);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_BASICTTIIMPL_H
PK hwFZ*A�
CodeGen/AtomicExpandUtils.hnu �[��� //===- AtomicExpandUtils.h - Utilities for expanding atomic instructions --===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_ATOMICEXPANDUTILS_H
#define LLVM_CODEGEN_ATOMICEXPANDUTILS_H
#include "llvm/ADT/STLExtras.h"
#include "llvm/IR/IRBuilder.h"
#include "llvm/Support/AtomicOrdering.h"
namespace llvm {
class AtomicRMWInst;
class Value;
/// Parameters (see the expansion example below):
/// (the builder, %addr, %loaded, %new_val, ordering,
/// /* OUT */ %success, /* OUT */ %new_loaded)
using CreateCmpXchgInstFun =
function_ref<void(IRBuilderBase &, Value *, Value *, Value *, Align,
AtomicOrdering, SyncScope::ID, Value *&, Value *&)>;
/// Expand an atomic RMW instruction into a loop utilizing
/// cmpxchg. You'll want to make sure your target machine likes cmpxchg
/// instructions in the first place and that there isn't another, better,
/// transformation available (for example AArch32/AArch64 have linked loads).
///
/// This is useful in passes which can't rewrite the more exotic RMW
/// instructions directly into a platform specific intrinsics (because, say,
/// those intrinsics don't exist). If such a pass is able to expand cmpxchg
/// instructions directly however, then, with this function, it could avoid two
/// extra module passes (avoiding passes by `-atomic-expand` and itself). A
/// specific example would be PNaCl's `RewriteAtomics` pass.
///
/// Given: atomicrmw some_op iN* %addr, iN %incr ordering
///
/// The standard expansion we produce is:
/// [...]
/// %init_loaded = load atomic iN* %addr
/// br label %loop
/// loop:
/// %loaded = phi iN [ %init_loaded, %entry ], [ %new_loaded, %loop ]
/// %new = some_op iN %loaded, %incr
/// ; This is what -atomic-expand will produce using this function on i686
/// targets:
/// %pair = cmpxchg iN* %addr, iN %loaded, iN %new_val
/// %new_loaded = extractvalue { iN, i1 } %pair, 0
/// %success = extractvalue { iN, i1 } %pair, 1
/// ; End callback produced IR
/// br i1 %success, label %atomicrmw.end, label %loop
/// atomicrmw.end:
/// [...]
///
/// Returns true if the containing function was modified.
bool expandAtomicRMWToCmpXchg(AtomicRMWInst *AI, CreateCmpXchgInstFun CreateCmpXchg);
} // end namespace llvm
#endif // LLVM_CODEGEN_ATOMICEXPANDUTILS_H
PK hwFZ����� � " CodeGen/MachineDominanceFrontier.hnu �[��� //===- llvm/CodeGen/MachineDominanceFrontier.h ------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEDOMINANCEFRONTIER_H
#define LLVM_CODEGEN_MACHINEDOMINANCEFRONTIER_H
#include "llvm/Analysis/DominanceFrontier.h"
#include "llvm/Analysis/DominanceFrontierImpl.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/Support/GenericDomTree.h"
namespace llvm {
class MachineDominanceFrontier : public MachineFunctionPass {
ForwardDominanceFrontierBase<MachineBasicBlock> Base;
public:
using DomTreeT = DomTreeBase<MachineBasicBlock>;
using DomTreeNodeT = DomTreeNodeBase<MachineBasicBlock>;
using DomSetType = DominanceFrontierBase<MachineBasicBlock, false>::DomSetType;
using iterator = DominanceFrontierBase<MachineBasicBlock, false>::iterator;
using const_iterator =
DominanceFrontierBase<MachineBasicBlock, false>::const_iterator;
MachineDominanceFrontier(const MachineDominanceFrontier &) = delete;
MachineDominanceFrontier &operator=(const MachineDominanceFrontier &) = delete;
static char ID;
MachineDominanceFrontier();
ForwardDominanceFrontierBase<MachineBasicBlock> &getBase() { return Base; }
const SmallVectorImpl<MachineBasicBlock *> &getRoots() const {
return Base.getRoots();
}
MachineBasicBlock *getRoot() const {
return Base.getRoot();
}
bool isPostDominator() const {
return Base.isPostDominator();
}
iterator begin() {
return Base.begin();
}
const_iterator begin() const {
return Base.begin();
}
iterator end() {
return Base.end();
}
const_iterator end() const {
return Base.end();
}
iterator find(MachineBasicBlock *B) {
return Base.find(B);
}
const_iterator find(MachineBasicBlock *B) const {
return Base.find(B);
}
iterator addBasicBlock(MachineBasicBlock *BB, const DomSetType &frontier) {
return Base.addBasicBlock(BB, frontier);
}
void removeBlock(MachineBasicBlock *BB) {
return Base.removeBlock(BB);
}
void addToFrontier(iterator I, MachineBasicBlock *Node) {
return Base.addToFrontier(I, Node);
}
void removeFromFrontier(iterator I, MachineBasicBlock *Node) {
return Base.removeFromFrontier(I, Node);
}
bool compareDomSet(DomSetType &DS1, const DomSetType &DS2) const {
return Base.compareDomSet(DS1, DS2);
}
bool compare(DominanceFrontierBase<MachineBasicBlock, false> &Other) const {
return Base.compare(Other);
}
bool runOnMachineFunction(MachineFunction &F) override;
void releaseMemory() override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINEDOMINANCEFRONTIER_H
PK hwFZ�
HJ� � CodeGen/WinEHFuncInfo.hnu �[��� //===- llvm/CodeGen/WinEHFuncInfo.h -----------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Data structures and associated state for Windows exception handling schemes.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_WINEHFUNCINFO_H
#define LLVM_CODEGEN_WINEHFUNCINFO_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/PointerUnion.h"
#include "llvm/ADT/SmallVector.h"
#include <cstdint>
#include <limits>
#include <utility>
namespace llvm {
class AllocaInst;
class BasicBlock;
class FuncletPadInst;
class Function;
class GlobalVariable;
class Instruction;
class InvokeInst;
class MachineBasicBlock;
class MCSymbol;
// The following structs respresent the .xdata tables for various
// Windows-related EH personalities.
using MBBOrBasicBlock = PointerUnion<const BasicBlock *, MachineBasicBlock *>;
struct CxxUnwindMapEntry {
int ToState;
MBBOrBasicBlock Cleanup;
};
/// Similar to CxxUnwindMapEntry, but supports SEH filters.
struct SEHUnwindMapEntry {
/// If unwinding continues through this handler, transition to the handler at
/// this state. This indexes into SEHUnwindMap.
int ToState = -1;
bool IsFinally = false;
/// Holds the filter expression function.
const Function *Filter = nullptr;
/// Holds the __except or __finally basic block.
MBBOrBasicBlock Handler;
};
struct WinEHHandlerType {
int Adjectives;
/// The CatchObj starts out life as an LLVM alloca and is eventually turned
/// frame index.
union {
const AllocaInst *Alloca;
int FrameIndex;
} CatchObj = {};
GlobalVariable *TypeDescriptor;
MBBOrBasicBlock Handler;
};
struct WinEHTryBlockMapEntry {
int TryLow = -1;
int TryHigh = -1;
int CatchHigh = -1;
SmallVector<WinEHHandlerType, 1> HandlerArray;
};
enum class ClrHandlerType { Catch, Finally, Fault, Filter };
struct ClrEHUnwindMapEntry {
MBBOrBasicBlock Handler;
uint32_t TypeToken;
int HandlerParentState; ///< Outer handler enclosing this entry's handler
int TryParentState; ///< Outer try region enclosing this entry's try region,
///< treating later catches on same try as "outer"
ClrHandlerType HandlerType;
};
struct WinEHFuncInfo {
DenseMap<const Instruction *, int> EHPadStateMap;
DenseMap<const FuncletPadInst *, int> FuncletBaseStateMap;
DenseMap<const InvokeInst *, int> InvokeStateMap;
DenseMap<MCSymbol *, std::pair<int, MCSymbol *>> LabelToStateMap;
DenseMap<const BasicBlock *, int> BlockToStateMap; // for AsynchEH
SmallVector<CxxUnwindMapEntry, 4> CxxUnwindMap;
SmallVector<WinEHTryBlockMapEntry, 4> TryBlockMap;
SmallVector<SEHUnwindMapEntry, 4> SEHUnwindMap;
SmallVector<ClrEHUnwindMapEntry, 4> ClrEHUnwindMap;
int UnwindHelpFrameIdx = std::numeric_limits<int>::max();
int PSPSymFrameIdx = std::numeric_limits<int>::max();
int getLastStateNumber() const { return CxxUnwindMap.size() - 1; }
void addIPToStateRange(const InvokeInst *II, MCSymbol *InvokeBegin,
MCSymbol *InvokeEnd);
void addIPToStateRange(int State, MCSymbol *InvokeBegin, MCSymbol *InvokeEnd);
int EHRegNodeFrameIndex = std::numeric_limits<int>::max();
int EHRegNodeEndOffset = std::numeric_limits<int>::max();
int EHGuardFrameIndex = std::numeric_limits<int>::max();
int SEHSetFrameOffset = std::numeric_limits<int>::max();
WinEHFuncInfo();
};
/// Analyze the IR in ParentFn and it's handlers to build WinEHFuncInfo, which
/// describes the state numbers and tables used by __CxxFrameHandler3. This
/// analysis assumes that WinEHPrepare has already been run.
void calculateWinCXXEHStateNumbers(const Function *ParentFn,
WinEHFuncInfo &FuncInfo);
void calculateSEHStateNumbers(const Function *ParentFn,
WinEHFuncInfo &FuncInfo);
void calculateClrEHStateNumbers(const Function *Fn, WinEHFuncInfo &FuncInfo);
// For AsynchEH (VC++ option -EHa)
void calculateCXXStateForAsynchEH(const BasicBlock *BB, int State,
WinEHFuncInfo &FuncInfo);
void calculateSEHStateForAsynchEH(const BasicBlock *BB, int State,
WinEHFuncInfo &FuncInfo);
} // end namespace llvm
#endif // LLVM_CODEGEN_WINEHFUNCINFO_H
PK hwFZ�';� � CodeGen/ResourcePriorityQueue.hnu �[��� //===----- ResourcePriorityQueue.h - A DFA-oriented priority queue -------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements the ResourcePriorityQueue class, which is a
// SchedulingPriorityQueue that schedules using DFA state to
// reduce the length of the critical path through the basic block
// on VLIW platforms.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_RESOURCEPRIORITYQUEUE_H
#define LLVM_CODEGEN_RESOURCEPRIORITYQUEUE_H
#include "llvm/CodeGen/ScheduleDAG.h"
namespace llvm {
class DFAPacketizer;
class InstrItineraryData;
class ResourcePriorityQueue;
class SelectionDAGISel;
class TargetInstrInfo;
class TargetRegisterInfo;
/// Sorting functions for the Available queue.
struct resource_sort {
ResourcePriorityQueue *PQ;
explicit resource_sort(ResourcePriorityQueue *pq) : PQ(pq) {}
bool operator()(const SUnit* LHS, const SUnit* RHS) const;
};
class ResourcePriorityQueue : public SchedulingPriorityQueue {
/// SUnits - The SUnits for the current graph.
std::vector<SUnit> *SUnits;
/// NumNodesSolelyBlocking - This vector contains, for every node in the
/// Queue, the number of nodes that the node is the sole unscheduled
/// predecessor for. This is used as a tie-breaker heuristic for better
/// mobility.
std::vector<unsigned> NumNodesSolelyBlocking;
/// Queue - The queue.
std::vector<SUnit*> Queue;
/// RegPressure - Tracking current reg pressure per register class.
///
std::vector<unsigned> RegPressure;
/// RegLimit - Tracking the number of allocatable registers per register
/// class.
std::vector<unsigned> RegLimit;
resource_sort Picker;
const TargetRegisterInfo *TRI;
const TargetLowering *TLI;
const TargetInstrInfo *TII;
const InstrItineraryData* InstrItins;
/// ResourcesModel - Represents VLIW state.
/// Not limited to VLIW targets per say, but assumes
/// definition of DFA by a target.
std::unique_ptr<DFAPacketizer> ResourcesModel;
/// Resource model - packet/bundle model. Purely
/// internal at the time.
std::vector<SUnit*> Packet;
/// Heuristics for estimating register pressure.
unsigned ParallelLiveRanges;
int HorizontalVerticalBalance;
public:
ResourcePriorityQueue(SelectionDAGISel *IS);
bool isBottomUp() const override { return false; }
void initNodes(std::vector<SUnit> &sunits) override;
void addNode(const SUnit *SU) override {
NumNodesSolelyBlocking.resize(SUnits->size(), 0);
}
void updateNode(const SUnit *SU) override {}
void releaseState() override {
SUnits = nullptr;
}
unsigned getLatency(unsigned NodeNum) const {
assert(NodeNum < (*SUnits).size());
return (*SUnits)[NodeNum].getHeight();
}
unsigned getNumSolelyBlockNodes(unsigned NodeNum) const {
assert(NodeNum < NumNodesSolelyBlocking.size());
return NumNodesSolelyBlocking[NodeNum];
}
/// Single cost function reflecting benefit of scheduling SU
/// in the current cycle.
int SUSchedulingCost (SUnit *SU);
/// InitNumRegDefsLeft - Determine the # of regs defined by this node.
///
void initNumRegDefsLeft(SUnit *SU);
int regPressureDelta(SUnit *SU, bool RawPressure = false);
int rawRegPressureDelta (SUnit *SU, unsigned RCId);
bool empty() const override { return Queue.empty(); }
void push(SUnit *U) override;
SUnit *pop() override;
void remove(SUnit *SU) override;
/// scheduledNode - Main resource tracking point.
void scheduledNode(SUnit *SU) override;
bool isResourceAvailable(SUnit *SU);
void reserveResources(SUnit *SU);
private:
void adjustPriorityOfUnscheduledPreds(SUnit *SU);
SUnit *getSingleUnscheduledPred(SUnit *SU);
unsigned numberRCValPredInSU (SUnit *SU, unsigned RCId);
unsigned numberRCValSuccInSU (SUnit *SU, unsigned RCId);
};
}
#endif
PK hwFZlQڪ CodeGen/ParallelCG.hnu �[��� //===-- llvm/CodeGen/ParallelCG.h - Parallel code generation ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This header declares functions that can be used for parallel code generation.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_PARALLELCG_H
#define LLVM_CODEGEN_PARALLELCG_H
#include "llvm/Support/CodeGen.h"
#include <functional>
#include <memory>
namespace llvm {
template <typename T> class ArrayRef;
class Module;
class TargetMachine;
class raw_pwrite_stream;
/// Split M into OSs.size() partitions, and generate code for each. Takes a
/// factory function for the TargetMachine TMFactory. Writes OSs.size() output
/// files to the output streams in OSs. The resulting output files if linked
/// together are intended to be equivalent to the single output file that would
/// have been code generated from M.
///
/// Writes bitcode for individual partitions into output streams in BCOSs, if
/// BCOSs is not empty.
void splitCodeGen(
Module &M, ArrayRef<raw_pwrite_stream *> OSs,
ArrayRef<llvm::raw_pwrite_stream *> BCOSs,
const std::function<std::unique_ptr<TargetMachine>()> &TMFactory,
CodeGenFileType FileType = CGFT_ObjectFile, bool PreserveLocals = false);
} // namespace llvm
#endif
PK hwFZ�C��F F CodeGen/GenVT.incnu �[��� /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|* *|
|* ValueTypes Source Fragment *|
|* *|
|* Automatically generated file, do not edit! *|
|* *|
\*===----------------------------------------------------------------------===*/
#ifdef GET_VT_ATTR // (Ty, n, sz, Any, Int, FP, Vec, Sc)
GET_VT_ATTR(Other, 1, 0, 0, 0, 0, 0, 0)
GET_VT_ATTR(i1, 2, 1, 0, 3, 0, 0, 0)
GET_VT_ATTR(i2, 3, 2, 0, 3, 0, 0, 0)
GET_VT_ATTR(i4, 4, 4, 0, 3, 0, 0, 0)
GET_VT_ATTR(i8, 5, 8, 0, 3, 0, 0, 0)
GET_VT_ATTR(i16, 6, 16, 0, 3, 0, 0, 0)
GET_VT_ATTR(i32, 7, 32, 0, 3, 0, 0, 0)
GET_VT_ATTR(i64, 8, 64, 0, 3, 0, 0, 0)
GET_VT_ATTR(i128, 9, 128, 0, 3, 0, 0, 0)
GET_VT_ATTR(bf16, 10, 16, 0, 0, 1, 0, 0)
GET_VT_ATTR(f16, 11, 16, 0, 0, 3, 0, 0)
GET_VT_ATTR(f32, 12, 32, 0, 0, 3, 0, 0)
GET_VT_ATTR(f64, 13, 64, 0, 0, 3, 0, 0)
GET_VT_ATTR(f80, 14, 80, 0, 0, 3, 0, 0)
GET_VT_ATTR(f128, 15, 128, 0, 0, 3, 0, 0)
GET_VT_ATTR(ppcf128, 16, 128, 0, 0, 1, 0, 0)
GET_VT_ATTR(v1i1, 17, 1, 0, 1, 0, 1, 0)
GET_VT_ATTR(v2i1, 18, 2, 0, 1, 0, 1, 0)
GET_VT_ATTR(v4i1, 19, 4, 0, 1, 0, 1, 0)
GET_VT_ATTR(v8i1, 20, 8, 0, 1, 0, 1, 0)
GET_VT_ATTR(v16i1, 21, 16, 0, 1, 0, 1, 0)
GET_VT_ATTR(v32i1, 22, 32, 0, 1, 0, 1, 0)
GET_VT_ATTR(v64i1, 23, 64, 0, 1, 0, 1, 0)
GET_VT_ATTR(v128i1, 24, 128, 0, 1, 0, 1, 0)
GET_VT_ATTR(v256i1, 25, 256, 0, 1, 0, 1, 0)
GET_VT_ATTR(v512i1, 26, 512, 0, 1, 0, 1, 0)
GET_VT_ATTR(v1024i1, 27, 1024, 0, 1, 0, 1, 0)
GET_VT_ATTR(v2048i1, 28, 2048, 0, 1, 0, 1, 0)
GET_VT_ATTR(v128i2, 29, 256, 0, 1, 0, 1, 0)
GET_VT_ATTR(v256i2, 30, 512, 0, 1, 0, 1, 0)
GET_VT_ATTR(v64i4, 31, 256, 0, 1, 0, 1, 0)
GET_VT_ATTR(v128i4, 32, 512, 0, 1, 0, 1, 0)
GET_VT_ATTR(v1i8, 33, 8, 0, 1, 0, 1, 0)
GET_VT_ATTR(v2i8, 34, 16, 0, 1, 0, 1, 0)
GET_VT_ATTR(v4i8, 35, 32, 0, 1, 0, 1, 0)
GET_VT_ATTR(v8i8, 36, 64, 0, 1, 0, 1, 0)
GET_VT_ATTR(v16i8, 37, 128, 0, 1, 0, 1, 0)
GET_VT_ATTR(v32i8, 38, 256, 0, 1, 0, 1, 0)
GET_VT_ATTR(v64i8, 39, 512, 0, 1, 0, 1, 0)
GET_VT_ATTR(v128i8, 40, 1024, 0, 1, 0, 1, 0)
GET_VT_ATTR(v256i8, 41, 2048, 0, 1, 0, 1, 0)
GET_VT_ATTR(v512i8, 42, 4096, 0, 1, 0, 1, 0)
GET_VT_ATTR(v1024i8, 43, 8192, 0, 1, 0, 1, 0)
GET_VT_ATTR(v1i16, 44, 16, 0, 1, 0, 1, 0)
GET_VT_ATTR(v2i16, 45, 32, 0, 1, 0, 1, 0)
GET_VT_ATTR(v3i16, 46, 48, 0, 1, 0, 1, 0)
GET_VT_ATTR(v4i16, 47, 64, 0, 1, 0, 1, 0)
GET_VT_ATTR(v8i16, 48, 128, 0, 1, 0, 1, 0)
GET_VT_ATTR(v16i16, 49, 256, 0, 1, 0, 1, 0)
GET_VT_ATTR(v32i16, 50, 512, 0, 1, 0, 1, 0)
GET_VT_ATTR(v64i16, 51, 1024, 0, 1, 0, 1, 0)
GET_VT_ATTR(v128i16, 52, 2048, 0, 1, 0, 1, 0)
GET_VT_ATTR(v256i16, 53, 4096, 0, 1, 0, 1, 0)
GET_VT_ATTR(v512i16, 54, 8192, 0, 1, 0, 1, 0)
GET_VT_ATTR(v1i32, 55, 32, 0, 1, 0, 1, 0)
GET_VT_ATTR(v2i32, 56, 64, 0, 1, 0, 1, 0)
GET_VT_ATTR(v3i32, 57, 96, 0, 1, 0, 1, 0)
GET_VT_ATTR(v4i32, 58, 128, 0, 1, 0, 1, 0)
GET_VT_ATTR(v5i32, 59, 160, 0, 1, 0, 1, 0)
GET_VT_ATTR(v6i32, 60, 192, 0, 1, 0, 1, 0)
GET_VT_ATTR(v7i32, 61, 224, 0, 1, 0, 1, 0)
GET_VT_ATTR(v8i32, 62, 256, 0, 1, 0, 1, 0)
GET_VT_ATTR(v9i32, 63, 288, 0, 1, 0, 1, 0)
GET_VT_ATTR(v10i32, 64, 320, 0, 1, 0, 1, 0)
GET_VT_ATTR(v11i32, 65, 352, 0, 1, 0, 1, 0)
GET_VT_ATTR(v12i32, 66, 384, 0, 1, 0, 1, 0)
GET_VT_ATTR(v16i32, 67, 512, 0, 1, 0, 1, 0)
GET_VT_ATTR(v32i32, 68, 1024, 0, 1, 0, 1, 0)
GET_VT_ATTR(v64i32, 69, 2048, 0, 1, 0, 1, 0)
GET_VT_ATTR(v128i32, 70, 4096, 0, 1, 0, 1, 0)
GET_VT_ATTR(v256i32, 71, 8192, 0, 1, 0, 1, 0)
GET_VT_ATTR(v512i32, 72, 16384, 0, 1, 0, 1, 0)
GET_VT_ATTR(v1024i32, 73, 32768, 0, 1, 0, 1, 0)
GET_VT_ATTR(v2048i32, 74, 65536, 0, 1, 0, 1, 0)
GET_VT_ATTR(v1i64, 75, 64, 0, 1, 0, 1, 0)
GET_VT_ATTR(v2i64, 76, 128, 0, 1, 0, 1, 0)
GET_VT_ATTR(v3i64, 77, 192, 0, 1, 0, 1, 0)
GET_VT_ATTR(v4i64, 78, 256, 0, 1, 0, 1, 0)
GET_VT_ATTR(v8i64, 79, 512, 0, 1, 0, 1, 0)
GET_VT_ATTR(v16i64, 80, 1024, 0, 1, 0, 1, 0)
GET_VT_ATTR(v32i64, 81, 2048, 0, 1, 0, 1, 0)
GET_VT_ATTR(v64i64, 82, 4096, 0, 1, 0, 1, 0)
GET_VT_ATTR(v128i64, 83, 8192, 0, 1, 0, 1, 0)
GET_VT_ATTR(v256i64, 84, 16384, 0, 1, 0, 1, 0)
GET_VT_ATTR(v1i128, 85, 128, 0, 1, 0, 1, 0)
GET_VT_ATTR(v1f16, 86, 16, 0, 0, 1, 1, 0)
GET_VT_ATTR(v2f16, 87, 32, 0, 0, 1, 1, 0)
GET_VT_ATTR(v3f16, 88, 48, 0, 0, 1, 1, 0)
GET_VT_ATTR(v4f16, 89, 64, 0, 0, 1, 1, 0)
GET_VT_ATTR(v8f16, 90, 128, 0, 0, 1, 1, 0)
GET_VT_ATTR(v16f16, 91, 256, 0, 0, 1, 1, 0)
GET_VT_ATTR(v32f16, 92, 512, 0, 0, 1, 1, 0)
GET_VT_ATTR(v64f16, 93, 1024, 0, 0, 1, 1, 0)
GET_VT_ATTR(v128f16, 94, 2048, 0, 0, 1, 1, 0)
GET_VT_ATTR(v256f16, 95, 4096, 0, 0, 1, 1, 0)
GET_VT_ATTR(v512f16, 96, 8192, 0, 0, 1, 1, 0)
GET_VT_ATTR(v2bf16, 97, 32, 0, 0, 1, 1, 0)
GET_VT_ATTR(v3bf16, 98, 48, 0, 0, 1, 1, 0)
GET_VT_ATTR(v4bf16, 99, 64, 0, 0, 1, 1, 0)
GET_VT_ATTR(v8bf16, 100, 128, 0, 0, 1, 1, 0)
GET_VT_ATTR(v16bf16, 101, 256, 0, 0, 1, 1, 0)
GET_VT_ATTR(v32bf16, 102, 512, 0, 0, 1, 1, 0)
GET_VT_ATTR(v64bf16, 103, 1024, 0, 0, 1, 1, 0)
GET_VT_ATTR(v128bf16, 104, 2048, 0, 0, 1, 1, 0)
GET_VT_ATTR(v1f32, 105, 32, 0, 0, 1, 1, 0)
GET_VT_ATTR(v2f32, 106, 64, 0, 0, 1, 1, 0)
GET_VT_ATTR(v3f32, 107, 96, 0, 0, 1, 1, 0)
GET_VT_ATTR(v4f32, 108, 128, 0, 0, 1, 1, 0)
GET_VT_ATTR(v5f32, 109, 160, 0, 0, 1, 1, 0)
GET_VT_ATTR(v6f32, 110, 192, 0, 0, 1, 1, 0)
GET_VT_ATTR(v7f32, 111, 224, 0, 0, 1, 1, 0)
GET_VT_ATTR(v8f32, 112, 256, 0, 0, 1, 1, 0)
GET_VT_ATTR(v9f32, 113, 288, 0, 0, 1, 1, 0)
GET_VT_ATTR(v10f32, 114, 320, 0, 0, 1, 1, 0)
GET_VT_ATTR(v11f32, 115, 352, 0, 0, 1, 1, 0)
GET_VT_ATTR(v12f32, 116, 384, 0, 0, 1, 1, 0)
GET_VT_ATTR(v16f32, 117, 512, 0, 0, 1, 1, 0)
GET_VT_ATTR(v32f32, 118, 1024, 0, 0, 1, 1, 0)
GET_VT_ATTR(v64f32, 119, 2048, 0, 0, 1, 1, 0)
GET_VT_ATTR(v128f32, 120, 4096, 0, 0, 1, 1, 0)
GET_VT_ATTR(v256f32, 121, 8192, 0, 0, 1, 1, 0)
GET_VT_ATTR(v512f32, 122, 16384, 0, 0, 1, 1, 0)
GET_VT_ATTR(v1024f32, 123, 32768, 0, 0, 1, 1, 0)
GET_VT_ATTR(v2048f32, 124, 65536, 0, 0, 1, 1, 0)
GET_VT_ATTR(v1f64, 125, 64, 0, 0, 1, 1, 0)
GET_VT_ATTR(v2f64, 126, 128, 0, 0, 1, 1, 0)
GET_VT_ATTR(v3f64, 127, 192, 0, 0, 1, 1, 0)
GET_VT_ATTR(v4f64, 128, 256, 0, 0, 1, 1, 0)
GET_VT_ATTR(v8f64, 129, 512, 0, 0, 1, 1, 0)
GET_VT_ATTR(v16f64, 130, 1024, 0, 0, 1, 1, 0)
GET_VT_ATTR(v32f64, 131, 2048, 0, 0, 1, 1, 0)
GET_VT_ATTR(v64f64, 132, 4096, 0, 0, 1, 1, 0)
GET_VT_ATTR(v128f64, 133, 8192, 0, 0, 1, 1, 0)
GET_VT_ATTR(v256f64, 134, 16384, 0, 0, 1, 1, 0)
GET_VT_ATTR(nxv1i1, 135, 1, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv2i1, 136, 2, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv4i1, 137, 4, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv8i1, 138, 8, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv16i1, 139, 16, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv32i1, 140, 32, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv64i1, 141, 64, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv1i8, 142, 8, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv2i8, 143, 16, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv4i8, 144, 32, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv8i8, 145, 64, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv16i8, 146, 128, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv32i8, 147, 256, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv64i8, 148, 512, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv1i16, 149, 16, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv2i16, 150, 32, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv4i16, 151, 64, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv8i16, 152, 128, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv16i16, 153, 256, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv32i16, 154, 512, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv1i32, 155, 32, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv2i32, 156, 64, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv4i32, 157, 128, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv8i32, 158, 256, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv16i32, 159, 512, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv32i32, 160, 1024, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv1i64, 161, 64, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv2i64, 162, 128, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv4i64, 163, 256, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv8i64, 164, 512, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv16i64, 165, 1024, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv32i64, 166, 2048, 0, 1, 0, 1, 1)
GET_VT_ATTR(nxv1f16, 167, 16, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv2f16, 168, 32, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv4f16, 169, 64, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv8f16, 170, 128, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv16f16, 171, 256, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv32f16, 172, 512, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv1bf16, 173, 16, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv2bf16, 174, 32, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv4bf16, 175, 64, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv8bf16, 176, 128, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv16bf16, 177, 256, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv32bf16, 178, 512, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv1f32, 179, 32, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv2f32, 180, 64, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv4f32, 181, 128, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv8f32, 182, 256, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv16f32, 183, 512, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv1f64, 184, 64, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv2f64, 185, 128, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv4f64, 186, 256, 0, 0, 1, 1, 1)
GET_VT_ATTR(nxv8f64, 187, 512, 0, 0, 1, 1, 1)
GET_VT_ATTR(x86mmx, 188, 64, 0, 0, 0, 0, 0)
GET_VT_ATTR(Glue, 189, 0, 0, 0, 0, 0, 0)
GET_VT_ATTR(isVoid, 190, 0, 0, 0, 0, 0, 0)
GET_VT_ATTR(Untyped, 191, 8, 0, 0, 0, 0, 0)
GET_VT_ATTR(funcref, 192, 0, 0, 0, 0, 0, 0)
GET_VT_ATTR(externref, 193, 0, 0, 0, 0, 0, 0)
GET_VT_ATTR(x86amx, 194, 8192, 0, 0, 0, 0, 0)
GET_VT_ATTR(i64x8, 195, 512, 0, 0, 0, 0, 0)
GET_VT_ATTR(aarch64svcount, 196, 16, 0, 0, 0, 0, 0)
GET_VT_ATTR(spirvbuiltin, 197, 0, 0, 0, 0, 0, 0)
GET_VT_ATTR(token, 248, 0, 0, 0, 0, 0, 0)
GET_VT_ATTR(Metadata, 249, 0, 0, 0, 0, 0, 0)
GET_VT_ATTR(iPTRAny, 250, 0, 1, 0, 0, 0, 0)
GET_VT_ATTR(vAny, 251, 0, 1, 0, 0, 0, 0)
GET_VT_ATTR(fAny, 252, 0, 1, 0, 0, 0, 0)
GET_VT_ATTR(iAny, 253, 0, 1, 0, 0, 0, 0)
GET_VT_ATTR(iPTR, 254, 0, 0, 0, 0, 0, 0)
GET_VT_ATTR(Any, 255, 0, 1, 0, 0, 0, 0)
#endif
#ifdef GET_VT_RANGES
FIRST_FIXEDLEN_VECTOR_VALUETYPE = v1i1,
LAST_FIXEDLEN_VECTOR_VALUETYPE = v256f64,
FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE = v1f16,
LAST_FP_FIXEDLEN_VECTOR_VALUETYPE = v256f64,
FIRST_FP_SCALABLE_VECTOR_VALUETYPE = nxv1f16,
LAST_FP_SCALABLE_VECTOR_VALUETYPE = nxv8f64,
FIRST_FP_VALUETYPE = bf16,
LAST_FP_VALUETYPE = ppcf128,
FIRST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE = v1i1,
LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE = v1i128,
FIRST_INTEGER_SCALABLE_VECTOR_VALUETYPE = nxv1i1,
LAST_INTEGER_SCALABLE_VECTOR_VALUETYPE = nxv32i64,
FIRST_INTEGER_VALUETYPE = i1,
LAST_INTEGER_VALUETYPE = i128,
FIRST_SCALABLE_VECTOR_VALUETYPE = nxv1i1,
LAST_SCALABLE_VECTOR_VALUETYPE = nxv8f64,
FIRST_VALUETYPE = Other,
LAST_VALUETYPE = spirvbuiltin,
FIRST_VECTOR_VALUETYPE = v1i1,
LAST_VECTOR_VALUETYPE = nxv8f64,
#endif
#ifdef GET_VT_VECATTR // (Ty, Sc, nElem, ElTy, ElSz)
GET_VT_VECATTR(v1i1, 0, 1, i1, 1)
GET_VT_VECATTR(v2i1, 0, 2, i1, 1)
GET_VT_VECATTR(v4i1, 0, 4, i1, 1)
GET_VT_VECATTR(v8i1, 0, 8, i1, 1)
GET_VT_VECATTR(v16i1, 0, 16, i1, 1)
GET_VT_VECATTR(v32i1, 0, 32, i1, 1)
GET_VT_VECATTR(v64i1, 0, 64, i1, 1)
GET_VT_VECATTR(v128i1, 0, 128, i1, 1)
GET_VT_VECATTR(v256i1, 0, 256, i1, 1)
GET_VT_VECATTR(v512i1, 0, 512, i1, 1)
GET_VT_VECATTR(v1024i1, 0, 1024, i1, 1)
GET_VT_VECATTR(v2048i1, 0, 2048, i1, 1)
GET_VT_VECATTR(v128i2, 0, 128, i2, 2)
GET_VT_VECATTR(v256i2, 0, 256, i2, 2)
GET_VT_VECATTR(v64i4, 0, 64, i4, 4)
GET_VT_VECATTR(v128i4, 0, 128, i4, 4)
GET_VT_VECATTR(v1i8, 0, 1, i8, 8)
GET_VT_VECATTR(v2i8, 0, 2, i8, 8)
GET_VT_VECATTR(v4i8, 0, 4, i8, 8)
GET_VT_VECATTR(v8i8, 0, 8, i8, 8)
GET_VT_VECATTR(v16i8, 0, 16, i8, 8)
GET_VT_VECATTR(v32i8, 0, 32, i8, 8)
GET_VT_VECATTR(v64i8, 0, 64, i8, 8)
GET_VT_VECATTR(v128i8, 0, 128, i8, 8)
GET_VT_VECATTR(v256i8, 0, 256, i8, 8)
GET_VT_VECATTR(v512i8, 0, 512, i8, 8)
GET_VT_VECATTR(v1024i8, 0, 1024, i8, 8)
GET_VT_VECATTR(v1i16, 0, 1, i16, 16)
GET_VT_VECATTR(v2i16, 0, 2, i16, 16)
GET_VT_VECATTR(v3i16, 0, 3, i16, 16)
GET_VT_VECATTR(v4i16, 0, 4, i16, 16)
GET_VT_VECATTR(v8i16, 0, 8, i16, 16)
GET_VT_VECATTR(v16i16, 0, 16, i16, 16)
GET_VT_VECATTR(v32i16, 0, 32, i16, 16)
GET_VT_VECATTR(v64i16, 0, 64, i16, 16)
GET_VT_VECATTR(v128i16, 0, 128, i16, 16)
GET_VT_VECATTR(v256i16, 0, 256, i16, 16)
GET_VT_VECATTR(v512i16, 0, 512, i16, 16)
GET_VT_VECATTR(v1i32, 0, 1, i32, 32)
GET_VT_VECATTR(v2i32, 0, 2, i32, 32)
GET_VT_VECATTR(v3i32, 0, 3, i32, 32)
GET_VT_VECATTR(v4i32, 0, 4, i32, 32)
GET_VT_VECATTR(v5i32, 0, 5, i32, 32)
GET_VT_VECATTR(v6i32, 0, 6, i32, 32)
GET_VT_VECATTR(v7i32, 0, 7, i32, 32)
GET_VT_VECATTR(v8i32, 0, 8, i32, 32)
GET_VT_VECATTR(v9i32, 0, 9, i32, 32)
GET_VT_VECATTR(v10i32, 0, 10, i32, 32)
GET_VT_VECATTR(v11i32, 0, 11, i32, 32)
GET_VT_VECATTR(v12i32, 0, 12, i32, 32)
GET_VT_VECATTR(v16i32, 0, 16, i32, 32)
GET_VT_VECATTR(v32i32, 0, 32, i32, 32)
GET_VT_VECATTR(v64i32, 0, 64, i32, 32)
GET_VT_VECATTR(v128i32, 0, 128, i32, 32)
GET_VT_VECATTR(v256i32, 0, 256, i32, 32)
GET_VT_VECATTR(v512i32, 0, 512, i32, 32)
GET_VT_VECATTR(v1024i32, 0, 1024, i32, 32)
GET_VT_VECATTR(v2048i32, 0, 2048, i32, 32)
GET_VT_VECATTR(v1i64, 0, 1, i64, 64)
GET_VT_VECATTR(v2i64, 0, 2, i64, 64)
GET_VT_VECATTR(v3i64, 0, 3, i64, 64)
GET_VT_VECATTR(v4i64, 0, 4, i64, 64)
GET_VT_VECATTR(v8i64, 0, 8, i64, 64)
GET_VT_VECATTR(v16i64, 0, 16, i64, 64)
GET_VT_VECATTR(v32i64, 0, 32, i64, 64)
GET_VT_VECATTR(v64i64, 0, 64, i64, 64)
GET_VT_VECATTR(v128i64, 0, 128, i64, 64)
GET_VT_VECATTR(v256i64, 0, 256, i64, 64)
GET_VT_VECATTR(v1i128, 0, 1, i128, 128)
GET_VT_VECATTR(v1f16, 0, 1, f16, 16)
GET_VT_VECATTR(v2f16, 0, 2, f16, 16)
GET_VT_VECATTR(v3f16, 0, 3, f16, 16)
GET_VT_VECATTR(v4f16, 0, 4, f16, 16)
GET_VT_VECATTR(v8f16, 0, 8, f16, 16)
GET_VT_VECATTR(v16f16, 0, 16, f16, 16)
GET_VT_VECATTR(v32f16, 0, 32, f16, 16)
GET_VT_VECATTR(v64f16, 0, 64, f16, 16)
GET_VT_VECATTR(v128f16, 0, 128, f16, 16)
GET_VT_VECATTR(v256f16, 0, 256, f16, 16)
GET_VT_VECATTR(v512f16, 0, 512, f16, 16)
GET_VT_VECATTR(v2bf16, 0, 2, bf16, 16)
GET_VT_VECATTR(v3bf16, 0, 3, bf16, 16)
GET_VT_VECATTR(v4bf16, 0, 4, bf16, 16)
GET_VT_VECATTR(v8bf16, 0, 8, bf16, 16)
GET_VT_VECATTR(v16bf16, 0, 16, bf16, 16)
GET_VT_VECATTR(v32bf16, 0, 32, bf16, 16)
GET_VT_VECATTR(v64bf16, 0, 64, bf16, 16)
GET_VT_VECATTR(v128bf16, 0, 128, bf16, 16)
GET_VT_VECATTR(v1f32, 0, 1, f32, 32)
GET_VT_VECATTR(v2f32, 0, 2, f32, 32)
GET_VT_VECATTR(v3f32, 0, 3, f32, 32)
GET_VT_VECATTR(v4f32, 0, 4, f32, 32)
GET_VT_VECATTR(v5f32, 0, 5, f32, 32)
GET_VT_VECATTR(v6f32, 0, 6, f32, 32)
GET_VT_VECATTR(v7f32, 0, 7, f32, 32)
GET_VT_VECATTR(v8f32, 0, 8, f32, 32)
GET_VT_VECATTR(v9f32, 0, 9, f32, 32)
GET_VT_VECATTR(v10f32, 0, 10, f32, 32)
GET_VT_VECATTR(v11f32, 0, 11, f32, 32)
GET_VT_VECATTR(v12f32, 0, 12, f32, 32)
GET_VT_VECATTR(v16f32, 0, 16, f32, 32)
GET_VT_VECATTR(v32f32, 0, 32, f32, 32)
GET_VT_VECATTR(v64f32, 0, 64, f32, 32)
GET_VT_VECATTR(v128f32, 0, 128, f32, 32)
GET_VT_VECATTR(v256f32, 0, 256, f32, 32)
GET_VT_VECATTR(v512f32, 0, 512, f32, 32)
GET_VT_VECATTR(v1024f32, 0, 1024, f32, 32)
GET_VT_VECATTR(v2048f32, 0, 2048, f32, 32)
GET_VT_VECATTR(v1f64, 0, 1, f64, 64)
GET_VT_VECATTR(v2f64, 0, 2, f64, 64)
GET_VT_VECATTR(v3f64, 0, 3, f64, 64)
GET_VT_VECATTR(v4f64, 0, 4, f64, 64)
GET_VT_VECATTR(v8f64, 0, 8, f64, 64)
GET_VT_VECATTR(v16f64, 0, 16, f64, 64)
GET_VT_VECATTR(v32f64, 0, 32, f64, 64)
GET_VT_VECATTR(v64f64, 0, 64, f64, 64)
GET_VT_VECATTR(v128f64, 0, 128, f64, 64)
GET_VT_VECATTR(v256f64, 0, 256, f64, 64)
GET_VT_VECATTR(nxv1i1, 1, 1, i1, 1)
GET_VT_VECATTR(nxv2i1, 1, 2, i1, 1)
GET_VT_VECATTR(nxv4i1, 1, 4, i1, 1)
GET_VT_VECATTR(nxv8i1, 1, 8, i1, 1)
GET_VT_VECATTR(nxv16i1, 1, 16, i1, 1)
GET_VT_VECATTR(nxv32i1, 1, 32, i1, 1)
GET_VT_VECATTR(nxv64i1, 1, 64, i1, 1)
GET_VT_VECATTR(nxv1i8, 1, 1, i8, 8)
GET_VT_VECATTR(nxv2i8, 1, 2, i8, 8)
GET_VT_VECATTR(nxv4i8, 1, 4, i8, 8)
GET_VT_VECATTR(nxv8i8, 1, 8, i8, 8)
GET_VT_VECATTR(nxv16i8, 1, 16, i8, 8)
GET_VT_VECATTR(nxv32i8, 1, 32, i8, 8)
GET_VT_VECATTR(nxv64i8, 1, 64, i8, 8)
GET_VT_VECATTR(nxv1i16, 1, 1, i16, 16)
GET_VT_VECATTR(nxv2i16, 1, 2, i16, 16)
GET_VT_VECATTR(nxv4i16, 1, 4, i16, 16)
GET_VT_VECATTR(nxv8i16, 1, 8, i16, 16)
GET_VT_VECATTR(nxv16i16, 1, 16, i16, 16)
GET_VT_VECATTR(nxv32i16, 1, 32, i16, 16)
GET_VT_VECATTR(nxv1i32, 1, 1, i32, 32)
GET_VT_VECATTR(nxv2i32, 1, 2, i32, 32)
GET_VT_VECATTR(nxv4i32, 1, 4, i32, 32)
GET_VT_VECATTR(nxv8i32, 1, 8, i32, 32)
GET_VT_VECATTR(nxv16i32, 1, 16, i32, 32)
GET_VT_VECATTR(nxv32i32, 1, 32, i32, 32)
GET_VT_VECATTR(nxv1i64, 1, 1, i64, 64)
GET_VT_VECATTR(nxv2i64, 1, 2, i64, 64)
GET_VT_VECATTR(nxv4i64, 1, 4, i64, 64)
GET_VT_VECATTR(nxv8i64, 1, 8, i64, 64)
GET_VT_VECATTR(nxv16i64, 1, 16, i64, 64)
GET_VT_VECATTR(nxv32i64, 1, 32, i64, 64)
GET_VT_VECATTR(nxv1f16, 1, 1, f16, 16)
GET_VT_VECATTR(nxv2f16, 1, 2, f16, 16)
GET_VT_VECATTR(nxv4f16, 1, 4, f16, 16)
GET_VT_VECATTR(nxv8f16, 1, 8, f16, 16)
GET_VT_VECATTR(nxv16f16, 1, 16, f16, 16)
GET_VT_VECATTR(nxv32f16, 1, 32, f16, 16)
GET_VT_VECATTR(nxv1bf16, 1, 1, bf16, 16)
GET_VT_VECATTR(nxv2bf16, 1, 2, bf16, 16)
GET_VT_VECATTR(nxv4bf16, 1, 4, bf16, 16)
GET_VT_VECATTR(nxv8bf16, 1, 8, bf16, 16)
GET_VT_VECATTR(nxv16bf16, 1, 16, bf16, 16)
GET_VT_VECATTR(nxv32bf16, 1, 32, bf16, 16)
GET_VT_VECATTR(nxv1f32, 1, 1, f32, 32)
GET_VT_VECATTR(nxv2f32, 1, 2, f32, 32)
GET_VT_VECATTR(nxv4f32, 1, 4, f32, 32)
GET_VT_VECATTR(nxv8f32, 1, 8, f32, 32)
GET_VT_VECATTR(nxv16f32, 1, 16, f32, 32)
GET_VT_VECATTR(nxv1f64, 1, 1, f64, 64)
GET_VT_VECATTR(nxv2f64, 1, 2, f64, 64)
GET_VT_VECATTR(nxv4f64, 1, 4, f64, 64)
GET_VT_VECATTR(nxv8f64, 1, 8, f64, 64)
#endif
PK hwFZHL�� � CodeGen/RDFLiveness.hnu �[��� //===- RDFLiveness.h --------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Recalculate the liveness information given a data flow graph.
// This includes block live-ins and kill flags.
#ifndef LLVM_CODEGEN_RDFLIVENESS_H
#define LLVM_CODEGEN_RDFLIVENESS_H
#include "RDFGraph.h"
#include "RDFRegisters.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/MC/LaneBitmask.h"
#include <map>
#include <set>
#include <unordered_map>
#include <unordered_set>
#include <utility>
namespace llvm {
class MachineBasicBlock;
class MachineDominanceFrontier;
class MachineDominatorTree;
class MachineRegisterInfo;
class TargetRegisterInfo;
namespace rdf {
namespace detail {
using NodeRef = std::pair<NodeId, LaneBitmask>;
} // namespace detail
} // namespace rdf
} // namespace llvm
namespace std {
template <> struct hash<llvm::rdf::detail::NodeRef> {
std::size_t operator()(llvm::rdf::detail::NodeRef R) const {
return std::hash<llvm::rdf::NodeId>{}(R.first) ^
std::hash<llvm::LaneBitmask::Type>{}(R.second.getAsInteger());
}
};
} // namespace std
namespace llvm::rdf {
struct Liveness {
public:
using LiveMapType = RegisterAggrMap<MachineBasicBlock *>;
using NodeRef = detail::NodeRef;
using NodeRefSet = std::unordered_set<NodeRef>;
using RefMap = std::unordered_map<RegisterId, NodeRefSet>;
Liveness(MachineRegisterInfo &mri, const DataFlowGraph &g)
: DFG(g), TRI(g.getTRI()), PRI(g.getPRI()), MDT(g.getDT()),
MDF(g.getDF()), LiveMap(g.getPRI()), Empty(), NoRegs(g.getPRI()) {}
NodeList getAllReachingDefs(RegisterRef RefRR, NodeAddr<RefNode *> RefA,
bool TopShadows, bool FullChain,
const RegisterAggr &DefRRs);
NodeList getAllReachingDefs(NodeAddr<RefNode *> RefA) {
return getAllReachingDefs(RefA.Addr->getRegRef(DFG), RefA, false, false,
NoRegs);
}
NodeList getAllReachingDefs(RegisterRef RefRR, NodeAddr<RefNode *> RefA) {
return getAllReachingDefs(RefRR, RefA, false, false, NoRegs);
}
NodeSet getAllReachedUses(RegisterRef RefRR, NodeAddr<DefNode *> DefA,
const RegisterAggr &DefRRs);
NodeSet getAllReachedUses(RegisterRef RefRR, NodeAddr<DefNode *> DefA) {
return getAllReachedUses(RefRR, DefA, NoRegs);
}
std::pair<NodeSet, bool> getAllReachingDefsRec(RegisterRef RefRR,
NodeAddr<RefNode *> RefA,
NodeSet &Visited,
const NodeSet &Defs);
NodeAddr<RefNode *> getNearestAliasedRef(RegisterRef RefRR,
NodeAddr<InstrNode *> IA);
LiveMapType &getLiveMap() { return LiveMap; }
const LiveMapType &getLiveMap() const { return LiveMap; }
const RefMap &getRealUses(NodeId P) const {
auto F = RealUseMap.find(P);
return F == RealUseMap.end() ? Empty : F->second;
}
void computePhiInfo();
void computeLiveIns();
void resetLiveIns();
void resetKills();
void resetKills(MachineBasicBlock *B);
void trace(bool T) { Trace = T; }
private:
const DataFlowGraph &DFG;
const TargetRegisterInfo &TRI;
const PhysicalRegisterInfo &PRI;
const MachineDominatorTree &MDT;
const MachineDominanceFrontier &MDF;
LiveMapType LiveMap;
const RefMap Empty;
const RegisterAggr NoRegs;
bool Trace = false;
// Cache of mapping from node ids (for RefNodes) to the containing
// basic blocks. Not computing it each time for each node reduces
// the liveness calculation time by a large fraction.
DenseMap<NodeId, MachineBasicBlock *> NBMap;
// Phi information:
//
// RealUseMap
// map: NodeId -> (map: RegisterId -> NodeRefSet)
// phi id -> (map: register -> set of reached non-phi uses)
DenseMap<NodeId, RefMap> RealUseMap;
// Inverse iterated dominance frontier.
std::map<MachineBasicBlock *, std::set<MachineBasicBlock *>> IIDF;
// Live on entry.
std::map<MachineBasicBlock *, RefMap> PhiLON;
// Phi uses are considered to be located at the end of the block that
// they are associated with. The reaching def of a phi use dominates the
// block that the use corresponds to, but not the block that contains
// the phi itself. To include these uses in the liveness propagation (up
// the dominator tree), create a map: block -> set of uses live on exit.
std::map<MachineBasicBlock *, RefMap> PhiLOX;
MachineBasicBlock *getBlockWithRef(NodeId RN) const;
void traverse(MachineBasicBlock *B, RefMap &LiveIn);
void emptify(RefMap &M);
std::pair<NodeSet, bool>
getAllReachingDefsRecImpl(RegisterRef RefRR, NodeAddr<RefNode *> RefA,
NodeSet &Visited, const NodeSet &Defs,
unsigned Nest, unsigned MaxNest);
};
raw_ostream &operator<<(raw_ostream &OS, const Print<Liveness::RefMap> &P);
} // end namespace llvm::rdf
#endif // LLVM_CODEGEN_RDFLIVENESS_H
PK hwFZx�� � CodeGen/IntrinsicLowering.hnu �[��� //===-- IntrinsicLowering.h - Intrinsic Function Lowering -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the IntrinsicLowering interface. This interface allows
// addition of domain-specific or front-end specific intrinsics to LLVM without
// having to modify all of the C backend or interpreter.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_INTRINSICLOWERING_H
#define LLVM_CODEGEN_INTRINSICLOWERING_H
namespace llvm {
class CallInst;
class DataLayout;
class IntrinsicLowering {
const DataLayout &DL;
bool Warned = false;
public:
explicit IntrinsicLowering(const DataLayout &DL) : DL(DL) {}
/// Replace a call to the specified intrinsic function.
/// If an intrinsic function must be implemented by the code generator
/// (such as va_start), this function should print a message and abort.
///
/// Otherwise, if an intrinsic function call can be lowered, the code to
/// implement it (often a call to a non-intrinsic function) is inserted
/// _after_ the call instruction and the call is deleted. The caller must
/// be capable of handling this kind of change.
void LowerIntrinsicCall(CallInst *CI);
/// Try to replace a call instruction with a call to a bswap intrinsic. Return
/// false if the call is not a simple integer bswap.
static bool LowerToByteSwap(CallInst *CI);
};
}
#endif
PK hwFZ&u�, �, CodeGen/ReachingDefAnalysis.hnu �[��� //==--- llvm/CodeGen/ReachingDefAnalysis.h - Reaching Def Analysis -*- C++ -*---==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file Reaching Defs Analysis pass.
///
/// This pass tracks for each instruction what is the "closest" reaching def of
/// a given register. It is used by BreakFalseDeps (for clearance calculation)
/// and ExecutionDomainFix (for arbitrating conflicting domains).
///
/// Note that this is different from the usual definition notion of liveness.
/// The CPU doesn't care whether or not we consider a register killed.
///
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_REACHINGDEFANALYSIS_H
#define LLVM_CODEGEN_REACHINGDEFANALYSIS_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/TinyPtrVector.h"
#include "llvm/CodeGen/LoopTraversal.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/InitializePasses.h"
namespace llvm {
class MachineBasicBlock;
class MachineInstr;
/// Thin wrapper around "int" used to store reaching definitions,
/// using an encoding that makes it compatible with TinyPtrVector.
/// The 0th LSB is forced zero (and will be used for pointer union tagging),
/// The 1st LSB is forced one (to make sure the value is non-zero).
class ReachingDef {
uintptr_t Encoded;
friend struct PointerLikeTypeTraits<ReachingDef>;
explicit ReachingDef(uintptr_t Encoded) : Encoded(Encoded) {}
public:
ReachingDef(std::nullptr_t) : Encoded(0) {}
ReachingDef(int Instr) : Encoded(((uintptr_t) Instr << 2) | 2) {}
operator int() const { return ((int) Encoded) >> 2; }
};
template<>
struct PointerLikeTypeTraits<ReachingDef> {
static constexpr int NumLowBitsAvailable = 1;
static inline void *getAsVoidPointer(const ReachingDef &RD) {
return reinterpret_cast<void *>(RD.Encoded);
}
static inline ReachingDef getFromVoidPointer(void *P) {
return ReachingDef(reinterpret_cast<uintptr_t>(P));
}
static inline ReachingDef getFromVoidPointer(const void *P) {
return ReachingDef(reinterpret_cast<uintptr_t>(P));
}
};
/// This class provides the reaching def analysis.
class ReachingDefAnalysis : public MachineFunctionPass {
private:
MachineFunction *MF = nullptr;
const TargetRegisterInfo *TRI = nullptr;
LoopTraversal::TraversalOrder TraversedMBBOrder;
unsigned NumRegUnits = 0;
/// Instruction that defined each register, relative to the beginning of the
/// current basic block. When a LiveRegsDefInfo is used to represent a
/// live-out register, this value is relative to the end of the basic block,
/// so it will be a negative number.
using LiveRegsDefInfo = std::vector<int>;
LiveRegsDefInfo LiveRegs;
/// Keeps clearance information for all registers. Note that this
/// is different from the usual definition notion of liveness. The CPU
/// doesn't care whether or not we consider a register killed.
using OutRegsInfoMap = SmallVector<LiveRegsDefInfo, 4>;
OutRegsInfoMap MBBOutRegsInfos;
/// Current instruction number.
/// The first instruction in each basic block is 0.
int CurInstr = -1;
/// Maps instructions to their instruction Ids, relative to the beginning of
/// their basic blocks.
DenseMap<MachineInstr *, int> InstIds;
/// All reaching defs of a given RegUnit for a given MBB.
using MBBRegUnitDefs = TinyPtrVector<ReachingDef>;
/// All reaching defs of all reg units for a given MBB
using MBBDefsInfo = std::vector<MBBRegUnitDefs>;
/// All reaching defs of all reg units for a all MBBs
using MBBReachingDefsInfo = SmallVector<MBBDefsInfo, 4>;
MBBReachingDefsInfo MBBReachingDefs;
/// Default values are 'nothing happened a long time ago'.
const int ReachingDefDefaultVal = -(1 << 21);
using InstSet = SmallPtrSetImpl<MachineInstr*>;
using BlockSet = SmallPtrSetImpl<MachineBasicBlock*>;
public:
static char ID; // Pass identification, replacement for typeid
ReachingDefAnalysis() : MachineFunctionPass(ID) {
initializeReachingDefAnalysisPass(*PassRegistry::getPassRegistry());
}
void releaseMemory() override;
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
bool runOnMachineFunction(MachineFunction &MF) override;
MachineFunctionProperties getRequiredProperties() const override {
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::NoVRegs).set(
MachineFunctionProperties::Property::TracksLiveness);
}
/// Re-run the analysis.
void reset();
/// Initialize data structures.
void init();
/// Traverse the machine function, mapping definitions.
void traverse();
/// Provides the instruction id of the closest reaching def instruction of
/// PhysReg that reaches MI, relative to the begining of MI's basic block.
int getReachingDef(MachineInstr *MI, MCRegister PhysReg) const;
/// Return whether A and B use the same def of PhysReg.
bool hasSameReachingDef(MachineInstr *A, MachineInstr *B,
MCRegister PhysReg) const;
/// Return whether the reaching def for MI also is live out of its parent
/// block.
bool isReachingDefLiveOut(MachineInstr *MI, MCRegister PhysReg) const;
/// Return the local MI that produces the live out value for PhysReg, or
/// nullptr for a non-live out or non-local def.
MachineInstr *getLocalLiveOutMIDef(MachineBasicBlock *MBB,
MCRegister PhysReg) const;
/// If a single MachineInstr creates the reaching definition, then return it.
/// Otherwise return null.
MachineInstr *getUniqueReachingMIDef(MachineInstr *MI,
MCRegister PhysReg) const;
/// If a single MachineInstr creates the reaching definition, for MIs operand
/// at Idx, then return it. Otherwise return null.
MachineInstr *getMIOperand(MachineInstr *MI, unsigned Idx) const;
/// If a single MachineInstr creates the reaching definition, for MIs MO,
/// then return it. Otherwise return null.
MachineInstr *getMIOperand(MachineInstr *MI, MachineOperand &MO) const;
/// Provide whether the register has been defined in the same basic block as,
/// and before, MI.
bool hasLocalDefBefore(MachineInstr *MI, MCRegister PhysReg) const;
/// Return whether the given register is used after MI, whether it's a local
/// use or a live out.
bool isRegUsedAfter(MachineInstr *MI, MCRegister PhysReg) const;
/// Return whether the given register is defined after MI.
bool isRegDefinedAfter(MachineInstr *MI, MCRegister PhysReg) const;
/// Provides the clearance - the number of instructions since the closest
/// reaching def instuction of PhysReg that reaches MI.
int getClearance(MachineInstr *MI, MCRegister PhysReg) const;
/// Provides the uses, in the same block as MI, of register that MI defines.
/// This does not consider live-outs.
void getReachingLocalUses(MachineInstr *MI, MCRegister PhysReg,
InstSet &Uses) const;
/// Search MBB for a definition of PhysReg and insert it into Defs. If no
/// definition is found, recursively search the predecessor blocks for them.
void getLiveOuts(MachineBasicBlock *MBB, MCRegister PhysReg, InstSet &Defs,
BlockSet &VisitedBBs) const;
void getLiveOuts(MachineBasicBlock *MBB, MCRegister PhysReg,
InstSet &Defs) const;
/// For the given block, collect the instructions that use the live-in
/// value of the provided register. Return whether the value is still
/// live on exit.
bool getLiveInUses(MachineBasicBlock *MBB, MCRegister PhysReg,
InstSet &Uses) const;
/// Collect the users of the value stored in PhysReg, which is defined
/// by MI.
void getGlobalUses(MachineInstr *MI, MCRegister PhysReg, InstSet &Uses) const;
/// Collect all possible definitions of the value stored in PhysReg, which is
/// used by MI.
void getGlobalReachingDefs(MachineInstr *MI, MCRegister PhysReg,
InstSet &Defs) const;
/// Return whether From can be moved forwards to just before To.
bool isSafeToMoveForwards(MachineInstr *From, MachineInstr *To) const;
/// Return whether From can be moved backwards to just after To.
bool isSafeToMoveBackwards(MachineInstr *From, MachineInstr *To) const;
/// Assuming MI is dead, recursively search the incoming operands which are
/// killed by MI and collect those that would become dead.
void collectKilledOperands(MachineInstr *MI, InstSet &Dead) const;
/// Return whether removing this instruction will have no effect on the
/// program, returning the redundant use-def chain.
bool isSafeToRemove(MachineInstr *MI, InstSet &ToRemove) const;
/// Return whether removing this instruction will have no effect on the
/// program, ignoring the possible effects on some instructions, returning
/// the redundant use-def chain.
bool isSafeToRemove(MachineInstr *MI, InstSet &ToRemove,
InstSet &Ignore) const;
/// Return whether a MachineInstr could be inserted at MI and safely define
/// the given register without affecting the program.
bool isSafeToDefRegAt(MachineInstr *MI, MCRegister PhysReg) const;
/// Return whether a MachineInstr could be inserted at MI and safely define
/// the given register without affecting the program, ignoring any effects
/// on the provided instructions.
bool isSafeToDefRegAt(MachineInstr *MI, MCRegister PhysReg,
InstSet &Ignore) const;
private:
/// Set up LiveRegs by merging predecessor live-out values.
void enterBasicBlock(MachineBasicBlock *MBB);
/// Update live-out values.
void leaveBasicBlock(MachineBasicBlock *MBB);
/// Process he given basic block.
void processBasicBlock(const LoopTraversal::TraversedMBBInfo &TraversedMBB);
/// Process block that is part of a loop again.
void reprocessBasicBlock(MachineBasicBlock *MBB);
/// Update def-ages for registers defined by MI.
/// Also break dependencies on partial defs and undef uses.
void processDefs(MachineInstr *);
/// Utility function for isSafeToMoveForwards/Backwards.
template<typename Iterator>
bool isSafeToMove(MachineInstr *From, MachineInstr *To) const;
/// Return whether removing this instruction will have no effect on the
/// program, ignoring the possible effects on some instructions, returning
/// the redundant use-def chain.
bool isSafeToRemove(MachineInstr *MI, InstSet &Visited,
InstSet &ToRemove, InstSet &Ignore) const;
/// Provides the MI, from the given block, corresponding to the Id or a
/// nullptr if the id does not refer to the block.
MachineInstr *getInstFromId(MachineBasicBlock *MBB, int InstId) const;
/// Provides the instruction of the closest reaching def instruction of
/// PhysReg that reaches MI, relative to the begining of MI's basic block.
MachineInstr *getReachingLocalMIDef(MachineInstr *MI,
MCRegister PhysReg) const;
};
} // namespace llvm
#endif // LLVM_CODEGEN_REACHINGDEFANALYSIS_H
PK hwFZ^^�;� � " CodeGen/NonRelocatableStringpool.hnu �[��� //===- NonRelocatableStringpool.h -------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_NONRELOCATABLESTRINGPOOL_H
#define LLVM_CODEGEN_NONRELOCATABLESTRINGPOOL_H
#include "llvm/CodeGen/DwarfStringPoolEntry.h"
#include "llvm/Support/Allocator.h"
#include <cstdint>
#include <vector>
namespace llvm {
/// A string table that doesn't need relocations.
///
/// Use this class when a string table doesn't need relocations.
/// This class provides this ability by just associating offsets with strings.
class NonRelocatableStringpool {
public:
/// Entries are stored into the StringMap and simply linked together through
/// the second element of this pair in order to keep track of insertion
/// order.
using MapTy = StringMap<DwarfStringPoolEntry, BumpPtrAllocator>;
NonRelocatableStringpool(
std::function<StringRef(StringRef Input)> Translator = nullptr,
bool PutEmptyString = false)
: Translator(Translator) {
if (PutEmptyString)
EmptyString = getEntry("");
}
DwarfStringPoolEntryRef getEntry(StringRef S);
/// Get the offset of string \p S in the string table. This can insert a new
/// element or return the offset of a pre-existing one.
uint64_t getStringOffset(StringRef S) { return getEntry(S).getOffset(); }
/// Get permanent storage for \p S (but do not necessarily emit \p S in the
/// output section). A latter call to getStringOffset() with the same string
/// will chain it though.
///
/// \returns The StringRef that points to permanent storage to use
/// in place of \p S.
StringRef internString(StringRef S);
uint64_t getSize() { return CurrentEndOffset; }
/// Return the list of strings to be emitted. This does not contain the
/// strings which were added via internString only.
std::vector<DwarfStringPoolEntryRef> getEntriesForEmission() const;
private:
MapTy Strings;
uint64_t CurrentEndOffset = 0;
unsigned NumEntries = 0;
DwarfStringPoolEntryRef EmptyString;
std::function<StringRef(StringRef Input)> Translator;
};
/// Helper for making strong types.
template <typename T, typename S> class StrongType : public T {
public:
template <typename... Args>
explicit StrongType(Args... A) : T(std::forward<Args>(A)...) {}
};
/// It's very easy to introduce bugs by passing the wrong string pool.
/// By using strong types the interface enforces that the right
/// kind of pool is used.
struct UniqueTag {};
struct OffsetsTag {};
using UniquingStringPool = StrongType<NonRelocatableStringpool, UniqueTag>;
using OffsetsStringPool = StrongType<NonRelocatableStringpool, OffsetsTag>;
} // end namespace llvm
#endif // LLVM_CODEGEN_NONRELOCATABLESTRINGPOOL_H
PK hwFZ*6�ˤ � CodeGen/PseudoSourceValue.hnu �[��� //===-- llvm/CodeGen/PseudoSourceValue.h ------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the declaration of the PseudoSourceValue class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_PSEUDOSOURCEVALUE_H
#define LLVM_CODEGEN_PSEUDOSOURCEVALUE_H
#include "llvm/ADT/StringMap.h"
#include "llvm/IR/ValueMap.h"
#include <map>
namespace llvm {
class GlobalValue;
class MachineFrameInfo;
class MachineMemOperand;
class MIRFormatter;
class PseudoSourceValue;
class raw_ostream;
class TargetMachine;
raw_ostream &operator<<(raw_ostream &OS, const PseudoSourceValue* PSV);
/// Special value supplied for machine level alias analysis. It indicates that
/// a memory access references the functions stack frame (e.g., a spill slot),
/// below the stack frame (e.g., argument space), or constant pool.
class PseudoSourceValue {
public:
enum PSVKind : unsigned {
Stack,
GOT,
JumpTable,
ConstantPool,
FixedStack,
GlobalValueCallEntry,
ExternalSymbolCallEntry,
TargetCustom
};
private:
unsigned Kind;
unsigned AddressSpace;
friend raw_ostream &llvm::operator<<(raw_ostream &OS,
const PseudoSourceValue* PSV);
friend class MachineMemOperand; // For printCustom().
friend class MIRFormatter; // For printCustom().
/// Implement printing for PseudoSourceValue. This is called from
/// Value::print or Value's operator<<.
virtual void printCustom(raw_ostream &O) const;
public:
explicit PseudoSourceValue(unsigned Kind, const TargetMachine &TM);
virtual ~PseudoSourceValue();
unsigned kind() const { return Kind; }
bool isStack() const { return Kind == Stack; }
bool isGOT() const { return Kind == GOT; }
bool isConstantPool() const { return Kind == ConstantPool; }
bool isJumpTable() const { return Kind == JumpTable; }
unsigned getAddressSpace() const { return AddressSpace; }
unsigned getTargetCustom() const {
return (Kind >= TargetCustom) ? ((Kind+1) - TargetCustom) : 0;
}
/// Test whether the memory pointed to by this PseudoSourceValue has a
/// constant value.
virtual bool isConstant(const MachineFrameInfo *) const;
/// Test whether the memory pointed to by this PseudoSourceValue may also be
/// pointed to by an LLVM IR Value.
virtual bool isAliased(const MachineFrameInfo *) const;
/// Return true if the memory pointed to by this PseudoSourceValue can ever
/// alias an LLVM IR Value.
virtual bool mayAlias(const MachineFrameInfo *) const;
};
/// A specialized PseudoSourceValue for holding FixedStack values, which must
/// include a frame index.
class FixedStackPseudoSourceValue : public PseudoSourceValue {
const int FI;
public:
explicit FixedStackPseudoSourceValue(int FI, const TargetMachine &TM)
: PseudoSourceValue(FixedStack, TM), FI(FI) {}
static bool classof(const PseudoSourceValue *V) {
return V->kind() == FixedStack;
}
bool isConstant(const MachineFrameInfo *MFI) const override;
bool isAliased(const MachineFrameInfo *MFI) const override;
bool mayAlias(const MachineFrameInfo *) const override;
void printCustom(raw_ostream &OS) const override;
int getFrameIndex() const { return FI; }
};
class CallEntryPseudoSourceValue : public PseudoSourceValue {
protected:
CallEntryPseudoSourceValue(unsigned Kind, const TargetMachine &TM);
public:
bool isConstant(const MachineFrameInfo *) const override;
bool isAliased(const MachineFrameInfo *) const override;
bool mayAlias(const MachineFrameInfo *) const override;
};
/// A specialized pseudo source value for holding GlobalValue values.
class GlobalValuePseudoSourceValue : public CallEntryPseudoSourceValue {
const GlobalValue *GV;
public:
GlobalValuePseudoSourceValue(const GlobalValue *GV, const TargetMachine &TM);
static bool classof(const PseudoSourceValue *V) {
return V->kind() == GlobalValueCallEntry;
}
const GlobalValue *getValue() const { return GV; }
};
/// A specialized pseudo source value for holding external symbol values.
class ExternalSymbolPseudoSourceValue : public CallEntryPseudoSourceValue {
const char *ES;
public:
ExternalSymbolPseudoSourceValue(const char *ES, const TargetMachine &TM);
static bool classof(const PseudoSourceValue *V) {
return V->kind() == ExternalSymbolCallEntry;
}
const char *getSymbol() const { return ES; }
};
/// Manages creation of pseudo source values.
class PseudoSourceValueManager {
const TargetMachine &TM;
const PseudoSourceValue StackPSV, GOTPSV, JumpTablePSV, ConstantPoolPSV;
std::map<int, std::unique_ptr<FixedStackPseudoSourceValue>> FSValues;
StringMap<std::unique_ptr<const ExternalSymbolPseudoSourceValue>>
ExternalCallEntries;
ValueMap<const GlobalValue *,
std::unique_ptr<const GlobalValuePseudoSourceValue>>
GlobalCallEntries;
public:
PseudoSourceValueManager(const TargetMachine &TM);
/// Return a pseudo source value referencing the area below the stack frame of
/// a function, e.g., the argument space.
const PseudoSourceValue *getStack();
/// Return a pseudo source value referencing the global offset table
/// (or something the like).
const PseudoSourceValue *getGOT();
/// Return a pseudo source value referencing the constant pool. Since constant
/// pools are constant, this doesn't need to identify a specific constant
/// pool entry.
const PseudoSourceValue *getConstantPool();
/// Return a pseudo source value referencing a jump table. Since jump tables
/// are constant, this doesn't need to identify a specific jump table.
const PseudoSourceValue *getJumpTable();
/// Return a pseudo source value referencing a fixed stack frame entry,
/// e.g., a spill slot.
const PseudoSourceValue *getFixedStack(int FI);
const PseudoSourceValue *getGlobalValueCallEntry(const GlobalValue *GV);
const PseudoSourceValue *getExternalSymbolCallEntry(const char *ES);
};
} // end namespace llvm
#endif
PK hwFZ�}3�' �' CodeGen/MachineDominators.hnu �[��� //==- llvm/CodeGen/MachineDominators.h - Machine Dom Calculation -*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines classes mirroring those in llvm/Analysis/Dominators.h,
// but for target-specific code rather than target-independent IR.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEDOMINATORS_H
#define LLVM_CODEGEN_MACHINEDOMINATORS_H
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBundleIterator.h"
#include "llvm/Support/GenericDomTree.h"
#include "llvm/Support/GenericDomTreeConstruction.h"
#include <cassert>
#include <memory>
namespace llvm {
class AnalysisUsage;
class MachineFunction;
class Module;
class raw_ostream;
template <>
inline void DominatorTreeBase<MachineBasicBlock, false>::addRoot(
MachineBasicBlock *MBB) {
this->Roots.push_back(MBB);
}
extern template class DomTreeNodeBase<MachineBasicBlock>;
extern template class DominatorTreeBase<MachineBasicBlock, false>; // DomTree
extern template class DominatorTreeBase<MachineBasicBlock, true>; // PostDomTree
using MachineDomTree = DomTreeBase<MachineBasicBlock>;
using MachineDomTreeNode = DomTreeNodeBase<MachineBasicBlock>;
//===-------------------------------------
/// DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to
/// compute a normal dominator tree.
///
class MachineDominatorTree : public MachineFunctionPass {
/// Helper structure used to hold all the basic blocks
/// involved in the split of a critical edge.
struct CriticalEdge {
MachineBasicBlock *FromBB;
MachineBasicBlock *ToBB;
MachineBasicBlock *NewBB;
};
/// Pile up all the critical edges to be split.
/// The splitting of a critical edge is local and thus, it is possible
/// to apply several of those changes at the same time.
mutable SmallVector<CriticalEdge, 32> CriticalEdgesToSplit;
/// Remember all the basic blocks that are inserted during
/// edge splitting.
/// Invariant: NewBBs == all the basic blocks contained in the NewBB
/// field of all the elements of CriticalEdgesToSplit.
/// I.e., forall elt in CriticalEdgesToSplit, it exists BB in NewBBs
/// such as BB == elt.NewBB.
mutable SmallSet<MachineBasicBlock *, 32> NewBBs;
/// The DominatorTreeBase that is used to compute a normal dominator tree.
std::unique_ptr<MachineDomTree> DT;
/// Apply all the recorded critical edges to the DT.
/// This updates the underlying DT information in a way that uses
/// the fast query path of DT as much as possible.
///
/// \post CriticalEdgesToSplit.empty().
void applySplitCriticalEdges() const;
public:
static char ID; // Pass ID, replacement for typeid
MachineDominatorTree();
explicit MachineDominatorTree(MachineFunction &MF) : MachineFunctionPass(ID) {
calculate(MF);
}
MachineDomTree &getBase() {
if (!DT)
DT.reset(new MachineDomTree());
applySplitCriticalEdges();
return *DT;
}
void getAnalysisUsage(AnalysisUsage &AU) const override;
MachineBasicBlock *getRoot() const {
applySplitCriticalEdges();
return DT->getRoot();
}
MachineDomTreeNode *getRootNode() const {
applySplitCriticalEdges();
return DT->getRootNode();
}
bool runOnMachineFunction(MachineFunction &F) override;
void calculate(MachineFunction &F);
bool dominates(const MachineDomTreeNode *A,
const MachineDomTreeNode *B) const {
applySplitCriticalEdges();
return DT->dominates(A, B);
}
void getDescendants(MachineBasicBlock *A,
SmallVectorImpl<MachineBasicBlock *> &Result) {
applySplitCriticalEdges();
DT->getDescendants(A, Result);
}
bool dominates(const MachineBasicBlock *A, const MachineBasicBlock *B) const {
applySplitCriticalEdges();
return DT->dominates(A, B);
}
// dominates - Return true if A dominates B. This performs the
// special checks necessary if A and B are in the same basic block.
bool dominates(const MachineInstr *A, const MachineInstr *B) const {
applySplitCriticalEdges();
const MachineBasicBlock *BBA = A->getParent(), *BBB = B->getParent();
if (BBA != BBB) return DT->dominates(BBA, BBB);
// Loop through the basic block until we find A or B.
MachineBasicBlock::const_iterator I = BBA->begin();
for (; &*I != A && &*I != B; ++I)
/*empty*/ ;
return &*I == A;
}
bool properlyDominates(const MachineDomTreeNode *A,
const MachineDomTreeNode *B) const {
applySplitCriticalEdges();
return DT->properlyDominates(A, B);
}
bool properlyDominates(const MachineBasicBlock *A,
const MachineBasicBlock *B) const {
applySplitCriticalEdges();
return DT->properlyDominates(A, B);
}
/// findNearestCommonDominator - Find nearest common dominator basic block
/// for basic block A and B. If there is no such block then return NULL.
MachineBasicBlock *findNearestCommonDominator(MachineBasicBlock *A,
MachineBasicBlock *B) {
applySplitCriticalEdges();
return DT->findNearestCommonDominator(A, B);
}
MachineDomTreeNode *operator[](MachineBasicBlock *BB) const {
applySplitCriticalEdges();
return DT->getNode(BB);
}
/// getNode - return the (Post)DominatorTree node for the specified basic
/// block. This is the same as using operator[] on this class.
///
MachineDomTreeNode *getNode(MachineBasicBlock *BB) const {
applySplitCriticalEdges();
return DT->getNode(BB);
}
/// addNewBlock - Add a new node to the dominator tree information. This
/// creates a new node as a child of DomBB dominator node,linking it into
/// the children list of the immediate dominator.
MachineDomTreeNode *addNewBlock(MachineBasicBlock *BB,
MachineBasicBlock *DomBB) {
applySplitCriticalEdges();
return DT->addNewBlock(BB, DomBB);
}
/// changeImmediateDominator - This method is used to update the dominator
/// tree information when a node's immediate dominator changes.
///
void changeImmediateDominator(MachineBasicBlock *N,
MachineBasicBlock *NewIDom) {
applySplitCriticalEdges();
DT->changeImmediateDominator(N, NewIDom);
}
void changeImmediateDominator(MachineDomTreeNode *N,
MachineDomTreeNode *NewIDom) {
applySplitCriticalEdges();
DT->changeImmediateDominator(N, NewIDom);
}
/// eraseNode - Removes a node from the dominator tree. Block must not
/// dominate any other blocks. Removes node from its immediate dominator's
/// children list. Deletes dominator node associated with basic block BB.
void eraseNode(MachineBasicBlock *BB) {
applySplitCriticalEdges();
DT->eraseNode(BB);
}
/// splitBlock - BB is split and now it has one successor. Update dominator
/// tree to reflect this change.
void splitBlock(MachineBasicBlock* NewBB) {
applySplitCriticalEdges();
DT->splitBlock(NewBB);
}
/// isReachableFromEntry - Return true if A is dominated by the entry
/// block of the function containing it.
bool isReachableFromEntry(const MachineBasicBlock *A) {
applySplitCriticalEdges();
return DT->isReachableFromEntry(A);
}
void releaseMemory() override;
void verifyAnalysis() const override;
void print(raw_ostream &OS, const Module*) const override;
/// Record that the critical edge (FromBB, ToBB) has been
/// split with NewBB.
/// This is best to use this method instead of directly update the
/// underlying information, because this helps mitigating the
/// number of time the DT information is invalidated.
///
/// \note Do not use this method with regular edges.
///
/// \note To benefit from the compile time improvement incurred by this
/// method, the users of this method have to limit the queries to the DT
/// interface between two edges splitting. In other words, they have to
/// pack the splitting of critical edges as much as possible.
void recordSplitCriticalEdge(MachineBasicBlock *FromBB,
MachineBasicBlock *ToBB,
MachineBasicBlock *NewBB) {
bool Inserted = NewBBs.insert(NewBB).second;
(void)Inserted;
assert(Inserted &&
"A basic block inserted via edge splitting cannot appear twice");
CriticalEdgesToSplit.push_back({FromBB, ToBB, NewBB});
}
};
//===-------------------------------------
/// DominatorTree GraphTraits specialization so the DominatorTree can be
/// iterable by generic graph iterators.
///
template <class Node, class ChildIterator>
struct MachineDomTreeGraphTraitsBase {
using NodeRef = Node *;
using ChildIteratorType = ChildIterator;
static NodeRef getEntryNode(NodeRef N) { return N; }
static ChildIteratorType child_begin(NodeRef N) { return N->begin(); }
static ChildIteratorType child_end(NodeRef N) { return N->end(); }
};
template <class T> struct GraphTraits;
template <>
struct GraphTraits<MachineDomTreeNode *>
: public MachineDomTreeGraphTraitsBase<MachineDomTreeNode,
MachineDomTreeNode::const_iterator> {
};
template <>
struct GraphTraits<const MachineDomTreeNode *>
: public MachineDomTreeGraphTraitsBase<const MachineDomTreeNode,
MachineDomTreeNode::const_iterator> {
};
template <> struct GraphTraits<MachineDominatorTree*>
: public GraphTraits<MachineDomTreeNode *> {
static NodeRef getEntryNode(MachineDominatorTree *DT) {
return DT->getRootNode();
}
};
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINEDOMINATORS_H
PK hwFZي � � CodeGen/ByteProvider.hnu �[��� //===-- include/llvm/CodeGen/ByteProvider.h - Map bytes ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// \file
// This file implements ByteProvider. The purpose of ByteProvider is to provide
// a map between a target node's byte (byte position is DestOffset) and the
// source (and byte position) that provides it (in Src and SrcOffset
// respectively) See CodeGen/SelectionDAG/DAGCombiner.cpp MatchLoadCombine
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_BYTEPROVIDER_H
#define LLVM_CODEGEN_BYTEPROVIDER_H
#include <optional>
#include <type_traits>
namespace llvm {
/// Represents known origin of an individual byte in combine pattern. The
/// value of the byte is either constant zero, or comes from memory /
/// some other productive instruction (e.g. arithmetic instructions).
/// Bit manipulation instructions like shifts are not ByteProviders, rather
/// are used to extract Bytes.
template <typename ISelOp> class ByteProvider {
private:
ByteProvider(std::optional<ISelOp> Src, int64_t DestOffset, int64_t SrcOffset)
: Src(Src), DestOffset(DestOffset), SrcOffset(SrcOffset) {}
// TODO -- use constraint in c++20
// Does this type correspond with an operation in selection DAG
template <typename T> class is_op {
private:
using yes = std::true_type;
using no = std::false_type;
// Only allow classes with member function getOpcode
template <typename U>
static auto test(int) -> decltype(std::declval<U>().getOpcode(), yes());
template <typename> static no test(...);
public:
using remove_pointer_t = typename std::remove_pointer<T>::type;
static constexpr bool value =
std::is_same<decltype(test<remove_pointer_t>(0)), yes>::value;
};
public:
// For constant zero providers Src is set to nullopt. For actual providers
// Src represents the node which originally produced the relevant bits.
std::optional<ISelOp> Src = std::nullopt;
// DestOffset is the offset of the byte in the dest we are trying to map for.
int64_t DestOffset = 0;
// SrcOffset is the offset in the ultimate source node that maps to the
// DestOffset
int64_t SrcOffset = 0;
ByteProvider() = default;
static ByteProvider getSrc(std::optional<ISelOp> Val, int64_t ByteOffset,
int64_t VectorOffset) {
static_assert(is_op<ISelOp>().value,
"ByteProviders must contain an operation in selection DAG.");
return ByteProvider(Val, ByteOffset, VectorOffset);
}
static ByteProvider getConstantZero() {
return ByteProvider<ISelOp>(std::nullopt, 0, 0);
}
bool isConstantZero() const { return !Src; }
bool hasSrc() const { return Src.has_value(); }
bool hasSameSrc(const ByteProvider &Other) const { return Other.Src == Src; }
bool operator==(const ByteProvider &Other) const {
return Other.Src == Src && Other.DestOffset == DestOffset &&
Other.SrcOffset == SrcOffset;
}
};
} // end namespace llvm
#endif // LLVM_CODEGEN_BYTEPROVIDER_H
PK hwFZ�^��� � CodeGen/EdgeBundles.hnu �[��� //===-------- EdgeBundles.h - Bundles of CFG edges --------------*- c++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// The EdgeBundles analysis forms equivalence classes of CFG edges such that all
// edges leaving a machine basic block are in the same bundle, and all edges
// entering a machine basic block are in the same bundle.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_EDGEBUNDLES_H
#define LLVM_CODEGEN_EDGEBUNDLES_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/IntEqClasses.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
namespace llvm {
class EdgeBundles : public MachineFunctionPass {
const MachineFunction *MF = nullptr;
/// EC - Each edge bundle is an equivalence class. The keys are:
/// 2*BB->getNumber() -> Ingoing bundle.
/// 2*BB->getNumber()+1 -> Outgoing bundle.
IntEqClasses EC;
/// Blocks - Map each bundle to a list of basic block numbers.
SmallVector<SmallVector<unsigned, 8>, 4> Blocks;
public:
static char ID;
EdgeBundles() : MachineFunctionPass(ID) {}
/// getBundle - Return the ingoing (Out = false) or outgoing (Out = true)
/// bundle number for basic block #N
unsigned getBundle(unsigned N, bool Out) const { return EC[2 * N + Out]; }
/// getNumBundles - Return the total number of bundles in the CFG.
unsigned getNumBundles() const { return EC.getNumClasses(); }
/// getBlocks - Return an array of blocks that are connected to Bundle.
ArrayRef<unsigned> getBlocks(unsigned Bundle) const { return Blocks[Bundle]; }
/// getMachineFunction - Return the last machine function computed.
const MachineFunction *getMachineFunction() const { return MF; }
/// view - Visualize the annotated bipartite CFG with Graphviz.
void view() const;
private:
bool runOnMachineFunction(MachineFunction&) override;
void getAnalysisUsage(AnalysisUsage&) const override;
};
} // end namespace llvm
#endif
PK hwFZ���>! >! CodeGen/MachineModuleInfo.hnu �[��� //===-- llvm/CodeGen/MachineModuleInfo.h ------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Collect meta information for a module. This information should be in a
// neutral form that can be used by different debugging and exception handling
// schemes.
//
// The organization of information is primarily clustered around the source
// compile units. The main exception is source line correspondence where
// inlining may interleave code from various compile units.
//
// The following information can be retrieved from the MachineModuleInfo.
//
// -- Source directories - Directories are uniqued based on their canonical
// string and assigned a sequential numeric ID (base 1.)
// -- Source files - Files are also uniqued based on their name and directory
// ID. A file ID is sequential number (base 1.)
// -- Source line correspondence - A vector of file ID, line#, column# triples.
// A DEBUG_LOCATION instruction is generated by the DAG Legalizer
// corresponding to each entry in the source line list. This allows a debug
// emitter to generate labels referenced by debug information tables.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEMODULEINFO_H
#define LLVM_CODEGEN_MACHINEMODULEINFO_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/PointerIntPair.h"
#include "llvm/IR/PassManager.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Pass.h"
#include <memory>
#include <utility>
#include <vector>
namespace llvm {
class Function;
class LLVMTargetMachine;
class MachineFunction;
class Module;
//===----------------------------------------------------------------------===//
/// This class can be derived from and used by targets to hold private
/// target-specific information for each Module. Objects of type are
/// accessed/created with MachineModuleInfo::getObjFileInfo and destroyed when
/// the MachineModuleInfo is destroyed.
///
class MachineModuleInfoImpl {
public:
using StubValueTy = PointerIntPair<MCSymbol *, 1, bool>;
using SymbolListTy = std::vector<std::pair<MCSymbol *, StubValueTy>>;
virtual ~MachineModuleInfoImpl();
protected:
/// Return the entries from a DenseMap in a deterministic sorted orer.
/// Clears the map.
static SymbolListTy getSortedStubs(DenseMap<MCSymbol*, StubValueTy>&);
};
//===----------------------------------------------------------------------===//
/// This class contains meta information specific to a module. Queries can be
/// made by different debugging and exception handling schemes and reformated
/// for specific use.
///
class MachineModuleInfo {
friend class MachineModuleInfoWrapperPass;
friend class MachineModuleAnalysis;
const LLVMTargetMachine &TM;
/// This is the MCContext used for the entire code generator.
MCContext Context;
// This is an external context, that if assigned, will be used instead of the
// internal context.
MCContext *ExternalContext = nullptr;
/// This is the LLVM Module being worked on.
const Module *TheModule = nullptr;
/// This is the object-file-format-specific implementation of
/// MachineModuleInfoImpl, which lets targets accumulate whatever info they
/// want.
MachineModuleInfoImpl *ObjFileMMI;
/// \name Exception Handling
/// \{
/// The current call site index being processed, if any. 0 if none.
unsigned CurCallSite = 0;
/// \}
// TODO: Ideally, what we'd like is to have a switch that allows emitting
// synchronous (precise at call-sites only) CFA into .eh_frame. However,
// even under this switch, we'd like .debug_frame to be precise when using
// -g. At this moment, there's no way to specify that some CFI directives
// go into .eh_frame only, while others go into .debug_frame only.
/// True if debugging information is available in this module.
bool DbgInfoAvailable = false;
/// True if this module is being built for windows/msvc, and uses floating
/// point. This is used to emit an undefined reference to _fltused.
bool UsesMSVCFloatingPoint = false;
/// Maps IR Functions to their corresponding MachineFunctions.
DenseMap<const Function*, std::unique_ptr<MachineFunction>> MachineFunctions;
/// Next unique number available for a MachineFunction.
unsigned NextFnNum = 0;
const Function *LastRequest = nullptr; ///< Used for shortcut/cache.
MachineFunction *LastResult = nullptr; ///< Used for shortcut/cache.
MachineModuleInfo &operator=(MachineModuleInfo &&MMII) = delete;
public:
explicit MachineModuleInfo(const LLVMTargetMachine *TM = nullptr);
explicit MachineModuleInfo(const LLVMTargetMachine *TM,
MCContext *ExtContext);
MachineModuleInfo(MachineModuleInfo &&MMII);
~MachineModuleInfo();
void initialize();
void finalize();
const LLVMTargetMachine &getTarget() const { return TM; }
const MCContext &getContext() const {
return ExternalContext ? *ExternalContext : Context;
}
MCContext &getContext() {
return ExternalContext ? *ExternalContext : Context;
}
const Module *getModule() const { return TheModule; }
/// Returns the MachineFunction constructed for the IR function \p F.
/// Creates a new MachineFunction if none exists yet.
MachineFunction &getOrCreateMachineFunction(Function &F);
/// \brief Returns the MachineFunction associated to IR function \p F if there
/// is one, otherwise nullptr.
MachineFunction *getMachineFunction(const Function &F) const;
/// Delete the MachineFunction \p MF and reset the link in the IR Function to
/// Machine Function map.
void deleteMachineFunctionFor(Function &F);
/// Add an externally created MachineFunction \p MF for \p F.
void insertFunction(const Function &F, std::unique_ptr<MachineFunction> &&MF);
/// Keep track of various per-module pieces of information for backends
/// that would like to do so.
template<typename Ty>
Ty &getObjFileInfo() {
if (ObjFileMMI == nullptr)
ObjFileMMI = new Ty(*this);
return *static_cast<Ty*>(ObjFileMMI);
}
template<typename Ty>
const Ty &getObjFileInfo() const {
return const_cast<MachineModuleInfo*>(this)->getObjFileInfo<Ty>();
}
/// Returns true if valid debug info is present.
bool hasDebugInfo() const { return DbgInfoAvailable; }
bool usesMSVCFloatingPoint() const { return UsesMSVCFloatingPoint; }
void setUsesMSVCFloatingPoint(bool b) { UsesMSVCFloatingPoint = b; }
/// \name Exception Handling
/// \{
/// Set the call site currently being processed.
void setCurrentCallSite(unsigned Site) { CurCallSite = Site; }
/// Get the call site currently being processed, if any. return zero if
/// none.
unsigned getCurrentCallSite() { return CurCallSite; }
/// \}
// MMI owes MCContext. It should never be invalidated.
bool invalidate(Module &, const PreservedAnalyses &,
ModuleAnalysisManager::Invalidator &) {
return false;
}
}; // End class MachineModuleInfo
class MachineModuleInfoWrapperPass : public ImmutablePass {
MachineModuleInfo MMI;
public:
static char ID; // Pass identification, replacement for typeid
explicit MachineModuleInfoWrapperPass(const LLVMTargetMachine *TM = nullptr);
explicit MachineModuleInfoWrapperPass(const LLVMTargetMachine *TM,
MCContext *ExtContext);
// Initialization and Finalization
bool doInitialization(Module &) override;
bool doFinalization(Module &) override;
MachineModuleInfo &getMMI() { return MMI; }
const MachineModuleInfo &getMMI() const { return MMI; }
};
/// An analysis that produces \c MachineInfo for a module.
class MachineModuleAnalysis : public AnalysisInfoMixin<MachineModuleAnalysis> {
friend AnalysisInfoMixin<MachineModuleAnalysis>;
static AnalysisKey Key;
const LLVMTargetMachine *TM;
public:
/// Provide the result type for this analysis pass.
using Result = MachineModuleInfo;
MachineModuleAnalysis(const LLVMTargetMachine *TM) : TM(TM) {}
/// Run the analysis pass and produce machine module information.
MachineModuleInfo run(Module &M, ModuleAnalysisManager &);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINEMODULEINFO_H
PK hwFZN�VZ Z CodeGen/CSEConfigBase.hnu �[��� //===- CSEConfigBase.h - A CSEConfig interface ------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_CSECONFIGBASE_H
#define LLVM_CODEGEN_CSECONFIGBASE_H
namespace llvm {
// Class representing some configuration that can be done during GlobalISel's
// CSEInfo analysis. We define it here because TargetPassConfig can't depend on
// the GlobalISel library, and so we use this in the interface between them
// so that the derived classes in GISel can reference generic opcodes.
class CSEConfigBase {
public:
virtual ~CSEConfigBase() = default;
// Hook for defining which Generic instructions should be CSEd.
// GISelCSEInfo currently only calls this hook when dealing with generic
// opcodes.
virtual bool shouldCSEOpc(unsigned Opc) { return false; }
};
} // namespace llvm
#endif // LLVM_CODEGEN_CSECONFIGBASE_H
PK hwFZ�eA�d �d CodeGen/MachineInstrBuilder.hnu �[��� //===- CodeGen/MachineInstrBuilder.h - Simplify creation of MIs --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file exposes a function named BuildMI, which is useful for dramatically
// simplifying how MachineInstr's are created. It allows use of code like this:
//
// MIMetadata MIMD(MI); // Propagates DebugLoc and other metadata
// M = BuildMI(MBB, MI, MIMD, TII.get(X86::ADD8rr), Dst)
// .addReg(argVal1)
// .addReg(argVal2);
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
#define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/CodeGen/GlobalISel/Utils.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBundle.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/IR/InstrTypes.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/Support/ErrorHandling.h"
#include <cassert>
#include <cstdint>
namespace llvm {
class MCInstrDesc;
class MDNode;
namespace RegState {
enum {
/// Register definition.
Define = 0x2,
/// Not emitted register (e.g. carry, or temporary result).
Implicit = 0x4,
/// The last use of a register.
Kill = 0x8,
/// Unused definition.
Dead = 0x10,
/// Value of the register doesn't matter.
Undef = 0x20,
/// Register definition happens before uses.
EarlyClobber = 0x40,
/// Register 'use' is for debugging purpose.
Debug = 0x80,
/// Register reads a value that is defined inside the same instruction or
/// bundle.
InternalRead = 0x100,
/// Register that may be renamed.
Renamable = 0x200,
DefineNoRead = Define | Undef,
ImplicitDefine = Implicit | Define,
ImplicitKill = Implicit | Kill
};
} // end namespace RegState
class MachineInstrBuilder {
MachineFunction *MF = nullptr;
MachineInstr *MI = nullptr;
public:
MachineInstrBuilder() = default;
/// Create a MachineInstrBuilder for manipulating an existing instruction.
/// F must be the machine function that was used to allocate I.
MachineInstrBuilder(MachineFunction &F, MachineInstr *I) : MF(&F), MI(I) {}
MachineInstrBuilder(MachineFunction &F, MachineBasicBlock::iterator I)
: MF(&F), MI(&*I) {}
/// Allow automatic conversion to the machine instruction we are working on.
operator MachineInstr*() const { return MI; }
MachineInstr *operator->() const { return MI; }
operator MachineBasicBlock::iterator() const { return MI; }
/// If conversion operators fail, use this method to get the MachineInstr
/// explicitly.
MachineInstr *getInstr() const { return MI; }
/// Get the register for the operand index.
/// The operand at the index should be a register (asserted by
/// MachineOperand).
Register getReg(unsigned Idx) const { return MI->getOperand(Idx).getReg(); }
/// Add a new virtual register operand.
const MachineInstrBuilder &addReg(Register RegNo, unsigned flags = 0,
unsigned SubReg = 0) const {
assert((flags & 0x1) == 0 &&
"Passing in 'true' to addReg is forbidden! Use enums instead.");
MI->addOperand(*MF, MachineOperand::CreateReg(RegNo,
flags & RegState::Define,
flags & RegState::Implicit,
flags & RegState::Kill,
flags & RegState::Dead,
flags & RegState::Undef,
flags & RegState::EarlyClobber,
SubReg,
flags & RegState::Debug,
flags & RegState::InternalRead,
flags & RegState::Renamable));
return *this;
}
/// Add a virtual register definition operand.
const MachineInstrBuilder &addDef(Register RegNo, unsigned Flags = 0,
unsigned SubReg = 0) const {
return addReg(RegNo, Flags | RegState::Define, SubReg);
}
/// Add a virtual register use operand. It is an error for Flags to contain
/// `RegState::Define` when calling this function.
const MachineInstrBuilder &addUse(Register RegNo, unsigned Flags = 0,
unsigned SubReg = 0) const {
assert(!(Flags & RegState::Define) &&
"Misleading addUse defines register, use addReg instead.");
return addReg(RegNo, Flags, SubReg);
}
/// Add a new immediate operand.
const MachineInstrBuilder &addImm(int64_t Val) const {
MI->addOperand(*MF, MachineOperand::CreateImm(Val));
return *this;
}
const MachineInstrBuilder &addCImm(const ConstantInt *Val) const {
MI->addOperand(*MF, MachineOperand::CreateCImm(Val));
return *this;
}
const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
MI->addOperand(*MF, MachineOperand::CreateFPImm(Val));
return *this;
}
const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
unsigned TargetFlags = 0) const {
MI->addOperand(*MF, MachineOperand::CreateMBB(MBB, TargetFlags));
return *this;
}
const MachineInstrBuilder &addFrameIndex(int Idx) const {
MI->addOperand(*MF, MachineOperand::CreateFI(Idx));
return *this;
}
const MachineInstrBuilder &
addConstantPoolIndex(unsigned Idx, int Offset = 0,
unsigned TargetFlags = 0) const {
MI->addOperand(*MF, MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
return *this;
}
const MachineInstrBuilder &addTargetIndex(unsigned Idx, int64_t Offset = 0,
unsigned TargetFlags = 0) const {
MI->addOperand(*MF, MachineOperand::CreateTargetIndex(Idx, Offset,
TargetFlags));
return *this;
}
const MachineInstrBuilder &addJumpTableIndex(unsigned Idx,
unsigned TargetFlags = 0) const {
MI->addOperand(*MF, MachineOperand::CreateJTI(Idx, TargetFlags));
return *this;
}
const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV,
int64_t Offset = 0,
unsigned TargetFlags = 0) const {
MI->addOperand(*MF, MachineOperand::CreateGA(GV, Offset, TargetFlags));
return *this;
}
const MachineInstrBuilder &addExternalSymbol(const char *FnName,
unsigned TargetFlags = 0) const {
MI->addOperand(*MF, MachineOperand::CreateES(FnName, TargetFlags));
return *this;
}
const MachineInstrBuilder &addBlockAddress(const BlockAddress *BA,
int64_t Offset = 0,
unsigned TargetFlags = 0) const {
MI->addOperand(*MF, MachineOperand::CreateBA(BA, Offset, TargetFlags));
return *this;
}
const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const {
MI->addOperand(*MF, MachineOperand::CreateRegMask(Mask));
return *this;
}
const MachineInstrBuilder &addMemOperand(MachineMemOperand *MMO) const {
MI->addMemOperand(*MF, MMO);
return *this;
}
const MachineInstrBuilder &
setMemRefs(ArrayRef<MachineMemOperand *> MMOs) const {
MI->setMemRefs(*MF, MMOs);
return *this;
}
const MachineInstrBuilder &cloneMemRefs(const MachineInstr &OtherMI) const {
MI->cloneMemRefs(*MF, OtherMI);
return *this;
}
const MachineInstrBuilder &
cloneMergedMemRefs(ArrayRef<const MachineInstr *> OtherMIs) const {
MI->cloneMergedMemRefs(*MF, OtherMIs);
return *this;
}
const MachineInstrBuilder &add(const MachineOperand &MO) const {
MI->addOperand(*MF, MO);
return *this;
}
const MachineInstrBuilder &add(ArrayRef<MachineOperand> MOs) const {
for (const MachineOperand &MO : MOs) {
MI->addOperand(*MF, MO);
}
return *this;
}
const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
MI->addOperand(*MF, MachineOperand::CreateMetadata(MD));
assert((MI->isDebugValueLike() ? static_cast<bool>(MI->getDebugVariable())
: true) &&
"first MDNode argument of a DBG_VALUE not a variable");
assert((MI->isDebugLabel() ? static_cast<bool>(MI->getDebugLabel())
: true) &&
"first MDNode argument of a DBG_LABEL not a label");
return *this;
}
const MachineInstrBuilder &addCFIIndex(unsigned CFIIndex) const {
MI->addOperand(*MF, MachineOperand::CreateCFIIndex(CFIIndex));
return *this;
}
const MachineInstrBuilder &addIntrinsicID(Intrinsic::ID ID) const {
MI->addOperand(*MF, MachineOperand::CreateIntrinsicID(ID));
return *this;
}
const MachineInstrBuilder &addPredicate(CmpInst::Predicate Pred) const {
MI->addOperand(*MF, MachineOperand::CreatePredicate(Pred));
return *this;
}
const MachineInstrBuilder &addShuffleMask(ArrayRef<int> Val) const {
MI->addOperand(*MF, MachineOperand::CreateShuffleMask(Val));
return *this;
}
const MachineInstrBuilder &addSym(MCSymbol *Sym,
unsigned char TargetFlags = 0) const {
MI->addOperand(*MF, MachineOperand::CreateMCSymbol(Sym, TargetFlags));
return *this;
}
const MachineInstrBuilder &setMIFlags(unsigned Flags) const {
MI->setFlags(Flags);
return *this;
}
const MachineInstrBuilder &setMIFlag(MachineInstr::MIFlag Flag) const {
MI->setFlag(Flag);
return *this;
}
// Add a displacement from an existing MachineOperand with an added offset.
const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off,
unsigned char TargetFlags = 0) const {
// If caller specifies new TargetFlags then use it, otherwise the
// default behavior is to copy the target flags from the existing
// MachineOperand. This means if the caller wants to clear the
// target flags it needs to do so explicitly.
if (0 == TargetFlags)
TargetFlags = Disp.getTargetFlags();
switch (Disp.getType()) {
default:
llvm_unreachable("Unhandled operand type in addDisp()");
case MachineOperand::MO_Immediate:
return addImm(Disp.getImm() + off);
case MachineOperand::MO_ConstantPoolIndex:
return addConstantPoolIndex(Disp.getIndex(), Disp.getOffset() + off,
TargetFlags);
case MachineOperand::MO_GlobalAddress:
return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
TargetFlags);
case MachineOperand::MO_BlockAddress:
return addBlockAddress(Disp.getBlockAddress(), Disp.getOffset() + off,
TargetFlags);
case MachineOperand::MO_JumpTableIndex:
assert(off == 0 && "cannot create offset into jump tables");
return addJumpTableIndex(Disp.getIndex(), TargetFlags);
}
}
const MachineInstrBuilder &setPCSections(MDNode *MD) const {
if (MD)
MI->setPCSections(*MF, MD);
return *this;
}
/// Copy all the implicit operands from OtherMI onto this one.
const MachineInstrBuilder &
copyImplicitOps(const MachineInstr &OtherMI) const {
MI->copyImplicitOps(*MF, OtherMI);
return *this;
}
bool constrainAllUses(const TargetInstrInfo &TII,
const TargetRegisterInfo &TRI,
const RegisterBankInfo &RBI) const {
return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI);
}
};
/// Set of metadata that should be preserved when using BuildMI(). This provides
/// a more convenient way of preserving DebugLoc and PCSections.
class MIMetadata {
public:
MIMetadata() = default;
MIMetadata(DebugLoc DL, MDNode *PCSections = nullptr)
: DL(std::move(DL)), PCSections(PCSections) {}
MIMetadata(const DILocation *DI, MDNode *PCSections = nullptr)
: DL(DI), PCSections(PCSections) {}
explicit MIMetadata(const Instruction &From)
: DL(From.getDebugLoc()),
PCSections(From.getMetadata(LLVMContext::MD_pcsections)) {}
explicit MIMetadata(const MachineInstr &From)
: DL(From.getDebugLoc()), PCSections(From.getPCSections()) {}
const DebugLoc &getDL() const { return DL; }
MDNode *getPCSections() const { return PCSections; }
private:
DebugLoc DL;
MDNode *PCSections = nullptr;
};
/// Builder interface. Specify how to create the initial instruction itself.
inline MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD,
const MCInstrDesc &MCID) {
return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, MIMD.getDL()))
.setPCSections(MIMD.getPCSections());
}
/// This version of the builder sets up the first operand as a
/// destination virtual register.
inline MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD,
const MCInstrDesc &MCID, Register DestReg) {
return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, MIMD.getDL()))
.setPCSections(MIMD.getPCSections())
.addReg(DestReg, RegState::Define);
}
/// This version of the builder inserts the newly-built instruction before
/// the given position in the given MachineBasicBlock, and sets up the first
/// operand as a destination virtual register.
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::iterator I,
const MIMetadata &MIMD,
const MCInstrDesc &MCID, Register DestReg) {
MachineFunction &MF = *BB.getParent();
MachineInstr *MI = MF.CreateMachineInstr(MCID, MIMD.getDL());
BB.insert(I, MI);
return MachineInstrBuilder(MF, MI)
.setPCSections(MIMD.getPCSections())
.addReg(DestReg, RegState::Define);
}
/// This version of the builder inserts the newly-built instruction before
/// the given position in the given MachineBasicBlock, and sets up the first
/// operand as a destination virtual register.
///
/// If \c I is inside a bundle, then the newly inserted \a MachineInstr is
/// added to the same bundle.
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::instr_iterator I,
const MIMetadata &MIMD,
const MCInstrDesc &MCID, Register DestReg) {
MachineFunction &MF = *BB.getParent();
MachineInstr *MI = MF.CreateMachineInstr(MCID, MIMD.getDL());
BB.insert(I, MI);
return MachineInstrBuilder(MF, MI)
.setPCSections(MIMD.getPCSections())
.addReg(DestReg, RegState::Define);
}
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr &I,
const MIMetadata &MIMD,
const MCInstrDesc &MCID, Register DestReg) {
// Calling the overload for instr_iterator is always correct. However, the
// definition is not available in headers, so inline the check.
if (I.isInsideBundle())
return BuildMI(BB, MachineBasicBlock::instr_iterator(I), MIMD, MCID,
DestReg);
return BuildMI(BB, MachineBasicBlock::iterator(I), MIMD, MCID, DestReg);
}
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr *I,
const MIMetadata &MIMD,
const MCInstrDesc &MCID, Register DestReg) {
return BuildMI(BB, *I, MIMD, MCID, DestReg);
}
/// This version of the builder inserts the newly-built instruction before the
/// given position in the given MachineBasicBlock, and does NOT take a
/// destination register.
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::iterator I,
const MIMetadata &MIMD,
const MCInstrDesc &MCID) {
MachineFunction &MF = *BB.getParent();
MachineInstr *MI = MF.CreateMachineInstr(MCID, MIMD.getDL());
BB.insert(I, MI);
return MachineInstrBuilder(MF, MI).setPCSections(MIMD.getPCSections());
}
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::instr_iterator I,
const MIMetadata &MIMD,
const MCInstrDesc &MCID) {
MachineFunction &MF = *BB.getParent();
MachineInstr *MI = MF.CreateMachineInstr(MCID, MIMD.getDL());
BB.insert(I, MI);
return MachineInstrBuilder(MF, MI).setPCSections(MIMD.getPCSections());
}
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr &I,
const MIMetadata &MIMD,
const MCInstrDesc &MCID) {
// Calling the overload for instr_iterator is always correct. However, the
// definition is not available in headers, so inline the check.
if (I.isInsideBundle())
return BuildMI(BB, MachineBasicBlock::instr_iterator(I), MIMD, MCID);
return BuildMI(BB, MachineBasicBlock::iterator(I), MIMD, MCID);
}
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB, MachineInstr *I,
const MIMetadata &MIMD,
const MCInstrDesc &MCID) {
return BuildMI(BB, *I, MIMD, MCID);
}
/// This version of the builder inserts the newly-built instruction at the end
/// of the given MachineBasicBlock, and does NOT take a destination register.
inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
const MIMetadata &MIMD,
const MCInstrDesc &MCID) {
return BuildMI(*BB, BB->end(), MIMD, MCID);
}
/// This version of the builder inserts the newly-built instruction at the
/// end of the given MachineBasicBlock, and sets up the first operand as a
/// destination virtual register.
inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
const MIMetadata &MIMD,
const MCInstrDesc &MCID, Register DestReg) {
return BuildMI(*BB, BB->end(), MIMD, MCID, DestReg);
}
/// This version of the builder builds a DBG_VALUE intrinsic
/// for either a value in a register or a register-indirect
/// address. The convention is that a DBG_VALUE is indirect iff the
/// second operand is an immediate.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
const MCInstrDesc &MCID, bool IsIndirect,
Register Reg, const MDNode *Variable,
const MDNode *Expr);
/// This version of the builder builds a DBG_VALUE or DBG_VALUE_LIST intrinsic
/// for a MachineOperand.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL,
const MCInstrDesc &MCID, bool IsIndirect,
ArrayRef<MachineOperand> MOs,
const MDNode *Variable, const MDNode *Expr);
/// This version of the builder builds a DBG_VALUE intrinsic
/// for either a value in a register or a register-indirect
/// address and inserts it at position I.
MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::iterator I, const DebugLoc &DL,
const MCInstrDesc &MCID, bool IsIndirect,
Register Reg, const MDNode *Variable,
const MDNode *Expr);
/// This version of the builder builds a DBG_VALUE, DBG_INSTR_REF, or
/// DBG_VALUE_LIST intrinsic for a machine operand and inserts it at position I.
MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::iterator I, const DebugLoc &DL,
const MCInstrDesc &MCID, bool IsIndirect,
ArrayRef<MachineOperand> MOs,
const MDNode *Variable, const MDNode *Expr);
/// Clone a DBG_VALUE whose value has been spilled to FrameIndex.
MachineInstr *buildDbgValueForSpill(MachineBasicBlock &BB,
MachineBasicBlock::iterator I,
const MachineInstr &Orig, int FrameIndex,
Register SpillReg);
MachineInstr *
buildDbgValueForSpill(MachineBasicBlock &BB, MachineBasicBlock::iterator I,
const MachineInstr &Orig, int FrameIndex,
SmallVectorImpl<const MachineOperand *> &SpilledOperands);
/// Update a DBG_VALUE whose value has been spilled to FrameIndex. Useful when
/// modifying an instruction in place while iterating over a basic block.
void updateDbgValueForSpill(MachineInstr &Orig, int FrameIndex, Register Reg);
inline unsigned getDefRegState(bool B) {
return B ? RegState::Define : 0;
}
inline unsigned getImplRegState(bool B) {
return B ? RegState::Implicit : 0;
}
inline unsigned getKillRegState(bool B) {
return B ? RegState::Kill : 0;
}
inline unsigned getDeadRegState(bool B) {
return B ? RegState::Dead : 0;
}
inline unsigned getUndefRegState(bool B) {
return B ? RegState::Undef : 0;
}
inline unsigned getInternalReadRegState(bool B) {
return B ? RegState::InternalRead : 0;
}
inline unsigned getDebugRegState(bool B) {
return B ? RegState::Debug : 0;
}
inline unsigned getRenamableRegState(bool B) {
return B ? RegState::Renamable : 0;
}
/// Get all register state flags from machine operand \p RegOp.
inline unsigned getRegState(const MachineOperand &RegOp) {
assert(RegOp.isReg() && "Not a register operand");
return getDefRegState(RegOp.isDef()) | getImplRegState(RegOp.isImplicit()) |
getKillRegState(RegOp.isKill()) | getDeadRegState(RegOp.isDead()) |
getUndefRegState(RegOp.isUndef()) |
getInternalReadRegState(RegOp.isInternalRead()) |
getDebugRegState(RegOp.isDebug()) |
getRenamableRegState(RegOp.getReg().isPhysical() &&
RegOp.isRenamable());
}
/// Helper class for constructing bundles of MachineInstrs.
///
/// MIBundleBuilder can create a bundle from scratch by inserting new
/// MachineInstrs one at a time, or it can create a bundle from a sequence of
/// existing MachineInstrs in a basic block.
class MIBundleBuilder {
MachineBasicBlock &MBB;
MachineBasicBlock::instr_iterator Begin;
MachineBasicBlock::instr_iterator End;
public:
/// Create an MIBundleBuilder that inserts instructions into a new bundle in
/// BB above the bundle or instruction at Pos.
MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator Pos)
: MBB(BB), Begin(Pos.getInstrIterator()), End(Begin) {}
/// Create a bundle from the sequence of instructions between B and E.
MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator B,
MachineBasicBlock::iterator E)
: MBB(BB), Begin(B.getInstrIterator()), End(E.getInstrIterator()) {
assert(B != E && "No instructions to bundle");
++B;
while (B != E) {
MachineInstr &MI = *B;
++B;
MI.bundleWithPred();
}
}
/// Create an MIBundleBuilder representing an existing instruction or bundle
/// that has MI as its head.
explicit MIBundleBuilder(MachineInstr *MI)
: MBB(*MI->getParent()), Begin(MI),
End(getBundleEnd(MI->getIterator())) {}
/// Return a reference to the basic block containing this bundle.
MachineBasicBlock &getMBB() const { return MBB; }
/// Return true if no instructions have been inserted in this bundle yet.
/// Empty bundles aren't representable in a MachineBasicBlock.
bool empty() const { return Begin == End; }
/// Return an iterator to the first bundled instruction.
MachineBasicBlock::instr_iterator begin() const { return Begin; }
/// Return an iterator beyond the last bundled instruction.
MachineBasicBlock::instr_iterator end() const { return End; }
/// Insert MI into this bundle before I which must point to an instruction in
/// the bundle, or end().
MIBundleBuilder &insert(MachineBasicBlock::instr_iterator I,
MachineInstr *MI) {
MBB.insert(I, MI);
if (I == Begin) {
if (!empty())
MI->bundleWithSucc();
Begin = MI->getIterator();
return *this;
}
if (I == End) {
MI->bundleWithPred();
return *this;
}
// MI was inserted in the middle of the bundle, so its neighbors' flags are
// already fine. Update MI's bundle flags manually.
MI->setFlag(MachineInstr::BundledPred);
MI->setFlag(MachineInstr::BundledSucc);
return *this;
}
/// Insert MI into MBB by prepending it to the instructions in the bundle.
/// MI will become the first instruction in the bundle.
MIBundleBuilder &prepend(MachineInstr *MI) {
return insert(begin(), MI);
}
/// Insert MI into MBB by appending it to the instructions in the bundle.
/// MI will become the last instruction in the bundle.
MIBundleBuilder &append(MachineInstr *MI) {
return insert(end(), MI);
}
};
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINEINSTRBUILDER_H
PK hwFZz�� � CodeGen/TailDuplicator.hnu �[��� //===- llvm/CodeGen/TailDuplicator.h ----------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the TailDuplicator class. Used by the
// TailDuplication pass, and MachineBlockPlacement.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_TAILDUPLICATOR_H
#define LLVM_CODEGEN_TAILDUPLICATOR_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include <utility>
#include <vector>
namespace llvm {
template <typename T, unsigned int N> class SmallSetVector;
template <typename Fn> class function_ref;
class MBFIWrapper;
class MachineBasicBlock;
class MachineBranchProbabilityInfo;
class MachineFunction;
class MachineInstr;
class MachineModuleInfo;
class MachineRegisterInfo;
class ProfileSummaryInfo;
class TargetRegisterInfo;
/// Utility class to perform tail duplication.
class TailDuplicator {
const TargetInstrInfo *TII;
const TargetRegisterInfo *TRI;
const MachineBranchProbabilityInfo *MBPI;
const MachineModuleInfo *MMI;
MachineRegisterInfo *MRI;
MachineFunction *MF;
MBFIWrapper *MBFI;
ProfileSummaryInfo *PSI;
bool PreRegAlloc;
bool LayoutMode;
unsigned TailDupSize;
// A list of virtual registers for which to update SSA form.
SmallVector<Register, 16> SSAUpdateVRs;
// For each virtual register in SSAUpdateVals keep a list of source virtual
// registers.
using AvailableValsTy = std::vector<std::pair<MachineBasicBlock *, Register>>;
DenseMap<Register, AvailableValsTy> SSAUpdateVals;
public:
/// Prepare to run on a specific machine function.
/// @param MF - Function that will be processed
/// @param PreRegAlloc - true if used before register allocation
/// @param MBPI - Branch Probability Info. Used to propagate correct
/// probabilities when modifying the CFG.
/// @param LayoutMode - When true, don't use the existing layout to make
/// decisions.
/// @param TailDupSize - Maxmimum size of blocks to tail-duplicate. Zero
/// default implies using the command line value TailDupSize.
void initMF(MachineFunction &MF, bool PreRegAlloc,
const MachineBranchProbabilityInfo *MBPI,
MBFIWrapper *MBFI,
ProfileSummaryInfo *PSI,
bool LayoutMode, unsigned TailDupSize = 0);
bool tailDuplicateBlocks();
static bool isSimpleBB(MachineBasicBlock *TailBB);
bool shouldTailDuplicate(bool IsSimple, MachineBasicBlock &TailBB);
/// Returns true if TailBB can successfully be duplicated into PredBB
bool canTailDuplicate(MachineBasicBlock *TailBB, MachineBasicBlock *PredBB);
/// Tail duplicate a single basic block into its predecessors, and then clean
/// up.
/// If \p DuplicatePreds is not null, it will be updated to contain the list
/// of predecessors that received a copy of \p MBB.
/// If \p RemovalCallback is non-null. It will be called before MBB is
/// deleted.
/// If \p CandidatePtr is not null, duplicate into these blocks only.
bool tailDuplicateAndUpdate(
bool IsSimple, MachineBasicBlock *MBB,
MachineBasicBlock *ForcedLayoutPred,
SmallVectorImpl<MachineBasicBlock*> *DuplicatedPreds = nullptr,
function_ref<void(MachineBasicBlock *)> *RemovalCallback = nullptr,
SmallVectorImpl<MachineBasicBlock *> *CandidatePtr = nullptr);
private:
using RegSubRegPair = TargetInstrInfo::RegSubRegPair;
void addSSAUpdateEntry(Register OrigReg, Register NewReg,
MachineBasicBlock *BB);
void processPHI(MachineInstr *MI, MachineBasicBlock *TailBB,
MachineBasicBlock *PredBB,
DenseMap<Register, RegSubRegPair> &LocalVRMap,
SmallVectorImpl<std::pair<Register, RegSubRegPair>> &Copies,
const DenseSet<Register> &UsedByPhi, bool Remove);
void duplicateInstruction(MachineInstr *MI, MachineBasicBlock *TailBB,
MachineBasicBlock *PredBB,
DenseMap<Register, RegSubRegPair> &LocalVRMap,
const DenseSet<Register> &UsedByPhi);
void updateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead,
SmallVectorImpl<MachineBasicBlock *> &TDBBs,
SmallSetVector<MachineBasicBlock *, 8> &Succs);
bool canCompletelyDuplicateBB(MachineBasicBlock &BB);
bool duplicateSimpleBB(MachineBasicBlock *TailBB,
SmallVectorImpl<MachineBasicBlock *> &TDBBs,
const DenseSet<Register> &RegsUsedByPhi);
bool tailDuplicate(bool IsSimple,
MachineBasicBlock *TailBB,
MachineBasicBlock *ForcedLayoutPred,
SmallVectorImpl<MachineBasicBlock *> &TDBBs,
SmallVectorImpl<MachineInstr *> &Copies,
SmallVectorImpl<MachineBasicBlock *> *CandidatePtr);
void appendCopies(MachineBasicBlock *MBB,
SmallVectorImpl<std::pair<Register, RegSubRegPair>> &CopyInfos,
SmallVectorImpl<MachineInstr *> &Copies);
void removeDeadBlock(
MachineBasicBlock *MBB,
function_ref<void(MachineBasicBlock *)> *RemovalCallback = nullptr);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_TAILDUPLICATOR_H
PK hwFZj� � � CodeGen/MBFIWrapper.hnu �[��� //===- llvm/CodeGen/MBFIWrapper.h -------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This class keeps track of branch frequencies of newly created blocks and
// tail-merged blocks. Used by the TailDuplication and MachineBlockPlacement.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MBFIWRAPPER_H
#define LLVM_CODEGEN_MBFIWRAPPER_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/Support/BlockFrequency.h"
#include "llvm/Support/raw_ostream.h"
#include <optional>
namespace llvm {
class MachineBasicBlock;
class MachineBlockFrequencyInfo;
class MBFIWrapper {
public:
MBFIWrapper(const MachineBlockFrequencyInfo &I) : MBFI(I) {}
BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const;
void setBlockFreq(const MachineBasicBlock *MBB, BlockFrequency F);
std::optional<uint64_t>
getBlockProfileCount(const MachineBasicBlock *MBB) const;
raw_ostream &printBlockFreq(raw_ostream &OS,
const MachineBasicBlock *MBB) const;
raw_ostream &printBlockFreq(raw_ostream &OS,
const BlockFrequency Freq) const;
void view(const Twine &Name, bool isSimple = true);
uint64_t getEntryFreq() const;
const MachineBlockFrequencyInfo &getMBFI() { return MBFI; }
private:
const MachineBlockFrequencyInfo &MBFI;
DenseMap<const MachineBasicBlock *, BlockFrequency> MergedBBFreq;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_MBFIWRAPPER_H
PK hwFZ�B�v�N �N CodeGen/TargetFrameLowering.hnu �[��� //===-- llvm/CodeGen/TargetFrameLowering.h ----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Interface to describe the layout of a stack frame on the target machine.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_TARGETFRAMELOWERING_H
#define LLVM_CODEGEN_TARGETFRAMELOWERING_H
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/Support/TypeSize.h"
#include <vector>
namespace llvm {
class BitVector;
class CalleeSavedInfo;
class MachineFunction;
class RegScavenger;
namespace TargetStackID {
enum Value {
Default = 0,
SGPRSpill = 1,
ScalableVector = 2,
WasmLocal = 3,
NoAlloc = 255
};
}
/// Information about stack frame layout on the target. It holds the direction
/// of stack growth, the known stack alignment on entry to each function, and
/// the offset to the locals area.
///
/// The offset to the local area is the offset from the stack pointer on
/// function entry to the first location where function data (local variables,
/// spill locations) can be stored.
class TargetFrameLowering {
public:
enum StackDirection {
StackGrowsUp, // Adding to the stack increases the stack address
StackGrowsDown // Adding to the stack decreases the stack address
};
// Maps a callee saved register to a stack slot with a fixed offset.
struct SpillSlot {
unsigned Reg;
int Offset; // Offset relative to stack pointer on function entry.
};
struct DwarfFrameBase {
// The frame base may be either a register (the default), the CFA with an
// offset, or a WebAssembly-specific location description.
enum FrameBaseKind { Register, CFA, WasmFrameBase } Kind;
struct WasmFrameBase {
unsigned Kind; // Wasm local, global, or value stack
unsigned Index;
};
union {
// Used with FrameBaseKind::Register.
unsigned Reg;
// Used with FrameBaseKind::CFA.
int Offset;
struct WasmFrameBase WasmLoc;
} Location;
};
private:
StackDirection StackDir;
Align StackAlignment;
Align TransientStackAlignment;
int LocalAreaOffset;
bool StackRealignable;
public:
TargetFrameLowering(StackDirection D, Align StackAl, int LAO,
Align TransAl = Align(1), bool StackReal = true)
: StackDir(D), StackAlignment(StackAl), TransientStackAlignment(TransAl),
LocalAreaOffset(LAO), StackRealignable(StackReal) {}
virtual ~TargetFrameLowering();
// These methods return information that describes the abstract stack layout
// of the target machine.
/// getStackGrowthDirection - Return the direction the stack grows
///
StackDirection getStackGrowthDirection() const { return StackDir; }
/// getStackAlignment - This method returns the number of bytes to which the
/// stack pointer must be aligned on entry to a function. Typically, this
/// is the largest alignment for any data object in the target.
///
unsigned getStackAlignment() const { return StackAlignment.value(); }
/// getStackAlignment - This method returns the number of bytes to which the
/// stack pointer must be aligned on entry to a function. Typically, this
/// is the largest alignment for any data object in the target.
///
Align getStackAlign() const { return StackAlignment; }
/// alignSPAdjust - This method aligns the stack adjustment to the correct
/// alignment.
///
int alignSPAdjust(int SPAdj) const {
if (SPAdj < 0) {
SPAdj = -alignTo(-SPAdj, StackAlignment);
} else {
SPAdj = alignTo(SPAdj, StackAlignment);
}
return SPAdj;
}
/// getTransientStackAlignment - This method returns the number of bytes to
/// which the stack pointer must be aligned at all times, even between
/// calls.
///
Align getTransientStackAlign() const { return TransientStackAlignment; }
/// isStackRealignable - This method returns whether the stack can be
/// realigned.
bool isStackRealignable() const {
return StackRealignable;
}
/// This method returns whether or not it is safe for an object with the
/// given stack id to be bundled into the local area.
virtual bool isStackIdSafeForLocalArea(unsigned StackId) const {
return true;
}
/// getOffsetOfLocalArea - This method returns the offset of the local area
/// from the stack pointer on entrance to a function.
///
int getOffsetOfLocalArea() const { return LocalAreaOffset; }
/// Control the placement of special register scavenging spill slots when
/// allocating a stack frame.
///
/// If this returns true, the frame indexes used by the RegScavenger will be
/// allocated closest to the incoming stack pointer.
virtual bool allocateScavengingFrameIndexesNearIncomingSP(
const MachineFunction &MF) const;
/// assignCalleeSavedSpillSlots - Allows target to override spill slot
/// assignment logic. If implemented, assignCalleeSavedSpillSlots() should
/// assign frame slots to all CSI entries and return true. If this method
/// returns false, spill slots will be assigned using generic implementation.
/// assignCalleeSavedSpillSlots() may add, delete or rearrange elements of
/// CSI.
virtual bool assignCalleeSavedSpillSlots(MachineFunction &MF,
const TargetRegisterInfo *TRI,
std::vector<CalleeSavedInfo> &CSI,
unsigned &MinCSFrameIndex,
unsigned &MaxCSFrameIndex) const {
return assignCalleeSavedSpillSlots(MF, TRI, CSI);
}
virtual bool
assignCalleeSavedSpillSlots(MachineFunction &MF,
const TargetRegisterInfo *TRI,
std::vector<CalleeSavedInfo> &CSI) const {
return false;
}
/// getCalleeSavedSpillSlots - This method returns a pointer to an array of
/// pairs, that contains an entry for each callee saved register that must be
/// spilled to a particular stack location if it is spilled.
///
/// Each entry in this array contains a <register,offset> pair, indicating the
/// fixed offset from the incoming stack pointer that each register should be
/// spilled at. If a register is not listed here, the code generator is
/// allowed to spill it anywhere it chooses.
///
virtual const SpillSlot *
getCalleeSavedSpillSlots(unsigned &NumEntries) const {
NumEntries = 0;
return nullptr;
}
/// targetHandlesStackFrameRounding - Returns true if the target is
/// responsible for rounding up the stack frame (probably at emitPrologue
/// time).
virtual bool targetHandlesStackFrameRounding() const {
return false;
}
/// Returns true if the target will correctly handle shrink wrapping.
virtual bool enableShrinkWrapping(const MachineFunction &MF) const {
return false;
}
/// Returns true if the stack slot holes in the fixed and callee-save stack
/// area should be used when allocating other stack locations to reduce stack
/// size.
virtual bool enableStackSlotScavenging(const MachineFunction &MF) const {
return false;
}
/// Returns true if the target can safely skip saving callee-saved registers
/// for noreturn nounwind functions.
virtual bool enableCalleeSaveSkip(const MachineFunction &MF) const;
/// emitProlog/emitEpilog - These methods insert prolog and epilog code into
/// the function.
virtual void emitPrologue(MachineFunction &MF,
MachineBasicBlock &MBB) const = 0;
virtual void emitEpilogue(MachineFunction &MF,
MachineBasicBlock &MBB) const = 0;
/// emitZeroCallUsedRegs - Zeros out call used registers.
virtual void emitZeroCallUsedRegs(BitVector RegsToZero,
MachineBasicBlock &MBB) const {}
/// With basic block sections, emit callee saved frame moves for basic blocks
/// that are in a different section.
virtual void
emitCalleeSavedFrameMovesFullCFA(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI) const {}
/// Returns true if we may need to fix the unwind information for the
/// function.
virtual bool enableCFIFixup(MachineFunction &MF) const;
/// Emit CFI instructions that recreate the state of the unwind information
/// upon fucntion entry.
virtual void resetCFIToInitialState(MachineBasicBlock &MBB) const {}
/// Replace a StackProbe stub (if any) with the actual probe code inline
virtual void inlineStackProbe(MachineFunction &MF,
MachineBasicBlock &PrologueMBB) const {}
/// Does the stack probe function call return with a modified stack pointer?
virtual bool stackProbeFunctionModifiesSP() const { return false; }
/// Adjust the prologue to have the function use segmented stacks. This works
/// by adding a check even before the "normal" function prologue.
virtual void adjustForSegmentedStacks(MachineFunction &MF,
MachineBasicBlock &PrologueMBB) const {}
/// Adjust the prologue to add Erlang Run-Time System (ERTS) specific code in
/// the assembly prologue to explicitly handle the stack.
virtual void adjustForHiPEPrologue(MachineFunction &MF,
MachineBasicBlock &PrologueMBB) const {}
/// spillCalleeSavedRegisters - Issues instruction(s) to spill all callee
/// saved registers and returns true if it isn't possible / profitable to do
/// so by issuing a series of store instructions via
/// storeRegToStackSlot(). Returns false otherwise.
virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
ArrayRef<CalleeSavedInfo> CSI,
const TargetRegisterInfo *TRI) const {
return false;
}
/// restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee
/// saved registers and returns true if it isn't possible / profitable to do
/// so by issuing a series of load instructions via loadRegToStackSlot().
/// If it returns true, and any of the registers in CSI is not restored,
/// it sets the corresponding Restored flag in CSI to false.
/// Returns false otherwise.
virtual bool
restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
MutableArrayRef<CalleeSavedInfo> CSI,
const TargetRegisterInfo *TRI) const {
return false;
}
/// Return true if the target wants to keep the frame pointer regardless of
/// the function attribute "frame-pointer".
virtual bool keepFramePointer(const MachineFunction &MF) const {
return false;
}
/// hasFP - Return true if the specified function should have a dedicated
/// frame pointer register. For most targets this is true only if the function
/// has variable sized allocas or if frame pointer elimination is disabled.
virtual bool hasFP(const MachineFunction &MF) const = 0;
/// hasReservedCallFrame - Under normal circumstances, when a frame pointer is
/// not required, we reserve argument space for call sites in the function
/// immediately on entry to the current function. This eliminates the need for
/// add/sub sp brackets around call sites. Returns true if the call frame is
/// included as part of the stack frame.
virtual bool hasReservedCallFrame(const MachineFunction &MF) const {
return !hasFP(MF);
}
/// canSimplifyCallFramePseudos - When possible, it's best to simplify the
/// call frame pseudo ops before doing frame index elimination. This is
/// possible only when frame index references between the pseudos won't
/// need adjusting for the call frame adjustments. Normally, that's true
/// if the function has a reserved call frame or a frame pointer. Some
/// targets (Thumb2, for example) may have more complicated criteria,
/// however, and can override this behavior.
virtual bool canSimplifyCallFramePseudos(const MachineFunction &MF) const {
return hasReservedCallFrame(MF) || hasFP(MF);
}
// needsFrameIndexResolution - Do we need to perform FI resolution for
// this function. Normally, this is required only when the function
// has any stack objects. However, targets may want to override this.
virtual bool needsFrameIndexResolution(const MachineFunction &MF) const;
/// getFrameIndexReference - This method should return the base register
/// and offset used to reference a frame index location. The offset is
/// returned directly, and the base register is returned via FrameReg.
virtual StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
Register &FrameReg) const;
/// Same as \c getFrameIndexReference, except that the stack pointer (as
/// opposed to the frame pointer) will be the preferred value for \p
/// FrameReg. This is generally used for emitting statepoint or EH tables that
/// use offsets from RSP. If \p IgnoreSPUpdates is true, the returned
/// offset is only guaranteed to be valid with respect to the value of SP at
/// the end of the prologue.
virtual StackOffset
getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI,
Register &FrameReg,
bool IgnoreSPUpdates) const {
// Always safe to dispatch to getFrameIndexReference.
return getFrameIndexReference(MF, FI, FrameReg);
}
/// getNonLocalFrameIndexReference - This method returns the offset used to
/// reference a frame index location. The offset can be from either FP/BP/SP
/// based on which base register is returned by llvm.localaddress.
virtual StackOffset getNonLocalFrameIndexReference(const MachineFunction &MF,
int FI) const {
// By default, dispatch to getFrameIndexReference. Interested targets can
// override this.
Register FrameReg;
return getFrameIndexReference(MF, FI, FrameReg);
}
/// Returns the callee-saved registers as computed by determineCalleeSaves
/// in the BitVector \p SavedRegs.
virtual void getCalleeSaves(const MachineFunction &MF,
BitVector &SavedRegs) const;
/// This method determines which of the registers reported by
/// TargetRegisterInfo::getCalleeSavedRegs() should actually get saved.
/// The default implementation checks populates the \p SavedRegs bitset with
/// all registers which are modified in the function, targets may override
/// this function to save additional registers.
/// This method also sets up the register scavenger ensuring there is a free
/// register or a frameindex available.
/// This method should not be called by any passes outside of PEI, because
/// it may change state passed in by \p MF and \p RS. The preferred
/// interface outside PEI is getCalleeSaves.
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
RegScavenger *RS = nullptr) const;
/// processFunctionBeforeFrameFinalized - This method is called immediately
/// before the specified function's frame layout (MF.getFrameInfo()) is
/// finalized. Once the frame is finalized, MO_FrameIndex operands are
/// replaced with direct constants. This method is optional.
///
virtual void processFunctionBeforeFrameFinalized(MachineFunction &MF,
RegScavenger *RS = nullptr) const {
}
/// processFunctionBeforeFrameIndicesReplaced - This method is called
/// immediately before MO_FrameIndex operands are eliminated, but after the
/// frame is finalized. This method is optional.
virtual void
processFunctionBeforeFrameIndicesReplaced(MachineFunction &MF,
RegScavenger *RS = nullptr) const {}
virtual unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const {
report_fatal_error("WinEH not implemented for this target");
}
/// This method is called during prolog/epilog code insertion to eliminate
/// call frame setup and destroy pseudo instructions (but only if the Target
/// is using them). It is responsible for eliminating these instructions,
/// replacing them with concrete instructions. This method need only be
/// implemented if using call frame setup/destroy pseudo instructions.
/// Returns an iterator pointing to the instruction after the replaced one.
virtual MachineBasicBlock::iterator
eliminateCallFramePseudoInstr(MachineFunction &MF,
MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI) const {
llvm_unreachable("Call Frame Pseudo Instructions do not exist on this "
"target!");
}
/// Order the symbols in the local stack frame.
/// The list of objects that we want to order is in \p objectsToAllocate as
/// indices into the MachineFrameInfo. The array can be reordered in any way
/// upon return. The contents of the array, however, may not be modified (i.e.
/// only their order may be changed).
/// By default, just maintain the original order.
virtual void
orderFrameObjects(const MachineFunction &MF,
SmallVectorImpl<int> &objectsToAllocate) const {
}
/// Check whether or not the given \p MBB can be used as a prologue
/// for the target.
/// The prologue will be inserted first in this basic block.
/// This method is used by the shrink-wrapping pass to decide if
/// \p MBB will be correctly handled by the target.
/// As soon as the target enable shrink-wrapping without overriding
/// this method, we assume that each basic block is a valid
/// prologue.
virtual bool canUseAsPrologue(const MachineBasicBlock &MBB) const {
return true;
}
/// Check whether or not the given \p MBB can be used as a epilogue
/// for the target.
/// The epilogue will be inserted before the first terminator of that block.
/// This method is used by the shrink-wrapping pass to decide if
/// \p MBB will be correctly handled by the target.
/// As soon as the target enable shrink-wrapping without overriding
/// this method, we assume that each basic block is a valid
/// epilogue.
virtual bool canUseAsEpilogue(const MachineBasicBlock &MBB) const {
return true;
}
/// Returns the StackID that scalable vectors should be associated with.
virtual TargetStackID::Value getStackIDForScalableVectors() const {
return TargetStackID::Default;
}
virtual bool isSupportedStackID(TargetStackID::Value ID) const {
switch (ID) {
default:
return false;
case TargetStackID::Default:
case TargetStackID::NoAlloc:
return true;
}
}
/// Check if given function is safe for not having callee saved registers.
/// This is used when interprocedural register allocation is enabled.
static bool isSafeForNoCSROpt(const Function &F);
/// Check if the no-CSR optimisation is profitable for the given function.
virtual bool isProfitableForNoCSROpt(const Function &F) const {
return true;
}
/// Return initial CFA offset value i.e. the one valid at the beginning of the
/// function (before any stack operations).
virtual int getInitialCFAOffset(const MachineFunction &MF) const;
/// Return initial CFA register value i.e. the one valid at the beginning of
/// the function (before any stack operations).
virtual Register getInitialCFARegister(const MachineFunction &MF) const;
/// Return the frame base information to be encoded in the DWARF subprogram
/// debug info.
virtual DwarfFrameBase getDwarfFrameBase(const MachineFunction &MF) const;
};
} // End llvm namespace
#endif
PK hwFZ��Le+ + CodeGen/ScheduleDFS.hnu �[��� //===- ScheduleDFS.h - ILP metric for ScheduleDAGInstrs ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Definition of an ILP metric for machine level instruction scheduling.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_SCHEDULEDFS_H
#define LLVM_CODEGEN_SCHEDULEDFS_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include <cassert>
#include <cstdint>
#include <vector>
namespace llvm {
template <typename T> class ArrayRef;
class raw_ostream;
/// Represent the ILP of the subDAG rooted at a DAG node.
///
/// ILPValues summarize the DAG subtree rooted at each node. ILPValues are
/// valid for all nodes regardless of their subtree membership.
///
/// When computed using bottom-up DFS, this metric assumes that the DAG is a
/// forest of trees with roots at the bottom of the schedule branching upward.
struct ILPValue {
unsigned InstrCount;
/// Length may either correspond to depth or height, depending on direction,
/// and cycles or nodes depending on context.
unsigned Length;
ILPValue(unsigned count, unsigned length):
InstrCount(count), Length(length) {}
// Order by the ILP metric's value.
bool operator<(ILPValue RHS) const {
return (uint64_t)InstrCount * RHS.Length
< (uint64_t)Length * RHS.InstrCount;
}
bool operator>(ILPValue RHS) const {
return RHS < *this;
}
bool operator<=(ILPValue RHS) const {
return (uint64_t)InstrCount * RHS.Length
<= (uint64_t)Length * RHS.InstrCount;
}
bool operator>=(ILPValue RHS) const {
return RHS <= *this;
}
void print(raw_ostream &OS) const;
void dump() const;
};
/// Compute the values of each DAG node for various metrics during DFS.
class SchedDFSResult {
friend class SchedDFSImpl;
static const unsigned InvalidSubtreeID = ~0u;
/// Per-SUnit data computed during DFS for various metrics.
///
/// A node's SubtreeID is set to itself when it is visited to indicate that it
/// is the root of a subtree. Later it is set to its parent to indicate an
/// interior node. Finally, it is set to a representative subtree ID during
/// finalization.
struct NodeData {
unsigned InstrCount = 0;
unsigned SubtreeID = InvalidSubtreeID;
NodeData() = default;
};
/// Per-Subtree data computed during DFS.
struct TreeData {
unsigned ParentTreeID = InvalidSubtreeID;
unsigned SubInstrCount = 0;
TreeData() = default;
};
/// Record a connection between subtrees and the connection level.
struct Connection {
unsigned TreeID;
unsigned Level;
Connection(unsigned tree, unsigned level): TreeID(tree), Level(level) {}
};
bool IsBottomUp;
unsigned SubtreeLimit;
/// DFS results for each SUnit in this DAG.
std::vector<NodeData> DFSNodeData;
// Store per-tree data indexed on tree ID,
SmallVector<TreeData, 16> DFSTreeData;
// For each subtree discovered during DFS, record its connections to other
// subtrees.
std::vector<SmallVector<Connection, 4>> SubtreeConnections;
/// Cache the current connection level of each subtree.
/// This mutable array is updated during scheduling.
std::vector<unsigned> SubtreeConnectLevels;
public:
SchedDFSResult(bool IsBU, unsigned lim)
: IsBottomUp(IsBU), SubtreeLimit(lim) {}
/// Get the node cutoff before subtrees are considered significant.
unsigned getSubtreeLimit() const { return SubtreeLimit; }
/// Return true if this DFSResult is uninitialized.
///
/// resize() initializes DFSResult, while compute() populates it.
bool empty() const { return DFSNodeData.empty(); }
/// Clear the results.
void clear() {
DFSNodeData.clear();
DFSTreeData.clear();
SubtreeConnections.clear();
SubtreeConnectLevels.clear();
}
/// Initialize the result data with the size of the DAG.
void resize(unsigned NumSUnits) {
DFSNodeData.resize(NumSUnits);
}
/// Compute various metrics for the DAG with given roots.
void compute(ArrayRef<SUnit> SUnits);
/// Get the number of instructions in the given subtree and its
/// children.
unsigned getNumInstrs(const SUnit *SU) const {
return DFSNodeData[SU->NodeNum].InstrCount;
}
/// Get the number of instructions in the given subtree not including
/// children.
unsigned getNumSubInstrs(unsigned SubtreeID) const {
return DFSTreeData[SubtreeID].SubInstrCount;
}
/// Get the ILP value for a DAG node.
///
/// A leaf node has an ILP of 1/1.
ILPValue getILP(const SUnit *SU) const {
return ILPValue(DFSNodeData[SU->NodeNum].InstrCount, 1 + SU->getDepth());
}
/// The number of subtrees detected in this DAG.
unsigned getNumSubtrees() const { return SubtreeConnectLevels.size(); }
/// Get the ID of the subtree the given DAG node belongs to.
///
/// For convenience, if DFSResults have not been computed yet, give everything
/// tree ID 0.
unsigned getSubtreeID(const SUnit *SU) const {
if (empty())
return 0;
assert(SU->NodeNum < DFSNodeData.size() && "New Node");
return DFSNodeData[SU->NodeNum].SubtreeID;
}
/// Get the connection level of a subtree.
///
/// For bottom-up trees, the connection level is the latency depth (in cycles)
/// of the deepest connection to another subtree.
unsigned getSubtreeLevel(unsigned SubtreeID) const {
return SubtreeConnectLevels[SubtreeID];
}
/// Scheduler callback to update SubtreeConnectLevels when a tree is
/// initially scheduled.
void scheduleTree(unsigned SubtreeID);
};
raw_ostream &operator<<(raw_ostream &OS, const ILPValue &Val);
} // end namespace llvm
#endif // LLVM_CODEGEN_SCHEDULEDFS_H
PK hwFZ�+��B �B CodeGen/RegAllocPBQP.hnu �[��� //===- RegAllocPBQP.h -------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the PBQPBuilder interface, for classes which build PBQP
// instances to represent register allocation problems, and the RegAllocPBQP
// interface.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_REGALLOCPBQP_H
#define LLVM_CODEGEN_REGALLOCPBQP_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/Hashing.h"
#include "llvm/CodeGen/PBQP/CostAllocator.h"
#include "llvm/CodeGen/PBQP/Graph.h"
#include "llvm/CodeGen/PBQP/Math.h"
#include "llvm/CodeGen/PBQP/ReductionRules.h"
#include "llvm/CodeGen/PBQP/Solution.h"
#include "llvm/CodeGen/Register.h"
#include "llvm/MC/MCRegister.h"
#include "llvm/Support/ErrorHandling.h"
#include <algorithm>
#include <cassert>
#include <cstddef>
#include <limits>
#include <memory>
#include <set>
#include <vector>
namespace llvm {
class FunctionPass;
class LiveIntervals;
class MachineBlockFrequencyInfo;
class MachineFunction;
class raw_ostream;
namespace PBQP {
namespace RegAlloc {
/// Spill option index.
inline unsigned getSpillOptionIdx() { return 0; }
/// Metadata to speed allocatability test.
///
/// Keeps track of the number of infinities in each row and column.
class MatrixMetadata {
public:
MatrixMetadata(const Matrix& M)
: UnsafeRows(new bool[M.getRows() - 1]()),
UnsafeCols(new bool[M.getCols() - 1]()) {
unsigned* ColCounts = new unsigned[M.getCols() - 1]();
for (unsigned i = 1; i < M.getRows(); ++i) {
unsigned RowCount = 0;
for (unsigned j = 1; j < M.getCols(); ++j) {
if (M[i][j] == std::numeric_limits<PBQPNum>::infinity()) {
++RowCount;
++ColCounts[j - 1];
UnsafeRows[i - 1] = true;
UnsafeCols[j - 1] = true;
}
}
WorstRow = std::max(WorstRow, RowCount);
}
unsigned WorstColCountForCurRow =
*std::max_element(ColCounts, ColCounts + M.getCols() - 1);
WorstCol = std::max(WorstCol, WorstColCountForCurRow);
delete[] ColCounts;
}
MatrixMetadata(const MatrixMetadata &) = delete;
MatrixMetadata &operator=(const MatrixMetadata &) = delete;
unsigned getWorstRow() const { return WorstRow; }
unsigned getWorstCol() const { return WorstCol; }
const bool* getUnsafeRows() const { return UnsafeRows.get(); }
const bool* getUnsafeCols() const { return UnsafeCols.get(); }
private:
unsigned WorstRow = 0;
unsigned WorstCol = 0;
std::unique_ptr<bool[]> UnsafeRows;
std::unique_ptr<bool[]> UnsafeCols;
};
/// Holds a vector of the allowed physical regs for a vreg.
class AllowedRegVector {
friend hash_code hash_value(const AllowedRegVector &);
public:
AllowedRegVector() = default;
AllowedRegVector(AllowedRegVector &&) = default;
AllowedRegVector(const std::vector<MCRegister> &OptVec)
: NumOpts(OptVec.size()), Opts(new MCRegister[NumOpts]) {
std::copy(OptVec.begin(), OptVec.end(), Opts.get());
}
unsigned size() const { return NumOpts; }
MCRegister operator[](size_t I) const { return Opts[I]; }
bool operator==(const AllowedRegVector &Other) const {
if (NumOpts != Other.NumOpts)
return false;
return std::equal(Opts.get(), Opts.get() + NumOpts, Other.Opts.get());
}
bool operator!=(const AllowedRegVector &Other) const {
return !(*this == Other);
}
private:
unsigned NumOpts = 0;
std::unique_ptr<MCRegister[]> Opts;
};
inline hash_code hash_value(const AllowedRegVector &OptRegs) {
MCRegister *OStart = OptRegs.Opts.get();
MCRegister *OEnd = OptRegs.Opts.get() + OptRegs.NumOpts;
return hash_combine(OptRegs.NumOpts,
hash_combine_range(OStart, OEnd));
}
/// Holds graph-level metadata relevant to PBQP RA problems.
class GraphMetadata {
private:
using AllowedRegVecPool = ValuePool<AllowedRegVector>;
public:
using AllowedRegVecRef = AllowedRegVecPool::PoolRef;
GraphMetadata(MachineFunction &MF,
LiveIntervals &LIS,
MachineBlockFrequencyInfo &MBFI)
: MF(MF), LIS(LIS), MBFI(MBFI) {}
MachineFunction &MF;
LiveIntervals &LIS;
MachineBlockFrequencyInfo &MBFI;
void setNodeIdForVReg(Register VReg, GraphBase::NodeId NId) {
VRegToNodeId[VReg.id()] = NId;
}
GraphBase::NodeId getNodeIdForVReg(Register VReg) const {
auto VRegItr = VRegToNodeId.find(VReg);
if (VRegItr == VRegToNodeId.end())
return GraphBase::invalidNodeId();
return VRegItr->second;
}
AllowedRegVecRef getAllowedRegs(AllowedRegVector Allowed) {
return AllowedRegVecs.getValue(std::move(Allowed));
}
private:
DenseMap<Register, GraphBase::NodeId> VRegToNodeId;
AllowedRegVecPool AllowedRegVecs;
};
/// Holds solver state and other metadata relevant to each PBQP RA node.
class NodeMetadata {
public:
using AllowedRegVector = RegAlloc::AllowedRegVector;
// The node's reduction state. The order in this enum is important,
// as it is assumed nodes can only progress up (i.e. towards being
// optimally reducible) when reducing the graph.
using ReductionState = enum {
Unprocessed,
NotProvablyAllocatable,
ConservativelyAllocatable,
OptimallyReducible
};
NodeMetadata() = default;
NodeMetadata(const NodeMetadata &Other)
: RS(Other.RS), NumOpts(Other.NumOpts), DeniedOpts(Other.DeniedOpts),
OptUnsafeEdges(new unsigned[NumOpts]), VReg(Other.VReg),
AllowedRegs(Other.AllowedRegs)
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
,
everConservativelyAllocatable(Other.everConservativelyAllocatable)
#endif
{
if (NumOpts > 0) {
std::copy(&Other.OptUnsafeEdges[0], &Other.OptUnsafeEdges[NumOpts],
&OptUnsafeEdges[0]);
}
}
NodeMetadata(NodeMetadata &&) = default;
NodeMetadata& operator=(NodeMetadata &&) = default;
void setVReg(Register VReg) { this->VReg = VReg; }
Register getVReg() const { return VReg; }
void setAllowedRegs(GraphMetadata::AllowedRegVecRef AllowedRegs) {
this->AllowedRegs = std::move(AllowedRegs);
}
const AllowedRegVector& getAllowedRegs() const { return *AllowedRegs; }
void setup(const Vector& Costs) {
NumOpts = Costs.getLength() - 1;
OptUnsafeEdges = std::unique_ptr<unsigned[]>(new unsigned[NumOpts]());
}
ReductionState getReductionState() const { return RS; }
void setReductionState(ReductionState RS) {
assert(RS >= this->RS && "A node's reduction state can not be downgraded");
this->RS = RS;
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
// Remember this state to assert later that a non-infinite register
// option was available.
if (RS == ConservativelyAllocatable)
everConservativelyAllocatable = true;
#endif
}
void handleAddEdge(const MatrixMetadata& MD, bool Transpose) {
DeniedOpts += Transpose ? MD.getWorstRow() : MD.getWorstCol();
const bool* UnsafeOpts =
Transpose ? MD.getUnsafeCols() : MD.getUnsafeRows();
for (unsigned i = 0; i < NumOpts; ++i)
OptUnsafeEdges[i] += UnsafeOpts[i];
}
void handleRemoveEdge(const MatrixMetadata& MD, bool Transpose) {
DeniedOpts -= Transpose ? MD.getWorstRow() : MD.getWorstCol();
const bool* UnsafeOpts =
Transpose ? MD.getUnsafeCols() : MD.getUnsafeRows();
for (unsigned i = 0; i < NumOpts; ++i)
OptUnsafeEdges[i] -= UnsafeOpts[i];
}
bool isConservativelyAllocatable() const {
return (DeniedOpts < NumOpts) ||
(std::find(&OptUnsafeEdges[0], &OptUnsafeEdges[NumOpts], 0) !=
&OptUnsafeEdges[NumOpts]);
}
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
bool wasConservativelyAllocatable() const {
return everConservativelyAllocatable;
}
#endif
private:
ReductionState RS = Unprocessed;
unsigned NumOpts = 0;
unsigned DeniedOpts = 0;
std::unique_ptr<unsigned[]> OptUnsafeEdges;
Register VReg;
GraphMetadata::AllowedRegVecRef AllowedRegs;
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
bool everConservativelyAllocatable = false;
#endif
};
class RegAllocSolverImpl {
private:
using RAMatrix = MDMatrix<MatrixMetadata>;
public:
using RawVector = PBQP::Vector;
using RawMatrix = PBQP::Matrix;
using Vector = PBQP::Vector;
using Matrix = RAMatrix;
using CostAllocator = PBQP::PoolCostAllocator<Vector, Matrix>;
using NodeId = GraphBase::NodeId;
using EdgeId = GraphBase::EdgeId;
using NodeMetadata = RegAlloc::NodeMetadata;
struct EdgeMetadata {};
using GraphMetadata = RegAlloc::GraphMetadata;
using Graph = PBQP::Graph<RegAllocSolverImpl>;
RegAllocSolverImpl(Graph &G) : G(G) {}
Solution solve() {
G.setSolver(*this);
Solution S;
setup();
S = backpropagate(G, reduce());
G.unsetSolver();
return S;
}
void handleAddNode(NodeId NId) {
assert(G.getNodeCosts(NId).getLength() > 1 &&
"PBQP Graph should not contain single or zero-option nodes");
G.getNodeMetadata(NId).setup(G.getNodeCosts(NId));
}
void handleRemoveNode(NodeId NId) {}
void handleSetNodeCosts(NodeId NId, const Vector& newCosts) {}
void handleAddEdge(EdgeId EId) {
handleReconnectEdge(EId, G.getEdgeNode1Id(EId));
handleReconnectEdge(EId, G.getEdgeNode2Id(EId));
}
void handleDisconnectEdge(EdgeId EId, NodeId NId) {
NodeMetadata& NMd = G.getNodeMetadata(NId);
const MatrixMetadata& MMd = G.getEdgeCosts(EId).getMetadata();
NMd.handleRemoveEdge(MMd, NId == G.getEdgeNode2Id(EId));
promote(NId, NMd);
}
void handleReconnectEdge(EdgeId EId, NodeId NId) {
NodeMetadata& NMd = G.getNodeMetadata(NId);
const MatrixMetadata& MMd = G.getEdgeCosts(EId).getMetadata();
NMd.handleAddEdge(MMd, NId == G.getEdgeNode2Id(EId));
}
void handleUpdateCosts(EdgeId EId, const Matrix& NewCosts) {
NodeId N1Id = G.getEdgeNode1Id(EId);
NodeId N2Id = G.getEdgeNode2Id(EId);
NodeMetadata& N1Md = G.getNodeMetadata(N1Id);
NodeMetadata& N2Md = G.getNodeMetadata(N2Id);
bool Transpose = N1Id != G.getEdgeNode1Id(EId);
// Metadata are computed incrementally. First, update them
// by removing the old cost.
const MatrixMetadata& OldMMd = G.getEdgeCosts(EId).getMetadata();
N1Md.handleRemoveEdge(OldMMd, Transpose);
N2Md.handleRemoveEdge(OldMMd, !Transpose);
// And update now the metadata with the new cost.
const MatrixMetadata& MMd = NewCosts.getMetadata();
N1Md.handleAddEdge(MMd, Transpose);
N2Md.handleAddEdge(MMd, !Transpose);
// As the metadata may have changed with the update, the nodes may have
// become ConservativelyAllocatable or OptimallyReducible.
promote(N1Id, N1Md);
promote(N2Id, N2Md);
}
private:
void promote(NodeId NId, NodeMetadata& NMd) {
if (G.getNodeDegree(NId) == 3) {
// This node is becoming optimally reducible.
moveToOptimallyReducibleNodes(NId);
} else if (NMd.getReductionState() ==
NodeMetadata::NotProvablyAllocatable &&
NMd.isConservativelyAllocatable()) {
// This node just became conservatively allocatable.
moveToConservativelyAllocatableNodes(NId);
}
}
void removeFromCurrentSet(NodeId NId) {
switch (G.getNodeMetadata(NId).getReductionState()) {
case NodeMetadata::Unprocessed: break;
case NodeMetadata::OptimallyReducible:
assert(OptimallyReducibleNodes.find(NId) !=
OptimallyReducibleNodes.end() &&
"Node not in optimally reducible set.");
OptimallyReducibleNodes.erase(NId);
break;
case NodeMetadata::ConservativelyAllocatable:
assert(ConservativelyAllocatableNodes.find(NId) !=
ConservativelyAllocatableNodes.end() &&
"Node not in conservatively allocatable set.");
ConservativelyAllocatableNodes.erase(NId);
break;
case NodeMetadata::NotProvablyAllocatable:
assert(NotProvablyAllocatableNodes.find(NId) !=
NotProvablyAllocatableNodes.end() &&
"Node not in not-provably-allocatable set.");
NotProvablyAllocatableNodes.erase(NId);
break;
}
}
void moveToOptimallyReducibleNodes(NodeId NId) {
removeFromCurrentSet(NId);
OptimallyReducibleNodes.insert(NId);
G.getNodeMetadata(NId).setReductionState(
NodeMetadata::OptimallyReducible);
}
void moveToConservativelyAllocatableNodes(NodeId NId) {
removeFromCurrentSet(NId);
ConservativelyAllocatableNodes.insert(NId);
G.getNodeMetadata(NId).setReductionState(
NodeMetadata::ConservativelyAllocatable);
}
void moveToNotProvablyAllocatableNodes(NodeId NId) {
removeFromCurrentSet(NId);
NotProvablyAllocatableNodes.insert(NId);
G.getNodeMetadata(NId).setReductionState(
NodeMetadata::NotProvablyAllocatable);
}
void setup() {
// Set up worklists.
for (auto NId : G.nodeIds()) {
if (G.getNodeDegree(NId) < 3)
moveToOptimallyReducibleNodes(NId);
else if (G.getNodeMetadata(NId).isConservativelyAllocatable())
moveToConservativelyAllocatableNodes(NId);
else
moveToNotProvablyAllocatableNodes(NId);
}
}
// Compute a reduction order for the graph by iteratively applying PBQP
// reduction rules. Locally optimal rules are applied whenever possible (R0,
// R1, R2). If no locally-optimal rules apply then any conservatively
// allocatable node is reduced. Finally, if no conservatively allocatable
// node exists then the node with the lowest spill-cost:degree ratio is
// selected.
std::vector<GraphBase::NodeId> reduce() {
assert(!G.empty() && "Cannot reduce empty graph.");
using NodeId = GraphBase::NodeId;
std::vector<NodeId> NodeStack;
// Consume worklists.
while (true) {
if (!OptimallyReducibleNodes.empty()) {
NodeSet::iterator NItr = OptimallyReducibleNodes.begin();
NodeId NId = *NItr;
OptimallyReducibleNodes.erase(NItr);
NodeStack.push_back(NId);
switch (G.getNodeDegree(NId)) {
case 0:
break;
case 1:
applyR1(G, NId);
break;
case 2:
applyR2(G, NId);
break;
default: llvm_unreachable("Not an optimally reducible node.");
}
} else if (!ConservativelyAllocatableNodes.empty()) {
// Conservatively allocatable nodes will never spill. For now just
// take the first node in the set and push it on the stack. When we
// start optimizing more heavily for register preferencing, it may
// would be better to push nodes with lower 'expected' or worst-case
// register costs first (since early nodes are the most
// constrained).
NodeSet::iterator NItr = ConservativelyAllocatableNodes.begin();
NodeId NId = *NItr;
ConservativelyAllocatableNodes.erase(NItr);
NodeStack.push_back(NId);
G.disconnectAllNeighborsFromNode(NId);
} else if (!NotProvablyAllocatableNodes.empty()) {
NodeSet::iterator NItr =
std::min_element(NotProvablyAllocatableNodes.begin(),
NotProvablyAllocatableNodes.end(),
SpillCostComparator(G));
NodeId NId = *NItr;
NotProvablyAllocatableNodes.erase(NItr);
NodeStack.push_back(NId);
G.disconnectAllNeighborsFromNode(NId);
} else
break;
}
return NodeStack;
}
class SpillCostComparator {
public:
SpillCostComparator(const Graph& G) : G(G) {}
bool operator()(NodeId N1Id, NodeId N2Id) {
PBQPNum N1SC = G.getNodeCosts(N1Id)[0];
PBQPNum N2SC = G.getNodeCosts(N2Id)[0];
if (N1SC == N2SC)
return G.getNodeDegree(N1Id) < G.getNodeDegree(N2Id);
return N1SC < N2SC;
}
private:
const Graph& G;
};
Graph& G;
using NodeSet = std::set<NodeId>;
NodeSet OptimallyReducibleNodes;
NodeSet ConservativelyAllocatableNodes;
NodeSet NotProvablyAllocatableNodes;
};
class PBQPRAGraph : public PBQP::Graph<RegAllocSolverImpl> {
private:
using BaseT = PBQP::Graph<RegAllocSolverImpl>;
public:
PBQPRAGraph(GraphMetadata Metadata) : BaseT(std::move(Metadata)) {}
/// Dump this graph to dbgs().
void dump() const;
/// Dump this graph to an output stream.
/// @param OS Output stream to print on.
void dump(raw_ostream &OS) const;
/// Print a representation of this graph in DOT format.
/// @param OS Output stream to print on.
void printDot(raw_ostream &OS) const;
};
inline Solution solve(PBQPRAGraph& G) {
if (G.empty())
return Solution();
RegAllocSolverImpl RegAllocSolver(G);
return RegAllocSolver.solve();
}
} // end namespace RegAlloc
} // end namespace PBQP
/// Create a PBQP register allocator instance.
FunctionPass *
createPBQPRegisterAllocator(char *customPassID = nullptr);
} // end namespace llvm
#endif // LLVM_CODEGEN_REGALLOCPBQP_H
PK hwFZ@��ڝ& �& CodeGen/SwitchLoweringUtils.hnu �[��� //===- SwitchLoweringUtils.h - Switch Lowering ------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_SWITCHLOWERINGUTILS_H
#define LLVM_CODEGEN_SWITCHLOWERINGUTILS_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/IR/InstrTypes.h"
#include "llvm/Support/BranchProbability.h"
#include <vector>
namespace llvm {
class BlockFrequencyInfo;
class ConstantInt;
class FunctionLoweringInfo;
class MachineBasicBlock;
class ProfileSummaryInfo;
class TargetLowering;
class TargetMachine;
namespace SwitchCG {
enum CaseClusterKind {
/// A cluster of adjacent case labels with the same destination, or just one
/// case.
CC_Range,
/// A cluster of cases suitable for jump table lowering.
CC_JumpTable,
/// A cluster of cases suitable for bit test lowering.
CC_BitTests
};
/// A cluster of case labels.
struct CaseCluster {
CaseClusterKind Kind;
const ConstantInt *Low, *High;
union {
MachineBasicBlock *MBB;
unsigned JTCasesIndex;
unsigned BTCasesIndex;
};
BranchProbability Prob;
static CaseCluster range(const ConstantInt *Low, const ConstantInt *High,
MachineBasicBlock *MBB, BranchProbability Prob) {
CaseCluster C;
C.Kind = CC_Range;
C.Low = Low;
C.High = High;
C.MBB = MBB;
C.Prob = Prob;
return C;
}
static CaseCluster jumpTable(const ConstantInt *Low, const ConstantInt *High,
unsigned JTCasesIndex, BranchProbability Prob) {
CaseCluster C;
C.Kind = CC_JumpTable;
C.Low = Low;
C.High = High;
C.JTCasesIndex = JTCasesIndex;
C.Prob = Prob;
return C;
}
static CaseCluster bitTests(const ConstantInt *Low, const ConstantInt *High,
unsigned BTCasesIndex, BranchProbability Prob) {
CaseCluster C;
C.Kind = CC_BitTests;
C.Low = Low;
C.High = High;
C.BTCasesIndex = BTCasesIndex;
C.Prob = Prob;
return C;
}
};
using CaseClusterVector = std::vector<CaseCluster>;
using CaseClusterIt = CaseClusterVector::iterator;
/// Sort Clusters and merge adjacent cases.
void sortAndRangeify(CaseClusterVector &Clusters);
struct CaseBits {
uint64_t Mask = 0;
MachineBasicBlock *BB = nullptr;
unsigned Bits = 0;
BranchProbability ExtraProb;
CaseBits() = default;
CaseBits(uint64_t mask, MachineBasicBlock *bb, unsigned bits,
BranchProbability Prob)
: Mask(mask), BB(bb), Bits(bits), ExtraProb(Prob) {}
};
using CaseBitsVector = std::vector<CaseBits>;
/// This structure is used to communicate between SelectionDAGBuilder and
/// SDISel for the code generation of additional basic blocks needed by
/// multi-case switch statements.
struct CaseBlock {
// For the GISel interface.
struct PredInfoPair {
CmpInst::Predicate Pred;
// Set when no comparison should be emitted.
bool NoCmp;
};
union {
// The condition code to use for the case block's setcc node.
// Besides the integer condition codes, this can also be SETTRUE, in which
// case no comparison gets emitted.
ISD::CondCode CC;
struct PredInfoPair PredInfo;
};
// The LHS/MHS/RHS of the comparison to emit.
// Emit by default LHS op RHS. MHS is used for range comparisons:
// If MHS is not null: (LHS <= MHS) and (MHS <= RHS).
const Value *CmpLHS, *CmpMHS, *CmpRHS;
// The block to branch to if the setcc is true/false.
MachineBasicBlock *TrueBB, *FalseBB;
// The block into which to emit the code for the setcc and branches.
MachineBasicBlock *ThisBB;
/// The debug location of the instruction this CaseBlock was
/// produced from.
SDLoc DL;
DebugLoc DbgLoc;
// Branch weights.
BranchProbability TrueProb, FalseProb;
// Constructor for SelectionDAG.
CaseBlock(ISD::CondCode cc, const Value *cmplhs, const Value *cmprhs,
const Value *cmpmiddle, MachineBasicBlock *truebb,
MachineBasicBlock *falsebb, MachineBasicBlock *me, SDLoc dl,
BranchProbability trueprob = BranchProbability::getUnknown(),
BranchProbability falseprob = BranchProbability::getUnknown())
: CC(cc), CmpLHS(cmplhs), CmpMHS(cmpmiddle), CmpRHS(cmprhs),
TrueBB(truebb), FalseBB(falsebb), ThisBB(me), DL(dl),
TrueProb(trueprob), FalseProb(falseprob) {}
// Constructor for GISel.
CaseBlock(CmpInst::Predicate pred, bool nocmp, const Value *cmplhs,
const Value *cmprhs, const Value *cmpmiddle,
MachineBasicBlock *truebb, MachineBasicBlock *falsebb,
MachineBasicBlock *me, DebugLoc dl,
BranchProbability trueprob = BranchProbability::getUnknown(),
BranchProbability falseprob = BranchProbability::getUnknown())
: PredInfo({pred, nocmp}), CmpLHS(cmplhs), CmpMHS(cmpmiddle),
CmpRHS(cmprhs), TrueBB(truebb), FalseBB(falsebb), ThisBB(me),
DbgLoc(dl), TrueProb(trueprob), FalseProb(falseprob) {}
};
struct JumpTable {
/// The virtual register containing the index of the jump table entry
/// to jump to.
unsigned Reg;
/// The JumpTableIndex for this jump table in the function.
unsigned JTI;
/// The MBB into which to emit the code for the indirect jump.
MachineBasicBlock *MBB;
/// The MBB of the default bb, which is a successor of the range
/// check MBB. This is when updating PHI nodes in successors.
MachineBasicBlock *Default;
JumpTable(unsigned R, unsigned J, MachineBasicBlock *M, MachineBasicBlock *D)
: Reg(R), JTI(J), MBB(M), Default(D) {}
};
struct JumpTableHeader {
APInt First;
APInt Last;
const Value *SValue;
MachineBasicBlock *HeaderBB;
bool Emitted;
bool FallthroughUnreachable = false;
JumpTableHeader(APInt F, APInt L, const Value *SV, MachineBasicBlock *H,
bool E = false)
: First(std::move(F)), Last(std::move(L)), SValue(SV), HeaderBB(H),
Emitted(E) {}
};
using JumpTableBlock = std::pair<JumpTableHeader, JumpTable>;
struct BitTestCase {
uint64_t Mask;
MachineBasicBlock *ThisBB;
MachineBasicBlock *TargetBB;
BranchProbability ExtraProb;
BitTestCase(uint64_t M, MachineBasicBlock *T, MachineBasicBlock *Tr,
BranchProbability Prob)
: Mask(M), ThisBB(T), TargetBB(Tr), ExtraProb(Prob) {}
};
using BitTestInfo = SmallVector<BitTestCase, 3>;
struct BitTestBlock {
APInt First;
APInt Range;
const Value *SValue;
unsigned Reg;
MVT RegVT;
bool Emitted;
bool ContiguousRange;
MachineBasicBlock *Parent;
MachineBasicBlock *Default;
BitTestInfo Cases;
BranchProbability Prob;
BranchProbability DefaultProb;
bool FallthroughUnreachable = false;
BitTestBlock(APInt F, APInt R, const Value *SV, unsigned Rg, MVT RgVT, bool E,
bool CR, MachineBasicBlock *P, MachineBasicBlock *D,
BitTestInfo C, BranchProbability Pr)
: First(std::move(F)), Range(std::move(R)), SValue(SV), Reg(Rg),
RegVT(RgVT), Emitted(E), ContiguousRange(CR), Parent(P), Default(D),
Cases(std::move(C)), Prob(Pr) {}
};
/// Return the range of values within a range.
uint64_t getJumpTableRange(const CaseClusterVector &Clusters, unsigned First,
unsigned Last);
/// Return the number of cases within a range.
uint64_t getJumpTableNumCases(const SmallVectorImpl<unsigned> &TotalCases,
unsigned First, unsigned Last);
struct SwitchWorkListItem {
MachineBasicBlock *MBB = nullptr;
CaseClusterIt FirstCluster;
CaseClusterIt LastCluster;
const ConstantInt *GE = nullptr;
const ConstantInt *LT = nullptr;
BranchProbability DefaultProb;
};
using SwitchWorkList = SmallVector<SwitchWorkListItem, 4>;
class SwitchLowering {
public:
SwitchLowering(FunctionLoweringInfo &funcinfo) : FuncInfo(funcinfo) {}
void init(const TargetLowering &tli, const TargetMachine &tm,
const DataLayout &dl) {
TLI = &tli;
TM = &tm;
DL = &dl;
}
/// Vector of CaseBlock structures used to communicate SwitchInst code
/// generation information.
std::vector<CaseBlock> SwitchCases;
/// Vector of JumpTable structures used to communicate SwitchInst code
/// generation information.
std::vector<JumpTableBlock> JTCases;
/// Vector of BitTestBlock structures used to communicate SwitchInst code
/// generation information.
std::vector<BitTestBlock> BitTestCases;
void findJumpTables(CaseClusterVector &Clusters, const SwitchInst *SI,
MachineBasicBlock *DefaultMBB,
ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI);
bool buildJumpTable(const CaseClusterVector &Clusters, unsigned First,
unsigned Last, const SwitchInst *SI,
MachineBasicBlock *DefaultMBB, CaseCluster &JTCluster);
void findBitTestClusters(CaseClusterVector &Clusters, const SwitchInst *SI);
/// Build a bit test cluster from Clusters[First..Last]. Returns false if it
/// decides it's not a good idea.
bool buildBitTests(CaseClusterVector &Clusters, unsigned First, unsigned Last,
const SwitchInst *SI, CaseCluster &BTCluster);
virtual void addSuccessorWithProb(
MachineBasicBlock *Src, MachineBasicBlock *Dst,
BranchProbability Prob = BranchProbability::getUnknown()) = 0;
virtual ~SwitchLowering() = default;
private:
const TargetLowering *TLI = nullptr;
const TargetMachine *TM = nullptr;
const DataLayout *DL = nullptr;
FunctionLoweringInfo &FuncInfo;
};
} // namespace SwitchCG
} // namespace llvm
#endif // LLVM_CODEGEN_SWITCHLOWERINGUTILS_H
PK hwFZ�m m CodeGen/MachineCombinerPattern.hnu �[��� //===-- llvm/CodeGen/MachineCombinerPattern.h - Instruction pattern supported by
// combiner ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines instruction pattern supported by combiner
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINECOMBINERPATTERN_H
#define LLVM_CODEGEN_MACHINECOMBINERPATTERN_H
namespace llvm {
/// These are instruction patterns matched by the machine combiner pass.
enum class MachineCombinerPattern {
// These are commutative variants for reassociating a computation chain. See
// the comments before getMachineCombinerPatterns() in TargetInstrInfo.cpp.
REASSOC_AX_BY,
REASSOC_AX_YB,
REASSOC_XA_BY,
REASSOC_XA_YB,
// These are patterns matched by the PowerPC to reassociate FMA chains.
REASSOC_XY_AMM_BMM,
REASSOC_XMM_AMM_BMM,
// These are patterns matched by the PowerPC to reassociate FMA and FSUB to
// reduce register pressure.
REASSOC_XY_BCA,
REASSOC_XY_BAC,
// These are patterns used to reduce the length of dependence chain.
SUBADD_OP1,
SUBADD_OP2,
// These are multiply-add patterns matched by the AArch64 machine combiner.
MULADDW_OP1,
MULADDW_OP2,
MULSUBW_OP1,
MULSUBW_OP2,
MULADDWI_OP1,
MULSUBWI_OP1,
MULADDX_OP1,
MULADDX_OP2,
MULSUBX_OP1,
MULSUBX_OP2,
MULADDXI_OP1,
MULSUBXI_OP1,
// NEON integers vectors
MULADDv8i8_OP1,
MULADDv8i8_OP2,
MULADDv16i8_OP1,
MULADDv16i8_OP2,
MULADDv4i16_OP1,
MULADDv4i16_OP2,
MULADDv8i16_OP1,
MULADDv8i16_OP2,
MULADDv2i32_OP1,
MULADDv2i32_OP2,
MULADDv4i32_OP1,
MULADDv4i32_OP2,
MULSUBv8i8_OP1,
MULSUBv8i8_OP2,
MULSUBv16i8_OP1,
MULSUBv16i8_OP2,
MULSUBv4i16_OP1,
MULSUBv4i16_OP2,
MULSUBv8i16_OP1,
MULSUBv8i16_OP2,
MULSUBv2i32_OP1,
MULSUBv2i32_OP2,
MULSUBv4i32_OP1,
MULSUBv4i32_OP2,
MULADDv4i16_indexed_OP1,
MULADDv4i16_indexed_OP2,
MULADDv8i16_indexed_OP1,
MULADDv8i16_indexed_OP2,
MULADDv2i32_indexed_OP1,
MULADDv2i32_indexed_OP2,
MULADDv4i32_indexed_OP1,
MULADDv4i32_indexed_OP2,
MULSUBv4i16_indexed_OP1,
MULSUBv4i16_indexed_OP2,
MULSUBv8i16_indexed_OP1,
MULSUBv8i16_indexed_OP2,
MULSUBv2i32_indexed_OP1,
MULSUBv2i32_indexed_OP2,
MULSUBv4i32_indexed_OP1,
MULSUBv4i32_indexed_OP2,
// Floating Point
FMULADDH_OP1,
FMULADDH_OP2,
FMULSUBH_OP1,
FMULSUBH_OP2,
FMULADDS_OP1,
FMULADDS_OP2,
FMULSUBS_OP1,
FMULSUBS_OP2,
FMULADDD_OP1,
FMULADDD_OP2,
FMULSUBD_OP1,
FMULSUBD_OP2,
FNMULSUBH_OP1,
FNMULSUBS_OP1,
FNMULSUBD_OP1,
FMLAv1i32_indexed_OP1,
FMLAv1i32_indexed_OP2,
FMLAv1i64_indexed_OP1,
FMLAv1i64_indexed_OP2,
FMLAv4f16_OP1,
FMLAv4f16_OP2,
FMLAv8f16_OP1,
FMLAv8f16_OP2,
FMLAv2f32_OP2,
FMLAv2f32_OP1,
FMLAv2f64_OP1,
FMLAv2f64_OP2,
FMLAv4i16_indexed_OP1,
FMLAv4i16_indexed_OP2,
FMLAv8i16_indexed_OP1,
FMLAv8i16_indexed_OP2,
FMLAv2i32_indexed_OP1,
FMLAv2i32_indexed_OP2,
FMLAv2i64_indexed_OP1,
FMLAv2i64_indexed_OP2,
FMLAv4f32_OP1,
FMLAv4f32_OP2,
FMLAv4i32_indexed_OP1,
FMLAv4i32_indexed_OP2,
FMLSv1i32_indexed_OP2,
FMLSv1i64_indexed_OP2,
FMLSv4f16_OP1,
FMLSv4f16_OP2,
FMLSv8f16_OP1,
FMLSv8f16_OP2,
FMLSv2f32_OP1,
FMLSv2f32_OP2,
FMLSv2f64_OP1,
FMLSv2f64_OP2,
FMLSv4i16_indexed_OP1,
FMLSv4i16_indexed_OP2,
FMLSv8i16_indexed_OP1,
FMLSv8i16_indexed_OP2,
FMLSv2i32_indexed_OP1,
FMLSv2i32_indexed_OP2,
FMLSv2i64_indexed_OP1,
FMLSv2i64_indexed_OP2,
FMLSv4f32_OP1,
FMLSv4f32_OP2,
FMLSv4i32_indexed_OP1,
FMLSv4i32_indexed_OP2,
FMULv2i32_indexed_OP1,
FMULv2i32_indexed_OP2,
FMULv2i64_indexed_OP1,
FMULv2i64_indexed_OP2,
FMULv4i16_indexed_OP1,
FMULv4i16_indexed_OP2,
FMULv4i32_indexed_OP1,
FMULv4i32_indexed_OP2,
FMULv8i16_indexed_OP1,
FMULv8i16_indexed_OP2,
// RISCV FMADD, FMSUB, FNMSUB patterns
FMADD_AX,
FMADD_XA,
FMSUB,
FNMSUB,
// X86 VNNI
DPWSSD,
FNMADD,
};
} // end namespace llvm
#endif
PK hwFZ���R! R! CodeGen/PBQP/Math.hnu �[��� //===- Math.h - PBQP Vector and Matrix classes ------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_PBQP_MATH_H
#define LLVM_CODEGEN_PBQP_MATH_H
#include "llvm/ADT/Hashing.h"
#include "llvm/ADT/STLExtras.h"
#include <algorithm>
#include <cassert>
#include <functional>
#include <memory>
namespace llvm {
namespace PBQP {
using PBQPNum = float;
/// PBQP Vector class.
class Vector {
friend hash_code hash_value(const Vector &);
public:
/// Construct a PBQP vector of the given size.
explicit Vector(unsigned Length)
: Length(Length), Data(std::make_unique<PBQPNum []>(Length)) {}
/// Construct a PBQP vector with initializer.
Vector(unsigned Length, PBQPNum InitVal)
: Length(Length), Data(std::make_unique<PBQPNum []>(Length)) {
std::fill(Data.get(), Data.get() + Length, InitVal);
}
/// Copy construct a PBQP vector.
Vector(const Vector &V)
: Length(V.Length), Data(std::make_unique<PBQPNum []>(Length)) {
std::copy(V.Data.get(), V.Data.get() + Length, Data.get());
}
/// Move construct a PBQP vector.
Vector(Vector &&V)
: Length(V.Length), Data(std::move(V.Data)) {
V.Length = 0;
}
/// Comparison operator.
bool operator==(const Vector &V) const {
assert(Length != 0 && Data && "Invalid vector");
if (Length != V.Length)
return false;
return std::equal(Data.get(), Data.get() + Length, V.Data.get());
}
/// Return the length of the vector
unsigned getLength() const {
assert(Length != 0 && Data && "Invalid vector");
return Length;
}
/// Element access.
PBQPNum& operator[](unsigned Index) {
assert(Length != 0 && Data && "Invalid vector");
assert(Index < Length && "Vector element access out of bounds.");
return Data[Index];
}
/// Const element access.
const PBQPNum& operator[](unsigned Index) const {
assert(Length != 0 && Data && "Invalid vector");
assert(Index < Length && "Vector element access out of bounds.");
return Data[Index];
}
/// Add another vector to this one.
Vector& operator+=(const Vector &V) {
assert(Length != 0 && Data && "Invalid vector");
assert(Length == V.Length && "Vector length mismatch.");
std::transform(Data.get(), Data.get() + Length, V.Data.get(), Data.get(),
std::plus<PBQPNum>());
return *this;
}
/// Returns the index of the minimum value in this vector
unsigned minIndex() const {
assert(Length != 0 && Data && "Invalid vector");
return std::min_element(Data.get(), Data.get() + Length) - Data.get();
}
private:
unsigned Length;
std::unique_ptr<PBQPNum []> Data;
};
/// Return a hash_value for the given vector.
inline hash_code hash_value(const Vector &V) {
unsigned *VBegin = reinterpret_cast<unsigned*>(V.Data.get());
unsigned *VEnd = reinterpret_cast<unsigned*>(V.Data.get() + V.Length);
return hash_combine(V.Length, hash_combine_range(VBegin, VEnd));
}
/// Output a textual representation of the given vector on the given
/// output stream.
template <typename OStream>
OStream& operator<<(OStream &OS, const Vector &V) {
assert((V.getLength() != 0) && "Zero-length vector badness.");
OS << "[ " << V[0];
for (unsigned i = 1; i < V.getLength(); ++i)
OS << ", " << V[i];
OS << " ]";
return OS;
}
/// PBQP Matrix class
class Matrix {
private:
friend hash_code hash_value(const Matrix &);
public:
/// Construct a PBQP Matrix with the given dimensions.
Matrix(unsigned Rows, unsigned Cols) :
Rows(Rows), Cols(Cols), Data(std::make_unique<PBQPNum []>(Rows * Cols)) {
}
/// Construct a PBQP Matrix with the given dimensions and initial
/// value.
Matrix(unsigned Rows, unsigned Cols, PBQPNum InitVal)
: Rows(Rows), Cols(Cols),
Data(std::make_unique<PBQPNum []>(Rows * Cols)) {
std::fill(Data.get(), Data.get() + (Rows * Cols), InitVal);
}
/// Copy construct a PBQP matrix.
Matrix(const Matrix &M)
: Rows(M.Rows), Cols(M.Cols),
Data(std::make_unique<PBQPNum []>(Rows * Cols)) {
std::copy(M.Data.get(), M.Data.get() + (Rows * Cols), Data.get());
}
/// Move construct a PBQP matrix.
Matrix(Matrix &&M)
: Rows(M.Rows), Cols(M.Cols), Data(std::move(M.Data)) {
M.Rows = M.Cols = 0;
}
/// Comparison operator.
bool operator==(const Matrix &M) const {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
if (Rows != M.Rows || Cols != M.Cols)
return false;
return std::equal(Data.get(), Data.get() + (Rows * Cols), M.Data.get());
}
/// Return the number of rows in this matrix.
unsigned getRows() const {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
return Rows;
}
/// Return the number of cols in this matrix.
unsigned getCols() const {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
return Cols;
}
/// Matrix element access.
PBQPNum* operator[](unsigned R) {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
assert(R < Rows && "Row out of bounds.");
return Data.get() + (R * Cols);
}
/// Matrix element access.
const PBQPNum* operator[](unsigned R) const {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
assert(R < Rows && "Row out of bounds.");
return Data.get() + (R * Cols);
}
/// Returns the given row as a vector.
Vector getRowAsVector(unsigned R) const {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
Vector V(Cols);
for (unsigned C = 0; C < Cols; ++C)
V[C] = (*this)[R][C];
return V;
}
/// Returns the given column as a vector.
Vector getColAsVector(unsigned C) const {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
Vector V(Rows);
for (unsigned R = 0; R < Rows; ++R)
V[R] = (*this)[R][C];
return V;
}
/// Matrix transpose.
Matrix transpose() const {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
Matrix M(Cols, Rows);
for (unsigned r = 0; r < Rows; ++r)
for (unsigned c = 0; c < Cols; ++c)
M[c][r] = (*this)[r][c];
return M;
}
/// Add the given matrix to this one.
Matrix& operator+=(const Matrix &M) {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
assert(Rows == M.Rows && Cols == M.Cols &&
"Matrix dimensions mismatch.");
std::transform(Data.get(), Data.get() + (Rows * Cols), M.Data.get(),
Data.get(), std::plus<PBQPNum>());
return *this;
}
Matrix operator+(const Matrix &M) {
assert(Rows != 0 && Cols != 0 && Data && "Invalid matrix");
Matrix Tmp(*this);
Tmp += M;
return Tmp;
}
private:
unsigned Rows, Cols;
std::unique_ptr<PBQPNum []> Data;
};
/// Return a hash_code for the given matrix.
inline hash_code hash_value(const Matrix &M) {
unsigned *MBegin = reinterpret_cast<unsigned*>(M.Data.get());
unsigned *MEnd =
reinterpret_cast<unsigned*>(M.Data.get() + (M.Rows * M.Cols));
return hash_combine(M.Rows, M.Cols, hash_combine_range(MBegin, MEnd));
}
/// Output a textual representation of the given matrix on the given
/// output stream.
template <typename OStream>
OStream& operator<<(OStream &OS, const Matrix &M) {
assert((M.getRows() != 0) && "Zero-row matrix badness.");
for (unsigned i = 0; i < M.getRows(); ++i)
OS << M.getRowAsVector(i) << "\n";
return OS;
}
template <typename Metadata>
class MDVector : public Vector {
public:
MDVector(const Vector &v) : Vector(v), md(*this) {}
MDVector(Vector &&v) : Vector(std::move(v)), md(*this) { }
const Metadata& getMetadata() const { return md; }
private:
Metadata md;
};
template <typename Metadata>
inline hash_code hash_value(const MDVector<Metadata> &V) {
return hash_value(static_cast<const Vector&>(V));
}
template <typename Metadata>
class MDMatrix : public Matrix {
public:
MDMatrix(const Matrix &m) : Matrix(m), md(*this) {}
MDMatrix(Matrix &&m) : Matrix(std::move(m)), md(*this) { }
const Metadata& getMetadata() const { return md; }
private:
Metadata md;
};
template <typename Metadata>
inline hash_code hash_value(const MDMatrix<Metadata> &M) {
return hash_value(static_cast<const Matrix&>(M));
}
} // end namespace PBQP
} // end namespace llvm
#endif // LLVM_CODEGEN_PBQP_MATH_H
PK hwFZ+��A� � CodeGen/PBQP/CostAllocator.hnu �[��� //===- CostAllocator.h - PBQP Cost Allocator --------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Defines classes conforming to the PBQP cost value manager concept.
//
// Cost value managers are memory managers for PBQP cost values (vectors and
// matrices). Since PBQP graphs can grow very large (E.g. hundreds of thousands
// of edges on the largest function in SPEC2006).
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_PBQP_COSTALLOCATOR_H
#define LLVM_CODEGEN_PBQP_COSTALLOCATOR_H
#include "llvm/ADT/DenseSet.h"
#include <algorithm>
#include <cstdint>
#include <memory>
namespace llvm {
namespace PBQP {
template <typename ValueT> class ValuePool {
public:
using PoolRef = std::shared_ptr<const ValueT>;
private:
class PoolEntry : public std::enable_shared_from_this<PoolEntry> {
public:
template <typename ValueKeyT>
PoolEntry(ValuePool &Pool, ValueKeyT Value)
: Pool(Pool), Value(std::move(Value)) {}
~PoolEntry() { Pool.removeEntry(this); }
const ValueT &getValue() const { return Value; }
private:
ValuePool &Pool;
ValueT Value;
};
class PoolEntryDSInfo {
public:
static inline PoolEntry *getEmptyKey() { return nullptr; }
static inline PoolEntry *getTombstoneKey() {
return reinterpret_cast<PoolEntry *>(static_cast<uintptr_t>(1));
}
template <typename ValueKeyT>
static unsigned getHashValue(const ValueKeyT &C) {
return hash_value(C);
}
static unsigned getHashValue(PoolEntry *P) {
return getHashValue(P->getValue());
}
static unsigned getHashValue(const PoolEntry *P) {
return getHashValue(P->getValue());
}
template <typename ValueKeyT1, typename ValueKeyT2>
static bool isEqual(const ValueKeyT1 &C1, const ValueKeyT2 &C2) {
return C1 == C2;
}
template <typename ValueKeyT>
static bool isEqual(const ValueKeyT &C, PoolEntry *P) {
if (P == getEmptyKey() || P == getTombstoneKey())
return false;
return isEqual(C, P->getValue());
}
static bool isEqual(PoolEntry *P1, PoolEntry *P2) {
if (P1 == getEmptyKey() || P1 == getTombstoneKey())
return P1 == P2;
return isEqual(P1->getValue(), P2);
}
};
using EntrySetT = DenseSet<PoolEntry *, PoolEntryDSInfo>;
EntrySetT EntrySet;
void removeEntry(PoolEntry *P) { EntrySet.erase(P); }
public:
template <typename ValueKeyT> PoolRef getValue(ValueKeyT ValueKey) {
typename EntrySetT::iterator I = EntrySet.find_as(ValueKey);
if (I != EntrySet.end())
return PoolRef((*I)->shared_from_this(), &(*I)->getValue());
auto P = std::make_shared<PoolEntry>(*this, std::move(ValueKey));
EntrySet.insert(P.get());
return PoolRef(P, &P->getValue());
}
};
template <typename VectorT, typename MatrixT> class PoolCostAllocator {
private:
using VectorCostPool = ValuePool<VectorT>;
using MatrixCostPool = ValuePool<MatrixT>;
public:
using Vector = VectorT;
using Matrix = MatrixT;
using VectorPtr = typename VectorCostPool::PoolRef;
using MatrixPtr = typename MatrixCostPool::PoolRef;
template <typename VectorKeyT> VectorPtr getVector(VectorKeyT v) {
return VectorPool.getValue(std::move(v));
}
template <typename MatrixKeyT> MatrixPtr getMatrix(MatrixKeyT m) {
return MatrixPool.getValue(std::move(m));
}
private:
VectorCostPool VectorPool;
MatrixCostPool MatrixPool;
};
} // end namespace PBQP
} // end namespace llvm
#endif // LLVM_CODEGEN_PBQP_COSTALLOCATOR_H
PK iwFZ�52�V �V CodeGen/PBQP/Graph.hnu �[��� //===- Graph.h - PBQP Graph -------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// PBQP Graph class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_PBQP_GRAPH_H
#define LLVM_CODEGEN_PBQP_GRAPH_H
#include "llvm/ADT/STLExtras.h"
#include <algorithm>
#include <cassert>
#include <iterator>
#include <limits>
#include <vector>
namespace llvm {
namespace PBQP {
class GraphBase {
public:
using NodeId = unsigned;
using EdgeId = unsigned;
/// Returns a value representing an invalid (non-existent) node.
static NodeId invalidNodeId() {
return std::numeric_limits<NodeId>::max();
}
/// Returns a value representing an invalid (non-existent) edge.
static EdgeId invalidEdgeId() {
return std::numeric_limits<EdgeId>::max();
}
};
/// PBQP Graph class.
/// Instances of this class describe PBQP problems.
///
template <typename SolverT>
class Graph : public GraphBase {
private:
using CostAllocator = typename SolverT::CostAllocator;
public:
using RawVector = typename SolverT::RawVector;
using RawMatrix = typename SolverT::RawMatrix;
using Vector = typename SolverT::Vector;
using Matrix = typename SolverT::Matrix;
using VectorPtr = typename CostAllocator::VectorPtr;
using MatrixPtr = typename CostAllocator::MatrixPtr;
using NodeMetadata = typename SolverT::NodeMetadata;
using EdgeMetadata = typename SolverT::EdgeMetadata;
using GraphMetadata = typename SolverT::GraphMetadata;
private:
class NodeEntry {
public:
using AdjEdgeList = std::vector<EdgeId>;
using AdjEdgeIdx = AdjEdgeList::size_type;
using AdjEdgeItr = AdjEdgeList::const_iterator;
NodeEntry(VectorPtr Costs) : Costs(std::move(Costs)) {}
static AdjEdgeIdx getInvalidAdjEdgeIdx() {
return std::numeric_limits<AdjEdgeIdx>::max();
}
AdjEdgeIdx addAdjEdgeId(EdgeId EId) {
AdjEdgeIdx Idx = AdjEdgeIds.size();
AdjEdgeIds.push_back(EId);
return Idx;
}
void removeAdjEdgeId(Graph &G, NodeId ThisNId, AdjEdgeIdx Idx) {
// Swap-and-pop for fast removal.
// 1) Update the adj index of the edge currently at back().
// 2) Move last Edge down to Idx.
// 3) pop_back()
// If Idx == size() - 1 then the setAdjEdgeIdx and swap are
// redundant, but both operations are cheap.
G.getEdge(AdjEdgeIds.back()).setAdjEdgeIdx(ThisNId, Idx);
AdjEdgeIds[Idx] = AdjEdgeIds.back();
AdjEdgeIds.pop_back();
}
const AdjEdgeList& getAdjEdgeIds() const { return AdjEdgeIds; }
VectorPtr Costs;
NodeMetadata Metadata;
private:
AdjEdgeList AdjEdgeIds;
};
class EdgeEntry {
public:
EdgeEntry(NodeId N1Id, NodeId N2Id, MatrixPtr Costs)
: Costs(std::move(Costs)) {
NIds[0] = N1Id;
NIds[1] = N2Id;
ThisEdgeAdjIdxs[0] = NodeEntry::getInvalidAdjEdgeIdx();
ThisEdgeAdjIdxs[1] = NodeEntry::getInvalidAdjEdgeIdx();
}
void connectToN(Graph &G, EdgeId ThisEdgeId, unsigned NIdx) {
assert(ThisEdgeAdjIdxs[NIdx] == NodeEntry::getInvalidAdjEdgeIdx() &&
"Edge already connected to NIds[NIdx].");
NodeEntry &N = G.getNode(NIds[NIdx]);
ThisEdgeAdjIdxs[NIdx] = N.addAdjEdgeId(ThisEdgeId);
}
void connect(Graph &G, EdgeId ThisEdgeId) {
connectToN(G, ThisEdgeId, 0);
connectToN(G, ThisEdgeId, 1);
}
void setAdjEdgeIdx(NodeId NId, typename NodeEntry::AdjEdgeIdx NewIdx) {
if (NId == NIds[0])
ThisEdgeAdjIdxs[0] = NewIdx;
else {
assert(NId == NIds[1] && "Edge not connected to NId");
ThisEdgeAdjIdxs[1] = NewIdx;
}
}
void disconnectFromN(Graph &G, unsigned NIdx) {
assert(ThisEdgeAdjIdxs[NIdx] != NodeEntry::getInvalidAdjEdgeIdx() &&
"Edge not connected to NIds[NIdx].");
NodeEntry &N = G.getNode(NIds[NIdx]);
N.removeAdjEdgeId(G, NIds[NIdx], ThisEdgeAdjIdxs[NIdx]);
ThisEdgeAdjIdxs[NIdx] = NodeEntry::getInvalidAdjEdgeIdx();
}
void disconnectFrom(Graph &G, NodeId NId) {
if (NId == NIds[0])
disconnectFromN(G, 0);
else {
assert(NId == NIds[1] && "Edge does not connect NId");
disconnectFromN(G, 1);
}
}
NodeId getN1Id() const { return NIds[0]; }
NodeId getN2Id() const { return NIds[1]; }
MatrixPtr Costs;
EdgeMetadata Metadata;
private:
NodeId NIds[2];
typename NodeEntry::AdjEdgeIdx ThisEdgeAdjIdxs[2];
};
// ----- MEMBERS -----
GraphMetadata Metadata;
CostAllocator CostAlloc;
SolverT *Solver = nullptr;
using NodeVector = std::vector<NodeEntry>;
using FreeNodeVector = std::vector<NodeId>;
NodeVector Nodes;
FreeNodeVector FreeNodeIds;
using EdgeVector = std::vector<EdgeEntry>;
using FreeEdgeVector = std::vector<EdgeId>;
EdgeVector Edges;
FreeEdgeVector FreeEdgeIds;
Graph(const Graph &Other) {}
// ----- INTERNAL METHODS -----
NodeEntry &getNode(NodeId NId) {
assert(NId < Nodes.size() && "Out of bound NodeId");
return Nodes[NId];
}
const NodeEntry &getNode(NodeId NId) const {
assert(NId < Nodes.size() && "Out of bound NodeId");
return Nodes[NId];
}
EdgeEntry& getEdge(EdgeId EId) { return Edges[EId]; }
const EdgeEntry& getEdge(EdgeId EId) const { return Edges[EId]; }
NodeId addConstructedNode(NodeEntry N) {
NodeId NId = 0;
if (!FreeNodeIds.empty()) {
NId = FreeNodeIds.back();
FreeNodeIds.pop_back();
Nodes[NId] = std::move(N);
} else {
NId = Nodes.size();
Nodes.push_back(std::move(N));
}
return NId;
}
EdgeId addConstructedEdge(EdgeEntry E) {
assert(findEdge(E.getN1Id(), E.getN2Id()) == invalidEdgeId() &&
"Attempt to add duplicate edge.");
EdgeId EId = 0;
if (!FreeEdgeIds.empty()) {
EId = FreeEdgeIds.back();
FreeEdgeIds.pop_back();
Edges[EId] = std::move(E);
} else {
EId = Edges.size();
Edges.push_back(std::move(E));
}
EdgeEntry &NE = getEdge(EId);
// Add the edge to the adjacency sets of its nodes.
NE.connect(*this, EId);
return EId;
}
void operator=(const Graph &Other) {}
public:
using AdjEdgeItr = typename NodeEntry::AdjEdgeItr;
class NodeItr {
public:
using iterator_category = std::forward_iterator_tag;
using value_type = NodeId;
using difference_type = int;
using pointer = NodeId *;
using reference = NodeId &;
NodeItr(NodeId CurNId, const Graph &G)
: CurNId(CurNId), EndNId(G.Nodes.size()), FreeNodeIds(G.FreeNodeIds) {
this->CurNId = findNextInUse(CurNId); // Move to first in-use node id
}
bool operator==(const NodeItr &O) const { return CurNId == O.CurNId; }
bool operator!=(const NodeItr &O) const { return !(*this == O); }
NodeItr& operator++() { CurNId = findNextInUse(++CurNId); return *this; }
NodeId operator*() const { return CurNId; }
private:
NodeId findNextInUse(NodeId NId) const {
while (NId < EndNId && is_contained(FreeNodeIds, NId)) {
++NId;
}
return NId;
}
NodeId CurNId, EndNId;
const FreeNodeVector &FreeNodeIds;
};
class EdgeItr {
public:
EdgeItr(EdgeId CurEId, const Graph &G)
: CurEId(CurEId), EndEId(G.Edges.size()), FreeEdgeIds(G.FreeEdgeIds) {
this->CurEId = findNextInUse(CurEId); // Move to first in-use edge id
}
bool operator==(const EdgeItr &O) const { return CurEId == O.CurEId; }
bool operator!=(const EdgeItr &O) const { return !(*this == O); }
EdgeItr& operator++() { CurEId = findNextInUse(++CurEId); return *this; }
EdgeId operator*() const { return CurEId; }
private:
EdgeId findNextInUse(EdgeId EId) const {
while (EId < EndEId && is_contained(FreeEdgeIds, EId)) {
++EId;
}
return EId;
}
EdgeId CurEId, EndEId;
const FreeEdgeVector &FreeEdgeIds;
};
class NodeIdSet {
public:
NodeIdSet(const Graph &G) : G(G) {}
NodeItr begin() const { return NodeItr(0, G); }
NodeItr end() const { return NodeItr(G.Nodes.size(), G); }
bool empty() const { return G.Nodes.empty(); }
typename NodeVector::size_type size() const {
return G.Nodes.size() - G.FreeNodeIds.size();
}
private:
const Graph& G;
};
class EdgeIdSet {
public:
EdgeIdSet(const Graph &G) : G(G) {}
EdgeItr begin() const { return EdgeItr(0, G); }
EdgeItr end() const { return EdgeItr(G.Edges.size(), G); }
bool empty() const { return G.Edges.empty(); }
typename NodeVector::size_type size() const {
return G.Edges.size() - G.FreeEdgeIds.size();
}
private:
const Graph& G;
};
class AdjEdgeIdSet {
public:
AdjEdgeIdSet(const NodeEntry &NE) : NE(NE) {}
typename NodeEntry::AdjEdgeItr begin() const {
return NE.getAdjEdgeIds().begin();
}
typename NodeEntry::AdjEdgeItr end() const {
return NE.getAdjEdgeIds().end();
}
bool empty() const { return NE.getAdjEdgeIds().empty(); }
typename NodeEntry::AdjEdgeList::size_type size() const {
return NE.getAdjEdgeIds().size();
}
private:
const NodeEntry &NE;
};
/// Construct an empty PBQP graph.
Graph() = default;
/// Construct an empty PBQP graph with the given graph metadata.
Graph(GraphMetadata Metadata) : Metadata(std::move(Metadata)) {}
/// Get a reference to the graph metadata.
GraphMetadata& getMetadata() { return Metadata; }
/// Get a const-reference to the graph metadata.
const GraphMetadata& getMetadata() const { return Metadata; }
/// Lock this graph to the given solver instance in preparation
/// for running the solver. This method will call solver.handleAddNode for
/// each node in the graph, and handleAddEdge for each edge, to give the
/// solver an opportunity to set up any requried metadata.
void setSolver(SolverT &S) {
assert(!Solver && "Solver already set. Call unsetSolver().");
Solver = &S;
for (auto NId : nodeIds())
Solver->handleAddNode(NId);
for (auto EId : edgeIds())
Solver->handleAddEdge(EId);
}
/// Release from solver instance.
void unsetSolver() {
assert(Solver && "Solver not set.");
Solver = nullptr;
}
/// Add a node with the given costs.
/// @param Costs Cost vector for the new node.
/// @return Node iterator for the added node.
template <typename OtherVectorT>
NodeId addNode(OtherVectorT Costs) {
// Get cost vector from the problem domain
VectorPtr AllocatedCosts = CostAlloc.getVector(std::move(Costs));
NodeId NId = addConstructedNode(NodeEntry(AllocatedCosts));
if (Solver)
Solver->handleAddNode(NId);
return NId;
}
/// Add a node bypassing the cost allocator.
/// @param Costs Cost vector ptr for the new node (must be convertible to
/// VectorPtr).
/// @return Node iterator for the added node.
///
/// This method allows for fast addition of a node whose costs don't need
/// to be passed through the cost allocator. The most common use case for
/// this is when duplicating costs from an existing node (when using a
/// pooling allocator). These have already been uniqued, so we can avoid
/// re-constructing and re-uniquing them by attaching them directly to the
/// new node.
template <typename OtherVectorPtrT>
NodeId addNodeBypassingCostAllocator(OtherVectorPtrT Costs) {
NodeId NId = addConstructedNode(NodeEntry(Costs));
if (Solver)
Solver->handleAddNode(NId);
return NId;
}
/// Add an edge between the given nodes with the given costs.
/// @param N1Id First node.
/// @param N2Id Second node.
/// @param Costs Cost matrix for new edge.
/// @return Edge iterator for the added edge.
template <typename OtherVectorT>
EdgeId addEdge(NodeId N1Id, NodeId N2Id, OtherVectorT Costs) {
assert(getNodeCosts(N1Id).getLength() == Costs.getRows() &&
getNodeCosts(N2Id).getLength() == Costs.getCols() &&
"Matrix dimensions mismatch.");
// Get cost matrix from the problem domain.
MatrixPtr AllocatedCosts = CostAlloc.getMatrix(std::move(Costs));
EdgeId EId = addConstructedEdge(EdgeEntry(N1Id, N2Id, AllocatedCosts));
if (Solver)
Solver->handleAddEdge(EId);
return EId;
}
/// Add an edge bypassing the cost allocator.
/// @param N1Id First node.
/// @param N2Id Second node.
/// @param Costs Cost matrix for new edge.
/// @return Edge iterator for the added edge.
///
/// This method allows for fast addition of an edge whose costs don't need
/// to be passed through the cost allocator. The most common use case for
/// this is when duplicating costs from an existing edge (when using a
/// pooling allocator). These have already been uniqued, so we can avoid
/// re-constructing and re-uniquing them by attaching them directly to the
/// new edge.
template <typename OtherMatrixPtrT>
NodeId addEdgeBypassingCostAllocator(NodeId N1Id, NodeId N2Id,
OtherMatrixPtrT Costs) {
assert(getNodeCosts(N1Id).getLength() == Costs->getRows() &&
getNodeCosts(N2Id).getLength() == Costs->getCols() &&
"Matrix dimensions mismatch.");
// Get cost matrix from the problem domain.
EdgeId EId = addConstructedEdge(EdgeEntry(N1Id, N2Id, Costs));
if (Solver)
Solver->handleAddEdge(EId);
return EId;
}
/// Returns true if the graph is empty.
bool empty() const { return NodeIdSet(*this).empty(); }
NodeIdSet nodeIds() const { return NodeIdSet(*this); }
EdgeIdSet edgeIds() const { return EdgeIdSet(*this); }
AdjEdgeIdSet adjEdgeIds(NodeId NId) { return AdjEdgeIdSet(getNode(NId)); }
/// Get the number of nodes in the graph.
/// @return Number of nodes in the graph.
unsigned getNumNodes() const { return NodeIdSet(*this).size(); }
/// Get the number of edges in the graph.
/// @return Number of edges in the graph.
unsigned getNumEdges() const { return EdgeIdSet(*this).size(); }
/// Set a node's cost vector.
/// @param NId Node to update.
/// @param Costs New costs to set.
template <typename OtherVectorT>
void setNodeCosts(NodeId NId, OtherVectorT Costs) {
VectorPtr AllocatedCosts = CostAlloc.getVector(std::move(Costs));
if (Solver)
Solver->handleSetNodeCosts(NId, *AllocatedCosts);
getNode(NId).Costs = AllocatedCosts;
}
/// Get a VectorPtr to a node's cost vector. Rarely useful - use
/// getNodeCosts where possible.
/// @param NId Node id.
/// @return VectorPtr to node cost vector.
///
/// This method is primarily useful for duplicating costs quickly by
/// bypassing the cost allocator. See addNodeBypassingCostAllocator. Prefer
/// getNodeCosts when dealing with node cost values.
const VectorPtr& getNodeCostsPtr(NodeId NId) const {
return getNode(NId).Costs;
}
/// Get a node's cost vector.
/// @param NId Node id.
/// @return Node cost vector.
const Vector& getNodeCosts(NodeId NId) const {
return *getNodeCostsPtr(NId);
}
NodeMetadata& getNodeMetadata(NodeId NId) {
return getNode(NId).Metadata;
}
const NodeMetadata& getNodeMetadata(NodeId NId) const {
return getNode(NId).Metadata;
}
typename NodeEntry::AdjEdgeList::size_type getNodeDegree(NodeId NId) const {
return getNode(NId).getAdjEdgeIds().size();
}
/// Update an edge's cost matrix.
/// @param EId Edge id.
/// @param Costs New cost matrix.
template <typename OtherMatrixT>
void updateEdgeCosts(EdgeId EId, OtherMatrixT Costs) {
MatrixPtr AllocatedCosts = CostAlloc.getMatrix(std::move(Costs));
if (Solver)
Solver->handleUpdateCosts(EId, *AllocatedCosts);
getEdge(EId).Costs = AllocatedCosts;
}
/// Get a MatrixPtr to a node's cost matrix. Rarely useful - use
/// getEdgeCosts where possible.
/// @param EId Edge id.
/// @return MatrixPtr to edge cost matrix.
///
/// This method is primarily useful for duplicating costs quickly by
/// bypassing the cost allocator. See addNodeBypassingCostAllocator. Prefer
/// getEdgeCosts when dealing with edge cost values.
const MatrixPtr& getEdgeCostsPtr(EdgeId EId) const {
return getEdge(EId).Costs;
}
/// Get an edge's cost matrix.
/// @param EId Edge id.
/// @return Edge cost matrix.
const Matrix& getEdgeCosts(EdgeId EId) const {
return *getEdge(EId).Costs;
}
EdgeMetadata& getEdgeMetadata(EdgeId EId) {
return getEdge(EId).Metadata;
}
const EdgeMetadata& getEdgeMetadata(EdgeId EId) const {
return getEdge(EId).Metadata;
}
/// Get the first node connected to this edge.
/// @param EId Edge id.
/// @return The first node connected to the given edge.
NodeId getEdgeNode1Id(EdgeId EId) const {
return getEdge(EId).getN1Id();
}
/// Get the second node connected to this edge.
/// @param EId Edge id.
/// @return The second node connected to the given edge.
NodeId getEdgeNode2Id(EdgeId EId) const {
return getEdge(EId).getN2Id();
}
/// Get the "other" node connected to this edge.
/// @param EId Edge id.
/// @param NId Node id for the "given" node.
/// @return The iterator for the "other" node connected to this edge.
NodeId getEdgeOtherNodeId(EdgeId EId, NodeId NId) {
EdgeEntry &E = getEdge(EId);
if (E.getN1Id() == NId) {
return E.getN2Id();
} // else
return E.getN1Id();
}
/// Get the edge connecting two nodes.
/// @param N1Id First node id.
/// @param N2Id Second node id.
/// @return An id for edge (N1Id, N2Id) if such an edge exists,
/// otherwise returns an invalid edge id.
EdgeId findEdge(NodeId N1Id, NodeId N2Id) {
for (auto AEId : adjEdgeIds(N1Id)) {
if ((getEdgeNode1Id(AEId) == N2Id) ||
(getEdgeNode2Id(AEId) == N2Id)) {
return AEId;
}
}
return invalidEdgeId();
}
/// Remove a node from the graph.
/// @param NId Node id.
void removeNode(NodeId NId) {
if (Solver)
Solver->handleRemoveNode(NId);
NodeEntry &N = getNode(NId);
// TODO: Can this be for-each'd?
for (AdjEdgeItr AEItr = N.adjEdgesBegin(),
AEEnd = N.adjEdgesEnd();
AEItr != AEEnd;) {
EdgeId EId = *AEItr;
++AEItr;
removeEdge(EId);
}
FreeNodeIds.push_back(NId);
}
/// Disconnect an edge from the given node.
///
/// Removes the given edge from the adjacency list of the given node.
/// This operation leaves the edge in an 'asymmetric' state: It will no
/// longer appear in an iteration over the given node's (NId's) edges, but
/// will appear in an iteration over the 'other', unnamed node's edges.
///
/// This does not correspond to any normal graph operation, but exists to
/// support efficient PBQP graph-reduction based solvers. It is used to
/// 'effectively' remove the unnamed node from the graph while the solver
/// is performing the reduction. The solver will later call reconnectNode
/// to restore the edge in the named node's adjacency list.
///
/// Since the degree of a node is the number of connected edges,
/// disconnecting an edge from a node 'u' will cause the degree of 'u' to
/// drop by 1.
///
/// A disconnected edge WILL still appear in an iteration over the graph
/// edges.
///
/// A disconnected edge should not be removed from the graph, it should be
/// reconnected first.
///
/// A disconnected edge can be reconnected by calling the reconnectEdge
/// method.
void disconnectEdge(EdgeId EId, NodeId NId) {
if (Solver)
Solver->handleDisconnectEdge(EId, NId);
EdgeEntry &E = getEdge(EId);
E.disconnectFrom(*this, NId);
}
/// Convenience method to disconnect all neighbours from the given
/// node.
void disconnectAllNeighborsFromNode(NodeId NId) {
for (auto AEId : adjEdgeIds(NId))
disconnectEdge(AEId, getEdgeOtherNodeId(AEId, NId));
}
/// Re-attach an edge to its nodes.
///
/// Adds an edge that had been previously disconnected back into the
/// adjacency set of the nodes that the edge connects.
void reconnectEdge(EdgeId EId, NodeId NId) {
EdgeEntry &E = getEdge(EId);
E.connectTo(*this, EId, NId);
if (Solver)
Solver->handleReconnectEdge(EId, NId);
}
/// Remove an edge from the graph.
/// @param EId Edge id.
void removeEdge(EdgeId EId) {
if (Solver)
Solver->handleRemoveEdge(EId);
EdgeEntry &E = getEdge(EId);
E.disconnect();
FreeEdgeIds.push_back(EId);
Edges[EId].invalidate();
}
/// Remove all nodes and edges from the graph.
void clear() {
Nodes.clear();
FreeNodeIds.clear();
Edges.clear();
FreeEdgeIds.clear();
}
};
} // end namespace PBQP
} // end namespace llvm
#endif // LLVM_CODEGEN_PBQP_GRAPH_H
PK iwFZݯm � � CodeGen/PBQP/ReductionRules.hnu �[��� //===- ReductionRules.h - Reduction Rules -----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Reduction Rules.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_PBQP_REDUCTIONRULES_H
#define LLVM_CODEGEN_PBQP_REDUCTIONRULES_H
#include "Graph.h"
#include "Math.h"
#include "Solution.h"
#include <cassert>
#include <limits>
namespace llvm {
namespace PBQP {
/// Reduce a node of degree one.
///
/// Propagate costs from the given node, which must be of degree one, to its
/// neighbor. Notify the problem domain.
template <typename GraphT>
void applyR1(GraphT &G, typename GraphT::NodeId NId) {
using NodeId = typename GraphT::NodeId;
using EdgeId = typename GraphT::EdgeId;
using Vector = typename GraphT::Vector;
using Matrix = typename GraphT::Matrix;
using RawVector = typename GraphT::RawVector;
assert(G.getNodeDegree(NId) == 1 &&
"R1 applied to node with degree != 1.");
EdgeId EId = *G.adjEdgeIds(NId).begin();
NodeId MId = G.getEdgeOtherNodeId(EId, NId);
const Matrix &ECosts = G.getEdgeCosts(EId);
const Vector &XCosts = G.getNodeCosts(NId);
RawVector YCosts = G.getNodeCosts(MId);
// Duplicate a little to avoid transposing matrices.
if (NId == G.getEdgeNode1Id(EId)) {
for (unsigned j = 0; j < YCosts.getLength(); ++j) {
PBQPNum Min = ECosts[0][j] + XCosts[0];
for (unsigned i = 1; i < XCosts.getLength(); ++i) {
PBQPNum C = ECosts[i][j] + XCosts[i];
if (C < Min)
Min = C;
}
YCosts[j] += Min;
}
} else {
for (unsigned i = 0; i < YCosts.getLength(); ++i) {
PBQPNum Min = ECosts[i][0] + XCosts[0];
for (unsigned j = 1; j < XCosts.getLength(); ++j) {
PBQPNum C = ECosts[i][j] + XCosts[j];
if (C < Min)
Min = C;
}
YCosts[i] += Min;
}
}
G.setNodeCosts(MId, YCosts);
G.disconnectEdge(EId, MId);
}
template <typename GraphT>
void applyR2(GraphT &G, typename GraphT::NodeId NId) {
using NodeId = typename GraphT::NodeId;
using EdgeId = typename GraphT::EdgeId;
using Vector = typename GraphT::Vector;
using Matrix = typename GraphT::Matrix;
using RawMatrix = typename GraphT::RawMatrix;
assert(G.getNodeDegree(NId) == 2 &&
"R2 applied to node with degree != 2.");
const Vector &XCosts = G.getNodeCosts(NId);
typename GraphT::AdjEdgeItr AEItr = G.adjEdgeIds(NId).begin();
EdgeId YXEId = *AEItr,
ZXEId = *(++AEItr);
NodeId YNId = G.getEdgeOtherNodeId(YXEId, NId),
ZNId = G.getEdgeOtherNodeId(ZXEId, NId);
bool FlipEdge1 = (G.getEdgeNode1Id(YXEId) == NId),
FlipEdge2 = (G.getEdgeNode1Id(ZXEId) == NId);
const Matrix *YXECosts = FlipEdge1 ?
new Matrix(G.getEdgeCosts(YXEId).transpose()) :
&G.getEdgeCosts(YXEId);
const Matrix *ZXECosts = FlipEdge2 ?
new Matrix(G.getEdgeCosts(ZXEId).transpose()) :
&G.getEdgeCosts(ZXEId);
unsigned XLen = XCosts.getLength(),
YLen = YXECosts->getRows(),
ZLen = ZXECosts->getRows();
RawMatrix Delta(YLen, ZLen);
for (unsigned i = 0; i < YLen; ++i) {
for (unsigned j = 0; j < ZLen; ++j) {
PBQPNum Min = (*YXECosts)[i][0] + (*ZXECosts)[j][0] + XCosts[0];
for (unsigned k = 1; k < XLen; ++k) {
PBQPNum C = (*YXECosts)[i][k] + (*ZXECosts)[j][k] + XCosts[k];
if (C < Min) {
Min = C;
}
}
Delta[i][j] = Min;
}
}
if (FlipEdge1)
delete YXECosts;
if (FlipEdge2)
delete ZXECosts;
EdgeId YZEId = G.findEdge(YNId, ZNId);
if (YZEId == G.invalidEdgeId()) {
YZEId = G.addEdge(YNId, ZNId, Delta);
} else {
const Matrix &YZECosts = G.getEdgeCosts(YZEId);
if (YNId == G.getEdgeNode1Id(YZEId)) {
G.updateEdgeCosts(YZEId, Delta + YZECosts);
} else {
G.updateEdgeCosts(YZEId, Delta.transpose() + YZECosts);
}
}
G.disconnectEdge(YXEId, YNId);
G.disconnectEdge(ZXEId, ZNId);
// TODO: Try to normalize newly added/modified edge.
}
#ifndef NDEBUG
// Does this Cost vector have any register options ?
template <typename VectorT>
bool hasRegisterOptions(const VectorT &V) {
unsigned VL = V.getLength();
// An empty or spill only cost vector does not provide any register option.
if (VL <= 1)
return false;
// If there are registers in the cost vector, but all of them have infinite
// costs, then ... there is no available register.
for (unsigned i = 1; i < VL; ++i)
if (V[i] != std::numeric_limits<PBQP::PBQPNum>::infinity())
return true;
return false;
}
#endif
// Find a solution to a fully reduced graph by backpropagation.
//
// Given a graph and a reduction order, pop each node from the reduction
// order and greedily compute a minimum solution based on the node costs, and
// the dependent costs due to previously solved nodes.
//
// Note - This does not return the graph to its original (pre-reduction)
// state: the existing solvers destructively alter the node and edge
// costs. Given that, the backpropagate function doesn't attempt to
// replace the edges either, but leaves the graph in its reduced
// state.
template <typename GraphT, typename StackT>
Solution backpropagate(GraphT& G, StackT stack) {
using NodeId = GraphBase::NodeId;
using Matrix = typename GraphT::Matrix;
using RawVector = typename GraphT::RawVector;
Solution s;
while (!stack.empty()) {
NodeId NId = stack.back();
stack.pop_back();
RawVector v = G.getNodeCosts(NId);
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
// Although a conservatively allocatable node can be allocated to a register,
// spilling it may provide a lower cost solution. Assert here that spilling
// is done by choice, not because there were no register available.
if (G.getNodeMetadata(NId).wasConservativelyAllocatable())
assert(hasRegisterOptions(v) && "A conservatively allocatable node "
"must have available register options");
#endif
for (auto EId : G.adjEdgeIds(NId)) {
const Matrix& edgeCosts = G.getEdgeCosts(EId);
if (NId == G.getEdgeNode1Id(EId)) {
NodeId mId = G.getEdgeNode2Id(EId);
v += edgeCosts.getColAsVector(s.getSelection(mId));
} else {
NodeId mId = G.getEdgeNode1Id(EId);
v += edgeCosts.getRowAsVector(s.getSelection(mId));
}
}
s.setSelection(NId, v.minIndex());
}
return s;
}
} // end namespace PBQP
} // end namespace llvm
#endif // LLVM_CODEGEN_PBQP_REDUCTIONRULES_H
PK iwFZCe�� � CodeGen/PBQP/Solution.hnu �[��� //===- Solution.h - PBQP Solution -------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// PBQP Solution class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_PBQP_SOLUTION_H
#define LLVM_CODEGEN_PBQP_SOLUTION_H
#include "llvm/CodeGen/PBQP/Graph.h"
#include <cassert>
#include <map>
namespace llvm {
namespace PBQP {
/// Represents a solution to a PBQP problem.
///
/// To get the selection for each node in the problem use the getSelection method.
class Solution {
private:
using SelectionsMap = std::map<GraphBase::NodeId, unsigned>;
SelectionsMap selections;
public:
/// Initialise an empty solution.
Solution() = default;
/// Set the selection for a given node.
/// @param nodeId Node id.
/// @param selection Selection for nodeId.
void setSelection(GraphBase::NodeId nodeId, unsigned selection) {
selections[nodeId] = selection;
}
/// Get a node's selection.
/// @param nodeId Node id.
/// @return The selection for nodeId;
unsigned getSelection(GraphBase::NodeId nodeId) const {
SelectionsMap::const_iterator sItr = selections.find(nodeId);
assert(sItr != selections.end() && "No selection for node.");
return sItr->second;
}
};
} // end namespace PBQP
} // end namespace llvm
#endif // LLVM_CODEGEN_PBQP_SOLUTION_H
PK iwFZ�[�u �u CodeGen/ScheduleDAG.hnu �[��� //===- llvm/CodeGen/ScheduleDAG.h - Common Base Class -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file Implements the ScheduleDAG class, which is used as the common base
/// class for instruction schedulers. This encapsulates the scheduling DAG,
/// which is shared between SelectionDAG and MachineInstr scheduling.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_SCHEDULEDAG_H
#define LLVM_CODEGEN_SCHEDULEDAG_H
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/PointerIntPair.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/iterator.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/TargetLowering.h"
#include "llvm/Support/ErrorHandling.h"
#include <cassert>
#include <cstddef>
#include <iterator>
#include <string>
#include <vector>
namespace llvm {
template <class GraphType> struct GraphTraits;
template<class Graph> class GraphWriter;
class LLVMTargetMachine;
class MachineFunction;
class MachineRegisterInfo;
class MCInstrDesc;
struct MCSchedClassDesc;
class SDNode;
class SUnit;
class ScheduleDAG;
class TargetInstrInfo;
class TargetRegisterClass;
class TargetRegisterInfo;
/// Scheduling dependency. This represents one direction of an edge in the
/// scheduling DAG.
class SDep {
public:
/// These are the different kinds of scheduling dependencies.
enum Kind {
Data, ///< Regular data dependence (aka true-dependence).
Anti, ///< A register anti-dependence (aka WAR).
Output, ///< A register output-dependence (aka WAW).
Order ///< Any other ordering dependency.
};
// Strong dependencies must be respected by the scheduler. Artificial
// dependencies may be removed only if they are redundant with another
// strong dependence.
//
// Weak dependencies may be violated by the scheduling strategy, but only if
// the strategy can prove it is correct to do so.
//
// Strong OrderKinds must occur before "Weak".
// Weak OrderKinds must occur after "Weak".
enum OrderKind {
Barrier, ///< An unknown scheduling barrier.
MayAliasMem, ///< Nonvolatile load/Store instructions that may alias.
MustAliasMem, ///< Nonvolatile load/Store instructions that must alias.
Artificial, ///< Arbitrary strong DAG edge (no real dependence).
Weak, ///< Arbitrary weak DAG edge.
Cluster ///< Weak DAG edge linking a chain of clustered instrs.
};
private:
/// A pointer to the depending/depended-on SUnit, and an enum
/// indicating the kind of the dependency.
PointerIntPair<SUnit *, 2, Kind> Dep;
/// A union discriminated by the dependence kind.
union {
/// For Data, Anti, and Output dependencies, the associated register. For
/// Data dependencies that don't currently have a register/ assigned, this
/// is set to zero.
unsigned Reg;
/// Additional information about Order dependencies.
unsigned OrdKind; // enum OrderKind
} Contents;
/// The time associated with this edge. Often this is just the value of the
/// Latency field of the predecessor, however advanced models may provide
/// additional information about specific edges.
unsigned Latency = 0u;
public:
/// Constructs a null SDep. This is only for use by container classes which
/// require default constructors. SUnits may not/ have null SDep edges.
SDep() : Dep(nullptr, Data) {}
/// Constructs an SDep with the specified values.
SDep(SUnit *S, Kind kind, unsigned Reg)
: Dep(S, kind), Contents() {
switch (kind) {
default:
llvm_unreachable("Reg given for non-register dependence!");
case Anti:
case Output:
assert(Reg != 0 &&
"SDep::Anti and SDep::Output must use a non-zero Reg!");
Contents.Reg = Reg;
Latency = 0;
break;
case Data:
Contents.Reg = Reg;
Latency = 1;
break;
}
}
SDep(SUnit *S, OrderKind kind)
: Dep(S, Order), Contents(), Latency(0) {
Contents.OrdKind = kind;
}
/// Returns true if the specified SDep is equivalent except for latency.
bool overlaps(const SDep &Other) const;
bool operator==(const SDep &Other) const {
return overlaps(Other) && Latency == Other.Latency;
}
bool operator!=(const SDep &Other) const {
return !operator==(Other);
}
/// Returns the latency value for this edge, which roughly means the
/// minimum number of cycles that must elapse between the predecessor and
/// the successor, given that they have this edge between them.
unsigned getLatency() const {
return Latency;
}
/// Sets the latency for this edge.
void setLatency(unsigned Lat) {
Latency = Lat;
}
//// Returns the SUnit to which this edge points.
SUnit *getSUnit() const;
//// Assigns the SUnit to which this edge points.
void setSUnit(SUnit *SU);
/// Returns an enum value representing the kind of the dependence.
Kind getKind() const;
/// Shorthand for getKind() != SDep::Data.
bool isCtrl() const {
return getKind() != Data;
}
/// Tests if this is an Order dependence between two memory accesses
/// where both sides of the dependence access memory in non-volatile and
/// fully modeled ways.
bool isNormalMemory() const {
return getKind() == Order && (Contents.OrdKind == MayAliasMem
|| Contents.OrdKind == MustAliasMem);
}
/// Tests if this is an Order dependence that is marked as a barrier.
bool isBarrier() const {
return getKind() == Order && Contents.OrdKind == Barrier;
}
/// Tests if this is could be any kind of memory dependence.
bool isNormalMemoryOrBarrier() const {
return (isNormalMemory() || isBarrier());
}
/// Tests if this is an Order dependence that is marked as
/// "must alias", meaning that the SUnits at either end of the edge have a
/// memory dependence on a known memory location.
bool isMustAlias() const {
return getKind() == Order && Contents.OrdKind == MustAliasMem;
}
/// Tests if this a weak dependence. Weak dependencies are considered DAG
/// edges for height computation and other heuristics, but do not force
/// ordering. Breaking a weak edge may require the scheduler to compensate,
/// for example by inserting a copy.
bool isWeak() const {
return getKind() == Order && Contents.OrdKind >= Weak;
}
/// Tests if this is an Order dependence that is marked as
/// "artificial", meaning it isn't necessary for correctness.
bool isArtificial() const {
return getKind() == Order && Contents.OrdKind == Artificial;
}
/// Tests if this is an Order dependence that is marked as "cluster",
/// meaning it is artificial and wants to be adjacent.
bool isCluster() const {
return getKind() == Order && Contents.OrdKind == Cluster;
}
/// Tests if this is a Data dependence that is associated with a register.
bool isAssignedRegDep() const {
return getKind() == Data && Contents.Reg != 0;
}
/// Returns the register associated with this edge. This is only valid on
/// Data, Anti, and Output edges. On Data edges, this value may be zero,
/// meaning there is no associated register.
unsigned getReg() const {
assert((getKind() == Data || getKind() == Anti || getKind() == Output) &&
"getReg called on non-register dependence edge!");
return Contents.Reg;
}
/// Assigns the associated register for this edge. This is only valid on
/// Data, Anti, and Output edges. On Anti and Output edges, this value must
/// not be zero. On Data edges, the value may be zero, which would mean that
/// no specific register is associated with this edge.
void setReg(unsigned Reg) {
assert((getKind() == Data || getKind() == Anti || getKind() == Output) &&
"setReg called on non-register dependence edge!");
assert((getKind() != Anti || Reg != 0) &&
"SDep::Anti edge cannot use the zero register!");
assert((getKind() != Output || Reg != 0) &&
"SDep::Output edge cannot use the zero register!");
Contents.Reg = Reg;
}
void dump(const TargetRegisterInfo *TRI = nullptr) const;
};
/// Scheduling unit. This is a node in the scheduling DAG.
class SUnit {
private:
enum : unsigned { BoundaryID = ~0u };
SDNode *Node = nullptr; ///< Representative node.
MachineInstr *Instr = nullptr; ///< Alternatively, a MachineInstr.
public:
SUnit *OrigNode = nullptr; ///< If not this, the node from which this node
/// was cloned. (SD scheduling only)
const MCSchedClassDesc *SchedClass =
nullptr; ///< nullptr or resolved SchedClass.
SmallVector<SDep, 4> Preds; ///< All sunit predecessors.
SmallVector<SDep, 4> Succs; ///< All sunit successors.
typedef SmallVectorImpl<SDep>::iterator pred_iterator;
typedef SmallVectorImpl<SDep>::iterator succ_iterator;
typedef SmallVectorImpl<SDep>::const_iterator const_pred_iterator;
typedef SmallVectorImpl<SDep>::const_iterator const_succ_iterator;
unsigned NodeNum = BoundaryID; ///< Entry # of node in the node vector.
unsigned NodeQueueId = 0; ///< Queue id of node.
unsigned NumPreds = 0; ///< # of SDep::Data preds.
unsigned NumSuccs = 0; ///< # of SDep::Data sucss.
unsigned NumPredsLeft = 0; ///< # of preds not scheduled.
unsigned NumSuccsLeft = 0; ///< # of succs not scheduled.
unsigned WeakPredsLeft = 0; ///< # of weak preds not scheduled.
unsigned WeakSuccsLeft = 0; ///< # of weak succs not scheduled.
unsigned short NumRegDefsLeft = 0; ///< # of reg defs with no scheduled use.
unsigned short Latency = 0; ///< Node latency.
bool isVRegCycle : 1; ///< May use and def the same vreg.
bool isCall : 1; ///< Is a function call.
bool isCallOp : 1; ///< Is a function call operand.
bool isTwoAddress : 1; ///< Is a two-address instruction.
bool isCommutable : 1; ///< Is a commutable instruction.
bool hasPhysRegUses : 1; ///< Has physreg uses.
bool hasPhysRegDefs : 1; ///< Has physreg defs that are being used.
bool hasPhysRegClobbers : 1; ///< Has any physreg defs, used or not.
bool isPending : 1; ///< True once pending.
bool isAvailable : 1; ///< True once available.
bool isScheduled : 1; ///< True once scheduled.
bool isScheduleHigh : 1; ///< True if preferable to schedule high.
bool isScheduleLow : 1; ///< True if preferable to schedule low.
bool isCloned : 1; ///< True if this node has been cloned.
bool isUnbuffered : 1; ///< Uses an unbuffered resource.
bool hasReservedResource : 1; ///< Uses a reserved resource.
Sched::Preference SchedulingPref = Sched::None; ///< Scheduling preference.
private:
bool isDepthCurrent : 1; ///< True if Depth is current.
bool isHeightCurrent : 1; ///< True if Height is current.
unsigned Depth = 0; ///< Node depth.
unsigned Height = 0; ///< Node height.
public:
unsigned TopReadyCycle = 0; ///< Cycle relative to start when node is ready.
unsigned BotReadyCycle = 0; ///< Cycle relative to end when node is ready.
const TargetRegisterClass *CopyDstRC =
nullptr; ///< Is a special copy node if != nullptr.
const TargetRegisterClass *CopySrcRC = nullptr;
/// Constructs an SUnit for pre-regalloc scheduling to represent an
/// SDNode and any nodes flagged to it.
SUnit(SDNode *node, unsigned nodenum)
: Node(node), NodeNum(nodenum), isVRegCycle(false), isCall(false),
isCallOp(false), isTwoAddress(false), isCommutable(false),
hasPhysRegUses(false), hasPhysRegDefs(false), hasPhysRegClobbers(false),
isPending(false), isAvailable(false), isScheduled(false),
isScheduleHigh(false), isScheduleLow(false), isCloned(false),
isUnbuffered(false), hasReservedResource(false), isDepthCurrent(false),
isHeightCurrent(false) {}
/// Constructs an SUnit for post-regalloc scheduling to represent a
/// MachineInstr.
SUnit(MachineInstr *instr, unsigned nodenum)
: Instr(instr), NodeNum(nodenum), isVRegCycle(false), isCall(false),
isCallOp(false), isTwoAddress(false), isCommutable(false),
hasPhysRegUses(false), hasPhysRegDefs(false), hasPhysRegClobbers(false),
isPending(false), isAvailable(false), isScheduled(false),
isScheduleHigh(false), isScheduleLow(false), isCloned(false),
isUnbuffered(false), hasReservedResource(false), isDepthCurrent(false),
isHeightCurrent(false) {}
/// Constructs a placeholder SUnit.
SUnit()
: isVRegCycle(false), isCall(false), isCallOp(false), isTwoAddress(false),
isCommutable(false), hasPhysRegUses(false), hasPhysRegDefs(false),
hasPhysRegClobbers(false), isPending(false), isAvailable(false),
isScheduled(false), isScheduleHigh(false), isScheduleLow(false),
isCloned(false), isUnbuffered(false), hasReservedResource(false),
isDepthCurrent(false), isHeightCurrent(false) {}
/// Boundary nodes are placeholders for the boundary of the
/// scheduling region.
///
/// BoundaryNodes can have DAG edges, including Data edges, but they do not
/// correspond to schedulable entities (e.g. instructions) and do not have a
/// valid ID. Consequently, always check for boundary nodes before accessing
/// an associative data structure keyed on node ID.
bool isBoundaryNode() const { return NodeNum == BoundaryID; }
/// Assigns the representative SDNode for this SUnit. This may be used
/// during pre-regalloc scheduling.
void setNode(SDNode *N) {
assert(!Instr && "Setting SDNode of SUnit with MachineInstr!");
Node = N;
}
/// Returns the representative SDNode for this SUnit. This may be used
/// during pre-regalloc scheduling.
SDNode *getNode() const {
assert(!Instr && "Reading SDNode of SUnit with MachineInstr!");
return Node;
}
/// Returns true if this SUnit refers to a machine instruction as
/// opposed to an SDNode.
bool isInstr() const { return Instr; }
/// Assigns the instruction for the SUnit. This may be used during
/// post-regalloc scheduling.
void setInstr(MachineInstr *MI) {
assert(!Node && "Setting MachineInstr of SUnit with SDNode!");
Instr = MI;
}
/// Returns the representative MachineInstr for this SUnit. This may be used
/// during post-regalloc scheduling.
MachineInstr *getInstr() const {
assert(!Node && "Reading MachineInstr of SUnit with SDNode!");
return Instr;
}
/// Adds the specified edge as a pred of the current node if not already.
/// It also adds the current node as a successor of the specified node.
bool addPred(const SDep &D, bool Required = true);
/// Adds a barrier edge to SU by calling addPred(), with latency 0
/// generally or latency 1 for a store followed by a load.
bool addPredBarrier(SUnit *SU) {
SDep Dep(SU, SDep::Barrier);
unsigned TrueMemOrderLatency =
((SU->getInstr()->mayStore() && this->getInstr()->mayLoad()) ? 1 : 0);
Dep.setLatency(TrueMemOrderLatency);
return addPred(Dep);
}
/// Removes the specified edge as a pred of the current node if it exists.
/// It also removes the current node as a successor of the specified node.
void removePred(const SDep &D);
/// Returns the depth of this node, which is the length of the maximum path
/// up to any node which has no predecessors.
unsigned getDepth() const {
if (!isDepthCurrent)
const_cast<SUnit *>(this)->ComputeDepth();
return Depth;
}
/// Returns the height of this node, which is the length of the
/// maximum path down to any node which has no successors.
unsigned getHeight() const {
if (!isHeightCurrent)
const_cast<SUnit *>(this)->ComputeHeight();
return Height;
}
/// If NewDepth is greater than this node's depth value, sets it to
/// be the new depth value. This also recursively marks successor nodes
/// dirty.
void setDepthToAtLeast(unsigned NewDepth);
/// If NewHeight is greater than this node's height value, set it to be
/// the new height value. This also recursively marks predecessor nodes
/// dirty.
void setHeightToAtLeast(unsigned NewHeight);
/// Sets a flag in this node to indicate that its stored Depth value
/// will require recomputation the next time getDepth() is called.
void setDepthDirty();
/// Sets a flag in this node to indicate that its stored Height value
/// will require recomputation the next time getHeight() is called.
void setHeightDirty();
/// Tests if node N is a predecessor of this node.
bool isPred(const SUnit *N) const {
for (const SDep &Pred : Preds)
if (Pred.getSUnit() == N)
return true;
return false;
}
/// Tests if node N is a successor of this node.
bool isSucc(const SUnit *N) const {
for (const SDep &Succ : Succs)
if (Succ.getSUnit() == N)
return true;
return false;
}
bool isTopReady() const {
return NumPredsLeft == 0;
}
bool isBottomReady() const {
return NumSuccsLeft == 0;
}
/// Orders this node's predecessor edges such that the critical path
/// edge occurs first.
void biasCriticalPath();
void dumpAttributes() const;
private:
void ComputeDepth();
void ComputeHeight();
};
/// Returns true if the specified SDep is equivalent except for latency.
inline bool SDep::overlaps(const SDep &Other) const {
if (Dep != Other.Dep)
return false;
switch (Dep.getInt()) {
case Data:
case Anti:
case Output:
return Contents.Reg == Other.Contents.Reg;
case Order:
return Contents.OrdKind == Other.Contents.OrdKind;
}
llvm_unreachable("Invalid dependency kind!");
}
//// Returns the SUnit to which this edge points.
inline SUnit *SDep::getSUnit() const { return Dep.getPointer(); }
//// Assigns the SUnit to which this edge points.
inline void SDep::setSUnit(SUnit *SU) { Dep.setPointer(SU); }
/// Returns an enum value representing the kind of the dependence.
inline SDep::Kind SDep::getKind() const { return Dep.getInt(); }
//===--------------------------------------------------------------------===//
/// This interface is used to plug different priorities computation
/// algorithms into the list scheduler. It implements the interface of a
/// standard priority queue, where nodes are inserted in arbitrary order and
/// returned in priority order. The computation of the priority and the
/// representation of the queue are totally up to the implementation to
/// decide.
class SchedulingPriorityQueue {
virtual void anchor();
unsigned CurCycle = 0;
bool HasReadyFilter;
public:
SchedulingPriorityQueue(bool rf = false) : HasReadyFilter(rf) {}
virtual ~SchedulingPriorityQueue() = default;
virtual bool isBottomUp() const = 0;
virtual void initNodes(std::vector<SUnit> &SUnits) = 0;
virtual void addNode(const SUnit *SU) = 0;
virtual void updateNode(const SUnit *SU) = 0;
virtual void releaseState() = 0;
virtual bool empty() const = 0;
bool hasReadyFilter() const { return HasReadyFilter; }
virtual bool tracksRegPressure() const { return false; }
virtual bool isReady(SUnit *) const {
assert(!HasReadyFilter && "The ready filter must override isReady()");
return true;
}
virtual void push(SUnit *U) = 0;
void push_all(const std::vector<SUnit *> &Nodes) {
for (SUnit *SU : Nodes)
push(SU);
}
virtual SUnit *pop() = 0;
virtual void remove(SUnit *SU) = 0;
virtual void dump(ScheduleDAG *) const {}
/// As each node is scheduled, this method is invoked. This allows the
/// priority function to adjust the priority of related unscheduled nodes,
/// for example.
virtual void scheduledNode(SUnit *) {}
virtual void unscheduledNode(SUnit *) {}
void setCurCycle(unsigned Cycle) {
CurCycle = Cycle;
}
unsigned getCurCycle() const {
return CurCycle;
}
};
class ScheduleDAG {
public:
const LLVMTargetMachine &TM; ///< Target processor
const TargetInstrInfo *TII; ///< Target instruction information
const TargetRegisterInfo *TRI; ///< Target processor register info
MachineFunction &MF; ///< Machine function
MachineRegisterInfo &MRI; ///< Virtual/real register map
std::vector<SUnit> SUnits; ///< The scheduling units.
SUnit EntrySU; ///< Special node for the region entry.
SUnit ExitSU; ///< Special node for the region exit.
#ifdef NDEBUG
static const bool StressSched = false;
#else
bool StressSched;
#endif
// This class is designed to be passed by reference only. Copy constructor
// is declared as deleted here to make the derived classes have deleted
// implicit-declared copy constructor, which suppresses the warnings from
// static analyzer when the derived classes own resources that are freed in
// their destructors, but don't have user-written copy constructors (rule
// of three).
ScheduleDAG(const ScheduleDAG &) = delete;
ScheduleDAG &operator=(const ScheduleDAG &) = delete;
explicit ScheduleDAG(MachineFunction &mf);
virtual ~ScheduleDAG();
/// Clears the DAG state (between regions).
void clearDAG();
/// Returns the MCInstrDesc of this SUnit.
/// Returns NULL for SDNodes without a machine opcode.
const MCInstrDesc *getInstrDesc(const SUnit *SU) const {
if (SU->isInstr()) return &SU->getInstr()->getDesc();
return getNodeDesc(SU->getNode());
}
/// Pops up a GraphViz/gv window with the ScheduleDAG rendered using 'dot'.
virtual void viewGraph(const Twine &Name, const Twine &Title);
virtual void viewGraph();
virtual void dumpNode(const SUnit &SU) const = 0;
virtual void dump() const = 0;
void dumpNodeName(const SUnit &SU) const;
/// Returns a label for an SUnit node in a visualization of the ScheduleDAG.
virtual std::string getGraphNodeLabel(const SUnit *SU) const = 0;
/// Returns a label for the region of code covered by the DAG.
virtual std::string getDAGName() const = 0;
/// Adds custom features for a visualization of the ScheduleDAG.
virtual void addCustomGraphFeatures(GraphWriter<ScheduleDAG*> &) const {}
#ifndef NDEBUG
/// Verifies that all SUnits were scheduled and that their state is
/// consistent. Returns the number of scheduled SUnits.
unsigned VerifyScheduledDAG(bool isBottomUp);
#endif
protected:
void dumpNodeAll(const SUnit &SU) const;
private:
/// Returns the MCInstrDesc of this SDNode or NULL.
const MCInstrDesc *getNodeDesc(const SDNode *Node) const;
};
class SUnitIterator {
SUnit *Node;
unsigned Operand;
SUnitIterator(SUnit *N, unsigned Op) : Node(N), Operand(Op) {}
public:
using iterator_category = std::forward_iterator_tag;
using value_type = SUnit;
using difference_type = std::ptrdiff_t;
using pointer = value_type *;
using reference = value_type &;
bool operator==(const SUnitIterator& x) const {
return Operand == x.Operand;
}
bool operator!=(const SUnitIterator& x) const { return !operator==(x); }
pointer operator*() const {
return Node->Preds[Operand].getSUnit();
}
pointer operator->() const { return operator*(); }
SUnitIterator& operator++() { // Preincrement
++Operand;
return *this;
}
SUnitIterator operator++(int) { // Postincrement
SUnitIterator tmp = *this; ++*this; return tmp;
}
static SUnitIterator begin(SUnit *N) { return SUnitIterator(N, 0); }
static SUnitIterator end (SUnit *N) {
return SUnitIterator(N, (unsigned)N->Preds.size());
}
unsigned getOperand() const { return Operand; }
const SUnit *getNode() const { return Node; }
/// Tests if this is not an SDep::Data dependence.
bool isCtrlDep() const {
return getSDep().isCtrl();
}
bool isArtificialDep() const {
return getSDep().isArtificial();
}
const SDep &getSDep() const {
return Node->Preds[Operand];
}
};
template <> struct GraphTraits<SUnit*> {
typedef SUnit *NodeRef;
typedef SUnitIterator ChildIteratorType;
static NodeRef getEntryNode(SUnit *N) { return N; }
static ChildIteratorType child_begin(NodeRef N) {
return SUnitIterator::begin(N);
}
static ChildIteratorType child_end(NodeRef N) {
return SUnitIterator::end(N);
}
};
template <> struct GraphTraits<ScheduleDAG*> : public GraphTraits<SUnit*> {
typedef pointer_iterator<std::vector<SUnit>::iterator> nodes_iterator;
static nodes_iterator nodes_begin(ScheduleDAG *G) {
return nodes_iterator(G->SUnits.begin());
}
static nodes_iterator nodes_end(ScheduleDAG *G) {
return nodes_iterator(G->SUnits.end());
}
};
/// This class can compute a topological ordering for SUnits and provides
/// methods for dynamically updating the ordering as new edges are added.
///
/// This allows a very fast implementation of IsReachable, for example.
class ScheduleDAGTopologicalSort {
/// A reference to the ScheduleDAG's SUnits.
std::vector<SUnit> &SUnits;
SUnit *ExitSU;
// Have any new nodes been added?
bool Dirty = false;
// Outstanding added edges, that have not been applied to the ordering.
SmallVector<std::pair<SUnit *, SUnit *>, 16> Updates;
/// Maps topological index to the node number.
std::vector<int> Index2Node;
/// Maps the node number to its topological index.
std::vector<int> Node2Index;
/// a set of nodes visited during a DFS traversal.
BitVector Visited;
/// Makes a DFS traversal and mark all nodes affected by the edge insertion.
/// These nodes will later get new topological indexes by means of the Shift
/// method.
void DFS(const SUnit *SU, int UpperBound, bool& HasLoop);
/// Reassigns topological indexes for the nodes in the DAG to
/// preserve the topological ordering.
void Shift(BitVector& Visited, int LowerBound, int UpperBound);
/// Assigns the topological index to the node n.
void Allocate(int n, int index);
/// Fix the ordering, by either recomputing from scratch or by applying
/// any outstanding updates. Uses a heuristic to estimate what will be
/// cheaper.
void FixOrder();
public:
ScheduleDAGTopologicalSort(std::vector<SUnit> &SUnits, SUnit *ExitSU);
/// Add a SUnit without predecessors to the end of the topological order. It
/// also must be the first new node added to the DAG.
void AddSUnitWithoutPredecessors(const SUnit *SU);
/// Creates the initial topological ordering from the DAG to be scheduled.
void InitDAGTopologicalSorting();
/// Returns an array of SUs that are both in the successor
/// subtree of StartSU and in the predecessor subtree of TargetSU.
/// StartSU and TargetSU are not in the array.
/// Success is false if TargetSU is not in the successor subtree of
/// StartSU, else it is true.
std::vector<int> GetSubGraph(const SUnit &StartSU, const SUnit &TargetSU,
bool &Success);
/// Checks if \p SU is reachable from \p TargetSU.
bool IsReachable(const SUnit *SU, const SUnit *TargetSU);
/// Returns true if addPred(TargetSU, SU) creates a cycle.
bool WillCreateCycle(SUnit *TargetSU, SUnit *SU);
/// Updates the topological ordering to accommodate an edge to be
/// added from SUnit \p X to SUnit \p Y.
void AddPred(SUnit *Y, SUnit *X);
/// Queues an update to the topological ordering to accommodate an edge to
/// be added from SUnit \p X to SUnit \p Y.
void AddPredQueued(SUnit *Y, SUnit *X);
/// Updates the topological ordering to accommodate an an edge to be
/// removed from the specified node \p N from the predecessors of the
/// current node \p M.
void RemovePred(SUnit *M, SUnit *N);
/// Mark the ordering as temporarily broken, after a new node has been
/// added.
void MarkDirty() { Dirty = true; }
typedef std::vector<int>::iterator iterator;
typedef std::vector<int>::const_iterator const_iterator;
iterator begin() { return Index2Node.begin(); }
const_iterator begin() const { return Index2Node.begin(); }
iterator end() { return Index2Node.end(); }
const_iterator end() const { return Index2Node.end(); }
typedef std::vector<int>::reverse_iterator reverse_iterator;
typedef std::vector<int>::const_reverse_iterator const_reverse_iterator;
reverse_iterator rbegin() { return Index2Node.rbegin(); }
const_reverse_iterator rbegin() const { return Index2Node.rbegin(); }
reverse_iterator rend() { return Index2Node.rend(); }
const_reverse_iterator rend() const { return Index2Node.rend(); }
};
} // end namespace llvm
#endif // LLVM_CODEGEN_SCHEDULEDAG_H
PK iwFZ�%�� � CodeGen/MIRPrinter.hnu �[��� //===- MIRPrinter.h - MIR serialization format printer ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the functions that print out the LLVM IR and the machine
// functions using the MIR serialization format.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MIRPRINTER_H
#define LLVM_CODEGEN_MIRPRINTER_H
namespace llvm {
class MachineBasicBlock;
class MachineFunction;
class Module;
class raw_ostream;
template <typename T> class SmallVectorImpl;
/// Print LLVM IR using the MIR serialization format to the given output stream.
void printMIR(raw_ostream &OS, const Module &M);
/// Print a machine function using the MIR serialization format to the given
/// output stream.
void printMIR(raw_ostream &OS, const MachineFunction &MF);
/// Determine a possible list of successors of a basic block based on the
/// basic block machine operand being used inside the block. This should give
/// you the correct list of successor blocks in most cases except for things
/// like jump tables where the basic block references can't easily be found.
/// The MIRPRinter will skip printing successors if they match the result of
/// this function and the parser will use this function to construct a list if
/// it is missing.
void guessSuccessors(const MachineBasicBlock &MBB,
SmallVectorImpl<MachineBasicBlock*> &Result,
bool &IsFallthrough);
} // end namespace llvm
#endif
PK iwFZ`%���v �v CodeGen/MIRYamlMapping.hnu �[��� //===- MIRYamlMapping.h - Describe mapping between MIR and YAML--*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements the mapping between various MIR data structures and
// their corresponding YAML representation.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MIRYAMLMAPPING_H
#define LLVM_CODEGEN_MIRYAMLMAPPING_H
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/Support/SMLoc.h"
#include "llvm/Support/YAMLTraits.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include <cstdint>
#include <optional>
#include <string>
#include <vector>
namespace llvm {
namespace yaml {
/// A wrapper around std::string which contains a source range that's being
/// set during parsing.
struct StringValue {
std::string Value;
SMRange SourceRange;
StringValue() = default;
StringValue(std::string Value) : Value(std::move(Value)) {}
StringValue(const char Val[]) : Value(Val) {}
bool operator==(const StringValue &Other) const {
return Value == Other.Value;
}
};
template <> struct ScalarTraits<StringValue> {
static void output(const StringValue &S, void *, raw_ostream &OS) {
OS << S.Value;
}
static StringRef input(StringRef Scalar, void *Ctx, StringValue &S) {
S.Value = Scalar.str();
if (const auto *Node =
reinterpret_cast<yaml::Input *>(Ctx)->getCurrentNode())
S.SourceRange = Node->getSourceRange();
return "";
}
static QuotingType mustQuote(StringRef S) { return needsQuotes(S); }
};
struct FlowStringValue : StringValue {
FlowStringValue() = default;
FlowStringValue(std::string Value) : StringValue(std::move(Value)) {}
};
template <> struct ScalarTraits<FlowStringValue> {
static void output(const FlowStringValue &S, void *, raw_ostream &OS) {
return ScalarTraits<StringValue>::output(S, nullptr, OS);
}
static StringRef input(StringRef Scalar, void *Ctx, FlowStringValue &S) {
return ScalarTraits<StringValue>::input(Scalar, Ctx, S);
}
static QuotingType mustQuote(StringRef S) { return needsQuotes(S); }
};
struct BlockStringValue {
StringValue Value;
bool operator==(const BlockStringValue &Other) const {
return Value == Other.Value;
}
};
template <> struct BlockScalarTraits<BlockStringValue> {
static void output(const BlockStringValue &S, void *Ctx, raw_ostream &OS) {
return ScalarTraits<StringValue>::output(S.Value, Ctx, OS);
}
static StringRef input(StringRef Scalar, void *Ctx, BlockStringValue &S) {
return ScalarTraits<StringValue>::input(Scalar, Ctx, S.Value);
}
};
/// A wrapper around unsigned which contains a source range that's being set
/// during parsing.
struct UnsignedValue {
unsigned Value = 0;
SMRange SourceRange;
UnsignedValue() = default;
UnsignedValue(unsigned Value) : Value(Value) {}
bool operator==(const UnsignedValue &Other) const {
return Value == Other.Value;
}
};
template <> struct ScalarTraits<UnsignedValue> {
static void output(const UnsignedValue &Value, void *Ctx, raw_ostream &OS) {
return ScalarTraits<unsigned>::output(Value.Value, Ctx, OS);
}
static StringRef input(StringRef Scalar, void *Ctx, UnsignedValue &Value) {
if (const auto *Node =
reinterpret_cast<yaml::Input *>(Ctx)->getCurrentNode())
Value.SourceRange = Node->getSourceRange();
return ScalarTraits<unsigned>::input(Scalar, Ctx, Value.Value);
}
static QuotingType mustQuote(StringRef Scalar) {
return ScalarTraits<unsigned>::mustQuote(Scalar);
}
};
template <> struct ScalarEnumerationTraits<MachineJumpTableInfo::JTEntryKind> {
static void enumeration(yaml::IO &IO,
MachineJumpTableInfo::JTEntryKind &EntryKind) {
IO.enumCase(EntryKind, "block-address",
MachineJumpTableInfo::EK_BlockAddress);
IO.enumCase(EntryKind, "gp-rel64-block-address",
MachineJumpTableInfo::EK_GPRel64BlockAddress);
IO.enumCase(EntryKind, "gp-rel32-block-address",
MachineJumpTableInfo::EK_GPRel32BlockAddress);
IO.enumCase(EntryKind, "label-difference32",
MachineJumpTableInfo::EK_LabelDifference32);
IO.enumCase(EntryKind, "inline", MachineJumpTableInfo::EK_Inline);
IO.enumCase(EntryKind, "custom32", MachineJumpTableInfo::EK_Custom32);
}
};
template <> struct ScalarTraits<MaybeAlign> {
static void output(const MaybeAlign &Alignment, void *,
llvm::raw_ostream &out) {
out << uint64_t(Alignment ? Alignment->value() : 0U);
}
static StringRef input(StringRef Scalar, void *, MaybeAlign &Alignment) {
unsigned long long n;
if (getAsUnsignedInteger(Scalar, 10, n))
return "invalid number";
if (n > 0 && !isPowerOf2_64(n))
return "must be 0 or a power of two";
Alignment = MaybeAlign(n);
return StringRef();
}
static QuotingType mustQuote(StringRef) { return QuotingType::None; }
};
template <> struct ScalarTraits<Align> {
static void output(const Align &Alignment, void *, llvm::raw_ostream &OS) {
OS << Alignment.value();
}
static StringRef input(StringRef Scalar, void *, Align &Alignment) {
unsigned long long N;
if (getAsUnsignedInteger(Scalar, 10, N))
return "invalid number";
if (!isPowerOf2_64(N))
return "must be a power of two";
Alignment = Align(N);
return StringRef();
}
static QuotingType mustQuote(StringRef) { return QuotingType::None; }
};
} // end namespace yaml
} // end namespace llvm
LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::StringValue)
LLVM_YAML_IS_FLOW_SEQUENCE_VECTOR(llvm::yaml::FlowStringValue)
LLVM_YAML_IS_FLOW_SEQUENCE_VECTOR(llvm::yaml::UnsignedValue)
namespace llvm {
namespace yaml {
struct VirtualRegisterDefinition {
UnsignedValue ID;
StringValue Class;
StringValue PreferredRegister;
// TODO: Serialize the target specific register hints.
bool operator==(const VirtualRegisterDefinition &Other) const {
return ID == Other.ID && Class == Other.Class &&
PreferredRegister == Other.PreferredRegister;
}
};
template <> struct MappingTraits<VirtualRegisterDefinition> {
static void mapping(IO &YamlIO, VirtualRegisterDefinition &Reg) {
YamlIO.mapRequired("id", Reg.ID);
YamlIO.mapRequired("class", Reg.Class);
YamlIO.mapOptional("preferred-register", Reg.PreferredRegister,
StringValue()); // Don't print out when it's empty.
}
static const bool flow = true;
};
struct MachineFunctionLiveIn {
StringValue Register;
StringValue VirtualRegister;
bool operator==(const MachineFunctionLiveIn &Other) const {
return Register == Other.Register &&
VirtualRegister == Other.VirtualRegister;
}
};
template <> struct MappingTraits<MachineFunctionLiveIn> {
static void mapping(IO &YamlIO, MachineFunctionLiveIn &LiveIn) {
YamlIO.mapRequired("reg", LiveIn.Register);
YamlIO.mapOptional(
"virtual-reg", LiveIn.VirtualRegister,
StringValue()); // Don't print the virtual register when it's empty.
}
static const bool flow = true;
};
/// Serializable representation of stack object from the MachineFrameInfo class.
///
/// The flags 'isImmutable' and 'isAliased' aren't serialized, as they are
/// determined by the object's type and frame information flags.
/// Dead stack objects aren't serialized.
///
/// The 'isPreallocated' flag is determined by the local offset.
struct MachineStackObject {
enum ObjectType { DefaultType, SpillSlot, VariableSized };
UnsignedValue ID;
StringValue Name;
// TODO: Serialize unnamed LLVM alloca reference.
ObjectType Type = DefaultType;
int64_t Offset = 0;
uint64_t Size = 0;
MaybeAlign Alignment = std::nullopt;
TargetStackID::Value StackID;
StringValue CalleeSavedRegister;
bool CalleeSavedRestored = true;
std::optional<int64_t> LocalOffset;
StringValue DebugVar;
StringValue DebugExpr;
StringValue DebugLoc;
bool operator==(const MachineStackObject &Other) const {
return ID == Other.ID && Name == Other.Name && Type == Other.Type &&
Offset == Other.Offset && Size == Other.Size &&
Alignment == Other.Alignment &&
StackID == Other.StackID &&
CalleeSavedRegister == Other.CalleeSavedRegister &&
CalleeSavedRestored == Other.CalleeSavedRestored &&
LocalOffset == Other.LocalOffset && DebugVar == Other.DebugVar &&
DebugExpr == Other.DebugExpr && DebugLoc == Other.DebugLoc;
}
};
template <> struct ScalarEnumerationTraits<MachineStackObject::ObjectType> {
static void enumeration(yaml::IO &IO, MachineStackObject::ObjectType &Type) {
IO.enumCase(Type, "default", MachineStackObject::DefaultType);
IO.enumCase(Type, "spill-slot", MachineStackObject::SpillSlot);
IO.enumCase(Type, "variable-sized", MachineStackObject::VariableSized);
}
};
template <> struct MappingTraits<MachineStackObject> {
static void mapping(yaml::IO &YamlIO, MachineStackObject &Object) {
YamlIO.mapRequired("id", Object.ID);
YamlIO.mapOptional("name", Object.Name,
StringValue()); // Don't print out an empty name.
YamlIO.mapOptional(
"type", Object.Type,
MachineStackObject::DefaultType); // Don't print the default type.
YamlIO.mapOptional("offset", Object.Offset, (int64_t)0);
if (Object.Type != MachineStackObject::VariableSized)
YamlIO.mapRequired("size", Object.Size);
YamlIO.mapOptional("alignment", Object.Alignment, std::nullopt);
YamlIO.mapOptional("stack-id", Object.StackID, TargetStackID::Default);
YamlIO.mapOptional("callee-saved-register", Object.CalleeSavedRegister,
StringValue()); // Don't print it out when it's empty.
YamlIO.mapOptional("callee-saved-restored", Object.CalleeSavedRestored,
true);
YamlIO.mapOptional("local-offset", Object.LocalOffset,
std::optional<int64_t>());
YamlIO.mapOptional("debug-info-variable", Object.DebugVar,
StringValue()); // Don't print it out when it's empty.
YamlIO.mapOptional("debug-info-expression", Object.DebugExpr,
StringValue()); // Don't print it out when it's empty.
YamlIO.mapOptional("debug-info-location", Object.DebugLoc,
StringValue()); // Don't print it out when it's empty.
}
static const bool flow = true;
};
/// Serializable representation of the MCRegister variant of
/// MachineFunction::VariableDbgInfo.
struct EntryValueObject {
StringValue EntryValueRegister;
StringValue DebugVar;
StringValue DebugExpr;
StringValue DebugLoc;
bool operator==(const EntryValueObject &Other) const {
return EntryValueRegister == Other.EntryValueRegister &&
DebugVar == Other.DebugVar && DebugExpr == Other.DebugExpr &&
DebugLoc == Other.DebugLoc;
}
};
template <> struct MappingTraits<EntryValueObject> {
static void mapping(yaml::IO &YamlIO, EntryValueObject &Object) {
YamlIO.mapRequired("entry-value-register", Object.EntryValueRegister);
YamlIO.mapRequired("debug-info-variable", Object.DebugVar);
YamlIO.mapRequired("debug-info-expression", Object.DebugExpr);
YamlIO.mapRequired("debug-info-location", Object.DebugLoc);
}
static const bool flow = true;
};
/// Serializable representation of the fixed stack object from the
/// MachineFrameInfo class.
struct FixedMachineStackObject {
enum ObjectType { DefaultType, SpillSlot };
UnsignedValue ID;
ObjectType Type = DefaultType;
int64_t Offset = 0;
uint64_t Size = 0;
MaybeAlign Alignment = std::nullopt;
TargetStackID::Value StackID;
bool IsImmutable = false;
bool IsAliased = false;
StringValue CalleeSavedRegister;
bool CalleeSavedRestored = true;
StringValue DebugVar;
StringValue DebugExpr;
StringValue DebugLoc;
bool operator==(const FixedMachineStackObject &Other) const {
return ID == Other.ID && Type == Other.Type && Offset == Other.Offset &&
Size == Other.Size && Alignment == Other.Alignment &&
StackID == Other.StackID &&
IsImmutable == Other.IsImmutable && IsAliased == Other.IsAliased &&
CalleeSavedRegister == Other.CalleeSavedRegister &&
CalleeSavedRestored == Other.CalleeSavedRestored &&
DebugVar == Other.DebugVar && DebugExpr == Other.DebugExpr
&& DebugLoc == Other.DebugLoc;
}
};
template <>
struct ScalarEnumerationTraits<FixedMachineStackObject::ObjectType> {
static void enumeration(yaml::IO &IO,
FixedMachineStackObject::ObjectType &Type) {
IO.enumCase(Type, "default", FixedMachineStackObject::DefaultType);
IO.enumCase(Type, "spill-slot", FixedMachineStackObject::SpillSlot);
}
};
template <>
struct ScalarEnumerationTraits<TargetStackID::Value> {
static void enumeration(yaml::IO &IO, TargetStackID::Value &ID) {
IO.enumCase(ID, "default", TargetStackID::Default);
IO.enumCase(ID, "sgpr-spill", TargetStackID::SGPRSpill);
IO.enumCase(ID, "scalable-vector", TargetStackID::ScalableVector);
IO.enumCase(ID, "wasm-local", TargetStackID::WasmLocal);
IO.enumCase(ID, "noalloc", TargetStackID::NoAlloc);
}
};
template <> struct MappingTraits<FixedMachineStackObject> {
static void mapping(yaml::IO &YamlIO, FixedMachineStackObject &Object) {
YamlIO.mapRequired("id", Object.ID);
YamlIO.mapOptional(
"type", Object.Type,
FixedMachineStackObject::DefaultType); // Don't print the default type.
YamlIO.mapOptional("offset", Object.Offset, (int64_t)0);
YamlIO.mapOptional("size", Object.Size, (uint64_t)0);
YamlIO.mapOptional("alignment", Object.Alignment, std::nullopt);
YamlIO.mapOptional("stack-id", Object.StackID, TargetStackID::Default);
if (Object.Type != FixedMachineStackObject::SpillSlot) {
YamlIO.mapOptional("isImmutable", Object.IsImmutable, false);
YamlIO.mapOptional("isAliased", Object.IsAliased, false);
}
YamlIO.mapOptional("callee-saved-register", Object.CalleeSavedRegister,
StringValue()); // Don't print it out when it's empty.
YamlIO.mapOptional("callee-saved-restored", Object.CalleeSavedRestored,
true);
YamlIO.mapOptional("debug-info-variable", Object.DebugVar,
StringValue()); // Don't print it out when it's empty.
YamlIO.mapOptional("debug-info-expression", Object.DebugExpr,
StringValue()); // Don't print it out when it's empty.
YamlIO.mapOptional("debug-info-location", Object.DebugLoc,
StringValue()); // Don't print it out when it's empty.
}
static const bool flow = true;
};
/// A serializaable representation of a reference to a stack object or fixed
/// stack object.
struct FrameIndex {
// The frame index as printed. This is always a positive number, even for
// fixed objects. To obtain the real index,
// MachineFrameInfo::getObjectIndexBegin has to be added.
int FI;
bool IsFixed;
SMRange SourceRange;
FrameIndex() = default;
FrameIndex(int FI, const llvm::MachineFrameInfo &MFI);
Expected<int> getFI(const llvm::MachineFrameInfo &MFI) const;
};
template <> struct ScalarTraits<FrameIndex> {
static void output(const FrameIndex &FI, void *, raw_ostream &OS) {
MachineOperand::printStackObjectReference(OS, FI.FI, FI.IsFixed, "");
}
static StringRef input(StringRef Scalar, void *Ctx, FrameIndex &FI) {
FI.IsFixed = false;
StringRef Num;
if (Scalar.startswith("%stack.")) {
Num = Scalar.substr(7);
} else if (Scalar.startswith("%fixed-stack.")) {
Num = Scalar.substr(13);
FI.IsFixed = true;
} else {
return "Invalid frame index, needs to start with %stack. or "
"%fixed-stack.";
}
if (Num.consumeInteger(10, FI.FI))
return "Invalid frame index, not a valid number";
if (const auto *Node =
reinterpret_cast<yaml::Input *>(Ctx)->getCurrentNode())
FI.SourceRange = Node->getSourceRange();
return StringRef();
}
static QuotingType mustQuote(StringRef S) { return needsQuotes(S); }
};
/// Serializable representation of CallSiteInfo.
struct CallSiteInfo {
// Representation of call argument and register which is used to
// transfer it.
struct ArgRegPair {
StringValue Reg;
uint16_t ArgNo;
bool operator==(const ArgRegPair &Other) const {
return Reg == Other.Reg && ArgNo == Other.ArgNo;
}
};
/// Identifies call instruction location in machine function.
struct MachineInstrLoc {
unsigned BlockNum;
unsigned Offset;
bool operator==(const MachineInstrLoc &Other) const {
return BlockNum == Other.BlockNum && Offset == Other.Offset;
}
};
MachineInstrLoc CallLocation;
std::vector<ArgRegPair> ArgForwardingRegs;
bool operator==(const CallSiteInfo &Other) const {
return CallLocation.BlockNum == Other.CallLocation.BlockNum &&
CallLocation.Offset == Other.CallLocation.Offset;
}
};
template <> struct MappingTraits<CallSiteInfo::ArgRegPair> {
static void mapping(IO &YamlIO, CallSiteInfo::ArgRegPair &ArgReg) {
YamlIO.mapRequired("arg", ArgReg.ArgNo);
YamlIO.mapRequired("reg", ArgReg.Reg);
}
static const bool flow = true;
};
}
}
LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::CallSiteInfo::ArgRegPair)
namespace llvm {
namespace yaml {
template <> struct MappingTraits<CallSiteInfo> {
static void mapping(IO &YamlIO, CallSiteInfo &CSInfo) {
YamlIO.mapRequired("bb", CSInfo.CallLocation.BlockNum);
YamlIO.mapRequired("offset", CSInfo.CallLocation.Offset);
YamlIO.mapOptional("fwdArgRegs", CSInfo.ArgForwardingRegs,
std::vector<CallSiteInfo::ArgRegPair>());
}
static const bool flow = true;
};
/// Serializable representation of debug value substitutions.
struct DebugValueSubstitution {
unsigned SrcInst;
unsigned SrcOp;
unsigned DstInst;
unsigned DstOp;
unsigned Subreg;
bool operator==(const DebugValueSubstitution &Other) const {
return std::tie(SrcInst, SrcOp, DstInst, DstOp) ==
std::tie(Other.SrcInst, Other.SrcOp, Other.DstInst, Other.DstOp);
}
};
template <> struct MappingTraits<DebugValueSubstitution> {
static void mapping(IO &YamlIO, DebugValueSubstitution &Sub) {
YamlIO.mapRequired("srcinst", Sub.SrcInst);
YamlIO.mapRequired("srcop", Sub.SrcOp);
YamlIO.mapRequired("dstinst", Sub.DstInst);
YamlIO.mapRequired("dstop", Sub.DstOp);
YamlIO.mapRequired("subreg", Sub.Subreg);
}
static const bool flow = true;
};
} // namespace yaml
} // namespace llvm
LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::DebugValueSubstitution)
namespace llvm {
namespace yaml {
struct MachineConstantPoolValue {
UnsignedValue ID;
StringValue Value;
MaybeAlign Alignment = std::nullopt;
bool IsTargetSpecific = false;
bool operator==(const MachineConstantPoolValue &Other) const {
return ID == Other.ID && Value == Other.Value &&
Alignment == Other.Alignment &&
IsTargetSpecific == Other.IsTargetSpecific;
}
};
template <> struct MappingTraits<MachineConstantPoolValue> {
static void mapping(IO &YamlIO, MachineConstantPoolValue &Constant) {
YamlIO.mapRequired("id", Constant.ID);
YamlIO.mapOptional("value", Constant.Value, StringValue());
YamlIO.mapOptional("alignment", Constant.Alignment, std::nullopt);
YamlIO.mapOptional("isTargetSpecific", Constant.IsTargetSpecific, false);
}
};
struct MachineJumpTable {
struct Entry {
UnsignedValue ID;
std::vector<FlowStringValue> Blocks;
bool operator==(const Entry &Other) const {
return ID == Other.ID && Blocks == Other.Blocks;
}
};
MachineJumpTableInfo::JTEntryKind Kind = MachineJumpTableInfo::EK_Custom32;
std::vector<Entry> Entries;
bool operator==(const MachineJumpTable &Other) const {
return Kind == Other.Kind && Entries == Other.Entries;
}
};
template <> struct MappingTraits<MachineJumpTable::Entry> {
static void mapping(IO &YamlIO, MachineJumpTable::Entry &Entry) {
YamlIO.mapRequired("id", Entry.ID);
YamlIO.mapOptional("blocks", Entry.Blocks, std::vector<FlowStringValue>());
}
};
} // end namespace yaml
} // end namespace llvm
LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::MachineFunctionLiveIn)
LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::VirtualRegisterDefinition)
LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::MachineStackObject)
LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::EntryValueObject)
LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::FixedMachineStackObject)
LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::CallSiteInfo)
LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::MachineConstantPoolValue)
LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::MachineJumpTable::Entry)
namespace llvm {
namespace yaml {
template <> struct MappingTraits<MachineJumpTable> {
static void mapping(IO &YamlIO, MachineJumpTable &JT) {
YamlIO.mapRequired("kind", JT.Kind);
YamlIO.mapOptional("entries", JT.Entries,
std::vector<MachineJumpTable::Entry>());
}
};
/// Serializable representation of MachineFrameInfo.
///
/// Doesn't serialize attributes like 'StackAlignment', 'IsStackRealignable' and
/// 'RealignOption' as they are determined by the target and LLVM function
/// attributes.
/// It also doesn't serialize attributes like 'NumFixedObject' and
/// 'HasVarSizedObjects' as they are determined by the frame objects themselves.
struct MachineFrameInfo {
bool IsFrameAddressTaken = false;
bool IsReturnAddressTaken = false;
bool HasStackMap = false;
bool HasPatchPoint = false;
uint64_t StackSize = 0;
int OffsetAdjustment = 0;
unsigned MaxAlignment = 0;
bool AdjustsStack = false;
bool HasCalls = false;
StringValue StackProtector;
StringValue FunctionContext;
unsigned MaxCallFrameSize = ~0u; ///< ~0u means: not computed yet.
unsigned CVBytesOfCalleeSavedRegisters = 0;
bool HasOpaqueSPAdjustment = false;
bool HasVAStart = false;
bool HasMustTailInVarArgFunc = false;
bool HasTailCall = false;
unsigned LocalFrameSize = 0;
StringValue SavePoint;
StringValue RestorePoint;
bool operator==(const MachineFrameInfo &Other) const {
return IsFrameAddressTaken == Other.IsFrameAddressTaken &&
IsReturnAddressTaken == Other.IsReturnAddressTaken &&
HasStackMap == Other.HasStackMap &&
HasPatchPoint == Other.HasPatchPoint &&
StackSize == Other.StackSize &&
OffsetAdjustment == Other.OffsetAdjustment &&
MaxAlignment == Other.MaxAlignment &&
AdjustsStack == Other.AdjustsStack && HasCalls == Other.HasCalls &&
StackProtector == Other.StackProtector &&
FunctionContext == Other.FunctionContext &&
MaxCallFrameSize == Other.MaxCallFrameSize &&
CVBytesOfCalleeSavedRegisters ==
Other.CVBytesOfCalleeSavedRegisters &&
HasOpaqueSPAdjustment == Other.HasOpaqueSPAdjustment &&
HasVAStart == Other.HasVAStart &&
HasMustTailInVarArgFunc == Other.HasMustTailInVarArgFunc &&
HasTailCall == Other.HasTailCall &&
LocalFrameSize == Other.LocalFrameSize &&
SavePoint == Other.SavePoint && RestorePoint == Other.RestorePoint;
}
};
template <> struct MappingTraits<MachineFrameInfo> {
static void mapping(IO &YamlIO, MachineFrameInfo &MFI) {
YamlIO.mapOptional("isFrameAddressTaken", MFI.IsFrameAddressTaken, false);
YamlIO.mapOptional("isReturnAddressTaken", MFI.IsReturnAddressTaken, false);
YamlIO.mapOptional("hasStackMap", MFI.HasStackMap, false);
YamlIO.mapOptional("hasPatchPoint", MFI.HasPatchPoint, false);
YamlIO.mapOptional("stackSize", MFI.StackSize, (uint64_t)0);
YamlIO.mapOptional("offsetAdjustment", MFI.OffsetAdjustment, (int)0);
YamlIO.mapOptional("maxAlignment", MFI.MaxAlignment, (unsigned)0);
YamlIO.mapOptional("adjustsStack", MFI.AdjustsStack, false);
YamlIO.mapOptional("hasCalls", MFI.HasCalls, false);
YamlIO.mapOptional("stackProtector", MFI.StackProtector,
StringValue()); // Don't print it out when it's empty.
YamlIO.mapOptional("functionContext", MFI.FunctionContext,
StringValue()); // Don't print it out when it's empty.
YamlIO.mapOptional("maxCallFrameSize", MFI.MaxCallFrameSize, (unsigned)~0);
YamlIO.mapOptional("cvBytesOfCalleeSavedRegisters",
MFI.CVBytesOfCalleeSavedRegisters, 0U);
YamlIO.mapOptional("hasOpaqueSPAdjustment", MFI.HasOpaqueSPAdjustment,
false);
YamlIO.mapOptional("hasVAStart", MFI.HasVAStart, false);
YamlIO.mapOptional("hasMustTailInVarArgFunc", MFI.HasMustTailInVarArgFunc,
false);
YamlIO.mapOptional("hasTailCall", MFI.HasTailCall, false);
YamlIO.mapOptional("localFrameSize", MFI.LocalFrameSize, (unsigned)0);
YamlIO.mapOptional("savePoint", MFI.SavePoint,
StringValue()); // Don't print it out when it's empty.
YamlIO.mapOptional("restorePoint", MFI.RestorePoint,
StringValue()); // Don't print it out when it's empty.
}
};
/// Targets should override this in a way that mirrors the implementation of
/// llvm::MachineFunctionInfo.
struct MachineFunctionInfo {
virtual ~MachineFunctionInfo() = default;
virtual void mappingImpl(IO &YamlIO) {}
};
template <> struct MappingTraits<std::unique_ptr<MachineFunctionInfo>> {
static void mapping(IO &YamlIO, std::unique_ptr<MachineFunctionInfo> &MFI) {
if (MFI)
MFI->mappingImpl(YamlIO);
}
};
struct MachineFunction {
StringRef Name;
MaybeAlign Alignment = std::nullopt;
bool ExposesReturnsTwice = false;
// GISel MachineFunctionProperties.
bool Legalized = false;
bool RegBankSelected = false;
bool Selected = false;
bool FailedISel = false;
// Register information
bool TracksRegLiveness = false;
bool HasWinCFI = false;
bool CallsEHReturn = false;
bool CallsUnwindInit = false;
bool HasEHCatchret = false;
bool HasEHScopes = false;
bool HasEHFunclets = false;
bool IsOutlined = false;
bool FailsVerification = false;
bool TracksDebugUserValues = false;
bool UseDebugInstrRef = false;
std::vector<VirtualRegisterDefinition> VirtualRegisters;
std::vector<MachineFunctionLiveIn> LiveIns;
std::optional<std::vector<FlowStringValue>> CalleeSavedRegisters;
// TODO: Serialize the various register masks.
// Frame information
MachineFrameInfo FrameInfo;
std::vector<FixedMachineStackObject> FixedStackObjects;
std::vector<EntryValueObject> EntryValueObjects;
std::vector<MachineStackObject> StackObjects;
std::vector<MachineConstantPoolValue> Constants; /// Constant pool.
std::unique_ptr<MachineFunctionInfo> MachineFuncInfo;
std::vector<CallSiteInfo> CallSitesInfo;
std::vector<DebugValueSubstitution> DebugValueSubstitutions;
MachineJumpTable JumpTableInfo;
std::vector<StringValue> MachineMetadataNodes;
BlockStringValue Body;
};
template <> struct MappingTraits<MachineFunction> {
static void mapping(IO &YamlIO, MachineFunction &MF) {
YamlIO.mapRequired("name", MF.Name);
YamlIO.mapOptional("alignment", MF.Alignment, std::nullopt);
YamlIO.mapOptional("exposesReturnsTwice", MF.ExposesReturnsTwice, false);
YamlIO.mapOptional("legalized", MF.Legalized, false);
YamlIO.mapOptional("regBankSelected", MF.RegBankSelected, false);
YamlIO.mapOptional("selected", MF.Selected, false);
YamlIO.mapOptional("failedISel", MF.FailedISel, false);
YamlIO.mapOptional("tracksRegLiveness", MF.TracksRegLiveness, false);
YamlIO.mapOptional("hasWinCFI", MF.HasWinCFI, false);
YamlIO.mapOptional("callsEHReturn", MF.CallsEHReturn, false);
YamlIO.mapOptional("callsUnwindInit", MF.CallsUnwindInit, false);
YamlIO.mapOptional("hasEHCatchret", MF.HasEHCatchret, false);
YamlIO.mapOptional("hasEHScopes", MF.HasEHScopes, false);
YamlIO.mapOptional("hasEHFunclets", MF.HasEHFunclets, false);
YamlIO.mapOptional("isOutlined", MF.IsOutlined, false);
YamlIO.mapOptional("debugInstrRef", MF.UseDebugInstrRef, false);
YamlIO.mapOptional("failsVerification", MF.FailsVerification, false);
YamlIO.mapOptional("tracksDebugUserValues", MF.TracksDebugUserValues,
false);
YamlIO.mapOptional("registers", MF.VirtualRegisters,
std::vector<VirtualRegisterDefinition>());
YamlIO.mapOptional("liveins", MF.LiveIns,
std::vector<MachineFunctionLiveIn>());
YamlIO.mapOptional("calleeSavedRegisters", MF.CalleeSavedRegisters,
std::optional<std::vector<FlowStringValue>>());
YamlIO.mapOptional("frameInfo", MF.FrameInfo, MachineFrameInfo());
YamlIO.mapOptional("fixedStack", MF.FixedStackObjects,
std::vector<FixedMachineStackObject>());
YamlIO.mapOptional("stack", MF.StackObjects,
std::vector<MachineStackObject>());
YamlIO.mapOptional("entry_values", MF.EntryValueObjects,
std::vector<EntryValueObject>());
YamlIO.mapOptional("callSites", MF.CallSitesInfo,
std::vector<CallSiteInfo>());
YamlIO.mapOptional("debugValueSubstitutions", MF.DebugValueSubstitutions,
std::vector<DebugValueSubstitution>());
YamlIO.mapOptional("constants", MF.Constants,
std::vector<MachineConstantPoolValue>());
YamlIO.mapOptional("machineFunctionInfo", MF.MachineFuncInfo);
if (!YamlIO.outputting() || !MF.JumpTableInfo.Entries.empty())
YamlIO.mapOptional("jumpTable", MF.JumpTableInfo, MachineJumpTable());
if (!YamlIO.outputting() || !MF.MachineMetadataNodes.empty())
YamlIO.mapOptional("machineMetadataNodes", MF.MachineMetadataNodes,
std::vector<StringValue>());
YamlIO.mapOptional("body", MF.Body, BlockStringValue());
}
};
} // end namespace yaml
} // end namespace llvm
#endif // LLVM_CODEGEN_MIRYAMLMAPPING_H
PK iwFZ]�X�� � " CodeGen/ScheduleHazardRecognizer.hnu �[��� //=- llvm/CodeGen/ScheduleHazardRecognizer.h - Scheduling Support -*- C++ -*-=//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements the ScheduleHazardRecognizer class, which implements
// hazard-avoidance heuristics for scheduling.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_SCHEDULEHAZARDRECOGNIZER_H
#define LLVM_CODEGEN_SCHEDULEHAZARDRECOGNIZER_H
namespace llvm {
class MachineInstr;
class SUnit;
/// HazardRecognizer - This determines whether or not an instruction can be
/// issued this cycle, and whether or not a noop needs to be inserted to handle
/// the hazard.
class ScheduleHazardRecognizer {
protected:
/// MaxLookAhead - Indicate the number of cycles in the scoreboard
/// state. Important to restore the state after backtracking. Additionally,
/// MaxLookAhead=0 identifies a fake recognizer, allowing the client to
/// bypass virtual calls. Currently the PostRA scheduler ignores it.
unsigned MaxLookAhead = 0;
public:
ScheduleHazardRecognizer() = default;
virtual ~ScheduleHazardRecognizer();
enum HazardType {
NoHazard, // This instruction can be emitted at this cycle.
Hazard, // This instruction can't be emitted at this cycle.
NoopHazard // This instruction can't be emitted, and needs noops.
};
unsigned getMaxLookAhead() const { return MaxLookAhead; }
bool isEnabled() const { return MaxLookAhead != 0; }
/// atIssueLimit - Return true if no more instructions may be issued in this
/// cycle.
///
/// FIXME: remove this once MachineScheduler is the only client.
virtual bool atIssueLimit() const { return false; }
/// getHazardType - Return the hazard type of emitting this node. There are
/// three possible results. Either:
/// * NoHazard: it is legal to issue this instruction on this cycle.
/// * Hazard: issuing this instruction would stall the machine. If some
/// other instruction is available, issue it first.
/// * NoopHazard: issuing this instruction would break the program. If
/// some other instruction can be issued, do so, otherwise issue a noop.
virtual HazardType getHazardType(SUnit *, int Stalls = 0) {
return NoHazard;
}
/// Reset - This callback is invoked when a new block of
/// instructions is about to be schedule. The hazard state should be
/// set to an initialized state.
virtual void Reset() {}
/// EmitInstruction - This callback is invoked when an instruction is
/// emitted, to advance the hazard state.
virtual void EmitInstruction(SUnit *) {}
/// This overload will be used when the hazard recognizer is being used
/// by a non-scheduling pass, which does not use SUnits.
virtual void EmitInstruction(MachineInstr *) {}
/// PreEmitNoops - This callback is invoked prior to emitting an instruction.
/// It should return the number of noops to emit prior to the provided
/// instruction.
/// Note: This is only used during PostRA scheduling. EmitNoop is not called
/// for these noops.
virtual unsigned PreEmitNoops(SUnit *) {
return 0;
}
/// This overload will be used when the hazard recognizer is being used
/// by a non-scheduling pass, which does not use SUnits.
virtual unsigned PreEmitNoops(MachineInstr *) {
return 0;
}
/// ShouldPreferAnother - This callback may be invoked if getHazardType
/// returns NoHazard. If, even though there is no hazard, it would be better to
/// schedule another available instruction, this callback should return true.
virtual bool ShouldPreferAnother(SUnit *) {
return false;
}
/// AdvanceCycle - This callback is invoked whenever the next top-down
/// instruction to be scheduled cannot issue in the current cycle, either
/// because of latency or resource conflicts. This should increment the
/// internal state of the hazard recognizer so that previously "Hazard"
/// instructions will now not be hazards.
virtual void AdvanceCycle() {}
/// RecedeCycle - This callback is invoked whenever the next bottom-up
/// instruction to be scheduled cannot issue in the current cycle, either
/// because of latency or resource conflicts.
virtual void RecedeCycle() {}
/// EmitNoop - This callback is invoked when a noop was added to the
/// instruction stream.
virtual void EmitNoop() {
// Default implementation: count it as a cycle.
AdvanceCycle();
}
/// EmitNoops - This callback is invoked when noops were added to the
/// instruction stream.
virtual void EmitNoops(unsigned Quantity) {
// Default implementation: count it as a cycle.
for (unsigned i = 0; i < Quantity; ++i)
EmitNoop();
}
};
} // end namespace llvm
#endif // LLVM_CODEGEN_SCHEDULEHAZARDRECOGNIZER_H
PK iwFZ�� % % CodeGen/VirtRegMap.hnu �[��� //===- llvm/CodeGen/VirtRegMap.h - Virtual Register Map ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements a virtual register map. This maps virtual registers to
// physical registers and virtual registers to stack slots. It is created and
// updated by a register allocator and then used by a machine code rewriter that
// adds spill code and rewrites virtual into physical register references.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_VIRTREGMAP_H
#define LLVM_CODEGEN_VIRTREGMAP_H
#include "llvm/ADT/IndexedMap.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TileShapeInfo.h"
#include "llvm/Pass.h"
#include <cassert>
namespace llvm {
class MachineFunction;
class MachineRegisterInfo;
class raw_ostream;
class TargetInstrInfo;
class VirtRegMap : public MachineFunctionPass {
public:
enum {
NO_PHYS_REG = 0,
NO_STACK_SLOT = (1L << 30)-1,
MAX_STACK_SLOT = (1L << 18)-1
};
private:
MachineRegisterInfo *MRI = nullptr;
const TargetInstrInfo *TII = nullptr;
const TargetRegisterInfo *TRI = nullptr;
MachineFunction *MF = nullptr;
/// Virt2PhysMap - This is a virtual to physical register
/// mapping. Each virtual register is required to have an entry in
/// it; even spilled virtual registers (the register mapped to a
/// spilled register is the temporary used to load it from the
/// stack).
IndexedMap<Register, VirtReg2IndexFunctor> Virt2PhysMap;
/// Virt2StackSlotMap - This is virtual register to stack slot
/// mapping. Each spilled virtual register has an entry in it
/// which corresponds to the stack slot this register is spilled
/// at.
IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap;
/// Virt2SplitMap - This is virtual register to splitted virtual register
/// mapping.
IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2SplitMap;
/// Virt2ShapeMap - For X86 AMX register whose register is bound shape
/// information.
DenseMap<unsigned, ShapeT> Virt2ShapeMap;
/// createSpillSlot - Allocate a spill slot for RC from MFI.
unsigned createSpillSlot(const TargetRegisterClass *RC);
public:
static char ID;
VirtRegMap()
: MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG),
Virt2StackSlotMap(NO_STACK_SLOT), Virt2SplitMap(0) {}
VirtRegMap(const VirtRegMap &) = delete;
VirtRegMap &operator=(const VirtRegMap &) = delete;
bool runOnMachineFunction(MachineFunction &MF) override;
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
MachineFunction &getMachineFunction() const {
assert(MF && "getMachineFunction called before runOnMachineFunction");
return *MF;
}
MachineRegisterInfo &getRegInfo() const { return *MRI; }
const TargetRegisterInfo &getTargetRegInfo() const { return *TRI; }
void grow();
/// returns true if the specified virtual register is
/// mapped to a physical register
bool hasPhys(Register virtReg) const {
return getPhys(virtReg) != NO_PHYS_REG;
}
/// returns the physical register mapped to the specified
/// virtual register
MCRegister getPhys(Register virtReg) const {
assert(virtReg.isVirtual());
return MCRegister::from(Virt2PhysMap[virtReg.id()]);
}
/// creates a mapping for the specified virtual register to
/// the specified physical register
void assignVirt2Phys(Register virtReg, MCPhysReg physReg);
bool isShapeMapEmpty() const { return Virt2ShapeMap.empty(); }
bool hasShape(Register virtReg) const {
return getShape(virtReg).isValid();
}
ShapeT getShape(Register virtReg) const {
assert(virtReg.isVirtual());
return Virt2ShapeMap.lookup(virtReg);
}
void assignVirt2Shape(Register virtReg, ShapeT shape) {
Virt2ShapeMap[virtReg.id()] = shape;
}
/// clears the specified virtual register's, physical
/// register mapping
void clearVirt(Register virtReg) {
assert(virtReg.isVirtual());
assert(Virt2PhysMap[virtReg.id()] != NO_PHYS_REG &&
"attempt to clear a not assigned virtual register");
Virt2PhysMap[virtReg.id()] = NO_PHYS_REG;
}
/// clears all virtual to physical register mappings
void clearAllVirt() {
Virt2PhysMap.clear();
grow();
}
/// returns true if VirtReg is assigned to its preferred physreg.
bool hasPreferredPhys(Register VirtReg) const;
/// returns true if VirtReg has a known preferred register.
/// This returns false if VirtReg has a preference that is a virtual
/// register that hasn't been assigned yet.
bool hasKnownPreference(Register VirtReg) const;
/// records virtReg is a split live interval from SReg.
void setIsSplitFromReg(Register virtReg, Register SReg) {
Virt2SplitMap[virtReg.id()] = SReg;
if (hasShape(SReg)) {
Virt2ShapeMap[virtReg.id()] = getShape(SReg);
}
}
/// returns the live interval virtReg is split from.
Register getPreSplitReg(Register virtReg) const {
return Virt2SplitMap[virtReg.id()];
}
/// getOriginal - Return the original virtual register that VirtReg descends
/// from through splitting.
/// A register that was not created by splitting is its own original.
/// This operation is idempotent.
Register getOriginal(Register VirtReg) const {
Register Orig = getPreSplitReg(VirtReg);
return Orig ? Orig : VirtReg;
}
/// returns true if the specified virtual register is not
/// mapped to a stack slot or rematerialized.
bool isAssignedReg(Register virtReg) const {
if (getStackSlot(virtReg) == NO_STACK_SLOT)
return true;
// Split register can be assigned a physical register as well as a
// stack slot or remat id.
return (Virt2SplitMap[virtReg.id()] &&
Virt2PhysMap[virtReg.id()] != NO_PHYS_REG);
}
/// returns the stack slot mapped to the specified virtual
/// register
int getStackSlot(Register virtReg) const {
assert(virtReg.isVirtual());
return Virt2StackSlotMap[virtReg.id()];
}
/// create a mapping for the specifed virtual register to
/// the next available stack slot
int assignVirt2StackSlot(Register virtReg);
/// create a mapping for the specified virtual register to
/// the specified stack slot
void assignVirt2StackSlot(Register virtReg, int SS);
void print(raw_ostream &OS, const Module* M = nullptr) const override;
void dump() const;
};
inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
VRM.print(OS);
return OS;
}
} // end llvm namespace
#endif // LLVM_CODEGEN_VIRTREGMAP_H
PK iwFZr�� CodeGen/MachineLoopUtils.hnu �[��� //=- MachineLoopUtils.h - Helper functions for manipulating loops -*- C++ -*-=//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINELOOPUTILS_H
#define LLVM_CODEGEN_MACHINELOOPUTILS_H
namespace llvm {
class MachineBasicBlock;
class MachineRegisterInfo;
class TargetInstrInfo;
enum LoopPeelDirection {
LPD_Front, ///< Peel the first iteration of the loop.
LPD_Back ///< Peel the last iteration of the loop.
};
/// Peels a single block loop. Loop must have two successors, one of which
/// must be itself. Similarly it must have two predecessors, one of which must
/// be itself.
///
/// The loop block is copied and inserted into the CFG such that two copies of
/// the loop follow on from each other. The copy is inserted either before or
/// after the loop based on Direction.
///
/// Phis are updated and an unconditional branch inserted at the end of the
/// clone so as to execute a single iteration.
///
/// The trip count of Loop is not updated.
MachineBasicBlock *PeelSingleBlockLoop(LoopPeelDirection Direction,
MachineBasicBlock *Loop,
MachineRegisterInfo &MRI,
const TargetInstrInfo *TII);
} // namespace llvm
#endif // LLVM_CODEGEN_MACHINELOOPUTILS_H
PK iwFZ,��8� � CodeGen/SelectionDAGTargetInfo.hnu �[��� //==- llvm/CodeGen/SelectionDAGTargetInfo.h - SelectionDAG Info --*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the SelectionDAGTargetInfo class, which targets can
// subclass to parameterize the SelectionDAG lowering and instruction
// selection process.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_SELECTIONDAGTARGETINFO_H
#define LLVM_CODEGEN_SELECTIONDAGTARGETINFO_H
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/Support/CodeGen.h"
#include <utility>
namespace llvm {
class SelectionDAG;
//===----------------------------------------------------------------------===//
/// Targets can subclass this to parameterize the
/// SelectionDAG lowering and instruction selection process.
///
class SelectionDAGTargetInfo {
public:
explicit SelectionDAGTargetInfo() = default;
SelectionDAGTargetInfo(const SelectionDAGTargetInfo &) = delete;
SelectionDAGTargetInfo &operator=(const SelectionDAGTargetInfo &) = delete;
virtual ~SelectionDAGTargetInfo();
/// Emit target-specific code that performs a memcpy.
/// This can be used by targets to provide code sequences for cases
/// that don't fit the target's parameters for simple loads/stores and can be
/// more efficient than using a library call. This function can return a null
/// SDValue if the target declines to use custom code and a different
/// lowering strategy should be used.
///
/// If AlwaysInline is true, the size is constant and the target should not
/// emit any calls and is strongly encouraged to attempt to emit inline code
/// even if it is beyond the usual threshold because this intrinsic is being
/// expanded in a place where calls are not feasible (e.g. within the prologue
/// for another call). If the target chooses to decline an AlwaysInline
/// request here, legalize will resort to using simple loads and stores.
virtual SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl,
SDValue Chain, SDValue Op1,
SDValue Op2, SDValue Op3,
Align Alignment, bool isVolatile,
bool AlwaysInline,
MachinePointerInfo DstPtrInfo,
MachinePointerInfo SrcPtrInfo) const {
return SDValue();
}
/// Emit target-specific code that performs a memmove.
/// This can be used by targets to provide code sequences for cases
/// that don't fit the target's parameters for simple loads/stores and can be
/// more efficient than using a library call. This function can return a null
/// SDValue if the target declines to use custom code and a different
/// lowering strategy should be used.
virtual SDValue EmitTargetCodeForMemmove(
SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1,
SDValue Op2, SDValue Op3, Align Alignment, bool isVolatile,
MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const {
return SDValue();
}
/// Emit target-specific code that performs a memset.
/// This can be used by targets to provide code sequences for cases
/// that don't fit the target's parameters for simple stores and can be more
/// efficient than using a library call. This function can return a null
/// SDValue if the target declines to use custom code and a different
/// lowering strategy should be used. Note that if AlwaysInline is true the
/// function has to return a valid SDValue.
virtual SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl,
SDValue Chain, SDValue Op1,
SDValue Op2, SDValue Op3,
Align Alignment, bool isVolatile,
bool AlwaysInline,
MachinePointerInfo DstPtrInfo) const {
return SDValue();
}
/// Emit target-specific code that performs a memcmp/bcmp, in cases where that is
/// faster than a libcall. The first returned SDValue is the result of the
/// memcmp and the second is the chain. Both SDValues can be null if a normal
/// libcall should be used.
virtual std::pair<SDValue, SDValue>
EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain,
SDValue Op1, SDValue Op2, SDValue Op3,
MachinePointerInfo Op1PtrInfo,
MachinePointerInfo Op2PtrInfo) const {
return std::make_pair(SDValue(), SDValue());
}
/// Emit target-specific code that performs a memchr, in cases where that is
/// faster than a libcall. The first returned SDValue is the result of the
/// memchr and the second is the chain. Both SDValues can be null if a normal
/// libcall should be used.
virtual std::pair<SDValue, SDValue>
EmitTargetCodeForMemchr(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain,
SDValue Src, SDValue Char, SDValue Length,
MachinePointerInfo SrcPtrInfo) const {
return std::make_pair(SDValue(), SDValue());
}
/// Emit target-specific code that performs a strcpy or stpcpy, in cases
/// where that is faster than a libcall.
/// The first returned SDValue is the result of the copy (the start
/// of the destination string for strcpy, a pointer to the null terminator
/// for stpcpy) and the second is the chain. Both SDValues can be null
/// if a normal libcall should be used.
virtual std::pair<SDValue, SDValue>
EmitTargetCodeForStrcpy(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,
SDValue Dest, SDValue Src,
MachinePointerInfo DestPtrInfo,
MachinePointerInfo SrcPtrInfo, bool isStpcpy) const {
return std::make_pair(SDValue(), SDValue());
}
/// Emit target-specific code that performs a strcmp, in cases where that is
/// faster than a libcall.
/// The first returned SDValue is the result of the strcmp and the second is
/// the chain. Both SDValues can be null if a normal libcall should be used.
virtual std::pair<SDValue, SDValue>
EmitTargetCodeForStrcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain,
SDValue Op1, SDValue Op2,
MachinePointerInfo Op1PtrInfo,
MachinePointerInfo Op2PtrInfo) const {
return std::make_pair(SDValue(), SDValue());
}
virtual std::pair<SDValue, SDValue>
EmitTargetCodeForStrlen(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,
SDValue Src, MachinePointerInfo SrcPtrInfo) const {
return std::make_pair(SDValue(), SDValue());
}
virtual std::pair<SDValue, SDValue>
EmitTargetCodeForStrnlen(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain,
SDValue Src, SDValue MaxLength,
MachinePointerInfo SrcPtrInfo) const {
return std::make_pair(SDValue(), SDValue());
}
virtual SDValue EmitTargetCodeForSetTag(SelectionDAG &DAG, const SDLoc &dl,
SDValue Chain, SDValue Addr,
SDValue Size,
MachinePointerInfo DstPtrInfo,
bool ZeroData) const {
return SDValue();
}
// Return true if the DAG Combiner should disable generic combines.
virtual bool disableGenericCombines(CodeGenOpt::Level OptLevel) const {
return false;
}
};
} // end namespace llvm
#endif // LLVM_CODEGEN_SELECTIONDAGTARGETINFO_H
PK iwFZ�: f f CodeGen/LiveIntervalUnion.hnu �[��� //===- LiveIntervalUnion.h - Live interval union data struct ---*- C++ -*--===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// LiveIntervalUnion is a union of live segments across multiple live virtual
// registers. This may be used during coalescing to represent a congruence
// class, or during register allocation to model liveness of a physical
// register.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LIVEINTERVALUNION_H
#define LLVM_CODEGEN_LIVEINTERVALUNION_H
#include "llvm/ADT/IntervalMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/SlotIndexes.h"
#include <cassert>
#include <limits>
namespace llvm {
class raw_ostream;
class TargetRegisterInfo;
#ifndef NDEBUG
// forward declaration
template <unsigned Element> class SparseBitVector;
using LiveVirtRegBitSet = SparseBitVector<128>;
#endif
/// Union of live intervals that are strong candidates for coalescing into a
/// single register (either physical or virtual depending on the context). We
/// expect the constituent live intervals to be disjoint, although we may
/// eventually make exceptions to handle value-based interference.
class LiveIntervalUnion {
// A set of live virtual register segments that supports fast insertion,
// intersection, and removal.
// Mapping SlotIndex intervals to virtual register numbers.
using LiveSegments = IntervalMap<SlotIndex, const LiveInterval *>;
public:
// SegmentIter can advance to the next segment ordered by starting position
// which may belong to a different live virtual register. We also must be able
// to reach the current segment's containing virtual register.
using SegmentIter = LiveSegments::iterator;
/// Const version of SegmentIter.
using ConstSegmentIter = LiveSegments::const_iterator;
// LiveIntervalUnions share an external allocator.
using Allocator = LiveSegments::Allocator;
private:
unsigned Tag = 0; // unique tag for current contents.
LiveSegments Segments; // union of virtual reg segments
public:
explicit LiveIntervalUnion(Allocator &a) : Segments(a) {}
// Iterate over all segments in the union of live virtual registers ordered
// by their starting position.
SegmentIter begin() { return Segments.begin(); }
SegmentIter end() { return Segments.end(); }
SegmentIter find(SlotIndex x) { return Segments.find(x); }
ConstSegmentIter begin() const { return Segments.begin(); }
ConstSegmentIter end() const { return Segments.end(); }
ConstSegmentIter find(SlotIndex x) const { return Segments.find(x); }
bool empty() const { return Segments.empty(); }
SlotIndex startIndex() const { return Segments.start(); }
SlotIndex endIndex() const { return Segments.stop(); }
// Provide public access to the underlying map to allow overlap iteration.
using Map = LiveSegments;
const Map &getMap() const { return Segments; }
/// getTag - Return an opaque tag representing the current state of the union.
unsigned getTag() const { return Tag; }
/// changedSince - Return true if the union change since getTag returned tag.
bool changedSince(unsigned tag) const { return tag != Tag; }
// Add a live virtual register to this union and merge its segments.
void unify(const LiveInterval &VirtReg, const LiveRange &Range);
// Remove a live virtual register's segments from this union.
void extract(const LiveInterval &VirtReg, const LiveRange &Range);
// Remove all inserted virtual registers.
void clear() { Segments.clear(); ++Tag; }
// Print union, using TRI to translate register names
void print(raw_ostream &OS, const TargetRegisterInfo *TRI) const;
#ifndef NDEBUG
// Verify the live intervals in this union and add them to the visited set.
void verify(LiveVirtRegBitSet& VisitedVRegs);
#endif
// Get any virtual register that is assign to this physical unit
const LiveInterval *getOneVReg() const;
/// Query interferences between a single live virtual register and a live
/// interval union.
class Query {
const LiveIntervalUnion *LiveUnion = nullptr;
const LiveRange *LR = nullptr;
LiveRange::const_iterator LRI; ///< current position in LR
ConstSegmentIter LiveUnionI; ///< current position in LiveUnion
SmallVector<const LiveInterval *, 4> InterferingVRegs;
bool CheckedFirstInterference = false;
bool SeenAllInterferences = false;
unsigned Tag = 0;
unsigned UserTag = 0;
// Count the virtual registers in this union that interfere with this
// query's live virtual register, up to maxInterferingRegs.
unsigned collectInterferingVRegs(unsigned MaxInterferingRegs);
// Was this virtual register visited during collectInterferingVRegs?
bool isSeenInterference(const LiveInterval *VirtReg) const;
public:
Query() = default;
Query(const LiveRange &LR, const LiveIntervalUnion &LIU)
: LiveUnion(&LIU), LR(&LR) {}
Query(const Query &) = delete;
Query &operator=(const Query &) = delete;
void reset(unsigned NewUserTag, const LiveRange &NewLR,
const LiveIntervalUnion &NewLiveUnion) {
LiveUnion = &NewLiveUnion;
LR = &NewLR;
InterferingVRegs.clear();
CheckedFirstInterference = false;
SeenAllInterferences = false;
Tag = NewLiveUnion.getTag();
UserTag = NewUserTag;
}
void init(unsigned NewUserTag, const LiveRange &NewLR,
const LiveIntervalUnion &NewLiveUnion) {
if (UserTag == NewUserTag && LR == &NewLR && LiveUnion == &NewLiveUnion &&
!NewLiveUnion.changedSince(Tag)) {
// Retain cached results, e.g. firstInterference.
return;
}
reset(NewUserTag, NewLR, NewLiveUnion);
}
// Does this live virtual register interfere with the union?
bool checkInterference() { return collectInterferingVRegs(1); }
// Vector generated by collectInterferingVRegs.
const SmallVectorImpl<const LiveInterval *> &interferingVRegs(
unsigned MaxInterferingRegs = std::numeric_limits<unsigned>::max()) {
if (!SeenAllInterferences || MaxInterferingRegs < InterferingVRegs.size())
collectInterferingVRegs(MaxInterferingRegs);
return InterferingVRegs;
}
};
// Array of LiveIntervalUnions.
class Array {
unsigned Size = 0;
LiveIntervalUnion *LIUs = nullptr;
public:
Array() = default;
~Array() { clear(); }
// Initialize the array to have Size entries.
// Reuse an existing allocation if the size matches.
void init(LiveIntervalUnion::Allocator&, unsigned Size);
unsigned size() const { return Size; }
void clear();
LiveIntervalUnion& operator[](unsigned idx) {
assert(idx < Size && "idx out of bounds");
return LIUs[idx];
}
const LiveIntervalUnion& operator[](unsigned Idx) const {
assert(Idx < Size && "Idx out of bounds");
return LIUs[Idx];
}
};
};
} // end namespace llvm
#endif // LLVM_CODEGEN_LIVEINTERVALUNION_H
PK iwFZރ�&�5 �5 & CodeGen/TargetLoweringObjectFileImpl.hnu �[��� //==- llvm/CodeGen/TargetLoweringObjectFileImpl.h - Object Info --*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements classes used to handle lowerings specific to common
// object file formats.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_TARGETLOWERINGOBJECTFILEIMPL_H
#define LLVM_CODEGEN_TARGETLOWERINGOBJECTFILEIMPL_H
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/BinaryFormat/XCOFF.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/Target/TargetLoweringObjectFile.h"
namespace llvm {
class GlobalValue;
class MachineModuleInfo;
class MachineFunction;
class MCContext;
class MCExpr;
class MCSection;
class MCSymbol;
class Module;
class TargetMachine;
class TargetLoweringObjectFileELF : public TargetLoweringObjectFile {
bool UseInitArray = false;
mutable unsigned NextUniqueID = 1; // ID 0 is reserved for execute-only sections
SmallPtrSet<GlobalObject *, 2> Used;
protected:
MCSymbolRefExpr::VariantKind PLTRelativeVariantKind =
MCSymbolRefExpr::VK_None;
public:
TargetLoweringObjectFileELF();
~TargetLoweringObjectFileELF() override = default;
void Initialize(MCContext &Ctx, const TargetMachine &TM) override;
void getModuleMetadata(Module &M) override;
/// Emit Obj-C garbage collection and linker options.
void emitModuleMetadata(MCStreamer &Streamer, Module &M) const override;
void emitPersonalityValue(MCStreamer &Streamer, const DataLayout &DL,
const MCSymbol *Sym) const override;
/// Given a constant with the SectionKind, return a section that it should be
/// placed in.
MCSection *getSectionForConstant(const DataLayout &DL, SectionKind Kind,
const Constant *C,
Align &Alignment) const override;
MCSection *getExplicitSectionGlobal(const GlobalObject *GO, SectionKind Kind,
const TargetMachine &TM) const override;
MCSection *SelectSectionForGlobal(const GlobalObject *GO, SectionKind Kind,
const TargetMachine &TM) const override;
MCSection *getSectionForJumpTable(const Function &F,
const TargetMachine &TM) const override;
MCSection *getSectionForLSDA(const Function &F, const MCSymbol &FnSym,
const TargetMachine &TM) const override;
MCSection *
getSectionForMachineBasicBlock(const Function &F,
const MachineBasicBlock &MBB,
const TargetMachine &TM) const override;
MCSection *
getUniqueSectionForFunction(const Function &F,
const TargetMachine &TM) const override;
bool shouldPutJumpTableInFunctionSection(bool UsesLabelDifference,
const Function &F) const override;
/// Return an MCExpr to use for a reference to the specified type info global
/// variable from exception handling information.
const MCExpr *getTTypeGlobalReference(const GlobalValue *GV,
unsigned Encoding,
const TargetMachine &TM,
MachineModuleInfo *MMI,
MCStreamer &Streamer) const override;
// The symbol that gets passed to .cfi_personality.
MCSymbol *getCFIPersonalitySymbol(const GlobalValue *GV,
const TargetMachine &TM,
MachineModuleInfo *MMI) const override;
void InitializeELF(bool UseInitArray_);
MCSection *getStaticCtorSection(unsigned Priority,
const MCSymbol *KeySym) const override;
MCSection *getStaticDtorSection(unsigned Priority,
const MCSymbol *KeySym) const override;
const MCExpr *lowerRelativeReference(const GlobalValue *LHS,
const GlobalValue *RHS,
const TargetMachine &TM) const override;
const MCExpr *lowerDSOLocalEquivalent(const DSOLocalEquivalent *Equiv,
const TargetMachine &TM) const override;
MCSection *getSectionForCommandLines() const override;
};
class TargetLoweringObjectFileMachO : public TargetLoweringObjectFile {
public:
TargetLoweringObjectFileMachO();
~TargetLoweringObjectFileMachO() override = default;
void Initialize(MCContext &Ctx, const TargetMachine &TM) override;
MCSection *getStaticDtorSection(unsigned Priority,
const MCSymbol *KeySym) const override;
/// Emit the module flags that specify the garbage collection information.
void emitModuleMetadata(MCStreamer &Streamer, Module &M) const override;
MCSection *SelectSectionForGlobal(const GlobalObject *GO, SectionKind Kind,
const TargetMachine &TM) const override;
MCSection *getExplicitSectionGlobal(const GlobalObject *GO, SectionKind Kind,
const TargetMachine &TM) const override;
MCSection *getSectionForConstant(const DataLayout &DL, SectionKind Kind,
const Constant *C,
Align &Alignment) const override;
/// The mach-o version of this method defaults to returning a stub reference.
const MCExpr *getTTypeGlobalReference(const GlobalValue *GV,
unsigned Encoding,
const TargetMachine &TM,
MachineModuleInfo *MMI,
MCStreamer &Streamer) const override;
// The symbol that gets passed to .cfi_personality.
MCSymbol *getCFIPersonalitySymbol(const GlobalValue *GV,
const TargetMachine &TM,
MachineModuleInfo *MMI) const override;
/// Get MachO PC relative GOT entry relocation
const MCExpr *getIndirectSymViaGOTPCRel(const GlobalValue *GV,
const MCSymbol *Sym,
const MCValue &MV, int64_t Offset,
MachineModuleInfo *MMI,
MCStreamer &Streamer) const override;
void getNameWithPrefix(SmallVectorImpl<char> &OutName, const GlobalValue *GV,
const TargetMachine &TM) const override;
MCSection *getSectionForCommandLines() const override;
};
class TargetLoweringObjectFileCOFF : public TargetLoweringObjectFile {
mutable unsigned NextUniqueID = 0;
const TargetMachine *TM = nullptr;
public:
~TargetLoweringObjectFileCOFF() override = default;
void Initialize(MCContext &Ctx, const TargetMachine &TM) override;
MCSection *getExplicitSectionGlobal(const GlobalObject *GO, SectionKind Kind,
const TargetMachine &TM) const override;
MCSection *SelectSectionForGlobal(const GlobalObject *GO, SectionKind Kind,
const TargetMachine &TM) const override;
void getNameWithPrefix(SmallVectorImpl<char> &OutName, const GlobalValue *GV,
const TargetMachine &TM) const override;
MCSection *getSectionForJumpTable(const Function &F,
const TargetMachine &TM) const override;
bool shouldPutJumpTableInFunctionSection(bool UsesLabelDifference,
const Function &F) const override;
/// Emit Obj-C garbage collection and linker options.
void emitModuleMetadata(MCStreamer &Streamer, Module &M) const override;
MCSection *getStaticCtorSection(unsigned Priority,
const MCSymbol *KeySym) const override;
MCSection *getStaticDtorSection(unsigned Priority,
const MCSymbol *KeySym) const override;
const MCExpr *lowerRelativeReference(const GlobalValue *LHS,
const GlobalValue *RHS,
const TargetMachine &TM) const override;
/// Given a mergeable constant with the specified size and relocation
/// information, return a section that it should be placed in.
MCSection *getSectionForConstant(const DataLayout &DL, SectionKind Kind,
const Constant *C,
Align &Alignment) const override;
private:
void emitLinkerDirectives(MCStreamer &Streamer, Module &M) const;
};
class TargetLoweringObjectFileWasm : public TargetLoweringObjectFile {
mutable unsigned NextUniqueID = 0;
public:
TargetLoweringObjectFileWasm() = default;
~TargetLoweringObjectFileWasm() override = default;
MCSection *getExplicitSectionGlobal(const GlobalObject *GO, SectionKind Kind,
const TargetMachine &TM) const override;
MCSection *SelectSectionForGlobal(const GlobalObject *GO, SectionKind Kind,
const TargetMachine &TM) const override;
bool shouldPutJumpTableInFunctionSection(bool UsesLabelDifference,
const Function &F) const override;
void InitializeWasm();
MCSection *getStaticCtorSection(unsigned Priority,
const MCSymbol *KeySym) const override;
MCSection *getStaticDtorSection(unsigned Priority,
const MCSymbol *KeySym) const override;
const MCExpr *lowerRelativeReference(const GlobalValue *LHS,
const GlobalValue *RHS,
const TargetMachine &TM) const override;
};
class TargetLoweringObjectFileXCOFF : public TargetLoweringObjectFile {
public:
TargetLoweringObjectFileXCOFF() = default;
~TargetLoweringObjectFileXCOFF() override = default;
static bool ShouldEmitEHBlock(const MachineFunction *MF);
static bool ShouldSetSSPCanaryBitInTB(const MachineFunction *MF);
static MCSymbol *getEHInfoTableSymbol(const MachineFunction *MF);
void Initialize(MCContext &Ctx, const TargetMachine &TM) override;
bool shouldPutJumpTableInFunctionSection(bool UsesLabelDifference,
const Function &F) const override;
MCSection *getExplicitSectionGlobal(const GlobalObject *GO, SectionKind Kind,
const TargetMachine &TM) const override;
MCSection *getStaticCtorSection(unsigned Priority,
const MCSymbol *KeySym) const override;
MCSection *getStaticDtorSection(unsigned Priority,
const MCSymbol *KeySym) const override;
const MCExpr *lowerRelativeReference(const GlobalValue *LHS,
const GlobalValue *RHS,
const TargetMachine &TM) const override;
MCSection *SelectSectionForGlobal(const GlobalObject *GO, SectionKind Kind,
const TargetMachine &TM) const override;
MCSection *getSectionForJumpTable(const Function &F,
const TargetMachine &TM) const override;
/// Given a constant with the SectionKind, return a section that it should be
/// placed in.
MCSection *getSectionForConstant(const DataLayout &DL, SectionKind Kind,
const Constant *C,
Align &Alignment) const override;
static XCOFF::StorageClass getStorageClassForGlobal(const GlobalValue *GV);
MCSection *
getSectionForFunctionDescriptor(const Function *F,
const TargetMachine &TM) const override;
MCSection *getSectionForTOCEntry(const MCSymbol *Sym,
const TargetMachine &TM) const override;
/// For external functions, this will always return a function descriptor
/// csect.
MCSection *
getSectionForExternalReference(const GlobalObject *GO,
const TargetMachine &TM) const override;
/// For functions, this will always return a function descriptor symbol.
MCSymbol *getTargetSymbol(const GlobalValue *GV,
const TargetMachine &TM) const override;
MCSymbol *getFunctionEntryPointSymbol(const GlobalValue *Func,
const TargetMachine &TM) const override;
/// For functions, this will return the LSDA section. If option
/// -ffunction-sections is on, this will return a unique csect with the
/// function name appended to .gcc_except_table as a suffix of the LSDA
/// section name.
MCSection *getSectionForLSDA(const Function &F, const MCSymbol &FnSym,
const TargetMachine &TM) const override;
};
class TargetLoweringObjectFileGOFF : public TargetLoweringObjectFile {
public:
TargetLoweringObjectFileGOFF();
~TargetLoweringObjectFileGOFF() override = default;
MCSection *SelectSectionForGlobal(const GlobalObject *GO, SectionKind Kind,
const TargetMachine &TM) const override;
MCSection *getExplicitSectionGlobal(const GlobalObject *GO, SectionKind Kind,
const TargetMachine &TM) const override;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_TARGETLOWERINGOBJECTFILEIMPL_H
PK iwFZ�f�c& c& CodeGen/MachineOutliner.hnu �[��� //===---- MachineOutliner.h - Outliner data structures ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// Contains all data structures shared between the outliner implemented in
/// MachineOutliner.cpp and target implementations of the outliner.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEOUTLINER_H
#define LLVM_CODEGEN_MACHINEOUTLINER_H
#include "llvm/CodeGen/LiveRegUnits.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include <initializer_list>
namespace llvm {
namespace outliner {
/// Represents how an instruction should be mapped by the outliner.
/// \p Legal instructions are those which are safe to outline.
/// \p LegalTerminator instructions are safe to outline, but only as the
/// last instruction in a sequence.
/// \p Illegal instructions are those which cannot be outlined.
/// \p Invisible instructions are instructions which can be outlined, but
/// shouldn't actually impact the outlining result.
enum InstrType { Legal, LegalTerminator, Illegal, Invisible };
/// An individual sequence of instructions to be replaced with a call to
/// an outlined function.
struct Candidate {
private:
/// The start index of this \p Candidate in the instruction list.
unsigned StartIdx = 0;
/// The number of instructions in this \p Candidate.
unsigned Len = 0;
// The first instruction in this \p Candidate.
MachineBasicBlock::iterator FirstInst;
// The last instruction in this \p Candidate.
MachineBasicBlock::iterator LastInst;
// The basic block that contains this Candidate.
MachineBasicBlock *MBB = nullptr;
/// Cost of calling an outlined function from this point as defined by the
/// target.
unsigned CallOverhead = 0;
/// Liveness information for this Candidate. Tracks from the end of the
/// block containing this Candidate to the beginning of its sequence.
///
/// Optional. Can be used to fine-tune the cost model, or fine-tune legality
/// decisions.
LiveRegUnits FromEndOfBlockToStartOfSeq;
/// Liveness information restricted to this Candidate's instruction sequence.
///
/// Optional. Can be used to fine-tune the cost model, or fine-tune legality
/// decisions.
LiveRegUnits InSeq;
/// True if FromEndOfBlockToStartOfSeq has been initialized.
bool FromEndOfBlockToStartOfSeqWasSet = false;
/// True if InSeq has been initialized.
bool InSeqWasSet = false;
/// Populate FromEndOfBlockToStartOfSeq with liveness information.
void initFromEndOfBlockToStartOfSeq(const TargetRegisterInfo &TRI) {
assert(MBB->getParent()->getRegInfo().tracksLiveness() &&
"Candidate's Machine Function must track liveness");
// Only initialize once.
if (FromEndOfBlockToStartOfSeqWasSet)
return;
FromEndOfBlockToStartOfSeqWasSet = true;
FromEndOfBlockToStartOfSeq.init(TRI);
FromEndOfBlockToStartOfSeq.addLiveOuts(*MBB);
// Compute liveness from the end of the block up to the beginning of the
// outlining candidate.
for (auto &MI : make_range(MBB->rbegin(),
(MachineBasicBlock::reverse_iterator)front()))
FromEndOfBlockToStartOfSeq.stepBackward(MI);
}
/// Populate InSeq with liveness information.
void initInSeq(const TargetRegisterInfo &TRI) {
assert(MBB->getParent()->getRegInfo().tracksLiveness() &&
"Candidate's Machine Function must track liveness");
// Only initialize once.
if (InSeqWasSet)
return;
InSeqWasSet = true;
InSeq.init(TRI);
for (auto &MI : make_range(front(), std::next(back())))
InSeq.accumulate(MI);
}
public:
/// The index of this \p Candidate's \p OutlinedFunction in the list of
/// \p OutlinedFunctions.
unsigned FunctionIdx = 0;
/// Identifier denoting the instructions to emit to call an outlined function
/// from this point. Defined by the target.
unsigned CallConstructionID = 0;
/// Target-specific flags for this Candidate's MBB.
unsigned Flags = 0x0;
/// Return the number of instructions in this Candidate.
unsigned getLength() const { return Len; }
/// Return the start index of this candidate.
unsigned getStartIdx() const { return StartIdx; }
/// Return the end index of this candidate.
unsigned getEndIdx() const { return StartIdx + Len - 1; }
/// Set the CallConstructionID and CallOverhead of this candidate to CID and
/// CO respectively.
void setCallInfo(unsigned CID, unsigned CO) {
CallConstructionID = CID;
CallOverhead = CO;
}
/// Returns the call overhead of this candidate if it is in the list.
unsigned getCallOverhead() const { return CallOverhead; }
MachineBasicBlock::iterator &front() { return FirstInst; }
MachineBasicBlock::iterator &back() { return LastInst; }
MachineFunction *getMF() const { return MBB->getParent(); }
MachineBasicBlock *getMBB() const { return MBB; }
/// \returns True if \p Reg is available from the end of the block to the
/// beginning of the sequence.
///
/// This query considers the following range:
///
/// in_seq_1
/// in_seq_2
/// ...
/// in_seq_n
/// not_in_seq_1
/// ...
/// <end of block>
bool isAvailableAcrossAndOutOfSeq(Register Reg,
const TargetRegisterInfo &TRI) {
if (!FromEndOfBlockToStartOfSeqWasSet)
initFromEndOfBlockToStartOfSeq(TRI);
return FromEndOfBlockToStartOfSeq.available(Reg);
}
/// \returns True if `isAvailableAcrossAndOutOfSeq` fails for any register
/// in \p Regs.
bool isAnyUnavailableAcrossOrOutOfSeq(std::initializer_list<Register> Regs,
const TargetRegisterInfo &TRI) {
if (!FromEndOfBlockToStartOfSeqWasSet)
initFromEndOfBlockToStartOfSeq(TRI);
return any_of(Regs, [&](Register Reg) {
return !FromEndOfBlockToStartOfSeq.available(Reg);
});
}
/// \returns True if \p Reg is available within the sequence itself.
///
/// This query considers the following range:
///
/// in_seq_1
/// in_seq_2
/// ...
/// in_seq_n
bool isAvailableInsideSeq(Register Reg, const TargetRegisterInfo &TRI) {
if (!InSeqWasSet)
initInSeq(TRI);
return InSeq.available(Reg);
}
/// The number of instructions that would be saved by outlining every
/// candidate of this type.
///
/// This is a fixed value which is not updated during the candidate pruning
/// process. It is only used for deciding which candidate to keep if two
/// candidates overlap. The true benefit is stored in the OutlinedFunction
/// for some given candidate.
unsigned Benefit = 0;
Candidate(unsigned StartIdx, unsigned Len,
MachineBasicBlock::iterator &FirstInst,
MachineBasicBlock::iterator &LastInst, MachineBasicBlock *MBB,
unsigned FunctionIdx, unsigned Flags)
: StartIdx(StartIdx), Len(Len), FirstInst(FirstInst), LastInst(LastInst),
MBB(MBB), FunctionIdx(FunctionIdx), Flags(Flags) {}
Candidate() = delete;
/// Used to ensure that \p Candidates are outlined in an order that
/// preserves the start and end indices of other \p Candidates.
bool operator<(const Candidate &RHS) const {
return getStartIdx() > RHS.getStartIdx();
}
};
/// The information necessary to create an outlined function for some
/// class of candidate.
struct OutlinedFunction {
public:
std::vector<Candidate> Candidates;
/// The actual outlined function created.
/// This is initialized after we go through and create the actual function.
MachineFunction *MF = nullptr;
/// Represents the size of a sequence in bytes. (Some instructions vary
/// widely in size, so just counting the instructions isn't very useful.)
unsigned SequenceSize = 0;
/// Target-defined overhead of constructing a frame for this function.
unsigned FrameOverhead = 0;
/// Target-defined identifier for constructing a frame for this function.
unsigned FrameConstructionID = 0;
/// Return the number of candidates for this \p OutlinedFunction.
unsigned getOccurrenceCount() const { return Candidates.size(); }
/// Return the number of bytes it would take to outline this
/// function.
unsigned getOutliningCost() const {
unsigned CallOverhead = 0;
for (const Candidate &C : Candidates)
CallOverhead += C.getCallOverhead();
return CallOverhead + SequenceSize + FrameOverhead;
}
/// Return the size in bytes of the unoutlined sequences.
unsigned getNotOutlinedCost() const {
return getOccurrenceCount() * SequenceSize;
}
/// Return the number of instructions that would be saved by outlining
/// this function.
unsigned getBenefit() const {
unsigned NotOutlinedCost = getNotOutlinedCost();
unsigned OutlinedCost = getOutliningCost();
return (NotOutlinedCost < OutlinedCost) ? 0
: NotOutlinedCost - OutlinedCost;
}
/// Return the number of instructions in this sequence.
unsigned getNumInstrs() const { return Candidates[0].getLength(); }
OutlinedFunction(std::vector<Candidate> &Candidates, unsigned SequenceSize,
unsigned FrameOverhead, unsigned FrameConstructionID)
: Candidates(Candidates), SequenceSize(SequenceSize),
FrameOverhead(FrameOverhead), FrameConstructionID(FrameConstructionID) {
const unsigned B = getBenefit();
for (Candidate &C : Candidates)
C.Benefit = B;
}
OutlinedFunction() = delete;
};
} // namespace outliner
} // namespace llvm
#endif
PK iwFZ��x+P +P CodeGen/MachineValueType.hnu �[��� //===- CodeGen/MachineValueType.h - Machine-Level types ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the set of machine-level target independent types which
// legal values in the code generator use.
//
// Constants and properties are defined in ValueTypes.td.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEVALUETYPE_H
#define LLVM_CODEGEN_MACHINEVALUETYPE_H
#include "llvm/ADT/Sequence.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/TypeSize.h"
#include <cassert>
#include <cstdint>
namespace llvm {
class Type;
class raw_ostream;
/// Machine Value Type. Every type that is supported natively by some
/// processor targeted by LLVM occurs here. This means that any legal value
/// type can be represented by an MVT.
class MVT {
public:
enum SimpleValueType : uint8_t {
// Simple value types that aren't explicitly part of this enumeration
// are considered extended value types.
INVALID_SIMPLE_VALUE_TYPE = 0,
#define GET_VT_ATTR(Ty, n, sz, Any, Int, FP, Vec, Sc) Ty = n,
#define GET_VT_RANGES
#include "llvm/CodeGen/GenVT.inc"
#undef GET_VT_ATTR
#undef GET_VT_RANGES
VALUETYPE_SIZE = LAST_VALUETYPE + 1,
// This is the current maximum for LAST_VALUETYPE.
// MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors
// This value must be a multiple of 32.
MAX_ALLOWED_VALUETYPE = 224,
};
static_assert(FIRST_VALUETYPE > 0);
static_assert(LAST_VALUETYPE < MAX_ALLOWED_VALUETYPE);
SimpleValueType SimpleTy = INVALID_SIMPLE_VALUE_TYPE;
constexpr MVT() = default;
constexpr MVT(SimpleValueType SVT) : SimpleTy(SVT) {}
bool operator>(const MVT& S) const { return SimpleTy > S.SimpleTy; }
bool operator<(const MVT& S) const { return SimpleTy < S.SimpleTy; }
bool operator==(const MVT& S) const { return SimpleTy == S.SimpleTy; }
bool operator!=(const MVT& S) const { return SimpleTy != S.SimpleTy; }
bool operator>=(const MVT& S) const { return SimpleTy >= S.SimpleTy; }
bool operator<=(const MVT& S) const { return SimpleTy <= S.SimpleTy; }
/// Support for debugging, callable in GDB: VT.dump()
void dump() const;
/// Implement operator<<.
void print(raw_ostream &OS) const;
/// Return true if this is a valid simple valuetype.
bool isValid() const {
return (SimpleTy >= MVT::FIRST_VALUETYPE &&
SimpleTy <= MVT::LAST_VALUETYPE);
}
/// Return true if this is a FP or a vector FP type.
bool isFloatingPoint() const {
return ((SimpleTy >= MVT::FIRST_FP_VALUETYPE &&
SimpleTy <= MVT::LAST_FP_VALUETYPE) ||
(SimpleTy >= MVT::FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE &&
SimpleTy <= MVT::LAST_FP_FIXEDLEN_VECTOR_VALUETYPE) ||
(SimpleTy >= MVT::FIRST_FP_SCALABLE_VECTOR_VALUETYPE &&
SimpleTy <= MVT::LAST_FP_SCALABLE_VECTOR_VALUETYPE));
}
/// Return true if this is an integer or a vector integer type.
bool isInteger() const {
return ((SimpleTy >= MVT::FIRST_INTEGER_VALUETYPE &&
SimpleTy <= MVT::LAST_INTEGER_VALUETYPE) ||
(SimpleTy >= MVT::FIRST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE &&
SimpleTy <= MVT::LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE) ||
(SimpleTy >= MVT::FIRST_INTEGER_SCALABLE_VECTOR_VALUETYPE &&
SimpleTy <= MVT::LAST_INTEGER_SCALABLE_VECTOR_VALUETYPE));
}
/// Return true if this is an integer, not including vectors.
bool isScalarInteger() const {
return (SimpleTy >= MVT::FIRST_INTEGER_VALUETYPE &&
SimpleTy <= MVT::LAST_INTEGER_VALUETYPE);
}
/// Return true if this is a vector value type.
bool isVector() const {
return (SimpleTy >= MVT::FIRST_VECTOR_VALUETYPE &&
SimpleTy <= MVT::LAST_VECTOR_VALUETYPE);
}
/// Return true if this is a vector value type where the
/// runtime length is machine dependent
bool isScalableVector() const {
return (SimpleTy >= MVT::FIRST_SCALABLE_VECTOR_VALUETYPE &&
SimpleTy <= MVT::LAST_SCALABLE_VECTOR_VALUETYPE);
}
/// Return true if this is a custom target type that has a scalable size.
bool isScalableTargetExtVT() const {
return SimpleTy == MVT::aarch64svcount;
}
/// Return true if the type is a scalable type.
bool isScalableVT() const {
return isScalableVector() || isScalableTargetExtVT();
}
bool isFixedLengthVector() const {
return (SimpleTy >= MVT::FIRST_FIXEDLEN_VECTOR_VALUETYPE &&
SimpleTy <= MVT::LAST_FIXEDLEN_VECTOR_VALUETYPE);
}
/// Return true if this is a 16-bit vector type.
bool is16BitVector() const {
return (isFixedLengthVector() && getFixedSizeInBits() == 16);
}
/// Return true if this is a 32-bit vector type.
bool is32BitVector() const {
return (isFixedLengthVector() && getFixedSizeInBits() == 32);
}
/// Return true if this is a 64-bit vector type.
bool is64BitVector() const {
return (isFixedLengthVector() && getFixedSizeInBits() == 64);
}
/// Return true if this is a 128-bit vector type.
bool is128BitVector() const {
return (isFixedLengthVector() && getFixedSizeInBits() == 128);
}
/// Return true if this is a 256-bit vector type.
bool is256BitVector() const {
return (isFixedLengthVector() && getFixedSizeInBits() == 256);
}
/// Return true if this is a 512-bit vector type.
bool is512BitVector() const {
return (isFixedLengthVector() && getFixedSizeInBits() == 512);
}
/// Return true if this is a 1024-bit vector type.
bool is1024BitVector() const {
return (isFixedLengthVector() && getFixedSizeInBits() == 1024);
}
/// Return true if this is a 2048-bit vector type.
bool is2048BitVector() const {
return (isFixedLengthVector() && getFixedSizeInBits() == 2048);
}
/// Return true if this is an overloaded type for TableGen.
bool isOverloaded() const {
switch (SimpleTy) {
#define GET_VT_ATTR(Ty, n, sz, Any, Int, FP, Vec, Sc) \
case Ty: \
return Any;
#include "llvm/CodeGen/GenVT.inc"
#undef GET_VT_ATTR
default:
return false;
}
}
/// Return a vector with the same number of elements as this vector, but
/// with the element type converted to an integer type with the same
/// bitwidth.
MVT changeVectorElementTypeToInteger() const {
MVT EltTy = getVectorElementType();
MVT IntTy = MVT::getIntegerVT(EltTy.getSizeInBits());
MVT VecTy = MVT::getVectorVT(IntTy, getVectorElementCount());
assert(VecTy.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE &&
"Simple vector VT not representable by simple integer vector VT!");
return VecTy;
}
/// Return a VT for a vector type whose attributes match ourselves
/// with the exception of the element type that is chosen by the caller.
MVT changeVectorElementType(MVT EltVT) const {
MVT VecTy = MVT::getVectorVT(EltVT, getVectorElementCount());
assert(VecTy.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE &&
"Simple vector VT not representable by simple integer vector VT!");
return VecTy;
}
/// Return the type converted to an equivalently sized integer or vector
/// with integer element type. Similar to changeVectorElementTypeToInteger,
/// but also handles scalars.
MVT changeTypeToInteger() {
if (isVector())
return changeVectorElementTypeToInteger();
return MVT::getIntegerVT(getSizeInBits());
}
/// Return a VT for a vector type with the same element type but
/// half the number of elements.
MVT getHalfNumVectorElementsVT() const {
MVT EltVT = getVectorElementType();
auto EltCnt = getVectorElementCount();
assert(EltCnt.isKnownEven() && "Splitting vector, but not in half!");
return getVectorVT(EltVT, EltCnt.divideCoefficientBy(2));
}
// Return a VT for a vector type with the same element type but
// double the number of elements.
MVT getDoubleNumVectorElementsVT() const {
MVT EltVT = getVectorElementType();
auto EltCnt = getVectorElementCount();
return MVT::getVectorVT(EltVT, EltCnt * 2);
}
/// Returns true if the given vector is a power of 2.
bool isPow2VectorType() const {
unsigned NElts = getVectorMinNumElements();
return !(NElts & (NElts - 1));
}
/// Widens the length of the given vector MVT up to the nearest power of 2
/// and returns that type.
MVT getPow2VectorType() const {
if (isPow2VectorType())
return *this;
ElementCount NElts = getVectorElementCount();
unsigned NewMinCount = 1 << Log2_32_Ceil(NElts.getKnownMinValue());
NElts = ElementCount::get(NewMinCount, NElts.isScalable());
return MVT::getVectorVT(getVectorElementType(), NElts);
}
/// If this is a vector, return the element type, otherwise return this.
MVT getScalarType() const {
return isVector() ? getVectorElementType() : *this;
}
MVT getVectorElementType() const {
switch (SimpleTy) {
default:
llvm_unreachable("Not a vector MVT!");
#define GET_VT_VECATTR(Ty, Sc, nElem, ElTy, ElSz) \
case Ty: \
return ElTy;
#include "llvm/CodeGen/GenVT.inc"
#undef GET_VT_VECATTR
}
}
/// Given a vector type, return the minimum number of elements it contains.
unsigned getVectorMinNumElements() const {
switch (SimpleTy) {
default:
llvm_unreachable("Not a vector MVT!");
#define GET_VT_VECATTR(Ty, Sc, nElem, ElTy, ElSz) \
case Ty: \
return nElem;
#include "llvm/CodeGen/GenVT.inc"
#undef GET_VT_VECATTR
}
}
ElementCount getVectorElementCount() const {
return ElementCount::get(getVectorMinNumElements(), isScalableVector());
}
unsigned getVectorNumElements() const {
if (isScalableVector())
llvm::reportInvalidSizeRequest(
"Possible incorrect use of MVT::getVectorNumElements() for "
"scalable vector. Scalable flag may be dropped, use "
"MVT::getVectorElementCount() instead");
return getVectorMinNumElements();
}
/// Returns the size of the specified MVT in bits.
///
/// If the value type is a scalable vector type, the scalable property will
/// be set and the runtime size will be a positive integer multiple of the
/// base size.
TypeSize getSizeInBits() const {
switch (SimpleTy) {
default:
switch (SimpleTy) {
default:
llvm_unreachable("getSizeInBits called on extended MVT.");
#define GET_VT_ATTR(Ty, N, Sz, Any, Int, FP, Vec, Sc) \
case Ty: \
return (Sc ? TypeSize::Scalable(Sz) : TypeSize::Fixed(Sz));
#include "llvm/CodeGen/GenVT.inc"
#undef GET_VT_ATTR
}
case Other:
llvm_unreachable("Value type is non-standard value, Other.");
case iPTR:
llvm_unreachable("Value type size is target-dependent. Ask TLI.");
case iPTRAny:
case iAny:
case fAny:
case vAny:
case Any:
llvm_unreachable("Value type is overloaded.");
case token:
llvm_unreachable("Token type is a sentinel that cannot be used "
"in codegen and has no size");
case Metadata:
llvm_unreachable("Value type is metadata.");
case aarch64svcount: // FIXME: Not in the td.
return TypeSize::Scalable(16);
}
}
/// Return the size of the specified fixed width value type in bits. The
/// function will assert if the type is scalable.
uint64_t getFixedSizeInBits() const {
return getSizeInBits().getFixedValue();
}
uint64_t getScalarSizeInBits() const {
return getScalarType().getSizeInBits().getFixedValue();
}
/// Return the number of bytes overwritten by a store of the specified value
/// type.
///
/// If the value type is a scalable vector type, the scalable property will
/// be set and the runtime size will be a positive integer multiple of the
/// base size.
TypeSize getStoreSize() const {
TypeSize BaseSize = getSizeInBits();
return {(BaseSize.getKnownMinValue() + 7) / 8, BaseSize.isScalable()};
}
// Return the number of bytes overwritten by a store of this value type or
// this value type's element type in the case of a vector.
uint64_t getScalarStoreSize() const {
return getScalarType().getStoreSize().getFixedValue();
}
/// Return the number of bits overwritten by a store of the specified value
/// type.
///
/// If the value type is a scalable vector type, the scalable property will
/// be set and the runtime size will be a positive integer multiple of the
/// base size.
TypeSize getStoreSizeInBits() const {
return getStoreSize() * 8;
}
/// Returns true if the number of bits for the type is a multiple of an
/// 8-bit byte.
bool isByteSized() const { return getSizeInBits().isKnownMultipleOf(8); }
/// Return true if we know at compile time this has more bits than VT.
bool knownBitsGT(MVT VT) const {
return TypeSize::isKnownGT(getSizeInBits(), VT.getSizeInBits());
}
/// Return true if we know at compile time this has more than or the same
/// bits as VT.
bool knownBitsGE(MVT VT) const {
return TypeSize::isKnownGE(getSizeInBits(), VT.getSizeInBits());
}
/// Return true if we know at compile time this has fewer bits than VT.
bool knownBitsLT(MVT VT) const {
return TypeSize::isKnownLT(getSizeInBits(), VT.getSizeInBits());
}
/// Return true if we know at compile time this has fewer than or the same
/// bits as VT.
bool knownBitsLE(MVT VT) const {
return TypeSize::isKnownLE(getSizeInBits(), VT.getSizeInBits());
}
/// Return true if this has more bits than VT.
bool bitsGT(MVT VT) const {
assert(isScalableVector() == VT.isScalableVector() &&
"Comparison between scalable and fixed types");
return knownBitsGT(VT);
}
/// Return true if this has no less bits than VT.
bool bitsGE(MVT VT) const {
assert(isScalableVector() == VT.isScalableVector() &&
"Comparison between scalable and fixed types");
return knownBitsGE(VT);
}
/// Return true if this has less bits than VT.
bool bitsLT(MVT VT) const {
assert(isScalableVector() == VT.isScalableVector() &&
"Comparison between scalable and fixed types");
return knownBitsLT(VT);
}
/// Return true if this has no more bits than VT.
bool bitsLE(MVT VT) const {
assert(isScalableVector() == VT.isScalableVector() &&
"Comparison between scalable and fixed types");
return knownBitsLE(VT);
}
static MVT getFloatingPointVT(unsigned BitWidth) {
#define GET_VT_ATTR(Ty, n, sz, Any, Int, FP, Vec, Sc) \
if (FP == 3 && sz == BitWidth) \
return Ty;
#include "llvm/CodeGen/GenVT.inc"
#undef GET_VT_ATTR
llvm_unreachable("Bad bit width!");
}
static MVT getIntegerVT(unsigned BitWidth) {
#define GET_VT_ATTR(Ty, n, sz, Any, Int, FP, Vec, Sc) \
if (Int == 3 && sz == BitWidth) \
return Ty;
#include "llvm/CodeGen/GenVT.inc"
#undef GET_VT_ATTR
return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE);
}
static MVT getVectorVT(MVT VT, unsigned NumElements) {
#define GET_VT_VECATTR(Ty, Sc, nElem, ElTy, ElSz) \
if (!Sc && VT.SimpleTy == ElTy && NumElements == nElem) \
return Ty;
#include "llvm/CodeGen/GenVT.inc"
#undef GET_VT_VECATTR
return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE);
}
static MVT getScalableVectorVT(MVT VT, unsigned NumElements) {
#define GET_VT_VECATTR(Ty, Sc, nElem, ElTy, ElSz) \
if (Sc && VT.SimpleTy == ElTy && NumElements == nElem) \
return Ty;
#include "llvm/CodeGen/GenVT.inc"
#undef GET_VT_VECATTR
return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE);
}
static MVT getVectorVT(MVT VT, unsigned NumElements, bool IsScalable) {
if (IsScalable)
return getScalableVectorVT(VT, NumElements);
return getVectorVT(VT, NumElements);
}
static MVT getVectorVT(MVT VT, ElementCount EC) {
if (EC.isScalable())
return getScalableVectorVT(VT, EC.getKnownMinValue());
return getVectorVT(VT, EC.getKnownMinValue());
}
/// Return the value type corresponding to the specified type. This returns
/// all pointers as iPTR. If HandleUnknown is true, unknown types are
/// returned as Other, otherwise they are invalid.
static MVT getVT(Type *Ty, bool HandleUnknown = false);
public:
/// SimpleValueType Iteration
/// @{
static auto all_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_VALUETYPE, MVT::LAST_VALUETYPE,
force_iteration_on_noniterable_enum);
}
static auto integer_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_INTEGER_VALUETYPE,
MVT::LAST_INTEGER_VALUETYPE,
force_iteration_on_noniterable_enum);
}
static auto fp_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_FP_VALUETYPE, MVT::LAST_FP_VALUETYPE,
force_iteration_on_noniterable_enum);
}
static auto vector_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_VECTOR_VALUETYPE,
MVT::LAST_VECTOR_VALUETYPE,
force_iteration_on_noniterable_enum);
}
static auto fixedlen_vector_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_FIXEDLEN_VECTOR_VALUETYPE,
MVT::LAST_FIXEDLEN_VECTOR_VALUETYPE,
force_iteration_on_noniterable_enum);
}
static auto scalable_vector_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_SCALABLE_VECTOR_VALUETYPE,
MVT::LAST_SCALABLE_VECTOR_VALUETYPE,
force_iteration_on_noniterable_enum);
}
static auto integer_fixedlen_vector_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE,
MVT::LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE,
force_iteration_on_noniterable_enum);
}
static auto fp_fixedlen_vector_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE,
MVT::LAST_FP_FIXEDLEN_VECTOR_VALUETYPE,
force_iteration_on_noniterable_enum);
}
static auto integer_scalable_vector_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_INTEGER_SCALABLE_VECTOR_VALUETYPE,
MVT::LAST_INTEGER_SCALABLE_VECTOR_VALUETYPE,
force_iteration_on_noniterable_enum);
}
static auto fp_scalable_vector_valuetypes() {
return enum_seq_inclusive(MVT::FIRST_FP_SCALABLE_VECTOR_VALUETYPE,
MVT::LAST_FP_SCALABLE_VECTOR_VALUETYPE,
force_iteration_on_noniterable_enum);
}
/// @}
};
inline raw_ostream &operator<<(raw_ostream &OS, const MVT &VT) {
VT.print(OS);
return OS;
}
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINEVALUETYPE_H
PK iwFZ��Z� � CodeGen/WasmEHFuncInfo.hnu �[��� //===--- llvm/CodeGen/WasmEHFuncInfo.h --------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Data structures for Wasm exception handling schemes.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_WASMEHFUNCINFO_H
#define LLVM_CODEGEN_WASMEHFUNCINFO_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/PointerUnion.h"
#include "llvm/ADT/SmallPtrSet.h"
namespace llvm {
class BasicBlock;
class Function;
class MachineBasicBlock;
namespace WebAssembly {
enum Tag { CPP_EXCEPTION = 0, C_LONGJMP = 1 };
}
using BBOrMBB = PointerUnion<const BasicBlock *, MachineBasicBlock *>;
struct WasmEHFuncInfo {
// When there is an entry <A, B>, if an exception is not caught by A, it
// should next unwind to the EH pad B.
DenseMap<BBOrMBB, BBOrMBB> SrcToUnwindDest;
DenseMap<BBOrMBB, SmallPtrSet<BBOrMBB, 4>> UnwindDestToSrcs; // reverse map
// Helper functions
const BasicBlock *getUnwindDest(const BasicBlock *BB) const {
assert(hasUnwindDest(BB));
return cast<const BasicBlock *>(SrcToUnwindDest.lookup(BB));
}
SmallPtrSet<const BasicBlock *, 4> getUnwindSrcs(const BasicBlock *BB) const {
assert(hasUnwindSrcs(BB));
const auto &Set = UnwindDestToSrcs.lookup(BB);
SmallPtrSet<const BasicBlock *, 4> Ret;
for (const auto P : Set)
Ret.insert(cast<const BasicBlock *>(P));
return Ret;
}
void setUnwindDest(const BasicBlock *BB, const BasicBlock *Dest) {
SrcToUnwindDest[BB] = Dest;
UnwindDestToSrcs[Dest].insert(BB);
}
bool hasUnwindDest(const BasicBlock *BB) const {
return SrcToUnwindDest.count(BB);
}
bool hasUnwindSrcs(const BasicBlock *BB) const {
return UnwindDestToSrcs.count(BB);
}
MachineBasicBlock *getUnwindDest(MachineBasicBlock *MBB) const {
assert(hasUnwindDest(MBB));
return cast<MachineBasicBlock *>(SrcToUnwindDest.lookup(MBB));
}
SmallPtrSet<MachineBasicBlock *, 4>
getUnwindSrcs(MachineBasicBlock *MBB) const {
assert(hasUnwindSrcs(MBB));
const auto &Set = UnwindDestToSrcs.lookup(MBB);
SmallPtrSet<MachineBasicBlock *, 4> Ret;
for (const auto P : Set)
Ret.insert(cast<MachineBasicBlock *>(P));
return Ret;
}
void setUnwindDest(MachineBasicBlock *MBB, MachineBasicBlock *Dest) {
SrcToUnwindDest[MBB] = Dest;
UnwindDestToSrcs[Dest].insert(MBB);
}
bool hasUnwindDest(MachineBasicBlock *MBB) const {
return SrcToUnwindDest.count(MBB);
}
bool hasUnwindSrcs(MachineBasicBlock *MBB) const {
return UnwindDestToSrcs.count(MBB);
}
};
// Analyze the IR in the given function to build WasmEHFuncInfo.
void calculateWasmEHInfo(const Function *F, WasmEHFuncInfo &EHInfo);
} // namespace llvm
#endif // LLVM_CODEGEN_WASMEHFUNCINFO_H
PK iwFZ��G G CodeGen/MachineCycleAnalysis.hnu �[��� //===- MachineCycleAnalysis.h - Cycle Info for Machine IR -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the MachineCycleInfo class, which is a thin wrapper over
// the Machine IR instance of GenericCycleInfo.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINECYCLEANALYSIS_H
#define LLVM_CODEGEN_MACHINECYCLEANALYSIS_H
#include "llvm/ADT/GenericCycleInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineSSAContext.h"
namespace llvm {
extern template class GenericCycleInfo<MachineSSAContext>;
extern template class GenericCycle<MachineSSAContext>;
using MachineCycleInfo = GenericCycleInfo<MachineSSAContext>;
using MachineCycle = MachineCycleInfo::CycleT;
/// Legacy analysis pass which computes a \ref MachineCycleInfo.
class MachineCycleInfoWrapperPass : public MachineFunctionPass {
MachineFunction *F = nullptr;
MachineCycleInfo CI;
public:
static char ID;
MachineCycleInfoWrapperPass();
MachineCycleInfo &getCycleInfo() { return CI; }
const MachineCycleInfo &getCycleInfo() const { return CI; }
bool runOnMachineFunction(MachineFunction &F) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override;
void print(raw_ostream &OS, const Module *M = nullptr) const override;
};
// TODO: add this function to GenericCycle template after implementing IR
// version.
bool isCycleInvariant(const MachineCycle *Cycle, MachineInstr &I);
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINECYCLEANALYSIS_H
PK iwFZJ(>� � CodeGen/Analysis.hnu �[��� //===- CodeGen/Analysis.h - CodeGen LLVM IR Analysis Utilities --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares several CodeGen-specific LLVM IR analysis utilities.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_ANALYSIS_H
#define LLVM_CODEGEN_ANALYSIS_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/IR/Instructions.h"
namespace llvm {
template <typename T> class SmallVectorImpl;
class GlobalValue;
class LLT;
class MachineBasicBlock;
class MachineFunction;
class TargetLoweringBase;
class TargetLowering;
class TargetMachine;
struct EVT;
/// Compute the linearized index of a member in a nested
/// aggregate/struct/array.
///
/// Given an LLVM IR aggregate type and a sequence of insertvalue or
/// extractvalue indices that identify a member, return the linearized index of
/// the start of the member, i.e the number of element in memory before the
/// sought one. This is disconnected from the number of bytes.
///
/// \param Ty is the type indexed by \p Indices.
/// \param Indices is an optional pointer in the indices list to the current
/// index.
/// \param IndicesEnd is the end of the indices list.
/// \param CurIndex is the current index in the recursion.
///
/// \returns \p CurIndex plus the linear index in \p Ty the indices list.
unsigned ComputeLinearIndex(Type *Ty,
const unsigned *Indices,
const unsigned *IndicesEnd,
unsigned CurIndex = 0);
inline unsigned ComputeLinearIndex(Type *Ty,
ArrayRef<unsigned> Indices,
unsigned CurIndex = 0) {
return ComputeLinearIndex(Ty, Indices.begin(), Indices.end(), CurIndex);
}
/// ComputeValueVTs - Given an LLVM IR type, compute a sequence of
/// EVTs that represent all the individual underlying
/// non-aggregate types that comprise it.
///
/// If Offsets is non-null, it points to a vector to be filled in
/// with the in-memory offsets of each of the individual values.
///
void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty,
SmallVectorImpl<EVT> &ValueVTs,
SmallVectorImpl<TypeSize> *Offsets,
TypeSize StartingOffset);
void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty,
SmallVectorImpl<EVT> &ValueVTs,
SmallVectorImpl<TypeSize> *Offsets = nullptr,
uint64_t StartingOffset = 0);
void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty,
SmallVectorImpl<EVT> &ValueVTs,
SmallVectorImpl<uint64_t> *FixedOffsets,
uint64_t StartingOffset);
/// Variant of ComputeValueVTs that also produces the memory VTs.
void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty,
SmallVectorImpl<EVT> &ValueVTs,
SmallVectorImpl<EVT> *MemVTs,
SmallVectorImpl<TypeSize> *Offsets,
TypeSize StartingOffset);
void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty,
SmallVectorImpl<EVT> &ValueVTs,
SmallVectorImpl<EVT> *MemVTs,
SmallVectorImpl<TypeSize> *Offsets = nullptr,
uint64_t StartingOffset = 0);
void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty,
SmallVectorImpl<EVT> &ValueVTs,
SmallVectorImpl<EVT> *MemVTs,
SmallVectorImpl<uint64_t> *FixedOffsets,
uint64_t StartingOffset);
/// computeValueLLTs - Given an LLVM IR type, compute a sequence of
/// LLTs that represent all the individual underlying
/// non-aggregate types that comprise it.
///
/// If Offsets is non-null, it points to a vector to be filled in
/// with the in-memory offsets of each of the individual values.
///
void computeValueLLTs(const DataLayout &DL, Type &Ty,
SmallVectorImpl<LLT> &ValueTys,
SmallVectorImpl<uint64_t> *Offsets = nullptr,
uint64_t StartingOffset = 0);
/// ExtractTypeInfo - Returns the type info, possibly bitcast, encoded in V.
GlobalValue *ExtractTypeInfo(Value *V);
/// getFCmpCondCode - Return the ISD condition code corresponding to
/// the given LLVM IR floating-point condition code. This includes
/// consideration of global floating-point math flags.
///
ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred);
/// getFCmpCodeWithoutNaN - Given an ISD condition code comparing floats,
/// return the equivalent code if we're allowed to assume that NaNs won't occur.
ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC);
/// getICmpCondCode - Return the ISD condition code corresponding to
/// the given LLVM IR integer condition code.
ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred);
/// getICmpCondCode - Return the LLVM IR integer condition code
/// corresponding to the given ISD integer condition code.
ICmpInst::Predicate getICmpCondCode(ISD::CondCode Pred);
/// Test if the given instruction is in a position to be optimized
/// with a tail-call. This roughly means that it's in a block with
/// a return and there's nothing that needs to be scheduled
/// between it and the return.
///
/// This function only tests target-independent requirements.
bool isInTailCallPosition(const CallBase &Call, const TargetMachine &TM);
/// Test if given that the input instruction is in the tail call position, if
/// there is an attribute mismatch between the caller and the callee that will
/// inhibit tail call optimizations.
/// \p AllowDifferingSizes is an output parameter which, if forming a tail call
/// is permitted, determines whether it's permitted only if the size of the
/// caller's and callee's return types match exactly.
bool attributesPermitTailCall(const Function *F, const Instruction *I,
const ReturnInst *Ret,
const TargetLoweringBase &TLI,
bool *AllowDifferingSizes = nullptr);
/// Test if given that the input instruction is in the tail call position if the
/// return type or any attributes of the function will inhibit tail call
/// optimization.
bool returnTypeIsEligibleForTailCall(const Function *F, const Instruction *I,
const ReturnInst *Ret,
const TargetLoweringBase &TLI);
DenseMap<const MachineBasicBlock *, int>
getEHScopeMembership(const MachineFunction &MF);
} // End llvm namespace
#endif
PK iwFZ:Q� � CodeGen/DIEValue.defnu �[��� //===- llvm/CodeGen/DIEValue.def - DIEValue types ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Macros for running through all types of DIEValue.
//
//===----------------------------------------------------------------------===//
#if !(defined HANDLE_DIEVALUE || defined HANDLE_DIEVALUE_SMALL || \
defined HANDLE_DIEVALUE_LARGE)
#error "Missing macro definition of HANDLE_DIEVALUE"
#endif
// Handler for all values.
#ifndef HANDLE_DIEVALUE
#define HANDLE_DIEVALUE(T)
#endif
// Handler for small values.
#ifndef HANDLE_DIEVALUE_SMALL
#define HANDLE_DIEVALUE_SMALL(T) HANDLE_DIEVALUE(T)
#endif
// Handler for large values.
#ifndef HANDLE_DIEVALUE_LARGE
#define HANDLE_DIEVALUE_LARGE(T) HANDLE_DIEVALUE(T)
#endif
HANDLE_DIEVALUE_SMALL(Integer)
HANDLE_DIEVALUE_SMALL(String)
HANDLE_DIEVALUE_SMALL(Expr)
HANDLE_DIEVALUE_SMALL(Label)
HANDLE_DIEVALUE_LARGE(BaseTypeRef)
HANDLE_DIEVALUE_LARGE(Delta)
HANDLE_DIEVALUE_SMALL(Entry)
HANDLE_DIEVALUE_LARGE(Block)
HANDLE_DIEVALUE_LARGE(Loc)
HANDLE_DIEVALUE_SMALL(LocList)
HANDLE_DIEVALUE_LARGE(InlineString)
HANDLE_DIEVALUE_LARGE(AddrOffset)
#undef HANDLE_DIEVALUE
#undef HANDLE_DIEVALUE_SMALL
#undef HANDLE_DIEVALUE_LARGE
PK iwFZ��_�Z
Z
CodeGen/MIRParser/MIRParser.hnu �[��� //===- MIRParser.h - MIR serialization format parser ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This MIR serialization library is currently a work in progress. It can't
// serialize machine functions at this time.
//
// This file declares the functions that parse the MIR serialization format
// files.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MIRPARSER_MIRPARSER_H
#define LLVM_CODEGEN_MIRPARSER_MIRPARSER_H
#include "llvm/ADT/STLFunctionalExtras.h"
#include "llvm/ADT/StringRef.h"
#include <functional>
#include <memory>
#include <optional>
namespace llvm {
class Function;
class LLVMContext;
class MemoryBuffer;
class Module;
class MIRParserImpl;
class MachineModuleInfo;
class SMDiagnostic;
class StringRef;
typedef llvm::function_ref<std::optional<std::string>(StringRef, StringRef)>
DataLayoutCallbackTy;
/// This class initializes machine functions by applying the state loaded from
/// a MIR file.
class MIRParser {
std::unique_ptr<MIRParserImpl> Impl;
public:
MIRParser(std::unique_ptr<MIRParserImpl> Impl);
MIRParser(const MIRParser &) = delete;
~MIRParser();
/// Parses the optional LLVM IR module in the MIR file.
///
/// A new, empty module is created if the LLVM IR isn't present.
/// \returns nullptr if a parsing error occurred.
std::unique_ptr<Module>
parseIRModule(DataLayoutCallbackTy DataLayoutCallback =
[](StringRef, StringRef) { return std::nullopt; });
/// Parses MachineFunctions in the MIR file and add them to the given
/// MachineModuleInfo \p MMI.
///
/// \returns true if an error occurred.
bool parseMachineFunctions(Module &M, MachineModuleInfo &MMI);
};
/// This function is the main interface to the MIR serialization format parser.
///
/// It reads in a MIR file and returns a MIR parser that can parse the embedded
/// LLVM IR module and initialize the machine functions by parsing the machine
/// function's state.
///
/// \param Filename - The name of the file to parse.
/// \param Error - Error result info.
/// \param Context - Context which will be used for the parsed LLVM IR module.
/// \param ProcessIRFunction - function to run on every IR function or stub
/// loaded from the MIR file.
std::unique_ptr<MIRParser> createMIRParserFromFile(
StringRef Filename, SMDiagnostic &Error, LLVMContext &Context,
std::function<void(Function &)> ProcessIRFunction = nullptr);
/// This function is another interface to the MIR serialization format parser.
///
/// It returns a MIR parser that works with the given memory buffer and that can
/// parse the embedded LLVM IR module and initialize the machine functions by
/// parsing the machine function's state.
///
/// \param Contents - The MemoryBuffer containing the machine level IR.
/// \param Context - Context which will be used for the parsed LLVM IR module.
std::unique_ptr<MIRParser>
createMIRParser(std::unique_ptr<MemoryBuffer> Contents, LLVMContext &Context,
std::function<void(Function &)> ProcessIRFunction = nullptr);
} // end namespace llvm
#endif // LLVM_CODEGEN_MIRPARSER_MIRPARSER_H
PK iwFZ:�ó�! �! CodeGen/MIRParser/MIParser.hnu �[��� //===- MIParser.h - Machine Instructions Parser -----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the function that parses the machine instructions.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MIRPARSER_MIPARSER_H
#define LLVM_CODEGEN_MIRPARSER_MIPARSER_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/Register.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/SMLoc.h"
#include <utility>
namespace llvm {
class MachineBasicBlock;
class MachineFunction;
class MDNode;
class RegisterBank;
struct SlotMapping;
class SMDiagnostic;
class SourceMgr;
class StringRef;
class TargetRegisterClass;
class TargetSubtargetInfo;
struct VRegInfo {
enum uint8_t {
UNKNOWN, NORMAL, GENERIC, REGBANK
} Kind = UNKNOWN;
bool Explicit = false; ///< VReg was explicitly specified in the .mir file.
union {
const TargetRegisterClass *RC;
const RegisterBank *RegBank;
} D;
Register VReg;
Register PreferredReg;
};
using Name2RegClassMap = StringMap<const TargetRegisterClass *>;
using Name2RegBankMap = StringMap<const RegisterBank *>;
struct PerTargetMIParsingState {
private:
const TargetSubtargetInfo &Subtarget;
/// Maps from instruction names to op codes.
StringMap<unsigned> Names2InstrOpCodes;
/// Maps from register names to registers.
StringMap<Register> Names2Regs;
/// Maps from register mask names to register masks.
StringMap<const uint32_t *> Names2RegMasks;
/// Maps from subregister names to subregister indices.
StringMap<unsigned> Names2SubRegIndices;
/// Maps from target index names to target indices.
StringMap<int> Names2TargetIndices;
/// Maps from direct target flag names to the direct target flag values.
StringMap<unsigned> Names2DirectTargetFlags;
/// Maps from direct target flag names to the bitmask target flag values.
StringMap<unsigned> Names2BitmaskTargetFlags;
/// Maps from MMO target flag names to MMO target flag values.
StringMap<MachineMemOperand::Flags> Names2MMOTargetFlags;
/// Maps from register class names to register classes.
Name2RegClassMap Names2RegClasses;
/// Maps from register bank names to register banks.
Name2RegBankMap Names2RegBanks;
void initNames2InstrOpCodes();
void initNames2Regs();
void initNames2RegMasks();
void initNames2SubRegIndices();
void initNames2TargetIndices();
void initNames2DirectTargetFlags();
void initNames2BitmaskTargetFlags();
void initNames2MMOTargetFlags();
void initNames2RegClasses();
void initNames2RegBanks();
public:
/// Try to convert an instruction name to an opcode. Return true if the
/// instruction name is invalid.
bool parseInstrName(StringRef InstrName, unsigned &OpCode);
/// Try to convert a register name to a register number. Return true if the
/// register name is invalid.
bool getRegisterByName(StringRef RegName, Register &Reg);
/// Check if the given identifier is a name of a register mask.
///
/// Return null if the identifier isn't a register mask.
const uint32_t *getRegMask(StringRef Identifier);
/// Check if the given identifier is a name of a subregister index.
///
/// Return 0 if the name isn't a subregister index class.
unsigned getSubRegIndex(StringRef Name);
/// Try to convert a name of target index to the corresponding target index.
///
/// Return true if the name isn't a name of a target index.
bool getTargetIndex(StringRef Name, int &Index);
/// Try to convert a name of a direct target flag to the corresponding
/// target flag.
///
/// Return true if the name isn't a name of a direct flag.
bool getDirectTargetFlag(StringRef Name, unsigned &Flag);
/// Try to convert a name of a bitmask target flag to the corresponding
/// target flag.
///
/// Return true if the name isn't a name of a bitmask target flag.
bool getBitmaskTargetFlag(StringRef Name, unsigned &Flag);
/// Try to convert a name of a MachineMemOperand target flag to the
/// corresponding target flag.
///
/// Return true if the name isn't a name of a target MMO flag.
bool getMMOTargetFlag(StringRef Name, MachineMemOperand::Flags &Flag);
/// Check if the given identifier is a name of a register class.
///
/// Return null if the name isn't a register class.
const TargetRegisterClass *getRegClass(StringRef Name);
/// Check if the given identifier is a name of a register bank.
///
/// Return null if the name isn't a register bank.
const RegisterBank *getRegBank(StringRef Name);
PerTargetMIParsingState(const TargetSubtargetInfo &STI)
: Subtarget(STI) {
initNames2RegClasses();
initNames2RegBanks();
}
~PerTargetMIParsingState() = default;
void setTarget(const TargetSubtargetInfo &NewSubtarget);
};
struct PerFunctionMIParsingState {
BumpPtrAllocator Allocator;
MachineFunction &MF;
SourceMgr *SM;
const SlotMapping &IRSlots;
PerTargetMIParsingState &Target;
std::map<unsigned, TrackingMDNodeRef> MachineMetadataNodes;
std::map<unsigned, std::pair<TempMDTuple, SMLoc>> MachineForwardRefMDNodes;
DenseMap<unsigned, MachineBasicBlock *> MBBSlots;
DenseMap<Register, VRegInfo *> VRegInfos;
StringMap<VRegInfo *> VRegInfosNamed;
DenseMap<unsigned, int> FixedStackObjectSlots;
DenseMap<unsigned, int> StackObjectSlots;
DenseMap<unsigned, unsigned> ConstantPoolSlots;
DenseMap<unsigned, unsigned> JumpTableSlots;
/// Maps from slot numbers to function's unnamed values.
DenseMap<unsigned, const Value *> Slots2Values;
PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM,
const SlotMapping &IRSlots,
PerTargetMIParsingState &Target);
VRegInfo &getVRegInfo(Register Num);
VRegInfo &getVRegInfoNamed(StringRef RegName);
const Value *getIRValue(unsigned Slot);
};
/// Parse the machine basic block definitions, and skip the machine
/// instructions.
///
/// This function runs the first parsing pass on the machine function's body.
/// It parses only the machine basic block definitions and creates the machine
/// basic blocks in the given machine function.
///
/// The machine instructions aren't parsed during the first pass because all
/// the machine basic blocks aren't defined yet - this makes it impossible to
/// resolve the machine basic block references.
///
/// Return true if an error occurred.
bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS,
StringRef Src, SMDiagnostic &Error);
/// Parse the machine instructions.
///
/// This function runs the second parsing pass on the machine function's body.
/// It skips the machine basic block definitions and parses only the machine
/// instructions and basic block attributes like liveins and successors.
///
/// The second parsing pass assumes that the first parsing pass already ran
/// on the given source string.
///
/// Return true if an error occurred.
bool parseMachineInstructions(PerFunctionMIParsingState &PFS, StringRef Src,
SMDiagnostic &Error);
bool parseMBBReference(PerFunctionMIParsingState &PFS,
MachineBasicBlock *&MBB, StringRef Src,
SMDiagnostic &Error);
bool parseRegisterReference(PerFunctionMIParsingState &PFS,
Register &Reg, StringRef Src,
SMDiagnostic &Error);
bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg,
StringRef Src, SMDiagnostic &Error);
bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS,
VRegInfo *&Info, StringRef Src,
SMDiagnostic &Error);
bool parseStackObjectReference(PerFunctionMIParsingState &PFS, int &FI,
StringRef Src, SMDiagnostic &Error);
bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node, StringRef Src,
SMDiagnostic &Error);
bool parseMachineMetadata(PerFunctionMIParsingState &PFS, StringRef Src,
SMRange SourceRange, SMDiagnostic &Error);
} // end namespace llvm
#endif // LLVM_CODEGEN_MIRPARSER_MIPARSER_H
PK iwFZ�Ѐ�� � CodeGen/MachineModuleInfoImpls.hnu �[��� //===- llvm/CodeGen/MachineModuleInfoImpls.h --------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines object-file format specific implementations of
// MachineModuleInfoImpl.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEMODULEINFOIMPLS_H
#define LLVM_CODEGEN_MACHINEMODULEINFOIMPLS_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include <cassert>
namespace llvm {
class MCSymbol;
/// MachineModuleInfoMachO - This is a MachineModuleInfoImpl implementation
/// for MachO targets.
class MachineModuleInfoMachO : public MachineModuleInfoImpl {
/// GVStubs - Darwin '$non_lazy_ptr' stubs. The key is something like
/// "Lfoo$non_lazy_ptr", the value is something like "_foo". The extra bit
/// is true if this GV is external.
DenseMap<MCSymbol *, StubValueTy> GVStubs;
/// ThreadLocalGVStubs - Darwin '$non_lazy_ptr' stubs. The key is something
/// like "Lfoo$non_lazy_ptr", the value is something like "_foo". The extra
/// bit is true if this GV is external.
DenseMap<MCSymbol *, StubValueTy> ThreadLocalGVStubs;
virtual void anchor(); // Out of line virtual method.
public:
MachineModuleInfoMachO(const MachineModuleInfo &) {}
StubValueTy &getGVStubEntry(MCSymbol *Sym) {
assert(Sym && "Key cannot be null");
return GVStubs[Sym];
}
StubValueTy &getThreadLocalGVStubEntry(MCSymbol *Sym) {
assert(Sym && "Key cannot be null");
return ThreadLocalGVStubs[Sym];
}
/// Accessor methods to return the set of stubs in sorted order.
SymbolListTy GetGVStubList() { return getSortedStubs(GVStubs); }
SymbolListTy GetThreadLocalGVStubList() {
return getSortedStubs(ThreadLocalGVStubs);
}
};
/// MachineModuleInfoELF - This is a MachineModuleInfoImpl implementation
/// for ELF targets.
class MachineModuleInfoELF : public MachineModuleInfoImpl {
/// GVStubs - These stubs are used to materialize global addresses in PIC
/// mode.
DenseMap<MCSymbol *, StubValueTy> GVStubs;
virtual void anchor(); // Out of line virtual method.
public:
MachineModuleInfoELF(const MachineModuleInfo &) {}
StubValueTy &getGVStubEntry(MCSymbol *Sym) {
assert(Sym && "Key cannot be null");
return GVStubs[Sym];
}
/// Accessor methods to return the set of stubs in sorted order.
SymbolListTy GetGVStubList() { return getSortedStubs(GVStubs); }
};
/// MachineModuleInfoCOFF - This is a MachineModuleInfoImpl implementation
/// for COFF targets.
class MachineModuleInfoCOFF : public MachineModuleInfoImpl {
/// GVStubs - These stubs are used to materialize global addresses in PIC
/// mode.
DenseMap<MCSymbol *, StubValueTy> GVStubs;
virtual void anchor(); // Out of line virtual method.
public:
MachineModuleInfoCOFF(const MachineModuleInfo &) {}
StubValueTy &getGVStubEntry(MCSymbol *Sym) {
assert(Sym && "Key cannot be null");
return GVStubs[Sym];
}
/// Accessor methods to return the set of stubs in sorted order.
SymbolListTy GetGVStubList() { return getSortedStubs(GVStubs); }
};
/// MachineModuleInfoWasm - This is a MachineModuleInfoImpl implementation
/// for Wasm targets.
class MachineModuleInfoWasm : public MachineModuleInfoImpl {
virtual void anchor(); // Out of line virtual method.
public:
MachineModuleInfoWasm(const MachineModuleInfo &) {}
SetVector<StringRef> MachineSymbolsUsed;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINEMODULEINFOIMPLS_H
PK iwFZ� ��c c ! CodeGen/SwiftErrorValueTracking.hnu �[��� //===- SwiftErrorValueTracking.h - Track swifterror VReg vals --*- C++ -*--===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This implements a limited mem2reg-like analysis to promote uses of function
// arguments and allocas marked with swiftalloc from memory into virtual
// registers tracked by this class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_SWIFTERRORVALUETRACKING_H
#define LLVM_CODEGEN_SWIFTERRORVALUETRACKING_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/Register.h"
#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/DebugLoc.h"
#include <utility>
namespace llvm {
class Function;
class MachineBasicBlock;
class MachineFunction;
class MachineInstr;
class TargetInstrInfo;
class TargetLowering;
class SwiftErrorValueTracking {
// Some useful objects to reduce the number of function arguments needed.
MachineFunction *MF;
const Function *Fn;
const TargetLowering *TLI;
const TargetInstrInfo *TII;
/// A map from swifterror value in a basic block to the virtual register it is
/// currently represented by.
DenseMap<std::pair<const MachineBasicBlock *, const Value *>, Register>
VRegDefMap;
/// A list of upward exposed vreg uses that need to be satisfied by either a
/// copy def or a phi node at the beginning of the basic block representing
/// the predecessor(s) swifterror value.
DenseMap<std::pair<const MachineBasicBlock *, const Value *>, Register>
VRegUpwardsUse;
/// A map from instructions that define/use a swifterror value to the virtual
/// register that represents that def/use.
llvm::DenseMap<PointerIntPair<const Instruction *, 1, bool>, Register>
VRegDefUses;
/// The swifterror argument of the current function.
const Value *SwiftErrorArg;
using SwiftErrorValues = SmallVector<const Value*, 1>;
/// A function can only have a single swifterror argument. And if it does
/// have a swifterror argument, it must be the first entry in
/// SwiftErrorVals.
SwiftErrorValues SwiftErrorVals;
public:
/// Initialize data structures for specified new function.
void setFunction(MachineFunction &MF);
/// Get the (unique) function argument that was marked swifterror, or nullptr
/// if this function has no swifterror args.
const Value *getFunctionArg() const {
return SwiftErrorArg;
}
/// Get or create the swifterror value virtual register in
/// VRegDefMap for this basic block.
Register getOrCreateVReg(const MachineBasicBlock *, const Value *);
/// Set the swifterror virtual register in the VRegDefMap for this
/// basic block.
void setCurrentVReg(const MachineBasicBlock *MBB, const Value *, Register);
/// Get or create the swifterror value virtual register for a def of a
/// swifterror by an instruction.
Register getOrCreateVRegDefAt(const Instruction *, const MachineBasicBlock *,
const Value *);
/// Get or create the swifterror value virtual register for a use of a
/// swifterror by an instruction.
Register getOrCreateVRegUseAt(const Instruction *, const MachineBasicBlock *,
const Value *);
/// Create initial definitions of swifterror values in the entry block of the
/// current function.
bool createEntriesInEntryBlock(DebugLoc DbgLoc);
/// Propagate assigned swifterror vregs through a function, synthesizing PHI
/// nodes when needed to maintain consistency.
void propagateVRegs();
void preassignVRegs(MachineBasicBlock *MBB, BasicBlock::const_iterator Begin,
BasicBlock::const_iterator End);
};
}
#endif
PK iwFZy �I�6 �6 CodeGen/MachineMemOperand.hnu �[��� //==- llvm/CodeGen/MachineMemOperand.h - MachineMemOperand class -*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the declaration of the MachineMemOperand class, which is a
// description of a memory reference. It is used to help track dependencies
// in the backend.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEMEMOPERAND_H
#define LLVM_CODEGEN_MACHINEMEMOPERAND_H
#include "llvm/ADT/BitmaskEnum.h"
#include "llvm/ADT/PointerUnion.h"
#include "llvm/CodeGen/LowLevelType.h"
#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/Value.h" // PointerLikeTypeTraits<Value*>
#include "llvm/Support/AtomicOrdering.h"
#include "llvm/Support/DataTypes.h"
namespace llvm {
class MDNode;
class raw_ostream;
class MachineFunction;
class ModuleSlotTracker;
class TargetInstrInfo;
/// This class contains a discriminated union of information about pointers in
/// memory operands, relating them back to LLVM IR or to virtual locations (such
/// as frame indices) that are exposed during codegen.
struct MachinePointerInfo {
/// This is the IR pointer value for the access, or it is null if unknown.
PointerUnion<const Value *, const PseudoSourceValue *> V;
/// Offset - This is an offset from the base Value*.
int64_t Offset;
unsigned AddrSpace = 0;
uint8_t StackID;
explicit MachinePointerInfo(const Value *v, int64_t offset = 0,
uint8_t ID = 0)
: V(v), Offset(offset), StackID(ID) {
AddrSpace = v ? v->getType()->getPointerAddressSpace() : 0;
}
explicit MachinePointerInfo(const PseudoSourceValue *v, int64_t offset = 0,
uint8_t ID = 0)
: V(v), Offset(offset), StackID(ID) {
AddrSpace = v ? v->getAddressSpace() : 0;
}
explicit MachinePointerInfo(unsigned AddressSpace = 0, int64_t offset = 0)
: V((const Value *)nullptr), Offset(offset), AddrSpace(AddressSpace),
StackID(0) {}
explicit MachinePointerInfo(
PointerUnion<const Value *, const PseudoSourceValue *> v,
int64_t offset = 0,
uint8_t ID = 0)
: V(v), Offset(offset), StackID(ID) {
if (V) {
if (const auto *ValPtr = dyn_cast_if_present<const Value *>(V))
AddrSpace = ValPtr->getType()->getPointerAddressSpace();
else
AddrSpace = cast<const PseudoSourceValue *>(V)->getAddressSpace();
}
}
MachinePointerInfo getWithOffset(int64_t O) const {
if (V.isNull())
return MachinePointerInfo(AddrSpace, Offset + O);
if (isa<const Value *>(V))
return MachinePointerInfo(cast<const Value *>(V), Offset + O, StackID);
return MachinePointerInfo(cast<const PseudoSourceValue *>(V), Offset + O,
StackID);
}
/// Return true if memory region [V, V+Offset+Size) is known to be
/// dereferenceable.
bool isDereferenceable(unsigned Size, LLVMContext &C,
const DataLayout &DL) const;
/// Return the LLVM IR address space number that this pointer points into.
unsigned getAddrSpace() const;
/// Return a MachinePointerInfo record that refers to the constant pool.
static MachinePointerInfo getConstantPool(MachineFunction &MF);
/// Return a MachinePointerInfo record that refers to the specified
/// FrameIndex.
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI,
int64_t Offset = 0);
/// Return a MachinePointerInfo record that refers to a jump table entry.
static MachinePointerInfo getJumpTable(MachineFunction &MF);
/// Return a MachinePointerInfo record that refers to a GOT entry.
static MachinePointerInfo getGOT(MachineFunction &MF);
/// Stack pointer relative access.
static MachinePointerInfo getStack(MachineFunction &MF, int64_t Offset,
uint8_t ID = 0);
/// Stack memory without other information.
static MachinePointerInfo getUnknownStack(MachineFunction &MF);
};
//===----------------------------------------------------------------------===//
/// A description of a memory reference used in the backend.
/// Instead of holding a StoreInst or LoadInst, this class holds the address
/// Value of the reference along with a byte size and offset. This allows it
/// to describe lowered loads and stores. Also, the special PseudoSourceValue
/// objects can be used to represent loads and stores to memory locations
/// that aren't explicit in the regular LLVM IR.
///
class MachineMemOperand {
public:
/// Flags values. These may be or'd together.
enum Flags : uint16_t {
// No flags set.
MONone = 0,
/// The memory access reads data.
MOLoad = 1u << 0,
/// The memory access writes data.
MOStore = 1u << 1,
/// The memory access is volatile.
MOVolatile = 1u << 2,
/// The memory access is non-temporal.
MONonTemporal = 1u << 3,
/// The memory access is dereferenceable (i.e., doesn't trap).
MODereferenceable = 1u << 4,
/// The memory access always returns the same value (or traps).
MOInvariant = 1u << 5,
// Reserved for use by target-specific passes.
// Targets may override getSerializableMachineMemOperandTargetFlags() to
// enable MIR serialization/parsing of these flags. If more of these flags
// are added, the MIR printing/parsing code will need to be updated as well.
MOTargetFlag1 = 1u << 6,
MOTargetFlag2 = 1u << 7,
MOTargetFlag3 = 1u << 8,
LLVM_MARK_AS_BITMASK_ENUM(/* LargestFlag = */ MOTargetFlag3)
};
private:
/// Atomic information for this memory operation.
struct MachineAtomicInfo {
/// Synchronization scope ID for this memory operation.
unsigned SSID : 8; // SyncScope::ID
/// Atomic ordering requirements for this memory operation. For cmpxchg
/// atomic operations, atomic ordering requirements when store occurs.
unsigned Ordering : 4; // enum AtomicOrdering
/// For cmpxchg atomic operations, atomic ordering requirements when store
/// does not occur.
unsigned FailureOrdering : 4; // enum AtomicOrdering
};
MachinePointerInfo PtrInfo;
/// Track the memory type of the access. An access size which is unknown or
/// too large to be represented by LLT should use the invalid LLT.
LLT MemoryType;
Flags FlagVals;
Align BaseAlign;
MachineAtomicInfo AtomicInfo;
AAMDNodes AAInfo;
const MDNode *Ranges;
public:
/// Construct a MachineMemOperand object with the specified PtrInfo, flags,
/// size, and base alignment. For atomic operations the synchronization scope
/// and atomic ordering requirements must also be specified. For cmpxchg
/// atomic operations the atomic ordering requirements when store does not
/// occur must also be specified.
MachineMemOperand(MachinePointerInfo PtrInfo, Flags flags, uint64_t s,
Align a, const AAMDNodes &AAInfo = AAMDNodes(),
const MDNode *Ranges = nullptr,
SyncScope::ID SSID = SyncScope::System,
AtomicOrdering Ordering = AtomicOrdering::NotAtomic,
AtomicOrdering FailureOrdering = AtomicOrdering::NotAtomic);
MachineMemOperand(MachinePointerInfo PtrInfo, Flags flags, LLT type, Align a,
const AAMDNodes &AAInfo = AAMDNodes(),
const MDNode *Ranges = nullptr,
SyncScope::ID SSID = SyncScope::System,
AtomicOrdering Ordering = AtomicOrdering::NotAtomic,
AtomicOrdering FailureOrdering = AtomicOrdering::NotAtomic);
const MachinePointerInfo &getPointerInfo() const { return PtrInfo; }
/// Return the base address of the memory access. This may either be a normal
/// LLVM IR Value, or one of the special values used in CodeGen.
/// Special values are those obtained via
/// PseudoSourceValue::getFixedStack(int), PseudoSourceValue::getStack, and
/// other PseudoSourceValue member functions which return objects which stand
/// for frame/stack pointer relative references and other special references
/// which are not representable in the high-level IR.
const Value *getValue() const {
return dyn_cast_if_present<const Value *>(PtrInfo.V);
}
const PseudoSourceValue *getPseudoValue() const {
return dyn_cast_if_present<const PseudoSourceValue *>(PtrInfo.V);
}
const void *getOpaqueValue() const { return PtrInfo.V.getOpaqueValue(); }
/// Return the raw flags of the source value, \see Flags.
Flags getFlags() const { return FlagVals; }
/// Bitwise OR the current flags with the given flags.
void setFlags(Flags f) { FlagVals |= f; }
/// For normal values, this is a byte offset added to the base address.
/// For PseudoSourceValue::FPRel values, this is the FrameIndex number.
int64_t getOffset() const { return PtrInfo.Offset; }
unsigned getAddrSpace() const { return PtrInfo.getAddrSpace(); }
/// Return the memory type of the memory reference. This should only be relied
/// on for GlobalISel G_* operation legalization.
LLT getMemoryType() const { return MemoryType; }
/// Return the size in bytes of the memory reference.
uint64_t getSize() const {
return MemoryType.isValid() ? MemoryType.getSizeInBytes() : ~UINT64_C(0);
}
/// Return the size in bits of the memory reference.
uint64_t getSizeInBits() const {
return MemoryType.isValid() ? MemoryType.getSizeInBits() : ~UINT64_C(0);
}
LLT getType() const {
return MemoryType;
}
/// Return the minimum known alignment in bytes of the actual memory
/// reference.
Align getAlign() const;
/// Return the minimum known alignment in bytes of the base address, without
/// the offset.
Align getBaseAlign() const { return BaseAlign; }
/// Return the AA tags for the memory reference.
AAMDNodes getAAInfo() const { return AAInfo; }
/// Return the range tag for the memory reference.
const MDNode *getRanges() const { return Ranges; }
/// Returns the synchronization scope ID for this memory operation.
SyncScope::ID getSyncScopeID() const {
return static_cast<SyncScope::ID>(AtomicInfo.SSID);
}
/// Return the atomic ordering requirements for this memory operation. For
/// cmpxchg atomic operations, return the atomic ordering requirements when
/// store occurs.
AtomicOrdering getSuccessOrdering() const {
return static_cast<AtomicOrdering>(AtomicInfo.Ordering);
}
/// For cmpxchg atomic operations, return the atomic ordering requirements
/// when store does not occur.
AtomicOrdering getFailureOrdering() const {
return static_cast<AtomicOrdering>(AtomicInfo.FailureOrdering);
}
/// Return a single atomic ordering that is at least as strong as both the
/// success and failure orderings for an atomic operation. (For operations
/// other than cmpxchg, this is equivalent to getSuccessOrdering().)
AtomicOrdering getMergedOrdering() const {
return getMergedAtomicOrdering(getSuccessOrdering(), getFailureOrdering());
}
bool isLoad() const { return FlagVals & MOLoad; }
bool isStore() const { return FlagVals & MOStore; }
bool isVolatile() const { return FlagVals & MOVolatile; }
bool isNonTemporal() const { return FlagVals & MONonTemporal; }
bool isDereferenceable() const { return FlagVals & MODereferenceable; }
bool isInvariant() const { return FlagVals & MOInvariant; }
/// Returns true if this operation has an atomic ordering requirement of
/// unordered or higher, false otherwise.
bool isAtomic() const {
return getSuccessOrdering() != AtomicOrdering::NotAtomic;
}
/// Returns true if this memory operation doesn't have any ordering
/// constraints other than normal aliasing. Volatile and (ordered) atomic
/// memory operations can't be reordered.
bool isUnordered() const {
return (getSuccessOrdering() == AtomicOrdering::NotAtomic ||
getSuccessOrdering() == AtomicOrdering::Unordered) &&
!isVolatile();
}
/// Update this MachineMemOperand to reflect the alignment of MMO, if it has a
/// greater alignment. This must only be used when the new alignment applies
/// to all users of this MachineMemOperand.
void refineAlignment(const MachineMemOperand *MMO);
/// Change the SourceValue for this MachineMemOperand. This should only be
/// used when an object is being relocated and all references to it are being
/// updated.
void setValue(const Value *NewSV) { PtrInfo.V = NewSV; }
void setValue(const PseudoSourceValue *NewSV) { PtrInfo.V = NewSV; }
void setOffset(int64_t NewOffset) { PtrInfo.Offset = NewOffset; }
/// Reset the tracked memory type.
void setType(LLT NewTy) {
MemoryType = NewTy;
}
/// Support for operator<<.
/// @{
void print(raw_ostream &OS, ModuleSlotTracker &MST,
SmallVectorImpl<StringRef> &SSNs, const LLVMContext &Context,
const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const;
/// @}
friend bool operator==(const MachineMemOperand &LHS,
const MachineMemOperand &RHS) {
return LHS.getValue() == RHS.getValue() &&
LHS.getPseudoValue() == RHS.getPseudoValue() &&
LHS.getSize() == RHS.getSize() &&
LHS.getOffset() == RHS.getOffset() &&
LHS.getFlags() == RHS.getFlags() &&
LHS.getAAInfo() == RHS.getAAInfo() &&
LHS.getRanges() == RHS.getRanges() &&
LHS.getAlign() == RHS.getAlign() &&
LHS.getAddrSpace() == RHS.getAddrSpace();
}
friend bool operator!=(const MachineMemOperand &LHS,
const MachineMemOperand &RHS) {
return !(LHS == RHS);
}
};
} // End llvm namespace
#endif
PK iwFZ���K; ; ' CodeGen/LazyMachineBlockFrequencyInfo.hnu �[��� ///===- LazyMachineBlockFrequencyInfo.h - Lazy Block Frequency -*- C++ -*--===//
///
/// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
/// See https://llvm.org/LICENSE.txt for license information.
/// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
///
///===---------------------------------------------------------------------===//
/// \file
/// This is an alternative analysis pass to MachineBlockFrequencyInfo. The
/// difference is that with this pass the block frequencies are not computed
/// when the analysis pass is executed but rather when the BFI result is
/// explicitly requested by the analysis client.
///
///===---------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LAZYMACHINEBLOCKFREQUENCYINFO_H
#define LLVM_CODEGEN_LAZYMACHINEBLOCKFREQUENCYINFO_H
#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
namespace llvm {
/// This is an alternative analysis pass to MachineBlockFrequencyInfo.
/// The difference is that with this pass, the block frequencies are not
/// computed when the analysis pass is executed but rather when the BFI result
/// is explicitly requested by the analysis client.
///
/// This works by checking querying if MBFI is available and otherwise
/// generating MBFI on the fly. In this case the passes required for (LI, DT)
/// are also queried before being computed on the fly.
///
/// Note that it is expected that we wouldn't need this functionality for the
/// new PM since with the new PM, analyses are executed on demand.
class LazyMachineBlockFrequencyInfoPass : public MachineFunctionPass {
private:
/// If generated on the fly this own the instance.
mutable std::unique_ptr<MachineBlockFrequencyInfo> OwnedMBFI;
/// If generated on the fly this own the instance.
mutable std::unique_ptr<MachineLoopInfo> OwnedMLI;
/// If generated on the fly this own the instance.
mutable std::unique_ptr<MachineDominatorTree> OwnedMDT;
/// The function.
MachineFunction *MF = nullptr;
/// Calculate MBFI and all other analyses that's not available and
/// required by BFI.
MachineBlockFrequencyInfo &calculateIfNotAvailable() const;
public:
static char ID;
LazyMachineBlockFrequencyInfoPass();
/// Compute and return the block frequencies.
MachineBlockFrequencyInfo &getBFI() { return calculateIfNotAvailable(); }
/// Compute and return the block frequencies.
const MachineBlockFrequencyInfo &getBFI() const {
return calculateIfNotAvailable();
}
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnMachineFunction(MachineFunction &F) override;
void releaseMemory() override;
void print(raw_ostream &OS, const Module *M) const override;
};
}
#endif
PK iwFZ}_�U� � CodeGen/CommandFlags.hnu �[��� //===-- CommandFlags.h - Command Line Flags Interface -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains codegen-specific flags that are shared between different
// command line tools. The tools "llc" and "opt" both use this file to prevent
// flag duplication.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_COMMANDFLAGS_H
#define LLVM_CODEGEN_COMMANDFLAGS_H
#include "llvm/ADT/FloatingPointMode.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Target/TargetOptions.h"
#include <optional>
#include <string>
#include <vector>
namespace llvm {
class Module;
class AttrBuilder;
class Function;
class Triple;
namespace codegen {
std::string getMArch();
std::string getMCPU();
std::vector<std::string> getMAttrs();
Reloc::Model getRelocModel();
std::optional<Reloc::Model> getExplicitRelocModel();
ThreadModel::Model getThreadModel();
CodeModel::Model getCodeModel();
std::optional<CodeModel::Model> getExplicitCodeModel();
llvm::ExceptionHandling getExceptionModel();
std::optional<CodeGenFileType> getExplicitFileType();
CodeGenFileType getFileType();
FramePointerKind getFramePointerUsage();
bool getEnableUnsafeFPMath();
bool getEnableNoInfsFPMath();
bool getEnableNoNaNsFPMath();
bool getEnableNoSignedZerosFPMath();
bool getEnableApproxFuncFPMath();
bool getEnableNoTrappingFPMath();
DenormalMode::DenormalModeKind getDenormalFPMath();
DenormalMode::DenormalModeKind getDenormalFP32Math();
bool getEnableHonorSignDependentRoundingFPMath();
llvm::FloatABI::ABIType getFloatABIForCalls();
llvm::FPOpFusion::FPOpFusionMode getFuseFPOps();
SwiftAsyncFramePointerMode getSwiftAsyncFramePointer();
bool getDontPlaceZerosInBSS();
bool getEnableGuaranteedTailCallOpt();
bool getEnableAIXExtendedAltivecABI();
bool getDisableTailCalls();
bool getStackSymbolOrdering();
unsigned getOverrideStackAlignment();
bool getStackRealign();
std::string getTrapFuncName();
bool getUseCtors();
bool getDisableIntegratedAS();
bool getRelaxELFRelocations();
bool getDataSections();
std::optional<bool> getExplicitDataSections();
bool getFunctionSections();
std::optional<bool> getExplicitFunctionSections();
bool getIgnoreXCOFFVisibility();
bool getXCOFFTracebackTable();
std::string getBBSections();
unsigned getTLSSize();
bool getEmulatedTLS();
std::optional<bool> getExplicitEmulatedTLS();
bool getUniqueSectionNames();
bool getUniqueBasicBlockSectionNames();
llvm::EABI getEABIVersion();
llvm::DebuggerKind getDebuggerTuningOpt();
bool getEnableStackSizeSection();
bool getEnableAddrsig();
bool getEmitCallSiteInfo();
bool getEnableMachineFunctionSplitter();
bool getEnableDebugEntryValues();
bool getValueTrackingVariableLocations();
std::optional<bool> getExplicitValueTrackingVariableLocations();
bool getForceDwarfFrameSection();
bool getXRayFunctionIndex();
bool getDebugStrictDwarf();
unsigned getAlignLoops();
bool getJMCInstrument();
bool getXCOFFReadOnlyPointers();
/// Create this object with static storage to register codegen-related command
/// line options.
struct RegisterCodeGenFlags {
RegisterCodeGenFlags();
};
llvm::BasicBlockSection getBBSectionsMode(llvm::TargetOptions &Options);
/// Common utility function tightly tied to the options listed here. Initializes
/// a TargetOptions object with CodeGen flags and returns it.
/// \p TheTriple is used to determine the default value for options if
/// options are not explicitly specified. If those triple dependant options
/// value do not have effect for your component, a default Triple() could be
/// passed in.
TargetOptions InitTargetOptionsFromCodeGenFlags(const llvm::Triple &TheTriple);
std::string getCPUStr();
std::string getFeaturesStr();
std::vector<std::string> getFeatureList();
void renderBoolStringAttr(AttrBuilder &B, StringRef Name, bool Val);
/// Set function attributes of function \p F based on CPU, Features, and command
/// line flags.
void setFunctionAttributes(StringRef CPU, StringRef Features, Function &F);
/// Set function attributes of functions in Module M based on CPU,
/// Features, and command line flags.
void setFunctionAttributes(StringRef CPU, StringRef Features, Module &M);
/// Should value-tracking variable locations / instruction referencing be
/// enabled by default for this triple?
bool getDefaultValueTrackingVariableLocations(const llvm::Triple &T);
} // namespace codegen
} // namespace llvm
#endif // LLVM_CODEGEN_COMMANDFLAGS_H
PK iwFZK��+� � CodeGen/CalcSpillWeights.hnu �[��� //===- lib/CodeGen/CalcSpillWeights.h ---------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_CALCSPILLWEIGHTS_H
#define LLVM_CODEGEN_CALCSPILLWEIGHTS_H
#include "llvm/CodeGen/SlotIndexes.h"
namespace llvm {
class LiveInterval;
class LiveIntervals;
class MachineBlockFrequencyInfo;
class MachineFunction;
class MachineLoopInfo;
class VirtRegMap;
/// Normalize the spill weight of a live interval
///
/// The spill weight of a live interval is computed as:
///
/// (sum(use freq) + sum(def freq)) / (K + size)
///
/// @param UseDefFreq Expected number of executed use and def instructions
/// per function call. Derived from block frequencies.
/// @param Size Size of live interval as returnexd by getSize()
/// @param NumInstr Number of instructions using this live interval
static inline float normalizeSpillWeight(float UseDefFreq, unsigned Size,
unsigned NumInstr) {
// The constant 25 instructions is added to avoid depending too much on
// accidental SlotIndex gaps for small intervals. The effect is that small
// intervals have a spill weight that is mostly proportional to the number
// of uses, while large intervals get a spill weight that is closer to a use
// density.
return UseDefFreq / (Size + 25*SlotIndex::InstrDist);
}
/// Calculate auxiliary information for a virtual register such as its
/// spill weight and allocation hint.
class VirtRegAuxInfo {
MachineFunction &MF;
LiveIntervals &LIS;
const VirtRegMap &VRM;
const MachineLoopInfo &Loops;
const MachineBlockFrequencyInfo &MBFI;
/// Returns true if Reg of live interval LI is used in instruction with many
/// operands like STATEPOINT.
bool isLiveAtStatepointVarArg(LiveInterval &LI);
public:
VirtRegAuxInfo(MachineFunction &MF, LiveIntervals &LIS,
const VirtRegMap &VRM, const MachineLoopInfo &Loops,
const MachineBlockFrequencyInfo &MBFI)
: MF(MF), LIS(LIS), VRM(VRM), Loops(Loops), MBFI(MBFI) {}
virtual ~VirtRegAuxInfo() = default;
/// (re)compute li's spill weight and allocation hint.
void calculateSpillWeightAndHint(LiveInterval &LI);
/// Compute spill weights and allocation hints for all virtual register
/// live intervals.
void calculateSpillWeightsAndHints();
/// Return the preferred allocation register for reg, given a COPY
/// instruction.
static Register copyHint(const MachineInstr *MI, unsigned Reg,
const TargetRegisterInfo &TRI,
const MachineRegisterInfo &MRI);
/// Determine if all values in LI are rematerializable.
static bool isRematerializable(const LiveInterval &LI,
const LiveIntervals &LIS,
const VirtRegMap &VRM,
const TargetInstrInfo &TII);
protected:
/// Helper function for weight calculations.
/// (Re)compute LI's spill weight and allocation hint, or, for non null
/// start and end - compute future expected spill weight of a split
/// artifact of LI that will span between start and end slot indexes.
/// \param LI The live interval for which to compute the weight.
/// \param Start The expected beginning of the split artifact. Instructions
/// before start will not affect the weight. Relevant for
/// weight calculation of future split artifact.
/// \param End The expected end of the split artifact. Instructions
/// after end will not affect the weight. Relevant for
/// weight calculation of future split artifact.
/// \return The spill weight. Returns negative weight for unspillable LI.
float weightCalcHelper(LiveInterval &LI, SlotIndex *Start = nullptr,
SlotIndex *End = nullptr);
/// Weight normalization function.
virtual float normalize(float UseDefFreq, unsigned Size,
unsigned NumInstr) {
return normalizeSpillWeight(UseDefFreq, Size, NumInstr);
}
};
} // end namespace llvm
#endif // LLVM_CODEGEN_CALCSPILLWEIGHTS_H
PK iwFZ��`�P> P> CodeGen/ValueTypes.tdnu �[��� //===- ValueTypes.td - ValueType definitions ---------------*- tablegen -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Value types - These values correspond to the register types defined in the
// MachineValueTypes.h file. If you update anything here, you must update it
// there as well!
//
//===----------------------------------------------------------------------===//
class ValueType<int size, int value> {
string Namespace = "MVT";
string LLVMName = NAME;
int Size = size;
int Value = value;
int nElem = 1;
ValueType ElementType = ?;
int isOverloaded = false;
int isInteger = false;
int isFP = false;
int isVector = false;
int isScalable = false;
}
class VTAny<int value> : ValueType<0, value> {
let isOverloaded = true;
}
class VTInt<int size, int value>
: ValueType<size, value> {
let isInteger = true;
}
class VTFP<int size, int value>
: ValueType<size, value> {
let isFP = true;
}
class VTVec<int nelem, ValueType elt, int value>
: ValueType<!mul(nelem, elt.Size), value> {
let nElem = nelem;
let ElementType = elt;
let isInteger = elt.isInteger;
let isFP = elt.isFP;
let isVector = true;
}
class VTScalableVec<int nelem, ValueType elt, int value>
: VTVec<nelem, elt, value> {
let isScalable = true;
}
defset list<ValueType> ValueTypes = {
def OtherVT : ValueType<0, 1> { // "Other" value
let LLVMName = "Other";
}
def i1 : VTInt<1, 2>; // One bit boolean value
def i2 : VTInt<2, 3>; // 2-bit integer value
def i4 : VTInt<4, 4>; // 4-bit integer value
def i8 : VTInt<8, 5>; // 8-bit integer value
def i16 : VTInt<16, 6>; // 16-bit integer value
def i32 : VTInt<32, 7>; // 32-bit integer value
def i64 : VTInt<64, 8>; // 64-bit integer value
def i128 : VTInt<128, 9>; // 128-bit integer value
def bf16 : VTFP<16, 10>; // 16-bit brain floating point value
def f16 : VTFP<16, 11>; // 16-bit floating point value
def f32 : VTFP<32, 12>; // 32-bit floating point value
def f64 : VTFP<64, 13>; // 64-bit floating point value
def f80 : VTFP<80, 14>; // 80-bit floating point value
def f128 : VTFP<128, 15>; // 128-bit floating point value
def ppcf128 : VTFP<128, 16>; // PPC 128-bit floating point value
def v1i1 : VTVec<1, i1, 17>; // 1 x i1 vector value
def v2i1 : VTVec<2, i1, 18>; // 2 x i1 vector value
def v4i1 : VTVec<4, i1, 19>; // 4 x i1 vector value
def v8i1 : VTVec<8, i1, 20>; // 8 x i1 vector value
def v16i1 : VTVec<16, i1, 21>; // 16 x i1 vector value
def v32i1 : VTVec<32, i1, 22>; // 32 x i1 vector value
def v64i1 : VTVec<64, i1, 23>; // 64 x i1 vector value
def v128i1 : VTVec<128, i1, 24>; // 128 x i1 vector value
def v256i1 : VTVec<256, i1, 25>; // 256 x i1 vector value
def v512i1 : VTVec<512, i1, 26>; // 512 x i1 vector value
def v1024i1 : VTVec<1024, i1, 27>; // 1024 x i1 vector value
def v2048i1 : VTVec<2048, i1, 28>; // 2048 x i1 vector value
def v128i2 : VTVec<128, i2, 29>; // 128 x i2 vector value
def v256i2 : VTVec<256, i2, 30>; // 256 x i2 vector value
def v64i4 : VTVec<64, i4, 31>; // 64 x i4 vector value
def v128i4 : VTVec<128, i4, 32>; // 128 x i4 vector value
def v1i8 : VTVec<1, i8, 33>; // 1 x i8 vector value
def v2i8 : VTVec<2, i8, 34>; // 2 x i8 vector value
def v4i8 : VTVec<4, i8, 35>; // 4 x i8 vector value
def v8i8 : VTVec<8, i8, 36>; // 8 x i8 vector value
def v16i8 : VTVec<16, i8, 37>; // 16 x i8 vector value
def v32i8 : VTVec<32, i8, 38>; // 32 x i8 vector value
def v64i8 : VTVec<64, i8, 39>; // 64 x i8 vector value
def v128i8 : VTVec<128, i8, 40>; // 128 x i8 vector value
def v256i8 : VTVec<256, i8, 41>; // 256 x i8 vector value
def v512i8 : VTVec<512, i8, 42>; // 512 x i8 vector value
def v1024i8 : VTVec<1024, i8, 43>; // 1024 x i8 vector value
def v1i16 : VTVec<1, i16, 44>; // 1 x i16 vector value
def v2i16 : VTVec<2, i16, 45>; // 2 x i16 vector value
def v3i16 : VTVec<3, i16, 46>; // 3 x i16 vector value
def v4i16 : VTVec<4, i16, 47>; // 4 x i16 vector value
def v8i16 : VTVec<8, i16, 48>; // 8 x i16 vector value
def v16i16 : VTVec<16, i16, 49>; // 16 x i16 vector value
def v32i16 : VTVec<32, i16, 50>; // 32 x i16 vector value
def v64i16 : VTVec<64, i16, 51>; // 64 x i16 vector value
def v128i16 : VTVec<128, i16, 52>; // 128 x i16 vector value
def v256i16 : VTVec<256, i16, 53>; // 256 x i16 vector value
def v512i16 : VTVec<512, i16, 54>; // 512 x i16 vector value
def v1i32 : VTVec<1, i32, 55>; // 1 x i32 vector value
def v2i32 : VTVec<2, i32, 56>; // 2 x i32 vector value
def v3i32 : VTVec<3, i32, 57>; // 3 x i32 vector value
def v4i32 : VTVec<4, i32, 58>; // 4 x i32 vector value
def v5i32 : VTVec<5, i32, 59>; // 5 x i32 vector value
def v6i32 : VTVec<6, i32, 60>; // 6 x f32 vector value
def v7i32 : VTVec<7, i32, 61>; // 7 x f32 vector value
def v8i32 : VTVec<8, i32, 62>; // 8 x i32 vector value
def v9i32 : VTVec<9, i32, 63>; // 9 x i32 vector value
def v10i32 : VTVec<10, i32, 64>; // 10 x i32 vector value
def v11i32 : VTVec<11, i32, 65>; // 11 x i32 vector value
def v12i32 : VTVec<12, i32, 66>; // 12 x i32 vector value
def v16i32 : VTVec<16, i32, 67>; // 16 x i32 vector value
def v32i32 : VTVec<32, i32, 68>; // 32 x i32 vector value
def v64i32 : VTVec<64, i32, 69>; // 64 x i32 vector value
def v128i32 : VTVec<128, i32, 70>; // 128 x i32 vector value
def v256i32 : VTVec<256, i32, 71>; // 256 x i32 vector value
def v512i32 : VTVec<512, i32, 72>; // 512 x i32 vector value
def v1024i32 : VTVec<1024, i32, 73>; // 1024 x i32 vector value
def v2048i32 : VTVec<2048, i32, 74>; // 2048 x i32 vector value
def v1i64 : VTVec<1, i64, 75>; // 1 x i64 vector value
def v2i64 : VTVec<2, i64, 76>; // 2 x i64 vector value
def v3i64 : VTVec<3, i64, 77>; // 3 x i64 vector value
def v4i64 : VTVec<4, i64, 78>; // 4 x i64 vector value
def v8i64 : VTVec<8, i64, 79>; // 8 x i64 vector value
def v16i64 : VTVec<16, i64, 80>; // 16 x i64 vector value
def v32i64 : VTVec<32, i64, 81>; // 32 x i64 vector value
def v64i64 : VTVec<64, i64, 82>; // 64 x i64 vector value
def v128i64 : VTVec<128, i64, 83>; // 128 x i64 vector value
def v256i64 : VTVec<256, i64, 84>; // 256 x i64 vector value
def v1i128 : VTVec<1, i128, 85>; // 1 x i128 vector value
def v1f16 : VTVec<1, f16, 86>; // 1 x f16 vector value
def v2f16 : VTVec<2, f16, 87>; // 2 x f16 vector value
def v3f16 : VTVec<3, f16, 88>; // 3 x f16 vector value
def v4f16 : VTVec<4, f16, 89>; // 4 x f16 vector value
def v8f16 : VTVec<8, f16, 90>; // 8 x f16 vector value
def v16f16 : VTVec<16, f16, 91>; // 16 x f16 vector value
def v32f16 : VTVec<32, f16, 92>; // 32 x f16 vector value
def v64f16 : VTVec<64, f16, 93>; // 64 x f16 vector value
def v128f16 : VTVec<128, f16, 94>; // 128 x f16 vector value
def v256f16 : VTVec<256, f16, 95>; // 256 x f16 vector value
def v512f16 : VTVec<512, f16, 96>; // 512 x f16 vector value
def v2bf16 : VTVec<2, bf16, 97>; // 2 x bf16 vector value
def v3bf16 : VTVec<3, bf16, 98>; // 3 x bf16 vector value
def v4bf16 : VTVec<4, bf16, 99>; // 4 x bf16 vector value
def v8bf16 : VTVec<8, bf16, 100>; // 8 x bf16 vector value
def v16bf16 : VTVec<16, bf16, 101>; // 16 x bf16 vector value
def v32bf16 : VTVec<32, bf16, 102>; // 32 x bf16 vector value
def v64bf16 : VTVec<64, bf16, 103>; // 64 x bf16 vector value
def v128bf16 : VTVec<128, bf16, 104>; // 128 x bf16 vector value
def v1f32 : VTVec<1, f32, 105>; // 1 x f32 vector value
def v2f32 : VTVec<2, f32, 106>; // 2 x f32 vector value
def v3f32 : VTVec<3, f32, 107>; // 3 x f32 vector value
def v4f32 : VTVec<4, f32, 108>; // 4 x f32 vector value
def v5f32 : VTVec<5, f32, 109>; // 5 x f32 vector value
def v6f32 : VTVec<6, f32, 110>; // 6 x f32 vector value
def v7f32 : VTVec<7, f32, 111>; // 7 x f32 vector value
def v8f32 : VTVec<8, f32, 112>; // 8 x f32 vector value
def v9f32 : VTVec<9, f32, 113>; // 9 x f32 vector value
def v10f32 : VTVec<10, f32, 114>; // 10 x f32 vector value
def v11f32 : VTVec<11, f32, 115>; // 11 x f32 vector value
def v12f32 : VTVec<12, f32, 116>; // 12 x f32 vector value
def v16f32 : VTVec<16, f32, 117>; // 16 x f32 vector value
def v32f32 : VTVec<32, f32, 118>; // 32 x f32 vector value
def v64f32 : VTVec<64, f32, 119>; // 64 x f32 vector value
def v128f32 : VTVec<128, f32, 120>; // 128 x f32 vector value
def v256f32 : VTVec<256, f32, 121>; // 256 x f32 vector value
def v512f32 : VTVec<512, f32, 122>; // 512 x f32 vector value
def v1024f32 : VTVec<1024, f32, 123>; // 1024 x f32 vector value
def v2048f32 : VTVec<2048, f32, 124>; // 2048 x f32 vector value
def v1f64 : VTVec<1, f64, 125>; // 1 x f64 vector value
def v2f64 : VTVec<2, f64, 126>; // 2 x f64 vector value
def v3f64 : VTVec<3, f64, 127>; // 3 x f64 vector value
def v4f64 : VTVec<4, f64, 128>; // 4 x f64 vector value
def v8f64 : VTVec<8, f64, 129>; // 8 x f64 vector value
def v16f64 : VTVec<16, f64, 130>; // 16 x f64 vector value
def v32f64 : VTVec<32, f64, 131>; // 32 x f64 vector value
def v64f64 : VTVec<64, f64, 132>; // 64 x f64 vector value
def v128f64 : VTVec<128, f64, 133>; // 128 x f64 vector value
def v256f64 : VTVec<256, f64, 134>; // 256 x f64 vector value
def nxv1i1 : VTScalableVec<1, i1, 135>; // n x 1 x i1 vector value
def nxv2i1 : VTScalableVec<2, i1, 136>; // n x 2 x i1 vector value
def nxv4i1 : VTScalableVec<4, i1, 137>; // n x 4 x i1 vector value
def nxv8i1 : VTScalableVec<8, i1, 138>; // n x 8 x i1 vector value
def nxv16i1 : VTScalableVec<16, i1, 139>; // n x 16 x i1 vector value
def nxv32i1 : VTScalableVec<32, i1, 140>; // n x 32 x i1 vector value
def nxv64i1 : VTScalableVec<64, i1, 141>; // n x 64 x i1 vector value
def nxv1i8 : VTScalableVec<1, i8, 142>; // n x 1 x i8 vector value
def nxv2i8 : VTScalableVec<2, i8, 143>; // n x 2 x i8 vector value
def nxv4i8 : VTScalableVec<4, i8, 144>; // n x 4 x i8 vector value
def nxv8i8 : VTScalableVec<8, i8, 145>; // n x 8 x i8 vector value
def nxv16i8 : VTScalableVec<16, i8, 146>; // n x 16 x i8 vector value
def nxv32i8 : VTScalableVec<32, i8, 147>; // n x 32 x i8 vector value
def nxv64i8 : VTScalableVec<64, i8, 148>; // n x 64 x i8 vector value
def nxv1i16 : VTScalableVec<1, i16, 149>; // n x 1 x i16 vector value
def nxv2i16 : VTScalableVec<2, i16, 150>; // n x 2 x i16 vector value
def nxv4i16 : VTScalableVec<4, i16, 151>; // n x 4 x i16 vector value
def nxv8i16 : VTScalableVec<8, i16, 152>; // n x 8 x i16 vector value
def nxv16i16 : VTScalableVec<16, i16, 153>; // n x 16 x i16 vector value
def nxv32i16 : VTScalableVec<32, i16, 154>; // n x 32 x i16 vector value
def nxv1i32 : VTScalableVec<1, i32, 155>; // n x 1 x i32 vector value
def nxv2i32 : VTScalableVec<2, i32, 156>; // n x 2 x i32 vector value
def nxv4i32 : VTScalableVec<4, i32, 157>; // n x 4 x i32 vector value
def nxv8i32 : VTScalableVec<8, i32, 158>; // n x 8 x i32 vector value
def nxv16i32 : VTScalableVec<16, i32, 159>; // n x 16 x i32 vector value
def nxv32i32 : VTScalableVec<32, i32, 160>; // n x 32 x i32 vector value
def nxv1i64 : VTScalableVec<1, i64, 161>; // n x 1 x i64 vector value
def nxv2i64 : VTScalableVec<2, i64, 162>; // n x 2 x i64 vector value
def nxv4i64 : VTScalableVec<4, i64, 163>; // n x 4 x i64 vector value
def nxv8i64 : VTScalableVec<8, i64, 164>; // n x 8 x i64 vector value
def nxv16i64 : VTScalableVec<16, i64, 165>; // n x 16 x i64 vector value
def nxv32i64 : VTScalableVec<32, i64, 166>; // n x 32 x i64 vector value
def nxv1f16 : VTScalableVec<1, f16, 167>; // n x 1 x f16 vector value
def nxv2f16 : VTScalableVec<2, f16, 168>; // n x 2 x f16 vector value
def nxv4f16 : VTScalableVec<4, f16, 169>; // n x 4 x f16 vector value
def nxv8f16 : VTScalableVec<8, f16, 170>; // n x 8 x f16 vector value
def nxv16f16 : VTScalableVec<16, f16, 171>; // n x 16 x f16 vector value
def nxv32f16 : VTScalableVec<32, f16, 172>; // n x 32 x f16 vector value
def nxv1bf16 : VTScalableVec<1, bf16, 173>; // n x 1 x bf16 vector value
def nxv2bf16 : VTScalableVec<2, bf16, 174>; // n x 2 x bf16 vector value
def nxv4bf16 : VTScalableVec<4, bf16, 175>; // n x 4 x bf16 vector value
def nxv8bf16 : VTScalableVec<8, bf16, 176>; // n x 8 x bf16 vector value
def nxv16bf16 : VTScalableVec<16, bf16, 177>; // n x 16 x bf16 vector value
def nxv32bf16 : VTScalableVec<32, bf16, 178>; // n x 32 x bf16 vector value
def nxv1f32 : VTScalableVec<1, f32, 179>; // n x 1 x f32 vector value
def nxv2f32 : VTScalableVec<2, f32, 180>; // n x 2 x f32 vector value
def nxv4f32 : VTScalableVec<4, f32, 181>; // n x 4 x f32 vector value
def nxv8f32 : VTScalableVec<8, f32, 182>; // n x 8 x f32 vector value
def nxv16f32 : VTScalableVec<16, f32, 183>; // n x 16 x f32 vector value
def nxv1f64 : VTScalableVec<1, f64, 184>; // n x 1 x f64 vector value
def nxv2f64 : VTScalableVec<2, f64, 185>; // n x 2 x f64 vector value
def nxv4f64 : VTScalableVec<4, f64, 186>; // n x 4 x f64 vector value
def nxv8f64 : VTScalableVec<8, f64, 187>; // n x 8 x f64 vector value
def x86mmx : ValueType<64, 188>; // X86 MMX value
def FlagVT : ValueType<0, 189> { // Pre-RA sched glue
let LLVMName = "Glue";
}
def isVoid : ValueType<0, 190>; // Produces no value
def untyped : ValueType<8, 191> { // Produces an untyped value
let LLVMName = "Untyped";
}
def funcref : ValueType<0, 192>; // WebAssembly's funcref type
def externref : ValueType<0, 193>; // WebAssembly's externref type
def x86amx : ValueType<8192, 194>; // X86 AMX value
def i64x8 : ValueType<512, 195>; // 8 Consecutive GPRs (AArch64)
def aarch64svcount
: ValueType<16, 196>; // AArch64 predicate-as-counter
def spirvbuiltin : ValueType<0, 197>; // SPIR-V's builtin type
def token : ValueType<0, 248>; // TokenTy
def MetadataVT : ValueType<0, 249> { // Metadata
let LLVMName = "Metadata";
}
// Pseudo valuetype mapped to the current pointer size to any address space.
// Should only be used in TableGen.
def iPTRAny : VTAny<250>;
// Pseudo valuetype to represent "vector of any size"
def vAny : VTAny<251>;
// Pseudo valuetype to represent "float of any format"
def fAny : VTAny<252>;
// Pseudo valuetype to represent "integer of any bit width"
def iAny : VTAny<253>;
// Pseudo valuetype mapped to the current pointer size.
def iPTR : ValueType<0, 254>;
// Pseudo valuetype to represent "any type of any size".
def Any : VTAny<255>;
} // end defset ValueTypes
/// This class is for targets that want to use pointer types in patterns
/// with the GlobalISelEmitter. Targets must define their own pointer
/// derived from this class. The scalar argument should be an
/// integer type with the same bit size as the pointer.
/// e.g. def p0 : PtrValueType <i64, 0>;
class PtrValueType <ValueType scalar, int addrspace> :
ValueType<scalar.Size, scalar.Value> {
int AddrSpace = addrspace;
}
PK iwFZg n�I& I& CodeGen/MachinePassManager.hnu �[��� //===- PassManager.h --- Pass management for CodeGen ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This header defines the pass manager interface for codegen. The codegen
// pipeline consists of only machine function passes. There is no container
// relationship between IR module/function and machine function in terms of pass
// manager organization. So there is no need for adaptor classes (for example
// ModuleToMachineFunctionAdaptor). Since invalidation could only happen among
// machine function passes, there is no proxy classes to handle cross-IR-unit
// invalidation. IR analysis results are provided for machine function passes by
// their respective analysis managers such as ModuleAnalysisManager and
// FunctionAnalysisManager.
//
// TODO: Add MachineFunctionProperties support.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEPASSMANAGER_H
#define LLVM_CODEGEN_MACHINEPASSMANAGER_H
#include "llvm/ADT/FunctionExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Support/Error.h"
#include <map>
namespace llvm {
class Module;
class Function;
class MachineFunction;
extern template class AnalysisManager<MachineFunction>;
/// An AnalysisManager<MachineFunction> that also exposes IR analysis results.
class MachineFunctionAnalysisManager : public AnalysisManager<MachineFunction> {
public:
using Base = AnalysisManager<MachineFunction>;
MachineFunctionAnalysisManager() : FAM(nullptr), MAM(nullptr) {}
MachineFunctionAnalysisManager(FunctionAnalysisManager &FAM,
ModuleAnalysisManager &MAM)
: FAM(&FAM), MAM(&MAM) {}
MachineFunctionAnalysisManager(MachineFunctionAnalysisManager &&) = default;
MachineFunctionAnalysisManager &
operator=(MachineFunctionAnalysisManager &&) = default;
/// Get the result of an analysis pass for a Function.
///
/// Runs the analysis if a cached result is not available.
template <typename PassT> typename PassT::Result &getResult(Function &F) {
return FAM->getResult<PassT>(F);
}
/// Get the cached result of an analysis pass for a Function.
///
/// This method never runs the analysis.
///
/// \returns null if there is no cached result.
template <typename PassT>
typename PassT::Result *getCachedResult(Function &F) {
return FAM->getCachedResult<PassT>(F);
}
/// Get the result of an analysis pass for a Module.
///
/// Runs the analysis if a cached result is not available.
template <typename PassT> typename PassT::Result &getResult(Module &M) {
return MAM->getResult<PassT>(M);
}
/// Get the cached result of an analysis pass for a Module.
///
/// This method never runs the analysis.
///
/// \returns null if there is no cached result.
template <typename PassT> typename PassT::Result *getCachedResult(Module &M) {
return MAM->getCachedResult<PassT>(M);
}
/// Get the result of an analysis pass for a MachineFunction.
///
/// Runs the analysis if a cached result is not available.
using Base::getResult;
/// Get the cached result of an analysis pass for a MachineFunction.
///
/// This method never runs the analysis.
///
/// returns null if there is no cached result.
using Base::getCachedResult;
// FIXME: Add LoopAnalysisManager or CGSCCAnalysisManager if needed.
FunctionAnalysisManager *FAM;
ModuleAnalysisManager *MAM;
};
extern template class PassManager<MachineFunction>;
/// MachineFunctionPassManager adds/removes below features to/from the base
/// PassManager template instantiation.
///
/// - Support passes that implement doInitialization/doFinalization. This is for
/// machine function passes to work on module level constructs. One such pass
/// is AsmPrinter.
///
/// - Support machine module pass which runs over the module (for example,
/// MachineOutliner). A machine module pass needs to define the method:
///
/// ```Error run(Module &, MachineFunctionAnalysisManager &)```
///
/// FIXME: machine module passes still need to define the usual machine
/// function pass interface, namely,
/// `PreservedAnalyses run(MachineFunction &,
/// MachineFunctionAnalysisManager &)`
/// But this interface wouldn't be executed. It is just a placeholder
/// to satisfy the pass manager type-erased inteface. This
/// special-casing of machine module pass is due to its limited use
/// cases and the unnecessary complexity it may bring to the machine
/// pass manager.
///
/// - The base class `run` method is replaced by an alternative `run` method.
/// See details below.
///
/// - Support codegening in the SCC order. Users include interprocedural
/// register allocation (IPRA).
class MachineFunctionPassManager
: public PassManager<MachineFunction, MachineFunctionAnalysisManager> {
using Base = PassManager<MachineFunction, MachineFunctionAnalysisManager>;
public:
MachineFunctionPassManager(bool RequireCodeGenSCCOrder = false,
bool VerifyMachineFunction = false)
: RequireCodeGenSCCOrder(RequireCodeGenSCCOrder),
VerifyMachineFunction(VerifyMachineFunction) {}
MachineFunctionPassManager(MachineFunctionPassManager &&) = default;
MachineFunctionPassManager &
operator=(MachineFunctionPassManager &&) = default;
/// Run machine passes for a Module.
///
/// The intended use is to start the codegen pipeline for a Module. The base
/// class's `run` method is deliberately hidden by this due to the observation
/// that we don't yet have the use cases of compositing two instances of
/// machine pass managers, or compositing machine pass managers with other
/// types of pass managers.
Error run(Module &M, MachineFunctionAnalysisManager &MFAM);
template <typename PassT> void addPass(PassT &&Pass) {
Base::addPass(std::forward<PassT>(Pass));
PassConceptT *P = Passes.back().get();
addDoInitialization<PassT>(P);
addDoFinalization<PassT>(P);
// Add machine module pass.
addRunOnModule<PassT>(P);
}
private:
template <typename PassT>
using has_init_t = decltype(std::declval<PassT &>().doInitialization(
std::declval<Module &>(),
std::declval<MachineFunctionAnalysisManager &>()));
template <typename PassT>
std::enable_if_t<!is_detected<has_init_t, PassT>::value>
addDoInitialization(PassConceptT *Pass) {}
template <typename PassT>
std::enable_if_t<is_detected<has_init_t, PassT>::value>
addDoInitialization(PassConceptT *Pass) {
using PassModelT =
detail::PassModel<MachineFunction, PassT, PreservedAnalyses,
MachineFunctionAnalysisManager>;
auto *P = static_cast<PassModelT *>(Pass);
InitializationFuncs.emplace_back(
[=](Module &M, MachineFunctionAnalysisManager &MFAM) {
return P->Pass.doInitialization(M, MFAM);
});
}
template <typename PassT>
using has_fini_t = decltype(std::declval<PassT &>().doFinalization(
std::declval<Module &>(),
std::declval<MachineFunctionAnalysisManager &>()));
template <typename PassT>
std::enable_if_t<!is_detected<has_fini_t, PassT>::value>
addDoFinalization(PassConceptT *Pass) {}
template <typename PassT>
std::enable_if_t<is_detected<has_fini_t, PassT>::value>
addDoFinalization(PassConceptT *Pass) {
using PassModelT =
detail::PassModel<MachineFunction, PassT, PreservedAnalyses,
MachineFunctionAnalysisManager>;
auto *P = static_cast<PassModelT *>(Pass);
FinalizationFuncs.emplace_back(
[=](Module &M, MachineFunctionAnalysisManager &MFAM) {
return P->Pass.doFinalization(M, MFAM);
});
}
template <typename PassT>
using is_machine_module_pass_t = decltype(std::declval<PassT &>().run(
std::declval<Module &>(),
std::declval<MachineFunctionAnalysisManager &>()));
template <typename PassT>
using is_machine_function_pass_t = decltype(std::declval<PassT &>().run(
std::declval<MachineFunction &>(),
std::declval<MachineFunctionAnalysisManager &>()));
template <typename PassT>
std::enable_if_t<!is_detected<is_machine_module_pass_t, PassT>::value>
addRunOnModule(PassConceptT *Pass) {}
template <typename PassT>
std::enable_if_t<is_detected<is_machine_module_pass_t, PassT>::value>
addRunOnModule(PassConceptT *Pass) {
static_assert(is_detected<is_machine_function_pass_t, PassT>::value,
"machine module pass needs to define machine function pass "
"api. sorry.");
using PassModelT =
detail::PassModel<MachineFunction, PassT, PreservedAnalyses,
MachineFunctionAnalysisManager>;
auto *P = static_cast<PassModelT *>(Pass);
MachineModulePasses.emplace(
Passes.size() - 1,
[=](Module &M, MachineFunctionAnalysisManager &MFAM) {
return P->Pass.run(M, MFAM);
});
}
using FuncTy = Error(Module &, MachineFunctionAnalysisManager &);
SmallVector<llvm::unique_function<FuncTy>, 4> InitializationFuncs;
SmallVector<llvm::unique_function<FuncTy>, 4> FinalizationFuncs;
using PassIndex = decltype(Passes)::size_type;
std::map<PassIndex, llvm::unique_function<FuncTy>> MachineModulePasses;
// Run codegen in the SCC order.
bool RequireCodeGenSCCOrder;
bool VerifyMachineFunction;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINEPASSMANAGER_H
PK iwFZ۹�u�E �E CodeGen/MachineTraceMetrics.hnu �[��� //===- lib/CodeGen/MachineTraceMetrics.h - Super-scalar metrics -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the interface for the MachineTraceMetrics analysis pass
// that estimates CPU resource usage and critical data dependency paths through
// preferred traces. This is useful for super-scalar CPUs where execution speed
// can be limited both by data dependencies and by limited execution resources.
//
// Out-of-order CPUs will often be executing instructions from multiple basic
// blocks at the same time. This makes it difficult to estimate the resource
// usage accurately in a single basic block. Resources can be estimated better
// by looking at a trace through the current basic block.
//
// For every block, the MachineTraceMetrics pass will pick a preferred trace
// that passes through the block. The trace is chosen based on loop structure,
// branch probabilities, and resource usage. The intention is to pick likely
// traces that would be the most affected by code transformations.
//
// It is expensive to compute a full arbitrary trace for every block, so to
// save some computations, traces are chosen to be convergent. This means that
// if the traces through basic blocks A and B ever cross when moving away from
// A and B, they never diverge again. This applies in both directions - If the
// traces meet above A and B, they won't diverge when going further back.
//
// Traces tend to align with loops. The trace through a block in an inner loop
// will begin at the loop entry block and end at a back edge. If there are
// nested loops, the trace may begin and end at those instead.
//
// For each trace, we compute the critical path length, which is the number of
// cycles required to execute the trace when execution is limited by data
// dependencies only. We also compute the resource height, which is the number
// of cycles required to execute all instructions in the trace when ignoring
// data dependencies.
//
// Every instruction in the current block has a slack - the number of cycles
// execution of the instruction can be delayed without extending the critical
// path.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINETRACEMETRICS_H
#define LLVM_CODEGEN_MACHINETRACEMETRICS_H
#include "llvm/ADT/SparseSet.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/TargetSchedule.h"
namespace llvm {
class AnalysisUsage;
class MachineFunction;
class MachineInstr;
class MachineLoop;
class MachineLoopInfo;
class MachineRegisterInfo;
struct MCSchedClassDesc;
class raw_ostream;
class TargetInstrInfo;
class TargetRegisterInfo;
// Keep track of physreg data dependencies by recording each live register unit.
// Associate each regunit with an instruction operand. Depending on the
// direction instructions are scanned, it could be the operand that defined the
// regunit, or the highest operand to read the regunit.
struct LiveRegUnit {
unsigned RegUnit;
unsigned Cycle = 0;
const MachineInstr *MI = nullptr;
unsigned Op = 0;
unsigned getSparseSetIndex() const { return RegUnit; }
LiveRegUnit(unsigned RU) : RegUnit(RU) {}
};
/// Strategies for selecting traces.
enum class MachineTraceStrategy {
/// Select the trace through a block that has the fewest instructions.
TS_MinInstrCount,
/// Select the trace that contains only the current basic block. For instance,
/// this strategy can be used by MachineCombiner to make better decisions when
/// we estimate critical path for in-order cores.
TS_Local,
TS_NumStrategies
};
class MachineTraceMetrics : public MachineFunctionPass {
const MachineFunction *MF = nullptr;
const TargetInstrInfo *TII = nullptr;
const TargetRegisterInfo *TRI = nullptr;
const MachineRegisterInfo *MRI = nullptr;
const MachineLoopInfo *Loops = nullptr;
TargetSchedModel SchedModel;
public:
friend class Ensemble;
friend class Trace;
class Ensemble;
static char ID;
MachineTraceMetrics();
void getAnalysisUsage(AnalysisUsage&) const override;
bool runOnMachineFunction(MachineFunction&) override;
void releaseMemory() override;
void verifyAnalysis() const override;
/// Per-basic block information that doesn't depend on the trace through the
/// block.
struct FixedBlockInfo {
/// The number of non-trivial instructions in the block.
/// Doesn't count PHI and COPY instructions that are likely to be removed.
unsigned InstrCount = ~0u;
/// True when the block contains calls.
bool HasCalls = false;
FixedBlockInfo() = default;
/// Returns true when resource information for this block has been computed.
bool hasResources() const { return InstrCount != ~0u; }
/// Invalidate resource information.
void invalidate() { InstrCount = ~0u; }
};
/// Get the fixed resource information about MBB. Compute it on demand.
const FixedBlockInfo *getResources(const MachineBasicBlock*);
/// Get the scaled number of cycles used per processor resource in MBB.
/// This is an array with SchedModel.getNumProcResourceKinds() entries.
/// The getResources() function above must have been called first.
///
/// These numbers have already been scaled by SchedModel.getResourceFactor().
ArrayRef<unsigned> getProcResourceCycles(unsigned MBBNum) const;
/// A virtual register or regunit required by a basic block or its trace
/// successors.
struct LiveInReg {
/// The virtual register required, or a register unit.
Register Reg;
/// For virtual registers: Minimum height of the defining instruction.
/// For regunits: Height of the highest user in the trace.
unsigned Height;
LiveInReg(Register Reg, unsigned Height = 0) : Reg(Reg), Height(Height) {}
};
/// Per-basic block information that relates to a specific trace through the
/// block. Convergent traces means that only one of these is required per
/// block in a trace ensemble.
struct TraceBlockInfo {
/// Trace predecessor, or NULL for the first block in the trace.
/// Valid when hasValidDepth().
const MachineBasicBlock *Pred = nullptr;
/// Trace successor, or NULL for the last block in the trace.
/// Valid when hasValidHeight().
const MachineBasicBlock *Succ = nullptr;
/// The block number of the head of the trace. (When hasValidDepth()).
unsigned Head;
/// The block number of the tail of the trace. (When hasValidHeight()).
unsigned Tail;
/// Accumulated number of instructions in the trace above this block.
/// Does not include instructions in this block.
unsigned InstrDepth = ~0u;
/// Accumulated number of instructions in the trace below this block.
/// Includes instructions in this block.
unsigned InstrHeight = ~0u;
TraceBlockInfo() = default;
/// Returns true if the depth resources have been computed from the trace
/// above this block.
bool hasValidDepth() const { return InstrDepth != ~0u; }
/// Returns true if the height resources have been computed from the trace
/// below this block.
bool hasValidHeight() const { return InstrHeight != ~0u; }
/// Invalidate depth resources when some block above this one has changed.
void invalidateDepth() { InstrDepth = ~0u; HasValidInstrDepths = false; }
/// Invalidate height resources when a block below this one has changed.
void invalidateHeight() { InstrHeight = ~0u; HasValidInstrHeights = false; }
/// Assuming that this is a dominator of TBI, determine if it contains
/// useful instruction depths. A dominating block can be above the current
/// trace head, and any dependencies from such a far away dominator are not
/// expected to affect the critical path.
///
/// Also returns true when TBI == this.
bool isUsefulDominator(const TraceBlockInfo &TBI) const {
// The trace for TBI may not even be calculated yet.
if (!hasValidDepth() || !TBI.hasValidDepth())
return false;
// Instruction depths are only comparable if the traces share a head.
if (Head != TBI.Head)
return false;
// It is almost always the case that TBI belongs to the same trace as
// this block, but rare convoluted cases involving irreducible control
// flow, a dominator may share a trace head without actually being on the
// same trace as TBI. This is not a big problem as long as it doesn't
// increase the instruction depth.
return HasValidInstrDepths && InstrDepth <= TBI.InstrDepth;
}
// Data-dependency-related information. Per-instruction depth and height
// are computed from data dependencies in the current trace, using
// itinerary data.
/// Instruction depths have been computed. This implies hasValidDepth().
bool HasValidInstrDepths = false;
/// Instruction heights have been computed. This implies hasValidHeight().
bool HasValidInstrHeights = false;
/// Critical path length. This is the number of cycles in the longest data
/// dependency chain through the trace. This is only valid when both
/// HasValidInstrDepths and HasValidInstrHeights are set.
unsigned CriticalPath;
/// Live-in registers. These registers are defined above the current block
/// and used by this block or a block below it.
/// This does not include PHI uses in the current block, but it does
/// include PHI uses in deeper blocks.
SmallVector<LiveInReg, 4> LiveIns;
void print(raw_ostream&) const;
};
/// InstrCycles represents the cycle height and depth of an instruction in a
/// trace.
struct InstrCycles {
/// Earliest issue cycle as determined by data dependencies and instruction
/// latencies from the beginning of the trace. Data dependencies from
/// before the trace are not included.
unsigned Depth;
/// Minimum number of cycles from this instruction is issued to the of the
/// trace, as determined by data dependencies and instruction latencies.
unsigned Height;
};
/// A trace represents a plausible sequence of executed basic blocks that
/// passes through the current basic block one. The Trace class serves as a
/// handle to internal cached data structures.
class Trace {
Ensemble &TE;
TraceBlockInfo &TBI;
unsigned getBlockNum() const { return &TBI - &TE.BlockInfo[0]; }
public:
explicit Trace(Ensemble &te, TraceBlockInfo &tbi) : TE(te), TBI(tbi) {}
void print(raw_ostream&) const;
/// Compute the total number of instructions in the trace.
unsigned getInstrCount() const {
return TBI.InstrDepth + TBI.InstrHeight;
}
/// Return the resource depth of the top/bottom of the trace center block.
/// This is the number of cycles required to execute all instructions from
/// the trace head to the trace center block. The resource depth only
/// considers execution resources, it ignores data dependencies.
/// When Bottom is set, instructions in the trace center block are included.
unsigned getResourceDepth(bool Bottom) const;
/// Return the resource length of the trace. This is the number of cycles
/// required to execute the instructions in the trace if they were all
/// independent, exposing the maximum instruction-level parallelism.
///
/// Any blocks in Extrablocks are included as if they were part of the
/// trace. Likewise, extra resources required by the specified scheduling
/// classes are included. For the caller to account for extra machine
/// instructions, it must first resolve each instruction's scheduling class.
unsigned getResourceLength(
ArrayRef<const MachineBasicBlock *> Extrablocks = std::nullopt,
ArrayRef<const MCSchedClassDesc *> ExtraInstrs = std::nullopt,
ArrayRef<const MCSchedClassDesc *> RemoveInstrs = std::nullopt) const;
/// Return the length of the (data dependency) critical path through the
/// trace.
unsigned getCriticalPath() const { return TBI.CriticalPath; }
/// Return the depth and height of MI. The depth is only valid for
/// instructions in or above the trace center block. The height is only
/// valid for instructions in or below the trace center block.
InstrCycles getInstrCycles(const MachineInstr &MI) const {
return TE.Cycles.lookup(&MI);
}
/// Return the slack of MI. This is the number of cycles MI can be delayed
/// before the critical path becomes longer.
/// MI must be an instruction in the trace center block.
unsigned getInstrSlack(const MachineInstr &MI) const;
/// Return the Depth of a PHI instruction in a trace center block successor.
/// The PHI does not have to be part of the trace.
unsigned getPHIDepth(const MachineInstr &PHI) const;
/// A dependence is useful if the basic block of the defining instruction
/// is part of the trace of the user instruction. It is assumed that DefMI
/// dominates UseMI (see also isUsefulDominator).
bool isDepInTrace(const MachineInstr &DefMI,
const MachineInstr &UseMI) const;
};
/// A trace ensemble is a collection of traces selected using the same
/// strategy, for example 'minimum resource height'. There is one trace for
/// every block in the function.
class Ensemble {
friend class Trace;
SmallVector<TraceBlockInfo, 4> BlockInfo;
DenseMap<const MachineInstr*, InstrCycles> Cycles;
SmallVector<unsigned, 0> ProcResourceDepths;
SmallVector<unsigned, 0> ProcResourceHeights;
void computeTrace(const MachineBasicBlock*);
void computeDepthResources(const MachineBasicBlock*);
void computeHeightResources(const MachineBasicBlock*);
unsigned computeCrossBlockCriticalPath(const TraceBlockInfo&);
void computeInstrDepths(const MachineBasicBlock*);
void computeInstrHeights(const MachineBasicBlock*);
void addLiveIns(const MachineInstr *DefMI, unsigned DefOp,
ArrayRef<const MachineBasicBlock*> Trace);
protected:
MachineTraceMetrics &MTM;
explicit Ensemble(MachineTraceMetrics*);
virtual const MachineBasicBlock *pickTracePred(const MachineBasicBlock*) =0;
virtual const MachineBasicBlock *pickTraceSucc(const MachineBasicBlock*) =0;
const MachineLoop *getLoopFor(const MachineBasicBlock*) const;
const TraceBlockInfo *getDepthResources(const MachineBasicBlock*) const;
const TraceBlockInfo *getHeightResources(const MachineBasicBlock*) const;
ArrayRef<unsigned> getProcResourceDepths(unsigned MBBNum) const;
ArrayRef<unsigned> getProcResourceHeights(unsigned MBBNum) const;
public:
virtual ~Ensemble();
virtual const char *getName() const = 0;
void print(raw_ostream&) const;
void invalidate(const MachineBasicBlock *MBB);
void verify() const;
/// Get the trace that passes through MBB.
/// The trace is computed on demand.
Trace getTrace(const MachineBasicBlock *MBB);
/// Updates the depth of an machine instruction, given RegUnits.
void updateDepth(TraceBlockInfo &TBI, const MachineInstr&,
SparseSet<LiveRegUnit> &RegUnits);
void updateDepth(const MachineBasicBlock *, const MachineInstr&,
SparseSet<LiveRegUnit> &RegUnits);
/// Updates the depth of the instructions from Start to End.
void updateDepths(MachineBasicBlock::iterator Start,
MachineBasicBlock::iterator End,
SparseSet<LiveRegUnit> &RegUnits);
};
/// Get the trace ensemble representing the given trace selection strategy.
/// The returned Ensemble object is owned by the MachineTraceMetrics analysis,
/// and valid for the lifetime of the analysis pass.
Ensemble *getEnsemble(MachineTraceStrategy);
/// Invalidate cached information about MBB. This must be called *before* MBB
/// is erased, or the CFG is otherwise changed.
///
/// This invalidates per-block information about resource usage for MBB only,
/// and it invalidates per-trace information for any trace that passes
/// through MBB.
///
/// Call Ensemble::getTrace() again to update any trace handles.
void invalidate(const MachineBasicBlock *MBB);
private:
// One entry per basic block, indexed by block number.
SmallVector<FixedBlockInfo, 4> BlockInfo;
// Cycles consumed on each processor resource per block.
// The number of processor resource kinds is constant for a given subtarget,
// but it is not known at compile time. The number of cycles consumed by
// block B on processor resource R is at ProcResourceCycles[B*Kinds + R]
// where Kinds = SchedModel.getNumProcResourceKinds().
SmallVector<unsigned, 0> ProcResourceCycles;
// One ensemble per strategy.
Ensemble
*Ensembles[static_cast<size_t>(MachineTraceStrategy::TS_NumStrategies)];
// Convert scaled resource usage to a cycle count that can be compared with
// latencies.
unsigned getCycles(unsigned Scaled) {
unsigned Factor = SchedModel.getLatencyFactor();
return (Scaled + Factor - 1) / Factor;
}
};
inline raw_ostream &operator<<(raw_ostream &OS,
const MachineTraceMetrics::Trace &Tr) {
Tr.print(OS);
return OS;
}
inline raw_ostream &operator<<(raw_ostream &OS,
const MachineTraceMetrics::Ensemble &En) {
En.print(OS);
return OS;
}
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINETRACEMETRICS_H
PK iwFZ@�s@�b �b # CodeGen/GlobalISel/MIPatternMatch.hnu �[��� //==------ llvm/CodeGen/GlobalISel/MIPatternMatch.h -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// Contains matchers for matching SSA Machine Instructions.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_MIPATTERNMATCH_H
#define LLVM_CODEGEN_GLOBALISEL_MIPATTERNMATCH_H
#include "llvm/ADT/APInt.h"
#include "llvm/CodeGen/GlobalISel/Utils.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/IR/InstrTypes.h"
namespace llvm {
namespace MIPatternMatch {
template <typename Reg, typename Pattern>
[[nodiscard]] bool mi_match(Reg R, const MachineRegisterInfo &MRI,
Pattern &&P) {
return P.match(MRI, R);
}
template <typename Pattern>
[[nodiscard]] bool mi_match(MachineInstr &MI, const MachineRegisterInfo &MRI,
Pattern &&P) {
return P.match(MRI, &MI);
}
// TODO: Extend for N use.
template <typename SubPatternT> struct OneUse_match {
SubPatternT SubPat;
OneUse_match(const SubPatternT &SP) : SubPat(SP) {}
bool match(const MachineRegisterInfo &MRI, Register Reg) {
return MRI.hasOneUse(Reg) && SubPat.match(MRI, Reg);
}
};
template <typename SubPat>
inline OneUse_match<SubPat> m_OneUse(const SubPat &SP) {
return SP;
}
template <typename SubPatternT> struct OneNonDBGUse_match {
SubPatternT SubPat;
OneNonDBGUse_match(const SubPatternT &SP) : SubPat(SP) {}
bool match(const MachineRegisterInfo &MRI, Register Reg) {
return MRI.hasOneNonDBGUse(Reg) && SubPat.match(MRI, Reg);
}
};
template <typename SubPat>
inline OneNonDBGUse_match<SubPat> m_OneNonDBGUse(const SubPat &SP) {
return SP;
}
template <typename ConstT>
inline std::optional<ConstT> matchConstant(Register,
const MachineRegisterInfo &);
template <>
inline std::optional<APInt> matchConstant(Register Reg,
const MachineRegisterInfo &MRI) {
return getIConstantVRegVal(Reg, MRI);
}
template <>
inline std::optional<int64_t> matchConstant(Register Reg,
const MachineRegisterInfo &MRI) {
return getIConstantVRegSExtVal(Reg, MRI);
}
template <typename ConstT> struct ConstantMatch {
ConstT &CR;
ConstantMatch(ConstT &C) : CR(C) {}
bool match(const MachineRegisterInfo &MRI, Register Reg) {
if (auto MaybeCst = matchConstant<ConstT>(Reg, MRI)) {
CR = *MaybeCst;
return true;
}
return false;
}
};
inline ConstantMatch<APInt> m_ICst(APInt &Cst) {
return ConstantMatch<APInt>(Cst);
}
inline ConstantMatch<int64_t> m_ICst(int64_t &Cst) {
return ConstantMatch<int64_t>(Cst);
}
template <typename ConstT>
inline std::optional<ConstT> matchConstantSplat(Register,
const MachineRegisterInfo &);
template <>
inline std::optional<APInt> matchConstantSplat(Register Reg,
const MachineRegisterInfo &MRI) {
return getIConstantSplatVal(Reg, MRI);
}
template <>
inline std::optional<int64_t>
matchConstantSplat(Register Reg, const MachineRegisterInfo &MRI) {
return getIConstantSplatSExtVal(Reg, MRI);
}
template <typename ConstT> struct ICstOrSplatMatch {
ConstT &CR;
ICstOrSplatMatch(ConstT &C) : CR(C) {}
bool match(const MachineRegisterInfo &MRI, Register Reg) {
if (auto MaybeCst = matchConstant<ConstT>(Reg, MRI)) {
CR = *MaybeCst;
return true;
}
if (auto MaybeCstSplat = matchConstantSplat<ConstT>(Reg, MRI)) {
CR = *MaybeCstSplat;
return true;
}
return false;
};
};
inline ICstOrSplatMatch<APInt> m_ICstOrSplat(APInt &Cst) {
return ICstOrSplatMatch<APInt>(Cst);
}
inline ICstOrSplatMatch<int64_t> m_ICstOrSplat(int64_t &Cst) {
return ICstOrSplatMatch<int64_t>(Cst);
}
struct GCstAndRegMatch {
std::optional<ValueAndVReg> &ValReg;
GCstAndRegMatch(std::optional<ValueAndVReg> &ValReg) : ValReg(ValReg) {}
bool match(const MachineRegisterInfo &MRI, Register Reg) {
ValReg = getIConstantVRegValWithLookThrough(Reg, MRI);
return ValReg ? true : false;
}
};
inline GCstAndRegMatch m_GCst(std::optional<ValueAndVReg> &ValReg) {
return GCstAndRegMatch(ValReg);
}
struct GFCstAndRegMatch {
std::optional<FPValueAndVReg> &FPValReg;
GFCstAndRegMatch(std::optional<FPValueAndVReg> &FPValReg)
: FPValReg(FPValReg) {}
bool match(const MachineRegisterInfo &MRI, Register Reg) {
FPValReg = getFConstantVRegValWithLookThrough(Reg, MRI);
return FPValReg ? true : false;
}
};
inline GFCstAndRegMatch m_GFCst(std::optional<FPValueAndVReg> &FPValReg) {
return GFCstAndRegMatch(FPValReg);
}
struct GFCstOrSplatGFCstMatch {
std::optional<FPValueAndVReg> &FPValReg;
GFCstOrSplatGFCstMatch(std::optional<FPValueAndVReg> &FPValReg)
: FPValReg(FPValReg) {}
bool match(const MachineRegisterInfo &MRI, Register Reg) {
return (FPValReg = getFConstantSplat(Reg, MRI)) ||
(FPValReg = getFConstantVRegValWithLookThrough(Reg, MRI));
};
};
inline GFCstOrSplatGFCstMatch
m_GFCstOrSplat(std::optional<FPValueAndVReg> &FPValReg) {
return GFCstOrSplatGFCstMatch(FPValReg);
}
/// Matcher for a specific constant value.
struct SpecificConstantMatch {
int64_t RequestedVal;
SpecificConstantMatch(int64_t RequestedVal) : RequestedVal(RequestedVal) {}
bool match(const MachineRegisterInfo &MRI, Register Reg) {
int64_t MatchedVal;
return mi_match(Reg, MRI, m_ICst(MatchedVal)) && MatchedVal == RequestedVal;
}
};
/// Matches a constant equal to \p RequestedValue.
inline SpecificConstantMatch m_SpecificICst(int64_t RequestedValue) {
return SpecificConstantMatch(RequestedValue);
}
/// Matcher for a specific constant splat.
struct SpecificConstantSplatMatch {
int64_t RequestedVal;
SpecificConstantSplatMatch(int64_t RequestedVal)
: RequestedVal(RequestedVal) {}
bool match(const MachineRegisterInfo &MRI, Register Reg) {
return isBuildVectorConstantSplat(Reg, MRI, RequestedVal,
/* AllowUndef */ false);
}
};
/// Matches a constant splat of \p RequestedValue.
inline SpecificConstantSplatMatch m_SpecificICstSplat(int64_t RequestedValue) {
return SpecificConstantSplatMatch(RequestedValue);
}
/// Matcher for a specific constant or constant splat.
struct SpecificConstantOrSplatMatch {
int64_t RequestedVal;
SpecificConstantOrSplatMatch(int64_t RequestedVal)
: RequestedVal(RequestedVal) {}
bool match(const MachineRegisterInfo &MRI, Register Reg) {
int64_t MatchedVal;
if (mi_match(Reg, MRI, m_ICst(MatchedVal)) && MatchedVal == RequestedVal)
return true;
return isBuildVectorConstantSplat(Reg, MRI, RequestedVal,
/* AllowUndef */ false);
}
};
/// Matches a \p RequestedValue constant or a constant splat of \p
/// RequestedValue.
inline SpecificConstantOrSplatMatch
m_SpecificICstOrSplat(int64_t RequestedValue) {
return SpecificConstantOrSplatMatch(RequestedValue);
}
///{
/// Convenience matchers for specific integer values.
inline SpecificConstantMatch m_ZeroInt() { return SpecificConstantMatch(0); }
inline SpecificConstantMatch m_AllOnesInt() {
return SpecificConstantMatch(-1);
}
///}
/// Matcher for a specific register.
struct SpecificRegisterMatch {
Register RequestedReg;
SpecificRegisterMatch(Register RequestedReg) : RequestedReg(RequestedReg) {}
bool match(const MachineRegisterInfo &MRI, Register Reg) {
return Reg == RequestedReg;
}
};
/// Matches a register only if it is equal to \p RequestedReg.
inline SpecificRegisterMatch m_SpecificReg(Register RequestedReg) {
return SpecificRegisterMatch(RequestedReg);
}
// TODO: Rework this for different kinds of MachineOperand.
// Currently assumes the Src for a match is a register.
// We might want to support taking in some MachineOperands and call getReg on
// that.
struct operand_type_match {
bool match(const MachineRegisterInfo &MRI, Register Reg) { return true; }
bool match(const MachineRegisterInfo &MRI, MachineOperand *MO) {
return MO->isReg();
}
};
inline operand_type_match m_Reg() { return operand_type_match(); }
/// Matching combinators.
template <typename... Preds> struct And {
template <typename MatchSrc>
bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
return true;
}
};
template <typename Pred, typename... Preds>
struct And<Pred, Preds...> : And<Preds...> {
Pred P;
And(Pred &&p, Preds &&... preds)
: And<Preds...>(std::forward<Preds>(preds)...), P(std::forward<Pred>(p)) {
}
template <typename MatchSrc>
bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
return P.match(MRI, src) && And<Preds...>::match(MRI, src);
}
};
template <typename... Preds> struct Or {
template <typename MatchSrc>
bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
return false;
}
};
template <typename Pred, typename... Preds>
struct Or<Pred, Preds...> : Or<Preds...> {
Pred P;
Or(Pred &&p, Preds &&... preds)
: Or<Preds...>(std::forward<Preds>(preds)...), P(std::forward<Pred>(p)) {}
template <typename MatchSrc>
bool match(const MachineRegisterInfo &MRI, MatchSrc &&src) {
return P.match(MRI, src) || Or<Preds...>::match(MRI, src);
}
};
template <typename... Preds> And<Preds...> m_all_of(Preds &&... preds) {
return And<Preds...>(std::forward<Preds>(preds)...);
}
template <typename... Preds> Or<Preds...> m_any_of(Preds &&... preds) {
return Or<Preds...>(std::forward<Preds>(preds)...);
}
template <typename BindTy> struct bind_helper {
static bool bind(const MachineRegisterInfo &MRI, BindTy &VR, BindTy &V) {
VR = V;
return true;
}
};
template <> struct bind_helper<MachineInstr *> {
static bool bind(const MachineRegisterInfo &MRI, MachineInstr *&MI,
Register Reg) {
MI = MRI.getVRegDef(Reg);
if (MI)
return true;
return false;
}
static bool bind(const MachineRegisterInfo &MRI, MachineInstr *&MI,
MachineInstr *Inst) {
MI = Inst;
return MI;
}
};
template <> struct bind_helper<LLT> {
static bool bind(const MachineRegisterInfo &MRI, LLT Ty, Register Reg) {
Ty = MRI.getType(Reg);
if (Ty.isValid())
return true;
return false;
}
};
template <> struct bind_helper<const ConstantFP *> {
static bool bind(const MachineRegisterInfo &MRI, const ConstantFP *&F,
Register Reg) {
F = getConstantFPVRegVal(Reg, MRI);
if (F)
return true;
return false;
}
};
template <typename Class> struct bind_ty {
Class &VR;
bind_ty(Class &V) : VR(V) {}
template <typename ITy> bool match(const MachineRegisterInfo &MRI, ITy &&V) {
return bind_helper<Class>::bind(MRI, VR, V);
}
};
inline bind_ty<Register> m_Reg(Register &R) { return R; }
inline bind_ty<MachineInstr *> m_MInstr(MachineInstr *&MI) { return MI; }
inline bind_ty<LLT> m_Type(LLT Ty) { return Ty; }
inline bind_ty<CmpInst::Predicate> m_Pred(CmpInst::Predicate &P) { return P; }
inline operand_type_match m_Pred() { return operand_type_match(); }
struct ImplicitDefMatch {
bool match(const MachineRegisterInfo &MRI, Register Reg) {
MachineInstr *TmpMI;
if (mi_match(Reg, MRI, m_MInstr(TmpMI)))
return TmpMI->getOpcode() == TargetOpcode::G_IMPLICIT_DEF;
return false;
}
};
inline ImplicitDefMatch m_GImplicitDef() { return ImplicitDefMatch(); }
// Helper for matching G_FCONSTANT
inline bind_ty<const ConstantFP *> m_GFCst(const ConstantFP *&C) { return C; }
// General helper for all the binary generic MI such as G_ADD/G_SUB etc
template <typename LHS_P, typename RHS_P, unsigned Opcode,
bool Commutable = false>
struct BinaryOp_match {
LHS_P L;
RHS_P R;
BinaryOp_match(const LHS_P &LHS, const RHS_P &RHS) : L(LHS), R(RHS) {}
template <typename OpTy>
bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
MachineInstr *TmpMI;
if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 3) {
return (L.match(MRI, TmpMI->getOperand(1).getReg()) &&
R.match(MRI, TmpMI->getOperand(2).getReg())) ||
(Commutable && (R.match(MRI, TmpMI->getOperand(1).getReg()) &&
L.match(MRI, TmpMI->getOperand(2).getReg())));
}
}
return false;
}
};
// Helper for (commutative) binary generic MI that checks Opcode.
template <typename LHS_P, typename RHS_P, bool Commutable = false>
struct BinaryOpc_match {
unsigned Opc;
LHS_P L;
RHS_P R;
BinaryOpc_match(unsigned Opcode, const LHS_P &LHS, const RHS_P &RHS)
: Opc(Opcode), L(LHS), R(RHS) {}
template <typename OpTy>
bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
MachineInstr *TmpMI;
if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
if (TmpMI->getOpcode() == Opc && TmpMI->getNumDefs() == 1 &&
TmpMI->getNumOperands() == 3) {
return (L.match(MRI, TmpMI->getOperand(1).getReg()) &&
R.match(MRI, TmpMI->getOperand(2).getReg())) ||
(Commutable && (R.match(MRI, TmpMI->getOperand(1).getReg()) &&
L.match(MRI, TmpMI->getOperand(2).getReg())));
}
}
return false;
}
};
template <typename LHS, typename RHS>
inline BinaryOpc_match<LHS, RHS, false> m_BinOp(unsigned Opcode, const LHS &L,
const RHS &R) {
return BinaryOpc_match<LHS, RHS, false>(Opcode, L, R);
}
template <typename LHS, typename RHS>
inline BinaryOpc_match<LHS, RHS, true>
m_CommutativeBinOp(unsigned Opcode, const LHS &L, const RHS &R) {
return BinaryOpc_match<LHS, RHS, true>(Opcode, L, R);
}
template <typename LHS, typename RHS>
inline BinaryOp_match<LHS, RHS, TargetOpcode::G_ADD, true>
m_GAdd(const LHS &L, const RHS &R) {
return BinaryOp_match<LHS, RHS, TargetOpcode::G_ADD, true>(L, R);
}
template <typename LHS, typename RHS>
inline BinaryOp_match<LHS, RHS, TargetOpcode::G_BUILD_VECTOR, false>
m_GBuildVector(const LHS &L, const RHS &R) {
return BinaryOp_match<LHS, RHS, TargetOpcode::G_BUILD_VECTOR, false>(L, R);
}
template <typename LHS, typename RHS>
inline BinaryOp_match<LHS, RHS, TargetOpcode::G_BUILD_VECTOR_TRUNC, false>
m_GBuildVectorTrunc(const LHS &L, const RHS &R) {
return BinaryOp_match<LHS, RHS, TargetOpcode::G_BUILD_VECTOR_TRUNC, false>(L,
R);
}
template <typename LHS, typename RHS>
inline BinaryOp_match<LHS, RHS, TargetOpcode::G_PTR_ADD, false>
m_GPtrAdd(const LHS &L, const RHS &R) {
return BinaryOp_match<LHS, RHS, TargetOpcode::G_PTR_ADD, false>(L, R);
}
template <typename LHS, typename RHS>
inline BinaryOp_match<LHS, RHS, TargetOpcode::G_SUB> m_GSub(const LHS &L,
const RHS &R) {
return BinaryOp_match<LHS, RHS, TargetOpcode::G_SUB>(L, R);
}
template <typename LHS, typename RHS>
inline BinaryOp_match<LHS, RHS, TargetOpcode::G_MUL, true>
m_GMul(const LHS &L, const RHS &R) {
return BinaryOp_match<LHS, RHS, TargetOpcode::G_MUL, true>(L, R);
}
template <typename LHS, typename RHS>
inline BinaryOp_match<LHS, RHS, TargetOpcode::G_FADD, true>
m_GFAdd(const LHS &L, const RHS &R) {
return BinaryOp_match<LHS, RHS, TargetOpcode::G_FADD, true>(L, R);
}
template <typename LHS, typename RHS>
inline BinaryOp_match<LHS, RHS, TargetOpcode::G_FMUL, true>
m_GFMul(const LHS &L, const RHS &R) {
return BinaryOp_match<LHS, RHS, TargetOpcode::G_FMUL, true>(L, R);
}
template <typename LHS, typename RHS>
inline BinaryOp_match<LHS, RHS, TargetOpcode::G_FSUB, false>
m_GFSub(const LHS &L, const RHS &R) {
return BinaryOp_match<LHS, RHS, TargetOpcode::G_FSUB, false>(L, R);
}
template <typename LHS, typename RHS>
inline BinaryOp_match<LHS, RHS, TargetOpcode::G_AND, true>
m_GAnd(const LHS &L, const RHS &R) {
return BinaryOp_match<LHS, RHS, TargetOpcode::G_AND, true>(L, R);
}
template <typename LHS, typename RHS>
inline BinaryOp_match<LHS, RHS, TargetOpcode::G_XOR, true>
m_GXor(const LHS &L, const RHS &R) {
return BinaryOp_match<LHS, RHS, TargetOpcode::G_XOR, true>(L, R);
}
template <typename LHS, typename RHS>
inline BinaryOp_match<LHS, RHS, TargetOpcode::G_OR, true> m_GOr(const LHS &L,
const RHS &R) {
return BinaryOp_match<LHS, RHS, TargetOpcode::G_OR, true>(L, R);
}
template <typename LHS, typename RHS>
inline BinaryOp_match<LHS, RHS, TargetOpcode::G_SHL, false>
m_GShl(const LHS &L, const RHS &R) {
return BinaryOp_match<LHS, RHS, TargetOpcode::G_SHL, false>(L, R);
}
template <typename LHS, typename RHS>
inline BinaryOp_match<LHS, RHS, TargetOpcode::G_LSHR, false>
m_GLShr(const LHS &L, const RHS &R) {
return BinaryOp_match<LHS, RHS, TargetOpcode::G_LSHR, false>(L, R);
}
template <typename LHS, typename RHS>
inline BinaryOp_match<LHS, RHS, TargetOpcode::G_ASHR, false>
m_GAShr(const LHS &L, const RHS &R) {
return BinaryOp_match<LHS, RHS, TargetOpcode::G_ASHR, false>(L, R);
}
template <typename LHS, typename RHS>
inline BinaryOp_match<LHS, RHS, TargetOpcode::G_SMAX, false>
m_GSMax(const LHS &L, const RHS &R) {
return BinaryOp_match<LHS, RHS, TargetOpcode::G_SMAX, false>(L, R);
}
template <typename LHS, typename RHS>
inline BinaryOp_match<LHS, RHS, TargetOpcode::G_SMIN, false>
m_GSMin(const LHS &L, const RHS &R) {
return BinaryOp_match<LHS, RHS, TargetOpcode::G_SMIN, false>(L, R);
}
// Helper for unary instructions (G_[ZSA]EXT/G_TRUNC) etc
template <typename SrcTy, unsigned Opcode> struct UnaryOp_match {
SrcTy L;
UnaryOp_match(const SrcTy &LHS) : L(LHS) {}
template <typename OpTy>
bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
MachineInstr *TmpMI;
if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 2) {
return L.match(MRI, TmpMI->getOperand(1).getReg());
}
}
return false;
}
};
template <typename SrcTy>
inline UnaryOp_match<SrcTy, TargetOpcode::G_ANYEXT>
m_GAnyExt(const SrcTy &Src) {
return UnaryOp_match<SrcTy, TargetOpcode::G_ANYEXT>(Src);
}
template <typename SrcTy>
inline UnaryOp_match<SrcTy, TargetOpcode::G_SEXT> m_GSExt(const SrcTy &Src) {
return UnaryOp_match<SrcTy, TargetOpcode::G_SEXT>(Src);
}
template <typename SrcTy>
inline UnaryOp_match<SrcTy, TargetOpcode::G_ZEXT> m_GZExt(const SrcTy &Src) {
return UnaryOp_match<SrcTy, TargetOpcode::G_ZEXT>(Src);
}
template <typename SrcTy>
inline UnaryOp_match<SrcTy, TargetOpcode::G_FPEXT> m_GFPExt(const SrcTy &Src) {
return UnaryOp_match<SrcTy, TargetOpcode::G_FPEXT>(Src);
}
template <typename SrcTy>
inline UnaryOp_match<SrcTy, TargetOpcode::G_TRUNC> m_GTrunc(const SrcTy &Src) {
return UnaryOp_match<SrcTy, TargetOpcode::G_TRUNC>(Src);
}
template <typename SrcTy>
inline UnaryOp_match<SrcTy, TargetOpcode::G_BITCAST>
m_GBitcast(const SrcTy &Src) {
return UnaryOp_match<SrcTy, TargetOpcode::G_BITCAST>(Src);
}
template <typename SrcTy>
inline UnaryOp_match<SrcTy, TargetOpcode::G_PTRTOINT>
m_GPtrToInt(const SrcTy &Src) {
return UnaryOp_match<SrcTy, TargetOpcode::G_PTRTOINT>(Src);
}
template <typename SrcTy>
inline UnaryOp_match<SrcTy, TargetOpcode::G_INTTOPTR>
m_GIntToPtr(const SrcTy &Src) {
return UnaryOp_match<SrcTy, TargetOpcode::G_INTTOPTR>(Src);
}
template <typename SrcTy>
inline UnaryOp_match<SrcTy, TargetOpcode::G_FPTRUNC>
m_GFPTrunc(const SrcTy &Src) {
return UnaryOp_match<SrcTy, TargetOpcode::G_FPTRUNC>(Src);
}
template <typename SrcTy>
inline UnaryOp_match<SrcTy, TargetOpcode::G_FABS> m_GFabs(const SrcTy &Src) {
return UnaryOp_match<SrcTy, TargetOpcode::G_FABS>(Src);
}
template <typename SrcTy>
inline UnaryOp_match<SrcTy, TargetOpcode::G_FNEG> m_GFNeg(const SrcTy &Src) {
return UnaryOp_match<SrcTy, TargetOpcode::G_FNEG>(Src);
}
template <typename SrcTy>
inline UnaryOp_match<SrcTy, TargetOpcode::COPY> m_Copy(SrcTy &&Src) {
return UnaryOp_match<SrcTy, TargetOpcode::COPY>(std::forward<SrcTy>(Src));
}
template <typename SrcTy>
inline UnaryOp_match<SrcTy, TargetOpcode::G_FSQRT> m_GFSqrt(const SrcTy &Src) {
return UnaryOp_match<SrcTy, TargetOpcode::G_FSQRT>(Src);
}
// General helper for generic MI compares, i.e. G_ICMP and G_FCMP
// TODO: Allow checking a specific predicate.
template <typename Pred_P, typename LHS_P, typename RHS_P, unsigned Opcode,
bool Commutable = false>
struct CompareOp_match {
Pred_P P;
LHS_P L;
RHS_P R;
CompareOp_match(const Pred_P &Pred, const LHS_P &LHS, const RHS_P &RHS)
: P(Pred), L(LHS), R(RHS) {}
template <typename OpTy>
bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
MachineInstr *TmpMI;
if (!mi_match(Op, MRI, m_MInstr(TmpMI)) || TmpMI->getOpcode() != Opcode)
return false;
auto TmpPred =
static_cast<CmpInst::Predicate>(TmpMI->getOperand(1).getPredicate());
if (!P.match(MRI, TmpPred))
return false;
Register LHS = TmpMI->getOperand(2).getReg();
Register RHS = TmpMI->getOperand(3).getReg();
if (L.match(MRI, LHS) && R.match(MRI, RHS))
return true;
if (Commutable && L.match(MRI, RHS) && R.match(MRI, LHS) &&
P.match(MRI, CmpInst::getSwappedPredicate(TmpPred)))
return true;
return false;
}
};
template <typename Pred, typename LHS, typename RHS>
inline CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_ICMP>
m_GICmp(const Pred &P, const LHS &L, const RHS &R) {
return CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_ICMP>(P, L, R);
}
template <typename Pred, typename LHS, typename RHS>
inline CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_FCMP>
m_GFCmp(const Pred &P, const LHS &L, const RHS &R) {
return CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_FCMP>(P, L, R);
}
/// G_ICMP matcher that also matches commuted compares.
/// E.g.
///
/// m_c_GICmp(m_Pred(...), m_GAdd(...), m_GSub(...))
///
/// Could match both of:
///
/// icmp ugt (add x, y) (sub a, b)
/// icmp ult (sub a, b) (add x, y)
template <typename Pred, typename LHS, typename RHS>
inline CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_ICMP, true>
m_c_GICmp(const Pred &P, const LHS &L, const RHS &R) {
return CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_ICMP, true>(P, L, R);
}
/// G_FCMP matcher that also matches commuted compares.
/// E.g.
///
/// m_c_GFCmp(m_Pred(...), m_FAdd(...), m_GFMul(...))
///
/// Could match both of:
///
/// fcmp ogt (fadd x, y) (fmul a, b)
/// fcmp olt (fmul a, b) (fadd x, y)
template <typename Pred, typename LHS, typename RHS>
inline CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_FCMP, true>
m_c_GFCmp(const Pred &P, const LHS &L, const RHS &R) {
return CompareOp_match<Pred, LHS, RHS, TargetOpcode::G_FCMP, true>(P, L, R);
}
// Helper for checking if a Reg is of specific type.
struct CheckType {
LLT Ty;
CheckType(const LLT Ty) : Ty(Ty) {}
bool match(const MachineRegisterInfo &MRI, Register Reg) {
return MRI.getType(Reg) == Ty;
}
};
inline CheckType m_SpecificType(LLT Ty) { return Ty; }
template <typename Src0Ty, typename Src1Ty, typename Src2Ty, unsigned Opcode>
struct TernaryOp_match {
Src0Ty Src0;
Src1Ty Src1;
Src2Ty Src2;
TernaryOp_match(const Src0Ty &Src0, const Src1Ty &Src1, const Src2Ty &Src2)
: Src0(Src0), Src1(Src1), Src2(Src2) {}
template <typename OpTy>
bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
MachineInstr *TmpMI;
if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 4) {
return (Src0.match(MRI, TmpMI->getOperand(1).getReg()) &&
Src1.match(MRI, TmpMI->getOperand(2).getReg()) &&
Src2.match(MRI, TmpMI->getOperand(3).getReg()));
}
}
return false;
}
};
template <typename Src0Ty, typename Src1Ty, typename Src2Ty>
inline TernaryOp_match<Src0Ty, Src1Ty, Src2Ty,
TargetOpcode::G_INSERT_VECTOR_ELT>
m_GInsertVecElt(const Src0Ty &Src0, const Src1Ty &Src1, const Src2Ty &Src2) {
return TernaryOp_match<Src0Ty, Src1Ty, Src2Ty,
TargetOpcode::G_INSERT_VECTOR_ELT>(Src0, Src1, Src2);
}
template <typename Src0Ty, typename Src1Ty, typename Src2Ty>
inline TernaryOp_match<Src0Ty, Src1Ty, Src2Ty, TargetOpcode::G_SELECT>
m_GISelect(const Src0Ty &Src0, const Src1Ty &Src1, const Src2Ty &Src2) {
return TernaryOp_match<Src0Ty, Src1Ty, Src2Ty, TargetOpcode::G_SELECT>(
Src0, Src1, Src2);
}
/// Matches a register negated by a G_SUB.
/// G_SUB 0, %negated_reg
template <typename SrcTy>
inline BinaryOp_match<SpecificConstantMatch, SrcTy, TargetOpcode::G_SUB>
m_Neg(const SrcTy &&Src) {
return m_GSub(m_ZeroInt(), Src);
}
/// Matches a register not-ed by a G_XOR.
/// G_XOR %not_reg, -1
template <typename SrcTy>
inline BinaryOp_match<SrcTy, SpecificConstantMatch, TargetOpcode::G_XOR, true>
m_Not(const SrcTy &&Src) {
return m_GXor(Src, m_AllOnesInt());
}
} // namespace MIPatternMatch
} // namespace llvm
#endif
PK iwFZݢ�EV EV % CodeGen/GlobalISel/MachineIRBuilder.hnu �[��� //===-- llvm/CodeGen/GlobalISel/MachineIRBuilder.h - MIBuilder --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This file declares the MachineIRBuilder class.
/// This is a helper class to build MachineInstr.
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H
#define LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H
#include "llvm/CodeGen/GlobalISel/GISelChangeObserver.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetOpcodes.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/Module.h"
namespace llvm {
// Forward declarations.
class APInt;
class BlockAddress;
class Constant;
class ConstantFP;
class ConstantInt;
class DataLayout;
class GISelCSEInfo;
class GlobalValue;
class TargetRegisterClass;
class MachineFunction;
class MachineInstr;
class TargetInstrInfo;
class GISelChangeObserver;
/// Class which stores all the state required in a MachineIRBuilder.
/// Since MachineIRBuilders will only store state in this object, it allows
/// to transfer BuilderState between different kinds of MachineIRBuilders.
struct MachineIRBuilderState {
/// MachineFunction under construction.
MachineFunction *MF = nullptr;
/// Information used to access the description of the opcodes.
const TargetInstrInfo *TII = nullptr;
/// Information used to verify types are consistent and to create virtual registers.
MachineRegisterInfo *MRI = nullptr;
/// Debug location to be set to any instruction we create.
DebugLoc DL;
/// PC sections metadata to be set to any instruction we create.
MDNode *PCSections = nullptr;
/// \name Fields describing the insertion point.
/// @{
MachineBasicBlock *MBB = nullptr;
MachineBasicBlock::iterator II;
/// @}
GISelChangeObserver *Observer = nullptr;
GISelCSEInfo *CSEInfo = nullptr;
};
class DstOp {
union {
LLT LLTTy;
Register Reg;
const TargetRegisterClass *RC;
};
public:
enum class DstType { Ty_LLT, Ty_Reg, Ty_RC };
DstOp(unsigned R) : Reg(R), Ty(DstType::Ty_Reg) {}
DstOp(Register R) : Reg(R), Ty(DstType::Ty_Reg) {}
DstOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(DstType::Ty_Reg) {}
DstOp(const LLT T) : LLTTy(T), Ty(DstType::Ty_LLT) {}
DstOp(const TargetRegisterClass *TRC) : RC(TRC), Ty(DstType::Ty_RC) {}
void addDefToMIB(MachineRegisterInfo &MRI, MachineInstrBuilder &MIB) const {
switch (Ty) {
case DstType::Ty_Reg:
MIB.addDef(Reg);
break;
case DstType::Ty_LLT:
MIB.addDef(MRI.createGenericVirtualRegister(LLTTy));
break;
case DstType::Ty_RC:
MIB.addDef(MRI.createVirtualRegister(RC));
break;
}
}
LLT getLLTTy(const MachineRegisterInfo &MRI) const {
switch (Ty) {
case DstType::Ty_RC:
return LLT{};
case DstType::Ty_LLT:
return LLTTy;
case DstType::Ty_Reg:
return MRI.getType(Reg);
}
llvm_unreachable("Unrecognised DstOp::DstType enum");
}
Register getReg() const {
assert(Ty == DstType::Ty_Reg && "Not a register");
return Reg;
}
const TargetRegisterClass *getRegClass() const {
switch (Ty) {
case DstType::Ty_RC:
return RC;
default:
llvm_unreachable("Not a RC Operand");
}
}
DstType getDstOpKind() const { return Ty; }
private:
DstType Ty;
};
class SrcOp {
union {
MachineInstrBuilder SrcMIB;
Register Reg;
CmpInst::Predicate Pred;
int64_t Imm;
};
public:
enum class SrcType { Ty_Reg, Ty_MIB, Ty_Predicate, Ty_Imm };
SrcOp(Register R) : Reg(R), Ty(SrcType::Ty_Reg) {}
SrcOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(SrcType::Ty_Reg) {}
SrcOp(const MachineInstrBuilder &MIB) : SrcMIB(MIB), Ty(SrcType::Ty_MIB) {}
SrcOp(const CmpInst::Predicate P) : Pred(P), Ty(SrcType::Ty_Predicate) {}
/// Use of registers held in unsigned integer variables (or more rarely signed
/// integers) is no longer permitted to avoid ambiguity with upcoming support
/// for immediates.
SrcOp(unsigned) = delete;
SrcOp(int) = delete;
SrcOp(uint64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {}
SrcOp(int64_t V) : Imm(V), Ty(SrcType::Ty_Imm) {}
void addSrcToMIB(MachineInstrBuilder &MIB) const {
switch (Ty) {
case SrcType::Ty_Predicate:
MIB.addPredicate(Pred);
break;
case SrcType::Ty_Reg:
MIB.addUse(Reg);
break;
case SrcType::Ty_MIB:
MIB.addUse(SrcMIB->getOperand(0).getReg());
break;
case SrcType::Ty_Imm:
MIB.addImm(Imm);
break;
}
}
LLT getLLTTy(const MachineRegisterInfo &MRI) const {
switch (Ty) {
case SrcType::Ty_Predicate:
case SrcType::Ty_Imm:
llvm_unreachable("Not a register operand");
case SrcType::Ty_Reg:
return MRI.getType(Reg);
case SrcType::Ty_MIB:
return MRI.getType(SrcMIB->getOperand(0).getReg());
}
llvm_unreachable("Unrecognised SrcOp::SrcType enum");
}
Register getReg() const {
switch (Ty) {
case SrcType::Ty_Predicate:
case SrcType::Ty_Imm:
llvm_unreachable("Not a register operand");
case SrcType::Ty_Reg:
return Reg;
case SrcType::Ty_MIB:
return SrcMIB->getOperand(0).getReg();
}
llvm_unreachable("Unrecognised SrcOp::SrcType enum");
}
CmpInst::Predicate getPredicate() const {
switch (Ty) {
case SrcType::Ty_Predicate:
return Pred;
default:
llvm_unreachable("Not a register operand");
}
}
int64_t getImm() const {
switch (Ty) {
case SrcType::Ty_Imm:
return Imm;
default:
llvm_unreachable("Not an immediate");
}
}
SrcType getSrcOpKind() const { return Ty; }
private:
SrcType Ty;
};
/// Helper class to build MachineInstr.
/// It keeps internally the insertion point and debug location for all
/// the new instructions we want to create.
/// This information can be modified via the related setters.
class MachineIRBuilder {
MachineIRBuilderState State;
unsigned getOpcodeForMerge(const DstOp &DstOp, ArrayRef<SrcOp> SrcOps) const;
protected:
void validateTruncExt(const LLT Dst, const LLT Src, bool IsExtend);
void validateUnaryOp(const LLT Res, const LLT Op0);
void validateBinaryOp(const LLT Res, const LLT Op0, const LLT Op1);
void validateShiftOp(const LLT Res, const LLT Op0, const LLT Op1);
void validateSelectOp(const LLT ResTy, const LLT TstTy, const LLT Op0Ty,
const LLT Op1Ty);
void recordInsertion(MachineInstr *InsertedInstr) const {
if (State.Observer)
State.Observer->createdInstr(*InsertedInstr);
}
public:
/// Some constructors for easy use.
MachineIRBuilder() = default;
MachineIRBuilder(MachineFunction &MF) { setMF(MF); }
MachineIRBuilder(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsPt) {
setMF(*MBB.getParent());
setInsertPt(MBB, InsPt);
}
MachineIRBuilder(MachineInstr &MI) :
MachineIRBuilder(*MI.getParent(), MI.getIterator()) {
setInstr(MI);
setDebugLoc(MI.getDebugLoc());
}
MachineIRBuilder(MachineInstr &MI, GISelChangeObserver &Observer) :
MachineIRBuilder(MI) {
setChangeObserver(Observer);
}
virtual ~MachineIRBuilder() = default;
MachineIRBuilder(const MachineIRBuilderState &BState) : State(BState) {}
const TargetInstrInfo &getTII() {
assert(State.TII && "TargetInstrInfo is not set");
return *State.TII;
}
/// Getter for the function we currently build.
MachineFunction &getMF() {
assert(State.MF && "MachineFunction is not set");
return *State.MF;
}
const MachineFunction &getMF() const {
assert(State.MF && "MachineFunction is not set");
return *State.MF;
}
const DataLayout &getDataLayout() const {
return getMF().getFunction().getParent()->getDataLayout();
}
LLVMContext &getContext() const {
return getMF().getFunction().getContext();
}
/// Getter for DebugLoc
const DebugLoc &getDL() { return State.DL; }
/// Getter for MRI
MachineRegisterInfo *getMRI() { return State.MRI; }
const MachineRegisterInfo *getMRI() const { return State.MRI; }
/// Getter for the State
MachineIRBuilderState &getState() { return State; }
/// Getter for the basic block we currently build.
const MachineBasicBlock &getMBB() const {
assert(State.MBB && "MachineBasicBlock is not set");
return *State.MBB;
}
MachineBasicBlock &getMBB() {
return const_cast<MachineBasicBlock &>(
const_cast<const MachineIRBuilder *>(this)->getMBB());
}
GISelCSEInfo *getCSEInfo() { return State.CSEInfo; }
const GISelCSEInfo *getCSEInfo() const { return State.CSEInfo; }
/// Current insertion point for new instructions.
MachineBasicBlock::iterator getInsertPt() { return State.II; }
/// Set the insertion point before the specified position.
/// \pre MBB must be in getMF().
/// \pre II must be a valid iterator in MBB.
void setInsertPt(MachineBasicBlock &MBB, MachineBasicBlock::iterator II) {
assert(MBB.getParent() == &getMF() &&
"Basic block is in a different function");
State.MBB = &MBB;
State.II = II;
}
/// @}
void setCSEInfo(GISelCSEInfo *Info) { State.CSEInfo = Info; }
/// \name Setters for the insertion point.
/// @{
/// Set the MachineFunction where to build instructions.
void setMF(MachineFunction &MF);
/// Set the insertion point to the end of \p MBB.
/// \pre \p MBB must be contained by getMF().
void setMBB(MachineBasicBlock &MBB) {
State.MBB = &MBB;
State.II = MBB.end();
assert(&getMF() == MBB.getParent() &&
"Basic block is in a different function");
}
/// Set the insertion point to before MI.
/// \pre MI must be in getMF().
void setInstr(MachineInstr &MI) {
assert(MI.getParent() && "Instruction is not part of a basic block");
setMBB(*MI.getParent());
State.II = MI.getIterator();
setPCSections(MI.getPCSections());
}
/// @}
/// Set the insertion point to before MI, and set the debug loc to MI's loc.
/// \pre MI must be in getMF().
void setInstrAndDebugLoc(MachineInstr &MI) {
setInstr(MI);
setDebugLoc(MI.getDebugLoc());
}
void setChangeObserver(GISelChangeObserver &Observer) {
State.Observer = &Observer;
}
void stopObservingChanges() { State.Observer = nullptr; }
/// @}
/// Set the debug location to \p DL for all the next build instructions.
void setDebugLoc(const DebugLoc &DL) { this->State.DL = DL; }
/// Get the current instruction's debug location.
const DebugLoc &getDebugLoc() { return State.DL; }
/// Set the PC sections metadata to \p MD for all the next build instructions.
void setPCSections(MDNode *MD) { State.PCSections = MD; }
/// Get the current instruction's PC sections metadata.
MDNode *getPCSections() { return State.PCSections; }
/// Build and insert <empty> = \p Opcode <empty>.
/// The insertion point is the one set by the last call of either
/// setBasicBlock or setMI.
///
/// \pre setBasicBlock or setMI must have been called.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildInstr(unsigned Opcode) {
return insertInstr(buildInstrNoInsert(Opcode));
}
/// Build but don't insert <empty> = \p Opcode <empty>.
///
/// \pre setMF, setBasicBlock or setMI must have been called.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildInstrNoInsert(unsigned Opcode);
/// Insert an existing instruction at the insertion point.
MachineInstrBuilder insertInstr(MachineInstrBuilder MIB);
/// Build and insert a DBG_VALUE instruction expressing the fact that the
/// associated \p Variable lives in \p Reg (suitably modified by \p Expr).
MachineInstrBuilder buildDirectDbgValue(Register Reg, const MDNode *Variable,
const MDNode *Expr);
/// Build and insert a DBG_VALUE instruction expressing the fact that the
/// associated \p Variable lives in memory at \p Reg (suitably modified by \p
/// Expr).
MachineInstrBuilder buildIndirectDbgValue(Register Reg,
const MDNode *Variable,
const MDNode *Expr);
/// Build and insert a DBG_VALUE instruction expressing the fact that the
/// associated \p Variable lives in the stack slot specified by \p FI
/// (suitably modified by \p Expr).
MachineInstrBuilder buildFIDbgValue(int FI, const MDNode *Variable,
const MDNode *Expr);
/// Build and insert a DBG_VALUE instructions specifying that \p Variable is
/// given by \p C (suitably modified by \p Expr).
MachineInstrBuilder buildConstDbgValue(const Constant &C,
const MDNode *Variable,
const MDNode *Expr);
/// Build and insert a DBG_LABEL instructions specifying that \p Label is
/// given. Convert "llvm.dbg.label Label" to "DBG_LABEL Label".
MachineInstrBuilder buildDbgLabel(const MDNode *Label);
/// Build and insert \p Res = G_DYN_STACKALLOC \p Size, \p Align
///
/// G_DYN_STACKALLOC does a dynamic stack allocation and writes the address of
/// the allocated memory into \p Res.
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with pointer type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildDynStackAlloc(const DstOp &Res, const SrcOp &Size,
Align Alignment);
/// Build and insert \p Res = G_FRAME_INDEX \p Idx
///
/// G_FRAME_INDEX materializes the address of an alloca value or other
/// stack-based object.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with pointer type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildFrameIndex(const DstOp &Res, int Idx);
/// Build and insert \p Res = G_GLOBAL_VALUE \p GV
///
/// G_GLOBAL_VALUE materializes the address of the specified global
/// into \p Res.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with pointer type
/// in the same address space as \p GV.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildGlobalValue(const DstOp &Res, const GlobalValue *GV);
/// Build and insert \p Res = G_CONSTANT_POOL \p Idx
///
/// G_CONSTANT_POOL materializes the address of an object in the constant
/// pool.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with pointer type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildConstantPool(const DstOp &Res, unsigned Idx);
/// Build and insert \p Res = G_PTR_ADD \p Op0, \p Op1
///
/// G_PTR_ADD adds \p Op1 addressible units to the pointer specified by \p Op0,
/// storing the resulting pointer in \p Res. Addressible units are typically
/// bytes but this can vary between targets.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res and \p Op0 must be generic virtual registers with pointer
/// type.
/// \pre \p Op1 must be a generic virtual register with scalar type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildPtrAdd(const DstOp &Res, const SrcOp &Op0,
const SrcOp &Op1);
/// Materialize and insert \p Res = G_PTR_ADD \p Op0, (G_CONSTANT \p Value)
///
/// G_PTR_ADD adds \p Value bytes to the pointer specified by \p Op0,
/// storing the resulting pointer in \p Res. If \p Value is zero then no
/// G_PTR_ADD or G_CONSTANT will be created and \pre Op0 will be assigned to
/// \p Res.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Op0 must be a generic virtual register with pointer type.
/// \pre \p ValueTy must be a scalar type.
/// \pre \p Res must be 0. This is to detect confusion between
/// materializePtrAdd() and buildPtrAdd().
/// \post \p Res will either be a new generic virtual register of the same
/// type as \p Op0 or \p Op0 itself.
///
/// \return a MachineInstrBuilder for the newly created instruction.
std::optional<MachineInstrBuilder> materializePtrAdd(Register &Res,
Register Op0,
const LLT ValueTy,
uint64_t Value);
/// Build and insert \p Res = G_PTRMASK \p Op0, \p Op1
MachineInstrBuilder buildPtrMask(const DstOp &Res, const SrcOp &Op0,
const SrcOp &Op1) {
return buildInstr(TargetOpcode::G_PTRMASK, {Res}, {Op0, Op1});
}
/// Build and insert \p Res = G_PTRMASK \p Op0, \p G_CONSTANT (1 << NumBits) - 1
///
/// This clears the low bits of a pointer operand without destroying its
/// pointer properties. This has the effect of rounding the address *down* to
/// a specified alignment in bits.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res and \p Op0 must be generic virtual registers with pointer
/// type.
/// \pre \p NumBits must be an integer representing the number of low bits to
/// be cleared in \p Op0.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildMaskLowPtrBits(const DstOp &Res, const SrcOp &Op0,
uint32_t NumBits);
/// Build and insert
/// a, b, ..., x = G_UNMERGE_VALUES \p Op0
/// \p Res = G_BUILD_VECTOR a, b, ..., x, undef, ..., undef
///
/// Pad \p Op0 with undef elements to match number of elements in \p Res.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res and \p Op0 must be generic virtual registers with vector type,
/// same vector element type and Op0 must have fewer elements then Res.
///
/// \return a MachineInstrBuilder for the newly created build vector instr.
MachineInstrBuilder buildPadVectorWithUndefElements(const DstOp &Res,
const SrcOp &Op0);
/// Build and insert
/// a, b, ..., x, y, z = G_UNMERGE_VALUES \p Op0
/// \p Res = G_BUILD_VECTOR a, b, ..., x
///
/// Delete trailing elements in \p Op0 to match number of elements in \p Res.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res and \p Op0 must be generic virtual registers with vector type,
/// same vector element type and Op0 must have more elements then Res.
///
/// \return a MachineInstrBuilder for the newly created build vector instr.
MachineInstrBuilder buildDeleteTrailingVectorElements(const DstOp &Res,
const SrcOp &Op0);
/// Build and insert \p Res, \p CarryOut = G_UADDO \p Op0, \p Op1
///
/// G_UADDO sets \p Res to \p Op0 + \p Op1 (truncated to the bit width) and
/// sets \p CarryOut to 1 if the result overflowed in unsigned arithmetic.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers with the
/// same scalar type.
////\pre \p CarryOut must be generic virtual register with scalar type
///(typically s1)
///
/// \return The newly created instruction.
MachineInstrBuilder buildUAddo(const DstOp &Res, const DstOp &CarryOut,
const SrcOp &Op0, const SrcOp &Op1) {
return buildInstr(TargetOpcode::G_UADDO, {Res, CarryOut}, {Op0, Op1});
}
/// Build and insert \p Res, \p CarryOut = G_USUBO \p Op0, \p Op1
MachineInstrBuilder buildUSubo(const DstOp &Res, const DstOp &CarryOut,
const SrcOp &Op0, const SrcOp &Op1) {
return buildInstr(TargetOpcode::G_USUBO, {Res, CarryOut}, {Op0, Op1});
}
/// Build and insert \p Res, \p CarryOut = G_SADDO \p Op0, \p Op1
MachineInstrBuilder buildSAddo(const DstOp &Res, const DstOp &CarryOut,
const SrcOp &Op0, const SrcOp &Op1) {
return buildInstr(TargetOpcode::G_SADDO, {Res, CarryOut}, {Op0, Op1});
}
/// Build and insert \p Res, \p CarryOut = G_SUBO \p Op0, \p Op1
MachineInstrBuilder buildSSubo(const DstOp &Res, const DstOp &CarryOut,
const SrcOp &Op0, const SrcOp &Op1) {
return buildInstr(TargetOpcode::G_SSUBO, {Res, CarryOut}, {Op0, Op1});
}
/// Build and insert \p Res, \p CarryOut = G_UADDE \p Op0,
/// \p Op1, \p CarryIn
///
/// G_UADDE sets \p Res to \p Op0 + \p Op1 + \p CarryIn (truncated to the bit
/// width) and sets \p CarryOut to 1 if the result overflowed in unsigned
/// arithmetic.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
/// with the same scalar type.
/// \pre \p CarryOut and \p CarryIn must be generic virtual
/// registers with the same scalar type (typically s1)
///
/// \return The newly created instruction.
MachineInstrBuilder buildUAdde(const DstOp &Res, const DstOp &CarryOut,
const SrcOp &Op0, const SrcOp &Op1,
const SrcOp &CarryIn) {
return buildInstr(TargetOpcode::G_UADDE, {Res, CarryOut},
{Op0, Op1, CarryIn});
}
/// Build and insert \p Res, \p CarryOut = G_USUBE \p Op0, \p Op1, \p CarryInp
MachineInstrBuilder buildUSube(const DstOp &Res, const DstOp &CarryOut,
const SrcOp &Op0, const SrcOp &Op1,
const SrcOp &CarryIn) {
return buildInstr(TargetOpcode::G_USUBE, {Res, CarryOut},
{Op0, Op1, CarryIn});
}
/// Build and insert \p Res, \p CarryOut = G_SADDE \p Op0, \p Op1, \p CarryInp
MachineInstrBuilder buildSAdde(const DstOp &Res, const DstOp &CarryOut,
const SrcOp &Op0, const SrcOp &Op1,
const SrcOp &CarryIn) {
return buildInstr(TargetOpcode::G_SADDE, {Res, CarryOut},
{Op0, Op1, CarryIn});
}
/// Build and insert \p Res, \p CarryOut = G_SSUBE \p Op0, \p Op1, \p CarryInp
MachineInstrBuilder buildSSube(const DstOp &Res, const DstOp &CarryOut,
const SrcOp &Op0, const SrcOp &Op1,
const SrcOp &CarryIn) {
return buildInstr(TargetOpcode::G_SSUBE, {Res, CarryOut},
{Op0, Op1, CarryIn});
}
/// Build and insert \p Res = G_ANYEXT \p Op0
///
/// G_ANYEXT produces a register of the specified width, with bits 0 to
/// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are unspecified
/// (i.e. this is neither zero nor sign-extension). For a vector register,
/// each element is extended individually.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with scalar or vector type.
/// \pre \p Op must be a generic virtual register with scalar or vector type.
/// \pre \p Op must be smaller than \p Res
///
/// \return The newly created instruction.
MachineInstrBuilder buildAnyExt(const DstOp &Res, const SrcOp &Op);
/// Build and insert \p Res = G_SEXT \p Op
///
/// G_SEXT produces a register of the specified width, with bits 0 to
/// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are duplicated from the
/// high bit of \p Op (i.e. 2s-complement sign extended).
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with scalar or vector type.
/// \pre \p Op must be a generic virtual register with scalar or vector type.
/// \pre \p Op must be smaller than \p Res
///
/// \return The newly created instruction.
MachineInstrBuilder buildSExt(const DstOp &Res, const SrcOp &Op);
/// Build and insert \p Res = G_SEXT_INREG \p Op, ImmOp
MachineInstrBuilder buildSExtInReg(const DstOp &Res, const SrcOp &Op, int64_t ImmOp) {
return buildInstr(TargetOpcode::G_SEXT_INREG, {Res}, {Op, SrcOp(ImmOp)});
}
/// Build and insert \p Res = G_FPEXT \p Op
MachineInstrBuilder buildFPExt(const DstOp &Res, const SrcOp &Op,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FPEXT, {Res}, {Op}, Flags);
}
/// Build and insert a G_PTRTOINT instruction.
MachineInstrBuilder buildPtrToInt(const DstOp &Dst, const SrcOp &Src) {
return buildInstr(TargetOpcode::G_PTRTOINT, {Dst}, {Src});
}
/// Build and insert a G_INTTOPTR instruction.
MachineInstrBuilder buildIntToPtr(const DstOp &Dst, const SrcOp &Src) {
return buildInstr(TargetOpcode::G_INTTOPTR, {Dst}, {Src});
}
/// Build and insert \p Dst = G_BITCAST \p Src
MachineInstrBuilder buildBitcast(const DstOp &Dst, const SrcOp &Src) {
return buildInstr(TargetOpcode::G_BITCAST, {Dst}, {Src});
}
/// Build and insert \p Dst = G_ADDRSPACE_CAST \p Src
MachineInstrBuilder buildAddrSpaceCast(const DstOp &Dst, const SrcOp &Src) {
return buildInstr(TargetOpcode::G_ADDRSPACE_CAST, {Dst}, {Src});
}
/// \return The opcode of the extension the target wants to use for boolean
/// values.
unsigned getBoolExtOp(bool IsVec, bool IsFP) const;
// Build and insert \p Res = G_ANYEXT \p Op, \p Res = G_SEXT \p Op, or \p Res
// = G_ZEXT \p Op depending on how the target wants to extend boolean values.
MachineInstrBuilder buildBoolExt(const DstOp &Res, const SrcOp &Op,
bool IsFP);
// Build and insert \p Res = G_SEXT_INREG \p Op, 1 or \p Res = G_AND \p Op, 1,
// or COPY depending on how the target wants to extend boolean values, using
// the original register size.
MachineInstrBuilder buildBoolExtInReg(const DstOp &Res, const SrcOp &Op,
bool IsVector,
bool IsFP);
/// Build and insert \p Res = G_ZEXT \p Op
///
/// G_ZEXT produces a register of the specified width, with bits 0 to
/// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are 0. For a vector
/// register, each element is extended individually.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with scalar or vector type.
/// \pre \p Op must be a generic virtual register with scalar or vector type.
/// \pre \p Op must be smaller than \p Res
///
/// \return The newly created instruction.
MachineInstrBuilder buildZExt(const DstOp &Res, const SrcOp &Op);
/// Build and insert \p Res = G_SEXT \p Op, \p Res = G_TRUNC \p Op, or
/// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op.
/// ///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with scalar or vector type.
/// \pre \p Op must be a generic virtual register with scalar or vector type.
///
/// \return The newly created instruction.
MachineInstrBuilder buildSExtOrTrunc(const DstOp &Res, const SrcOp &Op);
/// Build and insert \p Res = G_ZEXT \p Op, \p Res = G_TRUNC \p Op, or
/// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op.
/// ///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with scalar or vector type.
/// \pre \p Op must be a generic virtual register with scalar or vector type.
///
/// \return The newly created instruction.
MachineInstrBuilder buildZExtOrTrunc(const DstOp &Res, const SrcOp &Op);
// Build and insert \p Res = G_ANYEXT \p Op, \p Res = G_TRUNC \p Op, or
/// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op.
/// ///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with scalar or vector type.
/// \pre \p Op must be a generic virtual register with scalar or vector type.
///
/// \return The newly created instruction.
MachineInstrBuilder buildAnyExtOrTrunc(const DstOp &Res, const SrcOp &Op);
/// Build and insert \p Res = \p ExtOpc, \p Res = G_TRUNC \p
/// Op, or \p Res = COPY \p Op depending on the differing sizes of \p Res and
/// \p Op.
/// ///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with scalar or vector type.
/// \pre \p Op must be a generic virtual register with scalar or vector type.
///
/// \return The newly created instruction.
MachineInstrBuilder buildExtOrTrunc(unsigned ExtOpc, const DstOp &Res,
const SrcOp &Op);
/// Build and inserts \p Res = \p G_AND \p Op, \p LowBitsSet(ImmOp)
/// Since there is no G_ZEXT_INREG like G_SEXT_INREG, the instruction is
/// emulated using G_AND.
MachineInstrBuilder buildZExtInReg(const DstOp &Res, const SrcOp &Op,
int64_t ImmOp);
/// Build and insert an appropriate cast between two registers of equal size.
MachineInstrBuilder buildCast(const DstOp &Dst, const SrcOp &Src);
/// Build and insert G_BR \p Dest
///
/// G_BR is an unconditional branch to \p Dest.
///
/// \pre setBasicBlock or setMI must have been called.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildBr(MachineBasicBlock &Dest);
/// Build and insert G_BRCOND \p Tst, \p Dest
///
/// G_BRCOND is a conditional branch to \p Dest.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Tst must be a generic virtual register with scalar
/// type. At the beginning of legalization, this will be a single
/// bit (s1). Targets with interesting flags registers may change
/// this. For a wider type, whether the branch is taken must only
/// depend on bit 0 (for now).
///
/// \return The newly created instruction.
MachineInstrBuilder buildBrCond(const SrcOp &Tst, MachineBasicBlock &Dest);
/// Build and insert G_BRINDIRECT \p Tgt
///
/// G_BRINDIRECT is an indirect branch to \p Tgt.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Tgt must be a generic virtual register with pointer type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildBrIndirect(Register Tgt);
/// Build and insert G_BRJT \p TablePtr, \p JTI, \p IndexReg
///
/// G_BRJT is a jump table branch using a table base pointer \p TablePtr,
/// jump table index \p JTI and index \p IndexReg
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p TablePtr must be a generic virtual register with pointer type.
/// \pre \p JTI must be be a jump table index.
/// \pre \p IndexReg must be a generic virtual register with pointer type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildBrJT(Register TablePtr, unsigned JTI,
Register IndexReg);
/// Build and insert \p Res = G_CONSTANT \p Val
///
/// G_CONSTANT is an integer constant with the specified size and value. \p
/// Val will be extended or truncated to the size of \p Reg.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with scalar or pointer
/// type.
///
/// \return The newly created instruction.
virtual MachineInstrBuilder buildConstant(const DstOp &Res,
const ConstantInt &Val);
/// Build and insert \p Res = G_CONSTANT \p Val
///
/// G_CONSTANT is an integer constant with the specified size and value.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with scalar type.
///
/// \return The newly created instruction.
MachineInstrBuilder buildConstant(const DstOp &Res, int64_t Val);
MachineInstrBuilder buildConstant(const DstOp &Res, const APInt &Val);
/// Build and insert \p Res = G_FCONSTANT \p Val
///
/// G_FCONSTANT is a floating-point constant with the specified size and
/// value.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with scalar type.
///
/// \return The newly created instruction.
virtual MachineInstrBuilder buildFConstant(const DstOp &Res,
const ConstantFP &Val);
MachineInstrBuilder buildFConstant(const DstOp &Res, double Val);
MachineInstrBuilder buildFConstant(const DstOp &Res, const APFloat &Val);
/// Build and insert \p Res = COPY Op
///
/// Register-to-register COPY sets \p Res to \p Op.
///
/// \pre setBasicBlock or setMI must have been called.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildCopy(const DstOp &Res, const SrcOp &Op);
/// Build and insert G_ASSERT_SEXT, G_ASSERT_ZEXT, or G_ASSERT_ALIGN
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAssertInstr(unsigned Opc, const DstOp &Res,
const SrcOp &Op, unsigned Val) {
return buildInstr(Opc, Res, Op).addImm(Val);
}
/// Build and insert \p Res = G_ASSERT_ZEXT Op, Size
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAssertZExt(const DstOp &Res, const SrcOp &Op,
unsigned Size) {
return buildAssertInstr(TargetOpcode::G_ASSERT_ZEXT, Res, Op, Size);
}
/// Build and insert \p Res = G_ASSERT_SEXT Op, Size
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAssertSExt(const DstOp &Res, const SrcOp &Op,
unsigned Size) {
return buildAssertInstr(TargetOpcode::G_ASSERT_SEXT, Res, Op, Size);
}
/// Build and insert \p Res = G_ASSERT_ALIGN Op, AlignVal
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAssertAlign(const DstOp &Res, const SrcOp &Op,
Align AlignVal) {
return buildAssertInstr(TargetOpcode::G_ASSERT_ALIGN, Res, Op,
AlignVal.value());
}
/// Build and insert `Res = G_LOAD Addr, MMO`.
///
/// Loads the value stored at \p Addr. Puts the result in \p Res.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register.
/// \pre \p Addr must be a generic virtual register with pointer type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildLoad(const DstOp &Res, const SrcOp &Addr,
MachineMemOperand &MMO) {
return buildLoadInstr(TargetOpcode::G_LOAD, Res, Addr, MMO);
}
/// Build and insert a G_LOAD instruction, while constructing the
/// MachineMemOperand.
MachineInstrBuilder
buildLoad(const DstOp &Res, const SrcOp &Addr, MachinePointerInfo PtrInfo,
Align Alignment,
MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
const AAMDNodes &AAInfo = AAMDNodes());
/// Build and insert `Res = <opcode> Addr, MMO`.
///
/// Loads the value stored at \p Addr. Puts the result in \p Res.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register.
/// \pre \p Addr must be a generic virtual register with pointer type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildLoadInstr(unsigned Opcode, const DstOp &Res,
const SrcOp &Addr, MachineMemOperand &MMO);
/// Helper to create a load from a constant offset given a base address. Load
/// the type of \p Dst from \p Offset from the given base address and memory
/// operand.
MachineInstrBuilder buildLoadFromOffset(const DstOp &Dst,
const SrcOp &BasePtr,
MachineMemOperand &BaseMMO,
int64_t Offset);
/// Build and insert `G_STORE Val, Addr, MMO`.
///
/// Stores the value \p Val to \p Addr.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Val must be a generic virtual register.
/// \pre \p Addr must be a generic virtual register with pointer type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildStore(const SrcOp &Val, const SrcOp &Addr,
MachineMemOperand &MMO);
/// Build and insert a G_STORE instruction, while constructing the
/// MachineMemOperand.
MachineInstrBuilder
buildStore(const SrcOp &Val, const SrcOp &Addr, MachinePointerInfo PtrInfo,
Align Alignment,
MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
const AAMDNodes &AAInfo = AAMDNodes());
/// Build and insert `Res0, ... = G_EXTRACT Src, Idx0`.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res and \p Src must be generic virtual registers.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildExtract(const DstOp &Res, const SrcOp &Src, uint64_t Index);
/// Build and insert \p Res = IMPLICIT_DEF.
MachineInstrBuilder buildUndef(const DstOp &Res);
/// Build and insert \p Res = G_MERGE_VALUES \p Op0, ...
///
/// G_MERGE_VALUES combines the input elements contiguously into a larger
/// register. It should only be used when the destination register is not a
/// vector.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre The entire register \p Res (and no more) must be covered by the input
/// registers.
/// \pre The type of all \p Ops registers must be identical.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildMergeValues(const DstOp &Res,
ArrayRef<Register> Ops);
/// Build and insert \p Res = G_MERGE_VALUES \p Op0, ...
/// or \p Res = G_BUILD_VECTOR \p Op0, ...
/// or \p Res = G_CONCAT_VECTORS \p Op0, ...
///
/// G_MERGE_VALUES combines the input elements contiguously into a larger
/// register. It is used when the destination register is not a vector.
/// G_BUILD_VECTOR combines scalar inputs into a vector register.
/// G_CONCAT_VECTORS combines vector inputs into a vector register.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre The entire register \p Res (and no more) must be covered by the input
/// registers.
/// \pre The type of all \p Ops registers must be identical.
///
/// \return a MachineInstrBuilder for the newly created instruction. The
/// opcode of the new instruction will depend on the types of both
/// the destination and the sources.
MachineInstrBuilder buildMergeLikeInstr(const DstOp &Res,
ArrayRef<Register> Ops);
MachineInstrBuilder buildMergeLikeInstr(const DstOp &Res,
std::initializer_list<SrcOp> Ops);
/// Build and insert \p Res0, ... = G_UNMERGE_VALUES \p Op
///
/// G_UNMERGE_VALUES splits contiguous bits of the input into multiple
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre The entire register \p Res (and no more) must be covered by the input
/// registers.
/// \pre The type of all \p Res registers must be identical.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildUnmerge(ArrayRef<LLT> Res, const SrcOp &Op);
MachineInstrBuilder buildUnmerge(ArrayRef<Register> Res, const SrcOp &Op);
/// Build and insert an unmerge of \p Res sized pieces to cover \p Op
MachineInstrBuilder buildUnmerge(LLT Res, const SrcOp &Op);
/// Build and insert \p Res = G_BUILD_VECTOR \p Op0, ...
///
/// G_BUILD_VECTOR creates a vector value from multiple scalar registers.
/// \pre setBasicBlock or setMI must have been called.
/// \pre The entire register \p Res (and no more) must be covered by the
/// input scalar registers.
/// \pre The type of all \p Ops registers must be identical.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildBuildVector(const DstOp &Res,
ArrayRef<Register> Ops);
/// Build and insert \p Res = G_BUILD_VECTOR \p Op0, ... where each OpN is
/// built with G_CONSTANT.
MachineInstrBuilder buildBuildVectorConstant(const DstOp &Res,
ArrayRef<APInt> Ops);
/// Build and insert \p Res = G_BUILD_VECTOR with \p Src replicated to fill
/// the number of elements
MachineInstrBuilder buildSplatVector(const DstOp &Res,
const SrcOp &Src);
/// Build and insert \p Res = G_BUILD_VECTOR_TRUNC \p Op0, ...
///
/// G_BUILD_VECTOR_TRUNC creates a vector value from multiple scalar registers
/// which have types larger than the destination vector element type, and
/// truncates the values to fit.
///
/// If the operands given are already the same size as the vector elt type,
/// then this method will instead create a G_BUILD_VECTOR instruction.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre The type of all \p Ops registers must be identical.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildBuildVectorTrunc(const DstOp &Res,
ArrayRef<Register> Ops);
/// Build and insert a vector splat of a scalar \p Src using a
/// G_INSERT_VECTOR_ELT and G_SHUFFLE_VECTOR idiom.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Src must have the same type as the element type of \p Dst
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildShuffleSplat(const DstOp &Res, const SrcOp &Src);
/// Build and insert \p Res = G_SHUFFLE_VECTOR \p Src1, \p Src2, \p Mask
///
/// \pre setBasicBlock or setMI must have been called.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildShuffleVector(const DstOp &Res, const SrcOp &Src1,
const SrcOp &Src2, ArrayRef<int> Mask);
/// Build and insert \p Res = G_CONCAT_VECTORS \p Op0, ...
///
/// G_CONCAT_VECTORS creates a vector from the concatenation of 2 or more
/// vectors.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre The entire register \p Res (and no more) must be covered by the input
/// registers.
/// \pre The type of all source operands must be identical.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildConcatVectors(const DstOp &Res,
ArrayRef<Register> Ops);
MachineInstrBuilder buildInsert(const DstOp &Res, const SrcOp &Src,
const SrcOp &Op, unsigned Index);
/// Build and insert either a G_INTRINSIC (if \p HasSideEffects is false) or
/// G_INTRINSIC_W_SIDE_EFFECTS instruction. Its first operand will be the
/// result register definition unless \p Reg is NoReg (== 0). The second
/// operand will be the intrinsic's ID.
///
/// Callers are expected to add the required definitions and uses afterwards.
///
/// \pre setBasicBlock or setMI must have been called.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildIntrinsic(Intrinsic::ID ID, ArrayRef<Register> Res,
bool HasSideEffects);
MachineInstrBuilder buildIntrinsic(Intrinsic::ID ID, ArrayRef<DstOp> Res,
bool HasSideEffects);
/// Build and insert \p Res = G_FPTRUNC \p Op
///
/// G_FPTRUNC converts a floating-point value into one with a smaller type.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with scalar or vector type.
/// \pre \p Op must be a generic virtual register with scalar or vector type.
/// \pre \p Res must be smaller than \p Op
///
/// \return The newly created instruction.
MachineInstrBuilder
buildFPTrunc(const DstOp &Res, const SrcOp &Op,
std::optional<unsigned> Flags = std::nullopt);
/// Build and insert \p Res = G_TRUNC \p Op
///
/// G_TRUNC extracts the low bits of a type. For a vector type each element is
/// truncated independently before being packed into the destination.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with scalar or vector type.
/// \pre \p Op must be a generic virtual register with scalar or vector type.
/// \pre \p Res must be smaller than \p Op
///
/// \return The newly created instruction.
MachineInstrBuilder buildTrunc(const DstOp &Res, const SrcOp &Op);
/// Build and insert a \p Res = G_ICMP \p Pred, \p Op0, \p Op1
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with scalar or
/// vector type. Typically this starts as s1 or <N x s1>.
/// \pre \p Op0 and Op1 must be generic virtual registers with the
/// same number of elements as \p Res. If \p Res is a scalar,
/// \p Op0 must be either a scalar or pointer.
/// \pre \p Pred must be an integer predicate.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildICmp(CmpInst::Predicate Pred, const DstOp &Res,
const SrcOp &Op0, const SrcOp &Op1);
/// Build and insert a \p Res = G_FCMP \p Pred\p Op0, \p Op1
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with scalar or
/// vector type. Typically this starts as s1 or <N x s1>.
/// \pre \p Op0 and Op1 must be generic virtual registers with the
/// same number of elements as \p Res (or scalar, if \p Res is
/// scalar).
/// \pre \p Pred must be a floating-point predicate.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildFCmp(CmpInst::Predicate Pred, const DstOp &Res,
const SrcOp &Op0, const SrcOp &Op1,
std::optional<unsigned> Flags = std::nullopt);
/// Build and insert a \p Res = G_IS_FPCLASS \p Pred\p Src, \p Mask
MachineInstrBuilder buildIsFPClass(const DstOp &Res, const SrcOp &Src,
unsigned Mask) {
return buildInstr(TargetOpcode::G_IS_FPCLASS, {Res},
{Src, SrcOp(static_cast<int64_t>(Mask))});
}
/// Build and insert a \p Res = G_SELECT \p Tst, \p Op0, \p Op1
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
/// with the same type.
/// \pre \p Tst must be a generic virtual register with scalar, pointer or
/// vector type. If vector then it must have the same number of
/// elements as the other parameters.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildSelect(const DstOp &Res, const SrcOp &Tst,
const SrcOp &Op0, const SrcOp &Op1,
std::optional<unsigned> Flags = std::nullopt);
/// Build and insert \p Res = G_INSERT_VECTOR_ELT \p Val,
/// \p Elt, \p Idx
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res and \p Val must be a generic virtual register
// with the same vector type.
/// \pre \p Elt and \p Idx must be a generic virtual register
/// with scalar type.
///
/// \return The newly created instruction.
MachineInstrBuilder buildInsertVectorElement(const DstOp &Res,
const SrcOp &Val,
const SrcOp &Elt,
const SrcOp &Idx);
/// Build and insert \p Res = G_EXTRACT_VECTOR_ELT \p Val, \p Idx
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with scalar type.
/// \pre \p Val must be a generic virtual register with vector type.
///
/// \return The newly created instruction.
MachineInstrBuilder buildExtractVectorElementConstant(const DstOp &Res,
const SrcOp &Val,
const int Idx) {
return buildExtractVectorElement(Res, Val,
buildConstant(LLT::scalar(64), Idx));
}
/// Build and insert \p Res = G_EXTRACT_VECTOR_ELT \p Val, \p Idx
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register with scalar type.
/// \pre \p Val must be a generic virtual register with vector type.
/// \pre \p Idx must be a generic virtual register with scalar type.
///
/// \return The newly created instruction.
MachineInstrBuilder buildExtractVectorElement(const DstOp &Res,
const SrcOp &Val,
const SrcOp &Idx);
/// Build and insert `OldValRes<def>, SuccessRes<def> =
/// G_ATOMIC_CMPXCHG_WITH_SUCCESS Addr, CmpVal, NewVal, MMO`.
///
/// Atomically replace the value at \p Addr with \p NewVal if it is currently
/// \p CmpVal otherwise leaves it unchanged. Puts the original value from \p
/// Addr in \p Res, along with an s1 indicating whether it was replaced.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p OldValRes must be a generic virtual register of scalar type.
/// \pre \p SuccessRes must be a generic virtual register of scalar type. It
/// will be assigned 0 on failure and 1 on success.
/// \pre \p Addr must be a generic virtual register with pointer type.
/// \pre \p OldValRes, \p CmpVal, and \p NewVal must be generic virtual
/// registers of the same type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder
buildAtomicCmpXchgWithSuccess(Register OldValRes, Register SuccessRes,
Register Addr, Register CmpVal, Register NewVal,
MachineMemOperand &MMO);
/// Build and insert `OldValRes<def> = G_ATOMIC_CMPXCHG Addr, CmpVal, NewVal,
/// MMO`.
///
/// Atomically replace the value at \p Addr with \p NewVal if it is currently
/// \p CmpVal otherwise leaves it unchanged. Puts the original value from \p
/// Addr in \p Res.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p OldValRes must be a generic virtual register of scalar type.
/// \pre \p Addr must be a generic virtual register with pointer type.
/// \pre \p OldValRes, \p CmpVal, and \p NewVal must be generic virtual
/// registers of the same type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAtomicCmpXchg(Register OldValRes, Register Addr,
Register CmpVal, Register NewVal,
MachineMemOperand &MMO);
/// Build and insert `OldValRes<def> = G_ATOMICRMW_<Opcode> Addr, Val, MMO`.
///
/// Atomically read-modify-update the value at \p Addr with \p Val. Puts the
/// original value from \p Addr in \p OldValRes. The modification is
/// determined by the opcode.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p OldValRes must be a generic virtual register.
/// \pre \p Addr must be a generic virtual register with pointer type.
/// \pre \p OldValRes, and \p Val must be generic virtual registers of the
/// same type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAtomicRMW(unsigned Opcode, const DstOp &OldValRes,
const SrcOp &Addr, const SrcOp &Val,
MachineMemOperand &MMO);
/// Build and insert `OldValRes<def> = G_ATOMICRMW_XCHG Addr, Val, MMO`.
///
/// Atomically replace the value at \p Addr with \p Val. Puts the original
/// value from \p Addr in \p OldValRes.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p OldValRes must be a generic virtual register.
/// \pre \p Addr must be a generic virtual register with pointer type.
/// \pre \p OldValRes, and \p Val must be generic virtual registers of the
/// same type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAtomicRMWXchg(Register OldValRes, Register Addr,
Register Val, MachineMemOperand &MMO);
/// Build and insert `OldValRes<def> = G_ATOMICRMW_ADD Addr, Val, MMO`.
///
/// Atomically replace the value at \p Addr with the addition of \p Val and
/// the original value. Puts the original value from \p Addr in \p OldValRes.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p OldValRes must be a generic virtual register.
/// \pre \p Addr must be a generic virtual register with pointer type.
/// \pre \p OldValRes, and \p Val must be generic virtual registers of the
/// same type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAtomicRMWAdd(Register OldValRes, Register Addr,
Register Val, MachineMemOperand &MMO);
/// Build and insert `OldValRes<def> = G_ATOMICRMW_SUB Addr, Val, MMO`.
///
/// Atomically replace the value at \p Addr with the subtraction of \p Val and
/// the original value. Puts the original value from \p Addr in \p OldValRes.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p OldValRes must be a generic virtual register.
/// \pre \p Addr must be a generic virtual register with pointer type.
/// \pre \p OldValRes, and \p Val must be generic virtual registers of the
/// same type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAtomicRMWSub(Register OldValRes, Register Addr,
Register Val, MachineMemOperand &MMO);
/// Build and insert `OldValRes<def> = G_ATOMICRMW_AND Addr, Val, MMO`.
///
/// Atomically replace the value at \p Addr with the bitwise and of \p Val and
/// the original value. Puts the original value from \p Addr in \p OldValRes.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p OldValRes must be a generic virtual register.
/// \pre \p Addr must be a generic virtual register with pointer type.
/// \pre \p OldValRes, and \p Val must be generic virtual registers of the
/// same type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAtomicRMWAnd(Register OldValRes, Register Addr,
Register Val, MachineMemOperand &MMO);
/// Build and insert `OldValRes<def> = G_ATOMICRMW_NAND Addr, Val, MMO`.
///
/// Atomically replace the value at \p Addr with the bitwise nand of \p Val
/// and the original value. Puts the original value from \p Addr in \p
/// OldValRes.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p OldValRes must be a generic virtual register.
/// \pre \p Addr must be a generic virtual register with pointer type.
/// \pre \p OldValRes, and \p Val must be generic virtual registers of the
/// same type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAtomicRMWNand(Register OldValRes, Register Addr,
Register Val, MachineMemOperand &MMO);
/// Build and insert `OldValRes<def> = G_ATOMICRMW_OR Addr, Val, MMO`.
///
/// Atomically replace the value at \p Addr with the bitwise or of \p Val and
/// the original value. Puts the original value from \p Addr in \p OldValRes.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p OldValRes must be a generic virtual register.
/// \pre \p Addr must be a generic virtual register with pointer type.
/// \pre \p OldValRes, and \p Val must be generic virtual registers of the
/// same type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAtomicRMWOr(Register OldValRes, Register Addr,
Register Val, MachineMemOperand &MMO);
/// Build and insert `OldValRes<def> = G_ATOMICRMW_XOR Addr, Val, MMO`.
///
/// Atomically replace the value at \p Addr with the bitwise xor of \p Val and
/// the original value. Puts the original value from \p Addr in \p OldValRes.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p OldValRes must be a generic virtual register.
/// \pre \p Addr must be a generic virtual register with pointer type.
/// \pre \p OldValRes, and \p Val must be generic virtual registers of the
/// same type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAtomicRMWXor(Register OldValRes, Register Addr,
Register Val, MachineMemOperand &MMO);
/// Build and insert `OldValRes<def> = G_ATOMICRMW_MAX Addr, Val, MMO`.
///
/// Atomically replace the value at \p Addr with the signed maximum of \p
/// Val and the original value. Puts the original value from \p Addr in \p
/// OldValRes.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p OldValRes must be a generic virtual register.
/// \pre \p Addr must be a generic virtual register with pointer type.
/// \pre \p OldValRes, and \p Val must be generic virtual registers of the
/// same type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAtomicRMWMax(Register OldValRes, Register Addr,
Register Val, MachineMemOperand &MMO);
/// Build and insert `OldValRes<def> = G_ATOMICRMW_MIN Addr, Val, MMO`.
///
/// Atomically replace the value at \p Addr with the signed minimum of \p
/// Val and the original value. Puts the original value from \p Addr in \p
/// OldValRes.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p OldValRes must be a generic virtual register.
/// \pre \p Addr must be a generic virtual register with pointer type.
/// \pre \p OldValRes, and \p Val must be generic virtual registers of the
/// same type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAtomicRMWMin(Register OldValRes, Register Addr,
Register Val, MachineMemOperand &MMO);
/// Build and insert `OldValRes<def> = G_ATOMICRMW_UMAX Addr, Val, MMO`.
///
/// Atomically replace the value at \p Addr with the unsigned maximum of \p
/// Val and the original value. Puts the original value from \p Addr in \p
/// OldValRes.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p OldValRes must be a generic virtual register.
/// \pre \p Addr must be a generic virtual register with pointer type.
/// \pre \p OldValRes, and \p Val must be generic virtual registers of the
/// same type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAtomicRMWUmax(Register OldValRes, Register Addr,
Register Val, MachineMemOperand &MMO);
/// Build and insert `OldValRes<def> = G_ATOMICRMW_UMIN Addr, Val, MMO`.
///
/// Atomically replace the value at \p Addr with the unsigned minimum of \p
/// Val and the original value. Puts the original value from \p Addr in \p
/// OldValRes.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p OldValRes must be a generic virtual register.
/// \pre \p Addr must be a generic virtual register with pointer type.
/// \pre \p OldValRes, and \p Val must be generic virtual registers of the
/// same type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAtomicRMWUmin(Register OldValRes, Register Addr,
Register Val, MachineMemOperand &MMO);
/// Build and insert `OldValRes<def> = G_ATOMICRMW_FADD Addr, Val, MMO`.
MachineInstrBuilder buildAtomicRMWFAdd(
const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val,
MachineMemOperand &MMO);
/// Build and insert `OldValRes<def> = G_ATOMICRMW_FSUB Addr, Val, MMO`.
MachineInstrBuilder buildAtomicRMWFSub(
const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val,
MachineMemOperand &MMO);
/// Build and insert `OldValRes<def> = G_ATOMICRMW_FMAX Addr, Val, MMO`.
///
/// Atomically replace the value at \p Addr with the floating point maximum of
/// \p Val and the original value. Puts the original value from \p Addr in \p
/// OldValRes.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p OldValRes must be a generic virtual register.
/// \pre \p Addr must be a generic virtual register with pointer type.
/// \pre \p OldValRes, and \p Val must be generic virtual registers of the
/// same type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAtomicRMWFMax(
const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val,
MachineMemOperand &MMO);
/// Build and insert `OldValRes<def> = G_ATOMICRMW_FMIN Addr, Val, MMO`.
///
/// Atomically replace the value at \p Addr with the floating point minimum of
/// \p Val and the original value. Puts the original value from \p Addr in \p
/// OldValRes.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p OldValRes must be a generic virtual register.
/// \pre \p Addr must be a generic virtual register with pointer type.
/// \pre \p OldValRes, and \p Val must be generic virtual registers of the
/// same type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAtomicRMWFMin(
const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val,
MachineMemOperand &MMO);
/// Build and insert `G_FENCE Ordering, Scope`.
MachineInstrBuilder buildFence(unsigned Ordering, unsigned Scope);
/// Build and insert \p Dst = G_FREEZE \p Src
MachineInstrBuilder buildFreeze(const DstOp &Dst, const SrcOp &Src) {
return buildInstr(TargetOpcode::G_FREEZE, {Dst}, {Src});
}
/// Build and insert \p Res = G_BLOCK_ADDR \p BA
///
/// G_BLOCK_ADDR computes the address of a basic block.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res must be a generic virtual register of a pointer type.
///
/// \return The newly created instruction.
MachineInstrBuilder buildBlockAddress(Register Res, const BlockAddress *BA);
/// Build and insert \p Res = G_ADD \p Op0, \p Op1
///
/// G_ADD sets \p Res to the sum of integer parameters \p Op0 and \p Op1,
/// truncated to their width.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
/// with the same (scalar or vector) type).
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAdd(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_ADD, {Dst}, {Src0, Src1}, Flags);
}
/// Build and insert \p Res = G_SUB \p Op0, \p Op1
///
/// G_SUB sets \p Res to the difference of integer parameters \p Op0 and
/// \p Op1, truncated to their width.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
/// with the same (scalar or vector) type).
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildSub(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_SUB, {Dst}, {Src0, Src1}, Flags);
}
/// Build and insert \p Res = G_MUL \p Op0, \p Op1
///
/// G_MUL sets \p Res to the product of integer parameters \p Op0 and \p Op1,
/// truncated to their width.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
/// with the same (scalar or vector) type).
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildMul(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_MUL, {Dst}, {Src0, Src1}, Flags);
}
MachineInstrBuilder buildUMulH(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_UMULH, {Dst}, {Src0, Src1}, Flags);
}
MachineInstrBuilder buildSMulH(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_SMULH, {Dst}, {Src0, Src1}, Flags);
}
/// Build and insert \p Res = G_UREM \p Op0, \p Op1
MachineInstrBuilder buildURem(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_UREM, {Dst}, {Src0, Src1}, Flags);
}
MachineInstrBuilder buildFMul(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FMUL, {Dst}, {Src0, Src1}, Flags);
}
MachineInstrBuilder
buildFMinNum(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FMINNUM, {Dst}, {Src0, Src1}, Flags);
}
MachineInstrBuilder
buildFMaxNum(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FMAXNUM, {Dst}, {Src0, Src1}, Flags);
}
MachineInstrBuilder
buildFMinNumIEEE(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FMINNUM_IEEE, {Dst}, {Src0, Src1}, Flags);
}
MachineInstrBuilder
buildFMaxNumIEEE(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FMAXNUM_IEEE, {Dst}, {Src0, Src1}, Flags);
}
MachineInstrBuilder buildShl(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_SHL, {Dst}, {Src0, Src1}, Flags);
}
MachineInstrBuilder buildLShr(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_LSHR, {Dst}, {Src0, Src1}, Flags);
}
MachineInstrBuilder buildAShr(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_ASHR, {Dst}, {Src0, Src1}, Flags);
}
/// Build and insert \p Res = G_AND \p Op0, \p Op1
///
/// G_AND sets \p Res to the bitwise and of integer parameters \p Op0 and \p
/// Op1.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
/// with the same (scalar or vector) type).
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildAnd(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1) {
return buildInstr(TargetOpcode::G_AND, {Dst}, {Src0, Src1});
}
/// Build and insert \p Res = G_OR \p Op0, \p Op1
///
/// G_OR sets \p Res to the bitwise or of integer parameters \p Op0 and \p
/// Op1.
///
/// \pre setBasicBlock or setMI must have been called.
/// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
/// with the same (scalar or vector) type).
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildOr(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_OR, {Dst}, {Src0, Src1}, Flags);
}
/// Build and insert \p Res = G_XOR \p Op0, \p Op1
MachineInstrBuilder buildXor(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1) {
return buildInstr(TargetOpcode::G_XOR, {Dst}, {Src0, Src1});
}
/// Build and insert a bitwise not,
/// \p NegOne = G_CONSTANT -1
/// \p Res = G_OR \p Op0, NegOne
MachineInstrBuilder buildNot(const DstOp &Dst, const SrcOp &Src0) {
auto NegOne = buildConstant(Dst.getLLTTy(*getMRI()), -1);
return buildInstr(TargetOpcode::G_XOR, {Dst}, {Src0, NegOne});
}
/// Build and insert integer negation
/// \p Zero = G_CONSTANT 0
/// \p Res = G_SUB Zero, \p Op0
MachineInstrBuilder buildNeg(const DstOp &Dst, const SrcOp &Src0) {
auto Zero = buildConstant(Dst.getLLTTy(*getMRI()), 0);
return buildInstr(TargetOpcode::G_SUB, {Dst}, {Zero, Src0});
}
/// Build and insert \p Res = G_CTPOP \p Op0, \p Src0
MachineInstrBuilder buildCTPOP(const DstOp &Dst, const SrcOp &Src0) {
return buildInstr(TargetOpcode::G_CTPOP, {Dst}, {Src0});
}
/// Build and insert \p Res = G_CTLZ \p Op0, \p Src0
MachineInstrBuilder buildCTLZ(const DstOp &Dst, const SrcOp &Src0) {
return buildInstr(TargetOpcode::G_CTLZ, {Dst}, {Src0});
}
/// Build and insert \p Res = G_CTLZ_ZERO_UNDEF \p Op0, \p Src0
MachineInstrBuilder buildCTLZ_ZERO_UNDEF(const DstOp &Dst, const SrcOp &Src0) {
return buildInstr(TargetOpcode::G_CTLZ_ZERO_UNDEF, {Dst}, {Src0});
}
/// Build and insert \p Res = G_CTTZ \p Op0, \p Src0
MachineInstrBuilder buildCTTZ(const DstOp &Dst, const SrcOp &Src0) {
return buildInstr(TargetOpcode::G_CTTZ, {Dst}, {Src0});
}
/// Build and insert \p Res = G_CTTZ_ZERO_UNDEF \p Op0, \p Src0
MachineInstrBuilder buildCTTZ_ZERO_UNDEF(const DstOp &Dst, const SrcOp &Src0) {
return buildInstr(TargetOpcode::G_CTTZ_ZERO_UNDEF, {Dst}, {Src0});
}
/// Build and insert \p Dst = G_BSWAP \p Src0
MachineInstrBuilder buildBSwap(const DstOp &Dst, const SrcOp &Src0) {
return buildInstr(TargetOpcode::G_BSWAP, {Dst}, {Src0});
}
/// Build and insert \p Res = G_FADD \p Op0, \p Op1
MachineInstrBuilder buildFAdd(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FADD, {Dst}, {Src0, Src1}, Flags);
}
/// Build and insert \p Res = G_STRICT_FADD \p Op0, \p Op1
MachineInstrBuilder
buildStrictFAdd(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_STRICT_FADD, {Dst}, {Src0, Src1}, Flags);
}
/// Build and insert \p Res = G_FSUB \p Op0, \p Op1
MachineInstrBuilder buildFSub(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FSUB, {Dst}, {Src0, Src1}, Flags);
}
/// Build and insert \p Res = G_FDIV \p Op0, \p Op1
MachineInstrBuilder buildFDiv(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FDIV, {Dst}, {Src0, Src1}, Flags);
}
/// Build and insert \p Res = G_FMA \p Op0, \p Op1, \p Op2
MachineInstrBuilder buildFMA(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1, const SrcOp &Src2,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FMA, {Dst}, {Src0, Src1, Src2}, Flags);
}
/// Build and insert \p Res = G_FMAD \p Op0, \p Op1, \p Op2
MachineInstrBuilder buildFMAD(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1, const SrcOp &Src2,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FMAD, {Dst}, {Src0, Src1, Src2}, Flags);
}
/// Build and insert \p Res = G_FNEG \p Op0
MachineInstrBuilder buildFNeg(const DstOp &Dst, const SrcOp &Src0,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FNEG, {Dst}, {Src0}, Flags);
}
/// Build and insert \p Res = G_FABS \p Op0
MachineInstrBuilder buildFAbs(const DstOp &Dst, const SrcOp &Src0,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FABS, {Dst}, {Src0}, Flags);
}
/// Build and insert \p Dst = G_FCANONICALIZE \p Src0
MachineInstrBuilder
buildFCanonicalize(const DstOp &Dst, const SrcOp &Src0,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FCANONICALIZE, {Dst}, {Src0}, Flags);
}
/// Build and insert \p Dst = G_INTRINSIC_TRUNC \p Src0
MachineInstrBuilder
buildIntrinsicTrunc(const DstOp &Dst, const SrcOp &Src0,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_INTRINSIC_TRUNC, {Dst}, {Src0}, Flags);
}
/// Build and insert \p Res = GFFLOOR \p Op0, \p Op1
MachineInstrBuilder
buildFFloor(const DstOp &Dst, const SrcOp &Src0,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FFLOOR, {Dst}, {Src0}, Flags);
}
/// Build and insert \p Dst = G_FLOG \p Src
MachineInstrBuilder buildFLog(const DstOp &Dst, const SrcOp &Src,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FLOG, {Dst}, {Src}, Flags);
}
/// Build and insert \p Dst = G_FLOG2 \p Src
MachineInstrBuilder buildFLog2(const DstOp &Dst, const SrcOp &Src,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FLOG2, {Dst}, {Src}, Flags);
}
/// Build and insert \p Dst = G_FEXP2 \p Src
MachineInstrBuilder buildFExp2(const DstOp &Dst, const SrcOp &Src,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FEXP2, {Dst}, {Src}, Flags);
}
/// Build and insert \p Dst = G_FPOW \p Src0, \p Src1
MachineInstrBuilder buildFPow(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FPOW, {Dst}, {Src0, Src1}, Flags);
}
/// Build and insert \p Dst = G_FLDEXP \p Src0, \p Src1
MachineInstrBuilder
buildFLdexp(const DstOp &Dst, const SrcOp &Src0, const SrcOp &Src1,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FLDEXP, {Dst}, {Src0, Src1}, Flags);
}
/// Build and insert \p Fract, \p Exp = G_FFREXP \p Src
MachineInstrBuilder
buildFFrexp(const DstOp &Fract, const DstOp &Exp, const SrcOp &Src,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FFREXP, {Fract, Exp}, {Src}, Flags);
}
/// Build and insert \p Res = G_FCOPYSIGN \p Op0, \p Op1
MachineInstrBuilder buildFCopysign(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1) {
return buildInstr(TargetOpcode::G_FCOPYSIGN, {Dst}, {Src0, Src1});
}
/// Build and insert \p Res = G_UITOFP \p Src0
MachineInstrBuilder buildUITOFP(const DstOp &Dst, const SrcOp &Src0) {
return buildInstr(TargetOpcode::G_UITOFP, {Dst}, {Src0});
}
/// Build and insert \p Res = G_SITOFP \p Src0
MachineInstrBuilder buildSITOFP(const DstOp &Dst, const SrcOp &Src0) {
return buildInstr(TargetOpcode::G_SITOFP, {Dst}, {Src0});
}
/// Build and insert \p Res = G_FPTOUI \p Src0
MachineInstrBuilder buildFPTOUI(const DstOp &Dst, const SrcOp &Src0) {
return buildInstr(TargetOpcode::G_FPTOUI, {Dst}, {Src0});
}
/// Build and insert \p Res = G_FPTOSI \p Src0
MachineInstrBuilder buildFPTOSI(const DstOp &Dst, const SrcOp &Src0) {
return buildInstr(TargetOpcode::G_FPTOSI, {Dst}, {Src0});
}
/// Build and insert \p Dst = G_FRINT \p Src0, \p Src1
MachineInstrBuilder buildFRint(const DstOp &Dst, const SrcOp &Src0,
std::optional<unsigned> Flags = std::nullopt) {
return buildInstr(TargetOpcode::G_FRINT, {Dst}, {Src0}, Flags);
}
/// Build and insert \p Res = G_SMIN \p Op0, \p Op1
MachineInstrBuilder buildSMin(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1) {
return buildInstr(TargetOpcode::G_SMIN, {Dst}, {Src0, Src1});
}
/// Build and insert \p Res = G_SMAX \p Op0, \p Op1
MachineInstrBuilder buildSMax(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1) {
return buildInstr(TargetOpcode::G_SMAX, {Dst}, {Src0, Src1});
}
/// Build and insert \p Res = G_UMIN \p Op0, \p Op1
MachineInstrBuilder buildUMin(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1) {
return buildInstr(TargetOpcode::G_UMIN, {Dst}, {Src0, Src1});
}
/// Build and insert \p Res = G_UMAX \p Op0, \p Op1
MachineInstrBuilder buildUMax(const DstOp &Dst, const SrcOp &Src0,
const SrcOp &Src1) {
return buildInstr(TargetOpcode::G_UMAX, {Dst}, {Src0, Src1});
}
/// Build and insert \p Dst = G_ABS \p Src
MachineInstrBuilder buildAbs(const DstOp &Dst, const SrcOp &Src) {
return buildInstr(TargetOpcode::G_ABS, {Dst}, {Src});
}
/// Build and insert \p Res = G_JUMP_TABLE \p JTI
///
/// G_JUMP_TABLE sets \p Res to the address of the jump table specified by
/// the jump table index \p JTI.
///
/// \return a MachineInstrBuilder for the newly created instruction.
MachineInstrBuilder buildJumpTable(const LLT PtrTy, unsigned JTI);
/// Build and insert \p Res = G_VECREDUCE_SEQ_FADD \p ScalarIn, \p VecIn
///
/// \p ScalarIn is the scalar accumulator input to start the sequential
/// reduction operation of \p VecIn.
MachineInstrBuilder buildVecReduceSeqFAdd(const DstOp &Dst,
const SrcOp &ScalarIn,
const SrcOp &VecIn) {
return buildInstr(TargetOpcode::G_VECREDUCE_SEQ_FADD, {Dst},
{ScalarIn, {VecIn}});
}
/// Build and insert \p Res = G_VECREDUCE_SEQ_FMUL \p ScalarIn, \p VecIn
///
/// \p ScalarIn is the scalar accumulator input to start the sequential
/// reduction operation of \p VecIn.
MachineInstrBuilder buildVecReduceSeqFMul(const DstOp &Dst,
const SrcOp &ScalarIn,
const SrcOp &VecIn) {
return buildInstr(TargetOpcode::G_VECREDUCE_SEQ_FMUL, {Dst},
{ScalarIn, {VecIn}});
}
/// Build and insert \p Res = G_VECREDUCE_FADD \p Src
///
/// \p ScalarIn is the scalar accumulator input to the reduction operation of
/// \p VecIn.
MachineInstrBuilder buildVecReduceFAdd(const DstOp &Dst,
const SrcOp &ScalarIn,
const SrcOp &VecIn) {
return buildInstr(TargetOpcode::G_VECREDUCE_FADD, {Dst}, {ScalarIn, VecIn});
}
/// Build and insert \p Res = G_VECREDUCE_FMUL \p Src
///
/// \p ScalarIn is the scalar accumulator input to the reduction operation of
/// \p VecIn.
MachineInstrBuilder buildVecReduceFMul(const DstOp &Dst,
const SrcOp &ScalarIn,
const SrcOp &VecIn) {
return buildInstr(TargetOpcode::G_VECREDUCE_FMUL, {Dst}, {ScalarIn, VecIn});
}
/// Build and insert \p Res = G_VECREDUCE_FMAX \p Src
MachineInstrBuilder buildVecReduceFMax(const DstOp &Dst, const SrcOp &Src) {
return buildInstr(TargetOpcode::G_VECREDUCE_FMAX, {Dst}, {Src});
}
/// Build and insert \p Res = G_VECREDUCE_FMIN \p Src
MachineInstrBuilder buildVecReduceFMin(const DstOp &Dst, const SrcOp &Src) {
return buildInstr(TargetOpcode::G_VECREDUCE_FMIN, {Dst}, {Src});
}
/// Build and insert \p Res = G_VECREDUCE_ADD \p Src
MachineInstrBuilder buildVecReduceAdd(const DstOp &Dst, const SrcOp &Src) {
return buildInstr(TargetOpcode::G_VECREDUCE_ADD, {Dst}, {Src});
}
/// Build and insert \p Res = G_VECREDUCE_MUL \p Src
MachineInstrBuilder buildVecReduceMul(const DstOp &Dst, const SrcOp &Src) {
return buildInstr(TargetOpcode::G_VECREDUCE_MUL, {Dst}, {Src});
}
/// Build and insert \p Res = G_VECREDUCE_AND \p Src
MachineInstrBuilder buildVecReduceAnd(const DstOp &Dst, const SrcOp &Src) {
return buildInstr(TargetOpcode::G_VECREDUCE_AND, {Dst}, {Src});
}
/// Build and insert \p Res = G_VECREDUCE_OR \p Src
MachineInstrBuilder buildVecReduceOr(const DstOp &Dst, const SrcOp &Src) {
return buildInstr(TargetOpcode::G_VECREDUCE_OR, {Dst}, {Src});
}
/// Build and insert \p Res = G_VECREDUCE_XOR \p Src
MachineInstrBuilder buildVecReduceXor(const DstOp &Dst, const SrcOp &Src) {
return buildInstr(TargetOpcode::G_VECREDUCE_XOR, {Dst}, {Src});
}
/// Build and insert \p Res = G_VECREDUCE_SMAX \p Src
MachineInstrBuilder buildVecReduceSMax(const DstOp &Dst, const SrcOp &Src) {
return buildInstr(TargetOpcode::G_VECREDUCE_SMAX, {Dst}, {Src});
}
/// Build and insert \p Res = G_VECREDUCE_SMIN \p Src
MachineInstrBuilder buildVecReduceSMin(const DstOp &Dst, const SrcOp &Src) {
return buildInstr(TargetOpcode::G_VECREDUCE_SMIN, {Dst}, {Src});
}
/// Build and insert \p Res = G_VECREDUCE_UMAX \p Src
MachineInstrBuilder buildVecReduceUMax(const DstOp &Dst, const SrcOp &Src) {
return buildInstr(TargetOpcode::G_VECREDUCE_UMAX, {Dst}, {Src});
}
/// Build and insert \p Res = G_VECREDUCE_UMIN \p Src
MachineInstrBuilder buildVecReduceUMin(const DstOp &Dst, const SrcOp &Src) {
return buildInstr(TargetOpcode::G_VECREDUCE_UMIN, {Dst}, {Src});
}
/// Build and insert G_MEMCPY or G_MEMMOVE
MachineInstrBuilder buildMemTransferInst(unsigned Opcode, const SrcOp &DstPtr,
const SrcOp &SrcPtr,
const SrcOp &Size,
MachineMemOperand &DstMMO,
MachineMemOperand &SrcMMO) {
auto MIB = buildInstr(
Opcode, {}, {DstPtr, SrcPtr, Size, SrcOp(INT64_C(0) /*isTailCall*/)});
MIB.addMemOperand(&DstMMO);
MIB.addMemOperand(&SrcMMO);
return MIB;
}
MachineInstrBuilder buildMemCpy(const SrcOp &DstPtr, const SrcOp &SrcPtr,
const SrcOp &Size, MachineMemOperand &DstMMO,
MachineMemOperand &SrcMMO) {
return buildMemTransferInst(TargetOpcode::G_MEMCPY, DstPtr, SrcPtr, Size,
DstMMO, SrcMMO);
}
/// Build and insert \p Dst = G_SBFX \p Src, \p LSB, \p Width.
MachineInstrBuilder buildSbfx(const DstOp &Dst, const SrcOp &Src,
const SrcOp &LSB, const SrcOp &Width) {
return buildInstr(TargetOpcode::G_SBFX, {Dst}, {Src, LSB, Width});
}
/// Build and insert \p Dst = G_UBFX \p Src, \p LSB, \p Width.
MachineInstrBuilder buildUbfx(const DstOp &Dst, const SrcOp &Src,
const SrcOp &LSB, const SrcOp &Width) {
return buildInstr(TargetOpcode::G_UBFX, {Dst}, {Src, LSB, Width});
}
/// Build and insert \p Dst = G_ROTR \p Src, \p Amt
MachineInstrBuilder buildRotateRight(const DstOp &Dst, const SrcOp &Src,
const SrcOp &Amt) {
return buildInstr(TargetOpcode::G_ROTR, {Dst}, {Src, Amt});
}
/// Build and insert \p Dst = G_ROTL \p Src, \p Amt
MachineInstrBuilder buildRotateLeft(const DstOp &Dst, const SrcOp &Src,
const SrcOp &Amt) {
return buildInstr(TargetOpcode::G_ROTL, {Dst}, {Src, Amt});
}
/// Build and insert \p Dst = G_BITREVERSE \p Src
MachineInstrBuilder buildBitReverse(const DstOp &Dst, const SrcOp &Src) {
return buildInstr(TargetOpcode::G_BITREVERSE, {Dst}, {Src});
}
virtual MachineInstrBuilder
buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps, ArrayRef<SrcOp> SrcOps,
std::optional<unsigned> Flags = std::nullopt);
};
} // End namespace llvm.
#endif // LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H
PK iwFZ�
�qe qe " CodeGen/GlobalISel/RegBankSelect.hnu �[��� //=- llvm/CodeGen/GlobalISel/RegBankSelect.h - Reg Bank Selector --*- C++ -*-=//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file
/// This file describes the interface of the MachineFunctionPass
/// responsible for assigning the generic virtual registers to register bank.
///
/// By default, the reg bank selector relies on local decisions to
/// assign the register bank. In other words, it looks at one instruction
/// at a time to decide where the operand of that instruction should live.
///
/// At higher optimization level, we could imagine that the reg bank selector
/// would use more global analysis and do crazier thing like duplicating
/// instructions and so on. This is future work.
///
/// For now, the pass uses a greedy algorithm to decide where the operand
/// of an instruction should live. It asks the target which banks may be
/// used for each operand of the instruction and what is the cost. Then,
/// it chooses the solution which minimize the cost of the instruction plus
/// the cost of any move that may be needed to the values into the right
/// register bank.
/// In other words, the cost for an instruction on a register bank RegBank
/// is: Cost of I on RegBank plus the sum of the cost for bringing the
/// input operands from their current register bank to RegBank.
/// Thus, the following formula:
/// cost(I, RegBank) = cost(I.Opcode, RegBank) +
/// sum(for each arg in I.arguments: costCrossCopy(arg.RegBank, RegBank))
///
/// E.g., Let say we are assigning the register bank for the instruction
/// defining v2.
/// v0(A_REGBANK) = ...
/// v1(A_REGBANK) = ...
/// v2 = G_ADD i32 v0, v1 <-- MI
///
/// The target may say it can generate G_ADD i32 on register bank A and B
/// with a cost of respectively 5 and 1.
/// Then, let say the cost of a cross register bank copies from A to B is 1.
/// The reg bank selector would compare the following two costs:
/// cost(MI, A_REGBANK) = cost(G_ADD, A_REGBANK) + cost(v0.RegBank, A_REGBANK) +
/// cost(v1.RegBank, A_REGBANK)
/// = 5 + cost(A_REGBANK, A_REGBANK) + cost(A_REGBANK,
/// A_REGBANK)
/// = 5 + 0 + 0 = 5
/// cost(MI, B_REGBANK) = cost(G_ADD, B_REGBANK) + cost(v0.RegBank, B_REGBANK) +
/// cost(v1.RegBank, B_REGBANK)
/// = 1 + cost(A_REGBANK, B_REGBANK) + cost(A_REGBANK,
/// B_REGBANK)
/// = 1 + 1 + 1 = 3
/// Therefore, in this specific example, the reg bank selector would choose
/// bank B for MI.
/// v0(A_REGBANK) = ...
/// v1(A_REGBANK) = ...
/// tmp0(B_REGBANK) = COPY v0
/// tmp1(B_REGBANK) = COPY v1
/// v2(B_REGBANK) = G_ADD i32 tmp0, tmp1
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_REGBANKSELECT_H
#define LLVM_CODEGEN_GLOBALISEL_REGBANKSELECT_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
#include "llvm/CodeGen/RegisterBankInfo.h"
#include <cassert>
#include <cstdint>
#include <memory>
namespace llvm {
class BlockFrequency;
class MachineBlockFrequencyInfo;
class MachineBranchProbabilityInfo;
class MachineOperand;
class MachineRegisterInfo;
class Pass;
class raw_ostream;
class TargetPassConfig;
class TargetRegisterInfo;
/// This pass implements the reg bank selector pass used in the GlobalISel
/// pipeline. At the end of this pass, all register operands have been assigned
class RegBankSelect : public MachineFunctionPass {
public:
static char ID;
/// List of the modes supported by the RegBankSelect pass.
enum Mode {
/// Assign the register banks as fast as possible (default).
Fast,
/// Greedily minimize the cost of assigning register banks.
/// This should produce code of greater quality, but will
/// require more compile time.
Greedy
};
/// Abstract class used to represent an insertion point in a CFG.
/// This class records an insertion point and materializes it on
/// demand.
/// It allows to reason about the frequency of this insertion point,
/// without having to logically materialize it (e.g., on an edge),
/// before we actually need to insert something.
class InsertPoint {
protected:
/// Tell if the insert point has already been materialized.
bool WasMaterialized = false;
/// Materialize the insertion point.
///
/// If isSplit() is true, this involves actually splitting
/// the block or edge.
///
/// \post getPointImpl() returns a valid iterator.
/// \post getInsertMBBImpl() returns a valid basic block.
/// \post isSplit() == false ; no more splitting should be required.
virtual void materialize() = 0;
/// Return the materialized insertion basic block.
/// Code will be inserted into that basic block.
///
/// \pre ::materialize has been called.
virtual MachineBasicBlock &getInsertMBBImpl() = 0;
/// Return the materialized insertion point.
/// Code will be inserted before that point.
///
/// \pre ::materialize has been called.
virtual MachineBasicBlock::iterator getPointImpl() = 0;
public:
virtual ~InsertPoint() = default;
/// The first call to this method will cause the splitting to
/// happen if need be, then sub sequent calls just return
/// the iterator to that point. I.e., no more splitting will
/// occur.
///
/// \return The iterator that should be used with
/// MachineBasicBlock::insert. I.e., additional code happens
/// before that point.
MachineBasicBlock::iterator getPoint() {
if (!WasMaterialized) {
WasMaterialized = true;
assert(canMaterialize() && "Impossible to materialize this point");
materialize();
}
// When we materialized the point we should have done the splitting.
assert(!isSplit() && "Wrong pre-condition");
return getPointImpl();
}
/// The first call to this method will cause the splitting to
/// happen if need be, then sub sequent calls just return
/// the basic block that contains the insertion point.
/// I.e., no more splitting will occur.
///
/// \return The basic block should be used with
/// MachineBasicBlock::insert and ::getPoint. The new code should
/// happen before that point.
MachineBasicBlock &getInsertMBB() {
if (!WasMaterialized) {
WasMaterialized = true;
assert(canMaterialize() && "Impossible to materialize this point");
materialize();
}
// When we materialized the point we should have done the splitting.
assert(!isSplit() && "Wrong pre-condition");
return getInsertMBBImpl();
}
/// Insert \p MI in the just before ::getPoint()
MachineBasicBlock::iterator insert(MachineInstr &MI) {
return getInsertMBB().insert(getPoint(), &MI);
}
/// Does this point involve splitting an edge or block?
/// As soon as ::getPoint is called and thus, the point
/// materialized, the point will not require splitting anymore,
/// i.e., this will return false.
virtual bool isSplit() const { return false; }
/// Frequency of the insertion point.
/// \p P is used to access the various analysis that will help to
/// get that information, like MachineBlockFrequencyInfo. If \p P
/// does not contain enough enough to return the actual frequency,
/// this returns 1.
virtual uint64_t frequency(const Pass &P) const { return 1; }
/// Check whether this insertion point can be materialized.
/// As soon as ::getPoint is called and thus, the point materialized
/// calling this method does not make sense.
virtual bool canMaterialize() const { return false; }
};
/// Insertion point before or after an instruction.
class InstrInsertPoint : public InsertPoint {
private:
/// Insertion point.
MachineInstr &Instr;
/// Does the insertion point is before or after Instr.
bool Before;
void materialize() override;
MachineBasicBlock::iterator getPointImpl() override {
if (Before)
return Instr;
return Instr.getNextNode() ? *Instr.getNextNode()
: Instr.getParent()->end();
}
MachineBasicBlock &getInsertMBBImpl() override {
return *Instr.getParent();
}
public:
/// Create an insertion point before (\p Before=true) or after \p Instr.
InstrInsertPoint(MachineInstr &Instr, bool Before = true);
bool isSplit() const override;
uint64_t frequency(const Pass &P) const override;
// Worst case, we need to slice the basic block, but that is still doable.
bool canMaterialize() const override { return true; }
};
/// Insertion point at the beginning or end of a basic block.
class MBBInsertPoint : public InsertPoint {
private:
/// Insertion point.
MachineBasicBlock &MBB;
/// Does the insertion point is at the beginning or end of MBB.
bool Beginning;
void materialize() override { /*Nothing to do to materialize*/
}
MachineBasicBlock::iterator getPointImpl() override {
return Beginning ? MBB.begin() : MBB.end();
}
MachineBasicBlock &getInsertMBBImpl() override { return MBB; }
public:
MBBInsertPoint(MachineBasicBlock &MBB, bool Beginning = true)
: MBB(MBB), Beginning(Beginning) {
// If we try to insert before phis, we should use the insertion
// points on the incoming edges.
assert((!Beginning || MBB.getFirstNonPHI() == MBB.begin()) &&
"Invalid beginning point");
// If we try to insert after the terminators, we should use the
// points on the outcoming edges.
assert((Beginning || MBB.getFirstTerminator() == MBB.end()) &&
"Invalid end point");
}
bool isSplit() const override { return false; }
uint64_t frequency(const Pass &P) const override;
bool canMaterialize() const override { return true; };
};
/// Insertion point on an edge.
class EdgeInsertPoint : public InsertPoint {
private:
/// Source of the edge.
MachineBasicBlock &Src;
/// Destination of the edge.
/// After the materialization is done, this hold the basic block
/// that resulted from the splitting.
MachineBasicBlock *DstOrSplit;
/// P is used to update the analysis passes as applicable.
Pass &P;
void materialize() override;
MachineBasicBlock::iterator getPointImpl() override {
// DstOrSplit should be the Split block at this point.
// I.e., it should have one predecessor, Src, and one successor,
// the original Dst.
assert(DstOrSplit && DstOrSplit->isPredecessor(&Src) &&
DstOrSplit->pred_size() == 1 && DstOrSplit->succ_size() == 1 &&
"Did not split?!");
return DstOrSplit->begin();
}
MachineBasicBlock &getInsertMBBImpl() override { return *DstOrSplit; }
public:
EdgeInsertPoint(MachineBasicBlock &Src, MachineBasicBlock &Dst, Pass &P)
: Src(Src), DstOrSplit(&Dst), P(P) {}
bool isSplit() const override {
return Src.succ_size() > 1 && DstOrSplit->pred_size() > 1;
}
uint64_t frequency(const Pass &P) const override;
bool canMaterialize() const override;
};
/// Struct used to represent the placement of a repairing point for
/// a given operand.
class RepairingPlacement {
public:
/// Define the kind of action this repairing needs.
enum RepairingKind {
/// Nothing to repair, just drop this action.
None,
/// Reparing code needs to happen before InsertPoints.
Insert,
/// (Re)assign the register bank of the operand.
Reassign,
/// Mark this repairing placement as impossible.
Impossible
};
/// \name Convenient types for a list of insertion points.
/// @{
using InsertionPoints = SmallVector<std::unique_ptr<InsertPoint>, 2>;
using insertpt_iterator = InsertionPoints::iterator;
using const_insertpt_iterator = InsertionPoints::const_iterator;
/// @}
private:
/// Kind of repairing.
RepairingKind Kind;
/// Index of the operand that will be repaired.
unsigned OpIdx;
/// Are all the insert points materializeable?
bool CanMaterialize;
/// Is there any of the insert points needing splitting?
bool HasSplit = false;
/// Insertion point for the repair code.
/// The repairing code needs to happen just before these points.
InsertionPoints InsertPoints;
/// Some insertion points may need to update the liveness and such.
Pass &P;
public:
/// Create a repairing placement for the \p OpIdx-th operand of
/// \p MI. \p TRI is used to make some checks on the register aliases
/// if the machine operand is a physical register. \p P is used to
/// to update liveness information and such when materializing the
/// points.
RepairingPlacement(MachineInstr &MI, unsigned OpIdx,
const TargetRegisterInfo &TRI, Pass &P,
RepairingKind Kind = RepairingKind::Insert);
/// \name Getters.
/// @{
RepairingKind getKind() const { return Kind; }
unsigned getOpIdx() const { return OpIdx; }
bool canMaterialize() const { return CanMaterialize; }
bool hasSplit() { return HasSplit; }
/// @}
/// \name Overloaded methods to add an insertion point.
/// @{
/// Add a MBBInsertionPoint to the list of InsertPoints.
void addInsertPoint(MachineBasicBlock &MBB, bool Beginning);
/// Add a InstrInsertionPoint to the list of InsertPoints.
void addInsertPoint(MachineInstr &MI, bool Before);
/// Add an EdgeInsertionPoint (\p Src, \p Dst) to the list of InsertPoints.
void addInsertPoint(MachineBasicBlock &Src, MachineBasicBlock &Dst);
/// Add an InsertPoint to the list of insert points.
/// This method takes the ownership of &\p Point.
void addInsertPoint(InsertPoint &Point);
/// @}
/// \name Accessors related to the insertion points.
/// @{
insertpt_iterator begin() { return InsertPoints.begin(); }
insertpt_iterator end() { return InsertPoints.end(); }
const_insertpt_iterator begin() const { return InsertPoints.begin(); }
const_insertpt_iterator end() const { return InsertPoints.end(); }
unsigned getNumInsertPoints() const { return InsertPoints.size(); }
/// @}
/// Change the type of this repairing placement to \p NewKind.
/// It is not possible to switch a repairing placement to the
/// RepairingKind::Insert. There is no fundamental problem with
/// that, but no uses as well, so do not support it for now.
///
/// \pre NewKind != RepairingKind::Insert
/// \post getKind() == NewKind
void switchTo(RepairingKind NewKind) {
assert(NewKind != Kind && "Already of the right Kind");
Kind = NewKind;
InsertPoints.clear();
CanMaterialize = NewKind != RepairingKind::Impossible;
HasSplit = false;
assert(NewKind != RepairingKind::Insert &&
"We would need more MI to switch to Insert");
}
};
protected:
/// Helper class used to represent the cost for mapping an instruction.
/// When mapping an instruction, we may introduce some repairing code.
/// In most cases, the repairing code is local to the instruction,
/// thus, we can omit the basic block frequency from the cost.
/// However, some alternatives may produce non-local cost, e.g., when
/// repairing a phi, and thus we then need to scale the local cost
/// to the non-local cost. This class does this for us.
/// \note: We could simply always scale the cost. The problem is that
/// there are higher chances that we saturate the cost easier and end
/// up having the same cost for actually different alternatives.
/// Another option would be to use APInt everywhere.
class MappingCost {
private:
/// Cost of the local instructions.
/// This cost is free of basic block frequency.
uint64_t LocalCost = 0;
/// Cost of the non-local instructions.
/// This cost should include the frequency of the related blocks.
uint64_t NonLocalCost = 0;
/// Frequency of the block where the local instructions live.
uint64_t LocalFreq;
MappingCost(uint64_t LocalCost, uint64_t NonLocalCost, uint64_t LocalFreq)
: LocalCost(LocalCost), NonLocalCost(NonLocalCost),
LocalFreq(LocalFreq) {}
/// Check if this cost is saturated.
bool isSaturated() const;
public:
/// Create a MappingCost assuming that most of the instructions
/// will occur in a basic block with \p LocalFreq frequency.
MappingCost(const BlockFrequency &LocalFreq);
/// Add \p Cost to the local cost.
/// \return true if this cost is saturated, false otherwise.
bool addLocalCost(uint64_t Cost);
/// Add \p Cost to the non-local cost.
/// Non-local cost should reflect the frequency of their placement.
/// \return true if this cost is saturated, false otherwise.
bool addNonLocalCost(uint64_t Cost);
/// Saturate the cost to the maximal representable value.
void saturate();
/// Return an instance of MappingCost that represents an
/// impossible mapping.
static MappingCost ImpossibleCost();
/// Check if this is less than \p Cost.
bool operator<(const MappingCost &Cost) const;
/// Check if this is equal to \p Cost.
bool operator==(const MappingCost &Cost) const;
/// Check if this is not equal to \p Cost.
bool operator!=(const MappingCost &Cost) const { return !(*this == Cost); }
/// Check if this is greater than \p Cost.
bool operator>(const MappingCost &Cost) const {
return *this != Cost && Cost < *this;
}
/// Print this on dbgs() stream.
void dump() const;
/// Print this on \p OS;
void print(raw_ostream &OS) const;
/// Overload the stream operator for easy debug printing.
friend raw_ostream &operator<<(raw_ostream &OS, const MappingCost &Cost) {
Cost.print(OS);
return OS;
}
};
/// Interface to the target lowering info related
/// to register banks.
const RegisterBankInfo *RBI = nullptr;
/// MRI contains all the register class/bank information that this
/// pass uses and updates.
MachineRegisterInfo *MRI = nullptr;
/// Information on the register classes for the current function.
const TargetRegisterInfo *TRI = nullptr;
/// Get the frequency of blocks.
/// This is required for non-fast mode.
MachineBlockFrequencyInfo *MBFI = nullptr;
/// Get the frequency of the edges.
/// This is required for non-fast mode.
MachineBranchProbabilityInfo *MBPI = nullptr;
/// Current optimization remark emitter. Used to report failures.
std::unique_ptr<MachineOptimizationRemarkEmitter> MORE;
/// Helper class used for every code morphing.
MachineIRBuilder MIRBuilder;
/// Optimization mode of the pass.
Mode OptMode;
/// Current target configuration. Controls how the pass handles errors.
const TargetPassConfig *TPC;
/// Assign the register bank of each operand of \p MI.
/// \return True on success, false otherwise.
bool assignInstr(MachineInstr &MI);
/// Initialize the field members using \p MF.
void init(MachineFunction &MF);
/// Check if \p Reg is already assigned what is described by \p ValMapping.
/// \p OnlyAssign == true means that \p Reg just needs to be assigned a
/// register bank. I.e., no repairing is necessary to have the
/// assignment match.
bool assignmentMatch(Register Reg,
const RegisterBankInfo::ValueMapping &ValMapping,
bool &OnlyAssign) const;
/// Insert repairing code for \p Reg as specified by \p ValMapping.
/// The repairing placement is specified by \p RepairPt.
/// \p NewVRegs contains all the registers required to remap \p Reg.
/// In other words, the number of registers in NewVRegs must be equal
/// to ValMapping.BreakDown.size().
///
/// The transformation could be sketched as:
/// \code
/// ... = op Reg
/// \endcode
/// Becomes
/// \code
/// <NewRegs> = COPY or extract Reg
/// ... = op Reg
/// \endcode
///
/// and
/// \code
/// Reg = op ...
/// \endcode
/// Becomes
/// \code
/// Reg = op ...
/// Reg = COPY or build_sequence <NewRegs>
/// \endcode
///
/// \pre NewVRegs.size() == ValMapping.BreakDown.size()
///
/// \note The caller is supposed to do the rewriting of op if need be.
/// I.e., Reg = op ... => <NewRegs> = NewOp ...
///
/// \return True if the repairing worked, false otherwise.
bool repairReg(MachineOperand &MO,
const RegisterBankInfo::ValueMapping &ValMapping,
RegBankSelect::RepairingPlacement &RepairPt,
const iterator_range<SmallVectorImpl<Register>::const_iterator>
&NewVRegs);
/// Return the cost of the instruction needed to map \p MO to \p ValMapping.
/// The cost is free of basic block frequencies.
/// \pre MO.isReg()
/// \pre MO is assigned to a register bank.
/// \pre ValMapping is a valid mapping for MO.
uint64_t
getRepairCost(const MachineOperand &MO,
const RegisterBankInfo::ValueMapping &ValMapping) const;
/// Find the best mapping for \p MI from \p PossibleMappings.
/// \return a reference on the best mapping in \p PossibleMappings.
const RegisterBankInfo::InstructionMapping &
findBestMapping(MachineInstr &MI,
RegisterBankInfo::InstructionMappings &PossibleMappings,
SmallVectorImpl<RepairingPlacement> &RepairPts);
/// Compute the cost of mapping \p MI with \p InstrMapping and
/// compute the repairing placement for such mapping in \p
/// RepairPts.
/// \p BestCost is used to specify when the cost becomes too high
/// and thus it is not worth computing the RepairPts. Moreover if
/// \p BestCost == nullptr, the mapping cost is actually not
/// computed.
MappingCost
computeMapping(MachineInstr &MI,
const RegisterBankInfo::InstructionMapping &InstrMapping,
SmallVectorImpl<RepairingPlacement> &RepairPts,
const MappingCost *BestCost = nullptr);
/// When \p RepairPt involves splitting to repair \p MO for the
/// given \p ValMapping, try to change the way we repair such that
/// the splitting is not required anymore.
///
/// \pre \p RepairPt.hasSplit()
/// \pre \p MO == MO.getParent()->getOperand(\p RepairPt.getOpIdx())
/// \pre \p ValMapping is the mapping of \p MO for MO.getParent()
/// that implied \p RepairPt.
void tryAvoidingSplit(RegBankSelect::RepairingPlacement &RepairPt,
const MachineOperand &MO,
const RegisterBankInfo::ValueMapping &ValMapping) const;
/// Apply \p Mapping to \p MI. \p RepairPts represents the different
/// mapping action that need to happen for the mapping to be
/// applied.
/// \return True if the mapping was applied sucessfully, false otherwise.
bool applyMapping(MachineInstr &MI,
const RegisterBankInfo::InstructionMapping &InstrMapping,
SmallVectorImpl<RepairingPlacement> &RepairPts);
public:
/// Create a RegBankSelect pass with the specified \p RunningMode.
RegBankSelect(char &PassID = ID, Mode RunningMode = Fast);
StringRef getPassName() const override { return "RegBankSelect"; }
void getAnalysisUsage(AnalysisUsage &AU) const override;
MachineFunctionProperties getRequiredProperties() const override {
return MachineFunctionProperties()
.set(MachineFunctionProperties::Property::IsSSA)
.set(MachineFunctionProperties::Property::Legalized);
}
MachineFunctionProperties getSetProperties() const override {
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::RegBankSelected);
}
MachineFunctionProperties getClearedProperties() const override {
return MachineFunctionProperties()
.set(MachineFunctionProperties::Property::NoPHIs);
}
/// Check that our input is fully legal: we require the function to have the
/// Legalized property, so it should be.
///
/// FIXME: This should be in the MachineVerifier.
bool checkFunctionIsLegal(MachineFunction &MF) const;
/// Walk through \p MF and assign a register bank to every virtual register
/// that are still mapped to nothing.
/// The target needs to provide a RegisterBankInfo and in particular
/// override RegisterBankInfo::getInstrMapping.
///
/// Simplified algo:
/// \code
/// RBI = MF.subtarget.getRegBankInfo()
/// MIRBuilder.setMF(MF)
/// for each bb in MF
/// for each inst in bb
/// MIRBuilder.setInstr(inst)
/// MappingCosts = RBI.getMapping(inst);
/// Idx = findIdxOfMinCost(MappingCosts)
/// CurRegBank = MappingCosts[Idx].RegBank
/// MRI.setRegBank(inst.getOperand(0).getReg(), CurRegBank)
/// for each argument in inst
/// if (CurRegBank != argument.RegBank)
/// ArgReg = argument.getReg()
/// Tmp = MRI.createNewVirtual(MRI.getSize(ArgReg), CurRegBank)
/// MIRBuilder.buildInstr(COPY, Tmp, ArgReg)
/// inst.getOperand(argument.getOperandNo()).setReg(Tmp)
/// \endcode
bool assignRegisterBanks(MachineFunction &MF);
bool runOnMachineFunction(MachineFunction &MF) override;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_GLOBALISEL_REGBANKSELECT_H
PK iwFZ�CH �) �) ) CodeGen/GlobalISel/GenericMachineInstrs.hnu �[��� //===- llvm/CodeGen/GlobalISel/GenericMachineInstrs.h -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// Declares convenience wrapper classes for interpreting MachineInstr instances
/// as specific generic operations.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_GENERICMACHINEINSTRS_H
#define LLVM_CODEGEN_GLOBALISEL_GENERICMACHINEINSTRS_H
#include "llvm/IR/Instructions.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/TargetOpcodes.h"
#include "llvm/Support/Casting.h"
namespace llvm {
/// A base class for all GenericMachineInstrs.
class GenericMachineInstr : public MachineInstr {
public:
GenericMachineInstr() = delete;
/// Access the Idx'th operand as a register and return it.
/// This assumes that the Idx'th operand is a Register type.
Register getReg(unsigned Idx) const { return getOperand(Idx).getReg(); }
static bool classof(const MachineInstr *MI) {
return isPreISelGenericOpcode(MI->getOpcode());
}
};
/// Represents any type of generic load or store.
/// G_LOAD, G_STORE, G_ZEXTLOAD, G_SEXTLOAD.
class GLoadStore : public GenericMachineInstr {
public:
/// Get the source register of the pointer value.
Register getPointerReg() const { return getOperand(1).getReg(); }
/// Get the MachineMemOperand on this instruction.
MachineMemOperand &getMMO() const { return **memoperands_begin(); }
/// Returns true if the attached MachineMemOperand has the atomic flag set.
bool isAtomic() const { return getMMO().isAtomic(); }
/// Returns true if the attached MachineMemOpeand as the volatile flag set.
bool isVolatile() const { return getMMO().isVolatile(); }
/// Returns true if the memory operation is neither atomic or volatile.
bool isSimple() const { return !isAtomic() && !isVolatile(); }
/// Returns true if this memory operation doesn't have any ordering
/// constraints other than normal aliasing. Volatile and (ordered) atomic
/// memory operations can't be reordered.
bool isUnordered() const { return getMMO().isUnordered(); }
/// Returns the size in bytes of the memory access.
uint64_t getMemSize() const { return getMMO().getSize();
} /// Returns the size in bits of the memory access.
uint64_t getMemSizeInBits() const { return getMMO().getSizeInBits(); }
static bool classof(const MachineInstr *MI) {
switch (MI->getOpcode()) {
case TargetOpcode::G_LOAD:
case TargetOpcode::G_STORE:
case TargetOpcode::G_ZEXTLOAD:
case TargetOpcode::G_SEXTLOAD:
return true;
default:
return false;
}
}
};
/// Represents any generic load, including sign/zero extending variants.
class GAnyLoad : public GLoadStore {
public:
/// Get the definition register of the loaded value.
Register getDstReg() const { return getOperand(0).getReg(); }
static bool classof(const MachineInstr *MI) {
switch (MI->getOpcode()) {
case TargetOpcode::G_LOAD:
case TargetOpcode::G_ZEXTLOAD:
case TargetOpcode::G_SEXTLOAD:
return true;
default:
return false;
}
}
};
/// Represents a G_LOAD.
class GLoad : public GAnyLoad {
public:
static bool classof(const MachineInstr *MI) {
return MI->getOpcode() == TargetOpcode::G_LOAD;
}
};
/// Represents either a G_SEXTLOAD or G_ZEXTLOAD.
class GExtLoad : public GAnyLoad {
public:
static bool classof(const MachineInstr *MI) {
return MI->getOpcode() == TargetOpcode::G_SEXTLOAD ||
MI->getOpcode() == TargetOpcode::G_ZEXTLOAD;
}
};
/// Represents a G_SEXTLOAD.
class GSExtLoad : public GExtLoad {
public:
static bool classof(const MachineInstr *MI) {
return MI->getOpcode() == TargetOpcode::G_SEXTLOAD;
}
};
/// Represents a G_ZEXTLOAD.
class GZExtLoad : public GExtLoad {
public:
static bool classof(const MachineInstr *MI) {
return MI->getOpcode() == TargetOpcode::G_ZEXTLOAD;
}
};
/// Represents a G_STORE.
class GStore : public GLoadStore {
public:
/// Get the stored value register.
Register getValueReg() const { return getOperand(0).getReg(); }
static bool classof(const MachineInstr *MI) {
return MI->getOpcode() == TargetOpcode::G_STORE;
}
};
/// Represents a G_UNMERGE_VALUES.
class GUnmerge : public GenericMachineInstr {
public:
/// Returns the number of def registers.
unsigned getNumDefs() const { return getNumOperands() - 1; }
/// Get the unmerge source register.
Register getSourceReg() const { return getOperand(getNumDefs()).getReg(); }
static bool classof(const MachineInstr *MI) {
return MI->getOpcode() == TargetOpcode::G_UNMERGE_VALUES;
}
};
/// Represents G_BUILD_VECTOR, G_CONCAT_VECTORS or G_MERGE_VALUES.
/// All these have the common property of generating a single value from
/// multiple sources.
class GMergeLikeInstr : public GenericMachineInstr {
public:
/// Returns the number of source registers.
unsigned getNumSources() const { return getNumOperands() - 1; }
/// Returns the I'th source register.
Register getSourceReg(unsigned I) const { return getReg(I + 1); }
static bool classof(const MachineInstr *MI) {
switch (MI->getOpcode()) {
case TargetOpcode::G_MERGE_VALUES:
case TargetOpcode::G_CONCAT_VECTORS:
case TargetOpcode::G_BUILD_VECTOR:
return true;
default:
return false;
}
}
};
/// Represents a G_MERGE_VALUES.
class GMerge : public GMergeLikeInstr {
public:
static bool classof(const MachineInstr *MI) {
return MI->getOpcode() == TargetOpcode::G_MERGE_VALUES;
}
};
/// Represents a G_CONCAT_VECTORS.
class GConcatVectors : public GMergeLikeInstr {
public:
static bool classof(const MachineInstr *MI) {
return MI->getOpcode() == TargetOpcode::G_CONCAT_VECTORS;
}
};
/// Represents a G_BUILD_VECTOR.
class GBuildVector : public GMergeLikeInstr {
public:
static bool classof(const MachineInstr *MI) {
return MI->getOpcode() == TargetOpcode::G_BUILD_VECTOR;
}
};
/// Represents a G_PTR_ADD.
class GPtrAdd : public GenericMachineInstr {
public:
Register getBaseReg() const { return getReg(1); }
Register getOffsetReg() const { return getReg(2); }
static bool classof(const MachineInstr *MI) {
return MI->getOpcode() == TargetOpcode::G_PTR_ADD;
}
};
/// Represents a G_IMPLICIT_DEF.
class GImplicitDef : public GenericMachineInstr {
public:
static bool classof(const MachineInstr *MI) {
return MI->getOpcode() == TargetOpcode::G_IMPLICIT_DEF;
}
};
/// Represents a G_SELECT.
class GSelect : public GenericMachineInstr {
public:
Register getCondReg() const { return getReg(1); }
Register getTrueReg() const { return getReg(2); }
Register getFalseReg() const { return getReg(3); }
static bool classof(const MachineInstr *MI) {
return MI->getOpcode() == TargetOpcode::G_SELECT;
}
};
/// Represent a G_ICMP or G_FCMP.
class GAnyCmp : public GenericMachineInstr {
public:
CmpInst::Predicate getCond() const {
return static_cast<CmpInst::Predicate>(getOperand(1).getPredicate());
}
Register getLHSReg() const { return getReg(2); }
Register getRHSReg() const { return getReg(3); }
static bool classof(const MachineInstr *MI) {
return MI->getOpcode() == TargetOpcode::G_ICMP ||
MI->getOpcode() == TargetOpcode::G_FCMP;
}
};
/// Represent a G_ICMP.
class GICmp : public GAnyCmp {
public:
static bool classof(const MachineInstr *MI) {
return MI->getOpcode() == TargetOpcode::G_ICMP;
}
};
/// Represent a G_FCMP.
class GFCmp : public GAnyCmp {
public:
static bool classof(const MachineInstr *MI) {
return MI->getOpcode() == TargetOpcode::G_FCMP;
}
};
/// Represents overflowing binary operations.
/// Only carry-out:
/// G_UADDO, G_SADDO, G_USUBO, G_SSUBO, G_UMULO, G_SMULO
/// Carry-in and carry-out:
/// G_UADDE, G_SADDE, G_USUBE, G_SSUBE
class GBinOpCarryOut : public GenericMachineInstr {
public:
Register getDstReg() const { return getReg(0); }
Register getCarryOutReg() const { return getReg(1); }
MachineOperand &getLHS() { return getOperand(2); }
MachineOperand &getRHS() { return getOperand(3); }
static bool classof(const MachineInstr *MI) {
switch (MI->getOpcode()) {
case TargetOpcode::G_UADDO:
case TargetOpcode::G_SADDO:
case TargetOpcode::G_USUBO:
case TargetOpcode::G_SSUBO:
case TargetOpcode::G_UADDE:
case TargetOpcode::G_SADDE:
case TargetOpcode::G_USUBE:
case TargetOpcode::G_SSUBE:
case TargetOpcode::G_UMULO:
case TargetOpcode::G_SMULO:
return true;
default:
return false;
}
}
};
/// Represents overflowing add/sub operations.
/// Only carry-out:
/// G_UADDO, G_SADDO, G_USUBO, G_SSUBO
/// Carry-in and carry-out:
/// G_UADDE, G_SADDE, G_USUBE, G_SSUBE
class GAddSubCarryOut : public GBinOpCarryOut {
public:
bool isAdd() const {
switch (getOpcode()) {
case TargetOpcode::G_UADDO:
case TargetOpcode::G_SADDO:
case TargetOpcode::G_UADDE:
case TargetOpcode::G_SADDE:
return true;
default:
return false;
}
}
bool isSub() const { return !isAdd(); }
bool isSigned() const {
switch (getOpcode()) {
case TargetOpcode::G_SADDO:
case TargetOpcode::G_SSUBO:
case TargetOpcode::G_SADDE:
case TargetOpcode::G_SSUBE:
return true;
default:
return false;
}
}
bool isUnsigned() const { return !isSigned(); }
static bool classof(const MachineInstr *MI) {
switch (MI->getOpcode()) {
case TargetOpcode::G_UADDO:
case TargetOpcode::G_SADDO:
case TargetOpcode::G_USUBO:
case TargetOpcode::G_SSUBO:
case TargetOpcode::G_UADDE:
case TargetOpcode::G_SADDE:
case TargetOpcode::G_USUBE:
case TargetOpcode::G_SSUBE:
return true;
default:
return false;
}
}
};
/// Represents overflowing add/sub operations that also consume a carry-in.
/// G_UADDE, G_SADDE, G_USUBE, G_SSUBE
class GAddSubCarryInOut : public GAddSubCarryOut {
public:
Register getCarryInReg() const { return getReg(4); }
static bool classof(const MachineInstr *MI) {
switch (MI->getOpcode()) {
case TargetOpcode::G_UADDE:
case TargetOpcode::G_SADDE:
case TargetOpcode::G_USUBE:
case TargetOpcode::G_SSUBE:
return true;
default:
return false;
}
}
};
} // namespace llvm
#endif // LLVM_CODEGEN_GLOBALISEL_GENERICMACHINEINSTRS_H
PK iwFZ$ْ?� � ! CodeGen/GlobalISel/LoadStoreOpt.hnu �[��� //== llvm/CodeGen/GlobalISel/LoadStoreOpt.h - LoadStoreOpt -------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// This is an optimization pass for GlobalISel generic memory operations.
/// Specifically, it focuses on merging stores and loads to consecutive
/// addresses.
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_LOADSTOREOPT_H
#define LLVM_CODEGEN_GLOBALISEL_LOADSTOREOPT_H
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
namespace llvm {
// Forward declarations.
class AnalysisUsage;
class GStore;
class LegalizerInfo;
class MachineBasicBlock;
class MachineInstr;
class TargetLowering;
struct LegalityQuery;
class MachineRegisterInfo;
namespace GISelAddressing {
/// Helper struct to store a base, index and offset that forms an address
struct BaseIndexOffset {
Register BaseReg;
Register IndexReg;
int64_t Offset = 0;
bool IsIndexSignExt = false;
};
/// Returns a BaseIndexOffset which describes the pointer in \p Ptr.
BaseIndexOffset getPointerInfo(Register Ptr, MachineRegisterInfo &MRI);
/// Compute whether or not a memory access at \p MI1 aliases with an access at
/// \p MI2 \returns true if either alias/no-alias is known. Sets \p IsAlias
/// accordingly.
bool aliasIsKnownForLoadStore(const MachineInstr &MI1, const MachineInstr &MI2,
bool &IsAlias, MachineRegisterInfo &MRI);
/// Returns true if the instruction \p MI may alias \p Other.
/// This function uses multiple strategies to detect aliasing, whereas
/// aliasIsKnownForLoadStore just looks at the addresses of load/stores and is
/// tries to reason about base/index/offsets.
bool instMayAlias(const MachineInstr &MI, const MachineInstr &Other,
MachineRegisterInfo &MRI, AliasAnalysis *AA);
} // namespace GISelAddressing
using namespace GISelAddressing;
class LoadStoreOpt : public MachineFunctionPass {
public:
static char ID;
private:
/// An input function to decide if the pass should run or not
/// on the given MachineFunction.
std::function<bool(const MachineFunction &)> DoNotRunPass;
MachineRegisterInfo *MRI = nullptr;
const TargetLowering *TLI = nullptr;
MachineFunction *MF = nullptr;
AliasAnalysis *AA = nullptr;
const LegalizerInfo *LI = nullptr;
MachineIRBuilder Builder;
/// Initialize the field members using \p MF.
void init(MachineFunction &MF);
class StoreMergeCandidate {
public:
// The base pointer used as the base for all stores in this candidate.
Register BasePtr;
// Our algorithm is very simple at the moment. We assume that in instruction
// order stores are writing to incremeneting consecutive addresses. So when
// we walk the block in reverse order, the next eligible store must write to
// an offset one store width lower than CurrentLowestOffset.
uint64_t CurrentLowestOffset;
SmallVector<GStore *> Stores;
// A vector of MachineInstr/unsigned pairs to denote potential aliases that
// need to be checked before the candidate is considered safe to merge. The
// unsigned value is an index into the Stores vector. The indexed store is
// the highest-indexed store that has already been checked to not have an
// alias with the instruction. We record this so we don't have to repeat
// alias checks that have been already done, only those with stores added
// after the potential alias is recorded.
SmallVector<std::pair<MachineInstr *, unsigned>> PotentialAliases;
void addPotentialAlias(MachineInstr &MI);
/// Reset this candidate back to an empty one.
void reset() {
Stores.clear();
PotentialAliases.clear();
CurrentLowestOffset = 0;
BasePtr = Register();
}
};
bool isLegalOrBeforeLegalizer(const LegalityQuery &Query,
MachineFunction &MF) const;
/// If the given store is valid to be a member of the candidate, add it and
/// return true. Otherwise, returns false.
bool addStoreToCandidate(GStore &MI, StoreMergeCandidate &C);
/// Returns true if the instruction \p MI would potentially alias with any
/// stores in the candidate \p C.
bool operationAliasesWithCandidate(MachineInstr &MI, StoreMergeCandidate &C);
/// Merges the stores in the given vector into a wide store.
/// \p returns true if at least some of the stores were merged.
/// This may decide not to merge stores if heuristics predict it will not be
/// worth it.
bool mergeStores(SmallVectorImpl<GStore *> &StoresToMerge);
/// Perform a merge of all the stores in \p Stores into a single store.
/// Erases the old stores from the block when finished.
/// \returns true if merging was done. It may fail to perform a merge if
/// there are issues with materializing legal wide values.
bool doSingleStoreMerge(SmallVectorImpl<GStore *> &Stores);
bool processMergeCandidate(StoreMergeCandidate &C);
bool mergeBlockStores(MachineBasicBlock &MBB);
bool mergeFunctionStores(MachineFunction &MF);
bool mergeTruncStore(GStore &StoreMI,
SmallPtrSetImpl<GStore *> &DeletedStores);
bool mergeTruncStoresBlock(MachineBasicBlock &MBB);
/// Initialize some target-specific data structures for the store merging
/// optimization. \p AddrSpace indicates which address space to use when
/// probing the legalizer info for legal stores.
void initializeStoreMergeTargetInfo(unsigned AddrSpace = 0);
/// A map between address space numbers and a bitvector of supported stores
/// sizes. Each bit in the bitvector represents whether a store size of
/// that bit's value is legal. E.g. if bit 64 is set, then 64 bit scalar
/// stores are legal.
DenseMap<unsigned, BitVector> LegalStoreSizes;
bool IsPreLegalizer = false;
/// Contains instructions to be erased at the end of a block scan.
SmallSet<MachineInstr *, 16> InstsToErase;
public:
LoadStoreOpt();
LoadStoreOpt(std::function<bool(const MachineFunction &)>);
StringRef getPassName() const override { return "LoadStoreOpt"; }
MachineFunctionProperties getRequiredProperties() const override {
return MachineFunctionProperties()
.set(MachineFunctionProperties::Property::IsSSA);
}
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnMachineFunction(MachineFunction &MF) override;
};
} // End namespace llvm.
#endif
PK iwFZ}-�fv fv ! CodeGen/GlobalISel/IRTranslator.hnu �[��� //===- llvm/CodeGen/GlobalISel/IRTranslator.h - IRTranslator ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This file declares the IRTranslator pass.
/// This pass is responsible for translating LLVM IR into MachineInstr.
/// It uses target hooks to lower the ABI but aside from that, the pass
/// generated code is generic. This is the default translator used for
/// GlobalISel.
///
/// \todo Replace the comments with actual doxygen comments.
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_IRTRANSLATOR_H
#define LLVM_CODEGEN_GLOBALISEL_IRTRANSLATOR_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/CodeGenCommonISel.h"
#include "llvm/CodeGen/FunctionLoweringInfo.h"
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/SwiftErrorValueTracking.h"
#include "llvm/CodeGen/SwitchLoweringUtils.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/CodeGen.h"
#include <memory>
#include <utility>
namespace llvm {
class AllocaInst;
class AssumptionCache;
class BasicBlock;
class CallInst;
class CallLowering;
class Constant;
class ConstrainedFPIntrinsic;
class DataLayout;
class DbgDeclareInst;
class DbgValueInst;
class Instruction;
class MachineBasicBlock;
class MachineFunction;
class MachineInstr;
class MachineRegisterInfo;
class OptimizationRemarkEmitter;
class PHINode;
class TargetLibraryInfo;
class TargetPassConfig;
class User;
class Value;
// Technically the pass should run on an hypothetical MachineModule,
// since it should translate Global into some sort of MachineGlobal.
// The MachineGlobal should ultimately just be a transfer of ownership of
// the interesting bits that are relevant to represent a global value.
// That being said, we could investigate what would it cost to just duplicate
// the information from the LLVM IR.
// The idea is that ultimately we would be able to free up the memory used
// by the LLVM IR as soon as the translation is over.
class IRTranslator : public MachineFunctionPass {
public:
static char ID;
private:
/// Interface used to lower the everything related to calls.
const CallLowering *CLI = nullptr;
/// This class contains the mapping between the Values to vreg related data.
class ValueToVRegInfo {
public:
ValueToVRegInfo() = default;
using VRegListT = SmallVector<Register, 1>;
using OffsetListT = SmallVector<uint64_t, 1>;
using const_vreg_iterator =
DenseMap<const Value *, VRegListT *>::const_iterator;
using const_offset_iterator =
DenseMap<const Value *, OffsetListT *>::const_iterator;
inline const_vreg_iterator vregs_end() const { return ValToVRegs.end(); }
VRegListT *getVRegs(const Value &V) {
auto It = ValToVRegs.find(&V);
if (It != ValToVRegs.end())
return It->second;
return insertVRegs(V);
}
OffsetListT *getOffsets(const Value &V) {
auto It = TypeToOffsets.find(V.getType());
if (It != TypeToOffsets.end())
return It->second;
return insertOffsets(V);
}
const_vreg_iterator findVRegs(const Value &V) const {
return ValToVRegs.find(&V);
}
bool contains(const Value &V) const { return ValToVRegs.contains(&V); }
void reset() {
ValToVRegs.clear();
TypeToOffsets.clear();
VRegAlloc.DestroyAll();
OffsetAlloc.DestroyAll();
}
private:
VRegListT *insertVRegs(const Value &V) {
assert(!ValToVRegs.contains(&V) && "Value already exists");
// We placement new using our fast allocator since we never try to free
// the vectors until translation is finished.
auto *VRegList = new (VRegAlloc.Allocate()) VRegListT();
ValToVRegs[&V] = VRegList;
return VRegList;
}
OffsetListT *insertOffsets(const Value &V) {
assert(!TypeToOffsets.contains(V.getType()) && "Type already exists");
auto *OffsetList = new (OffsetAlloc.Allocate()) OffsetListT();
TypeToOffsets[V.getType()] = OffsetList;
return OffsetList;
}
SpecificBumpPtrAllocator<VRegListT> VRegAlloc;
SpecificBumpPtrAllocator<OffsetListT> OffsetAlloc;
// We store pointers to vectors here since references may be invalidated
// while we hold them if we stored the vectors directly.
DenseMap<const Value *, VRegListT*> ValToVRegs;
DenseMap<const Type *, OffsetListT*> TypeToOffsets;
};
/// Mapping of the values of the current LLVM IR function to the related
/// virtual registers and offsets.
ValueToVRegInfo VMap;
// N.b. it's not completely obvious that this will be sufficient for every
// LLVM IR construct (with "invoke" being the obvious candidate to mess up our
// lives.
DenseMap<const BasicBlock *, MachineBasicBlock *> BBToMBB;
// One BasicBlock can be translated to multiple MachineBasicBlocks. For such
// BasicBlocks translated to multiple MachineBasicBlocks, MachinePreds retains
// a mapping between the edges arriving at the BasicBlock to the corresponding
// created MachineBasicBlocks. Some BasicBlocks that get translated to a
// single MachineBasicBlock may also end up in this Map.
using CFGEdge = std::pair<const BasicBlock *, const BasicBlock *>;
DenseMap<CFGEdge, SmallVector<MachineBasicBlock *, 1>> MachinePreds;
// List of stubbed PHI instructions, for values and basic blocks to be filled
// in once all MachineBasicBlocks have been created.
SmallVector<std::pair<const PHINode *, SmallVector<MachineInstr *, 1>>, 4>
PendingPHIs;
/// Record of what frame index has been allocated to specified allocas for
/// this function.
DenseMap<const AllocaInst *, int> FrameIndices;
SwiftErrorValueTracking SwiftError;
/// \name Methods for translating form LLVM IR to MachineInstr.
/// \see ::translate for general information on the translate methods.
/// @{
/// Translate \p Inst into its corresponding MachineInstr instruction(s).
/// Insert the newly translated instruction(s) right where the CurBuilder
/// is set.
///
/// The general algorithm is:
/// 1. Look for a virtual register for each operand or
/// create one.
/// 2 Update the VMap accordingly.
/// 2.alt. For constant arguments, if they are compile time constants,
/// produce an immediate in the right operand and do not touch
/// ValToReg. Actually we will go with a virtual register for each
/// constants because it may be expensive to actually materialize the
/// constant. Moreover, if the constant spans on several instructions,
/// CSE may not catch them.
/// => Update ValToVReg and remember that we saw a constant in Constants.
/// We will materialize all the constants in finalize.
/// Note: we would need to do something so that we can recognize such operand
/// as constants.
/// 3. Create the generic instruction.
///
/// \return true if the translation succeeded.
bool translate(const Instruction &Inst);
/// Materialize \p C into virtual-register \p Reg. The generic instructions
/// performing this materialization will be inserted into the entry block of
/// the function.
///
/// \return true if the materialization succeeded.
bool translate(const Constant &C, Register Reg);
// Translate U as a copy of V.
bool translateCopy(const User &U, const Value &V,
MachineIRBuilder &MIRBuilder);
/// Translate an LLVM bitcast into generic IR. Either a COPY or a G_BITCAST is
/// emitted.
bool translateBitCast(const User &U, MachineIRBuilder &MIRBuilder);
/// Translate an LLVM load instruction into generic IR.
bool translateLoad(const User &U, MachineIRBuilder &MIRBuilder);
/// Translate an LLVM store instruction into generic IR.
bool translateStore(const User &U, MachineIRBuilder &MIRBuilder);
/// Translate an LLVM string intrinsic (memcpy, memset, ...).
bool translateMemFunc(const CallInst &CI, MachineIRBuilder &MIRBuilder,
unsigned Opcode);
void getStackGuard(Register DstReg, MachineIRBuilder &MIRBuilder);
bool translateOverflowIntrinsic(const CallInst &CI, unsigned Op,
MachineIRBuilder &MIRBuilder);
bool translateFixedPointIntrinsic(unsigned Op, const CallInst &CI,
MachineIRBuilder &MIRBuilder);
/// Helper function for translateSimpleIntrinsic.
/// \return The generic opcode for \p IntrinsicID if \p IntrinsicID is a
/// simple intrinsic (ceil, fabs, etc.). Otherwise, returns
/// Intrinsic::not_intrinsic.
unsigned getSimpleIntrinsicOpcode(Intrinsic::ID ID);
/// Translates the intrinsics defined in getSimpleIntrinsicOpcode.
/// \return true if the translation succeeded.
bool translateSimpleIntrinsic(const CallInst &CI, Intrinsic::ID ID,
MachineIRBuilder &MIRBuilder);
bool translateConstrainedFPIntrinsic(const ConstrainedFPIntrinsic &FPI,
MachineIRBuilder &MIRBuilder);
bool translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
MachineIRBuilder &MIRBuilder);
/// Returns the single livein physical register Arg was lowered to, if
/// possible.
std::optional<MCRegister> getArgPhysReg(Argument &Arg);
/// If DebugInst targets an Argument and its expression is an EntryValue,
/// lower it as an entry in the MF debug table.
bool translateIfEntryValueArgument(const DbgDeclareInst &DebugInst);
/// If DebugInst targets an Argument and its expression is an EntryValue,
/// lower as a DBG_VALUE targeting the corresponding livein register for that
/// Argument.
bool translateIfEntryValueArgument(const DbgValueInst &DebugInst,
MachineIRBuilder &MIRBuilder);
bool translateInlineAsm(const CallBase &CB, MachineIRBuilder &MIRBuilder);
/// Common code for translating normal calls or invokes.
bool translateCallBase(const CallBase &CB, MachineIRBuilder &MIRBuilder);
/// Translate call instruction.
/// \pre \p U is a call instruction.
bool translateCall(const User &U, MachineIRBuilder &MIRBuilder);
/// When an invoke or a cleanupret unwinds to the next EH pad, there are
/// many places it could ultimately go. In the IR, we have a single unwind
/// destination, but in the machine CFG, we enumerate all the possible blocks.
/// This function skips over imaginary basic blocks that hold catchswitch
/// instructions, and finds all the "real" machine
/// basic block destinations. As those destinations may not be successors of
/// EHPadBB, here we also calculate the edge probability to those
/// destinations. The passed-in Prob is the edge probability to EHPadBB.
bool findUnwindDestinations(
const BasicBlock *EHPadBB, BranchProbability Prob,
SmallVectorImpl<std::pair<MachineBasicBlock *, BranchProbability>>
&UnwindDests);
bool translateInvoke(const User &U, MachineIRBuilder &MIRBuilder);
bool translateCallBr(const User &U, MachineIRBuilder &MIRBuilder);
bool translateLandingPad(const User &U, MachineIRBuilder &MIRBuilder);
/// Translate one of LLVM's cast instructions into MachineInstrs, with the
/// given generic Opcode.
bool translateCast(unsigned Opcode, const User &U,
MachineIRBuilder &MIRBuilder);
/// Translate a phi instruction.
bool translatePHI(const User &U, MachineIRBuilder &MIRBuilder);
/// Translate a comparison (icmp or fcmp) instruction or constant.
bool translateCompare(const User &U, MachineIRBuilder &MIRBuilder);
/// Translate an integer compare instruction (or constant).
bool translateICmp(const User &U, MachineIRBuilder &MIRBuilder) {
return translateCompare(U, MIRBuilder);
}
/// Translate a floating-point compare instruction (or constant).
bool translateFCmp(const User &U, MachineIRBuilder &MIRBuilder) {
return translateCompare(U, MIRBuilder);
}
/// Add remaining operands onto phis we've translated. Executed after all
/// MachineBasicBlocks for the function have been created.
void finishPendingPhis();
/// Translate \p Inst into a unary operation \p Opcode.
/// \pre \p U is a unary operation.
bool translateUnaryOp(unsigned Opcode, const User &U,
MachineIRBuilder &MIRBuilder);
/// Translate \p Inst into a binary operation \p Opcode.
/// \pre \p U is a binary operation.
bool translateBinaryOp(unsigned Opcode, const User &U,
MachineIRBuilder &MIRBuilder);
/// If the set of cases should be emitted as a series of branches, return
/// true. If we should emit this as a bunch of and/or'd together conditions,
/// return false.
bool shouldEmitAsBranches(const std::vector<SwitchCG::CaseBlock> &Cases);
/// Helper method for findMergedConditions.
/// This function emits a branch and is used at the leaves of an OR or an
/// AND operator tree.
void emitBranchForMergedCondition(const Value *Cond, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
MachineBasicBlock *CurBB,
MachineBasicBlock *SwitchBB,
BranchProbability TProb,
BranchProbability FProb, bool InvertCond);
/// Used during condbr translation to find trees of conditions that can be
/// optimized.
void findMergedConditions(const Value *Cond, MachineBasicBlock *TBB,
MachineBasicBlock *FBB, MachineBasicBlock *CurBB,
MachineBasicBlock *SwitchBB,
Instruction::BinaryOps Opc, BranchProbability TProb,
BranchProbability FProb, bool InvertCond);
/// Translate branch (br) instruction.
/// \pre \p U is a branch instruction.
bool translateBr(const User &U, MachineIRBuilder &MIRBuilder);
// Begin switch lowering functions.
bool emitJumpTableHeader(SwitchCG::JumpTable &JT,
SwitchCG::JumpTableHeader &JTH,
MachineBasicBlock *HeaderBB);
void emitJumpTable(SwitchCG::JumpTable &JT, MachineBasicBlock *MBB);
void emitSwitchCase(SwitchCG::CaseBlock &CB, MachineBasicBlock *SwitchBB,
MachineIRBuilder &MIB);
/// Generate for for the BitTest header block, which precedes each sequence of
/// BitTestCases.
void emitBitTestHeader(SwitchCG::BitTestBlock &BTB,
MachineBasicBlock *SwitchMBB);
/// Generate code to produces one "bit test" for a given BitTestCase \p B.
void emitBitTestCase(SwitchCG::BitTestBlock &BB, MachineBasicBlock *NextMBB,
BranchProbability BranchProbToNext, Register Reg,
SwitchCG::BitTestCase &B, MachineBasicBlock *SwitchBB);
bool lowerJumpTableWorkItem(
SwitchCG::SwitchWorkListItem W, MachineBasicBlock *SwitchMBB,
MachineBasicBlock *CurMBB, MachineBasicBlock *DefaultMBB,
MachineIRBuilder &MIB, MachineFunction::iterator BBI,
BranchProbability UnhandledProbs, SwitchCG::CaseClusterIt I,
MachineBasicBlock *Fallthrough, bool FallthroughUnreachable);
bool lowerSwitchRangeWorkItem(SwitchCG::CaseClusterIt I, Value *Cond,
MachineBasicBlock *Fallthrough,
bool FallthroughUnreachable,
BranchProbability UnhandledProbs,
MachineBasicBlock *CurMBB,
MachineIRBuilder &MIB,
MachineBasicBlock *SwitchMBB);
bool lowerBitTestWorkItem(
SwitchCG::SwitchWorkListItem W, MachineBasicBlock *SwitchMBB,
MachineBasicBlock *CurMBB, MachineBasicBlock *DefaultMBB,
MachineIRBuilder &MIB, MachineFunction::iterator BBI,
BranchProbability DefaultProb, BranchProbability UnhandledProbs,
SwitchCG::CaseClusterIt I, MachineBasicBlock *Fallthrough,
bool FallthroughUnreachable);
bool lowerSwitchWorkItem(SwitchCG::SwitchWorkListItem W, Value *Cond,
MachineBasicBlock *SwitchMBB,
MachineBasicBlock *DefaultMBB,
MachineIRBuilder &MIB);
bool translateSwitch(const User &U, MachineIRBuilder &MIRBuilder);
// End switch lowering section.
bool translateIndirectBr(const User &U, MachineIRBuilder &MIRBuilder);
bool translateExtractValue(const User &U, MachineIRBuilder &MIRBuilder);
bool translateInsertValue(const User &U, MachineIRBuilder &MIRBuilder);
bool translateSelect(const User &U, MachineIRBuilder &MIRBuilder);
bool translateGetElementPtr(const User &U, MachineIRBuilder &MIRBuilder);
bool translateAlloca(const User &U, MachineIRBuilder &MIRBuilder);
/// Translate return (ret) instruction.
/// The target needs to implement CallLowering::lowerReturn for
/// this to succeed.
/// \pre \p U is a return instruction.
bool translateRet(const User &U, MachineIRBuilder &MIRBuilder);
bool translateFNeg(const User &U, MachineIRBuilder &MIRBuilder);
bool translateAdd(const User &U, MachineIRBuilder &MIRBuilder) {
return translateBinaryOp(TargetOpcode::G_ADD, U, MIRBuilder);
}
bool translateSub(const User &U, MachineIRBuilder &MIRBuilder) {
return translateBinaryOp(TargetOpcode::G_SUB, U, MIRBuilder);
}
bool translateAnd(const User &U, MachineIRBuilder &MIRBuilder) {
return translateBinaryOp(TargetOpcode::G_AND, U, MIRBuilder);
}
bool translateMul(const User &U, MachineIRBuilder &MIRBuilder) {
return translateBinaryOp(TargetOpcode::G_MUL, U, MIRBuilder);
}
bool translateOr(const User &U, MachineIRBuilder &MIRBuilder) {
return translateBinaryOp(TargetOpcode::G_OR, U, MIRBuilder);
}
bool translateXor(const User &U, MachineIRBuilder &MIRBuilder) {
return translateBinaryOp(TargetOpcode::G_XOR, U, MIRBuilder);
}
bool translateUDiv(const User &U, MachineIRBuilder &MIRBuilder) {
return translateBinaryOp(TargetOpcode::G_UDIV, U, MIRBuilder);
}
bool translateSDiv(const User &U, MachineIRBuilder &MIRBuilder) {
return translateBinaryOp(TargetOpcode::G_SDIV, U, MIRBuilder);
}
bool translateURem(const User &U, MachineIRBuilder &MIRBuilder) {
return translateBinaryOp(TargetOpcode::G_UREM, U, MIRBuilder);
}
bool translateSRem(const User &U, MachineIRBuilder &MIRBuilder) {
return translateBinaryOp(TargetOpcode::G_SREM, U, MIRBuilder);
}
bool translateIntToPtr(const User &U, MachineIRBuilder &MIRBuilder) {
return translateCast(TargetOpcode::G_INTTOPTR, U, MIRBuilder);
}
bool translatePtrToInt(const User &U, MachineIRBuilder &MIRBuilder) {
return translateCast(TargetOpcode::G_PTRTOINT, U, MIRBuilder);
}
bool translateTrunc(const User &U, MachineIRBuilder &MIRBuilder) {
return translateCast(TargetOpcode::G_TRUNC, U, MIRBuilder);
}
bool translateFPTrunc(const User &U, MachineIRBuilder &MIRBuilder) {
return translateCast(TargetOpcode::G_FPTRUNC, U, MIRBuilder);
}
bool translateFPExt(const User &U, MachineIRBuilder &MIRBuilder) {
return translateCast(TargetOpcode::G_FPEXT, U, MIRBuilder);
}
bool translateFPToUI(const User &U, MachineIRBuilder &MIRBuilder) {
return translateCast(TargetOpcode::G_FPTOUI, U, MIRBuilder);
}
bool translateFPToSI(const User &U, MachineIRBuilder &MIRBuilder) {
return translateCast(TargetOpcode::G_FPTOSI, U, MIRBuilder);
}
bool translateUIToFP(const User &U, MachineIRBuilder &MIRBuilder) {
return translateCast(TargetOpcode::G_UITOFP, U, MIRBuilder);
}
bool translateSIToFP(const User &U, MachineIRBuilder &MIRBuilder) {
return translateCast(TargetOpcode::G_SITOFP, U, MIRBuilder);
}
bool translateUnreachable(const User &U, MachineIRBuilder &MIRBuilder);
bool translateSExt(const User &U, MachineIRBuilder &MIRBuilder) {
return translateCast(TargetOpcode::G_SEXT, U, MIRBuilder);
}
bool translateZExt(const User &U, MachineIRBuilder &MIRBuilder) {
return translateCast(TargetOpcode::G_ZEXT, U, MIRBuilder);
}
bool translateShl(const User &U, MachineIRBuilder &MIRBuilder) {
return translateBinaryOp(TargetOpcode::G_SHL, U, MIRBuilder);
}
bool translateLShr(const User &U, MachineIRBuilder &MIRBuilder) {
return translateBinaryOp(TargetOpcode::G_LSHR, U, MIRBuilder);
}
bool translateAShr(const User &U, MachineIRBuilder &MIRBuilder) {
return translateBinaryOp(TargetOpcode::G_ASHR, U, MIRBuilder);
}
bool translateFAdd(const User &U, MachineIRBuilder &MIRBuilder) {
return translateBinaryOp(TargetOpcode::G_FADD, U, MIRBuilder);
}
bool translateFSub(const User &U, MachineIRBuilder &MIRBuilder) {
return translateBinaryOp(TargetOpcode::G_FSUB, U, MIRBuilder);
}
bool translateFMul(const User &U, MachineIRBuilder &MIRBuilder) {
return translateBinaryOp(TargetOpcode::G_FMUL, U, MIRBuilder);
}
bool translateFDiv(const User &U, MachineIRBuilder &MIRBuilder) {
return translateBinaryOp(TargetOpcode::G_FDIV, U, MIRBuilder);
}
bool translateFRem(const User &U, MachineIRBuilder &MIRBuilder) {
return translateBinaryOp(TargetOpcode::G_FREM, U, MIRBuilder);
}
bool translateVAArg(const User &U, MachineIRBuilder &MIRBuilder);
bool translateInsertElement(const User &U, MachineIRBuilder &MIRBuilder);
bool translateExtractElement(const User &U, MachineIRBuilder &MIRBuilder);
bool translateShuffleVector(const User &U, MachineIRBuilder &MIRBuilder);
bool translateAtomicCmpXchg(const User &U, MachineIRBuilder &MIRBuilder);
bool translateAtomicRMW(const User &U, MachineIRBuilder &MIRBuilder);
bool translateFence(const User &U, MachineIRBuilder &MIRBuilder);
bool translateFreeze(const User &U, MachineIRBuilder &MIRBuilder);
// Stubs to keep the compiler happy while we implement the rest of the
// translation.
bool translateResume(const User &U, MachineIRBuilder &MIRBuilder) {
return false;
}
bool translateCleanupRet(const User &U, MachineIRBuilder &MIRBuilder) {
return false;
}
bool translateCatchRet(const User &U, MachineIRBuilder &MIRBuilder) {
return false;
}
bool translateCatchSwitch(const User &U, MachineIRBuilder &MIRBuilder) {
return false;
}
bool translateAddrSpaceCast(const User &U, MachineIRBuilder &MIRBuilder) {
return translateCast(TargetOpcode::G_ADDRSPACE_CAST, U, MIRBuilder);
}
bool translateCleanupPad(const User &U, MachineIRBuilder &MIRBuilder) {
return false;
}
bool translateCatchPad(const User &U, MachineIRBuilder &MIRBuilder) {
return false;
}
bool translateUserOp1(const User &U, MachineIRBuilder &MIRBuilder) {
return false;
}
bool translateUserOp2(const User &U, MachineIRBuilder &MIRBuilder) {
return false;
}
/// @}
// Builder for machine instruction a la IRBuilder.
// I.e., compared to regular MIBuilder, this one also inserts the instruction
// in the current block, it can creates block, etc., basically a kind of
// IRBuilder, but for Machine IR.
// CSEMIRBuilder CurBuilder;
std::unique_ptr<MachineIRBuilder> CurBuilder;
// Builder set to the entry block (just after ABI lowering instructions). Used
// as a convenient location for Constants.
// CSEMIRBuilder EntryBuilder;
std::unique_ptr<MachineIRBuilder> EntryBuilder;
// The MachineFunction currently being translated.
MachineFunction *MF = nullptr;
/// MachineRegisterInfo used to create virtual registers.
MachineRegisterInfo *MRI = nullptr;
const DataLayout *DL = nullptr;
/// Current target configuration. Controls how the pass handles errors.
const TargetPassConfig *TPC = nullptr;
CodeGenOpt::Level OptLevel;
/// Current optimization remark emitter. Used to report failures.
std::unique_ptr<OptimizationRemarkEmitter> ORE;
AAResults *AA = nullptr;
AssumptionCache *AC = nullptr;
const TargetLibraryInfo *LibInfo = nullptr;
FunctionLoweringInfo FuncInfo;
// True when either the Target Machine specifies no optimizations or the
// function has the optnone attribute.
bool EnableOpts = false;
/// True when the block contains a tail call. This allows the IRTranslator to
/// stop translating such blocks early.
bool HasTailCall = false;
StackProtectorDescriptor SPDescriptor;
/// Switch analysis and optimization.
class GISelSwitchLowering : public SwitchCG::SwitchLowering {
public:
GISelSwitchLowering(IRTranslator *irt, FunctionLoweringInfo &funcinfo)
: SwitchLowering(funcinfo), IRT(irt) {
assert(irt && "irt is null!");
}
void addSuccessorWithProb(
MachineBasicBlock *Src, MachineBasicBlock *Dst,
BranchProbability Prob = BranchProbability::getUnknown()) override {
IRT->addSuccessorWithProb(Src, Dst, Prob);
}
virtual ~GISelSwitchLowering() = default;
private:
IRTranslator *IRT;
};
std::unique_ptr<GISelSwitchLowering> SL;
// * Insert all the code needed to materialize the constants
// at the proper place. E.g., Entry block or dominator block
// of each constant depending on how fancy we want to be.
// * Clear the different maps.
void finalizeFunction();
// Processing steps done per block. E.g. emitting jump tables, stack
// protectors etc. Returns true if no errors, false if there was a problem
// that caused an abort.
bool finalizeBasicBlock(const BasicBlock &BB, MachineBasicBlock &MBB);
/// Codegen a new tail for a stack protector check ParentMBB which has had its
/// tail spliced into a stack protector check success bb.
///
/// For a high level explanation of how this fits into the stack protector
/// generation see the comment on the declaration of class
/// StackProtectorDescriptor.
///
/// \return true if there were no problems.
bool emitSPDescriptorParent(StackProtectorDescriptor &SPD,
MachineBasicBlock *ParentBB);
/// Codegen the failure basic block for a stack protector check.
///
/// A failure stack protector machine basic block consists simply of a call to
/// __stack_chk_fail().
///
/// For a high level explanation of how this fits into the stack protector
/// generation see the comment on the declaration of class
/// StackProtectorDescriptor.
///
/// \return true if there were no problems.
bool emitSPDescriptorFailure(StackProtectorDescriptor &SPD,
MachineBasicBlock *FailureBB);
/// Get the VRegs that represent \p Val.
/// Non-aggregate types have just one corresponding VReg and the list can be
/// used as a single "unsigned". Aggregates get flattened. If such VRegs do
/// not exist, they are created.
ArrayRef<Register> getOrCreateVRegs(const Value &Val);
Register getOrCreateVReg(const Value &Val) {
auto Regs = getOrCreateVRegs(Val);
if (Regs.empty())
return 0;
assert(Regs.size() == 1 &&
"attempt to get single VReg for aggregate or void");
return Regs[0];
}
/// Allocate some vregs and offsets in the VMap. Then populate just the
/// offsets while leaving the vregs empty.
ValueToVRegInfo::VRegListT &allocateVRegs(const Value &Val);
/// Get the frame index that represents \p Val.
/// If such VReg does not exist, it is created.
int getOrCreateFrameIndex(const AllocaInst &AI);
/// Get the alignment of the given memory operation instruction. This will
/// either be the explicitly specified value or the ABI-required alignment for
/// the type being accessed (according to the Module's DataLayout).
Align getMemOpAlign(const Instruction &I);
/// Get the MachineBasicBlock that represents \p BB. Specifically, the block
/// returned will be the head of the translated block (suitable for branch
/// destinations).
MachineBasicBlock &getMBB(const BasicBlock &BB);
/// Record \p NewPred as a Machine predecessor to `Edge.second`, corresponding
/// to `Edge.first` at the IR level. This is used when IRTranslation creates
/// multiple MachineBasicBlocks for a given IR block and the CFG is no longer
/// represented simply by the IR-level CFG.
void addMachineCFGPred(CFGEdge Edge, MachineBasicBlock *NewPred);
/// Returns the Machine IR predecessors for the given IR CFG edge. Usually
/// this is just the single MachineBasicBlock corresponding to the predecessor
/// in the IR. More complex lowering can result in multiple MachineBasicBlocks
/// preceding the original though (e.g. switch instructions).
SmallVector<MachineBasicBlock *, 1> getMachinePredBBs(CFGEdge Edge) {
auto RemappedEdge = MachinePreds.find(Edge);
if (RemappedEdge != MachinePreds.end())
return RemappedEdge->second;
return SmallVector<MachineBasicBlock *, 4>(1, &getMBB(*Edge.first));
}
/// Return branch probability calculated by BranchProbabilityInfo for IR
/// blocks.
BranchProbability getEdgeProbability(const MachineBasicBlock *Src,
const MachineBasicBlock *Dst) const;
void addSuccessorWithProb(
MachineBasicBlock *Src, MachineBasicBlock *Dst,
BranchProbability Prob = BranchProbability::getUnknown());
public:
IRTranslator(CodeGenOpt::Level OptLevel = CodeGenOpt::None);
StringRef getPassName() const override { return "IRTranslator"; }
void getAnalysisUsage(AnalysisUsage &AU) const override;
// Algo:
// CallLowering = MF.subtarget.getCallLowering()
// F = MF.getParent()
// MIRBuilder.reset(MF)
// getMBB(F.getEntryBB())
// CallLowering->translateArguments(MIRBuilder, F, ValToVReg)
// for each bb in F
// getMBB(bb)
// for each inst in bb
// if (!translate(MIRBuilder, inst, ValToVReg, ConstantToSequence))
// report_fatal_error("Don't know how to translate input");
// finalize()
bool runOnMachineFunction(MachineFunction &MF) override;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_GLOBALISEL_IRTRANSLATOR_H
PK iwFZ%'�:� :� " CodeGen/GlobalISel/LegalizerInfo.hnu �[��� //===- llvm/CodeGen/GlobalISel/LegalizerInfo.h ------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// Interface for Targets to specify which operations they can successfully
/// select and how the others should be expanded most efficiently.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_LEGALIZERINFO_H
#define LLVM_CODEGEN_GLOBALISEL_LEGALIZERINFO_H
#include "llvm/ADT/SmallBitVector.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/GlobalISel/LegacyLegalizerInfo.h"
#include "llvm/CodeGen/LowLevelType.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/TargetOpcodes.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/Support/AtomicOrdering.h"
#include "llvm/Support/CommandLine.h"
#include <cassert>
#include <cstdint>
#include <tuple>
#include <utility>
namespace llvm {
extern cl::opt<bool> DisableGISelLegalityCheck;
class MachineFunction;
class raw_ostream;
class LegalizerHelper;
class MachineInstr;
class MachineRegisterInfo;
class MCInstrInfo;
namespace LegalizeActions {
enum LegalizeAction : std::uint8_t {
/// The operation is expected to be selectable directly by the target, and
/// no transformation is necessary.
Legal,
/// The operation should be synthesized from multiple instructions acting on
/// a narrower scalar base-type. For example a 64-bit add might be
/// implemented in terms of 32-bit add-with-carry.
NarrowScalar,
/// The operation should be implemented in terms of a wider scalar
/// base-type. For example a <2 x s8> add could be implemented as a <2
/// x s32> add (ignoring the high bits).
WidenScalar,
/// The (vector) operation should be implemented by splitting it into
/// sub-vectors where the operation is legal. For example a <8 x s64> add
/// might be implemented as 4 separate <2 x s64> adds. There can be a leftover
/// if there are not enough elements for last sub-vector e.g. <7 x s64> add
/// will be implemented as 3 separate <2 x s64> adds and one s64 add. Leftover
/// types can be avoided by doing MoreElements first.
FewerElements,
/// The (vector) operation should be implemented by widening the input
/// vector and ignoring the lanes added by doing so. For example <2 x i8> is
/// rarely legal, but you might perform an <8 x i8> and then only look at
/// the first two results.
MoreElements,
/// Perform the operation on a different, but equivalently sized type.
Bitcast,
/// The operation itself must be expressed in terms of simpler actions on
/// this target. E.g. a SREM replaced by an SDIV and subtraction.
Lower,
/// The operation should be implemented as a call to some kind of runtime
/// support library. For example this usually happens on machines that don't
/// support floating-point operations natively.
Libcall,
/// The target wants to do something special with this combination of
/// operand and type. A callback will be issued when it is needed.
Custom,
/// This operation is completely unsupported on the target. A programming
/// error has occurred.
Unsupported,
/// Sentinel value for when no action was found in the specified table.
NotFound,
/// Fall back onto the old rules.
/// TODO: Remove this once we've migrated
UseLegacyRules,
};
} // end namespace LegalizeActions
raw_ostream &operator<<(raw_ostream &OS, LegalizeActions::LegalizeAction Action);
using LegalizeActions::LegalizeAction;
/// The LegalityQuery object bundles together all the information that's needed
/// to decide whether a given operation is legal or not.
/// For efficiency, it doesn't make a copy of Types so care must be taken not
/// to free it before using the query.
struct LegalityQuery {
unsigned Opcode;
ArrayRef<LLT> Types;
struct MemDesc {
LLT MemoryTy;
uint64_t AlignInBits;
AtomicOrdering Ordering;
MemDesc() = default;
MemDesc(LLT MemoryTy, uint64_t AlignInBits, AtomicOrdering Ordering)
: MemoryTy(MemoryTy), AlignInBits(AlignInBits), Ordering(Ordering) {}
MemDesc(const MachineMemOperand &MMO)
: MemoryTy(MMO.getMemoryType()),
AlignInBits(MMO.getAlign().value() * 8),
Ordering(MMO.getSuccessOrdering()) {}
};
/// Operations which require memory can use this to place requirements on the
/// memory type for each MMO.
ArrayRef<MemDesc> MMODescrs;
constexpr LegalityQuery(unsigned Opcode, const ArrayRef<LLT> Types,
const ArrayRef<MemDesc> MMODescrs)
: Opcode(Opcode), Types(Types), MMODescrs(MMODescrs) {}
constexpr LegalityQuery(unsigned Opcode, const ArrayRef<LLT> Types)
: LegalityQuery(Opcode, Types, {}) {}
raw_ostream &print(raw_ostream &OS) const;
};
/// The result of a query. It either indicates a final answer of Legal or
/// Unsupported or describes an action that must be taken to make an operation
/// more legal.
struct LegalizeActionStep {
/// The action to take or the final answer.
LegalizeAction Action;
/// If describing an action, the type index to change. Otherwise zero.
unsigned TypeIdx;
/// If describing an action, the new type for TypeIdx. Otherwise LLT{}.
LLT NewType;
LegalizeActionStep(LegalizeAction Action, unsigned TypeIdx,
const LLT NewType)
: Action(Action), TypeIdx(TypeIdx), NewType(NewType) {}
LegalizeActionStep(LegacyLegalizeActionStep Step)
: TypeIdx(Step.TypeIdx), NewType(Step.NewType) {
switch (Step.Action) {
case LegacyLegalizeActions::Legal:
Action = LegalizeActions::Legal;
break;
case LegacyLegalizeActions::NarrowScalar:
Action = LegalizeActions::NarrowScalar;
break;
case LegacyLegalizeActions::WidenScalar:
Action = LegalizeActions::WidenScalar;
break;
case LegacyLegalizeActions::FewerElements:
Action = LegalizeActions::FewerElements;
break;
case LegacyLegalizeActions::MoreElements:
Action = LegalizeActions::MoreElements;
break;
case LegacyLegalizeActions::Bitcast:
Action = LegalizeActions::Bitcast;
break;
case LegacyLegalizeActions::Lower:
Action = LegalizeActions::Lower;
break;
case LegacyLegalizeActions::Libcall:
Action = LegalizeActions::Libcall;
break;
case LegacyLegalizeActions::Custom:
Action = LegalizeActions::Custom;
break;
case LegacyLegalizeActions::Unsupported:
Action = LegalizeActions::Unsupported;
break;
case LegacyLegalizeActions::NotFound:
Action = LegalizeActions::NotFound;
break;
}
}
bool operator==(const LegalizeActionStep &RHS) const {
return std::tie(Action, TypeIdx, NewType) ==
std::tie(RHS.Action, RHS.TypeIdx, RHS.NewType);
}
};
using LegalityPredicate = std::function<bool (const LegalityQuery &)>;
using LegalizeMutation =
std::function<std::pair<unsigned, LLT>(const LegalityQuery &)>;
namespace LegalityPredicates {
struct TypePairAndMemDesc {
LLT Type0;
LLT Type1;
LLT MemTy;
uint64_t Align;
bool operator==(const TypePairAndMemDesc &Other) const {
return Type0 == Other.Type0 && Type1 == Other.Type1 &&
Align == Other.Align && MemTy == Other.MemTy;
}
/// \returns true if this memory access is legal with for the access described
/// by \p Other (The alignment is sufficient for the size and result type).
bool isCompatible(const TypePairAndMemDesc &Other) const {
return Type0 == Other.Type0 && Type1 == Other.Type1 &&
Align >= Other.Align &&
// FIXME: This perhaps should be stricter, but the current legality
// rules are written only considering the size.
MemTy.getSizeInBits() == Other.MemTy.getSizeInBits();
}
};
/// True iff P0 and P1 are true.
template<typename Predicate>
Predicate all(Predicate P0, Predicate P1) {
return [=](const LegalityQuery &Query) {
return P0(Query) && P1(Query);
};
}
/// True iff all given predicates are true.
template<typename Predicate, typename... Args>
Predicate all(Predicate P0, Predicate P1, Args... args) {
return all(all(P0, P1), args...);
}
/// True iff P0 or P1 are true.
template<typename Predicate>
Predicate any(Predicate P0, Predicate P1) {
return [=](const LegalityQuery &Query) {
return P0(Query) || P1(Query);
};
}
/// True iff any given predicates are true.
template<typename Predicate, typename... Args>
Predicate any(Predicate P0, Predicate P1, Args... args) {
return any(any(P0, P1), args...);
}
/// True iff the given type index is the specified type.
LegalityPredicate typeIs(unsigned TypeIdx, LLT TypesInit);
/// True iff the given type index is one of the specified types.
LegalityPredicate typeInSet(unsigned TypeIdx,
std::initializer_list<LLT> TypesInit);
/// True iff the given type index is not the specified type.
inline LegalityPredicate typeIsNot(unsigned TypeIdx, LLT Type) {
return [=](const LegalityQuery &Query) {
return Query.Types[TypeIdx] != Type;
};
}
/// True iff the given types for the given pair of type indexes is one of the
/// specified type pairs.
LegalityPredicate
typePairInSet(unsigned TypeIdx0, unsigned TypeIdx1,
std::initializer_list<std::pair<LLT, LLT>> TypesInit);
/// True iff the given types for the given pair of type indexes is one of the
/// specified type pairs.
LegalityPredicate typePairAndMemDescInSet(
unsigned TypeIdx0, unsigned TypeIdx1, unsigned MMOIdx,
std::initializer_list<TypePairAndMemDesc> TypesAndMemDescInit);
/// True iff the specified type index is a scalar.
LegalityPredicate isScalar(unsigned TypeIdx);
/// True iff the specified type index is a vector.
LegalityPredicate isVector(unsigned TypeIdx);
/// True iff the specified type index is a pointer (with any address space).
LegalityPredicate isPointer(unsigned TypeIdx);
/// True iff the specified type index is a pointer with the specified address
/// space.
LegalityPredicate isPointer(unsigned TypeIdx, unsigned AddrSpace);
/// True if the type index is a vector with element type \p EltTy
LegalityPredicate elementTypeIs(unsigned TypeIdx, LLT EltTy);
/// True iff the specified type index is a scalar that's narrower than the given
/// size.
LegalityPredicate scalarNarrowerThan(unsigned TypeIdx, unsigned Size);
/// True iff the specified type index is a scalar that's wider than the given
/// size.
LegalityPredicate scalarWiderThan(unsigned TypeIdx, unsigned Size);
/// True iff the specified type index is a scalar or vector with an element type
/// that's narrower than the given size.
LegalityPredicate scalarOrEltNarrowerThan(unsigned TypeIdx, unsigned Size);
/// True iff the specified type index is a scalar or a vector with an element
/// type that's wider than the given size.
LegalityPredicate scalarOrEltWiderThan(unsigned TypeIdx, unsigned Size);
/// True iff the specified type index is a scalar whose size is not a multiple
/// of Size.
LegalityPredicate sizeNotMultipleOf(unsigned TypeIdx, unsigned Size);
/// True iff the specified type index is a scalar whose size is not a power of
/// 2.
LegalityPredicate sizeNotPow2(unsigned TypeIdx);
/// True iff the specified type index is a scalar or vector whose element size
/// is not a power of 2.
LegalityPredicate scalarOrEltSizeNotPow2(unsigned TypeIdx);
/// True if the total bitwidth of the specified type index is \p Size bits.
LegalityPredicate sizeIs(unsigned TypeIdx, unsigned Size);
/// True iff the specified type indices are both the same bit size.
LegalityPredicate sameSize(unsigned TypeIdx0, unsigned TypeIdx1);
/// True iff the first type index has a larger total bit size than second type
/// index.
LegalityPredicate largerThan(unsigned TypeIdx0, unsigned TypeIdx1);
/// True iff the first type index has a smaller total bit size than second type
/// index.
LegalityPredicate smallerThan(unsigned TypeIdx0, unsigned TypeIdx1);
/// True iff the specified MMO index has a size (rounded to bytes) that is not a
/// power of 2.
LegalityPredicate memSizeInBytesNotPow2(unsigned MMOIdx);
/// True iff the specified MMO index has a size that is not an even byte size,
/// or that even byte size is not a power of 2.
LegalityPredicate memSizeNotByteSizePow2(unsigned MMOIdx);
/// True iff the specified type index is a vector whose element count is not a
/// power of 2.
LegalityPredicate numElementsNotPow2(unsigned TypeIdx);
/// True iff the specified MMO index has at an atomic ordering of at Ordering or
/// stronger.
LegalityPredicate atomicOrderingAtLeastOrStrongerThan(unsigned MMOIdx,
AtomicOrdering Ordering);
} // end namespace LegalityPredicates
namespace LegalizeMutations {
/// Select this specific type for the given type index.
LegalizeMutation changeTo(unsigned TypeIdx, LLT Ty);
/// Keep the same type as the given type index.
LegalizeMutation changeTo(unsigned TypeIdx, unsigned FromTypeIdx);
/// Keep the same scalar or element type as the given type index.
LegalizeMutation changeElementTo(unsigned TypeIdx, unsigned FromTypeIdx);
/// Keep the same scalar or element type as the given type.
LegalizeMutation changeElementTo(unsigned TypeIdx, LLT Ty);
/// Keep the same scalar or element type as \p TypeIdx, but take the number of
/// elements from \p FromTypeIdx.
LegalizeMutation changeElementCountTo(unsigned TypeIdx, unsigned FromTypeIdx);
/// Keep the same scalar or element type as \p TypeIdx, but take the number of
/// elements from \p Ty.
LegalizeMutation changeElementCountTo(unsigned TypeIdx, LLT Ty);
/// Change the scalar size or element size to have the same scalar size as type
/// index \p FromIndex. Unlike changeElementTo, this discards pointer types and
/// only changes the size.
LegalizeMutation changeElementSizeTo(unsigned TypeIdx, unsigned FromTypeIdx);
/// Widen the scalar type or vector element type for the given type index to the
/// next power of 2.
LegalizeMutation widenScalarOrEltToNextPow2(unsigned TypeIdx, unsigned Min = 0);
/// Widen the scalar type or vector element type for the given type index to
/// next multiple of \p Size.
LegalizeMutation widenScalarOrEltToNextMultipleOf(unsigned TypeIdx,
unsigned Size);
/// Add more elements to the type for the given type index to the next power of
/// 2.
LegalizeMutation moreElementsToNextPow2(unsigned TypeIdx, unsigned Min = 0);
/// Break up the vector type for the given type index into the element type.
LegalizeMutation scalarize(unsigned TypeIdx);
} // end namespace LegalizeMutations
/// A single rule in a legalizer info ruleset.
/// The specified action is chosen when the predicate is true. Where appropriate
/// for the action (e.g. for WidenScalar) the new type is selected using the
/// given mutator.
class LegalizeRule {
LegalityPredicate Predicate;
LegalizeAction Action;
LegalizeMutation Mutation;
public:
LegalizeRule(LegalityPredicate Predicate, LegalizeAction Action,
LegalizeMutation Mutation = nullptr)
: Predicate(Predicate), Action(Action), Mutation(Mutation) {}
/// Test whether the LegalityQuery matches.
bool match(const LegalityQuery &Query) const {
return Predicate(Query);
}
LegalizeAction getAction() const { return Action; }
/// Determine the change to make.
std::pair<unsigned, LLT> determineMutation(const LegalityQuery &Query) const {
if (Mutation)
return Mutation(Query);
return std::make_pair(0, LLT{});
}
};
class LegalizeRuleSet {
/// When non-zero, the opcode we are an alias of
unsigned AliasOf = 0;
/// If true, there is another opcode that aliases this one
bool IsAliasedByAnother = false;
SmallVector<LegalizeRule, 2> Rules;
#ifndef NDEBUG
/// If bit I is set, this rule set contains a rule that may handle (predicate
/// or perform an action upon (or both)) the type index I. The uncertainty
/// comes from free-form rules executing user-provided lambda functions. We
/// conservatively assume such rules do the right thing and cover all type
/// indices. The bitset is intentionally 1 bit wider than it absolutely needs
/// to be to distinguish such cases from the cases where all type indices are
/// individually handled.
SmallBitVector TypeIdxsCovered{MCOI::OPERAND_LAST_GENERIC -
MCOI::OPERAND_FIRST_GENERIC + 2};
SmallBitVector ImmIdxsCovered{MCOI::OPERAND_LAST_GENERIC_IMM -
MCOI::OPERAND_FIRST_GENERIC_IMM + 2};
#endif
unsigned typeIdx(unsigned TypeIdx) {
assert(TypeIdx <=
(MCOI::OPERAND_LAST_GENERIC - MCOI::OPERAND_FIRST_GENERIC) &&
"Type Index is out of bounds");
#ifndef NDEBUG
TypeIdxsCovered.set(TypeIdx);
#endif
return TypeIdx;
}
void markAllIdxsAsCovered() {
#ifndef NDEBUG
TypeIdxsCovered.set();
ImmIdxsCovered.set();
#endif
}
void add(const LegalizeRule &Rule) {
assert(AliasOf == 0 &&
"RuleSet is aliased, change the representative opcode instead");
Rules.push_back(Rule);
}
static bool always(const LegalityQuery &) { return true; }
/// Use the given action when the predicate is true.
/// Action should not be an action that requires mutation.
LegalizeRuleSet &actionIf(LegalizeAction Action,
LegalityPredicate Predicate) {
add({Predicate, Action});
return *this;
}
/// Use the given action when the predicate is true.
/// Action should be an action that requires mutation.
LegalizeRuleSet &actionIf(LegalizeAction Action, LegalityPredicate Predicate,
LegalizeMutation Mutation) {
add({Predicate, Action, Mutation});
return *this;
}
/// Use the given action when type index 0 is any type in the given list.
/// Action should not be an action that requires mutation.
LegalizeRuleSet &actionFor(LegalizeAction Action,
std::initializer_list<LLT> Types) {
using namespace LegalityPredicates;
return actionIf(Action, typeInSet(typeIdx(0), Types));
}
/// Use the given action when type index 0 is any type in the given list.
/// Action should be an action that requires mutation.
LegalizeRuleSet &actionFor(LegalizeAction Action,
std::initializer_list<LLT> Types,
LegalizeMutation Mutation) {
using namespace LegalityPredicates;
return actionIf(Action, typeInSet(typeIdx(0), Types), Mutation);
}
/// Use the given action when type indexes 0 and 1 is any type pair in the
/// given list.
/// Action should not be an action that requires mutation.
LegalizeRuleSet &actionFor(LegalizeAction Action,
std::initializer_list<std::pair<LLT, LLT>> Types) {
using namespace LegalityPredicates;
return actionIf(Action, typePairInSet(typeIdx(0), typeIdx(1), Types));
}
/// Use the given action when type indexes 0 and 1 is any type pair in the
/// given list.
/// Action should be an action that requires mutation.
LegalizeRuleSet &actionFor(LegalizeAction Action,
std::initializer_list<std::pair<LLT, LLT>> Types,
LegalizeMutation Mutation) {
using namespace LegalityPredicates;
return actionIf(Action, typePairInSet(typeIdx(0), typeIdx(1), Types),
Mutation);
}
/// Use the given action when type index 0 is any type in the given list and
/// imm index 0 is anything. Action should not be an action that requires
/// mutation.
LegalizeRuleSet &actionForTypeWithAnyImm(LegalizeAction Action,
std::initializer_list<LLT> Types) {
using namespace LegalityPredicates;
immIdx(0); // Inform verifier imm idx 0 is handled.
return actionIf(Action, typeInSet(typeIdx(0), Types));
}
LegalizeRuleSet &actionForTypeWithAnyImm(
LegalizeAction Action, std::initializer_list<std::pair<LLT, LLT>> Types) {
using namespace LegalityPredicates;
immIdx(0); // Inform verifier imm idx 0 is handled.
return actionIf(Action, typePairInSet(typeIdx(0), typeIdx(1), Types));
}
/// Use the given action when type indexes 0 and 1 are both in the given list.
/// That is, the type pair is in the cartesian product of the list.
/// Action should not be an action that requires mutation.
LegalizeRuleSet &actionForCartesianProduct(LegalizeAction Action,
std::initializer_list<LLT> Types) {
using namespace LegalityPredicates;
return actionIf(Action, all(typeInSet(typeIdx(0), Types),
typeInSet(typeIdx(1), Types)));
}
/// Use the given action when type indexes 0 and 1 are both in their
/// respective lists.
/// That is, the type pair is in the cartesian product of the lists
/// Action should not be an action that requires mutation.
LegalizeRuleSet &
actionForCartesianProduct(LegalizeAction Action,
std::initializer_list<LLT> Types0,
std::initializer_list<LLT> Types1) {
using namespace LegalityPredicates;
return actionIf(Action, all(typeInSet(typeIdx(0), Types0),
typeInSet(typeIdx(1), Types1)));
}
/// Use the given action when type indexes 0, 1, and 2 are all in their
/// respective lists.
/// That is, the type triple is in the cartesian product of the lists
/// Action should not be an action that requires mutation.
LegalizeRuleSet &actionForCartesianProduct(
LegalizeAction Action, std::initializer_list<LLT> Types0,
std::initializer_list<LLT> Types1, std::initializer_list<LLT> Types2) {
using namespace LegalityPredicates;
return actionIf(Action, all(typeInSet(typeIdx(0), Types0),
all(typeInSet(typeIdx(1), Types1),
typeInSet(typeIdx(2), Types2))));
}
public:
LegalizeRuleSet() = default;
bool isAliasedByAnother() { return IsAliasedByAnother; }
void setIsAliasedByAnother() { IsAliasedByAnother = true; }
void aliasTo(unsigned Opcode) {
assert((AliasOf == 0 || AliasOf == Opcode) &&
"Opcode is already aliased to another opcode");
assert(Rules.empty() && "Aliasing will discard rules");
AliasOf = Opcode;
}
unsigned getAlias() const { return AliasOf; }
unsigned immIdx(unsigned ImmIdx) {
assert(ImmIdx <= (MCOI::OPERAND_LAST_GENERIC_IMM -
MCOI::OPERAND_FIRST_GENERIC_IMM) &&
"Imm Index is out of bounds");
#ifndef NDEBUG
ImmIdxsCovered.set(ImmIdx);
#endif
return ImmIdx;
}
/// The instruction is legal if predicate is true.
LegalizeRuleSet &legalIf(LegalityPredicate Predicate) {
// We have no choice but conservatively assume that the free-form
// user-provided Predicate properly handles all type indices:
markAllIdxsAsCovered();
return actionIf(LegalizeAction::Legal, Predicate);
}
/// The instruction is legal when type index 0 is any type in the given list.
LegalizeRuleSet &legalFor(std::initializer_list<LLT> Types) {
return actionFor(LegalizeAction::Legal, Types);
}
/// The instruction is legal when type indexes 0 and 1 is any type pair in the
/// given list.
LegalizeRuleSet &legalFor(std::initializer_list<std::pair<LLT, LLT>> Types) {
return actionFor(LegalizeAction::Legal, Types);
}
/// The instruction is legal when type index 0 is any type in the given list
/// and imm index 0 is anything.
LegalizeRuleSet &legalForTypeWithAnyImm(std::initializer_list<LLT> Types) {
markAllIdxsAsCovered();
return actionForTypeWithAnyImm(LegalizeAction::Legal, Types);
}
LegalizeRuleSet &legalForTypeWithAnyImm(
std::initializer_list<std::pair<LLT, LLT>> Types) {
markAllIdxsAsCovered();
return actionForTypeWithAnyImm(LegalizeAction::Legal, Types);
}
/// The instruction is legal when type indexes 0 and 1 along with the memory
/// size and minimum alignment is any type and size tuple in the given list.
LegalizeRuleSet &legalForTypesWithMemDesc(
std::initializer_list<LegalityPredicates::TypePairAndMemDesc>
TypesAndMemDesc) {
return actionIf(LegalizeAction::Legal,
LegalityPredicates::typePairAndMemDescInSet(
typeIdx(0), typeIdx(1), /*MMOIdx*/ 0, TypesAndMemDesc));
}
/// The instruction is legal when type indexes 0 and 1 are both in the given
/// list. That is, the type pair is in the cartesian product of the list.
LegalizeRuleSet &legalForCartesianProduct(std::initializer_list<LLT> Types) {
return actionForCartesianProduct(LegalizeAction::Legal, Types);
}
/// The instruction is legal when type indexes 0 and 1 are both their
/// respective lists.
LegalizeRuleSet &legalForCartesianProduct(std::initializer_list<LLT> Types0,
std::initializer_list<LLT> Types1) {
return actionForCartesianProduct(LegalizeAction::Legal, Types0, Types1);
}
/// The instruction is legal when type indexes 0, 1, and 2 are both their
/// respective lists.
LegalizeRuleSet &legalForCartesianProduct(std::initializer_list<LLT> Types0,
std::initializer_list<LLT> Types1,
std::initializer_list<LLT> Types2) {
return actionForCartesianProduct(LegalizeAction::Legal, Types0, Types1,
Types2);
}
LegalizeRuleSet &alwaysLegal() {
using namespace LegalizeMutations;
markAllIdxsAsCovered();
return actionIf(LegalizeAction::Legal, always);
}
/// The specified type index is coerced if predicate is true.
LegalizeRuleSet &bitcastIf(LegalityPredicate Predicate,
LegalizeMutation Mutation) {
// We have no choice but conservatively assume that lowering with a
// free-form user provided Predicate properly handles all type indices:
markAllIdxsAsCovered();
return actionIf(LegalizeAction::Bitcast, Predicate, Mutation);
}
/// The instruction is lowered.
LegalizeRuleSet &lower() {
using namespace LegalizeMutations;
// We have no choice but conservatively assume that predicate-less lowering
// properly handles all type indices by design:
markAllIdxsAsCovered();
return actionIf(LegalizeAction::Lower, always);
}
/// The instruction is lowered if predicate is true. Keep type index 0 as the
/// same type.
LegalizeRuleSet &lowerIf(LegalityPredicate Predicate) {
using namespace LegalizeMutations;
// We have no choice but conservatively assume that lowering with a
// free-form user provided Predicate properly handles all type indices:
markAllIdxsAsCovered();
return actionIf(LegalizeAction::Lower, Predicate);
}
/// The instruction is lowered if predicate is true.
LegalizeRuleSet &lowerIf(LegalityPredicate Predicate,
LegalizeMutation Mutation) {
// We have no choice but conservatively assume that lowering with a
// free-form user provided Predicate properly handles all type indices:
markAllIdxsAsCovered();
return actionIf(LegalizeAction::Lower, Predicate, Mutation);
}
/// The instruction is lowered when type index 0 is any type in the given
/// list. Keep type index 0 as the same type.
LegalizeRuleSet &lowerFor(std::initializer_list<LLT> Types) {
return actionFor(LegalizeAction::Lower, Types);
}
/// The instruction is lowered when type index 0 is any type in the given
/// list.
LegalizeRuleSet &lowerFor(std::initializer_list<LLT> Types,
LegalizeMutation Mutation) {
return actionFor(LegalizeAction::Lower, Types, Mutation);
}
/// The instruction is lowered when type indexes 0 and 1 is any type pair in
/// the given list. Keep type index 0 as the same type.
LegalizeRuleSet &lowerFor(std::initializer_list<std::pair<LLT, LLT>> Types) {
return actionFor(LegalizeAction::Lower, Types);
}
/// The instruction is lowered when type indexes 0 and 1 is any type pair in
/// the given list.
LegalizeRuleSet &lowerFor(std::initializer_list<std::pair<LLT, LLT>> Types,
LegalizeMutation Mutation) {
return actionFor(LegalizeAction::Lower, Types, Mutation);
}
/// The instruction is lowered when type indexes 0 and 1 are both in their
/// respective lists.
LegalizeRuleSet &lowerForCartesianProduct(std::initializer_list<LLT> Types0,
std::initializer_list<LLT> Types1) {
using namespace LegalityPredicates;
return actionForCartesianProduct(LegalizeAction::Lower, Types0, Types1);
}
/// The instruction is lowered when when type indexes 0, 1, and 2 are all in
/// their respective lists.
LegalizeRuleSet &lowerForCartesianProduct(std::initializer_list<LLT> Types0,
std::initializer_list<LLT> Types1,
std::initializer_list<LLT> Types2) {
using namespace LegalityPredicates;
return actionForCartesianProduct(LegalizeAction::Lower, Types0, Types1,
Types2);
}
/// The instruction is emitted as a library call.
LegalizeRuleSet &libcall() {
using namespace LegalizeMutations;
// We have no choice but conservatively assume that predicate-less lowering
// properly handles all type indices by design:
markAllIdxsAsCovered();
return actionIf(LegalizeAction::Libcall, always);
}
/// Like legalIf, but for the Libcall action.
LegalizeRuleSet &libcallIf(LegalityPredicate Predicate) {
// We have no choice but conservatively assume that a libcall with a
// free-form user provided Predicate properly handles all type indices:
markAllIdxsAsCovered();
return actionIf(LegalizeAction::Libcall, Predicate);
}
LegalizeRuleSet &libcallFor(std::initializer_list<LLT> Types) {
return actionFor(LegalizeAction::Libcall, Types);
}
LegalizeRuleSet &
libcallFor(std::initializer_list<std::pair<LLT, LLT>> Types) {
return actionFor(LegalizeAction::Libcall, Types);
}
LegalizeRuleSet &
libcallForCartesianProduct(std::initializer_list<LLT> Types) {
return actionForCartesianProduct(LegalizeAction::Libcall, Types);
}
LegalizeRuleSet &
libcallForCartesianProduct(std::initializer_list<LLT> Types0,
std::initializer_list<LLT> Types1) {
return actionForCartesianProduct(LegalizeAction::Libcall, Types0, Types1);
}
/// Widen the scalar to the one selected by the mutation if the predicate is
/// true.
LegalizeRuleSet &widenScalarIf(LegalityPredicate Predicate,
LegalizeMutation Mutation) {
// We have no choice but conservatively assume that an action with a
// free-form user provided Predicate properly handles all type indices:
markAllIdxsAsCovered();
return actionIf(LegalizeAction::WidenScalar, Predicate, Mutation);
}
/// Narrow the scalar to the one selected by the mutation if the predicate is
/// true.
LegalizeRuleSet &narrowScalarIf(LegalityPredicate Predicate,
LegalizeMutation Mutation) {
// We have no choice but conservatively assume that an action with a
// free-form user provided Predicate properly handles all type indices:
markAllIdxsAsCovered();
return actionIf(LegalizeAction::NarrowScalar, Predicate, Mutation);
}
/// Narrow the scalar, specified in mutation, when type indexes 0 and 1 is any
/// type pair in the given list.
LegalizeRuleSet &
narrowScalarFor(std::initializer_list<std::pair<LLT, LLT>> Types,
LegalizeMutation Mutation) {
return actionFor(LegalizeAction::NarrowScalar, Types, Mutation);
}
/// Add more elements to reach the type selected by the mutation if the
/// predicate is true.
LegalizeRuleSet &moreElementsIf(LegalityPredicate Predicate,
LegalizeMutation Mutation) {
// We have no choice but conservatively assume that an action with a
// free-form user provided Predicate properly handles all type indices:
markAllIdxsAsCovered();
return actionIf(LegalizeAction::MoreElements, Predicate, Mutation);
}
/// Remove elements to reach the type selected by the mutation if the
/// predicate is true.
LegalizeRuleSet &fewerElementsIf(LegalityPredicate Predicate,
LegalizeMutation Mutation) {
// We have no choice but conservatively assume that an action with a
// free-form user provided Predicate properly handles all type indices:
markAllIdxsAsCovered();
return actionIf(LegalizeAction::FewerElements, Predicate, Mutation);
}
/// The instruction is unsupported.
LegalizeRuleSet &unsupported() {
markAllIdxsAsCovered();
return actionIf(LegalizeAction::Unsupported, always);
}
LegalizeRuleSet &unsupportedIf(LegalityPredicate Predicate) {
return actionIf(LegalizeAction::Unsupported, Predicate);
}
LegalizeRuleSet &unsupportedFor(std::initializer_list<LLT> Types) {
return actionFor(LegalizeAction::Unsupported, Types);
}
LegalizeRuleSet &unsupportedIfMemSizeNotPow2() {
return actionIf(LegalizeAction::Unsupported,
LegalityPredicates::memSizeInBytesNotPow2(0));
}
/// Lower a memory operation if the memory size, rounded to bytes, is not a
/// power of 2. For example, this will not trigger for s1 or s7, but will for
/// s24.
LegalizeRuleSet &lowerIfMemSizeNotPow2() {
return actionIf(LegalizeAction::Lower,
LegalityPredicates::memSizeInBytesNotPow2(0));
}
/// Lower a memory operation if the memory access size is not a round power of
/// 2 byte size. This is stricter than lowerIfMemSizeNotPow2, and more likely
/// what you want (e.g. this will lower s1, s7 and s24).
LegalizeRuleSet &lowerIfMemSizeNotByteSizePow2() {
return actionIf(LegalizeAction::Lower,
LegalityPredicates::memSizeNotByteSizePow2(0));
}
LegalizeRuleSet &customIf(LegalityPredicate Predicate) {
// We have no choice but conservatively assume that a custom action with a
// free-form user provided Predicate properly handles all type indices:
markAllIdxsAsCovered();
return actionIf(LegalizeAction::Custom, Predicate);
}
LegalizeRuleSet &customFor(std::initializer_list<LLT> Types) {
return actionFor(LegalizeAction::Custom, Types);
}
/// The instruction is custom when type indexes 0 and 1 is any type pair in the
/// given list.
LegalizeRuleSet &customFor(std::initializer_list<std::pair<LLT, LLT>> Types) {
return actionFor(LegalizeAction::Custom, Types);
}
LegalizeRuleSet &customForCartesianProduct(std::initializer_list<LLT> Types) {
return actionForCartesianProduct(LegalizeAction::Custom, Types);
}
/// The instruction is custom when type indexes 0 and 1 are both in their
/// respective lists.
LegalizeRuleSet &
customForCartesianProduct(std::initializer_list<LLT> Types0,
std::initializer_list<LLT> Types1) {
return actionForCartesianProduct(LegalizeAction::Custom, Types0, Types1);
}
/// The instruction is custom when when type indexes 0, 1, and 2 are all in
/// their respective lists.
LegalizeRuleSet &
customForCartesianProduct(std::initializer_list<LLT> Types0,
std::initializer_list<LLT> Types1,
std::initializer_list<LLT> Types2) {
return actionForCartesianProduct(LegalizeAction::Custom, Types0, Types1,
Types2);
}
/// Unconditionally custom lower.
LegalizeRuleSet &custom() {
return customIf(always);
}
/// Widen the scalar to the next power of two that is at least MinSize.
/// No effect if the type is not a scalar or is a power of two.
LegalizeRuleSet &widenScalarToNextPow2(unsigned TypeIdx,
unsigned MinSize = 0) {
using namespace LegalityPredicates;
return actionIf(
LegalizeAction::WidenScalar, sizeNotPow2(typeIdx(TypeIdx)),
LegalizeMutations::widenScalarOrEltToNextPow2(TypeIdx, MinSize));
}
/// Widen the scalar to the next multiple of Size. No effect if the
/// type is not a scalar or is a multiple of Size.
LegalizeRuleSet &widenScalarToNextMultipleOf(unsigned TypeIdx,
unsigned Size) {
using namespace LegalityPredicates;
return actionIf(
LegalizeAction::WidenScalar, sizeNotMultipleOf(typeIdx(TypeIdx), Size),
LegalizeMutations::widenScalarOrEltToNextMultipleOf(TypeIdx, Size));
}
/// Widen the scalar or vector element type to the next power of two that is
/// at least MinSize. No effect if the scalar size is a power of two.
LegalizeRuleSet &widenScalarOrEltToNextPow2(unsigned TypeIdx,
unsigned MinSize = 0) {
using namespace LegalityPredicates;
return actionIf(
LegalizeAction::WidenScalar, scalarOrEltSizeNotPow2(typeIdx(TypeIdx)),
LegalizeMutations::widenScalarOrEltToNextPow2(TypeIdx, MinSize));
}
LegalizeRuleSet &narrowScalar(unsigned TypeIdx, LegalizeMutation Mutation) {
using namespace LegalityPredicates;
return actionIf(LegalizeAction::NarrowScalar, isScalar(typeIdx(TypeIdx)),
Mutation);
}
LegalizeRuleSet &scalarize(unsigned TypeIdx) {
using namespace LegalityPredicates;
return actionIf(LegalizeAction::FewerElements, isVector(typeIdx(TypeIdx)),
LegalizeMutations::scalarize(TypeIdx));
}
LegalizeRuleSet &scalarizeIf(LegalityPredicate Predicate, unsigned TypeIdx) {
using namespace LegalityPredicates;
return actionIf(LegalizeAction::FewerElements,
all(Predicate, isVector(typeIdx(TypeIdx))),
LegalizeMutations::scalarize(TypeIdx));
}
/// Ensure the scalar or element is at least as wide as Ty.
LegalizeRuleSet &minScalarOrElt(unsigned TypeIdx, const LLT Ty) {
using namespace LegalityPredicates;
using namespace LegalizeMutations;
return actionIf(LegalizeAction::WidenScalar,
scalarOrEltNarrowerThan(TypeIdx, Ty.getScalarSizeInBits()),
changeElementTo(typeIdx(TypeIdx), Ty));
}
/// Ensure the scalar or element is at least as wide as Ty.
LegalizeRuleSet &minScalarOrEltIf(LegalityPredicate Predicate,
unsigned TypeIdx, const LLT Ty) {
using namespace LegalityPredicates;
using namespace LegalizeMutations;
return actionIf(LegalizeAction::WidenScalar,
all(Predicate, scalarOrEltNarrowerThan(
TypeIdx, Ty.getScalarSizeInBits())),
changeElementTo(typeIdx(TypeIdx), Ty));
}
/// Ensure the vector size is at least as wide as VectorSize by promoting the
/// element.
LegalizeRuleSet &widenVectorEltsToVectorMinSize(unsigned TypeIdx,
unsigned VectorSize) {
using namespace LegalityPredicates;
using namespace LegalizeMutations;
return actionIf(
LegalizeAction::WidenScalar,
[=](const LegalityQuery &Query) {
const LLT VecTy = Query.Types[TypeIdx];
return VecTy.isVector() && !VecTy.isScalable() &&
VecTy.getSizeInBits() < VectorSize;
},
[=](const LegalityQuery &Query) {
const LLT VecTy = Query.Types[TypeIdx];
unsigned NumElts = VecTy.getNumElements();
unsigned MinSize = VectorSize / NumElts;
LLT NewTy = LLT::fixed_vector(NumElts, LLT::scalar(MinSize));
return std::make_pair(TypeIdx, NewTy);
});
}
/// Ensure the scalar is at least as wide as Ty.
LegalizeRuleSet &minScalar(unsigned TypeIdx, const LLT Ty) {
using namespace LegalityPredicates;
using namespace LegalizeMutations;
return actionIf(LegalizeAction::WidenScalar,
scalarNarrowerThan(TypeIdx, Ty.getSizeInBits()),
changeTo(typeIdx(TypeIdx), Ty));
}
/// Ensure the scalar is at least as wide as Ty if condition is met.
LegalizeRuleSet &minScalarIf(LegalityPredicate Predicate, unsigned TypeIdx,
const LLT Ty) {
using namespace LegalityPredicates;
using namespace LegalizeMutations;
return actionIf(
LegalizeAction::WidenScalar,
[=](const LegalityQuery &Query) {
const LLT QueryTy = Query.Types[TypeIdx];
return QueryTy.isScalar() &&
QueryTy.getSizeInBits() < Ty.getSizeInBits() &&
Predicate(Query);
},
changeTo(typeIdx(TypeIdx), Ty));
}
/// Ensure the scalar is at most as wide as Ty.
LegalizeRuleSet &maxScalarOrElt(unsigned TypeIdx, const LLT Ty) {
using namespace LegalityPredicates;
using namespace LegalizeMutations;
return actionIf(LegalizeAction::NarrowScalar,
scalarOrEltWiderThan(TypeIdx, Ty.getScalarSizeInBits()),
changeElementTo(typeIdx(TypeIdx), Ty));
}
/// Ensure the scalar is at most as wide as Ty.
LegalizeRuleSet &maxScalar(unsigned TypeIdx, const LLT Ty) {
using namespace LegalityPredicates;
using namespace LegalizeMutations;
return actionIf(LegalizeAction::NarrowScalar,
scalarWiderThan(TypeIdx, Ty.getSizeInBits()),
changeTo(typeIdx(TypeIdx), Ty));
}
/// Conditionally limit the maximum size of the scalar.
/// For example, when the maximum size of one type depends on the size of
/// another such as extracting N bits from an M bit container.
LegalizeRuleSet &maxScalarIf(LegalityPredicate Predicate, unsigned TypeIdx,
const LLT Ty) {
using namespace LegalityPredicates;
using namespace LegalizeMutations;
return actionIf(
LegalizeAction::NarrowScalar,
[=](const LegalityQuery &Query) {
const LLT QueryTy = Query.Types[TypeIdx];
return QueryTy.isScalar() &&
QueryTy.getSizeInBits() > Ty.getSizeInBits() &&
Predicate(Query);
},
changeElementTo(typeIdx(TypeIdx), Ty));
}
/// Limit the range of scalar sizes to MinTy and MaxTy.
LegalizeRuleSet &clampScalar(unsigned TypeIdx, const LLT MinTy,
const LLT MaxTy) {
assert(MinTy.isScalar() && MaxTy.isScalar() && "Expected scalar types");
return minScalar(TypeIdx, MinTy).maxScalar(TypeIdx, MaxTy);
}
/// Limit the range of scalar sizes to MinTy and MaxTy.
LegalizeRuleSet &clampScalarOrElt(unsigned TypeIdx, const LLT MinTy,
const LLT MaxTy) {
return minScalarOrElt(TypeIdx, MinTy).maxScalarOrElt(TypeIdx, MaxTy);
}
/// Widen the scalar to match the size of another.
LegalizeRuleSet &minScalarSameAs(unsigned TypeIdx, unsigned LargeTypeIdx) {
typeIdx(TypeIdx);
return widenScalarIf(
[=](const LegalityQuery &Query) {
return Query.Types[LargeTypeIdx].getScalarSizeInBits() >
Query.Types[TypeIdx].getSizeInBits();
},
LegalizeMutations::changeElementSizeTo(TypeIdx, LargeTypeIdx));
}
/// Narrow the scalar to match the size of another.
LegalizeRuleSet &maxScalarSameAs(unsigned TypeIdx, unsigned NarrowTypeIdx) {
typeIdx(TypeIdx);
return narrowScalarIf(
[=](const LegalityQuery &Query) {
return Query.Types[NarrowTypeIdx].getScalarSizeInBits() <
Query.Types[TypeIdx].getSizeInBits();
},
LegalizeMutations::changeElementSizeTo(TypeIdx, NarrowTypeIdx));
}
/// Change the type \p TypeIdx to have the same scalar size as type \p
/// SameSizeIdx.
LegalizeRuleSet &scalarSameSizeAs(unsigned TypeIdx, unsigned SameSizeIdx) {
return minScalarSameAs(TypeIdx, SameSizeIdx)
.maxScalarSameAs(TypeIdx, SameSizeIdx);
}
/// Conditionally widen the scalar or elt to match the size of another.
LegalizeRuleSet &minScalarEltSameAsIf(LegalityPredicate Predicate,
unsigned TypeIdx, unsigned LargeTypeIdx) {
typeIdx(TypeIdx);
return widenScalarIf(
[=](const LegalityQuery &Query) {
return Query.Types[LargeTypeIdx].getScalarSizeInBits() >
Query.Types[TypeIdx].getScalarSizeInBits() &&
Predicate(Query);
},
[=](const LegalityQuery &Query) {
LLT T = Query.Types[LargeTypeIdx];
if (T.isVector() && T.getElementType().isPointer())
T = T.changeElementType(LLT::scalar(T.getScalarSizeInBits()));
return std::make_pair(TypeIdx, T);
});
}
/// Conditionally narrow the scalar or elt to match the size of another.
LegalizeRuleSet &maxScalarEltSameAsIf(LegalityPredicate Predicate,
unsigned TypeIdx,
unsigned SmallTypeIdx) {
typeIdx(TypeIdx);
return narrowScalarIf(
[=](const LegalityQuery &Query) {
return Query.Types[SmallTypeIdx].getScalarSizeInBits() <
Query.Types[TypeIdx].getScalarSizeInBits() &&
Predicate(Query);
},
[=](const LegalityQuery &Query) {
LLT T = Query.Types[SmallTypeIdx];
return std::make_pair(TypeIdx, T);
});
}
/// Add more elements to the vector to reach the next power of two.
/// No effect if the type is not a vector or the element count is a power of
/// two.
LegalizeRuleSet &moreElementsToNextPow2(unsigned TypeIdx) {
using namespace LegalityPredicates;
return actionIf(LegalizeAction::MoreElements,
numElementsNotPow2(typeIdx(TypeIdx)),
LegalizeMutations::moreElementsToNextPow2(TypeIdx));
}
/// Limit the number of elements in EltTy vectors to at least MinElements.
LegalizeRuleSet &clampMinNumElements(unsigned TypeIdx, const LLT EltTy,
unsigned MinElements) {
// Mark the type index as covered:
typeIdx(TypeIdx);
return actionIf(
LegalizeAction::MoreElements,
[=](const LegalityQuery &Query) {
LLT VecTy = Query.Types[TypeIdx];
return VecTy.isVector() && VecTy.getElementType() == EltTy &&
VecTy.getNumElements() < MinElements;
},
[=](const LegalityQuery &Query) {
LLT VecTy = Query.Types[TypeIdx];
return std::make_pair(
TypeIdx, LLT::fixed_vector(MinElements, VecTy.getElementType()));
});
}
/// Set number of elements to nearest larger multiple of NumElts.
LegalizeRuleSet &alignNumElementsTo(unsigned TypeIdx, const LLT EltTy,
unsigned NumElts) {
typeIdx(TypeIdx);
return actionIf(
LegalizeAction::MoreElements,
[=](const LegalityQuery &Query) {
LLT VecTy = Query.Types[TypeIdx];
return VecTy.isVector() && VecTy.getElementType() == EltTy &&
(VecTy.getNumElements() % NumElts != 0);
},
[=](const LegalityQuery &Query) {
LLT VecTy = Query.Types[TypeIdx];
unsigned NewSize = alignTo(VecTy.getNumElements(), NumElts);
return std::make_pair(
TypeIdx, LLT::fixed_vector(NewSize, VecTy.getElementType()));
});
}
/// Limit the number of elements in EltTy vectors to at most MaxElements.
LegalizeRuleSet &clampMaxNumElements(unsigned TypeIdx, const LLT EltTy,
unsigned MaxElements) {
// Mark the type index as covered:
typeIdx(TypeIdx);
return actionIf(
LegalizeAction::FewerElements,
[=](const LegalityQuery &Query) {
LLT VecTy = Query.Types[TypeIdx];
return VecTy.isVector() && VecTy.getElementType() == EltTy &&
VecTy.getNumElements() > MaxElements;
},
[=](const LegalityQuery &Query) {
LLT VecTy = Query.Types[TypeIdx];
LLT NewTy = LLT::scalarOrVector(ElementCount::getFixed(MaxElements),
VecTy.getElementType());
return std::make_pair(TypeIdx, NewTy);
});
}
/// Limit the number of elements for the given vectors to at least MinTy's
/// number of elements and at most MaxTy's number of elements.
///
/// No effect if the type is not a vector or does not have the same element
/// type as the constraints.
/// The element type of MinTy and MaxTy must match.
LegalizeRuleSet &clampNumElements(unsigned TypeIdx, const LLT MinTy,
const LLT MaxTy) {
assert(MinTy.getElementType() == MaxTy.getElementType() &&
"Expected element types to agree");
const LLT EltTy = MinTy.getElementType();
return clampMinNumElements(TypeIdx, EltTy, MinTy.getNumElements())
.clampMaxNumElements(TypeIdx, EltTy, MaxTy.getNumElements());
}
/// Express \p EltTy vectors strictly using vectors with \p NumElts elements
/// (or scalars when \p NumElts equals 1).
/// First pad with undef elements to nearest larger multiple of \p NumElts.
/// Then perform split with all sub-instructions having the same type.
/// Using clampMaxNumElements (non-strict) can result in leftover instruction
/// with different type (fewer elements then \p NumElts or scalar).
/// No effect if the type is not a vector.
LegalizeRuleSet &clampMaxNumElementsStrict(unsigned TypeIdx, const LLT EltTy,
unsigned NumElts) {
return alignNumElementsTo(TypeIdx, EltTy, NumElts)
.clampMaxNumElements(TypeIdx, EltTy, NumElts);
}
/// Fallback on the previous implementation. This should only be used while
/// porting a rule.
LegalizeRuleSet &fallback() {
add({always, LegalizeAction::UseLegacyRules});
return *this;
}
/// Check if there is no type index which is obviously not handled by the
/// LegalizeRuleSet in any way at all.
/// \pre Type indices of the opcode form a dense [0, \p NumTypeIdxs) set.
bool verifyTypeIdxsCoverage(unsigned NumTypeIdxs) const;
/// Check if there is no imm index which is obviously not handled by the
/// LegalizeRuleSet in any way at all.
/// \pre Type indices of the opcode form a dense [0, \p NumTypeIdxs) set.
bool verifyImmIdxsCoverage(unsigned NumImmIdxs) const;
/// Apply the ruleset to the given LegalityQuery.
LegalizeActionStep apply(const LegalityQuery &Query) const;
};
class LegalizerInfo {
public:
virtual ~LegalizerInfo() = default;
const LegacyLegalizerInfo &getLegacyLegalizerInfo() const {
return LegacyInfo;
}
LegacyLegalizerInfo &getLegacyLegalizerInfo() { return LegacyInfo; }
unsigned getOpcodeIdxForOpcode(unsigned Opcode) const;
unsigned getActionDefinitionsIdx(unsigned Opcode) const;
/// Perform simple self-diagnostic and assert if there is anything obviously
/// wrong with the actions set up.
void verify(const MCInstrInfo &MII) const;
/// Get the action definitions for the given opcode. Use this to run a
/// LegalityQuery through the definitions.
const LegalizeRuleSet &getActionDefinitions(unsigned Opcode) const;
/// Get the action definition builder for the given opcode. Use this to define
/// the action definitions.
///
/// It is an error to request an opcode that has already been requested by the
/// multiple-opcode variant.
LegalizeRuleSet &getActionDefinitionsBuilder(unsigned Opcode);
/// Get the action definition builder for the given set of opcodes. Use this
/// to define the action definitions for multiple opcodes at once. The first
/// opcode given will be considered the representative opcode and will hold
/// the definitions whereas the other opcodes will be configured to refer to
/// the representative opcode. This lowers memory requirements and very
/// slightly improves performance.
///
/// It would be very easy to introduce unexpected side-effects as a result of
/// this aliasing if it were permitted to request different but intersecting
/// sets of opcodes but that is difficult to keep track of. It is therefore an
/// error to request the same opcode twice using this API, to request an
/// opcode that already has definitions, or to use the single-opcode API on an
/// opcode that has already been requested by this API.
LegalizeRuleSet &
getActionDefinitionsBuilder(std::initializer_list<unsigned> Opcodes);
void aliasActionDefinitions(unsigned OpcodeTo, unsigned OpcodeFrom);
/// Determine what action should be taken to legalize the described
/// instruction. Requires computeTables to have been called.
///
/// \returns a description of the next legalization step to perform.
LegalizeActionStep getAction(const LegalityQuery &Query) const;
/// Determine what action should be taken to legalize the given generic
/// instruction.
///
/// \returns a description of the next legalization step to perform.
LegalizeActionStep getAction(const MachineInstr &MI,
const MachineRegisterInfo &MRI) const;
bool isLegal(const LegalityQuery &Query) const {
return getAction(Query).Action == LegalizeAction::Legal;
}
bool isLegalOrCustom(const LegalityQuery &Query) const {
auto Action = getAction(Query).Action;
return Action == LegalizeAction::Legal || Action == LegalizeAction::Custom;
}
bool isLegal(const MachineInstr &MI, const MachineRegisterInfo &MRI) const;
bool isLegalOrCustom(const MachineInstr &MI,
const MachineRegisterInfo &MRI) const;
/// Called for instructions with the Custom LegalizationAction.
virtual bool legalizeCustom(LegalizerHelper &Helper,
MachineInstr &MI) const {
llvm_unreachable("must implement this if custom action is used");
}
/// \returns true if MI is either legal or has been legalized and false if not
/// legal.
/// Return true if MI is either legal or has been legalized and false
/// if not legal.
virtual bool legalizeIntrinsic(LegalizerHelper &Helper,
MachineInstr &MI) const {
return true;
}
/// Return the opcode (SEXT/ZEXT/ANYEXT) that should be performed while
/// widening a constant of type SmallTy which targets can override.
/// For eg, the DAG does (SmallTy.isByteSized() ? G_SEXT : G_ZEXT) which
/// will be the default.
virtual unsigned getExtOpcodeForWideningConstant(LLT SmallTy) const;
private:
static const int FirstOp = TargetOpcode::PRE_ISEL_GENERIC_OPCODE_START;
static const int LastOp = TargetOpcode::PRE_ISEL_GENERIC_OPCODE_END;
LegalizeRuleSet RulesForOpcode[LastOp - FirstOp + 1];
LegacyLegalizerInfo LegacyInfo;
};
#ifndef NDEBUG
/// Checks that MIR is fully legal, returns an illegal instruction if it's not,
/// nullptr otherwise
const MachineInstr *machineFunctionIsIllegal(const MachineFunction &MF);
#endif
} // end namespace llvm.
#endif // LLVM_CODEGEN_GLOBALISEL_LEGALIZERINFO_H
PK iwFZ(��zi# i# CodeGen/GlobalISel/CSEInfo.hnu �[��� //===- llvm/CodeGen/GlobalISel/CSEInfo.h ------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// Provides analysis for continuously CSEing during GISel passes.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_CSEINFO_H
#define LLVM_CODEGEN_GLOBALISEL_CSEINFO_H
#include "llvm/ADT/FoldingSet.h"
#include "llvm/CodeGen/CSEConfigBase.h"
#include "llvm/CodeGen/GlobalISel/GISelChangeObserver.h"
#include "llvm/CodeGen/GlobalISel/GISelWorkList.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/CodeGen.h"
namespace llvm {
class MachineBasicBlock;
/// A class that wraps MachineInstrs and derives from FoldingSetNode in order to
/// be uniqued in a CSEMap. The tradeoff here is extra memory allocations for
/// UniqueMachineInstr vs making MachineInstr bigger.
class UniqueMachineInstr : public FoldingSetNode {
friend class GISelCSEInfo;
const MachineInstr *MI;
explicit UniqueMachineInstr(const MachineInstr *MI) : MI(MI) {}
public:
void Profile(FoldingSetNodeID &ID);
};
// A CSE config for fully optimized builds.
class CSEConfigFull : public CSEConfigBase {
public:
virtual ~CSEConfigFull() = default;
bool shouldCSEOpc(unsigned Opc) override;
};
// Commonly used for O0 config.
class CSEConfigConstantOnly : public CSEConfigBase {
public:
virtual ~CSEConfigConstantOnly() = default;
bool shouldCSEOpc(unsigned Opc) override;
};
// Returns the standard expected CSEConfig for the given optimization level.
// We have this logic here so targets can make use of it from their derived
// TargetPassConfig, but can't put this logic into TargetPassConfig directly
// because the CodeGen library can't depend on GlobalISel.
std::unique_ptr<CSEConfigBase>
getStandardCSEConfigForOpt(CodeGenOpt::Level Level);
/// The CSE Analysis object.
/// This installs itself as a delegate to the MachineFunction to track
/// new instructions as well as deletions. It however will not be able to
/// track instruction mutations. In such cases, recordNewInstruction should be
/// called (for eg inside MachineIRBuilder::recordInsertion).
/// Also because of how just the instruction can be inserted without adding any
/// operands to the instruction, instructions are uniqued and inserted lazily.
/// CSEInfo should assert when trying to enter an incomplete instruction into
/// the CSEMap. There is Opcode level granularity on which instructions can be
/// CSE'd and for now, only Generic instructions are CSEable.
class GISelCSEInfo : public GISelChangeObserver {
// Make it accessible only to CSEMIRBuilder.
friend class CSEMIRBuilder;
BumpPtrAllocator UniqueInstrAllocator;
FoldingSet<UniqueMachineInstr> CSEMap;
MachineRegisterInfo *MRI = nullptr;
MachineFunction *MF = nullptr;
std::unique_ptr<CSEConfigBase> CSEOpt;
/// Keep a cache of UniqueInstrs for each MachineInstr. In GISel,
/// often instructions are mutated (while their ID has completely changed).
/// Whenever mutation happens, invalidate the UniqueMachineInstr for the
/// MachineInstr
DenseMap<const MachineInstr *, UniqueMachineInstr *> InstrMapping;
/// Store instructions that are not fully formed in TemporaryInsts.
/// Also because CSE insertion happens lazily, we can remove insts from this
/// list and avoid inserting and then removing from the CSEMap.
GISelWorkList<8> TemporaryInsts;
// Only used in asserts.
DenseMap<unsigned, unsigned> OpcodeHitTable;
bool isUniqueMachineInstValid(const UniqueMachineInstr &UMI) const;
void invalidateUniqueMachineInstr(UniqueMachineInstr *UMI);
UniqueMachineInstr *getNodeIfExists(FoldingSetNodeID &ID,
MachineBasicBlock *MBB, void *&InsertPos);
/// Allocate and construct a new UniqueMachineInstr for MI and return.
UniqueMachineInstr *getUniqueInstrForMI(const MachineInstr *MI);
void insertNode(UniqueMachineInstr *UMI, void *InsertPos = nullptr);
/// Get the MachineInstr(Unique) if it exists already in the CSEMap and the
/// same MachineBasicBlock.
MachineInstr *getMachineInstrIfExists(FoldingSetNodeID &ID,
MachineBasicBlock *MBB,
void *&InsertPos);
/// Use this method to allocate a new UniqueMachineInstr for MI and insert it
/// into the CSEMap. MI should return true for shouldCSE(MI->getOpcode())
void insertInstr(MachineInstr *MI, void *InsertPos = nullptr);
bool HandlingRecordedInstrs = false;
public:
GISelCSEInfo() = default;
virtual ~GISelCSEInfo();
void setMF(MachineFunction &MF);
Error verify();
/// Records a newly created inst in a list and lazily insert it to the CSEMap.
/// Sometimes, this method might be called with a partially constructed
/// MachineInstr,
// (right after BuildMI without adding any operands) - and in such cases,
// defer the hashing of the instruction to a later stage.
void recordNewInstruction(MachineInstr *MI);
/// Use this callback to inform CSE about a newly fully created instruction.
void handleRecordedInst(MachineInstr *MI);
/// Use this callback to insert all the recorded instructions. At this point,
/// all of these insts need to be fully constructed and should not be missing
/// any operands.
void handleRecordedInsts();
/// Remove this inst from the CSE map. If this inst has not been inserted yet,
/// it will be removed from the Tempinsts list if it exists.
void handleRemoveInst(MachineInstr *MI);
void releaseMemory();
void setCSEConfig(std::unique_ptr<CSEConfigBase> Opt) {
CSEOpt = std::move(Opt);
}
bool shouldCSE(unsigned Opc) const;
void analyze(MachineFunction &MF);
void countOpcodeHit(unsigned Opc);
void print();
// Observer API
void erasingInstr(MachineInstr &MI) override;
void createdInstr(MachineInstr &MI) override;
void changingInstr(MachineInstr &MI) override;
void changedInstr(MachineInstr &MI) override;
};
class TargetRegisterClass;
class RegisterBank;
// Simple builder class to easily profile properties about MIs.
class GISelInstProfileBuilder {
FoldingSetNodeID &ID;
const MachineRegisterInfo &MRI;
public:
GISelInstProfileBuilder(FoldingSetNodeID &ID, const MachineRegisterInfo &MRI)
: ID(ID), MRI(MRI) {}
// Profiling methods.
const GISelInstProfileBuilder &addNodeIDOpcode(unsigned Opc) const;
const GISelInstProfileBuilder &addNodeIDRegType(const LLT Ty) const;
const GISelInstProfileBuilder &addNodeIDRegType(const Register) const;
const GISelInstProfileBuilder &
addNodeIDRegType(const TargetRegisterClass *RC) const;
const GISelInstProfileBuilder &addNodeIDRegType(const RegisterBank *RB) const;
const GISelInstProfileBuilder &addNodeIDRegNum(Register Reg) const;
const GISelInstProfileBuilder &addNodeIDReg(Register Reg) const;
const GISelInstProfileBuilder &addNodeIDImmediate(int64_t Imm) const;
const GISelInstProfileBuilder &
addNodeIDMBB(const MachineBasicBlock *MBB) const;
const GISelInstProfileBuilder &
addNodeIDMachineOperand(const MachineOperand &MO) const;
const GISelInstProfileBuilder &addNodeIDFlag(unsigned Flag) const;
const GISelInstProfileBuilder &addNodeID(const MachineInstr *MI) const;
};
/// Simple wrapper that does the following.
/// 1) Lazily evaluate the MachineFunction to compute CSEable instructions.
/// 2) Allows configuration of which instructions are CSEd through CSEConfig
/// object. Provides a method called get which takes a CSEConfig object.
class GISelCSEAnalysisWrapper {
GISelCSEInfo Info;
MachineFunction *MF = nullptr;
bool AlreadyComputed = false;
public:
/// Takes a CSEConfigBase object that defines what opcodes get CSEd.
/// If CSEConfig is already set, and the CSE Analysis has been preserved,
/// it will not use the new CSEOpt(use Recompute to force using the new
/// CSEOpt).
GISelCSEInfo &get(std::unique_ptr<CSEConfigBase> CSEOpt,
bool ReCompute = false);
void setMF(MachineFunction &MFunc) { MF = &MFunc; }
void setComputed(bool Computed) { AlreadyComputed = Computed; }
void releaseMemory() { Info.releaseMemory(); }
};
/// The actual analysis pass wrapper.
class GISelCSEAnalysisWrapperPass : public MachineFunctionPass {
GISelCSEAnalysisWrapper Wrapper;
public:
static char ID;
GISelCSEAnalysisWrapperPass();
void getAnalysisUsage(AnalysisUsage &AU) const override;
const GISelCSEAnalysisWrapper &getCSEWrapper() const { return Wrapper; }
GISelCSEAnalysisWrapper &getCSEWrapper() { return Wrapper; }
bool runOnMachineFunction(MachineFunction &MF) override;
void releaseMemory() override {
Wrapper.releaseMemory();
Wrapper.setComputed(false);
}
};
} // namespace llvm
#endif
PK iwFZyd�� � CodeGen/GlobalISel/Localizer.hnu �[��� //== llvm/CodeGen/GlobalISel/Localizer.h - Localizer -------------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file This file describes the interface of the Localizer pass.
/// This pass moves/duplicates constant-like instructions close to their uses.
/// Its primarily goal is to workaround the deficiencies of the fast register
/// allocator.
/// With GlobalISel constants are all materialized in the entry block of
/// a function. However, the fast allocator cannot rematerialize constants and
/// has a lot more live-ranges to deal with and will most likely end up
/// spilling a lot.
/// By pushing the constants close to their use, we only create small
/// live-ranges.
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_LOCALIZER_H
#define LLVM_CODEGEN_GLOBALISEL_LOCALIZER_H
#include "llvm/ADT/SetVector.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
namespace llvm {
// Forward declarations.
class AnalysisUsage;
class MachineBasicBlock;
class MachineInstr;
class MachineOperand;
class MachineRegisterInfo;
class TargetTransformInfo;
/// This pass implements the localization mechanism described at the
/// top of this file. One specificity of the implementation is that
/// it will materialize one and only one instance of a constant per
/// basic block, thus enabling reuse of that constant within that block.
/// Moreover, it only materializes constants in blocks where they
/// are used. PHI uses are considered happening at the end of the
/// related predecessor.
class Localizer : public MachineFunctionPass {
public:
static char ID;
private:
/// An input function to decide if the pass should run or not
/// on the given MachineFunction.
std::function<bool(const MachineFunction &)> DoNotRunPass;
/// MRI contains all the register class/bank information that this
/// pass uses and updates.
MachineRegisterInfo *MRI = nullptr;
/// TTI used for getting remat costs for instructions.
TargetTransformInfo *TTI = nullptr;
/// Check if \p MOUse is used in the same basic block as \p Def.
/// If the use is in the same block, we say it is local.
/// When the use is not local, \p InsertMBB will contain the basic
/// block when to insert \p Def to have a local use.
static bool isLocalUse(MachineOperand &MOUse, const MachineInstr &Def,
MachineBasicBlock *&InsertMBB);
/// Initialize the field members using \p MF.
void init(MachineFunction &MF);
typedef SmallSetVector<MachineInstr *, 32> LocalizedSetVecT;
/// If \p Op is a phi operand and not unique in that phi, that is,
/// there are other operands in the phi with the same register,
/// return true.
bool isNonUniquePhiValue(MachineOperand &Op) const;
/// Do inter-block localization from the entry block.
bool localizeInterBlock(MachineFunction &MF,
LocalizedSetVecT &LocalizedInstrs);
/// Do intra-block localization of already localized instructions.
bool localizeIntraBlock(LocalizedSetVecT &LocalizedInstrs);
public:
Localizer();
Localizer(std::function<bool(const MachineFunction &)>);
StringRef getPassName() const override { return "Localizer"; }
MachineFunctionProperties getRequiredProperties() const override {
return MachineFunctionProperties()
.set(MachineFunctionProperties::Property::IsSSA);
}
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnMachineFunction(MachineFunction &MF) override;
};
} // End namespace llvm.
#endif
PK iwFZ,�مa� a� # CodeGen/GlobalISel/CombinerHelper.hnu �[��� //===-- llvm/CodeGen/GlobalISel/CombinerHelper.h --------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===--------------------------------------------------------------------===//
/// \file
/// This contains common combine transformations that may be used in a combine
/// pass,or by the target elsewhere.
/// Targets can pick individual opcode transformations from the helper or use
/// tryCombine which invokes all transformations. All of the transformations
/// return true if the MachineInstruction changed and false otherwise.
///
//===--------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_COMBINERHELPER_H
#define LLVM_CODEGEN_GLOBALISEL_COMBINERHELPER_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/LowLevelType.h"
#include "llvm/CodeGen/Register.h"
#include "llvm/IR/InstrTypes.h"
#include <functional>
namespace llvm {
class GISelChangeObserver;
class APFloat;
class APInt;
class ConstantFP;
class GPtrAdd;
class GStore;
class GZExtLoad;
class MachineIRBuilder;
class MachineInstrBuilder;
class MachineRegisterInfo;
class MachineInstr;
class MachineOperand;
class GISelKnownBits;
class MachineDominatorTree;
class LegalizerInfo;
struct LegalityQuery;
class RegisterBank;
class RegisterBankInfo;
class TargetLowering;
class TargetRegisterInfo;
struct PreferredTuple {
LLT Ty; // The result type of the extend.
unsigned ExtendOpcode; // G_ANYEXT/G_SEXT/G_ZEXT
MachineInstr *MI;
};
struct IndexedLoadStoreMatchInfo {
Register Addr;
Register Base;
Register Offset;
bool IsPre;
};
struct PtrAddChain {
int64_t Imm;
Register Base;
const RegisterBank *Bank;
};
struct RegisterImmPair {
Register Reg;
int64_t Imm;
};
struct ShiftOfShiftedLogic {
MachineInstr *Logic;
MachineInstr *Shift2;
Register LogicNonShiftReg;
uint64_t ValSum;
};
using BuildFnTy = std::function<void(MachineIRBuilder &)>;
using OperandBuildSteps =
SmallVector<std::function<void(MachineInstrBuilder &)>, 4>;
struct InstructionBuildSteps {
unsigned Opcode = 0; /// The opcode for the produced instruction.
OperandBuildSteps OperandFns; /// Operands to be added to the instruction.
InstructionBuildSteps() = default;
InstructionBuildSteps(unsigned Opcode, const OperandBuildSteps &OperandFns)
: Opcode(Opcode), OperandFns(OperandFns) {}
};
struct InstructionStepsMatchInfo {
/// Describes instructions to be built during a combine.
SmallVector<InstructionBuildSteps, 2> InstrsToBuild;
InstructionStepsMatchInfo() = default;
InstructionStepsMatchInfo(
std::initializer_list<InstructionBuildSteps> InstrsToBuild)
: InstrsToBuild(InstrsToBuild) {}
};
class CombinerHelper {
protected:
MachineIRBuilder &Builder;
MachineRegisterInfo &MRI;
GISelChangeObserver &Observer;
GISelKnownBits *KB;
MachineDominatorTree *MDT;
bool IsPreLegalize;
const LegalizerInfo *LI;
const RegisterBankInfo *RBI;
const TargetRegisterInfo *TRI;
public:
CombinerHelper(GISelChangeObserver &Observer, MachineIRBuilder &B,
bool IsPreLegalize,
GISelKnownBits *KB = nullptr,
MachineDominatorTree *MDT = nullptr,
const LegalizerInfo *LI = nullptr);
GISelKnownBits *getKnownBits() const {
return KB;
}
MachineIRBuilder &getBuilder() const {
return Builder;
}
const TargetLowering &getTargetLowering() const;
/// \returns true if the combiner is running pre-legalization.
bool isPreLegalize() const;
/// \returns true if \p Query is legal on the target.
bool isLegal(const LegalityQuery &Query) const;
/// \return true if the combine is running prior to legalization, or if \p
/// Query is legal on the target.
bool isLegalOrBeforeLegalizer(const LegalityQuery &Query) const;
/// \return true if the combine is running prior to legalization, or if \p Ty
/// is a legal integer constant type on the target.
bool isConstantLegalOrBeforeLegalizer(const LLT Ty) const;
/// MachineRegisterInfo::replaceRegWith() and inform the observer of the changes
void replaceRegWith(MachineRegisterInfo &MRI, Register FromReg, Register ToReg) const;
/// Replace a single register operand with a new register and inform the
/// observer of the changes.
void replaceRegOpWith(MachineRegisterInfo &MRI, MachineOperand &FromRegOp,
Register ToReg) const;
/// Replace the opcode in instruction with a new opcode and inform the
/// observer of the changes.
void replaceOpcodeWith(MachineInstr &FromMI, unsigned ToOpcode) const;
/// Get the register bank of \p Reg.
/// If Reg has not been assigned a register, a register class,
/// or a register bank, then this returns nullptr.
///
/// \pre Reg.isValid()
const RegisterBank *getRegBank(Register Reg) const;
/// Set the register bank of \p Reg.
/// Does nothing if the RegBank is null.
/// This is the counterpart to getRegBank.
void setRegBank(Register Reg, const RegisterBank *RegBank);
/// If \p MI is COPY, try to combine it.
/// Returns true if MI changed.
bool tryCombineCopy(MachineInstr &MI);
bool matchCombineCopy(MachineInstr &MI);
void applyCombineCopy(MachineInstr &MI);
/// Returns true if \p DefMI precedes \p UseMI or they are the same
/// instruction. Both must be in the same basic block.
bool isPredecessor(const MachineInstr &DefMI, const MachineInstr &UseMI);
/// Returns true if \p DefMI dominates \p UseMI. By definition an
/// instruction dominates itself.
///
/// If we haven't been provided with a MachineDominatorTree during
/// construction, this function returns a conservative result that tracks just
/// a single basic block.
bool dominates(const MachineInstr &DefMI, const MachineInstr &UseMI);
/// If \p MI is extend that consumes the result of a load, try to combine it.
/// Returns true if MI changed.
bool tryCombineExtendingLoads(MachineInstr &MI);
bool matchCombineExtendingLoads(MachineInstr &MI, PreferredTuple &MatchInfo);
void applyCombineExtendingLoads(MachineInstr &MI, PreferredTuple &MatchInfo);
/// Match (and (load x), mask) -> zextload x
bool matchCombineLoadWithAndMask(MachineInstr &MI, BuildFnTy &MatchInfo);
/// Combine \p MI into a pre-indexed or post-indexed load/store operation if
/// legal and the surrounding code makes it useful.
bool tryCombineIndexedLoadStore(MachineInstr &MI);
bool matchCombineIndexedLoadStore(MachineInstr &MI, IndexedLoadStoreMatchInfo &MatchInfo);
void applyCombineIndexedLoadStore(MachineInstr &MI, IndexedLoadStoreMatchInfo &MatchInfo);
bool matchSextTruncSextLoad(MachineInstr &MI);
void applySextTruncSextLoad(MachineInstr &MI);
/// Match sext_inreg(load p), imm -> sextload p
bool matchSextInRegOfLoad(MachineInstr &MI, std::tuple<Register, unsigned> &MatchInfo);
void applySextInRegOfLoad(MachineInstr &MI, std::tuple<Register, unsigned> &MatchInfo);
/// Try to combine G_[SU]DIV and G_[SU]REM into a single G_[SU]DIVREM
/// when their source operands are identical.
bool matchCombineDivRem(MachineInstr &MI, MachineInstr *&OtherMI);
void applyCombineDivRem(MachineInstr &MI, MachineInstr *&OtherMI);
/// If a brcond's true block is not the fallthrough, make it so by inverting
/// the condition and swapping operands.
bool matchOptBrCondByInvertingCond(MachineInstr &MI, MachineInstr *&BrCond);
void applyOptBrCondByInvertingCond(MachineInstr &MI, MachineInstr *&BrCond);
/// If \p MI is G_CONCAT_VECTORS, try to combine it.
/// Returns true if MI changed.
/// Right now, we support:
/// - concat_vector(undef, undef) => undef
/// - concat_vector(build_vector(A, B), build_vector(C, D)) =>
/// build_vector(A, B, C, D)
///
/// \pre MI.getOpcode() == G_CONCAT_VECTORS.
bool tryCombineConcatVectors(MachineInstr &MI);
/// Check if the G_CONCAT_VECTORS \p MI is undef or if it
/// can be flattened into a build_vector.
/// In the first case \p IsUndef will be true.
/// In the second case \p Ops will contain the operands needed
/// to produce the flattened build_vector.
///
/// \pre MI.getOpcode() == G_CONCAT_VECTORS.
bool matchCombineConcatVectors(MachineInstr &MI, bool &IsUndef,
SmallVectorImpl<Register> &Ops);
/// Replace \p MI with a flattened build_vector with \p Ops or an
/// implicit_def if IsUndef is true.
void applyCombineConcatVectors(MachineInstr &MI, bool IsUndef,
const ArrayRef<Register> Ops);
/// Try to combine G_SHUFFLE_VECTOR into G_CONCAT_VECTORS.
/// Returns true if MI changed.
///
/// \pre MI.getOpcode() == G_SHUFFLE_VECTOR.
bool tryCombineShuffleVector(MachineInstr &MI);
/// Check if the G_SHUFFLE_VECTOR \p MI can be replaced by a
/// concat_vectors.
/// \p Ops will contain the operands needed to produce the flattened
/// concat_vectors.
///
/// \pre MI.getOpcode() == G_SHUFFLE_VECTOR.
bool matchCombineShuffleVector(MachineInstr &MI,
SmallVectorImpl<Register> &Ops);
/// Replace \p MI with a concat_vectors with \p Ops.
void applyCombineShuffleVector(MachineInstr &MI,
const ArrayRef<Register> Ops);
/// Optimize memcpy intrinsics et al, e.g. constant len calls.
/// /p MaxLen if non-zero specifies the max length of a mem libcall to inline.
///
/// For example (pre-indexed):
///
/// $addr = G_PTR_ADD $base, $offset
/// [...]
/// $val = G_LOAD $addr
/// [...]
/// $whatever = COPY $addr
///
/// -->
///
/// $val, $addr = G_INDEXED_LOAD $base, $offset, 1 (IsPre)
/// [...]
/// $whatever = COPY $addr
///
/// or (post-indexed):
///
/// G_STORE $val, $base
/// [...]
/// $addr = G_PTR_ADD $base, $offset
/// [...]
/// $whatever = COPY $addr
///
/// -->
///
/// $addr = G_INDEXED_STORE $val, $base, $offset
/// [...]
/// $whatever = COPY $addr
bool tryCombineMemCpyFamily(MachineInstr &MI, unsigned MaxLen = 0);
bool matchPtrAddImmedChain(MachineInstr &MI, PtrAddChain &MatchInfo);
void applyPtrAddImmedChain(MachineInstr &MI, PtrAddChain &MatchInfo);
/// Fold (shift (shift base, x), y) -> (shift base (x+y))
bool matchShiftImmedChain(MachineInstr &MI, RegisterImmPair &MatchInfo);
void applyShiftImmedChain(MachineInstr &MI, RegisterImmPair &MatchInfo);
/// If we have a shift-by-constant of a bitwise logic op that itself has a
/// shift-by-constant operand with identical opcode, we may be able to convert
/// that into 2 independent shifts followed by the logic op.
bool matchShiftOfShiftedLogic(MachineInstr &MI,
ShiftOfShiftedLogic &MatchInfo);
void applyShiftOfShiftedLogic(MachineInstr &MI,
ShiftOfShiftedLogic &MatchInfo);
bool matchCommuteShift(MachineInstr &MI, BuildFnTy &MatchInfo);
/// Transform a multiply by a power-of-2 value to a left shift.
bool matchCombineMulToShl(MachineInstr &MI, unsigned &ShiftVal);
void applyCombineMulToShl(MachineInstr &MI, unsigned &ShiftVal);
// Transform a G_SHL with an extended source into a narrower shift if
// possible.
bool matchCombineShlOfExtend(MachineInstr &MI, RegisterImmPair &MatchData);
void applyCombineShlOfExtend(MachineInstr &MI,
const RegisterImmPair &MatchData);
/// Fold away a merge of an unmerge of the corresponding values.
bool matchCombineMergeUnmerge(MachineInstr &MI, Register &MatchInfo);
/// Reduce a shift by a constant to an unmerge and a shift on a half sized
/// type. This will not produce a shift smaller than \p TargetShiftSize.
bool matchCombineShiftToUnmerge(MachineInstr &MI, unsigned TargetShiftSize,
unsigned &ShiftVal);
void applyCombineShiftToUnmerge(MachineInstr &MI, const unsigned &ShiftVal);
bool tryCombineShiftToUnmerge(MachineInstr &MI, unsigned TargetShiftAmount);
/// Transform <ty,...> G_UNMERGE(G_MERGE ty X, Y, Z) -> ty X, Y, Z.
bool
matchCombineUnmergeMergeToPlainValues(MachineInstr &MI,
SmallVectorImpl<Register> &Operands);
void
applyCombineUnmergeMergeToPlainValues(MachineInstr &MI,
SmallVectorImpl<Register> &Operands);
/// Transform G_UNMERGE Constant -> Constant1, Constant2, ...
bool matchCombineUnmergeConstant(MachineInstr &MI,
SmallVectorImpl<APInt> &Csts);
void applyCombineUnmergeConstant(MachineInstr &MI,
SmallVectorImpl<APInt> &Csts);
/// Transform G_UNMERGE G_IMPLICIT_DEF -> G_IMPLICIT_DEF, G_IMPLICIT_DEF, ...
bool
matchCombineUnmergeUndef(MachineInstr &MI,
std::function<void(MachineIRBuilder &)> &MatchInfo);
/// Transform X, Y<dead> = G_UNMERGE Z -> X = G_TRUNC Z.
bool matchCombineUnmergeWithDeadLanesToTrunc(MachineInstr &MI);
void applyCombineUnmergeWithDeadLanesToTrunc(MachineInstr &MI);
/// Transform X, Y = G_UNMERGE(G_ZEXT(Z)) -> X = G_ZEXT(Z); Y = G_CONSTANT 0
bool matchCombineUnmergeZExtToZExt(MachineInstr &MI);
void applyCombineUnmergeZExtToZExt(MachineInstr &MI);
/// Transform fp_instr(cst) to constant result of the fp operation.
void applyCombineConstantFoldFpUnary(MachineInstr &MI, const ConstantFP *Cst);
/// Transform IntToPtr(PtrToInt(x)) to x if cast is in the same address space.
bool matchCombineI2PToP2I(MachineInstr &MI, Register &Reg);
void applyCombineI2PToP2I(MachineInstr &MI, Register &Reg);
/// Transform PtrToInt(IntToPtr(x)) to x.
void applyCombineP2IToI2P(MachineInstr &MI, Register &Reg);
/// Transform G_ADD (G_PTRTOINT x), y -> G_PTRTOINT (G_PTR_ADD x, y)
/// Transform G_ADD y, (G_PTRTOINT x) -> G_PTRTOINT (G_PTR_ADD x, y)
bool matchCombineAddP2IToPtrAdd(MachineInstr &MI,
std::pair<Register, bool> &PtrRegAndCommute);
void applyCombineAddP2IToPtrAdd(MachineInstr &MI,
std::pair<Register, bool> &PtrRegAndCommute);
// Transform G_PTR_ADD (G_PTRTOINT C1), C2 -> C1 + C2
bool matchCombineConstPtrAddToI2P(MachineInstr &MI, APInt &NewCst);
void applyCombineConstPtrAddToI2P(MachineInstr &MI, APInt &NewCst);
/// Transform anyext(trunc(x)) to x.
bool matchCombineAnyExtTrunc(MachineInstr &MI, Register &Reg);
void applyCombineAnyExtTrunc(MachineInstr &MI, Register &Reg);
/// Transform zext(trunc(x)) to x.
bool matchCombineZextTrunc(MachineInstr &MI, Register &Reg);
/// Transform [asz]ext([asz]ext(x)) to [asz]ext x.
bool matchCombineExtOfExt(MachineInstr &MI,
std::tuple<Register, unsigned> &MatchInfo);
void applyCombineExtOfExt(MachineInstr &MI,
std::tuple<Register, unsigned> &MatchInfo);
/// Transform fabs(fabs(x)) to fabs(x).
void applyCombineFAbsOfFAbs(MachineInstr &MI, Register &Src);
/// Transform fabs(fneg(x)) to fabs(x).
bool matchCombineFAbsOfFNeg(MachineInstr &MI, BuildFnTy &MatchInfo);
/// Transform trunc ([asz]ext x) to x or ([asz]ext x) or (trunc x).
bool matchCombineTruncOfExt(MachineInstr &MI,
std::pair<Register, unsigned> &MatchInfo);
void applyCombineTruncOfExt(MachineInstr &MI,
std::pair<Register, unsigned> &MatchInfo);
/// Transform trunc (shl x, K) to shl (trunc x), K
/// if K < VT.getScalarSizeInBits().
///
/// Transforms trunc ([al]shr x, K) to (trunc ([al]shr (MidVT (trunc x)), K))
/// if K <= (MidVT.getScalarSizeInBits() - VT.getScalarSizeInBits())
/// MidVT is obtained by finding a legal type between the trunc's src and dst
/// types.
bool matchCombineTruncOfShift(MachineInstr &MI,
std::pair<MachineInstr *, LLT> &MatchInfo);
void applyCombineTruncOfShift(MachineInstr &MI,
std::pair<MachineInstr *, LLT> &MatchInfo);
/// Transform G_MUL(x, -1) to G_SUB(0, x)
void applyCombineMulByNegativeOne(MachineInstr &MI);
/// Return true if any explicit use operand on \p MI is defined by a
/// G_IMPLICIT_DEF.
bool matchAnyExplicitUseIsUndef(MachineInstr &MI);
/// Return true if all register explicit use operands on \p MI are defined by
/// a G_IMPLICIT_DEF.
bool matchAllExplicitUsesAreUndef(MachineInstr &MI);
/// Return true if a G_SHUFFLE_VECTOR instruction \p MI has an undef mask.
bool matchUndefShuffleVectorMask(MachineInstr &MI);
/// Return true if a G_STORE instruction \p MI is storing an undef value.
bool matchUndefStore(MachineInstr &MI);
/// Return true if a G_SELECT instruction \p MI has an undef comparison.
bool matchUndefSelectCmp(MachineInstr &MI);
/// Return true if a G_{EXTRACT,INSERT}_VECTOR_ELT has an out of range index.
bool matchInsertExtractVecEltOutOfBounds(MachineInstr &MI);
/// Return true if a G_SELECT instruction \p MI has a constant comparison. If
/// true, \p OpIdx will store the operand index of the known selected value.
bool matchConstantSelectCmp(MachineInstr &MI, unsigned &OpIdx);
/// Replace an instruction with a G_FCONSTANT with value \p C.
void replaceInstWithFConstant(MachineInstr &MI, double C);
/// Replace an instruction with a G_CONSTANT with value \p C.
void replaceInstWithConstant(MachineInstr &MI, int64_t C);
/// Replace an instruction with a G_CONSTANT with value \p C.
void replaceInstWithConstant(MachineInstr &MI, APInt C);
/// Replace an instruction with a G_IMPLICIT_DEF.
void replaceInstWithUndef(MachineInstr &MI);
/// Delete \p MI and replace all of its uses with its \p OpIdx-th operand.
void replaceSingleDefInstWithOperand(MachineInstr &MI, unsigned OpIdx);
/// Delete \p MI and replace all of its uses with \p Replacement.
void replaceSingleDefInstWithReg(MachineInstr &MI, Register Replacement);
/// Return true if \p MOP1 and \p MOP2 are register operands are defined by
/// equivalent instructions.
bool matchEqualDefs(const MachineOperand &MOP1, const MachineOperand &MOP2);
/// Return true if \p MOP is defined by a G_CONSTANT with a value equal to
/// \p C.
bool matchConstantOp(const MachineOperand &MOP, int64_t C);
/// Optimize (cond ? x : x) -> x
bool matchSelectSameVal(MachineInstr &MI);
/// Optimize (x op x) -> x
bool matchBinOpSameVal(MachineInstr &MI);
/// Check if operand \p OpIdx is zero.
bool matchOperandIsZero(MachineInstr &MI, unsigned OpIdx);
/// Check if operand \p OpIdx is undef.
bool matchOperandIsUndef(MachineInstr &MI, unsigned OpIdx);
/// Check if operand \p OpIdx is known to be a power of 2.
bool matchOperandIsKnownToBeAPowerOfTwo(MachineInstr &MI, unsigned OpIdx);
/// Erase \p MI
void eraseInst(MachineInstr &MI);
/// Return true if MI is a G_ADD which can be simplified to a G_SUB.
bool matchSimplifyAddToSub(MachineInstr &MI,
std::tuple<Register, Register> &MatchInfo);
void applySimplifyAddToSub(MachineInstr &MI,
std::tuple<Register, Register> &MatchInfo);
/// Match (logic_op (op x...), (op y...)) -> (op (logic_op x, y))
bool
matchHoistLogicOpWithSameOpcodeHands(MachineInstr &MI,
InstructionStepsMatchInfo &MatchInfo);
/// Replace \p MI with a series of instructions described in \p MatchInfo.
void applyBuildInstructionSteps(MachineInstr &MI,
InstructionStepsMatchInfo &MatchInfo);
/// Match ashr (shl x, C), C -> sext_inreg (C)
bool matchAshrShlToSextInreg(MachineInstr &MI,
std::tuple<Register, int64_t> &MatchInfo);
void applyAshShlToSextInreg(MachineInstr &MI,
std::tuple<Register, int64_t> &MatchInfo);
/// Fold and(and(x, C1), C2) -> C1&C2 ? and(x, C1&C2) : 0
bool matchOverlappingAnd(MachineInstr &MI,
BuildFnTy &MatchInfo);
/// \return true if \p MI is a G_AND instruction whose operands are x and y
/// where x & y == x or x & y == y. (E.g., one of operands is all-ones value.)
///
/// \param [in] MI - The G_AND instruction.
/// \param [out] Replacement - A register the G_AND should be replaced with on
/// success.
bool matchRedundantAnd(MachineInstr &MI, Register &Replacement);
/// \return true if \p MI is a G_OR instruction whose operands are x and y
/// where x | y == x or x | y == y. (E.g., one of operands is all-zeros
/// value.)
///
/// \param [in] MI - The G_OR instruction.
/// \param [out] Replacement - A register the G_OR should be replaced with on
/// success.
bool matchRedundantOr(MachineInstr &MI, Register &Replacement);
/// \return true if \p MI is a G_SEXT_INREG that can be erased.
bool matchRedundantSExtInReg(MachineInstr &MI);
/// Combine inverting a result of a compare into the opposite cond code.
bool matchNotCmp(MachineInstr &MI, SmallVectorImpl<Register> &RegsToNegate);
void applyNotCmp(MachineInstr &MI, SmallVectorImpl<Register> &RegsToNegate);
/// Fold (xor (and x, y), y) -> (and (not x), y)
///{
bool matchXorOfAndWithSameReg(MachineInstr &MI,
std::pair<Register, Register> &MatchInfo);
void applyXorOfAndWithSameReg(MachineInstr &MI,
std::pair<Register, Register> &MatchInfo);
///}
/// Combine G_PTR_ADD with nullptr to G_INTTOPTR
bool matchPtrAddZero(MachineInstr &MI);
void applyPtrAddZero(MachineInstr &MI);
/// Combine G_UREM x, (known power of 2) to an add and bitmasking.
void applySimplifyURemByPow2(MachineInstr &MI);
/// Push a binary operator through a select on constants.
///
/// binop (select cond, K0, K1), K2 ->
/// select cond, (binop K0, K2), (binop K1, K2)
bool matchFoldBinOpIntoSelect(MachineInstr &MI, unsigned &SelectOpNo);
void applyFoldBinOpIntoSelect(MachineInstr &MI, const unsigned &SelectOpNo);
bool matchCombineInsertVecElts(MachineInstr &MI,
SmallVectorImpl<Register> &MatchInfo);
void applyCombineInsertVecElts(MachineInstr &MI,
SmallVectorImpl<Register> &MatchInfo);
/// Match expression trees of the form
///
/// \code
/// sN *a = ...
/// sM val = a[0] | (a[1] << N) | (a[2] << 2N) | (a[3] << 3N) ...
/// \endcode
///
/// And check if the tree can be replaced with a M-bit load + possibly a
/// bswap.
bool matchLoadOrCombine(MachineInstr &MI, BuildFnTy &MatchInfo);
bool matchExtendThroughPhis(MachineInstr &MI, MachineInstr *&ExtMI);
void applyExtendThroughPhis(MachineInstr &MI, MachineInstr *&ExtMI);
bool matchExtractVecEltBuildVec(MachineInstr &MI, Register &Reg);
void applyExtractVecEltBuildVec(MachineInstr &MI, Register &Reg);
bool matchExtractAllEltsFromBuildVector(
MachineInstr &MI,
SmallVectorImpl<std::pair<Register, MachineInstr *>> &MatchInfo);
void applyExtractAllEltsFromBuildVector(
MachineInstr &MI,
SmallVectorImpl<std::pair<Register, MachineInstr *>> &MatchInfo);
/// Use a function which takes in a MachineIRBuilder to perform a combine.
/// By default, it erases the instruction \p MI from the function.
void applyBuildFn(MachineInstr &MI, BuildFnTy &MatchInfo);
/// Use a function which takes in a MachineIRBuilder to perform a combine.
/// This variant does not erase \p MI after calling the build function.
void applyBuildFnNoErase(MachineInstr &MI, BuildFnTy &MatchInfo);
bool matchOrShiftToFunnelShift(MachineInstr &MI, BuildFnTy &MatchInfo);
bool matchFunnelShiftToRotate(MachineInstr &MI);
void applyFunnelShiftToRotate(MachineInstr &MI);
bool matchRotateOutOfRange(MachineInstr &MI);
void applyRotateOutOfRange(MachineInstr &MI);
/// \returns true if a G_ICMP instruction \p MI can be replaced with a true
/// or false constant based off of KnownBits information.
bool matchICmpToTrueFalseKnownBits(MachineInstr &MI, int64_t &MatchInfo);
/// \returns true if a G_ICMP \p MI can be replaced with its LHS based off of
/// KnownBits information.
bool
matchICmpToLHSKnownBits(MachineInstr &MI,
BuildFnTy &MatchInfo);
/// \returns true if (and (or x, c1), c2) can be replaced with (and x, c2)
bool matchAndOrDisjointMask(MachineInstr &MI, BuildFnTy &MatchInfo);
bool matchBitfieldExtractFromSExtInReg(MachineInstr &MI,
BuildFnTy &MatchInfo);
/// Match: and (lshr x, cst), mask -> ubfx x, cst, width
bool matchBitfieldExtractFromAnd(MachineInstr &MI, BuildFnTy &MatchInfo);
/// Match: shr (shl x, n), k -> sbfx/ubfx x, pos, width
bool matchBitfieldExtractFromShr(MachineInstr &MI, BuildFnTy &MatchInfo);
/// Match: shr (and x, n), k -> ubfx x, pos, width
bool matchBitfieldExtractFromShrAnd(MachineInstr &MI, BuildFnTy &MatchInfo);
// Helpers for reassociation:
bool matchReassocConstantInnerRHS(GPtrAdd &MI, MachineInstr *RHS,
BuildFnTy &MatchInfo);
bool matchReassocFoldConstantsInSubTree(GPtrAdd &MI, MachineInstr *LHS,
MachineInstr *RHS,
BuildFnTy &MatchInfo);
bool matchReassocConstantInnerLHS(GPtrAdd &MI, MachineInstr *LHS,
MachineInstr *RHS, BuildFnTy &MatchInfo);
/// Reassociate pointer calculations with G_ADD involved, to allow better
/// addressing mode usage.
bool matchReassocPtrAdd(MachineInstr &MI, BuildFnTy &MatchInfo);
/// Try to reassociate to reassociate operands of a commutative binop.
bool tryReassocBinOp(unsigned Opc, Register DstReg, Register Op0,
Register Op1, BuildFnTy &MatchInfo);
/// Reassociate commutative binary operations like G_ADD.
bool matchReassocCommBinOp(MachineInstr &MI, BuildFnTy &MatchInfo);
/// Do constant folding when opportunities are exposed after MIR building.
bool matchConstantFold(MachineInstr &MI, APInt &MatchInfo);
/// \returns true if it is possible to narrow the width of a scalar binop
/// feeding a G_AND instruction \p MI.
bool matchNarrowBinopFeedingAnd(MachineInstr &MI, BuildFnTy &MatchInfo);
/// Given an G_UDIV \p MI expressing a divide by constant, return an
/// expression that implements it by multiplying by a magic number.
/// Ref: "Hacker's Delight" or "The PowerPC Compiler Writer's Guide".
MachineInstr *buildUDivUsingMul(MachineInstr &MI);
/// Combine G_UDIV by constant into a multiply by magic constant.
bool matchUDivByConst(MachineInstr &MI);
void applyUDivByConst(MachineInstr &MI);
/// Given an G_SDIV \p MI expressing a signed divide by constant, return an
/// expression that implements it by multiplying by a magic number.
/// Ref: "Hacker's Delight" or "The PowerPC Compiler Writer's Guide".
MachineInstr *buildSDivUsingMul(MachineInstr &MI);
bool matchSDivByConst(MachineInstr &MI);
void applySDivByConst(MachineInstr &MI);
// G_UMULH x, (1 << c)) -> x >> (bitwidth - c)
bool matchUMulHToLShr(MachineInstr &MI);
void applyUMulHToLShr(MachineInstr &MI);
/// Try to transform \p MI by using all of the above
/// combine functions. Returns true if changed.
bool tryCombine(MachineInstr &MI);
/// Emit loads and stores that perform the given memcpy.
/// Assumes \p MI is a G_MEMCPY_INLINE
/// TODO: implement dynamically sized inline memcpy,
/// and rename: s/bool tryEmit/void emit/
bool tryEmitMemcpyInline(MachineInstr &MI);
/// Match:
/// (G_UMULO x, 2) -> (G_UADDO x, x)
/// (G_SMULO x, 2) -> (G_SADDO x, x)
bool matchMulOBy2(MachineInstr &MI, BuildFnTy &MatchInfo);
/// Match:
/// (G_*MULO x, 0) -> 0 + no carry out
bool matchMulOBy0(MachineInstr &MI, BuildFnTy &MatchInfo);
/// Match:
/// (G_*ADDO x, 0) -> x + no carry out
bool matchAddOBy0(MachineInstr &MI, BuildFnTy &MatchInfo);
/// Match:
/// (G_*ADDE x, y, 0) -> (G_*ADDO x, y)
/// (G_*SUBE x, y, 0) -> (G_*SUBO x, y)
bool matchAddEToAddO(MachineInstr &MI, BuildFnTy &MatchInfo);
/// Transform (fadd x, fneg(y)) -> (fsub x, y)
/// (fadd fneg(x), y) -> (fsub y, x)
/// (fsub x, fneg(y)) -> (fadd x, y)
/// (fmul fneg(x), fneg(y)) -> (fmul x, y)
/// (fdiv fneg(x), fneg(y)) -> (fdiv x, y)
/// (fmad fneg(x), fneg(y), z) -> (fmad x, y, z)
/// (fma fneg(x), fneg(y), z) -> (fma x, y, z)
bool matchRedundantNegOperands(MachineInstr &MI, BuildFnTy &MatchInfo);
bool matchFsubToFneg(MachineInstr &MI, Register &MatchInfo);
void applyFsubToFneg(MachineInstr &MI, Register &MatchInfo);
bool canCombineFMadOrFMA(MachineInstr &MI, bool &AllowFusionGlobally,
bool &HasFMAD, bool &Aggressive,
bool CanReassociate = false);
/// Transform (fadd (fmul x, y), z) -> (fma x, y, z)
/// (fadd (fmul x, y), z) -> (fmad x, y, z)
bool matchCombineFAddFMulToFMadOrFMA(MachineInstr &MI, BuildFnTy &MatchInfo);
/// Transform (fadd (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), z)
/// (fadd (fpext (fmul x, y)), z) -> (fmad (fpext x), (fpext y), z)
bool matchCombineFAddFpExtFMulToFMadOrFMA(MachineInstr &MI,
BuildFnTy &MatchInfo);
/// Transform (fadd (fma x, y, (fmul u, v)), z) -> (fma x, y, (fma u, v, z))
/// (fadd (fmad x, y, (fmul u, v)), z) -> (fmad x, y, (fmad u, v, z))
bool matchCombineFAddFMAFMulToFMadOrFMA(MachineInstr &MI,
BuildFnTy &MatchInfo);
// Transform (fadd (fma x, y, (fpext (fmul u, v))), z)
// -> (fma x, y, (fma (fpext u), (fpext v), z))
// (fadd (fmad x, y, (fpext (fmul u, v))), z)
// -> (fmad x, y, (fmad (fpext u), (fpext v), z))
bool matchCombineFAddFpExtFMulToFMadOrFMAAggressive(MachineInstr &MI,
BuildFnTy &MatchInfo);
/// Transform (fsub (fmul x, y), z) -> (fma x, y, -z)
/// (fsub (fmul x, y), z) -> (fmad x, y, -z)
bool matchCombineFSubFMulToFMadOrFMA(MachineInstr &MI, BuildFnTy &MatchInfo);
/// Transform (fsub (fneg (fmul, x, y)), z) -> (fma (fneg x), y, (fneg z))
/// (fsub (fneg (fmul, x, y)), z) -> (fmad (fneg x), y, (fneg z))
bool matchCombineFSubFNegFMulToFMadOrFMA(MachineInstr &MI,
BuildFnTy &MatchInfo);
/// Transform (fsub (fpext (fmul x, y)), z)
/// -> (fma (fpext x), (fpext y), (fneg z))
/// (fsub (fpext (fmul x, y)), z)
/// -> (fmad (fpext x), (fpext y), (fneg z))
bool matchCombineFSubFpExtFMulToFMadOrFMA(MachineInstr &MI,
BuildFnTy &MatchInfo);
/// Transform (fsub (fpext (fneg (fmul x, y))), z)
/// -> (fneg (fma (fpext x), (fpext y), z))
/// (fsub (fpext (fneg (fmul x, y))), z)
/// -> (fneg (fmad (fpext x), (fpext y), z))
bool matchCombineFSubFpExtFNegFMulToFMadOrFMA(MachineInstr &MI,
BuildFnTy &MatchInfo);
/// Fold boolean selects to logical operations.
bool matchSelectToLogical(MachineInstr &MI, BuildFnTy &MatchInfo);
bool matchCombineFMinMaxNaN(MachineInstr &MI, unsigned &Info);
/// Transform G_ADD(x, G_SUB(y, x)) to y.
/// Transform G_ADD(G_SUB(y, x), x) to y.
bool matchAddSubSameReg(MachineInstr &MI, Register &Src);
bool matchBuildVectorIdentityFold(MachineInstr &MI, Register &MatchInfo);
bool matchTruncBuildVectorFold(MachineInstr &MI, Register &MatchInfo);
bool matchTruncLshrBuildVectorFold(MachineInstr &MI, Register &MatchInfo);
/// Transform:
/// (x + y) - y -> x
/// (x + y) - x -> y
/// x - (y + x) -> 0 - y
/// x - (x + z) -> 0 - z
bool matchSubAddSameReg(MachineInstr &MI, BuildFnTy &MatchInfo);
/// \returns true if it is possible to simplify a select instruction \p MI
/// to a min/max instruction of some sort.
bool matchSimplifySelectToMinMax(MachineInstr &MI, BuildFnTy &MatchInfo);
/// Transform:
/// (X + Y) == X -> Y == 0
/// (X - Y) == X -> Y == 0
/// (X ^ Y) == X -> Y == 0
/// (X + Y) != X -> Y != 0
/// (X - Y) != X -> Y != 0
/// (X ^ Y) != X -> Y != 0
bool matchRedundantBinOpInEquality(MachineInstr &MI, BuildFnTy &MatchInfo);
/// Match shifts greater or equal to the bitwidth of the operation.
bool matchShiftsTooBig(MachineInstr &MI);
private:
/// Given a non-indexed load or store instruction \p MI, find an offset that
/// can be usefully and legally folded into it as a post-indexing operation.
///
/// \returns true if a candidate is found.
bool findPostIndexCandidate(MachineInstr &MI, Register &Addr, Register &Base,
Register &Offset);
/// Given a non-indexed load or store instruction \p MI, find an offset that
/// can be usefully and legally folded into it as a pre-indexing operation.
///
/// \returns true if a candidate is found.
bool findPreIndexCandidate(MachineInstr &MI, Register &Addr, Register &Base,
Register &Offset);
/// Helper function for matchLoadOrCombine. Searches for Registers
/// which may have been produced by a load instruction + some arithmetic.
///
/// \param [in] Root - The search root.
///
/// \returns The Registers found during the search.
std::optional<SmallVector<Register, 8>>
findCandidatesForLoadOrCombine(const MachineInstr *Root) const;
/// Helper function for matchLoadOrCombine.
///
/// Checks if every register in \p RegsToVisit is defined by a load
/// instruction + some arithmetic.
///
/// \param [out] MemOffset2Idx - Maps the byte positions each load ends up
/// at to the index of the load.
/// \param [in] MemSizeInBits - The number of bits each load should produce.
///
/// \returns On success, a 3-tuple containing lowest-index load found, the
/// lowest index, and the last load in the sequence.
std::optional<std::tuple<GZExtLoad *, int64_t, GZExtLoad *>>
findLoadOffsetsForLoadOrCombine(
SmallDenseMap<int64_t, int64_t, 8> &MemOffset2Idx,
const SmallVector<Register, 8> &RegsToVisit,
const unsigned MemSizeInBits);
/// Examines the G_PTR_ADD instruction \p PtrAdd and determines if performing
/// a re-association of its operands would break an existing legal addressing
/// mode that the address computation currently represents.
bool reassociationCanBreakAddressingModePattern(MachineInstr &PtrAdd);
/// Behavior when a floating point min/max is given one NaN and one
/// non-NaN as input.
enum class SelectPatternNaNBehaviour {
NOT_APPLICABLE = 0, /// NaN behavior not applicable.
RETURNS_NAN, /// Given one NaN input, returns the NaN.
RETURNS_OTHER, /// Given one NaN input, returns the non-NaN.
RETURNS_ANY /// Given one NaN input, can return either (or both operands are
/// known non-NaN.)
};
/// \returns which of \p LHS and \p RHS would be the result of a non-equality
/// floating point comparison where one of \p LHS and \p RHS may be NaN.
///
/// If both \p LHS and \p RHS may be NaN, returns
/// SelectPatternNaNBehaviour::NOT_APPLICABLE.
SelectPatternNaNBehaviour
computeRetValAgainstNaN(Register LHS, Register RHS,
bool IsOrderedComparison) const;
/// Determines the floating point min/max opcode which should be used for
/// a G_SELECT fed by a G_FCMP with predicate \p Pred.
///
/// \returns 0 if this G_SELECT should not be combined to a floating point
/// min or max. If it should be combined, returns one of
///
/// * G_FMAXNUM
/// * G_FMAXIMUM
/// * G_FMINNUM
/// * G_FMINIMUM
///
/// Helper function for matchFPSelectToMinMax.
unsigned getFPMinMaxOpcForSelect(CmpInst::Predicate Pred, LLT DstTy,
SelectPatternNaNBehaviour VsNaNRetVal) const;
/// Handle floating point cases for matchSimplifySelectToMinMax.
///
/// E.g.
///
/// select (fcmp uge x, 1.0) x, 1.0 -> fmax x, 1.0
/// select (fcmp uge x, 1.0) 1.0, x -> fminnm x, 1.0
bool matchFPSelectToMinMax(Register Dst, Register Cond, Register TrueVal,
Register FalseVal, BuildFnTy &MatchInfo);
};
} // namespace llvm
#endif
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` CodeGen/GlobalISel/Utils.hnu �[��� //==-- llvm/CodeGen/GlobalISel/Utils.h ---------------------------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file This file declares the API of helper functions used throughout the
/// GlobalISel pipeline.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_UTILS_H
#define LLVM_CODEGEN_GLOBALISEL_UTILS_H
#include "GISelWorkList.h"
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/LowLevelType.h"
#include "llvm/CodeGen/Register.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/Support/Alignment.h"
#include "llvm/Support/Casting.h"
#include <cstdint>
namespace llvm {
class AnalysisUsage;
class LostDebugLocObserver;
class MachineBasicBlock;
class BlockFrequencyInfo;
class GISelKnownBits;
class MachineFunction;
class MachineInstr;
class MachineOperand;
class MachineOptimizationRemarkEmitter;
class MachineOptimizationRemarkMissed;
struct MachinePointerInfo;
class MachineRegisterInfo;
class MCInstrDesc;
class ProfileSummaryInfo;
class RegisterBankInfo;
class TargetInstrInfo;
class TargetLowering;
class TargetPassConfig;
class TargetRegisterInfo;
class TargetRegisterClass;
class ConstantFP;
class APFloat;
// Convenience macros for dealing with vector reduction opcodes.
#define GISEL_VECREDUCE_CASES_ALL \
case TargetOpcode::G_VECREDUCE_SEQ_FADD: \
case TargetOpcode::G_VECREDUCE_SEQ_FMUL: \
case TargetOpcode::G_VECREDUCE_FADD: \
case TargetOpcode::G_VECREDUCE_FMUL: \
case TargetOpcode::G_VECREDUCE_FMAX: \
case TargetOpcode::G_VECREDUCE_FMIN: \
case TargetOpcode::G_VECREDUCE_ADD: \
case TargetOpcode::G_VECREDUCE_MUL: \
case TargetOpcode::G_VECREDUCE_AND: \
case TargetOpcode::G_VECREDUCE_OR: \
case TargetOpcode::G_VECREDUCE_XOR: \
case TargetOpcode::G_VECREDUCE_SMAX: \
case TargetOpcode::G_VECREDUCE_SMIN: \
case TargetOpcode::G_VECREDUCE_UMAX: \
case TargetOpcode::G_VECREDUCE_UMIN:
#define GISEL_VECREDUCE_CASES_NONSEQ \
case TargetOpcode::G_VECREDUCE_FADD: \
case TargetOpcode::G_VECREDUCE_FMUL: \
case TargetOpcode::G_VECREDUCE_FMAX: \
case TargetOpcode::G_VECREDUCE_FMIN: \
case TargetOpcode::G_VECREDUCE_ADD: \
case TargetOpcode::G_VECREDUCE_MUL: \
case TargetOpcode::G_VECREDUCE_AND: \
case TargetOpcode::G_VECREDUCE_OR: \
case TargetOpcode::G_VECREDUCE_XOR: \
case TargetOpcode::G_VECREDUCE_SMAX: \
case TargetOpcode::G_VECREDUCE_SMIN: \
case TargetOpcode::G_VECREDUCE_UMAX: \
case TargetOpcode::G_VECREDUCE_UMIN:
/// Try to constrain Reg to the specified register class. If this fails,
/// create a new virtual register in the correct class.
///
/// \return The virtual register constrained to the right register class.
Register constrainRegToClass(MachineRegisterInfo &MRI,
const TargetInstrInfo &TII,
const RegisterBankInfo &RBI, Register Reg,
const TargetRegisterClass &RegClass);
/// Constrain the Register operand OpIdx, so that it is now constrained to the
/// TargetRegisterClass passed as an argument (RegClass).
/// If this fails, create a new virtual register in the correct class and insert
/// a COPY before \p InsertPt if it is a use or after if it is a definition.
/// In both cases, the function also updates the register of RegMo. The debug
/// location of \p InsertPt is used for the new copy.
///
/// \return The virtual register constrained to the right register class.
Register constrainOperandRegClass(const MachineFunction &MF,
const TargetRegisterInfo &TRI,
MachineRegisterInfo &MRI,
const TargetInstrInfo &TII,
const RegisterBankInfo &RBI,
MachineInstr &InsertPt,
const TargetRegisterClass &RegClass,
MachineOperand &RegMO);
/// Try to constrain Reg so that it is usable by argument OpIdx of the provided
/// MCInstrDesc \p II. If this fails, create a new virtual register in the
/// correct class and insert a COPY before \p InsertPt if it is a use or after
/// if it is a definition. In both cases, the function also updates the register
/// of RegMo.
/// This is equivalent to constrainOperandRegClass(..., RegClass, ...)
/// with RegClass obtained from the MCInstrDesc. The debug location of \p
/// InsertPt is used for the new copy.
///
/// \return The virtual register constrained to the right register class.
Register constrainOperandRegClass(const MachineFunction &MF,
const TargetRegisterInfo &TRI,
MachineRegisterInfo &MRI,
const TargetInstrInfo &TII,
const RegisterBankInfo &RBI,
MachineInstr &InsertPt, const MCInstrDesc &II,
MachineOperand &RegMO, unsigned OpIdx);
/// Mutate the newly-selected instruction \p I to constrain its (possibly
/// generic) virtual register operands to the instruction's register class.
/// This could involve inserting COPYs before (for uses) or after (for defs).
/// This requires the number of operands to match the instruction description.
/// \returns whether operand regclass constraining succeeded.
///
// FIXME: Not all instructions have the same number of operands. We should
// probably expose a constrain helper per operand and let the target selector
// constrain individual registers, like fast-isel.
bool constrainSelectedInstRegOperands(MachineInstr &I,
const TargetInstrInfo &TII,
const TargetRegisterInfo &TRI,
const RegisterBankInfo &RBI);
/// Check if DstReg can be replaced with SrcReg depending on the register
/// constraints.
bool canReplaceReg(Register DstReg, Register SrcReg, MachineRegisterInfo &MRI);
/// Check whether an instruction \p MI is dead: it only defines dead virtual
/// registers, and doesn't have other side effects.
bool isTriviallyDead(const MachineInstr &MI, const MachineRegisterInfo &MRI);
/// Report an ISel error as a missed optimization remark to the LLVMContext's
/// diagnostic stream. Set the FailedISel MachineFunction property.
void reportGISelFailure(MachineFunction &MF, const TargetPassConfig &TPC,
MachineOptimizationRemarkEmitter &MORE,
MachineOptimizationRemarkMissed &R);
void reportGISelFailure(MachineFunction &MF, const TargetPassConfig &TPC,
MachineOptimizationRemarkEmitter &MORE,
const char *PassName, StringRef Msg,
const MachineInstr &MI);
/// Report an ISel warning as a missed optimization remark to the LLVMContext's
/// diagnostic stream.
void reportGISelWarning(MachineFunction &MF, const TargetPassConfig &TPC,
MachineOptimizationRemarkEmitter &MORE,
MachineOptimizationRemarkMissed &R);
/// If \p VReg is defined by a G_CONSTANT, return the corresponding value.
std::optional<APInt> getIConstantVRegVal(Register VReg,
const MachineRegisterInfo &MRI);
/// If \p VReg is defined by a G_CONSTANT fits in int64_t returns it.
std::optional<int64_t> getIConstantVRegSExtVal(Register VReg,
const MachineRegisterInfo &MRI);
/// Simple struct used to hold a constant integer value and a virtual
/// register.
struct ValueAndVReg {
APInt Value;
Register VReg;
};
/// If \p VReg is defined by a statically evaluable chain of instructions rooted
/// on a G_CONSTANT returns its APInt value and def register.
std::optional<ValueAndVReg>
getIConstantVRegValWithLookThrough(Register VReg,
const MachineRegisterInfo &MRI,
bool LookThroughInstrs = true);
/// If \p VReg is defined by a statically evaluable chain of instructions rooted
/// on a G_CONSTANT or G_FCONSTANT returns its value as APInt and def register.
std::optional<ValueAndVReg> getAnyConstantVRegValWithLookThrough(
Register VReg, const MachineRegisterInfo &MRI,
bool LookThroughInstrs = true, bool LookThroughAnyExt = false);
struct FPValueAndVReg {
APFloat Value;
Register VReg;
};
/// If \p VReg is defined by a statically evaluable chain of instructions rooted
/// on a G_FCONSTANT returns its APFloat value and def register.
std::optional<FPValueAndVReg>
getFConstantVRegValWithLookThrough(Register VReg,
const MachineRegisterInfo &MRI,
bool LookThroughInstrs = true);
const ConstantFP* getConstantFPVRegVal(Register VReg,
const MachineRegisterInfo &MRI);
/// See if Reg is defined by an single def instruction that is
/// Opcode. Also try to do trivial folding if it's a COPY with
/// same types. Returns null otherwise.
MachineInstr *getOpcodeDef(unsigned Opcode, Register Reg,
const MachineRegisterInfo &MRI);
/// Simple struct used to hold a Register value and the instruction which
/// defines it.
struct DefinitionAndSourceRegister {
MachineInstr *MI;
Register Reg;
};
/// Find the def instruction for \p Reg, and underlying value Register folding
/// away any copies.
///
/// Also walks through hints such as G_ASSERT_ZEXT.
std::optional<DefinitionAndSourceRegister>
getDefSrcRegIgnoringCopies(Register Reg, const MachineRegisterInfo &MRI);
/// Find the def instruction for \p Reg, folding away any trivial copies. May
/// return nullptr if \p Reg is not a generic virtual register.
///
/// Also walks through hints such as G_ASSERT_ZEXT.
MachineInstr *getDefIgnoringCopies(Register Reg,
const MachineRegisterInfo &MRI);
/// Find the source register for \p Reg, folding away any trivial copies. It
/// will be an output register of the instruction that getDefIgnoringCopies
/// returns. May return an invalid register if \p Reg is not a generic virtual
/// register.
///
/// Also walks through hints such as G_ASSERT_ZEXT.
Register getSrcRegIgnoringCopies(Register Reg, const MachineRegisterInfo &MRI);
// Templated variant of getOpcodeDef returning a MachineInstr derived T.
/// See if Reg is defined by an single def instruction of type T
/// Also try to do trivial folding if it's a COPY with
/// same types. Returns null otherwise.
template <class T>
T *getOpcodeDef(Register Reg, const MachineRegisterInfo &MRI) {
MachineInstr *DefMI = getDefIgnoringCopies(Reg, MRI);
return dyn_cast_or_null<T>(DefMI);
}
/// Returns an APFloat from Val converted to the appropriate size.
APFloat getAPFloatFromSize(double Val, unsigned Size);
/// Modify analysis usage so it preserves passes required for the SelectionDAG
/// fallback.
void getSelectionDAGFallbackAnalysisUsage(AnalysisUsage &AU);
std::optional<APInt> ConstantFoldBinOp(unsigned Opcode, const Register Op1,
const Register Op2,
const MachineRegisterInfo &MRI);
std::optional<APFloat> ConstantFoldFPBinOp(unsigned Opcode, const Register Op1,
const Register Op2,
const MachineRegisterInfo &MRI);
/// Tries to constant fold a vector binop with sources \p Op1 and \p Op2.
/// Returns an empty vector on failure.
SmallVector<APInt> ConstantFoldVectorBinop(unsigned Opcode, const Register Op1,
const Register Op2,
const MachineRegisterInfo &MRI);
std::optional<APInt> ConstantFoldExtOp(unsigned Opcode, const Register Op1,
uint64_t Imm,
const MachineRegisterInfo &MRI);
std::optional<APFloat> ConstantFoldIntToFloat(unsigned Opcode, LLT DstTy,
Register Src,
const MachineRegisterInfo &MRI);
/// Tries to constant fold a G_CTLZ operation on \p Src. If \p Src is a vector
/// then it tries to do an element-wise constant fold.
std::optional<SmallVector<unsigned>>
ConstantFoldCTLZ(Register Src, const MachineRegisterInfo &MRI);
/// Test if the given value is known to have exactly one bit set. This differs
/// from computeKnownBits in that it doesn't necessarily determine which bit is
/// set.
bool isKnownToBeAPowerOfTwo(Register Val, const MachineRegisterInfo &MRI,
GISelKnownBits *KnownBits = nullptr);
/// Returns true if \p Val can be assumed to never be a NaN. If \p SNaN is true,
/// this returns if \p Val can be assumed to never be a signaling NaN.
bool isKnownNeverNaN(Register Val, const MachineRegisterInfo &MRI,
bool SNaN = false);
/// Returns true if \p Val can be assumed to never be a signaling NaN.
inline bool isKnownNeverSNaN(Register Val, const MachineRegisterInfo &MRI) {
return isKnownNeverNaN(Val, MRI, true);
}
Align inferAlignFromPtrInfo(MachineFunction &MF, const MachinePointerInfo &MPO);
/// Return a virtual register corresponding to the incoming argument register \p
/// PhysReg. This register is expected to have class \p RC, and optional type \p
/// RegTy. This assumes all references to the register will use the same type.
///
/// If there is an existing live-in argument register, it will be returned.
/// This will also ensure there is a valid copy
Register getFunctionLiveInPhysReg(MachineFunction &MF,
const TargetInstrInfo &TII,
MCRegister PhysReg,
const TargetRegisterClass &RC,
const DebugLoc &DL, LLT RegTy = LLT());
/// Return the least common multiple type of \p OrigTy and \p TargetTy, by changing the
/// number of vector elements or scalar bitwidth. The intent is a
/// G_MERGE_VALUES, G_BUILD_VECTOR, or G_CONCAT_VECTORS can be constructed from
/// \p OrigTy elements, and unmerged into \p TargetTy
LLVM_READNONE
LLT getLCMType(LLT OrigTy, LLT TargetTy);
LLVM_READNONE
/// Return smallest type that covers both \p OrigTy and \p TargetTy and is
/// multiple of TargetTy.
LLT getCoverTy(LLT OrigTy, LLT TargetTy);
/// Return a type where the total size is the greatest common divisor of \p
/// OrigTy and \p TargetTy. This will try to either change the number of vector
/// elements, or bitwidth of scalars. The intent is the result type can be used
/// as the result of a G_UNMERGE_VALUES from \p OrigTy, and then some
/// combination of G_MERGE_VALUES, G_BUILD_VECTOR and G_CONCAT_VECTORS (possibly
/// with intermediate casts) can re-form \p TargetTy.
///
/// If these are vectors with different element types, this will try to produce
/// a vector with a compatible total size, but the element type of \p OrigTy. If
/// this can't be satisfied, this will produce a scalar smaller than the
/// original vector elements.
///
/// In the worst case, this returns LLT::scalar(1)
LLVM_READNONE
LLT getGCDType(LLT OrigTy, LLT TargetTy);
/// Represents a value which can be a Register or a constant.
///
/// This is useful in situations where an instruction may have an interesting
/// register operand or interesting constant operand. For a concrete example,
/// \see getVectorSplat.
class RegOrConstant {
int64_t Cst;
Register Reg;
bool IsReg;
public:
explicit RegOrConstant(Register Reg) : Reg(Reg), IsReg(true) {}
explicit RegOrConstant(int64_t Cst) : Cst(Cst), IsReg(false) {}
bool isReg() const { return IsReg; }
bool isCst() const { return !IsReg; }
Register getReg() const {
assert(isReg() && "Expected a register!");
return Reg;
}
int64_t getCst() const {
assert(isCst() && "Expected a constant!");
return Cst;
}
};
/// \returns The splat index of a G_SHUFFLE_VECTOR \p MI when \p MI is a splat.
/// If \p MI is not a splat, returns std::nullopt.
std::optional<int> getSplatIndex(MachineInstr &MI);
/// \returns the scalar integral splat value of \p Reg if possible.
std::optional<APInt> getIConstantSplatVal(const Register Reg,
const MachineRegisterInfo &MRI);
/// \returns the scalar integral splat value defined by \p MI if possible.
std::optional<APInt> getIConstantSplatVal(const MachineInstr &MI,
const MachineRegisterInfo &MRI);
/// \returns the scalar sign extended integral splat value of \p Reg if
/// possible.
std::optional<int64_t> getIConstantSplatSExtVal(const Register Reg,
const MachineRegisterInfo &MRI);
/// \returns the scalar sign extended integral splat value defined by \p MI if
/// possible.
std::optional<int64_t> getIConstantSplatSExtVal(const MachineInstr &MI,
const MachineRegisterInfo &MRI);
/// Returns a floating point scalar constant of a build vector splat if it
/// exists. When \p AllowUndef == true some elements can be undef but not all.
std::optional<FPValueAndVReg> getFConstantSplat(Register VReg,
const MachineRegisterInfo &MRI,
bool AllowUndef = true);
/// Return true if the specified register is defined by G_BUILD_VECTOR or
/// G_BUILD_VECTOR_TRUNC where all of the elements are \p SplatValue or undef.
bool isBuildVectorConstantSplat(const Register Reg,
const MachineRegisterInfo &MRI,
int64_t SplatValue, bool AllowUndef);
/// Return true if the specified instruction is a G_BUILD_VECTOR or
/// G_BUILD_VECTOR_TRUNC where all of the elements are \p SplatValue or undef.
bool isBuildVectorConstantSplat(const MachineInstr &MI,
const MachineRegisterInfo &MRI,
int64_t SplatValue, bool AllowUndef);
/// Return true if the specified instruction is a G_BUILD_VECTOR or
/// G_BUILD_VECTOR_TRUNC where all of the elements are 0 or undef.
bool isBuildVectorAllZeros(const MachineInstr &MI,
const MachineRegisterInfo &MRI,
bool AllowUndef = false);
/// Return true if the specified instruction is a G_BUILD_VECTOR or
/// G_BUILD_VECTOR_TRUNC where all of the elements are ~0 or undef.
bool isBuildVectorAllOnes(const MachineInstr &MI,
const MachineRegisterInfo &MRI,
bool AllowUndef = false);
/// Return true if the specified instruction is known to be a constant, or a
/// vector of constants.
///
/// If \p AllowFP is true, this will consider G_FCONSTANT in addition to
/// G_CONSTANT. If \p AllowOpaqueConstants is true, constant-like instructions
/// such as G_GLOBAL_VALUE will also be considered.
bool isConstantOrConstantVector(const MachineInstr &MI,
const MachineRegisterInfo &MRI,
bool AllowFP = true,
bool AllowOpaqueConstants = true);
/// Return true if the value is a constant 0 integer or a splatted vector of a
/// constant 0 integer (with no undefs if \p AllowUndefs is false). This will
/// handle G_BUILD_VECTOR and G_BUILD_VECTOR_TRUNC as truncation is not an issue
/// for null values.
bool isNullOrNullSplat(const MachineInstr &MI, const MachineRegisterInfo &MRI,
bool AllowUndefs = false);
/// Return true if the value is a constant -1 integer or a splatted vector of a
/// constant -1 integer (with no undefs if \p AllowUndefs is false).
bool isAllOnesOrAllOnesSplat(const MachineInstr &MI,
const MachineRegisterInfo &MRI,
bool AllowUndefs = false);
/// \returns a value when \p MI is a vector splat. The splat can be either a
/// Register or a constant.
///
/// Examples:
///
/// \code
/// %reg = COPY $physreg
/// %reg_splat = G_BUILD_VECTOR %reg, %reg, ..., %reg
/// \endcode
///
/// If called on the G_BUILD_VECTOR above, this will return a RegOrConstant
/// containing %reg.
///
/// \code
/// %cst = G_CONSTANT iN 4
/// %constant_splat = G_BUILD_VECTOR %cst, %cst, ..., %cst
/// \endcode
///
/// In the above case, this will return a RegOrConstant containing 4.
std::optional<RegOrConstant> getVectorSplat(const MachineInstr &MI,
const MachineRegisterInfo &MRI);
/// Determines if \p MI defines a constant integer or a build vector of
/// constant integers. Treats undef values as constants.
bool isConstantOrConstantVector(MachineInstr &MI,
const MachineRegisterInfo &MRI);
/// Determines if \p MI defines a constant integer or a splat vector of
/// constant integers.
/// \returns the scalar constant or std::nullopt.
std::optional<APInt>
isConstantOrConstantSplatVector(MachineInstr &MI,
const MachineRegisterInfo &MRI);
/// Attempt to match a unary predicate against a scalar/splat constant or every
/// element of a constant G_BUILD_VECTOR. If \p ConstVal is null, the source
/// value was undef.
bool matchUnaryPredicate(const MachineRegisterInfo &MRI, Register Reg,
std::function<bool(const Constant *ConstVal)> Match,
bool AllowUndefs = false);
/// Returns true if given the TargetLowering's boolean contents information,
/// the value \p Val contains a true value.
bool isConstTrueVal(const TargetLowering &TLI, int64_t Val, bool IsVector,
bool IsFP);
/// \returns true if given the TargetLowering's boolean contents information,
/// the value \p Val contains a false value.
bool isConstFalseVal(const TargetLowering &TLI, int64_t Val, bool IsVector,
bool IsFP);
/// Returns an integer representing true, as defined by the
/// TargetBooleanContents.
int64_t getICmpTrueVal(const TargetLowering &TLI, bool IsVector, bool IsFP);
/// Returns true if the given block should be optimized for size.
bool shouldOptForSize(const MachineBasicBlock &MBB, ProfileSummaryInfo *PSI,
BlockFrequencyInfo *BFI);
using SmallInstListTy = GISelWorkList<4>;
void saveUsesAndErase(MachineInstr &MI, MachineRegisterInfo &MRI,
LostDebugLocObserver *LocObserver,
SmallInstListTy &DeadInstChain);
void eraseInstrs(ArrayRef<MachineInstr *> DeadInstrs, MachineRegisterInfo &MRI,
LostDebugLocObserver *LocObserver = nullptr);
void eraseInstr(MachineInstr &MI, MachineRegisterInfo &MRI,
LostDebugLocObserver *LocObserver = nullptr);
/// Assuming the instruction \p MI is going to be deleted, attempt to salvage
/// debug users of \p MI by writing the effect of \p MI in a DIExpression.
void salvageDebugInfo(const MachineRegisterInfo &MRI, MachineInstr &MI);
} // End namespace llvm.
#endif
PK iwFZ
T6/ / ( CodeGen/GlobalISel/InstructionSelector.hnu �[��� //===- llvm/CodeGen/GlobalISel/InstructionSelector.h ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file This file declares the API for the instruction selector.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_INSTRUCTIONSELECTOR_H
#define LLVM_CODEGEN_GLOBALISEL_INSTRUCTIONSELECTOR_H
#include "llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h"
namespace llvm {
class InstructionSelector : public GIMatchTableExecutor {
public:
virtual ~InstructionSelector();
/// Select the (possibly generic) instruction \p I to only use target-specific
/// opcodes. It is OK to insert multiple instructions, but they cannot be
/// generic pre-isel instructions.
///
/// \returns whether selection succeeded.
/// \pre I.getParent() && I.getParent()->getParent()
/// \post
/// if returns true:
/// for I in all mutated/inserted instructions:
/// !isPreISelGenericOpcode(I.getOpcode())
virtual bool select(MachineInstr &I) = 0;
};
} // namespace llvm
#endif
PK iwFZ��� 9R 9R ( CodeGen/GlobalISel/LegacyLegalizerInfo.hnu �[��� //===- llvm/CodeGen/GlobalISel/LegacyLegalizerInfo.h ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// Interface for Targets to specify which operations they can successfully
/// select and how the others should be expanded most efficiently.
/// This implementation has been deprecated for a long time but it still in use
/// in a few places.
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_LEGACYLEGALIZERINFO_H
#define LLVM_CODEGEN_GLOBALISEL_LEGACYLEGALIZERINFO_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/CodeGen/LowLevelType.h"
#include "llvm/CodeGen/TargetOpcodes.h"
#include <unordered_map>
namespace llvm {
struct LegalityQuery;
namespace LegacyLegalizeActions {
enum LegacyLegalizeAction : std::uint8_t {
/// The operation is expected to be selectable directly by the target, and
/// no transformation is necessary.
Legal,
/// The operation should be synthesized from multiple instructions acting on
/// a narrower scalar base-type. For example a 64-bit add might be
/// implemented in terms of 32-bit add-with-carry.
NarrowScalar,
/// The operation should be implemented in terms of a wider scalar
/// base-type. For example a <2 x s8> add could be implemented as a <2
/// x s32> add (ignoring the high bits).
WidenScalar,
/// The (vector) operation should be implemented by splitting it into
/// sub-vectors where the operation is legal. For example a <8 x s64> add
/// might be implemented as 4 separate <2 x s64> adds.
FewerElements,
/// The (vector) operation should be implemented by widening the input
/// vector and ignoring the lanes added by doing so. For example <2 x i8> is
/// rarely legal, but you might perform an <8 x i8> and then only look at
/// the first two results.
MoreElements,
/// Perform the operation on a different, but equivalently sized type.
Bitcast,
/// The operation itself must be expressed in terms of simpler actions on
/// this target. E.g. a SREM replaced by an SDIV and subtraction.
Lower,
/// The operation should be implemented as a call to some kind of runtime
/// support library. For example this usually happens on machines that don't
/// support floating-point operations natively.
Libcall,
/// The target wants to do something special with this combination of
/// operand and type. A callback will be issued when it is needed.
Custom,
/// This operation is completely unsupported on the target. A programming
/// error has occurred.
Unsupported,
/// Sentinel value for when no action was found in the specified table.
NotFound,
};
} // end namespace LegacyLegalizeActions
raw_ostream &operator<<(raw_ostream &OS,
LegacyLegalizeActions::LegacyLegalizeAction Action);
/// Legalization is decided based on an instruction's opcode, which type slot
/// we're considering, and what the existing type is. These aspects are gathered
/// together for convenience in the InstrAspect class.
struct InstrAspect {
unsigned Opcode;
unsigned Idx = 0;
LLT Type;
InstrAspect(unsigned Opcode, LLT Type) : Opcode(Opcode), Type(Type) {}
InstrAspect(unsigned Opcode, unsigned Idx, LLT Type)
: Opcode(Opcode), Idx(Idx), Type(Type) {}
bool operator==(const InstrAspect &RHS) const {
return Opcode == RHS.Opcode && Idx == RHS.Idx && Type == RHS.Type;
}
};
/// The result of a query. It either indicates a final answer of Legal or
/// Unsupported or describes an action that must be taken to make an operation
/// more legal.
struct LegacyLegalizeActionStep {
/// The action to take or the final answer.
LegacyLegalizeActions::LegacyLegalizeAction Action;
/// If describing an action, the type index to change. Otherwise zero.
unsigned TypeIdx;
/// If describing an action, the new type for TypeIdx. Otherwise LLT{}.
LLT NewType;
LegacyLegalizeActionStep(LegacyLegalizeActions::LegacyLegalizeAction Action,
unsigned TypeIdx, const LLT NewType)
: Action(Action), TypeIdx(TypeIdx), NewType(NewType) {}
bool operator==(const LegacyLegalizeActionStep &RHS) const {
return std::tie(Action, TypeIdx, NewType) ==
std::tie(RHS.Action, RHS.TypeIdx, RHS.NewType);
}
};
class LegacyLegalizerInfo {
public:
using SizeAndAction =
std::pair<uint16_t, LegacyLegalizeActions::LegacyLegalizeAction>;
using SizeAndActionsVec = std::vector<SizeAndAction>;
using SizeChangeStrategy =
std::function<SizeAndActionsVec(const SizeAndActionsVec &v)>;
LegacyLegalizerInfo();
static bool needsLegalizingToDifferentSize(
const LegacyLegalizeActions::LegacyLegalizeAction Action) {
using namespace LegacyLegalizeActions;
switch (Action) {
case NarrowScalar:
case WidenScalar:
case FewerElements:
case MoreElements:
case Unsupported:
return true;
default:
return false;
}
}
/// Compute any ancillary tables needed to quickly decide how an operation
/// should be handled. This must be called after all "set*Action"methods but
/// before any query is made or incorrect results may be returned.
void computeTables();
/// More friendly way to set an action for common types that have an LLT
/// representation.
/// The LegacyLegalizeAction must be one for which
/// NeedsLegalizingToDifferentSize returns false.
void setAction(const InstrAspect &Aspect,
LegacyLegalizeActions::LegacyLegalizeAction Action) {
assert(!needsLegalizingToDifferentSize(Action));
TablesInitialized = false;
const unsigned OpcodeIdx = Aspect.Opcode - FirstOp;
if (SpecifiedActions[OpcodeIdx].size() <= Aspect.Idx)
SpecifiedActions[OpcodeIdx].resize(Aspect.Idx + 1);
SpecifiedActions[OpcodeIdx][Aspect.Idx][Aspect.Type] = Action;
}
/// The setAction calls record the non-size-changing legalization actions
/// to take on specificly-sized types. The SizeChangeStrategy defines what
/// to do when the size of the type needs to be changed to reach a legally
/// sized type (i.e., one that was defined through a setAction call).
/// e.g.
/// setAction ({G_ADD, 0, LLT::scalar(32)}, Legal);
/// setLegalizeScalarToDifferentSizeStrategy(
/// G_ADD, 0, widenToLargerTypesAndNarrowToLargest);
/// will end up defining getAction({G_ADD, 0, T}) to return the following
/// actions for different scalar types T:
/// LLT::scalar(1)..LLT::scalar(31): {WidenScalar, 0, LLT::scalar(32)}
/// LLT::scalar(32): {Legal, 0, LLT::scalar(32)}
/// LLT::scalar(33)..: {NarrowScalar, 0, LLT::scalar(32)}
///
/// If no SizeChangeAction gets defined, through this function,
/// the default is unsupportedForDifferentSizes.
void setLegalizeScalarToDifferentSizeStrategy(const unsigned Opcode,
const unsigned TypeIdx,
SizeChangeStrategy S) {
const unsigned OpcodeIdx = Opcode - FirstOp;
if (ScalarSizeChangeStrategies[OpcodeIdx].size() <= TypeIdx)
ScalarSizeChangeStrategies[OpcodeIdx].resize(TypeIdx + 1);
ScalarSizeChangeStrategies[OpcodeIdx][TypeIdx] = S;
}
/// See also setLegalizeScalarToDifferentSizeStrategy.
/// This function allows to set the SizeChangeStrategy for vector elements.
void setLegalizeVectorElementToDifferentSizeStrategy(const unsigned Opcode,
const unsigned TypeIdx,
SizeChangeStrategy S) {
const unsigned OpcodeIdx = Opcode - FirstOp;
if (VectorElementSizeChangeStrategies[OpcodeIdx].size() <= TypeIdx)
VectorElementSizeChangeStrategies[OpcodeIdx].resize(TypeIdx + 1);
VectorElementSizeChangeStrategies[OpcodeIdx][TypeIdx] = S;
}
/// A SizeChangeStrategy for the common case where legalization for a
/// particular operation consists of only supporting a specific set of type
/// sizes. E.g.
/// setAction ({G_DIV, 0, LLT::scalar(32)}, Legal);
/// setAction ({G_DIV, 0, LLT::scalar(64)}, Legal);
/// setLegalizeScalarToDifferentSizeStrategy(
/// G_DIV, 0, unsupportedForDifferentSizes);
/// will result in getAction({G_DIV, 0, T}) to return Legal for s32 and s64,
/// and Unsupported for all other scalar types T.
static SizeAndActionsVec
unsupportedForDifferentSizes(const SizeAndActionsVec &v) {
using namespace LegacyLegalizeActions;
return increaseToLargerTypesAndDecreaseToLargest(v, Unsupported,
Unsupported);
}
/// A SizeChangeStrategy for the common case where legalization for a
/// particular operation consists of widening the type to a large legal type,
/// unless there is no such type and then instead it should be narrowed to the
/// largest legal type.
static SizeAndActionsVec
widenToLargerTypesAndNarrowToLargest(const SizeAndActionsVec &v) {
using namespace LegacyLegalizeActions;
assert(v.size() > 0 &&
"At least one size that can be legalized towards is needed"
" for this SizeChangeStrategy");
return increaseToLargerTypesAndDecreaseToLargest(v, WidenScalar,
NarrowScalar);
}
static SizeAndActionsVec
widenToLargerTypesUnsupportedOtherwise(const SizeAndActionsVec &v) {
using namespace LegacyLegalizeActions;
return increaseToLargerTypesAndDecreaseToLargest(v, WidenScalar,
Unsupported);
}
static SizeAndActionsVec
narrowToSmallerAndUnsupportedIfTooSmall(const SizeAndActionsVec &v) {
using namespace LegacyLegalizeActions;
return decreaseToSmallerTypesAndIncreaseToSmallest(v, NarrowScalar,
Unsupported);
}
static SizeAndActionsVec
narrowToSmallerAndWidenToSmallest(const SizeAndActionsVec &v) {
using namespace LegacyLegalizeActions;
assert(v.size() > 0 &&
"At least one size that can be legalized towards is needed"
" for this SizeChangeStrategy");
return decreaseToSmallerTypesAndIncreaseToSmallest(v, NarrowScalar,
WidenScalar);
}
/// A SizeChangeStrategy for the common case where legalization for a
/// particular vector operation consists of having more elements in the
/// vector, to a type that is legal. Unless there is no such type and then
/// instead it should be legalized towards the widest vector that's still
/// legal. E.g.
/// setAction({G_ADD, LLT::vector(8, 8)}, Legal);
/// setAction({G_ADD, LLT::vector(16, 8)}, Legal);
/// setAction({G_ADD, LLT::vector(2, 32)}, Legal);
/// setAction({G_ADD, LLT::vector(4, 32)}, Legal);
/// setLegalizeVectorElementToDifferentSizeStrategy(
/// G_ADD, 0, moreToWiderTypesAndLessToWidest);
/// will result in the following getAction results:
/// * getAction({G_ADD, LLT::vector(8,8)}) returns
/// (Legal, vector(8,8)).
/// * getAction({G_ADD, LLT::vector(9,8)}) returns
/// (MoreElements, vector(16,8)).
/// * getAction({G_ADD, LLT::vector(8,32)}) returns
/// (FewerElements, vector(4,32)).
static SizeAndActionsVec
moreToWiderTypesAndLessToWidest(const SizeAndActionsVec &v) {
using namespace LegacyLegalizeActions;
return increaseToLargerTypesAndDecreaseToLargest(v, MoreElements,
FewerElements);
}
/// Helper function to implement many typical SizeChangeStrategy functions.
static SizeAndActionsVec increaseToLargerTypesAndDecreaseToLargest(
const SizeAndActionsVec &v,
LegacyLegalizeActions::LegacyLegalizeAction IncreaseAction,
LegacyLegalizeActions::LegacyLegalizeAction DecreaseAction);
/// Helper function to implement many typical SizeChangeStrategy functions.
static SizeAndActionsVec decreaseToSmallerTypesAndIncreaseToSmallest(
const SizeAndActionsVec &v,
LegacyLegalizeActions::LegacyLegalizeAction DecreaseAction,
LegacyLegalizeActions::LegacyLegalizeAction IncreaseAction);
LegacyLegalizeActionStep getAction(const LegalityQuery &Query) const;
unsigned getOpcodeIdxForOpcode(unsigned Opcode) const;
private:
/// Determine what action should be taken to legalize the given generic
/// instruction opcode, type-index and type. Requires computeTables to have
/// been called.
///
/// \returns a pair consisting of the kind of legalization that should be
/// performed and the destination type.
std::pair<LegacyLegalizeActions::LegacyLegalizeAction, LLT>
getAspectAction(const InstrAspect &Aspect) const;
/// The SizeAndActionsVec is a representation mapping between all natural
/// numbers and an Action. The natural number represents the bit size of
/// the InstrAspect. For example, for a target with native support for 32-bit
/// and 64-bit additions, you'd express that as:
/// setScalarAction(G_ADD, 0,
/// {{1, WidenScalar}, // bit sizes [ 1, 31[
/// {32, Legal}, // bit sizes [32, 33[
/// {33, WidenScalar}, // bit sizes [33, 64[
/// {64, Legal}, // bit sizes [64, 65[
/// {65, NarrowScalar} // bit sizes [65, +inf[
/// });
/// It may be that only 64-bit pointers are supported on your target:
/// setPointerAction(G_PTR_ADD, 0, LLT:pointer(1),
/// {{1, Unsupported}, // bit sizes [ 1, 63[
/// {64, Legal}, // bit sizes [64, 65[
/// {65, Unsupported}, // bit sizes [65, +inf[
/// });
void setScalarAction(const unsigned Opcode, const unsigned TypeIndex,
const SizeAndActionsVec &SizeAndActions) {
const unsigned OpcodeIdx = Opcode - FirstOp;
SmallVector<SizeAndActionsVec, 1> &Actions = ScalarActions[OpcodeIdx];
setActions(TypeIndex, Actions, SizeAndActions);
}
void setPointerAction(const unsigned Opcode, const unsigned TypeIndex,
const unsigned AddressSpace,
const SizeAndActionsVec &SizeAndActions) {
const unsigned OpcodeIdx = Opcode - FirstOp;
if (AddrSpace2PointerActions[OpcodeIdx].find(AddressSpace) ==
AddrSpace2PointerActions[OpcodeIdx].end())
AddrSpace2PointerActions[OpcodeIdx][AddressSpace] = {{}};
SmallVector<SizeAndActionsVec, 1> &Actions =
AddrSpace2PointerActions[OpcodeIdx].find(AddressSpace)->second;
setActions(TypeIndex, Actions, SizeAndActions);
}
/// If an operation on a given vector type (say <M x iN>) isn't explicitly
/// specified, we proceed in 2 stages. First we legalize the underlying scalar
/// (so that there's at least one legal vector with that scalar), then we
/// adjust the number of elements in the vector so that it is legal. The
/// desired action in the first step is controlled by this function.
void setScalarInVectorAction(const unsigned Opcode, const unsigned TypeIndex,
const SizeAndActionsVec &SizeAndActions) {
unsigned OpcodeIdx = Opcode - FirstOp;
SmallVector<SizeAndActionsVec, 1> &Actions =
ScalarInVectorActions[OpcodeIdx];
setActions(TypeIndex, Actions, SizeAndActions);
}
/// See also setScalarInVectorAction.
/// This function let's you specify the number of elements in a vector that
/// are legal for a legal element size.
void setVectorNumElementAction(const unsigned Opcode,
const unsigned TypeIndex,
const unsigned ElementSize,
const SizeAndActionsVec &SizeAndActions) {
const unsigned OpcodeIdx = Opcode - FirstOp;
if (NumElements2Actions[OpcodeIdx].find(ElementSize) ==
NumElements2Actions[OpcodeIdx].end())
NumElements2Actions[OpcodeIdx][ElementSize] = {{}};
SmallVector<SizeAndActionsVec, 1> &Actions =
NumElements2Actions[OpcodeIdx].find(ElementSize)->second;
setActions(TypeIndex, Actions, SizeAndActions);
}
/// A partial SizeAndActionsVec potentially doesn't cover all bit sizes,
/// i.e. it's OK if it doesn't start from size 1.
static void checkPartialSizeAndActionsVector(const SizeAndActionsVec& v) {
using namespace LegacyLegalizeActions;
#ifndef NDEBUG
// The sizes should be in increasing order
int prev_size = -1;
for(auto SizeAndAction: v) {
assert(SizeAndAction.first > prev_size);
prev_size = SizeAndAction.first;
}
// - for every Widen action, there should be a larger bitsize that
// can be legalized towards (e.g. Legal, Lower, Libcall or Custom
// action).
// - for every Narrow action, there should be a smaller bitsize that
// can be legalized towards.
int SmallestNarrowIdx = -1;
int LargestWidenIdx = -1;
int SmallestLegalizableToSameSizeIdx = -1;
int LargestLegalizableToSameSizeIdx = -1;
for(size_t i=0; i<v.size(); ++i) {
switch (v[i].second) {
case FewerElements:
case NarrowScalar:
if (SmallestNarrowIdx == -1)
SmallestNarrowIdx = i;
break;
case WidenScalar:
case MoreElements:
LargestWidenIdx = i;
break;
case Unsupported:
break;
default:
if (SmallestLegalizableToSameSizeIdx == -1)
SmallestLegalizableToSameSizeIdx = i;
LargestLegalizableToSameSizeIdx = i;
}
}
if (SmallestNarrowIdx != -1) {
assert(SmallestLegalizableToSameSizeIdx != -1);
assert(SmallestNarrowIdx > SmallestLegalizableToSameSizeIdx);
}
if (LargestWidenIdx != -1)
assert(LargestWidenIdx < LargestLegalizableToSameSizeIdx);
#endif
}
/// A full SizeAndActionsVec must cover all bit sizes, i.e. must start with
/// from size 1.
static void checkFullSizeAndActionsVector(const SizeAndActionsVec& v) {
#ifndef NDEBUG
// Data structure invariant: The first bit size must be size 1.
assert(v.size() >= 1);
assert(v[0].first == 1);
checkPartialSizeAndActionsVector(v);
#endif
}
/// Sets actions for all bit sizes on a particular generic opcode, type
/// index and scalar or pointer type.
void setActions(unsigned TypeIndex,
SmallVector<SizeAndActionsVec, 1> &Actions,
const SizeAndActionsVec &SizeAndActions) {
checkFullSizeAndActionsVector(SizeAndActions);
if (Actions.size() <= TypeIndex)
Actions.resize(TypeIndex + 1);
Actions[TypeIndex] = SizeAndActions;
}
static SizeAndAction findAction(const SizeAndActionsVec &Vec,
const uint32_t Size);
/// Returns the next action needed to get the scalar or pointer type closer
/// to being legal
/// E.g. findLegalAction({G_REM, 13}) should return
/// (WidenScalar, 32). After that, findLegalAction({G_REM, 32}) will
/// probably be called, which should return (Lower, 32).
/// This is assuming the setScalarAction on G_REM was something like:
/// setScalarAction(G_REM, 0,
/// {{1, WidenScalar}, // bit sizes [ 1, 31[
/// {32, Lower}, // bit sizes [32, 33[
/// {33, NarrowScalar} // bit sizes [65, +inf[
/// });
std::pair<LegacyLegalizeActions::LegacyLegalizeAction, LLT>
findScalarLegalAction(const InstrAspect &Aspect) const;
/// Returns the next action needed towards legalizing the vector type.
std::pair<LegacyLegalizeActions::LegacyLegalizeAction, LLT>
findVectorLegalAction(const InstrAspect &Aspect) const;
static const int FirstOp = TargetOpcode::PRE_ISEL_GENERIC_OPCODE_START;
static const int LastOp = TargetOpcode::PRE_ISEL_GENERIC_OPCODE_END;
// Data structures used temporarily during construction of legality data:
using TypeMap = DenseMap<LLT, LegacyLegalizeActions::LegacyLegalizeAction>;
SmallVector<TypeMap, 1> SpecifiedActions[LastOp - FirstOp + 1];
SmallVector<SizeChangeStrategy, 1>
ScalarSizeChangeStrategies[LastOp - FirstOp + 1];
SmallVector<SizeChangeStrategy, 1>
VectorElementSizeChangeStrategies[LastOp - FirstOp + 1];
bool TablesInitialized = false;
// Data structures used by getAction:
SmallVector<SizeAndActionsVec, 1> ScalarActions[LastOp - FirstOp + 1];
SmallVector<SizeAndActionsVec, 1> ScalarInVectorActions[LastOp - FirstOp + 1];
std::unordered_map<uint16_t, SmallVector<SizeAndActionsVec, 1>>
AddrSpace2PointerActions[LastOp - FirstOp + 1];
std::unordered_map<uint16_t, SmallVector<SizeAndActionsVec, 1>>
NumElements2Actions[LastOp - FirstOp + 1];
};
} // end namespace llvm
#endif // LLVM_CODEGEN_GLOBALISEL_LEGACYLEGALIZERINFO_H
PK iwFZb1;t[ [ & CodeGen/GlobalISel/InlineAsmLowering.hnu �[��� //===- llvm/CodeGen/GlobalISel/InlineAsmLowering.h --------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file describes how to lower LLVM inline asm to machine code INLINEASM.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_INLINEASMLOWERING_H
#define LLVM_CODEGEN_GLOBALISEL_INLINEASMLOWERING_H
#include "llvm/ADT/ArrayRef.h"
#include <functional>
namespace llvm {
class CallBase;
class MachineIRBuilder;
class MachineOperand;
class Register;
class TargetLowering;
class Value;
class InlineAsmLowering {
const TargetLowering *TLI;
virtual void anchor();
public:
/// Lower the given inline asm call instruction
/// \p GetOrCreateVRegs is a callback to materialize a register for the
/// input and output operands of the inline asm
/// \return True if the lowering succeeds, false otherwise.
bool lowerInlineAsm(MachineIRBuilder &MIRBuilder, const CallBase &CB,
std::function<ArrayRef<Register>(const Value &Val)>
GetOrCreateVRegs) const;
/// Lower the specified operand into the Ops vector.
/// \p Val is the IR input value to be lowered
/// \p Constraint is the user supplied constraint string
/// \p Ops is the vector to be filled with the lowered operands
/// \return True if the lowering succeeds, false otherwise.
virtual bool lowerAsmOperandForConstraint(Value *Val, StringRef Constraint,
std::vector<MachineOperand> &Ops,
MachineIRBuilder &MIRBuilder) const;
protected:
/// Getter for generic TargetLowering class.
const TargetLowering *getTLI() const { return TLI; }
/// Getter for target specific TargetLowering class.
template <class XXXTargetLowering> const XXXTargetLowering *getTLI() const {
return static_cast<const XXXTargetLowering *>(TLI);
}
public:
InlineAsmLowering(const TargetLowering *TLI) : TLI(TLI) {}
virtual ~InlineAsmLowering() = default;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_GLOBALISEL_INLINEASMLOWERING_H
PK iwFZ0�K� � ( CodeGen/GlobalISel/GISelChangeObserver.hnu �[��� //===----- llvm/CodeGen/GlobalISel/GISelChangeObserver.h --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This contains common code to allow clients to notify changes to machine
/// instr.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_GISELCHANGEOBSERVER_H
#define LLVM_CODEGEN_GLOBALISEL_GISELCHANGEOBSERVER_H
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/CodeGen/MachineFunction.h"
namespace llvm {
class MachineInstr;
class MachineRegisterInfo;
/// Abstract class that contains various methods for clients to notify about
/// changes. This should be the preferred way for APIs to notify changes.
/// Typically calling erasingInstr/createdInstr multiple times should not affect
/// the result. The observer would likely need to check if it was already
/// notified earlier (consider using GISelWorkList).
class GISelChangeObserver {
SmallPtrSet<MachineInstr *, 4> ChangingAllUsesOfReg;
public:
virtual ~GISelChangeObserver() = default;
/// An instruction is about to be erased.
virtual void erasingInstr(MachineInstr &MI) = 0;
/// An instruction has been created and inserted into the function.
/// Note that the instruction might not be a fully fledged instruction at this
/// point and won't be if the MachineFunction::Delegate is calling it. This is
/// because the delegate only sees the construction of the MachineInstr before
/// operands have been added.
virtual void createdInstr(MachineInstr &MI) = 0;
/// This instruction is about to be mutated in some way.
virtual void changingInstr(MachineInstr &MI) = 0;
/// This instruction was mutated in some way.
virtual void changedInstr(MachineInstr &MI) = 0;
/// All the instructions using the given register are being changed.
/// For convenience, finishedChangingAllUsesOfReg() will report the completion
/// of the changes. The use list may change between this call and
/// finishedChangingAllUsesOfReg().
void changingAllUsesOfReg(const MachineRegisterInfo &MRI, Register Reg);
/// All instructions reported as changing by changingAllUsesOfReg() have
/// finished being changed.
void finishedChangingAllUsesOfReg();
};
/// Simple wrapper observer that takes several observers, and calls
/// each one for each event. If there are multiple observers (say CSE,
/// Legalizer, Combiner), it's sufficient to register this to the machine
/// function as the delegate.
class GISelObserverWrapper : public MachineFunction::Delegate,
public GISelChangeObserver {
SmallVector<GISelChangeObserver *, 4> Observers;
public:
GISelObserverWrapper() = default;
GISelObserverWrapper(ArrayRef<GISelChangeObserver *> Obs)
: Observers(Obs.begin(), Obs.end()) {}
// Adds an observer.
void addObserver(GISelChangeObserver *O) { Observers.push_back(O); }
// Removes an observer from the list and does nothing if observer is not
// present.
void removeObserver(GISelChangeObserver *O) {
auto It = llvm::find(Observers, O);
if (It != Observers.end())
Observers.erase(It);
}
// API for Observer.
void erasingInstr(MachineInstr &MI) override {
for (auto &O : Observers)
O->erasingInstr(MI);
}
void createdInstr(MachineInstr &MI) override {
for (auto &O : Observers)
O->createdInstr(MI);
}
void changingInstr(MachineInstr &MI) override {
for (auto &O : Observers)
O->changingInstr(MI);
}
void changedInstr(MachineInstr &MI) override {
for (auto &O : Observers)
O->changedInstr(MI);
}
// API for MachineFunction::Delegate
void MF_HandleInsertion(MachineInstr &MI) override { createdInstr(MI); }
void MF_HandleRemoval(MachineInstr &MI) override { erasingInstr(MI); }
};
/// A simple RAII based Delegate installer.
/// Use this in a scope to install a delegate to the MachineFunction and reset
/// it at the end of the scope.
class RAIIDelegateInstaller {
MachineFunction &MF;
MachineFunction::Delegate *Delegate;
public:
RAIIDelegateInstaller(MachineFunction &MF, MachineFunction::Delegate *Del);
~RAIIDelegateInstaller();
};
/// A simple RAII based Observer installer.
/// Use this in a scope to install the Observer to the MachineFunction and reset
/// it at the end of the scope.
class RAIIMFObserverInstaller {
MachineFunction &MF;
public:
RAIIMFObserverInstaller(MachineFunction &MF, GISelChangeObserver &Observer);
~RAIIMFObserverInstaller();
};
/// Class to install both of the above.
class RAIIMFObsDelInstaller {
RAIIDelegateInstaller DelI;
RAIIMFObserverInstaller ObsI;
public:
RAIIMFObsDelInstaller(MachineFunction &MF, GISelObserverWrapper &Wrapper)
: DelI(MF, &Wrapper), ObsI(MF, Wrapper) {}
~RAIIMFObsDelInstaller() = default;
};
} // namespace llvm
#endif
PK iwFZ((T�#� #� - CodeGen/GlobalISel/GIMatchTableExecutorImpl.hnu �[��� //===- llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file This file implements GIMatchTableExecutor's `executeMatchTable`
/// function. This is implemented in a separate file because the function is
/// quite large.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_GIMATCHTABLEEXECUTORIMPL_H
#define LLVM_CODEGEN_GLOBALISEL_GIMATCHTABLEEXECUTORIMPL_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h"
#include "llvm/CodeGen/GlobalISel/Utils.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterBankInfo.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetOpcodes.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/Support/CodeGenCoverage.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <cstddef>
#include <cstdint>
namespace llvm {
template <class TgtExecutor, class PredicateBitset, class ComplexMatcherMemFn,
class CustomRendererFn>
bool GIMatchTableExecutor::executeMatchTable(
TgtExecutor &Exec, NewMIVector &OutMIs, MatcherState &State,
const ExecInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn>
&ExecInfo,
const int64_t *MatchTable, const TargetInstrInfo &TII,
MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI,
const RegisterBankInfo &RBI, const PredicateBitset &AvailableFeatures,
CodeGenCoverage *CoverageInfo) const {
uint64_t CurrentIdx = 0;
SmallVector<uint64_t, 4> OnFailResumeAt;
// Bypass the flag check on the instruction, and only look at the MCInstrDesc.
bool NoFPException = !State.MIs[0]->getDesc().mayRaiseFPException();
const uint16_t Flags = State.MIs[0]->getFlags();
enum RejectAction { RejectAndGiveUp, RejectAndResume };
auto handleReject = [&]() -> RejectAction {
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": Rejected\n");
if (OnFailResumeAt.empty())
return RejectAndGiveUp;
CurrentIdx = OnFailResumeAt.pop_back_val();
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": Resume at " << CurrentIdx << " ("
<< OnFailResumeAt.size() << " try-blocks remain)\n");
return RejectAndResume;
};
auto propagateFlags = [=](NewMIVector &OutMIs) {
for (auto MIB : OutMIs) {
// Set the NoFPExcept flag when no original matched instruction could
// raise an FP exception, but the new instruction potentially might.
uint16_t MIBFlags = Flags;
if (NoFPException && MIB->mayRaiseFPException())
MIBFlags |= MachineInstr::NoFPExcept;
MIB.setMIFlags(MIBFlags);
}
return true;
};
while (true) {
assert(CurrentIdx != ~0u && "Invalid MatchTable index");
int64_t MatcherOpcode = MatchTable[CurrentIdx++];
switch (MatcherOpcode) {
case GIM_Try: {
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": Begin try-block\n");
OnFailResumeAt.push_back(MatchTable[CurrentIdx++]);
break;
}
case GIM_RecordInsn:
case GIM_RecordInsnIgnoreCopies: {
int64_t NewInsnID = MatchTable[CurrentIdx++];
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
// As an optimisation we require that MIs[0] is always the root. Refuse
// any attempt to modify it.
assert(NewInsnID != 0 && "Refusing to modify MIs[0]");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
if (!MO.isReg()) {
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": Not a register\n");
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
if (MO.getReg().isPhysical()) {
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": Is a physical register\n");
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
MachineInstr *NewMI;
if (MatcherOpcode == GIM_RecordInsnIgnoreCopies)
NewMI = getDefIgnoringCopies(MO.getReg(), MRI);
else
NewMI = MRI.getVRegDef(MO.getReg());
if ((size_t)NewInsnID < State.MIs.size())
State.MIs[NewInsnID] = NewMI;
else {
assert((size_t)NewInsnID == State.MIs.size() &&
"Expected to store MIs in order");
State.MIs.push_back(NewMI);
}
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": MIs[" << NewInsnID
<< "] = GIM_RecordInsn(" << InsnID << ", " << OpIdx
<< ")\n");
break;
}
case GIM_CheckFeatures: {
int64_t ExpectedBitsetID = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx
<< ": GIM_CheckFeatures(ExpectedBitsetID="
<< ExpectedBitsetID << ")\n");
if ((AvailableFeatures & ExecInfo.FeatureBitsets[ExpectedBitsetID]) !=
ExecInfo.FeatureBitsets[ExpectedBitsetID]) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_CheckOpcode:
case GIM_CheckOpcodeIsEither: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t Expected0 = MatchTable[CurrentIdx++];
int64_t Expected1 = -1;
if (MatcherOpcode == GIM_CheckOpcodeIsEither)
Expected1 = MatchTable[CurrentIdx++];
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
unsigned Opcode = State.MIs[InsnID]->getOpcode();
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckOpcode(MIs[" << InsnID
<< "], ExpectedOpcode=" << Expected0;
if (MatcherOpcode == GIM_CheckOpcodeIsEither) dbgs()
<< " || " << Expected1;
dbgs() << ") // Got=" << Opcode << "\n";);
if (Opcode != Expected0 && Opcode != Expected1) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_SwitchOpcode: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t LowerBound = MatchTable[CurrentIdx++];
int64_t UpperBound = MatchTable[CurrentIdx++];
int64_t Default = MatchTable[CurrentIdx++];
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
const int64_t Opcode = State.MIs[InsnID]->getOpcode();
DEBUG_WITH_TYPE(TgtExecutor::getName(), {
dbgs() << CurrentIdx << ": GIM_SwitchOpcode(MIs[" << InsnID << "], ["
<< LowerBound << ", " << UpperBound << "), Default=" << Default
<< ", JumpTable...) // Got=" << Opcode << "\n";
});
if (Opcode < LowerBound || UpperBound <= Opcode) {
CurrentIdx = Default;
break;
}
CurrentIdx = MatchTable[CurrentIdx + (Opcode - LowerBound)];
if (!CurrentIdx) {
CurrentIdx = Default;
break;
}
OnFailResumeAt.push_back(Default);
break;
}
case GIM_SwitchType: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t LowerBound = MatchTable[CurrentIdx++];
int64_t UpperBound = MatchTable[CurrentIdx++];
int64_t Default = MatchTable[CurrentIdx++];
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
DEBUG_WITH_TYPE(TgtExecutor::getName(), {
dbgs() << CurrentIdx << ": GIM_SwitchType(MIs[" << InsnID
<< "]->getOperand(" << OpIdx << "), [" << LowerBound << ", "
<< UpperBound << "), Default=" << Default
<< ", JumpTable...) // Got=";
if (!MO.isReg())
dbgs() << "Not a VReg\n";
else
dbgs() << MRI.getType(MO.getReg()) << "\n";
});
if (!MO.isReg()) {
CurrentIdx = Default;
break;
}
const LLT Ty = MRI.getType(MO.getReg());
const auto TyI = ExecInfo.TypeIDMap.find(Ty);
if (TyI == ExecInfo.TypeIDMap.end()) {
CurrentIdx = Default;
break;
}
const int64_t TypeID = TyI->second;
if (TypeID < LowerBound || UpperBound <= TypeID) {
CurrentIdx = Default;
break;
}
CurrentIdx = MatchTable[CurrentIdx + (TypeID - LowerBound)];
if (!CurrentIdx) {
CurrentIdx = Default;
break;
}
OnFailResumeAt.push_back(Default);
break;
}
case GIM_CheckNumOperands: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t Expected = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckNumOperands(MIs["
<< InsnID << "], Expected=" << Expected << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
if (State.MIs[InsnID]->getNumOperands() != Expected) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_CheckI64ImmPredicate:
case GIM_CheckImmOperandPredicate: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatcherOpcode == GIM_CheckImmOperandPredicate
? MatchTable[CurrentIdx++]
: 1;
int64_t Predicate = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckImmPredicate(MIs["
<< InsnID << "]->getOperand(" << OpIdx
<< "), Predicate=" << Predicate << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
assert((State.MIs[InsnID]->getOperand(OpIdx).isImm() ||
State.MIs[InsnID]->getOperand(OpIdx).isCImm()) &&
"Expected immediate operand");
assert(Predicate > GICXXPred_Invalid && "Expected a valid predicate");
int64_t Value = 0;
if (State.MIs[InsnID]->getOperand(OpIdx).isCImm())
Value = State.MIs[InsnID]->getOperand(OpIdx).getCImm()->getSExtValue();
else if (State.MIs[InsnID]->getOperand(OpIdx).isImm())
Value = State.MIs[InsnID]->getOperand(OpIdx).getImm();
else
llvm_unreachable("Expected Imm or CImm operand");
if (!testImmPredicate_I64(Predicate, Value))
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckAPIntImmPredicate: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t Predicate = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs()
<< CurrentIdx << ": GIM_CheckAPIntImmPredicate(MIs["
<< InsnID << "], Predicate=" << Predicate << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
assert(State.MIs[InsnID]->getOpcode() == TargetOpcode::G_CONSTANT &&
"Expected G_CONSTANT");
assert(Predicate > GICXXPred_Invalid &&
"Expected a valid predicate");
if (!State.MIs[InsnID]->getOperand(1).isCImm())
llvm_unreachable("Expected Imm or CImm operand");
const APInt &Value =
State.MIs[InsnID]->getOperand(1).getCImm()->getValue();
if (!testImmPredicate_APInt(Predicate, Value))
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckAPFloatImmPredicate: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t Predicate = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs()
<< CurrentIdx << ": GIM_CheckAPFloatImmPredicate(MIs["
<< InsnID << "], Predicate=" << Predicate << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
assert(State.MIs[InsnID]->getOpcode() == TargetOpcode::G_FCONSTANT &&
"Expected G_FCONSTANT");
assert(State.MIs[InsnID]->getOperand(1).isFPImm() &&
"Expected FPImm operand");
assert(Predicate > GICXXPred_Invalid &&
"Expected a valid predicate");
const APFloat &Value =
State.MIs[InsnID]->getOperand(1).getFPImm()->getValueAPF();
if (!testImmPredicate_APFloat(Predicate, Value))
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckIsBuildVectorAllOnes:
case GIM_CheckIsBuildVectorAllZeros: {
int64_t InsnID = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx
<< ": GIM_CheckBuildVectorAll{Zeros|Ones}(MIs["
<< InsnID << "])\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
const MachineInstr *MI = State.MIs[InsnID];
assert((MI->getOpcode() == TargetOpcode::G_BUILD_VECTOR ||
MI->getOpcode() == TargetOpcode::G_BUILD_VECTOR_TRUNC) &&
"Expected G_BUILD_VECTOR or G_BUILD_VECTOR_TRUNC");
if (MatcherOpcode == GIM_CheckIsBuildVectorAllOnes) {
if (!isBuildVectorAllOnes(*MI, MRI)) {
if (handleReject() == RejectAndGiveUp)
return false;
}
} else {
if (!isBuildVectorAllZeros(*MI, MRI)) {
if (handleReject() == RejectAndGiveUp)
return false;
}
}
break;
}
case GIM_CheckSimplePredicate: {
// Note: we don't check for invalid here because this is purely a hook to
// allow some executors (such as the combiner) to check arbitrary,
// contextless predicates, such as whether a rule is enabled or not.
int64_t Predicate = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx
<< ": GIM_CheckSimplePredicate(Predicate="
<< Predicate << ")\n");
assert(Predicate > GICXXPred_Invalid && "Expected a valid predicate");
if (!testSimplePredicate(Predicate)) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_CheckCxxInsnPredicate: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t Predicate = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs()
<< CurrentIdx << ": GIM_CheckCxxPredicate(MIs["
<< InsnID << "], Predicate=" << Predicate << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
assert(Predicate > GICXXPred_Invalid && "Expected a valid predicate");
if (!testMIPredicate_MI(Predicate, *State.MIs[InsnID], State))
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckHasNoUse: {
int64_t InsnID = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckHasNoUse(MIs["
<< InsnID << "]\n");
const MachineInstr *MI = State.MIs[InsnID];
assert(MI && "Used insn before defined");
assert(MI->getNumDefs() > 0 && "No defs");
const Register Res = MI->getOperand(0).getReg();
if (!MRI.use_nodbg_empty(Res)) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_CheckAtomicOrdering: {
int64_t InsnID = MatchTable[CurrentIdx++];
AtomicOrdering Ordering = (AtomicOrdering)MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckAtomicOrdering(MIs["
<< InsnID << "], " << (uint64_t)Ordering << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
if (!State.MIs[InsnID]->hasOneMemOperand())
if (handleReject() == RejectAndGiveUp)
return false;
for (const auto &MMO : State.MIs[InsnID]->memoperands())
if (MMO->getMergedOrdering() != Ordering)
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckAtomicOrderingOrStrongerThan: {
int64_t InsnID = MatchTable[CurrentIdx++];
AtomicOrdering Ordering = (AtomicOrdering)MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx
<< ": GIM_CheckAtomicOrderingOrStrongerThan(MIs["
<< InsnID << "], " << (uint64_t)Ordering << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
if (!State.MIs[InsnID]->hasOneMemOperand())
if (handleReject() == RejectAndGiveUp)
return false;
for (const auto &MMO : State.MIs[InsnID]->memoperands())
if (!isAtLeastOrStrongerThan(MMO->getMergedOrdering(), Ordering))
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckAtomicOrderingWeakerThan: {
int64_t InsnID = MatchTable[CurrentIdx++];
AtomicOrdering Ordering = (AtomicOrdering)MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx
<< ": GIM_CheckAtomicOrderingWeakerThan(MIs["
<< InsnID << "], " << (uint64_t)Ordering << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
if (!State.MIs[InsnID]->hasOneMemOperand())
if (handleReject() == RejectAndGiveUp)
return false;
for (const auto &MMO : State.MIs[InsnID]->memoperands())
if (!isStrongerThan(Ordering, MMO->getMergedOrdering()))
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckMemoryAddressSpace: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t MMOIdx = MatchTable[CurrentIdx++];
// This accepts a list of possible address spaces.
const int NumAddrSpace = MatchTable[CurrentIdx++];
if (State.MIs[InsnID]->getNumMemOperands() <= MMOIdx) {
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
// Need to still jump to the end of the list of address spaces if we find
// a match earlier.
const uint64_t LastIdx = CurrentIdx + NumAddrSpace;
const MachineMemOperand *MMO =
*(State.MIs[InsnID]->memoperands_begin() + MMOIdx);
const unsigned MMOAddrSpace = MMO->getAddrSpace();
bool Success = false;
for (int I = 0; I != NumAddrSpace; ++I) {
unsigned AddrSpace = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << "addrspace(" << MMOAddrSpace << ") vs "
<< AddrSpace << '\n');
if (AddrSpace == MMOAddrSpace) {
Success = true;
break;
}
}
CurrentIdx = LastIdx;
if (!Success && handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckMemoryAlignment: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t MMOIdx = MatchTable[CurrentIdx++];
unsigned MinAlign = MatchTable[CurrentIdx++];
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
if (State.MIs[InsnID]->getNumMemOperands() <= MMOIdx) {
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
MachineMemOperand *MMO =
*(State.MIs[InsnID]->memoperands_begin() + MMOIdx);
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckMemoryAlignment"
<< "(MIs[" << InsnID << "]->memoperands() + "
<< MMOIdx << ")->getAlignment() >= " << MinAlign
<< ")\n");
if (MMO->getAlign() < MinAlign && handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckMemorySizeEqualTo: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t MMOIdx = MatchTable[CurrentIdx++];
uint64_t Size = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckMemorySizeEqual(MIs["
<< InsnID << "]->memoperands() + " << MMOIdx
<< ", Size=" << Size << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
if (State.MIs[InsnID]->getNumMemOperands() <= MMOIdx) {
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
MachineMemOperand *MMO =
*(State.MIs[InsnID]->memoperands_begin() + MMOIdx);
DEBUG_WITH_TYPE(TgtExecutor::getName(), dbgs() << MMO->getSize()
<< " bytes vs " << Size
<< " bytes\n");
if (MMO->getSize() != Size)
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckMemorySizeEqualToLLT:
case GIM_CheckMemorySizeLessThanLLT:
case GIM_CheckMemorySizeGreaterThanLLT: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t MMOIdx = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(
TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckMemorySize"
<< (MatcherOpcode == GIM_CheckMemorySizeEqualToLLT ? "EqualTo"
: MatcherOpcode == GIM_CheckMemorySizeGreaterThanLLT
? "GreaterThan"
: "LessThan")
<< "LLT(MIs[" << InsnID << "]->memoperands() + " << MMOIdx
<< ", OpIdx=" << OpIdx << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
if (!MO.isReg()) {
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": Not a register\n");
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
if (State.MIs[InsnID]->getNumMemOperands() <= MMOIdx) {
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
MachineMemOperand *MMO =
*(State.MIs[InsnID]->memoperands_begin() + MMOIdx);
unsigned Size = MRI.getType(MO.getReg()).getSizeInBits();
if (MatcherOpcode == GIM_CheckMemorySizeEqualToLLT &&
MMO->getSizeInBits() != Size) {
if (handleReject() == RejectAndGiveUp)
return false;
} else if (MatcherOpcode == GIM_CheckMemorySizeLessThanLLT &&
MMO->getSizeInBits() >= Size) {
if (handleReject() == RejectAndGiveUp)
return false;
} else if (MatcherOpcode == GIM_CheckMemorySizeGreaterThanLLT &&
MMO->getSizeInBits() <= Size)
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckType: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t TypeID = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckType(MIs[" << InsnID
<< "]->getOperand(" << OpIdx
<< "), TypeID=" << TypeID << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
if (!MO.isReg() ||
MRI.getType(MO.getReg()) != ExecInfo.TypeObjects[TypeID]) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_CheckPointerToAny: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
uint64_t SizeInBits = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckPointerToAny(MIs["
<< InsnID << "]->getOperand(" << OpIdx
<< "), SizeInBits=" << SizeInBits << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
const LLT Ty = MRI.getType(MO.getReg());
// iPTR must be looked up in the target.
if (SizeInBits == 0) {
MachineFunction *MF = State.MIs[InsnID]->getParent()->getParent();
const unsigned AddrSpace = Ty.getAddressSpace();
SizeInBits = MF->getDataLayout().getPointerSizeInBits(AddrSpace);
}
assert(SizeInBits != 0 && "Pointer size must be known");
if (MO.isReg()) {
if (!Ty.isPointer() || Ty.getSizeInBits() != SizeInBits)
if (handleReject() == RejectAndGiveUp)
return false;
} else if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_RecordNamedOperand: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
uint64_t StoreIdx = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_RecordNamedOperand(MIs["
<< InsnID << "]->getOperand(" << OpIdx
<< "), StoreIdx=" << StoreIdx << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
assert(StoreIdx < State.RecordedOperands.size() && "Index out of range");
State.RecordedOperands[StoreIdx] = &State.MIs[InsnID]->getOperand(OpIdx);
break;
}
case GIM_CheckRegBankForClass: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t RCEnum = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckRegBankForClass(MIs["
<< InsnID << "]->getOperand(" << OpIdx
<< "), RCEnum=" << RCEnum << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
if (!MO.isReg() ||
&RBI.getRegBankFromRegClass(*TRI.getRegClass(RCEnum),
MRI.getType(MO.getReg())) !=
RBI.getRegBank(MO.getReg(), MRI, TRI)) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_CheckComplexPattern: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t RendererID = MatchTable[CurrentIdx++];
int64_t ComplexPredicateID = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": State.Renderers[" << RendererID
<< "] = GIM_CheckComplexPattern(MIs[" << InsnID
<< "]->getOperand(" << OpIdx
<< "), ComplexPredicateID=" << ComplexPredicateID
<< ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
// FIXME: Use std::invoke() when it's available.
ComplexRendererFns Renderer =
(Exec.*ExecInfo.ComplexPredicates[ComplexPredicateID])(
State.MIs[InsnID]->getOperand(OpIdx));
if (Renderer)
State.Renderers[RendererID] = *Renderer;
else if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckConstantInt: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t Value = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckConstantInt(MIs["
<< InsnID << "]->getOperand(" << OpIdx
<< "), Value=" << Value << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
if (MO.isReg()) {
// isOperandImmEqual() will sign-extend to 64-bits, so should we.
LLT Ty = MRI.getType(MO.getReg());
Value = SignExtend64(Value, Ty.getSizeInBits());
if (!isOperandImmEqual(MO, Value, MRI)) {
if (handleReject() == RejectAndGiveUp)
return false;
}
} else if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckLiteralInt: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t Value = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckLiteralInt(MIs["
<< InsnID << "]->getOperand(" << OpIdx
<< "), Value=" << Value << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
if (MO.isImm() && MO.getImm() == Value)
break;
if (MO.isCImm() && MO.getCImm()->equalsInt(Value))
break;
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckIntrinsicID: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t Value = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckIntrinsicID(MIs["
<< InsnID << "]->getOperand(" << OpIdx
<< "), Value=" << Value << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
if (!MO.isIntrinsicID() || MO.getIntrinsicID() != Value)
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckCmpPredicate: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t Value = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckCmpPredicate(MIs["
<< InsnID << "]->getOperand(" << OpIdx
<< "), Value=" << Value << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
if (!MO.isPredicate() || MO.getPredicate() != Value)
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckIsMBB: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckIsMBB(MIs[" << InsnID
<< "]->getOperand(" << OpIdx << "))\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
if (!State.MIs[InsnID]->getOperand(OpIdx).isMBB()) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_CheckIsImm: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckIsImm(MIs[" << InsnID
<< "]->getOperand(" << OpIdx << "))\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
if (!State.MIs[InsnID]->getOperand(OpIdx).isImm()) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_CheckIsSafeToFold: {
int64_t InsnID = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckIsSafeToFold(MIs["
<< InsnID << "])\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
if (!isObviouslySafeToFold(*State.MIs[InsnID], *State.MIs[0])) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_CheckIsSameOperand:
case GIM_CheckIsSameOperandIgnoreCopies: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t OtherInsnID = MatchTable[CurrentIdx++];
int64_t OtherOpIdx = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_CheckIsSameOperand(MIs["
<< InsnID << "][" << OpIdx << "], MIs["
<< OtherInsnID << "][" << OtherOpIdx << "])\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
assert(State.MIs[OtherInsnID] != nullptr && "Used insn before defined");
MachineOperand &Op = State.MIs[InsnID]->getOperand(OpIdx);
MachineOperand &OtherOp = State.MIs[OtherInsnID]->getOperand(OtherOpIdx);
if (MatcherOpcode == GIM_CheckIsSameOperandIgnoreCopies) {
if (Op.isReg() && OtherOp.isReg()) {
if (getSrcRegIgnoringCopies(Op.getReg(), MRI) ==
getSrcRegIgnoringCopies(OtherOp.getReg(), MRI))
break;
}
}
if (!Op.isIdenticalTo(OtherOp)) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_Reject:
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIM_Reject\n");
if (handleReject() == RejectAndGiveUp)
return false;
break;
case GIR_MutateOpcode: {
int64_t OldInsnID = MatchTable[CurrentIdx++];
uint64_t NewInsnID = MatchTable[CurrentIdx++];
int64_t NewOpcode = MatchTable[CurrentIdx++];
if (NewInsnID >= OutMIs.size())
OutMIs.resize(NewInsnID + 1);
OutMIs[NewInsnID] = MachineInstrBuilder(*State.MIs[OldInsnID]->getMF(),
State.MIs[OldInsnID]);
OutMIs[NewInsnID]->setDesc(TII.get(NewOpcode));
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIR_MutateOpcode(OutMIs["
<< NewInsnID << "], MIs[" << OldInsnID << "], "
<< NewOpcode << ")\n");
break;
}
case GIR_BuildMI: {
uint64_t NewInsnID = MatchTable[CurrentIdx++];
int64_t Opcode = MatchTable[CurrentIdx++];
if (NewInsnID >= OutMIs.size())
OutMIs.resize(NewInsnID + 1);
OutMIs[NewInsnID] = BuildMI(*State.MIs[0]->getParent(), State.MIs[0],
MIMetadata(*State.MIs[0]), TII.get(Opcode));
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIR_BuildMI(OutMIs["
<< NewInsnID << "], " << Opcode << ")\n");
break;
}
case GIR_Copy: {
int64_t NewInsnID = MatchTable[CurrentIdx++];
int64_t OldInsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
assert(OutMIs[NewInsnID] && "Attempted to add to undefined instruction");
OutMIs[NewInsnID].add(State.MIs[OldInsnID]->getOperand(OpIdx));
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs()
<< CurrentIdx << ": GIR_Copy(OutMIs[" << NewInsnID
<< "], MIs[" << OldInsnID << "], " << OpIdx << ")\n");
break;
}
case GIR_CopyOrAddZeroReg: {
int64_t NewInsnID = MatchTable[CurrentIdx++];
int64_t OldInsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t ZeroReg = MatchTable[CurrentIdx++];
assert(OutMIs[NewInsnID] && "Attempted to add to undefined instruction");
MachineOperand &MO = State.MIs[OldInsnID]->getOperand(OpIdx);
if (isOperandImmEqual(MO, 0, MRI))
OutMIs[NewInsnID].addReg(ZeroReg);
else
OutMIs[NewInsnID].add(MO);
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIR_CopyOrAddZeroReg(OutMIs["
<< NewInsnID << "], MIs[" << OldInsnID << "], "
<< OpIdx << ", " << ZeroReg << ")\n");
break;
}
case GIR_CopySubReg: {
int64_t NewInsnID = MatchTable[CurrentIdx++];
int64_t OldInsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t SubRegIdx = MatchTable[CurrentIdx++];
assert(OutMIs[NewInsnID] && "Attempted to add to undefined instruction");
OutMIs[NewInsnID].addReg(State.MIs[OldInsnID]->getOperand(OpIdx).getReg(),
0, SubRegIdx);
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIR_CopySubReg(OutMIs["
<< NewInsnID << "], MIs[" << OldInsnID << "], "
<< OpIdx << ", " << SubRegIdx << ")\n");
break;
}
case GIR_AddImplicitDef: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t RegNum = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
OutMIs[InsnID].addDef(RegNum, RegState::Implicit);
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIR_AddImplicitDef(OutMIs["
<< InsnID << "], " << RegNum << ")\n");
break;
}
case GIR_AddImplicitUse: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t RegNum = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
OutMIs[InsnID].addUse(RegNum, RegState::Implicit);
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIR_AddImplicitUse(OutMIs["
<< InsnID << "], " << RegNum << ")\n");
break;
}
case GIR_AddRegister: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t RegNum = MatchTable[CurrentIdx++];
uint64_t RegFlags = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
OutMIs[InsnID].addReg(RegNum, RegFlags);
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs()
<< CurrentIdx << ": GIR_AddRegister(OutMIs[" << InsnID
<< "], " << RegNum << ", " << RegFlags << ")\n");
break;
}
case GIR_AddTempRegister:
case GIR_AddTempSubRegister: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t TempRegID = MatchTable[CurrentIdx++];
uint64_t TempRegFlags = MatchTable[CurrentIdx++];
unsigned SubReg = 0;
if (MatcherOpcode == GIR_AddTempSubRegister)
SubReg = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
OutMIs[InsnID].addReg(State.TempRegisters[TempRegID], TempRegFlags,
SubReg);
DEBUG_WITH_TYPE(
TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIR_AddTempRegister(OutMIs[" << InsnID
<< "], TempRegisters[" << TempRegID << "]";
if (SubReg) dbgs() << '.' << TRI.getSubRegIndexName(SubReg);
dbgs() << ", " << TempRegFlags << ")\n");
break;
}
case GIR_AddImm: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t Imm = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
OutMIs[InsnID].addImm(Imm);
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIR_AddImm(OutMIs[" << InsnID
<< "], " << Imm << ")\n");
break;
}
case GIR_ComplexRenderer: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t RendererID = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
for (const auto &RenderOpFn : State.Renderers[RendererID])
RenderOpFn(OutMIs[InsnID]);
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIR_ComplexRenderer(OutMIs["
<< InsnID << "], " << RendererID << ")\n");
break;
}
case GIR_ComplexSubOperandRenderer: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t RendererID = MatchTable[CurrentIdx++];
int64_t RenderOpID = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
State.Renderers[RendererID][RenderOpID](OutMIs[InsnID]);
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx
<< ": GIR_ComplexSubOperandRenderer(OutMIs["
<< InsnID << "], " << RendererID << ", "
<< RenderOpID << ")\n");
break;
}
case GIR_ComplexSubOperandSubRegRenderer: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t RendererID = MatchTable[CurrentIdx++];
int64_t RenderOpID = MatchTable[CurrentIdx++];
int64_t SubRegIdx = MatchTable[CurrentIdx++];
MachineInstrBuilder &MI = OutMIs[InsnID];
assert(MI && "Attempted to add to undefined instruction");
State.Renderers[RendererID][RenderOpID](MI);
MI->getOperand(MI->getNumOperands() - 1).setSubReg(SubRegIdx);
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx
<< ": GIR_ComplexSubOperandSubRegRenderer(OutMIs["
<< InsnID << "], " << RendererID << ", "
<< RenderOpID << ", " << SubRegIdx << ")\n");
break;
}
case GIR_CopyConstantAsSImm: {
int64_t NewInsnID = MatchTable[CurrentIdx++];
int64_t OldInsnID = MatchTable[CurrentIdx++];
assert(OutMIs[NewInsnID] && "Attempted to add to undefined instruction");
assert(State.MIs[OldInsnID]->getOpcode() == TargetOpcode::G_CONSTANT &&
"Expected G_CONSTANT");
if (State.MIs[OldInsnID]->getOperand(1).isCImm()) {
OutMIs[NewInsnID].addImm(
State.MIs[OldInsnID]->getOperand(1).getCImm()->getSExtValue());
} else if (State.MIs[OldInsnID]->getOperand(1).isImm())
OutMIs[NewInsnID].add(State.MIs[OldInsnID]->getOperand(1));
else
llvm_unreachable("Expected Imm or CImm operand");
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIR_CopyConstantAsSImm(OutMIs["
<< NewInsnID << "], MIs[" << OldInsnID << "])\n");
break;
}
// TODO: Needs a test case once we have a pattern that uses this.
case GIR_CopyFConstantAsFPImm: {
int64_t NewInsnID = MatchTable[CurrentIdx++];
int64_t OldInsnID = MatchTable[CurrentIdx++];
assert(OutMIs[NewInsnID] && "Attempted to add to undefined instruction");
assert(State.MIs[OldInsnID]->getOpcode() == TargetOpcode::G_FCONSTANT &&
"Expected G_FCONSTANT");
if (State.MIs[OldInsnID]->getOperand(1).isFPImm())
OutMIs[NewInsnID].addFPImm(
State.MIs[OldInsnID]->getOperand(1).getFPImm());
else
llvm_unreachable("Expected FPImm operand");
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs()
<< CurrentIdx << ": GIR_CopyFPConstantAsFPImm(OutMIs["
<< NewInsnID << "], MIs[" << OldInsnID << "])\n");
break;
}
case GIR_CustomRenderer: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OldInsnID = MatchTable[CurrentIdx++];
int64_t RendererFnID = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIR_CustomRenderer(OutMIs["
<< InsnID << "], MIs[" << OldInsnID << "], "
<< RendererFnID << ")\n");
(Exec.*ExecInfo.CustomRenderers[RendererFnID])(
OutMIs[InsnID], *State.MIs[OldInsnID],
-1); // Not a source operand of the old instruction.
break;
}
case GIR_CustomAction: {
int64_t FnID = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIR_CustomAction(FnID=" << FnID
<< ")\n");
assert(FnID > GICXXCustomAction_Invalid && "Expected a valid FnID");
runCustomAction(FnID, State);
break;
}
case GIR_CustomOperandRenderer: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OldInsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t RendererFnID = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx
<< ": GIR_CustomOperandRenderer(OutMIs[" << InsnID
<< "], MIs[" << OldInsnID << "]->getOperand("
<< OpIdx << "), " << RendererFnID << ")\n");
(Exec.*ExecInfo.CustomRenderers[RendererFnID])(
OutMIs[InsnID], *State.MIs[OldInsnID], OpIdx);
break;
}
case GIR_ConstrainOperandRC: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t RCEnum = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
MachineInstr &I = *OutMIs[InsnID].getInstr();
MachineFunction &MF = *I.getParent()->getParent();
MachineRegisterInfo &MRI = MF.getRegInfo();
const TargetRegisterClass &RC = *TRI.getRegClass(RCEnum);
MachineOperand &MO = I.getOperand(OpIdx);
constrainOperandRegClass(MF, TRI, MRI, TII, RBI, I, RC, MO);
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIR_ConstrainOperandRC(OutMIs["
<< InsnID << "], " << OpIdx << ", " << RCEnum
<< ")\n");
break;
}
case GIR_ConstrainSelectedInstOperands: {
int64_t InsnID = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
constrainSelectedInstRegOperands(*OutMIs[InsnID].getInstr(), TII, TRI,
RBI);
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx
<< ": GIR_ConstrainSelectedInstOperands(OutMIs["
<< InsnID << "])\n");
break;
}
case GIR_MergeMemOperands: {
int64_t InsnID = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIR_MergeMemOperands(OutMIs["
<< InsnID << "]");
int64_t MergeInsnID = GIU_MergeMemOperands_EndOfList;
while ((MergeInsnID = MatchTable[CurrentIdx++]) !=
GIU_MergeMemOperands_EndOfList) {
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << ", MIs[" << MergeInsnID << "]");
for (const auto &MMO : State.MIs[MergeInsnID]->memoperands())
OutMIs[InsnID].addMemOperand(MMO);
}
DEBUG_WITH_TYPE(TgtExecutor::getName(), dbgs() << ")\n");
break;
}
case GIR_EraseFromParent: {
int64_t InsnID = MatchTable[CurrentIdx++];
assert(State.MIs[InsnID] &&
"Attempted to erase an undefined instruction");
State.MIs[InsnID]->eraseFromParent();
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIR_EraseFromParent(MIs["
<< InsnID << "])\n");
break;
}
case GIR_MakeTempReg: {
int64_t TempRegID = MatchTable[CurrentIdx++];
int64_t TypeID = MatchTable[CurrentIdx++];
State.TempRegisters[TempRegID] =
MRI.createGenericVirtualRegister(ExecInfo.TypeObjects[TypeID]);
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": TempRegs[" << TempRegID
<< "] = GIR_MakeTempReg(" << TypeID << ")\n");
break;
}
case GIR_Coverage: {
int64_t RuleID = MatchTable[CurrentIdx++];
assert(CoverageInfo);
CoverageInfo->setCovered(RuleID);
DEBUG_WITH_TYPE(TgtExecutor::getName(), dbgs() << CurrentIdx
<< ": GIR_Coverage("
<< RuleID << ")");
break;
}
case GIR_Done:
DEBUG_WITH_TYPE(TgtExecutor::getName(),
dbgs() << CurrentIdx << ": GIR_Done\n");
propagateFlags(OutMIs);
return true;
default:
llvm_unreachable("Unexpected command");
}
}
}
} // end namespace llvm
#endif // LLVM_CODEGEN_GLOBALISEL_GIMATCHTABLEEXECUTORIMPL_H
PK iwFZ|6cWx Wx % CodeGen/GlobalISel/RegisterBankInfo.hnu �[��� //===- llvm/CodeGen/GlobalISel/RegisterBankInfo.h ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file This file declares the API for the register bank info.
/// This API is responsible for handling the register banks.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_REGISTERBANKINFO_H
#define LLVM_CODEGEN_GLOBALISEL_REGISTERBANKINFO_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/Hashing.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/Register.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/LowLevelTypeImpl.h"
#include <cassert>
#include <initializer_list>
#include <memory>
namespace llvm {
class MachineInstr;
class MachineRegisterInfo;
class raw_ostream;
class RegisterBank;
class TargetInstrInfo;
class TargetRegisterClass;
class TargetRegisterInfo;
/// Holds all the information related to register banks.
class RegisterBankInfo {
public:
/// Helper struct that represents how a value is partially mapped
/// into a register.
/// The StartIdx and Length represent what region of the orginal
/// value this partial mapping covers.
/// This can be represented as a Mask of contiguous bit starting
/// at StartIdx bit and spanning Length bits.
/// StartIdx is the number of bits from the less significant bits.
struct PartialMapping {
/// Number of bits at which this partial mapping starts in the
/// original value. The bits are counted from less significant
/// bits to most significant bits.
unsigned StartIdx;
/// Length of this mapping in bits. This is how many bits this
/// partial mapping covers in the original value:
/// from StartIdx to StartIdx + Length -1.
unsigned Length;
/// Register bank where the partial value lives.
const RegisterBank *RegBank;
PartialMapping() = default;
/// Provide a shortcut for quickly building PartialMapping.
PartialMapping(unsigned StartIdx, unsigned Length,
const RegisterBank &RegBank)
: StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {}
/// \return the index of in the original value of the most
/// significant bit that this partial mapping covers.
unsigned getHighBitIdx() const { return StartIdx + Length - 1; }
/// Print this partial mapping on dbgs() stream.
void dump() const;
/// Print this partial mapping on \p OS;
void print(raw_ostream &OS) const;
/// Check that the Mask is compatible with the RegBank.
/// Indeed, if the RegBank cannot accomadate the "active bits" of the mask,
/// there is no way this mapping is valid.
///
/// \note This method does not check anything when assertions are disabled.
///
/// \return True is the check was successful.
bool verify() const;
};
/// Helper struct that represents how a value is mapped through
/// different register banks.
///
/// \note: So far we do not have any users of the complex mappings
/// (mappings with more than one partial mapping), but when we do,
/// we would have needed to duplicate partial mappings.
/// The alternative could be to use an array of pointers of partial
/// mapping (i.e., PartialMapping **BreakDown) and duplicate the
/// pointers instead.
///
/// E.g.,
/// Let say we have a 32-bit add and a <2 x 32-bit> vadd. We
/// can expand the
/// <2 x 32-bit> add into 2 x 32-bit add.
///
/// Currently the TableGen-like file would look like:
/// \code
/// PartialMapping[] = {
/// /*32-bit add*/ {0, 32, GPR}, // Scalar entry repeated for first
/// // vec elt.
/// /*2x32-bit add*/ {0, 32, GPR}, {32, 32, GPR},
/// /*<2x32-bit> vadd*/ {0, 64, VPR}
/// }; // PartialMapping duplicated.
///
/// ValueMapping[] {
/// /*plain 32-bit add*/ {&PartialMapping[0], 1},
/// /*expanded vadd on 2xadd*/ {&PartialMapping[1], 2},
/// /*plain <2x32-bit> vadd*/ {&PartialMapping[3], 1}
/// };
/// \endcode
///
/// With the array of pointer, we would have:
/// \code
/// PartialMapping[] = {
/// /*32-bit add lower */ { 0, 32, GPR},
/// /*32-bit add upper */ {32, 32, GPR},
/// /*<2x32-bit> vadd */ { 0, 64, VPR}
/// }; // No more duplication.
///
/// BreakDowns[] = {
/// /*AddBreakDown*/ &PartialMapping[0],
/// /*2xAddBreakDown*/ &PartialMapping[0], &PartialMapping[1],
/// /*VAddBreakDown*/ &PartialMapping[2]
/// }; // Addresses of PartialMapping duplicated (smaller).
///
/// ValueMapping[] {
/// /*plain 32-bit add*/ {&BreakDowns[0], 1},
/// /*expanded vadd on 2xadd*/ {&BreakDowns[1], 2},
/// /*plain <2x32-bit> vadd*/ {&BreakDowns[3], 1}
/// };
/// \endcode
///
/// Given that a PartialMapping is actually small, the code size
/// impact is actually a degradation. Moreover the compile time will
/// be hit by the additional indirection.
/// If PartialMapping gets bigger we may reconsider.
struct ValueMapping {
/// How the value is broken down between the different register banks.
const PartialMapping *BreakDown;
/// Number of partial mapping to break down this value.
unsigned NumBreakDowns;
/// The default constructor creates an invalid (isValid() == false)
/// instance.
ValueMapping() : ValueMapping(nullptr, 0) {}
/// Initialize a ValueMapping with the given parameter.
/// \p BreakDown needs to have a life time at least as long
/// as this instance.
ValueMapping(const PartialMapping *BreakDown, unsigned NumBreakDowns)
: BreakDown(BreakDown), NumBreakDowns(NumBreakDowns) {}
/// Iterators through the PartialMappings.
const PartialMapping *begin() const { return BreakDown; }
const PartialMapping *end() const { return BreakDown + NumBreakDowns; }
/// \return true if all partial mappings are the same size and register
/// bank.
bool partsAllUniform() const;
/// Check if this ValueMapping is valid.
bool isValid() const { return BreakDown && NumBreakDowns; }
/// Verify that this mapping makes sense for a value of
/// \p MeaningfulBitWidth.
/// \note This method does not check anything when assertions are disabled.
///
/// \return True is the check was successful.
bool verify(unsigned MeaningfulBitWidth) const;
/// Print this on dbgs() stream.
void dump() const;
/// Print this on \p OS;
void print(raw_ostream &OS) const;
};
/// Helper class that represents how the value of an instruction may be
/// mapped and what is the related cost of such mapping.
class InstructionMapping {
/// Identifier of the mapping.
/// This is used to communicate between the target and the optimizers
/// which mapping should be realized.
unsigned ID = InvalidMappingID;
/// Cost of this mapping.
unsigned Cost = 0;
/// Mapping of all the operands.
const ValueMapping *OperandsMapping = nullptr;
/// Number of operands.
unsigned NumOperands = 0;
const ValueMapping &getOperandMapping(unsigned i) {
assert(i < getNumOperands() && "Out of bound operand");
return OperandsMapping[i];
}
public:
/// Constructor for the mapping of an instruction.
/// \p NumOperands must be equal to number of all the operands of
/// the related instruction.
/// The rationale is that it is more efficient for the optimizers
/// to be able to assume that the mapping of the ith operand is
/// at the index i.
InstructionMapping(unsigned ID, unsigned Cost,
const ValueMapping *OperandsMapping,
unsigned NumOperands)
: ID(ID), Cost(Cost), OperandsMapping(OperandsMapping),
NumOperands(NumOperands) {
}
/// Default constructor.
/// Use this constructor to express that the mapping is invalid.
InstructionMapping() = default;
/// Get the cost.
unsigned getCost() const { return Cost; }
/// Get the ID.
unsigned getID() const { return ID; }
/// Get the number of operands.
unsigned getNumOperands() const { return NumOperands; }
/// Get the value mapping of the ith operand.
/// \pre The mapping for the ith operand has been set.
/// \pre The ith operand is a register.
const ValueMapping &getOperandMapping(unsigned i) const {
const ValueMapping &ValMapping =
const_cast<InstructionMapping *>(this)->getOperandMapping(i);
return ValMapping;
}
/// Set the mapping for all the operands.
/// In other words, OpdsMapping should hold at least getNumOperands
/// ValueMapping.
void setOperandsMapping(const ValueMapping *OpdsMapping) {
OperandsMapping = OpdsMapping;
}
/// Check whether this object is valid.
/// This is a lightweight check for obvious wrong instance.
bool isValid() const {
return getID() != InvalidMappingID && OperandsMapping;
}
/// Verifiy that this mapping makes sense for \p MI.
/// \pre \p MI must be connected to a MachineFunction.
///
/// \note This method does not check anything when assertions are disabled.
///
/// \return True is the check was successful.
bool verify(const MachineInstr &MI) const;
/// Print this on dbgs() stream.
void dump() const;
/// Print this on \p OS;
void print(raw_ostream &OS) const;
};
/// Convenient type to represent the alternatives for mapping an
/// instruction.
/// \todo When we move to TableGen this should be an array ref.
using InstructionMappings = SmallVector<const InstructionMapping *, 4>;
/// Helper class used to get/create the virtual registers that will be used
/// to replace the MachineOperand when applying a mapping.
class OperandsMapper {
/// The OpIdx-th cell contains the index in NewVRegs where the VRegs of the
/// OpIdx-th operand starts. -1 means we do not have such mapping yet.
/// Note: We use a SmallVector to avoid heap allocation for most cases.
SmallVector<int, 8> OpToNewVRegIdx;
/// Hold the registers that will be used to map MI with InstrMapping.
SmallVector<Register, 8> NewVRegs;
/// Current MachineRegisterInfo, used to create new virtual registers.
MachineRegisterInfo &MRI;
/// Instruction being remapped.
MachineInstr &MI;
/// New mapping of the instruction.
const InstructionMapping &InstrMapping;
/// Constant value identifying that the index in OpToNewVRegIdx
/// for an operand has not been set yet.
static const int DontKnowIdx;
/// Get the range in NewVRegs to store all the partial
/// values for the \p OpIdx-th operand.
///
/// \return The iterator range for the space created.
//
/// \pre getMI().getOperand(OpIdx).isReg()
iterator_range<SmallVectorImpl<Register>::iterator>
getVRegsMem(unsigned OpIdx);
/// Get the end iterator for a range starting at \p StartIdx and
/// spannig \p NumVal in NewVRegs.
/// \pre StartIdx + NumVal <= NewVRegs.size()
SmallVectorImpl<Register>::const_iterator
getNewVRegsEnd(unsigned StartIdx, unsigned NumVal) const;
SmallVectorImpl<Register>::iterator getNewVRegsEnd(unsigned StartIdx,
unsigned NumVal);
public:
/// Create an OperandsMapper that will hold the information to apply \p
/// InstrMapping to \p MI.
/// \pre InstrMapping.verify(MI)
OperandsMapper(MachineInstr &MI, const InstructionMapping &InstrMapping,
MachineRegisterInfo &MRI);
/// \name Getters.
/// @{
/// The MachineInstr being remapped.
MachineInstr &getMI() const { return MI; }
/// The final mapping of the instruction.
const InstructionMapping &getInstrMapping() const { return InstrMapping; }
/// The MachineRegisterInfo we used to realize the mapping.
MachineRegisterInfo &getMRI() const { return MRI; }
/// @}
/// Create as many new virtual registers as needed for the mapping of the \p
/// OpIdx-th operand.
/// The number of registers is determined by the number of breakdown for the
/// related operand in the instruction mapping.
/// The type of the new registers is a plain scalar of the right size.
/// The proper type is expected to be set when the mapping is applied to
/// the instruction(s) that realizes the mapping.
///
/// \pre getMI().getOperand(OpIdx).isReg()
///
/// \post All the partial mapping of the \p OpIdx-th operand have been
/// assigned a new virtual register.
void createVRegs(unsigned OpIdx);
/// Set the virtual register of the \p PartialMapIdx-th partial mapping of
/// the OpIdx-th operand to \p NewVReg.
///
/// \pre getMI().getOperand(OpIdx).isReg()
/// \pre getInstrMapping().getOperandMapping(OpIdx).BreakDown.size() >
/// PartialMapIdx
/// \pre NewReg != 0
///
/// \post the \p PartialMapIdx-th register of the value mapping of the \p
/// OpIdx-th operand has been set.
void setVRegs(unsigned OpIdx, unsigned PartialMapIdx, Register NewVReg);
/// Get all the virtual registers required to map the \p OpIdx-th operand of
/// the instruction.
///
/// This return an empty range when createVRegs or setVRegs has not been
/// called.
/// The iterator may be invalidated by a call to setVRegs or createVRegs.
///
/// When \p ForDebug is true, we will not check that the list of new virtual
/// registers does not contain uninitialized values.
///
/// \pre getMI().getOperand(OpIdx).isReg()
/// \pre ForDebug || All partial mappings have been set a register
iterator_range<SmallVectorImpl<Register>::const_iterator>
getVRegs(unsigned OpIdx, bool ForDebug = false) const;
/// Print this operands mapper on dbgs() stream.
void dump() const;
/// Print this operands mapper on \p OS stream.
void print(raw_ostream &OS, bool ForDebug = false) const;
};
protected:
/// Hold the set of supported register banks.
RegisterBank **RegBanks;
/// Total number of register banks.
unsigned NumRegBanks;
/// Keep dynamically allocated PartialMapping in a separate map.
/// This shouldn't be needed when everything gets TableGen'ed.
mutable DenseMap<unsigned, std::unique_ptr<const PartialMapping>>
MapOfPartialMappings;
/// Keep dynamically allocated ValueMapping in a separate map.
/// This shouldn't be needed when everything gets TableGen'ed.
mutable DenseMap<unsigned, std::unique_ptr<const ValueMapping>>
MapOfValueMappings;
/// Keep dynamically allocated array of ValueMapping in a separate map.
/// This shouldn't be needed when everything gets TableGen'ed.
mutable DenseMap<unsigned, std::unique_ptr<ValueMapping[]>>
MapOfOperandsMappings;
/// Keep dynamically allocated InstructionMapping in a separate map.
/// This shouldn't be needed when everything gets TableGen'ed.
mutable DenseMap<unsigned, std::unique_ptr<const InstructionMapping>>
MapOfInstructionMappings;
/// Getting the minimal register class of a physreg is expensive.
/// Cache this information as we get it.
mutable DenseMap<unsigned, const TargetRegisterClass *> PhysRegMinimalRCs;
/// Create a RegisterBankInfo that can accommodate up to \p NumRegBanks
/// RegisterBank instances.
RegisterBankInfo(RegisterBank **RegBanks, unsigned NumRegBanks);
/// This constructor is meaningless.
/// It just provides a default constructor that can be used at link time
/// when GlobalISel is not built.
/// That way, targets can still inherit from this class without doing
/// crazy gymnastic to avoid link time failures.
/// \note That works because the constructor is inlined.
RegisterBankInfo() {
llvm_unreachable("This constructor should not be executed");
}
/// Get the register bank identified by \p ID.
RegisterBank &getRegBank(unsigned ID) {
assert(ID < getNumRegBanks() && "Accessing an unknown register bank");
return *RegBanks[ID];
}
/// Get the MinimalPhysRegClass for Reg.
/// \pre Reg is a physical register.
const TargetRegisterClass &
getMinimalPhysRegClass(Register Reg, const TargetRegisterInfo &TRI) const;
/// Try to get the mapping of \p MI.
/// See getInstrMapping for more details on what a mapping represents.
///
/// Unlike getInstrMapping the returned InstructionMapping may be invalid
/// (isValid() == false).
/// This means that the target independent code is not smart enough
/// to get the mapping of \p MI and thus, the target has to provide the
/// information for \p MI.
///
/// This implementation is able to get the mapping of:
/// - Target specific instructions by looking at the encoding constraints.
/// - Any instruction if all the register operands have already been assigned
/// a register, a register class, or a register bank.
/// - Copies and phis if at least one of the operands has been assigned a
/// register, a register class, or a register bank.
/// In other words, this method will likely fail to find a mapping for
/// any generic opcode that has not been lowered by target specific code.
const InstructionMapping &getInstrMappingImpl(const MachineInstr &MI) const;
/// Get the uniquely generated PartialMapping for the
/// given arguments.
const PartialMapping &getPartialMapping(unsigned StartIdx, unsigned Length,
const RegisterBank &RegBank) const;
/// \name Methods to get a uniquely generated ValueMapping.
/// @{
/// The most common ValueMapping consists of a single PartialMapping.
/// Feature a method for that.
const ValueMapping &getValueMapping(unsigned StartIdx, unsigned Length,
const RegisterBank &RegBank) const;
/// Get the ValueMapping for the given arguments.
const ValueMapping &getValueMapping(const PartialMapping *BreakDown,
unsigned NumBreakDowns) const;
/// @}
/// \name Methods to get a uniquely generated array of ValueMapping.
/// @{
/// Get the uniquely generated array of ValueMapping for the
/// elements of between \p Begin and \p End.
///
/// Elements that are nullptr will be replaced by
/// invalid ValueMapping (ValueMapping::isValid == false).
///
/// \pre The pointers on ValueMapping between \p Begin and \p End
/// must uniquely identify a ValueMapping. Otherwise, there is no
/// guarantee that the return instance will be unique, i.e., another
/// OperandsMapping could have the same content.
template <typename Iterator>
const ValueMapping *getOperandsMapping(Iterator Begin, Iterator End) const;
/// Get the uniquely generated array of ValueMapping for the
/// elements of \p OpdsMapping.
///
/// Elements of \p OpdsMapping that are nullptr will be replaced by
/// invalid ValueMapping (ValueMapping::isValid == false).
const ValueMapping *getOperandsMapping(
const SmallVectorImpl<const ValueMapping *> &OpdsMapping) const;
/// Get the uniquely generated array of ValueMapping for the
/// given arguments.
///
/// Arguments that are nullptr will be replaced by invalid
/// ValueMapping (ValueMapping::isValid == false).
const ValueMapping *getOperandsMapping(
std::initializer_list<const ValueMapping *> OpdsMapping) const;
/// @}
/// \name Methods to get a uniquely generated InstructionMapping.
/// @{
private:
/// Method to get a uniquely generated InstructionMapping.
const InstructionMapping &
getInstructionMappingImpl(bool IsInvalid, unsigned ID = InvalidMappingID,
unsigned Cost = 0,
const ValueMapping *OperandsMapping = nullptr,
unsigned NumOperands = 0) const;
public:
/// Method to get a uniquely generated InstructionMapping.
const InstructionMapping &
getInstructionMapping(unsigned ID, unsigned Cost,
const ValueMapping *OperandsMapping,
unsigned NumOperands) const {
return getInstructionMappingImpl(/*IsInvalid*/ false, ID, Cost,
OperandsMapping, NumOperands);
}
/// Method to get a uniquely generated invalid InstructionMapping.
const InstructionMapping &getInvalidInstructionMapping() const {
return getInstructionMappingImpl(/*IsInvalid*/ true);
}
/// @}
/// Get the register bank for the \p OpIdx-th operand of \p MI form
/// the encoding constraints, if any.
///
/// \return A register bank that covers the register class of the
/// related encoding constraints or nullptr if \p MI did not provide
/// enough information to deduce it.
const RegisterBank *
getRegBankFromConstraints(const MachineInstr &MI, unsigned OpIdx,
const TargetInstrInfo &TII,
const MachineRegisterInfo &MRI) const;
/// Helper method to apply something that is like the default mapping.
/// Basically, that means that \p OpdMapper.getMI() is left untouched
/// aside from the reassignment of the register operand that have been
/// remapped.
///
/// The type of all the new registers that have been created by the
/// mapper are properly remapped to the type of the original registers
/// they replace. In other words, the semantic of the instruction does
/// not change, only the register banks.
///
/// If the mapping of one of the operand spans several registers, this
/// method will abort as this is not like a default mapping anymore.
///
/// \pre For OpIdx in {0..\p OpdMapper.getMI().getNumOperands())
/// the range OpdMapper.getVRegs(OpIdx) is empty or of size 1.
static void applyDefaultMapping(const OperandsMapper &OpdMapper);
/// See ::applyMapping.
virtual void applyMappingImpl(const OperandsMapper &OpdMapper) const {
llvm_unreachable("The target has to implement that part");
}
public:
virtual ~RegisterBankInfo() = default;
/// Get the register bank identified by \p ID.
const RegisterBank &getRegBank(unsigned ID) const {
return const_cast<RegisterBankInfo *>(this)->getRegBank(ID);
}
/// Get the register bank of \p Reg.
/// If Reg has not been assigned a register, a register class,
/// or a register bank, then this returns nullptr.
///
/// \pre Reg != 0 (NoRegister)
const RegisterBank *getRegBank(Register Reg, const MachineRegisterInfo &MRI,
const TargetRegisterInfo &TRI) const;
/// Get the total number of register banks.
unsigned getNumRegBanks() const { return NumRegBanks; }
/// Get a register bank that covers \p RC.
///
/// \pre \p RC is a user-defined register class (as opposed as one
/// generated by TableGen).
///
/// \note The mapping RC -> RegBank could be built while adding the
/// coverage for the register banks. However, we do not do it, because,
/// at least for now, we only need this information for register classes
/// that are used in the description of instruction. In other words,
/// there are just a handful of them and we do not want to waste space.
///
/// \todo This should be TableGen'ed.
virtual const RegisterBank &
getRegBankFromRegClass(const TargetRegisterClass &RC, LLT Ty) const {
llvm_unreachable("The target must override this method");
}
/// Get the cost of a copy from \p B to \p A, or put differently,
/// get the cost of A = COPY B. Since register banks may cover
/// different size, \p Size specifies what will be the size in bits
/// that will be copied around.
///
/// \note Since this is a copy, both registers have the same size.
virtual unsigned copyCost(const RegisterBank &A, const RegisterBank &B,
unsigned Size) const {
// Optimistically assume that copies are coalesced. I.e., when
// they are on the same bank, they are free.
// Otherwise assume a non-zero cost of 1. The targets are supposed
// to override that properly anyway if they care.
return &A != &B;
}
/// \returns true if emitting a copy from \p Src to \p Dst is impossible.
bool cannotCopy(const RegisterBank &Dst, const RegisterBank &Src,
unsigned Size) const {
return copyCost(Dst, Src, Size) == std::numeric_limits<unsigned>::max();
}
/// Get the cost of using \p ValMapping to decompose a register. This is
/// similar to ::copyCost, except for cases where multiple copy-like
/// operations need to be inserted. If the register is used as a source
/// operand and already has a bank assigned, \p CurBank is non-null.
virtual unsigned getBreakDownCost(const ValueMapping &ValMapping,
const RegisterBank *CurBank = nullptr) const {
return std::numeric_limits<unsigned>::max();
}
/// Constrain the (possibly generic) virtual register \p Reg to \p RC.
///
/// \pre \p Reg is a virtual register that either has a bank or a class.
/// \returns The constrained register class, or nullptr if there is none.
/// \note This is a generic variant of MachineRegisterInfo::constrainRegClass
/// \note Use MachineRegisterInfo::constrainRegAttrs instead for any non-isel
/// purpose, including non-select passes of GlobalISel
static const TargetRegisterClass *
constrainGenericRegister(Register Reg, const TargetRegisterClass &RC,
MachineRegisterInfo &MRI);
/// Identifier used when the related instruction mapping instance
/// is generated by target independent code.
/// Make sure not to use that identifier to avoid possible collision.
static const unsigned DefaultMappingID;
/// Identifier used when the related instruction mapping instance
/// is generated by the default constructor.
/// Make sure not to use that identifier.
static const unsigned InvalidMappingID;
/// Get the mapping of the different operands of \p MI
/// on the register bank.
/// This mapping should be the direct translation of \p MI.
/// In other words, when \p MI is mapped with the returned mapping,
/// only the register banks of the operands of \p MI need to be updated.
/// In particular, neither the opcode nor the type of \p MI needs to be
/// updated for this direct mapping.
///
/// The target independent implementation gives a mapping based on
/// the register classes for the target specific opcode.
/// It uses the ID RegisterBankInfo::DefaultMappingID for that mapping.
/// Make sure you do not use that ID for the alternative mapping
/// for MI. See getInstrAlternativeMappings for the alternative
/// mappings.
///
/// For instance, if \p MI is a vector add, the mapping should
/// not be a scalarization of the add.
///
/// \post returnedVal.verify(MI).
///
/// \note If returnedVal does not verify MI, this would probably mean
/// that the target does not support that instruction.
virtual const InstructionMapping &
getInstrMapping(const MachineInstr &MI) const;
/// Get the alternative mappings for \p MI.
/// Alternative in the sense different from getInstrMapping.
virtual InstructionMappings
getInstrAlternativeMappings(const MachineInstr &MI) const;
/// Get the possible mapping for \p MI.
/// A mapping defines where the different operands may live and at what cost.
/// For instance, let us consider:
/// v0(16) = G_ADD <2 x i8> v1, v2
/// The possible mapping could be:
///
/// {/*ID*/VectorAdd, /*Cost*/1, /*v0*/{(0xFFFF, VPR)}, /*v1*/{(0xFFFF, VPR)},
/// /*v2*/{(0xFFFF, VPR)}}
/// {/*ID*/ScalarAddx2, /*Cost*/2, /*v0*/{(0x00FF, GPR),(0xFF00, GPR)},
/// /*v1*/{(0x00FF, GPR),(0xFF00, GPR)},
/// /*v2*/{(0x00FF, GPR),(0xFF00, GPR)}}
///
/// \note The first alternative of the returned mapping should be the
/// direct translation of \p MI current form.
///
/// \post !returnedVal.empty().
InstructionMappings getInstrPossibleMappings(const MachineInstr &MI) const;
/// Apply \p OpdMapper.getInstrMapping() to \p OpdMapper.getMI().
/// After this call \p OpdMapper.getMI() may not be valid anymore.
/// \p OpdMapper.getInstrMapping().getID() carries the information of
/// what has been chosen to map \p OpdMapper.getMI(). This ID is set
/// by the various getInstrXXXMapping method.
///
/// Therefore, getting the mapping and applying it should be kept in
/// sync.
void applyMapping(const OperandsMapper &OpdMapper) const {
// The only mapping we know how to handle is the default mapping.
if (OpdMapper.getInstrMapping().getID() == DefaultMappingID)
return applyDefaultMapping(OpdMapper);
// For other mapping, the target needs to do the right thing.
// If that means calling applyDefaultMapping, fine, but this
// must be explicitly stated.
applyMappingImpl(OpdMapper);
}
/// Get the size in bits of \p Reg.
/// Utility method to get the size of any registers. Unlike
/// MachineRegisterInfo::getSize, the register does not need to be a
/// virtual register.
///
/// \pre \p Reg != 0 (NoRegister).
unsigned getSizeInBits(Register Reg, const MachineRegisterInfo &MRI,
const TargetRegisterInfo &TRI) const;
/// Check that information hold by this instance make sense for the
/// given \p TRI.
///
/// \note This method does not check anything when assertions are disabled.
///
/// \return True is the check was successful.
bool verify(const TargetRegisterInfo &TRI) const;
};
inline raw_ostream &
operator<<(raw_ostream &OS,
const RegisterBankInfo::PartialMapping &PartMapping) {
PartMapping.print(OS);
return OS;
}
inline raw_ostream &
operator<<(raw_ostream &OS, const RegisterBankInfo::ValueMapping &ValMapping) {
ValMapping.print(OS);
return OS;
}
inline raw_ostream &
operator<<(raw_ostream &OS,
const RegisterBankInfo::InstructionMapping &InstrMapping) {
InstrMapping.print(OS);
return OS;
}
inline raw_ostream &
operator<<(raw_ostream &OS, const RegisterBankInfo::OperandsMapper &OpdMapper) {
OpdMapper.print(OS, /*ForDebug*/ false);
return OS;
}
/// Hashing function for PartialMapping.
/// It is required for the hashing of ValueMapping.
hash_code hash_value(const RegisterBankInfo::PartialMapping &PartMapping);
} // end namespace llvm
#endif // LLVM_CODEGEN_GLOBALISEL_REGISTERBANKINFO_H
PK iwFZ�>��U �U ) CodeGen/GlobalISel/GIMatchTableExecutor.hnu �[��� //===- llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file This file declares the GIMatchTableExecutor API, the opcodes supported
/// by the match table, and some associated data structures used by the
/// executor's implementation (see `GIMatchTableExecutorImpl.h`).
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_GIMATCHTABLEEXECUTOR_H
#define LLVM_CODEGEN_GLOBALISEL_GIMATCHTABLEEXECUTOR_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/GlobalISel/Utils.h"
#include "llvm/CodeGen/LowLevelType.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/IR/Function.h"
#include <bitset>
#include <cstddef>
#include <cstdint>
#include <functional>
#include <initializer_list>
#include <optional>
#include <vector>
namespace llvm {
class BlockFrequencyInfo;
class CodeGenCoverage;
class MachineBasicBlock;
class ProfileSummaryInfo;
class APInt;
class APFloat;
class GISelKnownBits;
class MachineInstr;
class MachineInstrBuilder;
class MachineFunction;
class MachineOperand;
class MachineRegisterInfo;
class RegisterBankInfo;
class TargetInstrInfo;
class TargetRegisterInfo;
/// Container class for CodeGen predicate results.
/// This is convenient because std::bitset does not have a constructor
/// with an initializer list of set bits.
///
/// Each GIMatchTableExecutor subclass should define a PredicateBitset class
/// with:
/// const unsigned MAX_SUBTARGET_PREDICATES = 192;
/// using PredicateBitset = PredicateBitsetImpl<MAX_SUBTARGET_PREDICATES>;
/// and updating the constant to suit the target. Tablegen provides a suitable
/// definition for the predicates in use in <Target>GenGlobalISel.inc when
/// GET_GLOBALISEL_PREDICATE_BITSET is defined.
template <std::size_t MaxPredicates>
class PredicateBitsetImpl : public std::bitset<MaxPredicates> {
public:
// Cannot inherit constructors because it's not supported by VC++..
PredicateBitsetImpl() = default;
PredicateBitsetImpl(const std::bitset<MaxPredicates> &B)
: std::bitset<MaxPredicates>(B) {}
PredicateBitsetImpl(std::initializer_list<unsigned> Init) {
for (auto I : Init)
std::bitset<MaxPredicates>::set(I);
}
};
enum {
GICXXPred_Invalid = 0,
GICXXCustomAction_Invalid = 0,
};
enum {
/// Begin a try-block to attempt a match and jump to OnFail if it is
/// unsuccessful.
/// - OnFail - The MatchTable entry at which to resume if the match fails.
///
/// FIXME: This ought to take an argument indicating the number of try-blocks
/// to exit on failure. It's usually one but the last match attempt of
/// a block will need more. The (implemented) alternative is to tack a
/// GIM_Reject on the end of each try-block which is simpler but
/// requires an extra opcode and iteration in the interpreter on each
/// failed match.
GIM_Try,
/// Switch over the opcode on the specified instruction
/// - InsnID - Instruction ID
/// - LowerBound - numerically minimum opcode supported
/// - UpperBound - numerically maximum + 1 opcode supported
/// - Default - failure jump target
/// - JumpTable... - (UpperBound - LowerBound) (at least 2) jump targets
GIM_SwitchOpcode,
/// Switch over the LLT on the specified instruction operand
/// - InsnID - Instruction ID
/// - OpIdx - Operand index
/// - LowerBound - numerically minimum Type ID supported
/// - UpperBound - numerically maximum + 1 Type ID supported
/// - Default - failure jump target
/// - JumpTable... - (UpperBound - LowerBound) (at least 2) jump targets
GIM_SwitchType,
/// Record the specified instruction.
/// The IgnoreCopies variant ignores COPY instructions.
/// - NewInsnID - Instruction ID to define
/// - InsnID - Instruction ID
/// - OpIdx - Operand index
GIM_RecordInsn,
GIM_RecordInsnIgnoreCopies,
/// Check the feature bits
/// - Expected features
GIM_CheckFeatures,
/// Check the opcode on the specified instruction
/// - InsnID - Instruction ID
/// - Expected opcode
GIM_CheckOpcode,
/// Check the opcode on the specified instruction, checking 2 acceptable
/// alternatives.
/// - InsnID - Instruction ID
/// - Expected opcode
/// - Alternative expected opcode
GIM_CheckOpcodeIsEither,
/// Check the instruction has the right number of operands
/// - InsnID - Instruction ID
/// - Expected number of operands
GIM_CheckNumOperands,
/// Check an immediate predicate on the specified instruction
/// - InsnID - Instruction ID
/// - The predicate to test
GIM_CheckI64ImmPredicate,
/// Check an immediate predicate on the specified instruction via an APInt.
/// - InsnID - Instruction ID
/// - The predicate to test
GIM_CheckAPIntImmPredicate,
/// Check a floating point immediate predicate on the specified instruction.
/// - InsnID - Instruction ID
/// - The predicate to test
GIM_CheckAPFloatImmPredicate,
/// Check an immediate predicate on the specified instruction
/// - InsnID - Instruction ID
/// - OpIdx - Operand index
/// - The predicate to test
GIM_CheckImmOperandPredicate,
/// Check a memory operation has the specified atomic ordering.
/// - InsnID - Instruction ID
/// - Ordering - The AtomicOrdering value
GIM_CheckAtomicOrdering,
GIM_CheckAtomicOrderingOrStrongerThan,
GIM_CheckAtomicOrderingWeakerThan,
/// Check the size of the memory access for the given machine memory operand.
/// - InsnID - Instruction ID
/// - MMOIdx - MMO index
/// - Size - The size in bytes of the memory access
GIM_CheckMemorySizeEqualTo,
/// Check the address space of the memory access for the given machine memory
/// operand.
/// - InsnID - Instruction ID
/// - MMOIdx - MMO index
/// - NumAddrSpace - Number of valid address spaces
/// - AddrSpaceN - An allowed space of the memory access
/// - AddrSpaceN+1 ...
GIM_CheckMemoryAddressSpace,
/// Check the minimum alignment of the memory access for the given machine
/// memory operand.
/// - InsnID - Instruction ID
/// - MMOIdx - MMO index
/// - MinAlign - Minimum acceptable alignment
GIM_CheckMemoryAlignment,
/// Check the size of the memory access for the given machine memory operand
/// against the size of an operand.
/// - InsnID - Instruction ID
/// - MMOIdx - MMO index
/// - OpIdx - The operand index to compare the MMO against
GIM_CheckMemorySizeEqualToLLT,
GIM_CheckMemorySizeLessThanLLT,
GIM_CheckMemorySizeGreaterThanLLT,
/// Check if this is a vector that can be treated as a vector splat
/// constant. This is valid for both G_BUILD_VECTOR as well as
/// G_BUILD_VECTOR_TRUNC. For AllOnes refers to individual bits, so a -1
/// element.
/// - InsnID - Instruction ID
GIM_CheckIsBuildVectorAllOnes,
GIM_CheckIsBuildVectorAllZeros,
/// Check a trivial predicate which takes no arguments.
/// This can be used by executors to implement custom flags that don't fit in
/// target features.
GIM_CheckSimplePredicate,
/// Check a generic C++ instruction predicate
/// - InsnID - Instruction ID
/// - PredicateID - The ID of the predicate function to call
GIM_CheckCxxInsnPredicate,
/// Check if there's no use of the first result.
/// - InsnID - Instruction ID
GIM_CheckHasNoUse,
/// Check the type for the specified operand
/// - InsnID - Instruction ID
/// - OpIdx - Operand index
/// - Expected type
GIM_CheckType,
/// Check the type of a pointer to any address space.
/// - InsnID - Instruction ID
/// - OpIdx - Operand index
/// - SizeInBits - The size of the pointer value in bits.
GIM_CheckPointerToAny,
/// Check the register bank for the specified operand
/// - InsnID - Instruction ID
/// - OpIdx - Operand index
/// - Expected register bank (specified as a register class)
GIM_CheckRegBankForClass,
/// Check the operand matches a complex predicate
/// - InsnID - Instruction ID
/// - OpIdx - Operand index
/// - RendererID - The renderer to hold the result
/// - Complex predicate ID
GIM_CheckComplexPattern,
/// Check the operand is a specific integer
/// - InsnID - Instruction ID
/// - OpIdx - Operand index
/// - Expected integer
GIM_CheckConstantInt,
/// Check the operand is a specific literal integer (i.e. MO.isImm() or
/// MO.isCImm() is true).
/// - InsnID - Instruction ID
/// - OpIdx - Operand index
/// - Expected integer
GIM_CheckLiteralInt,
/// Check the operand is a specific intrinsic ID
/// - InsnID - Instruction ID
/// - OpIdx - Operand index
/// - Expected Intrinsic ID
GIM_CheckIntrinsicID,
/// Check the operand is a specific predicate
/// - InsnID - Instruction ID
/// - OpIdx - Operand index
/// - Expected predicate
GIM_CheckCmpPredicate,
/// Check the specified operand is an MBB
/// - InsnID - Instruction ID
/// - OpIdx - Operand index
GIM_CheckIsMBB,
/// Check the specified operand is an Imm
/// - InsnID - Instruction ID
/// - OpIdx - Operand index
GIM_CheckIsImm,
/// Check if the specified operand is safe to fold into the current
/// instruction.
/// - InsnID - Instruction ID
GIM_CheckIsSafeToFold,
/// Check the specified operands are identical.
/// The IgnoreCopies variant looks through COPY instructions before
/// comparing the operands.
/// - InsnID - Instruction ID
/// - OpIdx - Operand index
/// - OtherInsnID - Other instruction ID
/// - OtherOpIdx - Other operand index
GIM_CheckIsSameOperand,
GIM_CheckIsSameOperandIgnoreCopies,
/// Predicates with 'let PredicateCodeUsesOperands = 1' need to examine some
/// named operands that will be recorded in RecordedOperands. Names of these
/// operands are referenced in predicate argument list. Emitter determines
/// StoreIdx(corresponds to the order in which names appear in argument list).
/// - InsnID - Instruction ID
/// - OpIdx - Operand index
/// - StoreIdx - Store location in RecordedOperands.
GIM_RecordNamedOperand,
/// Fail the current try-block, or completely fail to match if there is no
/// current try-block.
GIM_Reject,
//=== Renderers ===
/// Mutate an instruction
/// - NewInsnID - Instruction ID to define
/// - OldInsnID - Instruction ID to mutate
/// - NewOpcode - The new opcode to use
GIR_MutateOpcode,
/// Build a new instruction
/// - InsnID - Instruction ID to define
/// - Opcode - The new opcode to use
GIR_BuildMI,
/// Copy an operand to the specified instruction
/// - NewInsnID - Instruction ID to modify
/// - OldInsnID - Instruction ID to copy from
/// - OpIdx - The operand to copy
GIR_Copy,
/// Copy an operand to the specified instruction or add a zero register if the
/// operand is a zero immediate.
/// - NewInsnID - Instruction ID to modify
/// - OldInsnID - Instruction ID to copy from
/// - OpIdx - The operand to copy
/// - ZeroReg - The zero register to use
GIR_CopyOrAddZeroReg,
/// Copy an operand to the specified instruction
/// - NewInsnID - Instruction ID to modify
/// - OldInsnID - Instruction ID to copy from
/// - OpIdx - The operand to copy
/// - SubRegIdx - The subregister to copy
GIR_CopySubReg,
/// Add an implicit register def to the specified instruction
/// - InsnID - Instruction ID to modify
/// - RegNum - The register to add
GIR_AddImplicitDef,
/// Add an implicit register use to the specified instruction
/// - InsnID - Instruction ID to modify
/// - RegNum - The register to add
GIR_AddImplicitUse,
/// Add an register to the specified instruction
/// - InsnID - Instruction ID to modify
/// - RegNum - The register to add
GIR_AddRegister,
/// Add a temporary register to the specified instruction
/// - InsnID - Instruction ID to modify
/// - TempRegID - The temporary register ID to add
/// - TempRegFlags - The register flags to set
GIR_AddTempRegister,
/// Add a temporary register to the specified instruction
/// - InsnID - Instruction ID to modify
/// - TempRegID - The temporary register ID to add
/// - TempRegFlags - The register flags to set
/// - SubRegIndex - The subregister index to set
GIR_AddTempSubRegister,
/// Add an immediate to the specified instruction
/// - InsnID - Instruction ID to modify
/// - Imm - The immediate to add
GIR_AddImm,
/// Render complex operands to the specified instruction
/// - InsnID - Instruction ID to modify
/// - RendererID - The renderer to call
GIR_ComplexRenderer,
/// Render sub-operands of complex operands to the specified instruction
/// - InsnID - Instruction ID to modify
/// - RendererID - The renderer to call
/// - RenderOpID - The suboperand to render.
GIR_ComplexSubOperandRenderer,
/// Render subregisters of suboperands of complex operands to the
/// specified instruction
/// - InsnID - Instruction ID to modify
/// - RendererID - The renderer to call
/// - RenderOpID - The suboperand to render
/// - SubRegIdx - The subregister to extract
GIR_ComplexSubOperandSubRegRenderer,
/// Render operands to the specified instruction using a custom function
/// - InsnID - Instruction ID to modify
/// - OldInsnID - Instruction ID to get the matched operand from
/// - RendererFnID - Custom renderer function to call
GIR_CustomRenderer,
/// Calls a C++ function to perform an action when a match is complete.
/// The MatcherState is passed to the function to allow it to modify
/// instructions.
/// This is less constrained than a custom renderer and can update instructions
/// in the state.
/// - FnID - The function to call.
/// TODO: Remove this at some point when combiners aren't reliant on it. It's
/// a bit of a hack.
GIR_CustomAction,
/// Render operands to the specified instruction using a custom function,
/// reading from a specific operand.
/// - InsnID - Instruction ID to modify
/// - OldInsnID - Instruction ID to get the matched operand from
/// - OpIdx - Operand index in OldInsnID the render function should read
/// from..
/// - RendererFnID - Custom renderer function to call
GIR_CustomOperandRenderer,
/// Render a G_CONSTANT operator as a sign-extended immediate.
/// - NewInsnID - Instruction ID to modify
/// - OldInsnID - Instruction ID to copy from
/// The operand index is implicitly 1.
GIR_CopyConstantAsSImm,
/// Render a G_FCONSTANT operator as a sign-extended immediate.
/// - NewInsnID - Instruction ID to modify
/// - OldInsnID - Instruction ID to copy from
/// The operand index is implicitly 1.
GIR_CopyFConstantAsFPImm,
/// Constrain an instruction operand to a register class.
/// - InsnID - Instruction ID to modify
/// - OpIdx - Operand index
/// - RCEnum - Register class enumeration value
GIR_ConstrainOperandRC,
/// Constrain an instructions operands according to the instruction
/// description.
/// - InsnID - Instruction ID to modify
GIR_ConstrainSelectedInstOperands,
/// Merge all memory operands into instruction.
/// - InsnID - Instruction ID to modify
/// - MergeInsnID... - One or more Instruction ID to merge into the result.
/// - GIU_MergeMemOperands_EndOfList - Terminates the list of instructions to
/// merge.
GIR_MergeMemOperands,
/// Erase from parent.
/// - InsnID - Instruction ID to erase
GIR_EraseFromParent,
/// Create a new temporary register that's not constrained.
/// - TempRegID - The temporary register ID to initialize.
/// - Expected type
GIR_MakeTempReg,
/// A successful emission
GIR_Done,
/// Increment the rule coverage counter.
/// - RuleID - The ID of the rule that was covered.
GIR_Coverage,
/// Keeping track of the number of the GI opcodes. Must be the last entry.
GIU_NumOpcodes,
};
enum {
/// Indicates the end of the variable-length MergeInsnID list in a
/// GIR_MergeMemOperands opcode.
GIU_MergeMemOperands_EndOfList = -1,
};
/// Provides the logic to execute GlobalISel match tables, which are used by the
/// instruction selector and instruction combiners as their engine to match and
/// apply MIR patterns.
class GIMatchTableExecutor {
public:
virtual ~GIMatchTableExecutor() = default;
CodeGenCoverage *CoverageInfo = nullptr;
GISelKnownBits *KB = nullptr;
MachineFunction *MF = nullptr;
ProfileSummaryInfo *PSI = nullptr;
BlockFrequencyInfo *BFI = nullptr;
// For some predicates, we need to track the current MBB.
MachineBasicBlock *CurMBB = nullptr;
virtual void setupGeneratedPerFunctionState(MachineFunction &MF) {
llvm_unreachable("TableGen should have emitted implementation");
}
/// Setup per-MF executor state.
virtual void setupMF(MachineFunction &mf, GISelKnownBits *kb,
CodeGenCoverage *covinfo = nullptr,
ProfileSummaryInfo *psi = nullptr,
BlockFrequencyInfo *bfi = nullptr) {
CoverageInfo = covinfo;
KB = kb;
MF = &mf;
PSI = psi;
BFI = bfi;
CurMBB = nullptr;
setupGeneratedPerFunctionState(mf);
}
protected:
using ComplexRendererFns =
std::optional<SmallVector<std::function<void(MachineInstrBuilder &)>, 4>>;
using RecordedMIVector = SmallVector<MachineInstr *, 4>;
using NewMIVector = SmallVector<MachineInstrBuilder, 4>;
struct MatcherState {
std::vector<ComplexRendererFns::value_type> Renderers;
RecordedMIVector MIs;
DenseMap<unsigned, unsigned> TempRegisters;
/// Named operands that predicate with 'let PredicateCodeUsesOperands = 1'
/// referenced in its argument list. Operands are inserted at index set by
/// emitter, it corresponds to the order in which names appear in argument
/// list. Currently such predicates don't have more then 3 arguments.
std::array<const MachineOperand *, 3> RecordedOperands;
MatcherState(unsigned MaxRenderers);
};
bool shouldOptForSize(const MachineFunction *MF) const {
const auto &F = MF->getFunction();
return F.hasOptSize() || F.hasMinSize() ||
(PSI && BFI && CurMBB && llvm::shouldOptForSize(*CurMBB, PSI, BFI));
}
public:
template <class PredicateBitset, class ComplexMatcherMemFn,
class CustomRendererFn>
struct ExecInfoTy {
ExecInfoTy(const LLT *TypeObjects, size_t NumTypeObjects,
const PredicateBitset *FeatureBitsets,
const ComplexMatcherMemFn *ComplexPredicates,
const CustomRendererFn *CustomRenderers)
: TypeObjects(TypeObjects), FeatureBitsets(FeatureBitsets),
ComplexPredicates(ComplexPredicates),
CustomRenderers(CustomRenderers) {
for (size_t I = 0; I < NumTypeObjects; ++I)
TypeIDMap[TypeObjects[I]] = I;
}
const LLT *TypeObjects;
const PredicateBitset *FeatureBitsets;
const ComplexMatcherMemFn *ComplexPredicates;
const CustomRendererFn *CustomRenderers;
SmallDenseMap<LLT, unsigned, 64> TypeIDMap;
};
protected:
GIMatchTableExecutor();
/// Execute a given matcher table and return true if the match was successful
/// and false otherwise.
template <class TgtExecutor, class PredicateBitset, class ComplexMatcherMemFn,
class CustomRendererFn>
bool executeMatchTable(
TgtExecutor &Exec, NewMIVector &OutMIs, MatcherState &State,
const ExecInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn>
&ISelInfo,
const int64_t *MatchTable, const TargetInstrInfo &TII,
MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI,
const RegisterBankInfo &RBI, const PredicateBitset &AvailableFeatures,
CodeGenCoverage *CoverageInfo) const;
virtual const int64_t *getMatchTable() const {
llvm_unreachable("Should have been overridden by tablegen if used");
}
virtual bool testImmPredicate_I64(unsigned, int64_t) const {
llvm_unreachable(
"Subclasses must override this with a tablegen-erated function");
}
virtual bool testImmPredicate_APInt(unsigned, const APInt &) const {
llvm_unreachable(
"Subclasses must override this with a tablegen-erated function");
}
virtual bool testImmPredicate_APFloat(unsigned, const APFloat &) const {
llvm_unreachable(
"Subclasses must override this with a tablegen-erated function");
}
virtual bool testMIPredicate_MI(unsigned, const MachineInstr &,
const MatcherState &State) const {
llvm_unreachable(
"Subclasses must override this with a tablegen-erated function");
}
virtual bool testSimplePredicate(unsigned) const {
llvm_unreachable("Subclass does not implement testSimplePredicate!");
}
virtual void runCustomAction(unsigned, const MatcherState &State) const {
llvm_unreachable("Subclass does not implement runCustomAction!");
}
bool isOperandImmEqual(const MachineOperand &MO, int64_t Value,
const MachineRegisterInfo &MRI) const;
/// Return true if the specified operand is a G_PTR_ADD with a G_CONSTANT on
/// the right-hand side. GlobalISel's separation of pointer and integer types
/// means that we don't need to worry about G_OR with equivalent semantics.
bool isBaseWithConstantOffset(const MachineOperand &Root,
const MachineRegisterInfo &MRI) const;
/// Return true if MI can obviously be folded into IntoMI.
/// MI and IntoMI do not need to be in the same basic blocks, but MI must
/// preceed IntoMI.
bool isObviouslySafeToFold(MachineInstr &MI, MachineInstr &IntoMI) const;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_GLOBALISEL_GIMATCHTABLEEXECUTOR_H
PK iwFZ�̃�[d [d ! CodeGen/GlobalISel/CallLowering.hnu �[��� //===- llvm/CodeGen/GlobalISel/CallLowering.h - Call lowering ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file describes how to lower LLVM calls to machine code calls.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H
#define LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/LowLevelType.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineValueType.h"
#include "llvm/CodeGen/TargetCallingConv.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/IR/Type.h"
#include "llvm/IR/Value.h"
#include "llvm/Support/ErrorHandling.h"
#include <cstdint>
#include <functional>
namespace llvm {
class AttributeList;
class CallBase;
class DataLayout;
class Function;
class FunctionLoweringInfo;
class MachineIRBuilder;
class MachineFunction;
struct MachinePointerInfo;
class MachineRegisterInfo;
class TargetLowering;
class CallLowering {
const TargetLowering *TLI;
virtual void anchor();
public:
struct BaseArgInfo {
Type *Ty;
SmallVector<ISD::ArgFlagsTy, 4> Flags;
bool IsFixed;
BaseArgInfo(Type *Ty,
ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(),
bool IsFixed = true)
: Ty(Ty), Flags(Flags.begin(), Flags.end()), IsFixed(IsFixed) {}
BaseArgInfo() : Ty(nullptr), IsFixed(false) {}
};
struct ArgInfo : public BaseArgInfo {
SmallVector<Register, 4> Regs;
// If the argument had to be split into multiple parts according to the
// target calling convention, then this contains the original vregs
// if the argument was an incoming arg.
SmallVector<Register, 2> OrigRegs;
/// Optionally track the original IR value for the argument. This may not be
/// meaningful in all contexts. This should only be used on for forwarding
/// through to use for aliasing information in MachinePointerInfo for memory
/// arguments.
const Value *OrigValue = nullptr;
/// Index original Function's argument.
unsigned OrigArgIndex;
/// Sentinel value for implicit machine-level input arguments.
static const unsigned NoArgIndex = UINT_MAX;
ArgInfo(ArrayRef<Register> Regs, Type *Ty, unsigned OrigIndex,
ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(),
bool IsFixed = true, const Value *OrigValue = nullptr)
: BaseArgInfo(Ty, Flags, IsFixed), Regs(Regs.begin(), Regs.end()),
OrigValue(OrigValue), OrigArgIndex(OrigIndex) {
if (!Regs.empty() && Flags.empty())
this->Flags.push_back(ISD::ArgFlagsTy());
// FIXME: We should have just one way of saying "no register".
assert(((Ty->isVoidTy() || Ty->isEmptyTy()) ==
(Regs.empty() || Regs[0] == 0)) &&
"only void types should have no register");
}
ArgInfo(ArrayRef<Register> Regs, const Value &OrigValue, unsigned OrigIndex,
ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(),
bool IsFixed = true)
: ArgInfo(Regs, OrigValue.getType(), OrigIndex, Flags, IsFixed, &OrigValue) {}
ArgInfo() = default;
};
struct CallLoweringInfo {
/// Calling convention to be used for the call.
CallingConv::ID CallConv = CallingConv::C;
/// Destination of the call. It should be either a register, globaladdress,
/// or externalsymbol.
MachineOperand Callee = MachineOperand::CreateImm(0);
/// Descriptor for the return type of the function.
ArgInfo OrigRet;
/// List of descriptors of the arguments passed to the function.
SmallVector<ArgInfo, 32> OrigArgs;
/// Valid if the call has a swifterror inout parameter, and contains the
/// vreg that the swifterror should be copied into after the call.
Register SwiftErrorVReg;
/// Original IR callsite corresponding to this call, if available.
const CallBase *CB = nullptr;
MDNode *KnownCallees = nullptr;
/// True if the call must be tail call optimized.
bool IsMustTailCall = false;
/// True if the call passes all target-independent checks for tail call
/// optimization.
bool IsTailCall = false;
/// True if the call was lowered as a tail call. This is consumed by the
/// legalizer. This allows the legalizer to lower libcalls as tail calls.
bool LoweredTailCall = false;
/// True if the call is to a vararg function.
bool IsVarArg = false;
/// True if the function's return value can be lowered to registers.
bool CanLowerReturn = true;
/// VReg to hold the hidden sret parameter.
Register DemoteRegister;
/// The stack index for sret demotion.
int DemoteStackIndex;
/// Expected type identifier for indirect calls with a CFI check.
const ConstantInt *CFIType = nullptr;
};
/// Argument handling is mostly uniform between the four places that
/// make these decisions: function formal arguments, call
/// instruction args, call instruction returns and function
/// returns. However, once a decision has been made on where an
/// argument should go, exactly what happens can vary slightly. This
/// class abstracts the differences.
///
/// ValueAssigner should not depend on any specific function state, and
/// only determine the types and locations for arguments.
struct ValueAssigner {
ValueAssigner(bool IsIncoming, CCAssignFn *AssignFn_,
CCAssignFn *AssignFnVarArg_ = nullptr)
: AssignFn(AssignFn_), AssignFnVarArg(AssignFnVarArg_),
IsIncomingArgumentHandler(IsIncoming) {
// Some targets change the handler depending on whether the call is
// varargs or not. If
if (!AssignFnVarArg)
AssignFnVarArg = AssignFn;
}
virtual ~ValueAssigner() = default;
/// Returns true if the handler is dealing with incoming arguments,
/// i.e. those that move values from some physical location to vregs.
bool isIncomingArgumentHandler() const {
return IsIncomingArgumentHandler;
}
/// Wrap call to (typically tablegenerated CCAssignFn). This may be
/// overridden to track additional state information as arguments are
/// assigned or apply target specific hacks around the legacy
/// infrastructure.
virtual bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT,
CCValAssign::LocInfo LocInfo, const ArgInfo &Info,
ISD::ArgFlagsTy Flags, CCState &State) {
if (getAssignFn(State.isVarArg())(ValNo, ValVT, LocVT, LocInfo, Flags,
State))
return true;
StackSize = State.getStackSize();
return false;
}
/// Assignment function to use for a general call.
CCAssignFn *AssignFn;
/// Assignment function to use for a variadic call. This is usually the same
/// as AssignFn on most targets.
CCAssignFn *AssignFnVarArg;
/// The size of the currently allocated portion of the stack.
uint64_t StackSize = 0;
/// Select the appropriate assignment function depending on whether this is
/// a variadic call.
CCAssignFn *getAssignFn(bool IsVarArg) const {
return IsVarArg ? AssignFnVarArg : AssignFn;
}
private:
const bool IsIncomingArgumentHandler;
virtual void anchor();
};
struct IncomingValueAssigner : public ValueAssigner {
IncomingValueAssigner(CCAssignFn *AssignFn_,
CCAssignFn *AssignFnVarArg_ = nullptr)
: ValueAssigner(true, AssignFn_, AssignFnVarArg_) {}
};
struct OutgoingValueAssigner : public ValueAssigner {
OutgoingValueAssigner(CCAssignFn *AssignFn_,
CCAssignFn *AssignFnVarArg_ = nullptr)
: ValueAssigner(false, AssignFn_, AssignFnVarArg_) {}
};
struct ValueHandler {
MachineIRBuilder &MIRBuilder;
MachineRegisterInfo &MRI;
const bool IsIncomingArgumentHandler;
ValueHandler(bool IsIncoming, MachineIRBuilder &MIRBuilder,
MachineRegisterInfo &MRI)
: MIRBuilder(MIRBuilder), MRI(MRI),
IsIncomingArgumentHandler(IsIncoming) {}
virtual ~ValueHandler() = default;
/// Returns true if the handler is dealing with incoming arguments,
/// i.e. those that move values from some physical location to vregs.
bool isIncomingArgumentHandler() const {
return IsIncomingArgumentHandler;
}
/// Materialize a VReg containing the address of the specified
/// stack-based object. This is either based on a FrameIndex or
/// direct SP manipulation, depending on the context. \p MPO
/// should be initialized to an appropriate description of the
/// address created.
virtual Register getStackAddress(uint64_t MemSize, int64_t Offset,
MachinePointerInfo &MPO,
ISD::ArgFlagsTy Flags) = 0;
/// Return the in-memory size to write for the argument at \p VA. This may
/// be smaller than the allocated stack slot size.
///
/// This is overridable primarily for targets to maintain compatibility with
/// hacks around the existing DAG call lowering infrastructure.
virtual LLT getStackValueStoreType(const DataLayout &DL,
const CCValAssign &VA,
ISD::ArgFlagsTy Flags) const;
/// The specified value has been assigned to a physical register,
/// handle the appropriate COPY (either to or from) and mark any
/// relevant uses/defines as needed.
virtual void assignValueToReg(Register ValVReg, Register PhysReg,
CCValAssign VA) = 0;
/// The specified value has been assigned to a stack
/// location. Load or store it there, with appropriate extension
/// if necessary.
virtual void assignValueToAddress(Register ValVReg, Register Addr,
LLT MemTy, MachinePointerInfo &MPO,
CCValAssign &VA) = 0;
/// An overload which takes an ArgInfo if additional information about the
/// arg is needed. \p ValRegIndex is the index in \p Arg.Regs for the value
/// to store.
virtual void assignValueToAddress(const ArgInfo &Arg, unsigned ValRegIndex,
Register Addr, LLT MemTy,
MachinePointerInfo &MPO,
CCValAssign &VA) {
assignValueToAddress(Arg.Regs[ValRegIndex], Addr, MemTy, MPO, VA);
}
/// Handle custom values, which may be passed into one or more of \p VAs.
/// \p If the handler wants the assignments to be delayed until after
/// mem loc assignments, then it sets \p Thunk to the thunk to do the
/// assignment.
/// \return The number of \p VAs that have been assigned after the first
/// one, and which should therefore be skipped from further
/// processing.
virtual unsigned assignCustomValue(ArgInfo &Arg, ArrayRef<CCValAssign> VAs,
std::function<void()> *Thunk = nullptr) {
// This is not a pure virtual method because not all targets need to worry
// about custom values.
llvm_unreachable("Custom values not supported");
}
/// Do a memory copy of \p MemSize bytes from \p SrcPtr to \p DstPtr. This
/// is necessary for outgoing stack-passed byval arguments.
void
copyArgumentMemory(const ArgInfo &Arg, Register DstPtr, Register SrcPtr,
const MachinePointerInfo &DstPtrInfo, Align DstAlign,
const MachinePointerInfo &SrcPtrInfo, Align SrcAlign,
uint64_t MemSize, CCValAssign &VA) const;
/// Extend a register to the location type given in VA, capped at extending
/// to at most MaxSize bits. If MaxSizeBits is 0 then no maximum is set.
Register extendRegister(Register ValReg, CCValAssign &VA,
unsigned MaxSizeBits = 0);
};
/// Base class for ValueHandlers used for arguments coming into the current
/// function, or for return values received from a call.
struct IncomingValueHandler : public ValueHandler {
IncomingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI)
: ValueHandler(/*IsIncoming*/ true, MIRBuilder, MRI) {}
/// Insert G_ASSERT_ZEXT/G_ASSERT_SEXT or other hint instruction based on \p
/// VA, returning the new register if a hint was inserted.
Register buildExtensionHint(CCValAssign &VA, Register SrcReg, LLT NarrowTy);
/// Provides a default implementation for argument handling.
void assignValueToReg(Register ValVReg, Register PhysReg,
CCValAssign VA) override;
};
/// Base class for ValueHandlers used for arguments passed to a function call,
/// or for return values.
struct OutgoingValueHandler : public ValueHandler {
OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI)
: ValueHandler(/*IsIncoming*/ false, MIRBuilder, MRI) {}
};
protected:
/// Getter for generic TargetLowering class.
const TargetLowering *getTLI() const {
return TLI;
}
/// Getter for target specific TargetLowering class.
template <class XXXTargetLowering>
const XXXTargetLowering *getTLI() const {
return static_cast<const XXXTargetLowering *>(TLI);
}
/// \returns Flags corresponding to the attributes on the \p ArgIdx-th
/// parameter of \p Call.
ISD::ArgFlagsTy getAttributesForArgIdx(const CallBase &Call,
unsigned ArgIdx) const;
/// \returns Flags corresponding to the attributes on the return from \p Call.
ISD::ArgFlagsTy getAttributesForReturn(const CallBase &Call) const;
/// Adds flags to \p Flags based off of the attributes in \p Attrs.
/// \p OpIdx is the index in \p Attrs to add flags from.
void addArgFlagsFromAttributes(ISD::ArgFlagsTy &Flags,
const AttributeList &Attrs,
unsigned OpIdx) const;
template <typename FuncInfoTy>
void setArgFlags(ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL,
const FuncInfoTy &FuncInfo) const;
/// Break \p OrigArgInfo into one or more pieces the calling convention can
/// process, returned in \p SplitArgs. For example, this should break structs
/// down into individual fields.
///
/// If \p Offsets is non-null, it points to a vector to be filled in
/// with the in-memory offsets of each of the individual values.
void splitToValueTypes(const ArgInfo &OrigArgInfo,
SmallVectorImpl<ArgInfo> &SplitArgs,
const DataLayout &DL, CallingConv::ID CallConv,
SmallVectorImpl<uint64_t> *Offsets = nullptr) const;
/// Analyze the argument list in \p Args, using \p Assigner to populate \p
/// CCInfo. This will determine the types and locations to use for passed or
/// returned values. This may resize fields in \p Args if the value is split
/// across multiple registers or stack slots.
///
/// This is independent of the function state and can be used
/// to determine how a call would pass arguments without needing to change the
/// function. This can be used to check if arguments are suitable for tail
/// call lowering.
///
/// \return True if everything has succeeded, false otherwise.
bool determineAssignments(ValueAssigner &Assigner,
SmallVectorImpl<ArgInfo> &Args,
CCState &CCInfo) const;
/// Invoke ValueAssigner::assignArg on each of the given \p Args and then use
/// \p Handler to move them to the assigned locations.
///
/// \return True if everything has succeeded, false otherwise.
bool determineAndHandleAssignments(
ValueHandler &Handler, ValueAssigner &Assigner,
SmallVectorImpl<ArgInfo> &Args, MachineIRBuilder &MIRBuilder,
CallingConv::ID CallConv, bool IsVarArg,
ArrayRef<Register> ThisReturnRegs = std::nullopt) const;
/// Use \p Handler to insert code to handle the argument/return values
/// represented by \p Args. It's expected determineAssignments previously
/// processed these arguments to populate \p CCState and \p ArgLocs.
bool
handleAssignments(ValueHandler &Handler, SmallVectorImpl<ArgInfo> &Args,
CCState &CCState, SmallVectorImpl<CCValAssign> &ArgLocs,
MachineIRBuilder &MIRBuilder,
ArrayRef<Register> ThisReturnRegs = std::nullopt) const;
/// Check whether parameters to a call that are passed in callee saved
/// registers are the same as from the calling function. This needs to be
/// checked for tail call eligibility.
bool parametersInCSRMatch(const MachineRegisterInfo &MRI,
const uint32_t *CallerPreservedMask,
const SmallVectorImpl<CCValAssign> &ArgLocs,
const SmallVectorImpl<ArgInfo> &OutVals) const;
/// \returns True if the calling convention for a callee and its caller pass
/// results in the same way. Typically used for tail call eligibility checks.
///
/// \p Info is the CallLoweringInfo for the call.
/// \p MF is the MachineFunction for the caller.
/// \p InArgs contains the results of the call.
/// \p CalleeAssigner specifies the target's handling of the argument types
/// for the callee.
/// \p CallerAssigner specifies the target's handling of the
/// argument types for the caller.
bool resultsCompatible(CallLoweringInfo &Info, MachineFunction &MF,
SmallVectorImpl<ArgInfo> &InArgs,
ValueAssigner &CalleeAssigner,
ValueAssigner &CallerAssigner) const;
public:
CallLowering(const TargetLowering *TLI) : TLI(TLI) {}
virtual ~CallLowering() = default;
/// \return true if the target is capable of handling swifterror values that
/// have been promoted to a specified register. The extended versions of
/// lowerReturn and lowerCall should be implemented.
virtual bool supportSwiftError() const {
return false;
}
/// Load the returned value from the stack into virtual registers in \p VRegs.
/// It uses the frame index \p FI and the start offset from \p DemoteReg.
/// The loaded data size will be determined from \p RetTy.
void insertSRetLoads(MachineIRBuilder &MIRBuilder, Type *RetTy,
ArrayRef<Register> VRegs, Register DemoteReg,
int FI) const;
/// Store the return value given by \p VRegs into stack starting at the offset
/// specified in \p DemoteReg.
void insertSRetStores(MachineIRBuilder &MIRBuilder, Type *RetTy,
ArrayRef<Register> VRegs, Register DemoteReg) const;
/// Insert the hidden sret ArgInfo to the beginning of \p SplitArgs.
/// This function should be called from the target specific
/// lowerFormalArguments when \p F requires the sret demotion.
void insertSRetIncomingArgument(const Function &F,
SmallVectorImpl<ArgInfo> &SplitArgs,
Register &DemoteReg, MachineRegisterInfo &MRI,
const DataLayout &DL) const;
/// For the call-base described by \p CB, insert the hidden sret ArgInfo to
/// the OrigArgs field of \p Info.
void insertSRetOutgoingArgument(MachineIRBuilder &MIRBuilder,
const CallBase &CB,
CallLoweringInfo &Info) const;
/// \return True if the return type described by \p Outs can be returned
/// without performing sret demotion.
bool checkReturn(CCState &CCInfo, SmallVectorImpl<BaseArgInfo> &Outs,
CCAssignFn *Fn) const;
/// Get the type and the ArgFlags for the split components of \p RetTy as
/// returned by \c ComputeValueVTs.
void getReturnInfo(CallingConv::ID CallConv, Type *RetTy, AttributeList Attrs,
SmallVectorImpl<BaseArgInfo> &Outs,
const DataLayout &DL) const;
/// Toplevel function to check the return type based on the target calling
/// convention. \return True if the return value of \p MF can be returned
/// without performing sret demotion.
bool checkReturnTypeForCallConv(MachineFunction &MF) const;
/// This hook must be implemented to check whether the return values
/// described by \p Outs can fit into the return registers. If false
/// is returned, an sret-demotion is performed.
virtual bool canLowerReturn(MachineFunction &MF, CallingConv::ID CallConv,
SmallVectorImpl<BaseArgInfo> &Outs,
bool IsVarArg) const {
return true;
}
/// This hook must be implemented to lower outgoing return values, described
/// by \p Val, into the specified virtual registers \p VRegs.
/// This hook is used by GlobalISel.
///
/// \p FLI is required for sret demotion.
///
/// \p SwiftErrorVReg is non-zero if the function has a swifterror parameter
/// that needs to be implicitly returned.
///
/// \return True if the lowering succeeds, false otherwise.
virtual bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI,
Register SwiftErrorVReg) const {
if (!supportSwiftError()) {
assert(SwiftErrorVReg == 0 && "attempt to use unsupported swifterror");
return lowerReturn(MIRBuilder, Val, VRegs, FLI);
}
return false;
}
/// This hook behaves as the extended lowerReturn function, but for targets
/// that do not support swifterror value promotion.
virtual bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
ArrayRef<Register> VRegs,
FunctionLoweringInfo &FLI) const {
return false;
}
virtual bool fallBackToDAGISel(const MachineFunction &MF) const {
return false;
}
/// This hook must be implemented to lower the incoming (formal)
/// arguments, described by \p VRegs, for GlobalISel. Each argument
/// must end up in the related virtual registers described by \p VRegs.
/// In other words, the first argument should end up in \c VRegs[0],
/// the second in \c VRegs[1], and so on. For each argument, there will be one
/// register for each non-aggregate type, as returned by \c computeValueLLTs.
/// \p MIRBuilder is set to the proper insertion for the argument
/// lowering. \p FLI is required for sret demotion.
///
/// \return True if the lowering succeeded, false otherwise.
virtual bool lowerFormalArguments(MachineIRBuilder &MIRBuilder,
const Function &F,
ArrayRef<ArrayRef<Register>> VRegs,
FunctionLoweringInfo &FLI) const {
return false;
}
/// This hook must be implemented to lower the given call instruction,
/// including argument and return value marshalling.
///
///
/// \return true if the lowering succeeded, false otherwise.
virtual bool lowerCall(MachineIRBuilder &MIRBuilder,
CallLoweringInfo &Info) const {
return false;
}
/// Lower the given call instruction, including argument and return value
/// marshalling.
///
/// \p CI is the call/invoke instruction.
///
/// \p ResRegs are the registers where the call's return value should be
/// stored (or 0 if there is no return value). There will be one register for
/// each non-aggregate type, as returned by \c computeValueLLTs.
///
/// \p ArgRegs is a list of lists of virtual registers containing each
/// argument that needs to be passed (argument \c i should be placed in \c
/// ArgRegs[i]). For each argument, there will be one register for each
/// non-aggregate type, as returned by \c computeValueLLTs.
///
/// \p SwiftErrorVReg is non-zero if the call has a swifterror inout
/// parameter, and contains the vreg that the swifterror should be copied into
/// after the call.
///
/// \p GetCalleeReg is a callback to materialize a register for the callee if
/// the target determines it cannot jump to the destination based purely on \p
/// CI. This might be because \p CI is indirect, or because of the limited
/// range of an immediate jump.
///
/// \return true if the lowering succeeded, false otherwise.
bool lowerCall(MachineIRBuilder &MIRBuilder, const CallBase &Call,
ArrayRef<Register> ResRegs,
ArrayRef<ArrayRef<Register>> ArgRegs, Register SwiftErrorVReg,
std::function<unsigned()> GetCalleeReg) const;
/// For targets which want to use big-endian can enable it with
/// enableBigEndian() hook
virtual bool enableBigEndian() const { return false; }
/// For targets which support the "returned" parameter attribute, returns
/// true if the given type is a valid one to use with "returned".
virtual bool isTypeIsValidForThisReturn(EVT Ty) const { return false; }
};
} // end namespace llvm
#endif // LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H
PK iwFZ�v�o�
�
! CodeGen/GlobalISel/CombinerInfo.hnu �[��� //===- llvm/CodeGen/GlobalISel/CombinerInfo.h ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// Interface for Targets to specify which operations are combined how and when.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_COMBINERINFO_H
#define LLVM_CODEGEN_GLOBALISEL_COMBINERINFO_H
#include <cassert>
namespace llvm {
class GISelChangeObserver;
class LegalizerInfo;
class MachineInstr;
class MachineIRBuilder;
// Contains information relevant to enabling/disabling various combines for a
// pass.
class CombinerInfo {
public:
CombinerInfo(bool AllowIllegalOps, bool ShouldLegalizeIllegal,
const LegalizerInfo *LInfo, bool OptEnabled, bool OptSize,
bool MinSize)
: IllegalOpsAllowed(AllowIllegalOps),
LegalizeIllegalOps(ShouldLegalizeIllegal), LInfo(LInfo),
EnableOpt(OptEnabled), EnableOptSize(OptSize), EnableMinSize(MinSize) {
assert(((AllowIllegalOps || !LegalizeIllegalOps) || LInfo) &&
"Expecting legalizerInfo when illegalops not allowed");
}
virtual ~CombinerInfo() = default;
/// If \p IllegalOpsAllowed is false, the CombinerHelper will make use of
/// the legalizerInfo to check for legality before each transformation.
bool IllegalOpsAllowed; // TODO: Make use of this.
/// If \p LegalizeIllegalOps is true, the Combiner will also legalize the
/// illegal ops that are created.
bool LegalizeIllegalOps; // TODO: Make use of this.
const LegalizerInfo *LInfo;
/// Whether optimizations should be enabled. This is to distinguish between
/// uses of the combiner unconditionally and only when optimizations are
/// specifically enabled/
bool EnableOpt;
/// Whether we're optimizing for size.
bool EnableOptSize;
/// Whether we're optimizing for minsize (-Oz).
bool EnableMinSize;
/// Attempt to combine instructions using MI as the root.
///
/// Use Observer to report the creation, modification, and erasure of
/// instructions. GISelChangeObserver will automatically report certain
/// kinds of operations. These operations are:
/// * Instructions that are newly inserted into the MachineFunction
/// * Instructions that are erased from the MachineFunction.
///
/// However, it is important to report instruction modification and this is
/// not automatic.
virtual bool combine(GISelChangeObserver &Observer, MachineInstr &MI,
MachineIRBuilder &B) const = 0;
};
} // namespace llvm
#endif
PK iwFZ�΄
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//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// Tracks DebugLocs between checkpoints and verifies that they are transferred.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_LOSTDEBUGLOCOBSERVER_H
#define LLVM_CODEGEN_GLOBALISEL_LOSTDEBUGLOCOBSERVER_H
#include "llvm/ADT/SmallSet.h"
#include "llvm/CodeGen/GlobalISel/GISelChangeObserver.h"
namespace llvm {
class LostDebugLocObserver : public GISelChangeObserver {
StringRef DebugType;
SmallSet<DebugLoc, 4> LostDebugLocs;
SmallPtrSet<MachineInstr *, 4> PotentialMIsForDebugLocs;
unsigned NumLostDebugLocs = 0;
public:
LostDebugLocObserver(StringRef DebugType) : DebugType(DebugType) {}
unsigned getNumLostDebugLocs() const { return NumLostDebugLocs; }
/// Call this to indicate that it's a good point to assess whether locations
/// have been lost. Typically this will be when a logical change has been
/// completed such as the caller has finished replacing some instructions with
/// alternatives. When CheckDebugLocs is true, the locations will be checked
/// to see if any have been lost since the last checkpoint. When
/// CheckDebugLocs is false, it will just reset ready for the next checkpoint
/// without checking anything. This can be helpful to limit the detection to
/// easy-to-fix portions of an algorithm before allowing more difficult ones.
void checkpoint(bool CheckDebugLocs = true);
void createdInstr(MachineInstr &MI) override;
void erasingInstr(MachineInstr &MI) override;
void changingInstr(MachineInstr &MI) override;
void changedInstr(MachineInstr &MI) override;
private:
void analyzeDebugLocations();
};
} // namespace llvm
#endif // LLVM_CODEGEN_GLOBALISEL_LOSTDEBUGLOCOBSERVER_H
PK iwFZ�TAp�R �R $ CodeGen/GlobalISel/LegalizerHelper.hnu �[��� //== llvm/CodeGen/GlobalISel/LegalizerHelper.h ---------------- -*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file A pass to convert the target-illegal operations created by IR -> MIR
/// translation into ones the target expects to be able to select. This may
/// occur in multiple phases, for example G_ADD <2 x i8> -> G_ADD <2 x i16> ->
/// G_ADD <4 x i16>.
///
/// The LegalizerHelper class is where most of the work happens, and is
/// designed to be callable from other passes that find themselves with an
/// illegal instruction.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_LEGALIZERHELPER_H
#define LLVM_CODEGEN_GLOBALISEL_LEGALIZERHELPER_H
#include "llvm/CodeGen/GlobalISel/CallLowering.h"
#include "llvm/CodeGen/GlobalISel/GISelKnownBits.h"
#include "llvm/CodeGen/RuntimeLibcalls.h"
#include "llvm/CodeGen/TargetOpcodes.h"
namespace llvm {
// Forward declarations.
class APInt;
class GAnyLoad;
class GLoadStore;
class GStore;
class GenericMachineInstr;
class MachineFunction;
class MachineIRBuilder;
class MachineInstr;
class MachineInstrBuilder;
struct MachinePointerInfo;
template <typename T> class SmallVectorImpl;
class LegalizerInfo;
class MachineRegisterInfo;
class GISelChangeObserver;
class LostDebugLocObserver;
class TargetLowering;
class LegalizerHelper {
public:
/// Expose MIRBuilder so clients can set their own RecordInsertInstruction
/// functions
MachineIRBuilder &MIRBuilder;
/// To keep track of changes made by the LegalizerHelper.
GISelChangeObserver &Observer;
private:
MachineRegisterInfo &MRI;
const LegalizerInfo &LI;
const TargetLowering &TLI;
GISelKnownBits *KB;
public:
enum LegalizeResult {
/// Instruction was already legal and no change was made to the
/// MachineFunction.
AlreadyLegal,
/// Instruction has been legalized and the MachineFunction changed.
Legalized,
/// Some kind of error has occurred and we could not legalize this
/// instruction.
UnableToLegalize,
};
/// Expose LegalizerInfo so the clients can re-use.
const LegalizerInfo &getLegalizerInfo() const { return LI; }
const TargetLowering &getTargetLowering() const { return TLI; }
GISelKnownBits *getKnownBits() const { return KB; }
LegalizerHelper(MachineFunction &MF, GISelChangeObserver &Observer,
MachineIRBuilder &B);
LegalizerHelper(MachineFunction &MF, const LegalizerInfo &LI,
GISelChangeObserver &Observer, MachineIRBuilder &B,
GISelKnownBits *KB = nullptr);
/// Replace \p MI by a sequence of legal instructions that can implement the
/// same operation. Note that this means \p MI may be deleted, so any iterator
/// steps should be performed before calling this function. \p Helper should
/// be initialized to the MachineFunction containing \p MI.
///
/// Considered as an opaque blob, the legal code will use and define the same
/// registers as \p MI.
LegalizeResult legalizeInstrStep(MachineInstr &MI,
LostDebugLocObserver &LocObserver);
/// Legalize an instruction by emiting a runtime library call instead.
LegalizeResult libcall(MachineInstr &MI, LostDebugLocObserver &LocObserver);
/// Legalize an instruction by reducing the width of the underlying scalar
/// type.
LegalizeResult narrowScalar(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy);
/// Legalize an instruction by performing the operation on a wider scalar type
/// (for example a 16-bit addition can be safely performed at 32-bits
/// precision, ignoring the unused bits).
LegalizeResult widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
/// Legalize an instruction by replacing the value type
LegalizeResult bitcast(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
/// Legalize an instruction by splitting it into simpler parts, hopefully
/// understood by the target.
LegalizeResult lower(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
/// Legalize a vector instruction by splitting into multiple components, each
/// acting on the same scalar type as the original but with fewer elements.
LegalizeResult fewerElementsVector(MachineInstr &MI, unsigned TypeIdx,
LLT NarrowTy);
/// Legalize a vector instruction by increasing the number of vector elements
/// involved and ignoring the added elements later.
LegalizeResult moreElementsVector(MachineInstr &MI, unsigned TypeIdx,
LLT MoreTy);
/// Cast the given value to an LLT::scalar with an equivalent size. Returns
/// the register to use if an instruction was inserted. Returns the original
/// register if no coercion was necessary.
//
// This may also fail and return Register() if there is no legal way to cast.
Register coerceToScalar(Register Val);
/// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
/// Use by extending the operand's type to \p WideTy using the specified \p
/// ExtOpcode for the extension instruction, and replacing the vreg of the
/// operand in place.
void widenScalarSrc(MachineInstr &MI, LLT WideTy, unsigned OpIdx,
unsigned ExtOpcode);
/// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
/// Use by truncating the operand's type to \p NarrowTy using G_TRUNC, and
/// replacing the vreg of the operand in place.
void narrowScalarSrc(MachineInstr &MI, LLT NarrowTy, unsigned OpIdx);
/// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
/// Def by extending the operand's type to \p WideTy and truncating it back
/// with the \p TruncOpcode, and replacing the vreg of the operand in place.
void widenScalarDst(MachineInstr &MI, LLT WideTy, unsigned OpIdx = 0,
unsigned TruncOpcode = TargetOpcode::G_TRUNC);
// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
// Def by truncating the operand's type to \p NarrowTy, replacing in place and
// extending back with \p ExtOpcode.
void narrowScalarDst(MachineInstr &MI, LLT NarrowTy, unsigned OpIdx,
unsigned ExtOpcode);
/// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
/// Def by performing it with additional vector elements and extracting the
/// result elements, and replacing the vreg of the operand in place.
void moreElementsVectorDst(MachineInstr &MI, LLT MoreTy, unsigned OpIdx);
/// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
/// Use by producing a vector with undefined high elements, extracting the
/// original vector type, and replacing the vreg of the operand in place.
void moreElementsVectorSrc(MachineInstr &MI, LLT MoreTy, unsigned OpIdx);
/// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
/// use by inserting a G_BITCAST to \p CastTy
void bitcastSrc(MachineInstr &MI, LLT CastTy, unsigned OpIdx);
/// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
/// def by inserting a G_BITCAST from \p CastTy
void bitcastDst(MachineInstr &MI, LLT CastTy, unsigned OpIdx);
private:
LegalizeResult
widenScalarMergeValues(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
LegalizeResult
widenScalarUnmergeValues(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
LegalizeResult
widenScalarExtract(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
LegalizeResult
widenScalarInsert(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
LegalizeResult widenScalarAddSubOverflow(MachineInstr &MI, unsigned TypeIdx,
LLT WideTy);
LegalizeResult widenScalarAddSubShlSat(MachineInstr &MI, unsigned TypeIdx,
LLT WideTy);
LegalizeResult widenScalarMulo(MachineInstr &MI, unsigned TypeIdx,
LLT WideTy);
/// Helper function to split a wide generic register into bitwise blocks with
/// the given Type (which implies the number of blocks needed). The generic
/// registers created are appended to Ops, starting at bit 0 of Reg.
void extractParts(Register Reg, LLT Ty, int NumParts,
SmallVectorImpl<Register> &VRegs);
/// Version which handles irregular splits.
bool extractParts(Register Reg, LLT RegTy, LLT MainTy,
LLT &LeftoverTy,
SmallVectorImpl<Register> &VRegs,
SmallVectorImpl<Register> &LeftoverVRegs);
/// Version which handles irregular sub-vector splits.
void extractVectorParts(Register Reg, unsigned NumElst,
SmallVectorImpl<Register> &VRegs);
/// Helper function to build a wide generic register \p DstReg of type \p
/// RegTy from smaller parts. This will produce a G_MERGE_VALUES,
/// G_BUILD_VECTOR, G_CONCAT_VECTORS, or sequence of G_INSERT as appropriate
/// for the types.
///
/// \p PartRegs must be registers of type \p PartTy.
///
/// If \p ResultTy does not evenly break into \p PartTy sized pieces, the
/// remainder must be specified with \p LeftoverRegs of type \p LeftoverTy.
void insertParts(Register DstReg, LLT ResultTy,
LLT PartTy, ArrayRef<Register> PartRegs,
LLT LeftoverTy = LLT(), ArrayRef<Register> LeftoverRegs = {});
/// Merge \p PartRegs with different types into \p DstReg.
void mergeMixedSubvectors(Register DstReg, ArrayRef<Register> PartRegs);
void appendVectorElts(SmallVectorImpl<Register> &Elts, Register Reg);
/// Unmerge \p SrcReg into smaller sized values, and append them to \p
/// Parts. The elements of \p Parts will be the greatest common divisor type
/// of \p DstTy, \p NarrowTy and the type of \p SrcReg. This will compute and
/// return the GCD type.
LLT extractGCDType(SmallVectorImpl<Register> &Parts, LLT DstTy,
LLT NarrowTy, Register SrcReg);
/// Unmerge \p SrcReg into \p GCDTy typed registers. This will append all of
/// the unpacked registers to \p Parts. This version is if the common unmerge
/// type is already known.
void extractGCDType(SmallVectorImpl<Register> &Parts, LLT GCDTy,
Register SrcReg);
/// Produce a merge of values in \p VRegs to define \p DstReg. Perform a merge
/// from the least common multiple type, and convert as appropriate to \p
/// DstReg.
///
/// \p VRegs should each have type \p GCDTy. This type should be greatest
/// common divisor type of \p DstReg, \p NarrowTy, and an undetermined source
/// type.
///
/// \p NarrowTy is the desired result merge source type. If the source value
/// needs to be widened to evenly cover \p DstReg, inserts high bits
/// corresponding to the extension opcode \p PadStrategy.
///
/// \p VRegs will be cleared, and the the result \p NarrowTy register pieces
/// will replace it. Returns The complete LCMTy that \p VRegs will cover when
/// merged.
LLT buildLCMMergePieces(LLT DstTy, LLT NarrowTy, LLT GCDTy,
SmallVectorImpl<Register> &VRegs,
unsigned PadStrategy = TargetOpcode::G_ANYEXT);
/// Merge the values in \p RemergeRegs to an \p LCMTy typed value. Extract the
/// low bits into \p DstReg. This is intended to use the outputs from
/// buildLCMMergePieces after processing.
void buildWidenedRemergeToDst(Register DstReg, LLT LCMTy,
ArrayRef<Register> RemergeRegs);
/// Perform generic multiplication of values held in multiple registers.
/// Generated instructions use only types NarrowTy and i1.
/// Destination can be same or two times size of the source.
void multiplyRegisters(SmallVectorImpl<Register> &DstRegs,
ArrayRef<Register> Src1Regs,
ArrayRef<Register> Src2Regs, LLT NarrowTy);
void changeOpcode(MachineInstr &MI, unsigned NewOpcode);
LegalizeResult tryNarrowPow2Reduction(MachineInstr &MI, Register SrcReg,
LLT SrcTy, LLT NarrowTy,
unsigned ScalarOpc);
// Memcpy family legalization helpers.
LegalizeResult lowerMemset(MachineInstr &MI, Register Dst, Register Val,
uint64_t KnownLen, Align Alignment,
bool IsVolatile);
LegalizeResult lowerMemcpyInline(MachineInstr &MI, Register Dst, Register Src,
uint64_t KnownLen, Align DstAlign,
Align SrcAlign, bool IsVolatile);
LegalizeResult lowerMemcpy(MachineInstr &MI, Register Dst, Register Src,
uint64_t KnownLen, uint64_t Limit, Align DstAlign,
Align SrcAlign, bool IsVolatile);
LegalizeResult lowerMemmove(MachineInstr &MI, Register Dst, Register Src,
uint64_t KnownLen, Align DstAlign, Align SrcAlign,
bool IsVolatile);
public:
/// Return the alignment to use for a stack temporary object with the given
/// type.
Align getStackTemporaryAlignment(LLT Type, Align MinAlign = Align()) const;
/// Create a stack temporary based on the size in bytes and the alignment
MachineInstrBuilder createStackTemporary(TypeSize Bytes, Align Alignment,
MachinePointerInfo &PtrInfo);
/// Get a pointer to vector element \p Index located in memory for a vector of
/// type \p VecTy starting at a base address of \p VecPtr. If \p Index is out
/// of bounds the returned pointer is unspecified, but will be within the
/// vector bounds.
Register getVectorElementPointer(Register VecPtr, LLT VecTy, Register Index);
/// Handles most opcodes. Split \p MI into same instruction on sub-vectors or
/// scalars with \p NumElts elements (1 for scalar). Supports uneven splits:
/// there can be leftover sub-vector with fewer then \p NumElts or a leftover
/// scalar. To avoid this use moreElements first and set MI number of elements
/// to multiple of \p NumElts. Non-vector operands that should be used on all
/// sub-instructions without split are listed in \p NonVecOpIndices.
LegalizeResult fewerElementsVectorMultiEltType(
GenericMachineInstr &MI, unsigned NumElts,
std::initializer_list<unsigned> NonVecOpIndices = {});
LegalizeResult fewerElementsVectorPhi(GenericMachineInstr &MI,
unsigned NumElts);
LegalizeResult moreElementsVectorPhi(MachineInstr &MI, unsigned TypeIdx,
LLT MoreTy);
LegalizeResult moreElementsVectorShuffle(MachineInstr &MI, unsigned TypeIdx,
LLT MoreTy);
LegalizeResult fewerElementsVectorUnmergeValues(MachineInstr &MI,
unsigned TypeIdx,
LLT NarrowTy);
LegalizeResult fewerElementsVectorMerge(MachineInstr &MI, unsigned TypeIdx,
LLT NarrowTy);
LegalizeResult fewerElementsVectorExtractInsertVectorElt(MachineInstr &MI,
unsigned TypeIdx,
LLT NarrowTy);
/// Equalize source and destination vector sizes of G_SHUFFLE_VECTOR.
LegalizeResult equalizeVectorShuffleLengths(MachineInstr &MI);
LegalizeResult reduceLoadStoreWidth(GLoadStore &MI, unsigned TypeIdx,
LLT NarrowTy);
LegalizeResult narrowScalarShiftByConstant(MachineInstr &MI, const APInt &Amt,
LLT HalfTy, LLT ShiftAmtTy);
LegalizeResult fewerElementsVectorReductions(MachineInstr &MI,
unsigned TypeIdx, LLT NarrowTy);
LegalizeResult fewerElementsVectorShuffle(MachineInstr &MI, unsigned TypeIdx,
LLT NarrowTy);
LegalizeResult narrowScalarShift(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
LegalizeResult narrowScalarAddSub(MachineInstr &MI, unsigned TypeIdx,
LLT NarrowTy);
LegalizeResult narrowScalarMul(MachineInstr &MI, LLT Ty);
LegalizeResult narrowScalarFPTOI(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
LegalizeResult narrowScalarExtract(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
LegalizeResult narrowScalarInsert(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
LegalizeResult narrowScalarBasic(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
LegalizeResult narrowScalarExt(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
LegalizeResult narrowScalarSelect(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
LegalizeResult narrowScalarCTLZ(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
LegalizeResult narrowScalarCTTZ(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
LegalizeResult narrowScalarCTPOP(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
LegalizeResult narrowScalarFLDEXP(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
/// Perform Bitcast legalize action on G_EXTRACT_VECTOR_ELT.
LegalizeResult bitcastExtractVectorElt(MachineInstr &MI, unsigned TypeIdx,
LLT CastTy);
/// Perform Bitcast legalize action on G_INSERT_VECTOR_ELT.
LegalizeResult bitcastInsertVectorElt(MachineInstr &MI, unsigned TypeIdx,
LLT CastTy);
LegalizeResult lowerFConstant(MachineInstr &MI);
LegalizeResult lowerBitcast(MachineInstr &MI);
LegalizeResult lowerLoad(GAnyLoad &MI);
LegalizeResult lowerStore(GStore &MI);
LegalizeResult lowerBitCount(MachineInstr &MI);
LegalizeResult lowerFunnelShiftWithInverse(MachineInstr &MI);
LegalizeResult lowerFunnelShiftAsShifts(MachineInstr &MI);
LegalizeResult lowerFunnelShift(MachineInstr &MI);
LegalizeResult lowerRotateWithReverseRotate(MachineInstr &MI);
LegalizeResult lowerRotate(MachineInstr &MI);
LegalizeResult lowerU64ToF32BitOps(MachineInstr &MI);
LegalizeResult lowerUITOFP(MachineInstr &MI);
LegalizeResult lowerSITOFP(MachineInstr &MI);
LegalizeResult lowerFPTOUI(MachineInstr &MI);
LegalizeResult lowerFPTOSI(MachineInstr &MI);
LegalizeResult lowerFPTRUNC_F64_TO_F16(MachineInstr &MI);
LegalizeResult lowerFPTRUNC(MachineInstr &MI);
LegalizeResult lowerFPOWI(MachineInstr &MI);
LegalizeResult lowerISFPCLASS(MachineInstr &MI);
LegalizeResult lowerMinMax(MachineInstr &MI);
LegalizeResult lowerFCopySign(MachineInstr &MI);
LegalizeResult lowerFMinNumMaxNum(MachineInstr &MI);
LegalizeResult lowerFMad(MachineInstr &MI);
LegalizeResult lowerIntrinsicRound(MachineInstr &MI);
LegalizeResult lowerFFloor(MachineInstr &MI);
LegalizeResult lowerMergeValues(MachineInstr &MI);
LegalizeResult lowerUnmergeValues(MachineInstr &MI);
LegalizeResult lowerExtractInsertVectorElt(MachineInstr &MI);
LegalizeResult lowerShuffleVector(MachineInstr &MI);
LegalizeResult lowerDynStackAlloc(MachineInstr &MI);
LegalizeResult lowerExtract(MachineInstr &MI);
LegalizeResult lowerInsert(MachineInstr &MI);
LegalizeResult lowerSADDO_SSUBO(MachineInstr &MI);
LegalizeResult lowerAddSubSatToMinMax(MachineInstr &MI);
LegalizeResult lowerAddSubSatToAddoSubo(MachineInstr &MI);
LegalizeResult lowerShlSat(MachineInstr &MI);
LegalizeResult lowerBswap(MachineInstr &MI);
LegalizeResult lowerBitreverse(MachineInstr &MI);
LegalizeResult lowerReadWriteRegister(MachineInstr &MI);
LegalizeResult lowerSMULH_UMULH(MachineInstr &MI);
LegalizeResult lowerSelect(MachineInstr &MI);
LegalizeResult lowerDIVREM(MachineInstr &MI);
LegalizeResult lowerAbsToAddXor(MachineInstr &MI);
LegalizeResult lowerAbsToMaxNeg(MachineInstr &MI);
LegalizeResult lowerVectorReduction(MachineInstr &MI);
LegalizeResult lowerMemcpyInline(MachineInstr &MI);
LegalizeResult lowerMemCpyFamily(MachineInstr &MI, unsigned MaxLen = 0);
};
/// Helper function that creates a libcall to the given \p Name using the given
/// calling convention \p CC.
LegalizerHelper::LegalizeResult
createLibcall(MachineIRBuilder &MIRBuilder, const char *Name,
const CallLowering::ArgInfo &Result,
ArrayRef<CallLowering::ArgInfo> Args, CallingConv::ID CC);
/// Helper function that creates the given libcall.
LegalizerHelper::LegalizeResult
createLibcall(MachineIRBuilder &MIRBuilder, RTLIB::Libcall Libcall,
const CallLowering::ArgInfo &Result,
ArrayRef<CallLowering::ArgInfo> Args);
/// Create a libcall to memcpy et al.
LegalizerHelper::LegalizeResult
createMemLibcall(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI,
MachineInstr &MI, LostDebugLocObserver &LocObserver);
} // End namespace llvm.
#endif
PK iwFZl�7-� � ! CodeGen/GlobalISel/RegisterBank.hnu �[��� //==-- llvm/CodeGen/GlobalISel/RegisterBank.h - Register Bank ----*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file This file declares the API of register banks.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_REGISTERBANK_H
#define LLVM_CODEGEN_GLOBALISEL_REGISTERBANK_H
#include "llvm/ADT/BitVector.h"
namespace llvm {
// Forward declarations.
class RegisterBankInfo;
class raw_ostream;
class TargetRegisterClass;
class TargetRegisterInfo;
/// This class implements the register bank concept.
/// Two instances of RegisterBank must have different ID.
/// This property is enforced by the RegisterBankInfo class.
class RegisterBank {
private:
unsigned ID;
const char *Name;
unsigned Size;
BitVector ContainedRegClasses;
/// Sentinel value used to recognize register bank not properly
/// initialized yet.
static const unsigned InvalidID;
/// Only the RegisterBankInfo can initialize RegisterBank properly.
friend RegisterBankInfo;
public:
RegisterBank(unsigned ID, const char *Name, unsigned Size,
const uint32_t *CoveredClasses, unsigned NumRegClasses);
/// Get the identifier of this register bank.
unsigned getID() const { return ID; }
/// Get a user friendly name of this register bank.
/// Should be used only for debugging purposes.
const char *getName() const { return Name; }
/// Get the maximal size in bits that fits in this register bank.
unsigned getSize() const { return Size; }
/// Check whether this instance is ready to be used.
bool isValid() const;
/// Check if this register bank is valid. In other words,
/// if it has been properly constructed.
///
/// \note This method does not check anything when assertions are disabled.
///
/// \return True is the check was successful.
bool verify(const TargetRegisterInfo &TRI) const;
/// Check whether this register bank covers \p RC.
/// In other words, check if this register bank fully covers
/// the registers that \p RC contains.
/// \pre isValid()
bool covers(const TargetRegisterClass &RC) const;
/// Check whether \p OtherRB is the same as this.
bool operator==(const RegisterBank &OtherRB) const;
bool operator!=(const RegisterBank &OtherRB) const {
return !this->operator==(OtherRB);
}
/// Dump the register mask on dbgs() stream.
/// The dump is verbose.
void dump(const TargetRegisterInfo *TRI = nullptr) const;
/// Print the register mask on OS.
/// If IsForDebug is false, then only the name of the register bank
/// is printed. Otherwise, all the fields are printing.
/// TRI is then used to print the name of the register classes that
/// this register bank covers.
void print(raw_ostream &OS, bool IsForDebug = false,
const TargetRegisterInfo *TRI = nullptr) const;
};
inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
RegBank.print(OS);
return OS;
}
} // End namespace llvm.
#endif
PK iwFZ�
�� � " CodeGen/GlobalISel/CSEMIRBuilder.hnu �[��� //===-- llvm/CodeGen/GlobalISel/CSEMIRBuilder.h --*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This file implements a version of MachineIRBuilder which CSEs insts within
/// a MachineBasicBlock.
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_CSEMIRBUILDER_H
#define LLVM_CODEGEN_GLOBALISEL_CSEMIRBUILDER_H
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
namespace llvm {
class GISelInstProfileBuilder;
/// Defines a builder that does CSE of MachineInstructions using GISelCSEInfo.
/// Eg usage.
///
///
/// GISelCSEInfo *Info =
/// &getAnalysis<GISelCSEAnalysisWrapperPass>().getCSEInfo(); CSEMIRBuilder
/// CB(Builder.getState()); CB.setCSEInfo(Info); auto A = CB.buildConstant(s32,
/// 42); auto B = CB.buildConstant(s32, 42); assert(A == B); unsigned CReg =
/// MRI.createGenericVirtualRegister(s32); auto C = CB.buildConstant(CReg, 42);
/// assert(C->getOpcode() == TargetOpcode::COPY);
/// Explicitly passing in a register would materialize a copy if possible.
/// CSEMIRBuilder also does trivial constant folding for binary ops.
class CSEMIRBuilder : public MachineIRBuilder {
/// Returns true if A dominates B (within the same basic block).
/// Both iterators must be in the same basic block.
//
// TODO: Another approach for checking dominance is having two iterators and
// making them go towards each other until they meet or reach begin/end. Which
// approach is better? Should this even change dynamically? For G_CONSTANTS
// most of which will be at the top of the BB, the top down approach would be
// a better choice. Does IRTranslator placing constants at the beginning still
// make sense? Should this change based on Opcode?
bool dominates(MachineBasicBlock::const_iterator A,
MachineBasicBlock::const_iterator B) const;
/// For given ID, find a machineinstr in the CSE Map. If found, check if it
/// dominates the current insertion point and if not, move it just before the
/// current insertion point and return it. If not found, return Null
/// MachineInstrBuilder.
MachineInstrBuilder getDominatingInstrForID(FoldingSetNodeID &ID,
void *&NodeInsertPos);
/// Simple check if we can CSE (we have the CSEInfo) or if this Opcode is
/// safe to CSE.
bool canPerformCSEForOpc(unsigned Opc) const;
void profileDstOp(const DstOp &Op, GISelInstProfileBuilder &B) const;
void profileDstOps(ArrayRef<DstOp> Ops, GISelInstProfileBuilder &B) const {
for (const DstOp &Op : Ops)
profileDstOp(Op, B);
}
void profileSrcOp(const SrcOp &Op, GISelInstProfileBuilder &B) const;
void profileSrcOps(ArrayRef<SrcOp> Ops, GISelInstProfileBuilder &B) const {
for (const SrcOp &Op : Ops)
profileSrcOp(Op, B);
}
void profileMBBOpcode(GISelInstProfileBuilder &B, unsigned Opc) const;
void profileEverything(unsigned Opc, ArrayRef<DstOp> DstOps,
ArrayRef<SrcOp> SrcOps, std::optional<unsigned> Flags,
GISelInstProfileBuilder &B) const;
// Takes a MachineInstrBuilder and inserts it into the CSEMap using the
// NodeInsertPos.
MachineInstrBuilder memoizeMI(MachineInstrBuilder MIB, void *NodeInsertPos);
// If we have can CSE an instruction, but still need to materialize to a VReg,
// we emit a copy from the CSE'd inst to the VReg.
MachineInstrBuilder generateCopiesIfRequired(ArrayRef<DstOp> DstOps,
MachineInstrBuilder &MIB);
// If we have can CSE an instruction, but still need to materialize to a VReg,
// check if we can generate copies. It's not possible to return a single MIB,
// while emitting copies to multiple vregs.
bool checkCopyToDefsPossible(ArrayRef<DstOp> DstOps);
public:
// Pull in base class constructors.
using MachineIRBuilder::MachineIRBuilder;
// Unhide buildInstr
MachineInstrBuilder
buildInstr(unsigned Opc, ArrayRef<DstOp> DstOps, ArrayRef<SrcOp> SrcOps,
std::optional<unsigned> Flag = std::nullopt) override;
// Bring in the other overload from the base class.
using MachineIRBuilder::buildConstant;
MachineInstrBuilder buildConstant(const DstOp &Res,
const ConstantInt &Val) override;
// Bring in the other overload from the base class.
using MachineIRBuilder::buildFConstant;
MachineInstrBuilder buildFConstant(const DstOp &Res,
const ConstantFP &Val) override;
};
} // namespace llvm
#endif
PK iwFZȱE�4� 4� , CodeGen/GlobalISel/InstructionSelectorImpl.hnu �[��� //===- llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file This file declares the API for the instruction selector.
/// This class is responsible for selecting machine instructions.
/// It's implemented by the target. It's used by the InstructionSelect pass.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_INSTRUCTIONSELECTORIMPL_H
#define LLVM_CODEGEN_GLOBALISEL_INSTRUCTIONSELECTORIMPL_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
#include "llvm/CodeGen/GlobalISel/Utils.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterBankInfo.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetOpcodes.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/Support/CodeGenCoverage.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <cstddef>
#include <cstdint>
namespace llvm {
/// GlobalISel PatFrag Predicates
enum {
GIPFP_I64_Invalid = 0,
GIPFP_APInt_Invalid = 0,
GIPFP_APFloat_Invalid = 0,
GIPFP_MI_Invalid = 0,
};
template <class TgtInstructionSelector, class PredicateBitset,
class ComplexMatcherMemFn, class CustomRendererFn>
bool InstructionSelector::executeMatchTable(
TgtInstructionSelector &ISel, NewMIVector &OutMIs, MatcherState &State,
const ISelInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn>
&ISelInfo,
const int64_t *MatchTable, const TargetInstrInfo &TII,
MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI,
const RegisterBankInfo &RBI, const PredicateBitset &AvailableFeatures,
CodeGenCoverage &CoverageInfo) const {
uint64_t CurrentIdx = 0;
SmallVector<uint64_t, 4> OnFailResumeAt;
// Bypass the flag check on the instruction, and only look at the MCInstrDesc.
bool NoFPException = !State.MIs[0]->getDesc().mayRaiseFPException();
const uint16_t Flags = State.MIs[0]->getFlags();
enum RejectAction { RejectAndGiveUp, RejectAndResume };
auto handleReject = [&]() -> RejectAction {
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": Rejected\n");
if (OnFailResumeAt.empty())
return RejectAndGiveUp;
CurrentIdx = OnFailResumeAt.pop_back_val();
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": Resume at " << CurrentIdx << " ("
<< OnFailResumeAt.size() << " try-blocks remain)\n");
return RejectAndResume;
};
auto propagateFlags = [=](NewMIVector &OutMIs) {
for (auto MIB : OutMIs) {
// Set the NoFPExcept flag when no original matched instruction could
// raise an FP exception, but the new instruction potentially might.
uint16_t MIBFlags = Flags;
if (NoFPException && MIB->mayRaiseFPException())
MIBFlags |= MachineInstr::NoFPExcept;
MIB.setMIFlags(MIBFlags);
}
return true;
};
while (true) {
assert(CurrentIdx != ~0u && "Invalid MatchTable index");
int64_t MatcherOpcode = MatchTable[CurrentIdx++];
switch (MatcherOpcode) {
case GIM_Try: {
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": Begin try-block\n");
OnFailResumeAt.push_back(MatchTable[CurrentIdx++]);
break;
}
case GIM_RecordInsn: {
int64_t NewInsnID = MatchTable[CurrentIdx++];
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
// As an optimisation we require that MIs[0] is always the root. Refuse
// any attempt to modify it.
assert(NewInsnID != 0 && "Refusing to modify MIs[0]");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
if (!MO.isReg()) {
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": Not a register\n");
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
if (MO.getReg().isPhysical()) {
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": Is a physical register\n");
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
MachineInstr *NewMI = MRI.getVRegDef(MO.getReg());
if ((size_t)NewInsnID < State.MIs.size())
State.MIs[NewInsnID] = NewMI;
else {
assert((size_t)NewInsnID == State.MIs.size() &&
"Expected to store MIs in order");
State.MIs.push_back(NewMI);
}
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": MIs[" << NewInsnID
<< "] = GIM_RecordInsn(" << InsnID << ", " << OpIdx
<< ")\n");
break;
}
case GIM_CheckFeatures: {
int64_t ExpectedBitsetID = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx
<< ": GIM_CheckFeatures(ExpectedBitsetID="
<< ExpectedBitsetID << ")\n");
if ((AvailableFeatures & ISelInfo.FeatureBitsets[ExpectedBitsetID]) !=
ISelInfo.FeatureBitsets[ExpectedBitsetID]) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_CheckOpcode:
case GIM_CheckOpcodeIsEither: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t Expected0 = MatchTable[CurrentIdx++];
int64_t Expected1 = -1;
if (MatcherOpcode == GIM_CheckOpcodeIsEither)
Expected1 = MatchTable[CurrentIdx++];
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
unsigned Opcode = State.MIs[InsnID]->getOpcode();
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_CheckOpcode(MIs[" << InsnID
<< "], ExpectedOpcode=" << Expected0;
if (MatcherOpcode == GIM_CheckOpcodeIsEither)
dbgs() << " || " << Expected1;
dbgs() << ") // Got=" << Opcode << "\n";
);
if (Opcode != Expected0 && Opcode != Expected1) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_SwitchOpcode: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t LowerBound = MatchTable[CurrentIdx++];
int64_t UpperBound = MatchTable[CurrentIdx++];
int64_t Default = MatchTable[CurrentIdx++];
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
const int64_t Opcode = State.MIs[InsnID]->getOpcode();
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), {
dbgs() << CurrentIdx << ": GIM_SwitchOpcode(MIs[" << InsnID << "], ["
<< LowerBound << ", " << UpperBound << "), Default=" << Default
<< ", JumpTable...) // Got=" << Opcode << "\n";
});
if (Opcode < LowerBound || UpperBound <= Opcode) {
CurrentIdx = Default;
break;
}
CurrentIdx = MatchTable[CurrentIdx + (Opcode - LowerBound)];
if (!CurrentIdx) {
CurrentIdx = Default;
break;
}
OnFailResumeAt.push_back(Default);
break;
}
case GIM_SwitchType: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t LowerBound = MatchTable[CurrentIdx++];
int64_t UpperBound = MatchTable[CurrentIdx++];
int64_t Default = MatchTable[CurrentIdx++];
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), {
dbgs() << CurrentIdx << ": GIM_SwitchType(MIs[" << InsnID
<< "]->getOperand(" << OpIdx << "), [" << LowerBound << ", "
<< UpperBound << "), Default=" << Default
<< ", JumpTable...) // Got=";
if (!MO.isReg())
dbgs() << "Not a VReg\n";
else
dbgs() << MRI.getType(MO.getReg()) << "\n";
});
if (!MO.isReg()) {
CurrentIdx = Default;
break;
}
const LLT Ty = MRI.getType(MO.getReg());
const auto TyI = ISelInfo.TypeIDMap.find(Ty);
if (TyI == ISelInfo.TypeIDMap.end()) {
CurrentIdx = Default;
break;
}
const int64_t TypeID = TyI->second;
if (TypeID < LowerBound || UpperBound <= TypeID) {
CurrentIdx = Default;
break;
}
CurrentIdx = MatchTable[CurrentIdx + (TypeID - LowerBound)];
if (!CurrentIdx) {
CurrentIdx = Default;
break;
}
OnFailResumeAt.push_back(Default);
break;
}
case GIM_CheckNumOperands: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t Expected = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_CheckNumOperands(MIs["
<< InsnID << "], Expected=" << Expected << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
if (State.MIs[InsnID]->getNumOperands() != Expected) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_CheckI64ImmPredicate:
case GIM_CheckImmOperandPredicate: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatcherOpcode == GIM_CheckImmOperandPredicate
? MatchTable[CurrentIdx++]
: 1;
int64_t Predicate = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_CheckImmPredicate(MIs["
<< InsnID << "]->getOperand(" << OpIdx
<< "), Predicate=" << Predicate << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
assert((State.MIs[InsnID]->getOperand(OpIdx).isImm() ||
State.MIs[InsnID]->getOperand(OpIdx).isCImm()) &&
"Expected immediate operand");
assert(Predicate > GIPFP_I64_Invalid && "Expected a valid predicate");
int64_t Value = 0;
if (State.MIs[InsnID]->getOperand(OpIdx).isCImm())
Value = State.MIs[InsnID]->getOperand(OpIdx).getCImm()->getSExtValue();
else if (State.MIs[InsnID]->getOperand(OpIdx).isImm())
Value = State.MIs[InsnID]->getOperand(OpIdx).getImm();
else
llvm_unreachable("Expected Imm or CImm operand");
if (!testImmPredicate_I64(Predicate, Value))
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckAPIntImmPredicate: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t Predicate = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs()
<< CurrentIdx << ": GIM_CheckAPIntImmPredicate(MIs["
<< InsnID << "], Predicate=" << Predicate << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
assert(State.MIs[InsnID]->getOpcode() == TargetOpcode::G_CONSTANT &&
"Expected G_CONSTANT");
assert(Predicate > GIPFP_APInt_Invalid && "Expected a valid predicate");
APInt Value;
if (State.MIs[InsnID]->getOperand(1).isCImm())
Value = State.MIs[InsnID]->getOperand(1).getCImm()->getValue();
else
llvm_unreachable("Expected Imm or CImm operand");
if (!testImmPredicate_APInt(Predicate, Value))
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckAPFloatImmPredicate: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t Predicate = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs()
<< CurrentIdx << ": GIM_CheckAPFloatImmPredicate(MIs["
<< InsnID << "], Predicate=" << Predicate << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
assert(State.MIs[InsnID]->getOpcode() == TargetOpcode::G_FCONSTANT &&
"Expected G_FCONSTANT");
assert(State.MIs[InsnID]->getOperand(1).isFPImm() && "Expected FPImm operand");
assert(Predicate > GIPFP_APFloat_Invalid && "Expected a valid predicate");
APFloat Value = State.MIs[InsnID]->getOperand(1).getFPImm()->getValueAPF();
if (!testImmPredicate_APFloat(Predicate, Value))
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckIsBuildVectorAllOnes:
case GIM_CheckIsBuildVectorAllZeros: {
int64_t InsnID = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx
<< ": GIM_CheckBuildVectorAll{Zeros|Ones}(MIs["
<< InsnID << "])\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
const MachineInstr *MI = State.MIs[InsnID];
assert((MI->getOpcode() == TargetOpcode::G_BUILD_VECTOR ||
MI->getOpcode() == TargetOpcode::G_BUILD_VECTOR_TRUNC) &&
"Expected G_BUILD_VECTOR or G_BUILD_VECTOR_TRUNC");
if (MatcherOpcode == GIM_CheckIsBuildVectorAllOnes) {
if (!isBuildVectorAllOnes(*MI, MRI)) {
if (handleReject() == RejectAndGiveUp)
return false;
}
} else {
if (!isBuildVectorAllZeros(*MI, MRI)) {
if (handleReject() == RejectAndGiveUp)
return false;
}
}
break;
}
case GIM_CheckCxxInsnPredicate: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t Predicate = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs()
<< CurrentIdx << ": GIM_CheckCxxPredicate(MIs["
<< InsnID << "], Predicate=" << Predicate << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
assert(Predicate > GIPFP_MI_Invalid && "Expected a valid predicate");
if (!testMIPredicate_MI(Predicate, *State.MIs[InsnID],
State.RecordedOperands))
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckHasNoUse: {
int64_t InsnID = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_CheckHasNoUse(MIs["
<< InsnID << "]\n");
const MachineInstr *MI = State.MIs[InsnID];
assert(MI && "Used insn before defined");
assert(MI->getNumDefs() > 0 && "No defs");
const Register Res = MI->getOperand(0).getReg();
if (!MRI.use_nodbg_empty(Res)) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_CheckAtomicOrdering: {
int64_t InsnID = MatchTable[CurrentIdx++];
AtomicOrdering Ordering = (AtomicOrdering)MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_CheckAtomicOrdering(MIs["
<< InsnID << "], " << (uint64_t)Ordering << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
if (!State.MIs[InsnID]->hasOneMemOperand())
if (handleReject() == RejectAndGiveUp)
return false;
for (const auto &MMO : State.MIs[InsnID]->memoperands())
if (MMO->getMergedOrdering() != Ordering)
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckAtomicOrderingOrStrongerThan: {
int64_t InsnID = MatchTable[CurrentIdx++];
AtomicOrdering Ordering = (AtomicOrdering)MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx
<< ": GIM_CheckAtomicOrderingOrStrongerThan(MIs["
<< InsnID << "], " << (uint64_t)Ordering << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
if (!State.MIs[InsnID]->hasOneMemOperand())
if (handleReject() == RejectAndGiveUp)
return false;
for (const auto &MMO : State.MIs[InsnID]->memoperands())
if (!isAtLeastOrStrongerThan(MMO->getMergedOrdering(), Ordering))
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckAtomicOrderingWeakerThan: {
int64_t InsnID = MatchTable[CurrentIdx++];
AtomicOrdering Ordering = (AtomicOrdering)MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx
<< ": GIM_CheckAtomicOrderingWeakerThan(MIs["
<< InsnID << "], " << (uint64_t)Ordering << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
if (!State.MIs[InsnID]->hasOneMemOperand())
if (handleReject() == RejectAndGiveUp)
return false;
for (const auto &MMO : State.MIs[InsnID]->memoperands())
if (!isStrongerThan(Ordering, MMO->getMergedOrdering()))
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckMemoryAddressSpace: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t MMOIdx = MatchTable[CurrentIdx++];
// This accepts a list of possible address spaces.
const int NumAddrSpace = MatchTable[CurrentIdx++];
if (State.MIs[InsnID]->getNumMemOperands() <= MMOIdx) {
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
// Need to still jump to the end of the list of address spaces if we find
// a match earlier.
const uint64_t LastIdx = CurrentIdx + NumAddrSpace;
const MachineMemOperand *MMO
= *(State.MIs[InsnID]->memoperands_begin() + MMOIdx);
const unsigned MMOAddrSpace = MMO->getAddrSpace();
bool Success = false;
for (int I = 0; I != NumAddrSpace; ++I) {
unsigned AddrSpace = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(
TgtInstructionSelector::getName(),
dbgs() << "addrspace(" << MMOAddrSpace << ") vs "
<< AddrSpace << '\n');
if (AddrSpace == MMOAddrSpace) {
Success = true;
break;
}
}
CurrentIdx = LastIdx;
if (!Success && handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckMemoryAlignment: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t MMOIdx = MatchTable[CurrentIdx++];
unsigned MinAlign = MatchTable[CurrentIdx++];
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
if (State.MIs[InsnID]->getNumMemOperands() <= MMOIdx) {
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
MachineMemOperand *MMO
= *(State.MIs[InsnID]->memoperands_begin() + MMOIdx);
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_CheckMemoryAlignment"
<< "(MIs[" << InsnID << "]->memoperands() + " << MMOIdx
<< ")->getAlignment() >= " << MinAlign << ")\n");
if (MMO->getAlign() < MinAlign && handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckMemorySizeEqualTo: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t MMOIdx = MatchTable[CurrentIdx++];
uint64_t Size = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx
<< ": GIM_CheckMemorySizeEqual(MIs[" << InsnID
<< "]->memoperands() + " << MMOIdx
<< ", Size=" << Size << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
if (State.MIs[InsnID]->getNumMemOperands() <= MMOIdx) {
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
MachineMemOperand *MMO = *(State.MIs[InsnID]->memoperands_begin() + MMOIdx);
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << MMO->getSize() << " bytes vs " << Size
<< " bytes\n");
if (MMO->getSize() != Size)
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckMemorySizeEqualToLLT:
case GIM_CheckMemorySizeLessThanLLT:
case GIM_CheckMemorySizeGreaterThanLLT: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t MMOIdx = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(
TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_CheckMemorySize"
<< (MatcherOpcode == GIM_CheckMemorySizeEqualToLLT
? "EqualTo"
: MatcherOpcode == GIM_CheckMemorySizeGreaterThanLLT
? "GreaterThan"
: "LessThan")
<< "LLT(MIs[" << InsnID << "]->memoperands() + " << MMOIdx
<< ", OpIdx=" << OpIdx << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
if (!MO.isReg()) {
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": Not a register\n");
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
if (State.MIs[InsnID]->getNumMemOperands() <= MMOIdx) {
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
MachineMemOperand *MMO = *(State.MIs[InsnID]->memoperands_begin() + MMOIdx);
unsigned Size = MRI.getType(MO.getReg()).getSizeInBits();
if (MatcherOpcode == GIM_CheckMemorySizeEqualToLLT &&
MMO->getSizeInBits() != Size) {
if (handleReject() == RejectAndGiveUp)
return false;
} else if (MatcherOpcode == GIM_CheckMemorySizeLessThanLLT &&
MMO->getSizeInBits() >= Size) {
if (handleReject() == RejectAndGiveUp)
return false;
} else if (MatcherOpcode == GIM_CheckMemorySizeGreaterThanLLT &&
MMO->getSizeInBits() <= Size)
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckType: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t TypeID = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_CheckType(MIs[" << InsnID
<< "]->getOperand(" << OpIdx
<< "), TypeID=" << TypeID << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
if (!MO.isReg() ||
MRI.getType(MO.getReg()) != ISelInfo.TypeObjects[TypeID]) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_CheckPointerToAny: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
uint64_t SizeInBits = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_CheckPointerToAny(MIs["
<< InsnID << "]->getOperand(" << OpIdx
<< "), SizeInBits=" << SizeInBits << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
const LLT Ty = MRI.getType(MO.getReg());
// iPTR must be looked up in the target.
if (SizeInBits == 0) {
MachineFunction *MF = State.MIs[InsnID]->getParent()->getParent();
const unsigned AddrSpace = Ty.getAddressSpace();
SizeInBits = MF->getDataLayout().getPointerSizeInBits(AddrSpace);
}
assert(SizeInBits != 0 && "Pointer size must be known");
if (MO.isReg()) {
if (!Ty.isPointer() || Ty.getSizeInBits() != SizeInBits)
if (handleReject() == RejectAndGiveUp)
return false;
} else if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_RecordNamedOperand: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
uint64_t StoreIdx = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_RecordNamedOperand(MIs["
<< InsnID << "]->getOperand(" << OpIdx
<< "), StoreIdx=" << StoreIdx << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
assert(StoreIdx < State.RecordedOperands.size() && "Index out of range");
State.RecordedOperands[StoreIdx] = &State.MIs[InsnID]->getOperand(OpIdx);
break;
}
case GIM_CheckRegBankForClass: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t RCEnum = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_CheckRegBankForClass(MIs["
<< InsnID << "]->getOperand(" << OpIdx
<< "), RCEnum=" << RCEnum << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
if (!MO.isReg() ||
&RBI.getRegBankFromRegClass(*TRI.getRegClass(RCEnum),
MRI.getType(MO.getReg())) !=
RBI.getRegBank(MO.getReg(), MRI, TRI)) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_CheckComplexPattern: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t RendererID = MatchTable[CurrentIdx++];
int64_t ComplexPredicateID = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": State.Renderers[" << RendererID
<< "] = GIM_CheckComplexPattern(MIs[" << InsnID
<< "]->getOperand(" << OpIdx
<< "), ComplexPredicateID=" << ComplexPredicateID
<< ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
// FIXME: Use std::invoke() when it's available.
ComplexRendererFns Renderer =
(ISel.*ISelInfo.ComplexPredicates[ComplexPredicateID])(
State.MIs[InsnID]->getOperand(OpIdx));
if (Renderer)
State.Renderers[RendererID] = *Renderer;
else
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckConstantInt: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t Value = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_CheckConstantInt(MIs["
<< InsnID << "]->getOperand(" << OpIdx
<< "), Value=" << Value << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
if (MO.isReg()) {
// isOperandImmEqual() will sign-extend to 64-bits, so should we.
LLT Ty = MRI.getType(MO.getReg());
Value = SignExtend64(Value, Ty.getSizeInBits());
if (!isOperandImmEqual(MO, Value, MRI)) {
if (handleReject() == RejectAndGiveUp)
return false;
}
} else if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckLiteralInt: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t Value = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_CheckLiteralInt(MIs["
<< InsnID << "]->getOperand(" << OpIdx
<< "), Value=" << Value << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
if (MO.isImm() && MO.getImm() == Value)
break;
if (MO.isCImm() && MO.getCImm()->equalsInt(Value))
break;
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckIntrinsicID: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t Value = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_CheckIntrinsicID(MIs["
<< InsnID << "]->getOperand(" << OpIdx
<< "), Value=" << Value << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
if (!MO.isIntrinsicID() || MO.getIntrinsicID() != Value)
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckCmpPredicate: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t Value = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_CheckCmpPredicate(MIs["
<< InsnID << "]->getOperand(" << OpIdx
<< "), Value=" << Value << ")\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
MachineOperand &MO = State.MIs[InsnID]->getOperand(OpIdx);
if (!MO.isPredicate() || MO.getPredicate() != Value)
if (handleReject() == RejectAndGiveUp)
return false;
break;
}
case GIM_CheckIsMBB: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_CheckIsMBB(MIs[" << InsnID
<< "]->getOperand(" << OpIdx << "))\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
if (!State.MIs[InsnID]->getOperand(OpIdx).isMBB()) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_CheckIsImm: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_CheckIsImm(MIs[" << InsnID
<< "]->getOperand(" << OpIdx << "))\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
if (!State.MIs[InsnID]->getOperand(OpIdx).isImm()) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_CheckIsSafeToFold: {
int64_t InsnID = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_CheckIsSafeToFold(MIs["
<< InsnID << "])\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
if (!isObviouslySafeToFold(*State.MIs[InsnID], *State.MIs[0])) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_CheckIsSameOperand: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t OtherInsnID = MatchTable[CurrentIdx++];
int64_t OtherOpIdx = MatchTable[CurrentIdx++];
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_CheckIsSameOperand(MIs["
<< InsnID << "][" << OpIdx << "], MIs["
<< OtherInsnID << "][" << OtherOpIdx << "])\n");
assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
assert(State.MIs[OtherInsnID] != nullptr && "Used insn before defined");
if (!State.MIs[InsnID]->getOperand(OpIdx).isIdenticalTo(
State.MIs[OtherInsnID]->getOperand(OtherOpIdx))) {
if (handleReject() == RejectAndGiveUp)
return false;
}
break;
}
case GIM_Reject:
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIM_Reject\n");
if (handleReject() == RejectAndGiveUp)
return false;
break;
case GIR_MutateOpcode: {
int64_t OldInsnID = MatchTable[CurrentIdx++];
uint64_t NewInsnID = MatchTable[CurrentIdx++];
int64_t NewOpcode = MatchTable[CurrentIdx++];
if (NewInsnID >= OutMIs.size())
OutMIs.resize(NewInsnID + 1);
OutMIs[NewInsnID] = MachineInstrBuilder(*State.MIs[OldInsnID]->getMF(),
State.MIs[OldInsnID]);
OutMIs[NewInsnID]->setDesc(TII.get(NewOpcode));
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIR_MutateOpcode(OutMIs["
<< NewInsnID << "], MIs[" << OldInsnID << "], "
<< NewOpcode << ")\n");
break;
}
case GIR_BuildMI: {
uint64_t NewInsnID = MatchTable[CurrentIdx++];
int64_t Opcode = MatchTable[CurrentIdx++];
if (NewInsnID >= OutMIs.size())
OutMIs.resize(NewInsnID + 1);
OutMIs[NewInsnID] = BuildMI(*State.MIs[0]->getParent(), State.MIs[0],
MIMetadata(*State.MIs[0]), TII.get(Opcode));
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIR_BuildMI(OutMIs["
<< NewInsnID << "], " << Opcode << ")\n");
break;
}
case GIR_Copy: {
int64_t NewInsnID = MatchTable[CurrentIdx++];
int64_t OldInsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
assert(OutMIs[NewInsnID] && "Attempted to add to undefined instruction");
OutMIs[NewInsnID].add(State.MIs[OldInsnID]->getOperand(OpIdx));
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs()
<< CurrentIdx << ": GIR_Copy(OutMIs[" << NewInsnID
<< "], MIs[" << OldInsnID << "], " << OpIdx << ")\n");
break;
}
case GIR_CopyOrAddZeroReg: {
int64_t NewInsnID = MatchTable[CurrentIdx++];
int64_t OldInsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t ZeroReg = MatchTable[CurrentIdx++];
assert(OutMIs[NewInsnID] && "Attempted to add to undefined instruction");
MachineOperand &MO = State.MIs[OldInsnID]->getOperand(OpIdx);
if (isOperandImmEqual(MO, 0, MRI))
OutMIs[NewInsnID].addReg(ZeroReg);
else
OutMIs[NewInsnID].add(MO);
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIR_CopyOrAddZeroReg(OutMIs["
<< NewInsnID << "], MIs[" << OldInsnID << "], "
<< OpIdx << ", " << ZeroReg << ")\n");
break;
}
case GIR_CopySubReg: {
int64_t NewInsnID = MatchTable[CurrentIdx++];
int64_t OldInsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t SubRegIdx = MatchTable[CurrentIdx++];
assert(OutMIs[NewInsnID] && "Attempted to add to undefined instruction");
OutMIs[NewInsnID].addReg(State.MIs[OldInsnID]->getOperand(OpIdx).getReg(),
0, SubRegIdx);
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIR_CopySubReg(OutMIs["
<< NewInsnID << "], MIs[" << OldInsnID << "], "
<< OpIdx << ", " << SubRegIdx << ")\n");
break;
}
case GIR_AddImplicitDef: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t RegNum = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
OutMIs[InsnID].addDef(RegNum, RegState::Implicit);
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIR_AddImplicitDef(OutMIs["
<< InsnID << "], " << RegNum << ")\n");
break;
}
case GIR_AddImplicitUse: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t RegNum = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
OutMIs[InsnID].addUse(RegNum, RegState::Implicit);
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIR_AddImplicitUse(OutMIs["
<< InsnID << "], " << RegNum << ")\n");
break;
}
case GIR_AddRegister: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t RegNum = MatchTable[CurrentIdx++];
uint64_t RegFlags = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
OutMIs[InsnID].addReg(RegNum, RegFlags);
DEBUG_WITH_TYPE(
TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIR_AddRegister(OutMIs["
<< InsnID << "], " << RegNum << ", " << RegFlags << ")\n");
break;
}
case GIR_AddTempRegister:
case GIR_AddTempSubRegister: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t TempRegID = MatchTable[CurrentIdx++];
uint64_t TempRegFlags = MatchTable[CurrentIdx++];
unsigned SubReg = 0;
if (MatcherOpcode == GIR_AddTempSubRegister)
SubReg = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
OutMIs[InsnID].addReg(State.TempRegisters[TempRegID], TempRegFlags, SubReg);
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIR_AddTempRegister(OutMIs["
<< InsnID << "], TempRegisters[" << TempRegID
<< "]";
if (SubReg)
dbgs() << '.' << TRI.getSubRegIndexName(SubReg);
dbgs() << ", " << TempRegFlags << ")\n");
break;
}
case GIR_AddImm: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t Imm = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
OutMIs[InsnID].addImm(Imm);
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIR_AddImm(OutMIs[" << InsnID
<< "], " << Imm << ")\n");
break;
}
case GIR_ComplexRenderer: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t RendererID = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
for (const auto &RenderOpFn : State.Renderers[RendererID])
RenderOpFn(OutMIs[InsnID]);
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIR_ComplexRenderer(OutMIs["
<< InsnID << "], " << RendererID << ")\n");
break;
}
case GIR_ComplexSubOperandRenderer: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t RendererID = MatchTable[CurrentIdx++];
int64_t RenderOpID = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
State.Renderers[RendererID][RenderOpID](OutMIs[InsnID]);
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx
<< ": GIR_ComplexSubOperandRenderer(OutMIs["
<< InsnID << "], " << RendererID << ", "
<< RenderOpID << ")\n");
break;
}
case GIR_CopyConstantAsSImm: {
int64_t NewInsnID = MatchTable[CurrentIdx++];
int64_t OldInsnID = MatchTable[CurrentIdx++];
assert(OutMIs[NewInsnID] && "Attempted to add to undefined instruction");
assert(State.MIs[OldInsnID]->getOpcode() == TargetOpcode::G_CONSTANT && "Expected G_CONSTANT");
if (State.MIs[OldInsnID]->getOperand(1).isCImm()) {
OutMIs[NewInsnID].addImm(
State.MIs[OldInsnID]->getOperand(1).getCImm()->getSExtValue());
} else if (State.MIs[OldInsnID]->getOperand(1).isImm())
OutMIs[NewInsnID].add(State.MIs[OldInsnID]->getOperand(1));
else
llvm_unreachable("Expected Imm or CImm operand");
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIR_CopyConstantAsSImm(OutMIs["
<< NewInsnID << "], MIs[" << OldInsnID << "])\n");
break;
}
// TODO: Needs a test case once we have a pattern that uses this.
case GIR_CopyFConstantAsFPImm: {
int64_t NewInsnID = MatchTable[CurrentIdx++];
int64_t OldInsnID = MatchTable[CurrentIdx++];
assert(OutMIs[NewInsnID] && "Attempted to add to undefined instruction");
assert(State.MIs[OldInsnID]->getOpcode() == TargetOpcode::G_FCONSTANT && "Expected G_FCONSTANT");
if (State.MIs[OldInsnID]->getOperand(1).isFPImm())
OutMIs[NewInsnID].addFPImm(
State.MIs[OldInsnID]->getOperand(1).getFPImm());
else
llvm_unreachable("Expected FPImm operand");
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIR_CopyFPConstantAsFPImm(OutMIs["
<< NewInsnID << "], MIs[" << OldInsnID << "])\n");
break;
}
case GIR_CustomRenderer: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OldInsnID = MatchTable[CurrentIdx++];
int64_t RendererFnID = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIR_CustomRenderer(OutMIs["
<< InsnID << "], MIs[" << OldInsnID << "], "
<< RendererFnID << ")\n");
(ISel.*ISelInfo.CustomRenderers[RendererFnID])(
OutMIs[InsnID], *State.MIs[OldInsnID],
-1); // Not a source operand of the old instruction.
break;
}
case GIR_CustomOperandRenderer: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OldInsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t RendererFnID = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
DEBUG_WITH_TYPE(
TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIR_CustomOperandRenderer(OutMIs["
<< InsnID << "], MIs[" << OldInsnID << "]->getOperand("
<< OpIdx << "), "
<< RendererFnID << ")\n");
(ISel.*ISelInfo.CustomRenderers[RendererFnID])(OutMIs[InsnID],
*State.MIs[OldInsnID],
OpIdx);
break;
}
case GIR_ConstrainOperandRC: {
int64_t InsnID = MatchTable[CurrentIdx++];
int64_t OpIdx = MatchTable[CurrentIdx++];
int64_t RCEnum = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
MachineInstr &I = *OutMIs[InsnID].getInstr();
MachineFunction &MF = *I.getParent()->getParent();
MachineRegisterInfo &MRI = MF.getRegInfo();
const TargetRegisterClass &RC = *TRI.getRegClass(RCEnum);
MachineOperand &MO = I.getOperand(OpIdx);
constrainOperandRegClass(MF, TRI, MRI, TII, RBI, I, RC, MO);
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIR_ConstrainOperandRC(OutMIs["
<< InsnID << "], " << OpIdx << ", " << RCEnum
<< ")\n");
break;
}
case GIR_ConstrainSelectedInstOperands: {
int64_t InsnID = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
constrainSelectedInstRegOperands(*OutMIs[InsnID].getInstr(), TII, TRI,
RBI);
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx
<< ": GIR_ConstrainSelectedInstOperands(OutMIs["
<< InsnID << "])\n");
break;
}
case GIR_MergeMemOperands: {
int64_t InsnID = MatchTable[CurrentIdx++];
assert(OutMIs[InsnID] && "Attempted to add to undefined instruction");
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIR_MergeMemOperands(OutMIs["
<< InsnID << "]");
int64_t MergeInsnID = GIU_MergeMemOperands_EndOfList;
while ((MergeInsnID = MatchTable[CurrentIdx++]) !=
GIU_MergeMemOperands_EndOfList) {
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << ", MIs[" << MergeInsnID << "]");
for (const auto &MMO : State.MIs[MergeInsnID]->memoperands())
OutMIs[InsnID].addMemOperand(MMO);
}
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(), dbgs() << ")\n");
break;
}
case GIR_EraseFromParent: {
int64_t InsnID = MatchTable[CurrentIdx++];
assert(State.MIs[InsnID] &&
"Attempted to erase an undefined instruction");
State.MIs[InsnID]->eraseFromParent();
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIR_EraseFromParent(MIs["
<< InsnID << "])\n");
break;
}
case GIR_MakeTempReg: {
int64_t TempRegID = MatchTable[CurrentIdx++];
int64_t TypeID = MatchTable[CurrentIdx++];
State.TempRegisters[TempRegID] =
MRI.createGenericVirtualRegister(ISelInfo.TypeObjects[TypeID]);
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": TempRegs[" << TempRegID
<< "] = GIR_MakeTempReg(" << TypeID << ")\n");
break;
}
case GIR_Coverage: {
int64_t RuleID = MatchTable[CurrentIdx++];
CoverageInfo.setCovered(RuleID);
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs()
<< CurrentIdx << ": GIR_Coverage(" << RuleID << ")");
break;
}
case GIR_Done:
DEBUG_WITH_TYPE(TgtInstructionSelector::getName(),
dbgs() << CurrentIdx << ": GIR_Done\n");
propagateFlags(OutMIs);
return true;
default:
llvm_unreachable("Unexpected command");
}
}
}
} // end namespace llvm
#endif // LLVM_CODEGEN_GLOBALISEL_INSTRUCTIONSELECTORIMPL_H
PK iwFZ�$��P
P
CodeGen/GlobalISel/Legalizer.hnu �[��� //== llvm/CodeGen/GlobalISel/Legalizer.h ---------------- -*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file A pass to convert the target-illegal operations created by IR -> MIR
/// translation into ones the target expects to be able to select. This may
/// occur in multiple phases, for example G_ADD <2 x i8> -> G_ADD <2 x i16> ->
/// G_ADD <4 x i16>.
///
/// The LegalizeHelper class is where most of the work happens, and is designed
/// to be callable from other passes that find themselves with an illegal
/// instruction.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_LEGALIZER_H
#define LLVM_CODEGEN_GLOBALISEL_LEGALIZER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/GlobalISel/GISelKnownBits.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
namespace llvm {
class LegalizerInfo;
class MachineIRBuilder;
class MachineInstr;
class GISelChangeObserver;
class LostDebugLocObserver;
class Legalizer : public MachineFunctionPass {
public:
static char ID;
struct MFResult {
bool Changed;
const MachineInstr *FailedOn;
};
private:
/// Initialize the field members using \p MF.
void init(MachineFunction &MF);
public:
// Ctor, nothing fancy.
Legalizer();
StringRef getPassName() const override { return "Legalizer"; }
void getAnalysisUsage(AnalysisUsage &AU) const override;
MachineFunctionProperties getRequiredProperties() const override {
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::IsSSA);
}
MachineFunctionProperties getSetProperties() const override {
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::Legalized);
}
MachineFunctionProperties getClearedProperties() const override {
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::NoPHIs);
}
bool runOnMachineFunction(MachineFunction &MF) override;
static MFResult
legalizeMachineFunction(MachineFunction &MF, const LegalizerInfo &LI,
ArrayRef<GISelChangeObserver *> AuxObservers,
LostDebugLocObserver &LocObserver,
MachineIRBuilder &MIRBuilder, GISelKnownBits *KB);
};
} // End namespace llvm.
#endif
PK iwFZ�! �.� .� 1 CodeGen/GlobalISel/LegalizationArtifactCombiner.hnu �[��� //===-- llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h -----*- C++ -*-//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// This file contains some helper functions which try to cleanup artifacts
// such as G_TRUNCs/G_[ZSA]EXTENDS that were created during legalization to make
// the types match. This file also contains some combines of merges that happens
// at the end of the legalization.
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_LEGALIZATIONARTIFACTCOMBINER_H
#define LLVM_CODEGEN_GLOBALISEL_LEGALIZATIONARTIFACTCOMBINER_H
#include "llvm/ADT/SmallBitVector.h"
#include "llvm/CodeGen/GlobalISel/GISelChangeObserver.h"
#include "llvm/CodeGen/GlobalISel/GenericMachineInstrs.h"
#include "llvm/CodeGen/GlobalISel/Legalizer.h"
#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
#include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
#include "llvm/CodeGen/GlobalISel/Utils.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Register.h"
#include "llvm/IR/Constants.h"
#include "llvm/Support/Debug.h"
#define DEBUG_TYPE "legalizer"
namespace llvm {
class LegalizationArtifactCombiner {
MachineIRBuilder &Builder;
MachineRegisterInfo &MRI;
const LegalizerInfo &LI;
static bool isArtifactCast(unsigned Opc) {
switch (Opc) {
case TargetOpcode::G_TRUNC:
case TargetOpcode::G_SEXT:
case TargetOpcode::G_ZEXT:
case TargetOpcode::G_ANYEXT:
return true;
default:
return false;
}
}
public:
LegalizationArtifactCombiner(MachineIRBuilder &B, MachineRegisterInfo &MRI,
const LegalizerInfo &LI)
: Builder(B), MRI(MRI), LI(LI) {}
bool tryCombineAnyExt(MachineInstr &MI,
SmallVectorImpl<MachineInstr *> &DeadInsts,
SmallVectorImpl<Register> &UpdatedDefs,
GISelObserverWrapper &Observer) {
using namespace llvm::MIPatternMatch;
assert(MI.getOpcode() == TargetOpcode::G_ANYEXT);
Builder.setInstrAndDebugLoc(MI);
Register DstReg = MI.getOperand(0).getReg();
Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg());
// aext(trunc x) - > aext/copy/trunc x
Register TruncSrc;
if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(TruncSrc)))) {
LLVM_DEBUG(dbgs() << ".. Combine MI: " << MI;);
if (MRI.getType(DstReg) == MRI.getType(TruncSrc))
replaceRegOrBuildCopy(DstReg, TruncSrc, MRI, Builder, UpdatedDefs,
Observer);
else
Builder.buildAnyExtOrTrunc(DstReg, TruncSrc);
UpdatedDefs.push_back(DstReg);
markInstAndDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts);
return true;
}
// aext([asz]ext x) -> [asz]ext x
Register ExtSrc;
MachineInstr *ExtMI;
if (mi_match(SrcReg, MRI,
m_all_of(m_MInstr(ExtMI), m_any_of(m_GAnyExt(m_Reg(ExtSrc)),
m_GSExt(m_Reg(ExtSrc)),
m_GZExt(m_Reg(ExtSrc)))))) {
Builder.buildInstr(ExtMI->getOpcode(), {DstReg}, {ExtSrc});
UpdatedDefs.push_back(DstReg);
markInstAndDefDead(MI, *ExtMI, DeadInsts);
return true;
}
// Try to fold aext(g_constant) when the larger constant type is legal.
auto *SrcMI = MRI.getVRegDef(SrcReg);
if (SrcMI->getOpcode() == TargetOpcode::G_CONSTANT) {
const LLT DstTy = MRI.getType(DstReg);
if (isInstLegal({TargetOpcode::G_CONSTANT, {DstTy}})) {
auto &CstVal = SrcMI->getOperand(1);
Builder.buildConstant(
DstReg, CstVal.getCImm()->getValue().sext(DstTy.getSizeInBits()));
UpdatedDefs.push_back(DstReg);
markInstAndDefDead(MI, *SrcMI, DeadInsts);
return true;
}
}
return tryFoldImplicitDef(MI, DeadInsts, UpdatedDefs);
}
bool tryCombineZExt(MachineInstr &MI,
SmallVectorImpl<MachineInstr *> &DeadInsts,
SmallVectorImpl<Register> &UpdatedDefs,
GISelObserverWrapper &Observer) {
using namespace llvm::MIPatternMatch;
assert(MI.getOpcode() == TargetOpcode::G_ZEXT);
Builder.setInstrAndDebugLoc(MI);
Register DstReg = MI.getOperand(0).getReg();
Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg());
// zext(trunc x) - > and (aext/copy/trunc x), mask
// zext(sext x) -> and (sext x), mask
Register TruncSrc;
Register SextSrc;
if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(TruncSrc))) ||
mi_match(SrcReg, MRI, m_GSExt(m_Reg(SextSrc)))) {
LLT DstTy = MRI.getType(DstReg);
if (isInstUnsupported({TargetOpcode::G_AND, {DstTy}}) ||
isConstantUnsupported(DstTy))
return false;
LLVM_DEBUG(dbgs() << ".. Combine MI: " << MI;);
LLT SrcTy = MRI.getType(SrcReg);
APInt MaskVal = APInt::getAllOnes(SrcTy.getScalarSizeInBits());
auto Mask = Builder.buildConstant(
DstTy, MaskVal.zext(DstTy.getScalarSizeInBits()));
if (SextSrc && (DstTy != MRI.getType(SextSrc)))
SextSrc = Builder.buildSExtOrTrunc(DstTy, SextSrc).getReg(0);
if (TruncSrc && (DstTy != MRI.getType(TruncSrc)))
TruncSrc = Builder.buildAnyExtOrTrunc(DstTy, TruncSrc).getReg(0);
Builder.buildAnd(DstReg, SextSrc ? SextSrc : TruncSrc, Mask);
markInstAndDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts);
return true;
}
// zext(zext x) -> (zext x)
Register ZextSrc;
if (mi_match(SrcReg, MRI, m_GZExt(m_Reg(ZextSrc)))) {
LLVM_DEBUG(dbgs() << ".. Combine MI: " << MI);
Observer.changingInstr(MI);
MI.getOperand(1).setReg(ZextSrc);
Observer.changedInstr(MI);
UpdatedDefs.push_back(DstReg);
markDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts);
return true;
}
// Try to fold zext(g_constant) when the larger constant type is legal.
auto *SrcMI = MRI.getVRegDef(SrcReg);
if (SrcMI->getOpcode() == TargetOpcode::G_CONSTANT) {
const LLT DstTy = MRI.getType(DstReg);
if (isInstLegal({TargetOpcode::G_CONSTANT, {DstTy}})) {
auto &CstVal = SrcMI->getOperand(1);
Builder.buildConstant(
DstReg, CstVal.getCImm()->getValue().zext(DstTy.getSizeInBits()));
UpdatedDefs.push_back(DstReg);
markInstAndDefDead(MI, *SrcMI, DeadInsts);
return true;
}
}
return tryFoldImplicitDef(MI, DeadInsts, UpdatedDefs);
}
bool tryCombineSExt(MachineInstr &MI,
SmallVectorImpl<MachineInstr *> &DeadInsts,
SmallVectorImpl<Register> &UpdatedDefs) {
using namespace llvm::MIPatternMatch;
assert(MI.getOpcode() == TargetOpcode::G_SEXT);
Builder.setInstrAndDebugLoc(MI);
Register DstReg = MI.getOperand(0).getReg();
Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg());
// sext(trunc x) - > (sext_inreg (aext/copy/trunc x), c)
Register TruncSrc;
if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(TruncSrc)))) {
LLT DstTy = MRI.getType(DstReg);
if (isInstUnsupported({TargetOpcode::G_SEXT_INREG, {DstTy}}))
return false;
LLVM_DEBUG(dbgs() << ".. Combine MI: " << MI;);
LLT SrcTy = MRI.getType(SrcReg);
uint64_t SizeInBits = SrcTy.getScalarSizeInBits();
if (DstTy != MRI.getType(TruncSrc))
TruncSrc = Builder.buildAnyExtOrTrunc(DstTy, TruncSrc).getReg(0);
Builder.buildSExtInReg(DstReg, TruncSrc, SizeInBits);
markInstAndDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts);
return true;
}
// sext(zext x) -> (zext x)
// sext(sext x) -> (sext x)
Register ExtSrc;
MachineInstr *ExtMI;
if (mi_match(SrcReg, MRI,
m_all_of(m_MInstr(ExtMI), m_any_of(m_GZExt(m_Reg(ExtSrc)),
m_GSExt(m_Reg(ExtSrc)))))) {
LLVM_DEBUG(dbgs() << ".. Combine MI: " << MI);
Builder.buildInstr(ExtMI->getOpcode(), {DstReg}, {ExtSrc});
UpdatedDefs.push_back(DstReg);
markInstAndDefDead(MI, *MRI.getVRegDef(SrcReg), DeadInsts);
return true;
}
// Try to fold sext(g_constant) when the larger constant type is legal.
auto *SrcMI = MRI.getVRegDef(SrcReg);
if (SrcMI->getOpcode() == TargetOpcode::G_CONSTANT) {
const LLT DstTy = MRI.getType(DstReg);
if (isInstLegal({TargetOpcode::G_CONSTANT, {DstTy}})) {
auto &CstVal = SrcMI->getOperand(1);
Builder.buildConstant(
DstReg, CstVal.getCImm()->getValue().sext(DstTy.getSizeInBits()));
UpdatedDefs.push_back(DstReg);
markInstAndDefDead(MI, *SrcMI, DeadInsts);
return true;
}
}
return tryFoldImplicitDef(MI, DeadInsts, UpdatedDefs);
}
bool tryCombineTrunc(MachineInstr &MI,
SmallVectorImpl<MachineInstr *> &DeadInsts,
SmallVectorImpl<Register> &UpdatedDefs,
GISelObserverWrapper &Observer) {
using namespace llvm::MIPatternMatch;
assert(MI.getOpcode() == TargetOpcode::G_TRUNC);
Builder.setInstr(MI);
Register DstReg = MI.getOperand(0).getReg();
Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg());
// Try to fold trunc(g_constant) when the smaller constant type is legal.
auto *SrcMI = MRI.getVRegDef(SrcReg);
if (SrcMI->getOpcode() == TargetOpcode::G_CONSTANT) {
const LLT DstTy = MRI.getType(DstReg);
if (isInstLegal({TargetOpcode::G_CONSTANT, {DstTy}})) {
auto &CstVal = SrcMI->getOperand(1);
Builder.buildConstant(
DstReg, CstVal.getCImm()->getValue().trunc(DstTy.getSizeInBits()));
UpdatedDefs.push_back(DstReg);
markInstAndDefDead(MI, *SrcMI, DeadInsts);
return true;
}
}
// Try to fold trunc(merge) to directly use the source of the merge.
// This gets rid of large, difficult to legalize, merges
if (auto *SrcMerge = dyn_cast<GMerge>(SrcMI)) {
const Register MergeSrcReg = SrcMerge->getSourceReg(0);
const LLT MergeSrcTy = MRI.getType(MergeSrcReg);
const LLT DstTy = MRI.getType(DstReg);
// We can only fold if the types are scalar
const unsigned DstSize = DstTy.getSizeInBits();
const unsigned MergeSrcSize = MergeSrcTy.getSizeInBits();
if (!DstTy.isScalar() || !MergeSrcTy.isScalar())
return false;
if (DstSize < MergeSrcSize) {
// When the merge source is larger than the destination, we can just
// truncate the merge source directly
if (isInstUnsupported({TargetOpcode::G_TRUNC, {DstTy, MergeSrcTy}}))
return false;
LLVM_DEBUG(dbgs() << "Combining G_TRUNC(G_MERGE_VALUES) to G_TRUNC: "
<< MI);
Builder.buildTrunc(DstReg, MergeSrcReg);
UpdatedDefs.push_back(DstReg);
} else if (DstSize == MergeSrcSize) {
// If the sizes match we can simply try to replace the register
LLVM_DEBUG(
dbgs() << "Replacing G_TRUNC(G_MERGE_VALUES) with merge input: "
<< MI);
replaceRegOrBuildCopy(DstReg, MergeSrcReg, MRI, Builder, UpdatedDefs,
Observer);
} else if (DstSize % MergeSrcSize == 0) {
// If the trunc size is a multiple of the merge source size we can use
// a smaller merge instead
if (isInstUnsupported(
{TargetOpcode::G_MERGE_VALUES, {DstTy, MergeSrcTy}}))
return false;
LLVM_DEBUG(
dbgs() << "Combining G_TRUNC(G_MERGE_VALUES) to G_MERGE_VALUES: "
<< MI);
const unsigned NumSrcs = DstSize / MergeSrcSize;
assert(NumSrcs < SrcMI->getNumOperands() - 1 &&
"trunc(merge) should require less inputs than merge");
SmallVector<Register, 8> SrcRegs(NumSrcs);
for (unsigned i = 0; i < NumSrcs; ++i)
SrcRegs[i] = SrcMerge->getSourceReg(i);
Builder.buildMergeValues(DstReg, SrcRegs);
UpdatedDefs.push_back(DstReg);
} else {
// Unable to combine
return false;
}
markInstAndDefDead(MI, *SrcMerge, DeadInsts);
return true;
}
// trunc(trunc) -> trunc
Register TruncSrc;
if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(TruncSrc)))) {
// Always combine trunc(trunc) since the eventual resulting trunc must be
// legal anyway as it must be legal for all outputs of the consumer type
// set.
LLVM_DEBUG(dbgs() << ".. Combine G_TRUNC(G_TRUNC): " << MI);
Builder.buildTrunc(DstReg, TruncSrc);
UpdatedDefs.push_back(DstReg);
markInstAndDefDead(MI, *MRI.getVRegDef(TruncSrc), DeadInsts);
return true;
}
return false;
}
/// Try to fold G_[ASZ]EXT (G_IMPLICIT_DEF).
bool tryFoldImplicitDef(MachineInstr &MI,
SmallVectorImpl<MachineInstr *> &DeadInsts,
SmallVectorImpl<Register> &UpdatedDefs) {
unsigned Opcode = MI.getOpcode();
assert(Opcode == TargetOpcode::G_ANYEXT || Opcode == TargetOpcode::G_ZEXT ||
Opcode == TargetOpcode::G_SEXT);
if (MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF,
MI.getOperand(1).getReg(), MRI)) {
Builder.setInstr(MI);
Register DstReg = MI.getOperand(0).getReg();
LLT DstTy = MRI.getType(DstReg);
if (Opcode == TargetOpcode::G_ANYEXT) {
// G_ANYEXT (G_IMPLICIT_DEF) -> G_IMPLICIT_DEF
if (!isInstLegal({TargetOpcode::G_IMPLICIT_DEF, {DstTy}}))
return false;
LLVM_DEBUG(dbgs() << ".. Combine G_ANYEXT(G_IMPLICIT_DEF): " << MI;);
Builder.buildInstr(TargetOpcode::G_IMPLICIT_DEF, {DstReg}, {});
UpdatedDefs.push_back(DstReg);
} else {
// G_[SZ]EXT (G_IMPLICIT_DEF) -> G_CONSTANT 0 because the top
// bits will be 0 for G_ZEXT and 0/1 for the G_SEXT.
if (isConstantUnsupported(DstTy))
return false;
LLVM_DEBUG(dbgs() << ".. Combine G_[SZ]EXT(G_IMPLICIT_DEF): " << MI;);
Builder.buildConstant(DstReg, 0);
UpdatedDefs.push_back(DstReg);
}
markInstAndDefDead(MI, *DefMI, DeadInsts);
return true;
}
return false;
}
bool tryFoldUnmergeCast(MachineInstr &MI, MachineInstr &CastMI,
SmallVectorImpl<MachineInstr *> &DeadInsts,
SmallVectorImpl<Register> &UpdatedDefs) {
assert(MI.getOpcode() == TargetOpcode::G_UNMERGE_VALUES);
const unsigned CastOpc = CastMI.getOpcode();
if (!isArtifactCast(CastOpc))
return false;
const unsigned NumDefs = MI.getNumOperands() - 1;
const Register CastSrcReg = CastMI.getOperand(1).getReg();
const LLT CastSrcTy = MRI.getType(CastSrcReg);
const LLT DestTy = MRI.getType(MI.getOperand(0).getReg());
const LLT SrcTy = MRI.getType(MI.getOperand(NumDefs).getReg());
const unsigned CastSrcSize = CastSrcTy.getSizeInBits();
const unsigned DestSize = DestTy.getSizeInBits();
if (CastOpc == TargetOpcode::G_TRUNC) {
if (SrcTy.isVector() && SrcTy.getScalarType() == DestTy.getScalarType()) {
// %1:_(<4 x s8>) = G_TRUNC %0(<4 x s32>)
// %2:_(s8), %3:_(s8), %4:_(s8), %5:_(s8) = G_UNMERGE_VALUES %1
// =>
// %6:_(s32), %7:_(s32), %8:_(s32), %9:_(s32) = G_UNMERGE_VALUES %0
// %2:_(s8) = G_TRUNC %6
// %3:_(s8) = G_TRUNC %7
// %4:_(s8) = G_TRUNC %8
// %5:_(s8) = G_TRUNC %9
unsigned UnmergeNumElts =
DestTy.isVector() ? CastSrcTy.getNumElements() / NumDefs : 1;
LLT UnmergeTy = CastSrcTy.changeElementCount(
ElementCount::getFixed(UnmergeNumElts));
if (isInstUnsupported(
{TargetOpcode::G_UNMERGE_VALUES, {UnmergeTy, CastSrcTy}}))
return false;
Builder.setInstr(MI);
auto NewUnmerge = Builder.buildUnmerge(UnmergeTy, CastSrcReg);
for (unsigned I = 0; I != NumDefs; ++I) {
Register DefReg = MI.getOperand(I).getReg();
UpdatedDefs.push_back(DefReg);
Builder.buildTrunc(DefReg, NewUnmerge.getReg(I));
}
markInstAndDefDead(MI, CastMI, DeadInsts);
return true;
}
if (CastSrcTy.isScalar() && SrcTy.isScalar() && !DestTy.isVector()) {
// %1:_(s16) = G_TRUNC %0(s32)
// %2:_(s8), %3:_(s8) = G_UNMERGE_VALUES %1
// =>
// %2:_(s8), %3:_(s8), %4:_(s8), %5:_(s8) = G_UNMERGE_VALUES %0
// Unmerge(trunc) can be combined if the trunc source size is a multiple
// of the unmerge destination size
if (CastSrcSize % DestSize != 0)
return false;
// Check if the new unmerge is supported
if (isInstUnsupported(
{TargetOpcode::G_UNMERGE_VALUES, {DestTy, CastSrcTy}}))
return false;
// Gather the original destination registers and create new ones for the
// unused bits
const unsigned NewNumDefs = CastSrcSize / DestSize;
SmallVector<Register, 8> DstRegs(NewNumDefs);
for (unsigned Idx = 0; Idx < NewNumDefs; ++Idx) {
if (Idx < NumDefs)
DstRegs[Idx] = MI.getOperand(Idx).getReg();
else
DstRegs[Idx] = MRI.createGenericVirtualRegister(DestTy);
}
// Build new unmerge
Builder.setInstr(MI);
Builder.buildUnmerge(DstRegs, CastSrcReg);
UpdatedDefs.append(DstRegs.begin(), DstRegs.begin() + NewNumDefs);
markInstAndDefDead(MI, CastMI, DeadInsts);
return true;
}
}
// TODO: support combines with other casts as well
return false;
}
static bool canFoldMergeOpcode(unsigned MergeOp, unsigned ConvertOp,
LLT OpTy, LLT DestTy) {
// Check if we found a definition that is like G_MERGE_VALUES.
switch (MergeOp) {
default:
return false;
case TargetOpcode::G_BUILD_VECTOR:
case TargetOpcode::G_MERGE_VALUES:
// The convert operation that we will need to insert is
// going to convert the input of that type of instruction (scalar)
// to the destination type (DestTy).
// The conversion needs to stay in the same domain (scalar to scalar
// and vector to vector), so if we were to allow to fold the merge
// we would need to insert some bitcasts.
// E.g.,
// <2 x s16> = build_vector s16, s16
// <2 x s32> = zext <2 x s16>
// <2 x s16>, <2 x s16> = unmerge <2 x s32>
//
// As is the folding would produce:
// <2 x s16> = zext s16 <-- scalar to vector
// <2 x s16> = zext s16 <-- scalar to vector
// Which is invalid.
// Instead we would want to generate:
// s32 = zext s16
// <2 x s16> = bitcast s32
// s32 = zext s16
// <2 x s16> = bitcast s32
//
// That is not done yet.
if (ConvertOp == 0)
return true;
return !DestTy.isVector() && OpTy.isVector() &&
DestTy == OpTy.getElementType();
case TargetOpcode::G_CONCAT_VECTORS: {
if (ConvertOp == 0)
return true;
if (!DestTy.isVector())
return false;
const unsigned OpEltSize = OpTy.getElementType().getSizeInBits();
// Don't handle scalarization with a cast that isn't in the same
// direction as the vector cast. This could be handled, but it would
// require more intermediate unmerges.
if (ConvertOp == TargetOpcode::G_TRUNC)
return DestTy.getSizeInBits() <= OpEltSize;
return DestTy.getSizeInBits() >= OpEltSize;
}
}
}
/// Try to replace DstReg with SrcReg or build a COPY instruction
/// depending on the register constraints.
static void replaceRegOrBuildCopy(Register DstReg, Register SrcReg,
MachineRegisterInfo &MRI,
MachineIRBuilder &Builder,
SmallVectorImpl<Register> &UpdatedDefs,
GISelChangeObserver &Observer) {
if (!llvm::canReplaceReg(DstReg, SrcReg, MRI)) {
Builder.buildCopy(DstReg, SrcReg);
UpdatedDefs.push_back(DstReg);
return;
}
SmallVector<MachineInstr *, 4> UseMIs;
// Get the users and notify the observer before replacing.
for (auto &UseMI : MRI.use_instructions(DstReg)) {
UseMIs.push_back(&UseMI);
Observer.changingInstr(UseMI);
}
// Replace the registers.
MRI.replaceRegWith(DstReg, SrcReg);
UpdatedDefs.push_back(SrcReg);
// Notify the observer that we changed the instructions.
for (auto *UseMI : UseMIs)
Observer.changedInstr(*UseMI);
}
/// Return the operand index in \p MI that defines \p Def
static unsigned getDefIndex(const MachineInstr &MI, Register SearchDef) {
unsigned DefIdx = 0;
for (const MachineOperand &Def : MI.defs()) {
if (Def.getReg() == SearchDef)
break;
++DefIdx;
}
return DefIdx;
}
/// This class provides utilities for finding source registers of specific
/// bit ranges in an artifact. The routines can look through the source
/// registers if they're other artifacts to try to find a non-artifact source
/// of a value.
class ArtifactValueFinder {
MachineRegisterInfo &MRI;
MachineIRBuilder &MIB;
const LegalizerInfo &LI;
// Stores the best register found in the current query so far.
Register CurrentBest = Register();
/// Given an concat_vector op \p Concat and a start bit and size, try to
/// find the origin of the value defined by that start position and size.
///
/// \returns a register with the requested size, or the current best
/// register found during the current query.
Register findValueFromConcat(GConcatVectors &Concat, unsigned StartBit,
unsigned Size) {
assert(Size > 0);
// Find the source operand that provides the bits requested.
Register Src1Reg = Concat.getSourceReg(0);
unsigned SrcSize = MRI.getType(Src1Reg).getSizeInBits();
// Operand index of the source that provides the start of the bit range.
unsigned StartSrcIdx = (StartBit / SrcSize) + 1;
// Offset into the source at which the bit range starts.
unsigned InRegOffset = StartBit % SrcSize;
// Check that the bits don't span multiple sources.
// FIXME: we might be able return multiple sources? Or create an
// appropriate concat to make it fit.
if (InRegOffset + Size > SrcSize)
return CurrentBest;
Register SrcReg = Concat.getReg(StartSrcIdx);
if (InRegOffset == 0 && Size == SrcSize) {
CurrentBest = SrcReg;
return findValueFromDefImpl(SrcReg, 0, Size);
}
return findValueFromDefImpl(SrcReg, InRegOffset, Size);
}
/// Given an build_vector op \p BV and a start bit and size, try to find
/// the origin of the value defined by that start position and size.
///
/// \returns a register with the requested size, or the current best
/// register found during the current query.
Register findValueFromBuildVector(GBuildVector &BV, unsigned StartBit,
unsigned Size) {
assert(Size > 0);
// Find the source operand that provides the bits requested.
Register Src1Reg = BV.getSourceReg(0);
unsigned SrcSize = MRI.getType(Src1Reg).getSizeInBits();
// Operand index of the source that provides the start of the bit range.
unsigned StartSrcIdx = (StartBit / SrcSize) + 1;
// Offset into the source at which the bit range starts.
unsigned InRegOffset = StartBit % SrcSize;
if (InRegOffset != 0)
return CurrentBest; // Give up, bits don't start at a scalar source.
if (Size < SrcSize)
return CurrentBest; // Scalar source is too large for requested bits.
// If the bits cover multiple sources evenly, then create a new
// build_vector to synthesize the required size, if that's been requested.
if (Size > SrcSize) {
if (Size % SrcSize > 0)
return CurrentBest; // Isn't covered exactly by sources.
unsigned NumSrcsUsed = Size / SrcSize;
// If we're requesting all of the sources, just return this def.
if (NumSrcsUsed == BV.getNumSources())
return BV.getReg(0);
LLT SrcTy = MRI.getType(Src1Reg);
LLT NewBVTy = LLT::fixed_vector(NumSrcsUsed, SrcTy);
// Check if the resulting build vector would be legal.
LegalizeActionStep ActionStep =
LI.getAction({TargetOpcode::G_BUILD_VECTOR, {NewBVTy, SrcTy}});
if (ActionStep.Action != LegalizeActions::Legal)
return CurrentBest;
SmallVector<Register> NewSrcs;
for (unsigned SrcIdx = StartSrcIdx; SrcIdx < StartSrcIdx + NumSrcsUsed;
++SrcIdx)
NewSrcs.push_back(BV.getReg(SrcIdx));
MIB.setInstrAndDebugLoc(BV);
return MIB.buildBuildVector(NewBVTy, NewSrcs).getReg(0);
}
// A single source is requested, just return it.
return BV.getReg(StartSrcIdx);
}
/// Given an G_INSERT op \p MI and a start bit and size, try to find
/// the origin of the value defined by that start position and size.
///
/// \returns a register with the requested size, or the current best
/// register found during the current query.
Register findValueFromInsert(MachineInstr &MI, unsigned StartBit,
unsigned Size) {
assert(MI.getOpcode() == TargetOpcode::G_INSERT);
assert(Size > 0);
Register ContainerSrcReg = MI.getOperand(1).getReg();
Register InsertedReg = MI.getOperand(2).getReg();
LLT InsertedRegTy = MRI.getType(InsertedReg);
unsigned InsertOffset = MI.getOperand(3).getImm();
// There are 4 possible container/insertreg + requested bit-range layouts
// that the instruction and query could be representing.
// For: %_ = G_INSERT %CONTAINER, %INS, InsOff (abbrev. to 'IO')
// and a start bit 'SB', with size S, giving an end bit 'EB', we could
// have...
// Scenario A:
// --------------------------
// | INS | CONTAINER |
// --------------------------
// | |
// SB EB
//
// Scenario B:
// --------------------------
// | INS | CONTAINER |
// --------------------------
// | |
// SB EB
//
// Scenario C:
// --------------------------
// | CONTAINER | INS |
// --------------------------
// | |
// SB EB
//
// Scenario D:
// --------------------------
// | CONTAINER | INS |
// --------------------------
// | |
// SB EB
//
// So therefore, A and D are requesting data from the INS operand, while
// B and C are requesting from the container operand.
unsigned InsertedEndBit = InsertOffset + InsertedRegTy.getSizeInBits();
unsigned EndBit = StartBit + Size;
unsigned NewStartBit;
Register SrcRegToUse;
if (EndBit <= InsertOffset || InsertedEndBit <= StartBit) {
SrcRegToUse = ContainerSrcReg;
NewStartBit = StartBit;
return findValueFromDefImpl(SrcRegToUse, NewStartBit, Size);
}
if (InsertOffset <= StartBit && EndBit <= InsertedEndBit) {
SrcRegToUse = InsertedReg;
NewStartBit = StartBit - InsertOffset;
if (NewStartBit == 0 &&
Size == MRI.getType(SrcRegToUse).getSizeInBits())
CurrentBest = SrcRegToUse;
return findValueFromDefImpl(SrcRegToUse, NewStartBit, Size);
}
// The bit range spans both the inserted and container regions.
return Register();
}
/// Internal implementation for findValueFromDef(). findValueFromDef()
/// initializes some data like the CurrentBest register, which this method
/// and its callees rely upon.
Register findValueFromDefImpl(Register DefReg, unsigned StartBit,
unsigned Size) {
std::optional<DefinitionAndSourceRegister> DefSrcReg =
getDefSrcRegIgnoringCopies(DefReg, MRI);
MachineInstr *Def = DefSrcReg->MI;
DefReg = DefSrcReg->Reg;
// If the instruction has a single def, then simply delegate the search.
// For unmerge however with multiple defs, we need to compute the offset
// into the source of the unmerge.
switch (Def->getOpcode()) {
case TargetOpcode::G_CONCAT_VECTORS:
return findValueFromConcat(cast<GConcatVectors>(*Def), StartBit, Size);
case TargetOpcode::G_UNMERGE_VALUES: {
unsigned DefStartBit = 0;
unsigned DefSize = MRI.getType(DefReg).getSizeInBits();
for (const auto &MO : Def->defs()) {
if (MO.getReg() == DefReg)
break;
DefStartBit += DefSize;
}
Register SrcReg = Def->getOperand(Def->getNumOperands() - 1).getReg();
Register SrcOriginReg =
findValueFromDefImpl(SrcReg, StartBit + DefStartBit, Size);
if (SrcOriginReg)
return SrcOriginReg;
// Failed to find a further value. If the StartBit and Size perfectly
// covered the requested DefReg, return that since it's better than
// nothing.
if (StartBit == 0 && Size == DefSize)
return DefReg;
return CurrentBest;
}
case TargetOpcode::G_BUILD_VECTOR:
return findValueFromBuildVector(cast<GBuildVector>(*Def), StartBit,
Size);
case TargetOpcode::G_INSERT:
return findValueFromInsert(*Def, StartBit, Size);
default:
return CurrentBest;
}
}
public:
ArtifactValueFinder(MachineRegisterInfo &Mri, MachineIRBuilder &Builder,
const LegalizerInfo &Info)
: MRI(Mri), MIB(Builder), LI(Info) {}
/// Try to find a source of the value defined in the def \p DefReg, starting
/// at position \p StartBit with size \p Size.
/// \returns a register with the requested size, or an empty Register if no
/// better value could be found.
Register findValueFromDef(Register DefReg, unsigned StartBit,
unsigned Size) {
CurrentBest = Register();
Register FoundReg = findValueFromDefImpl(DefReg, StartBit, Size);
return FoundReg != DefReg ? FoundReg : Register();
}
/// Try to combine the defs of an unmerge \p MI by attempting to find
/// values that provides the bits for each def reg.
/// \returns true if all the defs of the unmerge have been made dead.
bool tryCombineUnmergeDefs(GUnmerge &MI, GISelChangeObserver &Observer,
SmallVectorImpl<Register> &UpdatedDefs) {
unsigned NumDefs = MI.getNumDefs();
LLT DestTy = MRI.getType(MI.getReg(0));
SmallBitVector DeadDefs(NumDefs);
for (unsigned DefIdx = 0; DefIdx < NumDefs; ++DefIdx) {
Register DefReg = MI.getReg(DefIdx);
if (MRI.use_nodbg_empty(DefReg)) {
DeadDefs[DefIdx] = true;
continue;
}
Register FoundVal = findValueFromDef(DefReg, 0, DestTy.getSizeInBits());
if (!FoundVal)
continue;
if (MRI.getType(FoundVal) != DestTy)
continue;
replaceRegOrBuildCopy(DefReg, FoundVal, MRI, MIB, UpdatedDefs,
Observer);
// We only want to replace the uses, not the def of the old reg.
Observer.changingInstr(MI);
MI.getOperand(DefIdx).setReg(DefReg);
Observer.changedInstr(MI);
DeadDefs[DefIdx] = true;
}
return DeadDefs.all();
}
GUnmerge *findUnmergeThatDefinesReg(Register Reg, unsigned Size,
unsigned &DefOperandIdx) {
if (Register Def = findValueFromDefImpl(Reg, 0, Size)) {
if (auto *Unmerge = dyn_cast<GUnmerge>(MRI.getVRegDef(Def))) {
DefOperandIdx = Unmerge->findRegisterDefOperandIdx(Def);
return Unmerge;
}
}
return nullptr;
}
// Check if sequence of elements from merge-like instruction is defined by
// another sequence of elements defined by unmerge. Most often this is the
// same sequence. Search for elements using findValueFromDefImpl.
bool isSequenceFromUnmerge(GMergeLikeInstr &MI, unsigned MergeStartIdx,
GUnmerge *Unmerge, unsigned UnmergeIdxStart,
unsigned NumElts, unsigned EltSize) {
assert(MergeStartIdx + NumElts <= MI.getNumSources());
for (unsigned i = MergeStartIdx; i < MergeStartIdx + NumElts; ++i) {
unsigned EltUnmergeIdx;
GUnmerge *EltUnmerge = findUnmergeThatDefinesReg(
MI.getSourceReg(i), EltSize, EltUnmergeIdx);
// Check if source i comes from the same Unmerge.
if (!EltUnmerge || EltUnmerge != Unmerge)
return false;
// Check that source i's def has same index in sequence in Unmerge.
if (i - MergeStartIdx != EltUnmergeIdx - UnmergeIdxStart)
return false;
}
return true;
}
bool tryCombineMergeLike(GMergeLikeInstr &MI,
SmallVectorImpl<MachineInstr *> &DeadInsts,
SmallVectorImpl<Register> &UpdatedDefs,
GISelChangeObserver &Observer) {
Register Elt0 = MI.getSourceReg(0);
LLT EltTy = MRI.getType(Elt0);
unsigned EltSize = EltTy.getSizeInBits();
unsigned Elt0UnmergeIdx;
// Search for unmerge that will be candidate for combine.
auto *Unmerge = findUnmergeThatDefinesReg(Elt0, EltSize, Elt0UnmergeIdx);
if (!Unmerge)
return false;
unsigned NumMIElts = MI.getNumSources();
Register Dst = MI.getReg(0);
LLT DstTy = MRI.getType(Dst);
Register UnmergeSrc = Unmerge->getSourceReg();
LLT UnmergeSrcTy = MRI.getType(UnmergeSrc);
// Recognize copy of UnmergeSrc to Dst.
// Unmerge UnmergeSrc and reassemble it using merge-like opcode into Dst.
//
// %0:_(EltTy), %1, ... = G_UNMERGE_VALUES %UnmergeSrc:_(Ty)
// %Dst:_(Ty) = G_merge_like_opcode %0:_(EltTy), %1, ...
//
// %Dst:_(Ty) = COPY %UnmergeSrc:_(Ty)
if ((DstTy == UnmergeSrcTy) && (Elt0UnmergeIdx == 0)) {
if (!isSequenceFromUnmerge(MI, 0, Unmerge, 0, NumMIElts, EltSize))
return false;
replaceRegOrBuildCopy(Dst, UnmergeSrc, MRI, MIB, UpdatedDefs, Observer);
DeadInsts.push_back(&MI);
return true;
}
// Recognize UnmergeSrc that can be unmerged to DstTy directly.
// Types have to be either both vector or both non-vector types.
// Merge-like opcodes are combined one at the time. First one creates new
// unmerge, following should use the same unmerge (builder performs CSE).
//
// %0:_(EltTy), %1, %2, %3 = G_UNMERGE_VALUES %UnmergeSrc:_(UnmergeSrcTy)
// %Dst:_(DstTy) = G_merge_like_opcode %0:_(EltTy), %1
// %AnotherDst:_(DstTy) = G_merge_like_opcode %2:_(EltTy), %3
//
// %Dst:_(DstTy), %AnotherDst = G_UNMERGE_VALUES %UnmergeSrc
if ((DstTy.isVector() == UnmergeSrcTy.isVector()) &&
(Elt0UnmergeIdx % NumMIElts == 0) &&
getCoverTy(UnmergeSrcTy, DstTy) == UnmergeSrcTy) {
if (!isSequenceFromUnmerge(MI, 0, Unmerge, Elt0UnmergeIdx, NumMIElts,
EltSize))
return false;
MIB.setInstrAndDebugLoc(MI);
auto NewUnmerge = MIB.buildUnmerge(DstTy, Unmerge->getSourceReg());
unsigned DstIdx = (Elt0UnmergeIdx * EltSize) / DstTy.getSizeInBits();
replaceRegOrBuildCopy(Dst, NewUnmerge.getReg(DstIdx), MRI, MIB,
UpdatedDefs, Observer);
DeadInsts.push_back(&MI);
return true;
}
// Recognize when multiple unmerged sources with UnmergeSrcTy type
// can be merged into Dst with DstTy type directly.
// Types have to be either both vector or both non-vector types.
// %0:_(EltTy), %1 = G_UNMERGE_VALUES %UnmergeSrc:_(UnmergeSrcTy)
// %2:_(EltTy), %3 = G_UNMERGE_VALUES %AnotherUnmergeSrc:_(UnmergeSrcTy)
// %Dst:_(DstTy) = G_merge_like_opcode %0:_(EltTy), %1, %2, %3
//
// %Dst:_(DstTy) = G_merge_like_opcode %UnmergeSrc, %AnotherUnmergeSrc
if ((DstTy.isVector() == UnmergeSrcTy.isVector()) &&
getCoverTy(DstTy, UnmergeSrcTy) == DstTy) {
SmallVector<Register, 4> ConcatSources;
unsigned NumElts = Unmerge->getNumDefs();
for (unsigned i = 0; i < MI.getNumSources(); i += NumElts) {
unsigned EltUnmergeIdx;
auto *UnmergeI = findUnmergeThatDefinesReg(MI.getSourceReg(i),
EltSize, EltUnmergeIdx);
// All unmerges have to be the same size.
if ((!UnmergeI) || (UnmergeI->getNumDefs() != NumElts) ||
(EltUnmergeIdx != 0))
return false;
if (!isSequenceFromUnmerge(MI, i, UnmergeI, 0, NumElts, EltSize))
return false;
ConcatSources.push_back(UnmergeI->getSourceReg());
}
MIB.setInstrAndDebugLoc(MI);
MIB.buildMergeLikeInstr(Dst, ConcatSources);
DeadInsts.push_back(&MI);
return true;
}
return false;
}
};
bool tryCombineUnmergeValues(GUnmerge &MI,
SmallVectorImpl<MachineInstr *> &DeadInsts,
SmallVectorImpl<Register> &UpdatedDefs,
GISelChangeObserver &Observer) {
unsigned NumDefs = MI.getNumDefs();
Register SrcReg = MI.getSourceReg();
MachineInstr *SrcDef = getDefIgnoringCopies(SrcReg, MRI);
if (!SrcDef)
return false;
LLT OpTy = MRI.getType(SrcReg);
LLT DestTy = MRI.getType(MI.getReg(0));
unsigned SrcDefIdx = getDefIndex(*SrcDef, SrcReg);
Builder.setInstrAndDebugLoc(MI);
ArtifactValueFinder Finder(MRI, Builder, LI);
if (Finder.tryCombineUnmergeDefs(MI, Observer, UpdatedDefs)) {
markInstAndDefDead(MI, *SrcDef, DeadInsts, SrcDefIdx);
return true;
}
if (auto *SrcUnmerge = dyn_cast<GUnmerge>(SrcDef)) {
// %0:_(<4 x s16>) = G_FOO
// %1:_(<2 x s16>), %2:_(<2 x s16>) = G_UNMERGE_VALUES %0
// %3:_(s16), %4:_(s16) = G_UNMERGE_VALUES %1
//
// %3:_(s16), %4:_(s16), %5:_(s16), %6:_(s16) = G_UNMERGE_VALUES %0
Register SrcUnmergeSrc = SrcUnmerge->getSourceReg();
LLT SrcUnmergeSrcTy = MRI.getType(SrcUnmergeSrc);
// If we need to decrease the number of vector elements in the result type
// of an unmerge, this would involve the creation of an equivalent unmerge
// to copy back to the original result registers.
LegalizeActionStep ActionStep = LI.getAction(
{TargetOpcode::G_UNMERGE_VALUES, {OpTy, SrcUnmergeSrcTy}});
switch (ActionStep.Action) {
case LegalizeActions::Lower:
case LegalizeActions::Unsupported:
break;
case LegalizeActions::FewerElements:
case LegalizeActions::NarrowScalar:
if (ActionStep.TypeIdx == 1)
return false;
break;
default:
return false;
}
auto NewUnmerge = Builder.buildUnmerge(DestTy, SrcUnmergeSrc);
// TODO: Should we try to process out the other defs now? If the other
// defs of the source unmerge are also unmerged, we end up with a separate
// unmerge for each one.
for (unsigned I = 0; I != NumDefs; ++I) {
Register Def = MI.getReg(I);
replaceRegOrBuildCopy(Def, NewUnmerge.getReg(SrcDefIdx * NumDefs + I),
MRI, Builder, UpdatedDefs, Observer);
}
markInstAndDefDead(MI, *SrcUnmerge, DeadInsts, SrcDefIdx);
return true;
}
MachineInstr *MergeI = SrcDef;
unsigned ConvertOp = 0;
// Handle intermediate conversions
unsigned SrcOp = SrcDef->getOpcode();
if (isArtifactCast(SrcOp)) {
ConvertOp = SrcOp;
MergeI = getDefIgnoringCopies(SrcDef->getOperand(1).getReg(), MRI);
}
if (!MergeI || !canFoldMergeOpcode(MergeI->getOpcode(),
ConvertOp, OpTy, DestTy)) {
// We might have a chance to combine later by trying to combine
// unmerge(cast) first
return tryFoldUnmergeCast(MI, *SrcDef, DeadInsts, UpdatedDefs);
}
const unsigned NumMergeRegs = MergeI->getNumOperands() - 1;
if (NumMergeRegs < NumDefs) {
if (NumDefs % NumMergeRegs != 0)
return false;
Builder.setInstr(MI);
// Transform to UNMERGEs, for example
// %1 = G_MERGE_VALUES %4, %5
// %9, %10, %11, %12 = G_UNMERGE_VALUES %1
// to
// %9, %10 = G_UNMERGE_VALUES %4
// %11, %12 = G_UNMERGE_VALUES %5
const unsigned NewNumDefs = NumDefs / NumMergeRegs;
for (unsigned Idx = 0; Idx < NumMergeRegs; ++Idx) {
SmallVector<Register, 8> DstRegs;
for (unsigned j = 0, DefIdx = Idx * NewNumDefs; j < NewNumDefs;
++j, ++DefIdx)
DstRegs.push_back(MI.getReg(DefIdx));
if (ConvertOp) {
LLT MergeSrcTy = MRI.getType(MergeI->getOperand(1).getReg());
// This is a vector that is being split and casted. Extract to the
// element type, and do the conversion on the scalars (or smaller
// vectors).
LLT MergeEltTy = MergeSrcTy.divide(NewNumDefs);
// Handle split to smaller vectors, with conversions.
// %2(<8 x s8>) = G_CONCAT_VECTORS %0(<4 x s8>), %1(<4 x s8>)
// %3(<8 x s16>) = G_SEXT %2
// %4(<2 x s16>), %5(<2 x s16>), %6(<2 x s16>), %7(<2 x s16>) = G_UNMERGE_VALUES %3
//
// =>
//
// %8(<2 x s8>), %9(<2 x s8>) = G_UNMERGE_VALUES %0
// %10(<2 x s8>), %11(<2 x s8>) = G_UNMERGE_VALUES %1
// %4(<2 x s16>) = G_SEXT %8
// %5(<2 x s16>) = G_SEXT %9
// %6(<2 x s16>) = G_SEXT %10
// %7(<2 x s16>)= G_SEXT %11
SmallVector<Register, 4> TmpRegs(NewNumDefs);
for (unsigned k = 0; k < NewNumDefs; ++k)
TmpRegs[k] = MRI.createGenericVirtualRegister(MergeEltTy);
Builder.buildUnmerge(TmpRegs, MergeI->getOperand(Idx + 1).getReg());
for (unsigned k = 0; k < NewNumDefs; ++k)
Builder.buildInstr(ConvertOp, {DstRegs[k]}, {TmpRegs[k]});
} else {
Builder.buildUnmerge(DstRegs, MergeI->getOperand(Idx + 1).getReg());
}
UpdatedDefs.append(DstRegs.begin(), DstRegs.end());
}
} else if (NumMergeRegs > NumDefs) {
if (ConvertOp != 0 || NumMergeRegs % NumDefs != 0)
return false;
Builder.setInstr(MI);
// Transform to MERGEs
// %6 = G_MERGE_VALUES %17, %18, %19, %20
// %7, %8 = G_UNMERGE_VALUES %6
// to
// %7 = G_MERGE_VALUES %17, %18
// %8 = G_MERGE_VALUES %19, %20
const unsigned NumRegs = NumMergeRegs / NumDefs;
for (unsigned DefIdx = 0; DefIdx < NumDefs; ++DefIdx) {
SmallVector<Register, 8> Regs;
for (unsigned j = 0, Idx = NumRegs * DefIdx + 1; j < NumRegs;
++j, ++Idx)
Regs.push_back(MergeI->getOperand(Idx).getReg());
Register DefReg = MI.getReg(DefIdx);
Builder.buildMergeLikeInstr(DefReg, Regs);
UpdatedDefs.push_back(DefReg);
}
} else {
LLT MergeSrcTy = MRI.getType(MergeI->getOperand(1).getReg());
if (!ConvertOp && DestTy != MergeSrcTy)
ConvertOp = TargetOpcode::G_BITCAST;
if (ConvertOp) {
Builder.setInstr(MI);
for (unsigned Idx = 0; Idx < NumDefs; ++Idx) {
Register DefReg = MI.getOperand(Idx).getReg();
Register MergeSrc = MergeI->getOperand(Idx + 1).getReg();
if (!MRI.use_empty(DefReg)) {
Builder.buildInstr(ConvertOp, {DefReg}, {MergeSrc});
UpdatedDefs.push_back(DefReg);
}
}
markInstAndDefDead(MI, *MergeI, DeadInsts);
return true;
}
assert(DestTy == MergeSrcTy &&
"Bitcast and the other kinds of conversions should "
"have happened earlier");
Builder.setInstr(MI);
for (unsigned Idx = 0; Idx < NumDefs; ++Idx) {
Register DstReg = MI.getOperand(Idx).getReg();
Register SrcReg = MergeI->getOperand(Idx + 1).getReg();
replaceRegOrBuildCopy(DstReg, SrcReg, MRI, Builder, UpdatedDefs,
Observer);
}
}
markInstAndDefDead(MI, *MergeI, DeadInsts);
return true;
}
bool tryCombineExtract(MachineInstr &MI,
SmallVectorImpl<MachineInstr *> &DeadInsts,
SmallVectorImpl<Register> &UpdatedDefs) {
assert(MI.getOpcode() == TargetOpcode::G_EXTRACT);
// Try to use the source registers from a G_MERGE_VALUES
//
// %2 = G_MERGE_VALUES %0, %1
// %3 = G_EXTRACT %2, N
// =>
//
// for N < %2.getSizeInBits() / 2
// %3 = G_EXTRACT %0, N
//
// for N >= %2.getSizeInBits() / 2
// %3 = G_EXTRACT %1, (N - %0.getSizeInBits()
Register SrcReg = lookThroughCopyInstrs(MI.getOperand(1).getReg());
MachineInstr *MergeI = MRI.getVRegDef(SrcReg);
if (!MergeI || !isa<GMergeLikeInstr>(MergeI))
return false;
Register DstReg = MI.getOperand(0).getReg();
LLT DstTy = MRI.getType(DstReg);
LLT SrcTy = MRI.getType(SrcReg);
// TODO: Do we need to check if the resulting extract is supported?
unsigned ExtractDstSize = DstTy.getSizeInBits();
unsigned Offset = MI.getOperand(2).getImm();
unsigned NumMergeSrcs = MergeI->getNumOperands() - 1;
unsigned MergeSrcSize = SrcTy.getSizeInBits() / NumMergeSrcs;
unsigned MergeSrcIdx = Offset / MergeSrcSize;
// Compute the offset of the last bit the extract needs.
unsigned EndMergeSrcIdx = (Offset + ExtractDstSize - 1) / MergeSrcSize;
// Can't handle the case where the extract spans multiple inputs.
if (MergeSrcIdx != EndMergeSrcIdx)
return false;
// TODO: We could modify MI in place in most cases.
Builder.setInstr(MI);
Builder.buildExtract(DstReg, MergeI->getOperand(MergeSrcIdx + 1).getReg(),
Offset - MergeSrcIdx * MergeSrcSize);
UpdatedDefs.push_back(DstReg);
markInstAndDefDead(MI, *MergeI, DeadInsts);
return true;
}
/// Try to combine away MI.
/// Returns true if it combined away the MI.
/// Adds instructions that are dead as a result of the combine
/// into DeadInsts, which can include MI.
bool tryCombineInstruction(MachineInstr &MI,
SmallVectorImpl<MachineInstr *> &DeadInsts,
GISelObserverWrapper &WrapperObserver) {
ArtifactValueFinder Finder(MRI, Builder, LI);
// This might be a recursive call, and we might have DeadInsts already
// populated. To avoid bad things happening later with multiple vreg defs
// etc, process the dead instructions now if any.
if (!DeadInsts.empty())
deleteMarkedDeadInsts(DeadInsts, WrapperObserver);
// Put here every vreg that was redefined in such a way that it's at least
// possible that one (or more) of its users (immediate or COPY-separated)
// could become artifact combinable with the new definition (or the
// instruction reachable from it through a chain of copies if any).
SmallVector<Register, 4> UpdatedDefs;
bool Changed = false;
switch (MI.getOpcode()) {
default:
return false;
case TargetOpcode::G_ANYEXT:
Changed = tryCombineAnyExt(MI, DeadInsts, UpdatedDefs, WrapperObserver);
break;
case TargetOpcode::G_ZEXT:
Changed = tryCombineZExt(MI, DeadInsts, UpdatedDefs, WrapperObserver);
break;
case TargetOpcode::G_SEXT:
Changed = tryCombineSExt(MI, DeadInsts, UpdatedDefs);
break;
case TargetOpcode::G_UNMERGE_VALUES:
Changed = tryCombineUnmergeValues(cast<GUnmerge>(MI), DeadInsts,
UpdatedDefs, WrapperObserver);
break;
case TargetOpcode::G_MERGE_VALUES:
case TargetOpcode::G_BUILD_VECTOR:
case TargetOpcode::G_CONCAT_VECTORS:
// If any of the users of this merge are an unmerge, then add them to the
// artifact worklist in case there's folding that can be done looking up.
for (MachineInstr &U : MRI.use_instructions(MI.getOperand(0).getReg())) {
if (U.getOpcode() == TargetOpcode::G_UNMERGE_VALUES ||
U.getOpcode() == TargetOpcode::G_TRUNC) {
UpdatedDefs.push_back(MI.getOperand(0).getReg());
break;
}
}
Changed = Finder.tryCombineMergeLike(cast<GMergeLikeInstr>(MI), DeadInsts,
UpdatedDefs, WrapperObserver);
break;
case TargetOpcode::G_EXTRACT:
Changed = tryCombineExtract(MI, DeadInsts, UpdatedDefs);
break;
case TargetOpcode::G_TRUNC:
Changed = tryCombineTrunc(MI, DeadInsts, UpdatedDefs, WrapperObserver);
if (!Changed) {
// Try to combine truncates away even if they are legal. As all artifact
// combines at the moment look only "up" the def-use chains, we achieve
// that by throwing truncates' users (with look through copies) into the
// ArtifactList again.
UpdatedDefs.push_back(MI.getOperand(0).getReg());
}
break;
}
// If the main loop through the ArtifactList found at least one combinable
// pair of artifacts, not only combine it away (as done above), but also
// follow the def-use chain from there to combine everything that can be
// combined within this def-use chain of artifacts.
while (!UpdatedDefs.empty()) {
Register NewDef = UpdatedDefs.pop_back_val();
assert(NewDef.isVirtual() && "Unexpected redefinition of a physreg");
for (MachineInstr &Use : MRI.use_instructions(NewDef)) {
switch (Use.getOpcode()) {
// Keep this list in sync with the list of all artifact combines.
case TargetOpcode::G_ANYEXT:
case TargetOpcode::G_ZEXT:
case TargetOpcode::G_SEXT:
case TargetOpcode::G_UNMERGE_VALUES:
case TargetOpcode::G_EXTRACT:
case TargetOpcode::G_TRUNC:
case TargetOpcode::G_BUILD_VECTOR:
// Adding Use to ArtifactList.
WrapperObserver.changedInstr(Use);
break;
case TargetOpcode::COPY: {
Register Copy = Use.getOperand(0).getReg();
if (Copy.isVirtual())
UpdatedDefs.push_back(Copy);
break;
}
default:
// If we do not have an artifact combine for the opcode, there is no
// point in adding it to the ArtifactList as nothing interesting will
// be done to it anyway.
break;
}
}
}
return Changed;
}
private:
static Register getArtifactSrcReg(const MachineInstr &MI) {
switch (MI.getOpcode()) {
case TargetOpcode::COPY:
case TargetOpcode::G_TRUNC:
case TargetOpcode::G_ZEXT:
case TargetOpcode::G_ANYEXT:
case TargetOpcode::G_SEXT:
case TargetOpcode::G_EXTRACT:
return MI.getOperand(1).getReg();
case TargetOpcode::G_UNMERGE_VALUES:
return MI.getOperand(MI.getNumOperands() - 1).getReg();
default:
llvm_unreachable("Not a legalization artifact happen");
}
}
/// Mark a def of one of MI's original operands, DefMI, as dead if changing MI
/// (either by killing it or changing operands) results in DefMI being dead
/// too. In-between COPYs or artifact-casts are also collected if they are
/// dead.
/// MI is not marked dead.
void markDefDead(MachineInstr &MI, MachineInstr &DefMI,
SmallVectorImpl<MachineInstr *> &DeadInsts,
unsigned DefIdx = 0) {
// Collect all the copy instructions that are made dead, due to deleting
// this instruction. Collect all of them until the Trunc(DefMI).
// Eg,
// %1(s1) = G_TRUNC %0(s32)
// %2(s1) = COPY %1(s1)
// %3(s1) = COPY %2(s1)
// %4(s32) = G_ANYEXT %3(s1)
// In this case, we would have replaced %4 with a copy of %0,
// and as a result, %3, %2, %1 are dead.
MachineInstr *PrevMI = &MI;
while (PrevMI != &DefMI) {
Register PrevRegSrc = getArtifactSrcReg(*PrevMI);
MachineInstr *TmpDef = MRI.getVRegDef(PrevRegSrc);
if (MRI.hasOneUse(PrevRegSrc)) {
if (TmpDef != &DefMI) {
assert((TmpDef->getOpcode() == TargetOpcode::COPY ||
isArtifactCast(TmpDef->getOpcode())) &&
"Expecting copy or artifact cast here");
DeadInsts.push_back(TmpDef);
}
} else
break;
PrevMI = TmpDef;
}
if (PrevMI == &DefMI) {
unsigned I = 0;
bool IsDead = true;
for (MachineOperand &Def : DefMI.defs()) {
if (I != DefIdx) {
if (!MRI.use_empty(Def.getReg())) {
IsDead = false;
break;
}
} else {
if (!MRI.hasOneUse(DefMI.getOperand(DefIdx).getReg()))
break;
}
++I;
}
if (IsDead)
DeadInsts.push_back(&DefMI);
}
}
/// Mark MI as dead. If a def of one of MI's operands, DefMI, would also be
/// dead due to MI being killed, then mark DefMI as dead too.
/// Some of the combines (extends(trunc)), try to walk through redundant
/// copies in between the extends and the truncs, and this attempts to collect
/// the in between copies if they're dead.
void markInstAndDefDead(MachineInstr &MI, MachineInstr &DefMI,
SmallVectorImpl<MachineInstr *> &DeadInsts,
unsigned DefIdx = 0) {
DeadInsts.push_back(&MI);
markDefDead(MI, DefMI, DeadInsts, DefIdx);
}
/// Erase the dead instructions in the list and call the observer hooks.
/// Normally the Legalizer will deal with erasing instructions that have been
/// marked dead. However, for the trunc(ext(x)) cases we can end up trying to
/// process instructions which have been marked dead, but otherwise break the
/// MIR by introducing multiple vreg defs. For those cases, allow the combines
/// to explicitly delete the instructions before we run into trouble.
void deleteMarkedDeadInsts(SmallVectorImpl<MachineInstr *> &DeadInsts,
GISelObserverWrapper &WrapperObserver) {
for (auto *DeadMI : DeadInsts) {
LLVM_DEBUG(dbgs() << *DeadMI << "Is dead, eagerly deleting\n");
WrapperObserver.erasingInstr(*DeadMI);
DeadMI->eraseFromParent();
}
DeadInsts.clear();
}
/// Checks if the target legalizer info has specified anything about the
/// instruction, or if unsupported.
bool isInstUnsupported(const LegalityQuery &Query) const {
using namespace LegalizeActions;
auto Step = LI.getAction(Query);
return Step.Action == Unsupported || Step.Action == NotFound;
}
bool isInstLegal(const LegalityQuery &Query) const {
return LI.getAction(Query).Action == LegalizeActions::Legal;
}
bool isConstantUnsupported(LLT Ty) const {
if (!Ty.isVector())
return isInstUnsupported({TargetOpcode::G_CONSTANT, {Ty}});
LLT EltTy = Ty.getElementType();
return isInstUnsupported({TargetOpcode::G_CONSTANT, {EltTy}}) ||
isInstUnsupported({TargetOpcode::G_BUILD_VECTOR, {Ty, EltTy}});
}
/// Looks through copy instructions and returns the actual
/// source register.
Register lookThroughCopyInstrs(Register Reg) {
using namespace llvm::MIPatternMatch;
Register TmpReg;
while (mi_match(Reg, MRI, m_Copy(m_Reg(TmpReg)))) {
if (MRI.getType(TmpReg).isValid())
Reg = TmpReg;
else
break;
}
return Reg;
}
};
} // namespace llvm
#endif // LLVM_CODEGEN_GLOBALISEL_LEGALIZATIONARTIFACTCOMBINER_H
PK iwFZ���� � CodeGen/GlobalISel/Combiner.hnu �[��� //== ----- llvm/CodeGen/GlobalISel/Combiner.h -------------------*- C++ -*-== //
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This contains common code to drive combines. Combiner Passes will need to
/// setup a CombinerInfo and call combineMachineFunction.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_COMBINER_H
#define LLVM_CODEGEN_GLOBALISEL_COMBINER_H
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
namespace llvm {
class MachineRegisterInfo;
class CombinerInfo;
class GISelCSEInfo;
class TargetPassConfig;
class MachineFunction;
class Combiner {
public:
Combiner(CombinerInfo &CombinerInfo, const TargetPassConfig *TPC);
/// If CSEInfo is not null, then the Combiner will setup observer for
/// CSEInfo and instantiate a CSEMIRBuilder. Pass nullptr if CSE is not
/// needed.
bool combineMachineInstrs(MachineFunction &MF, GISelCSEInfo *CSEInfo);
protected:
CombinerInfo &CInfo;
MachineRegisterInfo *MRI = nullptr;
const TargetPassConfig *TPC;
std::unique_ptr<MachineIRBuilder> Builder;
};
} // End namespace llvm.
#endif // LLVM_CODEGEN_GLOBALISEL_COMBINER_H
PK iwFZEXzZk k # CodeGen/GlobalISel/GISelKnownBits.hnu �[��� //===- llvm/CodeGen/GlobalISel/GISelKnownBits.h ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// Provides analysis for querying information about KnownBits during GISel
/// passes.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_GISELKNOWNBITS_H
#define LLVM_CODEGEN_GLOBALISEL_GISELKNOWNBITS_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/CodeGen/GlobalISel/GISelChangeObserver.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/Register.h"
#include "llvm/InitializePasses.h"
#include "llvm/Support/KnownBits.h"
namespace llvm {
class TargetLowering;
class DataLayout;
class GISelKnownBits : public GISelChangeObserver {
MachineFunction &MF;
MachineRegisterInfo &MRI;
const TargetLowering &TL;
const DataLayout &DL;
unsigned MaxDepth;
/// Cache maintained during a computeKnownBits request.
SmallDenseMap<Register, KnownBits, 16> ComputeKnownBitsCache;
void computeKnownBitsMin(Register Src0, Register Src1, KnownBits &Known,
const APInt &DemandedElts,
unsigned Depth = 0);
unsigned computeNumSignBitsMin(Register Src0, Register Src1,
const APInt &DemandedElts, unsigned Depth = 0);
public:
GISelKnownBits(MachineFunction &MF, unsigned MaxDepth = 6);
virtual ~GISelKnownBits() = default;
const MachineFunction &getMachineFunction() const {
return MF;
}
const DataLayout &getDataLayout() const {
return DL;
}
virtual void computeKnownBitsImpl(Register R, KnownBits &Known,
const APInt &DemandedElts,
unsigned Depth = 0);
unsigned computeNumSignBits(Register R, const APInt &DemandedElts,
unsigned Depth = 0);
unsigned computeNumSignBits(Register R, unsigned Depth = 0);
// KnownBitsAPI
KnownBits getKnownBits(Register R);
KnownBits getKnownBits(Register R, const APInt &DemandedElts,
unsigned Depth = 0);
// Calls getKnownBits for first operand def of MI.
KnownBits getKnownBits(MachineInstr &MI);
APInt getKnownZeroes(Register R);
APInt getKnownOnes(Register R);
/// \return true if 'V & Mask' is known to be zero in DemandedElts. We use
/// this predicate to simplify operations downstream.
/// Mask is known to be zero for bits that V cannot have.
bool maskedValueIsZero(Register Val, const APInt &Mask) {
return Mask.isSubsetOf(getKnownBits(Val).Zero);
}
/// \return true if the sign bit of Op is known to be zero. We use this
/// predicate to simplify operations downstream.
bool signBitIsZero(Register Op);
static void computeKnownBitsForAlignment(KnownBits &Known,
Align Alignment) {
// The low bits are known zero if the pointer is aligned.
Known.Zero.setLowBits(Log2(Alignment));
}
/// \return The known alignment for the pointer-like value \p R.
Align computeKnownAlignment(Register R, unsigned Depth = 0);
// Observer API. No-op for non-caching implementation.
void erasingInstr(MachineInstr &MI) override {}
void createdInstr(MachineInstr &MI) override {}
void changingInstr(MachineInstr &MI) override {}
void changedInstr(MachineInstr &MI) override {}
protected:
unsigned getMaxDepth() const { return MaxDepth; }
};
/// To use KnownBitsInfo analysis in a pass,
/// KnownBitsInfo &Info = getAnalysis<GISelKnownBitsInfoAnalysis>().get(MF);
/// Add to observer if the Info is caching.
/// WrapperObserver.addObserver(Info);
/// Eventually add other features such as caching/ser/deserializing
/// to MIR etc. Those implementations can derive from GISelKnownBits
/// and override computeKnownBitsImpl.
class GISelKnownBitsAnalysis : public MachineFunctionPass {
std::unique_ptr<GISelKnownBits> Info;
public:
static char ID;
GISelKnownBitsAnalysis() : MachineFunctionPass(ID) {
initializeGISelKnownBitsAnalysisPass(*PassRegistry::getPassRegistry());
}
GISelKnownBits &get(MachineFunction &MF) {
if (!Info)
Info = std::make_unique<GISelKnownBits>(MF);
return *Info.get();
}
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnMachineFunction(MachineFunction &MF) override;
void releaseMemory() override { Info.reset(); }
};
} // namespace llvm
#endif // LLVM_CODEGEN_GLOBALISEL_GISELKNOWNBITS_H
PK iwFZ�p/
� � " CodeGen/GlobalISel/GISelWorkList.hnu �[��� //===- GISelWorkList.h - Worklist for GISel passes ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_GISELWORKLIST_H
#define LLVM_CODEGEN_GLOBALISEL_GISELWORKLIST_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
namespace llvm {
class MachineInstr;
// Worklist which mostly works similar to InstCombineWorkList, but on
// MachineInstrs. The main difference with something like a SetVector is that
// erasing an element doesn't move all elements over one place - instead just
// nulls out the element of the vector.
//
// FIXME: Does it make sense to factor out common code with the
// instcombinerWorkList?
template<unsigned N>
class GISelWorkList {
SmallVector<MachineInstr *, N> Worklist;
DenseMap<MachineInstr *, unsigned> WorklistMap;
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
bool Finalized = true;
#endif
public:
GISelWorkList() : WorklistMap(N) {}
bool empty() const { return WorklistMap.empty(); }
unsigned size() const { return WorklistMap.size(); }
// Since we don't know ahead of time how many instructions we're going to add
// to the worklist, and migrating densemap's elements is quite expensive
// everytime we resize, only insert to the smallvector (typically during the
// initial phase of populating lists). Before the worklist can be used,
// finalize should be called. Also assert with NDEBUG if list is ever used
// without finalizing. Note that unlike insert, we won't check for duplicates
// - so the ideal place to use this is during the initial prepopulating phase
// of most passes.
void deferred_insert(MachineInstr *I) {
Worklist.push_back(I);
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
Finalized = false;
#endif
}
// This should only be called when using deferred_insert.
// This asserts that the WorklistMap is empty, and then
// inserts all the elements in the Worklist into the map.
// It also asserts if there are any duplicate elements found.
void finalize() {
assert(WorklistMap.empty() && "Expecting empty worklistmap");
if (Worklist.size() > N)
WorklistMap.reserve(Worklist.size());
for (unsigned i = 0; i < Worklist.size(); ++i)
if (!WorklistMap.try_emplace(Worklist[i], i).second)
llvm_unreachable("Duplicate elements in the list");
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
Finalized = true;
#endif
}
/// Add the specified instruction to the worklist if it isn't already in it.
void insert(MachineInstr *I) {
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
assert(Finalized && "GISelWorkList used without finalizing");
#endif
if (WorklistMap.try_emplace(I, Worklist.size()).second)
Worklist.push_back(I);
}
/// Remove I from the worklist if it exists.
void remove(const MachineInstr *I) {
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
assert((Finalized || WorklistMap.empty()) && "Neither finalized nor empty");
#endif
auto It = WorklistMap.find(I);
if (It == WorklistMap.end())
return; // Not in worklist.
// Don't bother moving everything down, just null out the slot.
Worklist[It->second] = nullptr;
WorklistMap.erase(It);
}
void clear() {
Worklist.clear();
WorklistMap.clear();
}
MachineInstr *pop_back_val() {
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
assert(Finalized && "GISelWorkList used without finalizing");
#endif
MachineInstr *I;
do {
I = Worklist.pop_back_val();
} while(!I);
assert(I && "Pop back on empty worklist");
WorklistMap.erase(I);
return I;
}
};
} // end namespace llvm.
#endif
PK iwFZ nN�� � & CodeGen/GlobalISel/InstructionSelect.hnu �[��� //== llvm/CodeGen/GlobalISel/InstructionSelect.h -----------------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file This file describes the interface of the MachineFunctionPass
/// responsible for selecting (possibly generic) machine instructions to
/// target-specific instructions.
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GLOBALISEL_INSTRUCTIONSELECT_H
#define LLVM_CODEGEN_GLOBALISEL_INSTRUCTIONSELECT_H
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/Support/CodeGen.h"
namespace llvm {
class BlockFrequencyInfo;
class ProfileSummaryInfo;
/// This pass is responsible for selecting generic machine instructions to
/// target-specific instructions. It relies on the InstructionSelector provided
/// by the target.
/// Selection is done by examining blocks in post-order, and instructions in
/// reverse order.
///
/// \post for all inst in MF: not isPreISelGenericOpcode(inst.opcode)
class InstructionSelect : public MachineFunctionPass {
public:
static char ID;
StringRef getPassName() const override { return "InstructionSelect"; }
void getAnalysisUsage(AnalysisUsage &AU) const override;
MachineFunctionProperties getRequiredProperties() const override {
return MachineFunctionProperties()
.set(MachineFunctionProperties::Property::IsSSA)
.set(MachineFunctionProperties::Property::Legalized)
.set(MachineFunctionProperties::Property::RegBankSelected);
}
MachineFunctionProperties getSetProperties() const override {
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::Selected);
}
InstructionSelect(CodeGenOpt::Level OL);
InstructionSelect();
bool runOnMachineFunction(MachineFunction &MF) override;
protected:
BlockFrequencyInfo *BFI = nullptr;
ProfileSummaryInfo *PSI = nullptr;
CodeGenOpt::Level OptLevel = CodeGenOpt::None;
};
} // End namespace llvm.
#endif
PK iwFZx�` " CodeGen/MachineModuleSlotTracker.hnu �[��� //===-- llvm/CodeGen/MachineModuleInfo.h ------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEMODULESLOTTRACKER_H
#define LLVM_CODEGEN_MACHINEMODULESLOTTRACKER_H
#include "llvm/IR/ModuleSlotTracker.h"
namespace llvm {
class AbstractSlotTrackerStorage;
class Function;
class MachineModuleInfo;
class MachineFunction;
class Module;
class MachineModuleSlotTracker : public ModuleSlotTracker {
const Function &TheFunction;
const MachineModuleInfo &TheMMI;
unsigned MDNStartSlot = 0, MDNEndSlot = 0;
void processMachineFunctionMetadata(AbstractSlotTrackerStorage *AST,
const MachineFunction &MF);
void processMachineModule(AbstractSlotTrackerStorage *AST, const Module *M,
bool ShouldInitializeAllMetadata);
void processMachineFunction(AbstractSlotTrackerStorage *AST,
const Function *F,
bool ShouldInitializeAllMetadata);
public:
MachineModuleSlotTracker(const MachineFunction *MF,
bool ShouldInitializeAllMetadata = true);
~MachineModuleSlotTracker();
void collectMachineMDNodes(MachineMDNodeListType &L) const;
};
} // namespace llvm
#endif // LLVM_CODEGEN_MACHINEMODULESLOTTRACKER_H
PK iwFZT��8! 8! CodeGen/DFAPacketizer.hnu �[��� //===- llvm/CodeGen/DFAPacketizer.h - DFA Packetizer for VLIW ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// This class implements a deterministic finite automaton (DFA) based
// packetizing mechanism for VLIW architectures. It provides APIs to
// determine whether there exists a legal mapping of instructions to
// functional unit assignments in a packet. The DFA is auto-generated from
// the target's Schedule.td file.
//
// A DFA consists of 3 major elements: states, inputs, and transitions. For
// the packetizing mechanism, the input is the set of instruction classes for
// a target. The state models all possible combinations of functional unit
// consumption for a given set of instructions in a packet. A transition
// models the addition of an instruction to a packet. In the DFA constructed
// by this class, if an instruction can be added to a packet, then a valid
// transition exists from the corresponding state. Invalid transitions
// indicate that the instruction cannot be added to the current packet.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_DFAPACKETIZER_H
#define LLVM_CODEGEN_DFAPACKETIZER_H
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/ScheduleDAGInstrs.h"
#include "llvm/CodeGen/ScheduleDAGMutation.h"
#include "llvm/Support/Automaton.h"
#include <cstdint>
#include <map>
#include <memory>
#include <utility>
#include <vector>
namespace llvm {
class ScheduleDAGMutation;
class InstrItineraryData;
class MachineFunction;
class MachineInstr;
class MachineLoopInfo;
class MCInstrDesc;
class SUnit;
class TargetInstrInfo;
// This class extends ScheduleDAGInstrs and overrides the schedule method
// to build the dependence graph.
class DefaultVLIWScheduler : public ScheduleDAGInstrs {
private:
AAResults *AA;
/// Ordered list of DAG postprocessing steps.
std::vector<std::unique_ptr<ScheduleDAGMutation>> Mutations;
public:
DefaultVLIWScheduler(MachineFunction &MF, MachineLoopInfo &MLI,
AAResults *AA);
// Actual scheduling work.
void schedule() override;
/// DefaultVLIWScheduler takes ownership of the Mutation object.
void addMutation(std::unique_ptr<ScheduleDAGMutation> Mutation) {
Mutations.push_back(std::move(Mutation));
}
protected:
void postProcessDAG();
};
class DFAPacketizer {
private:
const InstrItineraryData *InstrItins;
Automaton<uint64_t> A;
/// For every itinerary, an "action" to apply to the automaton. This removes
/// the redundancy in actions between itinerary classes.
ArrayRef<unsigned> ItinActions;
public:
DFAPacketizer(const InstrItineraryData *InstrItins, Automaton<uint64_t> a,
ArrayRef<unsigned> ItinActions)
: InstrItins(InstrItins), A(std::move(a)), ItinActions(ItinActions) {
// Start off with resource tracking disabled.
A.enableTranscription(false);
}
// Reset the current state to make all resources available.
void clearResources() {
A.reset();
}
// Set whether this packetizer should track not just whether instructions
// can be packetized, but also which functional units each instruction ends up
// using after packetization.
void setTrackResources(bool Track) {
A.enableTranscription(Track);
}
// Check if the resources occupied by a MCInstrDesc are available in
// the current state.
bool canReserveResources(const MCInstrDesc *MID);
// Reserve the resources occupied by a MCInstrDesc and change the current
// state to reflect that change.
void reserveResources(const MCInstrDesc *MID);
// Check if the resources occupied by a machine instruction are available
// in the current state.
bool canReserveResources(MachineInstr &MI);
// Reserve the resources occupied by a machine instruction and change the
// current state to reflect that change.
void reserveResources(MachineInstr &MI);
// Return the resources used by the InstIdx'th instruction added to this
// packet. The resources are returned as a bitvector of functional units.
//
// Note that a bundle may be packed in multiple valid ways. This function
// returns one arbitary valid packing.
//
// Requires setTrackResources(true) to have been called.
unsigned getUsedResources(unsigned InstIdx);
const InstrItineraryData *getInstrItins() const { return InstrItins; }
};
// VLIWPacketizerList implements a simple VLIW packetizer using DFA. The
// packetizer works on machine basic blocks. For each instruction I in BB,
// the packetizer consults the DFA to see if machine resources are available
// to execute I. If so, the packetizer checks if I depends on any instruction
// in the current packet. If no dependency is found, I is added to current
// packet and the machine resource is marked as taken. If any dependency is
// found, a target API call is made to prune the dependence.
class VLIWPacketizerList {
protected:
MachineFunction &MF;
const TargetInstrInfo *TII;
AAResults *AA;
// The VLIW Scheduler.
DefaultVLIWScheduler *VLIWScheduler;
// Vector of instructions assigned to the current packet.
std::vector<MachineInstr*> CurrentPacketMIs;
// DFA resource tracker.
DFAPacketizer *ResourceTracker;
// Map: MI -> SU.
std::map<MachineInstr*, SUnit*> MIToSUnit;
public:
// The AAResults parameter can be nullptr.
VLIWPacketizerList(MachineFunction &MF, MachineLoopInfo &MLI,
AAResults *AA);
VLIWPacketizerList &operator=(const VLIWPacketizerList &other) = delete;
VLIWPacketizerList(const VLIWPacketizerList &other) = delete;
virtual ~VLIWPacketizerList();
// Implement this API in the backend to bundle instructions.
void PacketizeMIs(MachineBasicBlock *MBB,
MachineBasicBlock::iterator BeginItr,
MachineBasicBlock::iterator EndItr);
// Return the ResourceTracker.
DFAPacketizer *getResourceTracker() {return ResourceTracker;}
// addToPacket - Add MI to the current packet.
virtual MachineBasicBlock::iterator addToPacket(MachineInstr &MI) {
CurrentPacketMIs.push_back(&MI);
ResourceTracker->reserveResources(MI);
return MI;
}
// End the current packet and reset the state of the packetizer.
// Overriding this function allows the target-specific packetizer
// to perform custom finalization.
virtual void endPacket(MachineBasicBlock *MBB,
MachineBasicBlock::iterator MI);
// Perform initialization before packetizing an instruction. This
// function is supposed to be overrided by the target dependent packetizer.
virtual void initPacketizerState() {}
// Check if the given instruction I should be ignored by the packetizer.
virtual bool ignorePseudoInstruction(const MachineInstr &I,
const MachineBasicBlock *MBB) {
return false;
}
// Return true if instruction MI can not be packetized with any other
// instruction, which means that MI itself is a packet.
virtual bool isSoloInstruction(const MachineInstr &MI) { return true; }
// Check if the packetizer should try to add the given instruction to
// the current packet. One reasons for which it may not be desirable
// to include an instruction in the current packet could be that it
// would cause a stall.
// If this function returns "false", the current packet will be ended,
// and the instruction will be added to the next packet.
virtual bool shouldAddToPacket(const MachineInstr &MI) { return true; }
// Check if it is legal to packetize SUI and SUJ together.
virtual bool isLegalToPacketizeTogether(SUnit *SUI, SUnit *SUJ) {
return false;
}
// Check if it is legal to prune dependece between SUI and SUJ.
virtual bool isLegalToPruneDependencies(SUnit *SUI, SUnit *SUJ) {
return false;
}
// Add a DAG mutation to be done before the packetization begins.
void addMutation(std::unique_ptr<ScheduleDAGMutation> Mutation);
bool alias(const MachineInstr &MI1, const MachineInstr &MI2,
bool UseTBAA = true) const;
private:
bool alias(const MachineMemOperand &Op1, const MachineMemOperand &Op2,
bool UseTBAA = true) const;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_DFAPACKETIZER_H
PK iwFZ�e��"* "* CodeGen/RDFRegisters.hnu �[��� //===- RDFRegisters.h -------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_RDFREGISTERS_H
#define LLVM_CODEGEN_RDFREGISTERS_H
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/MC/LaneBitmask.h"
#include "llvm/MC/MCRegister.h"
#include <cassert>
#include <cstdint>
#include <map>
#include <set>
#include <vector>
namespace llvm {
class MachineFunction;
class raw_ostream;
namespace rdf {
struct RegisterAggr;
using RegisterId = uint32_t;
template <typename T>
bool disjoint(const std::set<T> &A, const std::set<T> &B) {
auto ItA = A.begin(), EndA = A.end();
auto ItB = B.begin(), EndB = B.end();
while (ItA != EndA && ItB != EndB) {
if (*ItA < *ItB)
++ItA;
else if (*ItB < *ItA)
++ItB;
else
return false;
}
return true;
}
// Template class for a map translating uint32_t into arbitrary types.
// The map will act like an indexed set: upon insertion of a new object,
// it will automatically assign a new index to it. Index of 0 is treated
// as invalid and is never allocated.
template <typename T, unsigned N = 32> struct IndexedSet {
IndexedSet() { Map.reserve(N); }
T get(uint32_t Idx) const {
// Index Idx corresponds to Map[Idx-1].
assert(Idx != 0 && !Map.empty() && Idx - 1 < Map.size());
return Map[Idx - 1];
}
uint32_t insert(T Val) {
// Linear search.
auto F = llvm::find(Map, Val);
if (F != Map.end())
return F - Map.begin() + 1;
Map.push_back(Val);
return Map.size(); // Return actual_index + 1.
}
uint32_t find(T Val) const {
auto F = llvm::find(Map, Val);
assert(F != Map.end());
return F - Map.begin() + 1;
}
uint32_t size() const { return Map.size(); }
using const_iterator = typename std::vector<T>::const_iterator;
const_iterator begin() const { return Map.begin(); }
const_iterator end() const { return Map.end(); }
private:
std::vector<T> Map;
};
struct RegisterRef {
RegisterId Reg = 0;
LaneBitmask Mask = LaneBitmask::getNone(); // Only for registers.
constexpr RegisterRef() = default;
constexpr explicit RegisterRef(RegisterId R,
LaneBitmask M = LaneBitmask::getAll())
: Reg(R), Mask(isRegId(R) && R != 0 ? M : LaneBitmask::getNone()) {}
// Classify null register as a "register".
constexpr bool isReg() const { return Reg == 0 || isRegId(Reg); }
constexpr bool isUnit() const { return isUnitId(Reg); }
constexpr bool isMask() const { return isMaskId(Reg); }
constexpr unsigned idx() const { return toIdx(Reg); }
constexpr operator bool() const {
return !isReg() || (Reg != 0 && Mask.any());
}
size_t hash() const {
return std::hash<RegisterId>{}(Reg) ^
std::hash<LaneBitmask::Type>{}(Mask.getAsInteger());
}
static constexpr bool isRegId(unsigned Id) {
return Register::isPhysicalRegister(Id);
}
static constexpr bool isUnitId(unsigned Id) {
return Register::isVirtualRegister(Id);
}
static constexpr bool isMaskId(unsigned Id) {
return Register::isStackSlot(Id);
}
static constexpr RegisterId toUnitId(unsigned Idx) {
return Idx | MCRegister::VirtualRegFlag;
}
static constexpr unsigned toIdx(RegisterId Id) {
// Not using virtReg2Index or stackSlot2Index, because they are
// not constexpr.
if (isUnitId(Id))
return Id & ~MCRegister::VirtualRegFlag;
// RegId and MaskId are unchanged.
return Id;
}
bool operator<(RegisterRef) const = delete;
bool operator==(RegisterRef) const = delete;
bool operator!=(RegisterRef) const = delete;
};
struct PhysicalRegisterInfo {
PhysicalRegisterInfo(const TargetRegisterInfo &tri,
const MachineFunction &mf);
RegisterId getRegMaskId(const uint32_t *RM) const {
return Register::index2StackSlot(RegMasks.find(RM));
}
const uint32_t *getRegMaskBits(RegisterId R) const {
return RegMasks.get(Register::stackSlot2Index(R));
}
bool alias(RegisterRef RA, RegisterRef RB) const;
// Returns the set of aliased physical registers.
std::set<RegisterId> getAliasSet(RegisterId Reg) const;
RegisterRef getRefForUnit(uint32_t U) const {
return RegisterRef(UnitInfos[U].Reg, UnitInfos[U].Mask);
}
const BitVector &getMaskUnits(RegisterId MaskId) const {
return MaskInfos[Register::stackSlot2Index(MaskId)].Units;
}
std::set<RegisterId> getUnits(RegisterRef RR) const;
const BitVector &getUnitAliases(uint32_t U) const {
return AliasInfos[U].Regs;
}
RegisterRef mapTo(RegisterRef RR, unsigned R) const;
const TargetRegisterInfo &getTRI() const { return TRI; }
bool equal_to(RegisterRef A, RegisterRef B) const;
bool less(RegisterRef A, RegisterRef B) const;
void print(raw_ostream &OS, RegisterRef A) const;
void print(raw_ostream &OS, const RegisterAggr &A) const;
private:
struct RegInfo {
const TargetRegisterClass *RegClass = nullptr;
};
struct UnitInfo {
RegisterId Reg = 0;
LaneBitmask Mask;
};
struct MaskInfo {
BitVector Units;
};
struct AliasInfo {
BitVector Regs;
};
const TargetRegisterInfo &TRI;
IndexedSet<const uint32_t *> RegMasks;
std::vector<RegInfo> RegInfos;
std::vector<UnitInfo> UnitInfos;
std::vector<MaskInfo> MaskInfos;
std::vector<AliasInfo> AliasInfos;
};
struct RegisterAggr {
RegisterAggr(const PhysicalRegisterInfo &pri)
: Units(pri.getTRI().getNumRegUnits()), PRI(pri) {}
RegisterAggr(const RegisterAggr &RG) = default;
unsigned size() const { return Units.count(); }
bool empty() const { return Units.none(); }
bool hasAliasOf(RegisterRef RR) const;
bool hasCoverOf(RegisterRef RR) const;
const PhysicalRegisterInfo &getPRI() const { return PRI; }
bool operator==(const RegisterAggr &A) const {
return DenseMapInfo<BitVector>::isEqual(Units, A.Units);
}
static bool isCoverOf(RegisterRef RA, RegisterRef RB,
const PhysicalRegisterInfo &PRI) {
return RegisterAggr(PRI).insert(RA).hasCoverOf(RB);
}
RegisterAggr &insert(RegisterRef RR);
RegisterAggr &insert(const RegisterAggr &RG);
RegisterAggr &intersect(RegisterRef RR);
RegisterAggr &intersect(const RegisterAggr &RG);
RegisterAggr &clear(RegisterRef RR);
RegisterAggr &clear(const RegisterAggr &RG);
RegisterRef intersectWith(RegisterRef RR) const;
RegisterRef clearIn(RegisterRef RR) const;
RegisterRef makeRegRef() const;
size_t hash() const { return DenseMapInfo<BitVector>::getHashValue(Units); }
struct ref_iterator {
using MapType = std::map<RegisterId, LaneBitmask>;
private:
MapType Masks;
MapType::iterator Pos;
unsigned Index;
const RegisterAggr *Owner;
public:
ref_iterator(const RegisterAggr &RG, bool End);
RegisterRef operator*() const {
return RegisterRef(Pos->first, Pos->second);
}
ref_iterator &operator++() {
++Pos;
++Index;
return *this;
}
bool operator==(const ref_iterator &I) const {
assert(Owner == I.Owner);
(void)Owner;
return Index == I.Index;
}
bool operator!=(const ref_iterator &I) const { return !(*this == I); }
};
ref_iterator ref_begin() const { return ref_iterator(*this, false); }
ref_iterator ref_end() const { return ref_iterator(*this, true); }
using unit_iterator = typename BitVector::const_set_bits_iterator;
unit_iterator unit_begin() const { return Units.set_bits_begin(); }
unit_iterator unit_end() const { return Units.set_bits_end(); }
iterator_range<ref_iterator> refs() const {
return make_range(ref_begin(), ref_end());
}
iterator_range<unit_iterator> units() const {
return make_range(unit_begin(), unit_end());
}
private:
BitVector Units;
const PhysicalRegisterInfo &PRI;
};
// This is really a std::map, except that it provides a non-trivial
// default constructor to the element accessed via [].
template <typename KeyType> struct RegisterAggrMap {
RegisterAggrMap(const PhysicalRegisterInfo &pri) : Empty(pri) {}
RegisterAggr &operator[](KeyType Key) {
return Map.emplace(Key, Empty).first->second;
}
auto begin() { return Map.begin(); }
auto end() { return Map.end(); }
auto begin() const { return Map.begin(); }
auto end() const { return Map.end(); }
auto find(const KeyType &Key) const { return Map.find(Key); }
private:
RegisterAggr Empty;
std::map<KeyType, RegisterAggr> Map;
public:
using key_type = typename decltype(Map)::key_type;
using mapped_type = typename decltype(Map)::mapped_type;
using value_type = typename decltype(Map)::value_type;
};
raw_ostream &operator<<(raw_ostream &OS, const RegisterAggr &A);
// Print the lane mask in a short form (or not at all if all bits are set).
struct PrintLaneMaskShort {
PrintLaneMaskShort(LaneBitmask M) : Mask(M) {}
LaneBitmask Mask;
};
raw_ostream &operator<<(raw_ostream &OS, const PrintLaneMaskShort &P);
} // end namespace rdf
} // end namespace llvm
namespace std {
template <> struct hash<llvm::rdf::RegisterRef> {
size_t operator()(llvm::rdf::RegisterRef A) const { //
return A.hash();
}
};
template <> struct hash<llvm::rdf::RegisterAggr> {
size_t operator()(const llvm::rdf::RegisterAggr &A) const { //
return A.hash();
}
};
template <> struct equal_to<llvm::rdf::RegisterRef> {
constexpr equal_to(const llvm::rdf::PhysicalRegisterInfo &pri) : PRI(&pri) {}
bool operator()(llvm::rdf::RegisterRef A, llvm::rdf::RegisterRef B) const {
return PRI->equal_to(A, B);
}
private:
// Make it a pointer just in case. See comment in `less` below.
const llvm::rdf::PhysicalRegisterInfo *PRI;
};
template <> struct equal_to<llvm::rdf::RegisterAggr> {
bool operator()(const llvm::rdf::RegisterAggr &A,
const llvm::rdf::RegisterAggr &B) const {
return A == B;
}
};
template <> struct less<llvm::rdf::RegisterRef> {
constexpr less(const llvm::rdf::PhysicalRegisterInfo &pri) : PRI(&pri) {}
bool operator()(llvm::rdf::RegisterRef A, llvm::rdf::RegisterRef B) const {
return PRI->less(A, B);
}
private:
// Make it a pointer because apparently some versions of MSVC use std::swap
// on the std::less specialization.
const llvm::rdf::PhysicalRegisterInfo *PRI;
};
} // namespace std
namespace llvm::rdf {
using RegisterSet = std::set<RegisterRef, std::less<RegisterRef>>;
} // namespace llvm::rdf
#endif // LLVM_CODEGEN_RDFREGISTERS_H
PK iwFZ ��� � CodeGen/UnreachableBlockElim.hnu �[��� //===-- UnreachableBlockElim.h - Remove unreachable blocks for codegen --===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This pass is an extremely simple version of the SimplifyCFG pass. Its sole
// job is to delete LLVM basic blocks that are not reachable from the entry
// node. To do this, it performs a simple depth first traversal of the CFG,
// then deletes any unvisited nodes.
//
// Note that this pass is really a hack. In particular, the instruction
// selectors for various targets should just not generate code for unreachable
// blocks. Until LLVM has a more systematic way of defining instruction
// selectors, however, we cannot really expect them to handle additional
// complexity.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_UNREACHABLEBLOCKELIM_H
#define LLVM_CODEGEN_UNREACHABLEBLOCKELIM_H
#include "llvm/IR/PassManager.h"
namespace llvm {
class UnreachableBlockElimPass
: public PassInfoMixin<UnreachableBlockElimPass> {
public:
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_UNREACHABLEBLOCKELIM_H
PK iwFZ! �� � # CodeGen/MachineBlockFrequencyInfo.hnu �[��� //===- MachineBlockFrequencyInfo.h - MBB Frequency Analysis -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Loops should be simplified before this analysis.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEBLOCKFREQUENCYINFO_H
#define LLVM_CODEGEN_MACHINEBLOCKFREQUENCYINFO_H
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/Support/BlockFrequency.h"
#include <cstdint>
#include <memory>
#include <optional>
namespace llvm {
template <class BlockT> class BlockFrequencyInfoImpl;
class MachineBasicBlock;
class MachineBranchProbabilityInfo;
class MachineFunction;
class MachineLoopInfo;
class raw_ostream;
/// MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation
/// to estimate machine basic block frequencies.
class MachineBlockFrequencyInfo : public MachineFunctionPass {
using ImplType = BlockFrequencyInfoImpl<MachineBasicBlock>;
std::unique_ptr<ImplType> MBFI;
public:
static char ID;
MachineBlockFrequencyInfo();
explicit MachineBlockFrequencyInfo(MachineFunction &F,
MachineBranchProbabilityInfo &MBPI,
MachineLoopInfo &MLI);
~MachineBlockFrequencyInfo() override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnMachineFunction(MachineFunction &F) override;
/// calculate - compute block frequency info for the given function.
void calculate(const MachineFunction &F,
const MachineBranchProbabilityInfo &MBPI,
const MachineLoopInfo &MLI);
void releaseMemory() override;
/// getblockFreq - Return block frequency. Return 0 if we don't have the
/// information. Please note that initial frequency is equal to 1024. It means
/// that we should not rely on the value itself, but only on the comparison to
/// the other block frequencies. We do this to avoid using of floating points.
/// For example, to get the frequency of a block relative to the entry block,
/// divide the integral value returned by this function (the
/// BlockFrequency::getFrequency() value) by getEntryFreq().
BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const;
/// Compute the frequency of the block, relative to the entry block.
/// This API assumes getEntryFreq() is non-zero.
float getBlockFreqRelativeToEntryBlock(const MachineBasicBlock *MBB) const {
assert(getEntryFreq() != 0 && "getEntryFreq() should not return 0 here!");
return getBlockFreq(MBB).getFrequency() * (1.0f / getEntryFreq());
}
std::optional<uint64_t>
getBlockProfileCount(const MachineBasicBlock *MBB) const;
std::optional<uint64_t> getProfileCountFromFreq(uint64_t Freq) const;
bool isIrrLoopHeader(const MachineBasicBlock *MBB) const;
/// incrementally calculate block frequencies when we split edges, to avoid
/// full CFG traversal.
void onEdgeSplit(const MachineBasicBlock &NewPredecessor,
const MachineBasicBlock &NewSuccessor,
const MachineBranchProbabilityInfo &MBPI);
const MachineFunction *getFunction() const;
const MachineBranchProbabilityInfo *getMBPI() const;
/// Pop up a ghostview window with the current block frequency propagation
/// rendered using dot.
void view(const Twine &Name, bool isSimple = true) const;
// Print the block frequency Freq to OS using the current functions entry
// frequency to convert freq into a relative decimal form.
raw_ostream &printBlockFreq(raw_ostream &OS, const BlockFrequency Freq) const;
// Convenience method that attempts to look up the frequency associated with
// BB and print it to OS.
raw_ostream &printBlockFreq(raw_ostream &OS,
const MachineBasicBlock *MBB) const;
/// Divide a block's BlockFrequency::getFrequency() value by this value to
/// obtain the entry block - relative frequency of said block.
uint64_t getEntryFreq() const;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINEBLOCKFREQUENCYINFO_H
PK iwFZ�`�X� � CodeGen/LivePhysRegs.hnu �[��� //===- llvm/CodeGen/LivePhysRegs.h - Live Physical Register Set -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file
/// This file implements the LivePhysRegs utility for tracking liveness of
/// physical registers. This can be used for ad-hoc liveness tracking after
/// register allocation. You can start with the live-ins/live-outs at the
/// beginning/end of a block and update the information while walking the
/// instructions inside the block. This implementation tracks the liveness on a
/// sub-register granularity.
///
/// We assume that the high bits of a physical super-register are not preserved
/// unless the instruction has an implicit-use operand reading the super-
/// register.
///
/// X86 Example:
/// %ymm0 = ...
/// %xmm0 = ... (Kills %xmm0, all %xmm0s sub-registers, and %ymm0)
///
/// %ymm0 = ...
/// %xmm0 = ..., implicit %ymm0 (%ymm0 and all its sub-registers are alive)
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LIVEPHYSREGS_H
#define LLVM_CODEGEN_LIVEPHYSREGS_H
#include "llvm/ADT/SparseSet.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/MC/MCRegister.h"
#include "llvm/MC/MCRegisterInfo.h"
#include <cassert>
#include <utility>
namespace llvm {
class MachineInstr;
class MachineFunction;
class MachineOperand;
class MachineRegisterInfo;
class raw_ostream;
/// A set of physical registers with utility functions to track liveness
/// when walking backward/forward through a basic block.
class LivePhysRegs {
const TargetRegisterInfo *TRI = nullptr;
using RegisterSet = SparseSet<MCPhysReg, identity<MCPhysReg>>;
RegisterSet LiveRegs;
public:
/// Constructs an unitialized set. init() needs to be called to initialize it.
LivePhysRegs() = default;
/// Constructs and initializes an empty set.
LivePhysRegs(const TargetRegisterInfo &TRI) : TRI(&TRI) {
LiveRegs.setUniverse(TRI.getNumRegs());
}
LivePhysRegs(const LivePhysRegs&) = delete;
LivePhysRegs &operator=(const LivePhysRegs&) = delete;
/// (re-)initializes and clears the set.
void init(const TargetRegisterInfo &TRI) {
this->TRI = &TRI;
LiveRegs.clear();
LiveRegs.setUniverse(TRI.getNumRegs());
}
/// Clears the set.
void clear() { LiveRegs.clear(); }
/// Returns true if the set is empty.
bool empty() const { return LiveRegs.empty(); }
/// Adds a physical register and all its sub-registers to the set.
void addReg(MCPhysReg Reg) {
assert(TRI && "LivePhysRegs is not initialized.");
assert(Reg <= TRI->getNumRegs() && "Expected a physical register.");
for (MCPhysReg SubReg : TRI->subregs_inclusive(Reg))
LiveRegs.insert(SubReg);
}
/// Removes a physical register, all its sub-registers, and all its
/// super-registers from the set.
void removeReg(MCPhysReg Reg) {
assert(TRI && "LivePhysRegs is not initialized.");
assert(Reg <= TRI->getNumRegs() && "Expected a physical register.");
for (MCRegAliasIterator R(Reg, TRI, true); R.isValid(); ++R)
LiveRegs.erase(*R);
}
/// Removes physical registers clobbered by the regmask operand \p MO.
void removeRegsInMask(const MachineOperand &MO,
SmallVectorImpl<std::pair<MCPhysReg, const MachineOperand*>> *Clobbers =
nullptr);
/// Returns true if register \p Reg is contained in the set. This also
/// works if only the super register of \p Reg has been defined, because
/// addReg() always adds all sub-registers to the set as well.
/// Note: Returns false if just some sub registers are live, use available()
/// when searching a free register.
bool contains(MCPhysReg Reg) const { return LiveRegs.count(Reg); }
/// Returns true if register \p Reg and no aliasing register is in the set.
bool available(const MachineRegisterInfo &MRI, MCPhysReg Reg) const;
/// Remove defined registers and regmask kills from the set.
void removeDefs(const MachineInstr &MI);
/// Add uses to the set.
void addUses(const MachineInstr &MI);
/// Simulates liveness when stepping backwards over an instruction(bundle).
/// Remove Defs, add uses. This is the recommended way of calculating
/// liveness.
void stepBackward(const MachineInstr &MI);
/// Simulates liveness when stepping forward over an instruction(bundle).
/// Remove killed-uses, add defs. This is the not recommended way, because it
/// depends on accurate kill flags. If possible use stepBackward() instead of
/// this function. The clobbers set will be the list of registers either
/// defined or clobbered by a regmask. The operand will identify whether this
/// is a regmask or register operand.
void stepForward(const MachineInstr &MI,
SmallVectorImpl<std::pair<MCPhysReg, const MachineOperand*>> &Clobbers);
/// Adds all live-in registers of basic block \p MBB.
/// Live in registers are the registers in the blocks live-in list and the
/// pristine registers.
void addLiveIns(const MachineBasicBlock &MBB);
/// Adds all live-in registers of basic block \p MBB but skips pristine
/// registers.
void addLiveInsNoPristines(const MachineBasicBlock &MBB);
/// Adds all live-out registers of basic block \p MBB.
/// Live out registers are the union of the live-in registers of the successor
/// blocks and pristine registers. Live out registers of the end block are the
/// callee saved registers.
/// If a register is not added by this method, it is guaranteed to not be
/// live out from MBB, although a sub-register may be. This is true
/// both before and after regalloc.
void addLiveOuts(const MachineBasicBlock &MBB);
/// Adds all live-out registers of basic block \p MBB but skips pristine
/// registers.
void addLiveOutsNoPristines(const MachineBasicBlock &MBB);
using const_iterator = RegisterSet::const_iterator;
const_iterator begin() const { return LiveRegs.begin(); }
const_iterator end() const { return LiveRegs.end(); }
/// Prints the currently live registers to \p OS.
void print(raw_ostream &OS) const;
/// Dumps the currently live registers to the debug output.
void dump() const;
private:
/// Adds live-in registers from basic block \p MBB, taking associated
/// lane masks into consideration.
void addBlockLiveIns(const MachineBasicBlock &MBB);
/// Adds pristine registers. Pristine registers are callee saved registers
/// that are unused in the function.
void addPristines(const MachineFunction &MF);
};
inline raw_ostream &operator<<(raw_ostream &OS, const LivePhysRegs& LR) {
LR.print(OS);
return OS;
}
/// Computes registers live-in to \p MBB assuming all of its successors
/// live-in lists are up-to-date. Puts the result into the given LivePhysReg
/// instance \p LiveRegs.
void computeLiveIns(LivePhysRegs &LiveRegs, const MachineBasicBlock &MBB);
/// Recomputes dead and kill flags in \p MBB.
void recomputeLivenessFlags(MachineBasicBlock &MBB);
/// Adds registers contained in \p LiveRegs to the block live-in list of \p MBB.
/// Does not add reserved registers.
void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs);
/// Convenience function combining computeLiveIns() and addLiveIns().
void computeAndAddLiveIns(LivePhysRegs &LiveRegs,
MachineBasicBlock &MBB);
/// Convenience function for recomputing live-in's for \p MBB.
static inline void recomputeLiveIns(MachineBasicBlock &MBB) {
LivePhysRegs LPR;
MBB.clearLiveIns();
computeAndAddLiveIns(LPR, MBB);
}
} // end namespace llvm
#endif // LLVM_CODEGEN_LIVEPHYSREGS_H
PK iwFZ�?�&� &� CodeGen/MachineRegisterInfo.hnu �[��� //===- llvm/CodeGen/MachineRegisterInfo.h -----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the MachineRegisterInfo class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEREGISTERINFO_H
#define LLVM_CODEGEN_MACHINEREGISTERINFO_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/IndexedMap.h"
#include "llvm/ADT/PointerUnion.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringSet.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBundle.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/RegisterBank.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/MC/LaneBitmask.h"
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <iterator>
#include <memory>
#include <utility>
#include <vector>
namespace llvm {
class PSetIterator;
/// Convenient type to represent either a register class or a register bank.
using RegClassOrRegBank =
PointerUnion<const TargetRegisterClass *, const RegisterBank *>;
/// MachineRegisterInfo - Keep track of information for virtual and physical
/// registers, including vreg register classes, use/def chains for registers,
/// etc.
class MachineRegisterInfo {
public:
class Delegate {
virtual void anchor();
public:
virtual ~Delegate() = default;
virtual void MRI_NoteNewVirtualRegister(Register Reg) = 0;
virtual void MRI_NoteCloneVirtualRegister(Register NewReg,
Register SrcReg) {
MRI_NoteNewVirtualRegister(NewReg);
}
};
private:
MachineFunction *MF;
SmallPtrSet<Delegate *, 1> TheDelegates;
/// True if subregister liveness is tracked.
const bool TracksSubRegLiveness;
/// VRegInfo - Information we keep for each virtual register.
///
/// Each element in this list contains the register class of the vreg and the
/// start of the use/def list for the register.
IndexedMap<std::pair<RegClassOrRegBank, MachineOperand *>,
VirtReg2IndexFunctor>
VRegInfo;
/// Map for recovering vreg name from vreg number.
/// This map is used by the MIR Printer.
IndexedMap<std::string, VirtReg2IndexFunctor> VReg2Name;
/// StringSet that is used to unique vreg names.
StringSet<> VRegNames;
/// The flag is true upon \p UpdatedCSRs initialization
/// and false otherwise.
bool IsUpdatedCSRsInitialized = false;
/// Contains the updated callee saved register list.
/// As opposed to the static list defined in register info,
/// all registers that were disabled are removed from the list.
SmallVector<MCPhysReg, 16> UpdatedCSRs;
/// RegAllocHints - This vector records register allocation hints for
/// virtual registers. For each virtual register, it keeps a pair of hint
/// type and hints vector making up the allocation hints. Only the first
/// hint may be target specific, and in that case this is reflected by the
/// first member of the pair being non-zero. If the hinted register is
/// virtual, it means the allocator should prefer the physical register
/// allocated to it if any.
IndexedMap<std::pair<unsigned, SmallVector<Register, 4>>,
VirtReg2IndexFunctor>
RegAllocHints;
/// PhysRegUseDefLists - This is an array of the head of the use/def list for
/// physical registers.
std::unique_ptr<MachineOperand *[]> PhysRegUseDefLists;
/// getRegUseDefListHead - Return the head pointer for the register use/def
/// list for the specified virtual or physical register.
MachineOperand *&getRegUseDefListHead(Register RegNo) {
if (RegNo.isVirtual())
return VRegInfo[RegNo.id()].second;
return PhysRegUseDefLists[RegNo.id()];
}
MachineOperand *getRegUseDefListHead(Register RegNo) const {
if (RegNo.isVirtual())
return VRegInfo[RegNo.id()].second;
return PhysRegUseDefLists[RegNo.id()];
}
/// Get the next element in the use-def chain.
static MachineOperand *getNextOperandForReg(const MachineOperand *MO) {
assert(MO && MO->isReg() && "This is not a register operand!");
return MO->Contents.Reg.Next;
}
/// UsedPhysRegMask - Additional used physregs including aliases.
/// This bit vector represents all the registers clobbered by function calls.
BitVector UsedPhysRegMask;
/// ReservedRegs - This is a bit vector of reserved registers. The target
/// may change its mind about which registers should be reserved. This
/// vector is the frozen set of reserved registers when register allocation
/// started.
BitVector ReservedRegs;
using VRegToTypeMap = IndexedMap<LLT, VirtReg2IndexFunctor>;
/// Map generic virtual registers to their low-level type.
VRegToTypeMap VRegToType;
/// Keep track of the physical registers that are live in to the function.
/// Live in values are typically arguments in registers. LiveIn values are
/// allowed to have virtual registers associated with them, stored in the
/// second element.
std::vector<std::pair<MCRegister, Register>> LiveIns;
public:
explicit MachineRegisterInfo(MachineFunction *MF);
MachineRegisterInfo(const MachineRegisterInfo &) = delete;
MachineRegisterInfo &operator=(const MachineRegisterInfo &) = delete;
const TargetRegisterInfo *getTargetRegisterInfo() const {
return MF->getSubtarget().getRegisterInfo();
}
void resetDelegate(Delegate *delegate) {
// Ensure another delegate does not take over unless the current
// delegate first unattaches itself.
assert(TheDelegates.count(delegate) &&
"Only an existing delegate can perform reset!");
TheDelegates.erase(delegate);
}
void addDelegate(Delegate *delegate) {
assert(delegate && !TheDelegates.count(delegate) &&
"Attempted to add null delegate, or to change it without "
"first resetting it!");
TheDelegates.insert(delegate);
}
void noteNewVirtualRegister(Register Reg) {
for (auto *TheDelegate : TheDelegates)
TheDelegate->MRI_NoteNewVirtualRegister(Reg);
}
void noteCloneVirtualRegister(Register NewReg, Register SrcReg) {
for (auto *TheDelegate : TheDelegates)
TheDelegate->MRI_NoteCloneVirtualRegister(NewReg, SrcReg);
}
//===--------------------------------------------------------------------===//
// Function State
//===--------------------------------------------------------------------===//
// isSSA - Returns true when the machine function is in SSA form. Early
// passes require the machine function to be in SSA form where every virtual
// register has a single defining instruction.
//
// The TwoAddressInstructionPass and PHIElimination passes take the machine
// function out of SSA form when they introduce multiple defs per virtual
// register.
bool isSSA() const {
return MF->getProperties().hasProperty(
MachineFunctionProperties::Property::IsSSA);
}
// leaveSSA - Indicates that the machine function is no longer in SSA form.
void leaveSSA() {
MF->getProperties().reset(MachineFunctionProperties::Property::IsSSA);
}
/// tracksLiveness - Returns true when tracking register liveness accurately.
/// (see MachineFUnctionProperties::Property description for details)
bool tracksLiveness() const {
return MF->getProperties().hasProperty(
MachineFunctionProperties::Property::TracksLiveness);
}
/// invalidateLiveness - Indicates that register liveness is no longer being
/// tracked accurately.
///
/// This should be called by late passes that invalidate the liveness
/// information.
void invalidateLiveness() {
MF->getProperties().reset(
MachineFunctionProperties::Property::TracksLiveness);
}
/// Returns true if liveness for register class @p RC should be tracked at
/// the subregister level.
bool shouldTrackSubRegLiveness(const TargetRegisterClass &RC) const {
return subRegLivenessEnabled() && RC.HasDisjunctSubRegs;
}
bool shouldTrackSubRegLiveness(Register VReg) const {
assert(VReg.isVirtual() && "Must pass a VReg");
return shouldTrackSubRegLiveness(*getRegClass(VReg));
}
bool subRegLivenessEnabled() const {
return TracksSubRegLiveness;
}
//===--------------------------------------------------------------------===//
// Register Info
//===--------------------------------------------------------------------===//
/// Returns true if the updated CSR list was initialized and false otherwise.
bool isUpdatedCSRsInitialized() const { return IsUpdatedCSRsInitialized; }
/// Returns true if a register can be used as an argument to a function.
bool isArgumentRegister(const MachineFunction &MF, MCRegister Reg) const;
/// Returns true if a register is a fixed register.
bool isFixedRegister(const MachineFunction &MF, MCRegister Reg) const;
/// Returns true if a register is a general purpose register.
bool isGeneralPurposeRegister(const MachineFunction &MF,
MCRegister Reg) const;
/// Disables the register from the list of CSRs.
/// I.e. the register will not appear as part of the CSR mask.
/// \see UpdatedCalleeSavedRegs.
void disableCalleeSavedRegister(MCRegister Reg);
/// Returns list of callee saved registers.
/// The function returns the updated CSR list (after taking into account
/// registers that are disabled from the CSR list).
const MCPhysReg *getCalleeSavedRegs() const;
/// Sets the updated Callee Saved Registers list.
/// Notice that it will override ant previously disabled/saved CSRs.
void setCalleeSavedRegs(ArrayRef<MCPhysReg> CSRs);
// Strictly for use by MachineInstr.cpp.
void addRegOperandToUseList(MachineOperand *MO);
// Strictly for use by MachineInstr.cpp.
void removeRegOperandFromUseList(MachineOperand *MO);
// Strictly for use by MachineInstr.cpp.
void moveOperands(MachineOperand *Dst, MachineOperand *Src, unsigned NumOps);
/// Verify the sanity of the use list for Reg.
void verifyUseList(Register Reg) const;
/// Verify the use list of all registers.
void verifyUseLists() const;
/// reg_begin/reg_end - Provide iteration support to walk over all definitions
/// and uses of a register within the MachineFunction that corresponds to this
/// MachineRegisterInfo object.
template<bool Uses, bool Defs, bool SkipDebug,
bool ByOperand, bool ByInstr, bool ByBundle>
class defusechain_iterator;
template<bool Uses, bool Defs, bool SkipDebug,
bool ByOperand, bool ByInstr, bool ByBundle>
class defusechain_instr_iterator;
// Make it a friend so it can access getNextOperandForReg().
template<bool, bool, bool, bool, bool, bool>
friend class defusechain_iterator;
template<bool, bool, bool, bool, bool, bool>
friend class defusechain_instr_iterator;
/// reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified
/// register.
using reg_iterator =
defusechain_iterator<true, true, false, true, false, false>;
reg_iterator reg_begin(Register RegNo) const {
return reg_iterator(getRegUseDefListHead(RegNo));
}
static reg_iterator reg_end() { return reg_iterator(nullptr); }
inline iterator_range<reg_iterator> reg_operands(Register Reg) const {
return make_range(reg_begin(Reg), reg_end());
}
/// reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses
/// of the specified register, stepping by MachineInstr.
using reg_instr_iterator =
defusechain_instr_iterator<true, true, false, false, true, false>;
reg_instr_iterator reg_instr_begin(Register RegNo) const {
return reg_instr_iterator(getRegUseDefListHead(RegNo));
}
static reg_instr_iterator reg_instr_end() {
return reg_instr_iterator(nullptr);
}
inline iterator_range<reg_instr_iterator>
reg_instructions(Register Reg) const {
return make_range(reg_instr_begin(Reg), reg_instr_end());
}
/// reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses
/// of the specified register, stepping by bundle.
using reg_bundle_iterator =
defusechain_instr_iterator<true, true, false, false, false, true>;
reg_bundle_iterator reg_bundle_begin(Register RegNo) const {
return reg_bundle_iterator(getRegUseDefListHead(RegNo));
}
static reg_bundle_iterator reg_bundle_end() {
return reg_bundle_iterator(nullptr);
}
inline iterator_range<reg_bundle_iterator> reg_bundles(Register Reg) const {
return make_range(reg_bundle_begin(Reg), reg_bundle_end());
}
/// reg_empty - Return true if there are no instructions using or defining the
/// specified register (it may be live-in).
bool reg_empty(Register RegNo) const { return reg_begin(RegNo) == reg_end(); }
/// reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses
/// of the specified register, skipping those marked as Debug.
using reg_nodbg_iterator =
defusechain_iterator<true, true, true, true, false, false>;
reg_nodbg_iterator reg_nodbg_begin(Register RegNo) const {
return reg_nodbg_iterator(getRegUseDefListHead(RegNo));
}
static reg_nodbg_iterator reg_nodbg_end() {
return reg_nodbg_iterator(nullptr);
}
inline iterator_range<reg_nodbg_iterator>
reg_nodbg_operands(Register Reg) const {
return make_range(reg_nodbg_begin(Reg), reg_nodbg_end());
}
/// reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk
/// all defs and uses of the specified register, stepping by MachineInstr,
/// skipping those marked as Debug.
using reg_instr_nodbg_iterator =
defusechain_instr_iterator<true, true, true, false, true, false>;
reg_instr_nodbg_iterator reg_instr_nodbg_begin(Register RegNo) const {
return reg_instr_nodbg_iterator(getRegUseDefListHead(RegNo));
}
static reg_instr_nodbg_iterator reg_instr_nodbg_end() {
return reg_instr_nodbg_iterator(nullptr);
}
inline iterator_range<reg_instr_nodbg_iterator>
reg_nodbg_instructions(Register Reg) const {
return make_range(reg_instr_nodbg_begin(Reg), reg_instr_nodbg_end());
}
/// reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk
/// all defs and uses of the specified register, stepping by bundle,
/// skipping those marked as Debug.
using reg_bundle_nodbg_iterator =
defusechain_instr_iterator<true, true, true, false, false, true>;
reg_bundle_nodbg_iterator reg_bundle_nodbg_begin(Register RegNo) const {
return reg_bundle_nodbg_iterator(getRegUseDefListHead(RegNo));
}
static reg_bundle_nodbg_iterator reg_bundle_nodbg_end() {
return reg_bundle_nodbg_iterator(nullptr);
}
inline iterator_range<reg_bundle_nodbg_iterator>
reg_nodbg_bundles(Register Reg) const {
return make_range(reg_bundle_nodbg_begin(Reg), reg_bundle_nodbg_end());
}
/// reg_nodbg_empty - Return true if the only instructions using or defining
/// Reg are Debug instructions.
bool reg_nodbg_empty(Register RegNo) const {
return reg_nodbg_begin(RegNo) == reg_nodbg_end();
}
/// def_iterator/def_begin/def_end - Walk all defs of the specified register.
using def_iterator =
defusechain_iterator<false, true, false, true, false, false>;
def_iterator def_begin(Register RegNo) const {
return def_iterator(getRegUseDefListHead(RegNo));
}
static def_iterator def_end() { return def_iterator(nullptr); }
inline iterator_range<def_iterator> def_operands(Register Reg) const {
return make_range(def_begin(Reg), def_end());
}
/// def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the
/// specified register, stepping by MachineInst.
using def_instr_iterator =
defusechain_instr_iterator<false, true, false, false, true, false>;
def_instr_iterator def_instr_begin(Register RegNo) const {
return def_instr_iterator(getRegUseDefListHead(RegNo));
}
static def_instr_iterator def_instr_end() {
return def_instr_iterator(nullptr);
}
inline iterator_range<def_instr_iterator>
def_instructions(Register Reg) const {
return make_range(def_instr_begin(Reg), def_instr_end());
}
/// def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the
/// specified register, stepping by bundle.
using def_bundle_iterator =
defusechain_instr_iterator<false, true, false, false, false, true>;
def_bundle_iterator def_bundle_begin(Register RegNo) const {
return def_bundle_iterator(getRegUseDefListHead(RegNo));
}
static def_bundle_iterator def_bundle_end() {
return def_bundle_iterator(nullptr);
}
inline iterator_range<def_bundle_iterator> def_bundles(Register Reg) const {
return make_range(def_bundle_begin(Reg), def_bundle_end());
}
/// def_empty - Return true if there are no instructions defining the
/// specified register (it may be live-in).
bool def_empty(Register RegNo) const { return def_begin(RegNo) == def_end(); }
StringRef getVRegName(Register Reg) const {
return VReg2Name.inBounds(Reg) ? StringRef(VReg2Name[Reg]) : "";
}
void insertVRegByName(StringRef Name, Register Reg) {
assert((Name.empty() || !VRegNames.contains(Name)) &&
"Named VRegs Must be Unique.");
if (!Name.empty()) {
VRegNames.insert(Name);
VReg2Name.grow(Reg);
VReg2Name[Reg] = Name.str();
}
}
/// Return true if there is exactly one operand defining the specified
/// register.
bool hasOneDef(Register RegNo) const {
return hasSingleElement(def_operands(RegNo));
}
/// Returns the defining operand if there is exactly one operand defining the
/// specified register, otherwise nullptr.
MachineOperand *getOneDef(Register Reg) const {
def_iterator DI = def_begin(Reg);
if (DI == def_end()) // No defs.
return nullptr;
def_iterator OneDef = DI;
if (++DI == def_end())
return &*OneDef;
return nullptr; // Multiple defs.
}
/// use_iterator/use_begin/use_end - Walk all uses of the specified register.
using use_iterator =
defusechain_iterator<true, false, false, true, false, false>;
use_iterator use_begin(Register RegNo) const {
return use_iterator(getRegUseDefListHead(RegNo));
}
static use_iterator use_end() { return use_iterator(nullptr); }
inline iterator_range<use_iterator> use_operands(Register Reg) const {
return make_range(use_begin(Reg), use_end());
}
/// use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the
/// specified register, stepping by MachineInstr.
using use_instr_iterator =
defusechain_instr_iterator<true, false, false, false, true, false>;
use_instr_iterator use_instr_begin(Register RegNo) const {
return use_instr_iterator(getRegUseDefListHead(RegNo));
}
static use_instr_iterator use_instr_end() {
return use_instr_iterator(nullptr);
}
inline iterator_range<use_instr_iterator>
use_instructions(Register Reg) const {
return make_range(use_instr_begin(Reg), use_instr_end());
}
/// use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the
/// specified register, stepping by bundle.
using use_bundle_iterator =
defusechain_instr_iterator<true, false, false, false, false, true>;
use_bundle_iterator use_bundle_begin(Register RegNo) const {
return use_bundle_iterator(getRegUseDefListHead(RegNo));
}
static use_bundle_iterator use_bundle_end() {
return use_bundle_iterator(nullptr);
}
inline iterator_range<use_bundle_iterator> use_bundles(Register Reg) const {
return make_range(use_bundle_begin(Reg), use_bundle_end());
}
/// use_empty - Return true if there are no instructions using the specified
/// register.
bool use_empty(Register RegNo) const { return use_begin(RegNo) == use_end(); }
/// hasOneUse - Return true if there is exactly one instruction using the
/// specified register.
bool hasOneUse(Register RegNo) const {
return hasSingleElement(use_operands(RegNo));
}
/// use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the
/// specified register, skipping those marked as Debug.
using use_nodbg_iterator =
defusechain_iterator<true, false, true, true, false, false>;
use_nodbg_iterator use_nodbg_begin(Register RegNo) const {
return use_nodbg_iterator(getRegUseDefListHead(RegNo));
}
static use_nodbg_iterator use_nodbg_end() {
return use_nodbg_iterator(nullptr);
}
inline iterator_range<use_nodbg_iterator>
use_nodbg_operands(Register Reg) const {
return make_range(use_nodbg_begin(Reg), use_nodbg_end());
}
/// use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk
/// all uses of the specified register, stepping by MachineInstr, skipping
/// those marked as Debug.
using use_instr_nodbg_iterator =
defusechain_instr_iterator<true, false, true, false, true, false>;
use_instr_nodbg_iterator use_instr_nodbg_begin(Register RegNo) const {
return use_instr_nodbg_iterator(getRegUseDefListHead(RegNo));
}
static use_instr_nodbg_iterator use_instr_nodbg_end() {
return use_instr_nodbg_iterator(nullptr);
}
inline iterator_range<use_instr_nodbg_iterator>
use_nodbg_instructions(Register Reg) const {
return make_range(use_instr_nodbg_begin(Reg), use_instr_nodbg_end());
}
/// use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk
/// all uses of the specified register, stepping by bundle, skipping
/// those marked as Debug.
using use_bundle_nodbg_iterator =
defusechain_instr_iterator<true, false, true, false, false, true>;
use_bundle_nodbg_iterator use_bundle_nodbg_begin(Register RegNo) const {
return use_bundle_nodbg_iterator(getRegUseDefListHead(RegNo));
}
static use_bundle_nodbg_iterator use_bundle_nodbg_end() {
return use_bundle_nodbg_iterator(nullptr);
}
inline iterator_range<use_bundle_nodbg_iterator>
use_nodbg_bundles(Register Reg) const {
return make_range(use_bundle_nodbg_begin(Reg), use_bundle_nodbg_end());
}
/// use_nodbg_empty - Return true if there are no non-Debug instructions
/// using the specified register.
bool use_nodbg_empty(Register RegNo) const {
return use_nodbg_begin(RegNo) == use_nodbg_end();
}
/// hasOneNonDBGUse - Return true if there is exactly one non-Debug
/// use of the specified register.
bool hasOneNonDBGUse(Register RegNo) const;
/// hasOneNonDBGUse - Return true if there is exactly one non-Debug
/// instruction using the specified register. Said instruction may have
/// multiple uses.
bool hasOneNonDBGUser(Register RegNo) const;
/// hasAtMostUses - Return true if the given register has at most \p MaxUsers
/// non-debug user instructions.
bool hasAtMostUserInstrs(Register Reg, unsigned MaxUsers) const;
/// replaceRegWith - Replace all instances of FromReg with ToReg in the
/// machine function. This is like llvm-level X->replaceAllUsesWith(Y),
/// except that it also changes any definitions of the register as well.
///
/// Note that it is usually necessary to first constrain ToReg's register
/// class and register bank to match the FromReg constraints using one of the
/// methods:
///
/// constrainRegClass(ToReg, getRegClass(FromReg))
/// constrainRegAttrs(ToReg, FromReg)
/// RegisterBankInfo::constrainGenericRegister(ToReg,
/// *MRI.getRegClass(FromReg), MRI)
///
/// These functions will return a falsy result if the virtual registers have
/// incompatible constraints.
///
/// Note that if ToReg is a physical register the function will replace and
/// apply sub registers to ToReg in order to obtain a final/proper physical
/// register.
void replaceRegWith(Register FromReg, Register ToReg);
/// getVRegDef - Return the machine instr that defines the specified virtual
/// register or null if none is found. This assumes that the code is in SSA
/// form, so there should only be one definition.
MachineInstr *getVRegDef(Register Reg) const;
/// getUniqueVRegDef - Return the unique machine instr that defines the
/// specified virtual register or null if none is found. If there are
/// multiple definitions or no definition, return null.
MachineInstr *getUniqueVRegDef(Register Reg) const;
/// clearKillFlags - Iterate over all the uses of the given register and
/// clear the kill flag from the MachineOperand. This function is used by
/// optimization passes which extend register lifetimes and need only
/// preserve conservative kill flag information.
void clearKillFlags(Register Reg) const;
void dumpUses(Register RegNo) const;
/// Returns true if PhysReg is unallocatable and constant throughout the
/// function. Writing to a constant register has no effect.
bool isConstantPhysReg(MCRegister PhysReg) const;
/// Get an iterator over the pressure sets affected by the given physical or
/// virtual register. If RegUnit is physical, it must be a register unit (from
/// MCRegUnitIterator).
PSetIterator getPressureSets(Register RegUnit) const;
//===--------------------------------------------------------------------===//
// Virtual Register Info
//===--------------------------------------------------------------------===//
/// Return the register class of the specified virtual register.
/// This shouldn't be used directly unless \p Reg has a register class.
/// \see getRegClassOrNull when this might happen.
const TargetRegisterClass *getRegClass(Register Reg) const {
assert(isa<const TargetRegisterClass *>(VRegInfo[Reg.id()].first) &&
"Register class not set, wrong accessor");
return cast<const TargetRegisterClass *>(VRegInfo[Reg.id()].first);
}
/// Return the register class of \p Reg, or null if Reg has not been assigned
/// a register class yet.
///
/// \note A null register class can only happen when these two
/// conditions are met:
/// 1. Generic virtual registers are created.
/// 2. The machine function has not completely been through the
/// instruction selection process.
/// None of this condition is possible without GlobalISel for now.
/// In other words, if GlobalISel is not used or if the query happens after
/// the select pass, using getRegClass is safe.
const TargetRegisterClass *getRegClassOrNull(Register Reg) const {
const RegClassOrRegBank &Val = VRegInfo[Reg].first;
return dyn_cast_if_present<const TargetRegisterClass *>(Val);
}
/// Return the register bank of \p Reg, or null if Reg has not been assigned
/// a register bank or has been assigned a register class.
/// \note It is possible to get the register bank from the register class via
/// RegisterBankInfo::getRegBankFromRegClass.
const RegisterBank *getRegBankOrNull(Register Reg) const {
const RegClassOrRegBank &Val = VRegInfo[Reg].first;
return dyn_cast_if_present<const RegisterBank *>(Val);
}
/// Return the register bank or register class of \p Reg.
/// \note Before the register bank gets assigned (i.e., before the
/// RegBankSelect pass) \p Reg may not have either.
const RegClassOrRegBank &getRegClassOrRegBank(Register Reg) const {
return VRegInfo[Reg].first;
}
/// setRegClass - Set the register class of the specified virtual register.
void setRegClass(Register Reg, const TargetRegisterClass *RC);
/// Set the register bank to \p RegBank for \p Reg.
void setRegBank(Register Reg, const RegisterBank &RegBank);
void setRegClassOrRegBank(Register Reg,
const RegClassOrRegBank &RCOrRB){
VRegInfo[Reg].first = RCOrRB;
}
/// constrainRegClass - Constrain the register class of the specified virtual
/// register to be a common subclass of RC and the current register class,
/// but only if the new class has at least MinNumRegs registers. Return the
/// new register class, or NULL if no such class exists.
/// This should only be used when the constraint is known to be trivial, like
/// GR32 -> GR32_NOSP. Beware of increasing register pressure.
///
/// \note Assumes that the register has a register class assigned.
/// Use RegisterBankInfo::constrainGenericRegister in GlobalISel's
/// InstructionSelect pass and constrainRegAttrs in every other pass,
/// including non-select passes of GlobalISel, instead.
const TargetRegisterClass *constrainRegClass(Register Reg,
const TargetRegisterClass *RC,
unsigned MinNumRegs = 0);
/// Constrain the register class or the register bank of the virtual register
/// \p Reg (and low-level type) to be a common subclass or a common bank of
/// both registers provided respectively (and a common low-level type). Do
/// nothing if any of the attributes (classes, banks, or low-level types) of
/// the registers are deemed incompatible, or if the resulting register will
/// have a class smaller than before and of size less than \p MinNumRegs.
/// Return true if such register attributes exist, false otherwise.
///
/// \note Use this method instead of constrainRegClass and
/// RegisterBankInfo::constrainGenericRegister everywhere but SelectionDAG
/// ISel / FastISel and GlobalISel's InstructionSelect pass respectively.
bool constrainRegAttrs(Register Reg, Register ConstrainingReg,
unsigned MinNumRegs = 0);
/// recomputeRegClass - Try to find a legal super-class of Reg's register
/// class that still satisfies the constraints from the instructions using
/// Reg. Returns true if Reg was upgraded.
///
/// This method can be used after constraints have been removed from a
/// virtual register, for example after removing instructions or splitting
/// the live range.
bool recomputeRegClass(Register Reg);
/// createVirtualRegister - Create and return a new virtual register in the
/// function with the specified register class.
Register createVirtualRegister(const TargetRegisterClass *RegClass,
StringRef Name = "");
/// Create and return a new virtual register in the function with the same
/// attributes as the given register.
Register cloneVirtualRegister(Register VReg, StringRef Name = "");
/// Get the low-level type of \p Reg or LLT{} if Reg is not a generic
/// (target independent) virtual register.
LLT getType(Register Reg) const {
if (Reg.isVirtual() && VRegToType.inBounds(Reg))
return VRegToType[Reg];
return LLT{};
}
/// Set the low-level type of \p VReg to \p Ty.
void setType(Register VReg, LLT Ty);
/// Create and return a new generic virtual register with low-level
/// type \p Ty.
Register createGenericVirtualRegister(LLT Ty, StringRef Name = "");
/// Remove all types associated to virtual registers (after instruction
/// selection and constraining of all generic virtual registers).
void clearVirtRegTypes();
/// Creates a new virtual register that has no register class, register bank
/// or size assigned yet. This is only allowed to be used
/// temporarily while constructing machine instructions. Most operations are
/// undefined on an incomplete register until one of setRegClass(),
/// setRegBank() or setSize() has been called on it.
Register createIncompleteVirtualRegister(StringRef Name = "");
/// getNumVirtRegs - Return the number of virtual registers created.
unsigned getNumVirtRegs() const { return VRegInfo.size(); }
/// clearVirtRegs - Remove all virtual registers (after physreg assignment).
void clearVirtRegs();
/// setRegAllocationHint - Specify a register allocation hint for the
/// specified virtual register. This is typically used by target, and in case
/// of an earlier hint it will be overwritten.
void setRegAllocationHint(Register VReg, unsigned Type, Register PrefReg) {
assert(VReg.isVirtual());
RegAllocHints[VReg].first = Type;
RegAllocHints[VReg].second.clear();
RegAllocHints[VReg].second.push_back(PrefReg);
}
/// addRegAllocationHint - Add a register allocation hint to the hints
/// vector for VReg.
void addRegAllocationHint(Register VReg, Register PrefReg) {
assert(VReg.isVirtual());
RegAllocHints[VReg].second.push_back(PrefReg);
}
/// Specify the preferred (target independent) register allocation hint for
/// the specified virtual register.
void setSimpleHint(Register VReg, Register PrefReg) {
setRegAllocationHint(VReg, /*Type=*/0, PrefReg);
}
void clearSimpleHint(Register VReg) {
assert (!RegAllocHints[VReg].first &&
"Expected to clear a non-target hint!");
RegAllocHints[VReg].second.clear();
}
/// getRegAllocationHint - Return the register allocation hint for the
/// specified virtual register. If there are many hints, this returns the
/// one with the greatest weight.
std::pair<unsigned, Register> getRegAllocationHint(Register VReg) const {
assert(VReg.isVirtual());
Register BestHint = (RegAllocHints[VReg.id()].second.size() ?
RegAllocHints[VReg.id()].second[0] : Register());
return {RegAllocHints[VReg.id()].first, BestHint};
}
/// getSimpleHint - same as getRegAllocationHint except it will only return
/// a target independent hint.
Register getSimpleHint(Register VReg) const {
assert(VReg.isVirtual());
std::pair<unsigned, Register> Hint = getRegAllocationHint(VReg);
return Hint.first ? Register() : Hint.second;
}
/// getRegAllocationHints - Return a reference to the vector of all
/// register allocation hints for VReg.
const std::pair<unsigned, SmallVector<Register, 4>> &
getRegAllocationHints(Register VReg) const {
assert(VReg.isVirtual());
return RegAllocHints[VReg];
}
/// markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the
/// specified register as undefined which causes the DBG_VALUE to be
/// deleted during LiveDebugVariables analysis.
void markUsesInDebugValueAsUndef(Register Reg) const;
/// updateDbgUsersToReg - Update a collection of debug instructions
/// to refer to the designated register.
void updateDbgUsersToReg(MCRegister OldReg, MCRegister NewReg,
ArrayRef<MachineInstr *> Users) const {
// If this operand is a register, check whether it overlaps with OldReg.
// If it does, replace with NewReg.
auto UpdateOp = [this, &NewReg, &OldReg](MachineOperand &Op) {
if (Op.isReg() &&
getTargetRegisterInfo()->regsOverlap(Op.getReg(), OldReg))
Op.setReg(NewReg);
};
// Iterate through (possibly several) operands to DBG_VALUEs and update
// each. For DBG_PHIs, only one operand will be present.
for (MachineInstr *MI : Users) {
if (MI->isDebugValue()) {
for (auto &Op : MI->debug_operands())
UpdateOp(Op);
assert(MI->hasDebugOperandForReg(NewReg) &&
"Expected debug value to have some overlap with OldReg");
} else if (MI->isDebugPHI()) {
UpdateOp(MI->getOperand(0));
} else {
llvm_unreachable("Non-DBG_VALUE, Non-DBG_PHI debug instr updated");
}
}
}
/// Return true if the specified register is modified in this function.
/// This checks that no defining machine operands exist for the register or
/// any of its aliases. Definitions found on functions marked noreturn are
/// ignored, to consider them pass 'true' for optional parameter
/// SkipNoReturnDef. The register is also considered modified when it is set
/// in the UsedPhysRegMask.
bool isPhysRegModified(MCRegister PhysReg, bool SkipNoReturnDef = false) const;
/// Return true if the specified register is modified or read in this
/// function. This checks that no machine operands exist for the register or
/// any of its aliases. If SkipRegMaskTest is false, the register is
/// considered used when it is set in the UsedPhysRegMask.
bool isPhysRegUsed(MCRegister PhysReg, bool SkipRegMaskTest = false) const;
/// addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used.
/// This corresponds to the bit mask attached to register mask operands.
void addPhysRegsUsedFromRegMask(const uint32_t *RegMask) {
UsedPhysRegMask.setBitsNotInMask(RegMask);
}
const BitVector &getUsedPhysRegsMask() const { return UsedPhysRegMask; }
//===--------------------------------------------------------------------===//
// Reserved Register Info
//===--------------------------------------------------------------------===//
//
// The set of reserved registers must be invariant during register
// allocation. For example, the target cannot suddenly decide it needs a
// frame pointer when the register allocator has already used the frame
// pointer register for something else.
//
// These methods can be used by target hooks like hasFP() to avoid changing
// the reserved register set during register allocation.
/// freezeReservedRegs - Called by the register allocator to freeze the set
/// of reserved registers before allocation begins.
void freezeReservedRegs(const MachineFunction&);
/// reserveReg -- Mark a register as reserved so checks like isAllocatable
/// will not suggest using it. This should not be used during the middle
/// of a function walk, or when liveness info is available.
void reserveReg(MCRegister PhysReg, const TargetRegisterInfo *TRI) {
assert(reservedRegsFrozen() &&
"Reserved registers haven't been frozen yet. ");
MCRegAliasIterator R(PhysReg, TRI, true);
for (; R.isValid(); ++R)
ReservedRegs.set(*R);
}
/// reservedRegsFrozen - Returns true after freezeReservedRegs() was called
/// to ensure the set of reserved registers stays constant.
bool reservedRegsFrozen() const {
return !ReservedRegs.empty();
}
/// canReserveReg - Returns true if PhysReg can be used as a reserved
/// register. Any register can be reserved before freezeReservedRegs() is
/// called.
bool canReserveReg(MCRegister PhysReg) const {
return !reservedRegsFrozen() || ReservedRegs.test(PhysReg);
}
/// getReservedRegs - Returns a reference to the frozen set of reserved
/// registers. This method should always be preferred to calling
/// TRI::getReservedRegs() when possible.
const BitVector &getReservedRegs() const {
assert(reservedRegsFrozen() &&
"Reserved registers haven't been frozen yet. "
"Use TRI::getReservedRegs().");
return ReservedRegs;
}
/// isReserved - Returns true when PhysReg is a reserved register.
///
/// Reserved registers may belong to an allocatable register class, but the
/// target has explicitly requested that they are not used.
bool isReserved(MCRegister PhysReg) const {
return getReservedRegs().test(PhysReg.id());
}
/// Returns true when the given register unit is considered reserved.
///
/// Register units are considered reserved when for at least one of their
/// root registers, the root register and all super registers are reserved.
/// This currently iterates the register hierarchy and may be slower than
/// expected.
bool isReservedRegUnit(unsigned Unit) const;
/// isAllocatable - Returns true when PhysReg belongs to an allocatable
/// register class and it hasn't been reserved.
///
/// Allocatable registers may show up in the allocation order of some virtual
/// register, so a register allocator needs to track its liveness and
/// availability.
bool isAllocatable(MCRegister PhysReg) const {
return getTargetRegisterInfo()->isInAllocatableClass(PhysReg) &&
!isReserved(PhysReg);
}
//===--------------------------------------------------------------------===//
// LiveIn Management
//===--------------------------------------------------------------------===//
/// addLiveIn - Add the specified register as a live-in. Note that it
/// is an error to add the same register to the same set more than once.
void addLiveIn(MCRegister Reg, Register vreg = Register()) {
LiveIns.push_back(std::make_pair(Reg, vreg));
}
// Iteration support for the live-ins set. It's kept in sorted order
// by register number.
using livein_iterator =
std::vector<std::pair<MCRegister,Register>>::const_iterator;
livein_iterator livein_begin() const { return LiveIns.begin(); }
livein_iterator livein_end() const { return LiveIns.end(); }
bool livein_empty() const { return LiveIns.empty(); }
ArrayRef<std::pair<MCRegister, Register>> liveins() const {
return LiveIns;
}
bool isLiveIn(Register Reg) const;
/// getLiveInPhysReg - If VReg is a live-in virtual register, return the
/// corresponding live-in physical register.
MCRegister getLiveInPhysReg(Register VReg) const;
/// getLiveInVirtReg - If PReg is a live-in physical register, return the
/// corresponding live-in virtual register.
Register getLiveInVirtReg(MCRegister PReg) const;
/// EmitLiveInCopies - Emit copies to initialize livein virtual registers
/// into the given entry block.
void EmitLiveInCopies(MachineBasicBlock *EntryMBB,
const TargetRegisterInfo &TRI,
const TargetInstrInfo &TII);
/// Returns a mask covering all bits that can appear in lane masks of
/// subregisters of the virtual register @p Reg.
LaneBitmask getMaxLaneMaskForVReg(Register Reg) const;
/// defusechain_iterator - This class provides iterator support for machine
/// operands in the function that use or define a specific register. If
/// ReturnUses is true it returns uses of registers, if ReturnDefs is true it
/// returns defs. If neither are true then you are silly and it always
/// returns end(). If SkipDebug is true it skips uses marked Debug
/// when incrementing.
template <bool ReturnUses, bool ReturnDefs, bool SkipDebug, bool ByOperand,
bool ByInstr, bool ByBundle>
class defusechain_iterator {
friend class MachineRegisterInfo;
public:
using iterator_category = std::forward_iterator_tag;
using value_type = MachineOperand;
using difference_type = std::ptrdiff_t;
using pointer = value_type *;
using reference = value_type &;
private:
MachineOperand *Op = nullptr;
explicit defusechain_iterator(MachineOperand *op) : Op(op) {
// If the first node isn't one we're interested in, advance to one that
// we are interested in.
if (op) {
if ((!ReturnUses && op->isUse()) ||
(!ReturnDefs && op->isDef()) ||
(SkipDebug && op->isDebug()))
advance();
}
}
void advance() {
assert(Op && "Cannot increment end iterator!");
Op = getNextOperandForReg(Op);
// All defs come before the uses, so stop def_iterator early.
if (!ReturnUses) {
if (Op) {
if (Op->isUse())
Op = nullptr;
else
assert(!Op->isDebug() && "Can't have debug defs");
}
} else {
// If this is an operand we don't care about, skip it.
while (Op && ((!ReturnDefs && Op->isDef()) ||
(SkipDebug && Op->isDebug())))
Op = getNextOperandForReg(Op);
}
}
public:
defusechain_iterator() = default;
bool operator==(const defusechain_iterator &x) const {
return Op == x.Op;
}
bool operator!=(const defusechain_iterator &x) const {
return !operator==(x);
}
/// atEnd - return true if this iterator is equal to reg_end() on the value.
bool atEnd() const { return Op == nullptr; }
// Iterator traversal: forward iteration only
defusechain_iterator &operator++() { // Preincrement
assert(Op && "Cannot increment end iterator!");
if (ByOperand)
advance();
else if (ByInstr) {
MachineInstr *P = Op->getParent();
do {
advance();
} while (Op && Op->getParent() == P);
} else if (ByBundle) {
MachineBasicBlock::instr_iterator P =
getBundleStart(Op->getParent()->getIterator());
do {
advance();
} while (Op && getBundleStart(Op->getParent()->getIterator()) == P);
}
return *this;
}
defusechain_iterator operator++(int) { // Postincrement
defusechain_iterator tmp = *this; ++*this; return tmp;
}
/// getOperandNo - Return the operand # of this MachineOperand in its
/// MachineInstr.
unsigned getOperandNo() const {
assert(Op && "Cannot dereference end iterator!");
return Op - &Op->getParent()->getOperand(0);
}
// Retrieve a reference to the current operand.
MachineOperand &operator*() const {
assert(Op && "Cannot dereference end iterator!");
return *Op;
}
MachineOperand *operator->() const {
assert(Op && "Cannot dereference end iterator!");
return Op;
}
};
/// defusechain_iterator - This class provides iterator support for machine
/// operands in the function that use or define a specific register. If
/// ReturnUses is true it returns uses of registers, if ReturnDefs is true it
/// returns defs. If neither are true then you are silly and it always
/// returns end(). If SkipDebug is true it skips uses marked Debug
/// when incrementing.
template <bool ReturnUses, bool ReturnDefs, bool SkipDebug, bool ByOperand,
bool ByInstr, bool ByBundle>
class defusechain_instr_iterator {
friend class MachineRegisterInfo;
public:
using iterator_category = std::forward_iterator_tag;
using value_type = MachineInstr;
using difference_type = std::ptrdiff_t;
using pointer = value_type *;
using reference = value_type &;
private:
MachineOperand *Op = nullptr;
explicit defusechain_instr_iterator(MachineOperand *op) : Op(op) {
// If the first node isn't one we're interested in, advance to one that
// we are interested in.
if (op) {
if ((!ReturnUses && op->isUse()) ||
(!ReturnDefs && op->isDef()) ||
(SkipDebug && op->isDebug()))
advance();
}
}
void advance() {
assert(Op && "Cannot increment end iterator!");
Op = getNextOperandForReg(Op);
// All defs come before the uses, so stop def_iterator early.
if (!ReturnUses) {
if (Op) {
if (Op->isUse())
Op = nullptr;
else
assert(!Op->isDebug() && "Can't have debug defs");
}
} else {
// If this is an operand we don't care about, skip it.
while (Op && ((!ReturnDefs && Op->isDef()) ||
(SkipDebug && Op->isDebug())))
Op = getNextOperandForReg(Op);
}
}
public:
defusechain_instr_iterator() = default;
bool operator==(const defusechain_instr_iterator &x) const {
return Op == x.Op;
}
bool operator!=(const defusechain_instr_iterator &x) const {
return !operator==(x);
}
/// atEnd - return true if this iterator is equal to reg_end() on the value.
bool atEnd() const { return Op == nullptr; }
// Iterator traversal: forward iteration only
defusechain_instr_iterator &operator++() { // Preincrement
assert(Op && "Cannot increment end iterator!");
if (ByOperand)
advance();
else if (ByInstr) {
MachineInstr *P = Op->getParent();
do {
advance();
} while (Op && Op->getParent() == P);
} else if (ByBundle) {
MachineBasicBlock::instr_iterator P =
getBundleStart(Op->getParent()->getIterator());
do {
advance();
} while (Op && getBundleStart(Op->getParent()->getIterator()) == P);
}
return *this;
}
defusechain_instr_iterator operator++(int) { // Postincrement
defusechain_instr_iterator tmp = *this; ++*this; return tmp;
}
// Retrieve a reference to the current operand.
MachineInstr &operator*() const {
assert(Op && "Cannot dereference end iterator!");
if (ByBundle)
return *getBundleStart(Op->getParent()->getIterator());
return *Op->getParent();
}
MachineInstr *operator->() const { return &operator*(); }
};
};
/// Iterate over the pressure sets affected by the given physical or virtual
/// register. If Reg is physical, it must be a register unit (from
/// MCRegUnitIterator).
class PSetIterator {
const int *PSet = nullptr;
unsigned Weight = 0;
public:
PSetIterator() = default;
PSetIterator(Register RegUnit, const MachineRegisterInfo *MRI) {
const TargetRegisterInfo *TRI = MRI->getTargetRegisterInfo();
if (RegUnit.isVirtual()) {
const TargetRegisterClass *RC = MRI->getRegClass(RegUnit);
PSet = TRI->getRegClassPressureSets(RC);
Weight = TRI->getRegClassWeight(RC).RegWeight;
} else {
PSet = TRI->getRegUnitPressureSets(RegUnit);
Weight = TRI->getRegUnitWeight(RegUnit);
}
if (*PSet == -1)
PSet = nullptr;
}
bool isValid() const { return PSet; }
unsigned getWeight() const { return Weight; }
unsigned operator*() const { return *PSet; }
void operator++() {
assert(isValid() && "Invalid PSetIterator.");
++PSet;
if (*PSet == -1)
PSet = nullptr;
}
};
inline PSetIterator
MachineRegisterInfo::getPressureSets(Register RegUnit) const {
return PSetIterator(RegUnit, this);
}
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINEREGISTERINFO_H
PK iwFZ?��2� 2� CodeGen/LiveInterval.hnu �[��� //===- llvm/CodeGen/LiveInterval.h - Interval representation ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements the LiveRange and LiveInterval classes. Given some
// numbering of each the machine instructions an interval [i, j) is said to be a
// live range for register v if there is no instruction with number j' >= j
// such that v is live at j' and there is no instruction with number i' < i such
// that v is live at i'. In this implementation ranges can have holes,
// i.e. a range might look like [1,20), [50,65), [1000,1001). Each
// individual segment is represented as an instance of LiveRange::Segment,
// and the whole range is represented as an instance of LiveRange.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LIVEINTERVAL_H
#define LLVM_CODEGEN_LIVEINTERVAL_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/IntEqClasses.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/Register.h"
#include "llvm/CodeGen/SlotIndexes.h"
#include "llvm/MC/LaneBitmask.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/MathExtras.h"
#include <algorithm>
#include <cassert>
#include <cstddef>
#include <functional>
#include <memory>
#include <set>
#include <tuple>
#include <utility>
namespace llvm {
class CoalescerPair;
class LiveIntervals;
class MachineRegisterInfo;
class raw_ostream;
/// VNInfo - Value Number Information.
/// This class holds information about a machine level values, including
/// definition and use points.
///
class VNInfo {
public:
using Allocator = BumpPtrAllocator;
/// The ID number of this value.
unsigned id;
/// The index of the defining instruction.
SlotIndex def;
/// VNInfo constructor.
VNInfo(unsigned i, SlotIndex d) : id(i), def(d) {}
/// VNInfo constructor, copies values from orig, except for the value number.
VNInfo(unsigned i, const VNInfo &orig) : id(i), def(orig.def) {}
/// Copy from the parameter into this VNInfo.
void copyFrom(VNInfo &src) {
def = src.def;
}
/// Returns true if this value is defined by a PHI instruction (or was,
/// PHI instructions may have been eliminated).
/// PHI-defs begin at a block boundary, all other defs begin at register or
/// EC slots.
bool isPHIDef() const { return def.isBlock(); }
/// Returns true if this value is unused.
bool isUnused() const { return !def.isValid(); }
/// Mark this value as unused.
void markUnused() { def = SlotIndex(); }
};
/// Result of a LiveRange query. This class hides the implementation details
/// of live ranges, and it should be used as the primary interface for
/// examining live ranges around instructions.
class LiveQueryResult {
VNInfo *const EarlyVal;
VNInfo *const LateVal;
const SlotIndex EndPoint;
const bool Kill;
public:
LiveQueryResult(VNInfo *EarlyVal, VNInfo *LateVal, SlotIndex EndPoint,
bool Kill)
: EarlyVal(EarlyVal), LateVal(LateVal), EndPoint(EndPoint), Kill(Kill)
{}
/// Return the value that is live-in to the instruction. This is the value
/// that will be read by the instruction's use operands. Return NULL if no
/// value is live-in.
VNInfo *valueIn() const {
return EarlyVal;
}
/// Return true if the live-in value is killed by this instruction. This
/// means that either the live range ends at the instruction, or it changes
/// value.
bool isKill() const {
return Kill;
}
/// Return true if this instruction has a dead def.
bool isDeadDef() const {
return EndPoint.isDead();
}
/// Return the value leaving the instruction, if any. This can be a
/// live-through value, or a live def. A dead def returns NULL.
VNInfo *valueOut() const {
return isDeadDef() ? nullptr : LateVal;
}
/// Returns the value alive at the end of the instruction, if any. This can
/// be a live-through value, a live def or a dead def.
VNInfo *valueOutOrDead() const {
return LateVal;
}
/// Return the value defined by this instruction, if any. This includes
/// dead defs, it is the value created by the instruction's def operands.
VNInfo *valueDefined() const {
return EarlyVal == LateVal ? nullptr : LateVal;
}
/// Return the end point of the last live range segment to interact with
/// the instruction, if any.
///
/// The end point is an invalid SlotIndex only if the live range doesn't
/// intersect the instruction at all.
///
/// The end point may be at or past the end of the instruction's basic
/// block. That means the value was live out of the block.
SlotIndex endPoint() const {
return EndPoint;
}
};
/// This class represents the liveness of a register, stack slot, etc.
/// It manages an ordered list of Segment objects.
/// The Segments are organized in a static single assignment form: At places
/// where a new value is defined or different values reach a CFG join a new
/// segment with a new value number is used.
class LiveRange {
public:
/// This represents a simple continuous liveness interval for a value.
/// The start point is inclusive, the end point exclusive. These intervals
/// are rendered as [start,end).
struct Segment {
SlotIndex start; // Start point of the interval (inclusive)
SlotIndex end; // End point of the interval (exclusive)
VNInfo *valno = nullptr; // identifier for the value contained in this
// segment.
Segment() = default;
Segment(SlotIndex S, SlotIndex E, VNInfo *V)
: start(S), end(E), valno(V) {
assert(S < E && "Cannot create empty or backwards segment");
}
/// Return true if the index is covered by this segment.
bool contains(SlotIndex I) const {
return start <= I && I < end;
}
/// Return true if the given interval, [S, E), is covered by this segment.
bool containsInterval(SlotIndex S, SlotIndex E) const {
assert((S < E) && "Backwards interval?");
return (start <= S && S < end) && (start < E && E <= end);
}
bool operator<(const Segment &Other) const {
return std::tie(start, end) < std::tie(Other.start, Other.end);
}
bool operator==(const Segment &Other) const {
return start == Other.start && end == Other.end;
}
bool operator!=(const Segment &Other) const {
return !(*this == Other);
}
void dump() const;
};
using Segments = SmallVector<Segment, 2>;
using VNInfoList = SmallVector<VNInfo *, 2>;
Segments segments; // the liveness segments
VNInfoList valnos; // value#'s
// The segment set is used temporarily to accelerate initial computation
// of live ranges of physical registers in computeRegUnitRange.
// After that the set is flushed to the segment vector and deleted.
using SegmentSet = std::set<Segment>;
std::unique_ptr<SegmentSet> segmentSet;
using iterator = Segments::iterator;
using const_iterator = Segments::const_iterator;
iterator begin() { return segments.begin(); }
iterator end() { return segments.end(); }
const_iterator begin() const { return segments.begin(); }
const_iterator end() const { return segments.end(); }
using vni_iterator = VNInfoList::iterator;
using const_vni_iterator = VNInfoList::const_iterator;
vni_iterator vni_begin() { return valnos.begin(); }
vni_iterator vni_end() { return valnos.end(); }
const_vni_iterator vni_begin() const { return valnos.begin(); }
const_vni_iterator vni_end() const { return valnos.end(); }
iterator_range<vni_iterator> vnis() {
return make_range(vni_begin(), vni_end());
}
iterator_range<const_vni_iterator> vnis() const {
return make_range(vni_begin(), vni_end());
}
/// Constructs a new LiveRange object.
LiveRange(bool UseSegmentSet = false)
: segmentSet(UseSegmentSet ? std::make_unique<SegmentSet>()
: nullptr) {}
/// Constructs a new LiveRange object by copying segments and valnos from
/// another LiveRange.
LiveRange(const LiveRange &Other, BumpPtrAllocator &Allocator) {
assert(Other.segmentSet == nullptr &&
"Copying of LiveRanges with active SegmentSets is not supported");
assign(Other, Allocator);
}
/// Copies values numbers and live segments from \p Other into this range.
void assign(const LiveRange &Other, BumpPtrAllocator &Allocator) {
if (this == &Other)
return;
assert(Other.segmentSet == nullptr &&
"Copying of LiveRanges with active SegmentSets is not supported");
// Duplicate valnos.
for (const VNInfo *VNI : Other.valnos)
createValueCopy(VNI, Allocator);
// Now we can copy segments and remap their valnos.
for (const Segment &S : Other.segments)
segments.push_back(Segment(S.start, S.end, valnos[S.valno->id]));
}
/// advanceTo - Advance the specified iterator to point to the Segment
/// containing the specified position, or end() if the position is past the
/// end of the range. If no Segment contains this position, but the
/// position is in a hole, this method returns an iterator pointing to the
/// Segment immediately after the hole.
iterator advanceTo(iterator I, SlotIndex Pos) {
assert(I != end());
if (Pos >= endIndex())
return end();
while (I->end <= Pos) ++I;
return I;
}
const_iterator advanceTo(const_iterator I, SlotIndex Pos) const {
assert(I != end());
if (Pos >= endIndex())
return end();
while (I->end <= Pos) ++I;
return I;
}
/// find - Return an iterator pointing to the first segment that ends after
/// Pos, or end(). This is the same as advanceTo(begin(), Pos), but faster
/// when searching large ranges.
///
/// If Pos is contained in a Segment, that segment is returned.
/// If Pos is in a hole, the following Segment is returned.
/// If Pos is beyond endIndex, end() is returned.
iterator find(SlotIndex Pos);
const_iterator find(SlotIndex Pos) const {
return const_cast<LiveRange*>(this)->find(Pos);
}
void clear() {
valnos.clear();
segments.clear();
}
size_t size() const {
return segments.size();
}
bool hasAtLeastOneValue() const { return !valnos.empty(); }
bool containsOneValue() const { return valnos.size() == 1; }
unsigned getNumValNums() const { return (unsigned)valnos.size(); }
/// getValNumInfo - Returns pointer to the specified val#.
///
inline VNInfo *getValNumInfo(unsigned ValNo) {
return valnos[ValNo];
}
inline const VNInfo *getValNumInfo(unsigned ValNo) const {
return valnos[ValNo];
}
/// containsValue - Returns true if VNI belongs to this range.
bool containsValue(const VNInfo *VNI) const {
return VNI && VNI->id < getNumValNums() && VNI == getValNumInfo(VNI->id);
}
/// getNextValue - Create a new value number and return it. MIIdx specifies
/// the instruction that defines the value number.
VNInfo *getNextValue(SlotIndex def, VNInfo::Allocator &VNInfoAllocator) {
VNInfo *VNI =
new (VNInfoAllocator) VNInfo((unsigned)valnos.size(), def);
valnos.push_back(VNI);
return VNI;
}
/// createDeadDef - Make sure the range has a value defined at Def.
/// If one already exists, return it. Otherwise allocate a new value and
/// add liveness for a dead def.
VNInfo *createDeadDef(SlotIndex Def, VNInfo::Allocator &VNIAlloc);
/// Create a def of value @p VNI. Return @p VNI. If there already exists
/// a definition at VNI->def, the value defined there must be @p VNI.
VNInfo *createDeadDef(VNInfo *VNI);
/// Create a copy of the given value. The new value will be identical except
/// for the Value number.
VNInfo *createValueCopy(const VNInfo *orig,
VNInfo::Allocator &VNInfoAllocator) {
VNInfo *VNI =
new (VNInfoAllocator) VNInfo((unsigned)valnos.size(), *orig);
valnos.push_back(VNI);
return VNI;
}
/// RenumberValues - Renumber all values in order of appearance and remove
/// unused values.
void RenumberValues();
/// MergeValueNumberInto - This method is called when two value numbers
/// are found to be equivalent. This eliminates V1, replacing all
/// segments with the V1 value number with the V2 value number. This can
/// cause merging of V1/V2 values numbers and compaction of the value space.
VNInfo* MergeValueNumberInto(VNInfo *V1, VNInfo *V2);
/// Merge all of the live segments of a specific val# in RHS into this live
/// range as the specified value number. The segments in RHS are allowed
/// to overlap with segments in the current range, it will replace the
/// value numbers of the overlaped live segments with the specified value
/// number.
void MergeSegmentsInAsValue(const LiveRange &RHS, VNInfo *LHSValNo);
/// MergeValueInAsValue - Merge all of the segments of a specific val#
/// in RHS into this live range as the specified value number.
/// The segments in RHS are allowed to overlap with segments in the
/// current range, but only if the overlapping segments have the
/// specified value number.
void MergeValueInAsValue(const LiveRange &RHS,
const VNInfo *RHSValNo, VNInfo *LHSValNo);
bool empty() const { return segments.empty(); }
/// beginIndex - Return the lowest numbered slot covered.
SlotIndex beginIndex() const {
assert(!empty() && "Call to beginIndex() on empty range.");
return segments.front().start;
}
/// endNumber - return the maximum point of the range of the whole,
/// exclusive.
SlotIndex endIndex() const {
assert(!empty() && "Call to endIndex() on empty range.");
return segments.back().end;
}
bool expiredAt(SlotIndex index) const {
return index >= endIndex();
}
bool liveAt(SlotIndex index) const {
const_iterator r = find(index);
return r != end() && r->start <= index;
}
/// Return the segment that contains the specified index, or null if there
/// is none.
const Segment *getSegmentContaining(SlotIndex Idx) const {
const_iterator I = FindSegmentContaining(Idx);
return I == end() ? nullptr : &*I;
}
/// Return the live segment that contains the specified index, or null if
/// there is none.
Segment *getSegmentContaining(SlotIndex Idx) {
iterator I = FindSegmentContaining(Idx);
return I == end() ? nullptr : &*I;
}
/// getVNInfoAt - Return the VNInfo that is live at Idx, or NULL.
VNInfo *getVNInfoAt(SlotIndex Idx) const {
const_iterator I = FindSegmentContaining(Idx);
return I == end() ? nullptr : I->valno;
}
/// getVNInfoBefore - Return the VNInfo that is live up to but not
/// necessarilly including Idx, or NULL. Use this to find the reaching def
/// used by an instruction at this SlotIndex position.
VNInfo *getVNInfoBefore(SlotIndex Idx) const {
const_iterator I = FindSegmentContaining(Idx.getPrevSlot());
return I == end() ? nullptr : I->valno;
}
/// Return an iterator to the segment that contains the specified index, or
/// end() if there is none.
iterator FindSegmentContaining(SlotIndex Idx) {
iterator I = find(Idx);
return I != end() && I->start <= Idx ? I : end();
}
const_iterator FindSegmentContaining(SlotIndex Idx) const {
const_iterator I = find(Idx);
return I != end() && I->start <= Idx ? I : end();
}
/// overlaps - Return true if the intersection of the two live ranges is
/// not empty.
bool overlaps(const LiveRange &other) const {
if (other.empty())
return false;
return overlapsFrom(other, other.begin());
}
/// overlaps - Return true if the two ranges have overlapping segments
/// that are not coalescable according to CP.
///
/// Overlapping segments where one range is defined by a coalescable
/// copy are allowed.
bool overlaps(const LiveRange &Other, const CoalescerPair &CP,
const SlotIndexes&) const;
/// overlaps - Return true if the live range overlaps an interval specified
/// by [Start, End).
bool overlaps(SlotIndex Start, SlotIndex End) const;
/// overlapsFrom - Return true if the intersection of the two live ranges
/// is not empty. The specified iterator is a hint that we can begin
/// scanning the Other range starting at I.
bool overlapsFrom(const LiveRange &Other, const_iterator StartPos) const;
/// Returns true if all segments of the @p Other live range are completely
/// covered by this live range.
/// Adjacent live ranges do not affect the covering:the liverange
/// [1,5](5,10] covers (3,7].
bool covers(const LiveRange &Other) const;
/// Add the specified Segment to this range, merging segments as
/// appropriate. This returns an iterator to the inserted segment (which
/// may have grown since it was inserted).
iterator addSegment(Segment S);
/// Attempt to extend a value defined after @p StartIdx to include @p Use.
/// Both @p StartIdx and @p Use should be in the same basic block. In case
/// of subranges, an extension could be prevented by an explicit "undef"
/// caused by a <def,read-undef> on a non-overlapping lane. The list of
/// location of such "undefs" should be provided in @p Undefs.
/// The return value is a pair: the first element is VNInfo of the value
/// that was extended (possibly nullptr), the second is a boolean value
/// indicating whether an "undef" was encountered.
/// If this range is live before @p Use in the basic block that starts at
/// @p StartIdx, and there is no intervening "undef", extend it to be live
/// up to @p Use, and return the pair {value, false}. If there is no
/// segment before @p Use and there is no "undef" between @p StartIdx and
/// @p Use, return {nullptr, false}. If there is an "undef" before @p Use,
/// return {nullptr, true}.
std::pair<VNInfo*,bool> extendInBlock(ArrayRef<SlotIndex> Undefs,
SlotIndex StartIdx, SlotIndex Kill);
/// Simplified version of the above "extendInBlock", which assumes that
/// no register lanes are undefined by <def,read-undef> operands.
/// If this range is live before @p Use in the basic block that starts
/// at @p StartIdx, extend it to be live up to @p Use, and return the
/// value. If there is no segment before @p Use, return nullptr.
VNInfo *extendInBlock(SlotIndex StartIdx, SlotIndex Kill);
/// join - Join two live ranges (this, and other) together. This applies
/// mappings to the value numbers in the LHS/RHS ranges as specified. If
/// the ranges are not joinable, this aborts.
void join(LiveRange &Other,
const int *ValNoAssignments,
const int *RHSValNoAssignments,
SmallVectorImpl<VNInfo *> &NewVNInfo);
/// True iff this segment is a single segment that lies between the
/// specified boundaries, exclusively. Vregs live across a backedge are not
/// considered local. The boundaries are expected to lie within an extended
/// basic block, so vregs that are not live out should contain no holes.
bool isLocal(SlotIndex Start, SlotIndex End) const {
return beginIndex() > Start.getBaseIndex() &&
endIndex() < End.getBoundaryIndex();
}
/// Remove the specified segment from this range. Note that the segment
/// must be a single Segment in its entirety.
void removeSegment(SlotIndex Start, SlotIndex End,
bool RemoveDeadValNo = false);
void removeSegment(Segment S, bool RemoveDeadValNo = false) {
removeSegment(S.start, S.end, RemoveDeadValNo);
}
/// Remove segment pointed to by iterator @p I from this range.
iterator removeSegment(iterator I, bool RemoveDeadValNo = false);
/// Mark \p ValNo for deletion if no segments in this range use it.
void removeValNoIfDead(VNInfo *ValNo);
/// Query Liveness at Idx.
/// The sub-instruction slot of Idx doesn't matter, only the instruction
/// it refers to is considered.
LiveQueryResult Query(SlotIndex Idx) const {
// Find the segment that enters the instruction.
const_iterator I = find(Idx.getBaseIndex());
const_iterator E = end();
if (I == E)
return LiveQueryResult(nullptr, nullptr, SlotIndex(), false);
// Is this an instruction live-in segment?
// If Idx is the start index of a basic block, include live-in segments
// that start at Idx.getBaseIndex().
VNInfo *EarlyVal = nullptr;
VNInfo *LateVal = nullptr;
SlotIndex EndPoint;
bool Kill = false;
if (I->start <= Idx.getBaseIndex()) {
EarlyVal = I->valno;
EndPoint = I->end;
// Move to the potentially live-out segment.
if (SlotIndex::isSameInstr(Idx, I->end)) {
Kill = true;
if (++I == E)
return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill);
}
// Special case: A PHIDef value can have its def in the middle of a
// segment if the value happens to be live out of the layout
// predecessor.
// Such a value is not live-in.
if (EarlyVal->def == Idx.getBaseIndex())
EarlyVal = nullptr;
}
// I now points to the segment that may be live-through, or defined by
// this instr. Ignore segments starting after the current instr.
if (!SlotIndex::isEarlierInstr(Idx, I->start)) {
LateVal = I->valno;
EndPoint = I->end;
}
return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill);
}
/// removeValNo - Remove all the segments defined by the specified value#.
/// Also remove the value# from value# list.
void removeValNo(VNInfo *ValNo);
/// Returns true if the live range is zero length, i.e. no live segments
/// span instructions. It doesn't pay to spill such a range.
bool isZeroLength(SlotIndexes *Indexes) const {
for (const Segment &S : segments)
if (Indexes->getNextNonNullIndex(S.start).getBaseIndex() <
S.end.getBaseIndex())
return false;
return true;
}
// Returns true if any segment in the live range contains any of the
// provided slot indexes. Slots which occur in holes between
// segments will not cause the function to return true.
bool isLiveAtIndexes(ArrayRef<SlotIndex> Slots) const;
bool operator<(const LiveRange& other) const {
const SlotIndex &thisIndex = beginIndex();
const SlotIndex &otherIndex = other.beginIndex();
return thisIndex < otherIndex;
}
/// Returns true if there is an explicit "undef" between @p Begin
/// @p End.
bool isUndefIn(ArrayRef<SlotIndex> Undefs, SlotIndex Begin,
SlotIndex End) const {
return llvm::any_of(Undefs, [Begin, End](SlotIndex Idx) -> bool {
return Begin <= Idx && Idx < End;
});
}
/// Flush segment set into the regular segment vector.
/// The method is to be called after the live range
/// has been created, if use of the segment set was
/// activated in the constructor of the live range.
void flushSegmentSet();
/// Stores indexes from the input index sequence R at which this LiveRange
/// is live to the output O iterator.
/// R is a range of _ascending sorted_ _random_ access iterators
/// to the input indexes. Indexes stored at O are ascending sorted so it
/// can be used directly in the subsequent search (for example for
/// subranges). Returns true if found at least one index.
template <typename Range, typename OutputIt>
bool findIndexesLiveAt(Range &&R, OutputIt O) const {
assert(llvm::is_sorted(R));
auto Idx = R.begin(), EndIdx = R.end();
auto Seg = segments.begin(), EndSeg = segments.end();
bool Found = false;
while (Idx != EndIdx && Seg != EndSeg) {
// if the Seg is lower find first segment that is above Idx using binary
// search
if (Seg->end <= *Idx) {
Seg =
std::upper_bound(++Seg, EndSeg, *Idx, [=](auto V, const auto &S) {
return V < S.end;
});
if (Seg == EndSeg)
break;
}
auto NotLessStart = std::lower_bound(Idx, EndIdx, Seg->start);
if (NotLessStart == EndIdx)
break;
auto NotLessEnd = std::lower_bound(NotLessStart, EndIdx, Seg->end);
if (NotLessEnd != NotLessStart) {
Found = true;
O = std::copy(NotLessStart, NotLessEnd, O);
}
Idx = NotLessEnd;
++Seg;
}
return Found;
}
void print(raw_ostream &OS) const;
void dump() const;
/// Walk the range and assert if any invariants fail to hold.
///
/// Note that this is a no-op when asserts are disabled.
#ifdef NDEBUG
void verify() const {}
#else
void verify() const;
#endif
protected:
/// Append a segment to the list of segments.
void append(const LiveRange::Segment S);
private:
friend class LiveRangeUpdater;
void addSegmentToSet(Segment S);
void markValNoForDeletion(VNInfo *V);
};
inline raw_ostream &operator<<(raw_ostream &OS, const LiveRange &LR) {
LR.print(OS);
return OS;
}
/// LiveInterval - This class represents the liveness of a register,
/// or stack slot.
class LiveInterval : public LiveRange {
public:
using super = LiveRange;
/// A live range for subregisters. The LaneMask specifies which parts of the
/// super register are covered by the interval.
/// (@sa TargetRegisterInfo::getSubRegIndexLaneMask()).
class SubRange : public LiveRange {
public:
SubRange *Next = nullptr;
LaneBitmask LaneMask;
/// Constructs a new SubRange object.
SubRange(LaneBitmask LaneMask) : LaneMask(LaneMask) {}
/// Constructs a new SubRange object by copying liveness from @p Other.
SubRange(LaneBitmask LaneMask, const LiveRange &Other,
BumpPtrAllocator &Allocator)
: LiveRange(Other, Allocator), LaneMask(LaneMask) {}
void print(raw_ostream &OS) const;
void dump() const;
};
private:
SubRange *SubRanges = nullptr; ///< Single linked list of subregister live
/// ranges.
const Register Reg; // the register or stack slot of this interval.
float Weight = 0.0; // weight of this interval
public:
Register reg() const { return Reg; }
float weight() const { return Weight; }
void incrementWeight(float Inc) { Weight += Inc; }
void setWeight(float Value) { Weight = Value; }
LiveInterval(unsigned Reg, float Weight) : Reg(Reg), Weight(Weight) {}
~LiveInterval() {
clearSubRanges();
}
template<typename T>
class SingleLinkedListIterator {
T *P;
public:
SingleLinkedListIterator(T *P) : P(P) {}
SingleLinkedListIterator<T> &operator++() {
P = P->Next;
return *this;
}
SingleLinkedListIterator<T> operator++(int) {
SingleLinkedListIterator res = *this;
++*this;
return res;
}
bool operator!=(const SingleLinkedListIterator<T> &Other) const {
return P != Other.operator->();
}
bool operator==(const SingleLinkedListIterator<T> &Other) const {
return P == Other.operator->();
}
T &operator*() const {
return *P;
}
T *operator->() const {
return P;
}
};
using subrange_iterator = SingleLinkedListIterator<SubRange>;
using const_subrange_iterator = SingleLinkedListIterator<const SubRange>;
subrange_iterator subrange_begin() {
return subrange_iterator(SubRanges);
}
subrange_iterator subrange_end() {
return subrange_iterator(nullptr);
}
const_subrange_iterator subrange_begin() const {
return const_subrange_iterator(SubRanges);
}
const_subrange_iterator subrange_end() const {
return const_subrange_iterator(nullptr);
}
iterator_range<subrange_iterator> subranges() {
return make_range(subrange_begin(), subrange_end());
}
iterator_range<const_subrange_iterator> subranges() const {
return make_range(subrange_begin(), subrange_end());
}
/// Creates a new empty subregister live range. The range is added at the
/// beginning of the subrange list; subrange iterators stay valid.
SubRange *createSubRange(BumpPtrAllocator &Allocator,
LaneBitmask LaneMask) {
SubRange *Range = new (Allocator) SubRange(LaneMask);
appendSubRange(Range);
return Range;
}
/// Like createSubRange() but the new range is filled with a copy of the
/// liveness information in @p CopyFrom.
SubRange *createSubRangeFrom(BumpPtrAllocator &Allocator,
LaneBitmask LaneMask,
const LiveRange &CopyFrom) {
SubRange *Range = new (Allocator) SubRange(LaneMask, CopyFrom, Allocator);
appendSubRange(Range);
return Range;
}
/// Returns true if subregister liveness information is available.
bool hasSubRanges() const {
return SubRanges != nullptr;
}
/// Removes all subregister liveness information.
void clearSubRanges();
/// Removes all subranges without any segments (subranges without segments
/// are not considered valid and should only exist temporarily).
void removeEmptySubRanges();
/// getSize - Returns the sum of sizes of all the LiveRange's.
///
unsigned getSize() const;
/// isSpillable - Can this interval be spilled?
bool isSpillable() const { return Weight != huge_valf; }
/// markNotSpillable - Mark interval as not spillable
void markNotSpillable() { Weight = huge_valf; }
/// For a given lane mask @p LaneMask, compute indexes at which the
/// lane is marked undefined by subregister <def,read-undef> definitions.
void computeSubRangeUndefs(SmallVectorImpl<SlotIndex> &Undefs,
LaneBitmask LaneMask,
const MachineRegisterInfo &MRI,
const SlotIndexes &Indexes) const;
/// Refines the subranges to support \p LaneMask. This may only be called
/// for LI.hasSubrange()==true. Subregister ranges are split or created
/// until \p LaneMask can be matched exactly. \p Mod is executed on the
/// matching subranges.
///
/// Example:
/// Given an interval with subranges with lanemasks L0F00, L00F0 and
/// L000F, refining for mask L0018. Will split the L00F0 lane into
/// L00E0 and L0010 and the L000F lane into L0007 and L0008. The Mod
/// function will be applied to the L0010 and L0008 subranges.
///
/// \p Indexes and \p TRI are required to clean up the VNIs that
/// don't define the related lane masks after they get shrunk. E.g.,
/// when L000F gets split into L0007 and L0008 maybe only a subset
/// of the VNIs that defined L000F defines L0007.
///
/// The clean up of the VNIs need to look at the actual instructions
/// to decide what is or is not live at a definition point. If the
/// update of the subranges occurs while the IR does not reflect these
/// changes, \p ComposeSubRegIdx can be used to specify how the
/// definition are going to be rewritten.
/// E.g., let say we want to merge:
/// V1.sub1:<2 x s32> = COPY V2.sub3:<4 x s32>
/// We do that by choosing a class where sub1:<2 x s32> and sub3:<4 x s32>
/// overlap, i.e., by choosing a class where we can find "offset + 1 == 3".
/// Put differently we align V2's sub3 with V1's sub1:
/// V2: sub0 sub1 sub2 sub3
/// V1: <offset> sub0 sub1
///
/// This offset will look like a composed subregidx in the the class:
/// V1.(composed sub2 with sub1):<4 x s32> = COPY V2.sub3:<4 x s32>
/// => V1.(composed sub2 with sub1):<4 x s32> = COPY V2.sub3:<4 x s32>
///
/// Now if we didn't rewrite the uses and def of V1, all the checks for V1
/// need to account for this offset.
/// This happens during coalescing where we update the live-ranges while
/// still having the old IR around because updating the IR on-the-fly
/// would actually clobber some information on how the live-ranges that
/// are being updated look like.
void refineSubRanges(BumpPtrAllocator &Allocator, LaneBitmask LaneMask,
std::function<void(LiveInterval::SubRange &)> Apply,
const SlotIndexes &Indexes,
const TargetRegisterInfo &TRI,
unsigned ComposeSubRegIdx = 0);
bool operator<(const LiveInterval& other) const {
const SlotIndex &thisIndex = beginIndex();
const SlotIndex &otherIndex = other.beginIndex();
return std::tie(thisIndex, Reg) < std::tie(otherIndex, other.Reg);
}
void print(raw_ostream &OS) const;
void dump() const;
/// Walks the interval and assert if any invariants fail to hold.
///
/// Note that this is a no-op when asserts are disabled.
#ifdef NDEBUG
void verify(const MachineRegisterInfo *MRI = nullptr) const {}
#else
void verify(const MachineRegisterInfo *MRI = nullptr) const;
#endif
private:
/// Appends @p Range to SubRanges list.
void appendSubRange(SubRange *Range) {
Range->Next = SubRanges;
SubRanges = Range;
}
/// Free memory held by SubRange.
void freeSubRange(SubRange *S);
};
inline raw_ostream &operator<<(raw_ostream &OS,
const LiveInterval::SubRange &SR) {
SR.print(OS);
return OS;
}
inline raw_ostream &operator<<(raw_ostream &OS, const LiveInterval &LI) {
LI.print(OS);
return OS;
}
raw_ostream &operator<<(raw_ostream &OS, const LiveRange::Segment &S);
inline bool operator<(SlotIndex V, const LiveRange::Segment &S) {
return V < S.start;
}
inline bool operator<(const LiveRange::Segment &S, SlotIndex V) {
return S.start < V;
}
/// Helper class for performant LiveRange bulk updates.
///
/// Calling LiveRange::addSegment() repeatedly can be expensive on large
/// live ranges because segments after the insertion point may need to be
/// shifted. The LiveRangeUpdater class can defer the shifting when adding
/// many segments in order.
///
/// The LiveRange will be in an invalid state until flush() is called.
class LiveRangeUpdater {
LiveRange *LR;
SlotIndex LastStart;
LiveRange::iterator WriteI;
LiveRange::iterator ReadI;
SmallVector<LiveRange::Segment, 16> Spills;
void mergeSpills();
public:
/// Create a LiveRangeUpdater for adding segments to LR.
/// LR will temporarily be in an invalid state until flush() is called.
LiveRangeUpdater(LiveRange *lr = nullptr) : LR(lr) {}
~LiveRangeUpdater() { flush(); }
/// Add a segment to LR and coalesce when possible, just like
/// LR.addSegment(). Segments should be added in increasing start order for
/// best performance.
void add(LiveRange::Segment);
void add(SlotIndex Start, SlotIndex End, VNInfo *VNI) {
add(LiveRange::Segment(Start, End, VNI));
}
/// Return true if the LR is currently in an invalid state, and flush()
/// needs to be called.
bool isDirty() const { return LastStart.isValid(); }
/// Flush the updater state to LR so it is valid and contains all added
/// segments.
void flush();
/// Select a different destination live range.
void setDest(LiveRange *lr) {
if (LR != lr && isDirty())
flush();
LR = lr;
}
/// Get the current destination live range.
LiveRange *getDest() const { return LR; }
void dump() const;
void print(raw_ostream&) const;
};
inline raw_ostream &operator<<(raw_ostream &OS, const LiveRangeUpdater &X) {
X.print(OS);
return OS;
}
/// ConnectedVNInfoEqClasses - Helper class that can divide VNInfos in a
/// LiveInterval into equivalence clases of connected components. A
/// LiveInterval that has multiple connected components can be broken into
/// multiple LiveIntervals.
///
/// Given a LiveInterval that may have multiple connected components, run:
///
/// unsigned numComps = ConEQ.Classify(LI);
/// if (numComps > 1) {
/// // allocate numComps-1 new LiveIntervals into LIS[1..]
/// ConEQ.Distribute(LIS);
/// }
class ConnectedVNInfoEqClasses {
LiveIntervals &LIS;
IntEqClasses EqClass;
public:
explicit ConnectedVNInfoEqClasses(LiveIntervals &lis) : LIS(lis) {}
/// Classify the values in \p LR into connected components.
/// Returns the number of connected components.
unsigned Classify(const LiveRange &LR);
/// getEqClass - Classify creates equivalence classes numbered 0..N. Return
/// the equivalence class assigned the VNI.
unsigned getEqClass(const VNInfo *VNI) const { return EqClass[VNI->id]; }
/// Distribute values in \p LI into a separate LiveIntervals
/// for each connected component. LIV must have an empty LiveInterval for
/// each additional connected component. The first connected component is
/// left in \p LI.
void Distribute(LiveInterval &LI, LiveInterval *LIV[],
MachineRegisterInfo &MRI);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_LIVEINTERVAL_H
PK iwFZ�s� � CodeGen/LoopTraversal.hnu �[��� //==------ llvm/CodeGen/LoopTraversal.h - Loop Traversal -*- C++ -*---------==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file Loop Traversal logic.
///
/// This class provides the basic blocks traversal order used by passes like
/// ReachingDefAnalysis and ExecutionDomainFix.
/// It identifies basic blocks that are part of loops and should to be visited
/// twice and returns efficient traversal order for all the blocks.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LOOPTRAVERSAL_H
#define LLVM_CODEGEN_LOOPTRAVERSAL_H
#include "llvm/ADT/SmallVector.h"
namespace llvm {
class MachineBasicBlock;
class MachineFunction;
/// This class provides the basic blocks traversal order used by passes like
/// ReachingDefAnalysis and ExecutionDomainFix.
/// It identifies basic blocks that are part of loops and should to be visited
/// twice and returns efficient traversal order for all the blocks.
///
/// We want to visit every instruction in every basic block in order to update
/// it's execution domain or collect clearance information. However, for the
/// clearance calculation, we need to know clearances from all predecessors
/// (including any backedges), therfore we need to visit some blocks twice.
/// As an example, consider the following loop.
///
///
/// PH -> A -> B (xmm<Undef> -> xmm<Def>) -> C -> D -> EXIT
/// ^ |
/// +----------------------------------+
///
/// The iteration order this pass will return is as follows:
/// Optimized: PH A B C A' B' C' D
///
/// The basic block order is constructed as follows:
/// Once we finish processing some block, we update the counters in MBBInfos
/// and re-process any successors that are now 'done'.
/// We call a block that is ready for its final round of processing `done`
/// (isBlockDone), e.g. when all predecessor information is known.
///
/// Note that a naive traversal order would be to do two complete passes over
/// all basic blocks/instructions, the first for recording clearances, the
/// second for updating clearance based on backedges.
/// However, for functions without backedges, or functions with a lot of
/// straight-line code, and a small loop, that would be a lot of unnecessary
/// work (since only the BBs that are part of the loop require two passes).
///
/// E.g., the naive iteration order for the above exmple is as follows:
/// Naive: PH A B C D A' B' C' D'
///
/// In the optimized approach we avoid processing D twice, because we
/// can entirely process the predecessors before getting to D.
class LoopTraversal {
private:
struct MBBInfo {
/// Whether we have gotten to this block in primary processing yet.
bool PrimaryCompleted = false;
/// The number of predecessors for which primary processing has completed
unsigned IncomingProcessed = 0;
/// The value of `IncomingProcessed` at the start of primary processing
unsigned PrimaryIncoming = 0;
/// The number of predecessors for which all processing steps are done.
unsigned IncomingCompleted = 0;
MBBInfo() = default;
};
using MBBInfoMap = SmallVector<MBBInfo, 4>;
/// Helps keep track if we proccessed this block and all its predecessors.
MBBInfoMap MBBInfos;
public:
struct TraversedMBBInfo {
/// The basic block.
MachineBasicBlock *MBB = nullptr;
/// True if this is the first time we process the basic block.
bool PrimaryPass = true;
/// True if the block that is ready for its final round of processing.
bool IsDone = true;
TraversedMBBInfo(MachineBasicBlock *BB = nullptr, bool Primary = true,
bool Done = true)
: MBB(BB), PrimaryPass(Primary), IsDone(Done) {}
};
LoopTraversal() = default;
/// Identifies basic blocks that are part of loops and should to be
/// visited twice and returns efficient traversal order for all the blocks.
typedef SmallVector<TraversedMBBInfo, 4> TraversalOrder;
TraversalOrder traverse(MachineFunction &MF);
private:
/// Returens true if the block is ready for its final round of processing.
bool isBlockDone(MachineBasicBlock *MBB);
};
} // namespace llvm
#endif // LLVM_CODEGEN_LOOPTRAVERSAL_H
PK iwFZhi � � CodeGen/ReplaceWithVeclib.hnu �[��� //===- ReplaceWithVeclib.h - Replace vector intrinsics with veclib calls --===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Replaces calls to LLVM vector intrinsics (i.e., calls to LLVM intrinsics
// with vector operands) with matching calls to functions from a vector
// library (e.g., libmvec, SVML) according to TargetLibraryInfo.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_REPLACEWITHVECLIB_H
#define LLVM_CODEGEN_REPLACEWITHVECLIB_H
#include "llvm/IR/PassManager.h"
#include "llvm/InitializePasses.h"
#include "llvm/Pass.h"
#include "llvm/PassRegistry.h"
namespace llvm {
class Function;
struct ReplaceWithVeclib : public PassInfoMixin<ReplaceWithVeclib> {
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
// Legacy pass
struct ReplaceWithVeclibLegacy : public FunctionPass {
static char ID;
ReplaceWithVeclibLegacy() : FunctionPass(ID) {
initializeReplaceWithVeclibLegacyPass(*PassRegistry::getPassRegistry());
}
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnFunction(Function &F) override;
};
} // End namespace llvm
#endif // LLVM_CODEGEN_REPLACEWITHVECLIB_H
PK iwFZ�!�� � CodeGen/GCMetadataPrinter.hnu �[��� //===- llvm/CodeGen/GCMetadataPrinter.h - Prints asm GC tables --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// The abstract base class GCMetadataPrinter supports writing GC metadata tables
// as assembly code. This is a separate class from GCStrategy in order to allow
// users of the LLVM JIT to avoid linking with the AsmWriter.
//
// Subclasses of GCMetadataPrinter must be registered using the
// GCMetadataPrinterRegistry. This is separate from the GCStrategy itself
// because these subclasses are logically plugins for the AsmWriter.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_GCMETADATAPRINTER_H
#define LLVM_CODEGEN_GCMETADATAPRINTER_H
#include "llvm/Support/Registry.h"
namespace llvm {
class AsmPrinter;
class GCMetadataPrinter;
class GCModuleInfo;
class GCStrategy;
class Module;
class StackMaps;
/// GCMetadataPrinterRegistry - The GC assembly printer registry uses all the
/// defaults from Registry.
using GCMetadataPrinterRegistry = Registry<GCMetadataPrinter>;
/// GCMetadataPrinter - Emits GC metadata as assembly code. Instances are
/// created, managed, and owned by the AsmPrinter.
class GCMetadataPrinter {
private:
friend class AsmPrinter;
GCStrategy *S;
protected:
// May only be subclassed.
GCMetadataPrinter();
public:
GCMetadataPrinter(const GCMetadataPrinter &) = delete;
GCMetadataPrinter &operator=(const GCMetadataPrinter &) = delete;
virtual ~GCMetadataPrinter();
GCStrategy &getStrategy() { return *S; }
/// Called before the assembly for the module is generated by
/// the AsmPrinter (but after target specific hooks.)
virtual void beginAssembly(Module &M, GCModuleInfo &Info, AsmPrinter &AP) {}
/// Called after the assembly for the module is generated by
/// the AsmPrinter (but before target specific hooks)
virtual void finishAssembly(Module &M, GCModuleInfo &Info, AsmPrinter &AP) {}
/// Called when the stack maps are generated. Return true if
/// stack maps with a custom format are generated. Otherwise
/// returns false and the default format will be used.
virtual bool emitStackMaps(StackMaps &SM, AsmPrinter &AP) { return false; }
};
} // end namespace llvm
#endif // LLVM_CODEGEN_GCMETADATAPRINTER_H
PK iwFZ���7� � CodeGen/Spiller.hnu �[��� //===- llvm/CodeGen/Spiller.h - Spiller -------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_SPILLER_H
#define LLVM_CODEGEN_SPILLER_H
namespace llvm {
class LiveRangeEdit;
class MachineFunction;
class MachineFunctionPass;
class VirtRegMap;
class VirtRegAuxInfo;
/// Spiller interface.
///
/// Implementations are utility classes which insert spill or remat code on
/// demand.
class Spiller {
virtual void anchor();
public:
virtual ~Spiller() = 0;
/// spill - Spill the LRE.getParent() live interval.
virtual void spill(LiveRangeEdit &LRE) = 0;
virtual void postOptimization() {}
};
/// Create and return a spiller that will insert spill code directly instead
/// of deferring though VirtRegMap.
Spiller *createInlineSpiller(MachineFunctionPass &Pass, MachineFunction &MF,
VirtRegMap &VRM, VirtRegAuxInfo &VRAI);
} // end namespace llvm
#endif // LLVM_CODEGEN_SPILLER_H
PK iwFZӇ���) �) CodeGen/MachineInstrBundle.hnu �[��� //===- llvm/CodeGen/MachineInstrBundle.h - MI bundle utilities --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provide utility functions to manipulate machine instruction
// bundles.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEINSTRBUNDLE_H
#define LLVM_CODEGEN_MACHINEINSTRBUNDLE_H
#include "llvm/CodeGen/MachineBasicBlock.h"
namespace llvm {
/// finalizeBundle - Finalize a machine instruction bundle which includes
/// a sequence of instructions starting from FirstMI to LastMI (exclusive).
/// This routine adds a BUNDLE instruction to represent the bundle, it adds
/// IsInternalRead markers to MachineOperands which are defined inside the
/// bundle, and it copies externally visible defs and uses to the BUNDLE
/// instruction.
void finalizeBundle(MachineBasicBlock &MBB,
MachineBasicBlock::instr_iterator FirstMI,
MachineBasicBlock::instr_iterator LastMI);
/// finalizeBundle - Same functionality as the previous finalizeBundle except
/// the last instruction in the bundle is not provided as an input. This is
/// used in cases where bundles are pre-determined by marking instructions
/// with 'InsideBundle' marker. It returns the MBB instruction iterator that
/// points to the end of the bundle.
MachineBasicBlock::instr_iterator finalizeBundle(MachineBasicBlock &MBB,
MachineBasicBlock::instr_iterator FirstMI);
/// finalizeBundles - Finalize instruction bundles in the specified
/// MachineFunction. Return true if any bundles are finalized.
bool finalizeBundles(MachineFunction &MF);
/// Returns an iterator to the first instruction in the bundle containing \p I.
inline MachineBasicBlock::instr_iterator getBundleStart(
MachineBasicBlock::instr_iterator I) {
while (I->isBundledWithPred())
--I;
return I;
}
/// Returns an iterator to the first instruction in the bundle containing \p I.
inline MachineBasicBlock::const_instr_iterator getBundleStart(
MachineBasicBlock::const_instr_iterator I) {
while (I->isBundledWithPred())
--I;
return I;
}
/// Returns an iterator pointing beyond the bundle containing \p I.
inline MachineBasicBlock::instr_iterator getBundleEnd(
MachineBasicBlock::instr_iterator I) {
while (I->isBundledWithSucc())
++I;
++I;
return I;
}
/// Returns an iterator pointing beyond the bundle containing \p I.
inline MachineBasicBlock::const_instr_iterator getBundleEnd(
MachineBasicBlock::const_instr_iterator I) {
while (I->isBundledWithSucc())
++I;
++I;
return I;
}
//===----------------------------------------------------------------------===//
// MachineBundleOperand iterator
//
/// MIBundleOperandIteratorBase - Iterator that visits all operands in a bundle
/// of MachineInstrs. This class is not intended to be used directly, use one
/// of the sub-classes instead.
///
/// Intended use:
///
/// for (MIBundleOperands MIO(MI); MIO.isValid(); ++MIO) {
/// if (!MIO->isReg())
/// continue;
/// ...
/// }
///
template <typename ValueT>
class MIBundleOperandIteratorBase
: public iterator_facade_base<MIBundleOperandIteratorBase<ValueT>,
std::forward_iterator_tag, ValueT> {
MachineBasicBlock::instr_iterator InstrI, InstrE;
MachineInstr::mop_iterator OpI, OpE;
// If the operands on InstrI are exhausted, advance InstrI to the next
// bundled instruction with operands.
void advance() {
while (OpI == OpE) {
// Don't advance off the basic block, or into a new bundle.
if (++InstrI == InstrE || !InstrI->isInsideBundle()) {
InstrI = InstrE;
break;
}
OpI = InstrI->operands_begin();
OpE = InstrI->operands_end();
}
}
protected:
/// MIBundleOperandIteratorBase - Create an iterator that visits all operands
/// on MI, or all operands on every instruction in the bundle containing MI.
///
/// @param MI The instruction to examine.
///
explicit MIBundleOperandIteratorBase(MachineInstr &MI) {
InstrI = getBundleStart(MI.getIterator());
InstrE = MI.getParent()->instr_end();
OpI = InstrI->operands_begin();
OpE = InstrI->operands_end();
advance();
}
/// Constructor for an iterator past the last iteration: both instruction
/// iterators point to the end of the BB and OpI == OpE.
explicit MIBundleOperandIteratorBase(MachineBasicBlock::instr_iterator InstrE,
MachineInstr::mop_iterator OpE)
: InstrI(InstrE), InstrE(InstrE), OpI(OpE), OpE(OpE) {}
public:
/// isValid - Returns true until all the operands have been visited.
bool isValid() const { return OpI != OpE; }
/// Preincrement. Move to the next operand.
void operator++() {
assert(isValid() && "Cannot advance MIOperands beyond the last operand");
++OpI;
advance();
}
ValueT &operator*() const { return *OpI; }
ValueT *operator->() const { return &*OpI; }
bool operator==(const MIBundleOperandIteratorBase &Arg) const {
// Iterators are equal, if InstrI matches and either OpIs match or OpI ==
// OpE match for both. The second condition allows us to construct an 'end'
// iterator, without finding the last instruction in a bundle up-front.
return InstrI == Arg.InstrI &&
(OpI == Arg.OpI || (OpI == OpE && Arg.OpI == Arg.OpE));
}
/// getOperandNo - Returns the number of the current operand relative to its
/// instruction.
///
unsigned getOperandNo() const {
return OpI - InstrI->operands_begin();
}
};
/// MIBundleOperands - Iterate over all operands in a bundle of machine
/// instructions.
///
class MIBundleOperands : public MIBundleOperandIteratorBase<MachineOperand> {
/// Constructor for an iterator past the last iteration.
MIBundleOperands(MachineBasicBlock::instr_iterator InstrE,
MachineInstr::mop_iterator OpE)
: MIBundleOperandIteratorBase(InstrE, OpE) {}
public:
MIBundleOperands(MachineInstr &MI) : MIBundleOperandIteratorBase(MI) {}
/// Returns an iterator past the last iteration.
static MIBundleOperands end(const MachineBasicBlock &MBB) {
return {const_cast<MachineBasicBlock &>(MBB).instr_end(),
const_cast<MachineBasicBlock &>(MBB).instr_begin()->operands_end()};
}
};
/// ConstMIBundleOperands - Iterate over all operands in a const bundle of
/// machine instructions.
///
class ConstMIBundleOperands
: public MIBundleOperandIteratorBase<const MachineOperand> {
/// Constructor for an iterator past the last iteration.
ConstMIBundleOperands(MachineBasicBlock::instr_iterator InstrE,
MachineInstr::mop_iterator OpE)
: MIBundleOperandIteratorBase(InstrE, OpE) {}
public:
ConstMIBundleOperands(const MachineInstr &MI)
: MIBundleOperandIteratorBase(const_cast<MachineInstr &>(MI)) {}
/// Returns an iterator past the last iteration.
static ConstMIBundleOperands end(const MachineBasicBlock &MBB) {
return {const_cast<MachineBasicBlock &>(MBB).instr_end(),
const_cast<MachineBasicBlock &>(MBB).instr_begin()->operands_end()};
}
};
inline iterator_range<ConstMIBundleOperands>
const_mi_bundle_ops(const MachineInstr &MI) {
return make_range(ConstMIBundleOperands(MI),
ConstMIBundleOperands::end(*MI.getParent()));
}
inline iterator_range<MIBundleOperands> mi_bundle_ops(MachineInstr &MI) {
return make_range(MIBundleOperands(MI),
MIBundleOperands::end(*MI.getParent()));
}
/// VirtRegInfo - Information about a virtual register used by a set of
/// operands.
///
struct VirtRegInfo {
/// Reads - One of the operands read the virtual register. This does not
/// include undef or internal use operands, see MO::readsReg().
bool Reads;
/// Writes - One of the operands writes the virtual register.
bool Writes;
/// Tied - Uses and defs must use the same register. This can be because of
/// a two-address constraint, or there may be a partial redefinition of a
/// sub-register.
bool Tied;
};
/// AnalyzeVirtRegInBundle - Analyze how the current instruction or bundle uses
/// a virtual register. This function should not be called after operator++(),
/// it expects a fresh iterator.
///
/// @param Reg The virtual register to analyze.
/// @param Ops When set, this vector will receive an (MI, OpNum) entry for
/// each operand referring to Reg.
/// @returns A filled-in RegInfo struct.
VirtRegInfo AnalyzeVirtRegInBundle(
MachineInstr &MI, Register Reg,
SmallVectorImpl<std::pair<MachineInstr *, unsigned>> *Ops = nullptr);
/// Return a pair of lane masks (reads, writes) indicating which lanes this
/// instruction uses with Reg.
std::pair<LaneBitmask, LaneBitmask>
AnalyzeVirtRegLanesInBundle(const MachineInstr &MI, Register Reg,
const MachineRegisterInfo &MRI,
const TargetRegisterInfo &TRI);
/// Information about how a physical register Reg is used by a set of
/// operands.
struct PhysRegInfo {
/// There is a regmask operand indicating Reg is clobbered.
/// \see MachineOperand::CreateRegMask().
bool Clobbered;
/// Reg or one of its aliases is defined. The definition may only cover
/// parts of the register.
bool Defined;
/// Reg or a super-register is defined. The definition covers the full
/// register.
bool FullyDefined;
/// Reg or one of its aliases is read. The register may only be read
/// partially.
bool Read;
/// Reg or a super-register is read. The full register is read.
bool FullyRead;
/// Either:
/// - Reg is FullyDefined and all defs of reg or an overlapping
/// register are dead, or
/// - Reg is completely dead because "defined" by a clobber.
bool DeadDef;
/// Reg is Defined and all defs of reg or an overlapping register are
/// dead.
bool PartialDeadDef;
/// There is a use operand of reg or a super-register with kill flag set.
bool Killed;
};
/// AnalyzePhysRegInBundle - Analyze how the current instruction or bundle uses
/// a physical register. This function should not be called after operator++(),
/// it expects a fresh iterator.
///
/// @param Reg The physical register to analyze.
/// @returns A filled-in PhysRegInfo struct.
PhysRegInfo AnalyzePhysRegInBundle(const MachineInstr &MI, Register Reg,
const TargetRegisterInfo *TRI);
} // End llvm namespace
#endif
PK iwFZa26��� �� CodeGen/TargetRegisterInfo.hnu �[��� //==- CodeGen/TargetRegisterInfo.h - Target Register Information -*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file describes an abstract interface used to get information about a
// target machines register file. This information is used for a variety of
// purposed, especially register allocation.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_TARGETREGISTERINFO_H
#define LLVM_CODEGEN_TARGETREGISTERINFO_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/RegisterBank.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/MC/LaneBitmask.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Printable.h"
#include <cassert>
#include <cstdint>
namespace llvm {
class BitVector;
class DIExpression;
class LiveRegMatrix;
class MachineFunction;
class MachineInstr;
class RegScavenger;
class VirtRegMap;
class LiveIntervals;
class LiveInterval;
class TargetRegisterClass {
public:
using iterator = const MCPhysReg *;
using const_iterator = const MCPhysReg *;
using sc_iterator = const TargetRegisterClass* const *;
// Instance variables filled by tablegen, do not use!
const MCRegisterClass *MC;
const uint32_t *SubClassMask;
const uint16_t *SuperRegIndices;
const LaneBitmask LaneMask;
/// Classes with a higher priority value are assigned first by register
/// allocators using a greedy heuristic. The value is in the range [0,31].
const uint8_t AllocationPriority;
// Change allocation priority heuristic used by greedy.
const bool GlobalPriority;
/// Configurable target specific flags.
const uint8_t TSFlags;
/// Whether the class supports two (or more) disjunct subregister indices.
const bool HasDisjunctSubRegs;
/// Whether a combination of subregisters can cover every register in the
/// class. See also the CoveredBySubRegs description in Target.td.
const bool CoveredBySubRegs;
const sc_iterator SuperClasses;
ArrayRef<MCPhysReg> (*OrderFunc)(const MachineFunction&);
/// Return the register class ID number.
unsigned getID() const { return MC->getID(); }
/// begin/end - Return all of the registers in this class.
///
iterator begin() const { return MC->begin(); }
iterator end() const { return MC->end(); }
/// Return the number of registers in this class.
unsigned getNumRegs() const { return MC->getNumRegs(); }
iterator_range<SmallVectorImpl<MCPhysReg>::const_iterator>
getRegisters() const {
return make_range(MC->begin(), MC->end());
}
/// Return the specified register in the class.
MCRegister getRegister(unsigned i) const {
return MC->getRegister(i);
}
/// Return true if the specified register is included in this register class.
/// This does not include virtual registers.
bool contains(Register Reg) const {
/// FIXME: Historically this function has returned false when given vregs
/// but it should probably only receive physical registers
if (!Reg.isPhysical())
return false;
return MC->contains(Reg.asMCReg());
}
/// Return true if both registers are in this class.
bool contains(Register Reg1, Register Reg2) const {
/// FIXME: Historically this function has returned false when given a vregs
/// but it should probably only receive physical registers
if (!Reg1.isPhysical() || !Reg2.isPhysical())
return false;
return MC->contains(Reg1.asMCReg(), Reg2.asMCReg());
}
/// Return the cost of copying a value between two registers in this class.
/// A negative number means the register class is very expensive
/// to copy e.g. status flag register classes.
int getCopyCost() const { return MC->getCopyCost(); }
/// Return true if this register class may be used to create virtual
/// registers.
bool isAllocatable() const { return MC->isAllocatable(); }
/// Return true if the specified TargetRegisterClass
/// is a proper sub-class of this TargetRegisterClass.
bool hasSubClass(const TargetRegisterClass *RC) const {
return RC != this && hasSubClassEq(RC);
}
/// Returns true if RC is a sub-class of or equal to this class.
bool hasSubClassEq(const TargetRegisterClass *RC) const {
unsigned ID = RC->getID();
return (SubClassMask[ID / 32] >> (ID % 32)) & 1;
}
/// Return true if the specified TargetRegisterClass is a
/// proper super-class of this TargetRegisterClass.
bool hasSuperClass(const TargetRegisterClass *RC) const {
return RC->hasSubClass(this);
}
/// Returns true if RC is a super-class of or equal to this class.
bool hasSuperClassEq(const TargetRegisterClass *RC) const {
return RC->hasSubClassEq(this);
}
/// Returns a bit vector of subclasses, including this one.
/// The vector is indexed by class IDs.
///
/// To use it, consider the returned array as a chunk of memory that
/// contains an array of bits of size NumRegClasses. Each 32-bit chunk
/// contains a bitset of the ID of the subclasses in big-endian style.
/// I.e., the representation of the memory from left to right at the
/// bit level looks like:
/// [31 30 ... 1 0] [ 63 62 ... 33 32] ...
/// [ XXX NumRegClasses NumRegClasses - 1 ... ]
/// Where the number represents the class ID and XXX bits that
/// should be ignored.
///
/// See the implementation of hasSubClassEq for an example of how it
/// can be used.
const uint32_t *getSubClassMask() const {
return SubClassMask;
}
/// Returns a 0-terminated list of sub-register indices that project some
/// super-register class into this register class. The list has an entry for
/// each Idx such that:
///
/// There exists SuperRC where:
/// For all Reg in SuperRC:
/// this->contains(Reg:Idx)
const uint16_t *getSuperRegIndices() const {
return SuperRegIndices;
}
/// Returns a NULL-terminated list of super-classes. The
/// classes are ordered by ID which is also a topological ordering from large
/// to small classes. The list does NOT include the current class.
sc_iterator getSuperClasses() const {
return SuperClasses;
}
/// Return true if this TargetRegisterClass is a subset
/// class of at least one other TargetRegisterClass.
bool isASubClass() const {
return SuperClasses[0] != nullptr;
}
/// Returns the preferred order for allocating registers from this register
/// class in MF. The raw order comes directly from the .td file and may
/// include reserved registers that are not allocatable.
/// Register allocators should also make sure to allocate
/// callee-saved registers only after all the volatiles are used. The
/// RegisterClassInfo class provides filtered allocation orders with
/// callee-saved registers moved to the end.
///
/// The MachineFunction argument can be used to tune the allocatable
/// registers based on the characteristics of the function, subtarget, or
/// other criteria.
///
/// By default, this method returns all registers in the class.
ArrayRef<MCPhysReg> getRawAllocationOrder(const MachineFunction &MF) const {
return OrderFunc ? OrderFunc(MF) : ArrayRef(begin(), getNumRegs());
}
/// Returns the combination of all lane masks of register in this class.
/// The lane masks of the registers are the combination of all lane masks
/// of their subregisters. Returns 1 if there are no subregisters.
LaneBitmask getLaneMask() const {
return LaneMask;
}
};
/// Extra information, not in MCRegisterDesc, about registers.
/// These are used by codegen, not by MC.
struct TargetRegisterInfoDesc {
const uint8_t *CostPerUse; // Extra cost of instructions using register.
unsigned NumCosts; // Number of cost values associated with each register.
const bool
*InAllocatableClass; // Register belongs to an allocatable regclass.
};
/// Each TargetRegisterClass has a per register weight, and weight
/// limit which must be less than the limits of its pressure sets.
struct RegClassWeight {
unsigned RegWeight;
unsigned WeightLimit;
};
/// TargetRegisterInfo base class - We assume that the target defines a static
/// array of TargetRegisterDesc objects that represent all of the machine
/// registers that the target has. As such, we simply have to track a pointer
/// to this array so that we can turn register number into a register
/// descriptor.
///
class TargetRegisterInfo : public MCRegisterInfo {
public:
using regclass_iterator = const TargetRegisterClass * const *;
using vt_iterator = const MVT::SimpleValueType *;
struct RegClassInfo {
unsigned RegSize, SpillSize, SpillAlignment;
vt_iterator VTList;
};
private:
const TargetRegisterInfoDesc *InfoDesc; // Extra desc array for codegen
const char *const *SubRegIndexNames; // Names of subreg indexes.
// Pointer to array of lane masks, one per sub-reg index.
const LaneBitmask *SubRegIndexLaneMasks;
regclass_iterator RegClassBegin, RegClassEnd; // List of regclasses
LaneBitmask CoveringLanes;
const RegClassInfo *const RCInfos;
unsigned HwMode;
protected:
TargetRegisterInfo(const TargetRegisterInfoDesc *ID,
regclass_iterator RCB,
regclass_iterator RCE,
const char *const *SRINames,
const LaneBitmask *SRILaneMasks,
LaneBitmask CoveringLanes,
const RegClassInfo *const RCIs,
unsigned Mode = 0);
virtual ~TargetRegisterInfo();
public:
// Register numbers can represent physical registers, virtual registers, and
// sometimes stack slots. The unsigned values are divided into these ranges:
//
// 0 Not a register, can be used as a sentinel.
// [1;2^30) Physical registers assigned by TableGen.
// [2^30;2^31) Stack slots. (Rarely used.)
// [2^31;2^32) Virtual registers assigned by MachineRegisterInfo.
//
// Further sentinels can be allocated from the small negative integers.
// DenseMapInfo<unsigned> uses -1u and -2u.
/// Return the size in bits of a register from class RC.
unsigned getRegSizeInBits(const TargetRegisterClass &RC) const {
return getRegClassInfo(RC).RegSize;
}
/// Return the size in bytes of the stack slot allocated to hold a spilled
/// copy of a register from class RC.
unsigned getSpillSize(const TargetRegisterClass &RC) const {
return getRegClassInfo(RC).SpillSize / 8;
}
/// Return the minimum required alignment in bytes for a spill slot for
/// a register of this class.
Align getSpillAlign(const TargetRegisterClass &RC) const {
return Align(getRegClassInfo(RC).SpillAlignment / 8);
}
/// Return true if the given TargetRegisterClass has the ValueType T.
bool isTypeLegalForClass(const TargetRegisterClass &RC, MVT T) const {
for (auto I = legalclasstypes_begin(RC); *I != MVT::Other; ++I)
if (MVT(*I) == T)
return true;
return false;
}
/// Return true if the given TargetRegisterClass is compatible with LLT T.
bool isTypeLegalForClass(const TargetRegisterClass &RC, LLT T) const {
for (auto I = legalclasstypes_begin(RC); *I != MVT::Other; ++I) {
MVT VT(*I);
if (VT == MVT::Untyped)
return true;
if (LLT(VT) == T)
return true;
}
return false;
}
/// Loop over all of the value types that can be represented by values
/// in the given register class.
vt_iterator legalclasstypes_begin(const TargetRegisterClass &RC) const {
return getRegClassInfo(RC).VTList;
}
vt_iterator legalclasstypes_end(const TargetRegisterClass &RC) const {
vt_iterator I = legalclasstypes_begin(RC);
while (*I != MVT::Other)
++I;
return I;
}
/// Returns the Register Class of a physical register of the given type,
/// picking the most sub register class of the right type that contains this
/// physreg.
const TargetRegisterClass *getMinimalPhysRegClass(MCRegister Reg,
MVT VT = MVT::Other) const;
/// Returns the Register Class of a physical register of the given type,
/// picking the most sub register class of the right type that contains this
/// physreg. If there is no register class compatible with the given type,
/// returns nullptr.
const TargetRegisterClass *getMinimalPhysRegClassLLT(MCRegister Reg,
LLT Ty = LLT()) const;
/// Return the maximal subclass of the given register class that is
/// allocatable or NULL.
const TargetRegisterClass *
getAllocatableClass(const TargetRegisterClass *RC) const;
/// Returns a bitset indexed by register number indicating if a register is
/// allocatable or not. If a register class is specified, returns the subset
/// for the class.
BitVector getAllocatableSet(const MachineFunction &MF,
const TargetRegisterClass *RC = nullptr) const;
/// Get a list of cost values for all registers that correspond to the index
/// returned by RegisterCostTableIndex.
ArrayRef<uint8_t> getRegisterCosts(const MachineFunction &MF) const {
unsigned Idx = getRegisterCostTableIndex(MF);
unsigned NumRegs = getNumRegs();
assert(Idx < InfoDesc->NumCosts && "CostPerUse index out of bounds");
return ArrayRef(&InfoDesc->CostPerUse[Idx * NumRegs], NumRegs);
}
/// Return true if the register is in the allocation of any register class.
bool isInAllocatableClass(MCRegister RegNo) const {
return InfoDesc->InAllocatableClass[RegNo];
}
/// Return the human-readable symbolic target-specific
/// name for the specified SubRegIndex.
const char *getSubRegIndexName(unsigned SubIdx) const {
assert(SubIdx && SubIdx < getNumSubRegIndices() &&
"This is not a subregister index");
return SubRegIndexNames[SubIdx-1];
}
/// Return a bitmask representing the parts of a register that are covered by
/// SubIdx \see LaneBitmask.
///
/// SubIdx == 0 is allowed, it has the lane mask ~0u.
LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const {
assert(SubIdx < getNumSubRegIndices() && "This is not a subregister index");
return SubRegIndexLaneMasks[SubIdx];
}
/// Try to find one or more subregister indexes to cover \p LaneMask.
///
/// If this is possible, returns true and appends the best matching set of
/// indexes to \p Indexes. If this is not possible, returns false.
bool getCoveringSubRegIndexes(const MachineRegisterInfo &MRI,
const TargetRegisterClass *RC,
LaneBitmask LaneMask,
SmallVectorImpl<unsigned> &Indexes) const;
/// The lane masks returned by getSubRegIndexLaneMask() above can only be
/// used to determine if sub-registers overlap - they can't be used to
/// determine if a set of sub-registers completely cover another
/// sub-register.
///
/// The X86 general purpose registers have two lanes corresponding to the
/// sub_8bit and sub_8bit_hi sub-registers. Both sub_32bit and sub_16bit have
/// lane masks '3', but the sub_16bit sub-register doesn't fully cover the
/// sub_32bit sub-register.
///
/// On the other hand, the ARM NEON lanes fully cover their registers: The
/// dsub_0 sub-register is completely covered by the ssub_0 and ssub_1 lanes.
/// This is related to the CoveredBySubRegs property on register definitions.
///
/// This function returns a bit mask of lanes that completely cover their
/// sub-registers. More precisely, given:
///
/// Covering = getCoveringLanes();
/// MaskA = getSubRegIndexLaneMask(SubA);
/// MaskB = getSubRegIndexLaneMask(SubB);
///
/// If (MaskA & ~(MaskB & Covering)) == 0, then SubA is completely covered by
/// SubB.
LaneBitmask getCoveringLanes() const { return CoveringLanes; }
/// Returns true if the two registers are equal or alias each other.
/// The registers may be virtual registers.
bool regsOverlap(Register RegA, Register RegB) const {
if (RegA == RegB)
return true;
if (RegA.isPhysical() && RegB.isPhysical())
return MCRegisterInfo::regsOverlap(RegA.asMCReg(), RegB.asMCReg());
return false;
}
/// Returns true if Reg contains RegUnit.
bool hasRegUnit(MCRegister Reg, Register RegUnit) const {
for (MCRegUnit Unit : regunits(Reg))
if (Register(Unit) == RegUnit)
return true;
return false;
}
/// Returns the original SrcReg unless it is the target of a copy-like
/// operation, in which case we chain backwards through all such operations
/// to the ultimate source register. If a physical register is encountered,
/// we stop the search.
virtual Register lookThruCopyLike(Register SrcReg,
const MachineRegisterInfo *MRI) const;
/// Find the original SrcReg unless it is the target of a copy-like operation,
/// in which case we chain backwards through all such operations to the
/// ultimate source register. If a physical register is encountered, we stop
/// the search.
/// Return the original SrcReg if all the definitions in the chain only have
/// one user and not a physical register.
virtual Register
lookThruSingleUseCopyChain(Register SrcReg,
const MachineRegisterInfo *MRI) const;
/// Return a null-terminated list of all of the callee-saved registers on
/// this target. The register should be in the order of desired callee-save
/// stack frame offset. The first register is closest to the incoming stack
/// pointer if stack grows down, and vice versa.
/// Notice: This function does not take into account disabled CSRs.
/// In most cases you will want to use instead the function
/// getCalleeSavedRegs that is implemented in MachineRegisterInfo.
virtual const MCPhysReg*
getCalleeSavedRegs(const MachineFunction *MF) const = 0;
/// Return a mask of call-preserved registers for the given calling convention
/// on the current function. The mask should include all call-preserved
/// aliases. This is used by the register allocator to determine which
/// registers can be live across a call.
///
/// The mask is an array containing (TRI::getNumRegs()+31)/32 entries.
/// A set bit indicates that all bits of the corresponding register are
/// preserved across the function call. The bit mask is expected to be
/// sub-register complete, i.e. if A is preserved, so are all its
/// sub-registers.
///
/// Bits are numbered from the LSB, so the bit for physical register Reg can
/// be found as (Mask[Reg / 32] >> Reg % 32) & 1.
///
/// A NULL pointer means that no register mask will be used, and call
/// instructions should use implicit-def operands to indicate call clobbered
/// registers.
///
virtual const uint32_t *getCallPreservedMask(const MachineFunction &MF,
CallingConv::ID) const {
// The default mask clobbers everything. All targets should override.
return nullptr;
}
/// Return a register mask for the registers preserved by the unwinder,
/// or nullptr if no custom mask is needed.
virtual const uint32_t *
getCustomEHPadPreservedMask(const MachineFunction &MF) const {
return nullptr;
}
/// Return a register mask that clobbers everything.
virtual const uint32_t *getNoPreservedMask() const {
llvm_unreachable("target does not provide no preserved mask");
}
/// Return a list of all of the registers which are clobbered "inside" a call
/// to the given function. For example, these might be needed for PLT
/// sequences of long-branch veneers.
virtual ArrayRef<MCPhysReg>
getIntraCallClobberedRegs(const MachineFunction *MF) const {
return {};
}
/// Return true if all bits that are set in mask \p mask0 are also set in
/// \p mask1.
bool regmaskSubsetEqual(const uint32_t *mask0, const uint32_t *mask1) const;
/// Return all the call-preserved register masks defined for this target.
virtual ArrayRef<const uint32_t *> getRegMasks() const = 0;
virtual ArrayRef<const char *> getRegMaskNames() const = 0;
/// Returns a bitset indexed by physical register number indicating if a
/// register is a special register that has particular uses and should be
/// considered unavailable at all times, e.g. stack pointer, return address.
/// A reserved register:
/// - is not allocatable
/// - is considered always live
/// - is ignored by liveness tracking
/// It is often necessary to reserve the super registers of a reserved
/// register as well, to avoid them getting allocated indirectly. You may use
/// markSuperRegs() and checkAllSuperRegsMarked() in this case.
virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0;
/// Returns either a string explaining why the given register is reserved for
/// this function, or an empty optional if no explanation has been written.
/// The absence of an explanation does not mean that the register is not
/// reserved (meaning, you should check that PhysReg is in fact reserved
/// before calling this).
virtual std::optional<std::string>
explainReservedReg(const MachineFunction &MF, MCRegister PhysReg) const {
return {};
}
/// Returns false if we can't guarantee that Physreg, specified as an IR asm
/// clobber constraint, will be preserved across the statement.
virtual bool isAsmClobberable(const MachineFunction &MF,
MCRegister PhysReg) const {
return true;
}
/// Returns true if PhysReg cannot be written to in inline asm statements.
virtual bool isInlineAsmReadOnlyReg(const MachineFunction &MF,
unsigned PhysReg) const {
return false;
}
/// Returns true if PhysReg is unallocatable and constant throughout the
/// function. Used by MachineRegisterInfo::isConstantPhysReg().
virtual bool isConstantPhysReg(MCRegister PhysReg) const { return false; }
/// Returns true if the register class is considered divergent.
virtual bool isDivergentRegClass(const TargetRegisterClass *RC) const {
return false;
}
/// Returns true if the register is considered uniform.
virtual bool isUniformReg(const MachineRegisterInfo &MRI,
const RegisterBankInfo &RBI, Register Reg) const {
return false;
}
/// Physical registers that may be modified within a function but are
/// guaranteed to be restored before any uses. This is useful for targets that
/// have call sequences where a GOT register may be updated by the caller
/// prior to a call and is guaranteed to be restored (also by the caller)
/// after the call.
virtual bool isCallerPreservedPhysReg(MCRegister PhysReg,
const MachineFunction &MF) const {
return false;
}
/// This is a wrapper around getCallPreservedMask().
/// Return true if the register is preserved after the call.
virtual bool isCalleeSavedPhysReg(MCRegister PhysReg,
const MachineFunction &MF) const;
/// Returns true if PhysReg can be used as an argument to a function.
virtual bool isArgumentRegister(const MachineFunction &MF,
MCRegister PhysReg) const {
return false;
}
/// Returns true if PhysReg is a fixed register.
virtual bool isFixedRegister(const MachineFunction &MF,
MCRegister PhysReg) const {
return false;
}
/// Returns true if PhysReg is a general purpose register.
virtual bool isGeneralPurposeRegister(const MachineFunction &MF,
MCRegister PhysReg) const {
return false;
}
/// Prior to adding the live-out mask to a stackmap or patchpoint
/// instruction, provide the target the opportunity to adjust it (mainly to
/// remove pseudo-registers that should be ignored).
virtual void adjustStackMapLiveOutMask(uint32_t *Mask) const {}
/// Return a super-register of the specified register
/// Reg so its sub-register of index SubIdx is Reg.
MCRegister getMatchingSuperReg(MCRegister Reg, unsigned SubIdx,
const TargetRegisterClass *RC) const {
return MCRegisterInfo::getMatchingSuperReg(Reg, SubIdx, RC->MC);
}
/// Return a subclass of the specified register
/// class A so that each register in it has a sub-register of the
/// specified sub-register index which is in the specified register class B.
///
/// TableGen will synthesize missing A sub-classes.
virtual const TargetRegisterClass *
getMatchingSuperRegClass(const TargetRegisterClass *A,
const TargetRegisterClass *B, unsigned Idx) const;
// For a copy-like instruction that defines a register of class DefRC with
// subreg index DefSubReg, reading from another source with class SrcRC and
// subregister SrcSubReg return true if this is a preferable copy
// instruction or an earlier use should be used.
virtual bool shouldRewriteCopySrc(const TargetRegisterClass *DefRC,
unsigned DefSubReg,
const TargetRegisterClass *SrcRC,
unsigned SrcSubReg) const;
/// Returns the largest legal sub-class of RC that
/// supports the sub-register index Idx.
/// If no such sub-class exists, return NULL.
/// If all registers in RC already have an Idx sub-register, return RC.
///
/// TableGen generates a version of this function that is good enough in most
/// cases. Targets can override if they have constraints that TableGen
/// doesn't understand. For example, the x86 sub_8bit sub-register index is
/// supported by the full GR32 register class in 64-bit mode, but only by the
/// GR32_ABCD regiister class in 32-bit mode.
///
/// TableGen will synthesize missing RC sub-classes.
virtual const TargetRegisterClass *
getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
assert(Idx == 0 && "Target has no sub-registers");
return RC;
}
/// Return a register class that can be used for a subregister copy from/into
/// \p SuperRC at \p SubRegIdx.
virtual const TargetRegisterClass *
getSubRegisterClass(const TargetRegisterClass *SuperRC,
unsigned SubRegIdx) const {
return nullptr;
}
/// Return the subregister index you get from composing
/// two subregister indices.
///
/// The special null sub-register index composes as the identity.
///
/// If R:a:b is the same register as R:c, then composeSubRegIndices(a, b)
/// returns c. Note that composeSubRegIndices does not tell you about illegal
/// compositions. If R does not have a subreg a, or R:a does not have a subreg
/// b, composeSubRegIndices doesn't tell you.
///
/// The ARM register Q0 has two D subregs dsub_0:D0 and dsub_1:D1. It also has
/// ssub_0:S0 - ssub_3:S3 subregs.
/// If you compose subreg indices dsub_1, ssub_0 you get ssub_2.
unsigned composeSubRegIndices(unsigned a, unsigned b) const {
if (!a) return b;
if (!b) return a;
return composeSubRegIndicesImpl(a, b);
}
/// Transforms a LaneMask computed for one subregister to the lanemask that
/// would have been computed when composing the subsubregisters with IdxA
/// first. @sa composeSubRegIndices()
LaneBitmask composeSubRegIndexLaneMask(unsigned IdxA,
LaneBitmask Mask) const {
if (!IdxA)
return Mask;
return composeSubRegIndexLaneMaskImpl(IdxA, Mask);
}
/// Transform a lanemask given for a virtual register to the corresponding
/// lanemask before using subregister with index \p IdxA.
/// This is the reverse of composeSubRegIndexLaneMask(), assuming Mask is a
/// valie lane mask (no invalid bits set) the following holds:
/// X0 = composeSubRegIndexLaneMask(Idx, Mask)
/// X1 = reverseComposeSubRegIndexLaneMask(Idx, X0)
/// => X1 == Mask
LaneBitmask reverseComposeSubRegIndexLaneMask(unsigned IdxA,
LaneBitmask LaneMask) const {
if (!IdxA)
return LaneMask;
return reverseComposeSubRegIndexLaneMaskImpl(IdxA, LaneMask);
}
/// Debugging helper: dump register in human readable form to dbgs() stream.
static void dumpReg(Register Reg, unsigned SubRegIndex = 0,
const TargetRegisterInfo *TRI = nullptr);
/// Return target defined base register class for a physical register.
/// This is the register class with the lowest BaseClassOrder containing the
/// register.
/// Will be nullptr if the register is not in any base register class.
virtual const TargetRegisterClass *getPhysRegBaseClass(MCRegister Reg) const {
return nullptr;
}
protected:
/// Overridden by TableGen in targets that have sub-registers.
virtual unsigned composeSubRegIndicesImpl(unsigned, unsigned) const {
llvm_unreachable("Target has no sub-registers");
}
/// Overridden by TableGen in targets that have sub-registers.
virtual LaneBitmask
composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const {
llvm_unreachable("Target has no sub-registers");
}
virtual LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned,
LaneBitmask) const {
llvm_unreachable("Target has no sub-registers");
}
/// Return the register cost table index. This implementation is sufficient
/// for most architectures and can be overriden by targets in case there are
/// multiple cost values associated with each register.
virtual unsigned getRegisterCostTableIndex(const MachineFunction &MF) const {
return 0;
}
public:
/// Find a common super-register class if it exists.
///
/// Find a register class, SuperRC and two sub-register indices, PreA and
/// PreB, such that:
///
/// 1. PreA + SubA == PreB + SubB (using composeSubRegIndices()), and
///
/// 2. For all Reg in SuperRC: Reg:PreA in RCA and Reg:PreB in RCB, and
///
/// 3. SuperRC->getSize() >= max(RCA->getSize(), RCB->getSize()).
///
/// SuperRC will be chosen such that no super-class of SuperRC satisfies the
/// requirements, and there is no register class with a smaller spill size
/// that satisfies the requirements.
///
/// SubA and SubB must not be 0. Use getMatchingSuperRegClass() instead.
///
/// Either of the PreA and PreB sub-register indices may be returned as 0. In
/// that case, the returned register class will be a sub-class of the
/// corresponding argument register class.
///
/// The function returns NULL if no register class can be found.
const TargetRegisterClass*
getCommonSuperRegClass(const TargetRegisterClass *RCA, unsigned SubA,
const TargetRegisterClass *RCB, unsigned SubB,
unsigned &PreA, unsigned &PreB) const;
//===--------------------------------------------------------------------===//
// Register Class Information
//
protected:
const RegClassInfo &getRegClassInfo(const TargetRegisterClass &RC) const {
return RCInfos[getNumRegClasses() * HwMode + RC.getID()];
}
public:
/// Register class iterators
regclass_iterator regclass_begin() const { return RegClassBegin; }
regclass_iterator regclass_end() const { return RegClassEnd; }
iterator_range<regclass_iterator> regclasses() const {
return make_range(regclass_begin(), regclass_end());
}
unsigned getNumRegClasses() const {
return (unsigned)(regclass_end()-regclass_begin());
}
/// Returns the register class associated with the enumeration value.
/// See class MCOperandInfo.
const TargetRegisterClass *getRegClass(unsigned i) const {
assert(i < getNumRegClasses() && "Register Class ID out of range");
return RegClassBegin[i];
}
/// Returns the name of the register class.
const char *getRegClassName(const TargetRegisterClass *Class) const {
return MCRegisterInfo::getRegClassName(Class->MC);
}
/// Find the largest common subclass of A and B.
/// Return NULL if there is no common subclass.
const TargetRegisterClass *
getCommonSubClass(const TargetRegisterClass *A,
const TargetRegisterClass *B) const;
/// Returns a TargetRegisterClass used for pointer values.
/// If a target supports multiple different pointer register classes,
/// kind specifies which one is indicated.
virtual const TargetRegisterClass *
getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const {
llvm_unreachable("Target didn't implement getPointerRegClass!");
}
/// Returns a legal register class to copy a register in the specified class
/// to or from. If it is possible to copy the register directly without using
/// a cross register class copy, return the specified RC. Returns NULL if it
/// is not possible to copy between two registers of the specified class.
virtual const TargetRegisterClass *
getCrossCopyRegClass(const TargetRegisterClass *RC) const {
return RC;
}
/// Returns the largest super class of RC that is legal to use in the current
/// sub-target and has the same spill size.
/// The returned register class can be used to create virtual registers which
/// means that all its registers can be copied and spilled.
virtual const TargetRegisterClass *
getLargestLegalSuperClass(const TargetRegisterClass *RC,
const MachineFunction &) const {
/// The default implementation is very conservative and doesn't allow the
/// register allocator to inflate register classes.
return RC;
}
/// Return the register pressure "high water mark" for the specific register
/// class. The scheduler is in high register pressure mode (for the specific
/// register class) if it goes over the limit.
///
/// Note: this is the old register pressure model that relies on a manually
/// specified representative register class per value type.
virtual unsigned getRegPressureLimit(const TargetRegisterClass *RC,
MachineFunction &MF) const {
return 0;
}
/// Return a heuristic for the machine scheduler to compare the profitability
/// of increasing one register pressure set versus another. The scheduler
/// will prefer increasing the register pressure of the set which returns
/// the largest value for this function.
virtual unsigned getRegPressureSetScore(const MachineFunction &MF,
unsigned PSetID) const {
return PSetID;
}
/// Get the weight in units of pressure for this register class.
virtual const RegClassWeight &getRegClassWeight(
const TargetRegisterClass *RC) const = 0;
/// Returns size in bits of a phys/virtual/generic register.
unsigned getRegSizeInBits(Register Reg, const MachineRegisterInfo &MRI) const;
/// Get the weight in units of pressure for this register unit.
virtual unsigned getRegUnitWeight(unsigned RegUnit) const = 0;
/// Get the number of dimensions of register pressure.
virtual unsigned getNumRegPressureSets() const = 0;
/// Get the name of this register unit pressure set.
virtual const char *getRegPressureSetName(unsigned Idx) const = 0;
/// Get the register unit pressure limit for this dimension.
/// This limit must be adjusted dynamically for reserved registers.
virtual unsigned getRegPressureSetLimit(const MachineFunction &MF,
unsigned Idx) const = 0;
/// Get the dimensions of register pressure impacted by this register class.
/// Returns a -1 terminated array of pressure set IDs.
virtual const int *getRegClassPressureSets(
const TargetRegisterClass *RC) const = 0;
/// Get the dimensions of register pressure impacted by this register unit.
/// Returns a -1 terminated array of pressure set IDs.
virtual const int *getRegUnitPressureSets(unsigned RegUnit) const = 0;
/// Get a list of 'hint' registers that the register allocator should try
/// first when allocating a physical register for the virtual register
/// VirtReg. These registers are effectively moved to the front of the
/// allocation order. If true is returned, regalloc will try to only use
/// hints to the greatest extent possible even if it means spilling.
///
/// The Order argument is the allocation order for VirtReg's register class
/// as returned from RegisterClassInfo::getOrder(). The hint registers must
/// come from Order, and they must not be reserved.
///
/// The default implementation of this function will only add target
/// independent register allocation hints. Targets that override this
/// function should typically call this default implementation as well and
/// expect to see generic copy hints added.
virtual bool
getRegAllocationHints(Register VirtReg, ArrayRef<MCPhysReg> Order,
SmallVectorImpl<MCPhysReg> &Hints,
const MachineFunction &MF,
const VirtRegMap *VRM = nullptr,
const LiveRegMatrix *Matrix = nullptr) const;
/// A callback to allow target a chance to update register allocation hints
/// when a register is "changed" (e.g. coalesced) to another register.
/// e.g. On ARM, some virtual registers should target register pairs,
/// if one of pair is coalesced to another register, the allocation hint of
/// the other half of the pair should be changed to point to the new register.
virtual void updateRegAllocHint(Register Reg, Register NewReg,
MachineFunction &MF) const {
// Do nothing.
}
/// Allow the target to reverse allocation order of local live ranges. This
/// will generally allocate shorter local live ranges first. For targets with
/// many registers, this could reduce regalloc compile time by a large
/// factor. It is disabled by default for three reasons:
/// (1) Top-down allocation is simpler and easier to debug for targets that
/// don't benefit from reversing the order.
/// (2) Bottom-up allocation could result in poor evicition decisions on some
/// targets affecting the performance of compiled code.
/// (3) Bottom-up allocation is no longer guaranteed to optimally color.
virtual bool reverseLocalAssignment() const { return false; }
/// Allow the target to override the cost of using a callee-saved register for
/// the first time. Default value of 0 means we will use a callee-saved
/// register if it is available.
virtual unsigned getCSRFirstUseCost() const { return 0; }
/// Returns true if the target requires (and can make use of) the register
/// scavenger.
virtual bool requiresRegisterScavenging(const MachineFunction &MF) const {
return false;
}
/// Returns true if the target wants to use frame pointer based accesses to
/// spill to the scavenger emergency spill slot.
virtual bool useFPForScavengingIndex(const MachineFunction &MF) const {
return true;
}
/// Returns true if the target requires post PEI scavenging of registers for
/// materializing frame index constants.
virtual bool requiresFrameIndexScavenging(const MachineFunction &MF) const {
return false;
}
/// Returns true if the target requires using the RegScavenger directly for
/// frame elimination despite using requiresFrameIndexScavenging.
virtual bool requiresFrameIndexReplacementScavenging(
const MachineFunction &MF) const {
return false;
}
/// Returns true if the target wants the LocalStackAllocation pass to be run
/// and virtual base registers used for more efficient stack access.
virtual bool requiresVirtualBaseRegisters(const MachineFunction &MF) const {
return false;
}
/// Return true if target has reserved a spill slot in the stack frame of
/// the given function for the specified register. e.g. On x86, if the frame
/// register is required, the first fixed stack object is reserved as its
/// spill slot. This tells PEI not to create a new stack frame
/// object for the given register. It should be called only after
/// determineCalleeSaves().
virtual bool hasReservedSpillSlot(const MachineFunction &MF, Register Reg,
int &FrameIdx) const {
return false;
}
/// Returns true if the live-ins should be tracked after register allocation.
virtual bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const {
return true;
}
/// True if the stack can be realigned for the target.
virtual bool canRealignStack(const MachineFunction &MF) const;
/// True if storage within the function requires the stack pointer to be
/// aligned more than the normal calling convention calls for.
virtual bool shouldRealignStack(const MachineFunction &MF) const;
/// True if stack realignment is required and still possible.
bool hasStackRealignment(const MachineFunction &MF) const {
return shouldRealignStack(MF) && canRealignStack(MF);
}
/// Get the offset from the referenced frame index in the instruction,
/// if there is one.
virtual int64_t getFrameIndexInstrOffset(const MachineInstr *MI,
int Idx) const {
return 0;
}
/// Returns true if the instruction's frame index reference would be better
/// served by a base register other than FP or SP.
/// Used by LocalStackFrameAllocation to determine which frame index
/// references it should create new base registers for.
virtual bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const {
return false;
}
/// Insert defining instruction(s) for a pointer to FrameIdx before
/// insertion point I. Return materialized frame pointer.
virtual Register materializeFrameBaseRegister(MachineBasicBlock *MBB,
int FrameIdx,
int64_t Offset) const {
llvm_unreachable("materializeFrameBaseRegister does not exist on this "
"target");
}
/// Resolve a frame index operand of an instruction
/// to reference the indicated base register plus offset instead.
virtual void resolveFrameIndex(MachineInstr &MI, Register BaseReg,
int64_t Offset) const {
llvm_unreachable("resolveFrameIndex does not exist on this target");
}
/// Determine whether a given base register plus offset immediate is
/// encodable to resolve a frame index.
virtual bool isFrameOffsetLegal(const MachineInstr *MI, Register BaseReg,
int64_t Offset) const {
llvm_unreachable("isFrameOffsetLegal does not exist on this target");
}
/// Gets the DWARF expression opcodes for \p Offset.
virtual void getOffsetOpcodes(const StackOffset &Offset,
SmallVectorImpl<uint64_t> &Ops) const;
/// Prepends a DWARF expression for \p Offset to DIExpression \p Expr.
DIExpression *
prependOffsetExpression(const DIExpression *Expr, unsigned PrependFlags,
const StackOffset &Offset) const;
/// Spill the register so it can be used by the register scavenger.
/// Return true if the register was spilled, false otherwise.
/// If this function does not spill the register, the scavenger
/// will instead spill it to the emergency spill slot.
virtual bool saveScavengerRegister(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I,
MachineBasicBlock::iterator &UseMI,
const TargetRegisterClass *RC,
Register Reg) const {
return false;
}
/// Process frame indices in reverse block order. This changes the behavior of
/// the RegScavenger passed to eliminateFrameIndex. If this is true targets
/// should scavengeRegisterBackwards in eliminateFrameIndex. New targets
/// should prefer reverse scavenging behavior.
virtual bool supportsBackwardScavenger() const { return false; }
/// This method must be overriden to eliminate abstract frame indices from
/// instructions which may use them. The instruction referenced by the
/// iterator contains an MO_FrameIndex operand which must be eliminated by
/// this method. This method may modify or replace the specified instruction,
/// as long as it keeps the iterator pointing at the finished product.
/// SPAdj is the SP adjustment due to call frame setup instruction.
/// FIOperandNum is the FI operand number.
/// Returns true if the current instruction was removed and the iterator
/// is not longer valid
virtual bool eliminateFrameIndex(MachineBasicBlock::iterator MI,
int SPAdj, unsigned FIOperandNum,
RegScavenger *RS = nullptr) const = 0;
/// Return the assembly name for \p Reg.
virtual StringRef getRegAsmName(MCRegister Reg) const {
// FIXME: We are assuming that the assembly name is equal to the TableGen
// name converted to lower case
//
// The TableGen name is the name of the definition for this register in the
// target's tablegen files. For example, the TableGen name of
// def EAX : Register <...>; is "EAX"
return StringRef(getName(Reg));
}
//===--------------------------------------------------------------------===//
/// Subtarget Hooks
/// SrcRC and DstRC will be morphed into NewRC if this returns true.
virtual bool shouldCoalesce(MachineInstr *MI,
const TargetRegisterClass *SrcRC,
unsigned SubReg,
const TargetRegisterClass *DstRC,
unsigned DstSubReg,
const TargetRegisterClass *NewRC,
LiveIntervals &LIS) const
{ return true; }
/// Region split has a high compile time cost especially for large live range.
/// This method is used to decide whether or not \p VirtReg should
/// go through this expensive splitting heuristic.
virtual bool shouldRegionSplitForVirtReg(const MachineFunction &MF,
const LiveInterval &VirtReg) const;
/// Last chance recoloring has a high compile time cost especially for
/// targets with a lot of registers.
/// This method is used to decide whether or not \p VirtReg should
/// go through this expensive heuristic.
/// When this target hook is hit, by returning false, there is a high
/// chance that the register allocation will fail altogether (usually with
/// "ran out of registers").
/// That said, this error usually points to another problem in the
/// optimization pipeline.
virtual bool
shouldUseLastChanceRecoloringForVirtReg(const MachineFunction &MF,
const LiveInterval &VirtReg) const {
return true;
}
/// Deferred spilling delays the spill insertion of a virtual register
/// after every other allocation. By deferring the spilling, it is
/// sometimes possible to eliminate that spilling altogether because
/// something else could have been eliminated, thus leaving some space
/// for the virtual register.
/// However, this comes with a compile time impact because it adds one
/// more stage to the greedy register allocator.
/// This method is used to decide whether \p VirtReg should use the deferred
/// spilling stage instead of being spilled right away.
virtual bool
shouldUseDeferredSpillingForVirtReg(const MachineFunction &MF,
const LiveInterval &VirtReg) const {
return false;
}
/// When prioritizing live ranges in register allocation, if this hook returns
/// true then the AllocationPriority of the register class will be treated as
/// more important than whether the range is local to a basic block or global.
virtual bool
regClassPriorityTrumpsGlobalness(const MachineFunction &MF) const {
return false;
}
//===--------------------------------------------------------------------===//
/// Debug information queries.
/// getFrameRegister - This method should return the register used as a base
/// for values allocated in the current stack frame.
virtual Register getFrameRegister(const MachineFunction &MF) const = 0;
/// Mark a register and all its aliases as reserved in the given set.
void markSuperRegs(BitVector &RegisterSet, MCRegister Reg) const;
/// Returns true if for every register in the set all super registers are part
/// of the set as well.
bool checkAllSuperRegsMarked(const BitVector &RegisterSet,
ArrayRef<MCPhysReg> Exceptions = ArrayRef<MCPhysReg>()) const;
virtual const TargetRegisterClass *
getConstrainedRegClassForOperand(const MachineOperand &MO,
const MachineRegisterInfo &MRI) const {
return nullptr;
}
/// Returns the physical register number of sub-register "Index"
/// for physical register RegNo. Return zero if the sub-register does not
/// exist.
inline MCRegister getSubReg(MCRegister Reg, unsigned Idx) const {
return static_cast<const MCRegisterInfo *>(this)->getSubReg(Reg, Idx);
}
/// Some targets have non-allocatable registers that aren't technically part
/// of the explicit callee saved register list, but should be handled as such
/// in certain cases.
virtual bool isNonallocatableRegisterCalleeSave(MCRegister Reg) const {
return false;
}
};
//===----------------------------------------------------------------------===//
// SuperRegClassIterator
//===----------------------------------------------------------------------===//
//
// Iterate over the possible super-registers for a given register class. The
// iterator will visit a list of pairs (Idx, Mask) corresponding to the
// possible classes of super-registers.
//
// Each bit mask will have at least one set bit, and each set bit in Mask
// corresponds to a SuperRC such that:
//
// For all Reg in SuperRC: Reg:Idx is in RC.
//
// The iterator can include (O, RC->getSubClassMask()) as the first entry which
// also satisfies the above requirement, assuming Reg:0 == Reg.
//
class SuperRegClassIterator {
const unsigned RCMaskWords;
unsigned SubReg = 0;
const uint16_t *Idx;
const uint32_t *Mask;
public:
/// Create a SuperRegClassIterator that visits all the super-register classes
/// of RC. When IncludeSelf is set, also include the (0, sub-classes) entry.
SuperRegClassIterator(const TargetRegisterClass *RC,
const TargetRegisterInfo *TRI,
bool IncludeSelf = false)
: RCMaskWords((TRI->getNumRegClasses() + 31) / 32),
Idx(RC->getSuperRegIndices()), Mask(RC->getSubClassMask()) {
if (!IncludeSelf)
++*this;
}
/// Returns true if this iterator is still pointing at a valid entry.
bool isValid() const { return Idx; }
/// Returns the current sub-register index.
unsigned getSubReg() const { return SubReg; }
/// Returns the bit mask of register classes that getSubReg() projects into
/// RC.
/// See TargetRegisterClass::getSubClassMask() for how to use it.
const uint32_t *getMask() const { return Mask; }
/// Advance iterator to the next entry.
void operator++() {
assert(isValid() && "Cannot move iterator past end.");
Mask += RCMaskWords;
SubReg = *Idx++;
if (!SubReg)
Idx = nullptr;
}
};
//===----------------------------------------------------------------------===//
// BitMaskClassIterator
//===----------------------------------------------------------------------===//
/// This class encapuslates the logic to iterate over bitmask returned by
/// the various RegClass related APIs.
/// E.g., this class can be used to iterate over the subclasses provided by
/// TargetRegisterClass::getSubClassMask or SuperRegClassIterator::getMask.
class BitMaskClassIterator {
/// Total number of register classes.
const unsigned NumRegClasses;
/// Base index of CurrentChunk.
/// In other words, the number of bit we read to get at the
/// beginning of that chunck.
unsigned Base = 0;
/// Adjust base index of CurrentChunk.
/// Base index + how many bit we read within CurrentChunk.
unsigned Idx = 0;
/// Current register class ID.
unsigned ID = 0;
/// Mask we are iterating over.
const uint32_t *Mask;
/// Current chunk of the Mask we are traversing.
uint32_t CurrentChunk;
/// Move ID to the next set bit.
void moveToNextID() {
// If the current chunk of memory is empty, move to the next one,
// while making sure we do not go pass the number of register
// classes.
while (!CurrentChunk) {
// Move to the next chunk.
Base += 32;
if (Base >= NumRegClasses) {
ID = NumRegClasses;
return;
}
CurrentChunk = *++Mask;
Idx = Base;
}
// Otherwise look for the first bit set from the right
// (representation of the class ID is big endian).
// See getSubClassMask for more details on the representation.
unsigned Offset = llvm::countr_zero(CurrentChunk);
// Add the Offset to the adjusted base number of this chunk: Idx.
// This is the ID of the register class.
ID = Idx + Offset;
// Consume the zeros, if any, and the bit we just read
// so that we are at the right spot for the next call.
// Do not do Offset + 1 because Offset may be 31 and 32
// will be UB for the shift, though in that case we could
// have make the chunk being equal to 0, but that would
// have introduced a if statement.
moveNBits(Offset);
moveNBits(1);
}
/// Move \p NumBits Bits forward in CurrentChunk.
void moveNBits(unsigned NumBits) {
assert(NumBits < 32 && "Undefined behavior spotted!");
// Consume the bit we read for the next call.
CurrentChunk >>= NumBits;
// Adjust the base for the chunk.
Idx += NumBits;
}
public:
/// Create a BitMaskClassIterator that visits all the register classes
/// represented by \p Mask.
///
/// \pre \p Mask != nullptr
BitMaskClassIterator(const uint32_t *Mask, const TargetRegisterInfo &TRI)
: NumRegClasses(TRI.getNumRegClasses()), Mask(Mask), CurrentChunk(*Mask) {
// Move to the first ID.
moveToNextID();
}
/// Returns true if this iterator is still pointing at a valid entry.
bool isValid() const { return getID() != NumRegClasses; }
/// Returns the current register class ID.
unsigned getID() const { return ID; }
/// Advance iterator to the next entry.
void operator++() {
assert(isValid() && "Cannot move iterator past end.");
moveToNextID();
}
};
// This is useful when building IndexedMaps keyed on virtual registers
struct VirtReg2IndexFunctor {
using argument_type = Register;
unsigned operator()(Register Reg) const {
return Register::virtReg2Index(Reg);
}
};
/// Prints virtual and physical registers with or without a TRI instance.
///
/// The format is:
/// %noreg - NoRegister
/// %5 - a virtual register.
/// %5:sub_8bit - a virtual register with sub-register index (with TRI).
/// %eax - a physical register
/// %physreg17 - a physical register when no TRI instance given.
///
/// Usage: OS << printReg(Reg, TRI, SubRegIdx) << '\n';
Printable printReg(Register Reg, const TargetRegisterInfo *TRI = nullptr,
unsigned SubIdx = 0,
const MachineRegisterInfo *MRI = nullptr);
/// Create Printable object to print register units on a \ref raw_ostream.
///
/// Register units are named after their root registers:
///
/// al - Single root.
/// fp0~st7 - Dual roots.
///
/// Usage: OS << printRegUnit(Unit, TRI) << '\n';
Printable printRegUnit(unsigned Unit, const TargetRegisterInfo *TRI);
/// Create Printable object to print virtual registers and physical
/// registers on a \ref raw_ostream.
Printable printVRegOrUnit(unsigned VRegOrUnit, const TargetRegisterInfo *TRI);
/// Create Printable object to print register classes or register banks
/// on a \ref raw_ostream.
Printable printRegClassOrBank(Register Reg, const MachineRegisterInfo &RegInfo,
const TargetRegisterInfo *TRI);
} // end namespace llvm
#endif // LLVM_CODEGEN_TARGETREGISTERINFO_H
PK iwFZ';RUf f CodeGen/MachinePassRegistry.hnu �[��� //===- llvm/CodeGen/MachinePassRegistry.h -----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the mechanics for machine function pass registries. A
// function pass registry (MachinePassRegistry) is auto filled by the static
// constructors of MachinePassRegistryNode. Further there is a command line
// parser (RegisterPassParser) which listens to each registry for additions
// and deletions, so that the appropriate command option is updated.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEPASSREGISTRY_H
#define LLVM_CODEGEN_MACHINEPASSREGISTRY_H
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Support/CommandLine.h"
namespace llvm {
//===----------------------------------------------------------------------===//
///
/// MachinePassRegistryListener - Listener to adds and removals of nodes in
/// registration list.
///
//===----------------------------------------------------------------------===//
template <class PassCtorTy> class MachinePassRegistryListener {
virtual void anchor() {}
public:
MachinePassRegistryListener() = default;
virtual ~MachinePassRegistryListener() = default;
virtual void NotifyAdd(StringRef N, PassCtorTy C, StringRef D) = 0;
virtual void NotifyRemove(StringRef N) = 0;
};
//===----------------------------------------------------------------------===//
///
/// MachinePassRegistryNode - Machine pass node stored in registration list.
///
//===----------------------------------------------------------------------===//
template <typename PassCtorTy> class MachinePassRegistryNode {
private:
MachinePassRegistryNode *Next = nullptr; // Next function pass in list.
StringRef Name; // Name of function pass.
StringRef Description; // Description string.
PassCtorTy Ctor; // Pass creator.
public:
MachinePassRegistryNode(const char *N, const char *D, PassCtorTy C)
: Name(N), Description(D), Ctor(C) {}
// Accessors
MachinePassRegistryNode *getNext() const { return Next; }
MachinePassRegistryNode **getNextAddress() { return &Next; }
StringRef getName() const { return Name; }
StringRef getDescription() const { return Description; }
PassCtorTy getCtor() const { return Ctor; }
void setNext(MachinePassRegistryNode *N) { Next = N; }
};
//===----------------------------------------------------------------------===//
///
/// MachinePassRegistry - Track the registration of machine passes.
///
//===----------------------------------------------------------------------===//
template <typename PassCtorTy> class MachinePassRegistry {
private:
MachinePassRegistryNode<PassCtorTy> *List; // List of registry nodes.
PassCtorTy Default; // Default function pass creator.
MachinePassRegistryListener<PassCtorTy>
*Listener; // Listener for list adds are removes.
public:
// NO CONSTRUCTOR - we don't want static constructor ordering to mess
// with the registry.
// Accessors.
//
MachinePassRegistryNode<PassCtorTy> *getList() { return List; }
PassCtorTy getDefault() { return Default; }
void setDefault(PassCtorTy C) { Default = C; }
/// setDefault - Set the default constructor by name.
void setDefault(StringRef Name) {
PassCtorTy Ctor = nullptr;
for (MachinePassRegistryNode<PassCtorTy> *R = getList(); R;
R = R->getNext()) {
if (R->getName() == Name) {
Ctor = R->getCtor();
break;
}
}
assert(Ctor && "Unregistered pass name");
setDefault(Ctor);
}
void setListener(MachinePassRegistryListener<PassCtorTy> *L) { Listener = L; }
/// Add - Adds a function pass to the registration list.
///
void Add(MachinePassRegistryNode<PassCtorTy> *Node) {
Node->setNext(List);
List = Node;
if (Listener)
Listener->NotifyAdd(Node->getName(), Node->getCtor(),
Node->getDescription());
}
/// Remove - Removes a function pass from the registration list.
///
void Remove(MachinePassRegistryNode<PassCtorTy> *Node) {
for (MachinePassRegistryNode<PassCtorTy> **I = &List; *I;
I = (*I)->getNextAddress()) {
if (*I == Node) {
if (Listener)
Listener->NotifyRemove(Node->getName());
*I = (*I)->getNext();
break;
}
}
}
};
//===----------------------------------------------------------------------===//
///
/// RegisterPassParser class - Handle the addition of new machine passes.
///
//===----------------------------------------------------------------------===//
template <class RegistryClass>
class RegisterPassParser
: public MachinePassRegistryListener<
typename RegistryClass::FunctionPassCtor>,
public cl::parser<typename RegistryClass::FunctionPassCtor> {
public:
RegisterPassParser(cl::Option &O)
: cl::parser<typename RegistryClass::FunctionPassCtor>(O) {}
~RegisterPassParser() override { RegistryClass::setListener(nullptr); }
void initialize() {
cl::parser<typename RegistryClass::FunctionPassCtor>::initialize();
// Add existing passes to option.
for (RegistryClass *Node = RegistryClass::getList();
Node; Node = Node->getNext()) {
this->addLiteralOption(Node->getName(),
(typename RegistryClass::FunctionPassCtor)Node->getCtor(),
Node->getDescription());
}
// Make sure we listen for list changes.
RegistryClass::setListener(this);
}
// Implement the MachinePassRegistryListener callbacks.
void NotifyAdd(StringRef N, typename RegistryClass::FunctionPassCtor C,
StringRef D) override {
this->addLiteralOption(N, C, D);
}
void NotifyRemove(StringRef N) override {
this->removeLiteralOption(N);
}
};
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINEPASSREGISTRY_H
PK iwFZ`d��� � CodeGen/FaultMaps.hnu �[��� //===- FaultMaps.h - The "FaultMaps" section --------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_FAULTMAPS_H
#define LLVM_CODEGEN_FAULTMAPS_H
#include "llvm/MC/MCSymbol.h"
#include <map>
#include <vector>
namespace llvm {
class AsmPrinter;
class MCExpr;
class FaultMaps {
public:
enum FaultKind {
FaultingLoad = 1,
FaultingLoadStore,
FaultingStore,
FaultKindMax
};
explicit FaultMaps(AsmPrinter &AP);
static const char *faultTypeToString(FaultKind);
void recordFaultingOp(FaultKind FaultTy, const MCSymbol *FaultingLabel,
const MCSymbol *HandlerLabel);
void serializeToFaultMapSection();
void reset() {
FunctionInfos.clear();
}
private:
static const char *WFMP;
struct FaultInfo {
FaultKind Kind = FaultKindMax;
const MCExpr *FaultingOffsetExpr = nullptr;
const MCExpr *HandlerOffsetExpr = nullptr;
FaultInfo() = default;
explicit FaultInfo(FaultMaps::FaultKind Kind, const MCExpr *FaultingOffset,
const MCExpr *HandlerOffset)
: Kind(Kind), FaultingOffsetExpr(FaultingOffset),
HandlerOffsetExpr(HandlerOffset) {}
};
using FunctionFaultInfos = std::vector<FaultInfo>;
// We'd like to keep a stable iteration order for FunctionInfos to help
// FileCheck based testing.
struct MCSymbolComparator {
bool operator()(const MCSymbol *LHS, const MCSymbol *RHS) const {
return LHS->getName() < RHS->getName();
}
};
std::map<const MCSymbol *, FunctionFaultInfos, MCSymbolComparator>
FunctionInfos;
AsmPrinter &AP;
void emitFunctionInfo(const MCSymbol *FnLabel, const FunctionFaultInfos &FFI);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_FAULTMAPS_H
PK iwFZ�?�� � CodeGen/StableHashing.hnu �[��� //===- llvm/CodeGen/StableHashing.h - Utilities for stable hashing * C++ *-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides types and functions for computing and combining stable
// hashes. Stable hashes can be useful for hashing across different modules,
// processes, or compiler runs.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_STABLEHASHING_H
#define LLVM_CODEGEN_STABLEHASHING_H
#include "llvm/ADT/StringRef.h"
namespace llvm {
/// An opaque object representing a stable hash code. It can be serialized,
/// deserialized, and is stable across processes and executions.
using stable_hash = uint64_t;
// Implementation details
namespace hashing {
namespace detail {
// Stable hashes are based on the 64-bit FNV-1 hash:
// https://en.wikipedia.org/wiki/Fowler-Noll-Vo_hash_function
const uint64_t FNV_PRIME_64 = 1099511628211u;
const uint64_t FNV_OFFSET_64 = 14695981039346656037u;
inline void stable_hash_append(stable_hash &Hash, const char Value) {
Hash = Hash ^ (Value & 0xFF);
Hash = Hash * FNV_PRIME_64;
}
inline void stable_hash_append(stable_hash &Hash, stable_hash Value) {
for (unsigned I = 0; I < 8; ++I) {
stable_hash_append(Hash, static_cast<char>(Value));
Value >>= 8;
}
}
} // namespace detail
} // namespace hashing
inline stable_hash stable_hash_combine(stable_hash A, stable_hash B) {
stable_hash Hash = hashing::detail::FNV_OFFSET_64;
hashing::detail::stable_hash_append(Hash, A);
hashing::detail::stable_hash_append(Hash, B);
return Hash;
}
inline stable_hash stable_hash_combine(stable_hash A, stable_hash B,
stable_hash C) {
stable_hash Hash = hashing::detail::FNV_OFFSET_64;
hashing::detail::stable_hash_append(Hash, A);
hashing::detail::stable_hash_append(Hash, B);
hashing::detail::stable_hash_append(Hash, C);
return Hash;
}
inline stable_hash stable_hash_combine(stable_hash A, stable_hash B,
stable_hash C, stable_hash D) {
stable_hash Hash = hashing::detail::FNV_OFFSET_64;
hashing::detail::stable_hash_append(Hash, A);
hashing::detail::stable_hash_append(Hash, B);
hashing::detail::stable_hash_append(Hash, C);
hashing::detail::stable_hash_append(Hash, D);
return Hash;
}
/// Compute a stable_hash for a sequence of values.
///
/// This hashes a sequence of values. It produces the same stable_hash as
/// 'stable_hash_combine(a, b, c, ...)', but can run over arbitrary sized
/// sequences and is significantly faster given pointers and types which
/// can be hashed as a sequence of bytes.
template <typename InputIteratorT>
stable_hash stable_hash_combine_range(InputIteratorT First,
InputIteratorT Last) {
stable_hash Hash = hashing::detail::FNV_OFFSET_64;
for (auto I = First; I != Last; ++I)
hashing::detail::stable_hash_append(Hash, *I);
return Hash;
}
inline stable_hash stable_hash_combine_array(const stable_hash *P, size_t C) {
stable_hash Hash = hashing::detail::FNV_OFFSET_64;
for (size_t I = 0; I < C; ++I)
hashing::detail::stable_hash_append(Hash, P[I]);
return Hash;
}
inline stable_hash stable_hash_combine_string(const StringRef &S) {
return stable_hash_combine_range(S.begin(), S.end());
}
inline stable_hash stable_hash_combine_string(const char *C) {
stable_hash Hash = hashing::detail::FNV_OFFSET_64;
while (*C)
hashing::detail::stable_hash_append(Hash, *(C++));
return Hash;
}
} // namespace llvm
#endif
PK iwFZ��o� � CodeGen/TileShapeInfo.hnu �[��� //===- llvm/CodeGen/TileShapeInfo.h - ---------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file Shape utility for AMX.
/// AMX hardware requires to config the shape of tile data register before use.
/// The 2D shape includes row and column. In AMX intrinsics interface the shape
/// is passed as 1st and 2nd parameter and they are lowered as the 1st and 2nd
/// machine operand of AMX pseudo instructions. ShapeT class is to facilitate
/// tile config and register allocator. The row and column are machine operand
/// of AMX pseudo instructions.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_TILESHAPEINFO_H
#define LLVM_CODEGEN_TILESHAPEINFO_H
#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Register.h"
namespace llvm {
class ShapeT {
public:
ShapeT(MachineOperand *Row, MachineOperand *Col,
const MachineRegisterInfo *MRI = nullptr)
: Row(Row), Col(Col) {
if (MRI)
deduceImm(MRI);
}
ShapeT()
: Row(nullptr), Col(nullptr), RowImm(InvalidImmShape),
ColImm(InvalidImmShape) {}
bool operator==(const ShapeT &Shape) const {
MachineOperand *R = Shape.Row;
MachineOperand *C = Shape.Col;
if (!R || !C)
return false;
if (!Row || !Col)
return false;
if (Row->getReg() == R->getReg() && Col->getReg() == C->getReg())
return true;
if ((RowImm != InvalidImmShape) && (ColImm != InvalidImmShape))
return RowImm == Shape.getRowImm() && ColImm == Shape.getColImm();
return false;
}
bool operator!=(const ShapeT &Shape) const { return !(*this == Shape); }
MachineOperand *getRow() const { return Row; }
MachineOperand *getCol() const { return Col; }
int64_t getRowImm() const { return RowImm; }
int64_t getColImm() const { return ColImm; }
bool isValid() { return (Row != nullptr) && (Col != nullptr); }
void deduceImm(const MachineRegisterInfo *MRI) {
// All def must be the same value, otherwise it is invalid MIs.
// Find the immediate.
// TODO copy propagation.
auto GetImm = [&](Register Reg) {
int64_t Imm = InvalidImmShape;
for (const MachineOperand &DefMO : MRI->def_operands(Reg)) {
const auto *MI = DefMO.getParent();
if (MI->isMoveImmediate()) {
Imm = MI->getOperand(1).getImm();
break;
}
}
return Imm;
};
RowImm = GetImm(Row->getReg());
ColImm = GetImm(Col->getReg());
}
private:
static constexpr int64_t InvalidImmShape = -1;
MachineOperand *Row;
MachineOperand *Col;
int64_t RowImm = -1;
int64_t ColImm = -1;
};
} // namespace llvm
#endif
PK iwFZk��7 �7 CodeGen/SelectionDAGISel.hnu �[��� //===-- llvm/CodeGen/SelectionDAGISel.h - Common Base Class------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements the SelectionDAGISel class, which is used as the common
// base class for SelectionDAG-based instruction selectors.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_SELECTIONDAGISEL_H
#define LLVM_CODEGEN_SELECTIONDAGISEL_H
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/IR/BasicBlock.h"
#include <memory>
namespace llvm {
class AAResults;
class AssumptionCache;
class TargetInstrInfo;
class TargetMachine;
class SelectionDAGBuilder;
class SDValue;
class MachineRegisterInfo;
class MachineFunction;
class OptimizationRemarkEmitter;
class TargetLowering;
class TargetLibraryInfo;
class FunctionLoweringInfo;
class SwiftErrorValueTracking;
class GCFunctionInfo;
class ScheduleDAGSDNodes;
/// SelectionDAGISel - This is the common base class used for SelectionDAG-based
/// pattern-matching instruction selectors.
class SelectionDAGISel : public MachineFunctionPass {
public:
TargetMachine &TM;
const TargetLibraryInfo *LibInfo;
std::unique_ptr<FunctionLoweringInfo> FuncInfo;
SwiftErrorValueTracking *SwiftError;
MachineFunction *MF;
MachineRegisterInfo *RegInfo;
SelectionDAG *CurDAG;
std::unique_ptr<SelectionDAGBuilder> SDB;
AAResults *AA = nullptr;
AssumptionCache *AC = nullptr;
GCFunctionInfo *GFI = nullptr;
CodeGenOpt::Level OptLevel;
const TargetInstrInfo *TII;
const TargetLowering *TLI;
bool FastISelFailed;
SmallPtrSet<const Instruction *, 4> ElidedArgCopyInstrs;
/// Current optimization remark emitter.
/// Used to report things like combines and FastISel failures.
std::unique_ptr<OptimizationRemarkEmitter> ORE;
explicit SelectionDAGISel(char &ID, TargetMachine &tm,
CodeGenOpt::Level OL = CodeGenOpt::Default);
~SelectionDAGISel() override;
const TargetLowering *getTargetLowering() const { return TLI; }
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnMachineFunction(MachineFunction &MF) override;
virtual void emitFunctionEntryCode() {}
/// PreprocessISelDAG - This hook allows targets to hack on the graph before
/// instruction selection starts.
virtual void PreprocessISelDAG() {}
/// PostprocessISelDAG() - This hook allows the target to hack on the graph
/// right after selection.
virtual void PostprocessISelDAG() {}
/// Main hook for targets to transform nodes into machine nodes.
virtual void Select(SDNode *N) = 0;
/// SelectInlineAsmMemoryOperand - Select the specified address as a target
/// addressing mode, according to the specified constraint. If this does
/// not match or is not implemented, return true. The resultant operands
/// (which will appear in the machine instruction) should be added to the
/// OutOps vector.
virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op,
unsigned ConstraintID,
std::vector<SDValue> &OutOps) {
return true;
}
/// IsProfitableToFold - Returns true if it's profitable to fold the specific
/// operand node N of U during instruction selection that starts at Root.
virtual bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const;
/// IsLegalToFold - Returns true if the specific operand node N of
/// U can be folded during instruction selection that starts at Root.
/// FIXME: This is a static member function because the MSP430/X86
/// targets, which uses it during isel. This could become a proper member.
static bool IsLegalToFold(SDValue N, SDNode *U, SDNode *Root,
CodeGenOpt::Level OptLevel,
bool IgnoreChains = false);
static void InvalidateNodeId(SDNode *N);
static int getUninvalidatedNodeId(SDNode *N);
static void EnforceNodeIdInvariant(SDNode *N);
// Opcodes used by the DAG state machine:
enum BuiltinOpcodes {
OPC_Scope,
OPC_RecordNode,
OPC_RecordChild0, OPC_RecordChild1, OPC_RecordChild2, OPC_RecordChild3,
OPC_RecordChild4, OPC_RecordChild5, OPC_RecordChild6, OPC_RecordChild7,
OPC_RecordMemRef,
OPC_CaptureGlueInput,
OPC_MoveChild,
OPC_MoveChild0, OPC_MoveChild1, OPC_MoveChild2, OPC_MoveChild3,
OPC_MoveChild4, OPC_MoveChild5, OPC_MoveChild6, OPC_MoveChild7,
OPC_MoveParent,
OPC_CheckSame,
OPC_CheckChild0Same, OPC_CheckChild1Same,
OPC_CheckChild2Same, OPC_CheckChild3Same,
OPC_CheckPatternPredicate,
OPC_CheckPredicate,
OPC_CheckPredicateWithOperands,
OPC_CheckOpcode,
OPC_SwitchOpcode,
OPC_CheckType,
OPC_CheckTypeRes,
OPC_SwitchType,
OPC_CheckChild0Type, OPC_CheckChild1Type, OPC_CheckChild2Type,
OPC_CheckChild3Type, OPC_CheckChild4Type, OPC_CheckChild5Type,
OPC_CheckChild6Type, OPC_CheckChild7Type,
OPC_CheckInteger,
OPC_CheckChild0Integer, OPC_CheckChild1Integer, OPC_CheckChild2Integer,
OPC_CheckChild3Integer, OPC_CheckChild4Integer,
OPC_CheckCondCode, OPC_CheckChild2CondCode,
OPC_CheckValueType,
OPC_CheckComplexPat,
OPC_CheckAndImm, OPC_CheckOrImm,
OPC_CheckImmAllOnesV,
OPC_CheckImmAllZerosV,
OPC_CheckFoldableChainNode,
OPC_EmitInteger,
OPC_EmitStringInteger,
OPC_EmitRegister,
OPC_EmitRegister2,
OPC_EmitConvertToTarget,
OPC_EmitMergeInputChains,
OPC_EmitMergeInputChains1_0,
OPC_EmitMergeInputChains1_1,
OPC_EmitMergeInputChains1_2,
OPC_EmitCopyToReg,
OPC_EmitCopyToReg2,
OPC_EmitNodeXForm,
OPC_EmitNode,
// Space-optimized forms that implicitly encode number of result VTs.
OPC_EmitNode0, OPC_EmitNode1, OPC_EmitNode2,
OPC_MorphNodeTo,
// Space-optimized forms that implicitly encode number of result VTs.
OPC_MorphNodeTo0, OPC_MorphNodeTo1, OPC_MorphNodeTo2,
OPC_CompleteMatch,
// Contains offset in table for pattern being selected
OPC_Coverage
};
enum {
OPFL_None = 0, // Node has no chain or glue input and isn't variadic.
OPFL_Chain = 1, // Node has a chain input.
OPFL_GlueInput = 2, // Node has a glue input.
OPFL_GlueOutput = 4, // Node has a glue output.
OPFL_MemRefs = 8, // Node gets accumulated MemRefs.
OPFL_Variadic0 = 1<<4, // Node is variadic, root has 0 fixed inputs.
OPFL_Variadic1 = 2<<4, // Node is variadic, root has 1 fixed inputs.
OPFL_Variadic2 = 3<<4, // Node is variadic, root has 2 fixed inputs.
OPFL_Variadic3 = 4<<4, // Node is variadic, root has 3 fixed inputs.
OPFL_Variadic4 = 5<<4, // Node is variadic, root has 4 fixed inputs.
OPFL_Variadic5 = 6<<4, // Node is variadic, root has 5 fixed inputs.
OPFL_Variadic6 = 7<<4, // Node is variadic, root has 6 fixed inputs.
OPFL_VariadicInfo = OPFL_Variadic6
};
/// getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the
/// number of fixed arity values that should be skipped when copying from the
/// root.
static inline int getNumFixedFromVariadicInfo(unsigned Flags) {
return ((Flags&OPFL_VariadicInfo) >> 4)-1;
}
protected:
/// DAGSize - Size of DAG being instruction selected.
///
unsigned DAGSize = 0;
/// ReplaceUses - replace all uses of the old node F with the use
/// of the new node T.
void ReplaceUses(SDValue F, SDValue T) {
CurDAG->ReplaceAllUsesOfValueWith(F, T);
EnforceNodeIdInvariant(T.getNode());
}
/// ReplaceUses - replace all uses of the old nodes F with the use
/// of the new nodes T.
void ReplaceUses(const SDValue *F, const SDValue *T, unsigned Num) {
CurDAG->ReplaceAllUsesOfValuesWith(F, T, Num);
for (unsigned i = 0; i < Num; ++i)
EnforceNodeIdInvariant(T[i].getNode());
}
/// ReplaceUses - replace all uses of the old node F with the use
/// of the new node T.
void ReplaceUses(SDNode *F, SDNode *T) {
CurDAG->ReplaceAllUsesWith(F, T);
EnforceNodeIdInvariant(T);
}
/// Replace all uses of \c F with \c T, then remove \c F from the DAG.
void ReplaceNode(SDNode *F, SDNode *T) {
CurDAG->ReplaceAllUsesWith(F, T);
EnforceNodeIdInvariant(T);
CurDAG->RemoveDeadNode(F);
}
/// SelectInlineAsmMemoryOperands - Calls to this are automatically generated
/// by tblgen. Others should not call it.
void SelectInlineAsmMemoryOperands(std::vector<SDValue> &Ops,
const SDLoc &DL);
/// getPatternForIndex - Patterns selected by tablegen during ISEL
virtual StringRef getPatternForIndex(unsigned index) {
llvm_unreachable("Tblgen should generate the implementation of this!");
}
/// getIncludePathForIndex - get the td source location of pattern instantiation
virtual StringRef getIncludePathForIndex(unsigned index) {
llvm_unreachable("Tblgen should generate the implementation of this!");
}
bool shouldOptForSize(const MachineFunction *MF) const {
return CurDAG->shouldOptForSize();
}
public:
// Calls to these predicates are generated by tblgen.
bool CheckAndMask(SDValue LHS, ConstantSDNode *RHS,
int64_t DesiredMaskS) const;
bool CheckOrMask(SDValue LHS, ConstantSDNode *RHS,
int64_t DesiredMaskS) const;
/// CheckPatternPredicate - This function is generated by tblgen in the
/// target. It runs the specified pattern predicate and returns true if it
/// succeeds or false if it fails. The number is a private implementation
/// detail to the code tblgen produces.
virtual bool CheckPatternPredicate(unsigned PredNo) const {
llvm_unreachable("Tblgen should generate the implementation of this!");
}
/// CheckNodePredicate - This function is generated by tblgen in the target.
/// It runs node predicate number PredNo and returns true if it succeeds or
/// false if it fails. The number is a private implementation
/// detail to the code tblgen produces.
virtual bool CheckNodePredicate(SDNode *N, unsigned PredNo) const {
llvm_unreachable("Tblgen should generate the implementation of this!");
}
/// CheckNodePredicateWithOperands - This function is generated by tblgen in
/// the target.
/// It runs node predicate number PredNo and returns true if it succeeds or
/// false if it fails. The number is a private implementation detail to the
/// code tblgen produces.
virtual bool CheckNodePredicateWithOperands(
SDNode *N, unsigned PredNo,
const SmallVectorImpl<SDValue> &Operands) const {
llvm_unreachable("Tblgen should generate the implementation of this!");
}
virtual bool CheckComplexPattern(SDNode *Root, SDNode *Parent, SDValue N,
unsigned PatternNo,
SmallVectorImpl<std::pair<SDValue, SDNode*> > &Result) {
llvm_unreachable("Tblgen should generate the implementation of this!");
}
virtual SDValue RunSDNodeXForm(SDValue V, unsigned XFormNo) {
llvm_unreachable("Tblgen should generate this!");
}
void SelectCodeCommon(SDNode *NodeToMatch, const unsigned char *MatcherTable,
unsigned TableSize);
/// Return true if complex patterns for this target can mutate the
/// DAG.
virtual bool ComplexPatternFuncMutatesDAG() const {
return false;
}
/// Return whether the node may raise an FP exception.
bool mayRaiseFPException(SDNode *Node) const;
bool isOrEquivalentToAdd(const SDNode *N) const;
private:
// Calls to these functions are generated by tblgen.
void Select_INLINEASM(SDNode *N);
void Select_READ_REGISTER(SDNode *Op);
void Select_WRITE_REGISTER(SDNode *Op);
void Select_UNDEF(SDNode *N);
void CannotYetSelect(SDNode *N);
void Select_FREEZE(SDNode *N);
void Select_ARITH_FENCE(SDNode *N);
void Select_MEMBARRIER(SDNode *N);
void pushStackMapLiveVariable(SmallVectorImpl<SDValue> &Ops, SDValue Operand,
SDLoc DL);
void Select_STACKMAP(SDNode *N);
void Select_PATCHPOINT(SDNode *N);
private:
void DoInstructionSelection();
SDNode *MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList,
ArrayRef<SDValue> Ops, unsigned EmitNodeInfo);
/// Prepares the landing pad to take incoming values or do other EH
/// personality specific tasks. Returns true if the block should be
/// instruction selected, false if no code should be emitted for it.
bool PrepareEHLandingPad();
// Mark and Report IPToState for each Block under AsynchEH
void reportIPToStateForBlocks(MachineFunction *Fn);
/// Perform instruction selection on all basic blocks in the function.
void SelectAllBasicBlocks(const Function &Fn);
/// Perform instruction selection on a single basic block, for
/// instructions between \p Begin and \p End. \p HadTailCall will be set
/// to true if a call in the block was translated as a tail call.
void SelectBasicBlock(BasicBlock::const_iterator Begin,
BasicBlock::const_iterator End,
bool &HadTailCall);
void FinishBasicBlock();
void CodeGenAndEmitDAG();
/// Generate instructions for lowering the incoming arguments of the
/// given function.
void LowerArguments(const Function &F);
void ComputeLiveOutVRegInfo();
/// Create the scheduler. If a specific scheduler was specified
/// via the SchedulerRegistry, use it, otherwise select the
/// one preferred by the target.
///
ScheduleDAGSDNodes *CreateScheduler();
/// OpcodeOffset - This is a cache used to dispatch efficiently into isel
/// state machines that start with a OPC_SwitchOpcode node.
std::vector<unsigned> OpcodeOffset;
void UpdateChains(SDNode *NodeToMatch, SDValue InputChain,
SmallVectorImpl<SDNode *> &ChainNodesMatched,
bool isMorphNodeTo);
};
}
#endif /* LLVM_CODEGEN_SELECTIONDAGISEL_H */
PK iwFZ�t\ CodeGen/RegisterClassInfo.hnu �[��� //===- RegisterClassInfo.h - Dynamic Register Class Info --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements the RegisterClassInfo class which provides dynamic
// information about target register classes. Callee saved and reserved
// registers depends on calling conventions and other dynamic information, so
// some things cannot be determined statically.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_REGISTERCLASSINFO_H
#define LLVM_CODEGEN_REGISTERCLASSINFO_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/MC/MCRegister.h"
#include <cstdint>
#include <memory>
namespace llvm {
class RegisterClassInfo {
struct RCInfo {
unsigned Tag = 0;
unsigned NumRegs = 0;
bool ProperSubClass = false;
uint8_t MinCost = 0;
uint16_t LastCostChange = 0;
std::unique_ptr<MCPhysReg[]> Order;
RCInfo() = default;
operator ArrayRef<MCPhysReg>() const {
return ArrayRef(Order.get(), NumRegs);
}
};
// Brief cached information for each register class.
std::unique_ptr<RCInfo[]> RegClass;
// Tag changes whenever cached information needs to be recomputed. An RCInfo
// entry is valid when its tag matches.
unsigned Tag = 0;
const MachineFunction *MF = nullptr;
const TargetRegisterInfo *TRI = nullptr;
// Callee saved registers of last MF.
// Used only to determine if an update for CalleeSavedAliases is necessary.
SmallVector<MCPhysReg, 16> LastCalleeSavedRegs;
// Map register alias to the callee saved Register.
SmallVector<MCPhysReg, 4> CalleeSavedAliases;
// Indicate if a specified callee saved register be in the allocation order
// exactly as written in the tablegen descriptions or listed later.
BitVector IgnoreCSRForAllocOrder;
// Reserved registers in the current MF.
BitVector Reserved;
std::unique_ptr<unsigned[]> PSetLimits;
// The register cost values.
ArrayRef<uint8_t> RegCosts;
// Compute all information about RC.
void compute(const TargetRegisterClass *RC) const;
// Return an up-to-date RCInfo for RC.
const RCInfo &get(const TargetRegisterClass *RC) const {
const RCInfo &RCI = RegClass[RC->getID()];
if (Tag != RCI.Tag)
compute(RC);
return RCI;
}
public:
RegisterClassInfo();
/// runOnFunction - Prepare to answer questions about MF. This must be called
/// before any other methods are used.
void runOnMachineFunction(const MachineFunction &MF);
/// getNumAllocatableRegs - Returns the number of actually allocatable
/// registers in RC in the current function.
unsigned getNumAllocatableRegs(const TargetRegisterClass *RC) const {
return get(RC).NumRegs;
}
/// getOrder - Returns the preferred allocation order for RC. The order
/// contains no reserved registers, and registers that alias callee saved
/// registers come last.
ArrayRef<MCPhysReg> getOrder(const TargetRegisterClass *RC) const {
return get(RC);
}
/// isProperSubClass - Returns true if RC has a legal super-class with more
/// allocatable registers.
///
/// Register classes like GR32_NOSP are not proper sub-classes because %esp
/// is not allocatable. Similarly, tGPR is not a proper sub-class in Thumb
/// mode because the GPR super-class is not legal.
bool isProperSubClass(const TargetRegisterClass *RC) const {
return get(RC).ProperSubClass;
}
/// getLastCalleeSavedAlias - Returns the last callee saved register that
/// overlaps PhysReg, or NoRegister if Reg doesn't overlap a
/// CalleeSavedAliases.
MCRegister getLastCalleeSavedAlias(MCRegister PhysReg) const {
if (PhysReg.id() < CalleeSavedAliases.size())
return CalleeSavedAliases[PhysReg];
return MCRegister::NoRegister;
}
/// Get the minimum register cost in RC's allocation order.
/// This is the smallest value in RegCosts[Reg] for all
/// the registers in getOrder(RC).
uint8_t getMinCost(const TargetRegisterClass *RC) const {
return get(RC).MinCost;
}
/// Get the position of the last cost change in getOrder(RC).
///
/// All registers in getOrder(RC).slice(getLastCostChange(RC)) will have the
/// same cost according to RegCosts[Reg].
unsigned getLastCostChange(const TargetRegisterClass *RC) const {
return get(RC).LastCostChange;
}
/// Get the register unit limit for the given pressure set index.
///
/// RegisterClassInfo adjusts this limit for reserved registers.
unsigned getRegPressureSetLimit(unsigned Idx) const {
if (!PSetLimits[Idx])
PSetLimits[Idx] = computePSetLimit(Idx);
return PSetLimits[Idx];
}
protected:
unsigned computePSetLimit(unsigned Idx) const;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_REGISTERCLASSINFO_H
PK iwFZ1r�� CodeGen/ExecutionDomainFix.hnu �[��� //==-- llvm/CodeGen/ExecutionDomainFix.h - Execution Domain Fix -*- C++ -*--==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file Execution Domain Fix pass.
///
/// Some X86 SSE instructions like mov, and, or, xor are available in different
/// variants for different operand types. These variant instructions are
/// equivalent, but on Nehalem and newer cpus there is extra latency
/// transferring data between integer and floating point domains. ARM cores
/// have similar issues when they are configured with both VFP and NEON
/// pipelines.
///
/// This pass changes the variant instructions to minimize domain crossings.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_EXECUTIONDOMAINFIX_H
#define LLVM_CODEGEN_EXECUTIONDOMAINFIX_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/LoopTraversal.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/ReachingDefAnalysis.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
namespace llvm {
class MachineInstr;
class TargetInstrInfo;
/// A DomainValue is a bit like LiveIntervals' ValNo, but it also keeps track
/// of execution domains.
///
/// An open DomainValue represents a set of instructions that can still switch
/// execution domain. Multiple registers may refer to the same open
/// DomainValue - they will eventually be collapsed to the same execution
/// domain.
///
/// A collapsed DomainValue represents a single register that has been forced
/// into one of more execution domains. There is a separate collapsed
/// DomainValue for each register, but it may contain multiple execution
/// domains. A register value is initially created in a single execution
/// domain, but if we were forced to pay the penalty of a domain crossing, we
/// keep track of the fact that the register is now available in multiple
/// domains.
struct DomainValue {
/// Basic reference counting.
unsigned Refs = 0;
/// Bitmask of available domains. For an open DomainValue, it is the still
/// possible domains for collapsing. For a collapsed DomainValue it is the
/// domains where the register is available for free.
unsigned AvailableDomains;
/// Pointer to the next DomainValue in a chain. When two DomainValues are
/// merged, Victim.Next is set to point to Victor, so old DomainValue
/// references can be updated by following the chain.
DomainValue *Next;
/// Twiddleable instructions using or defining these registers.
SmallVector<MachineInstr *, 8> Instrs;
DomainValue() { clear(); }
/// A collapsed DomainValue has no instructions to twiddle - it simply keeps
/// track of the domains where the registers are already available.
bool isCollapsed() const { return Instrs.empty(); }
/// Is domain available?
bool hasDomain(unsigned domain) const {
assert(domain <
static_cast<unsigned>(std::numeric_limits<unsigned>::digits) &&
"undefined behavior");
return AvailableDomains & (1u << domain);
}
/// Mark domain as available.
void addDomain(unsigned domain) {
assert(domain <
static_cast<unsigned>(std::numeric_limits<unsigned>::digits) &&
"undefined behavior");
AvailableDomains |= 1u << domain;
}
// Restrict to a single domain available.
void setSingleDomain(unsigned domain) {
assert(domain <
static_cast<unsigned>(std::numeric_limits<unsigned>::digits) &&
"undefined behavior");
AvailableDomains = 1u << domain;
}
/// Return bitmask of domains that are available and in mask.
unsigned getCommonDomains(unsigned mask) const {
return AvailableDomains & mask;
}
/// First domain available.
unsigned getFirstDomain() const {
return llvm::countr_zero(AvailableDomains);
}
/// Clear this DomainValue and point to next which has all its data.
void clear() {
AvailableDomains = 0;
Next = nullptr;
Instrs.clear();
}
};
class ExecutionDomainFix : public MachineFunctionPass {
SpecificBumpPtrAllocator<DomainValue> Allocator;
SmallVector<DomainValue *, 16> Avail;
const TargetRegisterClass *const RC;
MachineFunction *MF = nullptr;
const TargetInstrInfo *TII = nullptr;
const TargetRegisterInfo *TRI = nullptr;
std::vector<SmallVector<int, 1>> AliasMap;
const unsigned NumRegs;
/// Value currently in each register, or NULL when no value is being tracked.
/// This counts as a DomainValue reference.
using LiveRegsDVInfo = std::vector<DomainValue *>;
LiveRegsDVInfo LiveRegs;
/// Keeps domain information for all registers. Note that this
/// is different from the usual definition notion of liveness. The CPU
/// doesn't care whether or not we consider a register killed.
using OutRegsInfoMap = SmallVector<LiveRegsDVInfo, 4>;
OutRegsInfoMap MBBOutRegsInfos;
ReachingDefAnalysis *RDA = nullptr;
public:
ExecutionDomainFix(char &PassID, const TargetRegisterClass &RC)
: MachineFunctionPass(PassID), RC(&RC), NumRegs(RC.getNumRegs()) {}
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
AU.addRequired<ReachingDefAnalysis>();
MachineFunctionPass::getAnalysisUsage(AU);
}
bool runOnMachineFunction(MachineFunction &MF) override;
MachineFunctionProperties getRequiredProperties() const override {
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::NoVRegs);
}
private:
/// Translate TRI register number to a list of indices into our smaller tables
/// of interesting registers.
iterator_range<SmallVectorImpl<int>::const_iterator>
regIndices(unsigned Reg) const;
/// DomainValue allocation.
DomainValue *alloc(int domain = -1);
/// Add reference to DV.
DomainValue *retain(DomainValue *DV) {
if (DV)
++DV->Refs;
return DV;
}
/// Release a reference to DV. When the last reference is released,
/// collapse if needed.
void release(DomainValue *);
/// Follow the chain of dead DomainValues until a live DomainValue is reached.
/// Update the referenced pointer when necessary.
DomainValue *resolve(DomainValue *&);
/// Set LiveRegs[rx] = dv, updating reference counts.
void setLiveReg(int rx, DomainValue *DV);
/// Kill register rx, recycle or collapse any DomainValue.
void kill(int rx);
/// Force register rx into domain.
void force(int rx, unsigned domain);
/// Collapse open DomainValue into given domain. If there are multiple
/// registers using dv, they each get a unique collapsed DomainValue.
void collapse(DomainValue *dv, unsigned domain);
/// All instructions and registers in B are moved to A, and B is released.
bool merge(DomainValue *A, DomainValue *B);
/// Set up LiveRegs by merging predecessor live-out values.
void enterBasicBlock(const LoopTraversal::TraversedMBBInfo &TraversedMBB);
/// Update live-out values.
void leaveBasicBlock(const LoopTraversal::TraversedMBBInfo &TraversedMBB);
/// Process he given basic block.
void processBasicBlock(const LoopTraversal::TraversedMBBInfo &TraversedMBB);
/// Visit given insturcion.
bool visitInstr(MachineInstr *);
/// Update def-ages for registers defined by MI.
/// If Kill is set, also kill off DomainValues clobbered by the defs.
void processDefs(MachineInstr *, bool Kill);
/// A soft instruction can be changed to work in other domains given by mask.
void visitSoftInstr(MachineInstr *, unsigned mask);
/// A hard instruction only works in one domain. All input registers will be
/// forced into that domain.
void visitHardInstr(MachineInstr *, unsigned domain);
};
} // namespace llvm
#endif // LLVM_CODEGEN_EXECUTIONDOMAINFIX_H
PK iwFZ�r)� � CodeGen/TypePromotion.hnu �[��� //===- TypePromotion.h ------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
///
/// Defines an IR pass for type promotion.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_TYPEPROMOTION_H
#define LLVM_CODEGEN_TYPEPROMOTION_H
#include "llvm/IR/PassManager.h"
namespace llvm {
class Function;
class TargetMachine;
class TypePromotionPass : public PassInfoMixin<TypePromotionPass> {
private:
const TargetMachine *TM;
public:
TypePromotionPass(const TargetMachine *TM): TM(TM) { }
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_TYPEPROMOTION_H
PK iwFZ��HO O CodeGen/RegAllocRegistry.hnu �[��� //===- llvm/CodeGen/RegAllocRegistry.h --------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the implementation for register allocator function
// pass registry (RegisterRegAlloc).
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_REGALLOCREGISTRY_H
#define LLVM_CODEGEN_REGALLOCREGISTRY_H
#include "llvm/CodeGen/RegAllocCommon.h"
#include "llvm/CodeGen/MachinePassRegistry.h"
namespace llvm {
class FunctionPass;
//===----------------------------------------------------------------------===//
///
/// RegisterRegAllocBase class - Track the registration of register allocators.
///
//===----------------------------------------------------------------------===//
template <class SubClass>
class RegisterRegAllocBase : public MachinePassRegistryNode<FunctionPass *(*)()> {
public:
using FunctionPassCtor = FunctionPass *(*)();
static MachinePassRegistry<FunctionPassCtor> Registry;
RegisterRegAllocBase(const char *N, const char *D, FunctionPassCtor C)
: MachinePassRegistryNode(N, D, C) {
Registry.Add(this);
}
~RegisterRegAllocBase() { Registry.Remove(this); }
// Accessors.
SubClass *getNext() const {
return static_cast<SubClass *>(MachinePassRegistryNode::getNext());
}
static SubClass *getList() {
return static_cast<SubClass *>(Registry.getList());
}
static FunctionPassCtor getDefault() { return Registry.getDefault(); }
static void setDefault(FunctionPassCtor C) { Registry.setDefault(C); }
static void setListener(MachinePassRegistryListener<FunctionPassCtor> *L) {
Registry.setListener(L);
}
};
class RegisterRegAlloc : public RegisterRegAllocBase<RegisterRegAlloc> {
public:
RegisterRegAlloc(const char *N, const char *D, FunctionPassCtor C)
: RegisterRegAllocBase(N, D, C) {}
};
/// RegisterRegAlloc's global Registry tracks allocator registration.
template <class T>
MachinePassRegistry<typename RegisterRegAllocBase<T>::FunctionPassCtor>
RegisterRegAllocBase<T>::Registry;
} // end namespace llvm
#endif // LLVM_CODEGEN_REGALLOCREGISTRY_H
PK iwFZ�-�Õ � $ CodeGen/AssignmentTrackingAnalysis.hnu �[��� #ifndef LLVM_CODEGEN_ASSIGNMENTTRACKINGANALYSIS_H
#define LLVM_CODEGEN_ASSIGNMENTTRACKINGANALYSIS_H
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/Pass.h"
namespace llvm {
class Function;
class Instruction;
class raw_ostream;
} // namespace llvm
class FunctionVarLocsBuilder;
namespace llvm {
/// Type wrapper for integer ID for Variables. 0 is reserved.
enum class VariableID : unsigned { Reserved = 0 };
/// Variable location definition used by FunctionVarLocs.
struct VarLocInfo {
llvm::VariableID VariableID;
DIExpression *Expr = nullptr;
DebugLoc DL;
RawLocationWrapper Values = RawLocationWrapper();
};
/// Data structure describing the variable locations in a function. Used as the
/// result of the AssignmentTrackingAnalysis pass. Essentially read-only
/// outside of AssignmentTrackingAnalysis where it is built.
class FunctionVarLocs {
/// Maps VarLocInfo.VariableID to a DebugVariable for VarLocRecords.
SmallVector<DebugVariable> Variables;
/// List of variable location changes grouped by the instruction the
/// change occurs before (see VarLocsBeforeInst). The elements from
/// zero to SingleVarLocEnd represent variables with a single location.
SmallVector<VarLocInfo> VarLocRecords;
/// End of range of VarLocRecords that represent variables with a single
/// location that is valid for the entire scope. Range starts at 0.
unsigned SingleVarLocEnd = 0;
/// Maps an instruction to a range of VarLocs that start just before it.
DenseMap<const Instruction *, std::pair<unsigned, unsigned>>
VarLocsBeforeInst;
public:
/// Return the DILocalVariable for the location definition represented by \p
/// ID.
DILocalVariable *getDILocalVariable(const VarLocInfo *Loc) const {
VariableID VarID = Loc->VariableID;
return getDILocalVariable(VarID);
}
/// Return the DILocalVariable of the variable represented by \p ID.
DILocalVariable *getDILocalVariable(VariableID ID) const {
return const_cast<DILocalVariable *>(getVariable(ID).getVariable());
}
/// Return the DebugVariable represented by \p ID.
const DebugVariable &getVariable(VariableID ID) const {
return Variables[static_cast<unsigned>(ID)];
}
///@name iterators
///@{
/// First single-location variable location definition.
const VarLocInfo *single_locs_begin() const { return VarLocRecords.begin(); }
/// One past the last single-location variable location definition.
const VarLocInfo *single_locs_end() const {
const auto *It = VarLocRecords.begin();
std::advance(It, SingleVarLocEnd);
return It;
}
/// First variable location definition that comes before \p Before.
const VarLocInfo *locs_begin(const Instruction *Before) const {
auto Span = VarLocsBeforeInst.lookup(Before);
const auto *It = VarLocRecords.begin();
std::advance(It, Span.first);
return It;
}
/// One past the last variable location definition that comes before \p
/// Before.
const VarLocInfo *locs_end(const Instruction *Before) const {
auto Span = VarLocsBeforeInst.lookup(Before);
const auto *It = VarLocRecords.begin();
std::advance(It, Span.second);
return It;
}
///@}
void print(raw_ostream &OS, const Function &Fn) const;
///@{
/// Non-const methods used by AssignmentTrackingAnalysis (which invalidate
/// analysis results if called incorrectly).
void init(FunctionVarLocsBuilder &Builder);
void clear();
///@}
};
class AssignmentTrackingAnalysis : public FunctionPass {
std::unique_ptr<FunctionVarLocs> Results;
public:
static char ID;
AssignmentTrackingAnalysis();
bool runOnFunction(Function &F) override;
static bool isRequired() { return true; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
}
const FunctionVarLocs *getResults() { return Results.get(); }
};
} // end namespace llvm
#endif // LLVM_CODEGEN_ASSIGNMENTTRACKINGANALYSIS_H
PK iwFZ[��~ ~ CodeGen/LiveRegUnits.hnu �[��� //===- llvm/CodeGen/LiveRegUnits.h - Register Unit Set ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file
/// A set of register units. It is intended for register liveness tracking.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LIVEREGUNITS_H
#define LLVM_CODEGEN_LIVEREGUNITS_H
#include "llvm/ADT/BitVector.h"
#include "llvm/CodeGen/MachineInstrBundle.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/MC/LaneBitmask.h"
#include "llvm/MC/MCRegisterInfo.h"
#include <cstdint>
namespace llvm {
class MachineInstr;
class MachineBasicBlock;
/// A set of register units used to track register liveness.
class LiveRegUnits {
const TargetRegisterInfo *TRI = nullptr;
BitVector Units;
public:
/// Constructs a new empty LiveRegUnits set.
LiveRegUnits() = default;
/// Constructs and initialize an empty LiveRegUnits set.
LiveRegUnits(const TargetRegisterInfo &TRI) {
init(TRI);
}
/// For a machine instruction \p MI, adds all register units used in
/// \p UsedRegUnits and defined or clobbered in \p ModifiedRegUnits. This is
/// useful when walking over a range of instructions to track registers
/// used or defined seperately.
static void accumulateUsedDefed(const MachineInstr &MI,
LiveRegUnits &ModifiedRegUnits,
LiveRegUnits &UsedRegUnits,
const TargetRegisterInfo *TRI) {
for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
if (O->isRegMask())
ModifiedRegUnits.addRegsInMask(O->getRegMask());
if (!O->isReg())
continue;
Register Reg = O->getReg();
if (!Reg.isPhysical())
continue;
if (O->isDef()) {
// Some architectures (e.g. AArch64 XZR/WZR) have registers that are
// constant and may be used as destinations to indicate the generated
// value is discarded. No need to track such case as a def.
if (!TRI->isConstantPhysReg(Reg))
ModifiedRegUnits.addReg(Reg);
} else {
assert(O->isUse() && "Reg operand not a def and not a use");
UsedRegUnits.addReg(Reg);
}
}
}
/// Initialize and clear the set.
void init(const TargetRegisterInfo &TRI) {
this->TRI = &TRI;
Units.reset();
Units.resize(TRI.getNumRegUnits());
}
/// Clears the set.
void clear() { Units.reset(); }
/// Returns true if the set is empty.
bool empty() const { return Units.none(); }
/// Adds register units covered by physical register \p Reg.
void addReg(MCPhysReg Reg) {
for (MCRegUnit Unit : TRI->regunits(Reg))
Units.set(Unit);
}
/// Adds register units covered by physical register \p Reg that are
/// part of the lanemask \p Mask.
void addRegMasked(MCPhysReg Reg, LaneBitmask Mask) {
for (MCRegUnitMaskIterator Unit(Reg, TRI); Unit.isValid(); ++Unit) {
LaneBitmask UnitMask = (*Unit).second;
if (UnitMask.none() || (UnitMask & Mask).any())
Units.set((*Unit).first);
}
}
/// Removes all register units covered by physical register \p Reg.
void removeReg(MCPhysReg Reg) {
for (MCRegUnit Unit : TRI->regunits(Reg))
Units.reset(Unit);
}
/// Removes register units not preserved by the regmask \p RegMask.
/// The regmask has the same format as the one in the RegMask machine operand.
void removeRegsNotPreserved(const uint32_t *RegMask);
/// Adds register units not preserved by the regmask \p RegMask.
/// The regmask has the same format as the one in the RegMask machine operand.
void addRegsInMask(const uint32_t *RegMask);
/// Returns true if no part of physical register \p Reg is live.
bool available(MCPhysReg Reg) const {
for (MCRegUnit Unit : TRI->regunits(Reg)) {
if (Units.test(Unit))
return false;
}
return true;
}
/// Updates liveness when stepping backwards over the instruction \p MI.
/// This removes all register units defined or clobbered in \p MI and then
/// adds the units used (as in use operands) in \p MI.
void stepBackward(const MachineInstr &MI);
/// Adds all register units used, defined or clobbered in \p MI.
/// This is useful when walking over a range of instruction to find registers
/// unused over the whole range.
void accumulate(const MachineInstr &MI);
/// Adds registers living out of block \p MBB.
/// Live out registers are the union of the live-in registers of the successor
/// blocks and pristine registers. Live out registers of the end block are the
/// callee saved registers.
void addLiveOuts(const MachineBasicBlock &MBB);
/// Adds registers living into block \p MBB.
void addLiveIns(const MachineBasicBlock &MBB);
/// Adds all register units marked in the bitvector \p RegUnits.
void addUnits(const BitVector &RegUnits) {
Units |= RegUnits;
}
/// Removes all register units marked in the bitvector \p RegUnits.
void removeUnits(const BitVector &RegUnits) {
Units.reset(RegUnits);
}
/// Return the internal bitvector representation of the set.
const BitVector &getBitVector() const {
return Units;
}
private:
/// Adds pristine registers. Pristine registers are callee saved registers
/// that are unused in the function.
void addPristines(const MachineFunction &MF);
};
/// Returns an iterator range over all physical register and mask operands for
/// \p MI and bundled instructions. This also skips any debug operands.
inline iterator_range<filter_iterator<
ConstMIBundleOperands, std::function<bool(const MachineOperand &)>>>
phys_regs_and_masks(const MachineInstr &MI) {
std::function<bool(const MachineOperand &)> Pred =
[](const MachineOperand &MOP) {
return MOP.isRegMask() ||
(MOP.isReg() && !MOP.isDebug() && MOP.getReg().isPhysical());
};
return make_filter_range(const_mi_bundle_ops(MI), Pred);
}
} // end namespace llvm
#endif // LLVM_CODEGEN_LIVEREGUNITS_H
PK iwFZ�5X�� � CodeGen/MachineFrameInfo.hnu �[��� //===-- CodeGen/MachineFrameInfo.h - Abstract Stack Frame Rep. --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// The file defines the MachineFrameInfo class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEFRAMEINFO_H
#define LLVM_CODEGEN_MACHINEFRAMEINFO_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/Register.h"
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/Support/Alignment.h"
#include <cassert>
#include <vector>
namespace llvm {
class raw_ostream;
class MachineFunction;
class MachineBasicBlock;
class BitVector;
class AllocaInst;
/// The CalleeSavedInfo class tracks the information need to locate where a
/// callee saved register is in the current frame.
/// Callee saved reg can also be saved to a different register rather than
/// on the stack by setting DstReg instead of FrameIdx.
class CalleeSavedInfo {
Register Reg;
union {
int FrameIdx;
unsigned DstReg;
};
/// Flag indicating whether the register is actually restored in the epilog.
/// In most cases, if a register is saved, it is also restored. There are
/// some situations, though, when this is not the case. For example, the
/// LR register on ARM is usually saved, but on exit from the function its
/// saved value may be loaded directly into PC. Since liveness tracking of
/// physical registers treats callee-saved registers are live outside of
/// the function, LR would be treated as live-on-exit, even though in these
/// scenarios it is not. This flag is added to indicate that the saved
/// register described by this object is not restored in the epilog.
/// The long-term solution is to model the liveness of callee-saved registers
/// by implicit uses on the return instructions, however, the required
/// changes in the ARM backend would be quite extensive.
bool Restored = true;
/// Flag indicating whether the register is spilled to stack or another
/// register.
bool SpilledToReg = false;
public:
explicit CalleeSavedInfo(unsigned R, int FI = 0) : Reg(R), FrameIdx(FI) {}
// Accessors.
Register getReg() const { return Reg; }
int getFrameIdx() const { return FrameIdx; }
unsigned getDstReg() const { return DstReg; }
void setFrameIdx(int FI) {
FrameIdx = FI;
SpilledToReg = false;
}
void setDstReg(Register SpillReg) {
DstReg = SpillReg;
SpilledToReg = true;
}
bool isRestored() const { return Restored; }
void setRestored(bool R) { Restored = R; }
bool isSpilledToReg() const { return SpilledToReg; }
};
/// The MachineFrameInfo class represents an abstract stack frame until
/// prolog/epilog code is inserted. This class is key to allowing stack frame
/// representation optimizations, such as frame pointer elimination. It also
/// allows more mundane (but still important) optimizations, such as reordering
/// of abstract objects on the stack frame.
///
/// To support this, the class assigns unique integer identifiers to stack
/// objects requested clients. These identifiers are negative integers for
/// fixed stack objects (such as arguments passed on the stack) or nonnegative
/// for objects that may be reordered. Instructions which refer to stack
/// objects use a special MO_FrameIndex operand to represent these frame
/// indexes.
///
/// Because this class keeps track of all references to the stack frame, it
/// knows when a variable sized object is allocated on the stack. This is the
/// sole condition which prevents frame pointer elimination, which is an
/// important optimization on register-poor architectures. Because original
/// variable sized alloca's in the source program are the only source of
/// variable sized stack objects, it is safe to decide whether there will be
/// any variable sized objects before all stack objects are known (for
/// example, register allocator spill code never needs variable sized
/// objects).
///
/// When prolog/epilog code emission is performed, the final stack frame is
/// built and the machine instructions are modified to refer to the actual
/// stack offsets of the object, eliminating all MO_FrameIndex operands from
/// the program.
///
/// Abstract Stack Frame Information
class MachineFrameInfo {
public:
/// Stack Smashing Protection (SSP) rules require that vulnerable stack
/// allocations are located close the stack protector.
enum SSPLayoutKind {
SSPLK_None, ///< Did not trigger a stack protector. No effect on data
///< layout.
SSPLK_LargeArray, ///< Array or nested array >= SSP-buffer-size. Closest
///< to the stack protector.
SSPLK_SmallArray, ///< Array or nested array < SSP-buffer-size. 2nd closest
///< to the stack protector.
SSPLK_AddrOf ///< The address of this allocation is exposed and
///< triggered protection. 3rd closest to the protector.
};
private:
// Represent a single object allocated on the stack.
struct StackObject {
// The offset of this object from the stack pointer on entry to
// the function. This field has no meaning for a variable sized element.
int64_t SPOffset;
// The size of this object on the stack. 0 means a variable sized object,
// ~0ULL means a dead object.
uint64_t Size;
// The required alignment of this stack slot.
Align Alignment;
// If true, the value of the stack object is set before
// entering the function and is not modified inside the function. By
// default, fixed objects are immutable unless marked otherwise.
bool isImmutable;
// If true the stack object is used as spill slot. It
// cannot alias any other memory objects.
bool isSpillSlot;
/// If true, this stack slot is used to spill a value (could be deopt
/// and/or GC related) over a statepoint. We know that the address of the
/// slot can't alias any LLVM IR value. This is very similar to a Spill
/// Slot, but is created by statepoint lowering is SelectionDAG, not the
/// register allocator.
bool isStatepointSpillSlot = false;
/// Identifier for stack memory type analagous to address space. If this is
/// non-0, the meaning is target defined. Offsets cannot be directly
/// compared between objects with different stack IDs. The object may not
/// necessarily reside in the same contiguous memory block as other stack
/// objects. Objects with differing stack IDs should not be merged or
/// replaced substituted for each other.
//
/// It is assumed a target uses consecutive, increasing stack IDs starting
/// from 1.
uint8_t StackID;
/// If this stack object is originated from an Alloca instruction
/// this value saves the original IR allocation. Can be NULL.
const AllocaInst *Alloca;
// If true, the object was mapped into the local frame
// block and doesn't need additional handling for allocation beyond that.
bool PreAllocated = false;
// If true, an LLVM IR value might point to this object.
// Normally, spill slots and fixed-offset objects don't alias IR-accessible
// objects, but there are exceptions (on PowerPC, for example, some byval
// arguments have ABI-prescribed offsets).
bool isAliased;
/// If true, the object has been zero-extended.
bool isZExt = false;
/// If true, the object has been sign-extended.
bool isSExt = false;
uint8_t SSPLayout = SSPLK_None;
StackObject(uint64_t Size, Align Alignment, int64_t SPOffset,
bool IsImmutable, bool IsSpillSlot, const AllocaInst *Alloca,
bool IsAliased, uint8_t StackID = 0)
: SPOffset(SPOffset), Size(Size), Alignment(Alignment),
isImmutable(IsImmutable), isSpillSlot(IsSpillSlot), StackID(StackID),
Alloca(Alloca), isAliased(IsAliased) {}
};
/// The alignment of the stack.
Align StackAlignment;
/// Can the stack be realigned. This can be false if the target does not
/// support stack realignment, or if the user asks us not to realign the
/// stack. In this situation, overaligned allocas are all treated as dynamic
/// allocations and the target must handle them as part of DYNAMIC_STACKALLOC
/// lowering. All non-alloca stack objects have their alignment clamped to the
/// base ABI stack alignment.
/// FIXME: There is room for improvement in this case, in terms of
/// grouping overaligned allocas into a "secondary stack frame" and
/// then only use a single alloca to allocate this frame and only a
/// single virtual register to access it. Currently, without such an
/// optimization, each such alloca gets its own dynamic realignment.
bool StackRealignable;
/// Whether the function has the \c alignstack attribute.
bool ForcedRealign;
/// The list of stack objects allocated.
std::vector<StackObject> Objects;
/// This contains the number of fixed objects contained on
/// the stack. Because fixed objects are stored at a negative index in the
/// Objects list, this is also the index to the 0th object in the list.
unsigned NumFixedObjects = 0;
/// This boolean keeps track of whether any variable
/// sized objects have been allocated yet.
bool HasVarSizedObjects = false;
/// This boolean keeps track of whether there is a call
/// to builtin \@llvm.frameaddress.
bool FrameAddressTaken = false;
/// This boolean keeps track of whether there is a call
/// to builtin \@llvm.returnaddress.
bool ReturnAddressTaken = false;
/// This boolean keeps track of whether there is a call
/// to builtin \@llvm.experimental.stackmap.
bool HasStackMap = false;
/// This boolean keeps track of whether there is a call
/// to builtin \@llvm.experimental.patchpoint.
bool HasPatchPoint = false;
/// The prolog/epilog code inserter calculates the final stack
/// offsets for all of the fixed size objects, updating the Objects list
/// above. It then updates StackSize to contain the number of bytes that need
/// to be allocated on entry to the function.
uint64_t StackSize = 0;
/// The amount that a frame offset needs to be adjusted to
/// have the actual offset from the stack/frame pointer. The exact usage of
/// this is target-dependent, but it is typically used to adjust between
/// SP-relative and FP-relative offsets. E.G., if objects are accessed via
/// SP then OffsetAdjustment is zero; if FP is used, OffsetAdjustment is set
/// to the distance between the initial SP and the value in FP. For many
/// targets, this value is only used when generating debug info (via
/// TargetRegisterInfo::getFrameIndexReference); when generating code, the
/// corresponding adjustments are performed directly.
int OffsetAdjustment = 0;
/// The prolog/epilog code inserter may process objects that require greater
/// alignment than the default alignment the target provides.
/// To handle this, MaxAlignment is set to the maximum alignment
/// needed by the objects on the current frame. If this is greater than the
/// native alignment maintained by the compiler, dynamic alignment code will
/// be needed.
///
Align MaxAlignment;
/// Set to true if this function adjusts the stack -- e.g.,
/// when calling another function. This is only valid during and after
/// prolog/epilog code insertion.
bool AdjustsStack = false;
/// Set to true if this function has any function calls.
bool HasCalls = false;
/// The frame index for the stack protector.
int StackProtectorIdx = -1;
/// The frame index for the function context. Used for SjLj exceptions.
int FunctionContextIdx = -1;
/// This contains the size of the largest call frame if the target uses frame
/// setup/destroy pseudo instructions (as defined in the TargetFrameInfo
/// class). This information is important for frame pointer elimination.
/// It is only valid during and after prolog/epilog code insertion.
unsigned MaxCallFrameSize = ~0u;
/// The number of bytes of callee saved registers that the target wants to
/// report for the current function in the CodeView S_FRAMEPROC record.
unsigned CVBytesOfCalleeSavedRegisters = 0;
/// The prolog/epilog code inserter fills in this vector with each
/// callee saved register saved in either the frame or a different
/// register. Beyond its use by the prolog/ epilog code inserter,
/// this data is used for debug info and exception handling.
std::vector<CalleeSavedInfo> CSInfo;
/// Has CSInfo been set yet?
bool CSIValid = false;
/// References to frame indices which are mapped
/// into the local frame allocation block. <FrameIdx, LocalOffset>
SmallVector<std::pair<int, int64_t>, 32> LocalFrameObjects;
/// Size of the pre-allocated local frame block.
int64_t LocalFrameSize = 0;
/// Required alignment of the local object blob, which is the strictest
/// alignment of any object in it.
Align LocalFrameMaxAlign;
/// Whether the local object blob needs to be allocated together. If not,
/// PEI should ignore the isPreAllocated flags on the stack objects and
/// just allocate them normally.
bool UseLocalStackAllocationBlock = false;
/// True if the function dynamically adjusts the stack pointer through some
/// opaque mechanism like inline assembly or Win32 EH.
bool HasOpaqueSPAdjustment = false;
/// True if the function contains operations which will lower down to
/// instructions which manipulate the stack pointer.
bool HasCopyImplyingStackAdjustment = false;
/// True if the function contains a call to the llvm.vastart intrinsic.
bool HasVAStart = false;
/// True if this is a varargs function that contains a musttail call.
bool HasMustTailInVarArgFunc = false;
/// True if this function contains a tail call. If so immutable objects like
/// function arguments are no longer so. A tail call *can* override fixed
/// stack objects like arguments so we can't treat them as immutable.
bool HasTailCall = false;
/// Not null, if shrink-wrapping found a better place for the prologue.
MachineBasicBlock *Save = nullptr;
/// Not null, if shrink-wrapping found a better place for the epilogue.
MachineBasicBlock *Restore = nullptr;
/// Size of the UnsafeStack Frame
uint64_t UnsafeStackSize = 0;
public:
explicit MachineFrameInfo(Align StackAlignment, bool StackRealignable,
bool ForcedRealign)
: StackAlignment(StackAlignment),
StackRealignable(StackRealignable), ForcedRealign(ForcedRealign) {}
MachineFrameInfo(const MachineFrameInfo &) = delete;
/// Return true if there are any stack objects in this function.
bool hasStackObjects() const { return !Objects.empty(); }
/// This method may be called any time after instruction
/// selection is complete to determine if the stack frame for this function
/// contains any variable sized objects.
bool hasVarSizedObjects() const { return HasVarSizedObjects; }
/// Return the index for the stack protector object.
int getStackProtectorIndex() const { return StackProtectorIdx; }
void setStackProtectorIndex(int I) { StackProtectorIdx = I; }
bool hasStackProtectorIndex() const { return StackProtectorIdx != -1; }
/// Return the index for the function context object.
/// This object is used for SjLj exceptions.
int getFunctionContextIndex() const { return FunctionContextIdx; }
void setFunctionContextIndex(int I) { FunctionContextIdx = I; }
bool hasFunctionContextIndex() const { return FunctionContextIdx != -1; }
/// This method may be called any time after instruction
/// selection is complete to determine if there is a call to
/// \@llvm.frameaddress in this function.
bool isFrameAddressTaken() const { return FrameAddressTaken; }
void setFrameAddressIsTaken(bool T) { FrameAddressTaken = T; }
/// This method may be called any time after
/// instruction selection is complete to determine if there is a call to
/// \@llvm.returnaddress in this function.
bool isReturnAddressTaken() const { return ReturnAddressTaken; }
void setReturnAddressIsTaken(bool s) { ReturnAddressTaken = s; }
/// This method may be called any time after instruction
/// selection is complete to determine if there is a call to builtin
/// \@llvm.experimental.stackmap.
bool hasStackMap() const { return HasStackMap; }
void setHasStackMap(bool s = true) { HasStackMap = s; }
/// This method may be called any time after instruction
/// selection is complete to determine if there is a call to builtin
/// \@llvm.experimental.patchpoint.
bool hasPatchPoint() const { return HasPatchPoint; }
void setHasPatchPoint(bool s = true) { HasPatchPoint = s; }
/// Return true if this function requires a split stack prolog, even if it
/// uses no stack space. This is only meaningful for functions where
/// MachineFunction::shouldSplitStack() returns true.
//
// For non-leaf functions we have to allow for the possibility that the call
// is to a non-split function, as in PR37807. This function could also take
// the address of a non-split function. When the linker tries to adjust its
// non-existent prologue, it would fail with an error. Mark the object file so
// that such failures are not errors. See this Go language bug-report
// https://go-review.googlesource.com/c/go/+/148819/
bool needsSplitStackProlog() const {
return getStackSize() != 0 || hasTailCall();
}
/// Return the minimum frame object index.
int getObjectIndexBegin() const { return -NumFixedObjects; }
/// Return one past the maximum frame object index.
int getObjectIndexEnd() const { return (int)Objects.size()-NumFixedObjects; }
/// Return the number of fixed objects.
unsigned getNumFixedObjects() const { return NumFixedObjects; }
/// Return the number of objects.
unsigned getNumObjects() const { return Objects.size(); }
/// Map a frame index into the local object block
void mapLocalFrameObject(int ObjectIndex, int64_t Offset) {
LocalFrameObjects.push_back(std::pair<int, int64_t>(ObjectIndex, Offset));
Objects[ObjectIndex + NumFixedObjects].PreAllocated = true;
}
/// Get the local offset mapping for a for an object.
std::pair<int, int64_t> getLocalFrameObjectMap(int i) const {
assert (i >= 0 && (unsigned)i < LocalFrameObjects.size() &&
"Invalid local object reference!");
return LocalFrameObjects[i];
}
/// Return the number of objects allocated into the local object block.
int64_t getLocalFrameObjectCount() const { return LocalFrameObjects.size(); }
/// Set the size of the local object blob.
void setLocalFrameSize(int64_t sz) { LocalFrameSize = sz; }
/// Get the size of the local object blob.
int64_t getLocalFrameSize() const { return LocalFrameSize; }
/// Required alignment of the local object blob,
/// which is the strictest alignment of any object in it.
void setLocalFrameMaxAlign(Align Alignment) {
LocalFrameMaxAlign = Alignment;
}
/// Return the required alignment of the local object blob.
Align getLocalFrameMaxAlign() const { return LocalFrameMaxAlign; }
/// Get whether the local allocation blob should be allocated together or
/// let PEI allocate the locals in it directly.
bool getUseLocalStackAllocationBlock() const {
return UseLocalStackAllocationBlock;
}
/// setUseLocalStackAllocationBlock - Set whether the local allocation blob
/// should be allocated together or let PEI allocate the locals in it
/// directly.
void setUseLocalStackAllocationBlock(bool v) {
UseLocalStackAllocationBlock = v;
}
/// Return true if the object was pre-allocated into the local block.
bool isObjectPreAllocated(int ObjectIdx) const {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
return Objects[ObjectIdx+NumFixedObjects].PreAllocated;
}
/// Return the size of the specified object.
int64_t getObjectSize(int ObjectIdx) const {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
return Objects[ObjectIdx+NumFixedObjects].Size;
}
/// Change the size of the specified stack object.
void setObjectSize(int ObjectIdx, int64_t Size) {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
Objects[ObjectIdx+NumFixedObjects].Size = Size;
}
/// Return the alignment of the specified stack object.
Align getObjectAlign(int ObjectIdx) const {
assert(unsigned(ObjectIdx + NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
return Objects[ObjectIdx + NumFixedObjects].Alignment;
}
/// Should this stack ID be considered in MaxAlignment.
bool contributesToMaxAlignment(uint8_t StackID) {
return StackID == TargetStackID::Default ||
StackID == TargetStackID::ScalableVector;
}
/// setObjectAlignment - Change the alignment of the specified stack object.
void setObjectAlignment(int ObjectIdx, Align Alignment) {
assert(unsigned(ObjectIdx + NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
Objects[ObjectIdx + NumFixedObjects].Alignment = Alignment;
// Only ensure max alignment for the default and scalable vector stack.
uint8_t StackID = getStackID(ObjectIdx);
if (contributesToMaxAlignment(StackID))
ensureMaxAlignment(Alignment);
}
/// Return the underlying Alloca of the specified
/// stack object if it exists. Returns 0 if none exists.
const AllocaInst* getObjectAllocation(int ObjectIdx) const {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
return Objects[ObjectIdx+NumFixedObjects].Alloca;
}
/// Remove the underlying Alloca of the specified stack object if it
/// exists. This generally should not be used and is for reduction tooling.
void clearObjectAllocation(int ObjectIdx) {
assert(unsigned(ObjectIdx + NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
Objects[ObjectIdx + NumFixedObjects].Alloca = nullptr;
}
/// Return the assigned stack offset of the specified object
/// from the incoming stack pointer.
int64_t getObjectOffset(int ObjectIdx) const {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
assert(!isDeadObjectIndex(ObjectIdx) &&
"Getting frame offset for a dead object?");
return Objects[ObjectIdx+NumFixedObjects].SPOffset;
}
bool isObjectZExt(int ObjectIdx) const {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
return Objects[ObjectIdx+NumFixedObjects].isZExt;
}
void setObjectZExt(int ObjectIdx, bool IsZExt) {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
Objects[ObjectIdx+NumFixedObjects].isZExt = IsZExt;
}
bool isObjectSExt(int ObjectIdx) const {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
return Objects[ObjectIdx+NumFixedObjects].isSExt;
}
void setObjectSExt(int ObjectIdx, bool IsSExt) {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
Objects[ObjectIdx+NumFixedObjects].isSExt = IsSExt;
}
/// Set the stack frame offset of the specified object. The
/// offset is relative to the stack pointer on entry to the function.
void setObjectOffset(int ObjectIdx, int64_t SPOffset) {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
assert(!isDeadObjectIndex(ObjectIdx) &&
"Setting frame offset for a dead object?");
Objects[ObjectIdx+NumFixedObjects].SPOffset = SPOffset;
}
SSPLayoutKind getObjectSSPLayout(int ObjectIdx) const {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
return (SSPLayoutKind)Objects[ObjectIdx+NumFixedObjects].SSPLayout;
}
void setObjectSSPLayout(int ObjectIdx, SSPLayoutKind Kind) {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
assert(!isDeadObjectIndex(ObjectIdx) &&
"Setting SSP layout for a dead object?");
Objects[ObjectIdx+NumFixedObjects].SSPLayout = Kind;
}
/// Return the number of bytes that must be allocated to hold
/// all of the fixed size frame objects. This is only valid after
/// Prolog/Epilog code insertion has finalized the stack frame layout.
uint64_t getStackSize() const { return StackSize; }
/// Set the size of the stack.
void setStackSize(uint64_t Size) { StackSize = Size; }
/// Estimate and return the size of the stack frame.
uint64_t estimateStackSize(const MachineFunction &MF) const;
/// Return the correction for frame offsets.
int getOffsetAdjustment() const { return OffsetAdjustment; }
/// Set the correction for frame offsets.
void setOffsetAdjustment(int Adj) { OffsetAdjustment = Adj; }
/// Return the alignment in bytes that this function must be aligned to,
/// which is greater than the default stack alignment provided by the target.
Align getMaxAlign() const { return MaxAlignment; }
/// Make sure the function is at least Align bytes aligned.
void ensureMaxAlignment(Align Alignment);
/// Return true if this function adjusts the stack -- e.g.,
/// when calling another function. This is only valid during and after
/// prolog/epilog code insertion.
bool adjustsStack() const { return AdjustsStack; }
void setAdjustsStack(bool V) { AdjustsStack = V; }
/// Return true if the current function has any function calls.
bool hasCalls() const { return HasCalls; }
void setHasCalls(bool V) { HasCalls = V; }
/// Returns true if the function contains opaque dynamic stack adjustments.
bool hasOpaqueSPAdjustment() const { return HasOpaqueSPAdjustment; }
void setHasOpaqueSPAdjustment(bool B) { HasOpaqueSPAdjustment = B; }
/// Returns true if the function contains operations which will lower down to
/// instructions which manipulate the stack pointer.
bool hasCopyImplyingStackAdjustment() const {
return HasCopyImplyingStackAdjustment;
}
void setHasCopyImplyingStackAdjustment(bool B) {
HasCopyImplyingStackAdjustment = B;
}
/// Returns true if the function calls the llvm.va_start intrinsic.
bool hasVAStart() const { return HasVAStart; }
void setHasVAStart(bool B) { HasVAStart = B; }
/// Returns true if the function is variadic and contains a musttail call.
bool hasMustTailInVarArgFunc() const { return HasMustTailInVarArgFunc; }
void setHasMustTailInVarArgFunc(bool B) { HasMustTailInVarArgFunc = B; }
/// Returns true if the function contains a tail call.
bool hasTailCall() const { return HasTailCall; }
void setHasTailCall(bool V = true) { HasTailCall = V; }
/// Computes the maximum size of a callframe and the AdjustsStack property.
/// This only works for targets defining
/// TargetInstrInfo::getCallFrameSetupOpcode(), getCallFrameDestroyOpcode(),
/// and getFrameSize().
/// This is usually computed by the prologue epilogue inserter but some
/// targets may call this to compute it earlier.
void computeMaxCallFrameSize(const MachineFunction &MF);
/// Return the maximum size of a call frame that must be
/// allocated for an outgoing function call. This is only available if
/// CallFrameSetup/Destroy pseudo instructions are used by the target, and
/// then only during or after prolog/epilog code insertion.
///
unsigned getMaxCallFrameSize() const {
// TODO: Enable this assert when targets are fixed.
//assert(isMaxCallFrameSizeComputed() && "MaxCallFrameSize not computed yet");
if (!isMaxCallFrameSizeComputed())
return 0;
return MaxCallFrameSize;
}
bool isMaxCallFrameSizeComputed() const {
return MaxCallFrameSize != ~0u;
}
void setMaxCallFrameSize(unsigned S) { MaxCallFrameSize = S; }
/// Returns how many bytes of callee-saved registers the target pushed in the
/// prologue. Only used for debug info.
unsigned getCVBytesOfCalleeSavedRegisters() const {
return CVBytesOfCalleeSavedRegisters;
}
void setCVBytesOfCalleeSavedRegisters(unsigned S) {
CVBytesOfCalleeSavedRegisters = S;
}
/// Create a new object at a fixed location on the stack.
/// All fixed objects should be created before other objects are created for
/// efficiency. By default, fixed objects are not pointed to by LLVM IR
/// values. This returns an index with a negative value.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable,
bool isAliased = false);
/// Create a spill slot at a fixed location on the stack.
/// Returns an index with a negative value.
int CreateFixedSpillStackObject(uint64_t Size, int64_t SPOffset,
bool IsImmutable = false);
/// Returns true if the specified index corresponds to a fixed stack object.
bool isFixedObjectIndex(int ObjectIdx) const {
return ObjectIdx < 0 && (ObjectIdx >= -(int)NumFixedObjects);
}
/// Returns true if the specified index corresponds
/// to an object that might be pointed to by an LLVM IR value.
bool isAliasedObjectIndex(int ObjectIdx) const {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
return Objects[ObjectIdx+NumFixedObjects].isAliased;
}
/// Returns true if the specified index corresponds to an immutable object.
bool isImmutableObjectIndex(int ObjectIdx) const {
// Tail calling functions can clobber their function arguments.
if (HasTailCall)
return false;
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
return Objects[ObjectIdx+NumFixedObjects].isImmutable;
}
/// Marks the immutability of an object.
void setIsImmutableObjectIndex(int ObjectIdx, bool IsImmutable) {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
Objects[ObjectIdx+NumFixedObjects].isImmutable = IsImmutable;
}
/// Returns true if the specified index corresponds to a spill slot.
bool isSpillSlotObjectIndex(int ObjectIdx) const {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
return Objects[ObjectIdx+NumFixedObjects].isSpillSlot;
}
bool isStatepointSpillSlotObjectIndex(int ObjectIdx) const {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
return Objects[ObjectIdx+NumFixedObjects].isStatepointSpillSlot;
}
/// \see StackID
uint8_t getStackID(int ObjectIdx) const {
return Objects[ObjectIdx+NumFixedObjects].StackID;
}
/// \see StackID
void setStackID(int ObjectIdx, uint8_t ID) {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
Objects[ObjectIdx+NumFixedObjects].StackID = ID;
// If ID > 0, MaxAlignment may now be overly conservative.
// If ID == 0, MaxAlignment will need to be updated separately.
}
/// Returns true if the specified index corresponds to a dead object.
bool isDeadObjectIndex(int ObjectIdx) const {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
return Objects[ObjectIdx+NumFixedObjects].Size == ~0ULL;
}
/// Returns true if the specified index corresponds to a variable sized
/// object.
bool isVariableSizedObjectIndex(int ObjectIdx) const {
assert(unsigned(ObjectIdx + NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
return Objects[ObjectIdx + NumFixedObjects].Size == 0;
}
void markAsStatepointSpillSlotObjectIndex(int ObjectIdx) {
assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&
"Invalid Object Idx!");
Objects[ObjectIdx+NumFixedObjects].isStatepointSpillSlot = true;
assert(isStatepointSpillSlotObjectIndex(ObjectIdx) && "inconsistent");
}
/// Create a new statically sized stack object, returning
/// a nonnegative identifier to represent it.
int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot,
const AllocaInst *Alloca = nullptr, uint8_t ID = 0);
/// Create a new statically sized stack object that represents a spill slot,
/// returning a nonnegative identifier to represent it.
int CreateSpillStackObject(uint64_t Size, Align Alignment);
/// Remove or mark dead a statically sized stack object.
void RemoveStackObject(int ObjectIdx) {
// Mark it dead.
Objects[ObjectIdx+NumFixedObjects].Size = ~0ULL;
}
/// Notify the MachineFrameInfo object that a variable sized object has been
/// created. This must be created whenever a variable sized object is
/// created, whether or not the index returned is actually used.
int CreateVariableSizedObject(Align Alignment, const AllocaInst *Alloca);
/// Returns a reference to call saved info vector for the current function.
const std::vector<CalleeSavedInfo> &getCalleeSavedInfo() const {
return CSInfo;
}
/// \copydoc getCalleeSavedInfo()
std::vector<CalleeSavedInfo> &getCalleeSavedInfo() { return CSInfo; }
/// Used by prolog/epilog inserter to set the function's callee saved
/// information.
void setCalleeSavedInfo(std::vector<CalleeSavedInfo> CSI) {
CSInfo = std::move(CSI);
}
/// Has the callee saved info been calculated yet?
bool isCalleeSavedInfoValid() const { return CSIValid; }
void setCalleeSavedInfoValid(bool v) { CSIValid = v; }
MachineBasicBlock *getSavePoint() const { return Save; }
void setSavePoint(MachineBasicBlock *NewSave) { Save = NewSave; }
MachineBasicBlock *getRestorePoint() const { return Restore; }
void setRestorePoint(MachineBasicBlock *NewRestore) { Restore = NewRestore; }
uint64_t getUnsafeStackSize() const { return UnsafeStackSize; }
void setUnsafeStackSize(uint64_t Size) { UnsafeStackSize = Size; }
/// Return a set of physical registers that are pristine.
///
/// Pristine registers hold a value that is useless to the current function,
/// but that must be preserved - they are callee saved registers that are not
/// saved.
///
/// Before the PrologueEpilogueInserter has placed the CSR spill code, this
/// method always returns an empty set.
BitVector getPristineRegs(const MachineFunction &MF) const;
/// Used by the MachineFunction printer to print information about
/// stack objects. Implemented in MachineFunction.cpp.
void print(const MachineFunction &MF, raw_ostream &OS) const;
/// dump - Print the function to stderr.
void dump(const MachineFunction &MF) const;
};
} // End llvm namespace
#endif
PK iwFZ�Z�?W W CodeGen/PBQPRAConstraint.hnu �[��� //===- llvm/CodeGen/PBQPRAConstraint.h --------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the PBQPBuilder interface, for classes which build PBQP
// instances to represent register allocation problems, and the RegAllocPBQP
// interface.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_PBQPRACONSTRAINT_H
#define LLVM_CODEGEN_PBQPRACONSTRAINT_H
#include <algorithm>
#include <memory>
#include <vector>
namespace llvm {
namespace PBQP {
namespace RegAlloc {
// Forward declare PBQP graph class.
class PBQPRAGraph;
} // end namespace RegAlloc
} // end namespace PBQP
using PBQPRAGraph = PBQP::RegAlloc::PBQPRAGraph;
/// Abstract base for classes implementing PBQP register allocation
/// constraints (e.g. Spill-costs, interference, coalescing).
class PBQPRAConstraint {
public:
virtual ~PBQPRAConstraint() = 0;
virtual void apply(PBQPRAGraph &G) = 0;
private:
virtual void anchor();
};
/// PBQP register allocation constraint composer.
///
/// Constraints added to this list will be applied, in the order that they are
/// added, to the PBQP graph.
class PBQPRAConstraintList : public PBQPRAConstraint {
public:
void apply(PBQPRAGraph &G) override {
for (auto &C : Constraints)
C->apply(G);
}
void addConstraint(std::unique_ptr<PBQPRAConstraint> C) {
if (C)
Constraints.push_back(std::move(C));
}
private:
std::vector<std::unique_ptr<PBQPRAConstraint>> Constraints;
void anchor() override;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_PBQPRACONSTRAINT_H
PK iwFZ_E�i] ] CodeGen/Passes.hnu �[��� //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines interfaces to access the target independent code generation
// passes provided by the LLVM backend.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_PASSES_H
#define LLVM_CODEGEN_PASSES_H
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/Discriminator.h"
#include "llvm/CodeGen/RegAllocCommon.h"
#include <functional>
#include <string>
namespace llvm {
class FunctionPass;
class MachineFunction;
class MachineFunctionPass;
class ModulePass;
class Pass;
class TargetMachine;
class raw_ostream;
template <typename T> class IntrusiveRefCntPtr;
namespace vfs {
class FileSystem;
} // namespace vfs
} // End llvm namespace
// List of target independent CodeGen pass IDs.
namespace llvm {
/// AtomicExpandPass - At IR level this pass replace atomic instructions with
/// __atomic_* library calls, or target specific instruction which implement the
/// same semantics in a way which better fits the target backend.
FunctionPass *createAtomicExpandPass();
/// createUnreachableBlockEliminationPass - The LLVM code generator does not
/// work well with unreachable basic blocks (what live ranges make sense for a
/// block that cannot be reached?). As such, a code generator should either
/// not instruction select unreachable blocks, or run this pass as its
/// last LLVM modifying pass to clean up blocks that are not reachable from
/// the entry block.
FunctionPass *createUnreachableBlockEliminationPass();
/// createBasicBlockSections Pass - This pass assigns sections to machine
/// basic blocks and is enabled with -fbasic-block-sections.
MachineFunctionPass *createBasicBlockSectionsPass();
/// createMachineFunctionSplitterPass - This pass splits machine functions
/// using profile information.
MachineFunctionPass *createMachineFunctionSplitterPass();
/// MachineFunctionPrinter pass - This pass prints out the machine function to
/// the given stream as a debugging tool.
MachineFunctionPass *
createMachineFunctionPrinterPass(raw_ostream &OS,
const std::string &Banner ="");
/// StackFramePrinter pass - This pass prints out the machine function's
/// stack frame to the given stream as a debugging tool.
MachineFunctionPass *createStackFrameLayoutAnalysisPass();
/// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
/// using the MIR serialization format.
MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
/// This pass resets a MachineFunction when it has the FailedISel property
/// as if it was just created.
/// If EmitFallbackDiag is true, the pass will emit a
/// DiagnosticInfoISelFallback for every MachineFunction it resets.
/// If AbortOnFailedISel is true, abort compilation instead of resetting.
MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag,
bool AbortOnFailedISel);
/// createCodeGenPreparePass - Transform the code to expose more pattern
/// matching during instruction selection.
FunctionPass *createCodeGenPreparePass();
/// This pass implements generation of target-specific intrinsics to support
/// handling of complex number arithmetic
FunctionPass *createComplexDeinterleavingPass(const TargetMachine *TM);
/// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
/// load-linked/store-conditional loops.
extern char &AtomicExpandID;
/// MachineLoopInfo - This pass is a loop analysis pass.
extern char &MachineLoopInfoID;
/// MachineDominators - This pass is a machine dominators analysis pass.
extern char &MachineDominatorsID;
/// MachineDominanaceFrontier - This pass is a machine dominators analysis.
extern char &MachineDominanceFrontierID;
/// MachineRegionInfo - This pass computes SESE regions for machine functions.
extern char &MachineRegionInfoPassID;
/// EdgeBundles analysis - Bundle machine CFG edges.
extern char &EdgeBundlesID;
/// LiveVariables pass - This pass computes the set of blocks in which each
/// variable is life and sets machine operand kill flags.
extern char &LiveVariablesID;
/// PHIElimination - This pass eliminates machine instruction PHI nodes
/// by inserting copy instructions. This destroys SSA information, but is the
/// desired input for some register allocators. This pass is "required" by
/// these register allocator like this: AU.addRequiredID(PHIEliminationID);
extern char &PHIEliminationID;
/// LiveIntervals - This analysis keeps track of the live ranges of virtual
/// and physical registers.
extern char &LiveIntervalsID;
/// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
extern char &LiveStacksID;
/// TwoAddressInstruction - This pass reduces two-address instructions to
/// use two operands. This destroys SSA information but it is desired by
/// register allocators.
extern char &TwoAddressInstructionPassID;
/// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
extern char &ProcessImplicitDefsID;
/// RegisterCoalescer - This pass merges live ranges to eliminate copies.
extern char &RegisterCoalescerID;
/// MachineScheduler - This pass schedules machine instructions.
extern char &MachineSchedulerID;
/// PostMachineScheduler - This pass schedules machine instructions postRA.
extern char &PostMachineSchedulerID;
/// SpillPlacement analysis. Suggest optimal placement of spill code between
/// basic blocks.
extern char &SpillPlacementID;
/// ShrinkWrap pass. Look for the best place to insert save and restore
// instruction and update the MachineFunctionInfo with that information.
extern char &ShrinkWrapID;
/// LiveRangeShrink pass. Move instruction close to its definition to shrink
/// the definition's live range.
extern char &LiveRangeShrinkID;
/// Greedy register allocator.
extern char &RAGreedyID;
/// Basic register allocator.
extern char &RABasicID;
/// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
/// assigned in VirtRegMap.
extern char &VirtRegRewriterID;
FunctionPass *createVirtRegRewriter(bool ClearVirtRegs = true);
/// UnreachableMachineBlockElimination - This pass removes unreachable
/// machine basic blocks.
extern char &UnreachableMachineBlockElimID;
/// DeadMachineInstructionElim - This pass removes dead machine instructions.
extern char &DeadMachineInstructionElimID;
/// This pass adds dead/undef flags after analyzing subregister lanes.
extern char &DetectDeadLanesID;
/// This pass perform post-ra machine sink for COPY instructions.
extern char &PostRAMachineSinkingID;
/// This pass adds flow sensitive discriminators.
extern char &MIRAddFSDiscriminatorsID;
/// This pass reads flow sensitive profile.
extern char &MIRProfileLoaderPassID;
/// FastRegisterAllocation Pass - This pass register allocates as fast as
/// possible. It is best suited for debug code where live ranges are short.
///
FunctionPass *createFastRegisterAllocator();
FunctionPass *createFastRegisterAllocator(RegClassFilterFunc F,
bool ClearVirtRegs);
/// BasicRegisterAllocation Pass - This pass implements a degenerate global
/// register allocator using the basic regalloc framework.
///
FunctionPass *createBasicRegisterAllocator();
FunctionPass *createBasicRegisterAllocator(RegClassFilterFunc F);
/// Greedy register allocation pass - This pass implements a global register
/// allocator for optimized builds.
///
FunctionPass *createGreedyRegisterAllocator();
FunctionPass *createGreedyRegisterAllocator(RegClassFilterFunc F);
/// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
/// Quadratic Prograaming (PBQP) based register allocator.
///
FunctionPass *createDefaultPBQPRegisterAllocator();
/// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
/// and eliminates abstract frame references.
extern char &PrologEpilogCodeInserterID;
MachineFunctionPass *createPrologEpilogInserterPass();
/// ExpandPostRAPseudos - This pass expands pseudo instructions after
/// register allocation.
extern char &ExpandPostRAPseudosID;
/// PostRAHazardRecognizer - This pass runs the post-ra hazard
/// recognizer.
extern char &PostRAHazardRecognizerID;
/// PostRAScheduler - This pass performs post register allocation
/// scheduling.
extern char &PostRASchedulerID;
/// BranchFolding - This pass performs machine code CFG based
/// optimizations to delete branches to branches, eliminate branches to
/// successor blocks (creating fall throughs), and eliminating branches over
/// branches.
extern char &BranchFolderPassID;
/// BranchRelaxation - This pass replaces branches that need to jump further
/// than is supported by a branch instruction.
extern char &BranchRelaxationPassID;
/// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
extern char &MachineFunctionPrinterPassID;
/// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
/// serialization format.
extern char &MIRPrintingPassID;
/// TailDuplicate - Duplicate blocks with unconditional branches
/// into tails of their predecessors.
extern char &TailDuplicateID;
/// Duplicate blocks with unconditional branches into tails of their
/// predecessors. Variant that works before register allocation.
extern char &EarlyTailDuplicateID;
/// MachineTraceMetrics - This pass computes critical path and CPU resource
/// usage in an ensemble of traces.
extern char &MachineTraceMetricsID;
/// EarlyIfConverter - This pass performs if-conversion on SSA form by
/// inserting cmov instructions.
extern char &EarlyIfConverterID;
/// EarlyIfPredicator - This pass performs if-conversion on SSA form by
/// predicating if/else block and insert select at the join point.
extern char &EarlyIfPredicatorID;
/// This pass performs instruction combining using trace metrics to estimate
/// critical-path and resource depth.
extern char &MachineCombinerID;
/// StackSlotColoring - This pass performs stack coloring and merging.
/// It merges disjoint allocas to reduce the stack size.
extern char &StackColoringID;
/// StackFramePrinter - This pass prints the stack frame layout and variable
/// mappings.
extern char &StackFrameLayoutAnalysisPassID;
/// IfConverter - This pass performs machine code if conversion.
extern char &IfConverterID;
FunctionPass *createIfConverter(
std::function<bool(const MachineFunction &)> Ftor);
/// MachineBlockPlacement - This pass places basic blocks based on branch
/// probabilities.
extern char &MachineBlockPlacementID;
/// MachineBlockPlacementStats - This pass collects statistics about the
/// basic block placement using branch probabilities and block frequency
/// information.
extern char &MachineBlockPlacementStatsID;
/// GCLowering Pass - Used by gc.root to perform its default lowering
/// operations.
FunctionPass *createGCLoweringPass();
/// GCLowering Pass - Used by gc.root to perform its default lowering
/// operations.
extern char &GCLoweringID;
/// ShadowStackGCLowering - Implements the custom lowering mechanism
/// used by the shadow stack GC. Only runs on functions which opt in to
/// the shadow stack collector.
FunctionPass *createShadowStackGCLoweringPass();
/// ShadowStackGCLowering - Implements the custom lowering mechanism
/// used by the shadow stack GC.
extern char &ShadowStackGCLoweringID;
/// GCMachineCodeAnalysis - Target-independent pass to mark safe points
/// in machine code. Must be added very late during code generation, just
/// prior to output, and importantly after all CFG transformations (such as
/// branch folding).
extern char &GCMachineCodeAnalysisID;
/// Creates a pass to print GC metadata.
///
FunctionPass *createGCInfoPrinter(raw_ostream &OS);
/// MachineCSE - This pass performs global CSE on machine instructions.
extern char &MachineCSEID;
/// MIRCanonicalizer - This pass canonicalizes MIR by renaming vregs
/// according to the semantics of the instruction as well as hoists
/// code.
extern char &MIRCanonicalizerID;
/// ImplicitNullChecks - This pass folds null pointer checks into nearby
/// memory operations.
extern char &ImplicitNullChecksID;
/// This pass performs loop invariant code motion on machine instructions.
extern char &MachineLICMID;
/// This pass performs loop invariant code motion on machine instructions.
/// This variant works before register allocation. \see MachineLICMID.
extern char &EarlyMachineLICMID;
/// MachineSinking - This pass performs sinking on machine instructions.
extern char &MachineSinkingID;
/// MachineCopyPropagation - This pass performs copy propagation on
/// machine instructions.
extern char &MachineCopyPropagationID;
MachineFunctionPass *createMachineCopyPropagationPass(bool UseCopyInstr);
/// MachineLateInstrsCleanup - This pass removes redundant identical
/// instructions after register allocation and rematerialization.
extern char &MachineLateInstrsCleanupID;
/// PeepholeOptimizer - This pass performs peephole optimizations -
/// like extension and comparison eliminations.
extern char &PeepholeOptimizerID;
/// OptimizePHIs - This pass optimizes machine instruction PHIs
/// to take advantage of opportunities created during DAG legalization.
extern char &OptimizePHIsID;
/// StackSlotColoring - This pass performs stack slot coloring.
extern char &StackSlotColoringID;
/// This pass lays out funclets contiguously.
extern char &FuncletLayoutID;
/// This pass inserts the XRay instrumentation sleds if they are supported by
/// the target platform.
extern char &XRayInstrumentationID;
/// This pass inserts FEntry calls
extern char &FEntryInserterID;
/// This pass implements the "patchable-function" attribute.
extern char &PatchableFunctionID;
/// createStackProtectorPass - This pass adds stack protectors to functions.
///
FunctionPass *createStackProtectorPass();
/// createMachineVerifierPass - This pass verifies cenerated machine code
/// instructions for correctness.
///
FunctionPass *createMachineVerifierPass(const std::string& Banner);
/// createDwarfEHPass - This pass mulches exception handling code into a form
/// adapted to code generation. Required if using dwarf exception handling.
FunctionPass *createDwarfEHPass(CodeGenOpt::Level OptLevel);
/// createWinEHPass - Prepares personality functions used by MSVC on Windows,
/// in addition to the Itanium LSDA based personalities.
FunctionPass *createWinEHPass(bool DemoteCatchSwitchPHIOnly = false);
/// createSjLjEHPreparePass - This pass adapts exception handling code to use
/// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
///
FunctionPass *createSjLjEHPreparePass(const TargetMachine *TM);
/// createWasmEHPass - This pass adapts exception handling code to use
/// WebAssembly's exception handling scheme.
FunctionPass *createWasmEHPass();
/// LocalStackSlotAllocation - This pass assigns local frame indices to stack
/// slots relative to one another and allocates base registers to access them
/// when it is estimated by the target to be out of range of normal frame
/// pointer or stack pointer index addressing.
extern char &LocalStackSlotAllocationID;
/// This pass expands pseudo-instructions, reserves registers and adjusts
/// machine frame information.
extern char &FinalizeISelID;
/// UnpackMachineBundles - This pass unpack machine instruction bundles.
extern char &UnpackMachineBundlesID;
FunctionPass *
createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
/// FinalizeMachineBundles - This pass finalize machine instruction
/// bundles (created earlier, e.g. during pre-RA scheduling).
extern char &FinalizeMachineBundlesID;
/// StackMapLiveness - This pass analyses the register live-out set of
/// stackmap/patchpoint intrinsics and attaches the calculated information to
/// the intrinsic for later emission to the StackMap.
extern char &StackMapLivenessID;
// MachineSanitizerBinaryMetadata - appends/finalizes sanitizer binary
// metadata after llvm SanitizerBinaryMetadata pass.
extern char &MachineSanitizerBinaryMetadataID;
/// RemoveRedundantDebugValues pass.
extern char &RemoveRedundantDebugValuesID;
/// MachineCFGPrinter pass.
extern char &MachineCFGPrinterID;
/// LiveDebugValues pass
extern char &LiveDebugValuesID;
/// createJumpInstrTables - This pass creates jump-instruction tables.
ModulePass *createJumpInstrTablesPass();
/// InterleavedAccess Pass - This pass identifies and matches interleaved
/// memory accesses to target specific intrinsics.
///
FunctionPass *createInterleavedAccessPass();
/// InterleavedLoadCombines Pass - This pass identifies interleaved loads and
/// combines them into wide loads detectable by InterleavedAccessPass
///
FunctionPass *createInterleavedLoadCombinePass();
/// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
/// TLS variables for the emulated TLS model.
///
ModulePass *createLowerEmuTLSPass();
/// This pass lowers the \@llvm.load.relative and \@llvm.objc.* intrinsics to
/// instructions. This is unsafe to do earlier because a pass may combine the
/// constant initializer into the load, which may result in an overflowing
/// evaluation.
ModulePass *createPreISelIntrinsicLoweringPass();
/// GlobalMerge - This pass merges internal (by default) globals into structs
/// to enable reuse of a base pointer by indexed addressing modes.
/// It can also be configured to focus on size optimizations only.
///
Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
bool OnlyOptimizeForSize = false,
bool MergeExternalByDefault = false);
/// This pass splits the stack into a safe stack and an unsafe stack to
/// protect against stack-based overflow vulnerabilities.
FunctionPass *createSafeStackPass();
/// This pass detects subregister lanes in a virtual register that are used
/// independently of other lanes and splits them into separate virtual
/// registers.
extern char &RenameIndependentSubregsID;
/// This pass is executed POST-RA to collect which physical registers are
/// preserved by given machine function.
FunctionPass *createRegUsageInfoCollector();
/// Return a MachineFunction pass that identifies call sites
/// and propagates register usage information of callee to caller
/// if available with PysicalRegisterUsageInfo pass.
FunctionPass *createRegUsageInfoPropPass();
/// This pass performs software pipelining on machine instructions.
extern char &MachinePipelinerID;
/// This pass frees the memory occupied by the MachineFunction.
FunctionPass *createFreeMachineFunctionPass();
/// This pass performs outlining on machine instructions directly before
/// printing assembly.
ModulePass *createMachineOutlinerPass(bool RunOnAllFunctions = true);
/// This pass expands the reduction intrinsics into sequences of shuffles.
FunctionPass *createExpandReductionsPass();
// This pass replaces intrinsics operating on vector operands with calls to
// the corresponding function in a vector library (e.g., SVML, libmvec).
FunctionPass *createReplaceWithVeclibLegacyPass();
/// This pass expands the vector predication intrinsics into unpredicated
/// instructions with selects or just the explicit vector length into the
/// predicate mask.
FunctionPass *createExpandVectorPredicationPass();
// Expands large div/rem instructions.
FunctionPass *createExpandLargeDivRemPass();
// Expands large div/rem instructions.
FunctionPass *createExpandLargeFpConvertPass();
// This pass expands memcmp() to load/stores.
FunctionPass *createExpandMemCmpPass();
/// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp
FunctionPass *createBreakFalseDeps();
// This pass expands indirectbr instructions.
FunctionPass *createIndirectBrExpandPass();
/// Creates CFI Fixup pass. \see CFIFixup.cpp
FunctionPass *createCFIFixup();
/// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp
FunctionPass *createCFIInstrInserter();
/// Creates CFGuard longjmp target identification pass.
/// \see CFGuardLongjmp.cpp
FunctionPass *createCFGuardLongjmpPass();
/// Creates EHContGuard catchret target identification pass.
/// \see EHContGuardCatchret.cpp
FunctionPass *createEHContGuardCatchretPass();
/// Create Hardware Loop pass. \see HardwareLoops.cpp
FunctionPass *createHardwareLoopsLegacyPass();
/// This pass inserts pseudo probe annotation for callsite profiling.
FunctionPass *createPseudoProbeInserter();
/// Create IR Type Promotion pass. \see TypePromotion.cpp
FunctionPass *createTypePromotionLegacyPass();
/// Add Flow Sensitive Discriminators. PassNum specifies the
/// sequence number of this pass (starting from 1).
FunctionPass *
createMIRAddFSDiscriminatorsPass(sampleprof::FSDiscriminatorPass P);
/// Read Flow Sensitive Profile.
FunctionPass *
createMIRProfileLoaderPass(std::string File, std::string RemappingFile,
sampleprof::FSDiscriminatorPass P,
IntrusiveRefCntPtr<vfs::FileSystem> FS);
/// Creates MIR Debugify pass. \see MachineDebugify.cpp
ModulePass *createDebugifyMachineModulePass();
/// Creates MIR Strip Debug pass. \see MachineStripDebug.cpp
/// If OnlyDebugified is true then it will only strip debug info if it was
/// added by a Debugify pass. The module will be left unchanged if the debug
/// info was generated by another source such as clang.
ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
/// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp
ModulePass *createCheckDebugMachineModulePass();
/// The pass fixups statepoint machine instruction to replace usage of
/// caller saved registers with stack slots.
extern char &FixupStatepointCallerSavedID;
/// The pass transforms load/store <256 x i32> to AMX load/store intrinsics
/// or split the data to two <128 x i32>.
FunctionPass *createX86LowerAMXTypePass();
/// The pass insert tile config intrinsics for AMX fast register allocation.
FunctionPass *createX86PreAMXConfigPass();
/// The pass transforms amx intrinsics to scalar operation if the function has
/// optnone attribute or it is O0.
FunctionPass *createX86LowerAMXIntrinsicsPass();
/// When learning an eviction policy, extract score(reward) information,
/// otherwise this does nothing
FunctionPass *createRegAllocScoringPass();
/// JMC instrument pass.
ModulePass *createJMCInstrumenterPass();
/// This pass converts conditional moves to conditional jumps when profitable.
FunctionPass *createSelectOptimizePass();
FunctionPass *createCallBrPass();
/// Lowers KCFI operand bundles for indirect calls.
FunctionPass *createKCFIPass();
} // End llvm namespace
#endif
PK iwFZ A]P� � $ CodeGen/LinkAllAsmWriterComponents.hnu �[��� //===- llvm/Codegen/LinkAllAsmWriterComponents.h ----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This header file pulls in all assembler writer related passes for tools like
// llc that need this functionality.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LINKALLASMWRITERCOMPONENTS_H
#define LLVM_CODEGEN_LINKALLASMWRITERCOMPONENTS_H
#include "llvm/IR/BuiltinGCs.h"
#include <cstdlib>
namespace {
struct ForceAsmWriterLinking {
ForceAsmWriterLinking() {
// We must reference the plug-ins in such a way that compilers will not
// delete it all as dead code, even with whole program optimization,
// yet is effectively a NO-OP. As the compiler isn't smart enough
// to know that getenv() never returns -1, this will do the job.
// This is so that globals in the translation units where these functions
// are defined are forced to be initialized, populating various
// registries.
if (std::getenv("bar") != (char*) -1)
return;
llvm::linkOcamlGCPrinter();
llvm::linkErlangGCPrinter();
}
} ForceAsmWriterLinking; // Force link by creating a global definition.
}
#endif // LLVM_CODEGEN_LINKALLASMWRITERCOMPONENTS_H
PK iwFZ��3P� � CodeGen/MachinePostDominators.hnu �[��� //===- llvm/CodeGen/MachinePostDominators.h ----------------------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file exposes interfaces to post dominance information for
// target-specific code.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEPOSTDOMINATORS_H
#define LLVM_CODEGEN_MACHINEPOSTDOMINATORS_H
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include <memory>
namespace llvm {
///
/// MachinePostDominatorTree - an analysis pass wrapper for DominatorTree
/// used to compute the post-dominator tree for MachineFunctions.
///
class MachinePostDominatorTree : public MachineFunctionPass {
using PostDomTreeT = PostDomTreeBase<MachineBasicBlock>;
std::unique_ptr<PostDomTreeT> PDT;
public:
static char ID;
MachinePostDominatorTree();
PostDomTreeT &getBase() {
if (!PDT)
PDT.reset(new PostDomTreeT());
return *PDT;
}
FunctionPass *createMachinePostDominatorTreePass();
MachineDomTreeNode *getRootNode() const { return PDT->getRootNode(); }
MachineDomTreeNode *operator[](MachineBasicBlock *BB) const {
return PDT->getNode(BB);
}
MachineDomTreeNode *getNode(MachineBasicBlock *BB) const {
return PDT->getNode(BB);
}
bool dominates(const MachineDomTreeNode *A,
const MachineDomTreeNode *B) const {
return PDT->dominates(A, B);
}
bool dominates(const MachineBasicBlock *A, const MachineBasicBlock *B) const {
return PDT->dominates(A, B);
}
bool properlyDominates(const MachineDomTreeNode *A,
const MachineDomTreeNode *B) const {
return PDT->properlyDominates(A, B);
}
bool properlyDominates(const MachineBasicBlock *A,
const MachineBasicBlock *B) const {
return PDT->properlyDominates(A, B);
}
bool isVirtualRoot(const MachineDomTreeNode *Node) const {
return PDT->isVirtualRoot(Node);
}
MachineBasicBlock *findNearestCommonDominator(MachineBasicBlock *A,
MachineBasicBlock *B) const {
return PDT->findNearestCommonDominator(A, B);
}
/// Returns the nearest common dominator of the given blocks.
/// If that tree node is a virtual root, a nullptr will be returned.
MachineBasicBlock *
findNearestCommonDominator(ArrayRef<MachineBasicBlock *> Blocks) const;
bool runOnMachineFunction(MachineFunction &MF) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override { PDT.reset(nullptr); }
void verifyAnalysis() const override;
void print(llvm::raw_ostream &OS, const Module *M = nullptr) const override;
};
} //end of namespace llvm
#endif
PK iwFZ� & & $ CodeGen/DbgEntityHistoryCalculator.hnu �[��� //===- llvm/CodeGen/DbgEntityHistoryCalculator.h ----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_DBGENTITYHISTORYCALCULATOR_H
#define LLVM_CODEGEN_DBGENTITYHISTORYCALCULATOR_H
#include "llvm/ADT/MapVector.h"
#include "llvm/ADT/PointerIntPair.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineInstr.h"
#include <utility>
namespace llvm {
class DILocation;
class LexicalScopes;
class DINode;
class MachineFunction;
class TargetRegisterInfo;
/// Record instruction ordering so we can query their relative positions within
/// a function. Meta instructions are given the same ordinal as the preceding
/// non-meta instruction. Class state is invalid if MF is modified after
/// calling initialize.
class InstructionOrdering {
public:
void initialize(const MachineFunction &MF);
void clear() { InstNumberMap.clear(); }
/// Check if instruction \p A comes before \p B, where \p A and \p B both
/// belong to the MachineFunction passed to initialize().
bool isBefore(const MachineInstr *A, const MachineInstr *B) const;
private:
/// Each instruction is assigned an order number.
DenseMap<const MachineInstr *, unsigned> InstNumberMap;
};
/// For each user variable, keep a list of instruction ranges where this
/// variable is accessible. The variables are listed in order of appearance.
class DbgValueHistoryMap {
public:
/// Index in the entry vector.
typedef size_t EntryIndex;
/// Special value to indicate that an entry is valid until the end of the
/// function.
static const EntryIndex NoEntry = std::numeric_limits<EntryIndex>::max();
/// Specifies a change in a variable's debug value history.
///
/// There exist two types of entries:
///
/// * Debug value entry:
///
/// A new debug value becomes live. If the entry's \p EndIndex is \p NoEntry,
/// the value is valid until the end of the function. For other values, the
/// index points to the entry in the entry vector that ends this debug
/// value. The ending entry can either be an overlapping debug value, or
/// an instruction that clobbers the value.
///
/// * Clobbering entry:
///
/// This entry's instruction clobbers one or more preceding
/// register-described debug values that have their end index
/// set to this entry's position in the entry vector.
class Entry {
friend DbgValueHistoryMap;
public:
enum EntryKind { DbgValue, Clobber };
Entry(const MachineInstr *Instr, EntryKind Kind)
: Instr(Instr, Kind), EndIndex(NoEntry) {}
const MachineInstr *getInstr() const { return Instr.getPointer(); }
EntryIndex getEndIndex() const { return EndIndex; }
EntryKind getEntryKind() const { return Instr.getInt(); }
bool isClobber() const { return getEntryKind() == Clobber; }
bool isDbgValue() const { return getEntryKind() == DbgValue; }
bool isClosed() const { return EndIndex != NoEntry; }
void endEntry(EntryIndex EndIndex);
private:
PointerIntPair<const MachineInstr *, 1, EntryKind> Instr;
EntryIndex EndIndex;
};
using Entries = SmallVector<Entry, 4>;
using InlinedEntity = std::pair<const DINode *, const DILocation *>;
using EntriesMap = MapVector<InlinedEntity, Entries>;
private:
EntriesMap VarEntries;
public:
bool startDbgValue(InlinedEntity Var, const MachineInstr &MI,
EntryIndex &NewIndex);
EntryIndex startClobber(InlinedEntity Var, const MachineInstr &MI);
Entry &getEntry(InlinedEntity Var, EntryIndex Index) {
auto &Entries = VarEntries[Var];
return Entries[Index];
}
/// Test whether a vector of entries features any non-empty locations. It
/// could have no entries, or only DBG_VALUE $noreg entries.
bool hasNonEmptyLocation(const Entries &Entries) const;
/// Drop location ranges which exist entirely outside each variable's scope.
void trimLocationRanges(const MachineFunction &MF, LexicalScopes &LScopes,
const InstructionOrdering &Ordering);
bool empty() const { return VarEntries.empty(); }
void clear() { VarEntries.clear(); }
EntriesMap::const_iterator begin() const { return VarEntries.begin(); }
EntriesMap::const_iterator end() const { return VarEntries.end(); }
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD void dump(StringRef FuncName) const;
#endif
};
/// For each inlined instance of a source-level label, keep the corresponding
/// DBG_LABEL instruction. The DBG_LABEL instruction could be used to generate
/// a temporary (assembler) label before it.
class DbgLabelInstrMap {
public:
using InlinedEntity = std::pair<const DINode *, const DILocation *>;
using InstrMap = MapVector<InlinedEntity, const MachineInstr *>;
private:
InstrMap LabelInstr;
public:
void addInstr(InlinedEntity Label, const MachineInstr &MI);
bool empty() const { return LabelInstr.empty(); }
void clear() { LabelInstr.clear(); }
InstrMap::const_iterator begin() const { return LabelInstr.begin(); }
InstrMap::const_iterator end() const { return LabelInstr.end(); }
};
void calculateDbgEntityHistory(const MachineFunction *MF,
const TargetRegisterInfo *TRI,
DbgValueHistoryMap &DbgValues,
DbgLabelInstrMap &DbgLabels);
} // end namespace llvm
#endif // LLVM_CODEGEN_DBGENTITYHISTORYCALCULATOR_H
PK iwFZ/ 3�� � CodeGen/ISDOpcodes.hnu �[��� //===-- llvm/CodeGen/ISDOpcodes.h - CodeGen opcodes -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares codegen opcodes and related utilities.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_ISDOPCODES_H
#define LLVM_CODEGEN_ISDOPCODES_H
#include "llvm/CodeGen/ValueTypes.h"
namespace llvm {
/// ISD namespace - This namespace contains an enum which represents all of the
/// SelectionDAG node types and value types.
///
namespace ISD {
//===--------------------------------------------------------------------===//
/// ISD::NodeType enum - This enum defines the target-independent operators
/// for a SelectionDAG.
///
/// Targets may also define target-dependent operator codes for SDNodes. For
/// example, on x86, these are the enum values in the X86ISD namespace.
/// Targets should aim to use target-independent operators to model their
/// instruction sets as much as possible, and only use target-dependent
/// operators when they have special requirements.
///
/// Finally, during and after selection proper, SNodes may use special
/// operator codes that correspond directly with MachineInstr opcodes. These
/// are used to represent selected instructions. See the isMachineOpcode()
/// and getMachineOpcode() member functions of SDNode.
///
enum NodeType {
/// DELETED_NODE - This is an illegal value that is used to catch
/// errors. This opcode is not a legal opcode for any node.
DELETED_NODE,
/// EntryToken - This is the marker used to indicate the start of a region.
EntryToken,
/// TokenFactor - This node takes multiple tokens as input and produces a
/// single token result. This is used to represent the fact that the operand
/// operators are independent of each other.
TokenFactor,
/// AssertSext, AssertZext - These nodes record if a register contains a
/// value that has already been zero or sign extended from a narrower type.
/// These nodes take two operands. The first is the node that has already
/// been extended, and the second is a value type node indicating the width
/// of the extension.
/// NOTE: In case of the source value (or any vector element value) is
/// poisoned the assertion will not be true for that value.
AssertSext,
AssertZext,
/// AssertAlign - These nodes record if a register contains a value that
/// has a known alignment and the trailing bits are known to be zero.
/// NOTE: In case of the source value (or any vector element value) is
/// poisoned the assertion will not be true for that value.
AssertAlign,
/// Various leaf nodes.
BasicBlock,
VALUETYPE,
CONDCODE,
Register,
RegisterMask,
Constant,
ConstantFP,
GlobalAddress,
GlobalTLSAddress,
FrameIndex,
JumpTable,
ConstantPool,
ExternalSymbol,
BlockAddress,
/// The address of the GOT
GLOBAL_OFFSET_TABLE,
/// FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and
/// llvm.returnaddress on the DAG. These nodes take one operand, the index
/// of the frame or return address to return. An index of zero corresponds
/// to the current function's frame or return address, an index of one to
/// the parent's frame or return address, and so on.
FRAMEADDR,
RETURNADDR,
/// ADDROFRETURNADDR - Represents the llvm.addressofreturnaddress intrinsic.
/// This node takes no operand, returns a target-specific pointer to the
/// place in the stack frame where the return address of the current
/// function is stored.
ADDROFRETURNADDR,
/// SPONENTRY - Represents the llvm.sponentry intrinsic. Takes no argument
/// and returns the stack pointer value at the entry of the current
/// function calling this intrinsic.
SPONENTRY,
/// LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
/// Materializes the offset from the local object pointer of another
/// function to a particular local object passed to llvm.localescape. The
/// operand is the MCSymbol label used to represent this offset, since
/// typically the offset is not known until after code generation of the
/// parent.
LOCAL_RECOVER,
/// READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on
/// the DAG, which implements the named register global variables extension.
READ_REGISTER,
WRITE_REGISTER,
/// FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to
/// first (possible) on-stack argument. This is needed for correct stack
/// adjustment during unwind.
FRAME_TO_ARGS_OFFSET,
/// EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical
/// Frame Address (CFA), generally the value of the stack pointer at the
/// call site in the previous frame.
EH_DWARF_CFA,
/// OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents
/// 'eh_return' gcc dwarf builtin, which is used to return from
/// exception. The general meaning is: adjust stack by OFFSET and pass
/// execution to HANDLER. Many platform-related details also :)
EH_RETURN,
/// RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer)
/// This corresponds to the eh.sjlj.setjmp intrinsic.
/// It takes an input chain and a pointer to the jump buffer as inputs
/// and returns an outchain.
EH_SJLJ_SETJMP,
/// OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer)
/// This corresponds to the eh.sjlj.longjmp intrinsic.
/// It takes an input chain and a pointer to the jump buffer as inputs
/// and returns an outchain.
EH_SJLJ_LONGJMP,
/// OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN)
/// The target initializes the dispatch table here.
EH_SJLJ_SETUP_DISPATCH,
/// TargetConstant* - Like Constant*, but the DAG does not do any folding,
/// simplification, or lowering of the constant. They are used for constants
/// which are known to fit in the immediate fields of their users, or for
/// carrying magic numbers which are not values which need to be
/// materialized in registers.
TargetConstant,
TargetConstantFP,
/// TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or
/// anything else with this node, and this is valid in the target-specific
/// dag, turning into a GlobalAddress operand.
TargetGlobalAddress,
TargetGlobalTLSAddress,
TargetFrameIndex,
TargetJumpTable,
TargetConstantPool,
TargetExternalSymbol,
TargetBlockAddress,
MCSymbol,
/// TargetIndex - Like a constant pool entry, but with completely
/// target-dependent semantics. Holds target flags, a 32-bit index, and a
/// 64-bit index. Targets can use this however they like.
TargetIndex,
/// RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...)
/// This node represents a target intrinsic function with no side effects.
/// The first operand is the ID number of the intrinsic from the
/// llvm::Intrinsic namespace. The operands to the intrinsic follow. The
/// node returns the result of the intrinsic.
INTRINSIC_WO_CHAIN,
/// RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...)
/// This node represents a target intrinsic function with side effects that
/// returns a result. The first operand is a chain pointer. The second is
/// the ID number of the intrinsic from the llvm::Intrinsic namespace. The
/// operands to the intrinsic follow. The node has two results, the result
/// of the intrinsic and an output chain.
INTRINSIC_W_CHAIN,
/// OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...)
/// This node represents a target intrinsic function with side effects that
/// does not return a result. The first operand is a chain pointer. The
/// second is the ID number of the intrinsic from the llvm::Intrinsic
/// namespace. The operands to the intrinsic follow.
INTRINSIC_VOID,
/// CopyToReg - This node has three operands: a chain, a register number to
/// set to this value, and a value.
CopyToReg,
/// CopyFromReg - This node indicates that the input value is a virtual or
/// physical register that is defined outside of the scope of this
/// SelectionDAG. The register is available from the RegisterSDNode object.
CopyFromReg,
/// UNDEF - An undefined node.
UNDEF,
// FREEZE - FREEZE(VAL) returns an arbitrary value if VAL is UNDEF (or
// is evaluated to UNDEF), or returns VAL otherwise. Note that each
// read of UNDEF can yield different value, but FREEZE(UNDEF) cannot.
FREEZE,
/// EXTRACT_ELEMENT - This is used to get the lower or upper (determined by
/// a Constant, which is required to be operand #1) half of the integer or
/// float value specified as operand #0. This is only for use before
/// legalization, for values that will be broken into multiple registers.
EXTRACT_ELEMENT,
/// BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
/// Given two values of the same integer value type, this produces a value
/// twice as big. Like EXTRACT_ELEMENT, this can only be used before
/// legalization. The lower part of the composite value should be in
/// element 0 and the upper part should be in element 1.
BUILD_PAIR,
/// MERGE_VALUES - This node takes multiple discrete operands and returns
/// them all as its individual results. This nodes has exactly the same
/// number of inputs and outputs. This node is useful for some pieces of the
/// code generator that want to think about a single node with multiple
/// results, not multiple nodes.
MERGE_VALUES,
/// Simple integer binary arithmetic operators.
ADD,
SUB,
MUL,
SDIV,
UDIV,
SREM,
UREM,
/// SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing
/// a signed/unsigned value of type i[2*N], and return the full value as
/// two results, each of type iN.
SMUL_LOHI,
UMUL_LOHI,
/// SDIVREM/UDIVREM - Divide two integers and produce both a quotient and
/// remainder result.
SDIVREM,
UDIVREM,
/// CARRY_FALSE - This node is used when folding other nodes,
/// like ADDC/SUBC, which indicate the carry result is always false.
CARRY_FALSE,
/// Carry-setting nodes for multiple precision addition and subtraction.
/// These nodes take two operands of the same value type, and produce two
/// results. The first result is the normal add or sub result, the second
/// result is the carry flag result.
/// FIXME: These nodes are deprecated in favor of UADDO_CARRY and USUBO_CARRY.
/// They are kept around for now to provide a smooth transition path
/// toward the use of UADDO_CARRY/USUBO_CARRY and will eventually be removed.
ADDC,
SUBC,
/// Carry-using nodes for multiple precision addition and subtraction. These
/// nodes take three operands: The first two are the normal lhs and rhs to
/// the add or sub, and the third is the input carry flag. These nodes
/// produce two results; the normal result of the add or sub, and the output
/// carry flag. These nodes both read and write a carry flag to allow them
/// to them to be chained together for add and sub of arbitrarily large
/// values.
ADDE,
SUBE,
/// Carry-using nodes for multiple precision addition and subtraction.
/// These nodes take three operands: The first two are the normal lhs and
/// rhs to the add or sub, and the third is a boolean value that is 1 if and
/// only if there is an incoming carry/borrow. These nodes produce two
/// results: the normal result of the add or sub, and a boolean value that is
/// 1 if and only if there is an outgoing carry/borrow.
///
/// Care must be taken if these opcodes are lowered to hardware instructions
/// that use the inverse logic -- 0 if and only if there is an
/// incoming/outgoing carry/borrow. In such cases, you must preserve the
/// semantics of these opcodes by inverting the incoming carry/borrow, feeding
/// it to the add/sub hardware instruction, and then inverting the outgoing
/// carry/borrow.
///
/// The use of these opcodes is preferable to adde/sube if the target supports
/// it, as the carry is a regular value rather than a glue, which allows
/// further optimisation.
///
/// These opcodes are different from [US]{ADD,SUB}O in that
/// U{ADD,SUB}O_CARRY consume and produce a carry/borrow, whereas
/// [US]{ADD,SUB}O produce an overflow.
UADDO_CARRY,
USUBO_CARRY,
/// Carry-using overflow-aware nodes for multiple precision addition and
/// subtraction. These nodes take three operands: The first two are normal lhs
/// and rhs to the add or sub, and the third is a boolean indicating if there
/// is an incoming carry. They produce two results: the normal result of the
/// add or sub, and a boolean that indicates if an overflow occurred (*not*
/// flag, because it may be a store to memory, etc.). If the type of the
/// boolean is not i1 then the high bits conform to getBooleanContents.
SADDO_CARRY,
SSUBO_CARRY,
/// RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
/// These nodes take two operands: the normal LHS and RHS to the add. They
/// produce two results: the normal result of the add, and a boolean that
/// indicates if an overflow occurred (*not* a flag, because it may be store
/// to memory, etc.). If the type of the boolean is not i1 then the high
/// bits conform to getBooleanContents.
/// These nodes are generated from llvm.[su]add.with.overflow intrinsics.
SADDO,
UADDO,
/// Same for subtraction.
SSUBO,
USUBO,
/// Same for multiplication.
SMULO,
UMULO,
/// RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2
/// integers with the same bit width (W). If the true value of LHS + RHS
/// exceeds the largest value that can be represented by W bits, the
/// resulting value is this maximum value. Otherwise, if this value is less
/// than the smallest value that can be represented by W bits, the
/// resulting value is this minimum value.
SADDSAT,
UADDSAT,
/// RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2
/// integers with the same bit width (W). If the true value of LHS - RHS
/// exceeds the largest value that can be represented by W bits, the
/// resulting value is this maximum value. Otherwise, if this value is less
/// than the smallest value that can be represented by W bits, the
/// resulting value is this minimum value.
SSUBSAT,
USUBSAT,
/// RESULT = [US]SHLSAT(LHS, RHS) - Perform saturation left shift. The first
/// operand is the value to be shifted, and the second argument is the amount
/// to shift by. Both must be integers of the same bit width (W). If the true
/// value of LHS << RHS exceeds the largest value that can be represented by
/// W bits, the resulting value is this maximum value, Otherwise, if this
/// value is less than the smallest value that can be represented by W bits,
/// the resulting value is this minimum value.
SSHLSAT,
USHLSAT,
/// RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication
/// on 2 integers with the same width and scale. SCALE represents the scale
/// of both operands as fixed point numbers. This SCALE parameter must be a
/// constant integer. A scale of zero is effectively performing
/// multiplication on 2 integers.
SMULFIX,
UMULFIX,
/// Same as the corresponding unsaturated fixed point instructions, but the
/// result is clamped between the min and max values representable by the
/// bits of the first 2 operands.
SMULFIXSAT,
UMULFIXSAT,
/// RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on
/// 2 integers with the same width and scale. SCALE represents the scale
/// of both operands as fixed point numbers. This SCALE parameter must be a
/// constant integer.
SDIVFIX,
UDIVFIX,
/// Same as the corresponding unsaturated fixed point instructions, but the
/// result is clamped between the min and max values representable by the
/// bits of the first 2 operands.
SDIVFIXSAT,
UDIVFIXSAT,
/// Simple binary floating point operators.
FADD,
FSUB,
FMUL,
FDIV,
FREM,
/// Constrained versions of the binary floating point operators.
/// These will be lowered to the simple operators before final selection.
/// They are used to limit optimizations while the DAG is being
/// optimized.
STRICT_FADD,
STRICT_FSUB,
STRICT_FMUL,
STRICT_FDIV,
STRICT_FREM,
STRICT_FMA,
/// Constrained versions of libm-equivalent floating point intrinsics.
/// These will be lowered to the equivalent non-constrained pseudo-op
/// (or expanded to the equivalent library call) before final selection.
/// They are used to limit optimizations while the DAG is being optimized.
STRICT_FSQRT,
STRICT_FPOW,
STRICT_FPOWI,
STRICT_FLDEXP,
STRICT_FSIN,
STRICT_FCOS,
STRICT_FEXP,
STRICT_FEXP2,
STRICT_FLOG,
STRICT_FLOG10,
STRICT_FLOG2,
STRICT_FRINT,
STRICT_FNEARBYINT,
STRICT_FMAXNUM,
STRICT_FMINNUM,
STRICT_FCEIL,
STRICT_FFLOOR,
STRICT_FROUND,
STRICT_FROUNDEVEN,
STRICT_FTRUNC,
STRICT_LROUND,
STRICT_LLROUND,
STRICT_LRINT,
STRICT_LLRINT,
STRICT_FMAXIMUM,
STRICT_FMINIMUM,
/// STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or
/// unsigned integer. These have the same semantics as fptosi and fptoui
/// in IR.
/// They are used to limit optimizations while the DAG is being optimized.
STRICT_FP_TO_SINT,
STRICT_FP_TO_UINT,
/// STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to
/// a floating point value. These have the same semantics as sitofp and
/// uitofp in IR.
/// They are used to limit optimizations while the DAG is being optimized.
STRICT_SINT_TO_FP,
STRICT_UINT_TO_FP,
/// X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating
/// point type down to the precision of the destination VT. TRUNC is a
/// flag, which is always an integer that is zero or one. If TRUNC is 0,
/// this is a normal rounding, if it is 1, this FP_ROUND is known to not
/// change the value of Y.
///
/// The TRUNC = 1 case is used in cases where we know that the value will
/// not be modified by the node, because Y is not using any of the extra
/// precision of source type. This allows certain transformations like
/// STRICT_FP_EXTEND(STRICT_FP_ROUND(X,1)) -> X which are not safe for
/// STRICT_FP_EXTEND(STRICT_FP_ROUND(X,0)) because the extra bits aren't
/// removed.
/// It is used to limit optimizations while the DAG is being optimized.
STRICT_FP_ROUND,
/// X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP
/// type.
/// It is used to limit optimizations while the DAG is being optimized.
STRICT_FP_EXTEND,
/// STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used
/// for floating-point operands only. STRICT_FSETCC performs a quiet
/// comparison operation, while STRICT_FSETCCS performs a signaling
/// comparison operation.
STRICT_FSETCC,
STRICT_FSETCCS,
// FPTRUNC_ROUND - This corresponds to the fptrunc_round intrinsic.
FPTRUNC_ROUND,
/// FMA - Perform a * b + c with no intermediate rounding step.
FMA,
/// FMAD - Perform a * b + c, while getting the same result as the
/// separately rounded operations.
FMAD,
/// FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This
/// DAG node does not require that X and Y have the same type, just that
/// they are both floating point. X and the result must have the same type.
/// FCOPYSIGN(f32, f64) is allowed.
FCOPYSIGN,
/// INT = FGETSIGN(FP) - Return the sign bit of the specified floating point
/// value as an integer 0/1 value.
FGETSIGN,
/// Returns platform specific canonical encoding of a floating point number.
FCANONICALIZE,
/// Performs a check of floating point class property, defined by IEEE-754.
/// The first operand is the floating point value to check. The second operand
/// specifies the checked property and is a TargetConstant which specifies
/// test in the same way as intrinsic 'is_fpclass'.
/// Returns boolean value.
IS_FPCLASS,
/// BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector
/// with the specified, possibly variable, elements. The types of the
/// operands must match the vector element type, except that integer types
/// are allowed to be larger than the element type, in which case the
/// operands are implicitly truncated. The types of the operands must all
/// be the same.
BUILD_VECTOR,
/// INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element
/// at IDX replaced with VAL. If the type of VAL is larger than the vector
/// element type then VAL is truncated before replacement.
///
/// If VECTOR is a scalable vector, then IDX may be larger than the minimum
/// vector width. IDX is not first scaled by the runtime scaling factor of
/// VECTOR.
INSERT_VECTOR_ELT,
/// EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR
/// identified by the (potentially variable) element number IDX. If the return
/// type is an integer type larger than the element type of the vector, the
/// result is extended to the width of the return type. In that case, the high
/// bits are undefined.
///
/// If VECTOR is a scalable vector, then IDX may be larger than the minimum
/// vector width. IDX is not first scaled by the runtime scaling factor of
/// VECTOR.
EXTRACT_VECTOR_ELT,
/// CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of
/// vector type with the same length and element type, this produces a
/// concatenated vector result value, with length equal to the sum of the
/// lengths of the input vectors. If VECTOR0 is a fixed-width vector, then
/// VECTOR1..VECTORN must all be fixed-width vectors. Similarly, if VECTOR0
/// is a scalable vector, then VECTOR1..VECTORN must all be scalable vectors.
CONCAT_VECTORS,
/// INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2
/// inserted into VECTOR1. IDX represents the starting element number at which
/// VECTOR2 will be inserted. IDX must be a constant multiple of T's known
/// minimum vector length. Let the type of VECTOR2 be T, then if T is a
/// scalable vector, IDX is first scaled by the runtime scaling factor of T.
/// The elements of VECTOR1 starting at IDX are overwritten with VECTOR2.
/// Elements IDX through (IDX + num_elements(T) - 1) must be valid VECTOR1
/// indices. If this condition cannot be determined statically but is false at
/// runtime, then the result vector is undefined. The IDX parameter must be a
/// vector index constant type, which for most targets will be an integer
/// pointer type.
///
/// This operation supports inserting a fixed-width vector into a scalable
/// vector, but not the other way around.
INSERT_SUBVECTOR,
/// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR.
/// Let the result type be T, then IDX represents the starting element number
/// from which a subvector of type T is extracted. IDX must be a constant
/// multiple of T's known minimum vector length. If T is a scalable vector,
/// IDX is first scaled by the runtime scaling factor of T. Elements IDX
/// through (IDX + num_elements(T) - 1) must be valid VECTOR indices. If this
/// condition cannot be determined statically but is false at runtime, then
/// the result vector is undefined. The IDX parameter must be a vector index
/// constant type, which for most targets will be an integer pointer type.
///
/// This operation supports extracting a fixed-width vector from a scalable
/// vector, but not the other way around.
EXTRACT_SUBVECTOR,
/// VECTOR_DEINTERLEAVE(VEC1, VEC2) - Returns two vectors with all input and
/// output vectors having the same type. The first output contains the even
/// indices from CONCAT_VECTORS(VEC1, VEC2), with the second output
/// containing the odd indices. The relative order of elements within an
/// output match that of the concatenated input.
VECTOR_DEINTERLEAVE,
/// VECTOR_INTERLEAVE(VEC1, VEC2) - Returns two vectors with all input and
/// output vectors having the same type. The first output contains the
/// result of interleaving the low half of CONCAT_VECTORS(VEC1, VEC2), with
/// the second output containing the result of interleaving the high half.
VECTOR_INTERLEAVE,
/// VECTOR_REVERSE(VECTOR) - Returns a vector, of the same type as VECTOR,
/// whose elements are shuffled using the following algorithm:
/// RESULT[i] = VECTOR[VECTOR.ElementCount - 1 - i]
VECTOR_REVERSE,
/// VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as
/// VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int
/// values that indicate which value (or undef) each result element will
/// get. These constant ints are accessible through the
/// ShuffleVectorSDNode class. This is quite similar to the Altivec
/// 'vperm' instruction, except that the indices must be constants and are
/// in terms of the element size of VEC1/VEC2, not in terms of bytes.
VECTOR_SHUFFLE,
/// VECTOR_SPLICE(VEC1, VEC2, IMM) - Returns a subvector of the same type as
/// VEC1/VEC2 from CONCAT_VECTORS(VEC1, VEC2), based on the IMM in two ways.
/// Let the result type be T, if IMM is positive it represents the starting
/// element number (an index) from which a subvector of type T is extracted
/// from CONCAT_VECTORS(VEC1, VEC2). If IMM is negative it represents a count
/// specifying the number of trailing elements to extract from VEC1, where the
/// elements of T are selected using the following algorithm:
/// RESULT[i] = CONCAT_VECTORS(VEC1,VEC2)[VEC1.ElementCount - ABS(IMM) + i]
/// If IMM is not in the range [-VL, VL-1] the result vector is undefined. IMM
/// is a constant integer.
VECTOR_SPLICE,
/// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a
/// scalar value into element 0 of the resultant vector type. The top
/// elements 1 to N-1 of the N-element vector are undefined. The type
/// of the operand must match the vector element type, except when they
/// are integer types. In this case the operand is allowed to be wider
/// than the vector element type, and is implicitly truncated to it.
SCALAR_TO_VECTOR,
/// SPLAT_VECTOR(VAL) - Returns a vector with the scalar value VAL
/// duplicated in all lanes. The type of the operand must match the vector
/// element type, except when they are integer types. In this case the
/// operand is allowed to be wider than the vector element type, and is
/// implicitly truncated to it.
SPLAT_VECTOR,
/// SPLAT_VECTOR_PARTS(SCALAR1, SCALAR2, ...) - Returns a vector with the
/// scalar values joined together and then duplicated in all lanes. This
/// represents a SPLAT_VECTOR that has had its scalar operand expanded. This
/// allows representing a 64-bit splat on a target with 32-bit integers. The
/// total width of the scalars must cover the element width. SCALAR1 contains
/// the least significant bits of the value regardless of endianness and all
/// scalars should have the same type.
SPLAT_VECTOR_PARTS,
/// STEP_VECTOR(IMM) - Returns a scalable vector whose lanes are comprised
/// of a linear sequence of unsigned values starting from 0 with a step of
/// IMM, where IMM must be a TargetConstant with type equal to the vector
/// element type. The arithmetic is performed modulo the bitwidth of the
/// element.
///
/// The operation does not support returning fixed-width vectors or
/// non-constant operands.
STEP_VECTOR,
/// MULHU/MULHS - Multiply high - Multiply two integers of type iN,
/// producing an unsigned/signed value of type i[2*N], then return the top
/// part.
MULHU,
MULHS,
/// AVGFLOORS/AVGFLOORU - Averaging add - Add two integers using an integer of
/// type i[N+1], halving the result by shifting it one bit right.
/// shr(add(ext(X), ext(Y)), 1)
AVGFLOORS,
AVGFLOORU,
/// AVGCEILS/AVGCEILU - Rounding averaging add - Add two integers using an
/// integer of type i[N+2], add 1 and halve the result by shifting it one bit
/// right. shr(add(ext(X), ext(Y), 1), 1)
AVGCEILS,
AVGCEILU,
// ABDS/ABDU - Absolute difference - Return the absolute difference between
// two numbers interpreted as signed/unsigned.
// i.e trunc(abs(sext(Op0) - sext(Op1))) becomes abds(Op0, Op1)
// or trunc(abs(zext(Op0) - zext(Op1))) becomes abdu(Op0, Op1)
ABDS,
ABDU,
/// [US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned
/// integers.
SMIN,
SMAX,
UMIN,
UMAX,
/// Bitwise operators - logical and, logical or, logical xor.
AND,
OR,
XOR,
/// ABS - Determine the unsigned absolute value of a signed integer value of
/// the same bitwidth.
/// Note: A value of INT_MIN will return INT_MIN, no saturation or overflow
/// is performed.
ABS,
/// Shift and rotation operations. After legalization, the type of the
/// shift amount is known to be TLI.getShiftAmountTy(). Before legalization
/// the shift amount can be any type, but care must be taken to ensure it is
/// large enough. TLI.getShiftAmountTy() is i8 on some targets, but before
/// legalization, types like i1024 can occur and i8 doesn't have enough bits
/// to represent the shift amount.
/// When the 1st operand is a vector, the shift amount must be in the same
/// type. (TLI.getShiftAmountTy() will return the same type when the input
/// type is a vector.)
/// For rotates and funnel shifts, the shift amount is treated as an unsigned
/// amount modulo the element size of the first operand.
///
/// Funnel 'double' shifts take 3 operands, 2 inputs and the shift amount.
/// fshl(X,Y,Z): (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
/// fshr(X,Y,Z): (X << (BW - (Z % BW))) | (Y >> (Z % BW))
SHL,
SRA,
SRL,
ROTL,
ROTR,
FSHL,
FSHR,
/// Byte Swap and Counting operators.
BSWAP,
CTTZ,
CTLZ,
CTPOP,
BITREVERSE,
PARITY,
/// Bit counting operators with an undefined result for zero inputs.
CTTZ_ZERO_UNDEF,
CTLZ_ZERO_UNDEF,
/// Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not
/// i1 then the high bits must conform to getBooleanContents.
SELECT,
/// Select with a vector condition (op #0) and two vector operands (ops #1
/// and #2), returning a vector result. All vectors have the same length.
/// Much like the scalar select and setcc, each bit in the condition selects
/// whether the corresponding result element is taken from op #1 or op #2.
/// At first, the VSELECT condition is of vXi1 type. Later, targets may
/// change the condition type in order to match the VSELECT node using a
/// pattern. The condition follows the BooleanContent format of the target.
VSELECT,
/// Select with condition operator - This selects between a true value and
/// a false value (ops #2 and #3) based on the boolean result of comparing
/// the lhs and rhs (ops #0 and #1) of a conditional expression with the
/// condition code in op #4, a CondCodeSDNode.
SELECT_CC,
/// SetCC operator - This evaluates to a true value iff the condition is
/// true. If the result value type is not i1 then the high bits conform
/// to getBooleanContents. The operands to this are the left and right
/// operands to compare (ops #0, and #1) and the condition code to compare
/// them with (op #2) as a CondCodeSDNode. If the operands are vector types
/// then the result type must also be a vector type.
SETCC,
/// Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but
/// op #2 is a boolean indicating if there is an incoming carry. This
/// operator checks the result of "LHS - RHS - Carry", and can be used to
/// compare two wide integers:
/// (setcccarry lhshi rhshi (usubo_carry lhslo rhslo) cc).
/// Only valid for integers.
SETCCCARRY,
/// SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded
/// integer shift operations. The operation ordering is:
/// [Lo,Hi] = op [LoLHS,HiLHS], Amt
SHL_PARTS,
SRA_PARTS,
SRL_PARTS,
/// Conversion operators. These are all single input single output
/// operations. For all of these, the result type must be strictly
/// wider or narrower (depending on the operation) than the source
/// type.
/// SIGN_EXTEND - Used for integer types, replicating the sign bit
/// into new bits.
SIGN_EXTEND,
/// ZERO_EXTEND - Used for integer types, zeroing the new bits.
ZERO_EXTEND,
/// ANY_EXTEND - Used for integer types. The high bits are undefined.
ANY_EXTEND,
/// TRUNCATE - Completely drop the high bits.
TRUNCATE,
/// [SU]INT_TO_FP - These operators convert integers (whose interpreted sign
/// depends on the first letter) to floating point.
SINT_TO_FP,
UINT_TO_FP,
/// SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to
/// sign extend a small value in a large integer register (e.g. sign
/// extending the low 8 bits of a 32-bit register to fill the top 24 bits
/// with the 7th bit). The size of the smaller type is indicated by the 1th
/// operand, a ValueType node.
SIGN_EXTEND_INREG,
/// ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an
/// in-register any-extension of the low lanes of an integer vector. The
/// result type must have fewer elements than the operand type, and those
/// elements must be larger integer types such that the total size of the
/// operand type is less than or equal to the size of the result type. Each
/// of the low operand elements is any-extended into the corresponding,
/// wider result elements with the high bits becoming undef.
/// NOTE: The type legalizer prefers to make the operand and result size
/// the same to allow expansion to shuffle vector during op legalization.
ANY_EXTEND_VECTOR_INREG,
/// SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an
/// in-register sign-extension of the low lanes of an integer vector. The
/// result type must have fewer elements than the operand type, and those
/// elements must be larger integer types such that the total size of the
/// operand type is less than or equal to the size of the result type. Each
/// of the low operand elements is sign-extended into the corresponding,
/// wider result elements.
/// NOTE: The type legalizer prefers to make the operand and result size
/// the same to allow expansion to shuffle vector during op legalization.
SIGN_EXTEND_VECTOR_INREG,
/// ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an
/// in-register zero-extension of the low lanes of an integer vector. The
/// result type must have fewer elements than the operand type, and those
/// elements must be larger integer types such that the total size of the
/// operand type is less than or equal to the size of the result type. Each
/// of the low operand elements is zero-extended into the corresponding,
/// wider result elements.
/// NOTE: The type legalizer prefers to make the operand and result size
/// the same to allow expansion to shuffle vector during op legalization.
ZERO_EXTEND_VECTOR_INREG,
/// FP_TO_[US]INT - Convert a floating point value to a signed or unsigned
/// integer. These have the same semantics as fptosi and fptoui in IR. If
/// the FP value cannot fit in the integer type, the results are undefined.
FP_TO_SINT,
FP_TO_UINT,
/// FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a
/// signed or unsigned scalar integer type given in operand 1 with the
/// following semantics:
///
/// * If the value is NaN, zero is returned.
/// * If the value is larger/smaller than the largest/smallest integer,
/// the largest/smallest integer is returned (saturation).
/// * Otherwise the result of rounding the value towards zero is returned.
///
/// The scalar width of the type given in operand 1 must be equal to, or
/// smaller than, the scalar result type width. It may end up being smaller
/// than the result width as a result of integer type legalization.
///
/// After converting to the scalar integer type in operand 1, the value is
/// extended to the result VT. FP_TO_SINT_SAT sign extends and FP_TO_UINT_SAT
/// zero extends.
FP_TO_SINT_SAT,
FP_TO_UINT_SAT,
/// X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type
/// down to the precision of the destination VT. TRUNC is a flag, which is
/// always an integer that is zero or one. If TRUNC is 0, this is a
/// normal rounding, if it is 1, this FP_ROUND is known to not change the
/// value of Y.
///
/// The TRUNC = 1 case is used in cases where we know that the value will
/// not be modified by the node, because Y is not using any of the extra
/// precision of source type. This allows certain transformations like
/// FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for
/// FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed.
FP_ROUND,
/// Returns current rounding mode:
/// -1 Undefined
/// 0 Round to 0
/// 1 Round to nearest, ties to even
/// 2 Round to +inf
/// 3 Round to -inf
/// 4 Round to nearest, ties to zero
/// Result is rounding mode and chain. Input is a chain.
GET_ROUNDING,
/// Set rounding mode.
/// The first operand is a chain pointer. The second specifies the required
/// rounding mode, encoded in the same way as used in '``GET_ROUNDING``'.
SET_ROUNDING,
/// X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
FP_EXTEND,
/// BITCAST - This operator converts between integer, vector and FP
/// values, as if the value was stored to memory with one type and loaded
/// from the same address with the other type (or equivalently for vector
/// format conversions, etc). The source and result are required to have
/// the same bit size (e.g. f32 <-> i32). This can also be used for
/// int-to-int or fp-to-fp conversions, but that is a noop, deleted by
/// getNode().
///
/// This operator is subtly different from the bitcast instruction from
/// LLVM-IR since this node may change the bits in the register. For
/// example, this occurs on big-endian NEON and big-endian MSA where the
/// layout of the bits in the register depends on the vector type and this
/// operator acts as a shuffle operation for some vector type combinations.
BITCAST,
/// ADDRSPACECAST - This operator converts between pointers of different
/// address spaces.
ADDRSPACECAST,
/// FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions
/// and truncation for half-precision (16 bit) floating numbers. These nodes
/// form a semi-softened interface for dealing with f16 (as an i16), which
/// is often a storage-only type but has native conversions.
FP16_TO_FP,
FP_TO_FP16,
STRICT_FP16_TO_FP,
STRICT_FP_TO_FP16,
/// BF16_TO_FP, FP_TO_BF16 - These operators are used to perform promotions
/// and truncation for bfloat16. These nodes form a semi-softened interface
/// for dealing with bf16 (as an i16), which is often a storage-only type but
/// has native conversions.
BF16_TO_FP,
FP_TO_BF16,
/// Perform various unary floating-point operations inspired by libm. For
/// FPOWI, the result is undefined if if the integer operand doesn't fit into
/// sizeof(int).
FNEG,
FABS,
FSQRT,
FCBRT,
FSIN,
FCOS,
FPOW,
FPOWI,
/// FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
FLDEXP,
/// FFREXP - frexp, extract fractional and exponent component of a
/// floating-point value. Returns the two components as separate return
/// values.
FFREXP,
FLOG,
FLOG2,
FLOG10,
FEXP,
FEXP2,
FCEIL,
FTRUNC,
FRINT,
FNEARBYINT,
FROUND,
FROUNDEVEN,
FFLOOR,
LROUND,
LLROUND,
LRINT,
LLRINT,
/// FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two
/// values.
//
/// In the case where a single input is a NaN (either signaling or quiet),
/// the non-NaN input is returned.
///
/// The return value of (FMINNUM 0.0, -0.0) could be either 0.0 or -0.0.
FMINNUM,
FMAXNUM,
/// FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimum or maximum on
/// two values, following the IEEE-754 2008 definition. This differs from
/// FMINNUM/FMAXNUM in the handling of signaling NaNs. If one input is a
/// signaling NaN, returns a quiet NaN.
FMINNUM_IEEE,
FMAXNUM_IEEE,
/// FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0
/// as less than 0.0. While FMINNUM_IEEE/FMAXNUM_IEEE follow IEEE 754-2008
/// semantics, FMINIMUM/FMAXIMUM follow IEEE 754-2018 draft semantics.
FMINIMUM,
FMAXIMUM,
/// FSINCOS - Compute both fsin and fcos as a single operation.
FSINCOS,
/// Gets the current floating-point environment. The first operand is a token
/// chain. The results are FP environment, represented by an integer value,
/// and a token chain.
GET_FPENV,
/// Sets the current floating-point environment. The first operand is a token
/// chain, the second is FP environment, represented by an integer value. The
/// result is a token chain.
SET_FPENV,
/// Set floating-point environment to default state. The first operand and the
/// result are token chains.
RESET_FPENV,
/// Gets the current floating-point environment. The first operand is a token
/// chain, the second is a pointer to memory, where FP environment is stored
/// to. The result is a token chain.
GET_FPENV_MEM,
/// Sets the current floating point environment. The first operand is a token
/// chain, the second is a pointer to memory, where FP environment is loaded
/// from. The result is a token chain.
SET_FPENV_MEM,
/// LOAD and STORE have token chains as their first operand, then the same
/// operands as an LLVM load/store instruction, then an offset node that
/// is added / subtracted from the base pointer to form the address (for
/// indexed memory ops).
LOAD,
STORE,
/// DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned
/// to a specified boundary. This node always has two return values: a new
/// stack pointer value and a chain. The first operand is the token chain,
/// the second is the number of bytes to allocate, and the third is the
/// alignment boundary. The size is guaranteed to be a multiple of the
/// stack alignment, and the alignment is guaranteed to be bigger than the
/// stack alignment (if required) or 0 to get standard stack alignment.
DYNAMIC_STACKALLOC,
/// Control flow instructions. These all have token chains.
/// BR - Unconditional branch. The first operand is the chain
/// operand, the second is the MBB to branch to.
BR,
/// BRIND - Indirect branch. The first operand is the chain, the second
/// is the value to branch to, which must be of the same type as the
/// target's pointer type.
BRIND,
/// BR_JT - Jumptable branch. The first operand is the chain, the second
/// is the jumptable index, the last one is the jumptable entry index.
BR_JT,
/// BRCOND - Conditional branch. The first operand is the chain, the
/// second is the condition, the third is the block to branch to if the
/// condition is true. If the type of the condition is not i1, then the
/// high bits must conform to getBooleanContents. If the condition is undef,
/// it nondeterministically jumps to the block.
/// TODO: Its semantics w.r.t undef requires further discussion; we need to
/// make it sure that it is consistent with optimizations in MIR & the
/// meaning of IMPLICIT_DEF. See https://reviews.llvm.org/D92015
BRCOND,
/// BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in
/// that the condition is represented as condition code, and two nodes to
/// compare, rather than as a combined SetCC node. The operands in order
/// are chain, cc, lhs, rhs, block to branch to if condition is true. If
/// condition is undef, it nondeterministically jumps to the block.
BR_CC,
/// INLINEASM - Represents an inline asm block. This node always has two
/// return values: a chain and a flag result. The inputs are as follows:
/// Operand #0 : Input chain.
/// Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string.
/// Operand #2 : a MDNodeSDNode with the !srcloc metadata.
/// Operand #3 : HasSideEffect, IsAlignStack bits.
/// After this, it is followed by a list of operands with this format:
/// ConstantSDNode: Flags that encode whether it is a mem or not, the
/// of operands that follow, etc. See InlineAsm.h.
/// ... however many operands ...
/// Operand #last: Optional, an incoming flag.
///
/// The variable width operands are required to represent target addressing
/// modes as a single "operand", even though they may have multiple
/// SDOperands.
INLINEASM,
/// INLINEASM_BR - Branching version of inline asm. Used by asm-goto.
INLINEASM_BR,
/// EH_LABEL - Represents a label in mid basic block used to track
/// locations needed for debug and exception handling tables. These nodes
/// take a chain as input and return a chain.
EH_LABEL,
/// ANNOTATION_LABEL - Represents a mid basic block label used by
/// annotations. This should remain within the basic block and be ordered
/// with respect to other call instructions, but loads and stores may float
/// past it.
ANNOTATION_LABEL,
/// CATCHRET - Represents a return from a catch block funclet. Used for
/// MSVC compatible exception handling. Takes a chain operand and a
/// destination basic block operand.
CATCHRET,
/// CLEANUPRET - Represents a return from a cleanup block funclet. Used for
/// MSVC compatible exception handling. Takes only a chain operand.
CLEANUPRET,
/// STACKSAVE - STACKSAVE has one operand, an input chain. It produces a
/// value, the same type as the pointer type for the system, and an output
/// chain.
STACKSAVE,
/// STACKRESTORE has two operands, an input chain and a pointer to restore
/// to it returns an output chain.
STACKRESTORE,
/// CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end
/// of a call sequence, and carry arbitrary information that target might
/// want to know. The first operand is a chain, the rest are specified by
/// the target and not touched by the DAG optimizers.
/// Targets that may use stack to pass call arguments define additional
/// operands:
/// - size of the call frame part that must be set up within the
/// CALLSEQ_START..CALLSEQ_END pair,
/// - part of the call frame prepared prior to CALLSEQ_START.
/// Both these parameters must be constants, their sum is the total call
/// frame size.
/// CALLSEQ_START..CALLSEQ_END pairs may not be nested.
CALLSEQ_START, // Beginning of a call sequence
CALLSEQ_END, // End of a call sequence
/// VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE,
/// and the alignment. It returns a pair of values: the vaarg value and a
/// new chain.
VAARG,
/// VACOPY - VACOPY has 5 operands: an input chain, a destination pointer,
/// a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the
/// source.
VACOPY,
/// VAEND, VASTART - VAEND and VASTART have three operands: an input chain,
/// pointer, and a SRCVALUE.
VAEND,
VASTART,
// PREALLOCATED_SETUP - This has 2 operands: an input chain and a SRCVALUE
// with the preallocated call Value.
PREALLOCATED_SETUP,
// PREALLOCATED_ARG - This has 3 operands: an input chain, a SRCVALUE
// with the preallocated call Value, and a constant int.
PREALLOCATED_ARG,
/// SRCVALUE - This is a node type that holds a Value* that is used to
/// make reference to a value in the LLVM IR.
SRCVALUE,
/// MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to
/// reference metadata in the IR.
MDNODE_SDNODE,
/// PCMARKER - This corresponds to the pcmarker intrinsic.
PCMARKER,
/// READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
/// It produces a chain and one i64 value. The only operand is a chain.
/// If i64 is not legal, the result will be expanded into smaller values.
/// Still, it returns an i64, so targets should set legality for i64.
/// The result is the content of the architecture-specific cycle
/// counter-like register (or other high accuracy low latency clock source).
READCYCLECOUNTER,
/// HANDLENODE node - Used as a handle for various purposes.
HANDLENODE,
/// INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic. It
/// takes as input a token chain, the pointer to the trampoline, the pointer
/// to the nested function, the pointer to pass for the 'nest' parameter, a
/// SRCVALUE for the trampoline and another for the nested function
/// (allowing targets to access the original Function*).
/// It produces a token chain as output.
INIT_TRAMPOLINE,
/// ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
/// It takes a pointer to the trampoline and produces a (possibly) new
/// pointer to the same trampoline with platform-specific adjustments
/// applied. The pointer it returns points to an executable block of code.
ADJUST_TRAMPOLINE,
/// TRAP - Trapping instruction
TRAP,
/// DEBUGTRAP - Trap intended to get the attention of a debugger.
DEBUGTRAP,
/// UBSANTRAP - Trap with an immediate describing the kind of sanitizer
/// failure.
UBSANTRAP,
/// PREFETCH - This corresponds to a prefetch intrinsic. The first operand
/// is the chain. The other operands are the address to prefetch,
/// read / write specifier, locality specifier and instruction / data cache
/// specifier.
PREFETCH,
/// ARITH_FENCE - This corresponds to a arithmetic fence intrinsic. Both its
/// operand and output are the same floating type.
ARITH_FENCE,
/// MEMBARRIER - Compiler barrier only; generate a no-op.
MEMBARRIER,
/// OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope)
/// This corresponds to the fence instruction. It takes an input chain, and
/// two integer constants: an AtomicOrdering and a SynchronizationScope.
ATOMIC_FENCE,
/// Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr)
/// This corresponds to "load atomic" instruction.
ATOMIC_LOAD,
/// OUTCHAIN = ATOMIC_STORE(INCHAIN, ptr, val)
/// This corresponds to "store atomic" instruction.
ATOMIC_STORE,
/// Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap)
/// For double-word atomic operations:
/// ValLo, ValHi, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmpLo, cmpHi,
/// swapLo, swapHi)
/// This corresponds to the cmpxchg instruction.
ATOMIC_CMP_SWAP,
/// Val, Success, OUTCHAIN
/// = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap)
/// N.b. this is still a strong cmpxchg operation, so
/// Success == "Val == cmp".
ATOMIC_CMP_SWAP_WITH_SUCCESS,
/// Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt)
/// Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt)
/// For double-word atomic operations:
/// ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi)
/// ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi)
/// These correspond to the atomicrmw instruction.
ATOMIC_SWAP,
ATOMIC_LOAD_ADD,
ATOMIC_LOAD_SUB,
ATOMIC_LOAD_AND,
ATOMIC_LOAD_CLR,
ATOMIC_LOAD_OR,
ATOMIC_LOAD_XOR,
ATOMIC_LOAD_NAND,
ATOMIC_LOAD_MIN,
ATOMIC_LOAD_MAX,
ATOMIC_LOAD_UMIN,
ATOMIC_LOAD_UMAX,
ATOMIC_LOAD_FADD,
ATOMIC_LOAD_FSUB,
ATOMIC_LOAD_FMAX,
ATOMIC_LOAD_FMIN,
ATOMIC_LOAD_UINC_WRAP,
ATOMIC_LOAD_UDEC_WRAP,
// Masked load and store - consecutive vector load and store operations
// with additional mask operand that prevents memory accesses to the
// masked-off lanes.
//
// Val, OutChain = MLOAD(BasePtr, Mask, PassThru)
// OutChain = MSTORE(Value, BasePtr, Mask)
MLOAD,
MSTORE,
// Masked gather and scatter - load and store operations for a vector of
// random addresses with additional mask operand that prevents memory
// accesses to the masked-off lanes.
//
// Val, OutChain = GATHER(InChain, PassThru, Mask, BasePtr, Index, Scale)
// OutChain = SCATTER(InChain, Value, Mask, BasePtr, Index, Scale)
//
// The Index operand can have more vector elements than the other operands
// due to type legalization. The extra elements are ignored.
MGATHER,
MSCATTER,
/// This corresponds to the llvm.lifetime.* intrinsics. The first operand
/// is the chain and the second operand is the alloca pointer.
LIFETIME_START,
LIFETIME_END,
/// GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the
/// beginning and end of GC transition sequence, and carry arbitrary
/// information that target might need for lowering. The first operand is
/// a chain, the rest are specified by the target and not touched by the DAG
/// optimizers. GC_TRANSITION_START..GC_TRANSITION_END pairs may not be
/// nested.
GC_TRANSITION_START,
GC_TRANSITION_END,
/// GET_DYNAMIC_AREA_OFFSET - get offset from native SP to the address of
/// the most recent dynamic alloca. For most targets that would be 0, but
/// for some others (e.g. PowerPC, PowerPC64) that would be compile-time
/// known nonzero constant. The only operand here is the chain.
GET_DYNAMIC_AREA_OFFSET,
/// Pseudo probe for AutoFDO, as a place holder in a basic block to improve
/// the sample counts quality.
PSEUDO_PROBE,
/// VSCALE(IMM) - Returns the runtime scaling factor used to calculate the
/// number of elements within a scalable vector. IMM is a constant integer
/// multiplier that is applied to the runtime value.
VSCALE,
/// Generic reduction nodes. These nodes represent horizontal vector
/// reduction operations, producing a scalar result.
/// The SEQ variants perform reductions in sequential order. The first
/// operand is an initial scalar accumulator value, and the second operand
/// is the vector to reduce.
/// E.g. RES = VECREDUCE_SEQ_FADD f32 ACC, <4 x f32> SRC_VEC
/// ... is equivalent to
/// RES = (((ACC + SRC_VEC[0]) + SRC_VEC[1]) + SRC_VEC[2]) + SRC_VEC[3]
VECREDUCE_SEQ_FADD,
VECREDUCE_SEQ_FMUL,
/// These reductions have relaxed evaluation order semantics, and have a
/// single vector operand. The order of evaluation is unspecified. For
/// pow-of-2 vectors, one valid legalizer expansion is to use a tree
/// reduction, i.e.:
/// For RES = VECREDUCE_FADD <8 x f16> SRC_VEC
/// PART_RDX = FADD SRC_VEC[0:3], SRC_VEC[4:7]
/// PART_RDX2 = FADD PART_RDX[0:1], PART_RDX[2:3]
/// RES = FADD PART_RDX2[0], PART_RDX2[1]
/// For non-pow-2 vectors, this can be computed by extracting each element
/// and performing the operation as if it were scalarized.
VECREDUCE_FADD,
VECREDUCE_FMUL,
/// FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
VECREDUCE_FMAX,
VECREDUCE_FMIN,
/// FMINIMUM/FMAXIMUM nodes propatate NaNs and signed zeroes using the
/// llvm.minimum and llvm.maximum semantics.
VECREDUCE_FMAXIMUM,
VECREDUCE_FMINIMUM,
/// Integer reductions may have a result type larger than the vector element
/// type. However, the reduction is performed using the vector element type
/// and the value in the top bits is unspecified.
VECREDUCE_ADD,
VECREDUCE_MUL,
VECREDUCE_AND,
VECREDUCE_OR,
VECREDUCE_XOR,
VECREDUCE_SMAX,
VECREDUCE_SMIN,
VECREDUCE_UMAX,
VECREDUCE_UMIN,
// The `llvm.experimental.stackmap` intrinsic.
// Operands: input chain, glue, <id>, <numShadowBytes>, [live0[, live1...]]
// Outputs: output chain, glue
STACKMAP,
// The `llvm.experimental.patchpoint.*` intrinsic.
// Operands: input chain, [glue], reg-mask, <id>, <numShadowBytes>, callee,
// <numArgs>, cc, ...
// Outputs: [rv], output chain, glue
PATCHPOINT,
// Vector Predication
#define BEGIN_REGISTER_VP_SDNODE(VPSDID, ...) VPSDID,
#include "llvm/IR/VPIntrinsics.def"
/// BUILTIN_OP_END - This must be the last enum value in this list.
/// The target-specific pre-isel opcode values start here.
BUILTIN_OP_END
};
/// FIRST_TARGET_STRICTFP_OPCODE - Target-specific pre-isel operations
/// which cannot raise FP exceptions should be less than this value.
/// Those that do must not be less than this value.
static const int FIRST_TARGET_STRICTFP_OPCODE = BUILTIN_OP_END + 400;
/// FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations
/// which do not reference a specific memory location should be less than
/// this value. Those that do must not be less than this value, and can
/// be used with SelectionDAG::getMemIntrinsicNode.
static const int FIRST_TARGET_MEMORY_OPCODE = BUILTIN_OP_END + 500;
/// Whether this is bitwise logic opcode.
inline bool isBitwiseLogicOp(unsigned Opcode) {
return Opcode == ISD::AND || Opcode == ISD::OR || Opcode == ISD::XOR;
}
/// Get underlying scalar opcode for VECREDUCE opcode.
/// For example ISD::AND for ISD::VECREDUCE_AND.
NodeType getVecReduceBaseOpcode(unsigned VecReduceOpcode);
/// Whether this is a vector-predicated Opcode.
bool isVPOpcode(unsigned Opcode);
/// Whether this is a vector-predicated binary operation opcode.
bool isVPBinaryOp(unsigned Opcode);
/// Whether this is a vector-predicated reduction opcode.
bool isVPReduction(unsigned Opcode);
/// The operand position of the vector mask.
std::optional<unsigned> getVPMaskIdx(unsigned Opcode);
/// The operand position of the explicit vector length parameter.
std::optional<unsigned> getVPExplicitVectorLengthIdx(unsigned Opcode);
/// Translate this VP Opcode to its corresponding non-VP Opcode.
std::optional<unsigned> getBaseOpcodeForVP(unsigned Opcode, bool hasFPExcept);
/// Translate this non-VP Opcode to its corresponding VP Opcode.
unsigned getVPForBaseOpcode(unsigned Opcode);
//===--------------------------------------------------------------------===//
/// MemIndexedMode enum - This enum defines the load / store indexed
/// addressing modes.
///
/// UNINDEXED "Normal" load / store. The effective address is already
/// computed and is available in the base pointer. The offset
/// operand is always undefined. In addition to producing a
/// chain, an unindexed load produces one value (result of the
/// load); an unindexed store does not produce a value.
///
/// PRE_INC Similar to the unindexed mode where the effective address is
/// PRE_DEC the value of the base pointer add / subtract the offset.
/// It considers the computation as being folded into the load /
/// store operation (i.e. the load / store does the address
/// computation as well as performing the memory transaction).
/// The base operand is always undefined. In addition to
/// producing a chain, pre-indexed load produces two values
/// (result of the load and the result of the address
/// computation); a pre-indexed store produces one value (result
/// of the address computation).
///
/// POST_INC The effective address is the value of the base pointer. The
/// POST_DEC value of the offset operand is then added to / subtracted
/// from the base after memory transaction. In addition to
/// producing a chain, post-indexed load produces two values
/// (the result of the load and the result of the base +/- offset
/// computation); a post-indexed store produces one value (the
/// the result of the base +/- offset computation).
enum MemIndexedMode { UNINDEXED = 0, PRE_INC, PRE_DEC, POST_INC, POST_DEC };
static const int LAST_INDEXED_MODE = POST_DEC + 1;
//===--------------------------------------------------------------------===//
/// MemIndexType enum - This enum defines how to interpret MGATHER/SCATTER's
/// index parameter when calculating addresses.
///
/// SIGNED_SCALED Addr = Base + ((signed)Index * Scale)
/// UNSIGNED_SCALED Addr = Base + ((unsigned)Index * Scale)
///
/// NOTE: The value of Scale is typically only known to the node owning the
/// IndexType, with a value of 1 the equivalent of being unscaled.
enum MemIndexType { SIGNED_SCALED = 0, UNSIGNED_SCALED };
static const int LAST_MEM_INDEX_TYPE = UNSIGNED_SCALED + 1;
inline bool isIndexTypeSigned(MemIndexType IndexType) {
return IndexType == SIGNED_SCALED;
}
//===--------------------------------------------------------------------===//
/// LoadExtType enum - This enum defines the three variants of LOADEXT
/// (load with extension).
///
/// SEXTLOAD loads the integer operand and sign extends it to a larger
/// integer result type.
/// ZEXTLOAD loads the integer operand and zero extends it to a larger
/// integer result type.
/// EXTLOAD is used for two things: floating point extending loads and
/// integer extending loads [the top bits are undefined].
enum LoadExtType { NON_EXTLOAD = 0, EXTLOAD, SEXTLOAD, ZEXTLOAD };
static const int LAST_LOADEXT_TYPE = ZEXTLOAD + 1;
NodeType getExtForLoadExtType(bool IsFP, LoadExtType);
//===--------------------------------------------------------------------===//
/// ISD::CondCode enum - These are ordered carefully to make the bitfields
/// below work out, when considering SETFALSE (something that never exists
/// dynamically) as 0. "U" -> Unsigned (for integer operands) or Unordered
/// (for floating point), "L" -> Less than, "G" -> Greater than, "E" -> Equal
/// to. If the "N" column is 1, the result of the comparison is undefined if
/// the input is a NAN.
///
/// All of these (except for the 'always folded ops') should be handled for
/// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT,
/// SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used.
///
/// Note that these are laid out in a specific order to allow bit-twiddling
/// to transform conditions.
enum CondCode {
// Opcode N U L G E Intuitive operation
SETFALSE, // 0 0 0 0 Always false (always folded)
SETOEQ, // 0 0 0 1 True if ordered and equal
SETOGT, // 0 0 1 0 True if ordered and greater than
SETOGE, // 0 0 1 1 True if ordered and greater than or equal
SETOLT, // 0 1 0 0 True if ordered and less than
SETOLE, // 0 1 0 1 True if ordered and less than or equal
SETONE, // 0 1 1 0 True if ordered and operands are unequal
SETO, // 0 1 1 1 True if ordered (no nans)
SETUO, // 1 0 0 0 True if unordered: isnan(X) | isnan(Y)
SETUEQ, // 1 0 0 1 True if unordered or equal
SETUGT, // 1 0 1 0 True if unordered or greater than
SETUGE, // 1 0 1 1 True if unordered, greater than, or equal
SETULT, // 1 1 0 0 True if unordered or less than
SETULE, // 1 1 0 1 True if unordered, less than, or equal
SETUNE, // 1 1 1 0 True if unordered or not equal
SETTRUE, // 1 1 1 1 Always true (always folded)
// Don't care operations: undefined if the input is a nan.
SETFALSE2, // 1 X 0 0 0 Always false (always folded)
SETEQ, // 1 X 0 0 1 True if equal
SETGT, // 1 X 0 1 0 True if greater than
SETGE, // 1 X 0 1 1 True if greater than or equal
SETLT, // 1 X 1 0 0 True if less than
SETLE, // 1 X 1 0 1 True if less than or equal
SETNE, // 1 X 1 1 0 True if not equal
SETTRUE2, // 1 X 1 1 1 Always true (always folded)
SETCC_INVALID // Marker value.
};
/// Return true if this is a setcc instruction that performs a signed
/// comparison when used with integer operands.
inline bool isSignedIntSetCC(CondCode Code) {
return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE;
}
/// Return true if this is a setcc instruction that performs an unsigned
/// comparison when used with integer operands.
inline bool isUnsignedIntSetCC(CondCode Code) {
return Code == SETUGT || Code == SETUGE || Code == SETULT || Code == SETULE;
}
/// Return true if this is a setcc instruction that performs an equality
/// comparison when used with integer operands.
inline bool isIntEqualitySetCC(CondCode Code) {
return Code == SETEQ || Code == SETNE;
}
/// Return true if the specified condition returns true if the two operands to
/// the condition are equal. Note that if one of the two operands is a NaN,
/// this value is meaningless.
inline bool isTrueWhenEqual(CondCode Cond) { return ((int)Cond & 1) != 0; }
/// This function returns 0 if the condition is always false if an operand is
/// a NaN, 1 if the condition is always true if the operand is a NaN, and 2 if
/// the condition is undefined if the operand is a NaN.
inline unsigned getUnorderedFlavor(CondCode Cond) {
return ((int)Cond >> 3) & 3;
}
/// Return the operation corresponding to !(X op Y), where 'op' is a valid
/// SetCC operation.
CondCode getSetCCInverse(CondCode Operation, EVT Type);
inline bool isExtOpcode(unsigned Opcode) {
return Opcode == ISD::ANY_EXTEND || Opcode == ISD::ZERO_EXTEND ||
Opcode == ISD::SIGN_EXTEND;
}
inline bool isExtVecInRegOpcode(unsigned Opcode) {
return Opcode == ISD::ANY_EXTEND_VECTOR_INREG ||
Opcode == ISD::ZERO_EXTEND_VECTOR_INREG ||
Opcode == ISD::SIGN_EXTEND_VECTOR_INREG;
}
namespace GlobalISel {
/// Return the operation corresponding to !(X op Y), where 'op' is a valid
/// SetCC operation. The U bit of the condition code has different meanings
/// between floating point and integer comparisons and LLT's don't provide
/// this distinction. As such we need to be told whether the comparison is
/// floating point or integer-like. Pointers should use integer-like
/// comparisons.
CondCode getSetCCInverse(CondCode Operation, bool isIntegerLike);
} // end namespace GlobalISel
/// Return the operation corresponding to (Y op X) when given the operation
/// for (X op Y).
CondCode getSetCCSwappedOperands(CondCode Operation);
/// Return the result of a logical OR between different comparisons of
/// identical values: ((X op1 Y) | (X op2 Y)). This function returns
/// SETCC_INVALID if it is not possible to represent the resultant comparison.
CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, EVT Type);
/// Return the result of a logical AND between different comparisons of
/// identical values: ((X op1 Y) & (X op2 Y)). This function returns
/// SETCC_INVALID if it is not possible to represent the resultant comparison.
CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, EVT Type);
} // namespace ISD
} // namespace llvm
#endif
PK iwFZT�ӡ/ / CodeGen/LowLevelTypeUtils.hnu �[��� //== llvm/CodeGen/LowLevelTypeUtils.h -------------------------- -*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// Implement a low-level type suitable for MachineInstr level instruction
/// selection.
///
/// This provides the CodeGen aspects of LowLevelType, such as Type conversion.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LOWLEVELTYPEUTILS_H
#define LLVM_CODEGEN_LOWLEVELTYPEUTILS_H
#include "llvm/CodeGen/LowLevelType.h"
#include "llvm/CodeGen/ValueTypes.h"
namespace llvm {
class DataLayout;
class Type;
struct fltSemantics;
/// Construct a low-level type based on an LLVM type.
LLT getLLTForType(Type &Ty, const DataLayout &DL);
/// Get a rough equivalent of an MVT for a given LLT. MVT can't distinguish
/// pointers, so these will convert to a plain integer.
MVT getMVTForLLT(LLT Ty);
EVT getApproximateEVTForLLT(LLT Ty, const DataLayout &DL, LLVMContext &Ctx);
/// Get a rough equivalent of an LLT for a given MVT. LLT does not yet support
/// scalarable vector types, and will assert if used.
LLT getLLTForMVT(MVT Ty);
/// Get the appropriate floating point arithmetic semantic based on the bit size
/// of the given scalar LLT.
const llvm::fltSemantics &getFltSemanticForLLT(LLT Ty);
}
#endif // LLVM_CODEGEN_LOWLEVELTYPEUTILS_H
PK iwFZ:t�C�F �F CodeGen/MachineInstr.hnu �[��� //===- llvm/CodeGen/MachineInstr.h - MachineInstr class ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the declaration of the MachineInstr class, which is the
// basic representation for all target dependent machine instructions used by
// the back end.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEINSTR_H
#define LLVM_CODEGEN_MACHINEINSTR_H
#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/ADT/PointerSumType.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/ilist.h"
#include "llvm/ADT/ilist_node.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/TargetOpcodes.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/InlineAsm.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/Support/ArrayRecycler.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/TrailingObjects.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
#include <utility>
namespace llvm {
class DILabel;
class Instruction;
class MDNode;
class AAResults;
template <typename T> class ArrayRef;
class DIExpression;
class DILocalVariable;
class MachineBasicBlock;
class MachineFunction;
class MachineRegisterInfo;
class ModuleSlotTracker;
class raw_ostream;
template <typename T> class SmallVectorImpl;
class SmallBitVector;
class StringRef;
class TargetInstrInfo;
class TargetRegisterClass;
class TargetRegisterInfo;
//===----------------------------------------------------------------------===//
/// Representation of each machine instruction.
///
/// This class isn't a POD type, but it must have a trivial destructor. When a
/// MachineFunction is deleted, all the contained MachineInstrs are deallocated
/// without having their destructor called.
///
class MachineInstr
: public ilist_node_with_parent<MachineInstr, MachineBasicBlock,
ilist_sentinel_tracking<true>> {
public:
using mmo_iterator = ArrayRef<MachineMemOperand *>::iterator;
/// Flags to specify different kinds of comments to output in
/// assembly code. These flags carry semantic information not
/// otherwise easily derivable from the IR text.
///
enum CommentFlag {
ReloadReuse = 0x1, // higher bits are reserved for target dep comments.
NoSchedComment = 0x2,
TAsmComments = 0x4 // Target Asm comments should start from this value.
};
enum MIFlag {
NoFlags = 0,
FrameSetup = 1 << 0, // Instruction is used as a part of
// function frame setup code.
FrameDestroy = 1 << 1, // Instruction is used as a part of
// function frame destruction code.
BundledPred = 1 << 2, // Instruction has bundled predecessors.
BundledSucc = 1 << 3, // Instruction has bundled successors.
FmNoNans = 1 << 4, // Instruction does not support Fast
// math nan values.
FmNoInfs = 1 << 5, // Instruction does not support Fast
// math infinity values.
FmNsz = 1 << 6, // Instruction is not required to retain
// signed zero values.
FmArcp = 1 << 7, // Instruction supports Fast math
// reciprocal approximations.
FmContract = 1 << 8, // Instruction supports Fast math
// contraction operations like fma.
FmAfn = 1 << 9, // Instruction may map to Fast math
// intrinsic approximation.
FmReassoc = 1 << 10, // Instruction supports Fast math
// reassociation of operand order.
NoUWrap = 1 << 11, // Instruction supports binary operator
// no unsigned wrap.
NoSWrap = 1 << 12, // Instruction supports binary operator
// no signed wrap.
IsExact = 1 << 13, // Instruction supports division is
// known to be exact.
NoFPExcept = 1 << 14, // Instruction does not raise
// floatint-point exceptions.
NoMerge = 1 << 15, // Passes that drop source location info
// (e.g. branch folding) should skip
// this instruction.
Unpredictable = 1 << 16, // Instruction with unpredictable condition.
};
private:
const MCInstrDesc *MCID; // Instruction descriptor.
MachineBasicBlock *Parent = nullptr; // Pointer to the owning basic block.
// Operands are allocated by an ArrayRecycler.
MachineOperand *Operands = nullptr; // Pointer to the first operand.
#define LLVM_MI_NUMOPERANDS_BITS 24
#define LLVM_MI_FLAGS_BITS 24
#define LLVM_MI_ASMPRINTERFLAGS_BITS 8
/// Number of operands on instruction.
uint32_t NumOperands : LLVM_MI_NUMOPERANDS_BITS;
// OperandCapacity has uint8_t size, so it should be next to NumOperands
// to properly pack.
using OperandCapacity = ArrayRecycler<MachineOperand>::Capacity;
OperandCapacity CapOperands; // Capacity of the Operands array.
/// Various bits of additional information about the machine instruction.
uint32_t Flags : LLVM_MI_FLAGS_BITS;
/// Various bits of information used by the AsmPrinter to emit helpful
/// comments. This is *not* semantic information. Do not use this for
/// anything other than to convey comment information to AsmPrinter.
uint8_t AsmPrinterFlags : LLVM_MI_ASMPRINTERFLAGS_BITS;
/// Internal implementation detail class that provides out-of-line storage for
/// extra info used by the machine instruction when this info cannot be stored
/// in-line within the instruction itself.
///
/// This has to be defined eagerly due to the implementation constraints of
/// `PointerSumType` where it is used.
class ExtraInfo final : TrailingObjects<ExtraInfo, MachineMemOperand *,
MCSymbol *, MDNode *, uint32_t> {
public:
static ExtraInfo *create(BumpPtrAllocator &Allocator,
ArrayRef<MachineMemOperand *> MMOs,
MCSymbol *PreInstrSymbol = nullptr,
MCSymbol *PostInstrSymbol = nullptr,
MDNode *HeapAllocMarker = nullptr,
MDNode *PCSections = nullptr,
uint32_t CFIType = 0) {
bool HasPreInstrSymbol = PreInstrSymbol != nullptr;
bool HasPostInstrSymbol = PostInstrSymbol != nullptr;
bool HasHeapAllocMarker = HeapAllocMarker != nullptr;
bool HasCFIType = CFIType != 0;
bool HasPCSections = PCSections != nullptr;
auto *Result = new (Allocator.Allocate(
totalSizeToAlloc<MachineMemOperand *, MCSymbol *, MDNode *, uint32_t>(
MMOs.size(), HasPreInstrSymbol + HasPostInstrSymbol,
HasHeapAllocMarker + HasPCSections, HasCFIType),
alignof(ExtraInfo)))
ExtraInfo(MMOs.size(), HasPreInstrSymbol, HasPostInstrSymbol,
HasHeapAllocMarker, HasPCSections, HasCFIType);
// Copy the actual data into the trailing objects.
std::copy(MMOs.begin(), MMOs.end(),
Result->getTrailingObjects<MachineMemOperand *>());
if (HasPreInstrSymbol)
Result->getTrailingObjects<MCSymbol *>()[0] = PreInstrSymbol;
if (HasPostInstrSymbol)
Result->getTrailingObjects<MCSymbol *>()[HasPreInstrSymbol] =
PostInstrSymbol;
if (HasHeapAllocMarker)
Result->getTrailingObjects<MDNode *>()[0] = HeapAllocMarker;
if (HasPCSections)
Result->getTrailingObjects<MDNode *>()[HasHeapAllocMarker] =
PCSections;
if (HasCFIType)
Result->getTrailingObjects<uint32_t>()[0] = CFIType;
return Result;
}
ArrayRef<MachineMemOperand *> getMMOs() const {
return ArrayRef(getTrailingObjects<MachineMemOperand *>(), NumMMOs);
}
MCSymbol *getPreInstrSymbol() const {
return HasPreInstrSymbol ? getTrailingObjects<MCSymbol *>()[0] : nullptr;
}
MCSymbol *getPostInstrSymbol() const {
return HasPostInstrSymbol
? getTrailingObjects<MCSymbol *>()[HasPreInstrSymbol]
: nullptr;
}
MDNode *getHeapAllocMarker() const {
return HasHeapAllocMarker ? getTrailingObjects<MDNode *>()[0] : nullptr;
}
MDNode *getPCSections() const {
return HasPCSections
? getTrailingObjects<MDNode *>()[HasHeapAllocMarker]
: nullptr;
}
uint32_t getCFIType() const {
return HasCFIType ? getTrailingObjects<uint32_t>()[0] : 0;
}
private:
friend TrailingObjects;
// Description of the extra info, used to interpret the actual optional
// data appended.
//
// Note that this is not terribly space optimized. This leaves a great deal
// of flexibility to fit more in here later.
const int NumMMOs;
const bool HasPreInstrSymbol;
const bool HasPostInstrSymbol;
const bool HasHeapAllocMarker;
const bool HasPCSections;
const bool HasCFIType;
// Implement the `TrailingObjects` internal API.
size_t numTrailingObjects(OverloadToken<MachineMemOperand *>) const {
return NumMMOs;
}
size_t numTrailingObjects(OverloadToken<MCSymbol *>) const {
return HasPreInstrSymbol + HasPostInstrSymbol;
}
size_t numTrailingObjects(OverloadToken<MDNode *>) const {
return HasHeapAllocMarker + HasPCSections;
}
size_t numTrailingObjects(OverloadToken<uint32_t>) const {
return HasCFIType;
}
// Just a boring constructor to allow us to initialize the sizes. Always use
// the `create` routine above.
ExtraInfo(int NumMMOs, bool HasPreInstrSymbol, bool HasPostInstrSymbol,
bool HasHeapAllocMarker, bool HasPCSections, bool HasCFIType)
: NumMMOs(NumMMOs), HasPreInstrSymbol(HasPreInstrSymbol),
HasPostInstrSymbol(HasPostInstrSymbol),
HasHeapAllocMarker(HasHeapAllocMarker), HasPCSections(HasPCSections),
HasCFIType(HasCFIType) {}
};
/// Enumeration of the kinds of inline extra info available. It is important
/// that the `MachineMemOperand` inline kind has a tag value of zero to make
/// it accessible as an `ArrayRef`.
enum ExtraInfoInlineKinds {
EIIK_MMO = 0,
EIIK_PreInstrSymbol,
EIIK_PostInstrSymbol,
EIIK_OutOfLine
};
// We store extra information about the instruction here. The common case is
// expected to be nothing or a single pointer (typically a MMO or a symbol).
// We work to optimize this common case by storing it inline here rather than
// requiring a separate allocation, but we fall back to an allocation when
// multiple pointers are needed.
PointerSumType<ExtraInfoInlineKinds,
PointerSumTypeMember<EIIK_MMO, MachineMemOperand *>,
PointerSumTypeMember<EIIK_PreInstrSymbol, MCSymbol *>,
PointerSumTypeMember<EIIK_PostInstrSymbol, MCSymbol *>,
PointerSumTypeMember<EIIK_OutOfLine, ExtraInfo *>>
Info;
DebugLoc DbgLoc; // Source line information.
/// Unique instruction number. Used by DBG_INSTR_REFs to refer to the values
/// defined by this instruction.
unsigned DebugInstrNum;
// Intrusive list support
friend struct ilist_traits<MachineInstr>;
friend struct ilist_callback_traits<MachineBasicBlock>;
void setParent(MachineBasicBlock *P) { Parent = P; }
/// This constructor creates a copy of the given
/// MachineInstr in the given MachineFunction.
MachineInstr(MachineFunction &, const MachineInstr &);
/// This constructor create a MachineInstr and add the implicit operands.
/// It reserves space for number of operands specified by
/// MCInstrDesc. An explicit DebugLoc is supplied.
MachineInstr(MachineFunction &, const MCInstrDesc &TID, DebugLoc DL,
bool NoImp = false);
// MachineInstrs are pool-allocated and owned by MachineFunction.
friend class MachineFunction;
void
dumprImpl(const MachineRegisterInfo &MRI, unsigned Depth, unsigned MaxDepth,
SmallPtrSetImpl<const MachineInstr *> &AlreadySeenInstrs) const;
static bool opIsRegDef(const MachineOperand &Op) {
return Op.isReg() && Op.isDef();
}
static bool opIsRegUse(const MachineOperand &Op) {
return Op.isReg() && Op.isUse();
}
public:
MachineInstr(const MachineInstr &) = delete;
MachineInstr &operator=(const MachineInstr &) = delete;
// Use MachineFunction::DeleteMachineInstr() instead.
~MachineInstr() = delete;
const MachineBasicBlock* getParent() const { return Parent; }
MachineBasicBlock* getParent() { return Parent; }
/// Move the instruction before \p MovePos.
void moveBefore(MachineInstr *MovePos);
/// Return the function that contains the basic block that this instruction
/// belongs to.
///
/// Note: this is undefined behaviour if the instruction does not have a
/// parent.
const MachineFunction *getMF() const;
MachineFunction *getMF() {
return const_cast<MachineFunction *>(
static_cast<const MachineInstr *>(this)->getMF());
}
/// Return the asm printer flags bitvector.
uint8_t getAsmPrinterFlags() const { return AsmPrinterFlags; }
/// Clear the AsmPrinter bitvector.
void clearAsmPrinterFlags() { AsmPrinterFlags = 0; }
/// Return whether an AsmPrinter flag is set.
bool getAsmPrinterFlag(CommentFlag Flag) const {
assert(isUInt<LLVM_MI_ASMPRINTERFLAGS_BITS>(unsigned(Flag)) &&
"Flag is out of range for the AsmPrinterFlags field");
return AsmPrinterFlags & Flag;
}
/// Set a flag for the AsmPrinter.
void setAsmPrinterFlag(uint8_t Flag) {
assert(isUInt<LLVM_MI_ASMPRINTERFLAGS_BITS>(unsigned(Flag)) &&
"Flag is out of range for the AsmPrinterFlags field");
AsmPrinterFlags |= Flag;
}
/// Clear specific AsmPrinter flags.
void clearAsmPrinterFlag(CommentFlag Flag) {
assert(isUInt<LLVM_MI_ASMPRINTERFLAGS_BITS>(unsigned(Flag)) &&
"Flag is out of range for the AsmPrinterFlags field");
AsmPrinterFlags &= ~Flag;
}
/// Return the MI flags bitvector.
uint32_t getFlags() const {
return Flags;
}
/// Return whether an MI flag is set.
bool getFlag(MIFlag Flag) const {
assert(isUInt<LLVM_MI_FLAGS_BITS>(unsigned(Flag)) &&
"Flag is out of range for the Flags field");
return Flags & Flag;
}
/// Set a MI flag.
void setFlag(MIFlag Flag) {
assert(isUInt<LLVM_MI_FLAGS_BITS>(unsigned(Flag)) &&
"Flag is out of range for the Flags field");
Flags |= (uint32_t)Flag;
}
void setFlags(unsigned flags) {
assert(isUInt<LLVM_MI_FLAGS_BITS>(flags) &&
"flags to be set are out of range for the Flags field");
// Filter out the automatically maintained flags.
unsigned Mask = BundledPred | BundledSucc;
Flags = (Flags & Mask) | (flags & ~Mask);
}
/// clearFlag - Clear a MI flag.
void clearFlag(MIFlag Flag) {
assert(isUInt<LLVM_MI_FLAGS_BITS>(unsigned(Flag)) &&
"Flag to clear is out of range for the Flags field");
Flags &= ~((uint32_t)Flag);
}
/// Return true if MI is in a bundle (but not the first MI in a bundle).
///
/// A bundle looks like this before it's finalized:
/// ----------------
/// | MI |
/// ----------------
/// |
/// ----------------
/// | MI * |
/// ----------------
/// |
/// ----------------
/// | MI * |
/// ----------------
/// In this case, the first MI starts a bundle but is not inside a bundle, the
/// next 2 MIs are considered "inside" the bundle.
///
/// After a bundle is finalized, it looks like this:
/// ----------------
/// | Bundle |
/// ----------------
/// |
/// ----------------
/// | MI * |
/// ----------------
/// |
/// ----------------
/// | MI * |
/// ----------------
/// |
/// ----------------
/// | MI * |
/// ----------------
/// The first instruction has the special opcode "BUNDLE". It's not "inside"
/// a bundle, but the next three MIs are.
bool isInsideBundle() const {
return getFlag(BundledPred);
}
/// Return true if this instruction part of a bundle. This is true
/// if either itself or its following instruction is marked "InsideBundle".
bool isBundled() const {
return isBundledWithPred() || isBundledWithSucc();
}
/// Return true if this instruction is part of a bundle, and it is not the
/// first instruction in the bundle.
bool isBundledWithPred() const { return getFlag(BundledPred); }
/// Return true if this instruction is part of a bundle, and it is not the
/// last instruction in the bundle.
bool isBundledWithSucc() const { return getFlag(BundledSucc); }
/// Bundle this instruction with its predecessor. This can be an unbundled
/// instruction, or it can be the first instruction in a bundle.
void bundleWithPred();
/// Bundle this instruction with its successor. This can be an unbundled
/// instruction, or it can be the last instruction in a bundle.
void bundleWithSucc();
/// Break bundle above this instruction.
void unbundleFromPred();
/// Break bundle below this instruction.
void unbundleFromSucc();
/// Returns the debug location id of this MachineInstr.
const DebugLoc &getDebugLoc() const { return DbgLoc; }
/// Return the operand containing the offset to be used if this DBG_VALUE
/// instruction is indirect; will be an invalid register if this value is
/// not indirect, and an immediate with value 0 otherwise.
const MachineOperand &getDebugOffset() const {
assert(isNonListDebugValue() && "not a DBG_VALUE");
return getOperand(1);
}
MachineOperand &getDebugOffset() {
assert(isNonListDebugValue() && "not a DBG_VALUE");
return getOperand(1);
}
/// Return the operand for the debug variable referenced by
/// this DBG_VALUE instruction.
const MachineOperand &getDebugVariableOp() const;
MachineOperand &getDebugVariableOp();
/// Return the debug variable referenced by
/// this DBG_VALUE instruction.
const DILocalVariable *getDebugVariable() const;
/// Return the operand for the complex address expression referenced by
/// this DBG_VALUE instruction.
const MachineOperand &getDebugExpressionOp() const;
MachineOperand &getDebugExpressionOp();
/// Return the complex address expression referenced by
/// this DBG_VALUE instruction.
const DIExpression *getDebugExpression() const;
/// Return the debug label referenced by
/// this DBG_LABEL instruction.
const DILabel *getDebugLabel() const;
/// Fetch the instruction number of this MachineInstr. If it does not have
/// one already, a new and unique number will be assigned.
unsigned getDebugInstrNum();
/// Fetch instruction number of this MachineInstr -- but before it's inserted
/// into \p MF. Needed for transformations that create an instruction but
/// don't immediately insert them.
unsigned getDebugInstrNum(MachineFunction &MF);
/// Examine the instruction number of this MachineInstr. May be zero if
/// it hasn't been assigned a number yet.
unsigned peekDebugInstrNum() const { return DebugInstrNum; }
/// Set instruction number of this MachineInstr. Avoid using unless you're
/// deserializing this information.
void setDebugInstrNum(unsigned Num) { DebugInstrNum = Num; }
/// Drop any variable location debugging information associated with this
/// instruction. Use when an instruction is modified in such a way that it no
/// longer defines the value it used to. Variable locations using that value
/// will be dropped.
void dropDebugNumber() { DebugInstrNum = 0; }
/// Emit an error referring to the source location of this instruction.
/// This should only be used for inline assembly that is somehow
/// impossible to compile. Other errors should have been handled much
/// earlier.
///
/// If this method returns, the caller should try to recover from the error.
void emitError(StringRef Msg) const;
/// Returns the target instruction descriptor of this MachineInstr.
const MCInstrDesc &getDesc() const { return *MCID; }
/// Returns the opcode of this MachineInstr.
unsigned getOpcode() const { return MCID->Opcode; }
/// Retuns the total number of operands.
unsigned getNumOperands() const { return NumOperands; }
/// Returns the total number of operands which are debug locations.
unsigned getNumDebugOperands() const {
return std::distance(debug_operands().begin(), debug_operands().end());
}
const MachineOperand& getOperand(unsigned i) const {
assert(i < getNumOperands() && "getOperand() out of range!");
return Operands[i];
}
MachineOperand& getOperand(unsigned i) {
assert(i < getNumOperands() && "getOperand() out of range!");
return Operands[i];
}
MachineOperand &getDebugOperand(unsigned Index) {
assert(Index < getNumDebugOperands() && "getDebugOperand() out of range!");
return *(debug_operands().begin() + Index);
}
const MachineOperand &getDebugOperand(unsigned Index) const {
assert(Index < getNumDebugOperands() && "getDebugOperand() out of range!");
return *(debug_operands().begin() + Index);
}
SmallSet<Register, 4> getUsedDebugRegs() const {
assert(isDebugValue() && "not a DBG_VALUE*");
SmallSet<Register, 4> UsedRegs;
for (const auto &MO : debug_operands())
if (MO.isReg() && MO.getReg())
UsedRegs.insert(MO.getReg());
return UsedRegs;
}
/// Returns whether this debug value has at least one debug operand with the
/// register \p Reg.
bool hasDebugOperandForReg(Register Reg) const {
return any_of(debug_operands(), [Reg](const MachineOperand &Op) {
return Op.isReg() && Op.getReg() == Reg;
});
}
/// Returns a range of all of the operands that correspond to a debug use of
/// \p Reg.
template <typename Operand, typename Instruction>
static iterator_range<
filter_iterator<Operand *, std::function<bool(Operand &Op)>>>
getDebugOperandsForReg(Instruction *MI, Register Reg) {
std::function<bool(Operand & Op)> OpUsesReg(
[Reg](Operand &Op) { return Op.isReg() && Op.getReg() == Reg; });
return make_filter_range(MI->debug_operands(), OpUsesReg);
}
iterator_range<filter_iterator<const MachineOperand *,
std::function<bool(const MachineOperand &Op)>>>
getDebugOperandsForReg(Register Reg) const {
return MachineInstr::getDebugOperandsForReg<const MachineOperand,
const MachineInstr>(this, Reg);
}
iterator_range<filter_iterator<MachineOperand *,
std::function<bool(MachineOperand &Op)>>>
getDebugOperandsForReg(Register Reg) {
return MachineInstr::getDebugOperandsForReg<MachineOperand, MachineInstr>(
this, Reg);
}
bool isDebugOperand(const MachineOperand *Op) const {
return Op >= adl_begin(debug_operands()) && Op <= adl_end(debug_operands());
}
unsigned getDebugOperandIndex(const MachineOperand *Op) const {
assert(isDebugOperand(Op) && "Expected a debug operand.");
return std::distance(adl_begin(debug_operands()), Op);
}
/// Returns the total number of definitions.
unsigned getNumDefs() const {
return getNumExplicitDefs() + MCID->implicit_defs().size();
}
/// Returns true if the instruction has implicit definition.
bool hasImplicitDef() const {
for (const MachineOperand &MO : implicit_operands())
if (MO.isDef() && MO.isImplicit())
return true;
return false;
}
/// Returns the implicit operands number.
unsigned getNumImplicitOperands() const {
return getNumOperands() - getNumExplicitOperands();
}
/// Return true if operand \p OpIdx is a subregister index.
bool isOperandSubregIdx(unsigned OpIdx) const {
assert(getOperand(OpIdx).isImm() && "Expected MO_Immediate operand type.");
if (isExtractSubreg() && OpIdx == 2)
return true;
if (isInsertSubreg() && OpIdx == 3)
return true;
if (isRegSequence() && OpIdx > 1 && (OpIdx % 2) == 0)
return true;
if (isSubregToReg() && OpIdx == 3)
return true;
return false;
}
/// Returns the number of non-implicit operands.
unsigned getNumExplicitOperands() const;
/// Returns the number of non-implicit definitions.
unsigned getNumExplicitDefs() const;
/// iterator/begin/end - Iterate over all operands of a machine instruction.
using mop_iterator = MachineOperand *;
using const_mop_iterator = const MachineOperand *;
mop_iterator operands_begin() { return Operands; }
mop_iterator operands_end() { return Operands + NumOperands; }
const_mop_iterator operands_begin() const { return Operands; }
const_mop_iterator operands_end() const { return Operands + NumOperands; }
iterator_range<mop_iterator> operands() {
return make_range(operands_begin(), operands_end());
}
iterator_range<const_mop_iterator> operands() const {
return make_range(operands_begin(), operands_end());
}
iterator_range<mop_iterator> explicit_operands() {
return make_range(operands_begin(),
operands_begin() + getNumExplicitOperands());
}
iterator_range<const_mop_iterator> explicit_operands() const {
return make_range(operands_begin(),
operands_begin() + getNumExplicitOperands());
}
iterator_range<mop_iterator> implicit_operands() {
return make_range(explicit_operands().end(), operands_end());
}
iterator_range<const_mop_iterator> implicit_operands() const {
return make_range(explicit_operands().end(), operands_end());
}
/// Returns a range over all operands that are used to determine the variable
/// location for this DBG_VALUE instruction.
iterator_range<mop_iterator> debug_operands() {
assert((isDebugValueLike()) && "Must be a debug value instruction.");
return isNonListDebugValue()
? make_range(operands_begin(), operands_begin() + 1)
: make_range(operands_begin() + 2, operands_end());
}
/// \copydoc debug_operands()
iterator_range<const_mop_iterator> debug_operands() const {
assert((isDebugValueLike()) && "Must be a debug value instruction.");
return isNonListDebugValue()
? make_range(operands_begin(), operands_begin() + 1)
: make_range(operands_begin() + 2, operands_end());
}
/// Returns a range over all explicit operands that are register definitions.
/// Implicit definition are not included!
iterator_range<mop_iterator> defs() {
return make_range(operands_begin(),
operands_begin() + getNumExplicitDefs());
}
/// \copydoc defs()
iterator_range<const_mop_iterator> defs() const {
return make_range(operands_begin(),
operands_begin() + getNumExplicitDefs());
}
/// Returns a range that includes all operands that are register uses.
/// This may include unrelated operands which are not register uses.
iterator_range<mop_iterator> uses() {
return make_range(operands_begin() + getNumExplicitDefs(), operands_end());
}
/// \copydoc uses()
iterator_range<const_mop_iterator> uses() const {
return make_range(operands_begin() + getNumExplicitDefs(), operands_end());
}
iterator_range<mop_iterator> explicit_uses() {
return make_range(operands_begin() + getNumExplicitDefs(),
operands_begin() + getNumExplicitOperands());
}
iterator_range<const_mop_iterator> explicit_uses() const {
return make_range(operands_begin() + getNumExplicitDefs(),
operands_begin() + getNumExplicitOperands());
}
using filtered_mop_iterator =
filter_iterator<mop_iterator, bool (*)(const MachineOperand &)>;
using filtered_const_mop_iterator =
filter_iterator<const_mop_iterator, bool (*)(const MachineOperand &)>;
/// Returns an iterator range over all operands that are (explicit or
/// implicit) register defs.
iterator_range<filtered_mop_iterator> all_defs() {
return make_filter_range(operands(), opIsRegDef);
}
/// \copydoc all_defs()
iterator_range<filtered_const_mop_iterator> all_defs() const {
return make_filter_range(operands(), opIsRegDef);
}
/// Returns an iterator range over all operands that are (explicit or
/// implicit) register uses.
iterator_range<filtered_mop_iterator> all_uses() {
return make_filter_range(uses(), opIsRegUse);
}
/// \copydoc all_uses()
iterator_range<filtered_const_mop_iterator> all_uses() const {
return make_filter_range(uses(), opIsRegUse);
}
/// Returns the number of the operand iterator \p I points to.
unsigned getOperandNo(const_mop_iterator I) const {
return I - operands_begin();
}
/// Access to memory operands of the instruction. If there are none, that does
/// not imply anything about whether the function accesses memory. Instead,
/// the caller must behave conservatively.
ArrayRef<MachineMemOperand *> memoperands() const {
if (!Info)
return {};
if (Info.is<EIIK_MMO>())
return ArrayRef(Info.getAddrOfZeroTagPointer(), 1);
if (ExtraInfo *EI = Info.get<EIIK_OutOfLine>())
return EI->getMMOs();
return {};
}
/// Access to memory operands of the instruction.
///
/// If `memoperands_begin() == memoperands_end()`, that does not imply
/// anything about whether the function accesses memory. Instead, the caller
/// must behave conservatively.
mmo_iterator memoperands_begin() const { return memoperands().begin(); }
/// Access to memory operands of the instruction.
///
/// If `memoperands_begin() == memoperands_end()`, that does not imply
/// anything about whether the function accesses memory. Instead, the caller
/// must behave conservatively.
mmo_iterator memoperands_end() const { return memoperands().end(); }
/// Return true if we don't have any memory operands which described the
/// memory access done by this instruction. If this is true, calling code
/// must be conservative.
bool memoperands_empty() const { return memoperands().empty(); }
/// Return true if this instruction has exactly one MachineMemOperand.
bool hasOneMemOperand() const { return memoperands().size() == 1; }
/// Return the number of memory operands.
unsigned getNumMemOperands() const { return memoperands().size(); }
/// Helper to extract a pre-instruction symbol if one has been added.
MCSymbol *getPreInstrSymbol() const {
if (!Info)
return nullptr;
if (MCSymbol *S = Info.get<EIIK_PreInstrSymbol>())
return S;
if (ExtraInfo *EI = Info.get<EIIK_OutOfLine>())
return EI->getPreInstrSymbol();
return nullptr;
}
/// Helper to extract a post-instruction symbol if one has been added.
MCSymbol *getPostInstrSymbol() const {
if (!Info)
return nullptr;
if (MCSymbol *S = Info.get<EIIK_PostInstrSymbol>())
return S;
if (ExtraInfo *EI = Info.get<EIIK_OutOfLine>())
return EI->getPostInstrSymbol();
return nullptr;
}
/// Helper to extract a heap alloc marker if one has been added.
MDNode *getHeapAllocMarker() const {
if (!Info)
return nullptr;
if (ExtraInfo *EI = Info.get<EIIK_OutOfLine>())
return EI->getHeapAllocMarker();
return nullptr;
}
/// Helper to extract PCSections metadata target sections.
MDNode *getPCSections() const {
if (!Info)
return nullptr;
if (ExtraInfo *EI = Info.get<EIIK_OutOfLine>())
return EI->getPCSections();
return nullptr;
}
/// Helper to extract a CFI type hash if one has been added.
uint32_t getCFIType() const {
if (!Info)
return 0;
if (ExtraInfo *EI = Info.get<EIIK_OutOfLine>())
return EI->getCFIType();
return 0;
}
/// API for querying MachineInstr properties. They are the same as MCInstrDesc
/// queries but they are bundle aware.
enum QueryType {
IgnoreBundle, // Ignore bundles
AnyInBundle, // Return true if any instruction in bundle has property
AllInBundle // Return true if all instructions in bundle have property
};
/// Return true if the instruction (or in the case of a bundle,
/// the instructions inside the bundle) has the specified property.
/// The first argument is the property being queried.
/// The second argument indicates whether the query should look inside
/// instruction bundles.
bool hasProperty(unsigned MCFlag, QueryType Type = AnyInBundle) const {
assert(MCFlag < 64 &&
"MCFlag out of range for bit mask in getFlags/hasPropertyInBundle.");
// Inline the fast path for unbundled or bundle-internal instructions.
if (Type == IgnoreBundle || !isBundled() || isBundledWithPred())
return getDesc().getFlags() & (1ULL << MCFlag);
// If this is the first instruction in a bundle, take the slow path.
return hasPropertyInBundle(1ULL << MCFlag, Type);
}
/// Return true if this is an instruction that should go through the usual
/// legalization steps.
bool isPreISelOpcode(QueryType Type = IgnoreBundle) const {
return hasProperty(MCID::PreISelOpcode, Type);
}
/// Return true if this instruction can have a variable number of operands.
/// In this case, the variable operands will be after the normal
/// operands but before the implicit definitions and uses (if any are
/// present).
bool isVariadic(QueryType Type = IgnoreBundle) const {
return hasProperty(MCID::Variadic, Type);
}
/// Set if this instruction has an optional definition, e.g.
/// ARM instructions which can set condition code if 's' bit is set.
bool hasOptionalDef(QueryType Type = IgnoreBundle) const {
return hasProperty(MCID::HasOptionalDef, Type);
}
/// Return true if this is a pseudo instruction that doesn't
/// correspond to a real machine instruction.
bool isPseudo(QueryType Type = IgnoreBundle) const {
return hasProperty(MCID::Pseudo, Type);
}
/// Return true if this instruction doesn't produce any output in the form of
/// executable instructions.
bool isMetaInstruction(QueryType Type = IgnoreBundle) const {
return hasProperty(MCID::Meta, Type);
}
bool isReturn(QueryType Type = AnyInBundle) const {
return hasProperty(MCID::Return, Type);
}
/// Return true if this is an instruction that marks the end of an EH scope,
/// i.e., a catchpad or a cleanuppad instruction.
bool isEHScopeReturn(QueryType Type = AnyInBundle) const {
return hasProperty(MCID::EHScopeReturn, Type);
}
bool isCall(QueryType Type = AnyInBundle) const {
return hasProperty(MCID::Call, Type);
}
/// Return true if this is a call instruction that may have an associated
/// call site entry in the debug info.
bool isCandidateForCallSiteEntry(QueryType Type = IgnoreBundle) const;
/// Return true if copying, moving, or erasing this instruction requires
/// updating Call Site Info (see \ref copyCallSiteInfo, \ref moveCallSiteInfo,
/// \ref eraseCallSiteInfo).
bool shouldUpdateCallSiteInfo() const;
/// Returns true if the specified instruction stops control flow
/// from executing the instruction immediately following it. Examples include
/// unconditional branches and return instructions.
bool isBarrier(QueryType Type = AnyInBundle) const {
return hasProperty(MCID::Barrier, Type);
}
/// Returns true if this instruction part of the terminator for a basic block.
/// Typically this is things like return and branch instructions.
///
/// Various passes use this to insert code into the bottom of a basic block,
/// but before control flow occurs.
bool isTerminator(QueryType Type = AnyInBundle) const {
return hasProperty(MCID::Terminator, Type);
}
/// Returns true if this is a conditional, unconditional, or indirect branch.
/// Predicates below can be used to discriminate between
/// these cases, and the TargetInstrInfo::analyzeBranch method can be used to
/// get more information.
bool isBranch(QueryType Type = AnyInBundle) const {
return hasProperty(MCID::Branch, Type);
}
/// Return true if this is an indirect branch, such as a
/// branch through a register.
bool isIndirectBranch(QueryType Type = AnyInBundle) const {
return hasProperty(MCID::IndirectBranch, Type);
}
/// Return true if this is a branch which may fall
/// through to the next instruction or may transfer control flow to some other
/// block. The TargetInstrInfo::analyzeBranch method can be used to get more
/// information about this branch.
bool isConditionalBranch(QueryType Type = AnyInBundle) const {
return isBranch(Type) && !isBarrier(Type) && !isIndirectBranch(Type);
}
/// Return true if this is a branch which always
/// transfers control flow to some other block. The
/// TargetInstrInfo::analyzeBranch method can be used to get more information
/// about this branch.
bool isUnconditionalBranch(QueryType Type = AnyInBundle) const {
return isBranch(Type) && isBarrier(Type) && !isIndirectBranch(Type);
}
/// Return true if this instruction has a predicate operand that
/// controls execution. It may be set to 'always', or may be set to other
/// values. There are various methods in TargetInstrInfo that can be used to
/// control and modify the predicate in this instruction.
bool isPredicable(QueryType Type = AllInBundle) const {
// If it's a bundle than all bundled instructions must be predicable for this
// to return true.
return hasProperty(MCID::Predicable, Type);
}
/// Return true if this instruction is a comparison.
bool isCompare(QueryType Type = IgnoreBundle) const {
return hasProperty(MCID::Compare, Type);
}
/// Return true if this instruction is a move immediate
/// (including conditional moves) instruction.
bool isMoveImmediate(QueryType Type = IgnoreBundle) const {
return hasProperty(MCID::MoveImm, Type);
}
/// Return true if this instruction is a register move.
/// (including moving values from subreg to reg)
bool isMoveReg(QueryType Type = IgnoreBundle) const {
return hasProperty(MCID::MoveReg, Type);
}
/// Return true if this instruction is a bitcast instruction.
bool isBitcast(QueryType Type = IgnoreBundle) const {
return hasProperty(MCID::Bitcast, Type);
}
/// Return true if this instruction is a select instruction.
bool isSelect(QueryType Type = IgnoreBundle) const {
return hasProperty(MCID::Select, Type);
}
/// Return true if this instruction cannot be safely duplicated.
/// For example, if the instruction has a unique labels attached
/// to it, duplicating it would cause multiple definition errors.
bool isNotDuplicable(QueryType Type = AnyInBundle) const {
if (getPreInstrSymbol() || getPostInstrSymbol())
return true;
return hasProperty(MCID::NotDuplicable, Type);
}
/// Return true if this instruction is convergent.
/// Convergent instructions can not be made control-dependent on any
/// additional values.
bool isConvergent(QueryType Type = AnyInBundle) const {
if (isInlineAsm()) {
unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
if (ExtraInfo & InlineAsm::Extra_IsConvergent)
return true;
}
return hasProperty(MCID::Convergent, Type);
}
/// Returns true if the specified instruction has a delay slot
/// which must be filled by the code generator.
bool hasDelaySlot(QueryType Type = AnyInBundle) const {
return hasProperty(MCID::DelaySlot, Type);
}
/// Return true for instructions that can be folded as
/// memory operands in other instructions. The most common use for this
/// is instructions that are simple loads from memory that don't modify
/// the loaded value in any way, but it can also be used for instructions
/// that can be expressed as constant-pool loads, such as V_SETALLONES
/// on x86, to allow them to be folded when it is beneficial.
/// This should only be set on instructions that return a value in their
/// only virtual register definition.
bool canFoldAsLoad(QueryType Type = IgnoreBundle) const {
return hasProperty(MCID::FoldableAsLoad, Type);
}
/// Return true if this instruction behaves
/// the same way as the generic REG_SEQUENCE instructions.
/// E.g., on ARM,
/// dX VMOVDRR rY, rZ
/// is equivalent to
/// dX = REG_SEQUENCE rY, ssub_0, rZ, ssub_1.
///
/// Note that for the optimizers to be able to take advantage of
/// this property, TargetInstrInfo::getRegSequenceLikeInputs has to be
/// override accordingly.
bool isRegSequenceLike(QueryType Type = IgnoreBundle) const {
return hasProperty(MCID::RegSequence, Type);
}
/// Return true if this instruction behaves
/// the same way as the generic EXTRACT_SUBREG instructions.
/// E.g., on ARM,
/// rX, rY VMOVRRD dZ
/// is equivalent to two EXTRACT_SUBREG:
/// rX = EXTRACT_SUBREG dZ, ssub_0
/// rY = EXTRACT_SUBREG dZ, ssub_1
///
/// Note that for the optimizers to be able to take advantage of
/// this property, TargetInstrInfo::getExtractSubregLikeInputs has to be
/// override accordingly.
bool isExtractSubregLike(QueryType Type = IgnoreBundle) const {
return hasProperty(MCID::ExtractSubreg, Type);
}
/// Return true if this instruction behaves
/// the same way as the generic INSERT_SUBREG instructions.
/// E.g., on ARM,
/// dX = VSETLNi32 dY, rZ, Imm
/// is equivalent to a INSERT_SUBREG:
/// dX = INSERT_SUBREG dY, rZ, translateImmToSubIdx(Imm)
///
/// Note that for the optimizers to be able to take advantage of
/// this property, TargetInstrInfo::getInsertSubregLikeInputs has to be
/// override accordingly.
bool isInsertSubregLike(QueryType Type = IgnoreBundle) const {
return hasProperty(MCID::InsertSubreg, Type);
}
//===--------------------------------------------------------------------===//
// Side Effect Analysis
//===--------------------------------------------------------------------===//
/// Return true if this instruction could possibly read memory.
/// Instructions with this flag set are not necessarily simple load
/// instructions, they may load a value and modify it, for example.
bool mayLoad(QueryType Type = AnyInBundle) const {
if (isInlineAsm()) {
unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
if (ExtraInfo & InlineAsm::Extra_MayLoad)
return true;
}
return hasProperty(MCID::MayLoad, Type);
}
/// Return true if this instruction could possibly modify memory.
/// Instructions with this flag set are not necessarily simple store
/// instructions, they may store a modified value based on their operands, or
/// may not actually modify anything, for example.
bool mayStore(QueryType Type = AnyInBundle) const {
if (isInlineAsm()) {
unsigned ExtraInfo = getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
if (ExtraInfo & InlineAsm::Extra_MayStore)
return true;
}
return hasProperty(MCID::MayStore, Type);
}
/// Return true if this instruction could possibly read or modify memory.
bool mayLoadOrStore(QueryType Type = AnyInBundle) const {
return mayLoad(Type) || mayStore(Type);
}
/// Return true if this instruction could possibly raise a floating-point
/// exception. This is the case if the instruction is a floating-point
/// instruction that can in principle raise an exception, as indicated
/// by the MCID::MayRaiseFPException property, *and* at the same time,
/// the instruction is used in a context where we expect floating-point
/// exceptions are not disabled, as indicated by the NoFPExcept MI flag.
bool mayRaiseFPException() const {
return hasProperty(MCID::MayRaiseFPException) &&
!getFlag(MachineInstr::MIFlag::NoFPExcept);
}
//===--------------------------------------------------------------------===//
// Flags that indicate whether an instruction can be modified by a method.
//===--------------------------------------------------------------------===//
/// Return true if this may be a 2- or 3-address
/// instruction (of the form "X = op Y, Z, ..."), which produces the same
/// result if Y and Z are exchanged. If this flag is set, then the
/// TargetInstrInfo::commuteInstruction method may be used to hack on the
/// instruction.
///
/// Note that this flag may be set on instructions that are only commutable
/// sometimes. In these cases, the call to commuteInstruction will fail.
/// Also note that some instructions require non-trivial modification to
/// commute them.
bool isCommutable(QueryType Type = IgnoreBundle) const {
return hasProperty(MCID::Commutable, Type);
}
/// Return true if this is a 2-address instruction
/// which can be changed into a 3-address instruction if needed. Doing this
/// transformation can be profitable in the register allocator, because it
/// means that the instruction can use a 2-address form if possible, but
/// degrade into a less efficient form if the source and dest register cannot
/// be assigned to the same register. For example, this allows the x86
/// backend to turn a "shl reg, 3" instruction into an LEA instruction, which
/// is the same speed as the shift but has bigger code size.
///
/// If this returns true, then the target must implement the
/// TargetInstrInfo::convertToThreeAddress method for this instruction, which
/// is allowed to fail if the transformation isn't valid for this specific
/// instruction (e.g. shl reg, 4 on x86).
///
bool isConvertibleTo3Addr(QueryType Type = IgnoreBundle) const {
return hasProperty(MCID::ConvertibleTo3Addr, Type);
}
/// Return true if this instruction requires
/// custom insertion support when the DAG scheduler is inserting it into a
/// machine basic block. If this is true for the instruction, it basically
/// means that it is a pseudo instruction used at SelectionDAG time that is
/// expanded out into magic code by the target when MachineInstrs are formed.
///
/// If this is true, the TargetLoweringInfo::InsertAtEndOfBasicBlock method
/// is used to insert this into the MachineBasicBlock.
bool usesCustomInsertionHook(QueryType Type = IgnoreBundle) const {
return hasProperty(MCID::UsesCustomInserter, Type);
}
/// Return true if this instruction requires *adjustment*
/// after instruction selection by calling a target hook. For example, this
/// can be used to fill in ARM 's' optional operand depending on whether
/// the conditional flag register is used.
bool hasPostISelHook(QueryType Type = IgnoreBundle) const {
return hasProperty(MCID::HasPostISelHook, Type);
}
/// Returns true if this instruction is a candidate for remat.
/// This flag is deprecated, please don't use it anymore. If this
/// flag is set, the isReallyTriviallyReMaterializable() method is called to
/// verify the instruction is really rematable.
bool isRematerializable(QueryType Type = AllInBundle) const {
// It's only possible to re-mat a bundle if all bundled instructions are
// re-materializable.
return hasProperty(MCID::Rematerializable, Type);
}
/// Returns true if this instruction has the same cost (or less) than a move
/// instruction. This is useful during certain types of optimizations
/// (e.g., remat during two-address conversion or machine licm)
/// where we would like to remat or hoist the instruction, but not if it costs
/// more than moving the instruction into the appropriate register. Note, we
/// are not marking copies from and to the same register class with this flag.
bool isAsCheapAsAMove(QueryType Type = AllInBundle) const {
// Only returns true for a bundle if all bundled instructions are cheap.
return hasProperty(MCID::CheapAsAMove, Type);
}
/// Returns true if this instruction source operands
/// have special register allocation requirements that are not captured by the
/// operand register classes. e.g. ARM::STRD's two source registers must be an
/// even / odd pair, ARM::STM registers have to be in ascending order.
/// Post-register allocation passes should not attempt to change allocations
/// for sources of instructions with this flag.
bool hasExtraSrcRegAllocReq(QueryType Type = AnyInBundle) const {
return hasProperty(MCID::ExtraSrcRegAllocReq, Type);
}
/// Returns true if this instruction def operands
/// have special register allocation requirements that are not captured by the
/// operand register classes. e.g. ARM::LDRD's two def registers must be an
/// even / odd pair, ARM::LDM registers have to be in ascending order.
/// Post-register allocation passes should not attempt to change allocations
/// for definitions of instructions with this flag.
bool hasExtraDefRegAllocReq(QueryType Type = AnyInBundle) const {
return hasProperty(MCID::ExtraDefRegAllocReq, Type);
}
enum MICheckType {
CheckDefs, // Check all operands for equality
CheckKillDead, // Check all operands including kill / dead markers
IgnoreDefs, // Ignore all definitions
IgnoreVRegDefs // Ignore virtual register definitions
};
/// Return true if this instruction is identical to \p Other.
/// Two instructions are identical if they have the same opcode and all their
/// operands are identical (with respect to MachineOperand::isIdenticalTo()).
/// Note that this means liveness related flags (dead, undef, kill) do not
/// affect the notion of identical.
bool isIdenticalTo(const MachineInstr &Other,
MICheckType Check = CheckDefs) const;
/// Returns true if this instruction is a debug instruction that represents an
/// identical debug value to \p Other.
/// This function considers these debug instructions equivalent if they have
/// identical variables, debug locations, and debug operands, and if the
/// DIExpressions combined with the directness flags are equivalent.
bool isEquivalentDbgInstr(const MachineInstr &Other) const;
/// Unlink 'this' from the containing basic block, and return it without
/// deleting it.
///
/// This function can not be used on bundled instructions, use
/// removeFromBundle() to remove individual instructions from a bundle.
MachineInstr *removeFromParent();
/// Unlink this instruction from its basic block and return it without
/// deleting it.
///
/// If the instruction is part of a bundle, the other instructions in the
/// bundle remain bundled.
MachineInstr *removeFromBundle();
/// Unlink 'this' from the containing basic block and delete it.
///
/// If this instruction is the header of a bundle, the whole bundle is erased.
/// This function can not be used for instructions inside a bundle, use
/// eraseFromBundle() to erase individual bundled instructions.
void eraseFromParent();
/// Unlink 'this' form its basic block and delete it.
///
/// If the instruction is part of a bundle, the other instructions in the
/// bundle remain bundled.
void eraseFromBundle();
bool isEHLabel() const { return getOpcode() == TargetOpcode::EH_LABEL; }
bool isGCLabel() const { return getOpcode() == TargetOpcode::GC_LABEL; }
bool isAnnotationLabel() const {
return getOpcode() == TargetOpcode::ANNOTATION_LABEL;
}
/// Returns true if the MachineInstr represents a label.
bool isLabel() const {
return isEHLabel() || isGCLabel() || isAnnotationLabel();
}
bool isCFIInstruction() const {
return getOpcode() == TargetOpcode::CFI_INSTRUCTION;
}
bool isPseudoProbe() const {
return getOpcode() == TargetOpcode::PSEUDO_PROBE;
}
// True if the instruction represents a position in the function.
bool isPosition() const { return isLabel() || isCFIInstruction(); }
bool isNonListDebugValue() const {
return getOpcode() == TargetOpcode::DBG_VALUE;
}
bool isDebugValueList() const {
return getOpcode() == TargetOpcode::DBG_VALUE_LIST;
}
bool isDebugValue() const {
return isNonListDebugValue() || isDebugValueList();
}
bool isDebugLabel() const { return getOpcode() == TargetOpcode::DBG_LABEL; }
bool isDebugRef() const { return getOpcode() == TargetOpcode::DBG_INSTR_REF; }
bool isDebugValueLike() const { return isDebugValue() || isDebugRef(); }
bool isDebugPHI() const { return getOpcode() == TargetOpcode::DBG_PHI; }
bool isDebugInstr() const {
return isDebugValue() || isDebugLabel() || isDebugRef() || isDebugPHI();
}
bool isDebugOrPseudoInstr() const {
return isDebugInstr() || isPseudoProbe();
}
bool isDebugOffsetImm() const {
return isNonListDebugValue() && getDebugOffset().isImm();
}
/// A DBG_VALUE is indirect iff the location operand is a register and
/// the offset operand is an immediate.
bool isIndirectDebugValue() const {
return isDebugOffsetImm() && getDebugOperand(0).isReg();
}
/// A DBG_VALUE is an entry value iff its debug expression contains the
/// DW_OP_LLVM_entry_value operation.
bool isDebugEntryValue() const;
/// Return true if the instruction is a debug value which describes a part of
/// a variable as unavailable.
bool isUndefDebugValue() const {
if (!isDebugValue())
return false;
// If any $noreg locations are given, this DV is undef.
for (const MachineOperand &Op : debug_operands())
if (Op.isReg() && !Op.getReg().isValid())
return true;
return false;
}
bool isPHI() const {
return getOpcode() == TargetOpcode::PHI ||
getOpcode() == TargetOpcode::G_PHI;
}
bool isKill() const { return getOpcode() == TargetOpcode::KILL; }
bool isImplicitDef() const { return getOpcode()==TargetOpcode::IMPLICIT_DEF; }
bool isInlineAsm() const {
return getOpcode() == TargetOpcode::INLINEASM ||
getOpcode() == TargetOpcode::INLINEASM_BR;
}
/// FIXME: Seems like a layering violation that the AsmDialect, which is X86
/// specific, be attached to a generic MachineInstr.
bool isMSInlineAsm() const {
return isInlineAsm() && getInlineAsmDialect() == InlineAsm::AD_Intel;
}
bool isStackAligningInlineAsm() const;
InlineAsm::AsmDialect getInlineAsmDialect() const;
bool isInsertSubreg() const {
return getOpcode() == TargetOpcode::INSERT_SUBREG;
}
bool isSubregToReg() const {
return getOpcode() == TargetOpcode::SUBREG_TO_REG;
}
bool isRegSequence() const {
return getOpcode() == TargetOpcode::REG_SEQUENCE;
}
bool isBundle() const {
return getOpcode() == TargetOpcode::BUNDLE;
}
bool isCopy() const {
return getOpcode() == TargetOpcode::COPY;
}
bool isFullCopy() const {
return isCopy() && !getOperand(0).getSubReg() && !getOperand(1).getSubReg();
}
bool isExtractSubreg() const {
return getOpcode() == TargetOpcode::EXTRACT_SUBREG;
}
/// Return true if the instruction behaves like a copy.
/// This does not include native copy instructions.
bool isCopyLike() const {
return isCopy() || isSubregToReg();
}
/// Return true is the instruction is an identity copy.
bool isIdentityCopy() const {
return isCopy() && getOperand(0).getReg() == getOperand(1).getReg() &&
getOperand(0).getSubReg() == getOperand(1).getSubReg();
}
/// Return true if this is a transient instruction that is either very likely
/// to be eliminated during register allocation (such as copy-like
/// instructions), or if this instruction doesn't have an execution-time cost.
bool isTransient() const {
switch (getOpcode()) {
default:
return isMetaInstruction();
// Copy-like instructions are usually eliminated during register allocation.
case TargetOpcode::PHI:
case TargetOpcode::G_PHI:
case TargetOpcode::COPY:
case TargetOpcode::INSERT_SUBREG:
case TargetOpcode::SUBREG_TO_REG:
case TargetOpcode::REG_SEQUENCE:
return true;
}
}
/// Return the number of instructions inside the MI bundle, excluding the
/// bundle header.
///
/// This is the number of instructions that MachineBasicBlock::iterator
/// skips, 0 for unbundled instructions.
unsigned getBundleSize() const;
/// Return true if the MachineInstr reads the specified register.
/// If TargetRegisterInfo is passed, then it also checks if there
/// is a read of a super-register.
/// This does not count partial redefines of virtual registers as reads:
/// %reg1024:6 = OP.
bool readsRegister(Register Reg,
const TargetRegisterInfo *TRI = nullptr) const {
return findRegisterUseOperandIdx(Reg, false, TRI) != -1;
}
/// Return true if the MachineInstr reads the specified virtual register.
/// Take into account that a partial define is a
/// read-modify-write operation.
bool readsVirtualRegister(Register Reg) const {
return readsWritesVirtualRegister(Reg).first;
}
/// Return a pair of bools (reads, writes) indicating if this instruction
/// reads or writes Reg. This also considers partial defines.
/// If Ops is not null, all operand indices for Reg are added.
std::pair<bool,bool> readsWritesVirtualRegister(Register Reg,
SmallVectorImpl<unsigned> *Ops = nullptr) const;
/// Return true if the MachineInstr kills the specified register.
/// If TargetRegisterInfo is passed, then it also checks if there is
/// a kill of a super-register.
bool killsRegister(Register Reg,
const TargetRegisterInfo *TRI = nullptr) const {
return findRegisterUseOperandIdx(Reg, true, TRI) != -1;
}
/// Return true if the MachineInstr fully defines the specified register.
/// If TargetRegisterInfo is passed, then it also checks
/// if there is a def of a super-register.
/// NOTE: It's ignoring subreg indices on virtual registers.
bool definesRegister(Register Reg,
const TargetRegisterInfo *TRI = nullptr) const {
return findRegisterDefOperandIdx(Reg, false, false, TRI) != -1;
}
/// Return true if the MachineInstr modifies (fully define or partially
/// define) the specified register.
/// NOTE: It's ignoring subreg indices on virtual registers.
bool modifiesRegister(Register Reg,
const TargetRegisterInfo *TRI = nullptr) const {
return findRegisterDefOperandIdx(Reg, false, true, TRI) != -1;
}
/// Returns true if the register is dead in this machine instruction.
/// If TargetRegisterInfo is passed, then it also checks
/// if there is a dead def of a super-register.
bool registerDefIsDead(Register Reg,
const TargetRegisterInfo *TRI = nullptr) const {
return findRegisterDefOperandIdx(Reg, true, false, TRI) != -1;
}
/// Returns true if the MachineInstr has an implicit-use operand of exactly
/// the given register (not considering sub/super-registers).
bool hasRegisterImplicitUseOperand(Register Reg) const;
/// Returns the operand index that is a use of the specific register or -1
/// if it is not found. It further tightens the search criteria to a use
/// that kills the register if isKill is true.
int findRegisterUseOperandIdx(Register Reg, bool isKill = false,
const TargetRegisterInfo *TRI = nullptr) const;
/// Wrapper for findRegisterUseOperandIdx, it returns
/// a pointer to the MachineOperand rather than an index.
MachineOperand *findRegisterUseOperand(Register Reg, bool isKill = false,
const TargetRegisterInfo *TRI = nullptr) {
int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI);
return (Idx == -1) ? nullptr : &getOperand(Idx);
}
const MachineOperand *findRegisterUseOperand(
Register Reg, bool isKill = false,
const TargetRegisterInfo *TRI = nullptr) const {
return const_cast<MachineInstr *>(this)->
findRegisterUseOperand(Reg, isKill, TRI);
}
/// Returns the operand index that is a def of the specified register or
/// -1 if it is not found. If isDead is true, defs that are not dead are
/// skipped. If Overlap is true, then it also looks for defs that merely
/// overlap the specified register. If TargetRegisterInfo is non-null,
/// then it also checks if there is a def of a super-register.
/// This may also return a register mask operand when Overlap is true.
int findRegisterDefOperandIdx(Register Reg,
bool isDead = false, bool Overlap = false,
const TargetRegisterInfo *TRI = nullptr) const;
/// Wrapper for findRegisterDefOperandIdx, it returns
/// a pointer to the MachineOperand rather than an index.
MachineOperand *
findRegisterDefOperand(Register Reg, bool isDead = false,
bool Overlap = false,
const TargetRegisterInfo *TRI = nullptr) {
int Idx = findRegisterDefOperandIdx(Reg, isDead, Overlap, TRI);
return (Idx == -1) ? nullptr : &getOperand(Idx);
}
const MachineOperand *
findRegisterDefOperand(Register Reg, bool isDead = false,
bool Overlap = false,
const TargetRegisterInfo *TRI = nullptr) const {
return const_cast<MachineInstr *>(this)->findRegisterDefOperand(
Reg, isDead, Overlap, TRI);
}
/// Find the index of the first operand in the
/// operand list that is used to represent the predicate. It returns -1 if
/// none is found.
int findFirstPredOperandIdx() const;
/// Find the index of the flag word operand that
/// corresponds to operand OpIdx on an inline asm instruction. Returns -1 if
/// getOperand(OpIdx) does not belong to an inline asm operand group.
///
/// If GroupNo is not NULL, it will receive the number of the operand group
/// containing OpIdx.
int findInlineAsmFlagIdx(unsigned OpIdx, unsigned *GroupNo = nullptr) const;
/// Compute the static register class constraint for operand OpIdx.
/// For normal instructions, this is derived from the MCInstrDesc.
/// For inline assembly it is derived from the flag words.
///
/// Returns NULL if the static register class constraint cannot be
/// determined.
const TargetRegisterClass*
getRegClassConstraint(unsigned OpIdx,
const TargetInstrInfo *TII,
const TargetRegisterInfo *TRI) const;
/// Applies the constraints (def/use) implied by this MI on \p Reg to
/// the given \p CurRC.
/// If \p ExploreBundle is set and MI is part of a bundle, all the
/// instructions inside the bundle will be taken into account. In other words,
/// this method accumulates all the constraints of the operand of this MI and
/// the related bundle if MI is a bundle or inside a bundle.
///
/// Returns the register class that satisfies both \p CurRC and the
/// constraints set by MI. Returns NULL if such a register class does not
/// exist.
///
/// \pre CurRC must not be NULL.
const TargetRegisterClass *getRegClassConstraintEffectForVReg(
Register Reg, const TargetRegisterClass *CurRC,
const TargetInstrInfo *TII, const TargetRegisterInfo *TRI,
bool ExploreBundle = false) const;
/// Applies the constraints (def/use) implied by the \p OpIdx operand
/// to the given \p CurRC.
///
/// Returns the register class that satisfies both \p CurRC and the
/// constraints set by \p OpIdx MI. Returns NULL if such a register class
/// does not exist.
///
/// \pre CurRC must not be NULL.
/// \pre The operand at \p OpIdx must be a register.
const TargetRegisterClass *
getRegClassConstraintEffect(unsigned OpIdx, const TargetRegisterClass *CurRC,
const TargetInstrInfo *TII,
const TargetRegisterInfo *TRI) const;
/// Add a tie between the register operands at DefIdx and UseIdx.
/// The tie will cause the register allocator to ensure that the two
/// operands are assigned the same physical register.
///
/// Tied operands are managed automatically for explicit operands in the
/// MCInstrDesc. This method is for exceptional cases like inline asm.
void tieOperands(unsigned DefIdx, unsigned UseIdx);
/// Given the index of a tied register operand, find the
/// operand it is tied to. Defs are tied to uses and vice versa. Returns the
/// index of the tied operand which must exist.
unsigned findTiedOperandIdx(unsigned OpIdx) const;
/// Given the index of a register def operand,
/// check if the register def is tied to a source operand, due to either
/// two-address elimination or inline assembly constraints. Returns the
/// first tied use operand index by reference if UseOpIdx is not null.
bool isRegTiedToUseOperand(unsigned DefOpIdx,
unsigned *UseOpIdx = nullptr) const {
const MachineOperand &MO = getOperand(DefOpIdx);
if (!MO.isReg() || !MO.isDef() || !MO.isTied())
return false;
if (UseOpIdx)
*UseOpIdx = findTiedOperandIdx(DefOpIdx);
return true;
}
/// Return true if the use operand of the specified index is tied to a def
/// operand. It also returns the def operand index by reference if DefOpIdx
/// is not null.
bool isRegTiedToDefOperand(unsigned UseOpIdx,
unsigned *DefOpIdx = nullptr) const {
const MachineOperand &MO = getOperand(UseOpIdx);
if (!MO.isReg() || !MO.isUse() || !MO.isTied())
return false;
if (DefOpIdx)
*DefOpIdx = findTiedOperandIdx(UseOpIdx);
return true;
}
/// Clears kill flags on all operands.
void clearKillInfo();
/// Replace all occurrences of FromReg with ToReg:SubIdx,
/// properly composing subreg indices where necessary.
void substituteRegister(Register FromReg, Register ToReg, unsigned SubIdx,
const TargetRegisterInfo &RegInfo);
/// We have determined MI kills a register. Look for the
/// operand that uses it and mark it as IsKill. If AddIfNotFound is true,
/// add a implicit operand if it's not found. Returns true if the operand
/// exists / is added.
bool addRegisterKilled(Register IncomingReg,
const TargetRegisterInfo *RegInfo,
bool AddIfNotFound = false);
/// Clear all kill flags affecting Reg. If RegInfo is provided, this includes
/// all aliasing registers.
void clearRegisterKills(Register Reg, const TargetRegisterInfo *RegInfo);
/// We have determined MI defined a register without a use.
/// Look for the operand that defines it and mark it as IsDead. If
/// AddIfNotFound is true, add a implicit operand if it's not found. Returns
/// true if the operand exists / is added.
bool addRegisterDead(Register Reg, const TargetRegisterInfo *RegInfo,
bool AddIfNotFound = false);
/// Clear all dead flags on operands defining register @p Reg.
void clearRegisterDeads(Register Reg);
/// Mark all subregister defs of register @p Reg with the undef flag.
/// This function is used when we determined to have a subregister def in an
/// otherwise undefined super register.
void setRegisterDefReadUndef(Register Reg, bool IsUndef = true);
/// We have determined MI defines a register. Make sure there is an operand
/// defining Reg.
void addRegisterDefined(Register Reg,
const TargetRegisterInfo *RegInfo = nullptr);
/// Mark every physreg used by this instruction as
/// dead except those in the UsedRegs list.
///
/// On instructions with register mask operands, also add implicit-def
/// operands for all registers in UsedRegs.
void setPhysRegsDeadExcept(ArrayRef<Register> UsedRegs,
const TargetRegisterInfo &TRI);
/// Return true if it is safe to move this instruction. If
/// SawStore is set to true, it means that there is a store (or call) between
/// the instruction's location and its intended destination.
bool isSafeToMove(AAResults *AA, bool &SawStore) const;
/// Returns true if this instruction's memory access aliases the memory
/// access of Other.
//
/// Assumes any physical registers used to compute addresses
/// have the same value for both instructions. Returns false if neither
/// instruction writes to memory.
///
/// @param AA Optional alias analysis, used to compare memory operands.
/// @param Other MachineInstr to check aliasing against.
/// @param UseTBAA Whether to pass TBAA information to alias analysis.
bool mayAlias(AAResults *AA, const MachineInstr &Other, bool UseTBAA) const;
/// Return true if this instruction may have an ordered
/// or volatile memory reference, or if the information describing the memory
/// reference is not available. Return false if it is known to have no
/// ordered or volatile memory references.
bool hasOrderedMemoryRef() const;
/// Return true if this load instruction never traps and points to a memory
/// location whose value doesn't change during the execution of this function.
///
/// Examples include loading a value from the constant pool or from the
/// argument area of a function (if it does not change). If the instruction
/// does multiple loads, this returns true only if all of the loads are
/// dereferenceable and invariant.
bool isDereferenceableInvariantLoad() const;
/// If the specified instruction is a PHI that always merges together the
/// same virtual register, return the register, otherwise return 0.
unsigned isConstantValuePHI() const;
/// Return true if this instruction has side effects that are not modeled
/// by mayLoad / mayStore, etc.
/// For all instructions, the property is encoded in MCInstrDesc::Flags
/// (see MCInstrDesc::hasUnmodeledSideEffects(). The only exception is
/// INLINEASM instruction, in which case the side effect property is encoded
/// in one of its operands (see InlineAsm::Extra_HasSideEffect).
///
bool hasUnmodeledSideEffects() const;
/// Returns true if it is illegal to fold a load across this instruction.
bool isLoadFoldBarrier() const;
/// Return true if all the defs of this instruction are dead.
bool allDefsAreDead() const;
/// Return a valid size if the instruction is a spill instruction.
std::optional<unsigned> getSpillSize(const TargetInstrInfo *TII) const;
/// Return a valid size if the instruction is a folded spill instruction.
std::optional<unsigned> getFoldedSpillSize(const TargetInstrInfo *TII) const;
/// Return a valid size if the instruction is a restore instruction.
std::optional<unsigned> getRestoreSize(const TargetInstrInfo *TII) const;
/// Return a valid size if the instruction is a folded restore instruction.
std::optional<unsigned>
getFoldedRestoreSize(const TargetInstrInfo *TII) const;
/// Copy implicit register operands from specified
/// instruction to this instruction.
void copyImplicitOps(MachineFunction &MF, const MachineInstr &MI);
/// Debugging support
/// @{
/// Determine the generic type to be printed (if needed) on uses and defs.
LLT getTypeToPrint(unsigned OpIdx, SmallBitVector &PrintedTypes,
const MachineRegisterInfo &MRI) const;
/// Return true when an instruction has tied register that can't be determined
/// by the instruction's descriptor. This is useful for MIR printing, to
/// determine whether we need to print the ties or not.
bool hasComplexRegisterTies() const;
/// Print this MI to \p OS.
/// Don't print information that can be inferred from other instructions if
/// \p IsStandalone is false. It is usually true when only a fragment of the
/// function is printed.
/// Only print the defs and the opcode if \p SkipOpers is true.
/// Otherwise, also print operands if \p SkipDebugLoc is true.
/// Otherwise, also print the debug loc, with a terminating newline.
/// \p TII is used to print the opcode name. If it's not present, but the
/// MI is in a function, the opcode will be printed using the function's TII.
void print(raw_ostream &OS, bool IsStandalone = true, bool SkipOpers = false,
bool SkipDebugLoc = false, bool AddNewLine = true,
const TargetInstrInfo *TII = nullptr) const;
void print(raw_ostream &OS, ModuleSlotTracker &MST, bool IsStandalone = true,
bool SkipOpers = false, bool SkipDebugLoc = false,
bool AddNewLine = true,
const TargetInstrInfo *TII = nullptr) const;
void dump() const;
/// Print on dbgs() the current instruction and the instructions defining its
/// operands and so on until we reach \p MaxDepth.
void dumpr(const MachineRegisterInfo &MRI,
unsigned MaxDepth = UINT_MAX) const;
/// @}
//===--------------------------------------------------------------------===//
// Accessors used to build up machine instructions.
/// Add the specified operand to the instruction. If it is an implicit
/// operand, it is added to the end of the operand list. If it is an
/// explicit operand it is added at the end of the explicit operand list
/// (before the first implicit operand).
///
/// MF must be the machine function that was used to allocate this
/// instruction.
///
/// MachineInstrBuilder provides a more convenient interface for creating
/// instructions and adding operands.
void addOperand(MachineFunction &MF, const MachineOperand &Op);
/// Add an operand without providing an MF reference. This only works for
/// instructions that are inserted in a basic block.
///
/// MachineInstrBuilder and the two-argument addOperand(MF, MO) should be
/// preferred.
void addOperand(const MachineOperand &Op);
/// Replace the instruction descriptor (thus opcode) of
/// the current instruction with a new one.
void setDesc(const MCInstrDesc &TID) { MCID = &TID; }
/// Replace current source information with new such.
/// Avoid using this, the constructor argument is preferable.
void setDebugLoc(DebugLoc DL) {
DbgLoc = std::move(DL);
assert(DbgLoc.hasTrivialDestructor() && "Expected trivial destructor");
}
/// Erase an operand from an instruction, leaving it with one
/// fewer operand than it started with.
void removeOperand(unsigned OpNo);
/// Clear this MachineInstr's memory reference descriptor list. This resets
/// the memrefs to their most conservative state. This should be used only
/// as a last resort since it greatly pessimizes our knowledge of the memory
/// access performed by the instruction.
void dropMemRefs(MachineFunction &MF);
/// Assign this MachineInstr's memory reference descriptor list.
///
/// Unlike other methods, this *will* allocate them into a new array
/// associated with the provided `MachineFunction`.
void setMemRefs(MachineFunction &MF, ArrayRef<MachineMemOperand *> MemRefs);
/// Add a MachineMemOperand to the machine instruction.
/// This function should be used only occasionally. The setMemRefs function
/// is the primary method for setting up a MachineInstr's MemRefs list.
void addMemOperand(MachineFunction &MF, MachineMemOperand *MO);
/// Clone another MachineInstr's memory reference descriptor list and replace
/// ours with it.
///
/// Note that `*this` may be the incoming MI!
///
/// Prefer this API whenever possible as it can avoid allocations in common
/// cases.
void cloneMemRefs(MachineFunction &MF, const MachineInstr &MI);
/// Clone the merge of multiple MachineInstrs' memory reference descriptors
/// list and replace ours with it.
///
/// Note that `*this` may be one of the incoming MIs!
///
/// Prefer this API whenever possible as it can avoid allocations in common
/// cases.
void cloneMergedMemRefs(MachineFunction &MF,
ArrayRef<const MachineInstr *> MIs);
/// Set a symbol that will be emitted just prior to the instruction itself.
///
/// Setting this to a null pointer will remove any such symbol.
///
/// FIXME: This is not fully implemented yet.
void setPreInstrSymbol(MachineFunction &MF, MCSymbol *Symbol);
/// Set a symbol that will be emitted just after the instruction itself.
///
/// Setting this to a null pointer will remove any such symbol.
///
/// FIXME: This is not fully implemented yet.
void setPostInstrSymbol(MachineFunction &MF, MCSymbol *Symbol);
/// Clone another MachineInstr's pre- and post- instruction symbols and
/// replace ours with it.
void cloneInstrSymbols(MachineFunction &MF, const MachineInstr &MI);
/// Set a marker on instructions that denotes where we should create and emit
/// heap alloc site labels. This waits until after instruction selection and
/// optimizations to create the label, so it should still work if the
/// instruction is removed or duplicated.
void setHeapAllocMarker(MachineFunction &MF, MDNode *MD);
// Set metadata on instructions that say which sections to emit instruction
// addresses into.
void setPCSections(MachineFunction &MF, MDNode *MD);
/// Set the CFI type for the instruction.
void setCFIType(MachineFunction &MF, uint32_t Type);
/// Return the MIFlags which represent both MachineInstrs. This
/// should be used when merging two MachineInstrs into one. This routine does
/// not modify the MIFlags of this MachineInstr.
uint32_t mergeFlagsWith(const MachineInstr& Other) const;
static uint32_t copyFlagsFromInstruction(const Instruction &I);
/// Copy all flags to MachineInst MIFlags
void copyIRFlags(const Instruction &I);
/// Break any tie involving OpIdx.
void untieRegOperand(unsigned OpIdx) {
MachineOperand &MO = getOperand(OpIdx);
if (MO.isReg() && MO.isTied()) {
getOperand(findTiedOperandIdx(OpIdx)).TiedTo = 0;
MO.TiedTo = 0;
}
}
/// Add all implicit def and use operands to this instruction.
void addImplicitDefUseOperands(MachineFunction &MF);
/// Scan instructions immediately following MI and collect any matching
/// DBG_VALUEs.
void collectDebugValues(SmallVectorImpl<MachineInstr *> &DbgValues);
/// Find all DBG_VALUEs that point to the register def in this instruction
/// and point them to \p Reg instead.
void changeDebugValuesDefReg(Register Reg);
/// Returns the Intrinsic::ID for this instruction.
/// \pre Must have an intrinsic ID operand.
unsigned getIntrinsicID() const {
return getOperand(getNumExplicitDefs()).getIntrinsicID();
}
/// Sets all register debug operands in this debug value instruction to be
/// undef.
void setDebugValueUndef() {
assert(isDebugValue() && "Must be a debug value instruction.");
for (MachineOperand &MO : debug_operands()) {
if (MO.isReg()) {
MO.setReg(0);
MO.setSubReg(0);
}
}
}
std::tuple<Register, Register> getFirst2Regs() const {
return std::tuple(getOperand(0).getReg(), getOperand(1).getReg());
}
std::tuple<Register, Register, Register> getFirst3Regs() const {
return std::tuple(getOperand(0).getReg(), getOperand(1).getReg(),
getOperand(2).getReg());
}
std::tuple<Register, Register, Register, Register> getFirst4Regs() const {
return std::tuple(getOperand(0).getReg(), getOperand(1).getReg(),
getOperand(2).getReg(), getOperand(3).getReg());
}
std::tuple<Register, Register, Register, Register, Register>
getFirst5Regs() const {
return std::tuple(getOperand(0).getReg(), getOperand(1).getReg(),
getOperand(2).getReg(), getOperand(3).getReg(),
getOperand(4).getReg());
}
std::tuple<LLT, LLT> getFirst2LLTs() const;
std::tuple<LLT, LLT, LLT> getFirst3LLTs() const;
std::tuple<LLT, LLT, LLT, LLT> getFirst4LLTs() const;
std::tuple<LLT, LLT, LLT, LLT, LLT> getFirst5LLTs() const;
std::tuple<Register, LLT, Register, LLT> getFirst2RegLLTs() const;
std::tuple<Register, LLT, Register, LLT, Register, LLT>
getFirst3RegLLTs() const;
std::tuple<Register, LLT, Register, LLT, Register, LLT, Register, LLT>
getFirst4RegLLTs() const;
std::tuple<Register, LLT, Register, LLT, Register, LLT, Register, LLT,
Register, LLT>
getFirst5RegLLTs() const;
private:
/// If this instruction is embedded into a MachineFunction, return the
/// MachineRegisterInfo object for the current function, otherwise
/// return null.
MachineRegisterInfo *getRegInfo();
const MachineRegisterInfo *getRegInfo() const;
/// Unlink all of the register operands in this instruction from their
/// respective use lists. This requires that the operands already be on their
/// use lists.
void removeRegOperandsFromUseLists(MachineRegisterInfo&);
/// Add all of the register operands in this instruction from their
/// respective use lists. This requires that the operands not be on their
/// use lists yet.
void addRegOperandsToUseLists(MachineRegisterInfo&);
/// Slow path for hasProperty when we're dealing with a bundle.
bool hasPropertyInBundle(uint64_t Mask, QueryType Type) const;
/// Implements the logic of getRegClassConstraintEffectForVReg for the
/// this MI and the given operand index \p OpIdx.
/// If the related operand does not constrained Reg, this returns CurRC.
const TargetRegisterClass *getRegClassConstraintEffectForVRegImpl(
unsigned OpIdx, Register Reg, const TargetRegisterClass *CurRC,
const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const;
/// Stores extra instruction information inline or allocates as ExtraInfo
/// based on the number of pointers.
void setExtraInfo(MachineFunction &MF, ArrayRef<MachineMemOperand *> MMOs,
MCSymbol *PreInstrSymbol, MCSymbol *PostInstrSymbol,
MDNode *HeapAllocMarker, MDNode *PCSections,
uint32_t CFIType);
};
/// Special DenseMapInfo traits to compare MachineInstr* by *value* of the
/// instruction rather than by pointer value.
/// The hashing and equality testing functions ignore definitions so this is
/// useful for CSE, etc.
struct MachineInstrExpressionTrait : DenseMapInfo<MachineInstr*> {
static inline MachineInstr *getEmptyKey() {
return nullptr;
}
static inline MachineInstr *getTombstoneKey() {
return reinterpret_cast<MachineInstr*>(-1);
}
static unsigned getHashValue(const MachineInstr* const &MI);
static bool isEqual(const MachineInstr* const &LHS,
const MachineInstr* const &RHS) {
if (RHS == getEmptyKey() || RHS == getTombstoneKey() ||
LHS == getEmptyKey() || LHS == getTombstoneKey())
return LHS == RHS;
return LHS->isIdenticalTo(*RHS, MachineInstr::IgnoreVRegDefs);
}
};
//===----------------------------------------------------------------------===//
// Debugging Support
inline raw_ostream& operator<<(raw_ostream &OS, const MachineInstr &MI) {
MI.print(OS);
return OS;
}
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINEINSTR_H
PK iwFZ��h
)
) CodeGen/LiveRangeEdit.hnu �[��� //===- LiveRangeEdit.h - Basic tools for split and spill --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// The LiveRangeEdit class represents changes done to a virtual register when it
// is spilled or split.
//
// The parent register is never changed. Instead, a number of new virtual
// registers are created and added to the newRegs vector.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LIVERANGEEDIT_H
#define LLVM_CODEGEN_LIVERANGEEDIT_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SlotIndexes.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include <cassert>
namespace llvm {
class LiveIntervals;
class MachineInstr;
class MachineOperand;
class TargetInstrInfo;
class TargetRegisterInfo;
class VirtRegMap;
class VirtRegAuxInfo;
class LiveRangeEdit : private MachineRegisterInfo::Delegate {
public:
/// Callback methods for LiveRangeEdit owners.
class Delegate {
virtual void anchor();
public:
virtual ~Delegate() = default;
/// Called immediately before erasing a dead machine instruction.
virtual void LRE_WillEraseInstruction(MachineInstr *MI) {}
/// Called when a virtual register is no longer used. Return false to defer
/// its deletion from LiveIntervals.
virtual bool LRE_CanEraseVirtReg(Register) { return true; }
/// Called before shrinking the live range of a virtual register.
virtual void LRE_WillShrinkVirtReg(Register) {}
/// Called after cloning a virtual register.
/// This is used for new registers representing connected components of Old.
virtual void LRE_DidCloneVirtReg(Register New, Register Old) {}
};
private:
const LiveInterval *const Parent;
SmallVectorImpl<Register> &NewRegs;
MachineRegisterInfo &MRI;
LiveIntervals &LIS;
VirtRegMap *VRM;
const TargetInstrInfo &TII;
Delegate *const TheDelegate;
/// FirstNew - Index of the first register added to NewRegs.
const unsigned FirstNew;
/// ScannedRemattable - true when remattable values have been identified.
bool ScannedRemattable = false;
/// DeadRemats - The saved instructions which have already been dead after
/// rematerialization but not deleted yet -- to be done in postOptimization.
SmallPtrSet<MachineInstr *, 32> *DeadRemats;
/// Remattable - Values defined by remattable instructions as identified by
/// tii.isTriviallyReMaterializable().
SmallPtrSet<const VNInfo *, 4> Remattable;
/// Rematted - Values that were actually rematted, and so need to have their
/// live range trimmed or entirely removed.
SmallPtrSet<const VNInfo *, 4> Rematted;
/// scanRemattable - Identify the Parent values that may rematerialize.
void scanRemattable();
/// foldAsLoad - If LI has a single use and a single def that can be folded as
/// a load, eliminate the register by folding the def into the use.
bool foldAsLoad(LiveInterval *LI, SmallVectorImpl<MachineInstr *> &Dead);
using ToShrinkSet = SmallSetVector<LiveInterval *, 8>;
/// Helper for eliminateDeadDefs.
void eliminateDeadDef(MachineInstr *MI, ToShrinkSet &ToShrink);
/// MachineRegisterInfo callback to notify when new virtual
/// registers are created.
void MRI_NoteNewVirtualRegister(Register VReg) override;
/// Check if MachineOperand \p MO is a last use/kill either in the
/// main live range of \p LI or in one of the matching subregister ranges.
bool useIsKill(const LiveInterval &LI, const MachineOperand &MO) const;
/// Create a new empty interval based on OldReg.
LiveInterval &createEmptyIntervalFrom(Register OldReg, bool createSubRanges);
public:
/// Create a LiveRangeEdit for breaking down parent into smaller pieces.
/// @param parent The register being spilled or split.
/// @param newRegs List to receive any new registers created. This needn't be
/// empty initially, any existing registers are ignored.
/// @param MF The MachineFunction the live range edit is taking place in.
/// @param lis The collection of all live intervals in this function.
/// @param vrm Map of virtual registers to physical registers for this
/// function. If NULL, no virtual register map updates will
/// be done. This could be the case if called before Regalloc.
/// @param deadRemats The collection of all the instructions defining an
/// original reg and are dead after remat.
LiveRangeEdit(const LiveInterval *parent, SmallVectorImpl<Register> &newRegs,
MachineFunction &MF, LiveIntervals &lis, VirtRegMap *vrm,
Delegate *delegate = nullptr,
SmallPtrSet<MachineInstr *, 32> *deadRemats = nullptr)
: Parent(parent), NewRegs(newRegs), MRI(MF.getRegInfo()), LIS(lis),
VRM(vrm), TII(*MF.getSubtarget().getInstrInfo()), TheDelegate(delegate),
FirstNew(newRegs.size()), DeadRemats(deadRemats) {
MRI.addDelegate(this);
}
~LiveRangeEdit() override { MRI.resetDelegate(this); }
const LiveInterval &getParent() const {
assert(Parent && "No parent LiveInterval");
return *Parent;
}
Register getReg() const { return getParent().reg(); }
/// Iterator for accessing the new registers added by this edit.
using iterator = SmallVectorImpl<Register>::const_iterator;
iterator begin() const { return NewRegs.begin() + FirstNew; }
iterator end() const { return NewRegs.end(); }
unsigned size() const { return NewRegs.size() - FirstNew; }
bool empty() const { return size() == 0; }
Register get(unsigned idx) const { return NewRegs[idx + FirstNew]; }
/// pop_back - It allows LiveRangeEdit users to drop new registers.
/// The context is when an original def instruction of a register is
/// dead after rematerialization, we still want to keep it for following
/// rematerializations. We save the def instruction in DeadRemats,
/// and replace the original dst register with a new dummy register so
/// the live range of original dst register can be shrinked normally.
/// We don't want to allocate phys register for the dummy register, so
/// we want to drop it from the NewRegs set.
void pop_back() { NewRegs.pop_back(); }
ArrayRef<Register> regs() const { return ArrayRef(NewRegs).slice(FirstNew); }
/// createFrom - Create a new virtual register based on OldReg.
Register createFrom(Register OldReg);
/// create - Create a new register with the same class and original slot as
/// parent.
LiveInterval &createEmptyInterval() {
return createEmptyIntervalFrom(getReg(), true);
}
Register create() { return createFrom(getReg()); }
/// anyRematerializable - Return true if any parent values may be
/// rematerializable.
/// This function must be called before any rematerialization is attempted.
bool anyRematerializable();
/// checkRematerializable - Manually add VNI to the list of rematerializable
/// values if DefMI may be rematerializable.
bool checkRematerializable(VNInfo *VNI, const MachineInstr *DefMI);
/// Remat - Information needed to rematerialize at a specific location.
struct Remat {
const VNInfo *const ParentVNI; // parent_'s value at the remat location.
MachineInstr *OrigMI = nullptr; // Instruction defining OrigVNI. It contains
// the real expr for remat.
explicit Remat(const VNInfo *ParentVNI) : ParentVNI(ParentVNI) {}
};
/// allUsesAvailableAt - Return true if all registers used by OrigMI at
/// OrigIdx are also available with the same value at UseIdx.
bool allUsesAvailableAt(const MachineInstr *OrigMI, SlotIndex OrigIdx,
SlotIndex UseIdx) const;
/// canRematerializeAt - Determine if ParentVNI can be rematerialized at
/// UseIdx. It is assumed that parent_.getVNINfoAt(UseIdx) == ParentVNI.
/// When cheapAsAMove is set, only cheap remats are allowed.
bool canRematerializeAt(Remat &RM, VNInfo *OrigVNI, SlotIndex UseIdx,
bool cheapAsAMove);
/// rematerializeAt - Rematerialize RM.ParentVNI into DestReg by inserting an
/// instruction into MBB before MI. The new instruction is mapped, but
/// liveness is not updated. If ReplaceIndexMI is not null it will be replaced
/// by new MI in the index map.
/// Return the SlotIndex of the new instruction.
SlotIndex rematerializeAt(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, Register DestReg,
const Remat &RM, const TargetRegisterInfo &,
bool Late = false, unsigned SubIdx = 0,
MachineInstr *ReplaceIndexMI = nullptr);
/// markRematerialized - explicitly mark a value as rematerialized after doing
/// it manually.
void markRematerialized(const VNInfo *ParentVNI) {
Rematted.insert(ParentVNI);
}
/// didRematerialize - Return true if ParentVNI was rematerialized anywhere.
bool didRematerialize(const VNInfo *ParentVNI) const {
return Rematted.count(ParentVNI);
}
/// eraseVirtReg - Notify the delegate that Reg is no longer in use, and try
/// to erase it from LIS.
void eraseVirtReg(Register Reg);
/// eliminateDeadDefs - Try to delete machine instructions that are now dead
/// (allDefsAreDead returns true). This may cause live intervals to be trimmed
/// and further dead efs to be eliminated.
/// RegsBeingSpilled lists registers currently being spilled by the register
/// allocator. These registers should not be split into new intervals
/// as currently those new intervals are not guaranteed to spill.
void eliminateDeadDefs(SmallVectorImpl<MachineInstr *> &Dead,
ArrayRef<Register> RegsBeingSpilled = std::nullopt);
/// calculateRegClassAndHint - Recompute register class and hint for each new
/// register.
void calculateRegClassAndHint(MachineFunction &, VirtRegAuxInfo &);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_LIVERANGEEDIT_H
PK iwFZ7pE�: : CodeGen/RegisterBank.hnu �[��� //==-- llvm/CodeGen/RegisterBank.h - Register Bank ---------------*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file This file declares the API of register banks.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_REGISTERBANK_H
#define LLVM_CODEGEN_REGISTERBANK_H
#include "llvm/ADT/BitVector.h"
namespace llvm {
// Forward declarations.
class RegisterBankInfo;
class raw_ostream;
class TargetRegisterClass;
class TargetRegisterInfo;
/// This class implements the register bank concept.
/// Two instances of RegisterBank must have different ID.
/// This property is enforced by the RegisterBankInfo class.
class RegisterBank {
private:
unsigned ID;
const char *Name;
BitVector ContainedRegClasses;
/// Sentinel value used to recognize register bank not properly
/// initialized yet.
static const unsigned InvalidID;
/// Only the RegisterBankInfo can initialize RegisterBank properly.
friend RegisterBankInfo;
public:
RegisterBank(unsigned ID, const char *Name, const uint32_t *CoveredClasses,
unsigned NumRegClasses);
/// Get the identifier of this register bank.
unsigned getID() const { return ID; }
/// Get a user friendly name of this register bank.
/// Should be used only for debugging purposes.
const char *getName() const { return Name; }
/// Check whether this instance is ready to be used.
bool isValid() const;
/// Check if this register bank is valid. In other words,
/// if it has been properly constructed.
///
/// \note This method does not check anything when assertions are disabled.
///
/// \return True is the check was successful.
bool verify(const RegisterBankInfo &RBI, const TargetRegisterInfo &TRI) const;
/// Check whether this register bank covers \p RC.
/// In other words, check if this register bank fully covers
/// the registers that \p RC contains.
/// \pre isValid()
bool covers(const TargetRegisterClass &RC) const;
/// Check whether \p OtherRB is the same as this.
bool operator==(const RegisterBank &OtherRB) const;
bool operator!=(const RegisterBank &OtherRB) const {
return !this->operator==(OtherRB);
}
/// Dump the register mask on dbgs() stream.
/// The dump is verbose.
void dump(const TargetRegisterInfo *TRI = nullptr) const;
/// Print the register mask on OS.
/// If IsForDebug is false, then only the name of the register bank
/// is printed. Otherwise, all the fields are printing.
/// TRI is then used to print the name of the register classes that
/// this register bank covers.
void print(raw_ostream &OS, bool IsForDebug = false,
const TargetRegisterInfo *TRI = nullptr) const;
};
inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
RegBank.print(OS);
return OS;
}
} // End namespace llvm.
#endif
PK iwFZ��� CodeGen/SchedulerRegistry.hnu �[��� //===- llvm/CodeGen/SchedulerRegistry.h -------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the implementation for instruction scheduler function
// pass registry (RegisterScheduler).
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_SCHEDULERREGISTRY_H
#define LLVM_CODEGEN_SCHEDULERREGISTRY_H
#include "llvm/CodeGen/MachinePassRegistry.h"
#include "llvm/Support/CodeGen.h"
namespace llvm {
//===----------------------------------------------------------------------===//
///
/// RegisterScheduler class - Track the registration of instruction schedulers.
///
//===----------------------------------------------------------------------===//
class ScheduleDAGSDNodes;
class SelectionDAGISel;
class RegisterScheduler
: public MachinePassRegistryNode<
ScheduleDAGSDNodes *(*)(SelectionDAGISel *, CodeGenOpt::Level)> {
public:
using FunctionPassCtor = ScheduleDAGSDNodes *(*)(SelectionDAGISel*,
CodeGenOpt::Level);
static MachinePassRegistry<FunctionPassCtor> Registry;
RegisterScheduler(const char *N, const char *D, FunctionPassCtor C)
: MachinePassRegistryNode(N, D, C) {
Registry.Add(this);
}
~RegisterScheduler() { Registry.Remove(this); }
// Accessors.
RegisterScheduler *getNext() const {
return (RegisterScheduler *)MachinePassRegistryNode::getNext();
}
static RegisterScheduler *getList() {
return (RegisterScheduler *)Registry.getList();
}
static void setListener(MachinePassRegistryListener<FunctionPassCtor> *L) {
Registry.setListener(L);
}
};
/// createBURRListDAGScheduler - This creates a bottom up register usage
/// reduction list scheduler.
ScheduleDAGSDNodes *createBURRListDAGScheduler(SelectionDAGISel *IS,
CodeGenOpt::Level OptLevel);
/// createBURRListDAGScheduler - This creates a bottom up list scheduler that
/// schedules nodes in source code order when possible.
ScheduleDAGSDNodes *createSourceListDAGScheduler(SelectionDAGISel *IS,
CodeGenOpt::Level OptLevel);
/// createHybridListDAGScheduler - This creates a bottom up register pressure
/// aware list scheduler that make use of latency information to avoid stalls
/// for long latency instructions in low register pressure mode. In high
/// register pressure mode it schedules to reduce register pressure.
ScheduleDAGSDNodes *createHybridListDAGScheduler(SelectionDAGISel *IS,
CodeGenOpt::Level);
/// createILPListDAGScheduler - This creates a bottom up register pressure
/// aware list scheduler that tries to increase instruction level parallelism
/// in low register pressure mode. In high register pressure mode it schedules
/// to reduce register pressure.
ScheduleDAGSDNodes *createILPListDAGScheduler(SelectionDAGISel *IS,
CodeGenOpt::Level);
/// createFastDAGScheduler - This creates a "fast" scheduler.
///
ScheduleDAGSDNodes *createFastDAGScheduler(SelectionDAGISel *IS,
CodeGenOpt::Level OptLevel);
/// createVLIWDAGScheduler - Scheduler for VLIW targets. This creates top down
/// DFA driven list scheduler with clustering heuristic to control
/// register pressure.
ScheduleDAGSDNodes *createVLIWDAGScheduler(SelectionDAGISel *IS,
CodeGenOpt::Level OptLevel);
/// createDefaultScheduler - This creates an instruction scheduler appropriate
/// for the target.
ScheduleDAGSDNodes *createDefaultScheduler(SelectionDAGISel *IS,
CodeGenOpt::Level OptLevel);
/// createDAGLinearizer - This creates a "no-scheduling" scheduler which
/// linearize the DAG using topological order.
ScheduleDAGSDNodes *createDAGLinearizer(SelectionDAGISel *IS,
CodeGenOpt::Level OptLevel);
} // end namespace llvm
#endif // LLVM_CODEGEN_SCHEDULERREGISTRY_H
PK iwFZ1=3& ) CodeGen/BasicBlockSectionsProfileReader.hnu �[��� //===-- BasicBlockSectionsProfileReader.h - BB sections profile reader pass ==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This pass creates the basic block cluster info by reading the basic block
// sections profile. The cluster info will be used by the basic-block-sections
// pass to arrange basic blocks in their sections.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_BASICBLOCKSECTIONSPROFILEREADER_H
#define LLVM_CODEGEN_BASICBLOCKSECTIONSPROFILEREADER_H
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/IR/Module.h"
#include "llvm/InitializePasses.h"
#include "llvm/Pass.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/LineIterator.h"
#include "llvm/Support/MemoryBuffer.h"
using namespace llvm;
namespace llvm {
// The cluster information for a machine basic block.
struct BBClusterInfo {
// Unique ID for this basic block.
unsigned BBID;
// Cluster ID this basic block belongs to.
unsigned ClusterID;
// Position of basic block within the cluster.
unsigned PositionInCluster;
};
using ProgramBBClusterInfoMapTy = StringMap<SmallVector<BBClusterInfo>>;
class BasicBlockSectionsProfileReader : public ImmutablePass {
public:
static char ID;
BasicBlockSectionsProfileReader(const MemoryBuffer *Buf)
: ImmutablePass(ID), MBuf(Buf) {
initializeBasicBlockSectionsProfileReaderPass(
*PassRegistry::getPassRegistry());
};
BasicBlockSectionsProfileReader() : ImmutablePass(ID) {
initializeBasicBlockSectionsProfileReaderPass(
*PassRegistry::getPassRegistry());
}
StringRef getPassName() const override {
return "Basic Block Sections Profile Reader";
}
// Returns true if basic block sections profile exist for function \p
// FuncName.
bool isFunctionHot(StringRef FuncName) const;
// Returns a pair with first element representing whether basic block sections
// profile exist for the function \p FuncName, and the second element
// representing the basic block sections profile (cluster info) for this
// function. If the first element is true and the second element is empty, it
// means unique basic block sections are desired for all basic blocks of the
// function.
std::pair<bool, SmallVector<BBClusterInfo>>
getBBClusterInfoForFunction(StringRef FuncName) const;
// Initializes the FunctionNameToDIFilename map for the current module and
// then reads the profile for matching functions.
bool doInitialization(Module &M) override;
private:
StringRef getAliasName(StringRef FuncName) const {
auto R = FuncAliasMap.find(FuncName);
return R == FuncAliasMap.end() ? FuncName : R->second;
}
// Reads the basic block sections profile for functions in this module.
Error ReadProfile();
// This contains the basic-block-sections profile.
const MemoryBuffer *MBuf = nullptr;
// Map from every function name in the module to its debug info filename or
// empty string if no debug info is available.
StringMap<SmallString<128>> FunctionNameToDIFilename;
// This encapsulates the BB cluster information for the whole program.
//
// For every function name, it contains the cluster information for (all or
// some of) its basic blocks. The cluster information for every basic block
// includes its cluster ID along with the position of the basic block in that
// cluster.
ProgramBBClusterInfoMapTy ProgramBBClusterInfo;
// Some functions have alias names. We use this map to find the main alias
// name for which we have mapping in ProgramBBClusterInfo.
StringMap<StringRef> FuncAliasMap;
};
// Creates a BasicBlockSectionsProfileReader pass to parse the basic block
// sections profile. \p Buf is a memory buffer that contains the list of
// functions and basic block ids to selectively enable basic block sections.
ImmutablePass *
createBasicBlockSectionsProfileReaderPass(const MemoryBuffer *Buf);
} // namespace llvm
#endif // LLVM_CODEGEN_BASICBLOCKSECTIONSPROFILEREADER_H
PK iwFZ�
d 6 6 $ CodeGen/ScoreboardHazardRecognizer.hnu �[��� //=- llvm/CodeGen/ScoreboardHazardRecognizer.h - Schedule Support -*- C++ -*-=//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the ScoreboardHazardRecognizer class, which
// encapsulates hazard-avoidance heuristics for scheduling, based on the
// scheduling itineraries specified for the target.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_SCOREBOARDHAZARDRECOGNIZER_H
#define LLVM_CODEGEN_SCOREBOARDHAZARDRECOGNIZER_H
#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
#include "llvm/MC/MCInstrItineraries.h"
#include <cassert>
#include <cstddef>
#include <cstring>
namespace llvm {
class ScheduleDAG;
class SUnit;
class ScoreboardHazardRecognizer : public ScheduleHazardRecognizer {
// Scoreboard to track function unit usage. Scoreboard[0] is a
// mask of the FUs in use in the cycle currently being
// schedule. Scoreboard[1] is a mask for the next cycle. The
// Scoreboard is used as a circular buffer with the current cycle
// indicated by Head.
//
// Scoreboard always counts cycles in forward execution order. If used by a
// bottom-up scheduler, then the scoreboard cycles are the inverse of the
// scheduler's cycles.
class Scoreboard {
InstrStage::FuncUnits *Data = nullptr;
// The maximum number of cycles monitored by the Scoreboard. This
// value is determined based on the target itineraries to ensure
// that all hazards can be tracked.
size_t Depth = 0;
// Indices into the Scoreboard that represent the current cycle.
size_t Head = 0;
public:
Scoreboard() = default;
Scoreboard &operator=(const Scoreboard &other) = delete;
Scoreboard(const Scoreboard &other) = delete;
~Scoreboard() {
delete[] Data;
}
size_t getDepth() const { return Depth; }
InstrStage::FuncUnits& operator[](size_t idx) const {
// Depth is expected to be a power-of-2.
assert(Depth && !(Depth & (Depth - 1)) &&
"Scoreboard was not initialized properly!");
return Data[(Head + idx) & (Depth-1)];
}
void reset(size_t d = 1) {
if (!Data) {
Depth = d;
Data = new InstrStage::FuncUnits[Depth];
}
memset(Data, 0, Depth * sizeof(Data[0]));
Head = 0;
}
void advance() {
Head = (Head + 1) & (Depth-1);
}
void recede() {
Head = (Head - 1) & (Depth-1);
}
// Print the scoreboard.
void dump() const;
};
// Support for tracing ScoreboardHazardRecognizer as a component within
// another module.
const char *DebugType;
// Itinerary data for the target.
const InstrItineraryData *ItinData;
const ScheduleDAG *DAG;
/// IssueWidth - Max issue per cycle. 0=Unknown.
unsigned IssueWidth = 0;
/// IssueCount - Count instructions issued in this cycle.
unsigned IssueCount = 0;
Scoreboard ReservedScoreboard;
Scoreboard RequiredScoreboard;
public:
ScoreboardHazardRecognizer(const InstrItineraryData *II,
const ScheduleDAG *DAG,
const char *ParentDebugType = "");
/// atIssueLimit - Return true if no more instructions may be issued in this
/// cycle.
bool atIssueLimit() const override;
// Stalls provides an cycle offset at which SU will be scheduled. It will be
// negative for bottom-up scheduling.
HazardType getHazardType(SUnit *SU, int Stalls) override;
void Reset() override;
void EmitInstruction(SUnit *SU) override;
void AdvanceCycle() override;
void RecedeCycle() override;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_SCOREBOARDHAZARDRECOGNIZER_H
PK iwFZ#���?G ?G CodeGen/TargetPassConfig.hnu �[��� //===- TargetPassConfig.h - Code Generation pass options --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// Target-Independent Code Generator Pass Configuration Options pass.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_TARGETPASSCONFIG_H
#define LLVM_CODEGEN_TARGETPASSCONFIG_H
#include "llvm/Pass.h"
#include "llvm/Support/CodeGen.h"
#include <cassert>
#include <string>
namespace llvm {
class LLVMTargetMachine;
struct MachineSchedContext;
class PassConfigImpl;
class ScheduleDAGInstrs;
class CSEConfigBase;
class PassInstrumentationCallbacks;
// The old pass manager infrastructure is hidden in a legacy namespace now.
namespace legacy {
class PassManagerBase;
} // end namespace legacy
using legacy::PassManagerBase;
/// Discriminated union of Pass ID types.
///
/// The PassConfig API prefers dealing with IDs because they are safer and more
/// efficient. IDs decouple configuration from instantiation. This way, when a
/// pass is overriden, it isn't unnecessarily instantiated. It is also unsafe to
/// refer to a Pass pointer after adding it to a pass manager, which deletes
/// redundant pass instances.
///
/// However, it is convient to directly instantiate target passes with
/// non-default ctors. These often don't have a registered PassInfo. Rather than
/// force all target passes to implement the pass registry boilerplate, allow
/// the PassConfig API to handle either type.
///
/// AnalysisID is sadly char*, so PointerIntPair won't work.
class IdentifyingPassPtr {
union {
AnalysisID ID;
Pass *P;
};
bool IsInstance = false;
public:
IdentifyingPassPtr() : P(nullptr) {}
IdentifyingPassPtr(AnalysisID IDPtr) : ID(IDPtr) {}
IdentifyingPassPtr(Pass *InstancePtr) : P(InstancePtr), IsInstance(true) {}
bool isValid() const { return P; }
bool isInstance() const { return IsInstance; }
AnalysisID getID() const {
assert(!IsInstance && "Not a Pass ID");
return ID;
}
Pass *getInstance() const {
assert(IsInstance && "Not a Pass Instance");
return P;
}
};
/// Target-Independent Code Generator Pass Configuration Options.
///
/// This is an ImmutablePass solely for the purpose of exposing CodeGen options
/// to the internals of other CodeGen passes.
class TargetPassConfig : public ImmutablePass {
private:
PassManagerBase *PM = nullptr;
AnalysisID StartBefore = nullptr;
AnalysisID StartAfter = nullptr;
AnalysisID StopBefore = nullptr;
AnalysisID StopAfter = nullptr;
unsigned StartBeforeInstanceNum = 0;
unsigned StartBeforeCount = 0;
unsigned StartAfterInstanceNum = 0;
unsigned StartAfterCount = 0;
unsigned StopBeforeInstanceNum = 0;
unsigned StopBeforeCount = 0;
unsigned StopAfterInstanceNum = 0;
unsigned StopAfterCount = 0;
bool Started = true;
bool Stopped = false;
bool AddingMachinePasses = false;
bool DebugifyIsSafe = true;
/// Set the StartAfter, StartBefore and StopAfter passes to allow running only
/// a portion of the normal code-gen pass sequence.
///
/// If the StartAfter and StartBefore pass ID is zero, then compilation will
/// begin at the normal point; otherwise, clear the Started flag to indicate
/// that passes should not be added until the starting pass is seen. If the
/// Stop pass ID is zero, then compilation will continue to the end.
///
/// This function expects that at least one of the StartAfter or the
/// StartBefore pass IDs is null.
void setStartStopPasses();
protected:
LLVMTargetMachine *TM;
PassConfigImpl *Impl = nullptr; // Internal data structures
bool Initialized = false; // Flagged after all passes are configured.
// Target Pass Options
// Targets provide a default setting, user flags override.
bool DisableVerify = false;
/// Default setting for -enable-tail-merge on this target.
bool EnableTailMerge = true;
/// Require processing of functions such that callees are generated before
/// callers.
bool RequireCodeGenSCCOrder = false;
/// Add the actual instruction selection passes. This does not include
/// preparation passes on IR.
bool addCoreISelPasses();
public:
TargetPassConfig(LLVMTargetMachine &TM, PassManagerBase &pm);
// Dummy constructor.
TargetPassConfig();
~TargetPassConfig() override;
static char ID;
/// Get the right type of TargetMachine for this target.
template<typename TMC> TMC &getTM() const {
return *static_cast<TMC*>(TM);
}
//
void setInitialized() { Initialized = true; }
CodeGenOpt::Level getOptLevel() const;
/// Returns true if one of the `-start-after`, `-start-before`, `-stop-after`
/// or `-stop-before` options is set.
static bool hasLimitedCodeGenPipeline();
/// Returns true if none of the `-stop-before` and `-stop-after` options is
/// set.
static bool willCompleteCodeGenPipeline();
/// If hasLimitedCodeGenPipeline is true, this method
/// returns a string with the name of the options, separated
/// by \p Separator that caused this pipeline to be limited.
static std::string
getLimitedCodeGenPipelineReason(const char *Separator = "/");
void setDisableVerify(bool Disable) { setOpt(DisableVerify, Disable); }
bool getEnableTailMerge() const { return EnableTailMerge; }
void setEnableTailMerge(bool Enable) { setOpt(EnableTailMerge, Enable); }
bool requiresCodeGenSCCOrder() const { return RequireCodeGenSCCOrder; }
void setRequiresCodeGenSCCOrder(bool Enable = true) {
setOpt(RequireCodeGenSCCOrder, Enable);
}
/// Allow the target to override a specific pass without overriding the pass
/// pipeline. When passes are added to the standard pipeline at the
/// point where StandardID is expected, add TargetID in its place.
void substitutePass(AnalysisID StandardID, IdentifyingPassPtr TargetID);
/// Insert InsertedPassID pass after TargetPassID pass.
void insertPass(AnalysisID TargetPassID, IdentifyingPassPtr InsertedPassID);
/// Allow the target to enable a specific standard pass by default.
void enablePass(AnalysisID PassID) { substitutePass(PassID, PassID); }
/// Allow the target to disable a specific standard pass by default.
void disablePass(AnalysisID PassID) {
substitutePass(PassID, IdentifyingPassPtr());
}
/// Return the pass substituted for StandardID by the target.
/// If no substitution exists, return StandardID.
IdentifyingPassPtr getPassSubstitution(AnalysisID StandardID) const;
/// Return true if the pass has been substituted by the target or
/// overridden on the command line.
bool isPassSubstitutedOrOverridden(AnalysisID ID) const;
/// Return true if the optimized regalloc pipeline is enabled.
bool getOptimizeRegAlloc() const;
/// Return true if the default global register allocator is in use and
/// has not be overriden on the command line with '-regalloc=...'
bool usingDefaultRegAlloc() const;
/// High level function that adds all passes necessary to go from llvm IR
/// representation to the MI representation.
/// Adds IR based lowering and target specific optimization passes and finally
/// the core instruction selection passes.
/// \returns true if an error occurred, false otherwise.
bool addISelPasses();
/// Add common target configurable passes that perform LLVM IR to IR
/// transforms following machine independent optimization.
virtual void addIRPasses();
/// Add passes to lower exception handling for the code generator.
void addPassesToHandleExceptions();
/// Add pass to prepare the LLVM IR for code generation. This should be done
/// before exception handling preparation passes.
virtual void addCodeGenPrepare();
/// Add common passes that perform LLVM IR to IR transforms in preparation for
/// instruction selection.
virtual void addISelPrepare();
/// addInstSelector - This method should install an instruction selector pass,
/// which converts from LLVM code to machine instructions.
virtual bool addInstSelector() {
return true;
}
/// This method should install an IR translator pass, which converts from
/// LLVM code to machine instructions with possibly generic opcodes.
virtual bool addIRTranslator() { return true; }
/// This method may be implemented by targets that want to run passes
/// immediately before legalization.
virtual void addPreLegalizeMachineIR() {}
/// This method should install a legalize pass, which converts the instruction
/// sequence into one that can be selected by the target.
virtual bool addLegalizeMachineIR() { return true; }
/// This method may be implemented by targets that want to run passes
/// immediately before the register bank selection.
virtual void addPreRegBankSelect() {}
/// This method should install a register bank selector pass, which
/// assigns register banks to virtual registers without a register
/// class or register banks.
virtual bool addRegBankSelect() { return true; }
/// This method may be implemented by targets that want to run passes
/// immediately before the (global) instruction selection.
virtual void addPreGlobalInstructionSelect() {}
/// This method should install a (global) instruction selector pass, which
/// converts possibly generic instructions to fully target-specific
/// instructions, thereby constraining all generic virtual registers to
/// register classes.
virtual bool addGlobalInstructionSelect() { return true; }
/// Add the complete, standard set of LLVM CodeGen passes.
/// Fully developed targets will not generally override this.
virtual void addMachinePasses();
/// Create an instance of ScheduleDAGInstrs to be run within the standard
/// MachineScheduler pass for this function and target at the current
/// optimization level.
///
/// This can also be used to plug a new MachineSchedStrategy into an instance
/// of the standard ScheduleDAGMI:
/// return new ScheduleDAGMI(C, std::make_unique<MyStrategy>(C), /*RemoveKillFlags=*/false)
///
/// Return NULL to select the default (generic) machine scheduler.
virtual ScheduleDAGInstrs *
createMachineScheduler(MachineSchedContext *C) const {
return nullptr;
}
/// Similar to createMachineScheduler but used when postRA machine scheduling
/// is enabled.
virtual ScheduleDAGInstrs *
createPostMachineScheduler(MachineSchedContext *C) const {
return nullptr;
}
/// printAndVerify - Add a pass to dump then verify the machine function, if
/// those steps are enabled.
void printAndVerify(const std::string &Banner);
/// Add a pass to print the machine function if printing is enabled.
void addPrintPass(const std::string &Banner);
/// Add a pass to perform basic verification of the machine function if
/// verification is enabled.
void addVerifyPass(const std::string &Banner);
/// Add a pass to add synthesized debug info to the MIR.
void addDebugifyPass();
/// Add a pass to remove debug info from the MIR.
void addStripDebugPass();
/// Add a pass to check synthesized debug info for MIR.
void addCheckDebugPass();
/// Add standard passes before a pass that's about to be added. For example,
/// the DebugifyMachineModulePass if it is enabled.
void addMachinePrePasses(bool AllowDebugify = true);
/// Add standard passes after a pass that has just been added. For example,
/// the MachineVerifier if it is enabled.
void addMachinePostPasses(const std::string &Banner);
/// Check whether or not GlobalISel should abort on error.
/// When this is disabled, GlobalISel will fall back on SDISel instead of
/// erroring out.
bool isGlobalISelAbortEnabled() const;
/// Check whether or not a diagnostic should be emitted when GlobalISel
/// uses the fallback path. In other words, it will emit a diagnostic
/// when GlobalISel failed and isGlobalISelAbortEnabled is false.
virtual bool reportDiagnosticWhenGlobalISelFallback() const;
/// Check whether continuous CSE should be enabled in GISel passes.
/// By default, it's enabled for non O0 levels.
virtual bool isGISelCSEEnabled() const;
/// Returns the CSEConfig object to use for the current optimization level.
virtual std::unique_ptr<CSEConfigBase> getCSEConfig() const;
protected:
// Helper to verify the analysis is really immutable.
void setOpt(bool &Opt, bool Val);
/// Return true if register allocator is specified by -regalloc=override.
bool isCustomizedRegAlloc();
/// Methods with trivial inline returns are convenient points in the common
/// codegen pass pipeline where targets may insert passes. Methods with
/// out-of-line standard implementations are major CodeGen stages called by
/// addMachinePasses. Some targets may override major stages when inserting
/// passes is insufficient, but maintaining overriden stages is more work.
///
/// addPreISelPasses - This method should add any "last minute" LLVM->LLVM
/// passes (which are run just before instruction selector).
virtual bool addPreISel() {
return true;
}
/// addMachineSSAOptimization - Add standard passes that optimize machine
/// instructions in SSA form.
virtual void addMachineSSAOptimization();
/// Add passes that optimize instruction level parallelism for out-of-order
/// targets. These passes are run while the machine code is still in SSA
/// form, so they can use MachineTraceMetrics to control their heuristics.
///
/// All passes added here should preserve the MachineDominatorTree,
/// MachineLoopInfo, and MachineTraceMetrics analyses.
virtual bool addILPOpts() {
return false;
}
/// This method may be implemented by targets that want to run passes
/// immediately before register allocation.
virtual void addPreRegAlloc() { }
/// createTargetRegisterAllocator - Create the register allocator pass for
/// this target at the current optimization level.
virtual FunctionPass *createTargetRegisterAllocator(bool Optimized);
/// addFastRegAlloc - Add the minimum set of target-independent passes that
/// are required for fast register allocation.
virtual void addFastRegAlloc();
/// addOptimizedRegAlloc - Add passes related to register allocation.
/// LLVMTargetMachine provides standard regalloc passes for most targets.
virtual void addOptimizedRegAlloc();
/// addPreRewrite - Add passes to the optimized register allocation pipeline
/// after register allocation is complete, but before virtual registers are
/// rewritten to physical registers.
///
/// These passes must preserve VirtRegMap and LiveIntervals, and when running
/// after RABasic or RAGreedy, they should take advantage of LiveRegMatrix.
/// When these passes run, VirtRegMap contains legal physreg assignments for
/// all virtual registers.
///
/// Note if the target overloads addRegAssignAndRewriteOptimized, this may not
/// be honored. This is also not generally used for the the fast variant,
/// where the allocation and rewriting are done in one pass.
virtual bool addPreRewrite() {
return false;
}
/// addPostFastRegAllocRewrite - Add passes to the optimized register
/// allocation pipeline after fast register allocation is complete.
virtual bool addPostFastRegAllocRewrite() { return false; }
/// Add passes to be run immediately after virtual registers are rewritten
/// to physical registers.
virtual void addPostRewrite() { }
/// This method may be implemented by targets that want to run passes after
/// register allocation pass pipeline but before prolog-epilog insertion.
virtual void addPostRegAlloc() { }
/// Add passes that optimize machine instructions after register allocation.
virtual void addMachineLateOptimization();
/// This method may be implemented by targets that want to run passes after
/// prolog-epilog insertion and before the second instruction scheduling pass.
virtual void addPreSched2() { }
/// addGCPasses - Add late codegen passes that analyze code for garbage
/// collection. This should return true if GC info should be printed after
/// these passes.
virtual bool addGCPasses();
/// Add standard basic block placement passes.
virtual void addBlockPlacement();
/// This pass may be implemented by targets that want to run passes
/// immediately before machine code is emitted.
virtual void addPreEmitPass() { }
/// This pass may be implemented by targets that want to run passes
/// immediately after basic block sections are assigned.
virtual void addPostBBSections() {}
/// Targets may add passes immediately before machine code is emitted in this
/// callback. This is called even later than `addPreEmitPass`.
// FIXME: Rename `addPreEmitPass` to something more sensible given its actual
// position and remove the `2` suffix here as this callback is what
// `addPreEmitPass` *should* be but in reality isn't.
virtual void addPreEmitPass2() {}
/// Utilities for targets to add passes to the pass manager.
///
/// Add a CodeGen pass at this point in the pipeline after checking overrides.
/// Return the pass that was added, or zero if no pass was added.
AnalysisID addPass(AnalysisID PassID);
/// Add a pass to the PassManager if that pass is supposed to be run, as
/// determined by the StartAfter and StopAfter options. Takes ownership of the
/// pass.
void addPass(Pass *P);
/// addMachinePasses helper to create the target-selected or overriden
/// regalloc pass.
virtual FunctionPass *createRegAllocPass(bool Optimized);
/// Add core register allocator passes which do the actual register assignment
/// and rewriting. \returns true if any passes were added.
virtual bool addRegAssignAndRewriteFast();
virtual bool addRegAssignAndRewriteOptimized();
};
void registerCodeGenCallback(PassInstrumentationCallbacks &PIC,
LLVMTargetMachine &);
} // end namespace llvm
#endif // LLVM_CODEGEN_TARGETPASSCONFIG_H
PK iwFZ.��V CodeGen/MachineConstantPool.hnu �[��� //===- CodeGen/MachineConstantPool.h - Abstract Constant Pool ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// @file
/// This file declares the MachineConstantPool class which is an abstract
/// constant pool to keep track of constants referenced by a function.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINECONSTANTPOOL_H
#define LLVM_CODEGEN_MACHINECONSTANTPOOL_H
#include "llvm/ADT/DenseSet.h"
#include "llvm/MC/SectionKind.h"
#include "llvm/Support/Alignment.h"
#include <climits>
#include <vector>
namespace llvm {
class Constant;
class DataLayout;
class FoldingSetNodeID;
class MachineConstantPool;
class raw_ostream;
class Type;
/// Abstract base class for all machine specific constantpool value subclasses.
///
class MachineConstantPoolValue {
virtual void anchor();
Type *Ty;
public:
explicit MachineConstantPoolValue(Type *ty) : Ty(ty) {}
virtual ~MachineConstantPoolValue() = default;
Type *getType() const { return Ty; }
virtual unsigned getSizeInBytes(const DataLayout &DL) const;
virtual int getExistingMachineCPValue(MachineConstantPool *CP,
Align Alignment) = 0;
virtual void addSelectionDAGCSEId(FoldingSetNodeID &ID) = 0;
/// print - Implement operator<<
virtual void print(raw_ostream &O) const = 0;
};
inline raw_ostream &operator<<(raw_ostream &OS,
const MachineConstantPoolValue &V) {
V.print(OS);
return OS;
}
/// This class is a data container for one entry in a MachineConstantPool.
/// It contains a pointer to the value and an offset from the start of
/// the constant pool.
/// An entry in a MachineConstantPool
class MachineConstantPoolEntry {
public:
/// The constant itself.
union {
const Constant *ConstVal;
MachineConstantPoolValue *MachineCPVal;
} Val;
/// The required alignment for this entry.
Align Alignment;
bool IsMachineConstantPoolEntry;
MachineConstantPoolEntry(const Constant *V, Align A)
: Alignment(A), IsMachineConstantPoolEntry(false) {
Val.ConstVal = V;
}
MachineConstantPoolEntry(MachineConstantPoolValue *V, Align A)
: Alignment(A), IsMachineConstantPoolEntry(true) {
Val.MachineCPVal = V;
}
/// isMachineConstantPoolEntry - Return true if the MachineConstantPoolEntry
/// is indeed a target specific constantpool entry, not a wrapper over a
/// Constant.
bool isMachineConstantPoolEntry() const { return IsMachineConstantPoolEntry; }
Align getAlign() const { return Alignment; }
unsigned getSizeInBytes(const DataLayout &DL) const;
/// This method classifies the entry according to whether or not it may
/// generate a relocation entry. This must be conservative, so if it might
/// codegen to a relocatable entry, it should say so.
bool needsRelocation() const;
SectionKind getSectionKind(const DataLayout *DL) const;
};
/// The MachineConstantPool class keeps track of constants referenced by a
/// function which must be spilled to memory. This is used for constants which
/// are unable to be used directly as operands to instructions, which typically
/// include floating point and large integer constants.
///
/// Instructions reference the address of these constant pool constants through
/// the use of MO_ConstantPoolIndex values. When emitting assembly or machine
/// code, these virtual address references are converted to refer to the
/// address of the function constant pool values.
/// The machine constant pool.
class MachineConstantPool {
Align PoolAlignment; ///< The alignment for the pool.
std::vector<MachineConstantPoolEntry> Constants; ///< The pool of constants.
/// MachineConstantPoolValues that use an existing MachineConstantPoolEntry.
DenseSet<MachineConstantPoolValue*> MachineCPVsSharingEntries;
const DataLayout &DL;
const DataLayout &getDataLayout() const { return DL; }
public:
/// The only constructor.
explicit MachineConstantPool(const DataLayout &DL)
: PoolAlignment(1), DL(DL) {}
~MachineConstantPool();
/// Return the alignment required by the whole constant pool, of which the
/// first element must be aligned.
Align getConstantPoolAlign() const { return PoolAlignment; }
/// getConstantPoolIndex - Create a new entry in the constant pool or return
/// an existing one. User must specify the minimum required alignment for
/// the object.
unsigned getConstantPoolIndex(const Constant *C, Align Alignment);
unsigned getConstantPoolIndex(MachineConstantPoolValue *V, Align Alignment);
/// isEmpty - Return true if this constant pool contains no constants.
bool isEmpty() const { return Constants.empty(); }
const std::vector<MachineConstantPoolEntry> &getConstants() const {
return Constants;
}
/// print - Used by the MachineFunction printer to print information about
/// constant pool objects. Implemented in MachineFunction.cpp
void print(raw_ostream &OS) const;
/// dump - Call print(cerr) to be called from the debugger.
void dump() const;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINECONSTANTPOOL_H
PK iwFZl�$` ` CodeGen/CFIFixup.hnu �[��� //===-- CFIFixup.h - Insert CFI remember/restore instructions ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// Contains definition of the base CFIFixup pass.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_CFIFIXUP_H
#define LLVM_CODEGEN_CFIFIXUP_H
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/InitializePasses.h"
namespace llvm {
class CFIFixup : public MachineFunctionPass {
public:
static char ID;
CFIFixup() : MachineFunctionPass(ID) {
initializeCFIFixupPass(*PassRegistry::getPassRegistry());
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
bool runOnMachineFunction(MachineFunction &MF) override;
};
} // namespace llvm
#endif // LLVM_CODEGEN_CFIFIXUP_H
PK iwFZ����4 �4 CodeGen/LiveVariables.hnu �[��� //===-- llvm/CodeGen/LiveVariables.h - Live Variable Analysis ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements the LiveVariables analysis pass. For each machine
// instruction in the function, this pass calculates the set of registers that
// are immediately dead after the instruction (i.e., the instruction calculates
// the value, but it is never used) and the set of registers that are used by
// the instruction, but are never used after the instruction (i.e., they are
// killed).
//
// This class computes live variables using a sparse implementation based on
// the machine code SSA form. This class computes live variable information for
// each virtual and _register allocatable_ physical register in a function. It
// uses the dominance properties of SSA form to efficiently compute live
// variables for virtual registers, and assumes that physical registers are only
// live within a single basic block (allowing it to do a single local analysis
// to resolve physical register lifetimes in each basic block). If a physical
// register is not register allocatable, it is not tracked. This is useful for
// things like the stack pointer and condition codes.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LIVEVARIABLES_H
#define LLVM_CODEGEN_LIVEVARIABLES_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/IndexedMap.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/SparseBitVector.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/InitializePasses.h"
#include "llvm/PassRegistry.h"
namespace llvm {
class MachineBasicBlock;
class MachineRegisterInfo;
class LiveVariables : public MachineFunctionPass {
public:
static char ID; // Pass identification, replacement for typeid
LiveVariables() : MachineFunctionPass(ID) {
initializeLiveVariablesPass(*PassRegistry::getPassRegistry());
}
/// VarInfo - This represents the regions where a virtual register is live in
/// the program. We represent this with three different pieces of
/// information: the set of blocks in which the instruction is live
/// throughout, the set of blocks in which the instruction is actually used,
/// and the set of non-phi instructions that are the last users of the value.
///
/// In the common case where a value is defined and killed in the same block,
/// There is one killing instruction, and AliveBlocks is empty.
///
/// Otherwise, the value is live out of the block. If the value is live
/// throughout any blocks, these blocks are listed in AliveBlocks. Blocks
/// where the liveness range ends are not included in AliveBlocks, instead
/// being captured by the Kills set. In these blocks, the value is live into
/// the block (unless the value is defined and killed in the same block) and
/// lives until the specified instruction. Note that there cannot ever be a
/// value whose Kills set contains two instructions from the same basic block.
///
/// PHI nodes complicate things a bit. If a PHI node is the last user of a
/// value in one of its predecessor blocks, it is not listed in the kills set,
/// but does include the predecessor block in the AliveBlocks set (unless that
/// block also defines the value). This leads to the (perfectly sensical)
/// situation where a value is defined in a block, and the last use is a phi
/// node in the successor. In this case, AliveBlocks is empty (the value is
/// not live across any blocks) and Kills is empty (phi nodes are not
/// included). This is sensical because the value must be live to the end of
/// the block, but is not live in any successor blocks.
struct VarInfo {
/// AliveBlocks - Set of blocks in which this value is alive completely
/// through. This is a bit set which uses the basic block number as an
/// index.
///
SparseBitVector<> AliveBlocks;
/// Kills - List of MachineInstruction's which are the last use of this
/// virtual register (kill it) in their basic block.
///
std::vector<MachineInstr*> Kills;
/// removeKill - Delete a kill corresponding to the specified
/// machine instruction. Returns true if there was a kill
/// corresponding to this instruction, false otherwise.
bool removeKill(MachineInstr &MI) {
std::vector<MachineInstr *>::iterator I = find(Kills, &MI);
if (I == Kills.end())
return false;
Kills.erase(I);
return true;
}
/// findKill - Find a kill instruction in MBB. Return NULL if none is found.
MachineInstr *findKill(const MachineBasicBlock *MBB) const;
/// isLiveIn - Is Reg live in to MBB? This means that Reg is live through
/// MBB, or it is killed in MBB. If Reg is only used by PHI instructions in
/// MBB, it is not considered live in.
bool isLiveIn(const MachineBasicBlock &MBB, Register Reg,
MachineRegisterInfo &MRI);
void dump() const;
};
private:
/// VirtRegInfo - This list is a mapping from virtual register number to
/// variable information.
///
IndexedMap<VarInfo, VirtReg2IndexFunctor> VirtRegInfo;
/// PHIJoins - list of virtual registers that are PHI joins. These registers
/// may have multiple definitions, and they require special handling when
/// building live intervals.
SparseBitVector<> PHIJoins;
private: // Intermediate data structures
MachineFunction *MF = nullptr;
MachineRegisterInfo *MRI = nullptr;
const TargetRegisterInfo *TRI = nullptr;
// PhysRegInfo - Keep track of which instruction was the last def of a
// physical register. This is a purely local property, because all physical
// register references are presumed dead across basic blocks.
std::vector<MachineInstr *> PhysRegDef;
// PhysRegInfo - Keep track of which instruction was the last use of a
// physical register. This is a purely local property, because all physical
// register references are presumed dead across basic blocks.
std::vector<MachineInstr *> PhysRegUse;
std::vector<SmallVector<unsigned, 4>> PHIVarInfo;
// DistanceMap - Keep track the distance of a MI from the start of the
// current basic block.
DenseMap<MachineInstr*, unsigned> DistanceMap;
/// HandlePhysRegKill - Add kills of Reg and its sub-registers to the
/// uses. Pay special attention to the sub-register uses which may come below
/// the last use of the whole register.
bool HandlePhysRegKill(Register Reg, MachineInstr *MI);
/// HandleRegMask - Call HandlePhysRegKill for all registers clobbered by Mask.
void HandleRegMask(const MachineOperand&);
void HandlePhysRegUse(Register Reg, MachineInstr &MI);
void HandlePhysRegDef(Register Reg, MachineInstr *MI,
SmallVectorImpl<unsigned> &Defs);
void UpdatePhysRegDefs(MachineInstr &MI, SmallVectorImpl<unsigned> &Defs);
/// FindLastRefOrPartRef - Return the last reference or partial reference of
/// the specified register.
MachineInstr *FindLastRefOrPartRef(Register Reg);
/// FindLastPartialDef - Return the last partial def of the specified
/// register. Also returns the sub-registers that're defined by the
/// instruction.
MachineInstr *FindLastPartialDef(Register Reg,
SmallSet<unsigned, 4> &PartDefRegs);
/// analyzePHINodes - Gather information about the PHI nodes in here. In
/// particular, we want to map the variable information of a virtual
/// register which is used in a PHI node. We map that to the BB the vreg
/// is coming from.
void analyzePHINodes(const MachineFunction& Fn);
void runOnInstr(MachineInstr &MI, SmallVectorImpl<unsigned> &Defs);
void runOnBlock(MachineBasicBlock *MBB, unsigned NumRegs);
public:
bool runOnMachineFunction(MachineFunction &MF) override;
/// RegisterDefIsDead - Return true if the specified instruction defines the
/// specified register, but that definition is dead.
bool RegisterDefIsDead(MachineInstr &MI, Register Reg) const;
//===--------------------------------------------------------------------===//
// API to update live variable information
/// Recompute liveness from scratch for a virtual register \p Reg that is
/// known to have a single def that dominates all uses. This can be useful
/// after removing some uses of \p Reg. It is not necessary for the whole
/// machine function to be in SSA form.
void recomputeForSingleDefVirtReg(Register Reg);
/// replaceKillInstruction - Update register kill info by replacing a kill
/// instruction with a new one.
void replaceKillInstruction(Register Reg, MachineInstr &OldMI,
MachineInstr &NewMI);
/// addVirtualRegisterKilled - Add information about the fact that the
/// specified register is killed after being used by the specified
/// instruction. If AddIfNotFound is true, add a implicit operand if it's
/// not found.
void addVirtualRegisterKilled(Register IncomingReg, MachineInstr &MI,
bool AddIfNotFound = false) {
if (MI.addRegisterKilled(IncomingReg, TRI, AddIfNotFound))
getVarInfo(IncomingReg).Kills.push_back(&MI);
}
/// removeVirtualRegisterKilled - Remove the specified kill of the virtual
/// register from the live variable information. Returns true if the
/// variable was marked as killed by the specified instruction,
/// false otherwise.
bool removeVirtualRegisterKilled(Register Reg, MachineInstr &MI) {
if (!getVarInfo(Reg).removeKill(MI))
return false;
bool Removed = false;
for (MachineOperand &MO : MI.operands()) {
if (MO.isReg() && MO.isKill() && MO.getReg() == Reg) {
MO.setIsKill(false);
Removed = true;
break;
}
}
assert(Removed && "Register is not used by this instruction!");
(void)Removed;
return true;
}
/// removeVirtualRegistersKilled - Remove all killed info for the specified
/// instruction.
void removeVirtualRegistersKilled(MachineInstr &MI);
/// addVirtualRegisterDead - Add information about the fact that the specified
/// register is dead after being used by the specified instruction. If
/// AddIfNotFound is true, add a implicit operand if it's not found.
void addVirtualRegisterDead(Register IncomingReg, MachineInstr &MI,
bool AddIfNotFound = false) {
if (MI.addRegisterDead(IncomingReg, TRI, AddIfNotFound))
getVarInfo(IncomingReg).Kills.push_back(&MI);
}
/// removeVirtualRegisterDead - Remove the specified kill of the virtual
/// register from the live variable information. Returns true if the
/// variable was marked dead at the specified instruction, false
/// otherwise.
bool removeVirtualRegisterDead(Register Reg, MachineInstr &MI) {
if (!getVarInfo(Reg).removeKill(MI))
return false;
bool Removed = false;
for (MachineOperand &MO : MI.operands()) {
if (MO.isReg() && MO.isDef() && MO.getReg() == Reg) {
MO.setIsDead(false);
Removed = true;
break;
}
}
assert(Removed && "Register is not defined by this instruction!");
(void)Removed;
return true;
}
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override {
VirtRegInfo.clear();
}
/// getVarInfo - Return the VarInfo structure for the specified VIRTUAL
/// register.
VarInfo &getVarInfo(Register Reg);
void MarkVirtRegAliveInBlock(VarInfo& VRInfo, MachineBasicBlock* DefBlock,
MachineBasicBlock *BB);
void MarkVirtRegAliveInBlock(VarInfo &VRInfo, MachineBasicBlock *DefBlock,
MachineBasicBlock *BB,
SmallVectorImpl<MachineBasicBlock *> &WorkList);
void HandleVirtRegDef(Register reg, MachineInstr &MI);
void HandleVirtRegUse(Register reg, MachineBasicBlock *MBB, MachineInstr &MI);
bool isLiveIn(Register Reg, const MachineBasicBlock &MBB) {
return getVarInfo(Reg).isLiveIn(MBB, Reg, *MRI);
}
/// isLiveOut - Determine if Reg is live out from MBB, when not considering
/// PHI nodes. This means that Reg is either killed by a successor block or
/// passed through one.
bool isLiveOut(Register Reg, const MachineBasicBlock &MBB);
/// addNewBlock - Add a new basic block BB between DomBB and SuccBB. All
/// variables that are live out of DomBB and live into SuccBB will be marked
/// as passing live through BB. This method assumes that the machine code is
/// still in SSA form.
void addNewBlock(MachineBasicBlock *BB,
MachineBasicBlock *DomBB,
MachineBasicBlock *SuccBB);
void addNewBlock(MachineBasicBlock *BB,
MachineBasicBlock *DomBB,
MachineBasicBlock *SuccBB,
std::vector<SparseBitVector<>> &LiveInSets);
/// isPHIJoin - Return true if Reg is a phi join register.
bool isPHIJoin(Register Reg) { return PHIJoins.test(Reg.id()); }
/// setPHIJoin - Mark Reg as a phi join register.
void setPHIJoin(Register Reg) { PHIJoins.set(Reg.id()); }
};
} // End llvm namespace
#endif
PK iwFZ8�eu� � CodeGen/MachORelocation.hnu �[��� //=== MachORelocation.h - Mach-O Relocation Info ----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the MachORelocation class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHORELOCATION_H
#define LLVM_CODEGEN_MACHORELOCATION_H
#include "llvm/Support/DataTypes.h"
namespace llvm {
/// MachORelocation - This struct contains information about each relocation
/// that needs to be emitted to the file.
/// see <mach-o/reloc.h>
class MachORelocation {
uint32_t r_address; // offset in the section to what is being relocated
uint32_t r_symbolnum; // symbol index if r_extern == 1 else section index
bool r_pcrel; // was relocated pc-relative already
uint8_t r_length; // length = 2 ^ r_length
bool r_extern; //
uint8_t r_type; // if not 0, machine-specific relocation type.
bool r_scattered; // 1 = scattered, 0 = non-scattered
int32_t r_value; // the value the item to be relocated is referring
// to.
public:
uint32_t getPackedFields() const {
if (r_scattered)
return (1 << 31) | (r_pcrel << 30) | ((r_length & 3) << 28) |
((r_type & 15) << 24) | (r_address & 0x00FFFFFF);
else
return (r_symbolnum << 8) | (r_pcrel << 7) | ((r_length & 3) << 5) |
(r_extern << 4) | (r_type & 15);
}
uint32_t getAddress() const { return r_scattered ? r_value : r_address; }
uint32_t getRawAddress() const { return r_address; }
MachORelocation(uint32_t addr, uint32_t index, bool pcrel, uint8_t len,
bool ext, uint8_t type, bool scattered = false,
int32_t value = 0) :
r_address(addr), r_symbolnum(index), r_pcrel(pcrel), r_length(len),
r_extern(ext), r_type(type), r_scattered(scattered), r_value(value) {}
};
} // end llvm namespace
#endif // LLVM_CODEGEN_MACHORELOCATION_H
PK iwFZ����* �* CodeGen/CodeGenCommonISel.hnu �[��� //===- CodeGenCommonISel.h - Common code between ISels ---------*- C++ -*--===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares common utilities that are shared between SelectionDAG and
// GlobalISel frameworks.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_CODEGENCOMMONISEL_H
#define LLVM_CODEGEN_CODEGENCOMMONISEL_H
#include "llvm/CodeGen/MachineBasicBlock.h"
#include <cassert>
namespace llvm {
class BasicBlock;
enum FPClassTest : unsigned;
/// Encapsulates all of the information needed to generate a stack protector
/// check, and signals to isel when initialized that one needs to be generated.
///
/// *NOTE* The following is a high level documentation of SelectionDAG Stack
/// Protector Generation. This is now also ported be shared with GlobalISel,
/// but without any significant changes.
///
/// High Level Overview of ISel Stack Protector Generation:
///
/// Previously, the "stack protector" IR pass handled stack protector
/// generation. This necessitated splitting basic blocks at the IR level to
/// create the success/failure basic blocks in the tail of the basic block in
/// question. As a result of this, calls that would have qualified for the
/// sibling call optimization were no longer eligible for optimization since
/// said calls were no longer right in the "tail position" (i.e. the immediate
/// predecessor of a ReturnInst instruction).
///
/// Since the sibling call optimization causes the callee to reuse the caller's
/// stack, if we could delay the generation of the stack protector check until
/// later in CodeGen after the sibling call decision was made, we get both the
/// tail call optimization and the stack protector check!
///
/// A few goals in solving this problem were:
///
/// 1. Preserve the architecture independence of stack protector generation.
///
/// 2. Preserve the normal IR level stack protector check for platforms like
/// OpenBSD for which we support platform-specific stack protector
/// generation.
///
/// The main problem that guided the present solution is that one can not
/// solve this problem in an architecture independent manner at the IR level
/// only. This is because:
///
/// 1. The decision on whether or not to perform a sibling call on certain
/// platforms (for instance i386) requires lower level information
/// related to available registers that can not be known at the IR level.
///
/// 2. Even if the previous point were not true, the decision on whether to
/// perform a tail call is done in LowerCallTo in SelectionDAG (or
/// CallLowering in GlobalISel) which occurs after the Stack Protector
/// Pass. As a result, one would need to put the relevant callinst into the
/// stack protector check success basic block (where the return inst is
/// placed) and then move it back later at ISel/MI time before the
/// stack protector check if the tail call optimization failed. The MI
/// level option was nixed immediately since it would require
/// platform-specific pattern matching. The ISel level option was
/// nixed because SelectionDAG only processes one IR level basic block at a
/// time implying one could not create a DAG Combine to move the callinst.
///
/// To get around this problem:
///
/// 1. SelectionDAG can only process one block at a time, we can generate
/// multiple machine basic blocks for one IR level basic block.
/// This is how we handle bit tests and switches.
///
/// 2. At the MI level, tail calls are represented via a special return
/// MIInst called "tcreturn". Thus if we know the basic block in which we
/// wish to insert the stack protector check, we get the correct behavior
/// by always inserting the stack protector check right before the return
/// statement. This is a "magical transformation" since no matter where
/// the stack protector check intrinsic is, we always insert the stack
/// protector check code at the end of the BB.
///
/// Given the aforementioned constraints, the following solution was devised:
///
/// 1. On platforms that do not support ISel stack protector check
/// generation, allow for the normal IR level stack protector check
/// generation to continue.
///
/// 2. On platforms that do support ISel stack protector check
/// generation:
///
/// a. Use the IR level stack protector pass to decide if a stack
/// protector is required/which BB we insert the stack protector check
/// in by reusing the logic already therein.
///
/// b. After we finish selecting the basic block, we produce the validation
/// code with one of these techniques:
/// 1) with a call to a guard check function
/// 2) with inlined instrumentation
///
/// 1) We insert a call to the check function before the terminator.
///
/// 2) We first find a splice point in the parent basic block
/// before the terminator and then splice the terminator of said basic
/// block into the success basic block. Then we code-gen a new tail for
/// the parent basic block consisting of the two loads, the comparison,
/// and finally two branches to the success/failure basic blocks. We
/// conclude by code-gening the failure basic block if we have not
/// code-gened it already (all stack protector checks we generate in
/// the same function, use the same failure basic block).
class StackProtectorDescriptor {
public:
StackProtectorDescriptor() = default;
/// Returns true if all fields of the stack protector descriptor are
/// initialized implying that we should/are ready to emit a stack protector.
bool shouldEmitStackProtector() const {
return ParentMBB && SuccessMBB && FailureMBB;
}
bool shouldEmitFunctionBasedCheckStackProtector() const {
return ParentMBB && !SuccessMBB && !FailureMBB;
}
/// Initialize the stack protector descriptor structure for a new basic
/// block.
void initialize(const BasicBlock *BB, MachineBasicBlock *MBB,
bool FunctionBasedInstrumentation) {
// Make sure we are not initialized yet.
assert(!shouldEmitStackProtector() && "Stack Protector Descriptor is "
"already initialized!");
ParentMBB = MBB;
if (!FunctionBasedInstrumentation) {
SuccessMBB = addSuccessorMBB(BB, MBB, /* IsLikely */ true);
FailureMBB = addSuccessorMBB(BB, MBB, /* IsLikely */ false, FailureMBB);
}
}
/// Reset state that changes when we handle different basic blocks.
///
/// This currently includes:
///
/// 1. The specific basic block we are generating a
/// stack protector for (ParentMBB).
///
/// 2. The successor machine basic block that will contain the tail of
/// parent mbb after we create the stack protector check (SuccessMBB). This
/// BB is visited only on stack protector check success.
void resetPerBBState() {
ParentMBB = nullptr;
SuccessMBB = nullptr;
}
/// Reset state that only changes when we switch functions.
///
/// This currently includes:
///
/// 1. FailureMBB since we reuse the failure code path for all stack
/// protector checks created in an individual function.
///
/// 2.The guard variable since the guard variable we are checking against is
/// always the same.
void resetPerFunctionState() { FailureMBB = nullptr; }
MachineBasicBlock *getParentMBB() { return ParentMBB; }
MachineBasicBlock *getSuccessMBB() { return SuccessMBB; }
MachineBasicBlock *getFailureMBB() { return FailureMBB; }
private:
/// The basic block for which we are generating the stack protector.
///
/// As a result of stack protector generation, we will splice the
/// terminators of this basic block into the successor mbb SuccessMBB and
/// replace it with a compare/branch to the successor mbbs
/// SuccessMBB/FailureMBB depending on whether or not the stack protector
/// was violated.
MachineBasicBlock *ParentMBB = nullptr;
/// A basic block visited on stack protector check success that contains the
/// terminators of ParentMBB.
MachineBasicBlock *SuccessMBB = nullptr;
/// This basic block visited on stack protector check failure that will
/// contain a call to __stack_chk_fail().
MachineBasicBlock *FailureMBB = nullptr;
/// Add a successor machine basic block to ParentMBB. If the successor mbb
/// has not been created yet (i.e. if SuccMBB = 0), then the machine basic
/// block will be created. Assign a large weight if IsLikely is true.
MachineBasicBlock *addSuccessorMBB(const BasicBlock *BB,
MachineBasicBlock *ParentMBB,
bool IsLikely,
MachineBasicBlock *SuccMBB = nullptr);
};
/// Find the split point at which to splice the end of BB into its success stack
/// protector check machine basic block.
///
/// On many platforms, due to ABI constraints, terminators, even before register
/// allocation, use physical registers. This creates an issue for us since
/// physical registers at this point can not travel across basic
/// blocks. Luckily, selectiondag always moves physical registers into vregs
/// when they enter functions and moves them through a sequence of copies back
/// into the physical registers right before the terminator creating a
/// ``Terminator Sequence''. This function is searching for the beginning of the
/// terminator sequence so that we can ensure that we splice off not just the
/// terminator, but additionally the copies that move the vregs into the
/// physical registers.
MachineBasicBlock::iterator
findSplitPointForStackProtector(MachineBasicBlock *BB,
const TargetInstrInfo &TII);
/// Evaluates if the specified FP class test is better performed as the inverse
/// (i.e. fewer instructions should be required to lower it). An example is the
/// test "inf|normal|subnormal|zero", which is an inversion of "nan".
/// \param Test The test as specified in 'is_fpclass' intrinsic invocation.
/// \returns The inverted test, or fcNone, if inversion does not produce a
/// simpler test.
FPClassTest invertFPClassTestIfSimpler(FPClassTest Test);
/// Assuming the instruction \p MI is going to be deleted, attempt to salvage
/// debug users of \p MI by writing the effect of \p MI in a DIExpression.
void salvageDebugInfoForDbgValue(const MachineRegisterInfo &MRI,
MachineInstr &MI,
ArrayRef<MachineOperand *> DbgUsers);
} // namespace llvm
#endif // LLVM_CODEGEN_CODEGENCOMMONISEL_H
PK iwFZxS ��
�
CodeGen/CostTable.hnu �[��� //===-- CostTable.h - Instruction Cost Table handling -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// Cost tables and simple lookup functions
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_COSTTABLE_H_
#define LLVM_CODEGEN_COSTTABLE_H_
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/CodeGen/MachineValueType.h"
namespace llvm {
/// Cost Table Entry
template <typename CostType>
struct CostTblEntryT {
int ISD;
MVT::SimpleValueType Type;
CostType Cost;
};
using CostTblEntry = CostTblEntryT<unsigned>;
/// Find in cost table.
template <class CostType>
inline const CostTblEntryT<CostType> *
CostTableLookup(ArrayRef<CostTblEntryT<CostType>> Tbl, int ISD, MVT Ty) {
auto I = find_if(Tbl, [=](const CostTblEntryT<CostType> &Entry) {
return ISD == Entry.ISD && Ty == Entry.Type;
});
if (I != Tbl.end())
return I;
// Could not find an entry.
return nullptr;
}
template <size_t N, class CostType>
inline const CostTblEntryT<CostType> *
CostTableLookup(const CostTblEntryT<CostType> (&Table)[N], int ISD, MVT Ty) {
// Wrapper to fix template argument deduction failures.
return CostTableLookup<CostType>(Table, ISD, Ty);
}
/// Type Conversion Cost Table
template <typename CostType>
struct TypeConversionCostTblEntryT {
int ISD;
MVT::SimpleValueType Dst;
MVT::SimpleValueType Src;
CostType Cost;
};
using TypeConversionCostTblEntry = TypeConversionCostTblEntryT<unsigned>;
/// Find in type conversion cost table.
template <class CostType>
inline const TypeConversionCostTblEntryT<CostType> *
ConvertCostTableLookup(ArrayRef<TypeConversionCostTblEntryT<CostType>> Tbl,
int ISD, MVT Dst, MVT Src) {
auto I =
find_if(Tbl, [=](const TypeConversionCostTblEntryT<CostType> &Entry) {
return ISD == Entry.ISD && Src == Entry.Src && Dst == Entry.Dst;
});
if (I != Tbl.end())
return I;
// Could not find an entry.
return nullptr;
}
template <size_t N, class CostType>
inline const TypeConversionCostTblEntryT<CostType> *
ConvertCostTableLookup(const TypeConversionCostTblEntryT<CostType> (&Table)[N],
int ISD, MVT Dst, MVT Src) {
// Wrapper to fix template argument deduction failures.
return ConvertCostTableLookup<CostType>(Table, ISD, Dst, Src);
}
} // namespace llvm
#endif /* LLVM_CODEGEN_COSTTABLE_H_ */
PK iwFZd��� � CodeGen/DetectDeadLanes.hnu �[��� //===- DetectDeadLanes.h - SubRegister Lane Usage Analysis --*- C++ -*-----===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file
/// Analysis that tracks defined/used subregister lanes across COPY instructions
/// and instructions that get lowered to a COPY (PHI, REG_SEQUENCE,
/// INSERT_SUBREG, EXTRACT_SUBREG).
/// The information is used to detect dead definitions and the usage of
/// (completely) undefined values and mark the operands as such.
/// This pass is necessary because the dead/undef status is not obvious anymore
/// when subregisters are involved.
///
/// Example:
/// %0 = some definition
/// %1 = IMPLICIT_DEF
/// %2 = REG_SEQUENCE %0, sub0, %1, sub1
/// %3 = EXTRACT_SUBREG %2, sub1
/// = use %3
/// The %0 definition is dead and %3 contains an undefined value.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_DETECTDEADLANES_H
#define LLVM_CODEGEN_DETECTDEADLANES_H
#include "llvm/ADT/BitVector.h"
#include "llvm/MC/LaneBitmask.h"
#include <deque>
namespace llvm {
class MachineInstr;
class MachineOperand;
class MachineRegisterInfo;
class TargetRegisterInfo;
class DeadLaneDetector {
public:
/// Contains a bitmask of which lanes of a given virtual register are
/// defined and which ones are actually used.
struct VRegInfo {
LaneBitmask UsedLanes;
LaneBitmask DefinedLanes;
};
DeadLaneDetector(const MachineRegisterInfo *MRI,
const TargetRegisterInfo *TRI);
/// Update the \p DefinedLanes and the \p UsedLanes for all virtual registers.
void computeSubRegisterLaneBitInfo();
const VRegInfo &getVRegInfo(unsigned RegIdx) const {
return VRegInfos[RegIdx];
}
bool isDefinedByCopy(unsigned RegIdx) const {
return DefinedByCopy.test(RegIdx);
}
private:
/// Add used lane bits on the register used by operand \p MO. This translates
/// the bitmask based on the operands subregister, and puts the register into
/// the worklist if any new bits were added.
void addUsedLanesOnOperand(const MachineOperand &MO, LaneBitmask UsedLanes);
/// Given a bitmask \p UsedLanes for the used lanes on a def output of a
/// COPY-like instruction determine the lanes used on the use operands
/// and call addUsedLanesOnOperand() for them.
void transferUsedLanesStep(const MachineInstr &MI, LaneBitmask UsedLanes);
/// Given a use regiser operand \p Use and a mask of defined lanes, check
/// if the operand belongs to a lowersToCopies() instruction, transfer the
/// mask to the def and put the instruction into the worklist.
void transferDefinedLanesStep(const MachineOperand &Use,
LaneBitmask DefinedLanes);
public:
/// Given a mask \p DefinedLanes of lanes defined at operand \p OpNum
/// of COPY-like instruction, determine which lanes are defined at the output
/// operand \p Def.
LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum,
LaneBitmask DefinedLanes) const;
/// Given a mask \p UsedLanes used from the output of instruction \p MI
/// determine which lanes are used from operand \p MO of this instruction.
LaneBitmask transferUsedLanes(const MachineInstr &MI, LaneBitmask UsedLanes,
const MachineOperand &MO) const;
private:
LaneBitmask determineInitialDefinedLanes(unsigned Reg);
LaneBitmask determineInitialUsedLanes(unsigned Reg);
const MachineRegisterInfo *MRI;
const TargetRegisterInfo *TRI;
void PutInWorklist(unsigned RegIdx) {
if (WorklistMembers.test(RegIdx))
return;
WorklistMembers.set(RegIdx);
Worklist.push_back(RegIdx);
}
std::unique_ptr<VRegInfo[]> VRegInfos;
/// Worklist containing virtreg indexes.
std::deque<unsigned> Worklist;
BitVector WorklistMembers;
/// This bitvector is set for each vreg index where the vreg is defined
/// by an instruction where lowersToCopies()==true.
BitVector DefinedByCopy;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_DETECTDEADLANES_H
PK iwFZ0
c�# �# CodeGen/VLIWMachineScheduler.hnu �[��� //===- VLIWMachineScheduler.h - VLIW-Focused Scheduling Pass ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// //
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_VLIWMACHINESCHEDULER_H
#define LLVM_CODEGEN_VLIWMACHINESCHEDULER_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Twine.h"
#include "llvm/CodeGen/MachineScheduler.h"
#include "llvm/CodeGen/TargetSchedule.h"
#include <limits>
#include <memory>
#include <utility>
namespace llvm {
class DFAPacketizer;
class RegisterClassInfo;
class ScheduleHazardRecognizer;
class SUnit;
class TargetInstrInfo;
class TargetSubtargetInfo;
class VLIWResourceModel {
protected:
const TargetInstrInfo *TII;
/// ResourcesModel - Represents VLIW state.
/// Not limited to VLIW targets per se, but assumes definition of resource
/// model by a target.
DFAPacketizer *ResourcesModel;
const TargetSchedModel *SchedModel;
/// Local packet/bundle model. Purely
/// internal to the MI scheduler at the time.
SmallVector<SUnit *> Packet;
/// Total packets created.
unsigned TotalPackets = 0;
public:
VLIWResourceModel(const TargetSubtargetInfo &STI, const TargetSchedModel *SM);
VLIWResourceModel &operator=(const VLIWResourceModel &other) = delete;
VLIWResourceModel(const VLIWResourceModel &other) = delete;
virtual ~VLIWResourceModel();
virtual void reset();
virtual bool hasDependence(const SUnit *SUd, const SUnit *SUu);
virtual bool isResourceAvailable(SUnit *SU, bool IsTop);
virtual bool reserveResources(SUnit *SU, bool IsTop);
unsigned getTotalPackets() const { return TotalPackets; }
size_t getPacketInstCount() const { return Packet.size(); }
bool isInPacket(SUnit *SU) const { return is_contained(Packet, SU); }
protected:
virtual DFAPacketizer *createPacketizer(const TargetSubtargetInfo &STI) const;
};
/// Extend the standard ScheduleDAGMILive to provide more context and override
/// the top-level schedule() driver.
class VLIWMachineScheduler : public ScheduleDAGMILive {
public:
VLIWMachineScheduler(MachineSchedContext *C,
std::unique_ptr<MachineSchedStrategy> S)
: ScheduleDAGMILive(C, std::move(S)) {}
/// Schedule - This is called back from ScheduleDAGInstrs::Run() when it's
/// time to do some work.
void schedule() override;
RegisterClassInfo *getRegClassInfo() { return RegClassInfo; }
int getBBSize() { return BB->size(); }
};
//===----------------------------------------------------------------------===//
// ConvergingVLIWScheduler - Implementation of a VLIW-aware
// MachineSchedStrategy.
//===----------------------------------------------------------------------===//
class ConvergingVLIWScheduler : public MachineSchedStrategy {
protected:
/// Store the state used by ConvergingVLIWScheduler heuristics, required
/// for the lifetime of one invocation of pickNode().
struct SchedCandidate {
// The best SUnit candidate.
SUnit *SU = nullptr;
// Register pressure values for the best candidate.
RegPressureDelta RPDelta;
// Best scheduling cost.
int SCost = 0;
SchedCandidate() = default;
};
/// Represent the type of SchedCandidate found within a single queue.
enum CandResult {
NoCand,
NodeOrder,
SingleExcess,
SingleCritical,
SingleMax,
MultiPressure,
BestCost,
Weak
};
// Constants used to denote relative importance of
// heuristic components for cost computation.
static constexpr unsigned PriorityOne = 200;
static constexpr unsigned PriorityTwo = 50;
static constexpr unsigned PriorityThree = 75;
static constexpr unsigned ScaleTwo = 10;
/// Each Scheduling boundary is associated with ready queues. It tracks the
/// current cycle in whichever direction at has moved, and maintains the state
/// of "hazards" and other interlocks at the current cycle.
struct VLIWSchedBoundary {
VLIWMachineScheduler *DAG = nullptr;
const TargetSchedModel *SchedModel = nullptr;
ReadyQueue Available;
ReadyQueue Pending;
bool CheckPending = false;
ScheduleHazardRecognizer *HazardRec = nullptr;
VLIWResourceModel *ResourceModel = nullptr;
unsigned CurrCycle = 0;
unsigned IssueCount = 0;
unsigned CriticalPathLength = 0;
/// MinReadyCycle - Cycle of the soonest available instruction.
unsigned MinReadyCycle = std::numeric_limits<unsigned>::max();
// Remember the greatest min operand latency.
unsigned MaxMinLatency = 0;
/// Pending queues extend the ready queues with the same ID and the
/// PendingFlag set.
VLIWSchedBoundary(unsigned ID, const Twine &Name)
: Available(ID, Name + ".A"),
Pending(ID << ConvergingVLIWScheduler::LogMaxQID, Name + ".P") {}
~VLIWSchedBoundary();
VLIWSchedBoundary &operator=(const VLIWSchedBoundary &other) = delete;
VLIWSchedBoundary(const VLIWSchedBoundary &other) = delete;
void init(VLIWMachineScheduler *dag, const TargetSchedModel *smodel) {
DAG = dag;
SchedModel = smodel;
CurrCycle = 0;
IssueCount = 0;
// Initialize the critical path length limit, which used by the scheduling
// cost model to determine the value for scheduling an instruction. We use
// a slightly different heuristic for small and large functions. For small
// functions, it's important to use the height/depth of the instruction.
// For large functions, prioritizing by height or depth increases spills.
CriticalPathLength = DAG->getBBSize() / SchedModel->getIssueWidth();
if (DAG->getBBSize() < 50)
// We divide by two as a cheap and simple heuristic to reduce the
// critcal path length, which increases the priority of using the graph
// height/depth in the scheduler's cost computation.
CriticalPathLength >>= 1;
else {
// For large basic blocks, we prefer a larger critical path length to
// decrease the priority of using the graph height/depth.
unsigned MaxPath = 0;
for (auto &SU : DAG->SUnits)
MaxPath = std::max(MaxPath, isTop() ? SU.getHeight() : SU.getDepth());
CriticalPathLength = std::max(CriticalPathLength, MaxPath) + 1;
}
}
bool isTop() const {
return Available.getID() == ConvergingVLIWScheduler::TopQID;
}
bool checkHazard(SUnit *SU);
void releaseNode(SUnit *SU, unsigned ReadyCycle);
void bumpCycle();
void bumpNode(SUnit *SU);
void releasePending();
void removeReady(SUnit *SU);
SUnit *pickOnlyChoice();
bool isLatencyBound(SUnit *SU) {
if (CurrCycle >= CriticalPathLength)
return true;
unsigned PathLength = isTop() ? SU->getHeight() : SU->getDepth();
return CriticalPathLength - CurrCycle <= PathLength;
}
};
VLIWMachineScheduler *DAG = nullptr;
const TargetSchedModel *SchedModel = nullptr;
// State of the top and bottom scheduled instruction boundaries.
VLIWSchedBoundary Top;
VLIWSchedBoundary Bot;
/// List of pressure sets that have a high pressure level in the region.
SmallVector<bool> HighPressureSets;
public:
/// SUnit::NodeQueueId: 0 (none), 1 (top), 2 (bot), 3 (both)
enum { TopQID = 1, BotQID = 2, LogMaxQID = 2 };
ConvergingVLIWScheduler() : Top(TopQID, "TopQ"), Bot(BotQID, "BotQ") {}
virtual ~ConvergingVLIWScheduler() = default;
void initialize(ScheduleDAGMI *dag) override;
SUnit *pickNode(bool &IsTopNode) override;
void schedNode(SUnit *SU, bool IsTopNode) override;
void releaseTopNode(SUnit *SU) override;
void releaseBottomNode(SUnit *SU) override;
unsigned reportPackets() {
return Top.ResourceModel->getTotalPackets() +
Bot.ResourceModel->getTotalPackets();
}
protected:
virtual VLIWResourceModel *
createVLIWResourceModel(const TargetSubtargetInfo &STI,
const TargetSchedModel *SchedModel) const;
SUnit *pickNodeBidrectional(bool &IsTopNode);
int pressureChange(const SUnit *SU, bool isBotUp);
virtual int SchedulingCost(ReadyQueue &Q, SUnit *SU,
SchedCandidate &Candidate, RegPressureDelta &Delta,
bool verbose);
CandResult pickNodeFromQueue(VLIWSchedBoundary &Zone,
const RegPressureTracker &RPTracker,
SchedCandidate &Candidate);
#ifndef NDEBUG
void traceCandidate(const char *Label, const ReadyQueue &Q, SUnit *SU,
int Cost, PressureChange P = PressureChange());
void readyQueueVerboseDump(const RegPressureTracker &RPTracker,
SchedCandidate &Candidate, ReadyQueue &Q);
#endif
};
} // end namespace llvm
#endif // LLVM_CODEGEN_VLIWMACHINESCHEDULER_H
PK iwFZ�7�9�+ �+ $ CodeGen/MachineInstrBundleIterator.hnu �[��� //===- llvm/CodeGen/MachineInstrBundleIterator.h ----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Defines an iterator class that bundles MachineInstr.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEINSTRBUNDLEITERATOR_H
#define LLVM_CODEGEN_MACHINEINSTRBUNDLEITERATOR_H
#include "llvm/ADT/ilist.h"
#include "llvm/ADT/simple_ilist.h"
#include <cassert>
#include <iterator>
#include <type_traits>
namespace llvm {
template <class T, bool IsReverse> struct MachineInstrBundleIteratorTraits;
template <class T> struct MachineInstrBundleIteratorTraits<T, false> {
using list_type = simple_ilist<T, ilist_sentinel_tracking<true>>;
using instr_iterator = typename list_type::iterator;
using nonconst_instr_iterator = typename list_type::iterator;
using const_instr_iterator = typename list_type::const_iterator;
};
template <class T> struct MachineInstrBundleIteratorTraits<T, true> {
using list_type = simple_ilist<T, ilist_sentinel_tracking<true>>;
using instr_iterator = typename list_type::reverse_iterator;
using nonconst_instr_iterator = typename list_type::reverse_iterator;
using const_instr_iterator = typename list_type::const_reverse_iterator;
};
template <class T> struct MachineInstrBundleIteratorTraits<const T, false> {
using list_type = simple_ilist<T, ilist_sentinel_tracking<true>>;
using instr_iterator = typename list_type::const_iterator;
using nonconst_instr_iterator = typename list_type::iterator;
using const_instr_iterator = typename list_type::const_iterator;
};
template <class T> struct MachineInstrBundleIteratorTraits<const T, true> {
using list_type = simple_ilist<T, ilist_sentinel_tracking<true>>;
using instr_iterator = typename list_type::const_reverse_iterator;
using nonconst_instr_iterator = typename list_type::reverse_iterator;
using const_instr_iterator = typename list_type::const_reverse_iterator;
};
template <bool IsReverse> struct MachineInstrBundleIteratorHelper;
template <> struct MachineInstrBundleIteratorHelper<false> {
/// Get the beginning of the current bundle.
template <class Iterator> static Iterator getBundleBegin(Iterator I) {
if (!I.isEnd())
while (I->isBundledWithPred())
--I;
return I;
}
/// Get the final node of the current bundle.
template <class Iterator> static Iterator getBundleFinal(Iterator I) {
if (!I.isEnd())
while (I->isBundledWithSucc())
++I;
return I;
}
/// Increment forward ilist iterator.
template <class Iterator> static void increment(Iterator &I) {
I = std::next(getBundleFinal(I));
}
/// Decrement forward ilist iterator.
template <class Iterator> static void decrement(Iterator &I) {
I = getBundleBegin(std::prev(I));
}
};
template <> struct MachineInstrBundleIteratorHelper<true> {
/// Get the beginning of the current bundle.
template <class Iterator> static Iterator getBundleBegin(Iterator I) {
return MachineInstrBundleIteratorHelper<false>::getBundleBegin(
I.getReverse())
.getReverse();
}
/// Get the final node of the current bundle.
template <class Iterator> static Iterator getBundleFinal(Iterator I) {
return MachineInstrBundleIteratorHelper<false>::getBundleFinal(
I.getReverse())
.getReverse();
}
/// Increment reverse ilist iterator.
template <class Iterator> static void increment(Iterator &I) {
I = getBundleBegin(std::next(I));
}
/// Decrement reverse ilist iterator.
template <class Iterator> static void decrement(Iterator &I) {
I = std::prev(getBundleFinal(I));
}
};
/// MachineBasicBlock iterator that automatically skips over MIs that are
/// inside bundles (i.e. walk top level MIs only).
template <typename Ty, bool IsReverse = false>
class MachineInstrBundleIterator : MachineInstrBundleIteratorHelper<IsReverse> {
using Traits = MachineInstrBundleIteratorTraits<Ty, IsReverse>;
using instr_iterator = typename Traits::instr_iterator;
instr_iterator MII;
public:
using value_type = typename instr_iterator::value_type;
using difference_type = typename instr_iterator::difference_type;
using pointer = typename instr_iterator::pointer;
using reference = typename instr_iterator::reference;
using const_pointer = typename instr_iterator::const_pointer;
using const_reference = typename instr_iterator::const_reference;
using iterator_category = std::bidirectional_iterator_tag;
private:
using nonconst_instr_iterator = typename Traits::nonconst_instr_iterator;
using const_instr_iterator = typename Traits::const_instr_iterator;
using nonconst_iterator =
MachineInstrBundleIterator<typename nonconst_instr_iterator::value_type,
IsReverse>;
using reverse_iterator = MachineInstrBundleIterator<Ty, !IsReverse>;
public:
MachineInstrBundleIterator(instr_iterator MI) : MII(MI) {
assert((!MI.getNodePtr() || MI.isEnd() || !MI->isBundledWithPred()) &&
"It's not legal to initialize MachineInstrBundleIterator with a "
"bundled MI");
}
MachineInstrBundleIterator(reference MI) : MII(MI) {
assert(!MI.isBundledWithPred() && "It's not legal to initialize "
"MachineInstrBundleIterator with a "
"bundled MI");
}
MachineInstrBundleIterator(pointer MI) : MII(MI) {
// FIXME: This conversion should be explicit.
assert((!MI || !MI->isBundledWithPred()) && "It's not legal to initialize "
"MachineInstrBundleIterator "
"with a bundled MI");
}
// Template allows conversion from const to nonconst.
template <class OtherTy>
MachineInstrBundleIterator(
const MachineInstrBundleIterator<OtherTy, IsReverse> &I,
std::enable_if_t<std::is_convertible<OtherTy *, Ty *>::value, void *> =
nullptr)
: MII(I.getInstrIterator()) {}
MachineInstrBundleIterator() : MII(nullptr) {}
/// Explicit conversion between forward/reverse iterators.
///
/// Translate between forward and reverse iterators without changing range
/// boundaries. The resulting iterator will dereference (and have a handle)
/// to the previous node, which is somewhat unexpected; but converting the
/// two endpoints in a range will give the same range in reverse.
///
/// This matches std::reverse_iterator conversions.
explicit MachineInstrBundleIterator(
const MachineInstrBundleIterator<Ty, !IsReverse> &I)
: MachineInstrBundleIterator(++I.getReverse()) {}
/// Get the bundle iterator for the given instruction's bundle.
static MachineInstrBundleIterator getAtBundleBegin(instr_iterator MI) {
return MachineInstrBundleIteratorHelper<IsReverse>::getBundleBegin(MI);
}
reference operator*() const { return *MII; }
pointer operator->() const { return &operator*(); }
/// Check for null.
bool isValid() const { return MII.getNodePtr(); }
friend bool operator==(const MachineInstrBundleIterator &L,
const MachineInstrBundleIterator &R) {
return L.MII == R.MII;
}
friend bool operator==(const MachineInstrBundleIterator &L,
const const_instr_iterator &R) {
return L.MII == R; // Avoid assertion about validity of R.
}
friend bool operator==(const const_instr_iterator &L,
const MachineInstrBundleIterator &R) {
return L == R.MII; // Avoid assertion about validity of L.
}
friend bool operator==(const MachineInstrBundleIterator &L,
const nonconst_instr_iterator &R) {
return L.MII == R; // Avoid assertion about validity of R.
}
friend bool operator==(const nonconst_instr_iterator &L,
const MachineInstrBundleIterator &R) {
return L == R.MII; // Avoid assertion about validity of L.
}
friend bool operator==(const MachineInstrBundleIterator &L, const_pointer R) {
return L == const_instr_iterator(R); // Avoid assertion about validity of R.
}
friend bool operator==(const_pointer L, const MachineInstrBundleIterator &R) {
return const_instr_iterator(L) == R; // Avoid assertion about validity of L.
}
friend bool operator==(const MachineInstrBundleIterator &L,
const_reference R) {
return L == &R; // Avoid assertion about validity of R.
}
friend bool operator==(const_reference L,
const MachineInstrBundleIterator &R) {
return &L == R; // Avoid assertion about validity of L.
}
friend bool operator!=(const MachineInstrBundleIterator &L,
const MachineInstrBundleIterator &R) {
return !(L == R);
}
friend bool operator!=(const MachineInstrBundleIterator &L,
const const_instr_iterator &R) {
return !(L == R);
}
friend bool operator!=(const const_instr_iterator &L,
const MachineInstrBundleIterator &R) {
return !(L == R);
}
friend bool operator!=(const MachineInstrBundleIterator &L,
const nonconst_instr_iterator &R) {
return !(L == R);
}
friend bool operator!=(const nonconst_instr_iterator &L,
const MachineInstrBundleIterator &R) {
return !(L == R);
}
friend bool operator!=(const MachineInstrBundleIterator &L, const_pointer R) {
return !(L == R);
}
friend bool operator!=(const_pointer L, const MachineInstrBundleIterator &R) {
return !(L == R);
}
friend bool operator!=(const MachineInstrBundleIterator &L,
const_reference R) {
return !(L == R);
}
friend bool operator!=(const_reference L,
const MachineInstrBundleIterator &R) {
return !(L == R);
}
// Increment and decrement operators...
MachineInstrBundleIterator &operator--() {
this->decrement(MII);
return *this;
}
MachineInstrBundleIterator &operator++() {
this->increment(MII);
return *this;
}
MachineInstrBundleIterator operator--(int) {
MachineInstrBundleIterator Temp = *this;
--*this;
return Temp;
}
MachineInstrBundleIterator operator++(int) {
MachineInstrBundleIterator Temp = *this;
++*this;
return Temp;
}
instr_iterator getInstrIterator() const { return MII; }
nonconst_iterator getNonConstIterator() const { return MII.getNonConst(); }
/// Get a reverse iterator to the same node.
///
/// Gives a reverse iterator that will dereference (and have a handle) to the
/// same node. Converting the endpoint iterators in a range will give a
/// different range; for range operations, use the explicit conversions.
reverse_iterator getReverse() const { return MII.getReverse(); }
};
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINEINSTRBUNDLEITERATOR_H
PK iwFZ�'[A [A CodeGen/LowLevelType.hnu �[��� //== llvm/CodeGen/LowLevelType.h ------------------------------- -*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// Implement a low-level type suitable for MachineInstr level instruction
/// selection.
///
/// For a type attached to a MachineInstr, we only care about 2 details: total
/// size and the number of vector lanes (if any). Accordingly, there are 4
/// possible valid type-kinds:
///
/// * `sN` for scalars and aggregates
/// * `<N x sM>` for vectors, which must have at least 2 elements.
/// * `pN` for pointers
///
/// Other information required for correct selection is expected to be carried
/// by the opcode, or non-type flags. For example the distinction between G_ADD
/// and G_FADD for int/float or fast-math flags.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LOWLEVELTYPE_H
#define LLVM_CODEGEN_LOWLEVELTYPE_H
#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/CodeGen/MachineValueType.h"
#include "llvm/Support/Debug.h"
#include <cassert>
namespace llvm {
class Type;
class raw_ostream;
class LLT {
public:
/// Get a low-level scalar or aggregate "bag of bits".
static constexpr LLT scalar(unsigned SizeInBits) {
return LLT{/*isPointer=*/false, /*isVector=*/false, /*isScalar=*/true,
ElementCount::getFixed(0), SizeInBits,
/*AddressSpace=*/0};
}
/// Get a low-level pointer in the given address space.
static constexpr LLT pointer(unsigned AddressSpace, unsigned SizeInBits) {
assert(SizeInBits > 0 && "invalid pointer size");
return LLT{/*isPointer=*/true, /*isVector=*/false, /*isScalar=*/false,
ElementCount::getFixed(0), SizeInBits, AddressSpace};
}
/// Get a low-level vector of some number of elements and element width.
static constexpr LLT vector(ElementCount EC, unsigned ScalarSizeInBits) {
assert(!EC.isScalar() && "invalid number of vector elements");
return LLT{/*isPointer=*/false, /*isVector=*/true, /*isScalar=*/false,
EC, ScalarSizeInBits, /*AddressSpace=*/0};
}
/// Get a low-level vector of some number of elements and element type.
static constexpr LLT vector(ElementCount EC, LLT ScalarTy) {
assert(!EC.isScalar() && "invalid number of vector elements");
assert(!ScalarTy.isVector() && "invalid vector element type");
return LLT{ScalarTy.isPointer(),
/*isVector=*/true,
/*isScalar=*/false,
EC,
ScalarTy.getSizeInBits().getFixedValue(),
ScalarTy.isPointer() ? ScalarTy.getAddressSpace() : 0};
}
/// Get a low-level fixed-width vector of some number of elements and element
/// width.
static constexpr LLT fixed_vector(unsigned NumElements,
unsigned ScalarSizeInBits) {
return vector(ElementCount::getFixed(NumElements), ScalarSizeInBits);
}
/// Get a low-level fixed-width vector of some number of elements and element
/// type.
static constexpr LLT fixed_vector(unsigned NumElements, LLT ScalarTy) {
return vector(ElementCount::getFixed(NumElements), ScalarTy);
}
/// Get a low-level scalable vector of some number of elements and element
/// width.
static constexpr LLT scalable_vector(unsigned MinNumElements,
unsigned ScalarSizeInBits) {
return vector(ElementCount::getScalable(MinNumElements), ScalarSizeInBits);
}
/// Get a low-level scalable vector of some number of elements and element
/// type.
static constexpr LLT scalable_vector(unsigned MinNumElements, LLT ScalarTy) {
return vector(ElementCount::getScalable(MinNumElements), ScalarTy);
}
static constexpr LLT scalarOrVector(ElementCount EC, LLT ScalarTy) {
return EC.isScalar() ? ScalarTy : LLT::vector(EC, ScalarTy);
}
static constexpr LLT scalarOrVector(ElementCount EC, uint64_t ScalarSize) {
assert(ScalarSize <= std::numeric_limits<unsigned>::max() &&
"Not enough bits in LLT to represent size");
return scalarOrVector(EC, LLT::scalar(static_cast<unsigned>(ScalarSize)));
}
explicit constexpr LLT(bool isPointer, bool isVector, bool isScalar,
ElementCount EC, uint64_t SizeInBits,
unsigned AddressSpace)
: LLT() {
init(isPointer, isVector, isScalar, EC, SizeInBits, AddressSpace);
}
explicit constexpr LLT()
: IsScalar(false), IsPointer(false), IsVector(false), RawData(0) {}
explicit LLT(MVT VT);
constexpr bool isValid() const { return IsScalar || RawData != 0; }
constexpr bool isScalar() const { return IsScalar; }
constexpr bool isPointer() const {
return isValid() && IsPointer && !IsVector;
}
constexpr bool isVector() const { return isValid() && IsVector; }
/// Returns the number of elements in a vector LLT. Must only be called on
/// vector types.
constexpr uint16_t getNumElements() const {
if (isScalable())
llvm::reportInvalidSizeRequest(
"Possible incorrect use of LLT::getNumElements() for "
"scalable vector. Scalable flag may be dropped, use "
"LLT::getElementCount() instead");
return getElementCount().getKnownMinValue();
}
/// Returns true if the LLT is a scalable vector. Must only be called on
/// vector types.
constexpr bool isScalable() const {
assert(isVector() && "Expected a vector type");
return IsPointer ? getFieldValue(PointerVectorScalableFieldInfo)
: getFieldValue(VectorScalableFieldInfo);
}
constexpr ElementCount getElementCount() const {
assert(IsVector && "cannot get number of elements on scalar/aggregate");
return ElementCount::get(IsPointer
? getFieldValue(PointerVectorElementsFieldInfo)
: getFieldValue(VectorElementsFieldInfo),
isScalable());
}
/// Returns the total size of the type. Must only be called on sized types.
constexpr TypeSize getSizeInBits() const {
if (isPointer() || isScalar())
return TypeSize::Fixed(getScalarSizeInBits());
auto EC = getElementCount();
return TypeSize(getScalarSizeInBits() * EC.getKnownMinValue(),
EC.isScalable());
}
/// Returns the total size of the type in bytes, i.e. number of whole bytes
/// needed to represent the size in bits. Must only be called on sized types.
constexpr TypeSize getSizeInBytes() const {
TypeSize BaseSize = getSizeInBits();
return {(BaseSize.getKnownMinValue() + 7) / 8, BaseSize.isScalable()};
}
constexpr LLT getScalarType() const {
return isVector() ? getElementType() : *this;
}
/// If this type is a vector, return a vector with the same number of elements
/// but the new element type. Otherwise, return the new element type.
constexpr LLT changeElementType(LLT NewEltTy) const {
return isVector() ? LLT::vector(getElementCount(), NewEltTy) : NewEltTy;
}
/// If this type is a vector, return a vector with the same number of elements
/// but the new element size. Otherwise, return the new element type. Invalid
/// for pointer types. For pointer types, use changeElementType.
constexpr LLT changeElementSize(unsigned NewEltSize) const {
assert(!getScalarType().isPointer() &&
"invalid to directly change element size for pointers");
return isVector() ? LLT::vector(getElementCount(), NewEltSize)
: LLT::scalar(NewEltSize);
}
/// Return a vector or scalar with the same element type and the new element
/// count.
constexpr LLT changeElementCount(ElementCount EC) const {
return LLT::scalarOrVector(EC, getScalarType());
}
/// Return a type that is \p Factor times smaller. Reduces the number of
/// elements if this is a vector, or the bitwidth for scalar/pointers. Does
/// not attempt to handle cases that aren't evenly divisible.
constexpr LLT divide(int Factor) const {
assert(Factor != 1);
assert((!isScalar() || getScalarSizeInBits() != 0) &&
"cannot divide scalar of size zero");
if (isVector()) {
assert(getElementCount().isKnownMultipleOf(Factor));
return scalarOrVector(getElementCount().divideCoefficientBy(Factor),
getElementType());
}
assert(getScalarSizeInBits() % Factor == 0);
return scalar(getScalarSizeInBits() / Factor);
}
/// Produce a vector type that is \p Factor times bigger, preserving the
/// element type. For a scalar or pointer, this will produce a new vector with
/// \p Factor elements.
constexpr LLT multiplyElements(int Factor) const {
if (isVector()) {
return scalarOrVector(getElementCount().multiplyCoefficientBy(Factor),
getElementType());
}
return fixed_vector(Factor, *this);
}
constexpr bool isByteSized() const {
return getSizeInBits().isKnownMultipleOf(8);
}
constexpr unsigned getScalarSizeInBits() const {
if (IsScalar)
return getFieldValue(ScalarSizeFieldInfo);
if (IsVector) {
if (!IsPointer)
return getFieldValue(VectorSizeFieldInfo);
else
return getFieldValue(PointerVectorSizeFieldInfo);
}
assert(IsPointer && "unexpected LLT");
return getFieldValue(PointerSizeFieldInfo);
}
constexpr unsigned getAddressSpace() const {
assert(RawData != 0 && "Invalid Type");
assert(IsPointer && "cannot get address space of non-pointer type");
if (!IsVector)
return getFieldValue(PointerAddressSpaceFieldInfo);
else
return getFieldValue(PointerVectorAddressSpaceFieldInfo);
}
/// Returns the vector's element type. Only valid for vector types.
constexpr LLT getElementType() const {
assert(isVector() && "cannot get element type of scalar/aggregate");
if (IsPointer)
return pointer(getAddressSpace(), getScalarSizeInBits());
else
return scalar(getScalarSizeInBits());
}
void print(raw_ostream &OS) const;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD void dump() const;
#endif
constexpr bool operator==(const LLT &RHS) const {
return IsPointer == RHS.IsPointer && IsVector == RHS.IsVector &&
IsScalar == RHS.IsScalar && RHS.RawData == RawData;
}
constexpr bool operator!=(const LLT &RHS) const { return !(*this == RHS); }
friend struct DenseMapInfo<LLT>;
friend class GISelInstProfileBuilder;
private:
/// LLT is packed into 64 bits as follows:
/// isScalar : 1
/// isPointer : 1
/// isVector : 1
/// with 61 bits remaining for Kind-specific data, packed in bitfields
/// as described below. As there isn't a simple portable way to pack bits
/// into bitfields, here the different fields in the packed structure is
/// described in static const *Field variables. Each of these variables
/// is a 2-element array, with the first element describing the bitfield size
/// and the second element describing the bitfield offset.
typedef int BitFieldInfo[2];
///
/// This is how the bitfields are packed per Kind:
/// * Invalid:
/// gets encoded as RawData == 0, as that is an invalid encoding, since for
/// valid encodings, SizeInBits/SizeOfElement must be larger than 0.
/// * Non-pointer scalar (isPointer == 0 && isVector == 0):
/// SizeInBits: 32;
static const constexpr BitFieldInfo ScalarSizeFieldInfo{32, 0};
/// * Pointer (isPointer == 1 && isVector == 0):
/// SizeInBits: 16;
/// AddressSpace: 24;
static const constexpr BitFieldInfo PointerSizeFieldInfo{16, 0};
static const constexpr BitFieldInfo PointerAddressSpaceFieldInfo{
24, PointerSizeFieldInfo[0] + PointerSizeFieldInfo[1]};
static_assert((PointerAddressSpaceFieldInfo[0] +
PointerAddressSpaceFieldInfo[1]) <= 61,
"Insufficient bits to encode all data");
/// * Vector-of-non-pointer (isPointer == 0 && isVector == 1):
/// NumElements: 16;
/// SizeOfElement: 32;
/// Scalable: 1;
static const constexpr BitFieldInfo VectorElementsFieldInfo{16, 0};
static const constexpr BitFieldInfo VectorSizeFieldInfo{
32, VectorElementsFieldInfo[0] + VectorElementsFieldInfo[1]};
static const constexpr BitFieldInfo VectorScalableFieldInfo{
1, VectorSizeFieldInfo[0] + VectorSizeFieldInfo[1]};
static_assert((VectorSizeFieldInfo[0] + VectorSizeFieldInfo[1]) <= 61,
"Insufficient bits to encode all data");
/// * Vector-of-pointer (isPointer == 1 && isVector == 1):
/// NumElements: 16;
/// SizeOfElement: 16;
/// AddressSpace: 24;
/// Scalable: 1;
static const constexpr BitFieldInfo PointerVectorElementsFieldInfo{16, 0};
static const constexpr BitFieldInfo PointerVectorSizeFieldInfo{
16,
PointerVectorElementsFieldInfo[1] + PointerVectorElementsFieldInfo[0]};
static const constexpr BitFieldInfo PointerVectorAddressSpaceFieldInfo{
24, PointerVectorSizeFieldInfo[1] + PointerVectorSizeFieldInfo[0]};
static const constexpr BitFieldInfo PointerVectorScalableFieldInfo{
1, PointerVectorAddressSpaceFieldInfo[0] +
PointerVectorAddressSpaceFieldInfo[1]};
static_assert((PointerVectorAddressSpaceFieldInfo[0] +
PointerVectorAddressSpaceFieldInfo[1]) <= 61,
"Insufficient bits to encode all data");
uint64_t IsScalar : 1;
uint64_t IsPointer : 1;
uint64_t IsVector : 1;
uint64_t RawData : 61;
static constexpr uint64_t getMask(const BitFieldInfo FieldInfo) {
const int FieldSizeInBits = FieldInfo[0];
return (((uint64_t)1) << FieldSizeInBits) - 1;
}
static constexpr uint64_t maskAndShift(uint64_t Val, uint64_t Mask,
uint8_t Shift) {
assert(Val <= Mask && "Value too large for field");
return (Val & Mask) << Shift;
}
static constexpr uint64_t maskAndShift(uint64_t Val,
const BitFieldInfo FieldInfo) {
return maskAndShift(Val, getMask(FieldInfo), FieldInfo[1]);
}
constexpr uint64_t getFieldValue(const BitFieldInfo FieldInfo) const {
return getMask(FieldInfo) & (RawData >> FieldInfo[1]);
}
constexpr void init(bool IsPointer, bool IsVector, bool IsScalar,
ElementCount EC, uint64_t SizeInBits,
unsigned AddressSpace) {
assert(SizeInBits <= std::numeric_limits<unsigned>::max() &&
"Not enough bits in LLT to represent size");
this->IsPointer = IsPointer;
this->IsVector = IsVector;
this->IsScalar = IsScalar;
if (IsScalar)
RawData = maskAndShift(SizeInBits, ScalarSizeFieldInfo);
else if (IsVector) {
assert(EC.isVector() && "invalid number of vector elements");
if (!IsPointer)
RawData =
maskAndShift(EC.getKnownMinValue(), VectorElementsFieldInfo) |
maskAndShift(SizeInBits, VectorSizeFieldInfo) |
maskAndShift(EC.isScalable() ? 1 : 0, VectorScalableFieldInfo);
else
RawData =
maskAndShift(EC.getKnownMinValue(),
PointerVectorElementsFieldInfo) |
maskAndShift(SizeInBits, PointerVectorSizeFieldInfo) |
maskAndShift(AddressSpace, PointerVectorAddressSpaceFieldInfo) |
maskAndShift(EC.isScalable() ? 1 : 0,
PointerVectorScalableFieldInfo);
} else if (IsPointer)
RawData = maskAndShift(SizeInBits, PointerSizeFieldInfo) |
maskAndShift(AddressSpace, PointerAddressSpaceFieldInfo);
else
llvm_unreachable("unexpected LLT configuration");
}
public:
constexpr uint64_t getUniqueRAWLLTData() const {
return ((uint64_t)RawData) << 3 | ((uint64_t)IsScalar) << 2 |
((uint64_t)IsPointer) << 1 | ((uint64_t)IsVector);
}
};
inline raw_ostream& operator<<(raw_ostream &OS, const LLT &Ty) {
Ty.print(OS);
return OS;
}
template<> struct DenseMapInfo<LLT> {
static inline LLT getEmptyKey() {
LLT Invalid;
Invalid.IsPointer = true;
return Invalid;
}
static inline LLT getTombstoneKey() {
LLT Invalid;
Invalid.IsVector = true;
return Invalid;
}
static inline unsigned getHashValue(const LLT &Ty) {
uint64_t Val = Ty.getUniqueRAWLLTData();
return DenseMapInfo<uint64_t>::getHashValue(Val);
}
static bool isEqual(const LLT &LHS, const LLT &RHS) {
return LHS == RHS;
}
};
}
#endif // LLVM_CODEGEN_LOWLEVELTYPE_H
PK iwFZy>P�? �? CodeGen/ModuloSchedule.hnu �[��� //===- ModuloSchedule.h - Software pipeline schedule expansion ------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Software pipelining (SWP) is an instruction scheduling technique for loops
// that overlaps loop iterations and exploits ILP via compiler transformations.
//
// There are multiple methods for analyzing a loop and creating a schedule.
// An example algorithm is Swing Modulo Scheduling (implemented by the
// MachinePipeliner). The details of how a schedule is arrived at are irrelevant
// for the task of actually rewriting a loop to adhere to the schedule, which
// is what this file does.
//
// A schedule is, for every instruction in a block, a Cycle and a Stage. Note
// that we only support single-block loops, so "block" and "loop" can be used
// interchangably.
//
// The Cycle of an instruction defines a partial order of the instructions in
// the remapped loop. Instructions within a cycle must not consume the output
// of any instruction in the same cycle. Cycle information is assumed to have
// been calculated such that the processor will execute instructions in
// lock-step (for example in a VLIW ISA).
//
// The Stage of an instruction defines the mapping between logical loop
// iterations and pipelined loop iterations. An example (unrolled) pipeline
// may look something like:
//
// I0[0] Execute instruction I0 of iteration 0
// I1[0], I0[1] Execute I0 of iteration 1 and I1 of iteration 1
// I1[1], I0[2]
// I1[2], I0[3]
//
// In the schedule for this unrolled sequence we would say that I0 was scheduled
// in stage 0 and I1 in stage 1:
//
// loop:
// [stage 0] x = I0
// [stage 1] I1 x (from stage 0)
//
// And to actually generate valid code we must insert a phi:
//
// loop:
// x' = phi(x)
// x = I0
// I1 x'
//
// This is a simple example; the rules for how to generate correct code given
// an arbitrary schedule containing loop-carried values are complex.
//
// Note that these examples only mention the steady-state kernel of the
// generated loop; prologs and epilogs must be generated also that prime and
// flush the pipeline. Doing so is nontrivial.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MODULOSCHEDULE_H
#define LLVM_CODEGEN_MODULOSCHEDULE_H
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineLoopUtils.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include <deque>
#include <vector>
namespace llvm {
class MachineBasicBlock;
class MachineLoop;
class MachineRegisterInfo;
class MachineInstr;
class LiveIntervals;
/// Represents a schedule for a single-block loop. For every instruction we
/// maintain a Cycle and Stage.
class ModuloSchedule {
private:
/// The block containing the loop instructions.
MachineLoop *Loop;
/// The instructions to be generated, in total order. Cycle provides a partial
/// order; the total order within cycles has been decided by the schedule
/// producer.
std::vector<MachineInstr *> ScheduledInstrs;
/// The cycle for each instruction.
DenseMap<MachineInstr *, int> Cycle;
/// The stage for each instruction.
DenseMap<MachineInstr *, int> Stage;
/// The number of stages in this schedule (Max(Stage) + 1).
int NumStages;
public:
/// Create a new ModuloSchedule.
/// \arg ScheduledInstrs The new loop instructions, in total resequenced
/// order.
/// \arg Cycle Cycle index for all instructions in ScheduledInstrs. Cycle does
/// not need to start at zero. ScheduledInstrs must be partially ordered by
/// Cycle.
/// \arg Stage Stage index for all instructions in ScheduleInstrs.
ModuloSchedule(MachineFunction &MF, MachineLoop *Loop,
std::vector<MachineInstr *> ScheduledInstrs,
DenseMap<MachineInstr *, int> Cycle,
DenseMap<MachineInstr *, int> Stage)
: Loop(Loop), ScheduledInstrs(ScheduledInstrs), Cycle(std::move(Cycle)),
Stage(std::move(Stage)) {
NumStages = 0;
for (auto &KV : this->Stage)
NumStages = std::max(NumStages, KV.second);
++NumStages;
}
/// Return the single-block loop being scheduled.
MachineLoop *getLoop() const { return Loop; }
/// Return the number of stages contained in this schedule, which is the
/// largest stage index + 1.
int getNumStages() const { return NumStages; }
/// Return the first cycle in the schedule, which is the cycle index of the
/// first instruction.
int getFirstCycle() { return Cycle[ScheduledInstrs.front()]; }
/// Return the final cycle in the schedule, which is the cycle index of the
/// last instruction.
int getFinalCycle() { return Cycle[ScheduledInstrs.back()]; }
/// Return the stage that MI is scheduled in, or -1.
int getStage(MachineInstr *MI) {
auto I = Stage.find(MI);
return I == Stage.end() ? -1 : I->second;
}
/// Return the cycle that MI is scheduled at, or -1.
int getCycle(MachineInstr *MI) {
auto I = Cycle.find(MI);
return I == Cycle.end() ? -1 : I->second;
}
/// Set the stage of a newly created instruction.
void setStage(MachineInstr *MI, int MIStage) {
assert(Stage.count(MI) == 0);
Stage[MI] = MIStage;
}
/// Return the rescheduled instructions in order.
ArrayRef<MachineInstr *> getInstructions() { return ScheduledInstrs; }
void dump() { print(dbgs()); }
void print(raw_ostream &OS);
};
/// The ModuloScheduleExpander takes a ModuloSchedule and expands it in-place,
/// rewriting the old loop and inserting prologs and epilogs as required.
class ModuloScheduleExpander {
public:
using InstrChangesTy = DenseMap<MachineInstr *, std::pair<unsigned, int64_t>>;
private:
using ValueMapTy = DenseMap<unsigned, unsigned>;
using MBBVectorTy = SmallVectorImpl<MachineBasicBlock *>;
using InstrMapTy = DenseMap<MachineInstr *, MachineInstr *>;
ModuloSchedule &Schedule;
MachineFunction &MF;
const TargetSubtargetInfo &ST;
MachineRegisterInfo &MRI;
const TargetInstrInfo *TII = nullptr;
LiveIntervals &LIS;
MachineBasicBlock *BB = nullptr;
MachineBasicBlock *Preheader = nullptr;
MachineBasicBlock *NewKernel = nullptr;
std::unique_ptr<TargetInstrInfo::PipelinerLoopInfo> LoopInfo;
/// Map for each register and the max difference between its uses and def.
/// The first element in the pair is the max difference in stages. The
/// second is true if the register defines a Phi value and loop value is
/// scheduled before the Phi.
std::map<unsigned, std::pair<unsigned, bool>> RegToStageDiff;
/// Instructions to change when emitting the final schedule.
InstrChangesTy InstrChanges;
void generatePipelinedLoop();
void generateProlog(unsigned LastStage, MachineBasicBlock *KernelBB,
ValueMapTy *VRMap, MBBVectorTy &PrologBBs);
void generateEpilog(unsigned LastStage, MachineBasicBlock *KernelBB,
MachineBasicBlock *OrigBB, ValueMapTy *VRMap,
ValueMapTy *VRMapPhi, MBBVectorTy &EpilogBBs,
MBBVectorTy &PrologBBs);
void generateExistingPhis(MachineBasicBlock *NewBB, MachineBasicBlock *BB1,
MachineBasicBlock *BB2, MachineBasicBlock *KernelBB,
ValueMapTy *VRMap, InstrMapTy &InstrMap,
unsigned LastStageNum, unsigned CurStageNum,
bool IsLast);
void generatePhis(MachineBasicBlock *NewBB, MachineBasicBlock *BB1,
MachineBasicBlock *BB2, MachineBasicBlock *KernelBB,
ValueMapTy *VRMap, ValueMapTy *VRMapPhi,
InstrMapTy &InstrMap, unsigned LastStageNum,
unsigned CurStageNum, bool IsLast);
void removeDeadInstructions(MachineBasicBlock *KernelBB,
MBBVectorTy &EpilogBBs);
void splitLifetimes(MachineBasicBlock *KernelBB, MBBVectorTy &EpilogBBs);
void addBranches(MachineBasicBlock &PreheaderBB, MBBVectorTy &PrologBBs,
MachineBasicBlock *KernelBB, MBBVectorTy &EpilogBBs,
ValueMapTy *VRMap);
bool computeDelta(MachineInstr &MI, unsigned &Delta);
void updateMemOperands(MachineInstr &NewMI, MachineInstr &OldMI,
unsigned Num);
MachineInstr *cloneInstr(MachineInstr *OldMI, unsigned CurStageNum,
unsigned InstStageNum);
MachineInstr *cloneAndChangeInstr(MachineInstr *OldMI, unsigned CurStageNum,
unsigned InstStageNum);
void updateInstruction(MachineInstr *NewMI, bool LastDef,
unsigned CurStageNum, unsigned InstrStageNum,
ValueMapTy *VRMap);
MachineInstr *findDefInLoop(unsigned Reg);
unsigned getPrevMapVal(unsigned StageNum, unsigned PhiStage, unsigned LoopVal,
unsigned LoopStage, ValueMapTy *VRMap,
MachineBasicBlock *BB);
void rewritePhiValues(MachineBasicBlock *NewBB, unsigned StageNum,
ValueMapTy *VRMap, InstrMapTy &InstrMap);
void rewriteScheduledInstr(MachineBasicBlock *BB, InstrMapTy &InstrMap,
unsigned CurStageNum, unsigned PhiNum,
MachineInstr *Phi, unsigned OldReg,
unsigned NewReg, unsigned PrevReg = 0);
bool isLoopCarried(MachineInstr &Phi);
/// Return the max. number of stages/iterations that can occur between a
/// register definition and its uses.
unsigned getStagesForReg(int Reg, unsigned CurStage) {
std::pair<unsigned, bool> Stages = RegToStageDiff[Reg];
if ((int)CurStage > Schedule.getNumStages() - 1 && Stages.first == 0 &&
Stages.second)
return 1;
return Stages.first;
}
/// The number of stages for a Phi is a little different than other
/// instructions. The minimum value computed in RegToStageDiff is 1
/// because we assume the Phi is needed for at least 1 iteration.
/// This is not the case if the loop value is scheduled prior to the
/// Phi in the same stage. This function returns the number of stages
/// or iterations needed between the Phi definition and any uses.
unsigned getStagesForPhi(int Reg) {
std::pair<unsigned, bool> Stages = RegToStageDiff[Reg];
if (Stages.second)
return Stages.first;
return Stages.first - 1;
}
public:
/// Create a new ModuloScheduleExpander.
/// \arg InstrChanges Modifications to make to instructions with memory
/// operands.
/// FIXME: InstrChanges is opaque and is an implementation detail of an
/// optimization in MachinePipeliner that crosses abstraction boundaries.
ModuloScheduleExpander(MachineFunction &MF, ModuloSchedule &S,
LiveIntervals &LIS, InstrChangesTy InstrChanges)
: Schedule(S), MF(MF), ST(MF.getSubtarget()), MRI(MF.getRegInfo()),
TII(ST.getInstrInfo()), LIS(LIS),
InstrChanges(std::move(InstrChanges)) {}
/// Performs the actual expansion.
void expand();
/// Performs final cleanup after expansion.
void cleanup();
/// Returns the newly rewritten kernel block, or nullptr if this was
/// optimized away.
MachineBasicBlock *getRewrittenKernel() { return NewKernel; }
};
/// A reimplementation of ModuloScheduleExpander. It works by generating a
/// standalone kernel loop and peeling out the prologs and epilogs.
class PeelingModuloScheduleExpander {
public:
PeelingModuloScheduleExpander(MachineFunction &MF, ModuloSchedule &S,
LiveIntervals *LIS)
: Schedule(S), MF(MF), ST(MF.getSubtarget()), MRI(MF.getRegInfo()),
TII(ST.getInstrInfo()), LIS(LIS) {}
void expand();
/// Runs ModuloScheduleExpander and treats it as a golden input to validate
/// aspects of the code generated by PeelingModuloScheduleExpander.
void validateAgainstModuloScheduleExpander();
protected:
ModuloSchedule &Schedule;
MachineFunction &MF;
const TargetSubtargetInfo &ST;
MachineRegisterInfo &MRI;
const TargetInstrInfo *TII = nullptr;
LiveIntervals *LIS = nullptr;
/// The original loop block that gets rewritten in-place.
MachineBasicBlock *BB = nullptr;
/// The original loop preheader.
MachineBasicBlock *Preheader = nullptr;
/// All prolog and epilog blocks.
SmallVector<MachineBasicBlock *, 4> Prologs, Epilogs;
/// For every block, the stages that are produced.
DenseMap<MachineBasicBlock *, BitVector> LiveStages;
/// For every block, the stages that are available. A stage can be available
/// but not produced (in the epilog) or produced but not available (in the
/// prolog).
DenseMap<MachineBasicBlock *, BitVector> AvailableStages;
/// When peeling the epilogue keep track of the distance between the phi
/// nodes and the kernel.
DenseMap<MachineInstr *, unsigned> PhiNodeLoopIteration;
/// CanonicalMIs and BlockMIs form a bidirectional map between any of the
/// loop kernel clones.
DenseMap<MachineInstr *, MachineInstr *> CanonicalMIs;
DenseMap<std::pair<MachineBasicBlock *, MachineInstr *>, MachineInstr *>
BlockMIs;
/// State passed from peelKernel to peelPrologAndEpilogs().
std::deque<MachineBasicBlock *> PeeledFront, PeeledBack;
/// Illegal phis that need to be deleted once we re-link stages.
SmallVector<MachineInstr *, 4> IllegalPhisToDelete;
/// Converts BB from the original loop body to the rewritten, pipelined
/// steady-state.
void rewriteKernel();
/// Peels one iteration of the rewritten kernel (BB) in the specified
/// direction.
MachineBasicBlock *peelKernel(LoopPeelDirection LPD);
// Delete instructions whose stage is less than MinStage in the given basic
// block.
void filterInstructions(MachineBasicBlock *MB, int MinStage);
// Move instructions of the given stage from sourceBB to DestBB. Remap the phi
// instructions to keep a valid IR.
void moveStageBetweenBlocks(MachineBasicBlock *DestBB,
MachineBasicBlock *SourceBB, unsigned Stage);
/// Peel the kernel forwards and backwards to produce prologs and epilogs,
/// and stitch them together.
void peelPrologAndEpilogs();
/// All prolog and epilog blocks are clones of the kernel, so any produced
/// register in one block has an corollary in all other blocks.
Register getEquivalentRegisterIn(Register Reg, MachineBasicBlock *BB);
/// Change all users of MI, if MI is predicated out
/// (LiveStages[MI->getParent()] == false).
void rewriteUsesOf(MachineInstr *MI);
/// Insert branches between prologs, kernel and epilogs.
void fixupBranches();
/// Create a poor-man's LCSSA by cloning only the PHIs from the kernel block
/// to a block dominated by all prologs and epilogs. This allows us to treat
/// the loop exiting block as any other kernel clone.
MachineBasicBlock *CreateLCSSAExitingBlock();
/// Helper to get the stage of an instruction in the schedule.
unsigned getStage(MachineInstr *MI) {
if (CanonicalMIs.count(MI))
MI = CanonicalMIs[MI];
return Schedule.getStage(MI);
}
/// Helper function to find the right canonical register for a phi instruction
/// coming from a peeled out prologue.
Register getPhiCanonicalReg(MachineInstr* CanonicalPhi, MachineInstr* Phi);
/// Target loop info before kernel peeling.
std::unique_ptr<TargetInstrInfo::PipelinerLoopInfo> LoopInfo;
};
/// Expander that simply annotates each scheduled instruction with a post-instr
/// symbol that can be consumed by the ModuloScheduleTest pass.
///
/// The post-instr symbol is a way of annotating an instruction that can be
/// roundtripped in MIR. The syntax is:
/// MYINST %0, post-instr-symbol <mcsymbol Stage-1_Cycle-5>
class ModuloScheduleTestAnnotater {
MachineFunction &MF;
ModuloSchedule &S;
public:
ModuloScheduleTestAnnotater(MachineFunction &MF, ModuloSchedule &S)
: MF(MF), S(S) {}
/// Performs the annotation.
void annotate();
};
} // end namespace llvm
#endif // LLVM_CODEGEN_MODULOSCHEDULE_H
PK iwFZq^$<D� D� CodeGen/MachineOperand.hnu �[��� //===-- llvm/CodeGen/MachineOperand.h - MachineOperand class ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the declaration of the MachineOperand class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEOPERAND_H
#define LLVM_CODEGEN_MACHINEOPERAND_H
#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/CodeGen/Register.h"
#include "llvm/IR/Intrinsics.h"
#include <cassert>
namespace llvm {
class LLT;
class BlockAddress;
class Constant;
class ConstantFP;
class ConstantInt;
class GlobalValue;
class MachineBasicBlock;
class MachineInstr;
class MachineRegisterInfo;
class MCCFIInstruction;
class MDNode;
class ModuleSlotTracker;
class TargetIntrinsicInfo;
class TargetRegisterInfo;
class hash_code;
class raw_ostream;
class MCSymbol;
/// MachineOperand class - Representation of each machine instruction operand.
///
/// This class isn't a POD type because it has a private constructor, but its
/// destructor must be trivial. Functions like MachineInstr::addOperand(),
/// MachineRegisterInfo::moveOperands(), and MF::DeleteMachineInstr() depend on
/// not having to call the MachineOperand destructor.
///
class MachineOperand {
public:
enum MachineOperandType : unsigned char {
MO_Register, ///< Register operand.
MO_Immediate, ///< Immediate operand
MO_CImmediate, ///< Immediate >64bit operand
MO_FPImmediate, ///< Floating-point immediate operand
MO_MachineBasicBlock, ///< MachineBasicBlock reference
MO_FrameIndex, ///< Abstract Stack Frame Index
MO_ConstantPoolIndex, ///< Address of indexed Constant in Constant Pool
MO_TargetIndex, ///< Target-dependent index+offset operand.
MO_JumpTableIndex, ///< Address of indexed Jump Table for switch
MO_ExternalSymbol, ///< Name of external global symbol
MO_GlobalAddress, ///< Address of a global value
MO_BlockAddress, ///< Address of a basic block
MO_RegisterMask, ///< Mask of preserved registers.
MO_RegisterLiveOut, ///< Mask of live-out registers.
MO_Metadata, ///< Metadata reference (for debug info)
MO_MCSymbol, ///< MCSymbol reference (for debug/eh info)
MO_CFIIndex, ///< MCCFIInstruction index.
MO_IntrinsicID, ///< Intrinsic ID for ISel
MO_Predicate, ///< Generic predicate for ISel
MO_ShuffleMask, ///< Other IR Constant for ISel (shuffle masks)
MO_DbgInstrRef, ///< Integer indices referring to an instruction+operand
MO_Last = MO_DbgInstrRef
};
private:
/// OpKind - Specify what kind of operand this is. This discriminates the
/// union.
unsigned OpKind : 8;
/// Subregister number for MO_Register. A value of 0 indicates the
/// MO_Register has no subReg.
///
/// For all other kinds of operands, this field holds target-specific flags.
unsigned SubReg_TargetFlags : 12;
/// TiedTo - Non-zero when this register operand is tied to another register
/// operand. The encoding of this field is described in the block comment
/// before MachineInstr::tieOperands().
unsigned TiedTo : 4;
/// IsDef - True if this is a def, false if this is a use of the register.
/// This is only valid on register operands.
///
unsigned IsDef : 1;
/// IsImp - True if this is an implicit def or use, false if it is explicit.
/// This is only valid on register opderands.
///
unsigned IsImp : 1;
/// IsDeadOrKill
/// For uses: IsKill - Conservatively indicates the last use of a register
/// on this path through the function. A register operand with true value of
/// this flag must be the last use of the register, a register operand with
/// false value may or may not be the last use of the register. After regalloc
/// we can use recomputeLivenessFlags to get precise kill flags.
/// For defs: IsDead - True if this register is never used by a subsequent
/// instruction.
/// This is only valid on register operands.
unsigned IsDeadOrKill : 1;
/// See isRenamable().
unsigned IsRenamable : 1;
/// IsUndef - True if this register operand reads an "undef" value, i.e. the
/// read value doesn't matter. This flag can be set on both use and def
/// operands. On a sub-register def operand, it refers to the part of the
/// register that isn't written. On a full-register def operand, it is a
/// noop. See readsReg().
///
/// This is only valid on registers.
///
/// Note that an instruction may have multiple <undef> operands referring to
/// the same register. In that case, the instruction may depend on those
/// operands reading the same dont-care value. For example:
///
/// %1 = XOR undef %2, undef %2
///
/// Any register can be used for %2, and its value doesn't matter, but
/// the two operands must be the same register.
///
unsigned IsUndef : 1;
/// IsInternalRead - True if this operand reads a value that was defined
/// inside the same instruction or bundle. This flag can be set on both use
/// and def operands. On a sub-register def operand, it refers to the part
/// of the register that isn't written. On a full-register def operand, it
/// is a noop.
///
/// When this flag is set, the instruction bundle must contain at least one
/// other def of the register. If multiple instructions in the bundle define
/// the register, the meaning is target-defined.
unsigned IsInternalRead : 1;
/// IsEarlyClobber - True if this MO_Register 'def' operand is written to
/// by the MachineInstr before all input registers are read. This is used to
/// model the GCC inline asm '&' constraint modifier.
unsigned IsEarlyClobber : 1;
/// IsDebug - True if this MO_Register 'use' operand is in a debug pseudo,
/// not a real instruction. Such uses should be ignored during codegen.
unsigned IsDebug : 1;
/// SmallContents - This really should be part of the Contents union, but
/// lives out here so we can get a better packed struct.
/// MO_Register: Register number.
/// OffsetedInfo: Low bits of offset.
union {
unsigned RegNo; // For MO_Register.
unsigned OffsetLo; // Matches Contents.OffsetedInfo.OffsetHi.
} SmallContents;
/// ParentMI - This is the instruction that this operand is embedded into.
/// This is valid for all operand types, when the operand is in an instr.
MachineInstr *ParentMI = nullptr;
/// Contents union - This contains the payload for the various operand types.
union ContentsUnion {
ContentsUnion() {}
MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
const ConstantFP *CFP; // For MO_FPImmediate.
const ConstantInt *CI; // For MO_CImmediate. Integers > 64bit.
int64_t ImmVal; // For MO_Immediate.
const uint32_t *RegMask; // For MO_RegisterMask and MO_RegisterLiveOut.
const MDNode *MD; // For MO_Metadata.
MCSymbol *Sym; // For MO_MCSymbol.
unsigned CFIIndex; // For MO_CFI.
Intrinsic::ID IntrinsicID; // For MO_IntrinsicID.
unsigned Pred; // For MO_Predicate
ArrayRef<int> ShuffleMask; // For MO_ShuffleMask
struct { // For MO_Register.
// Register number is in SmallContents.RegNo.
MachineOperand *Prev; // Access list for register. See MRI.
MachineOperand *Next;
} Reg;
struct { // For MO_DbgInstrRef.
unsigned InstrIdx;
unsigned OpIdx;
} InstrRef;
/// OffsetedInfo - This struct contains the offset and an object identifier.
/// this represent the object as with an optional offset from it.
struct {
union {
int Index; // For MO_*Index - The index itself.
const char *SymbolName; // For MO_ExternalSymbol.
const GlobalValue *GV; // For MO_GlobalAddress.
const BlockAddress *BA; // For MO_BlockAddress.
} Val;
// Low bits of offset are in SmallContents.OffsetLo.
int OffsetHi; // An offset from the object, high 32 bits.
} OffsetedInfo;
} Contents;
explicit MachineOperand(MachineOperandType K)
: OpKind(K), SubReg_TargetFlags(0) {
// Assert that the layout is what we expect. It's easy to grow this object.
static_assert(alignof(MachineOperand) <= alignof(int64_t),
"MachineOperand shouldn't be more than 8 byte aligned");
static_assert(sizeof(Contents) <= 2 * sizeof(void *),
"Contents should be at most two pointers");
static_assert(sizeof(MachineOperand) <=
alignTo<alignof(int64_t)>(2 * sizeof(unsigned) +
3 * sizeof(void *)),
"MachineOperand too big. Should be Kind, SmallContents, "
"ParentMI, and Contents");
}
public:
/// getType - Returns the MachineOperandType for this operand.
///
MachineOperandType getType() const { return (MachineOperandType)OpKind; }
unsigned getTargetFlags() const {
return isReg() ? 0 : SubReg_TargetFlags;
}
void setTargetFlags(unsigned F) {
assert(!isReg() && "Register operands can't have target flags");
SubReg_TargetFlags = F;
assert(SubReg_TargetFlags == F && "Target flags out of range");
}
void addTargetFlag(unsigned F) {
assert(!isReg() && "Register operands can't have target flags");
SubReg_TargetFlags |= F;
assert((SubReg_TargetFlags & F) && "Target flags out of range");
}
/// getParent - Return the instruction that this operand belongs to.
///
MachineInstr *getParent() { return ParentMI; }
const MachineInstr *getParent() const { return ParentMI; }
/// clearParent - Reset the parent pointer.
///
/// The MachineOperand copy constructor also copies ParentMI, expecting the
/// original to be deleted. If a MachineOperand is ever stored outside a
/// MachineInstr, the parent pointer must be cleared.
///
/// Never call clearParent() on an operand in a MachineInstr.
///
void clearParent() { ParentMI = nullptr; }
/// Returns the index of this operand in the instruction that it belongs to.
unsigned getOperandNo() const;
/// Print a subreg index operand.
/// MO_Immediate operands can also be subreg idices. If it's the case, the
/// subreg index name will be printed. MachineInstr::isOperandSubregIdx can be
/// called to check this.
static void printSubRegIdx(raw_ostream &OS, uint64_t Index,
const TargetRegisterInfo *TRI);
/// Print operand target flags.
static void printTargetFlags(raw_ostream& OS, const MachineOperand &Op);
/// Print a MCSymbol as an operand.
static void printSymbol(raw_ostream &OS, MCSymbol &Sym);
/// Print a stack object reference.
static void printStackObjectReference(raw_ostream &OS, unsigned FrameIndex,
bool IsFixed, StringRef Name);
/// Print the offset with explicit +/- signs.
static void printOperandOffset(raw_ostream &OS, int64_t Offset);
/// Print an IRSlotNumber.
static void printIRSlotNumber(raw_ostream &OS, int Slot);
/// Print the MachineOperand to \p os.
/// Providing a valid \p TRI and \p IntrinsicInfo results in a more
/// target-specific printing. If \p TRI and \p IntrinsicInfo are null, the
/// function will try to pick it up from the parent.
void print(raw_ostream &os, const TargetRegisterInfo *TRI = nullptr,
const TargetIntrinsicInfo *IntrinsicInfo = nullptr) const;
/// More complex way of printing a MachineOperand.
/// \param TypeToPrint specifies the generic type to be printed on uses and
/// defs. It can be determined using MachineInstr::getTypeToPrint.
/// \param OpIdx - specifies the index of the operand in machine instruction.
/// This will be used by target dependent MIR formatter. Could be std::nullopt
/// if the index is unknown, e.g. called by dump().
/// \param PrintDef - whether we want to print `def` on an operand which
/// isDef. Sometimes, if the operand is printed before '=', we don't print
/// `def`.
/// \param IsStandalone - whether we want a verbose output of the MO. This
/// prints extra information that can be easily inferred when printing the
/// whole function, but not when printing only a fragment of it.
/// \param ShouldPrintRegisterTies - whether we want to print register ties.
/// Sometimes they are easily determined by the instruction's descriptor
/// (MachineInstr::hasComplexRegiterTies can determine if it's needed).
/// \param TiedOperandIdx - if we need to print register ties this needs to
/// provide the index of the tied register. If not, it will be ignored.
/// \param TRI - provide more target-specific information to the printer.
/// Unlike the previous function, this one will not try and get the
/// information from it's parent.
/// \param IntrinsicInfo - same as \p TRI.
void print(raw_ostream &os, ModuleSlotTracker &MST, LLT TypeToPrint,
std::optional<unsigned> OpIdx, bool PrintDef, bool IsStandalone,
bool ShouldPrintRegisterTies, unsigned TiedOperandIdx,
const TargetRegisterInfo *TRI,
const TargetIntrinsicInfo *IntrinsicInfo) const;
/// Same as print(os, TRI, IntrinsicInfo), but allows to specify the low-level
/// type to be printed the same way the full version of print(...) does it.
void print(raw_ostream &os, LLT TypeToPrint,
const TargetRegisterInfo *TRI = nullptr,
const TargetIntrinsicInfo *IntrinsicInfo = nullptr) const;
void dump() const;
//===--------------------------------------------------------------------===//
// Accessors that tell you what kind of MachineOperand you're looking at.
//===--------------------------------------------------------------------===//
/// isReg - Tests if this is a MO_Register operand.
bool isReg() const { return OpKind == MO_Register; }
/// isImm - Tests if this is a MO_Immediate operand.
bool isImm() const { return OpKind == MO_Immediate; }
/// isCImm - Test if this is a MO_CImmediate operand.
bool isCImm() const { return OpKind == MO_CImmediate; }
/// isFPImm - Tests if this is a MO_FPImmediate operand.
bool isFPImm() const { return OpKind == MO_FPImmediate; }
/// isMBB - Tests if this is a MO_MachineBasicBlock operand.
bool isMBB() const { return OpKind == MO_MachineBasicBlock; }
/// isFI - Tests if this is a MO_FrameIndex operand.
bool isFI() const { return OpKind == MO_FrameIndex; }
/// isCPI - Tests if this is a MO_ConstantPoolIndex operand.
bool isCPI() const { return OpKind == MO_ConstantPoolIndex; }
/// isTargetIndex - Tests if this is a MO_TargetIndex operand.
bool isTargetIndex() const { return OpKind == MO_TargetIndex; }
/// isJTI - Tests if this is a MO_JumpTableIndex operand.
bool isJTI() const { return OpKind == MO_JumpTableIndex; }
/// isGlobal - Tests if this is a MO_GlobalAddress operand.
bool isGlobal() const { return OpKind == MO_GlobalAddress; }
/// isSymbol - Tests if this is a MO_ExternalSymbol operand.
bool isSymbol() const { return OpKind == MO_ExternalSymbol; }
/// isBlockAddress - Tests if this is a MO_BlockAddress operand.
bool isBlockAddress() const { return OpKind == MO_BlockAddress; }
/// isRegMask - Tests if this is a MO_RegisterMask operand.
bool isRegMask() const { return OpKind == MO_RegisterMask; }
/// isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand.
bool isRegLiveOut() const { return OpKind == MO_RegisterLiveOut; }
/// isMetadata - Tests if this is a MO_Metadata operand.
bool isMetadata() const { return OpKind == MO_Metadata; }
bool isMCSymbol() const { return OpKind == MO_MCSymbol; }
bool isDbgInstrRef() const { return OpKind == MO_DbgInstrRef; }
bool isCFIIndex() const { return OpKind == MO_CFIIndex; }
bool isIntrinsicID() const { return OpKind == MO_IntrinsicID; }
bool isPredicate() const { return OpKind == MO_Predicate; }
bool isShuffleMask() const { return OpKind == MO_ShuffleMask; }
//===--------------------------------------------------------------------===//
// Accessors for Register Operands
//===--------------------------------------------------------------------===//
/// getReg - Returns the register number.
Register getReg() const {
assert(isReg() && "This is not a register operand!");
return Register(SmallContents.RegNo);
}
unsigned getSubReg() const {
assert(isReg() && "Wrong MachineOperand accessor");
return SubReg_TargetFlags;
}
bool isUse() const {
assert(isReg() && "Wrong MachineOperand accessor");
return !IsDef;
}
bool isDef() const {
assert(isReg() && "Wrong MachineOperand accessor");
return IsDef;
}
bool isImplicit() const {
assert(isReg() && "Wrong MachineOperand accessor");
return IsImp;
}
bool isDead() const {
assert(isReg() && "Wrong MachineOperand accessor");
return IsDeadOrKill & IsDef;
}
bool isKill() const {
assert(isReg() && "Wrong MachineOperand accessor");
return IsDeadOrKill & !IsDef;
}
bool isUndef() const {
assert(isReg() && "Wrong MachineOperand accessor");
return IsUndef;
}
/// isRenamable - Returns true if this register may be renamed, i.e. it does
/// not generate a value that is somehow read in a way that is not represented
/// by the Machine IR (e.g. to meet an ABI or ISA requirement). This is only
/// valid on physical register operands. Virtual registers are assumed to
/// always be renamable regardless of the value of this field.
///
/// Operands that are renamable can freely be changed to any other register
/// that is a member of the register class returned by
/// MI->getRegClassConstraint().
///
/// isRenamable can return false for several different reasons:
///
/// - ABI constraints (since liveness is not always precisely modeled). We
/// conservatively handle these cases by setting all physical register
/// operands that didn’t start out as virtual regs to not be renamable.
/// Also any physical register operands created after register allocation or
/// whose register is changed after register allocation will not be
/// renamable. This state is tracked in the MachineOperand::IsRenamable
/// bit.
///
/// - Opcode/target constraints: for opcodes that have complex register class
/// requirements (e.g. that depend on other operands/instructions), we set
/// hasExtraSrcRegAllocReq/hasExtraDstRegAllocReq in the machine opcode
/// description. Operands belonging to instructions with opcodes that are
/// marked hasExtraSrcRegAllocReq/hasExtraDstRegAllocReq return false from
/// isRenamable(). Additionally, the AllowRegisterRenaming target property
/// prevents any operands from being marked renamable for targets that don't
/// have detailed opcode hasExtraSrcRegAllocReq/hasExtraDstRegAllocReq
/// values.
bool isRenamable() const;
bool isInternalRead() const {
assert(isReg() && "Wrong MachineOperand accessor");
return IsInternalRead;
}
bool isEarlyClobber() const {
assert(isReg() && "Wrong MachineOperand accessor");
return IsEarlyClobber;
}
bool isTied() const {
assert(isReg() && "Wrong MachineOperand accessor");
return TiedTo;
}
bool isDebug() const {
assert(isReg() && "Wrong MachineOperand accessor");
return IsDebug;
}
/// readsReg - Returns true if this operand reads the previous value of its
/// register. A use operand with the <undef> flag set doesn't read its
/// register. A sub-register def implicitly reads the other parts of the
/// register being redefined unless the <undef> flag is set.
///
/// This refers to reading the register value from before the current
/// instruction or bundle. Internal bundle reads are not included.
bool readsReg() const {
assert(isReg() && "Wrong MachineOperand accessor");
return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
}
/// Return true if this operand can validly be appended to an arbitrary
/// operand list. i.e. this behaves like an implicit operand.
bool isValidExcessOperand() const {
if ((isReg() && isImplicit()) || isRegMask())
return true;
// Debug operands
return isMetadata() || isMCSymbol();
}
//===--------------------------------------------------------------------===//
// Mutators for Register Operands
//===--------------------------------------------------------------------===//
/// Change the register this operand corresponds to.
///
void setReg(Register Reg);
void setSubReg(unsigned subReg) {
assert(isReg() && "Wrong MachineOperand mutator");
SubReg_TargetFlags = subReg;
assert(SubReg_TargetFlags == subReg && "SubReg out of range");
}
/// substVirtReg - Substitute the current register with the virtual
/// subregister Reg:SubReg. Take any existing SubReg index into account,
/// using TargetRegisterInfo to compose the subreg indices if necessary.
/// Reg must be a virtual register, SubIdx can be 0.
///
void substVirtReg(Register Reg, unsigned SubIdx, const TargetRegisterInfo&);
/// substPhysReg - Substitute the current register with the physical register
/// Reg, taking any existing SubReg into account. For instance,
/// substPhysReg(%eax) will change %reg1024:sub_8bit to %al.
///
void substPhysReg(MCRegister Reg, const TargetRegisterInfo&);
void setIsUse(bool Val = true) { setIsDef(!Val); }
/// Change a def to a use, or a use to a def.
void setIsDef(bool Val = true);
void setImplicit(bool Val = true) {
assert(isReg() && "Wrong MachineOperand mutator");
IsImp = Val;
}
void setIsKill(bool Val = true) {
assert(isReg() && !IsDef && "Wrong MachineOperand mutator");
assert((!Val || !isDebug()) && "Marking a debug operation as kill");
IsDeadOrKill = Val;
}
void setIsDead(bool Val = true) {
assert(isReg() && IsDef && "Wrong MachineOperand mutator");
IsDeadOrKill = Val;
}
void setIsUndef(bool Val = true) {
assert(isReg() && "Wrong MachineOperand mutator");
IsUndef = Val;
}
void setIsRenamable(bool Val = true);
void setIsInternalRead(bool Val = true) {
assert(isReg() && "Wrong MachineOperand mutator");
IsInternalRead = Val;
}
void setIsEarlyClobber(bool Val = true) {
assert(isReg() && IsDef && "Wrong MachineOperand mutator");
IsEarlyClobber = Val;
}
void setIsDebug(bool Val = true) {
assert(isReg() && !IsDef && "Wrong MachineOperand mutator");
IsDebug = Val;
}
//===--------------------------------------------------------------------===//
// Accessors for various operand types.
//===--------------------------------------------------------------------===//
int64_t getImm() const {
assert(isImm() && "Wrong MachineOperand accessor");
return Contents.ImmVal;
}
const ConstantInt *getCImm() const {
assert(isCImm() && "Wrong MachineOperand accessor");
return Contents.CI;
}
const ConstantFP *getFPImm() const {
assert(isFPImm() && "Wrong MachineOperand accessor");
return Contents.CFP;
}
MachineBasicBlock *getMBB() const {
assert(isMBB() && "Wrong MachineOperand accessor");
return Contents.MBB;
}
int getIndex() const {
assert((isFI() || isCPI() || isTargetIndex() || isJTI()) &&
"Wrong MachineOperand accessor");
return Contents.OffsetedInfo.Val.Index;
}
const GlobalValue *getGlobal() const {
assert(isGlobal() && "Wrong MachineOperand accessor");
return Contents.OffsetedInfo.Val.GV;
}
const BlockAddress *getBlockAddress() const {
assert(isBlockAddress() && "Wrong MachineOperand accessor");
return Contents.OffsetedInfo.Val.BA;
}
MCSymbol *getMCSymbol() const {
assert(isMCSymbol() && "Wrong MachineOperand accessor");
return Contents.Sym;
}
unsigned getInstrRefInstrIndex() const {
assert(isDbgInstrRef() && "Wrong MachineOperand accessor");
return Contents.InstrRef.InstrIdx;
}
unsigned getInstrRefOpIndex() const {
assert(isDbgInstrRef() && "Wrong MachineOperand accessor");
return Contents.InstrRef.OpIdx;
}
unsigned getCFIIndex() const {
assert(isCFIIndex() && "Wrong MachineOperand accessor");
return Contents.CFIIndex;
}
Intrinsic::ID getIntrinsicID() const {
assert(isIntrinsicID() && "Wrong MachineOperand accessor");
return Contents.IntrinsicID;
}
unsigned getPredicate() const {
assert(isPredicate() && "Wrong MachineOperand accessor");
return Contents.Pred;
}
ArrayRef<int> getShuffleMask() const {
assert(isShuffleMask() && "Wrong MachineOperand accessor");
return Contents.ShuffleMask;
}
/// Return the offset from the symbol in this operand. This always returns 0
/// for ExternalSymbol operands.
int64_t getOffset() const {
assert((isGlobal() || isSymbol() || isMCSymbol() || isCPI() ||
isTargetIndex() || isBlockAddress()) &&
"Wrong MachineOperand accessor");
return int64_t(uint64_t(Contents.OffsetedInfo.OffsetHi) << 32) |
SmallContents.OffsetLo;
}
const char *getSymbolName() const {
assert(isSymbol() && "Wrong MachineOperand accessor");
return Contents.OffsetedInfo.Val.SymbolName;
}
/// clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
/// It is sometimes necessary to detach the register mask pointer from its
/// machine operand. This static method can be used for such detached bit
/// mask pointers.
static bool clobbersPhysReg(const uint32_t *RegMask, MCRegister PhysReg) {
// See TargetRegisterInfo.h.
assert(PhysReg < (1u << 30) && "Not a physical register");
return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
}
/// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
bool clobbersPhysReg(MCRegister PhysReg) const {
return clobbersPhysReg(getRegMask(), PhysReg);
}
/// getRegMask - Returns a bit mask of registers preserved by this RegMask
/// operand.
const uint32_t *getRegMask() const {
assert(isRegMask() && "Wrong MachineOperand accessor");
return Contents.RegMask;
}
/// Returns number of elements needed for a regmask array.
static unsigned getRegMaskSize(unsigned NumRegs) {
return (NumRegs + 31) / 32;
}
/// getRegLiveOut - Returns a bit mask of live-out registers.
const uint32_t *getRegLiveOut() const {
assert(isRegLiveOut() && "Wrong MachineOperand accessor");
return Contents.RegMask;
}
const MDNode *getMetadata() const {
assert(isMetadata() && "Wrong MachineOperand accessor");
return Contents.MD;
}
//===--------------------------------------------------------------------===//
// Mutators for various operand types.
//===--------------------------------------------------------------------===//
void setImm(int64_t immVal) {
assert(isImm() && "Wrong MachineOperand mutator");
Contents.ImmVal = immVal;
}
void setCImm(const ConstantInt *CI) {
assert(isCImm() && "Wrong MachineOperand mutator");
Contents.CI = CI;
}
void setFPImm(const ConstantFP *CFP) {
assert(isFPImm() && "Wrong MachineOperand mutator");
Contents.CFP = CFP;
}
void setOffset(int64_t Offset) {
assert((isGlobal() || isSymbol() || isMCSymbol() || isCPI() ||
isTargetIndex() || isBlockAddress()) &&
"Wrong MachineOperand mutator");
SmallContents.OffsetLo = unsigned(Offset);
Contents.OffsetedInfo.OffsetHi = int(Offset >> 32);
}
void setIndex(int Idx) {
assert((isFI() || isCPI() || isTargetIndex() || isJTI()) &&
"Wrong MachineOperand mutator");
Contents.OffsetedInfo.Val.Index = Idx;
}
void setMetadata(const MDNode *MD) {
assert(isMetadata() && "Wrong MachineOperand mutator");
Contents.MD = MD;
}
void setInstrRefInstrIndex(unsigned InstrIdx) {
assert(isDbgInstrRef() && "Wrong MachineOperand mutator");
Contents.InstrRef.InstrIdx = InstrIdx;
}
void setInstrRefOpIndex(unsigned OpIdx) {
assert(isDbgInstrRef() && "Wrong MachineOperand mutator");
Contents.InstrRef.OpIdx = OpIdx;
}
void setMBB(MachineBasicBlock *MBB) {
assert(isMBB() && "Wrong MachineOperand mutator");
Contents.MBB = MBB;
}
/// Sets value of register mask operand referencing Mask. The
/// operand does not take ownership of the memory referenced by Mask, it must
/// remain valid for the lifetime of the operand. See CreateRegMask().
/// Any physreg with a 0 bit in the mask is clobbered by the instruction.
void setRegMask(const uint32_t *RegMaskPtr) {
assert(isRegMask() && "Wrong MachineOperand mutator");
Contents.RegMask = RegMaskPtr;
}
void setIntrinsicID(Intrinsic::ID IID) {
assert(isIntrinsicID() && "Wrong MachineOperand mutator");
Contents.IntrinsicID = IID;
}
void setPredicate(unsigned Predicate) {
assert(isPredicate() && "Wrong MachineOperand mutator");
Contents.Pred = Predicate;
}
//===--------------------------------------------------------------------===//
// Other methods.
//===--------------------------------------------------------------------===//
/// Returns true if this operand is identical to the specified operand except
/// for liveness related flags (isKill, isUndef and isDead). Note that this
/// should stay in sync with the hash_value overload below.
bool isIdenticalTo(const MachineOperand &Other) const;
/// MachineOperand hash_value overload.
///
/// Note that this includes the same information in the hash that
/// isIdenticalTo uses for comparison. It is thus suited for use in hash
/// tables which use that function for equality comparisons only. This must
/// stay exactly in sync with isIdenticalTo above.
friend hash_code hash_value(const MachineOperand &MO);
/// ChangeToImmediate - Replace this operand with a new immediate operand of
/// the specified value. If an operand is known to be an immediate already,
/// the setImm method should be used.
void ChangeToImmediate(int64_t ImmVal, unsigned TargetFlags = 0);
/// ChangeToFPImmediate - Replace this operand with a new FP immediate operand
/// of the specified value. If an operand is known to be an FP immediate
/// already, the setFPImm method should be used.
void ChangeToFPImmediate(const ConstantFP *FPImm, unsigned TargetFlags = 0);
/// ChangeToES - Replace this operand with a new external symbol operand.
void ChangeToES(const char *SymName, unsigned TargetFlags = 0);
/// ChangeToGA - Replace this operand with a new global address operand.
void ChangeToGA(const GlobalValue *GV, int64_t Offset,
unsigned TargetFlags = 0);
/// ChangeToMCSymbol - Replace this operand with a new MC symbol operand.
void ChangeToMCSymbol(MCSymbol *Sym, unsigned TargetFlags = 0);
/// Replace this operand with a frame index.
void ChangeToFrameIndex(int Idx, unsigned TargetFlags = 0);
/// Replace this operand with a target index.
void ChangeToTargetIndex(unsigned Idx, int64_t Offset,
unsigned TargetFlags = 0);
/// Replace this operand with an Instruction Reference.
void ChangeToDbgInstrRef(unsigned InstrIdx, unsigned OpIdx,
unsigned TargetFlags = 0);
/// ChangeToRegister - Replace this operand with a new register operand of
/// the specified value. If an operand is known to be an register already,
/// the setReg method should be used.
void ChangeToRegister(Register Reg, bool isDef, bool isImp = false,
bool isKill = false, bool isDead = false,
bool isUndef = false, bool isDebug = false);
/// getTargetIndexName - If this MachineOperand is a TargetIndex that has a
/// name, attempt to get the name. Returns nullptr if the TargetIndex does not
/// have a name. Asserts if MO is not a TargetIndex.
const char *getTargetIndexName() const;
//===--------------------------------------------------------------------===//
// Construction methods.
//===--------------------------------------------------------------------===//
static MachineOperand CreateImm(int64_t Val) {
MachineOperand Op(MachineOperand::MO_Immediate);
Op.setImm(Val);
return Op;
}
static MachineOperand CreateCImm(const ConstantInt *CI) {
MachineOperand Op(MachineOperand::MO_CImmediate);
Op.Contents.CI = CI;
return Op;
}
static MachineOperand CreateFPImm(const ConstantFP *CFP) {
MachineOperand Op(MachineOperand::MO_FPImmediate);
Op.Contents.CFP = CFP;
return Op;
}
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp = false,
bool isKill = false, bool isDead = false,
bool isUndef = false,
bool isEarlyClobber = false,
unsigned SubReg = 0, bool isDebug = false,
bool isInternalRead = false,
bool isRenamable = false) {
assert(!(isDead && !isDef) && "Dead flag on non-def");
assert(!(isKill && isDef) && "Kill flag on def");
MachineOperand Op(MachineOperand::MO_Register);
Op.IsDef = isDef;
Op.IsImp = isImp;
Op.IsDeadOrKill = isKill | isDead;
Op.IsRenamable = isRenamable;
Op.IsUndef = isUndef;
Op.IsInternalRead = isInternalRead;
Op.IsEarlyClobber = isEarlyClobber;
Op.TiedTo = 0;
Op.IsDebug = isDebug;
Op.SmallContents.RegNo = Reg;
Op.Contents.Reg.Prev = nullptr;
Op.Contents.Reg.Next = nullptr;
Op.setSubReg(SubReg);
return Op;
}
static MachineOperand CreateMBB(MachineBasicBlock *MBB,
unsigned TargetFlags = 0) {
MachineOperand Op(MachineOperand::MO_MachineBasicBlock);
Op.setMBB(MBB);
Op.setTargetFlags(TargetFlags);
return Op;
}
static MachineOperand CreateFI(int Idx) {
MachineOperand Op(MachineOperand::MO_FrameIndex);
Op.setIndex(Idx);
return Op;
}
static MachineOperand CreateCPI(unsigned Idx, int Offset,
unsigned TargetFlags = 0) {
MachineOperand Op(MachineOperand::MO_ConstantPoolIndex);
Op.setIndex(Idx);
Op.setOffset(Offset);
Op.setTargetFlags(TargetFlags);
return Op;
}
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset,
unsigned TargetFlags = 0) {
MachineOperand Op(MachineOperand::MO_TargetIndex);
Op.setIndex(Idx);
Op.setOffset(Offset);
Op.setTargetFlags(TargetFlags);
return Op;
}
static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags = 0) {
MachineOperand Op(MachineOperand::MO_JumpTableIndex);
Op.setIndex(Idx);
Op.setTargetFlags(TargetFlags);
return Op;
}
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset,
unsigned TargetFlags = 0) {
MachineOperand Op(MachineOperand::MO_GlobalAddress);
Op.Contents.OffsetedInfo.Val.GV = GV;
Op.setOffset(Offset);
Op.setTargetFlags(TargetFlags);
return Op;
}
static MachineOperand CreateES(const char *SymName,
unsigned TargetFlags = 0) {
MachineOperand Op(MachineOperand::MO_ExternalSymbol);
Op.Contents.OffsetedInfo.Val.SymbolName = SymName;
Op.setOffset(0); // Offset is always 0.
Op.setTargetFlags(TargetFlags);
return Op;
}
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset,
unsigned TargetFlags = 0) {
MachineOperand Op(MachineOperand::MO_BlockAddress);
Op.Contents.OffsetedInfo.Val.BA = BA;
Op.setOffset(Offset);
Op.setTargetFlags(TargetFlags);
return Op;
}
/// CreateRegMask - Creates a register mask operand referencing Mask. The
/// operand does not take ownership of the memory referenced by Mask, it
/// must remain valid for the lifetime of the operand.
///
/// A RegMask operand represents a set of non-clobbered physical registers
/// on an instruction that clobbers many registers, typically a call. The
/// bit mask has a bit set for each physreg that is preserved by this
/// instruction, as described in the documentation for
/// TargetRegisterInfo::getCallPreservedMask().
///
/// Any physreg with a 0 bit in the mask is clobbered by the instruction.
///
static MachineOperand CreateRegMask(const uint32_t *Mask) {
assert(Mask && "Missing register mask");
MachineOperand Op(MachineOperand::MO_RegisterMask);
Op.Contents.RegMask = Mask;
return Op;
}
static MachineOperand CreateRegLiveOut(const uint32_t *Mask) {
assert(Mask && "Missing live-out register mask");
MachineOperand Op(MachineOperand::MO_RegisterLiveOut);
Op.Contents.RegMask = Mask;
return Op;
}
static MachineOperand CreateMetadata(const MDNode *Meta) {
MachineOperand Op(MachineOperand::MO_Metadata);
Op.Contents.MD = Meta;
return Op;
}
static MachineOperand CreateMCSymbol(MCSymbol *Sym,
unsigned TargetFlags = 0) {
MachineOperand Op(MachineOperand::MO_MCSymbol);
Op.Contents.Sym = Sym;
Op.setOffset(0);
Op.setTargetFlags(TargetFlags);
return Op;
}
static MachineOperand CreateDbgInstrRef(unsigned InstrIdx, unsigned OpIdx) {
MachineOperand Op(MachineOperand::MO_DbgInstrRef);
Op.Contents.InstrRef.InstrIdx = InstrIdx;
Op.Contents.InstrRef.OpIdx = OpIdx;
return Op;
}
static MachineOperand CreateCFIIndex(unsigned CFIIndex) {
MachineOperand Op(MachineOperand::MO_CFIIndex);
Op.Contents.CFIIndex = CFIIndex;
return Op;
}
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID) {
MachineOperand Op(MachineOperand::MO_IntrinsicID);
Op.Contents.IntrinsicID = ID;
return Op;
}
static MachineOperand CreatePredicate(unsigned Pred) {
MachineOperand Op(MachineOperand::MO_Predicate);
Op.Contents.Pred = Pred;
return Op;
}
static MachineOperand CreateShuffleMask(ArrayRef<int> Mask) {
MachineOperand Op(MachineOperand::MO_ShuffleMask);
Op.Contents.ShuffleMask = Mask;
return Op;
}
friend class MachineInstr;
friend class MachineRegisterInfo;
private:
// If this operand is currently a register operand, and if this is in a
// function, deregister the operand from the register's use/def list.
void removeRegFromUses();
/// Artificial kinds for DenseMap usage.
enum : unsigned char {
MO_Empty = MO_Last + 1,
MO_Tombstone,
};
friend struct DenseMapInfo<MachineOperand>;
//===--------------------------------------------------------------------===//
// Methods for handling register use/def lists.
//===--------------------------------------------------------------------===//
/// isOnRegUseList - Return true if this operand is on a register use/def
/// list or false if not. This can only be called for register operands
/// that are part of a machine instruction.
bool isOnRegUseList() const {
assert(isReg() && "Can only add reg operand to use lists");
return Contents.Reg.Prev != nullptr;
}
};
template <> struct DenseMapInfo<MachineOperand> {
static MachineOperand getEmptyKey() {
return MachineOperand(static_cast<MachineOperand::MachineOperandType>(
MachineOperand::MO_Empty));
}
static MachineOperand getTombstoneKey() {
return MachineOperand(static_cast<MachineOperand::MachineOperandType>(
MachineOperand::MO_Tombstone));
}
static unsigned getHashValue(const MachineOperand &MO) {
return hash_value(MO);
}
static bool isEqual(const MachineOperand &LHS, const MachineOperand &RHS) {
if (LHS.getType() == static_cast<MachineOperand::MachineOperandType>(
MachineOperand::MO_Empty) ||
LHS.getType() == static_cast<MachineOperand::MachineOperandType>(
MachineOperand::MO_Tombstone))
return LHS.getType() == RHS.getType();
return LHS.isIdenticalTo(RHS);
}
};
inline raw_ostream &operator<<(raw_ostream &OS, const MachineOperand &MO) {
MO.print(OS);
return OS;
}
// See friend declaration above. This additional declaration is required in
// order to compile LLVM with IBM xlC compiler.
hash_code hash_value(const MachineOperand &MO);
} // namespace llvm
#endif
PK iwFZ�܃�/- /- CodeGen/MachinePassRegistry.defnu �[��� //===- MachinePassRegistry.def - Registry of passes -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file is used as the registry of passes that are for target-independent
// code generator.
//
//===----------------------------------------------------------------------===//
// NOTE: NO INCLUDE GUARD DESIRED!
#ifndef MODULE_ANALYSIS
#define MODULE_ANALYSIS(NAME, PASS_NAME, CONSTRUCTOR)
#endif
MODULE_ANALYSIS("pass-instrumentation", PassInstrumentationAnalysis, (PIC))
#undef MODULE_ANALYSIS
#ifndef MODULE_PASS
#define MODULE_PASS(NAME, PASS_NAME, CONSTRUCTOR)
#endif
MODULE_PASS("pre-isel-intrinsic-lowering", PreISelIntrinsicLoweringPass, ())
#undef MODULE_PASS
#ifndef FUNCTION_ANALYSIS
#define FUNCTION_ANALYSIS(NAME, PASS_NAME, CONSTRUCTOR)
#endif
FUNCTION_ANALYSIS("pass-instrumentation", PassInstrumentationAnalysis, (PIC))
FUNCTION_ANALYSIS("targetir", TargetIRAnalysis, (std::move(TM.getTargetIRAnalysis())))
#undef FUNCTION_ANALYSIS
#ifndef FUNCTION_PASS
#define FUNCTION_PASS(NAME, PASS_NAME, CONSTRUCTOR)
#endif
FUNCTION_PASS("mergeicmps", MergeICmpsPass, ())
FUNCTION_PASS("lower-constant-intrinsics", LowerConstantIntrinsicsPass, ())
FUNCTION_PASS("unreachableblockelim", UnreachableBlockElimPass, ())
FUNCTION_PASS("consthoist", ConstantHoistingPass, ())
FUNCTION_PASS("replace-with-veclib", ReplaceWithVeclib, ())
FUNCTION_PASS("partially-inline-libcalls", PartiallyInlineLibCallsPass, ())
FUNCTION_PASS("ee-instrument", EntryExitInstrumenterPass, (false))
FUNCTION_PASS("post-inline-ee-instrument", EntryExitInstrumenterPass, (true))
FUNCTION_PASS("expand-large-div-rem", ExpandLargeDivRemPass, ())
FUNCTION_PASS("expand-large-fp-convert", ExpandLargeFpConvertPass, ())
FUNCTION_PASS("expand-reductions", ExpandReductionsPass, ())
FUNCTION_PASS("expandvp", ExpandVectorPredicationPass, ())
FUNCTION_PASS("lowerinvoke", LowerInvokePass, ())
FUNCTION_PASS("scalarize-masked-mem-intrin", ScalarizeMaskedMemIntrinPass, ())
FUNCTION_PASS("tlshoist", TLSVariableHoistPass, ())
FUNCTION_PASS("verify", VerifierPass, ())
#undef FUNCTION_PASS
#ifndef LOOP_PASS
#define LOOP_PASS(NAME, PASS_NAME, CONSTRUCTOR)
#endif
LOOP_PASS("loop-reduce", LoopStrengthReducePass, ())
#undef LOOP_PASS
#ifndef MACHINE_MODULE_PASS
#define MACHINE_MODULE_PASS(NAME, PASS_NAME, CONSTRUCTOR)
#endif
#undef MACHINE_MODULE_PASS
#ifndef MACHINE_FUNCTION_ANALYSIS
#define MACHINE_FUNCTION_ANALYSIS(NAME, PASS_NAME, CONSTRUCTOR)
#endif
MACHINE_FUNCTION_ANALYSIS("pass-instrumentation", PassInstrumentationAnalysis, (PIC))
// LiveVariables currently requires pure SSA form.
// FIXME: Once TwoAddressInstruction pass no longer uses kill flags,
// LiveVariables can be removed completely, and LiveIntervals can be directly
// computed. (We still either need to regenerate kill flags after regalloc, or
// preferably fix the scavenger to not depend on them).
// MACHINE_FUNCTION_ANALYSIS("live-vars", LiveVariablesAnalysis())
// MACHINE_FUNCTION_ANALYSIS("live-stacks", LiveStacksPass())
// MACHINE_FUNCTION_ANALYSIS("slot-indexes", SlotIndexesAnalysis())
// MACHINE_FUNCTION_ANALYSIS("edge-bundles", EdgeBundlesAnalysis())
// MACHINE_FUNCTION_ANALYSIS("lazy-machine-bfi", LazyMachineBlockFrequencyInfoAnalysis())
// MACHINE_FUNCTION_ANALYSIS("machine-bfi", MachineBlockFrequencyInfoAnalysis())
// MACHINE_FUNCTION_ANALYSIS("machine-loops", MachineLoopInfoAnalysis())
// MACHINE_FUNCTION_ANALYSIS("machine-dom-frontier", MachineDominanceFrontierAnalysis())
// MACHINE_FUNCTION_ANALYSIS("machine-dom-tree", MachineDominatorTreeAnalysis())
// MACHINE_FUNCTION_ANALYSIS("machine-ore", MachineOptimizationRemarkEmitterPassAnalysis())
// MACHINE_FUNCTION_ANALYSIS("machine-post-dom-tree", MachinePostDominatorTreeAnalysis())
// MACHINE_FUNCTION_ANALYSIS("machine-region-info", MachineRegionInfoPassAnalysis())
// MACHINE_FUNCTION_ANALYSIS("machine-trace-metrics", MachineTraceMetricsAnalysis())
// MACHINE_FUNCTION_ANALYSIS("reaching-def", ReachingDefAnalysisAnalysis())
// MACHINE_FUNCTION_ANALYSIS("live-reg-matrix", LiveRegMatrixAnalysis())
// MACHINE_FUNCTION_ANALYSIS("gc-analysis", GCMachineCodeAnalysisPass())
#undef MACHINE_FUNCTION_ANALYSIS
#ifndef MACHINE_FUNCTION_PASS
#define MACHINE_FUNCTION_PASS(NAME, PASS_NAME, CONSTRUCTOR)
#endif
// MACHINE_FUNCTION_PASS("mir-printer", PrintMIRPass, ())
// MACHINE_FUNCTION_PASS("free-machine-function", FreeMachineFunctionPass, ())
#undef MACHINE_FUNCTION_PASS
// After a pass is converted to new pass manager, its entry should be moved from
// dummy table to the normal one. For example, for a machine function pass,
// DUMMY_MACHINE_FUNCTION_PASS to MACHINE_FUNCTION_PASS.
#ifndef DUMMY_FUNCTION_PASS
#define DUMMY_FUNCTION_PASS(NAME, PASS_NAME, CONSTRUCTOR)
#endif
DUMMY_FUNCTION_PASS("expandmemcmp", ExpandMemCmpPass, ())
DUMMY_FUNCTION_PASS("gc-lowering", GCLoweringPass, ())
DUMMY_FUNCTION_PASS("shadow-stack-gc-lowering", ShadowStackGCLoweringPass, ())
DUMMY_FUNCTION_PASS("sjljehprepare", SjLjEHPreparePass, ())
DUMMY_FUNCTION_PASS("dwarfehprepare", DwarfEHPass, ())
DUMMY_FUNCTION_PASS("winehprepare", WinEHPass, ())
DUMMY_FUNCTION_PASS("wasmehprepare", WasmEHPass, ())
DUMMY_FUNCTION_PASS("codegenprepare", CodeGenPreparePass, ())
DUMMY_FUNCTION_PASS("safe-stack", SafeStackPass, ())
DUMMY_FUNCTION_PASS("stack-protector", StackProtectorPass, ())
DUMMY_FUNCTION_PASS("atomic-expand", AtomicExpandPass, ())
DUMMY_FUNCTION_PASS("interleaved-access", InterleavedAccessPass, ())
DUMMY_FUNCTION_PASS("indirectbr-expand", IndirectBrExpandPass, ())
DUMMY_FUNCTION_PASS("cfguard-dispatch", CFGuardDispatchPass, ())
DUMMY_FUNCTION_PASS("cfguard-check", CFGuardCheckPass, ())
DUMMY_FUNCTION_PASS("gc-info-printer", GCInfoPrinterPass, ())
DUMMY_FUNCTION_PASS("select-optimize", SelectOptimizePass, ())
DUMMY_FUNCTION_PASS("callbrprepare", CallBrPrepare, ())
#undef DUMMY_FUNCTION_PASS
#ifndef DUMMY_MODULE_PASS
#define DUMMY_MODULE_PASS(NAME, PASS_NAME, CONSTRUCTOR)
#endif
DUMMY_MODULE_PASS("lower-emutls", LowerEmuTLSPass, ())
#undef DUMMY_MODULE_PASS
#ifndef DUMMY_MACHINE_MODULE_PASS
#define DUMMY_MACHINE_MODULE_PASS(NAME, PASS_NAME, CONSTRUCTOR)
#endif
DUMMY_MACHINE_MODULE_PASS("machine-outliner", MachineOutlinerPass, ())
#undef DUMMY_MACHINE_MODULE_PASS
#ifndef DUMMY_MACHINE_FUNCTION_PASS
#define DUMMY_MACHINE_FUNCTION_PASS(NAME, PASS_NAME, CONSTRUCTOR)
#endif
DUMMY_MACHINE_FUNCTION_PASS("mir-printer", PrintMIRPass, ())
DUMMY_MACHINE_FUNCTION_PASS("free-machine-function", FreeMachineFunctionPass, ())
DUMMY_MACHINE_FUNCTION_PASS("finalize-isel", FinalizeISelPass, ())
DUMMY_MACHINE_FUNCTION_PASS("localstackalloc", LocalStackSlotPass, ())
DUMMY_MACHINE_FUNCTION_PASS("shrink-wrap", ShrinkWrapPass, ())
DUMMY_MACHINE_FUNCTION_PASS("prologepilog", PrologEpilogInserterPass, ())
DUMMY_MACHINE_FUNCTION_PASS("postrapseudos", ExpandPostRAPseudosPass, ())
DUMMY_MACHINE_FUNCTION_PASS("implicit-null-checks", ImplicitNullChecksPass, ())
DUMMY_MACHINE_FUNCTION_PASS("postmisched", PostMachineSchedulerPass, ())
DUMMY_MACHINE_FUNCTION_PASS("machine-scheduler", MachineSchedulerPass, ())
DUMMY_MACHINE_FUNCTION_PASS("machine-cp", MachineCopyPropagationPass, ())
DUMMY_MACHINE_FUNCTION_PASS("machine-latecleanup", MachineLateInstrsCleanupPass, ())
DUMMY_MACHINE_FUNCTION_PASS("post-RA-sched", PostRASchedulerPass, ())
DUMMY_MACHINE_FUNCTION_PASS("fentry-insert", FEntryInserterPass, ())
DUMMY_MACHINE_FUNCTION_PASS("xray-instrumentation", XRayInstrumentationPass, ())
DUMMY_MACHINE_FUNCTION_PASS("patchable-function", PatchableFunctionPass, ())
DUMMY_MACHINE_FUNCTION_PASS("reg-usage-propagation", RegUsageInfoPropagationPass, ())
DUMMY_MACHINE_FUNCTION_PASS("reg-usage-collector", RegUsageInfoCollectorPass, ())
DUMMY_MACHINE_FUNCTION_PASS("funclet-layout", FuncletLayoutPass, ())
DUMMY_MACHINE_FUNCTION_PASS("stackmap-liveness", StackMapLivenessPass, ())
DUMMY_MACHINE_FUNCTION_PASS("removeredundantdebugvalues", RemoveRedundantDebugValuesPass, ())
DUMMY_MACHINE_FUNCTION_PASS("dot-machine-cfg", MachineCFGPrinter, ())
DUMMY_MACHINE_FUNCTION_PASS("livedebugvalues", LiveDebugValuesPass, ())
DUMMY_MACHINE_FUNCTION_PASS("early-tailduplication", EarlyTailDuplicatePass, ())
DUMMY_MACHINE_FUNCTION_PASS("opt-phis", OptimizePHIsPass, ())
DUMMY_MACHINE_FUNCTION_PASS("stack-coloring", StackColoringPass, ())
DUMMY_MACHINE_FUNCTION_PASS("dead-mi-elimination", DeadMachineInstructionElimPass, ())
DUMMY_MACHINE_FUNCTION_PASS("early-machinelicm", EarlyMachineLICMPass, ())
DUMMY_MACHINE_FUNCTION_PASS("machinelicm", MachineLICMPass, ())
DUMMY_MACHINE_FUNCTION_PASS("machine-cse", MachineCSEPass, ())
DUMMY_MACHINE_FUNCTION_PASS("machine-sink", MachineSinkingPass, ())
DUMMY_MACHINE_FUNCTION_PASS("postra-machine-sink", PostRAMachineSinkingPass, ())
DUMMY_MACHINE_FUNCTION_PASS("peephole-opt", PeepholeOptimizerPass, ())
DUMMY_MACHINE_FUNCTION_PASS("regalloc", RegAllocPass, ())
DUMMY_MACHINE_FUNCTION_PASS("virtregrewriter", VirtRegRewriterPass, ())
DUMMY_MACHINE_FUNCTION_PASS("stack-slot-coloring", StackSlotColoringPass, ())
DUMMY_MACHINE_FUNCTION_PASS("phi-node-elimination", PHIEliminationPass, ())
DUMMY_MACHINE_FUNCTION_PASS("twoaddressinstruction", TwoAddressInstructionPass, ())
DUMMY_MACHINE_FUNCTION_PASS("detect-dead-lanes", DetectDeadLanesPass, ())
DUMMY_MACHINE_FUNCTION_PASS("processimpdefs", ProcessImplicitDefsPass, ())
DUMMY_MACHINE_FUNCTION_PASS("liveintervals", LiveIntervalsPass, ())
DUMMY_MACHINE_FUNCTION_PASS("simple-register-coalescing", RegisterCoalescerPass, ())
DUMMY_MACHINE_FUNCTION_PASS("rename-independent-subregs", RenameIndependentSubregsPass, ())
DUMMY_MACHINE_FUNCTION_PASS("branch-folder", BranchFolderPass, ())
DUMMY_MACHINE_FUNCTION_PASS("tailduplication", TailDuplicatePass, ())
DUMMY_MACHINE_FUNCTION_PASS("block-placement", MachineBlockPlacementPass, ())
DUMMY_MACHINE_FUNCTION_PASS("block-placement-stats", MachineBlockPlacementStatsPass, ())
DUMMY_MACHINE_FUNCTION_PASS("early-ifcvt", EarlyIfConverterPass, ())
DUMMY_MACHINE_FUNCTION_PASS("machine-combiner", MachineCombinerPass, ())
DUMMY_MACHINE_FUNCTION_PASS("lrshrink", LiveRangeShrinkPass, ())
DUMMY_MACHINE_FUNCTION_PASS("break-false-deps", BreakFalseDepsPass, ())
DUMMY_MACHINE_FUNCTION_PASS("cfi-instr-inserter", CFIInstrInserterPass, ())
DUMMY_MACHINE_FUNCTION_PASS("cfguard-longjmp", CFGuardLongjmpPass, ())
DUMMY_MACHINE_FUNCTION_PASS("ra-basic", RABasicPass, ())
DUMMY_MACHINE_FUNCTION_PASS("ra-fast", RAFastPass, ())
DUMMY_MACHINE_FUNCTION_PASS("ra-greedy", RAGreedyPass, ())
DUMMY_MACHINE_FUNCTION_PASS("ra-pbqp", RAPBQPPass, ())
DUMMY_MACHINE_FUNCTION_PASS("legalizer", LegalizerPass, ())
DUMMY_MACHINE_FUNCTION_PASS("irtranslator", IRTranslatorPass, ())
DUMMY_MACHINE_FUNCTION_PASS("regbankselect", RegBankSelectPass, ())
DUMMY_MACHINE_FUNCTION_PASS("instruction-select", InstructionSelectPass, ())
DUMMY_MACHINE_FUNCTION_PASS("reset-machine-function", ResetMachineFunctionPass, ())
DUMMY_MACHINE_FUNCTION_PASS("machineverifier", MachineVerifierPass, ())
DUMMY_MACHINE_FUNCTION_PASS("print-machine-cycles", MachineCycleInfoPrinterPass, ())
DUMMY_MACHINE_FUNCTION_PASS("machine-sanmd", MachineSanitizerBinaryMetadata, ())
DUMMY_MACHINE_FUNCTION_PASS("machine-uniformity", MachineUniformityInfoWrapperPass, ())
DUMMY_MACHINE_FUNCTION_PASS("print-machine-uniformity", MachineUniformityInfoPrinterPass, ())
#undef DUMMY_MACHINE_FUNCTION_PASS
PK iwFZ�H�O�3 �3 CodeGen/TargetSubtargetInfo.hnu �[��� //===- llvm/CodeGen/TargetSubtargetInfo.h - Target Information --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file describes the subtarget options of a Target machine.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_TARGETSUBTARGETINFO_H
#define LLVM_CODEGEN_TARGETSUBTARGETINFO_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/PBQPRAConstraint.h"
#include "llvm/CodeGen/SchedulerRegistry.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/CodeGen.h"
#include <memory>
#include <vector>
namespace llvm {
class APInt;
class MachineFunction;
class ScheduleDAGMutation;
class CallLowering;
class GlobalValue;
class InlineAsmLowering;
class InstrItineraryData;
struct InstrStage;
class InstructionSelector;
class LegalizerInfo;
class MachineInstr;
struct MachineSchedPolicy;
struct MCReadAdvanceEntry;
struct MCWriteLatencyEntry;
struct MCWriteProcResEntry;
class RegisterBankInfo;
class SDep;
class SelectionDAGTargetInfo;
class SUnit;
class TargetFrameLowering;
class TargetInstrInfo;
class TargetLowering;
class TargetRegisterClass;
class TargetRegisterInfo;
class TargetSchedModel;
class Triple;
//===----------------------------------------------------------------------===//
///
/// TargetSubtargetInfo - Generic base class for all target subtargets. All
/// Target-specific options that control code generation and printing should
/// be exposed through a TargetSubtargetInfo-derived class.
///
class TargetSubtargetInfo : public MCSubtargetInfo {
protected: // Can only create subclasses...
TargetSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU,
StringRef FS, ArrayRef<SubtargetFeatureKV> PF,
ArrayRef<SubtargetSubTypeKV> PD,
const MCWriteProcResEntry *WPR,
const MCWriteLatencyEntry *WL,
const MCReadAdvanceEntry *RA, const InstrStage *IS,
const unsigned *OC, const unsigned *FP);
public:
// AntiDepBreakMode - Type of anti-dependence breaking that should
// be performed before post-RA scheduling.
using AntiDepBreakMode = enum { ANTIDEP_NONE, ANTIDEP_CRITICAL, ANTIDEP_ALL };
using RegClassVector = SmallVectorImpl<const TargetRegisterClass *>;
TargetSubtargetInfo() = delete;
TargetSubtargetInfo(const TargetSubtargetInfo &) = delete;
TargetSubtargetInfo &operator=(const TargetSubtargetInfo &) = delete;
~TargetSubtargetInfo() override;
virtual bool isXRaySupported() const { return false; }
// Interfaces to the major aspects of target machine information:
//
// -- Instruction opcode and operand information
// -- Pipelines and scheduling information
// -- Stack frame information
// -- Selection DAG lowering information
// -- Call lowering information
//
// N.B. These objects may change during compilation. It's not safe to cache
// them between functions.
virtual const TargetInstrInfo *getInstrInfo() const { return nullptr; }
virtual const TargetFrameLowering *getFrameLowering() const {
return nullptr;
}
virtual const TargetLowering *getTargetLowering() const { return nullptr; }
virtual const SelectionDAGTargetInfo *getSelectionDAGInfo() const {
return nullptr;
}
virtual const CallLowering *getCallLowering() const { return nullptr; }
virtual const InlineAsmLowering *getInlineAsmLowering() const {
return nullptr;
}
// FIXME: This lets targets specialize the selector by subtarget (which lets
// us do things like a dedicated avx512 selector). However, we might want
// to also specialize selectors by MachineFunction, which would let us be
// aware of optsize/optnone and such.
virtual InstructionSelector *getInstructionSelector() const {
return nullptr;
}
/// Target can subclass this hook to select a different DAG scheduler.
virtual RegisterScheduler::FunctionPassCtor
getDAGScheduler(CodeGenOpt::Level) const {
return nullptr;
}
virtual const LegalizerInfo *getLegalizerInfo() const { return nullptr; }
/// getRegisterInfo - If register information is available, return it. If
/// not, return null.
virtual const TargetRegisterInfo *getRegisterInfo() const { return nullptr; }
/// If the information for the register banks is available, return it.
/// Otherwise return nullptr.
virtual const RegisterBankInfo *getRegBankInfo() const { return nullptr; }
/// getInstrItineraryData - Returns instruction itinerary data for the target
/// or specific subtarget.
virtual const InstrItineraryData *getInstrItineraryData() const {
return nullptr;
}
/// Resolve a SchedClass at runtime, where SchedClass identifies an
/// MCSchedClassDesc with the isVariant property. This may return the ID of
/// another variant SchedClass, but repeated invocation must quickly terminate
/// in a nonvariant SchedClass.
virtual unsigned resolveSchedClass(unsigned SchedClass,
const MachineInstr *MI,
const TargetSchedModel *SchedModel) const {
return 0;
}
/// Returns true if MI is a dependency breaking zero-idiom instruction for the
/// subtarget.
///
/// This function also sets bits in Mask related to input operands that
/// are not in a data dependency relationship. There is one bit for each
/// machine operand; implicit operands follow explicit operands in the bit
/// representation used for Mask. An empty (i.e. a mask with all bits
/// cleared) means: data dependencies are "broken" for all the explicit input
/// machine operands of MI.
virtual bool isZeroIdiom(const MachineInstr *MI, APInt &Mask) const {
return false;
}
/// Returns true if MI is a dependency breaking instruction for the subtarget.
///
/// Similar in behavior to `isZeroIdiom`. However, it knows how to identify
/// all dependency breaking instructions (i.e. not just zero-idioms).
///
/// As for `isZeroIdiom`, this method returns a mask of "broken" dependencies.
/// (See method `isZeroIdiom` for a detailed description of Mask).
virtual bool isDependencyBreaking(const MachineInstr *MI, APInt &Mask) const {
return isZeroIdiom(MI, Mask);
}
/// Returns true if MI is a candidate for move elimination.
///
/// A candidate for move elimination may be optimized out at register renaming
/// stage. Subtargets can specify the set of optimizable moves by
/// instantiating tablegen class `IsOptimizableRegisterMove` (see
/// llvm/Target/TargetInstrPredicate.td).
///
/// SubtargetEmitter is responsible for processing all the definitions of class
/// IsOptimizableRegisterMove, and auto-generate an override for this method.
virtual bool isOptimizableRegisterMove(const MachineInstr *MI) const {
return false;
}
/// True if the subtarget should run MachineScheduler after aggressive
/// coalescing.
///
/// This currently replaces the SelectionDAG scheduler with the "source" order
/// scheduler (though see below for an option to turn this off and use the
/// TargetLowering preference). It does not yet disable the postRA scheduler.
virtual bool enableMachineScheduler() const;
/// True if the machine scheduler should disable the TLI preference
/// for preRA scheduling with the source level scheduler.
virtual bool enableMachineSchedDefaultSched() const { return true; }
/// True if the subtarget should run MachinePipeliner
virtual bool enableMachinePipeliner() const { return true; };
/// True if the subtarget should enable joining global copies.
///
/// By default this is enabled if the machine scheduler is enabled, but
/// can be overridden.
virtual bool enableJoinGlobalCopies() const;
/// True if the subtarget should run a scheduler after register allocation.
///
/// By default this queries the PostRAScheduling bit in the scheduling model
/// which is the preferred way to influence this.
virtual bool enablePostRAScheduler() const;
/// True if the subtarget should run a machine scheduler after register
/// allocation.
virtual bool enablePostRAMachineScheduler() const;
/// True if the subtarget should run the atomic expansion pass.
virtual bool enableAtomicExpand() const;
/// True if the subtarget should run the indirectbr expansion pass.
virtual bool enableIndirectBrExpand() const;
/// Override generic scheduling policy within a region.
///
/// This is a convenient way for targets that don't provide any custom
/// scheduling heuristics (no custom MachineSchedStrategy) to make
/// changes to the generic scheduling policy.
virtual void overrideSchedPolicy(MachineSchedPolicy &Policy,
unsigned NumRegionInstrs) const {}
// Perform target-specific adjustments to the latency of a schedule
// dependency.
// If a pair of operands is associated with the schedule dependency, DefOpIdx
// and UseOpIdx are the indices of the operands in Def and Use, respectively.
// Otherwise, either may be -1.
virtual void adjustSchedDependency(SUnit *Def, int DefOpIdx, SUnit *Use,
int UseOpIdx, SDep &Dep) const {}
// For use with PostRAScheduling: get the anti-dependence breaking that should
// be performed before post-RA scheduling.
virtual AntiDepBreakMode getAntiDepBreakMode() const { return ANTIDEP_NONE; }
// For use with PostRAScheduling: in CriticalPathRCs, return any register
// classes that should only be considered for anti-dependence breaking if they
// are on the critical path.
virtual void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const {
return CriticalPathRCs.clear();
}
// Provide an ordered list of schedule DAG mutations for the post-RA
// scheduler.
virtual void getPostRAMutations(
std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const {
}
// Provide an ordered list of schedule DAG mutations for the machine
// pipeliner.
virtual void getSMSMutations(
std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const {
}
/// Default to DFA for resource management, return false when target will use
/// ProcResource in InstrSchedModel instead.
virtual bool useDFAforSMS() const { return true; }
// For use with PostRAScheduling: get the minimum optimization level needed
// to enable post-RA scheduling.
virtual CodeGenOpt::Level getOptLevelToEnablePostRAScheduler() const {
return CodeGenOpt::Default;
}
/// True if the subtarget should run the local reassignment
/// heuristic of the register allocator.
/// This heuristic may be compile time intensive, \p OptLevel provides
/// a finer grain to tune the register allocator.
virtual bool enableRALocalReassignment(CodeGenOpt::Level OptLevel) const;
/// Enable use of alias analysis during code generation (during MI
/// scheduling, DAGCombine, etc.).
virtual bool useAA() const;
/// \brief Sink addresses into blocks using GEP instructions rather than
/// pointer casts and arithmetic.
virtual bool addrSinkUsingGEPs() const {
return useAA();
}
/// Enable the use of the early if conversion pass.
virtual bool enableEarlyIfConversion() const { return false; }
/// Return PBQPConstraint(s) for the target.
///
/// Override to provide custom PBQP constraints.
virtual std::unique_ptr<PBQPRAConstraint> getCustomPBQPConstraints() const {
return nullptr;
}
/// Enable tracking of subregister liveness in register allocator.
/// Please use MachineRegisterInfo::subRegLivenessEnabled() instead where
/// possible.
virtual bool enableSubRegLiveness() const { return false; }
/// This is called after a .mir file was loaded.
virtual void mirFileLoaded(MachineFunction &MF) const;
/// True if the register allocator should use the allocation orders exactly as
/// written in the tablegen descriptions, false if it should allocate
/// the specified physical register later if is it callee-saved.
virtual bool ignoreCSRForAllocationOrder(const MachineFunction &MF,
unsigned PhysReg) const {
return false;
}
/// Classify a global function reference. This mainly used to fetch target
/// special flags for lowering a function address. For example mark a function
/// call should be plt or pc-related addressing.
virtual unsigned char
classifyGlobalFunctionReference(const GlobalValue *GV) const {
return 0;
}
/// Enable spillage copy elimination in MachineCopyPropagation pass. This
/// helps removing redundant copies generated by register allocator when
/// handling complex eviction chains.
virtual bool enableSpillageCopyElimination() const { return false; }
};
} // end namespace llvm
#endif // LLVM_CODEGEN_TARGETSUBTARGETINFO_H
PK iwFZ�a:�R� R� CodeGen/SelectionDAG.hnu �[��� //===- llvm/CodeGen/SelectionDAG.h - InstSelection DAG ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the SelectionDAG class, and transitively defines the
// SDNode class and subclasses.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_SELECTIONDAG_H
#define LLVM_CODEGEN_SELECTIONDAG_H
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/FoldingSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/ilist.h"
#include "llvm/ADT/iterator.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/DAGCombine.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineValueType.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/Metadata.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/ArrayRecycler.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/RecyclingAllocator.h"
#include <cassert>
#include <cstdint>
#include <functional>
#include <map>
#include <string>
#include <tuple>
#include <utility>
#include <vector>
namespace llvm {
class DIExpression;
class DILabel;
class DIVariable;
class Function;
class Pass;
class Type;
template <class GraphType> struct GraphTraits;
template <typename T, unsigned int N> class SmallSetVector;
template <typename T, typename Enable> struct FoldingSetTrait;
class AAResults;
class BlockAddress;
class BlockFrequencyInfo;
class Constant;
class ConstantFP;
class ConstantInt;
class DataLayout;
struct fltSemantics;
class FunctionLoweringInfo;
class FunctionVarLocs;
class GlobalValue;
struct KnownBits;
class LLVMContext;
class MachineBasicBlock;
class MachineConstantPoolValue;
class MCSymbol;
class OptimizationRemarkEmitter;
class ProfileSummaryInfo;
class SDDbgValue;
class SDDbgOperand;
class SDDbgLabel;
class SelectionDAG;
class SelectionDAGTargetInfo;
class TargetLibraryInfo;
class TargetLowering;
class TargetMachine;
class TargetSubtargetInfo;
class Value;
template <typename T> class GenericSSAContext;
using SSAContext = GenericSSAContext<Function>;
template <typename T> class GenericUniformityInfo;
using UniformityInfo = GenericUniformityInfo<SSAContext>;
class SDVTListNode : public FoldingSetNode {
friend struct FoldingSetTrait<SDVTListNode>;
/// A reference to an Interned FoldingSetNodeID for this node.
/// The Allocator in SelectionDAG holds the data.
/// SDVTList contains all types which are frequently accessed in SelectionDAG.
/// The size of this list is not expected to be big so it won't introduce
/// a memory penalty.
FoldingSetNodeIDRef FastID;
const EVT *VTs;
unsigned int NumVTs;
/// The hash value for SDVTList is fixed, so cache it to avoid
/// hash calculation.
unsigned HashValue;
public:
SDVTListNode(const FoldingSetNodeIDRef ID, const EVT *VT, unsigned int Num) :
FastID(ID), VTs(VT), NumVTs(Num) {
HashValue = ID.ComputeHash();
}
SDVTList getSDVTList() {
SDVTList result = {VTs, NumVTs};
return result;
}
};
/// Specialize FoldingSetTrait for SDVTListNode
/// to avoid computing temp FoldingSetNodeID and hash value.
template<> struct FoldingSetTrait<SDVTListNode> : DefaultFoldingSetTrait<SDVTListNode> {
static void Profile(const SDVTListNode &X, FoldingSetNodeID& ID) {
ID = X.FastID;
}
static bool Equals(const SDVTListNode &X, const FoldingSetNodeID &ID,
unsigned IDHash, FoldingSetNodeID &TempID) {
if (X.HashValue != IDHash)
return false;
return ID == X.FastID;
}
static unsigned ComputeHash(const SDVTListNode &X, FoldingSetNodeID &TempID) {
return X.HashValue;
}
};
template <> struct ilist_alloc_traits<SDNode> {
static void deleteNode(SDNode *) {
llvm_unreachable("ilist_traits<SDNode> shouldn't see a deleteNode call!");
}
};
/// Keeps track of dbg_value information through SDISel. We do
/// not build SDNodes for these so as not to perturb the generated code;
/// instead the info is kept off to the side in this structure. Each SDNode may
/// have one or more associated dbg_value entries. This information is kept in
/// DbgValMap.
/// Byval parameters are handled separately because they don't use alloca's,
/// which busts the normal mechanism. There is good reason for handling all
/// parameters separately: they may not have code generated for them, they
/// should always go at the beginning of the function regardless of other code
/// motion, and debug info for them is potentially useful even if the parameter
/// is unused. Right now only byval parameters are handled separately.
class SDDbgInfo {
BumpPtrAllocator Alloc;
SmallVector<SDDbgValue*, 32> DbgValues;
SmallVector<SDDbgValue*, 32> ByvalParmDbgValues;
SmallVector<SDDbgLabel*, 4> DbgLabels;
using DbgValMapType = DenseMap<const SDNode *, SmallVector<SDDbgValue *, 2>>;
DbgValMapType DbgValMap;
public:
SDDbgInfo() = default;
SDDbgInfo(const SDDbgInfo &) = delete;
SDDbgInfo &operator=(const SDDbgInfo &) = delete;
void add(SDDbgValue *V, bool isParameter);
void add(SDDbgLabel *L) { DbgLabels.push_back(L); }
/// Invalidate all DbgValues attached to the node and remove
/// it from the Node-to-DbgValues map.
void erase(const SDNode *Node);
void clear() {
DbgValMap.clear();
DbgValues.clear();
ByvalParmDbgValues.clear();
DbgLabels.clear();
Alloc.Reset();
}
BumpPtrAllocator &getAlloc() { return Alloc; }
bool empty() const {
return DbgValues.empty() && ByvalParmDbgValues.empty() && DbgLabels.empty();
}
ArrayRef<SDDbgValue*> getSDDbgValues(const SDNode *Node) const {
auto I = DbgValMap.find(Node);
if (I != DbgValMap.end())
return I->second;
return ArrayRef<SDDbgValue*>();
}
using DbgIterator = SmallVectorImpl<SDDbgValue*>::iterator;
using DbgLabelIterator = SmallVectorImpl<SDDbgLabel*>::iterator;
DbgIterator DbgBegin() { return DbgValues.begin(); }
DbgIterator DbgEnd() { return DbgValues.end(); }
DbgIterator ByvalParmDbgBegin() { return ByvalParmDbgValues.begin(); }
DbgIterator ByvalParmDbgEnd() { return ByvalParmDbgValues.end(); }
DbgLabelIterator DbgLabelBegin() { return DbgLabels.begin(); }
DbgLabelIterator DbgLabelEnd() { return DbgLabels.end(); }
};
void checkForCycles(const SelectionDAG *DAG, bool force = false);
/// This is used to represent a portion of an LLVM function in a low-level
/// Data Dependence DAG representation suitable for instruction selection.
/// This DAG is constructed as the first step of instruction selection in order
/// to allow implementation of machine specific optimizations
/// and code simplifications.
///
/// The representation used by the SelectionDAG is a target-independent
/// representation, which has some similarities to the GCC RTL representation,
/// but is significantly more simple, powerful, and is a graph form instead of a
/// linear form.
///
class SelectionDAG {
const TargetMachine &TM;
const SelectionDAGTargetInfo *TSI = nullptr;
const TargetLowering *TLI = nullptr;
const TargetLibraryInfo *LibInfo = nullptr;
const FunctionVarLocs *FnVarLocs = nullptr;
MachineFunction *MF;
Pass *SDAGISelPass = nullptr;
LLVMContext *Context;
CodeGenOpt::Level OptLevel;
UniformityInfo *UA = nullptr;
FunctionLoweringInfo * FLI = nullptr;
/// The function-level optimization remark emitter. Used to emit remarks
/// whenever manipulating the DAG.
OptimizationRemarkEmitter *ORE;
ProfileSummaryInfo *PSI = nullptr;
BlockFrequencyInfo *BFI = nullptr;
/// List of non-single value types.
FoldingSet<SDVTListNode> VTListMap;
/// Pool allocation for misc. objects that are created once per SelectionDAG.
BumpPtrAllocator Allocator;
/// The starting token.
SDNode EntryNode;
/// The root of the entire DAG.
SDValue Root;
/// A linked list of nodes in the current DAG.
ilist<SDNode> AllNodes;
/// The AllocatorType for allocating SDNodes. We use
/// pool allocation with recycling.
using NodeAllocatorType = RecyclingAllocator<BumpPtrAllocator, SDNode,
sizeof(LargestSDNode),
alignof(MostAlignedSDNode)>;
/// Pool allocation for nodes.
NodeAllocatorType NodeAllocator;
/// This structure is used to memoize nodes, automatically performing
/// CSE with existing nodes when a duplicate is requested.
FoldingSet<SDNode> CSEMap;
/// Pool allocation for machine-opcode SDNode operands.
BumpPtrAllocator OperandAllocator;
ArrayRecycler<SDUse> OperandRecycler;
/// Tracks dbg_value and dbg_label information through SDISel.
SDDbgInfo *DbgInfo;
using CallSiteInfo = MachineFunction::CallSiteInfo;
using CallSiteInfoImpl = MachineFunction::CallSiteInfoImpl;
struct NodeExtraInfo {
CallSiteInfo CSInfo;
MDNode *HeapAllocSite = nullptr;
MDNode *PCSections = nullptr;
bool NoMerge = false;
};
/// Out-of-line extra information for SDNodes.
DenseMap<const SDNode *, NodeExtraInfo> SDEI;
/// PersistentId counter to be used when inserting the next
/// SDNode to this SelectionDAG. We do not place that under
/// `#if LLVM_ENABLE_ABI_BREAKING_CHECKS` intentionally because
/// it adds unneeded complexity without noticeable
/// benefits (see discussion with @thakis in D120714).
uint16_t NextPersistentId = 0;
public:
/// Clients of various APIs that cause global effects on
/// the DAG can optionally implement this interface. This allows the clients
/// to handle the various sorts of updates that happen.
///
/// A DAGUpdateListener automatically registers itself with DAG when it is
/// constructed, and removes itself when destroyed in RAII fashion.
struct DAGUpdateListener {
DAGUpdateListener *const Next;
SelectionDAG &DAG;
explicit DAGUpdateListener(SelectionDAG &D)
: Next(D.UpdateListeners), DAG(D) {
DAG.UpdateListeners = this;
}
virtual ~DAGUpdateListener() {
assert(DAG.UpdateListeners == this &&
"DAGUpdateListeners must be destroyed in LIFO order");
DAG.UpdateListeners = Next;
}
/// The node N that was deleted and, if E is not null, an
/// equivalent node E that replaced it.
virtual void NodeDeleted(SDNode *N, SDNode *E);
/// The node N that was updated.
virtual void NodeUpdated(SDNode *N);
/// The node N that was inserted.
virtual void NodeInserted(SDNode *N);
};
struct DAGNodeDeletedListener : public DAGUpdateListener {
std::function<void(SDNode *, SDNode *)> Callback;
DAGNodeDeletedListener(SelectionDAG &DAG,
std::function<void(SDNode *, SDNode *)> Callback)
: DAGUpdateListener(DAG), Callback(std::move(Callback)) {}
void NodeDeleted(SDNode *N, SDNode *E) override { Callback(N, E); }
private:
virtual void anchor();
};
struct DAGNodeInsertedListener : public DAGUpdateListener {
std::function<void(SDNode *)> Callback;
DAGNodeInsertedListener(SelectionDAG &DAG,
std::function<void(SDNode *)> Callback)
: DAGUpdateListener(DAG), Callback(std::move(Callback)) {}
void NodeInserted(SDNode *N) override { Callback(N); }
private:
virtual void anchor();
};
/// Help to insert SDNodeFlags automatically in transforming. Use
/// RAII to save and resume flags in current scope.
class FlagInserter {
SelectionDAG &DAG;
SDNodeFlags Flags;
FlagInserter *LastInserter;
public:
FlagInserter(SelectionDAG &SDAG, SDNodeFlags Flags)
: DAG(SDAG), Flags(Flags),
LastInserter(SDAG.getFlagInserter()) {
SDAG.setFlagInserter(this);
}
FlagInserter(SelectionDAG &SDAG, SDNode *N)
: FlagInserter(SDAG, N->getFlags()) {}
FlagInserter(const FlagInserter &) = delete;
FlagInserter &operator=(const FlagInserter &) = delete;
~FlagInserter() { DAG.setFlagInserter(LastInserter); }
SDNodeFlags getFlags() const { return Flags; }
};
/// When true, additional steps are taken to
/// ensure that getConstant() and similar functions return DAG nodes that
/// have legal types. This is important after type legalization since
/// any illegally typed nodes generated after this point will not experience
/// type legalization.
bool NewNodesMustHaveLegalTypes = false;
private:
/// DAGUpdateListener is a friend so it can manipulate the listener stack.
friend struct DAGUpdateListener;
/// Linked list of registered DAGUpdateListener instances.
/// This stack is maintained by DAGUpdateListener RAII.
DAGUpdateListener *UpdateListeners = nullptr;
/// Implementation of setSubgraphColor.
/// Return whether we had to truncate the search.
bool setSubgraphColorHelper(SDNode *N, const char *Color,
DenseSet<SDNode *> &visited,
int level, bool &printed);
template <typename SDNodeT, typename... ArgTypes>
SDNodeT *newSDNode(ArgTypes &&... Args) {
return new (NodeAllocator.template Allocate<SDNodeT>())
SDNodeT(std::forward<ArgTypes>(Args)...);
}
/// Build a synthetic SDNodeT with the given args and extract its subclass
/// data as an integer (e.g. for use in a folding set).
///
/// The args to this function are the same as the args to SDNodeT's
/// constructor, except the second arg (assumed to be a const DebugLoc&) is
/// omitted.
template <typename SDNodeT, typename... ArgTypes>
static uint16_t getSyntheticNodeSubclassData(unsigned IROrder,
ArgTypes &&... Args) {
// The compiler can reduce this expression to a constant iff we pass an
// empty DebugLoc. Thankfully, the debug location doesn't have any bearing
// on the subclass data.
return SDNodeT(IROrder, DebugLoc(), std::forward<ArgTypes>(Args)...)
.getRawSubclassData();
}
template <typename SDNodeTy>
static uint16_t getSyntheticNodeSubclassData(unsigned Opc, unsigned Order,
SDVTList VTs, EVT MemoryVT,
MachineMemOperand *MMO) {
return SDNodeTy(Opc, Order, DebugLoc(), VTs, MemoryVT, MMO)
.getRawSubclassData();
}
void createOperands(SDNode *Node, ArrayRef<SDValue> Vals);
void removeOperands(SDNode *Node) {
if (!Node->OperandList)
return;
OperandRecycler.deallocate(
ArrayRecycler<SDUse>::Capacity::get(Node->NumOperands),
Node->OperandList);
Node->NumOperands = 0;
Node->OperandList = nullptr;
}
void CreateTopologicalOrder(std::vector<SDNode*>& Order);
public:
// Maximum depth for recursive analysis such as computeKnownBits, etc.
static constexpr unsigned MaxRecursionDepth = 6;
explicit SelectionDAG(const TargetMachine &TM, CodeGenOpt::Level);
SelectionDAG(const SelectionDAG &) = delete;
SelectionDAG &operator=(const SelectionDAG &) = delete;
~SelectionDAG();
/// Prepare this SelectionDAG to process code in the given MachineFunction.
void init(MachineFunction &NewMF, OptimizationRemarkEmitter &NewORE,
Pass *PassPtr, const TargetLibraryInfo *LibraryInfo,
UniformityInfo *UA, ProfileSummaryInfo *PSIin,
BlockFrequencyInfo *BFIin, FunctionVarLocs const *FnVarLocs);
void setFunctionLoweringInfo(FunctionLoweringInfo * FuncInfo) {
FLI = FuncInfo;
}
/// Clear state and free memory necessary to make this
/// SelectionDAG ready to process a new block.
void clear();
MachineFunction &getMachineFunction() const { return *MF; }
const Pass *getPass() const { return SDAGISelPass; }
const DataLayout &getDataLayout() const { return MF->getDataLayout(); }
const TargetMachine &getTarget() const { return TM; }
const TargetSubtargetInfo &getSubtarget() const { return MF->getSubtarget(); }
template <typename STC> const STC &getSubtarget() const {
return MF->getSubtarget<STC>();
}
const TargetLowering &getTargetLoweringInfo() const { return *TLI; }
const TargetLibraryInfo &getLibInfo() const { return *LibInfo; }
const SelectionDAGTargetInfo &getSelectionDAGInfo() const { return *TSI; }
const UniformityInfo *getUniformityInfo() const { return UA; }
/// Returns the result of the AssignmentTrackingAnalysis pass if it's
/// available, otherwise return nullptr.
const FunctionVarLocs *getFunctionVarLocs() const { return FnVarLocs; }
LLVMContext *getContext() const { return Context; }
OptimizationRemarkEmitter &getORE() const { return *ORE; }
ProfileSummaryInfo *getPSI() const { return PSI; }
BlockFrequencyInfo *getBFI() const { return BFI; }
FlagInserter *getFlagInserter() { return Inserter; }
void setFlagInserter(FlagInserter *FI) { Inserter = FI; }
/// Just dump dot graph to a user-provided path and title.
/// This doesn't open the dot viewer program and
/// helps visualization when outside debugging session.
/// FileName expects absolute path. If provided
/// without any path separators then the file
/// will be created in the current directory.
/// Error will be emitted if the path is insane.
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD void dumpDotGraph(const Twine &FileName, const Twine &Title);
#endif
/// Pop up a GraphViz/gv window with the DAG rendered using 'dot'.
void viewGraph(const std::string &Title);
void viewGraph();
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
std::map<const SDNode *, std::string> NodeGraphAttrs;
#endif
/// Clear all previously defined node graph attributes.
/// Intended to be used from a debugging tool (eg. gdb).
void clearGraphAttrs();
/// Set graph attributes for a node. (eg. "color=red".)
void setGraphAttrs(const SDNode *N, const char *Attrs);
/// Get graph attributes for a node. (eg. "color=red".)
/// Used from getNodeAttributes.
std::string getGraphAttrs(const SDNode *N) const;
/// Convenience for setting node color attribute.
void setGraphColor(const SDNode *N, const char *Color);
/// Convenience for setting subgraph color attribute.
void setSubgraphColor(SDNode *N, const char *Color);
using allnodes_const_iterator = ilist<SDNode>::const_iterator;
allnodes_const_iterator allnodes_begin() const { return AllNodes.begin(); }
allnodes_const_iterator allnodes_end() const { return AllNodes.end(); }
using allnodes_iterator = ilist<SDNode>::iterator;
allnodes_iterator allnodes_begin() { return AllNodes.begin(); }
allnodes_iterator allnodes_end() { return AllNodes.end(); }
ilist<SDNode>::size_type allnodes_size() const {
return AllNodes.size();
}
iterator_range<allnodes_iterator> allnodes() {
return make_range(allnodes_begin(), allnodes_end());
}
iterator_range<allnodes_const_iterator> allnodes() const {
return make_range(allnodes_begin(), allnodes_end());
}
/// Return the root tag of the SelectionDAG.
const SDValue &getRoot() const { return Root; }
/// Return the token chain corresponding to the entry of the function.
SDValue getEntryNode() const {
return SDValue(const_cast<SDNode *>(&EntryNode), 0);
}
/// Set the current root tag of the SelectionDAG.
///
const SDValue &setRoot(SDValue N) {
assert((!N.getNode() || N.getValueType() == MVT::Other) &&
"DAG root value is not a chain!");
if (N.getNode())
checkForCycles(N.getNode(), this);
Root = N;
if (N.getNode())
checkForCycles(this);
return Root;
}
#ifndef NDEBUG
void VerifyDAGDivergence();
#endif
/// This iterates over the nodes in the SelectionDAG, folding
/// certain types of nodes together, or eliminating superfluous nodes. The
/// Level argument controls whether Combine is allowed to produce nodes and
/// types that are illegal on the target.
void Combine(CombineLevel Level, AAResults *AA,
CodeGenOpt::Level OptLevel);
/// This transforms the SelectionDAG into a SelectionDAG that
/// only uses types natively supported by the target.
/// Returns "true" if it made any changes.
///
/// Note that this is an involved process that may invalidate pointers into
/// the graph.
bool LegalizeTypes();
/// This transforms the SelectionDAG into a SelectionDAG that is
/// compatible with the target instruction selector, as indicated by the
/// TargetLowering object.
///
/// Note that this is an involved process that may invalidate pointers into
/// the graph.
void Legalize();
/// Transforms a SelectionDAG node and any operands to it into a node
/// that is compatible with the target instruction selector, as indicated by
/// the TargetLowering object.
///
/// \returns true if \c N is a valid, legal node after calling this.
///
/// This essentially runs a single recursive walk of the \c Legalize process
/// over the given node (and its operands). This can be used to incrementally
/// legalize the DAG. All of the nodes which are directly replaced,
/// potentially including N, are added to the output parameter \c
/// UpdatedNodes so that the delta to the DAG can be understood by the
/// caller.
///
/// When this returns false, N has been legalized in a way that make the
/// pointer passed in no longer valid. It may have even been deleted from the
/// DAG, and so it shouldn't be used further. When this returns true, the
/// N passed in is a legal node, and can be immediately processed as such.
/// This may still have done some work on the DAG, and will still populate
/// UpdatedNodes with any new nodes replacing those originally in the DAG.
bool LegalizeOp(SDNode *N, SmallSetVector<SDNode *, 16> &UpdatedNodes);
/// This transforms the SelectionDAG into a SelectionDAG
/// that only uses vector math operations supported by the target. This is
/// necessary as a separate step from Legalize because unrolling a vector
/// operation can introduce illegal types, which requires running
/// LegalizeTypes again.
///
/// This returns true if it made any changes; in that case, LegalizeTypes
/// is called again before Legalize.
///
/// Note that this is an involved process that may invalidate pointers into
/// the graph.
bool LegalizeVectors();
/// This method deletes all unreachable nodes in the SelectionDAG.
void RemoveDeadNodes();
/// Remove the specified node from the system. This node must
/// have no referrers.
void DeleteNode(SDNode *N);
/// Return an SDVTList that represents the list of values specified.
SDVTList getVTList(EVT VT);
SDVTList getVTList(EVT VT1, EVT VT2);
SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3);
SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4);
SDVTList getVTList(ArrayRef<EVT> VTs);
//===--------------------------------------------------------------------===//
// Node creation methods.
/// Create a ConstantSDNode wrapping a constant value.
/// If VT is a vector type, the constant is splatted into a BUILD_VECTOR.
///
/// If only legal types can be produced, this does the necessary
/// transformations (e.g., if the vector element type is illegal).
/// @{
SDValue getConstant(uint64_t Val, const SDLoc &DL, EVT VT,
bool isTarget = false, bool isOpaque = false);
SDValue getConstant(const APInt &Val, const SDLoc &DL, EVT VT,
bool isTarget = false, bool isOpaque = false);
SDValue getAllOnesConstant(const SDLoc &DL, EVT VT, bool IsTarget = false,
bool IsOpaque = false) {
return getConstant(APInt::getAllOnes(VT.getScalarSizeInBits()), DL, VT,
IsTarget, IsOpaque);
}
SDValue getConstant(const ConstantInt &Val, const SDLoc &DL, EVT VT,
bool isTarget = false, bool isOpaque = false);
SDValue getIntPtrConstant(uint64_t Val, const SDLoc &DL,
bool isTarget = false);
SDValue getShiftAmountConstant(uint64_t Val, EVT VT, const SDLoc &DL,
bool LegalTypes = true);
SDValue getVectorIdxConstant(uint64_t Val, const SDLoc &DL,
bool isTarget = false);
SDValue getTargetConstant(uint64_t Val, const SDLoc &DL, EVT VT,
bool isOpaque = false) {
return getConstant(Val, DL, VT, true, isOpaque);
}
SDValue getTargetConstant(const APInt &Val, const SDLoc &DL, EVT VT,
bool isOpaque = false) {
return getConstant(Val, DL, VT, true, isOpaque);
}
SDValue getTargetConstant(const ConstantInt &Val, const SDLoc &DL, EVT VT,
bool isOpaque = false) {
return getConstant(Val, DL, VT, true, isOpaque);
}
/// Create a true or false constant of type \p VT using the target's
/// BooleanContent for type \p OpVT.
SDValue getBoolConstant(bool V, const SDLoc &DL, EVT VT, EVT OpVT);
/// @}
/// Create a ConstantFPSDNode wrapping a constant value.
/// If VT is a vector type, the constant is splatted into a BUILD_VECTOR.
///
/// If only legal types can be produced, this does the necessary
/// transformations (e.g., if the vector element type is illegal).
/// The forms that take a double should only be used for simple constants
/// that can be exactly represented in VT. No checks are made.
/// @{
SDValue getConstantFP(double Val, const SDLoc &DL, EVT VT,
bool isTarget = false);
SDValue getConstantFP(const APFloat &Val, const SDLoc &DL, EVT VT,
bool isTarget = false);
SDValue getConstantFP(const ConstantFP &V, const SDLoc &DL, EVT VT,
bool isTarget = false);
SDValue getTargetConstantFP(double Val, const SDLoc &DL, EVT VT) {
return getConstantFP(Val, DL, VT, true);
}
SDValue getTargetConstantFP(const APFloat &Val, const SDLoc &DL, EVT VT) {
return getConstantFP(Val, DL, VT, true);
}
SDValue getTargetConstantFP(const ConstantFP &Val, const SDLoc &DL, EVT VT) {
return getConstantFP(Val, DL, VT, true);
}
/// @}
SDValue getGlobalAddress(const GlobalValue *GV, const SDLoc &DL, EVT VT,
int64_t offset = 0, bool isTargetGA = false,
unsigned TargetFlags = 0);
SDValue getTargetGlobalAddress(const GlobalValue *GV, const SDLoc &DL, EVT VT,
int64_t offset = 0, unsigned TargetFlags = 0) {
return getGlobalAddress(GV, DL, VT, offset, true, TargetFlags);
}
SDValue getFrameIndex(int FI, EVT VT, bool isTarget = false);
SDValue getTargetFrameIndex(int FI, EVT VT) {
return getFrameIndex(FI, VT, true);
}
SDValue getJumpTable(int JTI, EVT VT, bool isTarget = false,
unsigned TargetFlags = 0);
SDValue getTargetJumpTable(int JTI, EVT VT, unsigned TargetFlags = 0) {
return getJumpTable(JTI, VT, true, TargetFlags);
}
SDValue getConstantPool(const Constant *C, EVT VT,
MaybeAlign Align = std::nullopt, int Offs = 0,
bool isT = false, unsigned TargetFlags = 0);
SDValue getTargetConstantPool(const Constant *C, EVT VT,
MaybeAlign Align = std::nullopt, int Offset = 0,
unsigned TargetFlags = 0) {
return getConstantPool(C, VT, Align, Offset, true, TargetFlags);
}
SDValue getConstantPool(MachineConstantPoolValue *C, EVT VT,
MaybeAlign Align = std::nullopt, int Offs = 0,
bool isT = false, unsigned TargetFlags = 0);
SDValue getTargetConstantPool(MachineConstantPoolValue *C, EVT VT,
MaybeAlign Align = std::nullopt, int Offset = 0,
unsigned TargetFlags = 0) {
return getConstantPool(C, VT, Align, Offset, true, TargetFlags);
}
SDValue getTargetIndex(int Index, EVT VT, int64_t Offset = 0,
unsigned TargetFlags = 0);
// When generating a branch to a BB, we don't in general know enough
// to provide debug info for the BB at that time, so keep this one around.
SDValue getBasicBlock(MachineBasicBlock *MBB);
SDValue getExternalSymbol(const char *Sym, EVT VT);
SDValue getTargetExternalSymbol(const char *Sym, EVT VT,
unsigned TargetFlags = 0);
SDValue getMCSymbol(MCSymbol *Sym, EVT VT);
SDValue getValueType(EVT);
SDValue getRegister(unsigned Reg, EVT VT);
SDValue getRegisterMask(const uint32_t *RegMask);
SDValue getEHLabel(const SDLoc &dl, SDValue Root, MCSymbol *Label);
SDValue getLabelNode(unsigned Opcode, const SDLoc &dl, SDValue Root,
MCSymbol *Label);
SDValue getBlockAddress(const BlockAddress *BA, EVT VT, int64_t Offset = 0,
bool isTarget = false, unsigned TargetFlags = 0);
SDValue getTargetBlockAddress(const BlockAddress *BA, EVT VT,
int64_t Offset = 0, unsigned TargetFlags = 0) {
return getBlockAddress(BA, VT, Offset, true, TargetFlags);
}
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg,
SDValue N) {
return getNode(ISD::CopyToReg, dl, MVT::Other, Chain,
getRegister(Reg, N.getValueType()), N);
}
// This version of the getCopyToReg method takes an extra operand, which
// indicates that there is potentially an incoming glue value (if Glue is not
// null) and that there should be a glue result.
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg, SDValue N,
SDValue Glue) {
SDVTList VTs = getVTList(MVT::Other, MVT::Glue);
SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Glue };
return getNode(ISD::CopyToReg, dl, VTs,
ArrayRef(Ops, Glue.getNode() ? 4 : 3));
}
// Similar to last getCopyToReg() except parameter Reg is a SDValue
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, SDValue Reg, SDValue N,
SDValue Glue) {
SDVTList VTs = getVTList(MVT::Other, MVT::Glue);
SDValue Ops[] = { Chain, Reg, N, Glue };
return getNode(ISD::CopyToReg, dl, VTs,
ArrayRef(Ops, Glue.getNode() ? 4 : 3));
}
SDValue getCopyFromReg(SDValue Chain, const SDLoc &dl, unsigned Reg, EVT VT) {
SDVTList VTs = getVTList(VT, MVT::Other);
SDValue Ops[] = { Chain, getRegister(Reg, VT) };
return getNode(ISD::CopyFromReg, dl, VTs, Ops);
}
// This version of the getCopyFromReg method takes an extra operand, which
// indicates that there is potentially an incoming glue value (if Glue is not
// null) and that there should be a glue result.
SDValue getCopyFromReg(SDValue Chain, const SDLoc &dl, unsigned Reg, EVT VT,
SDValue Glue) {
SDVTList VTs = getVTList(VT, MVT::Other, MVT::Glue);
SDValue Ops[] = { Chain, getRegister(Reg, VT), Glue };
return getNode(ISD::CopyFromReg, dl, VTs,
ArrayRef(Ops, Glue.getNode() ? 3 : 2));
}
SDValue getCondCode(ISD::CondCode Cond);
/// Return an ISD::VECTOR_SHUFFLE node. The number of elements in VT,
/// which must be a vector type, must match the number of mask elements
/// NumElts. An integer mask element equal to -1 is treated as undefined.
SDValue getVectorShuffle(EVT VT, const SDLoc &dl, SDValue N1, SDValue N2,
ArrayRef<int> Mask);
/// Return an ISD::BUILD_VECTOR node. The number of elements in VT,
/// which must be a vector type, must match the number of operands in Ops.
/// The operands must have the same type as (or, for integers, a type wider
/// than) VT's element type.
SDValue getBuildVector(EVT VT, const SDLoc &DL, ArrayRef<SDValue> Ops) {
// VerifySDNode (via InsertNode) checks BUILD_VECTOR later.
return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
}
/// Return an ISD::BUILD_VECTOR node. The number of elements in VT,
/// which must be a vector type, must match the number of operands in Ops.
/// The operands must have the same type as (or, for integers, a type wider
/// than) VT's element type.
SDValue getBuildVector(EVT VT, const SDLoc &DL, ArrayRef<SDUse> Ops) {
// VerifySDNode (via InsertNode) checks BUILD_VECTOR later.
return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
}
/// Return a splat ISD::BUILD_VECTOR node, consisting of Op splatted to all
/// elements. VT must be a vector type. Op's type must be the same as (or,
/// for integers, a type wider than) VT's element type.
SDValue getSplatBuildVector(EVT VT, const SDLoc &DL, SDValue Op) {
// VerifySDNode (via InsertNode) checks BUILD_VECTOR later.
if (Op.getOpcode() == ISD::UNDEF) {
assert((VT.getVectorElementType() == Op.getValueType() ||
(VT.isInteger() &&
VT.getVectorElementType().bitsLE(Op.getValueType()))) &&
"A splatted value must have a width equal or (for integers) "
"greater than the vector element type!");
return getNode(ISD::UNDEF, SDLoc(), VT);
}
SmallVector<SDValue, 16> Ops(VT.getVectorNumElements(), Op);
return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
}
// Return a splat ISD::SPLAT_VECTOR node, consisting of Op splatted to all
// elements.
SDValue getSplatVector(EVT VT, const SDLoc &DL, SDValue Op) {
if (Op.getOpcode() == ISD::UNDEF) {
assert((VT.getVectorElementType() == Op.getValueType() ||
(VT.isInteger() &&
VT.getVectorElementType().bitsLE(Op.getValueType()))) &&
"A splatted value must have a width equal or (for integers) "
"greater than the vector element type!");
return getNode(ISD::UNDEF, SDLoc(), VT);
}
return getNode(ISD::SPLAT_VECTOR, DL, VT, Op);
}
/// Returns a node representing a splat of one value into all lanes
/// of the provided vector type. This is a utility which returns
/// either a BUILD_VECTOR or SPLAT_VECTOR depending on the
/// scalability of the desired vector type.
SDValue getSplat(EVT VT, const SDLoc &DL, SDValue Op) {
assert(VT.isVector() && "Can't splat to non-vector type");
return VT.isScalableVector() ?
getSplatVector(VT, DL, Op) : getSplatBuildVector(VT, DL, Op);
}
/// Returns a vector of type ResVT whose elements contain the linear sequence
/// <0, Step, Step * 2, Step * 3, ...>
SDValue getStepVector(const SDLoc &DL, EVT ResVT, APInt StepVal);
/// Returns a vector of type ResVT whose elements contain the linear sequence
/// <0, 1, 2, 3, ...>
SDValue getStepVector(const SDLoc &DL, EVT ResVT);
/// Returns an ISD::VECTOR_SHUFFLE node semantically equivalent to
/// the shuffle node in input but with swapped operands.
///
/// Example: shuffle A, B, <0,5,2,7> -> shuffle B, A, <4,1,6,3>
SDValue getCommutedVectorShuffle(const ShuffleVectorSDNode &SV);
/// Convert Op, which must be of float type, to the
/// float type VT, by either extending or rounding (by truncation).
SDValue getFPExtendOrRound(SDValue Op, const SDLoc &DL, EVT VT);
/// Convert Op, which must be a STRICT operation of float type, to the
/// float type VT, by either extending or rounding (by truncation).
std::pair<SDValue, SDValue>
getStrictFPExtendOrRound(SDValue Op, SDValue Chain, const SDLoc &DL, EVT VT);
/// Convert *_EXTEND_VECTOR_INREG to *_EXTEND opcode.
static unsigned getOpcode_EXTEND(unsigned Opcode) {
switch (Opcode) {
case ISD::ANY_EXTEND:
case ISD::ANY_EXTEND_VECTOR_INREG:
return ISD::ANY_EXTEND;
case ISD::ZERO_EXTEND:
case ISD::ZERO_EXTEND_VECTOR_INREG:
return ISD::ZERO_EXTEND;
case ISD::SIGN_EXTEND:
case ISD::SIGN_EXTEND_VECTOR_INREG:
return ISD::SIGN_EXTEND;
}
llvm_unreachable("Unknown opcode");
}
/// Convert *_EXTEND to *_EXTEND_VECTOR_INREG opcode.
static unsigned getOpcode_EXTEND_VECTOR_INREG(unsigned Opcode) {
switch (Opcode) {
case ISD::ANY_EXTEND:
case ISD::ANY_EXTEND_VECTOR_INREG:
return ISD::ANY_EXTEND_VECTOR_INREG;
case ISD::ZERO_EXTEND:
case ISD::ZERO_EXTEND_VECTOR_INREG:
return ISD::ZERO_EXTEND_VECTOR_INREG;
case ISD::SIGN_EXTEND:
case ISD::SIGN_EXTEND_VECTOR_INREG:
return ISD::SIGN_EXTEND_VECTOR_INREG;
}
llvm_unreachable("Unknown opcode");
}
/// Convert Op, which must be of integer type, to the
/// integer type VT, by either any-extending or truncating it.
SDValue getAnyExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT);
/// Convert Op, which must be of integer type, to the
/// integer type VT, by either sign-extending or truncating it.
SDValue getSExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT);
/// Convert Op, which must be of integer type, to the
/// integer type VT, by either zero-extending or truncating it.
SDValue getZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT);
/// Convert Op, which must be of integer type, to the
/// integer type VT, by either sign/zero-extending (depending on IsSigned) or
/// truncating it.
SDValue getExtOrTrunc(bool IsSigned, SDValue Op, const SDLoc &DL, EVT VT) {
return IsSigned ? getSExtOrTrunc(Op, DL, VT) : getZExtOrTrunc(Op, DL, VT);
}
/// Return the expression required to zero extend the Op
/// value assuming it was the smaller SrcTy value.
SDValue getZeroExtendInReg(SDValue Op, const SDLoc &DL, EVT VT);
/// Convert Op, which must be of integer type, to the integer type VT, by
/// either truncating it or performing either zero or sign extension as
/// appropriate extension for the pointer's semantics.
SDValue getPtrExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT);
/// Return the expression required to extend the Op as a pointer value
/// assuming it was the smaller SrcTy value. This may be either a zero extend
/// or a sign extend.
SDValue getPtrExtendInReg(SDValue Op, const SDLoc &DL, EVT VT);
/// Convert Op, which must be of integer type, to the integer type VT,
/// by using an extension appropriate for the target's
/// BooleanContent for type OpVT or truncating it.
SDValue getBoolExtOrTrunc(SDValue Op, const SDLoc &SL, EVT VT, EVT OpVT);
/// Create negative operation as (SUB 0, Val).
SDValue getNegative(SDValue Val, const SDLoc &DL, EVT VT);
/// Create a bitwise NOT operation as (XOR Val, -1).
SDValue getNOT(const SDLoc &DL, SDValue Val, EVT VT);
/// Create a logical NOT operation as (XOR Val, BooleanOne).
SDValue getLogicalNOT(const SDLoc &DL, SDValue Val, EVT VT);
/// Create a vector-predicated logical NOT operation as (VP_XOR Val,
/// BooleanOne, Mask, EVL).
SDValue getVPLogicalNOT(const SDLoc &DL, SDValue Val, SDValue Mask,
SDValue EVL, EVT VT);
/// Convert a vector-predicated Op, which must be an integer vector, to the
/// vector-type VT, by performing either vector-predicated zext or truncating
/// it. The Op will be returned as-is if Op and VT are vectors containing
/// integer with same width.
SDValue getVPZExtOrTrunc(const SDLoc &DL, EVT VT, SDValue Op, SDValue Mask,
SDValue EVL);
/// Convert a vector-predicated Op, which must be of integer type, to the
/// vector-type integer type VT, by either truncating it or performing either
/// vector-predicated zero or sign extension as appropriate extension for the
/// pointer's semantics. This function just redirects to getVPZExtOrTrunc
/// right now.
SDValue getVPPtrExtOrTrunc(const SDLoc &DL, EVT VT, SDValue Op, SDValue Mask,
SDValue EVL);
/// Returns sum of the base pointer and offset.
/// Unlike getObjectPtrOffset this does not set NoUnsignedWrap by default.
SDValue getMemBasePlusOffset(SDValue Base, TypeSize Offset, const SDLoc &DL,
const SDNodeFlags Flags = SDNodeFlags());
SDValue getMemBasePlusOffset(SDValue Base, SDValue Offset, const SDLoc &DL,
const SDNodeFlags Flags = SDNodeFlags());
/// Create an add instruction with appropriate flags when used for
/// addressing some offset of an object. i.e. if a load is split into multiple
/// components, create an add nuw from the base pointer to the offset.
SDValue getObjectPtrOffset(const SDLoc &SL, SDValue Ptr, TypeSize Offset) {
SDNodeFlags Flags;
Flags.setNoUnsignedWrap(true);
return getMemBasePlusOffset(Ptr, Offset, SL, Flags);
}
SDValue getObjectPtrOffset(const SDLoc &SL, SDValue Ptr, SDValue Offset) {
// The object itself can't wrap around the address space, so it shouldn't be
// possible for the adds of the offsets to the split parts to overflow.
SDNodeFlags Flags;
Flags.setNoUnsignedWrap(true);
return getMemBasePlusOffset(Ptr, Offset, SL, Flags);
}
/// Return a new CALLSEQ_START node, that starts new call frame, in which
/// InSize bytes are set up inside CALLSEQ_START..CALLSEQ_END sequence and
/// OutSize specifies part of the frame set up prior to the sequence.
SDValue getCALLSEQ_START(SDValue Chain, uint64_t InSize, uint64_t OutSize,
const SDLoc &DL) {
SDVTList VTs = getVTList(MVT::Other, MVT::Glue);
SDValue Ops[] = { Chain,
getIntPtrConstant(InSize, DL, true),
getIntPtrConstant(OutSize, DL, true) };
return getNode(ISD::CALLSEQ_START, DL, VTs, Ops);
}
/// Return a new CALLSEQ_END node, which always must have a
/// glue result (to ensure it's not CSE'd).
/// CALLSEQ_END does not have a useful SDLoc.
SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2,
SDValue InGlue, const SDLoc &DL) {
SDVTList NodeTys = getVTList(MVT::Other, MVT::Glue);
SmallVector<SDValue, 4> Ops;
Ops.push_back(Chain);
Ops.push_back(Op1);
Ops.push_back(Op2);
if (InGlue.getNode())
Ops.push_back(InGlue);
return getNode(ISD::CALLSEQ_END, DL, NodeTys, Ops);
}
SDValue getCALLSEQ_END(SDValue Chain, uint64_t Size1, uint64_t Size2,
SDValue Glue, const SDLoc &DL) {
return getCALLSEQ_END(
Chain, getIntPtrConstant(Size1, DL, /*isTarget=*/true),
getIntPtrConstant(Size2, DL, /*isTarget=*/true), Glue, DL);
}
/// Return true if the result of this operation is always undefined.
bool isUndef(unsigned Opcode, ArrayRef<SDValue> Ops);
/// Return an UNDEF node. UNDEF does not have a useful SDLoc.
SDValue getUNDEF(EVT VT) {
return getNode(ISD::UNDEF, SDLoc(), VT);
}
/// Return a node that represents the runtime scaling 'MulImm * RuntimeVL'.
SDValue getVScale(const SDLoc &DL, EVT VT, APInt MulImm,
bool ConstantFold = true);
SDValue getElementCount(const SDLoc &DL, EVT VT, ElementCount EC,
bool ConstantFold = true);
/// Return a GLOBAL_OFFSET_TABLE node. This does not have a useful SDLoc.
SDValue getGLOBAL_OFFSET_TABLE(EVT VT) {
return getNode(ISD::GLOBAL_OFFSET_TABLE, SDLoc(), VT);
}
/// Gets or creates the specified node.
///
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
ArrayRef<SDUse> Ops);
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
ArrayRef<SDValue> Ops, const SDNodeFlags Flags);
SDValue getNode(unsigned Opcode, const SDLoc &DL, ArrayRef<EVT> ResultTys,
ArrayRef<SDValue> Ops);
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
ArrayRef<SDValue> Ops, const SDNodeFlags Flags);
// Use flags from current flag inserter.
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
ArrayRef<SDValue> Ops);
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
ArrayRef<SDValue> Ops);
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand);
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
SDValue N2);
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
SDValue N2, SDValue N3);
// Specialize based on number of operands.
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT);
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand,
const SDNodeFlags Flags);
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
SDValue N2, const SDNodeFlags Flags);
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
SDValue N2, SDValue N3, const SDNodeFlags Flags);
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
SDValue N2, SDValue N3, SDValue N4);
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1,
SDValue N2, SDValue N3, SDValue N4, SDValue N5);
// Specialize again based on number of operands for nodes with a VTList
// rather than a single VT.
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList);
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N);
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
SDValue N2);
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
SDValue N2, SDValue N3);
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
SDValue N2, SDValue N3, SDValue N4);
SDValue getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList, SDValue N1,
SDValue N2, SDValue N3, SDValue N4, SDValue N5);
/// Compute a TokenFactor to force all the incoming stack arguments to be
/// loaded from the stack. This is used in tail call lowering to protect
/// stack arguments from being clobbered.
SDValue getStackArgumentTokenFactor(SDValue Chain);
SDValue getMemcpy(SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src,
SDValue Size, Align Alignment, bool isVol,
bool AlwaysInline, bool isTailCall,
MachinePointerInfo DstPtrInfo,
MachinePointerInfo SrcPtrInfo,
const AAMDNodes &AAInfo = AAMDNodes(),
AAResults *AA = nullptr);
SDValue getMemmove(SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src,
SDValue Size, Align Alignment, bool isVol, bool isTailCall,
MachinePointerInfo DstPtrInfo,
MachinePointerInfo SrcPtrInfo,
const AAMDNodes &AAInfo = AAMDNodes(),
AAResults *AA = nullptr);
SDValue getMemset(SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src,
SDValue Size, Align Alignment, bool isVol,
bool AlwaysInline, bool isTailCall,
MachinePointerInfo DstPtrInfo,
const AAMDNodes &AAInfo = AAMDNodes());
SDValue getAtomicMemcpy(SDValue Chain, const SDLoc &dl, SDValue Dst,
SDValue Src, SDValue Size, Type *SizeTy,
unsigned ElemSz, bool isTailCall,
MachinePointerInfo DstPtrInfo,
MachinePointerInfo SrcPtrInfo);
SDValue getAtomicMemmove(SDValue Chain, const SDLoc &dl, SDValue Dst,
SDValue Src, SDValue Size, Type *SizeTy,
unsigned ElemSz, bool isTailCall,
MachinePointerInfo DstPtrInfo,
MachinePointerInfo SrcPtrInfo);
SDValue getAtomicMemset(SDValue Chain, const SDLoc &dl, SDValue Dst,
SDValue Value, SDValue Size, Type *SizeTy,
unsigned ElemSz, bool isTailCall,
MachinePointerInfo DstPtrInfo);
/// Helper function to make it easier to build SetCC's if you just have an
/// ISD::CondCode instead of an SDValue.
SDValue getSetCC(const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS,
ISD::CondCode Cond, SDValue Chain = SDValue(),
bool IsSignaling = false) {
assert(LHS.getValueType().isVector() == RHS.getValueType().isVector() &&
"Vector/scalar operand type mismatch for setcc");
assert(LHS.getValueType().isVector() == VT.isVector() &&
"Vector/scalar result type mismatch for setcc");
assert(Cond != ISD::SETCC_INVALID &&
"Cannot create a setCC of an invalid node.");
if (Chain)
return getNode(IsSignaling ? ISD::STRICT_FSETCCS : ISD::STRICT_FSETCC, DL,
{VT, MVT::Other}, {Chain, LHS, RHS, getCondCode(Cond)});
return getNode(ISD::SETCC, DL, VT, LHS, RHS, getCondCode(Cond));
}
/// Helper function to make it easier to build VP_SETCCs if you just have an
/// ISD::CondCode instead of an SDValue.
SDValue getSetCCVP(const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS,
ISD::CondCode Cond, SDValue Mask, SDValue EVL) {
assert(LHS.getValueType().isVector() && RHS.getValueType().isVector() &&
"Cannot compare scalars");
assert(Cond != ISD::SETCC_INVALID &&
"Cannot create a setCC of an invalid node.");
return getNode(ISD::VP_SETCC, DL, VT, LHS, RHS, getCondCode(Cond), Mask,
EVL);
}
/// Helper function to make it easier to build Select's if you just have
/// operands and don't want to check for vector.
SDValue getSelect(const SDLoc &DL, EVT VT, SDValue Cond, SDValue LHS,
SDValue RHS) {
assert(LHS.getValueType() == VT && RHS.getValueType() == VT &&
"Cannot use select on differing types");
auto Opcode = Cond.getValueType().isVector() ? ISD::VSELECT : ISD::SELECT;
return getNode(Opcode, DL, VT, Cond, LHS, RHS);
}
/// Helper function to make it easier to build SelectCC's if you just have an
/// ISD::CondCode instead of an SDValue.
SDValue getSelectCC(const SDLoc &DL, SDValue LHS, SDValue RHS, SDValue True,
SDValue False, ISD::CondCode Cond) {
return getNode(ISD::SELECT_CC, DL, True.getValueType(), LHS, RHS, True,
False, getCondCode(Cond));
}
/// Try to simplify a select/vselect into 1 of its operands or a constant.
SDValue simplifySelect(SDValue Cond, SDValue TVal, SDValue FVal);
/// Try to simplify a shift into 1 of its operands or a constant.
SDValue simplifyShift(SDValue X, SDValue Y);
/// Try to simplify a floating-point binary operation into 1 of its operands
/// or a constant.
SDValue simplifyFPBinop(unsigned Opcode, SDValue X, SDValue Y,
SDNodeFlags Flags);
/// VAArg produces a result and token chain, and takes a pointer
/// and a source value as input.
SDValue getVAArg(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr,
SDValue SV, unsigned Align);
/// Gets a node for an atomic cmpxchg op. There are two
/// valid Opcodes. ISD::ATOMIC_CMO_SWAP produces the value loaded and a
/// chain result. ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS produces the value loaded,
/// a success flag (initially i1), and a chain.
SDValue getAtomicCmpSwap(unsigned Opcode, const SDLoc &dl, EVT MemVT,
SDVTList VTs, SDValue Chain, SDValue Ptr,
SDValue Cmp, SDValue Swp, MachineMemOperand *MMO);
/// Gets a node for an atomic op, produces result (if relevant)
/// and chain and takes 2 operands.
SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT, SDValue Chain,
SDValue Ptr, SDValue Val, MachineMemOperand *MMO);
/// Gets a node for an atomic op, produces result and chain and
/// takes 1 operand.
SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT, EVT VT,
SDValue Chain, SDValue Ptr, MachineMemOperand *MMO);
/// Gets a node for an atomic op, produces result and chain and takes N
/// operands.
SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,
SDVTList VTList, ArrayRef<SDValue> Ops,
MachineMemOperand *MMO);
/// Creates a MemIntrinsicNode that may produce a
/// result and takes a list of operands. Opcode may be INTRINSIC_VOID,
/// INTRINSIC_W_CHAIN, or a target-specific opcode with a value not
/// less than FIRST_TARGET_MEMORY_OPCODE.
SDValue getMemIntrinsicNode(
unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops,
EVT MemVT, MachinePointerInfo PtrInfo, Align Alignment,
MachineMemOperand::Flags Flags = MachineMemOperand::MOLoad |
MachineMemOperand::MOStore,
uint64_t Size = 0, const AAMDNodes &AAInfo = AAMDNodes());
inline SDValue getMemIntrinsicNode(
unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops,
EVT MemVT, MachinePointerInfo PtrInfo,
MaybeAlign Alignment = std::nullopt,
MachineMemOperand::Flags Flags = MachineMemOperand::MOLoad |
MachineMemOperand::MOStore,
uint64_t Size = 0, const AAMDNodes &AAInfo = AAMDNodes()) {
// Ensure that codegen never sees alignment 0
return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, PtrInfo,
Alignment.value_or(getEVTAlign(MemVT)), Flags,
Size, AAInfo);
}
SDValue getMemIntrinsicNode(unsigned Opcode, const SDLoc &dl, SDVTList VTList,
ArrayRef<SDValue> Ops, EVT MemVT,
MachineMemOperand *MMO);
/// Creates a LifetimeSDNode that starts (`IsStart==true`) or ends
/// (`IsStart==false`) the lifetime of the portion of `FrameIndex` between
/// offsets `Offset` and `Offset + Size`.
SDValue getLifetimeNode(bool IsStart, const SDLoc &dl, SDValue Chain,
int FrameIndex, int64_t Size, int64_t Offset = -1);
/// Creates a PseudoProbeSDNode with function GUID `Guid` and
/// the index of the block `Index` it is probing, as well as the attributes
/// `attr` of the probe.
SDValue getPseudoProbeNode(const SDLoc &Dl, SDValue Chain, uint64_t Guid,
uint64_t Index, uint32_t Attr);
/// Create a MERGE_VALUES node from the given operands.
SDValue getMergeValues(ArrayRef<SDValue> Ops, const SDLoc &dl);
/// Loads are not normal binary operators: their result type is not
/// determined by their operands, and they produce a value AND a token chain.
///
/// This function will set the MOLoad flag on MMOFlags, but you can set it if
/// you want. The MOStore flag must not be set.
SDValue getLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr,
MachinePointerInfo PtrInfo,
MaybeAlign Alignment = MaybeAlign(),
MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
const AAMDNodes &AAInfo = AAMDNodes(),
const MDNode *Ranges = nullptr);
/// FIXME: Remove once transition to Align is over.
LLVM_DEPRECATED("Use the getLoad function that takes a MaybeAlign instead",
"")
inline SDValue
getLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr,
MachinePointerInfo PtrInfo, unsigned Alignment,
MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
const AAMDNodes &AAInfo = AAMDNodes(),
const MDNode *Ranges = nullptr) {
return getLoad(VT, dl, Chain, Ptr, PtrInfo, MaybeAlign(Alignment), MMOFlags,
AAInfo, Ranges);
}
SDValue getLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr,
MachineMemOperand *MMO);
SDValue
getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain,
SDValue Ptr, MachinePointerInfo PtrInfo, EVT MemVT,
MaybeAlign Alignment = MaybeAlign(),
MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
const AAMDNodes &AAInfo = AAMDNodes());
SDValue getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT,
SDValue Chain, SDValue Ptr, EVT MemVT,
MachineMemOperand *MMO);
SDValue getIndexedLoad(SDValue OrigLoad, const SDLoc &dl, SDValue Base,
SDValue Offset, ISD::MemIndexedMode AM);
SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset,
MachinePointerInfo PtrInfo, EVT MemVT, Align Alignment,
MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
const AAMDNodes &AAInfo = AAMDNodes(),
const MDNode *Ranges = nullptr);
inline SDValue getLoad(
ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &dl,
SDValue Chain, SDValue Ptr, SDValue Offset, MachinePointerInfo PtrInfo,
EVT MemVT, MaybeAlign Alignment = MaybeAlign(),
MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
const AAMDNodes &AAInfo = AAMDNodes(), const MDNode *Ranges = nullptr) {
// Ensures that codegen never sees a None Alignment.
return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, PtrInfo, MemVT,
Alignment.value_or(getEVTAlign(MemVT)), MMOFlags, AAInfo,
Ranges);
}
/// FIXME: Remove once transition to Align is over.
LLVM_DEPRECATED("Use the getLoad function that takes a MaybeAlign instead",
"")
inline SDValue
getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset,
MachinePointerInfo PtrInfo, EVT MemVT, unsigned Alignment,
MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
const AAMDNodes &AAInfo = AAMDNodes(),
const MDNode *Ranges = nullptr) {
return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, PtrInfo, MemVT,
MaybeAlign(Alignment), MMOFlags, AAInfo, Ranges);
}
SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset,
EVT MemVT, MachineMemOperand *MMO);
/// Helper function to build ISD::STORE nodes.
///
/// This function will set the MOStore flag on MMOFlags, but you can set it if
/// you want. The MOLoad and MOInvariant flags must not be set.
SDValue
getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr,
MachinePointerInfo PtrInfo, Align Alignment,
MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
const AAMDNodes &AAInfo = AAMDNodes());
inline SDValue
getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr,
MachinePointerInfo PtrInfo, MaybeAlign Alignment = MaybeAlign(),
MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
const AAMDNodes &AAInfo = AAMDNodes()) {
return getStore(Chain, dl, Val, Ptr, PtrInfo,
Alignment.value_or(getEVTAlign(Val.getValueType())),
MMOFlags, AAInfo);
}
/// FIXME: Remove once transition to Align is over.
LLVM_DEPRECATED("Use the version that takes a MaybeAlign instead", "")
inline SDValue
getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr,
MachinePointerInfo PtrInfo, unsigned Alignment,
MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
const AAMDNodes &AAInfo = AAMDNodes()) {
return getStore(Chain, dl, Val, Ptr, PtrInfo, MaybeAlign(Alignment),
MMOFlags, AAInfo);
}
SDValue getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr,
MachineMemOperand *MMO);
SDValue
getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr,
MachinePointerInfo PtrInfo, EVT SVT, Align Alignment,
MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
const AAMDNodes &AAInfo = AAMDNodes());
inline SDValue
getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr,
MachinePointerInfo PtrInfo, EVT SVT,
MaybeAlign Alignment = MaybeAlign(),
MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
const AAMDNodes &AAInfo = AAMDNodes()) {
return getTruncStore(Chain, dl, Val, Ptr, PtrInfo, SVT,
Alignment.value_or(getEVTAlign(SVT)), MMOFlags,
AAInfo);
}
/// FIXME: Remove once transition to Align is over.
LLVM_DEPRECATED("Use the version that takes a MaybeAlign instead", "")
inline SDValue
getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr,
MachinePointerInfo PtrInfo, EVT SVT, unsigned Alignment,
MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
const AAMDNodes &AAInfo = AAMDNodes()) {
return getTruncStore(Chain, dl, Val, Ptr, PtrInfo, SVT,
MaybeAlign(Alignment), MMOFlags, AAInfo);
}
SDValue getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val,
SDValue Ptr, EVT SVT, MachineMemOperand *MMO);
SDValue getIndexedStore(SDValue OrigStore, const SDLoc &dl, SDValue Base,
SDValue Offset, ISD::MemIndexedMode AM);
SDValue getLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset,
SDValue Mask, SDValue EVL, MachinePointerInfo PtrInfo,
EVT MemVT, Align Alignment,
MachineMemOperand::Flags MMOFlags, const AAMDNodes &AAInfo,
const MDNode *Ranges = nullptr, bool IsExpanding = false);
inline SDValue
getLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset,
SDValue Mask, SDValue EVL, MachinePointerInfo PtrInfo, EVT MemVT,
MaybeAlign Alignment = MaybeAlign(),
MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
const AAMDNodes &AAInfo = AAMDNodes(),
const MDNode *Ranges = nullptr, bool IsExpanding = false) {
// Ensures that codegen never sees a None Alignment.
return getLoadVP(AM, ExtType, VT, dl, Chain, Ptr, Offset, Mask, EVL,
PtrInfo, MemVT, Alignment.value_or(getEVTAlign(MemVT)),
MMOFlags, AAInfo, Ranges, IsExpanding);
}
SDValue getLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset,
SDValue Mask, SDValue EVL, EVT MemVT,
MachineMemOperand *MMO, bool IsExpanding = false);
SDValue getLoadVP(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr,
SDValue Mask, SDValue EVL, MachinePointerInfo PtrInfo,
MaybeAlign Alignment, MachineMemOperand::Flags MMOFlags,
const AAMDNodes &AAInfo, const MDNode *Ranges = nullptr,
bool IsExpanding = false);
SDValue getLoadVP(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr,
SDValue Mask, SDValue EVL, MachineMemOperand *MMO,
bool IsExpanding = false);
SDValue getExtLoadVP(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT,
SDValue Chain, SDValue Ptr, SDValue Mask, SDValue EVL,
MachinePointerInfo PtrInfo, EVT MemVT,
MaybeAlign Alignment, MachineMemOperand::Flags MMOFlags,
const AAMDNodes &AAInfo, bool IsExpanding = false);
SDValue getExtLoadVP(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT,
SDValue Chain, SDValue Ptr, SDValue Mask, SDValue EVL,
EVT MemVT, MachineMemOperand *MMO,
bool IsExpanding = false);
SDValue getIndexedLoadVP(SDValue OrigLoad, const SDLoc &dl, SDValue Base,
SDValue Offset, ISD::MemIndexedMode AM);
SDValue getStoreVP(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr,
SDValue Offset, SDValue Mask, SDValue EVL, EVT MemVT,
MachineMemOperand *MMO, ISD::MemIndexedMode AM,
bool IsTruncating = false, bool IsCompressing = false);
SDValue getTruncStoreVP(SDValue Chain, const SDLoc &dl, SDValue Val,
SDValue Ptr, SDValue Mask, SDValue EVL,
MachinePointerInfo PtrInfo, EVT SVT, Align Alignment,
MachineMemOperand::Flags MMOFlags,
const AAMDNodes &AAInfo, bool IsCompressing = false);
SDValue getTruncStoreVP(SDValue Chain, const SDLoc &dl, SDValue Val,
SDValue Ptr, SDValue Mask, SDValue EVL, EVT SVT,
MachineMemOperand *MMO, bool IsCompressing = false);
SDValue getIndexedStoreVP(SDValue OrigStore, const SDLoc &dl, SDValue Base,
SDValue Offset, ISD::MemIndexedMode AM);
SDValue getStridedLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
EVT VT, const SDLoc &DL, SDValue Chain, SDValue Ptr,
SDValue Offset, SDValue Stride, SDValue Mask,
SDValue EVL, MachinePointerInfo PtrInfo, EVT MemVT,
Align Alignment, MachineMemOperand::Flags MMOFlags,
const AAMDNodes &AAInfo,
const MDNode *Ranges = nullptr,
bool IsExpanding = false);
inline SDValue getStridedLoadVP(
ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &DL,
SDValue Chain, SDValue Ptr, SDValue Offset, SDValue Stride, SDValue Mask,
SDValue EVL, MachinePointerInfo PtrInfo, EVT MemVT,
MaybeAlign Alignment = MaybeAlign(),
MachineMemOperand::Flags MMOFlags = MachineMemOperand::MONone,
const AAMDNodes &AAInfo = AAMDNodes(), const MDNode *Ranges = nullptr,
bool IsExpanding = false) {
// Ensures that codegen never sees a None Alignment.
return getStridedLoadVP(AM, ExtType, VT, DL, Chain, Ptr, Offset, Stride,
Mask, EVL, PtrInfo, MemVT,
Alignment.value_or(getEVTAlign(MemVT)), MMOFlags,
AAInfo, Ranges, IsExpanding);
}
SDValue getStridedLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
EVT VT, const SDLoc &DL, SDValue Chain, SDValue Ptr,
SDValue Offset, SDValue Stride, SDValue Mask,
SDValue EVL, EVT MemVT, MachineMemOperand *MMO,
bool IsExpanding = false);
SDValue getStridedLoadVP(EVT VT, const SDLoc &DL, SDValue Chain, SDValue Ptr,
SDValue Stride, SDValue Mask, SDValue EVL,
MachinePointerInfo PtrInfo, MaybeAlign Alignment,
MachineMemOperand::Flags MMOFlags,
const AAMDNodes &AAInfo,
const MDNode *Ranges = nullptr,
bool IsExpanding = false);
SDValue getStridedLoadVP(EVT VT, const SDLoc &DL, SDValue Chain, SDValue Ptr,
SDValue Stride, SDValue Mask, SDValue EVL,
MachineMemOperand *MMO, bool IsExpanding = false);
SDValue
getExtStridedLoadVP(ISD::LoadExtType ExtType, const SDLoc &DL, EVT VT,
SDValue Chain, SDValue Ptr, SDValue Stride, SDValue Mask,
SDValue EVL, MachinePointerInfo PtrInfo, EVT MemVT,
MaybeAlign Alignment, MachineMemOperand::Flags MMOFlags,
const AAMDNodes &AAInfo, bool IsExpanding = false);
SDValue getExtStridedLoadVP(ISD::LoadExtType ExtType, const SDLoc &DL, EVT VT,
SDValue Chain, SDValue Ptr, SDValue Stride,
SDValue Mask, SDValue EVL, EVT MemVT,
MachineMemOperand *MMO, bool IsExpanding = false);
SDValue getIndexedStridedLoadVP(SDValue OrigLoad, const SDLoc &DL,
SDValue Base, SDValue Offset,
ISD::MemIndexedMode AM);
SDValue getStridedStoreVP(SDValue Chain, const SDLoc &DL, SDValue Val,
SDValue Ptr, SDValue Offset, SDValue Stride,
SDValue Mask, SDValue EVL, EVT MemVT,
MachineMemOperand *MMO, ISD::MemIndexedMode AM,
bool IsTruncating = false,
bool IsCompressing = false);
SDValue getTruncStridedStoreVP(SDValue Chain, const SDLoc &DL, SDValue Val,
SDValue Ptr, SDValue Stride, SDValue Mask,
SDValue EVL, MachinePointerInfo PtrInfo,
EVT SVT, Align Alignment,
MachineMemOperand::Flags MMOFlags,
const AAMDNodes &AAInfo,
bool IsCompressing = false);
SDValue getTruncStridedStoreVP(SDValue Chain, const SDLoc &DL, SDValue Val,
SDValue Ptr, SDValue Stride, SDValue Mask,
SDValue EVL, EVT SVT, MachineMemOperand *MMO,
bool IsCompressing = false);
SDValue getIndexedStridedStoreVP(SDValue OrigStore, const SDLoc &DL,
SDValue Base, SDValue Offset,
ISD::MemIndexedMode AM);
SDValue getGatherVP(SDVTList VTs, EVT VT, const SDLoc &dl,
ArrayRef<SDValue> Ops, MachineMemOperand *MMO,
ISD::MemIndexType IndexType);
SDValue getScatterVP(SDVTList VTs, EVT VT, const SDLoc &dl,
ArrayRef<SDValue> Ops, MachineMemOperand *MMO,
ISD::MemIndexType IndexType);
SDValue getMaskedLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Base,
SDValue Offset, SDValue Mask, SDValue Src0, EVT MemVT,
MachineMemOperand *MMO, ISD::MemIndexedMode AM,
ISD::LoadExtType, bool IsExpanding = false);
SDValue getIndexedMaskedLoad(SDValue OrigLoad, const SDLoc &dl, SDValue Base,
SDValue Offset, ISD::MemIndexedMode AM);
SDValue getMaskedStore(SDValue Chain, const SDLoc &dl, SDValue Val,
SDValue Base, SDValue Offset, SDValue Mask, EVT MemVT,
MachineMemOperand *MMO, ISD::MemIndexedMode AM,
bool IsTruncating = false, bool IsCompressing = false);
SDValue getIndexedMaskedStore(SDValue OrigStore, const SDLoc &dl,
SDValue Base, SDValue Offset,
ISD::MemIndexedMode AM);
SDValue getMaskedGather(SDVTList VTs, EVT MemVT, const SDLoc &dl,
ArrayRef<SDValue> Ops, MachineMemOperand *MMO,
ISD::MemIndexType IndexType, ISD::LoadExtType ExtTy);
SDValue getMaskedScatter(SDVTList VTs, EVT MemVT, const SDLoc &dl,
ArrayRef<SDValue> Ops, MachineMemOperand *MMO,
ISD::MemIndexType IndexType,
bool IsTruncating = false);
SDValue getGetFPEnv(SDValue Chain, const SDLoc &dl, SDValue Ptr, EVT MemVT,
MachineMemOperand *MMO);
SDValue getSetFPEnv(SDValue Chain, const SDLoc &dl, SDValue Ptr, EVT MemVT,
MachineMemOperand *MMO);
/// Construct a node to track a Value* through the backend.
SDValue getSrcValue(const Value *v);
/// Return an MDNodeSDNode which holds an MDNode.
SDValue getMDNode(const MDNode *MD);
/// Return a bitcast using the SDLoc of the value operand, and casting to the
/// provided type. Use getNode to set a custom SDLoc.
SDValue getBitcast(EVT VT, SDValue V);
/// Return an AddrSpaceCastSDNode.
SDValue getAddrSpaceCast(const SDLoc &dl, EVT VT, SDValue Ptr, unsigned SrcAS,
unsigned DestAS);
/// Return a freeze using the SDLoc of the value operand.
SDValue getFreeze(SDValue V);
/// Return an AssertAlignSDNode.
SDValue getAssertAlign(const SDLoc &DL, SDValue V, Align A);
/// Swap N1 and N2 if Opcode is a commutative binary opcode
/// and the canonical form expects the opposite order.
void canonicalizeCommutativeBinop(unsigned Opcode, SDValue &N1,
SDValue &N2) const;
/// Return the specified value casted to
/// the target's desired shift amount type.
SDValue getShiftAmountOperand(EVT LHSTy, SDValue Op);
/// Expand the specified \c ISD::VAARG node as the Legalize pass would.
SDValue expandVAArg(SDNode *Node);
/// Expand the specified \c ISD::VACOPY node as the Legalize pass would.
SDValue expandVACopy(SDNode *Node);
/// Returs an GlobalAddress of the function from the current module with
/// name matching the given ExternalSymbol. Additionally can provide the
/// matched function.
/// Panics the function doesn't exists.
SDValue getSymbolFunctionGlobalAddress(SDValue Op,
Function **TargetFunction = nullptr);
/// *Mutate* the specified node in-place to have the
/// specified operands. If the resultant node already exists in the DAG,
/// this does not modify the specified node, instead it returns the node that
/// already exists. If the resultant node does not exist in the DAG, the
/// input node is returned. As a degenerate case, if you specify the same
/// input operands as the node already has, the input node is returned.
SDNode *UpdateNodeOperands(SDNode *N, SDValue Op);
SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2);
SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
SDValue Op3);
SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
SDValue Op3, SDValue Op4);
SDNode *UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
SDValue Op3, SDValue Op4, SDValue Op5);
SDNode *UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops);
/// Creates a new TokenFactor containing \p Vals. If \p Vals contains 64k
/// values or more, move values into new TokenFactors in 64k-1 blocks, until
/// the final TokenFactor has less than 64k operands.
SDValue getTokenFactor(const SDLoc &DL, SmallVectorImpl<SDValue> &Vals);
/// *Mutate* the specified machine node's memory references to the provided
/// list.
void setNodeMemRefs(MachineSDNode *N,
ArrayRef<MachineMemOperand *> NewMemRefs);
// Calculate divergence of node \p N based on its operands.
bool calculateDivergence(SDNode *N);
// Propagates the change in divergence to users
void updateDivergence(SDNode * N);
/// These are used for target selectors to *mutate* the
/// specified node to have the specified return type, Target opcode, and
/// operands. Note that target opcodes are stored as
/// ~TargetOpcode in the node opcode field. The resultant node is returned.
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT);
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1);
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT,
SDValue Op1, SDValue Op2);
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT,
SDValue Op1, SDValue Op2, SDValue Op3);
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT,
ArrayRef<SDValue> Ops);
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2);
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
EVT VT2, ArrayRef<SDValue> Ops);
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
EVT VT2, EVT VT3, ArrayRef<SDValue> Ops);
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1,
EVT VT2, SDValue Op1, SDValue Op2);
SDNode *SelectNodeTo(SDNode *N, unsigned MachineOpc, SDVTList VTs,
ArrayRef<SDValue> Ops);
/// This *mutates* the specified node to have the specified
/// return type, opcode, and operands.
SDNode *MorphNodeTo(SDNode *N, unsigned Opc, SDVTList VTs,
ArrayRef<SDValue> Ops);
/// Mutate the specified strict FP node to its non-strict equivalent,
/// unlinking the node from its chain and dropping the metadata arguments.
/// The node must be a strict FP node.
SDNode *mutateStrictFPToFP(SDNode *Node);
/// These are used for target selectors to create a new node
/// with specified return type(s), MachineInstr opcode, and operands.
///
/// Note that getMachineNode returns the resultant node. If there is already
/// a node of the specified opcode and operands, it returns that node instead
/// of the current one.
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT);
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
SDValue Op1);
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
SDValue Op1, SDValue Op2);
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
SDValue Op1, SDValue Op2, SDValue Op3);
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT,
ArrayRef<SDValue> Ops);
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
EVT VT2, SDValue Op1, SDValue Op2);
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3);
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
EVT VT2, ArrayRef<SDValue> Ops);
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
EVT VT2, EVT VT3, SDValue Op1, SDValue Op2);
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
EVT VT2, EVT VT3, SDValue Op1, SDValue Op2,
SDValue Op3);
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT1,
EVT VT2, EVT VT3, ArrayRef<SDValue> Ops);
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl,
ArrayRef<EVT> ResultTys, ArrayRef<SDValue> Ops);
MachineSDNode *getMachineNode(unsigned Opcode, const SDLoc &dl, SDVTList VTs,
ArrayRef<SDValue> Ops);
/// A convenience function for creating TargetInstrInfo::EXTRACT_SUBREG nodes.
SDValue getTargetExtractSubreg(int SRIdx, const SDLoc &DL, EVT VT,
SDValue Operand);
/// A convenience function for creating TargetInstrInfo::INSERT_SUBREG nodes.
SDValue getTargetInsertSubreg(int SRIdx, const SDLoc &DL, EVT VT,
SDValue Operand, SDValue Subreg);
/// Get the specified node if it's already available, or else return NULL.
SDNode *getNodeIfExists(unsigned Opcode, SDVTList VTList,
ArrayRef<SDValue> Ops, const SDNodeFlags Flags);
SDNode *getNodeIfExists(unsigned Opcode, SDVTList VTList,
ArrayRef<SDValue> Ops);
/// Check if a node exists without modifying its flags.
bool doesNodeExist(unsigned Opcode, SDVTList VTList, ArrayRef<SDValue> Ops);
/// Creates a SDDbgValue node.
SDDbgValue *getDbgValue(DIVariable *Var, DIExpression *Expr, SDNode *N,
unsigned R, bool IsIndirect, const DebugLoc &DL,
unsigned O);
/// Creates a constant SDDbgValue node.
SDDbgValue *getConstantDbgValue(DIVariable *Var, DIExpression *Expr,
const Value *C, const DebugLoc &DL,
unsigned O);
/// Creates a FrameIndex SDDbgValue node.
SDDbgValue *getFrameIndexDbgValue(DIVariable *Var, DIExpression *Expr,
unsigned FI, bool IsIndirect,
const DebugLoc &DL, unsigned O);
/// Creates a FrameIndex SDDbgValue node.
SDDbgValue *getFrameIndexDbgValue(DIVariable *Var, DIExpression *Expr,
unsigned FI,
ArrayRef<SDNode *> Dependencies,
bool IsIndirect, const DebugLoc &DL,
unsigned O);
/// Creates a VReg SDDbgValue node.
SDDbgValue *getVRegDbgValue(DIVariable *Var, DIExpression *Expr,
unsigned VReg, bool IsIndirect,
const DebugLoc &DL, unsigned O);
/// Creates a SDDbgValue node from a list of locations.
SDDbgValue *getDbgValueList(DIVariable *Var, DIExpression *Expr,
ArrayRef<SDDbgOperand> Locs,
ArrayRef<SDNode *> Dependencies, bool IsIndirect,
const DebugLoc &DL, unsigned O, bool IsVariadic);
/// Creates a SDDbgLabel node.
SDDbgLabel *getDbgLabel(DILabel *Label, const DebugLoc &DL, unsigned O);
/// Transfer debug values from one node to another, while optionally
/// generating fragment expressions for split-up values. If \p InvalidateDbg
/// is set, debug values are invalidated after they are transferred.
void transferDbgValues(SDValue From, SDValue To, unsigned OffsetInBits = 0,
unsigned SizeInBits = 0, bool InvalidateDbg = true);
/// Remove the specified node from the system. If any of its
/// operands then becomes dead, remove them as well. Inform UpdateListener
/// for each node deleted.
void RemoveDeadNode(SDNode *N);
/// This method deletes the unreachable nodes in the
/// given list, and any nodes that become unreachable as a result.
void RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes);
/// Modify anything using 'From' to use 'To' instead.
/// This can cause recursive merging of nodes in the DAG. Use the first
/// version if 'From' is known to have a single result, use the second
/// if you have two nodes with identical results (or if 'To' has a superset
/// of the results of 'From'), use the third otherwise.
///
/// These methods all take an optional UpdateListener, which (if not null) is
/// informed about nodes that are deleted and modified due to recursive
/// changes in the dag.
///
/// These functions only replace all existing uses. It's possible that as
/// these replacements are being performed, CSE may cause the From node
/// to be given new uses. These new uses of From are left in place, and
/// not automatically transferred to To.
///
void ReplaceAllUsesWith(SDValue From, SDValue To);
void ReplaceAllUsesWith(SDNode *From, SDNode *To);
void ReplaceAllUsesWith(SDNode *From, const SDValue *To);
/// Replace any uses of From with To, leaving
/// uses of other values produced by From.getNode() alone.
void ReplaceAllUsesOfValueWith(SDValue From, SDValue To);
/// Like ReplaceAllUsesOfValueWith, but for multiple values at once.
/// This correctly handles the case where
/// there is an overlap between the From values and the To values.
void ReplaceAllUsesOfValuesWith(const SDValue *From, const SDValue *To,
unsigned Num);
/// If an existing load has uses of its chain, create a token factor node with
/// that chain and the new memory node's chain and update users of the old
/// chain to the token factor. This ensures that the new memory node will have
/// the same relative memory dependency position as the old load. Returns the
/// new merged load chain.
SDValue makeEquivalentMemoryOrdering(SDValue OldChain, SDValue NewMemOpChain);
/// If an existing load has uses of its chain, create a token factor node with
/// that chain and the new memory node's chain and update users of the old
/// chain to the token factor. This ensures that the new memory node will have
/// the same relative memory dependency position as the old load. Returns the
/// new merged load chain.
SDValue makeEquivalentMemoryOrdering(LoadSDNode *OldLoad, SDValue NewMemOp);
/// Topological-sort the AllNodes list and a
/// assign a unique node id for each node in the DAG based on their
/// topological order. Returns the number of nodes.
unsigned AssignTopologicalOrder();
/// Move node N in the AllNodes list to be immediately
/// before the given iterator Position. This may be used to update the
/// topological ordering when the list of nodes is modified.
void RepositionNode(allnodes_iterator Position, SDNode *N) {
AllNodes.insert(Position, AllNodes.remove(N));
}
/// Returns an APFloat semantics tag appropriate for the given type. If VT is
/// a vector type, the element semantics are returned.
static const fltSemantics &EVTToAPFloatSemantics(EVT VT) {
switch (VT.getScalarType().getSimpleVT().SimpleTy) {
default: llvm_unreachable("Unknown FP format");
case MVT::f16: return APFloat::IEEEhalf();
case MVT::bf16: return APFloat::BFloat();
case MVT::f32: return APFloat::IEEEsingle();
case MVT::f64: return APFloat::IEEEdouble();
case MVT::f80: return APFloat::x87DoubleExtended();
case MVT::f128: return APFloat::IEEEquad();
case MVT::ppcf128: return APFloat::PPCDoubleDouble();
}
}
/// Add a dbg_value SDNode. If SD is non-null that means the
/// value is produced by SD.
void AddDbgValue(SDDbgValue *DB, bool isParameter);
/// Add a dbg_label SDNode.
void AddDbgLabel(SDDbgLabel *DB);
/// Get the debug values which reference the given SDNode.
ArrayRef<SDDbgValue*> GetDbgValues(const SDNode* SD) const {
return DbgInfo->getSDDbgValues(SD);
}
public:
/// Return true if there are any SDDbgValue nodes associated
/// with this SelectionDAG.
bool hasDebugValues() const { return !DbgInfo->empty(); }
SDDbgInfo::DbgIterator DbgBegin() const { return DbgInfo->DbgBegin(); }
SDDbgInfo::DbgIterator DbgEnd() const { return DbgInfo->DbgEnd(); }
SDDbgInfo::DbgIterator ByvalParmDbgBegin() const {
return DbgInfo->ByvalParmDbgBegin();
}
SDDbgInfo::DbgIterator ByvalParmDbgEnd() const {
return DbgInfo->ByvalParmDbgEnd();
}
SDDbgInfo::DbgLabelIterator DbgLabelBegin() const {
return DbgInfo->DbgLabelBegin();
}
SDDbgInfo::DbgLabelIterator DbgLabelEnd() const {
return DbgInfo->DbgLabelEnd();
}
/// To be invoked on an SDNode that is slated to be erased. This
/// function mirrors \c llvm::salvageDebugInfo.
void salvageDebugInfo(SDNode &N);
void dump() const;
/// In most cases this function returns the ABI alignment for a given type,
/// except for illegal vector types where the alignment exceeds that of the
/// stack. In such cases we attempt to break the vector down to a legal type
/// and return the ABI alignment for that instead.
Align getReducedAlign(EVT VT, bool UseABI);
/// Create a stack temporary based on the size in bytes and the alignment
SDValue CreateStackTemporary(TypeSize Bytes, Align Alignment);
/// Create a stack temporary, suitable for holding the specified value type.
/// If minAlign is specified, the slot size will have at least that alignment.
SDValue CreateStackTemporary(EVT VT, unsigned minAlign = 1);
/// Create a stack temporary suitable for holding either of the specified
/// value types.
SDValue CreateStackTemporary(EVT VT1, EVT VT2);
SDValue FoldSymbolOffset(unsigned Opcode, EVT VT,
const GlobalAddressSDNode *GA,
const SDNode *N2);
SDValue FoldConstantArithmetic(unsigned Opcode, const SDLoc &DL, EVT VT,
ArrayRef<SDValue> Ops);
/// Fold floating-point operations with 2 operands when both operands are
/// constants and/or undefined.
SDValue foldConstantFPMath(unsigned Opcode, const SDLoc &DL, EVT VT,
SDValue N1, SDValue N2);
/// Constant fold a setcc to true or false.
SDValue FoldSetCC(EVT VT, SDValue N1, SDValue N2, ISD::CondCode Cond,
const SDLoc &dl);
/// Return true if the sign bit of Op is known to be zero.
/// We use this predicate to simplify operations downstream.
bool SignBitIsZero(SDValue Op, unsigned Depth = 0) const;
/// Return true if 'Op & Mask' is known to be zero. We
/// use this predicate to simplify operations downstream. Op and Mask are
/// known to be the same type.
bool MaskedValueIsZero(SDValue Op, const APInt &Mask,
unsigned Depth = 0) const;
/// Return true if 'Op & Mask' is known to be zero in DemandedElts. We
/// use this predicate to simplify operations downstream. Op and Mask are
/// known to be the same type.
bool MaskedValueIsZero(SDValue Op, const APInt &Mask,
const APInt &DemandedElts, unsigned Depth = 0) const;
/// Return true if 'Op' is known to be zero in DemandedElts. We
/// use this predicate to simplify operations downstream.
bool MaskedVectorIsZero(SDValue Op, const APInt &DemandedElts,
unsigned Depth = 0) const;
/// Return true if '(Op & Mask) == Mask'.
/// Op and Mask are known to be the same type.
bool MaskedValueIsAllOnes(SDValue Op, const APInt &Mask,
unsigned Depth = 0) const;
/// For each demanded element of a vector, see if it is known to be zero.
APInt computeVectorKnownZeroElements(SDValue Op, const APInt &DemandedElts,
unsigned Depth = 0) const;
/// Determine which bits of Op are known to be either zero or one and return
/// them in Known. For vectors, the known bits are those that are shared by
/// every vector element.
/// Targets can implement the computeKnownBitsForTargetNode method in the
/// TargetLowering class to allow target nodes to be understood.
KnownBits computeKnownBits(SDValue Op, unsigned Depth = 0) const;
/// Determine which bits of Op are known to be either zero or one and return
/// them in Known. The DemandedElts argument allows us to only collect the
/// known bits that are shared by the requested vector elements.
/// Targets can implement the computeKnownBitsForTargetNode method in the
/// TargetLowering class to allow target nodes to be understood.
KnownBits computeKnownBits(SDValue Op, const APInt &DemandedElts,
unsigned Depth = 0) const;
/// Used to represent the possible overflow behavior of an operation.
/// Never: the operation cannot overflow.
/// Always: the operation will always overflow.
/// Sometime: the operation may or may not overflow.
enum OverflowKind {
OFK_Never,
OFK_Sometime,
OFK_Always,
};
/// Determine if the result of the signed addition of 2 nodes can overflow.
OverflowKind computeOverflowForSignedAdd(SDValue N0, SDValue N1) const;
/// Determine if the result of the unsigned addition of 2 nodes can overflow.
OverflowKind computeOverflowForUnsignedAdd(SDValue N0, SDValue N1) const;
/// Determine if the result of the addition of 2 nodes can overflow.
OverflowKind computeOverflowForAdd(bool IsSigned, SDValue N0,
SDValue N1) const {
return IsSigned ? computeOverflowForSignedAdd(N0, N1)
: computeOverflowForUnsignedAdd(N0, N1);
}
/// Determine if the result of the signed sub of 2 nodes can overflow.
OverflowKind computeOverflowForSignedSub(SDValue N0, SDValue N1) const;
/// Determine if the result of the unsigned sub of 2 nodes can overflow.
OverflowKind computeOverflowForUnsignedSub(SDValue N0, SDValue N1) const;
/// Determine if the result of the sub of 2 nodes can overflow.
OverflowKind computeOverflowForSub(bool IsSigned, SDValue N0,
SDValue N1) const {
return IsSigned ? computeOverflowForSignedSub(N0, N1)
: computeOverflowForUnsignedSub(N0, N1);
}
/// Test if the given value is known to have exactly one bit set. This differs
/// from computeKnownBits in that it doesn't necessarily determine which bit
/// is set.
bool isKnownToBeAPowerOfTwo(SDValue Val, unsigned Depth = 0) const;
/// Return the number of times the sign bit of the register is replicated into
/// the other bits. We know that at least 1 bit is always equal to the sign
/// bit (itself), but other cases can give us information. For example,
/// immediately after an "SRA X, 2", we know that the top 3 bits are all equal
/// to each other, so we return 3. Targets can implement the
/// ComputeNumSignBitsForTarget method in the TargetLowering class to allow
/// target nodes to be understood.
unsigned ComputeNumSignBits(SDValue Op, unsigned Depth = 0) const;
/// Return the number of times the sign bit of the register is replicated into
/// the other bits. We know that at least 1 bit is always equal to the sign
/// bit (itself), but other cases can give us information. For example,
/// immediately after an "SRA X, 2", we know that the top 3 bits are all equal
/// to each other, so we return 3. The DemandedElts argument allows
/// us to only collect the minimum sign bits of the requested vector elements.
/// Targets can implement the ComputeNumSignBitsForTarget method in the
/// TargetLowering class to allow target nodes to be understood.
unsigned ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
unsigned Depth = 0) const;
/// Get the upper bound on bit size for this Value \p Op as a signed integer.
/// i.e. x == sext(trunc(x to MaxSignedBits) to bitwidth(x)).
/// Similar to the APInt::getSignificantBits function.
/// Helper wrapper to ComputeNumSignBits.
unsigned ComputeMaxSignificantBits(SDValue Op, unsigned Depth = 0) const;
/// Get the upper bound on bit size for this Value \p Op as a signed integer.
/// i.e. x == sext(trunc(x to MaxSignedBits) to bitwidth(x)).
/// Similar to the APInt::getSignificantBits function.
/// Helper wrapper to ComputeNumSignBits.
unsigned ComputeMaxSignificantBits(SDValue Op, const APInt &DemandedElts,
unsigned Depth = 0) const;
/// Return true if this function can prove that \p Op is never poison
/// and, if \p PoisonOnly is false, does not have undef bits.
bool isGuaranteedNotToBeUndefOrPoison(SDValue Op, bool PoisonOnly = false,
unsigned Depth = 0) const;
/// Return true if this function can prove that \p Op is never poison
/// and, if \p PoisonOnly is false, does not have undef bits. The DemandedElts
/// argument limits the check to the requested vector elements.
bool isGuaranteedNotToBeUndefOrPoison(SDValue Op, const APInt &DemandedElts,
bool PoisonOnly = false,
unsigned Depth = 0) const;
/// Return true if this function can prove that \p Op is never poison.
bool isGuaranteedNotToBePoison(SDValue Op, unsigned Depth = 0) const {
return isGuaranteedNotToBeUndefOrPoison(Op, /*PoisonOnly*/ true, Depth);
}
/// Return true if this function can prove that \p Op is never poison. The
/// DemandedElts argument limits the check to the requested vector elements.
bool isGuaranteedNotToBePoison(SDValue Op, const APInt &DemandedElts,
unsigned Depth = 0) const {
return isGuaranteedNotToBeUndefOrPoison(Op, DemandedElts,
/*PoisonOnly*/ true, Depth);
}
/// Return true if Op can create undef or poison from non-undef & non-poison
/// operands. The DemandedElts argument limits the check to the requested
/// vector elements.
///
/// \p ConsiderFlags controls whether poison producing flags on the
/// instruction are considered. This can be used to see if the instruction
/// could still introduce undef or poison even without poison generating flags
/// which might be on the instruction. (i.e. could the result of
/// Op->dropPoisonGeneratingFlags() still create poison or undef)
bool canCreateUndefOrPoison(SDValue Op, const APInt &DemandedElts,
bool PoisonOnly = false,
bool ConsiderFlags = true,
unsigned Depth = 0) const;
/// Return true if Op can create undef or poison from non-undef & non-poison
/// operands.
///
/// \p ConsiderFlags controls whether poison producing flags on the
/// instruction are considered. This can be used to see if the instruction
/// could still introduce undef or poison even without poison generating flags
/// which might be on the instruction. (i.e. could the result of
/// Op->dropPoisonGeneratingFlags() still create poison or undef)
bool canCreateUndefOrPoison(SDValue Op, bool PoisonOnly = false,
bool ConsiderFlags = true,
unsigned Depth = 0) const;
/// Return true if the specified operand is an ISD::ADD with a ConstantSDNode
/// on the right-hand side, or if it is an ISD::OR with a ConstantSDNode that
/// is guaranteed to have the same semantics as an ADD. This handles the
/// equivalence:
/// X|Cst == X+Cst iff X&Cst = 0.
bool isBaseWithConstantOffset(SDValue Op) const;
/// Test whether the given SDValue (or all elements of it, if it is a
/// vector) is known to never be NaN. If \p SNaN is true, returns if \p Op is
/// known to never be a signaling NaN (it may still be a qNaN).
bool isKnownNeverNaN(SDValue Op, bool SNaN = false, unsigned Depth = 0) const;
/// \returns true if \p Op is known to never be a signaling NaN.
bool isKnownNeverSNaN(SDValue Op, unsigned Depth = 0) const {
return isKnownNeverNaN(Op, true, Depth);
}
/// Test whether the given floating point SDValue is known to never be
/// positive or negative zero.
bool isKnownNeverZeroFloat(SDValue Op) const;
/// Test whether the given SDValue is known to contain non-zero value(s).
bool isKnownNeverZero(SDValue Op, unsigned Depth = 0) const;
/// Test whether two SDValues are known to compare equal. This
/// is true if they are the same value, or if one is negative zero and the
/// other positive zero.
bool isEqualTo(SDValue A, SDValue B) const;
/// Return true if A and B have no common bits set. As an example, this can
/// allow an 'add' to be transformed into an 'or'.
bool haveNoCommonBitsSet(SDValue A, SDValue B) const;
/// Test whether \p V has a splatted value for all the demanded elements.
///
/// On success \p UndefElts will indicate the elements that have UNDEF
/// values instead of the splat value, this is only guaranteed to be correct
/// for \p DemandedElts.
///
/// NOTE: The function will return true for a demanded splat of UNDEF values.
bool isSplatValue(SDValue V, const APInt &DemandedElts, APInt &UndefElts,
unsigned Depth = 0) const;
/// Test whether \p V has a splatted value.
bool isSplatValue(SDValue V, bool AllowUndefs = false) const;
/// If V is a splatted value, return the source vector and its splat index.
SDValue getSplatSourceVector(SDValue V, int &SplatIndex);
/// If V is a splat vector, return its scalar source operand by extracting
/// that element from the source vector. If LegalTypes is true, this method
/// may only return a legally-typed splat value. If it cannot legalize the
/// splatted value it will return SDValue().
SDValue getSplatValue(SDValue V, bool LegalTypes = false);
/// If a SHL/SRA/SRL node \p V has a constant or splat constant shift amount
/// that is less than the element bit-width of the shift node, return it.
const APInt *getValidShiftAmountConstant(SDValue V,
const APInt &DemandedElts) const;
/// If a SHL/SRA/SRL node \p V has constant shift amounts that are all less
/// than the element bit-width of the shift node, return the minimum value.
const APInt *
getValidMinimumShiftAmountConstant(SDValue V,
const APInt &DemandedElts) const;
/// If a SHL/SRA/SRL node \p V has constant shift amounts that are all less
/// than the element bit-width of the shift node, return the maximum value.
const APInt *
getValidMaximumShiftAmountConstant(SDValue V,
const APInt &DemandedElts) const;
/// Match a binop + shuffle pyramid that represents a horizontal reduction
/// over the elements of a vector starting from the EXTRACT_VECTOR_ELT node /p
/// Extract. The reduction must use one of the opcodes listed in /p
/// CandidateBinOps and on success /p BinOp will contain the matching opcode.
/// Returns the vector that is being reduced on, or SDValue() if a reduction
/// was not matched. If \p AllowPartials is set then in the case of a
/// reduction pattern that only matches the first few stages, the extracted
/// subvector of the start of the reduction is returned.
SDValue matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
ArrayRef<ISD::NodeType> CandidateBinOps,
bool AllowPartials = false);
/// Utility function used by legalize and lowering to
/// "unroll" a vector operation by splitting out the scalars and operating
/// on each element individually. If the ResNE is 0, fully unroll the vector
/// op. If ResNE is less than the width of the vector op, unroll up to ResNE.
/// If the ResNE is greater than the width of the vector op, unroll the
/// vector op and fill the end of the resulting vector with UNDEFS.
SDValue UnrollVectorOp(SDNode *N, unsigned ResNE = 0);
/// Like UnrollVectorOp(), but for the [US](ADD|SUB|MUL)O family of opcodes.
/// This is a separate function because those opcodes have two results.
std::pair<SDValue, SDValue> UnrollVectorOverflowOp(SDNode *N,
unsigned ResNE = 0);
/// Return true if loads are next to each other and can be
/// merged. Check that both are nonvolatile and if LD is loading
/// 'Bytes' bytes from a location that is 'Dist' units away from the
/// location that the 'Base' load is loading from.
bool areNonVolatileConsecutiveLoads(LoadSDNode *LD, LoadSDNode *Base,
unsigned Bytes, int Dist) const;
/// Infer alignment of a load / store address. Return std::nullopt if it
/// cannot be inferred.
MaybeAlign InferPtrAlign(SDValue Ptr) const;
/// Split the scalar node with EXTRACT_ELEMENT using the provided VTs and
/// return the low/high part.
std::pair<SDValue, SDValue> SplitScalar(const SDValue &N, const SDLoc &DL,
const EVT &LoVT, const EVT &HiVT);
/// Compute the VTs needed for the low/hi parts of a type
/// which is split (or expanded) into two not necessarily identical pieces.
std::pair<EVT, EVT> GetSplitDestVTs(const EVT &VT) const;
/// Compute the VTs needed for the low/hi parts of a type, dependent on an
/// enveloping VT that has been split into two identical pieces. Sets the
/// HisIsEmpty flag when hi type has zero storage size.
std::pair<EVT, EVT> GetDependentSplitDestVTs(const EVT &VT, const EVT &EnvVT,
bool *HiIsEmpty) const;
/// Split the vector with EXTRACT_SUBVECTOR using the provides
/// VTs and return the low/high part.
std::pair<SDValue, SDValue> SplitVector(const SDValue &N, const SDLoc &DL,
const EVT &LoVT, const EVT &HiVT);
/// Split the vector with EXTRACT_SUBVECTOR and return the low/high part.
std::pair<SDValue, SDValue> SplitVector(const SDValue &N, const SDLoc &DL) {
EVT LoVT, HiVT;
std::tie(LoVT, HiVT) = GetSplitDestVTs(N.getValueType());
return SplitVector(N, DL, LoVT, HiVT);
}
/// Split the explicit vector length parameter of a VP operation.
std::pair<SDValue, SDValue> SplitEVL(SDValue N, EVT VecVT, const SDLoc &DL);
/// Split the node's operand with EXTRACT_SUBVECTOR and
/// return the low/high part.
std::pair<SDValue, SDValue> SplitVectorOperand(const SDNode *N, unsigned OpNo)
{
return SplitVector(N->getOperand(OpNo), SDLoc(N));
}
/// Widen the vector up to the next power of two using INSERT_SUBVECTOR.
SDValue WidenVector(const SDValue &N, const SDLoc &DL);
/// Append the extracted elements from Start to Count out of the vector Op in
/// Args. If Count is 0, all of the elements will be extracted. The extracted
/// elements will have type EVT if it is provided, and otherwise their type
/// will be Op's element type.
void ExtractVectorElements(SDValue Op, SmallVectorImpl<SDValue> &Args,
unsigned Start = 0, unsigned Count = 0,
EVT EltVT = EVT());
/// Compute the default alignment value for the given type.
Align getEVTAlign(EVT MemoryVT) const;
/// Test whether the given value is a constant int or similar node.
SDNode *isConstantIntBuildVectorOrConstantInt(SDValue N) const;
/// Test whether the given value is a constant FP or similar node.
SDNode *isConstantFPBuildVectorOrConstantFP(SDValue N) const ;
/// \returns true if \p N is any kind of constant or build_vector of
/// constants, int or float. If a vector, it may not necessarily be a splat.
inline bool isConstantValueOfAnyType(SDValue N) const {
return isConstantIntBuildVectorOrConstantInt(N) ||
isConstantFPBuildVectorOrConstantFP(N);
}
/// Set CallSiteInfo to be associated with Node.
void addCallSiteInfo(const SDNode *Node, CallSiteInfoImpl &&CallInfo) {
SDEI[Node].CSInfo = std::move(CallInfo);
}
/// Return CallSiteInfo associated with Node, or a default if none exists.
CallSiteInfo getCallSiteInfo(const SDNode *Node) {
auto I = SDEI.find(Node);
return I != SDEI.end() ? std::move(I->second).CSInfo : CallSiteInfo();
}
/// Set HeapAllocSite to be associated with Node.
void addHeapAllocSite(const SDNode *Node, MDNode *MD) {
SDEI[Node].HeapAllocSite = MD;
}
/// Return HeapAllocSite associated with Node, or nullptr if none exists.
MDNode *getHeapAllocSite(const SDNode *Node) const {
auto I = SDEI.find(Node);
return I != SDEI.end() ? I->second.HeapAllocSite : nullptr;
}
/// Set PCSections to be associated with Node.
void addPCSections(const SDNode *Node, MDNode *MD) {
SDEI[Node].PCSections = MD;
}
/// Return PCSections associated with Node, or nullptr if none exists.
MDNode *getPCSections(const SDNode *Node) const {
auto It = SDEI.find(Node);
return It != SDEI.end() ? It->second.PCSections : nullptr;
}
/// Set NoMergeSiteInfo to be associated with Node if NoMerge is true.
void addNoMergeSiteInfo(const SDNode *Node, bool NoMerge) {
if (NoMerge)
SDEI[Node].NoMerge = NoMerge;
}
/// Return NoMerge info associated with Node.
bool getNoMergeSiteInfo(const SDNode *Node) const {
auto I = SDEI.find(Node);
return I != SDEI.end() ? I->second.NoMerge : false;
}
/// Copy extra info associated with one node to another.
void copyExtraInfo(SDNode *From, SDNode *To);
/// Return the current function's default denormal handling kind for the given
/// floating point type.
DenormalMode getDenormalMode(EVT VT) const {
return MF->getDenormalMode(EVTToAPFloatSemantics(VT));
}
bool shouldOptForSize() const;
/// Get the (commutative) neutral element for the given opcode, if it exists.
SDValue getNeutralElement(unsigned Opcode, const SDLoc &DL, EVT VT,
SDNodeFlags Flags);
/// Some opcodes may create immediate undefined behavior when used with some
/// values (integer division-by-zero for example). Therefore, these operations
/// are not generally safe to move around or change.
bool isSafeToSpeculativelyExecute(unsigned Opcode) const {
switch (Opcode) {
case ISD::SDIV:
case ISD::SREM:
case ISD::SDIVREM:
case ISD::UDIV:
case ISD::UREM:
case ISD::UDIVREM:
return false;
default:
return true;
}
}
/// Check if the provided node is save to speculatively executed given its
/// current arguments. So, while `udiv` the opcode is not safe to
/// speculatively execute, a given `udiv` node may be if the denominator is
/// known nonzero.
bool isSafeToSpeculativelyExecuteNode(const SDNode *N) const {
switch (N->getOpcode()) {
case ISD::UDIV:
return isKnownNeverZero(N->getOperand(1));
default:
return isSafeToSpeculativelyExecute(N->getOpcode());
}
}
SDValue makeStateFunctionCall(unsigned LibFunc, SDValue Ptr, SDValue InChain,
const SDLoc &DLoc);
private:
void InsertNode(SDNode *N);
bool RemoveNodeFromCSEMaps(SDNode *N);
void AddModifiedNodeToCSEMaps(SDNode *N);
SDNode *FindModifiedNodeSlot(SDNode *N, SDValue Op, void *&InsertPos);
SDNode *FindModifiedNodeSlot(SDNode *N, SDValue Op1, SDValue Op2,
void *&InsertPos);
SDNode *FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
void *&InsertPos);
SDNode *UpdateSDLocOnMergeSDNode(SDNode *N, const SDLoc &loc);
void DeleteNodeNotInCSEMaps(SDNode *N);
void DeallocateNode(SDNode *N);
void allnodes_clear();
/// Look up the node specified by ID in CSEMap. If it exists, return it. If
/// not, return the insertion token that will make insertion faster. This
/// overload is for nodes other than Constant or ConstantFP, use the other one
/// for those.
SDNode *FindNodeOrInsertPos(const FoldingSetNodeID &ID, void *&InsertPos);
/// Look up the node specified by ID in CSEMap. If it exists, return it. If
/// not, return the insertion token that will make insertion faster. Performs
/// additional processing for constant nodes.
SDNode *FindNodeOrInsertPos(const FoldingSetNodeID &ID, const SDLoc &DL,
void *&InsertPos);
/// Maps to auto-CSE operations.
std::vector<CondCodeSDNode*> CondCodeNodes;
std::vector<SDNode*> ValueTypeNodes;
std::map<EVT, SDNode*, EVT::compareRawBits> ExtendedValueTypeNodes;
StringMap<SDNode*> ExternalSymbols;
std::map<std::pair<std::string, unsigned>, SDNode *> TargetExternalSymbols;
DenseMap<MCSymbol *, SDNode *> MCSymbols;
FlagInserter *Inserter = nullptr;
};
template <> struct GraphTraits<SelectionDAG*> : public GraphTraits<SDNode*> {
using nodes_iterator = pointer_iterator<SelectionDAG::allnodes_iterator>;
static nodes_iterator nodes_begin(SelectionDAG *G) {
return nodes_iterator(G->allnodes_begin());
}
static nodes_iterator nodes_end(SelectionDAG *G) {
return nodes_iterator(G->allnodes_end());
}
};
} // end namespace llvm
#endif // LLVM_CODEGEN_SELECTIONDAG_H
PK iwFZڨ*-� � CodeGen/MIRFormatter.hnu �[��� //===-- llvm/CodeGen/MIRFormatter.h -----------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the declaration of the MIRFormatter class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MIRFORMATTER_H
#define LLVM_CODEGEN_MIRFORMATTER_H
#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/Support/raw_ostream.h"
#include <cstdint>
#include <optional>
namespace llvm {
class MachineFunction;
class MachineInstr;
struct PerFunctionMIParsingState;
/// MIRFormater - Interface to format MIR operand based on target
class MIRFormatter {
public:
typedef function_ref<bool(StringRef::iterator Loc, const Twine &)>
ErrorCallbackType;
MIRFormatter() = default;
virtual ~MIRFormatter() = default;
/// Implement target specific printing for machine operand immediate value, so
/// that we can have more meaningful mnemonic than a 64-bit integer. Passing
/// std::nullopt to OpIdx means the index is unknown.
virtual void printImm(raw_ostream &OS, const MachineInstr &MI,
std::optional<unsigned> OpIdx, int64_t Imm) const {
OS << Imm;
}
/// Implement target specific parsing of immediate mnemonics. The mnemonic is
/// dot seperated strings.
virtual bool parseImmMnemonic(const unsigned OpCode, const unsigned OpIdx,
StringRef Src, int64_t &Imm,
ErrorCallbackType ErrorCallback) const {
llvm_unreachable("target did not implement parsing MIR immediate mnemonic");
}
/// Implement target specific printing of target custom pseudo source value.
/// Default implementation is not necessarily the correct MIR serialization
/// format.
virtual void
printCustomPseudoSourceValue(raw_ostream &OS, ModuleSlotTracker &MST,
const PseudoSourceValue &PSV) const {
PSV.printCustom(OS);
}
/// Implement target specific parsing of target custom pseudo source value.
virtual bool parseCustomPseudoSourceValue(
StringRef Src, MachineFunction &MF, PerFunctionMIParsingState &PFS,
const PseudoSourceValue *&PSV, ErrorCallbackType ErrorCallback) const {
llvm_unreachable(
"target did not implement parsing MIR custom pseudo source value");
}
/// Helper functions to print IR value as MIR serialization format which will
/// be useful for target specific printer, e.g. for printing IR value in
/// custom pseudo source value.
static void printIRValue(raw_ostream &OS, const Value &V,
ModuleSlotTracker &MST);
/// Helper functions to parse IR value from MIR serialization format which
/// will be useful for target specific parser, e.g. for parsing IR value for
/// custom pseudo source value.
static bool parseIRValue(StringRef Src, MachineFunction &MF,
PerFunctionMIParsingState &PFS, const Value *&V,
ErrorCallbackType ErrorCallback);
};
} // end namespace llvm
#endif
PK iwFZ���T�� ��
CodeGen/DIE.hnu �[��� //===- lib/CodeGen/DIE.h - DWARF Info Entries -------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Data structures for DWARF info entries.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_DIE_H
#define LLVM_CODEGEN_DIE_H
#include "llvm/ADT/FoldingSet.h"
#include "llvm/ADT/PointerIntPair.h"
#include "llvm/ADT/PointerUnion.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/CodeGen/DwarfStringPoolEntry.h"
#include "llvm/Support/AlignOf.h"
#include "llvm/Support/Allocator.h"
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <iterator>
#include <new>
#include <type_traits>
#include <utility>
#include <vector>
namespace llvm {
class AsmPrinter;
class DIE;
class DIEUnit;
class DwarfCompileUnit;
class MCExpr;
class MCSection;
class MCSymbol;
class raw_ostream;
//===--------------------------------------------------------------------===//
/// Dwarf abbreviation data, describes one attribute of a Dwarf abbreviation.
class DIEAbbrevData {
/// Dwarf attribute code.
dwarf::Attribute Attribute;
/// Dwarf form code.
dwarf::Form Form;
/// Dwarf attribute value for DW_FORM_implicit_const
int64_t Value = 0;
public:
DIEAbbrevData(dwarf::Attribute A, dwarf::Form F)
: Attribute(A), Form(F) {}
DIEAbbrevData(dwarf::Attribute A, int64_t V)
: Attribute(A), Form(dwarf::DW_FORM_implicit_const), Value(V) {}
/// Accessors.
/// @{
dwarf::Attribute getAttribute() const { return Attribute; }
dwarf::Form getForm() const { return Form; }
int64_t getValue() const { return Value; }
/// @}
/// Used to gather unique data for the abbreviation folding set.
void Profile(FoldingSetNodeID &ID) const;
};
//===--------------------------------------------------------------------===//
/// Dwarf abbreviation, describes the organization of a debug information
/// object.
class DIEAbbrev : public FoldingSetNode {
/// Unique number for node.
unsigned Number = 0;
/// Dwarf tag code.
dwarf::Tag Tag;
/// Whether or not this node has children.
///
/// This cheats a bit in all of the uses since the values in the standard
/// are 0 and 1 for no children and children respectively.
bool Children;
/// Raw data bytes for abbreviation.
SmallVector<DIEAbbrevData, 12> Data;
public:
DIEAbbrev(dwarf::Tag T, bool C) : Tag(T), Children(C) {}
/// Accessors.
/// @{
dwarf::Tag getTag() const { return Tag; }
unsigned getNumber() const { return Number; }
bool hasChildren() const { return Children; }
const SmallVectorImpl<DIEAbbrevData> &getData() const { return Data; }
void setChildrenFlag(bool hasChild) { Children = hasChild; }
void setNumber(unsigned N) { Number = N; }
/// @}
/// Adds another set of attribute information to the abbreviation.
void AddAttribute(dwarf::Attribute Attribute, dwarf::Form Form) {
Data.push_back(DIEAbbrevData(Attribute, Form));
}
/// Adds attribute with DW_FORM_implicit_const value
void AddImplicitConstAttribute(dwarf::Attribute Attribute, int64_t Value) {
Data.push_back(DIEAbbrevData(Attribute, Value));
}
/// Adds another set of attribute information to the abbreviation.
void AddAttribute(const DIEAbbrevData &AbbrevData) {
Data.push_back(AbbrevData);
}
/// Used to gather unique data for the abbreviation folding set.
void Profile(FoldingSetNodeID &ID) const;
/// Print the abbreviation using the specified asm printer.
void Emit(const AsmPrinter *AP) const;
void print(raw_ostream &O) const;
void dump() const;
};
//===--------------------------------------------------------------------===//
/// Helps unique DIEAbbrev objects and assigns abbreviation numbers.
///
/// This class will unique the DIE abbreviations for a llvm::DIE object and
/// assign a unique abbreviation number to each unique DIEAbbrev object it
/// finds. The resulting collection of DIEAbbrev objects can then be emitted
/// into the .debug_abbrev section.
class DIEAbbrevSet {
/// The bump allocator to use when creating DIEAbbrev objects in the uniqued
/// storage container.
BumpPtrAllocator &Alloc;
/// FoldingSet that uniques the abbreviations.
FoldingSet<DIEAbbrev> AbbreviationsSet;
/// A list of all the unique abbreviations in use.
std::vector<DIEAbbrev *> Abbreviations;
public:
DIEAbbrevSet(BumpPtrAllocator &A) : Alloc(A) {}
~DIEAbbrevSet();
/// Generate the abbreviation declaration for a DIE and return a pointer to
/// the generated abbreviation.
///
/// \param Die the debug info entry to generate the abbreviation for.
/// \returns A reference to the uniqued abbreviation declaration that is
/// owned by this class.
DIEAbbrev &uniqueAbbreviation(DIE &Die);
/// Print all abbreviations using the specified asm printer.
void Emit(const AsmPrinter *AP, MCSection *Section) const;
};
//===--------------------------------------------------------------------===//
/// An integer value DIE.
///
class DIEInteger {
uint64_t Integer;
public:
explicit DIEInteger(uint64_t I) : Integer(I) {}
/// Choose the best form for integer.
static dwarf::Form BestForm(bool IsSigned, uint64_t Int) {
if (IsSigned) {
const int64_t SignedInt = Int;
if ((char)Int == SignedInt)
return dwarf::DW_FORM_data1;
if ((short)Int == SignedInt)
return dwarf::DW_FORM_data2;
if ((int)Int == SignedInt)
return dwarf::DW_FORM_data4;
} else {
if ((unsigned char)Int == Int)
return dwarf::DW_FORM_data1;
if ((unsigned short)Int == Int)
return dwarf::DW_FORM_data2;
if ((unsigned int)Int == Int)
return dwarf::DW_FORM_data4;
}
return dwarf::DW_FORM_data8;
}
uint64_t getValue() const { return Integer; }
void setValue(uint64_t Val) { Integer = Val; }
void emitValue(const AsmPrinter *Asm, dwarf::Form Form) const;
unsigned sizeOf(const dwarf::FormParams &FormParams, dwarf::Form Form) const;
void print(raw_ostream &O) const;
};
//===--------------------------------------------------------------------===//
/// An expression DIE.
class DIEExpr {
const MCExpr *Expr;
public:
explicit DIEExpr(const MCExpr *E) : Expr(E) {}
/// Get MCExpr.
const MCExpr *getValue() const { return Expr; }
void emitValue(const AsmPrinter *AP, dwarf::Form Form) const;
unsigned sizeOf(const dwarf::FormParams &FormParams, dwarf::Form Form) const;
void print(raw_ostream &O) const;
};
//===--------------------------------------------------------------------===//
/// A label DIE.
class DIELabel {
const MCSymbol *Label;
public:
explicit DIELabel(const MCSymbol *L) : Label(L) {}
/// Get MCSymbol.
const MCSymbol *getValue() const { return Label; }
void emitValue(const AsmPrinter *AP, dwarf::Form Form) const;
unsigned sizeOf(const dwarf::FormParams &FormParams, dwarf::Form Form) const;
void print(raw_ostream &O) const;
};
//===--------------------------------------------------------------------===//
/// A BaseTypeRef DIE.
class DIEBaseTypeRef {
const DwarfCompileUnit *CU;
const uint64_t Index;
static constexpr unsigned ULEB128PadSize = 4;
public:
explicit DIEBaseTypeRef(const DwarfCompileUnit *TheCU, uint64_t Idx)
: CU(TheCU), Index(Idx) {}
/// EmitValue - Emit base type reference.
void emitValue(const AsmPrinter *AP, dwarf::Form Form) const;
/// sizeOf - Determine size of the base type reference in bytes.
unsigned sizeOf(const dwarf::FormParams &, dwarf::Form) const;
void print(raw_ostream &O) const;
uint64_t getIndex() const { return Index; }
};
//===--------------------------------------------------------------------===//
/// A simple label difference DIE.
///
class DIEDelta {
const MCSymbol *LabelHi;
const MCSymbol *LabelLo;
public:
DIEDelta(const MCSymbol *Hi, const MCSymbol *Lo) : LabelHi(Hi), LabelLo(Lo) {}
void emitValue(const AsmPrinter *AP, dwarf::Form Form) const;
unsigned sizeOf(const dwarf::FormParams &FormParams, dwarf::Form Form) const;
void print(raw_ostream &O) const;
};
//===--------------------------------------------------------------------===//
/// A container for string pool string values.
///
/// This class is used with the DW_FORM_strp and DW_FORM_GNU_str_index forms.
class DIEString {
DwarfStringPoolEntryRef S;
public:
DIEString(DwarfStringPoolEntryRef S) : S(S) {}
/// Grab the string out of the object.
StringRef getString() const { return S.getString(); }
void emitValue(const AsmPrinter *AP, dwarf::Form Form) const;
unsigned sizeOf(const dwarf::FormParams &FormParams, dwarf::Form Form) const;
void print(raw_ostream &O) const;
};
//===--------------------------------------------------------------------===//
/// A container for inline string values.
///
/// This class is used with the DW_FORM_string form.
class DIEInlineString {
StringRef S;
public:
template <typename Allocator>
explicit DIEInlineString(StringRef Str, Allocator &A) : S(Str.copy(A)) {}
~DIEInlineString() = default;
/// Grab the string out of the object.
StringRef getString() const { return S; }
void emitValue(const AsmPrinter *AP, dwarf::Form Form) const;
unsigned sizeOf(const dwarf::FormParams &, dwarf::Form) const;
void print(raw_ostream &O) const;
};
//===--------------------------------------------------------------------===//
/// A pointer to another debug information entry. An instance of this class can
/// also be used as a proxy for a debug information entry not yet defined
/// (ie. types.)
class DIEEntry {
DIE *Entry;
public:
DIEEntry() = delete;
explicit DIEEntry(DIE &E) : Entry(&E) {}
DIE &getEntry() const { return *Entry; }
void emitValue(const AsmPrinter *AP, dwarf::Form Form) const;
unsigned sizeOf(const dwarf::FormParams &FormParams, dwarf::Form Form) const;
void print(raw_ostream &O) const;
};
//===--------------------------------------------------------------------===//
/// Represents a pointer to a location list in the debug_loc
/// section.
class DIELocList {
/// Index into the .debug_loc vector.
size_t Index;
public:
DIELocList(size_t I) : Index(I) {}
/// Grab the current index out.
size_t getValue() const { return Index; }
void emitValue(const AsmPrinter *AP, dwarf::Form Form) const;
unsigned sizeOf(const dwarf::FormParams &FormParams, dwarf::Form Form) const;
void print(raw_ostream &O) const;
};
//===--------------------------------------------------------------------===//
/// A BaseTypeRef DIE.
class DIEAddrOffset {
DIEInteger Addr;
DIEDelta Offset;
public:
explicit DIEAddrOffset(uint64_t Idx, const MCSymbol *Hi, const MCSymbol *Lo)
: Addr(Idx), Offset(Hi, Lo) {}
void emitValue(const AsmPrinter *AP, dwarf::Form Form) const;
unsigned sizeOf(const dwarf::FormParams &FormParams, dwarf::Form Form) const;
void print(raw_ostream &O) const;
};
//===--------------------------------------------------------------------===//
/// A debug information entry value. Some of these roughly correlate
/// to DWARF attribute classes.
class DIEBlock;
class DIELoc;
class DIEValue {
public:
enum Type {
isNone,
#define HANDLE_DIEVALUE(T) is##T,
#include "llvm/CodeGen/DIEValue.def"
};
private:
/// Type of data stored in the value.
Type Ty = isNone;
dwarf::Attribute Attribute = (dwarf::Attribute)0;
dwarf::Form Form = (dwarf::Form)0;
/// Storage for the value.
///
/// All values that aren't standard layout (or are larger than 8 bytes)
/// should be stored by reference instead of by value.
using ValTy =
AlignedCharArrayUnion<DIEInteger, DIEString, DIEExpr, DIELabel,
DIEDelta *, DIEEntry, DIEBlock *, DIELoc *,
DIELocList, DIEBaseTypeRef *, DIEAddrOffset *>;
static_assert(sizeof(ValTy) <= sizeof(uint64_t) ||
sizeof(ValTy) <= sizeof(void *),
"Expected all large types to be stored via pointer");
/// Underlying stored value.
ValTy Val;
template <class T> void construct(T V) {
static_assert(std::is_standard_layout<T>::value ||
std::is_pointer<T>::value,
"Expected standard layout or pointer");
new (reinterpret_cast<void *>(&Val)) T(V);
}
template <class T> T *get() { return reinterpret_cast<T *>(&Val); }
template <class T> const T *get() const {
return reinterpret_cast<const T *>(&Val);
}
template <class T> void destruct() { get<T>()->~T(); }
/// Destroy the underlying value.
///
/// This should get optimized down to a no-op. We could skip it if we could
/// add a static assert on \a std::is_trivially_copyable(), but we currently
/// support versions of GCC that don't understand that.
void destroyVal() {
switch (Ty) {
case isNone:
return;
#define HANDLE_DIEVALUE_SMALL(T) \
case is##T: \
destruct<DIE##T>(); \
return;
#define HANDLE_DIEVALUE_LARGE(T) \
case is##T: \
destruct<const DIE##T *>(); \
return;
#include "llvm/CodeGen/DIEValue.def"
}
}
/// Copy the underlying value.
///
/// This should get optimized down to a simple copy. We need to actually
/// construct the value, rather than calling memcpy, to satisfy strict
/// aliasing rules.
void copyVal(const DIEValue &X) {
switch (Ty) {
case isNone:
return;
#define HANDLE_DIEVALUE_SMALL(T) \
case is##T: \
construct<DIE##T>(*X.get<DIE##T>()); \
return;
#define HANDLE_DIEVALUE_LARGE(T) \
case is##T: \
construct<const DIE##T *>(*X.get<const DIE##T *>()); \
return;
#include "llvm/CodeGen/DIEValue.def"
}
}
public:
DIEValue() = default;
DIEValue(const DIEValue &X) : Ty(X.Ty), Attribute(X.Attribute), Form(X.Form) {
copyVal(X);
}
DIEValue &operator=(const DIEValue &X) {
if (this == &X)
return *this;
destroyVal();
Ty = X.Ty;
Attribute = X.Attribute;
Form = X.Form;
copyVal(X);
return *this;
}
~DIEValue() { destroyVal(); }
#define HANDLE_DIEVALUE_SMALL(T) \
DIEValue(dwarf::Attribute Attribute, dwarf::Form Form, const DIE##T &V) \
: Ty(is##T), Attribute(Attribute), Form(Form) { \
construct<DIE##T>(V); \
}
#define HANDLE_DIEVALUE_LARGE(T) \
DIEValue(dwarf::Attribute Attribute, dwarf::Form Form, const DIE##T *V) \
: Ty(is##T), Attribute(Attribute), Form(Form) { \
assert(V && "Expected valid value"); \
construct<const DIE##T *>(V); \
}
#include "llvm/CodeGen/DIEValue.def"
/// Accessors.
/// @{
Type getType() const { return Ty; }
dwarf::Attribute getAttribute() const { return Attribute; }
dwarf::Form getForm() const { return Form; }
explicit operator bool() const { return Ty; }
/// @}
#define HANDLE_DIEVALUE_SMALL(T) \
const DIE##T &getDIE##T() const { \
assert(getType() == is##T && "Expected " #T); \
return *get<DIE##T>(); \
}
#define HANDLE_DIEVALUE_LARGE(T) \
const DIE##T &getDIE##T() const { \
assert(getType() == is##T && "Expected " #T); \
return **get<const DIE##T *>(); \
}
#include "llvm/CodeGen/DIEValue.def"
/// Emit value via the Dwarf writer.
void emitValue(const AsmPrinter *AP) const;
/// Return the size of a value in bytes.
unsigned sizeOf(const dwarf::FormParams &FormParams) const;
void print(raw_ostream &O) const;
void dump() const;
};
struct IntrusiveBackListNode {
PointerIntPair<IntrusiveBackListNode *, 1> Next;
IntrusiveBackListNode() : Next(this, true) {}
IntrusiveBackListNode *getNext() const {
return Next.getInt() ? nullptr : Next.getPointer();
}
};
struct IntrusiveBackListBase {
using Node = IntrusiveBackListNode;
Node *Last = nullptr;
bool empty() const { return !Last; }
void push_back(Node &N) {
assert(N.Next.getPointer() == &N && "Expected unlinked node");
assert(N.Next.getInt() == true && "Expected unlinked node");
if (Last) {
N.Next = Last->Next;
Last->Next.setPointerAndInt(&N, false);
}
Last = &N;
}
void push_front(Node &N) {
assert(N.Next.getPointer() == &N && "Expected unlinked node");
assert(N.Next.getInt() == true && "Expected unlinked node");
if (Last) {
N.Next.setPointerAndInt(Last->Next.getPointer(), false);
Last->Next.setPointerAndInt(&N, true);
} else {
Last = &N;
}
}
};
template <class T> class IntrusiveBackList : IntrusiveBackListBase {
public:
using IntrusiveBackListBase::empty;
void push_back(T &N) { IntrusiveBackListBase::push_back(N); }
void push_front(T &N) { IntrusiveBackListBase::push_front(N); }
T &back() { return *static_cast<T *>(Last); }
const T &back() const { return *static_cast<T *>(Last); }
T &front() {
return *static_cast<T *>(Last ? Last->Next.getPointer() : nullptr);
}
const T &front() const {
return *static_cast<T *>(Last ? Last->Next.getPointer() : nullptr);
}
void takeNodes(IntrusiveBackList<T> &Other) {
if (Other.empty())
return;
T *FirstNode = static_cast<T *>(Other.Last->Next.getPointer());
T *IterNode = FirstNode;
do {
// Keep a pointer to the node and increment the iterator.
T *TmpNode = IterNode;
IterNode = static_cast<T *>(IterNode->Next.getPointer());
// Unlink the node and push it back to this list.
TmpNode->Next.setPointerAndInt(TmpNode, true);
push_back(*TmpNode);
} while (IterNode != FirstNode);
Other.Last = nullptr;
}
bool deleteNode(T &N) {
if (Last == &N) {
Last = Last->Next.getPointer();
Last->Next.setInt(true);
return true;
}
Node *cur = Last;
while (cur && cur->Next.getPointer()) {
if (cur->Next.getPointer() == &N) {
cur->Next.setPointer(cur->Next.getPointer()->Next.getPointer());
return true;
}
cur = cur->Next.getPointer();
}
return false;
}
class const_iterator;
class iterator
: public iterator_facade_base<iterator, std::forward_iterator_tag, T> {
friend class const_iterator;
Node *N = nullptr;
public:
iterator() = default;
explicit iterator(T *N) : N(N) {}
iterator &operator++() {
N = N->getNext();
return *this;
}
explicit operator bool() const { return N; }
T &operator*() const { return *static_cast<T *>(N); }
bool operator==(const iterator &X) const { return N == X.N; }
};
class const_iterator
: public iterator_facade_base<const_iterator, std::forward_iterator_tag,
const T> {
const Node *N = nullptr;
public:
const_iterator() = default;
// Placate MSVC by explicitly scoping 'iterator'.
const_iterator(typename IntrusiveBackList<T>::iterator X) : N(X.N) {}
explicit const_iterator(const T *N) : N(N) {}
const_iterator &operator++() {
N = N->getNext();
return *this;
}
explicit operator bool() const { return N; }
const T &operator*() const { return *static_cast<const T *>(N); }
bool operator==(const const_iterator &X) const { return N == X.N; }
};
iterator begin() {
return Last ? iterator(static_cast<T *>(Last->Next.getPointer())) : end();
}
const_iterator begin() const {
return const_cast<IntrusiveBackList *>(this)->begin();
}
iterator end() { return iterator(); }
const_iterator end() const { return const_iterator(); }
static iterator toIterator(T &N) { return iterator(&N); }
static const_iterator toIterator(const T &N) { return const_iterator(&N); }
};
/// A list of DIE values.
///
/// This is a singly-linked list, but instead of reversing the order of
/// insertion, we keep a pointer to the back of the list so we can push in
/// order.
///
/// There are two main reasons to choose a linked list over a customized
/// vector-like data structure.
///
/// 1. For teardown efficiency, we want DIEs to be BumpPtrAllocated. Using a
/// linked list here makes this way easier to accomplish.
/// 2. Carrying an extra pointer per \a DIEValue isn't expensive. 45% of DIEs
/// have 2 or fewer values, and 90% have 5 or fewer. A vector would be
/// over-allocated by 50% on average anyway, the same cost as the
/// linked-list node.
class DIEValueList {
struct Node : IntrusiveBackListNode {
DIEValue V;
explicit Node(DIEValue V) : V(V) {}
};
using ListTy = IntrusiveBackList<Node>;
ListTy List;
public:
class const_value_iterator;
class value_iterator
: public iterator_adaptor_base<value_iterator, ListTy::iterator,
std::forward_iterator_tag, DIEValue> {
friend class const_value_iterator;
using iterator_adaptor =
iterator_adaptor_base<value_iterator, ListTy::iterator,
std::forward_iterator_tag, DIEValue>;
public:
value_iterator() = default;
explicit value_iterator(ListTy::iterator X) : iterator_adaptor(X) {}
explicit operator bool() const { return bool(wrapped()); }
DIEValue &operator*() const { return wrapped()->V; }
};
class const_value_iterator : public iterator_adaptor_base<
const_value_iterator, ListTy::const_iterator,
std::forward_iterator_tag, const DIEValue> {
using iterator_adaptor =
iterator_adaptor_base<const_value_iterator, ListTy::const_iterator,
std::forward_iterator_tag, const DIEValue>;
public:
const_value_iterator() = default;
const_value_iterator(DIEValueList::value_iterator X)
: iterator_adaptor(X.wrapped()) {}
explicit const_value_iterator(ListTy::const_iterator X)
: iterator_adaptor(X) {}
explicit operator bool() const { return bool(wrapped()); }
const DIEValue &operator*() const { return wrapped()->V; }
};
using value_range = iterator_range<value_iterator>;
using const_value_range = iterator_range<const_value_iterator>;
value_iterator addValue(BumpPtrAllocator &Alloc, const DIEValue &V) {
List.push_back(*new (Alloc) Node(V));
return value_iterator(ListTy::toIterator(List.back()));
}
template <class T>
value_iterator addValue(BumpPtrAllocator &Alloc, dwarf::Attribute Attribute,
dwarf::Form Form, T &&Value) {
return addValue(Alloc, DIEValue(Attribute, Form, std::forward<T>(Value)));
}
/* zr33: add method here */
template <class T>
bool replaceValue(BumpPtrAllocator &Alloc, dwarf::Attribute Attribute,
dwarf::Attribute NewAttribute, dwarf::Form Form,
T &&NewValue) {
for (llvm::DIEValue &val : values()) {
if (val.getAttribute() == Attribute) {
val = *new (Alloc)
DIEValue(NewAttribute, Form, std::forward<T>(NewValue));
return true;
}
}
return false;
}
template <class T>
bool replaceValue(BumpPtrAllocator &Alloc, dwarf::Attribute Attribute,
dwarf::Form Form, T &&NewValue) {
for (llvm::DIEValue &val : values()) {
if (val.getAttribute() == Attribute) {
val = *new (Alloc) DIEValue(Attribute, Form, std::forward<T>(NewValue));
return true;
}
}
return false;
}
bool replaceValue(BumpPtrAllocator &Alloc, dwarf::Attribute Attribute,
dwarf::Form Form, DIEValue &NewValue) {
for (llvm::DIEValue &val : values()) {
if (val.getAttribute() == Attribute) {
val = NewValue;
return true;
}
}
return false;
}
bool deleteValue(dwarf::Attribute Attribute) {
for (auto &node : List) {
if (node.V.getAttribute() == Attribute) {
return List.deleteNode(node);
}
}
return false;
}
/* end */
/// Take ownership of the nodes in \p Other, and append them to the back of
/// the list.
void takeValues(DIEValueList &Other) { List.takeNodes(Other.List); }
value_range values() {
return make_range(value_iterator(List.begin()), value_iterator(List.end()));
}
const_value_range values() const {
return make_range(const_value_iterator(List.begin()),
const_value_iterator(List.end()));
}
};
//===--------------------------------------------------------------------===//
/// A structured debug information entry. Has an abbreviation which
/// describes its organization.
class DIE : IntrusiveBackListNode, public DIEValueList {
friend class IntrusiveBackList<DIE>;
friend class DIEUnit;
/// Dwarf unit relative offset.
unsigned Offset = 0;
/// Size of instance + children.
unsigned Size = 0;
unsigned AbbrevNumber = ~0u;
/// Dwarf tag code.
dwarf::Tag Tag = (dwarf::Tag)0;
/// Set to true to force a DIE to emit an abbreviation that says it has
/// children even when it doesn't. This is used for unit testing purposes.
bool ForceChildren = false;
/// Children DIEs.
IntrusiveBackList<DIE> Children;
/// The owner is either the parent DIE for children of other DIEs, or a
/// DIEUnit which contains this DIE as its unit DIE.
PointerUnion<DIE *, DIEUnit *> Owner;
explicit DIE(dwarf::Tag Tag) : Tag(Tag) {}
public:
DIE() = delete;
DIE(const DIE &RHS) = delete;
DIE(DIE &&RHS) = delete;
DIE &operator=(const DIE &RHS) = delete;
DIE &operator=(const DIE &&RHS) = delete;
static DIE *get(BumpPtrAllocator &Alloc, dwarf::Tag Tag) {
return new (Alloc) DIE(Tag);
}
// Accessors.
unsigned getAbbrevNumber() const { return AbbrevNumber; }
dwarf::Tag getTag() const { return Tag; }
/// Get the compile/type unit relative offset of this DIE.
unsigned getOffset() const {
// A real Offset can't be zero because the unit headers are at offset zero.
assert(Offset && "Offset being queried before it's been computed.");
return Offset;
}
unsigned getSize() const {
// A real Size can't be zero because it includes the non-empty abbrev code.
assert(Size && "Size being queried before it's been ocmputed.");
return Size;
}
bool hasChildren() const { return ForceChildren || !Children.empty(); }
void setForceChildren(bool B) { ForceChildren = B; }
using child_iterator = IntrusiveBackList<DIE>::iterator;
using const_child_iterator = IntrusiveBackList<DIE>::const_iterator;
using child_range = iterator_range<child_iterator>;
using const_child_range = iterator_range<const_child_iterator>;
child_range children() {
return make_range(Children.begin(), Children.end());
}
const_child_range children() const {
return make_range(Children.begin(), Children.end());
}
DIE *getParent() const;
/// Generate the abbreviation for this DIE.
///
/// Calculate the abbreviation for this, which should be uniqued and
/// eventually used to call \a setAbbrevNumber().
DIEAbbrev generateAbbrev() const;
/// Set the abbreviation number for this DIE.
void setAbbrevNumber(unsigned I) { AbbrevNumber = I; }
/// Get the absolute offset within the .debug_info or .debug_types section
/// for this DIE.
uint64_t getDebugSectionOffset() const;
/// Compute the offset of this DIE and all its children.
///
/// This function gets called just before we are going to generate the debug
/// information and gives each DIE a chance to figure out its CU relative DIE
/// offset, unique its abbreviation and fill in the abbreviation code, and
/// return the unit offset that points to where the next DIE will be emitted
/// within the debug unit section. After this function has been called for all
/// DIE objects, the DWARF can be generated since all DIEs will be able to
/// properly refer to other DIE objects since all DIEs have calculated their
/// offsets.
///
/// \param FormParams Used when calculating sizes.
/// \param AbbrevSet the abbreviation used to unique DIE abbreviations.
/// \param CUOffset the compile/type unit relative offset in bytes.
/// \returns the offset for the DIE that follows this DIE within the
/// current compile/type unit.
unsigned computeOffsetsAndAbbrevs(const dwarf::FormParams &FormParams,
DIEAbbrevSet &AbbrevSet, unsigned CUOffset);
/// Climb up the parent chain to get the compile unit or type unit DIE that
/// this DIE belongs to.
///
/// \returns the compile or type unit DIE that owns this DIE, or NULL if
/// this DIE hasn't been added to a unit DIE.
const DIE *getUnitDie() const;
/// Climb up the parent chain to get the compile unit or type unit that this
/// DIE belongs to.
///
/// \returns the DIEUnit that represents the compile or type unit that owns
/// this DIE, or NULL if this DIE hasn't been added to a unit DIE.
DIEUnit *getUnit() const;
void setOffset(unsigned O) { Offset = O; }
void setSize(unsigned S) { Size = S; }
/// Add a child to the DIE.
DIE &addChild(DIE *Child) {
assert(!Child->getParent() && "Child should be orphaned");
Child->Owner = this;
Children.push_back(*Child);
return Children.back();
}
DIE &addChildFront(DIE *Child) {
assert(!Child->getParent() && "Child should be orphaned");
Child->Owner = this;
Children.push_front(*Child);
return Children.front();
}
/// Find a value in the DIE with the attribute given.
///
/// Returns a default-constructed DIEValue (where \a DIEValue::getType()
/// gives \a DIEValue::isNone) if no such attribute exists.
DIEValue findAttribute(dwarf::Attribute Attribute) const;
void print(raw_ostream &O, unsigned IndentCount = 0) const;
void dump() const;
};
//===--------------------------------------------------------------------===//
/// Represents a compile or type unit.
class DIEUnit {
/// The compile unit or type unit DIE. This variable must be an instance of
/// DIE so that we can calculate the DIEUnit from any DIE by traversing the
/// parent backchain and getting the Unit DIE, and then casting itself to a
/// DIEUnit. This allows us to be able to find the DIEUnit for any DIE without
/// having to store a pointer to the DIEUnit in each DIE instance.
DIE Die;
/// The section this unit will be emitted in. This may or may not be set to
/// a valid section depending on the client that is emitting DWARF.
MCSection *Section = nullptr;
uint64_t Offset = 0; /// .debug_info or .debug_types absolute section offset.
protected:
virtual ~DIEUnit() = default;
public:
explicit DIEUnit(dwarf::Tag UnitTag);
DIEUnit(const DIEUnit &RHS) = delete;
DIEUnit(DIEUnit &&RHS) = delete;
void operator=(const DIEUnit &RHS) = delete;
void operator=(const DIEUnit &&RHS) = delete;
/// Set the section that this DIEUnit will be emitted into.
///
/// This function is used by some clients to set the section. Not all clients
/// that emit DWARF use this section variable.
void setSection(MCSection *Section) {
assert(!this->Section);
this->Section = Section;
}
virtual const MCSymbol *getCrossSectionRelativeBaseAddress() const {
return nullptr;
}
/// Return the section that this DIEUnit will be emitted into.
///
/// \returns Section pointer which can be NULL.
MCSection *getSection() const { return Section; }
void setDebugSectionOffset(uint64_t O) { Offset = O; }
uint64_t getDebugSectionOffset() const { return Offset; }
DIE &getUnitDie() { return Die; }
const DIE &getUnitDie() const { return Die; }
};
struct BasicDIEUnit final : DIEUnit {
explicit BasicDIEUnit(dwarf::Tag UnitTag) : DIEUnit(UnitTag) {}
};
//===--------------------------------------------------------------------===//
/// DIELoc - Represents an expression location.
//
class DIELoc : public DIEValueList {
mutable unsigned Size = 0; // Size in bytes excluding size header.
public:
DIELoc() = default;
/// Calculate the size of the location expression.
unsigned computeSize(const dwarf::FormParams &FormParams) const;
// TODO: move setSize() and Size to DIEValueList.
void setSize(unsigned size) { Size = size; }
/// BestForm - Choose the best form for data.
///
dwarf::Form BestForm(unsigned DwarfVersion) const {
if (DwarfVersion > 3)
return dwarf::DW_FORM_exprloc;
// Pre-DWARF4 location expressions were blocks and not exprloc.
if ((unsigned char)Size == Size)
return dwarf::DW_FORM_block1;
if ((unsigned short)Size == Size)
return dwarf::DW_FORM_block2;
if ((unsigned int)Size == Size)
return dwarf::DW_FORM_block4;
return dwarf::DW_FORM_block;
}
void emitValue(const AsmPrinter *Asm, dwarf::Form Form) const;
unsigned sizeOf(const dwarf::FormParams &, dwarf::Form Form) const;
void print(raw_ostream &O) const;
};
//===--------------------------------------------------------------------===//
/// DIEBlock - Represents a block of values.
//
class DIEBlock : public DIEValueList {
mutable unsigned Size = 0; // Size in bytes excluding size header.
public:
DIEBlock() = default;
/// Calculate the size of the location expression.
unsigned computeSize(const dwarf::FormParams &FormParams) const;
// TODO: move setSize() and Size to DIEValueList.
void setSize(unsigned size) { Size = size; }
/// BestForm - Choose the best form for data.
///
dwarf::Form BestForm() const {
if ((unsigned char)Size == Size)
return dwarf::DW_FORM_block1;
if ((unsigned short)Size == Size)
return dwarf::DW_FORM_block2;
if ((unsigned int)Size == Size)
return dwarf::DW_FORM_block4;
return dwarf::DW_FORM_block;
}
void emitValue(const AsmPrinter *Asm, dwarf::Form Form) const;
unsigned sizeOf(const dwarf::FormParams &, dwarf::Form Form) const;
void print(raw_ostream &O) const;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_DIE_H
PK iwFZ�W � � % CodeGen/SelectionDAGAddressAnalysis.hnu �[��� //===- SelectionDAGAddressAnalysis.h - DAG Address Analysis -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_SELECTIONDAGADDRESSANALYSIS_H
#define LLVM_CODEGEN_SELECTIONDAGADDRESSANALYSIS_H
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include <cstdint>
namespace llvm {
class SelectionDAG;
/// Helper struct to parse and store a memory address as base + index + offset.
/// We ignore sign extensions when it is safe to do so.
/// The following two expressions are not equivalent. To differentiate we need
/// to store whether there was a sign extension involved in the index
/// computation.
/// (load (i64 add (i64 copyfromreg %c)
/// (i64 signextend (add (i8 load %index)
/// (i8 1))))
/// vs
///
/// (load (i64 add (i64 copyfromreg %c)
/// (i64 signextend (i32 add (i32 signextend (i8 load %index))
/// (i32 1)))))
class BaseIndexOffset {
private:
SDValue Base;
SDValue Index;
std::optional<int64_t> Offset;
bool IsIndexSignExt = false;
public:
BaseIndexOffset() = default;
BaseIndexOffset(SDValue Base, SDValue Index, bool IsIndexSignExt)
: Base(Base), Index(Index), IsIndexSignExt(IsIndexSignExt) {}
BaseIndexOffset(SDValue Base, SDValue Index, int64_t Offset,
bool IsIndexSignExt)
: Base(Base), Index(Index), Offset(Offset),
IsIndexSignExt(IsIndexSignExt) {}
SDValue getBase() { return Base; }
SDValue getBase() const { return Base; }
SDValue getIndex() { return Index; }
SDValue getIndex() const { return Index; }
void addToOffset(int64_t VectorOff) {
Offset = Offset.value_or(0) + VectorOff;
}
bool hasValidOffset() const { return Offset.has_value(); }
int64_t getOffset() const { return *Offset; }
// Returns true if `Other` and `*this` are both some offset from the same base
// pointer. In that case, `Off` is set to the offset between `*this` and
// `Other` (negative if `Other` is before `*this`).
bool equalBaseIndex(const BaseIndexOffset &Other, const SelectionDAG &DAG,
int64_t &Off) const;
bool equalBaseIndex(const BaseIndexOffset &Other,
const SelectionDAG &DAG) const {
int64_t Off;
return equalBaseIndex(Other, DAG, Off);
}
// Returns true if `Other` (with size `OtherSize`) can be proven to be fully
// contained in `*this` (with size `Size`).
bool contains(const SelectionDAG &DAG, int64_t BitSize,
const BaseIndexOffset &Other, int64_t OtherBitSize,
int64_t &BitOffset) const;
bool contains(const SelectionDAG &DAG, int64_t BitSize,
const BaseIndexOffset &Other, int64_t OtherBitSize) const {
int64_t BitOffset;
return contains(DAG, BitSize, Other, OtherBitSize, BitOffset);
}
// Returns true `Op0` and `Op1` can be proven to alias/not alias, in
// which case `IsAlias` is set to true/false.
static bool computeAliasing(const SDNode *Op0,
const std::optional<int64_t> NumBytes0,
const SDNode *Op1,
const std::optional<int64_t> NumBytes1,
const SelectionDAG &DAG, bool &IsAlias);
/// Parses tree in N for base, index, offset addresses.
static BaseIndexOffset match(const SDNode *N, const SelectionDAG &DAG);
void print(raw_ostream& OS) const;
void dump() const;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_SELECTIONDAGADDRESSANALYSIS_H
PK iwFZOBu|�N �N CodeGen/ValueTypes.hnu �[��� //===- CodeGen/ValueTypes.h - Low-Level Target independ. types --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the set of low-level target independent types which various
// values in the code generator are. This allows the target specific behavior
// of instructions to be described to target independent passes.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_VALUETYPES_H
#define LLVM_CODEGEN_VALUETYPES_H
#include "llvm/CodeGen/MachineValueType.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/TypeSize.h"
#include <cassert>
#include <cstdint>
#include <string>
namespace llvm {
class LLVMContext;
class Type;
/// Extended Value Type. Capable of holding value types which are not native
/// for any processor (such as the i12345 type), as well as the types an MVT
/// can represent.
struct EVT {
private:
MVT V = MVT::INVALID_SIMPLE_VALUE_TYPE;
Type *LLVMTy = nullptr;
public:
constexpr EVT() = default;
constexpr EVT(MVT::SimpleValueType SVT) : V(SVT) {}
constexpr EVT(MVT S) : V(S) {}
bool operator==(EVT VT) const {
return !(*this != VT);
}
bool operator!=(EVT VT) const {
if (V.SimpleTy != VT.V.SimpleTy)
return true;
if (V.SimpleTy == MVT::INVALID_SIMPLE_VALUE_TYPE)
return LLVMTy != VT.LLVMTy;
return false;
}
/// Returns the EVT that represents a floating-point type with the given
/// number of bits. There are two floating-point types with 128 bits - this
/// returns f128 rather than ppcf128.
static EVT getFloatingPointVT(unsigned BitWidth) {
return MVT::getFloatingPointVT(BitWidth);
}
/// Returns the EVT that represents an integer with the given number of
/// bits.
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth) {
MVT M = MVT::getIntegerVT(BitWidth);
if (M.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE)
return M;
return getExtendedIntegerVT(Context, BitWidth);
}
/// Returns the EVT that represents a vector NumElements in length, where
/// each element is of type VT.
static EVT getVectorVT(LLVMContext &Context, EVT VT, unsigned NumElements,
bool IsScalable = false) {
MVT M = MVT::getVectorVT(VT.V, NumElements, IsScalable);
if (M.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE)
return M;
return getExtendedVectorVT(Context, VT, NumElements, IsScalable);
}
/// Returns the EVT that represents a vector EC.Min elements in length,
/// where each element is of type VT.
static EVT getVectorVT(LLVMContext &Context, EVT VT, ElementCount EC) {
MVT M = MVT::getVectorVT(VT.V, EC);
if (M.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE)
return M;
return getExtendedVectorVT(Context, VT, EC);
}
/// Return a vector with the same number of elements as this vector, but
/// with the element type converted to an integer type with the same
/// bitwidth.
EVT changeVectorElementTypeToInteger() const {
if (isSimple())
return getSimpleVT().changeVectorElementTypeToInteger();
return changeExtendedVectorElementTypeToInteger();
}
/// Return a VT for a vector type whose attributes match ourselves
/// with the exception of the element type that is chosen by the caller.
EVT changeVectorElementType(EVT EltVT) const {
if (isSimple()) {
assert(EltVT.isSimple() &&
"Can't change simple vector VT to have extended element VT");
return getSimpleVT().changeVectorElementType(EltVT.getSimpleVT());
}
return changeExtendedVectorElementType(EltVT);
}
/// Return the type converted to an equivalently sized integer or vector
/// with integer element type. Similar to changeVectorElementTypeToInteger,
/// but also handles scalars.
EVT changeTypeToInteger() const {
if (isVector())
return changeVectorElementTypeToInteger();
if (isSimple())
return getSimpleVT().changeTypeToInteger();
return changeExtendedTypeToInteger();
}
/// Test if the given EVT has zero size, this will fail if called on a
/// scalable type
bool isZeroSized() const {
return getSizeInBits().isZero();
}
/// Test if the given EVT is simple (as opposed to being extended).
bool isSimple() const {
return V.SimpleTy != MVT::INVALID_SIMPLE_VALUE_TYPE;
}
/// Test if the given EVT is extended (as opposed to being simple).
bool isExtended() const {
return !isSimple();
}
/// Return true if this is a FP or a vector FP type.
bool isFloatingPoint() const {
return isSimple() ? V.isFloatingPoint() : isExtendedFloatingPoint();
}
/// Return true if this is an integer or a vector integer type.
bool isInteger() const {
return isSimple() ? V.isInteger() : isExtendedInteger();
}
/// Return true if this is an integer, but not a vector.
bool isScalarInteger() const {
return isSimple() ? V.isScalarInteger() : isExtendedScalarInteger();
}
/// Return true if this is a vector type where the runtime
/// length is machine dependent
bool isScalableTargetExtVT() const {
return isSimple() && V.isScalableTargetExtVT();
}
/// Return true if this is a vector value type.
bool isVector() const {
return isSimple() ? V.isVector() : isExtendedVector();
}
/// Return true if this is a vector type where the runtime
/// length is machine dependent
bool isScalableVector() const {
return isSimple() ? V.isScalableVector() : isExtendedScalableVector();
}
bool isFixedLengthVector() const {
return isSimple() ? V.isFixedLengthVector()
: isExtendedFixedLengthVector();
}
/// Return true if the type is a scalable type.
bool isScalableVT() const {
return isScalableVector() || isScalableTargetExtVT();
}
/// Return true if this is a 16-bit vector type.
bool is16BitVector() const {
return isSimple() ? V.is16BitVector() : isExtended16BitVector();
}
/// Return true if this is a 32-bit vector type.
bool is32BitVector() const {
return isSimple() ? V.is32BitVector() : isExtended32BitVector();
}
/// Return true if this is a 64-bit vector type.
bool is64BitVector() const {
return isSimple() ? V.is64BitVector() : isExtended64BitVector();
}
/// Return true if this is a 128-bit vector type.
bool is128BitVector() const {
return isSimple() ? V.is128BitVector() : isExtended128BitVector();
}
/// Return true if this is a 256-bit vector type.
bool is256BitVector() const {
return isSimple() ? V.is256BitVector() : isExtended256BitVector();
}
/// Return true if this is a 512-bit vector type.
bool is512BitVector() const {
return isSimple() ? V.is512BitVector() : isExtended512BitVector();
}
/// Return true if this is a 1024-bit vector type.
bool is1024BitVector() const {
return isSimple() ? V.is1024BitVector() : isExtended1024BitVector();
}
/// Return true if this is a 2048-bit vector type.
bool is2048BitVector() const {
return isSimple() ? V.is2048BitVector() : isExtended2048BitVector();
}
/// Return true if this is an overloaded type for TableGen.
bool isOverloaded() const {
return (V==MVT::iAny || V==MVT::fAny || V==MVT::vAny || V==MVT::iPTRAny);
}
/// Return true if the bit size is a multiple of 8.
bool isByteSized() const {
return !isZeroSized() && getSizeInBits().isKnownMultipleOf(8);
}
/// Return true if the size is a power-of-two number of bytes.
bool isRound() const {
if (isScalableVector())
return false;
unsigned BitSize = getSizeInBits();
return BitSize >= 8 && !(BitSize & (BitSize - 1));
}
/// Return true if this has the same number of bits as VT.
bool bitsEq(EVT VT) const {
if (EVT::operator==(VT)) return true;
return getSizeInBits() == VT.getSizeInBits();
}
/// Return true if we know at compile time this has more bits than VT.
bool knownBitsGT(EVT VT) const {
return TypeSize::isKnownGT(getSizeInBits(), VT.getSizeInBits());
}
/// Return true if we know at compile time this has more than or the same
/// bits as VT.
bool knownBitsGE(EVT VT) const {
return TypeSize::isKnownGE(getSizeInBits(), VT.getSizeInBits());
}
/// Return true if we know at compile time this has fewer bits than VT.
bool knownBitsLT(EVT VT) const {
return TypeSize::isKnownLT(getSizeInBits(), VT.getSizeInBits());
}
/// Return true if we know at compile time this has fewer than or the same
/// bits as VT.
bool knownBitsLE(EVT VT) const {
return TypeSize::isKnownLE(getSizeInBits(), VT.getSizeInBits());
}
/// Return true if this has more bits than VT.
bool bitsGT(EVT VT) const {
if (EVT::operator==(VT)) return false;
assert(isScalableVector() == VT.isScalableVector() &&
"Comparison between scalable and fixed types");
return knownBitsGT(VT);
}
/// Return true if this has no less bits than VT.
bool bitsGE(EVT VT) const {
if (EVT::operator==(VT)) return true;
assert(isScalableVector() == VT.isScalableVector() &&
"Comparison between scalable and fixed types");
return knownBitsGE(VT);
}
/// Return true if this has less bits than VT.
bool bitsLT(EVT VT) const {
if (EVT::operator==(VT)) return false;
assert(isScalableVector() == VT.isScalableVector() &&
"Comparison between scalable and fixed types");
return knownBitsLT(VT);
}
/// Return true if this has no more bits than VT.
bool bitsLE(EVT VT) const {
if (EVT::operator==(VT)) return true;
assert(isScalableVector() == VT.isScalableVector() &&
"Comparison between scalable and fixed types");
return knownBitsLE(VT);
}
/// Return the SimpleValueType held in the specified simple EVT.
MVT getSimpleVT() const {
assert(isSimple() && "Expected a SimpleValueType!");
return V;
}
/// If this is a vector type, return the element type, otherwise return
/// this.
EVT getScalarType() const {
return isVector() ? getVectorElementType() : *this;
}
/// Given a vector type, return the type of each element.
EVT getVectorElementType() const {
assert(isVector() && "Invalid vector type!");
if (isSimple())
return V.getVectorElementType();
return getExtendedVectorElementType();
}
/// Given a vector type, return the number of elements it contains.
unsigned getVectorNumElements() const {
assert(isVector() && "Invalid vector type!");
if (isScalableVector())
llvm::reportInvalidSizeRequest(
"Possible incorrect use of EVT::getVectorNumElements() for "
"scalable vector. Scalable flag may be dropped, use "
"EVT::getVectorElementCount() instead");
return isSimple() ? V.getVectorNumElements()
: getExtendedVectorNumElements();
}
// Given a (possibly scalable) vector type, return the ElementCount
ElementCount getVectorElementCount() const {
assert((isVector()) && "Invalid vector type!");
if (isSimple())
return V.getVectorElementCount();
return getExtendedVectorElementCount();
}
/// Given a vector type, return the minimum number of elements it contains.
unsigned getVectorMinNumElements() const {
return getVectorElementCount().getKnownMinValue();
}
/// Return the size of the specified value type in bits.
///
/// If the value type is a scalable vector type, the scalable property will
/// be set and the runtime size will be a positive integer multiple of the
/// base size.
TypeSize getSizeInBits() const {
if (isSimple())
return V.getSizeInBits();
return getExtendedSizeInBits();
}
/// Return the size of the specified fixed width value type in bits. The
/// function will assert if the type is scalable.
uint64_t getFixedSizeInBits() const {
return getSizeInBits().getFixedValue();
}
uint64_t getScalarSizeInBits() const {
return getScalarType().getSizeInBits().getFixedValue();
}
/// Return the number of bytes overwritten by a store of the specified value
/// type.
///
/// If the value type is a scalable vector type, the scalable property will
/// be set and the runtime size will be a positive integer multiple of the
/// base size.
TypeSize getStoreSize() const {
TypeSize BaseSize = getSizeInBits();
return {(BaseSize.getKnownMinValue() + 7) / 8, BaseSize.isScalable()};
}
// Return the number of bytes overwritten by a store of this value type or
// this value type's element type in the case of a vector.
uint64_t getScalarStoreSize() const {
return getScalarType().getStoreSize().getFixedValue();
}
/// Return the number of bits overwritten by a store of the specified value
/// type.
///
/// If the value type is a scalable vector type, the scalable property will
/// be set and the runtime size will be a positive integer multiple of the
/// base size.
TypeSize getStoreSizeInBits() const {
return getStoreSize() * 8;
}
/// Rounds the bit-width of the given integer EVT up to the nearest power of
/// two (and at least to eight), and returns the integer EVT with that
/// number of bits.
EVT getRoundIntegerType(LLVMContext &Context) const {
assert(isInteger() && !isVector() && "Invalid integer type!");
unsigned BitWidth = getSizeInBits();
if (BitWidth <= 8)
return EVT(MVT::i8);
return getIntegerVT(Context, llvm::bit_ceil(BitWidth));
}
/// Finds the smallest simple value type that is greater than or equal to
/// half the width of this EVT. If no simple value type can be found, an
/// extended integer value type of half the size (rounded up) is returned.
EVT getHalfSizedIntegerVT(LLVMContext &Context) const {
assert(isInteger() && !isVector() && "Invalid integer type!");
unsigned EVTSize = getSizeInBits();
for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE;
IntVT <= MVT::LAST_INTEGER_VALUETYPE; ++IntVT) {
EVT HalfVT = EVT((MVT::SimpleValueType)IntVT);
if (HalfVT.getSizeInBits() * 2 >= EVTSize)
return HalfVT;
}
return getIntegerVT(Context, (EVTSize + 1) / 2);
}
/// Return a VT for an integer vector type with the size of the
/// elements doubled. The typed returned may be an extended type.
EVT widenIntegerVectorElementType(LLVMContext &Context) const {
EVT EltVT = getVectorElementType();
EltVT = EVT::getIntegerVT(Context, 2 * EltVT.getSizeInBits());
return EVT::getVectorVT(Context, EltVT, getVectorElementCount());
}
// Return a VT for a vector type with the same element type but
// half the number of elements. The type returned may be an
// extended type.
EVT getHalfNumVectorElementsVT(LLVMContext &Context) const {
EVT EltVT = getVectorElementType();
auto EltCnt = getVectorElementCount();
assert(EltCnt.isKnownEven() && "Splitting vector, but not in half!");
return EVT::getVectorVT(Context, EltVT, EltCnt.divideCoefficientBy(2));
}
// Return a VT for a vector type with the same element type but
// double the number of elements. The type returned may be an
// extended type.
EVT getDoubleNumVectorElementsVT(LLVMContext &Context) const {
EVT EltVT = getVectorElementType();
auto EltCnt = getVectorElementCount();
return EVT::getVectorVT(Context, EltVT, EltCnt * 2);
}
/// Returns true if the given vector is a power of 2.
bool isPow2VectorType() const {
unsigned NElts = getVectorMinNumElements();
return !(NElts & (NElts - 1));
}
/// Widens the length of the given vector EVT up to the nearest power of 2
/// and returns that type.
EVT getPow2VectorType(LLVMContext &Context) const {
if (!isPow2VectorType()) {
ElementCount NElts = getVectorElementCount();
unsigned NewMinCount = 1 << Log2_32_Ceil(NElts.getKnownMinValue());
NElts = ElementCount::get(NewMinCount, NElts.isScalable());
return EVT::getVectorVT(Context, getVectorElementType(), NElts);
}
else {
return *this;
}
}
/// This function returns value type as a string, e.g. "i32".
std::string getEVTString() const;
/// Support for debugging, callable in GDB: VT.dump()
void dump() const;
/// Implement operator<<.
void print(raw_ostream &OS) const {
OS << getEVTString();
}
/// This method returns an LLVM type corresponding to the specified EVT.
/// For integer types, this returns an unsigned type. Note that this will
/// abort for types that cannot be represented.
Type *getTypeForEVT(LLVMContext &Context) const;
/// Return the value type corresponding to the specified type.
/// This returns all pointers as iPTR. If HandleUnknown is true, unknown
/// types are returned as Other, otherwise they are invalid.
static EVT getEVT(Type *Ty, bool HandleUnknown = false);
intptr_t getRawBits() const {
if (isSimple())
return V.SimpleTy;
else
return (intptr_t)(LLVMTy);
}
/// A meaningless but well-behaved order, useful for constructing
/// containers.
struct compareRawBits {
bool operator()(EVT L, EVT R) const {
if (L.V.SimpleTy == R.V.SimpleTy)
return L.LLVMTy < R.LLVMTy;
else
return L.V.SimpleTy < R.V.SimpleTy;
}
};
private:
// Methods for handling the Extended-type case in functions above.
// These are all out-of-line to prevent users of this header file
// from having a dependency on Type.h.
EVT changeExtendedTypeToInteger() const;
EVT changeExtendedVectorElementType(EVT EltVT) const;
EVT changeExtendedVectorElementTypeToInteger() const;
static EVT getExtendedIntegerVT(LLVMContext &C, unsigned BitWidth);
static EVT getExtendedVectorVT(LLVMContext &C, EVT VT, unsigned NumElements,
bool IsScalable);
static EVT getExtendedVectorVT(LLVMContext &Context, EVT VT,
ElementCount EC);
bool isExtendedFloatingPoint() const LLVM_READONLY;
bool isExtendedInteger() const LLVM_READONLY;
bool isExtendedScalarInteger() const LLVM_READONLY;
bool isExtendedVector() const LLVM_READONLY;
bool isExtended16BitVector() const LLVM_READONLY;
bool isExtended32BitVector() const LLVM_READONLY;
bool isExtended64BitVector() const LLVM_READONLY;
bool isExtended128BitVector() const LLVM_READONLY;
bool isExtended256BitVector() const LLVM_READONLY;
bool isExtended512BitVector() const LLVM_READONLY;
bool isExtended1024BitVector() const LLVM_READONLY;
bool isExtended2048BitVector() const LLVM_READONLY;
bool isExtendedFixedLengthVector() const LLVM_READONLY;
bool isExtendedScalableVector() const LLVM_READONLY;
EVT getExtendedVectorElementType() const;
unsigned getExtendedVectorNumElements() const LLVM_READONLY;
ElementCount getExtendedVectorElementCount() const LLVM_READONLY;
TypeSize getExtendedSizeInBits() const LLVM_READONLY;
};
inline raw_ostream &operator<<(raw_ostream &OS, const EVT &V) {
V.print(OS);
return OS;
}
} // end namespace llvm
#endif // LLVM_CODEGEN_VALUETYPES_H
PK iwFZ �Y Y CodeGen/DebugHandlerBase.hnu �[��� //===-- llvm/CodeGen/DebugHandlerBase.h -----------------------*- C++ -*--===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Common functionality for different debug information format backends.
// LLVM currently supports DWARF and CodeView.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_DEBUGHANDLERBASE_H
#define LLVM_CODEGEN_DEBUGHANDLERBASE_H
#include "llvm/CodeGen/AsmPrinterHandler.h"
#include "llvm/CodeGen/DbgEntityHistoryCalculator.h"
#include "llvm/CodeGen/LexicalScopes.h"
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/DebugLoc.h"
#include <optional>
namespace llvm {
class AsmPrinter;
class MachineInstr;
class MachineModuleInfo;
/// Represents the location at which a variable is stored.
struct DbgVariableLocation {
/// Base register.
unsigned Register;
/// Chain of offsetted loads necessary to load the value if it lives in
/// memory. Every load except for the last is pointer-sized.
SmallVector<int64_t, 1> LoadChain;
/// Present if the location is part of a larger variable.
std::optional<llvm::DIExpression::FragmentInfo> FragmentInfo;
/// Extract a VariableLocation from a MachineInstr.
/// This will only work if Instruction is a debug value instruction
/// and the associated DIExpression is in one of the supported forms.
/// If these requirements are not met, the returned Optional will not
/// have a value.
static std::optional<DbgVariableLocation>
extractFromMachineInstruction(const MachineInstr &Instruction);
};
/// Base class for debug information backends. Common functionality related to
/// tracking which variables and scopes are alive at a given PC live here.
class DebugHandlerBase : public AsmPrinterHandler {
protected:
DebugHandlerBase(AsmPrinter *A);
/// Target of debug info emission.
AsmPrinter *Asm = nullptr;
/// Collected machine module information.
MachineModuleInfo *MMI = nullptr;
/// Previous instruction's location information. This is used to
/// determine label location to indicate scope boundaries in debug info.
/// We track the previous instruction's source location (if not line 0),
/// whether it was a label, and its parent BB.
DebugLoc PrevInstLoc;
MCSymbol *PrevLabel = nullptr;
const MachineBasicBlock *PrevInstBB = nullptr;
/// This location indicates end of function prologue and beginning of
/// function body.
DebugLoc PrologEndLoc;
/// This block includes epilogue instructions.
const MachineBasicBlock *EpilogBeginBlock = nullptr;
/// If nonnull, stores the current machine instruction we're processing.
const MachineInstr *CurMI = nullptr;
LexicalScopes LScopes;
/// History of DBG_VALUE and clobber instructions for each user
/// variable. Variables are listed in order of appearance.
DbgValueHistoryMap DbgValues;
/// Mapping of inlined labels and DBG_LABEL machine instruction.
DbgLabelInstrMap DbgLabels;
/// Maps instruction with label emitted before instruction.
/// FIXME: Make this private from DwarfDebug, we have the necessary accessors
/// for it.
DenseMap<const MachineInstr *, MCSymbol *> LabelsBeforeInsn;
/// Maps instruction with label emitted after instruction.
DenseMap<const MachineInstr *, MCSymbol *> LabelsAfterInsn;
/// Indentify instructions that are marking the beginning of or
/// ending of a scope.
void identifyScopeMarkers();
/// Ensure that a label will be emitted before MI.
void requestLabelBeforeInsn(const MachineInstr *MI) {
LabelsBeforeInsn.insert(std::make_pair(MI, nullptr));
}
/// Ensure that a label will be emitted after MI.
void requestLabelAfterInsn(const MachineInstr *MI) {
LabelsAfterInsn.insert(std::make_pair(MI, nullptr));
}
virtual void beginFunctionImpl(const MachineFunction *MF) = 0;
virtual void endFunctionImpl(const MachineFunction *MF) = 0;
virtual void skippedNonDebugFunction() {}
private:
InstructionOrdering InstOrdering;
// AsmPrinterHandler overrides.
public:
void beginModule(Module *M) override;
void beginInstruction(const MachineInstr *MI) override;
void endInstruction() override;
void beginFunction(const MachineFunction *MF) override;
void endFunction(const MachineFunction *MF) override;
void beginBasicBlockSection(const MachineBasicBlock &MBB) override;
void endBasicBlockSection(const MachineBasicBlock &MBB) override;
/// Return Label preceding the instruction.
MCSymbol *getLabelBeforeInsn(const MachineInstr *MI);
/// Return Label immediately following the instruction.
MCSymbol *getLabelAfterInsn(const MachineInstr *MI);
/// If this type is derived from a base type then return base type size.
static uint64_t getBaseTypeSize(const DIType *Ty);
/// Return true if type encoding is unsigned.
static bool isUnsignedDIType(const DIType *Ty);
const InstructionOrdering &getInstOrdering() const { return InstOrdering; }
};
} // namespace llvm
#endif
PK iwFZ�l /# /# CodeGen/TargetCallingConv.hnu �[��� //===-- llvm/CodeGen/TargetCallingConv.h - Calling Convention ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines types for working with calling-convention information.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_TARGETCALLINGCONV_H
#define LLVM_CODEGEN_TARGETCALLINGCONV_H
#include "llvm/CodeGen/MachineValueType.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/Support/Alignment.h"
#include "llvm/Support/MathExtras.h"
#include <cassert>
#include <climits>
#include <cstdint>
namespace llvm {
namespace ISD {
struct ArgFlagsTy {
private:
unsigned IsZExt : 1; ///< Zero extended
unsigned IsSExt : 1; ///< Sign extended
unsigned IsInReg : 1; ///< Passed in register
unsigned IsSRet : 1; ///< Hidden struct-ret ptr
unsigned IsByVal : 1; ///< Struct passed by value
unsigned IsByRef : 1; ///< Passed in memory
unsigned IsNest : 1; ///< Nested fn static chain
unsigned IsReturned : 1; ///< Always returned
unsigned IsSplit : 1;
unsigned IsInAlloca : 1; ///< Passed with inalloca
unsigned IsPreallocated : 1; ///< ByVal without the copy
unsigned IsSplitEnd : 1; ///< Last part of a split
unsigned IsSwiftSelf : 1; ///< Swift self parameter
unsigned IsSwiftAsync : 1; ///< Swift async context parameter
unsigned IsSwiftError : 1; ///< Swift error parameter
unsigned IsCFGuardTarget : 1; ///< Control Flow Guard target
unsigned IsHva : 1; ///< HVA field for
unsigned IsHvaStart : 1; ///< HVA structure start
unsigned IsSecArgPass : 1; ///< Second argument
unsigned MemAlign : 4; ///< Log 2 of alignment when arg is passed in memory
///< (including byval/byref). The max alignment is
///< verified in IR verification.
unsigned OrigAlign : 5; ///< Log 2 of original alignment
unsigned IsInConsecutiveRegsLast : 1;
unsigned IsInConsecutiveRegs : 1;
unsigned IsCopyElisionCandidate : 1; ///< Argument copy elision candidate
unsigned IsPointer : 1;
unsigned ByValOrByRefSize = 0; ///< Byval or byref struct size
unsigned PointerAddrSpace = 0; ///< Address space of pointer argument
public:
ArgFlagsTy()
: IsZExt(0), IsSExt(0), IsInReg(0), IsSRet(0), IsByVal(0), IsByRef(0),
IsNest(0), IsReturned(0), IsSplit(0), IsInAlloca(0),
IsPreallocated(0), IsSplitEnd(0), IsSwiftSelf(0), IsSwiftAsync(0),
IsSwiftError(0), IsCFGuardTarget(0), IsHva(0), IsHvaStart(0),
IsSecArgPass(0), MemAlign(0), OrigAlign(0),
IsInConsecutiveRegsLast(0), IsInConsecutiveRegs(0),
IsCopyElisionCandidate(0), IsPointer(0) {
static_assert(sizeof(*this) == 3 * sizeof(unsigned), "flags are too big");
}
bool isZExt() const { return IsZExt; }
void setZExt() { IsZExt = 1; }
bool isSExt() const { return IsSExt; }
void setSExt() { IsSExt = 1; }
bool isInReg() const { return IsInReg; }
void setInReg() { IsInReg = 1; }
bool isSRet() const { return IsSRet; }
void setSRet() { IsSRet = 1; }
bool isByVal() const { return IsByVal; }
void setByVal() { IsByVal = 1; }
bool isByRef() const { return IsByRef; }
void setByRef() { IsByRef = 1; }
bool isInAlloca() const { return IsInAlloca; }
void setInAlloca() { IsInAlloca = 1; }
bool isPreallocated() const { return IsPreallocated; }
void setPreallocated() { IsPreallocated = 1; }
bool isSwiftSelf() const { return IsSwiftSelf; }
void setSwiftSelf() { IsSwiftSelf = 1; }
bool isSwiftAsync() const { return IsSwiftAsync; }
void setSwiftAsync() { IsSwiftAsync = 1; }
bool isSwiftError() const { return IsSwiftError; }
void setSwiftError() { IsSwiftError = 1; }
bool isCFGuardTarget() const { return IsCFGuardTarget; }
void setCFGuardTarget() { IsCFGuardTarget = 1; }
bool isHva() const { return IsHva; }
void setHva() { IsHva = 1; }
bool isHvaStart() const { return IsHvaStart; }
void setHvaStart() { IsHvaStart = 1; }
bool isSecArgPass() const { return IsSecArgPass; }
void setSecArgPass() { IsSecArgPass = 1; }
bool isNest() const { return IsNest; }
void setNest() { IsNest = 1; }
bool isReturned() const { return IsReturned; }
void setReturned(bool V = true) { IsReturned = V; }
bool isInConsecutiveRegs() const { return IsInConsecutiveRegs; }
void setInConsecutiveRegs(bool Flag = true) { IsInConsecutiveRegs = Flag; }
bool isInConsecutiveRegsLast() const { return IsInConsecutiveRegsLast; }
void setInConsecutiveRegsLast(bool Flag = true) {
IsInConsecutiveRegsLast = Flag;
}
bool isSplit() const { return IsSplit; }
void setSplit() { IsSplit = 1; }
bool isSplitEnd() const { return IsSplitEnd; }
void setSplitEnd() { IsSplitEnd = 1; }
bool isCopyElisionCandidate() const { return IsCopyElisionCandidate; }
void setCopyElisionCandidate() { IsCopyElisionCandidate = 1; }
bool isPointer() const { return IsPointer; }
void setPointer() { IsPointer = 1; }
Align getNonZeroMemAlign() const {
return decodeMaybeAlign(MemAlign).valueOrOne();
}
void setMemAlign(Align A) {
MemAlign = encode(A);
assert(getNonZeroMemAlign() == A && "bitfield overflow");
}
Align getNonZeroByValAlign() const {
assert(isByVal());
MaybeAlign A = decodeMaybeAlign(MemAlign);
assert(A && "ByValAlign must be defined");
return *A;
}
Align getNonZeroOrigAlign() const {
return decodeMaybeAlign(OrigAlign).valueOrOne();
}
void setOrigAlign(Align A) {
OrigAlign = encode(A);
assert(getNonZeroOrigAlign() == A && "bitfield overflow");
}
unsigned getByValSize() const {
assert(isByVal() && !isByRef());
return ByValOrByRefSize;
}
void setByValSize(unsigned S) {
assert(isByVal() && !isByRef());
ByValOrByRefSize = S;
}
unsigned getByRefSize() const {
assert(!isByVal() && isByRef());
return ByValOrByRefSize;
}
void setByRefSize(unsigned S) {
assert(!isByVal() && isByRef());
ByValOrByRefSize = S;
}
unsigned getPointerAddrSpace() const { return PointerAddrSpace; }
void setPointerAddrSpace(unsigned AS) { PointerAddrSpace = AS; }
};
/// InputArg - This struct carries flags and type information about a
/// single incoming (formal) argument or incoming (from the perspective
/// of the caller) return value virtual register.
///
struct InputArg {
ArgFlagsTy Flags;
MVT VT = MVT::Other;
EVT ArgVT;
bool Used = false;
/// Index original Function's argument.
unsigned OrigArgIndex;
/// Sentinel value for implicit machine-level input arguments.
static const unsigned NoArgIndex = UINT_MAX;
/// Offset in bytes of current input value relative to the beginning of
/// original argument. E.g. if argument was splitted into four 32 bit
/// registers, we got 4 InputArgs with PartOffsets 0, 4, 8 and 12.
unsigned PartOffset;
InputArg() = default;
InputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool used,
unsigned origIdx, unsigned partOffs)
: Flags(flags), Used(used), OrigArgIndex(origIdx), PartOffset(partOffs) {
VT = vt.getSimpleVT();
ArgVT = argvt;
}
bool isOrigArg() const {
return OrigArgIndex != NoArgIndex;
}
unsigned getOrigArgIndex() const {
assert(OrigArgIndex != NoArgIndex && "Implicit machine-level argument");
return OrigArgIndex;
}
};
/// OutputArg - This struct carries flags and a value for a
/// single outgoing (actual) argument or outgoing (from the perspective
/// of the caller) return value virtual register.
///
struct OutputArg {
ArgFlagsTy Flags;
MVT VT;
EVT ArgVT;
/// IsFixed - Is this a "fixed" value, ie not passed through a vararg "...".
bool IsFixed = false;
/// Index original Function's argument.
unsigned OrigArgIndex;
/// Offset in bytes of current output value relative to the beginning of
/// original argument. E.g. if argument was splitted into four 32 bit
/// registers, we got 4 OutputArgs with PartOffsets 0, 4, 8 and 12.
unsigned PartOffset;
OutputArg() = default;
OutputArg(ArgFlagsTy flags, MVT vt, EVT argvt, bool isfixed,
unsigned origIdx, unsigned partOffs)
: Flags(flags), IsFixed(isfixed), OrigArgIndex(origIdx),
PartOffset(partOffs) {
VT = vt;
ArgVT = argvt;
}
};
} // end namespace ISD
} // end namespace llvm
#endif // LLVM_CODEGEN_TARGETCALLINGCONV_H
PK iwFZo�� �z �z CodeGen/RegisterBankInfo.hnu �[��� //===- llvm/CodeGen/RegisterBankInfo.h --------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file This file declares the API for the register bank info.
/// This API is responsible for handling the register banks.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_REGISTERBANKINFO_H
#define LLVM_CODEGEN_REGISTERBANKINFO_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/Hashing.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/LowLevelType.h"
#include "llvm/CodeGen/Register.h"
#include "llvm/CodeGen/RegisterBank.h"
#include "llvm/Support/ErrorHandling.h"
#include <cassert>
#include <initializer_list>
#include <memory>
namespace llvm {
class MachineInstr;
class MachineRegisterInfo;
class raw_ostream;
class TargetInstrInfo;
class TargetRegisterClass;
class TargetRegisterInfo;
/// Holds all the information related to register banks.
class RegisterBankInfo {
public:
/// Helper struct that represents how a value is partially mapped
/// into a register.
/// The StartIdx and Length represent what region of the orginal
/// value this partial mapping covers.
/// This can be represented as a Mask of contiguous bit starting
/// at StartIdx bit and spanning Length bits.
/// StartIdx is the number of bits from the less significant bits.
struct PartialMapping {
/// Number of bits at which this partial mapping starts in the
/// original value. The bits are counted from less significant
/// bits to most significant bits.
unsigned StartIdx;
/// Length of this mapping in bits. This is how many bits this
/// partial mapping covers in the original value:
/// from StartIdx to StartIdx + Length -1.
unsigned Length;
/// Register bank where the partial value lives.
const RegisterBank *RegBank;
PartialMapping() = default;
/// Provide a shortcut for quickly building PartialMapping.
PartialMapping(unsigned StartIdx, unsigned Length,
const RegisterBank &RegBank)
: StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {}
/// \return the index of in the original value of the most
/// significant bit that this partial mapping covers.
unsigned getHighBitIdx() const { return StartIdx + Length - 1; }
/// Print this partial mapping on dbgs() stream.
void dump() const;
/// Print this partial mapping on \p OS;
void print(raw_ostream &OS) const;
/// Check that the Mask is compatible with the RegBank.
/// Indeed, if the RegBank cannot accomadate the "active bits" of the mask,
/// there is no way this mapping is valid.
///
/// \note This method does not check anything when assertions are disabled.
///
/// \return True is the check was successful.
bool verify(const RegisterBankInfo &RBI) const;
};
/// Helper struct that represents how a value is mapped through
/// different register banks.
///
/// \note: So far we do not have any users of the complex mappings
/// (mappings with more than one partial mapping), but when we do,
/// we would have needed to duplicate partial mappings.
/// The alternative could be to use an array of pointers of partial
/// mapping (i.e., PartialMapping **BreakDown) and duplicate the
/// pointers instead.
///
/// E.g.,
/// Let say we have a 32-bit add and a <2 x 32-bit> vadd. We
/// can expand the
/// <2 x 32-bit> add into 2 x 32-bit add.
///
/// Currently the TableGen-like file would look like:
/// \code
/// PartialMapping[] = {
/// /*32-bit add*/ {0, 32, GPR}, // Scalar entry repeated for first
/// // vec elt.
/// /*2x32-bit add*/ {0, 32, GPR}, {32, 32, GPR},
/// /*<2x32-bit> vadd*/ {0, 64, VPR}
/// }; // PartialMapping duplicated.
///
/// ValueMapping[] {
/// /*plain 32-bit add*/ {&PartialMapping[0], 1},
/// /*expanded vadd on 2xadd*/ {&PartialMapping[1], 2},
/// /*plain <2x32-bit> vadd*/ {&PartialMapping[3], 1}
/// };
/// \endcode
///
/// With the array of pointer, we would have:
/// \code
/// PartialMapping[] = {
/// /*32-bit add lower */ { 0, 32, GPR},
/// /*32-bit add upper */ {32, 32, GPR},
/// /*<2x32-bit> vadd */ { 0, 64, VPR}
/// }; // No more duplication.
///
/// BreakDowns[] = {
/// /*AddBreakDown*/ &PartialMapping[0],
/// /*2xAddBreakDown*/ &PartialMapping[0], &PartialMapping[1],
/// /*VAddBreakDown*/ &PartialMapping[2]
/// }; // Addresses of PartialMapping duplicated (smaller).
///
/// ValueMapping[] {
/// /*plain 32-bit add*/ {&BreakDowns[0], 1},
/// /*expanded vadd on 2xadd*/ {&BreakDowns[1], 2},
/// /*plain <2x32-bit> vadd*/ {&BreakDowns[3], 1}
/// };
/// \endcode
///
/// Given that a PartialMapping is actually small, the code size
/// impact is actually a degradation. Moreover the compile time will
/// be hit by the additional indirection.
/// If PartialMapping gets bigger we may reconsider.
struct ValueMapping {
/// How the value is broken down between the different register banks.
const PartialMapping *BreakDown;
/// Number of partial mapping to break down this value.
unsigned NumBreakDowns;
/// The default constructor creates an invalid (isValid() == false)
/// instance.
ValueMapping() : ValueMapping(nullptr, 0) {}
/// Initialize a ValueMapping with the given parameter.
/// \p BreakDown needs to have a life time at least as long
/// as this instance.
ValueMapping(const PartialMapping *BreakDown, unsigned NumBreakDowns)
: BreakDown(BreakDown), NumBreakDowns(NumBreakDowns) {}
/// Iterators through the PartialMappings.
const PartialMapping *begin() const { return BreakDown; }
const PartialMapping *end() const { return BreakDown + NumBreakDowns; }
/// \return true if all partial mappings are the same size and register
/// bank.
bool partsAllUniform() const;
/// Check if this ValueMapping is valid.
bool isValid() const { return BreakDown && NumBreakDowns; }
/// Verify that this mapping makes sense for a value of
/// \p MeaningfulBitWidth.
/// \note This method does not check anything when assertions are disabled.
///
/// \return True is the check was successful.
bool verify(const RegisterBankInfo &RBI, unsigned MeaningfulBitWidth) const;
/// Print this on dbgs() stream.
void dump() const;
/// Print this on \p OS;
void print(raw_ostream &OS) const;
};
/// Helper class that represents how the value of an instruction may be
/// mapped and what is the related cost of such mapping.
class InstructionMapping {
/// Identifier of the mapping.
/// This is used to communicate between the target and the optimizers
/// which mapping should be realized.
unsigned ID = InvalidMappingID;
/// Cost of this mapping.
unsigned Cost = 0;
/// Mapping of all the operands.
const ValueMapping *OperandsMapping = nullptr;
/// Number of operands.
unsigned NumOperands = 0;
const ValueMapping &getOperandMapping(unsigned i) {
assert(i < getNumOperands() && "Out of bound operand");
return OperandsMapping[i];
}
public:
/// Constructor for the mapping of an instruction.
/// \p NumOperands must be equal to number of all the operands of
/// the related instruction.
/// The rationale is that it is more efficient for the optimizers
/// to be able to assume that the mapping of the ith operand is
/// at the index i.
InstructionMapping(unsigned ID, unsigned Cost,
const ValueMapping *OperandsMapping,
unsigned NumOperands)
: ID(ID), Cost(Cost), OperandsMapping(OperandsMapping),
NumOperands(NumOperands) {}
/// Default constructor.
/// Use this constructor to express that the mapping is invalid.
InstructionMapping() = default;
/// Get the cost.
unsigned getCost() const { return Cost; }
/// Get the ID.
unsigned getID() const { return ID; }
/// Get the number of operands.
unsigned getNumOperands() const { return NumOperands; }
/// Get the value mapping of the ith operand.
/// \pre The mapping for the ith operand has been set.
/// \pre The ith operand is a register.
const ValueMapping &getOperandMapping(unsigned i) const {
const ValueMapping &ValMapping =
const_cast<InstructionMapping *>(this)->getOperandMapping(i);
return ValMapping;
}
/// Set the mapping for all the operands.
/// In other words, OpdsMapping should hold at least getNumOperands
/// ValueMapping.
void setOperandsMapping(const ValueMapping *OpdsMapping) {
OperandsMapping = OpdsMapping;
}
/// Check whether this object is valid.
/// This is a lightweight check for obvious wrong instance.
bool isValid() const {
return getID() != InvalidMappingID && OperandsMapping;
}
/// Verifiy that this mapping makes sense for \p MI.
/// \pre \p MI must be connected to a MachineFunction.
///
/// \note This method does not check anything when assertions are disabled.
///
/// \return True is the check was successful.
bool verify(const MachineInstr &MI) const;
/// Print this on dbgs() stream.
void dump() const;
/// Print this on \p OS;
void print(raw_ostream &OS) const;
};
/// Convenient type to represent the alternatives for mapping an
/// instruction.
/// \todo When we move to TableGen this should be an array ref.
using InstructionMappings = SmallVector<const InstructionMapping *, 4>;
/// Helper class used to get/create the virtual registers that will be used
/// to replace the MachineOperand when applying a mapping.
class OperandsMapper {
/// The OpIdx-th cell contains the index in NewVRegs where the VRegs of the
/// OpIdx-th operand starts. -1 means we do not have such mapping yet.
/// Note: We use a SmallVector to avoid heap allocation for most cases.
SmallVector<int, 8> OpToNewVRegIdx;
/// Hold the registers that will be used to map MI with InstrMapping.
SmallVector<Register, 8> NewVRegs;
/// Current MachineRegisterInfo, used to create new virtual registers.
MachineRegisterInfo &MRI;
/// Instruction being remapped.
MachineInstr &MI;
/// New mapping of the instruction.
const InstructionMapping &InstrMapping;
/// Constant value identifying that the index in OpToNewVRegIdx
/// for an operand has not been set yet.
static const int DontKnowIdx;
/// Get the range in NewVRegs to store all the partial
/// values for the \p OpIdx-th operand.
///
/// \return The iterator range for the space created.
//
/// \pre getMI().getOperand(OpIdx).isReg()
iterator_range<SmallVectorImpl<Register>::iterator>
getVRegsMem(unsigned OpIdx);
/// Get the end iterator for a range starting at \p StartIdx and
/// spannig \p NumVal in NewVRegs.
/// \pre StartIdx + NumVal <= NewVRegs.size()
SmallVectorImpl<Register>::const_iterator
getNewVRegsEnd(unsigned StartIdx, unsigned NumVal) const;
SmallVectorImpl<Register>::iterator getNewVRegsEnd(unsigned StartIdx,
unsigned NumVal);
public:
/// Create an OperandsMapper that will hold the information to apply \p
/// InstrMapping to \p MI.
/// \pre InstrMapping.verify(MI)
OperandsMapper(MachineInstr &MI, const InstructionMapping &InstrMapping,
MachineRegisterInfo &MRI);
/// \name Getters.
/// @{
/// The MachineInstr being remapped.
MachineInstr &getMI() const { return MI; }
/// The final mapping of the instruction.
const InstructionMapping &getInstrMapping() const { return InstrMapping; }
/// The MachineRegisterInfo we used to realize the mapping.
MachineRegisterInfo &getMRI() const { return MRI; }
/// @}
/// Create as many new virtual registers as needed for the mapping of the \p
/// OpIdx-th operand.
/// The number of registers is determined by the number of breakdown for the
/// related operand in the instruction mapping.
/// The type of the new registers is a plain scalar of the right size.
/// The proper type is expected to be set when the mapping is applied to
/// the instruction(s) that realizes the mapping.
///
/// \pre getMI().getOperand(OpIdx).isReg()
///
/// \post All the partial mapping of the \p OpIdx-th operand have been
/// assigned a new virtual register.
void createVRegs(unsigned OpIdx);
/// Set the virtual register of the \p PartialMapIdx-th partial mapping of
/// the OpIdx-th operand to \p NewVReg.
///
/// \pre getMI().getOperand(OpIdx).isReg()
/// \pre getInstrMapping().getOperandMapping(OpIdx).BreakDown.size() >
/// PartialMapIdx
/// \pre NewReg != 0
///
/// \post the \p PartialMapIdx-th register of the value mapping of the \p
/// OpIdx-th operand has been set.
void setVRegs(unsigned OpIdx, unsigned PartialMapIdx, Register NewVReg);
/// Get all the virtual registers required to map the \p OpIdx-th operand of
/// the instruction.
///
/// This return an empty range when createVRegs or setVRegs has not been
/// called.
/// The iterator may be invalidated by a call to setVRegs or createVRegs.
///
/// When \p ForDebug is true, we will not check that the list of new virtual
/// registers does not contain uninitialized values.
///
/// \pre getMI().getOperand(OpIdx).isReg()
/// \pre ForDebug || All partial mappings have been set a register
iterator_range<SmallVectorImpl<Register>::const_iterator>
getVRegs(unsigned OpIdx, bool ForDebug = false) const;
/// Print this operands mapper on dbgs() stream.
void dump() const;
/// Print this operands mapper on \p OS stream.
void print(raw_ostream &OS, bool ForDebug = false) const;
};
protected:
/// Hold the set of supported register banks.
const RegisterBank **RegBanks;
/// Total number of register banks.
unsigned NumRegBanks;
/// Hold the sizes of the register banks for all HwModes.
const unsigned *Sizes;
/// Current HwMode for the target.
unsigned HwMode;
/// Keep dynamically allocated PartialMapping in a separate map.
/// This shouldn't be needed when everything gets TableGen'ed.
mutable DenseMap<unsigned, std::unique_ptr<const PartialMapping>>
MapOfPartialMappings;
/// Keep dynamically allocated ValueMapping in a separate map.
/// This shouldn't be needed when everything gets TableGen'ed.
mutable DenseMap<unsigned, std::unique_ptr<const ValueMapping>>
MapOfValueMappings;
/// Keep dynamically allocated array of ValueMapping in a separate map.
/// This shouldn't be needed when everything gets TableGen'ed.
mutable DenseMap<unsigned, std::unique_ptr<ValueMapping[]>>
MapOfOperandsMappings;
/// Keep dynamically allocated InstructionMapping in a separate map.
/// This shouldn't be needed when everything gets TableGen'ed.
mutable DenseMap<unsigned, std::unique_ptr<const InstructionMapping>>
MapOfInstructionMappings;
/// Getting the minimal register class of a physreg is expensive.
/// Cache this information as we get it.
mutable DenseMap<unsigned, const TargetRegisterClass *> PhysRegMinimalRCs;
/// Create a RegisterBankInfo that can accommodate up to \p NumRegBanks
/// RegisterBank instances.
RegisterBankInfo(const RegisterBank **RegBanks, unsigned NumRegBanks,
const unsigned *Sizes, unsigned HwMode);
/// This constructor is meaningless.
/// It just provides a default constructor that can be used at link time
/// when GlobalISel is not built.
/// That way, targets can still inherit from this class without doing
/// crazy gymnastic to avoid link time failures.
/// \note That works because the constructor is inlined.
RegisterBankInfo() {
llvm_unreachable("This constructor should not be executed");
}
/// Get the register bank identified by \p ID.
const RegisterBank &getRegBank(unsigned ID) {
assert(ID < getNumRegBanks() && "Accessing an unknown register bank");
return *RegBanks[ID];
}
/// Get the MinimalPhysRegClass for Reg.
/// \pre Reg is a physical register.
const TargetRegisterClass *
getMinimalPhysRegClass(Register Reg, const TargetRegisterInfo &TRI) const;
/// Try to get the mapping of \p MI.
/// See getInstrMapping for more details on what a mapping represents.
///
/// Unlike getInstrMapping the returned InstructionMapping may be invalid
/// (isValid() == false).
/// This means that the target independent code is not smart enough
/// to get the mapping of \p MI and thus, the target has to provide the
/// information for \p MI.
///
/// This implementation is able to get the mapping of:
/// - Target specific instructions by looking at the encoding constraints.
/// - Any instruction if all the register operands have already been assigned
/// a register, a register class, or a register bank.
/// - Copies and phis if at least one of the operands has been assigned a
/// register, a register class, or a register bank.
/// In other words, this method will likely fail to find a mapping for
/// any generic opcode that has not been lowered by target specific code.
const InstructionMapping &getInstrMappingImpl(const MachineInstr &MI) const;
/// Get the uniquely generated PartialMapping for the
/// given arguments.
const PartialMapping &getPartialMapping(unsigned StartIdx, unsigned Length,
const RegisterBank &RegBank) const;
/// \name Methods to get a uniquely generated ValueMapping.
/// @{
/// The most common ValueMapping consists of a single PartialMapping.
/// Feature a method for that.
const ValueMapping &getValueMapping(unsigned StartIdx, unsigned Length,
const RegisterBank &RegBank) const;
/// Get the ValueMapping for the given arguments.
const ValueMapping &getValueMapping(const PartialMapping *BreakDown,
unsigned NumBreakDowns) const;
/// @}
/// \name Methods to get a uniquely generated array of ValueMapping.
/// @{
/// Get the uniquely generated array of ValueMapping for the
/// elements of between \p Begin and \p End.
///
/// Elements that are nullptr will be replaced by
/// invalid ValueMapping (ValueMapping::isValid == false).
///
/// \pre The pointers on ValueMapping between \p Begin and \p End
/// must uniquely identify a ValueMapping. Otherwise, there is no
/// guarantee that the return instance will be unique, i.e., another
/// OperandsMapping could have the same content.
template <typename Iterator>
const ValueMapping *getOperandsMapping(Iterator Begin, Iterator End) const;
/// Get the uniquely generated array of ValueMapping for the
/// elements of \p OpdsMapping.
///
/// Elements of \p OpdsMapping that are nullptr will be replaced by
/// invalid ValueMapping (ValueMapping::isValid == false).
const ValueMapping *getOperandsMapping(
const SmallVectorImpl<const ValueMapping *> &OpdsMapping) const;
/// Get the uniquely generated array of ValueMapping for the
/// given arguments.
///
/// Arguments that are nullptr will be replaced by invalid
/// ValueMapping (ValueMapping::isValid == false).
const ValueMapping *getOperandsMapping(
std::initializer_list<const ValueMapping *> OpdsMapping) const;
/// @}
/// \name Methods to get a uniquely generated InstructionMapping.
/// @{
private:
/// Method to get a uniquely generated InstructionMapping.
const InstructionMapping &
getInstructionMappingImpl(bool IsInvalid, unsigned ID = InvalidMappingID,
unsigned Cost = 0,
const ValueMapping *OperandsMapping = nullptr,
unsigned NumOperands = 0) const;
public:
/// Method to get a uniquely generated InstructionMapping.
const InstructionMapping &
getInstructionMapping(unsigned ID, unsigned Cost,
const ValueMapping *OperandsMapping,
unsigned NumOperands) const {
return getInstructionMappingImpl(/*IsInvalid*/ false, ID, Cost,
OperandsMapping, NumOperands);
}
/// Method to get a uniquely generated invalid InstructionMapping.
const InstructionMapping &getInvalidInstructionMapping() const {
return getInstructionMappingImpl(/*IsInvalid*/ true);
}
/// @}
/// Get the register bank for the \p OpIdx-th operand of \p MI form
/// the encoding constraints, if any.
///
/// \return A register bank that covers the register class of the
/// related encoding constraints or nullptr if \p MI did not provide
/// enough information to deduce it.
const RegisterBank *
getRegBankFromConstraints(const MachineInstr &MI, unsigned OpIdx,
const TargetInstrInfo &TII,
const MachineRegisterInfo &MRI) const;
/// Helper method to apply something that is like the default mapping.
/// Basically, that means that \p OpdMapper.getMI() is left untouched
/// aside from the reassignment of the register operand that have been
/// remapped.
///
/// The type of all the new registers that have been created by the
/// mapper are properly remapped to the type of the original registers
/// they replace. In other words, the semantic of the instruction does
/// not change, only the register banks.
///
/// If the mapping of one of the operand spans several registers, this
/// method will abort as this is not like a default mapping anymore.
///
/// \pre For OpIdx in {0..\p OpdMapper.getMI().getNumOperands())
/// the range OpdMapper.getVRegs(OpIdx) is empty or of size 1.
static void applyDefaultMapping(const OperandsMapper &OpdMapper);
/// See ::applyMapping.
virtual void applyMappingImpl(const OperandsMapper &OpdMapper) const {
llvm_unreachable("The target has to implement that part");
}
public:
virtual ~RegisterBankInfo() = default;
/// Get the register bank identified by \p ID.
const RegisterBank &getRegBank(unsigned ID) const {
return const_cast<RegisterBankInfo *>(this)->getRegBank(ID);
}
/// Get the maximum size in bits that fits in the given register bank.
unsigned getMaximumSize(unsigned RegBankID) const {
return Sizes[RegBankID + HwMode * NumRegBanks];
}
/// Get the register bank of \p Reg.
/// If Reg has not been assigned a register, a register class,
/// or a register bank, then this returns nullptr.
///
/// \pre Reg != 0 (NoRegister)
const RegisterBank *getRegBank(Register Reg, const MachineRegisterInfo &MRI,
const TargetRegisterInfo &TRI) const;
/// Get the total number of register banks.
unsigned getNumRegBanks() const { return NumRegBanks; }
/// Returns true if the register bank is considered divergent.
virtual bool isDivergentRegBank(const RegisterBank *RB) const {
return false;
}
/// Get a register bank that covers \p RC.
///
/// \pre \p RC is a user-defined register class (as opposed as one
/// generated by TableGen).
///
/// \note The mapping RC -> RegBank could be built while adding the
/// coverage for the register banks. However, we do not do it, because,
/// at least for now, we only need this information for register classes
/// that are used in the description of instruction. In other words,
/// there are just a handful of them and we do not want to waste space.
///
/// \todo This should be TableGen'ed.
virtual const RegisterBank &
getRegBankFromRegClass(const TargetRegisterClass &RC, LLT Ty) const {
llvm_unreachable("The target must override this method");
}
/// Get the cost of a copy from \p B to \p A, or put differently,
/// get the cost of A = COPY B. Since register banks may cover
/// different size, \p Size specifies what will be the size in bits
/// that will be copied around.
///
/// \note Since this is a copy, both registers have the same size.
virtual unsigned copyCost(const RegisterBank &A, const RegisterBank &B,
unsigned Size) const {
// Optimistically assume that copies are coalesced. I.e., when
// they are on the same bank, they are free.
// Otherwise assume a non-zero cost of 1. The targets are supposed
// to override that properly anyway if they care.
return &A != &B;
}
/// \returns true if emitting a copy from \p Src to \p Dst is impossible.
bool cannotCopy(const RegisterBank &Dst, const RegisterBank &Src,
unsigned Size) const {
return copyCost(Dst, Src, Size) == std::numeric_limits<unsigned>::max();
}
/// Get the cost of using \p ValMapping to decompose a register. This is
/// similar to ::copyCost, except for cases where multiple copy-like
/// operations need to be inserted. If the register is used as a source
/// operand and already has a bank assigned, \p CurBank is non-null.
virtual unsigned
getBreakDownCost(const ValueMapping &ValMapping,
const RegisterBank *CurBank = nullptr) const {
return std::numeric_limits<unsigned>::max();
}
/// Constrain the (possibly generic) virtual register \p Reg to \p RC.
///
/// \pre \p Reg is a virtual register that either has a bank or a class.
/// \returns The constrained register class, or nullptr if there is none.
/// \note This is a generic variant of MachineRegisterInfo::constrainRegClass
/// \note Use MachineRegisterInfo::constrainRegAttrs instead for any non-isel
/// purpose, including non-select passes of GlobalISel
static const TargetRegisterClass *
constrainGenericRegister(Register Reg, const TargetRegisterClass &RC,
MachineRegisterInfo &MRI);
/// Identifier used when the related instruction mapping instance
/// is generated by target independent code.
/// Make sure not to use that identifier to avoid possible collision.
static const unsigned DefaultMappingID;
/// Identifier used when the related instruction mapping instance
/// is generated by the default constructor.
/// Make sure not to use that identifier.
static const unsigned InvalidMappingID;
/// Get the mapping of the different operands of \p MI
/// on the register bank.
/// This mapping should be the direct translation of \p MI.
/// In other words, when \p MI is mapped with the returned mapping,
/// only the register banks of the operands of \p MI need to be updated.
/// In particular, neither the opcode nor the type of \p MI needs to be
/// updated for this direct mapping.
///
/// The target independent implementation gives a mapping based on
/// the register classes for the target specific opcode.
/// It uses the ID RegisterBankInfo::DefaultMappingID for that mapping.
/// Make sure you do not use that ID for the alternative mapping
/// for MI. See getInstrAlternativeMappings for the alternative
/// mappings.
///
/// For instance, if \p MI is a vector add, the mapping should
/// not be a scalarization of the add.
///
/// \post returnedVal.verify(MI).
///
/// \note If returnedVal does not verify MI, this would probably mean
/// that the target does not support that instruction.
virtual const InstructionMapping &
getInstrMapping(const MachineInstr &MI) const;
/// Get the alternative mappings for \p MI.
/// Alternative in the sense different from getInstrMapping.
virtual InstructionMappings
getInstrAlternativeMappings(const MachineInstr &MI) const;
/// Get the possible mapping for \p MI.
/// A mapping defines where the different operands may live and at what cost.
/// For instance, let us consider:
/// v0(16) = G_ADD <2 x i8> v1, v2
/// The possible mapping could be:
///
/// {/*ID*/VectorAdd, /*Cost*/1, /*v0*/{(0xFFFF, VPR)}, /*v1*/{(0xFFFF, VPR)},
/// /*v2*/{(0xFFFF, VPR)}}
/// {/*ID*/ScalarAddx2, /*Cost*/2, /*v0*/{(0x00FF, GPR),(0xFF00, GPR)},
/// /*v1*/{(0x00FF, GPR),(0xFF00, GPR)},
/// /*v2*/{(0x00FF, GPR),(0xFF00, GPR)}}
///
/// \note The first alternative of the returned mapping should be the
/// direct translation of \p MI current form.
///
/// \post !returnedVal.empty().
InstructionMappings getInstrPossibleMappings(const MachineInstr &MI) const;
/// Apply \p OpdMapper.getInstrMapping() to \p OpdMapper.getMI().
/// After this call \p OpdMapper.getMI() may not be valid anymore.
/// \p OpdMapper.getInstrMapping().getID() carries the information of
/// what has been chosen to map \p OpdMapper.getMI(). This ID is set
/// by the various getInstrXXXMapping method.
///
/// Therefore, getting the mapping and applying it should be kept in
/// sync.
void applyMapping(const OperandsMapper &OpdMapper) const {
// The only mapping we know how to handle is the default mapping.
if (OpdMapper.getInstrMapping().getID() == DefaultMappingID)
return applyDefaultMapping(OpdMapper);
// For other mapping, the target needs to do the right thing.
// If that means calling applyDefaultMapping, fine, but this
// must be explicitly stated.
applyMappingImpl(OpdMapper);
}
/// Get the size in bits of \p Reg.
/// Utility method to get the size of any registers. Unlike
/// MachineRegisterInfo::getSize, the register does not need to be a
/// virtual register.
///
/// \pre \p Reg != 0 (NoRegister).
unsigned getSizeInBits(Register Reg, const MachineRegisterInfo &MRI,
const TargetRegisterInfo &TRI) const;
/// Check that information hold by this instance make sense for the
/// given \p TRI.
///
/// \note This method does not check anything when assertions are disabled.
///
/// \return True is the check was successful.
bool verify(const TargetRegisterInfo &TRI) const;
};
inline raw_ostream &
operator<<(raw_ostream &OS,
const RegisterBankInfo::PartialMapping &PartMapping) {
PartMapping.print(OS);
return OS;
}
inline raw_ostream &
operator<<(raw_ostream &OS, const RegisterBankInfo::ValueMapping &ValMapping) {
ValMapping.print(OS);
return OS;
}
inline raw_ostream &
operator<<(raw_ostream &OS,
const RegisterBankInfo::InstructionMapping &InstrMapping) {
InstrMapping.print(OS);
return OS;
}
inline raw_ostream &
operator<<(raw_ostream &OS, const RegisterBankInfo::OperandsMapper &OpdMapper) {
OpdMapper.print(OS, /*ForDebug*/ false);
return OS;
}
/// Hashing function for PartialMapping.
/// It is required for the hashing of ValueMapping.
hash_code hash_value(const RegisterBankInfo::PartialMapping &PartMapping);
} // end namespace llvm
#endif // LLVM_CODEGEN_REGISTERBANKINFO_H
PK iwFZO_�C� � CodeGen/MachineLoopInfo.hnu �[��� //===- llvm/CodeGen/MachineLoopInfo.h - Natural Loop Calculator -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the MachineLoopInfo class that is used to identify natural
// loops and determine the loop depth of various nodes of the CFG. Note that
// natural loops may actually be several loops that share the same header node.
//
// This analysis calculates the nesting structure of loops in a function. For
// each natural loop identified, this analysis identifies natural loops
// contained entirely within the loop and the basic blocks the make up the loop.
//
// It can calculate on the fly various bits of information, for example:
//
// * whether there is a preheader for the loop
// * the number of back edges to the header
// * whether or not a particular block branches out of the loop
// * the successor blocks of the loop
// * the loop depth
// * the trip count
// * etc...
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINELOOPINFO_H
#define LLVM_CODEGEN_MACHINELOOPINFO_H
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/Support/GenericLoopInfo.h"
namespace llvm {
class MachineDominatorTree;
// Implementation in LoopInfoImpl.h
class MachineLoop;
extern template class LoopBase<MachineBasicBlock, MachineLoop>;
class MachineLoop : public LoopBase<MachineBasicBlock, MachineLoop> {
public:
/// Return the "top" block in the loop, which is the first block in the linear
/// layout, ignoring any parts of the loop not contiguous with the part that
/// contains the header.
MachineBasicBlock *getTopBlock();
/// Return the "bottom" block in the loop, which is the last block in the
/// linear layout, ignoring any parts of the loop not contiguous with the part
/// that contains the header.
MachineBasicBlock *getBottomBlock();
/// Find the block that contains the loop control variable and the
/// loop test. This will return the latch block if it's one of the exiting
/// blocks. Otherwise, return the exiting block. Return 'null' when
/// multiple exiting blocks are present.
MachineBasicBlock *findLoopControlBlock();
/// Return the debug location of the start of this loop.
/// This looks for a BB terminating instruction with a known debug
/// location by looking at the preheader and header blocks. If it
/// cannot find a terminating instruction with location information,
/// it returns an unknown location.
DebugLoc getStartLoc() const;
/// Returns true if the instruction is loop invariant.
/// I.e., all virtual register operands are defined outside of the loop,
/// physical registers aren't accessed explicitly, and there are no side
/// effects that aren't captured by the operands or other flags.
bool isLoopInvariant(MachineInstr &I) const;
void dump() const;
private:
friend class LoopInfoBase<MachineBasicBlock, MachineLoop>;
explicit MachineLoop(MachineBasicBlock *MBB)
: LoopBase<MachineBasicBlock, MachineLoop>(MBB) {}
MachineLoop() = default;
};
// Implementation in LoopInfoImpl.h
extern template class LoopInfoBase<MachineBasicBlock, MachineLoop>;
class MachineLoopInfo : public MachineFunctionPass {
friend class LoopBase<MachineBasicBlock, MachineLoop>;
LoopInfoBase<MachineBasicBlock, MachineLoop> LI;
public:
static char ID; // Pass identification, replacement for typeid
MachineLoopInfo();
explicit MachineLoopInfo(MachineDominatorTree &MDT)
: MachineFunctionPass(ID) {
calculate(MDT);
}
MachineLoopInfo(const MachineLoopInfo &) = delete;
MachineLoopInfo &operator=(const MachineLoopInfo &) = delete;
LoopInfoBase<MachineBasicBlock, MachineLoop>& getBase() { return LI; }
/// Find the block that either is the loop preheader, or could
/// speculatively be used as the preheader. This is e.g. useful to place
/// loop setup code. Code that cannot be speculated should not be placed
/// here. SpeculativePreheader is controlling whether it also tries to
/// find the speculative preheader if the regular preheader is not present.
/// With FindMultiLoopPreheader = false, nullptr will be returned if the found
/// preheader is the preheader of multiple loops.
MachineBasicBlock *
findLoopPreheader(MachineLoop *L, bool SpeculativePreheader = false,
bool FindMultiLoopPreheader = false) const;
/// The iterator interface to the top-level loops in the current function.
using iterator = LoopInfoBase<MachineBasicBlock, MachineLoop>::iterator;
inline iterator begin() const { return LI.begin(); }
inline iterator end() const { return LI.end(); }
bool empty() const { return LI.empty(); }
/// Return the innermost loop that BB lives in. If a basic block is in no loop
/// (for example the entry node), null is returned.
inline MachineLoop *getLoopFor(const MachineBasicBlock *BB) const {
return LI.getLoopFor(BB);
}
/// Same as getLoopFor.
inline const MachineLoop *operator[](const MachineBasicBlock *BB) const {
return LI.getLoopFor(BB);
}
/// Return the loop nesting level of the specified block.
inline unsigned getLoopDepth(const MachineBasicBlock *BB) const {
return LI.getLoopDepth(BB);
}
/// True if the block is a loop header node.
inline bool isLoopHeader(const MachineBasicBlock *BB) const {
return LI.isLoopHeader(BB);
}
/// Calculate the natural loop information.
bool runOnMachineFunction(MachineFunction &F) override;
void calculate(MachineDominatorTree &MDT);
void releaseMemory() override { LI.releaseMemory(); }
void getAnalysisUsage(AnalysisUsage &AU) const override;
/// This removes the specified top-level loop from this loop info object. The
/// loop is not deleted, as it will presumably be inserted into another loop.
inline MachineLoop *removeLoop(iterator I) { return LI.removeLoop(I); }
/// Change the top-level loop that contains BB to the specified loop. This
/// should be used by transformations that restructure the loop hierarchy
/// tree.
inline void changeLoopFor(MachineBasicBlock *BB, MachineLoop *L) {
LI.changeLoopFor(BB, L);
}
/// Replace the specified loop in the top-level loops list with the indicated
/// loop.
inline void changeTopLevelLoop(MachineLoop *OldLoop, MachineLoop *NewLoop) {
LI.changeTopLevelLoop(OldLoop, NewLoop);
}
/// This adds the specified loop to the collection of top-level loops.
inline void addTopLevelLoop(MachineLoop *New) {
LI.addTopLevelLoop(New);
}
/// This method completely removes BB from all data structures, including all
/// of the Loop objects it is nested in and our mapping from
/// MachineBasicBlocks to loops.
void removeBlock(MachineBasicBlock *BB) {
LI.removeBlock(BB);
}
};
// Allow clients to walk the list of nested loops...
template <> struct GraphTraits<const MachineLoop*> {
using NodeRef = const MachineLoop *;
using ChildIteratorType = MachineLoopInfo::iterator;
static NodeRef getEntryNode(const MachineLoop *L) { return L; }
static ChildIteratorType child_begin(NodeRef N) { return N->begin(); }
static ChildIteratorType child_end(NodeRef N) { return N->end(); }
};
template <> struct GraphTraits<MachineLoop*> {
using NodeRef = MachineLoop *;
using ChildIteratorType = MachineLoopInfo::iterator;
static NodeRef getEntryNode(MachineLoop *L) { return L; }
static ChildIteratorType child_begin(NodeRef N) { return N->begin(); }
static ChildIteratorType child_end(NodeRef N) { return N->end(); }
};
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINELOOPINFO_H
PK iwFZ��H� � CodeGen/ScheduleDAGMutation.hnu �[��� //===- ScheduleDAGMutation.h - MachineInstr Scheduling ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements the ScheduleDAGMutation class, which represents
// a target-specific mutation of the dependency graph for scheduling.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_SCHEDULEDAGMUTATION_H
#define LLVM_CODEGEN_SCHEDULEDAGMUTATION_H
namespace llvm {
class ScheduleDAGInstrs;
/// Mutate the DAG as a postpass after normal DAG building.
class ScheduleDAGMutation {
virtual void anchor();
public:
virtual ~ScheduleDAGMutation() = default;
virtual void apply(ScheduleDAGInstrs *DAG) = 0;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_SCHEDULEDAGMUTATION_H
PK iwFZ���v� � CodeGen/MIRFSDiscriminator.hnu �[��� //===----- MIRFSDiscriminator.h: MIR FS Discriminator Support --0-- c++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the supporting functions for adding Machine level IR
// Flow Sensitive discriminators to the instruction debug information. With
// this, a cloned machine instruction in a different MachineBasicBlock will
// have its own discriminator value. This is done in a MIRAddFSDiscriminators
// pass.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MIRFSDISCRIMINATOR_H
#define LLVM_CODEGEN_MIRFSDISCRIMINATOR_H
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/Support/Discriminator.h"
#include <cassert>
#include <cstdint>
namespace llvm {
class MachineFunction;
using namespace sampleprof;
class MIRAddFSDiscriminators : public MachineFunctionPass {
MachineFunction *MF = nullptr;
FSDiscriminatorPass Pass;
unsigned LowBit;
unsigned HighBit;
public:
static char ID;
/// PassNum is the sequence number this pass is called, start from 1.
MIRAddFSDiscriminators(FSDiscriminatorPass P = FSDiscriminatorPass::Pass1)
: MachineFunctionPass(ID), Pass(P) {
LowBit = getFSPassBitBegin(P);
HighBit = getFSPassBitEnd(P);
assert(LowBit < HighBit && "HighBit needs to be greater than Lowbit");
}
StringRef getPassName() const override {
return "Add FS discriminators in MIR";
}
/// getNumFSBBs() - Return the number of machine BBs that have FS samples.
unsigned getNumFSBBs();
/// getNumFSSamples() - Return the number of samples that have flow sensitive
/// values.
uint64_t getNumFSSamples();
/// getMachineFunction - Return the current machine function.
const MachineFunction *getMachineFunction() const { return MF; }
private:
bool runOnMachineFunction(MachineFunction &) override;
};
} // namespace llvm
#endif // LLVM_CODEGEN_MIRFSDISCRIMINATOR_H
PK iwFZ��5 �5 CodeGen/StackMaps.hnu �[��� //===- StackMaps.h - StackMaps ----------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_STACKMAPS_H
#define LLVM_CODEGEN_STACKMAPS_H
#include "llvm/ADT/MapVector.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/Support/Debug.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
#include <vector>
namespace llvm {
class AsmPrinter;
class MCSymbol;
class MCExpr;
class MCStreamer;
class raw_ostream;
class TargetRegisterInfo;
/// MI-level stackmap operands.
///
/// MI stackmap operations take the form:
/// <id>, <numBytes>, live args...
class StackMapOpers {
public:
/// Enumerate the meta operands.
enum { IDPos, NBytesPos };
private:
const MachineInstr* MI;
public:
explicit StackMapOpers(const MachineInstr *MI);
/// Return the ID for the given stackmap
uint64_t getID() const { return MI->getOperand(IDPos).getImm(); }
/// Return the number of patchable bytes the given stackmap should emit.
uint32_t getNumPatchBytes() const {
return MI->getOperand(NBytesPos).getImm();
}
/// Get the operand index of the variable list of non-argument operands.
/// These hold the "live state".
unsigned getVarIdx() const {
// Skip ID, nShadowBytes.
return 2;
}
};
/// MI-level patchpoint operands.
///
/// MI patchpoint operations take the form:
/// [<def>], <id>, <numBytes>, <target>, <numArgs>, <cc>, ...
///
/// IR patchpoint intrinsics do not have the <cc> operand because calling
/// convention is part of the subclass data.
///
/// SD patchpoint nodes do not have a def operand because it is part of the
/// SDValue.
///
/// Patchpoints following the anyregcc convention are handled specially. For
/// these, the stack map also records the location of the return value and
/// arguments.
class PatchPointOpers {
public:
/// Enumerate the meta operands.
enum { IDPos, NBytesPos, TargetPos, NArgPos, CCPos, MetaEnd };
private:
const MachineInstr *MI;
bool HasDef;
unsigned getMetaIdx(unsigned Pos = 0) const {
assert(Pos < MetaEnd && "Meta operand index out of range.");
return (HasDef ? 1 : 0) + Pos;
}
const MachineOperand &getMetaOper(unsigned Pos) const {
return MI->getOperand(getMetaIdx(Pos));
}
public:
explicit PatchPointOpers(const MachineInstr *MI);
bool isAnyReg() const { return (getCallingConv() == CallingConv::AnyReg); }
bool hasDef() const { return HasDef; }
/// Return the ID for the given patchpoint.
uint64_t getID() const { return getMetaOper(IDPos).getImm(); }
/// Return the number of patchable bytes the given patchpoint should emit.
uint32_t getNumPatchBytes() const {
return getMetaOper(NBytesPos).getImm();
}
/// Returns the target of the underlying call.
const MachineOperand &getCallTarget() const {
return getMetaOper(TargetPos);
}
/// Returns the calling convention
CallingConv::ID getCallingConv() const {
return getMetaOper(CCPos).getImm();
}
unsigned getArgIdx() const { return getMetaIdx() + MetaEnd; }
/// Return the number of call arguments
uint32_t getNumCallArgs() const {
return MI->getOperand(getMetaIdx(NArgPos)).getImm();
}
/// Get the operand index of the variable list of non-argument operands.
/// These hold the "live state".
unsigned getVarIdx() const {
return getMetaIdx() + MetaEnd + getNumCallArgs();
}
/// Get the index at which stack map locations will be recorded.
/// Arguments are not recorded unless the anyregcc convention is used.
unsigned getStackMapStartIdx() const {
if (isAnyReg())
return getArgIdx();
return getVarIdx();
}
/// Get the next scratch register operand index.
unsigned getNextScratchIdx(unsigned StartIdx = 0) const;
};
/// MI-level Statepoint operands
///
/// Statepoint operands take the form:
/// <id>, <num patch bytes >, <num call arguments>, <call target>,
/// [call arguments...],
/// <StackMaps::ConstantOp>, <calling convention>,
/// <StackMaps::ConstantOp>, <statepoint flags>,
/// <StackMaps::ConstantOp>, <num deopt args>, [deopt args...],
/// <StackMaps::ConstantOp>, <num gc pointer args>, [gc pointer args...],
/// <StackMaps::ConstantOp>, <num gc allocas>, [gc allocas args...],
/// <StackMaps::ConstantOp>, <num entries in gc map>, [base/derived pairs]
/// base/derived pairs in gc map are logical indices into <gc pointer args>
/// section.
/// All gc pointers assigned to VRegs produce new value (in form of MI Def
/// operand) and are tied to it.
class StatepointOpers {
// TODO:: we should change the STATEPOINT representation so that CC and
// Flags should be part of meta operands, with args and deopt operands, and
// gc operands all prefixed by their length and a type code. This would be
// much more consistent.
// These values are absolute offsets into the operands of the statepoint
// instruction.
enum { IDPos, NBytesPos, NCallArgsPos, CallTargetPos, MetaEnd };
// These values are relative offsets from the start of the statepoint meta
// arguments (i.e. the end of the call arguments).
enum { CCOffset = 1, FlagsOffset = 3, NumDeoptOperandsOffset = 5 };
public:
explicit StatepointOpers(const MachineInstr *MI) : MI(MI) {
NumDefs = MI->getNumDefs();
}
/// Get index of statepoint ID operand.
unsigned getIDPos() const { return NumDefs + IDPos; }
/// Get index of Num Patch Bytes operand.
unsigned getNBytesPos() const { return NumDefs + NBytesPos; }
/// Get index of Num Call Arguments operand.
unsigned getNCallArgsPos() const { return NumDefs + NCallArgsPos; }
/// Get starting index of non call related arguments
/// (calling convention, statepoint flags, vm state and gc state).
unsigned getVarIdx() const {
return MI->getOperand(NumDefs + NCallArgsPos).getImm() + MetaEnd + NumDefs;
}
/// Get index of Calling Convention operand.
unsigned getCCIdx() const { return getVarIdx() + CCOffset; }
/// Get index of Flags operand.
unsigned getFlagsIdx() const { return getVarIdx() + FlagsOffset; }
/// Get index of Number Deopt Arguments operand.
unsigned getNumDeoptArgsIdx() const {
return getVarIdx() + NumDeoptOperandsOffset;
}
/// Return the ID for the given statepoint.
uint64_t getID() const { return MI->getOperand(NumDefs + IDPos).getImm(); }
/// Return the number of patchable bytes the given statepoint should emit.
uint32_t getNumPatchBytes() const {
return MI->getOperand(NumDefs + NBytesPos).getImm();
}
/// Return the target of the underlying call.
const MachineOperand &getCallTarget() const {
return MI->getOperand(NumDefs + CallTargetPos);
}
/// Return the calling convention.
CallingConv::ID getCallingConv() const {
return MI->getOperand(getCCIdx()).getImm();
}
/// Return the statepoint flags.
uint64_t getFlags() const { return MI->getOperand(getFlagsIdx()).getImm(); }
uint64_t getNumDeoptArgs() const {
return MI->getOperand(getNumDeoptArgsIdx()).getImm();
}
/// Get index of number of gc map entries.
unsigned getNumGcMapEntriesIdx();
/// Get index of number of gc allocas.
unsigned getNumAllocaIdx();
/// Get index of number of GC pointers.
unsigned getNumGCPtrIdx();
/// Get index of first GC pointer operand of -1 if there are none.
int getFirstGCPtrIdx();
/// Get vector of base/derived pairs from statepoint.
/// Elements are indices into GC Pointer operand list (logical).
/// Returns number of elements in GCMap.
unsigned
getGCPointerMap(SmallVectorImpl<std::pair<unsigned, unsigned>> &GCMap);
/// Return true if Reg is used only in operands which can be folded to
/// stack usage.
bool isFoldableReg(Register Reg) const;
/// Return true if Reg is used only in operands of MI which can be folded to
/// stack usage and MI is a statepoint instruction.
static bool isFoldableReg(const MachineInstr *MI, Register Reg);
private:
const MachineInstr *MI;
unsigned NumDefs;
};
class StackMaps {
public:
struct Location {
enum LocationType {
Unprocessed,
Register,
Direct,
Indirect,
Constant,
ConstantIndex
};
LocationType Type = Unprocessed;
unsigned Size = 0;
unsigned Reg = 0;
int64_t Offset = 0;
Location() = default;
Location(LocationType Type, unsigned Size, unsigned Reg, int64_t Offset)
: Type(Type), Size(Size), Reg(Reg), Offset(Offset) {}
};
struct LiveOutReg {
unsigned short Reg = 0;
unsigned short DwarfRegNum = 0;
unsigned short Size = 0;
LiveOutReg() = default;
LiveOutReg(unsigned short Reg, unsigned short DwarfRegNum,
unsigned short Size)
: Reg(Reg), DwarfRegNum(DwarfRegNum), Size(Size) {}
};
// OpTypes are used to encode information about the following logical
// operand (which may consist of several MachineOperands) for the
// OpParser.
using OpType = enum { DirectMemRefOp, IndirectMemRefOp, ConstantOp };
StackMaps(AsmPrinter &AP);
/// Get index of next meta operand.
/// Similar to parseOperand, but does not actually parses operand meaning.
static unsigned getNextMetaArgIdx(const MachineInstr *MI, unsigned CurIdx);
void reset() {
CSInfos.clear();
ConstPool.clear();
FnInfos.clear();
}
using LocationVec = SmallVector<Location, 8>;
using LiveOutVec = SmallVector<LiveOutReg, 8>;
using ConstantPool = MapVector<uint64_t, uint64_t>;
struct FunctionInfo {
uint64_t StackSize = 0;
uint64_t RecordCount = 1;
FunctionInfo() = default;
explicit FunctionInfo(uint64_t StackSize) : StackSize(StackSize) {}
};
struct CallsiteInfo {
const MCExpr *CSOffsetExpr = nullptr;
uint64_t ID = 0;
LocationVec Locations;
LiveOutVec LiveOuts;
CallsiteInfo() = default;
CallsiteInfo(const MCExpr *CSOffsetExpr, uint64_t ID,
LocationVec &&Locations, LiveOutVec &&LiveOuts)
: CSOffsetExpr(CSOffsetExpr), ID(ID), Locations(std::move(Locations)),
LiveOuts(std::move(LiveOuts)) {}
};
using FnInfoMap = MapVector<const MCSymbol *, FunctionInfo>;
using CallsiteInfoList = std::vector<CallsiteInfo>;
/// Generate a stackmap record for a stackmap instruction.
///
/// MI must be a raw STACKMAP, not a PATCHPOINT.
void recordStackMap(const MCSymbol &L,
const MachineInstr &MI);
/// Generate a stackmap record for a patchpoint instruction.
void recordPatchPoint(const MCSymbol &L,
const MachineInstr &MI);
/// Generate a stackmap record for a statepoint instruction.
void recordStatepoint(const MCSymbol &L,
const MachineInstr &MI);
/// If there is any stack map data, create a stack map section and serialize
/// the map info into it. This clears the stack map data structures
/// afterwards.
void serializeToStackMapSection();
/// Get call site info.
CallsiteInfoList &getCSInfos() { return CSInfos; }
/// Get function info.
FnInfoMap &getFnInfos() { return FnInfos; }
private:
static const char *WSMP;
AsmPrinter &AP;
CallsiteInfoList CSInfos;
ConstantPool ConstPool;
FnInfoMap FnInfos;
MachineInstr::const_mop_iterator
parseOperand(MachineInstr::const_mop_iterator MOI,
MachineInstr::const_mop_iterator MOE, LocationVec &Locs,
LiveOutVec &LiveOuts) const;
/// Specialized parser of statepoint operands.
/// They do not directly correspond to StackMap record entries.
void parseStatepointOpers(const MachineInstr &MI,
MachineInstr::const_mop_iterator MOI,
MachineInstr::const_mop_iterator MOE,
LocationVec &Locations, LiveOutVec &LiveOuts);
/// Create a live-out register record for the given register @p Reg.
LiveOutReg createLiveOutReg(unsigned Reg,
const TargetRegisterInfo *TRI) const;
/// Parse the register live-out mask and return a vector of live-out
/// registers that need to be recorded in the stackmap.
LiveOutVec parseRegisterLiveOutMask(const uint32_t *Mask) const;
/// Record the locations of the operands of the provided instruction in a
/// record keyed by the provided label. For instructions w/AnyReg calling
/// convention the return register is also recorded if requested. For
/// STACKMAP, and PATCHPOINT the label is expected to immediately *preceed*
/// lowering of the MI to MCInsts. For STATEPOINT, it expected to
/// immediately *follow*. It's not clear this difference was intentional,
/// but it exists today.
void recordStackMapOpers(const MCSymbol &L,
const MachineInstr &MI, uint64_t ID,
MachineInstr::const_mop_iterator MOI,
MachineInstr::const_mop_iterator MOE,
bool recordResult = false);
/// Emit the stackmap header.
void emitStackmapHeader(MCStreamer &OS);
/// Emit the function frame record for each function.
void emitFunctionFrameRecords(MCStreamer &OS);
/// Emit the constant pool.
void emitConstantPoolEntries(MCStreamer &OS);
/// Emit the callsite info for each stackmap/patchpoint intrinsic call.
void emitCallsiteEntries(MCStreamer &OS);
void print(raw_ostream &OS);
void debug() { print(dbgs()); }
};
} // end namespace llvm
#endif // LLVM_CODEGEN_STACKMAPS_H
PK iwFZ�0 c CodeGen/MachineCFGPrinter.hnu �[��� //===-- MachineCFGPrinter.h -------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
//===----------------------------------------------------------------------===//
#include "llvm/Analysis/CFGPrinter.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Support/DOTGraphTraits.h"
namespace llvm {
template <class GraphType> struct GraphTraits;
class DOTMachineFuncInfo {
private:
const MachineFunction *F;
public:
DOTMachineFuncInfo(const MachineFunction *F) : F(F) {}
const MachineFunction *getFunction() const { return this->F; }
};
template <>
struct GraphTraits<DOTMachineFuncInfo *>
: public GraphTraits<const MachineBasicBlock *> {
static NodeRef getEntryNode(DOTMachineFuncInfo *CFGInfo) {
return &(CFGInfo->getFunction()->front());
}
// nodes_iterator/begin/end - Allow iteration over all nodes in the graph
using nodes_iterator = pointer_iterator<MachineFunction::const_iterator>;
static nodes_iterator nodes_begin(DOTMachineFuncInfo *CFGInfo) {
return nodes_iterator(CFGInfo->getFunction()->begin());
}
static nodes_iterator nodes_end(DOTMachineFuncInfo *CFGInfo) {
return nodes_iterator(CFGInfo->getFunction()->end());
}
static size_t size(DOTMachineFuncInfo *CFGInfo) {
return CFGInfo->getFunction()->size();
}
};
template <>
struct DOTGraphTraits<DOTMachineFuncInfo *> : public DefaultDOTGraphTraits {
DOTGraphTraits(bool isSimple = false) : DefaultDOTGraphTraits(isSimple) {}
static void eraseComment(std::string &OutStr, unsigned &I, unsigned Idx) {
OutStr.erase(OutStr.begin() + I, OutStr.begin() + Idx);
--I;
}
static std::string getSimpleNodeLabel(const MachineBasicBlock *Node,
DOTMachineFuncInfo *) {
return SimpleNodeLabelString(Node);
}
static std::string getCompleteNodeLabel(
const MachineBasicBlock *Node, DOTMachineFuncInfo *,
function_ref<void(raw_string_ostream &, const MachineBasicBlock &)>
HandleBasicBlock =
[](raw_string_ostream &OS,
const MachineBasicBlock &Node) -> void { OS << Node; },
function_ref<void(std::string &, unsigned &, unsigned)>
HandleComment = eraseComment) {
return CompleteNodeLabelString(Node, HandleBasicBlock, HandleComment);
}
std::string getNodeLabel(const MachineBasicBlock *Node,
DOTMachineFuncInfo *CFGInfo) {
if (isSimple())
return getSimpleNodeLabel(Node, CFGInfo);
return getCompleteNodeLabel(Node, CFGInfo);
}
static std::string getGraphName(DOTMachineFuncInfo *CFGInfo) {
return "Machine CFG for '" + CFGInfo->getFunction()->getName().str() +
"' function";
}
};
} // namespace llvm
PK iwFZZ��C�T �T CodeGen/RegisterPressure.hnu �[��� //===- RegisterPressure.h - Dynamic Register Pressure -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the RegisterPressure class which can be used to track
// MachineInstr level register pressure.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_REGISTERPRESSURE_H
#define LLVM_CODEGEN_REGISTERPRESSURE_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/SparseSet.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/SlotIndexes.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/MC/LaneBitmask.h"
#include <cassert>
#include <cstdint>
#include <cstdlib>
#include <limits>
#include <vector>
namespace llvm {
class LiveIntervals;
class MachineFunction;
class MachineInstr;
class MachineRegisterInfo;
class RegisterClassInfo;
struct RegisterMaskPair {
Register RegUnit; ///< Virtual register or register unit.
LaneBitmask LaneMask;
RegisterMaskPair(Register RegUnit, LaneBitmask LaneMask)
: RegUnit(RegUnit), LaneMask(LaneMask) {}
};
/// Base class for register pressure results.
struct RegisterPressure {
/// Map of max reg pressure indexed by pressure set ID, not class ID.
std::vector<unsigned> MaxSetPressure;
/// List of live in virtual registers or physical register units.
SmallVector<RegisterMaskPair,8> LiveInRegs;
SmallVector<RegisterMaskPair,8> LiveOutRegs;
void dump(const TargetRegisterInfo *TRI) const;
};
/// RegisterPressure computed within a region of instructions delimited by
/// TopIdx and BottomIdx. During pressure computation, the maximum pressure per
/// register pressure set is increased. Once pressure within a region is fully
/// computed, the live-in and live-out sets are recorded.
///
/// This is preferable to RegionPressure when LiveIntervals are available,
/// because delimiting regions by SlotIndex is more robust and convenient than
/// holding block iterators. The block contents can change without invalidating
/// the pressure result.
struct IntervalPressure : RegisterPressure {
/// Record the boundary of the region being tracked.
SlotIndex TopIdx;
SlotIndex BottomIdx;
void reset();
void openTop(SlotIndex NextTop);
void openBottom(SlotIndex PrevBottom);
};
/// RegisterPressure computed within a region of instructions delimited by
/// TopPos and BottomPos. This is a less precise version of IntervalPressure for
/// use when LiveIntervals are unavailable.
struct RegionPressure : RegisterPressure {
/// Record the boundary of the region being tracked.
MachineBasicBlock::const_iterator TopPos;
MachineBasicBlock::const_iterator BottomPos;
void reset();
void openTop(MachineBasicBlock::const_iterator PrevTop);
void openBottom(MachineBasicBlock::const_iterator PrevBottom);
};
/// Capture a change in pressure for a single pressure set. UnitInc may be
/// expressed in terms of upward or downward pressure depending on the client
/// and will be dynamically adjusted for current liveness.
///
/// Pressure increments are tiny, typically 1-2 units, and this is only for
/// heuristics, so we don't check UnitInc overflow. Instead, we may have a
/// higher level assert that pressure is consistent within a region. We also
/// effectively ignore dead defs which don't affect heuristics much.
class PressureChange {
uint16_t PSetID = 0; // ID+1. 0=Invalid.
int16_t UnitInc = 0;
public:
PressureChange() = default;
PressureChange(unsigned id): PSetID(id + 1) {
assert(id < std::numeric_limits<uint16_t>::max() && "PSetID overflow.");
}
bool isValid() const { return PSetID > 0; }
unsigned getPSet() const {
assert(isValid() && "invalid PressureChange");
return PSetID - 1;
}
// If PSetID is invalid, return UINT16_MAX to give it lowest priority.
unsigned getPSetOrMax() const {
return (PSetID - 1) & std::numeric_limits<uint16_t>::max();
}
int getUnitInc() const { return UnitInc; }
void setUnitInc(int Inc) { UnitInc = Inc; }
bool operator==(const PressureChange &RHS) const {
return PSetID == RHS.PSetID && UnitInc == RHS.UnitInc;
}
void dump() const;
};
/// List of PressureChanges in order of increasing, unique PSetID.
///
/// Use a small fixed number, because we can fit more PressureChanges in an
/// empty SmallVector than ever need to be tracked per register class. If more
/// PSets are affected, then we only track the most constrained.
class PressureDiff {
// The initial design was for MaxPSets=4, but that requires PSet partitions,
// which are not yet implemented. (PSet partitions are equivalent PSets given
// the register classes actually in use within the scheduling region.)
enum { MaxPSets = 16 };
PressureChange PressureChanges[MaxPSets];
using iterator = PressureChange *;
iterator nonconst_begin() { return &PressureChanges[0]; }
iterator nonconst_end() { return &PressureChanges[MaxPSets]; }
public:
using const_iterator = const PressureChange *;
const_iterator begin() const { return &PressureChanges[0]; }
const_iterator end() const { return &PressureChanges[MaxPSets]; }
void addPressureChange(Register RegUnit, bool IsDec,
const MachineRegisterInfo *MRI);
void dump(const TargetRegisterInfo &TRI) const;
};
/// List of registers defined and used by a machine instruction.
class RegisterOperands {
public:
/// List of virtual registers and register units read by the instruction.
SmallVector<RegisterMaskPair, 8> Uses;
/// List of virtual registers and register units defined by the
/// instruction which are not dead.
SmallVector<RegisterMaskPair, 8> Defs;
/// List of virtual registers and register units defined by the
/// instruction but dead.
SmallVector<RegisterMaskPair, 8> DeadDefs;
/// Analyze the given instruction \p MI and fill in the Uses, Defs and
/// DeadDefs list based on the MachineOperand flags.
void collect(const MachineInstr &MI, const TargetRegisterInfo &TRI,
const MachineRegisterInfo &MRI, bool TrackLaneMasks,
bool IgnoreDead);
/// Use liveness information to find dead defs not marked with a dead flag
/// and move them to the DeadDefs vector.
void detectDeadDefs(const MachineInstr &MI, const LiveIntervals &LIS);
/// Use liveness information to find out which uses/defs are partially
/// undefined/dead and adjust the RegisterMaskPairs accordingly.
/// If \p AddFlagsMI is given then missing read-undef and dead flags will be
/// added to the instruction.
void adjustLaneLiveness(const LiveIntervals &LIS,
const MachineRegisterInfo &MRI, SlotIndex Pos,
MachineInstr *AddFlagsMI = nullptr);
};
/// Array of PressureDiffs.
class PressureDiffs {
PressureDiff *PDiffArray = nullptr;
unsigned Size = 0;
unsigned Max = 0;
public:
PressureDiffs() = default;
PressureDiffs &operator=(const PressureDiffs &other) = delete;
PressureDiffs(const PressureDiffs &other) = delete;
~PressureDiffs() { free(PDiffArray); }
void clear() { Size = 0; }
void init(unsigned N);
PressureDiff &operator[](unsigned Idx) {
assert(Idx < Size && "PressureDiff index out of bounds");
return PDiffArray[Idx];
}
const PressureDiff &operator[](unsigned Idx) const {
return const_cast<PressureDiffs*>(this)->operator[](Idx);
}
/// Record pressure difference induced by the given operand list to
/// node with index \p Idx.
void addInstruction(unsigned Idx, const RegisterOperands &RegOpers,
const MachineRegisterInfo &MRI);
};
/// Store the effects of a change in pressure on things that MI scheduler cares
/// about.
///
/// Excess records the value of the largest difference in register units beyond
/// the target's pressure limits across the affected pressure sets, where
/// largest is defined as the absolute value of the difference. Negative
/// ExcessUnits indicates a reduction in pressure that had already exceeded the
/// target's limits.
///
/// CriticalMax records the largest increase in the tracker's max pressure that
/// exceeds the critical limit for some pressure set determined by the client.
///
/// CurrentMax records the largest increase in the tracker's max pressure that
/// exceeds the current limit for some pressure set determined by the client.
struct RegPressureDelta {
PressureChange Excess;
PressureChange CriticalMax;
PressureChange CurrentMax;
RegPressureDelta() = default;
bool operator==(const RegPressureDelta &RHS) const {
return Excess == RHS.Excess && CriticalMax == RHS.CriticalMax
&& CurrentMax == RHS.CurrentMax;
}
bool operator!=(const RegPressureDelta &RHS) const {
return !operator==(RHS);
}
void dump() const;
};
/// A set of live virtual registers and physical register units.
///
/// This is a wrapper around a SparseSet which deals with mapping register unit
/// and virtual register indexes to an index usable by the sparse set.
class LiveRegSet {
private:
struct IndexMaskPair {
unsigned Index;
LaneBitmask LaneMask;
IndexMaskPair(unsigned Index, LaneBitmask LaneMask)
: Index(Index), LaneMask(LaneMask) {}
unsigned getSparseSetIndex() const {
return Index;
}
};
using RegSet = SparseSet<IndexMaskPair>;
RegSet Regs;
unsigned NumRegUnits = 0u;
unsigned getSparseIndexFromReg(Register Reg) const {
if (Reg.isVirtual())
return Register::virtReg2Index(Reg) + NumRegUnits;
assert(Reg < NumRegUnits);
return Reg;
}
Register getRegFromSparseIndex(unsigned SparseIndex) const {
if (SparseIndex >= NumRegUnits)
return Register::index2VirtReg(SparseIndex - NumRegUnits);
return Register(SparseIndex);
}
public:
void clear();
void init(const MachineRegisterInfo &MRI);
LaneBitmask contains(Register Reg) const {
unsigned SparseIndex = getSparseIndexFromReg(Reg);
RegSet::const_iterator I = Regs.find(SparseIndex);
if (I == Regs.end())
return LaneBitmask::getNone();
return I->LaneMask;
}
/// Mark the \p Pair.LaneMask lanes of \p Pair.Reg as live.
/// Returns the previously live lanes of \p Pair.Reg.
LaneBitmask insert(RegisterMaskPair Pair) {
unsigned SparseIndex = getSparseIndexFromReg(Pair.RegUnit);
auto InsertRes = Regs.insert(IndexMaskPair(SparseIndex, Pair.LaneMask));
if (!InsertRes.second) {
LaneBitmask PrevMask = InsertRes.first->LaneMask;
InsertRes.first->LaneMask |= Pair.LaneMask;
return PrevMask;
}
return LaneBitmask::getNone();
}
/// Clears the \p Pair.LaneMask lanes of \p Pair.Reg (mark them as dead).
/// Returns the previously live lanes of \p Pair.Reg.
LaneBitmask erase(RegisterMaskPair Pair) {
unsigned SparseIndex = getSparseIndexFromReg(Pair.RegUnit);
RegSet::iterator I = Regs.find(SparseIndex);
if (I == Regs.end())
return LaneBitmask::getNone();
LaneBitmask PrevMask = I->LaneMask;
I->LaneMask &= ~Pair.LaneMask;
return PrevMask;
}
size_t size() const {
return Regs.size();
}
template<typename ContainerT>
void appendTo(ContainerT &To) const {
for (const IndexMaskPair &P : Regs) {
Register Reg = getRegFromSparseIndex(P.Index);
if (P.LaneMask.any())
To.push_back(RegisterMaskPair(Reg, P.LaneMask));
}
}
};
/// Track the current register pressure at some position in the instruction
/// stream, and remember the high water mark within the region traversed. This
/// does not automatically consider live-through ranges. The client may
/// independently adjust for global liveness.
///
/// Each RegPressureTracker only works within a MachineBasicBlock. Pressure can
/// be tracked across a larger region by storing a RegisterPressure result at
/// each block boundary and explicitly adjusting pressure to account for block
/// live-in and live-out register sets.
///
/// RegPressureTracker holds a reference to a RegisterPressure result that it
/// computes incrementally. During downward tracking, P.BottomIdx or P.BottomPos
/// is invalid until it reaches the end of the block or closeRegion() is
/// explicitly called. Similarly, P.TopIdx is invalid during upward
/// tracking. Changing direction has the side effect of closing region, and
/// traversing past TopIdx or BottomIdx reopens it.
class RegPressureTracker {
const MachineFunction *MF = nullptr;
const TargetRegisterInfo *TRI = nullptr;
const RegisterClassInfo *RCI = nullptr;
const MachineRegisterInfo *MRI = nullptr;
const LiveIntervals *LIS = nullptr;
/// We currently only allow pressure tracking within a block.
const MachineBasicBlock *MBB = nullptr;
/// Track the max pressure within the region traversed so far.
RegisterPressure &P;
/// Run in two modes dependending on whether constructed with IntervalPressure
/// or RegisterPressure. If requireIntervals is false, LIS are ignored.
bool RequireIntervals;
/// True if UntiedDefs will be populated.
bool TrackUntiedDefs = false;
/// True if lanemasks should be tracked.
bool TrackLaneMasks = false;
/// Register pressure corresponds to liveness before this instruction
/// iterator. It may point to the end of the block or a DebugValue rather than
/// an instruction.
MachineBasicBlock::const_iterator CurrPos;
/// Pressure map indexed by pressure set ID, not class ID.
std::vector<unsigned> CurrSetPressure;
/// Set of live registers.
LiveRegSet LiveRegs;
/// Set of vreg defs that start a live range.
SparseSet<Register, VirtReg2IndexFunctor> UntiedDefs;
/// Live-through pressure.
std::vector<unsigned> LiveThruPressure;
public:
RegPressureTracker(IntervalPressure &rp) : P(rp), RequireIntervals(true) {}
RegPressureTracker(RegionPressure &rp) : P(rp), RequireIntervals(false) {}
void reset();
void init(const MachineFunction *mf, const RegisterClassInfo *rci,
const LiveIntervals *lis, const MachineBasicBlock *mbb,
MachineBasicBlock::const_iterator pos,
bool TrackLaneMasks, bool TrackUntiedDefs);
/// Force liveness of virtual registers or physical register
/// units. Particularly useful to initialize the livein/out state of the
/// tracker before the first call to advance/recede.
void addLiveRegs(ArrayRef<RegisterMaskPair> Regs);
/// Get the MI position corresponding to this register pressure.
MachineBasicBlock::const_iterator getPos() const { return CurrPos; }
// Reset the MI position corresponding to the register pressure. This allows
// schedulers to move instructions above the RegPressureTracker's
// CurrPos. Since the pressure is computed before CurrPos, the iterator
// position changes while pressure does not.
void setPos(MachineBasicBlock::const_iterator Pos) { CurrPos = Pos; }
/// Recede across the previous instruction.
void recede(SmallVectorImpl<RegisterMaskPair> *LiveUses = nullptr);
/// Recede across the previous instruction.
/// This "low-level" variant assumes that recedeSkipDebugValues() was
/// called previously and takes precomputed RegisterOperands for the
/// instruction.
void recede(const RegisterOperands &RegOpers,
SmallVectorImpl<RegisterMaskPair> *LiveUses = nullptr);
/// Recede until we find an instruction which is not a DebugValue.
void recedeSkipDebugValues();
/// Advance across the current instruction.
void advance();
/// Advance across the current instruction.
/// This is a "low-level" variant of advance() which takes precomputed
/// RegisterOperands of the instruction.
void advance(const RegisterOperands &RegOpers);
/// Finalize the region boundaries and recored live ins and live outs.
void closeRegion();
/// Initialize the LiveThru pressure set based on the untied defs found in
/// RPTracker.
void initLiveThru(const RegPressureTracker &RPTracker);
/// Copy an existing live thru pressure result.
void initLiveThru(ArrayRef<unsigned> PressureSet) {
LiveThruPressure.assign(PressureSet.begin(), PressureSet.end());
}
ArrayRef<unsigned> getLiveThru() const { return LiveThruPressure; }
/// Get the resulting register pressure over the traversed region.
/// This result is complete if closeRegion() was explicitly invoked.
RegisterPressure &getPressure() { return P; }
const RegisterPressure &getPressure() const { return P; }
/// Get the register set pressure at the current position, which may be less
/// than the pressure across the traversed region.
const std::vector<unsigned> &getRegSetPressureAtPos() const {
return CurrSetPressure;
}
bool isTopClosed() const;
bool isBottomClosed() const;
void closeTop();
void closeBottom();
/// Consider the pressure increase caused by traversing this instruction
/// bottom-up. Find the pressure set with the most change beyond its pressure
/// limit based on the tracker's current pressure, and record the number of
/// excess register units of that pressure set introduced by this instruction.
void getMaxUpwardPressureDelta(const MachineInstr *MI,
PressureDiff *PDiff,
RegPressureDelta &Delta,
ArrayRef<PressureChange> CriticalPSets,
ArrayRef<unsigned> MaxPressureLimit);
void getUpwardPressureDelta(const MachineInstr *MI,
/*const*/ PressureDiff &PDiff,
RegPressureDelta &Delta,
ArrayRef<PressureChange> CriticalPSets,
ArrayRef<unsigned> MaxPressureLimit) const;
/// Consider the pressure increase caused by traversing this instruction
/// top-down. Find the pressure set with the most change beyond its pressure
/// limit based on the tracker's current pressure, and record the number of
/// excess register units of that pressure set introduced by this instruction.
void getMaxDownwardPressureDelta(const MachineInstr *MI,
RegPressureDelta &Delta,
ArrayRef<PressureChange> CriticalPSets,
ArrayRef<unsigned> MaxPressureLimit);
/// Find the pressure set with the most change beyond its pressure limit after
/// traversing this instruction either upward or downward depending on the
/// closed end of the current region.
void getMaxPressureDelta(const MachineInstr *MI,
RegPressureDelta &Delta,
ArrayRef<PressureChange> CriticalPSets,
ArrayRef<unsigned> MaxPressureLimit) {
if (isTopClosed())
return getMaxDownwardPressureDelta(MI, Delta, CriticalPSets,
MaxPressureLimit);
assert(isBottomClosed() && "Uninitialized pressure tracker");
return getMaxUpwardPressureDelta(MI, nullptr, Delta, CriticalPSets,
MaxPressureLimit);
}
/// Get the pressure of each PSet after traversing this instruction bottom-up.
void getUpwardPressure(const MachineInstr *MI,
std::vector<unsigned> &PressureResult,
std::vector<unsigned> &MaxPressureResult);
/// Get the pressure of each PSet after traversing this instruction top-down.
void getDownwardPressure(const MachineInstr *MI,
std::vector<unsigned> &PressureResult,
std::vector<unsigned> &MaxPressureResult);
void getPressureAfterInst(const MachineInstr *MI,
std::vector<unsigned> &PressureResult,
std::vector<unsigned> &MaxPressureResult) {
if (isTopClosed())
return getUpwardPressure(MI, PressureResult, MaxPressureResult);
assert(isBottomClosed() && "Uninitialized pressure tracker");
return getDownwardPressure(MI, PressureResult, MaxPressureResult);
}
bool hasUntiedDef(Register VirtReg) const {
return UntiedDefs.count(VirtReg);
}
void dump() const;
void increaseRegPressure(Register RegUnit, LaneBitmask PreviousMask,
LaneBitmask NewMask);
void decreaseRegPressure(Register RegUnit, LaneBitmask PreviousMask,
LaneBitmask NewMask);
protected:
/// Add Reg to the live out set and increase max pressure.
void discoverLiveOut(RegisterMaskPair Pair);
/// Add Reg to the live in set and increase max pressure.
void discoverLiveIn(RegisterMaskPair Pair);
/// Get the SlotIndex for the first nondebug instruction including or
/// after the current position.
SlotIndex getCurrSlot() const;
void bumpDeadDefs(ArrayRef<RegisterMaskPair> DeadDefs);
void bumpUpwardPressure(const MachineInstr *MI);
void bumpDownwardPressure(const MachineInstr *MI);
void discoverLiveInOrOut(RegisterMaskPair Pair,
SmallVectorImpl<RegisterMaskPair> &LiveInOrOut);
LaneBitmask getLastUsedLanes(Register RegUnit, SlotIndex Pos) const;
LaneBitmask getLiveLanesAt(Register RegUnit, SlotIndex Pos) const;
LaneBitmask getLiveThroughAt(Register RegUnit, SlotIndex Pos) const;
};
void dumpRegSetPressure(ArrayRef<unsigned> SetPressure,
const TargetRegisterInfo *TRI);
} // end namespace llvm
#endif // LLVM_CODEGEN_REGISTERPRESSURE_H
PK iwFZ���R}� }� CodeGen/MachineFunction.hnu �[��� //===- llvm/CodeGen/MachineFunction.h ---------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Collect native machine code for a function. This class contains a list of
// MachineBasicBlock instances that make up the current compiled function.
//
// This class also contains pointers to various classes which hold
// target-specific information about the generated code.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEFUNCTION_H
#define LLVM_CODEGEN_MACHINEFUNCTION_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/GraphTraits.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/ilist.h"
#include "llvm/ADT/iterator.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/IR/EHPersonalities.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/ArrayRecycler.h"
#include "llvm/Support/AtomicOrdering.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Recycler.h"
#include "llvm/Target/TargetOptions.h"
#include <cassert>
#include <cstdint>
#include <memory>
#include <utility>
#include <variant>
#include <vector>
namespace llvm {
class BasicBlock;
class BlockAddress;
class DataLayout;
class DebugLoc;
struct DenormalMode;
class DIExpression;
class DILocalVariable;
class DILocation;
class Function;
class GISelChangeObserver;
class GlobalValue;
class LLVMTargetMachine;
class MachineConstantPool;
class MachineFrameInfo;
class MachineFunction;
class MachineJumpTableInfo;
class MachineModuleInfo;
class MachineRegisterInfo;
class MCContext;
class MCInstrDesc;
class MCSymbol;
class MCSection;
class Pass;
class PseudoSourceValueManager;
class raw_ostream;
class SlotIndexes;
class StringRef;
class TargetRegisterClass;
class TargetSubtargetInfo;
struct WasmEHFuncInfo;
struct WinEHFuncInfo;
template <> struct ilist_alloc_traits<MachineBasicBlock> {
void deleteNode(MachineBasicBlock *MBB);
};
template <> struct ilist_callback_traits<MachineBasicBlock> {
void addNodeToList(MachineBasicBlock* N);
void removeNodeFromList(MachineBasicBlock* N);
template <class Iterator>
void transferNodesFromList(ilist_callback_traits &OldList, Iterator, Iterator) {
assert(this == &OldList && "never transfer MBBs between functions");
}
};
/// MachineFunctionInfo - This class can be derived from and used by targets to
/// hold private target-specific information for each MachineFunction. Objects
/// of type are accessed/created with MF::getInfo and destroyed when the
/// MachineFunction is destroyed.
struct MachineFunctionInfo {
virtual ~MachineFunctionInfo();
/// Factory function: default behavior is to call new using the
/// supplied allocator.
///
/// This function can be overridden in a derive class.
template <typename FuncInfoTy, typename SubtargetTy = TargetSubtargetInfo>
static FuncInfoTy *create(BumpPtrAllocator &Allocator, const Function &F,
const SubtargetTy *STI) {
return new (Allocator.Allocate<FuncInfoTy>()) FuncInfoTy(F, STI);
}
template <typename Ty>
static Ty *create(BumpPtrAllocator &Allocator, const Ty &MFI) {
return new (Allocator.Allocate<Ty>()) Ty(MFI);
}
/// Make a functionally equivalent copy of this MachineFunctionInfo in \p MF.
/// This requires remapping MachineBasicBlock references from the original
/// parent to values in the new function. Targets may assume that virtual
/// register and frame index values are preserved in the new function.
virtual MachineFunctionInfo *
clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF,
const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB)
const {
return nullptr;
}
};
/// Properties which a MachineFunction may have at a given point in time.
/// Each of these has checking code in the MachineVerifier, and passes can
/// require that a property be set.
class MachineFunctionProperties {
// Possible TODO: Allow targets to extend this (perhaps by allowing the
// constructor to specify the size of the bit vector)
// Possible TODO: Allow requiring the negative (e.g. VRegsAllocated could be
// stated as the negative of "has vregs"
public:
// The properties are stated in "positive" form; i.e. a pass could require
// that the property hold, but not that it does not hold.
// Property descriptions:
// IsSSA: True when the machine function is in SSA form and virtual registers
// have a single def.
// NoPHIs: The machine function does not contain any PHI instruction.
// TracksLiveness: True when tracking register liveness accurately.
// While this property is set, register liveness information in basic block
// live-in lists and machine instruction operands (e.g. implicit defs) is
// accurate, kill flags are conservatively accurate (kill flag correctly
// indicates the last use of a register, an operand without kill flag may or
// may not be the last use of a register). This means it can be used to
// change the code in ways that affect the values in registers, for example
// by the register scavenger.
// When this property is cleared at a very late time, liveness is no longer
// reliable.
// NoVRegs: The machine function does not use any virtual registers.
// Legalized: In GlobalISel: the MachineLegalizer ran and all pre-isel generic
// instructions have been legalized; i.e., all instructions are now one of:
// - generic and always legal (e.g., COPY)
// - target-specific
// - legal pre-isel generic instructions.
// RegBankSelected: In GlobalISel: the RegBankSelect pass ran and all generic
// virtual registers have been assigned to a register bank.
// Selected: In GlobalISel: the InstructionSelect pass ran and all pre-isel
// generic instructions have been eliminated; i.e., all instructions are now
// target-specific or non-pre-isel generic instructions (e.g., COPY).
// Since only pre-isel generic instructions can have generic virtual register
// operands, this also means that all generic virtual registers have been
// constrained to virtual registers (assigned to register classes) and that
// all sizes attached to them have been eliminated.
// TiedOpsRewritten: The twoaddressinstruction pass will set this flag, it
// means that tied-def have been rewritten to meet the RegConstraint.
// FailsVerification: Means that the function is not expected to pass machine
// verification. This can be set by passes that introduce known problems that
// have not been fixed yet.
// TracksDebugUserValues: Without this property enabled, debug instructions
// such as DBG_VALUE are allowed to reference virtual registers even if those
// registers do not have a definition. With the property enabled virtual
// registers must only be used if they have a definition. This property
// allows earlier passes in the pipeline to skip updates of `DBG_VALUE`
// instructions to save compile time.
enum class Property : unsigned {
IsSSA,
NoPHIs,
TracksLiveness,
NoVRegs,
FailedISel,
Legalized,
RegBankSelected,
Selected,
TiedOpsRewritten,
FailsVerification,
TracksDebugUserValues,
LastProperty = TracksDebugUserValues,
};
bool hasProperty(Property P) const {
return Properties[static_cast<unsigned>(P)];
}
MachineFunctionProperties &set(Property P) {
Properties.set(static_cast<unsigned>(P));
return *this;
}
MachineFunctionProperties &reset(Property P) {
Properties.reset(static_cast<unsigned>(P));
return *this;
}
/// Reset all the properties.
MachineFunctionProperties &reset() {
Properties.reset();
return *this;
}
MachineFunctionProperties &set(const MachineFunctionProperties &MFP) {
Properties |= MFP.Properties;
return *this;
}
MachineFunctionProperties &reset(const MachineFunctionProperties &MFP) {
Properties.reset(MFP.Properties);
return *this;
}
// Returns true if all properties set in V (i.e. required by a pass) are set
// in this.
bool verifyRequiredProperties(const MachineFunctionProperties &V) const {
return !V.Properties.test(Properties);
}
/// Print the MachineFunctionProperties in human-readable form.
void print(raw_ostream &OS) const;
private:
BitVector Properties =
BitVector(static_cast<unsigned>(Property::LastProperty)+1);
};
struct SEHHandler {
/// Filter or finally function. Null indicates a catch-all.
const Function *FilterOrFinally;
/// Address of block to recover at. Null for a finally handler.
const BlockAddress *RecoverBA;
};
/// This structure is used to retain landing pad info for the current function.
struct LandingPadInfo {
MachineBasicBlock *LandingPadBlock; // Landing pad block.
SmallVector<MCSymbol *, 1> BeginLabels; // Labels prior to invoke.
SmallVector<MCSymbol *, 1> EndLabels; // Labels after invoke.
SmallVector<SEHHandler, 1> SEHHandlers; // SEH handlers active at this lpad.
MCSymbol *LandingPadLabel = nullptr; // Label at beginning of landing pad.
std::vector<int> TypeIds; // List of type ids (filters negative).
explicit LandingPadInfo(MachineBasicBlock *MBB)
: LandingPadBlock(MBB) {}
};
class LLVM_EXTERNAL_VISIBILITY MachineFunction {
Function &F;
const LLVMTargetMachine &Target;
const TargetSubtargetInfo *STI;
MCContext &Ctx;
MachineModuleInfo &MMI;
// RegInfo - Information about each register in use in the function.
MachineRegisterInfo *RegInfo;
// Used to keep track of target-specific per-machine function information for
// the target implementation.
MachineFunctionInfo *MFInfo;
// Keep track of objects allocated on the stack.
MachineFrameInfo *FrameInfo;
// Keep track of constants which are spilled to memory
MachineConstantPool *ConstantPool;
// Keep track of jump tables for switch instructions
MachineJumpTableInfo *JumpTableInfo;
// Keep track of the function section.
MCSection *Section = nullptr;
// Catchpad unwind destination info for wasm EH.
// Keeps track of Wasm exception handling related data. This will be null for
// functions that aren't using a wasm EH personality.
WasmEHFuncInfo *WasmEHInfo = nullptr;
// Keeps track of Windows exception handling related data. This will be null
// for functions that aren't using a funclet-based EH personality.
WinEHFuncInfo *WinEHInfo = nullptr;
// Function-level unique numbering for MachineBasicBlocks. When a
// MachineBasicBlock is inserted into a MachineFunction is it automatically
// numbered and this vector keeps track of the mapping from ID's to MBB's.
std::vector<MachineBasicBlock*> MBBNumbering;
// Pool-allocate MachineFunction-lifetime and IR objects.
BumpPtrAllocator Allocator;
// Allocation management for instructions in function.
Recycler<MachineInstr> InstructionRecycler;
// Allocation management for operand arrays on instructions.
ArrayRecycler<MachineOperand> OperandRecycler;
// Allocation management for basic blocks in function.
Recycler<MachineBasicBlock> BasicBlockRecycler;
// List of machine basic blocks in function
using BasicBlockListType = ilist<MachineBasicBlock>;
BasicBlockListType BasicBlocks;
/// FunctionNumber - This provides a unique ID for each function emitted in
/// this translation unit.
///
unsigned FunctionNumber;
/// Alignment - The alignment of the function.
Align Alignment;
/// ExposesReturnsTwice - True if the function calls setjmp or related
/// functions with attribute "returns twice", but doesn't have
/// the attribute itself.
/// This is used to limit optimizations which cannot reason
/// about the control flow of such functions.
bool ExposesReturnsTwice = false;
/// True if the function includes any inline assembly.
bool HasInlineAsm = false;
/// True if any WinCFI instruction have been emitted in this function.
bool HasWinCFI = false;
/// Current high-level properties of the IR of the function (e.g. is in SSA
/// form or whether registers have been allocated)
MachineFunctionProperties Properties;
// Allocation management for pseudo source values.
std::unique_ptr<PseudoSourceValueManager> PSVManager;
/// List of moves done by a function's prolog. Used to construct frame maps
/// by debug and exception handling consumers.
std::vector<MCCFIInstruction> FrameInstructions;
/// List of basic blocks immediately following calls to _setjmp. Used to
/// construct a table of valid longjmp targets for Windows Control Flow Guard.
std::vector<MCSymbol *> LongjmpTargets;
/// List of basic blocks that are the target of catchrets. Used to construct
/// a table of valid targets for Windows EHCont Guard.
std::vector<MCSymbol *> CatchretTargets;
/// \name Exception Handling
/// \{
/// List of LandingPadInfo describing the landing pad information.
std::vector<LandingPadInfo> LandingPads;
/// Map a landing pad's EH symbol to the call site indexes.
DenseMap<MCSymbol*, SmallVector<unsigned, 4>> LPadToCallSiteMap;
/// Map a landing pad to its index.
DenseMap<const MachineBasicBlock *, unsigned> WasmLPadToIndexMap;
/// Map of invoke call site index values to associated begin EH_LABEL.
DenseMap<MCSymbol*, unsigned> CallSiteMap;
/// CodeView label annotations.
std::vector<std::pair<MCSymbol *, MDNode *>> CodeViewAnnotations;
bool CallsEHReturn = false;
bool CallsUnwindInit = false;
bool HasEHCatchret = false;
bool HasEHScopes = false;
bool HasEHFunclets = false;
bool IsOutlined = false;
/// BBID to assign to the next basic block of this function.
unsigned NextBBID = 0;
/// Section Type for basic blocks, only relevant with basic block sections.
BasicBlockSection BBSectionsType = BasicBlockSection::None;
/// List of C++ TypeInfo used.
std::vector<const GlobalValue *> TypeInfos;
/// List of typeids encoding filters used.
std::vector<unsigned> FilterIds;
/// List of the indices in FilterIds corresponding to filter terminators.
std::vector<unsigned> FilterEnds;
EHPersonality PersonalityTypeCache = EHPersonality::Unknown;
/// \}
/// Clear all the members of this MachineFunction, but the ones used
/// to initialize again the MachineFunction.
/// More specifically, this deallocates all the dynamically allocated
/// objects and get rid of all the XXXInfo data structure, but keep
/// unchanged the references to Fn, Target, MMI, and FunctionNumber.
void clear();
/// Allocate and initialize the different members.
/// In particular, the XXXInfo data structure.
/// \pre Fn, Target, MMI, and FunctionNumber are properly set.
void init();
public:
/// Description of the location of a variable whose Address is valid and
/// unchanging during function execution. The Address may be:
/// * A stack index, which can be negative for fixed stack objects.
/// * A MCRegister, whose entry value contains the address of the variable.
class VariableDbgInfo {
std::variant<int, MCRegister> Address;
public:
const DILocalVariable *Var;
const DIExpression *Expr;
const DILocation *Loc;
VariableDbgInfo(const DILocalVariable *Var, const DIExpression *Expr,
int Slot, const DILocation *Loc)
: Address(Slot), Var(Var), Expr(Expr), Loc(Loc) {}
VariableDbgInfo(const DILocalVariable *Var, const DIExpression *Expr,
MCRegister EntryValReg, const DILocation *Loc)
: Address(EntryValReg), Var(Var), Expr(Expr), Loc(Loc) {}
/// Return true if this variable is in a stack slot.
bool inStackSlot() const { return std::holds_alternative<int>(Address); }
/// Return true if this variable is in the entry value of a register.
bool inEntryValueRegister() const {
return std::holds_alternative<MCRegister>(Address);
}
/// Returns the stack slot of this variable, assuming `inStackSlot()` is
/// true.
int getStackSlot() const { return std::get<int>(Address); }
/// Returns the MCRegister of this variable, assuming
/// `inEntryValueRegister()` is true.
MCRegister getEntryValueRegister() const {
return std::get<MCRegister>(Address);
}
/// Updates the stack slot of this variable, assuming `inStackSlot()` is
/// true.
void updateStackSlot(int NewSlot) {
assert(inStackSlot());
Address = NewSlot;
}
};
class Delegate {
virtual void anchor();
public:
virtual ~Delegate() = default;
/// Callback after an insertion. This should not modify the MI directly.
virtual void MF_HandleInsertion(MachineInstr &MI) = 0;
/// Callback before a removal. This should not modify the MI directly.
virtual void MF_HandleRemoval(MachineInstr &MI) = 0;
};
/// Structure used to represent pair of argument number after call lowering
/// and register used to transfer that argument.
/// For now we support only cases when argument is transferred through one
/// register.
struct ArgRegPair {
Register Reg;
uint16_t ArgNo;
ArgRegPair(Register R, unsigned Arg) : Reg(R), ArgNo(Arg) {
assert(Arg < (1 << 16) && "Arg out of range");
}
};
/// Vector of call argument and its forwarding register.
using CallSiteInfo = SmallVector<ArgRegPair, 1>;
using CallSiteInfoImpl = SmallVectorImpl<ArgRegPair>;
private:
Delegate *TheDelegate = nullptr;
GISelChangeObserver *Observer = nullptr;
using CallSiteInfoMap = DenseMap<const MachineInstr *, CallSiteInfo>;
/// Map a call instruction to call site arguments forwarding info.
CallSiteInfoMap CallSitesInfo;
/// A helper function that returns call site info for a give call
/// instruction if debug entry value support is enabled.
CallSiteInfoMap::iterator getCallSiteInfo(const MachineInstr *MI);
// Callbacks for insertion and removal.
void handleInsertion(MachineInstr &MI);
void handleRemoval(MachineInstr &MI);
friend struct ilist_traits<MachineInstr>;
public:
using VariableDbgInfoMapTy = SmallVector<VariableDbgInfo, 4>;
VariableDbgInfoMapTy VariableDbgInfos;
/// A count of how many instructions in the function have had numbers
/// assigned to them. Used for debug value tracking, to determine the
/// next instruction number.
unsigned DebugInstrNumberingCount = 0;
/// Set value of DebugInstrNumberingCount field. Avoid using this unless
/// you're deserializing this data.
void setDebugInstrNumberingCount(unsigned Num);
/// Pair of instruction number and operand number.
using DebugInstrOperandPair = std::pair<unsigned, unsigned>;
/// Replacement definition for a debug instruction reference. Made up of a
/// source instruction / operand pair, destination pair, and a qualifying
/// subregister indicating what bits in the operand make up the substitution.
// For example, a debug user
/// of %1:
/// %0:gr32 = someinst, debug-instr-number 1
/// %1:gr16 = %0.some_16_bit_subreg, debug-instr-number 2
/// Would receive the substitution {{2, 0}, {1, 0}, $subreg}, where $subreg is
/// the subregister number for some_16_bit_subreg.
class DebugSubstitution {
public:
DebugInstrOperandPair Src; ///< Source instruction / operand pair.
DebugInstrOperandPair Dest; ///< Replacement instruction / operand pair.
unsigned Subreg; ///< Qualifier for which part of Dest is read.
DebugSubstitution(const DebugInstrOperandPair &Src,
const DebugInstrOperandPair &Dest, unsigned Subreg)
: Src(Src), Dest(Dest), Subreg(Subreg) {}
/// Order only by source instruction / operand pair: there should never
/// be duplicate entries for the same source in any collection.
bool operator<(const DebugSubstitution &Other) const {
return Src < Other.Src;
}
};
/// Debug value substitutions: a collection of DebugSubstitution objects,
/// recording changes in where a value is defined. For example, when one
/// instruction is substituted for another. Keeping a record allows recovery
/// of variable locations after compilation finishes.
SmallVector<DebugSubstitution, 8> DebugValueSubstitutions;
/// Location of a PHI instruction that is also a debug-info variable value,
/// for the duration of register allocation. Loaded by the PHI-elimination
/// pass, and emitted as DBG_PHI instructions during VirtRegRewriter, with
/// maintenance applied by intermediate passes that edit registers (such as
/// coalescing and the allocator passes).
class DebugPHIRegallocPos {
public:
MachineBasicBlock *MBB; ///< Block where this PHI was originally located.
Register Reg; ///< VReg where the control-flow-merge happens.
unsigned SubReg; ///< Optional subreg qualifier within Reg.
DebugPHIRegallocPos(MachineBasicBlock *MBB, Register Reg, unsigned SubReg)
: MBB(MBB), Reg(Reg), SubReg(SubReg) {}
};
/// Map of debug instruction numbers to the position of their PHI instructions
/// during register allocation. See DebugPHIRegallocPos.
DenseMap<unsigned, DebugPHIRegallocPos> DebugPHIPositions;
/// Flag for whether this function contains DBG_VALUEs (false) or
/// DBG_INSTR_REF (true).
bool UseDebugInstrRef = false;
/// Create a substitution between one <instr,operand> value to a different,
/// new value.
void makeDebugValueSubstitution(DebugInstrOperandPair, DebugInstrOperandPair,
unsigned SubReg = 0);
/// Create substitutions for any tracked values in \p Old, to point at
/// \p New. Needed when we re-create an instruction during optimization,
/// which has the same signature (i.e., def operands in the same place) but
/// a modified instruction type, flags, or otherwise. An example: X86 moves
/// are sometimes transformed into equivalent LEAs.
/// If the two instructions are not the same opcode, limit which operands to
/// examine for substitutions to the first N operands by setting
/// \p MaxOperand.
void substituteDebugValuesForInst(const MachineInstr &Old, MachineInstr &New,
unsigned MaxOperand = UINT_MAX);
/// Find the underlying defining instruction / operand for a COPY instruction
/// while in SSA form. Copies do not actually define values -- they move them
/// between registers. Labelling a COPY-like instruction with an instruction
/// number is to be avoided as it makes value numbers non-unique later in
/// compilation. This method follows the definition chain for any sequence of
/// COPY-like instructions to find whatever non-COPY-like instruction defines
/// the copied value; or for parameters, creates a DBG_PHI on entry.
/// May insert instructions into the entry block!
/// \p MI The copy-like instruction to salvage.
/// \p DbgPHICache A container to cache already-solved COPYs.
/// \returns An instruction/operand pair identifying the defining value.
DebugInstrOperandPair
salvageCopySSA(MachineInstr &MI,
DenseMap<Register, DebugInstrOperandPair> &DbgPHICache);
DebugInstrOperandPair salvageCopySSAImpl(MachineInstr &MI);
/// Finalise any partially emitted debug instructions. These are DBG_INSTR_REF
/// instructions where we only knew the vreg of the value they use, not the
/// instruction that defines that vreg. Once isel finishes, we should have
/// enough information for every DBG_INSTR_REF to point at an instruction
/// (or DBG_PHI).
void finalizeDebugInstrRefs();
/// Determine whether, in the current machine configuration, we should use
/// instruction referencing or not.
bool shouldUseDebugInstrRef() const;
/// Returns true if the function's variable locations are tracked with
/// instruction referencing.
bool useDebugInstrRef() const;
/// Set whether this function will use instruction referencing or not.
void setUseDebugInstrRef(bool UseInstrRef);
/// A reserved operand number representing the instructions memory operand,
/// for instructions that have a stack spill fused into them.
const static unsigned int DebugOperandMemNumber;
MachineFunction(Function &F, const LLVMTargetMachine &Target,
const TargetSubtargetInfo &STI, unsigned FunctionNum,
MachineModuleInfo &MMI);
MachineFunction(const MachineFunction &) = delete;
MachineFunction &operator=(const MachineFunction &) = delete;
~MachineFunction();
/// Reset the instance as if it was just created.
void reset() {
clear();
init();
}
/// Reset the currently registered delegate - otherwise assert.
void resetDelegate(Delegate *delegate) {
assert(TheDelegate == delegate &&
"Only the current delegate can perform reset!");
TheDelegate = nullptr;
}
/// Set the delegate. resetDelegate must be called before attempting
/// to set.
void setDelegate(Delegate *delegate) {
assert(delegate && !TheDelegate &&
"Attempted to set delegate to null, or to change it without "
"first resetting it!");
TheDelegate = delegate;
}
void setObserver(GISelChangeObserver *O) { Observer = O; }
GISelChangeObserver *getObserver() const { return Observer; }
MachineModuleInfo &getMMI() const { return MMI; }
MCContext &getContext() const { return Ctx; }
/// Returns the Section this function belongs to.
MCSection *getSection() const { return Section; }
/// Indicates the Section this function belongs to.
void setSection(MCSection *S) { Section = S; }
PseudoSourceValueManager &getPSVManager() const { return *PSVManager; }
/// Return the DataLayout attached to the Module associated to this MF.
const DataLayout &getDataLayout() const;
/// Return the LLVM function that this machine code represents
Function &getFunction() { return F; }
/// Return the LLVM function that this machine code represents
const Function &getFunction() const { return F; }
/// getName - Return the name of the corresponding LLVM function.
StringRef getName() const;
/// getFunctionNumber - Return a unique ID for the current function.
unsigned getFunctionNumber() const { return FunctionNumber; }
/// Returns true if this function has basic block sections enabled.
bool hasBBSections() const {
return (BBSectionsType == BasicBlockSection::All ||
BBSectionsType == BasicBlockSection::List ||
BBSectionsType == BasicBlockSection::Preset);
}
/// Returns true if basic block labels are to be generated for this function.
bool hasBBLabels() const {
return BBSectionsType == BasicBlockSection::Labels;
}
void setBBSectionsType(BasicBlockSection V) { BBSectionsType = V; }
/// Assign IsBeginSection IsEndSection fields for basic blocks in this
/// function.
void assignBeginEndSections();
/// getTarget - Return the target machine this machine code is compiled with
const LLVMTargetMachine &getTarget() const { return Target; }
/// getSubtarget - Return the subtarget for which this machine code is being
/// compiled.
const TargetSubtargetInfo &getSubtarget() const { return *STI; }
/// getSubtarget - This method returns a pointer to the specified type of
/// TargetSubtargetInfo. In debug builds, it verifies that the object being
/// returned is of the correct type.
template<typename STC> const STC &getSubtarget() const {
return *static_cast<const STC *>(STI);
}
/// getRegInfo - Return information about the registers currently in use.
MachineRegisterInfo &getRegInfo() { return *RegInfo; }
const MachineRegisterInfo &getRegInfo() const { return *RegInfo; }
/// getFrameInfo - Return the frame info object for the current function.
/// This object contains information about objects allocated on the stack
/// frame of the current function in an abstract way.
MachineFrameInfo &getFrameInfo() { return *FrameInfo; }
const MachineFrameInfo &getFrameInfo() const { return *FrameInfo; }
/// getJumpTableInfo - Return the jump table info object for the current
/// function. This object contains information about jump tables in the
/// current function. If the current function has no jump tables, this will
/// return null.
const MachineJumpTableInfo *getJumpTableInfo() const { return JumpTableInfo; }
MachineJumpTableInfo *getJumpTableInfo() { return JumpTableInfo; }
/// getOrCreateJumpTableInfo - Get the JumpTableInfo for this function, if it
/// does already exist, allocate one.
MachineJumpTableInfo *getOrCreateJumpTableInfo(unsigned JTEntryKind);
/// getConstantPool - Return the constant pool object for the current
/// function.
MachineConstantPool *getConstantPool() { return ConstantPool; }
const MachineConstantPool *getConstantPool() const { return ConstantPool; }
/// getWasmEHFuncInfo - Return information about how the current function uses
/// Wasm exception handling. Returns null for functions that don't use wasm
/// exception handling.
const WasmEHFuncInfo *getWasmEHFuncInfo() const { return WasmEHInfo; }
WasmEHFuncInfo *getWasmEHFuncInfo() { return WasmEHInfo; }
/// getWinEHFuncInfo - Return information about how the current function uses
/// Windows exception handling. Returns null for functions that don't use
/// funclets for exception handling.
const WinEHFuncInfo *getWinEHFuncInfo() const { return WinEHInfo; }
WinEHFuncInfo *getWinEHFuncInfo() { return WinEHInfo; }
/// getAlignment - Return the alignment of the function.
Align getAlignment() const { return Alignment; }
/// setAlignment - Set the alignment of the function.
void setAlignment(Align A) { Alignment = A; }
/// ensureAlignment - Make sure the function is at least A bytes aligned.
void ensureAlignment(Align A) {
if (Alignment < A)
Alignment = A;
}
/// exposesReturnsTwice - Returns true if the function calls setjmp or
/// any other similar functions with attribute "returns twice" without
/// having the attribute itself.
bool exposesReturnsTwice() const {
return ExposesReturnsTwice;
}
/// setCallsSetJmp - Set a flag that indicates if there's a call to
/// a "returns twice" function.
void setExposesReturnsTwice(bool B) {
ExposesReturnsTwice = B;
}
/// Returns true if the function contains any inline assembly.
bool hasInlineAsm() const {
return HasInlineAsm;
}
/// Set a flag that indicates that the function contains inline assembly.
void setHasInlineAsm(bool B) {
HasInlineAsm = B;
}
bool hasWinCFI() const {
return HasWinCFI;
}
void setHasWinCFI(bool v) { HasWinCFI = v; }
/// True if this function needs frame moves for debug or exceptions.
bool needsFrameMoves() const;
/// Get the function properties
const MachineFunctionProperties &getProperties() const { return Properties; }
MachineFunctionProperties &getProperties() { return Properties; }
/// getInfo - Keep track of various per-function pieces of information for
/// backends that would like to do so.
///
template<typename Ty>
Ty *getInfo() {
return static_cast<Ty*>(MFInfo);
}
template<typename Ty>
const Ty *getInfo() const {
return static_cast<const Ty *>(MFInfo);
}
template <typename Ty> Ty *cloneInfo(const Ty &Old) {
assert(!MFInfo);
MFInfo = Ty::template create<Ty>(Allocator, Old);
return static_cast<Ty *>(MFInfo);
}
/// Initialize the target specific MachineFunctionInfo
void initTargetMachineFunctionInfo(const TargetSubtargetInfo &STI);
MachineFunctionInfo *cloneInfoFrom(
const MachineFunction &OrigMF,
const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB) {
assert(!MFInfo && "new function already has MachineFunctionInfo");
if (!OrigMF.MFInfo)
return nullptr;
return OrigMF.MFInfo->clone(Allocator, *this, Src2DstMBB);
}
/// Returns the denormal handling type for the default rounding mode of the
/// function.
DenormalMode getDenormalMode(const fltSemantics &FPType) const;
/// getBlockNumbered - MachineBasicBlocks are automatically numbered when they
/// are inserted into the machine function. The block number for a machine
/// basic block can be found by using the MBB::getNumber method, this method
/// provides the inverse mapping.
MachineBasicBlock *getBlockNumbered(unsigned N) const {
assert(N < MBBNumbering.size() && "Illegal block number");
assert(MBBNumbering[N] && "Block was removed from the machine function!");
return MBBNumbering[N];
}
/// Should we be emitting segmented stack stuff for the function
bool shouldSplitStack() const;
/// getNumBlockIDs - Return the number of MBB ID's allocated.
unsigned getNumBlockIDs() const { return (unsigned)MBBNumbering.size(); }
/// RenumberBlocks - This discards all of the MachineBasicBlock numbers and
/// recomputes them. This guarantees that the MBB numbers are sequential,
/// dense, and match the ordering of the blocks within the function. If a
/// specific MachineBasicBlock is specified, only that block and those after
/// it are renumbered.
void RenumberBlocks(MachineBasicBlock *MBBFrom = nullptr);
/// print - Print out the MachineFunction in a format suitable for debugging
/// to the specified stream.
void print(raw_ostream &OS, const SlotIndexes* = nullptr) const;
/// viewCFG - This function is meant for use from the debugger. You can just
/// say 'call F->viewCFG()' and a ghostview window should pop up from the
/// program, displaying the CFG of the current function with the code for each
/// basic block inside. This depends on there being a 'dot' and 'gv' program
/// in your path.
void viewCFG() const;
/// viewCFGOnly - This function is meant for use from the debugger. It works
/// just like viewCFG, but it does not include the contents of basic blocks
/// into the nodes, just the label. If you are only interested in the CFG
/// this can make the graph smaller.
///
void viewCFGOnly() const;
/// dump - Print the current MachineFunction to cerr, useful for debugger use.
void dump() const;
/// Run the current MachineFunction through the machine code verifier, useful
/// for debugger use.
/// \returns true if no problems were found.
bool verify(Pass *p = nullptr, const char *Banner = nullptr,
bool AbortOnError = true) const;
// Provide accessors for the MachineBasicBlock list...
using iterator = BasicBlockListType::iterator;
using const_iterator = BasicBlockListType::const_iterator;
using const_reverse_iterator = BasicBlockListType::const_reverse_iterator;
using reverse_iterator = BasicBlockListType::reverse_iterator;
/// Support for MachineBasicBlock::getNextNode().
static BasicBlockListType MachineFunction::*
getSublistAccess(MachineBasicBlock *) {
return &MachineFunction::BasicBlocks;
}
/// addLiveIn - Add the specified physical register as a live-in value and
/// create a corresponding virtual register for it.
Register addLiveIn(MCRegister PReg, const TargetRegisterClass *RC);
//===--------------------------------------------------------------------===//
// BasicBlock accessor functions.
//
iterator begin() { return BasicBlocks.begin(); }
const_iterator begin() const { return BasicBlocks.begin(); }
iterator end () { return BasicBlocks.end(); }
const_iterator end () const { return BasicBlocks.end(); }
reverse_iterator rbegin() { return BasicBlocks.rbegin(); }
const_reverse_iterator rbegin() const { return BasicBlocks.rbegin(); }
reverse_iterator rend () { return BasicBlocks.rend(); }
const_reverse_iterator rend () const { return BasicBlocks.rend(); }
unsigned size() const { return (unsigned)BasicBlocks.size();}
bool empty() const { return BasicBlocks.empty(); }
const MachineBasicBlock &front() const { return BasicBlocks.front(); }
MachineBasicBlock &front() { return BasicBlocks.front(); }
const MachineBasicBlock & back() const { return BasicBlocks.back(); }
MachineBasicBlock & back() { return BasicBlocks.back(); }
void push_back (MachineBasicBlock *MBB) { BasicBlocks.push_back (MBB); }
void push_front(MachineBasicBlock *MBB) { BasicBlocks.push_front(MBB); }
void insert(iterator MBBI, MachineBasicBlock *MBB) {
BasicBlocks.insert(MBBI, MBB);
}
void splice(iterator InsertPt, iterator MBBI) {
BasicBlocks.splice(InsertPt, BasicBlocks, MBBI);
}
void splice(iterator InsertPt, MachineBasicBlock *MBB) {
BasicBlocks.splice(InsertPt, BasicBlocks, MBB);
}
void splice(iterator InsertPt, iterator MBBI, iterator MBBE) {
BasicBlocks.splice(InsertPt, BasicBlocks, MBBI, MBBE);
}
void remove(iterator MBBI) { BasicBlocks.remove(MBBI); }
void remove(MachineBasicBlock *MBBI) { BasicBlocks.remove(MBBI); }
void erase(iterator MBBI) { BasicBlocks.erase(MBBI); }
void erase(MachineBasicBlock *MBBI) { BasicBlocks.erase(MBBI); }
template <typename Comp>
void sort(Comp comp) {
BasicBlocks.sort(comp);
}
/// Return the number of \p MachineInstrs in this \p MachineFunction.
unsigned getInstructionCount() const {
unsigned InstrCount = 0;
for (const MachineBasicBlock &MBB : BasicBlocks)
InstrCount += MBB.size();
return InstrCount;
}
//===--------------------------------------------------------------------===//
// Internal functions used to automatically number MachineBasicBlocks
/// Adds the MBB to the internal numbering. Returns the unique number
/// assigned to the MBB.
unsigned addToMBBNumbering(MachineBasicBlock *MBB) {
MBBNumbering.push_back(MBB);
return (unsigned)MBBNumbering.size()-1;
}
/// removeFromMBBNumbering - Remove the specific machine basic block from our
/// tracker, this is only really to be used by the MachineBasicBlock
/// implementation.
void removeFromMBBNumbering(unsigned N) {
assert(N < MBBNumbering.size() && "Illegal basic block #");
MBBNumbering[N] = nullptr;
}
/// CreateMachineInstr - Allocate a new MachineInstr. Use this instead
/// of `new MachineInstr'.
MachineInstr *CreateMachineInstr(const MCInstrDesc &MCID, DebugLoc DL,
bool NoImplicit = false);
/// Create a new MachineInstr which is a copy of \p Orig, identical in all
/// ways except the instruction has no parent, prev, or next. Bundling flags
/// are reset.
///
/// Note: Clones a single instruction, not whole instruction bundles.
/// Does not perform target specific adjustments; consider using
/// TargetInstrInfo::duplicate() instead.
MachineInstr *CloneMachineInstr(const MachineInstr *Orig);
/// Clones instruction or the whole instruction bundle \p Orig and insert
/// into \p MBB before \p InsertBefore.
///
/// Note: Does not perform target specific adjustments; consider using
/// TargetInstrInfo::duplicate() intead.
MachineInstr &
cloneMachineInstrBundle(MachineBasicBlock &MBB,
MachineBasicBlock::iterator InsertBefore,
const MachineInstr &Orig);
/// DeleteMachineInstr - Delete the given MachineInstr.
void deleteMachineInstr(MachineInstr *MI);
/// CreateMachineBasicBlock - Allocate a new MachineBasicBlock. Use this
/// instead of `new MachineBasicBlock'.
MachineBasicBlock *CreateMachineBasicBlock(const BasicBlock *bb = nullptr);
/// DeleteMachineBasicBlock - Delete the given MachineBasicBlock.
void deleteMachineBasicBlock(MachineBasicBlock *MBB);
/// getMachineMemOperand - Allocate a new MachineMemOperand.
/// MachineMemOperands are owned by the MachineFunction and need not be
/// explicitly deallocated.
MachineMemOperand *getMachineMemOperand(
MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s,
Align base_alignment, const AAMDNodes &AAInfo = AAMDNodes(),
const MDNode *Ranges = nullptr, SyncScope::ID SSID = SyncScope::System,
AtomicOrdering Ordering = AtomicOrdering::NotAtomic,
AtomicOrdering FailureOrdering = AtomicOrdering::NotAtomic);
MachineMemOperand *getMachineMemOperand(
MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, LLT MemTy,
Align base_alignment, const AAMDNodes &AAInfo = AAMDNodes(),
const MDNode *Ranges = nullptr, SyncScope::ID SSID = SyncScope::System,
AtomicOrdering Ordering = AtomicOrdering::NotAtomic,
AtomicOrdering FailureOrdering = AtomicOrdering::NotAtomic);
/// getMachineMemOperand - Allocate a new MachineMemOperand by copying
/// an existing one, adjusting by an offset and using the given size.
/// MachineMemOperands are owned by the MachineFunction and need not be
/// explicitly deallocated.
MachineMemOperand *getMachineMemOperand(const MachineMemOperand *MMO,
int64_t Offset, LLT Ty);
MachineMemOperand *getMachineMemOperand(const MachineMemOperand *MMO,
int64_t Offset, uint64_t Size) {
return getMachineMemOperand(
MMO, Offset, Size == ~UINT64_C(0) ? LLT() : LLT::scalar(8 * Size));
}
/// getMachineMemOperand - Allocate a new MachineMemOperand by copying
/// an existing one, replacing only the MachinePointerInfo and size.
/// MachineMemOperands are owned by the MachineFunction and need not be
/// explicitly deallocated.
MachineMemOperand *getMachineMemOperand(const MachineMemOperand *MMO,
const MachinePointerInfo &PtrInfo,
uint64_t Size);
MachineMemOperand *getMachineMemOperand(const MachineMemOperand *MMO,
const MachinePointerInfo &PtrInfo,
LLT Ty);
/// Allocate a new MachineMemOperand by copying an existing one,
/// replacing only AliasAnalysis information. MachineMemOperands are owned
/// by the MachineFunction and need not be explicitly deallocated.
MachineMemOperand *getMachineMemOperand(const MachineMemOperand *MMO,
const AAMDNodes &AAInfo);
/// Allocate a new MachineMemOperand by copying an existing one,
/// replacing the flags. MachineMemOperands are owned
/// by the MachineFunction and need not be explicitly deallocated.
MachineMemOperand *getMachineMemOperand(const MachineMemOperand *MMO,
MachineMemOperand::Flags Flags);
using OperandCapacity = ArrayRecycler<MachineOperand>::Capacity;
/// Allocate an array of MachineOperands. This is only intended for use by
/// internal MachineInstr functions.
MachineOperand *allocateOperandArray(OperandCapacity Cap) {
return OperandRecycler.allocate(Cap, Allocator);
}
/// Dellocate an array of MachineOperands and recycle the memory. This is
/// only intended for use by internal MachineInstr functions.
/// Cap must be the same capacity that was used to allocate the array.
void deallocateOperandArray(OperandCapacity Cap, MachineOperand *Array) {
OperandRecycler.deallocate(Cap, Array);
}
/// Allocate and initialize a register mask with @p NumRegister bits.
uint32_t *allocateRegMask();
ArrayRef<int> allocateShuffleMask(ArrayRef<int> Mask);
/// Allocate and construct an extra info structure for a `MachineInstr`.
///
/// This is allocated on the function's allocator and so lives the life of
/// the function.
MachineInstr::ExtraInfo *createMIExtraInfo(
ArrayRef<MachineMemOperand *> MMOs, MCSymbol *PreInstrSymbol = nullptr,
MCSymbol *PostInstrSymbol = nullptr, MDNode *HeapAllocMarker = nullptr,
MDNode *PCSections = nullptr, uint32_t CFIType = 0);
/// Allocate a string and populate it with the given external symbol name.
const char *createExternalSymbolName(StringRef Name);
//===--------------------------------------------------------------------===//
// Label Manipulation.
/// getJTISymbol - Return the MCSymbol for the specified non-empty jump table.
/// If isLinkerPrivate is specified, an 'l' label is returned, otherwise a
/// normal 'L' label is returned.
MCSymbol *getJTISymbol(unsigned JTI, MCContext &Ctx,
bool isLinkerPrivate = false) const;
/// getPICBaseSymbol - Return a function-local symbol to represent the PIC
/// base.
MCSymbol *getPICBaseSymbol() const;
/// Returns a reference to a list of cfi instructions in the function's
/// prologue. Used to construct frame maps for debug and exception handling
/// comsumers.
const std::vector<MCCFIInstruction> &getFrameInstructions() const {
return FrameInstructions;
}
[[nodiscard]] unsigned addFrameInst(const MCCFIInstruction &Inst);
/// Returns a reference to a list of symbols immediately following calls to
/// _setjmp in the function. Used to construct the longjmp target table used
/// by Windows Control Flow Guard.
const std::vector<MCSymbol *> &getLongjmpTargets() const {
return LongjmpTargets;
}
/// Add the specified symbol to the list of valid longjmp targets for Windows
/// Control Flow Guard.
void addLongjmpTarget(MCSymbol *Target) { LongjmpTargets.push_back(Target); }
/// Returns a reference to a list of symbols that we have catchrets.
/// Used to construct the catchret target table used by Windows EHCont Guard.
const std::vector<MCSymbol *> &getCatchretTargets() const {
return CatchretTargets;
}
/// Add the specified symbol to the list of valid catchret targets for Windows
/// EHCont Guard.
void addCatchretTarget(MCSymbol *Target) {
CatchretTargets.push_back(Target);
}
/// \name Exception Handling
/// \{
bool callsEHReturn() const { return CallsEHReturn; }
void setCallsEHReturn(bool b) { CallsEHReturn = b; }
bool callsUnwindInit() const { return CallsUnwindInit; }
void setCallsUnwindInit(bool b) { CallsUnwindInit = b; }
bool hasEHCatchret() const { return HasEHCatchret; }
void setHasEHCatchret(bool V) { HasEHCatchret = V; }
bool hasEHScopes() const { return HasEHScopes; }
void setHasEHScopes(bool V) { HasEHScopes = V; }
bool hasEHFunclets() const { return HasEHFunclets; }
void setHasEHFunclets(bool V) { HasEHFunclets = V; }
bool isOutlined() const { return IsOutlined; }
void setIsOutlined(bool V) { IsOutlined = V; }
/// Find or create an LandingPadInfo for the specified MachineBasicBlock.
LandingPadInfo &getOrCreateLandingPadInfo(MachineBasicBlock *LandingPad);
/// Return a reference to the landing pad info for the current function.
const std::vector<LandingPadInfo> &getLandingPads() const {
return LandingPads;
}
/// Provide the begin and end labels of an invoke style call and associate it
/// with a try landing pad block.
void addInvoke(MachineBasicBlock *LandingPad,
MCSymbol *BeginLabel, MCSymbol *EndLabel);
/// Add a new panding pad, and extract the exception handling information from
/// the landingpad instruction. Returns the label ID for the landing pad
/// entry.
MCSymbol *addLandingPad(MachineBasicBlock *LandingPad);
/// Return the type id for the specified typeinfo. This is function wide.
unsigned getTypeIDFor(const GlobalValue *TI);
/// Return the id of the filter encoded by TyIds. This is function wide.
int getFilterIDFor(ArrayRef<unsigned> TyIds);
/// Map the landing pad's EH symbol to the call site indexes.
void setCallSiteLandingPad(MCSymbol *Sym, ArrayRef<unsigned> Sites);
/// Return if there is any wasm exception handling.
bool hasAnyWasmLandingPadIndex() const {
return !WasmLPadToIndexMap.empty();
}
/// Map the landing pad to its index. Used for Wasm exception handling.
void setWasmLandingPadIndex(const MachineBasicBlock *LPad, unsigned Index) {
WasmLPadToIndexMap[LPad] = Index;
}
/// Returns true if the landing pad has an associate index in wasm EH.
bool hasWasmLandingPadIndex(const MachineBasicBlock *LPad) const {
return WasmLPadToIndexMap.count(LPad);
}
/// Get the index in wasm EH for a given landing pad.
unsigned getWasmLandingPadIndex(const MachineBasicBlock *LPad) const {
assert(hasWasmLandingPadIndex(LPad));
return WasmLPadToIndexMap.lookup(LPad);
}
bool hasAnyCallSiteLandingPad() const {
return !LPadToCallSiteMap.empty();
}
/// Get the call site indexes for a landing pad EH symbol.
SmallVectorImpl<unsigned> &getCallSiteLandingPad(MCSymbol *Sym) {
assert(hasCallSiteLandingPad(Sym) &&
"missing call site number for landing pad!");
return LPadToCallSiteMap[Sym];
}
/// Return true if the landing pad Eh symbol has an associated call site.
bool hasCallSiteLandingPad(MCSymbol *Sym) {
return !LPadToCallSiteMap[Sym].empty();
}
bool hasAnyCallSiteLabel() const {
return !CallSiteMap.empty();
}
/// Map the begin label for a call site.
void setCallSiteBeginLabel(MCSymbol *BeginLabel, unsigned Site) {
CallSiteMap[BeginLabel] = Site;
}
/// Get the call site number for a begin label.
unsigned getCallSiteBeginLabel(MCSymbol *BeginLabel) const {
assert(hasCallSiteBeginLabel(BeginLabel) &&
"Missing call site number for EH_LABEL!");
return CallSiteMap.lookup(BeginLabel);
}
/// Return true if the begin label has a call site number associated with it.
bool hasCallSiteBeginLabel(MCSymbol *BeginLabel) const {
return CallSiteMap.count(BeginLabel);
}
/// Record annotations associated with a particular label.
void addCodeViewAnnotation(MCSymbol *Label, MDNode *MD) {
CodeViewAnnotations.push_back({Label, MD});
}
ArrayRef<std::pair<MCSymbol *, MDNode *>> getCodeViewAnnotations() const {
return CodeViewAnnotations;
}
/// Return a reference to the C++ typeinfo for the current function.
const std::vector<const GlobalValue *> &getTypeInfos() const {
return TypeInfos;
}
/// Return a reference to the typeids encoding filters used in the current
/// function.
const std::vector<unsigned> &getFilterIds() const {
return FilterIds;
}
/// \}
/// Collect information used to emit debugging information of a variable in a
/// stack slot.
void setVariableDbgInfo(const DILocalVariable *Var, const DIExpression *Expr,
int Slot, const DILocation *Loc) {
VariableDbgInfos.emplace_back(Var, Expr, Slot, Loc);
}
/// Collect information used to emit debugging information of a variable in
/// the entry value of a register.
void setVariableDbgInfo(const DILocalVariable *Var, const DIExpression *Expr,
MCRegister Reg, const DILocation *Loc) {
VariableDbgInfos.emplace_back(Var, Expr, Reg, Loc);
}
VariableDbgInfoMapTy &getVariableDbgInfo() { return VariableDbgInfos; }
const VariableDbgInfoMapTy &getVariableDbgInfo() const {
return VariableDbgInfos;
}
/// Returns the collection of variables for which we have debug info and that
/// have been assigned a stack slot.
auto getInStackSlotVariableDbgInfo() {
return make_filter_range(getVariableDbgInfo(), [](auto &VarInfo) {
return VarInfo.inStackSlot();
});
}
/// Returns the collection of variables for which we have debug info and that
/// have been assigned a stack slot.
auto getInStackSlotVariableDbgInfo() const {
return make_filter_range(getVariableDbgInfo(), [](const auto &VarInfo) {
return VarInfo.inStackSlot();
});
}
/// Returns the collection of variables for which we have debug info and that
/// have been assigned an entry value register.
auto getEntryValueVariableDbgInfo() const {
return make_filter_range(getVariableDbgInfo(), [](const auto &VarInfo) {
return VarInfo.inEntryValueRegister();
});
}
/// Start tracking the arguments passed to the call \p CallI.
void addCallArgsForwardingRegs(const MachineInstr *CallI,
CallSiteInfoImpl &&CallInfo) {
assert(CallI->isCandidateForCallSiteEntry());
bool Inserted =
CallSitesInfo.try_emplace(CallI, std::move(CallInfo)).second;
(void)Inserted;
assert(Inserted && "Call site info not unique");
}
const CallSiteInfoMap &getCallSitesInfo() const {
return CallSitesInfo;
}
/// Following functions update call site info. They should be called before
/// removing, replacing or copying call instruction.
/// Erase the call site info for \p MI. It is used to remove a call
/// instruction from the instruction stream.
void eraseCallSiteInfo(const MachineInstr *MI);
/// Copy the call site info from \p Old to \ New. Its usage is when we are
/// making a copy of the instruction that will be inserted at different point
/// of the instruction stream.
void copyCallSiteInfo(const MachineInstr *Old,
const MachineInstr *New);
/// Move the call site info from \p Old to \New call site info. This function
/// is used when we are replacing one call instruction with another one to
/// the same callee.
void moveCallSiteInfo(const MachineInstr *Old,
const MachineInstr *New);
unsigned getNewDebugInstrNum() {
return ++DebugInstrNumberingCount;
}
};
//===--------------------------------------------------------------------===//
// GraphTraits specializations for function basic block graphs (CFGs)
//===--------------------------------------------------------------------===//
// Provide specializations of GraphTraits to be able to treat a
// machine function as a graph of machine basic blocks... these are
// the same as the machine basic block iterators, except that the root
// node is implicitly the first node of the function.
//
template <> struct GraphTraits<MachineFunction*> :
public GraphTraits<MachineBasicBlock*> {
static NodeRef getEntryNode(MachineFunction *F) { return &F->front(); }
// nodes_iterator/begin/end - Allow iteration over all nodes in the graph
using nodes_iterator = pointer_iterator<MachineFunction::iterator>;
static nodes_iterator nodes_begin(MachineFunction *F) {
return nodes_iterator(F->begin());
}
static nodes_iterator nodes_end(MachineFunction *F) {
return nodes_iterator(F->end());
}
static unsigned size (MachineFunction *F) { return F->size(); }
};
template <> struct GraphTraits<const MachineFunction*> :
public GraphTraits<const MachineBasicBlock*> {
static NodeRef getEntryNode(const MachineFunction *F) { return &F->front(); }
// nodes_iterator/begin/end - Allow iteration over all nodes in the graph
using nodes_iterator = pointer_iterator<MachineFunction::const_iterator>;
static nodes_iterator nodes_begin(const MachineFunction *F) {
return nodes_iterator(F->begin());
}
static nodes_iterator nodes_end (const MachineFunction *F) {
return nodes_iterator(F->end());
}
static unsigned size (const MachineFunction *F) {
return F->size();
}
};
// Provide specializations of GraphTraits to be able to treat a function as a
// graph of basic blocks... and to walk it in inverse order. Inverse order for
// a function is considered to be when traversing the predecessor edges of a BB
// instead of the successor edges.
//
template <> struct GraphTraits<Inverse<MachineFunction*>> :
public GraphTraits<Inverse<MachineBasicBlock*>> {
static NodeRef getEntryNode(Inverse<MachineFunction *> G) {
return &G.Graph->front();
}
};
template <> struct GraphTraits<Inverse<const MachineFunction*>> :
public GraphTraits<Inverse<const MachineBasicBlock*>> {
static NodeRef getEntryNode(Inverse<const MachineFunction *> G) {
return &G.Graph->front();
}
};
class MachineFunctionAnalysisManager;
void verifyMachineFunction(MachineFunctionAnalysisManager *,
const std::string &Banner,
const MachineFunction &MF);
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINEFUNCTION_H
PK iwFZœXg� � & CodeGen/MachineBranchProbabilityInfo.hnu �[��� //=- MachineBranchProbabilityInfo.h - Branch Probability Analysis -*- C++ -*-=//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This pass is used to evaluate branch probabilties on machine basic blocks.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEBRANCHPROBABILITYINFO_H
#define LLVM_CODEGEN_MACHINEBRANCHPROBABILITYINFO_H
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/Pass.h"
#include "llvm/Support/BranchProbability.h"
namespace llvm {
class MachineBranchProbabilityInfo : public ImmutablePass {
virtual void anchor();
// Default weight value. Used when we don't have information about the edge.
// TODO: DEFAULT_WEIGHT makes sense during static predication, when none of
// the successors have a weight yet. But it doesn't make sense when providing
// weight to an edge that may have siblings with non-zero weights. This can
// be handled various ways, but it's probably fine for an edge with unknown
// weight to just "inherit" the non-zero weight of an adjacent successor.
static const uint32_t DEFAULT_WEIGHT = 16;
public:
static char ID;
MachineBranchProbabilityInfo();
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
}
// Return edge probability.
BranchProbability getEdgeProbability(const MachineBasicBlock *Src,
const MachineBasicBlock *Dst) const;
// Same as above, but using a const_succ_iterator from Src. This is faster
// when the iterator is already available.
BranchProbability
getEdgeProbability(const MachineBasicBlock *Src,
MachineBasicBlock::const_succ_iterator Dst) const;
// A 'Hot' edge is an edge which probability is >= 80%.
bool isEdgeHot(const MachineBasicBlock *Src,
const MachineBasicBlock *Dst) const;
// Print value between 0 (0% probability) and 1 (100% probability),
// however the value is never equal to 0, and can be 1 only iff SRC block
// has only one successor.
raw_ostream &printEdgeProbability(raw_ostream &OS,
const MachineBasicBlock *Src,
const MachineBasicBlock *Dst) const;
};
}
#endif
PK iwFZ�[��, , CodeGen/MachineJumpTableInfo.hnu �[��� //===-- CodeGen/MachineJumpTableInfo.h - Abstract Jump Tables --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// The MachineJumpTableInfo class keeps track of jump tables referenced by
// lowered switch instructions in the MachineFunction.
//
// Instructions reference the address of these jump tables through the use of
// MO_JumpTableIndex values. When emitting assembly or machine code, these
// virtual address references are converted to refer to the address of the
// function jump tables.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEJUMPTABLEINFO_H
#define LLVM_CODEGEN_MACHINEJUMPTABLEINFO_H
#include "llvm/Support/Printable.h"
#include <cassert>
#include <vector>
namespace llvm {
class MachineBasicBlock;
class DataLayout;
class raw_ostream;
/// MachineJumpTableEntry - One jump table in the jump table info.
///
struct MachineJumpTableEntry {
/// MBBs - The vector of basic blocks from which to create the jump table.
std::vector<MachineBasicBlock*> MBBs;
explicit MachineJumpTableEntry(const std::vector<MachineBasicBlock*> &M)
: MBBs(M) {}
};
class MachineJumpTableInfo {
public:
/// JTEntryKind - This enum indicates how each entry of the jump table is
/// represented and emitted.
enum JTEntryKind {
/// EK_BlockAddress - Each entry is a plain address of block, e.g.:
/// .word LBB123
EK_BlockAddress,
/// EK_GPRel64BlockAddress - Each entry is an address of block, encoded
/// with a relocation as gp-relative, e.g.:
/// .gpdword LBB123
EK_GPRel64BlockAddress,
/// EK_GPRel32BlockAddress - Each entry is an address of block, encoded
/// with a relocation as gp-relative, e.g.:
/// .gprel32 LBB123
EK_GPRel32BlockAddress,
/// EK_LabelDifference32 - Each entry is the address of the block minus
/// the address of the jump table. This is used for PIC jump tables where
/// gprel32 is not supported. e.g.:
/// .word LBB123 - LJTI1_2
/// If the .set directive is supported, this is emitted as:
/// .set L4_5_set_123, LBB123 - LJTI1_2
/// .word L4_5_set_123
EK_LabelDifference32,
/// EK_Inline - Jump table entries are emitted inline at their point of
/// use. It is the responsibility of the target to emit the entries.
EK_Inline,
/// EK_Custom32 - Each entry is a 32-bit value that is custom lowered by the
/// TargetLowering::LowerCustomJumpTableEntry hook.
EK_Custom32
};
private:
JTEntryKind EntryKind;
std::vector<MachineJumpTableEntry> JumpTables;
public:
explicit MachineJumpTableInfo(JTEntryKind Kind): EntryKind(Kind) {}
JTEntryKind getEntryKind() const { return EntryKind; }
/// getEntrySize - Return the size of each entry in the jump table.
unsigned getEntrySize(const DataLayout &TD) const;
/// getEntryAlignment - Return the alignment of each entry in the jump table.
unsigned getEntryAlignment(const DataLayout &TD) const;
/// createJumpTableIndex - Create a new jump table.
///
unsigned createJumpTableIndex(const std::vector<MachineBasicBlock*> &DestBBs);
/// isEmpty - Return true if there are no jump tables.
///
bool isEmpty() const { return JumpTables.empty(); }
const std::vector<MachineJumpTableEntry> &getJumpTables() const {
return JumpTables;
}
/// RemoveJumpTable - Mark the specific index as being dead. This will
/// prevent it from being emitted.
void RemoveJumpTable(unsigned Idx) {
JumpTables[Idx].MBBs.clear();
}
/// RemoveMBBFromJumpTables - If MBB is present in any jump tables, remove it.
bool RemoveMBBFromJumpTables(MachineBasicBlock *MBB);
/// ReplaceMBBInJumpTables - If Old is the target of any jump tables, update
/// the jump tables to branch to New instead.
bool ReplaceMBBInJumpTables(MachineBasicBlock *Old, MachineBasicBlock *New);
/// ReplaceMBBInJumpTable - If Old is a target of the jump tables, update
/// the jump table to branch to New instead.
bool ReplaceMBBInJumpTable(unsigned Idx, MachineBasicBlock *Old,
MachineBasicBlock *New);
/// print - Used by the MachineFunction printer to print information about
/// jump tables. Implemented in MachineFunction.cpp
///
void print(raw_ostream &OS) const;
/// dump - Call to stderr.
///
void dump() const;
};
/// Prints a jump table entry reference.
///
/// The format is:
/// %jump-table.5 - a jump table entry with index == 5.
///
/// Usage: OS << printJumpTableEntryReference(Idx) << '\n';
Printable printJumpTableEntryReference(unsigned Idx);
} // End llvm namespace
#endif
PK iwFZ��=�� � CodeGen/SelectionDAGNodes.hnu �[��� //===- llvm/CodeGen/SelectionDAGNodes.h - SelectionDAG Nodes ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the SDNode class and derived classes, which are used to
// represent the nodes and operations present in a SelectionDAG. These nodes
// and operations are machine code level operations, with some similarities to
// the GCC RTL representation.
//
// Clients should include the SelectionDAG.h file instead of this file directly.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_SELECTIONDAGNODES_H
#define LLVM_CODEGEN_SELECTIONDAGNODES_H
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/FoldingSet.h"
#include "llvm/ADT/GraphTraits.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/ilist_node.h"
#include "llvm/ADT/iterator.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineValueType.h"
#include "llvm/CodeGen/Register.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/Instruction.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/Metadata.h"
#include "llvm/IR/Operator.h"
#include "llvm/Support/AlignOf.h"
#include "llvm/Support/AtomicOrdering.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TypeSize.h"
#include <algorithm>
#include <cassert>
#include <climits>
#include <cstddef>
#include <cstdint>
#include <cstring>
#include <iterator>
#include <string>
#include <tuple>
#include <utility>
namespace llvm {
class APInt;
class Constant;
class GlobalValue;
class MachineBasicBlock;
class MachineConstantPoolValue;
class MCSymbol;
class raw_ostream;
class SDNode;
class SelectionDAG;
class Type;
class Value;
void checkForCycles(const SDNode *N, const SelectionDAG *DAG = nullptr,
bool force = false);
/// This represents a list of ValueType's that has been intern'd by
/// a SelectionDAG. Instances of this simple value class are returned by
/// SelectionDAG::getVTList(...).
///
struct SDVTList {
const EVT *VTs;
unsigned int NumVTs;
};
namespace ISD {
/// Node predicates
/// If N is a BUILD_VECTOR or SPLAT_VECTOR node whose elements are all the
/// same constant or undefined, return true and return the constant value in
/// \p SplatValue.
bool isConstantSplatVector(const SDNode *N, APInt &SplatValue);
/// Return true if the specified node is a BUILD_VECTOR or SPLAT_VECTOR where
/// all of the elements are ~0 or undef. If \p BuildVectorOnly is set to
/// true, it only checks BUILD_VECTOR.
bool isConstantSplatVectorAllOnes(const SDNode *N,
bool BuildVectorOnly = false);
/// Return true if the specified node is a BUILD_VECTOR or SPLAT_VECTOR where
/// all of the elements are 0 or undef. If \p BuildVectorOnly is set to true, it
/// only checks BUILD_VECTOR.
bool isConstantSplatVectorAllZeros(const SDNode *N,
bool BuildVectorOnly = false);
/// Return true if the specified node is a BUILD_VECTOR where all of the
/// elements are ~0 or undef.
bool isBuildVectorAllOnes(const SDNode *N);
/// Return true if the specified node is a BUILD_VECTOR where all of the
/// elements are 0 or undef.
bool isBuildVectorAllZeros(const SDNode *N);
/// Return true if the specified node is a BUILD_VECTOR node of all
/// ConstantSDNode or undef.
bool isBuildVectorOfConstantSDNodes(const SDNode *N);
/// Return true if the specified node is a BUILD_VECTOR node of all
/// ConstantFPSDNode or undef.
bool isBuildVectorOfConstantFPSDNodes(const SDNode *N);
/// Returns true if the specified node is a vector where all elements can
/// be truncated to the specified element size without a loss in meaning.
bool isVectorShrinkable(const SDNode *N, unsigned NewEltSize, bool Signed);
/// Return true if the node has at least one operand and all operands of the
/// specified node are ISD::UNDEF.
bool allOperandsUndef(const SDNode *N);
/// Return true if the specified node is FREEZE(UNDEF).
bool isFreezeUndef(const SDNode *N);
} // end namespace ISD
//===----------------------------------------------------------------------===//
/// Unlike LLVM values, Selection DAG nodes may return multiple
/// values as the result of a computation. Many nodes return multiple values,
/// from loads (which define a token and a return value) to ADDC (which returns
/// a result and a carry value), to calls (which may return an arbitrary number
/// of values).
///
/// As such, each use of a SelectionDAG computation must indicate the node that
/// computes it as well as which return value to use from that node. This pair
/// of information is represented with the SDValue value type.
///
class SDValue {
friend struct DenseMapInfo<SDValue>;
SDNode *Node = nullptr; // The node defining the value we are using.
unsigned ResNo = 0; // Which return value of the node we are using.
public:
SDValue() = default;
SDValue(SDNode *node, unsigned resno);
/// get the index which selects a specific result in the SDNode
unsigned getResNo() const { return ResNo; }
/// get the SDNode which holds the desired result
SDNode *getNode() const { return Node; }
/// set the SDNode
void setNode(SDNode *N) { Node = N; }
inline SDNode *operator->() const { return Node; }
bool operator==(const SDValue &O) const {
return Node == O.Node && ResNo == O.ResNo;
}
bool operator!=(const SDValue &O) const {
return !operator==(O);
}
bool operator<(const SDValue &O) const {
return std::tie(Node, ResNo) < std::tie(O.Node, O.ResNo);
}
explicit operator bool() const {
return Node != nullptr;
}
SDValue getValue(unsigned R) const {
return SDValue(Node, R);
}
/// Return true if this node is an operand of N.
bool isOperandOf(const SDNode *N) const;
/// Return the ValueType of the referenced return value.
inline EVT getValueType() const;
/// Return the simple ValueType of the referenced return value.
MVT getSimpleValueType() const {
return getValueType().getSimpleVT();
}
/// Returns the size of the value in bits.
///
/// If the value type is a scalable vector type, the scalable property will
/// be set and the runtime size will be a positive integer multiple of the
/// base size.
TypeSize getValueSizeInBits() const {
return getValueType().getSizeInBits();
}
uint64_t getScalarValueSizeInBits() const {
return getValueType().getScalarType().getFixedSizeInBits();
}
// Forwarding methods - These forward to the corresponding methods in SDNode.
inline unsigned getOpcode() const;
inline unsigned getNumOperands() const;
inline const SDValue &getOperand(unsigned i) const;
inline uint64_t getConstantOperandVal(unsigned i) const;
inline const APInt &getConstantOperandAPInt(unsigned i) const;
inline bool isTargetMemoryOpcode() const;
inline bool isTargetOpcode() const;
inline bool isMachineOpcode() const;
inline bool isUndef() const;
inline unsigned getMachineOpcode() const;
inline const DebugLoc &getDebugLoc() const;
inline void dump() const;
inline void dump(const SelectionDAG *G) const;
inline void dumpr() const;
inline void dumpr(const SelectionDAG *G) const;
/// Return true if this operand (which must be a chain) reaches the
/// specified operand without crossing any side-effecting instructions.
/// In practice, this looks through token factors and non-volatile loads.
/// In order to remain efficient, this only
/// looks a couple of nodes in, it does not do an exhaustive search.
bool reachesChainWithoutSideEffects(SDValue Dest,
unsigned Depth = 2) const;
/// Return true if there are no nodes using value ResNo of Node.
inline bool use_empty() const;
/// Return true if there is exactly one node using value ResNo of Node.
inline bool hasOneUse() const;
};
template<> struct DenseMapInfo<SDValue> {
static inline SDValue getEmptyKey() {
SDValue V;
V.ResNo = -1U;
return V;
}
static inline SDValue getTombstoneKey() {
SDValue V;
V.ResNo = -2U;
return V;
}
static unsigned getHashValue(const SDValue &Val) {
return ((unsigned)((uintptr_t)Val.getNode() >> 4) ^
(unsigned)((uintptr_t)Val.getNode() >> 9)) + Val.getResNo();
}
static bool isEqual(const SDValue &LHS, const SDValue &RHS) {
return LHS == RHS;
}
};
/// Allow casting operators to work directly on
/// SDValues as if they were SDNode*'s.
template<> struct simplify_type<SDValue> {
using SimpleType = SDNode *;
static SimpleType getSimplifiedValue(SDValue &Val) {
return Val.getNode();
}
};
template<> struct simplify_type<const SDValue> {
using SimpleType = /*const*/ SDNode *;
static SimpleType getSimplifiedValue(const SDValue &Val) {
return Val.getNode();
}
};
/// Represents a use of a SDNode. This class holds an SDValue,
/// which records the SDNode being used and the result number, a
/// pointer to the SDNode using the value, and Next and Prev pointers,
/// which link together all the uses of an SDNode.
///
class SDUse {
/// Val - The value being used.
SDValue Val;
/// User - The user of this value.
SDNode *User = nullptr;
/// Prev, Next - Pointers to the uses list of the SDNode referred by
/// this operand.
SDUse **Prev = nullptr;
SDUse *Next = nullptr;
public:
SDUse() = default;
SDUse(const SDUse &U) = delete;
SDUse &operator=(const SDUse &) = delete;
/// Normally SDUse will just implicitly convert to an SDValue that it holds.
operator const SDValue&() const { return Val; }
/// If implicit conversion to SDValue doesn't work, the get() method returns
/// the SDValue.
const SDValue &get() const { return Val; }
/// This returns the SDNode that contains this Use.
SDNode *getUser() { return User; }
const SDNode *getUser() const { return User; }
/// Get the next SDUse in the use list.
SDUse *getNext() const { return Next; }
/// Convenience function for get().getNode().
SDNode *getNode() const { return Val.getNode(); }
/// Convenience function for get().getResNo().
unsigned getResNo() const { return Val.getResNo(); }
/// Convenience function for get().getValueType().
EVT getValueType() const { return Val.getValueType(); }
/// Convenience function for get().operator==
bool operator==(const SDValue &V) const {
return Val == V;
}
/// Convenience function for get().operator!=
bool operator!=(const SDValue &V) const {
return Val != V;
}
/// Convenience function for get().operator<
bool operator<(const SDValue &V) const {
return Val < V;
}
private:
friend class SelectionDAG;
friend class SDNode;
// TODO: unfriend HandleSDNode once we fix its operand handling.
friend class HandleSDNode;
void setUser(SDNode *p) { User = p; }
/// Remove this use from its existing use list, assign it the
/// given value, and add it to the new value's node's use list.
inline void set(const SDValue &V);
/// Like set, but only supports initializing a newly-allocated
/// SDUse with a non-null value.
inline void setInitial(const SDValue &V);
/// Like set, but only sets the Node portion of the value,
/// leaving the ResNo portion unmodified.
inline void setNode(SDNode *N);
void addToList(SDUse **List) {
Next = *List;
if (Next) Next->Prev = &Next;
Prev = List;
*List = this;
}
void removeFromList() {
*Prev = Next;
if (Next) Next->Prev = Prev;
}
};
/// simplify_type specializations - Allow casting operators to work directly on
/// SDValues as if they were SDNode*'s.
template<> struct simplify_type<SDUse> {
using SimpleType = SDNode *;
static SimpleType getSimplifiedValue(SDUse &Val) {
return Val.getNode();
}
};
/// These are IR-level optimization flags that may be propagated to SDNodes.
/// TODO: This data structure should be shared by the IR optimizer and the
/// the backend.
struct SDNodeFlags {
private:
bool NoUnsignedWrap : 1;
bool NoSignedWrap : 1;
bool Exact : 1;
bool NoNaNs : 1;
bool NoInfs : 1;
bool NoSignedZeros : 1;
bool AllowReciprocal : 1;
bool AllowContract : 1;
bool ApproximateFuncs : 1;
bool AllowReassociation : 1;
// We assume instructions do not raise floating-point exceptions by default,
// and only those marked explicitly may do so. We could choose to represent
// this via a positive "FPExcept" flags like on the MI level, but having a
// negative "NoFPExcept" flag here makes the flag intersection logic more
// straightforward.
bool NoFPExcept : 1;
// Instructions with attached 'unpredictable' metadata on IR level.
bool Unpredictable : 1;
public:
/// Default constructor turns off all optimization flags.
SDNodeFlags()
: NoUnsignedWrap(false), NoSignedWrap(false), Exact(false), NoNaNs(false),
NoInfs(false), NoSignedZeros(false), AllowReciprocal(false),
AllowContract(false), ApproximateFuncs(false),
AllowReassociation(false), NoFPExcept(false), Unpredictable(false) {}
/// Propagate the fast-math-flags from an IR FPMathOperator.
void copyFMF(const FPMathOperator &FPMO) {
setNoNaNs(FPMO.hasNoNaNs());
setNoInfs(FPMO.hasNoInfs());
setNoSignedZeros(FPMO.hasNoSignedZeros());
setAllowReciprocal(FPMO.hasAllowReciprocal());
setAllowContract(FPMO.hasAllowContract());
setApproximateFuncs(FPMO.hasApproxFunc());
setAllowReassociation(FPMO.hasAllowReassoc());
}
// These are mutators for each flag.
void setNoUnsignedWrap(bool b) { NoUnsignedWrap = b; }
void setNoSignedWrap(bool b) { NoSignedWrap = b; }
void setExact(bool b) { Exact = b; }
void setNoNaNs(bool b) { NoNaNs = b; }
void setNoInfs(bool b) { NoInfs = b; }
void setNoSignedZeros(bool b) { NoSignedZeros = b; }
void setAllowReciprocal(bool b) { AllowReciprocal = b; }
void setAllowContract(bool b) { AllowContract = b; }
void setApproximateFuncs(bool b) { ApproximateFuncs = b; }
void setAllowReassociation(bool b) { AllowReassociation = b; }
void setNoFPExcept(bool b) { NoFPExcept = b; }
void setUnpredictable(bool b) { Unpredictable = b; }
// These are accessors for each flag.
bool hasNoUnsignedWrap() const { return NoUnsignedWrap; }
bool hasNoSignedWrap() const { return NoSignedWrap; }
bool hasExact() const { return Exact; }
bool hasNoNaNs() const { return NoNaNs; }
bool hasNoInfs() const { return NoInfs; }
bool hasNoSignedZeros() const { return NoSignedZeros; }
bool hasAllowReciprocal() const { return AllowReciprocal; }
bool hasAllowContract() const { return AllowContract; }
bool hasApproximateFuncs() const { return ApproximateFuncs; }
bool hasAllowReassociation() const { return AllowReassociation; }
bool hasNoFPExcept() const { return NoFPExcept; }
bool hasUnpredictable() const { return Unpredictable; }
/// Clear any flags in this flag set that aren't also set in Flags. All
/// flags will be cleared if Flags are undefined.
void intersectWith(const SDNodeFlags Flags) {
NoUnsignedWrap &= Flags.NoUnsignedWrap;
NoSignedWrap &= Flags.NoSignedWrap;
Exact &= Flags.Exact;
NoNaNs &= Flags.NoNaNs;
NoInfs &= Flags.NoInfs;
NoSignedZeros &= Flags.NoSignedZeros;
AllowReciprocal &= Flags.AllowReciprocal;
AllowContract &= Flags.AllowContract;
ApproximateFuncs &= Flags.ApproximateFuncs;
AllowReassociation &= Flags.AllowReassociation;
NoFPExcept &= Flags.NoFPExcept;
Unpredictable &= Flags.Unpredictable;
}
};
/// Represents one node in the SelectionDAG.
///
class SDNode : public FoldingSetNode, public ilist_node<SDNode> {
private:
/// The operation that this node performs.
int32_t NodeType;
public:
/// Unique and persistent id per SDNode in the DAG. Used for debug printing.
/// We do not place that under `#if LLVM_ENABLE_ABI_BREAKING_CHECKS`
/// intentionally because it adds unneeded complexity without noticeable
/// benefits (see discussion with @thakis in D120714).
uint16_t PersistentId = 0xffff;
protected:
// We define a set of mini-helper classes to help us interpret the bits in our
// SubclassData. These are designed to fit within a uint16_t so they pack
// with PersistentId.
#if defined(_AIX) && (!defined(__GNUC__) || defined(__clang__))
// Except for GCC; by default, AIX compilers store bit-fields in 4-byte words
// and give the `pack` pragma push semantics.
#define BEGIN_TWO_BYTE_PACK() _Pragma("pack(2)")
#define END_TWO_BYTE_PACK() _Pragma("pack(pop)")
#else
#define BEGIN_TWO_BYTE_PACK()
#define END_TWO_BYTE_PACK()
#endif
BEGIN_TWO_BYTE_PACK()
class SDNodeBitfields {
friend class SDNode;
friend class MemIntrinsicSDNode;
friend class MemSDNode;
friend class SelectionDAG;
uint16_t HasDebugValue : 1;
uint16_t IsMemIntrinsic : 1;
uint16_t IsDivergent : 1;
};
enum { NumSDNodeBits = 3 };
class ConstantSDNodeBitfields {
friend class ConstantSDNode;
uint16_t : NumSDNodeBits;
uint16_t IsOpaque : 1;
};
class MemSDNodeBitfields {
friend class MemSDNode;
friend class MemIntrinsicSDNode;
friend class AtomicSDNode;
uint16_t : NumSDNodeBits;
uint16_t IsVolatile : 1;
uint16_t IsNonTemporal : 1;
uint16_t IsDereferenceable : 1;
uint16_t IsInvariant : 1;
};
enum { NumMemSDNodeBits = NumSDNodeBits + 4 };
class LSBaseSDNodeBitfields {
friend class LSBaseSDNode;
friend class VPBaseLoadStoreSDNode;
friend class MaskedLoadStoreSDNode;
friend class MaskedGatherScatterSDNode;
friend class VPGatherScatterSDNode;
uint16_t : NumMemSDNodeBits;
// This storage is shared between disparate class hierarchies to hold an
// enumeration specific to the class hierarchy in use.
// LSBaseSDNode => enum ISD::MemIndexedMode
// VPLoadStoreBaseSDNode => enum ISD::MemIndexedMode
// MaskedLoadStoreBaseSDNode => enum ISD::MemIndexedMode
// VPGatherScatterSDNode => enum ISD::MemIndexType
// MaskedGatherScatterSDNode => enum ISD::MemIndexType
uint16_t AddressingMode : 3;
};
enum { NumLSBaseSDNodeBits = NumMemSDNodeBits + 3 };
class LoadSDNodeBitfields {
friend class LoadSDNode;
friend class VPLoadSDNode;
friend class VPStridedLoadSDNode;
friend class MaskedLoadSDNode;
friend class MaskedGatherSDNode;
friend class VPGatherSDNode;
uint16_t : NumLSBaseSDNodeBits;
uint16_t ExtTy : 2; // enum ISD::LoadExtType
uint16_t IsExpanding : 1;
};
class StoreSDNodeBitfields {
friend class StoreSDNode;
friend class VPStoreSDNode;
friend class VPStridedStoreSDNode;
friend class MaskedStoreSDNode;
friend class MaskedScatterSDNode;
friend class VPScatterSDNode;
uint16_t : NumLSBaseSDNodeBits;
uint16_t IsTruncating : 1;
uint16_t IsCompressing : 1;
};
union {
char RawSDNodeBits[sizeof(uint16_t)];
SDNodeBitfields SDNodeBits;
ConstantSDNodeBitfields ConstantSDNodeBits;
MemSDNodeBitfields MemSDNodeBits;
LSBaseSDNodeBitfields LSBaseSDNodeBits;
LoadSDNodeBitfields LoadSDNodeBits;
StoreSDNodeBitfields StoreSDNodeBits;
};
END_TWO_BYTE_PACK()
#undef BEGIN_TWO_BYTE_PACK
#undef END_TWO_BYTE_PACK
// RawSDNodeBits must cover the entirety of the union. This means that all of
// the union's members must have size <= RawSDNodeBits. We write the RHS as
// "2" instead of sizeof(RawSDNodeBits) because MSVC can't handle the latter.
static_assert(sizeof(SDNodeBitfields) <= 2, "field too wide");
static_assert(sizeof(ConstantSDNodeBitfields) <= 2, "field too wide");
static_assert(sizeof(MemSDNodeBitfields) <= 2, "field too wide");
static_assert(sizeof(LSBaseSDNodeBitfields) <= 2, "field too wide");
static_assert(sizeof(LoadSDNodeBitfields) <= 2, "field too wide");
static_assert(sizeof(StoreSDNodeBitfields) <= 2, "field too wide");
private:
friend class SelectionDAG;
// TODO: unfriend HandleSDNode once we fix its operand handling.
friend class HandleSDNode;
/// Unique id per SDNode in the DAG.
int NodeId = -1;
/// The values that are used by this operation.
SDUse *OperandList = nullptr;
/// The types of the values this node defines. SDNode's may
/// define multiple values simultaneously.
const EVT *ValueList;
/// List of uses for this SDNode.
SDUse *UseList = nullptr;
/// The number of entries in the Operand/Value list.
unsigned short NumOperands = 0;
unsigned short NumValues;
// The ordering of the SDNodes. It roughly corresponds to the ordering of the
// original LLVM instructions.
// This is used for turning off scheduling, because we'll forgo
// the normal scheduling algorithms and output the instructions according to
// this ordering.
unsigned IROrder;
/// Source line information.
DebugLoc debugLoc;
/// Return a pointer to the specified value type.
static const EVT *getValueTypeList(EVT VT);
SDNodeFlags Flags;
uint32_t CFIType = 0;
public:
//===--------------------------------------------------------------------===//
// Accessors
//
/// Return the SelectionDAG opcode value for this node. For
/// pre-isel nodes (those for which isMachineOpcode returns false), these
/// are the opcode values in the ISD and <target>ISD namespaces. For
/// post-isel opcodes, see getMachineOpcode.
unsigned getOpcode() const { return (unsigned)NodeType; }
/// Test if this node has a target-specific opcode (in the
/// \<target\>ISD namespace).
bool isTargetOpcode() const { return NodeType >= ISD::BUILTIN_OP_END; }
/// Test if this node has a target-specific opcode that may raise
/// FP exceptions (in the \<target\>ISD namespace and greater than
/// FIRST_TARGET_STRICTFP_OPCODE). Note that all target memory
/// opcode are currently automatically considered to possibly raise
/// FP exceptions as well.
bool isTargetStrictFPOpcode() const {
return NodeType >= ISD::FIRST_TARGET_STRICTFP_OPCODE;
}
/// Test if this node has a target-specific
/// memory-referencing opcode (in the \<target\>ISD namespace and
/// greater than FIRST_TARGET_MEMORY_OPCODE).
bool isTargetMemoryOpcode() const {
return NodeType >= ISD::FIRST_TARGET_MEMORY_OPCODE;
}
/// Return true if the type of the node type undefined.
bool isUndef() const { return NodeType == ISD::UNDEF; }
/// Test if this node is a memory intrinsic (with valid pointer information).
/// INTRINSIC_W_CHAIN and INTRINSIC_VOID nodes are sometimes created for
/// non-memory intrinsics (with chains) that are not really instances of
/// MemSDNode. For such nodes, we need some extra state to determine the
/// proper classof relationship.
bool isMemIntrinsic() const {
return (NodeType == ISD::INTRINSIC_W_CHAIN ||
NodeType == ISD::INTRINSIC_VOID) &&
SDNodeBits.IsMemIntrinsic;
}
/// Test if this node is a strict floating point pseudo-op.
bool isStrictFPOpcode() {
switch (NodeType) {
default:
return false;
case ISD::STRICT_FP16_TO_FP:
case ISD::STRICT_FP_TO_FP16:
#define DAG_INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC, DAGN) \
case ISD::STRICT_##DAGN:
#include "llvm/IR/ConstrainedOps.def"
return true;
}
}
/// Test if this node is a vector predication operation.
bool isVPOpcode() const { return ISD::isVPOpcode(getOpcode()); }
/// Test if this node has a post-isel opcode, directly
/// corresponding to a MachineInstr opcode.
bool isMachineOpcode() const { return NodeType < 0; }
/// This may only be called if isMachineOpcode returns
/// true. It returns the MachineInstr opcode value that the node's opcode
/// corresponds to.
unsigned getMachineOpcode() const {
assert(isMachineOpcode() && "Not a MachineInstr opcode!");
return ~NodeType;
}
bool getHasDebugValue() const { return SDNodeBits.HasDebugValue; }
void setHasDebugValue(bool b) { SDNodeBits.HasDebugValue = b; }
bool isDivergent() const { return SDNodeBits.IsDivergent; }
/// Return true if there are no uses of this node.
bool use_empty() const { return UseList == nullptr; }
/// Return true if there is exactly one use of this node.
bool hasOneUse() const { return hasSingleElement(uses()); }
/// Return the number of uses of this node. This method takes
/// time proportional to the number of uses.
size_t use_size() const { return std::distance(use_begin(), use_end()); }
/// Return the unique node id.
int getNodeId() const { return NodeId; }
/// Set unique node id.
void setNodeId(int Id) { NodeId = Id; }
/// Return the node ordering.
unsigned getIROrder() const { return IROrder; }
/// Set the node ordering.
void setIROrder(unsigned Order) { IROrder = Order; }
/// Return the source location info.
const DebugLoc &getDebugLoc() const { return debugLoc; }
/// Set source location info. Try to avoid this, putting
/// it in the constructor is preferable.
void setDebugLoc(DebugLoc dl) { debugLoc = std::move(dl); }
/// This class provides iterator support for SDUse
/// operands that use a specific SDNode.
class use_iterator {
friend class SDNode;
SDUse *Op = nullptr;
explicit use_iterator(SDUse *op) : Op(op) {}
public:
using iterator_category = std::forward_iterator_tag;
using value_type = SDUse;
using difference_type = std::ptrdiff_t;
using pointer = value_type *;
using reference = value_type &;
use_iterator() = default;
use_iterator(const use_iterator &I) = default;
use_iterator &operator=(const use_iterator &) = default;
bool operator==(const use_iterator &x) const { return Op == x.Op; }
bool operator!=(const use_iterator &x) const {
return !operator==(x);
}
/// Return true if this iterator is at the end of uses list.
bool atEnd() const { return Op == nullptr; }
// Iterator traversal: forward iteration only.
use_iterator &operator++() { // Preincrement
assert(Op && "Cannot increment end iterator!");
Op = Op->getNext();
return *this;
}
use_iterator operator++(int) { // Postincrement
use_iterator tmp = *this; ++*this; return tmp;
}
/// Retrieve a pointer to the current user node.
SDNode *operator*() const {
assert(Op && "Cannot dereference end iterator!");
return Op->getUser();
}
SDNode *operator->() const { return operator*(); }
SDUse &getUse() const { return *Op; }
/// Retrieve the operand # of this use in its user.
unsigned getOperandNo() const {
assert(Op && "Cannot dereference end iterator!");
return (unsigned)(Op - Op->getUser()->OperandList);
}
};
/// Provide iteration support to walk over all uses of an SDNode.
use_iterator use_begin() const {
return use_iterator(UseList);
}
static use_iterator use_end() { return use_iterator(nullptr); }
inline iterator_range<use_iterator> uses() {
return make_range(use_begin(), use_end());
}
inline iterator_range<use_iterator> uses() const {
return make_range(use_begin(), use_end());
}
/// Return true if there are exactly NUSES uses of the indicated value.
/// This method ignores uses of other values defined by this operation.
bool hasNUsesOfValue(unsigned NUses, unsigned Value) const;
/// Return true if there are any use of the indicated value.
/// This method ignores uses of other values defined by this operation.
bool hasAnyUseOfValue(unsigned Value) const;
/// Return true if this node is the only use of N.
bool isOnlyUserOf(const SDNode *N) const;
/// Return true if this node is an operand of N.
bool isOperandOf(const SDNode *N) const;
/// Return true if this node is a predecessor of N.
/// NOTE: Implemented on top of hasPredecessor and every bit as
/// expensive. Use carefully.
bool isPredecessorOf(const SDNode *N) const {
return N->hasPredecessor(this);
}
/// Return true if N is a predecessor of this node.
/// N is either an operand of this node, or can be reached by recursively
/// traversing up the operands.
/// NOTE: This is an expensive method. Use it carefully.
bool hasPredecessor(const SDNode *N) const;
/// Returns true if N is a predecessor of any node in Worklist. This
/// helper keeps Visited and Worklist sets externally to allow unions
/// searches to be performed in parallel, caching of results across
/// queries and incremental addition to Worklist. Stops early if N is
/// found but will resume. Remember to clear Visited and Worklists
/// if DAG changes. MaxSteps gives a maximum number of nodes to visit before
/// giving up. The TopologicalPrune flag signals that positive NodeIds are
/// topologically ordered (Operands have strictly smaller node id) and search
/// can be pruned leveraging this.
static bool hasPredecessorHelper(const SDNode *N,
SmallPtrSetImpl<const SDNode *> &Visited,
SmallVectorImpl<const SDNode *> &Worklist,
unsigned int MaxSteps = 0,
bool TopologicalPrune = false) {
SmallVector<const SDNode *, 8> DeferredNodes;
if (Visited.count(N))
return true;
// Node Id's are assigned in three places: As a topological
// ordering (> 0), during legalization (results in values set to
// 0), new nodes (set to -1). If N has a topolgical id then we
// know that all nodes with ids smaller than it cannot be
// successors and we need not check them. Filter out all node
// that can't be matches. We add them to the worklist before exit
// in case of multiple calls. Note that during selection the topological id
// may be violated if a node's predecessor is selected before it. We mark
// this at selection negating the id of unselected successors and
// restricting topological pruning to positive ids.
int NId = N->getNodeId();
// If we Invalidated the Id, reconstruct original NId.
if (NId < -1)
NId = -(NId + 1);
bool Found = false;
while (!Worklist.empty()) {
const SDNode *M = Worklist.pop_back_val();
int MId = M->getNodeId();
if (TopologicalPrune && M->getOpcode() != ISD::TokenFactor && (NId > 0) &&
(MId > 0) && (MId < NId)) {
DeferredNodes.push_back(M);
continue;
}
for (const SDValue &OpV : M->op_values()) {
SDNode *Op = OpV.getNode();
if (Visited.insert(Op).second)
Worklist.push_back(Op);
if (Op == N)
Found = true;
}
if (Found)
break;
if (MaxSteps != 0 && Visited.size() >= MaxSteps)
break;
}
// Push deferred nodes back on worklist.
Worklist.append(DeferredNodes.begin(), DeferredNodes.end());
// If we bailed early, conservatively return found.
if (MaxSteps != 0 && Visited.size() >= MaxSteps)
return true;
return Found;
}
/// Return true if all the users of N are contained in Nodes.
/// NOTE: Requires at least one match, but doesn't require them all.
static bool areOnlyUsersOf(ArrayRef<const SDNode *> Nodes, const SDNode *N);
/// Return the number of values used by this operation.
unsigned getNumOperands() const { return NumOperands; }
/// Return the maximum number of operands that a SDNode can hold.
static constexpr size_t getMaxNumOperands() {
return std::numeric_limits<decltype(SDNode::NumOperands)>::max();
}
/// Helper method returns the integer value of a ConstantSDNode operand.
inline uint64_t getConstantOperandVal(unsigned Num) const;
/// Helper method returns the APInt of a ConstantSDNode operand.
inline const APInt &getConstantOperandAPInt(unsigned Num) const;
const SDValue &getOperand(unsigned Num) const {
assert(Num < NumOperands && "Invalid child # of SDNode!");
return OperandList[Num];
}
using op_iterator = SDUse *;
op_iterator op_begin() const { return OperandList; }
op_iterator op_end() const { return OperandList+NumOperands; }
ArrayRef<SDUse> ops() const { return ArrayRef(op_begin(), op_end()); }
/// Iterator for directly iterating over the operand SDValue's.
struct value_op_iterator
: iterator_adaptor_base<value_op_iterator, op_iterator,
std::random_access_iterator_tag, SDValue,
ptrdiff_t, value_op_iterator *,
value_op_iterator *> {
explicit value_op_iterator(SDUse *U = nullptr)
: iterator_adaptor_base(U) {}
const SDValue &operator*() const { return I->get(); }
};
iterator_range<value_op_iterator> op_values() const {
return make_range(value_op_iterator(op_begin()),
value_op_iterator(op_end()));
}
SDVTList getVTList() const {
SDVTList X = { ValueList, NumValues };
return X;
}
/// If this node has a glue operand, return the node
/// to which the glue operand points. Otherwise return NULL.
SDNode *getGluedNode() const {
if (getNumOperands() != 0 &&
getOperand(getNumOperands()-1).getValueType() == MVT::Glue)
return getOperand(getNumOperands()-1).getNode();
return nullptr;
}
/// If this node has a glue value with a user, return
/// the user (there is at most one). Otherwise return NULL.
SDNode *getGluedUser() const {
for (use_iterator UI = use_begin(), UE = use_end(); UI != UE; ++UI)
if (UI.getUse().get().getValueType() == MVT::Glue)
return *UI;
return nullptr;
}
SDNodeFlags getFlags() const { return Flags; }
void setFlags(SDNodeFlags NewFlags) { Flags = NewFlags; }
/// Clear any flags in this node that aren't also set in Flags.
/// If Flags is not in a defined state then this has no effect.
void intersectFlagsWith(const SDNodeFlags Flags);
void setCFIType(uint32_t Type) { CFIType = Type; }
uint32_t getCFIType() const { return CFIType; }
/// Return the number of values defined/returned by this operator.
unsigned getNumValues() const { return NumValues; }
/// Return the type of a specified result.
EVT getValueType(unsigned ResNo) const {
assert(ResNo < NumValues && "Illegal result number!");
return ValueList[ResNo];
}
/// Return the type of a specified result as a simple type.
MVT getSimpleValueType(unsigned ResNo) const {
return getValueType(ResNo).getSimpleVT();
}
/// Returns MVT::getSizeInBits(getValueType(ResNo)).
///
/// If the value type is a scalable vector type, the scalable property will
/// be set and the runtime size will be a positive integer multiple of the
/// base size.
TypeSize getValueSizeInBits(unsigned ResNo) const {
return getValueType(ResNo).getSizeInBits();
}
using value_iterator = const EVT *;
value_iterator value_begin() const { return ValueList; }
value_iterator value_end() const { return ValueList+NumValues; }
iterator_range<value_iterator> values() const {
return llvm::make_range(value_begin(), value_end());
}
/// Return the opcode of this operation for printing.
std::string getOperationName(const SelectionDAG *G = nullptr) const;
static const char* getIndexedModeName(ISD::MemIndexedMode AM);
void print_types(raw_ostream &OS, const SelectionDAG *G) const;
void print_details(raw_ostream &OS, const SelectionDAG *G) const;
void print(raw_ostream &OS, const SelectionDAG *G = nullptr) const;
void printr(raw_ostream &OS, const SelectionDAG *G = nullptr) const;
/// Print a SelectionDAG node and all children down to
/// the leaves. The given SelectionDAG allows target-specific nodes
/// to be printed in human-readable form. Unlike printr, this will
/// print the whole DAG, including children that appear multiple
/// times.
///
void printrFull(raw_ostream &O, const SelectionDAG *G = nullptr) const;
/// Print a SelectionDAG node and children up to
/// depth "depth." The given SelectionDAG allows target-specific
/// nodes to be printed in human-readable form. Unlike printr, this
/// will print children that appear multiple times wherever they are
/// used.
///
void printrWithDepth(raw_ostream &O, const SelectionDAG *G = nullptr,
unsigned depth = 100) const;
/// Dump this node, for debugging.
void dump() const;
/// Dump (recursively) this node and its use-def subgraph.
void dumpr() const;
/// Dump this node, for debugging.
/// The given SelectionDAG allows target-specific nodes to be printed
/// in human-readable form.
void dump(const SelectionDAG *G) const;
/// Dump (recursively) this node and its use-def subgraph.
/// The given SelectionDAG allows target-specific nodes to be printed
/// in human-readable form.
void dumpr(const SelectionDAG *G) const;
/// printrFull to dbgs(). The given SelectionDAG allows
/// target-specific nodes to be printed in human-readable form.
/// Unlike dumpr, this will print the whole DAG, including children
/// that appear multiple times.
void dumprFull(const SelectionDAG *G = nullptr) const;
/// printrWithDepth to dbgs(). The given
/// SelectionDAG allows target-specific nodes to be printed in
/// human-readable form. Unlike dumpr, this will print children
/// that appear multiple times wherever they are used.
///
void dumprWithDepth(const SelectionDAG *G = nullptr,
unsigned depth = 100) const;
/// Gather unique data for the node.
void Profile(FoldingSetNodeID &ID) const;
/// This method should only be used by the SDUse class.
void addUse(SDUse &U) { U.addToList(&UseList); }
protected:
static SDVTList getSDVTList(EVT VT) {
SDVTList Ret = { getValueTypeList(VT), 1 };
return Ret;
}
/// Create an SDNode.
///
/// SDNodes are created without any operands, and never own the operand
/// storage. To add operands, see SelectionDAG::createOperands.
SDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs)
: NodeType(Opc), ValueList(VTs.VTs), NumValues(VTs.NumVTs),
IROrder(Order), debugLoc(std::move(dl)) {
memset(&RawSDNodeBits, 0, sizeof(RawSDNodeBits));
assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor");
assert(NumValues == VTs.NumVTs &&
"NumValues wasn't wide enough for its operands!");
}
/// Release the operands and set this node to have zero operands.
void DropOperands();
};
/// Wrapper class for IR location info (IR ordering and DebugLoc) to be passed
/// into SDNode creation functions.
/// When an SDNode is created from the DAGBuilder, the DebugLoc is extracted
/// from the original Instruction, and IROrder is the ordinal position of
/// the instruction.
/// When an SDNode is created after the DAG is being built, both DebugLoc and
/// the IROrder are propagated from the original SDNode.
/// So SDLoc class provides two constructors besides the default one, one to
/// be used by the DAGBuilder, the other to be used by others.
class SDLoc {
private:
DebugLoc DL;
int IROrder = 0;
public:
SDLoc() = default;
SDLoc(const SDNode *N) : DL(N->getDebugLoc()), IROrder(N->getIROrder()) {}
SDLoc(const SDValue V) : SDLoc(V.getNode()) {}
SDLoc(const Instruction *I, int Order) : IROrder(Order) {
assert(Order >= 0 && "bad IROrder");
if (I)
DL = I->getDebugLoc();
}
unsigned getIROrder() const { return IROrder; }
const DebugLoc &getDebugLoc() const { return DL; }
};
// Define inline functions from the SDValue class.
inline SDValue::SDValue(SDNode *node, unsigned resno)
: Node(node), ResNo(resno) {
// Explicitly check for !ResNo to avoid use-after-free, because there are
// callers that use SDValue(N, 0) with a deleted N to indicate successful
// combines.
assert((!Node || !ResNo || ResNo < Node->getNumValues()) &&
"Invalid result number for the given node!");
assert(ResNo < -2U && "Cannot use result numbers reserved for DenseMaps.");
}
inline unsigned SDValue::getOpcode() const {
return Node->getOpcode();
}
inline EVT SDValue::getValueType() const {
return Node->getValueType(ResNo);
}
inline unsigned SDValue::getNumOperands() const {
return Node->getNumOperands();
}
inline const SDValue &SDValue::getOperand(unsigned i) const {
return Node->getOperand(i);
}
inline uint64_t SDValue::getConstantOperandVal(unsigned i) const {
return Node->getConstantOperandVal(i);
}
inline const APInt &SDValue::getConstantOperandAPInt(unsigned i) const {
return Node->getConstantOperandAPInt(i);
}
inline bool SDValue::isTargetOpcode() const {
return Node->isTargetOpcode();
}
inline bool SDValue::isTargetMemoryOpcode() const {
return Node->isTargetMemoryOpcode();
}
inline bool SDValue::isMachineOpcode() const {
return Node->isMachineOpcode();
}
inline unsigned SDValue::getMachineOpcode() const {
return Node->getMachineOpcode();
}
inline bool SDValue::isUndef() const {
return Node->isUndef();
}
inline bool SDValue::use_empty() const {
return !Node->hasAnyUseOfValue(ResNo);
}
inline bool SDValue::hasOneUse() const {
return Node->hasNUsesOfValue(1, ResNo);
}
inline const DebugLoc &SDValue::getDebugLoc() const {
return Node->getDebugLoc();
}
inline void SDValue::dump() const {
return Node->dump();
}
inline void SDValue::dump(const SelectionDAG *G) const {
return Node->dump(G);
}
inline void SDValue::dumpr() const {
return Node->dumpr();
}
inline void SDValue::dumpr(const SelectionDAG *G) const {
return Node->dumpr(G);
}
// Define inline functions from the SDUse class.
inline void SDUse::set(const SDValue &V) {
if (Val.getNode()) removeFromList();
Val = V;
if (V.getNode())
V->addUse(*this);
}
inline void SDUse::setInitial(const SDValue &V) {
Val = V;
V->addUse(*this);
}
inline void SDUse::setNode(SDNode *N) {
if (Val.getNode()) removeFromList();
Val.setNode(N);
if (N) N->addUse(*this);
}
/// This class is used to form a handle around another node that
/// is persistent and is updated across invocations of replaceAllUsesWith on its
/// operand. This node should be directly created by end-users and not added to
/// the AllNodes list.
class HandleSDNode : public SDNode {
SDUse Op;
public:
explicit HandleSDNode(SDValue X)
: SDNode(ISD::HANDLENODE, 0, DebugLoc(), getSDVTList(MVT::Other)) {
// HandleSDNodes are never inserted into the DAG, so they won't be
// auto-numbered. Use ID 65535 as a sentinel.
PersistentId = 0xffff;
// Manually set up the operand list. This node type is special in that it's
// always stack allocated and SelectionDAG does not manage its operands.
// TODO: This should either (a) not be in the SDNode hierarchy, or (b) not
// be so special.
Op.setUser(this);
Op.setInitial(X);
NumOperands = 1;
OperandList = &Op;
}
~HandleSDNode();
const SDValue &getValue() const { return Op; }
};
class AddrSpaceCastSDNode : public SDNode {
private:
unsigned SrcAddrSpace;
unsigned DestAddrSpace;
public:
AddrSpaceCastSDNode(unsigned Order, const DebugLoc &dl, EVT VT,
unsigned SrcAS, unsigned DestAS);
unsigned getSrcAddressSpace() const { return SrcAddrSpace; }
unsigned getDestAddressSpace() const { return DestAddrSpace; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::ADDRSPACECAST;
}
};
/// This is an abstract virtual class for memory operations.
class MemSDNode : public SDNode {
private:
// VT of in-memory value.
EVT MemoryVT;
protected:
/// Memory reference information.
MachineMemOperand *MMO;
public:
MemSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTs,
EVT memvt, MachineMemOperand *MMO);
bool readMem() const { return MMO->isLoad(); }
bool writeMem() const { return MMO->isStore(); }
/// Returns alignment and volatility of the memory access
Align getOriginalAlign() const { return MMO->getBaseAlign(); }
Align getAlign() const { return MMO->getAlign(); }
/// Return the SubclassData value, without HasDebugValue. This contains an
/// encoding of the volatile flag, as well as bits used by subclasses. This
/// function should only be used to compute a FoldingSetNodeID value.
/// The HasDebugValue bit is masked out because CSE map needs to match
/// nodes with debug info with nodes without debug info. Same is about
/// isDivergent bit.
unsigned getRawSubclassData() const {
uint16_t Data;
union {
char RawSDNodeBits[sizeof(uint16_t)];
SDNodeBitfields SDNodeBits;
};
memcpy(&RawSDNodeBits, &this->RawSDNodeBits, sizeof(this->RawSDNodeBits));
SDNodeBits.HasDebugValue = 0;
SDNodeBits.IsDivergent = false;
memcpy(&Data, &RawSDNodeBits, sizeof(RawSDNodeBits));
return Data;
}
bool isVolatile() const { return MemSDNodeBits.IsVolatile; }
bool isNonTemporal() const { return MemSDNodeBits.IsNonTemporal; }
bool isDereferenceable() const { return MemSDNodeBits.IsDereferenceable; }
bool isInvariant() const { return MemSDNodeBits.IsInvariant; }
// Returns the offset from the location of the access.
int64_t getSrcValueOffset() const { return MMO->getOffset(); }
/// Returns the AA info that describes the dereference.
AAMDNodes getAAInfo() const { return MMO->getAAInfo(); }
/// Returns the Ranges that describes the dereference.
const MDNode *getRanges() const { return MMO->getRanges(); }
/// Returns the synchronization scope ID for this memory operation.
SyncScope::ID getSyncScopeID() const { return MMO->getSyncScopeID(); }
/// Return the atomic ordering requirements for this memory operation. For
/// cmpxchg atomic operations, return the atomic ordering requirements when
/// store occurs.
AtomicOrdering getSuccessOrdering() const {
return MMO->getSuccessOrdering();
}
/// Return a single atomic ordering that is at least as strong as both the
/// success and failure orderings for an atomic operation. (For operations
/// other than cmpxchg, this is equivalent to getSuccessOrdering().)
AtomicOrdering getMergedOrdering() const { return MMO->getMergedOrdering(); }
/// Return true if the memory operation ordering is Unordered or higher.
bool isAtomic() const { return MMO->isAtomic(); }
/// Returns true if the memory operation doesn't imply any ordering
/// constraints on surrounding memory operations beyond the normal memory
/// aliasing rules.
bool isUnordered() const { return MMO->isUnordered(); }
/// Returns true if the memory operation is neither atomic or volatile.
bool isSimple() const { return !isAtomic() && !isVolatile(); }
/// Return the type of the in-memory value.
EVT getMemoryVT() const { return MemoryVT; }
/// Return a MachineMemOperand object describing the memory
/// reference performed by operation.
MachineMemOperand *getMemOperand() const { return MMO; }
const MachinePointerInfo &getPointerInfo() const {
return MMO->getPointerInfo();
}
/// Return the address space for the associated pointer
unsigned getAddressSpace() const {
return getPointerInfo().getAddrSpace();
}
/// Update this MemSDNode's MachineMemOperand information
/// to reflect the alignment of NewMMO, if it has a greater alignment.
/// This must only be used when the new alignment applies to all users of
/// this MachineMemOperand.
void refineAlignment(const MachineMemOperand *NewMMO) {
MMO->refineAlignment(NewMMO);
}
const SDValue &getChain() const { return getOperand(0); }
const SDValue &getBasePtr() const {
switch (getOpcode()) {
case ISD::STORE:
case ISD::VP_STORE:
case ISD::MSTORE:
case ISD::VP_SCATTER:
case ISD::EXPERIMENTAL_VP_STRIDED_STORE:
return getOperand(2);
case ISD::MGATHER:
case ISD::MSCATTER:
return getOperand(3);
default:
return getOperand(1);
}
}
// Methods to support isa and dyn_cast
static bool classof(const SDNode *N) {
// For some targets, we lower some target intrinsics to a MemIntrinsicNode
// with either an intrinsic or a target opcode.
switch (N->getOpcode()) {
case ISD::LOAD:
case ISD::STORE:
case ISD::PREFETCH:
case ISD::ATOMIC_CMP_SWAP:
case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
case ISD::ATOMIC_SWAP:
case ISD::ATOMIC_LOAD_ADD:
case ISD::ATOMIC_LOAD_SUB:
case ISD::ATOMIC_LOAD_AND:
case ISD::ATOMIC_LOAD_CLR:
case ISD::ATOMIC_LOAD_OR:
case ISD::ATOMIC_LOAD_XOR:
case ISD::ATOMIC_LOAD_NAND:
case ISD::ATOMIC_LOAD_MIN:
case ISD::ATOMIC_LOAD_MAX:
case ISD::ATOMIC_LOAD_UMIN:
case ISD::ATOMIC_LOAD_UMAX:
case ISD::ATOMIC_LOAD_FADD:
case ISD::ATOMIC_LOAD_FSUB:
case ISD::ATOMIC_LOAD_FMAX:
case ISD::ATOMIC_LOAD_FMIN:
case ISD::ATOMIC_LOAD_UINC_WRAP:
case ISD::ATOMIC_LOAD_UDEC_WRAP:
case ISD::ATOMIC_LOAD:
case ISD::ATOMIC_STORE:
case ISD::MLOAD:
case ISD::MSTORE:
case ISD::MGATHER:
case ISD::MSCATTER:
case ISD::VP_LOAD:
case ISD::VP_STORE:
case ISD::VP_GATHER:
case ISD::VP_SCATTER:
case ISD::EXPERIMENTAL_VP_STRIDED_LOAD:
case ISD::EXPERIMENTAL_VP_STRIDED_STORE:
case ISD::GET_FPENV_MEM:
case ISD::SET_FPENV_MEM:
return true;
default:
return N->isMemIntrinsic() || N->isTargetMemoryOpcode();
}
}
};
/// This is an SDNode representing atomic operations.
class AtomicSDNode : public MemSDNode {
public:
AtomicSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTL,
EVT MemVT, MachineMemOperand *MMO)
: MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
assert(((Opc != ISD::ATOMIC_LOAD && Opc != ISD::ATOMIC_STORE) ||
MMO->isAtomic()) && "then why are we using an AtomicSDNode?");
}
const SDValue &getBasePtr() const { return getOperand(1); }
const SDValue &getVal() const { return getOperand(2); }
/// Returns true if this SDNode represents cmpxchg atomic operation, false
/// otherwise.
bool isCompareAndSwap() const {
unsigned Op = getOpcode();
return Op == ISD::ATOMIC_CMP_SWAP ||
Op == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS;
}
/// For cmpxchg atomic operations, return the atomic ordering requirements
/// when store does not occur.
AtomicOrdering getFailureOrdering() const {
assert(isCompareAndSwap() && "Must be cmpxchg operation");
return MMO->getFailureOrdering();
}
// Methods to support isa and dyn_cast
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::ATOMIC_CMP_SWAP ||
N->getOpcode() == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS ||
N->getOpcode() == ISD::ATOMIC_SWAP ||
N->getOpcode() == ISD::ATOMIC_LOAD_ADD ||
N->getOpcode() == ISD::ATOMIC_LOAD_SUB ||
N->getOpcode() == ISD::ATOMIC_LOAD_AND ||
N->getOpcode() == ISD::ATOMIC_LOAD_CLR ||
N->getOpcode() == ISD::ATOMIC_LOAD_OR ||
N->getOpcode() == ISD::ATOMIC_LOAD_XOR ||
N->getOpcode() == ISD::ATOMIC_LOAD_NAND ||
N->getOpcode() == ISD::ATOMIC_LOAD_MIN ||
N->getOpcode() == ISD::ATOMIC_LOAD_MAX ||
N->getOpcode() == ISD::ATOMIC_LOAD_UMIN ||
N->getOpcode() == ISD::ATOMIC_LOAD_UMAX ||
N->getOpcode() == ISD::ATOMIC_LOAD_FADD ||
N->getOpcode() == ISD::ATOMIC_LOAD_FSUB ||
N->getOpcode() == ISD::ATOMIC_LOAD_FMAX ||
N->getOpcode() == ISD::ATOMIC_LOAD_FMIN ||
N->getOpcode() == ISD::ATOMIC_LOAD_UINC_WRAP ||
N->getOpcode() == ISD::ATOMIC_LOAD_UDEC_WRAP ||
N->getOpcode() == ISD::ATOMIC_LOAD ||
N->getOpcode() == ISD::ATOMIC_STORE;
}
};
/// This SDNode is used for target intrinsics that touch
/// memory and need an associated MachineMemOperand. Its opcode may be
/// INTRINSIC_VOID, INTRINSIC_W_CHAIN, PREFETCH, or a target-specific opcode
/// with a value not less than FIRST_TARGET_MEMORY_OPCODE.
class MemIntrinsicSDNode : public MemSDNode {
public:
MemIntrinsicSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl,
SDVTList VTs, EVT MemoryVT, MachineMemOperand *MMO)
: MemSDNode(Opc, Order, dl, VTs, MemoryVT, MMO) {
SDNodeBits.IsMemIntrinsic = true;
}
// Methods to support isa and dyn_cast
static bool classof(const SDNode *N) {
// We lower some target intrinsics to their target opcode
// early a node with a target opcode can be of this class
return N->isMemIntrinsic() ||
N->getOpcode() == ISD::PREFETCH ||
N->isTargetMemoryOpcode();
}
};
/// This SDNode is used to implement the code generator
/// support for the llvm IR shufflevector instruction. It combines elements
/// from two input vectors into a new input vector, with the selection and
/// ordering of elements determined by an array of integers, referred to as
/// the shuffle mask. For input vectors of width N, mask indices of 0..N-1
/// refer to elements from the LHS input, and indices from N to 2N-1 the RHS.
/// An index of -1 is treated as undef, such that the code generator may put
/// any value in the corresponding element of the result.
class ShuffleVectorSDNode : public SDNode {
// The memory for Mask is owned by the SelectionDAG's OperandAllocator, and
// is freed when the SelectionDAG object is destroyed.
const int *Mask;
protected:
friend class SelectionDAG;
ShuffleVectorSDNode(EVT VT, unsigned Order, const DebugLoc &dl, const int *M)
: SDNode(ISD::VECTOR_SHUFFLE, Order, dl, getSDVTList(VT)), Mask(M) {}
public:
ArrayRef<int> getMask() const {
EVT VT = getValueType(0);
return ArrayRef(Mask, VT.getVectorNumElements());
}
int getMaskElt(unsigned Idx) const {
assert(Idx < getValueType(0).getVectorNumElements() && "Idx out of range!");
return Mask[Idx];
}
bool isSplat() const { return isSplatMask(Mask, getValueType(0)); }
int getSplatIndex() const {
assert(isSplat() && "Cannot get splat index for non-splat!");
EVT VT = getValueType(0);
for (unsigned i = 0, e = VT.getVectorNumElements(); i != e; ++i)
if (Mask[i] >= 0)
return Mask[i];
// We can choose any index value here and be correct because all elements
// are undefined. Return 0 for better potential for callers to simplify.
return 0;
}
static bool isSplatMask(const int *Mask, EVT VT);
/// Change values in a shuffle permute mask assuming
/// the two vector operands have swapped position.
static void commuteMask(MutableArrayRef<int> Mask) {
unsigned NumElems = Mask.size();
for (unsigned i = 0; i != NumElems; ++i) {
int idx = Mask[i];
if (idx < 0)
continue;
else if (idx < (int)NumElems)
Mask[i] = idx + NumElems;
else
Mask[i] = idx - NumElems;
}
}
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::VECTOR_SHUFFLE;
}
};
class ConstantSDNode : public SDNode {
friend class SelectionDAG;
const ConstantInt *Value;
ConstantSDNode(bool isTarget, bool isOpaque, const ConstantInt *val, EVT VT)
: SDNode(isTarget ? ISD::TargetConstant : ISD::Constant, 0, DebugLoc(),
getSDVTList(VT)),
Value(val) {
ConstantSDNodeBits.IsOpaque = isOpaque;
}
public:
const ConstantInt *getConstantIntValue() const { return Value; }
const APInt &getAPIntValue() const { return Value->getValue(); }
uint64_t getZExtValue() const { return Value->getZExtValue(); }
int64_t getSExtValue() const { return Value->getSExtValue(); }
uint64_t getLimitedValue(uint64_t Limit = UINT64_MAX) {
return Value->getLimitedValue(Limit);
}
MaybeAlign getMaybeAlignValue() const { return Value->getMaybeAlignValue(); }
Align getAlignValue() const { return Value->getAlignValue(); }
bool isOne() const { return Value->isOne(); }
bool isZero() const { return Value->isZero(); }
bool isAllOnes() const { return Value->isMinusOne(); }
bool isMaxSignedValue() const { return Value->isMaxValue(true); }
bool isMinSignedValue() const { return Value->isMinValue(true); }
bool isOpaque() const { return ConstantSDNodeBits.IsOpaque; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::Constant ||
N->getOpcode() == ISD::TargetConstant;
}
};
uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
return cast<ConstantSDNode>(getOperand(Num))->getZExtValue();
}
const APInt &SDNode::getConstantOperandAPInt(unsigned Num) const {
return cast<ConstantSDNode>(getOperand(Num))->getAPIntValue();
}
class ConstantFPSDNode : public SDNode {
friend class SelectionDAG;
const ConstantFP *Value;
ConstantFPSDNode(bool isTarget, const ConstantFP *val, EVT VT)
: SDNode(isTarget ? ISD::TargetConstantFP : ISD::ConstantFP, 0,
DebugLoc(), getSDVTList(VT)),
Value(val) {}
public:
const APFloat& getValueAPF() const { return Value->getValueAPF(); }
const ConstantFP *getConstantFPValue() const { return Value; }
/// Return true if the value is positive or negative zero.
bool isZero() const { return Value->isZero(); }
/// Return true if the value is a NaN.
bool isNaN() const { return Value->isNaN(); }
/// Return true if the value is an infinity
bool isInfinity() const { return Value->isInfinity(); }
/// Return true if the value is negative.
bool isNegative() const { return Value->isNegative(); }
/// We don't rely on operator== working on double values, as
/// it returns true for things that are clearly not equal, like -0.0 and 0.0.
/// As such, this method can be used to do an exact bit-for-bit comparison of
/// two floating point values.
/// We leave the version with the double argument here because it's just so
/// convenient to write "2.0" and the like. Without this function we'd
/// have to duplicate its logic everywhere it's called.
bool isExactlyValue(double V) const {
return Value->getValueAPF().isExactlyValue(V);
}
bool isExactlyValue(const APFloat& V) const;
static bool isValueValidForType(EVT VT, const APFloat& Val);
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::ConstantFP ||
N->getOpcode() == ISD::TargetConstantFP;
}
};
/// Returns true if \p V is a constant integer zero.
bool isNullConstant(SDValue V);
/// Returns true if \p V is an FP constant with a value of positive zero.
bool isNullFPConstant(SDValue V);
/// Returns true if \p V is an integer constant with all bits set.
bool isAllOnesConstant(SDValue V);
/// Returns true if \p V is a constant integer one.
bool isOneConstant(SDValue V);
/// Returns true if \p V is a constant min signed integer value.
bool isMinSignedConstant(SDValue V);
/// Returns true if \p V is a neutral element of Opc with Flags.
/// When OperandNo is 0, it checks that V is a left identity. Otherwise, it
/// checks that V is a right identity.
bool isNeutralConstant(unsigned Opc, SDNodeFlags Flags, SDValue V,
unsigned OperandNo);
/// Return the non-bitcasted source operand of \p V if it exists.
/// If \p V is not a bitcasted value, it is returned as-is.
SDValue peekThroughBitcasts(SDValue V);
/// Return the non-bitcasted and one-use source operand of \p V if it exists.
/// If \p V is not a bitcasted one-use value, it is returned as-is.
SDValue peekThroughOneUseBitcasts(SDValue V);
/// Return the non-extracted vector source operand of \p V if it exists.
/// If \p V is not an extracted subvector, it is returned as-is.
SDValue peekThroughExtractSubvectors(SDValue V);
/// Return the non-truncated source operand of \p V if it exists.
/// If \p V is not a truncation, it is returned as-is.
SDValue peekThroughTruncates(SDValue V);
/// Returns true if \p V is a bitwise not operation. Assumes that an all ones
/// constant is canonicalized to be operand 1.
bool isBitwiseNot(SDValue V, bool AllowUndefs = false);
/// If \p V is a bitwise not, returns the inverted operand. Otherwise returns
/// an empty SDValue. Only bits set in \p Mask are required to be inverted,
/// other bits may be arbitrary.
SDValue getBitwiseNotOperand(SDValue V, SDValue Mask, bool AllowUndefs);
/// Returns the SDNode if it is a constant splat BuildVector or constant int.
ConstantSDNode *isConstOrConstSplat(SDValue N, bool AllowUndefs = false,
bool AllowTruncation = false);
/// Returns the SDNode if it is a demanded constant splat BuildVector or
/// constant int.
ConstantSDNode *isConstOrConstSplat(SDValue N, const APInt &DemandedElts,
bool AllowUndefs = false,
bool AllowTruncation = false);
/// Returns the SDNode if it is a constant splat BuildVector or constant float.
ConstantFPSDNode *isConstOrConstSplatFP(SDValue N, bool AllowUndefs = false);
/// Returns the SDNode if it is a demanded constant splat BuildVector or
/// constant float.
ConstantFPSDNode *isConstOrConstSplatFP(SDValue N, const APInt &DemandedElts,
bool AllowUndefs = false);
/// Return true if the value is a constant 0 integer or a splatted vector of
/// a constant 0 integer (with no undefs by default).
/// Build vector implicit truncation is not an issue for null values.
bool isNullOrNullSplat(SDValue V, bool AllowUndefs = false);
/// Return true if the value is a constant 1 integer or a splatted vector of a
/// constant 1 integer (with no undefs).
/// Build vector implicit truncation is allowed, but the truncated bits need to
/// be zero.
bool isOneOrOneSplat(SDValue V, bool AllowUndefs = false);
/// Return true if the value is a constant -1 integer or a splatted vector of a
/// constant -1 integer (with no undefs).
/// Does not permit build vector implicit truncation.
bool isAllOnesOrAllOnesSplat(SDValue V, bool AllowUndefs = false);
/// Return true if \p V is either a integer or FP constant.
inline bool isIntOrFPConstant(SDValue V) {
return isa<ConstantSDNode>(V) || isa<ConstantFPSDNode>(V);
}
class GlobalAddressSDNode : public SDNode {
friend class SelectionDAG;
const GlobalValue *TheGlobal;
int64_t Offset;
unsigned TargetFlags;
GlobalAddressSDNode(unsigned Opc, unsigned Order, const DebugLoc &DL,
const GlobalValue *GA, EVT VT, int64_t o,
unsigned TF);
public:
const GlobalValue *getGlobal() const { return TheGlobal; }
int64_t getOffset() const { return Offset; }
unsigned getTargetFlags() const { return TargetFlags; }
// Return the address space this GlobalAddress belongs to.
unsigned getAddressSpace() const;
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::GlobalAddress ||
N->getOpcode() == ISD::TargetGlobalAddress ||
N->getOpcode() == ISD::GlobalTLSAddress ||
N->getOpcode() == ISD::TargetGlobalTLSAddress;
}
};
class FrameIndexSDNode : public SDNode {
friend class SelectionDAG;
int FI;
FrameIndexSDNode(int fi, EVT VT, bool isTarg)
: SDNode(isTarg ? ISD::TargetFrameIndex : ISD::FrameIndex,
0, DebugLoc(), getSDVTList(VT)), FI(fi) {
}
public:
int getIndex() const { return FI; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::FrameIndex ||
N->getOpcode() == ISD::TargetFrameIndex;
}
};
/// This SDNode is used for LIFETIME_START/LIFETIME_END values, which indicate
/// the offet and size that are started/ended in the underlying FrameIndex.
class LifetimeSDNode : public SDNode {
friend class SelectionDAG;
int64_t Size;
int64_t Offset; // -1 if offset is unknown.
LifetimeSDNode(unsigned Opcode, unsigned Order, const DebugLoc &dl,
SDVTList VTs, int64_t Size, int64_t Offset)
: SDNode(Opcode, Order, dl, VTs), Size(Size), Offset(Offset) {}
public:
int64_t getFrameIndex() const {
return cast<FrameIndexSDNode>(getOperand(1))->getIndex();
}
bool hasOffset() const { return Offset >= 0; }
int64_t getOffset() const {
assert(hasOffset() && "offset is unknown");
return Offset;
}
int64_t getSize() const {
assert(hasOffset() && "offset is unknown");
return Size;
}
// Methods to support isa and dyn_cast
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::LIFETIME_START ||
N->getOpcode() == ISD::LIFETIME_END;
}
};
/// This SDNode is used for PSEUDO_PROBE values, which are the function guid and
/// the index of the basic block being probed. A pseudo probe serves as a place
/// holder and will be removed at the end of compilation. It does not have any
/// operand because we do not want the instruction selection to deal with any.
class PseudoProbeSDNode : public SDNode {
friend class SelectionDAG;
uint64_t Guid;
uint64_t Index;
uint32_t Attributes;
PseudoProbeSDNode(unsigned Opcode, unsigned Order, const DebugLoc &Dl,
SDVTList VTs, uint64_t Guid, uint64_t Index, uint32_t Attr)
: SDNode(Opcode, Order, Dl, VTs), Guid(Guid), Index(Index),
Attributes(Attr) {}
public:
uint64_t getGuid() const { return Guid; }
uint64_t getIndex() const { return Index; }
uint32_t getAttributes() const { return Attributes; }
// Methods to support isa and dyn_cast
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::PSEUDO_PROBE;
}
};
class JumpTableSDNode : public SDNode {
friend class SelectionDAG;
int JTI;
unsigned TargetFlags;
JumpTableSDNode(int jti, EVT VT, bool isTarg, unsigned TF)
: SDNode(isTarg ? ISD::TargetJumpTable : ISD::JumpTable,
0, DebugLoc(), getSDVTList(VT)), JTI(jti), TargetFlags(TF) {
}
public:
int getIndex() const { return JTI; }
unsigned getTargetFlags() const { return TargetFlags; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::JumpTable ||
N->getOpcode() == ISD::TargetJumpTable;
}
};
class ConstantPoolSDNode : public SDNode {
friend class SelectionDAG;
union {
const Constant *ConstVal;
MachineConstantPoolValue *MachineCPVal;
} Val;
int Offset; // It's a MachineConstantPoolValue if top bit is set.
Align Alignment; // Minimum alignment requirement of CP.
unsigned TargetFlags;
ConstantPoolSDNode(bool isTarget, const Constant *c, EVT VT, int o,
Align Alignment, unsigned TF)
: SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, 0,
DebugLoc(), getSDVTList(VT)),
Offset(o), Alignment(Alignment), TargetFlags(TF) {
assert(Offset >= 0 && "Offset is too large");
Val.ConstVal = c;
}
ConstantPoolSDNode(bool isTarget, MachineConstantPoolValue *v, EVT VT, int o,
Align Alignment, unsigned TF)
: SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, 0,
DebugLoc(), getSDVTList(VT)),
Offset(o), Alignment(Alignment), TargetFlags(TF) {
assert(Offset >= 0 && "Offset is too large");
Val.MachineCPVal = v;
Offset |= 1 << (sizeof(unsigned)*CHAR_BIT-1);
}
public:
bool isMachineConstantPoolEntry() const {
return Offset < 0;
}
const Constant *getConstVal() const {
assert(!isMachineConstantPoolEntry() && "Wrong constantpool type");
return Val.ConstVal;
}
MachineConstantPoolValue *getMachineCPVal() const {
assert(isMachineConstantPoolEntry() && "Wrong constantpool type");
return Val.MachineCPVal;
}
int getOffset() const {
return Offset & ~(1 << (sizeof(unsigned)*CHAR_BIT-1));
}
// Return the alignment of this constant pool object, which is either 0 (for
// default alignment) or the desired value.
Align getAlign() const { return Alignment; }
unsigned getTargetFlags() const { return TargetFlags; }
Type *getType() const;
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::ConstantPool ||
N->getOpcode() == ISD::TargetConstantPool;
}
};
/// Completely target-dependent object reference.
class TargetIndexSDNode : public SDNode {
friend class SelectionDAG;
unsigned TargetFlags;
int Index;
int64_t Offset;
public:
TargetIndexSDNode(int Idx, EVT VT, int64_t Ofs, unsigned TF)
: SDNode(ISD::TargetIndex, 0, DebugLoc(), getSDVTList(VT)),
TargetFlags(TF), Index(Idx), Offset(Ofs) {}
unsigned getTargetFlags() const { return TargetFlags; }
int getIndex() const { return Index; }
int64_t getOffset() const { return Offset; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::TargetIndex;
}
};
class BasicBlockSDNode : public SDNode {
friend class SelectionDAG;
MachineBasicBlock *MBB;
/// Debug info is meaningful and potentially useful here, but we create
/// blocks out of order when they're jumped to, which makes it a bit
/// harder. Let's see if we need it first.
explicit BasicBlockSDNode(MachineBasicBlock *mbb)
: SDNode(ISD::BasicBlock, 0, DebugLoc(), getSDVTList(MVT::Other)), MBB(mbb)
{}
public:
MachineBasicBlock *getBasicBlock() const { return MBB; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::BasicBlock;
}
};
/// A "pseudo-class" with methods for operating on BUILD_VECTORs.
class BuildVectorSDNode : public SDNode {
public:
// These are constructed as SDNodes and then cast to BuildVectorSDNodes.
explicit BuildVectorSDNode() = delete;
/// Check if this is a constant splat, and if so, find the
/// smallest element size that splats the vector. If MinSplatBits is
/// nonzero, the element size must be at least that large. Note that the
/// splat element may be the entire vector (i.e., a one element vector).
/// Returns the splat element value in SplatValue. Any undefined bits in
/// that value are zero, and the corresponding bits in the SplatUndef mask
/// are set. The SplatBitSize value is set to the splat element size in
/// bits. HasAnyUndefs is set to true if any bits in the vector are
/// undefined. isBigEndian describes the endianness of the target.
bool isConstantSplat(APInt &SplatValue, APInt &SplatUndef,
unsigned &SplatBitSize, bool &HasAnyUndefs,
unsigned MinSplatBits = 0,
bool isBigEndian = false) const;
/// Returns the demanded splatted value or a null value if this is not a
/// splat.
///
/// The DemandedElts mask indicates the elements that must be in the splat.
/// If passed a non-null UndefElements bitvector, it will resize it to match
/// the vector width and set the bits where elements are undef.
SDValue getSplatValue(const APInt &DemandedElts,
BitVector *UndefElements = nullptr) const;
/// Returns the splatted value or a null value if this is not a splat.
///
/// If passed a non-null UndefElements bitvector, it will resize it to match
/// the vector width and set the bits where elements are undef.
SDValue getSplatValue(BitVector *UndefElements = nullptr) const;
/// Find the shortest repeating sequence of values in the build vector.
///
/// e.g. { u, X, u, X, u, u, X, u } -> { X }
/// { X, Y, u, Y, u, u, X, u } -> { X, Y }
///
/// Currently this must be a power-of-2 build vector.
/// The DemandedElts mask indicates the elements that must be present,
/// undemanded elements in Sequence may be null (SDValue()). If passed a
/// non-null UndefElements bitvector, it will resize it to match the original
/// vector width and set the bits where elements are undef. If result is
/// false, Sequence will be empty.
bool getRepeatedSequence(const APInt &DemandedElts,
SmallVectorImpl<SDValue> &Sequence,
BitVector *UndefElements = nullptr) const;
/// Find the shortest repeating sequence of values in the build vector.
///
/// e.g. { u, X, u, X, u, u, X, u } -> { X }
/// { X, Y, u, Y, u, u, X, u } -> { X, Y }
///
/// Currently this must be a power-of-2 build vector.
/// If passed a non-null UndefElements bitvector, it will resize it to match
/// the original vector width and set the bits where elements are undef.
/// If result is false, Sequence will be empty.
bool getRepeatedSequence(SmallVectorImpl<SDValue> &Sequence,
BitVector *UndefElements = nullptr) const;
/// Returns the demanded splatted constant or null if this is not a constant
/// splat.
///
/// The DemandedElts mask indicates the elements that must be in the splat.
/// If passed a non-null UndefElements bitvector, it will resize it to match
/// the vector width and set the bits where elements are undef.
ConstantSDNode *
getConstantSplatNode(const APInt &DemandedElts,
BitVector *UndefElements = nullptr) const;
/// Returns the splatted constant or null if this is not a constant
/// splat.
///
/// If passed a non-null UndefElements bitvector, it will resize it to match
/// the vector width and set the bits where elements are undef.
ConstantSDNode *
getConstantSplatNode(BitVector *UndefElements = nullptr) const;
/// Returns the demanded splatted constant FP or null if this is not a
/// constant FP splat.
///
/// The DemandedElts mask indicates the elements that must be in the splat.
/// If passed a non-null UndefElements bitvector, it will resize it to match
/// the vector width and set the bits where elements are undef.
ConstantFPSDNode *
getConstantFPSplatNode(const APInt &DemandedElts,
BitVector *UndefElements = nullptr) const;
/// Returns the splatted constant FP or null if this is not a constant
/// FP splat.
///
/// If passed a non-null UndefElements bitvector, it will resize it to match
/// the vector width and set the bits where elements are undef.
ConstantFPSDNode *
getConstantFPSplatNode(BitVector *UndefElements = nullptr) const;
/// If this is a constant FP splat and the splatted constant FP is an
/// exact power or 2, return the log base 2 integer value. Otherwise,
/// return -1.
///
/// The BitWidth specifies the necessary bit precision.
int32_t getConstantFPSplatPow2ToLog2Int(BitVector *UndefElements,
uint32_t BitWidth) const;
/// Extract the raw bit data from a build vector of Undef, Constant or
/// ConstantFP node elements. Each raw bit element will be \p
/// DstEltSizeInBits wide, undef elements are treated as zero, and entirely
/// undefined elements are flagged in \p UndefElements.
bool getConstantRawBits(bool IsLittleEndian, unsigned DstEltSizeInBits,
SmallVectorImpl<APInt> &RawBitElements,
BitVector &UndefElements) const;
bool isConstant() const;
/// If this BuildVector is constant and represents the numerical series
/// "<a, a+n, a+2n, a+3n, ...>" where a is integer and n is a non-zero integer,
/// the value "<a,n>" is returned.
std::optional<std::pair<APInt, APInt>> isConstantSequence() const;
/// Recast bit data \p SrcBitElements to \p DstEltSizeInBits wide elements.
/// Undef elements are treated as zero, and entirely undefined elements are
/// flagged in \p DstUndefElements.
static void recastRawBits(bool IsLittleEndian, unsigned DstEltSizeInBits,
SmallVectorImpl<APInt> &DstBitElements,
ArrayRef<APInt> SrcBitElements,
BitVector &DstUndefElements,
const BitVector &SrcUndefElements);
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::BUILD_VECTOR;
}
};
/// An SDNode that holds an arbitrary LLVM IR Value. This is
/// used when the SelectionDAG needs to make a simple reference to something
/// in the LLVM IR representation.
///
class SrcValueSDNode : public SDNode {
friend class SelectionDAG;
const Value *V;
/// Create a SrcValue for a general value.
explicit SrcValueSDNode(const Value *v)
: SDNode(ISD::SRCVALUE, 0, DebugLoc(), getSDVTList(MVT::Other)), V(v) {}
public:
/// Return the contained Value.
const Value *getValue() const { return V; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::SRCVALUE;
}
};
class MDNodeSDNode : public SDNode {
friend class SelectionDAG;
const MDNode *MD;
explicit MDNodeSDNode(const MDNode *md)
: SDNode(ISD::MDNODE_SDNODE, 0, DebugLoc(), getSDVTList(MVT::Other)), MD(md)
{}
public:
const MDNode *getMD() const { return MD; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::MDNODE_SDNODE;
}
};
class RegisterSDNode : public SDNode {
friend class SelectionDAG;
Register Reg;
RegisterSDNode(Register reg, EVT VT)
: SDNode(ISD::Register, 0, DebugLoc(), getSDVTList(VT)), Reg(reg) {}
public:
Register getReg() const { return Reg; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::Register;
}
};
class RegisterMaskSDNode : public SDNode {
friend class SelectionDAG;
// The memory for RegMask is not owned by the node.
const uint32_t *RegMask;
RegisterMaskSDNode(const uint32_t *mask)
: SDNode(ISD::RegisterMask, 0, DebugLoc(), getSDVTList(MVT::Untyped)),
RegMask(mask) {}
public:
const uint32_t *getRegMask() const { return RegMask; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::RegisterMask;
}
};
class BlockAddressSDNode : public SDNode {
friend class SelectionDAG;
const BlockAddress *BA;
int64_t Offset;
unsigned TargetFlags;
BlockAddressSDNode(unsigned NodeTy, EVT VT, const BlockAddress *ba,
int64_t o, unsigned Flags)
: SDNode(NodeTy, 0, DebugLoc(), getSDVTList(VT)),
BA(ba), Offset(o), TargetFlags(Flags) {}
public:
const BlockAddress *getBlockAddress() const { return BA; }
int64_t getOffset() const { return Offset; }
unsigned getTargetFlags() const { return TargetFlags; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::BlockAddress ||
N->getOpcode() == ISD::TargetBlockAddress;
}
};
class LabelSDNode : public SDNode {
friend class SelectionDAG;
MCSymbol *Label;
LabelSDNode(unsigned Opcode, unsigned Order, const DebugLoc &dl, MCSymbol *L)
: SDNode(Opcode, Order, dl, getSDVTList(MVT::Other)), Label(L) {
assert(LabelSDNode::classof(this) && "not a label opcode");
}
public:
MCSymbol *getLabel() const { return Label; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::EH_LABEL ||
N->getOpcode() == ISD::ANNOTATION_LABEL;
}
};
class ExternalSymbolSDNode : public SDNode {
friend class SelectionDAG;
const char *Symbol;
unsigned TargetFlags;
ExternalSymbolSDNode(bool isTarget, const char *Sym, unsigned TF, EVT VT)
: SDNode(isTarget ? ISD::TargetExternalSymbol : ISD::ExternalSymbol, 0,
DebugLoc(), getSDVTList(VT)),
Symbol(Sym), TargetFlags(TF) {}
public:
const char *getSymbol() const { return Symbol; }
unsigned getTargetFlags() const { return TargetFlags; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::ExternalSymbol ||
N->getOpcode() == ISD::TargetExternalSymbol;
}
};
class MCSymbolSDNode : public SDNode {
friend class SelectionDAG;
MCSymbol *Symbol;
MCSymbolSDNode(MCSymbol *Symbol, EVT VT)
: SDNode(ISD::MCSymbol, 0, DebugLoc(), getSDVTList(VT)), Symbol(Symbol) {}
public:
MCSymbol *getMCSymbol() const { return Symbol; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::MCSymbol;
}
};
class CondCodeSDNode : public SDNode {
friend class SelectionDAG;
ISD::CondCode Condition;
explicit CondCodeSDNode(ISD::CondCode Cond)
: SDNode(ISD::CONDCODE, 0, DebugLoc(), getSDVTList(MVT::Other)),
Condition(Cond) {}
public:
ISD::CondCode get() const { return Condition; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::CONDCODE;
}
};
/// This class is used to represent EVT's, which are used
/// to parameterize some operations.
class VTSDNode : public SDNode {
friend class SelectionDAG;
EVT ValueType;
explicit VTSDNode(EVT VT)
: SDNode(ISD::VALUETYPE, 0, DebugLoc(), getSDVTList(MVT::Other)),
ValueType(VT) {}
public:
EVT getVT() const { return ValueType; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::VALUETYPE;
}
};
/// Base class for LoadSDNode and StoreSDNode
class LSBaseSDNode : public MemSDNode {
public:
LSBaseSDNode(ISD::NodeType NodeTy, unsigned Order, const DebugLoc &dl,
SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT,
MachineMemOperand *MMO)
: MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
LSBaseSDNodeBits.AddressingMode = AM;
assert(getAddressingMode() == AM && "Value truncated");
}
const SDValue &getOffset() const {
return getOperand(getOpcode() == ISD::LOAD ? 2 : 3);
}
/// Return the addressing mode for this load or store:
/// unindexed, pre-inc, pre-dec, post-inc, or post-dec.
ISD::MemIndexedMode getAddressingMode() const {
return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode);
}
/// Return true if this is a pre/post inc/dec load/store.
bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
/// Return true if this is NOT a pre/post inc/dec load/store.
bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::LOAD ||
N->getOpcode() == ISD::STORE;
}
};
/// This class is used to represent ISD::LOAD nodes.
class LoadSDNode : public LSBaseSDNode {
friend class SelectionDAG;
LoadSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
MachineMemOperand *MMO)
: LSBaseSDNode(ISD::LOAD, Order, dl, VTs, AM, MemVT, MMO) {
LoadSDNodeBits.ExtTy = ETy;
assert(readMem() && "Load MachineMemOperand is not a load!");
assert(!writeMem() && "Load MachineMemOperand is a store!");
}
public:
/// Return whether this is a plain node,
/// or one of the varieties of value-extending loads.
ISD::LoadExtType getExtensionType() const {
return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy);
}
const SDValue &getBasePtr() const { return getOperand(1); }
const SDValue &getOffset() const { return getOperand(2); }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::LOAD;
}
};
/// This class is used to represent ISD::STORE nodes.
class StoreSDNode : public LSBaseSDNode {
friend class SelectionDAG;
StoreSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT,
MachineMemOperand *MMO)
: LSBaseSDNode(ISD::STORE, Order, dl, VTs, AM, MemVT, MMO) {
StoreSDNodeBits.IsTruncating = isTrunc;
assert(!readMem() && "Store MachineMemOperand is a load!");
assert(writeMem() && "Store MachineMemOperand is not a store!");
}
public:
/// Return true if the op does a truncation before store.
/// For integers this is the same as doing a TRUNCATE and storing the result.
/// For floats, it is the same as doing an FP_ROUND and storing the result.
bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; }
void setTruncatingStore(bool Truncating) {
StoreSDNodeBits.IsTruncating = Truncating;
}
const SDValue &getValue() const { return getOperand(1); }
const SDValue &getBasePtr() const { return getOperand(2); }
const SDValue &getOffset() const { return getOperand(3); }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::STORE;
}
};
/// This base class is used to represent VP_LOAD, VP_STORE,
/// EXPERIMENTAL_VP_STRIDED_LOAD and EXPERIMENTAL_VP_STRIDED_STORE nodes
class VPBaseLoadStoreSDNode : public MemSDNode {
public:
friend class SelectionDAG;
VPBaseLoadStoreSDNode(ISD::NodeType NodeTy, unsigned Order,
const DebugLoc &DL, SDVTList VTs,
ISD::MemIndexedMode AM, EVT MemVT,
MachineMemOperand *MMO)
: MemSDNode(NodeTy, Order, DL, VTs, MemVT, MMO) {
LSBaseSDNodeBits.AddressingMode = AM;
assert(getAddressingMode() == AM && "Value truncated");
}
// VPStridedStoreSDNode (Chain, Data, Ptr, Offset, Stride, Mask, EVL)
// VPStoreSDNode (Chain, Data, Ptr, Offset, Mask, EVL)
// VPStridedLoadSDNode (Chain, Ptr, Offset, Stride, Mask, EVL)
// VPLoadSDNode (Chain, Ptr, Offset, Mask, EVL)
// Mask is a vector of i1 elements;
// the type of EVL is TLI.getVPExplicitVectorLengthTy().
const SDValue &getOffset() const {
return getOperand((getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_LOAD ||
getOpcode() == ISD::VP_LOAD)
? 2
: 3);
}
const SDValue &getBasePtr() const {
return getOperand((getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_LOAD ||
getOpcode() == ISD::VP_LOAD)
? 1
: 2);
}
const SDValue &getMask() const {
switch (getOpcode()) {
default:
llvm_unreachable("Invalid opcode");
case ISD::VP_LOAD:
return getOperand(3);
case ISD::VP_STORE:
case ISD::EXPERIMENTAL_VP_STRIDED_LOAD:
return getOperand(4);
case ISD::EXPERIMENTAL_VP_STRIDED_STORE:
return getOperand(5);
}
}
const SDValue &getVectorLength() const {
switch (getOpcode()) {
default:
llvm_unreachable("Invalid opcode");
case ISD::VP_LOAD:
return getOperand(4);
case ISD::VP_STORE:
case ISD::EXPERIMENTAL_VP_STRIDED_LOAD:
return getOperand(5);
case ISD::EXPERIMENTAL_VP_STRIDED_STORE:
return getOperand(6);
}
}
/// Return the addressing mode for this load or store:
/// unindexed, pre-inc, pre-dec, post-inc, or post-dec.
ISD::MemIndexedMode getAddressingMode() const {
return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode);
}
/// Return true if this is a pre/post inc/dec load/store.
bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
/// Return true if this is NOT a pre/post inc/dec load/store.
bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_LOAD ||
N->getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_STORE ||
N->getOpcode() == ISD::VP_LOAD || N->getOpcode() == ISD::VP_STORE;
}
};
/// This class is used to represent a VP_LOAD node
class VPLoadSDNode : public VPBaseLoadStoreSDNode {
public:
friend class SelectionDAG;
VPLoadSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
ISD::MemIndexedMode AM, ISD::LoadExtType ETy, bool isExpanding,
EVT MemVT, MachineMemOperand *MMO)
: VPBaseLoadStoreSDNode(ISD::VP_LOAD, Order, dl, VTs, AM, MemVT, MMO) {
LoadSDNodeBits.ExtTy = ETy;
LoadSDNodeBits.IsExpanding = isExpanding;
}
ISD::LoadExtType getExtensionType() const {
return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy);
}
const SDValue &getBasePtr() const { return getOperand(1); }
const SDValue &getOffset() const { return getOperand(2); }
const SDValue &getMask() const { return getOperand(3); }
const SDValue &getVectorLength() const { return getOperand(4); }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::VP_LOAD;
}
bool isExpandingLoad() const { return LoadSDNodeBits.IsExpanding; }
};
/// This class is used to represent an EXPERIMENTAL_VP_STRIDED_LOAD node.
class VPStridedLoadSDNode : public VPBaseLoadStoreSDNode {
public:
friend class SelectionDAG;
VPStridedLoadSDNode(unsigned Order, const DebugLoc &DL, SDVTList VTs,
ISD::MemIndexedMode AM, ISD::LoadExtType ETy,
bool IsExpanding, EVT MemVT, MachineMemOperand *MMO)
: VPBaseLoadStoreSDNode(ISD::EXPERIMENTAL_VP_STRIDED_LOAD, Order, DL, VTs,
AM, MemVT, MMO) {
LoadSDNodeBits.ExtTy = ETy;
LoadSDNodeBits.IsExpanding = IsExpanding;
}
ISD::LoadExtType getExtensionType() const {
return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy);
}
const SDValue &getBasePtr() const { return getOperand(1); }
const SDValue &getOffset() const { return getOperand(2); }
const SDValue &getStride() const { return getOperand(3); }
const SDValue &getMask() const { return getOperand(4); }
const SDValue &getVectorLength() const { return getOperand(5); }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_LOAD;
}
bool isExpandingLoad() const { return LoadSDNodeBits.IsExpanding; }
};
/// This class is used to represent a VP_STORE node
class VPStoreSDNode : public VPBaseLoadStoreSDNode {
public:
friend class SelectionDAG;
VPStoreSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
ISD::MemIndexedMode AM, bool isTrunc, bool isCompressing,
EVT MemVT, MachineMemOperand *MMO)
: VPBaseLoadStoreSDNode(ISD::VP_STORE, Order, dl, VTs, AM, MemVT, MMO) {
StoreSDNodeBits.IsTruncating = isTrunc;
StoreSDNodeBits.IsCompressing = isCompressing;
}
/// Return true if this is a truncating store.
/// For integers this is the same as doing a TRUNCATE and storing the result.
/// For floats, it is the same as doing an FP_ROUND and storing the result.
bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; }
/// Returns true if the op does a compression to the vector before storing.
/// The node contiguously stores the active elements (integers or floats)
/// in src (those with their respective bit set in writemask k) to unaligned
/// memory at base_addr.
bool isCompressingStore() const { return StoreSDNodeBits.IsCompressing; }
const SDValue &getValue() const { return getOperand(1); }
const SDValue &getBasePtr() const { return getOperand(2); }
const SDValue &getOffset() const { return getOperand(3); }
const SDValue &getMask() const { return getOperand(4); }
const SDValue &getVectorLength() const { return getOperand(5); }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::VP_STORE;
}
};
/// This class is used to represent an EXPERIMENTAL_VP_STRIDED_STORE node.
class VPStridedStoreSDNode : public VPBaseLoadStoreSDNode {
public:
friend class SelectionDAG;
VPStridedStoreSDNode(unsigned Order, const DebugLoc &DL, SDVTList VTs,
ISD::MemIndexedMode AM, bool IsTrunc, bool IsCompressing,
EVT MemVT, MachineMemOperand *MMO)
: VPBaseLoadStoreSDNode(ISD::EXPERIMENTAL_VP_STRIDED_STORE, Order, DL,
VTs, AM, MemVT, MMO) {
StoreSDNodeBits.IsTruncating = IsTrunc;
StoreSDNodeBits.IsCompressing = IsCompressing;
}
/// Return true if this is a truncating store.
/// For integers this is the same as doing a TRUNCATE and storing the result.
/// For floats, it is the same as doing an FP_ROUND and storing the result.
bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; }
/// Returns true if the op does a compression to the vector before storing.
/// The node contiguously stores the active elements (integers or floats)
/// in src (those with their respective bit set in writemask k) to unaligned
/// memory at base_addr.
bool isCompressingStore() const { return StoreSDNodeBits.IsCompressing; }
const SDValue &getValue() const { return getOperand(1); }
const SDValue &getBasePtr() const { return getOperand(2); }
const SDValue &getOffset() const { return getOperand(3); }
const SDValue &getStride() const { return getOperand(4); }
const SDValue &getMask() const { return getOperand(5); }
const SDValue &getVectorLength() const { return getOperand(6); }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_STORE;
}
};
/// This base class is used to represent MLOAD and MSTORE nodes
class MaskedLoadStoreSDNode : public MemSDNode {
public:
friend class SelectionDAG;
MaskedLoadStoreSDNode(ISD::NodeType NodeTy, unsigned Order,
const DebugLoc &dl, SDVTList VTs,
ISD::MemIndexedMode AM, EVT MemVT,
MachineMemOperand *MMO)
: MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
LSBaseSDNodeBits.AddressingMode = AM;
assert(getAddressingMode() == AM && "Value truncated");
}
// MaskedLoadSDNode (Chain, ptr, offset, mask, passthru)
// MaskedStoreSDNode (Chain, data, ptr, offset, mask)
// Mask is a vector of i1 elements
const SDValue &getOffset() const {
return getOperand(getOpcode() == ISD::MLOAD ? 2 : 3);
}
const SDValue &getMask() const {
return getOperand(getOpcode() == ISD::MLOAD ? 3 : 4);
}
/// Return the addressing mode for this load or store:
/// unindexed, pre-inc, pre-dec, post-inc, or post-dec.
ISD::MemIndexedMode getAddressingMode() const {
return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode);
}
/// Return true if this is a pre/post inc/dec load/store.
bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; }
/// Return true if this is NOT a pre/post inc/dec load/store.
bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::MLOAD ||
N->getOpcode() == ISD::MSTORE;
}
};
/// This class is used to represent an MLOAD node
class MaskedLoadSDNode : public MaskedLoadStoreSDNode {
public:
friend class SelectionDAG;
MaskedLoadSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
ISD::MemIndexedMode AM, ISD::LoadExtType ETy,
bool IsExpanding, EVT MemVT, MachineMemOperand *MMO)
: MaskedLoadStoreSDNode(ISD::MLOAD, Order, dl, VTs, AM, MemVT, MMO) {
LoadSDNodeBits.ExtTy = ETy;
LoadSDNodeBits.IsExpanding = IsExpanding;
}
ISD::LoadExtType getExtensionType() const {
return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy);
}
const SDValue &getBasePtr() const { return getOperand(1); }
const SDValue &getOffset() const { return getOperand(2); }
const SDValue &getMask() const { return getOperand(3); }
const SDValue &getPassThru() const { return getOperand(4); }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::MLOAD;
}
bool isExpandingLoad() const { return LoadSDNodeBits.IsExpanding; }
};
/// This class is used to represent an MSTORE node
class MaskedStoreSDNode : public MaskedLoadStoreSDNode {
public:
friend class SelectionDAG;
MaskedStoreSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
ISD::MemIndexedMode AM, bool isTrunc, bool isCompressing,
EVT MemVT, MachineMemOperand *MMO)
: MaskedLoadStoreSDNode(ISD::MSTORE, Order, dl, VTs, AM, MemVT, MMO) {
StoreSDNodeBits.IsTruncating = isTrunc;
StoreSDNodeBits.IsCompressing = isCompressing;
}
/// Return true if the op does a truncation before store.
/// For integers this is the same as doing a TRUNCATE and storing the result.
/// For floats, it is the same as doing an FP_ROUND and storing the result.
bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; }
/// Returns true if the op does a compression to the vector before storing.
/// The node contiguously stores the active elements (integers or floats)
/// in src (those with their respective bit set in writemask k) to unaligned
/// memory at base_addr.
bool isCompressingStore() const { return StoreSDNodeBits.IsCompressing; }
const SDValue &getValue() const { return getOperand(1); }
const SDValue &getBasePtr() const { return getOperand(2); }
const SDValue &getOffset() const { return getOperand(3); }
const SDValue &getMask() const { return getOperand(4); }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::MSTORE;
}
};
/// This is a base class used to represent
/// VP_GATHER and VP_SCATTER nodes
///
class VPGatherScatterSDNode : public MemSDNode {
public:
friend class SelectionDAG;
VPGatherScatterSDNode(ISD::NodeType NodeTy, unsigned Order,
const DebugLoc &dl, SDVTList VTs, EVT MemVT,
MachineMemOperand *MMO, ISD::MemIndexType IndexType)
: MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
LSBaseSDNodeBits.AddressingMode = IndexType;
assert(getIndexType() == IndexType && "Value truncated");
}
/// How is Index applied to BasePtr when computing addresses.
ISD::MemIndexType getIndexType() const {
return static_cast<ISD::MemIndexType>(LSBaseSDNodeBits.AddressingMode);
}
bool isIndexScaled() const {
return !cast<ConstantSDNode>(getScale())->isOne();
}
bool isIndexSigned() const { return isIndexTypeSigned(getIndexType()); }
// In the both nodes address is Op1, mask is Op2:
// VPGatherSDNode (Chain, base, index, scale, mask, vlen)
// VPScatterSDNode (Chain, value, base, index, scale, mask, vlen)
// Mask is a vector of i1 elements
const SDValue &getBasePtr() const {
return getOperand((getOpcode() == ISD::VP_GATHER) ? 1 : 2);
}
const SDValue &getIndex() const {
return getOperand((getOpcode() == ISD::VP_GATHER) ? 2 : 3);
}
const SDValue &getScale() const {
return getOperand((getOpcode() == ISD::VP_GATHER) ? 3 : 4);
}
const SDValue &getMask() const {
return getOperand((getOpcode() == ISD::VP_GATHER) ? 4 : 5);
}
const SDValue &getVectorLength() const {
return getOperand((getOpcode() == ISD::VP_GATHER) ? 5 : 6);
}
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::VP_GATHER ||
N->getOpcode() == ISD::VP_SCATTER;
}
};
/// This class is used to represent an VP_GATHER node
///
class VPGatherSDNode : public VPGatherScatterSDNode {
public:
friend class SelectionDAG;
VPGatherSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT,
MachineMemOperand *MMO, ISD::MemIndexType IndexType)
: VPGatherScatterSDNode(ISD::VP_GATHER, Order, dl, VTs, MemVT, MMO,
IndexType) {}
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::VP_GATHER;
}
};
/// This class is used to represent an VP_SCATTER node
///
class VPScatterSDNode : public VPGatherScatterSDNode {
public:
friend class SelectionDAG;
VPScatterSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT,
MachineMemOperand *MMO, ISD::MemIndexType IndexType)
: VPGatherScatterSDNode(ISD::VP_SCATTER, Order, dl, VTs, MemVT, MMO,
IndexType) {}
const SDValue &getValue() const { return getOperand(1); }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::VP_SCATTER;
}
};
/// This is a base class used to represent
/// MGATHER and MSCATTER nodes
///
class MaskedGatherScatterSDNode : public MemSDNode {
public:
friend class SelectionDAG;
MaskedGatherScatterSDNode(ISD::NodeType NodeTy, unsigned Order,
const DebugLoc &dl, SDVTList VTs, EVT MemVT,
MachineMemOperand *MMO, ISD::MemIndexType IndexType)
: MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
LSBaseSDNodeBits.AddressingMode = IndexType;
assert(getIndexType() == IndexType && "Value truncated");
}
/// How is Index applied to BasePtr when computing addresses.
ISD::MemIndexType getIndexType() const {
return static_cast<ISD::MemIndexType>(LSBaseSDNodeBits.AddressingMode);
}
bool isIndexScaled() const {
return !cast<ConstantSDNode>(getScale())->isOne();
}
bool isIndexSigned() const { return isIndexTypeSigned(getIndexType()); }
// In the both nodes address is Op1, mask is Op2:
// MaskedGatherSDNode (Chain, passthru, mask, base, index, scale)
// MaskedScatterSDNode (Chain, value, mask, base, index, scale)
// Mask is a vector of i1 elements
const SDValue &getBasePtr() const { return getOperand(3); }
const SDValue &getIndex() const { return getOperand(4); }
const SDValue &getMask() const { return getOperand(2); }
const SDValue &getScale() const { return getOperand(5); }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::MGATHER ||
N->getOpcode() == ISD::MSCATTER;
}
};
/// This class is used to represent an MGATHER node
///
class MaskedGatherSDNode : public MaskedGatherScatterSDNode {
public:
friend class SelectionDAG;
MaskedGatherSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
EVT MemVT, MachineMemOperand *MMO,
ISD::MemIndexType IndexType, ISD::LoadExtType ETy)
: MaskedGatherScatterSDNode(ISD::MGATHER, Order, dl, VTs, MemVT, MMO,
IndexType) {
LoadSDNodeBits.ExtTy = ETy;
}
const SDValue &getPassThru() const { return getOperand(1); }
ISD::LoadExtType getExtensionType() const {
return ISD::LoadExtType(LoadSDNodeBits.ExtTy);
}
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::MGATHER;
}
};
/// This class is used to represent an MSCATTER node
///
class MaskedScatterSDNode : public MaskedGatherScatterSDNode {
public:
friend class SelectionDAG;
MaskedScatterSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs,
EVT MemVT, MachineMemOperand *MMO,
ISD::MemIndexType IndexType, bool IsTrunc)
: MaskedGatherScatterSDNode(ISD::MSCATTER, Order, dl, VTs, MemVT, MMO,
IndexType) {
StoreSDNodeBits.IsTruncating = IsTrunc;
}
/// Return true if the op does a truncation before store.
/// For integers this is the same as doing a TRUNCATE and storing the result.
/// For floats, it is the same as doing an FP_ROUND and storing the result.
bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; }
const SDValue &getValue() const { return getOperand(1); }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::MSCATTER;
}
};
class FPStateAccessSDNode : public MemSDNode {
public:
friend class SelectionDAG;
FPStateAccessSDNode(unsigned NodeTy, unsigned Order, const DebugLoc &dl,
SDVTList VTs, EVT MemVT, MachineMemOperand *MMO)
: MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
assert((NodeTy == ISD::GET_FPENV_MEM || NodeTy == ISD::SET_FPENV_MEM) &&
"Expected FP state access node");
}
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::GET_FPENV_MEM ||
N->getOpcode() == ISD::SET_FPENV_MEM;
}
};
/// An SDNode that represents everything that will be needed
/// to construct a MachineInstr. These nodes are created during the
/// instruction selection proper phase.
///
/// Note that the only supported way to set the `memoperands` is by calling the
/// `SelectionDAG::setNodeMemRefs` function as the memory management happens
/// inside the DAG rather than in the node.
class MachineSDNode : public SDNode {
private:
friend class SelectionDAG;
MachineSDNode(unsigned Opc, unsigned Order, const DebugLoc &DL, SDVTList VTs)
: SDNode(Opc, Order, DL, VTs) {}
// We use a pointer union between a single `MachineMemOperand` pointer and
// a pointer to an array of `MachineMemOperand` pointers. This is null when
// the number of these is zero, the single pointer variant used when the
// number is one, and the array is used for larger numbers.
//
// The array is allocated via the `SelectionDAG`'s allocator and so will
// always live until the DAG is cleaned up and doesn't require ownership here.
//
// We can't use something simpler like `TinyPtrVector` here because `SDNode`
// subclasses aren't managed in a conforming C++ manner. See the comments on
// `SelectionDAG::MorphNodeTo` which details what all goes on, but the
// constraint here is that these don't manage memory with their constructor or
// destructor and can be initialized to a good state even if they start off
// uninitialized.
PointerUnion<MachineMemOperand *, MachineMemOperand **> MemRefs = {};
// Note that this could be folded into the above `MemRefs` member if doing so
// is advantageous at some point. We don't need to store this in most cases.
// However, at the moment this doesn't appear to make the allocation any
// smaller and makes the code somewhat simpler to read.
int NumMemRefs = 0;
public:
using mmo_iterator = ArrayRef<MachineMemOperand *>::const_iterator;
ArrayRef<MachineMemOperand *> memoperands() const {
// Special case the common cases.
if (NumMemRefs == 0)
return {};
if (NumMemRefs == 1)
return ArrayRef(MemRefs.getAddrOfPtr1(), 1);
// Otherwise we have an actual array.
return ArrayRef(cast<MachineMemOperand **>(MemRefs), NumMemRefs);
}
mmo_iterator memoperands_begin() const { return memoperands().begin(); }
mmo_iterator memoperands_end() const { return memoperands().end(); }
bool memoperands_empty() const { return memoperands().empty(); }
/// Clear out the memory reference descriptor list.
void clearMemRefs() {
MemRefs = nullptr;
NumMemRefs = 0;
}
static bool classof(const SDNode *N) {
return N->isMachineOpcode();
}
};
/// An SDNode that records if a register contains a value that is guaranteed to
/// be aligned accordingly.
class AssertAlignSDNode : public SDNode {
Align Alignment;
public:
AssertAlignSDNode(unsigned Order, const DebugLoc &DL, EVT VT, Align A)
: SDNode(ISD::AssertAlign, Order, DL, getSDVTList(VT)), Alignment(A) {}
Align getAlign() const { return Alignment; }
static bool classof(const SDNode *N) {
return N->getOpcode() == ISD::AssertAlign;
}
};
class SDNodeIterator {
const SDNode *Node;
unsigned Operand;
SDNodeIterator(const SDNode *N, unsigned Op) : Node(N), Operand(Op) {}
public:
using iterator_category = std::forward_iterator_tag;
using value_type = SDNode;
using difference_type = std::ptrdiff_t;
using pointer = value_type *;
using reference = value_type &;
bool operator==(const SDNodeIterator& x) const {
return Operand == x.Operand;
}
bool operator!=(const SDNodeIterator& x) const { return !operator==(x); }
pointer operator*() const {
return Node->getOperand(Operand).getNode();
}
pointer operator->() const { return operator*(); }
SDNodeIterator& operator++() { // Preincrement
++Operand;
return *this;
}
SDNodeIterator operator++(int) { // Postincrement
SDNodeIterator tmp = *this; ++*this; return tmp;
}
size_t operator-(SDNodeIterator Other) const {
assert(Node == Other.Node &&
"Cannot compare iterators of two different nodes!");
return Operand - Other.Operand;
}
static SDNodeIterator begin(const SDNode *N) { return SDNodeIterator(N, 0); }
static SDNodeIterator end (const SDNode *N) {
return SDNodeIterator(N, N->getNumOperands());
}
unsigned getOperand() const { return Operand; }
const SDNode *getNode() const { return Node; }
};
template <> struct GraphTraits<SDNode*> {
using NodeRef = SDNode *;
using ChildIteratorType = SDNodeIterator;
static NodeRef getEntryNode(SDNode *N) { return N; }
static ChildIteratorType child_begin(NodeRef N) {
return SDNodeIterator::begin(N);
}
static ChildIteratorType child_end(NodeRef N) {
return SDNodeIterator::end(N);
}
};
/// A representation of the largest SDNode, for use in sizeof().
///
/// This needs to be a union because the largest node differs on 32 bit systems
/// with 4 and 8 byte pointer alignment, respectively.
using LargestSDNode = AlignedCharArrayUnion<AtomicSDNode, TargetIndexSDNode,
BlockAddressSDNode,
GlobalAddressSDNode,
PseudoProbeSDNode>;
/// The SDNode class with the greatest alignment requirement.
using MostAlignedSDNode = GlobalAddressSDNode;
namespace ISD {
/// Returns true if the specified node is a non-extending and unindexed load.
inline bool isNormalLoad(const SDNode *N) {
const LoadSDNode *Ld = dyn_cast<LoadSDNode>(N);
return Ld && Ld->getExtensionType() == ISD::NON_EXTLOAD &&
Ld->getAddressingMode() == ISD::UNINDEXED;
}
/// Returns true if the specified node is a non-extending load.
inline bool isNON_EXTLoad(const SDNode *N) {
return isa<LoadSDNode>(N) &&
cast<LoadSDNode>(N)->getExtensionType() == ISD::NON_EXTLOAD;
}
/// Returns true if the specified node is a EXTLOAD.
inline bool isEXTLoad(const SDNode *N) {
return isa<LoadSDNode>(N) &&
cast<LoadSDNode>(N)->getExtensionType() == ISD::EXTLOAD;
}
/// Returns true if the specified node is a SEXTLOAD.
inline bool isSEXTLoad(const SDNode *N) {
return isa<LoadSDNode>(N) &&
cast<LoadSDNode>(N)->getExtensionType() == ISD::SEXTLOAD;
}
/// Returns true if the specified node is a ZEXTLOAD.
inline bool isZEXTLoad(const SDNode *N) {
return isa<LoadSDNode>(N) &&
cast<LoadSDNode>(N)->getExtensionType() == ISD::ZEXTLOAD;
}
/// Returns true if the specified node is an unindexed load.
inline bool isUNINDEXEDLoad(const SDNode *N) {
return isa<LoadSDNode>(N) &&
cast<LoadSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
}
/// Returns true if the specified node is a non-truncating
/// and unindexed store.
inline bool isNormalStore(const SDNode *N) {
const StoreSDNode *St = dyn_cast<StoreSDNode>(N);
return St && !St->isTruncatingStore() &&
St->getAddressingMode() == ISD::UNINDEXED;
}
/// Returns true if the specified node is an unindexed store.
inline bool isUNINDEXEDStore(const SDNode *N) {
return isa<StoreSDNode>(N) &&
cast<StoreSDNode>(N)->getAddressingMode() == ISD::UNINDEXED;
}
/// Attempt to match a unary predicate against a scalar/splat constant or
/// every element of a constant BUILD_VECTOR.
/// If AllowUndef is true, then UNDEF elements will pass nullptr to Match.
bool matchUnaryPredicate(SDValue Op,
std::function<bool(ConstantSDNode *)> Match,
bool AllowUndefs = false);
/// Attempt to match a binary predicate against a pair of scalar/splat
/// constants or every element of a pair of constant BUILD_VECTORs.
/// If AllowUndef is true, then UNDEF elements will pass nullptr to Match.
/// If AllowTypeMismatch is true then RetType + ArgTypes don't need to match.
bool matchBinaryPredicate(
SDValue LHS, SDValue RHS,
std::function<bool(ConstantSDNode *, ConstantSDNode *)> Match,
bool AllowUndefs = false, bool AllowTypeMismatch = false);
/// Returns true if the specified value is the overflow result from one
/// of the overflow intrinsic nodes.
inline bool isOverflowIntrOpRes(SDValue Op) {
unsigned Opc = Op.getOpcode();
return (Op.getResNo() == 1 &&
(Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO ||
Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO));
}
} // end namespace ISD
} // end namespace llvm
#endif // LLVM_CODEGEN_SELECTIONDAGNODES_H
PK iwFZ�#��o o # CodeGen/MachineUniformityAnalysis.hnu �[��� //===- MachineUniformityAnalysis.h ---------------------------*- C++ -*----===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file
/// \brief Machine IR instance of the generic uniformity analysis
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEUNIFORMITYANALYSIS_H
#define LLVM_CODEGEN_MACHINEUNIFORMITYANALYSIS_H
#include "llvm/ADT/GenericUniformityInfo.h"
#include "llvm/CodeGen/MachineCycleAnalysis.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineSSAContext.h"
namespace llvm {
extern template class GenericUniformityInfo<MachineSSAContext>;
using MachineUniformityInfo = GenericUniformityInfo<MachineSSAContext>;
/// \brief Compute uniformity information for a Machine IR function.
///
/// If \p HasBranchDivergence is false, produces a dummy result which assumes
/// everything is uniform.
MachineUniformityInfo computeMachineUniformityInfo(
MachineFunction &F, const MachineCycleInfo &cycleInfo,
const MachineDomTree &domTree, bool HasBranchDivergence);
} // namespace llvm
#endif // LLVM_CODEGEN_MACHINEUNIFORMITYANALYSIS_H
PK iwFZ�~�q� q� CodeGen/MachineScheduler.hnu �[��� //===- MachineScheduler.h - MachineInstr Scheduling Pass --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides an interface for customizing the standard MachineScheduler
// pass. Note that the entire pass may be replaced as follows:
//
// <Target>TargetMachine::createPassConfig(PassManagerBase &PM) {
// PM.substitutePass(&MachineSchedulerID, &CustomSchedulerPassID);
// ...}
//
// The MachineScheduler pass is only responsible for choosing the regions to be
// scheduled. Targets can override the DAG builder and scheduler without
// replacing the pass as follows:
//
// ScheduleDAGInstrs *<Target>PassConfig::
// createMachineScheduler(MachineSchedContext *C) {
// return new CustomMachineScheduler(C);
// }
//
// The default scheduler, ScheduleDAGMILive, builds the DAG and drives list
// scheduling while updating the instruction stream, register pressure, and live
// intervals. Most targets don't need to override the DAG builder and list
// scheduler, but subtargets that require custom scheduling heuristics may
// plugin an alternate MachineSchedStrategy. The strategy is responsible for
// selecting the highest priority node from the list:
//
// ScheduleDAGInstrs *<Target>PassConfig::
// createMachineScheduler(MachineSchedContext *C) {
// return new ScheduleDAGMILive(C, CustomStrategy(C));
// }
//
// The DAG builder can also be customized in a sense by adding DAG mutations
// that will run after DAG building and before list scheduling. DAG mutations
// can adjust dependencies based on target-specific knowledge or add weak edges
// to aid heuristics:
//
// ScheduleDAGInstrs *<Target>PassConfig::
// createMachineScheduler(MachineSchedContext *C) {
// ScheduleDAGMI *DAG = createGenericSchedLive(C);
// DAG->addMutation(new CustomDAGMutation(...));
// return DAG;
// }
//
// A target that supports alternative schedulers can use the
// MachineSchedRegistry to allow command line selection. This can be done by
// implementing the following boilerplate:
//
// static ScheduleDAGInstrs *createCustomMachineSched(MachineSchedContext *C) {
// return new CustomMachineScheduler(C);
// }
// static MachineSchedRegistry
// SchedCustomRegistry("custom", "Run my target's custom scheduler",
// createCustomMachineSched);
//
//
// Finally, subtargets that don't need to implement custom heuristics but would
// like to configure the GenericScheduler's policy for a given scheduler region,
// including scheduling direction and register pressure tracking policy, can do
// this:
//
// void <SubTarget>Subtarget::
// overrideSchedPolicy(MachineSchedPolicy &Policy,
// unsigned NumRegionInstrs) const {
// Policy.<Flag> = true;
// }
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINESCHEDULER_H
#define LLVM_CODEGEN_MACHINESCHEDULER_H
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/Twine.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachinePassRegistry.h"
#include "llvm/CodeGen/RegisterPressure.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/CodeGen/ScheduleDAGInstrs.h"
#include "llvm/CodeGen/ScheduleDAGMutation.h"
#include "llvm/CodeGen/TargetSchedule.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/ErrorHandling.h"
#include <algorithm>
#include <cassert>
#include <llvm/Support/raw_ostream.h>
#include <memory>
#include <string>
#include <vector>
namespace llvm {
extern cl::opt<bool> ForceTopDown;
extern cl::opt<bool> ForceBottomUp;
extern cl::opt<bool> VerifyScheduling;
#ifndef NDEBUG
extern cl::opt<bool> ViewMISchedDAGs;
extern cl::opt<bool> PrintDAGs;
#else
extern const bool ViewMISchedDAGs;
extern const bool PrintDAGs;
#endif
class AAResults;
class LiveIntervals;
class MachineDominatorTree;
class MachineFunction;
class MachineInstr;
class MachineLoopInfo;
class RegisterClassInfo;
class SchedDFSResult;
class ScheduleHazardRecognizer;
class TargetInstrInfo;
class TargetPassConfig;
class TargetRegisterInfo;
/// MachineSchedContext provides enough context from the MachineScheduler pass
/// for the target to instantiate a scheduler.
struct MachineSchedContext {
MachineFunction *MF = nullptr;
const MachineLoopInfo *MLI = nullptr;
const MachineDominatorTree *MDT = nullptr;
const TargetPassConfig *PassConfig = nullptr;
AAResults *AA = nullptr;
LiveIntervals *LIS = nullptr;
RegisterClassInfo *RegClassInfo;
MachineSchedContext();
MachineSchedContext &operator=(const MachineSchedContext &other) = delete;
MachineSchedContext(const MachineSchedContext &other) = delete;
virtual ~MachineSchedContext();
};
/// MachineSchedRegistry provides a selection of available machine instruction
/// schedulers.
class MachineSchedRegistry
: public MachinePassRegistryNode<
ScheduleDAGInstrs *(*)(MachineSchedContext *)> {
public:
using ScheduleDAGCtor = ScheduleDAGInstrs *(*)(MachineSchedContext *);
// RegisterPassParser requires a (misnamed) FunctionPassCtor type.
using FunctionPassCtor = ScheduleDAGCtor;
static MachinePassRegistry<ScheduleDAGCtor> Registry;
MachineSchedRegistry(const char *N, const char *D, ScheduleDAGCtor C)
: MachinePassRegistryNode(N, D, C) {
Registry.Add(this);
}
~MachineSchedRegistry() { Registry.Remove(this); }
// Accessors.
//
MachineSchedRegistry *getNext() const {
return (MachineSchedRegistry *)MachinePassRegistryNode::getNext();
}
static MachineSchedRegistry *getList() {
return (MachineSchedRegistry *)Registry.getList();
}
static void setListener(MachinePassRegistryListener<FunctionPassCtor> *L) {
Registry.setListener(L);
}
};
class ScheduleDAGMI;
/// Define a generic scheduling policy for targets that don't provide their own
/// MachineSchedStrategy. This can be overriden for each scheduling region
/// before building the DAG.
struct MachineSchedPolicy {
// Allow the scheduler to disable register pressure tracking.
bool ShouldTrackPressure = false;
/// Track LaneMasks to allow reordering of independent subregister writes
/// of the same vreg. \sa MachineSchedStrategy::shouldTrackLaneMasks()
bool ShouldTrackLaneMasks = false;
// Allow the scheduler to force top-down or bottom-up scheduling. If neither
// is true, the scheduler runs in both directions and converges.
bool OnlyTopDown = false;
bool OnlyBottomUp = false;
// Disable heuristic that tries to fetch nodes from long dependency chains
// first.
bool DisableLatencyHeuristic = false;
// Compute DFSResult for use in scheduling heuristics.
bool ComputeDFSResult = false;
MachineSchedPolicy() = default;
};
/// MachineSchedStrategy - Interface to the scheduling algorithm used by
/// ScheduleDAGMI.
///
/// Initialization sequence:
/// initPolicy -> shouldTrackPressure -> initialize(DAG) -> registerRoots
class MachineSchedStrategy {
virtual void anchor();
public:
virtual ~MachineSchedStrategy() = default;
/// Optionally override the per-region scheduling policy.
virtual void initPolicy(MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned NumRegionInstrs) {}
virtual void dumpPolicy() const {}
/// Check if pressure tracking is needed before building the DAG and
/// initializing this strategy. Called after initPolicy.
virtual bool shouldTrackPressure() const { return true; }
/// Returns true if lanemasks should be tracked. LaneMask tracking is
/// necessary to reorder independent subregister defs for the same vreg.
/// This has to be enabled in combination with shouldTrackPressure().
virtual bool shouldTrackLaneMasks() const { return false; }
// If this method returns true, handling of the scheduling regions
// themselves (in case of a scheduling boundary in MBB) will be done
// beginning with the topmost region of MBB.
virtual bool doMBBSchedRegionsTopDown() const { return false; }
/// Initialize the strategy after building the DAG for a new region.
virtual void initialize(ScheduleDAGMI *DAG) = 0;
/// Tell the strategy that MBB is about to be processed.
virtual void enterMBB(MachineBasicBlock *MBB) {};
/// Tell the strategy that current MBB is done.
virtual void leaveMBB() {};
/// Notify this strategy that all roots have been released (including those
/// that depend on EntrySU or ExitSU).
virtual void registerRoots() {}
/// Pick the next node to schedule, or return NULL. Set IsTopNode to true to
/// schedule the node at the top of the unscheduled region. Otherwise it will
/// be scheduled at the bottom.
virtual SUnit *pickNode(bool &IsTopNode) = 0;
/// Scheduler callback to notify that a new subtree is scheduled.
virtual void scheduleTree(unsigned SubtreeID) {}
/// Notify MachineSchedStrategy that ScheduleDAGMI has scheduled an
/// instruction and updated scheduled/remaining flags in the DAG nodes.
virtual void schedNode(SUnit *SU, bool IsTopNode) = 0;
/// When all predecessor dependencies have been resolved, free this node for
/// top-down scheduling.
virtual void releaseTopNode(SUnit *SU) = 0;
/// When all successor dependencies have been resolved, free this node for
/// bottom-up scheduling.
virtual void releaseBottomNode(SUnit *SU) = 0;
};
/// ScheduleDAGMI is an implementation of ScheduleDAGInstrs that simply
/// schedules machine instructions according to the given MachineSchedStrategy
/// without much extra book-keeping. This is the common functionality between
/// PreRA and PostRA MachineScheduler.
class ScheduleDAGMI : public ScheduleDAGInstrs {
protected:
AAResults *AA;
LiveIntervals *LIS;
std::unique_ptr<MachineSchedStrategy> SchedImpl;
/// Ordered list of DAG postprocessing steps.
std::vector<std::unique_ptr<ScheduleDAGMutation>> Mutations;
/// The top of the unscheduled zone.
MachineBasicBlock::iterator CurrentTop;
/// The bottom of the unscheduled zone.
MachineBasicBlock::iterator CurrentBottom;
/// Record the next node in a scheduled cluster.
const SUnit *NextClusterPred = nullptr;
const SUnit *NextClusterSucc = nullptr;
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
/// The number of instructions scheduled so far. Used to cut off the
/// scheduler at the point determined by misched-cutoff.
unsigned NumInstrsScheduled = 0;
#endif
public:
ScheduleDAGMI(MachineSchedContext *C, std::unique_ptr<MachineSchedStrategy> S,
bool RemoveKillFlags)
: ScheduleDAGInstrs(*C->MF, C->MLI, RemoveKillFlags), AA(C->AA),
LIS(C->LIS), SchedImpl(std::move(S)) {}
// Provide a vtable anchor
~ScheduleDAGMI() override;
/// If this method returns true, handling of the scheduling regions
/// themselves (in case of a scheduling boundary in MBB) will be done
/// beginning with the topmost region of MBB.
bool doMBBSchedRegionsTopDown() const override {
return SchedImpl->doMBBSchedRegionsTopDown();
}
// Returns LiveIntervals instance for use in DAG mutators and such.
LiveIntervals *getLIS() const { return LIS; }
/// Return true if this DAG supports VReg liveness and RegPressure.
virtual bool hasVRegLiveness() const { return false; }
/// Add a postprocessing step to the DAG builder.
/// Mutations are applied in the order that they are added after normal DAG
/// building and before MachineSchedStrategy initialization.
///
/// ScheduleDAGMI takes ownership of the Mutation object.
void addMutation(std::unique_ptr<ScheduleDAGMutation> Mutation) {
if (Mutation)
Mutations.push_back(std::move(Mutation));
}
MachineBasicBlock::iterator top() const { return CurrentTop; }
MachineBasicBlock::iterator bottom() const { return CurrentBottom; }
/// Implement the ScheduleDAGInstrs interface for handling the next scheduling
/// region. This covers all instructions in a block, while schedule() may only
/// cover a subset.
void enterRegion(MachineBasicBlock *bb,
MachineBasicBlock::iterator begin,
MachineBasicBlock::iterator end,
unsigned regioninstrs) override;
/// Implement ScheduleDAGInstrs interface for scheduling a sequence of
/// reorderable instructions.
void schedule() override;
void startBlock(MachineBasicBlock *bb) override;
void finishBlock() override;
/// Change the position of an instruction within the basic block and update
/// live ranges and region boundary iterators.
void moveInstruction(MachineInstr *MI, MachineBasicBlock::iterator InsertPos);
const SUnit *getNextClusterPred() const { return NextClusterPred; }
const SUnit *getNextClusterSucc() const { return NextClusterSucc; }
void viewGraph(const Twine &Name, const Twine &Title) override;
void viewGraph() override;
protected:
// Top-Level entry points for the schedule() driver...
/// Apply each ScheduleDAGMutation step in order. This allows different
/// instances of ScheduleDAGMI to perform custom DAG postprocessing.
void postProcessDAG();
/// Release ExitSU predecessors and setup scheduler queues.
void initQueues(ArrayRef<SUnit*> TopRoots, ArrayRef<SUnit*> BotRoots);
/// Update scheduler DAG and queues after scheduling an instruction.
void updateQueues(SUnit *SU, bool IsTopNode);
/// Reinsert debug_values recorded in ScheduleDAGInstrs::DbgValues.
void placeDebugValues();
/// dump the scheduled Sequence.
void dumpSchedule() const;
/// Print execution trace of the schedule top-down or bottom-up.
void dumpScheduleTraceTopDown() const;
void dumpScheduleTraceBottomUp() const;
// Lesser helpers...
bool checkSchedLimit();
void findRootsAndBiasEdges(SmallVectorImpl<SUnit*> &TopRoots,
SmallVectorImpl<SUnit*> &BotRoots);
void releaseSucc(SUnit *SU, SDep *SuccEdge);
void releaseSuccessors(SUnit *SU);
void releasePred(SUnit *SU, SDep *PredEdge);
void releasePredecessors(SUnit *SU);
};
/// ScheduleDAGMILive is an implementation of ScheduleDAGInstrs that schedules
/// machine instructions while updating LiveIntervals and tracking regpressure.
class ScheduleDAGMILive : public ScheduleDAGMI {
protected:
RegisterClassInfo *RegClassInfo;
/// Information about DAG subtrees. If DFSResult is NULL, then SchedulerTrees
/// will be empty.
SchedDFSResult *DFSResult = nullptr;
BitVector ScheduledTrees;
MachineBasicBlock::iterator LiveRegionEnd;
/// Maps vregs to the SUnits of their uses in the current scheduling region.
VReg2SUnitMultiMap VRegUses;
// Map each SU to its summary of pressure changes. This array is updated for
// liveness during bottom-up scheduling. Top-down scheduling may proceed but
// has no affect on the pressure diffs.
PressureDiffs SUPressureDiffs;
/// Register pressure in this region computed by initRegPressure.
bool ShouldTrackPressure = false;
bool ShouldTrackLaneMasks = false;
IntervalPressure RegPressure;
RegPressureTracker RPTracker;
/// List of pressure sets that exceed the target's pressure limit before
/// scheduling, listed in increasing set ID order. Each pressure set is paired
/// with its max pressure in the currently scheduled regions.
std::vector<PressureChange> RegionCriticalPSets;
/// The top of the unscheduled zone.
IntervalPressure TopPressure;
RegPressureTracker TopRPTracker;
/// The bottom of the unscheduled zone.
IntervalPressure BotPressure;
RegPressureTracker BotRPTracker;
public:
ScheduleDAGMILive(MachineSchedContext *C,
std::unique_ptr<MachineSchedStrategy> S)
: ScheduleDAGMI(C, std::move(S), /*RemoveKillFlags=*/false),
RegClassInfo(C->RegClassInfo), RPTracker(RegPressure),
TopRPTracker(TopPressure), BotRPTracker(BotPressure) {}
~ScheduleDAGMILive() override;
/// Return true if this DAG supports VReg liveness and RegPressure.
bool hasVRegLiveness() const override { return true; }
/// Return true if register pressure tracking is enabled.
bool isTrackingPressure() const { return ShouldTrackPressure; }
/// Get current register pressure for the top scheduled instructions.
const IntervalPressure &getTopPressure() const { return TopPressure; }
const RegPressureTracker &getTopRPTracker() const { return TopRPTracker; }
/// Get current register pressure for the bottom scheduled instructions.
const IntervalPressure &getBotPressure() const { return BotPressure; }
const RegPressureTracker &getBotRPTracker() const { return BotRPTracker; }
/// Get register pressure for the entire scheduling region before scheduling.
const IntervalPressure &getRegPressure() const { return RegPressure; }
const std::vector<PressureChange> &getRegionCriticalPSets() const {
return RegionCriticalPSets;
}
PressureDiff &getPressureDiff(const SUnit *SU) {
return SUPressureDiffs[SU->NodeNum];
}
const PressureDiff &getPressureDiff(const SUnit *SU) const {
return SUPressureDiffs[SU->NodeNum];
}
/// Compute a DFSResult after DAG building is complete, and before any
/// queue comparisons.
void computeDFSResult();
/// Return a non-null DFS result if the scheduling strategy initialized it.
const SchedDFSResult *getDFSResult() const { return DFSResult; }
BitVector &getScheduledTrees() { return ScheduledTrees; }
/// Implement the ScheduleDAGInstrs interface for handling the next scheduling
/// region. This covers all instructions in a block, while schedule() may only
/// cover a subset.
void enterRegion(MachineBasicBlock *bb,
MachineBasicBlock::iterator begin,
MachineBasicBlock::iterator end,
unsigned regioninstrs) override;
/// Implement ScheduleDAGInstrs interface for scheduling a sequence of
/// reorderable instructions.
void schedule() override;
/// Compute the cyclic critical path through the DAG.
unsigned computeCyclicCriticalPath();
void dump() const override;
protected:
// Top-Level entry points for the schedule() driver...
/// Call ScheduleDAGInstrs::buildSchedGraph with register pressure tracking
/// enabled. This sets up three trackers. RPTracker will cover the entire DAG
/// region, TopTracker and BottomTracker will be initialized to the top and
/// bottom of the DAG region without covereing any unscheduled instruction.
void buildDAGWithRegPressure();
/// Release ExitSU predecessors and setup scheduler queues. Re-position
/// the Top RP tracker in case the region beginning has changed.
void initQueues(ArrayRef<SUnit*> TopRoots, ArrayRef<SUnit*> BotRoots);
/// Move an instruction and update register pressure.
void scheduleMI(SUnit *SU, bool IsTopNode);
// Lesser helpers...
void initRegPressure();
void updatePressureDiffs(ArrayRef<RegisterMaskPair> LiveUses);
void updateScheduledPressure(const SUnit *SU,
const std::vector<unsigned> &NewMaxPressure);
void collectVRegUses(SUnit &SU);
};
//===----------------------------------------------------------------------===//
///
/// Helpers for implementing custom MachineSchedStrategy classes. These take
/// care of the book-keeping associated with list scheduling heuristics.
///
//===----------------------------------------------------------------------===//
/// ReadyQueue encapsulates vector of "ready" SUnits with basic convenience
/// methods for pushing and removing nodes. ReadyQueue's are uniquely identified
/// by an ID. SUnit::NodeQueueId is a mask of the ReadyQueues the SUnit is in.
///
/// This is a convenience class that may be used by implementations of
/// MachineSchedStrategy.
class ReadyQueue {
unsigned ID;
std::string Name;
std::vector<SUnit*> Queue;
public:
ReadyQueue(unsigned id, const Twine &name): ID(id), Name(name.str()) {}
unsigned getID() const { return ID; }
StringRef getName() const { return Name; }
// SU is in this queue if it's NodeQueueID is a superset of this ID.
bool isInQueue(SUnit *SU) const { return (SU->NodeQueueId & ID); }
bool empty() const { return Queue.empty(); }
void clear() { Queue.clear(); }
unsigned size() const { return Queue.size(); }
using iterator = std::vector<SUnit*>::iterator;
iterator begin() { return Queue.begin(); }
iterator end() { return Queue.end(); }
ArrayRef<SUnit*> elements() { return Queue; }
iterator find(SUnit *SU) { return llvm::find(Queue, SU); }
void push(SUnit *SU) {
Queue.push_back(SU);
SU->NodeQueueId |= ID;
}
iterator remove(iterator I) {
(*I)->NodeQueueId &= ~ID;
*I = Queue.back();
unsigned idx = I - Queue.begin();
Queue.pop_back();
return Queue.begin() + idx;
}
void dump() const;
};
/// Summarize the unscheduled region.
struct SchedRemainder {
// Critical path through the DAG in expected latency.
unsigned CriticalPath;
unsigned CyclicCritPath;
// Scaled count of micro-ops left to schedule.
unsigned RemIssueCount;
bool IsAcyclicLatencyLimited;
// Unscheduled resources
SmallVector<unsigned, 16> RemainingCounts;
SchedRemainder() { reset(); }
void reset() {
CriticalPath = 0;
CyclicCritPath = 0;
RemIssueCount = 0;
IsAcyclicLatencyLimited = false;
RemainingCounts.clear();
}
void init(ScheduleDAGMI *DAG, const TargetSchedModel *SchedModel);
};
/// ResourceSegments are a collection of intervals closed on the
/// left and opened on the right:
///
/// list{ [a1, b1), [a2, b2), ..., [a_N, b_N) }
///
/// The collection has the following properties:
///
/// 1. The list is ordered: a_i < b_i and b_i < a_(i+1)
///
/// 2. The intervals in the collection do not intersect each other.
///
/// A \ref ResourceSegments instance represents the cycle
/// reservation history of the instance of and individual resource.
class ResourceSegments {
public:
/// Represents an interval of discrete integer values closed on
/// the left and open on the right: [a, b).
typedef std::pair<int64_t, int64_t> IntervalTy;
/// Adds an interval [a, b) to the collection of the instance.
///
/// When adding [a, b[ to the collection, the operation merges the
/// adjacent intervals. For example
///
/// 0 1 2 3 4 5 6 7 8 9 10
/// [-----) [--) [--)
/// + [--)
/// = [-----------) [--)
///
/// To be able to debug duplicate resource usage, the function has
/// assertion that checks that no interval should be added if it
/// overlaps any of the intervals in the collection. We can
/// require this because by definition a \ref ResourceSegments is
/// attached only to an individual resource instance.
void add(IntervalTy A, const unsigned CutOff = 10);
public:
/// Checks whether intervals intersect.
static bool intersects(IntervalTy A, IntervalTy B);
/// These function return the interval used by a resource in bottom and top
/// scheduling.
///
/// Consider an instruction that uses resources X0, X1 and X2 as follows:
///
/// X0 X1 X1 X2 +--------+------------+------+
/// |Resource|StartAtCycle|Cycles|
/// +--------+------------+------+
/// | X0 | 0 | 1 |
/// +--------+------------+------+
/// | X1 | 1 | 3 |
/// +--------+------------+------+
/// | X2 | 3 | 4 |
/// +--------+------------+------+
///
/// If we can schedule the instruction at cycle C, we need to
/// compute the interval of the resource as follows:
///
/// # TOP DOWN SCHEDULING
///
/// Cycles scheduling flows to the _right_, in the same direction
/// of time.
///
/// C 1 2 3 4 5 ...
/// ------|------|------|------|------|------|----->
/// X0 X1 X1 X2 ---> direction of time
/// X0 [C, C+1)
/// X1 [C+1, C+3)
/// X2 [C+3, C+4)
///
/// Therefore, the formula to compute the interval for a resource
/// of an instruction that can be scheduled at cycle C in top-down
/// scheduling is:
///
/// [C+StartAtCycle, C+Cycles)
///
///
/// # BOTTOM UP SCHEDULING
///
/// Cycles scheduling flows to the _left_, in opposite direction
/// of time.
///
/// In bottom up scheduling, the scheduling happens in opposite
/// direction to the execution of the cycles of the
/// instruction. When the instruction is scheduled at cycle `C`,
/// the resources are allocated in the past relative to `C`:
///
/// 2 1 C -1 -2 -3 -4 -5 ...
/// <-----|------|------|------|------|------|------|------|---
/// X0 X1 X1 X2 ---> direction of time
/// X0 (C+1, C]
/// X1 (C, C-2]
/// X2 (C-2, C-3]
///
/// Therefore, the formula to compute the interval for a resource
/// of an instruction that can be scheduled at cycle C in bottom-up
/// scheduling is:
///
/// [C-Cycle+1, C-StartAtCycle+1)
///
///
/// NOTE: In both cases, the number of cycles booked by a
/// resources is the value (Cycle - StartAtCycles).
static IntervalTy getResourceIntervalBottom(unsigned C, unsigned StartAtCycle,
unsigned Cycle) {
return std::make_pair<long, long>((long)C - (long)Cycle + 1L,
(long)C - (long)StartAtCycle + 1L);
}
static IntervalTy getResourceIntervalTop(unsigned C, unsigned StartAtCycle,
unsigned Cycle) {
return std::make_pair<long, long>((long)C + (long)StartAtCycle,
(long)C + (long)Cycle);
}
private:
/// Finds the first cycle in which a resource can be allocated.
///
/// The function uses the \param IntervalBuider [*] to build a
/// resource interval [a, b[ out of the input parameters \param
/// CurrCycle, \param StartAtCycle and \param Cycle.
///
/// The function then loops through the intervals in the ResourceSegments
/// and shifts the interval [a, b[ and the ReturnCycle to the
/// right until there is no intersection between the intervals of
/// the \ref ResourceSegments instance and the new shifted [a, b[. When
/// this condition is met, the ReturnCycle (which
/// correspond to the cycle in which the resource can be
/// allocated) is returned.
///
/// c = CurrCycle in input
/// c 1 2 3 4 5 6 7 8 9 10 ... ---> (time
/// flow)
/// ResourceSegments... [---) [-------) [-----------)
/// c [1 3[ -> StartAtCycle=1, Cycles=3
/// ++c [1 3)
/// ++c [1 3)
/// ++c [1 3)
/// ++c [1 3)
/// ++c [1 3) ---> returns c
/// incremented by 5 (c+5)
///
///
/// Notice that for bottom-up scheduling the diagram is slightly
/// different because the current cycle c is always on the right
/// of the interval [a, b) (see \ref
/// `getResourceIntervalBottom`). This is because the cycle
/// increments for bottom-up scheduling moved in the direction
/// opposite to the direction of time:
///
/// --------> direction of time.
/// XXYZZZ (resource usage)
/// --------> direction of top-down execution cycles.
/// <-------- direction of bottom-up execution cycles.
///
/// Even though bottom-up scheduling moves against the flow of
/// time, the algorithm used to find the first free slot in between
/// intervals is the same as for top-down scheduling.
///
/// [*] See \ref `getResourceIntervalTop` and
/// \ref `getResourceIntervalBottom` to see how such resource intervals
/// are built.
unsigned
getFirstAvailableAt(unsigned CurrCycle, unsigned StartAtCycle, unsigned Cycle,
std::function<IntervalTy(unsigned, unsigned, unsigned)>
IntervalBuilder) const;
public:
/// getFirstAvailableAtFromBottom and getFirstAvailableAtFromTop
/// should be merged in a single function in which a function that
/// creates the `NewInterval` is passed as a parameter.
unsigned getFirstAvailableAtFromBottom(unsigned CurrCycle,
unsigned StartAtCycle,
unsigned Cycle) const {
return getFirstAvailableAt(CurrCycle, StartAtCycle, Cycle,
getResourceIntervalBottom);
}
unsigned getFirstAvailableAtFromTop(unsigned CurrCycle, unsigned StartAtCycle,
unsigned Cycle) const {
return getFirstAvailableAt(CurrCycle, StartAtCycle, Cycle,
getResourceIntervalTop);
}
private:
std::list<IntervalTy> _Intervals;
/// Merge all adjacent intervals in the collection. For all pairs
/// of adjacient intervals, it performs [a, b) + [b, c) -> [a, c).
///
/// Before performing the merge operation, the intervals are
/// sorted with \ref sort_predicate.
void sortAndMerge();
public:
// constructor for empty set
explicit ResourceSegments(){};
bool empty() const { return _Intervals.empty(); }
explicit ResourceSegments(std::list<IntervalTy> Intervals)
: _Intervals(Intervals) {
sortAndMerge();
}
friend bool operator==(const ResourceSegments &c1,
const ResourceSegments &c2) {
return c1._Intervals == c2._Intervals;
}
friend llvm::raw_ostream &operator<<(llvm::raw_ostream &os,
const ResourceSegments &Segments) {
os << "{ ";
for (auto p : Segments._Intervals)
os << "[" << p.first << ", " << p.second << "), ";
os << "}\n";
return os;
}
};
/// Each Scheduling boundary is associated with ready queues. It tracks the
/// current cycle in the direction of movement, and maintains the state
/// of "hazards" and other interlocks at the current cycle.
class SchedBoundary {
public:
/// SUnit::NodeQueueId: 0 (none), 1 (top), 2 (bot), 3 (both)
enum {
TopQID = 1,
BotQID = 2,
LogMaxQID = 2
};
ScheduleDAGMI *DAG = nullptr;
const TargetSchedModel *SchedModel = nullptr;
SchedRemainder *Rem = nullptr;
ReadyQueue Available;
ReadyQueue Pending;
ScheduleHazardRecognizer *HazardRec = nullptr;
private:
/// True if the pending Q should be checked/updated before scheduling another
/// instruction.
bool CheckPending;
/// Number of cycles it takes to issue the instructions scheduled in this
/// zone. It is defined as: scheduled-micro-ops / issue-width + stalls.
/// See getStalls().
unsigned CurrCycle;
/// Micro-ops issued in the current cycle
unsigned CurrMOps;
/// MinReadyCycle - Cycle of the soonest available instruction.
unsigned MinReadyCycle;
// The expected latency of the critical path in this scheduled zone.
unsigned ExpectedLatency;
// The latency of dependence chains leading into this zone.
// For each node scheduled bottom-up: DLat = max DLat, N.Depth.
// For each cycle scheduled: DLat -= 1.
unsigned DependentLatency;
/// Count the scheduled (issued) micro-ops that can be retired by
/// time=CurrCycle assuming the first scheduled instr is retired at time=0.
unsigned RetiredMOps;
// Count scheduled resources that have been executed. Resources are
// considered executed if they become ready in the time that it takes to
// saturate any resource including the one in question. Counts are scaled
// for direct comparison with other resources. Counts can be compared with
// MOps * getMicroOpFactor and Latency * getLatencyFactor.
SmallVector<unsigned, 16> ExecutedResCounts;
/// Cache the max count for a single resource.
unsigned MaxExecutedResCount;
// Cache the critical resources ID in this scheduled zone.
unsigned ZoneCritResIdx;
// Is the scheduled region resource limited vs. latency limited.
bool IsResourceLimited;
public:
private:
/// Record how resources have been allocated across the cycles of
/// the execution.
std::map<unsigned, ResourceSegments> ReservedResourceSegments;
std::vector<unsigned> ReservedCycles;
/// For each PIdx, stores first index into ReservedResourceSegments that
/// corresponds to it.
///
/// For example, consider the following 3 resources (ResourceCount =
/// 3):
///
/// +------------+--------+
/// |ResourceName|NumUnits|
/// +------------+--------+
/// | X | 2 |
/// +------------+--------+
/// | Y | 3 |
/// +------------+--------+
/// | Z | 1 |
/// +------------+--------+
///
/// In this case, the total number of resource instances is 6. The
/// vector \ref ReservedResourceSegments will have a slot for each instance.
/// The vector \ref ReservedCyclesIndex will track at what index the first
/// instance of the resource is found in the vector of \ref
/// ReservedResourceSegments:
///
/// Indexes of instances in
/// ReservedResourceSegments
///
/// 0 1 2 3 4 5
/// ReservedCyclesIndex[0] = 0; [X0, X1,
/// ReservedCyclesIndex[1] = 2; Y0, Y1, Y2
/// ReservedCyclesIndex[2] = 5; Z
SmallVector<unsigned, 16> ReservedCyclesIndex;
// For each PIdx, stores the resource group IDs of its subunits
SmallVector<APInt, 16> ResourceGroupSubUnitMasks;
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
// Remember the greatest possible stall as an upper bound on the number of
// times we should retry the pending queue because of a hazard.
unsigned MaxObservedStall;
#endif
public:
/// Pending queues extend the ready queues with the same ID and the
/// PendingFlag set.
SchedBoundary(unsigned ID, const Twine &Name):
Available(ID, Name+".A"), Pending(ID << LogMaxQID, Name+".P") {
reset();
}
SchedBoundary &operator=(const SchedBoundary &other) = delete;
SchedBoundary(const SchedBoundary &other) = delete;
~SchedBoundary();
void reset();
void init(ScheduleDAGMI *dag, const TargetSchedModel *smodel,
SchedRemainder *rem);
bool isTop() const {
return Available.getID() == TopQID;
}
/// Number of cycles to issue the instructions scheduled in this zone.
unsigned getCurrCycle() const { return CurrCycle; }
/// Micro-ops issued in the current cycle
unsigned getCurrMOps() const { return CurrMOps; }
// The latency of dependence chains leading into this zone.
unsigned getDependentLatency() const { return DependentLatency; }
/// Get the number of latency cycles "covered" by the scheduled
/// instructions. This is the larger of the critical path within the zone
/// and the number of cycles required to issue the instructions.
unsigned getScheduledLatency() const {
return std::max(ExpectedLatency, CurrCycle);
}
unsigned getUnscheduledLatency(SUnit *SU) const {
return isTop() ? SU->getHeight() : SU->getDepth();
}
unsigned getResourceCount(unsigned ResIdx) const {
return ExecutedResCounts[ResIdx];
}
/// Get the scaled count of scheduled micro-ops and resources, including
/// executed resources.
unsigned getCriticalCount() const {
if (!ZoneCritResIdx)
return RetiredMOps * SchedModel->getMicroOpFactor();
return getResourceCount(ZoneCritResIdx);
}
/// Get a scaled count for the minimum execution time of the scheduled
/// micro-ops that are ready to execute by getExecutedCount. Notice the
/// feedback loop.
unsigned getExecutedCount() const {
return std::max(CurrCycle * SchedModel->getLatencyFactor(),
MaxExecutedResCount);
}
unsigned getZoneCritResIdx() const { return ZoneCritResIdx; }
// Is the scheduled region resource limited vs. latency limited.
bool isResourceLimited() const { return IsResourceLimited; }
/// Get the difference between the given SUnit's ready time and the current
/// cycle.
unsigned getLatencyStallCycles(SUnit *SU);
unsigned getNextResourceCycleByInstance(unsigned InstanceIndex,
unsigned Cycles,
unsigned StartAtCycle);
std::pair<unsigned, unsigned> getNextResourceCycle(const MCSchedClassDesc *SC,
unsigned PIdx,
unsigned Cycles,
unsigned StartAtCycle);
bool isUnbufferedGroup(unsigned PIdx) const {
return SchedModel->getProcResource(PIdx)->SubUnitsIdxBegin &&
!SchedModel->getProcResource(PIdx)->BufferSize;
}
bool checkHazard(SUnit *SU);
unsigned findMaxLatency(ArrayRef<SUnit*> ReadySUs);
unsigned getOtherResourceCount(unsigned &OtherCritIdx);
/// Release SU to make it ready. If it's not in hazard, remove it from
/// pending queue (if already in) and push into available queue.
/// Otherwise, push the SU into pending queue.
///
/// @param SU The unit to be released.
/// @param ReadyCycle Until which cycle the unit is ready.
/// @param InPQueue Whether SU is already in pending queue.
/// @param Idx Position offset in pending queue (if in it).
void releaseNode(SUnit *SU, unsigned ReadyCycle, bool InPQueue,
unsigned Idx = 0);
void bumpCycle(unsigned NextCycle);
void incExecutedResources(unsigned PIdx, unsigned Count);
unsigned countResource(const MCSchedClassDesc *SC, unsigned PIdx,
unsigned Cycles, unsigned ReadyCycle,
unsigned StartAtCycle);
void bumpNode(SUnit *SU);
void releasePending();
void removeReady(SUnit *SU);
/// Call this before applying any other heuristics to the Available queue.
/// Updates the Available/Pending Q's if necessary and returns the single
/// available instruction, or NULL if there are multiple candidates.
SUnit *pickOnlyChoice();
/// Dump the state of the information that tracks resource usage.
void dumpReservedCycles() const;
void dumpScheduledState() const;
};
/// Base class for GenericScheduler. This class maintains information about
/// scheduling candidates based on TargetSchedModel making it easy to implement
/// heuristics for either preRA or postRA scheduling.
class GenericSchedulerBase : public MachineSchedStrategy {
public:
/// Represent the type of SchedCandidate found within a single queue.
/// pickNodeBidirectional depends on these listed by decreasing priority.
enum CandReason : uint8_t {
NoCand, Only1, PhysReg, RegExcess, RegCritical, Stall, Cluster, Weak,
RegMax, ResourceReduce, ResourceDemand, BotHeightReduce, BotPathReduce,
TopDepthReduce, TopPathReduce, NextDefUse, NodeOrder};
#ifndef NDEBUG
static const char *getReasonStr(GenericSchedulerBase::CandReason Reason);
#endif
/// Policy for scheduling the next instruction in the candidate's zone.
struct CandPolicy {
bool ReduceLatency = false;
unsigned ReduceResIdx = 0;
unsigned DemandResIdx = 0;
CandPolicy() = default;
bool operator==(const CandPolicy &RHS) const {
return ReduceLatency == RHS.ReduceLatency &&
ReduceResIdx == RHS.ReduceResIdx &&
DemandResIdx == RHS.DemandResIdx;
}
bool operator!=(const CandPolicy &RHS) const {
return !(*this == RHS);
}
};
/// Status of an instruction's critical resource consumption.
struct SchedResourceDelta {
// Count critical resources in the scheduled region required by SU.
unsigned CritResources = 0;
// Count critical resources from another region consumed by SU.
unsigned DemandedResources = 0;
SchedResourceDelta() = default;
bool operator==(const SchedResourceDelta &RHS) const {
return CritResources == RHS.CritResources
&& DemandedResources == RHS.DemandedResources;
}
bool operator!=(const SchedResourceDelta &RHS) const {
return !operator==(RHS);
}
};
/// Store the state used by GenericScheduler heuristics, required for the
/// lifetime of one invocation of pickNode().
struct SchedCandidate {
CandPolicy Policy;
// The best SUnit candidate.
SUnit *SU;
// The reason for this candidate.
CandReason Reason;
// Whether this candidate should be scheduled at top/bottom.
bool AtTop;
// Register pressure values for the best candidate.
RegPressureDelta RPDelta;
// Critical resource consumption of the best candidate.
SchedResourceDelta ResDelta;
SchedCandidate() { reset(CandPolicy()); }
SchedCandidate(const CandPolicy &Policy) { reset(Policy); }
void reset(const CandPolicy &NewPolicy) {
Policy = NewPolicy;
SU = nullptr;
Reason = NoCand;
AtTop = false;
RPDelta = RegPressureDelta();
ResDelta = SchedResourceDelta();
}
bool isValid() const { return SU; }
// Copy the status of another candidate without changing policy.
void setBest(SchedCandidate &Best) {
assert(Best.Reason != NoCand && "uninitialized Sched candidate");
SU = Best.SU;
Reason = Best.Reason;
AtTop = Best.AtTop;
RPDelta = Best.RPDelta;
ResDelta = Best.ResDelta;
}
void initResourceDelta(const ScheduleDAGMI *DAG,
const TargetSchedModel *SchedModel);
};
protected:
const MachineSchedContext *Context;
const TargetSchedModel *SchedModel = nullptr;
const TargetRegisterInfo *TRI = nullptr;
SchedRemainder Rem;
GenericSchedulerBase(const MachineSchedContext *C) : Context(C) {}
void setPolicy(CandPolicy &Policy, bool IsPostRA, SchedBoundary &CurrZone,
SchedBoundary *OtherZone);
#ifndef NDEBUG
void traceCandidate(const SchedCandidate &Cand);
#endif
private:
bool shouldReduceLatency(const CandPolicy &Policy, SchedBoundary &CurrZone,
bool ComputeRemLatency, unsigned &RemLatency) const;
};
// Utility functions used by heuristics in tryCandidate().
bool tryLess(int TryVal, int CandVal,
GenericSchedulerBase::SchedCandidate &TryCand,
GenericSchedulerBase::SchedCandidate &Cand,
GenericSchedulerBase::CandReason Reason);
bool tryGreater(int TryVal, int CandVal,
GenericSchedulerBase::SchedCandidate &TryCand,
GenericSchedulerBase::SchedCandidate &Cand,
GenericSchedulerBase::CandReason Reason);
bool tryLatency(GenericSchedulerBase::SchedCandidate &TryCand,
GenericSchedulerBase::SchedCandidate &Cand,
SchedBoundary &Zone);
bool tryPressure(const PressureChange &TryP,
const PressureChange &CandP,
GenericSchedulerBase::SchedCandidate &TryCand,
GenericSchedulerBase::SchedCandidate &Cand,
GenericSchedulerBase::CandReason Reason,
const TargetRegisterInfo *TRI,
const MachineFunction &MF);
unsigned getWeakLeft(const SUnit *SU, bool isTop);
int biasPhysReg(const SUnit *SU, bool isTop);
/// GenericScheduler shrinks the unscheduled zone using heuristics to balance
/// the schedule.
class GenericScheduler : public GenericSchedulerBase {
public:
GenericScheduler(const MachineSchedContext *C):
GenericSchedulerBase(C), Top(SchedBoundary::TopQID, "TopQ"),
Bot(SchedBoundary::BotQID, "BotQ") {}
void initPolicy(MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned NumRegionInstrs) override;
void dumpPolicy() const override;
bool shouldTrackPressure() const override {
return RegionPolicy.ShouldTrackPressure;
}
bool shouldTrackLaneMasks() const override {
return RegionPolicy.ShouldTrackLaneMasks;
}
void initialize(ScheduleDAGMI *dag) override;
SUnit *pickNode(bool &IsTopNode) override;
void schedNode(SUnit *SU, bool IsTopNode) override;
void releaseTopNode(SUnit *SU) override {
if (SU->isScheduled)
return;
Top.releaseNode(SU, SU->TopReadyCycle, false);
TopCand.SU = nullptr;
}
void releaseBottomNode(SUnit *SU) override {
if (SU->isScheduled)
return;
Bot.releaseNode(SU, SU->BotReadyCycle, false);
BotCand.SU = nullptr;
}
void registerRoots() override;
protected:
ScheduleDAGMILive *DAG = nullptr;
MachineSchedPolicy RegionPolicy;
// State of the top and bottom scheduled instruction boundaries.
SchedBoundary Top;
SchedBoundary Bot;
/// Candidate last picked from Top boundary.
SchedCandidate TopCand;
/// Candidate last picked from Bot boundary.
SchedCandidate BotCand;
void checkAcyclicLatency();
void initCandidate(SchedCandidate &Cand, SUnit *SU, bool AtTop,
const RegPressureTracker &RPTracker,
RegPressureTracker &TempTracker);
virtual bool tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand,
SchedBoundary *Zone) const;
SUnit *pickNodeBidirectional(bool &IsTopNode);
void pickNodeFromQueue(SchedBoundary &Zone,
const CandPolicy &ZonePolicy,
const RegPressureTracker &RPTracker,
SchedCandidate &Candidate);
void reschedulePhysReg(SUnit *SU, bool isTop);
};
/// PostGenericScheduler - Interface to the scheduling algorithm used by
/// ScheduleDAGMI.
///
/// Callbacks from ScheduleDAGMI:
/// initPolicy -> initialize(DAG) -> registerRoots -> pickNode ...
class PostGenericScheduler : public GenericSchedulerBase {
protected:
ScheduleDAGMI *DAG = nullptr;
SchedBoundary Top;
SmallVector<SUnit*, 8> BotRoots;
public:
PostGenericScheduler(const MachineSchedContext *C):
GenericSchedulerBase(C), Top(SchedBoundary::TopQID, "TopQ") {}
~PostGenericScheduler() override = default;
void initPolicy(MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned NumRegionInstrs) override {
/* no configurable policy */
}
/// PostRA scheduling does not track pressure.
bool shouldTrackPressure() const override { return false; }
void initialize(ScheduleDAGMI *Dag) override;
void registerRoots() override;
SUnit *pickNode(bool &IsTopNode) override;
void scheduleTree(unsigned SubtreeID) override {
llvm_unreachable("PostRA scheduler does not support subtree analysis.");
}
void schedNode(SUnit *SU, bool IsTopNode) override;
void releaseTopNode(SUnit *SU) override {
if (SU->isScheduled)
return;
Top.releaseNode(SU, SU->TopReadyCycle, false);
}
// Only called for roots.
void releaseBottomNode(SUnit *SU) override {
BotRoots.push_back(SU);
}
protected:
virtual bool tryCandidate(SchedCandidate &Cand, SchedCandidate &TryCand);
void pickNodeFromQueue(SchedCandidate &Cand);
};
/// Create the standard converging machine scheduler. This will be used as the
/// default scheduler if the target does not set a default.
/// Adds default DAG mutations.
ScheduleDAGMILive *createGenericSchedLive(MachineSchedContext *C);
/// Create a generic scheduler with no vreg liveness or DAG mutation passes.
ScheduleDAGMI *createGenericSchedPostRA(MachineSchedContext *C);
std::unique_ptr<ScheduleDAGMutation>
createLoadClusterDAGMutation(const TargetInstrInfo *TII,
const TargetRegisterInfo *TRI);
std::unique_ptr<ScheduleDAGMutation>
createStoreClusterDAGMutation(const TargetInstrInfo *TII,
const TargetRegisterInfo *TRI);
std::unique_ptr<ScheduleDAGMutation>
createCopyConstrainDAGMutation(const TargetInstrInfo *TII,
const TargetRegisterInfo *TRI);
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINESCHEDULER_H
PK iwFZ���Vq� q� CodeGen/RDFGraph.hnu �[��� //===- RDFGraph.h -----------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Target-independent, SSA-based data flow graph for register data flow (RDF)
// for a non-SSA program representation (e.g. post-RA machine code).
//
//
// *** Introduction
//
// The RDF graph is a collection of nodes, each of which denotes some element
// of the program. There are two main types of such elements: code and refe-
// rences. Conceptually, "code" is something that represents the structure
// of the program, e.g. basic block or a statement, while "reference" is an
// instance of accessing a register, e.g. a definition or a use. Nodes are
// connected with each other based on the structure of the program (such as
// blocks, instructions, etc.), and based on the data flow (e.g. reaching
// definitions, reached uses, etc.). The single-reaching-definition principle
// of SSA is generally observed, although, due to the non-SSA representation
// of the program, there are some differences between the graph and a "pure"
// SSA representation.
//
//
// *** Implementation remarks
//
// Since the graph can contain a large number of nodes, memory consumption
// was one of the major design considerations. As a result, there is a single
// base class NodeBase which defines all members used by all possible derived
// classes. The members are arranged in a union, and a derived class cannot
// add any data members of its own. Each derived class only defines the
// functional interface, i.e. member functions. NodeBase must be a POD,
// which implies that all of its members must also be PODs.
// Since nodes need to be connected with other nodes, pointers have been
// replaced with 32-bit identifiers: each node has an id of type NodeId.
// There are mapping functions in the graph that translate between actual
// memory addresses and the corresponding identifiers.
// A node id of 0 is equivalent to nullptr.
//
//
// *** Structure of the graph
//
// A code node is always a collection of other nodes. For example, a code
// node corresponding to a basic block will contain code nodes corresponding
// to instructions. In turn, a code node corresponding to an instruction will
// contain a list of reference nodes that correspond to the definitions and
// uses of registers in that instruction. The members are arranged into a
// circular list, which is yet another consequence of the effort to save
// memory: for each member node it should be possible to obtain its owner,
// and it should be possible to access all other members. There are other
// ways to accomplish that, but the circular list seemed the most natural.
//
// +- CodeNode -+
// | | <---------------------------------------------------+
// +-+--------+-+ |
// |FirstM |LastM |
// | +-------------------------------------+ |
// | | |
// V V |
// +----------+ Next +----------+ Next Next +----------+ Next |
// | |----->| |-----> ... ----->| |----->-+
// +- Member -+ +- Member -+ +- Member -+
//
// The order of members is such that related reference nodes (see below)
// should be contiguous on the member list.
//
// A reference node is a node that encapsulates an access to a register,
// in other words, data flowing into or out of a register. There are two
// major kinds of reference nodes: defs and uses. A def node will contain
// the id of the first reached use, and the id of the first reached def.
// Each def and use will contain the id of the reaching def, and also the
// id of the next reached def (for def nodes) or use (for use nodes).
// The "next node sharing the same reaching def" is denoted as "sibling".
// In summary:
// - Def node contains: reaching def, sibling, first reached def, and first
// reached use.
// - Use node contains: reaching def and sibling.
//
// +-- DefNode --+
// | R2 = ... | <---+--------------------+
// ++---------+--+ | |
// |Reached |Reached | |
// |Def |Use | |
// | | |Reaching |Reaching
// | V |Def |Def
// | +-- UseNode --+ Sib +-- UseNode --+ Sib Sib
// | | ... = R2 |----->| ... = R2 |----> ... ----> 0
// | +-------------+ +-------------+
// V
// +-- DefNode --+ Sib
// | R2 = ... |----> ...
// ++---------+--+
// | |
// | |
// ... ...
//
// To get a full picture, the circular lists connecting blocks within a
// function, instructions within a block, etc. should be superimposed with
// the def-def, def-use links shown above.
// To illustrate this, consider a small example in a pseudo-assembly:
// foo:
// add r2, r0, r1 ; r2 = r0+r1
// addi r0, r2, 1 ; r0 = r2+1
// ret r0 ; return value in r0
//
// The graph (in a format used by the debugging functions) would look like:
//
// DFG dump:[
// f1: Function foo
// b2: === %bb.0 === preds(0), succs(0):
// p3: phi [d4<r0>(,d12,u9):]
// p5: phi [d6<r1>(,,u10):]
// s7: add [d8<r2>(,,u13):, u9<r0>(d4):, u10<r1>(d6):]
// s11: addi [d12<r0>(d4,,u15):, u13<r2>(d8):]
// s14: ret [u15<r0>(d12):]
// ]
//
// The f1, b2, p3, etc. are node ids. The letter is prepended to indicate the
// kind of the node (i.e. f - function, b - basic block, p - phi, s - state-
// ment, d - def, u - use).
// The format of a def node is:
// dN<R>(rd,d,u):sib,
// where
// N - numeric node id,
// R - register being defined
// rd - reaching def,
// d - reached def,
// u - reached use,
// sib - sibling.
// The format of a use node is:
// uN<R>[!](rd):sib,
// where
// N - numeric node id,
// R - register being used,
// rd - reaching def,
// sib - sibling.
// Possible annotations (usually preceding the node id):
// + - preserving def,
// ~ - clobbering def,
// " - shadow ref (follows the node id),
// ! - fixed register (appears after register name).
//
// The circular lists are not explicit in the dump.
//
//
// *** Node attributes
//
// NodeBase has a member "Attrs", which is the primary way of determining
// the node's characteristics. The fields in this member decide whether
// the node is a code node or a reference node (i.e. node's "type"), then
// within each type, the "kind" determines what specifically this node
// represents. The remaining bits, "flags", contain additional information
// that is even more detailed than the "kind".
// CodeNode's kinds are:
// - Phi: Phi node, members are reference nodes.
// - Stmt: Statement, members are reference nodes.
// - Block: Basic block, members are instruction nodes (i.e. Phi or Stmt).
// - Func: The whole function. The members are basic block nodes.
// RefNode's kinds are:
// - Use.
// - Def.
//
// Meaning of flags:
// - Preserving: applies only to defs. A preserving def is one that can
// preserve some of the original bits among those that are included in
// the register associated with that def. For example, if R0 is a 32-bit
// register, but a def can only change the lower 16 bits, then it will
// be marked as preserving.
// - Shadow: a reference that has duplicates holding additional reaching
// defs (see more below).
// - Clobbering: applied only to defs, indicates that the value generated
// by this def is unspecified. A typical example would be volatile registers
// after function calls.
// - Fixed: the register in this def/use cannot be replaced with any other
// register. A typical case would be a parameter register to a call, or
// the register with the return value from a function.
// - Undef: the register in this reference the register is assumed to have
// no pre-existing value, even if it appears to be reached by some def.
// This is typically used to prevent keeping registers artificially live
// in cases when they are defined via predicated instructions. For example:
// r0 = add-if-true cond, r10, r11 (1)
// r0 = add-if-false cond, r12, r13, implicit r0 (2)
// ... = r0 (3)
// Before (1), r0 is not intended to be live, and the use of r0 in (3) is
// not meant to be reached by any def preceding (1). However, since the
// defs in (1) and (2) are both preserving, these properties alone would
// imply that the use in (3) may indeed be reached by some prior def.
// Adding Undef flag to the def in (1) prevents that. The Undef flag
// may be applied to both defs and uses.
// - Dead: applies only to defs. The value coming out of a "dead" def is
// assumed to be unused, even if the def appears to be reaching other defs
// or uses. The motivation for this flag comes from dead defs on function
// calls: there is no way to determine if such a def is dead without
// analyzing the target's ABI. Hence the graph should contain this info,
// as it is unavailable otherwise. On the other hand, a def without any
// uses on a typical instruction is not the intended target for this flag.
//
// *** Shadow references
//
// It may happen that a super-register can have two (or more) non-overlapping
// sub-registers. When both of these sub-registers are defined and followed
// by a use of the super-register, the use of the super-register will not
// have a unique reaching def: both defs of the sub-registers need to be
// accounted for. In such cases, a duplicate use of the super-register is
// added and it points to the extra reaching def. Both uses are marked with
// a flag "shadow". Example:
// Assume t0 is a super-register of r0 and r1, r0 and r1 do not overlap:
// set r0, 1 ; r0 = 1
// set r1, 1 ; r1 = 1
// addi t1, t0, 1 ; t1 = t0+1
//
// The DFG:
// s1: set [d2<r0>(,,u9):]
// s3: set [d4<r1>(,,u10):]
// s5: addi [d6<t1>(,,):, u7"<t0>(d2):, u8"<t0>(d4):]
//
// The statement s5 has two use nodes for t0: u7" and u9". The quotation
// mark " indicates that the node is a shadow.
//
#ifndef LLVM_CODEGEN_RDFGRAPH_H
#define LLVM_CODEGEN_RDFGRAPH_H
#include "RDFRegisters.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/MC/LaneBitmask.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/MathExtras.h"
#include <cassert>
#include <cstdint>
#include <cstring>
#include <map>
#include <memory>
#include <set>
#include <unordered_map>
#include <utility>
#include <vector>
// RDF uses uint32_t to refer to registers. This is to ensure that the type
// size remains specific. In other places, registers are often stored using
// unsigned.
static_assert(sizeof(uint32_t) == sizeof(unsigned), "Those should be equal");
namespace llvm {
class MachineBasicBlock;
class MachineDominanceFrontier;
class MachineDominatorTree;
class MachineFunction;
class MachineInstr;
class MachineOperand;
class raw_ostream;
class TargetInstrInfo;
class TargetRegisterInfo;
namespace rdf {
using NodeId = uint32_t;
struct DataFlowGraph;
struct NodeAttrs {
// clang-format off
enum : uint16_t {
None = 0x0000, // Nothing
// Types: 2 bits
TypeMask = 0x0003,
Code = 0x0001, // 01, Container
Ref = 0x0002, // 10, Reference
// Kind: 3 bits
KindMask = 0x0007 << 2,
Def = 0x0001 << 2, // 001
Use = 0x0002 << 2, // 010
Phi = 0x0003 << 2, // 011
Stmt = 0x0004 << 2, // 100
Block = 0x0005 << 2, // 101
Func = 0x0006 << 2, // 110
// Flags: 7 bits for now
FlagMask = 0x007F << 5,
Shadow = 0x0001 << 5, // 0000001, Has extra reaching defs.
Clobbering = 0x0002 << 5, // 0000010, Produces unspecified values.
PhiRef = 0x0004 << 5, // 0000100, Member of PhiNode.
Preserving = 0x0008 << 5, // 0001000, Def can keep original bits.
Fixed = 0x0010 << 5, // 0010000, Fixed register.
Undef = 0x0020 << 5, // 0100000, Has no pre-existing value.
Dead = 0x0040 << 5, // 1000000, Does not define a value.
};
// clang-format on
static uint16_t type(uint16_t T) { //
return T & TypeMask;
}
static uint16_t kind(uint16_t T) { //
return T & KindMask;
}
static uint16_t flags(uint16_t T) { //
return T & FlagMask;
}
static uint16_t set_type(uint16_t A, uint16_t T) {
return (A & ~TypeMask) | T;
}
static uint16_t set_kind(uint16_t A, uint16_t K) {
return (A & ~KindMask) | K;
}
static uint16_t set_flags(uint16_t A, uint16_t F) {
return (A & ~FlagMask) | F;
}
// Test if A contains B.
static bool contains(uint16_t A, uint16_t B) {
if (type(A) != Code)
return false;
uint16_t KB = kind(B);
switch (kind(A)) {
case Func:
return KB == Block;
case Block:
return KB == Phi || KB == Stmt;
case Phi:
case Stmt:
return type(B) == Ref;
}
return false;
}
};
struct BuildOptions {
enum : unsigned {
None = 0x00,
KeepDeadPhis = 0x01, // Do not remove dead phis during build.
OmitReserved = 0x02, // Do not track reserved registers.
};
};
template <typename T> struct NodeAddr {
NodeAddr() = default;
NodeAddr(T A, NodeId I) : Addr(A), Id(I) {}
// Type cast (casting constructor). The reason for having this class
// instead of std::pair.
template <typename S>
NodeAddr(const NodeAddr<S> &NA) : Addr(static_cast<T>(NA.Addr)), Id(NA.Id) {}
bool operator==(const NodeAddr<T> &NA) const {
assert((Addr == NA.Addr) == (Id == NA.Id));
return Addr == NA.Addr;
}
bool operator!=(const NodeAddr<T> &NA) const { //
return !operator==(NA);
}
T Addr = nullptr;
NodeId Id = 0;
};
struct NodeBase;
struct RefNode;
struct DefNode;
struct UseNode;
struct PhiUseNode;
struct CodeNode;
struct InstrNode;
struct PhiNode;
struct StmtNode;
struct BlockNode;
struct FuncNode;
// Use these short names with rdf:: qualification to avoid conflicts with
// preexisting names. Do not use 'using namespace rdf'.
using Node = NodeAddr<NodeBase *>;
using Ref = NodeAddr<RefNode *>;
using Def = NodeAddr<DefNode *>;
using Use = NodeAddr<UseNode *>; // This may conflict with llvm::Use.
using PhiUse = NodeAddr<PhiUseNode *>;
using Code = NodeAddr<CodeNode *>;
using Instr = NodeAddr<InstrNode *>;
using Phi = NodeAddr<PhiNode *>;
using Stmt = NodeAddr<StmtNode *>;
using Block = NodeAddr<BlockNode *>;
using Func = NodeAddr<FuncNode *>;
// Fast memory allocation and translation between node id and node address.
// This is really the same idea as the one underlying the "bump pointer
// allocator", the difference being in the translation. A node id is
// composed of two components: the index of the block in which it was
// allocated, and the index within the block. With the default settings,
// where the number of nodes per block is 4096, the node id (minus 1) is:
//
// bit position: 11 0
// +----------------------------+--------------+
// | Index of the block |Index in block|
// +----------------------------+--------------+
//
// The actual node id is the above plus 1, to avoid creating a node id of 0.
//
// This method significantly improved the build time, compared to using maps
// (std::unordered_map or DenseMap) to translate between pointers and ids.
struct NodeAllocator {
// Amount of storage for a single node.
enum { NodeMemSize = 32 };
NodeAllocator(uint32_t NPB = 4096)
: NodesPerBlock(NPB), BitsPerIndex(Log2_32(NPB)),
IndexMask((1 << BitsPerIndex) - 1) {
assert(isPowerOf2_32(NPB));
}
NodeBase *ptr(NodeId N) const {
uint32_t N1 = N - 1;
uint32_t BlockN = N1 >> BitsPerIndex;
uint32_t Offset = (N1 & IndexMask) * NodeMemSize;
return reinterpret_cast<NodeBase *>(Blocks[BlockN] + Offset);
}
NodeId id(const NodeBase *P) const;
Node New();
void clear();
private:
void startNewBlock();
bool needNewBlock();
uint32_t makeId(uint32_t Block, uint32_t Index) const {
// Add 1 to the id, to avoid the id of 0, which is treated as "null".
return ((Block << BitsPerIndex) | Index) + 1;
}
const uint32_t NodesPerBlock;
const uint32_t BitsPerIndex;
const uint32_t IndexMask;
char *ActiveEnd = nullptr;
std::vector<char *> Blocks;
using AllocatorTy = BumpPtrAllocatorImpl<MallocAllocator, 65536>;
AllocatorTy MemPool;
};
using RegisterSet = std::set<RegisterRef>;
struct TargetOperandInfo {
TargetOperandInfo(const TargetInstrInfo &tii) : TII(tii) {}
virtual ~TargetOperandInfo() = default;
virtual bool isPreserving(const MachineInstr &In, unsigned OpNum) const;
virtual bool isClobbering(const MachineInstr &In, unsigned OpNum) const;
virtual bool isFixedReg(const MachineInstr &In, unsigned OpNum) const;
const TargetInstrInfo &TII;
};
// Packed register reference. Only used for storage.
struct PackedRegisterRef {
RegisterId Reg;
uint32_t MaskId;
};
struct LaneMaskIndex : private IndexedSet<LaneBitmask> {
LaneMaskIndex() = default;
LaneBitmask getLaneMaskForIndex(uint32_t K) const {
return K == 0 ? LaneBitmask::getAll() : get(K);
}
uint32_t getIndexForLaneMask(LaneBitmask LM) {
assert(LM.any());
return LM.all() ? 0 : insert(LM);
}
uint32_t getIndexForLaneMask(LaneBitmask LM) const {
assert(LM.any());
return LM.all() ? 0 : find(LM);
}
};
struct NodeBase {
public:
// Make sure this is a POD.
NodeBase() = default;
uint16_t getType() const { return NodeAttrs::type(Attrs); }
uint16_t getKind() const { return NodeAttrs::kind(Attrs); }
uint16_t getFlags() const { return NodeAttrs::flags(Attrs); }
NodeId getNext() const { return Next; }
uint16_t getAttrs() const { return Attrs; }
void setAttrs(uint16_t A) { Attrs = A; }
void setFlags(uint16_t F) { setAttrs(NodeAttrs::set_flags(getAttrs(), F)); }
// Insert node NA after "this" in the circular chain.
void append(Node NA);
// Initialize all members to 0.
void init() { memset(this, 0, sizeof *this); }
void setNext(NodeId N) { Next = N; }
protected:
uint16_t Attrs;
uint16_t Reserved;
NodeId Next; // Id of the next node in the circular chain.
// Definitions of nested types. Using anonymous nested structs would make
// this class definition clearer, but unnamed structs are not a part of
// the standard.
struct Def_struct {
NodeId DD, DU; // Ids of the first reached def and use.
};
struct PhiU_struct {
NodeId PredB; // Id of the predecessor block for a phi use.
};
struct Code_struct {
void *CP; // Pointer to the actual code.
NodeId FirstM, LastM; // Id of the first member and last.
};
struct Ref_struct {
NodeId RD, Sib; // Ids of the reaching def and the sibling.
union {
Def_struct Def;
PhiU_struct PhiU;
};
union {
MachineOperand *Op; // Non-phi refs point to a machine operand.
PackedRegisterRef PR; // Phi refs store register info directly.
};
};
// The actual payload.
union {
Ref_struct RefData;
Code_struct CodeData;
};
};
// The allocator allocates chunks of 32 bytes for each node. The fact that
// each node takes 32 bytes in memory is used for fast translation between
// the node id and the node address.
static_assert(sizeof(NodeBase) <= NodeAllocator::NodeMemSize,
"NodeBase must be at most NodeAllocator::NodeMemSize bytes");
using NodeList = SmallVector<Node, 4>;
using NodeSet = std::set<NodeId>;
struct RefNode : public NodeBase {
RefNode() = default;
RegisterRef getRegRef(const DataFlowGraph &G) const;
MachineOperand &getOp() {
assert(!(getFlags() & NodeAttrs::PhiRef));
return *RefData.Op;
}
void setRegRef(RegisterRef RR, DataFlowGraph &G);
void setRegRef(MachineOperand *Op, DataFlowGraph &G);
NodeId getReachingDef() const { return RefData.RD; }
void setReachingDef(NodeId RD) { RefData.RD = RD; }
NodeId getSibling() const { return RefData.Sib; }
void setSibling(NodeId Sib) { RefData.Sib = Sib; }
bool isUse() const {
assert(getType() == NodeAttrs::Ref);
return getKind() == NodeAttrs::Use;
}
bool isDef() const {
assert(getType() == NodeAttrs::Ref);
return getKind() == NodeAttrs::Def;
}
template <typename Predicate>
Ref getNextRef(RegisterRef RR, Predicate P, bool NextOnly,
const DataFlowGraph &G);
Node getOwner(const DataFlowGraph &G);
};
struct DefNode : public RefNode {
NodeId getReachedDef() const { return RefData.Def.DD; }
void setReachedDef(NodeId D) { RefData.Def.DD = D; }
NodeId getReachedUse() const { return RefData.Def.DU; }
void setReachedUse(NodeId U) { RefData.Def.DU = U; }
void linkToDef(NodeId Self, Def DA);
};
struct UseNode : public RefNode {
void linkToDef(NodeId Self, Def DA);
};
struct PhiUseNode : public UseNode {
NodeId getPredecessor() const {
assert(getFlags() & NodeAttrs::PhiRef);
return RefData.PhiU.PredB;
}
void setPredecessor(NodeId B) {
assert(getFlags() & NodeAttrs::PhiRef);
RefData.PhiU.PredB = B;
}
};
struct CodeNode : public NodeBase {
template <typename T> T getCode() const { //
return static_cast<T>(CodeData.CP);
}
void setCode(void *C) { CodeData.CP = C; }
Node getFirstMember(const DataFlowGraph &G) const;
Node getLastMember(const DataFlowGraph &G) const;
void addMember(Node NA, const DataFlowGraph &G);
void addMemberAfter(Node MA, Node NA, const DataFlowGraph &G);
void removeMember(Node NA, const DataFlowGraph &G);
NodeList members(const DataFlowGraph &G) const;
template <typename Predicate>
NodeList members_if(Predicate P, const DataFlowGraph &G) const;
};
struct InstrNode : public CodeNode {
Node getOwner(const DataFlowGraph &G);
};
struct PhiNode : public InstrNode {
MachineInstr *getCode() const { return nullptr; }
};
struct StmtNode : public InstrNode {
MachineInstr *getCode() const { //
return CodeNode::getCode<MachineInstr *>();
}
};
struct BlockNode : public CodeNode {
MachineBasicBlock *getCode() const {
return CodeNode::getCode<MachineBasicBlock *>();
}
void addPhi(Phi PA, const DataFlowGraph &G);
};
struct FuncNode : public CodeNode {
MachineFunction *getCode() const {
return CodeNode::getCode<MachineFunction *>();
}
Block findBlock(const MachineBasicBlock *BB, const DataFlowGraph &G) const;
Block getEntryBlock(const DataFlowGraph &G);
};
struct DataFlowGraph {
DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii,
const TargetRegisterInfo &tri, const MachineDominatorTree &mdt,
const MachineDominanceFrontier &mdf);
DataFlowGraph(MachineFunction &mf, const TargetInstrInfo &tii,
const TargetRegisterInfo &tri, const MachineDominatorTree &mdt,
const MachineDominanceFrontier &mdf,
const TargetOperandInfo &toi);
struct Config {
Config() = default;
Config(unsigned Opts) : Options(Opts) {}
Config(ArrayRef<const TargetRegisterClass *> RCs) : Classes(RCs) {}
Config(ArrayRef<MCPhysReg> Track) : TrackRegs(Track.begin(), Track.end()) {}
Config(ArrayRef<RegisterId> Track)
: TrackRegs(Track.begin(), Track.end()) {}
unsigned Options = BuildOptions::None;
SmallVector<const TargetRegisterClass *> Classes;
std::set<RegisterId> TrackRegs;
};
NodeBase *ptr(NodeId N) const;
template <typename T> T ptr(NodeId N) const { //
return static_cast<T>(ptr(N));
}
NodeId id(const NodeBase *P) const;
template <typename T> NodeAddr<T> addr(NodeId N) const {
return {ptr<T>(N), N};
}
Func getFunc() const { return TheFunc; }
MachineFunction &getMF() const { return MF; }
const TargetInstrInfo &getTII() const { return TII; }
const TargetRegisterInfo &getTRI() const { return TRI; }
const PhysicalRegisterInfo &getPRI() const { return PRI; }
const MachineDominatorTree &getDT() const { return MDT; }
const MachineDominanceFrontier &getDF() const { return MDF; }
const RegisterAggr &getLiveIns() const { return LiveIns; }
struct DefStack {
DefStack() = default;
bool empty() const { return Stack.empty() || top() == bottom(); }
private:
using value_type = Def;
struct Iterator {
using value_type = DefStack::value_type;
Iterator &up() {
Pos = DS.nextUp(Pos);
return *this;
}
Iterator &down() {
Pos = DS.nextDown(Pos);
return *this;
}
value_type operator*() const {
assert(Pos >= 1);
return DS.Stack[Pos - 1];
}
const value_type *operator->() const {
assert(Pos >= 1);
return &DS.Stack[Pos - 1];
}
bool operator==(const Iterator &It) const { return Pos == It.Pos; }
bool operator!=(const Iterator &It) const { return Pos != It.Pos; }
private:
friend struct DefStack;
Iterator(const DefStack &S, bool Top);
// Pos-1 is the index in the StorageType object that corresponds to
// the top of the DefStack.
const DefStack &DS;
unsigned Pos;
};
public:
using iterator = Iterator;
iterator top() const { return Iterator(*this, true); }
iterator bottom() const { return Iterator(*this, false); }
unsigned size() const;
void push(Def DA) { Stack.push_back(DA); }
void pop();
void start_block(NodeId N);
void clear_block(NodeId N);
private:
friend struct Iterator;
using StorageType = std::vector<value_type>;
bool isDelimiter(const StorageType::value_type &P, NodeId N = 0) const {
return (P.Addr == nullptr) && (N == 0 || P.Id == N);
}
unsigned nextUp(unsigned P) const;
unsigned nextDown(unsigned P) const;
StorageType Stack;
};
// Make this std::unordered_map for speed of accessing elements.
// Map: Register (physical or virtual) -> DefStack
using DefStackMap = std::unordered_map<RegisterId, DefStack>;
void build(const Config &config);
void build() { build(Config()); }
void pushAllDefs(Instr IA, DefStackMap &DM);
void markBlock(NodeId B, DefStackMap &DefM);
void releaseBlock(NodeId B, DefStackMap &DefM);
PackedRegisterRef pack(RegisterRef RR) {
return {RR.Reg, LMI.getIndexForLaneMask(RR.Mask)};
}
PackedRegisterRef pack(RegisterRef RR) const {
return {RR.Reg, LMI.getIndexForLaneMask(RR.Mask)};
}
RegisterRef unpack(PackedRegisterRef PR) const {
return RegisterRef(PR.Reg, LMI.getLaneMaskForIndex(PR.MaskId));
}
RegisterRef makeRegRef(unsigned Reg, unsigned Sub) const;
RegisterRef makeRegRef(const MachineOperand &Op) const;
Ref getNextRelated(Instr IA, Ref RA) const;
Ref getNextShadow(Instr IA, Ref RA, bool Create);
NodeList getRelatedRefs(Instr IA, Ref RA) const;
Block findBlock(MachineBasicBlock *BB) const { return BlockNodes.at(BB); }
void unlinkUse(Use UA, bool RemoveFromOwner) {
unlinkUseDF(UA);
if (RemoveFromOwner)
removeFromOwner(UA);
}
void unlinkDef(Def DA, bool RemoveFromOwner) {
unlinkDefDF(DA);
if (RemoveFromOwner)
removeFromOwner(DA);
}
bool isTracked(RegisterRef RR) const;
bool hasUntrackedRef(Stmt S, bool IgnoreReserved = true) const;
// Some useful filters.
template <uint16_t Kind> static bool IsRef(const Node BA) {
return BA.Addr->getType() == NodeAttrs::Ref && BA.Addr->getKind() == Kind;
}
template <uint16_t Kind> static bool IsCode(const Node BA) {
return BA.Addr->getType() == NodeAttrs::Code && BA.Addr->getKind() == Kind;
}
static bool IsDef(const Node BA) {
return BA.Addr->getType() == NodeAttrs::Ref &&
BA.Addr->getKind() == NodeAttrs::Def;
}
static bool IsUse(const Node BA) {
return BA.Addr->getType() == NodeAttrs::Ref &&
BA.Addr->getKind() == NodeAttrs::Use;
}
static bool IsPhi(const Node BA) {
return BA.Addr->getType() == NodeAttrs::Code &&
BA.Addr->getKind() == NodeAttrs::Phi;
}
static bool IsPreservingDef(const Def DA) {
uint16_t Flags = DA.Addr->getFlags();
return (Flags & NodeAttrs::Preserving) && !(Flags & NodeAttrs::Undef);
}
private:
void reset();
RegisterAggr getLandingPadLiveIns() const;
Node newNode(uint16_t Attrs);
Node cloneNode(const Node B);
Use newUse(Instr Owner, MachineOperand &Op, uint16_t Flags = NodeAttrs::None);
PhiUse newPhiUse(Phi Owner, RegisterRef RR, Block PredB,
uint16_t Flags = NodeAttrs::PhiRef);
Def newDef(Instr Owner, MachineOperand &Op, uint16_t Flags = NodeAttrs::None);
Def newDef(Instr Owner, RegisterRef RR, uint16_t Flags = NodeAttrs::PhiRef);
Phi newPhi(Block Owner);
Stmt newStmt(Block Owner, MachineInstr *MI);
Block newBlock(Func Owner, MachineBasicBlock *BB);
Func newFunc(MachineFunction *MF);
template <typename Predicate>
std::pair<Ref, Ref> locateNextRef(Instr IA, Ref RA, Predicate P) const;
using BlockRefsMap = RegisterAggrMap<NodeId>;
void buildStmt(Block BA, MachineInstr &In);
void recordDefsForDF(BlockRefsMap &PhiM, Block BA);
void buildPhis(BlockRefsMap &PhiM, Block BA);
void removeUnusedPhis();
void pushClobbers(Instr IA, DefStackMap &DM);
void pushDefs(Instr IA, DefStackMap &DM);
template <typename T> void linkRefUp(Instr IA, NodeAddr<T> TA, DefStack &DS);
template <typename Predicate>
void linkStmtRefs(DefStackMap &DefM, Stmt SA, Predicate P);
void linkBlockRefs(DefStackMap &DefM, Block BA);
void unlinkUseDF(Use UA);
void unlinkDefDF(Def DA);
void removeFromOwner(Ref RA) {
Instr IA = RA.Addr->getOwner(*this);
IA.Addr->removeMember(RA, *this);
}
// Default TOI object, if not given in the constructor.
std::unique_ptr<TargetOperandInfo> DefaultTOI;
MachineFunction &MF;
const TargetInstrInfo &TII;
const TargetRegisterInfo &TRI;
const PhysicalRegisterInfo PRI;
const MachineDominatorTree &MDT;
const MachineDominanceFrontier &MDF;
const TargetOperandInfo &TOI;
RegisterAggr LiveIns;
Func TheFunc;
NodeAllocator Memory;
// Local map: MachineBasicBlock -> NodeAddr<BlockNode*>
std::map<MachineBasicBlock *, Block> BlockNodes;
// Lane mask map.
LaneMaskIndex LMI;
Config BuildCfg;
std::set<unsigned> TrackedUnits;
BitVector ReservedRegs;
}; // struct DataFlowGraph
template <typename Predicate>
Ref RefNode::getNextRef(RegisterRef RR, Predicate P, bool NextOnly,
const DataFlowGraph &G) {
// Get the "Next" reference in the circular list that references RR and
// satisfies predicate "Pred".
auto NA = G.addr<NodeBase *>(getNext());
while (NA.Addr != this) {
if (NA.Addr->getType() == NodeAttrs::Ref) {
Ref RA = NA;
if (G.getPRI().equal_to(RA.Addr->getRegRef(G), RR) && P(NA))
return NA;
if (NextOnly)
break;
NA = G.addr<NodeBase *>(NA.Addr->getNext());
} else {
// We've hit the beginning of the chain.
assert(NA.Addr->getType() == NodeAttrs::Code);
// Make sure we stop here with NextOnly. Otherwise we can return the
// wrong ref. Consider the following while creating/linking shadow uses:
// -> code -> sr1 -> sr2 -> [back to code]
// Say that shadow refs sr1, and sr2 have been linked, but we need to
// create and link another one. Starting from sr2, we'd hit the code
// node and return sr1 if the iteration didn't stop here.
if (NextOnly)
break;
Code CA = NA;
NA = CA.Addr->getFirstMember(G);
}
}
// Return the equivalent of "nullptr" if such a node was not found.
return Ref();
}
template <typename Predicate>
NodeList CodeNode::members_if(Predicate P, const DataFlowGraph &G) const {
NodeList MM;
auto M = getFirstMember(G);
if (M.Id == 0)
return MM;
while (M.Addr != this) {
if (P(M))
MM.push_back(M);
M = G.addr<NodeBase *>(M.Addr->getNext());
}
return MM;
}
template <typename T> struct Print {
Print(const T &x, const DataFlowGraph &g) : Obj(x), G(g) {}
const T &Obj;
const DataFlowGraph &G;
};
template <typename T> Print(const T &, const DataFlowGraph &) -> Print<T>;
template <typename T> struct PrintNode : Print<NodeAddr<T>> {
PrintNode(const NodeAddr<T> &x, const DataFlowGraph &g)
: Print<NodeAddr<T>>(x, g) {}
};
raw_ostream &operator<<(raw_ostream &OS, const Print<RegisterRef> &P);
raw_ostream &operator<<(raw_ostream &OS, const Print<NodeId> &P);
raw_ostream &operator<<(raw_ostream &OS, const Print<Def> &P);
raw_ostream &operator<<(raw_ostream &OS, const Print<Use> &P);
raw_ostream &operator<<(raw_ostream &OS, const Print<PhiUse> &P);
raw_ostream &operator<<(raw_ostream &OS, const Print<Ref> &P);
raw_ostream &operator<<(raw_ostream &OS, const Print<NodeList> &P);
raw_ostream &operator<<(raw_ostream &OS, const Print<NodeSet> &P);
raw_ostream &operator<<(raw_ostream &OS, const Print<Phi> &P);
raw_ostream &operator<<(raw_ostream &OS, const Print<Stmt> &P);
raw_ostream &operator<<(raw_ostream &OS, const Print<Instr> &P);
raw_ostream &operator<<(raw_ostream &OS, const Print<Block> &P);
raw_ostream &operator<<(raw_ostream &OS, const Print<Func> &P);
raw_ostream &operator<<(raw_ostream &OS, const Print<RegisterSet> &P);
raw_ostream &operator<<(raw_ostream &OS, const Print<RegisterAggr> &P);
raw_ostream &operator<<(raw_ostream &OS,
const Print<DataFlowGraph::DefStack> &P);
} // end namespace rdf
} // end namespace llvm
#endif // LLVM_CODEGEN_RDFGRAPH_H
PK iwFZ��N& & CodeGen/RegisterUsageInfo.hnu �[��� //==- RegisterUsageInfo.h - Register Usage Informartion Storage --*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This pass is required to take advantage of the interprocedural register
/// allocation infrastructure.
///
/// This pass is simple immutable pass which keeps RegMasks (calculated based on
/// actual register allocation) for functions in a module and provides simple
/// API to query this information.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_REGISTERUSAGEINFO_H
#define LLVM_CODEGEN_REGISTERUSAGEINFO_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/InitializePasses.h"
#include "llvm/Pass.h"
#include "llvm/PassRegistry.h"
#include <cstdint>
#include <vector>
namespace llvm {
class Function;
class LLVMTargetMachine;
class PhysicalRegisterUsageInfo : public ImmutablePass {
public:
static char ID;
PhysicalRegisterUsageInfo() : ImmutablePass(ID) {
PassRegistry &Registry = *PassRegistry::getPassRegistry();
initializePhysicalRegisterUsageInfoPass(Registry);
}
/// Set TargetMachine which is used to print analysis.
void setTargetMachine(const LLVMTargetMachine &TM);
bool doInitialization(Module &M) override;
bool doFinalization(Module &M) override;
/// To store RegMask for given Function *.
void storeUpdateRegUsageInfo(const Function &FP,
ArrayRef<uint32_t> RegMask);
/// To query stored RegMask for given Function *, it will returns ane empty
/// array if function is not known.
ArrayRef<uint32_t> getRegUsageInfo(const Function &FP);
void print(raw_ostream &OS, const Module *M = nullptr) const override;
private:
/// A Dense map from Function * to RegMask.
/// In RegMask 0 means register used (clobbered) by function.
/// and 1 means content of register will be preserved around function call.
DenseMap<const Function *, std::vector<uint32_t>> RegMasks;
const LLVMTargetMachine *TM = nullptr;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_REGISTERUSAGEINFO_H
PK iwFZ��Ԡ� �� CodeGen/MachineBasicBlock.hnu �[��� //===- llvm/CodeGen/MachineBasicBlock.h -------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Collect the sequence of machine instructions for a basic block.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEBASICBLOCK_H
#define LLVM_CODEGEN_MACHINEBASICBLOCK_H
#include "llvm/ADT/GraphTraits.h"
#include "llvm/ADT/SparseBitVector.h"
#include "llvm/ADT/ilist.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBundleIterator.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/MC/LaneBitmask.h"
#include "llvm/Support/BranchProbability.h"
#include <cassert>
#include <cstdint>
#include <iterator>
#include <string>
#include <vector>
namespace llvm {
class BasicBlock;
class MachineFunction;
class MCSymbol;
class ModuleSlotTracker;
class Pass;
class Printable;
class SlotIndexes;
class StringRef;
class raw_ostream;
class LiveIntervals;
class TargetRegisterClass;
class TargetRegisterInfo;
// This structure uniquely identifies a basic block section.
// Possible values are
// {Type: Default, Number: (unsigned)} (These are regular section IDs)
// {Type: Exception, Number: 0} (ExceptionSectionID)
// {Type: Cold, Number: 0} (ColdSectionID)
struct MBBSectionID {
enum SectionType {
Default = 0, // Regular section (these sections are distinguished by the
// Number field).
Exception, // Special section type for exception handling blocks
Cold, // Special section type for cold blocks
} Type;
unsigned Number;
MBBSectionID(unsigned N) : Type(Default), Number(N) {}
// Special unique sections for cold and exception blocks.
const static MBBSectionID ColdSectionID;
const static MBBSectionID ExceptionSectionID;
bool operator==(const MBBSectionID &Other) const {
return Type == Other.Type && Number == Other.Number;
}
bool operator!=(const MBBSectionID &Other) const { return !(*this == Other); }
private:
// This is only used to construct the special cold and exception sections.
MBBSectionID(SectionType T) : Type(T), Number(0) {}
};
template <> struct ilist_traits<MachineInstr> {
private:
friend class MachineBasicBlock; // Set by the owning MachineBasicBlock.
MachineBasicBlock *Parent;
using instr_iterator =
simple_ilist<MachineInstr, ilist_sentinel_tracking<true>>::iterator;
public:
void addNodeToList(MachineInstr *N);
void removeNodeFromList(MachineInstr *N);
void transferNodesFromList(ilist_traits &FromList, instr_iterator First,
instr_iterator Last);
void deleteNode(MachineInstr *MI);
};
class MachineBasicBlock
: public ilist_node_with_parent<MachineBasicBlock, MachineFunction> {
public:
/// Pair of physical register and lane mask.
/// This is not simply a std::pair typedef because the members should be named
/// clearly as they both have an integer type.
struct RegisterMaskPair {
public:
MCPhysReg PhysReg;
LaneBitmask LaneMask;
RegisterMaskPair(MCPhysReg PhysReg, LaneBitmask LaneMask)
: PhysReg(PhysReg), LaneMask(LaneMask) {}
};
private:
using Instructions = ilist<MachineInstr, ilist_sentinel_tracking<true>>;
const BasicBlock *BB;
int Number;
MachineFunction *xParent;
Instructions Insts;
/// Keep track of the predecessor / successor basic blocks.
std::vector<MachineBasicBlock *> Predecessors;
std::vector<MachineBasicBlock *> Successors;
/// Keep track of the probabilities to the successors. This vector has the
/// same order as Successors, or it is empty if we don't use it (disable
/// optimization).
std::vector<BranchProbability> Probs;
using probability_iterator = std::vector<BranchProbability>::iterator;
using const_probability_iterator =
std::vector<BranchProbability>::const_iterator;
std::optional<uint64_t> IrrLoopHeaderWeight;
/// Keep track of the physical registers that are livein of the basicblock.
using LiveInVector = std::vector<RegisterMaskPair>;
LiveInVector LiveIns;
/// Alignment of the basic block. One if the basic block does not need to be
/// aligned.
Align Alignment;
/// Maximum amount of bytes that can be added to align the basic block. If the
/// alignment cannot be reached in this many bytes, no bytes are emitted.
/// Zero to represent no maximum.
unsigned MaxBytesForAlignment = 0;
/// Indicate that this basic block is entered via an exception handler.
bool IsEHPad = false;
/// Indicate that this MachineBasicBlock is referenced somewhere other than
/// as predecessor/successor, a terminator MachineInstr, or a jump table.
bool MachineBlockAddressTaken = false;
/// If this MachineBasicBlock corresponds to an IR-level "blockaddress"
/// constant, this contains a pointer to that block.
BasicBlock *AddressTakenIRBlock = nullptr;
/// Indicate that this basic block needs its symbol be emitted regardless of
/// whether the flow just falls-through to it.
bool LabelMustBeEmitted = false;
/// Indicate that this basic block is the entry block of an EH scope, i.e.,
/// the block that used to have a catchpad or cleanuppad instruction in the
/// LLVM IR.
bool IsEHScopeEntry = false;
/// Indicates if this is a target block of a catchret.
bool IsEHCatchretTarget = false;
/// Indicate that this basic block is the entry block of an EH funclet.
bool IsEHFuncletEntry = false;
/// Indicate that this basic block is the entry block of a cleanup funclet.
bool IsCleanupFuncletEntry = false;
/// Fixed unique ID assigned to this basic block upon creation. Used with
/// basic block sections and basic block labels.
std::optional<unsigned> BBID;
/// With basic block sections, this stores the Section ID of the basic block.
MBBSectionID SectionID{0};
// Indicate that this basic block begins a section.
bool IsBeginSection = false;
// Indicate that this basic block ends a section.
bool IsEndSection = false;
/// Indicate that this basic block is the indirect dest of an INLINEASM_BR.
bool IsInlineAsmBrIndirectTarget = false;
/// since getSymbol is a relatively heavy-weight operation, the symbol
/// is only computed once and is cached.
mutable MCSymbol *CachedMCSymbol = nullptr;
/// Cached MCSymbol for this block (used if IsEHCatchRetTarget).
mutable MCSymbol *CachedEHCatchretMCSymbol = nullptr;
/// Marks the end of the basic block. Used during basic block sections to
/// calculate the size of the basic block, or the BB section ending with it.
mutable MCSymbol *CachedEndMCSymbol = nullptr;
// Intrusive list support
MachineBasicBlock() = default;
explicit MachineBasicBlock(MachineFunction &MF, const BasicBlock *BB);
~MachineBasicBlock();
// MachineBasicBlocks are allocated and owned by MachineFunction.
friend class MachineFunction;
public:
/// Return the LLVM basic block that this instance corresponded to originally.
/// Note that this may be NULL if this instance does not correspond directly
/// to an LLVM basic block.
const BasicBlock *getBasicBlock() const { return BB; }
/// Remove the reference to the underlying IR BasicBlock. This is for
/// reduction tools and should generally not be used.
void clearBasicBlock() {
BB = nullptr;
}
/// Return the name of the corresponding LLVM basic block, or an empty string.
StringRef getName() const;
/// Return a formatted string to identify this block and its parent function.
std::string getFullName() const;
/// Test whether this block is used as as something other than the target
/// of a terminator, exception-handling target, or jump table. This is
/// either the result of an IR-level "blockaddress", or some form
/// of target-specific branch lowering.
bool hasAddressTaken() const {
return MachineBlockAddressTaken || AddressTakenIRBlock;
}
/// Test whether this block is used as something other than the target of a
/// terminator, exception-handling target, jump table, or IR blockaddress.
/// For example, its address might be loaded into a register, or
/// stored in some branch table that isn't part of MachineJumpTableInfo.
bool isMachineBlockAddressTaken() const { return MachineBlockAddressTaken; }
/// Test whether this block is the target of an IR BlockAddress. (There can
/// more than one MBB associated with an IR BB where the address is taken.)
bool isIRBlockAddressTaken() const { return AddressTakenIRBlock; }
/// Retrieves the BasicBlock which corresponds to this MachineBasicBlock.
BasicBlock *getAddressTakenIRBlock() const { return AddressTakenIRBlock; }
/// Set this block to indicate that its address is used as something other
/// than the target of a terminator, exception-handling target, jump table,
/// or IR-level "blockaddress".
void setMachineBlockAddressTaken() { MachineBlockAddressTaken = true; }
/// Set this block to reflect that it corresponds to an IR-level basic block
/// with a BlockAddress.
void setAddressTakenIRBlock(BasicBlock *BB) { AddressTakenIRBlock = BB; }
/// Test whether this block must have its label emitted.
bool hasLabelMustBeEmitted() const { return LabelMustBeEmitted; }
/// Set this block to reflect that, regardless how we flow to it, we need
/// its label be emitted.
void setLabelMustBeEmitted() { LabelMustBeEmitted = true; }
/// Return the MachineFunction containing this basic block.
const MachineFunction *getParent() const { return xParent; }
MachineFunction *getParent() { return xParent; }
using instr_iterator = Instructions::iterator;
using const_instr_iterator = Instructions::const_iterator;
using reverse_instr_iterator = Instructions::reverse_iterator;
using const_reverse_instr_iterator = Instructions::const_reverse_iterator;
using iterator = MachineInstrBundleIterator<MachineInstr>;
using const_iterator = MachineInstrBundleIterator<const MachineInstr>;
using reverse_iterator = MachineInstrBundleIterator<MachineInstr, true>;
using const_reverse_iterator =
MachineInstrBundleIterator<const MachineInstr, true>;
unsigned size() const { return (unsigned)Insts.size(); }
bool sizeWithoutDebugLargerThan(unsigned Limit) const;
bool empty() const { return Insts.empty(); }
MachineInstr &instr_front() { return Insts.front(); }
MachineInstr &instr_back() { return Insts.back(); }
const MachineInstr &instr_front() const { return Insts.front(); }
const MachineInstr &instr_back() const { return Insts.back(); }
MachineInstr &front() { return Insts.front(); }
MachineInstr &back() { return *--end(); }
const MachineInstr &front() const { return Insts.front(); }
const MachineInstr &back() const { return *--end(); }
instr_iterator instr_begin() { return Insts.begin(); }
const_instr_iterator instr_begin() const { return Insts.begin(); }
instr_iterator instr_end() { return Insts.end(); }
const_instr_iterator instr_end() const { return Insts.end(); }
reverse_instr_iterator instr_rbegin() { return Insts.rbegin(); }
const_reverse_instr_iterator instr_rbegin() const { return Insts.rbegin(); }
reverse_instr_iterator instr_rend () { return Insts.rend(); }
const_reverse_instr_iterator instr_rend () const { return Insts.rend(); }
using instr_range = iterator_range<instr_iterator>;
using const_instr_range = iterator_range<const_instr_iterator>;
instr_range instrs() { return instr_range(instr_begin(), instr_end()); }
const_instr_range instrs() const {
return const_instr_range(instr_begin(), instr_end());
}
iterator begin() { return instr_begin(); }
const_iterator begin() const { return instr_begin(); }
iterator end () { return instr_end(); }
const_iterator end () const { return instr_end(); }
reverse_iterator rbegin() {
return reverse_iterator::getAtBundleBegin(instr_rbegin());
}
const_reverse_iterator rbegin() const {
return const_reverse_iterator::getAtBundleBegin(instr_rbegin());
}
reverse_iterator rend() { return reverse_iterator(instr_rend()); }
const_reverse_iterator rend() const {
return const_reverse_iterator(instr_rend());
}
/// Support for MachineInstr::getNextNode().
static Instructions MachineBasicBlock::*getSublistAccess(MachineInstr *) {
return &MachineBasicBlock::Insts;
}
inline iterator_range<iterator> terminators() {
return make_range(getFirstTerminator(), end());
}
inline iterator_range<const_iterator> terminators() const {
return make_range(getFirstTerminator(), end());
}
/// Returns a range that iterates over the phis in the basic block.
inline iterator_range<iterator> phis() {
return make_range(begin(), getFirstNonPHI());
}
inline iterator_range<const_iterator> phis() const {
return const_cast<MachineBasicBlock *>(this)->phis();
}
// Machine-CFG iterators
using pred_iterator = std::vector<MachineBasicBlock *>::iterator;
using const_pred_iterator = std::vector<MachineBasicBlock *>::const_iterator;
using succ_iterator = std::vector<MachineBasicBlock *>::iterator;
using const_succ_iterator = std::vector<MachineBasicBlock *>::const_iterator;
using pred_reverse_iterator =
std::vector<MachineBasicBlock *>::reverse_iterator;
using const_pred_reverse_iterator =
std::vector<MachineBasicBlock *>::const_reverse_iterator;
using succ_reverse_iterator =
std::vector<MachineBasicBlock *>::reverse_iterator;
using const_succ_reverse_iterator =
std::vector<MachineBasicBlock *>::const_reverse_iterator;
pred_iterator pred_begin() { return Predecessors.begin(); }
const_pred_iterator pred_begin() const { return Predecessors.begin(); }
pred_iterator pred_end() { return Predecessors.end(); }
const_pred_iterator pred_end() const { return Predecessors.end(); }
pred_reverse_iterator pred_rbegin()
{ return Predecessors.rbegin();}
const_pred_reverse_iterator pred_rbegin() const
{ return Predecessors.rbegin();}
pred_reverse_iterator pred_rend()
{ return Predecessors.rend(); }
const_pred_reverse_iterator pred_rend() const
{ return Predecessors.rend(); }
unsigned pred_size() const {
return (unsigned)Predecessors.size();
}
bool pred_empty() const { return Predecessors.empty(); }
succ_iterator succ_begin() { return Successors.begin(); }
const_succ_iterator succ_begin() const { return Successors.begin(); }
succ_iterator succ_end() { return Successors.end(); }
const_succ_iterator succ_end() const { return Successors.end(); }
succ_reverse_iterator succ_rbegin()
{ return Successors.rbegin(); }
const_succ_reverse_iterator succ_rbegin() const
{ return Successors.rbegin(); }
succ_reverse_iterator succ_rend()
{ return Successors.rend(); }
const_succ_reverse_iterator succ_rend() const
{ return Successors.rend(); }
unsigned succ_size() const {
return (unsigned)Successors.size();
}
bool succ_empty() const { return Successors.empty(); }
inline iterator_range<pred_iterator> predecessors() {
return make_range(pred_begin(), pred_end());
}
inline iterator_range<const_pred_iterator> predecessors() const {
return make_range(pred_begin(), pred_end());
}
inline iterator_range<succ_iterator> successors() {
return make_range(succ_begin(), succ_end());
}
inline iterator_range<const_succ_iterator> successors() const {
return make_range(succ_begin(), succ_end());
}
// LiveIn management methods.
/// Adds the specified register as a live in. Note that it is an error to add
/// the same register to the same set more than once unless the intention is
/// to call sortUniqueLiveIns after all registers are added.
void addLiveIn(MCRegister PhysReg,
LaneBitmask LaneMask = LaneBitmask::getAll()) {
LiveIns.push_back(RegisterMaskPair(PhysReg, LaneMask));
}
void addLiveIn(const RegisterMaskPair &RegMaskPair) {
LiveIns.push_back(RegMaskPair);
}
/// Sorts and uniques the LiveIns vector. It can be significantly faster to do
/// this than repeatedly calling isLiveIn before calling addLiveIn for every
/// LiveIn insertion.
void sortUniqueLiveIns();
/// Clear live in list.
void clearLiveIns();
/// Add PhysReg as live in to this block, and ensure that there is a copy of
/// PhysReg to a virtual register of class RC. Return the virtual register
/// that is a copy of the live in PhysReg.
Register addLiveIn(MCRegister PhysReg, const TargetRegisterClass *RC);
/// Remove the specified register from the live in set.
void removeLiveIn(MCPhysReg Reg,
LaneBitmask LaneMask = LaneBitmask::getAll());
/// Return true if the specified register is in the live in set.
bool isLiveIn(MCPhysReg Reg,
LaneBitmask LaneMask = LaneBitmask::getAll()) const;
// Iteration support for live in sets. These sets are kept in sorted
// order by their register number.
using livein_iterator = LiveInVector::const_iterator;
/// Unlike livein_begin, this method does not check that the liveness
/// information is accurate. Still for debug purposes it may be useful
/// to have iterators that won't assert if the liveness information
/// is not current.
livein_iterator livein_begin_dbg() const { return LiveIns.begin(); }
iterator_range<livein_iterator> liveins_dbg() const {
return make_range(livein_begin_dbg(), livein_end());
}
livein_iterator livein_begin() const;
livein_iterator livein_end() const { return LiveIns.end(); }
bool livein_empty() const { return LiveIns.empty(); }
iterator_range<livein_iterator> liveins() const {
return make_range(livein_begin(), livein_end());
}
/// Remove entry from the livein set and return iterator to the next.
livein_iterator removeLiveIn(livein_iterator I);
class liveout_iterator {
public:
using iterator_category = std::input_iterator_tag;
using difference_type = std::ptrdiff_t;
using value_type = RegisterMaskPair;
using pointer = const RegisterMaskPair *;
using reference = const RegisterMaskPair &;
liveout_iterator(const MachineBasicBlock &MBB, MCPhysReg ExceptionPointer,
MCPhysReg ExceptionSelector, bool End)
: ExceptionPointer(ExceptionPointer),
ExceptionSelector(ExceptionSelector), BlockI(MBB.succ_begin()),
BlockEnd(MBB.succ_end()) {
if (End)
BlockI = BlockEnd;
else if (BlockI != BlockEnd) {
LiveRegI = (*BlockI)->livein_begin();
if (!advanceToValidPosition())
return;
if (LiveRegI->PhysReg == ExceptionPointer ||
LiveRegI->PhysReg == ExceptionSelector)
++(*this);
}
}
liveout_iterator &operator++() {
do {
++LiveRegI;
if (!advanceToValidPosition())
return *this;
} while ((*BlockI)->isEHPad() &&
(LiveRegI->PhysReg == ExceptionPointer ||
LiveRegI->PhysReg == ExceptionSelector));
return *this;
}
liveout_iterator operator++(int) {
liveout_iterator Tmp = *this;
++(*this);
return Tmp;
}
reference operator*() const {
return *LiveRegI;
}
pointer operator->() const {
return &*LiveRegI;
}
bool operator==(const liveout_iterator &RHS) const {
if (BlockI != BlockEnd)
return BlockI == RHS.BlockI && LiveRegI == RHS.LiveRegI;
return RHS.BlockI == BlockEnd;
}
bool operator!=(const liveout_iterator &RHS) const {
return !(*this == RHS);
}
private:
bool advanceToValidPosition() {
if (LiveRegI != (*BlockI)->livein_end())
return true;
do {
++BlockI;
} while (BlockI != BlockEnd && (*BlockI)->livein_empty());
if (BlockI == BlockEnd)
return false;
LiveRegI = (*BlockI)->livein_begin();
return true;
}
MCPhysReg ExceptionPointer, ExceptionSelector;
const_succ_iterator BlockI;
const_succ_iterator BlockEnd;
livein_iterator LiveRegI;
};
/// Iterator scanning successor basic blocks' liveins to determine the
/// registers potentially live at the end of this block. There may be
/// duplicates or overlapping registers in the list returned.
liveout_iterator liveout_begin() const;
liveout_iterator liveout_end() const {
return liveout_iterator(*this, 0, 0, true);
}
iterator_range<liveout_iterator> liveouts() const {
return make_range(liveout_begin(), liveout_end());
}
/// Get the clobber mask for the start of this basic block. Funclets use this
/// to prevent register allocation across funclet transitions.
const uint32_t *getBeginClobberMask(const TargetRegisterInfo *TRI) const;
/// Get the clobber mask for the end of the basic block.
/// \see getBeginClobberMask()
const uint32_t *getEndClobberMask(const TargetRegisterInfo *TRI) const;
/// Return alignment of the basic block.
Align getAlignment() const { return Alignment; }
/// Set alignment of the basic block.
void setAlignment(Align A) { Alignment = A; }
void setAlignment(Align A, unsigned MaxBytes) {
setAlignment(A);
setMaxBytesForAlignment(MaxBytes);
}
/// Return the maximum amount of padding allowed for aligning the basic block.
unsigned getMaxBytesForAlignment() const { return MaxBytesForAlignment; }
/// Set the maximum amount of padding allowed for aligning the basic block
void setMaxBytesForAlignment(unsigned MaxBytes) {
MaxBytesForAlignment = MaxBytes;
}
/// Returns true if the block is a landing pad. That is this basic block is
/// entered via an exception handler.
bool isEHPad() const { return IsEHPad; }
/// Indicates the block is a landing pad. That is this basic block is entered
/// via an exception handler.
void setIsEHPad(bool V = true) { IsEHPad = V; }
bool hasEHPadSuccessor() const;
/// Returns true if this is the entry block of the function.
bool isEntryBlock() const;
/// Returns true if this is the entry block of an EH scope, i.e., the block
/// that used to have a catchpad or cleanuppad instruction in the LLVM IR.
bool isEHScopeEntry() const { return IsEHScopeEntry; }
/// Indicates if this is the entry block of an EH scope, i.e., the block that
/// that used to have a catchpad or cleanuppad instruction in the LLVM IR.
void setIsEHScopeEntry(bool V = true) { IsEHScopeEntry = V; }
/// Returns true if this is a target block of a catchret.
bool isEHCatchretTarget() const { return IsEHCatchretTarget; }
/// Indicates if this is a target block of a catchret.
void setIsEHCatchretTarget(bool V = true) { IsEHCatchretTarget = V; }
/// Returns true if this is the entry block of an EH funclet.
bool isEHFuncletEntry() const { return IsEHFuncletEntry; }
/// Indicates if this is the entry block of an EH funclet.
void setIsEHFuncletEntry(bool V = true) { IsEHFuncletEntry = V; }
/// Returns true if this is the entry block of a cleanup funclet.
bool isCleanupFuncletEntry() const { return IsCleanupFuncletEntry; }
/// Indicates if this is the entry block of a cleanup funclet.
void setIsCleanupFuncletEntry(bool V = true) { IsCleanupFuncletEntry = V; }
/// Returns true if this block begins any section.
bool isBeginSection() const { return IsBeginSection; }
/// Returns true if this block ends any section.
bool isEndSection() const { return IsEndSection; }
void setIsBeginSection(bool V = true) { IsBeginSection = V; }
void setIsEndSection(bool V = true) { IsEndSection = V; }
std::optional<unsigned> getBBID() const { return BBID; }
/// Returns the BBID of the block when BBAddrMapVersion >= 2, otherwise
/// returns `MachineBasicBlock::Number`.
/// TODO: Remove this function when version 1 is deprecated and replace its
/// uses with `getBBID()`.
unsigned getBBIDOrNumber() const;
/// Returns the section ID of this basic block.
MBBSectionID getSectionID() const { return SectionID; }
/// Returns the unique section ID number of this basic block.
unsigned getSectionIDNum() const {
return ((unsigned)MBBSectionID::SectionType::Cold) -
((unsigned)SectionID.Type) + SectionID.Number;
}
/// Sets the fixed BBID of this basic block.
void setBBID(unsigned V) {
assert(!BBID.has_value() && "Cannot change BBID.");
BBID = V;
}
/// Sets the section ID for this basic block.
void setSectionID(MBBSectionID V) { SectionID = V; }
/// Returns the MCSymbol marking the end of this basic block.
MCSymbol *getEndSymbol() const;
/// Returns true if this block may have an INLINEASM_BR (overestimate, by
/// checking if any of the successors are indirect targets of any inlineasm_br
/// in the function).
bool mayHaveInlineAsmBr() const;
/// Returns true if this is the indirect dest of an INLINEASM_BR.
bool isInlineAsmBrIndirectTarget() const {
return IsInlineAsmBrIndirectTarget;
}
/// Indicates if this is the indirect dest of an INLINEASM_BR.
void setIsInlineAsmBrIndirectTarget(bool V = true) {
IsInlineAsmBrIndirectTarget = V;
}
/// Returns true if it is legal to hoist instructions into this block.
bool isLegalToHoistInto() const;
// Code Layout methods.
/// Move 'this' block before or after the specified block. This only moves
/// the block, it does not modify the CFG or adjust potential fall-throughs at
/// the end of the block.
void moveBefore(MachineBasicBlock *NewAfter);
void moveAfter(MachineBasicBlock *NewBefore);
/// Returns true if this and MBB belong to the same section.
bool sameSection(const MachineBasicBlock *MBB) const {
return getSectionID() == MBB->getSectionID();
}
/// Update the terminator instructions in block to account for changes to
/// block layout which may have been made. PreviousLayoutSuccessor should be
/// set to the block which may have been used as fallthrough before the block
/// layout was modified. If the block previously fell through to that block,
/// it may now need a branch. If it previously branched to another block, it
/// may now be able to fallthrough to the current layout successor.
void updateTerminator(MachineBasicBlock *PreviousLayoutSuccessor);
// Machine-CFG mutators
/// Add Succ as a successor of this MachineBasicBlock. The Predecessors list
/// of Succ is automatically updated. PROB parameter is stored in
/// Probabilities list. The default probability is set as unknown. Mixing
/// known and unknown probabilities in successor list is not allowed. When all
/// successors have unknown probabilities, 1 / N is returned as the
/// probability for each successor, where N is the number of successors.
///
/// Note that duplicate Machine CFG edges are not allowed.
void addSuccessor(MachineBasicBlock *Succ,
BranchProbability Prob = BranchProbability::getUnknown());
/// Add Succ as a successor of this MachineBasicBlock. The Predecessors list
/// of Succ is automatically updated. The probability is not provided because
/// BPI is not available (e.g. -O0 is used), in which case edge probabilities
/// won't be used. Using this interface can save some space.
void addSuccessorWithoutProb(MachineBasicBlock *Succ);
/// Set successor probability of a given iterator.
void setSuccProbability(succ_iterator I, BranchProbability Prob);
/// Normalize probabilities of all successors so that the sum of them becomes
/// one. This is usually done when the current update on this MBB is done, and
/// the sum of its successors' probabilities is not guaranteed to be one. The
/// user is responsible for the correct use of this function.
/// MBB::removeSuccessor() has an option to do this automatically.
void normalizeSuccProbs() {
BranchProbability::normalizeProbabilities(Probs.begin(), Probs.end());
}
/// Validate successors' probabilities and check if the sum of them is
/// approximate one. This only works in DEBUG mode.
void validateSuccProbs() const;
/// Remove successor from the successors list of this MachineBasicBlock. The
/// Predecessors list of Succ is automatically updated.
/// If NormalizeSuccProbs is true, then normalize successors' probabilities
/// after the successor is removed.
void removeSuccessor(MachineBasicBlock *Succ,
bool NormalizeSuccProbs = false);
/// Remove specified successor from the successors list of this
/// MachineBasicBlock. The Predecessors list of Succ is automatically updated.
/// If NormalizeSuccProbs is true, then normalize successors' probabilities
/// after the successor is removed.
/// Return the iterator to the element after the one removed.
succ_iterator removeSuccessor(succ_iterator I,
bool NormalizeSuccProbs = false);
/// Replace successor OLD with NEW and update probability info.
void replaceSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New);
/// Copy a successor (and any probability info) from original block to this
/// block's. Uses an iterator into the original blocks successors.
///
/// This is useful when doing a partial clone of successors. Afterward, the
/// probabilities may need to be normalized.
void copySuccessor(MachineBasicBlock *Orig, succ_iterator I);
/// Split the old successor into old plus new and updates the probability
/// info.
void splitSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New,
bool NormalizeSuccProbs = false);
/// Transfers all the successors from MBB to this machine basic block (i.e.,
/// copies all the successors FromMBB and remove all the successors from
/// FromMBB).
void transferSuccessors(MachineBasicBlock *FromMBB);
/// Transfers all the successors, as in transferSuccessors, and update PHI
/// operands in the successor blocks which refer to FromMBB to refer to this.
void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB);
/// Return true if any of the successors have probabilities attached to them.
bool hasSuccessorProbabilities() const { return !Probs.empty(); }
/// Return true if the specified MBB is a predecessor of this block.
bool isPredecessor(const MachineBasicBlock *MBB) const;
/// Return true if the specified MBB is a successor of this block.
bool isSuccessor(const MachineBasicBlock *MBB) const;
/// Return true if the specified MBB will be emitted immediately after this
/// block, such that if this block exits by falling through, control will
/// transfer to the specified MBB. Note that MBB need not be a successor at
/// all, for example if this block ends with an unconditional branch to some
/// other block.
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const;
/// Return the successor of this block if it has a single successor.
/// Otherwise return a null pointer.
///
const MachineBasicBlock *getSingleSuccessor() const;
MachineBasicBlock *getSingleSuccessor() {
return const_cast<MachineBasicBlock *>(
static_cast<const MachineBasicBlock *>(this)->getSingleSuccessor());
}
/// Return the fallthrough block if the block can implicitly
/// transfer control to the block after it by falling off the end of
/// it. If an explicit branch to the fallthrough block is not allowed,
/// set JumpToFallThrough to be false. Non-null return is a conservative
/// answer.
MachineBasicBlock *getFallThrough(bool JumpToFallThrough = true);
/// Return the fallthrough block if the block can implicitly
/// transfer control to it's successor, whether by a branch or
/// a fallthrough. Non-null return is a conservative answer.
MachineBasicBlock *getLogicalFallThrough() { return getFallThrough(false); }
/// Return true if the block can implicitly transfer control to the
/// block after it by falling off the end of it. This should return
/// false if it can reach the block after it, but it uses an
/// explicit branch to do so (e.g., a table jump). True is a
/// conservative answer.
bool canFallThrough();
/// Returns a pointer to the first instruction in this block that is not a
/// PHINode instruction. When adding instructions to the beginning of the
/// basic block, they should be added before the returned value, not before
/// the first instruction, which might be PHI.
/// Returns end() is there's no non-PHI instruction.
iterator getFirstNonPHI();
const_iterator getFirstNonPHI() const {
return const_cast<MachineBasicBlock *>(this)->getFirstNonPHI();
}
/// Return the first instruction in MBB after I that is not a PHI or a label.
/// This is the correct point to insert lowered copies at the beginning of a
/// basic block that must be before any debugging information.
iterator SkipPHIsAndLabels(iterator I);
/// Return the first instruction in MBB after I that is not a PHI, label or
/// debug. This is the correct point to insert copies at the beginning of a
/// basic block.
iterator SkipPHIsLabelsAndDebug(iterator I, bool SkipPseudoOp = true);
/// Returns an iterator to the first terminator instruction of this basic
/// block. If a terminator does not exist, it returns end().
iterator getFirstTerminator();
const_iterator getFirstTerminator() const {
return const_cast<MachineBasicBlock *>(this)->getFirstTerminator();
}
/// Same getFirstTerminator but it ignores bundles and return an
/// instr_iterator instead.
instr_iterator getFirstInstrTerminator();
/// Finds the first terminator in a block by scanning forward. This can handle
/// cases in GlobalISel where there may be non-terminator instructions between
/// terminators, for which getFirstTerminator() will not work correctly.
iterator getFirstTerminatorForward();
/// Returns an iterator to the first non-debug instruction in the basic block,
/// or end(). Skip any pseudo probe operation if \c SkipPseudoOp is true.
/// Pseudo probes are like debug instructions which do not turn into real
/// machine code. We try to use the function to skip both debug instructions
/// and pseudo probe operations to avoid API proliferation. This should work
/// most of the time when considering optimizing the rest of code in the
/// block, except for certain cases where pseudo probes are designed to block
/// the optimizations. For example, code merge like optimizations are supposed
/// to be blocked by pseudo probes for better AutoFDO profile quality.
/// Therefore, they should be considered as a valid instruction when this
/// function is called in a context of such optimizations. On the other hand,
/// \c SkipPseudoOp should be true when it's used in optimizations that
/// unlikely hurt profile quality, e.g., without block merging. The default
/// value of \c SkipPseudoOp is set to true to maximize code quality in
/// general, with an explict false value passed in in a few places like branch
/// folding and if-conversion to favor profile quality.
iterator getFirstNonDebugInstr(bool SkipPseudoOp = true);
const_iterator getFirstNonDebugInstr(bool SkipPseudoOp = true) const {
return const_cast<MachineBasicBlock *>(this)->getFirstNonDebugInstr(
SkipPseudoOp);
}
/// Returns an iterator to the last non-debug instruction in the basic block,
/// or end(). Skip any pseudo operation if \c SkipPseudoOp is true.
/// Pseudo probes are like debug instructions which do not turn into real
/// machine code. We try to use the function to skip both debug instructions
/// and pseudo probe operations to avoid API proliferation. This should work
/// most of the time when considering optimizing the rest of code in the
/// block, except for certain cases where pseudo probes are designed to block
/// the optimizations. For example, code merge like optimizations are supposed
/// to be blocked by pseudo probes for better AutoFDO profile quality.
/// Therefore, they should be considered as a valid instruction when this
/// function is called in a context of such optimizations. On the other hand,
/// \c SkipPseudoOp should be true when it's used in optimizations that
/// unlikely hurt profile quality, e.g., without block merging. The default
/// value of \c SkipPseudoOp is set to true to maximize code quality in
/// general, with an explict false value passed in in a few places like branch
/// folding and if-conversion to favor profile quality.
iterator getLastNonDebugInstr(bool SkipPseudoOp = true);
const_iterator getLastNonDebugInstr(bool SkipPseudoOp = true) const {
return const_cast<MachineBasicBlock *>(this)->getLastNonDebugInstr(
SkipPseudoOp);
}
/// Convenience function that returns true if the block ends in a return
/// instruction.
bool isReturnBlock() const {
return !empty() && back().isReturn();
}
/// Convenience function that returns true if the bock ends in a EH scope
/// return instruction.
bool isEHScopeReturnBlock() const {
return !empty() && back().isEHScopeReturn();
}
/// Split a basic block into 2 pieces at \p SplitPoint. A new block will be
/// inserted after this block, and all instructions after \p SplitInst moved
/// to it (\p SplitInst will be in the original block). If \p LIS is provided,
/// LiveIntervals will be appropriately updated. \return the newly inserted
/// block.
///
/// If \p UpdateLiveIns is true, this will ensure the live ins list is
/// accurate, including for physreg uses/defs in the original block.
MachineBasicBlock *splitAt(MachineInstr &SplitInst, bool UpdateLiveIns = true,
LiveIntervals *LIS = nullptr);
/// Split the critical edge from this block to the given successor block, and
/// return the newly created block, or null if splitting is not possible.
///
/// This function updates LiveVariables, MachineDominatorTree, and
/// MachineLoopInfo, as applicable.
MachineBasicBlock *
SplitCriticalEdge(MachineBasicBlock *Succ, Pass &P,
std::vector<SparseBitVector<>> *LiveInSets = nullptr);
/// Check if the edge between this block and the given successor \p
/// Succ, can be split. If this returns true a subsequent call to
/// SplitCriticalEdge is guaranteed to return a valid basic block if
/// no changes occurred in the meantime.
bool canSplitCriticalEdge(const MachineBasicBlock *Succ) const;
void pop_front() { Insts.pop_front(); }
void pop_back() { Insts.pop_back(); }
void push_back(MachineInstr *MI) { Insts.push_back(MI); }
/// Insert MI into the instruction list before I, possibly inside a bundle.
///
/// If the insertion point is inside a bundle, MI will be added to the bundle,
/// otherwise MI will not be added to any bundle. That means this function
/// alone can't be used to prepend or append instructions to bundles. See
/// MIBundleBuilder::insert() for a more reliable way of doing that.
instr_iterator insert(instr_iterator I, MachineInstr *M);
/// Insert a range of instructions into the instruction list before I.
template<typename IT>
void insert(iterator I, IT S, IT E) {
assert((I == end() || I->getParent() == this) &&
"iterator points outside of basic block");
Insts.insert(I.getInstrIterator(), S, E);
}
/// Insert MI into the instruction list before I.
iterator insert(iterator I, MachineInstr *MI) {
assert((I == end() || I->getParent() == this) &&
"iterator points outside of basic block");
assert(!MI->isBundledWithPred() && !MI->isBundledWithSucc() &&
"Cannot insert instruction with bundle flags");
return Insts.insert(I.getInstrIterator(), MI);
}
/// Insert MI into the instruction list after I.
iterator insertAfter(iterator I, MachineInstr *MI) {
assert((I == end() || I->getParent() == this) &&
"iterator points outside of basic block");
assert(!MI->isBundledWithPred() && !MI->isBundledWithSucc() &&
"Cannot insert instruction with bundle flags");
return Insts.insertAfter(I.getInstrIterator(), MI);
}
/// If I is bundled then insert MI into the instruction list after the end of
/// the bundle, otherwise insert MI immediately after I.
instr_iterator insertAfterBundle(instr_iterator I, MachineInstr *MI) {
assert((I == instr_end() || I->getParent() == this) &&
"iterator points outside of basic block");
assert(!MI->isBundledWithPred() && !MI->isBundledWithSucc() &&
"Cannot insert instruction with bundle flags");
while (I->isBundledWithSucc())
++I;
return Insts.insertAfter(I, MI);
}
/// Remove an instruction from the instruction list and delete it.
///
/// If the instruction is part of a bundle, the other instructions in the
/// bundle will still be bundled after removing the single instruction.
instr_iterator erase(instr_iterator I);
/// Remove an instruction from the instruction list and delete it.
///
/// If the instruction is part of a bundle, the other instructions in the
/// bundle will still be bundled after removing the single instruction.
instr_iterator erase_instr(MachineInstr *I) {
return erase(instr_iterator(I));
}
/// Remove a range of instructions from the instruction list and delete them.
iterator erase(iterator I, iterator E) {
return Insts.erase(I.getInstrIterator(), E.getInstrIterator());
}
/// Remove an instruction or bundle from the instruction list and delete it.
///
/// If I points to a bundle of instructions, they are all erased.
iterator erase(iterator I) {
return erase(I, std::next(I));
}
/// Remove an instruction from the instruction list and delete it.
///
/// If I is the head of a bundle of instructions, the whole bundle will be
/// erased.
iterator erase(MachineInstr *I) {
return erase(iterator(I));
}
/// Remove the unbundled instruction from the instruction list without
/// deleting it.
///
/// This function can not be used to remove bundled instructions, use
/// remove_instr to remove individual instructions from a bundle.
MachineInstr *remove(MachineInstr *I) {
assert(!I->isBundled() && "Cannot remove bundled instructions");
return Insts.remove(instr_iterator(I));
}
/// Remove the possibly bundled instruction from the instruction list
/// without deleting it.
///
/// If the instruction is part of a bundle, the other instructions in the
/// bundle will still be bundled after removing the single instruction.
MachineInstr *remove_instr(MachineInstr *I);
void clear() {
Insts.clear();
}
/// Take an instruction from MBB 'Other' at the position From, and insert it
/// into this MBB right before 'Where'.
///
/// If From points to a bundle of instructions, the whole bundle is moved.
void splice(iterator Where, MachineBasicBlock *Other, iterator From) {
// The range splice() doesn't allow noop moves, but this one does.
if (Where != From)
splice(Where, Other, From, std::next(From));
}
/// Take a block of instructions from MBB 'Other' in the range [From, To),
/// and insert them into this MBB right before 'Where'.
///
/// The instruction at 'Where' must not be included in the range of
/// instructions to move.
void splice(iterator Where, MachineBasicBlock *Other,
iterator From, iterator To) {
Insts.splice(Where.getInstrIterator(), Other->Insts,
From.getInstrIterator(), To.getInstrIterator());
}
/// This method unlinks 'this' from the containing function, and returns it,
/// but does not delete it.
MachineBasicBlock *removeFromParent();
/// This method unlinks 'this' from the containing function and deletes it.
void eraseFromParent();
/// Given a machine basic block that branched to 'Old', change the code and
/// CFG so that it branches to 'New' instead.
void ReplaceUsesOfBlockWith(MachineBasicBlock *Old, MachineBasicBlock *New);
/// Update all phi nodes in this basic block to refer to basic block \p New
/// instead of basic block \p Old.
void replacePhiUsesWith(MachineBasicBlock *Old, MachineBasicBlock *New);
/// Find the next valid DebugLoc starting at MBBI, skipping any debug
/// instructions. Return UnknownLoc if there is none.
DebugLoc findDebugLoc(instr_iterator MBBI);
DebugLoc findDebugLoc(iterator MBBI) {
return findDebugLoc(MBBI.getInstrIterator());
}
/// Has exact same behavior as @ref findDebugLoc (it also searches towards the
/// end of this MBB) except that this function takes a reverse iterator to
/// identify the starting MI.
DebugLoc rfindDebugLoc(reverse_instr_iterator MBBI);
DebugLoc rfindDebugLoc(reverse_iterator MBBI) {
return rfindDebugLoc(MBBI.getInstrIterator());
}
/// Find the previous valid DebugLoc preceding MBBI, skipping any debug
/// instructions. It is possible to find the last DebugLoc in the MBB using
/// findPrevDebugLoc(instr_end()). Return UnknownLoc if there is none.
DebugLoc findPrevDebugLoc(instr_iterator MBBI);
DebugLoc findPrevDebugLoc(iterator MBBI) {
return findPrevDebugLoc(MBBI.getInstrIterator());
}
/// Has exact same behavior as @ref findPrevDebugLoc (it also searches towards
/// the beginning of this MBB) except that this function takes reverse
/// iterator to identify the starting MI. A minor difference compared to
/// findPrevDebugLoc is that we can't start scanning at "instr_end".
DebugLoc rfindPrevDebugLoc(reverse_instr_iterator MBBI);
DebugLoc rfindPrevDebugLoc(reverse_iterator MBBI) {
return rfindPrevDebugLoc(MBBI.getInstrIterator());
}
/// Find and return the merged DebugLoc of the branch instructions of the
/// block. Return UnknownLoc if there is none.
DebugLoc findBranchDebugLoc();
/// Possible outcome of a register liveness query to computeRegisterLiveness()
enum LivenessQueryResult {
LQR_Live, ///< Register is known to be (at least partially) live.
LQR_Dead, ///< Register is known to be fully dead.
LQR_Unknown ///< Register liveness not decidable from local neighborhood.
};
/// Return whether (physical) register \p Reg has been defined and not
/// killed as of just before \p Before.
///
/// Search is localised to a neighborhood of \p Neighborhood instructions
/// before (searching for defs or kills) and \p Neighborhood instructions
/// after (searching just for defs) \p Before.
///
/// \p Reg must be a physical register.
LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI,
MCRegister Reg,
const_iterator Before,
unsigned Neighborhood = 10) const;
// Debugging methods.
void dump() const;
void print(raw_ostream &OS, const SlotIndexes * = nullptr,
bool IsStandalone = true) const;
void print(raw_ostream &OS, ModuleSlotTracker &MST,
const SlotIndexes * = nullptr, bool IsStandalone = true) const;
enum PrintNameFlag {
PrintNameIr = (1 << 0), ///< Add IR name where available
PrintNameAttributes = (1 << 1), ///< Print attributes
};
void printName(raw_ostream &os, unsigned printNameFlags = PrintNameIr,
ModuleSlotTracker *moduleSlotTracker = nullptr) const;
// Printing method used by LoopInfo.
void printAsOperand(raw_ostream &OS, bool PrintType = true) const;
/// MachineBasicBlocks are uniquely numbered at the function level, unless
/// they're not in a MachineFunction yet, in which case this will return -1.
int getNumber() const { return Number; }
void setNumber(int N) { Number = N; }
/// Return the MCSymbol for this basic block.
MCSymbol *getSymbol() const;
/// Return the EHCatchret Symbol for this basic block.
MCSymbol *getEHCatchretSymbol() const;
std::optional<uint64_t> getIrrLoopHeaderWeight() const {
return IrrLoopHeaderWeight;
}
void setIrrLoopHeaderWeight(uint64_t Weight) {
IrrLoopHeaderWeight = Weight;
}
/// Return probability of the edge from this block to MBB. This method should
/// NOT be called directly, but by using getEdgeProbability method from
/// MachineBranchProbabilityInfo class.
BranchProbability getSuccProbability(const_succ_iterator Succ) const;
private:
/// Return probability iterator corresponding to the I successor iterator.
probability_iterator getProbabilityIterator(succ_iterator I);
const_probability_iterator
getProbabilityIterator(const_succ_iterator I) const;
friend class MachineBranchProbabilityInfo;
friend class MIPrinter;
// Methods used to maintain doubly linked list of blocks...
friend struct ilist_callback_traits<MachineBasicBlock>;
// Machine-CFG mutators
/// Add Pred as a predecessor of this MachineBasicBlock. Don't do this
/// unless you know what you're doing, because it doesn't update Pred's
/// successors list. Use Pred->addSuccessor instead.
void addPredecessor(MachineBasicBlock *Pred);
/// Remove Pred as a predecessor of this MachineBasicBlock. Don't do this
/// unless you know what you're doing, because it doesn't update Pred's
/// successors list. Use Pred->removeSuccessor instead.
void removePredecessor(MachineBasicBlock *Pred);
};
raw_ostream& operator<<(raw_ostream &OS, const MachineBasicBlock &MBB);
/// Prints a machine basic block reference.
///
/// The format is:
/// %bb.5 - a machine basic block with MBB.getNumber() == 5.
///
/// Usage: OS << printMBBReference(MBB) << '\n';
Printable printMBBReference(const MachineBasicBlock &MBB);
// This is useful when building IndexedMaps keyed on basic block pointers.
struct MBB2NumberFunctor {
using argument_type = const MachineBasicBlock *;
unsigned operator()(const MachineBasicBlock *MBB) const {
return MBB->getNumber();
}
};
//===--------------------------------------------------------------------===//
// GraphTraits specializations for machine basic block graphs (machine-CFGs)
//===--------------------------------------------------------------------===//
// Provide specializations of GraphTraits to be able to treat a
// MachineFunction as a graph of MachineBasicBlocks.
//
template <> struct GraphTraits<MachineBasicBlock *> {
using NodeRef = MachineBasicBlock *;
using ChildIteratorType = MachineBasicBlock::succ_iterator;
static NodeRef getEntryNode(MachineBasicBlock *BB) { return BB; }
static ChildIteratorType child_begin(NodeRef N) { return N->succ_begin(); }
static ChildIteratorType child_end(NodeRef N) { return N->succ_end(); }
};
template <> struct GraphTraits<const MachineBasicBlock *> {
using NodeRef = const MachineBasicBlock *;
using ChildIteratorType = MachineBasicBlock::const_succ_iterator;
static NodeRef getEntryNode(const MachineBasicBlock *BB) { return BB; }
static ChildIteratorType child_begin(NodeRef N) { return N->succ_begin(); }
static ChildIteratorType child_end(NodeRef N) { return N->succ_end(); }
};
// Provide specializations of GraphTraits to be able to treat a
// MachineFunction as a graph of MachineBasicBlocks and to walk it
// in inverse order. Inverse order for a function is considered
// to be when traversing the predecessor edges of a MBB
// instead of the successor edges.
//
template <> struct GraphTraits<Inverse<MachineBasicBlock*>> {
using NodeRef = MachineBasicBlock *;
using ChildIteratorType = MachineBasicBlock::pred_iterator;
static NodeRef getEntryNode(Inverse<MachineBasicBlock *> G) {
return G.Graph;
}
static ChildIteratorType child_begin(NodeRef N) { return N->pred_begin(); }
static ChildIteratorType child_end(NodeRef N) { return N->pred_end(); }
};
template <> struct GraphTraits<Inverse<const MachineBasicBlock*>> {
using NodeRef = const MachineBasicBlock *;
using ChildIteratorType = MachineBasicBlock::const_pred_iterator;
static NodeRef getEntryNode(Inverse<const MachineBasicBlock *> G) {
return G.Graph;
}
static ChildIteratorType child_begin(NodeRef N) { return N->pred_begin(); }
static ChildIteratorType child_end(NodeRef N) { return N->pred_end(); }
};
// These accessors are handy for sharing templated code between IR and MIR.
inline auto successors(const MachineBasicBlock *BB) { return BB->successors(); }
inline auto predecessors(const MachineBasicBlock *BB) {
return BB->predecessors();
}
/// MachineInstrSpan provides an interface to get an iteration range
/// containing the instruction it was initialized with, along with all
/// those instructions inserted prior to or following that instruction
/// at some point after the MachineInstrSpan is constructed.
class MachineInstrSpan {
MachineBasicBlock &MBB;
MachineBasicBlock::iterator I, B, E;
public:
MachineInstrSpan(MachineBasicBlock::iterator I, MachineBasicBlock *BB)
: MBB(*BB), I(I), B(I == MBB.begin() ? MBB.end() : std::prev(I)),
E(std::next(I)) {
assert(I == BB->end() || I->getParent() == BB);
}
MachineBasicBlock::iterator begin() {
return B == MBB.end() ? MBB.begin() : std::next(B);
}
MachineBasicBlock::iterator end() { return E; }
bool empty() { return begin() == end(); }
MachineBasicBlock::iterator getInitial() { return I; }
};
/// Increment \p It until it points to a non-debug instruction or to \p End
/// and return the resulting iterator. This function should only be used
/// MachineBasicBlock::{iterator, const_iterator, instr_iterator,
/// const_instr_iterator} and the respective reverse iterators.
template <typename IterT>
inline IterT skipDebugInstructionsForward(IterT It, IterT End,
bool SkipPseudoOp = true) {
while (It != End &&
(It->isDebugInstr() || (SkipPseudoOp && It->isPseudoProbe())))
++It;
return It;
}
/// Decrement \p It until it points to a non-debug instruction or to \p Begin
/// and return the resulting iterator. This function should only be used
/// MachineBasicBlock::{iterator, const_iterator, instr_iterator,
/// const_instr_iterator} and the respective reverse iterators.
template <class IterT>
inline IterT skipDebugInstructionsBackward(IterT It, IterT Begin,
bool SkipPseudoOp = true) {
while (It != Begin &&
(It->isDebugInstr() || (SkipPseudoOp && It->isPseudoProbe())))
--It;
return It;
}
/// Increment \p It, then continue incrementing it while it points to a debug
/// instruction. A replacement for std::next.
template <typename IterT>
inline IterT next_nodbg(IterT It, IterT End, bool SkipPseudoOp = true) {
return skipDebugInstructionsForward(std::next(It), End, SkipPseudoOp);
}
/// Decrement \p It, then continue decrementing it while it points to a debug
/// instruction. A replacement for std::prev.
template <typename IterT>
inline IterT prev_nodbg(IterT It, IterT Begin, bool SkipPseudoOp = true) {
return skipDebugInstructionsBackward(std::prev(It), Begin, SkipPseudoOp);
}
/// Construct a range iterator which begins at \p It and moves forwards until
/// \p End is reached, skipping any debug instructions.
template <typename IterT>
inline auto instructionsWithoutDebug(IterT It, IterT End,
bool SkipPseudoOp = true) {
return make_filter_range(make_range(It, End), [=](const MachineInstr &MI) {
return !MI.isDebugInstr() && !(SkipPseudoOp && MI.isPseudoProbe());
});
}
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINEBASICBLOCK_H
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//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Address Spaces for WebAssembly Type Handling
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_WASM_ADDRESS_SPACES_H
#define LLVM_CODEGEN_WASM_ADDRESS_SPACES_H
namespace llvm {
namespace WebAssembly {
enum WasmAddressSpace : unsigned {
// Default address space, for pointers to linear memory (stack, heap, data).
WASM_ADDRESS_SPACE_DEFAULT = 0,
// A non-integral address space for pointers to named objects outside of
// linear memory: WebAssembly globals or WebAssembly locals. Loads and stores
// to these pointers are lowered to global.get / global.set or local.get /
// local.set, as appropriate.
WASM_ADDRESS_SPACE_VAR = 1,
// A non-integral address space for externref values
WASM_ADDRESS_SPACE_EXTERNREF = 10,
// A non-integral address space for funcref values
WASM_ADDRESS_SPACE_FUNCREF = 20,
};
inline bool isDefaultAddressSpace(unsigned AS) {
return AS == WASM_ADDRESS_SPACE_DEFAULT;
}
inline bool isWasmVarAddressSpace(unsigned AS) {
return AS == WASM_ADDRESS_SPACE_VAR;
}
inline bool isValidAddressSpace(unsigned AS) {
return isDefaultAddressSpace(AS) || isWasmVarAddressSpace(AS);
}
} // namespace WebAssembly
} // namespace llvm
#endif // LLVM_CODEGEN_WASM_ADDRESS_SPACES_H
PK iwFZ��.^ ^ CodeGen/DAGCombine.hnu �[��� //===-- llvm/CodeGen/DAGCombine.h ------- SelectionDAG Nodes ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
#ifndef LLVM_CODEGEN_DAGCOMBINE_H
#define LLVM_CODEGEN_DAGCOMBINE_H
namespace llvm {
enum CombineLevel {
BeforeLegalizeTypes,
AfterLegalizeTypes,
AfterLegalizeVectorOps,
AfterLegalizeDAG
};
} // end llvm namespace
#endif
PK iwFZ���Ņ Ņ CodeGen/TargetInstrInfo.hnu �[��� //===- llvm/CodeGen/TargetInstrInfo.h - Instruction Info --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file describes the target machine instruction set to the code generator.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_TARGETINSTRINFO_H
#define LLVM_CODEGEN_TARGETINSTRINFO_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/ADT/Uniformity.h"
#include "llvm/CodeGen/MIRFormatter.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineOutliner.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
#include "llvm/CodeGen/VirtRegMap.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/Support/BranchProbability.h"
#include "llvm/Support/ErrorHandling.h"
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <utility>
#include <vector>
namespace llvm {
class DFAPacketizer;
class InstrItineraryData;
class LiveIntervals;
class LiveVariables;
class MachineLoop;
class MachineMemOperand;
class MachineRegisterInfo;
class MCAsmInfo;
class MCInst;
struct MCSchedModel;
class Module;
class ScheduleDAG;
class ScheduleDAGMI;
class ScheduleHazardRecognizer;
class SDNode;
class SelectionDAG;
class SMSchedule;
class SwingSchedulerDAG;
class RegScavenger;
class TargetRegisterClass;
class TargetRegisterInfo;
class TargetSchedModel;
class TargetSubtargetInfo;
enum class MachineCombinerPattern;
enum class MachineTraceStrategy;
template <class T> class SmallVectorImpl;
using ParamLoadedValue = std::pair<MachineOperand, DIExpression*>;
struct DestSourcePair {
const MachineOperand *Destination;
const MachineOperand *Source;
DestSourcePair(const MachineOperand &Dest, const MachineOperand &Src)
: Destination(&Dest), Source(&Src) {}
};
/// Used to describe a register and immediate addition.
struct RegImmPair {
Register Reg;
int64_t Imm;
RegImmPair(Register Reg, int64_t Imm) : Reg(Reg), Imm(Imm) {}
};
/// Used to describe addressing mode similar to ExtAddrMode in CodeGenPrepare.
/// It holds the register values, the scale value and the displacement.
struct ExtAddrMode {
Register BaseReg;
Register ScaledReg;
int64_t Scale;
int64_t Displacement;
};
//---------------------------------------------------------------------------
///
/// TargetInstrInfo - Interface to description of machine instruction set
///
class TargetInstrInfo : public MCInstrInfo {
public:
TargetInstrInfo(unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u,
unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u)
: CallFrameSetupOpcode(CFSetupOpcode),
CallFrameDestroyOpcode(CFDestroyOpcode), CatchRetOpcode(CatchRetOpcode),
ReturnOpcode(ReturnOpcode) {}
TargetInstrInfo(const TargetInstrInfo &) = delete;
TargetInstrInfo &operator=(const TargetInstrInfo &) = delete;
virtual ~TargetInstrInfo();
static bool isGenericOpcode(unsigned Opc) {
return Opc <= TargetOpcode::GENERIC_OP_END;
}
static bool isGenericAtomicRMWOpcode(unsigned Opc) {
return Opc >= TargetOpcode::GENERIC_ATOMICRMW_OP_START &&
Opc <= TargetOpcode::GENERIC_ATOMICRMW_OP_END;
}
/// Given a machine instruction descriptor, returns the register
/// class constraint for OpNum, or NULL.
virtual
const TargetRegisterClass *getRegClass(const MCInstrDesc &MCID, unsigned OpNum,
const TargetRegisterInfo *TRI,
const MachineFunction &MF) const;
/// Return true if the instruction is trivially rematerializable, meaning it
/// has no side effects and requires no operands that aren't always available.
/// This means the only allowed uses are constants and unallocatable physical
/// registers so that the instructions result is independent of the place
/// in the function.
bool isTriviallyReMaterializable(const MachineInstr &MI) const {
return MI.getOpcode() == TargetOpcode::IMPLICIT_DEF ||
(MI.getDesc().isRematerializable() &&
(isReallyTriviallyReMaterializable(MI) ||
isReallyTriviallyReMaterializableGeneric(MI)));
}
/// Given \p MO is a PhysReg use return if it can be ignored for the purpose
/// of instruction rematerialization or sinking.
virtual bool isIgnorableUse(const MachineOperand &MO) const {
return false;
}
protected:
/// For instructions with opcodes for which the M_REMATERIALIZABLE flag is
/// set, this hook lets the target specify whether the instruction is actually
/// trivially rematerializable, taking into consideration its operands. This
/// predicate must return false if the instruction has any side effects other
/// than producing a value, or if it requres any address registers that are
/// not always available.
/// Requirements must be check as stated in isTriviallyReMaterializable() .
virtual bool isReallyTriviallyReMaterializable(const MachineInstr &MI) const {
return false;
}
/// This method commutes the operands of the given machine instruction MI.
/// The operands to be commuted are specified by their indices OpIdx1 and
/// OpIdx2.
///
/// If a target has any instructions that are commutable but require
/// converting to different instructions or making non-trivial changes
/// to commute them, this method can be overloaded to do that.
/// The default implementation simply swaps the commutable operands.
///
/// If NewMI is false, MI is modified in place and returned; otherwise, a
/// new machine instruction is created and returned.
///
/// Do not call this method for a non-commutable instruction.
/// Even though the instruction is commutable, the method may still
/// fail to commute the operands, null pointer is returned in such cases.
virtual MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
unsigned OpIdx1,
unsigned OpIdx2) const;
/// Assigns the (CommutableOpIdx1, CommutableOpIdx2) pair of commutable
/// operand indices to (ResultIdx1, ResultIdx2).
/// One or both input values of the pair: (ResultIdx1, ResultIdx2) may be
/// predefined to some indices or be undefined (designated by the special
/// value 'CommuteAnyOperandIndex').
/// The predefined result indices cannot be re-defined.
/// The function returns true iff after the result pair redefinition
/// the fixed result pair is equal to or equivalent to the source pair of
/// indices: (CommutableOpIdx1, CommutableOpIdx2). It is assumed here that
/// the pairs (x,y) and (y,x) are equivalent.
static bool fixCommutedOpIndices(unsigned &ResultIdx1, unsigned &ResultIdx2,
unsigned CommutableOpIdx1,
unsigned CommutableOpIdx2);
private:
/// For instructions with opcodes for which the M_REMATERIALIZABLE flag is
/// set and the target hook isReallyTriviallyReMaterializable returns false,
/// this function does target-independent tests to determine if the
/// instruction is really trivially rematerializable.
bool isReallyTriviallyReMaterializableGeneric(const MachineInstr &MI) const;
public:
/// These methods return the opcode of the frame setup/destroy instructions
/// if they exist (-1 otherwise). Some targets use pseudo instructions in
/// order to abstract away the difference between operating with a frame
/// pointer and operating without, through the use of these two instructions.
///
unsigned getCallFrameSetupOpcode() const { return CallFrameSetupOpcode; }
unsigned getCallFrameDestroyOpcode() const { return CallFrameDestroyOpcode; }
/// Returns true if the argument is a frame pseudo instruction.
bool isFrameInstr(const MachineInstr &I) const {
return I.getOpcode() == getCallFrameSetupOpcode() ||
I.getOpcode() == getCallFrameDestroyOpcode();
}
/// Returns true if the argument is a frame setup pseudo instruction.
bool isFrameSetup(const MachineInstr &I) const {
return I.getOpcode() == getCallFrameSetupOpcode();
}
/// Returns size of the frame associated with the given frame instruction.
/// For frame setup instruction this is frame that is set up space set up
/// after the instruction. For frame destroy instruction this is the frame
/// freed by the caller.
/// Note, in some cases a call frame (or a part of it) may be prepared prior
/// to the frame setup instruction. It occurs in the calls that involve
/// inalloca arguments. This function reports only the size of the frame part
/// that is set up between the frame setup and destroy pseudo instructions.
int64_t getFrameSize(const MachineInstr &I) const {
assert(isFrameInstr(I) && "Not a frame instruction");
assert(I.getOperand(0).getImm() >= 0);
return I.getOperand(0).getImm();
}
/// Returns the total frame size, which is made up of the space set up inside
/// the pair of frame start-stop instructions and the space that is set up
/// prior to the pair.
int64_t getFrameTotalSize(const MachineInstr &I) const {
if (isFrameSetup(I)) {
assert(I.getOperand(1).getImm() >= 0 &&
"Frame size must not be negative");
return getFrameSize(I) + I.getOperand(1).getImm();
}
return getFrameSize(I);
}
unsigned getCatchReturnOpcode() const { return CatchRetOpcode; }
unsigned getReturnOpcode() const { return ReturnOpcode; }
/// Returns the actual stack pointer adjustment made by an instruction
/// as part of a call sequence. By default, only call frame setup/destroy
/// instructions adjust the stack, but targets may want to override this
/// to enable more fine-grained adjustment, or adjust by a different value.
virtual int getSPAdjust(const MachineInstr &MI) const;
/// Return true if the instruction is a "coalescable" extension instruction.
/// That is, it's like a copy where it's legal for the source to overlap the
/// destination. e.g. X86::MOVSX64rr32. If this returns true, then it's
/// expected the pre-extension value is available as a subreg of the result
/// register. This also returns the sub-register index in SubIdx.
virtual bool isCoalescableExtInstr(const MachineInstr &MI, Register &SrcReg,
Register &DstReg, unsigned &SubIdx) const {
return false;
}
/// If the specified machine instruction is a direct
/// load from a stack slot, return the virtual or physical register number of
/// the destination along with the FrameIndex of the loaded stack slot. If
/// not, return 0. This predicate must return 0 if the instruction has
/// any side effects other than loading from the stack slot.
virtual unsigned isLoadFromStackSlot(const MachineInstr &MI,
int &FrameIndex) const {
return 0;
}
/// Optional extension of isLoadFromStackSlot that returns the number of
/// bytes loaded from the stack. This must be implemented if a backend
/// supports partial stack slot spills/loads to further disambiguate
/// what the load does.
virtual unsigned isLoadFromStackSlot(const MachineInstr &MI,
int &FrameIndex,
unsigned &MemBytes) const {
MemBytes = 0;
return isLoadFromStackSlot(MI, FrameIndex);
}
/// Check for post-frame ptr elimination stack locations as well.
/// This uses a heuristic so it isn't reliable for correctness.
virtual unsigned isLoadFromStackSlotPostFE(const MachineInstr &MI,
int &FrameIndex) const {
return 0;
}
/// If the specified machine instruction has a load from a stack slot,
/// return true along with the FrameIndices of the loaded stack slot and the
/// machine mem operands containing the reference.
/// If not, return false. Unlike isLoadFromStackSlot, this returns true for
/// any instructions that loads from the stack. This is just a hint, as some
/// cases may be missed.
virtual bool hasLoadFromStackSlot(
const MachineInstr &MI,
SmallVectorImpl<const MachineMemOperand *> &Accesses) const;
/// If the specified machine instruction is a direct
/// store to a stack slot, return the virtual or physical register number of
/// the source reg along with the FrameIndex of the loaded stack slot. If
/// not, return 0. This predicate must return 0 if the instruction has
/// any side effects other than storing to the stack slot.
virtual unsigned isStoreToStackSlot(const MachineInstr &MI,
int &FrameIndex) const {
return 0;
}
/// Optional extension of isStoreToStackSlot that returns the number of
/// bytes stored to the stack. This must be implemented if a backend
/// supports partial stack slot spills/loads to further disambiguate
/// what the store does.
virtual unsigned isStoreToStackSlot(const MachineInstr &MI,
int &FrameIndex,
unsigned &MemBytes) const {
MemBytes = 0;
return isStoreToStackSlot(MI, FrameIndex);
}
/// Check for post-frame ptr elimination stack locations as well.
/// This uses a heuristic, so it isn't reliable for correctness.
virtual unsigned isStoreToStackSlotPostFE(const MachineInstr &MI,
int &FrameIndex) const {
return 0;
}
/// If the specified machine instruction has a store to a stack slot,
/// return true along with the FrameIndices of the loaded stack slot and the
/// machine mem operands containing the reference.
/// If not, return false. Unlike isStoreToStackSlot,
/// this returns true for any instructions that stores to the
/// stack. This is just a hint, as some cases may be missed.
virtual bool hasStoreToStackSlot(
const MachineInstr &MI,
SmallVectorImpl<const MachineMemOperand *> &Accesses) const;
/// Return true if the specified machine instruction
/// is a copy of one stack slot to another and has no other effect.
/// Provide the identity of the two frame indices.
virtual bool isStackSlotCopy(const MachineInstr &MI, int &DestFrameIndex,
int &SrcFrameIndex) const {
return false;
}
/// Compute the size in bytes and offset within a stack slot of a spilled
/// register or subregister.
///
/// \param [out] Size in bytes of the spilled value.
/// \param [out] Offset in bytes within the stack slot.
/// \returns true if both Size and Offset are successfully computed.
///
/// Not all subregisters have computable spill slots. For example,
/// subregisters registers may not be byte-sized, and a pair of discontiguous
/// subregisters has no single offset.
///
/// Targets with nontrivial bigendian implementations may need to override
/// this, particularly to support spilled vector registers.
virtual bool getStackSlotRange(const TargetRegisterClass *RC, unsigned SubIdx,
unsigned &Size, unsigned &Offset,
const MachineFunction &MF) const;
/// Return true if the given instruction is terminator that is unspillable,
/// according to isUnspillableTerminatorImpl.
bool isUnspillableTerminator(const MachineInstr *MI) const {
return MI->isTerminator() && isUnspillableTerminatorImpl(MI);
}
/// Returns the size in bytes of the specified MachineInstr, or ~0U
/// when this function is not implemented by a target.
virtual unsigned getInstSizeInBytes(const MachineInstr &MI) const {
return ~0U;
}
/// Return true if the instruction is as cheap as a move instruction.
///
/// Targets for different archs need to override this, and different
/// micro-architectures can also be finely tuned inside.
virtual bool isAsCheapAsAMove(const MachineInstr &MI) const {
return MI.isAsCheapAsAMove();
}
/// Return true if the instruction should be sunk by MachineSink.
///
/// MachineSink determines on its own whether the instruction is safe to sink;
/// this gives the target a hook to override the default behavior with regards
/// to which instructions should be sunk.
virtual bool shouldSink(const MachineInstr &MI) const { return true; }
/// Return false if the instruction should not be hoisted by MachineLICM.
///
/// MachineLICM determines on its own whether the instruction is safe to
/// hoist; this gives the target a hook to extend this assessment and prevent
/// an instruction being hoisted from a given loop for target specific
/// reasons.
virtual bool shouldHoist(const MachineInstr &MI,
const MachineLoop *FromLoop) const {
return true;
}
/// Re-issue the specified 'original' instruction at the
/// specific location targeting a new destination register.
/// The register in Orig->getOperand(0).getReg() will be substituted by
/// DestReg:SubIdx. Any existing subreg index is preserved or composed with
/// SubIdx.
virtual void reMaterialize(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, Register DestReg,
unsigned SubIdx, const MachineInstr &Orig,
const TargetRegisterInfo &TRI) const;
/// Clones instruction or the whole instruction bundle \p Orig and
/// insert into \p MBB before \p InsertBefore. The target may update operands
/// that are required to be unique.
///
/// \p Orig must not return true for MachineInstr::isNotDuplicable().
virtual MachineInstr &duplicate(MachineBasicBlock &MBB,
MachineBasicBlock::iterator InsertBefore,
const MachineInstr &Orig) const;
/// This method must be implemented by targets that
/// set the M_CONVERTIBLE_TO_3_ADDR flag. When this flag is set, the target
/// may be able to convert a two-address instruction into one or more true
/// three-address instructions on demand. This allows the X86 target (for
/// example) to convert ADD and SHL instructions into LEA instructions if they
/// would require register copies due to two-addressness.
///
/// This method returns a null pointer if the transformation cannot be
/// performed, otherwise it returns the last new instruction.
///
/// If \p LIS is not nullptr, the LiveIntervals info should be updated for
/// replacing \p MI with new instructions, even though this function does not
/// remove MI.
virtual MachineInstr *convertToThreeAddress(MachineInstr &MI,
LiveVariables *LV,
LiveIntervals *LIS) const {
return nullptr;
}
// This constant can be used as an input value of operand index passed to
// the method findCommutedOpIndices() to tell the method that the
// corresponding operand index is not pre-defined and that the method
// can pick any commutable operand.
static const unsigned CommuteAnyOperandIndex = ~0U;
/// This method commutes the operands of the given machine instruction MI.
///
/// The operands to be commuted are specified by their indices OpIdx1 and
/// OpIdx2. OpIdx1 and OpIdx2 arguments may be set to a special value
/// 'CommuteAnyOperandIndex', which means that the method is free to choose
/// any arbitrarily chosen commutable operand. If both arguments are set to
/// 'CommuteAnyOperandIndex' then the method looks for 2 different commutable
/// operands; then commutes them if such operands could be found.
///
/// If NewMI is false, MI is modified in place and returned; otherwise, a
/// new machine instruction is created and returned.
///
/// Do not call this method for a non-commutable instruction or
/// for non-commuable operands.
/// Even though the instruction is commutable, the method may still
/// fail to commute the operands, null pointer is returned in such cases.
MachineInstr *
commuteInstruction(MachineInstr &MI, bool NewMI = false,
unsigned OpIdx1 = CommuteAnyOperandIndex,
unsigned OpIdx2 = CommuteAnyOperandIndex) const;
/// Returns true iff the routine could find two commutable operands in the
/// given machine instruction.
/// The 'SrcOpIdx1' and 'SrcOpIdx2' are INPUT and OUTPUT arguments.
/// If any of the INPUT values is set to the special value
/// 'CommuteAnyOperandIndex' then the method arbitrarily picks a commutable
/// operand, then returns its index in the corresponding argument.
/// If both of INPUT values are set to 'CommuteAnyOperandIndex' then method
/// looks for 2 commutable operands.
/// If INPUT values refer to some operands of MI, then the method simply
/// returns true if the corresponding operands are commutable and returns
/// false otherwise.
///
/// For example, calling this method this way:
/// unsigned Op1 = 1, Op2 = CommuteAnyOperandIndex;
/// findCommutedOpIndices(MI, Op1, Op2);
/// can be interpreted as a query asking to find an operand that would be
/// commutable with the operand#1.
virtual bool findCommutedOpIndices(const MachineInstr &MI,
unsigned &SrcOpIdx1,
unsigned &SrcOpIdx2) const;
/// Returns true if the target has a preference on the operands order of
/// the given machine instruction. And specify if \p Commute is required to
/// get the desired operands order.
virtual bool hasCommutePreference(MachineInstr &MI, bool &Commute) const {
return false;
}
/// A pair composed of a register and a sub-register index.
/// Used to give some type checking when modeling Reg:SubReg.
struct RegSubRegPair {
Register Reg;
unsigned SubReg;
RegSubRegPair(Register Reg = Register(), unsigned SubReg = 0)
: Reg(Reg), SubReg(SubReg) {}
bool operator==(const RegSubRegPair& P) const {
return Reg == P.Reg && SubReg == P.SubReg;
}
bool operator!=(const RegSubRegPair& P) const {
return !(*this == P);
}
};
/// A pair composed of a pair of a register and a sub-register index,
/// and another sub-register index.
/// Used to give some type checking when modeling Reg:SubReg1, SubReg2.
struct RegSubRegPairAndIdx : RegSubRegPair {
unsigned SubIdx;
RegSubRegPairAndIdx(Register Reg = Register(), unsigned SubReg = 0,
unsigned SubIdx = 0)
: RegSubRegPair(Reg, SubReg), SubIdx(SubIdx) {}
};
/// Build the equivalent inputs of a REG_SEQUENCE for the given \p MI
/// and \p DefIdx.
/// \p [out] InputRegs of the equivalent REG_SEQUENCE. Each element of
/// the list is modeled as <Reg:SubReg, SubIdx>. Operands with the undef
/// flag are not added to this list.
/// E.g., REG_SEQUENCE %1:sub1, sub0, %2, sub1 would produce
/// two elements:
/// - %1:sub1, sub0
/// - %2<:0>, sub1
///
/// \returns true if it is possible to build such an input sequence
/// with the pair \p MI, \p DefIdx. False otherwise.
///
/// \pre MI.isRegSequence() or MI.isRegSequenceLike().
///
/// \note The generic implementation does not provide any support for
/// MI.isRegSequenceLike(). In other words, one has to override
/// getRegSequenceLikeInputs for target specific instructions.
bool
getRegSequenceInputs(const MachineInstr &MI, unsigned DefIdx,
SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const;
/// Build the equivalent inputs of a EXTRACT_SUBREG for the given \p MI
/// and \p DefIdx.
/// \p [out] InputReg of the equivalent EXTRACT_SUBREG.
/// E.g., EXTRACT_SUBREG %1:sub1, sub0, sub1 would produce:
/// - %1:sub1, sub0
///
/// \returns true if it is possible to build such an input sequence
/// with the pair \p MI, \p DefIdx and the operand has no undef flag set.
/// False otherwise.
///
/// \pre MI.isExtractSubreg() or MI.isExtractSubregLike().
///
/// \note The generic implementation does not provide any support for
/// MI.isExtractSubregLike(). In other words, one has to override
/// getExtractSubregLikeInputs for target specific instructions.
bool getExtractSubregInputs(const MachineInstr &MI, unsigned DefIdx,
RegSubRegPairAndIdx &InputReg) const;
/// Build the equivalent inputs of a INSERT_SUBREG for the given \p MI
/// and \p DefIdx.
/// \p [out] BaseReg and \p [out] InsertedReg contain
/// the equivalent inputs of INSERT_SUBREG.
/// E.g., INSERT_SUBREG %0:sub0, %1:sub1, sub3 would produce:
/// - BaseReg: %0:sub0
/// - InsertedReg: %1:sub1, sub3
///
/// \returns true if it is possible to build such an input sequence
/// with the pair \p MI, \p DefIdx and the operand has no undef flag set.
/// False otherwise.
///
/// \pre MI.isInsertSubreg() or MI.isInsertSubregLike().
///
/// \note The generic implementation does not provide any support for
/// MI.isInsertSubregLike(). In other words, one has to override
/// getInsertSubregLikeInputs for target specific instructions.
bool getInsertSubregInputs(const MachineInstr &MI, unsigned DefIdx,
RegSubRegPair &BaseReg,
RegSubRegPairAndIdx &InsertedReg) const;
/// Return true if two machine instructions would produce identical values.
/// By default, this is only true when the two instructions
/// are deemed identical except for defs. If this function is called when the
/// IR is still in SSA form, the caller can pass the MachineRegisterInfo for
/// aggressive checks.
virtual bool produceSameValue(const MachineInstr &MI0,
const MachineInstr &MI1,
const MachineRegisterInfo *MRI = nullptr) const;
/// \returns true if a branch from an instruction with opcode \p BranchOpc
/// bytes is capable of jumping to a position \p BrOffset bytes away.
virtual bool isBranchOffsetInRange(unsigned BranchOpc,
int64_t BrOffset) const {
llvm_unreachable("target did not implement");
}
/// \returns The block that branch instruction \p MI jumps to.
virtual MachineBasicBlock *getBranchDestBlock(const MachineInstr &MI) const {
llvm_unreachable("target did not implement");
}
/// Insert an unconditional indirect branch at the end of \p MBB to \p
/// NewDestBB. Optionally, insert the clobbered register restoring in \p
/// RestoreBB. \p BrOffset indicates the offset of \p NewDestBB relative to
/// the offset of the position to insert the new branch.
virtual void insertIndirectBranch(MachineBasicBlock &MBB,
MachineBasicBlock &NewDestBB,
MachineBasicBlock &RestoreBB,
const DebugLoc &DL, int64_t BrOffset = 0,
RegScavenger *RS = nullptr) const {
llvm_unreachable("target did not implement");
}
/// Analyze the branching code at the end of MBB, returning
/// true if it cannot be understood (e.g. it's a switch dispatch or isn't
/// implemented for a target). Upon success, this returns false and returns
/// with the following information in various cases:
///
/// 1. If this block ends with no branches (it just falls through to its succ)
/// just return false, leaving TBB/FBB null.
/// 2. If this block ends with only an unconditional branch, it sets TBB to be
/// the destination block.
/// 3. If this block ends with a conditional branch and it falls through to a
/// successor block, it sets TBB to be the branch destination block and a
/// list of operands that evaluate the condition. These operands can be
/// passed to other TargetInstrInfo methods to create new branches.
/// 4. If this block ends with a conditional branch followed by an
/// unconditional branch, it returns the 'true' destination in TBB, the
/// 'false' destination in FBB, and a list of operands that evaluate the
/// condition. These operands can be passed to other TargetInstrInfo
/// methods to create new branches.
///
/// Note that removeBranch and insertBranch must be implemented to support
/// cases where this method returns success.
///
/// If AllowModify is true, then this routine is allowed to modify the basic
/// block (e.g. delete instructions after the unconditional branch).
///
/// The CFG information in MBB.Predecessors and MBB.Successors must be valid
/// before calling this function.
virtual bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
MachineBasicBlock *&FBB,
SmallVectorImpl<MachineOperand> &Cond,
bool AllowModify = false) const {
return true;
}
/// Represents a predicate at the MachineFunction level. The control flow a
/// MachineBranchPredicate represents is:
///
/// Reg = LHS `Predicate` RHS == ConditionDef
/// if Reg then goto TrueDest else goto FalseDest
///
struct MachineBranchPredicate {
enum ComparePredicate {
PRED_EQ, // True if two values are equal
PRED_NE, // True if two values are not equal
PRED_INVALID // Sentinel value
};
ComparePredicate Predicate = PRED_INVALID;
MachineOperand LHS = MachineOperand::CreateImm(0);
MachineOperand RHS = MachineOperand::CreateImm(0);
MachineBasicBlock *TrueDest = nullptr;
MachineBasicBlock *FalseDest = nullptr;
MachineInstr *ConditionDef = nullptr;
/// SingleUseCondition is true if ConditionDef is dead except for the
/// branch(es) at the end of the basic block.
///
bool SingleUseCondition = false;
explicit MachineBranchPredicate() = default;
};
/// Analyze the branching code at the end of MBB and parse it into the
/// MachineBranchPredicate structure if possible. Returns false on success
/// and true on failure.
///
/// If AllowModify is true, then this routine is allowed to modify the basic
/// block (e.g. delete instructions after the unconditional branch).
///
virtual bool analyzeBranchPredicate(MachineBasicBlock &MBB,
MachineBranchPredicate &MBP,
bool AllowModify = false) const {
return true;
}
/// Remove the branching code at the end of the specific MBB.
/// This is only invoked in cases where analyzeBranch returns success. It
/// returns the number of instructions that were removed.
/// If \p BytesRemoved is non-null, report the change in code size from the
/// removed instructions.
virtual unsigned removeBranch(MachineBasicBlock &MBB,
int *BytesRemoved = nullptr) const {
llvm_unreachable("Target didn't implement TargetInstrInfo::removeBranch!");
}
/// Insert branch code into the end of the specified MachineBasicBlock. The
/// operands to this method are the same as those returned by analyzeBranch.
/// This is only invoked in cases where analyzeBranch returns success. It
/// returns the number of instructions inserted. If \p BytesAdded is non-null,
/// report the change in code size from the added instructions.
///
/// It is also invoked by tail merging to add unconditional branches in
/// cases where analyzeBranch doesn't apply because there was no original
/// branch to analyze. At least this much must be implemented, else tail
/// merging needs to be disabled.
///
/// The CFG information in MBB.Predecessors and MBB.Successors must be valid
/// before calling this function.
virtual unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
MachineBasicBlock *FBB,
ArrayRef<MachineOperand> Cond,
const DebugLoc &DL,
int *BytesAdded = nullptr) const {
llvm_unreachable("Target didn't implement TargetInstrInfo::insertBranch!");
}
unsigned insertUnconditionalBranch(MachineBasicBlock &MBB,
MachineBasicBlock *DestBB,
const DebugLoc &DL,
int *BytesAdded = nullptr) const {
return insertBranch(MBB, DestBB, nullptr, ArrayRef<MachineOperand>(), DL,
BytesAdded);
}
/// Object returned by analyzeLoopForPipelining. Allows software pipelining
/// implementations to query attributes of the loop being pipelined and to
/// apply target-specific updates to the loop once pipelining is complete.
class PipelinerLoopInfo {
public:
virtual ~PipelinerLoopInfo();
/// Return true if the given instruction should not be pipelined and should
/// be ignored. An example could be a loop comparison, or induction variable
/// update with no users being pipelined.
virtual bool shouldIgnoreForPipelining(const MachineInstr *MI) const = 0;
/// Return true if the proposed schedule should used. Otherwise return
/// false to not pipeline the loop. This function should be used to ensure
/// that pipelined loops meet target-specific quality heuristics.
virtual bool shouldUseSchedule(SwingSchedulerDAG &SSD, SMSchedule &SMS) {
return true;
}
/// Create a condition to determine if the trip count of the loop is greater
/// than TC, where TC is always one more than for the previous prologue or
/// 0 if this is being called for the outermost prologue.
///
/// If the trip count is statically known to be greater than TC, return
/// true. If the trip count is statically known to be not greater than TC,
/// return false. Otherwise return nullopt and fill out Cond with the test
/// condition.
///
/// Note: This hook is guaranteed to be called from the innermost to the
/// outermost prologue of the loop being software pipelined.
virtual std::optional<bool>
createTripCountGreaterCondition(int TC, MachineBasicBlock &MBB,
SmallVectorImpl<MachineOperand> &Cond) = 0;
/// Modify the loop such that the trip count is
/// OriginalTC + TripCountAdjust.
virtual void adjustTripCount(int TripCountAdjust) = 0;
/// Called when the loop's preheader has been modified to NewPreheader.
virtual void setPreheader(MachineBasicBlock *NewPreheader) = 0;
/// Called when the loop is being removed. Any instructions in the preheader
/// should be removed.
///
/// Once this function is called, no other functions on this object are
/// valid; the loop has been removed.
virtual void disposed() = 0;
};
/// Analyze loop L, which must be a single-basic-block loop, and if the
/// conditions can be understood enough produce a PipelinerLoopInfo object.
virtual std::unique_ptr<PipelinerLoopInfo>
analyzeLoopForPipelining(MachineBasicBlock *LoopBB) const {
return nullptr;
}
/// Analyze the loop code, return true if it cannot be understood. Upon
/// success, this function returns false and returns information about the
/// induction variable and compare instruction used at the end.
virtual bool analyzeLoop(MachineLoop &L, MachineInstr *&IndVarInst,
MachineInstr *&CmpInst) const {
return true;
}
/// Generate code to reduce the loop iteration by one and check if the loop
/// is finished. Return the value/register of the new loop count. We need
/// this function when peeling off one or more iterations of a loop. This
/// function assumes the nth iteration is peeled first.
virtual unsigned reduceLoopCount(MachineBasicBlock &MBB,
MachineBasicBlock &PreHeader,
MachineInstr *IndVar, MachineInstr &Cmp,
SmallVectorImpl<MachineOperand> &Cond,
SmallVectorImpl<MachineInstr *> &PrevInsts,
unsigned Iter, unsigned MaxIter) const {
llvm_unreachable("Target didn't implement ReduceLoopCount");
}
/// Delete the instruction OldInst and everything after it, replacing it with
/// an unconditional branch to NewDest. This is used by the tail merging pass.
virtual void ReplaceTailWithBranchTo(MachineBasicBlock::iterator Tail,
MachineBasicBlock *NewDest) const;
/// Return true if it's legal to split the given basic
/// block at the specified instruction (i.e. instruction would be the start
/// of a new basic block).
virtual bool isLegalToSplitMBBAt(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI) const {
return true;
}
/// Return true if it's profitable to predicate
/// instructions with accumulated instruction latency of "NumCycles"
/// of the specified basic block, where the probability of the instructions
/// being executed is given by Probability, and Confidence is a measure
/// of our confidence that it will be properly predicted.
virtual bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
unsigned ExtraPredCycles,
BranchProbability Probability) const {
return false;
}
/// Second variant of isProfitableToIfCvt. This one
/// checks for the case where two basic blocks from true and false path
/// of a if-then-else (diamond) are predicated on mutually exclusive
/// predicates, where the probability of the true path being taken is given
/// by Probability, and Confidence is a measure of our confidence that it
/// will be properly predicted.
virtual bool isProfitableToIfCvt(MachineBasicBlock &TMBB, unsigned NumTCycles,
unsigned ExtraTCycles,
MachineBasicBlock &FMBB, unsigned NumFCycles,
unsigned ExtraFCycles,
BranchProbability Probability) const {
return false;
}
/// Return true if it's profitable for if-converter to duplicate instructions
/// of specified accumulated instruction latencies in the specified MBB to
/// enable if-conversion.
/// The probability of the instructions being executed is given by
/// Probability, and Confidence is a measure of our confidence that it
/// will be properly predicted.
virtual bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB,
unsigned NumCycles,
BranchProbability Probability) const {
return false;
}
/// Return the increase in code size needed to predicate a contiguous run of
/// NumInsts instructions.
virtual unsigned extraSizeToPredicateInstructions(const MachineFunction &MF,
unsigned NumInsts) const {
return 0;
}
/// Return an estimate for the code size reduction (in bytes) which will be
/// caused by removing the given branch instruction during if-conversion.
virtual unsigned predictBranchSizeForIfCvt(MachineInstr &MI) const {
return getInstSizeInBytes(MI);
}
/// Return true if it's profitable to unpredicate
/// one side of a 'diamond', i.e. two sides of if-else predicated on mutually
/// exclusive predicates.
/// e.g.
/// subeq r0, r1, #1
/// addne r0, r1, #1
/// =>
/// sub r0, r1, #1
/// addne r0, r1, #1
///
/// This may be profitable is conditional instructions are always executed.
virtual bool isProfitableToUnpredicate(MachineBasicBlock &TMBB,
MachineBasicBlock &FMBB) const {
return false;
}
/// Return true if it is possible to insert a select
/// instruction that chooses between TrueReg and FalseReg based on the
/// condition code in Cond.
///
/// When successful, also return the latency in cycles from TrueReg,
/// FalseReg, and Cond to the destination register. In most cases, a select
/// instruction will be 1 cycle, so CondCycles = TrueCycles = FalseCycles = 1
///
/// Some x86 implementations have 2-cycle cmov instructions.
///
/// @param MBB Block where select instruction would be inserted.
/// @param Cond Condition returned by analyzeBranch.
/// @param DstReg Virtual dest register that the result should write to.
/// @param TrueReg Virtual register to select when Cond is true.
/// @param FalseReg Virtual register to select when Cond is false.
/// @param CondCycles Latency from Cond+Branch to select output.
/// @param TrueCycles Latency from TrueReg to select output.
/// @param FalseCycles Latency from FalseReg to select output.
virtual bool canInsertSelect(const MachineBasicBlock &MBB,
ArrayRef<MachineOperand> Cond, Register DstReg,
Register TrueReg, Register FalseReg,
int &CondCycles, int &TrueCycles,
int &FalseCycles) const {
return false;
}
/// Insert a select instruction into MBB before I that will copy TrueReg to
/// DstReg when Cond is true, and FalseReg to DstReg when Cond is false.
///
/// This function can only be called after canInsertSelect() returned true.
/// The condition in Cond comes from analyzeBranch, and it can be assumed
/// that the same flags or registers required by Cond are available at the
/// insertion point.
///
/// @param MBB Block where select instruction should be inserted.
/// @param I Insertion point.
/// @param DL Source location for debugging.
/// @param DstReg Virtual register to be defined by select instruction.
/// @param Cond Condition as computed by analyzeBranch.
/// @param TrueReg Virtual register to copy when Cond is true.
/// @param FalseReg Virtual register to copy when Cons is false.
virtual void insertSelect(MachineBasicBlock &MBB,
MachineBasicBlock::iterator I, const DebugLoc &DL,
Register DstReg, ArrayRef<MachineOperand> Cond,
Register TrueReg, Register FalseReg) const {
llvm_unreachable("Target didn't implement TargetInstrInfo::insertSelect!");
}
/// Analyze the given select instruction, returning true if
/// it cannot be understood. It is assumed that MI->isSelect() is true.
///
/// When successful, return the controlling condition and the operands that
/// determine the true and false result values.
///
/// Result = SELECT Cond, TrueOp, FalseOp
///
/// Some targets can optimize select instructions, for example by predicating
/// the instruction defining one of the operands. Such targets should set
/// Optimizable.
///
/// @param MI Select instruction to analyze.
/// @param Cond Condition controlling the select.
/// @param TrueOp Operand number of the value selected when Cond is true.
/// @param FalseOp Operand number of the value selected when Cond is false.
/// @param Optimizable Returned as true if MI is optimizable.
/// @returns False on success.
virtual bool analyzeSelect(const MachineInstr &MI,
SmallVectorImpl<MachineOperand> &Cond,
unsigned &TrueOp, unsigned &FalseOp,
bool &Optimizable) const {
assert(MI.getDesc().isSelect() && "MI must be a select instruction");
return true;
}
/// Given a select instruction that was understood by
/// analyzeSelect and returned Optimizable = true, attempt to optimize MI by
/// merging it with one of its operands. Returns NULL on failure.
///
/// When successful, returns the new select instruction. The client is
/// responsible for deleting MI.
///
/// If both sides of the select can be optimized, PreferFalse is used to pick
/// a side.
///
/// @param MI Optimizable select instruction.
/// @param NewMIs Set that record all MIs in the basic block up to \p
/// MI. Has to be updated with any newly created MI or deleted ones.
/// @param PreferFalse Try to optimize FalseOp instead of TrueOp.
/// @returns Optimized instruction or NULL.
virtual MachineInstr *optimizeSelect(MachineInstr &MI,
SmallPtrSetImpl<MachineInstr *> &NewMIs,
bool PreferFalse = false) const {
// This function must be implemented if Optimizable is ever set.
llvm_unreachable("Target must implement TargetInstrInfo::optimizeSelect!");
}
/// Emit instructions to copy a pair of physical registers.
///
/// This function should support copies within any legal register class as
/// well as any cross-class copies created during instruction selection.
///
/// The source and destination registers may overlap, which may require a
/// careful implementation when multiple copy instructions are required for
/// large registers. See for example the ARM target.
virtual void copyPhysReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, const DebugLoc &DL,
MCRegister DestReg, MCRegister SrcReg,
bool KillSrc) const {
llvm_unreachable("Target didn't implement TargetInstrInfo::copyPhysReg!");
}
/// Allow targets to tell MachineVerifier whether a specific register
/// MachineOperand can be used as part of PC-relative addressing.
/// PC-relative addressing modes in many CISC architectures contain
/// (non-PC) registers as offsets or scaling values, which inherently
/// tags the corresponding MachineOperand with OPERAND_PCREL.
///
/// @param MO The MachineOperand in question. MO.isReg() should always
/// be true.
/// @return Whether this operand is allowed to be used PC-relatively.
virtual bool isPCRelRegisterOperandLegal(const MachineOperand &MO) const {
return false;
}
/// Return an index for MachineJumpTableInfo if \p insn is an indirect jump
/// using a jump table, otherwise -1.
virtual int getJumpTableIndex(const MachineInstr &MI) const { return -1; }
protected:
/// Target-dependent implementation for IsCopyInstr.
/// If the specific machine instruction is a instruction that moves/copies
/// value from one register to another register return destination and source
/// registers as machine operands.
virtual std::optional<DestSourcePair>
isCopyInstrImpl(const MachineInstr &MI) const {
return std::nullopt;
}
/// Return true if the given terminator MI is not expected to spill. This
/// sets the live interval as not spillable and adjusts phi node lowering to
/// not introduce copies after the terminator. Use with care, these are
/// currently used for hardware loop intrinsics in very controlled situations,
/// created prior to registry allocation in loops that only have single phi
/// users for the terminators value. They may run out of registers if not used
/// carefully.
virtual bool isUnspillableTerminatorImpl(const MachineInstr *MI) const {
return false;
}
public:
/// If the specific machine instruction is a instruction that moves/copies
/// value from one register to another register return destination and source
/// registers as machine operands.
/// For COPY-instruction the method naturally returns destination and source
/// registers as machine operands, for all other instructions the method calls
/// target-dependent implementation.
std::optional<DestSourcePair> isCopyInstr(const MachineInstr &MI) const {
if (MI.isCopy()) {
return DestSourcePair{MI.getOperand(0), MI.getOperand(1)};
}
return isCopyInstrImpl(MI);
}
/// If the specific machine instruction is an instruction that adds an
/// immediate value and a physical register, and stores the result in
/// the given physical register \c Reg, return a pair of the source
/// register and the offset which has been added.
virtual std::optional<RegImmPair> isAddImmediate(const MachineInstr &MI,
Register Reg) const {
return std::nullopt;
}
/// Returns true if MI is an instruction that defines Reg to have a constant
/// value and the value is recorded in ImmVal. The ImmVal is a result that
/// should be interpreted as modulo size of Reg.
virtual bool getConstValDefinedInReg(const MachineInstr &MI,
const Register Reg,
int64_t &ImmVal) const {
return false;
}
/// Store the specified register of the given register class to the specified
/// stack frame index. The store instruction is to be added to the given
/// machine basic block before the specified machine instruction. If isKill
/// is true, the register operand is the last use and must be marked kill. If
/// \p SrcReg is being directly spilled as part of assigning a virtual
/// register, \p VReg is the register being assigned. This additional register
/// argument is needed for certain targets when invoked from RegAllocFast to
/// map the spilled physical register to its virtual register. A null register
/// can be passed elsewhere.
virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
Register SrcReg, bool isKill, int FrameIndex,
const TargetRegisterClass *RC,
const TargetRegisterInfo *TRI,
Register VReg) const {
llvm_unreachable("Target didn't implement "
"TargetInstrInfo::storeRegToStackSlot!");
}
/// Load the specified register of the given register class from the specified
/// stack frame index. The load instruction is to be added to the given
/// machine basic block before the specified machine instruction. If \p
/// DestReg is being directly reloaded as part of assigning a virtual
/// register, \p VReg is the register being assigned. This additional register
/// argument is needed for certain targets when invoked from RegAllocFast to
/// map the loaded physical register to its virtual register. A null register
/// can be passed elsewhere.
virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
Register DestReg, int FrameIndex,
const TargetRegisterClass *RC,
const TargetRegisterInfo *TRI,
Register VReg) const {
llvm_unreachable("Target didn't implement "
"TargetInstrInfo::loadRegFromStackSlot!");
}
/// This function is called for all pseudo instructions
/// that remain after register allocation. Many pseudo instructions are
/// created to help register allocation. This is the place to convert them
/// into real instructions. The target can edit MI in place, or it can insert
/// new instructions and erase MI. The function should return true if
/// anything was changed.
virtual bool expandPostRAPseudo(MachineInstr &MI) const { return false; }
/// Check whether the target can fold a load that feeds a subreg operand
/// (or a subreg operand that feeds a store).
/// For example, X86 may want to return true if it can fold
/// movl (%esp), %eax
/// subb, %al, ...
/// Into:
/// subb (%esp), ...
///
/// Ideally, we'd like the target implementation of foldMemoryOperand() to
/// reject subregs - but since this behavior used to be enforced in the
/// target-independent code, moving this responsibility to the targets
/// has the potential of causing nasty silent breakage in out-of-tree targets.
virtual bool isSubregFoldable() const { return false; }
/// For a patchpoint, stackmap, or statepoint intrinsic, return the range of
/// operands which can't be folded into stack references. Operands outside
/// of the range are most likely foldable but it is not guaranteed.
/// These instructions are unique in that stack references for some operands
/// have the same execution cost (e.g. none) as the unfolded register forms.
/// The ranged return is guaranteed to include all operands which can't be
/// folded at zero cost.
virtual std::pair<unsigned, unsigned>
getPatchpointUnfoldableRange(const MachineInstr &MI) const;
/// Attempt to fold a load or store of the specified stack
/// slot into the specified machine instruction for the specified operand(s).
/// If this is possible, a new instruction is returned with the specified
/// operand folded, otherwise NULL is returned.
/// The new instruction is inserted before MI, and the client is responsible
/// for removing the old instruction.
/// If VRM is passed, the assigned physregs can be inspected by target to
/// decide on using an opcode (note that those assignments can still change).
MachineInstr *foldMemoryOperand(MachineInstr &MI, ArrayRef<unsigned> Ops,
int FI,
LiveIntervals *LIS = nullptr,
VirtRegMap *VRM = nullptr) const;
/// Same as the previous version except it allows folding of any load and
/// store from / to any address, not just from a specific stack slot.
MachineInstr *foldMemoryOperand(MachineInstr &MI, ArrayRef<unsigned> Ops,
MachineInstr &LoadMI,
LiveIntervals *LIS = nullptr) const;
/// This function defines the logic to lower COPY instruction to
/// target specific instruction(s).
void lowerCopy(MachineInstr *MI, const TargetRegisterInfo *TRI) const;
/// Return true when there is potentially a faster code sequence
/// for an instruction chain ending in \p Root. All potential patterns are
/// returned in the \p Pattern vector. Pattern should be sorted in priority
/// order since the pattern evaluator stops checking as soon as it finds a
/// faster sequence.
/// \param Root - Instruction that could be combined with one of its operands
/// \param Patterns - Vector of possible combination patterns
virtual bool
getMachineCombinerPatterns(MachineInstr &Root,
SmallVectorImpl<MachineCombinerPattern> &Patterns,
bool DoRegPressureReduce) const;
/// Return true if target supports reassociation of instructions in machine
/// combiner pass to reduce register pressure for a given BB.
virtual bool
shouldReduceRegisterPressure(const MachineBasicBlock *MBB,
const RegisterClassInfo *RegClassInfo) const {
return false;
}
/// Fix up the placeholder we may add in genAlternativeCodeSequence().
virtual void
finalizeInsInstrs(MachineInstr &Root, MachineCombinerPattern &P,
SmallVectorImpl<MachineInstr *> &InsInstrs) const {}
/// Return true when a code sequence can improve throughput. It
/// should be called only for instructions in loops.
/// \param Pattern - combiner pattern
virtual bool isThroughputPattern(MachineCombinerPattern Pattern) const;
/// Return true if the input \P Inst is part of a chain of dependent ops
/// that are suitable for reassociation, otherwise return false.
/// If the instruction's operands must be commuted to have a previous
/// instruction of the same type define the first source operand, \P Commuted
/// will be set to true.
bool isReassociationCandidate(const MachineInstr &Inst, bool &Commuted) const;
/// Return true when \P Inst is both associative and commutative. If \P Invert
/// is true, then the inverse of \P Inst operation must be tested.
virtual bool isAssociativeAndCommutative(const MachineInstr &Inst,
bool Invert = false) const {
return false;
}
/// Return the inverse operation opcode if it exists for \P Opcode (e.g. add
/// for sub and vice versa).
virtual std::optional<unsigned> getInverseOpcode(unsigned Opcode) const {
return std::nullopt;
}
/// Return true when \P Opcode1 or its inversion is equal to \P Opcode2.
bool areOpcodesEqualOrInverse(unsigned Opcode1, unsigned Opcode2) const;
/// Return true when \P Inst has reassociable operands in the same \P MBB.
virtual bool hasReassociableOperands(const MachineInstr &Inst,
const MachineBasicBlock *MBB) const;
/// Return true when \P Inst has reassociable sibling.
virtual bool hasReassociableSibling(const MachineInstr &Inst,
bool &Commuted) const;
/// When getMachineCombinerPatterns() finds patterns, this function generates
/// the instructions that could replace the original code sequence. The client
/// has to decide whether the actual replacement is beneficial or not.
/// \param Root - Instruction that could be combined with one of its operands
/// \param Pattern - Combination pattern for Root
/// \param InsInstrs - Vector of new instructions that implement P
/// \param DelInstrs - Old instructions, including Root, that could be
/// replaced by InsInstr
/// \param InstIdxForVirtReg - map of virtual register to instruction in
/// InsInstr that defines it
virtual void genAlternativeCodeSequence(
MachineInstr &Root, MachineCombinerPattern Pattern,
SmallVectorImpl<MachineInstr *> &InsInstrs,
SmallVectorImpl<MachineInstr *> &DelInstrs,
DenseMap<unsigned, unsigned> &InstIdxForVirtReg) const;
/// When calculate the latency of the root instruction, accumulate the
/// latency of the sequence to the root latency.
/// \param Root - Instruction that could be combined with one of its operands
virtual bool accumulateInstrSeqToRootLatency(MachineInstr &Root) const {
return true;
}
/// Attempt to reassociate \P Root and \P Prev according to \P Pattern to
/// reduce critical path length.
void reassociateOps(MachineInstr &Root, MachineInstr &Prev,
MachineCombinerPattern Pattern,
SmallVectorImpl<MachineInstr *> &InsInstrs,
SmallVectorImpl<MachineInstr *> &DelInstrs,
DenseMap<unsigned, unsigned> &InstrIdxForVirtReg) const;
/// Reassociation of some instructions requires inverse operations (e.g.
/// (X + A) - Y => (X - Y) + A). This method returns a pair of new opcodes
/// (new root opcode, new prev opcode) that must be used to reassociate \P
/// Root and \P Prev accoring to \P Pattern.
std::pair<unsigned, unsigned>
getReassociationOpcodes(MachineCombinerPattern Pattern,
const MachineInstr &Root,
const MachineInstr &Prev) const;
/// The limit on resource length extension we accept in MachineCombiner Pass.
virtual int getExtendResourceLenLimit() const { return 0; }
/// This is an architecture-specific helper function of reassociateOps.
/// Set special operand attributes for new instructions after reassociation.
virtual void setSpecialOperandAttr(MachineInstr &OldMI1, MachineInstr &OldMI2,
MachineInstr &NewMI1,
MachineInstr &NewMI2) const {}
/// Return true when a target supports MachineCombiner.
virtual bool useMachineCombiner() const { return false; }
/// Return a strategy that MachineCombiner must use when creating traces.
virtual MachineTraceStrategy getMachineCombinerTraceStrategy() const;
/// Return true if the given SDNode can be copied during scheduling
/// even if it has glue.
virtual bool canCopyGluedNodeDuringSchedule(SDNode *N) const { return false; }
protected:
/// Target-dependent implementation for foldMemoryOperand.
/// Target-independent code in foldMemoryOperand will
/// take care of adding a MachineMemOperand to the newly created instruction.
/// The instruction and any auxiliary instructions necessary will be inserted
/// at InsertPt.
virtual MachineInstr *
foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
ArrayRef<unsigned> Ops,
MachineBasicBlock::iterator InsertPt, int FrameIndex,
LiveIntervals *LIS = nullptr,
VirtRegMap *VRM = nullptr) const {
return nullptr;
}
/// Target-dependent implementation for foldMemoryOperand.
/// Target-independent code in foldMemoryOperand will
/// take care of adding a MachineMemOperand to the newly created instruction.
/// The instruction and any auxiliary instructions necessary will be inserted
/// at InsertPt.
virtual MachineInstr *foldMemoryOperandImpl(
MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI,
LiveIntervals *LIS = nullptr) const {
return nullptr;
}
/// Target-dependent implementation of getRegSequenceInputs.
///
/// \returns true if it is possible to build the equivalent
/// REG_SEQUENCE inputs with the pair \p MI, \p DefIdx. False otherwise.
///
/// \pre MI.isRegSequenceLike().
///
/// \see TargetInstrInfo::getRegSequenceInputs.
virtual bool getRegSequenceLikeInputs(
const MachineInstr &MI, unsigned DefIdx,
SmallVectorImpl<RegSubRegPairAndIdx> &InputRegs) const {
return false;
}
/// Target-dependent implementation of getExtractSubregInputs.
///
/// \returns true if it is possible to build the equivalent
/// EXTRACT_SUBREG inputs with the pair \p MI, \p DefIdx. False otherwise.
///
/// \pre MI.isExtractSubregLike().
///
/// \see TargetInstrInfo::getExtractSubregInputs.
virtual bool getExtractSubregLikeInputs(const MachineInstr &MI,
unsigned DefIdx,
RegSubRegPairAndIdx &InputReg) const {
return false;
}
/// Target-dependent implementation of getInsertSubregInputs.
///
/// \returns true if it is possible to build the equivalent
/// INSERT_SUBREG inputs with the pair \p MI, \p DefIdx. False otherwise.
///
/// \pre MI.isInsertSubregLike().
///
/// \see TargetInstrInfo::getInsertSubregInputs.
virtual bool
getInsertSubregLikeInputs(const MachineInstr &MI, unsigned DefIdx,
RegSubRegPair &BaseReg,
RegSubRegPairAndIdx &InsertedReg) const {
return false;
}
public:
/// unfoldMemoryOperand - Separate a single instruction which folded a load or
/// a store or a load and a store into two or more instruction. If this is
/// possible, returns true as well as the new instructions by reference.
virtual bool
unfoldMemoryOperand(MachineFunction &MF, MachineInstr &MI, unsigned Reg,
bool UnfoldLoad, bool UnfoldStore,
SmallVectorImpl<MachineInstr *> &NewMIs) const {
return false;
}
virtual bool unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N,
SmallVectorImpl<SDNode *> &NewNodes) const {
return false;
}
/// Returns the opcode of the would be new
/// instruction after load / store are unfolded from an instruction of the
/// specified opcode. It returns zero if the specified unfolding is not
/// possible. If LoadRegIndex is non-null, it is filled in with the operand
/// index of the operand which will hold the register holding the loaded
/// value.
virtual unsigned
getOpcodeAfterMemoryUnfold(unsigned Opc, bool UnfoldLoad, bool UnfoldStore,
unsigned *LoadRegIndex = nullptr) const {
return 0;
}
/// This is used by the pre-regalloc scheduler to determine if two loads are
/// loading from the same base address. It should only return true if the base
/// pointers are the same and the only differences between the two addresses
/// are the offset. It also returns the offsets by reference.
virtual bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
int64_t &Offset1,
int64_t &Offset2) const {
return false;
}
/// This is a used by the pre-regalloc scheduler to determine (in conjunction
/// with areLoadsFromSameBasePtr) if two loads should be scheduled together.
/// On some targets if two loads are loading from
/// addresses in the same cache line, it's better if they are scheduled
/// together. This function takes two integers that represent the load offsets
/// from the common base address. It returns true if it decides it's desirable
/// to schedule the two loads together. "NumLoads" is the number of loads that
/// have already been scheduled after Load1.
virtual bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
int64_t Offset1, int64_t Offset2,
unsigned NumLoads) const {
return false;
}
/// Get the base operand and byte offset of an instruction that reads/writes
/// memory. This is a convenience function for callers that are only prepared
/// to handle a single base operand.
bool getMemOperandWithOffset(const MachineInstr &MI,
const MachineOperand *&BaseOp, int64_t &Offset,
bool &OffsetIsScalable,
const TargetRegisterInfo *TRI) const;
/// Get zero or more base operands and the byte offset of an instruction that
/// reads/writes memory. Note that there may be zero base operands if the
/// instruction accesses a constant address.
/// It returns false if MI does not read/write memory.
/// It returns false if base operands and offset could not be determined.
/// It is not guaranteed to always recognize base operands and offsets in all
/// cases.
virtual bool getMemOperandsWithOffsetWidth(
const MachineInstr &MI, SmallVectorImpl<const MachineOperand *> &BaseOps,
int64_t &Offset, bool &OffsetIsScalable, unsigned &Width,
const TargetRegisterInfo *TRI) const {
return false;
}
/// Return true if the instruction contains a base register and offset. If
/// true, the function also sets the operand position in the instruction
/// for the base register and offset.
virtual bool getBaseAndOffsetPosition(const MachineInstr &MI,
unsigned &BasePos,
unsigned &OffsetPos) const {
return false;
}
/// Target dependent implementation to get the values constituting the address
/// MachineInstr that is accessing memory. These values are returned as a
/// struct ExtAddrMode which contains all relevant information to make up the
/// address.
virtual std::optional<ExtAddrMode>
getAddrModeFromMemoryOp(const MachineInstr &MemI,
const TargetRegisterInfo *TRI) const {
return std::nullopt;
}
/// Returns true if MI's Def is NullValueReg, and the MI
/// does not change the Zero value. i.e. cases such as rax = shr rax, X where
/// NullValueReg = rax. Note that if the NullValueReg is non-zero, this
/// function can return true even if becomes zero. Specifically cases such as
/// NullValueReg = shl NullValueReg, 63.
virtual bool preservesZeroValueInReg(const MachineInstr *MI,
const Register NullValueReg,
const TargetRegisterInfo *TRI) const {
return false;
}
/// If the instruction is an increment of a constant value, return the amount.
virtual bool getIncrementValue(const MachineInstr &MI, int &Value) const {
return false;
}
/// Returns true if the two given memory operations should be scheduled
/// adjacent. Note that you have to add:
/// DAG->addMutation(createLoadClusterDAGMutation(DAG->TII, DAG->TRI));
/// or
/// DAG->addMutation(createStoreClusterDAGMutation(DAG->TII, DAG->TRI));
/// to TargetPassConfig::createMachineScheduler() to have an effect.
///
/// \p BaseOps1 and \p BaseOps2 are memory operands of two memory operations.
/// \p NumLoads is the number of loads that will be in the cluster if this
/// hook returns true.
/// \p NumBytes is the number of bytes that will be loaded from all the
/// clustered loads if this hook returns true.
virtual bool shouldClusterMemOps(ArrayRef<const MachineOperand *> BaseOps1,
ArrayRef<const MachineOperand *> BaseOps2,
unsigned NumLoads, unsigned NumBytes) const {
llvm_unreachable("target did not implement shouldClusterMemOps()");
}
/// Reverses the branch condition of the specified condition list,
/// returning false on success and true if it cannot be reversed.
virtual bool
reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
return true;
}
/// Insert a noop into the instruction stream at the specified point.
virtual void insertNoop(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI) const;
/// Insert noops into the instruction stream at the specified point.
virtual void insertNoops(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned Quantity) const;
/// Return the noop instruction to use for a noop.
virtual MCInst getNop() const;
/// Return true for post-incremented instructions.
virtual bool isPostIncrement(const MachineInstr &MI) const { return false; }
/// Returns true if the instruction is already predicated.
virtual bool isPredicated(const MachineInstr &MI) const { return false; }
/// Assumes the instruction is already predicated and returns true if the
/// instruction can be predicated again.
virtual bool canPredicatePredicatedInstr(const MachineInstr &MI) const {
assert(isPredicated(MI) && "Instruction is not predicated");
return false;
}
// Returns a MIRPrinter comment for this machine operand.
virtual std::string
createMIROperandComment(const MachineInstr &MI, const MachineOperand &Op,
unsigned OpIdx, const TargetRegisterInfo *TRI) const;
/// Returns true if the instruction is a
/// terminator instruction that has not been predicated.
bool isUnpredicatedTerminator(const MachineInstr &MI) const;
/// Returns true if MI is an unconditional tail call.
virtual bool isUnconditionalTailCall(const MachineInstr &MI) const {
return false;
}
/// Returns true if the tail call can be made conditional on BranchCond.
virtual bool canMakeTailCallConditional(SmallVectorImpl<MachineOperand> &Cond,
const MachineInstr &TailCall) const {
return false;
}
/// Replace the conditional branch in MBB with a conditional tail call.
virtual void replaceBranchWithTailCall(MachineBasicBlock &MBB,
SmallVectorImpl<MachineOperand> &Cond,
const MachineInstr &TailCall) const {
llvm_unreachable("Target didn't implement replaceBranchWithTailCall!");
}
/// Convert the instruction into a predicated instruction.
/// It returns true if the operation was successful.
virtual bool PredicateInstruction(MachineInstr &MI,
ArrayRef<MachineOperand> Pred) const;
/// Returns true if the first specified predicate
/// subsumes the second, e.g. GE subsumes GT.
virtual bool SubsumesPredicate(ArrayRef<MachineOperand> Pred1,
ArrayRef<MachineOperand> Pred2) const {
return false;
}
/// If the specified instruction defines any predicate
/// or condition code register(s) used for predication, returns true as well
/// as the definition predicate(s) by reference.
/// SkipDead should be set to false at any point that dead
/// predicate instructions should be considered as being defined.
/// A dead predicate instruction is one that is guaranteed to be removed
/// after a call to PredicateInstruction.
virtual bool ClobbersPredicate(MachineInstr &MI,
std::vector<MachineOperand> &Pred,
bool SkipDead) const {
return false;
}
/// Return true if the specified instruction can be predicated.
/// By default, this returns true for every instruction with a
/// PredicateOperand.
virtual bool isPredicable(const MachineInstr &MI) const {
return MI.getDesc().isPredicable();
}
/// Return true if it's safe to move a machine
/// instruction that defines the specified register class.
virtual bool isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const {
return true;
}
/// Test if the given instruction should be considered a scheduling boundary.
/// This primarily includes labels and terminators.
virtual bool isSchedulingBoundary(const MachineInstr &MI,
const MachineBasicBlock *MBB,
const MachineFunction &MF) const;
/// Measure the specified inline asm to determine an approximation of its
/// length.
virtual unsigned getInlineAsmLength(
const char *Str, const MCAsmInfo &MAI,
const TargetSubtargetInfo *STI = nullptr) const;
/// Allocate and return a hazard recognizer to use for this target when
/// scheduling the machine instructions before register allocation.
virtual ScheduleHazardRecognizer *
CreateTargetHazardRecognizer(const TargetSubtargetInfo *STI,
const ScheduleDAG *DAG) const;
/// Allocate and return a hazard recognizer to use for this target when
/// scheduling the machine instructions before register allocation.
virtual ScheduleHazardRecognizer *
CreateTargetMIHazardRecognizer(const InstrItineraryData *,
const ScheduleDAGMI *DAG) const;
/// Allocate and return a hazard recognizer to use for this target when
/// scheduling the machine instructions after register allocation.
virtual ScheduleHazardRecognizer *
CreateTargetPostRAHazardRecognizer(const InstrItineraryData *,
const ScheduleDAG *DAG) const;
/// Allocate and return a hazard recognizer to use for by non-scheduling
/// passes.
virtual ScheduleHazardRecognizer *
CreateTargetPostRAHazardRecognizer(const MachineFunction &MF) const {
return nullptr;
}
/// Provide a global flag for disabling the PreRA hazard recognizer that
/// targets may choose to honor.
bool usePreRAHazardRecognizer() const;
/// For a comparison instruction, return the source registers
/// in SrcReg and SrcReg2 if having two register operands, and the value it
/// compares against in CmpValue. Return true if the comparison instruction
/// can be analyzed.
virtual bool analyzeCompare(const MachineInstr &MI, Register &SrcReg,
Register &SrcReg2, int64_t &Mask,
int64_t &Value) const {
return false;
}
/// See if the comparison instruction can be converted
/// into something more efficient. E.g., on ARM most instructions can set the
/// flags register, obviating the need for a separate CMP.
virtual bool optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
Register SrcReg2, int64_t Mask,
int64_t Value,
const MachineRegisterInfo *MRI) const {
return false;
}
virtual bool optimizeCondBranch(MachineInstr &MI) const { return false; }
/// Try to remove the load by folding it to a register operand at the use.
/// We fold the load instructions if and only if the
/// def and use are in the same BB. We only look at one load and see
/// whether it can be folded into MI. FoldAsLoadDefReg is the virtual register
/// defined by the load we are trying to fold. DefMI returns the machine
/// instruction that defines FoldAsLoadDefReg, and the function returns
/// the machine instruction generated due to folding.
virtual MachineInstr *optimizeLoadInstr(MachineInstr &MI,
const MachineRegisterInfo *MRI,
Register &FoldAsLoadDefReg,
MachineInstr *&DefMI) const {
return nullptr;
}
/// 'Reg' is known to be defined by a move immediate instruction,
/// try to fold the immediate into the use instruction.
/// If MRI->hasOneNonDBGUse(Reg) is true, and this function returns true,
/// then the caller may assume that DefMI has been erased from its parent
/// block. The caller may assume that it will not be erased by this
/// function otherwise.
virtual bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,
Register Reg, MachineRegisterInfo *MRI) const {
return false;
}
/// Return the number of u-operations the given machine
/// instruction will be decoded to on the target cpu. The itinerary's
/// IssueWidth is the number of microops that can be dispatched each
/// cycle. An instruction with zero microops takes no dispatch resources.
virtual unsigned getNumMicroOps(const InstrItineraryData *ItinData,
const MachineInstr &MI) const;
/// Return true for pseudo instructions that don't consume any
/// machine resources in their current form. These are common cases that the
/// scheduler should consider free, rather than conservatively handling them
/// as instructions with no itinerary.
bool isZeroCost(unsigned Opcode) const {
return Opcode <= TargetOpcode::COPY;
}
virtual int getOperandLatency(const InstrItineraryData *ItinData,
SDNode *DefNode, unsigned DefIdx,
SDNode *UseNode, unsigned UseIdx) const;
/// Compute and return the use operand latency of a given pair of def and use.
/// In most cases, the static scheduling itinerary was enough to determine the
/// operand latency. But it may not be possible for instructions with variable
/// number of defs / uses.
///
/// This is a raw interface to the itinerary that may be directly overridden
/// by a target. Use computeOperandLatency to get the best estimate of
/// latency.
virtual int getOperandLatency(const InstrItineraryData *ItinData,
const MachineInstr &DefMI, unsigned DefIdx,
const MachineInstr &UseMI,
unsigned UseIdx) const;
/// Compute the instruction latency of a given instruction.
/// If the instruction has higher cost when predicated, it's returned via
/// PredCost.
virtual unsigned getInstrLatency(const InstrItineraryData *ItinData,
const MachineInstr &MI,
unsigned *PredCost = nullptr) const;
virtual unsigned getPredicationCost(const MachineInstr &MI) const;
virtual int getInstrLatency(const InstrItineraryData *ItinData,
SDNode *Node) const;
/// Return the default expected latency for a def based on its opcode.
unsigned defaultDefLatency(const MCSchedModel &SchedModel,
const MachineInstr &DefMI) const;
/// Return true if this opcode has high latency to its result.
virtual bool isHighLatencyDef(int opc) const { return false; }
/// Compute operand latency between a def of 'Reg'
/// and a use in the current loop. Return true if the target considered
/// it 'high'. This is used by optimization passes such as machine LICM to
/// determine whether it makes sense to hoist an instruction out even in a
/// high register pressure situation.
virtual bool hasHighOperandLatency(const TargetSchedModel &SchedModel,
const MachineRegisterInfo *MRI,
const MachineInstr &DefMI, unsigned DefIdx,
const MachineInstr &UseMI,
unsigned UseIdx) const {
return false;
}
/// Compute operand latency of a def of 'Reg'. Return true
/// if the target considered it 'low'.
virtual bool hasLowDefLatency(const TargetSchedModel &SchedModel,
const MachineInstr &DefMI,
unsigned DefIdx) const;
/// Perform target-specific instruction verification.
virtual bool verifyInstruction(const MachineInstr &MI,
StringRef &ErrInfo) const {
return true;
}
/// Return the current execution domain and bit mask of
/// possible domains for instruction.
///
/// Some micro-architectures have multiple execution domains, and multiple
/// opcodes that perform the same operation in different domains. For
/// example, the x86 architecture provides the por, orps, and orpd
/// instructions that all do the same thing. There is a latency penalty if a
/// register is written in one domain and read in another.
///
/// This function returns a pair (domain, mask) containing the execution
/// domain of MI, and a bit mask of possible domains. The setExecutionDomain
/// function can be used to change the opcode to one of the domains in the
/// bit mask. Instructions whose execution domain can't be changed should
/// return a 0 mask.
///
/// The execution domain numbers don't have any special meaning except domain
/// 0 is used for instructions that are not associated with any interesting
/// execution domain.
///
virtual std::pair<uint16_t, uint16_t>
getExecutionDomain(const MachineInstr &MI) const {
return std::make_pair(0, 0);
}
/// Change the opcode of MI to execute in Domain.
///
/// The bit (1 << Domain) must be set in the mask returned from
/// getExecutionDomain(MI).
virtual void setExecutionDomain(MachineInstr &MI, unsigned Domain) const {}
/// Returns the preferred minimum clearance
/// before an instruction with an unwanted partial register update.
///
/// Some instructions only write part of a register, and implicitly need to
/// read the other parts of the register. This may cause unwanted stalls
/// preventing otherwise unrelated instructions from executing in parallel in
/// an out-of-order CPU.
///
/// For example, the x86 instruction cvtsi2ss writes its result to bits
/// [31:0] of the destination xmm register. Bits [127:32] are unaffected, so
/// the instruction needs to wait for the old value of the register to become
/// available:
///
/// addps %xmm1, %xmm0
/// movaps %xmm0, (%rax)
/// cvtsi2ss %rbx, %xmm0
///
/// In the code above, the cvtsi2ss instruction needs to wait for the addps
/// instruction before it can issue, even though the high bits of %xmm0
/// probably aren't needed.
///
/// This hook returns the preferred clearance before MI, measured in
/// instructions. Other defs of MI's operand OpNum are avoided in the last N
/// instructions before MI. It should only return a positive value for
/// unwanted dependencies. If the old bits of the defined register have
/// useful values, or if MI is determined to otherwise read the dependency,
/// the hook should return 0.
///
/// The unwanted dependency may be handled by:
///
/// 1. Allocating the same register for an MI def and use. That makes the
/// unwanted dependency identical to a required dependency.
///
/// 2. Allocating a register for the def that has no defs in the previous N
/// instructions.
///
/// 3. Calling breakPartialRegDependency() with the same arguments. This
/// allows the target to insert a dependency breaking instruction.
///
virtual unsigned
getPartialRegUpdateClearance(const MachineInstr &MI, unsigned OpNum,
const TargetRegisterInfo *TRI) const {
// The default implementation returns 0 for no partial register dependency.
return 0;
}
/// Return the minimum clearance before an instruction that reads an
/// unused register.
///
/// For example, AVX instructions may copy part of a register operand into
/// the unused high bits of the destination register.
///
/// vcvtsi2sdq %rax, undef %xmm0, %xmm14
///
/// In the code above, vcvtsi2sdq copies %xmm0[127:64] into %xmm14 creating a
/// false dependence on any previous write to %xmm0.
///
/// This hook works similarly to getPartialRegUpdateClearance, except that it
/// does not take an operand index. Instead sets \p OpNum to the index of the
/// unused register.
virtual unsigned getUndefRegClearance(const MachineInstr &MI, unsigned OpNum,
const TargetRegisterInfo *TRI) const {
// The default implementation returns 0 for no undef register dependency.
return 0;
}
/// Insert a dependency-breaking instruction
/// before MI to eliminate an unwanted dependency on OpNum.
///
/// If it wasn't possible to avoid a def in the last N instructions before MI
/// (see getPartialRegUpdateClearance), this hook will be called to break the
/// unwanted dependency.
///
/// On x86, an xorps instruction can be used as a dependency breaker:
///
/// addps %xmm1, %xmm0
/// movaps %xmm0, (%rax)
/// xorps %xmm0, %xmm0
/// cvtsi2ss %rbx, %xmm0
///
/// An <imp-kill> operand should be added to MI if an instruction was
/// inserted. This ties the instructions together in the post-ra scheduler.
///
virtual void breakPartialRegDependency(MachineInstr &MI, unsigned OpNum,
const TargetRegisterInfo *TRI) const {}
/// Create machine specific model for scheduling.
virtual DFAPacketizer *
CreateTargetScheduleState(const TargetSubtargetInfo &) const {
return nullptr;
}
/// Sometimes, it is possible for the target
/// to tell, even without aliasing information, that two MIs access different
/// memory addresses. This function returns true if two MIs access different
/// memory addresses and false otherwise.
///
/// Assumes any physical registers used to compute addresses have the same
/// value for both instructions. (This is the most useful assumption for
/// post-RA scheduling.)
///
/// See also MachineInstr::mayAlias, which is implemented on top of this
/// function.
virtual bool
areMemAccessesTriviallyDisjoint(const MachineInstr &MIa,
const MachineInstr &MIb) const {
assert(MIa.mayLoadOrStore() &&
"MIa must load from or modify a memory location");
assert(MIb.mayLoadOrStore() &&
"MIb must load from or modify a memory location");
return false;
}
/// Return the value to use for the MachineCSE's LookAheadLimit,
/// which is a heuristic used for CSE'ing phys reg defs.
virtual unsigned getMachineCSELookAheadLimit() const {
// The default lookahead is small to prevent unprofitable quadratic
// behavior.
return 5;
}
/// Return the maximal number of alias checks on memory operands. For
/// instructions with more than one memory operands, the alias check on a
/// single MachineInstr pair has quadratic overhead and results in
/// unacceptable performance in the worst case. The limit here is to clamp
/// that maximal checks performed. Usually, that's the product of memory
/// operand numbers from that pair of MachineInstr to be checked. For
/// instance, with two MachineInstrs with 4 and 5 memory operands
/// correspondingly, a total of 20 checks are required. With this limit set to
/// 16, their alias check is skipped. We choose to limit the product instead
/// of the individual instruction as targets may have special MachineInstrs
/// with a considerably high number of memory operands, such as `ldm` in ARM.
/// Setting this limit per MachineInstr would result in either too high
/// overhead or too rigid restriction.
virtual unsigned getMemOperandAACheckLimit() const { return 16; }
/// Return an array that contains the ids of the target indices (used for the
/// TargetIndex machine operand) and their names.
///
/// MIR Serialization is able to serialize only the target indices that are
/// defined by this method.
virtual ArrayRef<std::pair<int, const char *>>
getSerializableTargetIndices() const {
return std::nullopt;
}
/// Decompose the machine operand's target flags into two values - the direct
/// target flag value and any of bit flags that are applied.
virtual std::pair<unsigned, unsigned>
decomposeMachineOperandsTargetFlags(unsigned /*TF*/) const {
return std::make_pair(0u, 0u);
}
/// Return an array that contains the direct target flag values and their
/// names.
///
/// MIR Serialization is able to serialize only the target flags that are
/// defined by this method.
virtual ArrayRef<std::pair<unsigned, const char *>>
getSerializableDirectMachineOperandTargetFlags() const {
return std::nullopt;
}
/// Return an array that contains the bitmask target flag values and their
/// names.
///
/// MIR Serialization is able to serialize only the target flags that are
/// defined by this method.
virtual ArrayRef<std::pair<unsigned, const char *>>
getSerializableBitmaskMachineOperandTargetFlags() const {
return std::nullopt;
}
/// Return an array that contains the MMO target flag values and their
/// names.
///
/// MIR Serialization is able to serialize only the MMO target flags that are
/// defined by this method.
virtual ArrayRef<std::pair<MachineMemOperand::Flags, const char *>>
getSerializableMachineMemOperandTargetFlags() const {
return std::nullopt;
}
/// Determines whether \p Inst is a tail call instruction. Override this
/// method on targets that do not properly set MCID::Return and MCID::Call on
/// tail call instructions."
virtual bool isTailCall(const MachineInstr &Inst) const {
return Inst.isReturn() && Inst.isCall();
}
/// True if the instruction is bound to the top of its basic block and no
/// other instructions shall be inserted before it. This can be implemented
/// to prevent register allocator to insert spills before such instructions.
virtual bool isBasicBlockPrologue(const MachineInstr &MI) const {
return false;
}
/// During PHI eleimination lets target to make necessary checks and
/// insert the copy to the PHI destination register in a target specific
/// manner.
virtual MachineInstr *createPHIDestinationCopy(
MachineBasicBlock &MBB, MachineBasicBlock::iterator InsPt,
const DebugLoc &DL, Register Src, Register Dst) const {
return BuildMI(MBB, InsPt, DL, get(TargetOpcode::COPY), Dst)
.addReg(Src);
}
/// During PHI eleimination lets target to make necessary checks and
/// insert the copy to the PHI destination register in a target specific
/// manner.
virtual MachineInstr *createPHISourceCopy(MachineBasicBlock &MBB,
MachineBasicBlock::iterator InsPt,
const DebugLoc &DL, Register Src,
unsigned SrcSubReg,
Register Dst) const {
return BuildMI(MBB, InsPt, DL, get(TargetOpcode::COPY), Dst)
.addReg(Src, 0, SrcSubReg);
}
/// Returns a \p outliner::OutlinedFunction struct containing target-specific
/// information for a set of outlining candidates. Returns std::nullopt if the
/// candidates are not suitable for outlining.
virtual std::optional<outliner::OutlinedFunction> getOutliningCandidateInfo(
std::vector<outliner::Candidate> &RepeatedSequenceLocs) const {
llvm_unreachable(
"Target didn't implement TargetInstrInfo::getOutliningCandidateInfo!");
}
/// Optional target hook to create the LLVM IR attributes for the outlined
/// function. If overridden, the overriding function must call the default
/// implementation.
virtual void mergeOutliningCandidateAttributes(
Function &F, std::vector<outliner::Candidate> &Candidates) const;
protected:
/// Target-dependent implementation for getOutliningTypeImpl.
virtual outliner::InstrType
getOutliningTypeImpl(MachineBasicBlock::iterator &MIT, unsigned Flags) const {
llvm_unreachable(
"Target didn't implement TargetInstrInfo::getOutliningTypeImpl!");
}
public:
/// Returns how or if \p MIT should be outlined. \p Flags is the
/// target-specific information returned by isMBBSafeToOutlineFrom.
outliner::InstrType
getOutliningType(MachineBasicBlock::iterator &MIT, unsigned Flags) const;
/// Optional target hook that returns true if \p MBB is safe to outline from,
/// and returns any target-specific information in \p Flags.
virtual bool isMBBSafeToOutlineFrom(MachineBasicBlock &MBB,
unsigned &Flags) const;
/// Optional target hook which partitions \p MBB into outlinable ranges for
/// instruction mapping purposes. Each range is defined by two iterators:
/// [start, end).
///
/// Ranges are expected to be ordered top-down. That is, ranges closer to the
/// top of the block should come before ranges closer to the end of the block.
///
/// Ranges cannot overlap.
///
/// If an entire block is mappable, then its range is [MBB.begin(), MBB.end())
///
/// All instructions not present in an outlinable range are considered
/// illegal.
virtual SmallVector<
std::pair<MachineBasicBlock::iterator, MachineBasicBlock::iterator>>
getOutlinableRanges(MachineBasicBlock &MBB, unsigned &Flags) const {
return {std::make_pair(MBB.begin(), MBB.end())};
}
/// Insert a custom frame for outlined functions.
virtual void buildOutlinedFrame(MachineBasicBlock &MBB, MachineFunction &MF,
const outliner::OutlinedFunction &OF) const {
llvm_unreachable(
"Target didn't implement TargetInstrInfo::buildOutlinedFrame!");
}
/// Insert a call to an outlined function into the program.
/// Returns an iterator to the spot where we inserted the call. This must be
/// implemented by the target.
virtual MachineBasicBlock::iterator
insertOutlinedCall(Module &M, MachineBasicBlock &MBB,
MachineBasicBlock::iterator &It, MachineFunction &MF,
outliner::Candidate &C) const {
llvm_unreachable(
"Target didn't implement TargetInstrInfo::insertOutlinedCall!");
}
/// Return true if the function can safely be outlined from.
/// A function \p MF is considered safe for outlining if an outlined function
/// produced from instructions in F will produce a program which produces the
/// same output for any set of given inputs.
virtual bool isFunctionSafeToOutlineFrom(MachineFunction &MF,
bool OutlineFromLinkOnceODRs) const {
llvm_unreachable("Target didn't implement "
"TargetInstrInfo::isFunctionSafeToOutlineFrom!");
}
/// Return true if the function should be outlined from by default.
virtual bool shouldOutlineFromFunctionByDefault(MachineFunction &MF) const {
return false;
}
/// Produce the expression describing the \p MI loading a value into
/// the physical register \p Reg. This hook should only be used with
/// \p MIs belonging to VReg-less functions.
virtual std::optional<ParamLoadedValue>
describeLoadedValue(const MachineInstr &MI, Register Reg) const;
/// Given the generic extension instruction \p ExtMI, returns true if this
/// extension is a likely candidate for being folded into an another
/// instruction.
virtual bool isExtendLikelyToBeFolded(MachineInstr &ExtMI,
MachineRegisterInfo &MRI) const {
return false;
}
/// Return MIR formatter to format/parse MIR operands. Target can override
/// this virtual function and return target specific MIR formatter.
virtual const MIRFormatter *getMIRFormatter() const {
if (!Formatter.get())
Formatter = std::make_unique<MIRFormatter>();
return Formatter.get();
}
/// Returns the target-specific default value for tail duplication.
/// This value will be used if the tail-dup-placement-threshold argument is
/// not provided.
virtual unsigned getTailDuplicateSize(CodeGenOpt::Level OptLevel) const {
return OptLevel >= CodeGenOpt::Aggressive ? 4 : 2;
}
/// Returns the callee operand from the given \p MI.
virtual const MachineOperand &getCalleeOperand(const MachineInstr &MI) const {
return MI.getOperand(0);
}
/// Return the uniformity behavior of the given instruction.
virtual InstructionUniformity
getInstructionUniformity(const MachineInstr &MI) const {
return InstructionUniformity::Default;
}
/// Returns true if the given \p MI defines a TargetIndex operand that can be
/// tracked by their offset, can have values, and can have debug info
/// associated with it. If so, sets \p Index and \p Offset of the target index
/// operand.
virtual bool isExplicitTargetIndexDef(const MachineInstr &MI, int &Index,
int64_t &Offset) const {
return false;
}
private:
mutable std::unique_ptr<MIRFormatter> Formatter;
unsigned CallFrameSetupOpcode, CallFrameDestroyOpcode;
unsigned CatchRetOpcode;
unsigned ReturnOpcode;
};
/// Provide DenseMapInfo for TargetInstrInfo::RegSubRegPair.
template <> struct DenseMapInfo<TargetInstrInfo::RegSubRegPair> {
using RegInfo = DenseMapInfo<unsigned>;
static inline TargetInstrInfo::RegSubRegPair getEmptyKey() {
return TargetInstrInfo::RegSubRegPair(RegInfo::getEmptyKey(),
RegInfo::getEmptyKey());
}
static inline TargetInstrInfo::RegSubRegPair getTombstoneKey() {
return TargetInstrInfo::RegSubRegPair(RegInfo::getTombstoneKey(),
RegInfo::getTombstoneKey());
}
/// Reuse getHashValue implementation from
/// std::pair<unsigned, unsigned>.
static unsigned getHashValue(const TargetInstrInfo::RegSubRegPair &Val) {
std::pair<unsigned, unsigned> PairVal = std::make_pair(Val.Reg, Val.SubReg);
return DenseMapInfo<std::pair<unsigned, unsigned>>::getHashValue(PairVal);
}
static bool isEqual(const TargetInstrInfo::RegSubRegPair &LHS,
const TargetInstrInfo::RegSubRegPair &RHS) {
return RegInfo::isEqual(LHS.Reg, RHS.Reg) &&
RegInfo::isEqual(LHS.SubReg, RHS.SubReg);
}
};
} // end namespace llvm
#endif // LLVM_CODEGEN_TARGETINSTRINFO_H
PK iwFZJ�� CodeGen/Register.hnu �[��� //===-- llvm/CodeGen/Register.h ---------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_REGISTER_H
#define LLVM_CODEGEN_REGISTER_H
#include "llvm/MC/MCRegister.h"
#include <cassert>
namespace llvm {
/// Wrapper class representing virtual and physical registers. Should be passed
/// by value.
class Register {
unsigned Reg;
public:
constexpr Register(unsigned Val = 0) : Reg(Val) {}
constexpr Register(MCRegister Val) : Reg(Val) {}
// Register numbers can represent physical registers, virtual registers, and
// sometimes stack slots. The unsigned values are divided into these ranges:
//
// 0 Not a register, can be used as a sentinel.
// [1;2^30) Physical registers assigned by TableGen.
// [2^30;2^31) Stack slots. (Rarely used.)
// [2^31;2^32) Virtual registers assigned by MachineRegisterInfo.
//
// Further sentinels can be allocated from the small negative integers.
// DenseMapInfo<unsigned> uses -1u and -2u.
static_assert(std::numeric_limits<decltype(Reg)>::max() >= 0xFFFFFFFF,
"Reg isn't large enough to hold full range.");
/// isStackSlot - Sometimes it is useful the be able to store a non-negative
/// frame index in a variable that normally holds a register. isStackSlot()
/// returns true if Reg is in the range used for stack slots.
///
/// FIXME: remove in favor of member.
static constexpr bool isStackSlot(unsigned Reg) {
return MCRegister::isStackSlot(Reg);
}
/// Return true if this is a stack slot.
constexpr bool isStack() const { return MCRegister::isStackSlot(Reg); }
/// Compute the frame index from a register value representing a stack slot.
static int stackSlot2Index(Register Reg) {
assert(Reg.isStack() && "Not a stack slot");
return int(Reg - MCRegister::FirstStackSlot);
}
/// Convert a non-negative frame index to a stack slot register value.
static Register index2StackSlot(int FI) {
assert(FI >= 0 && "Cannot hold a negative frame index.");
return Register(FI + MCRegister::FirstStackSlot);
}
/// Return true if the specified register number is in
/// the physical register namespace.
static constexpr bool isPhysicalRegister(unsigned Reg) {
return MCRegister::isPhysicalRegister(Reg);
}
/// Return true if the specified register number is in
/// the virtual register namespace.
static constexpr bool isVirtualRegister(unsigned Reg) {
return Reg & MCRegister::VirtualRegFlag;
}
/// Convert a virtual register number to a 0-based index.
/// The first virtual register in a function will get the index 0.
static unsigned virtReg2Index(Register Reg) {
assert(Reg.isVirtual() && "Not a virtual register");
return Reg & ~MCRegister::VirtualRegFlag;
}
/// Convert a 0-based index to a virtual register number.
/// This is the inverse operation of VirtReg2IndexFunctor below.
static Register index2VirtReg(unsigned Index) {
assert(Index < (1u << 31) && "Index too large for virtual register range.");
return Index | MCRegister::VirtualRegFlag;
}
/// Return true if the specified register number is in the virtual register
/// namespace.
constexpr bool isVirtual() const { return isVirtualRegister(Reg); }
/// Return true if the specified register number is in the physical register
/// namespace.
constexpr bool isPhysical() const { return isPhysicalRegister(Reg); }
/// Convert a virtual register number to a 0-based index. The first virtual
/// register in a function will get the index 0.
unsigned virtRegIndex() const { return virtReg2Index(Reg); }
constexpr operator unsigned() const { return Reg; }
constexpr unsigned id() const { return Reg; }
constexpr operator MCRegister() const { return MCRegister(Reg); }
/// Utility to check-convert this value to a MCRegister. The caller is
/// expected to have already validated that this Register is, indeed,
/// physical.
MCRegister asMCReg() const {
assert(Reg == MCRegister::NoRegister ||
MCRegister::isPhysicalRegister(Reg));
return MCRegister(Reg);
}
constexpr bool isValid() const { return Reg != MCRegister::NoRegister; }
/// Comparisons between register objects
constexpr bool operator==(const Register &Other) const {
return Reg == Other.Reg;
}
constexpr bool operator!=(const Register &Other) const {
return Reg != Other.Reg;
}
constexpr bool operator==(const MCRegister &Other) const {
return Reg == Other.id();
}
constexpr bool operator!=(const MCRegister &Other) const {
return Reg != Other.id();
}
/// Comparisons against register constants. E.g.
/// * R == AArch64::WZR
/// * R == 0
/// * R == VirtRegMap::NO_PHYS_REG
constexpr bool operator==(unsigned Other) const { return Reg == Other; }
constexpr bool operator!=(unsigned Other) const { return Reg != Other; }
constexpr bool operator==(int Other) const { return Reg == unsigned(Other); }
constexpr bool operator!=(int Other) const { return Reg != unsigned(Other); }
// MSVC requires that we explicitly declare these two as well.
constexpr bool operator==(MCPhysReg Other) const {
return Reg == unsigned(Other);
}
constexpr bool operator!=(MCPhysReg Other) const {
return Reg != unsigned(Other);
}
};
// Provide DenseMapInfo for Register
template <> struct DenseMapInfo<Register> {
static inline unsigned getEmptyKey() {
return DenseMapInfo<unsigned>::getEmptyKey();
}
static inline unsigned getTombstoneKey() {
return DenseMapInfo<unsigned>::getTombstoneKey();
}
static unsigned getHashValue(const Register &Val) {
return DenseMapInfo<unsigned>::getHashValue(Val.id());
}
static bool isEqual(const Register &LHS, const Register &RHS) {
return DenseMapInfo<unsigned>::isEqual(LHS.id(), RHS.id());
}
};
} // namespace llvm
#endif // LLVM_CODEGEN_REGISTER_H
PK iwFZp��5
5
CodeGen/MacroFusion.hnu �[��� //===- MacroFusion.h - Macro Fusion -----------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file This file contains the definition of the DAG scheduling mutation to
/// pair instructions back to back.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACROFUSION_H
#define LLVM_CODEGEN_MACROFUSION_H
#include <functional>
#include <memory>
namespace llvm {
class MachineInstr;
class ScheduleDAGMutation;
class TargetInstrInfo;
class TargetSubtargetInfo;
class ScheduleDAGInstrs;
class SUnit;
/// Check if the instr pair, FirstMI and SecondMI, should be fused
/// together. Given SecondMI, when FirstMI is unspecified, then check if
/// SecondMI may be part of a fused pair at all.
using ShouldSchedulePredTy = std::function<bool(const TargetInstrInfo &TII,
const TargetSubtargetInfo &TSI,
const MachineInstr *FirstMI,
const MachineInstr &SecondMI)>;
/// Checks if the number of cluster edges between SU and its predecessors is
/// less than FuseLimit
bool hasLessThanNumFused(const SUnit &SU, unsigned FuseLimit);
/// Create an artificial edge between FirstSU and SecondSU.
/// Make data dependencies from the FirstSU also dependent on the SecondSU to
/// prevent them from being scheduled between the FirstSU and the SecondSU
/// and vice-versa.
/// Fusing more than 2 instructions is not currently supported.
bool fuseInstructionPair(ScheduleDAGInstrs &DAG, SUnit &FirstSU,
SUnit &SecondSU);
/// Create a DAG scheduling mutation to pair instructions back to back
/// for instructions that benefit according to the target-specific
/// shouldScheduleAdjacent predicate function.
std::unique_ptr<ScheduleDAGMutation>
createMacroFusionDAGMutation(ShouldSchedulePredTy shouldScheduleAdjacent);
/// Create a DAG scheduling mutation to pair branch instructions with one
/// of their predecessors back to back for instructions that benefit according
/// to the target-specific shouldScheduleAdjacent predicate function.
std::unique_ptr<ScheduleDAGMutation>
createBranchMacroFusionDAGMutation(ShouldSchedulePredTy shouldScheduleAdjacent);
} // end namespace llvm
#endif // LLVM_CODEGEN_MACROFUSION_H
PK iwFZ5i�� � CodeGen/MachineRegionInfo.hnu �[��� //===- llvm/CodeGen/MachineRegionInfo.h -------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINEREGIONINFO_H
#define LLVM_CODEGEN_MACHINEREGIONINFO_H
#include "llvm/ADT/DepthFirstIterator.h"
#include "llvm/Analysis/RegionInfo.h"
#include "llvm/Analysis/RegionIterator.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineDominanceFrontier.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include <cassert>
namespace llvm {
class MachinePostDominatorTree;
class MachineRegion;
class MachineRegionNode;
class MachineRegionInfo;
template <> struct RegionTraits<MachineFunction> {
using FuncT = MachineFunction;
using BlockT = MachineBasicBlock;
using RegionT = MachineRegion;
using RegionNodeT = MachineRegionNode;
using RegionInfoT = MachineRegionInfo;
using DomTreeT = MachineDominatorTree;
using DomTreeNodeT = MachineDomTreeNode;
using PostDomTreeT = MachinePostDominatorTree;
using DomFrontierT = MachineDominanceFrontier;
using InstT = MachineInstr;
using LoopT = MachineLoop;
using LoopInfoT = MachineLoopInfo;
static unsigned getNumSuccessors(MachineBasicBlock *BB) {
return BB->succ_size();
}
};
class MachineRegionNode : public RegionNodeBase<RegionTraits<MachineFunction>> {
public:
inline MachineRegionNode(MachineRegion *Parent, MachineBasicBlock *Entry,
bool isSubRegion = false)
: RegionNodeBase<RegionTraits<MachineFunction>>(Parent, Entry,
isSubRegion) {}
bool operator==(const MachineRegion &RN) const {
return this == reinterpret_cast<const MachineRegionNode *>(&RN);
}
};
class MachineRegion : public RegionBase<RegionTraits<MachineFunction>> {
public:
MachineRegion(MachineBasicBlock *Entry, MachineBasicBlock *Exit,
MachineRegionInfo *RI, MachineDominatorTree *DT,
MachineRegion *Parent = nullptr);
~MachineRegion();
bool operator==(const MachineRegionNode &RN) const {
return &RN == reinterpret_cast<const MachineRegionNode *>(this);
}
};
class MachineRegionInfo : public RegionInfoBase<RegionTraits<MachineFunction>> {
public:
explicit MachineRegionInfo();
~MachineRegionInfo() override;
// updateStatistics - Update statistic about created regions.
void updateStatistics(MachineRegion *R) final;
void recalculate(MachineFunction &F, MachineDominatorTree *DT,
MachinePostDominatorTree *PDT, MachineDominanceFrontier *DF);
};
class MachineRegionInfoPass : public MachineFunctionPass {
MachineRegionInfo RI;
public:
static char ID;
explicit MachineRegionInfoPass();
~MachineRegionInfoPass() override;
MachineRegionInfo &getRegionInfo() { return RI; }
const MachineRegionInfo &getRegionInfo() const { return RI; }
/// @name MachineFunctionPass interface
//@{
bool runOnMachineFunction(MachineFunction &F) override;
void releaseMemory() override;
void verifyAnalysis() const override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
void print(raw_ostream &OS, const Module *) const override;
void dump() const;
//@}
};
template <>
template <>
inline MachineBasicBlock *
RegionNodeBase<RegionTraits<MachineFunction>>::getNodeAs<MachineBasicBlock>()
const {
assert(!isSubRegion() && "This is not a MachineBasicBlock RegionNode!");
return getEntry();
}
template <>
template <>
inline MachineRegion *
RegionNodeBase<RegionTraits<MachineFunction>>::getNodeAs<MachineRegion>()
const {
assert(isSubRegion() && "This is not a subregion RegionNode!");
auto Unconst =
const_cast<RegionNodeBase<RegionTraits<MachineFunction>> *>(this);
return reinterpret_cast<MachineRegion *>(Unconst);
}
RegionNodeGraphTraits(MachineRegionNode, MachineBasicBlock, MachineRegion);
RegionNodeGraphTraits(const MachineRegionNode, MachineBasicBlock,
MachineRegion);
RegionGraphTraits(MachineRegion, MachineRegionNode);
RegionGraphTraits(const MachineRegion, const MachineRegionNode);
template <>
struct GraphTraits<MachineRegionInfo *>
: public GraphTraits<FlatIt<MachineRegionNode *>> {
using nodes_iterator = df_iterator<NodeRef, df_iterator_default_set<NodeRef>,
false, GraphTraits<FlatIt<NodeRef>>>;
static NodeRef getEntryNode(MachineRegionInfo *RI) {
return GraphTraits<FlatIt<MachineRegion *>>::getEntryNode(
RI->getTopLevelRegion());
}
static nodes_iterator nodes_begin(MachineRegionInfo *RI) {
return nodes_iterator::begin(getEntryNode(RI));
}
static nodes_iterator nodes_end(MachineRegionInfo *RI) {
return nodes_iterator::end(getEntryNode(RI));
}
};
template <>
struct GraphTraits<MachineRegionInfoPass *>
: public GraphTraits<MachineRegionInfo *> {
using nodes_iterator = df_iterator<NodeRef, df_iterator_default_set<NodeRef>,
false, GraphTraits<FlatIt<NodeRef>>>;
static NodeRef getEntryNode(MachineRegionInfoPass *RI) {
return GraphTraits<MachineRegionInfo *>::getEntryNode(&RI->getRegionInfo());
}
static nodes_iterator nodes_begin(MachineRegionInfoPass *RI) {
return GraphTraits<MachineRegionInfo *>::nodes_begin(&RI->getRegionInfo());
}
static nodes_iterator nodes_end(MachineRegionInfoPass *RI) {
return GraphTraits<MachineRegionInfo *>::nodes_end(&RI->getRegionInfo());
}
};
extern template class RegionBase<RegionTraits<MachineFunction>>;
extern template class RegionNodeBase<RegionTraits<MachineFunction>>;
extern template class RegionInfoBase<RegionTraits<MachineFunction>>;
} // end namespace llvm
#endif // LLVM_CODEGEN_MACHINEREGIONINFO_H
PK iwFZ�0Q�H H CodeGen/SDNodeProperties.tdnu �[��� //===- SDNodeProperties.td - Common code for DAG isels -----*- tablegen -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
class SDNodeProperty;
// Selection DAG Pattern Operations
class SDPatternOperator {
list<SDNodeProperty> Properties = [];
}
//===----------------------------------------------------------------------===//
// Selection DAG Node Properties.
//
// Note: These are hard coded into tblgen.
//
def SDNPCommutative : SDNodeProperty; // X op Y == Y op X
def SDNPAssociative : SDNodeProperty; // (X op Y) op Z == X op (Y op Z)
def SDNPHasChain : SDNodeProperty; // R/W chain operand and result
def SDNPOutGlue : SDNodeProperty; // Write a flag result
def SDNPInGlue : SDNodeProperty; // Read a flag operand
def SDNPOptInGlue : SDNodeProperty; // Optionally read a flag operand
def SDNPMayStore : SDNodeProperty; // May write to memory, sets 'mayStore'.
def SDNPMayLoad : SDNodeProperty; // May read memory, sets 'mayLoad'.
def SDNPSideEffect : SDNodeProperty; // Sets 'HasUnmodelledSideEffects'.
def SDNPMemOperand : SDNodeProperty; // Touches memory, has assoc MemOperand
def SDNPVariadic : SDNodeProperty; // Node has variable arguments.
def SDNPWantRoot : SDNodeProperty; // ComplexPattern gets the root of match
def SDNPWantParent : SDNodeProperty; // ComplexPattern gets the parent
PK iwFZ;ȡ�� � ! CodeGen/ExpandVectorPredication.hnu �[��� //===-- ExpandVectorPredication.h - Expand vector predication ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_EXPANDVECTORPREDICATION_H
#define LLVM_CODEGEN_EXPANDVECTORPREDICATION_H
#include "llvm/IR/PassManager.h"
namespace llvm {
class ExpandVectorPredicationPass
: public PassInfoMixin<ExpandVectorPredicationPass> {
public:
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_EXPANDVECTORPREDICATION_H
PK iwFZ���9 9 CodeGen/RuntimeLibcalls.hnu �[��� //===-- CodeGen/RuntimeLibcalls.h - Runtime Library Calls -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the enum representing the list of runtime library calls
// the backend may emit during code generation, and also some helper functions.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_RUNTIMELIBCALLS_H
#define LLVM_CODEGEN_RUNTIMELIBCALLS_H
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/Support/AtomicOrdering.h"
namespace llvm {
namespace RTLIB {
/// RTLIB::Libcall enum - This enum defines all of the runtime library calls
/// the backend can emit. The various long double types cannot be merged,
/// because 80-bit library functions use "xf" and 128-bit use "tf".
///
/// When adding PPCF128 functions here, note that their names generally need
/// to be overridden for Darwin with the xxx$LDBL128 form. See
/// PPCISelLowering.cpp.
///
enum Libcall {
#define HANDLE_LIBCALL(code, name) code,
#include "llvm/IR/RuntimeLibcalls.def"
#undef HANDLE_LIBCALL
};
/// GetFPLibCall - Helper to return the right libcall for the given floating
/// point type, or UNKNOWN_LIBCALL if there is none.
Libcall getFPLibCall(EVT VT,
Libcall Call_F32,
Libcall Call_F64,
Libcall Call_F80,
Libcall Call_F128,
Libcall Call_PPCF128);
/// getFPEXT - Return the FPEXT_*_* value for the given types, or
/// UNKNOWN_LIBCALL if there is none.
Libcall getFPEXT(EVT OpVT, EVT RetVT);
/// getFPROUND - Return the FPROUND_*_* value for the given types, or
/// UNKNOWN_LIBCALL if there is none.
Libcall getFPROUND(EVT OpVT, EVT RetVT);
/// getFPTOSINT - Return the FPTOSINT_*_* value for the given types, or
/// UNKNOWN_LIBCALL if there is none.
Libcall getFPTOSINT(EVT OpVT, EVT RetVT);
/// getFPTOUINT - Return the FPTOUINT_*_* value for the given types, or
/// UNKNOWN_LIBCALL if there is none.
Libcall getFPTOUINT(EVT OpVT, EVT RetVT);
/// getSINTTOFP - Return the SINTTOFP_*_* value for the given types, or
/// UNKNOWN_LIBCALL if there is none.
Libcall getSINTTOFP(EVT OpVT, EVT RetVT);
/// getUINTTOFP - Return the UINTTOFP_*_* value for the given types, or
/// UNKNOWN_LIBCALL if there is none.
Libcall getUINTTOFP(EVT OpVT, EVT RetVT);
/// getPOWI - Return the POWI_* value for the given types, or
/// UNKNOWN_LIBCALL if there is none.
Libcall getPOWI(EVT RetVT);
/// getLDEXP - Return the LDEXP_* value for the given types, or
/// UNKNOWN_LIBCALL if there is none.
Libcall getLDEXP(EVT RetVT);
/// getFREXP - Return the FREXP_* value for the given types, or
/// UNKNOWN_LIBCALL if there is none.
Libcall getFREXP(EVT RetVT);
/// Return the SYNC_FETCH_AND_* value for the given opcode and type, or
/// UNKNOWN_LIBCALL if there is none.
Libcall getSYNC(unsigned Opc, MVT VT);
/// Return the outline atomics value for the given opcode, atomic ordering
/// and type, or UNKNOWN_LIBCALL if there is none.
Libcall getOUTLINE_ATOMIC(unsigned Opc, AtomicOrdering Order, MVT VT);
/// getMEMCPY_ELEMENT_UNORDERED_ATOMIC - Return
/// MEMCPY_ELEMENT_UNORDERED_ATOMIC_* value for the given element size or
/// UNKNOW_LIBCALL if there is none.
Libcall getMEMCPY_ELEMENT_UNORDERED_ATOMIC(uint64_t ElementSize);
/// getMEMMOVE_ELEMENT_UNORDERED_ATOMIC - Return
/// MEMMOVE_ELEMENT_UNORDERED_ATOMIC_* value for the given element size or
/// UNKNOW_LIBCALL if there is none.
Libcall getMEMMOVE_ELEMENT_UNORDERED_ATOMIC(uint64_t ElementSize);
/// getMEMSET_ELEMENT_UNORDERED_ATOMIC - Return
/// MEMSET_ELEMENT_UNORDERED_ATOMIC_* value for the given element size or
/// UNKNOW_LIBCALL if there is none.
Libcall getMEMSET_ELEMENT_UNORDERED_ATOMIC(uint64_t ElementSize);
}
}
#endif
PK iwFZ$��Tk` k` CodeGen/SlotIndexes.hnu �[��� //===- llvm/CodeGen/SlotIndexes.h - Slot indexes representation -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements SlotIndex and related classes. The purpose of SlotIndex
// is to describe a position at which a register can become live, or cease to
// be live.
//
// SlotIndex is mostly a proxy for entries of the SlotIndexList, a class which
// is held is LiveIntervals and provides the real numbering. This allows
// LiveIntervals to perform largely transparent renumbering.
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_SLOTINDEXES_H
#define LLVM_CODEGEN_SLOTINDEXES_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/IntervalMap.h"
#include "llvm/ADT/PointerIntPair.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/ilist.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBundle.h"
#include "llvm/Support/Allocator.h"
#include <algorithm>
#include <cassert>
#include <iterator>
#include <utility>
namespace llvm {
class raw_ostream;
/// This class represents an entry in the slot index list held in the
/// SlotIndexes pass. It should not be used directly. See the
/// SlotIndex & SlotIndexes classes for the public interface to this
/// information.
class IndexListEntry : public ilist_node<IndexListEntry> {
MachineInstr *mi;
unsigned index;
public:
IndexListEntry(MachineInstr *mi, unsigned index) : mi(mi), index(index) {}
MachineInstr* getInstr() const { return mi; }
void setInstr(MachineInstr *mi) {
this->mi = mi;
}
unsigned getIndex() const { return index; }
void setIndex(unsigned index) {
this->index = index;
}
#ifdef EXPENSIVE_CHECKS
// When EXPENSIVE_CHECKS is defined, "erased" index list entries will
// actually be moved to a "graveyard" list, and have their pointers
// poisoned, so that dangling SlotIndex access can be reliably detected.
void setPoison() {
intptr_t tmp = reinterpret_cast<intptr_t>(mi);
assert(((tmp & 0x1) == 0x0) && "Pointer already poisoned?");
tmp |= 0x1;
mi = reinterpret_cast<MachineInstr*>(tmp);
}
bool isPoisoned() const { return (reinterpret_cast<intptr_t>(mi) & 0x1) == 0x1; }
#endif // EXPENSIVE_CHECKS
};
template <>
struct ilist_alloc_traits<IndexListEntry>
: public ilist_noalloc_traits<IndexListEntry> {};
/// SlotIndex - An opaque wrapper around machine indexes.
class SlotIndex {
friend class SlotIndexes;
enum Slot {
/// Basic block boundary. Used for live ranges entering and leaving a
/// block without being live in the layout neighbor. Also used as the
/// def slot of PHI-defs.
Slot_Block,
/// Early-clobber register use/def slot. A live range defined at
/// Slot_EarlyClobber interferes with normal live ranges killed at
/// Slot_Register. Also used as the kill slot for live ranges tied to an
/// early-clobber def.
Slot_EarlyClobber,
/// Normal register use/def slot. Normal instructions kill and define
/// register live ranges at this slot.
Slot_Register,
/// Dead def kill point. Kill slot for a live range that is defined by
/// the same instruction (Slot_Register or Slot_EarlyClobber), but isn't
/// used anywhere.
Slot_Dead,
Slot_Count
};
PointerIntPair<IndexListEntry*, 2, unsigned> lie;
IndexListEntry* listEntry() const {
assert(isValid() && "Attempt to compare reserved index.");
#ifdef EXPENSIVE_CHECKS
assert(!lie.getPointer()->isPoisoned() &&
"Attempt to access deleted list-entry.");
#endif // EXPENSIVE_CHECKS
return lie.getPointer();
}
unsigned getIndex() const {
return listEntry()->getIndex() | getSlot();
}
/// Returns the slot for this SlotIndex.
Slot getSlot() const {
return static_cast<Slot>(lie.getInt());
}
public:
enum {
/// The default distance between instructions as returned by distance().
/// This may vary as instructions are inserted and removed.
InstrDist = 4 * Slot_Count
};
/// Construct an invalid index.
SlotIndex() = default;
// Creates a SlotIndex from an IndexListEntry and a slot. Generally should
// not be used. This method is only public to facilitate writing certain
// unit tests.
SlotIndex(IndexListEntry *entry, unsigned slot) : lie(entry, slot) {}
// Construct a new slot index from the given one, and set the slot.
SlotIndex(const SlotIndex &li, Slot s) : lie(li.listEntry(), unsigned(s)) {
assert(lie.getPointer() != nullptr &&
"Attempt to construct index with 0 pointer.");
}
/// Returns true if this is a valid index. Invalid indices do
/// not point into an index table, and cannot be compared.
bool isValid() const {
return lie.getPointer();
}
/// Return true for a valid index.
explicit operator bool() const { return isValid(); }
/// Print this index to the given raw_ostream.
void print(raw_ostream &os) const;
/// Dump this index to stderr.
void dump() const;
/// Compare two SlotIndex objects for equality.
bool operator==(SlotIndex other) const {
return lie == other.lie;
}
/// Compare two SlotIndex objects for inequality.
bool operator!=(SlotIndex other) const {
return lie != other.lie;
}
/// Compare two SlotIndex objects. Return true if the first index
/// is strictly lower than the second.
bool operator<(SlotIndex other) const {
return getIndex() < other.getIndex();
}
/// Compare two SlotIndex objects. Return true if the first index
/// is lower than, or equal to, the second.
bool operator<=(SlotIndex other) const {
return getIndex() <= other.getIndex();
}
/// Compare two SlotIndex objects. Return true if the first index
/// is greater than the second.
bool operator>(SlotIndex other) const {
return getIndex() > other.getIndex();
}
/// Compare two SlotIndex objects. Return true if the first index
/// is greater than, or equal to, the second.
bool operator>=(SlotIndex other) const {
return getIndex() >= other.getIndex();
}
/// isSameInstr - Return true if A and B refer to the same instruction.
static bool isSameInstr(SlotIndex A, SlotIndex B) {
return A.lie.getPointer() == B.lie.getPointer();
}
/// isEarlierInstr - Return true if A refers to an instruction earlier than
/// B. This is equivalent to A < B && !isSameInstr(A, B).
static bool isEarlierInstr(SlotIndex A, SlotIndex B) {
return A.listEntry()->getIndex() < B.listEntry()->getIndex();
}
/// Return true if A refers to the same instruction as B or an earlier one.
/// This is equivalent to !isEarlierInstr(B, A).
static bool isEarlierEqualInstr(SlotIndex A, SlotIndex B) {
return !isEarlierInstr(B, A);
}
/// Return the distance from this index to the given one.
int distance(SlotIndex other) const {
return other.getIndex() - getIndex();
}
/// Return the scaled distance from this index to the given one, where all
/// slots on the same instruction have zero distance, assuming that the slot
/// indices are packed as densely as possible. There are normally gaps
/// between instructions, so this assumption often doesn't hold. This
/// results in this function often returning a value greater than the actual
/// instruction distance.
int getApproxInstrDistance(SlotIndex other) const {
return (other.listEntry()->getIndex() - listEntry()->getIndex())
/ Slot_Count;
}
/// isBlock - Returns true if this is a block boundary slot.
bool isBlock() const { return getSlot() == Slot_Block; }
/// isEarlyClobber - Returns true if this is an early-clobber slot.
bool isEarlyClobber() const { return getSlot() == Slot_EarlyClobber; }
/// isRegister - Returns true if this is a normal register use/def slot.
/// Note that early-clobber slots may also be used for uses and defs.
bool isRegister() const { return getSlot() == Slot_Register; }
/// isDead - Returns true if this is a dead def kill slot.
bool isDead() const { return getSlot() == Slot_Dead; }
/// Returns the base index for associated with this index. The base index
/// is the one associated with the Slot_Block slot for the instruction
/// pointed to by this index.
SlotIndex getBaseIndex() const {
return SlotIndex(listEntry(), Slot_Block);
}
/// Returns the boundary index for associated with this index. The boundary
/// index is the one associated with the Slot_Block slot for the instruction
/// pointed to by this index.
SlotIndex getBoundaryIndex() const {
return SlotIndex(listEntry(), Slot_Dead);
}
/// Returns the register use/def slot in the current instruction for a
/// normal or early-clobber def.
SlotIndex getRegSlot(bool EC = false) const {
return SlotIndex(listEntry(), EC ? Slot_EarlyClobber : Slot_Register);
}
/// Returns the dead def kill slot for the current instruction.
SlotIndex getDeadSlot() const {
return SlotIndex(listEntry(), Slot_Dead);
}
/// Returns the next slot in the index list. This could be either the
/// next slot for the instruction pointed to by this index or, if this
/// index is a STORE, the first slot for the next instruction.
/// WARNING: This method is considerably more expensive than the methods
/// that return specific slots (getUseIndex(), etc). If you can - please
/// use one of those methods.
SlotIndex getNextSlot() const {
Slot s = getSlot();
if (s == Slot_Dead) {
return SlotIndex(&*++listEntry()->getIterator(), Slot_Block);
}
return SlotIndex(listEntry(), s + 1);
}
/// Returns the next index. This is the index corresponding to the this
/// index's slot, but for the next instruction.
SlotIndex getNextIndex() const {
return SlotIndex(&*++listEntry()->getIterator(), getSlot());
}
/// Returns the previous slot in the index list. This could be either the
/// previous slot for the instruction pointed to by this index or, if this
/// index is a Slot_Block, the last slot for the previous instruction.
/// WARNING: This method is considerably more expensive than the methods
/// that return specific slots (getUseIndex(), etc). If you can - please
/// use one of those methods.
SlotIndex getPrevSlot() const {
Slot s = getSlot();
if (s == Slot_Block) {
return SlotIndex(&*--listEntry()->getIterator(), Slot_Dead);
}
return SlotIndex(listEntry(), s - 1);
}
/// Returns the previous index. This is the index corresponding to this
/// index's slot, but for the previous instruction.
SlotIndex getPrevIndex() const {
return SlotIndex(&*--listEntry()->getIterator(), getSlot());
}
};
inline raw_ostream& operator<<(raw_ostream &os, SlotIndex li) {
li.print(os);
return os;
}
using IdxMBBPair = std::pair<SlotIndex, MachineBasicBlock *>;
/// SlotIndexes pass.
///
/// This pass assigns indexes to each instruction.
class SlotIndexes : public MachineFunctionPass {
private:
// IndexListEntry allocator.
BumpPtrAllocator ileAllocator;
using IndexList = ilist<IndexListEntry>;
IndexList indexList;
MachineFunction *mf = nullptr;
using Mi2IndexMap = DenseMap<const MachineInstr *, SlotIndex>;
Mi2IndexMap mi2iMap;
/// MBBRanges - Map MBB number to (start, stop) indexes.
SmallVector<std::pair<SlotIndex, SlotIndex>, 8> MBBRanges;
/// Idx2MBBMap - Sorted list of pairs of index of first instruction
/// and MBB id.
SmallVector<IdxMBBPair, 8> idx2MBBMap;
IndexListEntry* createEntry(MachineInstr *mi, unsigned index) {
IndexListEntry *entry =
static_cast<IndexListEntry *>(ileAllocator.Allocate(
sizeof(IndexListEntry), alignof(IndexListEntry)));
new (entry) IndexListEntry(mi, index);
return entry;
}
/// Renumber locally after inserting curItr.
void renumberIndexes(IndexList::iterator curItr);
public:
static char ID;
SlotIndexes();
~SlotIndexes() override;
void getAnalysisUsage(AnalysisUsage &au) const override;
void releaseMemory() override;
bool runOnMachineFunction(MachineFunction &fn) override;
/// Dump the indexes.
void dump() const;
/// Repair indexes after adding and removing instructions.
void repairIndexesInRange(MachineBasicBlock *MBB,
MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End);
/// Returns the zero index for this analysis.
SlotIndex getZeroIndex() {
assert(indexList.front().getIndex() == 0 && "First index is not 0?");
return SlotIndex(&indexList.front(), 0);
}
/// Returns the base index of the last slot in this analysis.
SlotIndex getLastIndex() {
return SlotIndex(&indexList.back(), 0);
}
/// Returns true if the given machine instr is mapped to an index,
/// otherwise returns false.
bool hasIndex(const MachineInstr &instr) const {
return mi2iMap.count(&instr);
}
/// Returns the base index for the given instruction.
SlotIndex getInstructionIndex(const MachineInstr &MI,
bool IgnoreBundle = false) const {
// Instructions inside a bundle have the same number as the bundle itself.
auto BundleStart = getBundleStart(MI.getIterator());
auto BundleEnd = getBundleEnd(MI.getIterator());
// Use the first non-debug instruction in the bundle to get SlotIndex.
const MachineInstr &BundleNonDebug =
IgnoreBundle ? MI
: *skipDebugInstructionsForward(BundleStart, BundleEnd);
assert(!BundleNonDebug.isDebugInstr() &&
"Could not use a debug instruction to query mi2iMap.");
Mi2IndexMap::const_iterator itr = mi2iMap.find(&BundleNonDebug);
assert(itr != mi2iMap.end() && "Instruction not found in maps.");
return itr->second;
}
/// Returns the instruction for the given index, or null if the given
/// index has no instruction associated with it.
MachineInstr* getInstructionFromIndex(SlotIndex index) const {
return index.isValid() ? index.listEntry()->getInstr() : nullptr;
}
/// Returns the next non-null index, if one exists.
/// Otherwise returns getLastIndex().
SlotIndex getNextNonNullIndex(SlotIndex Index) {
IndexList::iterator I = Index.listEntry()->getIterator();
IndexList::iterator E = indexList.end();
while (++I != E)
if (I->getInstr())
return SlotIndex(&*I, Index.getSlot());
// We reached the end of the function.
return getLastIndex();
}
/// getIndexBefore - Returns the index of the last indexed instruction
/// before MI, or the start index of its basic block.
/// MI is not required to have an index.
SlotIndex getIndexBefore(const MachineInstr &MI) const {
const MachineBasicBlock *MBB = MI.getParent();
assert(MBB && "MI must be inserted in a basic block");
MachineBasicBlock::const_iterator I = MI, B = MBB->begin();
while (true) {
if (I == B)
return getMBBStartIdx(MBB);
--I;
Mi2IndexMap::const_iterator MapItr = mi2iMap.find(&*I);
if (MapItr != mi2iMap.end())
return MapItr->second;
}
}
/// getIndexAfter - Returns the index of the first indexed instruction
/// after MI, or the end index of its basic block.
/// MI is not required to have an index.
SlotIndex getIndexAfter(const MachineInstr &MI) const {
const MachineBasicBlock *MBB = MI.getParent();
assert(MBB && "MI must be inserted in a basic block");
MachineBasicBlock::const_iterator I = MI, E = MBB->end();
while (true) {
++I;
if (I == E)
return getMBBEndIdx(MBB);
Mi2IndexMap::const_iterator MapItr = mi2iMap.find(&*I);
if (MapItr != mi2iMap.end())
return MapItr->second;
}
}
/// Return the (start,end) range of the given basic block number.
const std::pair<SlotIndex, SlotIndex> &
getMBBRange(unsigned Num) const {
return MBBRanges[Num];
}
/// Return the (start,end) range of the given basic block.
const std::pair<SlotIndex, SlotIndex> &
getMBBRange(const MachineBasicBlock *MBB) const {
return getMBBRange(MBB->getNumber());
}
/// Returns the first index in the given basic block number.
SlotIndex getMBBStartIdx(unsigned Num) const {
return getMBBRange(Num).first;
}
/// Returns the first index in the given basic block.
SlotIndex getMBBStartIdx(const MachineBasicBlock *mbb) const {
return getMBBRange(mbb).first;
}
/// Returns the last index in the given basic block number.
SlotIndex getMBBEndIdx(unsigned Num) const {
return getMBBRange(Num).second;
}
/// Returns the last index in the given basic block.
SlotIndex getMBBEndIdx(const MachineBasicBlock *mbb) const {
return getMBBRange(mbb).second;
}
/// Iterator over the idx2MBBMap (sorted pairs of slot index of basic block
/// begin and basic block)
using MBBIndexIterator = SmallVectorImpl<IdxMBBPair>::const_iterator;
/// Move iterator to the next IdxMBBPair where the SlotIndex is greater or
/// equal to \p To.
MBBIndexIterator advanceMBBIndex(MBBIndexIterator I, SlotIndex To) const {
return std::partition_point(
I, idx2MBBMap.end(),
[=](const IdxMBBPair &IM) { return IM.first < To; });
}
/// Get an iterator pointing to the IdxMBBPair with the biggest SlotIndex
/// that is greater or equal to \p Idx.
MBBIndexIterator findMBBIndex(SlotIndex Idx) const {
return advanceMBBIndex(idx2MBBMap.begin(), Idx);
}
/// Returns an iterator for the begin of the idx2MBBMap.
MBBIndexIterator MBBIndexBegin() const {
return idx2MBBMap.begin();
}
/// Return an iterator for the end of the idx2MBBMap.
MBBIndexIterator MBBIndexEnd() const {
return idx2MBBMap.end();
}
/// Returns the basic block which the given index falls in.
MachineBasicBlock* getMBBFromIndex(SlotIndex index) const {
if (MachineInstr *MI = getInstructionFromIndex(index))
return MI->getParent();
MBBIndexIterator I = findMBBIndex(index);
// Take the pair containing the index
MBBIndexIterator J =
((I != MBBIndexEnd() && I->first > index) ||
(I == MBBIndexEnd() && !idx2MBBMap.empty())) ? std::prev(I) : I;
assert(J != MBBIndexEnd() && J->first <= index &&
index < getMBBEndIdx(J->second) &&
"index does not correspond to an MBB");
return J->second;
}
/// Insert the given machine instruction into the mapping. Returns the
/// assigned index.
/// If Late is set and there are null indexes between mi's neighboring
/// instructions, create the new index after the null indexes instead of
/// before them.
SlotIndex insertMachineInstrInMaps(MachineInstr &MI, bool Late = false) {
assert(!MI.isInsideBundle() &&
"Instructions inside bundles should use bundle start's slot.");
assert(!mi2iMap.contains(&MI) && "Instr already indexed.");
// Numbering debug instructions could cause code generation to be
// affected by debug information.
assert(!MI.isDebugInstr() && "Cannot number debug instructions.");
assert(MI.getParent() != nullptr && "Instr must be added to function.");
// Get the entries where MI should be inserted.
IndexList::iterator prevItr, nextItr;
if (Late) {
// Insert MI's index immediately before the following instruction.
nextItr = getIndexAfter(MI).listEntry()->getIterator();
prevItr = std::prev(nextItr);
} else {
// Insert MI's index immediately after the preceding instruction.
prevItr = getIndexBefore(MI).listEntry()->getIterator();
nextItr = std::next(prevItr);
}
// Get a number for the new instr, or 0 if there's no room currently.
// In the latter case we'll force a renumber later.
unsigned dist = ((nextItr->getIndex() - prevItr->getIndex())/2) & ~3u;
unsigned newNumber = prevItr->getIndex() + dist;
// Insert a new list entry for MI.
IndexList::iterator newItr =
indexList.insert(nextItr, createEntry(&MI, newNumber));
// Renumber locally if we need to.
if (dist == 0)
renumberIndexes(newItr);
SlotIndex newIndex(&*newItr, SlotIndex::Slot_Block);
mi2iMap.insert(std::make_pair(&MI, newIndex));
return newIndex;
}
/// Removes machine instruction (bundle) \p MI from the mapping.
/// This should be called before MachineInstr::eraseFromParent() is used to
/// remove a whole bundle or an unbundled instruction.
/// If \p AllowBundled is set then this can be used on a bundled
/// instruction; however, this exists to support handleMoveIntoBundle,
/// and in general removeSingleMachineInstrFromMaps should be used instead.
void removeMachineInstrFromMaps(MachineInstr &MI,
bool AllowBundled = false);
/// Removes a single machine instruction \p MI from the mapping.
/// This should be called before MachineInstr::eraseFromBundle() is used to
/// remove a single instruction (out of a bundle).
void removeSingleMachineInstrFromMaps(MachineInstr &MI);
/// ReplaceMachineInstrInMaps - Replacing a machine instr with a new one in
/// maps used by register allocator. \returns the index where the new
/// instruction was inserted.
SlotIndex replaceMachineInstrInMaps(MachineInstr &MI, MachineInstr &NewMI) {
Mi2IndexMap::iterator mi2iItr = mi2iMap.find(&MI);
if (mi2iItr == mi2iMap.end())
return SlotIndex();
SlotIndex replaceBaseIndex = mi2iItr->second;
IndexListEntry *miEntry(replaceBaseIndex.listEntry());
assert(miEntry->getInstr() == &MI &&
"Mismatched instruction in index tables.");
miEntry->setInstr(&NewMI);
mi2iMap.erase(mi2iItr);
mi2iMap.insert(std::make_pair(&NewMI, replaceBaseIndex));
return replaceBaseIndex;
}
/// Add the given MachineBasicBlock into the maps.
/// If it contains any instructions then they must already be in the maps.
/// This is used after a block has been split by moving some suffix of its
/// instructions into a newly created block.
void insertMBBInMaps(MachineBasicBlock *mbb) {
assert(mbb != &mbb->getParent()->front() &&
"Can't insert a new block at the beginning of a function.");
auto prevMBB = std::prev(MachineFunction::iterator(mbb));
// Create a new entry to be used for the start of mbb and the end of
// prevMBB.
IndexListEntry *startEntry = createEntry(nullptr, 0);
IndexListEntry *endEntry = getMBBEndIdx(&*prevMBB).listEntry();
IndexListEntry *insEntry =
mbb->empty() ? endEntry
: getInstructionIndex(mbb->front()).listEntry();
IndexList::iterator newItr =
indexList.insert(insEntry->getIterator(), startEntry);
SlotIndex startIdx(startEntry, SlotIndex::Slot_Block);
SlotIndex endIdx(endEntry, SlotIndex::Slot_Block);
MBBRanges[prevMBB->getNumber()].second = startIdx;
assert(unsigned(mbb->getNumber()) == MBBRanges.size() &&
"Blocks must be added in order");
MBBRanges.push_back(std::make_pair(startIdx, endIdx));
idx2MBBMap.push_back(IdxMBBPair(startIdx, mbb));
renumberIndexes(newItr);
llvm::sort(idx2MBBMap, less_first());
}
};
// Specialize IntervalMapInfo for half-open slot index intervals.
template <>
struct IntervalMapInfo<SlotIndex> : IntervalMapHalfOpenInfo<SlotIndex> {
};
} // end namespace llvm
#endif // LLVM_CODEGEN_SLOTINDEXES_H
PK iwFZ��
U
U CodeGen/FastISel.hnu �[��� //===- FastISel.h - Definition of the FastISel class ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file defines the FastISel class.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_FASTISEL_H
#define LLVM_CODEGEN_FASTISEL_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineValueType.h"
#include "llvm/CodeGen/TargetLowering.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/InstrTypes.h"
#include <cstdint>
#include <utility>
namespace llvm {
class AllocaInst;
class Instruction;
class IntrinsicInst;
class BasicBlock;
class CallInst;
class Constant;
class ConstantFP;
class DataLayout;
class FunctionLoweringInfo;
class LoadInst;
class MachineConstantPool;
class MachineFrameInfo;
class MachineFunction;
class MachineInstr;
class MachineMemOperand;
class MachineOperand;
class MachineRegisterInfo;
class MCContext;
class MCInstrDesc;
class MCSymbol;
class TargetInstrInfo;
class TargetLibraryInfo;
class TargetMachine;
class TargetRegisterClass;
class TargetRegisterInfo;
class Type;
class User;
class Value;
/// This is a fast-path instruction selection class that generates poor
/// code and doesn't support illegal types or non-trivial lowering, but runs
/// quickly.
class FastISel {
public:
using ArgListEntry = TargetLoweringBase::ArgListEntry;
using ArgListTy = TargetLoweringBase::ArgListTy;
struct CallLoweringInfo {
Type *RetTy = nullptr;
bool RetSExt : 1;
bool RetZExt : 1;
bool IsVarArg : 1;
bool IsInReg : 1;
bool DoesNotReturn : 1;
bool IsReturnValueUsed : 1;
bool IsPatchPoint : 1;
// IsTailCall Should be modified by implementations of FastLowerCall
// that perform tail call conversions.
bool IsTailCall = false;
unsigned NumFixedArgs = -1;
CallingConv::ID CallConv = CallingConv::C;
const Value *Callee = nullptr;
MCSymbol *Symbol = nullptr;
ArgListTy Args;
const CallBase *CB = nullptr;
MachineInstr *Call = nullptr;
Register ResultReg;
unsigned NumResultRegs = 0;
SmallVector<Value *, 16> OutVals;
SmallVector<ISD::ArgFlagsTy, 16> OutFlags;
SmallVector<Register, 16> OutRegs;
SmallVector<ISD::InputArg, 4> Ins;
SmallVector<Register, 4> InRegs;
CallLoweringInfo()
: RetSExt(false), RetZExt(false), IsVarArg(false), IsInReg(false),
DoesNotReturn(false), IsReturnValueUsed(true), IsPatchPoint(false) {}
CallLoweringInfo &setCallee(Type *ResultTy, FunctionType *FuncTy,
const Value *Target, ArgListTy &&ArgsList,
const CallBase &Call) {
RetTy = ResultTy;
Callee = Target;
IsInReg = Call.hasRetAttr(Attribute::InReg);
DoesNotReturn = Call.doesNotReturn();
IsVarArg = FuncTy->isVarArg();
IsReturnValueUsed = !Call.use_empty();
RetSExt = Call.hasRetAttr(Attribute::SExt);
RetZExt = Call.hasRetAttr(Attribute::ZExt);
CallConv = Call.getCallingConv();
Args = std::move(ArgsList);
NumFixedArgs = FuncTy->getNumParams();
CB = &Call;
return *this;
}
CallLoweringInfo &setCallee(Type *ResultTy, FunctionType *FuncTy,
MCSymbol *Target, ArgListTy &&ArgsList,
const CallBase &Call,
unsigned FixedArgs = ~0U) {
RetTy = ResultTy;
Callee = Call.getCalledOperand();
Symbol = Target;
IsInReg = Call.hasRetAttr(Attribute::InReg);
DoesNotReturn = Call.doesNotReturn();
IsVarArg = FuncTy->isVarArg();
IsReturnValueUsed = !Call.use_empty();
RetSExt = Call.hasRetAttr(Attribute::SExt);
RetZExt = Call.hasRetAttr(Attribute::ZExt);
CallConv = Call.getCallingConv();
Args = std::move(ArgsList);
NumFixedArgs = (FixedArgs == ~0U) ? FuncTy->getNumParams() : FixedArgs;
CB = &Call;
return *this;
}
CallLoweringInfo &setCallee(CallingConv::ID CC, Type *ResultTy,
const Value *Target, ArgListTy &&ArgsList,
unsigned FixedArgs = ~0U) {
RetTy = ResultTy;
Callee = Target;
CallConv = CC;
Args = std::move(ArgsList);
NumFixedArgs = (FixedArgs == ~0U) ? Args.size() : FixedArgs;
return *this;
}
CallLoweringInfo &setCallee(const DataLayout &DL, MCContext &Ctx,
CallingConv::ID CC, Type *ResultTy,
StringRef Target, ArgListTy &&ArgsList,
unsigned FixedArgs = ~0U);
CallLoweringInfo &setCallee(CallingConv::ID CC, Type *ResultTy,
MCSymbol *Target, ArgListTy &&ArgsList,
unsigned FixedArgs = ~0U) {
RetTy = ResultTy;
Symbol = Target;
CallConv = CC;
Args = std::move(ArgsList);
NumFixedArgs = (FixedArgs == ~0U) ? Args.size() : FixedArgs;
return *this;
}
CallLoweringInfo &setTailCall(bool Value = true) {
IsTailCall = Value;
return *this;
}
CallLoweringInfo &setIsPatchPoint(bool Value = true) {
IsPatchPoint = Value;
return *this;
}
ArgListTy &getArgs() { return Args; }
void clearOuts() {
OutVals.clear();
OutFlags.clear();
OutRegs.clear();
}
void clearIns() {
Ins.clear();
InRegs.clear();
}
};
protected:
DenseMap<const Value *, Register> LocalValueMap;
FunctionLoweringInfo &FuncInfo;
MachineFunction *MF;
MachineRegisterInfo &MRI;
MachineFrameInfo &MFI;
MachineConstantPool &MCP;
MIMetadata MIMD;
const TargetMachine &TM;
const DataLayout &DL;
const TargetInstrInfo &TII;
const TargetLowering &TLI;
const TargetRegisterInfo &TRI;
const TargetLibraryInfo *LibInfo;
bool SkipTargetIndependentISel;
/// The position of the last instruction for materializing constants
/// for use in the current block. It resets to EmitStartPt when it makes sense
/// (for example, it's usually profitable to avoid function calls between the
/// definition and the use)
MachineInstr *LastLocalValue = nullptr;
/// The top most instruction in the current block that is allowed for
/// emitting local variables. LastLocalValue resets to EmitStartPt when it
/// makes sense (for example, on function calls)
MachineInstr *EmitStartPt = nullptr;
public:
virtual ~FastISel();
/// Return the position of the last instruction emitted for
/// materializing constants for use in the current block.
MachineInstr *getLastLocalValue() { return LastLocalValue; }
/// Update the position of the last instruction emitted for
/// materializing constants for use in the current block.
void setLastLocalValue(MachineInstr *I) {
EmitStartPt = I;
LastLocalValue = I;
}
/// Set the current block to which generated machine instructions will
/// be appended.
void startNewBlock();
/// Flush the local value map.
void finishBasicBlock();
/// Return current debug location information.
DebugLoc getCurDebugLoc() const { return MIMD.getDL(); }
/// Do "fast" instruction selection for function arguments and append
/// the machine instructions to the current block. Returns true when
/// successful.
bool lowerArguments();
/// Do "fast" instruction selection for the given LLVM IR instruction
/// and append the generated machine instructions to the current block.
/// Returns true if selection was successful.
bool selectInstruction(const Instruction *I);
/// Do "fast" instruction selection for the given LLVM IR operator
/// (Instruction or ConstantExpr), and append generated machine instructions
/// to the current block. Return true if selection was successful.
bool selectOperator(const User *I, unsigned Opcode);
/// Create a virtual register and arrange for it to be assigned the
/// value for the given LLVM value.
Register getRegForValue(const Value *V);
/// Look up the value to see if its value is already cached in a
/// register. It may be defined by instructions across blocks or defined
/// locally.
Register lookUpRegForValue(const Value *V);
/// This is a wrapper around getRegForValue that also takes care of
/// truncating or sign-extending the given getelementptr index value.
Register getRegForGEPIndex(const Value *Idx);
/// We're checking to see if we can fold \p LI into \p FoldInst. Note
/// that we could have a sequence where multiple LLVM IR instructions are
/// folded into the same machineinstr. For example we could have:
///
/// A: x = load i32 *P
/// B: y = icmp A, 42
/// C: br y, ...
///
/// In this scenario, \p LI is "A", and \p FoldInst is "C". We know about "B"
/// (and any other folded instructions) because it is between A and C.
///
/// If we succeed folding, return true.
bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst);
/// The specified machine instr operand is a vreg, and that vreg is
/// being provided by the specified load instruction. If possible, try to
/// fold the load as an operand to the instruction, returning true if
/// possible.
///
/// This method should be implemented by targets.
virtual bool tryToFoldLoadIntoMI(MachineInstr * /*MI*/, unsigned /*OpNo*/,
const LoadInst * /*LI*/) {
return false;
}
/// Reset InsertPt to prepare for inserting instructions into the
/// current block.
void recomputeInsertPt();
/// Remove all dead instructions between the I and E.
void removeDeadCode(MachineBasicBlock::iterator I,
MachineBasicBlock::iterator E);
using SavePoint = MachineBasicBlock::iterator;
/// Prepare InsertPt to begin inserting instructions into the local
/// value area and return the old insert position.
SavePoint enterLocalValueArea();
/// Reset InsertPt to the given old insert position.
void leaveLocalValueArea(SavePoint Old);
protected:
explicit FastISel(FunctionLoweringInfo &FuncInfo,
const TargetLibraryInfo *LibInfo,
bool SkipTargetIndependentISel = false);
/// This method is called by target-independent code when the normal
/// FastISel process fails to select an instruction. This gives targets a
/// chance to emit code for anything that doesn't fit into FastISel's
/// framework. It returns true if it was successful.
virtual bool fastSelectInstruction(const Instruction *I) = 0;
/// This method is called by target-independent code to do target-
/// specific argument lowering. It returns true if it was successful.
virtual bool fastLowerArguments();
/// This method is called by target-independent code to do target-
/// specific call lowering. It returns true if it was successful.
virtual bool fastLowerCall(CallLoweringInfo &CLI);
/// This method is called by target-independent code to do target-
/// specific intrinsic lowering. It returns true if it was successful.
virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II);
/// This method is called by target-independent code to request that an
/// instruction with the given type and opcode be emitted.
virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode);
/// This method is called by target-independent code to request that an
/// instruction with the given type, opcode, and register operand be emitted.
virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0);
/// This method is called by target-independent code to request that an
/// instruction with the given type, opcode, and register operands be emitted.
virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
unsigned Op1);
/// This method is called by target-independent code to request that an
/// instruction with the given type, opcode, and register and immediate
/// operands be emitted.
virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
uint64_t Imm);
/// This method is a wrapper of fastEmit_ri.
///
/// It first tries to emit an instruction with an immediate operand using
/// fastEmit_ri. If that fails, it materializes the immediate into a register
/// and try fastEmit_rr instead.
Register fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, uint64_t Imm,
MVT ImmType);
/// This method is called by target-independent code to request that an
/// instruction with the given type, opcode, and immediate operand be emitted.
virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm);
/// This method is called by target-independent code to request that an
/// instruction with the given type, opcode, and floating-point immediate
/// operand be emitted.
virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode,
const ConstantFP *FPImm);
/// Emit a MachineInstr with no operands and a result register in the
/// given register class.
Register fastEmitInst_(unsigned MachineInstOpcode,
const TargetRegisterClass *RC);
/// Emit a MachineInstr with one register operand and a result register
/// in the given register class.
Register fastEmitInst_r(unsigned MachineInstOpcode,
const TargetRegisterClass *RC, unsigned Op0);
/// Emit a MachineInstr with two register operands and a result
/// register in the given register class.
Register fastEmitInst_rr(unsigned MachineInstOpcode,
const TargetRegisterClass *RC, unsigned Op0,
unsigned Op1);
/// Emit a MachineInstr with three register operands and a result
/// register in the given register class.
Register fastEmitInst_rrr(unsigned MachineInstOpcode,
const TargetRegisterClass *RC, unsigned Op0,
unsigned Op1, unsigned Op2);
/// Emit a MachineInstr with a register operand, an immediate, and a
/// result register in the given register class.
Register fastEmitInst_ri(unsigned MachineInstOpcode,
const TargetRegisterClass *RC, unsigned Op0,
uint64_t Imm);
/// Emit a MachineInstr with one register operand and two immediate
/// operands.
Register fastEmitInst_rii(unsigned MachineInstOpcode,
const TargetRegisterClass *RC, unsigned Op0,
uint64_t Imm1, uint64_t Imm2);
/// Emit a MachineInstr with a floating point immediate, and a result
/// register in the given register class.
Register fastEmitInst_f(unsigned MachineInstOpcode,
const TargetRegisterClass *RC,
const ConstantFP *FPImm);
/// Emit a MachineInstr with two register operands, an immediate, and a
/// result register in the given register class.
Register fastEmitInst_rri(unsigned MachineInstOpcode,
const TargetRegisterClass *RC, unsigned Op0,
unsigned Op1, uint64_t Imm);
/// Emit a MachineInstr with a single immediate operand, and a result
/// register in the given register class.
Register fastEmitInst_i(unsigned MachineInstOpcode,
const TargetRegisterClass *RC, uint64_t Imm);
/// Emit a MachineInstr for an extract_subreg from a specified index of
/// a superregister to a specified type.
Register fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, uint32_t Idx);
/// Emit MachineInstrs to compute the value of Op with all but the
/// least significant bit set to zero.
Register fastEmitZExtFromI1(MVT VT, unsigned Op0);
/// Emit an unconditional branch to the given block, unless it is the
/// immediate (fall-through) successor, and update the CFG.
void fastEmitBranch(MachineBasicBlock *MSucc, const DebugLoc &DbgLoc);
/// Emit an unconditional branch to \p FalseMBB, obtains the branch weight
/// and adds TrueMBB and FalseMBB to the successor list.
void finishCondBranch(const BasicBlock *BranchBB, MachineBasicBlock *TrueMBB,
MachineBasicBlock *FalseMBB);
/// Update the value map to include the new mapping for this
/// instruction, or insert an extra copy to get the result in a previous
/// determined register.
///
/// NOTE: This is only necessary because we might select a block that uses a
/// value before we select the block that defines the value. It might be
/// possible to fix this by selecting blocks in reverse postorder.
void updateValueMap(const Value *I, Register Reg, unsigned NumRegs = 1);
Register createResultReg(const TargetRegisterClass *RC);
/// Try to constrain Op so that it is usable by argument OpNum of the
/// provided MCInstrDesc. If this fails, create a new virtual register in the
/// correct class and COPY the value there.
Register constrainOperandRegClass(const MCInstrDesc &II, Register Op,
unsigned OpNum);
/// Emit a constant in a register using target-specific logic, such as
/// constant pool loads.
virtual unsigned fastMaterializeConstant(const Constant *C) { return 0; }
/// Emit an alloca address in a register using target-specific logic.
virtual unsigned fastMaterializeAlloca(const AllocaInst *C) { return 0; }
/// Emit the floating-point constant +0.0 in a register using target-
/// specific logic.
virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF) {
return 0;
}
/// Check if \c Add is an add that can be safely folded into \c GEP.
///
/// \c Add can be folded into \c GEP if:
/// - \c Add is an add,
/// - \c Add's size matches \c GEP's,
/// - \c Add is in the same basic block as \c GEP, and
/// - \c Add has a constant operand.
bool canFoldAddIntoGEP(const User *GEP, const Value *Add);
/// Create a machine mem operand from the given instruction.
MachineMemOperand *createMachineMemOperandFor(const Instruction *I) const;
CmpInst::Predicate optimizeCmpPredicate(const CmpInst *CI) const;
bool lowerCallTo(const CallInst *CI, MCSymbol *Symbol, unsigned NumArgs);
bool lowerCallTo(const CallInst *CI, const char *SymName,
unsigned NumArgs);
bool lowerCallTo(CallLoweringInfo &CLI);
bool lowerCall(const CallInst *I);
/// Select and emit code for a binary operator instruction, which has
/// an opcode which directly corresponds to the given ISD opcode.
bool selectBinaryOp(const User *I, unsigned ISDOpcode);
bool selectFNeg(const User *I, const Value *In);
bool selectGetElementPtr(const User *I);
bool selectStackmap(const CallInst *I);
bool selectPatchpoint(const CallInst *I);
bool selectCall(const User *I);
bool selectIntrinsicCall(const IntrinsicInst *II);
bool selectBitCast(const User *I);
bool selectFreeze(const User *I);
bool selectCast(const User *I, unsigned Opcode);
bool selectExtractValue(const User *U);
bool selectXRayCustomEvent(const CallInst *II);
bool selectXRayTypedEvent(const CallInst *II);
bool shouldOptForSize(const MachineFunction *MF) const {
// TODO: Implement PGSO.
return MF->getFunction().hasOptSize();
}
private:
/// Handle PHI nodes in successor blocks.
///
/// Emit code to ensure constants are copied into registers when needed.
/// Remember the virtual registers that need to be added to the Machine PHI
/// nodes as input. We cannot just directly add them, because expansion might
/// result in multiple MBB's for one BB. As such, the start of the BB might
/// correspond to a different MBB than the end.
bool handlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
/// Helper for materializeRegForValue to materialize a constant in a
/// target-independent way.
Register materializeConstant(const Value *V, MVT VT);
/// Helper for getRegForVale. This function is called when the value
/// isn't already available in a register and must be materialized with new
/// instructions.
Register materializeRegForValue(const Value *V, MVT VT);
/// Clears LocalValueMap and moves the area for the new local variables
/// to the beginning of the block. It helps to avoid spilling cached variables
/// across heavy instructions like calls.
void flushLocalValueMap();
/// Removes dead local value instructions after SavedLastLocalvalue.
void removeDeadLocalValueCode(MachineInstr *SavedLastLocalValue);
/// Insertion point before trying to select the current instruction.
MachineBasicBlock::iterator SavedInsertPt;
/// Add a stackmap or patchpoint intrinsic call's live variable
/// operands to a stackmap or patchpoint machine instruction.
bool addStackMapLiveVars(SmallVectorImpl<MachineOperand> &Ops,
const CallInst *CI, unsigned StartIdx);
bool lowerCallOperands(const CallInst *CI, unsigned ArgIdx, unsigned NumArgs,
const Value *Callee, bool ForceRetVoidTy,
CallLoweringInfo &CLI);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_FASTISEL_H
PK iwFZ�~�� CodeGen/BasicBlockSectionUtils.hnu �[��� //===- BasicBlockSectionUtils.h - Utilities for basic block sections --===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_BASICBLOCKSECTIONUTILS_H
#define LLVM_CODEGEN_BASICBLOCKSECTIONUTILS_H
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/CommandLine.h"
namespace llvm {
extern cl::opt<std::string> BBSectionsColdTextPrefix;
class MachineFunction;
class MachineBasicBlock;
using MachineBasicBlockComparator =
function_ref<bool(const MachineBasicBlock &, const MachineBasicBlock &)>;
void sortBasicBlocksAndUpdateBranches(MachineFunction &MF,
MachineBasicBlockComparator MBBCmp);
void avoidZeroOffsetLandingPad(MachineFunction &MF);
} // end namespace llvm
#endif // LLVM_CODEGEN_BASICBLOCKSECTIONUTILS_H
PK iwFZ��<�9 9 CodeGen/MultiHazardRecognizer.hnu �[��� //=- llvm/CodeGen/MultiHazardRecognizer.h - Scheduling Support ----*- C++ -*-=//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements the MultiHazardRecognizer class, which is a wrapper
// for a set of ScheduleHazardRecognizer instances
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MULTIHAZARDRECOGNIZER_H
#define LLVM_CODEGEN_MULTIHAZARDRECOGNIZER_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
namespace llvm {
class MachineInstr;
class SUnit;
class MultiHazardRecognizer : public ScheduleHazardRecognizer {
SmallVector<std::unique_ptr<ScheduleHazardRecognizer>, 4> Recognizers;
public:
MultiHazardRecognizer() = default;
void AddHazardRecognizer(std::unique_ptr<ScheduleHazardRecognizer> &&);
bool atIssueLimit() const override;
HazardType getHazardType(SUnit *, int Stalls = 0) override;
void Reset() override;
void EmitInstruction(SUnit *) override;
void EmitInstruction(MachineInstr *) override;
unsigned PreEmitNoops(SUnit *) override;
unsigned PreEmitNoops(MachineInstr *) override;
bool ShouldPreferAnother(SUnit *) override;
void AdvanceCycle() override;
void RecedeCycle() override;
void EmitNoop() override;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_MULTIHAZARDRECOGNIZER_H
PK iwFZo�`� " CodeGen/LinkAllCodegenComponents.hnu �[��� //===- llvm/Codegen/LinkAllCodegenComponents.h ------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This header file pulls in all codegen related passes for tools like lli and
// llc that need this functionality.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LINKALLCODEGENCOMPONENTS_H
#define LLVM_CODEGEN_LINKALLCODEGENCOMPONENTS_H
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/SchedulerRegistry.h"
#include "llvm/Target/TargetMachine.h"
#include <cstdlib>
namespace {
struct ForceCodegenLinking {
ForceCodegenLinking() {
// We must reference the passes in such a way that compilers will not
// delete it all as dead code, even with whole program optimization,
// yet is effectively a NO-OP. As the compiler isn't smart enough
// to know that getenv() never returns -1, this will do the job.
// This is so that globals in the translation units where these functions
// are defined are forced to be initialized, populating various
// registries.
if (std::getenv("bar") != (char*) -1)
return;
(void) llvm::createFastRegisterAllocator();
(void) llvm::createBasicRegisterAllocator();
(void) llvm::createGreedyRegisterAllocator();
(void) llvm::createDefaultPBQPRegisterAllocator();
(void) llvm::createBURRListDAGScheduler(nullptr,
llvm::CodeGenOpt::Default);
(void) llvm::createSourceListDAGScheduler(nullptr,
llvm::CodeGenOpt::Default);
(void) llvm::createHybridListDAGScheduler(nullptr,
llvm::CodeGenOpt::Default);
(void) llvm::createFastDAGScheduler(nullptr, llvm::CodeGenOpt::Default);
(void) llvm::createDefaultScheduler(nullptr, llvm::CodeGenOpt::Default);
(void) llvm::createVLIWDAGScheduler(nullptr, llvm::CodeGenOpt::Default);
}
} ForceCodegenLinking; // Force link by creating a global definition.
}
#endif
PK iwFZK�s% % " CodeGen/PreISelIntrinsicLowering.hnu �[��� //===- PreISelIntrinsicLowering.h - Pre-ISel intrinsic lowering pass ------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This pass implements IR lowering for the llvm.load.relative and llvm.objc.*
// intrinsics.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_PREISELINTRINSICLOWERING_H
#define LLVM_CODEGEN_PREISELINTRINSICLOWERING_H
#include "llvm/IR/PassManager.h"
namespace llvm {
class Module;
class TargetMachine;
struct PreISelIntrinsicLoweringPass
: PassInfoMixin<PreISelIntrinsicLoweringPass> {
const TargetMachine &TM;
PreISelIntrinsicLoweringPass(const TargetMachine &TM) : TM(TM) {}
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_PREISELINTRINSICLOWERING_H
PK iwFZ?� �?� ?� CodeGen/TargetLowering.hnu �[��� //===- llvm/CodeGen/TargetLowering.h - Target Lowering Info -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file describes how to lower LLVM code to machine code. This has two
/// main components:
///
/// 1. Which ValueTypes are natively supported by the target.
/// 2. Which operations are supported for supported ValueTypes.
/// 3. Cost thresholds for alternative implementations of certain operations.
///
/// In addition it has a few other components, like information about FP
/// immediates.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_TARGETLOWERING_H
#define LLVM_CODEGEN_TARGETLOWERING_H
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/ComplexDeinterleavingPass.h"
#include "llvm/CodeGen/DAGCombine.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/LowLevelTypeUtils.h"
#include "llvm/CodeGen/MachineValueType.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RuntimeLibcalls.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/TargetCallingConv.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/InlineAsm.h"
#include "llvm/IR/Instruction.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/Type.h"
#include "llvm/Support/Alignment.h"
#include "llvm/Support/AtomicOrdering.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/ErrorHandling.h"
#include <algorithm>
#include <cassert>
#include <climits>
#include <cstdint>
#include <iterator>
#include <map>
#include <string>
#include <utility>
#include <vector>
namespace llvm {
class AssumptionCache;
class CCState;
class CCValAssign;
class Constant;
class FastISel;
class FunctionLoweringInfo;
class GlobalValue;
class Loop;
class GISelKnownBits;
class IntrinsicInst;
class IRBuilderBase;
struct KnownBits;
class LLVMContext;
class MachineBasicBlock;
class MachineFunction;
class MachineInstr;
class MachineJumpTableInfo;
class MachineLoop;
class MachineRegisterInfo;
class MCContext;
class MCExpr;
class Module;
class ProfileSummaryInfo;
class TargetLibraryInfo;
class TargetMachine;
class TargetRegisterClass;
class TargetRegisterInfo;
class TargetTransformInfo;
class Value;
namespace Sched {
enum Preference {
None, // No preference
Source, // Follow source order.
RegPressure, // Scheduling for lowest register pressure.
Hybrid, // Scheduling for both latency and register pressure.
ILP, // Scheduling for ILP in low register pressure mode.
VLIW, // Scheduling for VLIW targets.
Fast, // Fast suboptimal list scheduling
Linearize // Linearize DAG, no scheduling
};
} // end namespace Sched
// MemOp models a memory operation, either memset or memcpy/memmove.
struct MemOp {
private:
// Shared
uint64_t Size;
bool DstAlignCanChange; // true if destination alignment can satisfy any
// constraint.
Align DstAlign; // Specified alignment of the memory operation.
bool AllowOverlap;
// memset only
bool IsMemset; // If setthis memory operation is a memset.
bool ZeroMemset; // If set clears out memory with zeros.
// memcpy only
bool MemcpyStrSrc; // Indicates whether the memcpy source is an in-register
// constant so it does not need to be loaded.
Align SrcAlign; // Inferred alignment of the source or default value if the
// memory operation does not need to load the value.
public:
static MemOp Copy(uint64_t Size, bool DstAlignCanChange, Align DstAlign,
Align SrcAlign, bool IsVolatile,
bool MemcpyStrSrc = false) {
MemOp Op;
Op.Size = Size;
Op.DstAlignCanChange = DstAlignCanChange;
Op.DstAlign = DstAlign;
Op.AllowOverlap = !IsVolatile;
Op.IsMemset = false;
Op.ZeroMemset = false;
Op.MemcpyStrSrc = MemcpyStrSrc;
Op.SrcAlign = SrcAlign;
return Op;
}
static MemOp Set(uint64_t Size, bool DstAlignCanChange, Align DstAlign,
bool IsZeroMemset, bool IsVolatile) {
MemOp Op;
Op.Size = Size;
Op.DstAlignCanChange = DstAlignCanChange;
Op.DstAlign = DstAlign;
Op.AllowOverlap = !IsVolatile;
Op.IsMemset = true;
Op.ZeroMemset = IsZeroMemset;
Op.MemcpyStrSrc = false;
return Op;
}
uint64_t size() const { return Size; }
Align getDstAlign() const {
assert(!DstAlignCanChange);
return DstAlign;
}
bool isFixedDstAlign() const { return !DstAlignCanChange; }
bool allowOverlap() const { return AllowOverlap; }
bool isMemset() const { return IsMemset; }
bool isMemcpy() const { return !IsMemset; }
bool isMemcpyWithFixedDstAlign() const {
return isMemcpy() && !DstAlignCanChange;
}
bool isZeroMemset() const { return isMemset() && ZeroMemset; }
bool isMemcpyStrSrc() const {
assert(isMemcpy() && "Must be a memcpy");
return MemcpyStrSrc;
}
Align getSrcAlign() const {
assert(isMemcpy() && "Must be a memcpy");
return SrcAlign;
}
bool isSrcAligned(Align AlignCheck) const {
return isMemset() || llvm::isAligned(AlignCheck, SrcAlign.value());
}
bool isDstAligned(Align AlignCheck) const {
return DstAlignCanChange || llvm::isAligned(AlignCheck, DstAlign.value());
}
bool isAligned(Align AlignCheck) const {
return isSrcAligned(AlignCheck) && isDstAligned(AlignCheck);
}
};
/// This base class for TargetLowering contains the SelectionDAG-independent
/// parts that can be used from the rest of CodeGen.
class TargetLoweringBase {
public:
/// This enum indicates whether operations are valid for a target, and if not,
/// what action should be used to make them valid.
enum LegalizeAction : uint8_t {
Legal, // The target natively supports this operation.
Promote, // This operation should be executed in a larger type.
Expand, // Try to expand this to other ops, otherwise use a libcall.
LibCall, // Don't try to expand this to other ops, always use a libcall.
Custom // Use the LowerOperation hook to implement custom lowering.
};
/// This enum indicates whether a types are legal for a target, and if not,
/// what action should be used to make them valid.
enum LegalizeTypeAction : uint8_t {
TypeLegal, // The target natively supports this type.
TypePromoteInteger, // Replace this integer with a larger one.
TypeExpandInteger, // Split this integer into two of half the size.
TypeSoftenFloat, // Convert this float to a same size integer type.
TypeExpandFloat, // Split this float into two of half the size.
TypeScalarizeVector, // Replace this one-element vector with its element.
TypeSplitVector, // Split this vector into two of half the size.
TypeWidenVector, // This vector should be widened into a larger vector.
TypePromoteFloat, // Replace this float with a larger one.
TypeSoftPromoteHalf, // Soften half to i16 and use float to do arithmetic.
TypeScalarizeScalableVector, // This action is explicitly left unimplemented.
// While it is theoretically possible to
// legalize operations on scalable types with a
// loop that handles the vscale * #lanes of the
// vector, this is non-trivial at SelectionDAG
// level and these types are better to be
// widened or promoted.
};
/// LegalizeKind holds the legalization kind that needs to happen to EVT
/// in order to type-legalize it.
using LegalizeKind = std::pair<LegalizeTypeAction, EVT>;
/// Enum that describes how the target represents true/false values.
enum BooleanContent {
UndefinedBooleanContent, // Only bit 0 counts, the rest can hold garbage.
ZeroOrOneBooleanContent, // All bits zero except for bit 0.
ZeroOrNegativeOneBooleanContent // All bits equal to bit 0.
};
/// Enum that describes what type of support for selects the target has.
enum SelectSupportKind {
ScalarValSelect, // The target supports scalar selects (ex: cmov).
ScalarCondVectorVal, // The target supports selects with a scalar condition
// and vector values (ex: cmov).
VectorMaskSelect // The target supports vector selects with a vector
// mask (ex: x86 blends).
};
/// Enum that specifies what an atomic load/AtomicRMWInst is expanded
/// to, if at all. Exists because different targets have different levels of
/// support for these atomic instructions, and also have different options
/// w.r.t. what they should expand to.
enum class AtomicExpansionKind {
None, // Don't expand the instruction.
CastToInteger, // Cast the atomic instruction to another type, e.g. from
// floating-point to integer type.
LLSC, // Expand the instruction into loadlinked/storeconditional; used
// by ARM/AArch64.
LLOnly, // Expand the (load) instruction into just a load-linked, which has
// greater atomic guarantees than a normal load.
CmpXChg, // Expand the instruction into cmpxchg; used by at least X86.
MaskedIntrinsic, // Use a target-specific intrinsic for the LL/SC loop.
BitTestIntrinsic, // Use a target-specific intrinsic for special bit
// operations; used by X86.
CmpArithIntrinsic,// Use a target-specific intrinsic for special compare
// operations; used by X86.
Expand, // Generic expansion in terms of other atomic operations.
// Rewrite to a non-atomic form for use in a known non-preemptible
// environment.
NotAtomic
};
/// Enum that specifies when a multiplication should be expanded.
enum class MulExpansionKind {
Always, // Always expand the instruction.
OnlyLegalOrCustom, // Only expand when the resulting instructions are legal
// or custom.
};
/// Enum that specifies when a float negation is beneficial.
enum class NegatibleCost {
Cheaper = 0, // Negated expression is cheaper.
Neutral = 1, // Negated expression has the same cost.
Expensive = 2 // Negated expression is more expensive.
};
/// Enum of different potentially desirable ways to fold (and/or (setcc ...),
/// (setcc ...)).
enum AndOrSETCCFoldKind : uint8_t {
None = 0, // No fold is preferable.
AddAnd = 1, // Fold with `Add` op and `And` op is preferable.
NotAnd = 2, // Fold with `Not` op and `And` op is preferable.
ABS = 4, // Fold with `llvm.abs` op is preferable.
};
class ArgListEntry {
public:
Value *Val = nullptr;
SDValue Node = SDValue();
Type *Ty = nullptr;
bool IsSExt : 1;
bool IsZExt : 1;
bool IsInReg : 1;
bool IsSRet : 1;
bool IsNest : 1;
bool IsByVal : 1;
bool IsByRef : 1;
bool IsInAlloca : 1;
bool IsPreallocated : 1;
bool IsReturned : 1;
bool IsSwiftSelf : 1;
bool IsSwiftAsync : 1;
bool IsSwiftError : 1;
bool IsCFGuardTarget : 1;
MaybeAlign Alignment = std::nullopt;
Type *IndirectType = nullptr;
ArgListEntry()
: IsSExt(false), IsZExt(false), IsInReg(false), IsSRet(false),
IsNest(false), IsByVal(false), IsByRef(false), IsInAlloca(false),
IsPreallocated(false), IsReturned(false), IsSwiftSelf(false),
IsSwiftAsync(false), IsSwiftError(false), IsCFGuardTarget(false) {}
void setAttributes(const CallBase *Call, unsigned ArgIdx);
};
using ArgListTy = std::vector<ArgListEntry>;
virtual void markLibCallAttributes(MachineFunction *MF, unsigned CC,
ArgListTy &Args) const {};
static ISD::NodeType getExtendForContent(BooleanContent Content) {
switch (Content) {
case UndefinedBooleanContent:
// Extend by adding rubbish bits.
return ISD::ANY_EXTEND;
case ZeroOrOneBooleanContent:
// Extend by adding zero bits.
return ISD::ZERO_EXTEND;
case ZeroOrNegativeOneBooleanContent:
// Extend by copying the sign bit.
return ISD::SIGN_EXTEND;
}
llvm_unreachable("Invalid content kind");
}
explicit TargetLoweringBase(const TargetMachine &TM);
TargetLoweringBase(const TargetLoweringBase &) = delete;
TargetLoweringBase &operator=(const TargetLoweringBase &) = delete;
virtual ~TargetLoweringBase() = default;
/// Return true if the target support strict float operation
bool isStrictFPEnabled() const {
return IsStrictFPEnabled;
}
protected:
/// Initialize all of the actions to default values.
void initActions();
public:
const TargetMachine &getTargetMachine() const { return TM; }
virtual bool useSoftFloat() const { return false; }
/// Return the pointer type for the given address space, defaults to
/// the pointer type from the data layout.
/// FIXME: The default needs to be removed once all the code is updated.
virtual MVT getPointerTy(const DataLayout &DL, uint32_t AS = 0) const {
return MVT::getIntegerVT(DL.getPointerSizeInBits(AS));
}
/// Return the in-memory pointer type for the given address space, defaults to
/// the pointer type from the data layout. FIXME: The default needs to be
/// removed once all the code is updated.
virtual MVT getPointerMemTy(const DataLayout &DL, uint32_t AS = 0) const {
return MVT::getIntegerVT(DL.getPointerSizeInBits(AS));
}
/// Return the type for frame index, which is determined by
/// the alloca address space specified through the data layout.
MVT getFrameIndexTy(const DataLayout &DL) const {
return getPointerTy(DL, DL.getAllocaAddrSpace());
}
/// Return the type for code pointers, which is determined by the program
/// address space specified through the data layout.
MVT getProgramPointerTy(const DataLayout &DL) const {
return getPointerTy(DL, DL.getProgramAddressSpace());
}
/// Return the type for operands of fence.
/// TODO: Let fence operands be of i32 type and remove this.
virtual MVT getFenceOperandTy(const DataLayout &DL) const {
return getPointerTy(DL);
}
/// Return the type to use for a scalar shift opcode, given the shifted amount
/// type. Targets should return a legal type if the input type is legal.
/// Targets can return a type that is too small if the input type is illegal.
virtual MVT getScalarShiftAmountTy(const DataLayout &, EVT) const;
/// Returns the type for the shift amount of a shift opcode. For vectors,
/// returns the input type. For scalars, behavior depends on \p LegalTypes. If
/// \p LegalTypes is true, calls getScalarShiftAmountTy, otherwise uses
/// pointer type. If getScalarShiftAmountTy or pointer type cannot represent
/// all possible shift amounts, returns MVT::i32. In general, \p LegalTypes
/// should be set to true for calls during type legalization and after type
/// legalization has been completed.
EVT getShiftAmountTy(EVT LHSTy, const DataLayout &DL,
bool LegalTypes = true) const;
/// Return the preferred type to use for a shift opcode, given the shifted
/// amount type is \p ShiftValueTy.
LLVM_READONLY
virtual LLT getPreferredShiftAmountTy(LLT ShiftValueTy) const {
return ShiftValueTy;
}
/// Returns the type to be used for the index operand of:
/// ISD::INSERT_VECTOR_ELT, ISD::EXTRACT_VECTOR_ELT,
/// ISD::INSERT_SUBVECTOR, and ISD::EXTRACT_SUBVECTOR
virtual MVT getVectorIdxTy(const DataLayout &DL) const {
return getPointerTy(DL);
}
/// Returns the type to be used for the EVL/AVL operand of VP nodes:
/// ISD::VP_ADD, ISD::VP_SUB, etc. It must be a legal scalar integer type,
/// and must be at least as large as i32. The EVL is implicitly zero-extended
/// to any larger type.
virtual MVT getVPExplicitVectorLengthTy() const { return MVT::i32; }
/// This callback is used to inspect load/store instructions and add
/// target-specific MachineMemOperand flags to them. The default
/// implementation does nothing.
virtual MachineMemOperand::Flags getTargetMMOFlags(const Instruction &I) const {
return MachineMemOperand::MONone;
}
/// This callback is used to inspect load/store SDNode.
/// The default implementation does nothing.
virtual MachineMemOperand::Flags
getTargetMMOFlags(const MemSDNode &Node) const {
return MachineMemOperand::MONone;
}
MachineMemOperand::Flags
getLoadMemOperandFlags(const LoadInst &LI, const DataLayout &DL,
AssumptionCache *AC = nullptr,
const TargetLibraryInfo *LibInfo = nullptr) const;
MachineMemOperand::Flags getStoreMemOperandFlags(const StoreInst &SI,
const DataLayout &DL) const;
MachineMemOperand::Flags getAtomicMemOperandFlags(const Instruction &AI,
const DataLayout &DL) const;
virtual bool isSelectSupported(SelectSupportKind /*kind*/) const {
return true;
}
/// Return true if the @llvm.get.active.lane.mask intrinsic should be expanded
/// using generic code in SelectionDAGBuilder.
virtual bool shouldExpandGetActiveLaneMask(EVT VT, EVT OpVT) const {
return true;
}
virtual bool shouldExpandGetVectorLength(EVT CountVT, unsigned VF,
bool IsScalable) const {
return true;
}
// Return true if op(vecreduce(x), vecreduce(y)) should be reassociated to
// vecreduce(op(x, y)) for the reduction opcode RedOpc.
virtual bool shouldReassociateReduction(unsigned RedOpc, EVT VT) const {
return true;
}
/// Return true if it is profitable to convert a select of FP constants into
/// a constant pool load whose address depends on the select condition. The
/// parameter may be used to differentiate a select with FP compare from
/// integer compare.
virtual bool reduceSelectOfFPConstantLoads(EVT CmpOpVT) const {
return true;
}
/// Return true if multiple condition registers are available.
bool hasMultipleConditionRegisters() const {
return HasMultipleConditionRegisters;
}
/// Return true if the target has BitExtract instructions.
bool hasExtractBitsInsn() const { return HasExtractBitsInsn; }
/// Return the preferred vector type legalization action.
virtual TargetLoweringBase::LegalizeTypeAction
getPreferredVectorAction(MVT VT) const {
// The default action for one element vectors is to scalarize
if (VT.getVectorElementCount().isScalar())
return TypeScalarizeVector;
// The default action for an odd-width vector is to widen.
if (!VT.isPow2VectorType())
return TypeWidenVector;
// The default action for other vectors is to promote
return TypePromoteInteger;
}
// Return true if the half type should be passed around as i16, but promoted
// to float around arithmetic. The default behavior is to pass around as
// float and convert around loads/stores/bitcasts and other places where
// the size matters.
virtual bool softPromoteHalfType() const { return false; }
// There are two general methods for expanding a BUILD_VECTOR node:
// 1. Use SCALAR_TO_VECTOR on the defined scalar values and then shuffle
// them together.
// 2. Build the vector on the stack and then load it.
// If this function returns true, then method (1) will be used, subject to
// the constraint that all of the necessary shuffles are legal (as determined
// by isShuffleMaskLegal). If this function returns false, then method (2) is
// always used. The vector type, and the number of defined values, are
// provided.
virtual bool
shouldExpandBuildVectorWithShuffles(EVT /* VT */,
unsigned DefinedValues) const {
return DefinedValues < 3;
}
/// Return true if integer divide is usually cheaper than a sequence of
/// several shifts, adds, and multiplies for this target.
/// The definition of "cheaper" may depend on whether we're optimizing
/// for speed or for size.
virtual bool isIntDivCheap(EVT VT, AttributeList Attr) const { return false; }
/// Return true if the target can handle a standalone remainder operation.
virtual bool hasStandaloneRem(EVT VT) const {
return true;
}
/// Return true if SQRT(X) shouldn't be replaced with X*RSQRT(X).
virtual bool isFsqrtCheap(SDValue X, SelectionDAG &DAG) const {
// Default behavior is to replace SQRT(X) with X*RSQRT(X).
return false;
}
/// Reciprocal estimate status values used by the functions below.
enum ReciprocalEstimate : int {
Unspecified = -1,
Disabled = 0,
Enabled = 1
};
/// Return a ReciprocalEstimate enum value for a square root of the given type
/// based on the function's attributes. If the operation is not overridden by
/// the function's attributes, "Unspecified" is returned and target defaults
/// are expected to be used for instruction selection.
int getRecipEstimateSqrtEnabled(EVT VT, MachineFunction &MF) const;
/// Return a ReciprocalEstimate enum value for a division of the given type
/// based on the function's attributes. If the operation is not overridden by
/// the function's attributes, "Unspecified" is returned and target defaults
/// are expected to be used for instruction selection.
int getRecipEstimateDivEnabled(EVT VT, MachineFunction &MF) const;
/// Return the refinement step count for a square root of the given type based
/// on the function's attributes. If the operation is not overridden by
/// the function's attributes, "Unspecified" is returned and target defaults
/// are expected to be used for instruction selection.
int getSqrtRefinementSteps(EVT VT, MachineFunction &MF) const;
/// Return the refinement step count for a division of the given type based
/// on the function's attributes. If the operation is not overridden by
/// the function's attributes, "Unspecified" is returned and target defaults
/// are expected to be used for instruction selection.
int getDivRefinementSteps(EVT VT, MachineFunction &MF) const;
/// Returns true if target has indicated at least one type should be bypassed.
bool isSlowDivBypassed() const { return !BypassSlowDivWidths.empty(); }
/// Returns map of slow types for division or remainder with corresponding
/// fast types
const DenseMap<unsigned int, unsigned int> &getBypassSlowDivWidths() const {
return BypassSlowDivWidths;
}
/// Return true only if vscale must be a power of two.
virtual bool isVScaleKnownToBeAPowerOfTwo() const { return false; }
/// Return true if Flow Control is an expensive operation that should be
/// avoided.
bool isJumpExpensive() const { return JumpIsExpensive; }
/// Return true if selects are only cheaper than branches if the branch is
/// unlikely to be predicted right.
bool isPredictableSelectExpensive() const {
return PredictableSelectIsExpensive;
}
virtual bool fallBackToDAGISel(const Instruction &Inst) const {
return false;
}
/// Return true if the following transform is beneficial:
/// fold (conv (load x)) -> (load (conv*)x)
/// On architectures that don't natively support some vector loads
/// efficiently, casting the load to a smaller vector of larger types and
/// loading is more efficient, however, this can be undone by optimizations in
/// dag combiner.
virtual bool isLoadBitCastBeneficial(EVT LoadVT, EVT BitcastVT,
const SelectionDAG &DAG,
const MachineMemOperand &MMO) const;
/// Return true if the following transform is beneficial:
/// (store (y (conv x)), y*)) -> (store x, (x*))
virtual bool isStoreBitCastBeneficial(EVT StoreVT, EVT BitcastVT,
const SelectionDAG &DAG,
const MachineMemOperand &MMO) const {
// Default to the same logic as loads.
return isLoadBitCastBeneficial(StoreVT, BitcastVT, DAG, MMO);
}
/// Return true if it is expected to be cheaper to do a store of vector
/// constant with the given size and type for the address space than to
/// store the individual scalar element constants.
virtual bool storeOfVectorConstantIsCheap(bool IsZero, EVT MemVT,
unsigned NumElem,
unsigned AddrSpace) const {
return IsZero;
}
/// Allow store merging for the specified type after legalization in addition
/// to before legalization. This may transform stores that do not exist
/// earlier (for example, stores created from intrinsics).
virtual bool mergeStoresAfterLegalization(EVT MemVT) const {
return true;
}
/// Returns if it's reasonable to merge stores to MemVT size.
virtual bool canMergeStoresTo(unsigned AS, EVT MemVT,
const MachineFunction &MF) const {
return true;
}
/// Return true if it is cheap to speculate a call to intrinsic cttz.
virtual bool isCheapToSpeculateCttz(Type *Ty) const {
return false;
}
/// Return true if it is cheap to speculate a call to intrinsic ctlz.
virtual bool isCheapToSpeculateCtlz(Type *Ty) const {
return false;
}
/// Return true if ctlz instruction is fast.
virtual bool isCtlzFast() const {
return false;
}
/// Return the maximum number of "x & (x - 1)" operations that can be done
/// instead of deferring to a custom CTPOP.
virtual unsigned getCustomCtpopCost(EVT VT, ISD::CondCode Cond) const {
return 1;
}
/// Return true if instruction generated for equality comparison is folded
/// with instruction generated for signed comparison.
virtual bool isEqualityCmpFoldedWithSignedCmp() const { return true; }
/// Return true if the heuristic to prefer icmp eq zero should be used in code
/// gen prepare.
virtual bool preferZeroCompareBranch() const { return false; }
/// Return true if it is cheaper to split the store of a merged int val
/// from a pair of smaller values into multiple stores.
virtual bool isMultiStoresCheaperThanBitsMerge(EVT LTy, EVT HTy) const {
return false;
}
/// Return if the target supports combining a
/// chain like:
/// \code
/// %andResult = and %val1, #mask
/// %icmpResult = icmp %andResult, 0
/// \endcode
/// into a single machine instruction of a form like:
/// \code
/// cc = test %register, #mask
/// \endcode
virtual bool isMaskAndCmp0FoldingBeneficial(const Instruction &AndI) const {
return false;
}
/// Return true if it is valid to merge the TargetMMOFlags in two SDNodes.
virtual bool
areTwoSDNodeTargetMMOFlagsMergeable(const MemSDNode &NodeX,
const MemSDNode &NodeY) const {
return true;
}
/// Use bitwise logic to make pairs of compares more efficient. For example:
/// and (seteq A, B), (seteq C, D) --> seteq (or (xor A, B), (xor C, D)), 0
/// This should be true when it takes more than one instruction to lower
/// setcc (cmp+set on x86 scalar), when bitwise ops are faster than logic on
/// condition bits (crand on PowerPC), and/or when reducing cmp+br is a win.
virtual bool convertSetCCLogicToBitwiseLogic(EVT VT) const {
return false;
}
/// Return the preferred operand type if the target has a quick way to compare
/// integer values of the given size. Assume that any legal integer type can
/// be compared efficiently. Targets may override this to allow illegal wide
/// types to return a vector type if there is support to compare that type.
virtual MVT hasFastEqualityCompare(unsigned NumBits) const {
MVT VT = MVT::getIntegerVT(NumBits);
return isTypeLegal(VT) ? VT : MVT::INVALID_SIMPLE_VALUE_TYPE;
}
/// Return true if the target should transform:
/// (X & Y) == Y ---> (~X & Y) == 0
/// (X & Y) != Y ---> (~X & Y) != 0
///
/// This may be profitable if the target has a bitwise and-not operation that
/// sets comparison flags. A target may want to limit the transformation based
/// on the type of Y or if Y is a constant.
///
/// Note that the transform will not occur if Y is known to be a power-of-2
/// because a mask and compare of a single bit can be handled by inverting the
/// predicate, for example:
/// (X & 8) == 8 ---> (X & 8) != 0
virtual bool hasAndNotCompare(SDValue Y) const {
return false;
}
/// Return true if the target has a bitwise and-not operation:
/// X = ~A & B
/// This can be used to simplify select or other instructions.
virtual bool hasAndNot(SDValue X) const {
// If the target has the more complex version of this operation, assume that
// it has this operation too.
return hasAndNotCompare(X);
}
/// Return true if the target has a bit-test instruction:
/// (X & (1 << Y)) ==/!= 0
/// This knowledge can be used to prevent breaking the pattern,
/// or creating it if it could be recognized.
virtual bool hasBitTest(SDValue X, SDValue Y) const { return false; }
/// There are two ways to clear extreme bits (either low or high):
/// Mask: x & (-1 << y) (the instcombine canonical form)
/// Shifts: x >> y << y
/// Return true if the variant with 2 variable shifts is preferred.
/// Return false if there is no preference.
virtual bool shouldFoldMaskToVariableShiftPair(SDValue X) const {
// By default, let's assume that no one prefers shifts.
return false;
}
/// Return true if it is profitable to fold a pair of shifts into a mask.
/// This is usually true on most targets. But some targets, like Thumb1,
/// have immediate shift instructions, but no immediate "and" instruction;
/// this makes the fold unprofitable.
virtual bool shouldFoldConstantShiftPairToMask(const SDNode *N,
CombineLevel Level) const {
return true;
}
/// Should we tranform the IR-optimal check for whether given truncation
/// down into KeptBits would be truncating or not:
/// (add %x, (1 << (KeptBits-1))) srccond (1 << KeptBits)
/// Into it's more traditional form:
/// ((%x << C) a>> C) dstcond %x
/// Return true if we should transform.
/// Return false if there is no preference.
virtual bool shouldTransformSignedTruncationCheck(EVT XVT,
unsigned KeptBits) const {
// By default, let's assume that no one prefers shifts.
return false;
}
/// Given the pattern
/// (X & (C l>>/<< Y)) ==/!= 0
/// return true if it should be transformed into:
/// ((X <</l>> Y) & C) ==/!= 0
/// WARNING: if 'X' is a constant, the fold may deadlock!
/// FIXME: we could avoid passing XC, but we can't use isConstOrConstSplat()
/// here because it can end up being not linked in.
virtual bool shouldProduceAndByConstByHoistingConstFromShiftsLHSOfAnd(
SDValue X, ConstantSDNode *XC, ConstantSDNode *CC, SDValue Y,
unsigned OldShiftOpcode, unsigned NewShiftOpcode,
SelectionDAG &DAG) const {
if (hasBitTest(X, Y)) {
// One interesting pattern that we'd want to form is 'bit test':
// ((1 << Y) & C) ==/!= 0
// But we also need to be careful not to try to reverse that fold.
// Is this '1 << Y' ?
if (OldShiftOpcode == ISD::SHL && CC->isOne())
return false; // Keep the 'bit test' pattern.
// Will it be '1 << Y' after the transform ?
if (XC && NewShiftOpcode == ISD::SHL && XC->isOne())
return true; // Do form the 'bit test' pattern.
}
// If 'X' is a constant, and we transform, then we will immediately
// try to undo the fold, thus causing endless combine loop.
// So by default, let's assume everyone prefers the fold
// iff 'X' is not a constant.
return !XC;
}
/// These two forms are equivalent:
/// sub %y, (xor %x, -1)
/// add (add %x, 1), %y
/// The variant with two add's is IR-canonical.
/// Some targets may prefer one to the other.
virtual bool preferIncOfAddToSubOfNot(EVT VT) const {
// By default, let's assume that everyone prefers the form with two add's.
return true;
}
// By default prefer folding (abs (sub nsw x, y)) -> abds(x, y). Some targets
// may want to avoid this to prevent loss of sub_nsw pattern.
virtual bool preferABDSToABSWithNSW(EVT VT) const {
return true;
}
// Return true if the target wants to transform Op(Splat(X)) -> Splat(Op(X))
virtual bool preferScalarizeSplat(SDNode *N) const { return true; }
/// Return true if the target wants to use the optimization that
/// turns ext(promotableInst1(...(promotableInstN(load)))) into
/// promotedInst1(...(promotedInstN(ext(load)))).
bool enableExtLdPromotion() const { return EnableExtLdPromotion; }
/// Return true if the target can combine store(extractelement VectorTy,
/// Idx).
/// \p Cost[out] gives the cost of that transformation when this is true.
virtual bool canCombineStoreAndExtract(Type *VectorTy, Value *Idx,
unsigned &Cost) const {
return false;
}
/// Return true if inserting a scalar into a variable element of an undef
/// vector is more efficiently handled by splatting the scalar instead.
virtual bool shouldSplatInsEltVarIndex(EVT) const {
return false;
}
/// Return true if target always benefits from combining into FMA for a
/// given value type. This must typically return false on targets where FMA
/// takes more cycles to execute than FADD.
virtual bool enableAggressiveFMAFusion(EVT VT) const { return false; }
/// Return true if target always benefits from combining into FMA for a
/// given value type. This must typically return false on targets where FMA
/// takes more cycles to execute than FADD.
virtual bool enableAggressiveFMAFusion(LLT Ty) const { return false; }
/// Return the ValueType of the result of SETCC operations.
virtual EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
EVT VT) const;
/// Return the ValueType for comparison libcalls. Comparison libcalls include
/// floating point comparison calls, and Ordered/Unordered check calls on
/// floating point numbers.
virtual
MVT::SimpleValueType getCmpLibcallReturnType() const;
/// For targets without i1 registers, this gives the nature of the high-bits
/// of boolean values held in types wider than i1.
///
/// "Boolean values" are special true/false values produced by nodes like
/// SETCC and consumed (as the condition) by nodes like SELECT and BRCOND.
/// Not to be confused with general values promoted from i1. Some cpus
/// distinguish between vectors of boolean and scalars; the isVec parameter
/// selects between the two kinds. For example on X86 a scalar boolean should
/// be zero extended from i1, while the elements of a vector of booleans
/// should be sign extended from i1.
///
/// Some cpus also treat floating point types the same way as they treat
/// vectors instead of the way they treat scalars.
BooleanContent getBooleanContents(bool isVec, bool isFloat) const {
if (isVec)
return BooleanVectorContents;
return isFloat ? BooleanFloatContents : BooleanContents;
}
BooleanContent getBooleanContents(EVT Type) const {
return getBooleanContents(Type.isVector(), Type.isFloatingPoint());
}
/// Promote the given target boolean to a target boolean of the given type.
/// A target boolean is an integer value, not necessarily of type i1, the bits
/// of which conform to getBooleanContents.
///
/// ValVT is the type of values that produced the boolean.
SDValue promoteTargetBoolean(SelectionDAG &DAG, SDValue Bool,
EVT ValVT) const {
SDLoc dl(Bool);
EVT BoolVT =
getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), ValVT);
ISD::NodeType ExtendCode = getExtendForContent(getBooleanContents(ValVT));
return DAG.getNode(ExtendCode, dl, BoolVT, Bool);
}
/// Return target scheduling preference.
Sched::Preference getSchedulingPreference() const {
return SchedPreferenceInfo;
}
/// Some scheduler, e.g. hybrid, can switch to different scheduling heuristics
/// for different nodes. This function returns the preference (or none) for
/// the given node.
virtual Sched::Preference getSchedulingPreference(SDNode *) const {
return Sched::None;
}
/// Return the register class that should be used for the specified value
/// type.
virtual const TargetRegisterClass *getRegClassFor(MVT VT, bool isDivergent = false) const {
(void)isDivergent;
const TargetRegisterClass *RC = RegClassForVT[VT.SimpleTy];
assert(RC && "This value type is not natively supported!");
return RC;
}
/// Allows target to decide about the register class of the
/// specific value that is live outside the defining block.
/// Returns true if the value needs uniform register class.
virtual bool requiresUniformRegister(MachineFunction &MF,
const Value *) const {
return false;
}
/// Return the 'representative' register class for the specified value
/// type.
///
/// The 'representative' register class is the largest legal super-reg
/// register class for the register class of the value type. For example, on
/// i386 the rep register class for i8, i16, and i32 are GR32; while the rep
/// register class is GR64 on x86_64.
virtual const TargetRegisterClass *getRepRegClassFor(MVT VT) const {
const TargetRegisterClass *RC = RepRegClassForVT[VT.SimpleTy];
return RC;
}
/// Return the cost of the 'representative' register class for the specified
/// value type.
virtual uint8_t getRepRegClassCostFor(MVT VT) const {
return RepRegClassCostForVT[VT.SimpleTy];
}
/// Return the preferred strategy to legalize tihs SHIFT instruction, with
/// \p ExpansionFactor being the recursion depth - how many expansion needed.
enum class ShiftLegalizationStrategy {
ExpandToParts,
ExpandThroughStack,
LowerToLibcall
};
virtual ShiftLegalizationStrategy
preferredShiftLegalizationStrategy(SelectionDAG &DAG, SDNode *N,
unsigned ExpansionFactor) const {
if (ExpansionFactor == 1)
return ShiftLegalizationStrategy::ExpandToParts;
return ShiftLegalizationStrategy::ExpandThroughStack;
}
/// Return true if the target has native support for the specified value type.
/// This means that it has a register that directly holds it without
/// promotions or expansions.
bool isTypeLegal(EVT VT) const {
assert(!VT.isSimple() ||
(unsigned)VT.getSimpleVT().SimpleTy < std::size(RegClassForVT));
return VT.isSimple() && RegClassForVT[VT.getSimpleVT().SimpleTy] != nullptr;
}
class ValueTypeActionImpl {
/// ValueTypeActions - For each value type, keep a LegalizeTypeAction enum
/// that indicates how instruction selection should deal with the type.
LegalizeTypeAction ValueTypeActions[MVT::VALUETYPE_SIZE];
public:
ValueTypeActionImpl() {
std::fill(std::begin(ValueTypeActions), std::end(ValueTypeActions),
TypeLegal);
}
LegalizeTypeAction getTypeAction(MVT VT) const {
return ValueTypeActions[VT.SimpleTy];
}
void setTypeAction(MVT VT, LegalizeTypeAction Action) {
ValueTypeActions[VT.SimpleTy] = Action;
}
};
const ValueTypeActionImpl &getValueTypeActions() const {
return ValueTypeActions;
}
/// Return pair that represents the legalization kind (first) that needs to
/// happen to EVT (second) in order to type-legalize it.
///
/// First: how we should legalize values of this type, either it is already
/// legal (return 'Legal') or we need to promote it to a larger type (return
/// 'Promote'), or we need to expand it into multiple registers of smaller
/// integer type (return 'Expand'). 'Custom' is not an option.
///
/// Second: for types supported by the target, this is an identity function.
/// For types that must be promoted to larger types, this returns the larger
/// type to promote to. For integer types that are larger than the largest
/// integer register, this contains one step in the expansion to get to the
/// smaller register. For illegal floating point types, this returns the
/// integer type to transform to.
LegalizeKind getTypeConversion(LLVMContext &Context, EVT VT) const;
/// Return how we should legalize values of this type, either it is already
/// legal (return 'Legal') or we need to promote it to a larger type (return
/// 'Promote'), or we need to expand it into multiple registers of smaller
/// integer type (return 'Expand'). 'Custom' is not an option.
LegalizeTypeAction getTypeAction(LLVMContext &Context, EVT VT) const {
return getTypeConversion(Context, VT).first;
}
LegalizeTypeAction getTypeAction(MVT VT) const {
return ValueTypeActions.getTypeAction(VT);
}
/// For types supported by the target, this is an identity function. For
/// types that must be promoted to larger types, this returns the larger type
/// to promote to. For integer types that are larger than the largest integer
/// register, this contains one step in the expansion to get to the smaller
/// register. For illegal floating point types, this returns the integer type
/// to transform to.
virtual EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const {
return getTypeConversion(Context, VT).second;
}
/// For types supported by the target, this is an identity function. For
/// types that must be expanded (i.e. integer types that are larger than the
/// largest integer register or illegal floating point types), this returns
/// the largest legal type it will be expanded to.
EVT getTypeToExpandTo(LLVMContext &Context, EVT VT) const {
assert(!VT.isVector());
while (true) {
switch (getTypeAction(Context, VT)) {
case TypeLegal:
return VT;
case TypeExpandInteger:
VT = getTypeToTransformTo(Context, VT);
break;
default:
llvm_unreachable("Type is not legal nor is it to be expanded!");
}
}
}
/// Vector types are broken down into some number of legal first class types.
/// For example, EVT::v8f32 maps to 2 EVT::v4f32 with Altivec or SSE1, or 8
/// promoted EVT::f64 values with the X86 FP stack. Similarly, EVT::v2i64
/// turns into 4 EVT::i32 values with both PPC and X86.
///
/// This method returns the number of registers needed, and the VT for each
/// register. It also returns the VT and quantity of the intermediate values
/// before they are promoted/expanded.
unsigned getVectorTypeBreakdown(LLVMContext &Context, EVT VT,
EVT &IntermediateVT,
unsigned &NumIntermediates,
MVT &RegisterVT) const;
/// Certain targets such as MIPS require that some types such as vectors are
/// always broken down into scalars in some contexts. This occurs even if the
/// vector type is legal.
virtual unsigned getVectorTypeBreakdownForCallingConv(
LLVMContext &Context, CallingConv::ID CC, EVT VT, EVT &IntermediateVT,
unsigned &NumIntermediates, MVT &RegisterVT) const {
return getVectorTypeBreakdown(Context, VT, IntermediateVT, NumIntermediates,
RegisterVT);
}
struct IntrinsicInfo {
unsigned opc = 0; // target opcode
EVT memVT; // memory VT
// value representing memory location
PointerUnion<const Value *, const PseudoSourceValue *> ptrVal;
// Fallback address space for use if ptrVal is nullptr. std::nullopt means
// unknown address space.
std::optional<unsigned> fallbackAddressSpace;
int offset = 0; // offset off of ptrVal
uint64_t size = 0; // the size of the memory location
// (taken from memVT if zero)
MaybeAlign align = Align(1); // alignment
MachineMemOperand::Flags flags = MachineMemOperand::MONone;
IntrinsicInfo() = default;
};
/// Given an intrinsic, checks if on the target the intrinsic will need to map
/// to a MemIntrinsicNode (touches memory). If this is the case, it returns
/// true and store the intrinsic information into the IntrinsicInfo that was
/// passed to the function.
virtual bool getTgtMemIntrinsic(IntrinsicInfo &, const CallInst &,
MachineFunction &,
unsigned /*Intrinsic*/) const {
return false;
}
/// Returns true if the target can instruction select the specified FP
/// immediate natively. If false, the legalizer will materialize the FP
/// immediate as a load from a constant pool.
virtual bool isFPImmLegal(const APFloat & /*Imm*/, EVT /*VT*/,
bool ForCodeSize = false) const {
return false;
}
/// Targets can use this to indicate that they only support *some*
/// VECTOR_SHUFFLE operations, those with specific masks. By default, if a
/// target supports the VECTOR_SHUFFLE node, all mask values are assumed to be
/// legal.
virtual bool isShuffleMaskLegal(ArrayRef<int> /*Mask*/, EVT /*VT*/) const {
return true;
}
/// Returns true if the operation can trap for the value type.
///
/// VT must be a legal type. By default, we optimistically assume most
/// operations don't trap except for integer divide and remainder.
virtual bool canOpTrap(unsigned Op, EVT VT) const;
/// Similar to isShuffleMaskLegal. Targets can use this to indicate if there
/// is a suitable VECTOR_SHUFFLE that can be used to replace a VAND with a
/// constant pool entry.
virtual bool isVectorClearMaskLegal(ArrayRef<int> /*Mask*/,
EVT /*VT*/) const {
return false;
}
/// How to legalize this custom operation?
virtual LegalizeAction getCustomOperationAction(SDNode &Op) const {
return Legal;
}
/// Return how this operation should be treated: either it is legal, needs to
/// be promoted to a larger size, needs to be expanded to some other code
/// sequence, or the target has a custom expander for it.
LegalizeAction getOperationAction(unsigned Op, EVT VT) const {
if (VT.isExtended()) return Expand;
// If a target-specific SDNode requires legalization, require the target
// to provide custom legalization for it.
if (Op >= std::size(OpActions[0]))
return Custom;
return OpActions[(unsigned)VT.getSimpleVT().SimpleTy][Op];
}
/// Custom method defined by each target to indicate if an operation which
/// may require a scale is supported natively by the target.
/// If not, the operation is illegal.
virtual bool isSupportedFixedPointOperation(unsigned Op, EVT VT,
unsigned Scale) const {
return false;
}
/// Some fixed point operations may be natively supported by the target but
/// only for specific scales. This method allows for checking
/// if the width is supported by the target for a given operation that may
/// depend on scale.
LegalizeAction getFixedPointOperationAction(unsigned Op, EVT VT,
unsigned Scale) const {
auto Action = getOperationAction(Op, VT);
if (Action != Legal)
return Action;
// This operation is supported in this type but may only work on specific
// scales.
bool Supported;
switch (Op) {
default:
llvm_unreachable("Unexpected fixed point operation.");
case ISD::SMULFIX:
case ISD::SMULFIXSAT:
case ISD::UMULFIX:
case ISD::UMULFIXSAT:
case ISD::SDIVFIX:
case ISD::SDIVFIXSAT:
case ISD::UDIVFIX:
case ISD::UDIVFIXSAT:
Supported = isSupportedFixedPointOperation(Op, VT, Scale);
break;
}
return Supported ? Action : Expand;
}
// If Op is a strict floating-point operation, return the result
// of getOperationAction for the equivalent non-strict operation.
LegalizeAction getStrictFPOperationAction(unsigned Op, EVT VT) const {
unsigned EqOpc;
switch (Op) {
default: llvm_unreachable("Unexpected FP pseudo-opcode");
#define DAG_INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC, DAGN) \
case ISD::STRICT_##DAGN: EqOpc = ISD::DAGN; break;
#define CMP_INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC, DAGN) \
case ISD::STRICT_##DAGN: EqOpc = ISD::SETCC; break;
#include "llvm/IR/ConstrainedOps.def"
}
return getOperationAction(EqOpc, VT);
}
/// Return true if the specified operation is legal on this target or can be
/// made legal with custom lowering. This is used to help guide high-level
/// lowering decisions. LegalOnly is an optional convenience for code paths
/// traversed pre and post legalisation.
bool isOperationLegalOrCustom(unsigned Op, EVT VT,
bool LegalOnly = false) const {
if (LegalOnly)
return isOperationLegal(Op, VT);
return (VT == MVT::Other || isTypeLegal(VT)) &&
(getOperationAction(Op, VT) == Legal ||
getOperationAction(Op, VT) == Custom);
}
/// Return true if the specified operation is legal on this target or can be
/// made legal using promotion. This is used to help guide high-level lowering
/// decisions. LegalOnly is an optional convenience for code paths traversed
/// pre and post legalisation.
bool isOperationLegalOrPromote(unsigned Op, EVT VT,
bool LegalOnly = false) const {
if (LegalOnly)
return isOperationLegal(Op, VT);
return (VT == MVT::Other || isTypeLegal(VT)) &&
(getOperationAction(Op, VT) == Legal ||
getOperationAction(Op, VT) == Promote);
}
/// Return true if the specified operation is legal on this target or can be
/// made legal with custom lowering or using promotion. This is used to help
/// guide high-level lowering decisions. LegalOnly is an optional convenience
/// for code paths traversed pre and post legalisation.
bool isOperationLegalOrCustomOrPromote(unsigned Op, EVT VT,
bool LegalOnly = false) const {
if (LegalOnly)
return isOperationLegal(Op, VT);
return (VT == MVT::Other || isTypeLegal(VT)) &&
(getOperationAction(Op, VT) == Legal ||
getOperationAction(Op, VT) == Custom ||
getOperationAction(Op, VT) == Promote);
}
/// Return true if the operation uses custom lowering, regardless of whether
/// the type is legal or not.
bool isOperationCustom(unsigned Op, EVT VT) const {
return getOperationAction(Op, VT) == Custom;
}
/// Return true if lowering to a jump table is allowed.
virtual bool areJTsAllowed(const Function *Fn) const {
if (Fn->getFnAttribute("no-jump-tables").getValueAsBool())
return false;
return isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
}
/// Check whether the range [Low,High] fits in a machine word.
bool rangeFitsInWord(const APInt &Low, const APInt &High,
const DataLayout &DL) const {
// FIXME: Using the pointer type doesn't seem ideal.
uint64_t BW = DL.getIndexSizeInBits(0u);
uint64_t Range = (High - Low).getLimitedValue(UINT64_MAX - 1) + 1;
return Range <= BW;
}
/// Return true if lowering to a jump table is suitable for a set of case
/// clusters which may contain \p NumCases cases, \p Range range of values.
virtual bool isSuitableForJumpTable(const SwitchInst *SI, uint64_t NumCases,
uint64_t Range, ProfileSummaryInfo *PSI,
BlockFrequencyInfo *BFI) const;
/// Returns preferred type for switch condition.
virtual MVT getPreferredSwitchConditionType(LLVMContext &Context,
EVT ConditionVT) const;
/// Return true if lowering to a bit test is suitable for a set of case
/// clusters which contains \p NumDests unique destinations, \p Low and
/// \p High as its lowest and highest case values, and expects \p NumCmps
/// case value comparisons. Check if the number of destinations, comparison
/// metric, and range are all suitable.
bool isSuitableForBitTests(unsigned NumDests, unsigned NumCmps,
const APInt &Low, const APInt &High,
const DataLayout &DL) const {
// FIXME: I don't think NumCmps is the correct metric: a single case and a
// range of cases both require only one branch to lower. Just looking at the
// number of clusters and destinations should be enough to decide whether to
// build bit tests.
// To lower a range with bit tests, the range must fit the bitwidth of a
// machine word.
if (!rangeFitsInWord(Low, High, DL))
return false;
// Decide whether it's profitable to lower this range with bit tests. Each
// destination requires a bit test and branch, and there is an overall range
// check branch. For a small number of clusters, separate comparisons might
// be cheaper, and for many destinations, splitting the range might be
// better.
return (NumDests == 1 && NumCmps >= 3) || (NumDests == 2 && NumCmps >= 5) ||
(NumDests == 3 && NumCmps >= 6);
}
/// Return true if the specified operation is illegal on this target or
/// unlikely to be made legal with custom lowering. This is used to help guide
/// high-level lowering decisions.
bool isOperationExpand(unsigned Op, EVT VT) const {
return (!isTypeLegal(VT) || getOperationAction(Op, VT) == Expand);
}
/// Return true if the specified operation is legal on this target.
bool isOperationLegal(unsigned Op, EVT VT) const {
return (VT == MVT::Other || isTypeLegal(VT)) &&
getOperationAction(Op, VT) == Legal;
}
/// Return how this load with extension should be treated: either it is legal,
/// needs to be promoted to a larger size, needs to be expanded to some other
/// code sequence, or the target has a custom expander for it.
LegalizeAction getLoadExtAction(unsigned ExtType, EVT ValVT,
EVT MemVT) const {
if (ValVT.isExtended() || MemVT.isExtended()) return Expand;
unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy;
unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy;
assert(ExtType < ISD::LAST_LOADEXT_TYPE && ValI < MVT::VALUETYPE_SIZE &&
MemI < MVT::VALUETYPE_SIZE && "Table isn't big enough!");
unsigned Shift = 4 * ExtType;
return (LegalizeAction)((LoadExtActions[ValI][MemI] >> Shift) & 0xf);
}
/// Return true if the specified load with extension is legal on this target.
bool isLoadExtLegal(unsigned ExtType, EVT ValVT, EVT MemVT) const {
return getLoadExtAction(ExtType, ValVT, MemVT) == Legal;
}
/// Return true if the specified load with extension is legal or custom
/// on this target.
bool isLoadExtLegalOrCustom(unsigned ExtType, EVT ValVT, EVT MemVT) const {
return getLoadExtAction(ExtType, ValVT, MemVT) == Legal ||
getLoadExtAction(ExtType, ValVT, MemVT) == Custom;
}
/// Return how this store with truncation should be treated: either it is
/// legal, needs to be promoted to a larger size, needs to be expanded to some
/// other code sequence, or the target has a custom expander for it.
LegalizeAction getTruncStoreAction(EVT ValVT, EVT MemVT) const {
if (ValVT.isExtended() || MemVT.isExtended()) return Expand;
unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy;
unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy;
assert(ValI < MVT::VALUETYPE_SIZE && MemI < MVT::VALUETYPE_SIZE &&
"Table isn't big enough!");
return TruncStoreActions[ValI][MemI];
}
/// Return true if the specified store with truncation is legal on this
/// target.
bool isTruncStoreLegal(EVT ValVT, EVT MemVT) const {
return isTypeLegal(ValVT) && getTruncStoreAction(ValVT, MemVT) == Legal;
}
/// Return true if the specified store with truncation has solution on this
/// target.
bool isTruncStoreLegalOrCustom(EVT ValVT, EVT MemVT) const {
return isTypeLegal(ValVT) &&
(getTruncStoreAction(ValVT, MemVT) == Legal ||
getTruncStoreAction(ValVT, MemVT) == Custom);
}
virtual bool canCombineTruncStore(EVT ValVT, EVT MemVT,
bool LegalOnly) const {
if (LegalOnly)
return isTruncStoreLegal(ValVT, MemVT);
return isTruncStoreLegalOrCustom(ValVT, MemVT);
}
/// Return how the indexed load should be treated: either it is legal, needs
/// to be promoted to a larger size, needs to be expanded to some other code
/// sequence, or the target has a custom expander for it.
LegalizeAction getIndexedLoadAction(unsigned IdxMode, MVT VT) const {
return getIndexedModeAction(IdxMode, VT, IMAB_Load);
}
/// Return true if the specified indexed load is legal on this target.
bool isIndexedLoadLegal(unsigned IdxMode, EVT VT) const {
return VT.isSimple() &&
(getIndexedLoadAction(IdxMode, VT.getSimpleVT()) == Legal ||
getIndexedLoadAction(IdxMode, VT.getSimpleVT()) == Custom);
}
/// Return how the indexed store should be treated: either it is legal, needs
/// to be promoted to a larger size, needs to be expanded to some other code
/// sequence, or the target has a custom expander for it.
LegalizeAction getIndexedStoreAction(unsigned IdxMode, MVT VT) const {
return getIndexedModeAction(IdxMode, VT, IMAB_Store);
}
/// Return true if the specified indexed load is legal on this target.
bool isIndexedStoreLegal(unsigned IdxMode, EVT VT) const {
return VT.isSimple() &&
(getIndexedStoreAction(IdxMode, VT.getSimpleVT()) == Legal ||
getIndexedStoreAction(IdxMode, VT.getSimpleVT()) == Custom);
}
/// Return how the indexed load should be treated: either it is legal, needs
/// to be promoted to a larger size, needs to be expanded to some other code
/// sequence, or the target has a custom expander for it.
LegalizeAction getIndexedMaskedLoadAction(unsigned IdxMode, MVT VT) const {
return getIndexedModeAction(IdxMode, VT, IMAB_MaskedLoad);
}
/// Return true if the specified indexed load is legal on this target.
bool isIndexedMaskedLoadLegal(unsigned IdxMode, EVT VT) const {
return VT.isSimple() &&
(getIndexedMaskedLoadAction(IdxMode, VT.getSimpleVT()) == Legal ||
getIndexedMaskedLoadAction(IdxMode, VT.getSimpleVT()) == Custom);
}
/// Return how the indexed store should be treated: either it is legal, needs
/// to be promoted to a larger size, needs to be expanded to some other code
/// sequence, or the target has a custom expander for it.
LegalizeAction getIndexedMaskedStoreAction(unsigned IdxMode, MVT VT) const {
return getIndexedModeAction(IdxMode, VT, IMAB_MaskedStore);
}
/// Return true if the specified indexed load is legal on this target.
bool isIndexedMaskedStoreLegal(unsigned IdxMode, EVT VT) const {
return VT.isSimple() &&
(getIndexedMaskedStoreAction(IdxMode, VT.getSimpleVT()) == Legal ||
getIndexedMaskedStoreAction(IdxMode, VT.getSimpleVT()) == Custom);
}
/// Returns true if the index type for a masked gather/scatter requires
/// extending
virtual bool shouldExtendGSIndex(EVT VT, EVT &EltTy) const { return false; }
// Returns true if VT is a legal index type for masked gathers/scatters
// on this target
virtual bool shouldRemoveExtendFromGSIndex(EVT IndexVT, EVT DataVT) const {
return false;
}
// Return true if the target supports a scatter/gather instruction with
// indices which are scaled by the particular value. Note that all targets
// must by definition support scale of 1.
virtual bool isLegalScaleForGatherScatter(uint64_t Scale,
uint64_t ElemSize) const {
// MGATHER/MSCATTER are only required to support scaling by one or by the
// element size.
if (Scale != ElemSize && Scale != 1)
return false;
return true;
}
/// Return how the condition code should be treated: either it is legal, needs
/// to be expanded to some other code sequence, or the target has a custom
/// expander for it.
LegalizeAction
getCondCodeAction(ISD::CondCode CC, MVT VT) const {
assert((unsigned)CC < std::size(CondCodeActions) &&
((unsigned)VT.SimpleTy >> 3) < std::size(CondCodeActions[0]) &&
"Table isn't big enough!");
// See setCondCodeAction for how this is encoded.
uint32_t Shift = 4 * (VT.SimpleTy & 0x7);
uint32_t Value = CondCodeActions[CC][VT.SimpleTy >> 3];
LegalizeAction Action = (LegalizeAction) ((Value >> Shift) & 0xF);
assert(Action != Promote && "Can't promote condition code!");
return Action;
}
/// Return true if the specified condition code is legal on this target.
bool isCondCodeLegal(ISD::CondCode CC, MVT VT) const {
return getCondCodeAction(CC, VT) == Legal;
}
/// Return true if the specified condition code is legal or custom on this
/// target.
bool isCondCodeLegalOrCustom(ISD::CondCode CC, MVT VT) const {
return getCondCodeAction(CC, VT) == Legal ||
getCondCodeAction(CC, VT) == Custom;
}
/// If the action for this operation is to promote, this method returns the
/// ValueType to promote to.
MVT getTypeToPromoteTo(unsigned Op, MVT VT) const {
assert(getOperationAction(Op, VT) == Promote &&
"This operation isn't promoted!");
// See if this has an explicit type specified.
std::map<std::pair<unsigned, MVT::SimpleValueType>,
MVT::SimpleValueType>::const_iterator PTTI =
PromoteToType.find(std::make_pair(Op, VT.SimpleTy));
if (PTTI != PromoteToType.end()) return PTTI->second;
assert((VT.isInteger() || VT.isFloatingPoint()) &&
"Cannot autopromote this type, add it with AddPromotedToType.");
MVT NVT = VT;
do {
NVT = (MVT::SimpleValueType)(NVT.SimpleTy+1);
assert(NVT.isInteger() == VT.isInteger() && NVT != MVT::isVoid &&
"Didn't find type to promote to!");
} while (!isTypeLegal(NVT) ||
getOperationAction(Op, NVT) == Promote);
return NVT;
}
virtual EVT getAsmOperandValueType(const DataLayout &DL, Type *Ty,
bool AllowUnknown = false) const {
return getValueType(DL, Ty, AllowUnknown);
}
/// Return the EVT corresponding to this LLVM type. This is fixed by the LLVM
/// operations except for the pointer size. If AllowUnknown is true, this
/// will return MVT::Other for types with no EVT counterpart (e.g. structs),
/// otherwise it will assert.
EVT getValueType(const DataLayout &DL, Type *Ty,
bool AllowUnknown = false) const {
// Lower scalar pointers to native pointer types.
if (auto *PTy = dyn_cast<PointerType>(Ty))
return getPointerTy(DL, PTy->getAddressSpace());
if (auto *VTy = dyn_cast<VectorType>(Ty)) {
Type *EltTy = VTy->getElementType();
// Lower vectors of pointers to native pointer types.
if (auto *PTy = dyn_cast<PointerType>(EltTy)) {
EVT PointerTy(getPointerTy(DL, PTy->getAddressSpace()));
EltTy = PointerTy.getTypeForEVT(Ty->getContext());
}
return EVT::getVectorVT(Ty->getContext(), EVT::getEVT(EltTy, false),
VTy->getElementCount());
}
return EVT::getEVT(Ty, AllowUnknown);
}
EVT getMemValueType(const DataLayout &DL, Type *Ty,
bool AllowUnknown = false) const {
// Lower scalar pointers to native pointer types.
if (auto *PTy = dyn_cast<PointerType>(Ty))
return getPointerMemTy(DL, PTy->getAddressSpace());
if (auto *VTy = dyn_cast<VectorType>(Ty)) {
Type *EltTy = VTy->getElementType();
if (auto *PTy = dyn_cast<PointerType>(EltTy)) {
EVT PointerTy(getPointerMemTy(DL, PTy->getAddressSpace()));
EltTy = PointerTy.getTypeForEVT(Ty->getContext());
}
return EVT::getVectorVT(Ty->getContext(), EVT::getEVT(EltTy, false),
VTy->getElementCount());
}
return getValueType(DL, Ty, AllowUnknown);
}
/// Return the MVT corresponding to this LLVM type. See getValueType.
MVT getSimpleValueType(const DataLayout &DL, Type *Ty,
bool AllowUnknown = false) const {
return getValueType(DL, Ty, AllowUnknown).getSimpleVT();
}
/// Return the desired alignment for ByVal or InAlloca aggregate function
/// arguments in the caller parameter area. This is the actual alignment, not
/// its logarithm.
virtual uint64_t getByValTypeAlignment(Type *Ty, const DataLayout &DL) const;
/// Return the type of registers that this ValueType will eventually require.
MVT getRegisterType(MVT VT) const {
assert((unsigned)VT.SimpleTy < std::size(RegisterTypeForVT));
return RegisterTypeForVT[VT.SimpleTy];
}
/// Return the type of registers that this ValueType will eventually require.
MVT getRegisterType(LLVMContext &Context, EVT VT) const {
if (VT.isSimple())
return getRegisterType(VT.getSimpleVT());
if (VT.isVector()) {
EVT VT1;
MVT RegisterVT;
unsigned NumIntermediates;
(void)getVectorTypeBreakdown(Context, VT, VT1,
NumIntermediates, RegisterVT);
return RegisterVT;
}
if (VT.isInteger()) {
return getRegisterType(Context, getTypeToTransformTo(Context, VT));
}
llvm_unreachable("Unsupported extended type!");
}
/// Return the number of registers that this ValueType will eventually
/// require.
///
/// This is one for any types promoted to live in larger registers, but may be
/// more than one for types (like i64) that are split into pieces. For types
/// like i140, which are first promoted then expanded, it is the number of
/// registers needed to hold all the bits of the original type. For an i140
/// on a 32 bit machine this means 5 registers.
///
/// RegisterVT may be passed as a way to override the default settings, for
/// instance with i128 inline assembly operands on SystemZ.
virtual unsigned
getNumRegisters(LLVMContext &Context, EVT VT,
std::optional<MVT> RegisterVT = std::nullopt) const {
if (VT.isSimple()) {
assert((unsigned)VT.getSimpleVT().SimpleTy <
std::size(NumRegistersForVT));
return NumRegistersForVT[VT.getSimpleVT().SimpleTy];
}
if (VT.isVector()) {
EVT VT1;
MVT VT2;
unsigned NumIntermediates;
return getVectorTypeBreakdown(Context, VT, VT1, NumIntermediates, VT2);
}
if (VT.isInteger()) {
unsigned BitWidth = VT.getSizeInBits();
unsigned RegWidth = getRegisterType(Context, VT).getSizeInBits();
return (BitWidth + RegWidth - 1) / RegWidth;
}
llvm_unreachable("Unsupported extended type!");
}
/// Certain combinations of ABIs, Targets and features require that types
/// are legal for some operations and not for other operations.
/// For MIPS all vector types must be passed through the integer register set.
virtual MVT getRegisterTypeForCallingConv(LLVMContext &Context,
CallingConv::ID CC, EVT VT) const {
return getRegisterType(Context, VT);
}
/// Certain targets require unusual breakdowns of certain types. For MIPS,
/// this occurs when a vector type is used, as vector are passed through the
/// integer register set.
virtual unsigned getNumRegistersForCallingConv(LLVMContext &Context,
CallingConv::ID CC,
EVT VT) const {
return getNumRegisters(Context, VT);
}
/// Certain targets have context sensitive alignment requirements, where one
/// type has the alignment requirement of another type.
virtual Align getABIAlignmentForCallingConv(Type *ArgTy,
const DataLayout &DL) const {
return DL.getABITypeAlign(ArgTy);
}
/// If true, then instruction selection should seek to shrink the FP constant
/// of the specified type to a smaller type in order to save space and / or
/// reduce runtime.
virtual bool ShouldShrinkFPConstant(EVT) const { return true; }
/// Return true if it is profitable to reduce a load to a smaller type.
/// Example: (i16 (trunc (i32 (load x))) -> i16 load x
virtual bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy,
EVT NewVT) const {
// By default, assume that it is cheaper to extract a subvector from a wide
// vector load rather than creating multiple narrow vector loads.
if (NewVT.isVector() && !Load->hasOneUse())
return false;
return true;
}
/// Return true (the default) if it is profitable to remove a sext_inreg(x)
/// where the sext is redundant, and use x directly.
virtual bool shouldRemoveRedundantExtend(SDValue Op) const { return true; }
/// When splitting a value of the specified type into parts, does the Lo
/// or Hi part come first? This usually follows the endianness, except
/// for ppcf128, where the Hi part always comes first.
bool hasBigEndianPartOrdering(EVT VT, const DataLayout &DL) const {
return DL.isBigEndian() || VT == MVT::ppcf128;
}
/// If true, the target has custom DAG combine transformations that it can
/// perform for the specified node.
bool hasTargetDAGCombine(ISD::NodeType NT) const {
assert(unsigned(NT >> 3) < std::size(TargetDAGCombineArray));
return TargetDAGCombineArray[NT >> 3] & (1 << (NT&7));
}
unsigned getGatherAllAliasesMaxDepth() const {
return GatherAllAliasesMaxDepth;
}
/// Returns the size of the platform's va_list object.
virtual unsigned getVaListSizeInBits(const DataLayout &DL) const {
return getPointerTy(DL).getSizeInBits();
}
/// Get maximum # of store operations permitted for llvm.memset
///
/// This function returns the maximum number of store operations permitted
/// to replace a call to llvm.memset. The value is set by the target at the
/// performance threshold for such a replacement. If OptSize is true,
/// return the limit for functions that have OptSize attribute.
unsigned getMaxStoresPerMemset(bool OptSize) const {
return OptSize ? MaxStoresPerMemsetOptSize : MaxStoresPerMemset;
}
/// Get maximum # of store operations permitted for llvm.memcpy
///
/// This function returns the maximum number of store operations permitted
/// to replace a call to llvm.memcpy. The value is set by the target at the
/// performance threshold for such a replacement. If OptSize is true,
/// return the limit for functions that have OptSize attribute.
unsigned getMaxStoresPerMemcpy(bool OptSize) const {
return OptSize ? MaxStoresPerMemcpyOptSize : MaxStoresPerMemcpy;
}
/// \brief Get maximum # of store operations to be glued together
///
/// This function returns the maximum number of store operations permitted
/// to glue together during lowering of llvm.memcpy. The value is set by
// the target at the performance threshold for such a replacement.
virtual unsigned getMaxGluedStoresPerMemcpy() const {
return MaxGluedStoresPerMemcpy;
}
/// Get maximum # of load operations permitted for memcmp
///
/// This function returns the maximum number of load operations permitted
/// to replace a call to memcmp. The value is set by the target at the
/// performance threshold for such a replacement. If OptSize is true,
/// return the limit for functions that have OptSize attribute.
unsigned getMaxExpandSizeMemcmp(bool OptSize) const {
return OptSize ? MaxLoadsPerMemcmpOptSize : MaxLoadsPerMemcmp;
}
/// Get maximum # of store operations permitted for llvm.memmove
///
/// This function returns the maximum number of store operations permitted
/// to replace a call to llvm.memmove. The value is set by the target at the
/// performance threshold for such a replacement. If OptSize is true,
/// return the limit for functions that have OptSize attribute.
unsigned getMaxStoresPerMemmove(bool OptSize) const {
return OptSize ? MaxStoresPerMemmoveOptSize : MaxStoresPerMemmove;
}
/// Determine if the target supports unaligned memory accesses.
///
/// This function returns true if the target allows unaligned memory accesses
/// of the specified type in the given address space. If true, it also returns
/// a relative speed of the unaligned memory access in the last argument by
/// reference. The higher the speed number the faster the operation comparing
/// to a number returned by another such call. This is used, for example, in
/// situations where an array copy/move/set is converted to a sequence of
/// store operations. Its use helps to ensure that such replacements don't
/// generate code that causes an alignment error (trap) on the target machine.
virtual bool allowsMisalignedMemoryAccesses(
EVT, unsigned AddrSpace = 0, Align Alignment = Align(1),
MachineMemOperand::Flags Flags = MachineMemOperand::MONone,
unsigned * /*Fast*/ = nullptr) const {
return false;
}
/// LLT handling variant.
virtual bool allowsMisalignedMemoryAccesses(
LLT, unsigned AddrSpace = 0, Align Alignment = Align(1),
MachineMemOperand::Flags Flags = MachineMemOperand::MONone,
unsigned * /*Fast*/ = nullptr) const {
return false;
}
/// This function returns true if the memory access is aligned or if the
/// target allows this specific unaligned memory access. If the access is
/// allowed, the optional final parameter returns a relative speed of the
/// access (as defined by the target).
bool allowsMemoryAccessForAlignment(
LLVMContext &Context, const DataLayout &DL, EVT VT,
unsigned AddrSpace = 0, Align Alignment = Align(1),
MachineMemOperand::Flags Flags = MachineMemOperand::MONone,
unsigned *Fast = nullptr) const;
/// Return true if the memory access of this type is aligned or if the target
/// allows this specific unaligned access for the given MachineMemOperand.
/// If the access is allowed, the optional final parameter returns a relative
/// speed of the access (as defined by the target).
bool allowsMemoryAccessForAlignment(LLVMContext &Context,
const DataLayout &DL, EVT VT,
const MachineMemOperand &MMO,
unsigned *Fast = nullptr) const;
/// Return true if the target supports a memory access of this type for the
/// given address space and alignment. If the access is allowed, the optional
/// final parameter returns the relative speed of the access (as defined by
/// the target).
virtual bool
allowsMemoryAccess(LLVMContext &Context, const DataLayout &DL, EVT VT,
unsigned AddrSpace = 0, Align Alignment = Align(1),
MachineMemOperand::Flags Flags = MachineMemOperand::MONone,
unsigned *Fast = nullptr) const;
/// Return true if the target supports a memory access of this type for the
/// given MachineMemOperand. If the access is allowed, the optional
/// final parameter returns the relative access speed (as defined by the
/// target).
bool allowsMemoryAccess(LLVMContext &Context, const DataLayout &DL, EVT VT,
const MachineMemOperand &MMO,
unsigned *Fast = nullptr) const;
/// LLT handling variant.
bool allowsMemoryAccess(LLVMContext &Context, const DataLayout &DL, LLT Ty,
const MachineMemOperand &MMO,
unsigned *Fast = nullptr) const;
/// Returns the target specific optimal type for load and store operations as
/// a result of memset, memcpy, and memmove lowering.
/// It returns EVT::Other if the type should be determined using generic
/// target-independent logic.
virtual EVT
getOptimalMemOpType(const MemOp &Op,
const AttributeList & /*FuncAttributes*/) const {
return MVT::Other;
}
/// LLT returning variant.
virtual LLT
getOptimalMemOpLLT(const MemOp &Op,
const AttributeList & /*FuncAttributes*/) const {
return LLT();
}
/// Returns true if it's safe to use load / store of the specified type to
/// expand memcpy / memset inline.
///
/// This is mostly true for all types except for some special cases. For
/// example, on X86 targets without SSE2 f64 load / store are done with fldl /
/// fstpl which also does type conversion. Note the specified type doesn't
/// have to be legal as the hook is used before type legalization.
virtual bool isSafeMemOpType(MVT /*VT*/) const { return true; }
/// Return lower limit for number of blocks in a jump table.
virtual unsigned getMinimumJumpTableEntries() const;
/// Return lower limit of the density in a jump table.
unsigned getMinimumJumpTableDensity(bool OptForSize) const;
/// Return upper limit for number of entries in a jump table.
/// Zero if no limit.
unsigned getMaximumJumpTableSize() const;
virtual bool isJumpTableRelative() const;
/// If a physical register, this specifies the register that
/// llvm.savestack/llvm.restorestack should save and restore.
Register getStackPointerRegisterToSaveRestore() const {
return StackPointerRegisterToSaveRestore;
}
/// If a physical register, this returns the register that receives the
/// exception address on entry to an EH pad.
virtual Register
getExceptionPointerRegister(const Constant *PersonalityFn) const {
return Register();
}
/// If a physical register, this returns the register that receives the
/// exception typeid on entry to a landing pad.
virtual Register
getExceptionSelectorRegister(const Constant *PersonalityFn) const {
return Register();
}
virtual bool needsFixedCatchObjects() const {
report_fatal_error("Funclet EH is not implemented for this target");
}
/// Return the minimum stack alignment of an argument.
Align getMinStackArgumentAlignment() const {
return MinStackArgumentAlignment;
}
/// Return the minimum function alignment.
Align getMinFunctionAlignment() const { return MinFunctionAlignment; }
/// Return the preferred function alignment.
Align getPrefFunctionAlignment() const { return PrefFunctionAlignment; }
/// Return the preferred loop alignment.
virtual Align getPrefLoopAlignment(MachineLoop *ML = nullptr) const;
/// Return the maximum amount of bytes allowed to be emitted when padding for
/// alignment
virtual unsigned
getMaxPermittedBytesForAlignment(MachineBasicBlock *MBB) const;
/// Should loops be aligned even when the function is marked OptSize (but not
/// MinSize).
virtual bool alignLoopsWithOptSize() const { return false; }
/// If the target has a standard location for the stack protector guard,
/// returns the address of that location. Otherwise, returns nullptr.
/// DEPRECATED: please override useLoadStackGuardNode and customize
/// LOAD_STACK_GUARD, or customize \@llvm.stackguard().
virtual Value *getIRStackGuard(IRBuilderBase &IRB) const;
/// Inserts necessary declarations for SSP (stack protection) purpose.
/// Should be used only when getIRStackGuard returns nullptr.
virtual void insertSSPDeclarations(Module &M) const;
/// Return the variable that's previously inserted by insertSSPDeclarations,
/// if any, otherwise return nullptr. Should be used only when
/// getIRStackGuard returns nullptr.
virtual Value *getSDagStackGuard(const Module &M) const;
/// If this function returns true, stack protection checks should XOR the
/// frame pointer (or whichever pointer is used to address locals) into the
/// stack guard value before checking it. getIRStackGuard must return nullptr
/// if this returns true.
virtual bool useStackGuardXorFP() const { return false; }
/// If the target has a standard stack protection check function that
/// performs validation and error handling, returns the function. Otherwise,
/// returns nullptr. Must be previously inserted by insertSSPDeclarations.
/// Should be used only when getIRStackGuard returns nullptr.
virtual Function *getSSPStackGuardCheck(const Module &M) const;
/// \returns true if a constant G_UBFX is legal on the target.
virtual bool isConstantUnsignedBitfieldExtractLegal(unsigned Opc, LLT Ty1,
LLT Ty2) const {
return false;
}
protected:
Value *getDefaultSafeStackPointerLocation(IRBuilderBase &IRB,
bool UseTLS) const;
public:
/// Returns the target-specific address of the unsafe stack pointer.
virtual Value *getSafeStackPointerLocation(IRBuilderBase &IRB) const;
/// Returns the name of the symbol used to emit stack probes or the empty
/// string if not applicable.
virtual bool hasStackProbeSymbol(const MachineFunction &MF) const { return false; }
virtual bool hasInlineStackProbe(const MachineFunction &MF) const { return false; }
virtual StringRef getStackProbeSymbolName(const MachineFunction &MF) const {
return "";
}
/// Returns true if a cast from SrcAS to DestAS is "cheap", such that e.g. we
/// are happy to sink it into basic blocks. A cast may be free, but not
/// necessarily a no-op. e.g. a free truncate from a 64-bit to 32-bit pointer.
virtual bool isFreeAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const;
/// Return true if the pointer arguments to CI should be aligned by aligning
/// the object whose address is being passed. If so then MinSize is set to the
/// minimum size the object must be to be aligned and PrefAlign is set to the
/// preferred alignment.
virtual bool shouldAlignPointerArgs(CallInst * /*CI*/, unsigned & /*MinSize*/,
Align & /*PrefAlign*/) const {
return false;
}
//===--------------------------------------------------------------------===//
/// \name Helpers for TargetTransformInfo implementations
/// @{
/// Get the ISD node that corresponds to the Instruction class opcode.
int InstructionOpcodeToISD(unsigned Opcode) const;
/// @}
//===--------------------------------------------------------------------===//
/// \name Helpers for atomic expansion.
/// @{
/// Returns the maximum atomic operation size (in bits) supported by
/// the backend. Atomic operations greater than this size (as well
/// as ones that are not naturally aligned), will be expanded by
/// AtomicExpandPass into an __atomic_* library call.
unsigned getMaxAtomicSizeInBitsSupported() const {
return MaxAtomicSizeInBitsSupported;
}
/// Returns the size in bits of the maximum div/rem the backend supports.
/// Larger operations will be expanded by ExpandLargeDivRem.
unsigned getMaxDivRemBitWidthSupported() const {
return MaxDivRemBitWidthSupported;
}
/// Returns the size in bits of the maximum larget fp convert the backend
/// supports. Larger operations will be expanded by ExpandLargeFPConvert.
unsigned getMaxLargeFPConvertBitWidthSupported() const {
return MaxLargeFPConvertBitWidthSupported;
}
/// Returns the size of the smallest cmpxchg or ll/sc instruction
/// the backend supports. Any smaller operations are widened in
/// AtomicExpandPass.
///
/// Note that *unlike* operations above the maximum size, atomic ops
/// are still natively supported below the minimum; they just
/// require a more complex expansion.
unsigned getMinCmpXchgSizeInBits() const { return MinCmpXchgSizeInBits; }
/// Whether the target supports unaligned atomic operations.
bool supportsUnalignedAtomics() const { return SupportsUnalignedAtomics; }
/// Whether AtomicExpandPass should automatically insert fences and reduce
/// ordering for this atomic. This should be true for most architectures with
/// weak memory ordering. Defaults to false.
virtual bool shouldInsertFencesForAtomic(const Instruction *I) const {
return false;
}
/// Whether AtomicExpandPass should automatically insert a trailing fence
/// without reducing the ordering for this atomic. Defaults to false.
virtual bool
shouldInsertTrailingFenceForAtomicStore(const Instruction *I) const {
return false;
}
/// Perform a load-linked operation on Addr, returning a "Value *" with the
/// corresponding pointee type. This may entail some non-trivial operations to
/// truncate or reconstruct types that will be illegal in the backend. See
/// ARMISelLowering for an example implementation.
virtual Value *emitLoadLinked(IRBuilderBase &Builder, Type *ValueTy,
Value *Addr, AtomicOrdering Ord) const {
llvm_unreachable("Load linked unimplemented on this target");
}
/// Perform a store-conditional operation to Addr. Return the status of the
/// store. This should be 0 if the store succeeded, non-zero otherwise.
virtual Value *emitStoreConditional(IRBuilderBase &Builder, Value *Val,
Value *Addr, AtomicOrdering Ord) const {
llvm_unreachable("Store conditional unimplemented on this target");
}
/// Perform a masked atomicrmw using a target-specific intrinsic. This
/// represents the core LL/SC loop which will be lowered at a late stage by
/// the backend. The target-specific intrinsic returns the loaded value and
/// is not responsible for masking and shifting the result.
virtual Value *emitMaskedAtomicRMWIntrinsic(IRBuilderBase &Builder,
AtomicRMWInst *AI,
Value *AlignedAddr, Value *Incr,
Value *Mask, Value *ShiftAmt,
AtomicOrdering Ord) const {
llvm_unreachable("Masked atomicrmw expansion unimplemented on this target");
}
/// Perform a atomicrmw expansion using a target-specific way. This is
/// expected to be called when masked atomicrmw and bit test atomicrmw don't
/// work, and the target supports another way to lower atomicrmw.
virtual void emitExpandAtomicRMW(AtomicRMWInst *AI) const {
llvm_unreachable(
"Generic atomicrmw expansion unimplemented on this target");
}
/// Perform a bit test atomicrmw using a target-specific intrinsic. This
/// represents the combined bit test intrinsic which will be lowered at a late
/// stage by the backend.
virtual void emitBitTestAtomicRMWIntrinsic(AtomicRMWInst *AI) const {
llvm_unreachable(
"Bit test atomicrmw expansion unimplemented on this target");
}
/// Perform a atomicrmw which the result is only used by comparison, using a
/// target-specific intrinsic. This represents the combined atomic and compare
/// intrinsic which will be lowered at a late stage by the backend.
virtual void emitCmpArithAtomicRMWIntrinsic(AtomicRMWInst *AI) const {
llvm_unreachable(
"Compare arith atomicrmw expansion unimplemented on this target");
}
/// Perform a masked cmpxchg using a target-specific intrinsic. This
/// represents the core LL/SC loop which will be lowered at a late stage by
/// the backend. The target-specific intrinsic returns the loaded value and
/// is not responsible for masking and shifting the result.
virtual Value *emitMaskedAtomicCmpXchgIntrinsic(
IRBuilderBase &Builder, AtomicCmpXchgInst *CI, Value *AlignedAddr,
Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const {
llvm_unreachable("Masked cmpxchg expansion unimplemented on this target");
}
//===--------------------------------------------------------------------===//
/// \name KCFI check lowering.
/// @{
virtual MachineInstr *EmitKCFICheck(MachineBasicBlock &MBB,
MachineBasicBlock::instr_iterator &MBBI,
const TargetInstrInfo *TII) const {
llvm_unreachable("KCFI is not supported on this target");
}
/// @}
/// Inserts in the IR a target-specific intrinsic specifying a fence.
/// It is called by AtomicExpandPass before expanding an
/// AtomicRMW/AtomicCmpXchg/AtomicStore/AtomicLoad
/// if shouldInsertFencesForAtomic returns true.
///
/// Inst is the original atomic instruction, prior to other expansions that
/// may be performed.
///
/// This function should either return a nullptr, or a pointer to an IR-level
/// Instruction*. Even complex fence sequences can be represented by a
/// single Instruction* through an intrinsic to be lowered later.
/// Backends should override this method to produce target-specific intrinsic
/// for their fences.
/// FIXME: Please note that the default implementation here in terms of
/// IR-level fences exists for historical/compatibility reasons and is
/// *unsound* ! Fences cannot, in general, be used to restore sequential
/// consistency. For example, consider the following example:
/// atomic<int> x = y = 0;
/// int r1, r2, r3, r4;
/// Thread 0:
/// x.store(1);
/// Thread 1:
/// y.store(1);
/// Thread 2:
/// r1 = x.load();
/// r2 = y.load();
/// Thread 3:
/// r3 = y.load();
/// r4 = x.load();
/// r1 = r3 = 1 and r2 = r4 = 0 is impossible as long as the accesses are all
/// seq_cst. But if they are lowered to monotonic accesses, no amount of
/// IR-level fences can prevent it.
/// @{
virtual Instruction *emitLeadingFence(IRBuilderBase &Builder,
Instruction *Inst,
AtomicOrdering Ord) const;
virtual Instruction *emitTrailingFence(IRBuilderBase &Builder,
Instruction *Inst,
AtomicOrdering Ord) const;
/// @}
// Emits code that executes when the comparison result in the ll/sc
// expansion of a cmpxchg instruction is such that the store-conditional will
// not execute. This makes it possible to balance out the load-linked with
// a dedicated instruction, if desired.
// E.g., on ARM, if ldrex isn't followed by strex, the exclusive monitor would
// be unnecessarily held, except if clrex, inserted by this hook, is executed.
virtual void emitAtomicCmpXchgNoStoreLLBalance(IRBuilderBase &Builder) const {}
/// Returns true if arguments should be sign-extended in lib calls.
virtual bool shouldSignExtendTypeInLibCall(EVT Type, bool IsSigned) const {
return IsSigned;
}
/// Returns true if arguments should be extended in lib calls.
virtual bool shouldExtendTypeInLibCall(EVT Type) const {
return true;
}
/// Returns how the given (atomic) load should be expanded by the
/// IR-level AtomicExpand pass.
virtual AtomicExpansionKind shouldExpandAtomicLoadInIR(LoadInst *LI) const {
return AtomicExpansionKind::None;
}
/// Returns how the given (atomic) load should be cast by the IR-level
/// AtomicExpand pass.
virtual AtomicExpansionKind shouldCastAtomicLoadInIR(LoadInst *LI) const {
if (LI->getType()->isFloatingPointTy())
return AtomicExpansionKind::CastToInteger;
return AtomicExpansionKind::None;
}
/// Returns how the given (atomic) store should be expanded by the IR-level
/// AtomicExpand pass into. For instance AtomicExpansionKind::Expand will try
/// to use an atomicrmw xchg.
virtual AtomicExpansionKind shouldExpandAtomicStoreInIR(StoreInst *SI) const {
return AtomicExpansionKind::None;
}
/// Returns how the given (atomic) store should be cast by the IR-level
/// AtomicExpand pass into. For instance AtomicExpansionKind::CastToInteger
/// will try to cast the operands to integer values.
virtual AtomicExpansionKind shouldCastAtomicStoreInIR(StoreInst *SI) const {
if (SI->getValueOperand()->getType()->isFloatingPointTy())
return AtomicExpansionKind::CastToInteger;
return AtomicExpansionKind::None;
}
/// Returns how the given atomic cmpxchg should be expanded by the IR-level
/// AtomicExpand pass.
virtual AtomicExpansionKind
shouldExpandAtomicCmpXchgInIR(AtomicCmpXchgInst *AI) const {
return AtomicExpansionKind::None;
}
/// Returns how the IR-level AtomicExpand pass should expand the given
/// AtomicRMW, if at all. Default is to never expand.
virtual AtomicExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *RMW) const {
return RMW->isFloatingPointOperation() ?
AtomicExpansionKind::CmpXChg : AtomicExpansionKind::None;
}
/// Returns how the given atomic atomicrmw should be cast by the IR-level
/// AtomicExpand pass.
virtual AtomicExpansionKind
shouldCastAtomicRMWIInIR(AtomicRMWInst *RMWI) const {
if (RMWI->getOperation() == AtomicRMWInst::Xchg &&
(RMWI->getValOperand()->getType()->isFloatingPointTy() ||
RMWI->getValOperand()->getType()->isPointerTy()))
return AtomicExpansionKind::CastToInteger;
return AtomicExpansionKind::None;
}
/// On some platforms, an AtomicRMW that never actually modifies the value
/// (such as fetch_add of 0) can be turned into a fence followed by an
/// atomic load. This may sound useless, but it makes it possible for the
/// processor to keep the cacheline shared, dramatically improving
/// performance. And such idempotent RMWs are useful for implementing some
/// kinds of locks, see for example (justification + benchmarks):
/// http://www.hpl.hp.com/techreports/2012/HPL-2012-68.pdf
/// This method tries doing that transformation, returning the atomic load if
/// it succeeds, and nullptr otherwise.
/// If shouldExpandAtomicLoadInIR returns true on that load, it will undergo
/// another round of expansion.
virtual LoadInst *
lowerIdempotentRMWIntoFencedLoad(AtomicRMWInst *RMWI) const {
return nullptr;
}
/// Returns how the platform's atomic operations are extended (ZERO_EXTEND,
/// SIGN_EXTEND, or ANY_EXTEND).
virtual ISD::NodeType getExtendForAtomicOps() const {
return ISD::ZERO_EXTEND;
}
/// Returns how the platform's atomic compare and swap expects its comparison
/// value to be extended (ZERO_EXTEND, SIGN_EXTEND, or ANY_EXTEND). This is
/// separate from getExtendForAtomicOps, which is concerned with the
/// sign-extension of the instruction's output, whereas here we are concerned
/// with the sign-extension of the input. For targets with compare-and-swap
/// instructions (or sub-word comparisons in their LL/SC loop expansions),
/// the input can be ANY_EXTEND, but the output will still have a specific
/// extension.
virtual ISD::NodeType getExtendForAtomicCmpSwapArg() const {
return ISD::ANY_EXTEND;
}
/// @}
/// Returns true if we should normalize
/// select(N0&N1, X, Y) => select(N0, select(N1, X, Y), Y) and
/// select(N0|N1, X, Y) => select(N0, select(N1, X, Y, Y)) if it is likely
/// that it saves us from materializing N0 and N1 in an integer register.
/// Targets that are able to perform and/or on flags should return false here.
virtual bool shouldNormalizeToSelectSequence(LLVMContext &Context,
EVT VT) const {
// If a target has multiple condition registers, then it likely has logical
// operations on those registers.
if (hasMultipleConditionRegisters())
return false;
// Only do the transform if the value won't be split into multiple
// registers.
LegalizeTypeAction Action = getTypeAction(Context, VT);
return Action != TypeExpandInteger && Action != TypeExpandFloat &&
Action != TypeSplitVector;
}
virtual bool isProfitableToCombineMinNumMaxNum(EVT VT) const { return true; }
/// Return true if a select of constants (select Cond, C1, C2) should be
/// transformed into simple math ops with the condition value. For example:
/// select Cond, C1, C1-1 --> add (zext Cond), C1-1
virtual bool convertSelectOfConstantsToMath(EVT VT) const {
return false;
}
/// Return true if it is profitable to transform an integer
/// multiplication-by-constant into simpler operations like shifts and adds.
/// This may be true if the target does not directly support the
/// multiplication operation for the specified type or the sequence of simpler
/// ops is faster than the multiply.
virtual bool decomposeMulByConstant(LLVMContext &Context,
EVT VT, SDValue C) const {
return false;
}
/// Return true if it may be profitable to transform
/// (mul (add x, c1), c2) -> (add (mul x, c2), c1*c2).
/// This may not be true if c1 and c2 can be represented as immediates but
/// c1*c2 cannot, for example.
/// The target should check if c1, c2 and c1*c2 can be represented as
/// immediates, or have to be materialized into registers. If it is not sure
/// about some cases, a default true can be returned to let the DAGCombiner
/// decide.
/// AddNode is (add x, c1), and ConstNode is c2.
virtual bool isMulAddWithConstProfitable(SDValue AddNode,
SDValue ConstNode) const {
return true;
}
/// Return true if it is more correct/profitable to use strict FP_TO_INT
/// conversion operations - canonicalizing the FP source value instead of
/// converting all cases and then selecting based on value.
/// This may be true if the target throws exceptions for out of bounds
/// conversions or has fast FP CMOV.
virtual bool shouldUseStrictFP_TO_INT(EVT FpVT, EVT IntVT,
bool IsSigned) const {
return false;
}
/// Return true if it is beneficial to expand an @llvm.powi.* intrinsic.
/// If not optimizing for size, expanding @llvm.powi.* intrinsics is always
/// considered beneficial.
/// If optimizing for size, expansion is only considered beneficial for upto
/// 5 multiplies and a divide (if the exponent is negative).
bool isBeneficialToExpandPowI(int64_t Exponent, bool OptForSize) const {
if (Exponent < 0)
Exponent = -Exponent;
uint64_t E = static_cast<uint64_t>(Exponent);
return !OptForSize || (llvm::popcount(E) + Log2_64(E) < 7);
}
//===--------------------------------------------------------------------===//
// TargetLowering Configuration Methods - These methods should be invoked by
// the derived class constructor to configure this object for the target.
//
protected:
/// Specify how the target extends the result of integer and floating point
/// boolean values from i1 to a wider type. See getBooleanContents.
void setBooleanContents(BooleanContent Ty) {
BooleanContents = Ty;
BooleanFloatContents = Ty;
}
/// Specify how the target extends the result of integer and floating point
/// boolean values from i1 to a wider type. See getBooleanContents.
void setBooleanContents(BooleanContent IntTy, BooleanContent FloatTy) {
BooleanContents = IntTy;
BooleanFloatContents = FloatTy;
}
/// Specify how the target extends the result of a vector boolean value from a
/// vector of i1 to a wider type. See getBooleanContents.
void setBooleanVectorContents(BooleanContent Ty) {
BooleanVectorContents = Ty;
}
/// Specify the target scheduling preference.
void setSchedulingPreference(Sched::Preference Pref) {
SchedPreferenceInfo = Pref;
}
/// Indicate the minimum number of blocks to generate jump tables.
void setMinimumJumpTableEntries(unsigned Val);
/// Indicate the maximum number of entries in jump tables.
/// Set to zero to generate unlimited jump tables.
void setMaximumJumpTableSize(unsigned);
/// If set to a physical register, this specifies the register that
/// llvm.savestack/llvm.restorestack should save and restore.
void setStackPointerRegisterToSaveRestore(Register R) {
StackPointerRegisterToSaveRestore = R;
}
/// Tells the code generator that the target has multiple (allocatable)
/// condition registers that can be used to store the results of comparisons
/// for use by selects and conditional branches. With multiple condition
/// registers, the code generator will not aggressively sink comparisons into
/// the blocks of their users.
void setHasMultipleConditionRegisters(bool hasManyRegs = true) {
HasMultipleConditionRegisters = hasManyRegs;
}
/// Tells the code generator that the target has BitExtract instructions.
/// The code generator will aggressively sink "shift"s into the blocks of
/// their users if the users will generate "and" instructions which can be
/// combined with "shift" to BitExtract instructions.
void setHasExtractBitsInsn(bool hasExtractInsn = true) {
HasExtractBitsInsn = hasExtractInsn;
}
/// Tells the code generator not to expand logic operations on comparison
/// predicates into separate sequences that increase the amount of flow
/// control.
void setJumpIsExpensive(bool isExpensive = true);
/// Tells the code generator which bitwidths to bypass.
void addBypassSlowDiv(unsigned int SlowBitWidth, unsigned int FastBitWidth) {
BypassSlowDivWidths[SlowBitWidth] = FastBitWidth;
}
/// Add the specified register class as an available regclass for the
/// specified value type. This indicates the selector can handle values of
/// that class natively.
void addRegisterClass(MVT VT, const TargetRegisterClass *RC) {
assert((unsigned)VT.SimpleTy < std::size(RegClassForVT));
RegClassForVT[VT.SimpleTy] = RC;
}
/// Return the largest legal super-reg register class of the register class
/// for the specified type and its associated "cost".
virtual std::pair<const TargetRegisterClass *, uint8_t>
findRepresentativeClass(const TargetRegisterInfo *TRI, MVT VT) const;
/// Once all of the register classes are added, this allows us to compute
/// derived properties we expose.
void computeRegisterProperties(const TargetRegisterInfo *TRI);
/// Indicate that the specified operation does not work with the specified
/// type and indicate what to do about it. Note that VT may refer to either
/// the type of a result or that of an operand of Op.
void setOperationAction(unsigned Op, MVT VT, LegalizeAction Action) {
assert(Op < std::size(OpActions[0]) && "Table isn't big enough!");
OpActions[(unsigned)VT.SimpleTy][Op] = Action;
}
void setOperationAction(ArrayRef<unsigned> Ops, MVT VT,
LegalizeAction Action) {
for (auto Op : Ops)
setOperationAction(Op, VT, Action);
}
void setOperationAction(ArrayRef<unsigned> Ops, ArrayRef<MVT> VTs,
LegalizeAction Action) {
for (auto VT : VTs)
setOperationAction(Ops, VT, Action);
}
/// Indicate that the specified load with extension does not work with the
/// specified type and indicate what to do about it.
void setLoadExtAction(unsigned ExtType, MVT ValVT, MVT MemVT,
LegalizeAction Action) {
assert(ExtType < ISD::LAST_LOADEXT_TYPE && ValVT.isValid() &&
MemVT.isValid() && "Table isn't big enough!");
assert((unsigned)Action < 0x10 && "too many bits for bitfield array");
unsigned Shift = 4 * ExtType;
LoadExtActions[ValVT.SimpleTy][MemVT.SimpleTy] &= ~((uint16_t)0xF << Shift);
LoadExtActions[ValVT.SimpleTy][MemVT.SimpleTy] |= (uint16_t)Action << Shift;
}
void setLoadExtAction(ArrayRef<unsigned> ExtTypes, MVT ValVT, MVT MemVT,
LegalizeAction Action) {
for (auto ExtType : ExtTypes)
setLoadExtAction(ExtType, ValVT, MemVT, Action);
}
void setLoadExtAction(ArrayRef<unsigned> ExtTypes, MVT ValVT,
ArrayRef<MVT> MemVTs, LegalizeAction Action) {
for (auto MemVT : MemVTs)
setLoadExtAction(ExtTypes, ValVT, MemVT, Action);
}
/// Indicate that the specified truncating store does not work with the
/// specified type and indicate what to do about it.
void setTruncStoreAction(MVT ValVT, MVT MemVT, LegalizeAction Action) {
assert(ValVT.isValid() && MemVT.isValid() && "Table isn't big enough!");
TruncStoreActions[(unsigned)ValVT.SimpleTy][MemVT.SimpleTy] = Action;
}
/// Indicate that the specified indexed load does or does not work with the
/// specified type and indicate what to do abort it.
///
/// NOTE: All indexed mode loads are initialized to Expand in
/// TargetLowering.cpp
void setIndexedLoadAction(ArrayRef<unsigned> IdxModes, MVT VT,
LegalizeAction Action) {
for (auto IdxMode : IdxModes)
setIndexedModeAction(IdxMode, VT, IMAB_Load, Action);
}
void setIndexedLoadAction(ArrayRef<unsigned> IdxModes, ArrayRef<MVT> VTs,
LegalizeAction Action) {
for (auto VT : VTs)
setIndexedLoadAction(IdxModes, VT, Action);
}
/// Indicate that the specified indexed store does or does not work with the
/// specified type and indicate what to do about it.
///
/// NOTE: All indexed mode stores are initialized to Expand in
/// TargetLowering.cpp
void setIndexedStoreAction(ArrayRef<unsigned> IdxModes, MVT VT,
LegalizeAction Action) {
for (auto IdxMode : IdxModes)
setIndexedModeAction(IdxMode, VT, IMAB_Store, Action);
}
void setIndexedStoreAction(ArrayRef<unsigned> IdxModes, ArrayRef<MVT> VTs,
LegalizeAction Action) {
for (auto VT : VTs)
setIndexedStoreAction(IdxModes, VT, Action);
}
/// Indicate that the specified indexed masked load does or does not work with
/// the specified type and indicate what to do about it.
///
/// NOTE: All indexed mode masked loads are initialized to Expand in
/// TargetLowering.cpp
void setIndexedMaskedLoadAction(unsigned IdxMode, MVT VT,
LegalizeAction Action) {
setIndexedModeAction(IdxMode, VT, IMAB_MaskedLoad, Action);
}
/// Indicate that the specified indexed masked store does or does not work
/// with the specified type and indicate what to do about it.
///
/// NOTE: All indexed mode masked stores are initialized to Expand in
/// TargetLowering.cpp
void setIndexedMaskedStoreAction(unsigned IdxMode, MVT VT,
LegalizeAction Action) {
setIndexedModeAction(IdxMode, VT, IMAB_MaskedStore, Action);
}
/// Indicate that the specified condition code is or isn't supported on the
/// target and indicate what to do about it.
void setCondCodeAction(ArrayRef<ISD::CondCode> CCs, MVT VT,
LegalizeAction Action) {
for (auto CC : CCs) {
assert(VT.isValid() && (unsigned)CC < std::size(CondCodeActions) &&
"Table isn't big enough!");
assert((unsigned)Action < 0x10 && "too many bits for bitfield array");
/// The lower 3 bits of the SimpleTy index into Nth 4bit set from the
/// 32-bit value and the upper 29 bits index into the second dimension of
/// the array to select what 32-bit value to use.
uint32_t Shift = 4 * (VT.SimpleTy & 0x7);
CondCodeActions[CC][VT.SimpleTy >> 3] &= ~((uint32_t)0xF << Shift);
CondCodeActions[CC][VT.SimpleTy >> 3] |= (uint32_t)Action << Shift;
}
}
void setCondCodeAction(ArrayRef<ISD::CondCode> CCs, ArrayRef<MVT> VTs,
LegalizeAction Action) {
for (auto VT : VTs)
setCondCodeAction(CCs, VT, Action);
}
/// If Opc/OrigVT is specified as being promoted, the promotion code defaults
/// to trying a larger integer/fp until it can find one that works. If that
/// default is insufficient, this method can be used by the target to override
/// the default.
void AddPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) {
PromoteToType[std::make_pair(Opc, OrigVT.SimpleTy)] = DestVT.SimpleTy;
}
/// Convenience method to set an operation to Promote and specify the type
/// in a single call.
void setOperationPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) {
setOperationAction(Opc, OrigVT, Promote);
AddPromotedToType(Opc, OrigVT, DestVT);
}
/// Targets should invoke this method for each target independent node that
/// they want to provide a custom DAG combiner for by implementing the
/// PerformDAGCombine virtual method.
void setTargetDAGCombine(ArrayRef<ISD::NodeType> NTs) {
for (auto NT : NTs) {
assert(unsigned(NT >> 3) < std::size(TargetDAGCombineArray));
TargetDAGCombineArray[NT >> 3] |= 1 << (NT & 7);
}
}
/// Set the target's minimum function alignment.
void setMinFunctionAlignment(Align Alignment) {
MinFunctionAlignment = Alignment;
}
/// Set the target's preferred function alignment. This should be set if
/// there is a performance benefit to higher-than-minimum alignment
void setPrefFunctionAlignment(Align Alignment) {
PrefFunctionAlignment = Alignment;
}
/// Set the target's preferred loop alignment. Default alignment is one, it
/// means the target does not care about loop alignment. The target may also
/// override getPrefLoopAlignment to provide per-loop values.
void setPrefLoopAlignment(Align Alignment) { PrefLoopAlignment = Alignment; }
void setMaxBytesForAlignment(unsigned MaxBytes) {
MaxBytesForAlignment = MaxBytes;
}
/// Set the minimum stack alignment of an argument.
void setMinStackArgumentAlignment(Align Alignment) {
MinStackArgumentAlignment = Alignment;
}
/// Set the maximum atomic operation size supported by the
/// backend. Atomic operations greater than this size (as well as
/// ones that are not naturally aligned), will be expanded by
/// AtomicExpandPass into an __atomic_* library call.
void setMaxAtomicSizeInBitsSupported(unsigned SizeInBits) {
MaxAtomicSizeInBitsSupported = SizeInBits;
}
/// Set the size in bits of the maximum div/rem the backend supports.
/// Larger operations will be expanded by ExpandLargeDivRem.
void setMaxDivRemBitWidthSupported(unsigned SizeInBits) {
MaxDivRemBitWidthSupported = SizeInBits;
}
/// Set the size in bits of the maximum fp convert the backend supports.
/// Larger operations will be expanded by ExpandLargeFPConvert.
void setMaxLargeFPConvertBitWidthSupported(unsigned SizeInBits) {
MaxLargeFPConvertBitWidthSupported = SizeInBits;
}
/// Sets the minimum cmpxchg or ll/sc size supported by the backend.
void setMinCmpXchgSizeInBits(unsigned SizeInBits) {
MinCmpXchgSizeInBits = SizeInBits;
}
/// Sets whether unaligned atomic operations are supported.
void setSupportsUnalignedAtomics(bool UnalignedSupported) {
SupportsUnalignedAtomics = UnalignedSupported;
}
public:
//===--------------------------------------------------------------------===//
// Addressing mode description hooks (used by LSR etc).
//
/// CodeGenPrepare sinks address calculations into the same BB as Load/Store
/// instructions reading the address. This allows as much computation as
/// possible to be done in the address mode for that operand. This hook lets
/// targets also pass back when this should be done on intrinsics which
/// load/store.
virtual bool getAddrModeArguments(IntrinsicInst * /*I*/,
SmallVectorImpl<Value*> &/*Ops*/,
Type *&/*AccessTy*/) const {
return false;
}
/// This represents an addressing mode of:
/// BaseGV + BaseOffs + BaseReg + Scale*ScaleReg
/// If BaseGV is null, there is no BaseGV.
/// If BaseOffs is zero, there is no base offset.
/// If HasBaseReg is false, there is no base register.
/// If Scale is zero, there is no ScaleReg. Scale of 1 indicates a reg with
/// no scale.
struct AddrMode {
GlobalValue *BaseGV = nullptr;
int64_t BaseOffs = 0;
bool HasBaseReg = false;
int64_t Scale = 0;
AddrMode() = default;
};
/// Return true if the addressing mode represented by AM is legal for this
/// target, for a load/store of the specified type.
///
/// The type may be VoidTy, in which case only return true if the addressing
/// mode is legal for a load/store of any legal type. TODO: Handle
/// pre/postinc as well.
///
/// If the address space cannot be determined, it will be -1.
///
/// TODO: Remove default argument
virtual bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
Type *Ty, unsigned AddrSpace,
Instruction *I = nullptr) const;
/// Return true if the specified immediate is legal icmp immediate, that is
/// the target has icmp instructions which can compare a register against the
/// immediate without having to materialize the immediate into a register.
virtual bool isLegalICmpImmediate(int64_t) const {
return true;
}
/// Return true if the specified immediate is legal add immediate, that is the
/// target has add instructions which can add a register with the immediate
/// without having to materialize the immediate into a register.
virtual bool isLegalAddImmediate(int64_t) const {
return true;
}
/// Return true if the specified immediate is legal for the value input of a
/// store instruction.
virtual bool isLegalStoreImmediate(int64_t Value) const {
// Default implementation assumes that at least 0 works since it is likely
// that a zero register exists or a zero immediate is allowed.
return Value == 0;
}
/// Return true if it's significantly cheaper to shift a vector by a uniform
/// scalar than by an amount which will vary across each lane. On x86 before
/// AVX2 for example, there is a "psllw" instruction for the former case, but
/// no simple instruction for a general "a << b" operation on vectors.
/// This should also apply to lowering for vector funnel shifts (rotates).
virtual bool isVectorShiftByScalarCheap(Type *Ty) const {
return false;
}
/// Given a shuffle vector SVI representing a vector splat, return a new
/// scalar type of size equal to SVI's scalar type if the new type is more
/// profitable. Returns nullptr otherwise. For example under MVE float splats
/// are converted to integer to prevent the need to move from SPR to GPR
/// registers.
virtual Type* shouldConvertSplatType(ShuffleVectorInst* SVI) const {
return nullptr;
}
/// Given a set in interconnected phis of type 'From' that are loaded/stored
/// or bitcast to type 'To', return true if the set should be converted to
/// 'To'.
virtual bool shouldConvertPhiType(Type *From, Type *To) const {
return (From->isIntegerTy() || From->isFloatingPointTy()) &&
(To->isIntegerTy() || To->isFloatingPointTy());
}
/// Returns true if the opcode is a commutative binary operation.
virtual bool isCommutativeBinOp(unsigned Opcode) const {
// FIXME: This should get its info from the td file.
switch (Opcode) {
case ISD::ADD:
case ISD::SMIN:
case ISD::SMAX:
case ISD::UMIN:
case ISD::UMAX:
case ISD::MUL:
case ISD::MULHU:
case ISD::MULHS:
case ISD::SMUL_LOHI:
case ISD::UMUL_LOHI:
case ISD::FADD:
case ISD::FMUL:
case ISD::AND:
case ISD::OR:
case ISD::XOR:
case ISD::SADDO:
case ISD::UADDO:
case ISD::ADDC:
case ISD::ADDE:
case ISD::SADDSAT:
case ISD::UADDSAT:
case ISD::FMINNUM:
case ISD::FMAXNUM:
case ISD::FMINNUM_IEEE:
case ISD::FMAXNUM_IEEE:
case ISD::FMINIMUM:
case ISD::FMAXIMUM:
case ISD::AVGFLOORS:
case ISD::AVGFLOORU:
case ISD::AVGCEILS:
case ISD::AVGCEILU:
case ISD::ABDS:
case ISD::ABDU:
return true;
default: return false;
}
}
/// Return true if the node is a math/logic binary operator.
virtual bool isBinOp(unsigned Opcode) const {
// A commutative binop must be a binop.
if (isCommutativeBinOp(Opcode))
return true;
// These are non-commutative binops.
switch (Opcode) {
case ISD::SUB:
case ISD::SHL:
case ISD::SRL:
case ISD::SRA:
case ISD::ROTL:
case ISD::ROTR:
case ISD::SDIV:
case ISD::UDIV:
case ISD::SREM:
case ISD::UREM:
case ISD::SSUBSAT:
case ISD::USUBSAT:
case ISD::FSUB:
case ISD::FDIV:
case ISD::FREM:
return true;
default:
return false;
}
}
/// Return true if it's free to truncate a value of type FromTy to type
/// ToTy. e.g. On x86 it's free to truncate a i32 value in register EAX to i16
/// by referencing its sub-register AX.
/// Targets must return false when FromTy <= ToTy.
virtual bool isTruncateFree(Type *FromTy, Type *ToTy) const {
return false;
}
/// Return true if a truncation from FromTy to ToTy is permitted when deciding
/// whether a call is in tail position. Typically this means that both results
/// would be assigned to the same register or stack slot, but it could mean
/// the target performs adequate checks of its own before proceeding with the
/// tail call. Targets must return false when FromTy <= ToTy.
virtual bool allowTruncateForTailCall(Type *FromTy, Type *ToTy) const {
return false;
}
virtual bool isTruncateFree(EVT FromVT, EVT ToVT) const { return false; }
virtual bool isTruncateFree(LLT FromTy, LLT ToTy, const DataLayout &DL,
LLVMContext &Ctx) const {
return isTruncateFree(getApproximateEVTForLLT(FromTy, DL, Ctx),
getApproximateEVTForLLT(ToTy, DL, Ctx));
}
virtual bool isProfitableToHoist(Instruction *I) const { return true; }
/// Return true if the extension represented by \p I is free.
/// Unlikely the is[Z|FP]ExtFree family which is based on types,
/// this method can use the context provided by \p I to decide
/// whether or not \p I is free.
/// This method extends the behavior of the is[Z|FP]ExtFree family.
/// In other words, if is[Z|FP]Free returns true, then this method
/// returns true as well. The converse is not true.
/// The target can perform the adequate checks by overriding isExtFreeImpl.
/// \pre \p I must be a sign, zero, or fp extension.
bool isExtFree(const Instruction *I) const {
switch (I->getOpcode()) {
case Instruction::FPExt:
if (isFPExtFree(EVT::getEVT(I->getType()),
EVT::getEVT(I->getOperand(0)->getType())))
return true;
break;
case Instruction::ZExt:
if (isZExtFree(I->getOperand(0)->getType(), I->getType()))
return true;
break;
case Instruction::SExt:
break;
default:
llvm_unreachable("Instruction is not an extension");
}
return isExtFreeImpl(I);
}
/// Return true if \p Load and \p Ext can form an ExtLoad.
/// For example, in AArch64
/// %L = load i8, i8* %ptr
/// %E = zext i8 %L to i32
/// can be lowered into one load instruction
/// ldrb w0, [x0]
bool isExtLoad(const LoadInst *Load, const Instruction *Ext,
const DataLayout &DL) const {
EVT VT = getValueType(DL, Ext->getType());
EVT LoadVT = getValueType(DL, Load->getType());
// If the load has other users and the truncate is not free, the ext
// probably isn't free.
if (!Load->hasOneUse() && (isTypeLegal(LoadVT) || !isTypeLegal(VT)) &&
!isTruncateFree(Ext->getType(), Load->getType()))
return false;
// Check whether the target supports casts folded into loads.
unsigned LType;
if (isa<ZExtInst>(Ext))
LType = ISD::ZEXTLOAD;
else {
assert(isa<SExtInst>(Ext) && "Unexpected ext type!");
LType = ISD::SEXTLOAD;
}
return isLoadExtLegal(LType, VT, LoadVT);
}
/// Return true if any actual instruction that defines a value of type FromTy
/// implicitly zero-extends the value to ToTy in the result register.
///
/// The function should return true when it is likely that the truncate can
/// be freely folded with an instruction defining a value of FromTy. If
/// the defining instruction is unknown (because you're looking at a
/// function argument, PHI, etc.) then the target may require an
/// explicit truncate, which is not necessarily free, but this function
/// does not deal with those cases.
/// Targets must return false when FromTy >= ToTy.
virtual bool isZExtFree(Type *FromTy, Type *ToTy) const {
return false;
}
virtual bool isZExtFree(EVT FromTy, EVT ToTy) const { return false; }
virtual bool isZExtFree(LLT FromTy, LLT ToTy, const DataLayout &DL,
LLVMContext &Ctx) const {
return isZExtFree(getApproximateEVTForLLT(FromTy, DL, Ctx),
getApproximateEVTForLLT(ToTy, DL, Ctx));
}
/// Return true if zero-extending the specific node Val to type VT2 is free
/// (either because it's implicitly zero-extended such as ARM ldrb / ldrh or
/// because it's folded such as X86 zero-extending loads).
virtual bool isZExtFree(SDValue Val, EVT VT2) const {
return isZExtFree(Val.getValueType(), VT2);
}
/// Return true if sign-extension from FromTy to ToTy is cheaper than
/// zero-extension.
virtual bool isSExtCheaperThanZExt(EVT FromTy, EVT ToTy) const {
return false;
}
/// Return true if this constant should be sign extended when promoting to
/// a larger type.
virtual bool signExtendConstant(const ConstantInt *C) const { return false; }
/// Return true if sinking I's operands to the same basic block as I is
/// profitable, e.g. because the operands can be folded into a target
/// instruction during instruction selection. After calling the function
/// \p Ops contains the Uses to sink ordered by dominance (dominating users
/// come first).
virtual bool shouldSinkOperands(Instruction *I,
SmallVectorImpl<Use *> &Ops) const {
return false;
}
/// Try to optimize extending or truncating conversion instructions (like
/// zext, trunc, fptoui, uitofp) for the target.
virtual bool
optimizeExtendOrTruncateConversion(Instruction *I, Loop *L,
const TargetTransformInfo &TTI) const {
return false;
}
/// Return true if the target supplies and combines to a paired load
/// two loaded values of type LoadedType next to each other in memory.
/// RequiredAlignment gives the minimal alignment constraints that must be met
/// to be able to select this paired load.
///
/// This information is *not* used to generate actual paired loads, but it is
/// used to generate a sequence of loads that is easier to combine into a
/// paired load.
/// For instance, something like this:
/// a = load i64* addr
/// b = trunc i64 a to i32
/// c = lshr i64 a, 32
/// d = trunc i64 c to i32
/// will be optimized into:
/// b = load i32* addr1
/// d = load i32* addr2
/// Where addr1 = addr2 +/- sizeof(i32).
///
/// In other words, unless the target performs a post-isel load combining,
/// this information should not be provided because it will generate more
/// loads.
virtual bool hasPairedLoad(EVT /*LoadedType*/,
Align & /*RequiredAlignment*/) const {
return false;
}
/// Return true if the target has a vector blend instruction.
virtual bool hasVectorBlend() const { return false; }
/// Get the maximum supported factor for interleaved memory accesses.
/// Default to be the minimum interleave factor: 2.
virtual unsigned getMaxSupportedInterleaveFactor() const { return 2; }
/// Lower an interleaved load to target specific intrinsics. Return
/// true on success.
///
/// \p LI is the vector load instruction.
/// \p Shuffles is the shufflevector list to DE-interleave the loaded vector.
/// \p Indices is the corresponding indices for each shufflevector.
/// \p Factor is the interleave factor.
virtual bool lowerInterleavedLoad(LoadInst *LI,
ArrayRef<ShuffleVectorInst *> Shuffles,
ArrayRef<unsigned> Indices,
unsigned Factor) const {
return false;
}
/// Lower an interleaved store to target specific intrinsics. Return
/// true on success.
///
/// \p SI is the vector store instruction.
/// \p SVI is the shufflevector to RE-interleave the stored vector.
/// \p Factor is the interleave factor.
virtual bool lowerInterleavedStore(StoreInst *SI, ShuffleVectorInst *SVI,
unsigned Factor) const {
return false;
}
/// Lower a deinterleave intrinsic to a target specific load intrinsic.
/// Return true on success. Currently only supports
/// llvm.experimental.vector.deinterleave2
///
/// \p DI is the deinterleave intrinsic.
/// \p LI is the accompanying load instruction
virtual bool lowerDeinterleaveIntrinsicToLoad(IntrinsicInst *DI,
LoadInst *LI) const {
return false;
}
/// Lower an interleave intrinsic to a target specific store intrinsic.
/// Return true on success. Currently only supports
/// llvm.experimental.vector.interleave2
///
/// \p II is the interleave intrinsic.
/// \p SI is the accompanying store instruction
virtual bool lowerInterleaveIntrinsicToStore(IntrinsicInst *II,
StoreInst *SI) const {
return false;
}
/// Return true if an fpext operation is free (for instance, because
/// single-precision floating-point numbers are implicitly extended to
/// double-precision).
virtual bool isFPExtFree(EVT DestVT, EVT SrcVT) const {
assert(SrcVT.isFloatingPoint() && DestVT.isFloatingPoint() &&
"invalid fpext types");
return false;
}
/// Return true if an fpext operation input to an \p Opcode operation is free
/// (for instance, because half-precision floating-point numbers are
/// implicitly extended to float-precision) for an FMA instruction.
virtual bool isFPExtFoldable(const MachineInstr &MI, unsigned Opcode,
LLT DestTy, LLT SrcTy) const {
return false;
}
/// Return true if an fpext operation input to an \p Opcode operation is free
/// (for instance, because half-precision floating-point numbers are
/// implicitly extended to float-precision) for an FMA instruction.
virtual bool isFPExtFoldable(const SelectionDAG &DAG, unsigned Opcode,
EVT DestVT, EVT SrcVT) const {
assert(DestVT.isFloatingPoint() && SrcVT.isFloatingPoint() &&
"invalid fpext types");
return isFPExtFree(DestVT, SrcVT);
}
/// Return true if folding a vector load into ExtVal (a sign, zero, or any
/// extend node) is profitable.
virtual bool isVectorLoadExtDesirable(SDValue ExtVal) const { return false; }
/// Return true if an fneg operation is free to the point where it is never
/// worthwhile to replace it with a bitwise operation.
virtual bool isFNegFree(EVT VT) const {
assert(VT.isFloatingPoint());
return false;
}
/// Return true if an fabs operation is free to the point where it is never
/// worthwhile to replace it with a bitwise operation.
virtual bool isFAbsFree(EVT VT) const {
assert(VT.isFloatingPoint());
return false;
}
/// Return true if an FMA operation is faster than a pair of fmul and fadd
/// instructions. fmuladd intrinsics will be expanded to FMAs when this method
/// returns true, otherwise fmuladd is expanded to fmul + fadd.
///
/// NOTE: This may be called before legalization on types for which FMAs are
/// not legal, but should return true if those types will eventually legalize
/// to types that support FMAs. After legalization, it will only be called on
/// types that support FMAs (via Legal or Custom actions)
virtual bool isFMAFasterThanFMulAndFAdd(const MachineFunction &MF,
EVT) const {
return false;
}
/// Return true if an FMA operation is faster than a pair of fmul and fadd
/// instructions. fmuladd intrinsics will be expanded to FMAs when this method
/// returns true, otherwise fmuladd is expanded to fmul + fadd.
///
/// NOTE: This may be called before legalization on types for which FMAs are
/// not legal, but should return true if those types will eventually legalize
/// to types that support FMAs. After legalization, it will only be called on
/// types that support FMAs (via Legal or Custom actions)
virtual bool isFMAFasterThanFMulAndFAdd(const MachineFunction &MF,
LLT) const {
return false;
}
/// IR version
virtual bool isFMAFasterThanFMulAndFAdd(const Function &F, Type *) const {
return false;
}
/// Returns true if \p MI can be combined with another instruction to
/// form TargetOpcode::G_FMAD. \p N may be an TargetOpcode::G_FADD,
/// TargetOpcode::G_FSUB, or an TargetOpcode::G_FMUL which will be
/// distributed into an fadd/fsub.
virtual bool isFMADLegal(const MachineInstr &MI, LLT Ty) const {
assert((MI.getOpcode() == TargetOpcode::G_FADD ||
MI.getOpcode() == TargetOpcode::G_FSUB ||
MI.getOpcode() == TargetOpcode::G_FMUL) &&
"unexpected node in FMAD forming combine");
switch (Ty.getScalarSizeInBits()) {
case 16:
return isOperationLegal(TargetOpcode::G_FMAD, MVT::f16);
case 32:
return isOperationLegal(TargetOpcode::G_FMAD, MVT::f32);
case 64:
return isOperationLegal(TargetOpcode::G_FMAD, MVT::f64);
default:
break;
}
return false;
}
/// Returns true if be combined with to form an ISD::FMAD. \p N may be an
/// ISD::FADD, ISD::FSUB, or an ISD::FMUL which will be distributed into an
/// fadd/fsub.
virtual bool isFMADLegal(const SelectionDAG &DAG, const SDNode *N) const {
assert((N->getOpcode() == ISD::FADD || N->getOpcode() == ISD::FSUB ||
N->getOpcode() == ISD::FMUL) &&
"unexpected node in FMAD forming combine");
return isOperationLegal(ISD::FMAD, N->getValueType(0));
}
// Return true when the decision to generate FMA's (or FMS, FMLA etc) rather
// than FMUL and ADD is delegated to the machine combiner.
virtual bool generateFMAsInMachineCombiner(EVT VT,
CodeGenOpt::Level OptLevel) const {
return false;
}
/// Return true if it's profitable to narrow operations of type SrcVT to
/// DestVT. e.g. on x86, it's profitable to narrow from i32 to i8 but not from
/// i32 to i16.
virtual bool isNarrowingProfitable(EVT SrcVT, EVT DestVT) const {
return false;
}
/// Return true if pulling a binary operation into a select with an identity
/// constant is profitable. This is the inverse of an IR transform.
/// Example: X + (Cond ? Y : 0) --> Cond ? (X + Y) : X
virtual bool shouldFoldSelectWithIdentityConstant(unsigned BinOpcode,
EVT VT) const {
return false;
}
/// Return true if it is beneficial to convert a load of a constant to
/// just the constant itself.
/// On some targets it might be more efficient to use a combination of
/// arithmetic instructions to materialize the constant instead of loading it
/// from a constant pool.
virtual bool shouldConvertConstantLoadToIntImm(const APInt &Imm,
Type *Ty) const {
return false;
}
/// Return true if EXTRACT_SUBVECTOR is cheap for extracting this result type
/// from this source type with this index. This is needed because
/// EXTRACT_SUBVECTOR usually has custom lowering that depends on the index of
/// the first element, and only the target knows which lowering is cheap.
virtual bool isExtractSubvectorCheap(EVT ResVT, EVT SrcVT,
unsigned Index) const {
return false;
}
/// Try to convert an extract element of a vector binary operation into an
/// extract element followed by a scalar operation.
virtual bool shouldScalarizeBinop(SDValue VecOp) const {
return false;
}
/// Return true if extraction of a scalar element from the given vector type
/// at the given index is cheap. For example, if scalar operations occur on
/// the same register file as vector operations, then an extract element may
/// be a sub-register rename rather than an actual instruction.
virtual bool isExtractVecEltCheap(EVT VT, unsigned Index) const {
return false;
}
/// Try to convert math with an overflow comparison into the corresponding DAG
/// node operation. Targets may want to override this independently of whether
/// the operation is legal/custom for the given type because it may obscure
/// matching of other patterns.
virtual bool shouldFormOverflowOp(unsigned Opcode, EVT VT,
bool MathUsed) const {
// TODO: The default logic is inherited from code in CodeGenPrepare.
// The opcode should not make a difference by default?
if (Opcode != ISD::UADDO)
return false;
// Allow the transform as long as we have an integer type that is not
// obviously illegal and unsupported and if the math result is used
// besides the overflow check. On some targets (e.g. SPARC), it is
// not profitable to form on overflow op if the math result has no
// concrete users.
if (VT.isVector())
return false;
return MathUsed && (VT.isSimple() || !isOperationExpand(Opcode, VT));
}
// Return true if it is profitable to use a scalar input to a BUILD_VECTOR
// even if the vector itself has multiple uses.
virtual bool aggressivelyPreferBuildVectorSources(EVT VecVT) const {
return false;
}
// Return true if CodeGenPrepare should consider splitting large offset of a
// GEP to make the GEP fit into the addressing mode and can be sunk into the
// same blocks of its users.
virtual bool shouldConsiderGEPOffsetSplit() const { return false; }
/// Return true if creating a shift of the type by the given
/// amount is not profitable.
virtual bool shouldAvoidTransformToShift(EVT VT, unsigned Amount) const {
return false;
}
/// Does this target require the clearing of high-order bits in a register
/// passed to the fp16 to fp conversion library function.
virtual bool shouldKeepZExtForFP16Conv() const { return false; }
/// Should we generate fp_to_si_sat and fp_to_ui_sat from type FPVT to type VT
/// from min(max(fptoi)) saturation patterns.
virtual bool shouldConvertFpToSat(unsigned Op, EVT FPVT, EVT VT) const {
return isOperationLegalOrCustom(Op, VT);
}
/// Does this target support complex deinterleaving
virtual bool isComplexDeinterleavingSupported() const { return false; }
/// Does this target support complex deinterleaving with the given operation
/// and type
virtual bool isComplexDeinterleavingOperationSupported(
ComplexDeinterleavingOperation Operation, Type *Ty) const {
return false;
}
/// Create the IR node for the given complex deinterleaving operation.
/// If one cannot be created using all the given inputs, nullptr should be
/// returned.
virtual Value *createComplexDeinterleavingIR(
IRBuilderBase &B, ComplexDeinterleavingOperation OperationType,
ComplexDeinterleavingRotation Rotation, Value *InputA, Value *InputB,
Value *Accumulator = nullptr) const {
return nullptr;
}
//===--------------------------------------------------------------------===//
// Runtime Library hooks
//
/// Rename the default libcall routine name for the specified libcall.
void setLibcallName(RTLIB::Libcall Call, const char *Name) {
LibcallRoutineNames[Call] = Name;
}
void setLibcallName(ArrayRef<RTLIB::Libcall> Calls, const char *Name) {
for (auto Call : Calls)
setLibcallName(Call, Name);
}
/// Get the libcall routine name for the specified libcall.
const char *getLibcallName(RTLIB::Libcall Call) const {
return LibcallRoutineNames[Call];
}
/// Override the default CondCode to be used to test the result of the
/// comparison libcall against zero.
void setCmpLibcallCC(RTLIB::Libcall Call, ISD::CondCode CC) {
CmpLibcallCCs[Call] = CC;
}
/// Get the CondCode that's to be used to test the result of the comparison
/// libcall against zero.
ISD::CondCode getCmpLibcallCC(RTLIB::Libcall Call) const {
return CmpLibcallCCs[Call];
}
/// Set the CallingConv that should be used for the specified libcall.
void setLibcallCallingConv(RTLIB::Libcall Call, CallingConv::ID CC) {
LibcallCallingConvs[Call] = CC;
}
/// Get the CallingConv that should be used for the specified libcall.
CallingConv::ID getLibcallCallingConv(RTLIB::Libcall Call) const {
return LibcallCallingConvs[Call];
}
/// Execute target specific actions to finalize target lowering.
/// This is used to set extra flags in MachineFrameInformation and freezing
/// the set of reserved registers.
/// The default implementation just freezes the set of reserved registers.
virtual void finalizeLowering(MachineFunction &MF) const;
//===----------------------------------------------------------------------===//
// GlobalISel Hooks
//===----------------------------------------------------------------------===//
/// Check whether or not \p MI needs to be moved close to its uses.
virtual bool shouldLocalize(const MachineInstr &MI, const TargetTransformInfo *TTI) const;
private:
const TargetMachine &TM;
/// Tells the code generator that the target has multiple (allocatable)
/// condition registers that can be used to store the results of comparisons
/// for use by selects and conditional branches. With multiple condition
/// registers, the code generator will not aggressively sink comparisons into
/// the blocks of their users.
bool HasMultipleConditionRegisters;
/// Tells the code generator that the target has BitExtract instructions.
/// The code generator will aggressively sink "shift"s into the blocks of
/// their users if the users will generate "and" instructions which can be
/// combined with "shift" to BitExtract instructions.
bool HasExtractBitsInsn;
/// Tells the code generator to bypass slow divide or remainder
/// instructions. For example, BypassSlowDivWidths[32,8] tells the code
/// generator to bypass 32-bit integer div/rem with an 8-bit unsigned integer
/// div/rem when the operands are positive and less than 256.
DenseMap <unsigned int, unsigned int> BypassSlowDivWidths;
/// Tells the code generator that it shouldn't generate extra flow control
/// instructions and should attempt to combine flow control instructions via
/// predication.
bool JumpIsExpensive;
/// Information about the contents of the high-bits in boolean values held in
/// a type wider than i1. See getBooleanContents.
BooleanContent BooleanContents;
/// Information about the contents of the high-bits in boolean values held in
/// a type wider than i1. See getBooleanContents.
BooleanContent BooleanFloatContents;
/// Information about the contents of the high-bits in boolean vector values
/// when the element type is wider than i1. See getBooleanContents.
BooleanContent BooleanVectorContents;
/// The target scheduling preference: shortest possible total cycles or lowest
/// register usage.
Sched::Preference SchedPreferenceInfo;
/// The minimum alignment that any argument on the stack needs to have.
Align MinStackArgumentAlignment;
/// The minimum function alignment (used when optimizing for size, and to
/// prevent explicitly provided alignment from leading to incorrect code).
Align MinFunctionAlignment;
/// The preferred function alignment (used when alignment unspecified and
/// optimizing for speed).
Align PrefFunctionAlignment;
/// The preferred loop alignment (in log2 bot in bytes).
Align PrefLoopAlignment;
/// The maximum amount of bytes permitted to be emitted for alignment.
unsigned MaxBytesForAlignment;
/// Size in bits of the maximum atomics size the backend supports.
/// Accesses larger than this will be expanded by AtomicExpandPass.
unsigned MaxAtomicSizeInBitsSupported;
/// Size in bits of the maximum div/rem size the backend supports.
/// Larger operations will be expanded by ExpandLargeDivRem.
unsigned MaxDivRemBitWidthSupported;
/// Size in bits of the maximum larget fp convert size the backend
/// supports. Larger operations will be expanded by ExpandLargeFPConvert.
unsigned MaxLargeFPConvertBitWidthSupported;
/// Size in bits of the minimum cmpxchg or ll/sc operation the
/// backend supports.
unsigned MinCmpXchgSizeInBits;
/// This indicates if the target supports unaligned atomic operations.
bool SupportsUnalignedAtomics;
/// If set to a physical register, this specifies the register that
/// llvm.savestack/llvm.restorestack should save and restore.
Register StackPointerRegisterToSaveRestore;
/// This indicates the default register class to use for each ValueType the
/// target supports natively.
const TargetRegisterClass *RegClassForVT[MVT::VALUETYPE_SIZE];
uint16_t NumRegistersForVT[MVT::VALUETYPE_SIZE];
MVT RegisterTypeForVT[MVT::VALUETYPE_SIZE];
/// This indicates the "representative" register class to use for each
/// ValueType the target supports natively. This information is used by the
/// scheduler to track register pressure. By default, the representative
/// register class is the largest legal super-reg register class of the
/// register class of the specified type. e.g. On x86, i8, i16, and i32's
/// representative class would be GR32.
const TargetRegisterClass *RepRegClassForVT[MVT::VALUETYPE_SIZE] = {0};
/// This indicates the "cost" of the "representative" register class for each
/// ValueType. The cost is used by the scheduler to approximate register
/// pressure.
uint8_t RepRegClassCostForVT[MVT::VALUETYPE_SIZE];
/// For any value types we are promoting or expanding, this contains the value
/// type that we are changing to. For Expanded types, this contains one step
/// of the expand (e.g. i64 -> i32), even if there are multiple steps required
/// (e.g. i64 -> i16). For types natively supported by the system, this holds
/// the same type (e.g. i32 -> i32).
MVT TransformToType[MVT::VALUETYPE_SIZE];
/// For each operation and each value type, keep a LegalizeAction that
/// indicates how instruction selection should deal with the operation. Most
/// operations are Legal (aka, supported natively by the target), but
/// operations that are not should be described. Note that operations on
/// non-legal value types are not described here.
LegalizeAction OpActions[MVT::VALUETYPE_SIZE][ISD::BUILTIN_OP_END];
/// For each load extension type and each value type, keep a LegalizeAction
/// that indicates how instruction selection should deal with a load of a
/// specific value type and extension type. Uses 4-bits to store the action
/// for each of the 4 load ext types.
uint16_t LoadExtActions[MVT::VALUETYPE_SIZE][MVT::VALUETYPE_SIZE];
/// For each value type pair keep a LegalizeAction that indicates whether a
/// truncating store of a specific value type and truncating type is legal.
LegalizeAction TruncStoreActions[MVT::VALUETYPE_SIZE][MVT::VALUETYPE_SIZE];
/// For each indexed mode and each value type, keep a quad of LegalizeAction
/// that indicates how instruction selection should deal with the load /
/// store / maskedload / maskedstore.
///
/// The first dimension is the value_type for the reference. The second
/// dimension represents the various modes for load store.
uint16_t IndexedModeActions[MVT::VALUETYPE_SIZE][ISD::LAST_INDEXED_MODE];
/// For each condition code (ISD::CondCode) keep a LegalizeAction that
/// indicates how instruction selection should deal with the condition code.
///
/// Because each CC action takes up 4 bits, we need to have the array size be
/// large enough to fit all of the value types. This can be done by rounding
/// up the MVT::VALUETYPE_SIZE value to the next multiple of 8.
uint32_t CondCodeActions[ISD::SETCC_INVALID][(MVT::VALUETYPE_SIZE + 7) / 8];
ValueTypeActionImpl ValueTypeActions;
private:
/// Targets can specify ISD nodes that they would like PerformDAGCombine
/// callbacks for by calling setTargetDAGCombine(), which sets a bit in this
/// array.
unsigned char
TargetDAGCombineArray[(ISD::BUILTIN_OP_END+CHAR_BIT-1)/CHAR_BIT];
/// For operations that must be promoted to a specific type, this holds the
/// destination type. This map should be sparse, so don't hold it as an
/// array.
///
/// Targets add entries to this map with AddPromotedToType(..), clients access
/// this with getTypeToPromoteTo(..).
std::map<std::pair<unsigned, MVT::SimpleValueType>, MVT::SimpleValueType>
PromoteToType;
/// Stores the name each libcall.
const char *LibcallRoutineNames[RTLIB::UNKNOWN_LIBCALL + 1];
/// The ISD::CondCode that should be used to test the result of each of the
/// comparison libcall against zero.
ISD::CondCode CmpLibcallCCs[RTLIB::UNKNOWN_LIBCALL];
/// Stores the CallingConv that should be used for each libcall.
CallingConv::ID LibcallCallingConvs[RTLIB::UNKNOWN_LIBCALL];
/// Set default libcall names and calling conventions.
void InitLibcalls(const Triple &TT);
/// The bits of IndexedModeActions used to store the legalisation actions
/// We store the data as | ML | MS | L | S | each taking 4 bits.
enum IndexedModeActionsBits {
IMAB_Store = 0,
IMAB_Load = 4,
IMAB_MaskedStore = 8,
IMAB_MaskedLoad = 12
};
void setIndexedModeAction(unsigned IdxMode, MVT VT, unsigned Shift,
LegalizeAction Action) {
assert(VT.isValid() && IdxMode < ISD::LAST_INDEXED_MODE &&
(unsigned)Action < 0xf && "Table isn't big enough!");
unsigned Ty = (unsigned)VT.SimpleTy;
IndexedModeActions[Ty][IdxMode] &= ~(0xf << Shift);
IndexedModeActions[Ty][IdxMode] |= ((uint16_t)Action) << Shift;
}
LegalizeAction getIndexedModeAction(unsigned IdxMode, MVT VT,
unsigned Shift) const {
assert(IdxMode < ISD::LAST_INDEXED_MODE && VT.isValid() &&
"Table isn't big enough!");
unsigned Ty = (unsigned)VT.SimpleTy;
return (LegalizeAction)((IndexedModeActions[Ty][IdxMode] >> Shift) & 0xf);
}
protected:
/// Return true if the extension represented by \p I is free.
/// \pre \p I is a sign, zero, or fp extension and
/// is[Z|FP]ExtFree of the related types is not true.
virtual bool isExtFreeImpl(const Instruction *I) const { return false; }
/// Depth that GatherAllAliases should should continue looking for chain
/// dependencies when trying to find a more preferable chain. As an
/// approximation, this should be more than the number of consecutive stores
/// expected to be merged.
unsigned GatherAllAliasesMaxDepth;
/// \brief Specify maximum number of store instructions per memset call.
///
/// When lowering \@llvm.memset this field specifies the maximum number of
/// store operations that may be substituted for the call to memset. Targets
/// must set this value based on the cost threshold for that target. Targets
/// should assume that the memset will be done using as many of the largest
/// store operations first, followed by smaller ones, if necessary, per
/// alignment restrictions. For example, storing 9 bytes on a 32-bit machine
/// with 16-bit alignment would result in four 2-byte stores and one 1-byte
/// store. This only applies to setting a constant array of a constant size.
unsigned MaxStoresPerMemset;
/// Likewise for functions with the OptSize attribute.
unsigned MaxStoresPerMemsetOptSize;
/// \brief Specify maximum number of store instructions per memcpy call.
///
/// When lowering \@llvm.memcpy this field specifies the maximum number of
/// store operations that may be substituted for a call to memcpy. Targets
/// must set this value based on the cost threshold for that target. Targets
/// should assume that the memcpy will be done using as many of the largest
/// store operations first, followed by smaller ones, if necessary, per
/// alignment restrictions. For example, storing 7 bytes on a 32-bit machine
/// with 32-bit alignment would result in one 4-byte store, a one 2-byte store
/// and one 1-byte store. This only applies to copying a constant array of
/// constant size.
unsigned MaxStoresPerMemcpy;
/// Likewise for functions with the OptSize attribute.
unsigned MaxStoresPerMemcpyOptSize;
/// \brief Specify max number of store instructions to glue in inlined memcpy.
///
/// When memcpy is inlined based on MaxStoresPerMemcpy, specify maximum number
/// of store instructions to keep together. This helps in pairing and
// vectorization later on.
unsigned MaxGluedStoresPerMemcpy = 0;
/// \brief Specify maximum number of load instructions per memcmp call.
///
/// When lowering \@llvm.memcmp this field specifies the maximum number of
/// pairs of load operations that may be substituted for a call to memcmp.
/// Targets must set this value based on the cost threshold for that target.
/// Targets should assume that the memcmp will be done using as many of the
/// largest load operations first, followed by smaller ones, if necessary, per
/// alignment restrictions. For example, loading 7 bytes on a 32-bit machine
/// with 32-bit alignment would result in one 4-byte load, a one 2-byte load
/// and one 1-byte load. This only applies to copying a constant array of
/// constant size.
unsigned MaxLoadsPerMemcmp;
/// Likewise for functions with the OptSize attribute.
unsigned MaxLoadsPerMemcmpOptSize;
/// \brief Specify maximum number of store instructions per memmove call.
///
/// When lowering \@llvm.memmove this field specifies the maximum number of
/// store instructions that may be substituted for a call to memmove. Targets
/// must set this value based on the cost threshold for that target. Targets
/// should assume that the memmove will be done using as many of the largest
/// store operations first, followed by smaller ones, if necessary, per
/// alignment restrictions. For example, moving 9 bytes on a 32-bit machine
/// with 8-bit alignment would result in nine 1-byte stores. This only
/// applies to copying a constant array of constant size.
unsigned MaxStoresPerMemmove;
/// Likewise for functions with the OptSize attribute.
unsigned MaxStoresPerMemmoveOptSize;
/// Tells the code generator that select is more expensive than a branch if
/// the branch is usually predicted right.
bool PredictableSelectIsExpensive;
/// \see enableExtLdPromotion.
bool EnableExtLdPromotion;
/// Return true if the value types that can be represented by the specified
/// register class are all legal.
bool isLegalRC(const TargetRegisterInfo &TRI,
const TargetRegisterClass &RC) const;
/// Replace/modify any TargetFrameIndex operands with a targte-dependent
/// sequence of memory operands that is recognized by PrologEpilogInserter.
MachineBasicBlock *emitPatchPoint(MachineInstr &MI,
MachineBasicBlock *MBB) const;
bool IsStrictFPEnabled;
};
/// This class defines information used to lower LLVM code to legal SelectionDAG
/// operators that the target instruction selector can accept natively.
///
/// This class also defines callbacks that targets must implement to lower
/// target-specific constructs to SelectionDAG operators.
class TargetLowering : public TargetLoweringBase {
public:
struct DAGCombinerInfo;
struct MakeLibCallOptions;
TargetLowering(const TargetLowering &) = delete;
TargetLowering &operator=(const TargetLowering &) = delete;
explicit TargetLowering(const TargetMachine &TM);
bool isPositionIndependent() const;
virtual bool isSDNodeSourceOfDivergence(const SDNode *N,
FunctionLoweringInfo *FLI,
UniformityInfo *UA) const {
return false;
}
// Lets target to control the following reassociation of operands: (op (op x,
// c1), y) -> (op (op x, y), c1) where N0 is (op x, c1) and N1 is y. By
// default consider profitable any case where N0 has single use. This
// behavior reflects the condition replaced by this target hook call in the
// DAGCombiner. Any particular target can implement its own heuristic to
// restrict common combiner.
virtual bool isReassocProfitable(SelectionDAG &DAG, SDValue N0,
SDValue N1) const {
return N0.hasOneUse();
}
// Lets target to control the following reassociation of operands: (op (op x,
// c1), y) -> (op (op x, y), c1) where N0 is (op x, c1) and N1 is y. By
// default consider profitable any case where N0 has single use. This
// behavior reflects the condition replaced by this target hook call in the
// combiner. Any particular target can implement its own heuristic to
// restrict common combiner.
virtual bool isReassocProfitable(MachineRegisterInfo &MRI, Register N0,
Register N1) const {
return MRI.hasOneNonDBGUse(N0);
}
virtual bool isSDNodeAlwaysUniform(const SDNode * N) const {
return false;
}
/// Returns true by value, base pointer and offset pointer and addressing mode
/// by reference if the node's address can be legally represented as
/// pre-indexed load / store address.
virtual bool getPreIndexedAddressParts(SDNode * /*N*/, SDValue &/*Base*/,
SDValue &/*Offset*/,
ISD::MemIndexedMode &/*AM*/,
SelectionDAG &/*DAG*/) const {
return false;
}
/// Returns true by value, base pointer and offset pointer and addressing mode
/// by reference if this node can be combined with a load / store to form a
/// post-indexed load / store.
virtual bool getPostIndexedAddressParts(SDNode * /*N*/, SDNode * /*Op*/,
SDValue &/*Base*/,
SDValue &/*Offset*/,
ISD::MemIndexedMode &/*AM*/,
SelectionDAG &/*DAG*/) const {
return false;
}
/// Returns true if the specified base+offset is a legal indexed addressing
/// mode for this target. \p MI is the load or store instruction that is being
/// considered for transformation.
virtual bool isIndexingLegal(MachineInstr &MI, Register Base, Register Offset,
bool IsPre, MachineRegisterInfo &MRI) const {
return false;
}
/// Return the entry encoding for a jump table in the current function. The
/// returned value is a member of the MachineJumpTableInfo::JTEntryKind enum.
virtual unsigned getJumpTableEncoding() const;
virtual const MCExpr *
LowerCustomJumpTableEntry(const MachineJumpTableInfo * /*MJTI*/,
const MachineBasicBlock * /*MBB*/, unsigned /*uid*/,
MCContext &/*Ctx*/) const {
llvm_unreachable("Need to implement this hook if target has custom JTIs");
}
/// Returns relocation base for the given PIC jumptable.
virtual SDValue getPICJumpTableRelocBase(SDValue Table,
SelectionDAG &DAG) const;
/// This returns the relocation base for the given PIC jumptable, the same as
/// getPICJumpTableRelocBase, but as an MCExpr.
virtual const MCExpr *
getPICJumpTableRelocBaseExpr(const MachineFunction *MF,
unsigned JTI, MCContext &Ctx) const;
/// Return true if folding a constant offset with the given GlobalAddress is
/// legal. It is frequently not legal in PIC relocation models.
virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
/// On x86, return true if the operand with index OpNo is a CALL or JUMP
/// instruction, which can use either a memory constraint or an address
/// constraint. -fasm-blocks "__asm call foo" lowers to
/// call void asm sideeffect inteldialect "call ${0:P}", "*m..."
///
/// This function is used by a hack to choose the address constraint,
/// lowering to a direct call.
virtual bool
isInlineAsmTargetBranch(const SmallVectorImpl<StringRef> &AsmStrs,
unsigned OpNo) const {
return false;
}
bool isInTailCallPosition(SelectionDAG &DAG, SDNode *Node,
SDValue &Chain) const;
void softenSetCCOperands(SelectionDAG &DAG, EVT VT, SDValue &NewLHS,
SDValue &NewRHS, ISD::CondCode &CCCode,
const SDLoc &DL, const SDValue OldLHS,
const SDValue OldRHS) const;
void softenSetCCOperands(SelectionDAG &DAG, EVT VT, SDValue &NewLHS,
SDValue &NewRHS, ISD::CondCode &CCCode,
const SDLoc &DL, const SDValue OldLHS,
const SDValue OldRHS, SDValue &Chain,
bool IsSignaling = false) const;
/// Returns a pair of (return value, chain).
/// It is an error to pass RTLIB::UNKNOWN_LIBCALL as \p LC.
std::pair<SDValue, SDValue> makeLibCall(SelectionDAG &DAG, RTLIB::Libcall LC,
EVT RetVT, ArrayRef<SDValue> Ops,
MakeLibCallOptions CallOptions,
const SDLoc &dl,
SDValue Chain = SDValue()) const;
/// Check whether parameters to a call that are passed in callee saved
/// registers are the same as from the calling function. This needs to be
/// checked for tail call eligibility.
bool parametersInCSRMatch(const MachineRegisterInfo &MRI,
const uint32_t *CallerPreservedMask,
const SmallVectorImpl<CCValAssign> &ArgLocs,
const SmallVectorImpl<SDValue> &OutVals) const;
//===--------------------------------------------------------------------===//
// TargetLowering Optimization Methods
//
/// A convenience struct that encapsulates a DAG, and two SDValues for
/// returning information from TargetLowering to its clients that want to
/// combine.
struct TargetLoweringOpt {
SelectionDAG &DAG;
bool LegalTys;
bool LegalOps;
SDValue Old;
SDValue New;
explicit TargetLoweringOpt(SelectionDAG &InDAG,
bool LT, bool LO) :
DAG(InDAG), LegalTys(LT), LegalOps(LO) {}
bool LegalTypes() const { return LegalTys; }
bool LegalOperations() const { return LegalOps; }
bool CombineTo(SDValue O, SDValue N) {
Old = O;
New = N;
return true;
}
};
/// Determines the optimal series of memory ops to replace the memset / memcpy.
/// Return true if the number of memory ops is below the threshold (Limit).
/// Note that this is always the case when Limit is ~0.
/// It returns the types of the sequence of memory ops to perform
/// memset / memcpy by reference.
virtual bool
findOptimalMemOpLowering(std::vector<EVT> &MemOps, unsigned Limit,
const MemOp &Op, unsigned DstAS, unsigned SrcAS,
const AttributeList &FuncAttributes) const;
/// Check to see if the specified operand of the specified instruction is a
/// constant integer. If so, check to see if there are any bits set in the
/// constant that are not demanded. If so, shrink the constant and return
/// true.
bool ShrinkDemandedConstant(SDValue Op, const APInt &DemandedBits,
const APInt &DemandedElts,
TargetLoweringOpt &TLO) const;
/// Helper wrapper around ShrinkDemandedConstant, demanding all elements.
bool ShrinkDemandedConstant(SDValue Op, const APInt &DemandedBits,
TargetLoweringOpt &TLO) const;
// Target hook to do target-specific const optimization, which is called by
// ShrinkDemandedConstant. This function should return true if the target
// doesn't want ShrinkDemandedConstant to further optimize the constant.
virtual bool targetShrinkDemandedConstant(SDValue Op,
const APInt &DemandedBits,
const APInt &DemandedElts,
TargetLoweringOpt &TLO) const {
return false;
}
/// Convert x+y to (VT)((SmallVT)x+(SmallVT)y) if the casts are free. This
/// uses isZExtFree and ZERO_EXTEND for the widening cast, but it could be
/// generalized for targets with other types of implicit widening casts.
bool ShrinkDemandedOp(SDValue Op, unsigned BitWidth,
const APInt &DemandedBits,
TargetLoweringOpt &TLO) const;
/// Look at Op. At this point, we know that only the DemandedBits bits of the
/// result of Op are ever used downstream. If we can use this information to
/// simplify Op, create a new simplified DAG node and return true, returning
/// the original and new nodes in Old and New. Otherwise, analyze the
/// expression and return a mask of KnownOne and KnownZero bits for the
/// expression (used to simplify the caller). The KnownZero/One bits may only
/// be accurate for those bits in the Demanded masks.
/// \p AssumeSingleUse When this parameter is true, this function will
/// attempt to simplify \p Op even if there are multiple uses.
/// Callers are responsible for correctly updating the DAG based on the
/// results of this function, because simply replacing replacing TLO.Old
/// with TLO.New will be incorrect when this parameter is true and TLO.Old
/// has multiple uses.
bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
const APInt &DemandedElts, KnownBits &Known,
TargetLoweringOpt &TLO, unsigned Depth = 0,
bool AssumeSingleUse = false) const;
/// Helper wrapper around SimplifyDemandedBits, demanding all elements.
/// Adds Op back to the worklist upon success.
bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
KnownBits &Known, TargetLoweringOpt &TLO,
unsigned Depth = 0,
bool AssumeSingleUse = false) const;
/// Helper wrapper around SimplifyDemandedBits.
/// Adds Op back to the worklist upon success.
bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
DAGCombinerInfo &DCI) const;
/// Helper wrapper around SimplifyDemandedBits.
/// Adds Op back to the worklist upon success.
bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
const APInt &DemandedElts,
DAGCombinerInfo &DCI) const;
/// More limited version of SimplifyDemandedBits that can be used to "look
/// through" ops that don't contribute to the DemandedBits/DemandedElts -
/// bitwise ops etc.
SDValue SimplifyMultipleUseDemandedBits(SDValue Op, const APInt &DemandedBits,
const APInt &DemandedElts,
SelectionDAG &DAG,
unsigned Depth = 0) const;
/// Helper wrapper around SimplifyMultipleUseDemandedBits, demanding all
/// elements.
SDValue SimplifyMultipleUseDemandedBits(SDValue Op, const APInt &DemandedBits,
SelectionDAG &DAG,
unsigned Depth = 0) const;
/// Helper wrapper around SimplifyMultipleUseDemandedBits, demanding all
/// bits from only some vector elements.
SDValue SimplifyMultipleUseDemandedVectorElts(SDValue Op,
const APInt &DemandedElts,
SelectionDAG &DAG,
unsigned Depth = 0) const;
/// Look at Vector Op. At this point, we know that only the DemandedElts
/// elements of the result of Op are ever used downstream. If we can use
/// this information to simplify Op, create a new simplified DAG node and
/// return true, storing the original and new nodes in TLO.
/// Otherwise, analyze the expression and return a mask of KnownUndef and
/// KnownZero elements for the expression (used to simplify the caller).
/// The KnownUndef/Zero elements may only be accurate for those bits
/// in the DemandedMask.
/// \p AssumeSingleUse When this parameter is true, this function will
/// attempt to simplify \p Op even if there are multiple uses.
/// Callers are responsible for correctly updating the DAG based on the
/// results of this function, because simply replacing replacing TLO.Old
/// with TLO.New will be incorrect when this parameter is true and TLO.Old
/// has multiple uses.
bool SimplifyDemandedVectorElts(SDValue Op, const APInt &DemandedEltMask,
APInt &KnownUndef, APInt &KnownZero,
TargetLoweringOpt &TLO, unsigned Depth = 0,
bool AssumeSingleUse = false) const;
/// Helper wrapper around SimplifyDemandedVectorElts.
/// Adds Op back to the worklist upon success.
bool SimplifyDemandedVectorElts(SDValue Op, const APInt &DemandedElts,
DAGCombinerInfo &DCI) const;
/// Return true if the target supports simplifying demanded vector elements by
/// converting them to undefs.
virtual bool
shouldSimplifyDemandedVectorElts(SDValue Op,
const TargetLoweringOpt &TLO) const {
return true;
}
/// Determine which of the bits specified in Mask are known to be either zero
/// or one and return them in the KnownZero/KnownOne bitsets. The DemandedElts
/// argument allows us to only collect the known bits that are shared by the
/// requested vector elements.
virtual void computeKnownBitsForTargetNode(const SDValue Op,
KnownBits &Known,
const APInt &DemandedElts,
const SelectionDAG &DAG,
unsigned Depth = 0) const;
/// Determine which of the bits specified in Mask are known to be either zero
/// or one and return them in the KnownZero/KnownOne bitsets. The DemandedElts
/// argument allows us to only collect the known bits that are shared by the
/// requested vector elements. This is for GISel.
virtual void computeKnownBitsForTargetInstr(GISelKnownBits &Analysis,
Register R, KnownBits &Known,
const APInt &DemandedElts,
const MachineRegisterInfo &MRI,
unsigned Depth = 0) const;
/// Determine the known alignment for the pointer value \p R. This is can
/// typically be inferred from the number of low known 0 bits. However, for a
/// pointer with a non-integral address space, the alignment value may be
/// independent from the known low bits.
virtual Align computeKnownAlignForTargetInstr(GISelKnownBits &Analysis,
Register R,
const MachineRegisterInfo &MRI,
unsigned Depth = 0) const;
/// Determine which of the bits of FrameIndex \p FIOp are known to be 0.
/// Default implementation computes low bits based on alignment
/// information. This should preserve known bits passed into it.
virtual void computeKnownBitsForFrameIndex(int FIOp,
KnownBits &Known,
const MachineFunction &MF) const;
/// This method can be implemented by targets that want to expose additional
/// information about sign bits to the DAG Combiner. The DemandedElts
/// argument allows us to only collect the minimum sign bits that are shared
/// by the requested vector elements.
virtual unsigned ComputeNumSignBitsForTargetNode(SDValue Op,
const APInt &DemandedElts,
const SelectionDAG &DAG,
unsigned Depth = 0) const;
/// This method can be implemented by targets that want to expose additional
/// information about sign bits to GlobalISel combiners. The DemandedElts
/// argument allows us to only collect the minimum sign bits that are shared
/// by the requested vector elements.
virtual unsigned computeNumSignBitsForTargetInstr(GISelKnownBits &Analysis,
Register R,
const APInt &DemandedElts,
const MachineRegisterInfo &MRI,
unsigned Depth = 0) const;
/// Attempt to simplify any target nodes based on the demanded vector
/// elements, returning true on success. Otherwise, analyze the expression and
/// return a mask of KnownUndef and KnownZero elements for the expression
/// (used to simplify the caller). The KnownUndef/Zero elements may only be
/// accurate for those bits in the DemandedMask.
virtual bool SimplifyDemandedVectorEltsForTargetNode(
SDValue Op, const APInt &DemandedElts, APInt &KnownUndef,
APInt &KnownZero, TargetLoweringOpt &TLO, unsigned Depth = 0) const;
/// Attempt to simplify any target nodes based on the demanded bits/elts,
/// returning true on success. Otherwise, analyze the
/// expression and return a mask of KnownOne and KnownZero bits for the
/// expression (used to simplify the caller). The KnownZero/One bits may only
/// be accurate for those bits in the Demanded masks.
virtual bool SimplifyDemandedBitsForTargetNode(SDValue Op,
const APInt &DemandedBits,
const APInt &DemandedElts,
KnownBits &Known,
TargetLoweringOpt &TLO,
unsigned Depth = 0) const;
/// More limited version of SimplifyDemandedBits that can be used to "look
/// through" ops that don't contribute to the DemandedBits/DemandedElts -
/// bitwise ops etc.
virtual SDValue SimplifyMultipleUseDemandedBitsForTargetNode(
SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts,
SelectionDAG &DAG, unsigned Depth) const;
/// Return true if this function can prove that \p Op is never poison
/// and, if \p PoisonOnly is false, does not have undef bits. The DemandedElts
/// argument limits the check to the requested vector elements.
virtual bool isGuaranteedNotToBeUndefOrPoisonForTargetNode(
SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG,
bool PoisonOnly, unsigned Depth) const;
/// Return true if Op can create undef or poison from non-undef & non-poison
/// operands. The DemandedElts argument limits the check to the requested
/// vector elements.
virtual bool
canCreateUndefOrPoisonForTargetNode(SDValue Op, const APInt &DemandedElts,
const SelectionDAG &DAG, bool PoisonOnly,
bool ConsiderFlags, unsigned Depth) const;
/// Tries to build a legal vector shuffle using the provided parameters
/// or equivalent variations. The Mask argument maybe be modified as the
/// function tries different variations.
/// Returns an empty SDValue if the operation fails.
SDValue buildLegalVectorShuffle(EVT VT, const SDLoc &DL, SDValue N0,
SDValue N1, MutableArrayRef<int> Mask,
SelectionDAG &DAG) const;
/// This method returns the constant pool value that will be loaded by LD.
/// NOTE: You must check for implicit extensions of the constant by LD.
virtual const Constant *getTargetConstantFromLoad(LoadSDNode *LD) const;
/// If \p SNaN is false, \returns true if \p Op is known to never be any
/// NaN. If \p sNaN is true, returns if \p Op is known to never be a signaling
/// NaN.
virtual bool isKnownNeverNaNForTargetNode(SDValue Op,
const SelectionDAG &DAG,
bool SNaN = false,
unsigned Depth = 0) const;
/// Return true if vector \p Op has the same value across all \p DemandedElts,
/// indicating any elements which may be undef in the output \p UndefElts.
virtual bool isSplatValueForTargetNode(SDValue Op, const APInt &DemandedElts,
APInt &UndefElts,
const SelectionDAG &DAG,
unsigned Depth = 0) const;
/// Returns true if the given Opc is considered a canonical constant for the
/// target, which should not be transformed back into a BUILD_VECTOR.
virtual bool isTargetCanonicalConstantNode(SDValue Op) const {
return Op.getOpcode() == ISD::SPLAT_VECTOR;
}
struct DAGCombinerInfo {
void *DC; // The DAG Combiner object.
CombineLevel Level;
bool CalledByLegalizer;
public:
SelectionDAG &DAG;
DAGCombinerInfo(SelectionDAG &dag, CombineLevel level, bool cl, void *dc)
: DC(dc), Level(level), CalledByLegalizer(cl), DAG(dag) {}
bool isBeforeLegalize() const { return Level == BeforeLegalizeTypes; }
bool isBeforeLegalizeOps() const { return Level < AfterLegalizeVectorOps; }
bool isAfterLegalizeDAG() const { return Level >= AfterLegalizeDAG; }
CombineLevel getDAGCombineLevel() { return Level; }
bool isCalledByLegalizer() const { return CalledByLegalizer; }
void AddToWorklist(SDNode *N);
SDValue CombineTo(SDNode *N, ArrayRef<SDValue> To, bool AddTo = true);
SDValue CombineTo(SDNode *N, SDValue Res, bool AddTo = true);
SDValue CombineTo(SDNode *N, SDValue Res0, SDValue Res1, bool AddTo = true);
bool recursivelyDeleteUnusedNodes(SDNode *N);
void CommitTargetLoweringOpt(const TargetLoweringOpt &TLO);
};
/// Return if the N is a constant or constant vector equal to the true value
/// from getBooleanContents().
bool isConstTrueVal(SDValue N) const;
/// Return if the N is a constant or constant vector equal to the false value
/// from getBooleanContents().
bool isConstFalseVal(SDValue N) const;
/// Return if \p N is a True value when extended to \p VT.
bool isExtendedTrueVal(const ConstantSDNode *N, EVT VT, bool SExt) const;
/// Try to simplify a setcc built with the specified operands and cc. If it is
/// unable to simplify it, return a null SDValue.
SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
bool foldBooleans, DAGCombinerInfo &DCI,
const SDLoc &dl) const;
// For targets which wrap address, unwrap for analysis.
virtual SDValue unwrapAddress(SDValue N) const { return N; }
/// Returns true (and the GlobalValue and the offset) if the node is a
/// GlobalAddress + offset.
virtual bool
isGAPlusOffset(SDNode *N, const GlobalValue* &GA, int64_t &Offset) const;
/// This method will be invoked for all target nodes and for any
/// target-independent nodes that the target has registered with invoke it
/// for.
///
/// The semantics are as follows:
/// Return Value:
/// SDValue.Val == 0 - No change was made
/// SDValue.Val == N - N was replaced, is dead, and is already handled.
/// otherwise - N should be replaced by the returned Operand.
///
/// In addition, methods provided by DAGCombinerInfo may be used to perform
/// more complex transformations.
///
virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
/// Return true if it is profitable to move this shift by a constant amount
/// through its operand, adjusting any immediate operands as necessary to
/// preserve semantics. This transformation may not be desirable if it
/// disrupts a particularly auspicious target-specific tree (e.g. bitfield
/// extraction in AArch64). By default, it returns true.
///
/// @param N the shift node
/// @param Level the current DAGCombine legalization level.
virtual bool isDesirableToCommuteWithShift(const SDNode *N,
CombineLevel Level) const {
return true;
}
/// GlobalISel - return true if it is profitable to move this shift by a
/// constant amount through its operand, adjusting any immediate operands as
/// necessary to preserve semantics. This transformation may not be desirable
/// if it disrupts a particularly auspicious target-specific tree (e.g.
/// bitfield extraction in AArch64). By default, it returns true.
///
/// @param MI the shift instruction
/// @param IsAfterLegal true if running after legalization.
virtual bool isDesirableToCommuteWithShift(const MachineInstr &MI,
bool IsAfterLegal) const {
return true;
}
// Return AndOrSETCCFoldKind::{AddAnd, ABS} if its desirable to try and
// optimize LogicOp(SETCC0, SETCC1). An example (what is implemented as of
// writing this) is:
// With C as a power of 2 and C != 0 and C != INT_MIN:
// AddAnd:
// (icmp eq A, C) | (icmp eq A, -C)
// -> (icmp eq and(add(A, C), ~(C + C)), 0)
// (icmp ne A, C) & (icmp ne A, -C)w
// -> (icmp ne and(add(A, C), ~(C + C)), 0)
// ABS:
// (icmp eq A, C) | (icmp eq A, -C)
// -> (icmp eq Abs(A), C)
// (icmp ne A, C) & (icmp ne A, -C)w
// -> (icmp ne Abs(A), C)
//
// @param LogicOp the logic op
// @param SETCC0 the first of the SETCC nodes
// @param SETCC0 the second of the SETCC nodes
virtual AndOrSETCCFoldKind isDesirableToCombineLogicOpOfSETCC(
const SDNode *LogicOp, const SDNode *SETCC0, const SDNode *SETCC1) const {
return AndOrSETCCFoldKind::None;
}
/// Return true if it is profitable to combine an XOR of a logical shift
/// to create a logical shift of NOT. This transformation may not be desirable
/// if it disrupts a particularly auspicious target-specific tree (e.g.
/// BIC on ARM/AArch64). By default, it returns true.
virtual bool isDesirableToCommuteXorWithShift(const SDNode *N) const {
return true;
}
/// Return true if the target has native support for the specified value type
/// and it is 'desirable' to use the type for the given node type. e.g. On x86
/// i16 is legal, but undesirable since i16 instruction encodings are longer
/// and some i16 instructions are slow.
virtual bool isTypeDesirableForOp(unsigned /*Opc*/, EVT VT) const {
// By default, assume all legal types are desirable.
return isTypeLegal(VT);
}
/// Return true if it is profitable for dag combiner to transform a floating
/// point op of specified opcode to a equivalent op of an integer
/// type. e.g. f32 load -> i32 load can be profitable on ARM.
virtual bool isDesirableToTransformToIntegerOp(unsigned /*Opc*/,
EVT /*VT*/) const {
return false;
}
/// This method query the target whether it is beneficial for dag combiner to
/// promote the specified node. If true, it should return the desired
/// promotion type by reference.
virtual bool IsDesirableToPromoteOp(SDValue /*Op*/, EVT &/*PVT*/) const {
return false;
}
/// Return true if the target supports swifterror attribute. It optimizes
/// loads and stores to reading and writing a specific register.
virtual bool supportSwiftError() const {
return false;
}
/// Return true if the target supports that a subset of CSRs for the given
/// machine function is handled explicitly via copies.
virtual bool supportSplitCSR(MachineFunction *MF) const {
return false;
}
/// Return true if the target supports kcfi operand bundles.
virtual bool supportKCFIBundles() const { return false; }
/// Perform necessary initialization to handle a subset of CSRs explicitly
/// via copies. This function is called at the beginning of instruction
/// selection.
virtual void initializeSplitCSR(MachineBasicBlock *Entry) const {
llvm_unreachable("Not Implemented");
}
/// Insert explicit copies in entry and exit blocks. We copy a subset of
/// CSRs to virtual registers in the entry block, and copy them back to
/// physical registers in the exit blocks. This function is called at the end
/// of instruction selection.
virtual void insertCopiesSplitCSR(
MachineBasicBlock *Entry,
const SmallVectorImpl<MachineBasicBlock *> &Exits) const {
llvm_unreachable("Not Implemented");
}
/// Return the newly negated expression if the cost is not expensive and
/// set the cost in \p Cost to indicate that if it is cheaper or neutral to
/// do the negation.
virtual SDValue getNegatedExpression(SDValue Op, SelectionDAG &DAG,
bool LegalOps, bool OptForSize,
NegatibleCost &Cost,
unsigned Depth = 0) const;
SDValue getCheaperOrNeutralNegatedExpression(
SDValue Op, SelectionDAG &DAG, bool LegalOps, bool OptForSize,
const NegatibleCost CostThreshold = NegatibleCost::Neutral,
unsigned Depth = 0) const {
NegatibleCost Cost = NegatibleCost::Expensive;
SDValue Neg =
getNegatedExpression(Op, DAG, LegalOps, OptForSize, Cost, Depth);
if (!Neg)
return SDValue();
if (Cost <= CostThreshold)
return Neg;
// Remove the new created node to avoid the side effect to the DAG.
if (Neg->use_empty())
DAG.RemoveDeadNode(Neg.getNode());
return SDValue();
}
/// This is the helper function to return the newly negated expression only
/// when the cost is cheaper.
SDValue getCheaperNegatedExpression(SDValue Op, SelectionDAG &DAG,
bool LegalOps, bool OptForSize,
unsigned Depth = 0) const {
return getCheaperOrNeutralNegatedExpression(Op, DAG, LegalOps, OptForSize,
NegatibleCost::Cheaper, Depth);
}
/// This is the helper function to return the newly negated expression if
/// the cost is not expensive.
SDValue getNegatedExpression(SDValue Op, SelectionDAG &DAG, bool LegalOps,
bool OptForSize, unsigned Depth = 0) const {
NegatibleCost Cost = NegatibleCost::Expensive;
return getNegatedExpression(Op, DAG, LegalOps, OptForSize, Cost, Depth);
}
//===--------------------------------------------------------------------===//
// Lowering methods - These methods must be implemented by targets so that
// the SelectionDAGBuilder code knows how to lower these.
//
/// Target-specific splitting of values into parts that fit a register
/// storing a legal type
virtual bool splitValueIntoRegisterParts(
SelectionDAG & DAG, const SDLoc &DL, SDValue Val, SDValue *Parts,
unsigned NumParts, MVT PartVT, std::optional<CallingConv::ID> CC) const {
return false;
}
/// Allows the target to handle physreg-carried dependency
/// in target-specific way. Used from the ScheduleDAGSDNodes to decide whether
/// to add the edge to the dependency graph.
/// Def - input: Selection DAG node defininfg physical register
/// User - input: Selection DAG node using physical register
/// Op - input: Number of User operand
/// PhysReg - inout: set to the physical register if the edge is
/// necessary, unchanged otherwise
/// Cost - inout: physical register copy cost.
/// Returns 'true' is the edge is necessary, 'false' otherwise
virtual bool checkForPhysRegDependency(SDNode *Def, SDNode *User, unsigned Op,
const TargetRegisterInfo *TRI,
const TargetInstrInfo *TII,
unsigned &PhysReg, int &Cost) const {
return false;
}
/// Target-specific combining of register parts into its original value
virtual SDValue
joinRegisterPartsIntoValue(SelectionDAG &DAG, const SDLoc &DL,
const SDValue *Parts, unsigned NumParts,
MVT PartVT, EVT ValueVT,
std::optional<CallingConv::ID> CC) const {
return SDValue();
}
/// This hook must be implemented to lower the incoming (formal) arguments,
/// described by the Ins array, into the specified DAG. The implementation
/// should fill in the InVals array with legal-type argument values, and
/// return the resulting token chain value.
virtual SDValue LowerFormalArguments(
SDValue /*Chain*/, CallingConv::ID /*CallConv*/, bool /*isVarArg*/,
const SmallVectorImpl<ISD::InputArg> & /*Ins*/, const SDLoc & /*dl*/,
SelectionDAG & /*DAG*/, SmallVectorImpl<SDValue> & /*InVals*/) const {
llvm_unreachable("Not Implemented");
}
/// This structure contains all information that is necessary for lowering
/// calls. It is passed to TLI::LowerCallTo when the SelectionDAG builder
/// needs to lower a call, and targets will see this struct in their LowerCall
/// implementation.
struct CallLoweringInfo {
SDValue Chain;
Type *RetTy = nullptr;
bool RetSExt : 1;
bool RetZExt : 1;
bool IsVarArg : 1;
bool IsInReg : 1;
bool DoesNotReturn : 1;
bool IsReturnValueUsed : 1;
bool IsConvergent : 1;
bool IsPatchPoint : 1;
bool IsPreallocated : 1;
bool NoMerge : 1;
// IsTailCall should be modified by implementations of
// TargetLowering::LowerCall that perform tail call conversions.
bool IsTailCall = false;
// Is Call lowering done post SelectionDAG type legalization.
bool IsPostTypeLegalization = false;
unsigned NumFixedArgs = -1;
CallingConv::ID CallConv = CallingConv::C;
SDValue Callee;
ArgListTy Args;
SelectionDAG &DAG;
SDLoc DL;
const CallBase *CB = nullptr;
SmallVector<ISD::OutputArg, 32> Outs;
SmallVector<SDValue, 32> OutVals;
SmallVector<ISD::InputArg, 32> Ins;
SmallVector<SDValue, 4> InVals;
const ConstantInt *CFIType = nullptr;
CallLoweringInfo(SelectionDAG &DAG)
: RetSExt(false), RetZExt(false), IsVarArg(false), IsInReg(false),
DoesNotReturn(false), IsReturnValueUsed(true), IsConvergent(false),
IsPatchPoint(false), IsPreallocated(false), NoMerge(false),
DAG(DAG) {}
CallLoweringInfo &setDebugLoc(const SDLoc &dl) {
DL = dl;
return *this;
}
CallLoweringInfo &setChain(SDValue InChain) {
Chain = InChain;
return *this;
}
// setCallee with target/module-specific attributes
CallLoweringInfo &setLibCallee(CallingConv::ID CC, Type *ResultType,
SDValue Target, ArgListTy &&ArgsList) {
RetTy = ResultType;
Callee = Target;
CallConv = CC;
NumFixedArgs = ArgsList.size();
Args = std::move(ArgsList);
DAG.getTargetLoweringInfo().markLibCallAttributes(
&(DAG.getMachineFunction()), CC, Args);
return *this;
}
CallLoweringInfo &setCallee(CallingConv::ID CC, Type *ResultType,
SDValue Target, ArgListTy &&ArgsList) {
RetTy = ResultType;
Callee = Target;
CallConv = CC;
NumFixedArgs = ArgsList.size();
Args = std::move(ArgsList);
return *this;
}
CallLoweringInfo &setCallee(Type *ResultType, FunctionType *FTy,
SDValue Target, ArgListTy &&ArgsList,
const CallBase &Call) {
RetTy = ResultType;
IsInReg = Call.hasRetAttr(Attribute::InReg);
DoesNotReturn =
Call.doesNotReturn() ||
(!isa<InvokeInst>(Call) && isa<UnreachableInst>(Call.getNextNode()));
IsVarArg = FTy->isVarArg();
IsReturnValueUsed = !Call.use_empty();
RetSExt = Call.hasRetAttr(Attribute::SExt);
RetZExt = Call.hasRetAttr(Attribute::ZExt);
NoMerge = Call.hasFnAttr(Attribute::NoMerge);
Callee = Target;
CallConv = Call.getCallingConv();
NumFixedArgs = FTy->getNumParams();
Args = std::move(ArgsList);
CB = &Call;
return *this;
}
CallLoweringInfo &setInRegister(bool Value = true) {
IsInReg = Value;
return *this;
}
CallLoweringInfo &setNoReturn(bool Value = true) {
DoesNotReturn = Value;
return *this;
}
CallLoweringInfo &setVarArg(bool Value = true) {
IsVarArg = Value;
return *this;
}
CallLoweringInfo &setTailCall(bool Value = true) {
IsTailCall = Value;
return *this;
}
CallLoweringInfo &setDiscardResult(bool Value = true) {
IsReturnValueUsed = !Value;
return *this;
}
CallLoweringInfo &setConvergent(bool Value = true) {
IsConvergent = Value;
return *this;
}
CallLoweringInfo &setSExtResult(bool Value = true) {
RetSExt = Value;
return *this;
}
CallLoweringInfo &setZExtResult(bool Value = true) {
RetZExt = Value;
return *this;
}
CallLoweringInfo &setIsPatchPoint(bool Value = true) {
IsPatchPoint = Value;
return *this;
}
CallLoweringInfo &setIsPreallocated(bool Value = true) {
IsPreallocated = Value;
return *this;
}
CallLoweringInfo &setIsPostTypeLegalization(bool Value=true) {
IsPostTypeLegalization = Value;
return *this;
}
CallLoweringInfo &setCFIType(const ConstantInt *Type) {
CFIType = Type;
return *this;
}
ArgListTy &getArgs() {
return Args;
}
};
/// This structure is used to pass arguments to makeLibCall function.
struct MakeLibCallOptions {
// By passing type list before soften to makeLibCall, the target hook
// shouldExtendTypeInLibCall can get the original type before soften.
ArrayRef<EVT> OpsVTBeforeSoften;
EVT RetVTBeforeSoften;
bool IsSExt : 1;
bool DoesNotReturn : 1;
bool IsReturnValueUsed : 1;
bool IsPostTypeLegalization : 1;
bool IsSoften : 1;
MakeLibCallOptions()
: IsSExt(false), DoesNotReturn(false), IsReturnValueUsed(true),
IsPostTypeLegalization(false), IsSoften(false) {}
MakeLibCallOptions &setSExt(bool Value = true) {
IsSExt = Value;
return *this;
}
MakeLibCallOptions &setNoReturn(bool Value = true) {
DoesNotReturn = Value;
return *this;
}
MakeLibCallOptions &setDiscardResult(bool Value = true) {
IsReturnValueUsed = !Value;
return *this;
}
MakeLibCallOptions &setIsPostTypeLegalization(bool Value = true) {
IsPostTypeLegalization = Value;
return *this;
}
MakeLibCallOptions &setTypeListBeforeSoften(ArrayRef<EVT> OpsVT, EVT RetVT,
bool Value = true) {
OpsVTBeforeSoften = OpsVT;
RetVTBeforeSoften = RetVT;
IsSoften = Value;
return *this;
}
};
/// This function lowers an abstract call to a function into an actual call.
/// This returns a pair of operands. The first element is the return value
/// for the function (if RetTy is not VoidTy). The second element is the
/// outgoing token chain. It calls LowerCall to do the actual lowering.
std::pair<SDValue, SDValue> LowerCallTo(CallLoweringInfo &CLI) const;
/// This hook must be implemented to lower calls into the specified
/// DAG. The outgoing arguments to the call are described by the Outs array,
/// and the values to be returned by the call are described by the Ins
/// array. The implementation should fill in the InVals array with legal-type
/// return values from the call, and return the resulting token chain value.
virtual SDValue
LowerCall(CallLoweringInfo &/*CLI*/,
SmallVectorImpl<SDValue> &/*InVals*/) const {
llvm_unreachable("Not Implemented");
}
/// Target-specific cleanup for formal ByVal parameters.
virtual void HandleByVal(CCState *, unsigned &, Align) const {}
/// This hook should be implemented to check whether the return values
/// described by the Outs array can fit into the return registers. If false
/// is returned, an sret-demotion is performed.
virtual bool CanLowerReturn(CallingConv::ID /*CallConv*/,
MachineFunction &/*MF*/, bool /*isVarArg*/,
const SmallVectorImpl<ISD::OutputArg> &/*Outs*/,
LLVMContext &/*Context*/) const
{
// Return true by default to get preexisting behavior.
return true;
}
/// This hook must be implemented to lower outgoing return values, described
/// by the Outs array, into the specified DAG. The implementation should
/// return the resulting token chain value.
virtual SDValue LowerReturn(SDValue /*Chain*/, CallingConv::ID /*CallConv*/,
bool /*isVarArg*/,
const SmallVectorImpl<ISD::OutputArg> & /*Outs*/,
const SmallVectorImpl<SDValue> & /*OutVals*/,
const SDLoc & /*dl*/,
SelectionDAG & /*DAG*/) const {
llvm_unreachable("Not Implemented");
}
/// Return true if result of the specified node is used by a return node
/// only. It also compute and return the input chain for the tail call.
///
/// This is used to determine whether it is possible to codegen a libcall as
/// tail call at legalization time.
virtual bool isUsedByReturnOnly(SDNode *, SDValue &/*Chain*/) const {
return false;
}
/// Return true if the target may be able emit the call instruction as a tail
/// call. This is used by optimization passes to determine if it's profitable
/// to duplicate return instructions to enable tailcall optimization.
virtual bool mayBeEmittedAsTailCall(const CallInst *) const {
return false;
}
/// Return the builtin name for the __builtin___clear_cache intrinsic
/// Default is to invoke the clear cache library call
virtual const char * getClearCacheBuiltinName() const {
return "__clear_cache";
}
/// Return the register ID of the name passed in. Used by named register
/// global variables extension. There is no target-independent behaviour
/// so the default action is to bail.
virtual Register getRegisterByName(const char* RegName, LLT Ty,
const MachineFunction &MF) const {
report_fatal_error("Named registers not implemented for this target");
}
/// Return the type that should be used to zero or sign extend a
/// zeroext/signext integer return value. FIXME: Some C calling conventions
/// require the return type to be promoted, but this is not true all the time,
/// e.g. i1/i8/i16 on x86/x86_64. It is also not necessary for non-C calling
/// conventions. The frontend should handle this and include all of the
/// necessary information.
virtual EVT getTypeForExtReturn(LLVMContext &Context, EVT VT,
ISD::NodeType /*ExtendKind*/) const {
EVT MinVT = getRegisterType(MVT::i32);
return VT.bitsLT(MinVT) ? MinVT : VT;
}
/// For some targets, an LLVM struct type must be broken down into multiple
/// simple types, but the calling convention specifies that the entire struct
/// must be passed in a block of consecutive registers.
virtual bool
functionArgumentNeedsConsecutiveRegisters(Type *Ty, CallingConv::ID CallConv,
bool isVarArg,
const DataLayout &DL) const {
return false;
}
/// For most targets, an LLVM type must be broken down into multiple
/// smaller types. Usually the halves are ordered according to the endianness
/// but for some platform that would break. So this method will default to
/// matching the endianness but can be overridden.
virtual bool
shouldSplitFunctionArgumentsAsLittleEndian(const DataLayout &DL) const {
return DL.isLittleEndian();
}
/// Returns a 0 terminated array of registers that can be safely used as
/// scratch registers.
virtual const MCPhysReg *getScratchRegisters(CallingConv::ID CC) const {
return nullptr;
}
/// Returns a 0 terminated array of rounding control registers that can be
/// attached into strict FP call.
virtual ArrayRef<MCPhysReg> getRoundingControlRegisters() const {
return ArrayRef<MCPhysReg>();
}
/// This callback is used to prepare for a volatile or atomic load.
/// It takes a chain node as input and returns the chain for the load itself.
///
/// Having a callback like this is necessary for targets like SystemZ,
/// which allows a CPU to reuse the result of a previous load indefinitely,
/// even if a cache-coherent store is performed by another CPU. The default
/// implementation does nothing.
virtual SDValue prepareVolatileOrAtomicLoad(SDValue Chain, const SDLoc &DL,
SelectionDAG &DAG) const {
return Chain;
}
/// Should SelectionDAG lower an atomic store of the given kind as a normal
/// StoreSDNode (as opposed to an AtomicSDNode)? NOTE: The intention is to
/// eventually migrate all targets to the using StoreSDNodes, but porting is
/// being done target at a time.
virtual bool lowerAtomicStoreAsStoreSDNode(const StoreInst &SI) const {
assert(SI.isAtomic() && "violated precondition");
return false;
}
/// Should SelectionDAG lower an atomic load of the given kind as a normal
/// LoadSDNode (as opposed to an AtomicSDNode)? NOTE: The intention is to
/// eventually migrate all targets to the using LoadSDNodes, but porting is
/// being done target at a time.
virtual bool lowerAtomicLoadAsLoadSDNode(const LoadInst &LI) const {
assert(LI.isAtomic() && "violated precondition");
return false;
}
/// This callback is invoked by the type legalizer to legalize nodes with an
/// illegal operand type but legal result types. It replaces the
/// LowerOperation callback in the type Legalizer. The reason we can not do
/// away with LowerOperation entirely is that LegalizeDAG isn't yet ready to
/// use this callback.
///
/// TODO: Consider merging with ReplaceNodeResults.
///
/// The target places new result values for the node in Results (their number
/// and types must exactly match those of the original return values of
/// the node), or leaves Results empty, which indicates that the node is not
/// to be custom lowered after all.
/// The default implementation calls LowerOperation.
virtual void LowerOperationWrapper(SDNode *N,
SmallVectorImpl<SDValue> &Results,
SelectionDAG &DAG) const;
/// This callback is invoked for operations that are unsupported by the
/// target, which are registered to use 'custom' lowering, and whose defined
/// values are all legal. If the target has no operations that require custom
/// lowering, it need not implement this. The default implementation of this
/// aborts.
virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
/// This callback is invoked when a node result type is illegal for the
/// target, and the operation was registered to use 'custom' lowering for that
/// result type. The target places new result values for the node in Results
/// (their number and types must exactly match those of the original return
/// values of the node), or leaves Results empty, which indicates that the
/// node is not to be custom lowered after all.
///
/// If the target has no operations that require custom lowering, it need not
/// implement this. The default implementation aborts.
virtual void ReplaceNodeResults(SDNode * /*N*/,
SmallVectorImpl<SDValue> &/*Results*/,
SelectionDAG &/*DAG*/) const {
llvm_unreachable("ReplaceNodeResults not implemented for this target!");
}
/// This method returns the name of a target specific DAG node.
virtual const char *getTargetNodeName(unsigned Opcode) const;
/// This method returns a target specific FastISel object, or null if the
/// target does not support "fast" ISel.
virtual FastISel *createFastISel(FunctionLoweringInfo &,
const TargetLibraryInfo *) const {
return nullptr;
}
bool verifyReturnAddressArgumentIsConstant(SDValue Op,
SelectionDAG &DAG) const;
//===--------------------------------------------------------------------===//
// Inline Asm Support hooks
//
/// This hook allows the target to expand an inline asm call to be explicit
/// llvm code if it wants to. This is useful for turning simple inline asms
/// into LLVM intrinsics, which gives the compiler more information about the
/// behavior of the code.
virtual bool ExpandInlineAsm(CallInst *) const {
return false;
}
enum ConstraintType {
C_Register, // Constraint represents specific register(s).
C_RegisterClass, // Constraint represents any of register(s) in class.
C_Memory, // Memory constraint.
C_Address, // Address constraint.
C_Immediate, // Requires an immediate.
C_Other, // Something else.
C_Unknown // Unsupported constraint.
};
enum ConstraintWeight {
// Generic weights.
CW_Invalid = -1, // No match.
CW_Okay = 0, // Acceptable.
CW_Good = 1, // Good weight.
CW_Better = 2, // Better weight.
CW_Best = 3, // Best weight.
// Well-known weights.
CW_SpecificReg = CW_Okay, // Specific register operands.
CW_Register = CW_Good, // Register operands.
CW_Memory = CW_Better, // Memory operands.
CW_Constant = CW_Best, // Constant operand.
CW_Default = CW_Okay // Default or don't know type.
};
/// This contains information for each constraint that we are lowering.
struct AsmOperandInfo : public InlineAsm::ConstraintInfo {
/// This contains the actual string for the code, like "m". TargetLowering
/// picks the 'best' code from ConstraintInfo::Codes that most closely
/// matches the operand.
std::string ConstraintCode;
/// Information about the constraint code, e.g. Register, RegisterClass,
/// Memory, Other, Unknown.
TargetLowering::ConstraintType ConstraintType = TargetLowering::C_Unknown;
/// If this is the result output operand or a clobber, this is null,
/// otherwise it is the incoming operand to the CallInst. This gets
/// modified as the asm is processed.
Value *CallOperandVal = nullptr;
/// The ValueType for the operand value.
MVT ConstraintVT = MVT::Other;
/// Copy constructor for copying from a ConstraintInfo.
AsmOperandInfo(InlineAsm::ConstraintInfo Info)
: InlineAsm::ConstraintInfo(std::move(Info)) {}
/// Return true of this is an input operand that is a matching constraint
/// like "4".
bool isMatchingInputConstraint() const;
/// If this is an input matching constraint, this method returns the output
/// operand it matches.
unsigned getMatchedOperand() const;
};
using AsmOperandInfoVector = std::vector<AsmOperandInfo>;
/// Split up the constraint string from the inline assembly value into the
/// specific constraints and their prefixes, and also tie in the associated
/// operand values. If this returns an empty vector, and if the constraint
/// string itself isn't empty, there was an error parsing.
virtual AsmOperandInfoVector ParseConstraints(const DataLayout &DL,
const TargetRegisterInfo *TRI,
const CallBase &Call) const;
/// Examine constraint type and operand type and determine a weight value.
/// The operand object must already have been set up with the operand type.
virtual ConstraintWeight getMultipleConstraintMatchWeight(
AsmOperandInfo &info, int maIndex) const;
/// Examine constraint string and operand type and determine a weight value.
/// The operand object must already have been set up with the operand type.
virtual ConstraintWeight getSingleConstraintMatchWeight(
AsmOperandInfo &info, const char *constraint) const;
/// Determines the constraint code and constraint type to use for the specific
/// AsmOperandInfo, setting OpInfo.ConstraintCode and OpInfo.ConstraintType.
/// If the actual operand being passed in is available, it can be passed in as
/// Op, otherwise an empty SDValue can be passed.
virtual void ComputeConstraintToUse(AsmOperandInfo &OpInfo,
SDValue Op,
SelectionDAG *DAG = nullptr) const;
/// Given a constraint, return the type of constraint it is for this target.
virtual ConstraintType getConstraintType(StringRef Constraint) const;
/// Given a physical register constraint (e.g. {edx}), return the register
/// number and the register class for the register.
///
/// Given a register class constraint, like 'r', if this corresponds directly
/// to an LLVM register class, return a register of 0 and the register class
/// pointer.
///
/// This should only be used for C_Register constraints. On error, this
/// returns a register number of 0 and a null register class pointer.
virtual std::pair<unsigned, const TargetRegisterClass *>
getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
StringRef Constraint, MVT VT) const;
virtual unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const {
if (ConstraintCode == "m")
return InlineAsm::Constraint_m;
if (ConstraintCode == "o")
return InlineAsm::Constraint_o;
if (ConstraintCode == "X")
return InlineAsm::Constraint_X;
if (ConstraintCode == "p")
return InlineAsm::Constraint_p;
return InlineAsm::Constraint_Unknown;
}
/// Try to replace an X constraint, which matches anything, with another that
/// has more specific requirements based on the type of the corresponding
/// operand. This returns null if there is no replacement to make.
virtual const char *LowerXConstraint(EVT ConstraintVT) const;
/// Lower the specified operand into the Ops vector. If it is invalid, don't
/// add anything to Ops.
virtual void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint,
std::vector<SDValue> &Ops,
SelectionDAG &DAG) const;
// Lower custom output constraints. If invalid, return SDValue().
virtual SDValue LowerAsmOutputForConstraint(SDValue &Chain, SDValue &Glue,
const SDLoc &DL,
const AsmOperandInfo &OpInfo,
SelectionDAG &DAG) const;
// Targets may override this function to collect operands from the CallInst
// and for example, lower them into the SelectionDAG operands.
virtual void CollectTargetIntrinsicOperands(const CallInst &I,
SmallVectorImpl<SDValue> &Ops,
SelectionDAG &DAG) const;
//===--------------------------------------------------------------------===//
// Div utility functions
//
SDValue BuildSDIV(SDNode *N, SelectionDAG &DAG, bool IsAfterLegalization,
SmallVectorImpl<SDNode *> &Created) const;
SDValue BuildUDIV(SDNode *N, SelectionDAG &DAG, bool IsAfterLegalization,
SmallVectorImpl<SDNode *> &Created) const;
/// Targets may override this function to provide custom SDIV lowering for
/// power-of-2 denominators. If the target returns an empty SDValue, LLVM
/// assumes SDIV is expensive and replaces it with a series of other integer
/// operations.
virtual SDValue BuildSDIVPow2(SDNode *N, const APInt &Divisor,
SelectionDAG &DAG,
SmallVectorImpl<SDNode *> &Created) const;
/// Targets may override this function to provide custom SREM lowering for
/// power-of-2 denominators. If the target returns an empty SDValue, LLVM
/// assumes SREM is expensive and replaces it with a series of other integer
/// operations.
virtual SDValue BuildSREMPow2(SDNode *N, const APInt &Divisor,
SelectionDAG &DAG,
SmallVectorImpl<SDNode *> &Created) const;
/// Indicate whether this target prefers to combine FDIVs with the same
/// divisor. If the transform should never be done, return zero. If the
/// transform should be done, return the minimum number of divisor uses
/// that must exist.
virtual unsigned combineRepeatedFPDivisors() const {
return 0;
}
/// Hooks for building estimates in place of slower divisions and square
/// roots.
/// Return either a square root or its reciprocal estimate value for the input
/// operand.
/// \p Enabled is a ReciprocalEstimate enum with value either 'Unspecified' or
/// 'Enabled' as set by a potential default override attribute.
/// If \p RefinementSteps is 'Unspecified', the number of Newton-Raphson
/// refinement iterations required to generate a sufficient (though not
/// necessarily IEEE-754 compliant) estimate is returned in that parameter.
/// The boolean UseOneConstNR output is used to select a Newton-Raphson
/// algorithm implementation that uses either one or two constants.
/// The boolean Reciprocal is used to select whether the estimate is for the
/// square root of the input operand or the reciprocal of its square root.
/// A target may choose to implement its own refinement within this function.
/// If that's true, then return '0' as the number of RefinementSteps to avoid
/// any further refinement of the estimate.
/// An empty SDValue return means no estimate sequence can be created.
virtual SDValue getSqrtEstimate(SDValue Operand, SelectionDAG &DAG,
int Enabled, int &RefinementSteps,
bool &UseOneConstNR, bool Reciprocal) const {
return SDValue();
}
/// Try to convert the fminnum/fmaxnum to a compare/select sequence. This is
/// required for correctness since InstCombine might have canonicalized a
/// fcmp+select sequence to a FMINNUM/FMAXNUM intrinsic. If we were to fall
/// through to the default expansion/soften to libcall, we might introduce a
/// link-time dependency on libm into a file that originally did not have one.
SDValue createSelectForFMINNUM_FMAXNUM(SDNode *Node, SelectionDAG &DAG) const;
/// Return a reciprocal estimate value for the input operand.
/// \p Enabled is a ReciprocalEstimate enum with value either 'Unspecified' or
/// 'Enabled' as set by a potential default override attribute.
/// If \p RefinementSteps is 'Unspecified', the number of Newton-Raphson
/// refinement iterations required to generate a sufficient (though not
/// necessarily IEEE-754 compliant) estimate is returned in that parameter.
/// A target may choose to implement its own refinement within this function.
/// If that's true, then return '0' as the number of RefinementSteps to avoid
/// any further refinement of the estimate.
/// An empty SDValue return means no estimate sequence can be created.
virtual SDValue getRecipEstimate(SDValue Operand, SelectionDAG &DAG,
int Enabled, int &RefinementSteps) const {
return SDValue();
}
/// Return a target-dependent comparison result if the input operand is
/// suitable for use with a square root estimate calculation. For example, the
/// comparison may check if the operand is NAN, INF, zero, normal, etc. The
/// result should be used as the condition operand for a select or branch.
virtual SDValue getSqrtInputTest(SDValue Operand, SelectionDAG &DAG,
const DenormalMode &Mode) const;
/// Return a target-dependent result if the input operand is not suitable for
/// use with a square root estimate calculation.
virtual SDValue getSqrtResultForDenormInput(SDValue Operand,
SelectionDAG &DAG) const {
return DAG.getConstantFP(0.0, SDLoc(Operand), Operand.getValueType());
}
//===--------------------------------------------------------------------===//
// Legalization utility functions
//
/// Expand a MUL or [US]MUL_LOHI of n-bit values into two or four nodes,
/// respectively, each computing an n/2-bit part of the result.
/// \param Result A vector that will be filled with the parts of the result
/// in little-endian order.
/// \param LL Low bits of the LHS of the MUL. You can use this parameter
/// if you want to control how low bits are extracted from the LHS.
/// \param LH High bits of the LHS of the MUL. See LL for meaning.
/// \param RL Low bits of the RHS of the MUL. See LL for meaning
/// \param RH High bits of the RHS of the MUL. See LL for meaning.
/// \returns true if the node has been expanded, false if it has not
bool expandMUL_LOHI(unsigned Opcode, EVT VT, const SDLoc &dl, SDValue LHS,
SDValue RHS, SmallVectorImpl<SDValue> &Result, EVT HiLoVT,
SelectionDAG &DAG, MulExpansionKind Kind,
SDValue LL = SDValue(), SDValue LH = SDValue(),
SDValue RL = SDValue(), SDValue RH = SDValue()) const;
/// Expand a MUL into two nodes. One that computes the high bits of
/// the result and one that computes the low bits.
/// \param HiLoVT The value type to use for the Lo and Hi nodes.
/// \param LL Low bits of the LHS of the MUL. You can use this parameter
/// if you want to control how low bits are extracted from the LHS.
/// \param LH High bits of the LHS of the MUL. See LL for meaning.
/// \param RL Low bits of the RHS of the MUL. See LL for meaning
/// \param RH High bits of the RHS of the MUL. See LL for meaning.
/// \returns true if the node has been expanded. false if it has not
bool expandMUL(SDNode *N, SDValue &Lo, SDValue &Hi, EVT HiLoVT,
SelectionDAG &DAG, MulExpansionKind Kind,
SDValue LL = SDValue(), SDValue LH = SDValue(),
SDValue RL = SDValue(), SDValue RH = SDValue()) const;
/// Attempt to expand an n-bit div/rem/divrem by constant using a n/2-bit
/// urem by constant and other arithmetic ops. The n/2-bit urem by constant
/// will be expanded by DAGCombiner. This is not possible for all constant
/// divisors.
/// \param N Node to expand
/// \param Result A vector that will be filled with the lo and high parts of
/// the results. For *DIVREM, this will be the quotient parts followed
/// by the remainder parts.
/// \param HiLoVT The value type to use for the Lo and Hi parts. Should be
/// half of VT.
/// \param LL Low bits of the LHS of the operation. You can use this
/// parameter if you want to control how low bits are extracted from
/// the LHS.
/// \param LH High bits of the LHS of the operation. See LL for meaning.
/// \returns true if the node has been expanded, false if it has not.
bool expandDIVREMByConstant(SDNode *N, SmallVectorImpl<SDValue> &Result,
EVT HiLoVT, SelectionDAG &DAG,
SDValue LL = SDValue(),
SDValue LH = SDValue()) const;
/// Expand funnel shift.
/// \param N Node to expand
/// \returns The expansion if successful, SDValue() otherwise
SDValue expandFunnelShift(SDNode *N, SelectionDAG &DAG) const;
/// Expand rotations.
/// \param N Node to expand
/// \param AllowVectorOps expand vector rotate, this should only be performed
/// if the legalization is happening outside of LegalizeVectorOps
/// \returns The expansion if successful, SDValue() otherwise
SDValue expandROT(SDNode *N, bool AllowVectorOps, SelectionDAG &DAG) const;
/// Expand shift-by-parts.
/// \param N Node to expand
/// \param Lo lower-output-part after conversion
/// \param Hi upper-output-part after conversion
void expandShiftParts(SDNode *N, SDValue &Lo, SDValue &Hi,
SelectionDAG &DAG) const;
/// Expand float(f32) to SINT(i64) conversion
/// \param N Node to expand
/// \param Result output after conversion
/// \returns True, if the expansion was successful, false otherwise
bool expandFP_TO_SINT(SDNode *N, SDValue &Result, SelectionDAG &DAG) const;
/// Expand float to UINT conversion
/// \param N Node to expand
/// \param Result output after conversion
/// \param Chain output chain after conversion
/// \returns True, if the expansion was successful, false otherwise
bool expandFP_TO_UINT(SDNode *N, SDValue &Result, SDValue &Chain,
SelectionDAG &DAG) const;
/// Expand UINT(i64) to double(f64) conversion
/// \param N Node to expand
/// \param Result output after conversion
/// \param Chain output chain after conversion
/// \returns True, if the expansion was successful, false otherwise
bool expandUINT_TO_FP(SDNode *N, SDValue &Result, SDValue &Chain,
SelectionDAG &DAG) const;
/// Expand fminnum/fmaxnum into fminnum_ieee/fmaxnum_ieee with quieted inputs.
SDValue expandFMINNUM_FMAXNUM(SDNode *N, SelectionDAG &DAG) const;
/// Expand FP_TO_[US]INT_SAT into FP_TO_[US]INT and selects or min/max.
/// \param N Node to expand
/// \returns The expansion result
SDValue expandFP_TO_INT_SAT(SDNode *N, SelectionDAG &DAG) const;
/// Expand check for floating point class.
/// \param ResultVT The type of intrinsic call result.
/// \param Op The tested value.
/// \param Test The test to perform.
/// \param Flags The optimization flags.
/// \returns The expansion result or SDValue() if it fails.
SDValue expandIS_FPCLASS(EVT ResultVT, SDValue Op, FPClassTest Test,
SDNodeFlags Flags, const SDLoc &DL,
SelectionDAG &DAG) const;
/// Expand CTPOP nodes. Expands vector/scalar CTPOP nodes,
/// vector nodes can only succeed if all operations are legal/custom.
/// \param N Node to expand
/// \returns The expansion result or SDValue() if it fails.
SDValue expandCTPOP(SDNode *N, SelectionDAG &DAG) const;
/// Expand VP_CTPOP nodes.
/// \returns The expansion result or SDValue() if it fails.
SDValue expandVPCTPOP(SDNode *N, SelectionDAG &DAG) const;
/// Expand CTLZ/CTLZ_ZERO_UNDEF nodes. Expands vector/scalar CTLZ nodes,
/// vector nodes can only succeed if all operations are legal/custom.
/// \param N Node to expand
/// \returns The expansion result or SDValue() if it fails.
SDValue expandCTLZ(SDNode *N, SelectionDAG &DAG) const;
/// Expand VP_CTLZ/VP_CTLZ_ZERO_UNDEF nodes.
/// \param N Node to expand
/// \returns The expansion result or SDValue() if it fails.
SDValue expandVPCTLZ(SDNode *N, SelectionDAG &DAG) const;
/// Expand CTTZ via Table Lookup.
/// \param N Node to expand
/// \returns The expansion result or SDValue() if it fails.
SDValue CTTZTableLookup(SDNode *N, SelectionDAG &DAG, const SDLoc &DL, EVT VT,
SDValue Op, unsigned NumBitsPerElt) const;
/// Expand CTTZ/CTTZ_ZERO_UNDEF nodes. Expands vector/scalar CTTZ nodes,
/// vector nodes can only succeed if all operations are legal/custom.
/// \param N Node to expand
/// \returns The expansion result or SDValue() if it fails.
SDValue expandCTTZ(SDNode *N, SelectionDAG &DAG) const;
/// Expand VP_CTTZ/VP_CTTZ_ZERO_UNDEF nodes.
/// \param N Node to expand
/// \returns The expansion result or SDValue() if it fails.
SDValue expandVPCTTZ(SDNode *N, SelectionDAG &DAG) const;
/// Expand ABS nodes. Expands vector/scalar ABS nodes,
/// vector nodes can only succeed if all operations are legal/custom.
/// (ABS x) -> (XOR (ADD x, (SRA x, type_size)), (SRA x, type_size))
/// \param N Node to expand
/// \param IsNegative indicate negated abs
/// \returns The expansion result or SDValue() if it fails.
SDValue expandABS(SDNode *N, SelectionDAG &DAG,
bool IsNegative = false) const;
/// Expand ABDS/ABDU nodes. Expands vector/scalar ABDS/ABDU nodes.
/// \param N Node to expand
/// \returns The expansion result or SDValue() if it fails.
SDValue expandABD(SDNode *N, SelectionDAG &DAG) const;
/// Expand BSWAP nodes. Expands scalar/vector BSWAP nodes with i16/i32/i64
/// scalar types. Returns SDValue() if expand fails.
/// \param N Node to expand
/// \returns The expansion result or SDValue() if it fails.
SDValue expandBSWAP(SDNode *N, SelectionDAG &DAG) const;
/// Expand VP_BSWAP nodes. Expands VP_BSWAP nodes with
/// i16/i32/i64 scalar types. Returns SDValue() if expand fails. \param N Node
/// to expand \returns The expansion result or SDValue() if it fails.
SDValue expandVPBSWAP(SDNode *N, SelectionDAG &DAG) const;
/// Expand BITREVERSE nodes. Expands scalar/vector BITREVERSE nodes.
/// Returns SDValue() if expand fails.
/// \param N Node to expand
/// \returns The expansion result or SDValue() if it fails.
SDValue expandBITREVERSE(SDNode *N, SelectionDAG &DAG) const;
/// Expand VP_BITREVERSE nodes. Expands VP_BITREVERSE nodes with
/// i8/i16/i32/i64 scalar types. \param N Node to expand \returns The
/// expansion result or SDValue() if it fails.
SDValue expandVPBITREVERSE(SDNode *N, SelectionDAG &DAG) const;
/// Turn load of vector type into a load of the individual elements.
/// \param LD load to expand
/// \returns BUILD_VECTOR and TokenFactor nodes.
std::pair<SDValue, SDValue> scalarizeVectorLoad(LoadSDNode *LD,
SelectionDAG &DAG) const;
// Turn a store of a vector type into stores of the individual elements.
/// \param ST Store with a vector value type
/// \returns TokenFactor of the individual store chains.
SDValue scalarizeVectorStore(StoreSDNode *ST, SelectionDAG &DAG) const;
/// Expands an unaligned load to 2 half-size loads for an integer, and
/// possibly more for vectors.
std::pair<SDValue, SDValue> expandUnalignedLoad(LoadSDNode *LD,
SelectionDAG &DAG) const;
/// Expands an unaligned store to 2 half-size stores for integer values, and
/// possibly more for vectors.
SDValue expandUnalignedStore(StoreSDNode *ST, SelectionDAG &DAG) const;
/// Increments memory address \p Addr according to the type of the value
/// \p DataVT that should be stored. If the data is stored in compressed
/// form, the memory address should be incremented according to the number of
/// the stored elements. This number is equal to the number of '1's bits
/// in the \p Mask.
/// \p DataVT is a vector type. \p Mask is a vector value.
/// \p DataVT and \p Mask have the same number of vector elements.
SDValue IncrementMemoryAddress(SDValue Addr, SDValue Mask, const SDLoc &DL,
EVT DataVT, SelectionDAG &DAG,
bool IsCompressedMemory) const;
/// Get a pointer to vector element \p Idx located in memory for a vector of
/// type \p VecVT starting at a base address of \p VecPtr. If \p Idx is out of
/// bounds the returned pointer is unspecified, but will be within the vector
/// bounds.
SDValue getVectorElementPointer(SelectionDAG &DAG, SDValue VecPtr, EVT VecVT,
SDValue Index) const;
/// Get a pointer to a sub-vector of type \p SubVecVT at index \p Idx located
/// in memory for a vector of type \p VecVT starting at a base address of
/// \p VecPtr. If \p Idx plus the size of \p SubVecVT is out of bounds the
/// returned pointer is unspecified, but the value returned will be such that
/// the entire subvector would be within the vector bounds.
SDValue getVectorSubVecPointer(SelectionDAG &DAG, SDValue VecPtr, EVT VecVT,
EVT SubVecVT, SDValue Index) const;
/// Method for building the DAG expansion of ISD::[US][MIN|MAX]. This
/// method accepts integers as its arguments.
SDValue expandIntMINMAX(SDNode *Node, SelectionDAG &DAG) const;
/// Method for building the DAG expansion of ISD::[US][ADD|SUB]SAT. This
/// method accepts integers as its arguments.
SDValue expandAddSubSat(SDNode *Node, SelectionDAG &DAG) const;
/// Method for building the DAG expansion of ISD::[US]SHLSAT. This
/// method accepts integers as its arguments.
SDValue expandShlSat(SDNode *Node, SelectionDAG &DAG) const;
/// Method for building the DAG expansion of ISD::[U|S]MULFIX[SAT]. This
/// method accepts integers as its arguments.
SDValue expandFixedPointMul(SDNode *Node, SelectionDAG &DAG) const;
/// Method for building the DAG expansion of ISD::[US]DIVFIX[SAT]. This
/// method accepts integers as its arguments.
/// Note: This method may fail if the division could not be performed
/// within the type. Clients must retry with a wider type if this happens.
SDValue expandFixedPointDiv(unsigned Opcode, const SDLoc &dl,
SDValue LHS, SDValue RHS,
unsigned Scale, SelectionDAG &DAG) const;
/// Method for building the DAG expansion of ISD::U(ADD|SUB)O. Expansion
/// always suceeds and populates the Result and Overflow arguments.
void expandUADDSUBO(SDNode *Node, SDValue &Result, SDValue &Overflow,
SelectionDAG &DAG) const;
/// Method for building the DAG expansion of ISD::S(ADD|SUB)O. Expansion
/// always suceeds and populates the Result and Overflow arguments.
void expandSADDSUBO(SDNode *Node, SDValue &Result, SDValue &Overflow,
SelectionDAG &DAG) const;
/// Method for building the DAG expansion of ISD::[US]MULO. Returns whether
/// expansion was successful and populates the Result and Overflow arguments.
bool expandMULO(SDNode *Node, SDValue &Result, SDValue &Overflow,
SelectionDAG &DAG) const;
/// Expand a VECREDUCE_* into an explicit calculation. If Count is specified,
/// only the first Count elements of the vector are used.
SDValue expandVecReduce(SDNode *Node, SelectionDAG &DAG) const;
/// Expand a VECREDUCE_SEQ_* into an explicit ordered calculation.
SDValue expandVecReduceSeq(SDNode *Node, SelectionDAG &DAG) const;
/// Expand an SREM or UREM using SDIV/UDIV or SDIVREM/UDIVREM, if legal.
/// Returns true if the expansion was successful.
bool expandREM(SDNode *Node, SDValue &Result, SelectionDAG &DAG) const;
/// Method for building the DAG expansion of ISD::VECTOR_SPLICE. This
/// method accepts vectors as its arguments.
SDValue expandVectorSplice(SDNode *Node, SelectionDAG &DAG) const;
/// Legalize a SETCC or VP_SETCC with given LHS and RHS and condition code CC
/// on the current target. A VP_SETCC will additionally be given a Mask
/// and/or EVL not equal to SDValue().
///
/// If the SETCC has been legalized using AND / OR, then the legalized node
/// will be stored in LHS. RHS and CC will be set to SDValue(). NeedInvert
/// will be set to false. This will also hold if the VP_SETCC has been
/// legalized using VP_AND / VP_OR.
///
/// If the SETCC / VP_SETCC has been legalized by using
/// getSetCCSwappedOperands(), then the values of LHS and RHS will be
/// swapped, CC will be set to the new condition, and NeedInvert will be set
/// to false.
///
/// If the SETCC / VP_SETCC has been legalized using the inverse condcode,
/// then LHS and RHS will be unchanged, CC will set to the inverted condcode,
/// and NeedInvert will be set to true. The caller must invert the result of
/// the SETCC with SelectionDAG::getLogicalNOT() or take equivalent action to
/// swap the effect of a true/false result.
///
/// \returns true if the SETCC / VP_SETCC has been legalized, false if it
/// hasn't.
bool LegalizeSetCCCondCode(SelectionDAG &DAG, EVT VT, SDValue &LHS,
SDValue &RHS, SDValue &CC, SDValue Mask,
SDValue EVL, bool &NeedInvert, const SDLoc &dl,
SDValue &Chain, bool IsSignaling = false) const;
//===--------------------------------------------------------------------===//
// Instruction Emitting Hooks
//
/// This method should be implemented by targets that mark instructions with
/// the 'usesCustomInserter' flag. These instructions are special in various
/// ways, which require special support to insert. The specified MachineInstr
/// is created but not inserted into any basic blocks, and this method is
/// called to expand it into a sequence of instructions, potentially also
/// creating new basic blocks and control flow.
/// As long as the returned basic block is different (i.e., we created a new
/// one), the custom inserter is free to modify the rest of \p MBB.
virtual MachineBasicBlock *
EmitInstrWithCustomInserter(MachineInstr &MI, MachineBasicBlock *MBB) const;
/// This method should be implemented by targets that mark instructions with
/// the 'hasPostISelHook' flag. These instructions must be adjusted after
/// instruction selection by target hooks. e.g. To fill in optional defs for
/// ARM 's' setting instructions.
virtual void AdjustInstrPostInstrSelection(MachineInstr &MI,
SDNode *Node) const;
/// If this function returns true, SelectionDAGBuilder emits a
/// LOAD_STACK_GUARD node when it is lowering Intrinsic::stackprotector.
virtual bool useLoadStackGuardNode() const {
return false;
}
virtual SDValue emitStackGuardXorFP(SelectionDAG &DAG, SDValue Val,
const SDLoc &DL) const {
llvm_unreachable("not implemented for this target");
}
/// Lower TLS global address SDNode for target independent emulated TLS model.
virtual SDValue LowerToTLSEmulatedModel(const GlobalAddressSDNode *GA,
SelectionDAG &DAG) const;
/// Expands target specific indirect branch for the case of JumpTable
/// expanasion.
virtual SDValue expandIndirectJTBranch(const SDLoc& dl, SDValue Value, SDValue Addr,
SelectionDAG &DAG) const {
return DAG.getNode(ISD::BRIND, dl, MVT::Other, Value, Addr);
}
// seteq(x, 0) -> truncate(srl(ctlz(zext(x)), log2(#bits)))
// If we're comparing for equality to zero and isCtlzFast is true, expose the
// fact that this can be implemented as a ctlz/srl pair, so that the dag
// combiner can fold the new nodes.
SDValue lowerCmpEqZeroToCtlzSrl(SDValue Op, SelectionDAG &DAG) const;
private:
SDValue foldSetCCWithAnd(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
const SDLoc &DL, DAGCombinerInfo &DCI) const;
SDValue foldSetCCWithBinOp(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
const SDLoc &DL, DAGCombinerInfo &DCI) const;
SDValue optimizeSetCCOfSignedTruncationCheck(EVT SCCVT, SDValue N0,
SDValue N1, ISD::CondCode Cond,
DAGCombinerInfo &DCI,
const SDLoc &DL) const;
// (X & (C l>>/<< Y)) ==/!= 0 --> ((X <</l>> Y) & C) ==/!= 0
SDValue optimizeSetCCByHoistingAndByConstFromLogicalShift(
EVT SCCVT, SDValue N0, SDValue N1C, ISD::CondCode Cond,
DAGCombinerInfo &DCI, const SDLoc &DL) const;
SDValue prepareUREMEqFold(EVT SETCCVT, SDValue REMNode,
SDValue CompTargetNode, ISD::CondCode Cond,
DAGCombinerInfo &DCI, const SDLoc &DL,
SmallVectorImpl<SDNode *> &Created) const;
SDValue buildUREMEqFold(EVT SETCCVT, SDValue REMNode, SDValue CompTargetNode,
ISD::CondCode Cond, DAGCombinerInfo &DCI,
const SDLoc &DL) const;
SDValue prepareSREMEqFold(EVT SETCCVT, SDValue REMNode,
SDValue CompTargetNode, ISD::CondCode Cond,
DAGCombinerInfo &DCI, const SDLoc &DL,
SmallVectorImpl<SDNode *> &Created) const;
SDValue buildSREMEqFold(EVT SETCCVT, SDValue REMNode, SDValue CompTargetNode,
ISD::CondCode Cond, DAGCombinerInfo &DCI,
const SDLoc &DL) const;
};
/// Given an LLVM IR type and return type attributes, compute the return value
/// EVTs and flags, and optionally also the offsets, if the return value is
/// being lowered to memory.
void GetReturnInfo(CallingConv::ID CC, Type *ReturnType, AttributeList attr,
SmallVectorImpl<ISD::OutputArg> &Outs,
const TargetLowering &TLI, const DataLayout &DL);
} // end namespace llvm
#endif // LLVM_CODEGEN_TARGETLOWERING_H
PK iwFZYrGg g CodeGen/IndirectThunks.hnu �[��� //===---- IndirectThunks.h - Indirect Thunk Base Class ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// Contains a base class for Passes that inject an MI thunk.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_INDIRECTTHUNKS_H
#define LLVM_CODEGEN_INDIRECTTHUNKS_H
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/IR/IRBuilder.h"
#include "llvm/IR/Module.h"
namespace llvm {
template <typename Derived, typename InsertedThunksTy = bool>
class ThunkInserter {
Derived &getDerived() { return *static_cast<Derived *>(this); }
protected:
// A variable used to track whether (and possible which) thunks have been
// inserted so far. InsertedThunksTy is usually a bool, but can be other types
// to represent more than one type of thunk. Requires an |= operator to
// accumulate results.
InsertedThunksTy InsertedThunks;
void doInitialization(Module &M) {}
void createThunkFunction(MachineModuleInfo &MMI, StringRef Name,
bool Comdat = true, StringRef TargetAttrs = "");
public:
void init(Module &M) {
InsertedThunks = InsertedThunksTy{};
getDerived().doInitialization(M);
}
// return `true` if `MMI` or `MF` was modified
bool run(MachineModuleInfo &MMI, MachineFunction &MF);
};
template <typename Derived, typename InsertedThunksTy>
void ThunkInserter<Derived, InsertedThunksTy>::createThunkFunction(
MachineModuleInfo &MMI, StringRef Name, bool Comdat,
StringRef TargetAttrs) {
assert(Name.startswith(getDerived().getThunkPrefix()) &&
"Created a thunk with an unexpected prefix!");
Module &M = const_cast<Module &>(*MMI.getModule());
LLVMContext &Ctx = M.getContext();
auto Type = FunctionType::get(Type::getVoidTy(Ctx), false);
Function *F = Function::Create(Type,
Comdat ? GlobalValue::LinkOnceODRLinkage
: GlobalValue::InternalLinkage,
Name, &M);
if (Comdat) {
F->setVisibility(GlobalValue::HiddenVisibility);
F->setComdat(M.getOrInsertComdat(Name));
}
// Add Attributes so that we don't create a frame, unwind information, or
// inline.
AttrBuilder B(Ctx);
B.addAttribute(llvm::Attribute::NoUnwind);
B.addAttribute(llvm::Attribute::Naked);
if (TargetAttrs != "")
B.addAttribute("target-features", TargetAttrs);
F->addFnAttrs(B);
// Populate our function a bit so that we can verify.
BasicBlock *Entry = BasicBlock::Create(Ctx, "entry", F);
IRBuilder<> Builder(Entry);
Builder.CreateRetVoid();
// MachineFunctions aren't created automatically for the IR-level constructs
// we already made. Create them and insert them into the module.
MachineFunction &MF = MMI.getOrCreateMachineFunction(*F);
// A MachineBasicBlock must not be created for the Entry block; code
// generation from an empty naked function in C source code also does not
// generate one. At least GlobalISel asserts if this invariant isn't
// respected.
// Set MF properties. We never use vregs...
MF.getProperties().set(MachineFunctionProperties::Property::NoVRegs);
}
template <typename Derived, typename InsertedThunksTy>
bool ThunkInserter<Derived, InsertedThunksTy>::run(MachineModuleInfo &MMI,
MachineFunction &MF) {
// If MF is not a thunk, check to see if we need to insert a thunk.
if (!MF.getName().startswith(getDerived().getThunkPrefix())) {
// Only add a thunk if one of the functions has the corresponding feature
// enabled in its subtarget, and doesn't enable external thunks. The target
// can use InsertedThunks to detect whether relevant thunks have already
// been inserted.
// FIXME: Conditionalize on indirect calls so we don't emit a thunk when
// nothing will end up calling it.
// FIXME: It's a little silly to look at every function just to enumerate
// the subtargets, but eventually we'll want to look at them for indirect
// calls, so maybe this is OK.
if (!getDerived().mayUseThunk(MF, InsertedThunks))
return false;
InsertedThunks |= getDerived().insertThunks(MMI, MF);
return true;
}
// If this *is* a thunk function, we need to populate it with the correct MI.
getDerived().populateThunk(MF);
return true;
}
} // namespace llvm
#endif
PK iwFZ���n� � CodeGen/RegisterScavenging.hnu �[��� //===- RegisterScavenging.h - Machine register scavenging -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file
/// This file declares the machine register scavenger class. It can provide
/// information such as unused register at any point in a machine basic block.
/// It also provides a mechanism to make registers available by evicting them
/// to spill slots.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
#define LLVM_CODEGEN_REGISTERSCAVENGING_H
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/LiveRegUnits.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/MC/LaneBitmask.h"
namespace llvm {
class MachineInstr;
class TargetInstrInfo;
class TargetRegisterClass;
class TargetRegisterInfo;
class RegScavenger {
const TargetRegisterInfo *TRI = nullptr;
const TargetInstrInfo *TII = nullptr;
MachineRegisterInfo *MRI = nullptr;
MachineBasicBlock *MBB = nullptr;
MachineBasicBlock::iterator MBBI;
unsigned NumRegUnits = 0;
/// True if RegScavenger is currently tracking the liveness of registers.
bool Tracking = false;
/// Information on scavenged registers (held in a spill slot).
struct ScavengedInfo {
ScavengedInfo(int FI = -1) : FrameIndex(FI) {}
/// A spill slot used for scavenging a register post register allocation.
int FrameIndex;
/// If non-zero, the specific register is currently being
/// scavenged. That is, it is spilled to this scavenging stack slot.
Register Reg;
/// The instruction that restores the scavenged register from stack.
const MachineInstr *Restore = nullptr;
};
/// A vector of information on scavenged registers.
SmallVector<ScavengedInfo, 2> Scavenged;
LiveRegUnits LiveUnits;
// These BitVectors are only used internally to forward(). They are members
// to avoid frequent reallocations.
BitVector KillRegUnits, DefRegUnits;
BitVector TmpRegUnits;
public:
RegScavenger() = default;
/// Record that \p Reg is in use at scavenging index \p FI. This is for
/// targets which need to directly manage the spilling process, and need to
/// update the scavenger's internal state. It's expected this be called a
/// second time with \p Restore set to a non-null value, so that the
/// externally inserted restore instruction resets the scavenged slot
/// liveness when encountered.
void assignRegToScavengingIndex(int FI, Register Reg,
MachineInstr *Restore = nullptr) {
for (ScavengedInfo &Slot : Scavenged) {
if (Slot.FrameIndex == FI) {
assert(!Slot.Reg || Slot.Reg == Reg);
Slot.Reg = Reg;
Slot.Restore = Restore;
return;
}
}
llvm_unreachable("did not find scavenging index");
}
/// Start tracking liveness from the begin of basic block \p MBB.
void enterBasicBlock(MachineBasicBlock &MBB);
/// Start tracking liveness from the end of basic block \p MBB.
/// Use backward() to move towards the beginning of the block. This is
/// preferred to enterBasicBlock() and forward() because it does not depend
/// on the presence of kill flags.
void enterBasicBlockEnd(MachineBasicBlock &MBB);
/// Move the internal MBB iterator and update register states.
void forward();
/// Move the internal MBB iterator and update register states until
/// it has processed the specific iterator.
void forward(MachineBasicBlock::iterator I) {
while (!Tracking || MBBI != I)
forward();
}
/// Update internal register state and move MBB iterator backwards.
/// Contrary to unprocess() this method gives precise results even in the
/// absence of kill flags.
void backward();
/// Call backward() as long as the internal iterator does not point to \p I.
void backward(MachineBasicBlock::iterator I) {
while (MBBI != I)
backward();
}
/// Move the internal MBB iterator but do not update register states.
void skipTo(MachineBasicBlock::iterator I) {
if (I == MachineBasicBlock::iterator(nullptr))
Tracking = false;
MBBI = I;
}
MachineBasicBlock::iterator getCurrentPosition() const { return MBBI; }
/// Return if a specific register is currently used.
bool isRegUsed(Register Reg, bool includeReserved = true) const;
/// Return all available registers in the register class in Mask.
BitVector getRegsAvailable(const TargetRegisterClass *RC);
/// Find an unused register of the specified register class.
/// Return 0 if none is found.
Register FindUnusedReg(const TargetRegisterClass *RC) const;
/// Add a scavenging frame index.
void addScavengingFrameIndex(int FI) {
Scavenged.push_back(ScavengedInfo(FI));
}
/// Query whether a frame index is a scavenging frame index.
bool isScavengingFrameIndex(int FI) const {
for (const ScavengedInfo &SI : Scavenged)
if (SI.FrameIndex == FI)
return true;
return false;
}
/// Get an array of scavenging frame indices.
void getScavengingFrameIndices(SmallVectorImpl<int> &A) const {
for (const ScavengedInfo &I : Scavenged)
if (I.FrameIndex >= 0)
A.push_back(I.FrameIndex);
}
/// Make a register of the specific register class available from the current
/// position backwards to the place before \p To. If \p RestoreAfter is true
/// this includes the instruction following the current position.
/// SPAdj is the stack adjustment due to call frame, it's passed along to
/// eliminateFrameIndex().
/// Returns the scavenged register.
///
/// If \p AllowSpill is false, fail if a spill is required to make the
/// register available, and return NoRegister.
Register scavengeRegisterBackwards(const TargetRegisterClass &RC,
MachineBasicBlock::iterator To,
bool RestoreAfter, int SPAdj,
bool AllowSpill = true);
/// Tell the scavenger a register is used.
void setRegUsed(Register Reg, LaneBitmask LaneMask = LaneBitmask::getAll());
private:
/// Returns true if a register is reserved. It is never "unused".
bool isReserved(Register Reg) const { return MRI->isReserved(Reg); }
/// setUsed / setUnused - Mark the state of one or a number of register units.
///
void setUsed(const BitVector &RegUnits) {
LiveUnits.addUnits(RegUnits);
}
void setUnused(const BitVector &RegUnits) {
LiveUnits.removeUnits(RegUnits);
}
/// Processes the current instruction and fill the KillRegUnits and
/// DefRegUnits bit vectors.
void determineKillsAndDefs();
/// Add all Reg Units that Reg contains to BV.
void addRegUnits(BitVector &BV, MCRegister Reg);
/// Remove all Reg Units that \p Reg contains from \p BV.
void removeRegUnits(BitVector &BV, MCRegister Reg);
/// Initialize RegisterScavenger.
void init(MachineBasicBlock &MBB);
/// Spill a register after position \p After and reload it before position
/// \p UseMI.
ScavengedInfo &spill(Register Reg, const TargetRegisterClass &RC, int SPAdj,
MachineBasicBlock::iterator Before,
MachineBasicBlock::iterator &UseMI);
};
/// Replaces all frame index virtual registers with physical registers. Uses the
/// register scavenger to find an appropriate register to use.
void scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS);
} // end namespace llvm
#endif // LLVM_CODEGEN_REGISTERSCAVENGING_H
PK iwFZ:��� � CodeGen/MIRSampleProfile.hnu �[��� //===----- MIRSampleProfile.h: SampleFDO Support in MIR ---*- c++ -*-------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the supoorting functions for machine level Sample FDO
// loader. This is used in Flow Sensitive SampelFDO.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MIRSAMPLEPROFILE_H
#define LLVM_CODEGEN_MIRSAMPLEPROFILE_H
#include "llvm/ADT/IntrusiveRefCntPtr.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/Support/Discriminator.h"
#include <memory>
#include <string>
namespace llvm {
class AnalysisUsage;
class MachineBlockFrequencyInfo;
class MachineFunction;
class Module;
namespace vfs {
class FileSystem;
} // namespace vfs
using namespace sampleprof;
class MIRProfileLoader;
class MIRProfileLoaderPass : public MachineFunctionPass {
MachineFunction *MF;
std::string ProfileFileName;
FSDiscriminatorPass P;
unsigned LowBit;
unsigned HighBit;
public:
static char ID;
/// FS bits will only use the '1' bits in the Mask.
MIRProfileLoaderPass(std::string FileName = "",
std::string RemappingFileName = "",
FSDiscriminatorPass P = FSDiscriminatorPass::Pass1,
IntrusiveRefCntPtr<vfs::FileSystem> FS = nullptr);
/// getMachineFunction - Return the last machine function computed.
const MachineFunction *getMachineFunction() const { return MF; }
StringRef getPassName() const override { return "SampleFDO loader in MIR"; }
private:
void init(MachineFunction &MF);
bool runOnMachineFunction(MachineFunction &) override;
bool doInitialization(Module &M) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
std::unique_ptr<MIRProfileLoader> MIRSampleLoader;
/// Hold the information of the basic block frequency.
MachineBlockFrequencyInfo *MBFI;
};
} // namespace llvm
#endif // LLVM_CODEGEN_MIRSAMPLEPROFILE_H
PK iwFZ
U��N �N CodeGen/LiveIntervals.hnu �[��� //===- LiveIntervals.h - Live Interval Analysis -----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file This file implements the LiveInterval analysis pass. Given some
/// numbering of each the machine instructions (in this implemention depth-first
/// order) an interval [i, j) is said to be a live interval for register v if
/// there is no instruction with number j' > j such that v is live at j' and
/// there is no instruction with number i' < i such that v is live at i'. In
/// this implementation intervals can have holes, i.e. an interval might look
/// like [1,20), [50,65), [1000,1001).
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LIVEINTERVALS_H
#define LLVM_CODEGEN_LIVEINTERVALS_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/IndexedMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/SlotIndexes.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/MC/LaneBitmask.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/ErrorHandling.h"
#include <cassert>
#include <cstdint>
#include <utility>
namespace llvm {
extern cl::opt<bool> UseSegmentSetForPhysRegs;
class BitVector;
class LiveIntervalCalc;
class MachineBlockFrequencyInfo;
class MachineDominatorTree;
class MachineFunction;
class MachineInstr;
class MachineRegisterInfo;
class raw_ostream;
class TargetInstrInfo;
class VirtRegMap;
class LiveIntervals : public MachineFunctionPass {
MachineFunction *MF = nullptr;
MachineRegisterInfo *MRI = nullptr;
const TargetRegisterInfo *TRI = nullptr;
const TargetInstrInfo *TII = nullptr;
SlotIndexes *Indexes = nullptr;
MachineDominatorTree *DomTree = nullptr;
LiveIntervalCalc *LICalc = nullptr;
/// Special pool allocator for VNInfo's (LiveInterval val#).
VNInfo::Allocator VNInfoAllocator;
/// Live interval pointers for all the virtual registers.
IndexedMap<LiveInterval*, VirtReg2IndexFunctor> VirtRegIntervals;
/// Sorted list of instructions with register mask operands. Always use the
/// 'r' slot, RegMasks are normal clobbers, not early clobbers.
SmallVector<SlotIndex, 8> RegMaskSlots;
/// This vector is parallel to RegMaskSlots, it holds a pointer to the
/// corresponding register mask. This pointer can be recomputed as:
///
/// MI = Indexes->getInstructionFromIndex(RegMaskSlot[N]);
/// unsigned OpNum = findRegMaskOperand(MI);
/// RegMaskBits[N] = MI->getOperand(OpNum).getRegMask();
///
/// This is kept in a separate vector partly because some standard
/// libraries don't support lower_bound() with mixed objects, partly to
/// improve locality when searching in RegMaskSlots.
/// Also see the comment in LiveInterval::find().
SmallVector<const uint32_t*, 8> RegMaskBits;
/// For each basic block number, keep (begin, size) pairs indexing into the
/// RegMaskSlots and RegMaskBits arrays.
/// Note that basic block numbers may not be layout contiguous, that's why
/// we can't just keep track of the first register mask in each basic
/// block.
SmallVector<std::pair<unsigned, unsigned>, 8> RegMaskBlocks;
/// Keeps a live range set for each register unit to track fixed physreg
/// interference.
SmallVector<LiveRange*, 0> RegUnitRanges;
public:
static char ID;
LiveIntervals();
~LiveIntervals() override;
/// Calculate the spill weight to assign to a single instruction.
static float getSpillWeight(bool isDef, bool isUse,
const MachineBlockFrequencyInfo *MBFI,
const MachineInstr &MI);
/// Calculate the spill weight to assign to a single instruction.
static float getSpillWeight(bool isDef, bool isUse,
const MachineBlockFrequencyInfo *MBFI,
const MachineBasicBlock *MBB);
LiveInterval &getInterval(Register Reg) {
if (hasInterval(Reg))
return *VirtRegIntervals[Reg.id()];
return createAndComputeVirtRegInterval(Reg);
}
const LiveInterval &getInterval(Register Reg) const {
return const_cast<LiveIntervals*>(this)->getInterval(Reg);
}
bool hasInterval(Register Reg) const {
return VirtRegIntervals.inBounds(Reg.id()) &&
VirtRegIntervals[Reg.id()];
}
/// Interval creation.
LiveInterval &createEmptyInterval(Register Reg) {
assert(!hasInterval(Reg) && "Interval already exists!");
VirtRegIntervals.grow(Reg.id());
VirtRegIntervals[Reg.id()] = createInterval(Reg);
return *VirtRegIntervals[Reg.id()];
}
LiveInterval &createAndComputeVirtRegInterval(Register Reg) {
LiveInterval &LI = createEmptyInterval(Reg);
computeVirtRegInterval(LI);
return LI;
}
/// Interval removal.
void removeInterval(Register Reg) {
delete VirtRegIntervals[Reg];
VirtRegIntervals[Reg] = nullptr;
}
/// Given a register and an instruction, adds a live segment from that
/// instruction to the end of its MBB.
LiveInterval::Segment addSegmentToEndOfBlock(Register Reg,
MachineInstr &startInst);
/// After removing some uses of a register, shrink its live range to just
/// the remaining uses. This method does not compute reaching defs for new
/// uses, and it doesn't remove dead defs.
/// Dead PHIDef values are marked as unused. New dead machine instructions
/// are added to the dead vector. Returns true if the interval may have been
/// separated into multiple connected components.
bool shrinkToUses(LiveInterval *li,
SmallVectorImpl<MachineInstr*> *dead = nullptr);
/// Specialized version of
/// shrinkToUses(LiveInterval *li, SmallVectorImpl<MachineInstr*> *dead)
/// that works on a subregister live range and only looks at uses matching
/// the lane mask of the subregister range.
/// This may leave the subrange empty which needs to be cleaned up with
/// LiveInterval::removeEmptySubranges() afterwards.
void shrinkToUses(LiveInterval::SubRange &SR, Register Reg);
/// Extend the live range \p LR to reach all points in \p Indices. The
/// points in the \p Indices array must be jointly dominated by the union
/// of the existing defs in \p LR and points in \p Undefs.
///
/// PHI-defs are added as needed to maintain SSA form.
///
/// If a SlotIndex in \p Indices is the end index of a basic block, \p LR
/// will be extended to be live out of the basic block.
/// If a SlotIndex in \p Indices is jointy dominated only by points in
/// \p Undefs, the live range will not be extended to that point.
///
/// See also LiveRangeCalc::extend().
void extendToIndices(LiveRange &LR, ArrayRef<SlotIndex> Indices,
ArrayRef<SlotIndex> Undefs);
void extendToIndices(LiveRange &LR, ArrayRef<SlotIndex> Indices) {
extendToIndices(LR, Indices, /*Undefs=*/{});
}
/// If \p LR has a live value at \p Kill, prune its live range by removing
/// any liveness reachable from Kill. Add live range end points to
/// EndPoints such that extendToIndices(LI, EndPoints) will reconstruct the
/// value's live range.
///
/// Calling pruneValue() and extendToIndices() can be used to reconstruct
/// SSA form after adding defs to a virtual register.
void pruneValue(LiveRange &LR, SlotIndex Kill,
SmallVectorImpl<SlotIndex> *EndPoints);
/// This function should not be used. Its intent is to tell you that you are
/// doing something wrong if you call pruneValue directly on a
/// LiveInterval. Indeed, you are supposed to call pruneValue on the main
/// LiveRange and all the LiveRanges of the subranges if any.
LLVM_ATTRIBUTE_UNUSED void pruneValue(LiveInterval &, SlotIndex,
SmallVectorImpl<SlotIndex> *) {
llvm_unreachable(
"Use pruneValue on the main LiveRange and on each subrange");
}
SlotIndexes *getSlotIndexes() const {
return Indexes;
}
/// Returns true if the specified machine instr has been removed or was
/// never entered in the map.
bool isNotInMIMap(const MachineInstr &Instr) const {
return !Indexes->hasIndex(Instr);
}
/// Returns the base index of the given instruction.
SlotIndex getInstructionIndex(const MachineInstr &Instr) const {
return Indexes->getInstructionIndex(Instr);
}
/// Returns the instruction associated with the given index.
MachineInstr* getInstructionFromIndex(SlotIndex index) const {
return Indexes->getInstructionFromIndex(index);
}
/// Return the first index in the given basic block.
SlotIndex getMBBStartIdx(const MachineBasicBlock *mbb) const {
return Indexes->getMBBStartIdx(mbb);
}
/// Return the last index in the given basic block.
SlotIndex getMBBEndIdx(const MachineBasicBlock *mbb) const {
return Indexes->getMBBEndIdx(mbb);
}
bool isLiveInToMBB(const LiveRange &LR,
const MachineBasicBlock *mbb) const {
return LR.liveAt(getMBBStartIdx(mbb));
}
bool isLiveOutOfMBB(const LiveRange &LR,
const MachineBasicBlock *mbb) const {
return LR.liveAt(getMBBEndIdx(mbb).getPrevSlot());
}
MachineBasicBlock* getMBBFromIndex(SlotIndex index) const {
return Indexes->getMBBFromIndex(index);
}
void insertMBBInMaps(MachineBasicBlock *MBB) {
Indexes->insertMBBInMaps(MBB);
assert(unsigned(MBB->getNumber()) == RegMaskBlocks.size() &&
"Blocks must be added in order.");
RegMaskBlocks.push_back(std::make_pair(RegMaskSlots.size(), 0));
}
SlotIndex InsertMachineInstrInMaps(MachineInstr &MI) {
return Indexes->insertMachineInstrInMaps(MI);
}
void InsertMachineInstrRangeInMaps(MachineBasicBlock::iterator B,
MachineBasicBlock::iterator E) {
for (MachineBasicBlock::iterator I = B; I != E; ++I)
Indexes->insertMachineInstrInMaps(*I);
}
void RemoveMachineInstrFromMaps(MachineInstr &MI) {
Indexes->removeMachineInstrFromMaps(MI);
}
SlotIndex ReplaceMachineInstrInMaps(MachineInstr &MI, MachineInstr &NewMI) {
return Indexes->replaceMachineInstrInMaps(MI, NewMI);
}
VNInfo::Allocator& getVNInfoAllocator() { return VNInfoAllocator; }
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override;
/// Pass entry point; Calculates LiveIntervals.
bool runOnMachineFunction(MachineFunction&) override;
/// Implement the dump method.
void print(raw_ostream &O, const Module* = nullptr) const override;
/// If LI is confined to a single basic block, return a pointer to that
/// block. If LI is live in to or out of any block, return NULL.
MachineBasicBlock *intervalIsInOneMBB(const LiveInterval &LI) const;
/// Returns true if VNI is killed by any PHI-def values in LI.
/// This may conservatively return true to avoid expensive computations.
bool hasPHIKill(const LiveInterval &LI, const VNInfo *VNI) const;
/// Add kill flags to any instruction that kills a virtual register.
void addKillFlags(const VirtRegMap*);
/// Call this method to notify LiveIntervals that instruction \p MI has been
/// moved within a basic block. This will update the live intervals for all
/// operands of \p MI. Moves between basic blocks are not supported.
///
/// \param UpdateFlags Update live intervals for nonallocatable physregs.
void handleMove(MachineInstr &MI, bool UpdateFlags = false);
/// Update intervals of operands of all instructions in the newly
/// created bundle specified by \p BundleStart.
///
/// \param UpdateFlags Update live intervals for nonallocatable physregs.
///
/// Assumes existing liveness is accurate.
/// \pre BundleStart should be the first instruction in the Bundle.
/// \pre BundleStart should not have a have SlotIndex as one will be assigned.
void handleMoveIntoNewBundle(MachineInstr &BundleStart,
bool UpdateFlags = false);
/// Update live intervals for instructions in a range of iterators. It is
/// intended for use after target hooks that may insert or remove
/// instructions, and is only efficient for a small number of instructions.
///
/// OrigRegs is a vector of registers that were originally used by the
/// instructions in the range between the two iterators.
///
/// Currently, the only only changes that are supported are simple removal
/// and addition of uses.
void repairIntervalsInRange(MachineBasicBlock *MBB,
MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
ArrayRef<Register> OrigRegs);
// Register mask functions.
//
// Machine instructions may use a register mask operand to indicate that a
// large number of registers are clobbered by the instruction. This is
// typically used for calls.
//
// For compile time performance reasons, these clobbers are not recorded in
// the live intervals for individual physical registers. Instead,
// LiveIntervalAnalysis maintains a sorted list of instructions with
// register mask operands.
/// Returns a sorted array of slot indices of all instructions with
/// register mask operands.
ArrayRef<SlotIndex> getRegMaskSlots() const { return RegMaskSlots; }
/// Returns a sorted array of slot indices of all instructions with register
/// mask operands in the basic block numbered \p MBBNum.
ArrayRef<SlotIndex> getRegMaskSlotsInBlock(unsigned MBBNum) const {
std::pair<unsigned, unsigned> P = RegMaskBlocks[MBBNum];
return getRegMaskSlots().slice(P.first, P.second);
}
/// Returns an array of register mask pointers corresponding to
/// getRegMaskSlots().
ArrayRef<const uint32_t*> getRegMaskBits() const { return RegMaskBits; }
/// Returns an array of mask pointers corresponding to
/// getRegMaskSlotsInBlock(MBBNum).
ArrayRef<const uint32_t*> getRegMaskBitsInBlock(unsigned MBBNum) const {
std::pair<unsigned, unsigned> P = RegMaskBlocks[MBBNum];
return getRegMaskBits().slice(P.first, P.second);
}
/// Test if \p LI is live across any register mask instructions, and
/// compute a bit mask of physical registers that are not clobbered by any
/// of them.
///
/// Returns false if \p LI doesn't cross any register mask instructions. In
/// that case, the bit vector is not filled in.
bool checkRegMaskInterference(const LiveInterval &LI,
BitVector &UsableRegs);
// Register unit functions.
//
// Fixed interference occurs when MachineInstrs use physregs directly
// instead of virtual registers. This typically happens when passing
// arguments to a function call, or when instructions require operands in
// fixed registers.
//
// Each physreg has one or more register units, see MCRegisterInfo. We
// track liveness per register unit to handle aliasing registers more
// efficiently.
/// Return the live range for register unit \p Unit. It will be computed if
/// it doesn't exist.
LiveRange &getRegUnit(unsigned Unit) {
LiveRange *LR = RegUnitRanges[Unit];
if (!LR) {
// Compute missing ranges on demand.
// Use segment set to speed-up initial computation of the live range.
RegUnitRanges[Unit] = LR = new LiveRange(UseSegmentSetForPhysRegs);
computeRegUnitRange(*LR, Unit);
}
return *LR;
}
/// Return the live range for register unit \p Unit if it has already been
/// computed, or nullptr if it hasn't been computed yet.
LiveRange *getCachedRegUnit(unsigned Unit) {
return RegUnitRanges[Unit];
}
const LiveRange *getCachedRegUnit(unsigned Unit) const {
return RegUnitRanges[Unit];
}
/// Remove computed live range for register unit \p Unit. Subsequent uses
/// should rely on on-demand recomputation.
void removeRegUnit(unsigned Unit) {
delete RegUnitRanges[Unit];
RegUnitRanges[Unit] = nullptr;
}
/// Remove associated live ranges for the register units associated with \p
/// Reg. Subsequent uses should rely on on-demand recomputation. \note This
/// method can result in inconsistent liveness tracking if multiple phyical
/// registers share a regunit, and should be used cautiously.
void removeAllRegUnitsForPhysReg(MCRegister Reg) {
for (MCRegUnit Unit : TRI->regunits(Reg))
removeRegUnit(Unit);
}
/// Remove value numbers and related live segments starting at position
/// \p Pos that are part of any liverange of physical register \p Reg or one
/// of its subregisters.
void removePhysRegDefAt(MCRegister Reg, SlotIndex Pos);
/// Remove value number and related live segments of \p LI and its subranges
/// that start at position \p Pos.
void removeVRegDefAt(LiveInterval &LI, SlotIndex Pos);
/// Split separate components in LiveInterval \p LI into separate intervals.
void splitSeparateComponents(LiveInterval &LI,
SmallVectorImpl<LiveInterval*> &SplitLIs);
/// For live interval \p LI with correct SubRanges construct matching
/// information for the main live range. Expects the main live range to not
/// have any segments or value numbers.
void constructMainRangeFromSubranges(LiveInterval &LI);
private:
/// Compute live intervals for all virtual registers.
void computeVirtRegs();
/// Compute RegMaskSlots and RegMaskBits.
void computeRegMasks();
/// Walk the values in \p LI and check for dead values:
/// - Dead PHIDef values are marked as unused.
/// - Dead operands are marked as such.
/// - Completely dead machine instructions are added to the \p dead vector
/// if it is not nullptr.
/// Returns true if any PHI value numbers have been removed which may
/// have separated the interval into multiple connected components.
bool computeDeadValues(LiveInterval &LI,
SmallVectorImpl<MachineInstr*> *dead);
static LiveInterval *createInterval(Register Reg);
void printInstrs(raw_ostream &O) const;
void dumpInstrs() const;
void computeLiveInRegUnits();
void computeRegUnitRange(LiveRange&, unsigned Unit);
bool computeVirtRegInterval(LiveInterval&);
using ShrinkToUsesWorkList = SmallVector<std::pair<SlotIndex, VNInfo*>, 16>;
void extendSegmentsToUses(LiveRange &Segments,
ShrinkToUsesWorkList &WorkList, Register Reg,
LaneBitmask LaneMask);
/// Helper function for repairIntervalsInRange(), walks backwards and
/// creates/modifies live segments in \p LR to match the operands found.
/// Only full operands or operands with subregisters matching \p LaneMask
/// are considered.
void repairOldRegInRange(MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
const SlotIndex endIdx, LiveRange &LR,
Register Reg,
LaneBitmask LaneMask = LaneBitmask::getAll());
class HMEditor;
};
} // end namespace llvm
#endif
PK iwFZ��i� � CodeGen/DwarfStringPoolEntry.hnu �[��� //===- llvm/CodeGen/DwarfStringPoolEntry.h - String pool entry --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_DWARFSTRINGPOOLENTRY_H
#define LLVM_CODEGEN_DWARFSTRINGPOOLENTRY_H
#include "llvm/ADT/PointerUnion.h"
#include "llvm/ADT/StringMap.h"
namespace llvm {
class MCSymbol;
/// Data for a string pool entry.
struct DwarfStringPoolEntry {
static constexpr unsigned NotIndexed = -1;
MCSymbol *Symbol = nullptr;
uint64_t Offset = 0;
unsigned Index = 0;
bool isIndexed() const { return Index != NotIndexed; }
};
/// DwarfStringPoolEntryRef: Dwarf string pool entry reference.
///
/// Dwarf string pool entry keeps string value and its data.
/// There are two variants how data are represented:
///
/// 1. By value - StringMapEntry<DwarfStringPoolEntry>.
/// 2. By pointer - StringMapEntry<DwarfStringPoolEntry *>.
///
/// The "By pointer" variant allows for reducing memory usage for the case
/// when string pool entry does not have data: it keeps the null pointer
/// and so no need to waste space for the full DwarfStringPoolEntry.
/// It is recommended to use "By pointer" variant if not all entries
/// of dwarf string pool have corresponding DwarfStringPoolEntry.
class DwarfStringPoolEntryRef {
/// Pointer type for "By value" string entry.
using ByValStringEntryPtr = const StringMapEntry<DwarfStringPoolEntry> *;
/// Pointer type for "By pointer" string entry.
using ByPtrStringEntryPtr = const StringMapEntry<DwarfStringPoolEntry *> *;
/// Pointer to the dwarf string pool Entry.
PointerUnion<ByValStringEntryPtr, ByPtrStringEntryPtr> MapEntry = nullptr;
public:
DwarfStringPoolEntryRef() = default;
/// ASSUMPTION: DwarfStringPoolEntryRef keeps pointer to \p Entry,
/// thus specified entry mustn`t be reallocated.
DwarfStringPoolEntryRef(const StringMapEntry<DwarfStringPoolEntry> &Entry)
: MapEntry(&Entry) {}
/// ASSUMPTION: DwarfStringPoolEntryRef keeps pointer to \p Entry,
/// thus specified entry mustn`t be reallocated.
DwarfStringPoolEntryRef(const StringMapEntry<DwarfStringPoolEntry *> &Entry)
: MapEntry(&Entry) {
assert(cast<ByPtrStringEntryPtr>(MapEntry)->second != nullptr);
}
explicit operator bool() const { return !MapEntry.isNull(); }
/// \returns symbol for the dwarf string.
MCSymbol *getSymbol() const {
assert(getEntry().Symbol && "No symbol available!");
return getEntry().Symbol;
}
/// \returns offset for the dwarf string.
uint64_t getOffset() const { return getEntry().Offset; }
/// \returns index for the dwarf string.
unsigned getIndex() const {
assert(getEntry().isIndexed() && "Index is not set!");
return getEntry().Index;
}
/// \returns string.
StringRef getString() const {
if (isa<ByValStringEntryPtr>(MapEntry))
return cast<ByValStringEntryPtr>(MapEntry)->first();
return cast<ByPtrStringEntryPtr>(MapEntry)->first();
}
/// \returns the entire string pool entry for convenience.
const DwarfStringPoolEntry &getEntry() const {
if (isa<ByValStringEntryPtr>(MapEntry))
return cast<ByValStringEntryPtr>(MapEntry)->second;
return *cast<ByPtrStringEntryPtr>(MapEntry)->second;
}
bool operator==(const DwarfStringPoolEntryRef &X) const {
return MapEntry.getOpaqueValue() == X.MapEntry.getOpaqueValue();
}
bool operator!=(const DwarfStringPoolEntryRef &X) const {
return MapEntry.getOpaqueValue() != X.MapEntry.getOpaqueValue();
}
};
} // end namespace llvm
#endif
PK iwFZio�Ś � CodeGen/LiveIntervalCalc.hnu �[��� //===- LiveIntervalCalc.h - Calculate live intervals -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// The LiveIntervalCalc class is an extension of LiveRangeCalc targeted to the
// computation and modification of the LiveInterval variants of LiveRanges.
// LiveIntervals are meant to track liveness of registers and stack slots and
// LiveIntervalCalc adds to LiveRangeCalc all the machinery required to
// construct the liveness of virtual registers tracked by a LiveInterval.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LIVEINTERVALCALC_H
#define LLVM_CODEGEN_LIVEINTERVALCALC_H
#include "llvm/CodeGen/LiveRangeCalc.h"
namespace llvm {
template <class NodeT> class DomTreeNodeBase;
using MachineDomTreeNode = DomTreeNodeBase<MachineBasicBlock>;
class LiveIntervalCalc : public LiveRangeCalc {
/// Extend the live range of @p LR to reach all uses of Reg.
///
/// If @p LR is a main range, or if @p LI is null, then all uses must be
/// jointly dominated by the definitions from @p LR. If @p LR is a subrange
/// of the live interval @p LI, corresponding to lane mask @p LaneMask,
/// all uses must be jointly dominated by the definitions from @p LR
/// together with definitions of other lanes where @p LR becomes undefined
/// (via <def,read-undef> operands).
/// If @p LR is a main range, the @p LaneMask should be set to ~0, i.e.
/// LaneBitmask::getAll().
void extendToUses(LiveRange &LR, Register Reg, LaneBitmask LaneMask,
LiveInterval *LI = nullptr);
public:
LiveIntervalCalc() = default;
/// createDeadDefs - Create a dead def in LI for every def operand of Reg.
/// Each instruction defining Reg gets a new VNInfo with a corresponding
/// minimal live range.
void createDeadDefs(LiveRange &LR, Register Reg);
/// Extend the live range of @p LR to reach all uses of Reg.
///
/// All uses must be jointly dominated by existing liveness. PHI-defs are
/// inserted as needed to preserve SSA form.
void extendToUses(LiveRange &LR, MCRegister PhysReg) {
extendToUses(LR, PhysReg, LaneBitmask::getAll());
}
/// Calculates liveness for the register specified in live interval @p LI.
/// Creates subregister live ranges as needed if subreg liveness tracking is
/// enabled.
void calculate(LiveInterval &LI, bool TrackSubRegs);
/// For live interval \p LI with correct SubRanges construct matching
/// information for the main live range. Expects the main live range to not
/// have any segments or value numbers.
void constructMainRangeFromSubranges(LiveInterval &LI);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_LIVEINTERVALCALC_H
PK iwFZNɷ?� ?� CodeGen/AsmPrinter.hnu �[��� //===- llvm/CodeGen/AsmPrinter.h - AsmPrinter Framework ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains a class to be used as the base class for target specific
// asm writers. This class primarily handles common functionality used by
// all asm writers.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_ASMPRINTER_H
#define LLVM_CODEGEN_ASMPRINTER_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/MapVector.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/CodeGen/AsmPrinterHandler.h"
#include "llvm/CodeGen/DwarfStringPoolEntry.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/StackMaps.h"
#include "llvm/IR/InlineAsm.h"
#include "llvm/Support/ErrorHandling.h"
#include <cstdint>
#include <memory>
#include <utility>
#include <vector>
namespace llvm {
class AddrLabelMap;
class BasicBlock;
class BlockAddress;
class Constant;
class ConstantArray;
class DataLayout;
class DIE;
class DIEAbbrev;
class DwarfDebug;
class GCMetadataPrinter;
class GCStrategy;
class GlobalAlias;
class GlobalObject;
class GlobalValue;
class GlobalVariable;
class MachineBasicBlock;
class MachineConstantPoolValue;
class MachineDominatorTree;
class MachineFunction;
class MachineInstr;
class MachineJumpTableInfo;
class MachineLoopInfo;
class MachineModuleInfo;
class MachineOptimizationRemarkEmitter;
class MCAsmInfo;
class MCCFIInstruction;
class MCContext;
class MCExpr;
class MCInst;
class MCSection;
class MCStreamer;
class MCSubtargetInfo;
class MCSymbol;
class MCTargetOptions;
class MDNode;
class Module;
class PseudoProbeHandler;
class raw_ostream;
class StringRef;
class TargetLoweringObjectFile;
class TargetMachine;
class Twine;
namespace remarks {
class RemarkStreamer;
}
/// This class is intended to be used as a driving class for all asm writers.
class AsmPrinter : public MachineFunctionPass {
public:
/// Target machine description.
TargetMachine &TM;
/// Target Asm Printer information.
const MCAsmInfo *MAI = nullptr;
/// This is the context for the output file that we are streaming. This owns
/// all of the global MC-related objects for the generated translation unit.
MCContext &OutContext;
/// This is the MCStreamer object for the file we are generating. This
/// contains the transient state for the current translation unit that we are
/// generating (such as the current section etc).
std::unique_ptr<MCStreamer> OutStreamer;
/// The current machine function.
MachineFunction *MF = nullptr;
/// This is a pointer to the current MachineModuleInfo.
MachineModuleInfo *MMI = nullptr;
/// This is a pointer to the current MachineDominatorTree.
MachineDominatorTree *MDT = nullptr;
/// This is a pointer to the current MachineLoopInfo.
MachineLoopInfo *MLI = nullptr;
/// Optimization remark emitter.
MachineOptimizationRemarkEmitter *ORE = nullptr;
/// The symbol for the entry in __patchable_function_entires.
MCSymbol *CurrentPatchableFunctionEntrySym = nullptr;
/// The symbol for the current function. This is recalculated at the beginning
/// of each call to runOnMachineFunction().
MCSymbol *CurrentFnSym = nullptr;
/// The symbol for the current function descriptor on AIX. This is created
/// at the beginning of each call to SetupMachineFunction().
MCSymbol *CurrentFnDescSym = nullptr;
/// The symbol used to represent the start of the current function for the
/// purpose of calculating its size (e.g. using the .size directive). By
/// default, this is equal to CurrentFnSym.
MCSymbol *CurrentFnSymForSize = nullptr;
/// Map a basic block section ID to the begin and end symbols of that section
/// which determine the section's range.
struct MBBSectionRange {
MCSymbol *BeginLabel, *EndLabel;
};
MapVector<unsigned, MBBSectionRange> MBBSectionRanges;
/// Map global GOT equivalent MCSymbols to GlobalVariables and keep track of
/// its number of uses by other globals.
using GOTEquivUsePair = std::pair<const GlobalVariable *, unsigned>;
MapVector<const MCSymbol *, GOTEquivUsePair> GlobalGOTEquivs;
/// struct HandlerInfo and Handlers permit users or target extended
/// AsmPrinter to add their own handlers.
struct HandlerInfo {
std::unique_ptr<AsmPrinterHandler> Handler;
StringRef TimerName;
StringRef TimerDescription;
StringRef TimerGroupName;
StringRef TimerGroupDescription;
HandlerInfo(std::unique_ptr<AsmPrinterHandler> Handler, StringRef TimerName,
StringRef TimerDescription, StringRef TimerGroupName,
StringRef TimerGroupDescription)
: Handler(std::move(Handler)), TimerName(TimerName),
TimerDescription(TimerDescription), TimerGroupName(TimerGroupName),
TimerGroupDescription(TimerGroupDescription) {}
};
// Flags representing which CFI section is required for a function/module.
enum class CFISection : unsigned {
None = 0, ///< Do not emit either .eh_frame or .debug_frame
EH = 1, ///< Emit .eh_frame
Debug = 2 ///< Emit .debug_frame
};
private:
MCSymbol *CurrentFnEnd = nullptr;
/// Map a basic block section ID to the exception symbol associated with that
/// section. Map entries are assigned and looked up via
/// AsmPrinter::getMBBExceptionSym.
DenseMap<unsigned, MCSymbol *> MBBSectionExceptionSyms;
// The symbol used to represent the start of the current BB section of the
// function. This is used to calculate the size of the BB section.
MCSymbol *CurrentSectionBeginSym = nullptr;
/// This map keeps track of which symbol is being used for the specified basic
/// block's address of label.
std::unique_ptr<AddrLabelMap> AddrLabelSymbols;
/// The garbage collection metadata printer table.
DenseMap<GCStrategy *, std::unique_ptr<GCMetadataPrinter>> GCMetadataPrinters;
/// Emit comments in assembly output if this is true.
bool VerboseAsm;
/// Output stream for the stack usage file (i.e., .su file).
std::unique_ptr<raw_fd_ostream> StackUsageStream;
/// List of symbols to be inserted into PC sections.
DenseMap<const MDNode *, SmallVector<const MCSymbol *>> PCSectionsSymbols;
static char ID;
protected:
MCSymbol *CurrentFnBegin = nullptr;
/// For dso_local functions, the current $local alias for the function.
MCSymbol *CurrentFnBeginLocal = nullptr;
/// A vector of all debug/EH info emitters we should use. This vector
/// maintains ownership of the emitters.
std::vector<HandlerInfo> Handlers;
size_t NumUserHandlers = 0;
StackMaps SM;
private:
/// If generated on the fly this own the instance.
std::unique_ptr<MachineDominatorTree> OwnedMDT;
/// If generated on the fly this own the instance.
std::unique_ptr<MachineLoopInfo> OwnedMLI;
/// If the target supports dwarf debug info, this pointer is non-null.
DwarfDebug *DD = nullptr;
/// A handler that supports pseudo probe emission with embedded inline
/// context.
PseudoProbeHandler *PP = nullptr;
/// CFISection type the module needs i.e. either .eh_frame or .debug_frame.
CFISection ModuleCFISection = CFISection::None;
/// True if the module contains split-stack functions. This is used to
/// emit .note.GNU-split-stack section as required by the linker for
/// special handling split-stack function calling no-split-stack function.
bool HasSplitStack = false;
/// True if the module contains no-split-stack functions. This is used to emit
/// .note.GNU-no-split-stack section when it also contains functions without a
/// split stack prologue.
bool HasNoSplitStack = false;
/// Raw FDOstream for outputting machine basic block frequncies if the
/// --mbb-profile-dump flag is set for downstream cost modelling applications
std::unique_ptr<raw_fd_ostream> MBBProfileDumpFileOutput;
protected:
explicit AsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer);
public:
~AsmPrinter() override;
DwarfDebug *getDwarfDebug() { return DD; }
DwarfDebug *getDwarfDebug() const { return DD; }
uint16_t getDwarfVersion() const;
void setDwarfVersion(uint16_t Version);
bool isDwarf64() const;
/// Returns 4 for DWARF32 and 8 for DWARF64.
unsigned int getDwarfOffsetByteSize() const;
/// Returns 4 for DWARF32 and 12 for DWARF64.
unsigned int getUnitLengthFieldByteSize() const;
/// Returns information about the byte size of DW_FORM values.
dwarf::FormParams getDwarfFormParams() const;
bool isPositionIndependent() const;
/// Return true if assembly output should contain comments.
bool isVerbose() const { return VerboseAsm; }
/// Return a unique ID for the current function.
unsigned getFunctionNumber() const;
/// Return symbol for the function pseudo stack if the stack frame is not a
/// register based.
virtual const MCSymbol *getFunctionFrameSymbol() const { return nullptr; }
MCSymbol *getFunctionBegin() const { return CurrentFnBegin; }
MCSymbol *getFunctionEnd() const { return CurrentFnEnd; }
// Return the exception symbol associated with the MBB section containing a
// given basic block.
MCSymbol *getMBBExceptionSym(const MachineBasicBlock &MBB);
/// Return the symbol to be used for the specified basic block when its
/// address is taken. This cannot be its normal LBB label because the block
/// may be accessed outside its containing function.
MCSymbol *getAddrLabelSymbol(const BasicBlock *BB) {
return getAddrLabelSymbolToEmit(BB).front();
}
/// Return the symbol to be used for the specified basic block when its
/// address is taken. If other blocks were RAUW'd to this one, we may have
/// to emit them as well, return the whole set.
ArrayRef<MCSymbol *> getAddrLabelSymbolToEmit(const BasicBlock *BB);
/// If the specified function has had any references to address-taken blocks
/// generated, but the block got deleted, return the symbol now so we can
/// emit it. This prevents emitting a reference to a symbol that has no
/// definition.
void takeDeletedSymbolsForFunction(const Function *F,
std::vector<MCSymbol *> &Result);
/// Return information about object file lowering.
const TargetLoweringObjectFile &getObjFileLowering() const;
/// Return information about data layout.
const DataLayout &getDataLayout() const;
/// Return the pointer size from the TargetMachine
unsigned getPointerSize() const;
/// Return information about subtarget.
const MCSubtargetInfo &getSubtargetInfo() const;
void EmitToStreamer(MCStreamer &S, const MCInst &Inst);
/// Emits inital debug location directive.
void emitInitialRawDwarfLocDirective(const MachineFunction &MF);
/// Return the current section we are emitting to.
const MCSection *getCurrentSection() const;
void getNameWithPrefix(SmallVectorImpl<char> &Name,
const GlobalValue *GV) const;
MCSymbol *getSymbol(const GlobalValue *GV) const;
/// Similar to getSymbol() but preferred for references. On ELF, this uses a
/// local symbol if a reference to GV is guaranteed to be resolved to the
/// definition in the same module.
MCSymbol *getSymbolPreferLocal(const GlobalValue &GV) const;
bool doesDwarfUseRelocationsAcrossSections() const {
return DwarfUsesRelocationsAcrossSections;
}
void setDwarfUsesRelocationsAcrossSections(bool Enable) {
DwarfUsesRelocationsAcrossSections = Enable;
}
//===------------------------------------------------------------------===//
// XRay instrumentation implementation.
//===------------------------------------------------------------------===//
public:
// This describes the kind of sled we're storing in the XRay table.
enum class SledKind : uint8_t {
FUNCTION_ENTER = 0,
FUNCTION_EXIT = 1,
TAIL_CALL = 2,
LOG_ARGS_ENTER = 3,
CUSTOM_EVENT = 4,
TYPED_EVENT = 5,
};
// The table will contain these structs that point to the sled, the function
// containing the sled, and what kind of sled (and whether they should always
// be instrumented). We also use a version identifier that the runtime can use
// to decide what to do with the sled, depending on the version of the sled.
struct XRayFunctionEntry {
const MCSymbol *Sled;
const MCSymbol *Function;
SledKind Kind;
bool AlwaysInstrument;
const class Function *Fn;
uint8_t Version;
void emit(int, MCStreamer *) const;
};
// All the sleds to be emitted.
SmallVector<XRayFunctionEntry, 4> Sleds;
// Helper function to record a given XRay sled.
void recordSled(MCSymbol *Sled, const MachineInstr &MI, SledKind Kind,
uint8_t Version = 0);
/// Emit a table with all XRay instrumentation points.
void emitXRayTable();
void emitPatchableFunctionEntries();
//===------------------------------------------------------------------===//
// MachineFunctionPass Implementation.
//===------------------------------------------------------------------===//
/// Record analysis usage.
void getAnalysisUsage(AnalysisUsage &AU) const override;
/// Set up the AsmPrinter when we are working on a new module. If your pass
/// overrides this, it must make sure to explicitly call this implementation.
bool doInitialization(Module &M) override;
/// Shut down the asmprinter. If you override this in your pass, you must make
/// sure to call it explicitly.
bool doFinalization(Module &M) override;
/// Emit the specified function out to the OutStreamer.
bool runOnMachineFunction(MachineFunction &MF) override {
SetupMachineFunction(MF);
emitFunctionBody();
return false;
}
//===------------------------------------------------------------------===//
// Coarse grained IR lowering routines.
//===------------------------------------------------------------------===//
/// This should be called when a new MachineFunction is being processed from
/// runOnMachineFunction.
virtual void SetupMachineFunction(MachineFunction &MF);
/// This method emits the body and trailer for a function.
void emitFunctionBody();
void emitCFIInstruction(const MachineInstr &MI);
void emitFrameAlloc(const MachineInstr &MI);
void emitStackSizeSection(const MachineFunction &MF);
void emitStackUsage(const MachineFunction &MF);
void emitBBAddrMapSection(const MachineFunction &MF);
void emitKCFITrapEntry(const MachineFunction &MF, const MCSymbol *Symbol);
virtual void emitKCFITypeId(const MachineFunction &MF);
void emitPseudoProbe(const MachineInstr &MI);
void emitRemarksSection(remarks::RemarkStreamer &RS);
/// Emits a label as reference for PC sections.
void emitPCSectionsLabel(const MachineFunction &MF, const MDNode &MD);
/// Emits the PC sections collected from instructions.
void emitPCSections(const MachineFunction &MF);
/// Get the CFISection type for a function.
CFISection getFunctionCFISectionType(const Function &F) const;
/// Get the CFISection type for a function.
CFISection getFunctionCFISectionType(const MachineFunction &MF) const;
/// Get the CFISection type for the module.
CFISection getModuleCFISectionType() const { return ModuleCFISection; }
bool needsSEHMoves();
/// Since emitting CFI unwind information is entangled with supporting the
/// exceptions, this returns true for platforms which use CFI unwind
/// information for other purposes (debugging, sanitizers, ...) when
/// `MCAsmInfo::ExceptionsType == ExceptionHandling::None`.
bool usesCFIWithoutEH() const;
/// Print to the current output stream assembly representations of the
/// constants in the constant pool MCP. This is used to print out constants
/// which have been "spilled to memory" by the code generator.
virtual void emitConstantPool();
/// Print assembly representations of the jump tables used by the current
/// function to the current output stream.
virtual void emitJumpTableInfo();
/// Emit the specified global variable to the .s file.
virtual void emitGlobalVariable(const GlobalVariable *GV);
/// Check to see if the specified global is a special global used by LLVM. If
/// so, emit it and return true, otherwise do nothing and return false.
bool emitSpecialLLVMGlobal(const GlobalVariable *GV);
/// `llvm.global_ctors` and `llvm.global_dtors` are arrays of Structor
/// structs.
///
/// Priority - init priority
/// Func - global initialization or global clean-up function
/// ComdatKey - associated data
struct Structor {
int Priority = 0;
Constant *Func = nullptr;
GlobalValue *ComdatKey = nullptr;
Structor() = default;
};
/// This method gathers an array of Structors and then sorts them out by
/// Priority.
/// @param List The initializer of `llvm.global_ctors` or `llvm.global_dtors`
/// array.
/// @param[out] Structors Sorted Structor structs by Priority.
void preprocessXXStructorList(const DataLayout &DL, const Constant *List,
SmallVector<Structor, 8> &Structors);
/// This method emits `llvm.global_ctors` or `llvm.global_dtors` list.
virtual void emitXXStructorList(const DataLayout &DL, const Constant *List,
bool IsCtor);
/// Emit an alignment directive to the specified power of two boundary. If a
/// global value is specified, and if that global has an explicit alignment
/// requested, it will override the alignment request if required for
/// correctness.
void emitAlignment(Align Alignment, const GlobalObject *GV = nullptr,
unsigned MaxBytesToEmit = 0) const;
/// Lower the specified LLVM Constant to an MCExpr.
virtual const MCExpr *lowerConstant(const Constant *CV);
/// Print a general LLVM constant to the .s file.
/// On AIX, when an alias refers to a sub-element of a global variable, the
/// label of that alias needs to be emitted before the corresponding element.
using AliasMapTy = DenseMap<uint64_t, SmallVector<const GlobalAlias *, 1>>;
void emitGlobalConstant(const DataLayout &DL, const Constant *CV,
AliasMapTy *AliasList = nullptr);
/// Unnamed constant global variables solely contaning a pointer to
/// another globals variable act like a global variable "proxy", or GOT
/// equivalents, i.e., it's only used to hold the address of the latter. One
/// optimization is to replace accesses to these proxies by using the GOT
/// entry for the final global instead. Hence, we select GOT equivalent
/// candidates among all the module global variables, avoid emitting them
/// unnecessarily and finally replace references to them by pc relative
/// accesses to GOT entries.
void computeGlobalGOTEquivs(Module &M);
/// Constant expressions using GOT equivalent globals may not be
/// eligible for PC relative GOT entry conversion, in such cases we need to
/// emit the proxies we previously omitted in EmitGlobalVariable.
void emitGlobalGOTEquivs();
/// Emit the stack maps.
void emitStackMaps();
//===------------------------------------------------------------------===//
// Overridable Hooks
//===------------------------------------------------------------------===//
void addAsmPrinterHandler(HandlerInfo Handler) {
Handlers.insert(Handlers.begin(), std::move(Handler));
NumUserHandlers++;
}
// Targets can, or in the case of EmitInstruction, must implement these to
// customize output.
/// This virtual method can be overridden by targets that want to emit
/// something at the start of their file.
virtual void emitStartOfAsmFile(Module &) {}
/// This virtual method can be overridden by targets that want to emit
/// something at the end of their file.
virtual void emitEndOfAsmFile(Module &) {}
/// Targets can override this to emit stuff before the first basic block in
/// the function.
virtual void emitFunctionBodyStart() {}
/// Targets can override this to emit stuff after the last basic block in the
/// function.
virtual void emitFunctionBodyEnd() {}
/// Targets can override this to emit stuff at the start of a basic block.
/// By default, this method prints the label for the specified
/// MachineBasicBlock, an alignment (if present) and a comment describing it
/// if appropriate.
virtual void emitBasicBlockStart(const MachineBasicBlock &MBB);
/// Targets can override this to emit stuff at the end of a basic block.
virtual void emitBasicBlockEnd(const MachineBasicBlock &MBB);
/// Targets should implement this to emit instructions.
virtual void emitInstruction(const MachineInstr *) {
llvm_unreachable("EmitInstruction not implemented");
}
/// Return the symbol for the specified constant pool entry.
virtual MCSymbol *GetCPISymbol(unsigned CPID) const;
virtual void emitFunctionEntryLabel();
virtual void emitFunctionDescriptor() {
llvm_unreachable("Function descriptor is target-specific.");
}
virtual void emitMachineConstantPoolValue(MachineConstantPoolValue *MCPV);
/// Targets can override this to change how global constants that are part of
/// a C++ static/global constructor list are emitted.
virtual void emitXXStructor(const DataLayout &DL, const Constant *CV) {
emitGlobalConstant(DL, CV);
}
/// Return true if the basic block has exactly one predecessor and the control
/// transfer mechanism between the predecessor and this block is a
/// fall-through.
virtual bool
isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const;
/// Targets can override this to customize the output of IMPLICIT_DEF
/// instructions in verbose mode.
virtual void emitImplicitDef(const MachineInstr *MI) const;
/// Emit N NOP instructions.
void emitNops(unsigned N);
//===------------------------------------------------------------------===//
// Symbol Lowering Routines.
//===------------------------------------------------------------------===//
MCSymbol *createTempSymbol(const Twine &Name) const;
/// Return the MCSymbol for a private symbol with global value name as its
/// base, with the specified suffix.
MCSymbol *getSymbolWithGlobalValueBase(const GlobalValue *GV,
StringRef Suffix) const;
/// Return the MCSymbol for the specified ExternalSymbol.
MCSymbol *GetExternalSymbolSymbol(StringRef Sym) const;
/// Return the symbol for the specified jump table entry.
MCSymbol *GetJTISymbol(unsigned JTID, bool isLinkerPrivate = false) const;
/// Return the symbol for the specified jump table .set
/// FIXME: privatize to AsmPrinter.
MCSymbol *GetJTSetSymbol(unsigned UID, unsigned MBBID) const;
/// Return the MCSymbol used to satisfy BlockAddress uses of the specified
/// basic block.
MCSymbol *GetBlockAddressSymbol(const BlockAddress *BA) const;
MCSymbol *GetBlockAddressSymbol(const BasicBlock *BB) const;
//===------------------------------------------------------------------===//
// Emission Helper Routines.
//===------------------------------------------------------------------===//
/// This is just convenient handler for printing offsets.
void printOffset(int64_t Offset, raw_ostream &OS) const;
/// Emit a byte directive and value.
void emitInt8(int Value) const;
/// Emit a short directive and value.
void emitInt16(int Value) const;
/// Emit a long directive and value.
void emitInt32(int Value) const;
/// Emit a long long directive and value.
void emitInt64(uint64_t Value) const;
/// Emit the specified signed leb128 value.
void emitSLEB128(int64_t Value, const char *Desc = nullptr) const;
/// Emit the specified unsigned leb128 value.
void emitULEB128(uint64_t Value, const char *Desc = nullptr,
unsigned PadTo = 0) const;
/// Emit something like ".long Hi-Lo" where the size in bytes of the directive
/// is specified by Size and Hi/Lo specify the labels. This implicitly uses
/// .set if it is available.
void emitLabelDifference(const MCSymbol *Hi, const MCSymbol *Lo,
unsigned Size) const;
/// Emit something like ".uleb128 Hi-Lo".
void emitLabelDifferenceAsULEB128(const MCSymbol *Hi,
const MCSymbol *Lo) const;
/// Emit something like ".long Label+Offset" where the size in bytes of the
/// directive is specified by Size and Label specifies the label. This
/// implicitly uses .set if it is available.
void emitLabelPlusOffset(const MCSymbol *Label, uint64_t Offset,
unsigned Size, bool IsSectionRelative = false) const;
/// Emit something like ".long Label" where the size in bytes of the directive
/// is specified by Size and Label specifies the label.
void emitLabelReference(const MCSymbol *Label, unsigned Size,
bool IsSectionRelative = false) const {
emitLabelPlusOffset(Label, 0, Size, IsSectionRelative);
}
//===------------------------------------------------------------------===//
// Dwarf Emission Helper Routines
//===------------------------------------------------------------------===//
/// Emit a .byte 42 directive that corresponds to an encoding. If verbose
/// assembly output is enabled, we output comments describing the encoding.
/// Desc is a string saying what the encoding is specifying (e.g. "LSDA").
void emitEncodingByte(unsigned Val, const char *Desc = nullptr) const;
/// Return the size of the encoding in bytes.
unsigned GetSizeOfEncodedValue(unsigned Encoding) const;
/// Emit reference to a ttype global with a specified encoding.
virtual void emitTTypeReference(const GlobalValue *GV, unsigned Encoding);
/// Emit a reference to a symbol for use in dwarf. Different object formats
/// represent this in different ways. Some use a relocation others encode
/// the label offset in its section.
void emitDwarfSymbolReference(const MCSymbol *Label,
bool ForceOffset = false) const;
/// Emit the 4- or 8-byte offset of a string from the start of its section.
///
/// When possible, emit a DwarfStringPool section offset without any
/// relocations, and without using the symbol. Otherwise, defers to \a
/// emitDwarfSymbolReference().
///
/// The length of the emitted value depends on the DWARF format.
void emitDwarfStringOffset(DwarfStringPoolEntry S) const;
/// Emit the 4-or 8-byte offset of a string from the start of its section.
void emitDwarfStringOffset(DwarfStringPoolEntryRef S) const {
emitDwarfStringOffset(S.getEntry());
}
/// Emit something like ".long Label + Offset" or ".quad Label + Offset"
/// depending on the DWARF format.
void emitDwarfOffset(const MCSymbol *Label, uint64_t Offset) const;
/// Emit 32- or 64-bit value depending on the DWARF format.
void emitDwarfLengthOrOffset(uint64_t Value) const;
/// Emit a unit length field. The actual format, DWARF32 or DWARF64, is chosen
/// according to the settings.
void emitDwarfUnitLength(uint64_t Length, const Twine &Comment) const;
/// Emit a unit length field. The actual format, DWARF32 or DWARF64, is chosen
/// according to the settings.
/// Return the end symbol generated inside, the caller needs to emit it.
MCSymbol *emitDwarfUnitLength(const Twine &Prefix,
const Twine &Comment) const;
/// Emit reference to a call site with a specified encoding
void emitCallSiteOffset(const MCSymbol *Hi, const MCSymbol *Lo,
unsigned Encoding) const;
/// Emit an integer value corresponding to the call site encoding
void emitCallSiteValue(uint64_t Value, unsigned Encoding) const;
/// Get the value for DW_AT_APPLE_isa. Zero if no isa encoding specified.
virtual unsigned getISAEncoding() { return 0; }
/// Emit the directive and value for debug thread local expression
///
/// \p Value - The value to emit.
/// \p Size - The size of the integer (in bytes) to emit.
virtual void emitDebugValue(const MCExpr *Value, unsigned Size) const;
//===------------------------------------------------------------------===//
// Dwarf Lowering Routines
//===------------------------------------------------------------------===//
/// Emit frame instruction to describe the layout of the frame.
void emitCFIInstruction(const MCCFIInstruction &Inst) const;
/// Emit Dwarf abbreviation table.
template <typename T> void emitDwarfAbbrevs(const T &Abbrevs) const {
// For each abbreviation.
for (const auto &Abbrev : Abbrevs)
emitDwarfAbbrev(*Abbrev);
// Mark end of abbreviations.
emitULEB128(0, "EOM(3)");
}
void emitDwarfAbbrev(const DIEAbbrev &Abbrev) const;
/// Recursively emit Dwarf DIE tree.
void emitDwarfDIE(const DIE &Die) const;
//===------------------------------------------------------------------===//
// Inline Asm Support
//===------------------------------------------------------------------===//
// These are hooks that targets can override to implement inline asm
// support. These should probably be moved out of AsmPrinter someday.
/// Print information related to the specified machine instr that is
/// independent of the operand, and may be independent of the instr itself.
/// This can be useful for portably encoding the comment character or other
/// bits of target-specific knowledge into the asmstrings. The syntax used is
/// ${:comment}. Targets can override this to add support for their own
/// strange codes.
virtual void PrintSpecial(const MachineInstr *MI, raw_ostream &OS,
StringRef Code) const;
/// Print the MachineOperand as a symbol. Targets with complex handling of
/// symbol references should override the base implementation.
virtual void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &OS);
/// Print the specified operand of MI, an INLINEASM instruction, using the
/// specified assembler variant. Targets should override this to format as
/// appropriate. This method can return true if the operand is erroneous.
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
const char *ExtraCode, raw_ostream &OS);
/// Print the specified operand of MI, an INLINEASM instruction, using the
/// specified assembler variant as an address. Targets should override this to
/// format as appropriate. This method can return true if the operand is
/// erroneous.
virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
const char *ExtraCode, raw_ostream &OS);
/// Let the target do anything it needs to do before emitting inlineasm.
/// \p StartInfo - the subtarget info before parsing inline asm
virtual void emitInlineAsmStart() const;
/// Let the target do anything it needs to do after emitting inlineasm.
/// This callback can be used restore the original mode in case the
/// inlineasm contains directives to switch modes.
/// \p StartInfo - the original subtarget info before inline asm
/// \p EndInfo - the final subtarget info after parsing the inline asm,
/// or NULL if the value is unknown.
virtual void emitInlineAsmEnd(const MCSubtargetInfo &StartInfo,
const MCSubtargetInfo *EndInfo) const;
/// This emits visibility information about symbol, if this is supported by
/// the target.
void emitVisibility(MCSymbol *Sym, unsigned Visibility,
bool IsDefinition = true) const;
/// This emits linkage information about \p GVSym based on \p GV, if this is
/// supported by the target.
virtual void emitLinkage(const GlobalValue *GV, MCSymbol *GVSym) const;
/// Return the alignment for the specified \p GV.
static Align getGVAlignment(const GlobalObject *GV, const DataLayout &DL,
Align InAlign = Align(1));
private:
/// Private state for PrintSpecial()
// Assign a unique ID to this machine instruction.
mutable const MachineInstr *LastMI = nullptr;
mutable unsigned LastFn = 0;
mutable unsigned Counter = ~0U;
bool DwarfUsesRelocationsAcrossSections = false;
/// This method emits the header for the current function.
virtual void emitFunctionHeader();
/// This method emits a comment next to header for the current function.
virtual void emitFunctionHeaderComment();
/// Emit a blob of inline asm to the output streamer.
void
emitInlineAsm(StringRef Str, const MCSubtargetInfo &STI,
const MCTargetOptions &MCOptions,
const MDNode *LocMDNode = nullptr,
InlineAsm::AsmDialect AsmDialect = InlineAsm::AD_ATT) const;
/// This method formats and emits the specified machine instruction that is an
/// inline asm.
void emitInlineAsm(const MachineInstr *MI) const;
/// Add inline assembly info to the diagnostics machinery, so we can
/// emit file and position info. Returns SrcMgr memory buffer position.
unsigned addInlineAsmDiagBuffer(StringRef AsmStr,
const MDNode *LocMDNode) const;
//===------------------------------------------------------------------===//
// Internal Implementation Details
//===------------------------------------------------------------------===//
void emitJumpTableEntry(const MachineJumpTableInfo *MJTI,
const MachineBasicBlock *MBB, unsigned uid) const;
void emitLLVMUsedList(const ConstantArray *InitList);
/// Emit llvm.ident metadata in an '.ident' directive.
void emitModuleIdents(Module &M);
/// Emit bytes for llvm.commandline metadata.
virtual void emitModuleCommandLines(Module &M);
GCMetadataPrinter *getOrCreateGCPrinter(GCStrategy &S);
void emitGlobalAlias(Module &M, const GlobalAlias &GA);
void emitGlobalIFunc(Module &M, const GlobalIFunc &GI);
/// This method decides whether the specified basic block requires a label.
bool shouldEmitLabelForBasicBlock(const MachineBasicBlock &MBB) const;
protected:
virtual bool shouldEmitWeakSwiftAsyncExtendedFramePointerFlags() const {
return false;
}
};
} // end namespace llvm
#endif // LLVM_CODEGEN_ASMPRINTER_H
PK iwFZ���¯ � CodeGen/MachineStableHash.hnu �[��� //===------------ MachineStableHash.h - MIR Stable Hashing Utilities ------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Stable hashing for MachineInstr and MachineOperand. Useful or getting a
// hash across runs, modules, etc.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_MACHINESTABLEHASH_H
#define LLVM_CODEGEN_MACHINESTABLEHASH_H
#include "llvm/CodeGen/StableHashing.h"
namespace llvm {
class MachineBasicBlock;
class MachineFunction;
class MachineInstr;
class MachineOperand;
stable_hash stableHashValue(const MachineOperand &MO);
stable_hash stableHashValue(const MachineInstr &MI, bool HashVRegs = false,
bool HashConstantPoolIndices = false,
bool HashMemOperands = false);
stable_hash stableHashValue(const MachineBasicBlock &MBB);
stable_hash stableHashValue(const MachineFunction &MF);
} // namespace llvm
#endif
PK iwFZx��:" " CodeGen/TargetSchedule.hnu �[��� //===- llvm/CodeGen/TargetSchedule.h - Sched Machine Model ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines a wrapper around MCSchedModel that allows the interface to
// benefit from information currently only available in TargetInstrInfo.
// Ideally, the scheduling interface would be fully defined in the MC layer.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_TARGETSCHEDULE_H
#define LLVM_CODEGEN_TARGETSCHEDULE_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/MC/MCInstrItineraries.h"
#include "llvm/MC/MCSchedule.h"
namespace llvm {
class MachineInstr;
class TargetInstrInfo;
/// Provide an instruction scheduling machine model to CodeGen passes.
class TargetSchedModel {
// For efficiency, hold a copy of the statically defined MCSchedModel for this
// processor.
MCSchedModel SchedModel;
InstrItineraryData InstrItins;
const TargetSubtargetInfo *STI = nullptr;
const TargetInstrInfo *TII = nullptr;
SmallVector<unsigned, 16> ResourceFactors;
// Multiply to normalize microops to resource units.
unsigned MicroOpFactor = 0;
// Resource units per cycle. Latency normalization factor.
unsigned ResourceLCM = 0;
unsigned computeInstrLatency(const MCSchedClassDesc &SCDesc) const;
public:
TargetSchedModel() : SchedModel(MCSchedModel::GetDefaultSchedModel()) {}
/// Initialize the machine model for instruction scheduling.
///
/// The machine model API keeps a copy of the top-level MCSchedModel table
/// indices and may query TargetSubtargetInfo and TargetInstrInfo to resolve
/// dynamic properties.
void init(const TargetSubtargetInfo *TSInfo);
/// Return the MCSchedClassDesc for this instruction.
const MCSchedClassDesc *resolveSchedClass(const MachineInstr *MI) const;
/// TargetSubtargetInfo getter.
const TargetSubtargetInfo *getSubtargetInfo() const { return STI; }
/// TargetInstrInfo getter.
const TargetInstrInfo *getInstrInfo() const { return TII; }
/// Return true if this machine model includes an instruction-level
/// scheduling model.
///
/// This is more detailed than the course grain IssueWidth and default
/// latency properties, but separate from the per-cycle itinerary data.
bool hasInstrSchedModel() const;
const MCSchedModel *getMCSchedModel() const { return &SchedModel; }
/// Return true if this machine model includes cycle-to-cycle itinerary
/// data.
///
/// This models scheduling at each stage in the processor pipeline.
bool hasInstrItineraries() const;
const InstrItineraryData *getInstrItineraries() const {
if (hasInstrItineraries())
return &InstrItins;
return nullptr;
}
/// Return true if this machine model includes an instruction-level
/// scheduling model or cycle-to-cycle itinerary data.
bool hasInstrSchedModelOrItineraries() const {
return hasInstrSchedModel() || hasInstrItineraries();
}
bool enableIntervals() const { return SchedModel.EnableIntervals; }
/// Identify the processor corresponding to the current subtarget.
unsigned getProcessorID() const { return SchedModel.getProcessorID(); }
/// Maximum number of micro-ops that may be scheduled per cycle.
unsigned getIssueWidth() const { return SchedModel.IssueWidth; }
/// Return true if new group must begin.
bool mustBeginGroup(const MachineInstr *MI,
const MCSchedClassDesc *SC = nullptr) const;
/// Return true if current group must end.
bool mustEndGroup(const MachineInstr *MI,
const MCSchedClassDesc *SC = nullptr) const;
/// Return the number of issue slots required for this MI.
unsigned getNumMicroOps(const MachineInstr *MI,
const MCSchedClassDesc *SC = nullptr) const;
/// Get the number of kinds of resources for this target.
unsigned getNumProcResourceKinds() const {
return SchedModel.getNumProcResourceKinds();
}
/// Get a processor resource by ID for convenience.
const MCProcResourceDesc *getProcResource(unsigned PIdx) const {
return SchedModel.getProcResource(PIdx);
}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
const char *getResourceName(unsigned PIdx) const {
if (!PIdx)
return "MOps";
return SchedModel.getProcResource(PIdx)->Name;
}
#endif
using ProcResIter = const MCWriteProcResEntry *;
// Get an iterator into the processor resources consumed by this
// scheduling class.
ProcResIter getWriteProcResBegin(const MCSchedClassDesc *SC) const {
// The subtarget holds a single resource table for all processors.
return STI->getWriteProcResBegin(SC);
}
ProcResIter getWriteProcResEnd(const MCSchedClassDesc *SC) const {
return STI->getWriteProcResEnd(SC);
}
/// Multiply the number of units consumed for a resource by this factor
/// to normalize it relative to other resources.
unsigned getResourceFactor(unsigned ResIdx) const {
return ResourceFactors[ResIdx];
}
/// Multiply number of micro-ops by this factor to normalize it
/// relative to other resources.
unsigned getMicroOpFactor() const {
return MicroOpFactor;
}
/// Multiply cycle count by this factor to normalize it relative to
/// other resources. This is the number of resource units per cycle.
unsigned getLatencyFactor() const {
return ResourceLCM;
}
/// Number of micro-ops that may be buffered for OOO execution.
unsigned getMicroOpBufferSize() const { return SchedModel.MicroOpBufferSize; }
/// Number of resource units that may be buffered for OOO execution.
/// \return The buffer size in resource units or -1 for unlimited.
int getResourceBufferSize(unsigned PIdx) const {
return SchedModel.getProcResource(PIdx)->BufferSize;
}
/// Compute operand latency based on the available machine model.
///
/// Compute and return the latency of the given data dependent def and use
/// when the operand indices are already known. UseMI may be NULL for an
/// unknown user.
unsigned computeOperandLatency(const MachineInstr *DefMI, unsigned DefOperIdx,
const MachineInstr *UseMI, unsigned UseOperIdx)
const;
/// Compute the instruction latency based on the available machine
/// model.
///
/// Compute and return the expected latency of this instruction independent of
/// a particular use. computeOperandLatency is the preferred API, but this is
/// occasionally useful to help estimate instruction cost.
///
/// If UseDefaultDefLatency is false and no new machine sched model is
/// present this method falls back to TII->getInstrLatency with an empty
/// instruction itinerary (this is so we preserve the previous behavior of the
/// if converter after moving it to TargetSchedModel).
unsigned computeInstrLatency(const MachineInstr *MI,
bool UseDefaultDefLatency = true) const;
unsigned computeInstrLatency(const MCInst &Inst) const;
unsigned computeInstrLatency(unsigned Opcode) const;
/// Output dependency latency of a pair of defs of the same register.
///
/// This is typically one cycle.
unsigned computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx,
const MachineInstr *DepMI) const;
/// Compute the reciprocal throughput of the given instruction.
double computeReciprocalThroughput(const MachineInstr *MI) const;
double computeReciprocalThroughput(const MCInst &MI) const;
double computeReciprocalThroughput(unsigned Opcode) const;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_TARGETSCHEDULE_H
PK iwFZ���� CodeGen/HardwareLoops.hnu �[��� //===- HardwareLoops.h ------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
///
/// Defines an IR pass for the creation of hardware loops.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_HARDWARELOOPS_H
#define LLVM_CODEGEN_HARDWARELOOPS_H
#include "llvm/IR/PassManager.h"
namespace llvm {
struct HardwareLoopOptions {
std::optional<unsigned> Decrement;
std::optional<unsigned> Bitwidth;
std::optional<bool> Force;
std::optional<bool> ForcePhi;
std::optional<bool> ForceNested;
std::optional<bool> ForceGuard;
HardwareLoopOptions &setDecrement(unsigned Count) {
Decrement = Count;
return *this;
}
HardwareLoopOptions &setCounterBitwidth(unsigned Width) {
Bitwidth = Width;
return *this;
}
HardwareLoopOptions &setForce(bool Force) {
this->Force = Force;
return *this;
}
HardwareLoopOptions &setForcePhi(bool Force) {
ForcePhi = Force;
return *this;
}
HardwareLoopOptions &setForceNested(bool Force) {
ForceNested = Force;
return *this;
}
HardwareLoopOptions &setForceGuard(bool Force) {
ForceGuard = Force;
return *this;
}
bool getForcePhi() const {
return ForcePhi.has_value() && ForcePhi.value();
}
bool getForceNested() const {
return ForceNested.has_value() && ForceNested.value();
}
bool getForceGuard() const {
return ForceGuard.has_value() && ForceGuard.value();
}
};
class HardwareLoopsPass : public PassInfoMixin<HardwareLoopsPass> {
HardwareLoopOptions Opts;
public:
explicit HardwareLoopsPass(HardwareLoopOptions Opts = {})
: Opts(Opts) { }
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_HARDWARELOOPS_H
PK iwFZ��o�5 �5 CodeGen/AccelTable.hnu �[��� //==- include/llvm/CodeGen/AccelTable.h - Accelerator Tables -----*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This file contains support for writing accelerator tables.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_ACCELTABLE_H
#define LLVM_CODEGEN_ACCELTABLE_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/MapVector.h"
#include "llvm/ADT/STLFunctionalExtras.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/CodeGen/DIE.h"
#include "llvm/CodeGen/DwarfStringPoolEntry.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/DJB.h"
#include "llvm/Support/Debug.h"
#include <cstdint>
#include <vector>
/// \file
/// The DWARF and Apple accelerator tables are an indirect hash table optimized
/// for null lookup rather than access to known data. The Apple accelerator
/// tables are a precursor of the newer DWARF v5 accelerator tables. Both
/// formats share common design ideas.
///
/// The Apple accelerator table are output into an on-disk format that looks
/// like this:
///
/// .------------------.
/// | HEADER |
/// |------------------|
/// | BUCKETS |
/// |------------------|
/// | HASHES |
/// |------------------|
/// | OFFSETS |
/// |------------------|
/// | DATA |
/// `------------------'
///
/// The header contains a magic number, version, type of hash function,
/// the number of buckets, total number of hashes, and room for a special struct
/// of data and the length of that struct.
///
/// The buckets contain an index (e.g. 6) into the hashes array. The hashes
/// section contains all of the 32-bit hash values in contiguous memory, and the
/// offsets contain the offset into the data area for the particular hash.
///
/// For a lookup example, we could hash a function name and take it modulo the
/// number of buckets giving us our bucket. From there we take the bucket value
/// as an index into the hashes table and look at each successive hash as long
/// as the hash value is still the same modulo result (bucket value) as earlier.
/// If we have a match we look at that same entry in the offsets table and grab
/// the offset in the data for our final match.
///
/// The DWARF v5 accelerator table consists of zero or more name indices that
/// are output into an on-disk format that looks like this:
///
/// .------------------.
/// | HEADER |
/// |------------------|
/// | CU LIST |
/// |------------------|
/// | LOCAL TU LIST |
/// |------------------|
/// | FOREIGN TU LIST |
/// |------------------|
/// | HASH TABLE |
/// |------------------|
/// | NAME TABLE |
/// |------------------|
/// | ABBREV TABLE |
/// |------------------|
/// | ENTRY POOL |
/// `------------------'
///
/// For the full documentation please refer to the DWARF 5 standard.
///
///
/// This file defines the class template AccelTable, which is represents an
/// abstract view of an Accelerator table, without any notion of an on-disk
/// layout. This class is parameterized by an entry type, which should derive
/// from AccelTableData. This is the type of individual entries in the table,
/// and it should store the data necessary to emit them. AppleAccelTableData is
/// the base class for Apple Accelerator Table entries, which have a uniform
/// structure based on a sequence of Atoms. There are different sub-classes
/// derived from AppleAccelTable, which differ in the set of Atoms and how they
/// obtain their values.
///
/// An Apple Accelerator Table can be serialized by calling emitAppleAccelTable
/// function.
namespace llvm {
class AsmPrinter;
class DwarfCompileUnit;
class DwarfDebug;
class MCSymbol;
class raw_ostream;
/// Interface which the different types of accelerator table data have to
/// conform. It serves as a base class for different values of the template
/// argument of the AccelTable class template.
class AccelTableData {
public:
virtual ~AccelTableData() = default;
bool operator<(const AccelTableData &Other) const {
return order() < Other.order();
}
// Subclasses should implement:
// static uint32_t hash(StringRef Name);
#ifndef NDEBUG
virtual void print(raw_ostream &OS) const = 0;
#endif
protected:
virtual uint64_t order() const = 0;
};
/// A base class holding non-template-dependant functionality of the AccelTable
/// class. Clients should not use this class directly but rather instantiate
/// AccelTable with a type derived from AccelTableData.
class AccelTableBase {
public:
using HashFn = uint32_t(StringRef);
/// Represents a group of entries with identical name (and hence, hash value).
struct HashData {
DwarfStringPoolEntryRef Name;
uint32_t HashValue;
std::vector<AccelTableData *> Values;
MCSymbol *Sym;
#ifndef NDEBUG
void print(raw_ostream &OS) const;
void dump() const { print(dbgs()); }
#endif
};
using HashList = std::vector<HashData *>;
using BucketList = std::vector<HashList>;
protected:
/// Allocator for HashData and Values.
BumpPtrAllocator Allocator;
using StringEntries = MapVector<StringRef, HashData>;
StringEntries Entries;
HashFn *Hash;
uint32_t BucketCount = 0;
uint32_t UniqueHashCount = 0;
HashList Hashes;
BucketList Buckets;
void computeBucketCount();
AccelTableBase(HashFn *Hash) : Hash(Hash) {}
public:
void finalize(AsmPrinter *Asm, StringRef Prefix);
ArrayRef<HashList> getBuckets() const { return Buckets; }
uint32_t getBucketCount() const { return BucketCount; }
uint32_t getUniqueHashCount() const { return UniqueHashCount; }
uint32_t getUniqueNameCount() const { return Entries.size(); }
#ifndef NDEBUG
void print(raw_ostream &OS) const;
void dump() const { print(dbgs()); }
#endif
AccelTableBase(const AccelTableBase &) = delete;
void operator=(const AccelTableBase &) = delete;
};
/// This class holds an abstract representation of an Accelerator Table,
/// consisting of a sequence of buckets, each bucket containint a sequence of
/// HashData entries. The class is parameterized by the type of entries it
/// holds. The type template parameter also defines the hash function to use for
/// hashing names.
template <typename DataT> class AccelTable : public AccelTableBase {
public:
AccelTable() : AccelTableBase(DataT::hash) {}
template <typename... Types>
void addName(DwarfStringPoolEntryRef Name, Types &&... Args);
};
template <typename AccelTableDataT>
template <typename... Types>
void AccelTable<AccelTableDataT>::addName(DwarfStringPoolEntryRef Name,
Types &&... Args) {
assert(Buckets.empty() && "Already finalized!");
// If the string is in the list already then add this die to the list
// otherwise add a new one.
auto &It = Entries[Name.getString()];
if (It.Values.empty()) {
It.Name = Name;
It.HashValue = Hash(Name.getString());
}
It.Values.push_back(new (Allocator)
AccelTableDataT(std::forward<Types>(Args)...));
}
/// A base class for different implementations of Data classes for Apple
/// Accelerator Tables. The columns in the table are defined by the static Atoms
/// variable defined on the subclasses.
class AppleAccelTableData : public AccelTableData {
public:
/// An Atom defines the form of the data in an Apple accelerator table.
/// Conceptually it is a column in the accelerator consisting of a type and a
/// specification of the form of its data.
struct Atom {
/// Atom Type.
const uint16_t Type;
/// DWARF Form.
const uint16_t Form;
constexpr Atom(uint16_t Type, uint16_t Form) : Type(Type), Form(Form) {}
#ifndef NDEBUG
void print(raw_ostream &OS) const;
void dump() const { print(dbgs()); }
#endif
};
// Subclasses should define:
// static constexpr Atom Atoms[];
virtual void emit(AsmPrinter *Asm) const = 0;
static uint32_t hash(StringRef Buffer) { return djbHash(Buffer); }
};
/// The Data class implementation for DWARF v5 accelerator table. Unlike the
/// Apple Data classes, this class is just a DIE wrapper, and does not know to
/// serialize itself. The complete serialization logic is in the
/// emitDWARF5AccelTable function.
class DWARF5AccelTableData : public AccelTableData {
public:
static uint32_t hash(StringRef Name) { return caseFoldingDjbHash(Name); }
DWARF5AccelTableData(const DIE &Die) : Die(Die) {}
#ifndef NDEBUG
void print(raw_ostream &OS) const override;
#endif
const DIE &getDie() const { return Die; }
uint64_t getDieOffset() const { return Die.getOffset(); }
unsigned getDieTag() const { return Die.getTag(); }
protected:
const DIE &Die;
uint64_t order() const override { return Die.getOffset(); }
};
class DWARF5AccelTableStaticData : public AccelTableData {
public:
static uint32_t hash(StringRef Name) { return caseFoldingDjbHash(Name); }
DWARF5AccelTableStaticData(uint64_t DieOffset, unsigned DieTag,
unsigned CUIndex)
: DieOffset(DieOffset), DieTag(DieTag), CUIndex(CUIndex) {}
#ifndef NDEBUG
void print(raw_ostream &OS) const override;
#endif
uint64_t getDieOffset() const { return DieOffset; }
unsigned getDieTag() const { return DieTag; }
unsigned getCUIndex() const { return CUIndex; }
protected:
uint64_t DieOffset;
unsigned DieTag;
unsigned CUIndex;
uint64_t order() const override { return DieOffset; }
};
void emitAppleAccelTableImpl(AsmPrinter *Asm, AccelTableBase &Contents,
StringRef Prefix, const MCSymbol *SecBegin,
ArrayRef<AppleAccelTableData::Atom> Atoms);
/// Emit an Apple Accelerator Table consisting of entries in the specified
/// AccelTable. The DataT template parameter should be derived from
/// AppleAccelTableData.
template <typename DataT>
void emitAppleAccelTable(AsmPrinter *Asm, AccelTable<DataT> &Contents,
StringRef Prefix, const MCSymbol *SecBegin) {
static_assert(std::is_convertible<DataT *, AppleAccelTableData *>::value);
emitAppleAccelTableImpl(Asm, Contents, Prefix, SecBegin, DataT::Atoms);
}
void emitDWARF5AccelTable(AsmPrinter *Asm,
AccelTable<DWARF5AccelTableData> &Contents,
const DwarfDebug &DD,
ArrayRef<std::unique_ptr<DwarfCompileUnit>> CUs);
void emitDWARF5AccelTable(
AsmPrinter *Asm, AccelTable<DWARF5AccelTableStaticData> &Contents,
ArrayRef<MCSymbol *> CUs,
llvm::function_ref<unsigned(const DWARF5AccelTableStaticData &)>
getCUIndexForEntry);
/// Accelerator table data implementation for simple Apple accelerator tables
/// with just a DIE reference.
class AppleAccelTableOffsetData : public AppleAccelTableData {
public:
AppleAccelTableOffsetData(const DIE &D) : Die(D) {}
void emit(AsmPrinter *Asm) const override;
static constexpr Atom Atoms[] = {
Atom(dwarf::DW_ATOM_die_offset, dwarf::DW_FORM_data4)};
#ifndef NDEBUG
void print(raw_ostream &OS) const override;
#endif
protected:
uint64_t order() const override { return Die.getOffset(); }
const DIE &Die;
};
/// Accelerator table data implementation for Apple type accelerator tables.
class AppleAccelTableTypeData : public AppleAccelTableOffsetData {
public:
AppleAccelTableTypeData(const DIE &D) : AppleAccelTableOffsetData(D) {}
void emit(AsmPrinter *Asm) const override;
static constexpr Atom Atoms[] = {
Atom(dwarf::DW_ATOM_die_offset, dwarf::DW_FORM_data4),
Atom(dwarf::DW_ATOM_die_tag, dwarf::DW_FORM_data2),
Atom(dwarf::DW_ATOM_type_flags, dwarf::DW_FORM_data1)};
#ifndef NDEBUG
void print(raw_ostream &OS) const override;
#endif
};
/// Accelerator table data implementation for simple Apple accelerator tables
/// with a DIE offset but no actual DIE pointer.
class AppleAccelTableStaticOffsetData : public AppleAccelTableData {
public:
AppleAccelTableStaticOffsetData(uint32_t Offset) : Offset(Offset) {}
void emit(AsmPrinter *Asm) const override;
static constexpr Atom Atoms[] = {
Atom(dwarf::DW_ATOM_die_offset, dwarf::DW_FORM_data4)};
#ifndef NDEBUG
void print(raw_ostream &OS) const override;
#endif
protected:
uint64_t order() const override { return Offset; }
uint32_t Offset;
};
/// Accelerator table data implementation for type accelerator tables with
/// a DIE offset but no actual DIE pointer.
class AppleAccelTableStaticTypeData : public AppleAccelTableStaticOffsetData {
public:
AppleAccelTableStaticTypeData(uint32_t Offset, uint16_t Tag,
bool ObjCClassIsImplementation,
uint32_t QualifiedNameHash)
: AppleAccelTableStaticOffsetData(Offset),
QualifiedNameHash(QualifiedNameHash), Tag(Tag),
ObjCClassIsImplementation(ObjCClassIsImplementation) {}
void emit(AsmPrinter *Asm) const override;
static constexpr Atom Atoms[] = {
Atom(dwarf::DW_ATOM_die_offset, dwarf::DW_FORM_data4),
Atom(dwarf::DW_ATOM_die_tag, dwarf::DW_FORM_data2),
Atom(5, dwarf::DW_FORM_data1), Atom(6, dwarf::DW_FORM_data4)};
#ifndef NDEBUG
void print(raw_ostream &OS) const override;
#endif
protected:
uint64_t order() const override { return Offset; }
uint32_t QualifiedNameHash;
uint16_t Tag;
bool ObjCClassIsImplementation;
};
} // end namespace llvm
#endif // LLVM_CODEGEN_ACCELTABLE_H
PK iwFZw���- �- CodeGen/LiveRangeCalc.hnu �[��� //===- LiveRangeCalc.h - Calculate live ranges -----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// The LiveRangeCalc class can be used to implement the computation of
// live ranges from scratch.
// It caches information about values in the CFG to speed up repeated
// operations on the same live range. The cache can be shared by
// non-overlapping live ranges. SplitKit uses that when computing the live
// range of split products.
//
// A low-level interface is available to clients that know where a variable is
// live, but don't know which value it has as every point. LiveRangeCalc will
// propagate values down the dominator tree, and even insert PHI-defs where
// needed. SplitKit uses this faster interface when possible.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_CODEGEN_LIVERANGECALC_H
#define LLVM_CODEGEN_LIVERANGECALC_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/IndexedMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/SlotIndexes.h"
#include <utility>
namespace llvm {
template <class NodeT> class DomTreeNodeBase;
class MachineDominatorTree;
class MachineFunction;
class MachineRegisterInfo;
using MachineDomTreeNode = DomTreeNodeBase<MachineBasicBlock>;
class LiveRangeCalc {
const MachineFunction *MF = nullptr;
const MachineRegisterInfo *MRI = nullptr;
SlotIndexes *Indexes = nullptr;
MachineDominatorTree *DomTree = nullptr;
VNInfo::Allocator *Alloc = nullptr;
/// LiveOutPair - A value and the block that defined it. The domtree node is
/// redundant, it can be computed as: MDT[Indexes.getMBBFromIndex(VNI->def)].
using LiveOutPair = std::pair<VNInfo *, MachineDomTreeNode *>;
/// LiveOutMap - Map basic blocks to the value leaving the block.
using LiveOutMap = IndexedMap<LiveOutPair, MBB2NumberFunctor>;
/// Bit vector of active entries in LiveOut, also used as a visited set by
/// findReachingDefs. One entry per basic block, indexed by block number.
/// This is kept as a separate bit vector because it can be cleared quickly
/// when switching live ranges.
BitVector Seen;
/// Map LiveRange to sets of blocks (represented by bit vectors) that
/// in the live range are defined on entry and undefined on entry.
/// A block is defined on entry if there is a path from at least one of
/// the defs in the live range to the entry of the block, and conversely,
/// a block is undefined on entry, if there is no such path (i.e. no
/// definition reaches the entry of the block). A single LiveRangeCalc
/// object is used to track live-out information for multiple registers
/// in live range splitting (which is ok, since the live ranges of these
/// registers do not overlap), but the defined/undefined information must
/// be kept separate for each individual range.
/// By convention, EntryInfoMap[&LR] = { Defined, Undefined }.
using EntryInfoMap = DenseMap<LiveRange *, std::pair<BitVector, BitVector>>;
EntryInfoMap EntryInfos;
/// Map each basic block where a live range is live out to the live-out value
/// and its defining block.
///
/// For every basic block, MBB, one of these conditions shall be true:
///
/// 1. !Seen.count(MBB->getNumber())
/// Blocks without a Seen bit are ignored.
/// 2. LiveOut[MBB].second.getNode() == MBB
/// The live-out value is defined in MBB.
/// 3. forall P in preds(MBB): LiveOut[P] == LiveOut[MBB]
/// The live-out value passses through MBB. All predecessors must carry
/// the same value.
///
/// The domtree node may be null, it can be computed.
///
/// The map can be shared by multiple live ranges as long as no two are
/// live-out of the same block.
LiveOutMap Map;
/// LiveInBlock - Information about a basic block where a live range is known
/// to be live-in, but the value has not yet been determined.
struct LiveInBlock {
// The live range set that is live-in to this block. The algorithms can
// handle multiple non-overlapping live ranges simultaneously.
LiveRange &LR;
// DomNode - Dominator tree node for the block.
// Cleared when the final value has been determined and LI has been updated.
MachineDomTreeNode *DomNode;
// Position in block where the live-in range ends, or SlotIndex() if the
// range passes through the block. When the final value has been
// determined, the range from the block start to Kill will be added to LI.
SlotIndex Kill;
// Live-in value filled in by updateSSA once it is known.
VNInfo *Value = nullptr;
LiveInBlock(LiveRange &LR, MachineDomTreeNode *node, SlotIndex kill)
: LR(LR), DomNode(node), Kill(kill) {}
};
/// LiveIn - Work list of blocks where the live-in value has yet to be
/// determined. This list is typically computed by findReachingDefs() and
/// used as a work list by updateSSA(). The low-level interface may also be
/// used to add entries directly.
SmallVector<LiveInBlock, 16> LiveIn;
/// Check if the entry to block @p MBB can be reached by any of the defs
/// in @p LR. Return true if none of the defs reach the entry to @p MBB.
bool isDefOnEntry(LiveRange &LR, ArrayRef<SlotIndex> Undefs,
MachineBasicBlock &MBB, BitVector &DefOnEntry,
BitVector &UndefOnEntry);
/// Find the set of defs that can reach @p Kill. @p Kill must belong to
/// @p UseMBB.
///
/// If exactly one def can reach @p UseMBB, and the def dominates @p Kill,
/// all paths from the def to @p UseMBB are added to @p LR, and the function
/// returns true.
///
/// If multiple values can reach @p UseMBB, the blocks that need @p LR to be
/// live in are added to the LiveIn array, and the function returns false.
///
/// The array @p Undef provides the locations where the range @p LR becomes
/// undefined by <def,read-undef> operands on other subranges. If @p Undef
/// is non-empty and @p Kill is jointly dominated only by the entries of
/// @p Undef, the function returns false.
///
/// PhysReg, when set, is used to verify live-in lists on basic blocks.
bool findReachingDefs(LiveRange &LR, MachineBasicBlock &UseMBB, SlotIndex Use,
unsigned PhysReg, ArrayRef<SlotIndex> Undefs);
/// updateSSA - Compute the values that will be live in to all requested
/// blocks in LiveIn. Create PHI-def values as required to preserve SSA form.
///
/// Every live-in block must be jointly dominated by the added live-out
/// blocks. No values are read from the live ranges.
void updateSSA();
/// Transfer information from the LiveIn vector to the live ranges and update
/// the given @p LiveOuts.
void updateFromLiveIns();
protected:
/// Some getters to expose in a read-only way some private fields to
/// subclasses.
const MachineFunction *getMachineFunction() { return MF; }
const MachineRegisterInfo *getRegInfo() const { return MRI; }
SlotIndexes *getIndexes() { return Indexes; }
MachineDominatorTree *getDomTree() { return DomTree; }
VNInfo::Allocator *getVNAlloc() { return Alloc; }
/// Reset Map and Seen fields.
void resetLiveOutMap();
public:
LiveRangeCalc() = default;
//===--------------------------------------------------------------------===//
// High-level interface.
//===--------------------------------------------------------------------===//
//
// Calculate live ranges from scratch.
//
/// reset - Prepare caches for a new set of non-overlapping live ranges. The
/// caches must be reset before attempting calculations with a live range
/// that may overlap a previously computed live range, and before the first
/// live range in a function. If live ranges are not known to be
/// non-overlapping, call reset before each.
void reset(const MachineFunction *mf, SlotIndexes *SI,
MachineDominatorTree *MDT, VNInfo::Allocator *VNIA);
//===--------------------------------------------------------------------===//
// Mid-level interface.
//===--------------------------------------------------------------------===//
//
// Modify existing live ranges.
//
/// Extend the live range of @p LR to reach @p Use.
///
/// The existing values in @p LR must be live so they jointly dominate @p Use.
/// If @p Use is not dominated by a single existing value, PHI-defs are
/// inserted as required to preserve SSA form.
///
/// PhysReg, when set, is used to verify live-in lists on basic blocks.
void extend(LiveRange &LR, SlotIndex Use, unsigned PhysReg,
ArrayRef<SlotIndex> Undefs);
//===--------------------------------------------------------------------===//
// Low-level interface.
//===--------------------------------------------------------------------===//
//
// These functions can be used to compute live ranges where the live-in and
// live-out blocks are already known, but the SSA value in each block is
// unknown.
//
// After calling reset(), add known live-out values and known live-in blocks.
// Then call calculateValues() to compute the actual value that is
// live-in to each block, and add liveness to the live ranges.
//
/// setLiveOutValue - Indicate that VNI is live out from MBB. The
/// calculateValues() function will not add liveness for MBB, the caller
/// should take care of that.
///
/// VNI may be null only if MBB is a live-through block also passed to
/// addLiveInBlock().
void setLiveOutValue(MachineBasicBlock *MBB, VNInfo *VNI) {
Seen.set(MBB->getNumber());
Map[MBB] = LiveOutPair(VNI, nullptr);
}
/// addLiveInBlock - Add a block with an unknown live-in value. This
/// function can only be called once per basic block. Once the live-in value
/// has been determined, calculateValues() will add liveness to LI.
///
/// @param LR The live range that is live-in to the block.
/// @param DomNode The domtree node for the block.
/// @param Kill Index in block where LI is killed. If the value is
/// live-through, set Kill = SLotIndex() and also call
/// setLiveOutValue(MBB, 0).
void addLiveInBlock(LiveRange &LR, MachineDomTreeNode *DomNode,
SlotIndex Kill = SlotIndex()) {
LiveIn.push_back(LiveInBlock(LR, DomNode, Kill));
}
/// calculateValues - Calculate the value that will be live-in to each block
/// added with addLiveInBlock. Add PHI-def values as needed to preserve SSA
/// form. Add liveness to all live-in blocks up to the Kill point, or the
/// whole block for live-through blocks.
///
/// Every predecessor of a live-in block must have been given a value with
/// setLiveOutValue, the value may be null for live-trough blocks.
void calculateValues();
/// A diagnostic function to check if the end of the block @p MBB is
/// jointly dominated by the blocks corresponding to the slot indices
/// in @p Defs. This function is mainly for use in self-verification
/// checks.
LLVM_ATTRIBUTE_UNUSED
static bool isJointlyDominated(const MachineBasicBlock *MBB,
ArrayRef<SlotIndex> Defs,
const SlotIndexes &Indexes);
};
} // end namespace llvm
#endif // LLVM_CODEGEN_LIVERANGECALC_H
PK iwFZp���� � Remarks/BitstreamRemarkParser.hnu �[��� //===-- BitstreamRemarkParser.h - Bitstream parser --------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides an implementation of the remark parser using the LLVM
// Bitstream format.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_REMARKS_BITSTREAMREMARKPARSER_H
#define LLVM_REMARKS_BITSTREAMREMARKPARSER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Bitstream/BitstreamReader.h"
#include "llvm/Support/Error.h"
#include <array>
#include <cstdint>
#include <optional>
namespace llvm {
namespace remarks {
/// Helper to parse a META_BLOCK for a bitstream remark container.
struct BitstreamMetaParserHelper {
/// The Bitstream reader.
BitstreamCursor &Stream;
/// Reference to the storage for the block info.
BitstreamBlockInfo &BlockInfo;
/// The parsed content: depending on the container type, some fields might be
/// empty.
std::optional<uint64_t> ContainerVersion;
std::optional<uint8_t> ContainerType;
std::optional<StringRef> StrTabBuf;
std::optional<StringRef> ExternalFilePath;
std::optional<uint64_t> RemarkVersion;
/// Continue parsing with \p Stream. \p Stream is expected to contain a
/// ENTER_SUBBLOCK to the META_BLOCK at the current position.
/// \p Stream is expected to have a BLOCKINFO_BLOCK set.
BitstreamMetaParserHelper(BitstreamCursor &Stream,
BitstreamBlockInfo &BlockInfo);
/// Parse the META_BLOCK and fill the available entries.
/// This helper does not check for the validity of the fields.
Error parse();
};
/// Helper to parse a REMARK_BLOCK for a bitstream remark container.
struct BitstreamRemarkParserHelper {
/// The Bitstream reader.
BitstreamCursor &Stream;
/// The parsed content: depending on the remark, some fields might be empty.
std::optional<uint8_t> Type;
std::optional<uint64_t> RemarkNameIdx;
std::optional<uint64_t> PassNameIdx;
std::optional<uint64_t> FunctionNameIdx;
std::optional<uint64_t> SourceFileNameIdx;
std::optional<uint32_t> SourceLine;
std::optional<uint32_t> SourceColumn;
std::optional<uint64_t> Hotness;
struct Argument {
std::optional<uint64_t> KeyIdx;
std::optional<uint64_t> ValueIdx;
std::optional<uint64_t> SourceFileNameIdx;
std::optional<uint32_t> SourceLine;
std::optional<uint32_t> SourceColumn;
};
std::optional<ArrayRef<Argument>> Args;
/// Avoid re-allocating a vector every time.
SmallVector<Argument, 8> TmpArgs;
/// Continue parsing with \p Stream. \p Stream is expected to contain a
/// ENTER_SUBBLOCK to the REMARK_BLOCK at the current position.
/// \p Stream is expected to have a BLOCKINFO_BLOCK set and to have already
/// parsed the META_BLOCK.
BitstreamRemarkParserHelper(BitstreamCursor &Stream);
/// Parse the REMARK_BLOCK and fill the available entries.
/// This helper does not check for the validity of the fields.
Error parse();
};
/// Helper to parse any bitstream remark container.
struct BitstreamParserHelper {
/// The Bitstream reader.
BitstreamCursor Stream;
/// The block info block.
BitstreamBlockInfo BlockInfo;
/// Start parsing at \p Buffer.
BitstreamParserHelper(StringRef Buffer);
/// Parse the magic number.
Expected<std::array<char, 4>> parseMagic();
/// Parse the block info block containing all the abbrevs.
/// This needs to be called before calling any other parsing function.
Error parseBlockInfoBlock();
/// Return true if the next block is a META_BLOCK. This function does not move
/// the cursor.
Expected<bool> isMetaBlock();
/// Return true if the next block is a REMARK_BLOCK. This function does not
/// move the cursor.
Expected<bool> isRemarkBlock();
/// Return true if the parser reached the end of the stream.
bool atEndOfStream() { return Stream.AtEndOfStream(); }
/// Jump to the end of the stream, skipping everything.
void skipToEnd() { return Stream.skipToEnd(); }
};
} // end namespace remarks
} // end namespace llvm
#endif // LLVM_REMARKS_BITSTREAMREMARKPARSER_H
PK iwFZE-�> > " Remarks/BitstreamRemarkContainer.hnu �[��� //===-- BitstreamRemarkContainer.h - Container for remarks --------------*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides declarations for things used in the various types of
// remark containers.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_REMARKS_BITSTREAMREMARKCONTAINER_H
#define LLVM_REMARKS_BITSTREAMREMARKCONTAINER_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Bitstream/BitCodes.h"
#include <cstdint>
namespace llvm {
namespace remarks {
/// The current version of the remark container.
/// Note: this is different from the version of the remark entry.
constexpr uint64_t CurrentContainerVersion = 0;
/// The magic number used for identifying remark blocks.
constexpr StringLiteral ContainerMagic("RMRK");
/// Type of the remark container.
/// The remark container has two modes:
/// * separate: the metadata is separate from the remarks and points to the
/// auxiliary file that contains the remarks.
/// * standalone: the metadata and the remarks are emitted together.
enum class BitstreamRemarkContainerType {
/// The metadata emitted separately.
/// This will contain the following:
/// * Container version and type
/// * String table
/// * External file
SeparateRemarksMeta,
/// The remarks emitted separately.
/// This will contain the following:
/// * Container version and type
/// * Remark version
SeparateRemarksFile,
/// Everything is emitted together.
/// This will contain the following:
/// * Container version and type
/// * Remark version
/// * String table
Standalone,
First = SeparateRemarksMeta,
Last = Standalone,
};
/// The possible blocks that will be encountered in a bitstream remark
/// container.
enum BlockIDs {
/// The metadata block is mandatory. It should always come after the
/// BLOCKINFO_BLOCK, and contains metadata that should be used when parsing
/// REMARK_BLOCKs.
/// There should always be only one META_BLOCK.
META_BLOCK_ID = bitc::FIRST_APPLICATION_BLOCKID,
/// One remark entry is represented using a REMARK_BLOCK. There can be
/// multiple REMARK_BLOCKs in the same file.
REMARK_BLOCK_ID
};
constexpr StringRef MetaBlockName = StringRef("Meta", 4);
constexpr StringRef RemarkBlockName = StringRef("Remark", 6);
/// The possible records that can be encountered in the previously described
/// blocks.
enum RecordIDs {
// Meta block records.
RECORD_META_CONTAINER_INFO = 1,
RECORD_META_REMARK_VERSION,
RECORD_META_STRTAB,
RECORD_META_EXTERNAL_FILE,
// Remark block records.
RECORD_REMARK_HEADER,
RECORD_REMARK_DEBUG_LOC,
RECORD_REMARK_HOTNESS,
RECORD_REMARK_ARG_WITH_DEBUGLOC,
RECORD_REMARK_ARG_WITHOUT_DEBUGLOC,
// Helpers.
RECORD_FIRST = RECORD_META_CONTAINER_INFO,
RECORD_LAST = RECORD_REMARK_ARG_WITHOUT_DEBUGLOC
};
constexpr StringRef MetaContainerInfoName = StringRef("Container info", 14);
constexpr StringRef MetaRemarkVersionName = StringRef("Remark version", 14);
constexpr StringRef MetaStrTabName = StringRef("String table", 12);
constexpr StringRef MetaExternalFileName = StringRef("External File", 13);
constexpr StringRef RemarkHeaderName = StringRef("Remark header", 13);
constexpr StringRef RemarkDebugLocName = StringRef("Remark debug location", 21);
constexpr StringRef RemarkHotnessName = StringRef("Remark hotness", 14);
constexpr StringRef RemarkArgWithDebugLocName =
StringRef("Argument with debug location", 28);
constexpr StringRef RemarkArgWithoutDebugLocName = StringRef("Argument", 8);
} // end namespace remarks
} // end namespace llvm
#endif // LLVM_REMARKS_BITSTREAMREMARKCONTAINER_H
PK iwFZ��Z� � Remarks/RemarkFormat.hnu �[��� //===-- llvm/Remarks/RemarkFormat.h - The format of remarks -----*- C++/-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines utilities to deal with the format of remarks.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_REMARKS_REMARKFORMAT_H
#define LLVM_REMARKS_REMARKFORMAT_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace remarks {
constexpr StringLiteral Magic("REMARKS");
/// The format used for serializing/deserializing remarks.
enum class Format { Unknown, YAML, YAMLStrTab, Bitstream };
/// Parse and validate a string for the remark format.
Expected<Format> parseFormat(StringRef FormatStr);
/// Parse and validate a magic number to a remark format.
Expected<Format> magicToFormat(StringRef Magic);
} // end namespace remarks
} // end namespace llvm
#endif // LLVM_REMARKS_REMARKFORMAT_H
PK iwFZuP�3 3 Remarks/YAMLRemarkSerializer.hnu �[��� //===-- YAMLRemarkSerializer.h - YAML Remark serialization ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides an interface for serializing remarks to YAML.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_REMARKS_YAMLREMARKSERIALIZER_H
#define LLVM_REMARKS_YAMLREMARKSERIALIZER_H
#include "llvm/Remarks/RemarkSerializer.h"
#include "llvm/Support/YAMLTraits.h"
#include <optional>
namespace llvm {
namespace remarks {
/// Serialize the remarks to YAML. One remark entry looks like this:
/// --- !<TYPE>
/// Pass: <PASSNAME>
/// Name: <REMARKNAME>
/// DebugLoc: { File: <SOURCEFILENAME>, Line: <SOURCELINE>,
/// Column: <SOURCECOLUMN> }
/// Function: <FUNCTIONNAME>
/// Args:
/// - <KEY>: <VALUE>
/// DebugLoc: { File: <FILE>, Line: <LINE>, Column: <COL> }
/// ...
struct YAMLRemarkSerializer : public RemarkSerializer {
/// The YAML streamer.
yaml::Output YAMLOutput;
YAMLRemarkSerializer(raw_ostream &OS, SerializerMode Mode,
std::optional<StringTable> StrTab = std::nullopt);
void emit(const Remark &Remark) override;
std::unique_ptr<MetaSerializer> metaSerializer(
raw_ostream &OS,
std::optional<StringRef> ExternalFilename = std::nullopt) override;
static bool classof(const RemarkSerializer *S) {
return S->SerializerFormat == Format::YAML;
}
protected:
YAMLRemarkSerializer(Format SerializerFormat, raw_ostream &OS,
SerializerMode Mode,
std::optional<StringTable> StrTab = std::nullopt);
};
struct YAMLMetaSerializer : public MetaSerializer {
std::optional<StringRef> ExternalFilename;
YAMLMetaSerializer(raw_ostream &OS, std::optional<StringRef> ExternalFilename)
: MetaSerializer(OS), ExternalFilename(ExternalFilename) {}
void emit() override;
};
/// Serialize the remarks to YAML using a string table. An remark entry looks
/// like the regular YAML remark but instead of string entries it's using
/// numbers that map to an index in the string table.
struct YAMLStrTabRemarkSerializer : public YAMLRemarkSerializer {
/// Wether we already emitted the metadata in standalone mode.
/// This should be set to true after the first invocation of `emit`.
bool DidEmitMeta = false;
YAMLStrTabRemarkSerializer(raw_ostream &OS, SerializerMode Mode)
: YAMLRemarkSerializer(Format::YAMLStrTab, OS, Mode) {
// We always need a string table for this type of serializer.
StrTab.emplace();
}
YAMLStrTabRemarkSerializer(raw_ostream &OS, SerializerMode Mode,
StringTable StrTab)
: YAMLRemarkSerializer(Format::YAMLStrTab, OS, Mode, std::move(StrTab)) {}
/// Override to emit the metadata if necessary.
void emit(const Remark &Remark) override;
std::unique_ptr<MetaSerializer> metaSerializer(
raw_ostream &OS,
std::optional<StringRef> ExternalFilename = std::nullopt) override;
static bool classof(const RemarkSerializer *S) {
return S->SerializerFormat == Format::YAMLStrTab;
}
};
struct YAMLStrTabMetaSerializer : public YAMLMetaSerializer {
/// The string table is part of the metadata.
const StringTable &StrTab;
YAMLStrTabMetaSerializer(raw_ostream &OS,
std::optional<StringRef> ExternalFilename,
const StringTable &StrTab)
: YAMLMetaSerializer(OS, ExternalFilename), StrTab(StrTab) {}
void emit() override;
};
} // end namespace remarks
} // end namespace llvm
#endif // LLVM_REMARKS_YAMLREMARKSERIALIZER_H
PK iwFZ�ص�G
G
Remarks/RemarkStringTable.hnu �[��� //===-- RemarkStringTable.h - Serializing string table ----------*- C++/-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This class is used to deduplicate and serialize a string table used for
// generating remarks.
//
// For parsing a string table, use ParsedStringTable in RemarkParser.h
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_REMARKS_REMARKSTRINGTABLE_H
#define LLVM_REMARKS_REMARKSTRINGTABLE_H
#include "llvm/ADT/StringMap.h"
#include "llvm/Support/Allocator.h"
#include <vector>
namespace llvm {
class raw_ostream;
class StringRef;
namespace remarks {
struct ParsedStringTable;
struct Remark;
/// The string table used for serializing remarks.
/// This table can be for example serialized in a section to be consumed after
/// the compilation.
struct StringTable {
/// The string table containing all the unique strings used in the output.
/// It maps a string to an unique ID.
StringMap<unsigned, BumpPtrAllocator> StrTab;
/// Total size of the string table when serialized.
size_t SerializedSize = 0;
StringTable() = default;
/// Disable copy.
StringTable(const StringTable &) = delete;
StringTable &operator=(const StringTable &) = delete;
/// Should be movable.
StringTable(StringTable &&) = default;
StringTable &operator=(StringTable &&) = default;
/// Construct a string table from a ParsedStringTable.
StringTable(const ParsedStringTable &Other);
/// Add a string to the table. It returns an unique ID of the string.
std::pair<unsigned, StringRef> add(StringRef Str);
/// Modify \p R to use strings from this string table. If the string table
/// does not contain the strings, it adds them.
void internalize(Remark &R);
/// Serialize the string table to a stream. It is serialized as a little
/// endian uint64 (the size of the table in bytes) followed by a sequence of
/// NULL-terminated strings, where the N-th string is the string with the ID N
/// in the StrTab map.
void serialize(raw_ostream &OS) const;
/// Serialize the string table to a vector. This allows users to do the actual
/// writing to file/memory/other.
/// The string with the ID == N should be the N-th element in the vector.
std::vector<StringRef> serialize() const;
};
} // end namespace remarks
} // end namespace llvm
#endif // LLVM_REMARKS_REMARKSTRINGTABLE_H
PK iwFZ
�/re e Remarks/RemarkParser.hnu �[��� //===-- llvm/Remarks/Remark.h - The remark type -----------------*- C++/-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides an interface for parsing remarks in LLVM.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_REMARKS_REMARKPARSER_H
#define LLVM_REMARKS_REMARKPARSER_H
#include "llvm/ADT/StringRef.h"
#include "llvm/Remarks/RemarkFormat.h"
#include "llvm/Support/Error.h"
#include <memory>
#include <optional>
namespace llvm {
namespace remarks {
struct Remark;
class EndOfFileError : public ErrorInfo<EndOfFileError> {
public:
static char ID;
EndOfFileError() = default;
void log(raw_ostream &OS) const override { OS << "End of file reached."; }
std::error_code convertToErrorCode() const override {
return inconvertibleErrorCode();
}
};
/// Parser used to parse a raw buffer to remarks::Remark objects.
struct RemarkParser {
/// The format of the parser.
Format ParserFormat;
/// Path to prepend when opening an external remark file.
std::string ExternalFilePrependPath;
RemarkParser(Format ParserFormat) : ParserFormat(ParserFormat) {}
/// If no error occurs, this returns a valid Remark object.
/// If an error of type EndOfFileError occurs, it is safe to recover from it
/// by stopping the parsing.
/// If any other error occurs, it should be propagated to the user.
/// The pointer should never be null.
virtual Expected<std::unique_ptr<Remark>> next() = 0;
virtual ~RemarkParser() = default;
};
/// In-memory representation of the string table parsed from a buffer (e.g. the
/// remarks section).
struct ParsedStringTable {
/// The buffer mapped from the section contents.
StringRef Buffer;
/// This object has high changes to be std::move'd around, so don't use a
/// SmallVector for once.
std::vector<size_t> Offsets;
ParsedStringTable(StringRef Buffer);
/// Disable copy.
ParsedStringTable(const ParsedStringTable &) = delete;
ParsedStringTable &operator=(const ParsedStringTable &) = delete;
/// Should be movable.
ParsedStringTable(ParsedStringTable &&) = default;
ParsedStringTable &operator=(ParsedStringTable &&) = default;
size_t size() const { return Offsets.size(); }
Expected<StringRef> operator[](size_t Index) const;
};
Expected<std::unique_ptr<RemarkParser>> createRemarkParser(Format ParserFormat,
StringRef Buf);
Expected<std::unique_ptr<RemarkParser>>
createRemarkParser(Format ParserFormat, StringRef Buf,
ParsedStringTable StrTab);
Expected<std::unique_ptr<RemarkParser>> createRemarkParserFromMeta(
Format ParserFormat, StringRef Buf,
std::optional<ParsedStringTable> StrTab = std::nullopt,
std::optional<StringRef> ExternalFilePrependPath = std::nullopt);
} // end namespace remarks
} // end namespace llvm
#endif // LLVM_REMARKS_REMARKPARSER_H
PK iwFZ:h� � Remarks/Remark.hnu �[��� //===-- llvm/Remarks/Remark.h - The remark type -----------------*- C++/-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines an abstraction for handling remarks.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_REMARKS_REMARK_H
#define LLVM_REMARKS_REMARK_H
#include "llvm-c/Remarks.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/CBindingWrapping.h"
#include "llvm/Support/raw_ostream.h"
#include <optional>
#include <string>
namespace llvm {
namespace remarks {
/// The current version of the remark entry.
constexpr uint64_t CurrentRemarkVersion = 0;
/// The debug location used to track a remark back to the source file.
struct RemarkLocation {
/// Absolute path of the source file corresponding to this remark.
StringRef SourceFilePath;
unsigned SourceLine = 0;
unsigned SourceColumn = 0;
/// Implement operator<< on RemarkLocation.
void print(raw_ostream &OS) const;
};
// Create wrappers for C Binding types (see CBindingWrapping.h).
DEFINE_SIMPLE_CONVERSION_FUNCTIONS(RemarkLocation, LLVMRemarkDebugLocRef)
/// A key-value pair with a debug location that is used to display the remarks
/// at the right place in the source.
struct Argument {
StringRef Key;
// FIXME: We might want to be able to store other types than strings here.
StringRef Val;
// If set, the debug location corresponding to the value.
std::optional<RemarkLocation> Loc;
/// Implement operator<< on Argument.
void print(raw_ostream &OS) const;
};
// Create wrappers for C Binding types (see CBindingWrapping.h).
DEFINE_SIMPLE_CONVERSION_FUNCTIONS(Argument, LLVMRemarkArgRef)
/// The type of the remark.
enum class Type {
Unknown,
Passed,
Missed,
Analysis,
AnalysisFPCommute,
AnalysisAliasing,
Failure,
First = Unknown,
Last = Failure
};
inline StringRef typeToStr(Type Ty) {
switch (Ty) {
case Type::Unknown:
return "Unknown";
case Type::Missed:
return "Missed";
case Type::Passed:
return "Passed";
case Type::Analysis:
return "Analysis";
case Type::AnalysisFPCommute:
return "AnalysisFPCommute";
case Type::AnalysisAliasing:
return "AnalysisAliasing";
default:
return "Failure";
}
}
/// A remark type used for both emission and parsing.
struct Remark {
/// The type of the remark.
Type RemarkType = Type::Unknown;
/// Name of the pass that triggers the emission of this remark.
StringRef PassName;
/// Textual identifier for the remark (single-word, camel-case). Can be used
/// by external tools reading the output file for remarks to identify the
/// remark.
StringRef RemarkName;
/// Mangled name of the function that triggers the emssion of this remark.
StringRef FunctionName;
/// The location in the source file of the remark.
std::optional<RemarkLocation> Loc;
/// If profile information is available, this is the number of times the
/// corresponding code was executed in a profile instrumentation run.
std::optional<uint64_t> Hotness;
/// Arguments collected via the streaming interface.
SmallVector<Argument, 5> Args;
Remark() = default;
Remark(Remark &&) = default;
Remark &operator=(Remark &&) = default;
/// Return a message composed from the arguments as a string.
std::string getArgsAsMsg() const;
/// Clone this remark to explicitly ask for a copy.
Remark clone() const { return *this; }
/// Implement operator<< on Remark.
void print(raw_ostream &OS) const;
private:
/// In order to avoid unwanted copies, "delete" the copy constructor.
/// If a copy is needed, it should be done through `Remark::clone()`.
Remark(const Remark &) = default;
Remark& operator=(const Remark &) = default;
};
// Create wrappers for C Binding types (see CBindingWrapping.h).
DEFINE_SIMPLE_CONVERSION_FUNCTIONS(Remark, LLVMRemarkEntryRef)
/// Comparison operators for Remark objects and dependent objects.
template <typename T>
bool operator<(const std::optional<T> &LHS, const std::optional<T> &RHS) {
// Sorting based on optionals should result in all `None` entries to appear
// before the valid entries. For example, remarks with no debug location will
// appear first.
if (!LHS && !RHS)
return false;
if (!LHS && RHS)
return true;
if (LHS && !RHS)
return false;
return *LHS < *RHS;
}
inline bool operator==(const RemarkLocation &LHS, const RemarkLocation &RHS) {
return LHS.SourceFilePath == RHS.SourceFilePath &&
LHS.SourceLine == RHS.SourceLine &&
LHS.SourceColumn == RHS.SourceColumn;
}
inline bool operator!=(const RemarkLocation &LHS, const RemarkLocation &RHS) {
return !(LHS == RHS);
}
inline bool operator<(const RemarkLocation &LHS, const RemarkLocation &RHS) {
return std::make_tuple(LHS.SourceFilePath, LHS.SourceLine, LHS.SourceColumn) <
std::make_tuple(RHS.SourceFilePath, RHS.SourceLine, RHS.SourceColumn);
}
inline bool operator==(const Argument &LHS, const Argument &RHS) {
return LHS.Key == RHS.Key && LHS.Val == RHS.Val && LHS.Loc == RHS.Loc;
}
inline bool operator!=(const Argument &LHS, const Argument &RHS) {
return !(LHS == RHS);
}
inline bool operator<(const Argument &LHS, const Argument &RHS) {
return std::make_tuple(LHS.Key, LHS.Val, LHS.Loc) <
std::make_tuple(RHS.Key, RHS.Val, RHS.Loc);
}
inline bool operator==(const Remark &LHS, const Remark &RHS) {
return LHS.RemarkType == RHS.RemarkType && LHS.PassName == RHS.PassName &&
LHS.RemarkName == RHS.RemarkName &&
LHS.FunctionName == RHS.FunctionName && LHS.Loc == RHS.Loc &&
LHS.Hotness == RHS.Hotness && LHS.Args == RHS.Args;
}
inline bool operator!=(const Remark &LHS, const Remark &RHS) {
return !(LHS == RHS);
}
inline bool operator<(const Remark &LHS, const Remark &RHS) {
return std::make_tuple(LHS.RemarkType, LHS.PassName, LHS.RemarkName,
LHS.FunctionName, LHS.Loc, LHS.Hotness, LHS.Args) <
std::make_tuple(RHS.RemarkType, RHS.PassName, RHS.RemarkName,
RHS.FunctionName, RHS.Loc, RHS.Hotness, RHS.Args);
}
inline raw_ostream &operator<<(raw_ostream &OS, const RemarkLocation &RLoc) {
RLoc.print(OS);
return OS;
}
inline raw_ostream &operator<<(raw_ostream &OS, const Argument &Arg) {
Arg.print(OS);
return OS;
}
inline raw_ostream &operator<<(raw_ostream &OS, const Remark &Remark) {
Remark.print(OS);
return OS;
}
} // end namespace remarks
} // end namespace llvm
#endif /* LLVM_REMARKS_REMARK_H */
PK iwFZ��["� � Remarks/RemarkSerializer.hnu �[��� //===-- RemarkSerializer.h - Remark serialization interface -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides an interface for serializing remarks to different formats.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_REMARKS_REMARKSERIALIZER_H
#define LLVM_REMARKS_REMARKSERIALIZER_H
#include "llvm/Remarks/RemarkFormat.h"
#include "llvm/Remarks/RemarkStringTable.h"
#include <optional>
namespace llvm {
class raw_ostream;
namespace remarks {
struct Remark;
enum class SerializerMode {
Separate, // A mode where the metadata is serialized separately from the
// remarks. Typically, this is used when the remarks need to be
// streamed to a side file and the metadata is embedded into the
// final result of the compilation.
Standalone // A mode where everything can be retrieved in the same
// file/buffer. Typically, this is used for storing remarks for
// later use.
};
struct MetaSerializer;
/// This is the base class for a remark serializer.
/// It includes support for using a string table while emitting.
struct RemarkSerializer {
/// The format of the serializer.
Format SerializerFormat;
/// The open raw_ostream that the remark diagnostics are emitted to.
raw_ostream &OS;
/// The serialization mode.
SerializerMode Mode;
/// The string table containing all the unique strings used in the output.
/// The table can be serialized to be consumed after the compilation.
std::optional<StringTable> StrTab;
RemarkSerializer(Format SerializerFormat, raw_ostream &OS,
SerializerMode Mode)
: SerializerFormat(SerializerFormat), OS(OS), Mode(Mode) {}
/// This is just an interface.
virtual ~RemarkSerializer() = default;
/// Emit a remark to the stream.
virtual void emit(const Remark &Remark) = 0;
/// Return the corresponding metadata serializer.
virtual std::unique_ptr<MetaSerializer>
metaSerializer(raw_ostream &OS,
std::optional<StringRef> ExternalFilename = std::nullopt) = 0;
};
/// This is the base class for a remark metadata serializer.
struct MetaSerializer {
/// The open raw_ostream that the metadata is emitted to.
raw_ostream &OS;
MetaSerializer(raw_ostream &OS) : OS(OS) {}
/// This is just an interface.
virtual ~MetaSerializer() = default;
virtual void emit() = 0;
};
/// Create a remark serializer.
Expected<std::unique_ptr<RemarkSerializer>>
createRemarkSerializer(Format RemarksFormat, SerializerMode Mode,
raw_ostream &OS);
/// Create a remark serializer that uses a pre-filled string table.
Expected<std::unique_ptr<RemarkSerializer>>
createRemarkSerializer(Format RemarksFormat, SerializerMode Mode,
raw_ostream &OS, remarks::StringTable StrTab);
} // end namespace remarks
} // end namespace llvm
#endif // LLVM_REMARKS_REMARKSERIALIZER_H
PK iwFZd�y�� � # Remarks/BitstreamRemarkSerializer.hnu �[��� //===-- BitstreamRemarkSerializer.h - Bitstream serializer ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides an implementation of the serializer using the LLVM
// Bitstream format.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_REMARKS_BITSTREAMREMARKSERIALIZER_H
#define LLVM_REMARKS_BITSTREAMREMARKSERIALIZER_H
#include "llvm/Bitstream/BitstreamWriter.h"
#include "llvm/Remarks/BitstreamRemarkContainer.h"
#include "llvm/Remarks/RemarkSerializer.h"
#include <optional>
namespace llvm {
namespace remarks {
struct Remarks;
/// Serialize the remarks to LLVM bitstream.
/// This class provides ways to emit remarks in the LLVM bitstream format and
/// its associated metadata.
///
/// * The separate model:
/// Separate meta: | Container info
/// | String table
/// | External file
///
/// Separate remarks: | Container info
/// | Remark version
/// | Remark0
/// | Remark1
/// | Remark2
/// | ...
///
/// * The standalone model: | Container info
/// | String table
/// | Remark version
/// | Remark0
/// | Remark1
/// | Remark2
/// | ...
///
struct BitstreamRemarkSerializerHelper {
/// Buffer used for encoding the bitstream before writing it to the final
/// stream.
SmallVector<char, 1024> Encoded;
/// Buffer used to construct records and pass to the bitstream writer.
SmallVector<uint64_t, 64> R;
/// The Bitstream writer.
BitstreamWriter Bitstream;
/// The type of the container we are serializing.
BitstreamRemarkContainerType ContainerType;
/// Abbrev IDs initialized in the block info block.
/// Note: depending on the container type, some IDs might be uninitialized.
/// Warning: When adding more abbrev IDs, make sure to update the
/// BlockCodeSize (in the call to EnterSubblock).
uint64_t RecordMetaContainerInfoAbbrevID = 0;
uint64_t RecordMetaRemarkVersionAbbrevID = 0;
uint64_t RecordMetaStrTabAbbrevID = 0;
uint64_t RecordMetaExternalFileAbbrevID = 0;
uint64_t RecordRemarkHeaderAbbrevID = 0;
uint64_t RecordRemarkDebugLocAbbrevID = 0;
uint64_t RecordRemarkHotnessAbbrevID = 0;
uint64_t RecordRemarkArgWithDebugLocAbbrevID = 0;
uint64_t RecordRemarkArgWithoutDebugLocAbbrevID = 0;
BitstreamRemarkSerializerHelper(BitstreamRemarkContainerType ContainerType);
// Disable copy and move: Bitstream points to Encoded, which needs special
// handling during copy/move, but moving the vectors is probably useless
// anyway.
BitstreamRemarkSerializerHelper(const BitstreamRemarkSerializerHelper &) =
delete;
BitstreamRemarkSerializerHelper &
operator=(const BitstreamRemarkSerializerHelper &) = delete;
BitstreamRemarkSerializerHelper(BitstreamRemarkSerializerHelper &&) = delete;
BitstreamRemarkSerializerHelper &
operator=(BitstreamRemarkSerializerHelper &&) = delete;
/// Set up the necessary block info entries according to the container type.
void setupBlockInfo();
/// Set up the block info for the metadata block.
void setupMetaBlockInfo();
/// The remark version in the metadata block.
void setupMetaRemarkVersion();
void emitMetaRemarkVersion(uint64_t RemarkVersion);
/// The strtab in the metadata block.
void setupMetaStrTab();
void emitMetaStrTab(const StringTable &StrTab);
/// The external file in the metadata block.
void setupMetaExternalFile();
void emitMetaExternalFile(StringRef Filename);
/// The block info for the remarks block.
void setupRemarkBlockInfo();
/// Emit the metadata for the remarks.
void emitMetaBlock(uint64_t ContainerVersion,
std::optional<uint64_t> RemarkVersion,
std::optional<const StringTable *> StrTab = std::nullopt,
std::optional<StringRef> Filename = std::nullopt);
/// Emit a remark block. The string table is required.
void emitRemarkBlock(const Remark &Remark, StringTable &StrTab);
/// Finalize the writing to \p OS.
void flushToStream(raw_ostream &OS);
/// Finalize the writing to a buffer.
/// The contents of the buffer remain valid for the lifetime of the object.
/// Any call to any other function in this class will invalidate the buffer.
StringRef getBuffer();
};
/// Implementation of the remark serializer using LLVM bitstream.
struct BitstreamRemarkSerializer : public RemarkSerializer {
/// The file should contain:
/// 1) The block info block that describes how to read the blocks.
/// 2) The metadata block that contains various information about the remarks
/// in the file.
/// 3) A number of remark blocks.
/// We need to set up 1) and 2) first, so that we can emit 3) after. This flag
/// is used to emit the first two blocks only once.
bool DidSetUp = false;
/// The helper to emit bitstream.
BitstreamRemarkSerializerHelper Helper;
/// Construct a serializer that will create its own string table.
BitstreamRemarkSerializer(raw_ostream &OS, SerializerMode Mode);
/// Construct a serializer with a pre-filled string table.
BitstreamRemarkSerializer(raw_ostream &OS, SerializerMode Mode,
StringTable StrTab);
/// Emit a remark to the stream. This also emits the metadata associated to
/// the remarks based on the SerializerMode specified at construction.
/// This writes the serialized output to the provided stream.
void emit(const Remark &Remark) override;
/// The metadata serializer associated to this remark serializer. Based on the
/// container type of the current serializer, the container type of the
/// metadata serializer will change.
std::unique_ptr<MetaSerializer> metaSerializer(
raw_ostream &OS,
std::optional<StringRef> ExternalFilename = std::nullopt) override;
static bool classof(const RemarkSerializer *S) {
return S->SerializerFormat == Format::Bitstream;
}
};
/// Serializer of metadata for bitstream remarks.
struct BitstreamMetaSerializer : public MetaSerializer {
/// This class can be used with [1] a pre-constructed
/// BitstreamRemarkSerializerHelper, or with [2] one that is owned by the meta
/// serializer. In case of [1], we need to be able to store a reference to the
/// object, while in case of [2] we need to store the whole object.
std::optional<BitstreamRemarkSerializerHelper> TmpHelper;
/// The actual helper, that can point to \p TmpHelper or to an external helper
/// object.
BitstreamRemarkSerializerHelper *Helper = nullptr;
std::optional<const StringTable *> StrTab;
std::optional<StringRef> ExternalFilename;
/// Create a new meta serializer based on \p ContainerType.
BitstreamMetaSerializer(
raw_ostream &OS, BitstreamRemarkContainerType ContainerType,
std::optional<const StringTable *> StrTab = std::nullopt,
std::optional<StringRef> ExternalFilename = std::nullopt)
: MetaSerializer(OS), TmpHelper(std::nullopt), Helper(nullptr),
StrTab(StrTab), ExternalFilename(ExternalFilename) {
TmpHelper.emplace(ContainerType);
Helper = &*TmpHelper;
}
/// Create a new meta serializer based on a previously built \p Helper.
BitstreamMetaSerializer(
raw_ostream &OS, BitstreamRemarkSerializerHelper &Helper,
std::optional<const StringTable *> StrTab = std::nullopt,
std::optional<StringRef> ExternalFilename = std::nullopt)
: MetaSerializer(OS), TmpHelper(std::nullopt), Helper(&Helper),
StrTab(StrTab), ExternalFilename(ExternalFilename) {}
void emit() override;
};
} // end namespace remarks
} // end namespace llvm
#endif // LLVM_REMARKS_BITSTREAMREMARKSERIALIZER_H
PK iwFZ��ۻ � Remarks/RemarkStreamer.hnu �[��� //===- llvm/Remarks/RemarkStreamer.h ----------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares the main interface for streaming remarks.
//
// This is used to stream any llvm::remarks::Remark to an open file taking
// advantage of all the serialization capabilities developed for remarks (e.g.
// metadata in a section, bitstream format, etc.).
//
// Typically, a specialized remark emitter should hold a reference to the main
// remark streamer set up in the LLVMContext, and should convert specialized
// diagnostics to llvm::remarks::Remark objects as they get emitted.
//
// Specialized remark emitters can be components like:
// * Remarks from LLVM (M)IR passes
// * Remarks from the frontend
// * Remarks from an intermediate IR
//
// This allows for composition between specialized remark emitters throughout
// the compilation pipeline, that end up in the same file, using the same format
// and serialization techniques.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_REMARKS_REMARKSTREAMER_H
#define LLVM_REMARKS_REMARKSTREAMER_H
#include "llvm/Remarks/RemarkSerializer.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/Regex.h"
#include <memory>
#include <optional>
namespace llvm {
class raw_ostream;
namespace remarks {
class RemarkStreamer final {
/// The regex used to filter remarks based on the passes that emit them.
std::optional<Regex> PassFilter;
/// The object used to serialize the remarks to a specific format.
std::unique_ptr<remarks::RemarkSerializer> RemarkSerializer;
/// The filename that the remark diagnostics are emitted to.
const std::optional<std::string> Filename;
public:
RemarkStreamer(std::unique_ptr<remarks::RemarkSerializer> RemarkSerializer,
std::optional<StringRef> Filename = std::nullopt);
/// Return the filename that the remark diagnostics are emitted to.
std::optional<StringRef> getFilename() const {
return Filename ? std::optional<StringRef>(*Filename) : std::nullopt;
}
/// Return stream that the remark diagnostics are emitted to.
raw_ostream &getStream() { return RemarkSerializer->OS; }
/// Return the serializer used for this stream.
remarks::RemarkSerializer &getSerializer() { return *RemarkSerializer; }
/// Set a pass filter based on a regex \p Filter.
/// Returns an error if the regex is invalid.
Error setFilter(StringRef Filter);
/// Check wether the string matches the filter.
bool matchesFilter(StringRef Str);
/// Check if the remarks also need to have associated metadata in a section.
bool needsSection() const;
};
} // end namespace remarks
} // end namespace llvm
#endif // LLVM_REMARKS_REMARKSTREAMER_H
PK iwFZ[c_ Remarks/RemarkLinker.hnu �[��� //===-- llvm/Remarks/RemarkLinker.h -----------------------------*- C++/-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file provides an interface to link together multiple remark files.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_REMARKS_REMARKLINKER_H
#define LLVM_REMARKS_REMARKLINKER_H
#include "llvm/Remarks/Remark.h"
#include "llvm/Remarks/RemarkFormat.h"
#include "llvm/Remarks/RemarkStringTable.h"
#include "llvm/Support/Error.h"
#include <memory>
#include <optional>
#include <set>
namespace llvm {
namespace object {
class ObjectFile;
}
namespace remarks {
struct RemarkLinker {
private:
/// Compare through the pointers.
struct RemarkPtrCompare {
bool operator()(const std::unique_ptr<Remark> &LHS,
const std::unique_ptr<Remark> &RHS) const {
assert(LHS && RHS && "Invalid pointers to compare.");
return *LHS < *RHS;
};
};
/// The main string table for the remarks.
/// Note: all remarks should use the strings from this string table to avoid
/// dangling references.
StringTable StrTab;
/// A set holding unique remarks.
/// FIXME: std::set is probably not the most appropriate data structure here.
/// Due to the limitation of having a move-only key, there isn't another
/// obvious choice for now.
std::set<std::unique_ptr<Remark>, RemarkPtrCompare> Remarks;
/// A path to append before the external file path found in remark metadata.
std::optional<std::string> PrependPath;
/// If true, keep all remarks, otherwise only keep remarks with valid debug
/// locations.
bool KeepAllRemarks = true;
/// Keep this remark. If it's already in the set, discard it.
Remark &keep(std::unique_ptr<Remark> Remark);
/// Returns true if \p R should be kept. If KeepAllRemarks is false, only
/// return true if \p R has a valid debug location.
bool shouldKeepRemark(const Remark &R) {
return KeepAllRemarks ? true : R.Loc.has_value();
}
public:
/// Set a path to prepend to the external file path.
void setExternalFilePrependPath(StringRef PrependPath);
/// Set KeepAllRemarks to \p B.
void setKeepAllRemarks(bool B) { KeepAllRemarks = B; }
/// Link the remarks found in \p Buffer.
/// If \p RemarkFormat is not provided, try to deduce it from the metadata in
/// \p Buffer.
/// \p Buffer can be either a standalone remark container or just
/// metadata. This takes care of uniquing and merging the remarks.
Error link(StringRef Buffer,
std::optional<Format> RemarkFormat = std::nullopt);
/// Link the remarks found in \p Obj by looking for the right section and
/// calling the method above.
Error link(const object::ObjectFile &Obj,
std::optional<Format> RemarkFormat = std::nullopt);
/// Serialize the linked remarks to the stream \p OS, using the format \p
/// RemarkFormat.
/// This clears internal state such as the string table.
/// Note: this implies that the serialization mode is standalone.
Error serialize(raw_ostream &OS, Format RemarksFormat) const;
/// Check whether there are any remarks linked.
bool empty() const { return Remarks.empty(); }
/// Return a collection of the linked unique remarks to iterate on.
/// Ex:
/// for (const Remark &R : RL.remarks() { [...] }
using iterator = pointee_iterator<decltype(Remarks)::const_iterator>;
iterator_range<iterator> remarks() const {
return {Remarks.begin(), Remarks.end()};
}
};
/// Returns a buffer with the contents of the remarks section depending on the
/// format of the file. If the section doesn't exist, this returns an empty
/// optional.
Expected<std::optional<StringRef>>
getRemarksSectionContents(const object::ObjectFile &Obj);
} // end namespace remarks
} // end namespace llvm
#endif // LLVM_REMARKS_REMARKLINKER_H
PK iwFZA:i�� � Remarks/HotnessThresholdParser.hnu �[��� //===- HotnessThresholdParser.h - Parser for hotness threshold --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file implements a simple parser to decode commandline option for
/// remarks hotness threshold that supports both int and a special 'auto' value.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_REMARKS_HOTNESSTHRESHOLDPARSER_H
#define LLVM_REMARKS_HOTNESSTHRESHOLDPARSER_H
#include "llvm/Support/CommandLine.h"
#include <optional>
namespace llvm {
namespace remarks {
// Parse remarks hotness threshold argument value.
// Valid option values are
// 1. integer: manually specified threshold; or
// 2. string 'auto': automatically get threshold from profile summary.
//
// Return std::nullopt Optional if 'auto' is specified, indicating the value
// will be filled later during PSI.
inline Expected<std::optional<uint64_t>> parseHotnessThresholdOption(StringRef Arg) {
if (Arg == "auto")
return std::nullopt;
int64_t Val;
if (Arg.getAsInteger(10, Val))
return createStringError(llvm::inconvertibleErrorCode(),
"Not an integer: %s", Arg.data());
// Negative integer effectively means no threshold
return Val < 0 ? 0 : Val;
}
// A simple CL parser for '*-remarks-hotness-threshold='
class HotnessThresholdParser : public cl::parser<std::optional<uint64_t>> {
public:
HotnessThresholdParser(cl::Option &O) : cl::parser<std::optional<uint64_t>>(O) {}
bool parse(cl::Option &O, StringRef ArgName, StringRef Arg,
std::optional<uint64_t> &V) {
auto ResultOrErr = parseHotnessThresholdOption(Arg);
if (!ResultOrErr)
return O.error("Invalid argument '" + Arg +
"', only integer or 'auto' is supported.");
V = *ResultOrErr;
return false;
}
};
} // namespace remarks
} // namespace llvm
#endif // LLVM_REMARKS_HOTNESSTHRESHOLDPARSER_H
PK iwFZ �_ _ ExecutionEngine/MCJIT.hnu �[��� //===-- MCJIT.h - MC-Based Just-In-Time Execution Engine --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file forces the MCJIT to link in on certain operating systems.
// (Windows).
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_MCJIT_H
#define LLVM_EXECUTIONENGINE_MCJIT_H
#include "llvm/ExecutionEngine/ExecutionEngine.h"
#include <cstdlib>
extern "C" void LLVMLinkInMCJIT();
namespace {
struct ForceMCJITLinking {
ForceMCJITLinking() {
// We must reference MCJIT in such a way that compilers will not
// delete it all as dead code, even with whole program optimization,
// yet is effectively a NO-OP. As the compiler isn't smart enough
// to know that getenv() never returns -1, this will do the job.
// This is so that globals in the translation units where these functions
// are defined are forced to be initialized, populating various
// registries.
if (std::getenv("bar") != (char*) -1)
return;
LLVMLinkInMCJIT();
}
} ForceMCJITLinking;
}
#endif
PK iwFZZ徎T T ExecutionEngine/GenericValue.hnu �[��� //===- GenericValue.h - Represent any type of LLVM value --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// The GenericValue class is used to represent an LLVM value of arbitrary type.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_GENERICVALUE_H
#define LLVM_EXECUTIONENGINE_GENERICVALUE_H
#include "llvm/ADT/APInt.h"
#include <vector>
namespace llvm {
using PointerTy = void *;
struct GenericValue {
struct IntPair {
unsigned int first;
unsigned int second;
};
union {
double DoubleVal;
float FloatVal;
PointerTy PointerVal;
struct IntPair UIntPairVal;
unsigned char Untyped[8];
};
APInt IntVal; // also used for long doubles.
// For aggregate data types.
std::vector<GenericValue> AggregateVal;
// to make code faster, set GenericValue to zero could be omitted, but it is
// potentially can cause problems, since GenericValue to store garbage
// instead of zero.
GenericValue() : IntVal(1, 0) {
UIntPairVal.first = 0;
UIntPairVal.second = 0;
}
explicit GenericValue(void *V) : PointerVal(V), IntVal(1, 0) {}
};
inline GenericValue PTOGV(void *P) { return GenericValue(P); }
inline void *GVTOP(const GenericValue &GV) { return GV.PointerVal; }
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_GENERICVALUE_H
PK iwFZ�d C C ExecutionEngine/ObjectCache.hnu �[��� //===-- ObjectCache.h - Class definition for the ObjectCache ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_OBJECTCACHE_H
#define LLVM_EXECUTIONENGINE_OBJECTCACHE_H
#include <memory>
namespace llvm {
class MemoryBuffer;
class MemoryBufferRef;
class Module;
/// This is the base ObjectCache type which can be provided to an
/// ExecutionEngine for the purpose of avoiding compilation for Modules that
/// have already been compiled and an object file is available.
class ObjectCache {
virtual void anchor();
public:
ObjectCache() = default;
virtual ~ObjectCache() = default;
/// notifyObjectCompiled - Provides a pointer to compiled code for Module M.
virtual void notifyObjectCompiled(const Module *M, MemoryBufferRef Obj) = 0;
/// Returns a pointer to a newly allocated MemoryBuffer that contains the
/// object which corresponds with Module M, or 0 if an object is not
/// available.
virtual std::unique_ptr<MemoryBuffer> getObject(const Module* M) = 0;
};
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_OBJECTCACHE_H
PK iwFZ�O�1 # ExecutionEngine/JITLink/ELF_riscv.hnu �[��� //===----- ELF_riscv.h - JIT link functions for ELF/riscv ----*- C++ -*----===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
//===----------------------------------------------------------------------===//
//
// jit-link functions for ELF/riscv.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_ELF_RISCV_H
#define LLVM_EXECUTIONENGINE_JITLINK_ELF_RISCV_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
namespace llvm {
namespace jitlink {
/// Create a LinkGraph from an ELF/riscv relocatable object
///
/// Note: The graph does not take ownership of the underlying buffer, nor copy
/// its contents. The caller is responsible for ensuring that the object buffer
/// outlives the graph.
Expected<std::unique_ptr<LinkGraph>>
createLinkGraphFromELFObject_riscv(MemoryBufferRef ObjectBuffer);
/// jit-link the given object buffer, which must be a ELF riscv object file.
void link_ELF_riscv(std::unique_ptr<LinkGraph> G,
std::unique_ptr<JITLinkContext> Ctx);
/// Returns a pass that performs linker relaxation. Should be added to
/// PostAllocationPasses.
LinkGraphPassFunction createRelaxationPass_ELF_riscv();
} // end namespace jitlink
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_ELF_RISCV_H
PK iwFZ��Y��3 �3 # ExecutionEngine/JITLink/loongarch.hnu �[��� //= loongarch.h - Generic JITLink loongarch edge kinds, utilities -*- C++ -*-=//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Generic utilities for graphs representing loongarch objects.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_LOONGARCH_H
#define LLVM_EXECUTIONENGINE_JITLINK_LOONGARCH_H
#include "TableManager.h"
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
#include "llvm/ExecutionEngine/Orc/Shared/MemoryFlags.h"
namespace llvm {
namespace jitlink {
namespace loongarch {
/// Represents loongarch fixups.
enum EdgeKind_loongarch : Edge::Kind {
/// A plain 64-bit pointer value relocation.
///
/// Fixup expression:
/// Fixup <- Target + Addend : uint64
///
Pointer64 = Edge::FirstRelocation,
/// A plain 32-bit pointer value relocation.
///
/// Fixup expression:
/// Fixup <- Target + Addend : uint32
///
/// Errors:
/// - The target must reside in the low 32-bits of the address space,
/// otherwise an out-of-range error will be returned.
///
Pointer32,
/// A 26-bit PC-relative branch.
///
/// Represents a PC-relative call or branch to a target within +/-128Mb. The
/// target must be 4-byte aligned.
///
/// Fixup expression:
/// Fixup <- (Target - Fixup + Addend) >> 2 : int26
///
/// Notes:
/// The '26' in the name refers to the number operand bits and follows the
/// naming convention used by the corresponding ELF relocations. Since the low
/// two bits must be zero (because of the 4-byte alignment of the target) the
/// operand is effectively a signed 28-bit number.
///
/// Errors:
/// - The result of the unshifted part of the fixup expression must be
/// 4-byte aligned otherwise an alignment error will be returned.
/// - The result of the fixup expression must fit into an int26 otherwise an
/// out-of-range error will be returned.
///
Branch26PCRel,
/// A 32-bit delta.
///
/// Delta from the fixup to the target.
///
/// Fixup expression:
/// Fixup <- Target - Fixup + Addend : int32
///
/// Errors:
/// - The result of the fixup expression must fit into an int32, otherwise
/// an out-of-range error will be returned.
///
Delta32,
/// A 32-bit negative delta.
///
/// Delta from the target back to the fixup.
///
/// Fixup expression:
/// Fixup <- Fixup - Target + Addend : int32
///
/// Errors:
/// - The result of the fixup expression must fit into an int32, otherwise
/// an out-of-range error will be returned.
///
NegDelta32,
/// A 64-bit delta.
///
/// Delta from the fixup to the target.
///
/// Fixup expression:
/// Fixup <- Target - Fixup + Addend : int64
///
Delta64,
/// The signed 20-bit delta from the fixup page to the page containing the
/// target.
///
/// Fixup expression:
/// Fixup <- (((Target + Addend + ((Target + Addend) & 0x800)) & ~0xfff)
// - (Fixup & ~0xfff)) >> 12 : int20
///
/// Notes:
/// For PCALAU12I fixups.
///
/// Errors:
/// - The result of the fixup expression must fit into an int20 otherwise an
/// out-of-range error will be returned.
///
Page20,
/// The 12-bit offset of the target within its page.
///
/// Typically used to fix up ADDI/LD_W/LD_D immediates.
///
/// Fixup expression:
/// Fixup <- ((Target + Addend) >> Shift) & 0xfff : int12
///
PageOffset12,
/// A GOT entry getter/constructor, transformed to Page20 pointing at the GOT
/// entry for the original target.
///
/// Indicates that this edge should be transformed into a Page20 targeting
/// the GOT entry for the edge's current target, maintaining the same addend.
/// A GOT entry for the target should be created if one does not already
/// exist.
///
/// Edges of this kind are usually handled by a GOT/PLT builder pass inserted
/// by default.
///
/// Fixup expression:
/// NONE
///
/// Errors:
/// - *ASSERTION* Failure to handle edges of this kind prior to the fixup
/// phase will result in an assert/unreachable during the fixup phase.
///
RequestGOTAndTransformToPage20,
/// A GOT entry getter/constructor, transformed to Pageoffset12 pointing at
/// the GOT entry for the original target.
///
/// Indicates that this edge should be transformed into a PageOffset12
/// targeting the GOT entry for the edge's current target, maintaining the
/// same addend. A GOT entry for the target should be created if one does not
/// already exist.
///
/// Edges of this kind are usually handled by a GOT/PLT builder pass inserted
/// by default.
///
/// Fixup expression:
/// NONE
///
RequestGOTAndTransformToPageOffset12,
};
/// Returns a string name for the given loongarch edge. For debugging purposes
/// only.
const char *getEdgeKindName(Edge::Kind K);
// Returns extract bits Val[Hi:Lo].
inline uint32_t extractBits(uint32_t Val, unsigned Hi, unsigned Lo) {
return (Val & (((1UL << (Hi + 1)) - 1))) >> Lo;
}
/// Apply fixup expression for edge to block content.
inline Error applyFixup(LinkGraph &G, Block &B, const Edge &E) {
using namespace support;
char *BlockWorkingMem = B.getAlreadyMutableContent().data();
char *FixupPtr = BlockWorkingMem + E.getOffset();
uint64_t FixupAddress = (B.getAddress() + E.getOffset()).getValue();
uint64_t TargetAddress = E.getTarget().getAddress().getValue();
int64_t Addend = E.getAddend();
switch (E.getKind()) {
case Pointer64:
*(ulittle64_t *)FixupPtr = TargetAddress + Addend;
break;
case Pointer32: {
uint64_t Value = TargetAddress + Addend;
if (Value > std::numeric_limits<uint32_t>::max())
return makeTargetOutOfRangeError(G, B, E);
*(ulittle32_t *)FixupPtr = Value;
break;
}
case Branch26PCRel: {
int64_t Value = TargetAddress - FixupAddress + Addend;
if (!isInt<28>(Value))
return makeTargetOutOfRangeError(G, B, E);
if (!isShiftedInt<26, 2>(Value))
return makeAlignmentError(orc::ExecutorAddr(FixupAddress), Value, 4, E);
uint32_t RawInstr = *(little32_t *)FixupPtr;
uint32_t Imm = static_cast<uint32_t>(Value >> 2);
uint32_t Imm15_0 = extractBits(Imm, /*Hi=*/15, /*Lo=*/0) << 10;
uint32_t Imm25_16 = extractBits(Imm, /*Hi=*/25, /*Lo=*/16);
*(little32_t *)FixupPtr = RawInstr | Imm15_0 | Imm25_16;
break;
}
case Delta32: {
int64_t Value = TargetAddress - FixupAddress + Addend;
if (!isInt<32>(Value))
return makeTargetOutOfRangeError(G, B, E);
*(little32_t *)FixupPtr = Value;
break;
}
case NegDelta32: {
int64_t Value = FixupAddress - TargetAddress + Addend;
if (!isInt<32>(Value))
return makeTargetOutOfRangeError(G, B, E);
*(little32_t *)FixupPtr = Value;
break;
}
case Delta64:
*(little64_t *)FixupPtr = TargetAddress - FixupAddress + Addend;
break;
case Page20: {
uint64_t Target = TargetAddress + Addend;
uint64_t TargetPage =
(Target + (Target & 0x800)) & ~static_cast<uint64_t>(0xfff);
uint64_t PCPage = FixupAddress & ~static_cast<uint64_t>(0xfff);
int64_t PageDelta = TargetPage - PCPage;
if (!isInt<32>(PageDelta))
return makeTargetOutOfRangeError(G, B, E);
uint32_t RawInstr = *(little32_t *)FixupPtr;
uint32_t Imm31_12 = extractBits(PageDelta, /*Hi=*/31, /*Lo=*/12) << 5;
*(little32_t *)FixupPtr = RawInstr | Imm31_12;
break;
}
case PageOffset12: {
uint64_t TargetOffset = (TargetAddress + Addend) & 0xfff;
uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
uint32_t Imm11_0 = TargetOffset << 10;
*(ulittle32_t *)FixupPtr = RawInstr | Imm11_0;
break;
}
default:
return make_error<JITLinkError>(
"In graph " + G.getName() + ", section " + B.getSection().getName() +
" unsupported edge kind " + getEdgeKindName(E.getKind()));
}
return Error::success();
}
/// loongarch null pointer content.
extern const char NullPointerContent[8];
inline ArrayRef<char> getGOTEntryBlockContent(LinkGraph &G) {
return {reinterpret_cast<const char *>(NullPointerContent),
G.getPointerSize()};
}
/// loongarch stub content.
///
/// Contains the instruction sequence for an indirect jump via an in-memory
/// pointer:
/// pcalau12i $t8, %page20(ptr)
/// ld.[w/d] $t8, %pageoff12(ptr)
/// jr $t8
constexpr size_t StubEntrySize = 12;
extern const uint8_t LA64StubContent[StubEntrySize];
extern const uint8_t LA32StubContent[StubEntrySize];
inline ArrayRef<char> getStubBlockContent(LinkGraph &G) {
auto StubContent =
G.getPointerSize() == 8 ? LA64StubContent : LA32StubContent;
return {reinterpret_cast<const char *>(StubContent), StubEntrySize};
}
/// Creates a new pointer block in the given section and returns an
/// Anonymous symobl pointing to it.
///
/// If InitialTarget is given then an Pointer64 relocation will be added to the
/// block pointing at InitialTarget.
///
/// The pointer block will have the following default values:
/// alignment: PointerSize
/// alignment-offset: 0
inline Symbol &createAnonymousPointer(LinkGraph &G, Section &PointerSection,
Symbol *InitialTarget = nullptr,
uint64_t InitialAddend = 0) {
auto &B = G.createContentBlock(PointerSection, getGOTEntryBlockContent(G),
orc::ExecutorAddr(), G.getPointerSize(), 0);
if (InitialTarget)
B.addEdge(G.getPointerSize() == 8 ? Pointer64 : Pointer32, 0,
*InitialTarget, InitialAddend);
return G.addAnonymousSymbol(B, 0, G.getPointerSize(), false, false);
}
/// Create a jump stub that jumps via the pointer at the given symbol and
/// an anonymous symbol pointing to it. Return the anonymous symbol.
inline Symbol &createAnonymousPointerJumpStub(LinkGraph &G,
Section &StubSection,
Symbol &PointerSymbol) {
Block &StubContentBlock = G.createContentBlock(
StubSection, getStubBlockContent(G), orc::ExecutorAddr(), 4, 0);
StubContentBlock.addEdge(Page20, 0, PointerSymbol, 0);
StubContentBlock.addEdge(PageOffset12, 4, PointerSymbol, 0);
return G.addAnonymousSymbol(StubContentBlock, 0, StubEntrySize, true, false);
}
/// Global Offset Table Builder.
class GOTTableManager : public TableManager<GOTTableManager> {
public:
static StringRef getSectionName() { return "$__GOT"; }
bool visitEdge(LinkGraph &G, Block *B, Edge &E) {
Edge::Kind KindToSet = Edge::Invalid;
switch (E.getKind()) {
case RequestGOTAndTransformToPage20:
KindToSet = Page20;
break;
case RequestGOTAndTransformToPageOffset12:
KindToSet = PageOffset12;
break;
default:
return false;
}
assert(KindToSet != Edge::Invalid &&
"Fell through switch, but no new kind to set");
DEBUG_WITH_TYPE("jitlink", {
dbgs() << " Fixing " << G.getEdgeKindName(E.getKind()) << " edge at "
<< B->getFixupAddress(E) << " (" << B->getAddress() << " + "
<< formatv("{0:x}", E.getOffset()) << ")\n";
});
E.setKind(KindToSet);
E.setTarget(getEntryForTarget(G, E.getTarget()));
return true;
}
Symbol &createEntry(LinkGraph &G, Symbol &Target) {
return createAnonymousPointer(G, getGOTSection(G), &Target);
}
private:
Section &getGOTSection(LinkGraph &G) {
if (!GOTSection)
GOTSection = &G.createSection(getSectionName(),
orc::MemProt::Read | orc::MemProt::Exec);
return *GOTSection;
}
Section *GOTSection = nullptr;
};
/// Procedure Linkage Table Builder.
class PLTTableManager : public TableManager<PLTTableManager> {
public:
PLTTableManager(GOTTableManager &GOT) : GOT(GOT) {}
static StringRef getSectionName() { return "$__STUBS"; }
bool visitEdge(LinkGraph &G, Block *B, Edge &E) {
if (E.getKind() == Branch26PCRel && !E.getTarget().isDefined()) {
DEBUG_WITH_TYPE("jitlink", {
dbgs() << " Fixing " << G.getEdgeKindName(E.getKind()) << " edge at "
<< B->getFixupAddress(E) << " (" << B->getAddress() << " + "
<< formatv("{0:x}", E.getOffset()) << ")\n";
});
E.setTarget(getEntryForTarget(G, E.getTarget()));
return true;
}
return false;
}
Symbol &createEntry(LinkGraph &G, Symbol &Target) {
return createAnonymousPointerJumpStub(G, getStubsSection(G),
GOT.getEntryForTarget(G, Target));
}
public:
Section &getStubsSection(LinkGraph &G) {
if (!StubsSection)
StubsSection = &G.createSection(getSectionName(),
orc::MemProt::Read | orc::MemProt::Exec);
return *StubsSection;
}
GOTTableManager &GOT;
Section *StubsSection = nullptr;
};
} // namespace loongarch
} // namespace jitlink
} // namespace llvm
#endif
PK iwFZS��� � % ExecutionEngine/JITLink/COFF_x86_64.hnu �[��� //===--- COFF_x86_64.h - JIT link functions for COFF/x86-64 ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// jit-link functions for COFF/x86-64.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_COFF_X86_64_H
#define LLVM_EXECUTIONENGINE_JITLINK_COFF_X86_64_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
namespace llvm {
namespace jitlink {
/// Create a LinkGraph from an COFF/x86-64 relocatable object.
///
/// Note: The graph does not take ownership of the underlying buffer, nor copy
/// its contents. The caller is responsible for ensuring that the object buffer
/// outlives the graph.
Expected<std::unique_ptr<LinkGraph>>
createLinkGraphFromCOFFObject_x86_64(MemoryBufferRef ObjectBuffer);
/// jit-link the given object buffer, which must be a COFF x86-64 object file.
void link_COFF_x86_64(std::unique_ptr<LinkGraph> G,
std::unique_ptr<JITLinkContext> Ctx);
/// Return the string name of the given COFF x86-64 edge kind.
const char *getCOFFX86RelocationKindName(Edge::Kind R);
} // end namespace jitlink
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_COFF_X86_64_H
PK iwFZ���{ { ExecutionEngine/JITLink/riscv.hnu �[��� //===-- riscv.h - Generic JITLink riscv edge kinds, utilities -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Generic utilities for graphs representing riscv objects.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_RISCV_H
#define LLVM_EXECUTIONENGINE_JITLINK_RISCV_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
namespace llvm {
namespace jitlink {
namespace riscv {
/// Represents riscv fixups. Ordered in the same way as the relocations in
/// include/llvm/BinaryFormat/ELFRelocs/RISCV.def.
enum EdgeKind_riscv : Edge::Kind {
// TODO: Capture and replace to generic fixups
/// A plain 32-bit pointer value relocation
///
/// Fixup expression:
/// Fixup <= Target + Addend : uint32
///
R_RISCV_32 = Edge::FirstRelocation,
/// A plain 64-bit pointer value relocation
///
/// Fixup expression:
/// Fixup <- Target + Addend : uint32
///
R_RISCV_64,
/// PC-relative branch pointer value relocation
///
/// Fixup expression:
/// Fixup <- (Target - Fixup + Addend)
///
R_RISCV_BRANCH,
/// High 20 bits of PC-relative jump pointer value relocation
///
/// Fixup expression:
/// Fixup <- Target - Fixup + Addend
///
R_RISCV_JAL,
/// PC relative call
///
/// Fixup expression:
/// Fixup <- (Target - Fixup + Addend)
R_RISCV_CALL,
/// PC relative call by PLT
///
/// Fixup expression:
/// Fixup <- (Target - Fixup + Addend)
R_RISCV_CALL_PLT,
/// PC relative GOT offset
///
/// Fixup expression:
/// Fixup <- (GOT - Fixup + Addend) >> 12
R_RISCV_GOT_HI20,
/// High 20 bits of PC relative relocation
///
/// Fixup expression:
/// Fixup <- (Target - Fixup + Addend + 0x800) >> 12
R_RISCV_PCREL_HI20,
/// Low 12 bits of PC relative relocation, used by I type instruction format
///
/// Fixup expression:
/// Fixup <- (Target - Fixup + Addend) & 0xFFF
R_RISCV_PCREL_LO12_I,
/// Low 12 bits of PC relative relocation, used by S type instruction format
///
/// Fixup expression:
/// Fixup <- (Target - Fixup + Addend) & 0xFFF
R_RISCV_PCREL_LO12_S,
/// High 20 bits of 32-bit pointer value relocation
///
/// Fixup expression
/// Fixup <- (Target + Addend + 0x800) >> 12
R_RISCV_HI20,
/// Low 12 bits of 32-bit pointer value relocation
///
/// Fixup expression
/// Fixup <- (Target + Addend) & 0xFFF
R_RISCV_LO12_I,
/// Low 12 bits of 32-bit pointer value relocation, used by S type instruction
/// format
///
/// Fixup expression
/// Fixup <- (Target + Addend) & 0xFFF
R_RISCV_LO12_S,
/// 8 bits label addition
///
/// Fixup expression
/// Fixup <- (Target - *{1}Fixup + Addend)
R_RISCV_ADD8,
/// 16 bits label addition
///
/// Fixup expression
/// Fixup <- (Target - *{2}Fixup + Addend)
R_RISCV_ADD16,
/// 32 bits label addition
///
/// Fixup expression:
/// Fixup <- (Target - *{4}Fixup + Addend)
R_RISCV_ADD32,
/// 64 bits label addition
///
/// Fixup expression:
/// Fixup <- (Target - *{8}Fixup + Addend)
R_RISCV_ADD64,
/// 8 bits label subtraction
///
/// Fixup expression
/// Fixup <- (Target - *{1}Fixup - Addend)
R_RISCV_SUB8,
/// 16 bits label subtraction
///
/// Fixup expression
/// Fixup <- (Target - *{2}Fixup - Addend)
R_RISCV_SUB16,
/// 32 bits label subtraction
///
/// Fixup expression
/// Fixup <- (Target - *{4}Fixup - Addend)
R_RISCV_SUB32,
/// 64 bits label subtraction
///
/// Fixup expression
/// Fixup <- (Target - *{8}Fixup - Addend)
R_RISCV_SUB64,
/// 8-bit PC-relative branch offset
///
/// Fixup expression:
/// Fixup <- (Target - Fixup + Addend)
R_RISCV_RVC_BRANCH,
/// 11-bit PC-relative jump offset
///
/// Fixup expression:
/// Fixup <- (Target - Fixup + Addend)
R_RISCV_RVC_JUMP,
/// 6 bits label subtraction
///
/// Fixup expression
/// Fixup <- (Target - *{1}Fixup - Addend)
R_RISCV_SUB6,
/// Local label assignment
///
/// Fixup expression:
/// Fixup <- (Target + Addend)
R_RISCV_SET6,
/// Local label assignment
///
/// Fixup expression:
/// Fixup <- (Target + Addend)
R_RISCV_SET8,
/// Local label assignment
///
/// Fixup expression:
/// Fixup <- (Target + Addend)
R_RISCV_SET16,
/// Local label assignment
///
/// Fixup expression:
/// Fixup <- (Target + Addend)
R_RISCV_SET32,
/// 32 bits PC relative relocation
///
/// Fixup expression:
/// Fixup <- (Target - Fixup + Addend)
R_RISCV_32_PCREL,
/// An auipc/jalr pair eligible for linker relaxation.
///
/// Linker relaxation will replace this with R_RISCV_RVC_JUMP or R_RISCV_JAL
/// if it succeeds, or with R_RISCV_CALL_PLT if it fails.
CallRelaxable,
/// Alignment requirement used by linker relaxation.
///
/// Linker relaxation will use this to ensure all code sequences are properly
/// aligned and then remove these edges from the graph.
AlignRelaxable,
};
/// Returns a string name for the given riscv edge. For debugging purposes
/// only
const char *getEdgeKindName(Edge::Kind K);
} // namespace riscv
} // namespace jitlink
} // namespace llvm
#endif
PK iwFZZ�H H % ExecutionEngine/JITLink/MachO_arm64.hnu �[��� //===---- MachO_arm64.h - JIT link functions for MachO/arm64 ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// jit-link functions for MachO/arm64.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_MACHO_ARM64_H
#define LLVM_EXECUTIONENGINE_JITLINK_MACHO_ARM64_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
namespace llvm {
namespace jitlink {
/// Create a LinkGraph from a MachO/arm64 relocatable object.
///
/// Note: The graph does not take ownership of the underlying buffer, nor copy
/// its contents. The caller is responsible for ensuring that the object buffer
/// outlives the graph.
Expected<std::unique_ptr<LinkGraph>>
createLinkGraphFromMachOObject_arm64(MemoryBufferRef ObjectBuffer);
/// jit-link the given object buffer, which must be a MachO arm64 object file.
///
/// If PrePrunePasses is empty then a default mark-live pass will be inserted
/// that will mark all exported atoms live. If PrePrunePasses is not empty, the
/// caller is responsible for including a pass to mark atoms as live.
///
/// If PostPrunePasses is empty then a default GOT-and-stubs insertion pass will
/// be inserted. If PostPrunePasses is not empty then the caller is responsible
/// for including a pass to insert GOT and stub edges.
void link_MachO_arm64(std::unique_ptr<LinkGraph> G,
std::unique_ptr<JITLinkContext> Ctx);
/// Returns a pass suitable for splitting __eh_frame sections in MachO/x86-64
/// objects.
LinkGraphPassFunction createEHFrameSplitterPass_MachO_arm64();
/// Returns a pass suitable for fixing missing edges in an __eh_frame section
/// in a MachO/x86-64 object.
LinkGraphPassFunction createEHFrameEdgeFixerPass_MachO_arm64();
} // end namespace jitlink
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_MACHO_ARM64_H
PK iwFZ#D� " ExecutionEngine/JITLink/ELF_i386.hnu �[��� //===--- ELF_i386.h - JIT link functions for ELF/i386 --*- C++ -*----===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
//===----------------------------------------------------------------------===//
//
// jit-link functions for ELF/i386.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_ELF_I386_H
#define LLVM_EXECUTIONENGINE_JITLINK_ELF_I386_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
namespace llvm {
namespace jitlink {
/// Create a LinkGraph from an ELF/i386 relocatable object
///
/// Note: The graph does not take ownership of the underlying buffer, nor copy
/// its contents. The caller is responsible for ensuring that the object buffer
/// outlives the graph.
Expected<std::unique_ptr<LinkGraph>>
createLinkGraphFromELFObject_i386(MemoryBufferRef ObjectBuffer);
/// jit-link the given object buffer, which must be a ELF i386 relocatable
/// object file.
void link_ELF_i386(std::unique_ptr<LinkGraph> G,
std::unique_ptr<JITLinkContext> Ctx);
} // end namespace jitlink
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_ELF_I386_H
PK iwFZ=f�2 % ExecutionEngine/JITLink/MemoryFlags.hnu �[��� //===-------- MemoryFlags.h - Memory allocation flags -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Defines types and operations related to memory protection and allocation
// lifetimes.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_MEMORYFLAGS_H
#define LLVM_EXECUTIONENGINE_JITLINK_MEMORYFLAGS_H
#include "llvm/ADT/BitmaskEnum.h"
#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Memory.h"
#include "llvm/Support/raw_ostream.h"
namespace llvm {
namespace jitlink {
/// Describes Read/Write/Exec permissions for memory.
enum class MemProt {
None = 0,
Read = 1U << 0,
Write = 1U << 1,
Exec = 1U << 2,
LLVM_MARK_AS_BITMASK_ENUM(/* LargestValue = */ Exec)
};
/// Print a MemProt as an RWX triple.
raw_ostream &operator<<(raw_ostream &OS, MemProt MP);
/// Convert a MemProt value to a corresponding sys::Memory::ProtectionFlags
/// value.
inline sys::Memory::ProtectionFlags toSysMemoryProtectionFlags(MemProt MP) {
std::underlying_type_t<sys::Memory::ProtectionFlags> PF = 0;
if ((MP & MemProt::Read) != MemProt::None)
PF |= sys::Memory::MF_READ;
if ((MP & MemProt::Write) != MemProt::None)
PF |= sys::Memory::MF_WRITE;
if ((MP & MemProt::Exec) != MemProt::None)
PF |= sys::Memory::MF_EXEC;
return static_cast<sys::Memory::ProtectionFlags>(PF);
}
/// Convert a sys::Memory::ProtectionFlags value to a corresponding MemProt
/// value.
inline MemProt fromSysMemoryProtectionFlags(sys::Memory::ProtectionFlags PF) {
MemProt MP = MemProt::None;
if (PF & sys::Memory::MF_READ)
MP |= MemProt::Read;
if (PF & sys::Memory::MF_WRITE)
MP |= MemProt::Write;
if (PF & sys::Memory::MF_EXEC)
MP |= MemProt::None;
return MP;
}
/// Describes a memory deallocation policy for memory to be allocated by a
/// JITLinkMemoryManager.
///
/// All memory allocated by a call to JITLinkMemoryManager::allocate should be
/// deallocated if a call is made to
/// JITLinkMemoryManager::InFlightAllocation::abandon. The policies below apply
/// to finalized allocations.
enum class MemDeallocPolicy {
/// Standard memory should be deallocated when the deallocate method is called
/// for the finalized allocation.
Standard,
/// Finalize memory should be overwritten and then deallocated after all
/// finalization functions have been run.
Finalize
};
/// Print a MemDeallocPolicy.
raw_ostream &operator<<(raw_ostream &OS, MemDeallocPolicy MDP);
/// A pair of memory protections and allocation policies.
///
/// Optimized for use as a small map key.
class AllocGroup {
friend struct llvm::DenseMapInfo<AllocGroup>;
using underlying_type = uint8_t;
static constexpr unsigned BitsForProt = 3;
static constexpr unsigned BitsForDeallocPolicy = 1;
static constexpr unsigned MaxIdentifiers =
1U << (BitsForProt + BitsForDeallocPolicy);
public:
static constexpr unsigned NumGroups = MaxIdentifiers;
/// Create a default AllocGroup. No memory protections, standard
/// deallocation policy.
AllocGroup() = default;
/// Create an AllocGroup from a MemProt only -- uses
/// MemoryDeallocationPolicy::Standard.
AllocGroup(MemProt MP) : Id(static_cast<underlying_type>(MP)) {}
/// Create an AllocGroup from a MemProt and a MemoryDeallocationPolicy.
AllocGroup(MemProt MP, MemDeallocPolicy MDP)
: Id(static_cast<underlying_type>(MP) |
(static_cast<underlying_type>(MDP) << BitsForProt)) {}
/// Returns the MemProt for this group.
MemProt getMemProt() const {
return static_cast<MemProt>(Id & ((1U << BitsForProt) - 1));
}
/// Returns the MemoryDeallocationPolicy for this group.
MemDeallocPolicy getMemDeallocPolicy() const {
return static_cast<MemDeallocPolicy>(Id >> BitsForProt);
}
friend bool operator==(const AllocGroup &LHS, const AllocGroup &RHS) {
return LHS.Id == RHS.Id;
}
friend bool operator!=(const AllocGroup &LHS, const AllocGroup &RHS) {
return !(LHS == RHS);
}
friend bool operator<(const AllocGroup &LHS, const AllocGroup &RHS) {
return LHS.Id < RHS.Id;
}
private:
AllocGroup(underlying_type RawId) : Id(RawId) {}
underlying_type Id = 0;
};
/// A specialized small-map for AllocGroups.
///
/// Iteration order is guaranteed to match key ordering.
template <typename T> class AllocGroupSmallMap {
private:
using ElemT = std::pair<AllocGroup, T>;
using VectorTy = SmallVector<ElemT, 4>;
static bool compareKey(const ElemT &E, const AllocGroup &G) {
return E.first < G;
}
public:
using iterator = typename VectorTy::iterator;
AllocGroupSmallMap() = default;
AllocGroupSmallMap(std::initializer_list<std::pair<AllocGroup, T>> Inits)
: Elems(Inits) {
llvm::sort(Elems, llvm::less_first());
}
iterator begin() { return Elems.begin(); }
iterator end() { return Elems.end(); }
iterator find(AllocGroup G) {
auto I = lower_bound(Elems, G, compareKey);
return (I->first == G) ? I : end();
}
bool empty() const { return Elems.empty(); }
size_t size() const { return Elems.size(); }
T &operator[](AllocGroup G) {
auto I = lower_bound(Elems, G, compareKey);
if (I == Elems.end() || I->first != G)
I = Elems.insert(I, std::make_pair(G, T()));
return I->second;
}
private:
VectorTy Elems;
};
/// Print an AllocGroup.
raw_ostream &operator<<(raw_ostream &OS, AllocGroup AG);
} // end namespace jitlink
template <> struct DenseMapInfo<jitlink::MemProt> {
static inline jitlink::MemProt getEmptyKey() {
return jitlink::MemProt(~uint8_t(0));
}
static inline jitlink::MemProt getTombstoneKey() {
return jitlink::MemProt(~uint8_t(0) - 1);
}
static unsigned getHashValue(const jitlink::MemProt &Val) {
using UT = std::underlying_type_t<jitlink::MemProt>;
return DenseMapInfo<UT>::getHashValue(static_cast<UT>(Val));
}
static bool isEqual(const jitlink::MemProt &LHS,
const jitlink::MemProt &RHS) {
return LHS == RHS;
}
};
template <> struct DenseMapInfo<jitlink::AllocGroup> {
static inline jitlink::AllocGroup getEmptyKey() {
return jitlink::AllocGroup(~uint8_t(0));
}
static inline jitlink::AllocGroup getTombstoneKey() {
return jitlink::AllocGroup(~uint8_t(0) - 1);
}
static unsigned getHashValue(const jitlink::AllocGroup &Val) {
return DenseMapInfo<jitlink::AllocGroup::underlying_type>::getHashValue(
Val.Id);
}
static bool isEqual(const jitlink::AllocGroup &LHS,
const jitlink::AllocGroup &RHS) {
return LHS == RHS;
}
};
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_MEMORYFLAGS_H
PK iwFZ�n
�c+ c+ ExecutionEngine/JITLink/ppc64.hnu �[��� //===--- ppc64.h - Generic JITLink ppc64 edge kinds, utilities --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Generic utilities for graphs representing 64-bit PowerPC objects.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_PPC64_H
#define LLVM_EXECUTIONENGINE_JITLINK_PPC64_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
#include "llvm/ExecutionEngine/JITLink/TableManager.h"
#include "llvm/Support/Endian.h"
namespace llvm::jitlink::ppc64 {
/// Represents ppc64 fixups and other ppc64-specific edge kinds.
enum EdgeKind_ppc64 : Edge::Kind {
Pointer64 = Edge::FirstRelocation,
Pointer32,
Delta64,
Delta32,
NegDelta32,
Delta16,
Delta16HA,
Delta16LO,
TOCDelta16HA,
TOCDelta16LO,
TOCDelta16DS,
TOCDelta16LODS,
CallBranchDelta,
// Need to restore r2 after the bl, suggesting the bl is followed by a nop.
CallBranchDeltaRestoreTOC,
// Need PLT call stub using TOC, TOC pointer is not saved before branching.
RequestPLTCallStub,
// Need PLT call stub using TOC, TOC pointer is saved before branching.
RequestPLTCallStubSaveTOC,
// Need PLT call stub without using TOC.
RequestPLTCallStubNoTOC,
};
enum PLTCallStubKind {
LongBranch,
LongBranchSaveR2,
LongBranchNoTOC,
};
extern const char NullPointerContent[8];
extern const char PointerJumpStubContent_big[20];
extern const char PointerJumpStubContent_little[20];
extern const char PointerJumpStubNoTOCContent_big[32];
extern const char PointerJumpStubNoTOCContent_little[32];
struct PLTCallStubReloc {
Edge::Kind K;
size_t Offset;
Edge::AddendT A;
};
struct PLTCallStubInfo {
ArrayRef<char> Content;
SmallVector<PLTCallStubReloc, 2> Relocs;
};
template <support::endianness Endianness>
inline PLTCallStubInfo pickStub(PLTCallStubKind StubKind) {
constexpr bool isLE = Endianness == support::endianness::little;
switch (StubKind) {
case LongBranch: {
ArrayRef<char> Content =
isLE ? PointerJumpStubContent_little : PointerJumpStubContent_big;
// Skip save r2.
Content = Content.slice(4);
return PLTCallStubInfo{
Content,
{{TOCDelta16HA, 0, 0}, {TOCDelta16LO, 4, 0}},
};
}
case LongBranchSaveR2: {
ArrayRef<char> Content =
isLE ? PointerJumpStubContent_little : PointerJumpStubContent_big;
return PLTCallStubInfo{
Content,
{{TOCDelta16HA, 4, 0}, {TOCDelta16LO, 8, 0}},
};
}
case LongBranchNoTOC: {
ArrayRef<char> Content = isLE ? PointerJumpStubNoTOCContent_little
: PointerJumpStubNoTOCContent_big;
return PLTCallStubInfo{
Content,
{{Delta16HA, 16, 8}, {Delta16LO, 20, 12}},
};
}
}
llvm_unreachable("Unknown PLTCallStubKind enum");
}
inline Symbol &createAnonymousPointer(LinkGraph &G, Section &PointerSection,
Symbol *InitialTarget = nullptr,
uint64_t InitialAddend = 0) {
assert(G.getPointerSize() == sizeof(NullPointerContent) &&
"LinkGraph's pointer size should be consistent with size of "
"NullPointerContent");
Block &B = G.createContentBlock(PointerSection, NullPointerContent,
orc::ExecutorAddr(), G.getPointerSize(), 0);
if (InitialTarget)
B.addEdge(Pointer64, 0, *InitialTarget, InitialAddend);
return G.addAnonymousSymbol(B, 0, G.getPointerSize(), false, false);
}
template <support::endianness Endianness>
inline Symbol &createAnonymousPointerJumpStub(LinkGraph &G,
Section &StubSection,
Symbol &PointerSymbol,
PLTCallStubKind StubKind) {
PLTCallStubInfo StubInfo = pickStub<Endianness>(StubKind);
Block &B = G.createContentBlock(StubSection, StubInfo.Content,
orc::ExecutorAddr(), 4, 0);
for (auto const &Reloc : StubInfo.Relocs)
B.addEdge(Reloc.K, Reloc.Offset, PointerSymbol, Reloc.A);
return G.addAnonymousSymbol(B, 0, StubInfo.Content.size(), true, false);
}
template <support::endianness Endianness>
class TOCTableManager : public TableManager<TOCTableManager<Endianness>> {
public:
// FIXME: `llvm-jitlink -check` relies this name to be $__GOT.
static StringRef getSectionName() { return "$__GOT"; }
bool visitEdge(LinkGraph &G, Block *B, Edge &E) {
Edge::Kind K = E.getKind();
switch (K) {
case TOCDelta16HA:
case TOCDelta16LO:
case TOCDelta16DS:
case TOCDelta16LODS:
case CallBranchDeltaRestoreTOC:
case RequestPLTCallStub:
case RequestPLTCallStubSaveTOC:
// Create TOC section if TOC relocation, PLT or GOT is used.
getOrCreateTOCSection(G);
return false;
default:
return false;
}
}
Symbol &createEntry(LinkGraph &G, Symbol &Target) {
return createAnonymousPointer(G, getOrCreateTOCSection(G), &Target);
}
private:
Section &getOrCreateTOCSection(LinkGraph &G) {
TOCSection = G.findSectionByName(getSectionName());
if (!TOCSection)
TOCSection = &G.createSection(getSectionName(), orc::MemProt::Read);
return *TOCSection;
}
Section *TOCSection = nullptr;
};
template <support::endianness Endianness>
class PLTTableManager : public TableManager<PLTTableManager<Endianness>> {
public:
PLTTableManager(TOCTableManager<Endianness> &TOC) : TOC(TOC) {}
static StringRef getSectionName() { return "$__STUBS"; }
bool visitEdge(LinkGraph &G, Block *B, Edge &E) {
Edge::Kind K = E.getKind();
if (K == ppc64::RequestPLTCallStubSaveTOC && E.getTarget().isExternal()) {
E.setKind(ppc64::CallBranchDeltaRestoreTOC);
this->StubKind = LongBranchSaveR2;
E.setTarget(this->getEntryForTarget(G, E.getTarget()));
return true;
}
if (K == ppc64::RequestPLTCallStubNoTOC && E.getTarget().isExternal()) {
E.setKind(ppc64::CallBranchDelta);
this->StubKind = LongBranchNoTOC;
E.setTarget(this->getEntryForTarget(G, E.getTarget()));
return true;
}
return false;
}
Symbol &createEntry(LinkGraph &G, Symbol &Target) {
return createAnonymousPointerJumpStub<Endianness>(
G, getOrCreateStubsSection(G), TOC.getEntryForTarget(G, Target),
this->StubKind);
}
private:
Section &getOrCreateStubsSection(LinkGraph &G) {
PLTSection = G.findSectionByName(getSectionName());
if (!PLTSection)
PLTSection = &G.createSection(getSectionName(),
orc::MemProt::Read | orc::MemProt::Exec);
return *PLTSection;
}
TOCTableManager<Endianness> &TOC;
Section *PLTSection = nullptr;
PLTCallStubKind StubKind;
};
/// Returns a string name for the given ppc64 edge. For debugging purposes
/// only.
const char *getEdgeKindName(Edge::Kind K);
inline static uint16_t ha16(uint64_t x) { return (x + 0x8000) >> 16; }
inline static uint16_t lo16(uint64_t x) { return x & 0xffff; }
/// Apply fixup expression for edge to block content.
template <support::endianness Endianness>
inline Error applyFixup(LinkGraph &G, Block &B, const Edge &E,
const Symbol *TOCSymbol) {
char *BlockWorkingMem = B.getAlreadyMutableContent().data();
char *FixupPtr = BlockWorkingMem + E.getOffset();
orc::ExecutorAddr FixupAddress = B.getAddress() + E.getOffset();
int64_t S = E.getTarget().getAddress().getValue();
int64_t A = E.getAddend();
int64_t P = FixupAddress.getValue();
int64_t TOCBase = TOCSymbol ? TOCSymbol->getAddress().getValue() : 0;
Edge::Kind K = E.getKind();
DEBUG_WITH_TYPE("jitlink", {
dbgs() << " Applying fixup on " << G.getEdgeKindName(K)
<< " edge, (S, A, P, .TOC.) = (" << formatv("{0:x}", S) << ", "
<< formatv("{0:x}", A) << ", " << formatv("{0:x}", P) << ", "
<< formatv("{0:x}", TOCBase) << ")\n";
});
switch (K) {
case Pointer64: {
uint64_t Value = S + A;
support::endian::write64<Endianness>(FixupPtr, Value);
break;
}
case Delta16HA:
case Delta16LO: {
int64_t Value = S + A - P;
if (LLVM_UNLIKELY(!isInt<32>(Value))) {
return makeTargetOutOfRangeError(G, B, E);
}
if (K == Delta16LO)
support::endian::write16<Endianness>(FixupPtr, lo16(Value));
else
support::endian::write16<Endianness>(FixupPtr, ha16(Value));
break;
}
case TOCDelta16HA:
case TOCDelta16LO: {
int64_t Value = S + A - TOCBase;
if (LLVM_UNLIKELY(!isInt<32>(Value))) {
return makeTargetOutOfRangeError(G, B, E);
}
if (K == TOCDelta16LO)
support::endian::write16<Endianness>(FixupPtr, lo16(Value));
else
support::endian::write16<Endianness>(FixupPtr, ha16(Value));
break;
}
case TOCDelta16DS:
case TOCDelta16LODS: {
int64_t Value = S + A - TOCBase;
if (LLVM_UNLIKELY(!isInt<32>(Value))) {
return makeTargetOutOfRangeError(G, B, E);
}
if (K == TOCDelta16LODS)
support::endian::write16<Endianness>(FixupPtr, lo16(Value) & ~3);
else
support::endian::write16<Endianness>(FixupPtr, Value & ~3);
break;
}
case CallBranchDeltaRestoreTOC:
case CallBranchDelta: {
int64_t Value = S + A - P;
if (LLVM_UNLIKELY(!isInt<26>(Value))) {
return makeTargetOutOfRangeError(G, B, E);
}
uint32_t Inst = support::endian::read32<Endianness>(FixupPtr);
support::endian::write32<Endianness>(FixupPtr, (Inst & 0xfc000003) |
(Value & 0x03fffffc));
if (K == CallBranchDeltaRestoreTOC) {
uint32_t NopInst = support::endian::read32<Endianness>(FixupPtr + 4);
assert(NopInst == 0x60000000 &&
"NOP should be placed here for restoring r2");
(void)NopInst;
// Restore r2 by instruction 0xe8410018 which is `ld r2, 24(r1)`.
support::endian::write32<Endianness>(FixupPtr + 4, 0xe8410018);
}
break;
}
case Delta64: {
int64_t Value = S + A - P;
support::endian::write64<Endianness>(FixupPtr, Value);
break;
}
case Delta32: {
int64_t Value = S + A - P;
if (LLVM_UNLIKELY(!isInt<32>(Value))) {
return makeTargetOutOfRangeError(G, B, E);
}
support::endian::write32<Endianness>(FixupPtr, Value);
break;
}
case NegDelta32: {
int64_t Value = P - S + A;
if (LLVM_UNLIKELY(!isInt<32>(Value))) {
return makeTargetOutOfRangeError(G, B, E);
}
support::endian::write32<Endianness>(FixupPtr, Value);
break;
}
default:
return make_error<JITLinkError>(
"In graph " + G.getName() + ", section " + B.getSection().getName() +
" unsupported edge kind " + getEdgeKindName(E.getKind()));
}
return Error::success();
}
} // end namespace llvm::jitlink::ppc64
#endif // LLVM_EXECUTIONENGINE_JITLINK_PPC64_H
PK iwFZ�ۛK(i (i ! ExecutionEngine/JITLink/aarch64.hnu �[��� //=== aarch64.h - Generic JITLink aarch64 edge kinds, utilities -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Generic utilities for graphs representing aarch64 objects.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_AARCH64_H
#define LLVM_EXECUTIONENGINE_JITLINK_AARCH64_H
#include "TableManager.h"
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
#include "llvm/ExecutionEngine/Orc/Shared/MemoryFlags.h"
namespace llvm {
namespace jitlink {
namespace aarch64 {
/// Represents aarch64 fixups and other aarch64-specific edge kinds.
enum EdgeKind_aarch64 : Edge::Kind {
/// A plain 64-bit pointer value relocation.
///
/// Fixup expression:
/// Fixup <- Target + Addend : uint64
///
Pointer64 = Edge::FirstRelocation,
/// A plain 32-bit pointer value relocation.
///
/// Fixup expression:
/// Fixup <- Target + Addend : uint32
///
/// Errors:
/// - The target must reside in the low 32-bits of the address space,
/// otherwise an out-of-range error will be returned.
///
Pointer32,
/// A 64-bit delta.
///
/// Delta from the fixup to the target.
///
/// Fixup expression:
/// Fixup <- Target - Fixup + Addend : int64
///
Delta64,
/// A 32-bit delta.
///
/// Delta from the fixup to the target.
///
/// Fixup expression:
/// Fixup <- Target - Fixup + Addend : int64
///
/// Errors:
/// - The result of the fixup expression must fit into an int32, otherwise
/// an out-of-range error will be returned.
///
Delta32,
/// A 64-bit negative delta.
///
/// Delta from target back to the fixup.
///
/// Fixup expression:
/// Fixup <- Fixup - Target + Addend : int64
///
NegDelta64,
/// A 32-bit negative delta.
///
/// Delta from the target back to the fixup.
///
/// Fixup expression:
/// Fixup <- Fixup - Target + Addend : int32
///
/// Errors:
/// - The result of the fixup expression must fit into an int32, otherwise
/// an out-of-range error will be returned.
NegDelta32,
/// A 26-bit PC-relative branch.
///
/// Represents a PC-relative call or branch to a target within +/-128Mb. The
/// target must be 32-bit aligned.
///
/// Fixup expression:
/// Fixup <- (Target - Fixup + Addend) >> 2 : int26
///
/// Notes:
/// The '26' in the name refers to the number operand bits and follows the
/// naming convention used by the corresponding ELF and MachO relocations.
/// Since the low two bits must be zero (because of the 32-bit alignment of
/// the target) the operand is effectively a signed 28-bit number.
///
///
/// Errors:
/// - The result of the unshifted part of the fixup expression must be
/// 32-bit aligned otherwise an alignment error will be returned.
/// - The result of the fixup expression must fit into an int26 otherwise an
/// out-of-range error will be returned.
Branch26PCRel,
/// A 14-bit PC-relative test and branch.
///
/// Represents a PC-relative test and branch to a target within +/-32Kb. The
/// target must be 32-bit aligned.
///
/// Fixup expression:
/// Fixup <- (Target - Fixup + Addend) >> 2 : int14
///
/// Notes:
/// The '14' in the name refers to the number operand bits and follows the
/// naming convention used by the corresponding ELF relocation.
/// Since the low two bits must be zero (because of the 32-bit alignment of
/// the target) the operand is effectively a signed 16-bit number.
///
///
/// Errors:
/// - The result of the unshifted part of the fixup expression must be
/// 32-bit aligned otherwise an alignment error will be returned.
/// - The result of the fixup expression must fit into an int14 otherwise an
/// out-of-range error will be returned.
TestAndBranch14PCRel,
/// A 19-bit PC-relative conditional branch.
///
/// Represents a PC-relative conditional branch to a target within +/-1Mb. The
/// target must be 32-bit aligned.
///
/// Fixup expression:
/// Fixup <- (Target - Fixup + Addend) >> 2 : int19
///
/// Notes:
/// The '19' in the name refers to the number operand bits and follows the
/// naming convention used by the corresponding ELF relocation.
/// Since the low two bits must be zero (because of the 32-bit alignment of
/// the target) the operand is effectively a signed 21-bit number.
///
///
/// Errors:
/// - The result of the unshifted part of the fixup expression must be
/// 32-bit aligned otherwise an alignment error will be returned.
/// - The result of the fixup expression must fit into an int19 otherwise an
/// out-of-range error will be returned.
CondBranch19PCRel,
/// A 16-bit slice of the target address (which slice depends on the
/// instruction at the fixup location).
///
/// Used to fix up MOVK/MOVN/MOVZ instructions.
///
/// Fixup expression:
///
/// Fixup <- (Target + Addend) >> Shift : uint16
///
/// where Shift is encoded in the instruction at the fixup location.
///
MoveWide16,
/// The signed 21-bit delta from the fixup to the target.
///
/// Typically used to load a pointers at a PC-relative offset of +/- 1Mb. The
/// target must be 32-bit aligned.
///
/// Fixup expression:
///
/// Fixup <- (Target - Fixup) >> 2 : int19
///
/// Errors:
/// - The result of the unshifted part of the fixup expression must be
/// 32-bit aligned otherwise an alignment error will be returned.
/// - The result of the fixup expression must fit into an an int19 or an
/// out-of-range error will be returned.
LDRLiteral19,
/// The signed 21-bit delta from the fixup to the target.
///
/// Fixup expression:
///
/// Fixup <- Target - Fixup + Addend : int21
///
/// Notes:
/// For ADR fixups.
///
/// Errors:
/// - The result of the fixup expression must fit into an int21 otherwise an
/// out-of-range error will be returned.
ADRLiteral21,
/// The signed 21-bit delta from the fixup page to the page containing the
/// target.
///
/// Fixup expression:
///
/// Fixup <- (((Target + Addend) & ~0xfff) - (Fixup & ~0xfff)) >> 12 : int21
///
/// Notes:
/// For ADRP fixups.
///
/// Errors:
/// - The result of the fixup expression must fit into an int21 otherwise an
/// out-of-range error will be returned.
Page21,
/// The 12-bit (potentially shifted) offset of the target within its page.
///
/// Typically used to fix up LDR immediates.
///
/// Fixup expression:
///
/// Fixup <- ((Target + Addend) >> Shift) & 0xfff : uint12
///
/// where Shift is encoded in the size field of the instruction.
///
/// Errors:
/// - The result of the unshifted part of the fixup expression must be
/// aligned otherwise an alignment error will be returned.
/// - The result of the fixup expression must fit into a uint12 otherwise an
/// out-of-range error will be returned.
PageOffset12,
/// A GOT entry getter/constructor, transformed to Page21 pointing at the GOT
/// entry for the original target.
///
/// Indicates that this edge should be transformed into a Page21 targeting
/// the GOT entry for the edge's current target, maintaining the same addend.
/// A GOT entry for the target should be created if one does not already
/// exist.
///
/// Edges of this kind are usually handled by a GOT builder pass inserted by
/// default.
///
/// Fixup expression:
/// NONE
///
/// Errors:
/// - *ASSERTION* Failure to handle edges of this kind prior to the fixup
/// phase will result in an assert/unreachable during the fixup phase.
///
RequestGOTAndTransformToPage21,
/// A GOT entry getter/constructor, transformed to Pageoffset12 pointing at
/// the GOT entry for the original target.
///
/// Indicates that this edge should be transformed into a PageOffset12
/// targeting the GOT entry for the edge's current target, maintaining the
/// same addend. A GOT entry for the target should be created if one does not
/// already exist.
///
/// Edges of this kind are usually handled by a GOT builder pass inserted by
/// default.
///
/// Fixup expression:
/// NONE
///
/// Errors:
/// - *ASSERTION* Failure to handle edges of this kind prior to the fixup
/// phase will result in an assert/unreachable during the fixup phase.
///
RequestGOTAndTransformToPageOffset12,
/// A GOT entry getter/constructor, transformed to Delta32 pointing at the GOT
/// entry for the original target.
///
/// Indicates that this edge should be transformed into a Delta32/ targeting
/// the GOT entry for the edge's current target, maintaining the same addend.
/// A GOT entry for the target should be created if one does not already
/// exist.
///
/// Edges of this kind are usually handled by a GOT builder pass inserted by
/// default.
///
/// Fixup expression:
/// NONE
///
/// Errors:
/// - *ASSERTION* Failure to handle edges of this kind prior to the fixup
/// phase will result in an assert/unreachable during the fixup phase.
///
RequestGOTAndTransformToDelta32,
/// A TLVP entry getter/constructor, transformed to Page21.
///
/// Indicates that this edge should be transformed into a Page21 targeting the
/// TLVP entry for the edge's current target. A TLVP entry for the target
/// should be created if one does not already exist.
///
/// Fixup expression:
/// NONE
///
/// Errors:
/// - *ASSERTION* Failure to handle edges of this kind prior to the fixup
/// phase will result in an assert/unreachable during the fixup phase.
///
RequestTLVPAndTransformToPage21,
/// A TLVP entry getter/constructor, transformed to PageOffset12.
///
/// Indicates that this edge should be transformed into a PageOffset12
/// targeting the TLVP entry for the edge's current target. A TLVP entry for
/// the target should be created if one does not already exist.
///
/// Fixup expression:
/// NONE
///
/// Errors:
/// - *ASSERTION* Failure to handle edges of this kind prior to the fixup
/// phase will result in an assert/unreachable during the fixup phase.
///
RequestTLVPAndTransformToPageOffset12,
/// A TLSDesc entry getter/constructor, transformed to Page21.
///
/// Indicates that this edge should be transformed into a Page21 targeting the
/// TLSDesc entry for the edge's current target. A TLSDesc entry for the
/// target should be created if one does not already exist.
///
/// Fixup expression:
/// NONE
///
/// Errors:
/// - *ASSERTION* Failure to handle edges of this kind prior to the fixup
/// phase will result in an assert/unreachable during the fixup phase.
///
RequestTLSDescEntryAndTransformToPage21,
/// A TLSDesc entry getter/constructor, transformed to PageOffset12.
///
/// Indicates that this edge should be transformed into a PageOffset12
/// targeting the TLSDesc entry for the edge's current target. A TLSDesc entry
/// for the target should be created if one does not already exist.
///
/// Fixup expression:
/// NONE
///
/// Errors:
/// - *ASSERTION* Failure to handle edges of this kind prior to the fixup
/// phase will result in an assert/unreachable during the fixup phase.
///
RequestTLSDescEntryAndTransformToPageOffset12,
};
/// Returns a string name for the given aarch64 edge. For debugging purposes
/// only
const char *getEdgeKindName(Edge::Kind K);
// Returns whether the Instr is LD/ST (imm12)
inline bool isLoadStoreImm12(uint32_t Instr) {
constexpr uint32_t LoadStoreImm12Mask = 0x3b000000;
return (Instr & LoadStoreImm12Mask) == 0x39000000;
}
inline bool isTestAndBranchImm14(uint32_t Instr) {
constexpr uint32_t TestAndBranchImm14Mask = 0x7e000000;
return (Instr & TestAndBranchImm14Mask) == 0x36000000;
}
inline bool isCondBranchImm19(uint32_t Instr) {
constexpr uint32_t CondBranchImm19Mask = 0xfe000000;
return (Instr & CondBranchImm19Mask) == 0x54000000;
}
inline bool isCompAndBranchImm19(uint32_t Instr) {
constexpr uint32_t CompAndBranchImm19Mask = 0x7e000000;
return (Instr & CompAndBranchImm19Mask) == 0x34000000;
}
inline bool isADR(uint32_t Instr) {
constexpr uint32_t ADRMask = 0x9f000000;
return (Instr & ADRMask) == 0x10000000;
}
// Returns the amount the address operand of LD/ST (imm12)
// should be shifted right by.
//
// The shift value varies by the data size of LD/ST instruction.
// For instance, LDH instructoin needs the address to be shifted
// right by 1.
inline unsigned getPageOffset12Shift(uint32_t Instr) {
constexpr uint32_t Vec128Mask = 0x04800000;
if (isLoadStoreImm12(Instr)) {
uint32_t ImplicitShift = Instr >> 30;
if (ImplicitShift == 0)
if ((Instr & Vec128Mask) == Vec128Mask)
ImplicitShift = 4;
return ImplicitShift;
}
return 0;
}
// Returns whether the Instr is MOVK/MOVZ (imm16) with a zero immediate field
inline bool isMoveWideImm16(uint32_t Instr) {
constexpr uint32_t MoveWideImm16Mask = 0x5f9fffe0;
return (Instr & MoveWideImm16Mask) == 0x52800000;
}
// Returns the amount the address operand of MOVK/MOVZ (imm16)
// should be shifted right by.
//
// The shift value is specfied in the assembly as LSL #<shift>.
inline unsigned getMoveWide16Shift(uint32_t Instr) {
if (isMoveWideImm16(Instr)) {
uint32_t ImplicitShift = (Instr >> 21) & 0b11;
return ImplicitShift << 4;
}
return 0;
}
/// Apply fixup expression for edge to block content.
inline Error applyFixup(LinkGraph &G, Block &B, const Edge &E) {
using namespace support;
char *BlockWorkingMem = B.getAlreadyMutableContent().data();
char *FixupPtr = BlockWorkingMem + E.getOffset();
orc::ExecutorAddr FixupAddress = B.getAddress() + E.getOffset();
switch (E.getKind()) {
case Pointer64: {
uint64_t Value = E.getTarget().getAddress().getValue() + E.getAddend();
*(ulittle64_t *)FixupPtr = Value;
break;
}
case Pointer32: {
uint64_t Value = E.getTarget().getAddress().getValue() + E.getAddend();
if (Value > std::numeric_limits<uint32_t>::max())
return makeTargetOutOfRangeError(G, B, E);
*(ulittle32_t *)FixupPtr = Value;
break;
}
case Delta32:
case Delta64:
case NegDelta32:
case NegDelta64: {
int64_t Value;
if (E.getKind() == Delta32 || E.getKind() == Delta64)
Value = E.getTarget().getAddress() - FixupAddress + E.getAddend();
else
Value = FixupAddress - E.getTarget().getAddress() + E.getAddend();
if (E.getKind() == Delta32 || E.getKind() == NegDelta32) {
if (Value < std::numeric_limits<int32_t>::min() ||
Value > std::numeric_limits<int32_t>::max())
return makeTargetOutOfRangeError(G, B, E);
*(little32_t *)FixupPtr = Value;
} else
*(little64_t *)FixupPtr = Value;
break;
}
case Branch26PCRel: {
assert((FixupAddress.getValue() & 0x3) == 0 &&
"Branch-inst is not 32-bit aligned");
int64_t Value = E.getTarget().getAddress() - FixupAddress + E.getAddend();
if (static_cast<uint64_t>(Value) & 0x3)
return make_error<JITLinkError>("BranchPCRel26 target is not 32-bit "
"aligned");
if (Value < -(1 << 27) || Value > ((1 << 27) - 1))
return makeTargetOutOfRangeError(G, B, E);
uint32_t RawInstr = *(little32_t *)FixupPtr;
assert((RawInstr & 0x7fffffff) == 0x14000000 &&
"RawInstr isn't a B or BR immediate instruction");
uint32_t Imm = (static_cast<uint32_t>(Value) & ((1 << 28) - 1)) >> 2;
uint32_t FixedInstr = RawInstr | Imm;
*(little32_t *)FixupPtr = FixedInstr;
break;
}
case MoveWide16: {
uint64_t TargetOffset =
(E.getTarget().getAddress() + E.getAddend()).getValue();
uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
assert(isMoveWideImm16(RawInstr) &&
"RawInstr isn't a MOVK/MOVZ instruction");
unsigned ImmShift = getMoveWide16Shift(RawInstr);
uint32_t Imm = (TargetOffset >> ImmShift) & 0xffff;
uint32_t FixedInstr = RawInstr | (Imm << 5);
*(ulittle32_t *)FixupPtr = FixedInstr;
break;
}
case LDRLiteral19: {
assert((FixupAddress.getValue() & 0x3) == 0 && "LDR is not 32-bit aligned");
assert(E.getAddend() == 0 && "LDRLiteral19 with non-zero addend");
uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
assert(RawInstr == 0x58000010 && "RawInstr isn't a 64-bit LDR literal");
int64_t Delta = E.getTarget().getAddress() - FixupAddress;
if (Delta & 0x3)
return make_error<JITLinkError>("LDR literal target is not 32-bit "
"aligned");
if (Delta < -(1 << 20) || Delta > ((1 << 20) - 1))
return makeTargetOutOfRangeError(G, B, E);
uint32_t EncodedImm = ((static_cast<uint32_t>(Delta) >> 2) & 0x7ffff) << 5;
uint32_t FixedInstr = RawInstr | EncodedImm;
*(ulittle32_t *)FixupPtr = FixedInstr;
break;
}
case ADRLiteral21: {
assert((FixupAddress.getValue() & 0x3) == 0 && "ADR is not 32-bit aligned");
uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
assert(isADR(RawInstr) && "RawInstr is not an ADR");
int64_t Delta = E.getTarget().getAddress() + E.getAddend() - FixupAddress;
if (!isInt<21>(Delta))
return makeTargetOutOfRangeError(G, B, E);
auto UDelta = static_cast<uint32_t>(Delta);
uint32_t EncodedImmHi = ((UDelta >> 2) & 0x7ffff) << 5;
uint32_t EncodedImmLo = (UDelta & 0x3) << 29;
uint32_t FixedInstr = RawInstr | EncodedImmHi | EncodedImmLo;
*(ulittle32_t *)FixupPtr = FixedInstr;
break;
}
case TestAndBranch14PCRel: {
assert((FixupAddress.getValue() & 0x3) == 0 &&
"Test and branch is not 32-bit aligned");
uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
assert(isTestAndBranchImm14(RawInstr) &&
"RawInstr is not a test and branch");
int64_t Delta = E.getTarget().getAddress() + E.getAddend() - FixupAddress;
if (Delta & 0x3)
return make_error<JITLinkError>(
"Test and branch literal target is not 32-bit aligned");
if (!isInt<16>(Delta))
return makeTargetOutOfRangeError(G, B, E);
uint32_t EncodedImm = ((static_cast<uint32_t>(Delta) >> 2) & 0x3fff) << 5;
uint32_t FixedInstr = RawInstr | EncodedImm;
*(ulittle32_t *)FixupPtr = FixedInstr;
break;
}
case CondBranch19PCRel: {
assert((FixupAddress.getValue() & 0x3) == 0 &&
"Conditional branch is not 32-bit aligned");
uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
assert((isCondBranchImm19(RawInstr) || isCompAndBranchImm19(RawInstr)) &&
"RawInstr is not a conditional branch");
int64_t Delta = E.getTarget().getAddress() + E.getAddend() - FixupAddress;
if (Delta & 0x3)
return make_error<JITLinkError>(
"Conditional branch literal target is not 32-bit "
"aligned");
if (!isInt<21>(Delta))
return makeTargetOutOfRangeError(G, B, E);
uint32_t EncodedImm = ((static_cast<uint32_t>(Delta) >> 2) & 0x7ffff) << 5;
uint32_t FixedInstr = RawInstr | EncodedImm;
*(ulittle32_t *)FixupPtr = FixedInstr;
break;
}
case Page21: {
uint64_t TargetPage =
(E.getTarget().getAddress().getValue() + E.getAddend()) &
~static_cast<uint64_t>(4096 - 1);
uint64_t PCPage =
FixupAddress.getValue() & ~static_cast<uint64_t>(4096 - 1);
int64_t PageDelta = TargetPage - PCPage;
if (!isInt<33>(PageDelta))
return makeTargetOutOfRangeError(G, B, E);
uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
assert((RawInstr & 0xffffffe0) == 0x90000000 &&
"RawInstr isn't an ADRP instruction");
uint32_t ImmLo = (static_cast<uint64_t>(PageDelta) >> 12) & 0x3;
uint32_t ImmHi = (static_cast<uint64_t>(PageDelta) >> 14) & 0x7ffff;
uint32_t FixedInstr = RawInstr | (ImmLo << 29) | (ImmHi << 5);
*(ulittle32_t *)FixupPtr = FixedInstr;
break;
}
case PageOffset12: {
uint64_t TargetOffset =
(E.getTarget().getAddress() + E.getAddend()).getValue() & 0xfff;
uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
unsigned ImmShift = getPageOffset12Shift(RawInstr);
if (TargetOffset & ((1 << ImmShift) - 1))
return make_error<JITLinkError>("PAGEOFF12 target is not aligned");
uint32_t EncodedImm = (TargetOffset >> ImmShift) << 10;
uint32_t FixedInstr = RawInstr | EncodedImm;
*(ulittle32_t *)FixupPtr = FixedInstr;
break;
}
default:
return make_error<JITLinkError>(
"In graph " + G.getName() + ", section " + B.getSection().getName() +
" unsupported edge kind " + getEdgeKindName(E.getKind()));
}
return Error::success();
}
/// aarch64 pointer size.
constexpr uint64_t PointerSize = 8;
/// AArch64 null pointer content.
extern const char NullPointerContent[PointerSize];
/// AArch64 pointer jump stub content.
///
/// Contains the instruction sequence for an indirect jump via an in-memory
/// pointer:
/// ADRP x16, ptr@page21
/// LDR x16, [x16, ptr@pageoff12]
/// BR x16
extern const char PointerJumpStubContent[12];
/// Creates a new pointer block in the given section and returns an
/// Anonymous symobl pointing to it.
///
/// If InitialTarget is given then an Pointer64 relocation will be added to the
/// block pointing at InitialTarget.
///
/// The pointer block will have the following default values:
/// alignment: 64-bit
/// alignment-offset: 0
/// address: highest allowable (~7U)
inline Symbol &createAnonymousPointer(LinkGraph &G, Section &PointerSection,
Symbol *InitialTarget = nullptr,
uint64_t InitialAddend = 0) {
auto &B = G.createContentBlock(PointerSection, NullPointerContent,
orc::ExecutorAddr(~uint64_t(7)), 8, 0);
if (InitialTarget)
B.addEdge(Pointer64, 0, *InitialTarget, InitialAddend);
return G.addAnonymousSymbol(B, 0, 8, false, false);
}
/// Create a jump stub block that jumps via the pointer at the given symbol.
///
/// The stub block will have the following default values:
/// alignment: 32-bit
/// alignment-offset: 0
/// address: highest allowable: (~11U)
inline Block &createPointerJumpStubBlock(LinkGraph &G, Section &StubSection,
Symbol &PointerSymbol) {
auto &B = G.createContentBlock(StubSection, PointerJumpStubContent,
orc::ExecutorAddr(~uint64_t(11)), 1, 0);
B.addEdge(Page21, 0, PointerSymbol, 0);
B.addEdge(PageOffset12, 4, PointerSymbol, 0);
return B;
}
/// Create a jump stub that jumps via the pointer at the given symbol and
/// an anonymous symbol pointing to it. Return the anonymous symbol.
///
/// The stub block will be created by createPointerJumpStubBlock.
inline Symbol &createAnonymousPointerJumpStub(LinkGraph &G,
Section &StubSection,
Symbol &PointerSymbol) {
return G.addAnonymousSymbol(
createPointerJumpStubBlock(G, StubSection, PointerSymbol), 0,
sizeof(PointerJumpStubContent), true, false);
}
/// Global Offset Table Builder.
class GOTTableManager : public TableManager<GOTTableManager> {
public:
static StringRef getSectionName() { return "$__GOT"; }
bool visitEdge(LinkGraph &G, Block *B, Edge &E) {
Edge::Kind KindToSet = Edge::Invalid;
const char *BlockWorkingMem = B->getContent().data();
const char *FixupPtr = BlockWorkingMem + E.getOffset();
switch (E.getKind()) {
case aarch64::RequestGOTAndTransformToPage21:
case aarch64::RequestTLVPAndTransformToPage21: {
KindToSet = aarch64::Page21;
break;
}
case aarch64::RequestGOTAndTransformToPageOffset12:
case aarch64::RequestTLVPAndTransformToPageOffset12: {
KindToSet = aarch64::PageOffset12;
uint32_t RawInstr = *(const support::ulittle32_t *)FixupPtr;
(void)RawInstr;
assert(E.getAddend() == 0 &&
"GOTPageOffset12/TLVPageOffset12 with non-zero addend");
assert((RawInstr & 0xfffffc00) == 0xf9400000 &&
"RawInstr isn't a 64-bit LDR immediate");
break;
}
case aarch64::RequestGOTAndTransformToDelta32: {
KindToSet = aarch64::Delta32;
break;
}
default:
return false;
}
assert(KindToSet != Edge::Invalid &&
"Fell through switch, but no new kind to set");
DEBUG_WITH_TYPE("jitlink", {
dbgs() << " Fixing " << G.getEdgeKindName(E.getKind()) << " edge at "
<< B->getFixupAddress(E) << " (" << B->getAddress() << " + "
<< formatv("{0:x}", E.getOffset()) << ")\n";
});
E.setKind(KindToSet);
E.setTarget(getEntryForTarget(G, E.getTarget()));
return true;
}
Symbol &createEntry(LinkGraph &G, Symbol &Target) {
return createAnonymousPointer(G, getGOTSection(G), &Target);
}
private:
Section &getGOTSection(LinkGraph &G) {
if (!GOTSection)
GOTSection = &G.createSection(getSectionName(),
orc::MemProt::Read | orc::MemProt::Exec);
return *GOTSection;
}
Section *GOTSection = nullptr;
};
/// Procedure Linkage Table Builder.
class PLTTableManager : public TableManager<PLTTableManager> {
public:
PLTTableManager(GOTTableManager &GOT) : GOT(GOT) {}
static StringRef getSectionName() { return "$__STUBS"; }
bool visitEdge(LinkGraph &G, Block *B, Edge &E) {
if (E.getKind() == aarch64::Branch26PCRel && !E.getTarget().isDefined()) {
DEBUG_WITH_TYPE("jitlink", {
dbgs() << " Fixing " << G.getEdgeKindName(E.getKind()) << " edge at "
<< B->getFixupAddress(E) << " (" << B->getAddress() << " + "
<< formatv("{0:x}", E.getOffset()) << ")\n";
});
E.setTarget(getEntryForTarget(G, E.getTarget()));
return true;
}
return false;
}
Symbol &createEntry(LinkGraph &G, Symbol &Target) {
return createAnonymousPointerJumpStub(G, getStubsSection(G),
GOT.getEntryForTarget(G, Target));
}
public:
Section &getStubsSection(LinkGraph &G) {
if (!StubsSection)
StubsSection = &G.createSection(getSectionName(),
orc::MemProt::Read | orc::MemProt::Exec);
return *StubsSection;
}
GOTTableManager &GOT;
Section *StubsSection = nullptr;
};
} // namespace aarch64
} // namespace jitlink
} // namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_AARCH64_H
PK iwFZ�ZЄ� � % ExecutionEngine/JITLink/ELF_aarch64.hnu �[��� //===--- ELF_aarch64.h - JIT link functions for ELF/aarch64 --*- C++ -*----===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
//===----------------------------------------------------------------------===//
//
// jit-link functions for ELF/aarch64.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_ELF_AARCH64_H
#define LLVM_EXECUTIONENGINE_JITLINK_ELF_AARCH64_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
namespace llvm {
namespace jitlink {
/// Create a LinkGraph from an ELF/aarch64 relocatable object
///
/// Note: The graph does not take ownership of the underlying buffer, nor copy
/// its contents. The caller is responsible for ensuring that the object buffer
/// outlives the graph.
Expected<std::unique_ptr<LinkGraph>>
createLinkGraphFromELFObject_aarch64(MemoryBufferRef ObjectBuffer);
/// jit-link the given object buffer, which must be a ELF aarch64 relocatable
/// object file.
void link_ELF_aarch64(std::unique_ptr<LinkGraph> G,
std::unique_ptr<JITLinkContext> Ctx);
} // end namespace jitlink
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_ELF_AARCH64_H
PK iwFZ�i
��
�
& ExecutionEngine/JITLink/TableManager.hnu �[��� //===---------------------- TableManager.h ----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Fix edge for edge that needs an entry to reference the target symbol
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_TABLEMANAGER_H
#define LLVM_EXECUTIONENGINE_JITLINK_TABLEMANAGER_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
#include "llvm/Support/Debug.h"
namespace llvm {
namespace jitlink {
/// A CRTP base for tables that are built on demand, e.g. Global Offset Tables
/// and Procedure Linkage Tables.
/// The getEntyrForTarget function returns the table entry corresponding to the
/// given target, calling down to the implementation class to build an entry if
/// one does not already exist.
template <typename TableManagerImplT> class TableManager {
public:
/// Return the constructed entry
///
/// Use parameter G to construct the entry for target symbol
Symbol &getEntryForTarget(LinkGraph &G, Symbol &Target) {
assert(Target.hasName() && "Edge cannot point to anonymous target");
auto EntryI = Entries.find(Target.getName());
// Build the entry if it doesn't exist.
if (EntryI == Entries.end()) {
auto &Entry = impl().createEntry(G, Target);
DEBUG_WITH_TYPE("jitlink", {
dbgs() << " Created " << impl().getSectionName() << " entry for "
<< Target.getName() << ": " << Entry << "\n";
});
EntryI = Entries.insert(std::make_pair(Target.getName(), &Entry)).first;
}
assert(EntryI != Entries.end() && "Could not get entry symbol");
DEBUG_WITH_TYPE("jitlink", {
dbgs() << " Using " << impl().getSectionName() << " entry "
<< *EntryI->second << "\n";
});
return *EntryI->second;
}
/// Register a pre-existing entry.
///
/// Objects may include pre-existing table entries (e.g. for GOTs).
/// This method can be used to register those entries so that they will not
/// be duplicated by createEntry the first time that getEntryForTarget is
/// called.
bool registerPreExistingEntry(Symbol &Target, Symbol &Entry) {
assert(Target.hasName() && "Edge cannot point to anonymous target");
auto Res = Entries.insert({
Target.getName(),
&Entry,
});
return Res.second;
}
private:
TableManagerImplT &impl() { return static_cast<TableManagerImplT &>(*this); }
DenseMap<StringRef, Symbol *> Entries;
};
} // namespace jitlink
} // namespace llvm
#endif
PK iwFZ@�6I� � ' ExecutionEngine/JITLink/ELF_loongarch.hnu �[��� //===-- ELF_loongarch.h - JIT link functions for ELF/loongarch -*- C++ -*--===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
//===----------------------------------------------------------------------===//
//
// jit-link functions for ELF/loongarch.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_ELF_LOONGARCH_H
#define LLVM_EXECUTIONENGINE_JITLINK_ELF_LOONGARCH_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
namespace llvm {
namespace jitlink {
/// Create a LinkGraph from an ELF/loongarch relocatable object
///
/// Note: The graph does not take ownership of the underlying buffer, nor copy
/// its contents. The caller is responsible for ensuring that the object buffer
/// outlives the graph.
Expected<std::unique_ptr<LinkGraph>>
createLinkGraphFromELFObject_loongarch(MemoryBufferRef ObjectBuffer);
/// jit-link the given object buffer, which must be an ELF loongarch object
/// file.
void link_ELF_loongarch(std::unique_ptr<LinkGraph> G,
std::unique_ptr<JITLinkContext> Ctx);
} // end namespace jitlink
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_ELF_LOONGARCH_H
PK iwFZg pd{8 {8 . ExecutionEngine/JITLink/JITLinkMemoryManager.hnu �[��� //===-- JITLinkMemoryManager.h - JITLink mem manager interface --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Contains the JITLinkMemoryManager interface.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_JITLINKMEMORYMANAGER_H
#define LLVM_EXECUTIONENGINE_JITLINK_JITLINKMEMORYMANAGER_H
#include "llvm/ADT/FunctionExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ExecutionEngine/JITLink/JITLinkDylib.h"
#include "llvm/ExecutionEngine/Orc/Shared/AllocationActions.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include "llvm/ExecutionEngine/Orc/Shared/MemoryFlags.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MSVCErrorWorkarounds.h"
#include "llvm/Support/Memory.h"
#include "llvm/Support/RecyclingAllocator.h"
#include <cstdint>
#include <future>
#include <mutex>
namespace llvm {
namespace jitlink {
class Block;
class LinkGraph;
class Section;
/// Manages allocations of JIT memory.
///
/// Instances of this class may be accessed concurrently from multiple threads
/// and their implemetations should include any necessary synchronization.
class JITLinkMemoryManager {
public:
/// Represents a finalized allocation.
///
/// Finalized allocations must be passed to the
/// JITLinkMemoryManager:deallocate method prior to being destroyed.
///
/// The interpretation of the Address associated with the finalized allocation
/// is up to the memory manager implementation. Common options are using the
/// base address of the allocation, or the address of a memory management
/// object that tracks the allocation.
class FinalizedAlloc {
friend class JITLinkMemoryManager;
static constexpr auto InvalidAddr = ~uint64_t(0);
public:
FinalizedAlloc() = default;
explicit FinalizedAlloc(orc::ExecutorAddr A) : A(A) {
assert(A.getValue() != InvalidAddr &&
"Explicitly creating an invalid allocation?");
}
FinalizedAlloc(const FinalizedAlloc &) = delete;
FinalizedAlloc(FinalizedAlloc &&Other) : A(Other.A) {
Other.A.setValue(InvalidAddr);
}
FinalizedAlloc &operator=(const FinalizedAlloc &) = delete;
FinalizedAlloc &operator=(FinalizedAlloc &&Other) {
assert(A.getValue() == InvalidAddr &&
"Cannot overwrite active finalized allocation");
std::swap(A, Other.A);
return *this;
}
~FinalizedAlloc() {
assert(A.getValue() == InvalidAddr &&
"Finalized allocation was not deallocated");
}
/// FinalizedAllocs convert to false for default-constructed, and
/// true otherwise. Default-constructed allocs need not be deallocated.
explicit operator bool() const { return A.getValue() != InvalidAddr; }
/// Returns the address associated with this finalized allocation.
/// The allocation is unmodified.
orc::ExecutorAddr getAddress() const { return A; }
/// Returns the address associated with this finalized allocation and
/// resets this object to the default state.
/// This should only be used by allocators when deallocating memory.
orc::ExecutorAddr release() {
orc::ExecutorAddr Tmp = A;
A.setValue(InvalidAddr);
return Tmp;
}
private:
orc::ExecutorAddr A{InvalidAddr};
};
/// Represents an allocation which has not been finalized yet.
///
/// InFlightAllocs manage both executor memory allocations and working
/// memory allocations.
///
/// On finalization, the InFlightAlloc should transfer the content of
/// working memory into executor memory, apply memory protections, and
/// run any finalization functions.
///
/// Working memory should be kept alive at least until one of the following
/// happens: (1) the InFlightAlloc instance is destroyed, (2) the
/// InFlightAlloc is abandoned, (3) finalized target memory is destroyed.
///
/// If abandon is called then working memory and executor memory should both
/// be freed.
class InFlightAlloc {
public:
using OnFinalizedFunction = unique_function<void(Expected<FinalizedAlloc>)>;
using OnAbandonedFunction = unique_function<void(Error)>;
virtual ~InFlightAlloc();
/// Called prior to finalization if the allocation should be abandoned.
virtual void abandon(OnAbandonedFunction OnAbandoned) = 0;
/// Called to transfer working memory to the target and apply finalization.
virtual void finalize(OnFinalizedFunction OnFinalized) = 0;
/// Synchronous convenience version of finalize.
Expected<FinalizedAlloc> finalize() {
std::promise<MSVCPExpected<FinalizedAlloc>> FinalizeResultP;
auto FinalizeResultF = FinalizeResultP.get_future();
finalize([&](Expected<FinalizedAlloc> Result) {
FinalizeResultP.set_value(std::move(Result));
});
return FinalizeResultF.get();
}
};
/// Typedef for the argument to be passed to OnAllocatedFunction.
using AllocResult = Expected<std::unique_ptr<InFlightAlloc>>;
/// Called when allocation has been completed.
using OnAllocatedFunction = unique_function<void(AllocResult)>;
/// Called when deallocation has completed.
using OnDeallocatedFunction = unique_function<void(Error)>;
virtual ~JITLinkMemoryManager();
/// Start the allocation process.
///
/// If the initial allocation is successful then the OnAllocated function will
/// be called with a std::unique_ptr<InFlightAlloc> value. If the assocation
/// is unsuccessful then the OnAllocated function will be called with an
/// Error.
virtual void allocate(const JITLinkDylib *JD, LinkGraph &G,
OnAllocatedFunction OnAllocated) = 0;
/// Convenience function for blocking allocation.
AllocResult allocate(const JITLinkDylib *JD, LinkGraph &G) {
std::promise<MSVCPExpected<std::unique_ptr<InFlightAlloc>>> AllocResultP;
auto AllocResultF = AllocResultP.get_future();
allocate(JD, G, [&](AllocResult Alloc) {
AllocResultP.set_value(std::move(Alloc));
});
return AllocResultF.get();
}
/// Deallocate a list of allocation objects.
///
/// Dealloc actions will be run in reverse order (from the end of the vector
/// to the start).
virtual void deallocate(std::vector<FinalizedAlloc> Allocs,
OnDeallocatedFunction OnDeallocated) = 0;
/// Convenience function for deallocation of a single alloc.
void deallocate(FinalizedAlloc Alloc, OnDeallocatedFunction OnDeallocated) {
std::vector<FinalizedAlloc> Allocs;
Allocs.push_back(std::move(Alloc));
deallocate(std::move(Allocs), std::move(OnDeallocated));
}
/// Convenience function for blocking deallocation.
Error deallocate(std::vector<FinalizedAlloc> Allocs) {
std::promise<MSVCPError> DeallocResultP;
auto DeallocResultF = DeallocResultP.get_future();
deallocate(std::move(Allocs),
[&](Error Err) { DeallocResultP.set_value(std::move(Err)); });
return DeallocResultF.get();
}
/// Convenience function for blocking deallocation of a single alloc.
Error deallocate(FinalizedAlloc Alloc) {
std::vector<FinalizedAlloc> Allocs;
Allocs.push_back(std::move(Alloc));
return deallocate(std::move(Allocs));
}
};
/// BasicLayout simplifies the implementation of JITLinkMemoryManagers.
///
/// BasicLayout groups Sections into Segments based on their memory protection
/// and deallocation policies. JITLinkMemoryManagers can construct a BasicLayout
/// from a Graph, and then assign working memory and addresses to each of the
/// Segments. These addreses will be mapped back onto the Graph blocks in
/// the apply method.
class BasicLayout {
public:
/// The Alignment, ContentSize and ZeroFillSize of each segment will be
/// pre-filled from the Graph. Clients must set the Addr and WorkingMem fields
/// prior to calling apply.
//
// FIXME: The C++98 initializer is an attempt to work around compile failures
// due to http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#1397.
// We should be able to switch this back to member initialization once that
// issue is fixed.
class Segment {
friend class BasicLayout;
public:
Segment()
: ContentSize(0), ZeroFillSize(0), Addr(0), WorkingMem(nullptr),
NextWorkingMemOffset(0) {}
Align Alignment;
size_t ContentSize;
uint64_t ZeroFillSize;
orc::ExecutorAddr Addr;
char *WorkingMem = nullptr;
private:
size_t NextWorkingMemOffset;
std::vector<Block *> ContentBlocks, ZeroFillBlocks;
};
/// A convenience class that further groups segments based on memory
/// deallocation policy. This allows clients to make two slab allocations:
/// one for all standard segments, and one for all finalize segments.
struct ContiguousPageBasedLayoutSizes {
uint64_t StandardSegs = 0;
uint64_t FinalizeSegs = 0;
uint64_t total() const { return StandardSegs + FinalizeSegs; }
};
private:
using SegmentMap = orc::AllocGroupSmallMap<Segment>;
public:
BasicLayout(LinkGraph &G);
/// Return a reference to the graph this allocation was created from.
LinkGraph &getGraph() { return G; }
/// Returns the total number of required to allocate all segments (with each
/// segment padded out to page size) for all standard segments, and all
/// finalize segments.
///
/// This is a convenience function for the common case where the segments will
/// be allocated contiguously.
///
/// This function will return an error if any segment has an alignment that
/// is higher than a page.
Expected<ContiguousPageBasedLayoutSizes>
getContiguousPageBasedLayoutSizes(uint64_t PageSize);
/// Returns an iterator over the segments of the layout.
iterator_range<SegmentMap::iterator> segments() {
return {Segments.begin(), Segments.end()};
}
/// Apply the layout to the graph.
Error apply();
/// Returns a reference to the AllocActions in the graph.
/// This convenience function saves callers from having to #include
/// LinkGraph.h if all they need are allocation actions.
orc::shared::AllocActions &graphAllocActions();
private:
LinkGraph &G;
SegmentMap Segments;
};
/// A utility class for making simple allocations using JITLinkMemoryManager.
///
/// SimpleSegementAlloc takes a mapping of AllocGroups to Segments and uses
/// this to create a LinkGraph with one Section (containing one Block) per
/// Segment. Clients can obtain a pointer to the working memory and executor
/// address of that block using the Segment's AllocGroup. Once memory has been
/// populated, clients can call finalize to finalize the memory.
///
/// Note: Segments with MemLifetimePolicy::NoAlloc are not permitted, since
/// they would not be useful, and their presence is likely to indicate a bug.
class SimpleSegmentAlloc {
public:
/// Describes a segment to be allocated.
struct Segment {
Segment() = default;
Segment(size_t ContentSize, Align ContentAlign)
: ContentSize(ContentSize), ContentAlign(ContentAlign) {}
size_t ContentSize = 0;
Align ContentAlign;
};
/// Describes the segment working memory and executor address.
struct SegmentInfo {
orc::ExecutorAddr Addr;
MutableArrayRef<char> WorkingMem;
};
using SegmentMap = orc::AllocGroupSmallMap<Segment>;
using OnCreatedFunction = unique_function<void(Expected<SimpleSegmentAlloc>)>;
using OnFinalizedFunction =
JITLinkMemoryManager::InFlightAlloc::OnFinalizedFunction;
static void Create(JITLinkMemoryManager &MemMgr, const JITLinkDylib *JD,
SegmentMap Segments, OnCreatedFunction OnCreated);
static Expected<SimpleSegmentAlloc> Create(JITLinkMemoryManager &MemMgr,
const JITLinkDylib *JD,
SegmentMap Segments);
SimpleSegmentAlloc(SimpleSegmentAlloc &&);
SimpleSegmentAlloc &operator=(SimpleSegmentAlloc &&);
~SimpleSegmentAlloc();
/// Returns the SegmentInfo for the given group.
SegmentInfo getSegInfo(orc::AllocGroup AG);
/// Finalize all groups (async version).
void finalize(OnFinalizedFunction OnFinalized) {
Alloc->finalize(std::move(OnFinalized));
}
/// Finalize all groups.
Expected<JITLinkMemoryManager::FinalizedAlloc> finalize() {
return Alloc->finalize();
}
private:
SimpleSegmentAlloc(
std::unique_ptr<LinkGraph> G,
orc::AllocGroupSmallMap<Block *> ContentBlocks,
std::unique_ptr<JITLinkMemoryManager::InFlightAlloc> Alloc);
std::unique_ptr<LinkGraph> G;
orc::AllocGroupSmallMap<Block *> ContentBlocks;
std::unique_ptr<JITLinkMemoryManager::InFlightAlloc> Alloc;
};
/// A JITLinkMemoryManager that allocates in-process memory.
class InProcessMemoryManager : public JITLinkMemoryManager {
public:
class IPInFlightAlloc;
/// Attempts to auto-detect the host page size.
static Expected<std::unique_ptr<InProcessMemoryManager>> Create();
/// Create an instance using the given page size.
InProcessMemoryManager(uint64_t PageSize) : PageSize(PageSize) {}
void allocate(const JITLinkDylib *JD, LinkGraph &G,
OnAllocatedFunction OnAllocated) override;
// Use overloads from base class.
using JITLinkMemoryManager::allocate;
void deallocate(std::vector<FinalizedAlloc> Alloc,
OnDeallocatedFunction OnDeallocated) override;
// Use overloads from base class.
using JITLinkMemoryManager::deallocate;
private:
// FIXME: Use an in-place array instead of a vector for DeallocActions.
// There shouldn't need to be a heap alloc for this.
struct FinalizedAllocInfo {
sys::MemoryBlock StandardSegments;
std::vector<orc::shared::WrapperFunctionCall> DeallocActions;
};
FinalizedAlloc createFinalizedAlloc(
sys::MemoryBlock StandardSegments,
std::vector<orc::shared::WrapperFunctionCall> DeallocActions);
uint64_t PageSize;
std::mutex FinalizedAllocsMutex;
RecyclingAllocator<BumpPtrAllocator, FinalizedAllocInfo> FinalizedAllocInfos;
};
} // end namespace jitlink
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_JITLINKMEMORYMANAGER_H
PK iwFZFO#5 5 ExecutionEngine/JITLink/COFF.hnu �[��� //===------- COFF.h - Generic JIT link function for COFF ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Generic jit-link functions for COFF.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_COFF_H
#define LLVM_EXECUTIONENGINE_JITLINK_COFF_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
namespace llvm {
namespace jitlink {
/// Create a LinkGraph from an COFF relocatable object.
///
/// Note: The graph does not take ownership of the underlying buffer, nor copy
/// its contents. The caller is responsible for ensuring that the object buffer
/// outlives the graph.
Expected<std::unique_ptr<LinkGraph>>
createLinkGraphFromCOFFObject(MemoryBufferRef ObjectBuffer);
/// Link the given graph.
///
/// Uses conservative defaults for GOT and stub handling based on the target
/// platform.
void link_COFF(std::unique_ptr<LinkGraph> G,
std::unique_ptr<JITLinkContext> Ctx);
} // end namespace jitlink
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_COFF_H
PK iwFZ4G�P� � # ExecutionEngine/JITLink/ELF_ppc64.hnu �[��� //===------ ELF_ppc64.h - JIT link functions for ELF/ppc64 ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// jit-link functions for ELF/ppc64{le}.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_ELF_PPC64_H
#define LLVM_EXECUTIONENGINE_JITLINK_ELF_PPC64_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
namespace llvm::jitlink {
/// Create a LinkGraph from an ELF/ppc64 relocatable object.
///
/// Note: The graph does not take ownership of the underlying buffer, nor copy
/// its contents. The caller is responsible for ensuring that the object buffer
/// outlives the graph.
///
/// WARNING: The big-endian backend has not been tested yet.
Expected<std::unique_ptr<LinkGraph>>
createLinkGraphFromELFObject_ppc64(MemoryBufferRef ObjectBuffer);
/// Create a LinkGraph from an ELF/ppc64le relocatable object.
///
/// Note: The graph does not take ownership of the underlying buffer, nor copy
/// its contents. The caller is responsible for ensuring that the object buffer
/// outlives the graph.
Expected<std::unique_ptr<LinkGraph>>
createLinkGraphFromELFObject_ppc64le(MemoryBufferRef ObjectBuffer);
/// jit-link the given object buffer, which must be a ELF ppc64le object file.
///
/// WARNING: The big-endian backend has not been tested yet.
void link_ELF_ppc64(std::unique_ptr<LinkGraph> G,
std::unique_ptr<JITLinkContext> Ctx);
/// jit-link the given object buffer, which must be a ELF ppc64le object file.
void link_ELF_ppc64le(std::unique_ptr<LinkGraph> G,
std::unique_ptr<JITLinkContext> Ctx);
} // end namespace llvm::jitlink
#endif // LLVM_EXECUTIONENGINE_JITLINK_ELF_PPC64_H
PK iwFZNB��RW RW ExecutionEngine/JITLink/x86_64.hnu �[��� //===-- x86_64.h - Generic JITLink x86-64 edge kinds, utilities -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Generic utilities for graphs representing x86-64 objects.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_X86_64_H
#define LLVM_EXECUTIONENGINE_JITLINK_X86_64_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
#include "llvm/ExecutionEngine/JITLink/TableManager.h"
namespace llvm {
namespace jitlink {
namespace x86_64 {
/// Represents x86-64 fixups and other x86-64-specific edge kinds.
enum EdgeKind_x86_64 : Edge::Kind {
/// A plain 64-bit pointer value relocation.
///
/// Fixup expression:
/// Fixup <- Target + Addend : uint64
///
Pointer64 = Edge::FirstRelocation,
/// A plain 32-bit pointer value relocation.
///
/// Fixup expression:
/// Fixup <- Target + Addend : uint32
///
/// Errors:
/// - The target must reside in the low 32-bits of the address space,
/// otherwise an out-of-range error will be returned.
///
Pointer32,
/// A signed 32-bit pointer value relocation
///
/// Fixup expression:
/// Fixup <- Target + Addend : int32
///
/// Errors:
/// - The target must reside in the signed 32-bits([-2**31, 2**32 - 1]) of
/// the address space, otherwise an out-of-range error will be returned.
Pointer32Signed,
/// A plain 16-bit pointer value relocation.
///
/// Fixup expression:
/// Fixup <- Target + Addend : uint16
///
/// Errors:
/// - The target must reside in the low 16-bits of the address space,
/// otherwise an out-of-range error will be returned.
///
Pointer16,
/// A plain 8-bit pointer value relocation.
///
/// Fixup expression:
/// Fixup <- Target + Addend : uint8
///
/// Errors:
/// - The target must reside in the low 8-bits of the address space,
/// otherwise an out-of-range error will be returned.
///
Pointer8,
/// A 64-bit delta.
///
/// Delta from the fixup to the target.
///
/// Fixup expression:
/// Fixup <- Target - Fixup + Addend : int64
///
Delta64,
/// A 32-bit delta.
///
/// Delta from the fixup to the target.
///
/// Fixup expression:
/// Fixup <- Target - Fixup + Addend : int64
///
/// Errors:
/// - The result of the fixup expression must fit into an int32, otherwise
/// an out-of-range error will be returned.
///
Delta32,
/// A 64-bit negative delta.
///
/// Delta from target back to the fixup.
///
/// Fixup expression:
/// Fixup <- Fixup - Target + Addend : int64
///
NegDelta64,
/// A 32-bit negative delta.
///
/// Delta from the target back to the fixup.
///
/// Fixup expression:
/// Fixup <- Fixup - Target + Addend : int32
///
/// Errors:
/// - The result of the fixup expression must fit into an int32, otherwise
/// an out-of-range error will be returned.
NegDelta32,
/// A 64-bit GOT delta.
///
/// Delta from the global offset table to the target
///
/// Fixup expression:
/// Fixup <- Target - GOTSymbol + Addend : int64
///
/// Errors:
/// - *ASSERTION* Failure to a null pointer GOTSymbol, which the GOT section
/// symbol was not been defined.
Delta64FromGOT,
/// A 32-bit PC-relative branch.
///
/// Represents a PC-relative call or branch to a target. This can be used to
/// identify, record, and/or patch call sites.
///
/// The fixup expression for this kind includes an implicit offset to account
/// for the PC (unlike the Delta edges) so that a Branch32PCRel with a target
/// T and addend zero is a call/branch to the start (offset zero) of T.
///
/// Fixup expression:
/// Fixup <- Target - (Fixup + 4) + Addend : int32
///
/// Errors:
/// - The result of the fixup expression must fit into an int32, otherwise
/// an out-of-range error will be returned.
///
BranchPCRel32,
/// A 32-bit PC-relative relocation.
///
/// Represents a data/control flow instruction using PC-relative addressing
/// to a target.
///
/// The fixup expression for this kind includes an implicit offset to account
/// for the PC (unlike the Delta edges) so that a PCRel32 with a target
/// T and addend zero is a call/branch to the start (offset zero) of T.
///
/// Fixup expression:
/// Fixup <- Target - (Fixup + 4) + Addend : int32
///
/// Errors:
/// - The result of the fixup expression must fit into an int32, otherwise
/// an out-of-range error will be returned.
///
PCRel32,
/// A 32-bit PC-relative branch to a pointer jump stub.
///
/// The target of this relocation should be a pointer jump stub of the form:
///
/// \code{.s}
/// .text
/// jmpq *tgtptr(%rip)
/// ; ...
///
/// .data
/// tgtptr:
/// .quad 0
/// \endcode
///
/// This edge kind has the same fixup expression as BranchPCRel32, but further
/// identifies the call/branch as being to a pointer jump stub. For edges of
/// this kind the jump stub should not be bypassed (use
/// BranchPCRel32ToPtrJumpStubBypassable for that), but the pointer location
/// target may be recorded to allow manipulation at runtime.
///
/// Fixup expression:
/// Fixup <- Target - Fixup + Addend - 4 : int32
///
/// Errors:
/// - The result of the fixup expression must fit into an int32, otherwise
/// an out-of-range error will be returned.
///
BranchPCRel32ToPtrJumpStub,
/// A relaxable version of BranchPCRel32ToPtrJumpStub.
///
/// The edge kind has the same fixup expression as BranchPCRel32ToPtrJumpStub,
/// but identifies the call/branch as being to a pointer jump stub that may be
/// bypassed with a direct jump to the ultimate target if the ultimate target
/// is within range of the fixup location.
///
/// Fixup expression:
/// Fixup <- Target - Fixup + Addend - 4: int32
///
/// Errors:
/// - The result of the fixup expression must fit into an int32, otherwise
/// an out-of-range error will be returned.
///
BranchPCRel32ToPtrJumpStubBypassable,
/// A GOT entry getter/constructor, transformed to Delta32 pointing at the GOT
/// entry for the original target.
///
/// Indicates that this edge should be transformed into a Delta32 targeting
/// the GOT entry for the edge's current target, maintaining the same addend.
/// A GOT entry for the target should be created if one does not already
/// exist.
///
/// Edges of this kind are usually handled by a GOT builder pass inserted by
/// default.
///
/// Fixup expression:
/// NONE
///
/// Errors:
/// - *ASSERTION* Failure to handle edges of this kind prior to the fixup
/// phase will result in an assert/unreachable during the fixup phase.
///
RequestGOTAndTransformToDelta32,
/// A GOT entry getter/constructor, transformed to Delta64 pointing at the GOT
/// entry for the original target.
///
/// Indicates that this edge should be transformed into a Delta64 targeting
/// the GOT entry for the edge's current target, maintaining the same addend.
/// A GOT entry for the target should be created if one does not already
/// exist.
///
/// Edges of this kind are usually handled by a GOT builder pass inserted by
/// default.
///
/// Fixup expression:
/// NONE
///
/// Errors:
/// - *ASSERTION* Failure to handle edges of this kind prior to the fixup
/// phase will result in an assert/unreachable during the fixup phase.
///
RequestGOTAndTransformToDelta64,
/// A GOT entry offset within GOT getter/constructor, transformed to
/// Delta64FromGOT
/// pointing at the GOT entry for the original target
///
/// Indicates that this edge should be transformed into a Delta64FromGOT
/// targeting
/// the GOT entry for the edge's current target, maintaining the same addend.
/// A GOT entry for the target should be created if one does not already
/// exist.
///
/// Edges of this kind are usually handled by a GOT builder pass inserted by
/// default
///
/// Fixup expression:
/// NONE
///
/// Errors:
/// - *ASSERTION* Failure to handle edges of this kind prior to the fixup
/// phase will result in an assert/unreachable during the fixup phase
RequestGOTAndTransformToDelta64FromGOT,
/// A PC-relative load of a GOT entry, relaxable if GOT entry target is
/// in-range of the fixup
///
/// TODO: Explain the optimization
///
/// Fixup expression
/// Fixup <- Target - (Fixup + 4) + Addend : int32
///
/// Errors:
/// - The result of the fixup expression must fit into an int32, otherwise
/// an out-of-range error will be returned.
//
PCRel32GOTLoadRelaxable,
/// A PC-relative REX load of a GOT entry, relaxable if GOT entry target
/// is in-range of the fixup.
///
/// If the GOT entry target is in-range of the fixup then the load from the
/// GOT may be replaced with a direct memory address calculation.
///
/// Fixup expression:
/// Fixup <- Target - (Fixup + 4) + Addend : int32
///
/// Errors:
/// - The result of the fixup expression must fit into an int32, otherwise
/// an out-of-range error will be returned.
///
PCRel32GOTLoadREXRelaxable,
/// A GOT entry getter/constructor, transformed to
/// PCRel32ToGOTLoadREXRelaxable pointing at the GOT entry for the original
/// target.
///
/// Indicates that this edge should be lowered to a PC32ToGOTLoadREXRelaxable
/// targeting the GOT entry for the edge's current target, maintaining the
/// same addend. A GOT entry for the target should be created if one does not
/// already exist.
///
/// Edges of this kind are usually lowered by a GOT builder pass inserted by
/// default.
///
/// Fixup expression:
/// NONE
///
/// Errors:
/// - *ASSERTION* Failure to handle edges of this kind prior to the fixup
/// phase will result in an assert/unreachable during the fixup phase.
///
RequestGOTAndTransformToPCRel32GOTLoadREXRelaxable,
/// A GOT entry getter/constructor, transformed to
/// PCRel32ToGOTLoadRelaxable pointing at the GOT entry for the original
/// target.
///
/// Indicates that this edge should be lowered to a PC32ToGOTLoadRelaxable
/// targeting the GOT entry for the edge's current target, maintaining the
/// same addend. A GOT entry for the target should be created if one does not
/// already exist.
///
/// Edges of this kind are usually lowered by a GOT builder pass inserted by
/// default.
///
/// Fixup expression:
/// NONE
///
/// Errors:
/// - *ASSERTION* Failure to handle edges of this kind prior to the fixup
/// phase will result in an assert/unreachable during the fixup phase.
///
RequestGOTAndTransformToPCRel32GOTLoadRelaxable,
/// A PC-relative REX load of a Thread Local Variable Pointer (TLVP) entry,
/// relaxable if the TLVP entry target is in-range of the fixup.
///
/// If the TLVP entry target is in-range of the fixup then the load from the
/// TLVP may be replaced with a direct memory address calculation.
///
/// The target of this edge must be a thread local variable entry of the form
/// .quad <tlv getter thunk>
/// .quad <tlv key>
/// .quad <tlv initializer>
///
/// Fixup expression:
/// Fixup <- Target - (Fixup + 4) + Addend : int32
///
/// Errors:
/// - The result of the fixup expression must fit into an int32, otherwise
/// an out-of-range error will be returned.
/// - The target must be either external, or a TLV entry of the required
/// form, otherwise a malformed TLV entry error will be returned.
///
PCRel32TLVPLoadREXRelaxable,
/// TODO: Explain the generic edge kind
RequestTLSDescInGOTAndTransformToDelta32,
/// A TLVP entry getter/constructor, transformed to
/// Delta32ToTLVPLoadREXRelaxable.
///
/// Indicates that this edge should be transformed into a
/// Delta32ToTLVPLoadREXRelaxable targeting the TLVP entry for the edge's
/// current target. A TLVP entry for the target should be created if one does
/// not already exist.
///
/// Fixup expression:
/// NONE
///
/// Errors:
/// - *ASSERTION* Failure to handle edges of this kind prior to the fixup
/// phase will result in an assert/unreachable during the fixup phase.
///
RequestTLVPAndTransformToPCRel32TLVPLoadREXRelaxable,
// First platform specific relocation.
FirstPlatformRelocation
};
/// Returns a string name for the given x86-64 edge. For debugging purposes
/// only.
const char *getEdgeKindName(Edge::Kind K);
/// Apply fixup expression for edge to block content.
inline Error applyFixup(LinkGraph &G, Block &B, const Edge &E,
const Symbol *GOTSymbol) {
using namespace support;
char *BlockWorkingMem = B.getAlreadyMutableContent().data();
char *FixupPtr = BlockWorkingMem + E.getOffset();
auto FixupAddress = B.getAddress() + E.getOffset();
switch (E.getKind()) {
case Pointer64: {
uint64_t Value = E.getTarget().getAddress().getValue() + E.getAddend();
*(ulittle64_t *)FixupPtr = Value;
break;
}
case Pointer32: {
uint64_t Value = E.getTarget().getAddress().getValue() + E.getAddend();
if (LLVM_LIKELY(isUInt<32>(Value)))
*(ulittle32_t *)FixupPtr = Value;
else
return makeTargetOutOfRangeError(G, B, E);
break;
}
case Pointer32Signed: {
int64_t Value = E.getTarget().getAddress().getValue() + E.getAddend();
if (LLVM_LIKELY(isInt<32>(Value)))
*(little32_t *)FixupPtr = Value;
else
return makeTargetOutOfRangeError(G, B, E);
break;
}
case Pointer16: {
uint64_t Value = E.getTarget().getAddress().getValue() + E.getAddend();
if (LLVM_LIKELY(isUInt<16>(Value)))
*(ulittle16_t *)FixupPtr = Value;
else
return makeTargetOutOfRangeError(G, B, E);
break;
}
case Pointer8: {
uint64_t Value = E.getTarget().getAddress().getValue() + E.getAddend();
if (LLVM_LIKELY(isUInt<8>(Value)))
*(uint8_t *)FixupPtr = Value;
else
return makeTargetOutOfRangeError(G, B, E);
break;
}
case PCRel32:
case BranchPCRel32:
case BranchPCRel32ToPtrJumpStub:
case BranchPCRel32ToPtrJumpStubBypassable:
case PCRel32GOTLoadRelaxable:
case PCRel32GOTLoadREXRelaxable:
case PCRel32TLVPLoadREXRelaxable: {
int64_t Value =
E.getTarget().getAddress() - (FixupAddress + 4) + E.getAddend();
if (LLVM_LIKELY(isInt<32>(Value)))
*(little32_t *)FixupPtr = Value;
else
return makeTargetOutOfRangeError(G, B, E);
break;
}
case Delta64: {
int64_t Value = E.getTarget().getAddress() - FixupAddress + E.getAddend();
*(little64_t *)FixupPtr = Value;
break;
}
case Delta32: {
int64_t Value = E.getTarget().getAddress() - FixupAddress + E.getAddend();
if (LLVM_LIKELY(isInt<32>(Value)))
*(little32_t *)FixupPtr = Value;
else
return makeTargetOutOfRangeError(G, B, E);
break;
}
case NegDelta64: {
int64_t Value = FixupAddress - E.getTarget().getAddress() + E.getAddend();
*(little64_t *)FixupPtr = Value;
break;
}
case NegDelta32: {
int64_t Value = FixupAddress - E.getTarget().getAddress() + E.getAddend();
if (LLVM_LIKELY(isInt<32>(Value)))
*(little32_t *)FixupPtr = Value;
else
return makeTargetOutOfRangeError(G, B, E);
break;
}
case Delta64FromGOT: {
assert(GOTSymbol && "No GOT section symbol");
int64_t Value =
E.getTarget().getAddress() - GOTSymbol->getAddress() + E.getAddend();
*(little64_t *)FixupPtr = Value;
break;
}
default:
return make_error<JITLinkError>(
"In graph " + G.getName() + ", section " + B.getSection().getName() +
" unsupported edge kind " + getEdgeKindName(E.getKind()));
}
return Error::success();
}
/// x86_64 pointer size.
constexpr uint64_t PointerSize = 8;
/// x86-64 null pointer content.
extern const char NullPointerContent[PointerSize];
/// x86-64 pointer jump stub content.
///
/// Contains the instruction sequence for an indirect jump via an in-memory
/// pointer:
/// jmpq *ptr(%rip)
extern const char PointerJumpStubContent[6];
/// Creates a new pointer block in the given section and returns an anonymous
/// symbol pointing to it.
///
/// If InitialTarget is given then an Pointer64 relocation will be added to the
/// block pointing at InitialTarget.
///
/// The pointer block will have the following default values:
/// alignment: 64-bit
/// alignment-offset: 0
/// address: highest allowable (~7U)
inline Symbol &createAnonymousPointer(LinkGraph &G, Section &PointerSection,
Symbol *InitialTarget = nullptr,
uint64_t InitialAddend = 0) {
auto &B = G.createContentBlock(PointerSection, NullPointerContent,
orc::ExecutorAddr(~uint64_t(7)), 8, 0);
if (InitialTarget)
B.addEdge(Pointer64, 0, *InitialTarget, InitialAddend);
return G.addAnonymousSymbol(B, 0, 8, false, false);
}
/// Create a jump stub block that jumps via the pointer at the given symbol.
///
/// The stub block will have the following default values:
/// alignment: 8-bit
/// alignment-offset: 0
/// address: highest allowable: (~5U)
inline Block &createPointerJumpStubBlock(LinkGraph &G, Section &StubSection,
Symbol &PointerSymbol) {
auto &B = G.createContentBlock(StubSection, PointerJumpStubContent,
orc::ExecutorAddr(~uint64_t(5)), 1, 0);
B.addEdge(Delta32, 2, PointerSymbol, -4);
return B;
}
/// Create a jump stub that jumps via the pointer at the given symbol and
/// an anonymous symbol pointing to it. Return the anonymous symbol.
///
/// The stub block will be created by createPointerJumpStubBlock.
inline Symbol &createAnonymousPointerJumpStub(LinkGraph &G,
Section &StubSection,
Symbol &PointerSymbol) {
return G.addAnonymousSymbol(
createPointerJumpStubBlock(G, StubSection, PointerSymbol), 0, 6, true,
false);
}
/// Global Offset Table Builder.
class GOTTableManager : public TableManager<GOTTableManager> {
public:
static StringRef getSectionName() { return "$__GOT"; }
bool visitEdge(LinkGraph &G, Block *B, Edge &E) {
Edge::Kind KindToSet = Edge::Invalid;
switch (E.getKind()) {
case x86_64::Delta64FromGOT: {
// we need to make sure that the GOT section exists, but don't otherwise
// need to fix up this edge
getGOTSection(G);
return false;
}
case x86_64::RequestGOTAndTransformToPCRel32GOTLoadREXRelaxable:
KindToSet = x86_64::PCRel32GOTLoadREXRelaxable;
break;
case x86_64::RequestGOTAndTransformToPCRel32GOTLoadRelaxable:
KindToSet = x86_64::PCRel32GOTLoadRelaxable;
break;
case x86_64::RequestGOTAndTransformToDelta64:
KindToSet = x86_64::Delta64;
break;
case x86_64::RequestGOTAndTransformToDelta64FromGOT:
KindToSet = x86_64::Delta64FromGOT;
break;
case x86_64::RequestGOTAndTransformToDelta32:
KindToSet = x86_64::Delta32;
break;
default:
return false;
}
assert(KindToSet != Edge::Invalid &&
"Fell through switch, but no new kind to set");
DEBUG_WITH_TYPE("jitlink", {
dbgs() << " Fixing " << G.getEdgeKindName(E.getKind()) << " edge at "
<< B->getFixupAddress(E) << " (" << B->getAddress() << " + "
<< formatv("{0:x}", E.getOffset()) << ")\n";
});
E.setKind(KindToSet);
E.setTarget(getEntryForTarget(G, E.getTarget()));
return true;
}
Symbol &createEntry(LinkGraph &G, Symbol &Target) {
return createAnonymousPointer(G, getGOTSection(G), &Target);
}
private:
Section &getGOTSection(LinkGraph &G) {
if (!GOTSection)
GOTSection = &G.createSection(getSectionName(), orc::MemProt::Read);
return *GOTSection;
}
Section *GOTSection = nullptr;
};
/// Procedure Linkage Table Builder.
class PLTTableManager : public TableManager<PLTTableManager> {
public:
PLTTableManager(GOTTableManager &GOT) : GOT(GOT) {}
static StringRef getSectionName() { return "$__STUBS"; }
bool visitEdge(LinkGraph &G, Block *B, Edge &E) {
if (E.getKind() == x86_64::BranchPCRel32 && !E.getTarget().isDefined()) {
DEBUG_WITH_TYPE("jitlink", {
dbgs() << " Fixing " << G.getEdgeKindName(E.getKind()) << " edge at "
<< B->getFixupAddress(E) << " (" << B->getAddress() << " + "
<< formatv("{0:x}", E.getOffset()) << ")\n";
});
// Set the edge kind to Branch32ToPtrJumpStubBypassable to enable it to
// be optimized when the target is in-range.
E.setKind(x86_64::BranchPCRel32ToPtrJumpStubBypassable);
E.setTarget(getEntryForTarget(G, E.getTarget()));
return true;
}
return false;
}
Symbol &createEntry(LinkGraph &G, Symbol &Target) {
return createAnonymousPointerJumpStub(G, getStubsSection(G),
GOT.getEntryForTarget(G, Target));
}
public:
Section &getStubsSection(LinkGraph &G) {
if (!PLTSection)
PLTSection = &G.createSection(getSectionName(),
orc::MemProt::Read | orc::MemProt::Exec);
return *PLTSection;
}
GOTTableManager &GOT;
Section *PLTSection = nullptr;
};
/// Optimize the GOT and Stub relocations if the edge target address is in range
/// 1. PCRel32GOTLoadRelaxable. For this edge kind, if the target is in range,
/// then replace GOT load with lea
/// 2. BranchPCRel32ToPtrJumpStubRelaxable. For this edge kind, if the target is
/// in range, replace a indirect jump by plt stub with a direct jump to the
/// target
Error optimizeGOTAndStubAccesses(LinkGraph &G);
} // namespace x86_64
} // end namespace jitlink
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_X86_64_H
PK iwFZ�& �& ! ExecutionEngine/JITLink/aarch32.hnu �[��� //===------ aarch32.h - Generic JITLink arm/thumb utilities -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Generic utilities for graphs representing arm/thumb objects.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_AARCH32
#define LLVM_EXECUTIONENGINE_JITLINK_AARCH32
#include "TableManager.h"
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include "llvm/Support/ARMBuildAttributes.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace jitlink {
namespace aarch32 {
/// JITLink-internal AArch32 fixup kinds
enum EdgeKind_aarch32 : Edge::Kind {
///
/// Relocations of class Data respect target endianness (unless otherwise
/// specified)
///
FirstDataRelocation = Edge::FirstRelocation,
/// Relative 32-bit value relocation
Data_Delta32 = FirstDataRelocation,
/// Absolute 32-bit value relocation
Data_Pointer32,
LastDataRelocation = Data_Pointer32,
///
/// Relocations of class Arm (covers fixed-width 4-byte instruction subset)
///
FirstArmRelocation,
/// TODO: Arm_Call is here only as a placeholder for now.
Arm_Call = FirstArmRelocation,
LastArmRelocation = Arm_Call,
///
/// Relocations of class Thumb16 and Thumb32 (covers Thumb instruction subset)
///
FirstThumbRelocation,
/// Write immediate value for PC-relative branch with link (can bridge between
/// Arm and Thumb).
Thumb_Call = FirstThumbRelocation,
/// Write immediate value for (unconditional) PC-relative branch without link.
Thumb_Jump24,
/// Write immediate value to the lower halfword of the destination register
Thumb_MovwAbsNC,
/// Write immediate value to the top halfword of the destination register
Thumb_MovtAbs,
LastThumbRelocation = Thumb_MovtAbs,
};
/// Flags enum for AArch32-specific symbol properties
enum TargetFlags_aarch32 : TargetFlagsType {
ThumbSymbol = 1 << 0,
};
/// Human-readable name for a given CPU architecture kind
const char *getCPUArchName(ARMBuildAttrs::CPUArch K);
/// Get a human-readable name for the given AArch32 edge kind.
const char *getEdgeKindName(Edge::Kind K);
/// AArch32 uses stubs for a number of purposes, like branch range extension
/// or interworking between Arm and Thumb instruction subsets.
///
/// Stub implementations vary depending on CPU architecture (v4, v6, v7),
/// instruction subset and branch type (absolute/PC-relative).
///
/// For each kind of stub, the StubsFlavor defines one concrete form that is
/// used throughout the LinkGraph.
///
/// Stubs are often called "veneers" in the official docs and online.
///
enum StubsFlavor {
Unsupported = 0,
Thumbv7,
};
/// JITLink sub-arch configuration for Arm CPU models
struct ArmConfig {
bool J1J2BranchEncoding = false;
StubsFlavor Stubs = Unsupported;
};
/// Obtain the sub-arch configuration for a given Arm CPU model.
inline ArmConfig getArmConfigForCPUArch(ARMBuildAttrs::CPUArch CPUArch) {
ArmConfig ArmCfg;
switch (CPUArch) {
case ARMBuildAttrs::v7:
case ARMBuildAttrs::v8_A:
ArmCfg.J1J2BranchEncoding = true;
ArmCfg.Stubs = Thumbv7;
break;
default:
DEBUG_WITH_TYPE("jitlink", {
dbgs() << " Warning: ARM config not defined for CPU architecture "
<< getCPUArchName(CPUArch);
});
break;
}
return ArmCfg;
}
/// Immutable pair of halfwords, Hi and Lo, with overflow check
struct HalfWords {
constexpr HalfWords() : Hi(0), Lo(0) {}
constexpr HalfWords(uint32_t Hi, uint32_t Lo) : Hi(Hi), Lo(Lo) {
assert(isUInt<16>(Hi) && "Overflow in first half-word");
assert(isUInt<16>(Lo) && "Overflow in second half-word");
}
const uint16_t Hi; // First halfword
const uint16_t Lo; // Second halfword
};
/// Collection of named constants per fixup kind. It may contain but is not
/// limited to the following entries:
///
/// Opcode - Values of the op-code bits in the instruction, with
/// unaffected bits nulled
/// OpcodeMask - Mask with all bits set that encode the op-code
/// ImmMask - Mask with all bits set that encode the immediate value
/// RegMask - Mask with all bits set that encode the register
///
template <EdgeKind_aarch32 Kind> struct FixupInfo {};
template <> struct FixupInfo<Thumb_Jump24> {
static constexpr HalfWords Opcode{0xf000, 0x8000};
static constexpr HalfWords OpcodeMask{0xf800, 0x8000};
static constexpr HalfWords ImmMask{0x07ff, 0x2fff};
static constexpr uint16_t LoBitConditional = 0x1000;
};
template <> struct FixupInfo<Thumb_Call> {
static constexpr HalfWords Opcode{0xf000, 0xc000};
static constexpr HalfWords OpcodeMask{0xf800, 0xc000};
static constexpr HalfWords ImmMask{0x07ff, 0x2fff};
static constexpr uint16_t LoBitH = 0x0001;
static constexpr uint16_t LoBitNoBlx = 0x1000;
};
template <> struct FixupInfo<Thumb_MovtAbs> {
static constexpr HalfWords Opcode{0xf2c0, 0x0000};
static constexpr HalfWords OpcodeMask{0xfbf0, 0x8000};
static constexpr HalfWords ImmMask{0x040f, 0x70ff};
static constexpr HalfWords RegMask{0x0000, 0x0f00};
};
template <>
struct FixupInfo<Thumb_MovwAbsNC> : public FixupInfo<Thumb_MovtAbs> {
static constexpr HalfWords Opcode{0xf240, 0x0000};
};
/// Helper function to read the initial addend for Data-class relocations.
Expected<int64_t> readAddendData(LinkGraph &G, Block &B, const Edge &E);
/// Helper function to read the initial addend for Arm-class relocations.
Expected<int64_t> readAddendArm(LinkGraph &G, Block &B, const Edge &E);
/// Helper function to read the initial addend for Thumb-class relocations.
Expected<int64_t> readAddendThumb(LinkGraph &G, Block &B, const Edge &E,
const ArmConfig &ArmCfg);
/// Read the initial addend for a REL-type relocation. It's the value encoded
/// in the immediate field of the fixup location by the compiler.
inline Expected<int64_t> readAddend(LinkGraph &G, Block &B, const Edge &E,
const ArmConfig &ArmCfg) {
Edge::Kind Kind = E.getKind();
if (Kind <= LastDataRelocation)
return readAddendData(G, B, E);
if (Kind <= LastArmRelocation)
return readAddendArm(G, B, E);
if (Kind <= LastThumbRelocation)
return readAddendThumb(G, B, E, ArmCfg);
llvm_unreachable("Relocation must be of class Data, Arm or Thumb");
}
/// Helper function to apply the fixup for Data-class relocations.
Error applyFixupData(LinkGraph &G, Block &B, const Edge &E);
/// Helper function to apply the fixup for Arm-class relocations.
Error applyFixupArm(LinkGraph &G, Block &B, const Edge &E);
/// Helper function to apply the fixup for Thumb-class relocations.
Error applyFixupThumb(LinkGraph &G, Block &B, const Edge &E,
const ArmConfig &ArmCfg);
/// Apply fixup expression for edge to block content.
inline Error applyFixup(LinkGraph &G, Block &B, const Edge &E,
const ArmConfig &ArmCfg) {
Edge::Kind Kind = E.getKind();
if (Kind <= LastDataRelocation)
return applyFixupData(G, B, E);
if (Kind <= LastArmRelocation)
return applyFixupArm(G, B, E);
if (Kind <= LastThumbRelocation)
return applyFixupThumb(G, B, E, ArmCfg);
llvm_unreachable("Relocation must be of class Data, Arm or Thumb");
}
/// Stubs builder for a specific StubsFlavor
///
/// Right now we only have one default stub kind, but we want to extend this
/// and allow creation of specific kinds in the future (e.g. branch range
/// extension or interworking).
///
/// Let's keep it simple for the moment and not wire this through a GOT.
///
template <StubsFlavor Flavor>
class StubsManager : public TableManager<StubsManager<Flavor>> {
public:
StubsManager() = default;
/// Name of the object file section that will contain all our stubs.
static StringRef getSectionName() { return "__llvm_jitlink_STUBS"; }
/// Implements link-graph traversal via visitExistingEdges().
bool visitEdge(LinkGraph &G, Block *B, Edge &E) {
if (E.getTarget().isDefined())
return false;
switch (E.getKind()) {
case Thumb_Call:
case Thumb_Jump24: {
DEBUG_WITH_TYPE("jitlink", {
dbgs() << " Fixing " << G.getEdgeKindName(E.getKind()) << " edge at "
<< B->getFixupAddress(E) << " (" << B->getAddress() << " + "
<< formatv("{0:x}", E.getOffset()) << ")\n";
});
E.setTarget(this->getEntryForTarget(G, E.getTarget()));
return true;
}
}
return false;
}
/// Create a branch range extension stub for the class's flavor.
Symbol &createEntry(LinkGraph &G, Symbol &Target);
private:
/// Create a new node in the link-graph for the given stub template.
template <size_t Size>
Block &addStub(LinkGraph &G, const uint8_t (&Code)[Size],
uint64_t Alignment) {
ArrayRef<char> Template(reinterpret_cast<const char *>(Code), Size);
return G.createContentBlock(getStubsSection(G), Template,
orc::ExecutorAddr(), Alignment, 0);
}
/// Get or create the object file section that will contain all our stubs.
Section &getStubsSection(LinkGraph &G) {
if (!StubsSection)
StubsSection = &G.createSection(getSectionName(),
orc::MemProt::Read | orc::MemProt::Exec);
return *StubsSection;
}
Section *StubsSection = nullptr;
};
/// Create a branch range extension stub with Thumb encoding for v7 CPUs.
template <>
Symbol &StubsManager<Thumbv7>::createEntry(LinkGraph &G, Symbol &Target);
} // namespace aarch32
} // namespace jitlink
} // namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_AARCH32
PK iwFZ>g,8k k % ExecutionEngine/JITLink/ELF_aarch32.hnu �[��� //===---- ELF_aarch32.h - JIT link functions for arm/thumb -----*- C++ -*--===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// jit-link functions for ELF/aarch32.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_ELF_AARCH32
#define LLVM_EXECUTIONENGINE_JITLINK_ELF_AARCH32
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
#include "llvm/ExecutionEngine/JITLink/aarch32.h"
namespace llvm {
namespace jitlink {
/// Create a LinkGraph from an ELF/arm relocatable object
///
/// Note: The graph does not take ownership of the underlying buffer, nor copy
/// its contents. The caller is responsible for ensuring that the object buffer
/// outlives the graph.
Expected<std::unique_ptr<LinkGraph>>
createLinkGraphFromELFObject_aarch32(MemoryBufferRef ObjectBuffer);
/// jit-link the given object buffer, which must be an ELF arm/thumb object
/// file.
void link_ELF_aarch32(std::unique_ptr<LinkGraph> G,
std::unique_ptr<JITLinkContext> Ctx);
} // end namespace jitlink
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_ELF_AARCH32
PK iwFZ��i i ExecutionEngine/JITLink/MachO.hnu �[��� //===------- MachO.h - Generic JIT link function for MachO ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Generic jit-link functions for MachO.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_MACHO_H
#define LLVM_EXECUTIONENGINE_JITLINK_MACHO_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
namespace llvm {
namespace jitlink {
/// Create a LinkGraph from a MachO relocatable object.
///
/// Note: The graph does not take ownership of the underlying buffer, nor copy
/// its contents. The caller is responsible for ensuring that the object buffer
/// outlives the graph.
Expected<std::unique_ptr<LinkGraph>>
createLinkGraphFromMachOObject(MemoryBufferRef ObjectBuffer);
/// jit-link the given ObjBuffer, which must be a MachO object file.
///
/// Uses conservative defaults for GOT and stub handling based on the target
/// platform.
void link_MachO(std::unique_ptr<LinkGraph> G,
std::unique_ptr<JITLinkContext> Ctx);
} // end namespace jitlink
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_MACHO_H
PK iwFZC���% % & ExecutionEngine/JITLink/MachO_x86_64.hnu �[��� //===--- MachO_x86_64.h - JIT link functions for MachO/x86-64 ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// jit-link functions for MachO/x86-64.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_MACHO_X86_64_H
#define LLVM_EXECUTIONENGINE_JITLINK_MACHO_X86_64_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
namespace llvm {
namespace jitlink {
/// Create a LinkGraph from a MachO/x86-64 relocatable object.
///
/// Note: The graph does not take ownership of the underlying buffer, nor copy
/// its contents. The caller is responsible for ensuring that the object buffer
/// outlives the graph.
Expected<std::unique_ptr<LinkGraph>>
createLinkGraphFromMachOObject_x86_64(MemoryBufferRef ObjectBuffer);
/// jit-link the given LinkGraph.
///
/// If PrePrunePasses is empty then a default mark-live pass will be inserted
/// that will mark all exported atoms live. If PrePrunePasses is not empty, the
/// caller is responsible for including a pass to mark atoms as live.
///
/// If PostPrunePasses is empty then a default GOT-and-stubs insertion pass will
/// be inserted. If PostPrunePasses is not empty then the caller is responsible
/// for including a pass to insert GOT and stub edges.
void link_MachO_x86_64(std::unique_ptr<LinkGraph> G,
std::unique_ptr<JITLinkContext> Ctx);
/// Returns a pass suitable for splitting __eh_frame sections in MachO/x86-64
/// objects.
LinkGraphPassFunction createEHFrameSplitterPass_MachO_x86_64();
/// Returns a pass suitable for fixing missing edges in an __eh_frame section
/// in a MachO/x86-64 object.
LinkGraphPassFunction createEHFrameEdgeFixerPass_MachO_x86_64();
} // end namespace jitlink
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_MACHO_X86_64_H
PK iwFZ�)�� � 4 ExecutionEngine/JITLink/DWARFRecordSectionSplitter.hnu �[��� //===--------- DWARFRecordSectionSplitter.h - JITLink -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_DWARFRECORDSECTIONSPLITTER_H
#define LLVM_EXECUTIONENGINE_JITLINK_DWARFRECORDSECTIONSPLITTER_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
namespace llvm {
namespace jitlink {
/// A LinkGraph pass that splits blocks in a section that follows the DWARF
/// Record format into sub-blocks where each header gets its own block.
/// When splitting EHFrames, DWARFRecordSectionSplitter should not be run
/// without EHFrameEdgeFixer, which is responsible for adding FDE-to-CIE edges.
class DWARFRecordSectionSplitter {
public:
DWARFRecordSectionSplitter(StringRef SectionName);
Error operator()(LinkGraph &G);
private:
Error processBlock(LinkGraph &G, Block &B, LinkGraph::SplitBlockCache &Cache);
StringRef SectionName;
};
} // namespace jitlink
} // namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_DWARFRECORDSECTIONSPLITTER_H
PK iwFZ %p8 p8 ExecutionEngine/JITLink/i386.hnu �[��� //=== i386.h - Generic JITLink i386 edge kinds, utilities -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Generic utilities for graphs representing i386 objects.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_I386_H
#define LLVM_EXECUTIONENGINE_JITLINK_I386_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
#include "llvm/ExecutionEngine/JITLink/TableManager.h"
namespace llvm::jitlink::i386 {
/// Represets i386 fixups
enum EdgeKind_i386 : Edge::Kind {
/// None
None = Edge::FirstRelocation,
/// A plain 32-bit pointer value relocation.
///
/// Fixup expression:
/// Fixup <- Target + Addend : uint32
///
/// Errors:
/// - The target must reside in the low 32-bits of the address space,
/// otherwise an out-of-range error will be returned.
///
Pointer32,
/// A 32-bit PC-relative relocation.
///
/// Represents a data/control flow instruction using PC-relative addressing
/// to a target.
///
/// The fixup expression for this kind includes an implicit offset to account
/// for the PC (unlike the Delta edges) so that a PCRel32 with a target
/// T and addend zero is a call/branch to the start (offset zero) of T.
///
/// Fixup expression:
/// Fixup <- Target - (Fixup + 4) + Addend : int32
///
/// Errors:
/// - The result of the fixup expression must fit into an int32, otherwise
/// an out-of-range error will be returned.
///
PCRel32,
/// A plain 16-bit pointer value relocation.
///
/// Fixup expression:
/// Fixup <- Target + Addend : uint16
///
/// Errors:
/// - The target must reside in the low 16-bits of the address space,
/// otherwise an out-of-range error will be returned.
///
Pointer16,
/// A 16-bit PC-relative relocation.
///
/// Represents a data/control flow instruction using PC-relative addressing
/// to a target.
///
/// The fixup expression for this kind includes an implicit offset to account
/// for the PC (unlike the Delta edges) so that a PCRel16 with a target
/// T and addend zero is a call/branch to the start (offset zero) of T.
///
/// Fixup expression:
/// Fixup <- Target - (Fixup + 4) + Addend : int16
///
/// Errors:
/// - The result of the fixup expression must fit into an int16, otherwise
/// an out-of-range error will be returned.
///
PCRel16,
/// A 32-bit delta.
///
/// Delta from the fixup to the target.
///
/// Fixup expression:
/// Fixup <- Target - Fixup + Addend : int64
///
/// Errors:
/// - The result of the fixup expression must fit into an int32, otherwise
/// an out-of-range error will be returned.
Delta32,
/// A 32-bit GOT delta.
///
/// Delta from the global offset table to the target.
///
/// Fixup expression:
/// Fixup <- Target - GOTSymbol + Addend : int32
///
/// Errors:
/// - *ASSERTION* Failure to a null pointer GOTSymbol, which the GOT section
/// symbol was not been defined.
Delta32FromGOT,
/// A GOT entry offset within GOT getter/constructor, transformed to
/// Delta32FromGOT pointing at the GOT entry for the original target.
///
/// Indicates that this edge should be transformed into a Delta32FromGOT
/// targeting the GOT entry for the edge's current target, maintaining the
/// same addend.
/// A GOT entry for the target should be created if one does not already
/// exist.
///
/// Edges of this kind are usually handled by a GOT builder pass inserted by
/// default
///
/// Fixup expression:
/// NONE
///
/// Errors:
/// - *ASSERTION* Failure to handle edges of this kind prior to the fixup
/// phase will result in an assert/unreachable during the fixup phase
RequestGOTAndTransformToDelta32FromGOT,
/// A 32-bit PC-relative branch.
///
/// Represents a PC-relative call or branch to a target. This can be used to
/// identify, record, and/or patch call sites.
///
/// The fixup expression for this kind includes an implicit offset to account
/// for the PC (unlike the Delta edges) so that a Branch32PCRel with a target
/// T and addend zero is a call/branch to the start (offset zero) of T.
///
/// Fixup expression:
/// Fixup <- Target - (Fixup + 4) + Addend : int32
///
/// Errors:
/// - The result of the fixup expression must fit into an int32, otherwise
/// an out-of-range error will be returned.
///
BranchPCRel32,
/// A 32-bit PC-relative branch to a pointer jump stub.
///
/// The target of this relocation should be a pointer jump stub of the form:
///
/// \code{.s}
/// .text
/// jmp *tgtptr
/// ; ...
///
/// .data
/// tgtptr:
/// .quad 0
/// \endcode
///
/// This edge kind has the same fixup expression as BranchPCRel32, but further
/// identifies the call/branch as being to a pointer jump stub. For edges of
/// this kind the jump stub should not be bypassed (use
/// BranchPCRel32ToPtrJumpStubBypassable for that), but the pointer location
/// target may be recorded to allow manipulation at runtime.
///
/// Fixup expression:
/// Fixup <- Target - Fixup + Addend - 4 : int32
///
/// Errors:
/// - The result of the fixup expression must fit into an int32, otherwise
/// an out-of-range error will be returned.
///
BranchPCRel32ToPtrJumpStub,
/// A relaxable version of BranchPCRel32ToPtrJumpStub.
///
/// The edge kind has the same fixup expression as BranchPCRel32ToPtrJumpStub,
/// but identifies the call/branch as being to a pointer jump stub that may be
/// bypassed with a direct jump to the ultimate target if the ultimate target
/// is within range of the fixup location.
///
/// Fixup expression:
/// Fixup <- Target - Fixup + Addend - 4: int32
///
/// Errors:
/// - The result of the fixup expression must fit into an int32, otherwise
/// an out-of-range error will be returned.
///
BranchPCRel32ToPtrJumpStubBypassable,
};
/// Returns a string name for the given i386 edge. For debugging purposes
/// only
const char *getEdgeKindName(Edge::Kind K);
/// Apply fixup expression for edge to block content.
inline Error applyFixup(LinkGraph &G, Block &B, const Edge &E,
const Symbol *GOTSymbol) {
using namespace i386;
using namespace llvm::support;
char *BlockWorkingMem = B.getAlreadyMutableContent().data();
char *FixupPtr = BlockWorkingMem + E.getOffset();
auto FixupAddress = B.getAddress() + E.getOffset();
switch (E.getKind()) {
case i386::None: {
break;
}
case i386::Pointer32: {
uint32_t Value = E.getTarget().getAddress().getValue() + E.getAddend();
*(ulittle32_t *)FixupPtr = Value;
break;
}
case i386::PCRel32: {
int32_t Value =
E.getTarget().getAddress() - (FixupAddress + 4) + E.getAddend();
*(little32_t *)FixupPtr = Value;
break;
}
case i386::Pointer16: {
uint32_t Value = E.getTarget().getAddress().getValue() + E.getAddend();
if (LLVM_LIKELY(isUInt<16>(Value)))
*(ulittle16_t *)FixupPtr = Value;
else
return makeTargetOutOfRangeError(G, B, E);
break;
}
case i386::PCRel16: {
int32_t Value =
E.getTarget().getAddress() - (FixupAddress + 4) + E.getAddend();
if (LLVM_LIKELY(isInt<16>(Value)))
*(little16_t *)FixupPtr = Value;
else
return makeTargetOutOfRangeError(G, B, E);
break;
}
case i386::Delta32: {
int32_t Value = E.getTarget().getAddress() - FixupAddress + E.getAddend();
*(little32_t *)FixupPtr = Value;
break;
}
case i386::Delta32FromGOT: {
assert(GOTSymbol && "No GOT section symbol");
int32_t Value =
E.getTarget().getAddress() - GOTSymbol->getAddress() + E.getAddend();
*(little32_t *)FixupPtr = Value;
break;
}
case i386::BranchPCRel32:
case i386::BranchPCRel32ToPtrJumpStub:
case i386::BranchPCRel32ToPtrJumpStubBypassable: {
int32_t Value =
E.getTarget().getAddress() - (FixupAddress + 4) + E.getAddend();
*(little32_t *)FixupPtr = Value;
break;
}
default:
return make_error<JITLinkError>(
"In graph " + G.getName() + ", section " + B.getSection().getName() +
" unsupported edge kind " + getEdgeKindName(E.getKind()));
}
return Error::success();
}
/// i386 pointer size.
constexpr uint32_t PointerSize = 4;
/// i386 null pointer content.
extern const char NullPointerContent[PointerSize];
/// i386 pointer jump stub content.
///
/// Contains the instruction sequence for an indirect jump via an in-memory
/// pointer:
/// jmpq *ptr
extern const char PointerJumpStubContent[6];
/// Creates a new pointer block in the given section and returns an anonymous
/// symbol pointing to it.
///
/// If InitialTarget is given then an Pointer32 relocation will be added to the
/// block pointing at InitialTarget.
///
/// The pointer block will have the following default values:
/// alignment: 32-bit
/// alignment-offset: 0
/// address: highest allowable (~7U)
inline Symbol &createAnonymousPointer(LinkGraph &G, Section &PointerSection,
Symbol *InitialTarget = nullptr,
uint64_t InitialAddend = 0) {
auto &B = G.createContentBlock(PointerSection, NullPointerContent,
orc::ExecutorAddr(), 8, 0);
if (InitialTarget)
B.addEdge(Pointer32, 0, *InitialTarget, InitialAddend);
return G.addAnonymousSymbol(B, 0, PointerSize, false, false);
}
/// Create a jump stub block that jumps via the pointer at the given symbol.
///
/// The stub block will have the following default values:
/// alignment: 8-bit
/// alignment-offset: 0
/// address: highest allowable: (~5U)
inline Block &createPointerJumpStubBlock(LinkGraph &G, Section &StubSection,
Symbol &PointerSymbol) {
auto &B = G.createContentBlock(StubSection, PointerJumpStubContent,
orc::ExecutorAddr(), 8, 0);
B.addEdge(Pointer32,
// Offset is 2 because the the first 2 bytes of the
// jump stub block are {0xff, 0x25} -- an indirect absolute
// jump.
2, PointerSymbol, 0);
return B;
}
/// Create a jump stub that jumps via the pointer at the given symbol and
/// an anonymous symbol pointing to it. Return the anonymous symbol.
///
/// The stub block will be created by createPointerJumpStubBlock.
inline Symbol &createAnonymousPointerJumpStub(LinkGraph &G,
Section &StubSection,
Symbol &PointerSymbol) {
return G.addAnonymousSymbol(
createPointerJumpStubBlock(G, StubSection, PointerSymbol), 0, 6, true,
false);
}
/// Global Offset Table Builder.
class GOTTableManager : public TableManager<GOTTableManager> {
public:
static StringRef getSectionName() { return "$__GOT"; }
bool visitEdge(LinkGraph &G, Block *B, Edge &E) {
Edge::Kind KindToSet = Edge::Invalid;
switch (E.getKind()) {
case i386::Delta32FromGOT: {
// we need to make sure that the GOT section exists, but don't otherwise
// need to fix up this edge
getGOTSection(G);
return false;
}
case i386::RequestGOTAndTransformToDelta32FromGOT:
KindToSet = i386::Delta32FromGOT;
break;
default:
return false;
}
assert(KindToSet != Edge::Invalid &&
"Fell through switch, but no new kind to set");
DEBUG_WITH_TYPE("jitlink", {
dbgs() << " Fixing " << G.getEdgeKindName(E.getKind()) << " edge at "
<< B->getFixupAddress(E) << " (" << B->getAddress() << " + "
<< formatv("{0:x}", E.getOffset()) << ")\n";
});
E.setKind(KindToSet);
E.setTarget(getEntryForTarget(G, E.getTarget()));
return true;
}
Symbol &createEntry(LinkGraph &G, Symbol &Target) {
return createAnonymousPointer(G, getGOTSection(G), &Target);
}
private:
Section &getGOTSection(LinkGraph &G) {
if (!GOTSection)
GOTSection = &G.createSection(getSectionName(), orc::MemProt::Read);
return *GOTSection;
}
Section *GOTSection = nullptr;
};
/// Procedure Linkage Table Builder.
class PLTTableManager : public TableManager<PLTTableManager> {
public:
PLTTableManager(GOTTableManager &GOT) : GOT(GOT) {}
static StringRef getSectionName() { return "$__STUBS"; }
bool visitEdge(LinkGraph &G, Block *B, Edge &E) {
if (E.getKind() == i386::BranchPCRel32 && !E.getTarget().isDefined()) {
DEBUG_WITH_TYPE("jitlink", {
dbgs() << " Fixing " << G.getEdgeKindName(E.getKind()) << " edge at "
<< B->getFixupAddress(E) << " (" << B->getAddress() << " + "
<< formatv("{0:x}", E.getOffset()) << ")\n";
});
// Set the edge kind to Branch32ToPtrJumpStubBypassable to enable it to
// be optimized when the target is in-range.
E.setKind(i386::BranchPCRel32ToPtrJumpStubBypassable);
E.setTarget(getEntryForTarget(G, E.getTarget()));
return true;
}
return false;
}
Symbol &createEntry(LinkGraph &G, Symbol &Target) {
return createAnonymousPointerJumpStub(G, getStubsSection(G),
GOT.getEntryForTarget(G, Target));
}
public:
Section &getStubsSection(LinkGraph &G) {
if (!PLTSection)
PLTSection = &G.createSection(getSectionName(),
orc::MemProt::Read | orc::MemProt::Exec);
return *PLTSection;
}
GOTTableManager &GOT;
Section *PLTSection = nullptr;
};
/// Optimize the GOT and Stub relocations if the edge target address is in range
/// 1. PCRel32GOTLoadRelaxable. For this edge kind, if the target is in range,
/// then replace GOT load with lea. (THIS IS UNIMPLEMENTED RIGHT NOW!)
/// 2. BranchPCRel32ToPtrJumpStubRelaxable. For this edge kind, if the target is
/// in range, replace a indirect jump by plt stub with a direct jump to the
/// target
Error optimizeGOTAndStubAccesses(LinkGraph &G);
} // namespace llvm::jitlink::i386
#endif // LLVM_EXECUTIONENGINE_JITLINK_I386_H
PK iwFZ �4?� � & ExecutionEngine/JITLink/JITLinkDylib.hnu �[��� //===-- JITLinkDylib.h - JITLink Dylib type ---------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Defines the JITLinkDylib API.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_JITLINKDYLIB_H
#define LLVM_EXECUTIONENGINE_JITLINK_JITLINKDYLIB_H
#include <string>
namespace llvm {
namespace jitlink {
class JITLinkDylib {
public:
JITLinkDylib(std::string Name) : Name(std::move(Name)) {}
/// Get the name for this JITLinkDylib.
const std::string &getName() const { return Name; }
private:
std::string Name;
};
} // end namespace jitlink
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_JITLINKDYLIB_H
PK iwFZuwbh0 0 $ ExecutionEngine/JITLink/ELF_x86_64.hnu �[��� //===--- ELF_x86_64.h - JIT link functions for ELF/x86-64 ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// jit-link functions for ELF/x86-64.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_ELF_X86_64_H
#define LLVM_EXECUTIONENGINE_JITLINK_ELF_X86_64_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
namespace llvm {
namespace jitlink {
/// Create a LinkGraph from an ELF/x86-64 relocatable object.
///
/// Note: The graph does not take ownership of the underlying buffer, nor copy
/// its contents. The caller is responsible for ensuring that the object buffer
/// outlives the graph.
Expected<std::unique_ptr<LinkGraph>>
createLinkGraphFromELFObject_x86_64(MemoryBufferRef ObjectBuffer);
/// jit-link the given object buffer, which must be a ELF x86-64 object file.
void link_ELF_x86_64(std::unique_ptr<LinkGraph> G,
std::unique_ptr<JITLinkContext> Ctx);
} // end namespace jitlink
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_ELF_X86_64_H
PK iwFZ�|U� ( ExecutionEngine/JITLink/EHFrameSupport.hnu �[��� //===--------- EHFrameSupport.h - JITLink eh-frame utils --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// EHFrame registration support for JITLink.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_EHFRAMESUPPORT_H
#define LLVM_EXECUTIONENGINE_JITLINK_EHFRAMESUPPORT_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
#include "llvm/ExecutionEngine/JITSymbol.h"
#include "llvm/Support/Error.h"
#include "llvm/TargetParser/Triple.h"
namespace llvm {
namespace jitlink {
/// Inspect an eh-frame CFI record.
class EHFrameCFIBlockInspector {
public:
/// Identify CFI record type and edges based on number and order of edges
/// in the given block only. This assumes that the block contains one CFI
/// record that has already been split out and fixed by the
/// DWARFRecordSplitter and EHFrameEdgeFixer passes.
///
/// Zero or one outgoing edges: Record is CIE. If present, edge points to
/// personality.
///
/// Two or three outgoing edges: Record is an FDE. First edge points to CIE,
/// second to PC-begin, third (if present) to LSDA.
///
/// It is illegal to call this function on a block with four or more edges.
static EHFrameCFIBlockInspector FromEdgeScan(Block &B);
/// Returns true if this frame is an FDE, false for a CIE.
bool isFDE() const { return CIEEdge != nullptr; }
/// Returns true if this frame is a CIE, false for an FDE.
bool isCIE() const { return CIEEdge == nullptr; }
/// If this is a CIE record, returns the Edge pointing at the personality
/// function, if any.
/// It is illegal to call this method on FDE records.
Edge *getPersonalityEdge() const {
assert(isCIE() && "CFI record is not a CIE");
return PersonalityEdge;
}
/// If this is an FDE record, returns the Edge pointing to the CIE.
/// If this is a CIE record, returns null.
///
/// The result is not valid if any modification has been made to the block
/// after parsing.
Edge *getCIEEdge() const { return CIEEdge; }
/// If this is an FDE record, returns the Edge pointing at the PC-begin
/// symbol.
/// If this a CIE record, returns null.
Edge *getPCBeginEdge() const { return PCBeginEdge; }
/// If this is an FDE record, returns the Edge pointing at the LSDA, if any.
/// It is illegal to call this method on CIE records.
Edge *getLSDAEdge() const {
assert(isFDE() && "CFI record is not an FDE");
return LSDAEdge;
}
private:
EHFrameCFIBlockInspector(Edge *PersonalityEdge);
EHFrameCFIBlockInspector(Edge &CIEEdge, Edge &PCBeginEdge, Edge *LSDAEdge);
Edge *CIEEdge = nullptr;
Edge *PCBeginEdge = nullptr;
union {
Edge *PersonalityEdge;
Edge *LSDAEdge;
};
};
/// Supports registration/deregistration of EH-frames in a target process.
class EHFrameRegistrar {
public:
virtual ~EHFrameRegistrar();
virtual Error registerEHFrames(orc::ExecutorAddrRange EHFrameSection) = 0;
virtual Error deregisterEHFrames(orc::ExecutorAddrRange EHFrameSection) = 0;
};
/// Registers / Deregisters EH-frames in the current process.
class InProcessEHFrameRegistrar final : public EHFrameRegistrar {
public:
Error registerEHFrames(orc::ExecutorAddrRange EHFrameSection) override;
Error deregisterEHFrames(orc::ExecutorAddrRange EHFrameSection) override;
};
using StoreFrameRangeFunction = std::function<void(
orc::ExecutorAddr EHFrameSectionAddr, size_t EHFrameSectionSize)>;
/// Creates a pass that records the address and size of the EH frame section.
/// If no eh-frame section is found then the address and size will both be given
/// as zero.
///
/// Authors of JITLinkContexts can use this function to register a post-fixup
/// pass that records the range of the eh-frame section. This range can
/// be used after finalization to register and deregister the frame.
LinkGraphPassFunction
createEHFrameRecorderPass(const Triple &TT,
StoreFrameRangeFunction StoreFrameRange);
} // end namespace jitlink
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_EHFRAMESUPPORT_H
PK iwFZ�}�+ + ExecutionEngine/JITLink/ELF.hnu �[��� //===------- ELF.h - Generic JIT link function for ELF ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Generic jit-link functions for ELF.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_ELF_H
#define LLVM_EXECUTIONENGINE_JITLINK_ELF_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
namespace llvm {
namespace jitlink {
/// Create a LinkGraph from an ELF relocatable object.
///
/// Note: The graph does not take ownership of the underlying buffer, nor copy
/// its contents. The caller is responsible for ensuring that the object buffer
/// outlives the graph.
Expected<std::unique_ptr<LinkGraph>>
createLinkGraphFromELFObject(MemoryBufferRef ObjectBuffer);
/// Link the given graph.
///
/// Uses conservative defaults for GOT and stub handling based on the target
/// platform.
void link_ELF(std::unique_ptr<LinkGraph> G,
std::unique_ptr<JITLinkContext> Ctx);
} // end namespace jitlink
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_ELF_H
PK iwFZ˲h�� � ! ExecutionEngine/JITLink/JITLink.hnu �[��� //===------------ JITLink.h - JIT linker functionality ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Contains generic JIT-linker types.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITLINK_JITLINK_H
#define LLVM_EXECUTIONENGINE_JITLINK_JITLINK_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ExecutionEngine/JITLink/JITLinkMemoryManager.h"
#include "llvm/ExecutionEngine/JITSymbol.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorSymbolDef.h"
#include "llvm/ExecutionEngine/Orc/Shared/MemoryFlags.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/BinaryStreamReader.h"
#include "llvm/Support/BinaryStreamWriter.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/FormatVariadic.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/TargetParser/SubtargetFeature.h"
#include "llvm/TargetParser/Triple.h"
#include <optional>
#include <map>
#include <string>
#include <system_error>
namespace llvm {
namespace jitlink {
class LinkGraph;
class Symbol;
class Section;
/// Base class for errors originating in JIT linker, e.g. missing relocation
/// support.
class JITLinkError : public ErrorInfo<JITLinkError> {
public:
static char ID;
JITLinkError(Twine ErrMsg) : ErrMsg(ErrMsg.str()) {}
void log(raw_ostream &OS) const override;
const std::string &getErrorMessage() const { return ErrMsg; }
std::error_code convertToErrorCode() const override;
private:
std::string ErrMsg;
};
/// Represents fixups and constraints in the LinkGraph.
class Edge {
public:
using Kind = uint8_t;
enum GenericEdgeKind : Kind {
Invalid, // Invalid edge value.
FirstKeepAlive, // Keeps target alive. Offset/addend zero.
KeepAlive = FirstKeepAlive, // Tag first edge kind that preserves liveness.
FirstRelocation // First architecture specific relocation.
};
using OffsetT = uint32_t;
using AddendT = int64_t;
Edge(Kind K, OffsetT Offset, Symbol &Target, AddendT Addend)
: Target(&Target), Offset(Offset), Addend(Addend), K(K) {}
OffsetT getOffset() const { return Offset; }
void setOffset(OffsetT Offset) { this->Offset = Offset; }
Kind getKind() const { return K; }
void setKind(Kind K) { this->K = K; }
bool isRelocation() const { return K >= FirstRelocation; }
Kind getRelocation() const {
assert(isRelocation() && "Not a relocation edge");
return K - FirstRelocation;
}
bool isKeepAlive() const { return K >= FirstKeepAlive; }
Symbol &getTarget() const { return *Target; }
void setTarget(Symbol &Target) { this->Target = &Target; }
AddendT getAddend() const { return Addend; }
void setAddend(AddendT Addend) { this->Addend = Addend; }
private:
Symbol *Target = nullptr;
OffsetT Offset = 0;
AddendT Addend = 0;
Kind K = 0;
};
/// Returns the string name of the given generic edge kind, or "unknown"
/// otherwise. Useful for debugging.
const char *getGenericEdgeKindName(Edge::Kind K);
/// Base class for Addressable entities (externals, absolutes, blocks).
class Addressable {
friend class LinkGraph;
protected:
Addressable(orc::ExecutorAddr Address, bool IsDefined)
: Address(Address), IsDefined(IsDefined), IsAbsolute(false) {}
Addressable(orc::ExecutorAddr Address)
: Address(Address), IsDefined(false), IsAbsolute(true) {
assert(!(IsDefined && IsAbsolute) &&
"Block cannot be both defined and absolute");
}
public:
Addressable(const Addressable &) = delete;
Addressable &operator=(const Addressable &) = default;
Addressable(Addressable &&) = delete;
Addressable &operator=(Addressable &&) = default;
orc::ExecutorAddr getAddress() const { return Address; }
void setAddress(orc::ExecutorAddr Address) { this->Address = Address; }
/// Returns true if this is a defined addressable, in which case you
/// can downcast this to a Block.
bool isDefined() const { return static_cast<bool>(IsDefined); }
bool isAbsolute() const { return static_cast<bool>(IsAbsolute); }
private:
void setAbsolute(bool IsAbsolute) {
assert(!IsDefined && "Cannot change the Absolute flag on a defined block");
this->IsAbsolute = IsAbsolute;
}
orc::ExecutorAddr Address;
uint64_t IsDefined : 1;
uint64_t IsAbsolute : 1;
protected:
// bitfields for Block, allocated here to improve packing.
uint64_t ContentMutable : 1;
uint64_t P2Align : 5;
uint64_t AlignmentOffset : 56;
};
using SectionOrdinal = unsigned;
/// An Addressable with content and edges.
class Block : public Addressable {
friend class LinkGraph;
private:
/// Create a zero-fill defined addressable.
Block(Section &Parent, orc::ExecutorAddrDiff Size, orc::ExecutorAddr Address,
uint64_t Alignment, uint64_t AlignmentOffset)
: Addressable(Address, true), Parent(&Parent), Size(Size) {
assert(isPowerOf2_64(Alignment) && "Alignment must be power of 2");
assert(AlignmentOffset < Alignment &&
"Alignment offset cannot exceed alignment");
assert(AlignmentOffset <= MaxAlignmentOffset &&
"Alignment offset exceeds maximum");
ContentMutable = false;
P2Align = Alignment ? llvm::countr_zero(Alignment) : 0;
this->AlignmentOffset = AlignmentOffset;
}
/// Create a defined addressable for the given content.
/// The Content is assumed to be non-writable, and will be copied when
/// mutations are required.
Block(Section &Parent, ArrayRef<char> Content, orc::ExecutorAddr Address,
uint64_t Alignment, uint64_t AlignmentOffset)
: Addressable(Address, true), Parent(&Parent), Data(Content.data()),
Size(Content.size()) {
assert(isPowerOf2_64(Alignment) && "Alignment must be power of 2");
assert(AlignmentOffset < Alignment &&
"Alignment offset cannot exceed alignment");
assert(AlignmentOffset <= MaxAlignmentOffset &&
"Alignment offset exceeds maximum");
ContentMutable = false;
P2Align = Alignment ? llvm::countr_zero(Alignment) : 0;
this->AlignmentOffset = AlignmentOffset;
}
/// Create a defined addressable for the given content.
/// The content is assumed to be writable, and the caller is responsible
/// for ensuring that it lives for the duration of the Block's lifetime.
/// The standard way to achieve this is to allocate it on the Graph's
/// allocator.
Block(Section &Parent, MutableArrayRef<char> Content,
orc::ExecutorAddr Address, uint64_t Alignment, uint64_t AlignmentOffset)
: Addressable(Address, true), Parent(&Parent), Data(Content.data()),
Size(Content.size()) {
assert(isPowerOf2_64(Alignment) && "Alignment must be power of 2");
assert(AlignmentOffset < Alignment &&
"Alignment offset cannot exceed alignment");
assert(AlignmentOffset <= MaxAlignmentOffset &&
"Alignment offset exceeds maximum");
ContentMutable = true;
P2Align = Alignment ? llvm::countr_zero(Alignment) : 0;
this->AlignmentOffset = AlignmentOffset;
}
public:
using EdgeVector = std::vector<Edge>;
using edge_iterator = EdgeVector::iterator;
using const_edge_iterator = EdgeVector::const_iterator;
Block(const Block &) = delete;
Block &operator=(const Block &) = delete;
Block(Block &&) = delete;
Block &operator=(Block &&) = delete;
/// Return the parent section for this block.
Section &getSection() const { return *Parent; }
/// Returns true if this is a zero-fill block.
///
/// If true, getSize is callable but getContent is not (the content is
/// defined to be a sequence of zero bytes of length Size).
bool isZeroFill() const { return !Data; }
/// Returns the size of this defined addressable.
size_t getSize() const { return Size; }
/// Returns the address range of this defined addressable.
orc::ExecutorAddrRange getRange() const {
return orc::ExecutorAddrRange(getAddress(), getSize());
}
/// Get the content for this block. Block must not be a zero-fill block.
ArrayRef<char> getContent() const {
assert(Data && "Block does not contain content");
return ArrayRef<char>(Data, Size);
}
/// Set the content for this block.
/// Caller is responsible for ensuring the underlying bytes are not
/// deallocated while pointed to by this block.
void setContent(ArrayRef<char> Content) {
assert(Content.data() && "Setting null content");
Data = Content.data();
Size = Content.size();
ContentMutable = false;
}
/// Get mutable content for this block.
///
/// If this Block's content is not already mutable this will trigger a copy
/// of the existing immutable content to a new, mutable buffer allocated using
/// LinkGraph::allocateContent.
MutableArrayRef<char> getMutableContent(LinkGraph &G);
/// Get mutable content for this block.
///
/// This block's content must already be mutable. It is a programmatic error
/// to call this on a block with immutable content -- consider using
/// getMutableContent instead.
MutableArrayRef<char> getAlreadyMutableContent() {
assert(Data && "Block does not contain content");
assert(ContentMutable && "Content is not mutable");
return MutableArrayRef<char>(const_cast<char *>(Data), Size);
}
/// Set mutable content for this block.
///
/// The caller is responsible for ensuring that the memory pointed to by
/// MutableContent is not deallocated while pointed to by this block.
void setMutableContent(MutableArrayRef<char> MutableContent) {
assert(MutableContent.data() && "Setting null content");
Data = MutableContent.data();
Size = MutableContent.size();
ContentMutable = true;
}
/// Returns true if this block's content is mutable.
///
/// This is primarily useful for asserting that a block is already in a
/// mutable state prior to modifying the content. E.g. when applying
/// fixups we expect the block to already be mutable as it should have been
/// copied to working memory.
bool isContentMutable() const { return ContentMutable; }
/// Get the alignment for this content.
uint64_t getAlignment() const { return 1ull << P2Align; }
/// Set the alignment for this content.
void setAlignment(uint64_t Alignment) {
assert(isPowerOf2_64(Alignment) && "Alignment must be a power of two");
P2Align = Alignment ? llvm::countr_zero(Alignment) : 0;
}
/// Get the alignment offset for this content.
uint64_t getAlignmentOffset() const { return AlignmentOffset; }
/// Set the alignment offset for this content.
void setAlignmentOffset(uint64_t AlignmentOffset) {
assert(AlignmentOffset < (1ull << P2Align) &&
"Alignment offset can't exceed alignment");
this->AlignmentOffset = AlignmentOffset;
}
/// Add an edge to this block.
void addEdge(Edge::Kind K, Edge::OffsetT Offset, Symbol &Target,
Edge::AddendT Addend) {
assert((K == Edge::KeepAlive || !isZeroFill()) &&
"Adding edge to zero-fill block?");
Edges.push_back(Edge(K, Offset, Target, Addend));
}
/// Add an edge by copying an existing one. This is typically used when
/// moving edges between blocks.
void addEdge(const Edge &E) { Edges.push_back(E); }
/// Return the list of edges attached to this content.
iterator_range<edge_iterator> edges() {
return make_range(Edges.begin(), Edges.end());
}
/// Returns the list of edges attached to this content.
iterator_range<const_edge_iterator> edges() const {
return make_range(Edges.begin(), Edges.end());
}
/// Return the size of the edges list.
size_t edges_size() const { return Edges.size(); }
/// Returns true if the list of edges is empty.
bool edges_empty() const { return Edges.empty(); }
/// Remove the edge pointed to by the given iterator.
/// Returns an iterator to the new next element.
edge_iterator removeEdge(edge_iterator I) { return Edges.erase(I); }
/// Returns the address of the fixup for the given edge, which is equal to
/// this block's address plus the edge's offset.
orc::ExecutorAddr getFixupAddress(const Edge &E) const {
return getAddress() + E.getOffset();
}
private:
static constexpr uint64_t MaxAlignmentOffset = (1ULL << 56) - 1;
void setSection(Section &Parent) { this->Parent = &Parent; }
Section *Parent;
const char *Data = nullptr;
size_t Size = 0;
std::vector<Edge> Edges;
};
// Align an address to conform with block alignment requirements.
inline uint64_t alignToBlock(uint64_t Addr, const Block &B) {
uint64_t Delta = (B.getAlignmentOffset() - Addr) % B.getAlignment();
return Addr + Delta;
}
// Align a orc::ExecutorAddr to conform with block alignment requirements.
inline orc::ExecutorAddr alignToBlock(orc::ExecutorAddr Addr, const Block &B) {
return orc::ExecutorAddr(alignToBlock(Addr.getValue(), B));
}
// Returns true if the given blocks contains exactly one valid c-string.
// Zero-fill blocks of size 1 count as valid empty strings. Content blocks
// must end with a zero, and contain no zeros before the end.
bool isCStringBlock(Block &B);
/// Describes symbol linkage. This can be used to resolve definition clashes.
enum class Linkage : uint8_t {
Strong,
Weak,
};
/// Holds target-specific properties for a symbol.
using TargetFlagsType = uint8_t;
/// For errors and debugging output.
const char *getLinkageName(Linkage L);
/// Defines the scope in which this symbol should be visible:
/// Default -- Visible in the public interface of the linkage unit.
/// Hidden -- Visible within the linkage unit, but not exported from it.
/// Local -- Visible only within the LinkGraph.
enum class Scope : uint8_t {
Default,
Hidden,
Local
};
/// For debugging output.
const char *getScopeName(Scope S);
raw_ostream &operator<<(raw_ostream &OS, const Block &B);
/// Symbol representation.
///
/// Symbols represent locations within Addressable objects.
/// They can be either Named or Anonymous.
/// Anonymous symbols have neither linkage nor visibility, and must point at
/// ContentBlocks.
/// Named symbols may be in one of four states:
/// - Null: Default initialized. Assignable, but otherwise unusable.
/// - Defined: Has both linkage and visibility and points to a ContentBlock
/// - Common: Has both linkage and visibility, points to a null Addressable.
/// - External: Has neither linkage nor visibility, points to an external
/// Addressable.
///
class Symbol {
friend class LinkGraph;
private:
Symbol(Addressable &Base, orc::ExecutorAddrDiff Offset, StringRef Name,
orc::ExecutorAddrDiff Size, Linkage L, Scope S, bool IsLive,
bool IsCallable)
: Name(Name), Base(&Base), Offset(Offset), WeakRef(0), Size(Size) {
assert(Offset <= MaxOffset && "Offset out of range");
setLinkage(L);
setScope(S);
setLive(IsLive);
setCallable(IsCallable);
setTargetFlags(TargetFlagsType{});
}
static Symbol &constructExternal(BumpPtrAllocator &Allocator,
Addressable &Base, StringRef Name,
orc::ExecutorAddrDiff Size, Linkage L,
bool WeaklyReferenced) {
assert(!Base.isDefined() &&
"Cannot create external symbol from defined block");
assert(!Name.empty() && "External symbol name cannot be empty");
auto *Sym = Allocator.Allocate<Symbol>();
new (Sym) Symbol(Base, 0, Name, Size, L, Scope::Default, false, false);
Sym->setWeaklyReferenced(WeaklyReferenced);
return *Sym;
}
static Symbol &constructAbsolute(BumpPtrAllocator &Allocator,
Addressable &Base, StringRef Name,
orc::ExecutorAddrDiff Size, Linkage L,
Scope S, bool IsLive) {
assert(!Base.isDefined() &&
"Cannot create absolute symbol from a defined block");
auto *Sym = Allocator.Allocate<Symbol>();
new (Sym) Symbol(Base, 0, Name, Size, L, S, IsLive, false);
return *Sym;
}
static Symbol &constructAnonDef(BumpPtrAllocator &Allocator, Block &Base,
orc::ExecutorAddrDiff Offset,
orc::ExecutorAddrDiff Size, bool IsCallable,
bool IsLive) {
assert((Offset + Size) <= Base.getSize() &&
"Symbol extends past end of block");
auto *Sym = Allocator.Allocate<Symbol>();
new (Sym) Symbol(Base, Offset, StringRef(), Size, Linkage::Strong,
Scope::Local, IsLive, IsCallable);
return *Sym;
}
static Symbol &constructNamedDef(BumpPtrAllocator &Allocator, Block &Base,
orc::ExecutorAddrDiff Offset, StringRef Name,
orc::ExecutorAddrDiff Size, Linkage L,
Scope S, bool IsLive, bool IsCallable) {
assert((Offset + Size) <= Base.getSize() &&
"Symbol extends past end of block");
assert(!Name.empty() && "Name cannot be empty");
auto *Sym = Allocator.Allocate<Symbol>();
new (Sym) Symbol(Base, Offset, Name, Size, L, S, IsLive, IsCallable);
return *Sym;
}
public:
/// Create a null Symbol. This allows Symbols to be default initialized for
/// use in containers (e.g. as map values). Null symbols are only useful for
/// assigning to.
Symbol() = default;
// Symbols are not movable or copyable.
Symbol(const Symbol &) = delete;
Symbol &operator=(const Symbol &) = delete;
Symbol(Symbol &&) = delete;
Symbol &operator=(Symbol &&) = delete;
/// Returns true if this symbol has a name.
bool hasName() const { return !Name.empty(); }
/// Returns the name of this symbol (empty if the symbol is anonymous).
StringRef getName() const {
assert((!Name.empty() || getScope() == Scope::Local) &&
"Anonymous symbol has non-local scope");
return Name;
}
/// Rename this symbol. The client is responsible for updating scope and
/// linkage if this name-change requires it.
void setName(StringRef Name) { this->Name = Name; }
/// Returns true if this Symbol has content (potentially) defined within this
/// object file (i.e. is anything but an external or absolute symbol).
bool isDefined() const {
assert(Base && "Attempt to access null symbol");
return Base->isDefined();
}
/// Returns true if this symbol is live (i.e. should be treated as a root for
/// dead stripping).
bool isLive() const {
assert(Base && "Attempting to access null symbol");
return IsLive;
}
/// Set this symbol's live bit.
void setLive(bool IsLive) { this->IsLive = IsLive; }
/// Returns true is this symbol is callable.
bool isCallable() const { return IsCallable; }
/// Set this symbol's callable bit.
void setCallable(bool IsCallable) { this->IsCallable = IsCallable; }
/// Returns true if the underlying addressable is an unresolved external.
bool isExternal() const {
assert(Base && "Attempt to access null symbol");
return !Base->isDefined() && !Base->isAbsolute();
}
/// Returns true if the underlying addressable is an absolute symbol.
bool isAbsolute() const {
assert(Base && "Attempt to access null symbol");
return Base->isAbsolute();
}
/// Return the addressable that this symbol points to.
Addressable &getAddressable() {
assert(Base && "Cannot get underlying addressable for null symbol");
return *Base;
}
/// Return the addressable that this symbol points to.
const Addressable &getAddressable() const {
assert(Base && "Cannot get underlying addressable for null symbol");
return *Base;
}
/// Return the Block for this Symbol (Symbol must be defined).
Block &getBlock() {
assert(Base && "Cannot get block for null symbol");
assert(Base->isDefined() && "Not a defined symbol");
return static_cast<Block &>(*Base);
}
/// Return the Block for this Symbol (Symbol must be defined).
const Block &getBlock() const {
assert(Base && "Cannot get block for null symbol");
assert(Base->isDefined() && "Not a defined symbol");
return static_cast<const Block &>(*Base);
}
/// Returns the offset for this symbol within the underlying addressable.
orc::ExecutorAddrDiff getOffset() const { return Offset; }
void setOffset(orc::ExecutorAddrDiff NewOffset) {
assert(NewOffset < getBlock().getSize() && "Offset out of range");
Offset = NewOffset;
}
/// Returns the address of this symbol.
orc::ExecutorAddr getAddress() const { return Base->getAddress() + Offset; }
/// Returns the size of this symbol.
orc::ExecutorAddrDiff getSize() const { return Size; }
/// Set the size of this symbol.
void setSize(orc::ExecutorAddrDiff Size) {
assert(Base && "Cannot set size for null Symbol");
assert((Size == 0 || Base->isDefined()) &&
"Non-zero size can only be set for defined symbols");
assert((Offset + Size <= static_cast<const Block &>(*Base).getSize()) &&
"Symbol size cannot extend past the end of its containing block");
this->Size = Size;
}
/// Returns the address range of this symbol.
orc::ExecutorAddrRange getRange() const {
return orc::ExecutorAddrRange(getAddress(), getSize());
}
/// Returns true if this symbol is backed by a zero-fill block.
/// This method may only be called on defined symbols.
bool isSymbolZeroFill() const { return getBlock().isZeroFill(); }
/// Returns the content in the underlying block covered by this symbol.
/// This method may only be called on defined non-zero-fill symbols.
ArrayRef<char> getSymbolContent() const {
return getBlock().getContent().slice(Offset, Size);
}
/// Get the linkage for this Symbol.
Linkage getLinkage() const { return static_cast<Linkage>(L); }
/// Set the linkage for this Symbol.
void setLinkage(Linkage L) {
assert((L == Linkage::Strong || (!Base->isAbsolute() && !Name.empty())) &&
"Linkage can only be applied to defined named symbols");
this->L = static_cast<uint8_t>(L);
}
/// Get the visibility for this Symbol.
Scope getScope() const { return static_cast<Scope>(S); }
/// Set the visibility for this Symbol.
void setScope(Scope S) {
assert((!Name.empty() || S == Scope::Local) &&
"Can not set anonymous symbol to non-local scope");
assert((S != Scope::Local || Base->isDefined() || Base->isAbsolute()) &&
"Invalid visibility for symbol type");
this->S = static_cast<uint8_t>(S);
}
/// Check wehther the given target flags are set for this Symbol.
bool hasTargetFlags(TargetFlagsType Flags) const {
return static_cast<TargetFlagsType>(TargetFlags) & Flags;
}
/// Set the target flags for this Symbol.
void setTargetFlags(TargetFlagsType Flags) {
assert(Flags <= 1 && "Add more bits to store more than single flag");
TargetFlags = Flags;
}
/// Returns true if this is a weakly referenced external symbol.
/// This method may only be called on external symbols.
bool isWeaklyReferenced() const {
assert(isExternal() && "isWeaklyReferenced called on non-external");
return WeakRef;
}
/// Set the WeaklyReferenced value for this symbol.
/// This method may only be called on external symbols.
void setWeaklyReferenced(bool WeakRef) {
assert(isExternal() && "setWeaklyReferenced called on non-external");
this->WeakRef = WeakRef;
}
private:
void makeExternal(Addressable &A) {
assert(!A.isDefined() && !A.isAbsolute() &&
"Attempting to make external with defined or absolute block");
Base = &A;
Offset = 0;
setScope(Scope::Default);
IsLive = 0;
// note: Size, Linkage and IsCallable fields left unchanged.
}
void makeAbsolute(Addressable &A) {
assert(!A.isDefined() && A.isAbsolute() &&
"Attempting to make absolute with defined or external block");
Base = &A;
Offset = 0;
}
void setBlock(Block &B) { Base = &B; }
static constexpr uint64_t MaxOffset = (1ULL << 59) - 1;
// FIXME: A char* or SymbolStringPtr may pack better.
StringRef Name;
Addressable *Base = nullptr;
uint64_t Offset : 57;
uint64_t L : 1;
uint64_t S : 2;
uint64_t IsLive : 1;
uint64_t IsCallable : 1;
uint64_t WeakRef : 1;
uint64_t TargetFlags : 1;
size_t Size = 0;
};
raw_ostream &operator<<(raw_ostream &OS, const Symbol &A);
void printEdge(raw_ostream &OS, const Block &B, const Edge &E,
StringRef EdgeKindName);
/// Represents an object file section.
class Section {
friend class LinkGraph;
private:
Section(StringRef Name, orc::MemProt Prot, SectionOrdinal SecOrdinal)
: Name(Name), Prot(Prot), SecOrdinal(SecOrdinal) {}
using SymbolSet = DenseSet<Symbol *>;
using BlockSet = DenseSet<Block *>;
public:
using symbol_iterator = SymbolSet::iterator;
using const_symbol_iterator = SymbolSet::const_iterator;
using block_iterator = BlockSet::iterator;
using const_block_iterator = BlockSet::const_iterator;
~Section();
// Sections are not movable or copyable.
Section(const Section &) = delete;
Section &operator=(const Section &) = delete;
Section(Section &&) = delete;
Section &operator=(Section &&) = delete;
/// Returns the name of this section.
StringRef getName() const { return Name; }
/// Returns the protection flags for this section.
orc::MemProt getMemProt() const { return Prot; }
/// Set the protection flags for this section.
void setMemProt(orc::MemProt Prot) { this->Prot = Prot; }
/// Get the memory lifetime policy for this section.
orc::MemLifetimePolicy getMemLifetimePolicy() const { return MLP; }
/// Set the memory lifetime policy for this section.
void setMemLifetimePolicy(orc::MemLifetimePolicy MLP) { this->MLP = MLP; }
/// Returns the ordinal for this section.
SectionOrdinal getOrdinal() const { return SecOrdinal; }
/// Returns true if this section is empty (contains no blocks or symbols).
bool empty() const { return Blocks.empty(); }
/// Returns an iterator over the blocks defined in this section.
iterator_range<block_iterator> blocks() {
return make_range(Blocks.begin(), Blocks.end());
}
/// Returns an iterator over the blocks defined in this section.
iterator_range<const_block_iterator> blocks() const {
return make_range(Blocks.begin(), Blocks.end());
}
/// Returns the number of blocks in this section.
BlockSet::size_type blocks_size() const { return Blocks.size(); }
/// Returns an iterator over the symbols defined in this section.
iterator_range<symbol_iterator> symbols() {
return make_range(Symbols.begin(), Symbols.end());
}
/// Returns an iterator over the symbols defined in this section.
iterator_range<const_symbol_iterator> symbols() const {
return make_range(Symbols.begin(), Symbols.end());
}
/// Return the number of symbols in this section.
SymbolSet::size_type symbols_size() const { return Symbols.size(); }
private:
void addSymbol(Symbol &Sym) {
assert(!Symbols.count(&Sym) && "Symbol is already in this section");
Symbols.insert(&Sym);
}
void removeSymbol(Symbol &Sym) {
assert(Symbols.count(&Sym) && "symbol is not in this section");
Symbols.erase(&Sym);
}
void addBlock(Block &B) {
assert(!Blocks.count(&B) && "Block is already in this section");
Blocks.insert(&B);
}
void removeBlock(Block &B) {
assert(Blocks.count(&B) && "Block is not in this section");
Blocks.erase(&B);
}
void transferContentTo(Section &DstSection) {
if (&DstSection == this)
return;
for (auto *S : Symbols)
DstSection.addSymbol(*S);
for (auto *B : Blocks)
DstSection.addBlock(*B);
Symbols.clear();
Blocks.clear();
}
StringRef Name;
orc::MemProt Prot;
orc::MemLifetimePolicy MLP = orc::MemLifetimePolicy::Standard;
SectionOrdinal SecOrdinal = 0;
BlockSet Blocks;
SymbolSet Symbols;
};
/// Represents a section address range via a pair of Block pointers
/// to the first and last Blocks in the section.
class SectionRange {
public:
SectionRange() = default;
SectionRange(const Section &Sec) {
if (Sec.blocks().empty())
return;
First = Last = *Sec.blocks().begin();
for (auto *B : Sec.blocks()) {
if (B->getAddress() < First->getAddress())
First = B;
if (B->getAddress() > Last->getAddress())
Last = B;
}
}
Block *getFirstBlock() const {
assert((!Last || First) && "First can not be null if end is non-null");
return First;
}
Block *getLastBlock() const {
assert((First || !Last) && "Last can not be null if start is non-null");
return Last;
}
bool empty() const {
assert((First || !Last) && "Last can not be null if start is non-null");
return !First;
}
orc::ExecutorAddr getStart() const {
return First ? First->getAddress() : orc::ExecutorAddr();
}
orc::ExecutorAddr getEnd() const {
return Last ? Last->getAddress() + Last->getSize() : orc::ExecutorAddr();
}
orc::ExecutorAddrDiff getSize() const { return getEnd() - getStart(); }
orc::ExecutorAddrRange getRange() const {
return orc::ExecutorAddrRange(getStart(), getEnd());
}
private:
Block *First = nullptr;
Block *Last = nullptr;
};
class LinkGraph {
private:
using SectionMap = DenseMap<StringRef, std::unique_ptr<Section>>;
using ExternalSymbolSet = DenseSet<Symbol *>;
using BlockSet = DenseSet<Block *>;
template <typename... ArgTs>
Addressable &createAddressable(ArgTs &&... Args) {
Addressable *A =
reinterpret_cast<Addressable *>(Allocator.Allocate<Addressable>());
new (A) Addressable(std::forward<ArgTs>(Args)...);
return *A;
}
void destroyAddressable(Addressable &A) {
A.~Addressable();
Allocator.Deallocate(&A);
}
template <typename... ArgTs> Block &createBlock(ArgTs &&... Args) {
Block *B = reinterpret_cast<Block *>(Allocator.Allocate<Block>());
new (B) Block(std::forward<ArgTs>(Args)...);
B->getSection().addBlock(*B);
return *B;
}
void destroyBlock(Block &B) {
B.~Block();
Allocator.Deallocate(&B);
}
void destroySymbol(Symbol &S) {
S.~Symbol();
Allocator.Deallocate(&S);
}
static iterator_range<Section::block_iterator> getSectionBlocks(Section &S) {
return S.blocks();
}
static iterator_range<Section::const_block_iterator>
getSectionConstBlocks(const Section &S) {
return S.blocks();
}
static iterator_range<Section::symbol_iterator>
getSectionSymbols(Section &S) {
return S.symbols();
}
static iterator_range<Section::const_symbol_iterator>
getSectionConstSymbols(const Section &S) {
return S.symbols();
}
struct GetSectionMapEntryValue {
Section &operator()(SectionMap::value_type &KV) const { return *KV.second; }
};
struct GetSectionMapEntryConstValue {
const Section &operator()(const SectionMap::value_type &KV) const {
return *KV.second;
}
};
public:
using external_symbol_iterator = ExternalSymbolSet::iterator;
using section_iterator =
mapped_iterator<SectionMap::iterator, GetSectionMapEntryValue>;
using const_section_iterator =
mapped_iterator<SectionMap::const_iterator, GetSectionMapEntryConstValue>;
template <typename OuterItrT, typename InnerItrT, typename T,
iterator_range<InnerItrT> getInnerRange(
typename OuterItrT::reference)>
class nested_collection_iterator
: public iterator_facade_base<
nested_collection_iterator<OuterItrT, InnerItrT, T, getInnerRange>,
std::forward_iterator_tag, T> {
public:
nested_collection_iterator() = default;
nested_collection_iterator(OuterItrT OuterI, OuterItrT OuterE)
: OuterI(OuterI), OuterE(OuterE),
InnerI(getInnerBegin(OuterI, OuterE)) {
moveToNonEmptyInnerOrEnd();
}
bool operator==(const nested_collection_iterator &RHS) const {
return (OuterI == RHS.OuterI) && (InnerI == RHS.InnerI);
}
T operator*() const {
assert(InnerI != getInnerRange(*OuterI).end() && "Dereferencing end?");
return *InnerI;
}
nested_collection_iterator operator++() {
++InnerI;
moveToNonEmptyInnerOrEnd();
return *this;
}
private:
static InnerItrT getInnerBegin(OuterItrT OuterI, OuterItrT OuterE) {
return OuterI != OuterE ? getInnerRange(*OuterI).begin() : InnerItrT();
}
void moveToNonEmptyInnerOrEnd() {
while (OuterI != OuterE && InnerI == getInnerRange(*OuterI).end()) {
++OuterI;
InnerI = getInnerBegin(OuterI, OuterE);
}
}
OuterItrT OuterI, OuterE;
InnerItrT InnerI;
};
using defined_symbol_iterator =
nested_collection_iterator<section_iterator, Section::symbol_iterator,
Symbol *, getSectionSymbols>;
using const_defined_symbol_iterator =
nested_collection_iterator<const_section_iterator,
Section::const_symbol_iterator, const Symbol *,
getSectionConstSymbols>;
using block_iterator =
nested_collection_iterator<section_iterator, Section::block_iterator,
Block *, getSectionBlocks>;
using const_block_iterator =
nested_collection_iterator<const_section_iterator,
Section::const_block_iterator, const Block *,
getSectionConstBlocks>;
using GetEdgeKindNameFunction = const char *(*)(Edge::Kind);
LinkGraph(std::string Name, const Triple &TT, SubtargetFeatures Features,
unsigned PointerSize, support::endianness Endianness,
GetEdgeKindNameFunction GetEdgeKindName)
: Name(std::move(Name)), TT(TT), Features(std::move(Features)),
PointerSize(PointerSize), Endianness(Endianness),
GetEdgeKindName(std::move(GetEdgeKindName)) {}
LinkGraph(std::string Name, const Triple &TT, unsigned PointerSize,
support::endianness Endianness,
GetEdgeKindNameFunction GetEdgeKindName)
: LinkGraph(std::move(Name), TT, SubtargetFeatures(), PointerSize,
Endianness, GetEdgeKindName) {}
LinkGraph(const LinkGraph &) = delete;
LinkGraph &operator=(const LinkGraph &) = delete;
LinkGraph(LinkGraph &&) = delete;
LinkGraph &operator=(LinkGraph &&) = delete;
/// Returns the name of this graph (usually the name of the original
/// underlying MemoryBuffer).
const std::string &getName() const { return Name; }
/// Returns the target triple for this Graph.
const Triple &getTargetTriple() const { return TT; }
/// Return the subtarget features for this Graph.
const SubtargetFeatures &getFeatures() const { return Features; }
/// Returns the pointer size for use in this graph.
unsigned getPointerSize() const { return PointerSize; }
/// Returns the endianness of content in this graph.
support::endianness getEndianness() const { return Endianness; }
const char *getEdgeKindName(Edge::Kind K) const { return GetEdgeKindName(K); }
/// Allocate a mutable buffer of the given size using the LinkGraph's
/// allocator.
MutableArrayRef<char> allocateBuffer(size_t Size) {
return {Allocator.Allocate<char>(Size), Size};
}
/// Allocate a copy of the given string using the LinkGraph's allocator.
/// This can be useful when renaming symbols or adding new content to the
/// graph.
MutableArrayRef<char> allocateContent(ArrayRef<char> Source) {
auto *AllocatedBuffer = Allocator.Allocate<char>(Source.size());
llvm::copy(Source, AllocatedBuffer);
return MutableArrayRef<char>(AllocatedBuffer, Source.size());
}
/// Allocate a copy of the given string using the LinkGraph's allocator.
/// This can be useful when renaming symbols or adding new content to the
/// graph.
///
/// Note: This Twine-based overload requires an extra string copy and an
/// extra heap allocation for large strings. The ArrayRef<char> overload
/// should be preferred where possible.
MutableArrayRef<char> allocateContent(Twine Source) {
SmallString<256> TmpBuffer;
auto SourceStr = Source.toStringRef(TmpBuffer);
auto *AllocatedBuffer = Allocator.Allocate<char>(SourceStr.size());
llvm::copy(SourceStr, AllocatedBuffer);
return MutableArrayRef<char>(AllocatedBuffer, SourceStr.size());
}
/// Allocate a copy of the given string using the LinkGraph's allocator.
///
/// The allocated string will be terminated with a null character, and the
/// returned MutableArrayRef will include this null character in the last
/// position.
MutableArrayRef<char> allocateCString(StringRef Source) {
char *AllocatedBuffer = Allocator.Allocate<char>(Source.size() + 1);
llvm::copy(Source, AllocatedBuffer);
AllocatedBuffer[Source.size()] = '\0';
return MutableArrayRef<char>(AllocatedBuffer, Source.size() + 1);
}
/// Allocate a copy of the given string using the LinkGraph's allocator.
///
/// The allocated string will be terminated with a null character, and the
/// returned MutableArrayRef will include this null character in the last
/// position.
///
/// Note: This Twine-based overload requires an extra string copy and an
/// extra heap allocation for large strings. The ArrayRef<char> overload
/// should be preferred where possible.
MutableArrayRef<char> allocateCString(Twine Source) {
SmallString<256> TmpBuffer;
auto SourceStr = Source.toStringRef(TmpBuffer);
auto *AllocatedBuffer = Allocator.Allocate<char>(SourceStr.size() + 1);
llvm::copy(SourceStr, AllocatedBuffer);
AllocatedBuffer[SourceStr.size()] = '\0';
return MutableArrayRef<char>(AllocatedBuffer, SourceStr.size() + 1);
}
/// Create a section with the given name, protection flags, and alignment.
Section &createSection(StringRef Name, orc::MemProt Prot) {
assert(!Sections.count(Name) && "Duplicate section name");
std::unique_ptr<Section> Sec(new Section(Name, Prot, Sections.size()));
return *Sections.insert(std::make_pair(Name, std::move(Sec))).first->second;
}
/// Create a content block.
Block &createContentBlock(Section &Parent, ArrayRef<char> Content,
orc::ExecutorAddr Address, uint64_t Alignment,
uint64_t AlignmentOffset) {
return createBlock(Parent, Content, Address, Alignment, AlignmentOffset);
}
/// Create a content block with initially mutable data.
Block &createMutableContentBlock(Section &Parent,
MutableArrayRef<char> MutableContent,
orc::ExecutorAddr Address,
uint64_t Alignment,
uint64_t AlignmentOffset) {
return createBlock(Parent, MutableContent, Address, Alignment,
AlignmentOffset);
}
/// Create a content block with initially mutable data of the given size.
/// Content will be allocated via the LinkGraph's allocateBuffer method.
/// By default the memory will be zero-initialized. Passing false for
/// ZeroInitialize will prevent this.
Block &createMutableContentBlock(Section &Parent, size_t ContentSize,
orc::ExecutorAddr Address,
uint64_t Alignment, uint64_t AlignmentOffset,
bool ZeroInitialize = true) {
auto Content = allocateBuffer(ContentSize);
if (ZeroInitialize)
memset(Content.data(), 0, Content.size());
return createBlock(Parent, Content, Address, Alignment, AlignmentOffset);
}
/// Create a zero-fill block.
Block &createZeroFillBlock(Section &Parent, orc::ExecutorAddrDiff Size,
orc::ExecutorAddr Address, uint64_t Alignment,
uint64_t AlignmentOffset) {
return createBlock(Parent, Size, Address, Alignment, AlignmentOffset);
}
/// Returns a BinaryStreamReader for the given block.
BinaryStreamReader getBlockContentReader(Block &B) {
ArrayRef<uint8_t> C(
reinterpret_cast<const uint8_t *>(B.getContent().data()), B.getSize());
return BinaryStreamReader(C, getEndianness());
}
/// Returns a BinaryStreamWriter for the given block.
/// This will call getMutableContent to obtain mutable content for the block.
BinaryStreamWriter getBlockContentWriter(Block &B) {
MutableArrayRef<uint8_t> C(
reinterpret_cast<uint8_t *>(B.getMutableContent(*this).data()),
B.getSize());
return BinaryStreamWriter(C, getEndianness());
}
/// Cache type for the splitBlock function.
using SplitBlockCache = std::optional<SmallVector<Symbol *, 8>>;
/// Splits block B at the given index which must be greater than zero.
/// If SplitIndex == B.getSize() then this function is a no-op and returns B.
/// If SplitIndex < B.getSize() then this function returns a new block
/// covering the range [ 0, SplitIndex ), and B is modified to cover the range
/// [ SplitIndex, B.size() ).
///
/// The optional Cache parameter can be used to speed up repeated calls to
/// splitBlock for a single block. If the value is None the cache will be
/// treated as uninitialized and splitBlock will populate it. Otherwise it
/// is assumed to contain the list of Symbols pointing at B, sorted in
/// descending order of offset.
///
/// Notes:
///
/// 1. splitBlock must be used with care. Splitting a block may cause
/// incoming edges to become invalid if the edge target subexpression
/// points outside the bounds of the newly split target block (E.g. an
/// edge 'S + 10 : Pointer64' where S points to a newly split block
/// whose size is less than 10). No attempt is made to detect invalidation
/// of incoming edges, as in general this requires context that the
/// LinkGraph does not have. Clients are responsible for ensuring that
/// splitBlock is not used in a way that invalidates edges.
///
/// 2. The newly introduced block will have a new ordinal which will be
/// higher than any other ordinals in the section. Clients are responsible
/// for re-assigning block ordinals to restore a compatible order if
/// needed.
///
/// 3. The cache is not automatically updated if new symbols are introduced
/// between calls to splitBlock. Any newly introduced symbols may be
/// added to the cache manually (descending offset order must be
/// preserved), or the cache can be set to None and rebuilt by
/// splitBlock on the next call.
Block &splitBlock(Block &B, size_t SplitIndex,
SplitBlockCache *Cache = nullptr);
/// Add an external symbol.
/// Some formats (e.g. ELF) allow Symbols to have sizes. For Symbols whose
/// size is not known, you should substitute '0'.
/// The IsWeaklyReferenced argument determines whether the symbol must be
/// present during lookup: Externals that are strongly referenced must be
/// found or an error will be emitted. Externals that are weakly referenced
/// are permitted to be undefined, in which case they are assigned an address
/// of 0.
Symbol &addExternalSymbol(StringRef Name, orc::ExecutorAddrDiff Size,
bool IsWeaklyReferenced) {
assert(llvm::count_if(ExternalSymbols,
[&](const Symbol *Sym) {
return Sym->getName() == Name;
}) == 0 &&
"Duplicate external symbol");
auto &Sym = Symbol::constructExternal(
Allocator, createAddressable(orc::ExecutorAddr(), false), Name, Size,
Linkage::Strong, IsWeaklyReferenced);
ExternalSymbols.insert(&Sym);
return Sym;
}
/// Add an absolute symbol.
Symbol &addAbsoluteSymbol(StringRef Name, orc::ExecutorAddr Address,
orc::ExecutorAddrDiff Size, Linkage L, Scope S,
bool IsLive) {
assert((S == Scope::Local || llvm::count_if(AbsoluteSymbols,
[&](const Symbol *Sym) {
return Sym->getName() == Name;
}) == 0) &&
"Duplicate absolute symbol");
auto &Sym = Symbol::constructAbsolute(Allocator, createAddressable(Address),
Name, Size, L, S, IsLive);
AbsoluteSymbols.insert(&Sym);
return Sym;
}
/// Add an anonymous symbol.
Symbol &addAnonymousSymbol(Block &Content, orc::ExecutorAddrDiff Offset,
orc::ExecutorAddrDiff Size, bool IsCallable,
bool IsLive) {
auto &Sym = Symbol::constructAnonDef(Allocator, Content, Offset, Size,
IsCallable, IsLive);
Content.getSection().addSymbol(Sym);
return Sym;
}
/// Add a named symbol.
Symbol &addDefinedSymbol(Block &Content, orc::ExecutorAddrDiff Offset,
StringRef Name, orc::ExecutorAddrDiff Size,
Linkage L, Scope S, bool IsCallable, bool IsLive) {
assert((S == Scope::Local || llvm::count_if(defined_symbols(),
[&](const Symbol *Sym) {
return Sym->getName() == Name;
}) == 0) &&
"Duplicate defined symbol");
auto &Sym = Symbol::constructNamedDef(Allocator, Content, Offset, Name,
Size, L, S, IsLive, IsCallable);
Content.getSection().addSymbol(Sym);
return Sym;
}
iterator_range<section_iterator> sections() {
return make_range(
section_iterator(Sections.begin(), GetSectionMapEntryValue()),
section_iterator(Sections.end(), GetSectionMapEntryValue()));
}
iterator_range<const_section_iterator> sections() const {
return make_range(
const_section_iterator(Sections.begin(),
GetSectionMapEntryConstValue()),
const_section_iterator(Sections.end(), GetSectionMapEntryConstValue()));
}
size_t sections_size() const { return Sections.size(); }
/// Returns the section with the given name if it exists, otherwise returns
/// null.
Section *findSectionByName(StringRef Name) {
auto I = Sections.find(Name);
if (I == Sections.end())
return nullptr;
return I->second.get();
}
iterator_range<block_iterator> blocks() {
auto Secs = sections();
return make_range(block_iterator(Secs.begin(), Secs.end()),
block_iterator(Secs.end(), Secs.end()));
}
iterator_range<const_block_iterator> blocks() const {
auto Secs = sections();
return make_range(const_block_iterator(Secs.begin(), Secs.end()),
const_block_iterator(Secs.end(), Secs.end()));
}
iterator_range<external_symbol_iterator> external_symbols() {
return make_range(ExternalSymbols.begin(), ExternalSymbols.end());
}
iterator_range<external_symbol_iterator> absolute_symbols() {
return make_range(AbsoluteSymbols.begin(), AbsoluteSymbols.end());
}
iterator_range<defined_symbol_iterator> defined_symbols() {
auto Secs = sections();
return make_range(defined_symbol_iterator(Secs.begin(), Secs.end()),
defined_symbol_iterator(Secs.end(), Secs.end()));
}
iterator_range<const_defined_symbol_iterator> defined_symbols() const {
auto Secs = sections();
return make_range(const_defined_symbol_iterator(Secs.begin(), Secs.end()),
const_defined_symbol_iterator(Secs.end(), Secs.end()));
}
/// Make the given symbol external (must not already be external).
///
/// Symbol size, linkage and callability will be left unchanged. Symbol scope
/// will be set to Default, and offset will be reset to 0.
void makeExternal(Symbol &Sym) {
assert(!Sym.isExternal() && "Symbol is already external");
if (Sym.isAbsolute()) {
assert(AbsoluteSymbols.count(&Sym) &&
"Sym is not in the absolute symbols set");
assert(Sym.getOffset() == 0 && "Absolute not at offset 0");
AbsoluteSymbols.erase(&Sym);
auto &A = Sym.getAddressable();
A.setAbsolute(false);
A.setAddress(orc::ExecutorAddr());
} else {
assert(Sym.isDefined() && "Sym is not a defined symbol");
Section &Sec = Sym.getBlock().getSection();
Sec.removeSymbol(Sym);
Sym.makeExternal(createAddressable(orc::ExecutorAddr(), false));
}
ExternalSymbols.insert(&Sym);
}
/// Make the given symbol an absolute with the given address (must not already
/// be absolute).
///
/// The symbol's size, linkage, and callability, and liveness will be left
/// unchanged, and its offset will be reset to 0.
///
/// If the symbol was external then its scope will be set to local, otherwise
/// it will be left unchanged.
void makeAbsolute(Symbol &Sym, orc::ExecutorAddr Address) {
assert(!Sym.isAbsolute() && "Symbol is already absolute");
if (Sym.isExternal()) {
assert(ExternalSymbols.count(&Sym) &&
"Sym is not in the absolute symbols set");
assert(Sym.getOffset() == 0 && "External is not at offset 0");
ExternalSymbols.erase(&Sym);
auto &A = Sym.getAddressable();
A.setAbsolute(true);
A.setAddress(Address);
Sym.setScope(Scope::Local);
} else {
assert(Sym.isDefined() && "Sym is not a defined symbol");
Section &Sec = Sym.getBlock().getSection();
Sec.removeSymbol(Sym);
Sym.makeAbsolute(createAddressable(Address));
}
AbsoluteSymbols.insert(&Sym);
}
/// Turn an absolute or external symbol into a defined one by attaching it to
/// a block. Symbol must not already be defined.
void makeDefined(Symbol &Sym, Block &Content, orc::ExecutorAddrDiff Offset,
orc::ExecutorAddrDiff Size, Linkage L, Scope S,
bool IsLive) {
assert(!Sym.isDefined() && "Sym is already a defined symbol");
if (Sym.isAbsolute()) {
assert(AbsoluteSymbols.count(&Sym) &&
"Symbol is not in the absolutes set");
AbsoluteSymbols.erase(&Sym);
} else {
assert(ExternalSymbols.count(&Sym) &&
"Symbol is not in the externals set");
ExternalSymbols.erase(&Sym);
}
Addressable &OldBase = *Sym.Base;
Sym.setBlock(Content);
Sym.setOffset(Offset);
Sym.setSize(Size);
Sym.setLinkage(L);
Sym.setScope(S);
Sym.setLive(IsLive);
Content.getSection().addSymbol(Sym);
destroyAddressable(OldBase);
}
/// Transfer a defined symbol from one block to another.
///
/// The symbol's offset within DestBlock is set to NewOffset.
///
/// If ExplicitNewSize is given as None then the size of the symbol will be
/// checked and auto-truncated to at most the size of the remainder (from the
/// given offset) of the size of the new block.
///
/// All other symbol attributes are unchanged.
void
transferDefinedSymbol(Symbol &Sym, Block &DestBlock,
orc::ExecutorAddrDiff NewOffset,
std::optional<orc::ExecutorAddrDiff> ExplicitNewSize) {
auto &OldSection = Sym.getBlock().getSection();
Sym.setBlock(DestBlock);
Sym.setOffset(NewOffset);
if (ExplicitNewSize)
Sym.setSize(*ExplicitNewSize);
else {
auto RemainingBlockSize = DestBlock.getSize() - NewOffset;
if (Sym.getSize() > RemainingBlockSize)
Sym.setSize(RemainingBlockSize);
}
if (&DestBlock.getSection() != &OldSection) {
OldSection.removeSymbol(Sym);
DestBlock.getSection().addSymbol(Sym);
}
}
/// Transfers the given Block and all Symbols pointing to it to the given
/// Section.
///
/// No attempt is made to check compatibility of the source and destination
/// sections. Blocks may be moved between sections with incompatible
/// permissions (e.g. from data to text). The client is responsible for
/// ensuring that this is safe.
void transferBlock(Block &B, Section &NewSection) {
auto &OldSection = B.getSection();
if (&OldSection == &NewSection)
return;
SmallVector<Symbol *> AttachedSymbols;
for (auto *S : OldSection.symbols())
if (&S->getBlock() == &B)
AttachedSymbols.push_back(S);
for (auto *S : AttachedSymbols) {
OldSection.removeSymbol(*S);
NewSection.addSymbol(*S);
}
OldSection.removeBlock(B);
NewSection.addBlock(B);
}
/// Move all blocks and symbols from the source section to the destination
/// section.
///
/// If PreserveSrcSection is true (or SrcSection and DstSection are the same)
/// then SrcSection is preserved, otherwise it is removed (the default).
void mergeSections(Section &DstSection, Section &SrcSection,
bool PreserveSrcSection = false) {
if (&DstSection == &SrcSection)
return;
for (auto *B : SrcSection.blocks())
B->setSection(DstSection);
SrcSection.transferContentTo(DstSection);
if (!PreserveSrcSection)
removeSection(SrcSection);
}
/// Removes an external symbol. Also removes the underlying Addressable.
void removeExternalSymbol(Symbol &Sym) {
assert(!Sym.isDefined() && !Sym.isAbsolute() &&
"Sym is not an external symbol");
assert(ExternalSymbols.count(&Sym) && "Symbol is not in the externals set");
ExternalSymbols.erase(&Sym);
Addressable &Base = *Sym.Base;
assert(llvm::none_of(ExternalSymbols,
[&](Symbol *AS) { return AS->Base == &Base; }) &&
"Base addressable still in use");
destroySymbol(Sym);
destroyAddressable(Base);
}
/// Remove an absolute symbol. Also removes the underlying Addressable.
void removeAbsoluteSymbol(Symbol &Sym) {
assert(!Sym.isDefined() && Sym.isAbsolute() &&
"Sym is not an absolute symbol");
assert(AbsoluteSymbols.count(&Sym) &&
"Symbol is not in the absolute symbols set");
AbsoluteSymbols.erase(&Sym);
Addressable &Base = *Sym.Base;
assert(llvm::none_of(ExternalSymbols,
[&](Symbol *AS) { return AS->Base == &Base; }) &&
"Base addressable still in use");
destroySymbol(Sym);
destroyAddressable(Base);
}
/// Removes defined symbols. Does not remove the underlying block.
void removeDefinedSymbol(Symbol &Sym) {
assert(Sym.isDefined() && "Sym is not a defined symbol");
Sym.getBlock().getSection().removeSymbol(Sym);
destroySymbol(Sym);
}
/// Remove a block. The block reference is defunct after calling this
/// function and should no longer be used.
void removeBlock(Block &B) {
assert(llvm::none_of(B.getSection().symbols(),
[&](const Symbol *Sym) {
return &Sym->getBlock() == &B;
}) &&
"Block still has symbols attached");
B.getSection().removeBlock(B);
destroyBlock(B);
}
/// Remove a section. The section reference is defunct after calling this
/// function and should no longer be used.
void removeSection(Section &Sec) {
assert(Sections.count(Sec.getName()) && "Section not found");
assert(Sections.find(Sec.getName())->second.get() == &Sec &&
"Section map entry invalid");
Sections.erase(Sec.getName());
}
/// Accessor for the AllocActions object for this graph. This can be used to
/// register allocation action calls prior to finalization.
///
/// Accessing this object after finalization will result in undefined
/// behavior.
orc::shared::AllocActions &allocActions() { return AAs; }
/// Dump the graph.
void dump(raw_ostream &OS);
private:
// Put the BumpPtrAllocator first so that we don't free any of the underlying
// memory until the Symbol/Addressable destructors have been run.
BumpPtrAllocator Allocator;
std::string Name;
Triple TT;
SubtargetFeatures Features;
unsigned PointerSize;
support::endianness Endianness;
GetEdgeKindNameFunction GetEdgeKindName = nullptr;
DenseMap<StringRef, std::unique_ptr<Section>> Sections;
ExternalSymbolSet ExternalSymbols;
ExternalSymbolSet AbsoluteSymbols;
orc::shared::AllocActions AAs;
};
inline MutableArrayRef<char> Block::getMutableContent(LinkGraph &G) {
if (!ContentMutable)
setMutableContent(G.allocateContent({Data, Size}));
return MutableArrayRef<char>(const_cast<char *>(Data), Size);
}
/// Enables easy lookup of blocks by addresses.
class BlockAddressMap {
public:
using AddrToBlockMap = std::map<orc::ExecutorAddr, Block *>;
using const_iterator = AddrToBlockMap::const_iterator;
/// A block predicate that always adds all blocks.
static bool includeAllBlocks(const Block &B) { return true; }
/// A block predicate that always includes blocks with non-null addresses.
static bool includeNonNull(const Block &B) { return !!B.getAddress(); }
BlockAddressMap() = default;
/// Add a block to the map. Returns an error if the block overlaps with any
/// existing block.
template <typename PredFn = decltype(includeAllBlocks)>
Error addBlock(Block &B, PredFn Pred = includeAllBlocks) {
if (!Pred(B))
return Error::success();
auto I = AddrToBlock.upper_bound(B.getAddress());
// If we're not at the end of the map, check for overlap with the next
// element.
if (I != AddrToBlock.end()) {
if (B.getAddress() + B.getSize() > I->second->getAddress())
return overlapError(B, *I->second);
}
// If we're not at the start of the map, check for overlap with the previous
// element.
if (I != AddrToBlock.begin()) {
auto &PrevBlock = *std::prev(I)->second;
if (PrevBlock.getAddress() + PrevBlock.getSize() > B.getAddress())
return overlapError(B, PrevBlock);
}
AddrToBlock.insert(I, std::make_pair(B.getAddress(), &B));
return Error::success();
}
/// Add a block to the map without checking for overlap with existing blocks.
/// The client is responsible for ensuring that the block added does not
/// overlap with any existing block.
void addBlockWithoutChecking(Block &B) { AddrToBlock[B.getAddress()] = &B; }
/// Add a range of blocks to the map. Returns an error if any block in the
/// range overlaps with any other block in the range, or with any existing
/// block in the map.
template <typename BlockPtrRange,
typename PredFn = decltype(includeAllBlocks)>
Error addBlocks(BlockPtrRange &&Blocks, PredFn Pred = includeAllBlocks) {
for (auto *B : Blocks)
if (auto Err = addBlock(*B, Pred))
return Err;
return Error::success();
}
/// Add a range of blocks to the map without checking for overlap with
/// existing blocks. The client is responsible for ensuring that the block
/// added does not overlap with any existing block.
template <typename BlockPtrRange>
void addBlocksWithoutChecking(BlockPtrRange &&Blocks) {
for (auto *B : Blocks)
addBlockWithoutChecking(*B);
}
/// Iterates over (Address, Block*) pairs in ascending order of address.
const_iterator begin() const { return AddrToBlock.begin(); }
const_iterator end() const { return AddrToBlock.end(); }
/// Returns the block starting at the given address, or nullptr if no such
/// block exists.
Block *getBlockAt(orc::ExecutorAddr Addr) const {
auto I = AddrToBlock.find(Addr);
if (I == AddrToBlock.end())
return nullptr;
return I->second;
}
/// Returns the block covering the given address, or nullptr if no such block
/// exists.
Block *getBlockCovering(orc::ExecutorAddr Addr) const {
auto I = AddrToBlock.upper_bound(Addr);
if (I == AddrToBlock.begin())
return nullptr;
auto *B = std::prev(I)->second;
if (Addr < B->getAddress() + B->getSize())
return B;
return nullptr;
}
private:
Error overlapError(Block &NewBlock, Block &ExistingBlock) {
auto NewBlockEnd = NewBlock.getAddress() + NewBlock.getSize();
auto ExistingBlockEnd =
ExistingBlock.getAddress() + ExistingBlock.getSize();
return make_error<JITLinkError>(
"Block at " +
formatv("{0:x16} -- {1:x16}", NewBlock.getAddress().getValue(),
NewBlockEnd.getValue()) +
" overlaps " +
formatv("{0:x16} -- {1:x16}", ExistingBlock.getAddress().getValue(),
ExistingBlockEnd.getValue()));
}
AddrToBlockMap AddrToBlock;
};
/// A map of addresses to Symbols.
class SymbolAddressMap {
public:
using SymbolVector = SmallVector<Symbol *, 1>;
/// Add a symbol to the SymbolAddressMap.
void addSymbol(Symbol &Sym) {
AddrToSymbols[Sym.getAddress()].push_back(&Sym);
}
/// Add all symbols in a given range to the SymbolAddressMap.
template <typename SymbolPtrCollection>
void addSymbols(SymbolPtrCollection &&Symbols) {
for (auto *Sym : Symbols)
addSymbol(*Sym);
}
/// Returns the list of symbols that start at the given address, or nullptr if
/// no such symbols exist.
const SymbolVector *getSymbolsAt(orc::ExecutorAddr Addr) const {
auto I = AddrToSymbols.find(Addr);
if (I == AddrToSymbols.end())
return nullptr;
return &I->second;
}
private:
std::map<orc::ExecutorAddr, SymbolVector> AddrToSymbols;
};
/// A function for mutating LinkGraphs.
using LinkGraphPassFunction = unique_function<Error(LinkGraph &)>;
/// A list of LinkGraph passes.
using LinkGraphPassList = std::vector<LinkGraphPassFunction>;
/// An LinkGraph pass configuration, consisting of a list of pre-prune,
/// post-prune, and post-fixup passes.
struct PassConfiguration {
/// Pre-prune passes.
///
/// These passes are called on the graph after it is built, and before any
/// symbols have been pruned. Graph nodes still have their original vmaddrs.
///
/// Notable use cases: Marking symbols live or should-discard.
LinkGraphPassList PrePrunePasses;
/// Post-prune passes.
///
/// These passes are called on the graph after dead stripping, but before
/// memory is allocated or nodes assigned their final addresses.
///
/// Notable use cases: Building GOT, stub, and TLV symbols.
LinkGraphPassList PostPrunePasses;
/// Post-allocation passes.
///
/// These passes are called on the graph after memory has been allocated and
/// defined nodes have been assigned their final addresses, but before the
/// context has been notified of these addresses. At this point externals
/// have not been resolved, and symbol content has not yet been copied into
/// working memory.
///
/// Notable use cases: Setting up data structures associated with addresses
/// of defined symbols (e.g. a mapping of __dso_handle to JITDylib* for the
/// JIT runtime) -- using a PostAllocationPass for this ensures that the
/// data structures are in-place before any query for resolved symbols
/// can complete.
LinkGraphPassList PostAllocationPasses;
/// Pre-fixup passes.
///
/// These passes are called on the graph after memory has been allocated,
/// content copied into working memory, and all nodes (including externals)
/// have been assigned their final addresses, but before any fixups have been
/// applied.
///
/// Notable use cases: Late link-time optimizations like GOT and stub
/// elimination.
LinkGraphPassList PreFixupPasses;
/// Post-fixup passes.
///
/// These passes are called on the graph after block contents has been copied
/// to working memory, and fixups applied. Blocks have been updated to point
/// to their fixed up content.
///
/// Notable use cases: Testing and validation.
LinkGraphPassList PostFixupPasses;
};
/// Flags for symbol lookup.
///
/// FIXME: These basically duplicate orc::SymbolLookupFlags -- We should merge
/// the two types once we have an OrcSupport library.
enum class SymbolLookupFlags { RequiredSymbol, WeaklyReferencedSymbol };
raw_ostream &operator<<(raw_ostream &OS, const SymbolLookupFlags &LF);
/// A map of symbol names to resolved addresses.
using AsyncLookupResult = DenseMap<StringRef, orc::ExecutorSymbolDef>;
/// A function object to call with a resolved symbol map (See AsyncLookupResult)
/// or an error if resolution failed.
class JITLinkAsyncLookupContinuation {
public:
virtual ~JITLinkAsyncLookupContinuation() = default;
virtual void run(Expected<AsyncLookupResult> LR) = 0;
private:
virtual void anchor();
};
/// Create a lookup continuation from a function object.
template <typename Continuation>
std::unique_ptr<JITLinkAsyncLookupContinuation>
createLookupContinuation(Continuation Cont) {
class Impl final : public JITLinkAsyncLookupContinuation {
public:
Impl(Continuation C) : C(std::move(C)) {}
void run(Expected<AsyncLookupResult> LR) override { C(std::move(LR)); }
private:
Continuation C;
};
return std::make_unique<Impl>(std::move(Cont));
}
/// Holds context for a single jitLink invocation.
class JITLinkContext {
public:
using LookupMap = DenseMap<StringRef, SymbolLookupFlags>;
/// Create a JITLinkContext.
JITLinkContext(const JITLinkDylib *JD) : JD(JD) {}
/// Destroy a JITLinkContext.
virtual ~JITLinkContext();
/// Return the JITLinkDylib that this link is targeting, if any.
const JITLinkDylib *getJITLinkDylib() const { return JD; }
/// Return the MemoryManager to be used for this link.
virtual JITLinkMemoryManager &getMemoryManager() = 0;
/// Notify this context that linking failed.
/// Called by JITLink if linking cannot be completed.
virtual void notifyFailed(Error Err) = 0;
/// Called by JITLink to resolve external symbols. This method is passed a
/// lookup continutation which it must call with a result to continue the
/// linking process.
virtual void lookup(const LookupMap &Symbols,
std::unique_ptr<JITLinkAsyncLookupContinuation> LC) = 0;
/// Called by JITLink once all defined symbols in the graph have been assigned
/// their final memory locations in the target process. At this point the
/// LinkGraph can be inspected to build a symbol table, however the block
/// content will not generally have been copied to the target location yet.
///
/// If the client detects an error in the LinkGraph state (e.g. unexpected or
/// missing symbols) they may return an error here. The error will be
/// propagated to notifyFailed and the linker will bail out.
virtual Error notifyResolved(LinkGraph &G) = 0;
/// Called by JITLink to notify the context that the object has been
/// finalized (i.e. emitted to memory and memory permissions set). If all of
/// this objects dependencies have also been finalized then the code is ready
/// to run.
virtual void notifyFinalized(JITLinkMemoryManager::FinalizedAlloc Alloc) = 0;
/// Called by JITLink prior to linking to determine whether default passes for
/// the target should be added. The default implementation returns true.
/// If subclasses override this method to return false for any target then
/// they are required to fully configure the pass pipeline for that target.
virtual bool shouldAddDefaultTargetPasses(const Triple &TT) const;
/// Returns the mark-live pass to be used for this link. If no pass is
/// returned (the default) then the target-specific linker implementation will
/// choose a conservative default (usually marking all symbols live).
/// This function is only called if shouldAddDefaultTargetPasses returns true,
/// otherwise the JITContext is responsible for adding a mark-live pass in
/// modifyPassConfig.
virtual LinkGraphPassFunction getMarkLivePass(const Triple &TT) const;
/// Called by JITLink to modify the pass pipeline prior to linking.
/// The default version performs no modification.
virtual Error modifyPassConfig(LinkGraph &G, PassConfiguration &Config);
private:
const JITLinkDylib *JD = nullptr;
};
/// Marks all symbols in a graph live. This can be used as a default,
/// conservative mark-live implementation.
Error markAllSymbolsLive(LinkGraph &G);
/// Create an out of range error for the given edge in the given block.
Error makeTargetOutOfRangeError(const LinkGraph &G, const Block &B,
const Edge &E);
Error makeAlignmentError(llvm::orc::ExecutorAddr Loc, uint64_t Value, int N,
const Edge &E);
/// Base case for edge-visitors where the visitor-list is empty.
inline void visitEdge(LinkGraph &G, Block *B, Edge &E) {}
/// Applies the first visitor in the list to the given edge. If the visitor's
/// visitEdge method returns true then we return immediately, otherwise we
/// apply the next visitor.
template <typename VisitorT, typename... VisitorTs>
void visitEdge(LinkGraph &G, Block *B, Edge &E, VisitorT &&V,
VisitorTs &&...Vs) {
if (!V.visitEdge(G, B, E))
visitEdge(G, B, E, std::forward<VisitorTs>(Vs)...);
}
/// For each edge in the given graph, apply a list of visitors to the edge,
/// stopping when the first visitor's visitEdge method returns true.
///
/// Only visits edges that were in the graph at call time: if any visitor
/// adds new edges those will not be visited. Visitors are not allowed to
/// remove edges (though they can change their kind, target, and addend).
template <typename... VisitorTs>
void visitExistingEdges(LinkGraph &G, VisitorTs &&...Vs) {
// We may add new blocks during this process, but we don't want to iterate
// over them, so build a worklist.
std::vector<Block *> Worklist(G.blocks().begin(), G.blocks().end());
for (auto *B : Worklist)
for (auto &E : B->edges())
visitEdge(G, B, E, std::forward<VisitorTs>(Vs)...);
}
/// Create a LinkGraph from the given object buffer.
///
/// Note: The graph does not take ownership of the underlying buffer, nor copy
/// its contents. The caller is responsible for ensuring that the object buffer
/// outlives the graph.
Expected<std::unique_ptr<LinkGraph>>
createLinkGraphFromObject(MemoryBufferRef ObjectBuffer);
/// Link the given graph.
void link(std::unique_ptr<LinkGraph> G, std::unique_ptr<JITLinkContext> Ctx);
} // end namespace jitlink
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITLINK_JITLINK_H
PK iwFZ����! �! & ExecutionEngine/SectionMemoryManager.hnu �[��� //===- SectionMemoryManager.h - Memory manager for MCJIT/RtDyld -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the declaration of a section-based memory manager used by
// the MCJIT execution engine and RuntimeDyld.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_SECTIONMEMORYMANAGER_H
#define LLVM_EXECUTIONENGINE_SECTIONMEMORYMANAGER_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/ExecutionEngine/RTDyldMemoryManager.h"
#include "llvm/Support/Memory.h"
#include <cstdint>
#include <string>
#include <system_error>
namespace llvm {
/// This is a simple memory manager which implements the methods called by
/// the RuntimeDyld class to allocate memory for section-based loading of
/// objects, usually those generated by the MCJIT execution engine.
///
/// This memory manager allocates all section memory as read-write. The
/// RuntimeDyld will copy JITed section memory into these allocated blocks
/// and perform any necessary linking and relocations.
///
/// Any client using this memory manager MUST ensure that section-specific
/// page permissions have been applied before attempting to execute functions
/// in the JITed object. Permissions can be applied either by calling
/// MCJIT::finalizeObject or by calling SectionMemoryManager::finalizeMemory
/// directly. Clients of MCJIT should call MCJIT::finalizeObject.
class SectionMemoryManager : public RTDyldMemoryManager {
public:
/// This enum describes the various reasons to allocate pages from
/// allocateMappedMemory.
enum class AllocationPurpose {
Code,
ROData,
RWData,
};
/// Implementations of this interface are used by SectionMemoryManager to
/// request pages from the operating system.
class MemoryMapper {
public:
/// This method attempts to allocate \p NumBytes bytes of virtual memory for
/// \p Purpose. \p NearBlock may point to an existing allocation, in which
/// case an attempt is made to allocate more memory near the existing block.
/// The actual allocated address is not guaranteed to be near the requested
/// address. \p Flags is used to set the initial protection flags for the
/// block of the memory. \p EC [out] returns an object describing any error
/// that occurs.
///
/// This method may allocate more than the number of bytes requested. The
/// actual number of bytes allocated is indicated in the returned
/// MemoryBlock.
///
/// The start of the allocated block must be aligned with the system
/// allocation granularity (64K on Windows, page size on Linux). If the
/// address following \p NearBlock is not so aligned, it will be rounded up
/// to the next allocation granularity boundary.
///
/// \r a non-null MemoryBlock if the function was successful, otherwise a
/// null MemoryBlock with \p EC describing the error.
virtual sys::MemoryBlock
allocateMappedMemory(AllocationPurpose Purpose, size_t NumBytes,
const sys::MemoryBlock *const NearBlock,
unsigned Flags, std::error_code &EC) = 0;
/// This method sets the protection flags for a block of memory to the state
/// specified by \p Flags. The behavior is not specified if the memory was
/// not allocated using the allocateMappedMemory method.
/// \p Block describes the memory block to be protected.
/// \p Flags specifies the new protection state to be assigned to the block.
///
/// If \p Flags is MF_WRITE, the actual behavior varies with the operating
/// system (i.e. MF_READ | MF_WRITE on Windows) and the target architecture
/// (i.e. MF_WRITE -> MF_READ | MF_WRITE on i386).
///
/// \r error_success if the function was successful, or an error_code
/// describing the failure if an error occurred.
virtual std::error_code protectMappedMemory(const sys::MemoryBlock &Block,
unsigned Flags) = 0;
/// This method releases a block of memory that was allocated with the
/// allocateMappedMemory method. It should not be used to release any memory
/// block allocated any other way.
/// \p Block describes the memory to be released.
///
/// \r error_success if the function was successful, or an error_code
/// describing the failure if an error occurred.
virtual std::error_code releaseMappedMemory(sys::MemoryBlock &M) = 0;
virtual ~MemoryMapper();
};
/// Creates a SectionMemoryManager instance with \p MM as the associated
/// memory mapper. If \p MM is nullptr then a default memory mapper is used
/// that directly calls into the operating system.
SectionMemoryManager(MemoryMapper *MM = nullptr);
SectionMemoryManager(const SectionMemoryManager &) = delete;
void operator=(const SectionMemoryManager &) = delete;
~SectionMemoryManager() override;
/// Allocates a memory block of (at least) the given size suitable for
/// executable code.
///
/// The value of \p Alignment must be a power of two. If \p Alignment is zero
/// a default alignment of 16 will be used.
uint8_t *allocateCodeSection(uintptr_t Size, unsigned Alignment,
unsigned SectionID,
StringRef SectionName) override;
/// Allocates a memory block of (at least) the given size suitable for
/// executable code.
///
/// The value of \p Alignment must be a power of two. If \p Alignment is zero
/// a default alignment of 16 will be used.
uint8_t *allocateDataSection(uintptr_t Size, unsigned Alignment,
unsigned SectionID, StringRef SectionName,
bool isReadOnly) override;
/// Update section-specific memory permissions and other attributes.
///
/// This method is called when object loading is complete and section page
/// permissions can be applied. It is up to the memory manager implementation
/// to decide whether or not to act on this method. The memory manager will
/// typically allocate all sections as read-write and then apply specific
/// permissions when this method is called. Code sections cannot be executed
/// until this function has been called. In addition, any cache coherency
/// operations needed to reliably use the memory are also performed.
///
/// \returns true if an error occurred, false otherwise.
bool finalizeMemory(std::string *ErrMsg = nullptr) override;
/// Invalidate instruction cache for code sections.
///
/// Some platforms with separate data cache and instruction cache require
/// explicit cache flush, otherwise JIT code manipulations (like resolved
/// relocations) will get to the data cache but not to the instruction cache.
///
/// This method is called from finalizeMemory.
virtual void invalidateInstructionCache();
private:
struct FreeMemBlock {
// The actual block of free memory
sys::MemoryBlock Free;
// If there is a pending allocation from the same reservation right before
// this block, store it's index in PendingMem, to be able to update the
// pending region if part of this block is allocated, rather than having to
// create a new one
unsigned PendingPrefixIndex;
};
struct MemoryGroup {
// PendingMem contains all blocks of memory (subblocks of AllocatedMem)
// which have not yet had their permissions applied, but have been given
// out to the user. FreeMem contains all block of memory, which have
// neither had their permissions applied, nor been given out to the user.
SmallVector<sys::MemoryBlock, 16> PendingMem;
SmallVector<FreeMemBlock, 16> FreeMem;
// All memory blocks that have been requested from the system
SmallVector<sys::MemoryBlock, 16> AllocatedMem;
sys::MemoryBlock Near;
};
uint8_t *allocateSection(AllocationPurpose Purpose, uintptr_t Size,
unsigned Alignment);
std::error_code applyMemoryGroupPermissions(MemoryGroup &MemGroup,
unsigned Permissions);
void anchor() override;
MemoryGroup CodeMem;
MemoryGroup RWDataMem;
MemoryGroup RODataMem;
MemoryMapper *MMapper;
std::unique_ptr<MemoryMapper> OwnedMMapper;
};
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_SECTIONMEMORYMANAGER_H
PK iwFZ�7q+| | ! ExecutionEngine/OProfileWrapper.hnu �[��� //===-- OProfileWrapper.h - OProfile JIT API Wrapper ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// This file defines a OProfileWrapper object that detects if the oprofile
// daemon is running, and provides wrappers for opagent functions used to
// communicate with the oprofile JIT interface. The dynamic library libopagent
// does not need to be linked directly as this object lazily loads the library
// when the first op_ function is called.
//
// See http://oprofile.sourceforge.net/doc/devel/jit-interface.html for the
// definition of the interface.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_OPROFILEWRAPPER_H
#define LLVM_EXECUTIONENGINE_OPROFILEWRAPPER_H
#include "llvm/Support/DataTypes.h"
#include <opagent.h>
namespace llvm {
class OProfileWrapper {
typedef op_agent_t (*op_open_agent_ptr_t)();
typedef int (*op_close_agent_ptr_t)(op_agent_t);
typedef int (*op_write_native_code_ptr_t)(op_agent_t,
const char*,
uint64_t,
void const*,
const unsigned int);
typedef int (*op_write_debug_line_info_ptr_t)(op_agent_t,
void const*,
size_t,
struct debug_line_info const*);
typedef int (*op_unload_native_code_ptr_t)(op_agent_t, uint64_t);
// Also used for op_minor_version function which has the same signature
typedef int (*op_major_version_ptr_t)();
// This is not a part of the opagent API, but is useful nonetheless
typedef bool (*IsOProfileRunningPtrT)();
op_agent_t Agent;
op_open_agent_ptr_t OpenAgentFunc;
op_close_agent_ptr_t CloseAgentFunc;
op_write_native_code_ptr_t WriteNativeCodeFunc;
op_write_debug_line_info_ptr_t WriteDebugLineInfoFunc;
op_unload_native_code_ptr_t UnloadNativeCodeFunc;
op_major_version_ptr_t MajorVersionFunc;
op_major_version_ptr_t MinorVersionFunc;
IsOProfileRunningPtrT IsOProfileRunningFunc;
bool Initialized;
public:
OProfileWrapper();
// For testing with a mock opagent implementation, skips the dynamic load and
// the function resolution.
OProfileWrapper(op_open_agent_ptr_t OpenAgentImpl,
op_close_agent_ptr_t CloseAgentImpl,
op_write_native_code_ptr_t WriteNativeCodeImpl,
op_write_debug_line_info_ptr_t WriteDebugLineInfoImpl,
op_unload_native_code_ptr_t UnloadNativeCodeImpl,
op_major_version_ptr_t MajorVersionImpl,
op_major_version_ptr_t MinorVersionImpl,
IsOProfileRunningPtrT MockIsOProfileRunningImpl = 0)
: OpenAgentFunc(OpenAgentImpl),
CloseAgentFunc(CloseAgentImpl),
WriteNativeCodeFunc(WriteNativeCodeImpl),
WriteDebugLineInfoFunc(WriteDebugLineInfoImpl),
UnloadNativeCodeFunc(UnloadNativeCodeImpl),
MajorVersionFunc(MajorVersionImpl),
MinorVersionFunc(MinorVersionImpl),
IsOProfileRunningFunc(MockIsOProfileRunningImpl),
Initialized(true)
{
}
// Calls op_open_agent in the oprofile JIT library and saves the returned
// op_agent_t handle internally so it can be used when calling all the other
// op_* functions. Callers of this class do not need to keep track of
// op_agent_t objects.
bool op_open_agent();
int op_close_agent();
int op_write_native_code(const char* name,
uint64_t addr,
void const* code,
const unsigned int size);
int op_write_debug_line_info(void const* code,
size_t num_entries,
struct debug_line_info const* info);
int op_unload_native_code(uint64_t addr);
int op_major_version();
int op_minor_version();
// Returns true if the oprofiled process is running, the opagent library is
// loaded and a connection to the agent has been established, and false
// otherwise.
bool isAgentAvailable();
private:
// Loads the libopagent library and initializes this wrapper if the oprofile
// daemon is running
bool initialize();
// Searches /proc for the oprofile daemon and returns true if the process if
// found, or false otherwise.
bool checkForOProfileProcEntry();
bool isOProfileRunning();
};
} // namespace llvm
#endif // LLVM_EXECUTIONENGINE_OPROFILEWRAPPER_H
PK iwFZX� 9�$ �$ & ExecutionEngine/Orc/SymbolStringPool.hnu �[��� //===-- SymbolStringPool.h -- Thread-safe pool for JIT symbols --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Contains a thread-safe string pool suitable for use with ORC.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_SYMBOLSTRINGPOOL_H
#define LLVM_EXECUTIONENGINE_ORC_SYMBOLSTRINGPOOL_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/StringMap.h"
#include <atomic>
#include <mutex>
namespace llvm {
class raw_ostream;
namespace orc {
class SymbolStringPtrBase;
class SymbolStringPtr;
class NonOwningSymbolStringPtr;
/// String pool for symbol names used by the JIT.
class SymbolStringPool {
friend class SymbolStringPoolTest;
friend class SymbolStringPtrBase;
// Implemented in DebugUtils.h.
friend raw_ostream &operator<<(raw_ostream &OS, const SymbolStringPool &SSP);
public:
/// Destroy a SymbolStringPool.
~SymbolStringPool();
/// Create a symbol string pointer from the given string.
SymbolStringPtr intern(StringRef S);
/// Remove from the pool any entries that are no longer referenced.
void clearDeadEntries();
/// Returns true if the pool is empty.
bool empty() const;
private:
size_t getRefCount(const SymbolStringPtrBase &S) const;
using RefCountType = std::atomic<size_t>;
using PoolMap = StringMap<RefCountType>;
using PoolMapEntry = StringMapEntry<RefCountType>;
mutable std::mutex PoolMutex;
PoolMap Pool;
};
/// Base class for both owning and non-owning symbol-string ptrs.
///
/// All symbol-string ptrs are convertible to bool, dereferenceable and
/// comparable.
///
/// SymbolStringPtrBases are default-constructible and constructible
/// from nullptr to enable comparison with these values.
class SymbolStringPtrBase {
friend class SymbolStringPool;
friend struct DenseMapInfo<SymbolStringPtr>;
friend struct DenseMapInfo<NonOwningSymbolStringPtr>;
public:
SymbolStringPtrBase() = default;
SymbolStringPtrBase(std::nullptr_t) {}
explicit operator bool() const { return S; }
StringRef operator*() const { return S->first(); }
friend bool operator==(SymbolStringPtrBase LHS, SymbolStringPtrBase RHS) {
return LHS.S == RHS.S;
}
friend bool operator!=(SymbolStringPtrBase LHS, SymbolStringPtrBase RHS) {
return !(LHS == RHS);
}
friend bool operator<(SymbolStringPtrBase LHS, SymbolStringPtrBase RHS) {
return LHS.S < RHS.S;
}
#ifndef NDEBUG
// Returns true if the pool entry's ref count is above zero (or if the entry
// is an empty or tombstone value). Useful for debugging and testing -- this
// method can be used to identify SymbolStringPtrs and
// NonOwningSymbolStringPtrs that are pointing to abandoned pool entries.
bool poolEntryIsAlive() const {
return isRealPoolEntry(S) ? S->getValue() != 0 : true;
}
#endif
protected:
using PoolEntry = SymbolStringPool::PoolMapEntry;
using PoolEntryPtr = PoolEntry *;
SymbolStringPtrBase(PoolEntryPtr S) : S(S) {}
constexpr static uintptr_t EmptyBitPattern =
std::numeric_limits<uintptr_t>::max()
<< PointerLikeTypeTraits<PoolEntryPtr>::NumLowBitsAvailable;
constexpr static uintptr_t TombstoneBitPattern =
(std::numeric_limits<uintptr_t>::max() - 1)
<< PointerLikeTypeTraits<PoolEntryPtr>::NumLowBitsAvailable;
constexpr static uintptr_t InvalidPtrMask =
(std::numeric_limits<uintptr_t>::max() - 3)
<< PointerLikeTypeTraits<PoolEntryPtr>::NumLowBitsAvailable;
// Returns false for null, empty, and tombstone values, true otherwise.
static bool isRealPoolEntry(PoolEntryPtr P) {
return ((reinterpret_cast<uintptr_t>(P) - 1) & InvalidPtrMask) !=
InvalidPtrMask;
}
size_t getRefCount() const {
return isRealPoolEntry(S) ? size_t(S->getValue()) : size_t(0);
}
PoolEntryPtr S = nullptr;
};
/// Pointer to a pooled string representing a symbol name.
class SymbolStringPtr : public SymbolStringPtrBase {
friend class OrcV2CAPIHelper;
friend class SymbolStringPool;
friend struct DenseMapInfo<SymbolStringPtr>;
public:
SymbolStringPtr() = default;
SymbolStringPtr(std::nullptr_t) {}
SymbolStringPtr(const SymbolStringPtr &Other) : SymbolStringPtrBase(Other.S) {
incRef();
}
explicit SymbolStringPtr(NonOwningSymbolStringPtr Other);
SymbolStringPtr& operator=(const SymbolStringPtr &Other) {
decRef();
S = Other.S;
incRef();
return *this;
}
SymbolStringPtr(SymbolStringPtr &&Other) { std::swap(S, Other.S); }
SymbolStringPtr& operator=(SymbolStringPtr &&Other) {
decRef();
S = nullptr;
std::swap(S, Other.S);
return *this;
}
~SymbolStringPtr() { decRef(); }
private:
SymbolStringPtr(PoolEntryPtr S) : SymbolStringPtrBase(S) { incRef(); }
void incRef() {
if (isRealPoolEntry(S))
++S->getValue();
}
void decRef() {
if (isRealPoolEntry(S)) {
assert(S->getValue() && "Releasing SymbolStringPtr with zero ref count");
--S->getValue();
}
}
static SymbolStringPtr getEmptyVal() {
return SymbolStringPtr(reinterpret_cast<PoolEntryPtr>(EmptyBitPattern));
}
static SymbolStringPtr getTombstoneVal() {
return SymbolStringPtr(reinterpret_cast<PoolEntryPtr>(TombstoneBitPattern));
}
};
/// Non-owning SymbolStringPool entry pointer. Instances are comparable with
/// SymbolStringPtr instances and guaranteed to have the same hash, but do not
/// affect the ref-count of the pooled string (and are therefore cheaper to
/// copy).
///
/// NonOwningSymbolStringPtrs are silently invalidated if the pool entry's
/// ref-count drops to zero, so they should only be used in contexts where a
/// corresponding SymbolStringPtr is known to exist (which will guarantee that
/// the ref-count stays above zero). E.g. in a graph where nodes are
/// represented by SymbolStringPtrs the edges can be represented by pairs of
/// NonOwningSymbolStringPtrs and this will make the introduction of deletion
/// of edges cheaper.
class NonOwningSymbolStringPtr : public SymbolStringPtrBase {
friend struct DenseMapInfo<orc::NonOwningSymbolStringPtr>;
public:
NonOwningSymbolStringPtr() = default;
explicit NonOwningSymbolStringPtr(const SymbolStringPtr &S)
: SymbolStringPtrBase(S) {}
using SymbolStringPtrBase::operator=;
private:
NonOwningSymbolStringPtr(PoolEntryPtr S) : SymbolStringPtrBase(S) {}
static NonOwningSymbolStringPtr getEmptyVal() {
return NonOwningSymbolStringPtr(
reinterpret_cast<PoolEntryPtr>(EmptyBitPattern));
}
static NonOwningSymbolStringPtr getTombstoneVal() {
return NonOwningSymbolStringPtr(
reinterpret_cast<PoolEntryPtr>(TombstoneBitPattern));
}
};
inline SymbolStringPtr::SymbolStringPtr(NonOwningSymbolStringPtr Other)
: SymbolStringPtrBase(Other) {
assert(poolEntryIsAlive() &&
"SymbolStringPtr constructed from invalid non-owning pointer.");
if (isRealPoolEntry(S))
++S->getValue();
}
inline SymbolStringPool::~SymbolStringPool() {
#ifndef NDEBUG
clearDeadEntries();
assert(Pool.empty() && "Dangling references at pool destruction time");
#endif // NDEBUG
}
inline SymbolStringPtr SymbolStringPool::intern(StringRef S) {
std::lock_guard<std::mutex> Lock(PoolMutex);
PoolMap::iterator I;
bool Added;
std::tie(I, Added) = Pool.try_emplace(S, 0);
return SymbolStringPtr(&*I);
}
inline void SymbolStringPool::clearDeadEntries() {
std::lock_guard<std::mutex> Lock(PoolMutex);
for (auto I = Pool.begin(), E = Pool.end(); I != E;) {
auto Tmp = I++;
if (Tmp->second == 0)
Pool.erase(Tmp);
}
}
inline bool SymbolStringPool::empty() const {
std::lock_guard<std::mutex> Lock(PoolMutex);
return Pool.empty();
}
inline size_t
SymbolStringPool::getRefCount(const SymbolStringPtrBase &S) const {
return S.getRefCount();
}
} // end namespace orc
template <>
struct DenseMapInfo<orc::SymbolStringPtr> {
static orc::SymbolStringPtr getEmptyKey() {
return orc::SymbolStringPtr::getEmptyVal();
}
static orc::SymbolStringPtr getTombstoneKey() {
return orc::SymbolStringPtr::getTombstoneVal();
}
static unsigned getHashValue(const orc::SymbolStringPtrBase &V) {
return DenseMapInfo<orc::SymbolStringPtr::PoolEntryPtr>::getHashValue(V.S);
}
static bool isEqual(const orc::SymbolStringPtrBase &LHS,
const orc::SymbolStringPtrBase &RHS) {
return LHS.S == RHS.S;
}
};
template <> struct DenseMapInfo<orc::NonOwningSymbolStringPtr> {
static orc::NonOwningSymbolStringPtr getEmptyKey() {
return orc::NonOwningSymbolStringPtr::getEmptyVal();
}
static orc::NonOwningSymbolStringPtr getTombstoneKey() {
return orc::NonOwningSymbolStringPtr::getTombstoneVal();
}
static unsigned getHashValue(const orc::SymbolStringPtrBase &V) {
return DenseMapInfo<
orc::NonOwningSymbolStringPtr::PoolEntryPtr>::getHashValue(V.S);
}
static bool isEqual(const orc::SymbolStringPtrBase &LHS,
const orc::SymbolStringPtrBase &RHS) {
return LHS.S == RHS.S;
}
};
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_SYMBOLSTRINGPOOL_H
PK iwFZ�(G" " 3 ExecutionEngine/Orc/EPCGenericRTDyldMemoryManager.hnu �[��� //===---- EPCGenericRTDyldMemoryManager.h - EPC-based MemMgr ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Defines a RuntimeDyld::MemoryManager that uses EPC and the ORC runtime
// bootstrap functions.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_EPCGENERICRTDYLDMEMORYMANAGER_H
#define LLVM_EXECUTIONENGINE_ORC_EPCGENERICRTDYLDMEMORYMANAGER_H
#include "llvm/ExecutionEngine/Orc/ExecutorProcessControl.h"
#include "llvm/ExecutionEngine/RuntimeDyld.h"
#define DEBUG_TYPE "orc"
namespace llvm {
namespace orc {
/// Remote-mapped RuntimeDyld-compatible memory manager.
class EPCGenericRTDyldMemoryManager : public RuntimeDyld::MemoryManager {
public:
/// Symbol addresses for memory access.
struct SymbolAddrs {
ExecutorAddr Instance;
ExecutorAddr Reserve;
ExecutorAddr Finalize;
ExecutorAddr Deallocate;
ExecutorAddr RegisterEHFrame;
ExecutorAddr DeregisterEHFrame;
};
/// Create an EPCGenericRTDyldMemoryManager using the given EPC, looking up
/// the default symbol names in the bootstrap symbol set.
static Expected<std::unique_ptr<EPCGenericRTDyldMemoryManager>>
CreateWithDefaultBootstrapSymbols(ExecutorProcessControl &EPC);
/// Create an EPCGenericRTDyldMemoryManager using the given EPC and symbol
/// addrs.
EPCGenericRTDyldMemoryManager(ExecutorProcessControl &EPC, SymbolAddrs SAs);
EPCGenericRTDyldMemoryManager(const EPCGenericRTDyldMemoryManager &) = delete;
EPCGenericRTDyldMemoryManager &
operator=(const EPCGenericRTDyldMemoryManager &) = delete;
EPCGenericRTDyldMemoryManager(EPCGenericRTDyldMemoryManager &&) = delete;
EPCGenericRTDyldMemoryManager &
operator=(EPCGenericRTDyldMemoryManager &&) = delete;
~EPCGenericRTDyldMemoryManager();
uint8_t *allocateCodeSection(uintptr_t Size, unsigned Alignment,
unsigned SectionID,
StringRef SectionName) override;
uint8_t *allocateDataSection(uintptr_t Size, unsigned Alignment,
unsigned SectionID, StringRef SectionName,
bool IsReadOnly) override;
void reserveAllocationSpace(uintptr_t CodeSize, Align CodeAlign,
uintptr_t RODataSize, Align RODataAlign,
uintptr_t RWDataSize, Align RWDataAlign) override;
bool needsToReserveAllocationSpace() override;
void registerEHFrames(uint8_t *Addr, uint64_t LoadAddr, size_t Size) override;
void deregisterEHFrames() override;
void notifyObjectLoaded(RuntimeDyld &Dyld,
const object::ObjectFile &Obj) override;
bool finalizeMemory(std::string *ErrMsg = nullptr) override;
private:
struct SectionAlloc {
public:
SectionAlloc(uint64_t Size, unsigned Align)
: Size(Size), Align(Align),
Contents(std::make_unique<uint8_t[]>(Size + Align - 1)) {}
uint64_t Size;
unsigned Align;
std::unique_ptr<uint8_t[]> Contents;
ExecutorAddr RemoteAddr;
};
// Group of section allocations to be allocated together in the executor. The
// RemoteCodeAddr will stand in as the id of the group for deallocation
// purposes.
struct SectionAllocGroup {
SectionAllocGroup() = default;
SectionAllocGroup(const SectionAllocGroup &) = delete;
SectionAllocGroup &operator=(const SectionAllocGroup &) = delete;
SectionAllocGroup(SectionAllocGroup &&) = default;
SectionAllocGroup &operator=(SectionAllocGroup &&) = default;
ExecutorAddrRange RemoteCode;
ExecutorAddrRange RemoteROData;
ExecutorAddrRange RemoteRWData;
std::vector<ExecutorAddrRange> UnfinalizedEHFrames;
std::vector<SectionAlloc> CodeAllocs, RODataAllocs, RWDataAllocs;
};
// Maps all allocations in SectionAllocs to aligned blocks
void mapAllocsToRemoteAddrs(RuntimeDyld &Dyld,
std::vector<SectionAlloc> &SecAllocs,
ExecutorAddr NextAddr);
ExecutorProcessControl &EPC;
SymbolAddrs SAs;
std::mutex M;
std::vector<SectionAllocGroup> Unmapped;
std::vector<SectionAllocGroup> Unfinalized;
std::vector<ExecutorAddr> FinalizedAllocs;
std::string ErrMsg;
};
} // end namespace orc
} // end namespace llvm
#undef DEBUG_TYPE
#endif // LLVM_EXECUTIONENGINE_ORC_EPCGENERICRTDYLDMEMORYMANAGER_H
PK iwFZ���� � ExecutionEngine/Orc/DebugUtils.hnu �[��� //===----- DebugUtils.h - Utilities for debugging ORC JITs ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Utilities for debugging ORC-based JITs.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_DEBUGUTILS_H
#define LLVM_EXECUTIONENGINE_ORC_DEBUGUTILS_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/ExecutionEngine/Orc/SymbolStringPool.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/raw_ostream.h"
#include <memory>
#include <string>
namespace llvm {
class MemoryBuffer;
namespace orc {
// --raw_ostream operators for ORC types--
/// Render a SymbolStringPtr.
raw_ostream &operator<<(raw_ostream &OS, const SymbolStringPtr &Sym);
/// Render a SymbolNameSet.
raw_ostream &operator<<(raw_ostream &OS, const SymbolNameSet &Symbols);
/// Render a SymbolNameVector.
raw_ostream &operator<<(raw_ostream &OS, const SymbolNameVector &Symbols);
/// Render an array of SymbolStringPtrs.
raw_ostream &operator<<(raw_ostream &OS, ArrayRef<SymbolStringPtr> Symbols);
/// Render JITSymbolFlags.
raw_ostream &operator<<(raw_ostream &OS, const JITSymbolFlags &Flags);
/// Render a SymbolFlagsMap entry.
raw_ostream &operator<<(raw_ostream &OS, const SymbolFlagsMap::value_type &KV);
/// Render a SymbolMap entry.
raw_ostream &operator<<(raw_ostream &OS, const SymbolMap::value_type &KV);
/// Render a SymbolFlagsMap.
raw_ostream &operator<<(raw_ostream &OS, const SymbolFlagsMap &SymbolFlags);
/// Render a SymbolMap.
raw_ostream &operator<<(raw_ostream &OS, const SymbolMap &Symbols);
/// Render a SymbolDependenceMap entry.
raw_ostream &operator<<(raw_ostream &OS,
const SymbolDependenceMap::value_type &KV);
/// Render a SymbolDependendeMap.
raw_ostream &operator<<(raw_ostream &OS, const SymbolDependenceMap &Deps);
/// Render a MaterializationUnit.
raw_ostream &operator<<(raw_ostream &OS, const MaterializationUnit &MU);
//// Render a JITDylibLookupFlags instance.
raw_ostream &operator<<(raw_ostream &OS,
const JITDylibLookupFlags &JDLookupFlags);
/// Rendar a SymbolLookupFlags instance.
raw_ostream &operator<<(raw_ostream &OS, const SymbolLookupFlags &LookupFlags);
/// Render a SymbolLookupSet entry.
raw_ostream &operator<<(raw_ostream &OS, const SymbolLookupSet::value_type &KV);
/// Render a SymbolLookupSet.
raw_ostream &operator<<(raw_ostream &OS, const SymbolLookupSet &LookupSet);
/// Render a JITDylibSearchOrder.
raw_ostream &operator<<(raw_ostream &OS,
const JITDylibSearchOrder &SearchOrder);
/// Render a SymbolAliasMap.
raw_ostream &operator<<(raw_ostream &OS, const SymbolAliasMap &Aliases);
/// Render a SymbolState.
raw_ostream &operator<<(raw_ostream &OS, const SymbolState &S);
/// Render a LookupKind.
raw_ostream &operator<<(raw_ostream &OS, const LookupKind &K);
/// Dump a SymbolStringPool. Useful for debugging dangling-pointer crashes.
raw_ostream &operator<<(raw_ostream &OS, const SymbolStringPool &SSP);
/// A function object that can be used as an ObjectTransformLayer transform
/// to dump object files to disk at a specified path.
class DumpObjects {
public:
/// Construct a DumpObjects transform that will dump objects to disk.
///
/// @param DumpDir specifies the path to write dumped objects to. DumpDir may
/// be empty, in which case files will be dumped to the working directory. If
/// DumpDir is non-empty then any trailing separators will be discarded.
///
/// @param IdentifierOverride specifies a file name stem to use when dumping
/// objects. If empty, each MemoryBuffer's identifier will be used (with a .o
/// suffix added if not already present). If an identifier override is
/// supplied it will be used instead (since all buffers will use the same
/// identifier, the resulting files will be named <ident>.o, <ident>.2.o,
/// <ident>.3.o, and so on). IdentifierOverride should not contain an
/// extension, as a .o suffix will be added by DumpObjects.
DumpObjects(std::string DumpDir = "", std::string IdentifierOverride = "");
/// Dumps the given buffer to disk.
Expected<std::unique_ptr<MemoryBuffer>>
operator()(std::unique_ptr<MemoryBuffer> Obj);
private:
StringRef getBufferIdentifier(MemoryBuffer &B);
std::string DumpDir;
std::string IdentifierOverride;
};
} // End namespace orc
} // End namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_DEBUGUTILS_H
PK iwFZ�m�� � ! ExecutionEngine/Orc/Speculation.hnu �[��� //===-- Speculation.h - Speculative Compilation --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Contains the definition to support speculative compilation when laziness is
// enabled.
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_SPECULATION_H
#define LLVM_EXECUTIONENGINE_ORC_SPECULATION_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/ExecutionEngine/Orc/DebugUtils.h"
#include "llvm/ExecutionEngine/Orc/IRCompileLayer.h"
#include "llvm/Support/Debug.h"
#include <mutex>
#include <type_traits>
#include <utility>
namespace llvm {
namespace orc {
class Speculator;
// Track the Impls (JITDylib,Symbols) of Symbols while lazy call through
// trampolines are created. Operations are guarded by locks tp ensure that Imap
// stays in consistent state after read/write
class ImplSymbolMap {
friend class Speculator;
public:
using AliaseeDetails = std::pair<SymbolStringPtr, JITDylib *>;
using Alias = SymbolStringPtr;
using ImapTy = DenseMap<Alias, AliaseeDetails>;
void trackImpls(SymbolAliasMap ImplMaps, JITDylib *SrcJD);
private:
// FIX ME: find a right way to distinguish the pre-compile Symbols, and update
// the callsite
std::optional<AliaseeDetails> getImplFor(const SymbolStringPtr &StubSymbol) {
std::lock_guard<std::mutex> Lockit(ConcurrentAccess);
auto Position = Maps.find(StubSymbol);
if (Position != Maps.end())
return Position->getSecond();
else
return std::nullopt;
}
std::mutex ConcurrentAccess;
ImapTy Maps;
};
// Defines Speculator Concept,
class Speculator {
public:
using TargetFAddr = ExecutorAddr;
using FunctionCandidatesMap = DenseMap<SymbolStringPtr, SymbolNameSet>;
using StubAddrLikelies = DenseMap<TargetFAddr, SymbolNameSet>;
private:
void registerSymbolsWithAddr(TargetFAddr ImplAddr,
SymbolNameSet likelySymbols) {
std::lock_guard<std::mutex> Lockit(ConcurrentAccess);
GlobalSpecMap.insert({ImplAddr, std::move(likelySymbols)});
}
void launchCompile(ExecutorAddr FAddr) {
SymbolNameSet CandidateSet;
// Copy CandidateSet is necessary, to avoid unsynchronized access to
// the datastructure.
{
std::lock_guard<std::mutex> Lockit(ConcurrentAccess);
auto It = GlobalSpecMap.find(FAddr);
if (It == GlobalSpecMap.end())
return;
CandidateSet = It->getSecond();
}
SymbolDependenceMap SpeculativeLookUpImpls;
for (auto &Callee : CandidateSet) {
auto ImplSymbol = AliaseeImplTable.getImplFor(Callee);
// try to distinguish already compiled & library symbols
if (!ImplSymbol)
continue;
const auto &ImplSymbolName = ImplSymbol->first;
JITDylib *ImplJD = ImplSymbol->second;
auto &SymbolsInJD = SpeculativeLookUpImpls[ImplJD];
SymbolsInJD.insert(ImplSymbolName);
}
DEBUG_WITH_TYPE("orc", {
for (auto &I : SpeculativeLookUpImpls) {
llvm::dbgs() << "\n In " << I.first->getName() << " JITDylib ";
for (auto &N : I.second)
llvm::dbgs() << "\n Likely Symbol : " << N;
}
});
// for a given symbol, there may be no symbol qualified for speculatively
// compile try to fix this before jumping to this code if possible.
for (auto &LookupPair : SpeculativeLookUpImpls)
ES.lookup(
LookupKind::Static,
makeJITDylibSearchOrder(LookupPair.first,
JITDylibLookupFlags::MatchAllSymbols),
SymbolLookupSet(LookupPair.second), SymbolState::Ready,
[this](Expected<SymbolMap> Result) {
if (auto Err = Result.takeError())
ES.reportError(std::move(Err));
},
NoDependenciesToRegister);
}
public:
Speculator(ImplSymbolMap &Impl, ExecutionSession &ref)
: AliaseeImplTable(Impl), ES(ref), GlobalSpecMap(0) {}
Speculator(const Speculator &) = delete;
Speculator(Speculator &&) = delete;
Speculator &operator=(const Speculator &) = delete;
Speculator &operator=(Speculator &&) = delete;
/// Define symbols for this Speculator object (__orc_speculator) and the
/// speculation runtime entry point symbol (__orc_speculate_for) in the
/// given JITDylib.
Error addSpeculationRuntime(JITDylib &JD, MangleAndInterner &Mangle);
// Speculatively compile likely functions for the given Stub Address.
// destination of __orc_speculate_for jump
void speculateFor(TargetFAddr StubAddr) { launchCompile(StubAddr); }
// FIXME : Register with Stub Address, after JITLink Fix.
void registerSymbols(FunctionCandidatesMap Candidates, JITDylib *JD) {
for (auto &SymPair : Candidates) {
auto Target = SymPair.first;
auto Likely = SymPair.second;
auto OnReadyFixUp = [Likely, Target,
this](Expected<SymbolMap> ReadySymbol) {
if (ReadySymbol) {
auto RDef = (*ReadySymbol)[Target];
registerSymbolsWithAddr(RDef.getAddress(), std::move(Likely));
} else
this->getES().reportError(ReadySymbol.takeError());
};
// Include non-exported symbols also.
ES.lookup(
LookupKind::Static,
makeJITDylibSearchOrder(JD, JITDylibLookupFlags::MatchAllSymbols),
SymbolLookupSet(Target, SymbolLookupFlags::WeaklyReferencedSymbol),
SymbolState::Ready, OnReadyFixUp, NoDependenciesToRegister);
}
}
ExecutionSession &getES() { return ES; }
private:
static void speculateForEntryPoint(Speculator *Ptr, uint64_t StubId);
std::mutex ConcurrentAccess;
ImplSymbolMap &AliaseeImplTable;
ExecutionSession &ES;
StubAddrLikelies GlobalSpecMap;
};
class IRSpeculationLayer : public IRLayer {
public:
using IRlikiesStrRef =
std::optional<DenseMap<StringRef, DenseSet<StringRef>>>;
using ResultEval = std::function<IRlikiesStrRef(Function &)>;
using TargetAndLikelies = DenseMap<SymbolStringPtr, SymbolNameSet>;
IRSpeculationLayer(ExecutionSession &ES, IRLayer &BaseLayer, Speculator &Spec,
MangleAndInterner &Mangle, ResultEval Interpreter)
: IRLayer(ES, BaseLayer.getManglingOptions()), NextLayer(BaseLayer),
S(Spec), Mangle(Mangle), QueryAnalysis(Interpreter) {}
void emit(std::unique_ptr<MaterializationResponsibility> R,
ThreadSafeModule TSM) override;
private:
TargetAndLikelies
internToJITSymbols(DenseMap<StringRef, DenseSet<StringRef>> IRNames) {
assert(!IRNames.empty() && "No IRNames received to Intern?");
TargetAndLikelies InternedNames;
for (auto &NamePair : IRNames) {
DenseSet<SymbolStringPtr> TargetJITNames;
for (auto &TargetNames : NamePair.second)
TargetJITNames.insert(Mangle(TargetNames));
InternedNames[Mangle(NamePair.first)] = std::move(TargetJITNames);
}
return InternedNames;
}
IRLayer &NextLayer;
Speculator &S;
MangleAndInterner &Mangle;
ResultEval QueryAnalysis;
};
} // namespace orc
} // namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_SPECULATION_H
PK iwFZ*��V- V- # ExecutionEngine/Orc/MachOPlatform.hnu �[��� //===-- MachOPlatform.h - Utilities for executing MachO in Orc --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Utilities for executing JIT'd MachO in Orc.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_MACHOPLATFORM_H
#define LLVM_EXECUTIONENGINE_ORC_MACHOPLATFORM_H
#include "llvm/ADT/StringRef.h"
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/ExecutionEngine/Orc/ExecutorProcessControl.h"
#include "llvm/ExecutionEngine/Orc/ObjectLinkingLayer.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include <future>
#include <thread>
#include <vector>
namespace llvm {
namespace orc {
/// Mediates between MachO initialization and ExecutionSession state.
class MachOPlatform : public Platform {
public:
// Used internally by MachOPlatform, but made public to enable serialization.
struct MachOJITDylibDepInfo {
bool Sealed = false;
std::vector<ExecutorAddr> DepHeaders;
};
// Used internally by MachOPlatform, but made public to enable serialization.
using MachOJITDylibDepInfoMap =
std::vector<std::pair<ExecutorAddr, MachOJITDylibDepInfo>>;
/// Try to create a MachOPlatform instance, adding the ORC runtime to the
/// given JITDylib.
///
/// The ORC runtime requires access to a number of symbols in libc++, and
/// requires access to symbols in libobjc, and libswiftCore to support
/// Objective-C and Swift code. It is up to the caller to ensure that the
/// requried symbols can be referenced by code added to PlatformJD. The
/// standard way to achieve this is to first attach dynamic library search
/// generators for either the given process, or for the specific required
/// libraries, to PlatformJD, then to create the platform instance:
///
/// \code{.cpp}
/// auto &PlatformJD = ES.createBareJITDylib("stdlib");
/// PlatformJD.addGenerator(
/// ExitOnErr(EPCDynamicLibrarySearchGenerator
/// ::GetForTargetProcess(EPC)));
/// ES.setPlatform(
/// ExitOnErr(MachOPlatform::Create(ES, ObjLayer, EPC, PlatformJD,
/// "/path/to/orc/runtime")));
/// \endcode
///
/// Alternatively, these symbols could be added to another JITDylib that
/// PlatformJD links against.
///
/// Clients are also responsible for ensuring that any JIT'd code that
/// depends on runtime functions (including any code using TLV or static
/// destructors) can reference the runtime symbols. This is usually achieved
/// by linking any JITDylibs containing regular code against
/// PlatformJD.
///
/// By default, MachOPlatform will add the set of aliases returned by the
/// standardPlatformAliases function. This includes both required aliases
/// (e.g. __cxa_atexit -> __orc_rt_macho_cxa_atexit for static destructor
/// support), and optional aliases that provide JIT versions of common
/// functions (e.g. dlopen -> __orc_rt_macho_jit_dlopen). Clients can
/// override these defaults by passing a non-None value for the
/// RuntimeAliases function, in which case the client is responsible for
/// setting up all aliases (including the required ones).
static Expected<std::unique_ptr<MachOPlatform>>
Create(ExecutionSession &ES, ObjectLinkingLayer &ObjLinkingLayer,
JITDylib &PlatformJD, std::unique_ptr<DefinitionGenerator> OrcRuntime,
std::optional<SymbolAliasMap> RuntimeAliases = std::nullopt);
/// Construct using a path to the ORC runtime.
static Expected<std::unique_ptr<MachOPlatform>>
Create(ExecutionSession &ES, ObjectLinkingLayer &ObjLinkingLayer,
JITDylib &PlatformJD, const char *OrcRuntimePath,
std::optional<SymbolAliasMap> RuntimeAliases = std::nullopt);
ExecutionSession &getExecutionSession() const { return ES; }
ObjectLinkingLayer &getObjectLinkingLayer() const { return ObjLinkingLayer; }
Error setupJITDylib(JITDylib &JD) override;
Error teardownJITDylib(JITDylib &JD) override;
Error notifyAdding(ResourceTracker &RT,
const MaterializationUnit &MU) override;
Error notifyRemoving(ResourceTracker &RT) override;
/// Returns an AliasMap containing the default aliases for the MachOPlatform.
/// This can be modified by clients when constructing the platform to add
/// or remove aliases.
static SymbolAliasMap standardPlatformAliases(ExecutionSession &ES);
/// Returns the array of required CXX aliases.
static ArrayRef<std::pair<const char *, const char *>> requiredCXXAliases();
/// Returns the array of standard runtime utility aliases for MachO.
static ArrayRef<std::pair<const char *, const char *>>
standardRuntimeUtilityAliases();
private:
// Data needed for bootstrap only.
struct BootstrapInfo {
std::mutex Mutex;
std::condition_variable CV;
size_t ActiveGraphs = 0;
shared::AllocActions DeferredAAs;
ExecutorAddr MachOHeaderAddr;
};
// The MachOPlatformPlugin scans/modifies LinkGraphs to support MachO
// platform features including initializers, exceptions, TLV, and language
// runtime registration.
class MachOPlatformPlugin : public ObjectLinkingLayer::Plugin {
public:
MachOPlatformPlugin(MachOPlatform &MP) : MP(MP) {}
void modifyPassConfig(MaterializationResponsibility &MR,
jitlink::LinkGraph &G,
jitlink::PassConfiguration &Config) override;
SyntheticSymbolDependenciesMap
getSyntheticSymbolDependencies(MaterializationResponsibility &MR) override;
// FIXME: We should be tentatively tracking scraped sections and discarding
// if the MR fails.
Error notifyFailed(MaterializationResponsibility &MR) override {
return Error::success();
}
Error notifyRemovingResources(JITDylib &JD, ResourceKey K) override {
return Error::success();
}
void notifyTransferringResources(JITDylib &JD, ResourceKey DstKey,
ResourceKey SrcKey) override {}
private:
using InitSymbolDepMap =
DenseMap<MaterializationResponsibility *, JITLinkSymbolSet>;
struct UnwindSections {
SmallVector<ExecutorAddrRange> CodeRanges;
ExecutorAddrRange DwarfSection;
ExecutorAddrRange CompactUnwindSection;
};
struct ObjCImageInfo {
uint32_t Version = 0;
uint32_t Flags = 0;
};
Error bootstrapPipelineStart(jitlink::LinkGraph &G);
Error bootstrapPipelineRecordRuntimeFunctions(jitlink::LinkGraph &G);
Error bootstrapPipelineEnd(jitlink::LinkGraph &G);
Error associateJITDylibHeaderSymbol(jitlink::LinkGraph &G,
MaterializationResponsibility &MR);
Error preserveImportantSections(jitlink::LinkGraph &G,
MaterializationResponsibility &MR);
Error processObjCImageInfo(jitlink::LinkGraph &G,
MaterializationResponsibility &MR);
Error fixTLVSectionsAndEdges(jitlink::LinkGraph &G, JITDylib &JD);
std::optional<UnwindSections> findUnwindSectionInfo(jitlink::LinkGraph &G);
Error registerObjectPlatformSections(jitlink::LinkGraph &G, JITDylib &JD,
bool InBootstrapPhase);
Error createObjCRuntimeObject(jitlink::LinkGraph &G);
Error populateObjCRuntimeObject(jitlink::LinkGraph &G,
MaterializationResponsibility &MR);
std::mutex PluginMutex;
MachOPlatform &MP;
// FIXME: ObjCImageInfos and HeaderAddrs need to be cleared when
// JITDylibs are removed.
DenseMap<JITDylib *, ObjCImageInfo> ObjCImageInfos;
DenseMap<JITDylib *, ExecutorAddr> HeaderAddrs;
InitSymbolDepMap InitSymbolDeps;
};
using GetJITDylibHeaderSendResultFn =
unique_function<void(Expected<ExecutorAddr>)>;
using GetJITDylibNameSendResultFn =
unique_function<void(Expected<StringRef>)>;
using PushInitializersSendResultFn =
unique_function<void(Expected<MachOJITDylibDepInfoMap>)>;
using SendSymbolAddressFn = unique_function<void(Expected<ExecutorAddr>)>;
static bool supportedTarget(const Triple &TT);
MachOPlatform(ExecutionSession &ES, ObjectLinkingLayer &ObjLinkingLayer,
JITDylib &PlatformJD,
std::unique_ptr<DefinitionGenerator> OrcRuntimeGenerator,
Error &Err);
// Associate MachOPlatform JIT-side runtime support functions with handlers.
Error associateRuntimeSupportFunctions();
// Implements rt_pushInitializers by making repeat async lookups for
// initializer symbols (each lookup may spawn more initializer symbols if
// it pulls in new materializers, e.g. from objects in a static library).
void pushInitializersLoop(PushInitializersSendResultFn SendResult,
JITDylibSP JD);
// Handle requests from the ORC runtime to push MachO initializer info.
void rt_pushInitializers(PushInitializersSendResultFn SendResult,
ExecutorAddr JDHeaderAddr);
// Handle requests for symbol addresses from the ORC runtime.
void rt_lookupSymbol(SendSymbolAddressFn SendResult, ExecutorAddr Handle,
StringRef SymbolName);
// Call the ORC runtime to create a pthread key.
Expected<uint64_t> createPThreadKey();
ExecutionSession &ES;
JITDylib &PlatformJD;
ObjectLinkingLayer &ObjLinkingLayer;
SymbolStringPtr MachOHeaderStartSymbol = ES.intern("___dso_handle");
struct RuntimeFunction {
RuntimeFunction(SymbolStringPtr Name) : Name(std::move(Name)) {}
SymbolStringPtr Name;
ExecutorAddr Addr;
};
RuntimeFunction PlatformBootstrap{
ES.intern("___orc_rt_macho_platform_bootstrap")};
RuntimeFunction PlatformShutdown{
ES.intern("___orc_rt_macho_platform_shutdown")};
RuntimeFunction RegisterEHFrameSection{
ES.intern("___orc_rt_macho_register_ehframe_section")};
RuntimeFunction DeregisterEHFrameSection{
ES.intern("___orc_rt_macho_deregister_ehframe_section")};
RuntimeFunction RegisterJITDylib{
ES.intern("___orc_rt_macho_register_jitdylib")};
RuntimeFunction DeregisterJITDylib{
ES.intern("___orc_rt_macho_deregister_jitdylib")};
RuntimeFunction RegisterObjectPlatformSections{
ES.intern("___orc_rt_macho_register_object_platform_sections")};
RuntimeFunction DeregisterObjectPlatformSections{
ES.intern("___orc_rt_macho_deregister_object_platform_sections")};
RuntimeFunction CreatePThreadKey{
ES.intern("___orc_rt_macho_create_pthread_key")};
RuntimeFunction RegisterObjCRuntimeObject{
ES.intern("___orc_rt_macho_register_objc_runtime_object")};
RuntimeFunction DeregisterObjCRuntimeObject{
ES.intern("___orc_rt_macho_deregister_objc_runtime_object")};
DenseMap<JITDylib *, SymbolLookupSet> RegisteredInitSymbols;
std::mutex PlatformMutex;
DenseMap<JITDylib *, ExecutorAddr> JITDylibToHeaderAddr;
DenseMap<ExecutorAddr, JITDylib *> HeaderAddrToJITDylib;
DenseMap<JITDylib *, uint64_t> JITDylibToPThreadKey;
std::atomic<BootstrapInfo *> Bootstrap;
};
namespace shared {
using SPSNamedExecutorAddrRangeSequence =
SPSSequence<SPSTuple<SPSString, SPSExecutorAddrRange>>;
} // end namespace shared
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_MACHOPLATFORM_H
PK iwFZ[�O�� � 4 ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.hnu �[��� //===- EPCGenericJITLinkMemoryManager.h - EPC-based mem manager -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Implements JITLinkMemoryManager by making remove calls via
// ExecutorProcessControl::callWrapperAsync.
//
// This simplifies the implementaton of new ExecutorProcessControl instances,
// as this implementation will always work (at the cost of some performance
// overhead for the calls).
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_EPCGENERICJITLINKMEMORYMANAGER_H
#define LLVM_EXECUTIONENGINE_ORC_EPCGENERICJITLINKMEMORYMANAGER_H
#include "llvm/ExecutionEngine/JITLink/JITLinkMemoryManager.h"
#include "llvm/ExecutionEngine/Orc/Core.h"
namespace llvm {
namespace orc {
class EPCGenericJITLinkMemoryManager : public jitlink::JITLinkMemoryManager {
public:
/// Function addresses for memory access.
struct SymbolAddrs {
ExecutorAddr Allocator;
ExecutorAddr Reserve;
ExecutorAddr Finalize;
ExecutorAddr Deallocate;
};
/// Create an EPCGenericJITLinkMemoryManager instance from a given set of
/// function addrs.
EPCGenericJITLinkMemoryManager(ExecutorProcessControl &EPC, SymbolAddrs SAs)
: EPC(EPC), SAs(SAs) {}
void allocate(const jitlink::JITLinkDylib *JD, jitlink::LinkGraph &G,
OnAllocatedFunction OnAllocated) override;
// Use overloads from base class.
using JITLinkMemoryManager::allocate;
void deallocate(std::vector<FinalizedAlloc> Allocs,
OnDeallocatedFunction OnDeallocated) override;
// Use overloads from base class.
using JITLinkMemoryManager::deallocate;
private:
class InFlightAlloc;
void completeAllocation(ExecutorAddr AllocAddr, jitlink::BasicLayout BL,
OnAllocatedFunction OnAllocated);
ExecutorProcessControl &EPC;
SymbolAddrs SAs;
};
namespace shared {
/// FIXME: This specialization should be moved into TargetProcessControlTypes.h
/// (or whereever those types get merged to) once ORC depends on JITLink.
template <>
class SPSSerializationTraits<SPSExecutorAddr,
jitlink::JITLinkMemoryManager::FinalizedAlloc> {
public:
static size_t size(const jitlink::JITLinkMemoryManager::FinalizedAlloc &FA) {
return SPSArgList<SPSExecutorAddr>::size(ExecutorAddr(FA.getAddress()));
}
static bool
serialize(SPSOutputBuffer &OB,
const jitlink::JITLinkMemoryManager::FinalizedAlloc &FA) {
return SPSArgList<SPSExecutorAddr>::serialize(
OB, ExecutorAddr(FA.getAddress()));
}
static bool deserialize(SPSInputBuffer &IB,
jitlink::JITLinkMemoryManager::FinalizedAlloc &FA) {
ExecutorAddr A;
if (!SPSArgList<SPSExecutorAddr>::deserialize(IB, A))
return false;
FA = jitlink::JITLinkMemoryManager::FinalizedAlloc(A);
return true;
}
};
} // end namespace shared
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_EPCGENERICJITLINKMEMORYMANAGER_H
PK iwFZ � ڀ � & ExecutionEngine/Orc/ThreadSafeModule.hnu �[��� //===----------- ThreadSafeModule.h -- Layer interfaces ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Thread safe wrappers and utilities for Module and LLVMContext.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_THREADSAFEMODULE_H
#define LLVM_EXECUTIONENGINE_ORC_THREADSAFEMODULE_H
#include "llvm/IR/LLVMContext.h"
#include "llvm/IR/Module.h"
#include "llvm/Support/Compiler.h"
#include <functional>
#include <memory>
#include <mutex>
namespace llvm {
namespace orc {
/// An LLVMContext together with an associated mutex that can be used to lock
/// the context to prevent concurrent access by other threads.
class ThreadSafeContext {
private:
struct State {
State(std::unique_ptr<LLVMContext> Ctx) : Ctx(std::move(Ctx)) {}
std::unique_ptr<LLVMContext> Ctx;
std::recursive_mutex Mutex;
};
public:
// RAII based lock for ThreadSafeContext.
class [[nodiscard]] Lock {
public:
Lock(std::shared_ptr<State> S) : S(std::move(S)), L(this->S->Mutex) {}
private:
std::shared_ptr<State> S;
std::unique_lock<std::recursive_mutex> L;
};
/// Construct a null context.
ThreadSafeContext() = default;
/// Construct a ThreadSafeContext from the given LLVMContext.
ThreadSafeContext(std::unique_ptr<LLVMContext> NewCtx)
: S(std::make_shared<State>(std::move(NewCtx))) {
assert(S->Ctx != nullptr &&
"Can not construct a ThreadSafeContext from a nullptr");
}
/// Returns a pointer to the LLVMContext that was used to construct this
/// instance, or null if the instance was default constructed.
LLVMContext *getContext() { return S ? S->Ctx.get() : nullptr; }
/// Returns a pointer to the LLVMContext that was used to construct this
/// instance, or null if the instance was default constructed.
const LLVMContext *getContext() const { return S ? S->Ctx.get() : nullptr; }
Lock getLock() const {
assert(S && "Can not lock an empty ThreadSafeContext");
return Lock(S);
}
private:
std::shared_ptr<State> S;
};
/// An LLVM Module together with a shared ThreadSafeContext.
class ThreadSafeModule {
public:
/// Default construct a ThreadSafeModule. This results in a null module and
/// null context.
ThreadSafeModule() = default;
ThreadSafeModule(ThreadSafeModule &&Other) = default;
ThreadSafeModule &operator=(ThreadSafeModule &&Other) {
// We have to explicitly define this move operator to copy the fields in
// reverse order (i.e. module first) to ensure the dependencies are
// protected: The old module that is being overwritten must be destroyed
// *before* the context that it depends on.
// We also need to lock the context to make sure the module tear-down
// does not overlap any other work on the context.
if (M) {
auto L = TSCtx.getLock();
M = nullptr;
}
M = std::move(Other.M);
TSCtx = std::move(Other.TSCtx);
return *this;
}
/// Construct a ThreadSafeModule from a unique_ptr<Module> and a
/// unique_ptr<LLVMContext>. This creates a new ThreadSafeContext from the
/// given context.
ThreadSafeModule(std::unique_ptr<Module> M, std::unique_ptr<LLVMContext> Ctx)
: M(std::move(M)), TSCtx(std::move(Ctx)) {}
/// Construct a ThreadSafeModule from a unique_ptr<Module> and an
/// existing ThreadSafeContext.
ThreadSafeModule(std::unique_ptr<Module> M, ThreadSafeContext TSCtx)
: M(std::move(M)), TSCtx(std::move(TSCtx)) {}
~ThreadSafeModule() {
// We need to lock the context while we destruct the module.
if (M) {
auto L = TSCtx.getLock();
M = nullptr;
}
}
/// Boolean conversion: This ThreadSafeModule will evaluate to true if it
/// wraps a non-null module.
explicit operator bool() const {
if (M) {
assert(TSCtx.getContext() &&
"Non-null module must have non-null context");
return true;
}
return false;
}
/// Locks the associated ThreadSafeContext and calls the given function
/// on the contained Module.
template <typename Func> decltype(auto) withModuleDo(Func &&F) {
assert(M && "Can not call on null module");
auto Lock = TSCtx.getLock();
return F(*M);
}
/// Locks the associated ThreadSafeContext and calls the given function
/// on the contained Module.
template <typename Func> decltype(auto) withModuleDo(Func &&F) const {
assert(M && "Can not call on null module");
auto Lock = TSCtx.getLock();
return F(*M);
}
/// Locks the associated ThreadSafeContext and calls the given function,
/// passing the contained std::unique_ptr<Module>. The given function should
/// consume the Module.
template <typename Func> decltype(auto) consumingModuleDo(Func &&F) {
auto Lock = TSCtx.getLock();
return F(std::move(M));
}
/// Get a raw pointer to the contained module without locking the context.
Module *getModuleUnlocked() { return M.get(); }
/// Get a raw pointer to the contained module without locking the context.
const Module *getModuleUnlocked() const { return M.get(); }
/// Returns the context for this ThreadSafeModule.
ThreadSafeContext getContext() const { return TSCtx; }
private:
std::unique_ptr<Module> M;
ThreadSafeContext TSCtx;
};
using GVPredicate = std::function<bool(const GlobalValue &)>;
using GVModifier = std::function<void(GlobalValue &)>;
/// Clones the given module on to a new context.
ThreadSafeModule
cloneToNewContext(const ThreadSafeModule &TSMW,
GVPredicate ShouldCloneDef = GVPredicate(),
GVModifier UpdateClonedDefSource = GVModifier());
} // End namespace orc
} // End namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_THREADSAFEMODULE_H
PK iwFZ�5 & ExecutionEngine/Orc/IRTransformLayer.hnu �[��� //===- IRTransformLayer.h - Run all IR through a functor --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Run all IR passed in through a user supplied functor.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_IRTRANSFORMLAYER_H
#define LLVM_EXECUTIONENGINE_ORC_IRTRANSFORMLAYER_H
#include "llvm/ADT/FunctionExtras.h"
#include "llvm/ExecutionEngine/JITSymbol.h"
#include "llvm/ExecutionEngine/Orc/Layer.h"
#include <memory>
namespace llvm {
namespace orc {
/// A layer that applies a transform to emitted modules.
/// The transform function is responsible for locking the ThreadSafeContext
/// before operating on the module.
class IRTransformLayer : public IRLayer {
public:
using TransformFunction = unique_function<Expected<ThreadSafeModule>(
ThreadSafeModule, MaterializationResponsibility &R)>;
IRTransformLayer(ExecutionSession &ES, IRLayer &BaseLayer,
TransformFunction Transform = identityTransform);
void setTransform(TransformFunction Transform) {
this->Transform = std::move(Transform);
}
void emit(std::unique_ptr<MaterializationResponsibility> R,
ThreadSafeModule TSM) override;
static ThreadSafeModule identityTransform(ThreadSafeModule TSM,
MaterializationResponsibility &R) {
return TSM;
}
private:
IRLayer &BaseLayer;
TransformFunction Transform;
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_IRTRANSFORMLAYER_H
PK iwFZ��mЃ$ �$ ( ExecutionEngine/Orc/ObjectLinkingLayer.hnu �[��� //===-- ObjectLinkingLayer.h - JITLink-based jit linking layer --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Contains the definition for an JITLink-based, in-process object linking
// layer.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_OBJECTLINKINGLAYER_H
#define LLVM_EXECUTIONENGINE_ORC_OBJECTLINKINGLAYER_H
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
#include "llvm/ExecutionEngine/JITSymbol.h"
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/ExecutionEngine/Orc/Layer.h"
#include "llvm/Support/Error.h"
#include <algorithm>
#include <cassert>
#include <functional>
#include <list>
#include <memory>
#include <utility>
#include <vector>
namespace llvm {
namespace jitlink {
class EHFrameRegistrar;
class LinkGraph;
class Symbol;
} // namespace jitlink
namespace orc {
class ObjectLinkingLayerJITLinkContext;
/// An ObjectLayer implementation built on JITLink.
///
/// Clients can use this class to add relocatable object files to an
/// ExecutionSession, and it typically serves as the base layer (underneath
/// a compiling layer like IRCompileLayer) for the rest of the JIT.
class ObjectLinkingLayer : public RTTIExtends<ObjectLinkingLayer, ObjectLayer>,
private ResourceManager {
friend class ObjectLinkingLayerJITLinkContext;
public:
static char ID;
/// Plugin instances can be added to the ObjectLinkingLayer to receive
/// callbacks when code is loaded or emitted, and when JITLink is being
/// configured.
class Plugin {
public:
using JITLinkSymbolSet = DenseSet<jitlink::Symbol *>;
using SyntheticSymbolDependenciesMap =
DenseMap<SymbolStringPtr, JITLinkSymbolSet>;
virtual ~Plugin();
virtual void modifyPassConfig(MaterializationResponsibility &MR,
jitlink::LinkGraph &G,
jitlink::PassConfiguration &Config) {}
// Deprecated. Don't use this in new code. There will be a proper mechanism
// for capturing object buffers.
virtual void notifyMaterializing(MaterializationResponsibility &MR,
jitlink::LinkGraph &G,
jitlink::JITLinkContext &Ctx,
MemoryBufferRef InputObject) {}
virtual void notifyLoaded(MaterializationResponsibility &MR) {}
virtual Error notifyEmitted(MaterializationResponsibility &MR) {
return Error::success();
}
virtual Error notifyFailed(MaterializationResponsibility &MR) = 0;
virtual Error notifyRemovingResources(JITDylib &JD, ResourceKey K) = 0;
virtual void notifyTransferringResources(JITDylib &JD, ResourceKey DstKey,
ResourceKey SrcKey) = 0;
/// Return any dependencies that synthetic symbols (e.g. init symbols)
/// have on symbols in the LinkGraph.
/// This is used by the ObjectLinkingLayer to update the dependencies for
/// the synthetic symbols.
virtual SyntheticSymbolDependenciesMap
getSyntheticSymbolDependencies(MaterializationResponsibility &MR) {
return SyntheticSymbolDependenciesMap();
}
};
using ReturnObjectBufferFunction =
std::function<void(std::unique_ptr<MemoryBuffer>)>;
/// Construct an ObjectLinkingLayer using the ExecutorProcessControl
/// instance's memory manager.
ObjectLinkingLayer(ExecutionSession &ES);
/// Construct an ObjectLinkingLayer using a custom memory manager.
ObjectLinkingLayer(ExecutionSession &ES,
jitlink::JITLinkMemoryManager &MemMgr);
/// Construct an ObjectLinkingLayer. Takes ownership of the given
/// JITLinkMemoryManager. This method is a temporary hack to simplify
/// co-existence with RTDyldObjectLinkingLayer (which also owns its
/// allocators).
ObjectLinkingLayer(ExecutionSession &ES,
std::unique_ptr<jitlink::JITLinkMemoryManager> MemMgr);
/// Destruct an ObjectLinkingLayer.
~ObjectLinkingLayer();
/// Set an object buffer return function. By default object buffers are
/// deleted once the JIT has linked them. If a return function is set then
/// it will be called to transfer ownership of the buffer instead.
void setReturnObjectBuffer(ReturnObjectBufferFunction ReturnObjectBuffer) {
this->ReturnObjectBuffer = std::move(ReturnObjectBuffer);
}
/// Add a pass-config modifier.
ObjectLinkingLayer &addPlugin(std::unique_ptr<Plugin> P) {
std::lock_guard<std::mutex> Lock(LayerMutex);
Plugins.push_back(std::move(P));
return *this;
}
/// Add a LinkGraph to the JITDylib targeted by the given tracker.
Error add(ResourceTrackerSP, std::unique_ptr<jitlink::LinkGraph> G);
/// Add a LinkGraph to the given JITDylib.
Error add(JITDylib &JD, std::unique_ptr<jitlink::LinkGraph> G) {
return add(JD.getDefaultResourceTracker(), std::move(G));
}
// Un-hide ObjectLayer add methods.
using ObjectLayer::add;
/// Emit an object file.
void emit(std::unique_ptr<MaterializationResponsibility> R,
std::unique_ptr<MemoryBuffer> O) override;
/// Emit a LinkGraph.
void emit(std::unique_ptr<MaterializationResponsibility> R,
std::unique_ptr<jitlink::LinkGraph> G);
/// Instructs this ObjectLinkingLayer instance to override the symbol flags
/// found in the AtomGraph with the flags supplied by the
/// MaterializationResponsibility instance. This is a workaround to support
/// symbol visibility in COFF, which does not use the libObject's
/// SF_Exported flag. Use only when generating / adding COFF object files.
///
/// FIXME: We should be able to remove this if/when COFF properly tracks
/// exported symbols.
ObjectLinkingLayer &
setOverrideObjectFlagsWithResponsibilityFlags(bool OverrideObjectFlags) {
this->OverrideObjectFlags = OverrideObjectFlags;
return *this;
}
/// If set, this ObjectLinkingLayer instance will claim responsibility
/// for any symbols provided by a given object file that were not already in
/// the MaterializationResponsibility instance. Setting this flag allows
/// higher-level program representations (e.g. LLVM IR) to be added based on
/// only a subset of the symbols they provide, without having to write
/// intervening layers to scan and add the additional symbols. This trades
/// diagnostic quality for convenience however: If all symbols are enumerated
/// up-front then clashes can be detected and reported early (and usually
/// deterministically). If this option is set, clashes for the additional
/// symbols may not be detected until late, and detection may depend on
/// the flow of control through JIT'd code. Use with care.
ObjectLinkingLayer &
setAutoClaimResponsibilityForObjectSymbols(bool AutoClaimObjectSymbols) {
this->AutoClaimObjectSymbols = AutoClaimObjectSymbols;
return *this;
}
private:
using FinalizedAlloc = jitlink::JITLinkMemoryManager::FinalizedAlloc;
void modifyPassConfig(MaterializationResponsibility &MR,
jitlink::LinkGraph &G,
jitlink::PassConfiguration &PassConfig);
void notifyLoaded(MaterializationResponsibility &MR);
Error notifyEmitted(MaterializationResponsibility &MR, FinalizedAlloc FA);
Error handleRemoveResources(JITDylib &JD, ResourceKey K) override;
void handleTransferResources(JITDylib &JD, ResourceKey DstKey,
ResourceKey SrcKey) override;
mutable std::mutex LayerMutex;
jitlink::JITLinkMemoryManager &MemMgr;
std::unique_ptr<jitlink::JITLinkMemoryManager> MemMgrOwnership;
bool OverrideObjectFlags = false;
bool AutoClaimObjectSymbols = false;
ReturnObjectBufferFunction ReturnObjectBuffer;
DenseMap<ResourceKey, std::vector<FinalizedAlloc>> Allocs;
std::vector<std::unique_ptr<Plugin>> Plugins;
};
class EHFrameRegistrationPlugin : public ObjectLinkingLayer::Plugin {
public:
EHFrameRegistrationPlugin(
ExecutionSession &ES,
std::unique_ptr<jitlink::EHFrameRegistrar> Registrar);
void modifyPassConfig(MaterializationResponsibility &MR,
jitlink::LinkGraph &G,
jitlink::PassConfiguration &PassConfig) override;
Error notifyEmitted(MaterializationResponsibility &MR) override;
Error notifyFailed(MaterializationResponsibility &MR) override;
Error notifyRemovingResources(JITDylib &JD, ResourceKey K) override;
void notifyTransferringResources(JITDylib &JD, ResourceKey DstKey,
ResourceKey SrcKey) override;
private:
std::mutex EHFramePluginMutex;
ExecutionSession &ES;
std::unique_ptr<jitlink::EHFrameRegistrar> Registrar;
DenseMap<MaterializationResponsibility *, ExecutorAddrRange> InProcessLinks;
DenseMap<ResourceKey, std::vector<ExecutorAddrRange>> EHFrameRanges;
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_OBJECTLINKINGLAYER_H
PK iwFZ����q q 9 ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.hnu �[��� //===---- SimpleRemoteEPCServer.h - EPC over abstract channel ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// EPC over simple abstract channel.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_SIMPLEREMOTEEPCSERVER_H
#define LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_SIMPLEREMOTEEPCSERVER_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/FunctionExtras.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.h"
#include "llvm/ExecutionEngine/Orc/Shared/TargetProcessControlTypes.h"
#include "llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h"
#include "llvm/ExecutionEngine/Orc/TargetProcess/ExecutorBootstrapService.h"
#include "llvm/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.h"
#include "llvm/Support/DynamicLibrary.h"
#include "llvm/Support/Error.h"
#include <condition_variable>
#include <future>
#include <memory>
#include <mutex>
namespace llvm {
namespace orc {
/// A simple EPC server implementation.
class SimpleRemoteEPCServer : public SimpleRemoteEPCTransportClient {
public:
using ReportErrorFunction = unique_function<void(Error)>;
/// Dispatches calls to runWrapper.
class Dispatcher {
public:
virtual ~Dispatcher();
virtual void dispatch(unique_function<void()> Work) = 0;
virtual void shutdown() = 0;
};
#if LLVM_ENABLE_THREADS
class ThreadDispatcher : public Dispatcher {
public:
void dispatch(unique_function<void()> Work) override;
void shutdown() override;
private:
std::mutex DispatchMutex;
bool Running = true;
size_t Outstanding = 0;
std::condition_variable OutstandingCV;
};
#endif
class Setup {
friend class SimpleRemoteEPCServer;
public:
SimpleRemoteEPCServer &server() { return S; }
StringMap<std::vector<char>> &bootstrapMap() { return BootstrapMap; }
template <typename T, typename SPSTagT>
void setBootstrapMapValue(std::string Key, const T &Value) {
std::vector<char> Buffer;
Buffer.resize(shared::SPSArgList<SPSTagT>::size(Value));
shared::SPSOutputBuffer OB(Buffer.data(), Buffer.size());
bool Success = shared::SPSArgList<SPSTagT>::serialize(OB, Value);
(void)Success;
assert(Success && "Bootstrap map value serialization failed");
BootstrapMap[std::move(Key)] = std::move(Buffer);
}
StringMap<ExecutorAddr> &bootstrapSymbols() { return BootstrapSymbols; }
std::vector<std::unique_ptr<ExecutorBootstrapService>> &services() {
return Services;
}
void setDispatcher(std::unique_ptr<Dispatcher> D) { S.D = std::move(D); }
void setErrorReporter(unique_function<void(Error)> ReportError) {
S.ReportError = std::move(ReportError);
}
private:
Setup(SimpleRemoteEPCServer &S) : S(S) {}
SimpleRemoteEPCServer &S;
StringMap<std::vector<char>> BootstrapMap;
StringMap<ExecutorAddr> BootstrapSymbols;
std::vector<std::unique_ptr<ExecutorBootstrapService>> Services;
};
static StringMap<ExecutorAddr> defaultBootstrapSymbols();
template <typename TransportT, typename... TransportTCtorArgTs>
static Expected<std::unique_ptr<SimpleRemoteEPCServer>>
Create(unique_function<Error(Setup &S)> SetupFunction,
TransportTCtorArgTs &&...TransportTCtorArgs) {
auto Server = std::make_unique<SimpleRemoteEPCServer>();
Setup S(*Server);
if (auto Err = SetupFunction(S))
return std::move(Err);
// Set ReportError up-front so that it can be used if construction
// process fails.
if (!Server->ReportError)
Server->ReportError = [](Error Err) {
logAllUnhandledErrors(std::move(Err), errs(), "SimpleRemoteEPCServer ");
};
// Attempt to create transport.
auto T = TransportT::Create(
*Server, std::forward<TransportTCtorArgTs>(TransportTCtorArgs)...);
if (!T)
return T.takeError();
Server->T = std::move(*T);
if (auto Err = Server->T->start())
return std::move(Err);
// If transport creation succeeds then start up services.
Server->Services = std::move(S.services());
Server->Services.push_back(
std::make_unique<rt_bootstrap::SimpleExecutorDylibManager>());
for (auto &Service : Server->Services)
Service->addBootstrapSymbols(S.bootstrapSymbols());
if (auto Err = Server->sendSetupMessage(std::move(S.BootstrapMap),
std::move(S.BootstrapSymbols)))
return std::move(Err);
return std::move(Server);
}
/// Set an error reporter for this server.
void setErrorReporter(ReportErrorFunction ReportError) {
this->ReportError = std::move(ReportError);
}
/// Call to handle an incoming message.
///
/// Returns 'Disconnect' if the message is a 'detach' message from the remote
/// otherwise returns 'Continue'. If the server has moved to an error state,
/// returns an error, which should be reported and treated as a 'Disconnect'.
Expected<HandleMessageAction>
handleMessage(SimpleRemoteEPCOpcode OpC, uint64_t SeqNo, ExecutorAddr TagAddr,
SimpleRemoteEPCArgBytesVector ArgBytes) override;
Error waitForDisconnect();
void handleDisconnect(Error Err) override;
private:
Error sendMessage(SimpleRemoteEPCOpcode OpC, uint64_t SeqNo,
ExecutorAddr TagAddr, ArrayRef<char> ArgBytes);
Error sendSetupMessage(StringMap<std::vector<char>> BootstrapMap,
StringMap<ExecutorAddr> BootstrapSymbols);
Error handleResult(uint64_t SeqNo, ExecutorAddr TagAddr,
SimpleRemoteEPCArgBytesVector ArgBytes);
void handleCallWrapper(uint64_t RemoteSeqNo, ExecutorAddr TagAddr,
SimpleRemoteEPCArgBytesVector ArgBytes);
shared::WrapperFunctionResult
doJITDispatch(const void *FnTag, const char *ArgData, size_t ArgSize);
static shared::CWrapperFunctionResult jitDispatchEntry(void *DispatchCtx,
const void *FnTag,
const char *ArgData,
size_t ArgSize);
uint64_t getNextSeqNo() { return NextSeqNo++; }
void releaseSeqNo(uint64_t) {}
using PendingJITDispatchResultsMap =
DenseMap<uint64_t, std::promise<shared::WrapperFunctionResult> *>;
std::mutex ServerStateMutex;
std::condition_variable ShutdownCV;
enum { ServerRunning, ServerShuttingDown, ServerShutDown } RunState;
Error ShutdownErr = Error::success();
std::unique_ptr<SimpleRemoteEPCTransport> T;
std::unique_ptr<Dispatcher> D;
std::vector<std::unique_ptr<ExecutorBootstrapService>> Services;
ReportErrorFunction ReportError;
uint64_t NextSeqNo = 0;
PendingJITDispatchResultsMap PendingJITDispatchResults;
std::vector<sys::DynamicLibrary> Dylibs;
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_SIMPLEREMOTEEPCSERVER_H
PK iwFZ@�� � < ExecutionEngine/Orc/TargetProcess/ExecutorBootstrapService.hnu �[��� //===- ExecutorService.h - Provide bootstrap symbols to session -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Provides a service by supplying some set of bootstrap symbols.
//
// FIXME: The functionality in this file should be moved to the ORC runtime.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_EXECUTORBOOTSTRAPSERVICE_H
#define LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_EXECUTORBOOTSTRAPSERVICE_H
#include "llvm/ADT/StringMap.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
namespace llvm {
namespace orc {
class ExecutorBootstrapService {
public:
virtual ~ExecutorBootstrapService();
virtual void
addBootstrapSymbols(StringMap<ExecutorAddr> &BootstrapSymbols) = 0;
virtual Error shutdown() = 0;
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_EXECUTORBOOTSTRAPSERVICE_H
PK iwFZp��w w 4 ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.hnu �[��� //===----- RegisterEHFrames.h -- Register EH frame sections -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Support for dynamically registering and deregistering eh-frame sections
// in-process via libunwind.
//
// FIXME: The functionality in this file should be moved to the ORC runtime.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_REGISTEREHFRAMES_H
#define LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_REGISTEREHFRAMES_H
#include "llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h"
#include "llvm/Support/Error.h"
namespace llvm {
namespace orc {
/// Register frames in the given eh-frame section with libunwind.
Error registerEHFrameSection(const void *EHFrameSectionAddr,
size_t EHFrameSectionSize);
/// Unregister frames in the given eh-frame section with libunwind.
Error deregisterEHFrameSection(const void *EHFrameSectionAddr,
size_t EHFrameSectionSize);
} // end namespace orc
} // end namespace llvm
extern "C" llvm::orc::shared::CWrapperFunctionResult
llvm_orc_registerEHFrameSectionWrapper(const char *Data, uint64_t Size);
extern "C" llvm::orc::shared::CWrapperFunctionResult
llvm_orc_deregisterEHFrameSectionWrapper(const char *Data, uint64_t Size);
#endif // LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_REGISTEREHFRAMES_H
PK iwFZ�I�q* * ? ExecutionEngine/Orc/TargetProcess/SimpleExecutorMemoryManager.hnu �[��� //===---------------- SimpleExecutorMemoryManager.h -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// A simple allocator class suitable for basic remote-JIT use.
//
// FIXME: The functionality in this file should be moved to the ORC runtime.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_SIMPLEEXECUTORMEMORYMANAGER_H
#define LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_SIMPLEEXECUTORMEMORYMANAGER_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include "llvm/ExecutionEngine/Orc/Shared/TargetProcessControlTypes.h"
#include "llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h"
#include "llvm/ExecutionEngine/Orc/TargetProcess/ExecutorBootstrapService.h"
#include "llvm/Support/Error.h"
#include <mutex>
namespace llvm {
namespace orc {
namespace rt_bootstrap {
/// Simple page-based allocator.
class SimpleExecutorMemoryManager : public ExecutorBootstrapService {
public:
virtual ~SimpleExecutorMemoryManager();
Expected<ExecutorAddr> allocate(uint64_t Size);
Error finalize(tpctypes::FinalizeRequest &FR);
Error deallocate(const std::vector<ExecutorAddr> &Bases);
Error shutdown() override;
void addBootstrapSymbols(StringMap<ExecutorAddr> &M) override;
private:
struct Allocation {
size_t Size = 0;
std::vector<shared::WrapperFunctionCall> DeallocationActions;
};
using AllocationsMap = DenseMap<void *, Allocation>;
Error deallocateImpl(void *Base, Allocation &A);
static llvm::orc::shared::CWrapperFunctionResult
reserveWrapper(const char *ArgData, size_t ArgSize);
static llvm::orc::shared::CWrapperFunctionResult
finalizeWrapper(const char *ArgData, size_t ArgSize);
static llvm::orc::shared::CWrapperFunctionResult
deallocateWrapper(const char *ArgData, size_t ArgSize);
std::mutex M;
AllocationsMap Allocations;
};
} // end namespace rt_bootstrap
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_SIMPLEEXECUTORMEMORYMANAGER_H
PK iwFZ�� 0 ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.hnu �[��� //===- JITLoaderGDB.h - Register objects via GDB JIT interface -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Register objects for access by debuggers via the GDB JIT interface.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_JITLOADERGDB_H
#define LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_JITLOADERGDB_H
#include "llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h"
#include <cstdint>
extern "C" llvm::orc::shared::CWrapperFunctionResult
llvm_orc_registerJITLoaderGDBWrapper(const char *Data, uint64_t Size);
extern "C" llvm::orc::shared::CWrapperFunctionResult
llvm_orc_registerJITLoaderGDBAllocAction(const char *Data, size_t Size);
#endif // LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_JITLOADERGDB_H
PK iwFZ?J�j� � > ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.hnu �[��� //===--------------- SimpleExecutorDylibManager.h ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// A simple dynamic library management class. Allows dynamic libraries to be
// loaded and searched.
//
// FIXME: The functionality in this file should be moved to the ORC runtime.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_SIMPLEEXECUTORDYLIBMANAGER_H
#define LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_SIMPLEEXECUTORDYLIBMANAGER_H
#include "llvm/ADT/DenseSet.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include "llvm/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.h"
#include "llvm/ExecutionEngine/Orc/Shared/TargetProcessControlTypes.h"
#include "llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h"
#include "llvm/ExecutionEngine/Orc/TargetProcess/ExecutorBootstrapService.h"
#include "llvm/Support/DynamicLibrary.h"
#include "llvm/Support/Error.h"
#include <mutex>
namespace llvm {
namespace orc {
namespace rt_bootstrap {
/// Simple page-based allocator.
class SimpleExecutorDylibManager : public ExecutorBootstrapService {
public:
virtual ~SimpleExecutorDylibManager();
Expected<tpctypes::DylibHandle> open(const std::string &Path, uint64_t Mode);
Expected<std::vector<ExecutorAddr>> lookup(tpctypes::DylibHandle H,
const RemoteSymbolLookupSet &L);
Error shutdown() override;
void addBootstrapSymbols(StringMap<ExecutorAddr> &M) override;
private:
using DylibSet = DenseSet<void *>;
static llvm::orc::shared::CWrapperFunctionResult
openWrapper(const char *ArgData, size_t ArgSize);
static llvm::orc::shared::CWrapperFunctionResult
lookupWrapper(const char *ArgData, size_t ArgSize);
std::mutex M;
DylibSet Dylibs;
};
} // end namespace rt_bootstrap
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_SIMPLEEXECUTORDYLIBMANAGER_H
PK iwFZ�w� � 8 ExecutionEngine/Orc/TargetProcess/TargetExecutionUtils.hnu �[��� //===-- TargetExecutionUtils.h - Utils for execution in target --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Utilities for execution in the target process.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_TARGETEXECUTIONUTILS_H
#define LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_TARGETEXECUTIONUTILS_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include <string>
namespace llvm {
namespace orc {
/// Run a main function, returning the result.
///
/// If the optional ProgramName argument is given then it will be inserted
/// before the strings in Args as the first argument to the called function.
///
/// It is legal to have an empty argument list and no program name, however
/// many main functions will expect a name argument at least, and will fail
/// if none is provided.
int runAsMain(int (*Main)(int, char *[]), ArrayRef<std::string> Args,
std::optional<StringRef> ProgramName = std::nullopt);
int runAsVoidFunction(int (*Func)(void));
int runAsIntFunction(int (*Func)(int), int Arg);
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_TARGETEXECUTIONUTILS_H
PK iwFZO��/
E ExecutionEngine/Orc/TargetProcess/ExecutorSharedMemoryMapperService.hnu �[��� //===----------- ExecutorSharedMemoryMapperService.h ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_EXECUTORSHAREDMEMORYMAPPERSERVICE_H
#define LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_EXECUTORSHAREDMEMORYMAPPERSERVICE_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ExecutionEngine/Orc/Shared/TargetProcessControlTypes.h"
#include "llvm/ExecutionEngine/Orc/TargetProcess/ExecutorBootstrapService.h"
#include <atomic>
#include <mutex>
#if defined(_WIN32)
#include <windows.h>
#endif
namespace llvm {
namespace orc {
namespace rt_bootstrap {
class ExecutorSharedMemoryMapperService final
: public ExecutorBootstrapService {
public:
~ExecutorSharedMemoryMapperService(){};
Expected<std::pair<ExecutorAddr, std::string>> reserve(uint64_t Size);
Expected<ExecutorAddr> initialize(ExecutorAddr Reservation,
tpctypes::SharedMemoryFinalizeRequest &FR);
Error deinitialize(const std::vector<ExecutorAddr> &Bases);
Error release(const std::vector<ExecutorAddr> &Bases);
Error shutdown() override;
void addBootstrapSymbols(StringMap<ExecutorAddr> &M) override;
private:
struct Allocation {
std::vector<shared::WrapperFunctionCall> DeinitializationActions;
};
using AllocationMap = DenseMap<ExecutorAddr, Allocation>;
struct Reservation {
size_t Size;
std::vector<ExecutorAddr> Allocations;
#if defined(_WIN32)
HANDLE SharedMemoryFile;
#endif
};
using ReservationMap = DenseMap<void *, Reservation>;
static llvm::orc::shared::CWrapperFunctionResult
reserveWrapper(const char *ArgData, size_t ArgSize);
static llvm::orc::shared::CWrapperFunctionResult
initializeWrapper(const char *ArgData, size_t ArgSize);
static llvm::orc::shared::CWrapperFunctionResult
deinitializeWrapper(const char *ArgData, size_t ArgSize);
static llvm::orc::shared::CWrapperFunctionResult
releaseWrapper(const char *ArgData, size_t ArgSize);
#if (defined(LLVM_ON_UNIX) && !defined(__ANDROID__)) || defined(_WIN32)
std::atomic<int> SharedMemoryCount{0};
#endif
std::mutex Mutex;
ReservationMap Reservations;
AllocationMap Allocations;
};
} // namespace rt_bootstrap
} // namespace orc
} // namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_TARGETPROCESS_EXECUTORSHAREDMEMORYMAPPERSERVICE_H
PK iwFZ�nA� � % ExecutionEngine/Orc/SimpleRemoteEPC.hnu �[��� //===---- SimpleRemoteEPC.h - Simple remote executor control ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Simple remote executor process control.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_SIMPLEREMOTEEPC_H
#define LLVM_EXECUTIONENGINE_ORC_SIMPLEREMOTEEPC_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/FunctionExtras.h"
#include "llvm/ExecutionEngine/Orc/EPCGenericDylibManager.h"
#include "llvm/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.h"
#include "llvm/ExecutionEngine/Orc/EPCGenericMemoryAccess.h"
#include "llvm/ExecutionEngine/Orc/ExecutorProcessControl.h"
#include "llvm/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MSVCErrorWorkarounds.h"
#include <future>
namespace llvm {
namespace orc {
class SimpleRemoteEPC : public ExecutorProcessControl,
public SimpleRemoteEPCTransportClient {
public:
/// A setup object containing callbacks to construct a memory manager and
/// memory access object. Both are optional. If not specified,
/// EPCGenericJITLinkMemoryManager and EPCGenericMemoryAccess will be used.
struct Setup {
using CreateMemoryManagerFn =
Expected<std::unique_ptr<jitlink::JITLinkMemoryManager>>(
SimpleRemoteEPC &);
using CreateMemoryAccessFn =
Expected<std::unique_ptr<MemoryAccess>>(SimpleRemoteEPC &);
unique_function<CreateMemoryManagerFn> CreateMemoryManager;
unique_function<CreateMemoryAccessFn> CreateMemoryAccess;
};
/// Create a SimpleRemoteEPC using the given transport type and args.
template <typename TransportT, typename... TransportTCtorArgTs>
static Expected<std::unique_ptr<SimpleRemoteEPC>>
Create(std::unique_ptr<TaskDispatcher> D, Setup S,
TransportTCtorArgTs &&...TransportTCtorArgs) {
std::unique_ptr<SimpleRemoteEPC> SREPC(
new SimpleRemoteEPC(std::make_shared<SymbolStringPool>(),
std::move(D)));
auto T = TransportT::Create(
*SREPC, std::forward<TransportTCtorArgTs>(TransportTCtorArgs)...);
if (!T)
return T.takeError();
SREPC->T = std::move(*T);
if (auto Err = SREPC->setup(std::move(S)))
return joinErrors(std::move(Err), SREPC->disconnect());
return std::move(SREPC);
}
SimpleRemoteEPC(const SimpleRemoteEPC &) = delete;
SimpleRemoteEPC &operator=(const SimpleRemoteEPC &) = delete;
SimpleRemoteEPC(SimpleRemoteEPC &&) = delete;
SimpleRemoteEPC &operator=(SimpleRemoteEPC &&) = delete;
~SimpleRemoteEPC();
Expected<tpctypes::DylibHandle> loadDylib(const char *DylibPath) override;
Expected<std::vector<tpctypes::LookupResult>>
lookupSymbols(ArrayRef<LookupRequest> Request) override;
Expected<int32_t> runAsMain(ExecutorAddr MainFnAddr,
ArrayRef<std::string> Args) override;
Expected<int32_t> runAsVoidFunction(ExecutorAddr VoidFnAddr) override;
Expected<int32_t> runAsIntFunction(ExecutorAddr IntFnAddr, int Arg) override;
void callWrapperAsync(ExecutorAddr WrapperFnAddr,
IncomingWFRHandler OnComplete,
ArrayRef<char> ArgBuffer) override;
Error disconnect() override;
Expected<HandleMessageAction>
handleMessage(SimpleRemoteEPCOpcode OpC, uint64_t SeqNo, ExecutorAddr TagAddr,
SimpleRemoteEPCArgBytesVector ArgBytes) override;
void handleDisconnect(Error Err) override;
private:
SimpleRemoteEPC(std::shared_ptr<SymbolStringPool> SSP,
std::unique_ptr<TaskDispatcher> D)
: ExecutorProcessControl(std::move(SSP), std::move(D)) {}
static Expected<std::unique_ptr<jitlink::JITLinkMemoryManager>>
createDefaultMemoryManager(SimpleRemoteEPC &SREPC);
static Expected<std::unique_ptr<MemoryAccess>>
createDefaultMemoryAccess(SimpleRemoteEPC &SREPC);
Error sendMessage(SimpleRemoteEPCOpcode OpC, uint64_t SeqNo,
ExecutorAddr TagAddr, ArrayRef<char> ArgBytes);
Error handleSetup(uint64_t SeqNo, ExecutorAddr TagAddr,
SimpleRemoteEPCArgBytesVector ArgBytes);
Error setup(Setup S);
Error handleResult(uint64_t SeqNo, ExecutorAddr TagAddr,
SimpleRemoteEPCArgBytesVector ArgBytes);
void handleCallWrapper(uint64_t RemoteSeqNo, ExecutorAddr TagAddr,
SimpleRemoteEPCArgBytesVector ArgBytes);
Error handleHangup(SimpleRemoteEPCArgBytesVector ArgBytes);
uint64_t getNextSeqNo() { return NextSeqNo++; }
void releaseSeqNo(uint64_t SeqNo) {}
using PendingCallWrapperResultsMap =
DenseMap<uint64_t, IncomingWFRHandler>;
std::mutex SimpleRemoteEPCMutex;
std::condition_variable DisconnectCV;
bool Disconnected = false;
Error DisconnectErr = Error::success();
std::unique_ptr<SimpleRemoteEPCTransport> T;
std::unique_ptr<jitlink::JITLinkMemoryManager> OwnedMemMgr;
std::unique_ptr<MemoryAccess> OwnedMemAccess;
std::unique_ptr<EPCGenericDylibManager> DylibMgr;
ExecutorAddr RunAsMainAddr;
ExecutorAddr RunAsVoidFunctionAddr;
ExecutorAddr RunAsIntFunctionAddr;
uint64_t NextSeqNo = 0;
PendingCallWrapperResultsMap PendingCallWrapperResults;
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_SIMPLEREMOTEEPC_H
PK iwFZ����J �J # ExecutionEngine/Orc/OrcABISupport.hnu �[��� //===- OrcABISupport.h - ABI support code -----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// ABI specific code for Orc, e.g. callback assembly.
//
// ABI classes should be part of the JIT *target* process, not the host
// process (except where you're doing hosted JITing and the two are one and the
// same).
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_ORCABISUPPORT_H
#define LLVM_EXECUTIONENGINE_ORC_ORCABISUPPORT_H
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include <cstdint>
namespace llvm {
namespace orc {
struct IndirectStubsAllocationSizes {
uint64_t StubBytes = 0;
uint64_t PointerBytes = 0;
unsigned NumStubs = 0;
};
template <typename ORCABI>
IndirectStubsAllocationSizes
getIndirectStubsBlockSizes(unsigned MinStubs, unsigned RoundToMultipleOf = 0) {
assert(
(RoundToMultipleOf == 0 || (RoundToMultipleOf % ORCABI::StubSize == 0)) &&
"RoundToMultipleOf is not a multiple of stub size");
uint64_t StubBytes = MinStubs * ORCABI::StubSize;
if (RoundToMultipleOf)
StubBytes = alignTo(StubBytes, RoundToMultipleOf);
unsigned NumStubs = StubBytes / ORCABI::StubSize;
uint64_t PointerBytes = NumStubs * ORCABI::PointerSize;
return {StubBytes, PointerBytes, NumStubs};
}
/// Generic ORC ABI support.
///
/// This class can be substituted as the target architecture support class for
/// ORC templates that require one (e.g. IndirectStubsManagers). It does not
/// support lazy JITing however, and any attempt to use that functionality
/// will result in execution of an llvm_unreachable.
class OrcGenericABI {
public:
static constexpr unsigned PointerSize = sizeof(uintptr_t);
static constexpr unsigned TrampolineSize = 1;
static constexpr unsigned StubSize = 1;
static constexpr unsigned StubToPointerMaxDisplacement = 1;
static constexpr unsigned ResolverCodeSize = 1;
static void writeResolverCode(char *ResolveWorkingMem,
ExecutorAddr ResolverTargetAddr,
ExecutorAddr ReentryFnAddr,
ExecutorAddr ReentryCtxAddr) {
llvm_unreachable("writeResolverCode is not supported by the generic host "
"support class");
}
static void writeTrampolines(char *TrampolineBlockWorkingMem,
ExecutorAddr TrampolineBlockTargetAddr,
ExecutorAddr ResolverAddr,
unsigned NumTrampolines) {
llvm_unreachable("writeTrampolines is not supported by the generic host "
"support class");
}
static void writeIndirectStubsBlock(char *StubsBlockWorkingMem,
ExecutorAddr StubsBlockTargetAddress,
ExecutorAddr PointersBlockTargetAddress,
unsigned NumStubs) {
llvm_unreachable(
"writeIndirectStubsBlock is not supported by the generic host "
"support class");
}
};
class OrcAArch64 {
public:
static constexpr unsigned PointerSize = 8;
static constexpr unsigned TrampolineSize = 12;
static constexpr unsigned StubSize = 8;
static constexpr unsigned StubToPointerMaxDisplacement = 1U << 27;
static constexpr unsigned ResolverCodeSize = 0x120;
/// Write the resolver code into the given memory. The user is
/// responsible for allocating the memory and setting permissions.
///
/// ReentryFnAddr should be the address of a function whose signature matches
/// void* (*)(void *TrampolineAddr, void *ReentryCtxAddr). The ReentryCtxAddr
/// argument of writeResolverCode will be passed as the second argument to
/// the function at ReentryFnAddr.
static void writeResolverCode(char *ResolverWorkingMem,
ExecutorAddr ResolverTargetAddress,
ExecutorAddr ReentryFnAddr,
ExecutorAddr RentryCtxAddr);
/// Write the requested number of trampolines into the given memory,
/// which must be big enough to hold 1 pointer, plus NumTrampolines
/// trampolines.
static void writeTrampolines(char *TrampolineBlockWorkingMem,
ExecutorAddr TrampolineBlockTargetAddress,
ExecutorAddr ResolverAddr,
unsigned NumTrampolines);
/// Write NumStubs indirect stubs to working memory at StubsBlockWorkingMem.
/// Stubs will be written as if linked at StubsBlockTargetAddress, with the
/// Nth stub using the Nth pointer in memory starting at
/// PointersBlockTargetAddress.
static void writeIndirectStubsBlock(char *StubsBlockWorkingMem,
ExecutorAddr StubsBlockTargetAddress,
ExecutorAddr PointersBlockTargetAddress,
unsigned MinStubs);
};
/// X86_64 code that's common to all ABIs.
///
/// X86_64 supports lazy JITing.
class OrcX86_64_Base {
public:
static constexpr unsigned PointerSize = 8;
static constexpr unsigned TrampolineSize = 8;
static constexpr unsigned StubSize = 8;
static constexpr unsigned StubToPointerMaxDisplacement = 1 << 31;
/// Write the requested number of trampolines into the given memory,
/// which must be big enough to hold 1 pointer, plus NumTrampolines
/// trampolines.
static void writeTrampolines(char *TrampolineBlockWorkingMem,
ExecutorAddr TrampolineBlockTargetAddress,
ExecutorAddr ResolverAddr,
unsigned NumTrampolines);
/// Write NumStubs indirect stubs to working memory at StubsBlockWorkingMem.
/// Stubs will be written as if linked at StubsBlockTargetAddress, with the
/// Nth stub using the Nth pointer in memory starting at
/// PointersBlockTargetAddress.
static void writeIndirectStubsBlock(char *StubsBlockWorkingMem,
ExecutorAddr StubsBlockTargetAddress,
ExecutorAddr PointersBlockTargetAddress,
unsigned NumStubs);
};
/// X86_64 support for SysV ABI (Linux, MacOSX).
///
/// X86_64_SysV supports lazy JITing.
class OrcX86_64_SysV : public OrcX86_64_Base {
public:
static constexpr unsigned ResolverCodeSize = 0x6C;
/// Write the resolver code into the given memory. The user is
/// responsible for allocating the memory and setting permissions.
///
/// ReentryFnAddr should be the address of a function whose signature matches
/// void* (*)(void *TrampolineAddr, void *ReentryCtxAddr). The ReentryCtxAddr
/// argument of writeResolverCode will be passed as the second argument to
/// the function at ReentryFnAddr.
static void writeResolverCode(char *ResolverWorkingMem,
ExecutorAddr ResolverTargetAddress,
ExecutorAddr ReentryFnAddr,
ExecutorAddr ReentryCtxAddr);
};
/// X86_64 support for Win32.
///
/// X86_64_Win32 supports lazy JITing.
class OrcX86_64_Win32 : public OrcX86_64_Base {
public:
static constexpr unsigned ResolverCodeSize = 0x74;
/// Write the resolver code into the given memory. The user is
/// responsible for allocating the memory and setting permissions.
///
/// ReentryFnAddr should be the address of a function whose signature matches
/// void* (*)(void *TrampolineAddr, void *ReentryCtxAddr). The ReentryCtxAddr
/// argument of writeResolverCode will be passed as the second argument to
/// the function at ReentryFnAddr.
static void writeResolverCode(char *ResolverWorkingMem,
ExecutorAddr ResolverTargetAddress,
ExecutorAddr ReentryFnAddr,
ExecutorAddr ReentryCtxAddr);
};
/// I386 support.
///
/// I386 supports lazy JITing.
class OrcI386 {
public:
static constexpr unsigned PointerSize = 4;
static constexpr unsigned TrampolineSize = 8;
static constexpr unsigned StubSize = 8;
static constexpr unsigned StubToPointerMaxDisplacement = 1 << 31;
static constexpr unsigned ResolverCodeSize = 0x4a;
/// Write the resolver code into the given memory. The user is
/// responsible for allocating the memory and setting permissions.
///
/// ReentryFnAddr should be the address of a function whose signature matches
/// void* (*)(void *TrampolineAddr, void *ReentryCtxAddr). The ReentryCtxAddr
/// argument of writeResolverCode will be passed as the second argument to
/// the function at ReentryFnAddr.
static void writeResolverCode(char *ResolverWorkingMem,
ExecutorAddr ResolverTargetAddress,
ExecutorAddr ReentryFnAddr,
ExecutorAddr ReentryCtxAddr);
/// Write the requested number of trampolines into the given memory,
/// which must be big enough to hold 1 pointer, plus NumTrampolines
/// trampolines.
static void writeTrampolines(char *TrampolineBlockWorkingMem,
ExecutorAddr TrampolineBlockTargetAddress,
ExecutorAddr ResolverAddr,
unsigned NumTrampolines);
/// Write NumStubs indirect stubs to working memory at StubsBlockWorkingMem.
/// Stubs will be written as if linked at StubsBlockTargetAddress, with the
/// Nth stub using the Nth pointer in memory starting at
/// PointersBlockTargetAddress.
static void writeIndirectStubsBlock(char *StubsBlockWorkingMem,
ExecutorAddr StubsBlockTargetAddress,
ExecutorAddr PointersBlockTargetAddress,
unsigned NumStubs);
};
// @brief Mips32 support.
//
// Mips32 supports lazy JITing.
class OrcMips32_Base {
public:
static constexpr unsigned PointerSize = 4;
static constexpr unsigned TrampolineSize = 20;
static constexpr unsigned StubSize = 8;
static constexpr unsigned StubToPointerMaxDisplacement = 1 << 31;
static constexpr unsigned ResolverCodeSize = 0xfc;
/// Write the requested number of trampolines into the given memory,
/// which must be big enough to hold 1 pointer, plus NumTrampolines
/// trampolines.
static void writeTrampolines(char *TrampolineBlockWorkingMem,
ExecutorAddr TrampolineBlockTargetAddress,
ExecutorAddr ResolverAddr,
unsigned NumTrampolines);
/// Write the resolver code into the given memory. The user is
/// responsible for allocating the memory and setting permissions.
///
/// ReentryFnAddr should be the address of a function whose signature matches
/// void* (*)(void *TrampolineAddr, void *ReentryCtxAddr). The ReentryCtxAddr
/// argument of writeResolverCode will be passed as the second argument to
/// the function at ReentryFnAddr.
static void writeResolverCode(char *ResolverBlockWorkingMem,
ExecutorAddr ResolverBlockTargetAddress,
ExecutorAddr ReentryFnAddr,
ExecutorAddr ReentryCtxAddr, bool isBigEndian);
/// Write NumStubs indirect stubs to working memory at StubsBlockWorkingMem.
/// Stubs will be written as if linked at StubsBlockTargetAddress, with the
/// Nth stub using the Nth pointer in memory starting at
/// PointersBlockTargetAddress.
static void writeIndirectStubsBlock(char *StubsBlockWorkingMem,
ExecutorAddr StubsBlockTargetAddress,
ExecutorAddr PointersBlockTargetAddress,
unsigned NumStubs);
};
class OrcMips32Le : public OrcMips32_Base {
public:
static void writeResolverCode(char *ResolverWorkingMem,
ExecutorAddr ResolverTargetAddress,
ExecutorAddr ReentryFnAddr,
ExecutorAddr ReentryCtxAddr) {
OrcMips32_Base::writeResolverCode(ResolverWorkingMem, ResolverTargetAddress,
ReentryFnAddr, ReentryCtxAddr, false);
}
};
class OrcMips32Be : public OrcMips32_Base {
public:
static void writeResolverCode(char *ResolverWorkingMem,
ExecutorAddr ResolverTargetAddress,
ExecutorAddr ReentryFnAddr,
ExecutorAddr ReentryCtxAddr) {
OrcMips32_Base::writeResolverCode(ResolverWorkingMem, ResolverTargetAddress,
ReentryFnAddr, ReentryCtxAddr, true);
}
};
// @brief Mips64 support.
//
// Mips64 supports lazy JITing.
class OrcMips64 {
public:
static constexpr unsigned PointerSize = 8;
static constexpr unsigned TrampolineSize = 40;
static constexpr unsigned StubSize = 32;
static constexpr unsigned StubToPointerMaxDisplacement = 1 << 31;
static constexpr unsigned ResolverCodeSize = 0x120;
/// Write the resolver code into the given memory. The user is
/// responsible for allocating the memory and setting permissions.
///
/// ReentryFnAddr should be the address of a function whose signature matches
/// void* (*)(void *TrampolineAddr, void *ReentryCtxAddr). The ReentryCtxAddr
/// argument of writeResolverCode will be passed as the second argument to
/// the function at ReentryFnAddr.
static void writeResolverCode(char *ResolverWorkingMem,
ExecutorAddr ResolverTargetAddress,
ExecutorAddr ReentryFnAddr,
ExecutorAddr ReentryCtxAddr);
/// Write the requested number of trampolines into the given memory,
/// which must be big enough to hold 1 pointer, plus NumTrampolines
/// trampolines.
static void writeTrampolines(char *TrampolineBlockWorkingMem,
ExecutorAddr TrampolineBlockTargetAddress,
ExecutorAddr ResolverFnAddr,
unsigned NumTrampolines);
/// Write NumStubs indirect stubs to working memory at StubsBlockWorkingMem.
/// Stubs will be written as if linked at StubsBlockTargetAddress, with the
/// Nth stub using the Nth pointer in memory starting at
/// PointersBlockTargetAddress.
static void writeIndirectStubsBlock(char *StubsBlockWorkingMem,
ExecutorAddr StubsBlockTargetAddress,
ExecutorAddr PointersBlockTargetAddress,
unsigned NumStubs);
};
// @brief riscv64 support.
//
// RISC-V 64 supports lazy JITing.
class OrcRiscv64 {
public:
static constexpr unsigned PointerSize = 8;
static constexpr unsigned TrampolineSize = 16;
static constexpr unsigned StubSize = 16;
static constexpr unsigned StubToPointerMaxDisplacement = 1 << 31;
static constexpr unsigned ResolverCodeSize = 0x148;
/// Write the resolver code into the given memory. The user is
/// responsible for allocating the memory and setting permissions.
///
/// ReentryFnAddr should be the address of a function whose signature matches
/// void* (*)(void *TrampolineAddr, void *ReentryCtxAddr). The ReentryCtxAddr
/// argument of writeResolverCode will be passed as the second argument to
/// the function at ReentryFnAddr.
static void writeResolverCode(char *ResolverWorkingMem,
ExecutorAddr ResolverTargetAddress,
ExecutorAddr ReentryFnAddr,
ExecutorAddr ReentryCtxAddr);
/// Write the requested number of trampolines into the given memory,
/// which must be big enough to hold 1 pointer, plus NumTrampolines
/// trampolines.
static void writeTrampolines(char *TrampolineBlockWorkingMem,
ExecutorAddr TrampolineBlockTargetAddress,
ExecutorAddr ResolverFnAddr,
unsigned NumTrampolines);
/// Write NumStubs indirect stubs to working memory at StubsBlockWorkingMem.
/// Stubs will be written as if linked at StubsBlockTargetAddress, with the
/// Nth stub using the Nth pointer in memory starting at
/// PointersBlockTargetAddress.
static void writeIndirectStubsBlock(char *StubsBlockWorkingMem,
ExecutorAddr StubsBlockTargetAddress,
ExecutorAddr PointersBlockTargetAddress,
unsigned NumStubs);
};
// @brief loongarch64 support.
//
// LoongArch 64 supports lazy JITing.
class OrcLoongArch64 {
public:
static constexpr unsigned PointerSize = 8;
static constexpr unsigned TrampolineSize = 16;
static constexpr unsigned StubSize = 16;
static constexpr unsigned StubToPointerMaxDisplacement = 1 << 31;
static constexpr unsigned ResolverCodeSize = 0xc8;
/// Write the resolver code into the given memory. The user is
/// responsible for allocating the memory and setting permissions.
///
/// ReentryFnAddr should be the address of a function whose signature matches
/// void* (*)(void *TrampolineAddr, void *ReentryCtxAddr). The ReentryCtxAddr
/// argument of writeResolverCode will be passed as the second argument to
/// the function at ReentryFnAddr.
static void writeResolverCode(char *ResolverWorkingMem,
ExecutorAddr ResolverTargetAddress,
ExecutorAddr ReentryFnAddr,
ExecutorAddr ReentryCtxAddr);
/// Write the requested number of trampolines into the given memory,
/// which must be big enough to hold 1 pointer, plus NumTrampolines
/// trampolines.
static void writeTrampolines(char *TrampolineBlockWorkingMem,
ExecutorAddr TrampolineBlockTargetAddress,
ExecutorAddr ResolverFnAddr,
unsigned NumTrampolines);
/// Write NumStubs indirect stubs to working memory at StubsBlockWorkingMem.
/// Stubs will be written as if linked at StubsBlockTargetAddress, with the
/// Nth stub using the Nth pointer in memory starting at
/// PointersBlockTargetAddress.
static void writeIndirectStubsBlock(char *StubsBlockWorkingMem,
ExecutorAddr StubsBlockTargetAddress,
ExecutorAddr PointersBlockTargetAddress,
unsigned NumStubs);
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_ORCABISUPPORT_H
PK iwFZS�p | | ' ExecutionEngine/Orc/SpeculateAnalyses.hnu �[��� //===-- SpeculateAnalyses.h --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// Contains the Analyses and Result Interpretation to select likely functions
/// to Speculatively compile before they are called. [Purely Experimentation]
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_SPECULATEANALYSES_H
#define LLVM_EXECUTIONENGINE_ORC_SPECULATEANALYSES_H
#include "llvm/Analysis/BranchProbabilityInfo.h"
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/ExecutionEngine/Orc/Speculation.h"
#include <vector>
namespace llvm {
namespace orc {
// Provides common code.
class SpeculateQuery {
protected:
void findCalles(const BasicBlock *, DenseSet<StringRef> &);
bool isStraightLine(const Function &F);
public:
using ResultTy = std::optional<DenseMap<StringRef, DenseSet<StringRef>>>;
};
// Direct calls in high frequency basic blocks are extracted.
class BlockFreqQuery : public SpeculateQuery {
size_t numBBToGet(size_t);
public:
// Find likely next executables based on IR Block Frequency
ResultTy operator()(Function &F);
};
// This Query generates a sequence of basic blocks which follows the order of
// execution.
// A handful of BB with higher block frequencies are taken, then path to entry
// and end BB are discovered by traversing up & down the CFG.
class SequenceBBQuery : public SpeculateQuery {
struct WalkDirection {
bool Upward = true, Downward = true;
// the block associated contain a call
bool CallerBlock = false;
};
public:
using VisitedBlocksInfoTy = DenseMap<const BasicBlock *, WalkDirection>;
using BlockListTy = SmallVector<const BasicBlock *, 8>;
using BackEdgesInfoTy =
SmallVector<std::pair<const BasicBlock *, const BasicBlock *>, 8>;
using BlockFreqInfoTy =
SmallVector<std::pair<const BasicBlock *, uint64_t>, 8>;
private:
std::size_t getHottestBlocks(std::size_t TotalBlocks);
BlockListTy rearrangeBB(const Function &, const BlockListTy &);
BlockListTy queryCFG(Function &, const BlockListTy &);
void traverseToEntryBlock(const BasicBlock *, const BlockListTy &,
const BackEdgesInfoTy &,
const BranchProbabilityInfo *,
VisitedBlocksInfoTy &);
void traverseToExitBlock(const BasicBlock *, const BlockListTy &,
const BackEdgesInfoTy &,
const BranchProbabilityInfo *,
VisitedBlocksInfoTy &);
public:
ResultTy operator()(Function &F);
};
} // namespace orc
} // namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_SPECULATEANALYSES_H
PK iwFZ�d2u , ExecutionEngine/Orc/EPCGenericMemoryAccess.hnu �[��� //===- EPCGenericMemoryAccess.h - Generic EPC MemoryAccess impl -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Implements ExecutorProcessControl::MemoryAccess by making calls to
// ExecutorProcessControl::callWrapperAsync.
//
// This simplifies the implementaton of new ExecutorProcessControl instances,
// as this implementation will always work (at the cost of some performance
// overhead for the calls).
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_EPCGENERICMEMORYACCESS_H
#define LLVM_EXECUTIONENGINE_ORC_EPCGENERICMEMORYACCESS_H
#include "llvm/ExecutionEngine/Orc/Core.h"
namespace llvm {
namespace orc {
class EPCGenericMemoryAccess : public ExecutorProcessControl::MemoryAccess {
public:
/// Function addresses for memory access.
struct FuncAddrs {
ExecutorAddr WriteUInt8s;
ExecutorAddr WriteUInt16s;
ExecutorAddr WriteUInt32s;
ExecutorAddr WriteUInt64s;
ExecutorAddr WriteBuffers;
};
/// Create an EPCGenericMemoryAccess instance from a given set of
/// function addrs.
EPCGenericMemoryAccess(ExecutorProcessControl &EPC, FuncAddrs FAs)
: EPC(EPC), FAs(FAs) {}
void writeUInt8sAsync(ArrayRef<tpctypes::UInt8Write> Ws,
WriteResultFn OnWriteComplete) override {
using namespace shared;
EPC.callSPSWrapperAsync<void(SPSSequence<SPSMemoryAccessUInt8Write>)>(
FAs.WriteUInt8s, std::move(OnWriteComplete), Ws);
}
void writeUInt16sAsync(ArrayRef<tpctypes::UInt16Write> Ws,
WriteResultFn OnWriteComplete) override {
using namespace shared;
EPC.callSPSWrapperAsync<void(SPSSequence<SPSMemoryAccessUInt16Write>)>(
FAs.WriteUInt16s, std::move(OnWriteComplete), Ws);
}
void writeUInt32sAsync(ArrayRef<tpctypes::UInt32Write> Ws,
WriteResultFn OnWriteComplete) override {
using namespace shared;
EPC.callSPSWrapperAsync<void(SPSSequence<SPSMemoryAccessUInt32Write>)>(
FAs.WriteUInt32s, std::move(OnWriteComplete), Ws);
}
void writeUInt64sAsync(ArrayRef<tpctypes::UInt64Write> Ws,
WriteResultFn OnWriteComplete) override {
using namespace shared;
EPC.callSPSWrapperAsync<void(SPSSequence<SPSMemoryAccessUInt64Write>)>(
FAs.WriteUInt64s, std::move(OnWriteComplete), Ws);
}
void writeBuffersAsync(ArrayRef<tpctypes::BufferWrite> Ws,
WriteResultFn OnWriteComplete) override {
using namespace shared;
EPC.callSPSWrapperAsync<void(SPSSequence<SPSMemoryAccessBufferWrite>)>(
FAs.WriteBuffers, std::move(OnWriteComplete), Ws);
}
private:
ExecutorProcessControl &EPC;
FuncAddrs FAs;
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_EPCGENERICMEMORYACCESS_H
PK iwFZ@&�C�M �M , ExecutionEngine/Orc/ExecutorProcessControl.hnu �[��� //===- ExecutorProcessControl.h - Executor process control APIs -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Utilities for interacting with the executor processes.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_EXECUTORPROCESSCONTROL_H
#define LLVM_EXECUTIONENGINE_ORC_EXECUTORPROCESSCONTROL_H
#include "llvm/ADT/StringRef.h"
#include "llvm/ExecutionEngine/JITLink/JITLinkMemoryManager.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include "llvm/ExecutionEngine/Orc/Shared/TargetProcessControlTypes.h"
#include "llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h"
#include "llvm/ExecutionEngine/Orc/SymbolStringPool.h"
#include "llvm/ExecutionEngine/Orc/TaskDispatch.h"
#include "llvm/Support/DynamicLibrary.h"
#include "llvm/Support/MSVCErrorWorkarounds.h"
#include "llvm/TargetParser/Triple.h"
#include <future>
#include <mutex>
#include <vector>
namespace llvm {
namespace orc {
class ExecutionSession;
class SymbolLookupSet;
/// ExecutorProcessControl supports interaction with a JIT target process.
class ExecutorProcessControl {
friend class ExecutionSession;
public:
/// A handler or incoming WrapperFunctionResults -- either return values from
/// callWrapper* calls, or incoming JIT-dispatch requests.
///
/// IncomingWFRHandlers are constructible from
/// unique_function<void(shared::WrapperFunctionResult)>s using the
/// runInPlace function or a RunWithDispatch object.
class IncomingWFRHandler {
friend class ExecutorProcessControl;
public:
IncomingWFRHandler() = default;
explicit operator bool() const { return !!H; }
void operator()(shared::WrapperFunctionResult WFR) { H(std::move(WFR)); }
private:
template <typename FnT> IncomingWFRHandler(FnT &&Fn)
: H(std::forward<FnT>(Fn)) {}
unique_function<void(shared::WrapperFunctionResult)> H;
};
/// Constructs an IncomingWFRHandler from a function object that is callable
/// as void(shared::WrapperFunctionResult). The function object will be called
/// directly. This should be used with care as it may block listener threads
/// in remote EPCs. It is only suitable for simple tasks (e.g. setting a
/// future), or for performing some quick analysis before dispatching "real"
/// work as a Task.
class RunInPlace {
public:
template <typename FnT>
IncomingWFRHandler operator()(FnT &&Fn) {
return IncomingWFRHandler(std::forward<FnT>(Fn));
}
};
/// Constructs an IncomingWFRHandler from a function object by creating a new
/// function object that dispatches the original using a TaskDispatcher,
/// wrapping the original as a GenericNamedTask.
///
/// This is the default approach for running WFR handlers.
class RunAsTask {
public:
RunAsTask(TaskDispatcher &D) : D(D) {}
template <typename FnT>
IncomingWFRHandler operator()(FnT &&Fn) {
return IncomingWFRHandler(
[&D = this->D, Fn = std::move(Fn)]
(shared::WrapperFunctionResult WFR) mutable {
D.dispatch(
makeGenericNamedTask(
[Fn = std::move(Fn), WFR = std::move(WFR)]() mutable {
Fn(std::move(WFR));
}, "WFR handler task"));
});
}
private:
TaskDispatcher &D;
};
/// APIs for manipulating memory in the target process.
class MemoryAccess {
public:
/// Callback function for asynchronous writes.
using WriteResultFn = unique_function<void(Error)>;
virtual ~MemoryAccess();
virtual void writeUInt8sAsync(ArrayRef<tpctypes::UInt8Write> Ws,
WriteResultFn OnWriteComplete) = 0;
virtual void writeUInt16sAsync(ArrayRef<tpctypes::UInt16Write> Ws,
WriteResultFn OnWriteComplete) = 0;
virtual void writeUInt32sAsync(ArrayRef<tpctypes::UInt32Write> Ws,
WriteResultFn OnWriteComplete) = 0;
virtual void writeUInt64sAsync(ArrayRef<tpctypes::UInt64Write> Ws,
WriteResultFn OnWriteComplete) = 0;
virtual void writeBuffersAsync(ArrayRef<tpctypes::BufferWrite> Ws,
WriteResultFn OnWriteComplete) = 0;
Error writeUInt8s(ArrayRef<tpctypes::UInt8Write> Ws) {
std::promise<MSVCPError> ResultP;
auto ResultF = ResultP.get_future();
writeUInt8sAsync(Ws,
[&](Error Err) { ResultP.set_value(std::move(Err)); });
return ResultF.get();
}
Error writeUInt16s(ArrayRef<tpctypes::UInt16Write> Ws) {
std::promise<MSVCPError> ResultP;
auto ResultF = ResultP.get_future();
writeUInt16sAsync(Ws,
[&](Error Err) { ResultP.set_value(std::move(Err)); });
return ResultF.get();
}
Error writeUInt32s(ArrayRef<tpctypes::UInt32Write> Ws) {
std::promise<MSVCPError> ResultP;
auto ResultF = ResultP.get_future();
writeUInt32sAsync(Ws,
[&](Error Err) { ResultP.set_value(std::move(Err)); });
return ResultF.get();
}
Error writeUInt64s(ArrayRef<tpctypes::UInt64Write> Ws) {
std::promise<MSVCPError> ResultP;
auto ResultF = ResultP.get_future();
writeUInt64sAsync(Ws,
[&](Error Err) { ResultP.set_value(std::move(Err)); });
return ResultF.get();
}
Error writeBuffers(ArrayRef<tpctypes::BufferWrite> Ws) {
std::promise<MSVCPError> ResultP;
auto ResultF = ResultP.get_future();
writeBuffersAsync(Ws,
[&](Error Err) { ResultP.set_value(std::move(Err)); });
return ResultF.get();
}
};
/// A pair of a dylib and a set of symbols to be looked up.
struct LookupRequest {
LookupRequest(tpctypes::DylibHandle Handle, const SymbolLookupSet &Symbols)
: Handle(Handle), Symbols(Symbols) {}
tpctypes::DylibHandle Handle;
const SymbolLookupSet &Symbols;
};
/// Contains the address of the dispatch function and context that the ORC
/// runtime can use to call functions in the JIT.
struct JITDispatchInfo {
ExecutorAddr JITDispatchFunction;
ExecutorAddr JITDispatchContext;
};
ExecutorProcessControl(std::shared_ptr<SymbolStringPool> SSP,
std::unique_ptr<TaskDispatcher> D)
: SSP(std::move(SSP)), D(std::move(D)) {}
virtual ~ExecutorProcessControl();
/// Return the ExecutionSession associated with this instance.
/// Not callable until the ExecutionSession has been associated.
ExecutionSession &getExecutionSession() {
assert(ES && "No ExecutionSession associated yet");
return *ES;
}
/// Intern a symbol name in the SymbolStringPool.
SymbolStringPtr intern(StringRef SymName) { return SSP->intern(SymName); }
/// Return a shared pointer to the SymbolStringPool for this instance.
std::shared_ptr<SymbolStringPool> getSymbolStringPool() const { return SSP; }
TaskDispatcher &getDispatcher() { return *D; }
/// Return the Triple for the target process.
const Triple &getTargetTriple() const { return TargetTriple; }
/// Get the page size for the target process.
unsigned getPageSize() const { return PageSize; }
/// Get the JIT dispatch function and context address for the executor.
const JITDispatchInfo &getJITDispatchInfo() const { return JDI; }
/// Return a MemoryAccess object for the target process.
MemoryAccess &getMemoryAccess() const {
assert(MemAccess && "No MemAccess object set.");
return *MemAccess;
}
/// Return a JITLinkMemoryManager for the target process.
jitlink::JITLinkMemoryManager &getMemMgr() const {
assert(MemMgr && "No MemMgr object set");
return *MemMgr;
}
/// Returns the bootstrap map.
const StringMap<std::vector<char>> &getBootstrapMap() const {
return BootstrapMap;
}
/// Look up and SPS-deserialize a bootstrap map value.
///
///
template <typename T, typename SPSTagT>
Error getBootstrapMapValue(StringRef Key, std::optional<T> &Val) const {
Val = std::nullopt;
auto I = BootstrapMap.find(Key);
if (I == BootstrapMap.end())
return Error::success();
T Tmp;
shared::SPSInputBuffer IB(I->second.data(), I->second.size());
if (!shared::SPSArgList<SPSTagT>::deserialize(IB, Tmp))
return make_error<StringError>("Could not deserialize value for key " +
Key,
inconvertibleErrorCode());
Val = std::move(Tmp);
return Error::success();
}
/// Returns the bootstrap symbol map.
const StringMap<ExecutorAddr> &getBootstrapSymbolsMap() const {
return BootstrapSymbols;
}
/// For each (ExecutorAddr&, StringRef) pair, looks up the string in the
/// bootstrap symbols map and writes its address to the ExecutorAddr if
/// found. If any symbol is not found then the function returns an error.
Error getBootstrapSymbols(
ArrayRef<std::pair<ExecutorAddr &, StringRef>> Pairs) const {
for (const auto &KV : Pairs) {
auto I = BootstrapSymbols.find(KV.second);
if (I == BootstrapSymbols.end())
return make_error<StringError>("Symbol \"" + KV.second +
"\" not found "
"in bootstrap symbols map",
inconvertibleErrorCode());
KV.first = I->second;
}
return Error::success();
}
/// Load the dynamic library at the given path and return a handle to it.
/// If LibraryPath is null this function will return the global handle for
/// the target process.
virtual Expected<tpctypes::DylibHandle> loadDylib(const char *DylibPath) = 0;
/// Search for symbols in the target process.
///
/// The result of the lookup is a 2-dimentional array of target addresses
/// that correspond to the lookup order. If a required symbol is not
/// found then this method will return an error. If a weakly referenced
/// symbol is not found then it be assigned a '0' value.
virtual Expected<std::vector<tpctypes::LookupResult>>
lookupSymbols(ArrayRef<LookupRequest> Request) = 0;
/// Run function with a main-like signature.
virtual Expected<int32_t> runAsMain(ExecutorAddr MainFnAddr,
ArrayRef<std::string> Args) = 0;
// TODO: move this to ORC runtime.
/// Run function with a int (*)(void) signature.
virtual Expected<int32_t> runAsVoidFunction(ExecutorAddr VoidFnAddr) = 0;
// TODO: move this to ORC runtime.
/// Run function with a int (*)(int) signature.
virtual Expected<int32_t> runAsIntFunction(ExecutorAddr IntFnAddr,
int Arg) = 0;
/// Run a wrapper function in the executor. The given WFRHandler will be
/// called on the result when it is returned.
///
/// The wrapper function should be callable as:
///
/// \code{.cpp}
/// CWrapperFunctionResult fn(uint8_t *Data, uint64_t Size);
/// \endcode{.cpp}
virtual void callWrapperAsync(ExecutorAddr WrapperFnAddr,
IncomingWFRHandler OnComplete,
ArrayRef<char> ArgBuffer) = 0;
/// Run a wrapper function in the executor using the given Runner to dispatch
/// OnComplete when the result is ready.
template <typename RunPolicyT, typename FnT>
void callWrapperAsync(RunPolicyT &&Runner, ExecutorAddr WrapperFnAddr,
FnT &&OnComplete, ArrayRef<char> ArgBuffer) {
callWrapperAsync(
WrapperFnAddr, Runner(std::forward<FnT>(OnComplete)), ArgBuffer);
}
/// Run a wrapper function in the executor. OnComplete will be dispatched
/// as a GenericNamedTask using this instance's TaskDispatch object.
template <typename FnT>
void callWrapperAsync(ExecutorAddr WrapperFnAddr, FnT &&OnComplete,
ArrayRef<char> ArgBuffer) {
callWrapperAsync(RunAsTask(*D), WrapperFnAddr,
std::forward<FnT>(OnComplete), ArgBuffer);
}
/// Run a wrapper function in the executor. The wrapper function should be
/// callable as:
///
/// \code{.cpp}
/// CWrapperFunctionResult fn(uint8_t *Data, uint64_t Size);
/// \endcode{.cpp}
shared::WrapperFunctionResult callWrapper(ExecutorAddr WrapperFnAddr,
ArrayRef<char> ArgBuffer) {
std::promise<shared::WrapperFunctionResult> RP;
auto RF = RP.get_future();
callWrapperAsync(
RunInPlace(), WrapperFnAddr,
[&](shared::WrapperFunctionResult R) {
RP.set_value(std::move(R));
}, ArgBuffer);
return RF.get();
}
/// Run a wrapper function using SPS to serialize the arguments and
/// deserialize the results.
template <typename SPSSignature, typename RunPolicyT, typename SendResultT,
typename... ArgTs>
void callSPSWrapperAsync(RunPolicyT &&Runner, ExecutorAddr WrapperFnAddr,
SendResultT &&SendResult, const ArgTs &...Args) {
shared::WrapperFunction<SPSSignature>::callAsync(
[this, WrapperFnAddr, Runner = std::move(Runner)]
(auto &&SendResult, const char *ArgData, size_t ArgSize) mutable {
this->callWrapperAsync(std::move(Runner), WrapperFnAddr,
std::move(SendResult),
ArrayRef<char>(ArgData, ArgSize));
},
std::forward<SendResultT>(SendResult), Args...);
}
/// Run a wrapper function using SPS to serialize the arguments and
/// deserialize the results.
template <typename SPSSignature, typename SendResultT, typename... ArgTs>
void callSPSWrapperAsync(ExecutorAddr WrapperFnAddr, SendResultT &&SendResult,
const ArgTs &...Args) {
callSPSWrapperAsync<SPSSignature>(RunAsTask(*D), WrapperFnAddr,
std::forward<SendResultT>(SendResult),
Args...);
}
/// Run a wrapper function using SPS to serialize the arguments and
/// deserialize the results.
///
/// If SPSSignature is a non-void function signature then the second argument
/// (the first in the Args list) should be a reference to a return value.
template <typename SPSSignature, typename... WrapperCallArgTs>
Error callSPSWrapper(ExecutorAddr WrapperFnAddr,
WrapperCallArgTs &&...WrapperCallArgs) {
return shared::WrapperFunction<SPSSignature>::call(
[this, WrapperFnAddr](const char *ArgData, size_t ArgSize) {
return callWrapper(WrapperFnAddr, ArrayRef<char>(ArgData, ArgSize));
},
std::forward<WrapperCallArgTs>(WrapperCallArgs)...);
}
/// Disconnect from the target process.
///
/// This should be called after the JIT session is shut down.
virtual Error disconnect() = 0;
protected:
std::shared_ptr<SymbolStringPool> SSP;
std::unique_ptr<TaskDispatcher> D;
ExecutionSession *ES = nullptr;
Triple TargetTriple;
unsigned PageSize = 0;
JITDispatchInfo JDI;
MemoryAccess *MemAccess = nullptr;
jitlink::JITLinkMemoryManager *MemMgr = nullptr;
StringMap<std::vector<char>> BootstrapMap;
StringMap<ExecutorAddr> BootstrapSymbols;
};
/// A ExecutorProcessControl instance that asserts if any of its methods are
/// used. Suitable for use is unit tests, and by ORC clients who haven't moved
/// to ExecutorProcessControl-based APIs yet.
class UnsupportedExecutorProcessControl : public ExecutorProcessControl {
public:
UnsupportedExecutorProcessControl(
std::shared_ptr<SymbolStringPool> SSP = nullptr,
std::unique_ptr<TaskDispatcher> D = nullptr,
const std::string &TT = "", unsigned PageSize = 0)
: ExecutorProcessControl(SSP ? std::move(SSP)
: std::make_shared<SymbolStringPool>(),
D ? std::move(D)
: std::make_unique<InPlaceTaskDispatcher>()) {
this->TargetTriple = Triple(TT);
this->PageSize = PageSize;
}
Expected<tpctypes::DylibHandle> loadDylib(const char *DylibPath) override {
llvm_unreachable("Unsupported");
}
Expected<std::vector<tpctypes::LookupResult>>
lookupSymbols(ArrayRef<LookupRequest> Request) override {
llvm_unreachable("Unsupported");
}
Expected<int32_t> runAsMain(ExecutorAddr MainFnAddr,
ArrayRef<std::string> Args) override {
llvm_unreachable("Unsupported");
}
Expected<int32_t> runAsVoidFunction(ExecutorAddr VoidFnAddr) override {
llvm_unreachable("Unsupported");
}
Expected<int32_t> runAsIntFunction(ExecutorAddr IntFnAddr, int Arg) override {
llvm_unreachable("Unsupported");
}
void callWrapperAsync(ExecutorAddr WrapperFnAddr,
IncomingWFRHandler OnComplete,
ArrayRef<char> ArgBuffer) override {
llvm_unreachable("Unsupported");
}
Error disconnect() override { return Error::success(); }
};
/// A ExecutorProcessControl implementation targeting the current process.
class SelfExecutorProcessControl
: public ExecutorProcessControl,
private ExecutorProcessControl::MemoryAccess {
public:
SelfExecutorProcessControl(
std::shared_ptr<SymbolStringPool> SSP, std::unique_ptr<TaskDispatcher> D,
Triple TargetTriple, unsigned PageSize,
std::unique_ptr<jitlink::JITLinkMemoryManager> MemMgr);
/// Create a SelfExecutorProcessControl with the given symbol string pool and
/// memory manager.
/// If no symbol string pool is given then one will be created.
/// If no memory manager is given a jitlink::InProcessMemoryManager will
/// be created and used by default.
static Expected<std::unique_ptr<SelfExecutorProcessControl>>
Create(std::shared_ptr<SymbolStringPool> SSP = nullptr,
std::unique_ptr<TaskDispatcher> D = nullptr,
std::unique_ptr<jitlink::JITLinkMemoryManager> MemMgr = nullptr);
Expected<tpctypes::DylibHandle> loadDylib(const char *DylibPath) override;
Expected<std::vector<tpctypes::LookupResult>>
lookupSymbols(ArrayRef<LookupRequest> Request) override;
Expected<int32_t> runAsMain(ExecutorAddr MainFnAddr,
ArrayRef<std::string> Args) override;
Expected<int32_t> runAsVoidFunction(ExecutorAddr VoidFnAddr) override;
Expected<int32_t> runAsIntFunction(ExecutorAddr IntFnAddr, int Arg) override;
void callWrapperAsync(ExecutorAddr WrapperFnAddr,
IncomingWFRHandler OnComplete,
ArrayRef<char> ArgBuffer) override;
Error disconnect() override;
private:
void writeUInt8sAsync(ArrayRef<tpctypes::UInt8Write> Ws,
WriteResultFn OnWriteComplete) override;
void writeUInt16sAsync(ArrayRef<tpctypes::UInt16Write> Ws,
WriteResultFn OnWriteComplete) override;
void writeUInt32sAsync(ArrayRef<tpctypes::UInt32Write> Ws,
WriteResultFn OnWriteComplete) override;
void writeUInt64sAsync(ArrayRef<tpctypes::UInt64Write> Ws,
WriteResultFn OnWriteComplete) override;
void writeBuffersAsync(ArrayRef<tpctypes::BufferWrite> Ws,
WriteResultFn OnWriteComplete) override;
static shared::CWrapperFunctionResult
jitDispatchViaWrapperFunctionManager(void *Ctx, const void *FnTag,
const char *Data, size_t Size);
std::unique_ptr<jitlink::JITLinkMemoryManager> OwnedMemMgr;
char GlobalManglingPrefix = 0;
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_EXECUTORPROCESSCONTROL_H
PK iwFZf-�Ә � " ExecutionEngine/Orc/TaskDispatch.hnu �[��� //===--------- TaskDispatch.h - ORC task dispatch utils ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Task and TaskDispatch classes.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_TASKDISPATCH_H
#define LLVM_EXECUTIONENGINE_ORC_TASKDISPATCH_H
#include "llvm/Config/llvm-config.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ExtensibleRTTI.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <string>
#if LLVM_ENABLE_THREADS
#include <condition_variable>
#include <mutex>
#include <thread>
#endif
namespace llvm {
namespace orc {
/// Represents an abstract task for ORC to run.
class Task : public RTTIExtends<Task, RTTIRoot> {
public:
static char ID;
virtual ~Task() = default;
/// Description of the task to be performed. Used for logging.
virtual void printDescription(raw_ostream &OS) = 0;
/// Run the task.
virtual void run() = 0;
private:
void anchor() override;
};
/// Base class for generic tasks.
class GenericNamedTask : public RTTIExtends<GenericNamedTask, Task> {
public:
static char ID;
static const char *DefaultDescription;
};
/// Generic task implementation.
template <typename FnT> class GenericNamedTaskImpl : public GenericNamedTask {
public:
GenericNamedTaskImpl(FnT &&Fn, std::string DescBuffer)
: Fn(std::forward<FnT>(Fn)), Desc(DescBuffer.c_str()),
DescBuffer(std::move(DescBuffer)) {}
GenericNamedTaskImpl(FnT &&Fn, const char *Desc)
: Fn(std::forward<FnT>(Fn)), Desc(Desc) {
assert(Desc && "Description cannot be null");
}
void printDescription(raw_ostream &OS) override { OS << Desc; }
void run() override { Fn(); }
private:
FnT Fn;
const char *Desc;
std::string DescBuffer;
};
/// Create a generic named task from a std::string description.
template <typename FnT>
std::unique_ptr<GenericNamedTask> makeGenericNamedTask(FnT &&Fn,
std::string Desc) {
return std::make_unique<GenericNamedTaskImpl<FnT>>(std::forward<FnT>(Fn),
std::move(Desc));
}
/// Create a generic named task from a const char * description.
template <typename FnT>
std::unique_ptr<GenericNamedTask>
makeGenericNamedTask(FnT &&Fn, const char *Desc = nullptr) {
if (!Desc)
Desc = GenericNamedTask::DefaultDescription;
return std::make_unique<GenericNamedTaskImpl<FnT>>(std::forward<FnT>(Fn),
Desc);
}
/// Abstract base for classes that dispatch ORC Tasks.
class TaskDispatcher {
public:
virtual ~TaskDispatcher();
/// Run the given task.
virtual void dispatch(std::unique_ptr<Task> T) = 0;
/// Called by ExecutionSession. Waits until all tasks have completed.
virtual void shutdown() = 0;
};
/// Runs all tasks on the current thread.
class InPlaceTaskDispatcher : public TaskDispatcher {
public:
void dispatch(std::unique_ptr<Task> T) override;
void shutdown() override;
};
#if LLVM_ENABLE_THREADS
class DynamicThreadPoolTaskDispatcher : public TaskDispatcher {
public:
void dispatch(std::unique_ptr<Task> T) override;
void shutdown() override;
private:
std::mutex DispatchMutex;
bool Running = true;
size_t Outstanding = 0;
std::condition_variable OutstandingCV;
};
#endif // LLVM_ENABLE_THREADS
} // End namespace orc
} // End namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_TASKDISPATCH_H
PK iwFZm �m� � , ExecutionEngine/Orc/EPCGenericDylibManager.hnu �[��� //===- EPCGenericDylibManager.h -- Generic EPC Dylib management -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Implements dylib loading and searching by making calls to
// ExecutorProcessControl::callWrapper.
//
// This simplifies the implementaton of new ExecutorProcessControl instances,
// as this implementation will always work (at the cost of some performance
// overhead for the calls).
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_EPCGENERICDYLIBMANAGER_H
#define LLVM_EXECUTIONENGINE_ORC_EPCGENERICDYLIBMANAGER_H
#include "llvm/ExecutionEngine/Orc/ExecutorProcessControl.h"
#include "llvm/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.h"
namespace llvm {
namespace orc {
class SymbolLookupSet;
class EPCGenericDylibManager {
public:
/// Function addresses for memory access.
struct SymbolAddrs {
ExecutorAddr Instance;
ExecutorAddr Open;
ExecutorAddr Lookup;
};
/// Create an EPCGenericMemoryAccess instance from a given set of
/// function addrs.
static Expected<EPCGenericDylibManager>
CreateWithDefaultBootstrapSymbols(ExecutorProcessControl &EPC);
/// Create an EPCGenericMemoryAccess instance from a given set of
/// function addrs.
EPCGenericDylibManager(ExecutorProcessControl &EPC, SymbolAddrs SAs)
: EPC(EPC), SAs(SAs) {}
/// Loads the dylib with the given name.
Expected<tpctypes::DylibHandle> open(StringRef Path, uint64_t Mode);
/// Looks up symbols within the given dylib.
Expected<std::vector<ExecutorAddr>> lookup(tpctypes::DylibHandle H,
const SymbolLookupSet &Lookup);
/// Looks up symbols within the given dylib.
Expected<std::vector<ExecutorAddr>>
lookup(tpctypes::DylibHandle H, const RemoteSymbolLookupSet &Lookup);
private:
ExecutorProcessControl &EPC;
SymbolAddrs SAs;
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_EPCGENERICDYLIBMANAGER_H
PK iwFZ�"r�� � * ExecutionEngine/Orc/CompileOnDemandLayer.hnu �[��� //===- CompileOnDemandLayer.h - Compile each function on demand -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// JIT layer for breaking up modules and inserting callbacks to allow
// individual functions to be compiled on demand.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_COMPILEONDEMANDLAYER_H
#define LLVM_EXECUTIONENGINE_ORC_COMPILEONDEMANDLAYER_H
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ExecutionEngine/JITSymbol.h"
#include "llvm/ExecutionEngine/Orc/IndirectionUtils.h"
#include "llvm/ExecutionEngine/Orc/Layer.h"
#include "llvm/ExecutionEngine/Orc/LazyReexports.h"
#include "llvm/ExecutionEngine/Orc/Shared/OrcError.h"
#include "llvm/ExecutionEngine/Orc/Speculation.h"
#include "llvm/ExecutionEngine/RuntimeDyld.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/Constant.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/GlobalAlias.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/IR/GlobalVariable.h"
#include "llvm/IR/Instruction.h"
#include "llvm/IR/Mangler.h"
#include "llvm/IR/Module.h"
#include "llvm/IR/Type.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Transforms/Utils/ValueMapper.h"
#include <algorithm>
#include <cassert>
#include <functional>
#include <iterator>
#include <list>
#include <memory>
#include <optional>
#include <set>
#include <utility>
#include <vector>
namespace llvm {
namespace orc {
class CompileOnDemandLayer : public IRLayer {
friend class PartitioningIRMaterializationUnit;
public:
/// Builder for IndirectStubsManagers.
using IndirectStubsManagerBuilder =
std::function<std::unique_ptr<IndirectStubsManager>()>;
using GlobalValueSet = std::set<const GlobalValue *>;
/// Partitioning function.
using PartitionFunction =
std::function<std::optional<GlobalValueSet>(GlobalValueSet Requested)>;
/// Off-the-shelf partitioning which compiles all requested symbols (usually
/// a single function at a time).
static std::optional<GlobalValueSet>
compileRequested(GlobalValueSet Requested);
/// Off-the-shelf partitioning which compiles whole modules whenever any
/// symbol in them is requested.
static std::optional<GlobalValueSet>
compileWholeModule(GlobalValueSet Requested);
/// Construct a CompileOnDemandLayer.
CompileOnDemandLayer(ExecutionSession &ES, IRLayer &BaseLayer,
LazyCallThroughManager &LCTMgr,
IndirectStubsManagerBuilder BuildIndirectStubsManager);
/// Sets the partition function.
void setPartitionFunction(PartitionFunction Partition);
/// Sets the ImplSymbolMap
void setImplMap(ImplSymbolMap *Imp);
/// Emits the given module. This should not be called by clients: it will be
/// called by the JIT when a definition added via the add method is requested.
void emit(std::unique_ptr<MaterializationResponsibility> R,
ThreadSafeModule TSM) override;
private:
struct PerDylibResources {
public:
PerDylibResources(JITDylib &ImplD,
std::unique_ptr<IndirectStubsManager> ISMgr)
: ImplD(ImplD), ISMgr(std::move(ISMgr)) {}
JITDylib &getImplDylib() { return ImplD; }
IndirectStubsManager &getISManager() { return *ISMgr; }
private:
JITDylib &ImplD;
std::unique_ptr<IndirectStubsManager> ISMgr;
};
using PerDylibResourcesMap = std::map<const JITDylib *, PerDylibResources>;
PerDylibResources &getPerDylibResources(JITDylib &TargetD);
void cleanUpModule(Module &M);
void expandPartition(GlobalValueSet &Partition);
void emitPartition(std::unique_ptr<MaterializationResponsibility> R,
ThreadSafeModule TSM,
IRMaterializationUnit::SymbolNameToDefinitionMap Defs);
mutable std::mutex CODLayerMutex;
IRLayer &BaseLayer;
LazyCallThroughManager &LCTMgr;
IndirectStubsManagerBuilder BuildIndirectStubsManager;
PerDylibResourcesMap DylibResources;
PartitionFunction Partition = compileRequested;
SymbolLinkagePromoter PromoteSymbols;
ImplSymbolMap *AliaseeImpls = nullptr;
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_COMPILEONDEMANDLAYER_H
PK iwFZ-�u��S �S ExecutionEngine/Orc/LLJIT.hnu �[��� //===----- LLJIT.h -- An ORC-based JIT for compiling LLVM IR ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// An ORC-based JIT for compiling LLVM IR.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_LLJIT_H
#define LLVM_EXECUTIONENGINE_ORC_LLJIT_H
#include "llvm/ExecutionEngine/Orc/CompileOnDemandLayer.h"
#include "llvm/ExecutionEngine/Orc/CompileUtils.h"
#include "llvm/ExecutionEngine/Orc/ExecutionUtils.h"
#include "llvm/ExecutionEngine/Orc/IRCompileLayer.h"
#include "llvm/ExecutionEngine/Orc/IRTransformLayer.h"
#include "llvm/ExecutionEngine/Orc/JITTargetMachineBuilder.h"
#include "llvm/ExecutionEngine/Orc/ThreadSafeModule.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ThreadPool.h"
#include <variant>
namespace llvm {
namespace orc {
class LLJITBuilderState;
class LLLazyJITBuilderState;
class ObjectTransformLayer;
class ExecutorProcessControl;
/// A pre-fabricated ORC JIT stack that can serve as an alternative to MCJIT.
///
/// Create instances using LLJITBuilder.
class LLJIT {
template <typename, typename, typename> friend class LLJITBuilderSetters;
friend Expected<JITDylibSP> setUpGenericLLVMIRPlatform(LLJIT &J);
public:
/// Initializer support for LLJIT.
class PlatformSupport {
public:
virtual ~PlatformSupport();
virtual Error initialize(JITDylib &JD) = 0;
virtual Error deinitialize(JITDylib &JD) = 0;
protected:
static void setInitTransform(LLJIT &J,
IRTransformLayer::TransformFunction T);
};
/// Destruct this instance. If a multi-threaded instance, waits for all
/// compile threads to complete.
virtual ~LLJIT();
/// Returns the ExecutionSession for this instance.
ExecutionSession &getExecutionSession() { return *ES; }
/// Returns a reference to the triple for this instance.
const Triple &getTargetTriple() const { return TT; }
/// Returns a reference to the DataLayout for this instance.
const DataLayout &getDataLayout() const { return DL; }
/// Returns a reference to the JITDylib representing the JIT'd main program.
JITDylib &getMainJITDylib() { return *Main; }
/// Returns the ProcessSymbols JITDylib, which by default reflects non-JIT'd
/// symbols in the host process.
///
/// Note: JIT'd code should not be added to the ProcessSymbols JITDylib. Use
/// the main JITDylib or a custom JITDylib instead.
JITDylibSP getProcessSymbolsJITDylib();
/// Returns the Platform JITDylib, which will contain the ORC runtime (if
/// given) and any platform symbols.
///
/// Note: JIT'd code should not be added to the Platform JITDylib. Use the
/// main JITDylib or a custom JITDylib instead.
JITDylibSP getPlatformJITDylib();
/// Returns the JITDylib with the given name, or nullptr if no JITDylib with
/// that name exists.
JITDylib *getJITDylibByName(StringRef Name) {
return ES->getJITDylibByName(Name);
}
/// Load a (real) dynamic library and make its symbols available through a
/// new JITDylib with the same name.
///
/// If the given *executor* path contains a valid platform dynamic library
/// then that library will be loaded, and a new bare JITDylib whose name is
/// the given path will be created to make the library's symbols available to
/// JIT'd code.
Expected<JITDylib &> loadPlatformDynamicLibrary(const char *Path);
/// Link a static library into the given JITDylib.
///
/// If the given MemoryBuffer contains a valid static archive (or a universal
/// binary with an archive slice that fits the LLJIT instance's platform /
/// architecture) then it will be added to the given JITDylib using a
/// StaticLibraryDefinitionGenerator.
Error linkStaticLibraryInto(JITDylib &JD,
std::unique_ptr<MemoryBuffer> LibBuffer);
/// Link a static library into the given JITDylib.
///
/// If the given *host* path contains a valid static archive (or a universal
/// binary with an archive slice that fits the LLJIT instance's platform /
/// architecture) then it will be added to the given JITDylib using a
/// StaticLibraryDefinitionGenerator.
Error linkStaticLibraryInto(JITDylib &JD, const char *Path);
/// Create a new JITDylib with the given name and return a reference to it.
///
/// JITDylib names must be unique. If the given name is derived from user
/// input or elsewhere in the environment then the client should check
/// (e.g. by calling getJITDylibByName) that the given name is not already in
/// use.
Expected<JITDylib &> createJITDylib(std::string Name);
/// Returns the default link order for this LLJIT instance. This link order
/// will be appended to the link order of JITDylibs created by LLJIT's
/// createJITDylib method.
JITDylibSearchOrder defaultLinkOrder() { return DefaultLinks; }
/// Adds an IR module with the given ResourceTracker.
Error addIRModule(ResourceTrackerSP RT, ThreadSafeModule TSM);
/// Adds an IR module to the given JITDylib.
Error addIRModule(JITDylib &JD, ThreadSafeModule TSM);
/// Adds an IR module to the Main JITDylib.
Error addIRModule(ThreadSafeModule TSM) {
return addIRModule(*Main, std::move(TSM));
}
/// Adds an object file to the given JITDylib.
Error addObjectFile(ResourceTrackerSP RT, std::unique_ptr<MemoryBuffer> Obj);
/// Adds an object file to the given JITDylib.
Error addObjectFile(JITDylib &JD, std::unique_ptr<MemoryBuffer> Obj);
/// Adds an object file to the given JITDylib.
Error addObjectFile(std::unique_ptr<MemoryBuffer> Obj) {
return addObjectFile(*Main, std::move(Obj));
}
/// Look up a symbol in JITDylib JD by the symbol's linker-mangled name (to
/// look up symbols based on their IR name use the lookup function instead).
Expected<ExecutorAddr> lookupLinkerMangled(JITDylib &JD,
SymbolStringPtr Name);
/// Look up a symbol in JITDylib JD by the symbol's linker-mangled name (to
/// look up symbols based on their IR name use the lookup function instead).
Expected<ExecutorAddr> lookupLinkerMangled(JITDylib &JD,
StringRef Name) {
return lookupLinkerMangled(JD, ES->intern(Name));
}
/// Look up a symbol in the main JITDylib by the symbol's linker-mangled name
/// (to look up symbols based on their IR name use the lookup function
/// instead).
Expected<ExecutorAddr> lookupLinkerMangled(StringRef Name) {
return lookupLinkerMangled(*Main, Name);
}
/// Look up a symbol in JITDylib JD based on its IR symbol name.
Expected<ExecutorAddr> lookup(JITDylib &JD, StringRef UnmangledName) {
return lookupLinkerMangled(JD, mangle(UnmangledName));
}
/// Look up a symbol in the main JITDylib based on its IR symbol name.
Expected<ExecutorAddr> lookup(StringRef UnmangledName) {
return lookup(*Main, UnmangledName);
}
/// Set the PlatformSupport instance.
void setPlatformSupport(std::unique_ptr<PlatformSupport> PS) {
this->PS = std::move(PS);
}
/// Get the PlatformSupport instance.
PlatformSupport *getPlatformSupport() { return PS.get(); }
/// Run the initializers for the given JITDylib.
Error initialize(JITDylib &JD) {
DEBUG_WITH_TYPE("orc", {
dbgs() << "LLJIT running initializers for JITDylib \"" << JD.getName()
<< "\"\n";
});
assert(PS && "PlatformSupport must be set to run initializers.");
return PS->initialize(JD);
}
/// Run the deinitializers for the given JITDylib.
Error deinitialize(JITDylib &JD) {
DEBUG_WITH_TYPE("orc", {
dbgs() << "LLJIT running deinitializers for JITDylib \"" << JD.getName()
<< "\"\n";
});
assert(PS && "PlatformSupport must be set to run initializers.");
return PS->deinitialize(JD);
}
/// Returns a reference to the ObjLinkingLayer
ObjectLayer &getObjLinkingLayer() { return *ObjLinkingLayer; }
/// Returns a reference to the object transform layer.
ObjectTransformLayer &getObjTransformLayer() { return *ObjTransformLayer; }
/// Returns a reference to the IR transform layer.
IRTransformLayer &getIRTransformLayer() { return *TransformLayer; }
/// Returns a reference to the IR compile layer.
IRCompileLayer &getIRCompileLayer() { return *CompileLayer; }
/// Returns a linker-mangled version of UnmangledName.
std::string mangle(StringRef UnmangledName) const;
/// Returns an interned, linker-mangled version of UnmangledName.
SymbolStringPtr mangleAndIntern(StringRef UnmangledName) const {
return ES->intern(mangle(UnmangledName));
}
protected:
static Expected<std::unique_ptr<ObjectLayer>>
createObjectLinkingLayer(LLJITBuilderState &S, ExecutionSession &ES);
static Expected<std::unique_ptr<IRCompileLayer::IRCompiler>>
createCompileFunction(LLJITBuilderState &S, JITTargetMachineBuilder JTMB);
/// Create an LLJIT instance with a single compile thread.
LLJIT(LLJITBuilderState &S, Error &Err);
Error applyDataLayout(Module &M);
void recordCtorDtors(Module &M);
std::unique_ptr<ExecutionSession> ES;
std::unique_ptr<PlatformSupport> PS;
JITDylib *ProcessSymbols = nullptr;
JITDylib *Platform = nullptr;
JITDylib *Main = nullptr;
JITDylibSearchOrder DefaultLinks;
DataLayout DL;
Triple TT;
std::unique_ptr<ThreadPool> CompileThreads;
std::unique_ptr<ObjectLayer> ObjLinkingLayer;
std::unique_ptr<ObjectTransformLayer> ObjTransformLayer;
std::unique_ptr<IRCompileLayer> CompileLayer;
std::unique_ptr<IRTransformLayer> TransformLayer;
std::unique_ptr<IRTransformLayer> InitHelperTransformLayer;
};
/// An extended version of LLJIT that supports lazy function-at-a-time
/// compilation of LLVM IR.
class LLLazyJIT : public LLJIT {
template <typename, typename, typename> friend class LLJITBuilderSetters;
public:
/// Sets the partition function.
void
setPartitionFunction(CompileOnDemandLayer::PartitionFunction Partition) {
CODLayer->setPartitionFunction(std::move(Partition));
}
/// Returns a reference to the on-demand layer.
CompileOnDemandLayer &getCompileOnDemandLayer() { return *CODLayer; }
/// Add a module to be lazily compiled to JITDylib JD.
Error addLazyIRModule(JITDylib &JD, ThreadSafeModule M);
/// Add a module to be lazily compiled to the main JITDylib.
Error addLazyIRModule(ThreadSafeModule M) {
return addLazyIRModule(*Main, std::move(M));
}
private:
// Create a single-threaded LLLazyJIT instance.
LLLazyJIT(LLLazyJITBuilderState &S, Error &Err);
std::unique_ptr<LazyCallThroughManager> LCTMgr;
std::unique_ptr<CompileOnDemandLayer> CODLayer;
};
class LLJITBuilderState {
public:
using ObjectLinkingLayerCreator =
std::function<Expected<std::unique_ptr<ObjectLayer>>(ExecutionSession &,
const Triple &)>;
using CompileFunctionCreator =
std::function<Expected<std::unique_ptr<IRCompileLayer::IRCompiler>>(
JITTargetMachineBuilder JTMB)>;
using ProcessSymbolsJITDylibSetupFunction =
std::function<Error(JITDylib &JD)>;
using PlatformSetupFunction = unique_function<Expected<JITDylibSP>(LLJIT &J)>;
std::unique_ptr<ExecutorProcessControl> EPC;
std::unique_ptr<ExecutionSession> ES;
std::optional<JITTargetMachineBuilder> JTMB;
std::optional<DataLayout> DL;
bool LinkProcessSymbolsByDefault = true;
ProcessSymbolsJITDylibSetupFunction SetupProcessSymbolsJITDylib;
ObjectLinkingLayerCreator CreateObjectLinkingLayer;
CompileFunctionCreator CreateCompileFunction;
PlatformSetupFunction SetUpPlatform;
unsigned NumCompileThreads = 0;
bool EnableDebuggerSupport = false;
/// Called prior to JIT class construcion to fix up defaults.
Error prepareForConstruction();
};
template <typename JITType, typename SetterImpl, typename State>
class LLJITBuilderSetters {
public:
/// Set a ExecutorProcessControl for this instance.
/// This should not be called if ExecutionSession has already been set.
SetterImpl &
setExecutorProcessControl(std::unique_ptr<ExecutorProcessControl> EPC) {
assert(
!impl().ES &&
"setExecutorProcessControl should not be called if an ExecutionSession "
"has already been set");
impl().EPC = std::move(EPC);
return impl();
}
/// Set an ExecutionSession for this instance.
SetterImpl &setExecutionSession(std::unique_ptr<ExecutionSession> ES) {
assert(
!impl().EPC &&
"setExecutionSession should not be called if an ExecutorProcessControl "
"object has already been set");
impl().ES = std::move(ES);
return impl();
}
/// Set the JITTargetMachineBuilder for this instance.
///
/// If this method is not called, JITTargetMachineBuilder::detectHost will be
/// used to construct a default target machine builder for the host platform.
SetterImpl &setJITTargetMachineBuilder(JITTargetMachineBuilder JTMB) {
impl().JTMB = std::move(JTMB);
return impl();
}
/// Return a reference to the JITTargetMachineBuilder.
///
std::optional<JITTargetMachineBuilder> &getJITTargetMachineBuilder() {
return impl().JTMB;
}
/// Set a DataLayout for this instance. If no data layout is specified then
/// the target's default data layout will be used.
SetterImpl &setDataLayout(std::optional<DataLayout> DL) {
impl().DL = std::move(DL);
return impl();
}
/// The LinkProcessSymbolsDyDefault flag determines whether the "Process"
/// JITDylib will be added to the default link order at LLJIT construction
/// time. If true, the Process JITDylib will be added as the last item in the
/// default link order. If false (or if the Process JITDylib is disabled via
/// setProcessSymbolsJITDylibSetup) then the Process JITDylib will not appear
/// in the default link order.
SetterImpl &setLinkProcessSymbolsByDefault(bool LinkProcessSymbolsByDefault) {
impl().LinkProcessSymbolsByDefault = LinkProcessSymbolsByDefault;
return impl();
}
/// Set a setup function for the process symbols dylib. If not provided,
/// but LinkProcessSymbolsJITDylibByDefault is true, then the process-symbols
/// JITDylib will be configured with a DynamicLibrarySearchGenerator with a
/// default symbol filter.
SetterImpl &setProcessSymbolsJITDylibSetup(
LLJITBuilderState::ProcessSymbolsJITDylibSetupFunction
SetupProcessSymbolsJITDylib) {
impl().SetupProcessSymbolsJITDylib = std::move(SetupProcessSymbolsJITDylib);
return impl();
}
/// Set an ObjectLinkingLayer creation function.
///
/// If this method is not called, a default creation function will be used
/// that will construct an RTDyldObjectLinkingLayer.
SetterImpl &setObjectLinkingLayerCreator(
LLJITBuilderState::ObjectLinkingLayerCreator CreateObjectLinkingLayer) {
impl().CreateObjectLinkingLayer = std::move(CreateObjectLinkingLayer);
return impl();
}
/// Set a CompileFunctionCreator.
///
/// If this method is not called, a default creation function wil be used
/// that will construct a basic IR compile function that is compatible with
/// the selected number of threads (SimpleCompiler for '0' compile threads,
/// ConcurrentIRCompiler otherwise).
SetterImpl &setCompileFunctionCreator(
LLJITBuilderState::CompileFunctionCreator CreateCompileFunction) {
impl().CreateCompileFunction = std::move(CreateCompileFunction);
return impl();
}
/// Set up an PlatformSetupFunction.
///
/// If this method is not called then setUpGenericLLVMIRPlatform
/// will be used to configure the JIT's platform support.
SetterImpl &
setPlatformSetUp(LLJITBuilderState::PlatformSetupFunction SetUpPlatform) {
impl().SetUpPlatform = std::move(SetUpPlatform);
return impl();
}
/// Set the number of compile threads to use.
///
/// If set to zero, compilation will be performed on the execution thread when
/// JITing in-process. If set to any other number N, a thread pool of N
/// threads will be created for compilation.
///
/// If this method is not called, behavior will be as if it were called with
/// a zero argument.
SetterImpl &setNumCompileThreads(unsigned NumCompileThreads) {
impl().NumCompileThreads = NumCompileThreads;
return impl();
}
/// Enable / disable debugger support (off by default).
SetterImpl &setEnableDebuggerSupport(bool EnableDebuggerSupport) {
impl().EnableDebuggerSupport = EnableDebuggerSupport;
return impl();
}
/// Set an ExecutorProcessControl object.
///
/// If the platform uses ObjectLinkingLayer by default and no
/// ObjectLinkingLayerCreator has been set then the ExecutorProcessControl
/// object will be used to supply the memory manager for the
/// ObjectLinkingLayer.
SetterImpl &setExecutorProcessControl(ExecutorProcessControl &EPC) {
impl().EPC = &EPC;
return impl();
}
/// Create an instance of the JIT.
Expected<std::unique_ptr<JITType>> create() {
if (auto Err = impl().prepareForConstruction())
return std::move(Err);
Error Err = Error::success();
std::unique_ptr<JITType> J(new JITType(impl(), Err));
if (Err)
return std::move(Err);
return std::move(J);
}
protected:
SetterImpl &impl() { return static_cast<SetterImpl &>(*this); }
};
/// Constructs LLJIT instances.
class LLJITBuilder
: public LLJITBuilderState,
public LLJITBuilderSetters<LLJIT, LLJITBuilder, LLJITBuilderState> {};
class LLLazyJITBuilderState : public LLJITBuilderState {
friend class LLLazyJIT;
public:
using IndirectStubsManagerBuilderFunction =
std::function<std::unique_ptr<IndirectStubsManager>()>;
Triple TT;
ExecutorAddr LazyCompileFailureAddr;
std::unique_ptr<LazyCallThroughManager> LCTMgr;
IndirectStubsManagerBuilderFunction ISMBuilder;
Error prepareForConstruction();
};
template <typename JITType, typename SetterImpl, typename State>
class LLLazyJITBuilderSetters
: public LLJITBuilderSetters<JITType, SetterImpl, State> {
public:
/// Set the address in the target address to call if a lazy compile fails.
///
/// If this method is not called then the value will default to 0.
SetterImpl &setLazyCompileFailureAddr(ExecutorAddr Addr) {
this->impl().LazyCompileFailureAddr = Addr;
return this->impl();
}
/// Set the lazy-callthrough manager.
///
/// If this method is not called then a default, in-process lazy callthrough
/// manager for the host platform will be used.
SetterImpl &
setLazyCallthroughManager(std::unique_ptr<LazyCallThroughManager> LCTMgr) {
this->impl().LCTMgr = std::move(LCTMgr);
return this->impl();
}
/// Set the IndirectStubsManager builder function.
///
/// If this method is not called then a default, in-process
/// IndirectStubsManager builder for the host platform will be used.
SetterImpl &setIndirectStubsManagerBuilder(
LLLazyJITBuilderState::IndirectStubsManagerBuilderFunction ISMBuilder) {
this->impl().ISMBuilder = std::move(ISMBuilder);
return this->impl();
}
};
/// Constructs LLLazyJIT instances.
class LLLazyJITBuilder
: public LLLazyJITBuilderState,
public LLLazyJITBuilderSetters<LLLazyJIT, LLLazyJITBuilder,
LLLazyJITBuilderState> {};
/// Configure the LLJIT instance to use orc runtime support. This overload
/// assumes that the client has manually configured a Platform object.
Error setUpOrcPlatformManually(LLJIT &J);
/// Configure the LLJIT instance to use the ORC runtime and the detected
/// native target for the executor.
class ExecutorNativePlatform {
public:
/// Set up using path to Orc runtime.
ExecutorNativePlatform(std::string OrcRuntimePath)
: OrcRuntime(std::move(OrcRuntimePath)) {}
/// Set up using the given memory buffer.
ExecutorNativePlatform(std::unique_ptr<MemoryBuffer> OrcRuntimeMB)
: OrcRuntime(std::move(OrcRuntimeMB)) {}
// TODO: add compiler-rt.
/// Add a path to the VC runtime.
ExecutorNativePlatform &addVCRuntime(std::string VCRuntimePath,
bool StaticVCRuntime) {
VCRuntime = {std::move(VCRuntimePath), StaticVCRuntime};
return *this;
}
Expected<JITDylibSP> operator()(LLJIT &J);
private:
std::variant<std::string, std::unique_ptr<MemoryBuffer>> OrcRuntime;
std::optional<std::pair<std::string, bool>> VCRuntime;
};
/// Configure the LLJIT instance to scrape modules for llvm.global_ctors and
/// llvm.global_dtors variables and (if present) build initialization and
/// deinitialization functions. Platform specific initialization configurations
/// should be preferred where available.
Expected<JITDylibSP> setUpGenericLLVMIRPlatform(LLJIT &J);
/// Configure the LLJIT instance to disable platform support explicitly. This is
/// useful in two cases: for platforms that don't have such requirements and for
/// platforms, that we have no explicit support yet and that don't work well
/// with the generic IR platform.
Expected<JITDylibSP> setUpInactivePlatform(LLJIT &J);
} // End namespace orc
} // End namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_LLJIT_H
PK iwFZ�]� � ) ExecutionEngine/Orc/ObjectFileInterface.hnu �[��� //===-- ObjectFileInterface.h - MU interface utils for objects --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Utilities for building MaterializationUnit::Interface objects from
// object files.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_OBJECTFILEINTERFACE_H
#define LLVM_EXECUTIONENGINE_ORC_OBJECTFILEINTERFACE_H
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/Support/MemoryBuffer.h"
namespace llvm {
namespace orc {
/// Adds an initializer symbol to the given MU interface.
/// The init symbol's name is guaranteed to be unique within I, and will be of
/// the form $.<ObjFileName>.__inits.<N>, where N is some integer.
void addInitSymbol(MaterializationUnit::Interface &I, ExecutionSession &ES,
StringRef ObjFileName);
/// Returns a MaterializationUnit::Interface for the object file contained in
/// the given buffer, or an error if the buffer does not contain a valid object
/// file.
Expected<MaterializationUnit::Interface>
getObjectFileInterface(ExecutionSession &ES, MemoryBufferRef ObjBuffer);
} // End namespace orc
} // End namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_OBJECTFILEINTERFACE_H
PK iwFZ�H��4 �4 $ ExecutionEngine/Orc/ExecutionUtils.hnu �[��� //===- ExecutionUtils.h - Utilities for executing code in Orc ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Contains utilities for executing code in Orc.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_EXECUTIONUTILS_H
#define LLVM_EXECUTIONENGINE_ORC_EXECUTIONUTILS_H
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/ExecutionEngine/JITSymbol.h"
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/ExecutionEngine/Orc/Mangling.h"
#include "llvm/ExecutionEngine/Orc/ObjectLinkingLayer.h"
#include "llvm/ExecutionEngine/Orc/Shared/OrcError.h"
#include "llvm/ExecutionEngine/RuntimeDyld.h"
#include "llvm/Object/Archive.h"
#include "llvm/Support/DynamicLibrary.h"
#include <algorithm>
#include <cstdint>
#include <utility>
#include <vector>
namespace llvm {
class ConstantArray;
class GlobalVariable;
class Function;
class Module;
class Value;
namespace object {
class MachOUniversalBinary;
}
namespace orc {
class ObjectLayer;
/// This iterator provides a convenient way to iterate over the elements
/// of an llvm.global_ctors/llvm.global_dtors instance.
///
/// The easiest way to get hold of instances of this class is to use the
/// getConstructors/getDestructors functions.
class CtorDtorIterator {
public:
/// Accessor for an element of the global_ctors/global_dtors array.
///
/// This class provides a read-only view of the element with any casts on
/// the function stripped away.
struct Element {
Element(unsigned Priority, Function *Func, Value *Data)
: Priority(Priority), Func(Func), Data(Data) {}
unsigned Priority;
Function *Func;
Value *Data;
};
/// Construct an iterator instance. If End is true then this iterator
/// acts as the end of the range, otherwise it is the beginning.
CtorDtorIterator(const GlobalVariable *GV, bool End);
/// Test iterators for equality.
bool operator==(const CtorDtorIterator &Other) const;
/// Test iterators for inequality.
bool operator!=(const CtorDtorIterator &Other) const;
/// Pre-increment iterator.
CtorDtorIterator& operator++();
/// Post-increment iterator.
CtorDtorIterator operator++(int);
/// Dereference iterator. The resulting value provides a read-only view
/// of this element of the global_ctors/global_dtors list.
Element operator*() const;
private:
const ConstantArray *InitList;
unsigned I;
};
/// Create an iterator range over the entries of the llvm.global_ctors
/// array.
iterator_range<CtorDtorIterator> getConstructors(const Module &M);
/// Create an iterator range over the entries of the llvm.global_ctors
/// array.
iterator_range<CtorDtorIterator> getDestructors(const Module &M);
/// This iterator provides a convenient way to iterate over GlobalValues that
/// have initialization effects.
class StaticInitGVIterator {
public:
StaticInitGVIterator() = default;
StaticInitGVIterator(Module &M)
: I(M.global_values().begin()), E(M.global_values().end()),
ObjFmt(Triple(M.getTargetTriple()).getObjectFormat()) {
if (I != E) {
if (!isStaticInitGlobal(*I))
moveToNextStaticInitGlobal();
} else
I = E = Module::global_value_iterator();
}
bool operator==(const StaticInitGVIterator &O) const { return I == O.I; }
bool operator!=(const StaticInitGVIterator &O) const { return I != O.I; }
StaticInitGVIterator &operator++() {
assert(I != E && "Increment past end of range");
moveToNextStaticInitGlobal();
return *this;
}
GlobalValue &operator*() { return *I; }
private:
bool isStaticInitGlobal(GlobalValue &GV);
void moveToNextStaticInitGlobal() {
++I;
while (I != E && !isStaticInitGlobal(*I))
++I;
if (I == E)
I = E = Module::global_value_iterator();
}
Module::global_value_iterator I, E;
Triple::ObjectFormatType ObjFmt;
};
/// Create an iterator range over the GlobalValues that contribute to static
/// initialization.
inline iterator_range<StaticInitGVIterator> getStaticInitGVs(Module &M) {
return make_range(StaticInitGVIterator(M), StaticInitGVIterator());
}
class CtorDtorRunner {
public:
CtorDtorRunner(JITDylib &JD) : JD(JD) {}
void add(iterator_range<CtorDtorIterator> CtorDtors);
Error run();
private:
using CtorDtorList = std::vector<SymbolStringPtr>;
using CtorDtorPriorityMap = std::map<unsigned, CtorDtorList>;
JITDylib &JD;
CtorDtorPriorityMap CtorDtorsByPriority;
};
/// Support class for static dtor execution. For hosted (in-process) JITs
/// only!
///
/// If a __cxa_atexit function isn't found C++ programs that use static
/// destructors will fail to link. However, we don't want to use the host
/// process's __cxa_atexit, because it will schedule JIT'd destructors to run
/// after the JIT has been torn down, which is no good. This class makes it easy
/// to override __cxa_atexit (and the related __dso_handle).
///
/// To use, clients should manually call searchOverrides from their symbol
/// resolver. This should generally be done after attempting symbol resolution
/// inside the JIT, but before searching the host process's symbol table. When
/// the client determines that destructors should be run (generally at JIT
/// teardown or after a return from main), the runDestructors method should be
/// called.
class LocalCXXRuntimeOverridesBase {
public:
/// Run any destructors recorded by the overriden __cxa_atexit function
/// (CXAAtExitOverride).
void runDestructors();
protected:
using DestructorPtr = void (*)(void *);
using CXXDestructorDataPair = std::pair<DestructorPtr, void *>;
using CXXDestructorDataPairList = std::vector<CXXDestructorDataPair>;
CXXDestructorDataPairList DSOHandleOverride;
static int CXAAtExitOverride(DestructorPtr Destructor, void *Arg,
void *DSOHandle);
};
class LocalCXXRuntimeOverrides : public LocalCXXRuntimeOverridesBase {
public:
Error enable(JITDylib &JD, MangleAndInterner &Mangler);
};
/// An interface for Itanium __cxa_atexit interposer implementations.
class ItaniumCXAAtExitSupport {
public:
struct AtExitRecord {
void (*F)(void *);
void *Ctx;
};
void registerAtExit(void (*F)(void *), void *Ctx, void *DSOHandle);
void runAtExits(void *DSOHandle);
private:
std::mutex AtExitsMutex;
DenseMap<void *, std::vector<AtExitRecord>> AtExitRecords;
};
/// A utility class to expose symbols found via dlsym to the JIT.
///
/// If an instance of this class is attached to a JITDylib as a fallback
/// definition generator, then any symbol found in the given DynamicLibrary that
/// passes the 'Allow' predicate will be added to the JITDylib.
class DynamicLibrarySearchGenerator : public DefinitionGenerator {
public:
using SymbolPredicate = std::function<bool(const SymbolStringPtr &)>;
/// Create a DynamicLibrarySearchGenerator that searches for symbols in the
/// given sys::DynamicLibrary.
///
/// If the Allow predicate is given then only symbols matching the predicate
/// will be searched for. If the predicate is not given then all symbols will
/// be searched for.
DynamicLibrarySearchGenerator(sys::DynamicLibrary Dylib, char GlobalPrefix,
SymbolPredicate Allow = SymbolPredicate());
/// Permanently loads the library at the given path and, on success, returns
/// a DynamicLibrarySearchGenerator that will search it for symbol definitions
/// in the library. On failure returns the reason the library failed to load.
static Expected<std::unique_ptr<DynamicLibrarySearchGenerator>>
Load(const char *FileName, char GlobalPrefix,
SymbolPredicate Allow = SymbolPredicate());
/// Creates a DynamicLibrarySearchGenerator that searches for symbols in
/// the current process.
static Expected<std::unique_ptr<DynamicLibrarySearchGenerator>>
GetForCurrentProcess(char GlobalPrefix,
SymbolPredicate Allow = SymbolPredicate()) {
return Load(nullptr, GlobalPrefix, std::move(Allow));
}
Error tryToGenerate(LookupState &LS, LookupKind K, JITDylib &JD,
JITDylibLookupFlags JDLookupFlags,
const SymbolLookupSet &Symbols) override;
private:
sys::DynamicLibrary Dylib;
SymbolPredicate Allow;
char GlobalPrefix;
};
/// A utility class to expose symbols from a static library.
///
/// If an instance of this class is attached to a JITDylib as a fallback
/// definition generator, then any symbol found in the archive will result in
/// the containing object being added to the JITDylib.
class StaticLibraryDefinitionGenerator : public DefinitionGenerator {
public:
// Interface builder function for objects loaded from this archive.
using GetObjectFileInterface =
unique_function<Expected<MaterializationUnit::Interface>(
ExecutionSession &ES, MemoryBufferRef ObjBuffer)>;
/// Try to create a StaticLibraryDefinitionGenerator from the given path.
///
/// This call will succeed if the file at the given path is a static library
/// or a MachO universal binary containing a static library that is compatible
/// with the ExecutionSession's triple. Otherwise it will return an error.
static Expected<std::unique_ptr<StaticLibraryDefinitionGenerator>>
Load(ObjectLayer &L, const char *FileName,
GetObjectFileInterface GetObjFileInterface = GetObjectFileInterface());
/// Try to create a StaticLibrarySearchGenerator from the given memory buffer
/// and Archive object.
static Expected<std::unique_ptr<StaticLibraryDefinitionGenerator>>
Create(ObjectLayer &L, std::unique_ptr<MemoryBuffer> ArchiveBuffer,
std::unique_ptr<object::Archive> Archive,
GetObjectFileInterface GetObjFileInterface = GetObjectFileInterface());
/// Try to create a StaticLibrarySearchGenerator from the given memory buffer.
/// This call will succeed if the buffer contains a valid archive, otherwise
/// it will return an error.
///
/// This call will succeed if the buffer contains a valid static library or a
/// MachO universal binary containing a static library that is compatible
/// with the ExecutionSession's triple. Otherwise it will return an error.
static Expected<std::unique_ptr<StaticLibraryDefinitionGenerator>>
Create(ObjectLayer &L, std::unique_ptr<MemoryBuffer> ArchiveBuffer,
GetObjectFileInterface GetObjFileInterface = GetObjectFileInterface());
/// Returns a list of filenames of dynamic libraries that this archive has
/// imported. This class does not load these libraries by itself. User is
/// responsible for making sure these libraries are avaliable to the JITDylib.
const std::set<std::string> &getImportedDynamicLibraries() const {
return ImportedDynamicLibraries;
}
Error tryToGenerate(LookupState &LS, LookupKind K, JITDylib &JD,
JITDylibLookupFlags JDLookupFlags,
const SymbolLookupSet &Symbols) override;
private:
StaticLibraryDefinitionGenerator(ObjectLayer &L,
std::unique_ptr<MemoryBuffer> ArchiveBuffer,
std::unique_ptr<object::Archive> Archive,
GetObjectFileInterface GetObjFileInterface,
Error &Err);
Error buildObjectFilesMap();
static Expected<std::pair<size_t, size_t>>
getSliceRangeForArch(object::MachOUniversalBinary &UB, const Triple &TT);
ObjectLayer &L;
GetObjectFileInterface GetObjFileInterface;
std::set<std::string> ImportedDynamicLibraries;
std::unique_ptr<MemoryBuffer> ArchiveBuffer;
std::unique_ptr<object::Archive> Archive;
DenseMap<SymbolStringPtr, MemoryBufferRef> ObjectFilesMap;
};
/// A utility class to create COFF dllimport GOT symbols (__imp_*) and PLT
/// stubs.
///
/// If an instance of this class is attached to a JITDylib as a fallback
/// definition generator, PLT stubs and dllimport __imp_ symbols will be
/// generated for external symbols found outside the given jitdylib. Currently
/// only supports x86_64 architecture.
class DLLImportDefinitionGenerator : public DefinitionGenerator {
public:
/// Creates a DLLImportDefinitionGenerator instance.
static std::unique_ptr<DLLImportDefinitionGenerator>
Create(ExecutionSession &ES, ObjectLinkingLayer &L);
Error tryToGenerate(LookupState &LS, LookupKind K, JITDylib &JD,
JITDylibLookupFlags JDLookupFlags,
const SymbolLookupSet &Symbols) override;
private:
DLLImportDefinitionGenerator(ExecutionSession &ES, ObjectLinkingLayer &L)
: ES(ES), L(L) {}
static Expected<unsigned> getTargetPointerSize(const Triple &TT);
static Expected<support::endianness> getTargetEndianness(const Triple &TT);
Expected<std::unique_ptr<jitlink::LinkGraph>>
createStubsGraph(const SymbolMap &Resolved);
static StringRef getImpPrefix() { return "__imp_"; }
static StringRef getSectionName() { return "$__DLLIMPORT_STUBS"; }
ExecutionSession &ES;
ObjectLinkingLayer &L;
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_EXECUTIONUTILS_H
PK iwFZ'b���! �! ) ExecutionEngine/Orc/EPCIndirectionUtils.hnu �[��� //===--- EPCIndirectionUtils.h - EPC based indirection utils ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Indirection utilities (stubs, trampolines, lazy call-throughs) that use the
// ExecutorProcessControl API to interact with the executor process.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_EPCINDIRECTIONUTILS_H
#define LLVM_EXECUTIONENGINE_ORC_EPCINDIRECTIONUTILS_H
#include "llvm/ExecutionEngine/JITLink/JITLinkMemoryManager.h"
#include "llvm/ExecutionEngine/Orc/IndirectionUtils.h"
#include "llvm/ExecutionEngine/Orc/LazyReexports.h"
#include <mutex>
namespace llvm {
namespace orc {
class ExecutorProcessControl;
/// Provides ExecutorProcessControl based indirect stubs, trampoline pool and
/// lazy call through manager.
class EPCIndirectionUtils {
friend class EPCIndirectionUtilsAccess;
public:
/// ABI support base class. Used to write resolver, stub, and trampoline
/// blocks.
class ABISupport {
protected:
ABISupport(unsigned PointerSize, unsigned TrampolineSize, unsigned StubSize,
unsigned StubToPointerMaxDisplacement, unsigned ResolverCodeSize)
: PointerSize(PointerSize), TrampolineSize(TrampolineSize),
StubSize(StubSize),
StubToPointerMaxDisplacement(StubToPointerMaxDisplacement),
ResolverCodeSize(ResolverCodeSize) {}
public:
virtual ~ABISupport();
unsigned getPointerSize() const { return PointerSize; }
unsigned getTrampolineSize() const { return TrampolineSize; }
unsigned getStubSize() const { return StubSize; }
unsigned getStubToPointerMaxDisplacement() const {
return StubToPointerMaxDisplacement;
}
unsigned getResolverCodeSize() const { return ResolverCodeSize; }
virtual void writeResolverCode(char *ResolverWorkingMem,
ExecutorAddr ResolverTargetAddr,
ExecutorAddr ReentryFnAddr,
ExecutorAddr ReentryCtxAddr) const = 0;
virtual void writeTrampolines(char *TrampolineBlockWorkingMem,
ExecutorAddr TrampolineBlockTragetAddr,
ExecutorAddr ResolverAddr,
unsigned NumTrampolines) const = 0;
virtual void writeIndirectStubsBlock(
char *StubsBlockWorkingMem, ExecutorAddr StubsBlockTargetAddress,
ExecutorAddr PointersBlockTargetAddress, unsigned NumStubs) const = 0;
private:
unsigned PointerSize = 0;
unsigned TrampolineSize = 0;
unsigned StubSize = 0;
unsigned StubToPointerMaxDisplacement = 0;
unsigned ResolverCodeSize = 0;
};
/// Create using the given ABI class.
template <typename ORCABI>
static std::unique_ptr<EPCIndirectionUtils>
CreateWithABI(ExecutorProcessControl &EPC);
/// Create based on the ExecutorProcessControl triple.
static Expected<std::unique_ptr<EPCIndirectionUtils>>
Create(ExecutorProcessControl &EPC);
/// Create based on the ExecutorProcessControl triple.
static Expected<std::unique_ptr<EPCIndirectionUtils>>
Create(ExecutionSession &ES) {
return Create(ES.getExecutorProcessControl());
}
/// Return a reference to the ExecutorProcessControl object.
ExecutorProcessControl &getExecutorProcessControl() const { return EPC; }
/// Return a reference to the ABISupport object for this instance.
ABISupport &getABISupport() const { return *ABI; }
/// Release memory for resources held by this instance. This *must* be called
/// prior to destruction of the class.
Error cleanup();
/// Write resolver code to the executor process and return its address.
/// This must be called before any call to createTrampolinePool or
/// createLazyCallThroughManager.
Expected<ExecutorAddr> writeResolverBlock(ExecutorAddr ReentryFnAddr,
ExecutorAddr ReentryCtxAddr);
/// Returns the address of the Resolver block. Returns zero if the
/// writeResolverBlock method has not previously been called.
ExecutorAddr getResolverBlockAddress() const { return ResolverBlockAddr; }
/// Create an IndirectStubsManager for the executor process.
std::unique_ptr<IndirectStubsManager> createIndirectStubsManager();
/// Create a TrampolinePool for the executor process.
TrampolinePool &getTrampolinePool();
/// Create a LazyCallThroughManager.
/// This function should only be called once.
LazyCallThroughManager &
createLazyCallThroughManager(ExecutionSession &ES,
ExecutorAddr ErrorHandlerAddr);
/// Create a LazyCallThroughManager for the executor process.
LazyCallThroughManager &getLazyCallThroughManager() {
assert(LCTM && "createLazyCallThroughManager must be called first");
return *LCTM;
}
private:
using FinalizedAlloc = jitlink::JITLinkMemoryManager::FinalizedAlloc;
struct IndirectStubInfo {
IndirectStubInfo() = default;
IndirectStubInfo(ExecutorAddr StubAddress, ExecutorAddr PointerAddress)
: StubAddress(StubAddress), PointerAddress(PointerAddress) {}
ExecutorAddr StubAddress;
ExecutorAddr PointerAddress;
};
using IndirectStubInfoVector = std::vector<IndirectStubInfo>;
/// Create an EPCIndirectionUtils instance.
EPCIndirectionUtils(ExecutorProcessControl &EPC,
std::unique_ptr<ABISupport> ABI);
Expected<IndirectStubInfoVector> getIndirectStubs(unsigned NumStubs);
std::mutex EPCUIMutex;
ExecutorProcessControl &EPC;
std::unique_ptr<ABISupport> ABI;
ExecutorAddr ResolverBlockAddr;
FinalizedAlloc ResolverBlock;
std::unique_ptr<TrampolinePool> TP;
std::unique_ptr<LazyCallThroughManager> LCTM;
std::vector<IndirectStubInfo> AvailableIndirectStubs;
std::vector<FinalizedAlloc> IndirectStubAllocs;
};
/// This will call writeResolver on the given EPCIndirectionUtils instance
/// to set up re-entry via a function that will directly return the trampoline
/// landing address.
///
/// The EPCIndirectionUtils' LazyCallThroughManager must have been previously
/// created via EPCIndirectionUtils::createLazyCallThroughManager.
///
/// The EPCIndirectionUtils' writeResolver method must not have been previously
/// called.
///
/// This function is experimental and likely subject to revision.
Error setUpInProcessLCTMReentryViaEPCIU(EPCIndirectionUtils &EPCIU);
namespace detail {
template <typename ORCABI>
class ABISupportImpl : public EPCIndirectionUtils::ABISupport {
public:
ABISupportImpl()
: ABISupport(ORCABI::PointerSize, ORCABI::TrampolineSize,
ORCABI::StubSize, ORCABI::StubToPointerMaxDisplacement,
ORCABI::ResolverCodeSize) {}
void writeResolverCode(char *ResolverWorkingMem,
ExecutorAddr ResolverTargetAddr,
ExecutorAddr ReentryFnAddr,
ExecutorAddr ReentryCtxAddr) const override {
ORCABI::writeResolverCode(ResolverWorkingMem, ResolverTargetAddr,
ReentryFnAddr, ReentryCtxAddr);
}
void writeTrampolines(char *TrampolineBlockWorkingMem,
ExecutorAddr TrampolineBlockTargetAddr,
ExecutorAddr ResolverAddr,
unsigned NumTrampolines) const override {
ORCABI::writeTrampolines(TrampolineBlockWorkingMem,
TrampolineBlockTargetAddr, ResolverAddr,
NumTrampolines);
}
void writeIndirectStubsBlock(char *StubsBlockWorkingMem,
ExecutorAddr StubsBlockTargetAddress,
ExecutorAddr PointersBlockTargetAddress,
unsigned NumStubs) const override {
ORCABI::writeIndirectStubsBlock(StubsBlockWorkingMem,
StubsBlockTargetAddress,
PointersBlockTargetAddress, NumStubs);
}
};
} // end namespace detail
template <typename ORCABI>
std::unique_ptr<EPCIndirectionUtils>
EPCIndirectionUtils::CreateWithABI(ExecutorProcessControl &EPC) {
return std::unique_ptr<EPCIndirectionUtils>(new EPCIndirectionUtils(
EPC, std::make_unique<detail::ABISupportImpl<ORCABI>>()));
}
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_EPCINDIRECTIONUTILS_H
PK iwFZ|0�ڷ
�
6 ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.hnu �[��� //===------------ EPCDynamicLibrarySearchGenerator.h ------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Support loading and searching of dynamic libraries in an executor process
// via the ExecutorProcessControl class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_EPCDYNAMICLIBRARYSEARCHGENERATOR_H
#define LLVM_EXECUTIONENGINE_ORC_EPCDYNAMICLIBRARYSEARCHGENERATOR_H
#include "llvm/ADT/FunctionExtras.h"
#include "llvm/ExecutionEngine/Orc/Core.h"
namespace llvm {
namespace orc {
class ExecutorProcessControl;
class EPCDynamicLibrarySearchGenerator : public DefinitionGenerator {
public:
using SymbolPredicate = unique_function<bool(const SymbolStringPtr &)>;
/// Create a DynamicLibrarySearchGenerator that searches for symbols in the
/// library with the given handle.
///
/// If the Allow predicate is given then only symbols matching the predicate
/// will be searched for. If the predicate is not given then all symbols will
/// be searched for.
EPCDynamicLibrarySearchGenerator(ExecutionSession &ES,
tpctypes::DylibHandle H,
SymbolPredicate Allow = SymbolPredicate())
: EPC(ES.getExecutorProcessControl()), H(H), Allow(std::move(Allow)) {}
/// Permanently loads the library at the given path and, on success, returns
/// a DynamicLibrarySearchGenerator that will search it for symbol definitions
/// in the library. On failure returns the reason the library failed to load.
static Expected<std::unique_ptr<EPCDynamicLibrarySearchGenerator>>
Load(ExecutionSession &ES, const char *LibraryPath,
SymbolPredicate Allow = SymbolPredicate());
/// Creates a EPCDynamicLibrarySearchGenerator that searches for symbols in
/// the target process.
static Expected<std::unique_ptr<EPCDynamicLibrarySearchGenerator>>
GetForTargetProcess(ExecutionSession &ES,
SymbolPredicate Allow = SymbolPredicate()) {
return Load(ES, nullptr, std::move(Allow));
}
Error tryToGenerate(LookupState &LS, LookupKind K, JITDylib &JD,
JITDylibLookupFlags JDLookupFlags,
const SymbolLookupSet &Symbols) override;
private:
ExecutorProcessControl &EPC;
tpctypes::DylibHandle H;
SymbolPredicate Allow;
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_EPCDYNAMICLIBRARYSEARCHGENERATOR_H
PK iwFZe ��
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* ExecutionEngine/Orc/COFFVCRuntimeSupport.hnu �[��� //===----- COFFVCRuntimeSupport.h -- VC runtime support in ORC --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Utilities for loading and initializaing vc runtime in Orc.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_COFFCRUNTIMESUPPORT_H
#define LLVM_EXECUTIONENGINE_ORC_COFFCRUNTIMESUPPORT_H
#include "llvm/ADT/StringRef.h"
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/ExecutionEngine/Orc/ExecutorProcessControl.h"
#include "llvm/ExecutionEngine/Orc/ObjectLinkingLayer.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include <future>
#include <memory>
#include <thread>
#include <vector>
namespace llvm {
namespace orc {
/// Bootstraps the vc runtime within jitdylibs.
class COFFVCRuntimeBootstrapper {
public:
/// Try to create a COFFVCRuntimeBootstrapper instance. An optional
/// RuntimePath can be given to specify the location of directory that
/// contains all vc runtime library files such as ucrt.lib and msvcrt.lib. If
/// not path was given, it will try to search the MSVC toolchain and Windows
/// SDK installation and use the found library files automatically.
///
/// Note that depending on the build setting, a different library
/// file must be used. In general, if vc runtime was statically linked to the
/// object file that is to be jit-linked, LoadStaticVCRuntime and
/// InitializeStaticVCRuntime must be used with libcmt.lib, libucrt.lib,
/// libvcruntimelib. If vc runtime was dynamically linked LoadDynamicVCRuntime
/// must be used along with msvcrt.lib, ucrt.lib, vcruntime.lib.
///
/// More information is on:
/// https://docs.microsoft.com/en-us/cpp/c-runtime-library/crt-library-features
static Expected<std::unique_ptr<COFFVCRuntimeBootstrapper>>
Create(ExecutionSession &ES, ObjectLinkingLayer &ObjLinkingLayer,
const char *RuntimePath = nullptr);
/// Adds symbol definitions of static version of msvc runtime libraries.
Expected<std::vector<std::string>>
loadStaticVCRuntime(JITDylib &JD, bool DebugVersion = false);
/// Runs the initializer of static version of msvc runtime libraries.
/// This must be called before calling any functions requiring c runtime (e.g.
/// printf) within the jit session. Note that proper initialization of vc
/// runtime requires ability of running static initializers. Cosider setting
/// up COFFPlatform.
Error initializeStaticVCRuntime(JITDylib &JD);
/// Adds symbol definitions of dynamic versino of msvc runtie libraries.
Expected<std::vector<std::string>>
loadDynamicVCRuntime(JITDylib &JD, bool DebugVersion = false);
private:
COFFVCRuntimeBootstrapper(ExecutionSession &ES,
ObjectLinkingLayer &ObjLinkingLayer,
const char *RuntimePath);
ExecutionSession &ES;
ObjectLinkingLayer &ObjLinkingLayer;
std::string RuntimePath;
struct MSVCToolchainPath {
SmallString<256> VCToolchainLib;
SmallString<256> UCRTSdkLib;
};
static Expected<MSVCToolchainPath> getMSVCToolchainPath();
Error loadVCRuntime(JITDylib &JD, std::vector<std::string> &ImportedLibraries,
ArrayRef<StringRef> VCLibs, ArrayRef<StringRef> UCRTLibs);
};
} // namespace orc
} // namespace llvm
#endif
PK iwFZ�P�\� � - ExecutionEngine/Orc/JITTargetMachineBuilder.hnu �[��� //===- JITTargetMachineBuilder.h - Build TargetMachines for JIT -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// A utitily for building TargetMachines for JITs.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_JITTARGETMACHINEBUILDER_H
#define LLVM_EXECUTIONENGINE_ORC_JITTARGETMACHINEBUILDER_H
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/Error.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/TargetParser/SubtargetFeature.h"
#include "llvm/TargetParser/Triple.h"
#include <memory>
#include <optional>
#include <string>
#include <vector>
namespace llvm {
class raw_ostream;
namespace orc {
/// A utility class for building TargetMachines for JITs.
class JITTargetMachineBuilder {
#ifndef NDEBUG
friend class JITTargetMachineBuilderPrinter;
#endif
public:
/// Create a JITTargetMachineBuilder based on the given triple.
///
/// Note: TargetOptions is default-constructed, then EmulatedTLS is set to
/// true. If EmulatedTLS is not required, these values should be reset before
/// calling createTargetMachine.
JITTargetMachineBuilder(Triple TT);
/// Create a JITTargetMachineBuilder for the host system.
///
/// Note: TargetOptions is default-constructed, then EmulatedTLS is set to
/// true. If EmulatedTLS is not required, these values should be reset before
/// calling createTargetMachine.
static Expected<JITTargetMachineBuilder> detectHost();
/// Create a TargetMachine.
///
/// This operation will fail if the requested target is not registered,
/// in which case see llvm/Support/TargetSelect.h. To JIT IR the Target and
/// the target's AsmPrinter must both be registered. To JIT assembly
/// (including inline and module level assembly) the target's AsmParser must
/// also be registered.
Expected<std::unique_ptr<TargetMachine>> createTargetMachine();
/// Get the default DataLayout for the target.
///
/// Note: This is reasonably expensive, as it creates a temporary
/// TargetMachine instance under the hood. It is only suitable for use during
/// JIT setup.
Expected<DataLayout> getDefaultDataLayoutForTarget() {
auto TM = createTargetMachine();
if (!TM)
return TM.takeError();
return (*TM)->createDataLayout();
}
/// Set the CPU string.
JITTargetMachineBuilder &setCPU(std::string CPU) {
this->CPU = std::move(CPU);
return *this;
}
/// Returns the CPU string.
const std::string &getCPU() const { return CPU; }
/// Set the relocation model.
JITTargetMachineBuilder &setRelocationModel(std::optional<Reloc::Model> RM) {
this->RM = std::move(RM);
return *this;
}
/// Get the relocation model.
const std::optional<Reloc::Model> &getRelocationModel() const { return RM; }
/// Set the code model.
JITTargetMachineBuilder &setCodeModel(std::optional<CodeModel::Model> CM) {
this->CM = std::move(CM);
return *this;
}
/// Get the code model.
const std::optional<CodeModel::Model> &getCodeModel() const { return CM; }
/// Set the LLVM CodeGen optimization level.
JITTargetMachineBuilder &setCodeGenOptLevel(CodeGenOpt::Level OptLevel) {
this->OptLevel = OptLevel;
return *this;
}
/// Set subtarget features.
JITTargetMachineBuilder &setFeatures(StringRef FeatureString) {
Features = SubtargetFeatures(FeatureString);
return *this;
}
/// Add subtarget features.
JITTargetMachineBuilder &
addFeatures(const std::vector<std::string> &FeatureVec);
/// Access subtarget features.
SubtargetFeatures &getFeatures() { return Features; }
/// Access subtarget features.
const SubtargetFeatures &getFeatures() const { return Features; }
/// Set TargetOptions.
///
/// Note: This operation will overwrite any previously configured options,
/// including EmulatedTLS and UseInitArray which the JITTargetMachineBuilder
/// sets by default. Clients are responsible for re-enabling these overwritten
/// options.
JITTargetMachineBuilder &setOptions(TargetOptions Options) {
this->Options = std::move(Options);
return *this;
}
/// Access TargetOptions.
TargetOptions &getOptions() { return Options; }
/// Access TargetOptions.
const TargetOptions &getOptions() const { return Options; }
/// Access Triple.
Triple &getTargetTriple() { return TT; }
/// Access Triple.
const Triple &getTargetTriple() const { return TT; }
private:
Triple TT;
std::string CPU;
SubtargetFeatures Features;
TargetOptions Options;
std::optional<Reloc::Model> RM;
std::optional<CodeModel::Model> CM;
CodeGenOpt::Level OptLevel = CodeGenOpt::Default;
};
#ifndef NDEBUG
class JITTargetMachineBuilderPrinter {
public:
JITTargetMachineBuilderPrinter(JITTargetMachineBuilder &JTMB,
StringRef Indent)
: JTMB(JTMB), Indent(Indent) {}
void print(raw_ostream &OS) const;
friend raw_ostream &operator<<(raw_ostream &OS,
const JITTargetMachineBuilderPrinter &JTMBP) {
JTMBP.print(OS);
return OS;
}
private:
JITTargetMachineBuilder &JTMB;
StringRef Indent;
};
#endif // NDEBUG
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_JITTARGETMACHINEBUILDER_H
PK iwFZv}J J ) ExecutionEngine/Orc/EPCEHFrameRegistrar.hnu �[��� //===-- EPCEHFrameRegistrar.h - EPC based eh-frame registration -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// ExecutorProcessControl based eh-frame registration.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_EPCEHFRAMEREGISTRAR_H
#define LLVM_EXECUTIONENGINE_ORC_EPCEHFRAMEREGISTRAR_H
#include "llvm/ExecutionEngine/JITLink/EHFrameSupport.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
namespace llvm {
namespace orc {
class ExecutionSession;
/// Register/Deregisters EH frames in a remote process via a
/// ExecutorProcessControl instance.
class EPCEHFrameRegistrar : public jitlink::EHFrameRegistrar {
public:
/// Create from a ExecutorProcessControl instance alone. This will use
/// the EPC's lookupSymbols method to find the registration/deregistration
/// function addresses by name.
///
/// If RegistrationFunctionsDylib is non-None then it will be searched to
/// find the registration functions. If it is None then the process dylib
/// will be loaded to find the registration functions.
static Expected<std::unique_ptr<EPCEHFrameRegistrar>>
Create(ExecutionSession &ES,
std::optional<ExecutorAddr> RegistrationFunctionsDylib = std::nullopt);
/// Create a EPCEHFrameRegistrar with the given ExecutorProcessControl
/// object and registration/deregistration function addresses.
EPCEHFrameRegistrar(ExecutionSession &ES,
ExecutorAddr RegisterEHFrameWrapperFnAddr,
ExecutorAddr DeregisterEHFRameWrapperFnAddr)
: ES(ES), RegisterEHFrameWrapperFnAddr(RegisterEHFrameWrapperFnAddr),
DeregisterEHFrameWrapperFnAddr(DeregisterEHFRameWrapperFnAddr) {}
Error registerEHFrames(ExecutorAddrRange EHFrameSection) override;
Error deregisterEHFrames(ExecutorAddrRange EHFrameSection) override;
private:
ExecutionSession &ES;
ExecutorAddr RegisterEHFrameWrapperFnAddr;
ExecutorAddr DeregisterEHFrameWrapperFnAddr;
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_EPCEHFRAMEREGISTRAR_H
PK iwFZ��RU� � . ExecutionEngine/Orc/RTDyldObjectLinkingLayer.hnu �[��� //===- RTDyldObjectLinkingLayer.h - RTDyld-based jit linking ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Contains the definition for an RTDyld-based, in-process object linking layer.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_RTDYLDOBJECTLINKINGLAYER_H
#define LLVM_EXECUTIONENGINE_ORC_RTDYLDOBJECTLINKINGLAYER_H
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ExecutionEngine/JITEventListener.h"
#include "llvm/ExecutionEngine/JITSymbol.h"
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/ExecutionEngine/Orc/Layer.h"
#include "llvm/ExecutionEngine/RuntimeDyld.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/Support/Error.h"
#include <algorithm>
#include <cassert>
#include <functional>
#include <list>
#include <memory>
#include <utility>
#include <vector>
namespace llvm {
namespace orc {
class RTDyldObjectLinkingLayer
: public RTTIExtends<RTDyldObjectLinkingLayer, ObjectLayer>,
private ResourceManager {
public:
static char ID;
/// Functor for receiving object-loaded notifications.
using NotifyLoadedFunction = std::function<void(
MaterializationResponsibility &R, const object::ObjectFile &Obj,
const RuntimeDyld::LoadedObjectInfo &)>;
/// Functor for receiving finalization notifications.
using NotifyEmittedFunction = std::function<void(
MaterializationResponsibility &R, std::unique_ptr<MemoryBuffer>)>;
using GetMemoryManagerFunction =
unique_function<std::unique_ptr<RuntimeDyld::MemoryManager>()>;
/// Construct an ObjectLinkingLayer with the given NotifyLoaded,
/// and NotifyEmitted functors.
RTDyldObjectLinkingLayer(ExecutionSession &ES,
GetMemoryManagerFunction GetMemoryManager);
~RTDyldObjectLinkingLayer();
/// Emit the object.
void emit(std::unique_ptr<MaterializationResponsibility> R,
std::unique_ptr<MemoryBuffer> O) override;
/// Set the NotifyLoaded callback.
RTDyldObjectLinkingLayer &setNotifyLoaded(NotifyLoadedFunction NotifyLoaded) {
this->NotifyLoaded = std::move(NotifyLoaded);
return *this;
}
/// Set the NotifyEmitted callback.
RTDyldObjectLinkingLayer &
setNotifyEmitted(NotifyEmittedFunction NotifyEmitted) {
this->NotifyEmitted = std::move(NotifyEmitted);
return *this;
}
/// Set the 'ProcessAllSections' flag.
///
/// If set to true, all sections in each object file will be allocated using
/// the memory manager, rather than just the sections required for execution.
///
/// This is kludgy, and may be removed in the future.
RTDyldObjectLinkingLayer &setProcessAllSections(bool ProcessAllSections) {
this->ProcessAllSections = ProcessAllSections;
return *this;
}
/// Instructs this RTDyldLinkingLayer2 instance to override the symbol flags
/// returned by RuntimeDyld for any given object file with the flags supplied
/// by the MaterializationResponsibility instance. This is a workaround to
/// support symbol visibility in COFF, which does not use the libObject's
/// SF_Exported flag. Use only when generating / adding COFF object files.
///
/// FIXME: We should be able to remove this if/when COFF properly tracks
/// exported symbols.
RTDyldObjectLinkingLayer &
setOverrideObjectFlagsWithResponsibilityFlags(bool OverrideObjectFlags) {
this->OverrideObjectFlags = OverrideObjectFlags;
return *this;
}
/// If set, this RTDyldObjectLinkingLayer instance will claim responsibility
/// for any symbols provided by a given object file that were not already in
/// the MaterializationResponsibility instance. Setting this flag allows
/// higher-level program representations (e.g. LLVM IR) to be added based on
/// only a subset of the symbols they provide, without having to write
/// intervening layers to scan and add the additional symbols. This trades
/// diagnostic quality for convenience however: If all symbols are enumerated
/// up-front then clashes can be detected and reported early (and usually
/// deterministically). If this option is set, clashes for the additional
/// symbols may not be detected until late, and detection may depend on
/// the flow of control through JIT'd code. Use with care.
RTDyldObjectLinkingLayer &
setAutoClaimResponsibilityForObjectSymbols(bool AutoClaimObjectSymbols) {
this->AutoClaimObjectSymbols = AutoClaimObjectSymbols;
return *this;
}
/// Register a JITEventListener.
void registerJITEventListener(JITEventListener &L);
/// Unregister a JITEventListener.
void unregisterJITEventListener(JITEventListener &L);
private:
using MemoryManagerUP = std::unique_ptr<RuntimeDyld::MemoryManager>;
Error onObjLoad(MaterializationResponsibility &R,
const object::ObjectFile &Obj,
RuntimeDyld::MemoryManager &MemMgr,
RuntimeDyld::LoadedObjectInfo &LoadedObjInfo,
std::map<StringRef, JITEvaluatedSymbol> Resolved,
std::set<StringRef> &InternalSymbols);
void onObjEmit(MaterializationResponsibility &R,
object::OwningBinary<object::ObjectFile> O,
std::unique_ptr<RuntimeDyld::MemoryManager> MemMgr,
std::unique_ptr<RuntimeDyld::LoadedObjectInfo> LoadedObjInfo,
Error Err);
Error handleRemoveResources(JITDylib &JD, ResourceKey K) override;
void handleTransferResources(JITDylib &JD, ResourceKey DstKey,
ResourceKey SrcKey) override;
mutable std::mutex RTDyldLayerMutex;
GetMemoryManagerFunction GetMemoryManager;
NotifyLoadedFunction NotifyLoaded;
NotifyEmittedFunction NotifyEmitted;
bool ProcessAllSections = false;
bool OverrideObjectFlags = false;
bool AutoClaimObjectSymbols = false;
DenseMap<ResourceKey, std::vector<MemoryManagerUP>> MemMgrs;
std::vector<JITEventListener *> EventListeners;
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_RTDYLDOBJECTLINKINGLAYER_H
PK iwFZ �+-? ? % ExecutionEngine/Orc/Shared/OrcError.hnu �[��� //===--------------- OrcError.h - Orc Error Types ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Define an error category, error codes, and helper utilities for Orc.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_SHARED_ORCERROR_H
#define LLVM_EXECUTIONENGINE_ORC_SHARED_ORCERROR_H
#include "llvm/Support/Error.h"
#include "llvm/Support/raw_ostream.h"
#include <string>
#include <system_error>
namespace llvm {
namespace orc {
enum class OrcErrorCode : int {
// RPC Errors
UnknownORCError = 1,
DuplicateDefinition,
JITSymbolNotFound,
RemoteAllocatorDoesNotExist,
RemoteAllocatorIdAlreadyInUse,
RemoteMProtectAddrUnrecognized,
RemoteIndirectStubsOwnerDoesNotExist,
RemoteIndirectStubsOwnerIdAlreadyInUse,
RPCConnectionClosed,
RPCCouldNotNegotiateFunction,
RPCResponseAbandoned,
UnexpectedRPCCall,
UnexpectedRPCResponse,
UnknownErrorCodeFromRemote,
UnknownResourceHandle,
MissingSymbolDefinitions,
UnexpectedSymbolDefinitions,
};
std::error_code orcError(OrcErrorCode ErrCode);
class DuplicateDefinition : public ErrorInfo<DuplicateDefinition> {
public:
static char ID;
DuplicateDefinition(std::string SymbolName);
std::error_code convertToErrorCode() const override;
void log(raw_ostream &OS) const override;
const std::string &getSymbolName() const;
private:
std::string SymbolName;
};
class JITSymbolNotFound : public ErrorInfo<JITSymbolNotFound> {
public:
static char ID;
JITSymbolNotFound(std::string SymbolName);
std::error_code convertToErrorCode() const override;
void log(raw_ostream &OS) const override;
const std::string &getSymbolName() const;
private:
std::string SymbolName;
};
} // End namespace orc.
} // End namespace llvm.
#endif // LLVM_EXECUTIONENGINE_ORC_SHARED_ORCERROR_H
PK iwFZ"�#�� � . ExecutionEngine/Orc/Shared/ExecutorSymbolDef.hnu �[��� //===--------- ExecutorSymbolDef.h - (Addr, Flags) pair ---------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Represents a defining location for a JIT symbol.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_SHARED_EXECUTORSYMBOLDEF_H
#define LLVM_EXECUTIONENGINE_ORC_SHARED_EXECUTORSYMBOLDEF_H
#include "llvm/ExecutionEngine/JITSymbol.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
namespace llvm {
namespace orc {
/// Represents a defining location for a JIT symbol.
class ExecutorSymbolDef {
public:
ExecutorSymbolDef() = default;
ExecutorSymbolDef(ExecutorAddr Addr, JITSymbolFlags Flags)
: Addr(Addr), Flags(Flags) {}
const ExecutorAddr &getAddress() const { return Addr; }
const JITSymbolFlags &getFlags() const { return Flags; }
void setFlags(JITSymbolFlags Flags) { this->Flags = Flags; }
friend bool operator==(const ExecutorSymbolDef &LHS,
const ExecutorSymbolDef &RHS) {
return LHS.getAddress() == RHS.getAddress() &&
LHS.getFlags() == RHS.getFlags();
}
friend bool operator!=(const ExecutorSymbolDef &LHS,
const ExecutorSymbolDef &RHS) {
return !(LHS == RHS);
}
private:
ExecutorAddr Addr;
JITSymbolFlags Flags;
};
} // End namespace orc.
} // End namespace llvm.
#endif // LLVM_EXECUTIONENGINE_ORC_SHARED_EXECUTORSYMBOLDEF_H
PK iwFZU�B�s s . ExecutionEngine/Orc/Shared/AllocationActions.hnu �[��� //===- AllocationActions.h -- JITLink allocation support calls -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Structures for making memory allocation support calls.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_SHARED_ALLOCATIONACTIONS_H
#define LLVM_EXECUTIONENGINE_ORC_SHARED_ALLOCATIONACTIONS_H
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include "llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h"
#include "llvm/Support/Memory.h"
#include <vector>
namespace llvm {
namespace orc {
namespace shared {
/// A pair of WrapperFunctionCalls, one to be run at finalization time, one to
/// be run at deallocation time.
///
/// AllocActionCallPairs should be constructed for paired operations (e.g.
/// __register_ehframe and __deregister_ehframe for eh-frame registration).
/// See comments for AllocActions for execution ordering.
///
/// For unpaired operations one or the other member can be left unused, as
/// AllocationActionCalls with an FnAddr of zero will be skipped.
struct AllocActionCallPair {
WrapperFunctionCall Finalize;
WrapperFunctionCall Dealloc;
};
/// A vector of allocation actions to be run for this allocation.
///
/// Finalize allocations will be run in order at finalize time. Dealloc
/// actions will be run in reverse order at deallocation time.
using AllocActions = std::vector<AllocActionCallPair>;
/// Returns the number of deallocaton actions in the given AllocActions array.
///
/// This can be useful if clients want to pre-allocate room for deallocation
/// actions with the rest of their memory.
inline size_t numDeallocActions(const AllocActions &AAs) {
return llvm::count_if(
AAs, [](const AllocActionCallPair &P) { return !!P.Dealloc; });
}
/// Run finalize actions.
///
/// If any finalize action fails then the corresponding dealloc actions will be
/// run in reverse order (not including the deallocation action for the failed
/// finalize action), and the error for the failing action will be returned.
///
/// If all finalize actions succeed then a vector of deallocation actions will
/// be returned. The dealloc actions should be run by calling
/// runDeallocationActions. If this function succeeds then the AA argument will
/// be cleared before the function returns.
Expected<std::vector<WrapperFunctionCall>>
runFinalizeActions(AllocActions &AAs);
/// Run deallocation actions.
/// Dealloc actions will be run in reverse order (from last element of DAs to
/// first).
Error runDeallocActions(ArrayRef<WrapperFunctionCall> DAs);
using SPSAllocActionCallPair =
SPSTuple<SPSWrapperFunctionCall, SPSWrapperFunctionCall>;
template <>
class SPSSerializationTraits<SPSAllocActionCallPair,
AllocActionCallPair> {
using AL = SPSAllocActionCallPair::AsArgList;
public:
static size_t size(const AllocActionCallPair &AAP) {
return AL::size(AAP.Finalize, AAP.Dealloc);
}
static bool serialize(SPSOutputBuffer &OB,
const AllocActionCallPair &AAP) {
return AL::serialize(OB, AAP.Finalize, AAP.Dealloc);
}
static bool deserialize(SPSInputBuffer &IB,
AllocActionCallPair &AAP) {
return AL::deserialize(IB, AAP.Finalize, AAP.Dealloc);
}
};
} // end namespace shared
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_SHARED_ALLOCATIONACTIONS_H
PK iwFZ���+�a �a 6 ExecutionEngine/Orc/Shared/SimplePackedSerialization.hnu �[��� //===---- SimplePackedSerialization.h - simple serialization ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// The behavior of the utilities in this header must be synchronized with the
// behavior of the utilities in
// compiler-rt/lib/orc/simple_packed_serialization.h.
//
// The Simple Packed Serialization (SPS) utilities are used to generate
// argument and return buffers for wrapper functions using the following
// serialization scheme:
//
// Primitives (signed types should be two's complement):
// bool, char, int8_t, uint8_t -- 8-bit (0=false, 1=true)
// int16_t, uint16_t -- 16-bit little endian
// int32_t, uint32_t -- 32-bit little endian
// int64_t, int64_t -- 64-bit little endian
//
// Sequence<T>:
// Serialized as the sequence length (as a uint64_t) followed by the
// serialization of each of the elements without padding.
//
// Tuple<T1, ..., TN>:
// Serialized as each of the element types from T1 to TN without padding.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_SHARED_SIMPLEPACKEDSERIALIZATION_H
#define LLVM_EXECUTIONENGINE_ORC_SHARED_SIMPLEPACKEDSERIALIZATION_H
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/SwapByteOrder.h"
#include <limits>
#include <optional>
#include <string>
#include <tuple>
#include <type_traits>
#include <utility>
#include <vector>
namespace llvm {
namespace orc {
namespace shared {
/// Output char buffer with overflow check.
class SPSOutputBuffer {
public:
SPSOutputBuffer(char *Buffer, size_t Remaining)
: Buffer(Buffer), Remaining(Remaining) {}
bool write(const char *Data, size_t Size) {
assert(Data && "Data must not be null");
if (Size > Remaining)
return false;
memcpy(Buffer, Data, Size);
Buffer += Size;
Remaining -= Size;
return true;
}
private:
char *Buffer = nullptr;
size_t Remaining = 0;
};
/// Input char buffer with underflow check.
class SPSInputBuffer {
public:
SPSInputBuffer() = default;
SPSInputBuffer(const char *Buffer, size_t Remaining)
: Buffer(Buffer), Remaining(Remaining) {}
bool read(char *Data, size_t Size) {
if (Size > Remaining)
return false;
memcpy(Data, Buffer, Size);
Buffer += Size;
Remaining -= Size;
return true;
}
const char *data() const { return Buffer; }
bool skip(size_t Size) {
if (Size > Remaining)
return false;
Buffer += Size;
Remaining -= Size;
return true;
}
private:
const char *Buffer = nullptr;
size_t Remaining = 0;
};
/// Specialize to describe how to serialize/deserialize to/from the given
/// concrete type.
template <typename SPSTagT, typename ConcreteT, typename _ = void>
class SPSSerializationTraits;
/// A utility class for serializing to a blob from a variadic list.
template <typename... ArgTs> class SPSArgList;
// Empty list specialization for SPSArgList.
template <> class SPSArgList<> {
public:
static size_t size() { return 0; }
static bool serialize(SPSOutputBuffer &OB) { return true; }
static bool deserialize(SPSInputBuffer &IB) { return true; }
static bool serializeToSmallVector(SmallVectorImpl<char> &V) { return true; }
static bool deserializeFromSmallVector(const SmallVectorImpl<char> &V) {
return true;
}
};
// Non-empty list specialization for SPSArgList.
template <typename SPSTagT, typename... SPSTagTs>
class SPSArgList<SPSTagT, SPSTagTs...> {
public:
// FIXME: This typedef is here to enable SPS arg serialization from
// JITLink. It can be removed once JITLink can access SPS directly.
using OutputBuffer = SPSOutputBuffer;
template <typename ArgT, typename... ArgTs>
static size_t size(const ArgT &Arg, const ArgTs &...Args) {
return SPSSerializationTraits<SPSTagT, ArgT>::size(Arg) +
SPSArgList<SPSTagTs...>::size(Args...);
}
template <typename ArgT, typename... ArgTs>
static bool serialize(SPSOutputBuffer &OB, const ArgT &Arg,
const ArgTs &...Args) {
return SPSSerializationTraits<SPSTagT, ArgT>::serialize(OB, Arg) &&
SPSArgList<SPSTagTs...>::serialize(OB, Args...);
}
template <typename ArgT, typename... ArgTs>
static bool deserialize(SPSInputBuffer &IB, ArgT &Arg, ArgTs &...Args) {
return SPSSerializationTraits<SPSTagT, ArgT>::deserialize(IB, Arg) &&
SPSArgList<SPSTagTs...>::deserialize(IB, Args...);
}
};
/// SPS serialization for integral types, bool, and char.
template <typename SPSTagT>
class SPSSerializationTraits<
SPSTagT, SPSTagT,
std::enable_if_t<std::is_same<SPSTagT, bool>::value ||
std::is_same<SPSTagT, char>::value ||
std::is_same<SPSTagT, int8_t>::value ||
std::is_same<SPSTagT, int16_t>::value ||
std::is_same<SPSTagT, int32_t>::value ||
std::is_same<SPSTagT, int64_t>::value ||
std::is_same<SPSTagT, uint8_t>::value ||
std::is_same<SPSTagT, uint16_t>::value ||
std::is_same<SPSTagT, uint32_t>::value ||
std::is_same<SPSTagT, uint64_t>::value>> {
public:
static size_t size(const SPSTagT &Value) { return sizeof(SPSTagT); }
static bool serialize(SPSOutputBuffer &OB, const SPSTagT &Value) {
SPSTagT Tmp = Value;
if (sys::IsBigEndianHost)
sys::swapByteOrder(Tmp);
return OB.write(reinterpret_cast<const char *>(&Tmp), sizeof(Tmp));
}
static bool deserialize(SPSInputBuffer &IB, SPSTagT &Value) {
SPSTagT Tmp;
if (!IB.read(reinterpret_cast<char *>(&Tmp), sizeof(Tmp)))
return false;
if (sys::IsBigEndianHost)
sys::swapByteOrder(Tmp);
Value = Tmp;
return true;
}
};
// Any empty placeholder suitable as a substitute for void when deserializing
class SPSEmpty {};
/// SPS tag type for tuples.
///
/// A blob tuple should be serialized by serializing each of the elements in
/// sequence.
template <typename... SPSTagTs> class SPSTuple {
public:
/// Convenience typedef of the corresponding arg list.
typedef SPSArgList<SPSTagTs...> AsArgList;
};
/// SPS tag type for optionals.
///
/// SPSOptionals should be serialized as a bool with true indicating that an
/// SPSTagT value is present, and false indicating that there is no value.
/// If the boolean is true then the serialized SPSTagT will follow immediately
/// after it.
template <typename SPSTagT> class SPSOptional {};
/// SPS tag type for sequences.
///
/// SPSSequences should be serialized as a uint64_t sequence length,
/// followed by the serialization of each of the elements.
template <typename SPSElementTagT> class SPSSequence;
/// SPS tag type for strings, which are equivalent to sequences of chars.
using SPSString = SPSSequence<char>;
/// SPS tag type for maps.
///
/// SPS maps are just sequences of (Key, Value) tuples.
template <typename SPSTagT1, typename SPSTagT2>
using SPSMap = SPSSequence<SPSTuple<SPSTagT1, SPSTagT2>>;
/// Serialization for SPSEmpty type.
template <> class SPSSerializationTraits<SPSEmpty, SPSEmpty> {
public:
static size_t size(const SPSEmpty &EP) { return 0; }
static bool serialize(SPSOutputBuffer &OB, const SPSEmpty &BE) {
return true;
}
static bool deserialize(SPSInputBuffer &IB, SPSEmpty &BE) { return true; }
};
/// Specialize this to implement 'trivial' sequence serialization for
/// a concrete sequence type.
///
/// Trivial sequence serialization uses the sequence's 'size' member to get the
/// length of the sequence, and uses a range-based for loop to iterate over the
/// elements.
///
/// Specializing this template class means that you do not need to provide a
/// specialization of SPSSerializationTraits for your type.
template <typename SPSElementTagT, typename ConcreteSequenceT>
class TrivialSPSSequenceSerialization {
public:
static constexpr bool available = false;
};
/// Specialize this to implement 'trivial' sequence deserialization for
/// a concrete sequence type.
///
/// Trivial deserialization calls a static 'reserve(SequenceT&)' method on your
/// specialization (you must implement this) to reserve space, and then calls
/// a static 'append(SequenceT&, ElementT&) method to append each of the
/// deserialized elements.
///
/// Specializing this template class means that you do not need to provide a
/// specialization of SPSSerializationTraits for your type.
template <typename SPSElementTagT, typename ConcreteSequenceT>
class TrivialSPSSequenceDeserialization {
public:
static constexpr bool available = false;
};
/// Trivial std::string -> SPSSequence<char> serialization.
template <> class TrivialSPSSequenceSerialization<char, std::string> {
public:
static constexpr bool available = true;
};
/// Trivial SPSSequence<char> -> std::string deserialization.
template <> class TrivialSPSSequenceDeserialization<char, std::string> {
public:
static constexpr bool available = true;
using element_type = char;
static void reserve(std::string &S, uint64_t Size) { S.reserve(Size); }
static bool append(std::string &S, char C) {
S.push_back(C);
return true;
}
};
/// Trivial std::vector<T> -> SPSSequence<SPSElementTagT> serialization.
template <typename SPSElementTagT, typename T>
class TrivialSPSSequenceSerialization<SPSElementTagT, std::vector<T>> {
public:
static constexpr bool available = true;
};
/// Trivial SPSSequence<SPSElementTagT> -> std::vector<T> deserialization.
template <typename SPSElementTagT, typename T>
class TrivialSPSSequenceDeserialization<SPSElementTagT, std::vector<T>> {
public:
static constexpr bool available = true;
using element_type = typename std::vector<T>::value_type;
static void reserve(std::vector<T> &V, uint64_t Size) { V.reserve(Size); }
static bool append(std::vector<T> &V, T E) {
V.push_back(std::move(E));
return true;
}
};
/// Trivial SmallVectorImpl<T> -> SPSSequence<char> serialization.
template <typename SPSElementTagT, typename T>
class TrivialSPSSequenceSerialization<SPSElementTagT, SmallVectorImpl<T>> {
public:
static constexpr bool available = true;
};
/// Trivial SPSSequence<SPSElementTagT> -> SmallVectorImpl<T> deserialization.
template <typename SPSElementTagT, typename T>
class TrivialSPSSequenceDeserialization<SPSElementTagT, SmallVectorImpl<T>> {
public:
static constexpr bool available = true;
using element_type = typename SmallVectorImpl<T>::value_type;
static void reserve(SmallVectorImpl<T> &V, uint64_t Size) { V.reserve(Size); }
static bool append(SmallVectorImpl<T> &V, T E) {
V.push_back(std::move(E));
return true;
}
};
/// Trivial SmallVectorImpl<T> -> SPSSequence<char> serialization.
template <typename SPSElementTagT, typename T, unsigned N>
class TrivialSPSSequenceSerialization<SPSElementTagT, SmallVector<T, N>>
: public TrivialSPSSequenceSerialization<SPSElementTagT,
SmallVectorImpl<T>> {};
/// Trivial SPSSequence<SPSElementTagT> -> SmallVectorImpl<T> deserialization.
template <typename SPSElementTagT, typename T, unsigned N>
class TrivialSPSSequenceDeserialization<SPSElementTagT, SmallVector<T, N>>
: public TrivialSPSSequenceDeserialization<SPSElementTagT,
SmallVectorImpl<T>> {};
/// Trivial ArrayRef<T> -> SPSSequence<SPSElementTagT> serialization.
template <typename SPSElementTagT, typename T>
class TrivialSPSSequenceSerialization<SPSElementTagT, ArrayRef<T>> {
public:
static constexpr bool available = true;
};
/// Specialized SPSSequence<char> -> ArrayRef<char> serialization.
///
/// On deserialize, points directly into the input buffer.
template <> class SPSSerializationTraits<SPSSequence<char>, ArrayRef<char>> {
public:
static size_t size(const ArrayRef<char> &A) {
return SPSArgList<uint64_t>::size(static_cast<uint64_t>(A.size())) +
A.size();
}
static bool serialize(SPSOutputBuffer &OB, const ArrayRef<char> &A) {
if (!SPSArgList<uint64_t>::serialize(OB, static_cast<uint64_t>(A.size())))
return false;
if (A.empty()) // Empty ArrayRef may have null data, so bail out early.
return true;
return OB.write(A.data(), A.size());
}
static bool deserialize(SPSInputBuffer &IB, ArrayRef<char> &A) {
uint64_t Size;
if (!SPSArgList<uint64_t>::deserialize(IB, Size))
return false;
if (Size > std::numeric_limits<size_t>::max())
return false;
A = {Size ? IB.data() : nullptr, static_cast<size_t>(Size)};
return IB.skip(Size);
}
};
/// 'Trivial' sequence serialization: Sequence is serialized as a uint64_t size
/// followed by a for-earch loop over the elements of the sequence to serialize
/// each of them.
template <typename SPSElementTagT, typename SequenceT>
class SPSSerializationTraits<SPSSequence<SPSElementTagT>, SequenceT,
std::enable_if_t<TrivialSPSSequenceSerialization<
SPSElementTagT, SequenceT>::available>> {
public:
static size_t size(const SequenceT &S) {
size_t Size = SPSArgList<uint64_t>::size(static_cast<uint64_t>(S.size()));
for (const auto &E : S)
Size += SPSArgList<SPSElementTagT>::size(E);
return Size;
}
static bool serialize(SPSOutputBuffer &OB, const SequenceT &S) {
if (!SPSArgList<uint64_t>::serialize(OB, static_cast<uint64_t>(S.size())))
return false;
for (const auto &E : S)
if (!SPSArgList<SPSElementTagT>::serialize(OB, E))
return false;
return true;
}
static bool deserialize(SPSInputBuffer &IB, SequenceT &S) {
using TBSD = TrivialSPSSequenceDeserialization<SPSElementTagT, SequenceT>;
uint64_t Size;
if (!SPSArgList<uint64_t>::deserialize(IB, Size))
return false;
TBSD::reserve(S, Size);
for (size_t I = 0; I != Size; ++I) {
typename TBSD::element_type E;
if (!SPSArgList<SPSElementTagT>::deserialize(IB, E))
return false;
if (!TBSD::append(S, std::move(E)))
return false;
}
return true;
}
};
/// SPSTuple serialization for std::tuple.
template <typename... SPSTagTs, typename... Ts>
class SPSSerializationTraits<SPSTuple<SPSTagTs...>, std::tuple<Ts...>> {
private:
using TupleArgList = typename SPSTuple<SPSTagTs...>::AsArgList;
using ArgIndices = std::make_index_sequence<sizeof...(Ts)>;
template <std::size_t... I>
static size_t size(const std::tuple<Ts...> &T, std::index_sequence<I...>) {
return TupleArgList::size(std::get<I>(T)...);
}
template <std::size_t... I>
static bool serialize(SPSOutputBuffer &OB, const std::tuple<Ts...> &T,
std::index_sequence<I...>) {
return TupleArgList::serialize(OB, std::get<I>(T)...);
}
template <std::size_t... I>
static bool deserialize(SPSInputBuffer &IB, std::tuple<Ts...> &T,
std::index_sequence<I...>) {
return TupleArgList::deserialize(IB, std::get<I>(T)...);
}
public:
static size_t size(const std::tuple<Ts...> &T) {
return size(T, ArgIndices{});
}
static bool serialize(SPSOutputBuffer &OB, const std::tuple<Ts...> &T) {
return serialize(OB, T, ArgIndices{});
}
static bool deserialize(SPSInputBuffer &IB, std::tuple<Ts...> &T) {
return deserialize(IB, T, ArgIndices{});
}
};
/// SPSTuple serialization for std::pair.
template <typename SPSTagT1, typename SPSTagT2, typename T1, typename T2>
class SPSSerializationTraits<SPSTuple<SPSTagT1, SPSTagT2>, std::pair<T1, T2>> {
public:
static size_t size(const std::pair<T1, T2> &P) {
return SPSArgList<SPSTagT1>::size(P.first) +
SPSArgList<SPSTagT2>::size(P.second);
}
static bool serialize(SPSOutputBuffer &OB, const std::pair<T1, T2> &P) {
return SPSArgList<SPSTagT1>::serialize(OB, P.first) &&
SPSArgList<SPSTagT2>::serialize(OB, P.second);
}
static bool deserialize(SPSInputBuffer &IB, std::pair<T1, T2> &P) {
return SPSArgList<SPSTagT1>::deserialize(IB, P.first) &&
SPSArgList<SPSTagT2>::deserialize(IB, P.second);
}
};
/// SPSOptional serialization for std::optional.
template <typename SPSTagT, typename T>
class SPSSerializationTraits<SPSOptional<SPSTagT>, std::optional<T>> {
public:
static size_t size(const std::optional<T> &Value) {
size_t Size = SPSArgList<bool>::size(!!Value);
if (Value)
Size += SPSArgList<SPSTagT>::size(*Value);
return Size;
}
static bool serialize(SPSOutputBuffer &OB, const std::optional<T> &Value) {
if (!SPSArgList<bool>::serialize(OB, !!Value))
return false;
if (Value)
return SPSArgList<SPSTagT>::serialize(OB, *Value);
return true;
}
static bool deserialize(SPSInputBuffer &IB, std::optional<T> &Value) {
bool HasValue;
if (!SPSArgList<bool>::deserialize(IB, HasValue))
return false;
if (HasValue) {
Value = T();
return SPSArgList<SPSTagT>::deserialize(IB, *Value);
} else
Value = std::optional<T>();
return true;
}
};
/// Serialization for StringRefs.
///
/// Serialization is as for regular strings. Deserialization points directly
/// into the blob.
template <> class SPSSerializationTraits<SPSString, StringRef> {
public:
static size_t size(const StringRef &S) {
return SPSArgList<uint64_t>::size(static_cast<uint64_t>(S.size())) +
S.size();
}
static bool serialize(SPSOutputBuffer &OB, StringRef S) {
if (!SPSArgList<uint64_t>::serialize(OB, static_cast<uint64_t>(S.size())))
return false;
if (S.empty()) // Empty StringRef may have null data, so bail out early.
return true;
return OB.write(S.data(), S.size());
}
static bool deserialize(SPSInputBuffer &IB, StringRef &S) {
const char *Data = nullptr;
uint64_t Size;
if (!SPSArgList<uint64_t>::deserialize(IB, Size))
return false;
Data = IB.data();
if (!IB.skip(Size))
return false;
S = StringRef(Size ? Data : nullptr, Size);
return true;
}
};
/// Serialization for StringMap<ValueT>s.
template <typename SPSValueT, typename ValueT>
class SPSSerializationTraits<SPSSequence<SPSTuple<SPSString, SPSValueT>>,
StringMap<ValueT>> {
public:
static size_t size(const StringMap<ValueT> &M) {
size_t Sz = SPSArgList<uint64_t>::size(static_cast<uint64_t>(M.size()));
for (auto &E : M)
Sz += SPSArgList<SPSString, SPSValueT>::size(E.first(), E.second);
return Sz;
}
static bool serialize(SPSOutputBuffer &OB, const StringMap<ValueT> &M) {
if (!SPSArgList<uint64_t>::serialize(OB, static_cast<uint64_t>(M.size())))
return false;
for (auto &E : M)
if (!SPSArgList<SPSString, SPSValueT>::serialize(OB, E.first(), E.second))
return false;
return true;
}
static bool deserialize(SPSInputBuffer &IB, StringMap<ValueT> &M) {
uint64_t Size;
assert(M.empty() && "M already contains elements");
if (!SPSArgList<uint64_t>::deserialize(IB, Size))
return false;
while (Size--) {
StringRef S;
ValueT V;
if (!SPSArgList<SPSString, SPSValueT>::deserialize(IB, S, V))
return false;
if (!M.insert(std::make_pair(S, V)).second)
return false;
}
return true;
}
};
/// SPS tag type for errors.
class SPSError;
/// SPS tag type for expecteds, which are either a T or a string representing
/// an error.
template <typename SPSTagT> class SPSExpected;
namespace detail {
/// Helper type for serializing Errors.
///
/// llvm::Errors are move-only, and not inspectable except by consuming them.
/// This makes them unsuitable for direct serialization via
/// SPSSerializationTraits, which needs to inspect values twice (once to
/// determine the amount of space to reserve, and then again to serialize).
///
/// The SPSSerializableError type is a helper that can be
/// constructed from an llvm::Error, but inspected more than once.
struct SPSSerializableError {
bool HasError = false;
std::string ErrMsg;
};
/// Helper type for serializing Expected<T>s.
///
/// See SPSSerializableError for more details.
///
// FIXME: Use std::variant for storage once we have c++17.
template <typename T> struct SPSSerializableExpected {
bool HasValue = false;
T Value{};
std::string ErrMsg;
};
inline SPSSerializableError toSPSSerializable(Error Err) {
if (Err)
return {true, toString(std::move(Err))};
return {false, {}};
}
inline Error fromSPSSerializable(SPSSerializableError BSE) {
if (BSE.HasError)
return make_error<StringError>(BSE.ErrMsg, inconvertibleErrorCode());
return Error::success();
}
template <typename T>
SPSSerializableExpected<T> toSPSSerializable(Expected<T> E) {
if (E)
return {true, std::move(*E), {}};
else
return {false, T(), toString(E.takeError())};
}
template <typename T>
Expected<T> fromSPSSerializable(SPSSerializableExpected<T> BSE) {
if (BSE.HasValue)
return std::move(BSE.Value);
else
return make_error<StringError>(BSE.ErrMsg, inconvertibleErrorCode());
}
} // end namespace detail
/// Serialize to a SPSError from a detail::SPSSerializableError.
template <>
class SPSSerializationTraits<SPSError, detail::SPSSerializableError> {
public:
static size_t size(const detail::SPSSerializableError &BSE) {
size_t Size = SPSArgList<bool>::size(BSE.HasError);
if (BSE.HasError)
Size += SPSArgList<SPSString>::size(BSE.ErrMsg);
return Size;
}
static bool serialize(SPSOutputBuffer &OB,
const detail::SPSSerializableError &BSE) {
if (!SPSArgList<bool>::serialize(OB, BSE.HasError))
return false;
if (BSE.HasError)
if (!SPSArgList<SPSString>::serialize(OB, BSE.ErrMsg))
return false;
return true;
}
static bool deserialize(SPSInputBuffer &IB,
detail::SPSSerializableError &BSE) {
if (!SPSArgList<bool>::deserialize(IB, BSE.HasError))
return false;
if (!BSE.HasError)
return true;
return SPSArgList<SPSString>::deserialize(IB, BSE.ErrMsg);
}
};
/// Serialize to a SPSExpected<SPSTagT> from a
/// detail::SPSSerializableExpected<T>.
template <typename SPSTagT, typename T>
class SPSSerializationTraits<SPSExpected<SPSTagT>,
detail::SPSSerializableExpected<T>> {
public:
static size_t size(const detail::SPSSerializableExpected<T> &BSE) {
size_t Size = SPSArgList<bool>::size(BSE.HasValue);
if (BSE.HasValue)
Size += SPSArgList<SPSTagT>::size(BSE.Value);
else
Size += SPSArgList<SPSString>::size(BSE.ErrMsg);
return Size;
}
static bool serialize(SPSOutputBuffer &OB,
const detail::SPSSerializableExpected<T> &BSE) {
if (!SPSArgList<bool>::serialize(OB, BSE.HasValue))
return false;
if (BSE.HasValue)
return SPSArgList<SPSTagT>::serialize(OB, BSE.Value);
return SPSArgList<SPSString>::serialize(OB, BSE.ErrMsg);
}
static bool deserialize(SPSInputBuffer &IB,
detail::SPSSerializableExpected<T> &BSE) {
if (!SPSArgList<bool>::deserialize(IB, BSE.HasValue))
return false;
if (BSE.HasValue)
return SPSArgList<SPSTagT>::deserialize(IB, BSE.Value);
return SPSArgList<SPSString>::deserialize(IB, BSE.ErrMsg);
}
};
/// Serialize to a SPSExpected<SPSTagT> from a detail::SPSSerializableError.
template <typename SPSTagT>
class SPSSerializationTraits<SPSExpected<SPSTagT>,
detail::SPSSerializableError> {
public:
static size_t size(const detail::SPSSerializableError &BSE) {
assert(BSE.HasError && "Cannot serialize expected from a success value");
return SPSArgList<bool>::size(false) +
SPSArgList<SPSString>::size(BSE.ErrMsg);
}
static bool serialize(SPSOutputBuffer &OB,
const detail::SPSSerializableError &BSE) {
assert(BSE.HasError && "Cannot serialize expected from a success value");
if (!SPSArgList<bool>::serialize(OB, false))
return false;
return SPSArgList<SPSString>::serialize(OB, BSE.ErrMsg);
}
};
/// Serialize to a SPSExpected<SPSTagT> from a T.
template <typename SPSTagT, typename T>
class SPSSerializationTraits<SPSExpected<SPSTagT>, T> {
public:
static size_t size(const T &Value) {
return SPSArgList<bool>::size(true) + SPSArgList<SPSTagT>::size(Value);
}
static bool serialize(SPSOutputBuffer &OB, const T &Value) {
if (!SPSArgList<bool>::serialize(OB, true))
return false;
return SPSArgList<SPSTagT>::serialize(Value);
}
};
} // end namespace shared
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_SHARED_SIMPLEPACKEDSERIALIZATION_H
PK iwFZz�� �) �) , ExecutionEngine/Orc/Shared/ExecutorAddress.hnu �[��� //===------ ExecutorAddress.h - Executing process address -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Represents an address in the executing program.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_SHARED_EXECUTORADDRESS_H
#define LLVM_EXECUTIONENGINE_ORC_SHARED_EXECUTORADDRESS_H
#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/ADT/identity.h"
#include "llvm/ExecutionEngine/Orc/Shared/SimplePackedSerialization.h"
#include "llvm/Support/FormatVariadic.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <type_traits>
namespace llvm {
namespace orc {
using ExecutorAddrDiff = uint64_t;
/// Represents an address in the executor process.
class ExecutorAddr {
public:
/// A wrap/unwrap function that leaves pointers unmodified.
template <typename T> using rawPtr = llvm::identity<T *>;
/// Default wrap function to use on this host.
template <typename T> using defaultWrap = rawPtr<T>;
/// Default unwrap function to use on this host.
template <typename T> using defaultUnwrap = rawPtr<T>;
/// Merges a tag into the raw address value:
/// P' = P | (TagValue << TagOffset).
class Tag {
public:
constexpr Tag(uintptr_t TagValue, uintptr_t TagOffset)
: TagMask(TagValue << TagOffset) {}
template <typename T> constexpr T *operator()(T *P) {
return reinterpret_cast<T *>(reinterpret_cast<uintptr_t>(P) | TagMask);
}
private:
uintptr_t TagMask;
};
/// Strips a tag of the given length from the given offset within the pointer:
/// P' = P & ~(((1 << TagLen) -1) << TagOffset)
class Untag {
public:
constexpr Untag(uintptr_t TagLen, uintptr_t TagOffset)
: UntagMask(~(((uintptr_t(1) << TagLen) - 1) << TagOffset)) {}
template <typename T> constexpr T *operator()(T *P) {
return reinterpret_cast<T *>(reinterpret_cast<uintptr_t>(P) & UntagMask);
}
private:
uintptr_t UntagMask;
};
ExecutorAddr() = default;
/// Create an ExecutorAddr from the given value.
explicit constexpr ExecutorAddr(uint64_t Addr) : Addr(Addr) {}
/// Create an ExecutorAddr from the given pointer.
/// Warning: This should only be used when JITing in-process.
template <typename T, typename UnwrapFn = defaultUnwrap<T>>
static ExecutorAddr fromPtr(T *Ptr, UnwrapFn &&Unwrap = UnwrapFn()) {
return ExecutorAddr(
static_cast<uint64_t>(reinterpret_cast<uintptr_t>(Unwrap(Ptr))));
}
/// Cast this ExecutorAddr to a pointer of the given type.
/// Warning: This should only be used when JITing in-process.
template <typename T, typename WrapFn = defaultWrap<std::remove_pointer_t<T>>>
std::enable_if_t<std::is_pointer<T>::value, T>
toPtr(WrapFn &&Wrap = WrapFn()) const {
uintptr_t IntPtr = static_cast<uintptr_t>(Addr);
assert(IntPtr == Addr && "ExecutorAddr value out of range for uintptr_t");
return Wrap(reinterpret_cast<T>(IntPtr));
}
/// Cast this ExecutorAddr to a pointer of the given function type.
/// Warning: This should only be used when JITing in-process.
template <typename T, typename WrapFn = defaultWrap<T>>
std::enable_if_t<std::is_function<T>::value, T *>
toPtr(WrapFn &&Wrap = WrapFn()) const {
uintptr_t IntPtr = static_cast<uintptr_t>(Addr);
assert(IntPtr == Addr && "ExecutorAddr value out of range for uintptr_t");
return Wrap(reinterpret_cast<T *>(IntPtr));
}
uint64_t getValue() const { return Addr; }
void setValue(uint64_t Addr) { this->Addr = Addr; }
bool isNull() const { return Addr == 0; }
explicit operator bool() const { return Addr != 0; }
friend bool operator==(const ExecutorAddr &LHS, const ExecutorAddr &RHS) {
return LHS.Addr == RHS.Addr;
}
friend bool operator!=(const ExecutorAddr &LHS, const ExecutorAddr &RHS) {
return LHS.Addr != RHS.Addr;
}
friend bool operator<(const ExecutorAddr &LHS, const ExecutorAddr &RHS) {
return LHS.Addr < RHS.Addr;
}
friend bool operator<=(const ExecutorAddr &LHS, const ExecutorAddr &RHS) {
return LHS.Addr <= RHS.Addr;
}
friend bool operator>(const ExecutorAddr &LHS, const ExecutorAddr &RHS) {
return LHS.Addr > RHS.Addr;
}
friend bool operator>=(const ExecutorAddr &LHS, const ExecutorAddr &RHS) {
return LHS.Addr >= RHS.Addr;
}
ExecutorAddr &operator++() {
++Addr;
return *this;
}
ExecutorAddr &operator--() {
--Addr;
return *this;
}
ExecutorAddr operator++(int) { return ExecutorAddr(Addr++); }
ExecutorAddr operator--(int) { return ExecutorAddr(Addr--); }
ExecutorAddr &operator+=(const ExecutorAddrDiff &Delta) {
Addr += Delta;
return *this;
}
ExecutorAddr &operator-=(const ExecutorAddrDiff &Delta) {
Addr -= Delta;
return *this;
}
private:
uint64_t Addr = 0;
};
/// Subtracting two addresses yields an offset.
inline ExecutorAddrDiff operator-(const ExecutorAddr &LHS,
const ExecutorAddr &RHS) {
return ExecutorAddrDiff(LHS.getValue() - RHS.getValue());
}
/// Adding an offset and an address yields an address.
inline ExecutorAddr operator+(const ExecutorAddr &LHS,
const ExecutorAddrDiff &RHS) {
return ExecutorAddr(LHS.getValue() + RHS);
}
/// Adding an address and an offset yields an address.
inline ExecutorAddr operator+(const ExecutorAddrDiff &LHS,
const ExecutorAddr &RHS) {
return ExecutorAddr(LHS + RHS.getValue());
}
/// Subtracting an offset from an address yields an address.
inline ExecutorAddr operator-(const ExecutorAddr &LHS,
const ExecutorAddrDiff &RHS) {
return ExecutorAddr(LHS.getValue() - RHS);
}
/// Taking the modulus of an address and a diff yields a diff.
inline ExecutorAddrDiff operator%(const ExecutorAddr &LHS,
const ExecutorAddrDiff &RHS) {
return ExecutorAddrDiff(LHS.getValue() % RHS);
}
/// Represents an address range in the exceutor process.
struct ExecutorAddrRange {
ExecutorAddrRange() = default;
ExecutorAddrRange(ExecutorAddr Start, ExecutorAddr End)
: Start(Start), End(End) {}
ExecutorAddrRange(ExecutorAddr Start, ExecutorAddrDiff Size)
: Start(Start), End(Start + Size) {}
bool empty() const { return Start == End; }
ExecutorAddrDiff size() const { return End - Start; }
friend bool operator==(const ExecutorAddrRange &LHS,
const ExecutorAddrRange &RHS) {
return LHS.Start == RHS.Start && LHS.End == RHS.End;
}
friend bool operator!=(const ExecutorAddrRange &LHS,
const ExecutorAddrRange &RHS) {
return !(LHS == RHS);
}
friend bool operator<(const ExecutorAddrRange &LHS,
const ExecutorAddrRange &RHS) {
return LHS.Start < RHS.Start ||
(LHS.Start == RHS.Start && LHS.End < RHS.End);
}
friend bool operator<=(const ExecutorAddrRange &LHS,
const ExecutorAddrRange &RHS) {
return LHS.Start < RHS.Start ||
(LHS.Start == RHS.Start && LHS.End <= RHS.End);
}
friend bool operator>(const ExecutorAddrRange &LHS,
const ExecutorAddrRange &RHS) {
return LHS.Start > RHS.Start ||
(LHS.Start == RHS.Start && LHS.End > RHS.End);
}
friend bool operator>=(const ExecutorAddrRange &LHS,
const ExecutorAddrRange &RHS) {
return LHS.Start > RHS.Start ||
(LHS.Start == RHS.Start && LHS.End >= RHS.End);
}
bool contains(ExecutorAddr Addr) const { return Start <= Addr && Addr < End; }
bool overlaps(const ExecutorAddrRange &Other) {
return !(Other.End <= Start || End <= Other.Start);
}
ExecutorAddr Start;
ExecutorAddr End;
};
inline raw_ostream &operator<<(raw_ostream &OS, const ExecutorAddr &A) {
return OS << formatv("{0:x}", A.getValue());
}
inline raw_ostream &operator<<(raw_ostream &OS, const ExecutorAddrRange &R) {
return OS << formatv("{0:x} -- {1:x}", R.Start.getValue(), R.End.getValue());
}
namespace shared {
class SPSExecutorAddr {};
/// SPS serializatior for ExecutorAddr.
template <> class SPSSerializationTraits<SPSExecutorAddr, ExecutorAddr> {
public:
static size_t size(const ExecutorAddr &EA) {
return SPSArgList<uint64_t>::size(EA.getValue());
}
static bool serialize(SPSOutputBuffer &BOB, const ExecutorAddr &EA) {
return SPSArgList<uint64_t>::serialize(BOB, EA.getValue());
}
static bool deserialize(SPSInputBuffer &BIB, ExecutorAddr &EA) {
uint64_t Tmp;
if (!SPSArgList<uint64_t>::deserialize(BIB, Tmp))
return false;
EA = ExecutorAddr(Tmp);
return true;
}
};
using SPSExecutorAddrRange = SPSTuple<SPSExecutorAddr, SPSExecutorAddr>;
/// Serialization traits for address ranges.
template <>
class SPSSerializationTraits<SPSExecutorAddrRange, ExecutorAddrRange> {
public:
static size_t size(const ExecutorAddrRange &Value) {
return SPSArgList<SPSExecutorAddr, SPSExecutorAddr>::size(Value.Start,
Value.End);
}
static bool serialize(SPSOutputBuffer &BOB, const ExecutorAddrRange &Value) {
return SPSArgList<SPSExecutorAddr, SPSExecutorAddr>::serialize(
BOB, Value.Start, Value.End);
}
static bool deserialize(SPSInputBuffer &BIB, ExecutorAddrRange &Value) {
return SPSArgList<SPSExecutorAddr, SPSExecutorAddr>::deserialize(
BIB, Value.Start, Value.End);
}
};
using SPSExecutorAddrRangeSequence = SPSSequence<SPSExecutorAddrRange>;
} // End namespace shared.
} // End namespace orc.
// Provide DenseMapInfo for ExecutorAddrs.
template <> struct DenseMapInfo<orc::ExecutorAddr> {
static inline orc::ExecutorAddr getEmptyKey() {
return orc::ExecutorAddr(DenseMapInfo<uint64_t>::getEmptyKey());
}
static inline orc::ExecutorAddr getTombstoneKey() {
return orc::ExecutorAddr(DenseMapInfo<uint64_t>::getTombstoneKey());
}
static unsigned getHashValue(const orc::ExecutorAddr &Addr) {
return DenseMapInfo<uint64_t>::getHashValue(Addr.getValue());
}
static bool isEqual(const orc::ExecutorAddr &LHS,
const orc::ExecutorAddr &RHS) {
return DenseMapInfo<uint64_t>::isEqual(LHS.getValue(), RHS.getValue());
}
};
} // End namespace llvm.
#endif // LLVM_EXECUTIONENGINE_ORC_SHARED_EXECUTORADDRESS_H
PK iwFZ�`V� � * ExecutionEngine/Orc/Shared/ObjectFormats.hnu �[��� //===------ ObjectFormats.h - Object format details for ORC -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// ORC-specific object format details.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_SHARED_OBJECTFORMATS_H
#define LLVM_EXECUTIONENGINE_ORC_SHARED_OBJECTFORMATS_H
#include "llvm/ADT/StringRef.h"
namespace llvm {
namespace orc {
// MachO section names.
extern StringRef MachODataCommonSectionName;
extern StringRef MachODataDataSectionName;
extern StringRef MachOEHFrameSectionName;
extern StringRef MachOCompactUnwindInfoSectionName;
extern StringRef MachOModInitFuncSectionName;
extern StringRef MachOObjCCatListSectionName;
extern StringRef MachOObjCCatList2SectionName;
extern StringRef MachOObjCClassListSectionName;
extern StringRef MachOObjCClassNameSectionName;
extern StringRef MachOObjCClassRefsSectionName;
extern StringRef MachOObjCConstSectionName;
extern StringRef MachOObjCDataSectionName;
extern StringRef MachOObjCImageInfoSectionName;
extern StringRef MachOObjCMethNameSectionName;
extern StringRef MachOObjCMethTypeSectionName;
extern StringRef MachOObjCNLCatListSectionName;
extern StringRef MachOObjCSelRefsSectionName;
extern StringRef MachOSwift5ProtoSectionName;
extern StringRef MachOSwift5ProtosSectionName;
extern StringRef MachOSwift5TypesSectionName;
extern StringRef MachOSwift5TypeRefSectionName;
extern StringRef MachOSwift5FieldMetadataSectionName;
extern StringRef MachOSwift5EntrySectionName;
extern StringRef MachOThreadBSSSectionName;
extern StringRef MachOThreadDataSectionName;
extern StringRef MachOThreadVarsSectionName;
extern StringRef MachOInitSectionNames[19];
// ELF section names.
extern StringRef ELFEHFrameSectionName;
extern StringRef ELFInitArrayFuncSectionName;
extern StringRef ELFThreadBSSSectionName;
extern StringRef ELFThreadDataSectionName;
bool isMachOInitializerSection(StringRef SegName, StringRef SecName);
bool isMachOInitializerSection(StringRef QualifiedName);
bool isELFInitializerSection(StringRef SecName);
bool isCOFFInitializerSection(StringRef Name);
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_SHARED_MEMORYFLAGS_H
PK iwFZ|�^� � 1 ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.hnu �[��� //===--- SimpleRemoteEPCUtils.h - Utils for Simple Remote EPC ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Message definitions and other utilities for SimpleRemoteEPC and
// SimpleRemoteEPCServer.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_SHARED_SIMPLEREMOTEEPCUTILS_H
#define LLVM_EXECUTIONENGINE_ORC_SHARED_SIMPLEREMOTEEPCUTILS_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include "llvm/ExecutionEngine/Orc/Shared/SimplePackedSerialization.h"
#include "llvm/Support/Error.h"
#include <atomic>
#include <mutex>
#include <string>
#include <thread>
namespace llvm {
namespace orc {
namespace SimpleRemoteEPCDefaultBootstrapSymbolNames {
extern const char *ExecutorSessionObjectName;
extern const char *DispatchFnName;
} // end namespace SimpleRemoteEPCDefaultBootstrapSymbolNames
enum class SimpleRemoteEPCOpcode : uint8_t {
Setup,
Hangup,
Result,
CallWrapper,
LastOpC = CallWrapper
};
struct SimpleRemoteEPCExecutorInfo {
std::string TargetTriple;
uint64_t PageSize;
StringMap<std::vector<char>> BootstrapMap;
StringMap<ExecutorAddr> BootstrapSymbols;
};
using SimpleRemoteEPCArgBytesVector = SmallVector<char, 128>;
class SimpleRemoteEPCTransportClient {
public:
enum HandleMessageAction { ContinueSession, EndSession };
virtual ~SimpleRemoteEPCTransportClient();
/// Handle receipt of a message.
///
/// Returns an Error if the message cannot be handled, 'EndSession' if the
/// client will not accept any further messages, and 'ContinueSession'
/// otherwise.
virtual Expected<HandleMessageAction>
handleMessage(SimpleRemoteEPCOpcode OpC, uint64_t SeqNo, ExecutorAddr TagAddr,
SimpleRemoteEPCArgBytesVector ArgBytes) = 0;
/// Handle a disconnection from the underlying transport. No further messages
/// should be sent to handleMessage after this is called.
/// Err may contain an Error value indicating unexpected disconnection. This
/// allows clients to log such errors, but no attempt should be made at
/// recovery (which should be handled inside the transport class, if it is
/// supported at all).
virtual void handleDisconnect(Error Err) = 0;
};
class SimpleRemoteEPCTransport {
public:
virtual ~SimpleRemoteEPCTransport();
/// Called during setup of the client to indicate that the client is ready
/// to receive messages.
///
/// Transport objects should not access the client until this method is
/// called.
virtual Error start() = 0;
/// Send a SimpleRemoteEPC message.
///
/// This function may be called concurrently. Subclasses should implement
/// locking if required for the underlying transport.
virtual Error sendMessage(SimpleRemoteEPCOpcode OpC, uint64_t SeqNo,
ExecutorAddr TagAddr, ArrayRef<char> ArgBytes) = 0;
/// Trigger disconnection from the transport. The implementation should
/// respond by calling handleDisconnect on the client once disconnection
/// is complete. May be called more than once and from different threads.
virtual void disconnect() = 0;
};
/// Uses read/write on FileDescriptors for transport.
class FDSimpleRemoteEPCTransport : public SimpleRemoteEPCTransport {
public:
/// Create a FDSimpleRemoteEPCTransport using the given FDs for
/// reading (InFD) and writing (OutFD).
static Expected<std::unique_ptr<FDSimpleRemoteEPCTransport>>
Create(SimpleRemoteEPCTransportClient &C, int InFD, int OutFD);
/// Create a FDSimpleRemoteEPCTransport using the given FD for both
/// reading and writing.
static Expected<std::unique_ptr<FDSimpleRemoteEPCTransport>>
Create(SimpleRemoteEPCTransportClient &C, int FD) {
return Create(C, FD, FD);
}
~FDSimpleRemoteEPCTransport() override;
Error start() override;
Error sendMessage(SimpleRemoteEPCOpcode OpC, uint64_t SeqNo,
ExecutorAddr TagAddr, ArrayRef<char> ArgBytes) override;
void disconnect() override;
private:
FDSimpleRemoteEPCTransport(SimpleRemoteEPCTransportClient &C, int InFD,
int OutFD)
: C(C), InFD(InFD), OutFD(OutFD) {}
Error readBytes(char *Dst, size_t Size, bool *IsEOF = nullptr);
int writeBytes(const char *Src, size_t Size);
void listenLoop();
std::mutex M;
SimpleRemoteEPCTransportClient &C;
std::thread ListenerThread;
int InFD, OutFD;
std::atomic<bool> Disconnected{false};
};
struct RemoteSymbolLookupSetElement {
std::string Name;
bool Required;
};
using RemoteSymbolLookupSet = std::vector<RemoteSymbolLookupSetElement>;
struct RemoteSymbolLookup {
uint64_t H;
RemoteSymbolLookupSet Symbols;
};
namespace shared {
using SPSRemoteSymbolLookupSetElement = SPSTuple<SPSString, bool>;
using SPSRemoteSymbolLookupSet = SPSSequence<SPSRemoteSymbolLookupSetElement>;
using SPSRemoteSymbolLookup = SPSTuple<uint64_t, SPSRemoteSymbolLookupSet>;
/// Tuple containing target triple, page size, and bootstrap symbols.
using SPSSimpleRemoteEPCExecutorInfo =
SPSTuple<SPSString, uint64_t,
SPSSequence<SPSTuple<SPSString, SPSSequence<char>>>,
SPSSequence<SPSTuple<SPSString, SPSExecutorAddr>>>;
template <>
class SPSSerializationTraits<SPSRemoteSymbolLookupSetElement,
RemoteSymbolLookupSetElement> {
public:
static size_t size(const RemoteSymbolLookupSetElement &V) {
return SPSArgList<SPSString, bool>::size(V.Name, V.Required);
}
static size_t serialize(SPSOutputBuffer &OB,
const RemoteSymbolLookupSetElement &V) {
return SPSArgList<SPSString, bool>::serialize(OB, V.Name, V.Required);
}
static size_t deserialize(SPSInputBuffer &IB,
RemoteSymbolLookupSetElement &V) {
return SPSArgList<SPSString, bool>::deserialize(IB, V.Name, V.Required);
}
};
template <>
class SPSSerializationTraits<SPSRemoteSymbolLookup, RemoteSymbolLookup> {
public:
static size_t size(const RemoteSymbolLookup &V) {
return SPSArgList<uint64_t, SPSRemoteSymbolLookupSet>::size(V.H, V.Symbols);
}
static size_t serialize(SPSOutputBuffer &OB, const RemoteSymbolLookup &V) {
return SPSArgList<uint64_t, SPSRemoteSymbolLookupSet>::serialize(OB, V.H,
V.Symbols);
}
static size_t deserialize(SPSInputBuffer &IB, RemoteSymbolLookup &V) {
return SPSArgList<uint64_t, SPSRemoteSymbolLookupSet>::deserialize(
IB, V.H, V.Symbols);
}
};
template <>
class SPSSerializationTraits<SPSSimpleRemoteEPCExecutorInfo,
SimpleRemoteEPCExecutorInfo> {
public:
static size_t size(const SimpleRemoteEPCExecutorInfo &SI) {
return SPSSimpleRemoteEPCExecutorInfo::AsArgList ::size(
SI.TargetTriple, SI.PageSize, SI.BootstrapMap, SI.BootstrapSymbols);
}
static bool serialize(SPSOutputBuffer &OB,
const SimpleRemoteEPCExecutorInfo &SI) {
return SPSSimpleRemoteEPCExecutorInfo::AsArgList ::serialize(
OB, SI.TargetTriple, SI.PageSize, SI.BootstrapMap, SI.BootstrapSymbols);
}
static bool deserialize(SPSInputBuffer &IB, SimpleRemoteEPCExecutorInfo &SI) {
return SPSSimpleRemoteEPCExecutorInfo::AsArgList ::deserialize(
IB, SI.TargetTriple, SI.PageSize, SI.BootstrapMap, SI.BootstrapSymbols);
}
};
using SPSLoadDylibSignature = SPSExpected<SPSExecutorAddr>(SPSExecutorAddr,
SPSString, uint64_t);
using SPSLookupSymbolsSignature =
SPSExpected<SPSSequence<SPSSequence<SPSExecutorAddr>>>(
SPSExecutorAddr, SPSSequence<SPSRemoteSymbolLookup>);
} // end namespace shared
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_SHARED_SIMPLEREMOTEEPCUTILS_H
PK iwFZL/��& �& 6 ExecutionEngine/Orc/Shared/TargetProcessControlTypes.hnu �[��� //===--- TargetProcessControlTypes.h -- Shared Core/TPC types ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// TargetProcessControl types that are used by both the Orc and
// OrcTargetProcess libraries.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_SHARED_TARGETPROCESSCONTROLTYPES_H
#define LLVM_EXECUTIONENGINE_ORC_SHARED_TARGETPROCESSCONTROLTYPES_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ExecutionEngine/JITSymbol.h"
#include "llvm/ExecutionEngine/Orc/Shared/AllocationActions.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include "llvm/ExecutionEngine/Orc/Shared/MemoryFlags.h"
#include "llvm/ExecutionEngine/Orc/Shared/SimplePackedSerialization.h"
#include "llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h"
#include "llvm/Support/Memory.h"
#include <vector>
namespace llvm {
namespace orc {
namespace tpctypes {
struct RemoteAllocGroup {
RemoteAllocGroup() = default;
RemoteAllocGroup(MemProt Prot) : Prot(Prot) {}
RemoteAllocGroup(MemProt Prot, bool FinalizeLifetime)
: Prot(Prot), FinalizeLifetime(FinalizeLifetime) {}
RemoteAllocGroup(const AllocGroup &AG) : Prot(AG.getMemProt()) {
assert(AG.getMemLifetimePolicy() != orc::MemLifetimePolicy::NoAlloc &&
"Cannot use no-alloc memory in a remote alloc request");
FinalizeLifetime =
AG.getMemLifetimePolicy() == orc::MemLifetimePolicy::Finalize;
}
MemProt Prot;
bool FinalizeLifetime = false;
};
struct SegFinalizeRequest {
RemoteAllocGroup RAG;
ExecutorAddr Addr;
uint64_t Size;
ArrayRef<char> Content;
};
struct FinalizeRequest {
std::vector<SegFinalizeRequest> Segments;
shared::AllocActions Actions;
};
struct SharedMemorySegFinalizeRequest {
RemoteAllocGroup RAG;
ExecutorAddr Addr;
uint64_t Size;
};
struct SharedMemoryFinalizeRequest {
std::vector<SharedMemorySegFinalizeRequest> Segments;
shared::AllocActions Actions;
};
template <typename T> struct UIntWrite {
UIntWrite() = default;
UIntWrite(ExecutorAddr Addr, T Value) : Addr(Addr), Value(Value) {}
ExecutorAddr Addr;
T Value = 0;
};
/// Describes a write to a uint8_t.
using UInt8Write = UIntWrite<uint8_t>;
/// Describes a write to a uint16_t.
using UInt16Write = UIntWrite<uint16_t>;
/// Describes a write to a uint32_t.
using UInt32Write = UIntWrite<uint32_t>;
/// Describes a write to a uint64_t.
using UInt64Write = UIntWrite<uint64_t>;
/// Describes a write to a buffer.
/// For use with TargetProcessControl::MemoryAccess objects.
struct BufferWrite {
BufferWrite() = default;
BufferWrite(ExecutorAddr Addr, StringRef Buffer)
: Addr(Addr), Buffer(Buffer) {}
ExecutorAddr Addr;
StringRef Buffer;
};
/// A handle used to represent a loaded dylib in the target process.
using DylibHandle = ExecutorAddr;
using LookupResult = std::vector<ExecutorAddr>;
} // end namespace tpctypes
namespace shared {
class SPSRemoteAllocGroup;
using SPSSegFinalizeRequest =
SPSTuple<SPSRemoteAllocGroup, SPSExecutorAddr, uint64_t, SPSSequence<char>>;
using SPSFinalizeRequest = SPSTuple<SPSSequence<SPSSegFinalizeRequest>,
SPSSequence<SPSAllocActionCallPair>>;
using SPSSharedMemorySegFinalizeRequest =
SPSTuple<SPSRemoteAllocGroup, SPSExecutorAddr, uint64_t>;
using SPSSharedMemoryFinalizeRequest =
SPSTuple<SPSSequence<SPSSharedMemorySegFinalizeRequest>,
SPSSequence<SPSAllocActionCallPair>>;
template <typename T>
using SPSMemoryAccessUIntWrite = SPSTuple<SPSExecutorAddr, T>;
using SPSMemoryAccessUInt8Write = SPSMemoryAccessUIntWrite<uint8_t>;
using SPSMemoryAccessUInt16Write = SPSMemoryAccessUIntWrite<uint16_t>;
using SPSMemoryAccessUInt32Write = SPSMemoryAccessUIntWrite<uint32_t>;
using SPSMemoryAccessUInt64Write = SPSMemoryAccessUIntWrite<uint64_t>;
using SPSMemoryAccessBufferWrite = SPSTuple<SPSExecutorAddr, SPSSequence<char>>;
template <>
class SPSSerializationTraits<SPSRemoteAllocGroup, tpctypes::RemoteAllocGroup> {
enum WireBits {
ReadBit = 1 << 0,
WriteBit = 1 << 1,
ExecBit = 1 << 2,
FinalizeBit = 1 << 3
};
public:
static size_t size(const tpctypes::RemoteAllocGroup &RAG) {
// All AllocGroup values encode to the same size.
return SPSArgList<uint8_t>::size(uint8_t(0));
}
static bool serialize(SPSOutputBuffer &OB,
const tpctypes::RemoteAllocGroup &RAG) {
uint8_t WireValue = 0;
if ((RAG.Prot & MemProt::Read) != MemProt::None)
WireValue |= ReadBit;
if ((RAG.Prot & MemProt::Write) != MemProt::None)
WireValue |= WriteBit;
if ((RAG.Prot & MemProt::Exec) != MemProt::None)
WireValue |= ExecBit;
if (RAG.FinalizeLifetime)
WireValue |= FinalizeBit;
return SPSArgList<uint8_t>::serialize(OB, WireValue);
}
static bool deserialize(SPSInputBuffer &IB, tpctypes::RemoteAllocGroup &RAG) {
uint8_t Val;
if (!SPSArgList<uint8_t>::deserialize(IB, Val))
return false;
MemProt MP = MemProt::None;
if (Val & ReadBit)
MP |= MemProt::Read;
if (Val & WriteBit)
MP |= MemProt::Write;
if (Val & ExecBit)
MP |= MemProt::Exec;
bool FinalizeLifetime = (Val & FinalizeBit) ? true : false;
RAG = {MP, FinalizeLifetime};
return true;
}
};
template <>
class SPSSerializationTraits<SPSSegFinalizeRequest,
tpctypes::SegFinalizeRequest> {
using SFRAL = SPSSegFinalizeRequest::AsArgList;
public:
static size_t size(const tpctypes::SegFinalizeRequest &SFR) {
return SFRAL::size(SFR.RAG, SFR.Addr, SFR.Size, SFR.Content);
}
static bool serialize(SPSOutputBuffer &OB,
const tpctypes::SegFinalizeRequest &SFR) {
return SFRAL::serialize(OB, SFR.RAG, SFR.Addr, SFR.Size, SFR.Content);
}
static bool deserialize(SPSInputBuffer &IB,
tpctypes::SegFinalizeRequest &SFR) {
return SFRAL::deserialize(IB, SFR.RAG, SFR.Addr, SFR.Size, SFR.Content);
}
};
template <>
class SPSSerializationTraits<SPSFinalizeRequest, tpctypes::FinalizeRequest> {
using FRAL = SPSFinalizeRequest::AsArgList;
public:
static size_t size(const tpctypes::FinalizeRequest &FR) {
return FRAL::size(FR.Segments, FR.Actions);
}
static bool serialize(SPSOutputBuffer &OB,
const tpctypes::FinalizeRequest &FR) {
return FRAL::serialize(OB, FR.Segments, FR.Actions);
}
static bool deserialize(SPSInputBuffer &IB, tpctypes::FinalizeRequest &FR) {
return FRAL::deserialize(IB, FR.Segments, FR.Actions);
}
};
template <>
class SPSSerializationTraits<SPSSharedMemorySegFinalizeRequest,
tpctypes::SharedMemorySegFinalizeRequest> {
using SFRAL = SPSSharedMemorySegFinalizeRequest::AsArgList;
public:
static size_t size(const tpctypes::SharedMemorySegFinalizeRequest &SFR) {
return SFRAL::size(SFR.RAG, SFR.Addr, SFR.Size);
}
static bool serialize(SPSOutputBuffer &OB,
const tpctypes::SharedMemorySegFinalizeRequest &SFR) {
return SFRAL::serialize(OB, SFR.RAG, SFR.Addr, SFR.Size);
}
static bool deserialize(SPSInputBuffer &IB,
tpctypes::SharedMemorySegFinalizeRequest &SFR) {
return SFRAL::deserialize(IB, SFR.RAG, SFR.Addr, SFR.Size);
}
};
template <>
class SPSSerializationTraits<SPSSharedMemoryFinalizeRequest,
tpctypes::SharedMemoryFinalizeRequest> {
using FRAL = SPSSharedMemoryFinalizeRequest::AsArgList;
public:
static size_t size(const tpctypes::SharedMemoryFinalizeRequest &FR) {
return FRAL::size(FR.Segments, FR.Actions);
}
static bool serialize(SPSOutputBuffer &OB,
const tpctypes::SharedMemoryFinalizeRequest &FR) {
return FRAL::serialize(OB, FR.Segments, FR.Actions);
}
static bool deserialize(SPSInputBuffer &IB,
tpctypes::SharedMemoryFinalizeRequest &FR) {
return FRAL::deserialize(IB, FR.Segments, FR.Actions);
}
};
template <typename T>
class SPSSerializationTraits<SPSMemoryAccessUIntWrite<T>,
tpctypes::UIntWrite<T>> {
public:
static size_t size(const tpctypes::UIntWrite<T> &W) {
return SPSTuple<SPSExecutorAddr, T>::AsArgList::size(W.Addr, W.Value);
}
static bool serialize(SPSOutputBuffer &OB, const tpctypes::UIntWrite<T> &W) {
return SPSTuple<SPSExecutorAddr, T>::AsArgList::serialize(OB, W.Addr,
W.Value);
}
static bool deserialize(SPSInputBuffer &IB, tpctypes::UIntWrite<T> &W) {
return SPSTuple<SPSExecutorAddr, T>::AsArgList::deserialize(IB, W.Addr,
W.Value);
}
};
template <>
class SPSSerializationTraits<SPSMemoryAccessBufferWrite,
tpctypes::BufferWrite> {
public:
static size_t size(const tpctypes::BufferWrite &W) {
return SPSTuple<SPSExecutorAddr, SPSSequence<char>>::AsArgList::size(
W.Addr, W.Buffer);
}
static bool serialize(SPSOutputBuffer &OB, const tpctypes::BufferWrite &W) {
return SPSTuple<SPSExecutorAddr, SPSSequence<char>>::AsArgList ::serialize(
OB, W.Addr, W.Buffer);
}
static bool deserialize(SPSInputBuffer &IB, tpctypes::BufferWrite &W) {
return SPSTuple<SPSExecutorAddr,
SPSSequence<char>>::AsArgList ::deserialize(IB, W.Addr,
W.Buffer);
}
};
} // end namespace shared
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_SHARED_TARGETPROCESSCONTROLTYPES_H
PK iwFZ��G�� � ( ExecutionEngine/Orc/Shared/OrcRTBridge.hnu �[��� //===---- OrcRTBridge.h -- Utils for interacting with orc-rt ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Declares types and symbol names provided by the ORC runtime.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_SHARED_ORCRTBRIDGE_H
#define LLVM_EXECUTIONENGINE_ORC_SHARED_ORCRTBRIDGE_H
#include "llvm/ADT/StringMap.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include "llvm/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.h"
#include "llvm/ExecutionEngine/Orc/Shared/TargetProcessControlTypes.h"
namespace llvm {
namespace orc {
namespace rt {
extern const char *SimpleExecutorDylibManagerInstanceName;
extern const char *SimpleExecutorDylibManagerOpenWrapperName;
extern const char *SimpleExecutorDylibManagerLookupWrapperName;
extern const char *SimpleExecutorMemoryManagerInstanceName;
extern const char *SimpleExecutorMemoryManagerReserveWrapperName;
extern const char *SimpleExecutorMemoryManagerFinalizeWrapperName;
extern const char *SimpleExecutorMemoryManagerDeallocateWrapperName;
extern const char *ExecutorSharedMemoryMapperServiceInstanceName;
extern const char *ExecutorSharedMemoryMapperServiceReserveWrapperName;
extern const char *ExecutorSharedMemoryMapperServiceInitializeWrapperName;
extern const char *ExecutorSharedMemoryMapperServiceDeinitializeWrapperName;
extern const char *ExecutorSharedMemoryMapperServiceReleaseWrapperName;
extern const char *MemoryWriteUInt8sWrapperName;
extern const char *MemoryWriteUInt16sWrapperName;
extern const char *MemoryWriteUInt32sWrapperName;
extern const char *MemoryWriteUInt64sWrapperName;
extern const char *MemoryWriteBuffersWrapperName;
extern const char *RegisterEHFrameSectionWrapperName;
extern const char *DeregisterEHFrameSectionWrapperName;
extern const char *RunAsMainWrapperName;
extern const char *RunAsVoidFunctionWrapperName;
extern const char *RunAsIntFunctionWrapperName;
using SPSSimpleExecutorDylibManagerOpenSignature =
shared::SPSExpected<shared::SPSExecutorAddr>(shared::SPSExecutorAddr,
shared::SPSString, uint64_t);
using SPSSimpleExecutorDylibManagerLookupSignature =
shared::SPSExpected<shared::SPSSequence<shared::SPSExecutorAddr>>(
shared::SPSExecutorAddr, shared::SPSExecutorAddr,
shared::SPSRemoteSymbolLookupSet);
using SPSSimpleExecutorMemoryManagerReserveSignature =
shared::SPSExpected<shared::SPSExecutorAddr>(shared::SPSExecutorAddr,
uint64_t);
using SPSSimpleExecutorMemoryManagerFinalizeSignature =
shared::SPSError(shared::SPSExecutorAddr, shared::SPSFinalizeRequest);
using SPSSimpleExecutorMemoryManagerDeallocateSignature = shared::SPSError(
shared::SPSExecutorAddr, shared::SPSSequence<shared::SPSExecutorAddr>);
// ExecutorSharedMemoryMapperService
using SPSExecutorSharedMemoryMapperServiceReserveSignature =
shared::SPSExpected<
shared::SPSTuple<shared::SPSExecutorAddr, shared::SPSString>>(
shared::SPSExecutorAddr, uint64_t);
using SPSExecutorSharedMemoryMapperServiceInitializeSignature =
shared::SPSExpected<shared::SPSExecutorAddr>(
shared::SPSExecutorAddr, shared::SPSExecutorAddr,
shared::SPSSharedMemoryFinalizeRequest);
using SPSExecutorSharedMemoryMapperServiceDeinitializeSignature =
shared::SPSError(shared::SPSExecutorAddr,
shared::SPSSequence<shared::SPSExecutorAddr>);
using SPSExecutorSharedMemoryMapperServiceReleaseSignature = shared::SPSError(
shared::SPSExecutorAddr, shared::SPSSequence<shared::SPSExecutorAddr>);
using SPSRunAsMainSignature = int64_t(shared::SPSExecutorAddr,
shared::SPSSequence<shared::SPSString>);
using SPSRunAsVoidFunctionSignature = int32_t(shared::SPSExecutorAddr);
using SPSRunAsIntFunctionSignature = int32_t(shared::SPSExecutorAddr, int32_t);
} // end namespace rt
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_SHARED_ORCRTBRIDGE_H
PK iwFZ[
_S� � ( ExecutionEngine/Orc/Shared/MemoryFlags.hnu �[��� //===-------- MemoryFlags.h - Memory allocation flags -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Defines types and operations related to memory protection and allocation
// lifetimes.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_SHARED_MEMORYFLAGS_H
#define LLVM_EXECUTIONENGINE_ORC_SHARED_MEMORYFLAGS_H
#include "llvm/ADT/BitmaskEnum.h"
#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/Memory.h"
#include "llvm/Support/raw_ostream.h"
namespace llvm {
namespace orc {
/// Describes Read/Write/Exec permissions for memory.
enum class MemProt {
None = 0,
Read = 1U << 0,
Write = 1U << 1,
Exec = 1U << 2,
LLVM_MARK_AS_BITMASK_ENUM(/* LargestValue = */ Exec)
};
/// Print a MemProt as an RWX triple.
inline raw_ostream &operator<<(raw_ostream &OS, MemProt MP) {
return OS << (((MP & MemProt::Read) != MemProt::None) ? 'R' : '-')
<< (((MP & MemProt::Write) != MemProt::None) ? 'W' : '-')
<< (((MP & MemProt::Exec) != MemProt::None) ? 'X' : '-');
}
/// Convert a MemProt value to a corresponding sys::Memory::ProtectionFlags
/// value.
inline sys::Memory::ProtectionFlags toSysMemoryProtectionFlags(MemProt MP) {
std::underlying_type_t<sys::Memory::ProtectionFlags> PF = 0;
if ((MP & MemProt::Read) != MemProt::None)
PF |= sys::Memory::MF_READ;
if ((MP & MemProt::Write) != MemProt::None)
PF |= sys::Memory::MF_WRITE;
if ((MP & MemProt::Exec) != MemProt::None)
PF |= sys::Memory::MF_EXEC;
return static_cast<sys::Memory::ProtectionFlags>(PF);
}
/// Convert a sys::Memory::ProtectionFlags value to a corresponding MemProt
/// value.
inline MemProt fromSysMemoryProtectionFlags(sys::Memory::ProtectionFlags PF) {
MemProt MP = MemProt::None;
if (PF & sys::Memory::MF_READ)
MP |= MemProt::Read;
if (PF & sys::Memory::MF_WRITE)
MP |= MemProt::Write;
if (PF & sys::Memory::MF_EXEC)
MP |= MemProt::None;
return MP;
}
/// Describes a memory lifetime policy for memory to be allocated by a
/// JITLinkMemoryManager.
///
/// All memory allocated by a call to JITLinkMemoryManager::allocate should be
/// deallocated if a call is made to
/// JITLinkMemoryManager::InFlightAllocation::abandon. The policies below apply
/// to finalized allocations.
enum class MemLifetimePolicy {
/// Standard memory should be allocated by the allocator and then deallocated
/// when the deallocate method is called for the finalized allocation.
Standard,
/// Finalize memory should be allocated by the allocator, and then be
/// overwritten and deallocated after all finalization functions have been
/// run.
Finalize,
/// NoAlloc memory should not be allocated by the JITLinkMemoryManager at
/// all. It is used for sections that don't need to be transferred to the
/// executor process, typically metadata sections.
NoAlloc
};
/// Print a MemDeallocPolicy.
inline raw_ostream &operator<<(raw_ostream &OS, MemLifetimePolicy MLP) {
switch (MLP) {
case MemLifetimePolicy::Standard:
OS << "standard";
break;
case MemLifetimePolicy::Finalize:
OS << "finalize";
break;
case MemLifetimePolicy::NoAlloc:
OS << "noalloc";
break;
}
return OS;
}
/// A pair of memory protections and allocation policies.
///
/// Optimized for use as a small map key.
class AllocGroup {
friend struct llvm::DenseMapInfo<AllocGroup>;
using underlying_type = uint8_t;
static constexpr unsigned BitsForProt = 3;
static constexpr unsigned BitsForLifetimePolicy = 2;
static constexpr unsigned MaxIdentifiers =
1U << (BitsForProt + BitsForLifetimePolicy);
public:
static constexpr unsigned NumGroups = MaxIdentifiers;
/// Create a default AllocGroup. No memory protections, standard
/// lifetime policy.
AllocGroup() = default;
/// Create an AllocGroup from a MemProt only -- uses
/// MemLifetimePolicy::Standard.
AllocGroup(MemProt MP) : Id(static_cast<underlying_type>(MP)) {}
/// Create an AllocGroup from a MemProt and a MemLifetimePolicy.
AllocGroup(MemProt MP, MemLifetimePolicy MLP)
: Id(static_cast<underlying_type>(MP) |
(static_cast<underlying_type>(MLP) << BitsForProt)) {}
/// Returns the MemProt for this group.
MemProt getMemProt() const {
return static_cast<MemProt>(Id & ((1U << BitsForProt) - 1));
}
/// Returns the MemLifetimePolicy for this group.
MemLifetimePolicy getMemLifetimePolicy() const {
return static_cast<MemLifetimePolicy>(Id >> BitsForProt);
}
friend bool operator==(const AllocGroup &LHS, const AllocGroup &RHS) {
return LHS.Id == RHS.Id;
}
friend bool operator!=(const AllocGroup &LHS, const AllocGroup &RHS) {
return !(LHS == RHS);
}
friend bool operator<(const AllocGroup &LHS, const AllocGroup &RHS) {
return LHS.Id < RHS.Id;
}
private:
AllocGroup(underlying_type RawId) : Id(RawId) {}
underlying_type Id = 0;
};
/// A specialized small-map for AllocGroups.
///
/// Iteration order is guaranteed to match key ordering.
template <typename T> class AllocGroupSmallMap {
private:
using ElemT = std::pair<AllocGroup, T>;
using VectorTy = SmallVector<ElemT, 4>;
static bool compareKey(const ElemT &E, const AllocGroup &G) {
return E.first < G;
}
public:
using iterator = typename VectorTy::iterator;
AllocGroupSmallMap() = default;
AllocGroupSmallMap(std::initializer_list<std::pair<AllocGroup, T>> Inits)
: Elems(Inits) {
llvm::sort(Elems, llvm::less_first());
}
iterator begin() { return Elems.begin(); }
iterator end() { return Elems.end(); }
iterator find(AllocGroup G) {
auto I = lower_bound(Elems, G, compareKey);
return (I->first == G) ? I : end();
}
bool empty() const { return Elems.empty(); }
size_t size() const { return Elems.size(); }
T &operator[](AllocGroup G) {
auto I = lower_bound(Elems, G, compareKey);
if (I == Elems.end() || I->first != G)
I = Elems.insert(I, std::make_pair(G, T()));
return I->second;
}
private:
VectorTy Elems;
};
/// Print an AllocGroup.
inline raw_ostream &operator<<(raw_ostream &OS, AllocGroup AG) {
return OS << '(' << AG.getMemProt() << ", " << AG.getMemLifetimePolicy()
<< ')';
}
} // end namespace orc
template <> struct DenseMapInfo<orc::MemProt> {
static inline orc::MemProt getEmptyKey() { return orc::MemProt(~uint8_t(0)); }
static inline orc::MemProt getTombstoneKey() {
return orc::MemProt(~uint8_t(0) - 1);
}
static unsigned getHashValue(const orc::MemProt &Val) {
using UT = std::underlying_type_t<orc::MemProt>;
return DenseMapInfo<UT>::getHashValue(static_cast<UT>(Val));
}
static bool isEqual(const orc::MemProt &LHS, const orc::MemProt &RHS) {
return LHS == RHS;
}
};
template <> struct DenseMapInfo<orc::AllocGroup> {
static inline orc::AllocGroup getEmptyKey() {
return orc::AllocGroup(~uint8_t(0));
}
static inline orc::AllocGroup getTombstoneKey() {
return orc::AllocGroup(~uint8_t(0) - 1);
}
static unsigned getHashValue(const orc::AllocGroup &Val) {
return DenseMapInfo<orc::AllocGroup::underlying_type>::getHashValue(Val.Id);
}
static bool isEqual(const orc::AllocGroup &LHS, const orc::AllocGroup &RHS) {
return LHS == RHS;
}
};
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_SHARED_MEMORYFLAGS_H
PK iwFZ
K /n /n 1 ExecutionEngine/Orc/Shared/WrapperFunctionUtils.hnu �[��� //===- WrapperFunctionUtils.h - Utilities for wrapper functions -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// A buffer for serialized results.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_SHARED_WRAPPERFUNCTIONUTILS_H
#define LLVM_EXECUTIONENGINE_ORC_SHARED_WRAPPERFUNCTIONUTILS_H
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include "llvm/ExecutionEngine/Orc/Shared/SimplePackedSerialization.h"
#include "llvm/Support/Error.h"
#include <type_traits>
namespace llvm {
namespace orc {
namespace shared {
// Must be kept in-sync with compiler-rt/lib/orc/c-api.h.
union CWrapperFunctionResultDataUnion {
char *ValuePtr;
char Value[sizeof(ValuePtr)];
};
// Must be kept in-sync with compiler-rt/lib/orc/c-api.h.
typedef struct {
CWrapperFunctionResultDataUnion Data;
size_t Size;
} CWrapperFunctionResult;
/// C++ wrapper function result: Same as CWrapperFunctionResult but
/// auto-releases memory.
class WrapperFunctionResult {
public:
/// Create a default WrapperFunctionResult.
WrapperFunctionResult() { init(R); }
/// Create a WrapperFunctionResult by taking ownership of a
/// CWrapperFunctionResult.
///
/// Warning: This should only be used by clients writing wrapper-function
/// caller utilities (like TargetProcessControl).
WrapperFunctionResult(CWrapperFunctionResult R) : R(R) {
// Reset R.
init(R);
}
WrapperFunctionResult(const WrapperFunctionResult &) = delete;
WrapperFunctionResult &operator=(const WrapperFunctionResult &) = delete;
WrapperFunctionResult(WrapperFunctionResult &&Other) {
init(R);
std::swap(R, Other.R);
}
WrapperFunctionResult &operator=(WrapperFunctionResult &&Other) {
WrapperFunctionResult Tmp(std::move(Other));
std::swap(R, Tmp.R);
return *this;
}
~WrapperFunctionResult() {
if ((R.Size > sizeof(R.Data.Value)) ||
(R.Size == 0 && R.Data.ValuePtr != nullptr))
free(R.Data.ValuePtr);
}
/// Release ownership of the contained CWrapperFunctionResult.
/// Warning: Do not use -- this method will be removed in the future. It only
/// exists to temporarily support some code that will eventually be moved to
/// the ORC runtime.
CWrapperFunctionResult release() {
CWrapperFunctionResult Tmp;
init(Tmp);
std::swap(R, Tmp);
return Tmp;
}
/// Get a pointer to the data contained in this instance.
char *data() {
assert((R.Size != 0 || R.Data.ValuePtr == nullptr) &&
"Cannot get data for out-of-band error value");
return R.Size > sizeof(R.Data.Value) ? R.Data.ValuePtr : R.Data.Value;
}
/// Get a const pointer to the data contained in this instance.
const char *data() const {
assert((R.Size != 0 || R.Data.ValuePtr == nullptr) &&
"Cannot get data for out-of-band error value");
return R.Size > sizeof(R.Data.Value) ? R.Data.ValuePtr : R.Data.Value;
}
/// Returns the size of the data contained in this instance.
size_t size() const {
assert((R.Size != 0 || R.Data.ValuePtr == nullptr) &&
"Cannot get data for out-of-band error value");
return R.Size;
}
/// Returns true if this value is equivalent to a default-constructed
/// WrapperFunctionResult.
bool empty() const { return R.Size == 0 && R.Data.ValuePtr == nullptr; }
/// Create a WrapperFunctionResult with the given size and return a pointer
/// to the underlying memory.
static WrapperFunctionResult allocate(size_t Size) {
// Reset.
WrapperFunctionResult WFR;
WFR.R.Size = Size;
if (WFR.R.Size > sizeof(WFR.R.Data.Value))
WFR.R.Data.ValuePtr = (char *)malloc(WFR.R.Size);
return WFR;
}
/// Copy from the given char range.
static WrapperFunctionResult copyFrom(const char *Source, size_t Size) {
auto WFR = allocate(Size);
memcpy(WFR.data(), Source, Size);
return WFR;
}
/// Copy from the given null-terminated string (includes the null-terminator).
static WrapperFunctionResult copyFrom(const char *Source) {
return copyFrom(Source, strlen(Source) + 1);
}
/// Copy from the given std::string (includes the null terminator).
static WrapperFunctionResult copyFrom(const std::string &Source) {
return copyFrom(Source.c_str());
}
/// Create an out-of-band error by copying the given string.
static WrapperFunctionResult createOutOfBandError(const char *Msg) {
// Reset.
WrapperFunctionResult WFR;
char *Tmp = (char *)malloc(strlen(Msg) + 1);
strcpy(Tmp, Msg);
WFR.R.Data.ValuePtr = Tmp;
return WFR;
}
/// Create an out-of-band error by copying the given string.
static WrapperFunctionResult createOutOfBandError(const std::string &Msg) {
return createOutOfBandError(Msg.c_str());
}
/// If this value is an out-of-band error then this returns the error message,
/// otherwise returns nullptr.
const char *getOutOfBandError() const {
return R.Size == 0 ? R.Data.ValuePtr : nullptr;
}
private:
static void init(CWrapperFunctionResult &R) {
R.Data.ValuePtr = nullptr;
R.Size = 0;
}
CWrapperFunctionResult R;
};
namespace detail {
template <typename SPSArgListT, typename... ArgTs>
WrapperFunctionResult
serializeViaSPSToWrapperFunctionResult(const ArgTs &...Args) {
auto Result = WrapperFunctionResult::allocate(SPSArgListT::size(Args...));
SPSOutputBuffer OB(Result.data(), Result.size());
if (!SPSArgListT::serialize(OB, Args...))
return WrapperFunctionResult::createOutOfBandError(
"Error serializing arguments to blob in call");
return Result;
}
template <typename RetT> class WrapperFunctionHandlerCaller {
public:
template <typename HandlerT, typename ArgTupleT, std::size_t... I>
static decltype(auto) call(HandlerT &&H, ArgTupleT &Args,
std::index_sequence<I...>) {
return std::forward<HandlerT>(H)(std::get<I>(Args)...);
}
};
template <> class WrapperFunctionHandlerCaller<void> {
public:
template <typename HandlerT, typename ArgTupleT, std::size_t... I>
static SPSEmpty call(HandlerT &&H, ArgTupleT &Args,
std::index_sequence<I...>) {
std::forward<HandlerT>(H)(std::get<I>(Args)...);
return SPSEmpty();
}
};
template <typename WrapperFunctionImplT,
template <typename> class ResultSerializer, typename... SPSTagTs>
class WrapperFunctionHandlerHelper
: public WrapperFunctionHandlerHelper<
decltype(&std::remove_reference_t<WrapperFunctionImplT>::operator()),
ResultSerializer, SPSTagTs...> {};
template <typename RetT, typename... ArgTs,
template <typename> class ResultSerializer, typename... SPSTagTs>
class WrapperFunctionHandlerHelper<RetT(ArgTs...), ResultSerializer,
SPSTagTs...> {
public:
using ArgTuple = std::tuple<std::decay_t<ArgTs>...>;
using ArgIndices = std::make_index_sequence<std::tuple_size<ArgTuple>::value>;
template <typename HandlerT>
static WrapperFunctionResult apply(HandlerT &&H, const char *ArgData,
size_t ArgSize) {
ArgTuple Args;
if (!deserialize(ArgData, ArgSize, Args, ArgIndices{}))
return WrapperFunctionResult::createOutOfBandError(
"Could not deserialize arguments for wrapper function call");
auto HandlerResult = WrapperFunctionHandlerCaller<RetT>::call(
std::forward<HandlerT>(H), Args, ArgIndices{});
return ResultSerializer<decltype(HandlerResult)>::serialize(
std::move(HandlerResult));
}
private:
template <std::size_t... I>
static bool deserialize(const char *ArgData, size_t ArgSize, ArgTuple &Args,
std::index_sequence<I...>) {
SPSInputBuffer IB(ArgData, ArgSize);
return SPSArgList<SPSTagTs...>::deserialize(IB, std::get<I>(Args)...);
}
};
// Map function pointers to function types.
template <typename RetT, typename... ArgTs,
template <typename> class ResultSerializer, typename... SPSTagTs>
class WrapperFunctionHandlerHelper<RetT (*)(ArgTs...), ResultSerializer,
SPSTagTs...>
: public WrapperFunctionHandlerHelper<RetT(ArgTs...), ResultSerializer,
SPSTagTs...> {};
// Map non-const member function types to function types.
template <typename ClassT, typename RetT, typename... ArgTs,
template <typename> class ResultSerializer, typename... SPSTagTs>
class WrapperFunctionHandlerHelper<RetT (ClassT::*)(ArgTs...), ResultSerializer,
SPSTagTs...>
: public WrapperFunctionHandlerHelper<RetT(ArgTs...), ResultSerializer,
SPSTagTs...> {};
// Map const member function types to function types.
template <typename ClassT, typename RetT, typename... ArgTs,
template <typename> class ResultSerializer, typename... SPSTagTs>
class WrapperFunctionHandlerHelper<RetT (ClassT::*)(ArgTs...) const,
ResultSerializer, SPSTagTs...>
: public WrapperFunctionHandlerHelper<RetT(ArgTs...), ResultSerializer,
SPSTagTs...> {};
template <typename WrapperFunctionImplT,
template <typename> class ResultSerializer, typename... SPSTagTs>
class WrapperFunctionAsyncHandlerHelper
: public WrapperFunctionAsyncHandlerHelper<
decltype(&std::remove_reference_t<WrapperFunctionImplT>::operator()),
ResultSerializer, SPSTagTs...> {};
template <typename RetT, typename SendResultT, typename... ArgTs,
template <typename> class ResultSerializer, typename... SPSTagTs>
class WrapperFunctionAsyncHandlerHelper<RetT(SendResultT, ArgTs...),
ResultSerializer, SPSTagTs...> {
public:
using ArgTuple = std::tuple<std::decay_t<ArgTs>...>;
using ArgIndices = std::make_index_sequence<std::tuple_size<ArgTuple>::value>;
template <typename HandlerT, typename SendWrapperFunctionResultT>
static void applyAsync(HandlerT &&H,
SendWrapperFunctionResultT &&SendWrapperFunctionResult,
const char *ArgData, size_t ArgSize) {
ArgTuple Args;
if (!deserialize(ArgData, ArgSize, Args, ArgIndices{})) {
SendWrapperFunctionResult(WrapperFunctionResult::createOutOfBandError(
"Could not deserialize arguments for wrapper function call"));
return;
}
auto SendResult =
[SendWFR = std::move(SendWrapperFunctionResult)](auto Result) mutable {
using ResultT = decltype(Result);
SendWFR(ResultSerializer<ResultT>::serialize(std::move(Result)));
};
callAsync(std::forward<HandlerT>(H), std::move(SendResult), std::move(Args),
ArgIndices{});
}
private:
template <std::size_t... I>
static bool deserialize(const char *ArgData, size_t ArgSize, ArgTuple &Args,
std::index_sequence<I...>) {
SPSInputBuffer IB(ArgData, ArgSize);
return SPSArgList<SPSTagTs...>::deserialize(IB, std::get<I>(Args)...);
}
template <typename HandlerT, typename SerializeAndSendResultT,
typename ArgTupleT, std::size_t... I>
static void callAsync(HandlerT &&H,
SerializeAndSendResultT &&SerializeAndSendResult,
ArgTupleT Args, std::index_sequence<I...>) {
(void)Args; // Silence a buggy GCC warning.
return std::forward<HandlerT>(H)(std::move(SerializeAndSendResult),
std::move(std::get<I>(Args))...);
}
};
// Map function pointers to function types.
template <typename RetT, typename... ArgTs,
template <typename> class ResultSerializer, typename... SPSTagTs>
class WrapperFunctionAsyncHandlerHelper<RetT (*)(ArgTs...), ResultSerializer,
SPSTagTs...>
: public WrapperFunctionAsyncHandlerHelper<RetT(ArgTs...), ResultSerializer,
SPSTagTs...> {};
// Map non-const member function types to function types.
template <typename ClassT, typename RetT, typename... ArgTs,
template <typename> class ResultSerializer, typename... SPSTagTs>
class WrapperFunctionAsyncHandlerHelper<RetT (ClassT::*)(ArgTs...),
ResultSerializer, SPSTagTs...>
: public WrapperFunctionAsyncHandlerHelper<RetT(ArgTs...), ResultSerializer,
SPSTagTs...> {};
// Map const member function types to function types.
template <typename ClassT, typename RetT, typename... ArgTs,
template <typename> class ResultSerializer, typename... SPSTagTs>
class WrapperFunctionAsyncHandlerHelper<RetT (ClassT::*)(ArgTs...) const,
ResultSerializer, SPSTagTs...>
: public WrapperFunctionAsyncHandlerHelper<RetT(ArgTs...), ResultSerializer,
SPSTagTs...> {};
template <typename SPSRetTagT, typename RetT> class ResultSerializer {
public:
static WrapperFunctionResult serialize(RetT Result) {
return serializeViaSPSToWrapperFunctionResult<SPSArgList<SPSRetTagT>>(
Result);
}
};
template <typename SPSRetTagT> class ResultSerializer<SPSRetTagT, Error> {
public:
static WrapperFunctionResult serialize(Error Err) {
return serializeViaSPSToWrapperFunctionResult<SPSArgList<SPSRetTagT>>(
toSPSSerializable(std::move(Err)));
}
};
template <typename SPSRetTagT>
class ResultSerializer<SPSRetTagT, ErrorSuccess> {
public:
static WrapperFunctionResult serialize(ErrorSuccess Err) {
return serializeViaSPSToWrapperFunctionResult<SPSArgList<SPSRetTagT>>(
toSPSSerializable(std::move(Err)));
}
};
template <typename SPSRetTagT, typename T>
class ResultSerializer<SPSRetTagT, Expected<T>> {
public:
static WrapperFunctionResult serialize(Expected<T> E) {
return serializeViaSPSToWrapperFunctionResult<SPSArgList<SPSRetTagT>>(
toSPSSerializable(std::move(E)));
}
};
template <typename SPSRetTagT, typename RetT> class ResultDeserializer {
public:
static RetT makeValue() { return RetT(); }
static void makeSafe(RetT &Result) {}
static Error deserialize(RetT &Result, const char *ArgData, size_t ArgSize) {
SPSInputBuffer IB(ArgData, ArgSize);
if (!SPSArgList<SPSRetTagT>::deserialize(IB, Result))
return make_error<StringError>(
"Error deserializing return value from blob in call",
inconvertibleErrorCode());
return Error::success();
}
};
template <> class ResultDeserializer<SPSError, Error> {
public:
static Error makeValue() { return Error::success(); }
static void makeSafe(Error &Err) { cantFail(std::move(Err)); }
static Error deserialize(Error &Err, const char *ArgData, size_t ArgSize) {
SPSInputBuffer IB(ArgData, ArgSize);
SPSSerializableError BSE;
if (!SPSArgList<SPSError>::deserialize(IB, BSE))
return make_error<StringError>(
"Error deserializing return value from blob in call",
inconvertibleErrorCode());
Err = fromSPSSerializable(std::move(BSE));
return Error::success();
}
};
template <typename SPSTagT, typename T>
class ResultDeserializer<SPSExpected<SPSTagT>, Expected<T>> {
public:
static Expected<T> makeValue() { return T(); }
static void makeSafe(Expected<T> &E) { cantFail(E.takeError()); }
static Error deserialize(Expected<T> &E, const char *ArgData,
size_t ArgSize) {
SPSInputBuffer IB(ArgData, ArgSize);
SPSSerializableExpected<T> BSE;
if (!SPSArgList<SPSExpected<SPSTagT>>::deserialize(IB, BSE))
return make_error<StringError>(
"Error deserializing return value from blob in call",
inconvertibleErrorCode());
E = fromSPSSerializable(std::move(BSE));
return Error::success();
}
};
template <typename SPSRetTagT, typename RetT> class AsyncCallResultHelper {
// Did you forget to use Error / Expected in your handler?
};
} // end namespace detail
template <typename SPSSignature> class WrapperFunction;
template <typename SPSRetTagT, typename... SPSTagTs>
class WrapperFunction<SPSRetTagT(SPSTagTs...)> {
private:
template <typename RetT>
using ResultSerializer = detail::ResultSerializer<SPSRetTagT, RetT>;
public:
/// Call a wrapper function. Caller should be callable as
/// WrapperFunctionResult Fn(const char *ArgData, size_t ArgSize);
template <typename CallerFn, typename RetT, typename... ArgTs>
static Error call(const CallerFn &Caller, RetT &Result,
const ArgTs &...Args) {
// RetT might be an Error or Expected value. Set the checked flag now:
// we don't want the user to have to check the unused result if this
// operation fails.
detail::ResultDeserializer<SPSRetTagT, RetT>::makeSafe(Result);
auto ArgBuffer =
detail::serializeViaSPSToWrapperFunctionResult<SPSArgList<SPSTagTs...>>(
Args...);
if (const char *ErrMsg = ArgBuffer.getOutOfBandError())
return make_error<StringError>(ErrMsg, inconvertibleErrorCode());
WrapperFunctionResult ResultBuffer =
Caller(ArgBuffer.data(), ArgBuffer.size());
if (auto ErrMsg = ResultBuffer.getOutOfBandError())
return make_error<StringError>(ErrMsg, inconvertibleErrorCode());
return detail::ResultDeserializer<SPSRetTagT, RetT>::deserialize(
Result, ResultBuffer.data(), ResultBuffer.size());
}
/// Call an async wrapper function.
/// Caller should be callable as
/// void Fn(unique_function<void(WrapperFunctionResult)> SendResult,
/// WrapperFunctionResult ArgBuffer);
template <typename AsyncCallerFn, typename SendDeserializedResultFn,
typename... ArgTs>
static void callAsync(AsyncCallerFn &&Caller,
SendDeserializedResultFn &&SendDeserializedResult,
const ArgTs &...Args) {
using RetT = typename std::tuple_element<
1, typename detail::WrapperFunctionHandlerHelper<
std::remove_reference_t<SendDeserializedResultFn>,
ResultSerializer, SPSRetTagT>::ArgTuple>::type;
auto ArgBuffer =
detail::serializeViaSPSToWrapperFunctionResult<SPSArgList<SPSTagTs...>>(
Args...);
if (auto *ErrMsg = ArgBuffer.getOutOfBandError()) {
SendDeserializedResult(
make_error<StringError>(ErrMsg, inconvertibleErrorCode()),
detail::ResultDeserializer<SPSRetTagT, RetT>::makeValue());
return;
}
auto SendSerializedResult = [SDR = std::move(SendDeserializedResult)](
WrapperFunctionResult R) mutable {
RetT RetVal = detail::ResultDeserializer<SPSRetTagT, RetT>::makeValue();
detail::ResultDeserializer<SPSRetTagT, RetT>::makeSafe(RetVal);
if (auto *ErrMsg = R.getOutOfBandError()) {
SDR(make_error<StringError>(ErrMsg, inconvertibleErrorCode()),
std::move(RetVal));
return;
}
SPSInputBuffer IB(R.data(), R.size());
if (auto Err = detail::ResultDeserializer<SPSRetTagT, RetT>::deserialize(
RetVal, R.data(), R.size()))
SDR(std::move(Err), std::move(RetVal));
SDR(Error::success(), std::move(RetVal));
};
Caller(std::move(SendSerializedResult), ArgBuffer.data(), ArgBuffer.size());
}
/// Handle a call to a wrapper function.
template <typename HandlerT>
static WrapperFunctionResult handle(const char *ArgData, size_t ArgSize,
HandlerT &&Handler) {
using WFHH =
detail::WrapperFunctionHandlerHelper<std::remove_reference_t<HandlerT>,
ResultSerializer, SPSTagTs...>;
return WFHH::apply(std::forward<HandlerT>(Handler), ArgData, ArgSize);
}
/// Handle a call to an async wrapper function.
template <typename HandlerT, typename SendResultT>
static void handleAsync(const char *ArgData, size_t ArgSize,
HandlerT &&Handler, SendResultT &&SendResult) {
using WFAHH = detail::WrapperFunctionAsyncHandlerHelper<
std::remove_reference_t<HandlerT>, ResultSerializer, SPSTagTs...>;
WFAHH::applyAsync(std::forward<HandlerT>(Handler),
std::forward<SendResultT>(SendResult), ArgData, ArgSize);
}
private:
template <typename T> static const T &makeSerializable(const T &Value) {
return Value;
}
static detail::SPSSerializableError makeSerializable(Error Err) {
return detail::toSPSSerializable(std::move(Err));
}
template <typename T>
static detail::SPSSerializableExpected<T> makeSerializable(Expected<T> E) {
return detail::toSPSSerializable(std::move(E));
}
};
template <typename... SPSTagTs>
class WrapperFunction<void(SPSTagTs...)>
: private WrapperFunction<SPSEmpty(SPSTagTs...)> {
public:
template <typename CallerFn, typename... ArgTs>
static Error call(const CallerFn &Caller, const ArgTs &...Args) {
SPSEmpty BE;
return WrapperFunction<SPSEmpty(SPSTagTs...)>::call(Caller, BE, Args...);
}
template <typename AsyncCallerFn, typename SendDeserializedResultFn,
typename... ArgTs>
static void callAsync(AsyncCallerFn &&Caller,
SendDeserializedResultFn &&SendDeserializedResult,
const ArgTs &...Args) {
WrapperFunction<SPSEmpty(SPSTagTs...)>::callAsync(
std::forward<AsyncCallerFn>(Caller),
[SDR = std::move(SendDeserializedResult)](Error SerializeErr,
SPSEmpty E) mutable {
SDR(std::move(SerializeErr));
},
Args...);
}
using WrapperFunction<SPSEmpty(SPSTagTs...)>::handle;
using WrapperFunction<SPSEmpty(SPSTagTs...)>::handleAsync;
};
/// A function object that takes an ExecutorAddr as its first argument,
/// casts that address to a ClassT*, then calls the given method on that
/// pointer passing in the remaining function arguments. This utility
/// removes some of the boilerplate from writing wrappers for method calls.
///
/// @code{.cpp}
/// class MyClass {
/// public:
/// void myMethod(uint32_t, bool) { ... }
/// };
///
/// // SPS Method signature -- note MyClass object address as first argument.
/// using SPSMyMethodWrapperSignature =
/// SPSTuple<SPSExecutorAddr, uint32_t, bool>;
///
/// WrapperFunctionResult
/// myMethodCallWrapper(const char *ArgData, size_t ArgSize) {
/// return WrapperFunction<SPSMyMethodWrapperSignature>::handle(
/// ArgData, ArgSize, makeMethodWrapperHandler(&MyClass::myMethod));
/// }
/// @endcode
///
template <typename RetT, typename ClassT, typename... ArgTs>
class MethodWrapperHandler {
public:
using MethodT = RetT (ClassT::*)(ArgTs...);
MethodWrapperHandler(MethodT M) : M(M) {}
RetT operator()(ExecutorAddr ObjAddr, ArgTs &...Args) {
return (ObjAddr.toPtr<ClassT*>()->*M)(std::forward<ArgTs>(Args)...);
}
private:
MethodT M;
};
/// Create a MethodWrapperHandler object from the given method pointer.
template <typename RetT, typename ClassT, typename... ArgTs>
MethodWrapperHandler<RetT, ClassT, ArgTs...>
makeMethodWrapperHandler(RetT (ClassT::*Method)(ArgTs...)) {
return MethodWrapperHandler<RetT, ClassT, ArgTs...>(Method);
}
/// Represents a serialized wrapper function call.
/// Serializing calls themselves allows us to batch them: We can make one
/// "run-wrapper-functions" utility and send it a list of calls to run.
///
/// The motivating use-case for this API is JITLink allocation actions, where
/// we want to run multiple functions to finalize linked memory without having
/// to make separate IPC calls for each one.
class WrapperFunctionCall {
public:
using ArgDataBufferType = SmallVector<char, 24>;
/// Create a WrapperFunctionCall using the given SPS serializer to serialize
/// the arguments.
template <typename SPSSerializer, typename... ArgTs>
static Expected<WrapperFunctionCall> Create(ExecutorAddr FnAddr,
const ArgTs &...Args) {
ArgDataBufferType ArgData;
ArgData.resize(SPSSerializer::size(Args...));
SPSOutputBuffer OB(ArgData.empty() ? nullptr : ArgData.data(),
ArgData.size());
if (SPSSerializer::serialize(OB, Args...))
return WrapperFunctionCall(FnAddr, std::move(ArgData));
return make_error<StringError>("Cannot serialize arguments for "
"AllocActionCall",
inconvertibleErrorCode());
}
WrapperFunctionCall() = default;
/// Create a WrapperFunctionCall from a target function and arg buffer.
WrapperFunctionCall(ExecutorAddr FnAddr, ArgDataBufferType ArgData)
: FnAddr(FnAddr), ArgData(std::move(ArgData)) {}
/// Returns the address to be called.
const ExecutorAddr &getCallee() const { return FnAddr; }
/// Returns the argument data.
const ArgDataBufferType &getArgData() const { return ArgData; }
/// WrapperFunctionCalls convert to true if the callee is non-null.
explicit operator bool() const { return !!FnAddr; }
/// Run call returning raw WrapperFunctionResult.
shared::WrapperFunctionResult run() const {
using FnTy =
shared::CWrapperFunctionResult(const char *ArgData, size_t ArgSize);
return shared::WrapperFunctionResult(
FnAddr.toPtr<FnTy *>()(ArgData.data(), ArgData.size()));
}
/// Run call and deserialize result using SPS.
template <typename SPSRetT, typename RetT>
std::enable_if_t<!std::is_same<SPSRetT, void>::value, Error>
runWithSPSRet(RetT &RetVal) const {
auto WFR = run();
if (const char *ErrMsg = WFR.getOutOfBandError())
return make_error<StringError>(ErrMsg, inconvertibleErrorCode());
shared::SPSInputBuffer IB(WFR.data(), WFR.size());
if (!shared::SPSSerializationTraits<SPSRetT, RetT>::deserialize(IB, RetVal))
return make_error<StringError>("Could not deserialize result from "
"serialized wrapper function call",
inconvertibleErrorCode());
return Error::success();
}
/// Overload for SPS functions returning void.
template <typename SPSRetT>
std::enable_if_t<std::is_same<SPSRetT, void>::value, Error>
runWithSPSRet() const {
shared::SPSEmpty E;
return runWithSPSRet<shared::SPSEmpty>(E);
}
/// Run call and deserialize an SPSError result. SPSError returns and
/// deserialization failures are merged into the returned error.
Error runWithSPSRetErrorMerged() const {
detail::SPSSerializableError RetErr;
if (auto Err = runWithSPSRet<SPSError>(RetErr))
return Err;
return detail::fromSPSSerializable(std::move(RetErr));
}
private:
orc::ExecutorAddr FnAddr;
ArgDataBufferType ArgData;
};
using SPSWrapperFunctionCall = SPSTuple<SPSExecutorAddr, SPSSequence<char>>;
template <>
class SPSSerializationTraits<SPSWrapperFunctionCall, WrapperFunctionCall> {
public:
static size_t size(const WrapperFunctionCall &WFC) {
return SPSWrapperFunctionCall::AsArgList::size(WFC.getCallee(),
WFC.getArgData());
}
static bool serialize(SPSOutputBuffer &OB, const WrapperFunctionCall &WFC) {
return SPSWrapperFunctionCall::AsArgList::serialize(OB, WFC.getCallee(),
WFC.getArgData());
}
static bool deserialize(SPSInputBuffer &IB, WrapperFunctionCall &WFC) {
ExecutorAddr FnAddr;
WrapperFunctionCall::ArgDataBufferType ArgData;
if (!SPSWrapperFunctionCall::AsArgList::deserialize(IB, FnAddr, ArgData))
return false;
WFC = WrapperFunctionCall(FnAddr, std::move(ArgData));
return true;
}
};
} // end namespace shared
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_SHARED_WRAPPERFUNCTIONUTILS_H
PK iwFZ���j� � ExecutionEngine/Orc/Layer.hnu �[��� //===---------------- Layer.h -- Layer interfaces --------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Layer interfaces.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_LAYER_H
#define LLVM_EXECUTIONENGINE_ORC_LAYER_H
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/ExecutionEngine/Orc/Mangling.h"
#include "llvm/ExecutionEngine/Orc/ThreadSafeModule.h"
#include "llvm/IR/Module.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/ExtensibleRTTI.h"
#include "llvm/Support/MemoryBuffer.h"
namespace llvm {
namespace orc {
/// IRMaterializationUnit is a convenient base class for MaterializationUnits
/// wrapping LLVM IR. Represents materialization responsibility for all symbols
/// in the given module. If symbols are overridden by other definitions, then
/// their linkage is changed to available-externally.
class IRMaterializationUnit : public MaterializationUnit {
public:
using SymbolNameToDefinitionMap = std::map<SymbolStringPtr, GlobalValue *>;
/// Create an IRMaterializationLayer. Scans the module to build the
/// SymbolFlags and SymbolToDefinition maps.
IRMaterializationUnit(ExecutionSession &ES,
const IRSymbolMapper::ManglingOptions &MO,
ThreadSafeModule TSM);
/// Create an IRMaterializationLayer from a module, and pre-existing
/// SymbolFlags and SymbolToDefinition maps. The maps must provide
/// entries for each definition in M.
/// This constructor is useful for delegating work from one
/// IRMaterializationUnit to another.
IRMaterializationUnit(ThreadSafeModule TSM, Interface I,
SymbolNameToDefinitionMap SymbolToDefinition);
/// Return the ModuleIdentifier as the name for this MaterializationUnit.
StringRef getName() const override;
/// Return a reference to the contained ThreadSafeModule.
const ThreadSafeModule &getModule() const { return TSM; }
protected:
ThreadSafeModule TSM;
SymbolNameToDefinitionMap SymbolToDefinition;
private:
static SymbolStringPtr getInitSymbol(ExecutionSession &ES,
const ThreadSafeModule &TSM);
void discard(const JITDylib &JD, const SymbolStringPtr &Name) override;
};
/// Interface for layers that accept LLVM IR.
class IRLayer {
public:
IRLayer(ExecutionSession &ES, const IRSymbolMapper::ManglingOptions *&MO)
: ES(ES), MO(MO) {}
virtual ~IRLayer();
/// Returns the ExecutionSession for this layer.
ExecutionSession &getExecutionSession() { return ES; }
/// Get the mangling options for this layer.
const IRSymbolMapper::ManglingOptions *&getManglingOptions() const {
return MO;
}
/// Sets the CloneToNewContextOnEmit flag (false by default).
///
/// When set, IR modules added to this layer will be cloned on to a new
/// context before emit is called. This can be used by clients who want
/// to load all IR using one LLVMContext (to save memory via type and
/// constant uniquing), but want to move Modules to fresh contexts before
/// compiling them to enable concurrent compilation.
/// Single threaded clients, or clients who load every module on a new
/// context, need not set this.
void setCloneToNewContextOnEmit(bool CloneToNewContextOnEmit) {
this->CloneToNewContextOnEmit = CloneToNewContextOnEmit;
}
/// Returns the current value of the CloneToNewContextOnEmit flag.
bool getCloneToNewContextOnEmit() const { return CloneToNewContextOnEmit; }
/// Add a MaterializatinoUnit representing the given IR to the JITDylib
/// targeted by the given tracker.
virtual Error add(ResourceTrackerSP RT, ThreadSafeModule TSM);
/// Adds a MaterializationUnit representing the given IR to the given
/// JITDylib. If RT is not specif
Error add(JITDylib &JD, ThreadSafeModule TSM) {
return add(JD.getDefaultResourceTracker(), std::move(TSM));
}
/// Emit should materialize the given IR.
virtual void emit(std::unique_ptr<MaterializationResponsibility> R,
ThreadSafeModule TSM) = 0;
private:
bool CloneToNewContextOnEmit = false;
ExecutionSession &ES;
const IRSymbolMapper::ManglingOptions *&MO;
};
/// MaterializationUnit that materializes modules by calling the 'emit' method
/// on the given IRLayer.
class BasicIRLayerMaterializationUnit : public IRMaterializationUnit {
public:
BasicIRLayerMaterializationUnit(IRLayer &L,
const IRSymbolMapper::ManglingOptions &MO,
ThreadSafeModule TSM);
private:
void materialize(std::unique_ptr<MaterializationResponsibility> R) override;
IRLayer &L;
};
/// Interface for Layers that accept object files.
class ObjectLayer : public RTTIExtends<ObjectLayer, RTTIRoot> {
public:
static char ID;
ObjectLayer(ExecutionSession &ES);
virtual ~ObjectLayer();
/// Returns the execution session for this layer.
ExecutionSession &getExecutionSession() { return ES; }
/// Adds a MaterializationUnit for the object file in the given memory buffer
/// to the JITDylib for the given ResourceTracker.
virtual Error add(ResourceTrackerSP RT, std::unique_ptr<MemoryBuffer> O,
MaterializationUnit::Interface I);
/// Adds a MaterializationUnit for the object file in the given memory buffer
/// to the JITDylib for the given ResourceTracker. The interface for the
/// object will be built using the default object interface builder.
Error add(ResourceTrackerSP RT, std::unique_ptr<MemoryBuffer> O);
/// Adds a MaterializationUnit for the object file in the given memory buffer
/// to the given JITDylib.
Error add(JITDylib &JD, std::unique_ptr<MemoryBuffer> O,
MaterializationUnit::Interface I) {
return add(JD.getDefaultResourceTracker(), std::move(O), std::move(I));
}
/// Adds a MaterializationUnit for the object file in the given memory buffer
/// to the given JITDylib. The interface for the object will be built using
/// the default object interface builder.
Error add(JITDylib &JD, std::unique_ptr<MemoryBuffer> O);
/// Emit should materialize the given IR.
virtual void emit(std::unique_ptr<MaterializationResponsibility> R,
std::unique_ptr<MemoryBuffer> O) = 0;
private:
ExecutionSession &ES;
};
/// Materializes the given object file (represented by a MemoryBuffer
/// instance) by calling 'emit' on the given ObjectLayer.
class BasicObjectLayerMaterializationUnit : public MaterializationUnit {
public:
/// Create using the default object interface builder function.
static Expected<std::unique_ptr<BasicObjectLayerMaterializationUnit>>
Create(ObjectLayer &L, std::unique_ptr<MemoryBuffer> O);
BasicObjectLayerMaterializationUnit(ObjectLayer &L,
std::unique_ptr<MemoryBuffer> O,
Interface I);
/// Return the buffer's identifier as the name for this MaterializationUnit.
StringRef getName() const override;
private:
void materialize(std::unique_ptr<MaterializationResponsibility> R) override;
void discard(const JITDylib &JD, const SymbolStringPtr &Name) override;
ObjectLayer &L;
std::unique_ptr<MemoryBuffer> O;
};
} // End namespace orc
} // End namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_LAYER_H
PK iwFZC��)n" n" " ExecutionEngine/Orc/COFFPlatform.hnu �[��� //===--- COFFPlatform.h -- Utilities for executing COFF in Orc --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Utilities for executing JIT'd COFF in Orc.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_COFFPLATFORM_H
#define LLVM_EXECUTIONENGINE_ORC_COFFPLATFORM_H
#include "llvm/ADT/StringRef.h"
#include "llvm/ExecutionEngine/Orc/COFFVCRuntimeSupport.h"
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/ExecutionEngine/Orc/ExecutionUtils.h"
#include "llvm/ExecutionEngine/Orc/ExecutorProcessControl.h"
#include "llvm/ExecutionEngine/Orc/ObjectLinkingLayer.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include <future>
#include <memory>
#include <thread>
#include <vector>
namespace llvm {
namespace orc {
/// Mediates between COFF initialization and ExecutionSession state.
class COFFPlatform : public Platform {
public:
/// A function that will be called with the name of dll file that must be
/// loaded.
using LoadDynamicLibrary =
unique_function<Error(JITDylib &JD, StringRef DLLFileName)>;
/// Try to create a COFFPlatform instance, adding the ORC runtime to the
/// given JITDylib.
static Expected<std::unique_ptr<COFFPlatform>>
Create(ExecutionSession &ES, ObjectLinkingLayer &ObjLinkingLayer,
JITDylib &PlatformJD,
std::unique_ptr<MemoryBuffer> OrcRuntimeArchiveBuffer,
LoadDynamicLibrary LoadDynLibrary, bool StaticVCRuntime = false,
const char *VCRuntimePath = nullptr,
std::optional<SymbolAliasMap> RuntimeAliases = std::nullopt);
static Expected<std::unique_ptr<COFFPlatform>>
Create(ExecutionSession &ES, ObjectLinkingLayer &ObjLinkingLayer,
JITDylib &PlatformJD, const char *OrcRuntimePath,
LoadDynamicLibrary LoadDynLibrary, bool StaticVCRuntime = false,
const char *VCRuntimePath = nullptr,
std::optional<SymbolAliasMap> RuntimeAliases = std::nullopt);
ExecutionSession &getExecutionSession() const { return ES; }
ObjectLinkingLayer &getObjectLinkingLayer() const { return ObjLinkingLayer; }
Error setupJITDylib(JITDylib &JD) override;
Error teardownJITDylib(JITDylib &JD) override;
Error notifyAdding(ResourceTracker &RT,
const MaterializationUnit &MU) override;
Error notifyRemoving(ResourceTracker &RT) override;
/// Returns an AliasMap containing the default aliases for the COFFPlatform.
/// This can be modified by clients when constructing the platform to add
/// or remove aliases.
static SymbolAliasMap standardPlatformAliases(ExecutionSession &ES);
/// Returns the array of required CXX aliases.
static ArrayRef<std::pair<const char *, const char *>> requiredCXXAliases();
/// Returns the array of standard runtime utility aliases for COFF.
static ArrayRef<std::pair<const char *, const char *>>
standardRuntimeUtilityAliases();
static StringRef getSEHFrameSectionName() { return ".pdata"; }
private:
using COFFJITDylibDepInfo = std::vector<ExecutorAddr>;
using COFFJITDylibDepInfoMap =
std::vector<std::pair<ExecutorAddr, COFFJITDylibDepInfo>>;
using COFFObjectSectionsMap =
SmallVector<std::pair<std::string, ExecutorAddrRange>>;
using PushInitializersSendResultFn =
unique_function<void(Expected<COFFJITDylibDepInfoMap>)>;
using SendSymbolAddressFn = unique_function<void(Expected<ExecutorAddr>)>;
using JITDylibDepMap = DenseMap<JITDylib *, SmallVector<JITDylib *>>;
// The COFFPlatformPlugin scans/modifies LinkGraphs to support COFF
// platform features including initializers, exceptions, and language
// runtime registration.
class COFFPlatformPlugin : public ObjectLinkingLayer::Plugin {
public:
COFFPlatformPlugin(COFFPlatform &CP) : CP(CP) {}
void modifyPassConfig(MaterializationResponsibility &MR,
jitlink::LinkGraph &G,
jitlink::PassConfiguration &Config) override;
SyntheticSymbolDependenciesMap
getSyntheticSymbolDependencies(MaterializationResponsibility &MR) override;
// FIXME: We should be tentatively tracking scraped sections and discarding
// if the MR fails.
Error notifyFailed(MaterializationResponsibility &MR) override {
return Error::success();
}
Error notifyRemovingResources(JITDylib &JD, ResourceKey K) override {
return Error::success();
}
void notifyTransferringResources(JITDylib &JD, ResourceKey DstKey,
ResourceKey SrcKey) override {}
private:
using InitSymbolDepMap =
DenseMap<MaterializationResponsibility *, JITLinkSymbolSet>;
Error associateJITDylibHeaderSymbol(jitlink::LinkGraph &G,
MaterializationResponsibility &MR,
bool Bootstrap);
Error preserveInitializerSections(jitlink::LinkGraph &G,
MaterializationResponsibility &MR);
Error registerObjectPlatformSections(jitlink::LinkGraph &G, JITDylib &JD);
Error registerObjectPlatformSectionsInBootstrap(jitlink::LinkGraph &G,
JITDylib &JD);
std::mutex PluginMutex;
COFFPlatform &CP;
InitSymbolDepMap InitSymbolDeps;
};
struct JDBootstrapState {
JITDylib *JD = nullptr;
std::string JDName;
ExecutorAddr HeaderAddr;
std::list<COFFObjectSectionsMap> ObjectSectionsMaps;
SmallVector<std::pair<std::string, ExecutorAddr>> Initializers;
};
static bool supportedTarget(const Triple &TT);
COFFPlatform(
ExecutionSession &ES, ObjectLinkingLayer &ObjLinkingLayer,
JITDylib &PlatformJD,
std::unique_ptr<StaticLibraryDefinitionGenerator> OrcRuntimeGenerator,
std::unique_ptr<MemoryBuffer> OrcRuntimeArchiveBuffer,
std::unique_ptr<object::Archive> OrcRuntimeArchive,
LoadDynamicLibrary LoadDynLibrary, bool StaticVCRuntime,
const char *VCRuntimePath, Error &Err);
// Associate COFFPlatform JIT-side runtime support functions with handlers.
Error associateRuntimeSupportFunctions(JITDylib &PlatformJD);
// Records the addresses of runtime symbols used by the platform.
Error bootstrapCOFFRuntime(JITDylib &PlatformJD);
// Run a specific void function if it exists.
Error runSymbolIfExists(JITDylib &PlatformJD, StringRef SymbolName);
// Run collected initializers in boostrap stage.
Error runBootstrapInitializers(JDBootstrapState &BState);
Error runBootstrapSubsectionInitializers(JDBootstrapState &BState,
StringRef Start, StringRef End);
// Build dependency graph of a JITDylib
Expected<JITDylibDepMap> buildJDDepMap(JITDylib &JD);
Expected<MemoryBufferRef> getPerJDObjectFile();
// Implements rt_pushInitializers by making repeat async lookups for
// initializer symbols (each lookup may spawn more initializer symbols if
// it pulls in new materializers, e.g. from objects in a static library).
void pushInitializersLoop(PushInitializersSendResultFn SendResult,
JITDylibSP JD, JITDylibDepMap &JDDepMap);
void rt_pushInitializers(PushInitializersSendResultFn SendResult,
ExecutorAddr JDHeaderAddr);
void rt_lookupSymbol(SendSymbolAddressFn SendResult, ExecutorAddr Handle,
StringRef SymbolName);
ExecutionSession &ES;
ObjectLinkingLayer &ObjLinkingLayer;
LoadDynamicLibrary LoadDynLibrary;
std::unique_ptr<COFFVCRuntimeBootstrapper> VCRuntimeBootstrap;
std::unique_ptr<MemoryBuffer> OrcRuntimeArchiveBuffer;
std::unique_ptr<object::Archive> OrcRuntimeArchive;
bool StaticVCRuntime;
SymbolStringPtr COFFHeaderStartSymbol;
// State of bootstrap in progress
std::map<JITDylib *, JDBootstrapState> JDBootstrapStates;
std::atomic<bool> Bootstrapping;
ExecutorAddr orc_rt_coff_platform_bootstrap;
ExecutorAddr orc_rt_coff_platform_shutdown;
ExecutorAddr orc_rt_coff_register_object_sections;
ExecutorAddr orc_rt_coff_deregister_object_sections;
ExecutorAddr orc_rt_coff_register_jitdylib;
ExecutorAddr orc_rt_coff_deregister_jitdylib;
DenseMap<JITDylib *, ExecutorAddr> JITDylibToHeaderAddr;
DenseMap<ExecutorAddr, JITDylib *> HeaderAddrToJITDylib;
DenseMap<JITDylib *, SymbolLookupSet> RegisteredInitSymbols;
std::set<std::string> DylibsToPreload;
std::mutex PlatformMutex;
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_COFFPLATFORM_H
PK iwFZVLoV� � - ExecutionEngine/Orc/EPCDebugObjectRegistrar.hnu �[��� //===- EPCDebugObjectRegistrar.h - EPC-based debug registration -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// ExecutorProcessControl based registration of debug objects.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_EPCDEBUGOBJECTREGISTRAR_H
#define LLVM_EXECUTIONENGINE_ORC_EPCDEBUGOBJECTREGISTRAR_H
#include "llvm/ExecutionEngine/JITSymbol.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include "llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/Memory.h"
#include <cstdint>
#include <memory>
#include <vector>
namespace llvm {
namespace orc {
class ExecutionSession;
/// Abstract interface for registering debug objects in the executor process.
class DebugObjectRegistrar {
public:
virtual Error registerDebugObject(ExecutorAddrRange TargetMem,
bool AutoRegisterCode) = 0;
virtual ~DebugObjectRegistrar() = default;
};
/// Use ExecutorProcessControl to register debug objects locally or in a remote
/// executor process.
class EPCDebugObjectRegistrar : public DebugObjectRegistrar {
public:
EPCDebugObjectRegistrar(ExecutionSession &ES, ExecutorAddr RegisterFn)
: ES(ES), RegisterFn(RegisterFn) {}
Error registerDebugObject(ExecutorAddrRange TargetMem,
bool AutoRegisterCode) override;
private:
ExecutionSession &ES;
ExecutorAddr RegisterFn;
};
/// Create a ExecutorProcessControl-based DebugObjectRegistrar that emits debug
/// objects to the GDB JIT interface. This will use the EPC's lookupSymbols
/// method to find the registration/deregistration function addresses by name.
///
/// If RegistrationFunctionsDylib is non-None then it will be searched to find
/// the registration functions. If it is None then the process dylib will be
/// loaded to find the registration functions.
Expected<std::unique_ptr<EPCDebugObjectRegistrar>> createJITLoaderGDBRegistrar(
ExecutionSession &ES,
std::optional<ExecutorAddr> RegistrationFunctionDylib = std::nullopt);
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_EPCDEBUGOBJECTREGISTRAR_H
PK iwFZ���". . * ExecutionEngine/Orc/ObjectTransformLayer.hnu �[��� //===- ObjectTransformLayer.h - Run all objects through functor -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Run all objects passed in through a user supplied functor.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_OBJECTTRANSFORMLAYER_H
#define LLVM_EXECUTIONENGINE_ORC_OBJECTTRANSFORMLAYER_H
#include "llvm/ExecutionEngine/JITSymbol.h"
#include "llvm/ExecutionEngine/Orc/Layer.h"
#include <algorithm>
#include <memory>
namespace llvm {
namespace orc {
class ObjectTransformLayer
: public RTTIExtends<ObjectTransformLayer, ObjectLayer> {
public:
static char ID;
using TransformFunction =
std::function<Expected<std::unique_ptr<MemoryBuffer>>(
std::unique_ptr<MemoryBuffer>)>;
ObjectTransformLayer(ExecutionSession &ES, ObjectLayer &BaseLayer,
TransformFunction Transform = TransformFunction());
void emit(std::unique_ptr<MaterializationResponsibility> R,
std::unique_ptr<MemoryBuffer> O) override;
void setTransform(TransformFunction Transform) {
this->Transform = std::move(Transform);
}
private:
ObjectLayer &BaseLayer;
TransformFunction Transform;
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_OBJECTTRANSFORMLAYER_H
PK iwFZ��~j� � " ExecutionEngine/Orc/CompileUtils.hnu �[��� //===- CompileUtils.h - Utilities for compiling IR in the JIT ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Contains utilities for compiling IR to object files.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_COMPILEUTILS_H
#define LLVM_EXECUTIONENGINE_ORC_COMPILEUTILS_H
#include "llvm/ExecutionEngine/Orc/IRCompileLayer.h"
#include "llvm/ExecutionEngine/Orc/JITTargetMachineBuilder.h"
#include "llvm/ExecutionEngine/Orc/Layer.h"
#include <memory>
namespace llvm {
class MemoryBuffer;
class Module;
class ObjectCache;
class TargetMachine;
namespace orc {
IRSymbolMapper::ManglingOptions
irManglingOptionsFromTargetOptions(const TargetOptions &Opts);
/// Simple compile functor: Takes a single IR module and returns an ObjectFile.
/// This compiler supports a single compilation thread and LLVMContext only.
/// For multithreaded compilation, use ConcurrentIRCompiler below.
class SimpleCompiler : public IRCompileLayer::IRCompiler {
public:
using CompileResult = std::unique_ptr<MemoryBuffer>;
/// Construct a simple compile functor with the given target.
SimpleCompiler(TargetMachine &TM, ObjectCache *ObjCache = nullptr)
: IRCompiler(irManglingOptionsFromTargetOptions(TM.Options)), TM(TM),
ObjCache(ObjCache) {}
/// Set an ObjectCache to query before compiling.
void setObjectCache(ObjectCache *NewCache) { ObjCache = NewCache; }
/// Compile a Module to an ObjectFile.
Expected<CompileResult> operator()(Module &M) override;
private:
IRSymbolMapper::ManglingOptions
manglingOptionsForTargetMachine(const TargetMachine &TM);
CompileResult tryToLoadFromObjectCache(const Module &M);
void notifyObjectCompiled(const Module &M, const MemoryBuffer &ObjBuffer);
TargetMachine &TM;
ObjectCache *ObjCache = nullptr;
};
/// A SimpleCompiler that owns its TargetMachine.
///
/// This convenient for clients who don't want to own their TargetMachines,
/// e.g. LLJIT.
class TMOwningSimpleCompiler : public SimpleCompiler {
public:
TMOwningSimpleCompiler(std::unique_ptr<TargetMachine> TM,
ObjectCache *ObjCache = nullptr)
: SimpleCompiler(*TM, ObjCache), TM(std::move(TM)) {}
private:
// FIXME: shared because std::functions (and consequently
// IRCompileLayer::CompileFunction) are not moveable.
std::shared_ptr<llvm::TargetMachine> TM;
};
/// A thread-safe version of SimpleCompiler.
///
/// This class creates a new TargetMachine and SimpleCompiler instance for each
/// compile.
class ConcurrentIRCompiler : public IRCompileLayer::IRCompiler {
public:
ConcurrentIRCompiler(JITTargetMachineBuilder JTMB,
ObjectCache *ObjCache = nullptr);
void setObjectCache(ObjectCache *ObjCache) { this->ObjCache = ObjCache; }
Expected<std::unique_ptr<MemoryBuffer>> operator()(Module &M) override;
private:
JITTargetMachineBuilder JTMB;
ObjectCache *ObjCache = nullptr;
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_COMPILEUTILS_H
PK iwFZa�پ # ExecutionEngine/Orc/LazyReexports.hnu �[��� //===------ LazyReexports.h -- Utilities for lazy reexports -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Lazy re-exports are similar to normal re-exports, except that for callable
// symbols the definitions are replaced with trampolines that will look up and
// call through to the re-exported symbol at runtime. This can be used to
// enable lazy compilation.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_LAZYREEXPORTS_H
#define LLVM_EXECUTIONENGINE_ORC_LAZYREEXPORTS_H
#include "llvm/ADT/STLExtras.h"
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/ExecutionEngine/Orc/IndirectionUtils.h"
#include "llvm/ExecutionEngine/Orc/Speculation.h"
namespace llvm {
class Triple;
namespace orc {
/// Manages a set of 'lazy call-through' trampolines. These are compiler
/// re-entry trampolines that are pre-bound to look up a given symbol in a given
/// JITDylib, then jump to that address. Since compilation of symbols is
/// triggered on first lookup, these call-through trampolines can be used to
/// implement lazy compilation.
///
/// The easiest way to construct these call-throughs is using the lazyReexport
/// function.
class LazyCallThroughManager {
public:
using NotifyResolvedFunction =
unique_function<Error(ExecutorAddr ResolvedAddr)>;
LazyCallThroughManager(ExecutionSession &ES, ExecutorAddr ErrorHandlerAddr,
TrampolinePool *TP);
// Return a free call-through trampoline and bind it to look up and call
// through to the given symbol.
Expected<ExecutorAddr>
getCallThroughTrampoline(JITDylib &SourceJD, SymbolStringPtr SymbolName,
NotifyResolvedFunction NotifyResolved);
void resolveTrampolineLandingAddress(
ExecutorAddr TrampolineAddr,
TrampolinePool::NotifyLandingResolvedFunction NotifyLandingResolved);
virtual ~LazyCallThroughManager() = default;
protected:
using NotifyLandingResolvedFunction =
TrampolinePool::NotifyLandingResolvedFunction;
struct ReexportsEntry {
JITDylib *SourceJD;
SymbolStringPtr SymbolName;
};
ExecutorAddr reportCallThroughError(Error Err);
Expected<ReexportsEntry> findReexport(ExecutorAddr TrampolineAddr);
Error notifyResolved(ExecutorAddr TrampolineAddr, ExecutorAddr ResolvedAddr);
void setTrampolinePool(TrampolinePool &TP) { this->TP = &TP; }
private:
using ReexportsMap = std::map<ExecutorAddr, ReexportsEntry>;
using NotifiersMap = std::map<ExecutorAddr, NotifyResolvedFunction>;
std::mutex LCTMMutex;
ExecutionSession &ES;
ExecutorAddr ErrorHandlerAddr;
TrampolinePool *TP = nullptr;
ReexportsMap Reexports;
NotifiersMap Notifiers;
};
/// A lazy call-through manager that builds trampolines in the current process.
class LocalLazyCallThroughManager : public LazyCallThroughManager {
private:
using NotifyTargetResolved = unique_function<void(ExecutorAddr)>;
LocalLazyCallThroughManager(ExecutionSession &ES,
ExecutorAddr ErrorHandlerAddr)
: LazyCallThroughManager(ES, ErrorHandlerAddr, nullptr) {}
template <typename ORCABI> Error init() {
auto TP = LocalTrampolinePool<ORCABI>::Create(
[this](ExecutorAddr TrampolineAddr,
TrampolinePool::NotifyLandingResolvedFunction
NotifyLandingResolved) {
resolveTrampolineLandingAddress(TrampolineAddr,
std::move(NotifyLandingResolved));
});
if (!TP)
return TP.takeError();
this->TP = std::move(*TP);
setTrampolinePool(*this->TP);
return Error::success();
}
std::unique_ptr<TrampolinePool> TP;
public:
/// Create a LocalLazyCallThroughManager using the given ABI. See
/// createLocalLazyCallThroughManager.
template <typename ORCABI>
static Expected<std::unique_ptr<LocalLazyCallThroughManager>>
Create(ExecutionSession &ES, ExecutorAddr ErrorHandlerAddr) {
auto LLCTM = std::unique_ptr<LocalLazyCallThroughManager>(
new LocalLazyCallThroughManager(ES, ErrorHandlerAddr));
if (auto Err = LLCTM->init<ORCABI>())
return std::move(Err);
return std::move(LLCTM);
}
};
/// Create a LocalLazyCallThroughManager from the given triple and execution
/// session.
Expected<std::unique_ptr<LazyCallThroughManager>>
createLocalLazyCallThroughManager(const Triple &T, ExecutionSession &ES,
ExecutorAddr ErrorHandlerAddr);
/// A materialization unit that builds lazy re-exports. These are callable
/// entry points that call through to the given symbols.
/// Unlike a 'true' re-export, the address of the lazy re-export will not
/// match the address of the re-exported symbol, but calling it will behave
/// the same as calling the re-exported symbol.
class LazyReexportsMaterializationUnit : public MaterializationUnit {
public:
LazyReexportsMaterializationUnit(LazyCallThroughManager &LCTManager,
IndirectStubsManager &ISManager,
JITDylib &SourceJD,
SymbolAliasMap CallableAliases,
ImplSymbolMap *SrcJDLoc);
StringRef getName() const override;
private:
void materialize(std::unique_ptr<MaterializationResponsibility> R) override;
void discard(const JITDylib &JD, const SymbolStringPtr &Name) override;
static MaterializationUnit::Interface
extractFlags(const SymbolAliasMap &Aliases);
LazyCallThroughManager &LCTManager;
IndirectStubsManager &ISManager;
JITDylib &SourceJD;
SymbolAliasMap CallableAliases;
ImplSymbolMap *AliaseeTable;
};
/// Define lazy-reexports based on the given SymbolAliasMap. Each lazy re-export
/// is a callable symbol that will look up and dispatch to the given aliasee on
/// first call. All subsequent calls will go directly to the aliasee.
inline std::unique_ptr<LazyReexportsMaterializationUnit>
lazyReexports(LazyCallThroughManager &LCTManager,
IndirectStubsManager &ISManager, JITDylib &SourceJD,
SymbolAliasMap CallableAliases,
ImplSymbolMap *SrcJDLoc = nullptr) {
return std::make_unique<LazyReexportsMaterializationUnit>(
LCTManager, ISManager, SourceJD, std::move(CallableAliases), SrcJDLoc);
}
} // End namespace orc
} // End namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_LAZYREEXPORTS_H
PK iwFZ�&�7Q 7Q & ExecutionEngine/Orc/IndirectionUtils.hnu �[��� //===- IndirectionUtils.h - Utilities for adding indirections ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Contains utilities for adding indirections and breaking up modules.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_INDIRECTIONUTILS_H
#define LLVM_EXECUTIONENGINE_ORC_INDIRECTIONUTILS_H
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ExecutionEngine/JITSymbol.h"
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/ExecutionEngine/Orc/OrcABISupport.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/Memory.h"
#include "llvm/Support/Process.h"
#include "llvm/Transforms/Utils/ValueMapper.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
#include <functional>
#include <future>
#include <map>
#include <memory>
#include <system_error>
#include <utility>
#include <vector>
namespace llvm {
class Constant;
class Function;
class FunctionType;
class GlobalAlias;
class GlobalVariable;
class Module;
class PointerType;
class Triple;
class Twine;
class Value;
class MCDisassembler;
class MCInstrAnalysis;
namespace jitlink {
class LinkGraph;
class Symbol;
} // namespace jitlink
namespace orc {
/// Base class for pools of compiler re-entry trampolines.
/// These trampolines are callable addresses that save all register state
/// before calling a supplied function to return the trampoline landing
/// address, then restore all state before jumping to that address. They
/// are used by various ORC APIs to support lazy compilation
class TrampolinePool {
public:
using NotifyLandingResolvedFunction =
unique_function<void(ExecutorAddr) const>;
using ResolveLandingFunction = unique_function<void(
ExecutorAddr TrampolineAddr,
NotifyLandingResolvedFunction OnLandingResolved) const>;
virtual ~TrampolinePool();
/// Get an available trampoline address.
/// Returns an error if no trampoline can be created.
Expected<ExecutorAddr> getTrampoline() {
std::lock_guard<std::mutex> Lock(TPMutex);
if (AvailableTrampolines.empty()) {
if (auto Err = grow())
return std::move(Err);
}
assert(!AvailableTrampolines.empty() && "Failed to grow trampoline pool");
auto TrampolineAddr = AvailableTrampolines.back();
AvailableTrampolines.pop_back();
return TrampolineAddr;
}
/// Returns the given trampoline to the pool for re-use.
void releaseTrampoline(ExecutorAddr TrampolineAddr) {
std::lock_guard<std::mutex> Lock(TPMutex);
AvailableTrampolines.push_back(TrampolineAddr);
}
protected:
virtual Error grow() = 0;
std::mutex TPMutex;
std::vector<ExecutorAddr> AvailableTrampolines;
};
/// A trampoline pool for trampolines within the current process.
template <typename ORCABI> class LocalTrampolinePool : public TrampolinePool {
public:
/// Creates a LocalTrampolinePool with the given RunCallback function.
/// Returns an error if this function is unable to correctly allocate, write
/// and protect the resolver code block.
static Expected<std::unique_ptr<LocalTrampolinePool>>
Create(ResolveLandingFunction ResolveLanding) {
Error Err = Error::success();
auto LTP = std::unique_ptr<LocalTrampolinePool>(
new LocalTrampolinePool(std::move(ResolveLanding), Err));
if (Err)
return std::move(Err);
return std::move(LTP);
}
private:
static JITTargetAddress reenter(void *TrampolinePoolPtr, void *TrampolineId) {
LocalTrampolinePool<ORCABI> *TrampolinePool =
static_cast<LocalTrampolinePool *>(TrampolinePoolPtr);
std::promise<ExecutorAddr> LandingAddressP;
auto LandingAddressF = LandingAddressP.get_future();
TrampolinePool->ResolveLanding(ExecutorAddr::fromPtr(TrampolineId),
[&](ExecutorAddr LandingAddress) {
LandingAddressP.set_value(LandingAddress);
});
return LandingAddressF.get().getValue();
}
LocalTrampolinePool(ResolveLandingFunction ResolveLanding, Error &Err)
: ResolveLanding(std::move(ResolveLanding)) {
ErrorAsOutParameter _(&Err);
/// Try to set up the resolver block.
std::error_code EC;
ResolverBlock = sys::OwningMemoryBlock(sys::Memory::allocateMappedMemory(
ORCABI::ResolverCodeSize, nullptr,
sys::Memory::MF_READ | sys::Memory::MF_WRITE, EC));
if (EC) {
Err = errorCodeToError(EC);
return;
}
ORCABI::writeResolverCode(static_cast<char *>(ResolverBlock.base()),
ExecutorAddr::fromPtr(ResolverBlock.base()),
ExecutorAddr::fromPtr(&reenter),
ExecutorAddr::fromPtr(this));
EC = sys::Memory::protectMappedMemory(ResolverBlock.getMemoryBlock(),
sys::Memory::MF_READ |
sys::Memory::MF_EXEC);
if (EC) {
Err = errorCodeToError(EC);
return;
}
}
Error grow() override {
assert(AvailableTrampolines.empty() && "Growing prematurely?");
std::error_code EC;
auto TrampolineBlock =
sys::OwningMemoryBlock(sys::Memory::allocateMappedMemory(
sys::Process::getPageSizeEstimate(), nullptr,
sys::Memory::MF_READ | sys::Memory::MF_WRITE, EC));
if (EC)
return errorCodeToError(EC);
unsigned NumTrampolines =
(sys::Process::getPageSizeEstimate() - ORCABI::PointerSize) /
ORCABI::TrampolineSize;
char *TrampolineMem = static_cast<char *>(TrampolineBlock.base());
ORCABI::writeTrampolines(
TrampolineMem, ExecutorAddr::fromPtr(TrampolineMem),
ExecutorAddr::fromPtr(ResolverBlock.base()), NumTrampolines);
for (unsigned I = 0; I < NumTrampolines; ++I)
AvailableTrampolines.push_back(
ExecutorAddr::fromPtr(TrampolineMem + (I * ORCABI::TrampolineSize)));
if (auto EC = sys::Memory::protectMappedMemory(
TrampolineBlock.getMemoryBlock(),
sys::Memory::MF_READ | sys::Memory::MF_EXEC))
return errorCodeToError(EC);
TrampolineBlocks.push_back(std::move(TrampolineBlock));
return Error::success();
}
ResolveLandingFunction ResolveLanding;
sys::OwningMemoryBlock ResolverBlock;
std::vector<sys::OwningMemoryBlock> TrampolineBlocks;
};
/// Target-independent base class for compile callback management.
class JITCompileCallbackManager {
public:
using CompileFunction = std::function<ExecutorAddr()>;
virtual ~JITCompileCallbackManager() = default;
/// Reserve a compile callback.
Expected<ExecutorAddr> getCompileCallback(CompileFunction Compile);
/// Execute the callback for the given trampoline id. Called by the JIT
/// to compile functions on demand.
ExecutorAddr executeCompileCallback(ExecutorAddr TrampolineAddr);
protected:
/// Construct a JITCompileCallbackManager.
JITCompileCallbackManager(std::unique_ptr<TrampolinePool> TP,
ExecutionSession &ES,
ExecutorAddr ErrorHandlerAddress)
: TP(std::move(TP)), ES(ES),
CallbacksJD(ES.createBareJITDylib("<Callbacks>")),
ErrorHandlerAddress(ErrorHandlerAddress) {}
void setTrampolinePool(std::unique_ptr<TrampolinePool> TP) {
this->TP = std::move(TP);
}
private:
std::mutex CCMgrMutex;
std::unique_ptr<TrampolinePool> TP;
ExecutionSession &ES;
JITDylib &CallbacksJD;
ExecutorAddr ErrorHandlerAddress;
std::map<ExecutorAddr, SymbolStringPtr> AddrToSymbol;
size_t NextCallbackId = 0;
};
/// Manage compile callbacks for in-process JITs.
template <typename ORCABI>
class LocalJITCompileCallbackManager : public JITCompileCallbackManager {
public:
/// Create a new LocalJITCompileCallbackManager.
static Expected<std::unique_ptr<LocalJITCompileCallbackManager>>
Create(ExecutionSession &ES, ExecutorAddr ErrorHandlerAddress) {
Error Err = Error::success();
auto CCMgr = std::unique_ptr<LocalJITCompileCallbackManager>(
new LocalJITCompileCallbackManager(ES, ErrorHandlerAddress, Err));
if (Err)
return std::move(Err);
return std::move(CCMgr);
}
private:
/// Construct a InProcessJITCompileCallbackManager.
/// @param ErrorHandlerAddress The address of an error handler in the target
/// process to be used if a compile callback fails.
LocalJITCompileCallbackManager(ExecutionSession &ES,
ExecutorAddr ErrorHandlerAddress, Error &Err)
: JITCompileCallbackManager(nullptr, ES, ErrorHandlerAddress) {
using NotifyLandingResolvedFunction =
TrampolinePool::NotifyLandingResolvedFunction;
ErrorAsOutParameter _(&Err);
auto TP = LocalTrampolinePool<ORCABI>::Create(
[this](ExecutorAddr TrampolineAddr,
NotifyLandingResolvedFunction NotifyLandingResolved) {
NotifyLandingResolved(executeCompileCallback(TrampolineAddr));
});
if (!TP) {
Err = TP.takeError();
return;
}
setTrampolinePool(std::move(*TP));
}
};
/// Base class for managing collections of named indirect stubs.
class IndirectStubsManager {
public:
/// Map type for initializing the manager. See init.
using StubInitsMap = StringMap<std::pair<ExecutorAddr, JITSymbolFlags>>;
virtual ~IndirectStubsManager() = default;
/// Create a single stub with the given name, target address and flags.
virtual Error createStub(StringRef StubName, ExecutorAddr StubAddr,
JITSymbolFlags StubFlags) = 0;
/// Create StubInits.size() stubs with the given names, target
/// addresses, and flags.
virtual Error createStubs(const StubInitsMap &StubInits) = 0;
/// Find the stub with the given name. If ExportedStubsOnly is true,
/// this will only return a result if the stub's flags indicate that it
/// is exported.
virtual ExecutorSymbolDef findStub(StringRef Name,
bool ExportedStubsOnly) = 0;
/// Find the implementation-pointer for the stub.
virtual ExecutorSymbolDef findPointer(StringRef Name) = 0;
/// Change the value of the implementation pointer for the stub.
virtual Error updatePointer(StringRef Name, ExecutorAddr NewAddr) = 0;
private:
virtual void anchor();
};
template <typename ORCABI> class LocalIndirectStubsInfo {
public:
LocalIndirectStubsInfo(unsigned NumStubs, sys::OwningMemoryBlock StubsMem)
: NumStubs(NumStubs), StubsMem(std::move(StubsMem)) {}
static Expected<LocalIndirectStubsInfo> create(unsigned MinStubs,
unsigned PageSize) {
auto ISAS = getIndirectStubsBlockSizes<ORCABI>(MinStubs, PageSize);
assert((ISAS.StubBytes % PageSize == 0) &&
"StubBytes is not a page size multiple");
uint64_t PointerAlloc = alignTo(ISAS.PointerBytes, PageSize);
// Allocate memory for stubs and pointers in one call.
std::error_code EC;
auto StubsAndPtrsMem =
sys::OwningMemoryBlock(sys::Memory::allocateMappedMemory(
ISAS.StubBytes + PointerAlloc, nullptr,
sys::Memory::MF_READ | sys::Memory::MF_WRITE, EC));
if (EC)
return errorCodeToError(EC);
sys::MemoryBlock StubsBlock(StubsAndPtrsMem.base(), ISAS.StubBytes);
auto StubsBlockMem = static_cast<char *>(StubsAndPtrsMem.base());
auto PtrBlockAddress =
ExecutorAddr::fromPtr(StubsBlockMem) + ISAS.StubBytes;
ORCABI::writeIndirectStubsBlock(StubsBlockMem,
ExecutorAddr::fromPtr(StubsBlockMem),
PtrBlockAddress, ISAS.NumStubs);
if (auto EC = sys::Memory::protectMappedMemory(
StubsBlock, sys::Memory::MF_READ | sys::Memory::MF_EXEC))
return errorCodeToError(EC);
return LocalIndirectStubsInfo(ISAS.NumStubs, std::move(StubsAndPtrsMem));
}
unsigned getNumStubs() const { return NumStubs; }
void *getStub(unsigned Idx) const {
return static_cast<char *>(StubsMem.base()) + Idx * ORCABI::StubSize;
}
void **getPtr(unsigned Idx) const {
char *PtrsBase =
static_cast<char *>(StubsMem.base()) + NumStubs * ORCABI::StubSize;
return reinterpret_cast<void **>(PtrsBase) + Idx;
}
private:
unsigned NumStubs = 0;
sys::OwningMemoryBlock StubsMem;
};
/// IndirectStubsManager implementation for the host architecture, e.g.
/// OrcX86_64. (See OrcArchitectureSupport.h).
template <typename TargetT>
class LocalIndirectStubsManager : public IndirectStubsManager {
public:
Error createStub(StringRef StubName, ExecutorAddr StubAddr,
JITSymbolFlags StubFlags) override {
std::lock_guard<std::mutex> Lock(StubsMutex);
if (auto Err = reserveStubs(1))
return Err;
createStubInternal(StubName, StubAddr, StubFlags);
return Error::success();
}
Error createStubs(const StubInitsMap &StubInits) override {
std::lock_guard<std::mutex> Lock(StubsMutex);
if (auto Err = reserveStubs(StubInits.size()))
return Err;
for (const auto &Entry : StubInits)
createStubInternal(Entry.first(), Entry.second.first,
Entry.second.second);
return Error::success();
}
ExecutorSymbolDef findStub(StringRef Name, bool ExportedStubsOnly) override {
std::lock_guard<std::mutex> Lock(StubsMutex);
auto I = StubIndexes.find(Name);
if (I == StubIndexes.end())
return ExecutorSymbolDef();
auto Key = I->second.first;
void *StubPtr = IndirectStubsInfos[Key.first].getStub(Key.second);
assert(StubPtr && "Missing stub address");
auto StubAddr = ExecutorAddr::fromPtr(StubPtr);
auto StubSymbol = ExecutorSymbolDef(StubAddr, I->second.second);
if (ExportedStubsOnly && !StubSymbol.getFlags().isExported())
return ExecutorSymbolDef();
return StubSymbol;
}
ExecutorSymbolDef findPointer(StringRef Name) override {
std::lock_guard<std::mutex> Lock(StubsMutex);
auto I = StubIndexes.find(Name);
if (I == StubIndexes.end())
return ExecutorSymbolDef();
auto Key = I->second.first;
void *PtrPtr = IndirectStubsInfos[Key.first].getPtr(Key.second);
assert(PtrPtr && "Missing pointer address");
auto PtrAddr = ExecutorAddr::fromPtr(PtrPtr);
return ExecutorSymbolDef(PtrAddr, I->second.second);
}
Error updatePointer(StringRef Name, ExecutorAddr NewAddr) override {
using AtomicIntPtr = std::atomic<uintptr_t>;
std::lock_guard<std::mutex> Lock(StubsMutex);
auto I = StubIndexes.find(Name);
assert(I != StubIndexes.end() && "No stub pointer for symbol");
auto Key = I->second.first;
AtomicIntPtr *AtomicStubPtr = reinterpret_cast<AtomicIntPtr *>(
IndirectStubsInfos[Key.first].getPtr(Key.second));
*AtomicStubPtr = static_cast<uintptr_t>(NewAddr.getValue());
return Error::success();
}
private:
Error reserveStubs(unsigned NumStubs) {
if (NumStubs <= FreeStubs.size())
return Error::success();
unsigned NewStubsRequired = NumStubs - FreeStubs.size();
unsigned NewBlockId = IndirectStubsInfos.size();
auto ISI =
LocalIndirectStubsInfo<TargetT>::create(NewStubsRequired, PageSize);
if (!ISI)
return ISI.takeError();
for (unsigned I = 0; I < ISI->getNumStubs(); ++I)
FreeStubs.push_back(std::make_pair(NewBlockId, I));
IndirectStubsInfos.push_back(std::move(*ISI));
return Error::success();
}
void createStubInternal(StringRef StubName, ExecutorAddr InitAddr,
JITSymbolFlags StubFlags) {
auto Key = FreeStubs.back();
FreeStubs.pop_back();
*IndirectStubsInfos[Key.first].getPtr(Key.second) =
InitAddr.toPtr<void *>();
StubIndexes[StubName] = std::make_pair(Key, StubFlags);
}
unsigned PageSize = sys::Process::getPageSizeEstimate();
std::mutex StubsMutex;
std::vector<LocalIndirectStubsInfo<TargetT>> IndirectStubsInfos;
using StubKey = std::pair<uint16_t, uint16_t>;
std::vector<StubKey> FreeStubs;
StringMap<std::pair<StubKey, JITSymbolFlags>> StubIndexes;
};
/// Create a local compile callback manager.
///
/// The given target triple will determine the ABI, and the given
/// ErrorHandlerAddress will be used by the resulting compile callback
/// manager if a compile callback fails.
Expected<std::unique_ptr<JITCompileCallbackManager>>
createLocalCompileCallbackManager(const Triple &T, ExecutionSession &ES,
ExecutorAddr ErrorHandlerAddress);
/// Create a local indriect stubs manager builder.
///
/// The given target triple will determine the ABI.
std::function<std::unique_ptr<IndirectStubsManager>()>
createLocalIndirectStubsManagerBuilder(const Triple &T);
/// Build a function pointer of FunctionType with the given constant
/// address.
///
/// Usage example: Turn a trampoline address into a function pointer constant
/// for use in a stub.
Constant *createIRTypedAddress(FunctionType &FT, ExecutorAddr Addr);
/// Create a function pointer with the given type, name, and initializer
/// in the given Module.
GlobalVariable *createImplPointer(PointerType &PT, Module &M, const Twine &Name,
Constant *Initializer);
/// Turn a function declaration into a stub function that makes an
/// indirect call using the given function pointer.
void makeStub(Function &F, Value &ImplPointer);
/// Promotes private symbols to global hidden, and renames to prevent clashes
/// with other promoted symbols. The same SymbolPromoter instance should be
/// used for all symbols to be added to a single JITDylib.
class SymbolLinkagePromoter {
public:
/// Promote symbols in the given module. Returns the set of global values
/// that have been renamed/promoted.
std::vector<GlobalValue *> operator()(Module &M);
private:
unsigned NextId = 0;
};
/// Clone a function declaration into a new module.
///
/// This function can be used as the first step towards creating a callback
/// stub (see makeStub).
///
/// If the VMap argument is non-null, a mapping will be added between F and
/// the new declaration, and between each of F's arguments and the new
/// declaration's arguments. This map can then be passed in to moveFunction to
/// move the function body if required. Note: When moving functions between
/// modules with these utilities, all decls should be cloned (and added to a
/// single VMap) before any bodies are moved. This will ensure that references
/// between functions all refer to the versions in the new module.
Function *cloneFunctionDecl(Module &Dst, const Function &F,
ValueToValueMapTy *VMap = nullptr);
/// Clone a global variable declaration into a new module.
GlobalVariable *cloneGlobalVariableDecl(Module &Dst, const GlobalVariable &GV,
ValueToValueMapTy *VMap = nullptr);
/// Clone a global alias declaration into a new module.
GlobalAlias *cloneGlobalAliasDecl(Module &Dst, const GlobalAlias &OrigA,
ValueToValueMapTy &VMap);
/// Introduce relocations to \p Sym in its own definition if there are any
/// pointers formed via PC-relative address that do not already have a
/// relocation.
///
/// This is useful when introducing indirection via a stub function at link time
/// without compiler support. If a function pointer is formed without a
/// relocation, e.g. in the definition of \c foo
///
/// \code
/// _foo:
/// leaq -7(%rip), rax # form pointer to _foo without relocation
/// _bar:
/// leaq (%rip), %rax # uses X86_64_RELOC_SIGNED to '_foo'
/// \endcode
///
/// the pointer to \c _foo computed by \c _foo and \c _bar may differ if we
/// introduce a stub for _foo. If the pointer is used as a key, this may be
/// observable to the program. This pass will attempt to introduce the missing
/// "self-relocation" on the leaq instruction.
///
/// This is based on disassembly and should be considered "best effort". It may
/// silently fail to add relocations.
Error addFunctionPointerRelocationsToCurrentSymbol(jitlink::Symbol &Sym,
jitlink::LinkGraph &G,
MCDisassembler &Disassembler,
MCInstrAnalysis &MIA);
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_INDIRECTIONUTILS_H
PK iwFZ� ^%�
�
* ExecutionEngine/Orc/LookupAndRecordAddrs.hnu �[��� //===-- LookupAndRecordAddrs.h - Symbol lookup support utility --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Record the addresses of a set of symbols into ExecutorAddr objects.
//
// This can be used to avoid repeated lookup (via ExecutionSession::lookup) of
// the given symbols.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_LOOKUPANDRECORDADDRS_H
#define LLVM_EXECUTIONENGINE_ORC_LOOKUPANDRECORDADDRS_H
#include "llvm/ADT/FunctionExtras.h"
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include <vector>
namespace llvm {
namespace orc {
/// Record addresses of the given symbols in the given ExecutorAddrs.
///
/// Useful for making permanent records of symbol addreses to call or
/// access in the executor (e.g. runtime support functions in Platform
/// subclasses).
///
/// By default the symbols are looked up using
/// SymbolLookupFlags::RequiredSymbol, and an error will be generated if any of
/// the requested symbols are not defined.
///
/// If SymbolLookupFlags::WeaklyReferencedSymbol is used then any missing
/// symbols will have their corresponding address objects set to zero, and
/// this function will never generate an error (the caller will need to check
/// addresses before using them).
///
/// Asynchronous version.
void lookupAndRecordAddrs(
unique_function<void(Error)> OnRecorded, ExecutionSession &ES, LookupKind K,
const JITDylibSearchOrder &SearchOrder,
std::vector<std::pair<SymbolStringPtr, ExecutorAddr *>> Pairs,
SymbolLookupFlags LookupFlags = SymbolLookupFlags::RequiredSymbol);
/// Record addresses of the given symbols in the given ExecutorAddrs.
///
/// Blocking version.
Error lookupAndRecordAddrs(
ExecutionSession &ES, LookupKind K, const JITDylibSearchOrder &SearchOrder,
std::vector<std::pair<SymbolStringPtr, ExecutorAddr *>> Pairs,
SymbolLookupFlags LookupFlags = SymbolLookupFlags::RequiredSymbol);
/// Record addresses of given symbols in the given ExecutorAddrs.
///
/// ExecutorProcessControl lookup version. Lookups are always implicitly
/// weak.
Error lookupAndRecordAddrs(
ExecutorProcessControl &EPC, tpctypes::DylibHandle H,
std::vector<std::pair<SymbolStringPtr, ExecutorAddr *>> Pairs,
SymbolLookupFlags LookupFlags = SymbolLookupFlags::RequiredSymbol);
} // End namespace orc
} // End namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_LOOKUPANDRECORDADDRS_H
PK iwFZ�i� � � 0 ExecutionEngine/Orc/MapperJITLinkMemoryManager.hnu �[��� //===--------------- MapperJITLinkMemoryManager.h -*- C++ -*---------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Implements JITLinkMemoryManager using MemoryMapper
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_MAPPERJITLINKMEMORYMANAGER_H
#define LLVM_EXECUTIONENGINE_ORC_MAPPERJITLINKMEMORYMANAGER_H
#include "llvm/ADT/IntervalMap.h"
#include "llvm/ExecutionEngine/JITLink/JITLinkMemoryManager.h"
#include "llvm/ExecutionEngine/Orc/MemoryMapper.h"
namespace llvm {
namespace orc {
class MapperJITLinkMemoryManager : public jitlink::JITLinkMemoryManager {
public:
MapperJITLinkMemoryManager(size_t ReservationGranularity,
std::unique_ptr<MemoryMapper> Mapper);
template <class MemoryMapperType, class... Args>
static Expected<std::unique_ptr<MapperJITLinkMemoryManager>>
CreateWithMapper(size_t ReservationGranularity, Args &&...A) {
auto Mapper = MemoryMapperType::Create(std::forward<Args>(A)...);
if (!Mapper)
return Mapper.takeError();
return std::make_unique<MapperJITLinkMemoryManager>(ReservationGranularity,
std::move(*Mapper));
}
void allocate(const jitlink::JITLinkDylib *JD, jitlink::LinkGraph &G,
OnAllocatedFunction OnAllocated) override;
// synchronous overload
using JITLinkMemoryManager::allocate;
void deallocate(std::vector<FinalizedAlloc> Allocs,
OnDeallocatedFunction OnDeallocated) override;
// synchronous overload
using JITLinkMemoryManager::deallocate;
private:
class InFlightAlloc;
std::mutex Mutex;
// We reserve multiples of this from the executor address space
size_t ReservationUnits;
// Ranges that have been reserved in executor but not yet allocated
using AvailableMemoryMap = IntervalMap<ExecutorAddr, bool>;
AvailableMemoryMap::Allocator AMAllocator;
IntervalMap<ExecutorAddr, bool> AvailableMemory;
// Ranges that have been reserved in executor and already allocated
DenseMap<ExecutorAddr, ExecutorAddrDiff> UsedMemory;
std::unique_ptr<MemoryMapper> Mapper;
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_MAPPERJITLINKMEMORYMANAGER_H
PK iwFZ]P��,4 ,4 ExecutionEngine/Orc/Core.hnu �[��� //===------ Core.h -- Core ORC APIs (Layer, JITDylib, etc.) -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Contains core ORC APIs.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_CORE_H
#define LLVM_EXECUTIONENGINE_ORC_CORE_H
#include "llvm/ADT/BitmaskEnum.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/FunctionExtras.h"
#include "llvm/ADT/IntrusiveRefCntPtr.h"
#include "llvm/ExecutionEngine/JITLink/JITLinkDylib.h"
#include "llvm/ExecutionEngine/JITSymbol.h"
#include "llvm/ExecutionEngine/Orc/ExecutorProcessControl.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorSymbolDef.h"
#include "llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h"
#include "llvm/ExecutionEngine/Orc/TaskDispatch.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ExtensibleRTTI.h"
#include <atomic>
#include <future>
#include <memory>
#include <vector>
namespace llvm {
namespace orc {
// Forward declare some classes.
class AsynchronousSymbolQuery;
class ExecutionSession;
class MaterializationUnit;
class MaterializationResponsibility;
class JITDylib;
class ResourceTracker;
class InProgressLookupState;
enum class SymbolState : uint8_t;
using ResourceTrackerSP = IntrusiveRefCntPtr<ResourceTracker>;
using JITDylibSP = IntrusiveRefCntPtr<JITDylib>;
using ResourceKey = uintptr_t;
/// API to remove / transfer ownership of JIT resources.
class ResourceTracker : public ThreadSafeRefCountedBase<ResourceTracker> {
private:
friend class ExecutionSession;
friend class JITDylib;
friend class MaterializationResponsibility;
public:
ResourceTracker(const ResourceTracker &) = delete;
ResourceTracker &operator=(const ResourceTracker &) = delete;
ResourceTracker(ResourceTracker &&) = delete;
ResourceTracker &operator=(ResourceTracker &&) = delete;
~ResourceTracker();
/// Return the JITDylib targeted by this tracker.
JITDylib &getJITDylib() const {
return *reinterpret_cast<JITDylib *>(JDAndFlag.load() &
~static_cast<uintptr_t>(1));
}
/// Runs the given callback under the session lock, passing in the associated
/// ResourceKey. This is the safe way to associate resources with trackers.
template <typename Func> Error withResourceKeyDo(Func &&F);
/// Remove all resources associated with this key.
Error remove();
/// Transfer all resources associated with this key to the given
/// tracker, which must target the same JITDylib as this one.
void transferTo(ResourceTracker &DstRT);
/// Return true if this tracker has become defunct.
bool isDefunct() const { return JDAndFlag.load() & 0x1; }
/// Returns the key associated with this tracker.
/// This method should not be used except for debug logging: there is no
/// guarantee that the returned value will remain valid.
ResourceKey getKeyUnsafe() const { return reinterpret_cast<uintptr_t>(this); }
private:
ResourceTracker(JITDylibSP JD);
void makeDefunct();
std::atomic_uintptr_t JDAndFlag;
};
/// Listens for ResourceTracker operations.
class ResourceManager {
public:
virtual ~ResourceManager();
virtual Error handleRemoveResources(JITDylib &JD, ResourceKey K) = 0;
virtual void handleTransferResources(JITDylib &JD, ResourceKey DstK,
ResourceKey SrcK) = 0;
};
/// A set of symbol names (represented by SymbolStringPtrs for
// efficiency).
using SymbolNameSet = DenseSet<SymbolStringPtr>;
/// A vector of symbol names.
using SymbolNameVector = std::vector<SymbolStringPtr>;
/// A map from symbol names (as SymbolStringPtrs) to JITSymbols
/// (address/flags pairs).
using SymbolMap = DenseMap<SymbolStringPtr, ExecutorSymbolDef>;
/// A map from symbol names (as SymbolStringPtrs) to JITSymbolFlags.
using SymbolFlagsMap = DenseMap<SymbolStringPtr, JITSymbolFlags>;
/// A map from JITDylibs to sets of symbols.
using SymbolDependenceMap = DenseMap<JITDylib *, SymbolNameSet>;
/// Lookup flags that apply to each dylib in the search order for a lookup.
///
/// If MatchHiddenSymbolsOnly is used (the default) for a given dylib, then
/// only symbols in that Dylib's interface will be searched. If
/// MatchHiddenSymbols is used then symbols with hidden visibility will match
/// as well.
enum class JITDylibLookupFlags { MatchExportedSymbolsOnly, MatchAllSymbols };
/// Lookup flags that apply to each symbol in a lookup.
///
/// If RequiredSymbol is used (the default) for a given symbol then that symbol
/// must be found during the lookup or the lookup will fail returning a
/// SymbolNotFound error. If WeaklyReferencedSymbol is used and the given
/// symbol is not found then the query will continue, and no result for the
/// missing symbol will be present in the result (assuming the rest of the
/// lookup succeeds).
enum class SymbolLookupFlags { RequiredSymbol, WeaklyReferencedSymbol };
/// Describes the kind of lookup being performed. The lookup kind is passed to
/// symbol generators (if they're invoked) to help them determine what
/// definitions to generate.
///
/// Static -- Lookup is being performed as-if at static link time (e.g.
/// generators representing static archives should pull in new
/// definitions).
///
/// DLSym -- Lookup is being performed as-if at runtime (e.g. generators
/// representing static archives should not pull in new definitions).
enum class LookupKind { Static, DLSym };
/// A list of (JITDylib*, JITDylibLookupFlags) pairs to be used as a search
/// order during symbol lookup.
using JITDylibSearchOrder =
std::vector<std::pair<JITDylib *, JITDylibLookupFlags>>;
/// Convenience function for creating a search order from an ArrayRef of
/// JITDylib*, all with the same flags.
inline JITDylibSearchOrder makeJITDylibSearchOrder(
ArrayRef<JITDylib *> JDs,
JITDylibLookupFlags Flags = JITDylibLookupFlags::MatchExportedSymbolsOnly) {
JITDylibSearchOrder O;
O.reserve(JDs.size());
for (auto *JD : JDs)
O.push_back(std::make_pair(JD, Flags));
return O;
}
/// A set of symbols to look up, each associated with a SymbolLookupFlags
/// value.
///
/// This class is backed by a vector and optimized for fast insertion,
/// deletion and iteration. It does not guarantee a stable order between
/// operations, and will not automatically detect duplicate elements (they
/// can be manually checked by calling the validate method).
class SymbolLookupSet {
public:
using value_type = std::pair<SymbolStringPtr, SymbolLookupFlags>;
using UnderlyingVector = std::vector<value_type>;
using iterator = UnderlyingVector::iterator;
using const_iterator = UnderlyingVector::const_iterator;
SymbolLookupSet() = default;
explicit SymbolLookupSet(
SymbolStringPtr Name,
SymbolLookupFlags Flags = SymbolLookupFlags::RequiredSymbol) {
add(std::move(Name), Flags);
}
/// Construct a SymbolLookupSet from an initializer list of SymbolStringPtrs.
explicit SymbolLookupSet(
std::initializer_list<SymbolStringPtr> Names,
SymbolLookupFlags Flags = SymbolLookupFlags::RequiredSymbol) {
Symbols.reserve(Names.size());
for (const auto &Name : Names)
add(std::move(Name), Flags);
}
/// Construct a SymbolLookupSet from a SymbolNameSet with the given
/// Flags used for each value.
explicit SymbolLookupSet(
const SymbolNameSet &Names,
SymbolLookupFlags Flags = SymbolLookupFlags::RequiredSymbol) {
Symbols.reserve(Names.size());
for (const auto &Name : Names)
add(Name, Flags);
}
/// Construct a SymbolLookupSet from a vector of symbols with the given Flags
/// used for each value.
/// If the ArrayRef contains duplicates it is up to the client to remove these
/// before using this instance for lookup.
explicit SymbolLookupSet(
ArrayRef<SymbolStringPtr> Names,
SymbolLookupFlags Flags = SymbolLookupFlags::RequiredSymbol) {
Symbols.reserve(Names.size());
for (const auto &Name : Names)
add(Name, Flags);
}
/// Construct a SymbolLookupSet from DenseMap keys.
template <typename KeyT>
static SymbolLookupSet
fromMapKeys(const DenseMap<SymbolStringPtr, KeyT> &M,
SymbolLookupFlags Flags = SymbolLookupFlags::RequiredSymbol) {
SymbolLookupSet Result;
Result.Symbols.reserve(M.size());
for (const auto &KV : M)
Result.add(KV.first, Flags);
return Result;
}
/// Add an element to the set. The client is responsible for checking that
/// duplicates are not added.
SymbolLookupSet &
add(SymbolStringPtr Name,
SymbolLookupFlags Flags = SymbolLookupFlags::RequiredSymbol) {
Symbols.push_back(std::make_pair(std::move(Name), Flags));
return *this;
}
/// Quickly append one lookup set to another.
SymbolLookupSet &append(SymbolLookupSet Other) {
Symbols.reserve(Symbols.size() + Other.size());
for (auto &KV : Other)
Symbols.push_back(std::move(KV));
return *this;
}
bool empty() const { return Symbols.empty(); }
UnderlyingVector::size_type size() const { return Symbols.size(); }
iterator begin() { return Symbols.begin(); }
iterator end() { return Symbols.end(); }
const_iterator begin() const { return Symbols.begin(); }
const_iterator end() const { return Symbols.end(); }
/// Removes the Ith element of the vector, replacing it with the last element.
void remove(UnderlyingVector::size_type I) {
std::swap(Symbols[I], Symbols.back());
Symbols.pop_back();
}
/// Removes the element pointed to by the given iterator. This iterator and
/// all subsequent ones (including end()) are invalidated.
void remove(iterator I) { remove(I - begin()); }
/// Removes all elements matching the given predicate, which must be callable
/// as bool(const SymbolStringPtr &, SymbolLookupFlags Flags).
template <typename PredFn> void remove_if(PredFn &&Pred) {
UnderlyingVector::size_type I = 0;
while (I != Symbols.size()) {
const auto &Name = Symbols[I].first;
auto Flags = Symbols[I].second;
if (Pred(Name, Flags))
remove(I);
else
++I;
}
}
/// Loop over the elements of this SymbolLookupSet, applying the Body function
/// to each one. Body must be callable as
/// bool(const SymbolStringPtr &, SymbolLookupFlags).
/// If Body returns true then the element just passed in is removed from the
/// set. If Body returns false then the element is retained.
template <typename BodyFn>
auto forEachWithRemoval(BodyFn &&Body) -> std::enable_if_t<
std::is_same<decltype(Body(std::declval<const SymbolStringPtr &>(),
std::declval<SymbolLookupFlags>())),
bool>::value> {
UnderlyingVector::size_type I = 0;
while (I != Symbols.size()) {
const auto &Name = Symbols[I].first;
auto Flags = Symbols[I].second;
if (Body(Name, Flags))
remove(I);
else
++I;
}
}
/// Loop over the elements of this SymbolLookupSet, applying the Body function
/// to each one. Body must be callable as
/// Expected<bool>(const SymbolStringPtr &, SymbolLookupFlags).
/// If Body returns a failure value, the loop exits immediately. If Body
/// returns true then the element just passed in is removed from the set. If
/// Body returns false then the element is retained.
template <typename BodyFn>
auto forEachWithRemoval(BodyFn &&Body) -> std::enable_if_t<
std::is_same<decltype(Body(std::declval<const SymbolStringPtr &>(),
std::declval<SymbolLookupFlags>())),
Expected<bool>>::value,
Error> {
UnderlyingVector::size_type I = 0;
while (I != Symbols.size()) {
const auto &Name = Symbols[I].first;
auto Flags = Symbols[I].second;
auto Remove = Body(Name, Flags);
if (!Remove)
return Remove.takeError();
if (*Remove)
remove(I);
else
++I;
}
return Error::success();
}
/// Construct a SymbolNameVector from this instance by dropping the Flags
/// values.
SymbolNameVector getSymbolNames() const {
SymbolNameVector Names;
Names.reserve(Symbols.size());
for (const auto &KV : Symbols)
Names.push_back(KV.first);
return Names;
}
/// Sort the lookup set by pointer value. This sort is fast but sensitive to
/// allocation order and so should not be used where a consistent order is
/// required.
void sortByAddress() { llvm::sort(Symbols, llvm::less_first()); }
/// Sort the lookup set lexicographically. This sort is slow but the order
/// is unaffected by allocation order.
void sortByName() {
llvm::sort(Symbols, [](const value_type &LHS, const value_type &RHS) {
return *LHS.first < *RHS.first;
});
}
/// Remove any duplicate elements. If a SymbolLookupSet is not duplicate-free
/// by construction, this method can be used to turn it into a proper set.
void removeDuplicates() {
sortByAddress();
auto LastI = std::unique(Symbols.begin(), Symbols.end());
Symbols.erase(LastI, Symbols.end());
}
#ifndef NDEBUG
/// Returns true if this set contains any duplicates. This should only be used
/// in assertions.
bool containsDuplicates() {
if (Symbols.size() < 2)
return false;
sortByAddress();
for (UnderlyingVector::size_type I = 1; I != Symbols.size(); ++I)
if (Symbols[I].first == Symbols[I - 1].first)
return true;
return false;
}
#endif
private:
UnderlyingVector Symbols;
};
struct SymbolAliasMapEntry {
SymbolAliasMapEntry() = default;
SymbolAliasMapEntry(SymbolStringPtr Aliasee, JITSymbolFlags AliasFlags)
: Aliasee(std::move(Aliasee)), AliasFlags(AliasFlags) {}
SymbolStringPtr Aliasee;
JITSymbolFlags AliasFlags;
};
/// A map of Symbols to (Symbol, Flags) pairs.
using SymbolAliasMap = DenseMap<SymbolStringPtr, SymbolAliasMapEntry>;
/// Callback to notify client that symbols have been resolved.
using SymbolsResolvedCallback = unique_function<void(Expected<SymbolMap>)>;
/// Callback to register the dependencies for a given query.
using RegisterDependenciesFunction =
std::function<void(const SymbolDependenceMap &)>;
/// This can be used as the value for a RegisterDependenciesFunction if there
/// are no dependants to register with.
extern RegisterDependenciesFunction NoDependenciesToRegister;
class ResourceTrackerDefunct : public ErrorInfo<ResourceTrackerDefunct> {
public:
static char ID;
ResourceTrackerDefunct(ResourceTrackerSP RT);
std::error_code convertToErrorCode() const override;
void log(raw_ostream &OS) const override;
private:
ResourceTrackerSP RT;
};
/// Used to notify a JITDylib that the given set of symbols failed to
/// materialize.
class FailedToMaterialize : public ErrorInfo<FailedToMaterialize> {
public:
static char ID;
FailedToMaterialize(std::shared_ptr<SymbolStringPool> SSP,
std::shared_ptr<SymbolDependenceMap> Symbols);
~FailedToMaterialize();
std::error_code convertToErrorCode() const override;
void log(raw_ostream &OS) const override;
const SymbolDependenceMap &getSymbols() const { return *Symbols; }
private:
std::shared_ptr<SymbolStringPool> SSP;
std::shared_ptr<SymbolDependenceMap> Symbols;
};
/// Used to notify clients when symbols can not be found during a lookup.
class SymbolsNotFound : public ErrorInfo<SymbolsNotFound> {
public:
static char ID;
SymbolsNotFound(std::shared_ptr<SymbolStringPool> SSP, SymbolNameSet Symbols);
SymbolsNotFound(std::shared_ptr<SymbolStringPool> SSP,
SymbolNameVector Symbols);
std::error_code convertToErrorCode() const override;
void log(raw_ostream &OS) const override;
std::shared_ptr<SymbolStringPool> getSymbolStringPool() { return SSP; }
const SymbolNameVector &getSymbols() const { return Symbols; }
private:
std::shared_ptr<SymbolStringPool> SSP;
SymbolNameVector Symbols;
};
/// Used to notify clients that a set of symbols could not be removed.
class SymbolsCouldNotBeRemoved : public ErrorInfo<SymbolsCouldNotBeRemoved> {
public:
static char ID;
SymbolsCouldNotBeRemoved(std::shared_ptr<SymbolStringPool> SSP,
SymbolNameSet Symbols);
std::error_code convertToErrorCode() const override;
void log(raw_ostream &OS) const override;
std::shared_ptr<SymbolStringPool> getSymbolStringPool() { return SSP; }
const SymbolNameSet &getSymbols() const { return Symbols; }
private:
std::shared_ptr<SymbolStringPool> SSP;
SymbolNameSet Symbols;
};
/// Errors of this type should be returned if a module fails to include
/// definitions that are claimed by the module's associated
/// MaterializationResponsibility. If this error is returned it is indicative of
/// a broken transformation / compiler / object cache.
class MissingSymbolDefinitions : public ErrorInfo<MissingSymbolDefinitions> {
public:
static char ID;
MissingSymbolDefinitions(std::shared_ptr<SymbolStringPool> SSP,
std::string ModuleName, SymbolNameVector Symbols)
: SSP(std::move(SSP)), ModuleName(std::move(ModuleName)),
Symbols(std::move(Symbols)) {}
std::error_code convertToErrorCode() const override;
void log(raw_ostream &OS) const override;
std::shared_ptr<SymbolStringPool> getSymbolStringPool() { return SSP; }
const std::string &getModuleName() const { return ModuleName; }
const SymbolNameVector &getSymbols() const { return Symbols; }
private:
std::shared_ptr<SymbolStringPool> SSP;
std::string ModuleName;
SymbolNameVector Symbols;
};
/// Errors of this type should be returned if a module contains definitions for
/// symbols that are not claimed by the module's associated
/// MaterializationResponsibility. If this error is returned it is indicative of
/// a broken transformation / compiler / object cache.
class UnexpectedSymbolDefinitions : public ErrorInfo<UnexpectedSymbolDefinitions> {
public:
static char ID;
UnexpectedSymbolDefinitions(std::shared_ptr<SymbolStringPool> SSP,
std::string ModuleName, SymbolNameVector Symbols)
: SSP(std::move(SSP)), ModuleName(std::move(ModuleName)),
Symbols(std::move(Symbols)) {}
std::error_code convertToErrorCode() const override;
void log(raw_ostream &OS) const override;
std::shared_ptr<SymbolStringPool> getSymbolStringPool() { return SSP; }
const std::string &getModuleName() const { return ModuleName; }
const SymbolNameVector &getSymbols() const { return Symbols; }
private:
std::shared_ptr<SymbolStringPool> SSP;
std::string ModuleName;
SymbolNameVector Symbols;
};
/// Tracks responsibility for materialization, and mediates interactions between
/// MaterializationUnits and JDs.
///
/// An instance of this class is passed to MaterializationUnits when their
/// materialize method is called. It allows MaterializationUnits to resolve and
/// emit symbols, or abandon materialization by notifying any unmaterialized
/// symbols of an error.
class MaterializationResponsibility {
friend class ExecutionSession;
friend class JITDylib;
public:
MaterializationResponsibility(MaterializationResponsibility &&) = delete;
MaterializationResponsibility &
operator=(MaterializationResponsibility &&) = delete;
/// Destruct a MaterializationResponsibility instance. In debug mode
/// this asserts that all symbols being tracked have been either
/// emitted or notified of an error.
~MaterializationResponsibility();
/// Runs the given callback under the session lock, passing in the associated
/// ResourceKey. This is the safe way to associate resources with trackers.
template <typename Func> Error withResourceKeyDo(Func &&F) const {
return RT->withResourceKeyDo(std::forward<Func>(F));
}
/// Returns the target JITDylib that these symbols are being materialized
/// into.
JITDylib &getTargetJITDylib() const { return JD; }
/// Returns the ExecutionSession for this instance.
ExecutionSession &getExecutionSession() const;
/// Returns the symbol flags map for this responsibility instance.
/// Note: The returned flags may have transient flags (Lazy, Materializing)
/// set. These should be stripped with JITSymbolFlags::stripTransientFlags
/// before using.
const SymbolFlagsMap &getSymbols() const { return SymbolFlags; }
/// Returns the initialization pseudo-symbol, if any. This symbol will also
/// be present in the SymbolFlagsMap for this MaterializationResponsibility
/// object.
const SymbolStringPtr &getInitializerSymbol() const { return InitSymbol; }
/// Returns the names of any symbols covered by this
/// MaterializationResponsibility object that have queries pending. This
/// information can be used to return responsibility for unrequested symbols
/// back to the JITDylib via the delegate method.
SymbolNameSet getRequestedSymbols() const;
/// Notifies the target JITDylib that the given symbols have been resolved.
/// This will update the given symbols' addresses in the JITDylib, and notify
/// any pending queries on the given symbols of their resolution. The given
/// symbols must be ones covered by this MaterializationResponsibility
/// instance. Individual calls to this method may resolve a subset of the
/// symbols, but all symbols must have been resolved prior to calling emit.
///
/// This method will return an error if any symbols being resolved have been
/// moved to the error state due to the failure of a dependency. If this
/// method returns an error then clients should log it and call
/// failMaterialize. If no dependencies have been registered for the
/// symbols covered by this MaterializationResponsibiility then this method
/// is guaranteed to return Error::success() and can be wrapped with cantFail.
Error notifyResolved(const SymbolMap &Symbols);
/// Notifies the target JITDylib (and any pending queries on that JITDylib)
/// that all symbols covered by this MaterializationResponsibility instance
/// have been emitted.
///
/// This method will return an error if any symbols being resolved have been
/// moved to the error state due to the failure of a dependency. If this
/// method returns an error then clients should log it and call
/// failMaterialize. If no dependencies have been registered for the
/// symbols covered by this MaterializationResponsibiility then this method
/// is guaranteed to return Error::success() and can be wrapped with cantFail.
Error notifyEmitted();
/// Attempt to claim responsibility for new definitions. This method can be
/// used to claim responsibility for symbols that are added to a
/// materialization unit during the compilation process (e.g. literal pool
/// symbols). Symbol linkage rules are the same as for symbols that are
/// defined up front: duplicate strong definitions will result in errors.
/// Duplicate weak definitions will be discarded (in which case they will
/// not be added to this responsibility instance).
///
/// This method can be used by materialization units that want to add
/// additional symbols at materialization time (e.g. stubs, compile
/// callbacks, metadata).
Error defineMaterializing(SymbolFlagsMap SymbolFlags);
/// Notify all not-yet-emitted covered by this MaterializationResponsibility
/// instance that an error has occurred.
/// This will remove all symbols covered by this MaterializationResponsibilty
/// from the target JITDylib, and send an error to any queries waiting on
/// these symbols.
void failMaterialization();
/// Transfers responsibility to the given MaterializationUnit for all
/// symbols defined by that MaterializationUnit. This allows
/// materializers to break up work based on run-time information (e.g.
/// by introspecting which symbols have actually been looked up and
/// materializing only those).
Error replace(std::unique_ptr<MaterializationUnit> MU);
/// Delegates responsibility for the given symbols to the returned
/// materialization responsibility. Useful for breaking up work between
/// threads, or different kinds of materialization processes.
Expected<std::unique_ptr<MaterializationResponsibility>>
delegate(const SymbolNameSet &Symbols);
void addDependencies(const SymbolStringPtr &Name,
const SymbolDependenceMap &Dependencies);
/// Add dependencies that apply to all symbols covered by this instance.
void addDependenciesForAll(const SymbolDependenceMap &Dependencies);
private:
/// Create a MaterializationResponsibility for the given JITDylib and
/// initial symbols.
MaterializationResponsibility(ResourceTrackerSP RT,
SymbolFlagsMap SymbolFlags,
SymbolStringPtr InitSymbol)
: JD(RT->getJITDylib()), RT(std::move(RT)),
SymbolFlags(std::move(SymbolFlags)), InitSymbol(std::move(InitSymbol)) {
assert(!this->SymbolFlags.empty() && "Materializing nothing?");
}
JITDylib &JD;
ResourceTrackerSP RT;
SymbolFlagsMap SymbolFlags;
SymbolStringPtr InitSymbol;
};
/// A MaterializationUnit represents a set of symbol definitions that can
/// be materialized as a group, or individually discarded (when
/// overriding definitions are encountered).
///
/// MaterializationUnits are used when providing lazy definitions of symbols to
/// JITDylibs. The JITDylib will call materialize when the address of a symbol
/// is requested via the lookup method. The JITDylib will call discard if a
/// stronger definition is added or already present.
class MaterializationUnit {
friend class ExecutionSession;
friend class JITDylib;
public:
static char ID;
struct Interface {
Interface() = default;
Interface(SymbolFlagsMap InitalSymbolFlags, SymbolStringPtr InitSymbol)
: SymbolFlags(std::move(InitalSymbolFlags)),
InitSymbol(std::move(InitSymbol)) {
assert((!this->InitSymbol || this->SymbolFlags.count(this->InitSymbol)) &&
"If set, InitSymbol should appear in InitialSymbolFlags map");
}
SymbolFlagsMap SymbolFlags;
SymbolStringPtr InitSymbol;
};
MaterializationUnit(Interface I)
: SymbolFlags(std::move(I.SymbolFlags)),
InitSymbol(std::move(I.InitSymbol)) {}
virtual ~MaterializationUnit() = default;
/// Return the name of this materialization unit. Useful for debugging
/// output.
virtual StringRef getName() const = 0;
/// Return the set of symbols that this source provides.
const SymbolFlagsMap &getSymbols() const { return SymbolFlags; }
/// Returns the initialization symbol for this MaterializationUnit (if any).
const SymbolStringPtr &getInitializerSymbol() const { return InitSymbol; }
/// Implementations of this method should materialize all symbols
/// in the materialzation unit, except for those that have been
/// previously discarded.
virtual void
materialize(std::unique_ptr<MaterializationResponsibility> R) = 0;
/// Called by JITDylibs to notify MaterializationUnits that the given symbol
/// has been overridden.
void doDiscard(const JITDylib &JD, const SymbolStringPtr &Name) {
SymbolFlags.erase(Name);
if (InitSymbol == Name) {
DEBUG_WITH_TYPE("orc", {
dbgs() << "In " << getName() << ": discarding init symbol \""
<< *Name << "\"\n";
});
InitSymbol = nullptr;
}
discard(JD, std::move(Name));
}
protected:
SymbolFlagsMap SymbolFlags;
SymbolStringPtr InitSymbol;
private:
virtual void anchor();
/// Implementations of this method should discard the given symbol
/// from the source (e.g. if the source is an LLVM IR Module and the
/// symbol is a function, delete the function body or mark it available
/// externally).
virtual void discard(const JITDylib &JD, const SymbolStringPtr &Name) = 0;
};
/// A MaterializationUnit implementation for pre-existing absolute symbols.
///
/// All symbols will be resolved and marked ready as soon as the unit is
/// materialized.
class AbsoluteSymbolsMaterializationUnit : public MaterializationUnit {
public:
AbsoluteSymbolsMaterializationUnit(SymbolMap Symbols);
StringRef getName() const override;
private:
void materialize(std::unique_ptr<MaterializationResponsibility> R) override;
void discard(const JITDylib &JD, const SymbolStringPtr &Name) override;
static MaterializationUnit::Interface extractFlags(const SymbolMap &Symbols);
SymbolMap Symbols;
};
/// Create an AbsoluteSymbolsMaterializationUnit with the given symbols.
/// Useful for inserting absolute symbols into a JITDylib. E.g.:
/// \code{.cpp}
/// JITDylib &JD = ...;
/// SymbolStringPtr Foo = ...;
/// ExecutorSymbolDef FooSym = ...;
/// if (auto Err = JD.define(absoluteSymbols({{Foo, FooSym}})))
/// return Err;
/// \endcode
///
inline std::unique_ptr<AbsoluteSymbolsMaterializationUnit>
absoluteSymbols(SymbolMap Symbols) {
return std::make_unique<AbsoluteSymbolsMaterializationUnit>(
std::move(Symbols));
}
/// A materialization unit for symbol aliases. Allows existing symbols to be
/// aliased with alternate flags.
class ReExportsMaterializationUnit : public MaterializationUnit {
public:
/// SourceJD is allowed to be nullptr, in which case the source JITDylib is
/// taken to be whatever JITDylib these definitions are materialized in (and
/// MatchNonExported has no effect). This is useful for defining aliases
/// within a JITDylib.
///
/// Note: Care must be taken that no sets of aliases form a cycle, as such
/// a cycle will result in a deadlock when any symbol in the cycle is
/// resolved.
ReExportsMaterializationUnit(JITDylib *SourceJD,
JITDylibLookupFlags SourceJDLookupFlags,
SymbolAliasMap Aliases);
StringRef getName() const override;
private:
void materialize(std::unique_ptr<MaterializationResponsibility> R) override;
void discard(const JITDylib &JD, const SymbolStringPtr &Name) override;
static MaterializationUnit::Interface
extractFlags(const SymbolAliasMap &Aliases);
JITDylib *SourceJD = nullptr;
JITDylibLookupFlags SourceJDLookupFlags;
SymbolAliasMap Aliases;
};
/// Create a ReExportsMaterializationUnit with the given aliases.
/// Useful for defining symbol aliases.: E.g., given a JITDylib JD containing
/// symbols "foo" and "bar", we can define aliases "baz" (for "foo") and "qux"
/// (for "bar") with: \code{.cpp}
/// SymbolStringPtr Baz = ...;
/// SymbolStringPtr Qux = ...;
/// if (auto Err = JD.define(symbolAliases({
/// {Baz, { Foo, JITSymbolFlags::Exported }},
/// {Qux, { Bar, JITSymbolFlags::Weak }}}))
/// return Err;
/// \endcode
inline std::unique_ptr<ReExportsMaterializationUnit>
symbolAliases(SymbolAliasMap Aliases) {
return std::make_unique<ReExportsMaterializationUnit>(
nullptr, JITDylibLookupFlags::MatchAllSymbols, std::move(Aliases));
}
/// Create a materialization unit for re-exporting symbols from another JITDylib
/// with alternative names/flags.
/// SourceJD will be searched using the given JITDylibLookupFlags.
inline std::unique_ptr<ReExportsMaterializationUnit>
reexports(JITDylib &SourceJD, SymbolAliasMap Aliases,
JITDylibLookupFlags SourceJDLookupFlags =
JITDylibLookupFlags::MatchExportedSymbolsOnly) {
return std::make_unique<ReExportsMaterializationUnit>(
&SourceJD, SourceJDLookupFlags, std::move(Aliases));
}
/// Build a SymbolAliasMap for the common case where you want to re-export
/// symbols from another JITDylib with the same linkage/flags.
Expected<SymbolAliasMap>
buildSimpleReexportsAliasMap(JITDylib &SourceJD, const SymbolNameSet &Symbols);
/// Represents the state that a symbol has reached during materialization.
enum class SymbolState : uint8_t {
Invalid, /// No symbol should be in this state.
NeverSearched, /// Added to the symbol table, never queried.
Materializing, /// Queried, materialization begun.
Resolved, /// Assigned address, still materializing.
Emitted, /// Emitted to memory, but waiting on transitive dependencies.
Ready = 0x3f /// Ready and safe for clients to access.
};
/// A symbol query that returns results via a callback when results are
/// ready.
///
/// makes a callback when all symbols are available.
class AsynchronousSymbolQuery {
friend class ExecutionSession;
friend class InProgressFullLookupState;
friend class JITDylib;
friend class JITSymbolResolverAdapter;
friend class MaterializationResponsibility;
public:
/// Create a query for the given symbols. The NotifyComplete
/// callback will be called once all queried symbols reach the given
/// minimum state.
AsynchronousSymbolQuery(const SymbolLookupSet &Symbols,
SymbolState RequiredState,
SymbolsResolvedCallback NotifyComplete);
/// Notify the query that a requested symbol has reached the required state.
void notifySymbolMetRequiredState(const SymbolStringPtr &Name,
ExecutorSymbolDef Sym);
/// Returns true if all symbols covered by this query have been
/// resolved.
bool isComplete() const { return OutstandingSymbolsCount == 0; }
private:
void handleComplete(ExecutionSession &ES);
SymbolState getRequiredState() { return RequiredState; }
void addQueryDependence(JITDylib &JD, SymbolStringPtr Name);
void removeQueryDependence(JITDylib &JD, const SymbolStringPtr &Name);
void dropSymbol(const SymbolStringPtr &Name);
void handleFailed(Error Err);
void detach();
SymbolsResolvedCallback NotifyComplete;
SymbolDependenceMap QueryRegistrations;
SymbolMap ResolvedSymbols;
size_t OutstandingSymbolsCount;
SymbolState RequiredState;
};
/// Wraps state for a lookup-in-progress.
/// DefinitionGenerators can optionally take ownership of a LookupState object
/// to suspend a lookup-in-progress while they search for definitions.
class LookupState {
friend class OrcV2CAPIHelper;
friend class ExecutionSession;
public:
LookupState();
LookupState(LookupState &&);
LookupState &operator=(LookupState &&);
~LookupState();
/// Continue the lookup. This can be called by DefinitionGenerators
/// to re-start a captured query-application operation.
void continueLookup(Error Err);
private:
LookupState(std::unique_ptr<InProgressLookupState> IPLS);
// For C API.
void reset(InProgressLookupState *IPLS);
std::unique_ptr<InProgressLookupState> IPLS;
};
/// Definition generators can be attached to JITDylibs to generate new
/// definitions for otherwise unresolved symbols during lookup.
class DefinitionGenerator {
public:
virtual ~DefinitionGenerator();
/// DefinitionGenerators should override this method to insert new
/// definitions into the parent JITDylib. K specifies the kind of this
/// lookup. JD specifies the target JITDylib being searched, and
/// JDLookupFlags specifies whether the search should match against
/// hidden symbols. Finally, Symbols describes the set of unresolved
/// symbols and their associated lookup flags.
virtual Error tryToGenerate(LookupState &LS, LookupKind K, JITDylib &JD,
JITDylibLookupFlags JDLookupFlags,
const SymbolLookupSet &LookupSet) = 0;
};
/// Represents a JIT'd dynamic library.
///
/// This class aims to mimic the behavior of a regular dylib or shared object,
/// but without requiring the contained program representations to be compiled
/// up-front. The JITDylib's content is defined by adding MaterializationUnits,
/// and contained MaterializationUnits will typically rely on the JITDylib's
/// links-against order to resolve external references (similar to a regular
/// dylib).
///
/// The JITDylib object is a thin wrapper that references state held by the
/// ExecutionSession. JITDylibs can be removed, clearing this underlying state
/// and leaving the JITDylib object in a defunct state. In this state the
/// JITDylib's name is guaranteed to remain accessible. If the ExecutionSession
/// is still alive then other operations are callable but will return an Error
/// or null result (depending on the API). It is illegal to call any operation
/// other than getName on a JITDylib after the ExecutionSession has been torn
/// down.
///
/// JITDylibs cannot be moved or copied. Their address is stable, and useful as
/// a key in some JIT data structures.
class JITDylib : public ThreadSafeRefCountedBase<JITDylib>,
public jitlink::JITLinkDylib {
friend class AsynchronousSymbolQuery;
friend class ExecutionSession;
friend class Platform;
friend class MaterializationResponsibility;
public:
JITDylib(const JITDylib &) = delete;
JITDylib &operator=(const JITDylib &) = delete;
JITDylib(JITDylib &&) = delete;
JITDylib &operator=(JITDylib &&) = delete;
~JITDylib();
/// Get a reference to the ExecutionSession for this JITDylib.
///
/// It is legal to call this method on a defunct JITDylib, however the result
/// will only usable if the ExecutionSession is still alive. If this JITDylib
/// is held by an error that may have torn down the JIT then the result
/// should not be used.
ExecutionSession &getExecutionSession() const { return ES; }
/// Dump current JITDylib state to OS.
///
/// It is legal to call this method on a defunct JITDylib.
void dump(raw_ostream &OS);
/// Calls remove on all trackers currently associated with this JITDylib.
/// Does not run static deinits.
///
/// Note that removal happens outside the session lock, so new code may be
/// added concurrently while the clear is underway, and the newly added
/// code will *not* be cleared. Adding new code concurrently with a clear
/// is usually a bug and should be avoided.
///
/// It is illegal to call this method on a defunct JITDylib and the client
/// is responsible for ensuring that they do not do so.
Error clear();
/// Get the default resource tracker for this JITDylib.
///
/// It is illegal to call this method on a defunct JITDylib and the client
/// is responsible for ensuring that they do not do so.
ResourceTrackerSP getDefaultResourceTracker();
/// Create a resource tracker for this JITDylib.
///
/// It is illegal to call this method on a defunct JITDylib and the client
/// is responsible for ensuring that they do not do so.
ResourceTrackerSP createResourceTracker();
/// Adds a definition generator to this JITDylib and returns a referenece to
/// it.
///
/// When JITDylibs are searched during lookup, if no existing definition of
/// a symbol is found, then any generators that have been added are run (in
/// the order that they were added) to potentially generate a definition.
///
/// It is illegal to call this method on a defunct JITDylib and the client
/// is responsible for ensuring that they do not do so.
template <typename GeneratorT>
GeneratorT &addGenerator(std::unique_ptr<GeneratorT> DefGenerator);
/// Remove a definition generator from this JITDylib.
///
/// The given generator must exist in this JITDylib's generators list (i.e.
/// have been added and not yet removed).
///
/// It is illegal to call this method on a defunct JITDylib and the client
/// is responsible for ensuring that they do not do so.
void removeGenerator(DefinitionGenerator &G);
/// Set the link order to be used when fixing up definitions in JITDylib.
/// This will replace the previous link order, and apply to any symbol
/// resolutions made for definitions in this JITDylib after the call to
/// setLinkOrder (even if the definition itself was added before the
/// call).
///
/// If LinkAgainstThisJITDylibFirst is true (the default) then this JITDylib
/// will add itself to the beginning of the LinkOrder (Clients should not
/// put this JITDylib in the list in this case, to avoid redundant lookups).
///
/// If LinkAgainstThisJITDylibFirst is false then the link order will be used
/// as-is. The primary motivation for this feature is to support deliberate
/// shadowing of symbols in this JITDylib by a facade JITDylib. For example,
/// the facade may resolve function names to stubs, and the stubs may compile
/// lazily by looking up symbols in this dylib. Adding the facade dylib
/// as the first in the link order (instead of this dylib) ensures that
/// definitions within this dylib resolve to the lazy-compiling stubs,
/// rather than immediately materializing the definitions in this dylib.
///
/// It is illegal to call this method on a defunct JITDylib and the client
/// is responsible for ensuring that they do not do so.
void setLinkOrder(JITDylibSearchOrder NewSearchOrder,
bool LinkAgainstThisJITDylibFirst = true);
/// Append the given JITDylibSearchOrder to the link order for this
/// JITDylib (discarding any elements already present in this JITDylib's
/// link order).
void addToLinkOrder(const JITDylibSearchOrder &NewLinks);
/// Add the given JITDylib to the link order for definitions in this
/// JITDylib.
///
/// It is illegal to call this method on a defunct JITDylib and the client
/// is responsible for ensuring that they do not do so.
void addToLinkOrder(JITDylib &JD,
JITDylibLookupFlags JDLookupFlags =
JITDylibLookupFlags::MatchExportedSymbolsOnly);
/// Replace OldJD with NewJD in the link order if OldJD is present.
/// Otherwise this operation is a no-op.
///
/// It is illegal to call this method on a defunct JITDylib and the client
/// is responsible for ensuring that they do not do so.
void replaceInLinkOrder(JITDylib &OldJD, JITDylib &NewJD,
JITDylibLookupFlags JDLookupFlags =
JITDylibLookupFlags::MatchExportedSymbolsOnly);
/// Remove the given JITDylib from the link order for this JITDylib if it is
/// present. Otherwise this operation is a no-op.
///
/// It is illegal to call this method on a defunct JITDylib and the client
/// is responsible for ensuring that they do not do so.
void removeFromLinkOrder(JITDylib &JD);
/// Do something with the link order (run under the session lock).
///
/// It is illegal to call this method on a defunct JITDylib and the client
/// is responsible for ensuring that they do not do so.
template <typename Func>
auto withLinkOrderDo(Func &&F)
-> decltype(F(std::declval<const JITDylibSearchOrder &>()));
/// Define all symbols provided by the materialization unit to be part of this
/// JITDylib.
///
/// If RT is not specified then the default resource tracker will be used.
///
/// This overload always takes ownership of the MaterializationUnit. If any
/// errors occur, the MaterializationUnit consumed.
///
/// It is illegal to call this method on a defunct JITDylib and the client
/// is responsible for ensuring that they do not do so.
template <typename MaterializationUnitType>
Error define(std::unique_ptr<MaterializationUnitType> &&MU,
ResourceTrackerSP RT = nullptr);
/// Define all symbols provided by the materialization unit to be part of this
/// JITDylib.
///
/// This overload only takes ownership of the MaterializationUnit no error is
/// generated. If an error occurs, ownership remains with the caller. This
/// may allow the caller to modify the MaterializationUnit to correct the
/// issue, then re-call define.
///
/// It is illegal to call this method on a defunct JITDylib and the client
/// is responsible for ensuring that they do not do so.
template <typename MaterializationUnitType>
Error define(std::unique_ptr<MaterializationUnitType> &MU,
ResourceTrackerSP RT = nullptr);
/// Tries to remove the given symbols.
///
/// If any symbols are not defined in this JITDylib this method will return
/// a SymbolsNotFound error covering the missing symbols.
///
/// If all symbols are found but some symbols are in the process of being
/// materialized this method will return a SymbolsCouldNotBeRemoved error.
///
/// On success, all symbols are removed. On failure, the JITDylib state is
/// left unmodified (no symbols are removed).
///
/// It is illegal to call this method on a defunct JITDylib and the client
/// is responsible for ensuring that they do not do so.
Error remove(const SymbolNameSet &Names);
/// Returns the given JITDylibs and all of their transitive dependencies in
/// DFS order (based on linkage relationships). Each JITDylib will appear
/// only once.
///
/// If any JITDylib in the order is defunct then this method will return an
/// error, otherwise returns the order.
static Expected<std::vector<JITDylibSP>>
getDFSLinkOrder(ArrayRef<JITDylibSP> JDs);
/// Returns the given JITDylibs and all of their transitive dependencies in
/// reverse DFS order (based on linkage relationships). Each JITDylib will
/// appear only once.
///
/// If any JITDylib in the order is defunct then this method will return an
/// error, otherwise returns the order.
static Expected<std::vector<JITDylibSP>>
getReverseDFSLinkOrder(ArrayRef<JITDylibSP> JDs);
/// Return this JITDylib and its transitive dependencies in DFS order
/// based on linkage relationships.
///
/// If any JITDylib in the order is defunct then this method will return an
/// error, otherwise returns the order.
Expected<std::vector<JITDylibSP>> getDFSLinkOrder();
/// Rteurn this JITDylib and its transitive dependencies in reverse DFS order
/// based on linkage relationships.
///
/// If any JITDylib in the order is defunct then this method will return an
/// error, otherwise returns the order.
Expected<std::vector<JITDylibSP>> getReverseDFSLinkOrder();
private:
using AsynchronousSymbolQuerySet =
std::set<std::shared_ptr<AsynchronousSymbolQuery>>;
using AsynchronousSymbolQueryList =
std::vector<std::shared_ptr<AsynchronousSymbolQuery>>;
struct UnmaterializedInfo {
UnmaterializedInfo(std::unique_ptr<MaterializationUnit> MU,
ResourceTracker *RT)
: MU(std::move(MU)), RT(RT) {}
std::unique_ptr<MaterializationUnit> MU;
ResourceTracker *RT;
};
using UnmaterializedInfosMap =
DenseMap<SymbolStringPtr, std::shared_ptr<UnmaterializedInfo>>;
using UnmaterializedInfosList =
std::vector<std::shared_ptr<UnmaterializedInfo>>;
struct MaterializingInfo {
SymbolDependenceMap Dependants;
SymbolDependenceMap UnemittedDependencies;
void addQuery(std::shared_ptr<AsynchronousSymbolQuery> Q);
void removeQuery(const AsynchronousSymbolQuery &Q);
AsynchronousSymbolQueryList takeQueriesMeeting(SymbolState RequiredState);
AsynchronousSymbolQueryList takeAllPendingQueries() {
return std::move(PendingQueries);
}
bool hasQueriesPending() const { return !PendingQueries.empty(); }
const AsynchronousSymbolQueryList &pendingQueries() const {
return PendingQueries;
}
private:
AsynchronousSymbolQueryList PendingQueries;
};
using MaterializingInfosMap = DenseMap<SymbolStringPtr, MaterializingInfo>;
class SymbolTableEntry {
public:
SymbolTableEntry() = default;
SymbolTableEntry(JITSymbolFlags Flags)
: Flags(Flags), State(static_cast<uint8_t>(SymbolState::NeverSearched)),
MaterializerAttached(false), PendingRemoval(false) {}
ExecutorAddr getAddress() const { return Addr; }
JITSymbolFlags getFlags() const { return Flags; }
SymbolState getState() const { return static_cast<SymbolState>(State); }
bool hasMaterializerAttached() const { return MaterializerAttached; }
bool isPendingRemoval() const { return PendingRemoval; }
void setAddress(ExecutorAddr Addr) { this->Addr = Addr; }
void setFlags(JITSymbolFlags Flags) { this->Flags = Flags; }
void setState(SymbolState State) {
assert(static_cast<uint8_t>(State) < (1 << 6) &&
"State does not fit in bitfield");
this->State = static_cast<uint8_t>(State);
}
void setMaterializerAttached(bool MaterializerAttached) {
this->MaterializerAttached = MaterializerAttached;
}
void setPendingRemoval(bool PendingRemoval) {
this->PendingRemoval = PendingRemoval;
}
ExecutorSymbolDef getSymbol() const { return {Addr, Flags}; }
private:
ExecutorAddr Addr;
JITSymbolFlags Flags;
uint8_t State : 6;
uint8_t MaterializerAttached : 1;
uint8_t PendingRemoval : 1;
};
using SymbolTable = DenseMap<SymbolStringPtr, SymbolTableEntry>;
JITDylib(ExecutionSession &ES, std::string Name);
std::pair<AsynchronousSymbolQuerySet, std::shared_ptr<SymbolDependenceMap>>
removeTracker(ResourceTracker &RT);
void transferTracker(ResourceTracker &DstRT, ResourceTracker &SrcRT);
Error defineImpl(MaterializationUnit &MU);
void installMaterializationUnit(std::unique_ptr<MaterializationUnit> MU,
ResourceTracker &RT);
void detachQueryHelper(AsynchronousSymbolQuery &Q,
const SymbolNameSet &QuerySymbols);
void transferEmittedNodeDependencies(MaterializingInfo &DependantMI,
const SymbolStringPtr &DependantName,
MaterializingInfo &EmittedMI);
Expected<SymbolFlagsMap>
defineMaterializing(MaterializationResponsibility &FromMR,
SymbolFlagsMap SymbolFlags);
Error replace(MaterializationResponsibility &FromMR,
std::unique_ptr<MaterializationUnit> MU);
Expected<std::unique_ptr<MaterializationResponsibility>>
delegate(MaterializationResponsibility &FromMR, SymbolFlagsMap SymbolFlags,
SymbolStringPtr InitSymbol);
SymbolNameSet getRequestedSymbols(const SymbolFlagsMap &SymbolFlags) const;
void addDependencies(const SymbolStringPtr &Name,
const SymbolDependenceMap &Dependants);
Error resolve(MaterializationResponsibility &MR, const SymbolMap &Resolved);
Error emit(MaterializationResponsibility &MR, const SymbolFlagsMap &Emitted);
void unlinkMaterializationResponsibility(MaterializationResponsibility &MR);
using FailedSymbolsWorklist =
std::vector<std::pair<JITDylib *, SymbolStringPtr>>;
static std::pair<AsynchronousSymbolQuerySet,
std::shared_ptr<SymbolDependenceMap>>
failSymbols(FailedSymbolsWorklist);
ExecutionSession &ES;
enum { Open, Closing, Closed } State = Open;
std::mutex GeneratorsMutex;
SymbolTable Symbols;
UnmaterializedInfosMap UnmaterializedInfos;
MaterializingInfosMap MaterializingInfos;
std::vector<std::shared_ptr<DefinitionGenerator>> DefGenerators;
JITDylibSearchOrder LinkOrder;
ResourceTrackerSP DefaultTracker;
// Map trackers to sets of symbols tracked.
DenseMap<ResourceTracker *, SymbolNameVector> TrackerSymbols;
DenseMap<ResourceTracker *, DenseSet<MaterializationResponsibility *>>
TrackerMRs;
};
/// Platforms set up standard symbols and mediate interactions between dynamic
/// initializers (e.g. C++ static constructors) and ExecutionSession state.
/// Note that Platforms do not automatically run initializers: clients are still
/// responsible for doing this.
class Platform {
public:
virtual ~Platform();
/// This method will be called outside the session lock each time a JITDylib
/// is created (unless it is created with EmptyJITDylib set) to allow the
/// Platform to install any JITDylib specific standard symbols (e.g
/// __dso_handle).
virtual Error setupJITDylib(JITDylib &JD) = 0;
/// This method will be called outside the session lock each time a JITDylib
/// is removed to allow the Platform to remove any JITDylib-specific data.
virtual Error teardownJITDylib(JITDylib &JD) = 0;
/// This method will be called under the ExecutionSession lock each time a
/// MaterializationUnit is added to a JITDylib.
virtual Error notifyAdding(ResourceTracker &RT,
const MaterializationUnit &MU) = 0;
/// This method will be called under the ExecutionSession lock when a
/// ResourceTracker is removed.
virtual Error notifyRemoving(ResourceTracker &RT) = 0;
/// A utility function for looking up initializer symbols. Performs a blocking
/// lookup for the given symbols in each of the given JITDylibs.
///
/// Note: This function is deprecated and will be removed in the near future.
static Expected<DenseMap<JITDylib *, SymbolMap>>
lookupInitSymbols(ExecutionSession &ES,
const DenseMap<JITDylib *, SymbolLookupSet> &InitSyms);
/// Performs an async lookup for the given symbols in each of the given
/// JITDylibs, calling the given handler once all lookups have completed.
static void
lookupInitSymbolsAsync(unique_function<void(Error)> OnComplete,
ExecutionSession &ES,
const DenseMap<JITDylib *, SymbolLookupSet> &InitSyms);
};
/// A materialization task.
class MaterializationTask : public RTTIExtends<MaterializationTask, Task> {
public:
static char ID;
MaterializationTask(std::unique_ptr<MaterializationUnit> MU,
std::unique_ptr<MaterializationResponsibility> MR)
: MU(std::move(MU)), MR(std::move(MR)) {}
void printDescription(raw_ostream &OS) override;
void run() override;
private:
std::unique_ptr<MaterializationUnit> MU;
std::unique_ptr<MaterializationResponsibility> MR;
};
/// An ExecutionSession represents a running JIT program.
class ExecutionSession {
friend class InProgressLookupFlagsState;
friend class InProgressFullLookupState;
friend class JITDylib;
friend class LookupState;
friend class MaterializationResponsibility;
friend class ResourceTracker;
public:
/// For reporting errors.
using ErrorReporter = std::function<void(Error)>;
/// Send a result to the remote.
using SendResultFunction = unique_function<void(shared::WrapperFunctionResult)>;
/// For dispatching ORC tasks (typically materialization tasks).
using DispatchTaskFunction = unique_function<void(std::unique_ptr<Task> T)>;
/// An asynchronous wrapper-function callable from the executor via
/// jit-dispatch.
using JITDispatchHandlerFunction = unique_function<void(
SendResultFunction SendResult,
const char *ArgData, size_t ArgSize)>;
/// A map associating tag names with asynchronous wrapper function
/// implementations in the JIT.
using JITDispatchHandlerAssociationMap =
DenseMap<SymbolStringPtr, JITDispatchHandlerFunction>;
/// Construct an ExecutionSession with the given ExecutorProcessControl
/// object.
ExecutionSession(std::unique_ptr<ExecutorProcessControl> EPC);
/// Destroy an ExecutionSession. Verifies that endSession was called prior to
/// destruction.
~ExecutionSession();
/// End the session. Closes all JITDylibs and disconnects from the
/// executor. Clients must call this method before destroying the session.
Error endSession();
/// Get the ExecutorProcessControl object associated with this
/// ExecutionSession.
ExecutorProcessControl &getExecutorProcessControl() { return *EPC; }
/// Return the triple for the executor.
const Triple &getTargetTriple() const { return EPC->getTargetTriple(); }
/// Get the SymbolStringPool for this instance.
std::shared_ptr<SymbolStringPool> getSymbolStringPool() {
return EPC->getSymbolStringPool();
}
/// Add a symbol name to the SymbolStringPool and return a pointer to it.
SymbolStringPtr intern(StringRef SymName) { return EPC->intern(SymName); }
/// Set the Platform for this ExecutionSession.
void setPlatform(std::unique_ptr<Platform> P) { this->P = std::move(P); }
/// Get the Platform for this session.
/// Will return null if no Platform has been set for this ExecutionSession.
Platform *getPlatform() { return P.get(); }
/// Run the given lambda with the session mutex locked.
template <typename Func> decltype(auto) runSessionLocked(Func &&F) {
std::lock_guard<std::recursive_mutex> Lock(SessionMutex);
return F();
}
/// Register the given ResourceManager with this ExecutionSession.
/// Managers will be notified of events in reverse order of registration.
void registerResourceManager(ResourceManager &RM);
/// Deregister the given ResourceManager with this ExecutionSession.
/// Manager must have been previously registered.
void deregisterResourceManager(ResourceManager &RM);
/// Return a pointer to the "name" JITDylib.
/// Ownership of JITDylib remains within Execution Session
JITDylib *getJITDylibByName(StringRef Name);
/// Add a new bare JITDylib to this ExecutionSession.
///
/// The JITDylib Name is required to be unique. Clients should verify that
/// names are not being re-used (E.g. by calling getJITDylibByName) if names
/// are based on user input.
///
/// This call does not install any library code or symbols into the newly
/// created JITDylib. The client is responsible for all configuration.
JITDylib &createBareJITDylib(std::string Name);
/// Add a new JITDylib to this ExecutionSession.
///
/// The JITDylib Name is required to be unique. Clients should verify that
/// names are not being re-used (e.g. by calling getJITDylibByName) if names
/// are based on user input.
///
/// If a Platform is attached then Platform::setupJITDylib will be called to
/// install standard platform symbols (e.g. standard library interposes).
/// If no Platform is attached this call is equivalent to createBareJITDylib.
Expected<JITDylib &> createJITDylib(std::string Name);
/// Closes the given JITDylib.
///
/// This method clears all resources held for the JITDylib, puts it in the
/// closed state, and clears all references held by the ExecutionSession and
/// other JITDylibs. No further code can be added to the JITDylib, and the
/// object will be freed once any remaining JITDylibSPs to it are destroyed.
///
/// This method does *not* run static destructors.
///
/// This method can only be called once for each JITDylib.
Error removeJITDylib(JITDylib &JD);
/// Set the error reporter function.
ExecutionSession &setErrorReporter(ErrorReporter ReportError) {
this->ReportError = std::move(ReportError);
return *this;
}
/// Report a error for this execution session.
///
/// Unhandled errors can be sent here to log them.
void reportError(Error Err) { ReportError(std::move(Err)); }
/// Set the task dispatch function.
ExecutionSession &setDispatchTask(DispatchTaskFunction DispatchTask) {
this->DispatchTask = std::move(DispatchTask);
return *this;
}
/// Search the given JITDylibs to find the flags associated with each of the
/// given symbols.
void lookupFlags(LookupKind K, JITDylibSearchOrder SearchOrder,
SymbolLookupSet Symbols,
unique_function<void(Expected<SymbolFlagsMap>)> OnComplete);
/// Blocking version of lookupFlags.
Expected<SymbolFlagsMap> lookupFlags(LookupKind K,
JITDylibSearchOrder SearchOrder,
SymbolLookupSet Symbols);
/// Search the given JITDylibs for the given symbols.
///
/// SearchOrder lists the JITDylibs to search. For each dylib, the associated
/// boolean indicates whether the search should match against non-exported
/// (hidden visibility) symbols in that dylib (true means match against
/// non-exported symbols, false means do not match).
///
/// The NotifyComplete callback will be called once all requested symbols
/// reach the required state.
///
/// If all symbols are found, the RegisterDependencies function will be called
/// while the session lock is held. This gives clients a chance to register
/// dependencies for on the queried symbols for any symbols they are
/// materializing (if a MaterializationResponsibility instance is present,
/// this can be implemented by calling
/// MaterializationResponsibility::addDependencies). If there are no
/// dependenant symbols for this query (e.g. it is being made by a top level
/// client to get an address to call) then the value NoDependenciesToRegister
/// can be used.
void lookup(LookupKind K, const JITDylibSearchOrder &SearchOrder,
SymbolLookupSet Symbols, SymbolState RequiredState,
SymbolsResolvedCallback NotifyComplete,
RegisterDependenciesFunction RegisterDependencies);
/// Blocking version of lookup above. Returns the resolved symbol map.
/// If WaitUntilReady is true (the default), will not return until all
/// requested symbols are ready (or an error occurs). If WaitUntilReady is
/// false, will return as soon as all requested symbols are resolved,
/// or an error occurs. If WaitUntilReady is false and an error occurs
/// after resolution, the function will return a success value, but the
/// error will be reported via reportErrors.
Expected<SymbolMap> lookup(const JITDylibSearchOrder &SearchOrder,
SymbolLookupSet Symbols,
LookupKind K = LookupKind::Static,
SymbolState RequiredState = SymbolState::Ready,
RegisterDependenciesFunction RegisterDependencies =
NoDependenciesToRegister);
/// Convenience version of blocking lookup.
/// Searches each of the JITDylibs in the search order in turn for the given
/// symbol.
Expected<ExecutorSymbolDef>
lookup(const JITDylibSearchOrder &SearchOrder, SymbolStringPtr Symbol,
SymbolState RequiredState = SymbolState::Ready);
/// Convenience version of blocking lookup.
/// Searches each of the JITDylibs in the search order in turn for the given
/// symbol. The search will not find non-exported symbols.
Expected<ExecutorSymbolDef>
lookup(ArrayRef<JITDylib *> SearchOrder, SymbolStringPtr Symbol,
SymbolState RequiredState = SymbolState::Ready);
/// Convenience version of blocking lookup.
/// Searches each of the JITDylibs in the search order in turn for the given
/// symbol. The search will not find non-exported symbols.
Expected<ExecutorSymbolDef>
lookup(ArrayRef<JITDylib *> SearchOrder, StringRef Symbol,
SymbolState RequiredState = SymbolState::Ready);
/// Materialize the given unit.
void dispatchTask(std::unique_ptr<Task> T) {
assert(T && "T must be non-null");
DEBUG_WITH_TYPE("orc", dumpDispatchInfo(*T));
DispatchTask(std::move(T));
}
/// Run a wrapper function in the executor.
///
/// The wrapper function should be callable as:
///
/// \code{.cpp}
/// CWrapperFunctionResult fn(uint8_t *Data, uint64_t Size);
/// \endcode{.cpp}
///
/// The given OnComplete function will be called to return the result.
template <typename... ArgTs>
void callWrapperAsync(ArgTs &&... Args) {
EPC->callWrapperAsync(std::forward<ArgTs>(Args)...);
}
/// Run a wrapper function in the executor. The wrapper function should be
/// callable as:
///
/// \code{.cpp}
/// CWrapperFunctionResult fn(uint8_t *Data, uint64_t Size);
/// \endcode{.cpp}
shared::WrapperFunctionResult callWrapper(ExecutorAddr WrapperFnAddr,
ArrayRef<char> ArgBuffer) {
return EPC->callWrapper(WrapperFnAddr, ArgBuffer);
}
/// Run a wrapper function using SPS to serialize the arguments and
/// deserialize the results.
template <typename SPSSignature, typename SendResultT, typename... ArgTs>
void callSPSWrapperAsync(ExecutorAddr WrapperFnAddr, SendResultT &&SendResult,
const ArgTs &...Args) {
EPC->callSPSWrapperAsync<SPSSignature, SendResultT, ArgTs...>(
WrapperFnAddr, std::forward<SendResultT>(SendResult), Args...);
}
/// Run a wrapper function using SPS to serialize the arguments and
/// deserialize the results.
///
/// If SPSSignature is a non-void function signature then the second argument
/// (the first in the Args list) should be a reference to a return value.
template <typename SPSSignature, typename... WrapperCallArgTs>
Error callSPSWrapper(ExecutorAddr WrapperFnAddr,
WrapperCallArgTs &&...WrapperCallArgs) {
return EPC->callSPSWrapper<SPSSignature, WrapperCallArgTs...>(
WrapperFnAddr, std::forward<WrapperCallArgTs>(WrapperCallArgs)...);
}
/// Wrap a handler that takes concrete argument types (and a sender for a
/// concrete return type) to produce an AsyncHandlerWrapperFunction. Uses SPS
/// to unpack the arguments and pack the result.
///
/// This function is intended to support easy construction of
/// AsyncHandlerWrapperFunctions that can be associated with a tag
/// (using registerJITDispatchHandler) and called from the executor.
template <typename SPSSignature, typename HandlerT>
static JITDispatchHandlerFunction wrapAsyncWithSPS(HandlerT &&H) {
return [H = std::forward<HandlerT>(H)](
SendResultFunction SendResult,
const char *ArgData, size_t ArgSize) mutable {
shared::WrapperFunction<SPSSignature>::handleAsync(ArgData, ArgSize, H,
std::move(SendResult));
};
}
/// Wrap a class method that takes concrete argument types (and a sender for
/// a concrete return type) to produce an AsyncHandlerWrapperFunction. Uses
/// SPS to unpack teh arguments and pack the result.
///
/// This function is intended to support easy construction of
/// AsyncHandlerWrapperFunctions that can be associated with a tag
/// (using registerJITDispatchHandler) and called from the executor.
template <typename SPSSignature, typename ClassT, typename... MethodArgTs>
static JITDispatchHandlerFunction
wrapAsyncWithSPS(ClassT *Instance, void (ClassT::*Method)(MethodArgTs...)) {
return wrapAsyncWithSPS<SPSSignature>(
[Instance, Method](MethodArgTs &&...MethodArgs) {
(Instance->*Method)(std::forward<MethodArgTs>(MethodArgs)...);
});
}
/// For each tag symbol name, associate the corresponding
/// AsyncHandlerWrapperFunction with the address of that symbol. The
/// handler becomes callable from the executor using the ORC runtime
/// __orc_rt_jit_dispatch function and the given tag.
///
/// Tag symbols will be looked up in JD using LookupKind::Static,
/// JITDylibLookupFlags::MatchAllSymbols (hidden tags will be found), and
/// LookupFlags::WeaklyReferencedSymbol. Missing tag definitions will not
/// cause an error, the handler will simply be dropped.
Error registerJITDispatchHandlers(JITDylib &JD,
JITDispatchHandlerAssociationMap WFs);
/// Run a registered jit-side wrapper function.
/// This should be called by the ExecutorProcessControl instance in response
/// to incoming jit-dispatch requests from the executor.
void runJITDispatchHandler(SendResultFunction SendResult,
ExecutorAddr HandlerFnTagAddr,
ArrayRef<char> ArgBuffer);
/// Dump the state of all the JITDylibs in this session.
void dump(raw_ostream &OS);
private:
static void logErrorsToStdErr(Error Err) {
logAllUnhandledErrors(std::move(Err), errs(), "JIT session error: ");
}
static void runOnCurrentThread(std::unique_ptr<Task> T) { T->run(); }
void dispatchOutstandingMUs();
static std::unique_ptr<MaterializationResponsibility>
createMaterializationResponsibility(ResourceTracker &RT,
SymbolFlagsMap Symbols,
SymbolStringPtr InitSymbol) {
auto &JD = RT.getJITDylib();
std::unique_ptr<MaterializationResponsibility> MR(
new MaterializationResponsibility(&RT, std::move(Symbols),
std::move(InitSymbol)));
JD.TrackerMRs[&RT].insert(MR.get());
return MR;
}
Error removeResourceTracker(ResourceTracker &RT);
void transferResourceTracker(ResourceTracker &DstRT, ResourceTracker &SrcRT);
void destroyResourceTracker(ResourceTracker &RT);
// State machine functions for query application..
/// IL_updateCandidatesFor is called to remove already-defined symbols that
/// match a given query from the set of candidate symbols to generate
/// definitions for (no need to generate a definition if one already exists).
Error IL_updateCandidatesFor(JITDylib &JD, JITDylibLookupFlags JDLookupFlags,
SymbolLookupSet &Candidates,
SymbolLookupSet *NonCandidates);
/// OL_applyQueryPhase1 is an optionally re-startable loop for triggering
/// definition generation. It is called when a lookup is performed, and again
/// each time that LookupState::continueLookup is called.
void OL_applyQueryPhase1(std::unique_ptr<InProgressLookupState> IPLS,
Error Err);
/// OL_completeLookup is run once phase 1 successfully completes for a lookup
/// call. It attempts to attach the symbol to all symbol table entries and
/// collect all MaterializationUnits to dispatch. If this method fails then
/// all MaterializationUnits will be left un-materialized.
void OL_completeLookup(std::unique_ptr<InProgressLookupState> IPLS,
std::shared_ptr<AsynchronousSymbolQuery> Q,
RegisterDependenciesFunction RegisterDependencies);
/// OL_completeLookupFlags is run once phase 1 successfully completes for a
/// lookupFlags call.
void OL_completeLookupFlags(
std::unique_ptr<InProgressLookupState> IPLS,
unique_function<void(Expected<SymbolFlagsMap>)> OnComplete);
// State machine functions for MaterializationResponsibility.
void OL_destroyMaterializationResponsibility(
MaterializationResponsibility &MR);
SymbolNameSet OL_getRequestedSymbols(const MaterializationResponsibility &MR);
Error OL_notifyResolved(MaterializationResponsibility &MR,
const SymbolMap &Symbols);
Error OL_notifyEmitted(MaterializationResponsibility &MR);
Error OL_defineMaterializing(MaterializationResponsibility &MR,
SymbolFlagsMap SymbolFlags);
void OL_notifyFailed(MaterializationResponsibility &MR);
Error OL_replace(MaterializationResponsibility &MR,
std::unique_ptr<MaterializationUnit> MU);
Expected<std::unique_ptr<MaterializationResponsibility>>
OL_delegate(MaterializationResponsibility &MR, const SymbolNameSet &Symbols);
void OL_addDependencies(MaterializationResponsibility &MR,
const SymbolStringPtr &Name,
const SymbolDependenceMap &Dependencies);
void OL_addDependenciesForAll(MaterializationResponsibility &MR,
const SymbolDependenceMap &Dependencies);
#ifndef NDEBUG
void dumpDispatchInfo(Task &T);
#endif // NDEBUG
mutable std::recursive_mutex SessionMutex;
bool SessionOpen = true;
std::unique_ptr<ExecutorProcessControl> EPC;
std::unique_ptr<Platform> P;
ErrorReporter ReportError = logErrorsToStdErr;
DispatchTaskFunction DispatchTask = runOnCurrentThread;
std::vector<ResourceManager *> ResourceManagers;
std::vector<JITDylibSP> JDs;
// FIXME: Remove this (and runOutstandingMUs) once the linking layer works
// with callbacks from asynchronous queries.
mutable std::recursive_mutex OutstandingMUsMutex;
std::vector<std::pair<std::unique_ptr<MaterializationUnit>,
std::unique_ptr<MaterializationResponsibility>>>
OutstandingMUs;
mutable std::mutex JITDispatchHandlersMutex;
DenseMap<ExecutorAddr, std::shared_ptr<JITDispatchHandlerFunction>>
JITDispatchHandlers;
};
template <typename Func> Error ResourceTracker::withResourceKeyDo(Func &&F) {
return getJITDylib().getExecutionSession().runSessionLocked([&]() -> Error {
if (isDefunct())
return make_error<ResourceTrackerDefunct>(this);
F(getKeyUnsafe());
return Error::success();
});
}
inline ExecutionSession &
MaterializationResponsibility::getExecutionSession() const {
return JD.getExecutionSession();
}
template <typename GeneratorT>
GeneratorT &JITDylib::addGenerator(std::unique_ptr<GeneratorT> DefGenerator) {
auto &G = *DefGenerator;
ES.runSessionLocked([&] {
assert(State == Open && "Cannot add generator to closed JITDylib");
DefGenerators.push_back(std::move(DefGenerator));
});
return G;
}
template <typename Func>
auto JITDylib::withLinkOrderDo(Func &&F)
-> decltype(F(std::declval<const JITDylibSearchOrder &>())) {
assert(State == Open && "Cannot use link order of closed JITDylib");
return ES.runSessionLocked([&]() { return F(LinkOrder); });
}
template <typename MaterializationUnitType>
Error JITDylib::define(std::unique_ptr<MaterializationUnitType> &&MU,
ResourceTrackerSP RT) {
assert(MU && "Can not define with a null MU");
if (MU->getSymbols().empty()) {
// Empty MUs are allowable but pathological, so issue a warning.
DEBUG_WITH_TYPE("orc", {
dbgs() << "Warning: Discarding empty MU " << MU->getName() << " for "
<< getName() << "\n";
});
return Error::success();
} else
DEBUG_WITH_TYPE("orc", {
dbgs() << "Defining MU " << MU->getName() << " for " << getName()
<< " (tracker: ";
if (RT == getDefaultResourceTracker())
dbgs() << "default)";
else if (RT)
dbgs() << RT.get() << ")\n";
else
dbgs() << "0x0, default will be used)\n";
});
return ES.runSessionLocked([&, this]() -> Error {
assert(State == Open && "JD is defunct");
if (auto Err = defineImpl(*MU))
return Err;
if (!RT)
RT = getDefaultResourceTracker();
if (auto *P = ES.getPlatform()) {
if (auto Err = P->notifyAdding(*RT, *MU))
return Err;
}
installMaterializationUnit(std::move(MU), *RT);
return Error::success();
});
}
template <typename MaterializationUnitType>
Error JITDylib::define(std::unique_ptr<MaterializationUnitType> &MU,
ResourceTrackerSP RT) {
assert(MU && "Can not define with a null MU");
if (MU->getSymbols().empty()) {
// Empty MUs are allowable but pathological, so issue a warning.
DEBUG_WITH_TYPE("orc", {
dbgs() << "Warning: Discarding empty MU " << MU->getName() << getName()
<< "\n";
});
return Error::success();
} else
DEBUG_WITH_TYPE("orc", {
dbgs() << "Defining MU " << MU->getName() << " for " << getName()
<< " (tracker: ";
if (RT == getDefaultResourceTracker())
dbgs() << "default)";
else if (RT)
dbgs() << RT.get() << ")\n";
else
dbgs() << "0x0, default will be used)\n";
});
return ES.runSessionLocked([&, this]() -> Error {
assert(State == Open && "JD is defunct");
if (auto Err = defineImpl(*MU))
return Err;
if (!RT)
RT = getDefaultResourceTracker();
if (auto *P = ES.getPlatform()) {
if (auto Err = P->notifyAdding(*RT, *MU))
return Err;
}
installMaterializationUnit(std::move(MU), *RT);
return Error::success();
});
}
/// ReexportsGenerator can be used with JITDylib::addGenerator to automatically
/// re-export a subset of the source JITDylib's symbols in the target.
class ReexportsGenerator : public DefinitionGenerator {
public:
using SymbolPredicate = std::function<bool(SymbolStringPtr)>;
/// Create a reexports generator. If an Allow predicate is passed, only
/// symbols for which the predicate returns true will be reexported. If no
/// Allow predicate is passed, all symbols will be exported.
ReexportsGenerator(JITDylib &SourceJD,
JITDylibLookupFlags SourceJDLookupFlags,
SymbolPredicate Allow = SymbolPredicate());
Error tryToGenerate(LookupState &LS, LookupKind K, JITDylib &JD,
JITDylibLookupFlags JDLookupFlags,
const SymbolLookupSet &LookupSet) override;
private:
JITDylib &SourceJD;
JITDylibLookupFlags SourceJDLookupFlags;
SymbolPredicate Allow;
};
// --------------- IMPLEMENTATION --------------
// Implementations for inline functions/methods.
// ---------------------------------------------
inline MaterializationResponsibility::~MaterializationResponsibility() {
getExecutionSession().OL_destroyMaterializationResponsibility(*this);
}
inline SymbolNameSet MaterializationResponsibility::getRequestedSymbols() const {
return getExecutionSession().OL_getRequestedSymbols(*this);
}
inline Error MaterializationResponsibility::notifyResolved(
const SymbolMap &Symbols) {
return getExecutionSession().OL_notifyResolved(*this, Symbols);
}
inline Error MaterializationResponsibility::notifyEmitted() {
return getExecutionSession().OL_notifyEmitted(*this);
}
inline Error MaterializationResponsibility::defineMaterializing(
SymbolFlagsMap SymbolFlags) {
return getExecutionSession().OL_defineMaterializing(*this,
std::move(SymbolFlags));
}
inline void MaterializationResponsibility::failMaterialization() {
getExecutionSession().OL_notifyFailed(*this);
}
inline Error MaterializationResponsibility::replace(
std::unique_ptr<MaterializationUnit> MU) {
return getExecutionSession().OL_replace(*this, std::move(MU));
}
inline Expected<std::unique_ptr<MaterializationResponsibility>>
MaterializationResponsibility::delegate(const SymbolNameSet &Symbols) {
return getExecutionSession().OL_delegate(*this, Symbols);
}
inline void MaterializationResponsibility::addDependencies(
const SymbolStringPtr &Name, const SymbolDependenceMap &Dependencies) {
getExecutionSession().OL_addDependencies(*this, Name, Dependencies);
}
inline void MaterializationResponsibility::addDependenciesForAll(
const SymbolDependenceMap &Dependencies) {
getExecutionSession().OL_addDependenciesForAll(*this, Dependencies);
}
} // End namespace orc
} // End namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_CORE_H
PK iwFZ�7R�� � + ExecutionEngine/Orc/DebuggerSupportPlugin.hnu �[��� //===--- DebugerSupportPlugin.h -- Utils for debugger support ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Generates debug objects and registers them using the jit-loader-gdb protocol.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_DEBUGGERSUPPORTPLUGIN_H
#define LLVM_EXECUTIONENGINE_ORC_DEBUGGERSUPPORTPLUGIN_H
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/ExecutionEngine/Orc/EPCDebugObjectRegistrar.h"
#include "llvm/ExecutionEngine/Orc/ObjectLinkingLayer.h"
namespace llvm {
namespace orc {
/// For each object containing debug info, installs JITLink passes to synthesize
/// a debug object and then register it via the GDB JIT-registration interface.
///
/// Currently MachO only. For ELF use DebugObjectManagerPlugin. These two
/// plugins will be merged in the near future.
class GDBJITDebugInfoRegistrationPlugin : public ObjectLinkingLayer::Plugin {
public:
class DebugSectionSynthesizer {
public:
virtual ~DebugSectionSynthesizer() = default;
virtual Error startSynthesis() = 0;
virtual Error completeSynthesisAndRegister() = 0;
};
static Expected<std::unique_ptr<GDBJITDebugInfoRegistrationPlugin>>
Create(ExecutionSession &ES, JITDylib &ProcessJD, const Triple &TT);
GDBJITDebugInfoRegistrationPlugin(ExecutorAddr RegisterActionAddr)
: RegisterActionAddr(RegisterActionAddr) {}
Error notifyFailed(MaterializationResponsibility &MR) override;
Error notifyRemovingResources(JITDylib &JD, ResourceKey K) override;
void notifyTransferringResources(JITDylib &JD, ResourceKey DstKey,
ResourceKey SrcKey) override;
void modifyPassConfig(MaterializationResponsibility &MR,
jitlink::LinkGraph &LG,
jitlink::PassConfiguration &PassConfig) override;
private:
void modifyPassConfigForMachO(MaterializationResponsibility &MR,
jitlink::LinkGraph &LG,
jitlink::PassConfiguration &PassConfig);
ExecutorAddr RegisterActionAddr;
};
} // namespace orc
} // namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_DEBUGGERSUPPORTPLUGIN_H
PK iwFZ�4� � $ ExecutionEngine/Orc/IRCompileLayer.hnu �[��� //===- IRCompileLayer.h -- Eagerly compile IR for JIT -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Contains the definition for a basic, eagerly compiling layer of the JIT.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_IRCOMPILELAYER_H
#define LLVM_EXECUTIONENGINE_ORC_IRCOMPILELAYER_H
#include "llvm/ADT/STLExtras.h"
#include "llvm/ExecutionEngine/JITSymbol.h"
#include "llvm/ExecutionEngine/Orc/Layer.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/MemoryBuffer.h"
#include <functional>
#include <memory>
#include <mutex>
namespace llvm {
class Module;
namespace orc {
class IRCompileLayer : public IRLayer {
public:
class IRCompiler {
public:
IRCompiler(IRSymbolMapper::ManglingOptions MO) : MO(std::move(MO)) {}
virtual ~IRCompiler();
const IRSymbolMapper::ManglingOptions &getManglingOptions() const {
return MO;
}
virtual Expected<std::unique_ptr<MemoryBuffer>> operator()(Module &M) = 0;
protected:
IRSymbolMapper::ManglingOptions &manglingOptions() { return MO; }
private:
IRSymbolMapper::ManglingOptions MO;
};
using NotifyCompiledFunction = std::function<void(
MaterializationResponsibility &R, ThreadSafeModule TSM)>;
IRCompileLayer(ExecutionSession &ES, ObjectLayer &BaseLayer,
std::unique_ptr<IRCompiler> Compile);
IRCompiler &getCompiler() { return *Compile; }
void setNotifyCompiled(NotifyCompiledFunction NotifyCompiled);
void emit(std::unique_ptr<MaterializationResponsibility> R,
ThreadSafeModule TSM) override;
private:
mutable std::mutex IRLayerMutex;
ObjectLayer &BaseLayer;
std::unique_ptr<IRCompiler> Compile;
const IRSymbolMapper::ManglingOptions *ManglingOpts;
NotifyCompiledFunction NotifyCompiled = NotifyCompiledFunction();
};
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_IRCOMPILELAYER_H
PK iwFZ��J�/2 /2 $ ExecutionEngine/Orc/ELFNixPlatform.hnu �[��� //===-- ELFNixPlatform.h -- Utilities for executing ELF in Orc --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Linux/BSD support for executing JIT'd ELF in Orc.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_ELFNIXPLATFORM_H
#define LLVM_EXECUTIONENGINE_ORC_ELFNIXPLATFORM_H
#include "llvm/ADT/StringRef.h"
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/ExecutionEngine/Orc/ExecutorProcessControl.h"
#include "llvm/ExecutionEngine/Orc/ObjectLinkingLayer.h"
#include "llvm/ExecutionEngine/Orc/Shared/ExecutorAddress.h"
#include <future>
#include <thread>
#include <vector>
namespace llvm {
namespace orc {
struct ELFPerObjectSectionsToRegister {
ExecutorAddrRange EHFrameSection;
ExecutorAddrRange ThreadDataSection;
};
struct ELFNixJITDylibInitializers {
using SectionList = std::vector<ExecutorAddrRange>;
ELFNixJITDylibInitializers(std::string Name, ExecutorAddr DSOHandleAddress)
: Name(std::move(Name)), DSOHandleAddress(std::move(DSOHandleAddress)) {}
std::string Name;
ExecutorAddr DSOHandleAddress;
StringMap<SectionList> InitSections;
};
class ELFNixJITDylibDeinitializers {};
using ELFNixJITDylibInitializerSequence =
std::vector<ELFNixJITDylibInitializers>;
using ELFNixJITDylibDeinitializerSequence =
std::vector<ELFNixJITDylibDeinitializers>;
/// Mediates between ELFNix initialization and ExecutionSession state.
class ELFNixPlatform : public Platform {
public:
/// Try to create a ELFNixPlatform instance, adding the ORC runtime to the
/// given JITDylib.
///
/// The ORC runtime requires access to a number of symbols in
/// libc++. It is up to the caller to ensure that the requried
/// symbols can be referenced by code added to PlatformJD. The
/// standard way to achieve this is to first attach dynamic library
/// search generators for either the given process, or for the
/// specific required libraries, to PlatformJD, then to create the
/// platform instance:
///
/// \code{.cpp}
/// auto &PlatformJD = ES.createBareJITDylib("stdlib");
/// PlatformJD.addGenerator(
/// ExitOnErr(EPCDynamicLibrarySearchGenerator
/// ::GetForTargetProcess(EPC)));
/// ES.setPlatform(
/// ExitOnErr(ELFNixPlatform::Create(ES, ObjLayer, EPC, PlatformJD,
/// "/path/to/orc/runtime")));
/// \endcode
///
/// Alternatively, these symbols could be added to another JITDylib that
/// PlatformJD links against.
///
/// Clients are also responsible for ensuring that any JIT'd code that
/// depends on runtime functions (including any code using TLV or static
/// destructors) can reference the runtime symbols. This is usually achieved
/// by linking any JITDylibs containing regular code against
/// PlatformJD.
///
/// By default, ELFNixPlatform will add the set of aliases returned by the
/// standardPlatformAliases function. This includes both required aliases
/// (e.g. __cxa_atexit -> __orc_rt_elf_cxa_atexit for static destructor
/// support), and optional aliases that provide JIT versions of common
/// functions (e.g. dlopen -> __orc_rt_elf_jit_dlopen). Clients can
/// override these defaults by passing a non-None value for the
/// RuntimeAliases function, in which case the client is responsible for
/// setting up all aliases (including the required ones).
static Expected<std::unique_ptr<ELFNixPlatform>>
Create(ExecutionSession &ES, ObjectLinkingLayer &ObjLinkingLayer,
JITDylib &PlatformJD, std::unique_ptr<DefinitionGenerator> OrcRuntime,
std::optional<SymbolAliasMap> RuntimeAliases = std::nullopt);
/// Construct using a path to the ORC runtime.
static Expected<std::unique_ptr<ELFNixPlatform>>
Create(ExecutionSession &ES, ObjectLinkingLayer &ObjLinkingLayer,
JITDylib &PlatformJD, const char *OrcRuntimePath,
std::optional<SymbolAliasMap> RuntimeAliases = std::nullopt);
ExecutionSession &getExecutionSession() const { return ES; }
ObjectLinkingLayer &getObjectLinkingLayer() const { return ObjLinkingLayer; }
Error setupJITDylib(JITDylib &JD) override;
Error teardownJITDylib(JITDylib &JD) override;
Error notifyAdding(ResourceTracker &RT,
const MaterializationUnit &MU) override;
Error notifyRemoving(ResourceTracker &RT) override;
/// Returns an AliasMap containing the default aliases for the ELFNixPlatform.
/// This can be modified by clients when constructing the platform to add
/// or remove aliases.
static Expected<SymbolAliasMap> standardPlatformAliases(ExecutionSession &ES,
JITDylib &PlatformJD);
/// Returns the array of required CXX aliases.
static ArrayRef<std::pair<const char *, const char *>> requiredCXXAliases();
/// Returns the array of standard runtime utility aliases for ELF.
static ArrayRef<std::pair<const char *, const char *>>
standardRuntimeUtilityAliases();
private:
// The ELFNixPlatformPlugin scans/modifies LinkGraphs to support ELF
// platform features including initializers, exceptions, TLV, and language
// runtime registration.
class ELFNixPlatformPlugin : public ObjectLinkingLayer::Plugin {
public:
ELFNixPlatformPlugin(ELFNixPlatform &MP) : MP(MP) {}
void modifyPassConfig(MaterializationResponsibility &MR,
jitlink::LinkGraph &G,
jitlink::PassConfiguration &Config) override;
SyntheticSymbolDependenciesMap
getSyntheticSymbolDependencies(MaterializationResponsibility &MR) override;
// FIXME: We should be tentatively tracking scraped sections and discarding
// if the MR fails.
Error notifyFailed(MaterializationResponsibility &MR) override {
return Error::success();
}
Error notifyRemovingResources(JITDylib &JD, ResourceKey K) override {
return Error::success();
}
void notifyTransferringResources(JITDylib &JD, ResourceKey DstKey,
ResourceKey SrcKey) override {}
private:
using InitSymbolDepMap =
DenseMap<MaterializationResponsibility *, JITLinkSymbolSet>;
void addInitializerSupportPasses(MaterializationResponsibility &MR,
jitlink::PassConfiguration &Config);
void addDSOHandleSupportPasses(MaterializationResponsibility &MR,
jitlink::PassConfiguration &Config);
void addEHAndTLVSupportPasses(MaterializationResponsibility &MR,
jitlink::PassConfiguration &Config);
Error preserveInitSections(jitlink::LinkGraph &G,
MaterializationResponsibility &MR);
Error registerInitSections(jitlink::LinkGraph &G, JITDylib &JD);
Error fixTLVSectionsAndEdges(jitlink::LinkGraph &G, JITDylib &JD);
std::mutex PluginMutex;
ELFNixPlatform &MP;
InitSymbolDepMap InitSymbolDeps;
};
using SendInitializerSequenceFn =
unique_function<void(Expected<ELFNixJITDylibInitializerSequence>)>;
using SendDeinitializerSequenceFn =
unique_function<void(Expected<ELFNixJITDylibDeinitializerSequence>)>;
using SendSymbolAddressFn = unique_function<void(Expected<ExecutorAddr>)>;
static bool supportedTarget(const Triple &TT);
ELFNixPlatform(ExecutionSession &ES, ObjectLinkingLayer &ObjLinkingLayer,
JITDylib &PlatformJD,
std::unique_ptr<DefinitionGenerator> OrcRuntimeGenerator,
Error &Err);
// Associate ELFNixPlatform JIT-side runtime support functions with handlers.
Error associateRuntimeSupportFunctions(JITDylib &PlatformJD);
void getInitializersBuildSequencePhase(SendInitializerSequenceFn SendResult,
JITDylib &JD,
std::vector<JITDylibSP> DFSLinkOrder);
void getInitializersLookupPhase(SendInitializerSequenceFn SendResult,
JITDylib &JD);
void rt_getInitializers(SendInitializerSequenceFn SendResult,
StringRef JDName);
void rt_getDeinitializers(SendDeinitializerSequenceFn SendResult,
ExecutorAddr Handle);
void rt_lookupSymbol(SendSymbolAddressFn SendResult, ExecutorAddr Handle,
StringRef SymbolName);
// Records the addresses of runtime symbols used by the platform.
Error bootstrapELFNixRuntime(JITDylib &PlatformJD);
Error registerInitInfo(JITDylib &JD,
ArrayRef<jitlink::Section *> InitSections);
Error registerPerObjectSections(const ELFPerObjectSectionsToRegister &POSR);
Expected<uint64_t> createPThreadKey();
ExecutionSession &ES;
ObjectLinkingLayer &ObjLinkingLayer;
SymbolStringPtr DSOHandleSymbol;
std::atomic<bool> RuntimeBootstrapped{false};
ExecutorAddr orc_rt_elfnix_platform_bootstrap;
ExecutorAddr orc_rt_elfnix_platform_shutdown;
ExecutorAddr orc_rt_elfnix_register_object_sections;
ExecutorAddr orc_rt_elfnix_create_pthread_key;
DenseMap<JITDylib *, SymbolLookupSet> RegisteredInitSymbols;
// InitSeqs gets its own mutex to avoid locking the whole session when
// aggregating data from the jitlink.
std::mutex PlatformMutex;
DenseMap<JITDylib *, ELFNixJITDylibInitializers> InitSeqs;
std::vector<ELFPerObjectSectionsToRegister> BootstrapPOSRs;
DenseMap<ExecutorAddr, JITDylib *> HandleAddrToJITDylib;
DenseMap<JITDylib *, uint64_t> JITDylibToPThreadKey;
};
namespace shared {
using SPSELFPerObjectSectionsToRegister =
SPSTuple<SPSExecutorAddrRange, SPSExecutorAddrRange>;
template <>
class SPSSerializationTraits<SPSELFPerObjectSectionsToRegister,
ELFPerObjectSectionsToRegister> {
public:
static size_t size(const ELFPerObjectSectionsToRegister &MOPOSR) {
return SPSELFPerObjectSectionsToRegister::AsArgList::size(
MOPOSR.EHFrameSection, MOPOSR.ThreadDataSection);
}
static bool serialize(SPSOutputBuffer &OB,
const ELFPerObjectSectionsToRegister &MOPOSR) {
return SPSELFPerObjectSectionsToRegister::AsArgList::serialize(
OB, MOPOSR.EHFrameSection, MOPOSR.ThreadDataSection);
}
static bool deserialize(SPSInputBuffer &IB,
ELFPerObjectSectionsToRegister &MOPOSR) {
return SPSELFPerObjectSectionsToRegister::AsArgList::deserialize(
IB, MOPOSR.EHFrameSection, MOPOSR.ThreadDataSection);
}
};
using SPSNamedExecutorAddrRangeSequenceMap =
SPSSequence<SPSTuple<SPSString, SPSExecutorAddrRangeSequence>>;
using SPSELFNixJITDylibInitializers =
SPSTuple<SPSString, SPSExecutorAddr, SPSNamedExecutorAddrRangeSequenceMap>;
using SPSELFNixJITDylibInitializerSequence =
SPSSequence<SPSELFNixJITDylibInitializers>;
/// Serialization traits for ELFNixJITDylibInitializers.
template <>
class SPSSerializationTraits<SPSELFNixJITDylibInitializers,
ELFNixJITDylibInitializers> {
public:
static size_t size(const ELFNixJITDylibInitializers &MOJDIs) {
return SPSELFNixJITDylibInitializers::AsArgList::size(
MOJDIs.Name, MOJDIs.DSOHandleAddress, MOJDIs.InitSections);
}
static bool serialize(SPSOutputBuffer &OB,
const ELFNixJITDylibInitializers &MOJDIs) {
return SPSELFNixJITDylibInitializers::AsArgList::serialize(
OB, MOJDIs.Name, MOJDIs.DSOHandleAddress, MOJDIs.InitSections);
}
static bool deserialize(SPSInputBuffer &IB,
ELFNixJITDylibInitializers &MOJDIs) {
return SPSELFNixJITDylibInitializers::AsArgList::deserialize(
IB, MOJDIs.Name, MOJDIs.DSOHandleAddress, MOJDIs.InitSections);
}
};
using SPSELFJITDylibDeinitializers = SPSEmpty;
using SPSELFJITDylibDeinitializerSequence =
SPSSequence<SPSELFJITDylibDeinitializers>;
template <>
class SPSSerializationTraits<SPSELFJITDylibDeinitializers,
ELFNixJITDylibDeinitializers> {
public:
static size_t size(const ELFNixJITDylibDeinitializers &MOJDDs) { return 0; }
static bool serialize(SPSOutputBuffer &OB,
const ELFNixJITDylibDeinitializers &MOJDDs) {
return true;
}
static bool deserialize(SPSInputBuffer &IB,
ELFNixJITDylibDeinitializers &MOJDDs) {
MOJDDs = ELFNixJITDylibDeinitializers();
return true;
}
};
} // end namespace shared
} // end namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_ELFNIXPLATFORM_H
PK iwFZ6K�* * ExecutionEngine/Orc/Mangling.hnu �[��� //===------ Mangling.h -- Name Mangling Utilities for ORC -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Name mangling utilities for ORC.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_MANGLING_H
#define LLVM_EXECUTIONENGINE_ORC_MANGLING_H
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/ExecutionEngine/Orc/ThreadSafeModule.h"
#include "llvm/IR/Module.h"
#include "llvm/Support/MemoryBuffer.h"
namespace llvm {
namespace orc {
/// Mangles symbol names then uniques them in the context of an
/// ExecutionSession.
class MangleAndInterner {
public:
MangleAndInterner(ExecutionSession &ES, const DataLayout &DL);
SymbolStringPtr operator()(StringRef Name);
private:
ExecutionSession &ES;
const DataLayout &DL;
};
/// Maps IR global values to their linker symbol names / flags.
///
/// This utility can be used when adding new IR globals in the JIT.
class IRSymbolMapper {
public:
struct ManglingOptions {
bool EmulatedTLS = false;
};
using SymbolNameToDefinitionMap = std::map<SymbolStringPtr, GlobalValue *>;
/// Add mangled symbols for the given GlobalValues to SymbolFlags.
/// If a SymbolToDefinitionMap pointer is supplied then it will be populated
/// with Name-to-GlobalValue* mappings. Note that this mapping is not
/// necessarily one-to-one: thread-local GlobalValues, for example, may
/// produce more than one symbol, in which case the map will contain duplicate
/// values.
static void add(ExecutionSession &ES, const ManglingOptions &MO,
ArrayRef<GlobalValue *> GVs, SymbolFlagsMap &SymbolFlags,
SymbolNameToDefinitionMap *SymbolToDefinition = nullptr);
};
} // End namespace orc
} // End namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_MANGLING_H
PK iwFZ- � � � . ExecutionEngine/Orc/DebugObjectManagerPlugin.hnu �[��� //===---- DebugObjectManagerPlugin.h - JITLink debug objects ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// ObjectLinkingLayer plugin for emitting debug objects.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_DEBUGOBJECTMANAGERPLUGIN_H
#define LLVM_EXECUTIONENGINE_ORC_DEBUGOBJECTMANAGERPLUGIN_H
#include "llvm/ExecutionEngine/JITLink/JITLink.h"
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/ExecutionEngine/Orc/EPCDebugObjectRegistrar.h"
#include "llvm/ExecutionEngine/Orc/ObjectLinkingLayer.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/Memory.h"
#include "llvm/Support/MemoryBufferRef.h"
#include "llvm/TargetParser/Triple.h"
#include <functional>
#include <map>
#include <memory>
#include <mutex>
namespace llvm {
namespace orc {
class DebugObject;
/// Creates and manages DebugObjects for JITLink artifacts.
///
/// DebugObjects are created when linking for a MaterializationResponsibility
/// starts. They are pending as long as materialization is in progress.
///
/// There can only be one pending DebugObject per MaterializationResponsibility.
/// If materialization fails, pending DebugObjects are discarded.
///
/// Once executable code for the MaterializationResponsibility is emitted, the
/// corresponding DebugObject is finalized to target memory and the provided
/// DebugObjectRegistrar is notified. Ownership of DebugObjects remains with the
/// plugin.
///
class DebugObjectManagerPlugin : public ObjectLinkingLayer::Plugin {
public:
// DEPRECATED - Please specify options explicitly
DebugObjectManagerPlugin(ExecutionSession &ES,
std::unique_ptr<DebugObjectRegistrar> Target);
/// Create the plugin to submit DebugObjects for JITLink artifacts. For all
/// options the recommended setting is true.
///
/// RequireDebugSections:
/// Submit debug objects to the executor only if they contain actual debug
/// info. Turning this off may allow minimal debugging based on raw symbol
/// names. Note that this may cause significant memory and transport
/// overhead for objects built with a release configuration.
///
/// AutoRegisterCode:
/// Notify the debugger for each new debug object. This is a good default
/// mode, but it may cause significant overhead when adding many modules in
/// sequence. When turning this off, the user has to issue the call to
/// __jit_debug_register_code() on the executor side manually.
///
DebugObjectManagerPlugin(ExecutionSession &ES,
std::unique_ptr<DebugObjectRegistrar> Target,
bool RequireDebugSections, bool AutoRegisterCode);
~DebugObjectManagerPlugin();
void notifyMaterializing(MaterializationResponsibility &MR,
jitlink::LinkGraph &G, jitlink::JITLinkContext &Ctx,
MemoryBufferRef InputObject) override;
Error notifyEmitted(MaterializationResponsibility &MR) override;
Error notifyFailed(MaterializationResponsibility &MR) override;
Error notifyRemovingResources(JITDylib &JD, ResourceKey K) override;
void notifyTransferringResources(JITDylib &JD, ResourceKey DstKey,
ResourceKey SrcKey) override;
void modifyPassConfig(MaterializationResponsibility &MR,
jitlink::LinkGraph &LG,
jitlink::PassConfiguration &PassConfig) override;
private:
ExecutionSession &ES;
using OwnedDebugObject = std::unique_ptr<DebugObject>;
std::map<MaterializationResponsibility *, OwnedDebugObject> PendingObjs;
std::map<ResourceKey, std::vector<OwnedDebugObject>> RegisteredObjs;
std::mutex PendingObjsLock;
std::mutex RegisteredObjsLock;
std::unique_ptr<DebugObjectRegistrar> Target;
bool RequireDebugSections;
bool AutoRegisterCode;
};
} // namespace orc
} // namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_DEBUGOBJECTMANAGERPLUGIN_H
PK iwFZ��J"� � " ExecutionEngine/Orc/MemoryMapper.hnu �[��� //===- MemoryMapper.h - Cross-process memory mapper -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Cross-process (and in-process) memory mapping and transfer
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_ORC_MEMORYMAPPER_H
#define LLVM_EXECUTIONENGINE_ORC_MEMORYMAPPER_H
#include "llvm/ExecutionEngine/Orc/Core.h"
#include "llvm/ExecutionEngine/Orc/Shared/MemoryFlags.h"
#include "llvm/Support/Process.h"
#include <mutex>
namespace llvm {
namespace orc {
/// Manages mapping, content transfer and protections for JIT memory
class MemoryMapper {
public:
/// Represents a single allocation containing multiple segments and
/// initialization and deinitialization actions
struct AllocInfo {
struct SegInfo {
ExecutorAddrDiff Offset;
const char *WorkingMem;
size_t ContentSize;
size_t ZeroFillSize;
AllocGroup AG;
};
ExecutorAddr MappingBase;
std::vector<SegInfo> Segments;
shared::AllocActions Actions;
};
using OnReservedFunction = unique_function<void(Expected<ExecutorAddrRange>)>;
// Page size of the target process
virtual unsigned int getPageSize() = 0;
/// Reserves address space in executor process
virtual void reserve(size_t NumBytes, OnReservedFunction OnReserved) = 0;
/// Provides working memory
virtual char *prepare(ExecutorAddr Addr, size_t ContentSize) = 0;
using OnInitializedFunction = unique_function<void(Expected<ExecutorAddr>)>;
/// Ensures executor memory is synchronized with working copy memory, sends
/// functions to be called after initilization and before deinitialization and
/// applies memory protections
/// Returns a unique address identifying the allocation. This address should
/// be passed to deinitialize to run deallocation actions (and reset
/// permissions where possible).
virtual void initialize(AllocInfo &AI,
OnInitializedFunction OnInitialized) = 0;
using OnDeinitializedFunction = unique_function<void(Error)>;
/// Runs previously specified deinitialization actions
/// Executor addresses returned by initialize should be passed
virtual void deinitialize(ArrayRef<ExecutorAddr> Allocations,
OnDeinitializedFunction OnDeInitialized) = 0;
using OnReleasedFunction = unique_function<void(Error)>;
/// Release address space acquired through reserve()
virtual void release(ArrayRef<ExecutorAddr> Reservations,
OnReleasedFunction OnRelease) = 0;
virtual ~MemoryMapper();
};
class InProcessMemoryMapper : public MemoryMapper {
public:
InProcessMemoryMapper(size_t PageSize);
static Expected<std::unique_ptr<InProcessMemoryMapper>> Create();
unsigned int getPageSize() override { return PageSize; }
void reserve(size_t NumBytes, OnReservedFunction OnReserved) override;
void initialize(AllocInfo &AI, OnInitializedFunction OnInitialized) override;
char *prepare(ExecutorAddr Addr, size_t ContentSize) override;
void deinitialize(ArrayRef<ExecutorAddr> Allocations,
OnDeinitializedFunction OnDeInitialized) override;
void release(ArrayRef<ExecutorAddr> Reservations,
OnReleasedFunction OnRelease) override;
~InProcessMemoryMapper() override;
private:
struct Allocation {
size_t Size;
std::vector<shared::WrapperFunctionCall> DeinitializationActions;
};
using AllocationMap = DenseMap<ExecutorAddr, Allocation>;
struct Reservation {
size_t Size;
std::vector<ExecutorAddr> Allocations;
};
using ReservationMap = DenseMap<void *, Reservation>;
std::mutex Mutex;
ReservationMap Reservations;
AllocationMap Allocations;
size_t PageSize;
};
class SharedMemoryMapper final : public MemoryMapper {
public:
struct SymbolAddrs {
ExecutorAddr Instance;
ExecutorAddr Reserve;
ExecutorAddr Initialize;
ExecutorAddr Deinitialize;
ExecutorAddr Release;
};
SharedMemoryMapper(ExecutorProcessControl &EPC, SymbolAddrs SAs,
size_t PageSize);
static Expected<std::unique_ptr<SharedMemoryMapper>>
Create(ExecutorProcessControl &EPC, SymbolAddrs SAs);
unsigned int getPageSize() override { return PageSize; }
void reserve(size_t NumBytes, OnReservedFunction OnReserved) override;
char *prepare(ExecutorAddr Addr, size_t ContentSize) override;
void initialize(AllocInfo &AI, OnInitializedFunction OnInitialized) override;
void deinitialize(ArrayRef<ExecutorAddr> Allocations,
OnDeinitializedFunction OnDeInitialized) override;
void release(ArrayRef<ExecutorAddr> Reservations,
OnReleasedFunction OnRelease) override;
~SharedMemoryMapper() override;
private:
struct Reservation {
void *LocalAddr;
size_t Size;
};
ExecutorProcessControl &EPC;
SymbolAddrs SAs;
std::mutex Mutex;
std::map<ExecutorAddr, Reservation> Reservations;
size_t PageSize;
};
} // namespace orc
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_ORC_MEMORYMAPPER_H
PK iwFZ�W��� � " ExecutionEngine/JITEventListener.hnu �[��� //===- JITEventListener.h - Exposes events from JIT compilation -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the JITEventListener interface, which lets users get
// callbacks when significant events happen during the JIT compilation process.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITEVENTLISTENER_H
#define LLVM_EXECUTIONENGINE_JITEVENTLISTENER_H
#include "llvm-c/ExecutionEngine.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/ExecutionEngine/RuntimeDyld.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/Support/CBindingWrapping.h"
#include <cstdint>
namespace llvm {
class IntelJITEventsWrapper;
class OProfileWrapper;
namespace object {
class ObjectFile;
} // end namespace object
/// JITEventListener - Abstract interface for use by the JIT to notify clients
/// about significant events during compilation. For example, to notify
/// profilers and debuggers that need to know where functions have been emitted.
///
/// The default implementation of each method does nothing.
class JITEventListener {
public:
using ObjectKey = uint64_t;
JITEventListener() = default;
virtual ~JITEventListener() = default;
/// notifyObjectLoaded - Called after an object has had its sections allocated
/// and addresses assigned to all symbols. Note: Section memory will not have
/// been relocated yet. notifyFunctionLoaded will not be called for
/// individual functions in the object.
///
/// ELF-specific information
/// The ObjectImage contains the generated object image
/// with section headers updated to reflect the address at which sections
/// were loaded and with relocations performed in-place on debug sections.
virtual void notifyObjectLoaded(ObjectKey K, const object::ObjectFile &Obj,
const RuntimeDyld::LoadedObjectInfo &L) {}
/// notifyFreeingObject - Called just before the memory associated with
/// a previously emitted object is released.
virtual void notifyFreeingObject(ObjectKey K) {}
// Get a pointe to the GDB debugger registration listener.
static JITEventListener *createGDBRegistrationListener();
#if LLVM_USE_INTEL_JITEVENTS
// Construct an IntelJITEventListener
static JITEventListener *createIntelJITEventListener();
// Construct an IntelJITEventListener with a test Intel JIT API implementation
static JITEventListener *createIntelJITEventListener(
IntelJITEventsWrapper* AlternativeImpl);
#else
static JITEventListener *createIntelJITEventListener() { return nullptr; }
static JITEventListener *createIntelJITEventListener(
IntelJITEventsWrapper* AlternativeImpl) {
return nullptr;
}
#endif // USE_INTEL_JITEVENTS
#if LLVM_USE_OPROFILE
// Construct an OProfileJITEventListener
static JITEventListener *createOProfileJITEventListener();
// Construct an OProfileJITEventListener with a test opagent implementation
static JITEventListener *createOProfileJITEventListener(
OProfileWrapper* AlternativeImpl);
#else
static JITEventListener *createOProfileJITEventListener() { return nullptr; }
static JITEventListener *createOProfileJITEventListener(
OProfileWrapper* AlternativeImpl) {
return nullptr;
}
#endif // USE_OPROFILE
#if LLVM_USE_PERF
static JITEventListener *createPerfJITEventListener();
#else
static JITEventListener *createPerfJITEventListener()
{
return nullptr;
}
#endif // USE_PERF
private:
virtual void anchor();
};
DEFINE_SIMPLE_CONVERSION_FUNCTIONS(JITEventListener, LLVMJITEventListenerRef)
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITEVENTLISTENER_H
PK iwFZ� wQg Qg ! ExecutionEngine/ExecutionEngine.hnu �[��� //===- ExecutionEngine.h - Abstract Execution Engine Interface --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the abstract interface that implements execution support
// for LLVM.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_EXECUTIONENGINE_H
#define LLVM_EXECUTIONENGINE_EXECUTIONENGINE_H
#include "llvm-c/ExecutionEngine.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ExecutionEngine/JITSymbol.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/Module.h"
#include "llvm/Object/Binary.h"
#include "llvm/Support/CBindingWrapping.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Mutex.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include <algorithm>
#include <cstdint>
#include <functional>
#include <map>
#include <memory>
#include <optional>
#include <string>
#include <vector>
namespace llvm {
class Constant;
class Function;
struct GenericValue;
class GlobalValue;
class GlobalVariable;
class JITEventListener;
class MCJITMemoryManager;
class ObjectCache;
class RTDyldMemoryManager;
class Triple;
class Type;
namespace object {
class Archive;
class ObjectFile;
} // end namespace object
/// Helper class for helping synchronize access to the global address map
/// table. Access to this class should be serialized under a mutex.
class ExecutionEngineState {
public:
using GlobalAddressMapTy = StringMap<uint64_t>;
private:
/// GlobalAddressMap - A mapping between LLVM global symbol names values and
/// their actualized version...
GlobalAddressMapTy GlobalAddressMap;
/// GlobalAddressReverseMap - This is the reverse mapping of GlobalAddressMap,
/// used to convert raw addresses into the LLVM global value that is emitted
/// at the address. This map is not computed unless getGlobalValueAtAddress
/// is called at some point.
std::map<uint64_t, std::string> GlobalAddressReverseMap;
public:
GlobalAddressMapTy &getGlobalAddressMap() {
return GlobalAddressMap;
}
std::map<uint64_t, std::string> &getGlobalAddressReverseMap() {
return GlobalAddressReverseMap;
}
/// Erase an entry from the mapping table.
///
/// \returns The address that \p ToUnmap was happed to.
uint64_t RemoveMapping(StringRef Name);
};
using FunctionCreator = std::function<void *(const std::string &)>;
/// Abstract interface for implementation execution of LLVM modules,
/// designed to support both interpreter and just-in-time (JIT) compiler
/// implementations.
class ExecutionEngine {
/// The state object holding the global address mapping, which must be
/// accessed synchronously.
//
// FIXME: There is no particular need the entire map needs to be
// synchronized. Wouldn't a reader-writer design be better here?
ExecutionEngineState EEState;
/// The target data for the platform for which execution is being performed.
///
/// Note: the DataLayout is LLVMContext specific because it has an
/// internal cache based on type pointers. It makes unsafe to reuse the
/// ExecutionEngine across context, we don't enforce this rule but undefined
/// behavior can occurs if the user tries to do it.
const DataLayout DL;
/// Whether lazy JIT compilation is enabled.
bool CompilingLazily;
/// Whether JIT compilation of external global variables is allowed.
bool GVCompilationDisabled;
/// Whether the JIT should perform lookups of external symbols (e.g.,
/// using dlsym).
bool SymbolSearchingDisabled;
/// Whether the JIT should verify IR modules during compilation.
bool VerifyModules;
friend class EngineBuilder; // To allow access to JITCtor and InterpCtor.
protected:
/// The list of Modules that we are JIT'ing from. We use a SmallVector to
/// optimize for the case where there is only one module.
SmallVector<std::unique_ptr<Module>, 1> Modules;
/// getMemoryforGV - Allocate memory for a global variable.
virtual char *getMemoryForGV(const GlobalVariable *GV);
static ExecutionEngine *(*MCJITCtor)(
std::unique_ptr<Module> M, std::string *ErrorStr,
std::shared_ptr<MCJITMemoryManager> MM,
std::shared_ptr<LegacyJITSymbolResolver> SR,
std::unique_ptr<TargetMachine> TM);
static ExecutionEngine *(*InterpCtor)(std::unique_ptr<Module> M,
std::string *ErrorStr);
/// LazyFunctionCreator - If an unknown function is needed, this function
/// pointer is invoked to create it. If this returns null, the JIT will
/// abort.
FunctionCreator LazyFunctionCreator;
/// getMangledName - Get mangled name.
std::string getMangledName(const GlobalValue *GV);
std::string ErrMsg;
public:
/// lock - This lock protects the ExecutionEngine and MCJIT classes. It must
/// be held while changing the internal state of any of those classes.
sys::Mutex lock;
//===--------------------------------------------------------------------===//
// ExecutionEngine Startup
//===--------------------------------------------------------------------===//
virtual ~ExecutionEngine();
/// Add a Module to the list of modules that we can JIT from.
virtual void addModule(std::unique_ptr<Module> M) {
Modules.push_back(std::move(M));
}
/// addObjectFile - Add an ObjectFile to the execution engine.
///
/// This method is only supported by MCJIT. MCJIT will immediately load the
/// object into memory and adds its symbols to the list used to resolve
/// external symbols while preparing other objects for execution.
///
/// Objects added using this function will not be made executable until
/// needed by another object.
///
/// MCJIT will take ownership of the ObjectFile.
virtual void addObjectFile(std::unique_ptr<object::ObjectFile> O);
virtual void addObjectFile(object::OwningBinary<object::ObjectFile> O);
/// addArchive - Add an Archive to the execution engine.
///
/// This method is only supported by MCJIT. MCJIT will use the archive to
/// resolve external symbols in objects it is loading. If a symbol is found
/// in the Archive the contained object file will be extracted (in memory)
/// and loaded for possible execution.
virtual void addArchive(object::OwningBinary<object::Archive> A);
//===--------------------------------------------------------------------===//
const DataLayout &getDataLayout() const { return DL; }
/// removeModule - Removes a Module from the list of modules, but does not
/// free the module's memory. Returns true if M is found, in which case the
/// caller assumes responsibility for deleting the module.
//
// FIXME: This stealth ownership transfer is horrible. This will probably be
// fixed by deleting ExecutionEngine.
virtual bool removeModule(Module *M);
/// FindFunctionNamed - Search all of the active modules to find the function that
/// defines FnName. This is very slow operation and shouldn't be used for
/// general code.
virtual Function *FindFunctionNamed(StringRef FnName);
/// FindGlobalVariableNamed - Search all of the active modules to find the global variable
/// that defines Name. This is very slow operation and shouldn't be used for
/// general code.
virtual GlobalVariable *FindGlobalVariableNamed(StringRef Name, bool AllowInternal = false);
/// runFunction - Execute the specified function with the specified arguments,
/// and return the result.
///
/// For MCJIT execution engines, clients are encouraged to use the
/// "GetFunctionAddress" method (rather than runFunction) and cast the
/// returned uint64_t to the desired function pointer type. However, for
/// backwards compatibility MCJIT's implementation can execute 'main-like'
/// function (i.e. those returning void or int, and taking either no
/// arguments or (int, char*[])).
virtual GenericValue runFunction(Function *F,
ArrayRef<GenericValue> ArgValues) = 0;
/// getPointerToNamedFunction - This method returns the address of the
/// specified function by using the dlsym function call. As such it is only
/// useful for resolving library symbols, not code generated symbols.
///
/// If AbortOnFailure is false and no function with the given name is
/// found, this function silently returns a null pointer. Otherwise,
/// it prints a message to stderr and aborts.
///
/// This function is deprecated for the MCJIT execution engine.
virtual void *getPointerToNamedFunction(StringRef Name,
bool AbortOnFailure = true) = 0;
/// mapSectionAddress - map a section to its target address space value.
/// Map the address of a JIT section as returned from the memory manager
/// to the address in the target process as the running code will see it.
/// This is the address which will be used for relocation resolution.
virtual void mapSectionAddress(const void *LocalAddress,
uint64_t TargetAddress) {
llvm_unreachable("Re-mapping of section addresses not supported with this "
"EE!");
}
/// generateCodeForModule - Run code generation for the specified module and
/// load it into memory.
///
/// When this function has completed, all code and data for the specified
/// module, and any module on which this module depends, will be generated
/// and loaded into memory, but relocations will not yet have been applied
/// and all memory will be readable and writable but not executable.
///
/// This function is primarily useful when generating code for an external
/// target, allowing the client an opportunity to remap section addresses
/// before relocations are applied. Clients that intend to execute code
/// locally can use the getFunctionAddress call, which will generate code
/// and apply final preparations all in one step.
///
/// This method has no effect for the interpeter.
virtual void generateCodeForModule(Module *M) {}
/// finalizeObject - ensure the module is fully processed and is usable.
///
/// It is the user-level function for completing the process of making the
/// object usable for execution. It should be called after sections within an
/// object have been relocated using mapSectionAddress. When this method is
/// called the MCJIT execution engine will reapply relocations for a loaded
/// object. This method has no effect for the interpeter.
///
/// Returns true on success, false on failure. Error messages can be retrieved
/// by calling getError();
virtual void finalizeObject() {}
/// Returns true if an error has been recorded.
bool hasError() const { return !ErrMsg.empty(); }
/// Clear the error message.
void clearErrorMessage() { ErrMsg.clear(); }
/// Returns the most recent error message.
const std::string &getErrorMessage() const { return ErrMsg; }
/// runStaticConstructorsDestructors - This method is used to execute all of
/// the static constructors or destructors for a program.
///
/// \param isDtors - Run the destructors instead of constructors.
virtual void runStaticConstructorsDestructors(bool isDtors);
/// This method is used to execute all of the static constructors or
/// destructors for a particular module.
///
/// \param isDtors - Run the destructors instead of constructors.
void runStaticConstructorsDestructors(Module &module, bool isDtors);
/// runFunctionAsMain - This is a helper function which wraps runFunction to
/// handle the common task of starting up main with the specified argc, argv,
/// and envp parameters.
int runFunctionAsMain(Function *Fn, const std::vector<std::string> &argv,
const char * const * envp);
/// addGlobalMapping - Tell the execution engine that the specified global is
/// at the specified location. This is used internally as functions are JIT'd
/// and as global variables are laid out in memory. It can and should also be
/// used by clients of the EE that want to have an LLVM global overlay
/// existing data in memory. Values to be mapped should be named, and have
/// external or weak linkage. Mappings are automatically removed when their
/// GlobalValue is destroyed.
void addGlobalMapping(const GlobalValue *GV, void *Addr);
void addGlobalMapping(StringRef Name, uint64_t Addr);
/// clearAllGlobalMappings - Clear all global mappings and start over again,
/// for use in dynamic compilation scenarios to move globals.
void clearAllGlobalMappings();
/// clearGlobalMappingsFromModule - Clear all global mappings that came from a
/// particular module, because it has been removed from the JIT.
void clearGlobalMappingsFromModule(Module *M);
/// updateGlobalMapping - Replace an existing mapping for GV with a new
/// address. This updates both maps as required. If "Addr" is null, the
/// entry for the global is removed from the mappings. This returns the old
/// value of the pointer, or null if it was not in the map.
uint64_t updateGlobalMapping(const GlobalValue *GV, void *Addr);
uint64_t updateGlobalMapping(StringRef Name, uint64_t Addr);
/// getAddressToGlobalIfAvailable - This returns the address of the specified
/// global symbol.
uint64_t getAddressToGlobalIfAvailable(StringRef S);
/// getPointerToGlobalIfAvailable - This returns the address of the specified
/// global value if it is has already been codegen'd, otherwise it returns
/// null.
void *getPointerToGlobalIfAvailable(StringRef S);
void *getPointerToGlobalIfAvailable(const GlobalValue *GV);
/// getPointerToGlobal - This returns the address of the specified global
/// value. This may involve code generation if it's a function.
///
/// This function is deprecated for the MCJIT execution engine. Use
/// getGlobalValueAddress instead.
void *getPointerToGlobal(const GlobalValue *GV);
/// getPointerToFunction - The different EE's represent function bodies in
/// different ways. They should each implement this to say what a function
/// pointer should look like. When F is destroyed, the ExecutionEngine will
/// remove its global mapping and free any machine code. Be sure no threads
/// are running inside F when that happens.
///
/// This function is deprecated for the MCJIT execution engine. Use
/// getFunctionAddress instead.
virtual void *getPointerToFunction(Function *F) = 0;
/// getPointerToFunctionOrStub - If the specified function has been
/// code-gen'd, return a pointer to the function. If not, compile it, or use
/// a stub to implement lazy compilation if available. See
/// getPointerToFunction for the requirements on destroying F.
///
/// This function is deprecated for the MCJIT execution engine. Use
/// getFunctionAddress instead.
virtual void *getPointerToFunctionOrStub(Function *F) {
// Default implementation, just codegen the function.
return getPointerToFunction(F);
}
/// getGlobalValueAddress - Return the address of the specified global
/// value. This may involve code generation.
///
/// This function should not be called with the interpreter engine.
virtual uint64_t getGlobalValueAddress(const std::string &Name) {
// Default implementation for the interpreter. MCJIT will override this.
// JIT and interpreter clients should use getPointerToGlobal instead.
return 0;
}
/// getFunctionAddress - Return the address of the specified function.
/// This may involve code generation.
virtual uint64_t getFunctionAddress(const std::string &Name) {
// Default implementation for the interpreter. MCJIT will override this.
// Interpreter clients should use getPointerToFunction instead.
return 0;
}
/// getGlobalValueAtAddress - Return the LLVM global value object that starts
/// at the specified address.
///
const GlobalValue *getGlobalValueAtAddress(void *Addr);
/// StoreValueToMemory - Stores the data in Val of type Ty at address Ptr.
/// Ptr is the address of the memory at which to store Val, cast to
/// GenericValue *. It is not a pointer to a GenericValue containing the
/// address at which to store Val.
void StoreValueToMemory(const GenericValue &Val, GenericValue *Ptr,
Type *Ty);
void InitializeMemory(const Constant *Init, void *Addr);
/// getOrEmitGlobalVariable - Return the address of the specified global
/// variable, possibly emitting it to memory if needed. This is used by the
/// Emitter.
///
/// This function is deprecated for the MCJIT execution engine. Use
/// getGlobalValueAddress instead.
virtual void *getOrEmitGlobalVariable(const GlobalVariable *GV) {
return getPointerToGlobal((const GlobalValue *)GV);
}
/// Registers a listener to be called back on various events within
/// the JIT. See JITEventListener.h for more details. Does not
/// take ownership of the argument. The argument may be NULL, in
/// which case these functions do nothing.
virtual void RegisterJITEventListener(JITEventListener *) {}
virtual void UnregisterJITEventListener(JITEventListener *) {}
/// Sets the pre-compiled object cache. The ownership of the ObjectCache is
/// not changed. Supported by MCJIT but not the interpreter.
virtual void setObjectCache(ObjectCache *) {
llvm_unreachable("No support for an object cache");
}
/// setProcessAllSections (MCJIT Only): By default, only sections that are
/// "required for execution" are passed to the RTDyldMemoryManager, and other
/// sections are discarded. Passing 'true' to this method will cause
/// RuntimeDyld to pass all sections to its RTDyldMemoryManager regardless
/// of whether they are "required to execute" in the usual sense.
///
/// Rationale: Some MCJIT clients want to be able to inspect metadata
/// sections (e.g. Dwarf, Stack-maps) to enable functionality or analyze
/// performance. Passing these sections to the memory manager allows the
/// client to make policy about the relevant sections, rather than having
/// MCJIT do it.
virtual void setProcessAllSections(bool ProcessAllSections) {
llvm_unreachable("No support for ProcessAllSections option");
}
/// Return the target machine (if available).
virtual TargetMachine *getTargetMachine() { return nullptr; }
/// DisableLazyCompilation - When lazy compilation is off (the default), the
/// JIT will eagerly compile every function reachable from the argument to
/// getPointerToFunction. If lazy compilation is turned on, the JIT will only
/// compile the one function and emit stubs to compile the rest when they're
/// first called. If lazy compilation is turned off again while some lazy
/// stubs are still around, and one of those stubs is called, the program will
/// abort.
///
/// In order to safely compile lazily in a threaded program, the user must
/// ensure that 1) only one thread at a time can call any particular lazy
/// stub, and 2) any thread modifying LLVM IR must hold the JIT's lock
/// (ExecutionEngine::lock) or otherwise ensure that no other thread calls a
/// lazy stub. See http://llvm.org/PR5184 for details.
void DisableLazyCompilation(bool Disabled = true) {
CompilingLazily = !Disabled;
}
bool isCompilingLazily() const {
return CompilingLazily;
}
/// DisableGVCompilation - If called, the JIT will abort if it's asked to
/// allocate space and populate a GlobalVariable that is not internal to
/// the module.
void DisableGVCompilation(bool Disabled = true) {
GVCompilationDisabled = Disabled;
}
bool isGVCompilationDisabled() const {
return GVCompilationDisabled;
}
/// DisableSymbolSearching - If called, the JIT will not try to lookup unknown
/// symbols with dlsym. A client can still use InstallLazyFunctionCreator to
/// resolve symbols in a custom way.
void DisableSymbolSearching(bool Disabled = true) {
SymbolSearchingDisabled = Disabled;
}
bool isSymbolSearchingDisabled() const {
return SymbolSearchingDisabled;
}
/// Enable/Disable IR module verification.
///
/// Note: Module verification is enabled by default in Debug builds, and
/// disabled by default in Release. Use this method to override the default.
void setVerifyModules(bool Verify) {
VerifyModules = Verify;
}
bool getVerifyModules() const {
return VerifyModules;
}
/// InstallLazyFunctionCreator - If an unknown function is needed, the
/// specified function pointer is invoked to create it. If it returns null,
/// the JIT will abort.
void InstallLazyFunctionCreator(FunctionCreator C) {
LazyFunctionCreator = std::move(C);
}
protected:
ExecutionEngine(DataLayout DL) : DL(std::move(DL)) {}
explicit ExecutionEngine(DataLayout DL, std::unique_ptr<Module> M);
explicit ExecutionEngine(std::unique_ptr<Module> M);
void emitGlobals();
void emitGlobalVariable(const GlobalVariable *GV);
GenericValue getConstantValue(const Constant *C);
void LoadValueFromMemory(GenericValue &Result, GenericValue *Ptr,
Type *Ty);
private:
void Init(std::unique_ptr<Module> M);
};
namespace EngineKind {
// These are actually bitmasks that get or-ed together.
enum Kind {
JIT = 0x1,
Interpreter = 0x2
};
const static Kind Either = (Kind)(JIT | Interpreter);
} // end namespace EngineKind
/// Builder class for ExecutionEngines. Use this by stack-allocating a builder,
/// chaining the various set* methods, and terminating it with a .create()
/// call.
class EngineBuilder {
private:
std::unique_ptr<Module> M;
EngineKind::Kind WhichEngine;
std::string *ErrorStr;
CodeGenOpt::Level OptLevel;
std::shared_ptr<MCJITMemoryManager> MemMgr;
std::shared_ptr<LegacyJITSymbolResolver> Resolver;
TargetOptions Options;
std::optional<Reloc::Model> RelocModel;
std::optional<CodeModel::Model> CMModel;
std::string MArch;
std::string MCPU;
SmallVector<std::string, 4> MAttrs;
bool VerifyModules;
bool EmulatedTLS = true;
public:
/// Default constructor for EngineBuilder.
EngineBuilder();
/// Constructor for EngineBuilder.
EngineBuilder(std::unique_ptr<Module> M);
// Out-of-line since we don't have the def'n of RTDyldMemoryManager here.
~EngineBuilder();
/// setEngineKind - Controls whether the user wants the interpreter, the JIT,
/// or whichever engine works. This option defaults to EngineKind::Either.
EngineBuilder &setEngineKind(EngineKind::Kind w) {
WhichEngine = w;
return *this;
}
/// setMCJITMemoryManager - Sets the MCJIT memory manager to use. This allows
/// clients to customize their memory allocation policies for the MCJIT. This
/// is only appropriate for the MCJIT; setting this and configuring the builder
/// to create anything other than MCJIT will cause a runtime error. If create()
/// is called and is successful, the created engine takes ownership of the
/// memory manager. This option defaults to NULL.
EngineBuilder &setMCJITMemoryManager(std::unique_ptr<RTDyldMemoryManager> mcjmm);
EngineBuilder&
setMemoryManager(std::unique_ptr<MCJITMemoryManager> MM);
EngineBuilder &setSymbolResolver(std::unique_ptr<LegacyJITSymbolResolver> SR);
/// setErrorStr - Set the error string to write to on error. This option
/// defaults to NULL.
EngineBuilder &setErrorStr(std::string *e) {
ErrorStr = e;
return *this;
}
/// setOptLevel - Set the optimization level for the JIT. This option
/// defaults to CodeGenOpt::Default.
EngineBuilder &setOptLevel(CodeGenOpt::Level l) {
OptLevel = l;
return *this;
}
/// setTargetOptions - Set the target options that the ExecutionEngine
/// target is using. Defaults to TargetOptions().
EngineBuilder &setTargetOptions(const TargetOptions &Opts) {
Options = Opts;
return *this;
}
/// setRelocationModel - Set the relocation model that the ExecutionEngine
/// target is using. Defaults to target specific default "Reloc::Default".
EngineBuilder &setRelocationModel(Reloc::Model RM) {
RelocModel = RM;
return *this;
}
/// setCodeModel - Set the CodeModel that the ExecutionEngine target
/// data is using. Defaults to target specific default
/// "CodeModel::JITDefault".
EngineBuilder &setCodeModel(CodeModel::Model M) {
CMModel = M;
return *this;
}
/// setMArch - Override the architecture set by the Module's triple.
EngineBuilder &setMArch(StringRef march) {
MArch.assign(march.begin(), march.end());
return *this;
}
/// setMCPU - Target a specific cpu type.
EngineBuilder &setMCPU(StringRef mcpu) {
MCPU.assign(mcpu.begin(), mcpu.end());
return *this;
}
/// setVerifyModules - Set whether the JIT implementation should verify
/// IR modules during compilation.
EngineBuilder &setVerifyModules(bool Verify) {
VerifyModules = Verify;
return *this;
}
/// setMAttrs - Set cpu-specific attributes.
template<typename StringSequence>
EngineBuilder &setMAttrs(const StringSequence &mattrs) {
MAttrs.clear();
MAttrs.append(mattrs.begin(), mattrs.end());
return *this;
}
void setEmulatedTLS(bool EmulatedTLS) {
this->EmulatedTLS = EmulatedTLS;
}
TargetMachine *selectTarget();
/// selectTarget - Pick a target either via -march or by guessing the native
/// arch. Add any CPU features specified via -mcpu or -mattr.
TargetMachine *selectTarget(const Triple &TargetTriple,
StringRef MArch,
StringRef MCPU,
const SmallVectorImpl<std::string>& MAttrs);
ExecutionEngine *create() {
return create(selectTarget());
}
ExecutionEngine *create(TargetMachine *TM);
};
// Create wrappers for C Binding types (see CBindingWrapping.h).
DEFINE_SIMPLE_CONVERSION_FUNCTIONS(ExecutionEngine, LLVMExecutionEngineRef)
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_EXECUTIONENGINE_H
PK iwFZa��5 5 ExecutionEngine/RuntimeDyld.hnu �[��� //===- RuntimeDyld.h - Run-time dynamic linker for MC-JIT -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Interface for the runtime dynamic linker facilities of the MC-JIT.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_RUNTIMEDYLD_H
#define LLVM_EXECUTIONENGINE_RUNTIMEDYLD_H
#include "llvm/ADT/FunctionExtras.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/DebugInfo/DIContext.h"
#include "llvm/ExecutionEngine/JITSymbol.h"
#include "llvm/Object/ObjectFile.h"
#include "llvm/Support/Error.h"
#include <algorithm>
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <map>
#include <memory>
#include <string>
#include <system_error>
namespace llvm {
namespace object {
template <typename T> class OwningBinary;
} // end namespace object
/// Base class for errors originating in RuntimeDyld, e.g. missing relocation
/// support.
class RuntimeDyldError : public ErrorInfo<RuntimeDyldError> {
public:
static char ID;
RuntimeDyldError(std::string ErrMsg) : ErrMsg(std::move(ErrMsg)) {}
void log(raw_ostream &OS) const override;
const std::string &getErrorMessage() const { return ErrMsg; }
std::error_code convertToErrorCode() const override;
private:
std::string ErrMsg;
};
class RuntimeDyldImpl;
class RuntimeDyld {
public:
// Change the address associated with a section when resolving relocations.
// Any relocations already associated with the symbol will be re-resolved.
void reassignSectionAddress(unsigned SectionID, uint64_t Addr);
using NotifyStubEmittedFunction = std::function<void(
StringRef FileName, StringRef SectionName, StringRef SymbolName,
unsigned SectionID, uint32_t StubOffset)>;
/// Information about the loaded object.
class LoadedObjectInfo : public llvm::LoadedObjectInfo {
friend class RuntimeDyldImpl;
public:
using ObjSectionToIDMap = std::map<object::SectionRef, unsigned>;
LoadedObjectInfo(RuntimeDyldImpl &RTDyld, ObjSectionToIDMap ObjSecToIDMap)
: RTDyld(RTDyld), ObjSecToIDMap(std::move(ObjSecToIDMap)) {}
virtual object::OwningBinary<object::ObjectFile>
getObjectForDebug(const object::ObjectFile &Obj) const = 0;
uint64_t
getSectionLoadAddress(const object::SectionRef &Sec) const override;
protected:
virtual void anchor();
RuntimeDyldImpl &RTDyld;
ObjSectionToIDMap ObjSecToIDMap;
};
/// Memory Management.
class MemoryManager {
friend class RuntimeDyld;
public:
MemoryManager() = default;
virtual ~MemoryManager() = default;
/// Allocate a memory block of (at least) the given size suitable for
/// executable code. The SectionID is a unique identifier assigned by the
/// RuntimeDyld instance, and optionally recorded by the memory manager to
/// access a loaded section.
virtual uint8_t *allocateCodeSection(uintptr_t Size, unsigned Alignment,
unsigned SectionID,
StringRef SectionName) = 0;
/// Allocate a memory block of (at least) the given size suitable for data.
/// The SectionID is a unique identifier assigned by the JIT engine, and
/// optionally recorded by the memory manager to access a loaded section.
virtual uint8_t *allocateDataSection(uintptr_t Size, unsigned Alignment,
unsigned SectionID,
StringRef SectionName,
bool IsReadOnly) = 0;
/// An allocated TLS section
struct TLSSection {
/// The pointer to the initialization image
uint8_t *InitializationImage;
/// The TLS offset
intptr_t Offset;
};
/// Allocate a memory block of (at least) the given size to be used for
/// thread-local storage (TLS).
virtual TLSSection allocateTLSSection(uintptr_t Size, unsigned Alignment,
unsigned SectionID,
StringRef SectionName);
/// Inform the memory manager about the total amount of memory required to
/// allocate all sections to be loaded:
/// \p CodeSize - the total size of all code sections
/// \p DataSizeRO - the total size of all read-only data sections
/// \p DataSizeRW - the total size of all read-write data sections
///
/// Note that by default the callback is disabled. To enable it
/// redefine the method needsToReserveAllocationSpace to return true.
virtual void reserveAllocationSpace(uintptr_t CodeSize, Align CodeAlign,
uintptr_t RODataSize, Align RODataAlign,
uintptr_t RWDataSize,
Align RWDataAlign) {}
/// Override to return true to enable the reserveAllocationSpace callback.
virtual bool needsToReserveAllocationSpace() { return false; }
/// Override to return false to tell LLVM no stub space will be needed.
/// This requires some guarantees depending on architecuture, but when
/// you know what you are doing it saves allocated space.
virtual bool allowStubAllocation() const { return true; }
/// Register the EH frames with the runtime so that c++ exceptions work.
///
/// \p Addr parameter provides the local address of the EH frame section
/// data, while \p LoadAddr provides the address of the data in the target
/// address space. If the section has not been remapped (which will usually
/// be the case for local execution) these two values will be the same.
virtual void registerEHFrames(uint8_t *Addr, uint64_t LoadAddr,
size_t Size) = 0;
virtual void deregisterEHFrames() = 0;
/// This method is called when object loading is complete and section page
/// permissions can be applied. It is up to the memory manager implementation
/// to decide whether or not to act on this method. The memory manager will
/// typically allocate all sections as read-write and then apply specific
/// permissions when this method is called. Code sections cannot be executed
/// until this function has been called. In addition, any cache coherency
/// operations needed to reliably use the memory are also performed.
///
/// Returns true if an error occurred, false otherwise.
virtual bool finalizeMemory(std::string *ErrMsg = nullptr) = 0;
/// This method is called after an object has been loaded into memory but
/// before relocations are applied to the loaded sections.
///
/// Memory managers which are preparing code for execution in an external
/// address space can use this call to remap the section addresses for the
/// newly loaded object.
///
/// For clients that do not need access to an ExecutionEngine instance this
/// method should be preferred to its cousin
/// MCJITMemoryManager::notifyObjectLoaded as this method is compatible with
/// ORC JIT stacks.
virtual void notifyObjectLoaded(RuntimeDyld &RTDyld,
const object::ObjectFile &Obj) {}
private:
virtual void anchor();
bool FinalizationLocked = false;
};
/// Construct a RuntimeDyld instance.
RuntimeDyld(MemoryManager &MemMgr, JITSymbolResolver &Resolver);
RuntimeDyld(const RuntimeDyld &) = delete;
RuntimeDyld &operator=(const RuntimeDyld &) = delete;
~RuntimeDyld();
/// Add the referenced object file to the list of objects to be loaded and
/// relocated.
std::unique_ptr<LoadedObjectInfo> loadObject(const object::ObjectFile &O);
/// Get the address of our local copy of the symbol. This may or may not
/// be the address used for relocation (clients can copy the data around
/// and resolve relocatons based on where they put it).
void *getSymbolLocalAddress(StringRef Name) const;
/// Get the section ID for the section containing the given symbol.
unsigned getSymbolSectionID(StringRef Name) const;
/// Get the target address and flags for the named symbol.
/// This address is the one used for relocation.
JITEvaluatedSymbol getSymbol(StringRef Name) const;
/// Returns a copy of the symbol table. This can be used by on-finalized
/// callbacks to extract the symbol table before throwing away the
/// RuntimeDyld instance. Because the map keys (StringRefs) are backed by
/// strings inside the RuntimeDyld instance, the map should be processed
/// before the RuntimeDyld instance is discarded.
std::map<StringRef, JITEvaluatedSymbol> getSymbolTable() const;
/// Resolve the relocations for all symbols we currently know about.
void resolveRelocations();
/// Map a section to its target address space value.
/// Map the address of a JIT section as returned from the memory manager
/// to the address in the target process as the running code will see it.
/// This is the address which will be used for relocation resolution.
void mapSectionAddress(const void *LocalAddress, uint64_t TargetAddress);
/// Returns the section's working memory.
StringRef getSectionContent(unsigned SectionID) const;
/// If the section was loaded, return the section's load address,
/// otherwise return std::nullopt.
uint64_t getSectionLoadAddress(unsigned SectionID) const;
/// Set the NotifyStubEmitted callback. This is used for debugging
/// purposes. A callback is made for each stub that is generated.
void setNotifyStubEmitted(NotifyStubEmittedFunction NotifyStubEmitted) {
this->NotifyStubEmitted = std::move(NotifyStubEmitted);
}
/// Register any EH frame sections that have been loaded but not previously
/// registered with the memory manager. Note, RuntimeDyld is responsible
/// for identifying the EH frame and calling the memory manager with the
/// EH frame section data. However, the memory manager itself will handle
/// the actual target-specific EH frame registration.
void registerEHFrames();
void deregisterEHFrames();
bool hasError();
StringRef getErrorString();
/// By default, only sections that are "required for execution" are passed to
/// the RTDyldMemoryManager, and other sections are discarded. Passing 'true'
/// to this method will cause RuntimeDyld to pass all sections to its
/// memory manager regardless of whether they are "required to execute" in the
/// usual sense. This is useful for inspecting metadata sections that may not
/// contain relocations, E.g. Debug info, stackmaps.
///
/// Must be called before the first object file is loaded.
void setProcessAllSections(bool ProcessAllSections) {
assert(!Dyld && "setProcessAllSections must be called before loadObject.");
this->ProcessAllSections = ProcessAllSections;
}
/// Perform all actions needed to make the code owned by this RuntimeDyld
/// instance executable:
///
/// 1) Apply relocations.
/// 2) Register EH frames.
/// 3) Update memory permissions*.
///
/// * Finalization is potentially recursive**, and the 3rd step will only be
/// applied by the outermost call to finalize. This allows different
/// RuntimeDyld instances to share a memory manager without the innermost
/// finalization locking the memory and causing relocation fixup errors in
/// outer instances.
///
/// ** Recursive finalization occurs when one RuntimeDyld instances needs the
/// address of a symbol owned by some other instance in order to apply
/// relocations.
///
void finalizeWithMemoryManagerLocking();
private:
friend void jitLinkForORC(
object::OwningBinary<object::ObjectFile> O,
RuntimeDyld::MemoryManager &MemMgr, JITSymbolResolver &Resolver,
bool ProcessAllSections,
unique_function<Error(const object::ObjectFile &Obj, LoadedObjectInfo &,
std::map<StringRef, JITEvaluatedSymbol>)>
OnLoaded,
unique_function<void(object::OwningBinary<object::ObjectFile> O,
std::unique_ptr<LoadedObjectInfo>, Error)>
OnEmitted);
// RuntimeDyldImpl is the actual class. RuntimeDyld is just the public
// interface.
std::unique_ptr<RuntimeDyldImpl> Dyld;
MemoryManager &MemMgr;
JITSymbolResolver &Resolver;
bool ProcessAllSections;
NotifyStubEmittedFunction NotifyStubEmitted;
};
// Asynchronous JIT link for ORC.
//
// Warning: This API is experimental and probably should not be used by anyone
// but ORC's RTDyldObjectLinkingLayer2. Internally it constructs a RuntimeDyld
// instance and uses continuation passing to perform the fix-up and finalize
// steps asynchronously.
void jitLinkForORC(
object::OwningBinary<object::ObjectFile> O,
RuntimeDyld::MemoryManager &MemMgr, JITSymbolResolver &Resolver,
bool ProcessAllSections,
unique_function<Error(const object::ObjectFile &Obj,
RuntimeDyld::LoadedObjectInfo &,
std::map<StringRef, JITEvaluatedSymbol>)>
OnLoaded,
unique_function<void(object::OwningBinary<object::ObjectFile>,
std::unique_ptr<RuntimeDyld::LoadedObjectInfo>, Error)>
OnEmitted);
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_RUNTIMEDYLD_H
PK iwFZ�6j�� � % ExecutionEngine/RTDyldMemoryManager.hnu �[��� //===-- RTDyldMemoryManager.cpp - Memory manager for MC-JIT -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Interface of the runtime dynamic memory manager base class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_RTDYLDMEMORYMANAGER_H
#define LLVM_EXECUTIONENGINE_RTDYLDMEMORYMANAGER_H
#include "llvm-c/ExecutionEngine.h"
#include "llvm/ExecutionEngine/JITSymbol.h"
#include "llvm/ExecutionEngine/RuntimeDyld.h"
#include "llvm/Support/CBindingWrapping.h"
#include <cstddef>
#include <cstdint>
#include <string>
namespace llvm {
class ExecutionEngine;
namespace object {
class ObjectFile;
} // end namespace object
class MCJITMemoryManager : public RuntimeDyld::MemoryManager {
public:
// Don't hide the notifyObjectLoaded method from RuntimeDyld::MemoryManager.
using RuntimeDyld::MemoryManager::notifyObjectLoaded;
/// This method is called after an object has been loaded into memory but
/// before relocations are applied to the loaded sections. The object load
/// may have been initiated by MCJIT to resolve an external symbol for another
/// object that is being finalized. In that case, the object about which
/// the memory manager is being notified will be finalized immediately after
/// the memory manager returns from this call.
///
/// Memory managers which are preparing code for execution in an external
/// address space can use this call to remap the section addresses for the
/// newly loaded object.
virtual void notifyObjectLoaded(ExecutionEngine *EE,
const object::ObjectFile &) {}
private:
void anchor() override;
};
// RuntimeDyld clients often want to handle the memory management of
// what gets placed where. For JIT clients, this is the subset of
// JITMemoryManager required for dynamic loading of binaries.
//
// FIXME: As the RuntimeDyld fills out, additional routines will be needed
// for the varying types of objects to be allocated.
class RTDyldMemoryManager : public MCJITMemoryManager,
public LegacyJITSymbolResolver {
public:
RTDyldMemoryManager() = default;
RTDyldMemoryManager(const RTDyldMemoryManager&) = delete;
void operator=(const RTDyldMemoryManager&) = delete;
~RTDyldMemoryManager() override;
/// Register EH frames in the current process.
static void registerEHFramesInProcess(uint8_t *Addr, size_t Size);
/// Deregister EH frames in the current proces.
static void deregisterEHFramesInProcess(uint8_t *Addr, size_t Size);
void registerEHFrames(uint8_t *Addr, uint64_t LoadAddr, size_t Size) override;
void deregisterEHFrames() override;
/// This method returns the address of the specified function or variable in
/// the current process.
static uint64_t getSymbolAddressInProcess(const std::string &Name);
/// Legacy symbol lookup - DEPRECATED! Please override findSymbol instead.
///
/// This method returns the address of the specified function or variable.
/// It is used to resolve symbols during module linking.
virtual uint64_t getSymbolAddress(const std::string &Name) {
return getSymbolAddressInProcess(Name);
}
/// This method returns a RuntimeDyld::SymbolInfo for the specified function
/// or variable. It is used to resolve symbols during module linking.
///
/// By default this falls back on the legacy lookup method:
/// 'getSymbolAddress'. The address returned by getSymbolAddress is treated as
/// a strong, exported symbol, consistent with historical treatment by
/// RuntimeDyld.
///
/// Clients writing custom RTDyldMemoryManagers are encouraged to override
/// this method and return a SymbolInfo with the flags set correctly. This is
/// necessary for RuntimeDyld to correctly handle weak and non-exported symbols.
JITSymbol findSymbol(const std::string &Name) override {
return JITSymbol(getSymbolAddress(Name), JITSymbolFlags::Exported);
}
/// Legacy symbol lookup -- DEPRECATED! Please override
/// findSymbolInLogicalDylib instead.
///
/// Default to treating all modules as separate.
virtual uint64_t getSymbolAddressInLogicalDylib(const std::string &Name) {
return 0;
}
/// Default to treating all modules as separate.
///
/// By default this falls back on the legacy lookup method:
/// 'getSymbolAddressInLogicalDylib'. The address returned by
/// getSymbolAddressInLogicalDylib is treated as a strong, exported symbol,
/// consistent with historical treatment by RuntimeDyld.
///
/// Clients writing custom RTDyldMemoryManagers are encouraged to override
/// this method and return a SymbolInfo with the flags set correctly. This is
/// necessary for RuntimeDyld to correctly handle weak and non-exported symbols.
JITSymbol
findSymbolInLogicalDylib(const std::string &Name) override {
return JITSymbol(getSymbolAddressInLogicalDylib(Name),
JITSymbolFlags::Exported);
}
/// This method returns the address of the specified function. As such it is
/// only useful for resolving library symbols, not code generated symbols.
///
/// If \p AbortOnFailure is false and no function with the given name is
/// found, this function returns a null pointer. Otherwise, it prints a
/// message to stderr and aborts.
///
/// This function is deprecated for memory managers to be used with
/// MCJIT or RuntimeDyld. Use getSymbolAddress instead.
virtual void *getPointerToNamedFunction(const std::string &Name,
bool AbortOnFailure = true);
protected:
struct EHFrame {
uint8_t *Addr;
size_t Size;
};
typedef std::vector<EHFrame> EHFrameInfos;
EHFrameInfos EHFrames;
private:
void anchor() override;
};
// Create wrappers for C Binding types (see CBindingWrapping.h).
DEFINE_SIMPLE_CONVERSION_FUNCTIONS(
RTDyldMemoryManager, LLVMMCJITMemoryManagerRef)
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_RTDYLDMEMORYMANAGER_H
PK iwFZA�Ӱh h $ ExecutionEngine/RuntimeDyldChecker.hnu �[��� //===---- RuntimeDyldChecker.h - RuntimeDyld tester framework -----*- C++ -*-=//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_RUNTIMEDYLDCHECKER_H
#define LLVM_EXECUTIONENGINE_RUNTIMEDYLDCHECKER_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ExecutionEngine/JITSymbol.h"
#include "llvm/Support/Endian.h"
#include <optional>
#include <cstdint>
#include <memory>
#include <string>
#include <utility>
namespace llvm {
class StringRef;
class MCDisassembler;
class MemoryBuffer;
class MCInstPrinter;
class RuntimeDyld;
class RuntimeDyldCheckerImpl;
class raw_ostream;
/// RuntimeDyld invariant checker for verifying that RuntimeDyld has
/// correctly applied relocations.
///
/// The RuntimeDyldChecker class evaluates expressions against an attached
/// RuntimeDyld instance to verify that relocations have been applied
/// correctly.
///
/// The expression language supports basic pointer arithmetic and bit-masking,
/// and has limited disassembler integration for accessing instruction
/// operands and the next PC (program counter) address for each instruction.
///
/// The language syntax is:
///
/// check = expr '=' expr
///
/// expr = binary_expr
/// | sliceable_expr
///
/// sliceable_expr = '*{' number '}' load_addr_expr [slice]
/// | '(' expr ')' [slice]
/// | ident_expr [slice]
/// | number [slice]
///
/// slice = '[' high-bit-index ':' low-bit-index ']'
///
/// load_addr_expr = symbol
/// | '(' symbol '+' number ')'
/// | '(' symbol '-' number ')'
///
/// ident_expr = 'decode_operand' '(' symbol ',' operand-index ')'
/// | 'next_pc' '(' symbol ')'
/// | 'stub_addr' '(' stub-container-name ',' symbol ')'
/// | 'got_addr' '(' stub-container-name ',' symbol ')'
/// | 'section_addr' '(' stub-container-name ',' symbol ')'
/// | symbol
///
/// binary_expr = expr '+' expr
/// | expr '-' expr
/// | expr '&' expr
/// | expr '|' expr
/// | expr '<<' expr
/// | expr '>>' expr
///
class RuntimeDyldChecker {
public:
class MemoryRegionInfo {
public:
MemoryRegionInfo() = default;
/// Constructor for symbols/sections with content.
MemoryRegionInfo(ArrayRef<char> Content, JITTargetAddress TargetAddress)
: ContentPtr(Content.data()), Size(Content.size()),
TargetAddress(TargetAddress) {}
/// Constructor for zero-fill symbols/sections.
MemoryRegionInfo(uint64_t Size, JITTargetAddress TargetAddress)
: Size(Size), TargetAddress(TargetAddress) {}
/// Returns true if this is a zero-fill symbol/section.
bool isZeroFill() const {
assert(Size && "setContent/setZeroFill must be called first");
return !ContentPtr;
}
/// Set the content for this memory region.
void setContent(ArrayRef<char> Content) {
assert(!ContentPtr && !Size && "Content/zero-fill already set");
ContentPtr = Content.data();
Size = Content.size();
}
/// Set a zero-fill length for this memory region.
void setZeroFill(uint64_t Size) {
assert(!ContentPtr && !this->Size && "Content/zero-fill already set");
this->Size = Size;
}
/// Returns the content for this section if there is any.
ArrayRef<char> getContent() const {
assert(!isZeroFill() && "Can't get content for a zero-fill section");
return {ContentPtr, static_cast<size_t>(Size)};
}
/// Returns the zero-fill length for this section.
uint64_t getZeroFillLength() const {
assert(isZeroFill() && "Can't get zero-fill length for content section");
return Size;
}
/// Set the target address for this region.
void setTargetAddress(JITTargetAddress TargetAddress) {
assert(!this->TargetAddress && "TargetAddress already set");
this->TargetAddress = TargetAddress;
}
/// Return the target address for this region.
JITTargetAddress getTargetAddress() const { return TargetAddress; }
private:
const char *ContentPtr = nullptr;
uint64_t Size = 0;
JITTargetAddress TargetAddress = 0;
};
using IsSymbolValidFunction = std::function<bool(StringRef Symbol)>;
using GetSymbolInfoFunction =
std::function<Expected<MemoryRegionInfo>(StringRef SymbolName)>;
using GetSectionInfoFunction = std::function<Expected<MemoryRegionInfo>(
StringRef FileName, StringRef SectionName)>;
using GetStubInfoFunction = std::function<Expected<MemoryRegionInfo>(
StringRef StubContainer, StringRef TargetName)>;
using GetGOTInfoFunction = std::function<Expected<MemoryRegionInfo>(
StringRef GOTContainer, StringRef TargetName)>;
RuntimeDyldChecker(IsSymbolValidFunction IsSymbolValid,
GetSymbolInfoFunction GetSymbolInfo,
GetSectionInfoFunction GetSectionInfo,
GetStubInfoFunction GetStubInfo,
GetGOTInfoFunction GetGOTInfo,
support::endianness Endianness,
MCDisassembler *Disassembler, MCInstPrinter *InstPrinter,
raw_ostream &ErrStream);
~RuntimeDyldChecker();
/// Check a single expression against the attached RuntimeDyld
/// instance.
bool check(StringRef CheckExpr) const;
/// Scan the given memory buffer for lines beginning with the string
/// in RulePrefix. The remainder of the line is passed to the check
/// method to be evaluated as an expression.
bool checkAllRulesInBuffer(StringRef RulePrefix, MemoryBuffer *MemBuf) const;
/// Returns the address of the requested section (or an error message
/// in the second element of the pair if the address cannot be found).
///
/// if 'LocalAddress' is true, this returns the address of the section
/// within the linker's memory. If 'LocalAddress' is false it returns the
/// address within the target process (i.e. the load address).
std::pair<uint64_t, std::string> getSectionAddr(StringRef FileName,
StringRef SectionName,
bool LocalAddress);
/// If there is a section at the given local address, return its load
/// address, otherwise return std::nullopt.
std::optional<uint64_t> getSectionLoadAddress(void *LocalAddress) const;
private:
std::unique_ptr<RuntimeDyldCheckerImpl> Impl;
};
} // end namespace llvm
#endif
PK iwFZ!��H�9 �9 ExecutionEngine/JITSymbol.hnu �[��� //===- JITSymbol.h - JIT symbol abstraction ---------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Abstraction for target process addresses.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_JITSYMBOL_H
#define LLVM_EXECUTIONENGINE_JITSYMBOL_H
#include <algorithm>
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <functional>
#include <map>
#include <set>
#include <string>
#include "llvm/ADT/BitmaskEnum.h"
#include "llvm/ADT/FunctionExtras.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Support/Error.h"
namespace llvm {
class GlobalValue;
class GlobalValueSummary;
namespace object {
class SymbolRef;
} // end namespace object
/// Represents an address in the target process's address space.
using JITTargetAddress = uint64_t;
/// Convert a JITTargetAddress to a pointer.
///
/// Note: This is a raw cast of the address bit pattern to the given pointer
/// type. When casting to a function pointer in order to execute JIT'd code
/// jitTargetAddressToFunction should be preferred, as it will also perform
/// pointer signing on targets that require it.
template <typename T> T jitTargetAddressToPointer(JITTargetAddress Addr) {
static_assert(std::is_pointer<T>::value, "T must be a pointer type");
uintptr_t IntPtr = static_cast<uintptr_t>(Addr);
assert(IntPtr == Addr && "JITTargetAddress value out of range for uintptr_t");
return reinterpret_cast<T>(IntPtr);
}
/// Convert a JITTargetAddress to a callable function pointer.
///
/// Casts the given address to a callable function pointer. This operation
/// will perform pointer signing for platforms that require it (e.g. arm64e).
template <typename T> T jitTargetAddressToFunction(JITTargetAddress Addr) {
static_assert(std::is_pointer<T>::value &&
std::is_function<std::remove_pointer_t<T>>::value,
"T must be a function pointer type");
return jitTargetAddressToPointer<T>(Addr);
}
/// Convert a pointer to a JITTargetAddress.
template <typename T> JITTargetAddress pointerToJITTargetAddress(T *Ptr) {
return static_cast<JITTargetAddress>(reinterpret_cast<uintptr_t>(Ptr));
}
/// Flags for symbols in the JIT.
class JITSymbolFlags {
public:
using UnderlyingType = uint8_t;
using TargetFlagsType = uint8_t;
enum FlagNames : UnderlyingType {
None = 0,
HasError = 1U << 0,
Weak = 1U << 1,
Common = 1U << 2,
Absolute = 1U << 3,
Exported = 1U << 4,
Callable = 1U << 5,
MaterializationSideEffectsOnly = 1U << 6,
LLVM_MARK_AS_BITMASK_ENUM( // LargestValue =
MaterializationSideEffectsOnly)
};
/// Default-construct a JITSymbolFlags instance.
JITSymbolFlags() = default;
/// Construct a JITSymbolFlags instance from the given flags.
JITSymbolFlags(FlagNames Flags) : Flags(Flags) {}
/// Construct a JITSymbolFlags instance from the given flags and target
/// flags.
JITSymbolFlags(FlagNames Flags, TargetFlagsType TargetFlags)
: TargetFlags(TargetFlags), Flags(Flags) {}
/// Implicitly convert to bool. Returs true if any flag is set.
explicit operator bool() const { return Flags != None || TargetFlags != 0; }
/// Compare for equality.
bool operator==(const JITSymbolFlags &RHS) const {
return Flags == RHS.Flags && TargetFlags == RHS.TargetFlags;
}
/// Bitwise AND-assignment for FlagNames.
JITSymbolFlags &operator&=(const FlagNames &RHS) {
Flags &= RHS;
return *this;
}
/// Bitwise OR-assignment for FlagNames.
JITSymbolFlags &operator|=(const FlagNames &RHS) {
Flags |= RHS;
return *this;
}
/// Return true if there was an error retrieving this symbol.
bool hasError() const {
return (Flags & HasError) == HasError;
}
/// Returns true if the Weak flag is set.
bool isWeak() const {
return (Flags & Weak) == Weak;
}
/// Returns true if the Common flag is set.
bool isCommon() const {
return (Flags & Common) == Common;
}
/// Returns true if the symbol isn't weak or common.
bool isStrong() const {
return !isWeak() && !isCommon();
}
/// Returns true if the Exported flag is set.
bool isExported() const {
return (Flags & Exported) == Exported;
}
/// Returns true if the given symbol is known to be callable.
bool isCallable() const { return (Flags & Callable) == Callable; }
/// Returns true if this symbol is a materialization-side-effects-only
/// symbol. Such symbols do not have a real address. They exist to trigger
/// and support synchronization of materialization side effects, e.g. for
/// collecting initialization information. These symbols will vanish from
/// the symbol table immediately upon reaching the ready state, and will
/// appear to queries as if they were never defined (except that query
/// callback execution will be delayed until they reach the ready state).
/// MaterializationSideEffectOnly symbols should only be queried using the
/// SymbolLookupFlags::WeaklyReferencedSymbol flag (see
/// llvm/include/llvm/ExecutionEngine/Orc/Core.h).
bool hasMaterializationSideEffectsOnly() const {
return (Flags & MaterializationSideEffectsOnly) ==
MaterializationSideEffectsOnly;
}
/// Get the underlying flags value as an integer.
UnderlyingType getRawFlagsValue() const {
return static_cast<UnderlyingType>(Flags);
}
/// Return a reference to the target-specific flags.
TargetFlagsType& getTargetFlags() { return TargetFlags; }
/// Return a reference to the target-specific flags.
const TargetFlagsType& getTargetFlags() const { return TargetFlags; }
/// Construct a JITSymbolFlags value based on the flags of the given global
/// value.
static JITSymbolFlags fromGlobalValue(const GlobalValue &GV);
/// Construct a JITSymbolFlags value based on the flags of the given global
/// value summary.
static JITSymbolFlags fromSummary(GlobalValueSummary *S);
/// Construct a JITSymbolFlags value based on the flags of the given libobject
/// symbol.
static Expected<JITSymbolFlags>
fromObjectSymbol(const object::SymbolRef &Symbol);
private:
TargetFlagsType TargetFlags = 0;
FlagNames Flags = None;
};
inline JITSymbolFlags operator&(const JITSymbolFlags &LHS,
const JITSymbolFlags::FlagNames &RHS) {
JITSymbolFlags Tmp = LHS;
Tmp &= RHS;
return Tmp;
}
inline JITSymbolFlags operator|(const JITSymbolFlags &LHS,
const JITSymbolFlags::FlagNames &RHS) {
JITSymbolFlags Tmp = LHS;
Tmp |= RHS;
return Tmp;
}
/// ARM-specific JIT symbol flags.
/// FIXME: This should be moved into a target-specific header.
class ARMJITSymbolFlags {
public:
ARMJITSymbolFlags() = default;
enum FlagNames {
None = 0,
Thumb = 1 << 0
};
operator JITSymbolFlags::TargetFlagsType&() { return Flags; }
static ARMJITSymbolFlags fromObjectSymbol(const object::SymbolRef &Symbol);
private:
JITSymbolFlags::TargetFlagsType Flags = 0;
};
/// Represents a symbol that has been evaluated to an address already.
class JITEvaluatedSymbol {
public:
JITEvaluatedSymbol() = default;
/// Create a 'null' symbol.
JITEvaluatedSymbol(std::nullptr_t) {}
/// Create a symbol for the given address and flags.
JITEvaluatedSymbol(JITTargetAddress Address, JITSymbolFlags Flags)
: Address(Address), Flags(Flags) {}
/// Create a symbol from the given pointer with the given flags.
template <typename T>
static JITEvaluatedSymbol
fromPointer(T *P, JITSymbolFlags Flags = JITSymbolFlags::Exported) {
return JITEvaluatedSymbol(pointerToJITTargetAddress(P), Flags);
}
/// An evaluated symbol converts to 'true' if its address is non-zero.
explicit operator bool() const { return Address != 0; }
/// Return the address of this symbol.
JITTargetAddress getAddress() const { return Address; }
/// Return the flags for this symbol.
JITSymbolFlags getFlags() const { return Flags; }
/// Set the flags for this symbol.
void setFlags(JITSymbolFlags Flags) { this->Flags = std::move(Flags); }
private:
JITTargetAddress Address = 0;
JITSymbolFlags Flags;
};
/// Represents a symbol in the JIT.
class JITSymbol {
public:
using GetAddressFtor = unique_function<Expected<JITTargetAddress>()>;
/// Create a 'null' symbol, used to represent a "symbol not found"
/// result from a successful (non-erroneous) lookup.
JITSymbol(std::nullptr_t)
: CachedAddr(0) {}
/// Create a JITSymbol representing an error in the symbol lookup
/// process (e.g. a network failure during a remote lookup).
JITSymbol(Error Err)
: Err(std::move(Err)), Flags(JITSymbolFlags::HasError) {}
/// Create a symbol for a definition with a known address.
JITSymbol(JITTargetAddress Addr, JITSymbolFlags Flags)
: CachedAddr(Addr), Flags(Flags) {}
/// Construct a JITSymbol from a JITEvaluatedSymbol.
JITSymbol(JITEvaluatedSymbol Sym)
: CachedAddr(Sym.getAddress()), Flags(Sym.getFlags()) {}
/// Create a symbol for a definition that doesn't have a known address
/// yet.
/// @param GetAddress A functor to materialize a definition (fixing the
/// address) on demand.
///
/// This constructor allows a JIT layer to provide a reference to a symbol
/// definition without actually materializing the definition up front. The
/// user can materialize the definition at any time by calling the getAddress
/// method.
JITSymbol(GetAddressFtor GetAddress, JITSymbolFlags Flags)
: GetAddress(std::move(GetAddress)), CachedAddr(0), Flags(Flags) {}
JITSymbol(const JITSymbol&) = delete;
JITSymbol& operator=(const JITSymbol&) = delete;
JITSymbol(JITSymbol &&Other)
: GetAddress(std::move(Other.GetAddress)), Flags(std::move(Other.Flags)) {
if (Flags.hasError())
Err = std::move(Other.Err);
else
CachedAddr = std::move(Other.CachedAddr);
}
JITSymbol& operator=(JITSymbol &&Other) {
GetAddress = std::move(Other.GetAddress);
Flags = std::move(Other.Flags);
if (Flags.hasError())
Err = std::move(Other.Err);
else
CachedAddr = std::move(Other.CachedAddr);
return *this;
}
~JITSymbol() {
if (Flags.hasError())
Err.~Error();
else
CachedAddr.~JITTargetAddress();
}
/// Returns true if the symbol exists, false otherwise.
explicit operator bool() const {
return !Flags.hasError() && (CachedAddr || GetAddress);
}
/// Move the error field value out of this JITSymbol.
Error takeError() {
if (Flags.hasError())
return std::move(Err);
return Error::success();
}
/// Get the address of the symbol in the target address space. Returns
/// '0' if the symbol does not exist.
Expected<JITTargetAddress> getAddress() {
assert(!Flags.hasError() && "getAddress called on error value");
if (GetAddress) {
if (auto CachedAddrOrErr = GetAddress()) {
GetAddress = nullptr;
CachedAddr = *CachedAddrOrErr;
assert(CachedAddr && "Symbol could not be materialized.");
} else
return CachedAddrOrErr.takeError();
}
return CachedAddr;
}
JITSymbolFlags getFlags() const { return Flags; }
private:
GetAddressFtor GetAddress;
union {
JITTargetAddress CachedAddr;
Error Err;
};
JITSymbolFlags Flags;
};
/// Symbol resolution interface.
///
/// Allows symbol flags and addresses to be looked up by name.
/// Symbol queries are done in bulk (i.e. you request resolution of a set of
/// symbols, rather than a single one) to reduce IPC overhead in the case of
/// remote JITing, and expose opportunities for parallel compilation.
class JITSymbolResolver {
public:
using LookupSet = std::set<StringRef>;
using LookupResult = std::map<StringRef, JITEvaluatedSymbol>;
using OnResolvedFunction = unique_function<void(Expected<LookupResult>)>;
virtual ~JITSymbolResolver() = default;
/// Returns the fully resolved address and flags for each of the given
/// symbols.
///
/// This method will return an error if any of the given symbols can not be
/// resolved, or if the resolution process itself triggers an error.
virtual void lookup(const LookupSet &Symbols,
OnResolvedFunction OnResolved) = 0;
/// Returns the subset of the given symbols that should be materialized by
/// the caller. Only weak/common symbols should be looked up, as strong
/// definitions are implicitly always part of the caller's responsibility.
virtual Expected<LookupSet>
getResponsibilitySet(const LookupSet &Symbols) = 0;
/// Specify if this resolver can return valid symbols with zero value.
virtual bool allowsZeroSymbols() { return false; }
private:
virtual void anchor();
};
/// Legacy symbol resolution interface.
class LegacyJITSymbolResolver : public JITSymbolResolver {
public:
/// Performs lookup by, for each symbol, first calling
/// findSymbolInLogicalDylib and if that fails calling
/// findSymbol.
void lookup(const LookupSet &Symbols, OnResolvedFunction OnResolved) final;
/// Performs flags lookup by calling findSymbolInLogicalDylib and
/// returning the flags value for that symbol.
Expected<LookupSet> getResponsibilitySet(const LookupSet &Symbols) final;
/// This method returns the address of the specified symbol if it exists
/// within the logical dynamic library represented by this JITSymbolResolver.
/// Unlike findSymbol, queries through this interface should return addresses
/// for hidden symbols.
///
/// This is of particular importance for the Orc JIT APIs, which support lazy
/// compilation by breaking up modules: Each of those broken out modules
/// must be able to resolve hidden symbols provided by the others. Clients
/// writing memory managers for MCJIT can usually ignore this method.
///
/// This method will be queried by RuntimeDyld when checking for previous
/// definitions of common symbols.
virtual JITSymbol findSymbolInLogicalDylib(const std::string &Name) = 0;
/// This method returns the address of the specified function or variable.
/// It is used to resolve symbols during module linking.
///
/// If the returned symbol's address is equal to ~0ULL then RuntimeDyld will
/// skip all relocations for that symbol, and the client will be responsible
/// for handling them manually.
virtual JITSymbol findSymbol(const std::string &Name) = 0;
private:
void anchor() override;
};
} // end namespace llvm
#endif // LLVM_EXECUTIONENGINE_JITSYMBOL_H
PK iwFZ �O�i i ExecutionEngine/Interpreter.hnu �[��� //===-- Interpreter.h - Abstract Execution Engine Interface -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file forces the interpreter to link in on certain operating systems.
// (Windows).
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_EXECUTIONENGINE_INTERPRETER_H
#define LLVM_EXECUTIONENGINE_INTERPRETER_H
#include "llvm/ExecutionEngine/ExecutionEngine.h"
extern "C" void LLVMLinkInInterpreter();
namespace {
struct ForceInterpreterLinking {
ForceInterpreterLinking() { LLVMLinkInInterpreter(); }
} ForceInterpreterLinking;
}
#endif
PK iwFZd&��� � LinkAllIR.hnu �[��� //===----- LinkAllIR.h - Reference All VMCore Code --------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This header file pulls in all the object modules of the VMCore library so
// that tools like llc, opt, and lli can ensure they are linked with all symbols
// from libVMCore.a It should only be used from a tool's main program.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_LINKALLIR_H
#define LLVM_LINKALLIR_H
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/IR/InlineAsm.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/IR/Module.h"
#include "llvm/IR/Verifier.h"
#include "llvm/Support/DynamicLibrary.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Memory.h"
#include "llvm/Support/Mutex.h"
#include "llvm/Support/Path.h"
#include "llvm/Support/Process.h"
#include "llvm/Support/Program.h"
#include "llvm/Support/Signals.h"
#include <cstdlib>
namespace {
struct ForceVMCoreLinking {
ForceVMCoreLinking() {
// We must reference VMCore in such a way that compilers will not
// delete it all as dead code, even with whole program optimization,
// yet is effectively a NO-OP. As the compiler isn't smart enough
// to know that getenv() never returns -1, this will do the job.
// This is so that globals in the translation units where these functions
// are defined are forced to be initialized, populating various
// registries.
if (std::getenv("bar") != (char*) -1)
return;
llvm::LLVMContext Context;
(void)new llvm::Module("", Context);
(void)new llvm::UnreachableInst(Context);
(void) llvm::createVerifierPass();
}
} ForceVMCoreLinking;
}
#endif
PK iwFZV���* �* Analysis/DomTreeUpdater.hnu �[��� //===- DomTreeUpdater.h - DomTree/Post DomTree Updater ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the DomTreeUpdater class, which provides a uniform way to
// update dominator tree related data structures.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_DOMTREEUPDATER_H
#define LLVM_ANALYSIS_DOMTREEUPDATER_H
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/IR/Dominators.h"
#include "llvm/IR/ValueHandle.h"
#include "llvm/Support/Compiler.h"
#include <cstddef>
#include <functional>
#include <vector>
namespace llvm {
class PostDominatorTree;
class DomTreeUpdater {
public:
enum class UpdateStrategy : unsigned char { Eager = 0, Lazy = 1 };
explicit DomTreeUpdater(UpdateStrategy Strategy_) : Strategy(Strategy_) {}
DomTreeUpdater(DominatorTree &DT_, UpdateStrategy Strategy_)
: DT(&DT_), Strategy(Strategy_) {}
DomTreeUpdater(DominatorTree *DT_, UpdateStrategy Strategy_)
: DT(DT_), Strategy(Strategy_) {}
DomTreeUpdater(PostDominatorTree &PDT_, UpdateStrategy Strategy_)
: PDT(&PDT_), Strategy(Strategy_) {}
DomTreeUpdater(PostDominatorTree *PDT_, UpdateStrategy Strategy_)
: PDT(PDT_), Strategy(Strategy_) {}
DomTreeUpdater(DominatorTree &DT_, PostDominatorTree &PDT_,
UpdateStrategy Strategy_)
: DT(&DT_), PDT(&PDT_), Strategy(Strategy_) {}
DomTreeUpdater(DominatorTree *DT_, PostDominatorTree *PDT_,
UpdateStrategy Strategy_)
: DT(DT_), PDT(PDT_), Strategy(Strategy_) {}
~DomTreeUpdater() { flush(); }
/// Returns true if the current strategy is Lazy.
bool isLazy() const { return Strategy == UpdateStrategy::Lazy; };
/// Returns true if the current strategy is Eager.
bool isEager() const { return Strategy == UpdateStrategy::Eager; };
/// Returns true if it holds a DominatorTree.
bool hasDomTree() const { return DT != nullptr; }
/// Returns true if it holds a PostDominatorTree.
bool hasPostDomTree() const { return PDT != nullptr; }
/// Returns true if there is BasicBlock awaiting deletion.
/// The deletion will only happen until a flush event and
/// all available trees are up-to-date.
/// Returns false under Eager UpdateStrategy.
bool hasPendingDeletedBB() const { return !DeletedBBs.empty(); }
/// Returns true if DelBB is awaiting deletion.
/// Returns false under Eager UpdateStrategy.
bool isBBPendingDeletion(BasicBlock *DelBB) const;
/// Returns true if either of DT or PDT is valid and the tree has at
/// least one update pending. If DT or PDT is nullptr it is treated
/// as having no pending updates. This function does not check
/// whether there is BasicBlock awaiting deletion.
/// Returns false under Eager UpdateStrategy.
bool hasPendingUpdates() const;
/// Returns true if there are DominatorTree updates queued.
/// Returns false under Eager UpdateStrategy or DT is nullptr.
bool hasPendingDomTreeUpdates() const;
/// Returns true if there are PostDominatorTree updates queued.
/// Returns false under Eager UpdateStrategy or PDT is nullptr.
bool hasPendingPostDomTreeUpdates() const;
///@{
/// \name Mutation APIs
///
/// These methods provide APIs for submitting updates to the DominatorTree and
/// the PostDominatorTree.
///
/// Note: There are two strategies to update the DominatorTree and the
/// PostDominatorTree:
/// 1. Eager UpdateStrategy: Updates are submitted and then flushed
/// immediately.
/// 2. Lazy UpdateStrategy: Updates are submitted but only flushed when you
/// explicitly call Flush APIs. It is recommended to use this update strategy
/// when you submit a bunch of updates multiple times which can then
/// add up to a large number of updates between two queries on the
/// DominatorTree. The incremental updater can reschedule the updates or
/// decide to recalculate the dominator tree in order to speedup the updating
/// process depending on the number of updates.
///
/// Although GenericDomTree provides several update primitives,
/// it is not encouraged to use these APIs directly.
/// Submit updates to all available trees.
/// The Eager Strategy flushes updates immediately while the Lazy Strategy
/// queues the updates.
///
/// Note: The "existence" of an edge in a CFG refers to the CFG which DTU is
/// in sync with + all updates before that single update.
///
/// CAUTION!
/// 1. It is required for the state of the LLVM IR to be updated
/// *before* submitting the updates because the internal update routine will
/// analyze the current state of the CFG to determine whether an update
/// is valid.
/// 2. It is illegal to submit any update that has already been submitted,
/// i.e., you are supposed not to insert an existent edge or delete a
/// nonexistent edge.
void applyUpdates(ArrayRef<DominatorTree::UpdateType> Updates);
/// Submit updates to all available trees. It will also
/// 1. discard duplicated updates,
/// 2. remove invalid updates. (Invalid updates means deletion of an edge that
/// still exists or insertion of an edge that does not exist.)
/// The Eager Strategy flushes updates immediately while the Lazy Strategy
/// queues the updates.
///
/// Note: The "existence" of an edge in a CFG refers to the CFG which DTU is
/// in sync with + all updates before that single update.
///
/// CAUTION!
/// 1. It is required for the state of the LLVM IR to be updated
/// *before* submitting the updates because the internal update routine will
/// analyze the current state of the CFG to determine whether an update
/// is valid.
/// 2. It is illegal to submit any update that has already been submitted,
/// i.e., you are supposed not to insert an existent edge or delete a
/// nonexistent edge.
/// 3. It is only legal to submit updates to an edge in the order CFG changes
/// are made. The order you submit updates on different edges is not
/// restricted.
void applyUpdatesPermissive(ArrayRef<DominatorTree::UpdateType> Updates);
/// Notify DTU that the entry block was replaced.
/// Recalculate all available trees and flush all BasicBlocks
/// awaiting deletion immediately.
void recalculate(Function &F);
/// Delete DelBB. DelBB will be removed from its Parent and
/// erased from available trees if it exists and finally get deleted.
/// Under Eager UpdateStrategy, DelBB will be processed immediately.
/// Under Lazy UpdateStrategy, DelBB will be queued until a flush event and
/// all available trees are up-to-date. Assert if any instruction of DelBB is
/// modified while awaiting deletion. When both DT and PDT are nullptrs, DelBB
/// will be queued until flush() is called.
void deleteBB(BasicBlock *DelBB);
/// Delete DelBB. DelBB will be removed from its Parent and
/// erased from available trees if it exists. Then the callback will
/// be called. Finally, DelBB will be deleted.
/// Under Eager UpdateStrategy, DelBB will be processed immediately.
/// Under Lazy UpdateStrategy, DelBB will be queued until a flush event and
/// all available trees are up-to-date. Assert if any instruction of DelBB is
/// modified while awaiting deletion. Multiple callbacks can be queued for one
/// DelBB under Lazy UpdateStrategy.
void callbackDeleteBB(BasicBlock *DelBB,
std::function<void(BasicBlock *)> Callback);
///@}
///@{
/// \name Flush APIs
///
/// CAUTION! By the moment these flush APIs are called, the current CFG needs
/// to be the same as the CFG which DTU is in sync with + all updates
/// submitted.
/// Flush DomTree updates and return DomTree.
/// It flushes Deleted BBs if both trees are up-to-date.
/// It must only be called when it has a DomTree.
DominatorTree &getDomTree();
/// Flush PostDomTree updates and return PostDomTree.
/// It flushes Deleted BBs if both trees are up-to-date.
/// It must only be called when it has a PostDomTree.
PostDominatorTree &getPostDomTree();
/// Apply all pending updates to available trees and flush all BasicBlocks
/// awaiting deletion.
void flush();
///@}
/// Debug method to help view the internal state of this class.
LLVM_DUMP_METHOD void dump() const;
private:
class CallBackOnDeletion final : public CallbackVH {
public:
CallBackOnDeletion(BasicBlock *V,
std::function<void(BasicBlock *)> Callback)
: CallbackVH(V), DelBB(V), Callback_(Callback) {}
private:
BasicBlock *DelBB = nullptr;
std::function<void(BasicBlock *)> Callback_;
void deleted() override {
Callback_(DelBB);
CallbackVH::deleted();
}
};
SmallVector<DominatorTree::UpdateType, 16> PendUpdates;
size_t PendDTUpdateIndex = 0;
size_t PendPDTUpdateIndex = 0;
DominatorTree *DT = nullptr;
PostDominatorTree *PDT = nullptr;
const UpdateStrategy Strategy;
SmallPtrSet<BasicBlock *, 8> DeletedBBs;
std::vector<CallBackOnDeletion> Callbacks;
bool IsRecalculatingDomTree = false;
bool IsRecalculatingPostDomTree = false;
/// First remove all the instructions of DelBB and then make sure DelBB has a
/// valid terminator instruction which is necessary to have when DelBB still
/// has to be inside of its parent Function while awaiting deletion under Lazy
/// UpdateStrategy to prevent other routines from asserting the state of the
/// IR is inconsistent. Assert if DelBB is nullptr or has predecessors.
void validateDeleteBB(BasicBlock *DelBB);
/// Returns true if at least one BasicBlock is deleted.
bool forceFlushDeletedBB();
/// Helper function to apply all pending DomTree updates.
void applyDomTreeUpdates();
/// Helper function to apply all pending PostDomTree updates.
void applyPostDomTreeUpdates();
/// Helper function to flush deleted BasicBlocks if all available
/// trees are up-to-date.
void tryFlushDeletedBB();
/// Drop all updates applied by all available trees and delete BasicBlocks if
/// all available trees are up-to-date.
void dropOutOfDateUpdates();
/// Erase Basic Block node that has been unlinked from Function
/// in the DomTree and PostDomTree.
void eraseDelBBNode(BasicBlock *DelBB);
/// Returns true if the update appears in the LLVM IR.
/// It is used to check whether an update is valid in
/// insertEdge/deleteEdge or is unnecessary in the batch update.
bool isUpdateValid(DominatorTree::UpdateType Update) const;
/// Returns true if the update is self dominance.
bool isSelfDominance(DominatorTree::UpdateType Update) const;
};
} // namespace llvm
#endif // LLVM_ANALYSIS_DOMTREEUPDATER_H
PK iwFZ�[ӹ % Analysis/FunctionPropertiesAnalysis.hnu �[��� //=- FunctionPropertiesAnalysis.h - Function Properties Analysis --*- C++ -*-=//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the FunctionPropertiesInfo and FunctionPropertiesAnalysis
// classes used to extract function properties.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_FUNCTIONPROPERTIESANALYSIS_H
#define LLVM_ANALYSIS_FUNCTIONPROPERTIESANALYSIS_H
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/IR/InstrTypes.h"
#include "llvm/IR/PassManager.h"
namespace llvm {
class DominatorTree;
class Function;
class LoopInfo;
class FunctionPropertiesInfo {
friend class FunctionPropertiesUpdater;
void updateForBB(const BasicBlock &BB, int64_t Direction);
void updateAggregateStats(const Function &F, const LoopInfo &LI);
void reIncludeBB(const BasicBlock &BB);
public:
static FunctionPropertiesInfo
getFunctionPropertiesInfo(const Function &F, const DominatorTree &DT,
const LoopInfo &LI);
static FunctionPropertiesInfo
getFunctionPropertiesInfo(Function &F, FunctionAnalysisManager &FAM);
bool operator==(const FunctionPropertiesInfo &FPI) const {
return std::memcmp(this, &FPI, sizeof(FunctionPropertiesInfo)) == 0;
}
bool operator!=(const FunctionPropertiesInfo &FPI) const {
return !(*this == FPI);
}
void print(raw_ostream &OS) const;
/// Number of basic blocks
int64_t BasicBlockCount = 0;
/// Number of blocks reached from a conditional instruction, or that are
/// 'cases' of a SwitchInstr.
// FIXME: We may want to replace this with a more meaningful metric, like
// number of conditionally executed blocks:
// 'if (a) s();' would be counted here as 2 blocks, just like
// 'if (a) s(); else s2(); s3();' would.
int64_t BlocksReachedFromConditionalInstruction = 0;
/// Number of uses of this function, plus 1 if the function is callable
/// outside the module.
int64_t Uses = 0;
/// Number of direct calls made from this function to other functions
/// defined in this module.
int64_t DirectCallsToDefinedFunctions = 0;
// Load Instruction Count
int64_t LoadInstCount = 0;
// Store Instruction Count
int64_t StoreInstCount = 0;
// Maximum Loop Depth in the Function
int64_t MaxLoopDepth = 0;
// Number of Top Level Loops in the Function
int64_t TopLevelLoopCount = 0;
// All non-debug instructions
int64_t TotalInstructionCount = 0;
};
// Analysis pass
class FunctionPropertiesAnalysis
: public AnalysisInfoMixin<FunctionPropertiesAnalysis> {
public:
static AnalysisKey Key;
using Result = const FunctionPropertiesInfo;
FunctionPropertiesInfo run(Function &F, FunctionAnalysisManager &FAM);
};
/// Printer pass for the FunctionPropertiesAnalysis results.
class FunctionPropertiesPrinterPass
: public PassInfoMixin<FunctionPropertiesPrinterPass> {
raw_ostream &OS;
public:
explicit FunctionPropertiesPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
/// Correctly update FunctionPropertiesInfo post-inlining. A
/// FunctionPropertiesUpdater keeps the state necessary for tracking the changes
/// llvm::InlineFunction makes. The idea is that inlining will at most modify
/// a few BBs of the Caller (maybe the entry BB and definitely the callsite BB)
/// and potentially affect exception handling BBs in the case of invoke
/// inlining.
class FunctionPropertiesUpdater {
public:
FunctionPropertiesUpdater(FunctionPropertiesInfo &FPI, CallBase &CB);
void finish(FunctionAnalysisManager &FAM) const;
bool finishAndTest(FunctionAnalysisManager &FAM) const {
finish(FAM);
return isUpdateValid(Caller, FPI, FAM);
}
private:
FunctionPropertiesInfo &FPI;
BasicBlock &CallSiteBB;
Function &Caller;
static bool isUpdateValid(Function &F, const FunctionPropertiesInfo &FPI,
FunctionAnalysisManager &FAM);
DenseSet<const BasicBlock *> Successors;
};
} // namespace llvm
#endif // LLVM_ANALYSIS_FUNCTIONPROPERTIESANALYSIS_H
PK iwFZ8)�=� � Analysis/CFLAliasAnalysisUtils.hnu �[��� //=- CFLAliasAnalysisUtils.h - Utilities for CFL Alias Analysis ----*- C++-*-=//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// \file
// These are the utilities/helpers used by the CFL Alias Analyses available in
// tree, i.e. Steensgaard's and Andersens'.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_CFLALIASANALYSISUTILS_H
#define LLVM_ANALYSIS_CFLALIASANALYSISUTILS_H
#include "llvm/IR/Argument.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/ValueHandle.h"
namespace llvm {
namespace cflaa {
template <typename AAResult> struct FunctionHandle final : public CallbackVH {
FunctionHandle(Function *Fn, AAResult *Result)
: CallbackVH(Fn), Result(Result) {
assert(Fn != nullptr);
assert(Result != nullptr);
}
void deleted() override { removeSelfFromCache(); }
void allUsesReplacedWith(Value *) override { removeSelfFromCache(); }
private:
AAResult *Result;
void removeSelfFromCache() {
assert(Result != nullptr);
auto *Val = getValPtr();
Result->evict(cast<Function>(Val));
setValPtr(nullptr);
}
};
static inline const Function *parentFunctionOfValue(const Value *Val) {
if (auto *Inst = dyn_cast<Instruction>(Val)) {
auto *Bb = Inst->getParent();
return Bb->getParent();
}
if (auto *Arg = dyn_cast<Argument>(Val))
return Arg->getParent();
return nullptr;
}
} // namespace cflaa
} // namespace llvm
#endif // LLVM_ANALYSIS_CFLALIASANALYSISUTILS_H
PK iwFZh�>�# # Analysis/TargetTransformInfo.hnu �[��� //===- TargetTransformInfo.h ------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This pass exposes codegen information to IR-level passes. Every
/// transformation that uses codegen information is broken into three parts:
/// 1. The IR-level analysis pass.
/// 2. The IR-level transformation interface which provides the needed
/// information.
/// 3. Codegen-level implementation which uses target-specific hooks.
///
/// This file defines #2, which is the interface that IR-level transformations
/// use for querying the codegen.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_TARGETTRANSFORMINFO_H
#define LLVM_ANALYSIS_TARGETTRANSFORMINFO_H
#include "llvm/ADT/SmallBitVector.h"
#include "llvm/IR/FMF.h"
#include "llvm/IR/InstrTypes.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
#include "llvm/Support/AtomicOrdering.h"
#include "llvm/Support/BranchProbability.h"
#include "llvm/Support/InstructionCost.h"
#include <functional>
#include <optional>
#include <utility>
namespace llvm {
namespace Intrinsic {
typedef unsigned ID;
}
class AllocaInst;
class AssumptionCache;
class BlockFrequencyInfo;
class DominatorTree;
class BranchInst;
class CallBase;
class Function;
class GlobalValue;
class InstCombiner;
class OptimizationRemarkEmitter;
class InterleavedAccessInfo;
class IntrinsicInst;
class LoadInst;
class Loop;
class LoopInfo;
class LoopVectorizationLegality;
class ProfileSummaryInfo;
class RecurrenceDescriptor;
class SCEV;
class ScalarEvolution;
class StoreInst;
class SwitchInst;
class TargetLibraryInfo;
class Type;
class User;
class Value;
class VPIntrinsic;
struct KnownBits;
/// Information about a load/store intrinsic defined by the target.
struct MemIntrinsicInfo {
/// This is the pointer that the intrinsic is loading from or storing to.
/// If this is non-null, then analysis/optimization passes can assume that
/// this intrinsic is functionally equivalent to a load/store from this
/// pointer.
Value *PtrVal = nullptr;
// Ordering for atomic operations.
AtomicOrdering Ordering = AtomicOrdering::NotAtomic;
// Same Id is set by the target for corresponding load/store intrinsics.
unsigned short MatchingId = 0;
bool ReadMem = false;
bool WriteMem = false;
bool IsVolatile = false;
bool isUnordered() const {
return (Ordering == AtomicOrdering::NotAtomic ||
Ordering == AtomicOrdering::Unordered) &&
!IsVolatile;
}
};
/// Attributes of a target dependent hardware loop.
struct HardwareLoopInfo {
HardwareLoopInfo() = delete;
HardwareLoopInfo(Loop *L);
Loop *L = nullptr;
BasicBlock *ExitBlock = nullptr;
BranchInst *ExitBranch = nullptr;
const SCEV *ExitCount = nullptr;
IntegerType *CountType = nullptr;
Value *LoopDecrement = nullptr; // Decrement the loop counter by this
// value in every iteration.
bool IsNestingLegal = false; // Can a hardware loop be a parent to
// another hardware loop?
bool CounterInReg = false; // Should loop counter be updated in
// the loop via a phi?
bool PerformEntryTest = false; // Generate the intrinsic which also performs
// icmp ne zero on the loop counter value and
// produces an i1 to guard the loop entry.
bool isHardwareLoopCandidate(ScalarEvolution &SE, LoopInfo &LI,
DominatorTree &DT, bool ForceNestedLoop = false,
bool ForceHardwareLoopPHI = false);
bool canAnalyze(LoopInfo &LI);
};
class IntrinsicCostAttributes {
const IntrinsicInst *II = nullptr;
Type *RetTy = nullptr;
Intrinsic::ID IID;
SmallVector<Type *, 4> ParamTys;
SmallVector<const Value *, 4> Arguments;
FastMathFlags FMF;
// If ScalarizationCost is UINT_MAX, the cost of scalarizing the
// arguments and the return value will be computed based on types.
InstructionCost ScalarizationCost = InstructionCost::getInvalid();
public:
IntrinsicCostAttributes(
Intrinsic::ID Id, const CallBase &CI,
InstructionCost ScalarCost = InstructionCost::getInvalid(),
bool TypeBasedOnly = false);
IntrinsicCostAttributes(
Intrinsic::ID Id, Type *RTy, ArrayRef<Type *> Tys,
FastMathFlags Flags = FastMathFlags(), const IntrinsicInst *I = nullptr,
InstructionCost ScalarCost = InstructionCost::getInvalid());
IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy,
ArrayRef<const Value *> Args);
IntrinsicCostAttributes(
Intrinsic::ID Id, Type *RTy, ArrayRef<const Value *> Args,
ArrayRef<Type *> Tys, FastMathFlags Flags = FastMathFlags(),
const IntrinsicInst *I = nullptr,
InstructionCost ScalarCost = InstructionCost::getInvalid());
Intrinsic::ID getID() const { return IID; }
const IntrinsicInst *getInst() const { return II; }
Type *getReturnType() const { return RetTy; }
FastMathFlags getFlags() const { return FMF; }
InstructionCost getScalarizationCost() const { return ScalarizationCost; }
const SmallVectorImpl<const Value *> &getArgs() const { return Arguments; }
const SmallVectorImpl<Type *> &getArgTypes() const { return ParamTys; }
bool isTypeBasedOnly() const {
return Arguments.empty();
}
bool skipScalarizationCost() const { return ScalarizationCost.isValid(); }
};
enum class TailFoldingStyle {
/// Don't use tail folding
None,
/// Use predicate only to mask operations on data in the loop.
/// When the VL is not known to be a power-of-2, this method requires a
/// runtime overflow check for the i + VL in the loop because it compares the
/// scalar induction variable against the tripcount rounded up by VL which may
/// overflow. When the VL is a power-of-2, both the increment and uprounded
/// tripcount will overflow to 0, which does not require a runtime check
/// since the loop is exited when the loop induction variable equals the
/// uprounded trip-count, which are both 0.
Data,
/// Same as Data, but avoids using the get.active.lane.mask intrinsic to
/// calculate the mask and instead implements this with a
/// splat/stepvector/cmp.
/// FIXME: Can this kind be removed now that SelectionDAGBuilder expands the
/// active.lane.mask intrinsic when it is not natively supported?
DataWithoutLaneMask,
/// Use predicate to control both data and control flow.
/// This method always requires a runtime overflow check for the i + VL
/// increment inside the loop, because it uses the result direclty in the
/// active.lane.mask to calculate the mask for the next iteration. If the
/// increment overflows, the mask is no longer correct.
DataAndControlFlow,
/// Use predicate to control both data and control flow, but modify
/// the trip count so that a runtime overflow check can be avoided
/// and such that the scalar epilogue loop can always be removed.
DataAndControlFlowWithoutRuntimeCheck
};
struct TailFoldingInfo {
TargetLibraryInfo *TLI;
LoopVectorizationLegality *LVL;
InterleavedAccessInfo *IAI;
TailFoldingInfo(TargetLibraryInfo *TLI, LoopVectorizationLegality *LVL,
InterleavedAccessInfo *IAI)
: TLI(TLI), LVL(LVL), IAI(IAI) {}
};
class TargetTransformInfo;
typedef TargetTransformInfo TTI;
/// This pass provides access to the codegen interfaces that are needed
/// for IR-level transformations.
class TargetTransformInfo {
public:
/// Construct a TTI object using a type implementing the \c Concept
/// API below.
///
/// This is used by targets to construct a TTI wrapping their target-specific
/// implementation that encodes appropriate costs for their target.
template <typename T> TargetTransformInfo(T Impl);
/// Construct a baseline TTI object using a minimal implementation of
/// the \c Concept API below.
///
/// The TTI implementation will reflect the information in the DataLayout
/// provided if non-null.
explicit TargetTransformInfo(const DataLayout &DL);
// Provide move semantics.
TargetTransformInfo(TargetTransformInfo &&Arg);
TargetTransformInfo &operator=(TargetTransformInfo &&RHS);
// We need to define the destructor out-of-line to define our sub-classes
// out-of-line.
~TargetTransformInfo();
/// Handle the invalidation of this information.
///
/// When used as a result of \c TargetIRAnalysis this method will be called
/// when the function this was computed for changes. When it returns false,
/// the information is preserved across those changes.
bool invalidate(Function &, const PreservedAnalyses &,
FunctionAnalysisManager::Invalidator &) {
// FIXME: We should probably in some way ensure that the subtarget
// information for a function hasn't changed.
return false;
}
/// \name Generic Target Information
/// @{
/// The kind of cost model.
///
/// There are several different cost models that can be customized by the
/// target. The normalization of each cost model may be target specific.
/// e.g. TCK_SizeAndLatency should be comparable to target thresholds such as
/// those derived from MCSchedModel::LoopMicroOpBufferSize etc.
enum TargetCostKind {
TCK_RecipThroughput, ///< Reciprocal throughput.
TCK_Latency, ///< The latency of instruction.
TCK_CodeSize, ///< Instruction code size.
TCK_SizeAndLatency ///< The weighted sum of size and latency.
};
/// Underlying constants for 'cost' values in this interface.
///
/// Many APIs in this interface return a cost. This enum defines the
/// fundamental values that should be used to interpret (and produce) those
/// costs. The costs are returned as an int rather than a member of this
/// enumeration because it is expected that the cost of one IR instruction
/// may have a multiplicative factor to it or otherwise won't fit directly
/// into the enum. Moreover, it is common to sum or average costs which works
/// better as simple integral values. Thus this enum only provides constants.
/// Also note that the returned costs are signed integers to make it natural
/// to add, subtract, and test with zero (a common boundary condition). It is
/// not expected that 2^32 is a realistic cost to be modeling at any point.
///
/// Note that these costs should usually reflect the intersection of code-size
/// cost and execution cost. A free instruction is typically one that folds
/// into another instruction. For example, reg-to-reg moves can often be
/// skipped by renaming the registers in the CPU, but they still are encoded
/// and thus wouldn't be considered 'free' here.
enum TargetCostConstants {
TCC_Free = 0, ///< Expected to fold away in lowering.
TCC_Basic = 1, ///< The cost of a typical 'add' instruction.
TCC_Expensive = 4 ///< The cost of a 'div' instruction on x86.
};
/// Estimate the cost of a GEP operation when lowered.
///
/// \p PointeeType is the source element type of the GEP.
/// \p Ptr is the base pointer operand.
/// \p Operands is the list of indices following the base pointer.
///
/// \p AccessType is a hint as to what type of memory might be accessed by
/// users of the GEP. getGEPCost will use it to determine if the GEP can be
/// folded into the addressing mode of a load/store. If AccessType is null,
/// then the resulting target type based off of PointeeType will be used as an
/// approximation.
InstructionCost
getGEPCost(Type *PointeeType, const Value *Ptr,
ArrayRef<const Value *> Operands, Type *AccessType = nullptr,
TargetCostKind CostKind = TCK_SizeAndLatency) const;
/// Describe known properties for a set of pointers.
struct PointersChainInfo {
/// All the GEPs in a set have same base address.
unsigned IsSameBaseAddress : 1;
/// These properties only valid if SameBaseAddress is set.
/// True if all pointers are separated by a unit stride.
unsigned IsUnitStride : 1;
/// True if distance between any two neigbouring pointers is a known value.
unsigned IsKnownStride : 1;
unsigned Reserved : 29;
bool isSameBase() const { return IsSameBaseAddress; }
bool isUnitStride() const { return IsSameBaseAddress && IsUnitStride; }
bool isKnownStride() const { return IsSameBaseAddress && IsKnownStride; }
static PointersChainInfo getUnitStride() {
return {/*IsSameBaseAddress=*/1, /*IsUnitStride=*/1,
/*IsKnownStride=*/1, 0};
}
static PointersChainInfo getKnownStride() {
return {/*IsSameBaseAddress=*/1, /*IsUnitStride=*/0,
/*IsKnownStride=*/1, 0};
}
static PointersChainInfo getUnknownStride() {
return {/*IsSameBaseAddress=*/1, /*IsUnitStride=*/0,
/*IsKnownStride=*/0, 0};
}
};
static_assert(sizeof(PointersChainInfo) == 4, "Was size increase justified?");
/// Estimate the cost of a chain of pointers (typically pointer operands of a
/// chain of loads or stores within same block) operations set when lowered.
/// \p AccessTy is the type of the loads/stores that will ultimately use the
/// \p Ptrs.
InstructionCost
getPointersChainCost(ArrayRef<const Value *> Ptrs, const Value *Base,
const PointersChainInfo &Info, Type *AccessTy,
TargetCostKind CostKind = TTI::TCK_RecipThroughput
) const;
/// \returns A value by which our inlining threshold should be multiplied.
/// This is primarily used to bump up the inlining threshold wholesale on
/// targets where calls are unusually expensive.
///
/// TODO: This is a rather blunt instrument. Perhaps altering the costs of
/// individual classes of instructions would be better.
unsigned getInliningThresholdMultiplier() const;
/// \returns A value to be added to the inlining threshold.
unsigned adjustInliningThreshold(const CallBase *CB) const;
/// \returns The cost of having an Alloca in the caller if not inlined, to be
/// added to the threshold
unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const;
/// \returns Vector bonus in percent.
///
/// Vector bonuses: We want to more aggressively inline vector-dense kernels
/// and apply this bonus based on the percentage of vector instructions. A
/// bonus is applied if the vector instructions exceed 50% and half that
/// amount is applied if it exceeds 10%. Note that these bonuses are some what
/// arbitrary and evolved over time by accident as much as because they are
/// principled bonuses.
/// FIXME: It would be nice to base the bonus values on something more
/// scientific. A target may has no bonus on vector instructions.
int getInlinerVectorBonusPercent() const;
/// \return the expected cost of a memcpy, which could e.g. depend on the
/// source/destination type and alignment and the number of bytes copied.
InstructionCost getMemcpyCost(const Instruction *I) const;
/// Returns the maximum memset / memcpy size in bytes that still makes it
/// profitable to inline the call.
uint64_t getMaxMemIntrinsicInlineSizeThreshold() const;
/// \return The estimated number of case clusters when lowering \p 'SI'.
/// \p JTSize Set a jump table size only when \p SI is suitable for a jump
/// table.
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
unsigned &JTSize,
ProfileSummaryInfo *PSI,
BlockFrequencyInfo *BFI) const;
/// Estimate the cost of a given IR user when lowered.
///
/// This can estimate the cost of either a ConstantExpr or Instruction when
/// lowered.
///
/// \p Operands is a list of operands which can be a result of transformations
/// of the current operands. The number of the operands on the list must equal
/// to the number of the current operands the IR user has. Their order on the
/// list must be the same as the order of the current operands the IR user
/// has.
///
/// The returned cost is defined in terms of \c TargetCostConstants, see its
/// comments for a detailed explanation of the cost values.
InstructionCost getInstructionCost(const User *U,
ArrayRef<const Value *> Operands,
TargetCostKind CostKind) const;
/// This is a helper function which calls the three-argument
/// getInstructionCost with \p Operands which are the current operands U has.
InstructionCost getInstructionCost(const User *U,
TargetCostKind CostKind) const {
SmallVector<const Value *, 4> Operands(U->operand_values());
return getInstructionCost(U, Operands, CostKind);
}
/// If a branch or a select condition is skewed in one direction by more than
/// this factor, it is very likely to be predicted correctly.
BranchProbability getPredictableBranchThreshold() const;
/// Return true if branch divergence exists.
///
/// Branch divergence has a significantly negative impact on GPU performance
/// when threads in the same wavefront take different paths due to conditional
/// branches.
///
/// If \p F is passed, provides a context function. If \p F is known to only
/// execute in a single threaded environment, the target may choose to skip
/// uniformity analysis and assume all values are uniform.
bool hasBranchDivergence(const Function *F = nullptr) const;
/// Returns whether V is a source of divergence.
///
/// This function provides the target-dependent information for
/// the target-independent UniformityAnalysis.
bool isSourceOfDivergence(const Value *V) const;
// Returns true for the target specific
// set of operations which produce uniform result
// even taking non-uniform arguments
bool isAlwaysUniform(const Value *V) const;
/// Query the target whether the specified address space cast from FromAS to
/// ToAS is valid.
bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const;
/// Return false if a \p AS0 address cannot possibly alias a \p AS1 address.
bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const;
/// Returns the address space ID for a target's 'flat' address space. Note
/// this is not necessarily the same as addrspace(0), which LLVM sometimes
/// refers to as the generic address space. The flat address space is a
/// generic address space that can be used access multiple segments of memory
/// with different address spaces. Access of a memory location through a
/// pointer with this address space is expected to be legal but slower
/// compared to the same memory location accessed through a pointer with a
/// different address space.
//
/// This is for targets with different pointer representations which can
/// be converted with the addrspacecast instruction. If a pointer is converted
/// to this address space, optimizations should attempt to replace the access
/// with the source address space.
///
/// \returns ~0u if the target does not have such a flat address space to
/// optimize away.
unsigned getFlatAddressSpace() const;
/// Return any intrinsic address operand indexes which may be rewritten if
/// they use a flat address space pointer.
///
/// \returns true if the intrinsic was handled.
bool collectFlatAddressOperands(SmallVectorImpl<int> &OpIndexes,
Intrinsic::ID IID) const;
bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const;
/// Return true if globals in this address space can have initializers other
/// than `undef`.
bool canHaveNonUndefGlobalInitializerInAddressSpace(unsigned AS) const;
unsigned getAssumedAddrSpace(const Value *V) const;
bool isSingleThreaded() const;
std::pair<const Value *, unsigned>
getPredicatedAddrSpace(const Value *V) const;
/// Rewrite intrinsic call \p II such that \p OldV will be replaced with \p
/// NewV, which has a different address space. This should happen for every
/// operand index that collectFlatAddressOperands returned for the intrinsic.
/// \returns nullptr if the intrinsic was not handled. Otherwise, returns the
/// new value (which may be the original \p II with modified operands).
Value *rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV,
Value *NewV) const;
/// Test whether calls to a function lower to actual program function
/// calls.
///
/// The idea is to test whether the program is likely to require a 'call'
/// instruction or equivalent in order to call the given function.
///
/// FIXME: It's not clear that this is a good or useful query API. Client's
/// should probably move to simpler cost metrics using the above.
/// Alternatively, we could split the cost interface into distinct code-size
/// and execution-speed costs. This would allow modelling the core of this
/// query more accurately as a call is a single small instruction, but
/// incurs significant execution cost.
bool isLoweredToCall(const Function *F) const;
struct LSRCost {
/// TODO: Some of these could be merged. Also, a lexical ordering
/// isn't always optimal.
unsigned Insns;
unsigned NumRegs;
unsigned AddRecCost;
unsigned NumIVMuls;
unsigned NumBaseAdds;
unsigned ImmCost;
unsigned SetupCost;
unsigned ScaleCost;
};
/// Parameters that control the generic loop unrolling transformation.
struct UnrollingPreferences {
/// The cost threshold for the unrolled loop. Should be relative to the
/// getInstructionCost values returned by this API, and the expectation is
/// that the unrolled loop's instructions when run through that interface
/// should not exceed this cost. However, this is only an estimate. Also,
/// specific loops may be unrolled even with a cost above this threshold if
/// deemed profitable. Set this to UINT_MAX to disable the loop body cost
/// restriction.
unsigned Threshold;
/// If complete unrolling will reduce the cost of the loop, we will boost
/// the Threshold by a certain percent to allow more aggressive complete
/// unrolling. This value provides the maximum boost percentage that we
/// can apply to Threshold (The value should be no less than 100).
/// BoostedThreshold = Threshold * min(RolledCost / UnrolledCost,
/// MaxPercentThresholdBoost / 100)
/// E.g. if complete unrolling reduces the loop execution time by 50%
/// then we boost the threshold by the factor of 2x. If unrolling is not
/// expected to reduce the running time, then we do not increase the
/// threshold.
unsigned MaxPercentThresholdBoost;
/// The cost threshold for the unrolled loop when optimizing for size (set
/// to UINT_MAX to disable).
unsigned OptSizeThreshold;
/// The cost threshold for the unrolled loop, like Threshold, but used
/// for partial/runtime unrolling (set to UINT_MAX to disable).
unsigned PartialThreshold;
/// The cost threshold for the unrolled loop when optimizing for size, like
/// OptSizeThreshold, but used for partial/runtime unrolling (set to
/// UINT_MAX to disable).
unsigned PartialOptSizeThreshold;
/// A forced unrolling factor (the number of concatenated bodies of the
/// original loop in the unrolled loop body). When set to 0, the unrolling
/// transformation will select an unrolling factor based on the current cost
/// threshold and other factors.
unsigned Count;
/// Default unroll count for loops with run-time trip count.
unsigned DefaultUnrollRuntimeCount;
// Set the maximum unrolling factor. The unrolling factor may be selected
// using the appropriate cost threshold, but may not exceed this number
// (set to UINT_MAX to disable). This does not apply in cases where the
// loop is being fully unrolled.
unsigned MaxCount;
/// Set the maximum unrolling factor for full unrolling. Like MaxCount, but
/// applies even if full unrolling is selected. This allows a target to fall
/// back to Partial unrolling if full unrolling is above FullUnrollMaxCount.
unsigned FullUnrollMaxCount;
// Represents number of instructions optimized when "back edge"
// becomes "fall through" in unrolled loop.
// For now we count a conditional branch on a backedge and a comparison
// feeding it.
unsigned BEInsns;
/// Allow partial unrolling (unrolling of loops to expand the size of the
/// loop body, not only to eliminate small constant-trip-count loops).
bool Partial;
/// Allow runtime unrolling (unrolling of loops to expand the size of the
/// loop body even when the number of loop iterations is not known at
/// compile time).
bool Runtime;
/// Allow generation of a loop remainder (extra iterations after unroll).
bool AllowRemainder;
/// Allow emitting expensive instructions (such as divisions) when computing
/// the trip count of a loop for runtime unrolling.
bool AllowExpensiveTripCount;
/// Apply loop unroll on any kind of loop
/// (mainly to loops that fail runtime unrolling).
bool Force;
/// Allow using trip count upper bound to unroll loops.
bool UpperBound;
/// Allow unrolling of all the iterations of the runtime loop remainder.
bool UnrollRemainder;
/// Allow unroll and jam. Used to enable unroll and jam for the target.
bool UnrollAndJam;
/// Threshold for unroll and jam, for inner loop size. The 'Threshold'
/// value above is used during unroll and jam for the outer loop size.
/// This value is used in the same manner to limit the size of the inner
/// loop.
unsigned UnrollAndJamInnerLoopThreshold;
/// Don't allow loop unrolling to simulate more than this number of
/// iterations when checking full unroll profitability
unsigned MaxIterationsCountToAnalyze;
/// Don't disable runtime unroll for the loops which were vectorized.
bool UnrollVectorizedLoop = false;
};
/// Get target-customized preferences for the generic loop unrolling
/// transformation. The caller will initialize UP with the current
/// target-independent defaults.
void getUnrollingPreferences(Loop *L, ScalarEvolution &,
UnrollingPreferences &UP,
OptimizationRemarkEmitter *ORE) const;
/// Query the target whether it would be profitable to convert the given loop
/// into a hardware loop.
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE,
AssumptionCache &AC, TargetLibraryInfo *LibInfo,
HardwareLoopInfo &HWLoopInfo) const;
/// Query the target whether it would be prefered to create a predicated
/// vector loop, which can avoid the need to emit a scalar epilogue loop.
bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const;
/// Query the target what the preferred style of tail folding is.
/// \param IVUpdateMayOverflow Tells whether it is known if the IV update
/// may (or will never) overflow for the suggested VF/UF in the given loop.
/// Targets can use this information to select a more optimal tail folding
/// style. The value conservatively defaults to true, such that no assumptions
/// are made on overflow.
TailFoldingStyle
getPreferredTailFoldingStyle(bool IVUpdateMayOverflow = true) const;
// Parameters that control the loop peeling transformation
struct PeelingPreferences {
/// A forced peeling factor (the number of bodied of the original loop
/// that should be peeled off before the loop body). When set to 0, the
/// a peeling factor based on profile information and other factors.
unsigned PeelCount;
/// Allow peeling off loop iterations.
bool AllowPeeling;
/// Allow peeling off loop iterations for loop nests.
bool AllowLoopNestsPeeling;
/// Allow peeling basing on profile. Uses to enable peeling off all
/// iterations basing on provided profile.
/// If the value is true the peeling cost model can decide to peel only
/// some iterations and in this case it will set this to false.
bool PeelProfiledIterations;
};
/// Get target-customized preferences for the generic loop peeling
/// transformation. The caller will initialize \p PP with the current
/// target-independent defaults with information from \p L and \p SE.
void getPeelingPreferences(Loop *L, ScalarEvolution &SE,
PeelingPreferences &PP) const;
/// Targets can implement their own combinations for target-specific
/// intrinsics. This function will be called from the InstCombine pass every
/// time a target-specific intrinsic is encountered.
///
/// \returns std::nullopt to not do anything target specific or a value that
/// will be returned from the InstCombiner. It is possible to return null and
/// stop further processing of the intrinsic by returning nullptr.
std::optional<Instruction *> instCombineIntrinsic(InstCombiner & IC,
IntrinsicInst & II) const;
/// Can be used to implement target-specific instruction combining.
/// \see instCombineIntrinsic
std::optional<Value *> simplifyDemandedUseBitsIntrinsic(
InstCombiner & IC, IntrinsicInst & II, APInt DemandedMask,
KnownBits & Known, bool &KnownBitsComputed) const;
/// Can be used to implement target-specific instruction combining.
/// \see instCombineIntrinsic
std::optional<Value *> simplifyDemandedVectorEltsIntrinsic(
InstCombiner & IC, IntrinsicInst & II, APInt DemandedElts,
APInt & UndefElts, APInt & UndefElts2, APInt & UndefElts3,
std::function<void(Instruction *, unsigned, APInt, APInt &)>
SimplifyAndSetOp) const;
/// @}
/// \name Scalar Target Information
/// @{
/// Flags indicating the kind of support for population count.
///
/// Compared to the SW implementation, HW support is supposed to
/// significantly boost the performance when the population is dense, and it
/// may or may not degrade performance if the population is sparse. A HW
/// support is considered as "Fast" if it can outperform, or is on a par
/// with, SW implementation when the population is sparse; otherwise, it is
/// considered as "Slow".
enum PopcntSupportKind { PSK_Software, PSK_SlowHardware, PSK_FastHardware };
/// Return true if the specified immediate is legal add immediate, that
/// is the target has add instructions which can add a register with the
/// immediate without having to materialize the immediate into a register.
bool isLegalAddImmediate(int64_t Imm) const;
/// Return true if the specified immediate is legal icmp immediate,
/// that is the target has icmp instructions which can compare a register
/// against the immediate without having to materialize the immediate into a
/// register.
bool isLegalICmpImmediate(int64_t Imm) const;
/// Return true if the addressing mode represented by AM is legal for
/// this target, for a load/store of the specified type.
/// The type may be VoidTy, in which case only return true if the addressing
/// mode is legal for a load/store of any legal type.
/// If target returns true in LSRWithInstrQueries(), I may be valid.
/// TODO: Handle pre/postinc as well.
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
bool HasBaseReg, int64_t Scale,
unsigned AddrSpace = 0,
Instruction *I = nullptr) const;
/// Return true if LSR cost of C1 is lower than C2.
bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1,
const TargetTransformInfo::LSRCost &C2) const;
/// Return true if LSR major cost is number of registers. Targets which
/// implement their own isLSRCostLess and unset number of registers as major
/// cost should return false, otherwise return true.
bool isNumRegsMajorCostOfLSR() const;
/// \returns true if LSR should not optimize a chain that includes \p I.
bool isProfitableLSRChainElement(Instruction *I) const;
/// Return true if the target can fuse a compare and branch.
/// Loop-strength-reduction (LSR) uses that knowledge to adjust its cost
/// calculation for the instructions in a loop.
bool canMacroFuseCmp() const;
/// Return true if the target can save a compare for loop count, for example
/// hardware loop saves a compare.
bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI,
DominatorTree *DT, AssumptionCache *AC,
TargetLibraryInfo *LibInfo) const;
enum AddressingModeKind {
AMK_PreIndexed,
AMK_PostIndexed,
AMK_None
};
/// Return the preferred addressing mode LSR should make efforts to generate.
AddressingModeKind getPreferredAddressingMode(const Loop *L,
ScalarEvolution *SE) const;
/// Return true if the target supports masked store.
bool isLegalMaskedStore(Type *DataType, Align Alignment) const;
/// Return true if the target supports masked load.
bool isLegalMaskedLoad(Type *DataType, Align Alignment) const;
/// Return true if the target supports nontemporal store.
bool isLegalNTStore(Type *DataType, Align Alignment) const;
/// Return true if the target supports nontemporal load.
bool isLegalNTLoad(Type *DataType, Align Alignment) const;
/// \Returns true if the target supports broadcasting a load to a vector of
/// type <NumElements x ElementTy>.
bool isLegalBroadcastLoad(Type *ElementTy, ElementCount NumElements) const;
/// Return true if the target supports masked scatter.
bool isLegalMaskedScatter(Type *DataType, Align Alignment) const;
/// Return true if the target supports masked gather.
bool isLegalMaskedGather(Type *DataType, Align Alignment) const;
/// Return true if the target forces scalarizing of llvm.masked.gather
/// intrinsics.
bool forceScalarizeMaskedGather(VectorType *Type, Align Alignment) const;
/// Return true if the target forces scalarizing of llvm.masked.scatter
/// intrinsics.
bool forceScalarizeMaskedScatter(VectorType *Type, Align Alignment) const;
/// Return true if the target supports masked compress store.
bool isLegalMaskedCompressStore(Type *DataType) const;
/// Return true if the target supports masked expand load.
bool isLegalMaskedExpandLoad(Type *DataType) const;
/// Return true if this is an alternating opcode pattern that can be lowered
/// to a single instruction on the target. In X86 this is for the addsub
/// instruction which corrsponds to a Shuffle + Fadd + FSub pattern in IR.
/// This function expectes two opcodes: \p Opcode1 and \p Opcode2 being
/// selected by \p OpcodeMask. The mask contains one bit per lane and is a `0`
/// when \p Opcode0 is selected and `1` when Opcode1 is selected.
/// \p VecTy is the vector type of the instruction to be generated.
bool isLegalAltInstr(VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
const SmallBitVector &OpcodeMask) const;
/// Return true if we should be enabling ordered reductions for the target.
bool enableOrderedReductions() const;
/// Return true if the target has a unified operation to calculate division
/// and remainder. If so, the additional implicit multiplication and
/// subtraction required to calculate a remainder from division are free. This
/// can enable more aggressive transformations for division and remainder than
/// would typically be allowed using throughput or size cost models.
bool hasDivRemOp(Type *DataType, bool IsSigned) const;
/// Return true if the given instruction (assumed to be a memory access
/// instruction) has a volatile variant. If that's the case then we can avoid
/// addrspacecast to generic AS for volatile loads/stores. Default
/// implementation returns false, which prevents address space inference for
/// volatile loads/stores.
bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) const;
/// Return true if target doesn't mind addresses in vectors.
bool prefersVectorizedAddressing() const;
/// Return the cost of the scaling factor used in the addressing
/// mode represented by AM for this target, for a load/store
/// of the specified type.
/// If the AM is supported, the return value must be >= 0.
/// If the AM is not supported, it returns a negative value.
/// TODO: Handle pre/postinc as well.
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
int64_t BaseOffset, bool HasBaseReg,
int64_t Scale,
unsigned AddrSpace = 0) const;
/// Return true if the loop strength reduce pass should make
/// Instruction* based TTI queries to isLegalAddressingMode(). This is
/// needed on SystemZ, where e.g. a memcpy can only have a 12 bit unsigned
/// immediate offset and no index register.
bool LSRWithInstrQueries() const;
/// Return true if it's free to truncate a value of type Ty1 to type
/// Ty2. e.g. On x86 it's free to truncate a i32 value in register EAX to i16
/// by referencing its sub-register AX.
bool isTruncateFree(Type *Ty1, Type *Ty2) const;
/// Return true if it is profitable to hoist instruction in the
/// then/else to before if.
bool isProfitableToHoist(Instruction *I) const;
bool useAA() const;
/// Return true if this type is legal.
bool isTypeLegal(Type *Ty) const;
/// Returns the estimated number of registers required to represent \p Ty.
unsigned getRegUsageForType(Type *Ty) const;
/// Return true if switches should be turned into lookup tables for the
/// target.
bool shouldBuildLookupTables() const;
/// Return true if switches should be turned into lookup tables
/// containing this constant value for the target.
bool shouldBuildLookupTablesForConstant(Constant *C) const;
/// Return true if lookup tables should be turned into relative lookup tables.
bool shouldBuildRelLookupTables() const;
/// Return true if the input function which is cold at all call sites,
/// should use coldcc calling convention.
bool useColdCCForColdCall(Function &F) const;
/// Estimate the overhead of scalarizing an instruction. Insert and Extract
/// are set if the demanded result elements need to be inserted and/or
/// extracted from vectors.
InstructionCost getScalarizationOverhead(VectorType *Ty,
const APInt &DemandedElts,
bool Insert, bool Extract,
TTI::TargetCostKind CostKind) const;
/// Estimate the overhead of scalarizing an instructions unique
/// non-constant operands. The (potentially vector) types to use for each of
/// argument are passes via Tys.
InstructionCost
getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
ArrayRef<Type *> Tys,
TTI::TargetCostKind CostKind) const;
/// If target has efficient vector element load/store instructions, it can
/// return true here so that insertion/extraction costs are not added to
/// the scalarization cost of a load/store.
bool supportsEfficientVectorElementLoadStore() const;
/// If the target supports tail calls.
bool supportsTailCalls() const;
/// If target supports tail call on \p CB
bool supportsTailCallFor(const CallBase *CB) const;
/// Don't restrict interleaved unrolling to small loops.
bool enableAggressiveInterleaving(bool LoopHasReductions) const;
/// Returns options for expansion of memcmp. IsZeroCmp is
// true if this is the expansion of memcmp(p1, p2, s) == 0.
struct MemCmpExpansionOptions {
// Return true if memcmp expansion is enabled.
operator bool() const { return MaxNumLoads > 0; }
// Maximum number of load operations.
unsigned MaxNumLoads = 0;
// The list of available load sizes (in bytes), sorted in decreasing order.
SmallVector<unsigned, 8> LoadSizes;
// For memcmp expansion when the memcmp result is only compared equal or
// not-equal to 0, allow up to this number of load pairs per block. As an
// example, this may allow 'memcmp(a, b, 3) == 0' in a single block:
// a0 = load2bytes &a[0]
// b0 = load2bytes &b[0]
// a2 = load1byte &a[2]
// b2 = load1byte &b[2]
// r = cmp eq (a0 ^ b0 | a2 ^ b2), 0
unsigned NumLoadsPerBlock = 1;
// Set to true to allow overlapping loads. For example, 7-byte compares can
// be done with two 4-byte compares instead of 4+2+1-byte compares. This
// requires all loads in LoadSizes to be doable in an unaligned way.
bool AllowOverlappingLoads = false;
};
MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize,
bool IsZeroCmp) const;
/// Should the Select Optimization pass be enabled and ran.
bool enableSelectOptimize() const;
/// Enable matching of interleaved access groups.
bool enableInterleavedAccessVectorization() const;
/// Enable matching of interleaved access groups that contain predicated
/// accesses or gaps and therefore vectorized using masked
/// vector loads/stores.
bool enableMaskedInterleavedAccessVectorization() const;
/// Indicate that it is potentially unsafe to automatically vectorize
/// floating-point operations because the semantics of vector and scalar
/// floating-point semantics may differ. For example, ARM NEON v7 SIMD math
/// does not support IEEE-754 denormal numbers, while depending on the
/// platform, scalar floating-point math does.
/// This applies to floating-point math operations and calls, not memory
/// operations, shuffles, or casts.
bool isFPVectorizationPotentiallyUnsafe() const;
/// Determine if the target supports unaligned memory accesses.
bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth,
unsigned AddressSpace = 0,
Align Alignment = Align(1),
unsigned *Fast = nullptr) const;
/// Return hardware support for population count.
PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const;
/// Return true if the hardware has a fast square-root instruction.
bool haveFastSqrt(Type *Ty) const;
/// Return true if the cost of the instruction is too high to speculatively
/// execute and should be kept behind a branch.
/// This normally just wraps around a getInstructionCost() call, but some
/// targets might report a low TCK_SizeAndLatency value that is incompatible
/// with the fixed TCC_Expensive value.
/// NOTE: This assumes the instruction passes isSafeToSpeculativelyExecute().
bool isExpensiveToSpeculativelyExecute(const Instruction *I) const;
/// Return true if it is faster to check if a floating-point value is NaN
/// (or not-NaN) versus a comparison against a constant FP zero value.
/// Targets should override this if materializing a 0.0 for comparison is
/// generally as cheap as checking for ordered/unordered.
bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const;
/// Return the expected cost of supporting the floating point operation
/// of the specified type.
InstructionCost getFPOpCost(Type *Ty) const;
/// Return the expected cost of materializing for the given integer
/// immediate of the specified type.
InstructionCost getIntImmCost(const APInt &Imm, Type *Ty,
TargetCostKind CostKind) const;
/// Return the expected cost of materialization for the given integer
/// immediate of the specified type for a given instruction. The cost can be
/// zero if the immediate can be folded into the specified instruction.
InstructionCost getIntImmCostInst(unsigned Opc, unsigned Idx,
const APInt &Imm, Type *Ty,
TargetCostKind CostKind,
Instruction *Inst = nullptr) const;
InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
const APInt &Imm, Type *Ty,
TargetCostKind CostKind) const;
/// Return the expected cost for the given integer when optimising
/// for size. This is different than the other integer immediate cost
/// functions in that it is subtarget agnostic. This is useful when you e.g.
/// target one ISA such as Aarch32 but smaller encodings could be possible
/// with another such as Thumb. This return value is used as a penalty when
/// the total costs for a constant is calculated (the bigger the cost, the
/// more beneficial constant hoisting is).
InstructionCost getIntImmCodeSizeCost(unsigned Opc, unsigned Idx,
const APInt &Imm, Type *Ty) const;
/// @}
/// \name Vector Target Information
/// @{
/// The various kinds of shuffle patterns for vector queries.
enum ShuffleKind {
SK_Broadcast, ///< Broadcast element 0 to all other elements.
SK_Reverse, ///< Reverse the order of the vector.
SK_Select, ///< Selects elements from the corresponding lane of
///< either source operand. This is equivalent to a
///< vector select with a constant condition operand.
SK_Transpose, ///< Transpose two vectors.
SK_InsertSubvector, ///< InsertSubvector. Index indicates start offset.
SK_ExtractSubvector, ///< ExtractSubvector Index indicates start offset.
SK_PermuteTwoSrc, ///< Merge elements from two source vectors into one
///< with any shuffle mask.
SK_PermuteSingleSrc, ///< Shuffle elements of single source vector with any
///< shuffle mask.
SK_Splice ///< Concatenates elements from the first input vector
///< with elements of the second input vector. Returning
///< a vector of the same type as the input vectors.
///< Index indicates start offset in first input vector.
};
/// Additional information about an operand's possible values.
enum OperandValueKind {
OK_AnyValue, // Operand can have any value.
OK_UniformValue, // Operand is uniform (splat of a value).
OK_UniformConstantValue, // Operand is uniform constant.
OK_NonUniformConstantValue // Operand is a non uniform constant value.
};
/// Additional properties of an operand's values.
enum OperandValueProperties {
OP_None = 0,
OP_PowerOf2 = 1,
OP_NegatedPowerOf2 = 2,
};
// Describe the values an operand can take. We're in the process
// of migrating uses of OperandValueKind and OperandValueProperties
// to use this class, and then will change the internal representation.
struct OperandValueInfo {
OperandValueKind Kind = OK_AnyValue;
OperandValueProperties Properties = OP_None;
bool isConstant() const {
return Kind == OK_UniformConstantValue || Kind == OK_NonUniformConstantValue;
}
bool isUniform() const {
return Kind == OK_UniformConstantValue || Kind == OK_UniformValue;
}
bool isPowerOf2() const {
return Properties == OP_PowerOf2;
}
bool isNegatedPowerOf2() const {
return Properties == OP_NegatedPowerOf2;
}
OperandValueInfo getNoProps() const {
return {Kind, OP_None};
}
};
/// \return the number of registers in the target-provided register class.
unsigned getNumberOfRegisters(unsigned ClassID) const;
/// \return the target-provided register class ID for the provided type,
/// accounting for type promotion and other type-legalization techniques that
/// the target might apply. However, it specifically does not account for the
/// scalarization or splitting of vector types. Should a vector type require
/// scalarization or splitting into multiple underlying vector registers, that
/// type should be mapped to a register class containing no registers.
/// Specifically, this is designed to provide a simple, high-level view of the
/// register allocation later performed by the backend. These register classes
/// don't necessarily map onto the register classes used by the backend.
/// FIXME: It's not currently possible to determine how many registers
/// are used by the provided type.
unsigned getRegisterClassForType(bool Vector, Type *Ty = nullptr) const;
/// \return the target-provided register class name
const char *getRegisterClassName(unsigned ClassID) const;
enum RegisterKind { RGK_Scalar, RGK_FixedWidthVector, RGK_ScalableVector };
/// \return The width of the largest scalar or vector register type.
TypeSize getRegisterBitWidth(RegisterKind K) const;
/// \return The width of the smallest vector register type.
unsigned getMinVectorRegisterBitWidth() const;
/// \return The maximum value of vscale if the target specifies an
/// architectural maximum vector length, and std::nullopt otherwise.
std::optional<unsigned> getMaxVScale() const;
/// \return the value of vscale to tune the cost model for.
std::optional<unsigned> getVScaleForTuning() const;
/// \return true if vscale is known to be a power of 2
bool isVScaleKnownToBeAPowerOfTwo() const;
/// \return True if the vectorization factor should be chosen to
/// make the vector of the smallest element type match the size of a
/// vector register. For wider element types, this could result in
/// creating vectors that span multiple vector registers.
/// If false, the vectorization factor will be chosen based on the
/// size of the widest element type.
/// \p K Register Kind for vectorization.
bool shouldMaximizeVectorBandwidth(TargetTransformInfo::RegisterKind K) const;
/// \return The minimum vectorization factor for types of given element
/// bit width, or 0 if there is no minimum VF. The returned value only
/// applies when shouldMaximizeVectorBandwidth returns true.
/// If IsScalable is true, the returned ElementCount must be a scalable VF.
ElementCount getMinimumVF(unsigned ElemWidth, bool IsScalable) const;
/// \return The maximum vectorization factor for types of given element
/// bit width and opcode, or 0 if there is no maximum VF.
/// Currently only used by the SLP vectorizer.
unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const;
/// \return The minimum vectorization factor for the store instruction. Given
/// the initial estimation of the minimum vector factor and store value type,
/// it tries to find possible lowest VF, which still might be profitable for
/// the vectorization.
/// \param VF Initial estimation of the minimum vector factor.
/// \param ScalarMemTy Scalar memory type of the store operation.
/// \param ScalarValTy Scalar type of the stored value.
/// Currently only used by the SLP vectorizer.
unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy,
Type *ScalarValTy) const;
/// \return True if it should be considered for address type promotion.
/// \p AllowPromotionWithoutCommonHeader Set true if promoting \p I is
/// profitable without finding other extensions fed by the same input.
bool shouldConsiderAddressTypePromotion(
const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const;
/// \return The size of a cache line in bytes.
unsigned getCacheLineSize() const;
/// The possible cache levels
enum class CacheLevel {
L1D, // The L1 data cache
L2D, // The L2 data cache
// We currently do not model L3 caches, as their sizes differ widely between
// microarchitectures. Also, we currently do not have a use for L3 cache
// size modeling yet.
};
/// \return The size of the cache level in bytes, if available.
std::optional<unsigned> getCacheSize(CacheLevel Level) const;
/// \return The associativity of the cache level, if available.
std::optional<unsigned> getCacheAssociativity(CacheLevel Level) const;
/// \return How much before a load we should place the prefetch
/// instruction. This is currently measured in number of
/// instructions.
unsigned getPrefetchDistance() const;
/// Some HW prefetchers can handle accesses up to a certain constant stride.
/// Sometimes prefetching is beneficial even below the HW prefetcher limit,
/// and the arguments provided are meant to serve as a basis for deciding this
/// for a particular loop.
///
/// \param NumMemAccesses Number of memory accesses in the loop.
/// \param NumStridedMemAccesses Number of the memory accesses that
/// ScalarEvolution could find a known stride
/// for.
/// \param NumPrefetches Number of software prefetches that will be
/// emitted as determined by the addresses
/// involved and the cache line size.
/// \param HasCall True if the loop contains a call.
///
/// \return This is the minimum stride in bytes where it makes sense to start
/// adding SW prefetches. The default is 1, i.e. prefetch with any
/// stride.
unsigned getMinPrefetchStride(unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
unsigned NumPrefetches, bool HasCall) const;
/// \return The maximum number of iterations to prefetch ahead. If
/// the required number of iterations is more than this number, no
/// prefetching is performed.
unsigned getMaxPrefetchIterationsAhead() const;
/// \return True if prefetching should also be done for writes.
bool enableWritePrefetching() const;
/// \return if target want to issue a prefetch in address space \p AS.
bool shouldPrefetchAddressSpace(unsigned AS) const;
/// \return The maximum interleave factor that any transform should try to
/// perform for this target. This number depends on the level of parallelism
/// and the number of execution units in the CPU.
unsigned getMaxInterleaveFactor(ElementCount VF) const;
/// Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
static OperandValueInfo getOperandInfo(const Value *V);
/// This is an approximation of reciprocal throughput of a math/logic op.
/// A higher cost indicates less expected throughput.
/// From Agner Fog's guides, reciprocal throughput is "the average number of
/// clock cycles per instruction when the instructions are not part of a
/// limiting dependency chain."
/// Therefore, costs should be scaled to account for multiple execution units
/// on the target that can process this type of instruction. For example, if
/// there are 5 scalar integer units and 2 vector integer units that can
/// calculate an 'add' in a single cycle, this model should indicate that the
/// cost of the vector add instruction is 2.5 times the cost of the scalar
/// add instruction.
/// \p Args is an optional argument which holds the instruction operands
/// values so the TTI can analyze those values searching for special
/// cases or optimizations based on those values.
/// \p CxtI is the optional original context instruction, if one exists, to
/// provide even more information.
InstructionCost getArithmeticInstrCost(
unsigned Opcode, Type *Ty,
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
TTI::OperandValueInfo Opd1Info = {TTI::OK_AnyValue, TTI::OP_None},
TTI::OperandValueInfo Opd2Info = {TTI::OK_AnyValue, TTI::OP_None},
ArrayRef<const Value *> Args = ArrayRef<const Value *>(),
const Instruction *CxtI = nullptr) const;
/// \return The cost of a shuffle instruction of kind Kind and of type Tp.
/// The exact mask may be passed as Mask, or else the array will be empty.
/// The index and subtype parameters are used by the subvector insertion and
/// extraction shuffle kinds to show the insert/extract point and the type of
/// the subvector being inserted/extracted. The operands of the shuffle can be
/// passed through \p Args, which helps improve the cost estimation in some
/// cases, like in broadcast loads.
/// NOTE: For subvector extractions Tp represents the source type.
InstructionCost
getShuffleCost(ShuffleKind Kind, VectorType *Tp,
ArrayRef<int> Mask = std::nullopt,
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
int Index = 0, VectorType *SubTp = nullptr,
ArrayRef<const Value *> Args = std::nullopt) const;
/// Represents a hint about the context in which a cast is used.
///
/// For zext/sext, the context of the cast is the operand, which must be a
/// load of some kind. For trunc, the context is of the cast is the single
/// user of the instruction, which must be a store of some kind.
///
/// This enum allows the vectorizer to give getCastInstrCost an idea of the
/// type of cast it's dealing with, as not every cast is equal. For instance,
/// the zext of a load may be free, but the zext of an interleaving load can
//// be (very) expensive!
///
/// See \c getCastContextHint to compute a CastContextHint from a cast
/// Instruction*. Callers can use it if they don't need to override the
/// context and just want it to be calculated from the instruction.
///
/// FIXME: This handles the types of load/store that the vectorizer can
/// produce, which are the cases where the context instruction is most
/// likely to be incorrect. There are other situations where that can happen
/// too, which might be handled here but in the long run a more general
/// solution of costing multiple instructions at the same times may be better.
enum class CastContextHint : uint8_t {
None, ///< The cast is not used with a load/store of any kind.
Normal, ///< The cast is used with a normal load/store.
Masked, ///< The cast is used with a masked load/store.
GatherScatter, ///< The cast is used with a gather/scatter.
Interleave, ///< The cast is used with an interleaved load/store.
Reversed, ///< The cast is used with a reversed load/store.
};
/// Calculates a CastContextHint from \p I.
/// This should be used by callers of getCastInstrCost if they wish to
/// determine the context from some instruction.
/// \returns the CastContextHint for ZExt/SExt/Trunc, None if \p I is nullptr,
/// or if it's another type of cast.
static CastContextHint getCastContextHint(const Instruction *I);
/// \return The expected cost of cast instructions, such as bitcast, trunc,
/// zext, etc. If there is an existing instruction that holds Opcode, it
/// may be passed in the 'I' parameter.
InstructionCost
getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
TTI::CastContextHint CCH,
TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency,
const Instruction *I = nullptr) const;
/// \return The expected cost of a sign- or zero-extended vector extract. Use
/// Index = -1 to indicate that there is no information about the index value.
InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst,
VectorType *VecTy,
unsigned Index) const;
/// \return The expected cost of control-flow related instructions such as
/// Phi, Ret, Br, Switch.
InstructionCost
getCFInstrCost(unsigned Opcode,
TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency,
const Instruction *I = nullptr) const;
/// \returns The expected cost of compare and select instructions. If there
/// is an existing instruction that holds Opcode, it may be passed in the
/// 'I' parameter. The \p VecPred parameter can be used to indicate the select
/// is using a compare with the specified predicate as condition. When vector
/// types are passed, \p VecPred must be used for all lanes.
InstructionCost
getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
CmpInst::Predicate VecPred,
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
const Instruction *I = nullptr) const;
/// \return The expected cost of vector Insert and Extract.
/// Use -1 to indicate that there is no information on the index value.
/// This is used when the instruction is not available; a typical use
/// case is to provision the cost of vectorization/scalarization in
/// vectorizer passes.
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index = -1, Value *Op0 = nullptr,
Value *Op1 = nullptr) const;
/// \return The expected cost of vector Insert and Extract.
/// This is used when instruction is available, and implementation
/// asserts 'I' is not nullptr.
///
/// A typical suitable use case is cost estimation when vector instruction
/// exists (e.g., from basic blocks during transformation).
InstructionCost getVectorInstrCost(const Instruction &I, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index = -1) const;
/// \return The cost of replication shuffle of \p VF elements typed \p EltTy
/// \p ReplicationFactor times.
///
/// For example, the mask for \p ReplicationFactor=3 and \p VF=4 is:
/// <0,0,0,1,1,1,2,2,2,3,3,3>
InstructionCost getReplicationShuffleCost(Type *EltTy, int ReplicationFactor,
int VF,
const APInt &DemandedDstElts,
TTI::TargetCostKind CostKind);
/// \return The cost of Load and Store instructions.
InstructionCost
getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
unsigned AddressSpace,
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
OperandValueInfo OpdInfo = {OK_AnyValue, OP_None},
const Instruction *I = nullptr) const;
/// \return The cost of VP Load and Store instructions.
InstructionCost
getVPMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
unsigned AddressSpace,
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
const Instruction *I = nullptr) const;
/// \return The cost of masked Load and Store instructions.
InstructionCost getMaskedMemoryOpCost(
unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput) const;
/// \return The cost of Gather or Scatter operation
/// \p Opcode - is a type of memory access Load or Store
/// \p DataTy - a vector type of the data to be loaded or stored
/// \p Ptr - pointer [or vector of pointers] - address[es] in memory
/// \p VariableMask - true when the memory access is predicated with a mask
/// that is not a compile-time constant
/// \p Alignment - alignment of single element
/// \p I - the optional original context instruction, if one exists, e.g. the
/// load/store to transform or the call to the gather/scatter intrinsic
InstructionCost getGatherScatterOpCost(
unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask,
Align Alignment, TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
const Instruction *I = nullptr) const;
/// \return The cost of the interleaved memory operation.
/// \p Opcode is the memory operation code
/// \p VecTy is the vector type of the interleaved access.
/// \p Factor is the interleave factor
/// \p Indices is the indices for interleaved load members (as interleaved
/// load allows gaps)
/// \p Alignment is the alignment of the memory operation
/// \p AddressSpace is address space of the pointer.
/// \p UseMaskForCond indicates if the memory access is predicated.
/// \p UseMaskForGaps indicates if gaps should be masked.
InstructionCost getInterleavedMemoryOpCost(
unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
Align Alignment, unsigned AddressSpace,
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput,
bool UseMaskForCond = false, bool UseMaskForGaps = false) const;
/// A helper function to determine the type of reduction algorithm used
/// for a given \p Opcode and set of FastMathFlags \p FMF.
static bool requiresOrderedReduction(std::optional<FastMathFlags> FMF) {
return FMF && !(*FMF).allowReassoc();
}
/// Calculate the cost of vector reduction intrinsics.
///
/// This is the cost of reducing the vector value of type \p Ty to a scalar
/// value using the operation denoted by \p Opcode. The FastMathFlags
/// parameter \p FMF indicates what type of reduction we are performing:
/// 1. Tree-wise. This is the typical 'fast' reduction performed that
/// involves successively splitting a vector into half and doing the
/// operation on the pair of halves until you have a scalar value. For
/// example:
/// (v0, v1, v2, v3)
/// ((v0+v2), (v1+v3), undef, undef)
/// ((v0+v2+v1+v3), undef, undef, undef)
/// This is the default behaviour for integer operations, whereas for
/// floating point we only do this if \p FMF indicates that
/// reassociation is allowed.
/// 2. Ordered. For a vector with N elements this involves performing N
/// operations in lane order, starting with an initial scalar value, i.e.
/// result = InitVal + v0
/// result = result + v1
/// result = result + v2
/// result = result + v3
/// This is only the case for FP operations and when reassociation is not
/// allowed.
///
InstructionCost getArithmeticReductionCost(
unsigned Opcode, VectorType *Ty, std::optional<FastMathFlags> FMF,
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput) const;
InstructionCost getMinMaxReductionCost(
Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF = FastMathFlags(),
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput) const;
/// Calculate the cost of an extended reduction pattern, similar to
/// getArithmeticReductionCost of an Add reduction with multiply and optional
/// extensions. This is the cost of as:
/// ResTy vecreduce.add(mul (A, B)).
/// ResTy vecreduce.add(mul(ext(Ty A), ext(Ty B)).
InstructionCost getMulAccReductionCost(
bool IsUnsigned, Type *ResTy, VectorType *Ty,
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput) const;
/// Calculate the cost of an extended reduction pattern, similar to
/// getArithmeticReductionCost of a reduction with an extension.
/// This is the cost of as:
/// ResTy vecreduce.opcode(ext(Ty A)).
InstructionCost getExtendedReductionCost(
unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty,
FastMathFlags FMF,
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput) const;
/// \returns The cost of Intrinsic instructions. Analyses the real arguments.
/// Three cases are handled: 1. scalar instruction 2. vector instruction
/// 3. scalar instruction which is to be vectorized.
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
TTI::TargetCostKind CostKind) const;
/// \returns The cost of Call instructions.
InstructionCost getCallInstrCost(
Function *F, Type *RetTy, ArrayRef<Type *> Tys,
TTI::TargetCostKind CostKind = TTI::TCK_SizeAndLatency) const;
/// \returns The number of pieces into which the provided type must be
/// split during legalization. Zero is returned when the answer is unknown.
unsigned getNumberOfParts(Type *Tp) const;
/// \returns The cost of the address computation. For most targets this can be
/// merged into the instruction indexing mode. Some targets might want to
/// distinguish between address computation for memory operations on vector
/// types and scalar types. Such targets should override this function.
/// The 'SE' parameter holds pointer for the scalar evolution object which
/// is used in order to get the Ptr step value in case of constant stride.
/// The 'Ptr' parameter holds SCEV of the access pointer.
InstructionCost getAddressComputationCost(Type *Ty,
ScalarEvolution *SE = nullptr,
const SCEV *Ptr = nullptr) const;
/// \returns The cost, if any, of keeping values of the given types alive
/// over a callsite.
///
/// Some types may require the use of register classes that do not have
/// any callee-saved registers, so would require a spill and fill.
InstructionCost getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const;
/// \returns True if the intrinsic is a supported memory intrinsic. Info
/// will contain additional information - whether the intrinsic may write
/// or read to memory, volatility and the pointer. Info is undefined
/// if false is returned.
bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info) const;
/// \returns The maximum element size, in bytes, for an element
/// unordered-atomic memory intrinsic.
unsigned getAtomicMemIntrinsicMaxElementSize() const;
/// \returns A value which is the result of the given memory intrinsic. New
/// instructions may be created to extract the result from the given intrinsic
/// memory operation. Returns nullptr if the target cannot create a result
/// from the given intrinsic.
Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
Type *ExpectedType) const;
/// \returns The type to use in a loop expansion of a memcpy call.
Type *getMemcpyLoopLoweringType(
LLVMContext &Context, Value *Length, unsigned SrcAddrSpace,
unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign,
std::optional<uint32_t> AtomicElementSize = std::nullopt) const;
/// \param[out] OpsOut The operand types to copy RemainingBytes of memory.
/// \param RemainingBytes The number of bytes to copy.
///
/// Calculates the operand types to use when copying \p RemainingBytes of
/// memory, where source and destination alignments are \p SrcAlign and
/// \p DestAlign respectively.
void getMemcpyLoopResidualLoweringType(
SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
unsigned SrcAlign, unsigned DestAlign,
std::optional<uint32_t> AtomicCpySize = std::nullopt) const;
/// \returns True if the two functions have compatible attributes for inlining
/// purposes.
bool areInlineCompatible(const Function *Caller,
const Function *Callee) const;
/// \returns True if the caller and callee agree on how \p Types will be
/// passed to or returned from the callee.
/// to the callee.
/// \param Types List of types to check.
bool areTypesABICompatible(const Function *Caller, const Function *Callee,
const ArrayRef<Type *> &Types) const;
/// The type of load/store indexing.
enum MemIndexedMode {
MIM_Unindexed, ///< No indexing.
MIM_PreInc, ///< Pre-incrementing.
MIM_PreDec, ///< Pre-decrementing.
MIM_PostInc, ///< Post-incrementing.
MIM_PostDec ///< Post-decrementing.
};
/// \returns True if the specified indexed load for the given type is legal.
bool isIndexedLoadLegal(enum MemIndexedMode Mode, Type *Ty) const;
/// \returns True if the specified indexed store for the given type is legal.
bool isIndexedStoreLegal(enum MemIndexedMode Mode, Type *Ty) const;
/// \returns The bitwidth of the largest vector type that should be used to
/// load/store in the given address space.
unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const;
/// \returns True if the load instruction is legal to vectorize.
bool isLegalToVectorizeLoad(LoadInst *LI) const;
/// \returns True if the store instruction is legal to vectorize.
bool isLegalToVectorizeStore(StoreInst *SI) const;
/// \returns True if it is legal to vectorize the given load chain.
bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment,
unsigned AddrSpace) const;
/// \returns True if it is legal to vectorize the given store chain.
bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment,
unsigned AddrSpace) const;
/// \returns True if it is legal to vectorize the given reduction kind.
bool isLegalToVectorizeReduction(const RecurrenceDescriptor &RdxDesc,
ElementCount VF) const;
/// \returns True if the given type is supported for scalable vectors
bool isElementTypeLegalForScalableVector(Type *Ty) const;
/// \returns The new vector factor value if the target doesn't support \p
/// SizeInBytes loads or has a better vector factor.
unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize,
unsigned ChainSizeInBytes,
VectorType *VecTy) const;
/// \returns The new vector factor value if the target doesn't support \p
/// SizeInBytes stores or has a better vector factor.
unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize,
unsigned ChainSizeInBytes,
VectorType *VecTy) const;
/// Flags describing the kind of vector reduction.
struct ReductionFlags {
ReductionFlags() = default;
bool IsMaxOp =
false; ///< If the op a min/max kind, true if it's a max operation.
bool IsSigned = false; ///< Whether the operation is a signed int reduction.
bool NoNaN =
false; ///< If op is an fp min/max, whether NaNs may be present.
};
/// \returns True if the target prefers reductions in loop.
bool preferInLoopReduction(unsigned Opcode, Type *Ty,
ReductionFlags Flags) const;
/// \returns True if the target prefers reductions select kept in the loop
/// when tail folding. i.e.
/// loop:
/// p = phi (0, s)
/// a = add (p, x)
/// s = select (mask, a, p)
/// vecreduce.add(s)
///
/// As opposed to the normal scheme of p = phi (0, a) which allows the select
/// to be pulled out of the loop. If the select(.., add, ..) can be predicated
/// by the target, this can lead to cleaner code generation.
bool preferPredicatedReductionSelect(unsigned Opcode, Type *Ty,
ReductionFlags Flags) const;
/// Return true if the loop vectorizer should consider vectorizing an
/// otherwise scalar epilogue loop.
bool preferEpilogueVectorization() const;
/// \returns True if the target wants to expand the given reduction intrinsic
/// into a shuffle sequence.
bool shouldExpandReduction(const IntrinsicInst *II) const;
/// \returns the size cost of rematerializing a GlobalValue address relative
/// to a stack reload.
unsigned getGISelRematGlobalCost() const;
/// \returns the lower bound of a trip count to decide on vectorization
/// while tail-folding.
unsigned getMinTripCountTailFoldingThreshold() const;
/// \returns True if the target supports scalable vectors.
bool supportsScalableVectors() const;
/// \return true when scalable vectorization is preferred.
bool enableScalableVectorization() const;
/// \name Vector Predication Information
/// @{
/// Whether the target supports the %evl parameter of VP intrinsic efficiently
/// in hardware, for the given opcode and type/alignment. (see LLVM Language
/// Reference - "Vector Predication Intrinsics").
/// Use of %evl is discouraged when that is not the case.
bool hasActiveVectorLength(unsigned Opcode, Type *DataType,
Align Alignment) const;
struct VPLegalization {
enum VPTransform {
// keep the predicating parameter
Legal = 0,
// where legal, discard the predicate parameter
Discard = 1,
// transform into something else that is also predicating
Convert = 2
};
// How to transform the EVL parameter.
// Legal: keep the EVL parameter as it is.
// Discard: Ignore the EVL parameter where it is safe to do so.
// Convert: Fold the EVL into the mask parameter.
VPTransform EVLParamStrategy;
// How to transform the operator.
// Legal: The target supports this operator.
// Convert: Convert this to a non-VP operation.
// The 'Discard' strategy is invalid.
VPTransform OpStrategy;
bool shouldDoNothing() const {
return (EVLParamStrategy == Legal) && (OpStrategy == Legal);
}
VPLegalization(VPTransform EVLParamStrategy, VPTransform OpStrategy)
: EVLParamStrategy(EVLParamStrategy), OpStrategy(OpStrategy) {}
};
/// \returns How the target needs this vector-predicated operation to be
/// transformed.
VPLegalization getVPLegalizationStrategy(const VPIntrinsic &PI) const;
/// @}
/// \returns Whether a 32-bit branch instruction is available in Arm or Thumb
/// state.
///
/// Used by the LowerTypeTests pass, which constructs an IR inline assembler
/// node containing a jump table in a format suitable for the target, so it
/// needs to know what format of jump table it can legally use.
///
/// For non-Arm targets, this function isn't used. It defaults to returning
/// false, but it shouldn't matter what it returns anyway.
bool hasArmWideBranch(bool Thumb) const;
/// \return The maximum number of function arguments the target supports.
unsigned getMaxNumArgs() const;
/// @}
private:
/// The abstract base class used to type erase specific TTI
/// implementations.
class Concept;
/// The template model for the base class which wraps a concrete
/// implementation in a type erased interface.
template <typename T> class Model;
std::unique_ptr<Concept> TTIImpl;
};
class TargetTransformInfo::Concept {
public:
virtual ~Concept() = 0;
virtual const DataLayout &getDataLayout() const = 0;
virtual InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr,
ArrayRef<const Value *> Operands,
Type *AccessType,
TTI::TargetCostKind CostKind) = 0;
virtual InstructionCost
getPointersChainCost(ArrayRef<const Value *> Ptrs, const Value *Base,
const TTI::PointersChainInfo &Info, Type *AccessTy,
TTI::TargetCostKind CostKind) = 0;
virtual unsigned getInliningThresholdMultiplier() const = 0;
virtual unsigned adjustInliningThreshold(const CallBase *CB) = 0;
virtual int getInlinerVectorBonusPercent() const = 0;
virtual unsigned getCallerAllocaCost(const CallBase *CB,
const AllocaInst *AI) const = 0;
virtual InstructionCost getMemcpyCost(const Instruction *I) = 0;
virtual uint64_t getMaxMemIntrinsicInlineSizeThreshold() const = 0;
virtual unsigned
getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JTSize,
ProfileSummaryInfo *PSI,
BlockFrequencyInfo *BFI) = 0;
virtual InstructionCost getInstructionCost(const User *U,
ArrayRef<const Value *> Operands,
TargetCostKind CostKind) = 0;
virtual BranchProbability getPredictableBranchThreshold() = 0;
virtual bool hasBranchDivergence(const Function *F = nullptr) = 0;
virtual bool isSourceOfDivergence(const Value *V) = 0;
virtual bool isAlwaysUniform(const Value *V) = 0;
virtual bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const = 0;
virtual bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const = 0;
virtual unsigned getFlatAddressSpace() = 0;
virtual bool collectFlatAddressOperands(SmallVectorImpl<int> &OpIndexes,
Intrinsic::ID IID) const = 0;
virtual bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const = 0;
virtual bool
canHaveNonUndefGlobalInitializerInAddressSpace(unsigned AS) const = 0;
virtual unsigned getAssumedAddrSpace(const Value *V) const = 0;
virtual bool isSingleThreaded() const = 0;
virtual std::pair<const Value *, unsigned>
getPredicatedAddrSpace(const Value *V) const = 0;
virtual Value *rewriteIntrinsicWithAddressSpace(IntrinsicInst *II,
Value *OldV,
Value *NewV) const = 0;
virtual bool isLoweredToCall(const Function *F) = 0;
virtual void getUnrollingPreferences(Loop *L, ScalarEvolution &,
UnrollingPreferences &UP,
OptimizationRemarkEmitter *ORE) = 0;
virtual void getPeelingPreferences(Loop *L, ScalarEvolution &SE,
PeelingPreferences &PP) = 0;
virtual bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE,
AssumptionCache &AC,
TargetLibraryInfo *LibInfo,
HardwareLoopInfo &HWLoopInfo) = 0;
virtual bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) = 0;
virtual TailFoldingStyle
getPreferredTailFoldingStyle(bool IVUpdateMayOverflow = true) = 0;
virtual std::optional<Instruction *> instCombineIntrinsic(
InstCombiner &IC, IntrinsicInst &II) = 0;
virtual std::optional<Value *> simplifyDemandedUseBitsIntrinsic(
InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask,
KnownBits & Known, bool &KnownBitsComputed) = 0;
virtual std::optional<Value *> simplifyDemandedVectorEltsIntrinsic(
InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts,
APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3,
std::function<void(Instruction *, unsigned, APInt, APInt &)>
SimplifyAndSetOp) = 0;
virtual bool isLegalAddImmediate(int64_t Imm) = 0;
virtual bool isLegalICmpImmediate(int64_t Imm) = 0;
virtual bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
int64_t BaseOffset, bool HasBaseReg,
int64_t Scale, unsigned AddrSpace,
Instruction *I) = 0;
virtual bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1,
const TargetTransformInfo::LSRCost &C2) = 0;
virtual bool isNumRegsMajorCostOfLSR() = 0;
virtual bool isProfitableLSRChainElement(Instruction *I) = 0;
virtual bool canMacroFuseCmp() = 0;
virtual bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE,
LoopInfo *LI, DominatorTree *DT, AssumptionCache *AC,
TargetLibraryInfo *LibInfo) = 0;
virtual AddressingModeKind
getPreferredAddressingMode(const Loop *L, ScalarEvolution *SE) const = 0;
virtual bool isLegalMaskedStore(Type *DataType, Align Alignment) = 0;
virtual bool isLegalMaskedLoad(Type *DataType, Align Alignment) = 0;
virtual bool isLegalNTStore(Type *DataType, Align Alignment) = 0;
virtual bool isLegalNTLoad(Type *DataType, Align Alignment) = 0;
virtual bool isLegalBroadcastLoad(Type *ElementTy,
ElementCount NumElements) const = 0;
virtual bool isLegalMaskedScatter(Type *DataType, Align Alignment) = 0;
virtual bool isLegalMaskedGather(Type *DataType, Align Alignment) = 0;
virtual bool forceScalarizeMaskedGather(VectorType *DataType,
Align Alignment) = 0;
virtual bool forceScalarizeMaskedScatter(VectorType *DataType,
Align Alignment) = 0;
virtual bool isLegalMaskedCompressStore(Type *DataType) = 0;
virtual bool isLegalMaskedExpandLoad(Type *DataType) = 0;
virtual bool isLegalAltInstr(VectorType *VecTy, unsigned Opcode0,
unsigned Opcode1,
const SmallBitVector &OpcodeMask) const = 0;
virtual bool enableOrderedReductions() = 0;
virtual bool hasDivRemOp(Type *DataType, bool IsSigned) = 0;
virtual bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) = 0;
virtual bool prefersVectorizedAddressing() = 0;
virtual InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
int64_t BaseOffset,
bool HasBaseReg, int64_t Scale,
unsigned AddrSpace) = 0;
virtual bool LSRWithInstrQueries() = 0;
virtual bool isTruncateFree(Type *Ty1, Type *Ty2) = 0;
virtual bool isProfitableToHoist(Instruction *I) = 0;
virtual bool useAA() = 0;
virtual bool isTypeLegal(Type *Ty) = 0;
virtual unsigned getRegUsageForType(Type *Ty) = 0;
virtual bool shouldBuildLookupTables() = 0;
virtual bool shouldBuildLookupTablesForConstant(Constant *C) = 0;
virtual bool shouldBuildRelLookupTables() = 0;
virtual bool useColdCCForColdCall(Function &F) = 0;
virtual InstructionCost getScalarizationOverhead(VectorType *Ty,
const APInt &DemandedElts,
bool Insert, bool Extract,
TargetCostKind CostKind) = 0;
virtual InstructionCost
getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
ArrayRef<Type *> Tys,
TargetCostKind CostKind) = 0;
virtual bool supportsEfficientVectorElementLoadStore() = 0;
virtual bool supportsTailCalls() = 0;
virtual bool supportsTailCallFor(const CallBase *CB) = 0;
virtual bool enableAggressiveInterleaving(bool LoopHasReductions) = 0;
virtual MemCmpExpansionOptions
enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const = 0;
virtual bool enableSelectOptimize() = 0;
virtual bool enableInterleavedAccessVectorization() = 0;
virtual bool enableMaskedInterleavedAccessVectorization() = 0;
virtual bool isFPVectorizationPotentiallyUnsafe() = 0;
virtual bool allowsMisalignedMemoryAccesses(LLVMContext &Context,
unsigned BitWidth,
unsigned AddressSpace,
Align Alignment,
unsigned *Fast) = 0;
virtual PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) = 0;
virtual bool haveFastSqrt(Type *Ty) = 0;
virtual bool isExpensiveToSpeculativelyExecute(const Instruction *I) = 0;
virtual bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) = 0;
virtual InstructionCost getFPOpCost(Type *Ty) = 0;
virtual InstructionCost getIntImmCodeSizeCost(unsigned Opc, unsigned Idx,
const APInt &Imm, Type *Ty) = 0;
virtual InstructionCost getIntImmCost(const APInt &Imm, Type *Ty,
TargetCostKind CostKind) = 0;
virtual InstructionCost getIntImmCostInst(unsigned Opc, unsigned Idx,
const APInt &Imm, Type *Ty,
TargetCostKind CostKind,
Instruction *Inst = nullptr) = 0;
virtual InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
const APInt &Imm, Type *Ty,
TargetCostKind CostKind) = 0;
virtual unsigned getNumberOfRegisters(unsigned ClassID) const = 0;
virtual unsigned getRegisterClassForType(bool Vector,
Type *Ty = nullptr) const = 0;
virtual const char *getRegisterClassName(unsigned ClassID) const = 0;
virtual TypeSize getRegisterBitWidth(RegisterKind K) const = 0;
virtual unsigned getMinVectorRegisterBitWidth() const = 0;
virtual std::optional<unsigned> getMaxVScale() const = 0;
virtual std::optional<unsigned> getVScaleForTuning() const = 0;
virtual bool isVScaleKnownToBeAPowerOfTwo() const = 0;
virtual bool
shouldMaximizeVectorBandwidth(TargetTransformInfo::RegisterKind K) const = 0;
virtual ElementCount getMinimumVF(unsigned ElemWidth,
bool IsScalable) const = 0;
virtual unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const = 0;
virtual unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy,
Type *ScalarValTy) const = 0;
virtual bool shouldConsiderAddressTypePromotion(
const Instruction &I, bool &AllowPromotionWithoutCommonHeader) = 0;
virtual unsigned getCacheLineSize() const = 0;
virtual std::optional<unsigned> getCacheSize(CacheLevel Level) const = 0;
virtual std::optional<unsigned> getCacheAssociativity(CacheLevel Level)
const = 0;
/// \return How much before a load we should place the prefetch
/// instruction. This is currently measured in number of
/// instructions.
virtual unsigned getPrefetchDistance() const = 0;
/// \return Some HW prefetchers can handle accesses up to a certain
/// constant stride. This is the minimum stride in bytes where it
/// makes sense to start adding SW prefetches. The default is 1,
/// i.e. prefetch with any stride. Sometimes prefetching is beneficial
/// even below the HW prefetcher limit, and the arguments provided are
/// meant to serve as a basis for deciding this for a particular loop.
virtual unsigned getMinPrefetchStride(unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
unsigned NumPrefetches,
bool HasCall) const = 0;
/// \return The maximum number of iterations to prefetch ahead. If
/// the required number of iterations is more than this number, no
/// prefetching is performed.
virtual unsigned getMaxPrefetchIterationsAhead() const = 0;
/// \return True if prefetching should also be done for writes.
virtual bool enableWritePrefetching() const = 0;
/// \return if target want to issue a prefetch in address space \p AS.
virtual bool shouldPrefetchAddressSpace(unsigned AS) const = 0;
virtual unsigned getMaxInterleaveFactor(ElementCount VF) = 0;
virtual InstructionCost getArithmeticInstrCost(
unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
OperandValueInfo Opd1Info, OperandValueInfo Opd2Info,
ArrayRef<const Value *> Args, const Instruction *CxtI = nullptr) = 0;
virtual InstructionCost getShuffleCost(ShuffleKind Kind, VectorType *Tp,
ArrayRef<int> Mask,
TTI::TargetCostKind CostKind,
int Index, VectorType *SubTp,
ArrayRef<const Value *> Args) = 0;
virtual InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst,
Type *Src, CastContextHint CCH,
TTI::TargetCostKind CostKind,
const Instruction *I) = 0;
virtual InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst,
VectorType *VecTy,
unsigned Index) = 0;
virtual InstructionCost getCFInstrCost(unsigned Opcode,
TTI::TargetCostKind CostKind,
const Instruction *I = nullptr) = 0;
virtual InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
Type *CondTy,
CmpInst::Predicate VecPred,
TTI::TargetCostKind CostKind,
const Instruction *I) = 0;
virtual InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) = 0;
virtual InstructionCost getVectorInstrCost(const Instruction &I, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index) = 0;
virtual InstructionCost
getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF,
const APInt &DemandedDstElts,
TTI::TargetCostKind CostKind) = 0;
virtual InstructionCost
getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
unsigned AddressSpace, TTI::TargetCostKind CostKind,
OperandValueInfo OpInfo, const Instruction *I) = 0;
virtual InstructionCost getVPMemoryOpCost(unsigned Opcode, Type *Src,
Align Alignment,
unsigned AddressSpace,
TTI::TargetCostKind CostKind,
const Instruction *I) = 0;
virtual InstructionCost
getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
unsigned AddressSpace,
TTI::TargetCostKind CostKind) = 0;
virtual InstructionCost
getGatherScatterOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr,
bool VariableMask, Align Alignment,
TTI::TargetCostKind CostKind,
const Instruction *I = nullptr) = 0;
virtual InstructionCost getInterleavedMemoryOpCost(
unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
bool UseMaskForCond = false, bool UseMaskForGaps = false) = 0;
virtual InstructionCost
getArithmeticReductionCost(unsigned Opcode, VectorType *Ty,
std::optional<FastMathFlags> FMF,
TTI::TargetCostKind CostKind) = 0;
virtual InstructionCost
getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF,
TTI::TargetCostKind CostKind) = 0;
virtual InstructionCost getExtendedReductionCost(
unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty,
FastMathFlags FMF,
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput) = 0;
virtual InstructionCost getMulAccReductionCost(
bool IsUnsigned, Type *ResTy, VectorType *Ty,
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput) = 0;
virtual InstructionCost
getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
TTI::TargetCostKind CostKind) = 0;
virtual InstructionCost getCallInstrCost(Function *F, Type *RetTy,
ArrayRef<Type *> Tys,
TTI::TargetCostKind CostKind) = 0;
virtual unsigned getNumberOfParts(Type *Tp) = 0;
virtual InstructionCost
getAddressComputationCost(Type *Ty, ScalarEvolution *SE, const SCEV *Ptr) = 0;
virtual InstructionCost
getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) = 0;
virtual bool getTgtMemIntrinsic(IntrinsicInst *Inst,
MemIntrinsicInfo &Info) = 0;
virtual unsigned getAtomicMemIntrinsicMaxElementSize() const = 0;
virtual Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
Type *ExpectedType) = 0;
virtual Type *getMemcpyLoopLoweringType(
LLVMContext &Context, Value *Length, unsigned SrcAddrSpace,
unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign,
std::optional<uint32_t> AtomicElementSize) const = 0;
virtual void getMemcpyLoopResidualLoweringType(
SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
unsigned SrcAlign, unsigned DestAlign,
std::optional<uint32_t> AtomicCpySize) const = 0;
virtual bool areInlineCompatible(const Function *Caller,
const Function *Callee) const = 0;
virtual bool areTypesABICompatible(const Function *Caller,
const Function *Callee,
const ArrayRef<Type *> &Types) const = 0;
virtual bool isIndexedLoadLegal(MemIndexedMode Mode, Type *Ty) const = 0;
virtual bool isIndexedStoreLegal(MemIndexedMode Mode, Type *Ty) const = 0;
virtual unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const = 0;
virtual bool isLegalToVectorizeLoad(LoadInst *LI) const = 0;
virtual bool isLegalToVectorizeStore(StoreInst *SI) const = 0;
virtual bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace) const = 0;
virtual bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes,
Align Alignment,
unsigned AddrSpace) const = 0;
virtual bool isLegalToVectorizeReduction(const RecurrenceDescriptor &RdxDesc,
ElementCount VF) const = 0;
virtual bool isElementTypeLegalForScalableVector(Type *Ty) const = 0;
virtual unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize,
unsigned ChainSizeInBytes,
VectorType *VecTy) const = 0;
virtual unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize,
unsigned ChainSizeInBytes,
VectorType *VecTy) const = 0;
virtual bool preferInLoopReduction(unsigned Opcode, Type *Ty,
ReductionFlags) const = 0;
virtual bool preferPredicatedReductionSelect(unsigned Opcode, Type *Ty,
ReductionFlags) const = 0;
virtual bool preferEpilogueVectorization() const = 0;
virtual bool shouldExpandReduction(const IntrinsicInst *II) const = 0;
virtual unsigned getGISelRematGlobalCost() const = 0;
virtual unsigned getMinTripCountTailFoldingThreshold() const = 0;
virtual bool enableScalableVectorization() const = 0;
virtual bool supportsScalableVectors() const = 0;
virtual bool hasActiveVectorLength(unsigned Opcode, Type *DataType,
Align Alignment) const = 0;
virtual VPLegalization
getVPLegalizationStrategy(const VPIntrinsic &PI) const = 0;
virtual bool hasArmWideBranch(bool Thumb) const = 0;
virtual unsigned getMaxNumArgs() const = 0;
};
template <typename T>
class TargetTransformInfo::Model final : public TargetTransformInfo::Concept {
T Impl;
public:
Model(T Impl) : Impl(std::move(Impl)) {}
~Model() override = default;
const DataLayout &getDataLayout() const override {
return Impl.getDataLayout();
}
InstructionCost
getGEPCost(Type *PointeeType, const Value *Ptr,
ArrayRef<const Value *> Operands, Type *AccessType,
TargetTransformInfo::TargetCostKind CostKind) override {
return Impl.getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
}
InstructionCost getPointersChainCost(ArrayRef<const Value *> Ptrs,
const Value *Base,
const PointersChainInfo &Info,
Type *AccessTy,
TargetCostKind CostKind) override {
return Impl.getPointersChainCost(Ptrs, Base, Info, AccessTy, CostKind);
}
unsigned getInliningThresholdMultiplier() const override {
return Impl.getInliningThresholdMultiplier();
}
unsigned adjustInliningThreshold(const CallBase *CB) override {
return Impl.adjustInliningThreshold(CB);
}
int getInlinerVectorBonusPercent() const override {
return Impl.getInlinerVectorBonusPercent();
}
unsigned getCallerAllocaCost(const CallBase *CB,
const AllocaInst *AI) const override {
return Impl.getCallerAllocaCost(CB, AI);
}
InstructionCost getMemcpyCost(const Instruction *I) override {
return Impl.getMemcpyCost(I);
}
uint64_t getMaxMemIntrinsicInlineSizeThreshold() const override {
return Impl.getMaxMemIntrinsicInlineSizeThreshold();
}
InstructionCost getInstructionCost(const User *U,
ArrayRef<const Value *> Operands,
TargetCostKind CostKind) override {
return Impl.getInstructionCost(U, Operands, CostKind);
}
BranchProbability getPredictableBranchThreshold() override {
return Impl.getPredictableBranchThreshold();
}
bool hasBranchDivergence(const Function *F = nullptr) override {
return Impl.hasBranchDivergence(F);
}
bool isSourceOfDivergence(const Value *V) override {
return Impl.isSourceOfDivergence(V);
}
bool isAlwaysUniform(const Value *V) override {
return Impl.isAlwaysUniform(V);
}
bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
return Impl.isValidAddrSpaceCast(FromAS, ToAS);
}
bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const override {
return Impl.addrspacesMayAlias(AS0, AS1);
}
unsigned getFlatAddressSpace() override { return Impl.getFlatAddressSpace(); }
bool collectFlatAddressOperands(SmallVectorImpl<int> &OpIndexes,
Intrinsic::ID IID) const override {
return Impl.collectFlatAddressOperands(OpIndexes, IID);
}
bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const override {
return Impl.isNoopAddrSpaceCast(FromAS, ToAS);
}
bool
canHaveNonUndefGlobalInitializerInAddressSpace(unsigned AS) const override {
return Impl.canHaveNonUndefGlobalInitializerInAddressSpace(AS);
}
unsigned getAssumedAddrSpace(const Value *V) const override {
return Impl.getAssumedAddrSpace(V);
}
bool isSingleThreaded() const override { return Impl.isSingleThreaded(); }
std::pair<const Value *, unsigned>
getPredicatedAddrSpace(const Value *V) const override {
return Impl.getPredicatedAddrSpace(V);
}
Value *rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV,
Value *NewV) const override {
return Impl.rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
}
bool isLoweredToCall(const Function *F) override {
return Impl.isLoweredToCall(F);
}
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
UnrollingPreferences &UP,
OptimizationRemarkEmitter *ORE) override {
return Impl.getUnrollingPreferences(L, SE, UP, ORE);
}
void getPeelingPreferences(Loop *L, ScalarEvolution &SE,
PeelingPreferences &PP) override {
return Impl.getPeelingPreferences(L, SE, PP);
}
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE,
AssumptionCache &AC, TargetLibraryInfo *LibInfo,
HardwareLoopInfo &HWLoopInfo) override {
return Impl.isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
}
bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) override {
return Impl.preferPredicateOverEpilogue(TFI);
}
TailFoldingStyle
getPreferredTailFoldingStyle(bool IVUpdateMayOverflow = true) override {
return Impl.getPreferredTailFoldingStyle(IVUpdateMayOverflow);
}
std::optional<Instruction *>
instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) override {
return Impl.instCombineIntrinsic(IC, II);
}
std::optional<Value *>
simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II,
APInt DemandedMask, KnownBits &Known,
bool &KnownBitsComputed) override {
return Impl.simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
KnownBitsComputed);
}
std::optional<Value *> simplifyDemandedVectorEltsIntrinsic(
InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
APInt &UndefElts2, APInt &UndefElts3,
std::function<void(Instruction *, unsigned, APInt, APInt &)>
SimplifyAndSetOp) override {
return Impl.simplifyDemandedVectorEltsIntrinsic(
IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
SimplifyAndSetOp);
}
bool isLegalAddImmediate(int64_t Imm) override {
return Impl.isLegalAddImmediate(Imm);
}
bool isLegalICmpImmediate(int64_t Imm) override {
return Impl.isLegalICmpImmediate(Imm);
}
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
bool HasBaseReg, int64_t Scale, unsigned AddrSpace,
Instruction *I) override {
return Impl.isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, Scale,
AddrSpace, I);
}
bool isLSRCostLess(const TargetTransformInfo::LSRCost &C1,
const TargetTransformInfo::LSRCost &C2) override {
return Impl.isLSRCostLess(C1, C2);
}
bool isNumRegsMajorCostOfLSR() override {
return Impl.isNumRegsMajorCostOfLSR();
}
bool isProfitableLSRChainElement(Instruction *I) override {
return Impl.isProfitableLSRChainElement(I);
}
bool canMacroFuseCmp() override { return Impl.canMacroFuseCmp(); }
bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI,
DominatorTree *DT, AssumptionCache *AC,
TargetLibraryInfo *LibInfo) override {
return Impl.canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
}
AddressingModeKind
getPreferredAddressingMode(const Loop *L,
ScalarEvolution *SE) const override {
return Impl.getPreferredAddressingMode(L, SE);
}
bool isLegalMaskedStore(Type *DataType, Align Alignment) override {
return Impl.isLegalMaskedStore(DataType, Alignment);
}
bool isLegalMaskedLoad(Type *DataType, Align Alignment) override {
return Impl.isLegalMaskedLoad(DataType, Alignment);
}
bool isLegalNTStore(Type *DataType, Align Alignment) override {
return Impl.isLegalNTStore(DataType, Alignment);
}
bool isLegalNTLoad(Type *DataType, Align Alignment) override {
return Impl.isLegalNTLoad(DataType, Alignment);
}
bool isLegalBroadcastLoad(Type *ElementTy,
ElementCount NumElements) const override {
return Impl.isLegalBroadcastLoad(ElementTy, NumElements);
}
bool isLegalMaskedScatter(Type *DataType, Align Alignment) override {
return Impl.isLegalMaskedScatter(DataType, Alignment);
}
bool isLegalMaskedGather(Type *DataType, Align Alignment) override {
return Impl.isLegalMaskedGather(DataType, Alignment);
}
bool forceScalarizeMaskedGather(VectorType *DataType,
Align Alignment) override {
return Impl.forceScalarizeMaskedGather(DataType, Alignment);
}
bool forceScalarizeMaskedScatter(VectorType *DataType,
Align Alignment) override {
return Impl.forceScalarizeMaskedScatter(DataType, Alignment);
}
bool isLegalMaskedCompressStore(Type *DataType) override {
return Impl.isLegalMaskedCompressStore(DataType);
}
bool isLegalMaskedExpandLoad(Type *DataType) override {
return Impl.isLegalMaskedExpandLoad(DataType);
}
bool isLegalAltInstr(VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
const SmallBitVector &OpcodeMask) const override {
return Impl.isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
}
bool enableOrderedReductions() override {
return Impl.enableOrderedReductions();
}
bool hasDivRemOp(Type *DataType, bool IsSigned) override {
return Impl.hasDivRemOp(DataType, IsSigned);
}
bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) override {
return Impl.hasVolatileVariant(I, AddrSpace);
}
bool prefersVectorizedAddressing() override {
return Impl.prefersVectorizedAddressing();
}
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
int64_t BaseOffset, bool HasBaseReg,
int64_t Scale,
unsigned AddrSpace) override {
return Impl.getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg, Scale,
AddrSpace);
}
bool LSRWithInstrQueries() override { return Impl.LSRWithInstrQueries(); }
bool isTruncateFree(Type *Ty1, Type *Ty2) override {
return Impl.isTruncateFree(Ty1, Ty2);
}
bool isProfitableToHoist(Instruction *I) override {
return Impl.isProfitableToHoist(I);
}
bool useAA() override { return Impl.useAA(); }
bool isTypeLegal(Type *Ty) override { return Impl.isTypeLegal(Ty); }
unsigned getRegUsageForType(Type *Ty) override {
return Impl.getRegUsageForType(Ty);
}
bool shouldBuildLookupTables() override {
return Impl.shouldBuildLookupTables();
}
bool shouldBuildLookupTablesForConstant(Constant *C) override {
return Impl.shouldBuildLookupTablesForConstant(C);
}
bool shouldBuildRelLookupTables() override {
return Impl.shouldBuildRelLookupTables();
}
bool useColdCCForColdCall(Function &F) override {
return Impl.useColdCCForColdCall(F);
}
InstructionCost getScalarizationOverhead(VectorType *Ty,
const APInt &DemandedElts,
bool Insert, bool Extract,
TargetCostKind CostKind) override {
return Impl.getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
CostKind);
}
InstructionCost
getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
ArrayRef<Type *> Tys,
TargetCostKind CostKind) override {
return Impl.getOperandsScalarizationOverhead(Args, Tys, CostKind);
}
bool supportsEfficientVectorElementLoadStore() override {
return Impl.supportsEfficientVectorElementLoadStore();
}
bool supportsTailCalls() override { return Impl.supportsTailCalls(); }
bool supportsTailCallFor(const CallBase *CB) override {
return Impl.supportsTailCallFor(CB);
}
bool enableAggressiveInterleaving(bool LoopHasReductions) override {
return Impl.enableAggressiveInterleaving(LoopHasReductions);
}
MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize,
bool IsZeroCmp) const override {
return Impl.enableMemCmpExpansion(OptSize, IsZeroCmp);
}
bool enableInterleavedAccessVectorization() override {
return Impl.enableInterleavedAccessVectorization();
}
bool enableSelectOptimize() override {
return Impl.enableSelectOptimize();
}
bool enableMaskedInterleavedAccessVectorization() override {
return Impl.enableMaskedInterleavedAccessVectorization();
}
bool isFPVectorizationPotentiallyUnsafe() override {
return Impl.isFPVectorizationPotentiallyUnsafe();
}
bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth,
unsigned AddressSpace, Align Alignment,
unsigned *Fast) override {
return Impl.allowsMisalignedMemoryAccesses(Context, BitWidth, AddressSpace,
Alignment, Fast);
}
PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) override {
return Impl.getPopcntSupport(IntTyWidthInBit);
}
bool haveFastSqrt(Type *Ty) override { return Impl.haveFastSqrt(Ty); }
bool isExpensiveToSpeculativelyExecute(const Instruction* I) override {
return Impl.isExpensiveToSpeculativelyExecute(I);
}
bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) override {
return Impl.isFCmpOrdCheaperThanFCmpZero(Ty);
}
InstructionCost getFPOpCost(Type *Ty) override {
return Impl.getFPOpCost(Ty);
}
InstructionCost getIntImmCodeSizeCost(unsigned Opc, unsigned Idx,
const APInt &Imm, Type *Ty) override {
return Impl.getIntImmCodeSizeCost(Opc, Idx, Imm, Ty);
}
InstructionCost getIntImmCost(const APInt &Imm, Type *Ty,
TargetCostKind CostKind) override {
return Impl.getIntImmCost(Imm, Ty, CostKind);
}
InstructionCost getIntImmCostInst(unsigned Opc, unsigned Idx,
const APInt &Imm, Type *Ty,
TargetCostKind CostKind,
Instruction *Inst = nullptr) override {
return Impl.getIntImmCostInst(Opc, Idx, Imm, Ty, CostKind, Inst);
}
InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
const APInt &Imm, Type *Ty,
TargetCostKind CostKind) override {
return Impl.getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind);
}
unsigned getNumberOfRegisters(unsigned ClassID) const override {
return Impl.getNumberOfRegisters(ClassID);
}
unsigned getRegisterClassForType(bool Vector,
Type *Ty = nullptr) const override {
return Impl.getRegisterClassForType(Vector, Ty);
}
const char *getRegisterClassName(unsigned ClassID) const override {
return Impl.getRegisterClassName(ClassID);
}
TypeSize getRegisterBitWidth(RegisterKind K) const override {
return Impl.getRegisterBitWidth(K);
}
unsigned getMinVectorRegisterBitWidth() const override {
return Impl.getMinVectorRegisterBitWidth();
}
std::optional<unsigned> getMaxVScale() const override {
return Impl.getMaxVScale();
}
std::optional<unsigned> getVScaleForTuning() const override {
return Impl.getVScaleForTuning();
}
bool isVScaleKnownToBeAPowerOfTwo() const override {
return Impl.isVScaleKnownToBeAPowerOfTwo();
}
bool shouldMaximizeVectorBandwidth(
TargetTransformInfo::RegisterKind K) const override {
return Impl.shouldMaximizeVectorBandwidth(K);
}
ElementCount getMinimumVF(unsigned ElemWidth,
bool IsScalable) const override {
return Impl.getMinimumVF(ElemWidth, IsScalable);
}
unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const override {
return Impl.getMaximumVF(ElemWidth, Opcode);
}
unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy,
Type *ScalarValTy) const override {
return Impl.getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy);
}
bool shouldConsiderAddressTypePromotion(
const Instruction &I, bool &AllowPromotionWithoutCommonHeader) override {
return Impl.shouldConsiderAddressTypePromotion(
I, AllowPromotionWithoutCommonHeader);
}
unsigned getCacheLineSize() const override { return Impl.getCacheLineSize(); }
std::optional<unsigned> getCacheSize(CacheLevel Level) const override {
return Impl.getCacheSize(Level);
}
std::optional<unsigned>
getCacheAssociativity(CacheLevel Level) const override {
return Impl.getCacheAssociativity(Level);
}
/// Return the preferred prefetch distance in terms of instructions.
///
unsigned getPrefetchDistance() const override {
return Impl.getPrefetchDistance();
}
/// Return the minimum stride necessary to trigger software
/// prefetching.
///
unsigned getMinPrefetchStride(unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
unsigned NumPrefetches,
bool HasCall) const override {
return Impl.getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
NumPrefetches, HasCall);
}
/// Return the maximum prefetch distance in terms of loop
/// iterations.
///
unsigned getMaxPrefetchIterationsAhead() const override {
return Impl.getMaxPrefetchIterationsAhead();
}
/// \return True if prefetching should also be done for writes.
bool enableWritePrefetching() const override {
return Impl.enableWritePrefetching();
}
/// \return if target want to issue a prefetch in address space \p AS.
bool shouldPrefetchAddressSpace(unsigned AS) const override {
return Impl.shouldPrefetchAddressSpace(AS);
}
unsigned getMaxInterleaveFactor(ElementCount VF) override {
return Impl.getMaxInterleaveFactor(VF);
}
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
unsigned &JTSize,
ProfileSummaryInfo *PSI,
BlockFrequencyInfo *BFI) override {
return Impl.getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);
}
InstructionCost getArithmeticInstrCost(
unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
OperandValueInfo Opd1Info, OperandValueInfo Opd2Info,
ArrayRef<const Value *> Args,
const Instruction *CxtI = nullptr) override {
return Impl.getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info, Opd2Info,
Args, CxtI);
}
InstructionCost getShuffleCost(ShuffleKind Kind, VectorType *Tp,
ArrayRef<int> Mask,
TTI::TargetCostKind CostKind, int Index,
VectorType *SubTp,
ArrayRef<const Value *> Args) override {
return Impl.getShuffleCost(Kind, Tp, Mask, CostKind, Index, SubTp, Args);
}
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
CastContextHint CCH,
TTI::TargetCostKind CostKind,
const Instruction *I) override {
return Impl.getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
}
InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst,
VectorType *VecTy,
unsigned Index) override {
return Impl.getExtractWithExtendCost(Opcode, Dst, VecTy, Index);
}
InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind,
const Instruction *I = nullptr) override {
return Impl.getCFInstrCost(Opcode, CostKind, I);
}
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
CmpInst::Predicate VecPred,
TTI::TargetCostKind CostKind,
const Instruction *I) override {
return Impl.getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I);
}
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) override {
return Impl.getVectorInstrCost(Opcode, Val, CostKind, Index, Op0, Op1);
}
InstructionCost getVectorInstrCost(const Instruction &I, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index) override {
return Impl.getVectorInstrCost(I, Val, CostKind, Index);
}
InstructionCost
getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF,
const APInt &DemandedDstElts,
TTI::TargetCostKind CostKind) override {
return Impl.getReplicationShuffleCost(EltTy, ReplicationFactor, VF,
DemandedDstElts, CostKind);
}
InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
unsigned AddressSpace,
TTI::TargetCostKind CostKind,
OperandValueInfo OpInfo,
const Instruction *I) override {
return Impl.getMemoryOpCost(Opcode, Src, Alignment, AddressSpace, CostKind,
OpInfo, I);
}
InstructionCost getVPMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
unsigned AddressSpace,
TTI::TargetCostKind CostKind,
const Instruction *I) override {
return Impl.getVPMemoryOpCost(Opcode, Src, Alignment, AddressSpace,
CostKind, I);
}
InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *Src,
Align Alignment, unsigned AddressSpace,
TTI::TargetCostKind CostKind) override {
return Impl.getMaskedMemoryOpCost(Opcode, Src, Alignment, AddressSpace,
CostKind);
}
InstructionCost
getGatherScatterOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr,
bool VariableMask, Align Alignment,
TTI::TargetCostKind CostKind,
const Instruction *I = nullptr) override {
return Impl.getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
Alignment, CostKind, I);
}
InstructionCost getInterleavedMemoryOpCost(
unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
bool UseMaskForCond, bool UseMaskForGaps) override {
return Impl.getInterleavedMemoryOpCost(Opcode, VecTy, Factor, Indices,
Alignment, AddressSpace, CostKind,
UseMaskForCond, UseMaskForGaps);
}
InstructionCost
getArithmeticReductionCost(unsigned Opcode, VectorType *Ty,
std::optional<FastMathFlags> FMF,
TTI::TargetCostKind CostKind) override {
return Impl.getArithmeticReductionCost(Opcode, Ty, FMF, CostKind);
}
InstructionCost
getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF,
TTI::TargetCostKind CostKind) override {
return Impl.getMinMaxReductionCost(IID, Ty, FMF, CostKind);
}
InstructionCost
getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy,
VectorType *Ty, FastMathFlags FMF,
TTI::TargetCostKind CostKind) override {
return Impl.getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
CostKind);
}
InstructionCost
getMulAccReductionCost(bool IsUnsigned, Type *ResTy, VectorType *Ty,
TTI::TargetCostKind CostKind) override {
return Impl.getMulAccReductionCost(IsUnsigned, ResTy, Ty, CostKind);
}
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
TTI::TargetCostKind CostKind) override {
return Impl.getIntrinsicInstrCost(ICA, CostKind);
}
InstructionCost getCallInstrCost(Function *F, Type *RetTy,
ArrayRef<Type *> Tys,
TTI::TargetCostKind CostKind) override {
return Impl.getCallInstrCost(F, RetTy, Tys, CostKind);
}
unsigned getNumberOfParts(Type *Tp) override {
return Impl.getNumberOfParts(Tp);
}
InstructionCost getAddressComputationCost(Type *Ty, ScalarEvolution *SE,
const SCEV *Ptr) override {
return Impl.getAddressComputationCost(Ty, SE, Ptr);
}
InstructionCost getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) override {
return Impl.getCostOfKeepingLiveOverCall(Tys);
}
bool getTgtMemIntrinsic(IntrinsicInst *Inst,
MemIntrinsicInfo &Info) override {
return Impl.getTgtMemIntrinsic(Inst, Info);
}
unsigned getAtomicMemIntrinsicMaxElementSize() const override {
return Impl.getAtomicMemIntrinsicMaxElementSize();
}
Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
Type *ExpectedType) override {
return Impl.getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
}
Type *getMemcpyLoopLoweringType(
LLVMContext &Context, Value *Length, unsigned SrcAddrSpace,
unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign,
std::optional<uint32_t> AtomicElementSize) const override {
return Impl.getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace,
DestAddrSpace, SrcAlign, DestAlign,
AtomicElementSize);
}
void getMemcpyLoopResidualLoweringType(
SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
unsigned SrcAlign, unsigned DestAlign,
std::optional<uint32_t> AtomicCpySize) const override {
Impl.getMemcpyLoopResidualLoweringType(OpsOut, Context, RemainingBytes,
SrcAddrSpace, DestAddrSpace,
SrcAlign, DestAlign, AtomicCpySize);
}
bool areInlineCompatible(const Function *Caller,
const Function *Callee) const override {
return Impl.areInlineCompatible(Caller, Callee);
}
bool areTypesABICompatible(const Function *Caller, const Function *Callee,
const ArrayRef<Type *> &Types) const override {
return Impl.areTypesABICompatible(Caller, Callee, Types);
}
bool isIndexedLoadLegal(MemIndexedMode Mode, Type *Ty) const override {
return Impl.isIndexedLoadLegal(Mode, Ty, getDataLayout());
}
bool isIndexedStoreLegal(MemIndexedMode Mode, Type *Ty) const override {
return Impl.isIndexedStoreLegal(Mode, Ty, getDataLayout());
}
unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const override {
return Impl.getLoadStoreVecRegBitWidth(AddrSpace);
}
bool isLegalToVectorizeLoad(LoadInst *LI) const override {
return Impl.isLegalToVectorizeLoad(LI);
}
bool isLegalToVectorizeStore(StoreInst *SI) const override {
return Impl.isLegalToVectorizeStore(SI);
}
bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment,
unsigned AddrSpace) const override {
return Impl.isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
AddrSpace);
}
bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment,
unsigned AddrSpace) const override {
return Impl.isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
AddrSpace);
}
bool isLegalToVectorizeReduction(const RecurrenceDescriptor &RdxDesc,
ElementCount VF) const override {
return Impl.isLegalToVectorizeReduction(RdxDesc, VF);
}
bool isElementTypeLegalForScalableVector(Type *Ty) const override {
return Impl.isElementTypeLegalForScalableVector(Ty);
}
unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize,
unsigned ChainSizeInBytes,
VectorType *VecTy) const override {
return Impl.getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
}
unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize,
unsigned ChainSizeInBytes,
VectorType *VecTy) const override {
return Impl.getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
}
bool preferInLoopReduction(unsigned Opcode, Type *Ty,
ReductionFlags Flags) const override {
return Impl.preferInLoopReduction(Opcode, Ty, Flags);
}
bool preferPredicatedReductionSelect(unsigned Opcode, Type *Ty,
ReductionFlags Flags) const override {
return Impl.preferPredicatedReductionSelect(Opcode, Ty, Flags);
}
bool preferEpilogueVectorization() const override {
return Impl.preferEpilogueVectorization();
}
bool shouldExpandReduction(const IntrinsicInst *II) const override {
return Impl.shouldExpandReduction(II);
}
unsigned getGISelRematGlobalCost() const override {
return Impl.getGISelRematGlobalCost();
}
unsigned getMinTripCountTailFoldingThreshold() const override {
return Impl.getMinTripCountTailFoldingThreshold();
}
bool supportsScalableVectors() const override {
return Impl.supportsScalableVectors();
}
bool enableScalableVectorization() const override {
return Impl.enableScalableVectorization();
}
bool hasActiveVectorLength(unsigned Opcode, Type *DataType,
Align Alignment) const override {
return Impl.hasActiveVectorLength(Opcode, DataType, Alignment);
}
VPLegalization
getVPLegalizationStrategy(const VPIntrinsic &PI) const override {
return Impl.getVPLegalizationStrategy(PI);
}
bool hasArmWideBranch(bool Thumb) const override {
return Impl.hasArmWideBranch(Thumb);
}
unsigned getMaxNumArgs() const override {
return Impl.getMaxNumArgs();
}
};
template <typename T>
TargetTransformInfo::TargetTransformInfo(T Impl)
: TTIImpl(new Model<T>(Impl)) {}
/// Analysis pass providing the \c TargetTransformInfo.
///
/// The core idea of the TargetIRAnalysis is to expose an interface through
/// which LLVM targets can analyze and provide information about the middle
/// end's target-independent IR. This supports use cases such as target-aware
/// cost modeling of IR constructs.
///
/// This is a function analysis because much of the cost modeling for targets
/// is done in a subtarget specific way and LLVM supports compiling different
/// functions targeting different subtargets in order to support runtime
/// dispatch according to the observed subtarget.
class TargetIRAnalysis : public AnalysisInfoMixin<TargetIRAnalysis> {
public:
typedef TargetTransformInfo Result;
/// Default construct a target IR analysis.
///
/// This will use the module's datalayout to construct a baseline
/// conservative TTI result.
TargetIRAnalysis();
/// Construct an IR analysis pass around a target-provide callback.
///
/// The callback will be called with a particular function for which the TTI
/// is needed and must return a TTI object for that function.
TargetIRAnalysis(std::function<Result(const Function &)> TTICallback);
// Value semantics. We spell out the constructors for MSVC.
TargetIRAnalysis(const TargetIRAnalysis &Arg)
: TTICallback(Arg.TTICallback) {}
TargetIRAnalysis(TargetIRAnalysis &&Arg)
: TTICallback(std::move(Arg.TTICallback)) {}
TargetIRAnalysis &operator=(const TargetIRAnalysis &RHS) {
TTICallback = RHS.TTICallback;
return *this;
}
TargetIRAnalysis &operator=(TargetIRAnalysis &&RHS) {
TTICallback = std::move(RHS.TTICallback);
return *this;
}
Result run(const Function &F, FunctionAnalysisManager &);
private:
friend AnalysisInfoMixin<TargetIRAnalysis>;
static AnalysisKey Key;
/// The callback used to produce a result.
///
/// We use a completely opaque callback so that targets can provide whatever
/// mechanism they desire for constructing the TTI for a given function.
///
/// FIXME: Should we really use std::function? It's relatively inefficient.
/// It might be possible to arrange for even stateful callbacks to outlive
/// the analysis and thus use a function_ref which would be lighter weight.
/// This may also be less error prone as the callback is likely to reference
/// the external TargetMachine, and that reference needs to never dangle.
std::function<Result(const Function &)> TTICallback;
/// Helper function used as the callback in the default constructor.
static Result getDefaultTTI(const Function &F);
};
/// Wrapper pass for TargetTransformInfo.
///
/// This pass can be constructed from a TTI object which it stores internally
/// and is queried by passes.
class TargetTransformInfoWrapperPass : public ImmutablePass {
TargetIRAnalysis TIRA;
std::optional<TargetTransformInfo> TTI;
virtual void anchor();
public:
static char ID;
/// We must provide a default constructor for the pass but it should
/// never be used.
///
/// Use the constructor below or call one of the creation routines.
TargetTransformInfoWrapperPass();
explicit TargetTransformInfoWrapperPass(TargetIRAnalysis TIRA);
TargetTransformInfo &getTTI(const Function &F);
};
/// Create an analysis pass wrapper around a TTI object.
///
/// This analysis pass just holds the TTI instance and makes it available to
/// clients.
ImmutablePass *createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA);
} // namespace llvm
#endif
PK iwFZ��Sg g Analysis/ConstraintSystem.hnu �[��� //===- ConstraintSystem.h - A system of linear constraints. --------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_CONSTRAINTSYSTEM_H
#define LLVM_ANALYSIS_CONSTRAINTSYSTEM_H
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/MathExtras.h"
#include <string>
namespace llvm {
class Value;
class ConstraintSystem {
struct Entry {
int64_t Coefficient;
uint16_t Id;
Entry(int64_t Coefficient, uint16_t Id)
: Coefficient(Coefficient), Id(Id) {}
};
static int64_t getConstPart(const Entry &E) {
if (E.Id == 0)
return E.Coefficient;
return 0;
}
static int64_t getLastCoefficient(ArrayRef<Entry> Row, uint16_t Id) {
if (Row.empty())
return 0;
if (Row.back().Id == Id)
return Row.back().Coefficient;
return 0;
}
size_t NumVariables = 0;
/// Current linear constraints in the system.
/// An entry of the form c0, c1, ... cn represents the following constraint:
/// c0 >= v0 * c1 + .... + v{n-1} * cn
SmallVector<SmallVector<Entry, 8>, 4> Constraints;
/// A map of variables (IR values) to their corresponding index in the
/// constraint system.
DenseMap<Value *, unsigned> Value2Index;
/// Current greatest common divisor for all coefficients in the system.
uint32_t GCD = 1;
// Eliminate constraints from the system using Fourier–Motzkin elimination.
bool eliminateUsingFM();
/// Returns true if there may be a solution for the constraints in the system.
bool mayHaveSolutionImpl();
/// Get list of variable names from the Value2Index map.
SmallVector<std::string> getVarNamesList() const;
public:
ConstraintSystem() {}
ConstraintSystem(ArrayRef<Value *> FunctionArgs) {
NumVariables += FunctionArgs.size();
for (auto *Arg : FunctionArgs) {
Value2Index.insert({Arg, Value2Index.size() + 1});
}
}
ConstraintSystem(const DenseMap<Value *, unsigned> &Value2Index)
: NumVariables(Value2Index.size()), Value2Index(Value2Index) {}
bool addVariableRow(ArrayRef<int64_t> R) {
assert(Constraints.empty() || R.size() == NumVariables);
// If all variable coefficients are 0, the constraint does not provide any
// usable information.
if (all_of(ArrayRef(R).drop_front(1), [](int64_t C) { return C == 0; }))
return false;
SmallVector<Entry, 4> NewRow;
for (const auto &[Idx, C] : enumerate(R)) {
if (C == 0)
continue;
auto A = std::abs(C);
GCD = APIntOps::GreatestCommonDivisor({32, (uint32_t)A}, {32, GCD})
.getZExtValue();
NewRow.emplace_back(C, Idx);
}
if (Constraints.empty())
NumVariables = R.size();
Constraints.push_back(std::move(NewRow));
return true;
}
DenseMap<Value *, unsigned> &getValue2Index() { return Value2Index; }
const DenseMap<Value *, unsigned> &getValue2Index() const {
return Value2Index;
}
bool addVariableRowFill(ArrayRef<int64_t> R) {
// If all variable coefficients are 0, the constraint does not provide any
// usable information.
if (all_of(ArrayRef(R).drop_front(1), [](int64_t C) { return C == 0; }))
return false;
NumVariables = std::max(R.size(), NumVariables);
return addVariableRow(R);
}
/// Returns true if there may be a solution for the constraints in the system.
bool mayHaveSolution();
static SmallVector<int64_t, 8> negate(SmallVector<int64_t, 8> R) {
// The negated constraint R is obtained by multiplying by -1 and adding 1 to
// the constant.
R[0] += 1;
return negateOrEqual(R);
}
/// Multiplies each coefficient in the given vector by -1. Does not modify the
/// original vector.
///
/// \param R The vector of coefficients to be negated.
static SmallVector<int64_t, 8> negateOrEqual(SmallVector<int64_t, 8> R) {
// The negated constraint R is obtained by multiplying by -1.
for (auto &C : R)
if (MulOverflow(C, int64_t(-1), C))
return {};
return R;
}
/// Converts the given vector to form a strict less than inequality. Does not
/// modify the original vector.
///
/// \param R The vector of coefficients to be converted.
static SmallVector<int64_t, 8> toStrictLessThan(SmallVector<int64_t, 8> R) {
// The strict less than is obtained by subtracting 1 from the constant.
if (SubOverflow(R[0], int64_t(1), R[0])) {
return {};
}
return R;
}
bool isConditionImplied(SmallVector<int64_t, 8> R) const;
SmallVector<int64_t> getLastConstraint() const {
assert(!Constraints.empty() && "Constraint system is empty");
SmallVector<int64_t> Result(NumVariables, 0);
for (auto &Entry : Constraints.back())
Result[Entry.Id] = Entry.Coefficient;
return Result;
}
void popLastConstraint() { Constraints.pop_back(); }
void popLastNVariables(unsigned N) {
assert(NumVariables > N);
NumVariables -= N;
}
/// Returns the number of rows in the constraint system.
unsigned size() const { return Constraints.size(); }
/// Print the constraints in the system.
void dump() const;
};
} // namespace llvm
#endif // LLVM_ANALYSIS_CONSTRAINTSYSTEM_H
PK iwFZ�,�:;= ;= Analysis/ProfileSummaryInfo.hnu �[��� //===- llvm/Analysis/ProfileSummaryInfo.h - profile summary ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains a pass that provides access to profile summary
// information.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_PROFILESUMMARYINFO_H
#define LLVM_ANALYSIS_PROFILESUMMARYINFO_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/Analysis/BlockFrequencyInfo.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/PassManager.h"
#include "llvm/IR/ProfileSummary.h"
#include "llvm/Pass.h"
#include <memory>
#include <optional>
namespace llvm {
class BasicBlock;
class CallBase;
class MachineFunction;
/// Analysis providing profile information.
///
/// This is an immutable analysis pass that provides ability to query global
/// (program-level) profile information. The main APIs are isHotCount and
/// isColdCount that tells whether a given profile count is considered hot/cold
/// based on the profile summary. This also provides convenience methods to
/// check whether a function is hot or cold.
// FIXME: Provide convenience methods to determine hotness/coldness of other IR
// units. This would require making this depend on BFI.
class ProfileSummaryInfo {
private:
const Module *M;
std::unique_ptr<ProfileSummary> Summary;
void computeThresholds();
// Count thresholds to answer isHotCount and isColdCount queries.
std::optional<uint64_t> HotCountThreshold, ColdCountThreshold;
// True if the working set size of the code is considered huge,
// because the number of profile counts required to reach the hot
// percentile is above a huge threshold.
std::optional<bool> HasHugeWorkingSetSize;
// True if the working set size of the code is considered large,
// because the number of profile counts required to reach the hot
// percentile is above a large threshold.
std::optional<bool> HasLargeWorkingSetSize;
// Compute the threshold for a given cutoff.
std::optional<uint64_t> computeThreshold(int PercentileCutoff) const;
// The map that caches the threshold values. The keys are the percentile
// cutoff values and the values are the corresponding threshold values.
mutable DenseMap<int, uint64_t> ThresholdCache;
public:
ProfileSummaryInfo(const Module &M) : M(&M) { refresh(); }
ProfileSummaryInfo(ProfileSummaryInfo &&Arg) = default;
/// If no summary is present, attempt to refresh.
void refresh();
/// Returns true if profile summary is available.
bool hasProfileSummary() const { return Summary != nullptr; }
/// Returns true if module \c M has sample profile.
bool hasSampleProfile() const {
return hasProfileSummary() &&
Summary->getKind() == ProfileSummary::PSK_Sample;
}
/// Returns true if module \c M has instrumentation profile.
bool hasInstrumentationProfile() const {
return hasProfileSummary() &&
Summary->getKind() == ProfileSummary::PSK_Instr;
}
/// Returns true if module \c M has context sensitive instrumentation profile.
bool hasCSInstrumentationProfile() const {
return hasProfileSummary() &&
Summary->getKind() == ProfileSummary::PSK_CSInstr;
}
/// Handle the invalidation of this information.
///
/// When used as a result of \c ProfileSummaryAnalysis this method will be
/// called when the module this was computed for changes. Since profile
/// summary is immutable after it is annotated on the module, we return false
/// here.
bool invalidate(Module &, const PreservedAnalyses &,
ModuleAnalysisManager::Invalidator &) {
return false;
}
/// Returns the profile count for \p CallInst.
std::optional<uint64_t> getProfileCount(const CallBase &CallInst,
BlockFrequencyInfo *BFI,
bool AllowSynthetic = false) const;
/// Returns true if module \c M has partial-profile sample profile.
bool hasPartialSampleProfile() const;
/// Returns true if the working set size of the code is considered huge.
bool hasHugeWorkingSetSize() const;
/// Returns true if the working set size of the code is considered large.
bool hasLargeWorkingSetSize() const;
/// Returns true if \p F has hot function entry. If it returns false, it
/// either means it is not hot or it is unknown whether it is hot or not (for
/// example, no profile data is available).
template <typename FuncT> bool isFunctionEntryHot(const FuncT *F) const {
if (!F || !hasProfileSummary())
return false;
std::optional<Function::ProfileCount> FunctionCount = getEntryCount(F);
// FIXME: The heuristic used below for determining hotness is based on
// preliminary SPEC tuning for inliner. This will eventually be a
// convenience method that calls isHotCount.
return FunctionCount && isHotCount(FunctionCount->getCount());
}
/// Returns true if \p F contains hot code.
template <typename FuncT, typename BFIT>
bool isFunctionHotInCallGraph(const FuncT *F, BFIT &BFI) const {
if (!F || !hasProfileSummary())
return false;
if (auto FunctionCount = getEntryCount(F))
if (isHotCount(FunctionCount->getCount()))
return true;
if (auto TotalCallCount = getTotalCallCount(F))
if (isHotCount(*TotalCallCount))
return true;
for (const auto &BB : *F)
if (isHotBlock(&BB, &BFI))
return true;
return false;
}
/// Returns true if \p F has cold function entry.
bool isFunctionEntryCold(const Function *F) const;
/// Returns true if \p F contains only cold code.
template <typename FuncT, typename BFIT>
bool isFunctionColdInCallGraph(const FuncT *F, BFIT &BFI) const {
if (!F || !hasProfileSummary())
return false;
if (auto FunctionCount = getEntryCount(F))
if (!isColdCount(FunctionCount->getCount()))
return false;
if (auto TotalCallCount = getTotalCallCount(F))
if (!isColdCount(*TotalCallCount))
return false;
for (const auto &BB : *F)
if (!isColdBlock(&BB, &BFI))
return false;
return true;
}
/// Returns true if the hotness of \p F is unknown.
bool isFunctionHotnessUnknown(const Function &F) const;
/// Returns true if \p F contains hot code with regard to a given hot
/// percentile cutoff value.
template <typename FuncT, typename BFIT>
bool isFunctionHotInCallGraphNthPercentile(int PercentileCutoff,
const FuncT *F, BFIT &BFI) const {
return isFunctionHotOrColdInCallGraphNthPercentile<true, FuncT, BFIT>(
PercentileCutoff, F, BFI);
}
/// Returns true if \p F contains cold code with regard to a given cold
/// percentile cutoff value.
template <typename FuncT, typename BFIT>
bool isFunctionColdInCallGraphNthPercentile(int PercentileCutoff,
const FuncT *F, BFIT &BFI) const {
return isFunctionHotOrColdInCallGraphNthPercentile<false, FuncT, BFIT>(
PercentileCutoff, F, BFI);
}
/// Returns true if count \p C is considered hot.
bool isHotCount(uint64_t C) const;
/// Returns true if count \p C is considered cold.
bool isColdCount(uint64_t C) const;
/// Returns true if count \p C is considered hot with regard to a given
/// hot percentile cutoff value.
/// PercentileCutoff is encoded as a 6 digit decimal fixed point number, where
/// the first two digits are the whole part. E.g. 995000 for 99.5 percentile.
bool isHotCountNthPercentile(int PercentileCutoff, uint64_t C) const;
/// Returns true if count \p C is considered cold with regard to a given
/// cold percentile cutoff value.
/// PercentileCutoff is encoded as a 6 digit decimal fixed point number, where
/// the first two digits are the whole part. E.g. 995000 for 99.5 percentile.
bool isColdCountNthPercentile(int PercentileCutoff, uint64_t C) const;
/// Returns true if BasicBlock \p BB is considered hot.
template <typename BBType, typename BFIT>
bool isHotBlock(const BBType *BB, BFIT *BFI) const {
auto Count = BFI->getBlockProfileCount(BB);
return Count && isHotCount(*Count);
}
/// Returns true if BasicBlock \p BB is considered cold.
template <typename BBType, typename BFIT>
bool isColdBlock(const BBType *BB, BFIT *BFI) const {
auto Count = BFI->getBlockProfileCount(BB);
return Count && isColdCount(*Count);
}
template <typename BFIT>
bool isColdBlock(BlockFrequency BlockFreq, const BFIT *BFI) const {
auto Count = BFI->getProfileCountFromFreq(BlockFreq.getFrequency());
return Count && isColdCount(*Count);
}
template <typename BBType, typename BFIT>
bool isHotBlockNthPercentile(int PercentileCutoff, const BBType *BB,
BFIT *BFI) const {
return isHotOrColdBlockNthPercentile<true, BBType, BFIT>(PercentileCutoff,
BB, BFI);
}
template <typename BFIT>
bool isHotBlockNthPercentile(int PercentileCutoff, BlockFrequency BlockFreq,
BFIT *BFI) const {
return isHotOrColdBlockNthPercentile<true, BFIT>(PercentileCutoff,
BlockFreq, BFI);
}
/// Returns true if BasicBlock \p BB is considered cold with regard to a given
/// cold percentile cutoff value.
/// PercentileCutoff is encoded as a 6 digit decimal fixed point number, where
/// the first two digits are the whole part. E.g. 995000 for 99.5 percentile.
template <typename BBType, typename BFIT>
bool isColdBlockNthPercentile(int PercentileCutoff, const BBType *BB,
BFIT *BFI) const {
return isHotOrColdBlockNthPercentile<false, BBType, BFIT>(PercentileCutoff,
BB, BFI);
}
template <typename BFIT>
bool isColdBlockNthPercentile(int PercentileCutoff, BlockFrequency BlockFreq,
BFIT *BFI) const {
return isHotOrColdBlockNthPercentile<false, BFIT>(PercentileCutoff,
BlockFreq, BFI);
}
/// Returns true if the call site \p CB is considered hot.
bool isHotCallSite(const CallBase &CB, BlockFrequencyInfo *BFI) const;
/// Returns true if call site \p CB is considered cold.
bool isColdCallSite(const CallBase &CB, BlockFrequencyInfo *BFI) const;
/// Returns HotCountThreshold if set. Recompute HotCountThreshold
/// if not set.
uint64_t getOrCompHotCountThreshold() const;
/// Returns ColdCountThreshold if set. Recompute HotCountThreshold
/// if not set.
uint64_t getOrCompColdCountThreshold() const;
/// Returns HotCountThreshold if set.
uint64_t getHotCountThreshold() const {
return HotCountThreshold.value_or(0);
}
/// Returns ColdCountThreshold if set.
uint64_t getColdCountThreshold() const {
return ColdCountThreshold.value_or(0);
}
private:
template <typename FuncT>
std::optional<uint64_t> getTotalCallCount(const FuncT *F) const {
return std::nullopt;
}
template <bool isHot, typename FuncT, typename BFIT>
bool isFunctionHotOrColdInCallGraphNthPercentile(int PercentileCutoff,
const FuncT *F,
BFIT &FI) const {
if (!F || !hasProfileSummary())
return false;
if (auto FunctionCount = getEntryCount(F)) {
if (isHot &&
isHotCountNthPercentile(PercentileCutoff, FunctionCount->getCount()))
return true;
if (!isHot && !isColdCountNthPercentile(PercentileCutoff,
FunctionCount->getCount()))
return false;
}
if (auto TotalCallCount = getTotalCallCount(F)) {
if (isHot && isHotCountNthPercentile(PercentileCutoff, *TotalCallCount))
return true;
if (!isHot &&
!isColdCountNthPercentile(PercentileCutoff, *TotalCallCount))
return false;
}
for (const auto &BB : *F) {
if (isHot && isHotBlockNthPercentile(PercentileCutoff, &BB, &FI))
return true;
if (!isHot && !isColdBlockNthPercentile(PercentileCutoff, &BB, &FI))
return false;
}
return !isHot;
}
template <bool isHot>
bool isHotOrColdCountNthPercentile(int PercentileCutoff, uint64_t C) const;
template <bool isHot, typename BBType, typename BFIT>
bool isHotOrColdBlockNthPercentile(int PercentileCutoff, const BBType *BB,
BFIT *BFI) const {
auto Count = BFI->getBlockProfileCount(BB);
if (isHot)
return Count && isHotCountNthPercentile(PercentileCutoff, *Count);
else
return Count && isColdCountNthPercentile(PercentileCutoff, *Count);
}
template <bool isHot, typename BFIT>
bool isHotOrColdBlockNthPercentile(int PercentileCutoff,
BlockFrequency BlockFreq,
BFIT *BFI) const {
auto Count = BFI->getProfileCountFromFreq(BlockFreq.getFrequency());
if (isHot)
return Count && isHotCountNthPercentile(PercentileCutoff, *Count);
else
return Count && isColdCountNthPercentile(PercentileCutoff, *Count);
}
template <typename FuncT>
std::optional<Function::ProfileCount> getEntryCount(const FuncT *F) const {
return F->getEntryCount();
}
};
template <>
inline std::optional<uint64_t>
ProfileSummaryInfo::getTotalCallCount<Function>(const Function *F) const {
if (!hasSampleProfile())
return std::nullopt;
uint64_t TotalCallCount = 0;
for (const auto &BB : *F)
for (const auto &I : BB)
if (isa<CallInst>(I) || isa<InvokeInst>(I))
if (auto CallCount = getProfileCount(cast<CallBase>(I), nullptr))
TotalCallCount += *CallCount;
return TotalCallCount;
}
// Declare template specialization for llvm::MachineFunction. Do not implement
// here, because we cannot include MachineFunction header here, that would break
// dependency rules.
template <>
std::optional<Function::ProfileCount>
ProfileSummaryInfo::getEntryCount<MachineFunction>(
const MachineFunction *F) const;
/// An analysis pass based on legacy pass manager to deliver ProfileSummaryInfo.
class ProfileSummaryInfoWrapperPass : public ImmutablePass {
std::unique_ptr<ProfileSummaryInfo> PSI;
public:
static char ID;
ProfileSummaryInfoWrapperPass();
ProfileSummaryInfo &getPSI() { return *PSI; }
const ProfileSummaryInfo &getPSI() const { return *PSI; }
bool doInitialization(Module &M) override;
bool doFinalization(Module &M) override;
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
}
};
/// An analysis pass based on the new PM to deliver ProfileSummaryInfo.
class ProfileSummaryAnalysis
: public AnalysisInfoMixin<ProfileSummaryAnalysis> {
public:
typedef ProfileSummaryInfo Result;
Result run(Module &M, ModuleAnalysisManager &);
private:
friend AnalysisInfoMixin<ProfileSummaryAnalysis>;
static AnalysisKey Key;
};
/// Printer pass that uses \c ProfileSummaryAnalysis.
class ProfileSummaryPrinterPass
: public PassInfoMixin<ProfileSummaryPrinterPass> {
raw_ostream &OS;
public:
explicit ProfileSummaryPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
};
} // end namespace llvm
#endif
PK iwFZ �C�� �� Analysis/RegionInfo.hnu �[��� //===- RegionInfo.h - SESE region analysis ----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Calculate a program structure tree built out of single entry single exit
// regions.
// The basic ideas are taken from "The Program Structure Tree - Richard Johnson,
// David Pearson, Keshav Pingali - 1994", however enriched with ideas from "The
// Refined Process Structure Tree - Jussi Vanhatalo, Hagen Voelyer, Jana
// Koehler - 2009".
// The algorithm to calculate these data structures however is completely
// different, as it takes advantage of existing information already available
// in (Post)dominace tree and dominance frontier passes. This leads to a simpler
// and in practice hopefully better performing algorithm. The runtime of the
// algorithms described in the papers above are both linear in graph size,
// O(V+E), whereas this algorithm is not, as the dominance frontier information
// itself is not, but in practice runtime seems to be in the order of magnitude
// of dominance tree calculation.
//
// WARNING: LLVM is generally very concerned about compile time such that
// the use of additional analysis passes in the default
// optimization sequence is avoided as much as possible.
// Specifically, if you do not need the RegionInfo, but dominance
// information could be sufficient please base your work only on
// the dominator tree. Most passes maintain it, such that using
// it has often near zero cost. In contrast RegionInfo is by
// default not available, is not maintained by existing
// transformations and there is no intention to do so.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_REGIONINFO_H
#define LLVM_ANALYSIS_REGIONINFO_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DepthFirstIterator.h"
#include "llvm/ADT/GraphTraits.h"
#include "llvm/ADT/PointerIntPair.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/IR/Dominators.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
#include <algorithm>
#include <cassert>
#include <map>
#include <memory>
#include <set>
#include <string>
#include <type_traits>
#include <vector>
namespace llvm {
class BasicBlock;
class DominanceFrontier;
class Loop;
class LoopInfo;
class PostDominatorTree;
class Region;
template <class RegionTr> class RegionBase;
class RegionInfo;
template <class RegionTr> class RegionInfoBase;
class RegionNode;
class raw_ostream;
// Class to be specialized for different users of RegionInfo
// (i.e. BasicBlocks or MachineBasicBlocks). This is only to avoid needing to
// pass around an unreasonable number of template parameters.
template <class FuncT_>
struct RegionTraits {
// FuncT
// BlockT
// RegionT
// RegionNodeT
// RegionInfoT
using BrokenT = typename FuncT_::UnknownRegionTypeError;
};
template <>
struct RegionTraits<Function> {
using FuncT = Function;
using BlockT = BasicBlock;
using RegionT = Region;
using RegionNodeT = RegionNode;
using RegionInfoT = RegionInfo;
using DomTreeT = DominatorTree;
using DomTreeNodeT = DomTreeNode;
using DomFrontierT = DominanceFrontier;
using PostDomTreeT = PostDominatorTree;
using InstT = Instruction;
using LoopT = Loop;
using LoopInfoT = LoopInfo;
static unsigned getNumSuccessors(BasicBlock *BB) {
return BB->getTerminator()->getNumSuccessors();
}
};
/// Marker class to iterate over the elements of a Region in flat mode.
///
/// The class is used to either iterate in Flat mode or by not using it to not
/// iterate in Flat mode. During a Flat mode iteration all Regions are entered
/// and the iteration returns every BasicBlock. If the Flat mode is not
/// selected for SubRegions just one RegionNode containing the subregion is
/// returned.
template <class GraphType>
class FlatIt {};
/// A RegionNode represents a subregion or a BasicBlock that is part of a
/// Region.
template <class Tr>
class RegionNodeBase {
friend class RegionBase<Tr>;
public:
using BlockT = typename Tr::BlockT;
using RegionT = typename Tr::RegionT;
private:
/// This is the entry basic block that starts this region node. If this is a
/// BasicBlock RegionNode, then entry is just the basic block, that this
/// RegionNode represents. Otherwise it is the entry of this (Sub)RegionNode.
///
/// In the BBtoRegionNode map of the parent of this node, BB will always map
/// to this node no matter which kind of node this one is.
///
/// The node can hold either a Region or a BasicBlock.
/// Use one bit to save, if this RegionNode is a subregion or BasicBlock
/// RegionNode.
PointerIntPair<BlockT *, 1, bool> entry;
/// The parent Region of this RegionNode.
/// @see getParent()
RegionT *parent;
protected:
/// Create a RegionNode.
///
/// @param Parent The parent of this RegionNode.
/// @param Entry The entry BasicBlock of the RegionNode. If this
/// RegionNode represents a BasicBlock, this is the
/// BasicBlock itself. If it represents a subregion, this
/// is the entry BasicBlock of the subregion.
/// @param isSubRegion If this RegionNode represents a SubRegion.
inline RegionNodeBase(RegionT *Parent, BlockT *Entry,
bool isSubRegion = false)
: entry(Entry, isSubRegion), parent(Parent) {}
public:
RegionNodeBase(const RegionNodeBase &) = delete;
RegionNodeBase &operator=(const RegionNodeBase &) = delete;
/// Get the parent Region of this RegionNode.
///
/// The parent Region is the Region this RegionNode belongs to. If for
/// example a BasicBlock is element of two Regions, there exist two
/// RegionNodes for this BasicBlock. Each with the getParent() function
/// pointing to the Region this RegionNode belongs to.
///
/// @return Get the parent Region of this RegionNode.
inline RegionT *getParent() const { return parent; }
/// Get the entry BasicBlock of this RegionNode.
///
/// If this RegionNode represents a BasicBlock this is just the BasicBlock
/// itself, otherwise we return the entry BasicBlock of the Subregion
///
/// @return The entry BasicBlock of this RegionNode.
inline BlockT *getEntry() const { return entry.getPointer(); }
/// Get the content of this RegionNode.
///
/// This can be either a BasicBlock or a subregion. Before calling getNodeAs()
/// check the type of the content with the isSubRegion() function call.
///
/// @return The content of this RegionNode.
template <class T> inline T *getNodeAs() const;
/// Is this RegionNode a subregion?
///
/// @return True if it contains a subregion. False if it contains a
/// BasicBlock.
inline bool isSubRegion() const { return entry.getInt(); }
};
//===----------------------------------------------------------------------===//
/// A single entry single exit Region.
///
/// A Region is a connected subgraph of a control flow graph that has exactly
/// two connections to the remaining graph. It can be used to analyze or
/// optimize parts of the control flow graph.
///
/// A <em> simple Region </em> is connected to the remaining graph by just two
/// edges. One edge entering the Region and another one leaving the Region.
///
/// An <em> extended Region </em> (or just Region) is a subgraph that can be
/// transform into a simple Region. The transformation is done by adding
/// BasicBlocks that merge several entry or exit edges so that after the merge
/// just one entry and one exit edge exists.
///
/// The \e Entry of a Region is the first BasicBlock that is passed after
/// entering the Region. It is an element of the Region. The entry BasicBlock
/// dominates all BasicBlocks in the Region.
///
/// The \e Exit of a Region is the first BasicBlock that is passed after
/// leaving the Region. It is not an element of the Region. The exit BasicBlock,
/// postdominates all BasicBlocks in the Region.
///
/// A <em> canonical Region </em> cannot be constructed by combining smaller
/// Regions.
///
/// Region A is the \e parent of Region B, if B is completely contained in A.
///
/// Two canonical Regions either do not intersect at all or one is
/// the parent of the other.
///
/// The <em> Program Structure Tree</em> is a graph (V, E) where V is the set of
/// Regions in the control flow graph and E is the \e parent relation of these
/// Regions.
///
/// Example:
///
/// \verbatim
/// A simple control flow graph, that contains two regions.
///
/// 1
/// / |
/// 2 |
/// / \ 3
/// 4 5 |
/// | | |
/// 6 7 8
/// \ | /
/// \ |/ Region A: 1 -> 9 {1,2,3,4,5,6,7,8}
/// 9 Region B: 2 -> 9 {2,4,5,6,7}
/// \endverbatim
///
/// You can obtain more examples by either calling
///
/// <tt> "opt -passes='print<regions>' anyprogram.ll" </tt>
/// or
/// <tt> "opt -view-regions-only anyprogram.ll" </tt>
///
/// on any LLVM file you are interested in.
///
/// The first call returns a textual representation of the program structure
/// tree, the second one creates a graphical representation using graphviz.
template <class Tr>
class RegionBase : public RegionNodeBase<Tr> {
friend class RegionInfoBase<Tr>;
using FuncT = typename Tr::FuncT;
using BlockT = typename Tr::BlockT;
using RegionInfoT = typename Tr::RegionInfoT;
using RegionT = typename Tr::RegionT;
using RegionNodeT = typename Tr::RegionNodeT;
using DomTreeT = typename Tr::DomTreeT;
using LoopT = typename Tr::LoopT;
using LoopInfoT = typename Tr::LoopInfoT;
using InstT = typename Tr::InstT;
using BlockTraits = GraphTraits<BlockT *>;
using InvBlockTraits = GraphTraits<Inverse<BlockT *>>;
using SuccIterTy = typename BlockTraits::ChildIteratorType;
using PredIterTy = typename InvBlockTraits::ChildIteratorType;
// Information necessary to manage this Region.
RegionInfoT *RI;
DomTreeT *DT;
// The exit BasicBlock of this region.
// (The entry BasicBlock is part of RegionNode)
BlockT *exit;
using RegionSet = std::vector<std::unique_ptr<RegionT>>;
// The subregions of this region.
RegionSet children;
using BBNodeMapT = std::map<BlockT *, std::unique_ptr<RegionNodeT>>;
// Save the BasicBlock RegionNodes that are element of this Region.
mutable BBNodeMapT BBNodeMap;
/// Check if a BB is in this Region. This check also works
/// if the region is incorrectly built. (EXPENSIVE!)
void verifyBBInRegion(BlockT *BB) const;
/// Walk over all the BBs of the region starting from BB and
/// verify that all reachable basic blocks are elements of the region.
/// (EXPENSIVE!)
void verifyWalk(BlockT *BB, std::set<BlockT *> *visitedBB) const;
/// Verify if the region and its children are valid regions (EXPENSIVE!)
void verifyRegionNest() const;
public:
/// Create a new region.
///
/// @param Entry The entry basic block of the region.
/// @param Exit The exit basic block of the region.
/// @param RI The region info object that is managing this region.
/// @param DT The dominator tree of the current function.
/// @param Parent The surrounding region or NULL if this is a top level
/// region.
RegionBase(BlockT *Entry, BlockT *Exit, RegionInfoT *RI, DomTreeT *DT,
RegionT *Parent = nullptr);
RegionBase(const RegionBase &) = delete;
RegionBase &operator=(const RegionBase &) = delete;
/// Delete the Region and all its subregions.
~RegionBase();
/// Get the entry BasicBlock of the Region.
/// @return The entry BasicBlock of the region.
BlockT *getEntry() const {
return RegionNodeBase<Tr>::getEntry();
}
/// Replace the entry basic block of the region with the new basic
/// block.
///
/// @param BB The new entry basic block of the region.
void replaceEntry(BlockT *BB);
/// Replace the exit basic block of the region with the new basic
/// block.
///
/// @param BB The new exit basic block of the region.
void replaceExit(BlockT *BB);
/// Recursively replace the entry basic block of the region.
///
/// This function replaces the entry basic block with a new basic block. It
/// also updates all child regions that have the same entry basic block as
/// this region.
///
/// @param NewEntry The new entry basic block.
void replaceEntryRecursive(BlockT *NewEntry);
/// Recursively replace the exit basic block of the region.
///
/// This function replaces the exit basic block with a new basic block. It
/// also updates all child regions that have the same exit basic block as
/// this region.
///
/// @param NewExit The new exit basic block.
void replaceExitRecursive(BlockT *NewExit);
/// Get the exit BasicBlock of the Region.
/// @return The exit BasicBlock of the Region, NULL if this is the TopLevel
/// Region.
BlockT *getExit() const { return exit; }
/// Get the parent of the Region.
/// @return The parent of the Region or NULL if this is a top level
/// Region.
RegionT *getParent() const {
return RegionNodeBase<Tr>::getParent();
}
/// Get the RegionNode representing the current Region.
/// @return The RegionNode representing the current Region.
RegionNodeT *getNode() const {
return const_cast<RegionNodeT *>(
reinterpret_cast<const RegionNodeT *>(this));
}
/// Get the nesting level of this Region.
///
/// An toplevel Region has depth 0.
///
/// @return The depth of the region.
unsigned getDepth() const;
/// Check if a Region is the TopLevel region.
///
/// The toplevel region represents the whole function.
bool isTopLevelRegion() const { return exit == nullptr; }
/// Return a new (non-canonical) region, that is obtained by joining
/// this region with its predecessors.
///
/// @return A region also starting at getEntry(), but reaching to the next
/// basic block that forms with getEntry() a (non-canonical) region.
/// NULL if such a basic block does not exist.
RegionT *getExpandedRegion() const;
/// Return the first block of this region's single entry edge,
/// if existing.
///
/// @return The BasicBlock starting this region's single entry edge,
/// else NULL.
BlockT *getEnteringBlock() const;
/// Return the first block of this region's single exit edge,
/// if existing.
///
/// @return The BasicBlock starting this region's single exit edge,
/// else NULL.
BlockT *getExitingBlock() const;
/// Collect all blocks of this region's single exit edge, if existing.
///
/// @return True if this region contains all the predecessors of the exit.
bool getExitingBlocks(SmallVectorImpl<BlockT *> &Exitings) const;
/// Is this a simple region?
///
/// A region is simple if it has exactly one exit and one entry edge.
///
/// @return True if the Region is simple.
bool isSimple() const;
/// Returns the name of the Region.
/// @return The Name of the Region.
std::string getNameStr() const;
/// Return the RegionInfo object, that belongs to this Region.
RegionInfoT *getRegionInfo() const { return RI; }
/// PrintStyle - Print region in difference ways.
enum PrintStyle { PrintNone, PrintBB, PrintRN };
/// Print the region.
///
/// @param OS The output stream the Region is printed to.
/// @param printTree Print also the tree of subregions.
/// @param level The indentation level used for printing.
void print(raw_ostream &OS, bool printTree = true, unsigned level = 0,
PrintStyle Style = PrintNone) const;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
/// Print the region to stderr.
void dump() const;
#endif
/// Check if the region contains a BasicBlock.
///
/// @param BB The BasicBlock that might be contained in this Region.
/// @return True if the block is contained in the region otherwise false.
bool contains(const BlockT *BB) const;
/// Check if the region contains another region.
///
/// @param SubRegion The region that might be contained in this Region.
/// @return True if SubRegion is contained in the region otherwise false.
bool contains(const RegionT *SubRegion) const {
// Toplevel Region.
if (!getExit())
return true;
return contains(SubRegion->getEntry()) &&
(contains(SubRegion->getExit()) ||
SubRegion->getExit() == getExit());
}
/// Check if the region contains an Instruction.
///
/// @param Inst The Instruction that might be contained in this region.
/// @return True if the Instruction is contained in the region otherwise
/// false.
bool contains(const InstT *Inst) const { return contains(Inst->getParent()); }
/// Check if the region contains a loop.
///
/// @param L The loop that might be contained in this region.
/// @return True if the loop is contained in the region otherwise false.
/// In case a NULL pointer is passed to this function the result
/// is false, except for the region that describes the whole function.
/// In that case true is returned.
bool contains(const LoopT *L) const;
/// Get the outermost loop in the region that contains a loop.
///
/// Find for a Loop L the outermost loop OuterL that is a parent loop of L
/// and is itself contained in the region.
///
/// @param L The loop the lookup is started.
/// @return The outermost loop in the region, NULL if such a loop does not
/// exist or if the region describes the whole function.
LoopT *outermostLoopInRegion(LoopT *L) const;
/// Get the outermost loop in the region that contains a basic block.
///
/// Find for a basic block BB the outermost loop L that contains BB and is
/// itself contained in the region.
///
/// @param LI A pointer to a LoopInfo analysis.
/// @param BB The basic block surrounded by the loop.
/// @return The outermost loop in the region, NULL if such a loop does not
/// exist or if the region describes the whole function.
LoopT *outermostLoopInRegion(LoopInfoT *LI, BlockT *BB) const;
/// Get the subregion that starts at a BasicBlock
///
/// @param BB The BasicBlock the subregion should start.
/// @return The Subregion if available, otherwise NULL.
RegionT *getSubRegionNode(BlockT *BB) const;
/// Get the RegionNode for a BasicBlock
///
/// @param BB The BasicBlock at which the RegionNode should start.
/// @return If available, the RegionNode that represents the subregion
/// starting at BB. If no subregion starts at BB, the RegionNode
/// representing BB.
RegionNodeT *getNode(BlockT *BB) const;
/// Get the BasicBlock RegionNode for a BasicBlock
///
/// @param BB The BasicBlock for which the RegionNode is requested.
/// @return The RegionNode representing the BB.
RegionNodeT *getBBNode(BlockT *BB) const;
/// Add a new subregion to this Region.
///
/// @param SubRegion The new subregion that will be added.
/// @param moveChildren Move the children of this region, that are also
/// contained in SubRegion into SubRegion.
void addSubRegion(RegionT *SubRegion, bool moveChildren = false);
/// Remove a subregion from this Region.
///
/// The subregion is not deleted, as it will probably be inserted into another
/// region.
/// @param SubRegion The SubRegion that will be removed.
RegionT *removeSubRegion(RegionT *SubRegion);
/// Move all direct child nodes of this Region to another Region.
///
/// @param To The Region the child nodes will be transferred to.
void transferChildrenTo(RegionT *To);
/// Verify if the region is a correct region.
///
/// Check if this is a correctly build Region. This is an expensive check, as
/// the complete CFG of the Region will be walked.
void verifyRegion() const;
/// Clear the cache for BB RegionNodes.
///
/// After calling this function the BasicBlock RegionNodes will be stored at
/// different memory locations. RegionNodes obtained before this function is
/// called are therefore not comparable to RegionNodes abtained afterwords.
void clearNodeCache();
/// @name Subregion Iterators
///
/// These iterators iterator over all subregions of this Region.
//@{
using iterator = typename RegionSet::iterator;
using const_iterator = typename RegionSet::const_iterator;
iterator begin() { return children.begin(); }
iterator end() { return children.end(); }
const_iterator begin() const { return children.begin(); }
const_iterator end() const { return children.end(); }
//@}
/// @name BasicBlock Iterators
///
/// These iterators iterate over all BasicBlocks that are contained in this
/// Region. The iterator also iterates over BasicBlocks that are elements of
/// a subregion of this Region. It is therefore called a flat iterator.
//@{
template <bool IsConst>
class block_iterator_wrapper
: public df_iterator<
std::conditional_t<IsConst, const BlockT, BlockT> *> {
using super =
df_iterator<std::conditional_t<IsConst, const BlockT, BlockT> *>;
public:
using Self = block_iterator_wrapper<IsConst>;
using value_type = typename super::value_type;
// Construct the begin iterator.
block_iterator_wrapper(value_type Entry, value_type Exit)
: super(df_begin(Entry)) {
// Mark the exit of the region as visited, so that the children of the
// exit and the exit itself, i.e. the block outside the region will never
// be visited.
super::Visited.insert(Exit);
}
// Construct the end iterator.
block_iterator_wrapper() : super(df_end<value_type>((BlockT *)nullptr)) {}
/*implicit*/ block_iterator_wrapper(super I) : super(I) {}
// FIXME: Even a const_iterator returns a non-const BasicBlock pointer.
// This was introduced for backwards compatibility, but should
// be removed as soon as all users are fixed.
BlockT *operator*() const {
return const_cast<BlockT *>(super::operator*());
}
};
using block_iterator = block_iterator_wrapper<false>;
using const_block_iterator = block_iterator_wrapper<true>;
block_iterator block_begin() { return block_iterator(getEntry(), getExit()); }
block_iterator block_end() { return block_iterator(); }
const_block_iterator block_begin() const {
return const_block_iterator(getEntry(), getExit());
}
const_block_iterator block_end() const { return const_block_iterator(); }
using block_range = iterator_range<block_iterator>;
using const_block_range = iterator_range<const_block_iterator>;
/// Returns a range view of the basic blocks in the region.
inline block_range blocks() {
return block_range(block_begin(), block_end());
}
/// Returns a range view of the basic blocks in the region.
///
/// This is the 'const' version of the range view.
inline const_block_range blocks() const {
return const_block_range(block_begin(), block_end());
}
//@}
/// @name Element Iterators
///
/// These iterators iterate over all BasicBlock and subregion RegionNodes that
/// are direct children of this Region. It does not iterate over any
/// RegionNodes that are also element of a subregion of this Region.
//@{
using element_iterator =
df_iterator<RegionNodeT *, df_iterator_default_set<RegionNodeT *>, false,
GraphTraits<RegionNodeT *>>;
using const_element_iterator =
df_iterator<const RegionNodeT *,
df_iterator_default_set<const RegionNodeT *>, false,
GraphTraits<const RegionNodeT *>>;
element_iterator element_begin();
element_iterator element_end();
iterator_range<element_iterator> elements() {
return make_range(element_begin(), element_end());
}
const_element_iterator element_begin() const;
const_element_iterator element_end() const;
iterator_range<const_element_iterator> elements() const {
return make_range(element_begin(), element_end());
}
//@}
};
/// Print a RegionNode.
template <class Tr>
inline raw_ostream &operator<<(raw_ostream &OS, const RegionNodeBase<Tr> &Node);
//===----------------------------------------------------------------------===//
/// Analysis that detects all canonical Regions.
///
/// The RegionInfo pass detects all canonical regions in a function. The Regions
/// are connected using the parent relation. This builds a Program Structure
/// Tree.
template <class Tr>
class RegionInfoBase {
friend class RegionInfo;
friend class MachineRegionInfo;
using BlockT = typename Tr::BlockT;
using FuncT = typename Tr::FuncT;
using RegionT = typename Tr::RegionT;
using RegionInfoT = typename Tr::RegionInfoT;
using DomTreeT = typename Tr::DomTreeT;
using DomTreeNodeT = typename Tr::DomTreeNodeT;
using PostDomTreeT = typename Tr::PostDomTreeT;
using DomFrontierT = typename Tr::DomFrontierT;
using BlockTraits = GraphTraits<BlockT *>;
using InvBlockTraits = GraphTraits<Inverse<BlockT *>>;
using SuccIterTy = typename BlockTraits::ChildIteratorType;
using PredIterTy = typename InvBlockTraits::ChildIteratorType;
using BBtoBBMap = DenseMap<BlockT *, BlockT *>;
using BBtoRegionMap = DenseMap<BlockT *, RegionT *>;
RegionInfoBase();
RegionInfoBase(RegionInfoBase &&Arg)
: DT(std::move(Arg.DT)), PDT(std::move(Arg.PDT)), DF(std::move(Arg.DF)),
TopLevelRegion(std::move(Arg.TopLevelRegion)),
BBtoRegion(std::move(Arg.BBtoRegion)) {
Arg.wipe();
}
RegionInfoBase &operator=(RegionInfoBase &&RHS) {
DT = std::move(RHS.DT);
PDT = std::move(RHS.PDT);
DF = std::move(RHS.DF);
TopLevelRegion = std::move(RHS.TopLevelRegion);
BBtoRegion = std::move(RHS.BBtoRegion);
RHS.wipe();
return *this;
}
virtual ~RegionInfoBase();
DomTreeT *DT;
PostDomTreeT *PDT;
DomFrontierT *DF;
/// The top level region.
RegionT *TopLevelRegion = nullptr;
/// Map every BB to the smallest region, that contains BB.
BBtoRegionMap BBtoRegion;
protected:
/// Update refences to a RegionInfoT held by the RegionT managed here
///
/// This is a post-move helper. Regions hold references to the owning
/// RegionInfo object. After a move these need to be fixed.
template<typename TheRegionT>
void updateRegionTree(RegionInfoT &RI, TheRegionT *R) {
if (!R)
return;
R->RI = &RI;
for (auto &SubR : *R)
updateRegionTree(RI, SubR.get());
}
private:
/// Wipe this region tree's state without releasing any resources.
///
/// This is essentially a post-move helper only. It leaves the object in an
/// assignable and destroyable state, but otherwise invalid.
void wipe() {
DT = nullptr;
PDT = nullptr;
DF = nullptr;
TopLevelRegion = nullptr;
BBtoRegion.clear();
}
// Check whether the entries of BBtoRegion for the BBs of region
// SR are correct. Triggers an assertion if not. Calls itself recursively for
// subregions.
void verifyBBMap(const RegionT *SR) const;
// Returns true if BB is in the dominance frontier of
// entry, because it was inherited from exit. In the other case there is an
// edge going from entry to BB without passing exit.
bool isCommonDomFrontier(BlockT *BB, BlockT *entry, BlockT *exit) const;
// Check if entry and exit surround a valid region, based on
// dominance tree and dominance frontier.
bool isRegion(BlockT *entry, BlockT *exit) const;
// Saves a shortcut pointing from entry to exit.
// This function may extend this shortcut if possible.
void insertShortCut(BlockT *entry, BlockT *exit, BBtoBBMap *ShortCut) const;
// Returns the next BB that postdominates N, while skipping
// all post dominators that cannot finish a canonical region.
DomTreeNodeT *getNextPostDom(DomTreeNodeT *N, BBtoBBMap *ShortCut) const;
// A region is trivial, if it contains only one BB.
bool isTrivialRegion(BlockT *entry, BlockT *exit) const;
// Creates a single entry single exit region.
RegionT *createRegion(BlockT *entry, BlockT *exit);
// Detect all regions starting with bb 'entry'.
void findRegionsWithEntry(BlockT *entry, BBtoBBMap *ShortCut);
// Detects regions in F.
void scanForRegions(FuncT &F, BBtoBBMap *ShortCut);
// Get the top most parent with the same entry block.
RegionT *getTopMostParent(RegionT *region);
// Build the region hierarchy after all region detected.
void buildRegionsTree(DomTreeNodeT *N, RegionT *region);
// Update statistic about created regions.
virtual void updateStatistics(RegionT *R) = 0;
// Detect all regions in function and build the region tree.
void calculate(FuncT &F);
public:
RegionInfoBase(const RegionInfoBase &) = delete;
RegionInfoBase &operator=(const RegionInfoBase &) = delete;
static bool VerifyRegionInfo;
static typename RegionT::PrintStyle printStyle;
void print(raw_ostream &OS) const;
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
void dump() const;
#endif
void releaseMemory();
/// Get the smallest region that contains a BasicBlock.
///
/// @param BB The basic block.
/// @return The smallest region, that contains BB or NULL, if there is no
/// region containing BB.
RegionT *getRegionFor(BlockT *BB) const;
/// Set the smallest region that surrounds a basic block.
///
/// @param BB The basic block surrounded by a region.
/// @param R The smallest region that surrounds BB.
void setRegionFor(BlockT *BB, RegionT *R);
/// A shortcut for getRegionFor().
///
/// @param BB The basic block.
/// @return The smallest region, that contains BB or NULL, if there is no
/// region containing BB.
RegionT *operator[](BlockT *BB) const;
/// Return the exit of the maximal refined region, that starts at a
/// BasicBlock.
///
/// @param BB The BasicBlock the refined region starts.
BlockT *getMaxRegionExit(BlockT *BB) const;
/// Find the smallest region that contains two regions.
///
/// @param A The first region.
/// @param B The second region.
/// @return The smallest region containing A and B.
RegionT *getCommonRegion(RegionT *A, RegionT *B) const;
/// Find the smallest region that contains two basic blocks.
///
/// @param A The first basic block.
/// @param B The second basic block.
/// @return The smallest region that contains A and B.
RegionT *getCommonRegion(BlockT *A, BlockT *B) const {
return getCommonRegion(getRegionFor(A), getRegionFor(B));
}
/// Find the smallest region that contains a set of regions.
///
/// @param Regions A vector of regions.
/// @return The smallest region that contains all regions in Regions.
RegionT *getCommonRegion(SmallVectorImpl<RegionT *> &Regions) const;
/// Find the smallest region that contains a set of basic blocks.
///
/// @param BBs A vector of basic blocks.
/// @return The smallest region that contains all basic blocks in BBS.
RegionT *getCommonRegion(SmallVectorImpl<BlockT *> &BBs) const;
RegionT *getTopLevelRegion() const { return TopLevelRegion; }
/// Clear the Node Cache for all Regions.
///
/// @see Region::clearNodeCache()
void clearNodeCache() {
if (TopLevelRegion)
TopLevelRegion->clearNodeCache();
}
void verifyAnalysis() const;
};
class RegionNode : public RegionNodeBase<RegionTraits<Function>> {
public:
inline RegionNode(Region *Parent, BasicBlock *Entry, bool isSubRegion = false)
: RegionNodeBase<RegionTraits<Function>>(Parent, Entry, isSubRegion) {}
bool operator==(const Region &RN) const {
return this == reinterpret_cast<const RegionNode *>(&RN);
}
};
class Region : public RegionBase<RegionTraits<Function>> {
public:
Region(BasicBlock *Entry, BasicBlock *Exit, RegionInfo *RI, DominatorTree *DT,
Region *Parent = nullptr);
~Region();
bool operator==(const RegionNode &RN) const {
return &RN == reinterpret_cast<const RegionNode *>(this);
}
};
class RegionInfo : public RegionInfoBase<RegionTraits<Function>> {
public:
using Base = RegionInfoBase<RegionTraits<Function>>;
explicit RegionInfo();
RegionInfo(RegionInfo &&Arg) : Base(std::move(static_cast<Base &>(Arg))) {
updateRegionTree(*this, TopLevelRegion);
}
RegionInfo &operator=(RegionInfo &&RHS) {
Base::operator=(std::move(static_cast<Base &>(RHS)));
updateRegionTree(*this, TopLevelRegion);
return *this;
}
~RegionInfo() override;
/// Handle invalidation explicitly.
bool invalidate(Function &F, const PreservedAnalyses &PA,
FunctionAnalysisManager::Invalidator &);
// updateStatistics - Update statistic about created regions.
void updateStatistics(Region *R) final;
void recalculate(Function &F, DominatorTree *DT, PostDominatorTree *PDT,
DominanceFrontier *DF);
#ifndef NDEBUG
/// Opens a viewer to show the GraphViz visualization of the regions.
///
/// Useful during debugging as an alternative to dump().
void view();
/// Opens a viewer to show the GraphViz visualization of this region
/// without instructions in the BasicBlocks.
///
/// Useful during debugging as an alternative to dump().
void viewOnly();
#endif
};
class RegionInfoPass : public FunctionPass {
RegionInfo RI;
public:
static char ID;
explicit RegionInfoPass();
~RegionInfoPass() override;
RegionInfo &getRegionInfo() { return RI; }
const RegionInfo &getRegionInfo() const { return RI; }
/// @name FunctionPass interface
//@{
bool runOnFunction(Function &F) override;
void releaseMemory() override;
void verifyAnalysis() const override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
void print(raw_ostream &OS, const Module *) const override;
void dump() const;
//@}
};
/// Analysis pass that exposes the \c RegionInfo for a function.
class RegionInfoAnalysis : public AnalysisInfoMixin<RegionInfoAnalysis> {
friend AnalysisInfoMixin<RegionInfoAnalysis>;
static AnalysisKey Key;
public:
using Result = RegionInfo;
RegionInfo run(Function &F, FunctionAnalysisManager &AM);
};
/// Printer pass for the \c RegionInfo.
class RegionInfoPrinterPass : public PassInfoMixin<RegionInfoPrinterPass> {
raw_ostream &OS;
public:
explicit RegionInfoPrinterPass(raw_ostream &OS);
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
/// Verifier pass for the \c RegionInfo.
struct RegionInfoVerifierPass : PassInfoMixin<RegionInfoVerifierPass> {
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
template <>
template <>
inline BasicBlock *
RegionNodeBase<RegionTraits<Function>>::getNodeAs<BasicBlock>() const {
assert(!isSubRegion() && "This is not a BasicBlock RegionNode!");
return getEntry();
}
template <>
template <>
inline Region *
RegionNodeBase<RegionTraits<Function>>::getNodeAs<Region>() const {
assert(isSubRegion() && "This is not a subregion RegionNode!");
auto Unconst = const_cast<RegionNodeBase<RegionTraits<Function>> *>(this);
return reinterpret_cast<Region *>(Unconst);
}
template <class Tr>
inline raw_ostream &operator<<(raw_ostream &OS,
const RegionNodeBase<Tr> &Node) {
using BlockT = typename Tr::BlockT;
using RegionT = typename Tr::RegionT;
if (Node.isSubRegion())
return OS << Node.template getNodeAs<RegionT>()->getNameStr();
else
return OS << Node.template getNodeAs<BlockT>()->getName();
}
extern template class RegionBase<RegionTraits<Function>>;
extern template class RegionNodeBase<RegionTraits<Function>>;
extern template class RegionInfoBase<RegionTraits<Function>>;
} // end namespace llvm
#endif // LLVM_ANALYSIS_REGIONINFO_H
PK iwFZQ*
:�� �� Analysis/LazyCallGraph.hnu �[��� //===- LazyCallGraph.h - Analysis of a Module's call graph ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
///
/// Implements a lazy call graph analysis and related passes for the new pass
/// manager.
///
/// NB: This is *not* a traditional call graph! It is a graph which models both
/// the current calls and potential calls. As a consequence there are many
/// edges in this call graph that do not correspond to a 'call' or 'invoke'
/// instruction.
///
/// The primary use cases of this graph analysis is to facilitate iterating
/// across the functions of a module in ways that ensure all callees are
/// visited prior to a caller (given any SCC constraints), or vice versa. As
/// such is it particularly well suited to organizing CGSCC optimizations such
/// as inlining, outlining, argument promotion, etc. That is its primary use
/// case and motivates the design. It may not be appropriate for other
/// purposes. The use graph of functions or some other conservative analysis of
/// call instructions may be interesting for optimizations and subsequent
/// analyses which don't work in the context of an overly specified
/// potential-call-edge graph.
///
/// To understand the specific rules and nature of this call graph analysis,
/// see the documentation of the \c LazyCallGraph below.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_LAZYCALLGRAPH_H
#define LLVM_ANALYSIS_LAZYCALLGRAPH_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/PointerIntPair.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/Analysis/TargetLibraryInfo.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Support/Allocator.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <iterator>
#include <optional>
#include <string>
#include <utility>
namespace llvm {
class Constant;
class Function;
template <class GraphType> struct GraphTraits;
class Module;
class TargetLibraryInfo;
class Value;
/// A lazily constructed view of the call graph of a module.
///
/// With the edges of this graph, the motivating constraint that we are
/// attempting to maintain is that function-local optimization, CGSCC-local
/// optimizations, and optimizations transforming a pair of functions connected
/// by an edge in the graph, do not invalidate a bottom-up traversal of the SCC
/// DAG. That is, no optimizations will delete, remove, or add an edge such
/// that functions already visited in a bottom-up order of the SCC DAG are no
/// longer valid to have visited, or such that functions not yet visited in
/// a bottom-up order of the SCC DAG are not required to have already been
/// visited.
///
/// Within this constraint, the desire is to minimize the merge points of the
/// SCC DAG. The greater the fanout of the SCC DAG and the fewer merge points
/// in the SCC DAG, the more independence there is in optimizing within it.
/// There is a strong desire to enable parallelization of optimizations over
/// the call graph, and both limited fanout and merge points will (artificially
/// in some cases) limit the scaling of such an effort.
///
/// To this end, graph represents both direct and any potential resolution to
/// an indirect call edge. Another way to think about it is that it represents
/// both the direct call edges and any direct call edges that might be formed
/// through static optimizations. Specifically, it considers taking the address
/// of a function to be an edge in the call graph because this might be
/// forwarded to become a direct call by some subsequent function-local
/// optimization. The result is that the graph closely follows the use-def
/// edges for functions. Walking "up" the graph can be done by looking at all
/// of the uses of a function.
///
/// The roots of the call graph are the external functions and functions
/// escaped into global variables. Those functions can be called from outside
/// of the module or via unknowable means in the IR -- we may not be able to
/// form even a potential call edge from a function body which may dynamically
/// load the function and call it.
///
/// This analysis still requires updates to remain valid after optimizations
/// which could potentially change the set of potential callees. The
/// constraints it operates under only make the traversal order remain valid.
///
/// The entire analysis must be re-computed if full interprocedural
/// optimizations run at any point. For example, globalopt completely
/// invalidates the information in this analysis.
///
/// FIXME: This class is named LazyCallGraph in a lame attempt to distinguish
/// it from the existing CallGraph. At some point, it is expected that this
/// will be the only call graph and it will be renamed accordingly.
class LazyCallGraph {
public:
class Node;
class EdgeSequence;
class SCC;
class RefSCC;
/// A class used to represent edges in the call graph.
///
/// The lazy call graph models both *call* edges and *reference* edges. Call
/// edges are much what you would expect, and exist when there is a 'call' or
/// 'invoke' instruction of some function. Reference edges are also tracked
/// along side these, and exist whenever any instruction (transitively
/// through its operands) references a function. All call edges are
/// inherently reference edges, and so the reference graph forms a superset
/// of the formal call graph.
///
/// All of these forms of edges are fundamentally represented as outgoing
/// edges. The edges are stored in the source node and point at the target
/// node. This allows the edge structure itself to be a very compact data
/// structure: essentially a tagged pointer.
class Edge {
public:
/// The kind of edge in the graph.
enum Kind : bool { Ref = false, Call = true };
Edge();
explicit Edge(Node &N, Kind K);
/// Test whether the edge is null.
///
/// This happens when an edge has been deleted. We leave the edge objects
/// around but clear them.
explicit operator bool() const;
/// Returns the \c Kind of the edge.
Kind getKind() const;
/// Test whether the edge represents a direct call to a function.
///
/// This requires that the edge is not null.
bool isCall() const;
/// Get the call graph node referenced by this edge.
///
/// This requires that the edge is not null.
Node &getNode() const;
/// Get the function referenced by this edge.
///
/// This requires that the edge is not null.
Function &getFunction() const;
private:
friend class LazyCallGraph::EdgeSequence;
friend class LazyCallGraph::RefSCC;
PointerIntPair<Node *, 1, Kind> Value;
void setKind(Kind K) { Value.setInt(K); }
};
/// The edge sequence object.
///
/// This typically exists entirely within the node but is exposed as
/// a separate type because a node doesn't initially have edges. An explicit
/// population step is required to produce this sequence at first and it is
/// then cached in the node. It is also used to represent edges entering the
/// graph from outside the module to model the graph's roots.
///
/// The sequence itself both iterable and indexable. The indexes remain
/// stable even as the sequence mutates (including removal).
class EdgeSequence {
friend class LazyCallGraph;
friend class LazyCallGraph::Node;
friend class LazyCallGraph::RefSCC;
using VectorT = SmallVector<Edge, 4>;
using VectorImplT = SmallVectorImpl<Edge>;
public:
/// An iterator used for the edges to both entry nodes and child nodes.
class iterator
: public iterator_adaptor_base<iterator, VectorImplT::iterator,
std::forward_iterator_tag> {
friend class LazyCallGraph;
friend class LazyCallGraph::Node;
VectorImplT::iterator E;
// Build the iterator for a specific position in the edge list.
iterator(VectorImplT::iterator BaseI, VectorImplT::iterator E)
: iterator_adaptor_base(BaseI), E(E) {
while (I != E && !*I)
++I;
}
public:
iterator() = default;
using iterator_adaptor_base::operator++;
iterator &operator++() {
do {
++I;
} while (I != E && !*I);
return *this;
}
};
/// An iterator over specifically call edges.
///
/// This has the same iteration properties as the \c iterator, but
/// restricts itself to edges which represent actual calls.
class call_iterator
: public iterator_adaptor_base<call_iterator, VectorImplT::iterator,
std::forward_iterator_tag> {
friend class LazyCallGraph;
friend class LazyCallGraph::Node;
VectorImplT::iterator E;
/// Advance the iterator to the next valid, call edge.
void advanceToNextEdge() {
while (I != E && (!*I || !I->isCall()))
++I;
}
// Build the iterator for a specific position in the edge list.
call_iterator(VectorImplT::iterator BaseI, VectorImplT::iterator E)
: iterator_adaptor_base(BaseI), E(E) {
advanceToNextEdge();
}
public:
call_iterator() = default;
using iterator_adaptor_base::operator++;
call_iterator &operator++() {
++I;
advanceToNextEdge();
return *this;
}
};
iterator begin() { return iterator(Edges.begin(), Edges.end()); }
iterator end() { return iterator(Edges.end(), Edges.end()); }
Edge &operator[](Node &N) {
assert(EdgeIndexMap.contains(&N) && "No such edge!");
auto &E = Edges[EdgeIndexMap.find(&N)->second];
assert(E && "Dead or null edge!");
return E;
}
Edge *lookup(Node &N) {
auto EI = EdgeIndexMap.find(&N);
if (EI == EdgeIndexMap.end())
return nullptr;
auto &E = Edges[EI->second];
return E ? &E : nullptr;
}
call_iterator call_begin() {
return call_iterator(Edges.begin(), Edges.end());
}
call_iterator call_end() { return call_iterator(Edges.end(), Edges.end()); }
iterator_range<call_iterator> calls() {
return make_range(call_begin(), call_end());
}
bool empty() {
for (auto &E : Edges)
if (E)
return false;
return true;
}
private:
VectorT Edges;
DenseMap<Node *, int> EdgeIndexMap;
EdgeSequence() = default;
/// Internal helper to insert an edge to a node.
void insertEdgeInternal(Node &ChildN, Edge::Kind EK);
/// Internal helper to change an edge kind.
void setEdgeKind(Node &ChildN, Edge::Kind EK);
/// Internal helper to remove the edge to the given function.
bool removeEdgeInternal(Node &ChildN);
};
/// A node in the call graph.
///
/// This represents a single node. Its primary roles are to cache the list of
/// callees, de-duplicate and provide fast testing of whether a function is a
/// callee, and facilitate iteration of child nodes in the graph.
///
/// The node works much like an optional in order to lazily populate the
/// edges of each node. Until populated, there are no edges. Once populated,
/// you can access the edges by dereferencing the node or using the `->`
/// operator as if the node was an `std::optional<EdgeSequence>`.
class Node {
friend class LazyCallGraph;
friend class LazyCallGraph::RefSCC;
public:
LazyCallGraph &getGraph() const { return *G; }
Function &getFunction() const { return *F; }
StringRef getName() const { return F->getName(); }
/// Equality is defined as address equality.
bool operator==(const Node &N) const { return this == &N; }
bool operator!=(const Node &N) const { return !operator==(N); }
/// Tests whether the node has been populated with edges.
bool isPopulated() const { return Edges.has_value(); }
/// Tests whether this is actually a dead node and no longer valid.
///
/// Users rarely interact with nodes in this state and other methods are
/// invalid. This is used to model a node in an edge list where the
/// function has been completely removed.
bool isDead() const {
assert(!G == !F &&
"Both graph and function pointers should be null or non-null.");
return !G;
}
// We allow accessing the edges by dereferencing or using the arrow
// operator, essentially wrapping the internal optional.
EdgeSequence &operator*() const {
// Rip const off because the node itself isn't changing here.
return const_cast<EdgeSequence &>(*Edges);
}
EdgeSequence *operator->() const { return &**this; }
/// Populate the edges of this node if necessary.
///
/// The first time this is called it will populate the edges for this node
/// in the graph. It does this by scanning the underlying function, so once
/// this is done, any changes to that function must be explicitly reflected
/// in updates to the graph.
///
/// \returns the populated \c EdgeSequence to simplify walking it.
///
/// This will not update or re-scan anything if called repeatedly. Instead,
/// the edge sequence is cached and returned immediately on subsequent
/// calls.
EdgeSequence &populate() {
if (Edges)
return *Edges;
return populateSlow();
}
private:
LazyCallGraph *G;
Function *F;
// We provide for the DFS numbering and Tarjan walk lowlink numbers to be
// stored directly within the node. These are both '-1' when nodes are part
// of an SCC (or RefSCC), or '0' when not yet reached in a DFS walk.
int DFSNumber = 0;
int LowLink = 0;
std::optional<EdgeSequence> Edges;
/// Basic constructor implements the scanning of F into Edges and
/// EdgeIndexMap.
Node(LazyCallGraph &G, Function &F) : G(&G), F(&F) {}
/// Implementation of the scan when populating.
EdgeSequence &populateSlow();
/// Internal helper to directly replace the function with a new one.
///
/// This is used to facilitate transformations which need to replace the
/// formal Function object but directly move the body and users from one to
/// the other.
void replaceFunction(Function &NewF);
void clear() { Edges.reset(); }
/// Print the name of this node's function.
friend raw_ostream &operator<<(raw_ostream &OS, const Node &N) {
return OS << N.F->getName();
}
/// Dump the name of this node's function to stderr.
void dump() const;
};
/// An SCC of the call graph.
///
/// This represents a Strongly Connected Component of the direct call graph
/// -- ignoring indirect calls and function references. It stores this as
/// a collection of call graph nodes. While the order of nodes in the SCC is
/// stable, it is not any particular order.
///
/// The SCCs are nested within a \c RefSCC, see below for details about that
/// outer structure. SCCs do not support mutation of the call graph, that
/// must be done through the containing \c RefSCC in order to fully reason
/// about the ordering and connections of the graph.
class LLVM_EXTERNAL_VISIBILITY SCC {
friend class LazyCallGraph;
friend class LazyCallGraph::Node;
RefSCC *OuterRefSCC;
SmallVector<Node *, 1> Nodes;
template <typename NodeRangeT>
SCC(RefSCC &OuterRefSCC, NodeRangeT &&Nodes)
: OuterRefSCC(&OuterRefSCC), Nodes(std::forward<NodeRangeT>(Nodes)) {}
void clear() {
OuterRefSCC = nullptr;
Nodes.clear();
}
/// Print a short description useful for debugging or logging.
///
/// We print the function names in the SCC wrapped in '()'s and skipping
/// the middle functions if there are a large number.
//
// Note: this is defined inline to dodge issues with GCC's interpretation
// of enclosing namespaces for friend function declarations.
friend raw_ostream &operator<<(raw_ostream &OS, const SCC &C) {
OS << '(';
int I = 0;
for (LazyCallGraph::Node &N : C) {
if (I > 0)
OS << ", ";
// Elide the inner elements if there are too many.
if (I > 8) {
OS << "..., " << *C.Nodes.back();
break;
}
OS << N;
++I;
}
OS << ')';
return OS;
}
/// Dump a short description of this SCC to stderr.
void dump() const;
#if !defined(NDEBUG) || defined(EXPENSIVE_CHECKS)
/// Verify invariants about the SCC.
///
/// This will attempt to validate all of the basic invariants within an
/// SCC, but not that it is a strongly connected component per se.
/// Primarily useful while building and updating the graph to check that
/// basic properties are in place rather than having inexplicable crashes
/// later.
void verify();
#endif
public:
using iterator = pointee_iterator<SmallVectorImpl<Node *>::const_iterator>;
iterator begin() const { return Nodes.begin(); }
iterator end() const { return Nodes.end(); }
int size() const { return Nodes.size(); }
RefSCC &getOuterRefSCC() const { return *OuterRefSCC; }
/// Test if this SCC is a parent of \a C.
///
/// Note that this is linear in the number of edges departing the current
/// SCC.
bool isParentOf(const SCC &C) const;
/// Test if this SCC is an ancestor of \a C.
///
/// Note that in the worst case this is linear in the number of edges
/// departing the current SCC and every SCC in the entire graph reachable
/// from this SCC. Thus this very well may walk every edge in the entire
/// call graph! Do not call this in a tight loop!
bool isAncestorOf(const SCC &C) const;
/// Test if this SCC is a child of \a C.
///
/// See the comments for \c isParentOf for detailed notes about the
/// complexity of this routine.
bool isChildOf(const SCC &C) const { return C.isParentOf(*this); }
/// Test if this SCC is a descendant of \a C.
///
/// See the comments for \c isParentOf for detailed notes about the
/// complexity of this routine.
bool isDescendantOf(const SCC &C) const { return C.isAncestorOf(*this); }
/// Provide a short name by printing this SCC to a std::string.
///
/// This copes with the fact that we don't have a name per se for an SCC
/// while still making the use of this in debugging and logging useful.
std::string getName() const {
std::string Name;
raw_string_ostream OS(Name);
OS << *this;
OS.flush();
return Name;
}
};
/// A RefSCC of the call graph.
///
/// This models a Strongly Connected Component of function reference edges in
/// the call graph. As opposed to actual SCCs, these can be used to scope
/// subgraphs of the module which are independent from other subgraphs of the
/// module because they do not reference it in any way. This is also the unit
/// where we do mutation of the graph in order to restrict mutations to those
/// which don't violate this independence.
///
/// A RefSCC contains a DAG of actual SCCs. All the nodes within the RefSCC
/// are necessarily within some actual SCC that nests within it. Since
/// a direct call *is* a reference, there will always be at least one RefSCC
/// around any SCC.
///
/// Spurious ref edges, meaning ref edges that still exist in the call graph
/// even though the corresponding IR reference no longer exists, are allowed.
/// This is mostly to support argument promotion, which can modify a caller to
/// no longer pass a function. The only place that needs to specially handle
/// this is deleting a dead function/node, otherwise the dead ref edges are
/// automatically removed when visiting the function/node no longer containing
/// the ref edge.
class RefSCC {
friend class LazyCallGraph;
friend class LazyCallGraph::Node;
LazyCallGraph *G;
/// A postorder list of the inner SCCs.
SmallVector<SCC *, 4> SCCs;
/// A map from SCC to index in the postorder list.
SmallDenseMap<SCC *, int, 4> SCCIndices;
/// Fast-path constructor. RefSCCs should instead be constructed by calling
/// formRefSCCFast on the graph itself.
RefSCC(LazyCallGraph &G);
void clear() {
SCCs.clear();
SCCIndices.clear();
}
/// Print a short description useful for debugging or logging.
///
/// We print the SCCs wrapped in '[]'s and skipping the middle SCCs if
/// there are a large number.
//
// Note: this is defined inline to dodge issues with GCC's interpretation
// of enclosing namespaces for friend function declarations.
friend raw_ostream &operator<<(raw_ostream &OS, const RefSCC &RC) {
OS << '[';
int I = 0;
for (LazyCallGraph::SCC &C : RC) {
if (I > 0)
OS << ", ";
// Elide the inner elements if there are too many.
if (I > 4) {
OS << "..., " << *RC.SCCs.back();
break;
}
OS << C;
++I;
}
OS << ']';
return OS;
}
/// Dump a short description of this RefSCC to stderr.
void dump() const;
#if !defined(NDEBUG) || defined(EXPENSIVE_CHECKS)
/// Verify invariants about the RefSCC and all its SCCs.
///
/// This will attempt to validate all of the invariants *within* the
/// RefSCC, but not that it is a strongly connected component of the larger
/// graph. This makes it useful even when partially through an update.
///
/// Invariants checked:
/// - SCCs and their indices match.
/// - The SCCs list is in fact in post-order.
void verify();
#endif
public:
using iterator = pointee_iterator<SmallVectorImpl<SCC *>::const_iterator>;
using range = iterator_range<iterator>;
using parent_iterator =
pointee_iterator<SmallPtrSetImpl<RefSCC *>::const_iterator>;
iterator begin() const { return SCCs.begin(); }
iterator end() const { return SCCs.end(); }
ssize_t size() const { return SCCs.size(); }
SCC &operator[](int Idx) { return *SCCs[Idx]; }
iterator find(SCC &C) const {
return SCCs.begin() + SCCIndices.find(&C)->second;
}
/// Test if this RefSCC is a parent of \a RC.
///
/// CAUTION: This method walks every edge in the \c RefSCC, it can be very
/// expensive.
bool isParentOf(const RefSCC &RC) const;
/// Test if this RefSCC is an ancestor of \a RC.
///
/// CAUTION: This method walks the directed graph of edges as far as
/// necessary to find a possible path to the argument. In the worst case
/// this may walk the entire graph and can be extremely expensive.
bool isAncestorOf(const RefSCC &RC) const;
/// Test if this RefSCC is a child of \a RC.
///
/// CAUTION: This method walks every edge in the argument \c RefSCC, it can
/// be very expensive.
bool isChildOf(const RefSCC &RC) const { return RC.isParentOf(*this); }
/// Test if this RefSCC is a descendant of \a RC.
///
/// CAUTION: This method walks the directed graph of edges as far as
/// necessary to find a possible path from the argument. In the worst case
/// this may walk the entire graph and can be extremely expensive.
bool isDescendantOf(const RefSCC &RC) const {
return RC.isAncestorOf(*this);
}
/// Provide a short name by printing this RefSCC to a std::string.
///
/// This copes with the fact that we don't have a name per se for an RefSCC
/// while still making the use of this in debugging and logging useful.
std::string getName() const {
std::string Name;
raw_string_ostream OS(Name);
OS << *this;
OS.flush();
return Name;
}
///@{
/// \name Mutation API
///
/// These methods provide the core API for updating the call graph in the
/// presence of (potentially still in-flight) DFS-found RefSCCs and SCCs.
///
/// Note that these methods sometimes have complex runtimes, so be careful
/// how you call them.
/// Make an existing internal ref edge into a call edge.
///
/// This may form a larger cycle and thus collapse SCCs into TargetN's SCC.
/// If that happens, the optional callback \p MergedCB will be invoked (if
/// provided) on the SCCs being merged away prior to actually performing
/// the merge. Note that this will never include the target SCC as that
/// will be the SCC functions are merged into to resolve the cycle. Once
/// this function returns, these merged SCCs are not in a valid state but
/// the pointers will remain valid until destruction of the parent graph
/// instance for the purpose of clearing cached information. This function
/// also returns 'true' if a cycle was formed and some SCCs merged away as
/// a convenience.
///
/// After this operation, both SourceN's SCC and TargetN's SCC may move
/// position within this RefSCC's postorder list. Any SCCs merged are
/// merged into the TargetN's SCC in order to preserve reachability analyses
/// which took place on that SCC.
bool switchInternalEdgeToCall(
Node &SourceN, Node &TargetN,
function_ref<void(ArrayRef<SCC *> MergedSCCs)> MergeCB = {});
/// Make an existing internal call edge between separate SCCs into a ref
/// edge.
///
/// If SourceN and TargetN in separate SCCs within this RefSCC, changing
/// the call edge between them to a ref edge is a trivial operation that
/// does not require any structural changes to the call graph.
void switchTrivialInternalEdgeToRef(Node &SourceN, Node &TargetN);
/// Make an existing internal call edge within a single SCC into a ref
/// edge.
///
/// Since SourceN and TargetN are part of a single SCC, this SCC may be
/// split up due to breaking a cycle in the call edges that formed it. If
/// that happens, then this routine will insert new SCCs into the postorder
/// list *before* the SCC of TargetN (previously the SCC of both). This
/// preserves postorder as the TargetN can reach all of the other nodes by
/// definition of previously being in a single SCC formed by the cycle from
/// SourceN to TargetN.
///
/// The newly added SCCs are added *immediately* and contiguously
/// prior to the TargetN SCC and return the range covering the new SCCs in
/// the RefSCC's postorder sequence. You can directly iterate the returned
/// range to observe all of the new SCCs in postorder.
///
/// Note that if SourceN and TargetN are in separate SCCs, the simpler
/// routine `switchTrivialInternalEdgeToRef` should be used instead.
iterator_range<iterator> switchInternalEdgeToRef(Node &SourceN,
Node &TargetN);
/// Make an existing outgoing ref edge into a call edge.
///
/// Note that this is trivial as there are no cyclic impacts and there
/// remains a reference edge.
void switchOutgoingEdgeToCall(Node &SourceN, Node &TargetN);
/// Make an existing outgoing call edge into a ref edge.
///
/// This is trivial as there are no cyclic impacts and there remains
/// a reference edge.
void switchOutgoingEdgeToRef(Node &SourceN, Node &TargetN);
/// Insert a ref edge from one node in this RefSCC to another in this
/// RefSCC.
///
/// This is always a trivial operation as it doesn't change any part of the
/// graph structure besides connecting the two nodes.
///
/// Note that we don't support directly inserting internal *call* edges
/// because that could change the graph structure and requires returning
/// information about what became invalid. As a consequence, the pattern
/// should be to first insert the necessary ref edge, and then to switch it
/// to a call edge if needed and handle any invalidation that results. See
/// the \c switchInternalEdgeToCall routine for details.
void insertInternalRefEdge(Node &SourceN, Node &TargetN);
/// Insert an edge whose parent is in this RefSCC and child is in some
/// child RefSCC.
///
/// There must be an existing path from the \p SourceN to the \p TargetN.
/// This operation is inexpensive and does not change the set of SCCs and
/// RefSCCs in the graph.
void insertOutgoingEdge(Node &SourceN, Node &TargetN, Edge::Kind EK);
/// Insert an edge whose source is in a descendant RefSCC and target is in
/// this RefSCC.
///
/// There must be an existing path from the target to the source in this
/// case.
///
/// NB! This is has the potential to be a very expensive function. It
/// inherently forms a cycle in the prior RefSCC DAG and we have to merge
/// RefSCCs to resolve that cycle. But finding all of the RefSCCs which
/// participate in the cycle can in the worst case require traversing every
/// RefSCC in the graph. Every attempt is made to avoid that, but passes
/// must still exercise caution calling this routine repeatedly.
///
/// Also note that this can only insert ref edges. In order to insert
/// a call edge, first insert a ref edge and then switch it to a call edge.
/// These are intentionally kept as separate interfaces because each step
/// of the operation invalidates a different set of data structures.
///
/// This returns all the RefSCCs which were merged into the this RefSCC
/// (the target's). This allows callers to invalidate any cached
/// information.
///
/// FIXME: We could possibly optimize this quite a bit for cases where the
/// caller and callee are very nearby in the graph. See comments in the
/// implementation for details, but that use case might impact users.
SmallVector<RefSCC *, 1> insertIncomingRefEdge(Node &SourceN,
Node &TargetN);
/// Remove an edge whose source is in this RefSCC and target is *not*.
///
/// This removes an inter-RefSCC edge. All inter-RefSCC edges originating
/// from this SCC have been fully explored by any in-flight DFS graph
/// formation, so this is always safe to call once you have the source
/// RefSCC.
///
/// This operation does not change the cyclic structure of the graph and so
/// is very inexpensive. It may change the connectivity graph of the SCCs
/// though, so be careful calling this while iterating over them.
void removeOutgoingEdge(Node &SourceN, Node &TargetN);
/// Remove a list of ref edges which are entirely within this RefSCC.
///
/// Both the \a SourceN and all of the \a TargetNs must be within this
/// RefSCC. Removing these edges may break cycles that form this RefSCC and
/// thus this operation may change the RefSCC graph significantly. In
/// particular, this operation will re-form new RefSCCs based on the
/// remaining connectivity of the graph. The following invariants are
/// guaranteed to hold after calling this method:
///
/// 1) If a ref-cycle remains after removal, it leaves this RefSCC intact
/// and in the graph. No new RefSCCs are built.
/// 2) Otherwise, this RefSCC will be dead after this call and no longer in
/// the graph or the postorder traversal of the call graph. Any iterator
/// pointing at this RefSCC will become invalid.
/// 3) All newly formed RefSCCs will be returned and the order of the
/// RefSCCs returned will be a valid postorder traversal of the new
/// RefSCCs.
/// 4) No RefSCC other than this RefSCC has its member set changed (this is
/// inherent in the definition of removing such an edge).
///
/// These invariants are very important to ensure that we can build
/// optimization pipelines on top of the CGSCC pass manager which
/// intelligently update the RefSCC graph without invalidating other parts
/// of the RefSCC graph.
///
/// Note that we provide no routine to remove a *call* edge. Instead, you
/// must first switch it to a ref edge using \c switchInternalEdgeToRef.
/// This split API is intentional as each of these two steps can invalidate
/// a different aspect of the graph structure and needs to have the
/// invalidation handled independently.
///
/// The runtime complexity of this method is, in the worst case, O(V+E)
/// where V is the number of nodes in this RefSCC and E is the number of
/// edges leaving the nodes in this RefSCC. Note that E includes both edges
/// within this RefSCC and edges from this RefSCC to child RefSCCs. Some
/// effort has been made to minimize the overhead of common cases such as
/// self-edges and edge removals which result in a spanning tree with no
/// more cycles.
[[nodiscard]] SmallVector<RefSCC *, 1>
removeInternalRefEdge(Node &SourceN, ArrayRef<Node *> TargetNs);
/// A convenience wrapper around the above to handle trivial cases of
/// inserting a new call edge.
///
/// This is trivial whenever the target is in the same SCC as the source or
/// the edge is an outgoing edge to some descendant SCC. In these cases
/// there is no change to the cyclic structure of SCCs or RefSCCs.
///
/// To further make calling this convenient, it also handles inserting
/// already existing edges.
void insertTrivialCallEdge(Node &SourceN, Node &TargetN);
/// A convenience wrapper around the above to handle trivial cases of
/// inserting a new ref edge.
///
/// This is trivial whenever the target is in the same RefSCC as the source
/// or the edge is an outgoing edge to some descendant RefSCC. In these
/// cases there is no change to the cyclic structure of the RefSCCs.
///
/// To further make calling this convenient, it also handles inserting
/// already existing edges.
void insertTrivialRefEdge(Node &SourceN, Node &TargetN);
/// Directly replace a node's function with a new function.
///
/// This should be used when moving the body and users of a function to
/// a new formal function object but not otherwise changing the call graph
/// structure in any way.
///
/// It requires that the old function in the provided node have zero uses
/// and the new function must have calls and references to it establishing
/// an equivalent graph.
void replaceNodeFunction(Node &N, Function &NewF);
///@}
};
/// A post-order depth-first RefSCC iterator over the call graph.
///
/// This iterator walks the cached post-order sequence of RefSCCs. However,
/// it trades stability for flexibility. It is restricted to a forward
/// iterator but will survive mutations which insert new RefSCCs and continue
/// to point to the same RefSCC even if it moves in the post-order sequence.
class postorder_ref_scc_iterator
: public iterator_facade_base<postorder_ref_scc_iterator,
std::forward_iterator_tag, RefSCC> {
friend class LazyCallGraph;
friend class LazyCallGraph::Node;
/// Nonce type to select the constructor for the end iterator.
struct IsAtEndT {};
LazyCallGraph *G;
RefSCC *RC = nullptr;
/// Build the begin iterator for a node.
postorder_ref_scc_iterator(LazyCallGraph &G) : G(&G), RC(getRC(G, 0)) {
incrementUntilNonEmptyRefSCC();
}
/// Build the end iterator for a node. This is selected purely by overload.
postorder_ref_scc_iterator(LazyCallGraph &G, IsAtEndT /*Nonce*/) : G(&G) {}
/// Get the post-order RefSCC at the given index of the postorder walk,
/// populating it if necessary.
static RefSCC *getRC(LazyCallGraph &G, int Index) {
if (Index == (int)G.PostOrderRefSCCs.size())
// We're at the end.
return nullptr;
return G.PostOrderRefSCCs[Index];
}
// Keep incrementing until RC is non-empty (or null).
void incrementUntilNonEmptyRefSCC() {
while (RC && RC->size() == 0)
increment();
}
void increment() {
assert(RC && "Cannot increment the end iterator!");
RC = getRC(*G, G->RefSCCIndices.find(RC)->second + 1);
}
public:
bool operator==(const postorder_ref_scc_iterator &Arg) const {
return G == Arg.G && RC == Arg.RC;
}
reference operator*() const { return *RC; }
using iterator_facade_base::operator++;
postorder_ref_scc_iterator &operator++() {
increment();
incrementUntilNonEmptyRefSCC();
return *this;
}
};
/// Construct a graph for the given module.
///
/// This sets up the graph and computes all of the entry points of the graph.
/// No function definitions are scanned until their nodes in the graph are
/// requested during traversal.
LazyCallGraph(Module &M,
function_ref<TargetLibraryInfo &(Function &)> GetTLI);
LazyCallGraph(LazyCallGraph &&G);
LazyCallGraph &operator=(LazyCallGraph &&RHS);
bool invalidate(Module &, const PreservedAnalyses &PA,
ModuleAnalysisManager::Invalidator &);
EdgeSequence::iterator begin() { return EntryEdges.begin(); }
EdgeSequence::iterator end() { return EntryEdges.end(); }
void buildRefSCCs();
postorder_ref_scc_iterator postorder_ref_scc_begin() {
if (!EntryEdges.empty())
assert(!PostOrderRefSCCs.empty() &&
"Must form RefSCCs before iterating them!");
return postorder_ref_scc_iterator(*this);
}
postorder_ref_scc_iterator postorder_ref_scc_end() {
if (!EntryEdges.empty())
assert(!PostOrderRefSCCs.empty() &&
"Must form RefSCCs before iterating them!");
return postorder_ref_scc_iterator(*this,
postorder_ref_scc_iterator::IsAtEndT());
}
iterator_range<postorder_ref_scc_iterator> postorder_ref_sccs() {
return make_range(postorder_ref_scc_begin(), postorder_ref_scc_end());
}
/// Lookup a function in the graph which has already been scanned and added.
Node *lookup(const Function &F) const { return NodeMap.lookup(&F); }
/// Lookup a function's SCC in the graph.
///
/// \returns null if the function hasn't been assigned an SCC via the RefSCC
/// iterator walk.
SCC *lookupSCC(Node &N) const { return SCCMap.lookup(&N); }
/// Lookup a function's RefSCC in the graph.
///
/// \returns null if the function hasn't been assigned a RefSCC via the
/// RefSCC iterator walk.
RefSCC *lookupRefSCC(Node &N) const {
if (SCC *C = lookupSCC(N))
return &C->getOuterRefSCC();
return nullptr;
}
/// Get a graph node for a given function, scanning it to populate the graph
/// data as necessary.
Node &get(Function &F) {
Node *&N = NodeMap[&F];
if (N)
return *N;
return insertInto(F, N);
}
/// Get the sequence of known and defined library functions.
///
/// These functions, because they are known to LLVM, can have calls
/// introduced out of thin air from arbitrary IR.
ArrayRef<Function *> getLibFunctions() const {
return LibFunctions.getArrayRef();
}
/// Test whether a function is a known and defined library function tracked by
/// the call graph.
///
/// Because these functions are known to LLVM they are specially modeled in
/// the call graph and even when all IR-level references have been removed
/// remain active and reachable.
bool isLibFunction(Function &F) const { return LibFunctions.count(&F); }
///@{
/// \name Pre-SCC Mutation API
///
/// These methods are only valid to call prior to forming any SCCs for this
/// call graph. They can be used to update the core node-graph during
/// a node-based inorder traversal that precedes any SCC-based traversal.
///
/// Once you begin manipulating a call graph's SCCs, most mutation of the
/// graph must be performed via a RefSCC method. There are some exceptions
/// below.
/// Update the call graph after inserting a new edge.
void insertEdge(Node &SourceN, Node &TargetN, Edge::Kind EK);
/// Update the call graph after inserting a new edge.
void insertEdge(Function &Source, Function &Target, Edge::Kind EK) {
return insertEdge(get(Source), get(Target), EK);
}
/// Update the call graph after deleting an edge.
void removeEdge(Node &SourceN, Node &TargetN);
/// Update the call graph after deleting an edge.
void removeEdge(Function &Source, Function &Target) {
return removeEdge(get(Source), get(Target));
}
///@}
///@{
/// \name General Mutation API
///
/// There are a very limited set of mutations allowed on the graph as a whole
/// once SCCs have started to be formed. These routines have strict contracts
/// but may be called at any point.
/// Remove a dead function from the call graph (typically to delete it).
///
/// Note that the function must have an empty use list, and the call graph
/// must be up-to-date prior to calling this. That means it is by itself in
/// a maximal SCC which is by itself in a maximal RefSCC, etc. No structural
/// changes result from calling this routine other than potentially removing
/// entry points into the call graph.
///
/// If SCC formation has begun, this function must not be part of the current
/// DFS in order to call this safely. Typically, the function will have been
/// fully visited by the DFS prior to calling this routine.
void removeDeadFunction(Function &F);
/// Add a new function split/outlined from an existing function.
///
/// The new function may only reference other functions that the original
/// function did.
///
/// The original function must reference (either directly or indirectly) the
/// new function.
///
/// The new function may also reference the original function.
/// It may end up in a parent SCC in the case that the original function's
/// edge to the new function is a ref edge, and the edge back is a call edge.
void addSplitFunction(Function &OriginalFunction, Function &NewFunction);
/// Add new ref-recursive functions split/outlined from an existing function.
///
/// The new functions may only reference other functions that the original
/// function did. The new functions may reference (not call) the original
/// function.
///
/// The original function must reference (not call) all new functions.
/// All new functions must reference (not call) each other.
void addSplitRefRecursiveFunctions(Function &OriginalFunction,
ArrayRef<Function *> NewFunctions);
///@}
///@{
/// \name Static helpers for code doing updates to the call graph.
///
/// These helpers are used to implement parts of the call graph but are also
/// useful to code doing updates or otherwise wanting to walk the IR in the
/// same patterns as when we build the call graph.
/// Recursively visits the defined functions whose address is reachable from
/// every constant in the \p Worklist.
///
/// Doesn't recurse through any constants already in the \p Visited set, and
/// updates that set with every constant visited.
///
/// For each defined function, calls \p Callback with that function.
static void visitReferences(SmallVectorImpl<Constant *> &Worklist,
SmallPtrSetImpl<Constant *> &Visited,
function_ref<void(Function &)> Callback);
///@}
private:
using node_stack_iterator = SmallVectorImpl<Node *>::reverse_iterator;
using node_stack_range = iterator_range<node_stack_iterator>;
/// Allocator that holds all the call graph nodes.
SpecificBumpPtrAllocator<Node> BPA;
/// Maps function->node for fast lookup.
DenseMap<const Function *, Node *> NodeMap;
/// The entry edges into the graph.
///
/// These edges are from "external" sources. Put another way, they
/// escape at the module scope.
EdgeSequence EntryEdges;
/// Allocator that holds all the call graph SCCs.
SpecificBumpPtrAllocator<SCC> SCCBPA;
/// Maps Function -> SCC for fast lookup.
DenseMap<Node *, SCC *> SCCMap;
/// Allocator that holds all the call graph RefSCCs.
SpecificBumpPtrAllocator<RefSCC> RefSCCBPA;
/// The post-order sequence of RefSCCs.
///
/// This list is lazily formed the first time we walk the graph.
SmallVector<RefSCC *, 16> PostOrderRefSCCs;
/// A map from RefSCC to the index for it in the postorder sequence of
/// RefSCCs.
DenseMap<RefSCC *, int> RefSCCIndices;
/// Defined functions that are also known library functions which the
/// optimizer can reason about and therefore might introduce calls to out of
/// thin air.
SmallSetVector<Function *, 4> LibFunctions;
/// Helper to insert a new function, with an already looked-up entry in
/// the NodeMap.
Node &insertInto(Function &F, Node *&MappedN);
/// Helper to initialize a new node created outside of creating SCCs and add
/// it to the NodeMap if necessary. For example, useful when a function is
/// split.
Node &initNode(Function &F);
/// Helper to update pointers back to the graph object during moves.
void updateGraphPtrs();
/// Allocates an SCC and constructs it using the graph allocator.
///
/// The arguments are forwarded to the constructor.
template <typename... Ts> SCC *createSCC(Ts &&...Args) {
return new (SCCBPA.Allocate()) SCC(std::forward<Ts>(Args)...);
}
/// Allocates a RefSCC and constructs it using the graph allocator.
///
/// The arguments are forwarded to the constructor.
template <typename... Ts> RefSCC *createRefSCC(Ts &&...Args) {
return new (RefSCCBPA.Allocate()) RefSCC(std::forward<Ts>(Args)...);
}
/// Common logic for building SCCs from a sequence of roots.
///
/// This is a very generic implementation of the depth-first walk and SCC
/// formation algorithm. It uses a generic sequence of roots and generic
/// callbacks for each step. This is designed to be used to implement both
/// the RefSCC formation and SCC formation with shared logic.
///
/// Currently this is a relatively naive implementation of Tarjan's DFS
/// algorithm to form the SCCs.
///
/// FIXME: We should consider newer variants such as Nuutila.
template <typename RootsT, typename GetBeginT, typename GetEndT,
typename GetNodeT, typename FormSCCCallbackT>
static void buildGenericSCCs(RootsT &&Roots, GetBeginT &&GetBegin,
GetEndT &&GetEnd, GetNodeT &&GetNode,
FormSCCCallbackT &&FormSCC);
/// Build the SCCs for a RefSCC out of a list of nodes.
void buildSCCs(RefSCC &RC, node_stack_range Nodes);
/// Get the index of a RefSCC within the postorder traversal.
///
/// Requires that this RefSCC is a valid one in the (perhaps partial)
/// postorder traversed part of the graph.
int getRefSCCIndex(RefSCC &RC) {
auto IndexIt = RefSCCIndices.find(&RC);
assert(IndexIt != RefSCCIndices.end() && "RefSCC doesn't have an index!");
assert(PostOrderRefSCCs[IndexIt->second] == &RC &&
"Index does not point back at RC!");
return IndexIt->second;
}
};
inline LazyCallGraph::Edge::Edge() = default;
inline LazyCallGraph::Edge::Edge(Node &N, Kind K) : Value(&N, K) {}
inline LazyCallGraph::Edge::operator bool() const {
return Value.getPointer() && !Value.getPointer()->isDead();
}
inline LazyCallGraph::Edge::Kind LazyCallGraph::Edge::getKind() const {
assert(*this && "Queried a null edge!");
return Value.getInt();
}
inline bool LazyCallGraph::Edge::isCall() const {
assert(*this && "Queried a null edge!");
return getKind() == Call;
}
inline LazyCallGraph::Node &LazyCallGraph::Edge::getNode() const {
assert(*this && "Queried a null edge!");
return *Value.getPointer();
}
inline Function &LazyCallGraph::Edge::getFunction() const {
assert(*this && "Queried a null edge!");
return getNode().getFunction();
}
// Provide GraphTraits specializations for call graphs.
template <> struct GraphTraits<LazyCallGraph::Node *> {
using NodeRef = LazyCallGraph::Node *;
using ChildIteratorType = LazyCallGraph::EdgeSequence::iterator;
static NodeRef getEntryNode(NodeRef N) { return N; }
static ChildIteratorType child_begin(NodeRef N) { return (*N)->begin(); }
static ChildIteratorType child_end(NodeRef N) { return (*N)->end(); }
};
template <> struct GraphTraits<LazyCallGraph *> {
using NodeRef = LazyCallGraph::Node *;
using ChildIteratorType = LazyCallGraph::EdgeSequence::iterator;
static NodeRef getEntryNode(NodeRef N) { return N; }
static ChildIteratorType child_begin(NodeRef N) { return (*N)->begin(); }
static ChildIteratorType child_end(NodeRef N) { return (*N)->end(); }
};
/// An analysis pass which computes the call graph for a module.
class LazyCallGraphAnalysis : public AnalysisInfoMixin<LazyCallGraphAnalysis> {
friend AnalysisInfoMixin<LazyCallGraphAnalysis>;
static AnalysisKey Key;
public:
/// Inform generic clients of the result type.
using Result = LazyCallGraph;
/// Compute the \c LazyCallGraph for the module \c M.
///
/// This just builds the set of entry points to the call graph. The rest is
/// built lazily as it is walked.
LazyCallGraph run(Module &M, ModuleAnalysisManager &AM) {
FunctionAnalysisManager &FAM =
AM.getResult<FunctionAnalysisManagerModuleProxy>(M).getManager();
auto GetTLI = [&FAM](Function &F) -> TargetLibraryInfo & {
return FAM.getResult<TargetLibraryAnalysis>(F);
};
return LazyCallGraph(M, GetTLI);
}
};
/// A pass which prints the call graph to a \c raw_ostream.
///
/// This is primarily useful for testing the analysis.
class LazyCallGraphPrinterPass
: public PassInfoMixin<LazyCallGraphPrinterPass> {
raw_ostream &OS;
public:
explicit LazyCallGraphPrinterPass(raw_ostream &OS);
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
};
/// A pass which prints the call graph as a DOT file to a \c raw_ostream.
///
/// This is primarily useful for visualization purposes.
class LazyCallGraphDOTPrinterPass
: public PassInfoMixin<LazyCallGraphDOTPrinterPass> {
raw_ostream &OS;
public:
explicit LazyCallGraphDOTPrinterPass(raw_ostream &OS);
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
};
} // end namespace llvm
#endif // LLVM_ANALYSIS_LAZYCALLGRAPH_H
PK iwFZK D;P P Analysis/InstCount.hnu �[��� //===- InstCount.h - Collects the count of all instructions -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This pass collects the count of all instructions and reports them
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_INSTCOUNT_H
#define LLVM_ANALYSIS_INSTCOUNT_H
#include "llvm/IR/PassManager.h"
namespace llvm {
class Function;
struct InstCountPass : PassInfoMixin<InstCountPass> {
PreservedAnalyses run(Function &F, FunctionAnalysisManager &);
};
} // end namespace llvm
#endif // LLVM_ANALYSIS_INSTCOUNT_H
PK iwFZ��+D� � Analysis/HeatUtils.hnu �[��� //===-- HeatUtils.h - Utility for printing heat colors ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Utility for printing heat colors based on profiling information.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_HEATUTILS_H
#define LLVM_ANALYSIS_HEATUTILS_H
#include <cstdint>
#include <string>
namespace llvm {
class BlockFrequencyInfo;
class Function;
// Returns number of calls of calledFunction by callerFunction.
uint64_t
getNumOfCalls(Function &callerFunction, Function &calledFunction);
// Returns the maximum frequency of a BB in a function.
uint64_t getMaxFreq(const Function &F, const BlockFrequencyInfo *BFI);
// Calculates heat color based on current and maximum frequencies.
std::string getHeatColor(uint64_t freq, uint64_t maxFreq);
// Calculates heat color based on percent of "hotness".
std::string getHeatColor(double percent);
} // namespace llvm
#endif
PK iwFZQ�ϔA; A; Analysis/InlineAdvisor.hnu �[��� //===- InlineAdvisor.h - Inlining decision making abstraction -*- C++ ---*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
#ifndef LLVM_ANALYSIS_INLINEADVISOR_H
#define LLVM_ANALYSIS_INLINEADVISOR_H
#include "llvm/Analysis/CGSCCPassManager.h"
#include "llvm/Analysis/InlineCost.h"
#include "llvm/Analysis/LazyCallGraph.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/IR/PassManager.h"
#include <memory>
namespace llvm {
class BasicBlock;
class CallBase;
class Function;
class Module;
class OptimizationRemark;
class ImportedFunctionsInliningStatistics;
class OptimizationRemarkEmitter;
struct ReplayInlinerSettings;
/// There are 4 scenarios we can use the InlineAdvisor:
/// - Default - use manual heuristics.
///
/// - Release mode, the expected mode for production, day to day deployments.
/// In this mode, when building the compiler, we also compile a pre-trained ML
/// model to native code, and link it as a static library. This mode has low
/// overhead and no additional dependencies for the compiler runtime.
///
/// - Development mode, for training new models.
/// In this mode, we trade off runtime performance for flexibility. This mode
/// requires the full C Tensorflow API library, and evaluates models
/// dynamically. This mode also permits generating training logs, for offline
/// training.
///
/// - Dynamically load an advisor via a plugin (PluginInlineAdvisorAnalysis)
enum class InliningAdvisorMode : int { Default, Release, Development };
// Each entry represents an inline driver.
enum class InlinePass : int {
AlwaysInliner,
CGSCCInliner,
EarlyInliner,
ModuleInliner,
MLInliner,
ReplayCGSCCInliner,
ReplaySampleProfileInliner,
SampleProfileInliner,
};
/// Provides context on when an inline advisor is constructed in the pipeline
/// (e.g., link phase, inline driver).
struct InlineContext {
ThinOrFullLTOPhase LTOPhase;
InlinePass Pass;
};
std::string AnnotateInlinePassName(InlineContext IC);
class InlineAdvisor;
/// Capture state between an inlining decision having had been made, and
/// its impact being observable. When collecting model training data, this
/// allows recording features/decisions/partial reward data sets.
///
/// Derivations of this type are expected to be tightly coupled with their
/// InliningAdvisors. The base type implements the minimal contractual
/// obligations.
class InlineAdvice {
public:
InlineAdvice(InlineAdvisor *Advisor, CallBase &CB,
OptimizationRemarkEmitter &ORE, bool IsInliningRecommended);
InlineAdvice(InlineAdvice &&) = delete;
InlineAdvice(const InlineAdvice &) = delete;
virtual ~InlineAdvice() {
assert(Recorded && "InlineAdvice should have been informed of the "
"inliner's decision in all cases");
}
/// Exactly one of the record* APIs must be called. Implementers may extend
/// behavior by implementing the corresponding record*Impl.
///
/// Call after inlining succeeded, and did not result in deleting the callee.
void recordInlining();
/// Call after inlining succeeded, and results in the callee being
/// delete-able, meaning, it has no more users, and will be cleaned up
/// subsequently.
void recordInliningWithCalleeDeleted();
/// Call after the decision for a call site was to not inline.
void recordUnsuccessfulInlining(const InlineResult &Result) {
markRecorded();
recordUnsuccessfulInliningImpl(Result);
}
/// Call to indicate inlining was not attempted.
void recordUnattemptedInlining() {
markRecorded();
recordUnattemptedInliningImpl();
}
/// Get the inlining recommendation.
bool isInliningRecommended() const { return IsInliningRecommended; }
const DebugLoc &getOriginalCallSiteDebugLoc() const { return DLoc; }
const BasicBlock *getOriginalCallSiteBasicBlock() const { return Block; }
protected:
virtual void recordInliningImpl() {}
virtual void recordInliningWithCalleeDeletedImpl() {}
virtual void recordUnsuccessfulInliningImpl(const InlineResult &Result) {}
virtual void recordUnattemptedInliningImpl() {}
InlineAdvisor *const Advisor;
/// Caller and Callee are pre-inlining.
Function *const Caller;
Function *const Callee;
// Capture the context of CB before inlining, as a successful inlining may
// change that context, and we want to report success or failure in the
// original context.
const DebugLoc DLoc;
const BasicBlock *const Block;
OptimizationRemarkEmitter &ORE;
const bool IsInliningRecommended;
private:
void markRecorded() {
assert(!Recorded && "Recording should happen exactly once");
Recorded = true;
}
void recordInlineStatsIfNeeded();
bool Recorded = false;
};
class DefaultInlineAdvice : public InlineAdvice {
public:
DefaultInlineAdvice(InlineAdvisor *Advisor, CallBase &CB,
std::optional<InlineCost> OIC,
OptimizationRemarkEmitter &ORE, bool EmitRemarks = true)
: InlineAdvice(Advisor, CB, ORE, OIC.has_value()), OriginalCB(&CB),
OIC(OIC), EmitRemarks(EmitRemarks) {}
private:
void recordUnsuccessfulInliningImpl(const InlineResult &Result) override;
void recordInliningWithCalleeDeletedImpl() override;
void recordInliningImpl() override;
private:
CallBase *const OriginalCB;
std::optional<InlineCost> OIC;
bool EmitRemarks;
};
/// Interface for deciding whether to inline a call site or not.
class InlineAdvisor {
public:
InlineAdvisor(InlineAdvisor &&) = delete;
virtual ~InlineAdvisor();
/// Get an InlineAdvice containing a recommendation on whether to
/// inline or not. \p CB is assumed to be a direct call. \p FAM is assumed to
/// be up-to-date wrt previous inlining decisions. \p MandatoryOnly indicates
/// only mandatory (always-inline) call sites should be recommended - this
/// allows the InlineAdvisor track such inlininings.
/// Returns:
/// - An InlineAdvice with the inlining recommendation.
/// - Null when no recommendation is made (https://reviews.llvm.org/D110658).
/// TODO: Consider removing the Null return scenario by incorporating the
/// SampleProfile inliner into an InlineAdvisor
std::unique_ptr<InlineAdvice> getAdvice(CallBase &CB,
bool MandatoryOnly = false);
/// This must be called when the Inliner pass is entered, to allow the
/// InlineAdvisor update internal state, as result of function passes run
/// between Inliner pass runs (for the same module).
virtual void onPassEntry(LazyCallGraph::SCC *SCC = nullptr) {}
/// This must be called when the Inliner pass is exited, as function passes
/// may be run subsequently. This allows an implementation of InlineAdvisor
/// to prepare for a partial update, based on the optional SCC.
virtual void onPassExit(LazyCallGraph::SCC *SCC = nullptr) {}
/// Support for printer pass
virtual void print(raw_ostream &OS) const {
OS << "Unimplemented InlineAdvisor print\n";
}
/// NOTE pass name is annotated only when inline advisor constructor provides InlineContext.
const char *getAnnotatedInlinePassName() const {
return AnnotatedInlinePassName.c_str();
}
protected:
InlineAdvisor(Module &M, FunctionAnalysisManager &FAM,
std::optional<InlineContext> IC = std::nullopt);
virtual std::unique_ptr<InlineAdvice> getAdviceImpl(CallBase &CB) = 0;
virtual std::unique_ptr<InlineAdvice> getMandatoryAdvice(CallBase &CB,
bool Advice);
Module &M;
FunctionAnalysisManager &FAM;
const std::optional<InlineContext> IC;
const std::string AnnotatedInlinePassName;
std::unique_ptr<ImportedFunctionsInliningStatistics> ImportedFunctionsStats;
enum class MandatoryInliningKind { NotMandatory, Always, Never };
static MandatoryInliningKind getMandatoryKind(CallBase &CB,
FunctionAnalysisManager &FAM,
OptimizationRemarkEmitter &ORE);
OptimizationRemarkEmitter &getCallerORE(CallBase &CB);
private:
friend class InlineAdvice;
};
/// The default (manual heuristics) implementation of the InlineAdvisor. This
/// implementation does not need to keep state between inliner pass runs, and is
/// reusable as-is for inliner pass test scenarios, as well as for regular use.
class DefaultInlineAdvisor : public InlineAdvisor {
public:
DefaultInlineAdvisor(Module &M, FunctionAnalysisManager &FAM,
InlineParams Params, InlineContext IC)
: InlineAdvisor(M, FAM, IC), Params(Params) {}
private:
std::unique_ptr<InlineAdvice> getAdviceImpl(CallBase &CB) override;
InlineParams Params;
};
/// Used for dynamically registering InlineAdvisors as plugins
///
/// An advisor plugin adds a new advisor at runtime by registering an instance
/// of PluginInlineAdvisorAnalysis in the current ModuleAnalysisManager.
/// For example, the following code dynamically registers a
/// DefaultInlineAdvisor:
///
/// namespace {
///
/// InlineAdvisor *defaultAdvisorFactory(Module &M, FunctionAnalysisManager
/// &FAM,
/// InlineParams Params, InlineContext IC)
/// {
/// return new DefaultInlineAdvisor(M, FAM, Params, IC);
/// }
///
/// struct DefaultDynamicAdvisor : PassInfoMixin<DefaultDynamicAdvisor> {
/// PreservedAnalyses run(Module &, ModuleAnalysisManager &MAM) {
/// PluginInlineAdvisorAnalysis PA(defaultAdvisorFactory);
/// MAM.registerPass([&] { return PA; });
/// return PreservedAnalyses::all();
/// }
/// };
///
/// } // namespace
///
/// extern "C" LLVM_ATTRIBUTE_WEAK ::llvm::PassPluginLibraryInfo
/// llvmGetPassPluginInfo() {
/// return {LLVM_PLUGIN_API_VERSION, "DynamicDefaultAdvisor",
/// LLVM_VERSION_STRING,
/// [](PassBuilder &PB) {
/// PB.registerPipelineStartEPCallback(
/// [](ModulePassManager &MPM, OptimizationLevel Level) {
/// MPM.addPass(DefaultDynamicAdvisor());
/// });
/// }};
/// }
///
/// A plugin must implement an AdvisorFactory and register it with a
/// PluginInlineAdvisorAnlysis to the provided ModuleanAlysisManager.
///
/// If such a plugin has been registered
/// InlineAdvisorAnalysis::Result::tryCreate will return the dynamically loaded
/// advisor.
///
class PluginInlineAdvisorAnalysis
: public AnalysisInfoMixin<PluginInlineAdvisorAnalysis> {
public:
static AnalysisKey Key;
static bool HasBeenRegistered;
typedef InlineAdvisor *(*AdvisorFactory)(Module &M,
FunctionAnalysisManager &FAM,
InlineParams Params,
InlineContext IC);
PluginInlineAdvisorAnalysis(AdvisorFactory Factory) : Factory(Factory) {
HasBeenRegistered = true;
assert(Factory != nullptr &&
"The plugin advisor factory should not be a null pointer.");
}
struct Result {
AdvisorFactory Factory;
};
Result run(Module &M, ModuleAnalysisManager &MAM) { return {Factory}; }
Result getResult() { return {Factory}; }
private:
AdvisorFactory Factory;
};
/// The InlineAdvisorAnalysis is a module pass because the InlineAdvisor
/// needs to capture state right before inlining commences over a module.
class InlineAdvisorAnalysis : public AnalysisInfoMixin<InlineAdvisorAnalysis> {
public:
static AnalysisKey Key;
InlineAdvisorAnalysis() = default;
struct Result {
Result(Module &M, ModuleAnalysisManager &MAM) : M(M), MAM(MAM) {}
bool invalidate(Module &, const PreservedAnalyses &PA,
ModuleAnalysisManager::Invalidator &) {
// Check whether the analysis has been explicitly invalidated. Otherwise,
// it's stateless and remains preserved.
auto PAC = PA.getChecker<InlineAdvisorAnalysis>();
return !PAC.preservedWhenStateless();
}
bool tryCreate(InlineParams Params, InliningAdvisorMode Mode,
const ReplayInlinerSettings &ReplaySettings,
InlineContext IC);
InlineAdvisor *getAdvisor() const { return Advisor.get(); }
private:
Module &M;
ModuleAnalysisManager &MAM;
std::unique_ptr<InlineAdvisor> Advisor;
};
Result run(Module &M, ModuleAnalysisManager &MAM) { return Result(M, MAM); }
};
/// Printer pass for the FunctionPropertiesAnalysis results.
class InlineAdvisorAnalysisPrinterPass
: public PassInfoMixin<InlineAdvisorAnalysisPrinterPass> {
raw_ostream &OS;
public:
explicit InlineAdvisorAnalysisPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Module &M, ModuleAnalysisManager &MAM);
PreservedAnalyses run(LazyCallGraph::SCC &InitialC, CGSCCAnalysisManager &AM,
LazyCallGraph &CG, CGSCCUpdateResult &UR);
};
std::unique_ptr<InlineAdvisor>
getReleaseModeAdvisor(Module &M, ModuleAnalysisManager &MAM,
std::function<bool(CallBase &)> GetDefaultAdvice);
std::unique_ptr<InlineAdvisor>
getDevelopmentModeAdvisor(Module &M, ModuleAnalysisManager &MAM,
std::function<bool(CallBase &)> GetDefaultAdvice);
// Default (manual policy) decision making helper APIs. Shared with the legacy
// pass manager inliner.
/// Return the cost only if the inliner should attempt to inline at the given
/// CallSite. If we return the cost, we will emit an optimisation remark later
/// using that cost, so we won't do so from this function. Return std::nullopt
/// if inlining should not be attempted.
std::optional<InlineCost>
shouldInline(CallBase &CB, function_ref<InlineCost(CallBase &CB)> GetInlineCost,
OptimizationRemarkEmitter &ORE, bool EnableDeferral = true);
/// Emit ORE message.
void emitInlinedInto(OptimizationRemarkEmitter &ORE, DebugLoc DLoc,
const BasicBlock *Block, const Function &Callee,
const Function &Caller, bool IsMandatory,
function_ref<void(OptimizationRemark &)> ExtraContext = {},
const char *PassName = nullptr);
/// Emit ORE message based in cost (default heuristic).
void emitInlinedIntoBasedOnCost(OptimizationRemarkEmitter &ORE, DebugLoc DLoc,
const BasicBlock *Block, const Function &Callee,
const Function &Caller, const InlineCost &IC,
bool ForProfileContext = false,
const char *PassName = nullptr);
/// Add location info to ORE message.
void addLocationToRemarks(OptimizationRemark &Remark, DebugLoc DLoc);
/// Set the inline-remark attribute.
void setInlineRemark(CallBase &CB, StringRef Message);
/// Utility for extracting the inline cost message to a string.
std::string inlineCostStr(const InlineCost &IC);
} // namespace llvm
#endif // LLVM_ANALYSIS_INLINEADVISOR_H
PK iwFZ�� C� � Analysis/DDGPrinter.hnu �[��� //===- llvm/Analysis/DDGPrinter.h -------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
//
// This file defines the DOT printer for the Data-Dependence Graph (DDG).
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_DDGPRINTER_H
#define LLVM_ANALYSIS_DDGPRINTER_H
#include "llvm/Analysis/DDG.h"
#include "llvm/Support/DOTGraphTraits.h"
namespace llvm {
class LPMUpdater;
class Loop;
//===--------------------------------------------------------------------===//
// Implementation of DDG DOT Printer for a loop.
//===--------------------------------------------------------------------===//
class DDGDotPrinterPass : public PassInfoMixin<DDGDotPrinterPass> {
public:
PreservedAnalyses run(Loop &L, LoopAnalysisManager &AM,
LoopStandardAnalysisResults &AR, LPMUpdater &U);
};
//===--------------------------------------------------------------------===//
// Specialization of DOTGraphTraits.
//===--------------------------------------------------------------------===//
template <>
struct DOTGraphTraits<const DataDependenceGraph *>
: public DefaultDOTGraphTraits {
DOTGraphTraits(bool IsSimple = false) : DefaultDOTGraphTraits(IsSimple) {}
/// Generate a title for the graph in DOT format
std::string getGraphName(const DataDependenceGraph *G) {
assert(G && "expected a valid pointer to the graph.");
return "DDG for '" + std::string(G->getName()) + "'";
}
/// Print a DDG node either in concise form (-ddg-dot-only) or
/// verbose mode (-ddg-dot).
std::string getNodeLabel(const DDGNode *Node,
const DataDependenceGraph *Graph);
/// Print attributes of an edge in the DDG graph. If the edge
/// is a MemoryDependence edge, then detailed dependence info
/// available from DependenceAnalysis is displayed.
std::string
getEdgeAttributes(const DDGNode *Node,
GraphTraits<const DDGNode *>::ChildIteratorType I,
const DataDependenceGraph *G);
/// Do not print nodes that are part of a pi-block separately. They
/// will be printed when their containing pi-block is being printed.
bool isNodeHidden(const DDGNode *Node, const DataDependenceGraph *G);
private:
/// Print a DDG node in concise form.
static std::string getSimpleNodeLabel(const DDGNode *Node,
const DataDependenceGraph *G);
/// Print a DDG node with more information including containing instructions
/// and detailed information about the dependence edges.
static std::string getVerboseNodeLabel(const DDGNode *Node,
const DataDependenceGraph *G);
/// Print a DDG edge in concise form.
static std::string getSimpleEdgeAttributes(const DDGNode *Src,
const DDGEdge *Edge,
const DataDependenceGraph *G);
/// Print a DDG edge with more information including detailed information
/// about the dependence edges.
static std::string getVerboseEdgeAttributes(const DDGNode *Src,
const DDGEdge *Edge,
const DataDependenceGraph *G);
};
using DDGDotGraphTraits = DOTGraphTraits<const DataDependenceGraph *>;
} // namespace llvm
#endif // LLVM_ANALYSIS_DDGPRINTER_H
PK iwFZ��9�"� "� Analysis/ScalarEvolution.hnu �[��� //===- llvm/Analysis/ScalarEvolution.h - Scalar Evolution -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// The ScalarEvolution class is an LLVM pass which can be used to analyze and
// categorize scalar expressions in loops. It specializes in recognizing
// general induction variables, representing them with the abstract and opaque
// SCEV class. Given this analysis, trip counts of loops and other important
// properties can be obtained.
//
// This analysis is primarily useful for induction variable substitution and
// strength reduction.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_SCALAREVOLUTION_H
#define LLVM_ANALYSIS_SCALAREVOLUTION_H
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/ADT/FoldingSet.h"
#include "llvm/ADT/PointerIntPair.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/IR/ConstantRange.h"
#include "llvm/IR/InstrTypes.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/PassManager.h"
#include "llvm/IR/ValueHandle.h"
#include "llvm/IR/ValueMap.h"
#include "llvm/Pass.h"
#include <cassert>
#include <cstdint>
#include <memory>
#include <optional>
#include <utility>
namespace llvm {
class OverflowingBinaryOperator;
class AssumptionCache;
class BasicBlock;
class Constant;
class ConstantInt;
class DataLayout;
class DominatorTree;
class Function;
class GEPOperator;
class Instruction;
class LLVMContext;
class Loop;
class LoopInfo;
class raw_ostream;
class ScalarEvolution;
class SCEVAddRecExpr;
class SCEVUnknown;
class StructType;
class TargetLibraryInfo;
class Type;
class Value;
enum SCEVTypes : unsigned short;
extern bool VerifySCEV;
/// This class represents an analyzed expression in the program. These are
/// opaque objects that the client is not allowed to do much with directly.
///
class SCEV : public FoldingSetNode {
friend struct FoldingSetTrait<SCEV>;
/// A reference to an Interned FoldingSetNodeID for this node. The
/// ScalarEvolution's BumpPtrAllocator holds the data.
FoldingSetNodeIDRef FastID;
// The SCEV baseclass this node corresponds to
const SCEVTypes SCEVType;
protected:
// Estimated complexity of this node's expression tree size.
const unsigned short ExpressionSize;
/// This field is initialized to zero and may be used in subclasses to store
/// miscellaneous information.
unsigned short SubclassData = 0;
public:
/// NoWrapFlags are bitfield indices into SubclassData.
///
/// Add and Mul expressions may have no-unsigned-wrap <NUW> or
/// no-signed-wrap <NSW> properties, which are derived from the IR
/// operator. NSW is a misnomer that we use to mean no signed overflow or
/// underflow.
///
/// AddRec expressions may have a no-self-wraparound <NW> property if, in
/// the integer domain, abs(step) * max-iteration(loop) <=
/// unsigned-max(bitwidth). This means that the recurrence will never reach
/// its start value if the step is non-zero. Computing the same value on
/// each iteration is not considered wrapping, and recurrences with step = 0
/// are trivially <NW>. <NW> is independent of the sign of step and the
/// value the add recurrence starts with.
///
/// Note that NUW and NSW are also valid properties of a recurrence, and
/// either implies NW. For convenience, NW will be set for a recurrence
/// whenever either NUW or NSW are set.
///
/// We require that the flag on a SCEV apply to the entire scope in which
/// that SCEV is defined. A SCEV's scope is set of locations dominated by
/// a defining location, which is in turn described by the following rules:
/// * A SCEVUnknown is at the point of definition of the Value.
/// * A SCEVConstant is defined at all points.
/// * A SCEVAddRec is defined starting with the header of the associated
/// loop.
/// * All other SCEVs are defined at the earlest point all operands are
/// defined.
///
/// The above rules describe a maximally hoisted form (without regards to
/// potential control dependence). A SCEV is defined anywhere a
/// corresponding instruction could be defined in said maximally hoisted
/// form. Note that SCEVUDivExpr (currently the only expression type which
/// can trap) can be defined per these rules in regions where it would trap
/// at runtime. A SCEV being defined does not require the existence of any
/// instruction within the defined scope.
enum NoWrapFlags {
FlagAnyWrap = 0, // No guarantee.
FlagNW = (1 << 0), // No self-wrap.
FlagNUW = (1 << 1), // No unsigned wrap.
FlagNSW = (1 << 2), // No signed wrap.
NoWrapMask = (1 << 3) - 1
};
explicit SCEV(const FoldingSetNodeIDRef ID, SCEVTypes SCEVTy,
unsigned short ExpressionSize)
: FastID(ID), SCEVType(SCEVTy), ExpressionSize(ExpressionSize) {}
SCEV(const SCEV &) = delete;
SCEV &operator=(const SCEV &) = delete;
SCEVTypes getSCEVType() const { return SCEVType; }
/// Return the LLVM type of this SCEV expression.
Type *getType() const;
/// Return operands of this SCEV expression.
ArrayRef<const SCEV *> operands() const;
/// Return true if the expression is a constant zero.
bool isZero() const;
/// Return true if the expression is a constant one.
bool isOne() const;
/// Return true if the expression is a constant all-ones value.
bool isAllOnesValue() const;
/// Return true if the specified scev is negated, but not a constant.
bool isNonConstantNegative() const;
// Returns estimated size of the mathematical expression represented by this
// SCEV. The rules of its calculation are following:
// 1) Size of a SCEV without operands (like constants and SCEVUnknown) is 1;
// 2) Size SCEV with operands Op1, Op2, ..., OpN is calculated by formula:
// (1 + Size(Op1) + ... + Size(OpN)).
// This value gives us an estimation of time we need to traverse through this
// SCEV and all its operands recursively. We may use it to avoid performing
// heavy transformations on SCEVs of excessive size for sake of saving the
// compilation time.
unsigned short getExpressionSize() const {
return ExpressionSize;
}
/// Print out the internal representation of this scalar to the specified
/// stream. This should really only be used for debugging purposes.
void print(raw_ostream &OS) const;
/// This method is used for debugging.
void dump() const;
};
// Specialize FoldingSetTrait for SCEV to avoid needing to compute
// temporary FoldingSetNodeID values.
template <> struct FoldingSetTrait<SCEV> : DefaultFoldingSetTrait<SCEV> {
static void Profile(const SCEV &X, FoldingSetNodeID &ID) { ID = X.FastID; }
static bool Equals(const SCEV &X, const FoldingSetNodeID &ID, unsigned IDHash,
FoldingSetNodeID &TempID) {
return ID == X.FastID;
}
static unsigned ComputeHash(const SCEV &X, FoldingSetNodeID &TempID) {
return X.FastID.ComputeHash();
}
};
inline raw_ostream &operator<<(raw_ostream &OS, const SCEV &S) {
S.print(OS);
return OS;
}
/// An object of this class is returned by queries that could not be answered.
/// For example, if you ask for the number of iterations of a linked-list
/// traversal loop, you will get one of these. None of the standard SCEV
/// operations are valid on this class, it is just a marker.
struct SCEVCouldNotCompute : public SCEV {
SCEVCouldNotCompute();
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S);
};
/// This class represents an assumption made using SCEV expressions which can
/// be checked at run-time.
class SCEVPredicate : public FoldingSetNode {
friend struct FoldingSetTrait<SCEVPredicate>;
/// A reference to an Interned FoldingSetNodeID for this node. The
/// ScalarEvolution's BumpPtrAllocator holds the data.
FoldingSetNodeIDRef FastID;
public:
enum SCEVPredicateKind { P_Union, P_Compare, P_Wrap };
protected:
SCEVPredicateKind Kind;
~SCEVPredicate() = default;
SCEVPredicate(const SCEVPredicate &) = default;
SCEVPredicate &operator=(const SCEVPredicate &) = default;
public:
SCEVPredicate(const FoldingSetNodeIDRef ID, SCEVPredicateKind Kind);
SCEVPredicateKind getKind() const { return Kind; }
/// Returns the estimated complexity of this predicate. This is roughly
/// measured in the number of run-time checks required.
virtual unsigned getComplexity() const { return 1; }
/// Returns true if the predicate is always true. This means that no
/// assumptions were made and nothing needs to be checked at run-time.
virtual bool isAlwaysTrue() const = 0;
/// Returns true if this predicate implies \p N.
virtual bool implies(const SCEVPredicate *N) const = 0;
/// Prints a textual representation of this predicate with an indentation of
/// \p Depth.
virtual void print(raw_ostream &OS, unsigned Depth = 0) const = 0;
};
inline raw_ostream &operator<<(raw_ostream &OS, const SCEVPredicate &P) {
P.print(OS);
return OS;
}
// Specialize FoldingSetTrait for SCEVPredicate to avoid needing to compute
// temporary FoldingSetNodeID values.
template <>
struct FoldingSetTrait<SCEVPredicate> : DefaultFoldingSetTrait<SCEVPredicate> {
static void Profile(const SCEVPredicate &X, FoldingSetNodeID &ID) {
ID = X.FastID;
}
static bool Equals(const SCEVPredicate &X, const FoldingSetNodeID &ID,
unsigned IDHash, FoldingSetNodeID &TempID) {
return ID == X.FastID;
}
static unsigned ComputeHash(const SCEVPredicate &X,
FoldingSetNodeID &TempID) {
return X.FastID.ComputeHash();
}
};
/// This class represents an assumption that the expression LHS Pred RHS
/// evaluates to true, and this can be checked at run-time.
class SCEVComparePredicate final : public SCEVPredicate {
/// We assume that LHS Pred RHS is true.
const ICmpInst::Predicate Pred;
const SCEV *LHS;
const SCEV *RHS;
public:
SCEVComparePredicate(const FoldingSetNodeIDRef ID,
const ICmpInst::Predicate Pred,
const SCEV *LHS, const SCEV *RHS);
/// Implementation of the SCEVPredicate interface
bool implies(const SCEVPredicate *N) const override;
void print(raw_ostream &OS, unsigned Depth = 0) const override;
bool isAlwaysTrue() const override;
ICmpInst::Predicate getPredicate() const { return Pred; }
/// Returns the left hand side of the predicate.
const SCEV *getLHS() const { return LHS; }
/// Returns the right hand side of the predicate.
const SCEV *getRHS() const { return RHS; }
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEVPredicate *P) {
return P->getKind() == P_Compare;
}
};
/// This class represents an assumption made on an AddRec expression. Given an
/// affine AddRec expression {a,+,b}, we assume that it has the nssw or nusw
/// flags (defined below) in the first X iterations of the loop, where X is a
/// SCEV expression returned by getPredicatedBackedgeTakenCount).
///
/// Note that this does not imply that X is equal to the backedge taken
/// count. This means that if we have a nusw predicate for i32 {0,+,1} with a
/// predicated backedge taken count of X, we only guarantee that {0,+,1} has
/// nusw in the first X iterations. {0,+,1} may still wrap in the loop if we
/// have more than X iterations.
class SCEVWrapPredicate final : public SCEVPredicate {
public:
/// Similar to SCEV::NoWrapFlags, but with slightly different semantics
/// for FlagNUSW. The increment is considered to be signed, and a + b
/// (where b is the increment) is considered to wrap if:
/// zext(a + b) != zext(a) + sext(b)
///
/// If Signed is a function that takes an n-bit tuple and maps to the
/// integer domain as the tuples value interpreted as twos complement,
/// and Unsigned a function that takes an n-bit tuple and maps to the
/// integer domain as as the base two value of input tuple, then a + b
/// has IncrementNUSW iff:
///
/// 0 <= Unsigned(a) + Signed(b) < 2^n
///
/// The IncrementNSSW flag has identical semantics with SCEV::FlagNSW.
///
/// Note that the IncrementNUSW flag is not commutative: if base + inc
/// has IncrementNUSW, then inc + base doesn't neccessarily have this
/// property. The reason for this is that this is used for sign/zero
/// extending affine AddRec SCEV expressions when a SCEVWrapPredicate is
/// assumed. A {base,+,inc} expression is already non-commutative with
/// regards to base and inc, since it is interpreted as:
/// (((base + inc) + inc) + inc) ...
enum IncrementWrapFlags {
IncrementAnyWrap = 0, // No guarantee.
IncrementNUSW = (1 << 0), // No unsigned with signed increment wrap.
IncrementNSSW = (1 << 1), // No signed with signed increment wrap
// (equivalent with SCEV::NSW)
IncrementNoWrapMask = (1 << 2) - 1
};
/// Convenient IncrementWrapFlags manipulation methods.
[[nodiscard]] static SCEVWrapPredicate::IncrementWrapFlags
clearFlags(SCEVWrapPredicate::IncrementWrapFlags Flags,
SCEVWrapPredicate::IncrementWrapFlags OffFlags) {
assert((Flags & IncrementNoWrapMask) == Flags && "Invalid flags value!");
assert((OffFlags & IncrementNoWrapMask) == OffFlags &&
"Invalid flags value!");
return (SCEVWrapPredicate::IncrementWrapFlags)(Flags & ~OffFlags);
}
[[nodiscard]] static SCEVWrapPredicate::IncrementWrapFlags
maskFlags(SCEVWrapPredicate::IncrementWrapFlags Flags, int Mask) {
assert((Flags & IncrementNoWrapMask) == Flags && "Invalid flags value!");
assert((Mask & IncrementNoWrapMask) == Mask && "Invalid mask value!");
return (SCEVWrapPredicate::IncrementWrapFlags)(Flags & Mask);
}
[[nodiscard]] static SCEVWrapPredicate::IncrementWrapFlags
setFlags(SCEVWrapPredicate::IncrementWrapFlags Flags,
SCEVWrapPredicate::IncrementWrapFlags OnFlags) {
assert((Flags & IncrementNoWrapMask) == Flags && "Invalid flags value!");
assert((OnFlags & IncrementNoWrapMask) == OnFlags &&
"Invalid flags value!");
return (SCEVWrapPredicate::IncrementWrapFlags)(Flags | OnFlags);
}
/// Returns the set of SCEVWrapPredicate no wrap flags implied by a
/// SCEVAddRecExpr.
[[nodiscard]] static SCEVWrapPredicate::IncrementWrapFlags
getImpliedFlags(const SCEVAddRecExpr *AR, ScalarEvolution &SE);
private:
const SCEVAddRecExpr *AR;
IncrementWrapFlags Flags;
public:
explicit SCEVWrapPredicate(const FoldingSetNodeIDRef ID,
const SCEVAddRecExpr *AR,
IncrementWrapFlags Flags);
/// Returns the set assumed no overflow flags.
IncrementWrapFlags getFlags() const { return Flags; }
/// Implementation of the SCEVPredicate interface
const SCEVAddRecExpr *getExpr() const;
bool implies(const SCEVPredicate *N) const override;
void print(raw_ostream &OS, unsigned Depth = 0) const override;
bool isAlwaysTrue() const override;
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEVPredicate *P) {
return P->getKind() == P_Wrap;
}
};
/// This class represents a composition of other SCEV predicates, and is the
/// class that most clients will interact with. This is equivalent to a
/// logical "AND" of all the predicates in the union.
///
/// NB! Unlike other SCEVPredicate sub-classes this class does not live in the
/// ScalarEvolution::Preds folding set. This is why the \c add function is sound.
class SCEVUnionPredicate final : public SCEVPredicate {
private:
using PredicateMap =
DenseMap<const SCEV *, SmallVector<const SCEVPredicate *, 4>>;
/// Vector with references to all predicates in this union.
SmallVector<const SCEVPredicate *, 16> Preds;
/// Adds a predicate to this union.
void add(const SCEVPredicate *N);
public:
SCEVUnionPredicate(ArrayRef<const SCEVPredicate *> Preds);
const SmallVectorImpl<const SCEVPredicate *> &getPredicates() const {
return Preds;
}
/// Implementation of the SCEVPredicate interface
bool isAlwaysTrue() const override;
bool implies(const SCEVPredicate *N) const override;
void print(raw_ostream &OS, unsigned Depth) const override;
/// We estimate the complexity of a union predicate as the size number of
/// predicates in the union.
unsigned getComplexity() const override { return Preds.size(); }
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEVPredicate *P) {
return P->getKind() == P_Union;
}
};
/// The main scalar evolution driver. Because client code (intentionally)
/// can't do much with the SCEV objects directly, they must ask this class
/// for services.
class ScalarEvolution {
friend class ScalarEvolutionsTest;
public:
/// An enum describing the relationship between a SCEV and a loop.
enum LoopDisposition {
LoopVariant, ///< The SCEV is loop-variant (unknown).
LoopInvariant, ///< The SCEV is loop-invariant.
LoopComputable ///< The SCEV varies predictably with the loop.
};
/// An enum describing the relationship between a SCEV and a basic block.
enum BlockDisposition {
DoesNotDominateBlock, ///< The SCEV does not dominate the block.
DominatesBlock, ///< The SCEV dominates the block.
ProperlyDominatesBlock ///< The SCEV properly dominates the block.
};
/// Convenient NoWrapFlags manipulation that hides enum casts and is
/// visible in the ScalarEvolution name space.
[[nodiscard]] static SCEV::NoWrapFlags maskFlags(SCEV::NoWrapFlags Flags,
int Mask) {
return (SCEV::NoWrapFlags)(Flags & Mask);
}
[[nodiscard]] static SCEV::NoWrapFlags setFlags(SCEV::NoWrapFlags Flags,
SCEV::NoWrapFlags OnFlags) {
return (SCEV::NoWrapFlags)(Flags | OnFlags);
}
[[nodiscard]] static SCEV::NoWrapFlags
clearFlags(SCEV::NoWrapFlags Flags, SCEV::NoWrapFlags OffFlags) {
return (SCEV::NoWrapFlags)(Flags & ~OffFlags);
}
[[nodiscard]] static bool hasFlags(SCEV::NoWrapFlags Flags,
SCEV::NoWrapFlags TestFlags) {
return TestFlags == maskFlags(Flags, TestFlags);
};
ScalarEvolution(Function &F, TargetLibraryInfo &TLI, AssumptionCache &AC,
DominatorTree &DT, LoopInfo &LI);
ScalarEvolution(ScalarEvolution &&Arg);
~ScalarEvolution();
LLVMContext &getContext() const { return F.getContext(); }
/// Test if values of the given type are analyzable within the SCEV
/// framework. This primarily includes integer types, and it can optionally
/// include pointer types if the ScalarEvolution class has access to
/// target-specific information.
bool isSCEVable(Type *Ty) const;
/// Return the size in bits of the specified type, for which isSCEVable must
/// return true.
uint64_t getTypeSizeInBits(Type *Ty) const;
/// Return a type with the same bitwidth as the given type and which
/// represents how SCEV will treat the given type, for which isSCEVable must
/// return true. For pointer types, this is the pointer-sized integer type.
Type *getEffectiveSCEVType(Type *Ty) const;
// Returns a wider type among {Ty1, Ty2}.
Type *getWiderType(Type *Ty1, Type *Ty2) const;
/// Return true if there exists a point in the program at which both
/// A and B could be operands to the same instruction.
/// SCEV expressions are generally assumed to correspond to instructions
/// which could exists in IR. In general, this requires that there exists
/// a use point in the program where all operands dominate the use.
///
/// Example:
/// loop {
/// if
/// loop { v1 = load @global1; }
/// else
/// loop { v2 = load @global2; }
/// }
/// No SCEV with operand V1, and v2 can exist in this program.
bool instructionCouldExistWitthOperands(const SCEV *A, const SCEV *B);
/// Return true if the SCEV is a scAddRecExpr or it contains
/// scAddRecExpr. The result will be cached in HasRecMap.
bool containsAddRecurrence(const SCEV *S);
/// Is operation \p BinOp between \p LHS and \p RHS provably does not have
/// a signed/unsigned overflow (\p Signed)? If \p CtxI is specified, the
/// no-overflow fact should be true in the context of this instruction.
bool willNotOverflow(Instruction::BinaryOps BinOp, bool Signed,
const SCEV *LHS, const SCEV *RHS,
const Instruction *CtxI = nullptr);
/// Parse NSW/NUW flags from add/sub/mul IR binary operation \p Op into
/// SCEV no-wrap flags, and deduce flag[s] that aren't known yet.
/// Does not mutate the original instruction. Returns std::nullopt if it could
/// not deduce more precise flags than the instruction already has, otherwise
/// returns proven flags.
std::optional<SCEV::NoWrapFlags>
getStrengthenedNoWrapFlagsFromBinOp(const OverflowingBinaryOperator *OBO);
/// Notify this ScalarEvolution that \p User directly uses SCEVs in \p Ops.
void registerUser(const SCEV *User, ArrayRef<const SCEV *> Ops);
/// Return true if the SCEV expression contains an undef value.
bool containsUndefs(const SCEV *S) const;
/// Return true if the SCEV expression contains a Value that has been
/// optimised out and is now a nullptr.
bool containsErasedValue(const SCEV *S) const;
/// Return a SCEV expression for the full generality of the specified
/// expression.
const SCEV *getSCEV(Value *V);
/// Return an existing SCEV for V if there is one, otherwise return nullptr.
const SCEV *getExistingSCEV(Value *V);
const SCEV *getConstant(ConstantInt *V);
const SCEV *getConstant(const APInt &Val);
const SCEV *getConstant(Type *Ty, uint64_t V, bool isSigned = false);
const SCEV *getLosslessPtrToIntExpr(const SCEV *Op, unsigned Depth = 0);
const SCEV *getPtrToIntExpr(const SCEV *Op, Type *Ty);
const SCEV *getTruncateExpr(const SCEV *Op, Type *Ty, unsigned Depth = 0);
const SCEV *getVScale(Type *Ty);
const SCEV *getZeroExtendExpr(const SCEV *Op, Type *Ty, unsigned Depth = 0);
const SCEV *getZeroExtendExprImpl(const SCEV *Op, Type *Ty,
unsigned Depth = 0);
const SCEV *getSignExtendExpr(const SCEV *Op, Type *Ty, unsigned Depth = 0);
const SCEV *getSignExtendExprImpl(const SCEV *Op, Type *Ty,
unsigned Depth = 0);
const SCEV *getCastExpr(SCEVTypes Kind, const SCEV *Op, Type *Ty);
const SCEV *getAnyExtendExpr(const SCEV *Op, Type *Ty);
const SCEV *getAddExpr(SmallVectorImpl<const SCEV *> &Ops,
SCEV::NoWrapFlags Flags = SCEV::FlagAnyWrap,
unsigned Depth = 0);
const SCEV *getAddExpr(const SCEV *LHS, const SCEV *RHS,
SCEV::NoWrapFlags Flags = SCEV::FlagAnyWrap,
unsigned Depth = 0) {
SmallVector<const SCEV *, 2> Ops = {LHS, RHS};
return getAddExpr(Ops, Flags, Depth);
}
const SCEV *getAddExpr(const SCEV *Op0, const SCEV *Op1, const SCEV *Op2,
SCEV::NoWrapFlags Flags = SCEV::FlagAnyWrap,
unsigned Depth = 0) {
SmallVector<const SCEV *, 3> Ops = {Op0, Op1, Op2};
return getAddExpr(Ops, Flags, Depth);
}
const SCEV *getMulExpr(SmallVectorImpl<const SCEV *> &Ops,
SCEV::NoWrapFlags Flags = SCEV::FlagAnyWrap,
unsigned Depth = 0);
const SCEV *getMulExpr(const SCEV *LHS, const SCEV *RHS,
SCEV::NoWrapFlags Flags = SCEV::FlagAnyWrap,
unsigned Depth = 0) {
SmallVector<const SCEV *, 2> Ops = {LHS, RHS};
return getMulExpr(Ops, Flags, Depth);
}
const SCEV *getMulExpr(const SCEV *Op0, const SCEV *Op1, const SCEV *Op2,
SCEV::NoWrapFlags Flags = SCEV::FlagAnyWrap,
unsigned Depth = 0) {
SmallVector<const SCEV *, 3> Ops = {Op0, Op1, Op2};
return getMulExpr(Ops, Flags, Depth);
}
const SCEV *getUDivExpr(const SCEV *LHS, const SCEV *RHS);
const SCEV *getUDivExactExpr(const SCEV *LHS, const SCEV *RHS);
const SCEV *getURemExpr(const SCEV *LHS, const SCEV *RHS);
const SCEV *getAddRecExpr(const SCEV *Start, const SCEV *Step, const Loop *L,
SCEV::NoWrapFlags Flags);
const SCEV *getAddRecExpr(SmallVectorImpl<const SCEV *> &Operands,
const Loop *L, SCEV::NoWrapFlags Flags);
const SCEV *getAddRecExpr(const SmallVectorImpl<const SCEV *> &Operands,
const Loop *L, SCEV::NoWrapFlags Flags) {
SmallVector<const SCEV *, 4> NewOp(Operands.begin(), Operands.end());
return getAddRecExpr(NewOp, L, Flags);
}
/// Checks if \p SymbolicPHI can be rewritten as an AddRecExpr under some
/// Predicates. If successful return these <AddRecExpr, Predicates>;
/// The function is intended to be called from PSCEV (the caller will decide
/// whether to actually add the predicates and carry out the rewrites).
std::optional<std::pair<const SCEV *, SmallVector<const SCEVPredicate *, 3>>>
createAddRecFromPHIWithCasts(const SCEVUnknown *SymbolicPHI);
/// Returns an expression for a GEP
///
/// \p GEP The GEP. The indices contained in the GEP itself are ignored,
/// instead we use IndexExprs.
/// \p IndexExprs The expressions for the indices.
const SCEV *getGEPExpr(GEPOperator *GEP,
const SmallVectorImpl<const SCEV *> &IndexExprs);
const SCEV *getAbsExpr(const SCEV *Op, bool IsNSW);
const SCEV *getMinMaxExpr(SCEVTypes Kind,
SmallVectorImpl<const SCEV *> &Operands);
const SCEV *getSequentialMinMaxExpr(SCEVTypes Kind,
SmallVectorImpl<const SCEV *> &Operands);
const SCEV *getSMaxExpr(const SCEV *LHS, const SCEV *RHS);
const SCEV *getSMaxExpr(SmallVectorImpl<const SCEV *> &Operands);
const SCEV *getUMaxExpr(const SCEV *LHS, const SCEV *RHS);
const SCEV *getUMaxExpr(SmallVectorImpl<const SCEV *> &Operands);
const SCEV *getSMinExpr(const SCEV *LHS, const SCEV *RHS);
const SCEV *getSMinExpr(SmallVectorImpl<const SCEV *> &Operands);
const SCEV *getUMinExpr(const SCEV *LHS, const SCEV *RHS,
bool Sequential = false);
const SCEV *getUMinExpr(SmallVectorImpl<const SCEV *> &Operands,
bool Sequential = false);
const SCEV *getUnknown(Value *V);
const SCEV *getCouldNotCompute();
/// Return a SCEV for the constant 0 of a specific type.
const SCEV *getZero(Type *Ty) { return getConstant(Ty, 0); }
/// Return a SCEV for the constant 1 of a specific type.
const SCEV *getOne(Type *Ty) { return getConstant(Ty, 1); }
/// Return a SCEV for the constant \p Power of two.
const SCEV *getPowerOfTwo(Type *Ty, unsigned Power) {
assert(Power < getTypeSizeInBits(Ty) && "Power out of range");
return getConstant(APInt::getOneBitSet(getTypeSizeInBits(Ty), Power));
}
/// Return a SCEV for the constant -1 of a specific type.
const SCEV *getMinusOne(Type *Ty) {
return getConstant(Ty, -1, /*isSigned=*/true);
}
/// Return an expression for a TypeSize.
const SCEV *getSizeOfExpr(Type *IntTy, TypeSize Size);
/// Return an expression for the alloc size of AllocTy that is type IntTy
const SCEV *getSizeOfExpr(Type *IntTy, Type *AllocTy);
/// Return an expression for the store size of StoreTy that is type IntTy
const SCEV *getStoreSizeOfExpr(Type *IntTy, Type *StoreTy);
/// Return an expression for offsetof on the given field with type IntTy
const SCEV *getOffsetOfExpr(Type *IntTy, StructType *STy, unsigned FieldNo);
/// Return the SCEV object corresponding to -V.
const SCEV *getNegativeSCEV(const SCEV *V,
SCEV::NoWrapFlags Flags = SCEV::FlagAnyWrap);
/// Return the SCEV object corresponding to ~V.
const SCEV *getNotSCEV(const SCEV *V);
/// Return LHS-RHS. Minus is represented in SCEV as A+B*-1.
///
/// If the LHS and RHS are pointers which don't share a common base
/// (according to getPointerBase()), this returns a SCEVCouldNotCompute.
/// To compute the difference between two unrelated pointers, you can
/// explicitly convert the arguments using getPtrToIntExpr(), for pointer
/// types that support it.
const SCEV *getMinusSCEV(const SCEV *LHS, const SCEV *RHS,
SCEV::NoWrapFlags Flags = SCEV::FlagAnyWrap,
unsigned Depth = 0);
/// Compute ceil(N / D). N and D are treated as unsigned values.
///
/// Since SCEV doesn't have native ceiling division, this generates a
/// SCEV expression of the following form:
///
/// umin(N, 1) + floor((N - umin(N, 1)) / D)
///
/// A denominator of zero or poison is handled the same way as getUDivExpr().
const SCEV *getUDivCeilSCEV(const SCEV *N, const SCEV *D);
/// Return a SCEV corresponding to a conversion of the input value to the
/// specified type. If the type must be extended, it is zero extended.
const SCEV *getTruncateOrZeroExtend(const SCEV *V, Type *Ty,
unsigned Depth = 0);
/// Return a SCEV corresponding to a conversion of the input value to the
/// specified type. If the type must be extended, it is sign extended.
const SCEV *getTruncateOrSignExtend(const SCEV *V, Type *Ty,
unsigned Depth = 0);
/// Return a SCEV corresponding to a conversion of the input value to the
/// specified type. If the type must be extended, it is zero extended. The
/// conversion must not be narrowing.
const SCEV *getNoopOrZeroExtend(const SCEV *V, Type *Ty);
/// Return a SCEV corresponding to a conversion of the input value to the
/// specified type. If the type must be extended, it is sign extended. The
/// conversion must not be narrowing.
const SCEV *getNoopOrSignExtend(const SCEV *V, Type *Ty);
/// Return a SCEV corresponding to a conversion of the input value to the
/// specified type. If the type must be extended, it is extended with
/// unspecified bits. The conversion must not be narrowing.
const SCEV *getNoopOrAnyExtend(const SCEV *V, Type *Ty);
/// Return a SCEV corresponding to a conversion of the input value to the
/// specified type. The conversion must not be widening.
const SCEV *getTruncateOrNoop(const SCEV *V, Type *Ty);
/// Promote the operands to the wider of the types using zero-extension, and
/// then perform a umax operation with them.
const SCEV *getUMaxFromMismatchedTypes(const SCEV *LHS, const SCEV *RHS);
/// Promote the operands to the wider of the types using zero-extension, and
/// then perform a umin operation with them.
const SCEV *getUMinFromMismatchedTypes(const SCEV *LHS, const SCEV *RHS,
bool Sequential = false);
/// Promote the operands to the wider of the types using zero-extension, and
/// then perform a umin operation with them. N-ary function.
const SCEV *getUMinFromMismatchedTypes(SmallVectorImpl<const SCEV *> &Ops,
bool Sequential = false);
/// Transitively follow the chain of pointer-type operands until reaching a
/// SCEV that does not have a single pointer operand. This returns a
/// SCEVUnknown pointer for well-formed pointer-type expressions, but corner
/// cases do exist.
const SCEV *getPointerBase(const SCEV *V);
/// Compute an expression equivalent to S - getPointerBase(S).
const SCEV *removePointerBase(const SCEV *S);
/// Return a SCEV expression for the specified value at the specified scope
/// in the program. The L value specifies a loop nest to evaluate the
/// expression at, where null is the top-level or a specified loop is
/// immediately inside of the loop.
///
/// This method can be used to compute the exit value for a variable defined
/// in a loop by querying what the value will hold in the parent loop.
///
/// In the case that a relevant loop exit value cannot be computed, the
/// original value V is returned.
const SCEV *getSCEVAtScope(const SCEV *S, const Loop *L);
/// This is a convenience function which does getSCEVAtScope(getSCEV(V), L).
const SCEV *getSCEVAtScope(Value *V, const Loop *L);
/// Test whether entry to the loop is protected by a conditional between LHS
/// and RHS. This is used to help avoid max expressions in loop trip
/// counts, and to eliminate casts.
bool isLoopEntryGuardedByCond(const Loop *L, ICmpInst::Predicate Pred,
const SCEV *LHS, const SCEV *RHS);
/// Test whether entry to the basic block is protected by a conditional
/// between LHS and RHS.
bool isBasicBlockEntryGuardedByCond(const BasicBlock *BB,
ICmpInst::Predicate Pred, const SCEV *LHS,
const SCEV *RHS);
/// Test whether the backedge of the loop is protected by a conditional
/// between LHS and RHS. This is used to eliminate casts.
bool isLoopBackedgeGuardedByCond(const Loop *L, ICmpInst::Predicate Pred,
const SCEV *LHS, const SCEV *RHS);
/// A version of getTripCountFromExitCount below which always picks an
/// evaluation type which can not result in overflow.
const SCEV *getTripCountFromExitCount(const SCEV *ExitCount);
/// Convert from an "exit count" (i.e. "backedge taken count") to a "trip
/// count". A "trip count" is the number of times the header of the loop
/// will execute if an exit is taken after the specified number of backedges
/// have been taken. (e.g. TripCount = ExitCount + 1). Note that the
/// expression can overflow if ExitCount = UINT_MAX. If EvalTy is not wide
/// enough to hold the result without overflow, result unsigned wraps with
/// 2s-complement semantics. ex: EC = 255 (i8), TC = 0 (i8)
const SCEV *getTripCountFromExitCount(const SCEV *ExitCount, Type *EvalTy,
const Loop *L);
/// Returns the exact trip count of the loop if we can compute it, and
/// the result is a small constant. '0' is used to represent an unknown
/// or non-constant trip count. Note that a trip count is simply one more
/// than the backedge taken count for the loop.
unsigned getSmallConstantTripCount(const Loop *L);
/// Return the exact trip count for this loop if we exit through ExitingBlock.
/// '0' is used to represent an unknown or non-constant trip count. Note
/// that a trip count is simply one more than the backedge taken count for
/// the same exit.
/// This "trip count" assumes that control exits via ExitingBlock. More
/// precisely, it is the number of times that control will reach ExitingBlock
/// before taking the branch. For loops with multiple exits, it may not be
/// the number times that the loop header executes if the loop exits
/// prematurely via another branch.
unsigned getSmallConstantTripCount(const Loop *L,
const BasicBlock *ExitingBlock);
/// Returns the upper bound of the loop trip count as a normal unsigned
/// value.
/// Returns 0 if the trip count is unknown or not constant.
unsigned getSmallConstantMaxTripCount(const Loop *L);
/// Returns the largest constant divisor of the trip count as a normal
/// unsigned value, if possible. This means that the actual trip count is
/// always a multiple of the returned value. Returns 1 if the trip count is
/// unknown or not guaranteed to be the multiple of a constant., Will also
/// return 1 if the trip count is very large (>= 2^32).
/// Note that the argument is an exit count for loop L, NOT a trip count.
unsigned getSmallConstantTripMultiple(const Loop *L,
const SCEV *ExitCount);
/// Returns the largest constant divisor of the trip count of the
/// loop. Will return 1 if no trip count could be computed, or if a
/// divisor could not be found.
unsigned getSmallConstantTripMultiple(const Loop *L);
/// Returns the largest constant divisor of the trip count of this loop as a
/// normal unsigned value, if possible. This means that the actual trip
/// count is always a multiple of the returned value (don't forget the trip
/// count could very well be zero as well!). As explained in the comments
/// for getSmallConstantTripCount, this assumes that control exits the loop
/// via ExitingBlock.
unsigned getSmallConstantTripMultiple(const Loop *L,
const BasicBlock *ExitingBlock);
/// The terms "backedge taken count" and "exit count" are used
/// interchangeably to refer to the number of times the backedge of a loop
/// has executed before the loop is exited.
enum ExitCountKind {
/// An expression exactly describing the number of times the backedge has
/// executed when a loop is exited.
Exact,
/// A constant which provides an upper bound on the exact trip count.
ConstantMaximum,
/// An expression which provides an upper bound on the exact trip count.
SymbolicMaximum,
};
/// Return the number of times the backedge executes before the given exit
/// would be taken; if not exactly computable, return SCEVCouldNotCompute.
/// For a single exit loop, this value is equivelent to the result of
/// getBackedgeTakenCount. The loop is guaranteed to exit (via *some* exit)
/// before the backedge is executed (ExitCount + 1) times. Note that there
/// is no guarantee about *which* exit is taken on the exiting iteration.
const SCEV *getExitCount(const Loop *L, const BasicBlock *ExitingBlock,
ExitCountKind Kind = Exact);
/// If the specified loop has a predictable backedge-taken count, return it,
/// otherwise return a SCEVCouldNotCompute object. The backedge-taken count is
/// the number of times the loop header will be branched to from within the
/// loop, assuming there are no abnormal exists like exception throws. This is
/// one less than the trip count of the loop, since it doesn't count the first
/// iteration, when the header is branched to from outside the loop.
///
/// Note that it is not valid to call this method on a loop without a
/// loop-invariant backedge-taken count (see
/// hasLoopInvariantBackedgeTakenCount).
const SCEV *getBackedgeTakenCount(const Loop *L, ExitCountKind Kind = Exact);
/// Similar to getBackedgeTakenCount, except it will add a set of
/// SCEV predicates to Predicates that are required to be true in order for
/// the answer to be correct. Predicates can be checked with run-time
/// checks and can be used to perform loop versioning.
const SCEV *getPredicatedBackedgeTakenCount(const Loop *L,
SmallVector<const SCEVPredicate *, 4> &Predicates);
/// When successful, this returns a SCEVConstant that is greater than or equal
/// to (i.e. a "conservative over-approximation") of the value returend by
/// getBackedgeTakenCount. If such a value cannot be computed, it returns the
/// SCEVCouldNotCompute object.
const SCEV *getConstantMaxBackedgeTakenCount(const Loop *L) {
return getBackedgeTakenCount(L, ConstantMaximum);
}
/// When successful, this returns a SCEV that is greater than or equal
/// to (i.e. a "conservative over-approximation") of the value returend by
/// getBackedgeTakenCount. If such a value cannot be computed, it returns the
/// SCEVCouldNotCompute object.
const SCEV *getSymbolicMaxBackedgeTakenCount(const Loop *L) {
return getBackedgeTakenCount(L, SymbolicMaximum);
}
/// Return true if the backedge taken count is either the value returned by
/// getConstantMaxBackedgeTakenCount or zero.
bool isBackedgeTakenCountMaxOrZero(const Loop *L);
/// Return true if the specified loop has an analyzable loop-invariant
/// backedge-taken count.
bool hasLoopInvariantBackedgeTakenCount(const Loop *L);
// This method should be called by the client when it made any change that
// would invalidate SCEV's answers, and the client wants to remove all loop
// information held internally by ScalarEvolution. This is intended to be used
// when the alternative to forget a loop is too expensive (i.e. large loop
// bodies).
void forgetAllLoops();
/// This method should be called by the client when it has changed a loop in
/// a way that may effect ScalarEvolution's ability to compute a trip count,
/// or if the loop is deleted. This call is potentially expensive for large
/// loop bodies.
void forgetLoop(const Loop *L);
// This method invokes forgetLoop for the outermost loop of the given loop
// \p L, making ScalarEvolution forget about all this subtree. This needs to
// be done whenever we make a transform that may affect the parameters of the
// outer loop, such as exit counts for branches.
void forgetTopmostLoop(const Loop *L);
/// This method should be called by the client when it has changed a value
/// in a way that may effect its value, or which may disconnect it from a
/// def-use chain linking it to a loop.
void forgetValue(Value *V);
/// Called when the client has changed the disposition of values in
/// this loop.
///
/// We don't have a way to invalidate per-loop dispositions. Clear and
/// recompute is simpler.
void forgetLoopDispositions();
/// Called when the client has changed the disposition of values in
/// a loop or block.
///
/// We don't have a way to invalidate per-loop/per-block dispositions. Clear
/// and recompute is simpler.
void forgetBlockAndLoopDispositions(Value *V = nullptr);
/// Determine the minimum number of zero bits that S is guaranteed to end in
/// (at every loop iteration). It is, at the same time, the minimum number
/// of times S is divisible by 2. For example, given {4,+,8} it returns 2.
/// If S is guaranteed to be 0, it returns the bitwidth of S.
uint32_t getMinTrailingZeros(const SCEV *S);
/// Returns the max constant multiple of S.
APInt getConstantMultiple(const SCEV *S);
// Returns the max constant multiple of S. If S is exactly 0, return 1.
APInt getNonZeroConstantMultiple(const SCEV *S);
/// Determine the unsigned range for a particular SCEV.
/// NOTE: This returns a copy of the reference returned by getRangeRef.
ConstantRange getUnsignedRange(const SCEV *S) {
return getRangeRef(S, HINT_RANGE_UNSIGNED);
}
/// Determine the min of the unsigned range for a particular SCEV.
APInt getUnsignedRangeMin(const SCEV *S) {
return getRangeRef(S, HINT_RANGE_UNSIGNED).getUnsignedMin();
}
/// Determine the max of the unsigned range for a particular SCEV.
APInt getUnsignedRangeMax(const SCEV *S) {
return getRangeRef(S, HINT_RANGE_UNSIGNED).getUnsignedMax();
}
/// Determine the signed range for a particular SCEV.
/// NOTE: This returns a copy of the reference returned by getRangeRef.
ConstantRange getSignedRange(const SCEV *S) {
return getRangeRef(S, HINT_RANGE_SIGNED);
}
/// Determine the min of the signed range for a particular SCEV.
APInt getSignedRangeMin(const SCEV *S) {
return getRangeRef(S, HINT_RANGE_SIGNED).getSignedMin();
}
/// Determine the max of the signed range for a particular SCEV.
APInt getSignedRangeMax(const SCEV *S) {
return getRangeRef(S, HINT_RANGE_SIGNED).getSignedMax();
}
/// Test if the given expression is known to be negative.
bool isKnownNegative(const SCEV *S);
/// Test if the given expression is known to be positive.
bool isKnownPositive(const SCEV *S);
/// Test if the given expression is known to be non-negative.
bool isKnownNonNegative(const SCEV *S);
/// Test if the given expression is known to be non-positive.
bool isKnownNonPositive(const SCEV *S);
/// Test if the given expression is known to be non-zero.
bool isKnownNonZero(const SCEV *S);
/// Splits SCEV expression \p S into two SCEVs. One of them is obtained from
/// \p S by substitution of all AddRec sub-expression related to loop \p L
/// with initial value of that SCEV. The second is obtained from \p S by
/// substitution of all AddRec sub-expressions related to loop \p L with post
/// increment of this AddRec in the loop \p L. In both cases all other AddRec
/// sub-expressions (not related to \p L) remain the same.
/// If the \p S contains non-invariant unknown SCEV the function returns
/// CouldNotCompute SCEV in both values of std::pair.
/// For example, for SCEV S={0, +, 1}<L1> + {0, +, 1}<L2> and loop L=L1
/// the function returns pair:
/// first = {0, +, 1}<L2>
/// second = {1, +, 1}<L1> + {0, +, 1}<L2>
/// We can see that for the first AddRec sub-expression it was replaced with
/// 0 (initial value) for the first element and to {1, +, 1}<L1> (post
/// increment value) for the second one. In both cases AddRec expression
/// related to L2 remains the same.
std::pair<const SCEV *, const SCEV *> SplitIntoInitAndPostInc(const Loop *L,
const SCEV *S);
/// We'd like to check the predicate on every iteration of the most dominated
/// loop between loops used in LHS and RHS.
/// To do this we use the following list of steps:
/// 1. Collect set S all loops on which either LHS or RHS depend.
/// 2. If S is non-empty
/// a. Let PD be the element of S which is dominated by all other elements.
/// b. Let E(LHS) be value of LHS on entry of PD.
/// To get E(LHS), we should just take LHS and replace all AddRecs that are
/// attached to PD on with their entry values.
/// Define E(RHS) in the same way.
/// c. Let B(LHS) be value of L on backedge of PD.
/// To get B(LHS), we should just take LHS and replace all AddRecs that are
/// attached to PD on with their backedge values.
/// Define B(RHS) in the same way.
/// d. Note that E(LHS) and E(RHS) are automatically available on entry of PD,
/// so we can assert on that.
/// e. Return true if isLoopEntryGuardedByCond(Pred, E(LHS), E(RHS)) &&
/// isLoopBackedgeGuardedByCond(Pred, B(LHS), B(RHS))
bool isKnownViaInduction(ICmpInst::Predicate Pred, const SCEV *LHS,
const SCEV *RHS);
/// Test if the given expression is known to satisfy the condition described
/// by Pred, LHS, and RHS.
bool isKnownPredicate(ICmpInst::Predicate Pred, const SCEV *LHS,
const SCEV *RHS);
/// Check whether the condition described by Pred, LHS, and RHS is true or
/// false. If we know it, return the evaluation of this condition. If neither
/// is proved, return std::nullopt.
std::optional<bool> evaluatePredicate(ICmpInst::Predicate Pred,
const SCEV *LHS, const SCEV *RHS);
/// Test if the given expression is known to satisfy the condition described
/// by Pred, LHS, and RHS in the given Context.
bool isKnownPredicateAt(ICmpInst::Predicate Pred, const SCEV *LHS,
const SCEV *RHS, const Instruction *CtxI);
/// Check whether the condition described by Pred, LHS, and RHS is true or
/// false in the given \p Context. If we know it, return the evaluation of
/// this condition. If neither is proved, return std::nullopt.
std::optional<bool> evaluatePredicateAt(ICmpInst::Predicate Pred,
const SCEV *LHS, const SCEV *RHS,
const Instruction *CtxI);
/// Test if the condition described by Pred, LHS, RHS is known to be true on
/// every iteration of the loop of the recurrency LHS.
bool isKnownOnEveryIteration(ICmpInst::Predicate Pred,
const SCEVAddRecExpr *LHS, const SCEV *RHS);
/// Information about the number of loop iterations for which a loop exit's
/// branch condition evaluates to the not-taken path. This is a temporary
/// pair of exact and max expressions that are eventually summarized in
/// ExitNotTakenInfo and BackedgeTakenInfo.
struct ExitLimit {
const SCEV *ExactNotTaken; // The exit is not taken exactly this many times
const SCEV *ConstantMaxNotTaken; // The exit is not taken at most this many
// times
const SCEV *SymbolicMaxNotTaken;
// Not taken either exactly ConstantMaxNotTaken or zero times
bool MaxOrZero = false;
/// A set of predicate guards for this ExitLimit. The result is only valid
/// if all of the predicates in \c Predicates evaluate to 'true' at
/// run-time.
SmallPtrSet<const SCEVPredicate *, 4> Predicates;
void addPredicate(const SCEVPredicate *P) {
assert(!isa<SCEVUnionPredicate>(P) && "Only add leaf predicates here!");
Predicates.insert(P);
}
/// Construct either an exact exit limit from a constant, or an unknown
/// one from a SCEVCouldNotCompute. No other types of SCEVs are allowed
/// as arguments and asserts enforce that internally.
/*implicit*/ ExitLimit(const SCEV *E);
ExitLimit(
const SCEV *E, const SCEV *ConstantMaxNotTaken,
const SCEV *SymbolicMaxNotTaken, bool MaxOrZero,
ArrayRef<const SmallPtrSetImpl<const SCEVPredicate *> *> PredSetList =
std::nullopt);
ExitLimit(const SCEV *E, const SCEV *ConstantMaxNotTaken,
const SCEV *SymbolicMaxNotTaken, bool MaxOrZero,
const SmallPtrSetImpl<const SCEVPredicate *> &PredSet);
/// Test whether this ExitLimit contains any computed information, or
/// whether it's all SCEVCouldNotCompute values.
bool hasAnyInfo() const {
return !isa<SCEVCouldNotCompute>(ExactNotTaken) ||
!isa<SCEVCouldNotCompute>(ConstantMaxNotTaken);
}
/// Test whether this ExitLimit contains all information.
bool hasFullInfo() const {
return !isa<SCEVCouldNotCompute>(ExactNotTaken);
}
};
/// Compute the number of times the backedge of the specified loop will
/// execute if its exit condition were a conditional branch of ExitCond.
///
/// \p ControlsOnlyExit is true if ExitCond directly controls the only exit
/// branch. In this case, we can assume that the loop exits only if the
/// condition is true and can infer that failing to meet the condition prior
/// to integer wraparound results in undefined behavior.
///
/// If \p AllowPredicates is set, this call will try to use a minimal set of
/// SCEV predicates in order to return an exact answer.
ExitLimit computeExitLimitFromCond(const Loop *L, Value *ExitCond,
bool ExitIfTrue, bool ControlsOnlyExit,
bool AllowPredicates = false);
/// A predicate is said to be monotonically increasing if may go from being
/// false to being true as the loop iterates, but never the other way
/// around. A predicate is said to be monotonically decreasing if may go
/// from being true to being false as the loop iterates, but never the other
/// way around.
enum MonotonicPredicateType {
MonotonicallyIncreasing,
MonotonicallyDecreasing
};
/// If, for all loop invariant X, the predicate "LHS `Pred` X" is
/// monotonically increasing or decreasing, returns
/// Some(MonotonicallyIncreasing) and Some(MonotonicallyDecreasing)
/// respectively. If we could not prove either of these facts, returns
/// std::nullopt.
std::optional<MonotonicPredicateType>
getMonotonicPredicateType(const SCEVAddRecExpr *LHS,
ICmpInst::Predicate Pred);
struct LoopInvariantPredicate {
ICmpInst::Predicate Pred;
const SCEV *LHS;
const SCEV *RHS;
LoopInvariantPredicate(ICmpInst::Predicate Pred, const SCEV *LHS,
const SCEV *RHS)
: Pred(Pred), LHS(LHS), RHS(RHS) {}
};
/// If the result of the predicate LHS `Pred` RHS is loop invariant with
/// respect to L, return a LoopInvariantPredicate with LHS and RHS being
/// invariants, available at L's entry. Otherwise, return std::nullopt.
std::optional<LoopInvariantPredicate>
getLoopInvariantPredicate(ICmpInst::Predicate Pred, const SCEV *LHS,
const SCEV *RHS, const Loop *L,
const Instruction *CtxI = nullptr);
/// If the result of the predicate LHS `Pred` RHS is loop invariant with
/// respect to L at given Context during at least first MaxIter iterations,
/// return a LoopInvariantPredicate with LHS and RHS being invariants,
/// available at L's entry. Otherwise, return std::nullopt. The predicate
/// should be the loop's exit condition.
std::optional<LoopInvariantPredicate>
getLoopInvariantExitCondDuringFirstIterations(ICmpInst::Predicate Pred,
const SCEV *LHS,
const SCEV *RHS, const Loop *L,
const Instruction *CtxI,
const SCEV *MaxIter);
std::optional<LoopInvariantPredicate>
getLoopInvariantExitCondDuringFirstIterationsImpl(
ICmpInst::Predicate Pred, const SCEV *LHS, const SCEV *RHS, const Loop *L,
const Instruction *CtxI, const SCEV *MaxIter);
/// Simplify LHS and RHS in a comparison with predicate Pred. Return true
/// iff any changes were made. If the operands are provably equal or
/// unequal, LHS and RHS are set to the same value and Pred is set to either
/// ICMP_EQ or ICMP_NE.
bool SimplifyICmpOperands(ICmpInst::Predicate &Pred, const SCEV *&LHS,
const SCEV *&RHS, unsigned Depth = 0);
/// Return the "disposition" of the given SCEV with respect to the given
/// loop.
LoopDisposition getLoopDisposition(const SCEV *S, const Loop *L);
/// Return true if the value of the given SCEV is unchanging in the
/// specified loop.
bool isLoopInvariant(const SCEV *S, const Loop *L);
/// Determine if the SCEV can be evaluated at loop's entry. It is true if it
/// doesn't depend on a SCEVUnknown of an instruction which is dominated by
/// the header of loop L.
bool isAvailableAtLoopEntry(const SCEV *S, const Loop *L);
/// Return true if the given SCEV changes value in a known way in the
/// specified loop. This property being true implies that the value is
/// variant in the loop AND that we can emit an expression to compute the
/// value of the expression at any particular loop iteration.
bool hasComputableLoopEvolution(const SCEV *S, const Loop *L);
/// Return the "disposition" of the given SCEV with respect to the given
/// block.
BlockDisposition getBlockDisposition(const SCEV *S, const BasicBlock *BB);
/// Return true if elements that makes up the given SCEV dominate the
/// specified basic block.
bool dominates(const SCEV *S, const BasicBlock *BB);
/// Return true if elements that makes up the given SCEV properly dominate
/// the specified basic block.
bool properlyDominates(const SCEV *S, const BasicBlock *BB);
/// Test whether the given SCEV has Op as a direct or indirect operand.
bool hasOperand(const SCEV *S, const SCEV *Op) const;
/// Return the size of an element read or written by Inst.
const SCEV *getElementSize(Instruction *Inst);
void print(raw_ostream &OS) const;
void verify() const;
bool invalidate(Function &F, const PreservedAnalyses &PA,
FunctionAnalysisManager::Invalidator &Inv);
/// Return the DataLayout associated with the module this SCEV instance is
/// operating on.
const DataLayout &getDataLayout() const {
return F.getParent()->getDataLayout();
}
const SCEVPredicate *getEqualPredicate(const SCEV *LHS, const SCEV *RHS);
const SCEVPredicate *getComparePredicate(ICmpInst::Predicate Pred,
const SCEV *LHS, const SCEV *RHS);
const SCEVPredicate *
getWrapPredicate(const SCEVAddRecExpr *AR,
SCEVWrapPredicate::IncrementWrapFlags AddedFlags);
/// Re-writes the SCEV according to the Predicates in \p A.
const SCEV *rewriteUsingPredicate(const SCEV *S, const Loop *L,
const SCEVPredicate &A);
/// Tries to convert the \p S expression to an AddRec expression,
/// adding additional predicates to \p Preds as required.
const SCEVAddRecExpr *convertSCEVToAddRecWithPredicates(
const SCEV *S, const Loop *L,
SmallPtrSetImpl<const SCEVPredicate *> &Preds);
/// Compute \p LHS - \p RHS and returns the result as an APInt if it is a
/// constant, and std::nullopt if it isn't.
///
/// This is intended to be a cheaper version of getMinusSCEV. We can be
/// frugal here since we just bail out of actually constructing and
/// canonicalizing an expression in the cases where the result isn't going
/// to be a constant.
std::optional<APInt> computeConstantDifference(const SCEV *LHS,
const SCEV *RHS);
/// Update no-wrap flags of an AddRec. This may drop the cached info about
/// this AddRec (such as range info) in case if new flags may potentially
/// sharpen it.
void setNoWrapFlags(SCEVAddRecExpr *AddRec, SCEV::NoWrapFlags Flags);
/// Try to apply information from loop guards for \p L to \p Expr.
const SCEV *applyLoopGuards(const SCEV *Expr, const Loop *L);
/// Return true if the loop has no abnormal exits. That is, if the loop
/// is not infinite, it must exit through an explicit edge in the CFG.
/// (As opposed to either a) throwing out of the function or b) entering a
/// well defined infinite loop in some callee.)
bool loopHasNoAbnormalExits(const Loop *L) {
return getLoopProperties(L).HasNoAbnormalExits;
}
/// Return true if this loop is finite by assumption. That is,
/// to be infinite, it must also be undefined.
bool loopIsFiniteByAssumption(const Loop *L);
class FoldID {
const SCEV *Op = nullptr;
const Type *Ty = nullptr;
unsigned short C;
public:
FoldID(SCEVTypes C, const SCEV *Op, const Type *Ty) : Op(Op), Ty(Ty), C(C) {
assert(Op);
assert(Ty);
}
FoldID(unsigned short C) : C(C) {}
unsigned computeHash() const {
return detail::combineHashValue(
C, detail::combineHashValue(reinterpret_cast<uintptr_t>(Op),
reinterpret_cast<uintptr_t>(Ty)));
}
bool operator==(const FoldID &RHS) const {
return std::tie(Op, Ty, C) == std::tie(RHS.Op, RHS.Ty, RHS.C);
}
};
private:
/// A CallbackVH to arrange for ScalarEvolution to be notified whenever a
/// Value is deleted.
class SCEVCallbackVH final : public CallbackVH {
ScalarEvolution *SE;
void deleted() override;
void allUsesReplacedWith(Value *New) override;
public:
SCEVCallbackVH(Value *V, ScalarEvolution *SE = nullptr);
};
friend class SCEVCallbackVH;
friend class SCEVExpander;
friend class SCEVUnknown;
/// The function we are analyzing.
Function &F;
/// Does the module have any calls to the llvm.experimental.guard intrinsic
/// at all? If this is false, we avoid doing work that will only help if
/// thare are guards present in the IR.
bool HasGuards;
/// The target library information for the target we are targeting.
TargetLibraryInfo &TLI;
/// The tracker for \@llvm.assume intrinsics in this function.
AssumptionCache &AC;
/// The dominator tree.
DominatorTree &DT;
/// The loop information for the function we are currently analyzing.
LoopInfo &LI;
/// This SCEV is used to represent unknown trip counts and things.
std::unique_ptr<SCEVCouldNotCompute> CouldNotCompute;
/// The type for HasRecMap.
using HasRecMapType = DenseMap<const SCEV *, bool>;
/// This is a cache to record whether a SCEV contains any scAddRecExpr.
HasRecMapType HasRecMap;
/// The type for ExprValueMap.
using ValueSetVector = SmallSetVector<Value *, 4>;
using ExprValueMapType = DenseMap<const SCEV *, ValueSetVector>;
/// ExprValueMap -- This map records the original values from which
/// the SCEV expr is generated from.
ExprValueMapType ExprValueMap;
/// The type for ValueExprMap.
using ValueExprMapType =
DenseMap<SCEVCallbackVH, const SCEV *, DenseMapInfo<Value *>>;
/// This is a cache of the values we have analyzed so far.
ValueExprMapType ValueExprMap;
/// This is a cache for expressions that got folded to a different existing
/// SCEV.
DenseMap<FoldID, const SCEV *> FoldCache;
DenseMap<const SCEV *, SmallVector<FoldID, 2>> FoldCacheUser;
/// Mark predicate values currently being processed by isImpliedCond.
SmallPtrSet<const Value *, 6> PendingLoopPredicates;
/// Mark SCEVUnknown Phis currently being processed by getRangeRef.
SmallPtrSet<const PHINode *, 6> PendingPhiRanges;
/// Mark SCEVUnknown Phis currently being processed by getRangeRefIter.
SmallPtrSet<const PHINode *, 6> PendingPhiRangesIter;
// Mark SCEVUnknown Phis currently being processed by isImpliedViaMerge.
SmallPtrSet<const PHINode *, 6> PendingMerges;
/// Set to true by isLoopBackedgeGuardedByCond when we're walking the set of
/// conditions dominating the backedge of a loop.
bool WalkingBEDominatingConds = false;
/// Set to true by isKnownPredicateViaSplitting when we're trying to prove a
/// predicate by splitting it into a set of independent predicates.
bool ProvingSplitPredicate = false;
/// Memoized values for the getConstantMultiple
DenseMap<const SCEV *, APInt> ConstantMultipleCache;
/// Return the Value set from which the SCEV expr is generated.
ArrayRef<Value *> getSCEVValues(const SCEV *S);
/// Private helper method for the getConstantMultiple method.
APInt getConstantMultipleImpl(const SCEV *S);
/// Information about the number of times a particular loop exit may be
/// reached before exiting the loop.
struct ExitNotTakenInfo {
PoisoningVH<BasicBlock> ExitingBlock;
const SCEV *ExactNotTaken;
const SCEV *ConstantMaxNotTaken;
const SCEV *SymbolicMaxNotTaken;
SmallPtrSet<const SCEVPredicate *, 4> Predicates;
explicit ExitNotTakenInfo(
PoisoningVH<BasicBlock> ExitingBlock, const SCEV *ExactNotTaken,
const SCEV *ConstantMaxNotTaken, const SCEV *SymbolicMaxNotTaken,
const SmallPtrSet<const SCEVPredicate *, 4> &Predicates)
: ExitingBlock(ExitingBlock), ExactNotTaken(ExactNotTaken),
ConstantMaxNotTaken(ConstantMaxNotTaken),
SymbolicMaxNotTaken(SymbolicMaxNotTaken), Predicates(Predicates) {}
bool hasAlwaysTruePredicate() const {
return Predicates.empty();
}
};
/// Information about the backedge-taken count of a loop. This currently
/// includes an exact count and a maximum count.
///
class BackedgeTakenInfo {
friend class ScalarEvolution;
/// A list of computable exits and their not-taken counts. Loops almost
/// never have more than one computable exit.
SmallVector<ExitNotTakenInfo, 1> ExitNotTaken;
/// Expression indicating the least constant maximum backedge-taken count of
/// the loop that is known, or a SCEVCouldNotCompute. This expression is
/// only valid if the redicates associated with all loop exits are true.
const SCEV *ConstantMax = nullptr;
/// Indicating if \c ExitNotTaken has an element for every exiting block in
/// the loop.
bool IsComplete = false;
/// Expression indicating the least maximum backedge-taken count of the loop
/// that is known, or a SCEVCouldNotCompute. Lazily computed on first query.
const SCEV *SymbolicMax = nullptr;
/// True iff the backedge is taken either exactly Max or zero times.
bool MaxOrZero = false;
bool isComplete() const { return IsComplete; }
const SCEV *getConstantMax() const { return ConstantMax; }
public:
BackedgeTakenInfo() = default;
BackedgeTakenInfo(BackedgeTakenInfo &&) = default;
BackedgeTakenInfo &operator=(BackedgeTakenInfo &&) = default;
using EdgeExitInfo = std::pair<BasicBlock *, ExitLimit>;
/// Initialize BackedgeTakenInfo from a list of exact exit counts.
BackedgeTakenInfo(ArrayRef<EdgeExitInfo> ExitCounts, bool IsComplete,
const SCEV *ConstantMax, bool MaxOrZero);
/// Test whether this BackedgeTakenInfo contains any computed information,
/// or whether it's all SCEVCouldNotCompute values.
bool hasAnyInfo() const {
return !ExitNotTaken.empty() ||
!isa<SCEVCouldNotCompute>(getConstantMax());
}
/// Test whether this BackedgeTakenInfo contains complete information.
bool hasFullInfo() const { return isComplete(); }
/// Return an expression indicating the exact *backedge-taken*
/// count of the loop if it is known or SCEVCouldNotCompute
/// otherwise. If execution makes it to the backedge on every
/// iteration (i.e. there are no abnormal exists like exception
/// throws and thread exits) then this is the number of times the
/// loop header will execute minus one.
///
/// If the SCEV predicate associated with the answer can be different
/// from AlwaysTrue, we must add a (non null) Predicates argument.
/// The SCEV predicate associated with the answer will be added to
/// Predicates. A run-time check needs to be emitted for the SCEV
/// predicate in order for the answer to be valid.
///
/// Note that we should always know if we need to pass a predicate
/// argument or not from the way the ExitCounts vector was computed.
/// If we allowed SCEV predicates to be generated when populating this
/// vector, this information can contain them and therefore a
/// SCEVPredicate argument should be added to getExact.
const SCEV *getExact(const Loop *L, ScalarEvolution *SE,
SmallVector<const SCEVPredicate *, 4> *Predicates = nullptr) const;
/// Return the number of times this loop exit may fall through to the back
/// edge, or SCEVCouldNotCompute. The loop is guaranteed not to exit via
/// this block before this number of iterations, but may exit via another
/// block.
const SCEV *getExact(const BasicBlock *ExitingBlock,
ScalarEvolution *SE) const;
/// Get the constant max backedge taken count for the loop.
const SCEV *getConstantMax(ScalarEvolution *SE) const;
/// Get the constant max backedge taken count for the particular loop exit.
const SCEV *getConstantMax(const BasicBlock *ExitingBlock,
ScalarEvolution *SE) const;
/// Get the symbolic max backedge taken count for the loop.
const SCEV *getSymbolicMax(const Loop *L, ScalarEvolution *SE);
/// Get the symbolic max backedge taken count for the particular loop exit.
const SCEV *getSymbolicMax(const BasicBlock *ExitingBlock,
ScalarEvolution *SE) const;
/// Return true if the number of times this backedge is taken is either the
/// value returned by getConstantMax or zero.
bool isConstantMaxOrZero(ScalarEvolution *SE) const;
};
/// Cache the backedge-taken count of the loops for this function as they
/// are computed.
DenseMap<const Loop *, BackedgeTakenInfo> BackedgeTakenCounts;
/// Cache the predicated backedge-taken count of the loops for this
/// function as they are computed.
DenseMap<const Loop *, BackedgeTakenInfo> PredicatedBackedgeTakenCounts;
/// Loops whose backedge taken counts directly use this non-constant SCEV.
DenseMap<const SCEV *, SmallPtrSet<PointerIntPair<const Loop *, 1, bool>, 4>>
BECountUsers;
/// This map contains entries for all of the PHI instructions that we
/// attempt to compute constant evolutions for. This allows us to avoid
/// potentially expensive recomputation of these properties. An instruction
/// maps to null if we are unable to compute its exit value.
DenseMap<PHINode *, Constant *> ConstantEvolutionLoopExitValue;
/// This map contains entries for all the expressions that we attempt to
/// compute getSCEVAtScope information for, which can be expensive in
/// extreme cases.
DenseMap<const SCEV *, SmallVector<std::pair<const Loop *, const SCEV *>, 2>>
ValuesAtScopes;
/// Reverse map for invalidation purposes: Stores of which SCEV and which
/// loop this is the value-at-scope of.
DenseMap<const SCEV *, SmallVector<std::pair<const Loop *, const SCEV *>, 2>>
ValuesAtScopesUsers;
/// Memoized computeLoopDisposition results.
DenseMap<const SCEV *,
SmallVector<PointerIntPair<const Loop *, 2, LoopDisposition>, 2>>
LoopDispositions;
struct LoopProperties {
/// Set to true if the loop contains no instruction that can abnormally exit
/// the loop (i.e. via throwing an exception, by terminating the thread
/// cleanly or by infinite looping in a called function). Strictly
/// speaking, the last one is not leaving the loop, but is identical to
/// leaving the loop for reasoning about undefined behavior.
bool HasNoAbnormalExits;
/// Set to true if the loop contains no instruction that can have side
/// effects (i.e. via throwing an exception, volatile or atomic access).
bool HasNoSideEffects;
};
/// Cache for \c getLoopProperties.
DenseMap<const Loop *, LoopProperties> LoopPropertiesCache;
/// Return a \c LoopProperties instance for \p L, creating one if necessary.
LoopProperties getLoopProperties(const Loop *L);
bool loopHasNoSideEffects(const Loop *L) {
return getLoopProperties(L).HasNoSideEffects;
}
/// Compute a LoopDisposition value.
LoopDisposition computeLoopDisposition(const SCEV *S, const Loop *L);
/// Memoized computeBlockDisposition results.
DenseMap<
const SCEV *,
SmallVector<PointerIntPair<const BasicBlock *, 2, BlockDisposition>, 2>>
BlockDispositions;
/// Compute a BlockDisposition value.
BlockDisposition computeBlockDisposition(const SCEV *S, const BasicBlock *BB);
/// Stores all SCEV that use a given SCEV as its direct operand.
DenseMap<const SCEV *, SmallPtrSet<const SCEV *, 8> > SCEVUsers;
/// Memoized results from getRange
DenseMap<const SCEV *, ConstantRange> UnsignedRanges;
/// Memoized results from getRange
DenseMap<const SCEV *, ConstantRange> SignedRanges;
/// Used to parameterize getRange
enum RangeSignHint { HINT_RANGE_UNSIGNED, HINT_RANGE_SIGNED };
/// Set the memoized range for the given SCEV.
const ConstantRange &setRange(const SCEV *S, RangeSignHint Hint,
ConstantRange CR) {
DenseMap<const SCEV *, ConstantRange> &Cache =
Hint == HINT_RANGE_UNSIGNED ? UnsignedRanges : SignedRanges;
auto Pair = Cache.try_emplace(S, std::move(CR));
if (!Pair.second)
Pair.first->second = std::move(CR);
return Pair.first->second;
}
/// Determine the range for a particular SCEV.
/// NOTE: This returns a reference to an entry in a cache. It must be
/// copied if its needed for longer.
const ConstantRange &getRangeRef(const SCEV *S, RangeSignHint Hint,
unsigned Depth = 0);
/// Determine the range for a particular SCEV, but evaluates ranges for
/// operands iteratively first.
const ConstantRange &getRangeRefIter(const SCEV *S, RangeSignHint Hint);
/// Determines the range for the affine SCEVAddRecExpr {\p Start,+,\p Step}.
/// Helper for \c getRange.
ConstantRange getRangeForAffineAR(const SCEV *Start, const SCEV *Step,
const APInt &MaxBECount);
/// Determines the range for the affine non-self-wrapping SCEVAddRecExpr {\p
/// Start,+,\p Step}<nw>.
ConstantRange getRangeForAffineNoSelfWrappingAR(const SCEVAddRecExpr *AddRec,
const SCEV *MaxBECount,
unsigned BitWidth,
RangeSignHint SignHint);
/// Try to compute a range for the affine SCEVAddRecExpr {\p Start,+,\p
/// Step} by "factoring out" a ternary expression from the add recurrence.
/// Helper called by \c getRange.
ConstantRange getRangeViaFactoring(const SCEV *Start, const SCEV *Step,
const APInt &MaxBECount);
/// If the unknown expression U corresponds to a simple recurrence, return
/// a constant range which represents the entire recurrence. Note that
/// *add* recurrences with loop invariant steps aren't represented by
/// SCEVUnknowns and thus don't use this mechanism.
ConstantRange getRangeForUnknownRecurrence(const SCEVUnknown *U);
/// We know that there is no SCEV for the specified value. Analyze the
/// expression recursively.
const SCEV *createSCEV(Value *V);
/// We know that there is no SCEV for the specified value. Create a new SCEV
/// for \p V iteratively.
const SCEV *createSCEVIter(Value *V);
/// Collect operands of \p V for which SCEV expressions should be constructed
/// first. Returns a SCEV directly if it can be constructed trivially for \p
/// V.
const SCEV *getOperandsToCreate(Value *V, SmallVectorImpl<Value *> &Ops);
/// Provide the special handling we need to analyze PHI SCEVs.
const SCEV *createNodeForPHI(PHINode *PN);
/// Helper function called from createNodeForPHI.
const SCEV *createAddRecFromPHI(PHINode *PN);
/// A helper function for createAddRecFromPHI to handle simple cases.
const SCEV *createSimpleAffineAddRec(PHINode *PN, Value *BEValueV,
Value *StartValueV);
/// Helper function called from createNodeForPHI.
const SCEV *createNodeFromSelectLikePHI(PHINode *PN);
/// Provide special handling for a select-like instruction (currently this
/// is either a select instruction or a phi node). \p Ty is the type of the
/// instruction being processed, that is assumed equivalent to
/// "Cond ? TrueVal : FalseVal".
std::optional<const SCEV *>
createNodeForSelectOrPHIInstWithICmpInstCond(Type *Ty, ICmpInst *Cond,
Value *TrueVal, Value *FalseVal);
/// See if we can model this select-like instruction via umin_seq expression.
const SCEV *createNodeForSelectOrPHIViaUMinSeq(Value *I, Value *Cond,
Value *TrueVal,
Value *FalseVal);
/// Given a value \p V, which is a select-like instruction (currently this is
/// either a select instruction or a phi node), which is assumed equivalent to
/// Cond ? TrueVal : FalseVal
/// see if we can model it as a SCEV expression.
const SCEV *createNodeForSelectOrPHI(Value *V, Value *Cond, Value *TrueVal,
Value *FalseVal);
/// Provide the special handling we need to analyze GEP SCEVs.
const SCEV *createNodeForGEP(GEPOperator *GEP);
/// Implementation code for getSCEVAtScope; called at most once for each
/// SCEV+Loop pair.
const SCEV *computeSCEVAtScope(const SCEV *S, const Loop *L);
/// Return the BackedgeTakenInfo for the given loop, lazily computing new
/// values if the loop hasn't been analyzed yet. The returned result is
/// guaranteed not to be predicated.
BackedgeTakenInfo &getBackedgeTakenInfo(const Loop *L);
/// Similar to getBackedgeTakenInfo, but will add predicates as required
/// with the purpose of returning complete information.
const BackedgeTakenInfo &getPredicatedBackedgeTakenInfo(const Loop *L);
/// Compute the number of times the specified loop will iterate.
/// If AllowPredicates is set, we will create new SCEV predicates as
/// necessary in order to return an exact answer.
BackedgeTakenInfo computeBackedgeTakenCount(const Loop *L,
bool AllowPredicates = false);
/// Compute the number of times the backedge of the specified loop will
/// execute if it exits via the specified block. If AllowPredicates is set,
/// this call will try to use a minimal set of SCEV predicates in order to
/// return an exact answer.
ExitLimit computeExitLimit(const Loop *L, BasicBlock *ExitingBlock,
bool AllowPredicates = false);
/// Return a symbolic upper bound for the backedge taken count of the loop.
/// This is more general than getConstantMaxBackedgeTakenCount as it returns
/// an arbitrary expression as opposed to only constants.
const SCEV *computeSymbolicMaxBackedgeTakenCount(const Loop *L);
// Helper functions for computeExitLimitFromCond to avoid exponential time
// complexity.
class ExitLimitCache {
// It may look like we need key on the whole (L, ExitIfTrue,
// ControlsOnlyExit, AllowPredicates) tuple, but recursive calls to
// computeExitLimitFromCondCached from computeExitLimitFromCondImpl only
// vary the in \c ExitCond and \c ControlsOnlyExit parameters. We remember
// the initial values of the other values to assert our assumption.
SmallDenseMap<PointerIntPair<Value *, 1>, ExitLimit> TripCountMap;
const Loop *L;
bool ExitIfTrue;
bool AllowPredicates;
public:
ExitLimitCache(const Loop *L, bool ExitIfTrue, bool AllowPredicates)
: L(L), ExitIfTrue(ExitIfTrue), AllowPredicates(AllowPredicates) {}
std::optional<ExitLimit> find(const Loop *L, Value *ExitCond,
bool ExitIfTrue, bool ControlsOnlyExit,
bool AllowPredicates);
void insert(const Loop *L, Value *ExitCond, bool ExitIfTrue,
bool ControlsOnlyExit, bool AllowPredicates,
const ExitLimit &EL);
};
using ExitLimitCacheTy = ExitLimitCache;
ExitLimit computeExitLimitFromCondCached(ExitLimitCacheTy &Cache,
const Loop *L, Value *ExitCond,
bool ExitIfTrue,
bool ControlsOnlyExit,
bool AllowPredicates);
ExitLimit computeExitLimitFromCondImpl(ExitLimitCacheTy &Cache, const Loop *L,
Value *ExitCond, bool ExitIfTrue,
bool ControlsOnlyExit,
bool AllowPredicates);
std::optional<ScalarEvolution::ExitLimit> computeExitLimitFromCondFromBinOp(
ExitLimitCacheTy &Cache, const Loop *L, Value *ExitCond, bool ExitIfTrue,
bool ControlsOnlyExit, bool AllowPredicates);
/// Compute the number of times the backedge of the specified loop will
/// execute if its exit condition were a conditional branch of the ICmpInst
/// ExitCond and ExitIfTrue. If AllowPredicates is set, this call will try
/// to use a minimal set of SCEV predicates in order to return an exact
/// answer.
ExitLimit computeExitLimitFromICmp(const Loop *L, ICmpInst *ExitCond,
bool ExitIfTrue,
bool IsSubExpr,
bool AllowPredicates = false);
/// Variant of previous which takes the components representing an ICmp
/// as opposed to the ICmpInst itself. Note that the prior version can
/// return more precise results in some cases and is preferred when caller
/// has a materialized ICmp.
ExitLimit computeExitLimitFromICmp(const Loop *L, ICmpInst::Predicate Pred,
const SCEV *LHS, const SCEV *RHS,
bool IsSubExpr,
bool AllowPredicates = false);
/// Compute the number of times the backedge of the specified loop will
/// execute if its exit condition were a switch with a single exiting case
/// to ExitingBB.
ExitLimit computeExitLimitFromSingleExitSwitch(const Loop *L,
SwitchInst *Switch,
BasicBlock *ExitingBB,
bool IsSubExpr);
/// Compute the exit limit of a loop that is controlled by a
/// "(IV >> 1) != 0" type comparison. We cannot compute the exact trip
/// count in these cases (since SCEV has no way of expressing them), but we
/// can still sometimes compute an upper bound.
///
/// Return an ExitLimit for a loop whose backedge is guarded by `LHS Pred
/// RHS`.
ExitLimit computeShiftCompareExitLimit(Value *LHS, Value *RHS, const Loop *L,
ICmpInst::Predicate Pred);
/// If the loop is known to execute a constant number of times (the
/// condition evolves only from constants), try to evaluate a few iterations
/// of the loop until we get the exit condition gets a value of ExitWhen
/// (true or false). If we cannot evaluate the exit count of the loop,
/// return CouldNotCompute.
const SCEV *computeExitCountExhaustively(const Loop *L, Value *Cond,
bool ExitWhen);
/// Return the number of times an exit condition comparing the specified
/// value to zero will execute. If not computable, return CouldNotCompute.
/// If AllowPredicates is set, this call will try to use a minimal set of
/// SCEV predicates in order to return an exact answer.
ExitLimit howFarToZero(const SCEV *V, const Loop *L, bool IsSubExpr,
bool AllowPredicates = false);
/// Return the number of times an exit condition checking the specified
/// value for nonzero will execute. If not computable, return
/// CouldNotCompute.
ExitLimit howFarToNonZero(const SCEV *V, const Loop *L);
/// Return the number of times an exit condition containing the specified
/// less-than comparison will execute. If not computable, return
/// CouldNotCompute.
///
/// \p isSigned specifies whether the less-than is signed.
///
/// \p ControlsOnlyExit is true when the LHS < RHS condition directly controls
/// the branch (loops exits only if condition is true). In this case, we can
/// use NoWrapFlags to skip overflow checks.
///
/// If \p AllowPredicates is set, this call will try to use a minimal set of
/// SCEV predicates in order to return an exact answer.
ExitLimit howManyLessThans(const SCEV *LHS, const SCEV *RHS, const Loop *L,
bool isSigned, bool ControlsOnlyExit,
bool AllowPredicates = false);
ExitLimit howManyGreaterThans(const SCEV *LHS, const SCEV *RHS, const Loop *L,
bool isSigned, bool IsSubExpr,
bool AllowPredicates = false);
/// Return a predecessor of BB (which may not be an immediate predecessor)
/// which has exactly one successor from which BB is reachable, or null if
/// no such block is found.
std::pair<const BasicBlock *, const BasicBlock *>
getPredecessorWithUniqueSuccessorForBB(const BasicBlock *BB) const;
/// Test whether the condition described by Pred, LHS, and RHS is true
/// whenever the given FoundCondValue value evaluates to true in given
/// Context. If Context is nullptr, then the found predicate is true
/// everywhere. LHS and FoundLHS may have different type width.
bool isImpliedCond(ICmpInst::Predicate Pred, const SCEV *LHS, const SCEV *RHS,
const Value *FoundCondValue, bool Inverse,
const Instruction *Context = nullptr);
/// Test whether the condition described by Pred, LHS, and RHS is true
/// whenever the given FoundCondValue value evaluates to true in given
/// Context. If Context is nullptr, then the found predicate is true
/// everywhere. LHS and FoundLHS must have same type width.
bool isImpliedCondBalancedTypes(ICmpInst::Predicate Pred, const SCEV *LHS,
const SCEV *RHS,
ICmpInst::Predicate FoundPred,
const SCEV *FoundLHS, const SCEV *FoundRHS,
const Instruction *CtxI);
/// Test whether the condition described by Pred, LHS, and RHS is true
/// whenever the condition described by FoundPred, FoundLHS, FoundRHS is
/// true in given Context. If Context is nullptr, then the found predicate is
/// true everywhere.
bool isImpliedCond(ICmpInst::Predicate Pred, const SCEV *LHS, const SCEV *RHS,
ICmpInst::Predicate FoundPred, const SCEV *FoundLHS,
const SCEV *FoundRHS,
const Instruction *Context = nullptr);
/// Test whether the condition described by Pred, LHS, and RHS is true
/// whenever the condition described by Pred, FoundLHS, and FoundRHS is
/// true in given Context. If Context is nullptr, then the found predicate is
/// true everywhere.
bool isImpliedCondOperands(ICmpInst::Predicate Pred, const SCEV *LHS,
const SCEV *RHS, const SCEV *FoundLHS,
const SCEV *FoundRHS,
const Instruction *Context = nullptr);
/// Test whether the condition described by Pred, LHS, and RHS is true
/// whenever the condition described by Pred, FoundLHS, and FoundRHS is
/// true. Here LHS is an operation that includes FoundLHS as one of its
/// arguments.
bool isImpliedViaOperations(ICmpInst::Predicate Pred,
const SCEV *LHS, const SCEV *RHS,
const SCEV *FoundLHS, const SCEV *FoundRHS,
unsigned Depth = 0);
/// Test whether the condition described by Pred, LHS, and RHS is true.
/// Use only simple non-recursive types of checks, such as range analysis etc.
bool isKnownViaNonRecursiveReasoning(ICmpInst::Predicate Pred,
const SCEV *LHS, const SCEV *RHS);
/// Test whether the condition described by Pred, LHS, and RHS is true
/// whenever the condition described by Pred, FoundLHS, and FoundRHS is
/// true.
bool isImpliedCondOperandsHelper(ICmpInst::Predicate Pred, const SCEV *LHS,
const SCEV *RHS, const SCEV *FoundLHS,
const SCEV *FoundRHS);
/// Test whether the condition described by Pred, LHS, and RHS is true
/// whenever the condition described by Pred, FoundLHS, and FoundRHS is
/// true. Utility function used by isImpliedCondOperands. Tries to get
/// cases like "X `sgt` 0 => X - 1 `sgt` -1".
bool isImpliedCondOperandsViaRanges(ICmpInst::Predicate Pred, const SCEV *LHS,
const SCEV *RHS, const SCEV *FoundLHS,
const SCEV *FoundRHS);
/// Return true if the condition denoted by \p LHS \p Pred \p RHS is implied
/// by a call to @llvm.experimental.guard in \p BB.
bool isImpliedViaGuard(const BasicBlock *BB, ICmpInst::Predicate Pred,
const SCEV *LHS, const SCEV *RHS);
/// Test whether the condition described by Pred, LHS, and RHS is true
/// whenever the condition described by Pred, FoundLHS, and FoundRHS is
/// true.
///
/// This routine tries to rule out certain kinds of integer overflow, and
/// then tries to reason about arithmetic properties of the predicates.
bool isImpliedCondOperandsViaNoOverflow(ICmpInst::Predicate Pred,
const SCEV *LHS, const SCEV *RHS,
const SCEV *FoundLHS,
const SCEV *FoundRHS);
/// Test whether the condition described by Pred, LHS, and RHS is true
/// whenever the condition described by Pred, FoundLHS, and FoundRHS is
/// true.
///
/// This routine tries to weaken the known condition basing on fact that
/// FoundLHS is an AddRec.
bool isImpliedCondOperandsViaAddRecStart(ICmpInst::Predicate Pred,
const SCEV *LHS, const SCEV *RHS,
const SCEV *FoundLHS,
const SCEV *FoundRHS,
const Instruction *CtxI);
/// Test whether the condition described by Pred, LHS, and RHS is true
/// whenever the condition described by Pred, FoundLHS, and FoundRHS is
/// true.
///
/// This routine tries to figure out predicate for Phis which are SCEVUnknown
/// if it is true for every possible incoming value from their respective
/// basic blocks.
bool isImpliedViaMerge(ICmpInst::Predicate Pred,
const SCEV *LHS, const SCEV *RHS,
const SCEV *FoundLHS, const SCEV *FoundRHS,
unsigned Depth);
/// Test whether the condition described by Pred, LHS, and RHS is true
/// whenever the condition described by Pred, FoundLHS, and FoundRHS is
/// true.
///
/// This routine tries to reason about shifts.
bool isImpliedCondOperandsViaShift(ICmpInst::Predicate Pred, const SCEV *LHS,
const SCEV *RHS, const SCEV *FoundLHS,
const SCEV *FoundRHS);
/// If we know that the specified Phi is in the header of its containing
/// loop, we know the loop executes a constant number of times, and the PHI
/// node is just a recurrence involving constants, fold it.
Constant *getConstantEvolutionLoopExitValue(PHINode *PN, const APInt &BEs,
const Loop *L);
/// Test if the given expression is known to satisfy the condition described
/// by Pred and the known constant ranges of LHS and RHS.
bool isKnownPredicateViaConstantRanges(ICmpInst::Predicate Pred,
const SCEV *LHS, const SCEV *RHS);
/// Try to prove the condition described by "LHS Pred RHS" by ruling out
/// integer overflow.
///
/// For instance, this will return true for "A s< (A + C)<nsw>" if C is
/// positive.
bool isKnownPredicateViaNoOverflow(ICmpInst::Predicate Pred, const SCEV *LHS,
const SCEV *RHS);
/// Try to split Pred LHS RHS into logical conjunctions (and's) and try to
/// prove them individually.
bool isKnownPredicateViaSplitting(ICmpInst::Predicate Pred, const SCEV *LHS,
const SCEV *RHS);
/// Try to match the Expr as "(L + R)<Flags>".
bool splitBinaryAdd(const SCEV *Expr, const SCEV *&L, const SCEV *&R,
SCEV::NoWrapFlags &Flags);
/// Forget predicated/non-predicated backedge taken counts for the given loop.
void forgetBackedgeTakenCounts(const Loop *L, bool Predicated);
/// Drop memoized information for all \p SCEVs.
void forgetMemoizedResults(ArrayRef<const SCEV *> SCEVs);
/// Helper for forgetMemoizedResults.
void forgetMemoizedResultsImpl(const SCEV *S);
/// Iterate over instructions in \p Worklist and their users. Erase entries
/// from ValueExprMap and collect SCEV expressions in \p ToForget
void visitAndClearUsers(SmallVectorImpl<Instruction *> &Worklist,
SmallPtrSetImpl<Instruction *> &Visited,
SmallVectorImpl<const SCEV *> &ToForget);
/// Erase Value from ValueExprMap and ExprValueMap.
void eraseValueFromMap(Value *V);
/// Insert V to S mapping into ValueExprMap and ExprValueMap.
void insertValueToMap(Value *V, const SCEV *S);
/// Return false iff given SCEV contains a SCEVUnknown with NULL value-
/// pointer.
bool checkValidity(const SCEV *S) const;
/// Return true if `ExtendOpTy`({`Start`,+,`Step`}) can be proved to be
/// equal to {`ExtendOpTy`(`Start`),+,`ExtendOpTy`(`Step`)}. This is
/// equivalent to proving no signed (resp. unsigned) wrap in
/// {`Start`,+,`Step`} if `ExtendOpTy` is `SCEVSignExtendExpr`
/// (resp. `SCEVZeroExtendExpr`).
template <typename ExtendOpTy>
bool proveNoWrapByVaryingStart(const SCEV *Start, const SCEV *Step,
const Loop *L);
/// Try to prove NSW or NUW on \p AR relying on ConstantRange manipulation.
SCEV::NoWrapFlags proveNoWrapViaConstantRanges(const SCEVAddRecExpr *AR);
/// Try to prove NSW on \p AR by proving facts about conditions known on
/// entry and backedge.
SCEV::NoWrapFlags proveNoSignedWrapViaInduction(const SCEVAddRecExpr *AR);
/// Try to prove NUW on \p AR by proving facts about conditions known on
/// entry and backedge.
SCEV::NoWrapFlags proveNoUnsignedWrapViaInduction(const SCEVAddRecExpr *AR);
std::optional<MonotonicPredicateType>
getMonotonicPredicateTypeImpl(const SCEVAddRecExpr *LHS,
ICmpInst::Predicate Pred);
/// Return SCEV no-wrap flags that can be proven based on reasoning about
/// how poison produced from no-wrap flags on this value (e.g. a nuw add)
/// would trigger undefined behavior on overflow.
SCEV::NoWrapFlags getNoWrapFlagsFromUB(const Value *V);
/// Return a scope which provides an upper bound on the defining scope of
/// 'S'. Specifically, return the first instruction in said bounding scope.
/// Return nullptr if the scope is trivial (function entry).
/// (See scope definition rules associated with flag discussion above)
const Instruction *getNonTrivialDefiningScopeBound(const SCEV *S);
/// Return a scope which provides an upper bound on the defining scope for
/// a SCEV with the operands in Ops. The outparam Precise is set if the
/// bound found is a precise bound (i.e. must be the defining scope.)
const Instruction *getDefiningScopeBound(ArrayRef<const SCEV *> Ops,
bool &Precise);
/// Wrapper around the above for cases which don't care if the bound
/// is precise.
const Instruction *getDefiningScopeBound(ArrayRef<const SCEV *> Ops);
/// Given two instructions in the same function, return true if we can
/// prove B must execute given A executes.
bool isGuaranteedToTransferExecutionTo(const Instruction *A,
const Instruction *B);
/// Return true if the SCEV corresponding to \p I is never poison. Proving
/// this is more complex than proving that just \p I is never poison, since
/// SCEV commons expressions across control flow, and you can have cases
/// like:
///
/// idx0 = a + b;
/// ptr[idx0] = 100;
/// if (<condition>) {
/// idx1 = a +nsw b;
/// ptr[idx1] = 200;
/// }
///
/// where the SCEV expression (+ a b) is guaranteed to not be poison (and
/// hence not sign-overflow) only if "<condition>" is true. Since both
/// `idx0` and `idx1` will be mapped to the same SCEV expression, (+ a b),
/// it is not okay to annotate (+ a b) with <nsw> in the above example.
bool isSCEVExprNeverPoison(const Instruction *I);
/// This is like \c isSCEVExprNeverPoison but it specifically works for
/// instructions that will get mapped to SCEV add recurrences. Return true
/// if \p I will never generate poison under the assumption that \p I is an
/// add recurrence on the loop \p L.
bool isAddRecNeverPoison(const Instruction *I, const Loop *L);
/// Similar to createAddRecFromPHI, but with the additional flexibility of
/// suggesting runtime overflow checks in case casts are encountered.
/// If successful, the analysis records that for this loop, \p SymbolicPHI,
/// which is the UnknownSCEV currently representing the PHI, can be rewritten
/// into an AddRec, assuming some predicates; The function then returns the
/// AddRec and the predicates as a pair, and caches this pair in
/// PredicatedSCEVRewrites.
/// If the analysis is not successful, a mapping from the \p SymbolicPHI to
/// itself (with no predicates) is recorded, and a nullptr with an empty
/// predicates vector is returned as a pair.
std::optional<std::pair<const SCEV *, SmallVector<const SCEVPredicate *, 3>>>
createAddRecFromPHIWithCastsImpl(const SCEVUnknown *SymbolicPHI);
/// Compute the maximum backedge count based on the range of values
/// permitted by Start, End, and Stride. This is for loops of the form
/// {Start, +, Stride} LT End.
///
/// Preconditions:
/// * the induction variable is known to be positive.
/// * the induction variable is assumed not to overflow (i.e. either it
/// actually doesn't, or we'd have to immediately execute UB)
/// We *don't* assert these preconditions so please be careful.
const SCEV *computeMaxBECountForLT(const SCEV *Start, const SCEV *Stride,
const SCEV *End, unsigned BitWidth,
bool IsSigned);
/// Verify if an linear IV with positive stride can overflow when in a
/// less-than comparison, knowing the invariant term of the comparison,
/// the stride.
bool canIVOverflowOnLT(const SCEV *RHS, const SCEV *Stride, bool IsSigned);
/// Verify if an linear IV with negative stride can overflow when in a
/// greater-than comparison, knowing the invariant term of the comparison,
/// the stride.
bool canIVOverflowOnGT(const SCEV *RHS, const SCEV *Stride, bool IsSigned);
/// Get add expr already created or create a new one.
const SCEV *getOrCreateAddExpr(ArrayRef<const SCEV *> Ops,
SCEV::NoWrapFlags Flags);
/// Get mul expr already created or create a new one.
const SCEV *getOrCreateMulExpr(ArrayRef<const SCEV *> Ops,
SCEV::NoWrapFlags Flags);
// Get addrec expr already created or create a new one.
const SCEV *getOrCreateAddRecExpr(ArrayRef<const SCEV *> Ops,
const Loop *L, SCEV::NoWrapFlags Flags);
/// Return x if \p Val is f(x) where f is a 1-1 function.
const SCEV *stripInjectiveFunctions(const SCEV *Val) const;
/// Find all of the loops transitively used in \p S, and fill \p LoopsUsed.
/// A loop is considered "used" by an expression if it contains
/// an add rec on said loop.
void getUsedLoops(const SCEV *S, SmallPtrSetImpl<const Loop *> &LoopsUsed);
/// Try to match the pattern generated by getURemExpr(A, B). If successful,
/// Assign A and B to LHS and RHS, respectively.
bool matchURem(const SCEV *Expr, const SCEV *&LHS, const SCEV *&RHS);
/// Look for a SCEV expression with type `SCEVType` and operands `Ops` in
/// `UniqueSCEVs`. Return if found, else nullptr.
SCEV *findExistingSCEVInCache(SCEVTypes SCEVType, ArrayRef<const SCEV *> Ops);
/// Get reachable blocks in this function, making limited use of SCEV
/// reasoning about conditions.
void getReachableBlocks(SmallPtrSetImpl<BasicBlock *> &Reachable,
Function &F);
/// Return the given SCEV expression with a new set of operands.
/// This preserves the origial nowrap flags.
const SCEV *getWithOperands(const SCEV *S,
SmallVectorImpl<const SCEV *> &NewOps);
FoldingSet<SCEV> UniqueSCEVs;
FoldingSet<SCEVPredicate> UniquePreds;
BumpPtrAllocator SCEVAllocator;
/// This maps loops to a list of addrecs that directly use said loop.
DenseMap<const Loop *, SmallVector<const SCEVAddRecExpr *, 4>> LoopUsers;
/// Cache tentative mappings from UnknownSCEVs in a Loop, to a SCEV expression
/// they can be rewritten into under certain predicates.
DenseMap<std::pair<const SCEVUnknown *, const Loop *>,
std::pair<const SCEV *, SmallVector<const SCEVPredicate *, 3>>>
PredicatedSCEVRewrites;
/// Set of AddRecs for which proving NUW via an induction has already been
/// tried.
SmallPtrSet<const SCEVAddRecExpr *, 16> UnsignedWrapViaInductionTried;
/// Set of AddRecs for which proving NSW via an induction has already been
/// tried.
SmallPtrSet<const SCEVAddRecExpr *, 16> SignedWrapViaInductionTried;
/// The head of a linked list of all SCEVUnknown values that have been
/// allocated. This is used by releaseMemory to locate them all and call
/// their destructors.
SCEVUnknown *FirstUnknown = nullptr;
};
/// Analysis pass that exposes the \c ScalarEvolution for a function.
class ScalarEvolutionAnalysis
: public AnalysisInfoMixin<ScalarEvolutionAnalysis> {
friend AnalysisInfoMixin<ScalarEvolutionAnalysis>;
static AnalysisKey Key;
public:
using Result = ScalarEvolution;
ScalarEvolution run(Function &F, FunctionAnalysisManager &AM);
};
/// Verifier pass for the \c ScalarEvolutionAnalysis results.
class ScalarEvolutionVerifierPass
: public PassInfoMixin<ScalarEvolutionVerifierPass> {
public:
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
/// Printer pass for the \c ScalarEvolutionAnalysis results.
class ScalarEvolutionPrinterPass
: public PassInfoMixin<ScalarEvolutionPrinterPass> {
raw_ostream &OS;
public:
explicit ScalarEvolutionPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
class ScalarEvolutionWrapperPass : public FunctionPass {
std::unique_ptr<ScalarEvolution> SE;
public:
static char ID;
ScalarEvolutionWrapperPass();
ScalarEvolution &getSE() { return *SE; }
const ScalarEvolution &getSE() const { return *SE; }
bool runOnFunction(Function &F) override;
void releaseMemory() override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
void print(raw_ostream &OS, const Module * = nullptr) const override;
void verifyAnalysis() const override;
};
/// An interface layer with SCEV used to manage how we see SCEV expressions
/// for values in the context of existing predicates. We can add new
/// predicates, but we cannot remove them.
///
/// This layer has multiple purposes:
/// - provides a simple interface for SCEV versioning.
/// - guarantees that the order of transformations applied on a SCEV
/// expression for a single Value is consistent across two different
/// getSCEV calls. This means that, for example, once we've obtained
/// an AddRec expression for a certain value through expression
/// rewriting, we will continue to get an AddRec expression for that
/// Value.
/// - lowers the number of expression rewrites.
class PredicatedScalarEvolution {
public:
PredicatedScalarEvolution(ScalarEvolution &SE, Loop &L);
const SCEVPredicate &getPredicate() const;
/// Returns the SCEV expression of V, in the context of the current SCEV
/// predicate. The order of transformations applied on the expression of V
/// returned by ScalarEvolution is guaranteed to be preserved, even when
/// adding new predicates.
const SCEV *getSCEV(Value *V);
/// Get the (predicated) backedge count for the analyzed loop.
const SCEV *getBackedgeTakenCount();
/// Adds a new predicate.
void addPredicate(const SCEVPredicate &Pred);
/// Attempts to produce an AddRecExpr for V by adding additional SCEV
/// predicates. If we can't transform the expression into an AddRecExpr we
/// return nullptr and not add additional SCEV predicates to the current
/// context.
const SCEVAddRecExpr *getAsAddRec(Value *V);
/// Proves that V doesn't overflow by adding SCEV predicate.
void setNoOverflow(Value *V, SCEVWrapPredicate::IncrementWrapFlags Flags);
/// Returns true if we've proved that V doesn't wrap by means of a SCEV
/// predicate.
bool hasNoOverflow(Value *V, SCEVWrapPredicate::IncrementWrapFlags Flags);
/// Returns the ScalarEvolution analysis used.
ScalarEvolution *getSE() const { return &SE; }
/// We need to explicitly define the copy constructor because of FlagsMap.
PredicatedScalarEvolution(const PredicatedScalarEvolution &);
/// Print the SCEV mappings done by the Predicated Scalar Evolution.
/// The printed text is indented by \p Depth.
void print(raw_ostream &OS, unsigned Depth) const;
/// Check if \p AR1 and \p AR2 are equal, while taking into account
/// Equal predicates in Preds.
bool areAddRecsEqualWithPreds(const SCEVAddRecExpr *AR1,
const SCEVAddRecExpr *AR2) const;
private:
/// Increments the version number of the predicate. This needs to be called
/// every time the SCEV predicate changes.
void updateGeneration();
/// Holds a SCEV and the version number of the SCEV predicate used to
/// perform the rewrite of the expression.
using RewriteEntry = std::pair<unsigned, const SCEV *>;
/// Maps a SCEV to the rewrite result of that SCEV at a certain version
/// number. If this number doesn't match the current Generation, we will
/// need to do a rewrite. To preserve the transformation order of previous
/// rewrites, we will rewrite the previous result instead of the original
/// SCEV.
DenseMap<const SCEV *, RewriteEntry> RewriteMap;
/// Records what NoWrap flags we've added to a Value *.
ValueMap<Value *, SCEVWrapPredicate::IncrementWrapFlags> FlagsMap;
/// The ScalarEvolution analysis.
ScalarEvolution &SE;
/// The analyzed Loop.
const Loop &L;
/// The SCEVPredicate that forms our context. We will rewrite all
/// expressions assuming that this predicate true.
std::unique_ptr<SCEVUnionPredicate> Preds;
/// Marks the version of the SCEV predicate used. When rewriting a SCEV
/// expression we mark it with the version of the predicate. We use this to
/// figure out if the predicate has changed from the last rewrite of the
/// SCEV. If so, we need to perform a new rewrite.
unsigned Generation = 0;
/// The backedge taken count.
const SCEV *BackedgeCount = nullptr;
};
template <> struct DenseMapInfo<ScalarEvolution::FoldID> {
static inline ScalarEvolution::FoldID getEmptyKey() {
ScalarEvolution::FoldID ID(0);
return ID;
}
static inline ScalarEvolution::FoldID getTombstoneKey() {
ScalarEvolution::FoldID ID(1);
return ID;
}
static unsigned getHashValue(const ScalarEvolution::FoldID &Val) {
return Val.computeHash();
}
static bool isEqual(const ScalarEvolution::FoldID &LHS,
const ScalarEvolution::FoldID &RHS) {
return LHS == RHS;
}
};
} // end namespace llvm
#endif // LLVM_ANALYSIS_SCALAREVOLUTION_H
PK iwFZޒ�!� � ( Analysis/InstructionPrecedenceTracking.hnu �[��� //===-- InstructionPrecedenceTracking.h -------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// Implements a class that is able to define some instructions as "special"
// (e.g. as having implicit control flow, or writing memory, or having another
// interesting property) and then efficiently answers queries of the types:
// 1. Are there any special instructions in the block of interest?
// 2. Return first of the special instructions in the given block;
// 3. Check if the given instruction is preceeded by the first special
// instruction in the same block.
// The class provides caching that allows to answer these queries quickly. The
// user must make sure that the cached data is invalidated properly whenever
// a content of some tracked block is changed.
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_INSTRUCTIONPRECEDENCETRACKING_H
#define LLVM_ANALYSIS_INSTRUCTIONPRECEDENCETRACKING_H
#include "llvm/ADT/DenseMap.h"
namespace llvm {
class BasicBlock;
class Instruction;
class InstructionPrecedenceTracking {
// Maps a block to the topmost special instruction in it. If the value is
// nullptr, it means that it is known that this block does not contain any
// special instructions.
DenseMap<const BasicBlock *, const Instruction *> FirstSpecialInsts;
// Fills information about the given block's special instructions.
void fill(const BasicBlock *BB);
#ifndef NDEBUG
/// Asserts that the cached info for \p BB is up-to-date. This helps to catch
/// the usage error of accessing a block without properly invalidating after a
/// previous transform.
void validate(const BasicBlock *BB) const;
/// Asserts whether or not the contents of this tracking is up-to-date. This
/// helps to catch the usage error of accessing a block without properly
/// invalidating after a previous transform.
void validateAll() const;
#endif
protected:
/// Returns the topmost special instruction from the block \p BB. Returns
/// nullptr if there is no special instructions in the block.
const Instruction *getFirstSpecialInstruction(const BasicBlock *BB);
/// Returns true iff at least one instruction from the basic block \p BB is
/// special.
bool hasSpecialInstructions(const BasicBlock *BB);
/// Returns true iff the first special instruction of \p Insn's block exists
/// and dominates \p Insn.
bool isPreceededBySpecialInstruction(const Instruction *Insn);
/// A predicate that defines whether or not the instruction \p Insn is
/// considered special and needs to be tracked. Implementing this method in
/// children classes allows to implement tracking of implicit control flow,
/// memory writing instructions or any other kinds of instructions we might
/// be interested in.
virtual bool isSpecialInstruction(const Instruction *Insn) const = 0;
virtual ~InstructionPrecedenceTracking() = default;
public:
/// Notifies this tracking that we are going to insert a new instruction \p
/// Inst to the basic block \p BB. It makes all necessary updates to internal
/// caches to keep them consistent.
void insertInstructionTo(const Instruction *Inst, const BasicBlock *BB);
/// Notifies this tracking that we are going to remove the instruction \p Inst
/// It makes all necessary updates to internal caches to keep them consistent.
void removeInstruction(const Instruction *Inst);
/// Notifies this tracking that we are going to replace all uses of \p Inst.
/// It makes all necessary updates to internal caches to keep them consistent.
/// Should typically be called before a RAUW.
void removeUsersOf(const Instruction *Inst);
/// Invalidates all information from this tracking.
void clear();
};
/// This class allows to keep track on instructions with implicit control flow.
/// These are instructions that may not pass execution to their successors. For
/// example, throwing calls and guards do not always do this. If we need to know
/// for sure that some instruction is guaranteed to execute if the given block
/// is reached, then we need to make sure that there is no implicit control flow
/// instruction (ICFI) preceding it. For example, this check is required if we
/// perform PRE moving non-speculable instruction to other place.
class ImplicitControlFlowTracking : public InstructionPrecedenceTracking {
public:
/// Returns the topmost instruction with implicit control flow from the given
/// basic block. Returns nullptr if there is no such instructions in the block.
const Instruction *getFirstICFI(const BasicBlock *BB) {
return getFirstSpecialInstruction(BB);
}
/// Returns true if at least one instruction from the given basic block has
/// implicit control flow.
bool hasICF(const BasicBlock *BB) {
return hasSpecialInstructions(BB);
}
/// Returns true if the first ICFI of Insn's block exists and dominates Insn.
bool isDominatedByICFIFromSameBlock(const Instruction *Insn) {
return isPreceededBySpecialInstruction(Insn);
}
bool isSpecialInstruction(const Instruction *Insn) const override;
};
class MemoryWriteTracking : public InstructionPrecedenceTracking {
public:
/// Returns the topmost instruction that may write memory from the given
/// basic block. Returns nullptr if there is no such instructions in the block.
const Instruction *getFirstMemoryWrite(const BasicBlock *BB) {
return getFirstSpecialInstruction(BB);
}
/// Returns true if at least one instruction from the given basic block may
/// write memory.
bool mayWriteToMemory(const BasicBlock *BB) {
return hasSpecialInstructions(BB);
}
/// Returns true if the first memory writing instruction of Insn's block
/// exists and dominates Insn.
bool isDominatedByMemoryWriteFromSameBlock(const Instruction *Insn) {
return isPreceededBySpecialInstruction(Insn);
}
bool isSpecialInstruction(const Instruction *Insn) const override;
};
} // llvm
#endif // LLVM_ANALYSIS_INSTRUCTIONPRECEDENCETRACKING_H
PK iwFZ���� � Analysis/DemandedBits.hnu �[��� //===- llvm/Analysis/DemandedBits.h - Determine demanded bits ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This pass implements a demanded bits analysis. A demanded bit is one that
// contributes to a result; bits that are not demanded can be either zero or
// one without affecting control or data flow. For example in this sequence:
//
// %1 = add i32 %x, %y
// %2 = trunc i32 %1 to i16
//
// Only the lowest 16 bits of %1 are demanded; the rest are removed by the
// trunc.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_DEMANDEDBITS_H
#define LLVM_ANALYSIS_DEMANDEDBITS_H
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/IR/PassManager.h"
#include <optional>
namespace llvm {
class AssumptionCache;
class DominatorTree;
class Function;
class Instruction;
struct KnownBits;
class raw_ostream;
class DemandedBits {
public:
DemandedBits(Function &F, AssumptionCache &AC, DominatorTree &DT) :
F(F), AC(AC), DT(DT) {}
/// Return the bits demanded from instruction I.
///
/// For vector instructions individual vector elements are not distinguished:
/// A bit is demanded if it is demanded for any of the vector elements. The
/// size of the return value corresponds to the type size in bits of the
/// scalar type.
///
/// Instructions that do not have integer or vector of integer type are
/// accepted, but will always produce a mask with all bits set.
APInt getDemandedBits(Instruction *I);
/// Return the bits demanded from use U.
APInt getDemandedBits(Use *U);
/// Return true if, during analysis, I could not be reached.
bool isInstructionDead(Instruction *I);
/// Return whether this use is dead by means of not having any demanded bits.
bool isUseDead(Use *U);
void print(raw_ostream &OS);
/// Compute alive bits of one addition operand from alive output and known
/// operand bits
static APInt determineLiveOperandBitsAdd(unsigned OperandNo,
const APInt &AOut,
const KnownBits &LHS,
const KnownBits &RHS);
/// Compute alive bits of one subtraction operand from alive output and known
/// operand bits
static APInt determineLiveOperandBitsSub(unsigned OperandNo,
const APInt &AOut,
const KnownBits &LHS,
const KnownBits &RHS);
private:
void performAnalysis();
void determineLiveOperandBits(const Instruction *UserI,
const Value *Val, unsigned OperandNo,
const APInt &AOut, APInt &AB,
KnownBits &Known, KnownBits &Known2, bool &KnownBitsComputed);
Function &F;
AssumptionCache &AC;
DominatorTree &DT;
bool Analyzed = false;
// The set of visited instructions (non-integer-typed only).
SmallPtrSet<Instruction*, 32> Visited;
DenseMap<Instruction *, APInt> AliveBits;
// Uses with no demanded bits. If the user also has no demanded bits, the use
// might not be stored explicitly in this map, to save memory during analysis.
SmallPtrSet<Use *, 16> DeadUses;
};
/// An analysis that produces \c DemandedBits for a function.
class DemandedBitsAnalysis : public AnalysisInfoMixin<DemandedBitsAnalysis> {
friend AnalysisInfoMixin<DemandedBitsAnalysis>;
static AnalysisKey Key;
public:
/// Provide the result type for this analysis pass.
using Result = DemandedBits;
/// Run the analysis pass over a function and produce demanded bits
/// information.
DemandedBits run(Function &F, FunctionAnalysisManager &AM);
};
/// Printer pass for DemandedBits
class DemandedBitsPrinterPass : public PassInfoMixin<DemandedBitsPrinterPass> {
raw_ostream &OS;
public:
explicit DemandedBitsPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
} // end namespace llvm
#endif // LLVM_ANALYSIS_DEMANDEDBITS_H
PK iwFZ�Њ�� � $ Analysis/OptimizationRemarkEmitter.hnu �[��� //===- OptimizationRemarkEmitter.h - Optimization Diagnostic ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Optimization diagnostic interfaces. It's packaged as an analysis pass so
// that by using this service passes become dependent on BFI as well. BFI is
// used to compute the "hotness" of the diagnostic message.
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_OPTIMIZATIONREMARKEMITTER_H
#define LLVM_ANALYSIS_OPTIMIZATIONREMARKEMITTER_H
#include "llvm/Analysis/BlockFrequencyInfo.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
#include <optional>
namespace llvm {
class Function;
class Value;
/// The optimization diagnostic interface.
///
/// It allows reporting when optimizations are performed and when they are not
/// along with the reasons for it. Hotness information of the corresponding
/// code region can be included in the remark if DiagnosticsHotnessRequested is
/// enabled in the LLVM context.
class OptimizationRemarkEmitter {
public:
OptimizationRemarkEmitter(const Function *F, BlockFrequencyInfo *BFI)
: F(F), BFI(BFI) {}
/// This variant can be used to generate ORE on demand (without the
/// analysis pass).
///
/// Note that this ctor has a very different cost depending on whether
/// F->getContext().getDiagnosticsHotnessRequested() is on or not. If it's off
/// the operation is free.
///
/// Whereas if DiagnosticsHotnessRequested is on, it is fairly expensive
/// operation since BFI and all its required analyses are computed. This is
/// for example useful for CGSCC passes that can't use function analyses
/// passes in the old PM.
OptimizationRemarkEmitter(const Function *F);
OptimizationRemarkEmitter(OptimizationRemarkEmitter &&Arg)
: F(Arg.F), BFI(Arg.BFI) {}
OptimizationRemarkEmitter &operator=(OptimizationRemarkEmitter &&RHS) {
F = RHS.F;
BFI = RHS.BFI;
return *this;
}
/// Handle invalidation events in the new pass manager.
bool invalidate(Function &F, const PreservedAnalyses &PA,
FunctionAnalysisManager::Invalidator &Inv);
/// Return true iff at least *some* remarks are enabled.
bool enabled() const {
return F->getContext().getLLVMRemarkStreamer() ||
F->getContext().getDiagHandlerPtr()->isAnyRemarkEnabled();
}
/// Output the remark via the diagnostic handler and to the
/// optimization record file.
void emit(DiagnosticInfoOptimizationBase &OptDiag);
/// Take a lambda that returns a remark which will be emitted. Second
/// argument is only used to restrict this to functions.
template <typename T>
void emit(T RemarkBuilder, decltype(RemarkBuilder()) * = nullptr) {
// Avoid building the remark unless we know there are at least *some*
// remarks enabled. We can't currently check whether remarks are requested
// for the calling pass since that requires actually building the remark.
if (enabled()) {
auto R = RemarkBuilder();
static_assert(
std::is_base_of<DiagnosticInfoOptimizationBase, decltype(R)>::value,
"the lambda passed to emit() must return a remark");
emit((DiagnosticInfoOptimizationBase &)R);
}
}
/// Whether we allow for extra compile-time budget to perform more
/// analysis to produce fewer false positives.
///
/// This is useful when reporting missed optimizations. In this case we can
/// use the extra analysis (1) to filter trivial false positives or (2) to
/// provide more context so that non-trivial false positives can be quickly
/// detected by the user.
bool allowExtraAnalysis(StringRef PassName) const {
return OptimizationRemarkEmitter::allowExtraAnalysis(*F, PassName);
}
static bool allowExtraAnalysis(const Function &F, StringRef PassName) {
return allowExtraAnalysis(F.getContext(), PassName);
}
static bool allowExtraAnalysis(LLVMContext &Ctx, StringRef PassName) {
return Ctx.getLLVMRemarkStreamer() ||
Ctx.getDiagHandlerPtr()->isAnyRemarkEnabled(PassName);
}
private:
const Function *F;
BlockFrequencyInfo *BFI;
/// If we generate BFI on demand, we need to free it when ORE is freed.
std::unique_ptr<BlockFrequencyInfo> OwnedBFI;
/// Compute hotness from IR value (currently assumed to be a block) if PGO is
/// available.
std::optional<uint64_t> computeHotness(const Value *V);
/// Similar but use value from \p OptDiag and update hotness there.
void computeHotness(DiagnosticInfoIROptimization &OptDiag);
/// Only allow verbose messages if we know we're filtering by hotness
/// (BFI is only set in this case).
bool shouldEmitVerbose() { return BFI != nullptr; }
OptimizationRemarkEmitter(const OptimizationRemarkEmitter &) = delete;
void operator=(const OptimizationRemarkEmitter &) = delete;
};
/// Add a small namespace to avoid name clashes with the classes used in
/// the streaming interface. We want these to be short for better
/// write/readability.
namespace ore {
using NV = DiagnosticInfoOptimizationBase::Argument;
using setIsVerbose = DiagnosticInfoOptimizationBase::setIsVerbose;
using setExtraArgs = DiagnosticInfoOptimizationBase::setExtraArgs;
}
/// OptimizationRemarkEmitter legacy analysis pass
///
/// Note that this pass shouldn't generally be marked as preserved by other
/// passes. It's holding onto BFI, so if the pass does not preserve BFI, BFI
/// could be freed.
class OptimizationRemarkEmitterWrapperPass : public FunctionPass {
std::unique_ptr<OptimizationRemarkEmitter> ORE;
public:
OptimizationRemarkEmitterWrapperPass();
bool runOnFunction(Function &F) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
OptimizationRemarkEmitter &getORE() {
assert(ORE && "pass not run yet");
return *ORE;
}
static char ID;
};
class OptimizationRemarkEmitterAnalysis
: public AnalysisInfoMixin<OptimizationRemarkEmitterAnalysis> {
friend AnalysisInfoMixin<OptimizationRemarkEmitterAnalysis>;
static AnalysisKey Key;
public:
/// Provide the result typedef for this analysis pass.
typedef OptimizationRemarkEmitter Result;
/// Run the analysis pass over a function and produce BFI.
Result run(Function &F, FunctionAnalysisManager &AM);
};
}
#endif // LLVM_ANALYSIS_OPTIMIZATIONREMARKEMITTER_H
PK iwFZ8�@J� � Analysis/Interval.hnu �[��� //===- llvm/Analysis/Interval.h - Interval Class Declaration ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the declaration of the Interval class, which
// represents a set of CFG nodes and is a portion of an interval partition.
//
// Intervals have some interesting and useful properties, including the
// following:
// 1. The header node of an interval dominates all of the elements of the
// interval
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_INTERVAL_H
#define LLVM_ANALYSIS_INTERVAL_H
#include "llvm/ADT/GraphTraits.h"
#include <vector>
namespace llvm {
class BasicBlock;
class raw_ostream;
//===----------------------------------------------------------------------===//
//
/// Interval Class - An Interval is a set of nodes defined such that every node
/// in the interval has all of its predecessors in the interval (except for the
/// header)
///
class Interval {
/// HeaderNode - The header BasicBlock, which dominates all BasicBlocks in this
/// interval. Also, any loops in this interval must go through the HeaderNode.
///
BasicBlock *HeaderNode;
public:
using succ_iterator = std::vector<BasicBlock*>::iterator;
using pred_iterator = std::vector<BasicBlock*>::iterator;
using node_iterator = std::vector<BasicBlock*>::iterator;
inline Interval(BasicBlock *Header) : HeaderNode(Header) {
Nodes.push_back(Header);
}
inline BasicBlock *getHeaderNode() const { return HeaderNode; }
/// Nodes - The basic blocks in this interval.
std::vector<BasicBlock*> Nodes;
/// Successors - List of BasicBlocks that are reachable directly from nodes in
/// this interval, but are not in the interval themselves.
/// These nodes necessarily must be header nodes for other intervals.
std::vector<BasicBlock*> Successors;
/// Predecessors - List of BasicBlocks that have this Interval's header block
/// as one of their successors.
std::vector<BasicBlock*> Predecessors;
/// contains - Find out if a basic block is in this interval
inline bool contains(BasicBlock *BB) const {
for (BasicBlock *Node : Nodes)
if (Node == BB)
return true;
return false;
// I don't want the dependency on <algorithm>
//return find(Nodes.begin(), Nodes.end(), BB) != Nodes.end();
}
/// isSuccessor - find out if a basic block is a successor of this Interval
inline bool isSuccessor(BasicBlock *BB) const {
for (BasicBlock *Successor : Successors)
if (Successor == BB)
return true;
return false;
// I don't want the dependency on <algorithm>
//return find(Successors.begin(), Successors.end(), BB) != Successors.end();
}
/// Equality operator. It is only valid to compare two intervals from the
/// same partition, because of this, all we have to check is the header node
/// for equality.
inline bool operator==(const Interval &I) const {
return HeaderNode == I.HeaderNode;
}
/// print - Show contents in human readable format...
void print(raw_ostream &O) const;
};
/// succ_begin/succ_end - define methods so that Intervals may be used
/// just like BasicBlocks can with the succ_* functions, and *::succ_iterator.
///
inline Interval::succ_iterator succ_begin(Interval *I) {
return I->Successors.begin();
}
inline Interval::succ_iterator succ_end(Interval *I) {
return I->Successors.end();
}
/// pred_begin/pred_end - define methods so that Intervals may be used
/// just like BasicBlocks can with the pred_* functions, and *::pred_iterator.
///
inline Interval::pred_iterator pred_begin(Interval *I) {
return I->Predecessors.begin();
}
inline Interval::pred_iterator pred_end(Interval *I) {
return I->Predecessors.end();
}
template <> struct GraphTraits<Interval*> {
using NodeRef = Interval *;
using ChildIteratorType = Interval::succ_iterator;
static NodeRef getEntryNode(Interval *I) { return I; }
/// nodes_iterator/begin/end - Allow iteration over all nodes in the graph
static ChildIteratorType child_begin(NodeRef N) { return succ_begin(N); }
static ChildIteratorType child_end(NodeRef N) { return succ_end(N); }
};
template <> struct GraphTraits<Inverse<Interval*>> {
using NodeRef = Interval *;
using ChildIteratorType = Interval::pred_iterator;
static NodeRef getEntryNode(Inverse<Interval *> G) { return G.Graph; }
static ChildIteratorType child_begin(NodeRef N) { return pred_begin(N); }
static ChildIteratorType child_end(NodeRef N) { return pred_end(N); }
};
} // end namespace llvm
#endif // LLVM_ANALYSIS_INTERVAL_H
PK iwFZ�=)��0 �0 Analysis/MemoryBuiltins.hnu �[��� //==- llvm/Analysis/MemoryBuiltins.h - Calls to memory builtins --*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This family of functions identifies calls to builtin functions that allocate
// or free memory.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_MEMORYBUILTINS_H
#define LLVM_ANALYSIS_MEMORYBUILTINS_H
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/Analysis/TargetFolder.h"
#include "llvm/Analysis/TargetLibraryInfo.h"
#include "llvm/IR/IRBuilder.h"
#include "llvm/IR/InstVisitor.h"
#include "llvm/IR/ValueHandle.h"
#include <cstdint>
#include <optional>
#include <utility>
namespace llvm {
class AllocaInst;
class AAResults;
class Argument;
class ConstantPointerNull;
class DataLayout;
class ExtractElementInst;
class ExtractValueInst;
class GEPOperator;
class GlobalAlias;
class GlobalVariable;
class Instruction;
class IntegerType;
class IntrinsicInst;
class IntToPtrInst;
class LLVMContext;
class LoadInst;
class PHINode;
class SelectInst;
class Type;
class UndefValue;
class Value;
/// Tests if a value is a call or invoke to a library function that
/// allocates or reallocates memory (either malloc, calloc, realloc, or strdup
/// like).
bool isAllocationFn(const Value *V, const TargetLibraryInfo *TLI);
bool isAllocationFn(const Value *V,
function_ref<const TargetLibraryInfo &(Function &)> GetTLI);
/// Tests if a value is a call or invoke to a library function that
/// allocates memory via new.
bool isNewLikeFn(const Value *V, const TargetLibraryInfo *TLI);
/// Tests if a value is a call or invoke to a library function that
/// allocates memory similar to malloc or calloc.
bool isMallocOrCallocLikeFn(const Value *V, const TargetLibraryInfo *TLI);
/// Tests if a value is a call or invoke to a library function that
/// allocates memory (either malloc, calloc, or strdup like).
bool isAllocLikeFn(const Value *V, const TargetLibraryInfo *TLI);
/// Tests if a function is a call or invoke to a library function that
/// reallocates memory (e.g., realloc).
bool isReallocLikeFn(const Function *F);
/// If this is a call to a realloc function, return the reallocated operand.
Value *getReallocatedOperand(const CallBase *CB);
//===----------------------------------------------------------------------===//
// free Call Utility Functions.
//
/// isLibFreeFunction - Returns true if the function is a builtin free()
bool isLibFreeFunction(const Function *F, const LibFunc TLIFn);
/// If this if a call to a free function, return the freed operand.
Value *getFreedOperand(const CallBase *CB, const TargetLibraryInfo *TLI);
//===----------------------------------------------------------------------===//
// Properties of allocation functions
//
/// Return true if this is a call to an allocation function that does not have
/// side effects that we are required to preserve beyond the effect of
/// allocating a new object.
/// Ex: If our allocation routine has a counter for the number of objects
/// allocated, and the program prints it on exit, can the value change due
/// to optimization? Answer is highly language dependent.
/// Note: *Removable* really does mean removable; it does not mean observable.
/// A language (e.g. C++) can allow removing allocations without allowing
/// insertion or speculative execution of allocation routines.
bool isRemovableAlloc(const CallBase *V, const TargetLibraryInfo *TLI);
/// Gets the alignment argument for an aligned_alloc-like function, using either
/// built-in knowledge based on fuction names/signatures or allocalign
/// attributes. Note: the Value returned may not indicate a valid alignment, per
/// the definition of the allocalign attribute.
Value *getAllocAlignment(const CallBase *V, const TargetLibraryInfo *TLI);
/// Return the size of the requested allocation. With a trivial mapper, this is
/// similar to calling getObjectSize(..., Exact), but without looking through
/// calls that return their argument. A mapper function can be used to replace
/// one Value* (operand to the allocation) with another. This is useful when
/// doing abstract interpretation.
std::optional<APInt> getAllocSize(
const CallBase *CB, const TargetLibraryInfo *TLI,
function_ref<const Value *(const Value *)> Mapper = [](const Value *V) {
return V;
});
/// If this is a call to an allocation function that initializes memory to a
/// fixed value, return said value in the requested type. Otherwise, return
/// nullptr.
Constant *getInitialValueOfAllocation(const Value *V,
const TargetLibraryInfo *TLI,
Type *Ty);
/// If a function is part of an allocation family (e.g.
/// malloc/realloc/calloc/free), return the identifier for its family
/// of functions.
std::optional<StringRef> getAllocationFamily(const Value *I,
const TargetLibraryInfo *TLI);
//===----------------------------------------------------------------------===//
// Utility functions to compute size of objects.
//
/// Various options to control the behavior of getObjectSize.
struct ObjectSizeOpts {
/// Controls how we handle conditional statements with unknown conditions.
enum class Mode : uint8_t {
/// All branches must be known and have the same size, starting from the
/// offset, to be merged.
ExactSizeFromOffset,
/// All branches must be known and have the same underlying size and offset
/// to be merged.
ExactUnderlyingSizeAndOffset,
/// Evaluate all branches of an unknown condition. If all evaluations
/// succeed, pick the minimum size.
Min,
/// Same as Min, except we pick the maximum size of all of the branches.
Max,
};
/// How we want to evaluate this object's size.
Mode EvalMode = Mode::ExactSizeFromOffset;
/// Whether to round the result up to the alignment of allocas, byval
/// arguments, and global variables.
bool RoundToAlign = false;
/// If this is true, null pointers in address space 0 will be treated as
/// though they can't be evaluated. Otherwise, null is always considered to
/// point to a 0 byte region of memory.
bool NullIsUnknownSize = false;
/// If set, used for more accurate evaluation
AAResults *AA = nullptr;
};
/// Compute the size of the object pointed by Ptr. Returns true and the
/// object size in Size if successful, and false otherwise. In this context, by
/// object we mean the region of memory starting at Ptr to the end of the
/// underlying object pointed to by Ptr.
///
/// WARNING: The object size returned is the allocation size. This does not
/// imply dereferenceability at site of use since the object may be freeed in
/// between.
bool getObjectSize(const Value *Ptr, uint64_t &Size, const DataLayout &DL,
const TargetLibraryInfo *TLI, ObjectSizeOpts Opts = {});
/// Try to turn a call to \@llvm.objectsize into an integer value of the given
/// Type. Returns null on failure. If MustSucceed is true, this function will
/// not return null, and may return conservative values governed by the second
/// argument of the call to objectsize.
Value *lowerObjectSizeCall(IntrinsicInst *ObjectSize, const DataLayout &DL,
const TargetLibraryInfo *TLI, bool MustSucceed);
Value *lowerObjectSizeCall(
IntrinsicInst *ObjectSize, const DataLayout &DL,
const TargetLibraryInfo *TLI, AAResults *AA, bool MustSucceed,
SmallVectorImpl<Instruction *> *InsertedInstructions = nullptr);
using SizeOffsetType = std::pair<APInt, APInt>;
/// Evaluate the size and offset of an object pointed to by a Value*
/// statically. Fails if size or offset are not known at compile time.
class ObjectSizeOffsetVisitor
: public InstVisitor<ObjectSizeOffsetVisitor, SizeOffsetType> {
const DataLayout &DL;
const TargetLibraryInfo *TLI;
ObjectSizeOpts Options;
unsigned IntTyBits;
APInt Zero;
SmallPtrSet<Instruction *, 8> SeenInsts;
APInt align(APInt Size, MaybeAlign Align);
SizeOffsetType unknown() {
return std::make_pair(APInt(), APInt());
}
public:
ObjectSizeOffsetVisitor(const DataLayout &DL, const TargetLibraryInfo *TLI,
LLVMContext &Context, ObjectSizeOpts Options = {});
SizeOffsetType compute(Value *V);
static bool knownSize(const SizeOffsetType &SizeOffset) {
return SizeOffset.first.getBitWidth() > 1;
}
static bool knownOffset(const SizeOffsetType &SizeOffset) {
return SizeOffset.second.getBitWidth() > 1;
}
static bool bothKnown(const SizeOffsetType &SizeOffset) {
return knownSize(SizeOffset) && knownOffset(SizeOffset);
}
// These are "private", except they can't actually be made private. Only
// compute() should be used by external users.
SizeOffsetType visitAllocaInst(AllocaInst &I);
SizeOffsetType visitArgument(Argument &A);
SizeOffsetType visitCallBase(CallBase &CB);
SizeOffsetType visitConstantPointerNull(ConstantPointerNull&);
SizeOffsetType visitExtractElementInst(ExtractElementInst &I);
SizeOffsetType visitExtractValueInst(ExtractValueInst &I);
SizeOffsetType visitGlobalAlias(GlobalAlias &GA);
SizeOffsetType visitGlobalVariable(GlobalVariable &GV);
SizeOffsetType visitIntToPtrInst(IntToPtrInst&);
SizeOffsetType visitLoadInst(LoadInst &I);
SizeOffsetType visitPHINode(PHINode&);
SizeOffsetType visitSelectInst(SelectInst &I);
SizeOffsetType visitUndefValue(UndefValue&);
SizeOffsetType visitInstruction(Instruction &I);
private:
SizeOffsetType findLoadSizeOffset(
LoadInst &LoadFrom, BasicBlock &BB, BasicBlock::iterator From,
SmallDenseMap<BasicBlock *, SizeOffsetType, 8> &VisitedBlocks,
unsigned &ScannedInstCount);
SizeOffsetType combineSizeOffset(SizeOffsetType LHS, SizeOffsetType RHS);
SizeOffsetType computeImpl(Value *V);
bool CheckedZextOrTrunc(APInt &I);
};
using SizeOffsetEvalType = std::pair<Value *, Value *>;
/// Evaluate the size and offset of an object pointed to by a Value*.
/// May create code to compute the result at run-time.
class ObjectSizeOffsetEvaluator
: public InstVisitor<ObjectSizeOffsetEvaluator, SizeOffsetEvalType> {
using BuilderTy = IRBuilder<TargetFolder, IRBuilderCallbackInserter>;
using WeakEvalType = std::pair<WeakTrackingVH, WeakTrackingVH>;
using CacheMapTy = DenseMap<const Value *, WeakEvalType>;
using PtrSetTy = SmallPtrSet<const Value *, 8>;
const DataLayout &DL;
const TargetLibraryInfo *TLI;
LLVMContext &Context;
BuilderTy Builder;
IntegerType *IntTy;
Value *Zero;
CacheMapTy CacheMap;
PtrSetTy SeenVals;
ObjectSizeOpts EvalOpts;
SmallPtrSet<Instruction *, 8> InsertedInstructions;
SizeOffsetEvalType compute_(Value *V);
public:
static SizeOffsetEvalType unknown() {
return std::make_pair(nullptr, nullptr);
}
ObjectSizeOffsetEvaluator(const DataLayout &DL, const TargetLibraryInfo *TLI,
LLVMContext &Context, ObjectSizeOpts EvalOpts = {});
SizeOffsetEvalType compute(Value *V);
bool knownSize(SizeOffsetEvalType SizeOffset) {
return SizeOffset.first;
}
bool knownOffset(SizeOffsetEvalType SizeOffset) {
return SizeOffset.second;
}
bool anyKnown(SizeOffsetEvalType SizeOffset) {
return knownSize(SizeOffset) || knownOffset(SizeOffset);
}
bool bothKnown(SizeOffsetEvalType SizeOffset) {
return knownSize(SizeOffset) && knownOffset(SizeOffset);
}
// The individual instruction visitors should be treated as private.
SizeOffsetEvalType visitAllocaInst(AllocaInst &I);
SizeOffsetEvalType visitCallBase(CallBase &CB);
SizeOffsetEvalType visitExtractElementInst(ExtractElementInst &I);
SizeOffsetEvalType visitExtractValueInst(ExtractValueInst &I);
SizeOffsetEvalType visitGEPOperator(GEPOperator &GEP);
SizeOffsetEvalType visitIntToPtrInst(IntToPtrInst&);
SizeOffsetEvalType visitLoadInst(LoadInst &I);
SizeOffsetEvalType visitPHINode(PHINode &PHI);
SizeOffsetEvalType visitSelectInst(SelectInst &I);
SizeOffsetEvalType visitInstruction(Instruction &I);
};
} // end namespace llvm
#endif // LLVM_ANALYSIS_MEMORYBUILTINS_H
PK iwFZ'��r1X 1X Analysis/TargetLibraryInfo.hnu �[��� //===-- TargetLibraryInfo.h - Library information ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_TARGETLIBRARYINFO_H
#define LLVM_ANALYSIS_TARGETLIBRARYINFO_H
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/IR/InstrTypes.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
#include "llvm/TargetParser/Triple.h"
#include <optional>
namespace llvm {
template <typename T> class ArrayRef;
class Function;
class Module;
class Triple;
/// Describes a possible vectorization of a function.
/// Function 'VectorFnName' is equivalent to 'ScalarFnName' vectorized
/// by a factor 'VectorizationFactor'.
struct VecDesc {
StringRef ScalarFnName;
StringRef VectorFnName;
ElementCount VectorizationFactor;
bool Masked;
};
enum LibFunc : unsigned {
#define TLI_DEFINE_ENUM
#include "llvm/Analysis/TargetLibraryInfo.def"
NumLibFuncs,
NotLibFunc
};
/// Implementation of the target library information.
///
/// This class constructs tables that hold the target library information and
/// make it available. However, it is somewhat expensive to compute and only
/// depends on the triple. So users typically interact with the \c
/// TargetLibraryInfo wrapper below.
class TargetLibraryInfoImpl {
friend class TargetLibraryInfo;
unsigned char AvailableArray[(NumLibFuncs+3)/4];
DenseMap<unsigned, std::string> CustomNames;
static StringLiteral const StandardNames[NumLibFuncs];
bool ShouldExtI32Param, ShouldExtI32Return, ShouldSignExtI32Param, ShouldSignExtI32Return;
unsigned SizeOfInt;
enum AvailabilityState {
StandardName = 3, // (memset to all ones)
CustomName = 1,
Unavailable = 0 // (memset to all zeros)
};
void setState(LibFunc F, AvailabilityState State) {
AvailableArray[F/4] &= ~(3 << 2*(F&3));
AvailableArray[F/4] |= State << 2*(F&3);
}
AvailabilityState getState(LibFunc F) const {
return static_cast<AvailabilityState>((AvailableArray[F/4] >> 2*(F&3)) & 3);
}
/// Vectorization descriptors - sorted by ScalarFnName.
std::vector<VecDesc> VectorDescs;
/// Scalarization descriptors - same content as VectorDescs but sorted based
/// on VectorFnName rather than ScalarFnName.
std::vector<VecDesc> ScalarDescs;
/// Return true if the function type FTy is valid for the library function
/// F, regardless of whether the function is available.
bool isValidProtoForLibFunc(const FunctionType &FTy, LibFunc F,
const Module &M) const;
public:
/// List of known vector-functions libraries.
///
/// The vector-functions library defines, which functions are vectorizable
/// and with which factor. The library can be specified by either frontend,
/// or a commandline option, and then used by
/// addVectorizableFunctionsFromVecLib for filling up the tables of
/// vectorizable functions.
enum VectorLibrary {
NoLibrary, // Don't use any vector library.
Accelerate, // Use Accelerate framework.
DarwinLibSystemM, // Use Darwin's libsystem_m.
LIBMVEC_X86, // GLIBC Vector Math library.
MASSV, // IBM MASS vector library.
SVML, // Intel short vector math library.
SLEEFGNUABI, // SLEEF - SIMD Library for Evaluating Elementary Functions.
ArmPL // Arm Performance Libraries.
};
TargetLibraryInfoImpl();
explicit TargetLibraryInfoImpl(const Triple &T);
// Provide value semantics.
TargetLibraryInfoImpl(const TargetLibraryInfoImpl &TLI);
TargetLibraryInfoImpl(TargetLibraryInfoImpl &&TLI);
TargetLibraryInfoImpl &operator=(const TargetLibraryInfoImpl &TLI);
TargetLibraryInfoImpl &operator=(TargetLibraryInfoImpl &&TLI);
/// Searches for a particular function name.
///
/// If it is one of the known library functions, return true and set F to the
/// corresponding value.
bool getLibFunc(StringRef funcName, LibFunc &F) const;
/// Searches for a particular function name, also checking that its type is
/// valid for the library function matching that name.
///
/// If it is one of the known library functions, return true and set F to the
/// corresponding value.
///
/// FDecl is assumed to have a parent Module when using this function.
bool getLibFunc(const Function &FDecl, LibFunc &F) const;
/// Forces a function to be marked as unavailable.
void setUnavailable(LibFunc F) {
setState(F, Unavailable);
}
/// Forces a function to be marked as available.
void setAvailable(LibFunc F) {
setState(F, StandardName);
}
/// Forces a function to be marked as available and provide an alternate name
/// that must be used.
void setAvailableWithName(LibFunc F, StringRef Name) {
if (StandardNames[F] != Name) {
setState(F, CustomName);
CustomNames[F] = std::string(Name);
assert(CustomNames.contains(F));
} else {
setState(F, StandardName);
}
}
/// Disables all builtins.
///
/// This can be used for options like -fno-builtin.
void disableAllFunctions();
/// Add a set of scalar -> vector mappings, queryable via
/// getVectorizedFunction and getScalarizedFunction.
void addVectorizableFunctions(ArrayRef<VecDesc> Fns);
/// Calls addVectorizableFunctions with a known preset of functions for the
/// given vector library.
void addVectorizableFunctionsFromVecLib(enum VectorLibrary VecLib,
const llvm::Triple &TargetTriple);
/// Return true if the function F has a vector equivalent with vectorization
/// factor VF.
bool isFunctionVectorizable(StringRef F, const ElementCount &VF) const {
return !(getVectorizedFunction(F, VF, false).empty() &&
getVectorizedFunction(F, VF, true).empty());
}
/// Return true if the function F has a vector equivalent with any
/// vectorization factor.
bool isFunctionVectorizable(StringRef F) const;
/// Return the name of the equivalent of F, vectorized with factor VF. If no
/// such mapping exists, return the empty string.
StringRef getVectorizedFunction(StringRef F, const ElementCount &VF,
bool Masked) const;
/// Set to true iff i32 parameters to library functions should have signext
/// or zeroext attributes if they correspond to C-level int or unsigned int,
/// respectively.
void setShouldExtI32Param(bool Val) {
ShouldExtI32Param = Val;
}
/// Set to true iff i32 results from library functions should have signext
/// or zeroext attributes if they correspond to C-level int or unsigned int,
/// respectively.
void setShouldExtI32Return(bool Val) {
ShouldExtI32Return = Val;
}
/// Set to true iff i32 parameters to library functions should have signext
/// attribute if they correspond to C-level int or unsigned int.
void setShouldSignExtI32Param(bool Val) {
ShouldSignExtI32Param = Val;
}
/// Set to true iff i32 results from library functions should have signext
/// attribute if they correspond to C-level int or unsigned int.
void setShouldSignExtI32Return(bool Val) {
ShouldSignExtI32Return = Val;
}
/// Returns the size of the wchar_t type in bytes or 0 if the size is unknown.
/// This queries the 'wchar_size' metadata.
unsigned getWCharSize(const Module &M) const;
/// Returns the size of the size_t type in bits.
unsigned getSizeTSize(const Module &M) const;
/// Get size of a C-level int or unsigned int, in bits.
unsigned getIntSize() const {
return SizeOfInt;
}
/// Initialize the C-level size of an integer.
void setIntSize(unsigned Bits) {
SizeOfInt = Bits;
}
/// Returns the largest vectorization factor used in the list of
/// vector functions.
void getWidestVF(StringRef ScalarF, ElementCount &FixedVF,
ElementCount &Scalable) const;
/// Returns true if call site / callee has cdecl-compatible calling
/// conventions.
static bool isCallingConvCCompatible(CallBase *CI);
static bool isCallingConvCCompatible(Function *Callee);
};
/// Provides information about what library functions are available for
/// the current target.
///
/// This both allows optimizations to handle them specially and frontends to
/// disable such optimizations through -fno-builtin etc.
class TargetLibraryInfo {
friend class TargetLibraryAnalysis;
friend class TargetLibraryInfoWrapperPass;
/// The global (module level) TLI info.
const TargetLibraryInfoImpl *Impl;
/// Support for -fno-builtin* options as function attributes, overrides
/// information in global TargetLibraryInfoImpl.
BitVector OverrideAsUnavailable;
public:
explicit TargetLibraryInfo(const TargetLibraryInfoImpl &Impl,
std::optional<const Function *> F = std::nullopt)
: Impl(&Impl), OverrideAsUnavailable(NumLibFuncs) {
if (!F)
return;
if ((*F)->hasFnAttribute("no-builtins"))
disableAllFunctions();
else {
// Disable individual libc/libm calls in TargetLibraryInfo.
LibFunc LF;
AttributeSet FnAttrs = (*F)->getAttributes().getFnAttrs();
for (const Attribute &Attr : FnAttrs) {
if (!Attr.isStringAttribute())
continue;
auto AttrStr = Attr.getKindAsString();
if (!AttrStr.consume_front("no-builtin-"))
continue;
if (getLibFunc(AttrStr, LF))
setUnavailable(LF);
}
}
}
// Provide value semantics.
TargetLibraryInfo(const TargetLibraryInfo &TLI) = default;
TargetLibraryInfo(TargetLibraryInfo &&TLI)
: Impl(TLI.Impl), OverrideAsUnavailable(TLI.OverrideAsUnavailable) {}
TargetLibraryInfo &operator=(const TargetLibraryInfo &TLI) = default;
TargetLibraryInfo &operator=(TargetLibraryInfo &&TLI) {
Impl = TLI.Impl;
OverrideAsUnavailable = TLI.OverrideAsUnavailable;
return *this;
}
/// Determine whether a callee with the given TLI can be inlined into
/// caller with this TLI, based on 'nobuiltin' attributes. When requested,
/// allow inlining into a caller with a superset of the callee's nobuiltin
/// attributes, which is conservatively correct.
bool areInlineCompatible(const TargetLibraryInfo &CalleeTLI,
bool AllowCallerSuperset) const {
if (!AllowCallerSuperset)
return OverrideAsUnavailable == CalleeTLI.OverrideAsUnavailable;
BitVector B = OverrideAsUnavailable;
B |= CalleeTLI.OverrideAsUnavailable;
// We can inline if the union of the caller and callee's nobuiltin
// attributes is no stricter than the caller's nobuiltin attributes.
return B == OverrideAsUnavailable;
}
/// Return true if the function type FTy is valid for the library function
/// F, regardless of whether the function is available.
bool isValidProtoForLibFunc(const FunctionType &FTy, LibFunc F,
const Module &M) const {
return Impl->isValidProtoForLibFunc(FTy, F, M);
}
/// Searches for a particular function name.
///
/// If it is one of the known library functions, return true and set F to the
/// corresponding value.
bool getLibFunc(StringRef funcName, LibFunc &F) const {
return Impl->getLibFunc(funcName, F);
}
bool getLibFunc(const Function &FDecl, LibFunc &F) const {
return Impl->getLibFunc(FDecl, F);
}
/// If a callbase does not have the 'nobuiltin' attribute, return if the
/// called function is a known library function and set F to that function.
bool getLibFunc(const CallBase &CB, LibFunc &F) const {
return !CB.isNoBuiltin() && CB.getCalledFunction() &&
getLibFunc(*(CB.getCalledFunction()), F);
}
/// Disables all builtins.
///
/// This can be used for options like -fno-builtin.
void disableAllFunctions() LLVM_ATTRIBUTE_UNUSED {
OverrideAsUnavailable.set();
}
/// Forces a function to be marked as unavailable.
void setUnavailable(LibFunc F) LLVM_ATTRIBUTE_UNUSED {
OverrideAsUnavailable.set(F);
}
TargetLibraryInfoImpl::AvailabilityState getState(LibFunc F) const {
if (OverrideAsUnavailable[F])
return TargetLibraryInfoImpl::Unavailable;
return Impl->getState(F);
}
/// Tests whether a library function is available.
bool has(LibFunc F) const {
return getState(F) != TargetLibraryInfoImpl::Unavailable;
}
bool isFunctionVectorizable(StringRef F, const ElementCount &VF) const {
return Impl->isFunctionVectorizable(F, VF);
}
bool isFunctionVectorizable(StringRef F) const {
return Impl->isFunctionVectorizable(F);
}
StringRef getVectorizedFunction(StringRef F, const ElementCount &VF,
bool Masked = false) const {
return Impl->getVectorizedFunction(F, VF, Masked);
}
/// Tests if the function is both available and a candidate for optimized code
/// generation.
bool hasOptimizedCodeGen(LibFunc F) const {
if (getState(F) == TargetLibraryInfoImpl::Unavailable)
return false;
switch (F) {
default: break;
case LibFunc_copysign: case LibFunc_copysignf: case LibFunc_copysignl:
case LibFunc_fabs: case LibFunc_fabsf: case LibFunc_fabsl:
case LibFunc_sin: case LibFunc_sinf: case LibFunc_sinl:
case LibFunc_cos: case LibFunc_cosf: case LibFunc_cosl:
case LibFunc_sqrt: case LibFunc_sqrtf: case LibFunc_sqrtl:
case LibFunc_sqrt_finite: case LibFunc_sqrtf_finite:
case LibFunc_sqrtl_finite:
case LibFunc_fmax: case LibFunc_fmaxf: case LibFunc_fmaxl:
case LibFunc_fmin: case LibFunc_fminf: case LibFunc_fminl:
case LibFunc_floor: case LibFunc_floorf: case LibFunc_floorl:
case LibFunc_nearbyint: case LibFunc_nearbyintf: case LibFunc_nearbyintl:
case LibFunc_ceil: case LibFunc_ceilf: case LibFunc_ceill:
case LibFunc_rint: case LibFunc_rintf: case LibFunc_rintl:
case LibFunc_round: case LibFunc_roundf: case LibFunc_roundl:
case LibFunc_trunc: case LibFunc_truncf: case LibFunc_truncl:
case LibFunc_log2: case LibFunc_log2f: case LibFunc_log2l:
case LibFunc_exp2: case LibFunc_exp2f: case LibFunc_exp2l:
case LibFunc_ldexp: case LibFunc_ldexpf: case LibFunc_ldexpl:
case LibFunc_memcpy: case LibFunc_memset: case LibFunc_memmove:
case LibFunc_memcmp: case LibFunc_bcmp: case LibFunc_strcmp:
case LibFunc_strcpy: case LibFunc_stpcpy: case LibFunc_strlen:
case LibFunc_strnlen: case LibFunc_memchr: case LibFunc_mempcpy:
return true;
}
return false;
}
StringRef getName(LibFunc F) const {
auto State = getState(F);
if (State == TargetLibraryInfoImpl::Unavailable)
return StringRef();
if (State == TargetLibraryInfoImpl::StandardName)
return Impl->StandardNames[F];
assert(State == TargetLibraryInfoImpl::CustomName);
return Impl->CustomNames.find(F)->second;
}
static void initExtensionsForTriple(bool &ShouldExtI32Param,
bool &ShouldExtI32Return,
bool &ShouldSignExtI32Param,
bool &ShouldSignExtI32Return,
const Triple &T) {
ShouldExtI32Param = ShouldExtI32Return = false;
ShouldSignExtI32Param = ShouldSignExtI32Return = false;
// PowerPC64, Sparc64, SystemZ need signext/zeroext on i32 parameters and
// returns corresponding to C-level ints and unsigned ints.
if (T.isPPC64() || T.getArch() == Triple::sparcv9 ||
T.getArch() == Triple::systemz) {
ShouldExtI32Param = true;
ShouldExtI32Return = true;
}
// LoongArch, Mips, and riscv64, on the other hand, need signext on i32
// parameters corresponding to both signed and unsigned ints.
if (T.isLoongArch() || T.isMIPS() || T.isRISCV64()) {
ShouldSignExtI32Param = true;
}
// LoongArch and riscv64 need signext on i32 returns corresponding to both
// signed and unsigned ints.
if (T.isLoongArch() || T.isRISCV64()) {
ShouldSignExtI32Return = true;
}
}
/// Returns extension attribute kind to be used for i32 parameters
/// corresponding to C-level int or unsigned int. May be zeroext, signext,
/// or none.
private:
static Attribute::AttrKind getExtAttrForI32Param(bool ShouldExtI32Param_,
bool ShouldSignExtI32Param_,
bool Signed = true) {
if (ShouldExtI32Param_)
return Signed ? Attribute::SExt : Attribute::ZExt;
if (ShouldSignExtI32Param_)
return Attribute::SExt;
return Attribute::None;
}
public:
static Attribute::AttrKind getExtAttrForI32Param(const Triple &T,
bool Signed = true) {
bool ShouldExtI32Param, ShouldExtI32Return;
bool ShouldSignExtI32Param, ShouldSignExtI32Return;
initExtensionsForTriple(ShouldExtI32Param, ShouldExtI32Return,
ShouldSignExtI32Param, ShouldSignExtI32Return, T);
return getExtAttrForI32Param(ShouldExtI32Param, ShouldSignExtI32Param,
Signed);
}
Attribute::AttrKind getExtAttrForI32Param(bool Signed = true) const {
return getExtAttrForI32Param(Impl->ShouldExtI32Param,
Impl->ShouldSignExtI32Param, Signed);
}
/// Returns extension attribute kind to be used for i32 return values
/// corresponding to C-level int or unsigned int. May be zeroext, signext,
/// or none.
private:
static Attribute::AttrKind getExtAttrForI32Return(bool ShouldExtI32Return_,
bool ShouldSignExtI32Return_,
bool Signed) {
if (ShouldExtI32Return_)
return Signed ? Attribute::SExt : Attribute::ZExt;
if (ShouldSignExtI32Return_)
return Attribute::SExt;
return Attribute::None;
}
public:
static Attribute::AttrKind getExtAttrForI32Return(const Triple &T,
bool Signed = true) {
bool ShouldExtI32Param, ShouldExtI32Return;
bool ShouldSignExtI32Param, ShouldSignExtI32Return;
initExtensionsForTriple(ShouldExtI32Param, ShouldExtI32Return,
ShouldSignExtI32Param, ShouldSignExtI32Return, T);
return getExtAttrForI32Return(ShouldExtI32Return, ShouldSignExtI32Return,
Signed);
}
Attribute::AttrKind getExtAttrForI32Return(bool Signed = true) const {
return getExtAttrForI32Return(Impl->ShouldExtI32Return,
Impl->ShouldSignExtI32Return, Signed);
}
// Helper to create an AttributeList for args (and ret val) which all have
// the same signedness. Attributes in AL may be passed in to include them
// as well in the returned AttributeList.
AttributeList getAttrList(LLVMContext *C, ArrayRef<unsigned> ArgNos,
bool Signed, bool Ret = false,
AttributeList AL = AttributeList()) const {
if (auto AK = getExtAttrForI32Param(Signed))
for (auto ArgNo : ArgNos)
AL = AL.addParamAttribute(*C, ArgNo, AK);
if (Ret)
if (auto AK = getExtAttrForI32Return(Signed))
AL = AL.addRetAttribute(*C, AK);
return AL;
}
/// \copydoc TargetLibraryInfoImpl::getWCharSize()
unsigned getWCharSize(const Module &M) const {
return Impl->getWCharSize(M);
}
/// \copydoc TargetLibraryInfoImpl::getSizeTSize()
unsigned getSizeTSize(const Module &M) const { return Impl->getSizeTSize(M); }
/// \copydoc TargetLibraryInfoImpl::getIntSize()
unsigned getIntSize() const {
return Impl->getIntSize();
}
/// Handle invalidation from the pass manager.
///
/// If we try to invalidate this info, just return false. It cannot become
/// invalid even if the module or function changes.
bool invalidate(Module &, const PreservedAnalyses &,
ModuleAnalysisManager::Invalidator &) {
return false;
}
bool invalidate(Function &, const PreservedAnalyses &,
FunctionAnalysisManager::Invalidator &) {
return false;
}
/// Returns the largest vectorization factor used in the list of
/// vector functions.
void getWidestVF(StringRef ScalarF, ElementCount &FixedVF,
ElementCount &ScalableVF) const {
Impl->getWidestVF(ScalarF, FixedVF, ScalableVF);
}
/// Check if the function "F" is listed in a library known to LLVM.
bool isKnownVectorFunctionInLibrary(StringRef F) const {
return this->isFunctionVectorizable(F);
}
};
/// Analysis pass providing the \c TargetLibraryInfo.
///
/// Note that this pass's result cannot be invalidated, it is immutable for the
/// life of the module.
class TargetLibraryAnalysis : public AnalysisInfoMixin<TargetLibraryAnalysis> {
public:
typedef TargetLibraryInfo Result;
/// Default construct the library analysis.
///
/// This will use the module's triple to construct the library info for that
/// module.
TargetLibraryAnalysis() = default;
/// Construct a library analysis with baseline Module-level info.
///
/// This will be supplemented with Function-specific info in the Result.
TargetLibraryAnalysis(TargetLibraryInfoImpl BaselineInfoImpl)
: BaselineInfoImpl(std::move(BaselineInfoImpl)) {}
TargetLibraryInfo run(const Function &F, FunctionAnalysisManager &);
private:
friend AnalysisInfoMixin<TargetLibraryAnalysis>;
static AnalysisKey Key;
std::optional<TargetLibraryInfoImpl> BaselineInfoImpl;
};
class TargetLibraryInfoWrapperPass : public ImmutablePass {
TargetLibraryAnalysis TLA;
std::optional<TargetLibraryInfo> TLI;
virtual void anchor();
public:
static char ID;
TargetLibraryInfoWrapperPass();
explicit TargetLibraryInfoWrapperPass(const Triple &T);
explicit TargetLibraryInfoWrapperPass(const TargetLibraryInfoImpl &TLI);
TargetLibraryInfo &getTLI(const Function &F) {
FunctionAnalysisManager DummyFAM;
TLI = TLA.run(F, DummyFAM);
return *TLI;
}
};
} // end namespace llvm
#endif
PK iwFZ��/ $ $ Analysis/TargetFolder.hnu �[��� //====- TargetFolder.h - Constant folding helper ---------------*- C++ -*-====//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the TargetFolder class, a helper for IRBuilder.
// It provides IRBuilder with a set of methods for creating constants with
// target dependent folding, in addition to the same target-independent
// folding that the ConstantFolder class provides. For general constant
// creation and folding, use ConstantExpr and the routines in
// llvm/Analysis/ConstantFolding.h.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_TARGETFOLDER_H
#define LLVM_ANALYSIS_TARGETFOLDER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/Analysis/ConstantFolding.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/IRBuilderFolder.h"
#include "llvm/IR/Operator.h"
namespace llvm {
class Constant;
class DataLayout;
class Type;
/// TargetFolder - Create constants with target dependent folding.
class TargetFolder final : public IRBuilderFolder {
const DataLayout &DL;
/// Fold - Fold the constant using target specific information.
Constant *Fold(Constant *C) const {
return ConstantFoldConstant(C, DL);
}
virtual void anchor();
public:
explicit TargetFolder(const DataLayout &DL) : DL(DL) {}
//===--------------------------------------------------------------------===//
// Value-based folders.
//
// Return an existing value or a constant if the operation can be simplified.
// Otherwise return nullptr.
//===--------------------------------------------------------------------===//
Value *FoldBinOp(Instruction::BinaryOps Opc, Value *LHS,
Value *RHS) const override {
auto *LC = dyn_cast<Constant>(LHS);
auto *RC = dyn_cast<Constant>(RHS);
if (LC && RC) {
if (ConstantExpr::isDesirableBinOp(Opc))
return Fold(ConstantExpr::get(Opc, LC, RC));
return ConstantFoldBinaryOpOperands(Opc, LC, RC, DL);
}
return nullptr;
}
Value *FoldExactBinOp(Instruction::BinaryOps Opc, Value *LHS, Value *RHS,
bool IsExact) const override {
auto *LC = dyn_cast<Constant>(LHS);
auto *RC = dyn_cast<Constant>(RHS);
if (LC && RC) {
if (ConstantExpr::isDesirableBinOp(Opc))
return Fold(ConstantExpr::get(
Opc, LC, RC, IsExact ? PossiblyExactOperator::IsExact : 0));
return ConstantFoldBinaryOpOperands(Opc, LC, RC, DL);
}
return nullptr;
}
Value *FoldNoWrapBinOp(Instruction::BinaryOps Opc, Value *LHS, Value *RHS,
bool HasNUW, bool HasNSW) const override {
auto *LC = dyn_cast<Constant>(LHS);
auto *RC = dyn_cast<Constant>(RHS);
if (LC && RC) {
if (ConstantExpr::isDesirableBinOp(Opc)) {
unsigned Flags = 0;
if (HasNUW)
Flags |= OverflowingBinaryOperator::NoUnsignedWrap;
if (HasNSW)
Flags |= OverflowingBinaryOperator::NoSignedWrap;
return Fold(ConstantExpr::get(Opc, LC, RC, Flags));
}
return ConstantFoldBinaryOpOperands(Opc, LC, RC, DL);
}
return nullptr;
}
Value *FoldBinOpFMF(Instruction::BinaryOps Opc, Value *LHS, Value *RHS,
FastMathFlags FMF) const override {
return FoldBinOp(Opc, LHS, RHS);
}
Value *FoldICmp(CmpInst::Predicate P, Value *LHS, Value *RHS) const override {
auto *LC = dyn_cast<Constant>(LHS);
auto *RC = dyn_cast<Constant>(RHS);
if (LC && RC)
return Fold(ConstantExpr::getCompare(P, LC, RC));
return nullptr;
}
Value *FoldUnOpFMF(Instruction::UnaryOps Opc, Value *V,
FastMathFlags FMF) const override {
if (Constant *C = dyn_cast<Constant>(V))
return ConstantFoldUnaryOpOperand(Opc, C, DL);
return nullptr;
}
Value *FoldGEP(Type *Ty, Value *Ptr, ArrayRef<Value *> IdxList,
bool IsInBounds = false) const override {
if (!ConstantExpr::isSupportedGetElementPtr(Ty))
return nullptr;
if (auto *PC = dyn_cast<Constant>(Ptr)) {
// Every index must be constant.
if (any_of(IdxList, [](Value *V) { return !isa<Constant>(V); }))
return nullptr;
if (IsInBounds)
return Fold(ConstantExpr::getInBoundsGetElementPtr(Ty, PC, IdxList));
else
return Fold(ConstantExpr::getGetElementPtr(Ty, PC, IdxList));
}
return nullptr;
}
Value *FoldSelect(Value *C, Value *True, Value *False) const override {
auto *CC = dyn_cast<Constant>(C);
auto *TC = dyn_cast<Constant>(True);
auto *FC = dyn_cast<Constant>(False);
if (CC && TC && FC)
return ConstantFoldSelectInstruction(CC, TC, FC);
return nullptr;
}
Value *FoldExtractValue(Value *Agg,
ArrayRef<unsigned> IdxList) const override {
if (auto *CAgg = dyn_cast<Constant>(Agg))
return ConstantFoldExtractValueInstruction(CAgg, IdxList);
return nullptr;
};
Value *FoldInsertValue(Value *Agg, Value *Val,
ArrayRef<unsigned> IdxList) const override {
auto *CAgg = dyn_cast<Constant>(Agg);
auto *CVal = dyn_cast<Constant>(Val);
if (CAgg && CVal)
return ConstantFoldInsertValueInstruction(CAgg, CVal, IdxList);
return nullptr;
}
Value *FoldExtractElement(Value *Vec, Value *Idx) const override {
auto *CVec = dyn_cast<Constant>(Vec);
auto *CIdx = dyn_cast<Constant>(Idx);
if (CVec && CIdx)
return Fold(ConstantExpr::getExtractElement(CVec, CIdx));
return nullptr;
}
Value *FoldInsertElement(Value *Vec, Value *NewElt,
Value *Idx) const override {
auto *CVec = dyn_cast<Constant>(Vec);
auto *CNewElt = dyn_cast<Constant>(NewElt);
auto *CIdx = dyn_cast<Constant>(Idx);
if (CVec && CNewElt && CIdx)
return Fold(ConstantExpr::getInsertElement(CVec, CNewElt, CIdx));
return nullptr;
}
Value *FoldShuffleVector(Value *V1, Value *V2,
ArrayRef<int> Mask) const override {
auto *C1 = dyn_cast<Constant>(V1);
auto *C2 = dyn_cast<Constant>(V2);
if (C1 && C2)
return Fold(ConstantExpr::getShuffleVector(C1, C2, Mask));
return nullptr;
}
//===--------------------------------------------------------------------===//
// Cast/Conversion Operators
//===--------------------------------------------------------------------===//
Constant *CreateCast(Instruction::CastOps Op, Constant *C,
Type *DestTy) const override {
if (C->getType() == DestTy)
return C; // avoid calling Fold
return Fold(ConstantExpr::getCast(Op, C, DestTy));
}
Constant *CreateIntCast(Constant *C, Type *DestTy,
bool isSigned) const override {
if (C->getType() == DestTy)
return C; // avoid calling Fold
return Fold(ConstantExpr::getIntegerCast(C, DestTy, isSigned));
}
Constant *CreatePointerCast(Constant *C, Type *DestTy) const override {
if (C->getType() == DestTy)
return C; // avoid calling Fold
return Fold(ConstantExpr::getPointerCast(C, DestTy));
}
Constant *CreateFPCast(Constant *C, Type *DestTy) const override {
if (C->getType() == DestTy)
return C; // avoid calling Fold
return Fold(ConstantExpr::getFPCast(C, DestTy));
}
Constant *CreateBitCast(Constant *C, Type *DestTy) const override {
return CreateCast(Instruction::BitCast, C, DestTy);
}
Constant *CreateIntToPtr(Constant *C, Type *DestTy) const override {
return CreateCast(Instruction::IntToPtr, C, DestTy);
}
Constant *CreatePtrToInt(Constant *C, Type *DestTy) const override {
return CreateCast(Instruction::PtrToInt, C, DestTy);
}
Constant *CreateZExtOrBitCast(Constant *C, Type *DestTy) const override {
if (C->getType() == DestTy)
return C; // avoid calling Fold
return Fold(ConstantExpr::getZExtOrBitCast(C, DestTy));
}
Constant *CreateSExtOrBitCast(Constant *C, Type *DestTy) const override {
if (C->getType() == DestTy)
return C; // avoid calling Fold
return Fold(ConstantExpr::getSExtOrBitCast(C, DestTy));
}
Constant *CreateTruncOrBitCast(Constant *C, Type *DestTy) const override {
if (C->getType() == DestTy)
return C; // avoid calling Fold
return Fold(ConstantExpr::getTruncOrBitCast(C, DestTy));
}
Constant *CreatePointerBitCastOrAddrSpaceCast(Constant *C,
Type *DestTy) const override {
if (C->getType() == DestTy)
return C; // avoid calling Fold
return Fold(ConstantExpr::getPointerBitCastOrAddrSpaceCast(C, DestTy));
}
//===--------------------------------------------------------------------===//
// Compare Instructions
//===--------------------------------------------------------------------===//
Constant *CreateFCmp(CmpInst::Predicate P, Constant *LHS,
Constant *RHS) const override {
return Fold(ConstantExpr::getCompare(P, LHS, RHS));
}
};
}
#endif
PK iwFZ]�Ʊ�5 �5 Analysis/InlineCost.hnu �[��� //===- InlineCost.h - Cost analysis for inliner -----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements heuristics for inlining decisions.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_INLINECOST_H
#define LLVM_ANALYSIS_INLINECOST_H
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/STLFunctionalExtras.h"
#include "llvm/Analysis/InlineModelFeatureMaps.h"
#include "llvm/IR/PassManager.h"
#include <cassert>
#include <climits>
#include <optional>
namespace llvm {
class AssumptionCache;
class OptimizationRemarkEmitter;
class BlockFrequencyInfo;
class CallBase;
class DataLayout;
class Function;
class ProfileSummaryInfo;
class TargetTransformInfo;
class TargetLibraryInfo;
namespace InlineConstants {
// Various thresholds used by inline cost analysis.
/// Use when optsize (-Os) is specified.
const int OptSizeThreshold = 50;
/// Use when minsize (-Oz) is specified.
const int OptMinSizeThreshold = 5;
/// Use when -O3 is specified.
const int OptAggressiveThreshold = 250;
// Various magic constants used to adjust heuristics.
int getInstrCost();
const int IndirectCallThreshold = 100;
const int LoopPenalty = 25;
const int LastCallToStaticBonus = 15000;
const int ColdccPenalty = 2000;
/// Do not inline functions which allocate this many bytes on the stack
/// when the caller is recursive.
const unsigned TotalAllocaSizeRecursiveCaller = 1024;
/// Do not inline dynamic allocas that have been constant propagated to be
/// static allocas above this amount in bytes.
const uint64_t MaxSimplifiedDynamicAllocaToInline = 65536;
const char FunctionInlineCostMultiplierAttributeName[] =
"function-inline-cost-multiplier";
const char MaxInlineStackSizeAttributeName[] = "inline-max-stacksize";
} // namespace InlineConstants
// The cost-benefit pair computed by cost-benefit analysis.
class CostBenefitPair {
public:
CostBenefitPair(APInt Cost, APInt Benefit) : Cost(Cost), Benefit(Benefit) {}
const APInt &getCost() const { return Cost; }
const APInt &getBenefit() const { return Benefit; }
private:
APInt Cost;
APInt Benefit;
};
/// Represents the cost of inlining a function.
///
/// This supports special values for functions which should "always" or
/// "never" be inlined. Otherwise, the cost represents a unitless amount;
/// smaller values increase the likelihood of the function being inlined.
///
/// Objects of this type also provide the adjusted threshold for inlining
/// based on the information available for a particular callsite. They can be
/// directly tested to determine if inlining should occur given the cost and
/// threshold for this cost metric.
class InlineCost {
enum SentinelValues { AlwaysInlineCost = INT_MIN, NeverInlineCost = INT_MAX };
/// The estimated cost of inlining this callsite.
int Cost = 0;
/// The adjusted threshold against which this cost was computed.
int Threshold = 0;
/// The amount of StaticBonus that has been applied.
int StaticBonusApplied = 0;
/// Must be set for Always and Never instances.
const char *Reason = nullptr;
/// The cost-benefit pair computed by cost-benefit analysis.
std::optional<CostBenefitPair> CostBenefit;
// Trivial constructor, interesting logic in the factory functions below.
InlineCost(int Cost, int Threshold, int StaticBonusApplied,
const char *Reason = nullptr,
std::optional<CostBenefitPair> CostBenefit = std::nullopt)
: Cost(Cost), Threshold(Threshold),
StaticBonusApplied(StaticBonusApplied), Reason(Reason),
CostBenefit(CostBenefit) {
assert((isVariable() || Reason) &&
"Reason must be provided for Never or Always");
}
public:
static InlineCost get(int Cost, int Threshold, int StaticBonus = 0) {
assert(Cost > AlwaysInlineCost && "Cost crosses sentinel value");
assert(Cost < NeverInlineCost && "Cost crosses sentinel value");
return InlineCost(Cost, Threshold, StaticBonus);
}
static InlineCost
getAlways(const char *Reason,
std::optional<CostBenefitPair> CostBenefit = std::nullopt) {
return InlineCost(AlwaysInlineCost, 0, 0, Reason, CostBenefit);
}
static InlineCost
getNever(const char *Reason,
std::optional<CostBenefitPair> CostBenefit = std::nullopt) {
return InlineCost(NeverInlineCost, 0, 0, Reason, CostBenefit);
}
/// Test whether the inline cost is low enough for inlining.
explicit operator bool() const { return Cost < Threshold; }
bool isAlways() const { return Cost == AlwaysInlineCost; }
bool isNever() const { return Cost == NeverInlineCost; }
bool isVariable() const { return !isAlways() && !isNever(); }
/// Get the inline cost estimate.
/// It is an error to call this on an "always" or "never" InlineCost.
int getCost() const {
assert(isVariable() && "Invalid access of InlineCost");
return Cost;
}
/// Get the threshold against which the cost was computed
int getThreshold() const {
assert(isVariable() && "Invalid access of InlineCost");
return Threshold;
}
/// Get the amount of StaticBonus applied.
int getStaticBonusApplied() const {
assert(isVariable() && "Invalid access of InlineCost");
return StaticBonusApplied;
}
/// Get the cost-benefit pair which was computed by cost-benefit analysis
std::optional<CostBenefitPair> getCostBenefit() const { return CostBenefit; }
/// Get the reason of Always or Never.
const char *getReason() const {
assert((Reason || isVariable()) &&
"InlineCost reason must be set for Always or Never");
return Reason;
}
/// Get the cost delta from the threshold for inlining.
/// Only valid if the cost is of the variable kind. Returns a negative
/// value if the cost is too high to inline.
int getCostDelta() const { return Threshold - getCost(); }
};
/// InlineResult is basically true or false. For false results the message
/// describes a reason.
class InlineResult {
const char *Message = nullptr;
InlineResult(const char *Message = nullptr) : Message(Message) {}
public:
static InlineResult success() { return {}; }
static InlineResult failure(const char *Reason) {
return InlineResult(Reason);
}
bool isSuccess() const { return Message == nullptr; }
const char *getFailureReason() const {
assert(!isSuccess() &&
"getFailureReason should only be called in failure cases");
return Message;
}
};
/// Thresholds to tune inline cost analysis. The inline cost analysis decides
/// the condition to apply a threshold and applies it. Otherwise,
/// DefaultThreshold is used. If a threshold is Optional, it is applied only
/// when it has a valid value. Typically, users of inline cost analysis
/// obtain an InlineParams object through one of the \c getInlineParams methods
/// and pass it to \c getInlineCost. Some specialized versions of inliner
/// (such as the pre-inliner) might have custom logic to compute \c InlineParams
/// object.
struct InlineParams {
/// The default threshold to start with for a callee.
int DefaultThreshold = -1;
/// Threshold to use for callees with inline hint.
std::optional<int> HintThreshold;
/// Threshold to use for cold callees.
std::optional<int> ColdThreshold;
/// Threshold to use when the caller is optimized for size.
std::optional<int> OptSizeThreshold;
/// Threshold to use when the caller is optimized for minsize.
std::optional<int> OptMinSizeThreshold;
/// Threshold to use when the callsite is considered hot.
std::optional<int> HotCallSiteThreshold;
/// Threshold to use when the callsite is considered hot relative to function
/// entry.
std::optional<int> LocallyHotCallSiteThreshold;
/// Threshold to use when the callsite is considered cold.
std::optional<int> ColdCallSiteThreshold;
/// Compute inline cost even when the cost has exceeded the threshold.
std::optional<bool> ComputeFullInlineCost;
/// Indicate whether we should allow inline deferral.
std::optional<bool> EnableDeferral;
/// Indicate whether we allow inlining for recursive call.
std::optional<bool> AllowRecursiveCall = false;
};
std::optional<int> getStringFnAttrAsInt(CallBase &CB, StringRef AttrKind);
/// Generate the parameters to tune the inline cost analysis based only on the
/// commandline options.
InlineParams getInlineParams();
/// Generate the parameters to tune the inline cost analysis based on command
/// line options. If -inline-threshold option is not explicitly passed,
/// \p Threshold is used as the default threshold.
InlineParams getInlineParams(int Threshold);
/// Generate the parameters to tune the inline cost analysis based on command
/// line options. If -inline-threshold option is not explicitly passed,
/// the default threshold is computed from \p OptLevel and \p SizeOptLevel.
/// An \p OptLevel value above 3 is considered an aggressive optimization mode.
/// \p SizeOptLevel of 1 corresponds to the -Os flag and 2 corresponds to
/// the -Oz flag.
InlineParams getInlineParams(unsigned OptLevel, unsigned SizeOptLevel);
/// Return the cost associated with a callsite, including parameter passing
/// and the call/return instruction.
int getCallsiteCost(const CallBase &Call, const DataLayout &DL);
/// Get an InlineCost object representing the cost of inlining this
/// callsite.
///
/// Note that a default threshold is passed into this function. This threshold
/// could be modified based on callsite's properties and only costs below this
/// new threshold are computed with any accuracy. The new threshold can be
/// used to bound the computation necessary to determine whether the cost is
/// sufficiently low to warrant inlining.
///
/// Also note that calling this function *dynamically* computes the cost of
/// inlining the callsite. It is an expensive, heavyweight call.
InlineCost
getInlineCost(CallBase &Call, const InlineParams &Params,
TargetTransformInfo &CalleeTTI,
function_ref<AssumptionCache &(Function &)> GetAssumptionCache,
function_ref<const TargetLibraryInfo &(Function &)> GetTLI,
function_ref<BlockFrequencyInfo &(Function &)> GetBFI = nullptr,
ProfileSummaryInfo *PSI = nullptr,
OptimizationRemarkEmitter *ORE = nullptr);
/// Get an InlineCost with the callee explicitly specified.
/// This allows you to calculate the cost of inlining a function via a
/// pointer. This behaves exactly as the version with no explicit callee
/// parameter in all other respects.
//
InlineCost
getInlineCost(CallBase &Call, Function *Callee, const InlineParams &Params,
TargetTransformInfo &CalleeTTI,
function_ref<AssumptionCache &(Function &)> GetAssumptionCache,
function_ref<const TargetLibraryInfo &(Function &)> GetTLI,
function_ref<BlockFrequencyInfo &(Function &)> GetBFI = nullptr,
ProfileSummaryInfo *PSI = nullptr,
OptimizationRemarkEmitter *ORE = nullptr);
/// Returns InlineResult::success() if the call site should be always inlined
/// because of user directives, and the inlining is viable. Returns
/// InlineResult::failure() if the inlining may never happen because of user
/// directives or incompatibilities detectable without needing callee traversal.
/// Otherwise returns std::nullopt, meaning that inlining should be decided
/// based on other criteria (e.g. cost modeling).
std::optional<InlineResult> getAttributeBasedInliningDecision(
CallBase &Call, Function *Callee, TargetTransformInfo &CalleeTTI,
function_ref<const TargetLibraryInfo &(Function &)> GetTLI);
/// Get the cost estimate ignoring thresholds. This is similar to getInlineCost
/// when passed InlineParams::ComputeFullInlineCost, or a non-null ORE. It
/// uses default InlineParams otherwise.
/// Contrary to getInlineCost, which makes a threshold-based final evaluation of
/// should/shouldn't inline, captured in InlineResult, getInliningCostEstimate
/// returns:
/// - std::nullopt, if the inlining cannot happen (is illegal)
/// - an integer, representing the cost.
std::optional<int> getInliningCostEstimate(
CallBase &Call, TargetTransformInfo &CalleeTTI,
function_ref<AssumptionCache &(Function &)> GetAssumptionCache,
function_ref<BlockFrequencyInfo &(Function &)> GetBFI = nullptr,
ProfileSummaryInfo *PSI = nullptr,
OptimizationRemarkEmitter *ORE = nullptr);
/// Get the expanded cost features. The features are returned unconditionally,
/// even if inlining is impossible.
std::optional<InlineCostFeatures> getInliningCostFeatures(
CallBase &Call, TargetTransformInfo &CalleeTTI,
function_ref<AssumptionCache &(Function &)> GetAssumptionCache,
function_ref<BlockFrequencyInfo &(Function &)> GetBFI = nullptr,
ProfileSummaryInfo *PSI = nullptr,
OptimizationRemarkEmitter *ORE = nullptr);
/// Minimal filter to detect invalid constructs for inlining.
InlineResult isInlineViable(Function &Callee);
// This pass is used to annotate instructions during the inline process for
// debugging and analysis. The main purpose of the pass is to see and test
// inliner's decisions when creating new optimizations to InlineCost.
struct InlineCostAnnotationPrinterPass
: PassInfoMixin<InlineCostAnnotationPrinterPass> {
raw_ostream &OS;
public:
explicit InlineCostAnnotationPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &FAM);
};
} // namespace llvm
#endif
PK iwFZu��W# W# Analysis/LoopIterator.hnu �[��� //===--------- LoopIterator.h - Iterate over loop blocks --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// This file defines iterators to visit the basic blocks within a loop.
//
// These iterators currently visit blocks within subloops as well.
// Unfortunately we have no efficient way of summarizing loop exits which would
// allow skipping subloops during traversal.
//
// If you want to visit all blocks in a loop and don't need an ordered traveral,
// use Loop::block_begin() instead.
//
// This is intentionally designed to work with ill-formed loops in which the
// backedge has been deleted. The only prerequisite is that all blocks
// contained within the loop according to the most recent LoopInfo analysis are
// reachable from the loop header.
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_LOOPITERATOR_H
#define LLVM_ANALYSIS_LOOPITERATOR_H
#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/Analysis/LoopInfo.h"
namespace llvm {
class LoopBlocksTraversal;
// A traits type that is intended to be used in graph algorithms. The graph
// traits starts at the loop header, and traverses the BasicBlocks that are in
// the loop body, but not the loop header. Since the loop header is skipped,
// the back edges are excluded.
//
// TODO: Explore the possibility to implement LoopBlocksTraversal in terms of
// LoopBodyTraits, so that insertEdge doesn't have to be specialized.
struct LoopBodyTraits {
using NodeRef = std::pair<const Loop *, BasicBlock *>;
// This wraps a const Loop * into the iterator, so we know which edges to
// filter out.
class WrappedSuccIterator
: public iterator_adaptor_base<
WrappedSuccIterator, succ_iterator,
typename std::iterator_traits<succ_iterator>::iterator_category,
NodeRef, std::ptrdiff_t, NodeRef *, NodeRef> {
using BaseT = iterator_adaptor_base<
WrappedSuccIterator, succ_iterator,
typename std::iterator_traits<succ_iterator>::iterator_category,
NodeRef, std::ptrdiff_t, NodeRef *, NodeRef>;
const Loop *L;
public:
WrappedSuccIterator(succ_iterator Begin, const Loop *L)
: BaseT(Begin), L(L) {}
NodeRef operator*() const { return {L, *I}; }
};
struct LoopBodyFilter {
bool operator()(NodeRef N) const {
const Loop *L = N.first;
return N.second != L->getHeader() && L->contains(N.second);
}
};
using ChildIteratorType =
filter_iterator<WrappedSuccIterator, LoopBodyFilter>;
static NodeRef getEntryNode(const Loop &G) { return {&G, G.getHeader()}; }
static ChildIteratorType child_begin(NodeRef Node) {
return make_filter_range(make_range<WrappedSuccIterator>(
{succ_begin(Node.second), Node.first},
{succ_end(Node.second), Node.first}),
LoopBodyFilter{})
.begin();
}
static ChildIteratorType child_end(NodeRef Node) {
return make_filter_range(make_range<WrappedSuccIterator>(
{succ_begin(Node.second), Node.first},
{succ_end(Node.second), Node.first}),
LoopBodyFilter{})
.end();
}
};
/// Store the result of a depth first search within basic blocks contained by a
/// single loop.
///
/// TODO: This could be generalized for any CFG region, or the entire CFG.
class LoopBlocksDFS {
public:
/// Postorder list iterators.
typedef std::vector<BasicBlock*>::const_iterator POIterator;
typedef std::vector<BasicBlock*>::const_reverse_iterator RPOIterator;
friend class LoopBlocksTraversal;
private:
Loop *L;
/// Map each block to its postorder number. A block is only mapped after it is
/// preorder visited by DFS. It's postorder number is initially zero and set
/// to nonzero after it is finished by postorder traversal.
DenseMap<BasicBlock*, unsigned> PostNumbers;
std::vector<BasicBlock*> PostBlocks;
public:
LoopBlocksDFS(Loop *Container) :
L(Container), PostNumbers(NextPowerOf2(Container->getNumBlocks())) {
PostBlocks.reserve(Container->getNumBlocks());
}
Loop *getLoop() const { return L; }
/// Traverse the loop blocks and store the DFS result.
void perform(LoopInfo *LI);
/// Return true if postorder numbers are assigned to all loop blocks.
bool isComplete() const { return PostBlocks.size() == L->getNumBlocks(); }
/// Iterate over the cached postorder blocks.
POIterator beginPostorder() const {
assert(isComplete() && "bad loop DFS");
return PostBlocks.begin();
}
POIterator endPostorder() const { return PostBlocks.end(); }
/// Reverse iterate over the cached postorder blocks.
RPOIterator beginRPO() const {
assert(isComplete() && "bad loop DFS");
return PostBlocks.rbegin();
}
RPOIterator endRPO() const { return PostBlocks.rend(); }
/// Return true if this block has been preorder visited.
bool hasPreorder(BasicBlock *BB) const { return PostNumbers.count(BB); }
/// Return true if this block has a postorder number.
bool hasPostorder(BasicBlock *BB) const {
DenseMap<BasicBlock*, unsigned>::const_iterator I = PostNumbers.find(BB);
return I != PostNumbers.end() && I->second;
}
/// Get a block's postorder number.
unsigned getPostorder(BasicBlock *BB) const {
DenseMap<BasicBlock*, unsigned>::const_iterator I = PostNumbers.find(BB);
assert(I != PostNumbers.end() && "block not visited by DFS");
assert(I->second && "block not finished by DFS");
return I->second;
}
/// Get a block's reverse postorder number.
unsigned getRPO(BasicBlock *BB) const {
return 1 + PostBlocks.size() - getPostorder(BB);
}
void clear() {
PostNumbers.clear();
PostBlocks.clear();
}
};
/// Wrapper class to LoopBlocksDFS that provides a standard begin()/end()
/// interface for the DFS reverse post-order traversal of blocks in a loop body.
class LoopBlocksRPO {
private:
LoopBlocksDFS DFS;
public:
LoopBlocksRPO(Loop *Container) : DFS(Container) {}
/// Traverse the loop blocks and store the DFS result.
void perform(LoopInfo *LI) {
DFS.perform(LI);
}
/// Reverse iterate over the cached postorder blocks.
LoopBlocksDFS::RPOIterator begin() const { return DFS.beginRPO(); }
LoopBlocksDFS::RPOIterator end() const { return DFS.endRPO(); }
};
/// Specialize po_iterator_storage to record postorder numbers.
template<> class po_iterator_storage<LoopBlocksTraversal, true> {
LoopBlocksTraversal &LBT;
public:
po_iterator_storage(LoopBlocksTraversal &lbs) : LBT(lbs) {}
// These functions are defined below.
bool insertEdge(std::optional<BasicBlock *> From, BasicBlock *To);
void finishPostorder(BasicBlock *BB);
};
/// Traverse the blocks in a loop using a depth-first search.
class LoopBlocksTraversal {
public:
/// Graph traversal iterator.
typedef po_iterator<BasicBlock*, LoopBlocksTraversal, true> POTIterator;
private:
LoopBlocksDFS &DFS;
LoopInfo *LI;
public:
LoopBlocksTraversal(LoopBlocksDFS &Storage, LoopInfo *LInfo) :
DFS(Storage), LI(LInfo) {}
/// Postorder traversal over the graph. This only needs to be done once.
/// po_iterator "automatically" calls back to visitPreorder and
/// finishPostorder to record the DFS result.
POTIterator begin() {
assert(DFS.PostBlocks.empty() && "Need clear DFS result before traversing");
assert(DFS.L->getNumBlocks() && "po_iterator cannot handle an empty graph");
return po_ext_begin(DFS.L->getHeader(), *this);
}
POTIterator end() {
// po_ext_end interface requires a basic block, but ignores its value.
return po_ext_end(DFS.L->getHeader(), *this);
}
/// Called by po_iterator upon reaching a block via a CFG edge. If this block
/// is contained in the loop and has not been visited, then mark it preorder
/// visited and return true.
///
/// TODO: If anyone is interested, we could record preorder numbers here.
bool visitPreorder(BasicBlock *BB) {
if (!DFS.L->contains(LI->getLoopFor(BB)))
return false;
return DFS.PostNumbers.insert(std::make_pair(BB, 0)).second;
}
/// Called by po_iterator each time it advances, indicating a block's
/// postorder.
void finishPostorder(BasicBlock *BB) {
assert(DFS.PostNumbers.count(BB) && "Loop DFS skipped preorder");
DFS.PostBlocks.push_back(BB);
DFS.PostNumbers[BB] = DFS.PostBlocks.size();
}
};
inline bool po_iterator_storage<LoopBlocksTraversal, true>::insertEdge(
std::optional<BasicBlock *> From, BasicBlock *To) {
return LBT.visitPreorder(To);
}
inline void po_iterator_storage<LoopBlocksTraversal, true>::
finishPostorder(BasicBlock *BB) {
LBT.finishPostorder(BB);
}
} // End namespace llvm
#endif
PK iwFZ��s�� �� Analysis/DependenceAnalysis.hnu �[��� //===-- llvm/Analysis/DependenceAnalysis.h -------------------- -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// DependenceAnalysis is an LLVM pass that analyses dependences between memory
// accesses. Currently, it is an implementation of the approach described in
//
// Practical Dependence Testing
// Goff, Kennedy, Tseng
// PLDI 1991
//
// There's a single entry point that analyzes the dependence between a pair
// of memory references in a function, returning either NULL, for no dependence,
// or a more-or-less detailed description of the dependence between them.
//
// This pass exists to support the DependenceGraph pass. There are two separate
// passes because there's a useful separation of concerns. A dependence exists
// if two conditions are met:
//
// 1) Two instructions reference the same memory location, and
// 2) There is a flow of control leading from one instruction to the other.
//
// DependenceAnalysis attacks the first condition; DependenceGraph will attack
// the second (it's not yet ready).
//
// Please note that this is work in progress and the interface is subject to
// change.
//
// Plausible changes:
// Return a set of more precise dependences instead of just one dependence
// summarizing all.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_DEPENDENCEANALYSIS_H
#define LLVM_ANALYSIS_DEPENDENCEANALYSIS_H
#include "llvm/ADT/SmallBitVector.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
namespace llvm {
class AAResults;
template <typename T> class ArrayRef;
class Loop;
class LoopInfo;
class ScalarEvolution;
class SCEV;
class SCEVConstant;
class raw_ostream;
/// Dependence - This class represents a dependence between two memory
/// memory references in a function. It contains minimal information and
/// is used in the very common situation where the compiler is unable to
/// determine anything beyond the existence of a dependence; that is, it
/// represents a confused dependence (see also FullDependence). In most
/// cases (for output, flow, and anti dependences), the dependence implies
/// an ordering, where the source must precede the destination; in contrast,
/// input dependences are unordered.
///
/// When a dependence graph is built, each Dependence will be a member of
/// the set of predecessor edges for its destination instruction and a set
/// if successor edges for its source instruction. These sets are represented
/// as singly-linked lists, with the "next" fields stored in the dependence
/// itelf.
class Dependence {
protected:
Dependence(Dependence &&) = default;
Dependence &operator=(Dependence &&) = default;
public:
Dependence(Instruction *Source, Instruction *Destination)
: Src(Source), Dst(Destination) {}
virtual ~Dependence() = default;
/// Dependence::DVEntry - Each level in the distance/direction vector
/// has a direction (or perhaps a union of several directions), and
/// perhaps a distance.
struct DVEntry {
enum : unsigned char {
NONE = 0,
LT = 1,
EQ = 2,
LE = 3,
GT = 4,
NE = 5,
GE = 6,
ALL = 7
};
unsigned char Direction : 3; // Init to ALL, then refine.
bool Scalar : 1; // Init to true.
bool PeelFirst : 1; // Peeling the first iteration will break dependence.
bool PeelLast : 1; // Peeling the last iteration will break the dependence.
bool Splitable : 1; // Splitting the loop will break dependence.
const SCEV *Distance = nullptr; // NULL implies no distance available.
DVEntry()
: Direction(ALL), Scalar(true), PeelFirst(false), PeelLast(false),
Splitable(false) {}
};
/// getSrc - Returns the source instruction for this dependence.
///
Instruction *getSrc() const { return Src; }
/// getDst - Returns the destination instruction for this dependence.
///
Instruction *getDst() const { return Dst; }
/// isInput - Returns true if this is an input dependence.
///
bool isInput() const;
/// isOutput - Returns true if this is an output dependence.
///
bool isOutput() const;
/// isFlow - Returns true if this is a flow (aka true) dependence.
///
bool isFlow() const;
/// isAnti - Returns true if this is an anti dependence.
///
bool isAnti() const;
/// isOrdered - Returns true if dependence is Output, Flow, or Anti
///
bool isOrdered() const { return isOutput() || isFlow() || isAnti(); }
/// isUnordered - Returns true if dependence is Input
///
bool isUnordered() const { return isInput(); }
/// isLoopIndependent - Returns true if this is a loop-independent
/// dependence.
virtual bool isLoopIndependent() const { return true; }
/// isConfused - Returns true if this dependence is confused
/// (the compiler understands nothing and makes worst-case
/// assumptions).
virtual bool isConfused() const { return true; }
/// isConsistent - Returns true if this dependence is consistent
/// (occurs every time the source and destination are executed).
virtual bool isConsistent() const { return false; }
/// getLevels - Returns the number of common loops surrounding the
/// source and destination of the dependence.
virtual unsigned getLevels() const { return 0; }
/// getDirection - Returns the direction associated with a particular
/// level.
virtual unsigned getDirection(unsigned Level) const { return DVEntry::ALL; }
/// getDistance - Returns the distance (or NULL) associated with a
/// particular level.
virtual const SCEV *getDistance(unsigned Level) const { return nullptr; }
/// Check if the direction vector is negative. A negative direction
/// vector means Src and Dst are reversed in the actual program.
virtual bool isDirectionNegative() const { return false; }
/// If the direction vector is negative, normalize the direction
/// vector to make it non-negative. Normalization is done by reversing
/// Src and Dst, plus reversing the dependence directions and distances
/// in the vector.
virtual bool normalize(ScalarEvolution *SE) { return false; }
/// isPeelFirst - Returns true if peeling the first iteration from
/// this loop will break this dependence.
virtual bool isPeelFirst(unsigned Level) const { return false; }
/// isPeelLast - Returns true if peeling the last iteration from
/// this loop will break this dependence.
virtual bool isPeelLast(unsigned Level) const { return false; }
/// isSplitable - Returns true if splitting this loop will break
/// the dependence.
virtual bool isSplitable(unsigned Level) const { return false; }
/// isScalar - Returns true if a particular level is scalar; that is,
/// if no subscript in the source or destination mention the induction
/// variable associated with the loop at this level.
virtual bool isScalar(unsigned Level) const;
/// getNextPredecessor - Returns the value of the NextPredecessor
/// field.
const Dependence *getNextPredecessor() const { return NextPredecessor; }
/// getNextSuccessor - Returns the value of the NextSuccessor
/// field.
const Dependence *getNextSuccessor() const { return NextSuccessor; }
/// setNextPredecessor - Sets the value of the NextPredecessor
/// field.
void setNextPredecessor(const Dependence *pred) { NextPredecessor = pred; }
/// setNextSuccessor - Sets the value of the NextSuccessor
/// field.
void setNextSuccessor(const Dependence *succ) { NextSuccessor = succ; }
/// dump - For debugging purposes, dumps a dependence to OS.
///
void dump(raw_ostream &OS) const;
protected:
Instruction *Src, *Dst;
private:
const Dependence *NextPredecessor = nullptr, *NextSuccessor = nullptr;
friend class DependenceInfo;
};
/// FullDependence - This class represents a dependence between two memory
/// references in a function. It contains detailed information about the
/// dependence (direction vectors, etc.) and is used when the compiler is
/// able to accurately analyze the interaction of the references; that is,
/// it is not a confused dependence (see Dependence). In most cases
/// (for output, flow, and anti dependences), the dependence implies an
/// ordering, where the source must precede the destination; in contrast,
/// input dependences are unordered.
class FullDependence final : public Dependence {
public:
FullDependence(Instruction *Src, Instruction *Dst, bool LoopIndependent,
unsigned Levels);
/// isLoopIndependent - Returns true if this is a loop-independent
/// dependence.
bool isLoopIndependent() const override { return LoopIndependent; }
/// isConfused - Returns true if this dependence is confused
/// (the compiler understands nothing and makes worst-case
/// assumptions).
bool isConfused() const override { return false; }
/// isConsistent - Returns true if this dependence is consistent
/// (occurs every time the source and destination are executed).
bool isConsistent() const override { return Consistent; }
/// getLevels - Returns the number of common loops surrounding the
/// source and destination of the dependence.
unsigned getLevels() const override { return Levels; }
/// getDirection - Returns the direction associated with a particular
/// level.
unsigned getDirection(unsigned Level) const override;
/// getDistance - Returns the distance (or NULL) associated with a
/// particular level.
const SCEV *getDistance(unsigned Level) const override;
/// Check if the direction vector is negative. A negative direction
/// vector means Src and Dst are reversed in the actual program.
bool isDirectionNegative() const override;
/// If the direction vector is negative, normalize the direction
/// vector to make it non-negative. Normalization is done by reversing
/// Src and Dst, plus reversing the dependence directions and distances
/// in the vector.
bool normalize(ScalarEvolution *SE) override;
/// isPeelFirst - Returns true if peeling the first iteration from
/// this loop will break this dependence.
bool isPeelFirst(unsigned Level) const override;
/// isPeelLast - Returns true if peeling the last iteration from
/// this loop will break this dependence.
bool isPeelLast(unsigned Level) const override;
/// isSplitable - Returns true if splitting the loop will break
/// the dependence.
bool isSplitable(unsigned Level) const override;
/// isScalar - Returns true if a particular level is scalar; that is,
/// if no subscript in the source or destination mention the induction
/// variable associated with the loop at this level.
bool isScalar(unsigned Level) const override;
private:
unsigned short Levels;
bool LoopIndependent;
bool Consistent; // Init to true, then refine.
std::unique_ptr<DVEntry[]> DV;
friend class DependenceInfo;
};
/// DependenceInfo - This class is the main dependence-analysis driver.
///
class DependenceInfo {
public:
DependenceInfo(Function *F, AAResults *AA, ScalarEvolution *SE,
LoopInfo *LI)
: AA(AA), SE(SE), LI(LI), F(F) {}
/// Handle transitive invalidation when the cached analysis results go away.
bool invalidate(Function &F, const PreservedAnalyses &PA,
FunctionAnalysisManager::Invalidator &Inv);
/// depends - Tests for a dependence between the Src and Dst instructions.
/// Returns NULL if no dependence; otherwise, returns a Dependence (or a
/// FullDependence) with as much information as can be gleaned.
/// The flag PossiblyLoopIndependent should be set by the caller
/// if it appears that control flow can reach from Src to Dst
/// without traversing a loop back edge.
std::unique_ptr<Dependence> depends(Instruction *Src,
Instruction *Dst,
bool PossiblyLoopIndependent);
/// getSplitIteration - Give a dependence that's splittable at some
/// particular level, return the iteration that should be used to split
/// the loop.
///
/// Generally, the dependence analyzer will be used to build
/// a dependence graph for a function (basically a map from instructions
/// to dependences). Looking for cycles in the graph shows us loops
/// that cannot be trivially vectorized/parallelized.
///
/// We can try to improve the situation by examining all the dependences
/// that make up the cycle, looking for ones we can break.
/// Sometimes, peeling the first or last iteration of a loop will break
/// dependences, and there are flags for those possibilities.
/// Sometimes, splitting a loop at some other iteration will do the trick,
/// and we've got a flag for that case. Rather than waste the space to
/// record the exact iteration (since we rarely know), we provide
/// a method that calculates the iteration. It's a drag that it must work
/// from scratch, but wonderful in that it's possible.
///
/// Here's an example:
///
/// for (i = 0; i < 10; i++)
/// A[i] = ...
/// ... = A[11 - i]
///
/// There's a loop-carried flow dependence from the store to the load,
/// found by the weak-crossing SIV test. The dependence will have a flag,
/// indicating that the dependence can be broken by splitting the loop.
/// Calling getSplitIteration will return 5.
/// Splitting the loop breaks the dependence, like so:
///
/// for (i = 0; i <= 5; i++)
/// A[i] = ...
/// ... = A[11 - i]
/// for (i = 6; i < 10; i++)
/// A[i] = ...
/// ... = A[11 - i]
///
/// breaks the dependence and allows us to vectorize/parallelize
/// both loops.
const SCEV *getSplitIteration(const Dependence &Dep, unsigned Level);
Function *getFunction() const { return F; }
private:
AAResults *AA;
ScalarEvolution *SE;
LoopInfo *LI;
Function *F;
/// Subscript - This private struct represents a pair of subscripts from
/// a pair of potentially multi-dimensional array references. We use a
/// vector of them to guide subscript partitioning.
struct Subscript {
const SCEV *Src;
const SCEV *Dst;
enum ClassificationKind { ZIV, SIV, RDIV, MIV, NonLinear } Classification;
SmallBitVector Loops;
SmallBitVector GroupLoops;
SmallBitVector Group;
};
struct CoefficientInfo {
const SCEV *Coeff;
const SCEV *PosPart;
const SCEV *NegPart;
const SCEV *Iterations;
};
struct BoundInfo {
const SCEV *Iterations;
const SCEV *Upper[8];
const SCEV *Lower[8];
unsigned char Direction;
unsigned char DirSet;
};
/// Constraint - This private class represents a constraint, as defined
/// in the paper
///
/// Practical Dependence Testing
/// Goff, Kennedy, Tseng
/// PLDI 1991
///
/// There are 5 kinds of constraint, in a hierarchy.
/// 1) Any - indicates no constraint, any dependence is possible.
/// 2) Line - A line ax + by = c, where a, b, and c are parameters,
/// representing the dependence equation.
/// 3) Distance - The value d of the dependence distance;
/// 4) Point - A point <x, y> representing the dependence from
/// iteration x to iteration y.
/// 5) Empty - No dependence is possible.
class Constraint {
private:
enum ConstraintKind { Empty, Point, Distance, Line, Any } Kind;
ScalarEvolution *SE;
const SCEV *A;
const SCEV *B;
const SCEV *C;
const Loop *AssociatedLoop;
public:
/// isEmpty - Return true if the constraint is of kind Empty.
bool isEmpty() const { return Kind == Empty; }
/// isPoint - Return true if the constraint is of kind Point.
bool isPoint() const { return Kind == Point; }
/// isDistance - Return true if the constraint is of kind Distance.
bool isDistance() const { return Kind == Distance; }
/// isLine - Return true if the constraint is of kind Line.
/// Since Distance's can also be represented as Lines, we also return
/// true if the constraint is of kind Distance.
bool isLine() const { return Kind == Line || Kind == Distance; }
/// isAny - Return true if the constraint is of kind Any;
bool isAny() const { return Kind == Any; }
/// getX - If constraint is a point <X, Y>, returns X.
/// Otherwise assert.
const SCEV *getX() const;
/// getY - If constraint is a point <X, Y>, returns Y.
/// Otherwise assert.
const SCEV *getY() const;
/// getA - If constraint is a line AX + BY = C, returns A.
/// Otherwise assert.
const SCEV *getA() const;
/// getB - If constraint is a line AX + BY = C, returns B.
/// Otherwise assert.
const SCEV *getB() const;
/// getC - If constraint is a line AX + BY = C, returns C.
/// Otherwise assert.
const SCEV *getC() const;
/// getD - If constraint is a distance, returns D.
/// Otherwise assert.
const SCEV *getD() const;
/// getAssociatedLoop - Returns the loop associated with this constraint.
const Loop *getAssociatedLoop() const;
/// setPoint - Change a constraint to Point.
void setPoint(const SCEV *X, const SCEV *Y, const Loop *CurrentLoop);
/// setLine - Change a constraint to Line.
void setLine(const SCEV *A, const SCEV *B,
const SCEV *C, const Loop *CurrentLoop);
/// setDistance - Change a constraint to Distance.
void setDistance(const SCEV *D, const Loop *CurrentLoop);
/// setEmpty - Change a constraint to Empty.
void setEmpty();
/// setAny - Change a constraint to Any.
void setAny(ScalarEvolution *SE);
/// dump - For debugging purposes. Dumps the constraint
/// out to OS.
void dump(raw_ostream &OS) const;
};
/// establishNestingLevels - Examines the loop nesting of the Src and Dst
/// instructions and establishes their shared loops. Sets the variables
/// CommonLevels, SrcLevels, and MaxLevels.
/// The source and destination instructions needn't be contained in the same
/// loop. The routine establishNestingLevels finds the level of most deeply
/// nested loop that contains them both, CommonLevels. An instruction that's
/// not contained in a loop is at level = 0. MaxLevels is equal to the level
/// of the source plus the level of the destination, minus CommonLevels.
/// This lets us allocate vectors MaxLevels in length, with room for every
/// distinct loop referenced in both the source and destination subscripts.
/// The variable SrcLevels is the nesting depth of the source instruction.
/// It's used to help calculate distinct loops referenced by the destination.
/// Here's the map from loops to levels:
/// 0 - unused
/// 1 - outermost common loop
/// ... - other common loops
/// CommonLevels - innermost common loop
/// ... - loops containing Src but not Dst
/// SrcLevels - innermost loop containing Src but not Dst
/// ... - loops containing Dst but not Src
/// MaxLevels - innermost loop containing Dst but not Src
/// Consider the follow code fragment:
/// for (a = ...) {
/// for (b = ...) {
/// for (c = ...) {
/// for (d = ...) {
/// A[] = ...;
/// }
/// }
/// for (e = ...) {
/// for (f = ...) {
/// for (g = ...) {
/// ... = A[];
/// }
/// }
/// }
/// }
/// }
/// If we're looking at the possibility of a dependence between the store
/// to A (the Src) and the load from A (the Dst), we'll note that they
/// have 2 loops in common, so CommonLevels will equal 2 and the direction
/// vector for Result will have 2 entries. SrcLevels = 4 and MaxLevels = 7.
/// A map from loop names to level indices would look like
/// a - 1
/// b - 2 = CommonLevels
/// c - 3
/// d - 4 = SrcLevels
/// e - 5
/// f - 6
/// g - 7 = MaxLevels
void establishNestingLevels(const Instruction *Src,
const Instruction *Dst);
unsigned CommonLevels, SrcLevels, MaxLevels;
/// mapSrcLoop - Given one of the loops containing the source, return
/// its level index in our numbering scheme.
unsigned mapSrcLoop(const Loop *SrcLoop) const;
/// mapDstLoop - Given one of the loops containing the destination,
/// return its level index in our numbering scheme.
unsigned mapDstLoop(const Loop *DstLoop) const;
/// isLoopInvariant - Returns true if Expression is loop invariant
/// in LoopNest.
bool isLoopInvariant(const SCEV *Expression, const Loop *LoopNest) const;
/// Makes sure all subscript pairs share the same integer type by
/// sign-extending as necessary.
/// Sign-extending a subscript is safe because getelementptr assumes the
/// array subscripts are signed.
void unifySubscriptType(ArrayRef<Subscript *> Pairs);
/// removeMatchingExtensions - Examines a subscript pair.
/// If the source and destination are identically sign (or zero)
/// extended, it strips off the extension in an effort to
/// simplify the actual analysis.
void removeMatchingExtensions(Subscript *Pair);
/// collectCommonLoops - Finds the set of loops from the LoopNest that
/// have a level <= CommonLevels and are referred to by the SCEV Expression.
void collectCommonLoops(const SCEV *Expression,
const Loop *LoopNest,
SmallBitVector &Loops) const;
/// checkSrcSubscript - Examines the SCEV Src, returning true iff it's
/// linear. Collect the set of loops mentioned by Src.
bool checkSrcSubscript(const SCEV *Src,
const Loop *LoopNest,
SmallBitVector &Loops);
/// checkDstSubscript - Examines the SCEV Dst, returning true iff it's
/// linear. Collect the set of loops mentioned by Dst.
bool checkDstSubscript(const SCEV *Dst,
const Loop *LoopNest,
SmallBitVector &Loops);
/// isKnownPredicate - Compare X and Y using the predicate Pred.
/// Basically a wrapper for SCEV::isKnownPredicate,
/// but tries harder, especially in the presence of sign and zero
/// extensions and symbolics.
bool isKnownPredicate(ICmpInst::Predicate Pred,
const SCEV *X,
const SCEV *Y) const;
/// isKnownLessThan - Compare to see if S is less than Size
/// Another wrapper for isKnownNegative(S - max(Size, 1)) with some extra
/// checking if S is an AddRec and we can prove lessthan using the loop
/// bounds.
bool isKnownLessThan(const SCEV *S, const SCEV *Size) const;
/// isKnownNonNegative - Compare to see if S is known not to be negative
/// Uses the fact that S comes from Ptr, which may be an inbound GEP,
/// Proving there is no wrapping going on.
bool isKnownNonNegative(const SCEV *S, const Value *Ptr) const;
/// collectUpperBound - All subscripts are the same type (on my machine,
/// an i64). The loop bound may be a smaller type. collectUpperBound
/// find the bound, if available, and zero extends it to the Type T.
/// (I zero extend since the bound should always be >= 0.)
/// If no upper bound is available, return NULL.
const SCEV *collectUpperBound(const Loop *l, Type *T) const;
/// collectConstantUpperBound - Calls collectUpperBound(), then
/// attempts to cast it to SCEVConstant. If the cast fails,
/// returns NULL.
const SCEVConstant *collectConstantUpperBound(const Loop *l, Type *T) const;
/// classifyPair - Examines the subscript pair (the Src and Dst SCEVs)
/// and classifies it as either ZIV, SIV, RDIV, MIV, or Nonlinear.
/// Collects the associated loops in a set.
Subscript::ClassificationKind classifyPair(const SCEV *Src,
const Loop *SrcLoopNest,
const SCEV *Dst,
const Loop *DstLoopNest,
SmallBitVector &Loops);
/// testZIV - Tests the ZIV subscript pair (Src and Dst) for dependence.
/// Returns true if any possible dependence is disproved.
/// If there might be a dependence, returns false.
/// If the dependence isn't proven to exist,
/// marks the Result as inconsistent.
bool testZIV(const SCEV *Src,
const SCEV *Dst,
FullDependence &Result) const;
/// testSIV - Tests the SIV subscript pair (Src and Dst) for dependence.
/// Things of the form [c1 + a1*i] and [c2 + a2*j], where
/// i and j are induction variables, c1 and c2 are loop invariant,
/// and a1 and a2 are constant.
/// Returns true if any possible dependence is disproved.
/// If there might be a dependence, returns false.
/// Sets appropriate direction vector entry and, when possible,
/// the distance vector entry.
/// If the dependence isn't proven to exist,
/// marks the Result as inconsistent.
bool testSIV(const SCEV *Src,
const SCEV *Dst,
unsigned &Level,
FullDependence &Result,
Constraint &NewConstraint,
const SCEV *&SplitIter) const;
/// testRDIV - Tests the RDIV subscript pair (Src and Dst) for dependence.
/// Things of the form [c1 + a1*i] and [c2 + a2*j]
/// where i and j are induction variables, c1 and c2 are loop invariant,
/// and a1 and a2 are constant.
/// With minor algebra, this test can also be used for things like
/// [c1 + a1*i + a2*j][c2].
/// Returns true if any possible dependence is disproved.
/// If there might be a dependence, returns false.
/// Marks the Result as inconsistent.
bool testRDIV(const SCEV *Src,
const SCEV *Dst,
FullDependence &Result) const;
/// testMIV - Tests the MIV subscript pair (Src and Dst) for dependence.
/// Returns true if dependence disproved.
/// Can sometimes refine direction vectors.
bool testMIV(const SCEV *Src,
const SCEV *Dst,
const SmallBitVector &Loops,
FullDependence &Result) const;
/// strongSIVtest - Tests the strong SIV subscript pair (Src and Dst)
/// for dependence.
/// Things of the form [c1 + a*i] and [c2 + a*i],
/// where i is an induction variable, c1 and c2 are loop invariant,
/// and a is a constant
/// Returns true if any possible dependence is disproved.
/// If there might be a dependence, returns false.
/// Sets appropriate direction and distance.
bool strongSIVtest(const SCEV *Coeff,
const SCEV *SrcConst,
const SCEV *DstConst,
const Loop *CurrentLoop,
unsigned Level,
FullDependence &Result,
Constraint &NewConstraint) const;
/// weakCrossingSIVtest - Tests the weak-crossing SIV subscript pair
/// (Src and Dst) for dependence.
/// Things of the form [c1 + a*i] and [c2 - a*i],
/// where i is an induction variable, c1 and c2 are loop invariant,
/// and a is a constant.
/// Returns true if any possible dependence is disproved.
/// If there might be a dependence, returns false.
/// Sets appropriate direction entry.
/// Set consistent to false.
/// Marks the dependence as splitable.
bool weakCrossingSIVtest(const SCEV *SrcCoeff,
const SCEV *SrcConst,
const SCEV *DstConst,
const Loop *CurrentLoop,
unsigned Level,
FullDependence &Result,
Constraint &NewConstraint,
const SCEV *&SplitIter) const;
/// ExactSIVtest - Tests the SIV subscript pair
/// (Src and Dst) for dependence.
/// Things of the form [c1 + a1*i] and [c2 + a2*i],
/// where i is an induction variable, c1 and c2 are loop invariant,
/// and a1 and a2 are constant.
/// Returns true if any possible dependence is disproved.
/// If there might be a dependence, returns false.
/// Sets appropriate direction entry.
/// Set consistent to false.
bool exactSIVtest(const SCEV *SrcCoeff,
const SCEV *DstCoeff,
const SCEV *SrcConst,
const SCEV *DstConst,
const Loop *CurrentLoop,
unsigned Level,
FullDependence &Result,
Constraint &NewConstraint) const;
/// weakZeroSrcSIVtest - Tests the weak-zero SIV subscript pair
/// (Src and Dst) for dependence.
/// Things of the form [c1] and [c2 + a*i],
/// where i is an induction variable, c1 and c2 are loop invariant,
/// and a is a constant. See also weakZeroDstSIVtest.
/// Returns true if any possible dependence is disproved.
/// If there might be a dependence, returns false.
/// Sets appropriate direction entry.
/// Set consistent to false.
/// If loop peeling will break the dependence, mark appropriately.
bool weakZeroSrcSIVtest(const SCEV *DstCoeff,
const SCEV *SrcConst,
const SCEV *DstConst,
const Loop *CurrentLoop,
unsigned Level,
FullDependence &Result,
Constraint &NewConstraint) const;
/// weakZeroDstSIVtest - Tests the weak-zero SIV subscript pair
/// (Src and Dst) for dependence.
/// Things of the form [c1 + a*i] and [c2],
/// where i is an induction variable, c1 and c2 are loop invariant,
/// and a is a constant. See also weakZeroSrcSIVtest.
/// Returns true if any possible dependence is disproved.
/// If there might be a dependence, returns false.
/// Sets appropriate direction entry.
/// Set consistent to false.
/// If loop peeling will break the dependence, mark appropriately.
bool weakZeroDstSIVtest(const SCEV *SrcCoeff,
const SCEV *SrcConst,
const SCEV *DstConst,
const Loop *CurrentLoop,
unsigned Level,
FullDependence &Result,
Constraint &NewConstraint) const;
/// exactRDIVtest - Tests the RDIV subscript pair for dependence.
/// Things of the form [c1 + a*i] and [c2 + b*j],
/// where i and j are induction variable, c1 and c2 are loop invariant,
/// and a and b are constants.
/// Returns true if any possible dependence is disproved.
/// Marks the result as inconsistent.
/// Works in some cases that symbolicRDIVtest doesn't,
/// and vice versa.
bool exactRDIVtest(const SCEV *SrcCoeff,
const SCEV *DstCoeff,
const SCEV *SrcConst,
const SCEV *DstConst,
const Loop *SrcLoop,
const Loop *DstLoop,
FullDependence &Result) const;
/// symbolicRDIVtest - Tests the RDIV subscript pair for dependence.
/// Things of the form [c1 + a*i] and [c2 + b*j],
/// where i and j are induction variable, c1 and c2 are loop invariant,
/// and a and b are constants.
/// Returns true if any possible dependence is disproved.
/// Marks the result as inconsistent.
/// Works in some cases that exactRDIVtest doesn't,
/// and vice versa. Can also be used as a backup for
/// ordinary SIV tests.
bool symbolicRDIVtest(const SCEV *SrcCoeff,
const SCEV *DstCoeff,
const SCEV *SrcConst,
const SCEV *DstConst,
const Loop *SrcLoop,
const Loop *DstLoop) const;
/// gcdMIVtest - Tests an MIV subscript pair for dependence.
/// Returns true if any possible dependence is disproved.
/// Marks the result as inconsistent.
/// Can sometimes disprove the equal direction for 1 or more loops.
// Can handle some symbolics that even the SIV tests don't get,
/// so we use it as a backup for everything.
bool gcdMIVtest(const SCEV *Src,
const SCEV *Dst,
FullDependence &Result) const;
/// banerjeeMIVtest - Tests an MIV subscript pair for dependence.
/// Returns true if any possible dependence is disproved.
/// Marks the result as inconsistent.
/// Computes directions.
bool banerjeeMIVtest(const SCEV *Src,
const SCEV *Dst,
const SmallBitVector &Loops,
FullDependence &Result) const;
/// collectCoefficientInfo - Walks through the subscript,
/// collecting each coefficient, the associated loop bounds,
/// and recording its positive and negative parts for later use.
CoefficientInfo *collectCoeffInfo(const SCEV *Subscript,
bool SrcFlag,
const SCEV *&Constant) const;
/// getPositivePart - X^+ = max(X, 0).
///
const SCEV *getPositivePart(const SCEV *X) const;
/// getNegativePart - X^- = min(X, 0).
///
const SCEV *getNegativePart(const SCEV *X) const;
/// getLowerBound - Looks through all the bounds info and
/// computes the lower bound given the current direction settings
/// at each level.
const SCEV *getLowerBound(BoundInfo *Bound) const;
/// getUpperBound - Looks through all the bounds info and
/// computes the upper bound given the current direction settings
/// at each level.
const SCEV *getUpperBound(BoundInfo *Bound) const;
/// exploreDirections - Hierarchically expands the direction vector
/// search space, combining the directions of discovered dependences
/// in the DirSet field of Bound. Returns the number of distinct
/// dependences discovered. If the dependence is disproved,
/// it will return 0.
unsigned exploreDirections(unsigned Level,
CoefficientInfo *A,
CoefficientInfo *B,
BoundInfo *Bound,
const SmallBitVector &Loops,
unsigned &DepthExpanded,
const SCEV *Delta) const;
/// testBounds - Returns true iff the current bounds are plausible.
bool testBounds(unsigned char DirKind,
unsigned Level,
BoundInfo *Bound,
const SCEV *Delta) const;
/// findBoundsALL - Computes the upper and lower bounds for level K
/// using the * direction. Records them in Bound.
void findBoundsALL(CoefficientInfo *A,
CoefficientInfo *B,
BoundInfo *Bound,
unsigned K) const;
/// findBoundsLT - Computes the upper and lower bounds for level K
/// using the < direction. Records them in Bound.
void findBoundsLT(CoefficientInfo *A,
CoefficientInfo *B,
BoundInfo *Bound,
unsigned K) const;
/// findBoundsGT - Computes the upper and lower bounds for level K
/// using the > direction. Records them in Bound.
void findBoundsGT(CoefficientInfo *A,
CoefficientInfo *B,
BoundInfo *Bound,
unsigned K) const;
/// findBoundsEQ - Computes the upper and lower bounds for level K
/// using the = direction. Records them in Bound.
void findBoundsEQ(CoefficientInfo *A,
CoefficientInfo *B,
BoundInfo *Bound,
unsigned K) const;
/// intersectConstraints - Updates X with the intersection
/// of the Constraints X and Y. Returns true if X has changed.
bool intersectConstraints(Constraint *X,
const Constraint *Y);
/// propagate - Review the constraints, looking for opportunities
/// to simplify a subscript pair (Src and Dst).
/// Return true if some simplification occurs.
/// If the simplification isn't exact (that is, if it is conservative
/// in terms of dependence), set consistent to false.
bool propagate(const SCEV *&Src,
const SCEV *&Dst,
SmallBitVector &Loops,
SmallVectorImpl<Constraint> &Constraints,
bool &Consistent);
/// propagateDistance - Attempt to propagate a distance
/// constraint into a subscript pair (Src and Dst).
/// Return true if some simplification occurs.
/// If the simplification isn't exact (that is, if it is conservative
/// in terms of dependence), set consistent to false.
bool propagateDistance(const SCEV *&Src,
const SCEV *&Dst,
Constraint &CurConstraint,
bool &Consistent);
/// propagatePoint - Attempt to propagate a point
/// constraint into a subscript pair (Src and Dst).
/// Return true if some simplification occurs.
bool propagatePoint(const SCEV *&Src,
const SCEV *&Dst,
Constraint &CurConstraint);
/// propagateLine - Attempt to propagate a line
/// constraint into a subscript pair (Src and Dst).
/// Return true if some simplification occurs.
/// If the simplification isn't exact (that is, if it is conservative
/// in terms of dependence), set consistent to false.
bool propagateLine(const SCEV *&Src,
const SCEV *&Dst,
Constraint &CurConstraint,
bool &Consistent);
/// findCoefficient - Given a linear SCEV,
/// return the coefficient corresponding to specified loop.
/// If there isn't one, return the SCEV constant 0.
/// For example, given a*i + b*j + c*k, returning the coefficient
/// corresponding to the j loop would yield b.
const SCEV *findCoefficient(const SCEV *Expr,
const Loop *TargetLoop) const;
/// zeroCoefficient - Given a linear SCEV,
/// return the SCEV given by zeroing out the coefficient
/// corresponding to the specified loop.
/// For example, given a*i + b*j + c*k, zeroing the coefficient
/// corresponding to the j loop would yield a*i + c*k.
const SCEV *zeroCoefficient(const SCEV *Expr,
const Loop *TargetLoop) const;
/// addToCoefficient - Given a linear SCEV Expr,
/// return the SCEV given by adding some Value to the
/// coefficient corresponding to the specified TargetLoop.
/// For example, given a*i + b*j + c*k, adding 1 to the coefficient
/// corresponding to the j loop would yield a*i + (b+1)*j + c*k.
const SCEV *addToCoefficient(const SCEV *Expr,
const Loop *TargetLoop,
const SCEV *Value) const;
/// updateDirection - Update direction vector entry
/// based on the current constraint.
void updateDirection(Dependence::DVEntry &Level,
const Constraint &CurConstraint) const;
/// Given a linear access function, tries to recover subscripts
/// for each dimension of the array element access.
bool tryDelinearize(Instruction *Src, Instruction *Dst,
SmallVectorImpl<Subscript> &Pair);
/// Tries to delinearize \p Src and \p Dst access functions for a fixed size
/// multi-dimensional array. Calls tryDelinearizeFixedSizeImpl() to
/// delinearize \p Src and \p Dst separately,
bool tryDelinearizeFixedSize(Instruction *Src, Instruction *Dst,
const SCEV *SrcAccessFn,
const SCEV *DstAccessFn,
SmallVectorImpl<const SCEV *> &SrcSubscripts,
SmallVectorImpl<const SCEV *> &DstSubscripts);
/// Tries to delinearize access function for a multi-dimensional array with
/// symbolic runtime sizes.
/// Returns true upon success and false otherwise.
bool tryDelinearizeParametricSize(
Instruction *Src, Instruction *Dst, const SCEV *SrcAccessFn,
const SCEV *DstAccessFn, SmallVectorImpl<const SCEV *> &SrcSubscripts,
SmallVectorImpl<const SCEV *> &DstSubscripts);
/// checkSubscript - Helper function for checkSrcSubscript and
/// checkDstSubscript to avoid duplicate code
bool checkSubscript(const SCEV *Expr, const Loop *LoopNest,
SmallBitVector &Loops, bool IsSrc);
}; // class DependenceInfo
/// AnalysisPass to compute dependence information in a function
class DependenceAnalysis : public AnalysisInfoMixin<DependenceAnalysis> {
public:
typedef DependenceInfo Result;
Result run(Function &F, FunctionAnalysisManager &FAM);
private:
static AnalysisKey Key;
friend struct AnalysisInfoMixin<DependenceAnalysis>;
}; // class DependenceAnalysis
/// Printer pass to dump DA results.
struct DependenceAnalysisPrinterPass
: public PassInfoMixin<DependenceAnalysisPrinterPass> {
DependenceAnalysisPrinterPass(raw_ostream &OS,
bool NormalizeResults = false)
: OS(OS), NormalizeResults(NormalizeResults) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &FAM);
private:
raw_ostream &OS;
bool NormalizeResults;
}; // class DependenceAnalysisPrinterPass
/// Legacy pass manager pass to access dependence information
class DependenceAnalysisWrapperPass : public FunctionPass {
public:
static char ID; // Class identification, replacement for typeinfo
DependenceAnalysisWrapperPass();
bool runOnFunction(Function &F) override;
void releaseMemory() override;
void getAnalysisUsage(AnalysisUsage &) const override;
void print(raw_ostream &, const Module * = nullptr) const override;
DependenceInfo &getDI() const;
private:
std::unique_ptr<DependenceInfo> info;
}; // class DependenceAnalysisWrapperPass
/// createDependenceAnalysisPass - This creates an instance of the
/// DependenceAnalysis wrapper pass.
FunctionPass *createDependenceAnalysisWrapperPass();
} // namespace llvm
#endif
PK iwFZ��U Z Z Analysis/DominanceFrontierImpl.hnu �[��� //===- llvm/Analysis/DominanceFrontier.h - Dominator Frontiers --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This is the generic implementation of the DominanceFrontier class, which
// calculate and holds the dominance frontier for a function for.
//
// This should be considered deprecated, don't add any more uses of this data
// structure.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_DOMINANCEFRONTIERIMPL_H
#define LLVM_ANALYSIS_DOMINANCEFRONTIERIMPL_H
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/Analysis/DominanceFrontier.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/GenericDomTree.h"
#include "llvm/Support/raw_ostream.h"
#include <cassert>
#include <set>
#include <utility>
#include <vector>
namespace llvm {
template <class BlockT>
class DFCalculateWorkObject {
public:
using DomTreeNodeT = DomTreeNodeBase<BlockT>;
DFCalculateWorkObject(BlockT *B, BlockT *P, const DomTreeNodeT *N,
const DomTreeNodeT *PN)
: currentBB(B), parentBB(P), Node(N), parentNode(PN) {}
BlockT *currentBB;
BlockT *parentBB;
const DomTreeNodeT *Node;
const DomTreeNodeT *parentNode;
};
template <class BlockT, bool IsPostDom>
void DominanceFrontierBase<BlockT, IsPostDom>::removeBlock(BlockT *BB) {
assert(find(BB) != end() && "Block is not in DominanceFrontier!");
for (iterator I = begin(), E = end(); I != E; ++I)
I->second.erase(BB);
Frontiers.erase(BB);
}
template <class BlockT, bool IsPostDom>
void DominanceFrontierBase<BlockT, IsPostDom>::addToFrontier(iterator I,
BlockT *Node) {
assert(I != end() && "BB is not in DominanceFrontier!");
assert(I->second.count(Node) && "Node is not in DominanceFrontier of BB");
I->second.erase(Node);
}
template <class BlockT, bool IsPostDom>
void DominanceFrontierBase<BlockT, IsPostDom>::removeFromFrontier(
iterator I, BlockT *Node) {
assert(I != end() && "BB is not in DominanceFrontier!");
assert(I->second.count(Node) && "Node is not in DominanceFrontier of BB");
I->second.erase(Node);
}
template <class BlockT, bool IsPostDom>
bool DominanceFrontierBase<BlockT, IsPostDom>::compareDomSet(
DomSetType &DS1, const DomSetType &DS2) const {
std::set<BlockT *> tmpSet;
for (BlockT *BB : DS2)
tmpSet.insert(BB);
for (typename DomSetType::const_iterator I = DS1.begin(), E = DS1.end();
I != E;) {
BlockT *Node = *I++;
if (tmpSet.erase(Node) == 0)
// Node is in DS1 but tnot in DS2.
return true;
}
if (!tmpSet.empty()) {
// There are nodes that are in DS2 but not in DS1.
return true;
}
// DS1 and DS2 matches.
return false;
}
template <class BlockT, bool IsPostDom>
bool DominanceFrontierBase<BlockT, IsPostDom>::compare(
DominanceFrontierBase<BlockT, IsPostDom> &Other) const {
DomSetMapType tmpFrontiers;
for (typename DomSetMapType::const_iterator I = Other.begin(),
E = Other.end();
I != E; ++I)
tmpFrontiers.insert(std::make_pair(I->first, I->second));
for (typename DomSetMapType::iterator I = tmpFrontiers.begin(),
E = tmpFrontiers.end();
I != E;) {
BlockT *Node = I->first;
const_iterator DFI = find(Node);
if (DFI == end())
return true;
if (compareDomSet(I->second, DFI->second))
return true;
++I;
tmpFrontiers.erase(Node);
}
if (!tmpFrontiers.empty())
return true;
return false;
}
template <class BlockT, bool IsPostDom>
void DominanceFrontierBase<BlockT, IsPostDom>::print(raw_ostream &OS) const {
for (const_iterator I = begin(), E = end(); I != E; ++I) {
OS << " DomFrontier for BB ";
if (I->first)
I->first->printAsOperand(OS, false);
else
OS << " <<exit node>>";
OS << " is:\t";
const std::set<BlockT *> &BBs = I->second;
for (const BlockT *BB : BBs) {
OS << ' ';
if (BB)
BB->printAsOperand(OS, false);
else
OS << "<<exit node>>";
}
OS << '\n';
}
}
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
template <class BlockT, bool IsPostDom>
void DominanceFrontierBase<BlockT, IsPostDom>::dump() const {
print(dbgs());
}
#endif
template <class BlockT>
const typename ForwardDominanceFrontierBase<BlockT>::DomSetType &
ForwardDominanceFrontierBase<BlockT>::calculate(const DomTreeT &DT,
const DomTreeNodeT *Node) {
BlockT *BB = Node->getBlock();
DomSetType *Result = nullptr;
std::vector<DFCalculateWorkObject<BlockT>> workList;
SmallPtrSet<BlockT *, 32> visited;
workList.push_back(DFCalculateWorkObject<BlockT>(BB, nullptr, Node, nullptr));
do {
DFCalculateWorkObject<BlockT> *currentW = &workList.back();
assert(currentW && "Missing work object.");
BlockT *currentBB = currentW->currentBB;
BlockT *parentBB = currentW->parentBB;
const DomTreeNodeT *currentNode = currentW->Node;
const DomTreeNodeT *parentNode = currentW->parentNode;
assert(currentBB && "Invalid work object. Missing current Basic Block");
assert(currentNode && "Invalid work object. Missing current Node");
DomSetType &S = this->Frontiers[currentBB];
// Visit each block only once.
if (visited.insert(currentBB).second) {
// Loop over CFG successors to calculate DFlocal[currentNode]
for (const auto Succ : children<BlockT *>(currentBB)) {
// Does Node immediately dominate this successor?
if (DT[Succ]->getIDom() != currentNode)
S.insert(Succ);
}
}
// At this point, S is DFlocal. Now we union in DFup's of our children...
// Loop through and visit the nodes that Node immediately dominates (Node's
// children in the IDomTree)
bool visitChild = false;
for (typename DomTreeNodeT::const_iterator NI = currentNode->begin(),
NE = currentNode->end();
NI != NE; ++NI) {
DomTreeNodeT *IDominee = *NI;
BlockT *childBB = IDominee->getBlock();
if (visited.count(childBB) == 0) {
workList.push_back(DFCalculateWorkObject<BlockT>(
childBB, currentBB, IDominee, currentNode));
visitChild = true;
}
}
// If all children are visited or there is any child then pop this block
// from the workList.
if (!visitChild) {
if (!parentBB) {
Result = &S;
break;
}
typename DomSetType::const_iterator CDFI = S.begin(), CDFE = S.end();
DomSetType &parentSet = this->Frontiers[parentBB];
for (; CDFI != CDFE; ++CDFI) {
if (!DT.properlyDominates(parentNode, DT[*CDFI]))
parentSet.insert(*CDFI);
}
workList.pop_back();
}
} while (!workList.empty());
return *Result;
}
} // end namespace llvm
#endif // LLVM_ANALYSIS_DOMINANCEFRONTIERIMPL_H
PK iwFZ�ɾ�vF vF Analysis/IVDescriptors.hnu �[��� //===- llvm/Analysis/IVDescriptors.h - IndVar Descriptors -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file "describes" induction and recurrence variables.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_IVDESCRIPTORS_H
#define LLVM_ANALYSIS_IVDESCRIPTORS_H
#include "llvm/ADT/MapVector.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/ValueHandle.h"
namespace llvm {
class AssumptionCache;
class DemandedBits;
class DominatorTree;
class Instruction;
class Loop;
class PredicatedScalarEvolution;
class ScalarEvolution;
class SCEV;
class StoreInst;
/// These are the kinds of recurrences that we support.
enum class RecurKind {
None, ///< Not a recurrence.
Add, ///< Sum of integers.
Mul, ///< Product of integers.
Or, ///< Bitwise or logical OR of integers.
And, ///< Bitwise or logical AND of integers.
Xor, ///< Bitwise or logical XOR of integers.
SMin, ///< Signed integer min implemented in terms of select(cmp()).
SMax, ///< Signed integer max implemented in terms of select(cmp()).
UMin, ///< Unisgned integer min implemented in terms of select(cmp()).
UMax, ///< Unsigned integer max implemented in terms of select(cmp()).
FAdd, ///< Sum of floats.
FMul, ///< Product of floats.
FMin, ///< FP min implemented in terms of select(cmp()).
FMax, ///< FP max implemented in terms of select(cmp()).
FMinimum, ///< FP min with llvm.minimum semantics
FMaximum, ///< FP max with llvm.maximum semantics
FMulAdd, ///< Fused multiply-add of floats (a * b + c).
SelectICmp, ///< Integer select(icmp(),x,y) where one of (x,y) is loop
///< invariant
SelectFCmp ///< Integer select(fcmp(),x,y) where one of (x,y) is loop
///< invariant
};
/// The RecurrenceDescriptor is used to identify recurrences variables in a
/// loop. Reduction is a special case of recurrence that has uses of the
/// recurrence variable outside the loop. The method isReductionPHI identifies
/// reductions that are basic recurrences.
///
/// Basic recurrences are defined as the summation, product, OR, AND, XOR, min,
/// or max of a set of terms. For example: for(i=0; i<n; i++) { total +=
/// array[i]; } is a summation of array elements. Basic recurrences are a
/// special case of chains of recurrences (CR). See ScalarEvolution for CR
/// references.
/// This struct holds information about recurrence variables.
class RecurrenceDescriptor {
public:
RecurrenceDescriptor() = default;
RecurrenceDescriptor(Value *Start, Instruction *Exit, StoreInst *Store,
RecurKind K, FastMathFlags FMF, Instruction *ExactFP,
Type *RT, bool Signed, bool Ordered,
SmallPtrSetImpl<Instruction *> &CI,
unsigned MinWidthCastToRecurTy)
: IntermediateStore(Store), StartValue(Start), LoopExitInstr(Exit),
Kind(K), FMF(FMF), ExactFPMathInst(ExactFP), RecurrenceType(RT),
IsSigned(Signed), IsOrdered(Ordered),
MinWidthCastToRecurrenceType(MinWidthCastToRecurTy) {
CastInsts.insert(CI.begin(), CI.end());
}
/// This POD struct holds information about a potential recurrence operation.
class InstDesc {
public:
InstDesc(bool IsRecur, Instruction *I, Instruction *ExactFP = nullptr)
: IsRecurrence(IsRecur), PatternLastInst(I),
RecKind(RecurKind::None), ExactFPMathInst(ExactFP) {}
InstDesc(Instruction *I, RecurKind K, Instruction *ExactFP = nullptr)
: IsRecurrence(true), PatternLastInst(I), RecKind(K),
ExactFPMathInst(ExactFP) {}
bool isRecurrence() const { return IsRecurrence; }
bool needsExactFPMath() const { return ExactFPMathInst != nullptr; }
Instruction *getExactFPMathInst() const { return ExactFPMathInst; }
RecurKind getRecKind() const { return RecKind; }
Instruction *getPatternInst() const { return PatternLastInst; }
private:
// Is this instruction a recurrence candidate.
bool IsRecurrence;
// The last instruction in a min/max pattern (select of the select(icmp())
// pattern), or the current recurrence instruction otherwise.
Instruction *PatternLastInst;
// If this is a min/max pattern.
RecurKind RecKind;
// Recurrence does not allow floating-point reassociation.
Instruction *ExactFPMathInst;
};
/// Returns a struct describing if the instruction 'I' can be a recurrence
/// variable of type 'Kind' for a Loop \p L and reduction PHI \p Phi.
/// If the recurrence is a min/max pattern of select(icmp()) this function
/// advances the instruction pointer 'I' from the compare instruction to the
/// select instruction and stores this pointer in 'PatternLastInst' member of
/// the returned struct.
static InstDesc isRecurrenceInstr(Loop *L, PHINode *Phi, Instruction *I,
RecurKind Kind, InstDesc &Prev,
FastMathFlags FuncFMF);
/// Returns true if instruction I has multiple uses in Insts
static bool hasMultipleUsesOf(Instruction *I,
SmallPtrSetImpl<Instruction *> &Insts,
unsigned MaxNumUses);
/// Returns true if all uses of the instruction I is within the Set.
static bool areAllUsesIn(Instruction *I, SmallPtrSetImpl<Instruction *> &Set);
/// Returns a struct describing if the instruction is a llvm.(s/u)(min/max),
/// llvm.minnum/maxnum or a Select(ICmp(X, Y), X, Y) pair of instructions
/// corresponding to a min(X, Y) or max(X, Y), matching the recurrence kind \p
/// Kind. \p Prev specifies the description of an already processed select
/// instruction, so its corresponding cmp can be matched to it.
static InstDesc isMinMaxPattern(Instruction *I, RecurKind Kind,
const InstDesc &Prev);
/// Returns a struct describing whether the instruction is either a
/// Select(ICmp(A, B), X, Y), or
/// Select(FCmp(A, B), X, Y)
/// where one of (X, Y) is a loop invariant integer and the other is a PHI
/// value. \p Prev specifies the description of an already processed select
/// instruction, so its corresponding cmp can be matched to it.
static InstDesc isSelectCmpPattern(Loop *Loop, PHINode *OrigPhi,
Instruction *I, InstDesc &Prev);
/// Returns a struct describing if the instruction is a
/// Select(FCmp(X, Y), (Z = X op PHINode), PHINode) instruction pattern.
static InstDesc isConditionalRdxPattern(RecurKind Kind, Instruction *I);
/// Returns identity corresponding to the RecurrenceKind.
Value *getRecurrenceIdentity(RecurKind K, Type *Tp, FastMathFlags FMF) const;
/// Returns the opcode corresponding to the RecurrenceKind.
static unsigned getOpcode(RecurKind Kind);
/// Returns true if Phi is a reduction of type Kind and adds it to the
/// RecurrenceDescriptor. If either \p DB is non-null or \p AC and \p DT are
/// non-null, the minimal bit width needed to compute the reduction will be
/// computed.
static bool
AddReductionVar(PHINode *Phi, RecurKind Kind, Loop *TheLoop,
FastMathFlags FuncFMF, RecurrenceDescriptor &RedDes,
DemandedBits *DB = nullptr, AssumptionCache *AC = nullptr,
DominatorTree *DT = nullptr, ScalarEvolution *SE = nullptr);
/// Returns true if Phi is a reduction in TheLoop. The RecurrenceDescriptor
/// is returned in RedDes. If either \p DB is non-null or \p AC and \p DT are
/// non-null, the minimal bit width needed to compute the reduction will be
/// computed. If \p SE is non-null, store instructions to loop invariant
/// addresses are processed.
static bool
isReductionPHI(PHINode *Phi, Loop *TheLoop, RecurrenceDescriptor &RedDes,
DemandedBits *DB = nullptr, AssumptionCache *AC = nullptr,
DominatorTree *DT = nullptr, ScalarEvolution *SE = nullptr);
/// Returns true if Phi is a fixed-order recurrence. A fixed-order recurrence
/// is a non-reduction recurrence relation in which the value of the
/// recurrence in the current loop iteration equals a value defined in a
/// previous iteration (e.g. if the value is defined in the previous
/// iteration, we refer to it as first-order recurrence, if it is defined in
/// the iteration before the previous, we refer to it as second-order
/// recurrence and so on). Note that this function optimistically assumes that
/// uses of the recurrence can be re-ordered if necessary and users need to
/// check and perform the re-ordering.
static bool isFixedOrderRecurrence(PHINode *Phi, Loop *TheLoop,
DominatorTree *DT);
RecurKind getRecurrenceKind() const { return Kind; }
unsigned getOpcode() const { return getOpcode(getRecurrenceKind()); }
FastMathFlags getFastMathFlags() const { return FMF; }
TrackingVH<Value> getRecurrenceStartValue() const { return StartValue; }
Instruction *getLoopExitInstr() const { return LoopExitInstr; }
/// Returns true if the recurrence has floating-point math that requires
/// precise (ordered) operations.
bool hasExactFPMath() const { return ExactFPMathInst != nullptr; }
/// Returns 1st non-reassociative FP instruction in the PHI node's use-chain.
Instruction *getExactFPMathInst() const { return ExactFPMathInst; }
/// Returns true if the recurrence kind is an integer kind.
static bool isIntegerRecurrenceKind(RecurKind Kind);
/// Returns true if the recurrence kind is a floating point kind.
static bool isFloatingPointRecurrenceKind(RecurKind Kind);
/// Returns true if the recurrence kind is an integer min/max kind.
static bool isIntMinMaxRecurrenceKind(RecurKind Kind) {
return Kind == RecurKind::UMin || Kind == RecurKind::UMax ||
Kind == RecurKind::SMin || Kind == RecurKind::SMax;
}
/// Returns true if the recurrence kind is a floating-point min/max kind.
static bool isFPMinMaxRecurrenceKind(RecurKind Kind) {
return Kind == RecurKind::FMin || Kind == RecurKind::FMax ||
Kind == RecurKind::FMinimum || Kind == RecurKind::FMaximum;
}
/// Returns true if the recurrence kind is any min/max kind.
static bool isMinMaxRecurrenceKind(RecurKind Kind) {
return isIntMinMaxRecurrenceKind(Kind) || isFPMinMaxRecurrenceKind(Kind);
}
/// Returns true if the recurrence kind is of the form
/// select(cmp(),x,y) where one of (x,y) is loop invariant.
static bool isSelectCmpRecurrenceKind(RecurKind Kind) {
return Kind == RecurKind::SelectICmp || Kind == RecurKind::SelectFCmp;
}
/// Returns the type of the recurrence. This type can be narrower than the
/// actual type of the Phi if the recurrence has been type-promoted.
Type *getRecurrenceType() const { return RecurrenceType; }
/// Returns a reference to the instructions used for type-promoting the
/// recurrence.
const SmallPtrSet<Instruction *, 8> &getCastInsts() const { return CastInsts; }
/// Returns the minimum width used by the recurrence in bits.
unsigned getMinWidthCastToRecurrenceTypeInBits() const {
return MinWidthCastToRecurrenceType;
}
/// Returns true if all source operands of the recurrence are SExtInsts.
bool isSigned() const { return IsSigned; }
/// Expose an ordered FP reduction to the instance users.
bool isOrdered() const { return IsOrdered; }
/// Attempts to find a chain of operations from Phi to LoopExitInst that can
/// be treated as a set of reductions instructions for in-loop reductions.
SmallVector<Instruction *, 4> getReductionOpChain(PHINode *Phi,
Loop *L) const;
/// Returns true if the instruction is a call to the llvm.fmuladd intrinsic.
static bool isFMulAddIntrinsic(Instruction *I) {
return isa<IntrinsicInst>(I) &&
cast<IntrinsicInst>(I)->getIntrinsicID() == Intrinsic::fmuladd;
}
/// Reductions may store temporary or final result to an invariant address.
/// If there is such a store in the loop then, after successfull run of
/// AddReductionVar method, this field will be assigned the last met store.
StoreInst *IntermediateStore = nullptr;
private:
// The starting value of the recurrence.
// It does not have to be zero!
TrackingVH<Value> StartValue;
// The instruction who's value is used outside the loop.
Instruction *LoopExitInstr = nullptr;
// The kind of the recurrence.
RecurKind Kind = RecurKind::None;
// The fast-math flags on the recurrent instructions. We propagate these
// fast-math flags into the vectorized FP instructions we generate.
FastMathFlags FMF;
// First instance of non-reassociative floating-point in the PHI's use-chain.
Instruction *ExactFPMathInst = nullptr;
// The type of the recurrence.
Type *RecurrenceType = nullptr;
// True if all source operands of the recurrence are SExtInsts.
bool IsSigned = false;
// True if this recurrence can be treated as an in-order reduction.
// Currently only a non-reassociative FAdd can be considered in-order,
// if it is also the only FAdd in the PHI's use chain.
bool IsOrdered = false;
// Instructions used for type-promoting the recurrence.
SmallPtrSet<Instruction *, 8> CastInsts;
// The minimum width used by the recurrence.
unsigned MinWidthCastToRecurrenceType;
};
/// A struct for saving information about induction variables.
class InductionDescriptor {
public:
/// This enum represents the kinds of inductions that we support.
enum InductionKind {
IK_NoInduction, ///< Not an induction variable.
IK_IntInduction, ///< Integer induction variable. Step = C.
IK_PtrInduction, ///< Pointer induction var. Step = C.
IK_FpInduction ///< Floating point induction variable.
};
public:
/// Default constructor - creates an invalid induction.
InductionDescriptor() = default;
Value *getStartValue() const { return StartValue; }
InductionKind getKind() const { return IK; }
const SCEV *getStep() const { return Step; }
BinaryOperator *getInductionBinOp() const { return InductionBinOp; }
ConstantInt *getConstIntStepValue() const;
/// Returns true if \p Phi is an induction in the loop \p L. If \p Phi is an
/// induction, the induction descriptor \p D will contain the data describing
/// this induction. Since Induction Phis can only be present inside loop
/// headers, the function will assert if it is passed a Phi whose parent is
/// not the loop header. If by some other means the caller has a better SCEV
/// expression for \p Phi than the one returned by the ScalarEvolution
/// analysis, it can be passed through \p Expr. If the def-use chain
/// associated with the phi includes casts (that we know we can ignore
/// under proper runtime checks), they are passed through \p CastsToIgnore.
static bool
isInductionPHI(PHINode *Phi, const Loop *L, ScalarEvolution *SE,
InductionDescriptor &D, const SCEV *Expr = nullptr,
SmallVectorImpl<Instruction *> *CastsToIgnore = nullptr);
/// Returns true if \p Phi is a floating point induction in the loop \p L.
/// If \p Phi is an induction, the induction descriptor \p D will contain
/// the data describing this induction.
static bool isFPInductionPHI(PHINode *Phi, const Loop *L, ScalarEvolution *SE,
InductionDescriptor &D);
/// Returns true if \p Phi is a loop \p L induction, in the context associated
/// with the run-time predicate of PSE. If \p Assume is true, this can add
/// further SCEV predicates to \p PSE in order to prove that \p Phi is an
/// induction.
/// If \p Phi is an induction, \p D will contain the data describing this
/// induction.
static bool isInductionPHI(PHINode *Phi, const Loop *L,
PredicatedScalarEvolution &PSE,
InductionDescriptor &D, bool Assume = false);
/// Returns floating-point induction operator that does not allow
/// reassociation (transforming the induction requires an override of normal
/// floating-point rules).
Instruction *getExactFPMathInst() {
if (IK == IK_FpInduction && InductionBinOp &&
!InductionBinOp->hasAllowReassoc())
return InductionBinOp;
return nullptr;
}
/// Returns binary opcode of the induction operator.
Instruction::BinaryOps getInductionOpcode() const {
return InductionBinOp ? InductionBinOp->getOpcode()
: Instruction::BinaryOpsEnd;
}
/// Returns a reference to the type cast instructions in the induction
/// update chain, that are redundant when guarded with a runtime
/// SCEV overflow check.
const SmallVectorImpl<Instruction *> &getCastInsts() const {
return RedundantCasts;
}
private:
/// Private constructor - used by \c isInductionPHI.
InductionDescriptor(Value *Start, InductionKind K, const SCEV *Step,
BinaryOperator *InductionBinOp = nullptr,
SmallVectorImpl<Instruction *> *Casts = nullptr);
/// Start value.
TrackingVH<Value> StartValue;
/// Induction kind.
InductionKind IK = IK_NoInduction;
/// Step value.
const SCEV *Step = nullptr;
// Instruction that advances induction variable.
BinaryOperator *InductionBinOp = nullptr;
// Instructions used for type-casts of the induction variable,
// that are redundant when guarded with a runtime SCEV overflow check.
SmallVector<Instruction *, 2> RedundantCasts;
};
} // end namespace llvm
#endif // LLVM_ANALYSIS_IVDESCRIPTORS_H
PK iwFZ�r��( �( Analysis/CFGPrinter.hnu �[��� //===-- CFGPrinter.h - CFG printer external interface -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines a 'dot-cfg' analysis pass, which emits the
// cfg.<fnname>.dot file for each function in the program, with a graph of the
// CFG for that function.
//
// This file defines external functions that can be called to explicitly
// instantiate the CFG printer.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_CFGPRINTER_H
#define LLVM_ANALYSIS_CFGPRINTER_H
#include "llvm/Analysis/BlockFrequencyInfo.h"
#include "llvm/Analysis/BranchProbabilityInfo.h"
#include "llvm/Analysis/HeatUtils.h"
#include "llvm/IR/CFG.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/PassManager.h"
#include "llvm/IR/ProfDataUtils.h"
#include "llvm/Support/DOTGraphTraits.h"
#include "llvm/Support/FormatVariadic.h"
namespace llvm {
template <class GraphType> struct GraphTraits;
class CFGViewerPass : public PassInfoMixin<CFGViewerPass> {
public:
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
static bool isRequired() { return true; }
};
class CFGOnlyViewerPass : public PassInfoMixin<CFGOnlyViewerPass> {
public:
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
static bool isRequired() { return true; }
};
class CFGPrinterPass : public PassInfoMixin<CFGPrinterPass> {
public:
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
static bool isRequired() { return true; }
};
class CFGOnlyPrinterPass : public PassInfoMixin<CFGOnlyPrinterPass> {
public:
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
static bool isRequired() { return true; }
};
class DOTFuncInfo {
private:
const Function *F;
const BlockFrequencyInfo *BFI;
const BranchProbabilityInfo *BPI;
uint64_t MaxFreq;
bool ShowHeat;
bool EdgeWeights;
bool RawWeights;
public:
DOTFuncInfo(const Function *F) : DOTFuncInfo(F, nullptr, nullptr, 0) {}
DOTFuncInfo(const Function *F, const BlockFrequencyInfo *BFI,
const BranchProbabilityInfo *BPI, uint64_t MaxFreq)
: F(F), BFI(BFI), BPI(BPI), MaxFreq(MaxFreq) {
ShowHeat = false;
EdgeWeights = !!BPI; // Print EdgeWeights when BPI is available.
RawWeights = !!BFI; // Print RawWeights when BFI is available.
}
const BlockFrequencyInfo *getBFI() const { return BFI; }
const BranchProbabilityInfo *getBPI() const { return BPI; }
const Function *getFunction() const { return this->F; }
uint64_t getMaxFreq() const { return MaxFreq; }
uint64_t getFreq(const BasicBlock *BB) const {
return BFI->getBlockFreq(BB).getFrequency();
}
void setHeatColors(bool ShowHeat) { this->ShowHeat = ShowHeat; }
bool showHeatColors() { return ShowHeat; }
void setRawEdgeWeights(bool RawWeights) { this->RawWeights = RawWeights; }
bool useRawEdgeWeights() { return RawWeights; }
void setEdgeWeights(bool EdgeWeights) { this->EdgeWeights = EdgeWeights; }
bool showEdgeWeights() { return EdgeWeights; }
};
template <>
struct GraphTraits<DOTFuncInfo *> : public GraphTraits<const BasicBlock *> {
static NodeRef getEntryNode(DOTFuncInfo *CFGInfo) {
return &(CFGInfo->getFunction()->getEntryBlock());
}
// nodes_iterator/begin/end - Allow iteration over all nodes in the graph
using nodes_iterator = pointer_iterator<Function::const_iterator>;
static nodes_iterator nodes_begin(DOTFuncInfo *CFGInfo) {
return nodes_iterator(CFGInfo->getFunction()->begin());
}
static nodes_iterator nodes_end(DOTFuncInfo *CFGInfo) {
return nodes_iterator(CFGInfo->getFunction()->end());
}
static size_t size(DOTFuncInfo *CFGInfo) {
return CFGInfo->getFunction()->size();
}
};
template <typename BasicBlockT>
std::string SimpleNodeLabelString(const BasicBlockT *Node) {
if (!Node->getName().empty())
return Node->getName().str();
std::string Str;
raw_string_ostream OS(Str);
Node->printAsOperand(OS, false);
return OS.str();
}
template <typename BasicBlockT>
std::string CompleteNodeLabelString(
const BasicBlockT *Node,
function_ref<void(raw_string_ostream &, const BasicBlockT &)>
HandleBasicBlock,
function_ref<void(std::string &, unsigned &, unsigned)>
HandleComment) {
enum { MaxColumns = 80 };
std::string Str;
raw_string_ostream OS(Str);
if (Node->getName().empty()) {
Node->printAsOperand(OS, false);
OS << ':';
}
HandleBasicBlock(OS, *Node);
std::string OutStr = OS.str();
if (OutStr[0] == '\n')
OutStr.erase(OutStr.begin());
unsigned ColNum = 0;
unsigned LastSpace = 0;
for (unsigned i = 0; i != OutStr.length(); ++i) {
if (OutStr[i] == '\n') { // Left justify
OutStr[i] = '\\';
OutStr.insert(OutStr.begin() + i + 1, 'l');
ColNum = 0;
LastSpace = 0;
} else if (OutStr[i] == ';') { // Delete comments!
unsigned Idx = OutStr.find('\n', i + 1); // Find end of line
HandleComment(OutStr, i, Idx);
} else if (ColNum == MaxColumns) { // Wrap lines.
// Wrap very long names even though we can't find a space.
if (!LastSpace)
LastSpace = i;
OutStr.insert(LastSpace, "\\l...");
ColNum = i - LastSpace;
LastSpace = 0;
i += 3; // The loop will advance 'i' again.
} else
++ColNum;
if (OutStr[i] == ' ')
LastSpace = i;
}
return OutStr;
}
template <>
struct DOTGraphTraits<DOTFuncInfo *> : public DefaultDOTGraphTraits {
// Cache for is hidden property
DenseMap<const BasicBlock *, bool> isOnDeoptOrUnreachablePath;
DOTGraphTraits(bool isSimple = false) : DefaultDOTGraphTraits(isSimple) {}
static void eraseComment(std::string &OutStr, unsigned &I, unsigned Idx) {
OutStr.erase(OutStr.begin() + I, OutStr.begin() + Idx);
--I;
}
static std::string getGraphName(DOTFuncInfo *CFGInfo) {
return "CFG for '" + CFGInfo->getFunction()->getName().str() + "' function";
}
static std::string getSimpleNodeLabel(const BasicBlock *Node, DOTFuncInfo *) {
return SimpleNodeLabelString(Node);
}
static std::string getCompleteNodeLabel(
const BasicBlock *Node, DOTFuncInfo *,
function_ref<void(raw_string_ostream &, const BasicBlock &)>
HandleBasicBlock = [](raw_string_ostream &OS,
const BasicBlock &Node) -> void { OS << Node; },
function_ref<void(std::string &, unsigned &, unsigned)>
HandleComment = eraseComment) {
return CompleteNodeLabelString(Node, HandleBasicBlock, HandleComment);
}
std::string getNodeLabel(const BasicBlock *Node, DOTFuncInfo *CFGInfo) {
if (isSimple())
return getSimpleNodeLabel(Node, CFGInfo);
else
return getCompleteNodeLabel(Node, CFGInfo);
}
static std::string getEdgeSourceLabel(const BasicBlock *Node,
const_succ_iterator I) {
// Label source of conditional branches with "T" or "F"
if (const BranchInst *BI = dyn_cast<BranchInst>(Node->getTerminator()))
if (BI->isConditional())
return (I == succ_begin(Node)) ? "T" : "F";
// Label source of switch edges with the associated value.
if (const SwitchInst *SI = dyn_cast<SwitchInst>(Node->getTerminator())) {
unsigned SuccNo = I.getSuccessorIndex();
if (SuccNo == 0)
return "def";
std::string Str;
raw_string_ostream OS(Str);
auto Case = *SwitchInst::ConstCaseIt::fromSuccessorIndex(SI, SuccNo);
OS << Case.getCaseValue()->getValue();
return OS.str();
}
return "";
}
/// Display the raw branch weights from PGO.
std::string getEdgeAttributes(const BasicBlock *Node, const_succ_iterator I,
DOTFuncInfo *CFGInfo) {
if (!CFGInfo->showEdgeWeights())
return "";
const Instruction *TI = Node->getTerminator();
if (TI->getNumSuccessors() == 1)
return "penwidth=2";
unsigned OpNo = I.getSuccessorIndex();
if (OpNo >= TI->getNumSuccessors())
return "";
BasicBlock *SuccBB = TI->getSuccessor(OpNo);
auto BranchProb = CFGInfo->getBPI()->getEdgeProbability(Node, SuccBB);
double WeightPercent = ((double)BranchProb.getNumerator()) /
((double)BranchProb.getDenominator());
double Width = 1 + WeightPercent;
if (!CFGInfo->useRawEdgeWeights())
return formatv("label=\"{0:P}\" penwidth={1}", WeightPercent, Width)
.str();
// Prepend a 'W' to indicate that this is a weight rather than the actual
// profile count (due to scaling).
uint64_t Freq = CFGInfo->getFreq(Node);
std::string Attrs = formatv("label=\"W:{0}\" penwidth={1}",
(uint64_t)(Freq * WeightPercent), Width);
if (Attrs.size())
return Attrs;
MDNode *WeightsNode = getBranchWeightMDNode(*TI);
if (!WeightsNode)
return "";
OpNo = I.getSuccessorIndex() + 1;
if (OpNo >= WeightsNode->getNumOperands())
return "";
ConstantInt *Weight =
mdconst::dyn_extract<ConstantInt>(WeightsNode->getOperand(OpNo));
if (!Weight)
return "";
return ("label=\"W:" + std::to_string(Weight->getZExtValue()) +
"\" penwidth=" + std::to_string(Width));
}
std::string getNodeAttributes(const BasicBlock *Node, DOTFuncInfo *CFGInfo) {
if (!CFGInfo->showHeatColors())
return "";
uint64_t Freq = CFGInfo->getFreq(Node);
std::string Color = getHeatColor(Freq, CFGInfo->getMaxFreq());
std::string EdgeColor = (Freq <= (CFGInfo->getMaxFreq() / 2))
? (getHeatColor(0))
: (getHeatColor(1));
std::string Attrs = "color=\"" + EdgeColor + "ff\", style=filled," +
" fillcolor=\"" + Color + "70\"";
return Attrs;
}
bool isNodeHidden(const BasicBlock *Node, const DOTFuncInfo *CFGInfo);
void computeDeoptOrUnreachablePaths(const Function *F);
};
} // End llvm namespace
namespace llvm {
class FunctionPass;
FunctionPass *createCFGPrinterLegacyPassPass();
FunctionPass *createCFGOnlyPrinterLegacyPassPass();
} // End llvm namespace
#endif
PK iwFZ�#[
� � Analysis/LazyValueInfo.hnu �[��� //===- LazyValueInfo.h - Value constraint analysis --------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the interface for lazy computation of value constraint
// information.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_LAZYVALUEINFO_H
#define LLVM_ANALYSIS_LAZYVALUEINFO_H
#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
namespace llvm {
class AssumptionCache;
class Constant;
class ConstantRange;
class DataLayout;
class DominatorTree;
class Instruction;
class TargetLibraryInfo;
class Value;
/// This pass computes, caches, and vends lazy value constraint information.
class LazyValueInfo {
friend class LazyValueInfoWrapperPass;
AssumptionCache *AC = nullptr;
const DataLayout *DL = nullptr;
class TargetLibraryInfo *TLI = nullptr;
void *PImpl = nullptr;
LazyValueInfo(const LazyValueInfo&) = delete;
void operator=(const LazyValueInfo&) = delete;
public:
~LazyValueInfo();
LazyValueInfo() = default;
LazyValueInfo(AssumptionCache *AC_, const DataLayout *DL_,
TargetLibraryInfo *TLI_)
: AC(AC_), DL(DL_), TLI(TLI_) {}
LazyValueInfo(LazyValueInfo &&Arg)
: AC(Arg.AC), DL(Arg.DL), TLI(Arg.TLI), PImpl(Arg.PImpl) {
Arg.PImpl = nullptr;
}
LazyValueInfo &operator=(LazyValueInfo &&Arg) {
releaseMemory();
AC = Arg.AC;
DL = Arg.DL;
TLI = Arg.TLI;
PImpl = Arg.PImpl;
Arg.PImpl = nullptr;
return *this;
}
/// This is used to return true/false/dunno results.
enum Tristate {
Unknown = -1, False = 0, True = 1
};
// Public query interface.
/// Determine whether the specified value comparison with a constant is known
/// to be true or false on the specified CFG edge.
/// Pred is a CmpInst predicate.
Tristate getPredicateOnEdge(unsigned Pred, Value *V, Constant *C,
BasicBlock *FromBB, BasicBlock *ToBB,
Instruction *CxtI = nullptr);
/// Determine whether the specified value comparison with a constant is known
/// to be true or false at the specified instruction.
/// \p Pred is a CmpInst predicate. If \p UseBlockValue is true, the block
/// value is also taken into account.
Tristate getPredicateAt(unsigned Pred, Value *V, Constant *C,
Instruction *CxtI, bool UseBlockValue);
/// Determine whether the specified value comparison is known to be true
/// or false at the specified instruction. While this takes two Value's,
/// it still requires that one of them is a constant.
/// \p Pred is a CmpInst predicate.
/// If \p UseBlockValue is true, the block value is also taken into account.
Tristate getPredicateAt(unsigned Pred, Value *LHS, Value *RHS,
Instruction *CxtI, bool UseBlockValue);
/// Determine whether the specified value is known to be a constant at the
/// specified instruction. Return null if not.
Constant *getConstant(Value *V, Instruction *CxtI);
/// Return the ConstantRange constraint that is known to hold for the
/// specified value at the specified instruction. This may only be called
/// on integer-typed Values.
ConstantRange getConstantRange(Value *V, Instruction *CxtI,
bool UndefAllowed = true);
/// Return the ConstantRange constraint that is known to hold for the value
/// at a specific use-site.
ConstantRange getConstantRangeAtUse(const Use &U, bool UndefAllowed = true);
/// Determine whether the specified value is known to be a
/// constant on the specified edge. Return null if not.
Constant *getConstantOnEdge(Value *V, BasicBlock *FromBB, BasicBlock *ToBB,
Instruction *CxtI = nullptr);
/// Return the ConstantRage constraint that is known to hold for the
/// specified value on the specified edge. This may be only be called
/// on integer-typed Values.
ConstantRange getConstantRangeOnEdge(Value *V, BasicBlock *FromBB,
BasicBlock *ToBB,
Instruction *CxtI = nullptr);
/// Inform the analysis cache that we have threaded an edge from
/// PredBB to OldSucc to be from PredBB to NewSucc instead.
void threadEdge(BasicBlock *PredBB, BasicBlock *OldSucc, BasicBlock *NewSucc);
/// Remove information related to this value from the cache.
void forgetValue(Value *V);
/// Inform the analysis cache that we have erased a block.
void eraseBlock(BasicBlock *BB);
/// Complete flush all previously computed values
void clear(const Module *M);
/// Print the \LazyValueInfo Analysis.
/// We pass in the DTree that is required for identifying which basic blocks
/// we can solve/print for, in the LVIPrinter.
void printLVI(Function &F, DominatorTree &DTree, raw_ostream &OS);
// For old PM pass. Delete once LazyValueInfoWrapperPass is gone.
void releaseMemory();
/// Handle invalidation events in the new pass manager.
bool invalidate(Function &F, const PreservedAnalyses &PA,
FunctionAnalysisManager::Invalidator &Inv);
};
/// Analysis to compute lazy value information.
class LazyValueAnalysis : public AnalysisInfoMixin<LazyValueAnalysis> {
public:
typedef LazyValueInfo Result;
Result run(Function &F, FunctionAnalysisManager &FAM);
private:
static AnalysisKey Key;
friend struct AnalysisInfoMixin<LazyValueAnalysis>;
};
/// Wrapper around LazyValueInfo.
class LazyValueInfoWrapperPass : public FunctionPass {
LazyValueInfoWrapperPass(const LazyValueInfoWrapperPass&) = delete;
void operator=(const LazyValueInfoWrapperPass&) = delete;
public:
static char ID;
LazyValueInfoWrapperPass();
~LazyValueInfoWrapperPass() override {
assert(!Info.PImpl && "releaseMemory not called");
}
LazyValueInfo &getLVI();
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override;
bool runOnFunction(Function &F) override;
private:
LazyValueInfo Info;
};
} // end namespace llvm
#endif
PK iwFZ~���> > Analysis/MemoryProfileInfo.hnu �[��� //===- llvm/Analysis/MemoryProfileInfo.h - memory profile info ---*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains utilities to analyze memory profile information.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_MEMORYPROFILEINFO_H
#define LLVM_ANALYSIS_MEMORYPROFILEINFO_H
#include "llvm/IR/Constants.h"
#include "llvm/IR/InstrTypes.h"
#include "llvm/IR/Metadata.h"
#include "llvm/IR/Module.h"
#include "llvm/IR/ModuleSummaryIndex.h"
#include <map>
namespace llvm {
namespace memprof {
/// Return the allocation type for a given set of memory profile values.
AllocationType getAllocType(uint64_t TotalLifetimeAccessDensity,
uint64_t AllocCount, uint64_t TotalLifetime);
/// Build callstack metadata from the provided list of call stack ids. Returns
/// the resulting metadata node.
MDNode *buildCallstackMetadata(ArrayRef<uint64_t> CallStack, LLVMContext &Ctx);
/// Returns the stack node from an MIB metadata node.
MDNode *getMIBStackNode(const MDNode *MIB);
/// Returns the allocation type from an MIB metadata node.
AllocationType getMIBAllocType(const MDNode *MIB);
/// Returns the string to use in attributes with the given type.
std::string getAllocTypeAttributeString(AllocationType Type);
/// True if the AllocTypes bitmask contains just a single type.
bool hasSingleAllocType(uint8_t AllocTypes);
/// Class to build a trie of call stack contexts for a particular profiled
/// allocation call, along with their associated allocation types.
/// The allocation will be at the root of the trie, which is then used to
/// compute the minimum lists of context ids needed to associate a call context
/// with a single allocation type.
class CallStackTrie {
private:
struct CallStackTrieNode {
// Allocation types for call context sharing the context prefix at this
// node.
uint8_t AllocTypes;
// Map of caller stack id to the corresponding child Trie node.
std::map<uint64_t, CallStackTrieNode *> Callers;
CallStackTrieNode(AllocationType Type)
: AllocTypes(static_cast<uint8_t>(Type)) {}
};
// The node for the allocation at the root.
CallStackTrieNode *Alloc = nullptr;
// The allocation's leaf stack id.
uint64_t AllocStackId = 0;
void deleteTrieNode(CallStackTrieNode *Node) {
if (!Node)
return;
for (auto C : Node->Callers)
deleteTrieNode(C.second);
delete Node;
}
// Recursive helper to trim contexts and create metadata nodes.
bool buildMIBNodes(CallStackTrieNode *Node, LLVMContext &Ctx,
std::vector<uint64_t> &MIBCallStack,
std::vector<Metadata *> &MIBNodes,
bool CalleeHasAmbiguousCallerContext);
public:
CallStackTrie() = default;
~CallStackTrie() { deleteTrieNode(Alloc); }
bool empty() const { return Alloc == nullptr; }
/// Add a call stack context with the given allocation type to the Trie.
/// The context is represented by the list of stack ids (computed during
/// matching via a debug location hash), expected to be in order from the
/// allocation call down to the bottom of the call stack (i.e. callee to
/// caller order).
void addCallStack(AllocationType AllocType, ArrayRef<uint64_t> StackIds);
/// Add the call stack context along with its allocation type from the MIB
/// metadata to the Trie.
void addCallStack(MDNode *MIB);
/// Build and attach the minimal necessary MIB metadata. If the alloc has a
/// single allocation type, add a function attribute instead. The reason for
/// adding an attribute in this case is that it matches how the behavior for
/// allocation calls will be communicated to lib call simplification after
/// cloning or another optimization to distinguish the allocation types,
/// which is lower overhead and more direct than maintaining this metadata.
/// Returns true if memprof metadata attached, false if not (attribute added).
bool buildAndAttachMIBMetadata(CallBase *CI);
};
/// Helper class to iterate through stack ids in both metadata (memprof MIB and
/// callsite) and the corresponding ThinLTO summary data structures
/// (CallsiteInfo and MIBInfo). This simplifies implementation of client code
/// which doesn't need to worry about whether we are operating with IR (Regular
/// LTO), or summary (ThinLTO).
template <class NodeT, class IteratorT> class CallStack {
public:
CallStack(const NodeT *N = nullptr) : N(N) {}
// Implement minimum required methods for range-based for loop.
// The default implementation assumes we are operating on ThinLTO data
// structures, which have a vector of StackIdIndices. There are specialized
// versions provided to iterate through metadata.
struct CallStackIterator {
const NodeT *N = nullptr;
IteratorT Iter;
CallStackIterator(const NodeT *N, bool End);
uint64_t operator*();
bool operator==(const CallStackIterator &rhs) { return Iter == rhs.Iter; }
bool operator!=(const CallStackIterator &rhs) { return !(*this == rhs); }
void operator++() { ++Iter; }
};
bool empty() const { return N == nullptr; }
CallStackIterator begin() const;
CallStackIterator end() const { return CallStackIterator(N, /*End*/ true); }
CallStackIterator beginAfterSharedPrefix(CallStack &Other);
uint64_t back() const;
private:
const NodeT *N = nullptr;
};
template <class NodeT, class IteratorT>
CallStack<NodeT, IteratorT>::CallStackIterator::CallStackIterator(
const NodeT *N, bool End)
: N(N) {
if (!N) {
Iter = nullptr;
return;
}
Iter = End ? N->StackIdIndices.end() : N->StackIdIndices.begin();
}
template <class NodeT, class IteratorT>
uint64_t CallStack<NodeT, IteratorT>::CallStackIterator::operator*() {
assert(Iter != N->StackIdIndices.end());
return *Iter;
}
template <class NodeT, class IteratorT>
uint64_t CallStack<NodeT, IteratorT>::back() const {
assert(N);
return N->StackIdIndices.back();
}
template <class NodeT, class IteratorT>
typename CallStack<NodeT, IteratorT>::CallStackIterator
CallStack<NodeT, IteratorT>::begin() const {
return CallStackIterator(N, /*End*/ false);
}
template <class NodeT, class IteratorT>
typename CallStack<NodeT, IteratorT>::CallStackIterator
CallStack<NodeT, IteratorT>::beginAfterSharedPrefix(CallStack &Other) {
CallStackIterator Cur = begin();
for (CallStackIterator OtherCur = Other.begin();
Cur != end() && OtherCur != Other.end(); ++Cur, ++OtherCur)
assert(*Cur == *OtherCur);
return Cur;
}
/// Specializations for iterating through IR metadata stack contexts.
template <>
CallStack<MDNode, MDNode::op_iterator>::CallStackIterator::CallStackIterator(
const MDNode *N, bool End);
template <>
uint64_t CallStack<MDNode, MDNode::op_iterator>::CallStackIterator::operator*();
template <> uint64_t CallStack<MDNode, MDNode::op_iterator>::back() const;
} // end namespace memprof
} // end namespace llvm
#endif
PK iwFZ�h� Analysis/RegionPass.hnu �[��� //===- RegionPass.h - RegionPass class --------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the RegionPass class. All region based analysis,
// optimization and transformation passes are derived from RegionPass.
// This class is implemented following the some ideas of the LoopPass.h class.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_REGIONPASS_H
#define LLVM_ANALYSIS_REGIONPASS_H
#include "llvm/IR/LegacyPassManagers.h"
#include "llvm/Pass.h"
#include <deque>
namespace llvm {
class Function;
class RGPassManager;
class Region;
class RegionInfo;
//===----------------------------------------------------------------------===//
/// A pass that runs on each Region in a function.
///
/// RegionPass is managed by RGPassManager.
class RegionPass : public Pass {
public:
explicit RegionPass(char &pid) : Pass(PT_Region, pid) {}
//===--------------------------------------------------------------------===//
/// @name To be implemented by every RegionPass
///
//@{
/// Run the pass on a specific Region
///
/// Accessing regions not contained in the current region is not allowed.
///
/// @param R The region this pass is run on.
/// @param RGM The RegionPassManager that manages this Pass.
///
/// @return True if the pass modifies this Region.
virtual bool runOnRegion(Region *R, RGPassManager &RGM) = 0;
/// Get a pass to print the LLVM IR in the region.
///
/// @param O The output stream to print the Region.
/// @param Banner The banner to separate different printed passes.
///
/// @return The pass to print the LLVM IR in the region.
Pass *createPrinterPass(raw_ostream &O,
const std::string &Banner) const override;
using llvm::Pass::doInitialization;
using llvm::Pass::doFinalization;
virtual bool doInitialization(Region *R, RGPassManager &RGM) { return false; }
virtual bool doFinalization() { return false; }
//@}
//===--------------------------------------------------------------------===//
/// @name PassManager API
///
//@{
void preparePassManager(PMStack &PMS) override;
void assignPassManager(PMStack &PMS,
PassManagerType PMT = PMT_RegionPassManager) override;
PassManagerType getPotentialPassManagerType() const override {
return PMT_RegionPassManager;
}
//@}
protected:
/// Optional passes call this function to check whether the pass should be
/// skipped. This is the case when optimization bisect is over the limit.
bool skipRegion(Region &R) const;
};
/// The pass manager to schedule RegionPasses.
class RGPassManager : public FunctionPass, public PMDataManager {
std::deque<Region*> RQ;
RegionInfo *RI;
Region *CurrentRegion;
public:
static char ID;
explicit RGPassManager();
/// Execute all of the passes scheduled for execution.
///
/// @return True if any of the passes modifies the function.
bool runOnFunction(Function &F) override;
/// Pass Manager itself does not invalidate any analysis info.
/// RGPassManager needs RegionInfo.
void getAnalysisUsage(AnalysisUsage &Info) const override;
StringRef getPassName() const override { return "Region Pass Manager"; }
PMDataManager *getAsPMDataManager() override { return this; }
Pass *getAsPass() override { return this; }
/// Print passes managed by this manager.
void dumpPassStructure(unsigned Offset) override;
/// Get passes contained by this manager.
Pass *getContainedPass(unsigned N) {
assert(N < PassVector.size() && "Pass number out of range!");
Pass *FP = static_cast<Pass *>(PassVector[N]);
return FP;
}
PassManagerType getPassManagerType() const override {
return PMT_RegionPassManager;
}
};
} // End llvm namespace
#endif
PK iwFZˍ�ۤ � Analysis/EHUtils.hnu �[��� //===-- Analysis/EHUtils.h - Exception handling related utils --*-//C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
#ifndef LLVM_ANALYSIS_EHUTILS_H
#define LLVM_ANALYSIS_EHUTILS_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseSet.h"
namespace llvm {
/// Compute a list of blocks that are only reachable via EH paths.
template <typename FunctionT, typename BlockT>
static void computeEHOnlyBlocks(FunctionT &F, DenseSet<BlockT *> &EHBlocks) {
// A block can be unknown if its not reachable from anywhere
// EH if its only reachable from start blocks via some path through EH pads
// NonEH if it's reachable from Non EH blocks as well.
enum Status { Unknown = 0, EH = 1, NonEH = 2 };
DenseSet<BlockT *> WorkList;
DenseMap<BlockT *, Status> Statuses;
auto GetStatus = [&](BlockT *BB) {
if (Statuses.find(BB) != Statuses.end())
return Statuses[BB];
else
return Unknown;
};
auto CheckPredecessors = [&](BlockT *BB, Status Stat) {
for (auto *PredBB : predecessors(BB)) {
Status PredStatus = GetStatus(PredBB);
// If status of predecessor block has gone above current block
// we update current blocks status.
if (PredStatus > Stat)
Stat = PredStatus;
}
return Stat;
};
auto AddSuccesors = [&](BlockT *BB) {
for (auto *SuccBB : successors(BB)) {
if (!SuccBB->isEHPad())
WorkList.insert(SuccBB);
}
};
// Insert the successors of start block and landing pads successor.
BlockT *StartBlock = &F.front();
Statuses[StartBlock] = NonEH;
AddSuccesors(StartBlock);
for (auto &BB : F) {
if (BB.isEHPad()) {
AddSuccesors(&BB);
Statuses[&BB] = EH;
}
}
// Worklist iterative algorithm.
while (!WorkList.empty()) {
auto *BB = *WorkList.begin();
WorkList.erase(BB);
Status OldStatus = GetStatus(BB);
// Check on predecessors and check for
// Status update.
Status NewStatus = CheckPredecessors(BB, OldStatus);
// Did the block status change?
bool Changed = OldStatus != NewStatus;
if (Changed) {
AddSuccesors(BB);
Statuses[BB] = NewStatus;
}
}
EHBlocks.clear();
for (auto Entry : Statuses) {
if (Entry.second == EH)
EHBlocks.insert(Entry.first);
}
}
} // namespace llvm
#endif
PK iwFZkz
Analysis/CallGraphSCCPass.hnu �[��� //===- CallGraphSCCPass.h - Pass that operates BU on call graph -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the CallGraphSCCPass class, which is used for passes which
// are implemented as bottom-up traversals on the call graph. Because there may
// be cycles in the call graph, passes of this type operate on the call-graph in
// SCC order: that is, they process function bottom-up, except for recursive
// functions, which they process all at once.
//
// These passes are inherently interprocedural, and are required to keep the
// call graph up-to-date if they do anything which could modify it.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_CALLGRAPHSCCPASS_H
#define LLVM_ANALYSIS_CALLGRAPHSCCPASS_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/Pass.h"
#include <vector>
namespace llvm {
class CallGraph;
class CallGraphNode;
class CallGraphSCC;
class PMStack;
class CallGraphSCCPass : public Pass {
public:
explicit CallGraphSCCPass(char &pid) : Pass(PT_CallGraphSCC, pid) {}
/// createPrinterPass - Get a pass that prints the Module
/// corresponding to a CallGraph.
Pass *createPrinterPass(raw_ostream &OS,
const std::string &Banner) const override;
using llvm::Pass::doInitialization;
using llvm::Pass::doFinalization;
/// doInitialization - This method is called before the SCC's of the program
/// has been processed, allowing the pass to do initialization as necessary.
virtual bool doInitialization(CallGraph &CG) {
return false;
}
/// runOnSCC - This method should be implemented by the subclass to perform
/// whatever action is necessary for the specified SCC. Note that
/// non-recursive (or only self-recursive) functions will have an SCC size of
/// 1, where recursive portions of the call graph will have SCC size > 1.
///
/// SCC passes that add or delete functions to the SCC are required to update
/// the SCC list, otherwise stale pointers may be dereferenced.
virtual bool runOnSCC(CallGraphSCC &SCC) = 0;
/// doFinalization - This method is called after the SCC's of the program has
/// been processed, allowing the pass to do final cleanup as necessary.
virtual bool doFinalization(CallGraph &CG) {
return false;
}
/// Assign pass manager to manager this pass
void assignPassManager(PMStack &PMS, PassManagerType PMT) override;
/// Return what kind of Pass Manager can manage this pass.
PassManagerType getPotentialPassManagerType() const override {
return PMT_CallGraphPassManager;
}
/// getAnalysisUsage - For this class, we declare that we require and preserve
/// the call graph. If the derived class implements this method, it should
/// always explicitly call the implementation here.
void getAnalysisUsage(AnalysisUsage &Info) const override;
protected:
/// Optional passes call this function to check whether the pass should be
/// skipped. This is the case when optimization bisect is over the limit.
bool skipSCC(CallGraphSCC &SCC) const;
};
/// CallGraphSCC - This is a single SCC that a CallGraphSCCPass is run on.
class CallGraphSCC {
const CallGraph &CG; // The call graph for this SCC.
void *Context; // The CGPassManager object that is vending this.
std::vector<CallGraphNode *> Nodes;
public:
CallGraphSCC(CallGraph &cg, void *context) : CG(cg), Context(context) {}
void initialize(ArrayRef<CallGraphNode *> NewNodes) {
Nodes.assign(NewNodes.begin(), NewNodes.end());
}
bool isSingular() const { return Nodes.size() == 1; }
unsigned size() const { return Nodes.size(); }
/// ReplaceNode - This informs the SCC and the pass manager that the specified
/// Old node has been deleted, and New is to be used in its place.
void ReplaceNode(CallGraphNode *Old, CallGraphNode *New);
/// DeleteNode - This informs the SCC and the pass manager that the specified
/// Old node has been deleted.
void DeleteNode(CallGraphNode *Old);
using iterator = std::vector<CallGraphNode *>::const_iterator;
iterator begin() const { return Nodes.begin(); }
iterator end() const { return Nodes.end(); }
const CallGraph &getCallGraph() { return CG; }
};
void initializeDummyCGSCCPassPass(PassRegistry &);
/// This pass is required by interprocedural register allocation. It forces
/// codegen to follow bottom up order on call graph.
class DummyCGSCCPass : public CallGraphSCCPass {
public:
static char ID;
DummyCGSCCPass() : CallGraphSCCPass(ID) {
PassRegistry &Registry = *PassRegistry::getPassRegistry();
initializeDummyCGSCCPassPass(Registry);
}
bool runOnSCC(CallGraphSCC &SCC) override { return false; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
}
};
} // end namespace llvm
#endif // LLVM_ANALYSIS_CALLGRAPHSCCPASS_H
PK iwFZ?o��& �& Analysis/ConstantFolding.hnu �[��� //===-- ConstantFolding.h - Fold instructions into constants ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares routines for folding instructions into constants when all
// operands are constants, for example "sub i32 1, 0" -> "1".
//
// Also, to supplement the basic VMCore ConstantExpr simplifications,
// this file declares some additional folding routines that can make use of
// DataLayout information. These functions cannot go in VMCore due to library
// dependency issues.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_CONSTANTFOLDING_H
#define LLVM_ANALYSIS_CONSTANTFOLDING_H
#include <stdint.h>
namespace llvm {
class APInt;
template <typename T> class ArrayRef;
class CallBase;
class Constant;
class DSOLocalEquivalent;
class DataLayout;
class Function;
class GlobalValue;
class GlobalVariable;
class Instruction;
class TargetLibraryInfo;
class Type;
/// If this constant is a constant offset from a global, return the global and
/// the constant. Because of constantexprs, this function is recursive.
/// If the global is part of a dso_local_equivalent constant, return it through
/// `Equiv` if it is provided.
bool IsConstantOffsetFromGlobal(Constant *C, GlobalValue *&GV, APInt &Offset,
const DataLayout &DL,
DSOLocalEquivalent **DSOEquiv = nullptr);
/// ConstantFoldInstruction - Try to constant fold the specified instruction.
/// If successful, the constant result is returned, if not, null is returned.
/// Note that this fails if not all of the operands are constant. Otherwise,
/// this function can only fail when attempting to fold instructions like loads
/// and stores, which have no constant expression form.
Constant *ConstantFoldInstruction(Instruction *I, const DataLayout &DL,
const TargetLibraryInfo *TLI = nullptr);
/// ConstantFoldConstant - Fold the constant using the specified DataLayout.
/// This function always returns a non-null constant: Either the folding result,
/// or the original constant if further folding is not possible.
Constant *ConstantFoldConstant(const Constant *C, const DataLayout &DL,
const TargetLibraryInfo *TLI = nullptr);
/// ConstantFoldInstOperands - Attempt to constant fold an instruction with the
/// specified operands. If successful, the constant result is returned, if not,
/// null is returned. Note that this function can fail when attempting to
/// fold instructions like loads and stores, which have no constant expression
/// form.
///
Constant *ConstantFoldInstOperands(Instruction *I, ArrayRef<Constant *> Ops,
const DataLayout &DL,
const TargetLibraryInfo *TLI = nullptr);
/// Attempt to constant fold a compare instruction (icmp/fcmp) with the
/// specified operands. Returns null or a constant expression of the specified
/// operands on failure.
/// Denormal inputs may be flushed based on the denormal handling mode.
Constant *ConstantFoldCompareInstOperands(
unsigned Predicate, Constant *LHS, Constant *RHS, const DataLayout &DL,
const TargetLibraryInfo *TLI = nullptr, const Instruction *I = nullptr);
/// Attempt to constant fold a unary operation with the specified operand.
/// Returns null on failure.
Constant *ConstantFoldUnaryOpOperand(unsigned Opcode, Constant *Op,
const DataLayout &DL);
/// Attempt to constant fold a binary operation with the specified operands.
/// Returns null or a constant expression of the specified operands on failure.
Constant *ConstantFoldBinaryOpOperands(unsigned Opcode, Constant *LHS,
Constant *RHS, const DataLayout &DL);
/// Attempt to constant fold a floating point binary operation with the
/// specified operands, applying the denormal handling mod to the operands.
/// Returns null or a constant expression of the specified operands on failure.
Constant *ConstantFoldFPInstOperands(unsigned Opcode, Constant *LHS,
Constant *RHS, const DataLayout &DL,
const Instruction *I);
/// Attempt to flush float point constant according to denormal mode set in the
/// instruction's parent function attributes. If so, return a zero with the
/// correct sign, otherwise return the original constant. Inputs and outputs to
/// floating point instructions can have their mode set separately, so the
/// direction is also needed.
///
/// If the calling function's "denormal-fp-math" input mode is "dynamic" for the
/// floating-point type, returns nullptr for denormal inputs.
Constant *FlushFPConstant(Constant *Operand, const Instruction *I,
bool IsOutput);
/// Attempt to constant fold a select instruction with the specified
/// operands. The constant result is returned if successful; if not, null is
/// returned.
Constant *ConstantFoldSelectInstruction(Constant *Cond, Constant *V1,
Constant *V2);
/// Attempt to constant fold a cast with the specified operand. If it
/// fails, it returns a constant expression of the specified operand.
Constant *ConstantFoldCastOperand(unsigned Opcode, Constant *C, Type *DestTy,
const DataLayout &DL);
/// ConstantFoldInsertValueInstruction - Attempt to constant fold an insertvalue
/// instruction with the specified operands and indices. The constant result is
/// returned if successful; if not, null is returned.
Constant *ConstantFoldInsertValueInstruction(Constant *Agg, Constant *Val,
ArrayRef<unsigned> Idxs);
/// Attempt to constant fold an extractvalue instruction with the
/// specified operands and indices. The constant result is returned if
/// successful; if not, null is returned.
Constant *ConstantFoldExtractValueInstruction(Constant *Agg,
ArrayRef<unsigned> Idxs);
/// Attempt to constant fold an insertelement instruction with the
/// specified operands and indices. The constant result is returned if
/// successful; if not, null is returned.
Constant *ConstantFoldInsertElementInstruction(Constant *Val,
Constant *Elt,
Constant *Idx);
/// Attempt to constant fold an extractelement instruction with the
/// specified operands and indices. The constant result is returned if
/// successful; if not, null is returned.
Constant *ConstantFoldExtractElementInstruction(Constant *Val, Constant *Idx);
/// Attempt to constant fold a shufflevector instruction with the
/// specified operands and mask. See class ShuffleVectorInst for a description
/// of the mask representation. The constant result is returned if successful;
/// if not, null is returned.
Constant *ConstantFoldShuffleVectorInstruction(Constant *V1, Constant *V2,
ArrayRef<int> Mask);
/// Extract value of C at the given Offset reinterpreted as Ty. If bits past
/// the end of C are accessed, they are assumed to be poison.
Constant *ConstantFoldLoadFromConst(Constant *C, Type *Ty, const APInt &Offset,
const DataLayout &DL);
/// Extract value of C reinterpreted as Ty. Same as previous API with zero
/// offset.
Constant *ConstantFoldLoadFromConst(Constant *C, Type *Ty,
const DataLayout &DL);
/// Return the value that a load from C with offset Offset would produce if it
/// is constant and determinable. If this is not determinable, return null.
Constant *ConstantFoldLoadFromConstPtr(Constant *C, Type *Ty, APInt Offset,
const DataLayout &DL);
/// Return the value that a load from C would produce if it is constant and
/// determinable. If this is not determinable, return null.
Constant *ConstantFoldLoadFromConstPtr(Constant *C, Type *Ty,
const DataLayout &DL);
/// If C is a uniform value where all bits are the same (either all zero, all
/// ones, all undef or all poison), return the corresponding uniform value in
/// the new type. If the value is not uniform or the result cannot be
/// represented, return null.
Constant *ConstantFoldLoadFromUniformValue(Constant *C, Type *Ty);
/// canConstantFoldCallTo - Return true if its even possible to fold a call to
/// the specified function.
bool canConstantFoldCallTo(const CallBase *Call, const Function *F);
/// ConstantFoldCall - Attempt to constant fold a call to the specified function
/// with the specified arguments, returning null if unsuccessful.
Constant *ConstantFoldCall(const CallBase *Call, Function *F,
ArrayRef<Constant *> Operands,
const TargetLibraryInfo *TLI = nullptr);
/// ConstantFoldLoadThroughBitcast - try to cast constant to destination type
/// returning null if unsuccessful. Can cast pointer to pointer or pointer to
/// integer and vice versa if their sizes are equal.
Constant *ConstantFoldLoadThroughBitcast(Constant *C, Type *DestTy,
const DataLayout &DL);
/// Check whether the given call has no side-effects.
/// Specifically checks for math routimes which sometimes set errno.
bool isMathLibCallNoop(const CallBase *Call, const TargetLibraryInfo *TLI);
Constant *ReadByteArrayFromGlobal(const GlobalVariable *GV, uint64_t Offset);
}
#endif
PK iwFZ�0 0 Analysis/IntervalPartition.hnu �[��� //===- IntervalPartition.h - Interval partition Calculation -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains the declaration of the IntervalPartition class, which
// calculates and represents the interval partition of a function, or a
// preexisting interval partition.
//
// In this way, the interval partition may be used to reduce a flow graph down
// to its degenerate single node interval partition (unless it is irreducible).
//
// TODO: The IntervalPartition class should take a bool parameter that tells
// whether it should add the "tails" of an interval to an interval itself or if
// they should be represented as distinct intervals.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_INTERVALPARTITION_H
#define LLVM_ANALYSIS_INTERVALPARTITION_H
#include "llvm/Pass.h"
#include <map>
#include <vector>
namespace llvm {
class BasicBlock;
class Interval;
//===----------------------------------------------------------------------===//
//
// IntervalPartition - This class builds and holds an "interval partition" for
// a function. This partition divides the control flow graph into a set of
// maximal intervals, as defined with the properties above. Intuitively, an
// interval is a (possibly nonexistent) loop with a "tail" of non-looping
// nodes following it.
//
class IntervalPartition : public FunctionPass {
using IntervalMapTy = std::map<BasicBlock *, Interval *>;
IntervalMapTy IntervalMap;
using IntervalListTy = std::vector<Interval *>;
Interval *RootInterval = nullptr;
std::vector<Interval *> Intervals;
public:
static char ID; // Pass identification, replacement for typeid
IntervalPartition();
// run - Calculate the interval partition for this function
bool runOnFunction(Function &F) override;
// IntervalPartition ctor - Build a reduced interval partition from an
// existing interval graph. This takes an additional boolean parameter to
// distinguish it from a copy constructor. Always pass in false for now.
IntervalPartition(IntervalPartition &I, bool);
// print - Show contents in human readable format...
void print(raw_ostream &O, const Module* = nullptr) const override;
// getRootInterval() - Return the root interval that contains the starting
// block of the function.
inline Interval *getRootInterval() { return RootInterval; }
// isDegeneratePartition() - Returns true if the interval partition contains
// a single interval, and thus cannot be simplified anymore.
bool isDegeneratePartition() { return Intervals.size() == 1; }
// TODO: isIrreducible - look for triangle graph.
// getBlockInterval - Return the interval that a basic block exists in.
inline Interval *getBlockInterval(BasicBlock *BB) {
IntervalMapTy::iterator I = IntervalMap.find(BB);
return I != IntervalMap.end() ? I->second : nullptr;
}
// getAnalysisUsage - Implement the Pass API
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
}
// Interface to Intervals vector...
const std::vector<Interval*> &getIntervals() const { return Intervals; }
// releaseMemory - Reset state back to before function was analyzed
void releaseMemory() override;
private:
// addIntervalToPartition - Add an interval to the internal list of intervals,
// and then add mappings from all of the basic blocks in the interval to the
// interval itself (in the IntervalMap).
void addIntervalToPartition(Interval *I);
// updatePredecessors - Interval generation only sets the successor fields of
// the interval data structures. After interval generation is complete,
// run through all of the intervals and propagate successor info as
// predecessor info.
void updatePredecessors(Interval *Int);
};
} // end namespace llvm
#endif // LLVM_ANALYSIS_INTERVALPARTITION_H
PK iwFZM�♀ � Analysis/CFG.hnu �[��� //===-- Analysis/CFG.h - BasicBlock Analyses --------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This family of functions performs analyses on basic blocks, and instructions
// contained within basic blocks.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_CFG_H
#define LLVM_ANALYSIS_CFG_H
#include "llvm/ADT/GraphTraits.h"
#include "llvm/ADT/SmallPtrSet.h"
#include <utility>
namespace llvm {
class BasicBlock;
class DominatorTree;
class Function;
class Instruction;
class LoopInfo;
template <typename T> class SmallVectorImpl;
/// Analyze the specified function to find all of the loop backedges in the
/// function and return them. This is a relatively cheap (compared to
/// computing dominators and loop info) analysis.
///
/// The output is added to Result, as pairs of <from,to> edge info.
void FindFunctionBackedges(
const Function &F,
SmallVectorImpl<std::pair<const BasicBlock *, const BasicBlock *> > &
Result);
/// Search for the specified successor of basic block BB and return its position
/// in the terminator instruction's list of successors. It is an error to call
/// this with a block that is not a successor.
unsigned GetSuccessorNumber(const BasicBlock *BB, const BasicBlock *Succ);
/// Return true if the specified edge is a critical edge. Critical edges are
/// edges from a block with multiple successors to a block with multiple
/// predecessors.
///
bool isCriticalEdge(const Instruction *TI, unsigned SuccNum,
bool AllowIdenticalEdges = false);
bool isCriticalEdge(const Instruction *TI, const BasicBlock *Succ,
bool AllowIdenticalEdges = false);
/// Determine whether instruction 'To' is reachable from 'From', without passing
/// through any blocks in ExclusionSet, returning true if uncertain.
///
/// Determine whether there is a path from From to To within a single function.
/// Returns false only if we can prove that once 'From' has been executed then
/// 'To' can not be executed. Conservatively returns true.
///
/// This function is linear with respect to the number of blocks in the CFG,
/// walking down successors from From to reach To, with a fixed threshold.
/// Using DT or LI allows us to answer more quickly. LI reduces the cost of
/// an entire loop of any number of blocks to be the same as the cost of a
/// single block. DT reduces the cost by allowing the search to terminate when
/// we find a block that dominates the block containing 'To'. DT is most useful
/// on branchy code but not loops, and LI is most useful on code with loops but
/// does not help on branchy code outside loops.
bool isPotentiallyReachable(
const Instruction *From, const Instruction *To,
const SmallPtrSetImpl<BasicBlock *> *ExclusionSet = nullptr,
const DominatorTree *DT = nullptr, const LoopInfo *LI = nullptr);
/// Determine whether block 'To' is reachable from 'From', returning
/// true if uncertain.
///
/// Determine whether there is a path from From to To within a single function.
/// Returns false only if we can prove that once 'From' has been reached then
/// 'To' can not be executed. Conservatively returns true.
bool isPotentiallyReachable(
const BasicBlock *From, const BasicBlock *To,
const SmallPtrSetImpl<BasicBlock *> *ExclusionSet = nullptr,
const DominatorTree *DT = nullptr, const LoopInfo *LI = nullptr);
/// Determine whether there is at least one path from a block in
/// 'Worklist' to 'StopBB' without passing through any blocks in
/// 'ExclusionSet', returning true if uncertain.
///
/// Determine whether there is a path from at least one block in Worklist to
/// StopBB within a single function without passing through any of the blocks
/// in 'ExclusionSet'. Returns false only if we can prove that once any block
/// in 'Worklist' has been reached then 'StopBB' can not be executed.
/// Conservatively returns true.
bool isPotentiallyReachableFromMany(
SmallVectorImpl<BasicBlock *> &Worklist, const BasicBlock *StopBB,
const SmallPtrSetImpl<BasicBlock *> *ExclusionSet,
const DominatorTree *DT = nullptr, const LoopInfo *LI = nullptr);
/// Return true if the control flow in \p RPOTraversal is irreducible.
///
/// This is a generic implementation to detect CFG irreducibility based on loop
/// info analysis. It can be used for any kind of CFG (Loop, MachineLoop,
/// Function, MachineFunction, etc.) by providing an RPO traversal (\p
/// RPOTraversal) and the loop info analysis (\p LI) of the CFG. This utility
/// function is only recommended when loop info analysis is available. If loop
/// info analysis isn't available, please, don't compute it explicitly for this
/// purpose. There are more efficient ways to detect CFG irreducibility that
/// don't require recomputing loop info analysis (e.g., T1/T2 or Tarjan's
/// algorithm).
///
/// Requirements:
/// 1) GraphTraits must be implemented for NodeT type. It is used to access
/// NodeT successors.
// 2) \p RPOTraversal must be a valid reverse post-order traversal of the
/// target CFG with begin()/end() iterator interfaces.
/// 3) \p LI must be a valid LoopInfoBase that contains up-to-date loop
/// analysis information of the CFG.
///
/// This algorithm uses the information about reducible loop back-edges already
/// computed in \p LI. When a back-edge is found during the RPO traversal, the
/// algorithm checks whether the back-edge is one of the reducible back-edges in
/// loop info. If it isn't, the CFG is irreducible. For example, for the CFG
/// below (canonical irreducible graph) loop info won't contain any loop, so the
/// algorithm will return that the CFG is irreducible when checking the B <-
/// -> C back-edge.
///
/// (A->B, A->C, B->C, C->B, C->D)
/// A
/// / \
/// B<- ->C
/// |
/// D
///
template <class NodeT, class RPOTraversalT, class LoopInfoT,
class GT = GraphTraits<NodeT>>
bool containsIrreducibleCFG(RPOTraversalT &RPOTraversal, const LoopInfoT &LI) {
/// Check whether the edge (\p Src, \p Dst) is a reducible loop backedge
/// according to LI. I.e., check if there exists a loop that contains Src and
/// where Dst is the loop header.
auto isProperBackedge = [&](NodeT Src, NodeT Dst) {
for (const auto *Lp = LI.getLoopFor(Src); Lp; Lp = Lp->getParentLoop()) {
if (Lp->getHeader() == Dst)
return true;
}
return false;
};
SmallPtrSet<NodeT, 32> Visited;
for (NodeT Node : RPOTraversal) {
Visited.insert(Node);
for (NodeT Succ : make_range(GT::child_begin(Node), GT::child_end(Node))) {
// Succ hasn't been visited yet
if (!Visited.count(Succ))
continue;
// We already visited Succ, thus Node->Succ must be a backedge. Check that
// the head matches what we have in the loop information. Otherwise, we
// have an irreducible graph.
if (!isProperBackedge(Node, Succ))
return true;
}
}
return false;
}
} // End llvm namespace
#endif
PK iwFZ��� � Analysis/TensorSpec.hnu �[��� //===- TensorSpec.h - type descriptor for a tensor --------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
#ifndef LLVM_ANALYSIS_TENSORSPEC_H
#define LLVM_ANALYSIS_TENSORSPEC_H
#include "llvm/Config/llvm-config.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/Support/JSON.h"
#include <memory>
#include <optional>
#include <vector>
namespace llvm {
/// TensorSpec encapsulates the specification of a tensor: its dimensions, or
/// "shape" (row-major), its type (see TensorSpec::getDataType specializations
/// for supported types), its name and port (see "TensorFlow: Large-Scale
/// Machine Learning on Heterogeneous Distributed Systems", section 4.2, para 2:
/// https://static.googleusercontent.com/media/research.google.com/en//pubs/archive/45166.pdf)
///
/// Known tensor types. The left part is the C type, the right is a name we
/// can use to identify the type (to implement TensorSpec equality checks), and
/// to use, if needed, when mapping to an underlying evaluator's type system.
/// The main requirement is that the C type we use has the same size and
/// encoding (e.g. endian-ness) as the one used by the evaluator.
#define SUPPORTED_TENSOR_TYPES(M) \
M(float, Float) \
M(double, Double) \
M(int8_t, Int8) \
M(uint8_t, UInt8) \
M(int16_t, Int16) \
M(uint16_t, UInt16) \
M(int32_t, Int32) \
M(uint32_t, UInt32) \
M(int64_t, Int64) \
M(uint64_t, UInt64)
enum class TensorType {
Invalid,
#define _TENSOR_TYPE_ENUM_MEMBERS(_, Name) Name,
SUPPORTED_TENSOR_TYPES(_TENSOR_TYPE_ENUM_MEMBERS)
#undef _TENSOR_TYPE_ENUM_MEMBERS
Total
};
class TensorSpec final {
public:
template <typename T>
static TensorSpec createSpec(const std::string &Name,
const std::vector<int64_t> &Shape,
int Port = 0) {
return TensorSpec(Name, Port, getDataType<T>(), sizeof(T), Shape);
}
const std::string &name() const { return Name; }
int port() const { return Port; }
TensorType type() const { return Type; }
const std::vector<int64_t> &shape() const { return Shape; }
bool operator==(const TensorSpec &Other) const {
return Name == Other.Name && Port == Other.Port && Type == Other.Type &&
Shape == Other.Shape;
}
bool operator!=(const TensorSpec &Other) const { return !(*this == Other); }
/// Get the number of elements in a tensor with this shape.
size_t getElementCount() const { return ElementCount; }
/// Get the size, in bytes, of one element.
size_t getElementByteSize() const { return ElementSize; }
/// Get the total size of a memory buffer needed to store the whole tensor.
size_t getTotalTensorBufferSize() const { return ElementCount * ElementSize; }
template <typename T> bool isElementType() const {
return getDataType<T>() == Type;
}
TensorSpec(const std::string &NewName, const TensorSpec &Other)
: TensorSpec(NewName, Other.Port, Other.Type, Other.ElementSize,
Other.Shape) {}
void toJSON(json::OStream &OS) const;
private:
TensorSpec(const std::string &Name, int Port, TensorType Type,
size_t ElementSize, const std::vector<int64_t> &Shape);
template <typename T> static TensorType getDataType();
std::string Name;
int Port = 0;
TensorType Type = TensorType::Invalid;
std::vector<int64_t> Shape;
size_t ElementCount = 0;
size_t ElementSize = 0;
};
/// For debugging.
std::string tensorValueToString(const char *Buffer, const TensorSpec &Spec);
/// Construct a TensorSpec from a JSON dictionary of the form:
/// { "name": <string>,
/// "port": <int>,
/// "type": <string. Use LLVM's types, e.g. float, double, int64_t>,
/// "shape": <array of ints> }
/// For the "type" field, see the C++ primitive types used in
/// TFUTILS_SUPPORTED_TYPES.
std::optional<TensorSpec> getTensorSpecFromJSON(LLVMContext &Ctx,
const json::Value &Value);
#define TFUTILS_GETDATATYPE_DEF(T, Name) \
template <> TensorType TensorSpec::getDataType<T>();
SUPPORTED_TENSOR_TYPES(TFUTILS_GETDATATYPE_DEF)
#undef TFUTILS_GETDATATYPE_DEF
} // namespace llvm
#endif // LLVM_ANALYSIS_TENSORSPEC_H
PK iwFZg.q�m m Analysis/GuardUtils.hnu �[��� //===-- GuardUtils.h - Utils for work with guards ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// Utils that are used to perform analyzes related to guards and their
// conditions.
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_GUARDUTILS_H
#define LLVM_ANALYSIS_GUARDUTILS_H
namespace llvm {
class BasicBlock;
class Use;
class User;
class Value;
/// Returns true iff \p U has semantics of a guard expressed in a form of call
/// of llvm.experimental.guard intrinsic.
bool isGuard(const User *U);
/// Returns true iff \p U is a widenable branch (that is, parseWidenableBranch
/// returns true).
bool isWidenableBranch(const User *U);
/// Returns true iff \p U has semantics of a guard expressed in a form of a
/// widenable conditional branch to deopt block.
bool isGuardAsWidenableBranch(const User *U);
/// If U is widenable branch looking like:
/// %cond = ...
/// %wc = call i1 @llvm.experimental.widenable.condition()
/// %branch_cond = and i1 %cond, %wc
/// br i1 %branch_cond, label %if_true_bb, label %if_false_bb ; <--- U
/// The function returns true, and the values %cond and %wc and blocks
/// %if_true_bb, if_false_bb are returned in
/// the parameters (Condition, WidenableCondition, IfTrueBB and IfFalseFF)
/// respectively. If \p U does not match this pattern, return false.
bool parseWidenableBranch(const User *U, Value *&Condition,
Value *&WidenableCondition, BasicBlock *&IfTrueBB,
BasicBlock *&IfFalseBB);
/// Analgous to the above, but return the Uses so that that they can be
/// modified. Unlike previous version, Condition is optional and may be null.
bool parseWidenableBranch(User *U, Use *&Cond, Use *&WC, BasicBlock *&IfTrueBB,
BasicBlock *&IfFalseBB);
} // llvm
#endif // LLVM_ANALYSIS_GUARDUTILS_H
PK iwFZj��2 �2 Analysis/MemoryLocation.hnu �[��� //===- MemoryLocation.h - Memory location descriptions ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This file provides utility analysis objects describing memory locations.
/// These are used both by the Alias Analysis infrastructure and more
/// specialized memory analysis layers.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_MEMORYLOCATION_H
#define LLVM_ANALYSIS_MEMORYLOCATION_H
#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/IR/Metadata.h"
#include "llvm/Support/TypeSize.h"
#include <optional>
namespace llvm {
class CallBase;
class Instruction;
class LoadInst;
class StoreInst;
class MemTransferInst;
class MemIntrinsic;
class AtomicCmpXchgInst;
class AtomicMemTransferInst;
class AtomicMemIntrinsic;
class AtomicRMWInst;
class AnyMemTransferInst;
class AnyMemIntrinsic;
class TargetLibraryInfo;
class VAArgInst;
class Value;
// Represents the size of a MemoryLocation. Logically, it's an
// std::optional<uint63_t> that also carries a bit to represent whether the
// integer it contains, N, is 'precise'. Precise, in this context, means that we
// know that the area of storage referenced by the given MemoryLocation must be
// precisely N bytes. An imprecise value is formed as the union of two or more
// precise values, and can conservatively represent all of the values unioned
// into it. Importantly, imprecise values are an *upper-bound* on the size of a
// MemoryLocation.
//
// Concretely, a precise MemoryLocation is (%p, 4) in
// store i32 0, i32* %p
//
// Since we know that %p must be at least 4 bytes large at this point.
// Otherwise, we have UB. An example of an imprecise MemoryLocation is (%p, 4)
// at the memcpy in
//
// %n = select i1 %foo, i64 1, i64 4
// call void @llvm.memcpy.p0i8.p0i8.i64(i8* %p, i8* %baz, i64 %n, i32 1,
// i1 false)
//
// ...Since we'll copy *up to* 4 bytes into %p, but we can't guarantee that
// we'll ever actually do so.
//
// If asked to represent a pathologically large value, this will degrade to
// std::nullopt.
class LocationSize {
enum : uint64_t {
BeforeOrAfterPointer = ~uint64_t(0),
AfterPointer = BeforeOrAfterPointer - 1,
MapEmpty = BeforeOrAfterPointer - 2,
MapTombstone = BeforeOrAfterPointer - 3,
ImpreciseBit = uint64_t(1) << 63,
// The maximum value we can represent without falling back to 'unknown'.
MaxValue = (MapTombstone - 1) & ~ImpreciseBit,
};
uint64_t Value;
// Hack to support implicit construction. This should disappear when the
// public LocationSize ctor goes away.
enum DirectConstruction { Direct };
constexpr LocationSize(uint64_t Raw, DirectConstruction): Value(Raw) {}
static_assert(AfterPointer & ImpreciseBit,
"AfterPointer is imprecise by definition.");
static_assert(BeforeOrAfterPointer & ImpreciseBit,
"BeforeOrAfterPointer is imprecise by definition.");
public:
// FIXME: Migrate all users to construct via either `precise` or `upperBound`,
// to make it more obvious at the callsite the kind of size that they're
// providing.
//
// Since the overwhelming majority of users of this provide precise values,
// this assumes the provided value is precise.
constexpr LocationSize(uint64_t Raw)
: Value(Raw > MaxValue ? AfterPointer : Raw) {}
static LocationSize precise(uint64_t Value) { return LocationSize(Value); }
static LocationSize precise(TypeSize Value) {
if (Value.isScalable())
return afterPointer();
return precise(Value.getFixedValue());
}
static LocationSize upperBound(uint64_t Value) {
// You can't go lower than 0, so give a precise result.
if (LLVM_UNLIKELY(Value == 0))
return precise(0);
if (LLVM_UNLIKELY(Value > MaxValue))
return afterPointer();
return LocationSize(Value | ImpreciseBit, Direct);
}
static LocationSize upperBound(TypeSize Value) {
if (Value.isScalable())
return afterPointer();
return upperBound(Value.getFixedValue());
}
/// Any location after the base pointer (but still within the underlying
/// object).
constexpr static LocationSize afterPointer() {
return LocationSize(AfterPointer, Direct);
}
/// Any location before or after the base pointer (but still within the
/// underlying object).
constexpr static LocationSize beforeOrAfterPointer() {
return LocationSize(BeforeOrAfterPointer, Direct);
}
// Sentinel values, generally used for maps.
constexpr static LocationSize mapTombstone() {
return LocationSize(MapTombstone, Direct);
}
constexpr static LocationSize mapEmpty() {
return LocationSize(MapEmpty, Direct);
}
// Returns a LocationSize that can correctly represent either `*this` or
// `Other`.
LocationSize unionWith(LocationSize Other) const {
if (Other == *this)
return *this;
if (Value == BeforeOrAfterPointer || Other.Value == BeforeOrAfterPointer)
return beforeOrAfterPointer();
if (Value == AfterPointer || Other.Value == AfterPointer)
return afterPointer();
return upperBound(std::max(getValue(), Other.getValue()));
}
bool hasValue() const {
return Value != AfterPointer && Value != BeforeOrAfterPointer;
}
uint64_t getValue() const {
assert(hasValue() && "Getting value from an unknown LocationSize!");
return Value & ~ImpreciseBit;
}
// Returns whether or not this value is precise. Note that if a value is
// precise, it's guaranteed to not be unknown.
bool isPrecise() const {
return (Value & ImpreciseBit) == 0;
}
// Convenience method to check if this LocationSize's value is 0.
bool isZero() const { return hasValue() && getValue() == 0; }
/// Whether accesses before the base pointer are possible.
bool mayBeBeforePointer() const { return Value == BeforeOrAfterPointer; }
bool operator==(const LocationSize &Other) const {
return Value == Other.Value;
}
bool operator!=(const LocationSize &Other) const {
return !(*this == Other);
}
// Ordering operators are not provided, since it's unclear if there's only one
// reasonable way to compare:
// - values that don't exist against values that do, and
// - precise values to imprecise values
void print(raw_ostream &OS) const;
// Returns an opaque value that represents this LocationSize. Cannot be
// reliably converted back into a LocationSize.
uint64_t toRaw() const { return Value; }
};
inline raw_ostream &operator<<(raw_ostream &OS, LocationSize Size) {
Size.print(OS);
return OS;
}
/// Representation for a specific memory location.
///
/// This abstraction can be used to represent a specific location in memory.
/// The goal of the location is to represent enough information to describe
/// abstract aliasing, modification, and reference behaviors of whatever
/// value(s) are stored in memory at the particular location.
///
/// The primary user of this interface is LLVM's Alias Analysis, but other
/// memory analyses such as MemoryDependence can use it as well.
class MemoryLocation {
public:
/// UnknownSize - This is a special value which can be used with the
/// size arguments in alias queries to indicate that the caller does not
/// know the sizes of the potential memory references.
enum : uint64_t { UnknownSize = ~UINT64_C(0) };
/// The address of the start of the location.
const Value *Ptr;
/// The maximum size of the location, in address-units, or
/// UnknownSize if the size is not known.
///
/// Note that an unknown size does not mean the pointer aliases the entire
/// virtual address space, because there are restrictions on stepping out of
/// one object and into another. See
/// http://llvm.org/docs/LangRef.html#pointeraliasing
LocationSize Size;
/// The metadata nodes which describes the aliasing of the location (each
/// member is null if that kind of information is unavailable).
AAMDNodes AATags;
void print(raw_ostream &OS) const { OS << *Ptr << " " << Size << "\n"; }
/// Return a location with information about the memory reference by the given
/// instruction.
static MemoryLocation get(const LoadInst *LI);
static MemoryLocation get(const StoreInst *SI);
static MemoryLocation get(const VAArgInst *VI);
static MemoryLocation get(const AtomicCmpXchgInst *CXI);
static MemoryLocation get(const AtomicRMWInst *RMWI);
static MemoryLocation get(const Instruction *Inst) {
return *MemoryLocation::getOrNone(Inst);
}
static std::optional<MemoryLocation> getOrNone(const Instruction *Inst);
/// Return a location representing the source of a memory transfer.
static MemoryLocation getForSource(const MemTransferInst *MTI);
static MemoryLocation getForSource(const AtomicMemTransferInst *MTI);
static MemoryLocation getForSource(const AnyMemTransferInst *MTI);
/// Return a location representing the destination of a memory set or
/// transfer.
static MemoryLocation getForDest(const MemIntrinsic *MI);
static MemoryLocation getForDest(const AtomicMemIntrinsic *MI);
static MemoryLocation getForDest(const AnyMemIntrinsic *MI);
static std::optional<MemoryLocation> getForDest(const CallBase *CI,
const TargetLibraryInfo &TLI);
/// Return a location representing a particular argument of a call.
static MemoryLocation getForArgument(const CallBase *Call, unsigned ArgIdx,
const TargetLibraryInfo *TLI);
static MemoryLocation getForArgument(const CallBase *Call, unsigned ArgIdx,
const TargetLibraryInfo &TLI) {
return getForArgument(Call, ArgIdx, &TLI);
}
/// Return a location that may access any location after Ptr, while remaining
/// within the underlying object.
static MemoryLocation getAfter(const Value *Ptr,
const AAMDNodes &AATags = AAMDNodes()) {
return MemoryLocation(Ptr, LocationSize::afterPointer(), AATags);
}
/// Return a location that may access any location before or after Ptr, while
/// remaining within the underlying object.
static MemoryLocation
getBeforeOrAfter(const Value *Ptr, const AAMDNodes &AATags = AAMDNodes()) {
return MemoryLocation(Ptr, LocationSize::beforeOrAfterPointer(), AATags);
}
// Return the exact size if the exact size is known at compiletime,
// otherwise return MemoryLocation::UnknownSize.
static uint64_t getSizeOrUnknown(const TypeSize &T) {
return T.isScalable() ? UnknownSize : T.getFixedValue();
}
MemoryLocation() : Ptr(nullptr), Size(LocationSize::beforeOrAfterPointer()) {}
explicit MemoryLocation(const Value *Ptr, LocationSize Size,
const AAMDNodes &AATags = AAMDNodes())
: Ptr(Ptr), Size(Size), AATags(AATags) {}
MemoryLocation getWithNewPtr(const Value *NewPtr) const {
MemoryLocation Copy(*this);
Copy.Ptr = NewPtr;
return Copy;
}
MemoryLocation getWithNewSize(LocationSize NewSize) const {
MemoryLocation Copy(*this);
Copy.Size = NewSize;
return Copy;
}
MemoryLocation getWithoutAATags() const {
MemoryLocation Copy(*this);
Copy.AATags = AAMDNodes();
return Copy;
}
bool operator==(const MemoryLocation &Other) const {
return Ptr == Other.Ptr && Size == Other.Size && AATags == Other.AATags;
}
};
// Specialize DenseMapInfo.
template <> struct DenseMapInfo<LocationSize> {
static inline LocationSize getEmptyKey() {
return LocationSize::mapEmpty();
}
static inline LocationSize getTombstoneKey() {
return LocationSize::mapTombstone();
}
static unsigned getHashValue(const LocationSize &Val) {
return DenseMapInfo<uint64_t>::getHashValue(Val.toRaw());
}
static bool isEqual(const LocationSize &LHS, const LocationSize &RHS) {
return LHS == RHS;
}
};
template <> struct DenseMapInfo<MemoryLocation> {
static inline MemoryLocation getEmptyKey() {
return MemoryLocation(DenseMapInfo<const Value *>::getEmptyKey(),
DenseMapInfo<LocationSize>::getEmptyKey());
}
static inline MemoryLocation getTombstoneKey() {
return MemoryLocation(DenseMapInfo<const Value *>::getTombstoneKey(),
DenseMapInfo<LocationSize>::getTombstoneKey());
}
static unsigned getHashValue(const MemoryLocation &Val) {
return DenseMapInfo<const Value *>::getHashValue(Val.Ptr) ^
DenseMapInfo<LocationSize>::getHashValue(Val.Size) ^
DenseMapInfo<AAMDNodes>::getHashValue(Val.AATags);
}
static bool isEqual(const MemoryLocation &LHS, const MemoryLocation &RHS) {
return LHS == RHS;
}
};
}
#endif
PK iwFZ,��� � Analysis/CaptureTracking.hnu �[��� //===----- llvm/Analysis/CaptureTracking.h - Pointer capture ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains routines that help determine which pointers are captured.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_CAPTURETRACKING_H
#define LLVM_ANALYSIS_CAPTURETRACKING_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/STLFunctionalExtras.h"
namespace llvm {
class Value;
class Use;
class DataLayout;
class Instruction;
class DominatorTree;
class LoopInfo;
class Function;
template <typename T> class SmallPtrSetImpl;
/// getDefaultMaxUsesToExploreForCaptureTracking - Return default value of
/// the maximal number of uses to explore before giving up. It is used by
/// PointerMayBeCaptured family analysis.
unsigned getDefaultMaxUsesToExploreForCaptureTracking();
/// PointerMayBeCaptured - Return true if this pointer value may be captured
/// by the enclosing function (which is required to exist). This routine can
/// be expensive, so consider caching the results. The boolean ReturnCaptures
/// specifies whether returning the value (or part of it) from the function
/// counts as capturing it or not. The boolean StoreCaptures specified
/// whether storing the value (or part of it) into memory anywhere
/// automatically counts as capturing it or not.
/// MaxUsesToExplore specifies how many uses the analysis should explore for
/// one value before giving up due too "too many uses". If MaxUsesToExplore
/// is zero, a default value is assumed.
bool PointerMayBeCaptured(const Value *V, bool ReturnCaptures,
bool StoreCaptures, unsigned MaxUsesToExplore = 0);
/// Variant of the above function which accepts a set of Values that are
/// ephemeral and cannot cause pointers to escape.
bool PointerMayBeCaptured(const Value *V, bool ReturnCaptures,
bool StoreCaptures,
const SmallPtrSetImpl<const Value *> &EphValues,
unsigned MaxUsesToExplore = 0);
/// PointerMayBeCapturedBefore - Return true if this pointer value may be
/// captured by the enclosing function (which is required to exist). If a
/// DominatorTree is provided, only captures which happen before the given
/// instruction are considered. This routine can be expensive, so consider
/// caching the results. The boolean ReturnCaptures specifies whether
/// returning the value (or part of it) from the function counts as capturing
/// it or not. The boolean StoreCaptures specified whether storing the value
/// (or part of it) into memory anywhere automatically counts as capturing it
/// or not. Captures by the provided instruction are considered if the
/// final parameter is true.
/// MaxUsesToExplore specifies how many uses the analysis should explore for
/// one value before giving up due too "too many uses". If MaxUsesToExplore
/// is zero, a default value is assumed.
bool PointerMayBeCapturedBefore(const Value *V, bool ReturnCaptures,
bool StoreCaptures, const Instruction *I,
const DominatorTree *DT,
bool IncludeI = false,
unsigned MaxUsesToExplore = 0,
const LoopInfo *LI = nullptr);
// Returns the 'earliest' instruction that captures \p V in \F. An instruction
// A is considered earlier than instruction B, if A dominates B. If 2 escapes
// do not dominate each other, the terminator of the common dominator is
// chosen. If not all uses can be analyzed, the earliest escape is set to
// the first instruction in the function entry block. If \p V does not escape,
// nullptr is returned. Note that the caller of the function has to ensure
// that the instruction the result value is compared against is not in a
// cycle.
Instruction *
FindEarliestCapture(const Value *V, Function &F, bool ReturnCaptures,
bool StoreCaptures, const DominatorTree &DT,
const SmallPtrSetImpl<const Value *> &EphValues,
unsigned MaxUsesToExplore = 0);
/// This callback is used in conjunction with PointerMayBeCaptured. In
/// addition to the interface here, you'll need to provide your own getters
/// to see whether anything was captured.
struct CaptureTracker {
virtual ~CaptureTracker();
/// tooManyUses - The depth of traversal has breached a limit. There may be
/// capturing instructions that will not be passed into captured().
virtual void tooManyUses() = 0;
/// shouldExplore - This is the use of a value derived from the pointer.
/// To prune the search (ie., assume that none of its users could possibly
/// capture) return false. To search it, return true.
///
/// U->getUser() is always an Instruction.
virtual bool shouldExplore(const Use *U);
/// captured - Information about the pointer was captured by the user of
/// use U. Return true to stop the traversal or false to continue looking
/// for more capturing instructions.
virtual bool captured(const Use *U) = 0;
/// isDereferenceableOrNull - Overload to allow clients with additional
/// knowledge about pointer dereferenceability to provide it and thereby
/// avoid conservative responses when a pointer is compared to null.
virtual bool isDereferenceableOrNull(Value *O, const DataLayout &DL);
};
/// Types of use capture kinds, see \p DetermineUseCaptureKind.
enum class UseCaptureKind {
NO_CAPTURE,
MAY_CAPTURE,
PASSTHROUGH,
};
/// Determine what kind of capture behaviour \p U may exhibit.
///
/// A use can be no-capture, a use can potentially capture, or a use can be
/// passthrough such that the uses of the user or \p U should be inspected.
/// The \p IsDereferenceableOrNull callback is used to rule out capturing for
/// certain comparisons.
UseCaptureKind
DetermineUseCaptureKind(const Use &U,
llvm::function_ref<bool(Value *, const DataLayout &)>
IsDereferenceableOrNull);
/// PointerMayBeCaptured - Visit the value and the values derived from it and
/// find values which appear to be capturing the pointer value. This feeds
/// results into and is controlled by the CaptureTracker object.
/// MaxUsesToExplore specifies how many uses the analysis should explore for
/// one value before giving up due too "too many uses". If MaxUsesToExplore
/// is zero, a default value is assumed.
void PointerMayBeCaptured(const Value *V, CaptureTracker *Tracker,
unsigned MaxUsesToExplore = 0);
/// Returns true if the pointer is to a function-local object that never
/// escapes from the function.
bool isNonEscapingLocalObject(
const Value *V,
SmallDenseMap<const Value *, bool, 8> *IsCapturedCache = nullptr);
} // end namespace llvm
#endif
PK iwFZD� Analysis/UniformityAnalysis.hnu �[��� //===- UniformityAnalysis.h ---------------------*- C++ -*-----------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file
/// \brief LLVM IR instance of the generic uniformity analysis
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_UNIFORMITYANALYSIS_H
#define LLVM_ANALYSIS_UNIFORMITYANALYSIS_H
#include "llvm/ADT/GenericUniformityInfo.h"
#include "llvm/Analysis/CycleAnalysis.h"
namespace llvm {
extern template class GenericUniformityInfo<SSAContext>;
using UniformityInfo = GenericUniformityInfo<SSAContext>;
/// Analysis pass which computes \ref UniformityInfo.
class UniformityInfoAnalysis
: public AnalysisInfoMixin<UniformityInfoAnalysis> {
friend AnalysisInfoMixin<UniformityInfoAnalysis>;
static AnalysisKey Key;
public:
/// Provide the result typedef for this analysis pass.
using Result = UniformityInfo;
/// Run the analysis pass over a function and produce a dominator tree.
UniformityInfo run(Function &F, FunctionAnalysisManager &);
// TODO: verify analysis
};
/// Printer pass for the \c UniformityInfo.
class UniformityInfoPrinterPass
: public PassInfoMixin<UniformityInfoPrinterPass> {
raw_ostream &OS;
public:
explicit UniformityInfoPrinterPass(raw_ostream &OS);
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
/// Legacy analysis pass which computes a \ref CycleInfo.
class UniformityInfoWrapperPass : public FunctionPass {
Function *m_function = nullptr;
UniformityInfo m_uniformityInfo;
public:
static char ID;
UniformityInfoWrapperPass();
UniformityInfo &getUniformityInfo() { return m_uniformityInfo; }
const UniformityInfo &getUniformityInfo() const { return m_uniformityInfo; }
bool runOnFunction(Function &F) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override;
void print(raw_ostream &OS, const Module *M = nullptr) const override;
// TODO: verify analysis
};
} // namespace llvm
#endif // LLVM_ANALYSIS_UNIFORMITYANALYSIS_H
PK iwFZ���}
}
Analysis/InlineOrder.hnu �[��� //===- InlineOrder.h - Inlining order abstraction -*- C++ ---*-------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
#ifndef LLVM_ANALYSIS_INLINEORDER_H
#define LLVM_ANALYSIS_INLINEORDER_H
#include "llvm/ADT/STLFunctionalExtras.h"
#include "llvm/Analysis/InlineCost.h"
#include <utility>
namespace llvm {
class CallBase;
template <typename T> class InlineOrder {
public:
virtual ~InlineOrder() = default;
virtual size_t size() = 0;
virtual void push(const T &Elt) = 0;
virtual T pop() = 0;
virtual void erase_if(function_ref<bool(T)> Pred) = 0;
bool empty() { return !size(); }
};
std::unique_ptr<InlineOrder<std::pair<CallBase *, int>>>
getDefaultInlineOrder(FunctionAnalysisManager &FAM, const InlineParams &Params,
ModuleAnalysisManager &MAM, Module &M);
std::unique_ptr<InlineOrder<std::pair<CallBase *, int>>>
getInlineOrder(FunctionAnalysisManager &FAM, const InlineParams &Params,
ModuleAnalysisManager &MAM, Module &M);
/// Used for dynamically loading instances of InlineOrder as plugins
///
/// Plugins must implement an InlineOrderFactory, for an example refer to:
/// llvm/unittests/Analysis/InlineOrderPlugin/InlineOrderPlugin.cpp
///
/// If a PluginInlineOrderAnalysis has been registered with the
/// current ModuleAnalysisManager, llvm::getInlineOrder returns an
/// InlineOrder created by the PluginInlineOrderAnalysis' Factory.
///
class PluginInlineOrderAnalysis
: public AnalysisInfoMixin<PluginInlineOrderAnalysis> {
public:
static AnalysisKey Key;
typedef std::unique_ptr<InlineOrder<std::pair<CallBase *, int>>> (
*InlineOrderFactory)(FunctionAnalysisManager &FAM,
const InlineParams &Params,
ModuleAnalysisManager &MAM, Module &M);
PluginInlineOrderAnalysis(InlineOrderFactory Factory) : Factory(Factory) {
HasBeenRegistered = true;
assert(Factory != nullptr &&
"The plugin inline order factory should not be a null pointer.");
}
struct Result {
InlineOrderFactory Factory;
};
Result run(Module &, ModuleAnalysisManager &) { return {Factory}; }
Result getResult() { return {Factory}; }
static bool isRegistered() { return HasBeenRegistered; }
static void unregister() { HasBeenRegistered = false; }
private:
static bool HasBeenRegistered;
InlineOrderFactory Factory;
};
} // namespace llvm
#endif // LLVM_ANALYSIS_INLINEORDER_H
PK iwFZ��@5; ; Analysis/ScalarFuncs.defnu �[��� //===-- ScalarFuncs.def - Library information ----------*- C++ -*----------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// This .def file creates mapping from standard IEEE math functions
// their corresponding entries in the IBM MASS (scalar) library.
// LLVM intrinsic math functions will be handled in PPCISelLowing to
// allow existing optimizations like pow(x,0.5) --> sqrt(x).
#if defined(TLI_DEFINE_SCALAR_MASS_FUNCS)
#define TLI_DEFINE_SCALAR_MASS_FUNC(SCAL, MASSENTRY) {SCAL, MASSENTRY},
#endif
TLI_DEFINE_SCALAR_MASS_FUNC("acosf", "__xl_acosf")
TLI_DEFINE_SCALAR_MASS_FUNC("__acosf_finite", "__xl_acosf")
TLI_DEFINE_SCALAR_MASS_FUNC("acos", "__xl_acos")
TLI_DEFINE_SCALAR_MASS_FUNC("__acos_finite", "__xl_acos")
TLI_DEFINE_SCALAR_MASS_FUNC("acoshf", "__xl_acoshf")
TLI_DEFINE_SCALAR_MASS_FUNC("__acoshf_finite", "__xl_acoshf")
TLI_DEFINE_SCALAR_MASS_FUNC("acosh", "__xl_acosh")
TLI_DEFINE_SCALAR_MASS_FUNC("__acosh_finite", "__xl_acosh")
TLI_DEFINE_SCALAR_MASS_FUNC("asinf", "__xl_asinf")
TLI_DEFINE_SCALAR_MASS_FUNC("__asinf_finite", "__xl_asinf")
TLI_DEFINE_SCALAR_MASS_FUNC("asin", "__xl_asin")
TLI_DEFINE_SCALAR_MASS_FUNC("__asin_finite", "__xl_asin")
TLI_DEFINE_SCALAR_MASS_FUNC("asinhf", "__xl_asinhf")
TLI_DEFINE_SCALAR_MASS_FUNC("asinh", "__xl_asinh")
TLI_DEFINE_SCALAR_MASS_FUNC("atanf", "__xl_atanf")
TLI_DEFINE_SCALAR_MASS_FUNC("atan", "__xl_atan")
TLI_DEFINE_SCALAR_MASS_FUNC("atan2f", "__xl_atan2f")
TLI_DEFINE_SCALAR_MASS_FUNC("__atan2f_finite", "__xl_atan2f")
TLI_DEFINE_SCALAR_MASS_FUNC("atan2", "__xl_atan2")
TLI_DEFINE_SCALAR_MASS_FUNC("__atan2_finite", "__xl_atan2")
TLI_DEFINE_SCALAR_MASS_FUNC("atanhf", "__xl_atanhf")
TLI_DEFINE_SCALAR_MASS_FUNC("__atanhf_finite", "__xl_atanhf")
TLI_DEFINE_SCALAR_MASS_FUNC("atanh", "__xl_atanh")
TLI_DEFINE_SCALAR_MASS_FUNC("__atanh_finite", "__xl_atanh")
TLI_DEFINE_SCALAR_MASS_FUNC("cbrtf", "__xl_cbrtf")
TLI_DEFINE_SCALAR_MASS_FUNC("cbrt", "__xl_cbrt")
TLI_DEFINE_SCALAR_MASS_FUNC("cosf", "__xl_cosf")
TLI_DEFINE_SCALAR_MASS_FUNC("cos", "__xl_cos")
TLI_DEFINE_SCALAR_MASS_FUNC("coshf", "__xl_coshf")
TLI_DEFINE_SCALAR_MASS_FUNC("__coshf_finite", "__xl_coshf")
TLI_DEFINE_SCALAR_MASS_FUNC("cosh", "__xl_cosh")
TLI_DEFINE_SCALAR_MASS_FUNC("__cosh_finite", "__xl_cosh")
TLI_DEFINE_SCALAR_MASS_FUNC("erff", "__xl_erff")
TLI_DEFINE_SCALAR_MASS_FUNC("erf", "__xl_erf")
TLI_DEFINE_SCALAR_MASS_FUNC("erfcf", "__xl_erfcf")
TLI_DEFINE_SCALAR_MASS_FUNC("erfc", "__xl_erfc")
TLI_DEFINE_SCALAR_MASS_FUNC("expf", "__xl_expf")
TLI_DEFINE_SCALAR_MASS_FUNC("__expf_finite", "__xl_expf")
TLI_DEFINE_SCALAR_MASS_FUNC("exp", "__xl_exp")
TLI_DEFINE_SCALAR_MASS_FUNC("__exp_finite", "__xl_exp")
TLI_DEFINE_SCALAR_MASS_FUNC("expm1f", "__xl_expm1f")
TLI_DEFINE_SCALAR_MASS_FUNC("expm1", "__xl_expm1")
TLI_DEFINE_SCALAR_MASS_FUNC("hypotf", "__xl_hypotf")
TLI_DEFINE_SCALAR_MASS_FUNC("hypot", "__xl_hypot")
TLI_DEFINE_SCALAR_MASS_FUNC("lgammaf", "__xl_lgammaf")
TLI_DEFINE_SCALAR_MASS_FUNC("lgamma", "__xl_lgamma")
TLI_DEFINE_SCALAR_MASS_FUNC("logf", "__xl_logf")
TLI_DEFINE_SCALAR_MASS_FUNC("__logf_finite", "__xl_logf")
TLI_DEFINE_SCALAR_MASS_FUNC("log", "__xl_log")
TLI_DEFINE_SCALAR_MASS_FUNC("__log_finite", "__xl_log")
TLI_DEFINE_SCALAR_MASS_FUNC("log10f", "__xl_log10f")
TLI_DEFINE_SCALAR_MASS_FUNC("__log10f_finite", "__xl_log10f")
TLI_DEFINE_SCALAR_MASS_FUNC("log10", "__xl_log10")
TLI_DEFINE_SCALAR_MASS_FUNC("__log10_finite", "__xl_log10")
TLI_DEFINE_SCALAR_MASS_FUNC("log1pf", "__xl_log1pf")
TLI_DEFINE_SCALAR_MASS_FUNC("log1p", "__xl_log1p")
TLI_DEFINE_SCALAR_MASS_FUNC("powf", "__xl_powf")
TLI_DEFINE_SCALAR_MASS_FUNC("__powf_finite", "__xl_powf")
TLI_DEFINE_SCALAR_MASS_FUNC("pow", "__xl_pow")
TLI_DEFINE_SCALAR_MASS_FUNC("__pow_finite", "__xl_pow")
TLI_DEFINE_SCALAR_MASS_FUNC("rsqrt", "__xl_rsqrt")
TLI_DEFINE_SCALAR_MASS_FUNC("sinf", "__xl_sinf")
TLI_DEFINE_SCALAR_MASS_FUNC("sin", "__xl_sin")
TLI_DEFINE_SCALAR_MASS_FUNC("sinhf", "__xl_sinhf")
TLI_DEFINE_SCALAR_MASS_FUNC("__sinhf_finite", "__xl_sinhf")
TLI_DEFINE_SCALAR_MASS_FUNC("sinh", "__xl_sinh")
TLI_DEFINE_SCALAR_MASS_FUNC("__sinh_finite", "__xl_sinh")
TLI_DEFINE_SCALAR_MASS_FUNC("sqrt", "__xl_sqrt")
TLI_DEFINE_SCALAR_MASS_FUNC("tanf", "__xl_tanf")
TLI_DEFINE_SCALAR_MASS_FUNC("tan", "__xl_tan")
TLI_DEFINE_SCALAR_MASS_FUNC("tanhf", "__xl_tanhf")
TLI_DEFINE_SCALAR_MASS_FUNC("tanh", "__xl_tanh")
#undef TLI_DEFINE_SCALAR_MASS_FUNCS
#undef TLI_DEFINE_SCALAR_MASS_FUNC
PK iwFZ���f� � Analysis/LoopNestAnalysis.hnu �[��� //===- llvm/Analysis/LoopNestAnalysis.h -------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file defines the interface for the loop nest analysis.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_LOOPNESTANALYSIS_H
#define LLVM_ANALYSIS_LOOPNESTANALYSIS_H
#include "llvm/ADT/STLExtras.h"
#include "llvm/Analysis/LoopAnalysisManager.h"
#include "llvm/Analysis/LoopInfo.h"
namespace llvm {
using LoopVectorTy = SmallVector<Loop *, 8>;
class LPMUpdater;
/// This class represents a loop nest and can be used to query its properties.
class LLVM_EXTERNAL_VISIBILITY LoopNest {
public:
using InstrVectorTy = SmallVector<const Instruction *>;
/// Construct a loop nest rooted by loop \p Root.
LoopNest(Loop &Root, ScalarEvolution &SE);
LoopNest() = delete;
/// Construct a LoopNest object.
static std::unique_ptr<LoopNest> getLoopNest(Loop &Root, ScalarEvolution &SE);
/// Return true if the given loops \p OuterLoop and \p InnerLoop are
/// perfectly nested with respect to each other, and false otherwise.
/// Example:
/// \code
/// for(i)
/// for(j)
/// for(k)
/// \endcode
/// arePerfectlyNested(loop_i, loop_j, SE) would return true.
/// arePerfectlyNested(loop_j, loop_k, SE) would return true.
/// arePerfectlyNested(loop_i, loop_k, SE) would return false.
static bool arePerfectlyNested(const Loop &OuterLoop, const Loop &InnerLoop,
ScalarEvolution &SE);
/// Return a vector of instructions that prevent the LoopNest given
/// by loops \p OuterLoop and \p InnerLoop from being perfect.
static InstrVectorTy getInterveningInstructions(const Loop &OuterLoop,
const Loop &InnerLoop,
ScalarEvolution &SE);
/// Return the maximum nesting depth of the loop nest rooted by loop \p Root.
/// For example given the loop nest:
/// \code
/// for(i) // loop at level 1 and Root of the nest
/// for(j) // loop at level 2
/// <code>
/// for(k) // loop at level 3
/// \endcode
/// getMaxPerfectDepth(Loop_i) would return 2.
static unsigned getMaxPerfectDepth(const Loop &Root, ScalarEvolution &SE);
/// Recursivelly traverse all empty 'single successor' basic blocks of \p From
/// (if there are any). When \p CheckUniquePred is set to true, check if
/// each of the empty single successors has a unique predecessor. Return
/// the last basic block found or \p End if it was reached during the search.
static const BasicBlock &skipEmptyBlockUntil(const BasicBlock *From,
const BasicBlock *End,
bool CheckUniquePred = false);
/// Return the outermost loop in the loop nest.
Loop &getOutermostLoop() const { return *Loops.front(); }
/// Return the innermost loop in the loop nest if the nest has only one
/// innermost loop, and a nullptr otherwise.
/// Note: the innermost loop returned is not necessarily perfectly nested.
Loop *getInnermostLoop() const {
if (Loops.size() == 1)
return Loops.back();
// The loops in the 'Loops' vector have been collected in breadth first
// order, therefore if the last 2 loops in it have the same nesting depth
// there isn't a unique innermost loop in the nest.
Loop *LastLoop = Loops.back();
auto SecondLastLoopIter = ++Loops.rbegin();
return (LastLoop->getLoopDepth() == (*SecondLastLoopIter)->getLoopDepth())
? nullptr
: LastLoop;
}
/// Return the loop at the given \p Index.
Loop *getLoop(unsigned Index) const {
assert(Index < Loops.size() && "Index is out of bounds");
return Loops[Index];
}
/// Get the loop index of the given loop \p L.
unsigned getLoopIndex(const Loop &L) const {
for (unsigned I = 0; I < getNumLoops(); ++I)
if (getLoop(I) == &L)
return I;
llvm_unreachable("Loop not in the loop nest");
}
/// Return the number of loops in the nest.
size_t getNumLoops() const { return Loops.size(); }
/// Get the loops in the nest.
ArrayRef<Loop *> getLoops() const { return Loops; }
/// Get the loops in the nest at the given \p Depth.
LoopVectorTy getLoopsAtDepth(unsigned Depth) const {
assert(Depth >= Loops.front()->getLoopDepth() &&
Depth <= Loops.back()->getLoopDepth() && "Invalid depth");
LoopVectorTy Result;
for (unsigned I = 0; I < getNumLoops(); ++I) {
Loop *L = getLoop(I);
if (L->getLoopDepth() == Depth)
Result.push_back(L);
else if (L->getLoopDepth() > Depth)
break;
}
return Result;
}
/// Retrieve a vector of perfect loop nests contained in the current loop
/// nest. For example, given the following nest containing 4 loops, this
/// member function would return {{L1,L2},{L3,L4}}.
/// \code
/// for(i) // L1
/// for(j) // L2
/// <code>
/// for(k) // L3
/// for(l) // L4
/// \endcode
SmallVector<LoopVectorTy, 4> getPerfectLoops(ScalarEvolution &SE) const;
/// Return the loop nest depth (i.e. the loop depth of the 'deepest' loop)
/// For example given the loop nest:
/// \code
/// for(i) // loop at level 1 and Root of the nest
/// for(j1) // loop at level 2
/// for(k) // loop at level 3
/// for(j2) // loop at level 2
/// \endcode
/// getNestDepth() would return 3.
unsigned getNestDepth() const {
int NestDepth =
Loops.back()->getLoopDepth() - Loops.front()->getLoopDepth() + 1;
assert(NestDepth > 0 && "Expecting NestDepth to be at least 1");
return NestDepth;
}
/// Return the maximum perfect nesting depth.
unsigned getMaxPerfectDepth() const { return MaxPerfectDepth; }
/// Return true if all loops in the loop nest are in simplify form.
bool areAllLoopsSimplifyForm() const {
return all_of(Loops, [](const Loop *L) { return L->isLoopSimplifyForm(); });
}
/// Return true if all loops in the loop nest are in rotated form.
bool areAllLoopsRotatedForm() const {
return all_of(Loops, [](const Loop *L) { return L->isRotatedForm(); });
}
/// Return the function to which the loop-nest belongs.
Function *getParent() const {
return Loops.front()->getHeader()->getParent();
}
StringRef getName() const { return Loops.front()->getName(); }
protected:
const unsigned MaxPerfectDepth; // maximum perfect nesting depth level.
LoopVectorTy Loops; // the loops in the nest (in breadth first order).
private:
enum LoopNestEnum {
PerfectLoopNest,
ImperfectLoopNest,
InvalidLoopStructure,
OuterLoopLowerBoundUnknown
};
static LoopNestEnum analyzeLoopNestForPerfectNest(const Loop &OuterLoop,
const Loop &InnerLoop,
ScalarEvolution &SE);
};
raw_ostream &operator<<(raw_ostream &, const LoopNest &);
/// This analysis provides information for a loop nest. The analysis runs on
/// demand and can be initiated via AM.getResult<LoopNestAnalysis>.
class LoopNestAnalysis : public AnalysisInfoMixin<LoopNestAnalysis> {
friend AnalysisInfoMixin<LoopNestAnalysis>;
static AnalysisKey Key;
public:
using Result = LoopNest;
Result run(Loop &L, LoopAnalysisManager &AM, LoopStandardAnalysisResults &AR);
};
/// Printer pass for the \c LoopNest results.
class LoopNestPrinterPass : public PassInfoMixin<LoopNestPrinterPass> {
raw_ostream &OS;
public:
explicit LoopNestPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Loop &L, LoopAnalysisManager &AM,
LoopStandardAnalysisResults &AR, LPMUpdater &U);
};
} // namespace llvm
#endif // LLVM_ANALYSIS_LOOPNESTANALYSIS_H
PK iwFZ�h h Analysis/AssumeBundleQueries.hnu �[��� //===- AssumeBundleQueries.h - utilis to query assume bundles ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contain tools to query into assume bundles. assume bundles can be
// built using utilities from Transform/Utils/AssumeBundleBuilder.h
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_ASSUMEBUNDLEQUERIES_H
#define LLVM_ANALYSIS_ASSUMEBUNDLEQUERIES_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/IR/IntrinsicInst.h"
namespace llvm {
class AssumptionCache;
class DominatorTree;
class Instruction;
class Value;
/// Index of elements in the operand bundle.
/// If the element exist it is guaranteed to be what is specified in this enum
/// but it may not exist.
enum AssumeBundleArg {
ABA_WasOn = 0,
ABA_Argument = 1,
};
/// Query the operand bundle of an llvm.assume to find a single attribute of
/// the specified kind applied on a specified Value.
///
/// This has a non-constant complexity. It should only be used when a single
/// attribute is going to be queried.
///
/// Return true iff the queried attribute was found.
/// If ArgVal is set. the argument will be stored to ArgVal.
bool hasAttributeInAssume(AssumeInst &Assume, Value *IsOn, StringRef AttrName,
uint64_t *ArgVal = nullptr);
inline bool hasAttributeInAssume(AssumeInst &Assume, Value *IsOn,
Attribute::AttrKind Kind,
uint64_t *ArgVal = nullptr) {
return hasAttributeInAssume(Assume, IsOn,
Attribute::getNameFromAttrKind(Kind), ArgVal);
}
template<> struct DenseMapInfo<Attribute::AttrKind> {
static Attribute::AttrKind getEmptyKey() {
return Attribute::EmptyKey;
}
static Attribute::AttrKind getTombstoneKey() {
return Attribute::TombstoneKey;
}
static unsigned getHashValue(Attribute::AttrKind AK) {
return hash_combine(AK);
}
static bool isEqual(Attribute::AttrKind LHS, Attribute::AttrKind RHS) {
return LHS == RHS;
}
};
/// The map Key contains the Value on for which the attribute is valid and
/// the Attribute that is valid for that value.
/// If the Attribute is not on any value, the Value is nullptr.
using RetainedKnowledgeKey = std::pair<Value *, Attribute::AttrKind>;
struct MinMax {
uint64_t Min;
uint64_t Max;
};
/// A mapping from intrinsics (=`llvm.assume` calls) to a value range
/// (=knowledge) that is encoded in them. How the value range is interpreted
/// depends on the RetainedKnowledgeKey that was used to get this out of the
/// RetainedKnowledgeMap.
using Assume2KnowledgeMap = DenseMap<AssumeInst *, MinMax>;
using RetainedKnowledgeMap =
DenseMap<RetainedKnowledgeKey, Assume2KnowledgeMap>;
/// Insert into the map all the informations contained in the operand bundles of
/// the llvm.assume. This should be used instead of hasAttributeInAssume when
/// many queries are going to be made on the same llvm.assume.
/// String attributes are not inserted in the map.
/// If the IR changes the map will be outdated.
void fillMapFromAssume(AssumeInst &Assume, RetainedKnowledgeMap &Result);
/// Represent one information held inside an operand bundle of an llvm.assume.
/// AttrKind is the property that holds.
/// WasOn if not null is that Value for which AttrKind holds.
/// ArgValue is optionally an argument of the attribute.
/// For example if we know that %P has an alignment of at least four:
/// - AttrKind will be Attribute::Alignment.
/// - WasOn will be %P.
/// - ArgValue will be 4.
struct RetainedKnowledge {
Attribute::AttrKind AttrKind = Attribute::None;
uint64_t ArgValue = 0;
Value *WasOn = nullptr;
bool operator==(RetainedKnowledge Other) const {
return AttrKind == Other.AttrKind && WasOn == Other.WasOn &&
ArgValue == Other.ArgValue;
}
bool operator!=(RetainedKnowledge Other) const { return !(*this == Other); }
/// This is only intended for use in std::min/std::max between attribute that
/// only differ in ArgValue.
bool operator<(RetainedKnowledge Other) const {
assert(((AttrKind == Other.AttrKind && WasOn == Other.WasOn) ||
AttrKind == Attribute::None || Other.AttrKind == Attribute::None) &&
"This is only intend for use in min/max to select the best for "
"RetainedKnowledge that is otherwise equal");
return ArgValue < Other.ArgValue;
}
operator bool() const { return AttrKind != Attribute::None; }
static RetainedKnowledge none() { return RetainedKnowledge{}; }
};
/// Retreive the information help by Assume on the operand at index Idx.
/// Assume should be an llvm.assume and Idx should be in the operand bundle.
RetainedKnowledge getKnowledgeFromOperandInAssume(AssumeInst &Assume,
unsigned Idx);
/// Retreive the information help by the Use U of an llvm.assume. the use should
/// be in the operand bundle.
inline RetainedKnowledge getKnowledgeFromUseInAssume(const Use *U) {
return getKnowledgeFromOperandInAssume(*cast<AssumeInst>(U->getUser()),
U->getOperandNo());
}
/// Tag in operand bundle indicating that this bundle should be ignored.
constexpr StringRef IgnoreBundleTag = "ignore";
/// Return true iff the operand bundles of the provided llvm.assume doesn't
/// contain any valuable information. This is true when:
/// - The operand bundle is empty
/// - The operand bundle only contains information about dropped values or
/// constant folded values.
///
/// the argument to the call of llvm.assume may still be useful even if the
/// function returned true.
bool isAssumeWithEmptyBundle(AssumeInst &Assume);
/// Return a valid Knowledge associated to the Use U if its Attribute kind is
/// in AttrKinds.
RetainedKnowledge getKnowledgeFromUse(const Use *U,
ArrayRef<Attribute::AttrKind> AttrKinds);
/// Return a valid Knowledge associated to the Value V if its Attribute kind is
/// in AttrKinds and it matches the Filter.
RetainedKnowledge getKnowledgeForValue(
const Value *V, ArrayRef<Attribute::AttrKind> AttrKinds,
AssumptionCache *AC = nullptr,
function_ref<bool(RetainedKnowledge, Instruction *,
const CallBase::BundleOpInfo *)>
Filter = [](auto...) { return true; });
/// Return a valid Knowledge associated to the Value V if its Attribute kind is
/// in AttrKinds and the knowledge is suitable to be used in the context of
/// CtxI.
RetainedKnowledge getKnowledgeValidInContext(
const Value *V, ArrayRef<Attribute::AttrKind> AttrKinds,
const Instruction *CtxI, const DominatorTree *DT = nullptr,
AssumptionCache *AC = nullptr);
/// This extracts the Knowledge from an element of an operand bundle.
/// This is mostly for use in the assume builder.
RetainedKnowledge getKnowledgeFromBundle(AssumeInst &Assume,
const CallBase::BundleOpInfo &BOI);
} // namespace llvm
#endif
PK iwFZ���0 Analysis/StackSafetyAnalysis.hnu �[��� //===- StackSafetyAnalysis.h - Stack memory safety analysis -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Stack Safety Analysis detects allocas and arguments with safe access.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_STACKSAFETYANALYSIS_H
#define LLVM_ANALYSIS_STACKSAFETYANALYSIS_H
#include "llvm/IR/ModuleSummaryIndex.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
namespace llvm {
class AllocaInst;
class ScalarEvolution;
/// Interface to access stack safety analysis results for single function.
class StackSafetyInfo {
public:
struct InfoTy;
private:
Function *F = nullptr;
std::function<ScalarEvolution &()> GetSE;
mutable std::unique_ptr<InfoTy> Info;
public:
StackSafetyInfo();
StackSafetyInfo(Function *F, std::function<ScalarEvolution &()> GetSE);
StackSafetyInfo(StackSafetyInfo &&);
StackSafetyInfo &operator=(StackSafetyInfo &&);
~StackSafetyInfo();
const InfoTy &getInfo() const;
// TODO: Add useful for client methods.
void print(raw_ostream &O) const;
/// Parameters use for a FunctionSummary.
/// Function collects access information of all pointer parameters.
/// Information includes a range of direct access of parameters by the
/// functions and all call sites accepting the parameter.
/// StackSafety assumes that missing parameter information means possibility
/// of access to the parameter with any offset, so we can correctly link
/// code without StackSafety information, e.g. non-ThinLTO.
std::vector<FunctionSummary::ParamAccess>
getParamAccesses(ModuleSummaryIndex &Index) const;
};
class StackSafetyGlobalInfo {
public:
struct InfoTy;
private:
Module *M = nullptr;
std::function<const StackSafetyInfo &(Function &F)> GetSSI;
const ModuleSummaryIndex *Index = nullptr;
mutable std::unique_ptr<InfoTy> Info;
const InfoTy &getInfo() const;
public:
StackSafetyGlobalInfo();
StackSafetyGlobalInfo(
Module *M, std::function<const StackSafetyInfo &(Function &F)> GetSSI,
const ModuleSummaryIndex *Index);
StackSafetyGlobalInfo(StackSafetyGlobalInfo &&);
StackSafetyGlobalInfo &operator=(StackSafetyGlobalInfo &&);
~StackSafetyGlobalInfo();
// Whether we can prove that all accesses to this Alloca are in-range and
// during its lifetime.
bool isSafe(const AllocaInst &AI) const;
// Returns true if the instruction can be proven to do only two types of
// memory accesses:
// (1) live stack locations in-bounds or
// (2) non-stack locations.
bool stackAccessIsSafe(const Instruction &I) const;
void print(raw_ostream &O) const;
void dump() const;
};
/// StackSafetyInfo wrapper for the new pass manager.
class StackSafetyAnalysis : public AnalysisInfoMixin<StackSafetyAnalysis> {
friend AnalysisInfoMixin<StackSafetyAnalysis>;
static AnalysisKey Key;
public:
using Result = StackSafetyInfo;
StackSafetyInfo run(Function &F, FunctionAnalysisManager &AM);
};
/// Printer pass for the \c StackSafetyAnalysis results.
class StackSafetyPrinterPass : public PassInfoMixin<StackSafetyPrinterPass> {
raw_ostream &OS;
public:
explicit StackSafetyPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
/// StackSafetyInfo wrapper for the legacy pass manager
class StackSafetyInfoWrapperPass : public FunctionPass {
StackSafetyInfo SSI;
public:
static char ID;
StackSafetyInfoWrapperPass();
const StackSafetyInfo &getResult() const { return SSI; }
void print(raw_ostream &O, const Module *M) const override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnFunction(Function &F) override;
};
/// This pass performs the global (interprocedural) stack safety analysis (new
/// pass manager).
class StackSafetyGlobalAnalysis
: public AnalysisInfoMixin<StackSafetyGlobalAnalysis> {
friend AnalysisInfoMixin<StackSafetyGlobalAnalysis>;
static AnalysisKey Key;
public:
using Result = StackSafetyGlobalInfo;
Result run(Module &M, ModuleAnalysisManager &AM);
};
/// Printer pass for the \c StackSafetyGlobalAnalysis results.
class StackSafetyGlobalPrinterPass
: public PassInfoMixin<StackSafetyGlobalPrinterPass> {
raw_ostream &OS;
public:
explicit StackSafetyGlobalPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
};
/// This pass performs the global (interprocedural) stack safety analysis
/// (legacy pass manager).
class StackSafetyGlobalInfoWrapperPass : public ModulePass {
StackSafetyGlobalInfo SSGI;
public:
static char ID;
StackSafetyGlobalInfoWrapperPass();
~StackSafetyGlobalInfoWrapperPass();
const StackSafetyGlobalInfo &getResult() const { return SSGI; }
void print(raw_ostream &O, const Module *M) const override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnModule(Module &M) override;
};
bool needsParamAccessSummary(const Module &M);
void generateParamAccessSummary(ModuleSummaryIndex &Index);
} // end namespace llvm
#endif // LLVM_ANALYSIS_STACKSAFETYANALYSIS_H
PK iwFZ��߲) �) Analysis/IntervalIterator.hnu �[��� //===- IntervalIterator.h - Interval Iterator Declaration -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines an iterator that enumerates the intervals in a control flow
// graph of some sort. This iterator is parametric, allowing iterator over the
// following types of graphs:
//
// 1. A Function* object, composed of BasicBlock nodes.
// 2. An IntervalPartition& object, composed of Interval nodes.
//
// This iterator is defined to walk the control flow graph, returning intervals
// in depth first order. These intervals are completely filled in except for
// the predecessor fields (the successor information is filled in however).
//
// By default, the intervals created by this iterator are deleted after they
// are no longer any use to the iterator. This behavior can be changed by
// passing a false value into the intervals_begin() function. This causes the
// IOwnMem member to be set, and the intervals to not be deleted.
//
// It is only safe to use this if all of the intervals are deleted by the caller
// and all of the intervals are processed. However, the user of the iterator is
// not allowed to modify or delete the intervals until after the iterator has
// been used completely. The IntervalPartition class uses this functionality.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_INTERVALITERATOR_H
#define LLVM_ANALYSIS_INTERVALITERATOR_H
#include "llvm/ADT/GraphTraits.h"
#include "llvm/Analysis/Interval.h"
#include "llvm/Analysis/IntervalPartition.h"
#include "llvm/IR/CFG.h"
#include <algorithm>
#include <cassert>
#include <iterator>
#include <set>
#include <utility>
#include <vector>
namespace llvm {
class BasicBlock;
class Function;
// getNodeHeader - Given a source graph node and the source graph, return the
// BasicBlock that is the header node. This is the opposite of
// getSourceGraphNode.
inline BasicBlock *getNodeHeader(BasicBlock *BB) { return BB; }
inline BasicBlock *getNodeHeader(Interval *I) { return I->getHeaderNode(); }
// getSourceGraphNode - Given a BasicBlock and the source graph, return the
// source graph node that corresponds to the BasicBlock. This is the opposite
// of getNodeHeader.
inline BasicBlock *getSourceGraphNode(Function *, BasicBlock *BB) {
return BB;
}
inline Interval *getSourceGraphNode(IntervalPartition *IP, BasicBlock *BB) {
return IP->getBlockInterval(BB);
}
// addNodeToInterval - This method exists to assist the generic ProcessNode
// with the task of adding a node to the new interval, depending on the
// type of the source node. In the case of a CFG source graph (BasicBlock
// case), the BasicBlock itself is added to the interval.
inline void addNodeToInterval(Interval *Int, BasicBlock *BB) {
Int->Nodes.push_back(BB);
}
// addNodeToInterval - This method exists to assist the generic ProcessNode
// with the task of adding a node to the new interval, depending on the
// type of the source node. In the case of a CFG source graph (BasicBlock
// case), the BasicBlock itself is added to the interval. In the case of
// an IntervalPartition source graph (Interval case), all of the member
// BasicBlocks are added to the interval.
inline void addNodeToInterval(Interval *Int, Interval *I) {
// Add all of the nodes in I as new nodes in Int.
llvm::append_range(Int->Nodes, I->Nodes);
}
template<class NodeTy, class OrigContainer_t, class GT = GraphTraits<NodeTy *>,
class IGT = GraphTraits<Inverse<NodeTy *>>>
class IntervalIterator {
std::vector<std::pair<Interval *, typename Interval::succ_iterator>> IntStack;
std::set<BasicBlock *> Visited;
OrigContainer_t *OrigContainer;
bool IOwnMem; // If True, delete intervals when done with them
// See file header for conditions of use
public:
using iterator_category = std::forward_iterator_tag;
IntervalIterator() = default; // End iterator, empty stack
IntervalIterator(Function *M, bool OwnMemory) : IOwnMem(OwnMemory) {
OrigContainer = M;
if (!ProcessInterval(&M->front())) {
llvm_unreachable("ProcessInterval should never fail for first interval!");
}
}
IntervalIterator(IntervalIterator &&x)
: IntStack(std::move(x.IntStack)), Visited(std::move(x.Visited)),
OrigContainer(x.OrigContainer), IOwnMem(x.IOwnMem) {
x.IOwnMem = false;
}
IntervalIterator(IntervalPartition &IP, bool OwnMemory) : IOwnMem(OwnMemory) {
OrigContainer = &IP;
if (!ProcessInterval(IP.getRootInterval())) {
llvm_unreachable("ProcessInterval should never fail for first interval!");
}
}
~IntervalIterator() {
if (IOwnMem)
while (!IntStack.empty()) {
delete operator*();
IntStack.pop_back();
}
}
bool operator==(const IntervalIterator &x) const {
return IntStack == x.IntStack;
}
bool operator!=(const IntervalIterator &x) const { return !(*this == x); }
const Interval *operator*() const { return IntStack.back().first; }
Interval *operator*() { return IntStack.back().first; }
const Interval *operator->() const { return operator*(); }
Interval *operator->() { return operator*(); }
IntervalIterator &operator++() { // Preincrement
assert(!IntStack.empty() && "Attempting to use interval iterator at end!");
do {
// All of the intervals on the stack have been visited. Try visiting
// their successors now.
Interval::succ_iterator &SuccIt = IntStack.back().second,
EndIt = succ_end(IntStack.back().first);
while (SuccIt != EndIt) { // Loop over all interval succs
bool Done = ProcessInterval(getSourceGraphNode(OrigContainer, *SuccIt));
++SuccIt; // Increment iterator
if (Done) return *this; // Found a new interval! Use it!
}
// Free interval memory... if necessary
if (IOwnMem) delete IntStack.back().first;
// We ran out of successors for this interval... pop off the stack
IntStack.pop_back();
} while (!IntStack.empty());
return *this;
}
IntervalIterator operator++(int) { // Postincrement
IntervalIterator tmp = *this;
++*this;
return tmp;
}
private:
// ProcessInterval - This method is used during the construction of the
// interval graph. It walks through the source graph, recursively creating
// an interval per invocation until the entire graph is covered. This uses
// the ProcessNode method to add all of the nodes to the interval.
//
// This method is templated because it may operate on two different source
// graphs: a basic block graph, or a preexisting interval graph.
bool ProcessInterval(NodeTy *Node) {
BasicBlock *Header = getNodeHeader(Node);
if (!Visited.insert(Header).second)
return false;
Interval *Int = new Interval(Header);
// Check all of our successors to see if they are in the interval...
for (typename GT::ChildIteratorType I = GT::child_begin(Node),
E = GT::child_end(Node); I != E; ++I)
ProcessNode(Int, getSourceGraphNode(OrigContainer, *I));
IntStack.push_back(std::make_pair(Int, succ_begin(Int)));
return true;
}
// ProcessNode - This method is called by ProcessInterval to add nodes to the
// interval being constructed, and it is also called recursively as it walks
// the source graph. A node is added to the current interval only if all of
// its predecessors are already in the graph. This also takes care of keeping
// the successor set of an interval up to date.
//
// This method is templated because it may operate on two different source
// graphs: a basic block graph, or a preexisting interval graph.
void ProcessNode(Interval *Int, NodeTy *Node) {
assert(Int && "Null interval == bad!");
assert(Node && "Null Node == bad!");
BasicBlock *NodeHeader = getNodeHeader(Node);
if (Visited.count(NodeHeader)) { // Node already been visited?
if (Int->contains(NodeHeader)) { // Already in this interval...
return;
} else { // In other interval, add as successor
if (!Int->isSuccessor(NodeHeader)) // Add only if not already in set
Int->Successors.push_back(NodeHeader);
}
} else { // Otherwise, not in interval yet
for (typename IGT::ChildIteratorType I = IGT::child_begin(Node),
E = IGT::child_end(Node); I != E; ++I) {
if (!Int->contains(*I)) { // If pred not in interval, we can't be
if (!Int->isSuccessor(NodeHeader)) // Add only if not already in set
Int->Successors.push_back(NodeHeader);
return; // See you later
}
}
// If we get here, then all of the predecessors of BB are in the interval
// already. In this case, we must add BB to the interval!
addNodeToInterval(Int, Node);
Visited.insert(NodeHeader); // The node has now been visited!
if (Int->isSuccessor(NodeHeader)) {
// If we were in the successor list from before... remove from succ list
llvm::erase_value(Int->Successors, NodeHeader);
}
// Now that we have discovered that Node is in the interval, perhaps some
// of its successors are as well?
for (typename GT::ChildIteratorType It = GT::child_begin(Node),
End = GT::child_end(Node); It != End; ++It)
ProcessNode(Int, getSourceGraphNode(OrigContainer, *It));
}
}
};
using function_interval_iterator = IntervalIterator<BasicBlock, Function>;
using interval_part_interval_iterator =
IntervalIterator<Interval, IntervalPartition>;
inline function_interval_iterator intervals_begin(Function *F,
bool DeleteInts = true) {
return function_interval_iterator(F, DeleteInts);
}
inline function_interval_iterator intervals_end(Function *) {
return function_interval_iterator();
}
inline interval_part_interval_iterator
intervals_begin(IntervalPartition &IP, bool DeleteIntervals = true) {
return interval_part_interval_iterator(IP, DeleteIntervals);
}
inline interval_part_interval_iterator intervals_end(IntervalPartition &IP) {
return interval_part_interval_iterator();
}
} // end namespace llvm
#endif // LLVM_ANALYSIS_INTERVALITERATOR_H
PK iwFZ0 ]��M �M Analysis/SparsePropagation.hnu �[��� //===- SparsePropagation.h - Sparse Conditional Property Propagation ------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements an abstract sparse conditional propagation algorithm,
// modeled after SCCP, but with a customizable lattice function.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_SPARSEPROPAGATION_H
#define LLVM_ANALYSIS_SPARSEPROPAGATION_H
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/Instructions.h"
#include "llvm/Support/Debug.h"
#include <set>
#define DEBUG_TYPE "sparseprop"
namespace llvm {
/// A template for translating between LLVM Values and LatticeKeys. Clients must
/// provide a specialization of LatticeKeyInfo for their LatticeKey type.
template <class LatticeKey> struct LatticeKeyInfo {
// static inline Value *getValueFromLatticeKey(LatticeKey Key);
// static inline LatticeKey getLatticeKeyFromValue(Value *V);
};
template <class LatticeKey, class LatticeVal,
class KeyInfo = LatticeKeyInfo<LatticeKey>>
class SparseSolver;
/// AbstractLatticeFunction - This class is implemented by the dataflow instance
/// to specify what the lattice values are and how they handle merges etc. This
/// gives the client the power to compute lattice values from instructions,
/// constants, etc. The current requirement is that lattice values must be
/// copyable. At the moment, nothing tries to avoid copying. Additionally,
/// lattice keys must be able to be used as keys of a mapping data structure.
/// Internally, the generic solver currently uses a DenseMap to map lattice keys
/// to lattice values. If the lattice key is a non-standard type, a
/// specialization of DenseMapInfo must be provided.
template <class LatticeKey, class LatticeVal> class AbstractLatticeFunction {
private:
LatticeVal UndefVal, OverdefinedVal, UntrackedVal;
public:
AbstractLatticeFunction(LatticeVal undefVal, LatticeVal overdefinedVal,
LatticeVal untrackedVal) {
UndefVal = undefVal;
OverdefinedVal = overdefinedVal;
UntrackedVal = untrackedVal;
}
virtual ~AbstractLatticeFunction() = default;
LatticeVal getUndefVal() const { return UndefVal; }
LatticeVal getOverdefinedVal() const { return OverdefinedVal; }
LatticeVal getUntrackedVal() const { return UntrackedVal; }
/// IsUntrackedValue - If the specified LatticeKey is obviously uninteresting
/// to the analysis (i.e., it would always return UntrackedVal), this
/// function can return true to avoid pointless work.
virtual bool IsUntrackedValue(LatticeKey Key) { return false; }
/// ComputeLatticeVal - Compute and return a LatticeVal corresponding to the
/// given LatticeKey.
virtual LatticeVal ComputeLatticeVal(LatticeKey Key) {
return getOverdefinedVal();
}
/// IsSpecialCasedPHI - Given a PHI node, determine whether this PHI node is
/// one that the we want to handle through ComputeInstructionState.
virtual bool IsSpecialCasedPHI(PHINode *PN) { return false; }
/// MergeValues - Compute and return the merge of the two specified lattice
/// values. Merging should only move one direction down the lattice to
/// guarantee convergence (toward overdefined).
virtual LatticeVal MergeValues(LatticeVal X, LatticeVal Y) {
return getOverdefinedVal(); // always safe, never useful.
}
/// ComputeInstructionState - Compute the LatticeKeys that change as a result
/// of executing instruction \p I. Their associated LatticeVals are store in
/// \p ChangedValues.
virtual void
ComputeInstructionState(Instruction &I,
DenseMap<LatticeKey, LatticeVal> &ChangedValues,
SparseSolver<LatticeKey, LatticeVal> &SS) = 0;
/// PrintLatticeVal - Render the given LatticeVal to the specified stream.
virtual void PrintLatticeVal(LatticeVal LV, raw_ostream &OS);
/// PrintLatticeKey - Render the given LatticeKey to the specified stream.
virtual void PrintLatticeKey(LatticeKey Key, raw_ostream &OS);
/// GetValueFromLatticeVal - If the given LatticeVal is representable as an
/// LLVM value, return it; otherwise, return nullptr. If a type is given, the
/// returned value must have the same type. This function is used by the
/// generic solver in attempting to resolve branch and switch conditions.
virtual Value *GetValueFromLatticeVal(LatticeVal LV, Type *Ty = nullptr) {
return nullptr;
}
};
/// SparseSolver - This class is a general purpose solver for Sparse Conditional
/// Propagation with a programmable lattice function.
template <class LatticeKey, class LatticeVal, class KeyInfo>
class SparseSolver {
/// LatticeFunc - This is the object that knows the lattice and how to
/// compute transfer functions.
AbstractLatticeFunction<LatticeKey, LatticeVal> *LatticeFunc;
/// ValueState - Holds the LatticeVals associated with LatticeKeys.
DenseMap<LatticeKey, LatticeVal> ValueState;
/// BBExecutable - Holds the basic blocks that are executable.
SmallPtrSet<BasicBlock *, 16> BBExecutable;
/// ValueWorkList - Holds values that should be processed.
SmallVector<Value *, 64> ValueWorkList;
/// BBWorkList - Holds basic blocks that should be processed.
SmallVector<BasicBlock *, 64> BBWorkList;
using Edge = std::pair<BasicBlock *, BasicBlock *>;
/// KnownFeasibleEdges - Entries in this set are edges which have already had
/// PHI nodes retriggered.
std::set<Edge> KnownFeasibleEdges;
public:
explicit SparseSolver(
AbstractLatticeFunction<LatticeKey, LatticeVal> *Lattice)
: LatticeFunc(Lattice) {}
SparseSolver(const SparseSolver &) = delete;
SparseSolver &operator=(const SparseSolver &) = delete;
/// Solve - Solve for constants and executable blocks.
void Solve();
void Print(raw_ostream &OS) const;
/// getExistingValueState - Return the LatticeVal object corresponding to the
/// given value from the ValueState map. If the value is not in the map,
/// UntrackedVal is returned, unlike the getValueState method.
LatticeVal getExistingValueState(LatticeKey Key) const {
auto I = ValueState.find(Key);
return I != ValueState.end() ? I->second : LatticeFunc->getUntrackedVal();
}
/// getValueState - Return the LatticeVal object corresponding to the given
/// value from the ValueState map. If the value is not in the map, its state
/// is initialized.
LatticeVal getValueState(LatticeKey Key);
/// isEdgeFeasible - Return true if the control flow edge from the 'From'
/// basic block to the 'To' basic block is currently feasible. If
/// AggressiveUndef is true, then this treats values with unknown lattice
/// values as undefined. This is generally only useful when solving the
/// lattice, not when querying it.
bool isEdgeFeasible(BasicBlock *From, BasicBlock *To,
bool AggressiveUndef = false);
/// isBlockExecutable - Return true if there are any known feasible
/// edges into the basic block. This is generally only useful when
/// querying the lattice.
bool isBlockExecutable(BasicBlock *BB) const {
return BBExecutable.count(BB);
}
/// MarkBlockExecutable - This method can be used by clients to mark all of
/// the blocks that are known to be intrinsically live in the processed unit.
void MarkBlockExecutable(BasicBlock *BB);
private:
/// UpdateState - When the state of some LatticeKey is potentially updated to
/// the given LatticeVal, this function notices and adds the LLVM value
/// corresponding the key to the work list, if needed.
void UpdateState(LatticeKey Key, LatticeVal LV);
/// markEdgeExecutable - Mark a basic block as executable, adding it to the BB
/// work list if it is not already executable.
void markEdgeExecutable(BasicBlock *Source, BasicBlock *Dest);
/// getFeasibleSuccessors - Return a vector of booleans to indicate which
/// successors are reachable from a given terminator instruction.
void getFeasibleSuccessors(Instruction &TI, SmallVectorImpl<bool> &Succs,
bool AggressiveUndef);
void visitInst(Instruction &I);
void visitPHINode(PHINode &I);
void visitTerminator(Instruction &TI);
};
//===----------------------------------------------------------------------===//
// AbstractLatticeFunction Implementation
//===----------------------------------------------------------------------===//
template <class LatticeKey, class LatticeVal>
void AbstractLatticeFunction<LatticeKey, LatticeVal>::PrintLatticeVal(
LatticeVal V, raw_ostream &OS) {
if (V == UndefVal)
OS << "undefined";
else if (V == OverdefinedVal)
OS << "overdefined";
else if (V == UntrackedVal)
OS << "untracked";
else
OS << "unknown lattice value";
}
template <class LatticeKey, class LatticeVal>
void AbstractLatticeFunction<LatticeKey, LatticeVal>::PrintLatticeKey(
LatticeKey Key, raw_ostream &OS) {
OS << "unknown lattice key";
}
//===----------------------------------------------------------------------===//
// SparseSolver Implementation
//===----------------------------------------------------------------------===//
template <class LatticeKey, class LatticeVal, class KeyInfo>
LatticeVal
SparseSolver<LatticeKey, LatticeVal, KeyInfo>::getValueState(LatticeKey Key) {
auto I = ValueState.find(Key);
if (I != ValueState.end())
return I->second; // Common case, in the map
if (LatticeFunc->IsUntrackedValue(Key))
return LatticeFunc->getUntrackedVal();
LatticeVal LV = LatticeFunc->ComputeLatticeVal(Key);
// If this value is untracked, don't add it to the map.
if (LV == LatticeFunc->getUntrackedVal())
return LV;
return ValueState[Key] = std::move(LV);
}
template <class LatticeKey, class LatticeVal, class KeyInfo>
void SparseSolver<LatticeKey, LatticeVal, KeyInfo>::UpdateState(LatticeKey Key,
LatticeVal LV) {
auto I = ValueState.find(Key);
if (I != ValueState.end() && I->second == LV)
return; // No change.
// Update the state of the given LatticeKey and add its corresponding LLVM
// value to the work list.
ValueState[Key] = std::move(LV);
if (Value *V = KeyInfo::getValueFromLatticeKey(Key))
ValueWorkList.push_back(V);
}
template <class LatticeKey, class LatticeVal, class KeyInfo>
void SparseSolver<LatticeKey, LatticeVal, KeyInfo>::MarkBlockExecutable(
BasicBlock *BB) {
if (!BBExecutable.insert(BB).second)
return;
LLVM_DEBUG(dbgs() << "Marking Block Executable: " << BB->getName() << "\n");
BBWorkList.push_back(BB); // Add the block to the work list!
}
template <class LatticeKey, class LatticeVal, class KeyInfo>
void SparseSolver<LatticeKey, LatticeVal, KeyInfo>::markEdgeExecutable(
BasicBlock *Source, BasicBlock *Dest) {
if (!KnownFeasibleEdges.insert(Edge(Source, Dest)).second)
return; // This edge is already known to be executable!
LLVM_DEBUG(dbgs() << "Marking Edge Executable: " << Source->getName()
<< " -> " << Dest->getName() << "\n");
if (BBExecutable.count(Dest)) {
// The destination is already executable, but we just made an edge
// feasible that wasn't before. Revisit the PHI nodes in the block
// because they have potentially new operands.
for (BasicBlock::iterator I = Dest->begin(); isa<PHINode>(I); ++I)
visitPHINode(*cast<PHINode>(I));
} else {
MarkBlockExecutable(Dest);
}
}
template <class LatticeKey, class LatticeVal, class KeyInfo>
void SparseSolver<LatticeKey, LatticeVal, KeyInfo>::getFeasibleSuccessors(
Instruction &TI, SmallVectorImpl<bool> &Succs, bool AggressiveUndef) {
Succs.resize(TI.getNumSuccessors());
if (TI.getNumSuccessors() == 0)
return;
if (BranchInst *BI = dyn_cast<BranchInst>(&TI)) {
if (BI->isUnconditional()) {
Succs[0] = true;
return;
}
LatticeVal BCValue;
if (AggressiveUndef)
BCValue =
getValueState(KeyInfo::getLatticeKeyFromValue(BI->getCondition()));
else
BCValue = getExistingValueState(
KeyInfo::getLatticeKeyFromValue(BI->getCondition()));
if (BCValue == LatticeFunc->getOverdefinedVal() ||
BCValue == LatticeFunc->getUntrackedVal()) {
// Overdefined condition variables can branch either way.
Succs[0] = Succs[1] = true;
return;
}
// If undefined, neither is feasible yet.
if (BCValue == LatticeFunc->getUndefVal())
return;
Constant *C =
dyn_cast_or_null<Constant>(LatticeFunc->GetValueFromLatticeVal(
std::move(BCValue), BI->getCondition()->getType()));
if (!C || !isa<ConstantInt>(C)) {
// Non-constant values can go either way.
Succs[0] = Succs[1] = true;
return;
}
// Constant condition variables mean the branch can only go a single way
Succs[C->isNullValue()] = true;
return;
}
if (!isa<SwitchInst>(TI)) {
// Unknown termintor, assume all successors are feasible.
Succs.assign(Succs.size(), true);
return;
}
SwitchInst &SI = cast<SwitchInst>(TI);
LatticeVal SCValue;
if (AggressiveUndef)
SCValue = getValueState(KeyInfo::getLatticeKeyFromValue(SI.getCondition()));
else
SCValue = getExistingValueState(
KeyInfo::getLatticeKeyFromValue(SI.getCondition()));
if (SCValue == LatticeFunc->getOverdefinedVal() ||
SCValue == LatticeFunc->getUntrackedVal()) {
// All destinations are executable!
Succs.assign(TI.getNumSuccessors(), true);
return;
}
// If undefined, neither is feasible yet.
if (SCValue == LatticeFunc->getUndefVal())
return;
Constant *C = dyn_cast_or_null<Constant>(LatticeFunc->GetValueFromLatticeVal(
std::move(SCValue), SI.getCondition()->getType()));
if (!C || !isa<ConstantInt>(C)) {
// All destinations are executable!
Succs.assign(TI.getNumSuccessors(), true);
return;
}
SwitchInst::CaseHandle Case = *SI.findCaseValue(cast<ConstantInt>(C));
Succs[Case.getSuccessorIndex()] = true;
}
template <class LatticeKey, class LatticeVal, class KeyInfo>
bool SparseSolver<LatticeKey, LatticeVal, KeyInfo>::isEdgeFeasible(
BasicBlock *From, BasicBlock *To, bool AggressiveUndef) {
SmallVector<bool, 16> SuccFeasible;
Instruction *TI = From->getTerminator();
getFeasibleSuccessors(*TI, SuccFeasible, AggressiveUndef);
for (unsigned i = 0, e = TI->getNumSuccessors(); i != e; ++i)
if (TI->getSuccessor(i) == To && SuccFeasible[i])
return true;
return false;
}
template <class LatticeKey, class LatticeVal, class KeyInfo>
void SparseSolver<LatticeKey, LatticeVal, KeyInfo>::visitTerminator(
Instruction &TI) {
SmallVector<bool, 16> SuccFeasible;
getFeasibleSuccessors(TI, SuccFeasible, true);
BasicBlock *BB = TI.getParent();
// Mark all feasible successors executable...
for (unsigned i = 0, e = SuccFeasible.size(); i != e; ++i)
if (SuccFeasible[i])
markEdgeExecutable(BB, TI.getSuccessor(i));
}
template <class LatticeKey, class LatticeVal, class KeyInfo>
void SparseSolver<LatticeKey, LatticeVal, KeyInfo>::visitPHINode(PHINode &PN) {
// The lattice function may store more information on a PHINode than could be
// computed from its incoming values. For example, SSI form stores its sigma
// functions as PHINodes with a single incoming value.
if (LatticeFunc->IsSpecialCasedPHI(&PN)) {
DenseMap<LatticeKey, LatticeVal> ChangedValues;
LatticeFunc->ComputeInstructionState(PN, ChangedValues, *this);
for (auto &ChangedValue : ChangedValues)
if (ChangedValue.second != LatticeFunc->getUntrackedVal())
UpdateState(std::move(ChangedValue.first),
std::move(ChangedValue.second));
return;
}
LatticeKey Key = KeyInfo::getLatticeKeyFromValue(&PN);
LatticeVal PNIV = getValueState(Key);
LatticeVal Overdefined = LatticeFunc->getOverdefinedVal();
// If this value is already overdefined (common) just return.
if (PNIV == Overdefined || PNIV == LatticeFunc->getUntrackedVal())
return; // Quick exit
// Super-extra-high-degree PHI nodes are unlikely to ever be interesting,
// and slow us down a lot. Just mark them overdefined.
if (PN.getNumIncomingValues() > 64) {
UpdateState(Key, Overdefined);
return;
}
// Look at all of the executable operands of the PHI node. If any of them
// are overdefined, the PHI becomes overdefined as well. Otherwise, ask the
// transfer function to give us the merge of the incoming values.
for (unsigned i = 0, e = PN.getNumIncomingValues(); i != e; ++i) {
// If the edge is not yet known to be feasible, it doesn't impact the PHI.
if (!isEdgeFeasible(PN.getIncomingBlock(i), PN.getParent(), true))
continue;
// Merge in this value.
LatticeVal OpVal =
getValueState(KeyInfo::getLatticeKeyFromValue(PN.getIncomingValue(i)));
if (OpVal != PNIV)
PNIV = LatticeFunc->MergeValues(PNIV, OpVal);
if (PNIV == Overdefined)
break; // Rest of input values don't matter.
}
// Update the PHI with the compute value, which is the merge of the inputs.
UpdateState(Key, PNIV);
}
template <class LatticeKey, class LatticeVal, class KeyInfo>
void SparseSolver<LatticeKey, LatticeVal, KeyInfo>::visitInst(Instruction &I) {
// PHIs are handled by the propagation logic, they are never passed into the
// transfer functions.
if (PHINode *PN = dyn_cast<PHINode>(&I))
return visitPHINode(*PN);
// Otherwise, ask the transfer function what the result is. If this is
// something that we care about, remember it.
DenseMap<LatticeKey, LatticeVal> ChangedValues;
LatticeFunc->ComputeInstructionState(I, ChangedValues, *this);
for (auto &ChangedValue : ChangedValues)
if (ChangedValue.second != LatticeFunc->getUntrackedVal())
UpdateState(ChangedValue.first, ChangedValue.second);
if (I.isTerminator())
visitTerminator(I);
}
template <class LatticeKey, class LatticeVal, class KeyInfo>
void SparseSolver<LatticeKey, LatticeVal, KeyInfo>::Solve() {
// Process the work lists until they are empty!
while (!BBWorkList.empty() || !ValueWorkList.empty()) {
// Process the value work list.
while (!ValueWorkList.empty()) {
Value *V = ValueWorkList.pop_back_val();
LLVM_DEBUG(dbgs() << "\nPopped off V-WL: " << *V << "\n");
// "V" got into the work list because it made a transition. See if any
// users are both live and in need of updating.
for (User *U : V->users())
if (Instruction *Inst = dyn_cast<Instruction>(U))
if (BBExecutable.count(Inst->getParent())) // Inst is executable?
visitInst(*Inst);
}
// Process the basic block work list.
while (!BBWorkList.empty()) {
BasicBlock *BB = BBWorkList.pop_back_val();
LLVM_DEBUG(dbgs() << "\nPopped off BBWL: " << *BB);
// Notify all instructions in this basic block that they are newly
// executable.
for (Instruction &I : *BB)
visitInst(I);
}
}
}
template <class LatticeKey, class LatticeVal, class KeyInfo>
void SparseSolver<LatticeKey, LatticeVal, KeyInfo>::Print(
raw_ostream &OS) const {
if (ValueState.empty())
return;
LatticeKey Key;
LatticeVal LV;
OS << "ValueState:\n";
for (auto &Entry : ValueState) {
std::tie(Key, LV) = Entry;
if (LV == LatticeFunc->getUntrackedVal())
continue;
OS << "\t";
LatticeFunc->PrintLatticeVal(LV, OS);
OS << ": ";
LatticeFunc->PrintLatticeKey(Key, OS);
OS << "\n";
}
}
} // end namespace llvm
#undef DEBUG_TYPE
#endif // LLVM_ANALYSIS_SPARSEPROPAGATION_H
PK iwFZWmM�� � ! Analysis/CFLAndersAliasAnalysis.hnu �[��� //==- CFLAndersAliasAnalysis.h - Unification-based Alias Analysis -*- C++-*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This is the interface for LLVM's inclusion-based alias analysis
/// implemented with CFL graph reachability.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_CFLANDERSALIASANALYSIS_H
#define LLVM_ANALYSIS_CFLANDERSALIASANALYSIS_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Analysis/CFLAliasAnalysisUtils.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
#include <forward_list>
#include <memory>
namespace llvm {
template <typename T> class Optional;
class Function;
class MemoryLocation;
class TargetLibraryInfo;
namespace cflaa {
struct AliasSummary;
} // end namespace cflaa
class CFLAndersAAResult : public AAResultBase<CFLAndersAAResult> {
friend AAResultBase<CFLAndersAAResult>;
class FunctionInfo;
public:
explicit CFLAndersAAResult(
std::function<const TargetLibraryInfo &(Function &F)> GetTLI);
CFLAndersAAResult(CFLAndersAAResult &&RHS);
~CFLAndersAAResult();
/// Handle invalidation events from the new pass manager.
/// By definition, this result is stateless and so remains valid.
bool invalidate(Function &, const PreservedAnalyses &,
FunctionAnalysisManager::Invalidator &) {
return false;
}
/// Evict the given function from cache
void evict(const Function *Fn);
/// Get the alias summary for the given function
/// Return nullptr if the summary is not found or not available
const cflaa::AliasSummary *getAliasSummary(const Function &);
AliasResult query(const MemoryLocation &, const MemoryLocation &);
AliasResult alias(const MemoryLocation &, const MemoryLocation &,
AAQueryInfo &);
private:
/// Ensures that the given function is available in the cache.
/// Returns the appropriate entry from the cache.
const Optional<FunctionInfo> &ensureCached(const Function &);
/// Inserts the given Function into the cache.
void scan(const Function &);
/// Build summary for a given function
FunctionInfo buildInfoFrom(const Function &);
std::function<const TargetLibraryInfo &(Function &F)> GetTLI;
/// Cached mapping of Functions to their StratifiedSets.
/// If a function's sets are currently being built, it is marked
/// in the cache as an Optional without a value. This way, if we
/// have any kind of recursion, it is discernable from a function
/// that simply has empty sets.
DenseMap<const Function *, Optional<FunctionInfo>> Cache;
std::forward_list<cflaa::FunctionHandle<CFLAndersAAResult>> Handles;
};
/// Analysis pass providing a never-invalidated alias analysis result.
///
/// FIXME: We really should refactor CFL to use the analysis more heavily, and
/// in particular to leverage invalidation to trigger re-computation.
class CFLAndersAA : public AnalysisInfoMixin<CFLAndersAA> {
friend AnalysisInfoMixin<CFLAndersAA>;
static AnalysisKey Key;
public:
using Result = CFLAndersAAResult;
CFLAndersAAResult run(Function &F, FunctionAnalysisManager &AM);
};
/// Legacy wrapper pass to provide the CFLAndersAAResult object.
class CFLAndersAAWrapperPass : public ImmutablePass {
std::unique_ptr<CFLAndersAAResult> Result;
public:
static char ID;
CFLAndersAAWrapperPass();
CFLAndersAAResult &getResult() { return *Result; }
const CFLAndersAAResult &getResult() const { return *Result; }
void initializePass() override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
};
// createCFLAndersAAWrapperPass - This pass implements a set-based approach to
// alias analysis.
ImmutablePass *createCFLAndersAAWrapperPass();
} // end namespace llvm
#endif // LLVM_ANALYSIS_CFLANDERSALIASANALYSIS_H
PK iwFZU�)�Ep Ep Analysis/LoopInfoImpl.hnu �[��� //===- llvm/Analysis/LoopInfoImpl.h - Natural Loop Calculator ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This is the generic implementation of LoopInfo used for both Loops and
// MachineLoops.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_LOOPINFOIMPL_H
#define LLVM_ANALYSIS_LOOPINFOIMPL_H
#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SetOperations.h"
#include "llvm/Analysis/LoopInfo.h"
#include "llvm/IR/Dominators.h"
namespace llvm {
//===----------------------------------------------------------------------===//
// APIs for simple analysis of the loop. See header notes.
/// getExitingBlocks - Return all blocks inside the loop that have successors
/// outside of the loop. These are the blocks _inside of the current loop_
/// which branch out. The returned list is always unique.
///
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::getExitingBlocks(
SmallVectorImpl<BlockT *> &ExitingBlocks) const {
assert(!isInvalid() && "Loop not in a valid state!");
for (const auto BB : blocks())
for (auto *Succ : children<BlockT *>(BB))
if (!contains(Succ)) {
// Not in current loop? It must be an exit block.
ExitingBlocks.push_back(BB);
break;
}
}
/// getExitingBlock - If getExitingBlocks would return exactly one block,
/// return that block. Otherwise return null.
template <class BlockT, class LoopT>
BlockT *LoopBase<BlockT, LoopT>::getExitingBlock() const {
assert(!isInvalid() && "Loop not in a valid state!");
auto notInLoop = [&](BlockT *BB) { return !contains(BB); };
auto isExitBlock = [&](BlockT *BB, bool AllowRepeats) -> BlockT * {
assert(!AllowRepeats && "Unexpected parameter value.");
// Child not in current loop? It must be an exit block.
return any_of(children<BlockT *>(BB), notInLoop) ? BB : nullptr;
};
return find_singleton<BlockT>(blocks(), isExitBlock);
}
/// getExitBlocks - Return all of the successor blocks of this loop. These
/// are the blocks _outside of the current loop_ which are branched to.
///
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::getExitBlocks(
SmallVectorImpl<BlockT *> &ExitBlocks) const {
assert(!isInvalid() && "Loop not in a valid state!");
for (const auto BB : blocks())
for (auto *Succ : children<BlockT *>(BB))
if (!contains(Succ))
// Not in current loop? It must be an exit block.
ExitBlocks.push_back(Succ);
}
/// getExitBlock - If getExitBlocks would return exactly one block,
/// return that block. Otherwise return null.
template <class BlockT, class LoopT>
std::pair<BlockT *, bool> getExitBlockHelper(const LoopBase<BlockT, LoopT> *L,
bool Unique) {
assert(!L->isInvalid() && "Loop not in a valid state!");
auto notInLoop = [&](BlockT *BB,
bool AllowRepeats) -> std::pair<BlockT *, bool> {
assert(AllowRepeats == Unique && "Unexpected parameter value.");
return {!L->contains(BB) ? BB : nullptr, false};
};
auto singleExitBlock = [&](BlockT *BB,
bool AllowRepeats) -> std::pair<BlockT *, bool> {
assert(AllowRepeats == Unique && "Unexpected parameter value.");
return find_singleton_nested<BlockT>(children<BlockT *>(BB), notInLoop,
AllowRepeats);
};
return find_singleton_nested<BlockT>(L->blocks(), singleExitBlock, Unique);
}
template <class BlockT, class LoopT>
bool LoopBase<BlockT, LoopT>::hasNoExitBlocks() const {
auto RC = getExitBlockHelper(this, false);
if (RC.second)
// found multiple exit blocks
return false;
// return true if there is no exit block
return !RC.first;
}
/// getExitBlock - If getExitBlocks would return exactly one block,
/// return that block. Otherwise return null.
template <class BlockT, class LoopT>
BlockT *LoopBase<BlockT, LoopT>::getExitBlock() const {
return getExitBlockHelper(this, false).first;
}
template <class BlockT, class LoopT>
bool LoopBase<BlockT, LoopT>::hasDedicatedExits() const {
// Each predecessor of each exit block of a normal loop is contained
// within the loop.
SmallVector<BlockT *, 4> UniqueExitBlocks;
getUniqueExitBlocks(UniqueExitBlocks);
for (BlockT *EB : UniqueExitBlocks)
for (BlockT *Predecessor : children<Inverse<BlockT *>>(EB))
if (!contains(Predecessor))
return false;
// All the requirements are met.
return true;
}
// Helper function to get unique loop exits. Pred is a predicate pointing to
// BasicBlocks in a loop which should be considered to find loop exits.
template <class BlockT, class LoopT, typename PredicateT>
void getUniqueExitBlocksHelper(const LoopT *L,
SmallVectorImpl<BlockT *> &ExitBlocks,
PredicateT Pred) {
assert(!L->isInvalid() && "Loop not in a valid state!");
SmallPtrSet<BlockT *, 32> Visited;
auto Filtered = make_filter_range(L->blocks(), Pred);
for (BlockT *BB : Filtered)
for (BlockT *Successor : children<BlockT *>(BB))
if (!L->contains(Successor))
if (Visited.insert(Successor).second)
ExitBlocks.push_back(Successor);
}
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::getUniqueExitBlocks(
SmallVectorImpl<BlockT *> &ExitBlocks) const {
getUniqueExitBlocksHelper(this, ExitBlocks,
[](const BlockT *BB) { return true; });
}
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::getUniqueNonLatchExitBlocks(
SmallVectorImpl<BlockT *> &ExitBlocks) const {
const BlockT *Latch = getLoopLatch();
assert(Latch && "Latch block must exists");
getUniqueExitBlocksHelper(this, ExitBlocks,
[Latch](const BlockT *BB) { return BB != Latch; });
}
template <class BlockT, class LoopT>
BlockT *LoopBase<BlockT, LoopT>::getUniqueExitBlock() const {
return getExitBlockHelper(this, true).first;
}
/// getExitEdges - Return all pairs of (_inside_block_,_outside_block_).
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::getExitEdges(
SmallVectorImpl<Edge> &ExitEdges) const {
assert(!isInvalid() && "Loop not in a valid state!");
for (const auto BB : blocks())
for (auto *Succ : children<BlockT *>(BB))
if (!contains(Succ))
// Not in current loop? It must be an exit block.
ExitEdges.emplace_back(BB, Succ);
}
/// getLoopPreheader - If there is a preheader for this loop, return it. A
/// loop has a preheader if there is only one edge to the header of the loop
/// from outside of the loop and it is legal to hoist instructions into the
/// predecessor. If this is the case, the block branching to the header of the
/// loop is the preheader node.
///
/// This method returns null if there is no preheader for the loop.
///
template <class BlockT, class LoopT>
BlockT *LoopBase<BlockT, LoopT>::getLoopPreheader() const {
assert(!isInvalid() && "Loop not in a valid state!");
// Keep track of nodes outside the loop branching to the header...
BlockT *Out = getLoopPredecessor();
if (!Out)
return nullptr;
// Make sure we are allowed to hoist instructions into the predecessor.
if (!Out->isLegalToHoistInto())
return nullptr;
// Make sure there is only one exit out of the preheader.
typedef GraphTraits<BlockT *> BlockTraits;
typename BlockTraits::ChildIteratorType SI = BlockTraits::child_begin(Out);
++SI;
if (SI != BlockTraits::child_end(Out))
return nullptr; // Multiple exits from the block, must not be a preheader.
// The predecessor has exactly one successor, so it is a preheader.
return Out;
}
/// getLoopPredecessor - If the given loop's header has exactly one unique
/// predecessor outside the loop, return it. Otherwise return null.
/// This is less strict that the loop "preheader" concept, which requires
/// the predecessor to have exactly one successor.
///
template <class BlockT, class LoopT>
BlockT *LoopBase<BlockT, LoopT>::getLoopPredecessor() const {
assert(!isInvalid() && "Loop not in a valid state!");
// Keep track of nodes outside the loop branching to the header...
BlockT *Out = nullptr;
// Loop over the predecessors of the header node...
BlockT *Header = getHeader();
for (const auto Pred : children<Inverse<BlockT *>>(Header)) {
if (!contains(Pred)) { // If the block is not in the loop...
if (Out && Out != Pred)
return nullptr; // Multiple predecessors outside the loop
Out = Pred;
}
}
return Out;
}
/// getLoopLatch - If there is a single latch block for this loop, return it.
/// A latch block is a block that contains a branch back to the header.
template <class BlockT, class LoopT>
BlockT *LoopBase<BlockT, LoopT>::getLoopLatch() const {
assert(!isInvalid() && "Loop not in a valid state!");
BlockT *Header = getHeader();
BlockT *Latch = nullptr;
for (const auto Pred : children<Inverse<BlockT *>>(Header)) {
if (contains(Pred)) {
if (Latch)
return nullptr;
Latch = Pred;
}
}
return Latch;
}
//===----------------------------------------------------------------------===//
// APIs for updating loop information after changing the CFG
//
/// addBasicBlockToLoop - This method is used by other analyses to update loop
/// information. NewBB is set to be a new member of the current loop.
/// Because of this, it is added as a member of all parent loops, and is added
/// to the specified LoopInfo object as being in the current basic block. It
/// is not valid to replace the loop header with this method.
///
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::addBasicBlockToLoop(
BlockT *NewBB, LoopInfoBase<BlockT, LoopT> &LIB) {
assert(!isInvalid() && "Loop not in a valid state!");
#ifndef NDEBUG
if (!Blocks.empty()) {
auto SameHeader = LIB[getHeader()];
assert(contains(SameHeader) && getHeader() == SameHeader->getHeader() &&
"Incorrect LI specified for this loop!");
}
#endif
assert(NewBB && "Cannot add a null basic block to the loop!");
assert(!LIB[NewBB] && "BasicBlock already in the loop!");
LoopT *L = static_cast<LoopT *>(this);
// Add the loop mapping to the LoopInfo object...
LIB.BBMap[NewBB] = L;
// Add the basic block to this loop and all parent loops...
while (L) {
L->addBlockEntry(NewBB);
L = L->getParentLoop();
}
}
/// replaceChildLoopWith - This is used when splitting loops up. It replaces
/// the OldChild entry in our children list with NewChild, and updates the
/// parent pointer of OldChild to be null and the NewChild to be this loop.
/// This updates the loop depth of the new child.
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::replaceChildLoopWith(LoopT *OldChild,
LoopT *NewChild) {
assert(!isInvalid() && "Loop not in a valid state!");
assert(OldChild->ParentLoop == this && "This loop is already broken!");
assert(!NewChild->ParentLoop && "NewChild already has a parent!");
typename std::vector<LoopT *>::iterator I = find(SubLoops, OldChild);
assert(I != SubLoops.end() && "OldChild not in loop!");
*I = NewChild;
OldChild->ParentLoop = nullptr;
NewChild->ParentLoop = static_cast<LoopT *>(this);
}
/// verifyLoop - Verify loop structure
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::verifyLoop() const {
assert(!isInvalid() && "Loop not in a valid state!");
#ifndef NDEBUG
assert(!Blocks.empty() && "Loop header is missing");
// Setup for using a depth-first iterator to visit every block in the loop.
SmallVector<BlockT *, 8> ExitBBs;
getExitBlocks(ExitBBs);
df_iterator_default_set<BlockT *> VisitSet;
VisitSet.insert(ExitBBs.begin(), ExitBBs.end());
// Keep track of the BBs visited.
SmallPtrSet<BlockT *, 8> VisitedBBs;
// Check the individual blocks.
for (BlockT *BB : depth_first_ext(getHeader(), VisitSet)) {
assert(std::any_of(GraphTraits<BlockT *>::child_begin(BB),
GraphTraits<BlockT *>::child_end(BB),
[&](BlockT *B) { return contains(B); }) &&
"Loop block has no in-loop successors!");
assert(std::any_of(GraphTraits<Inverse<BlockT *>>::child_begin(BB),
GraphTraits<Inverse<BlockT *>>::child_end(BB),
[&](BlockT *B) { return contains(B); }) &&
"Loop block has no in-loop predecessors!");
SmallVector<BlockT *, 2> OutsideLoopPreds;
for (BlockT *B :
llvm::make_range(GraphTraits<Inverse<BlockT *>>::child_begin(BB),
GraphTraits<Inverse<BlockT *>>::child_end(BB)))
if (!contains(B))
OutsideLoopPreds.push_back(B);
if (BB == getHeader()) {
assert(!OutsideLoopPreds.empty() && "Loop is unreachable!");
} else if (!OutsideLoopPreds.empty()) {
// A non-header loop shouldn't be reachable from outside the loop,
// though it is permitted if the predecessor is not itself actually
// reachable.
BlockT *EntryBB = &BB->getParent()->front();
for (BlockT *CB : depth_first(EntryBB))
for (unsigned i = 0, e = OutsideLoopPreds.size(); i != e; ++i)
assert(CB != OutsideLoopPreds[i] &&
"Loop has multiple entry points!");
}
assert(BB != &getHeader()->getParent()->front() &&
"Loop contains function entry block!");
VisitedBBs.insert(BB);
}
if (VisitedBBs.size() != getNumBlocks()) {
dbgs() << "The following blocks are unreachable in the loop: ";
for (auto *BB : Blocks) {
if (!VisitedBBs.count(BB)) {
dbgs() << *BB << "\n";
}
}
assert(false && "Unreachable block in loop");
}
// Check the subloops.
for (iterator I = begin(), E = end(); I != E; ++I)
// Each block in each subloop should be contained within this loop.
for (block_iterator BI = (*I)->block_begin(), BE = (*I)->block_end();
BI != BE; ++BI) {
assert(contains(*BI) &&
"Loop does not contain all the blocks of a subloop!");
}
// Check the parent loop pointer.
if (ParentLoop) {
assert(is_contained(*ParentLoop, this) &&
"Loop is not a subloop of its parent!");
}
#endif
}
/// verifyLoop - Verify loop structure of this loop and all nested loops.
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::verifyLoopNest(
DenseSet<const LoopT *> *Loops) const {
assert(!isInvalid() && "Loop not in a valid state!");
Loops->insert(static_cast<const LoopT *>(this));
// Verify this loop.
verifyLoop();
// Verify the subloops.
for (iterator I = begin(), E = end(); I != E; ++I)
(*I)->verifyLoopNest(Loops);
}
template <class BlockT, class LoopT>
void LoopBase<BlockT, LoopT>::print(raw_ostream &OS, bool Verbose,
bool PrintNested, unsigned Depth) const {
OS.indent(Depth * 2);
if (static_cast<const LoopT *>(this)->isAnnotatedParallel())
OS << "Parallel ";
OS << "Loop at depth " << getLoopDepth() << " containing: ";
BlockT *H = getHeader();
for (unsigned i = 0; i < getBlocks().size(); ++i) {
BlockT *BB = getBlocks()[i];
if (!Verbose) {
if (i)
OS << ",";
BB->printAsOperand(OS, false);
} else
OS << "\n";
if (BB == H)
OS << "<header>";
if (isLoopLatch(BB))
OS << "<latch>";
if (isLoopExiting(BB))
OS << "<exiting>";
if (Verbose)
BB->print(OS);
}
if (PrintNested) {
OS << "\n";
for (iterator I = begin(), E = end(); I != E; ++I)
(*I)->print(OS, /*Verbose*/ false, PrintNested, Depth + 2);
}
}
//===----------------------------------------------------------------------===//
/// Stable LoopInfo Analysis - Build a loop tree using stable iterators so the
/// result does / not depend on use list (block predecessor) order.
///
/// Discover a subloop with the specified backedges such that: All blocks within
/// this loop are mapped to this loop or a subloop. And all subloops within this
/// loop have their parent loop set to this loop or a subloop.
template <class BlockT, class LoopT>
static void discoverAndMapSubloop(LoopT *L, ArrayRef<BlockT *> Backedges,
LoopInfoBase<BlockT, LoopT> *LI,
const DomTreeBase<BlockT> &DomTree) {
typedef GraphTraits<Inverse<BlockT *>> InvBlockTraits;
unsigned NumBlocks = 0;
unsigned NumSubloops = 0;
// Perform a backward CFG traversal using a worklist.
std::vector<BlockT *> ReverseCFGWorklist(Backedges.begin(), Backedges.end());
while (!ReverseCFGWorklist.empty()) {
BlockT *PredBB = ReverseCFGWorklist.back();
ReverseCFGWorklist.pop_back();
LoopT *Subloop = LI->getLoopFor(PredBB);
if (!Subloop) {
if (!DomTree.isReachableFromEntry(PredBB))
continue;
// This is an undiscovered block. Map it to the current loop.
LI->changeLoopFor(PredBB, L);
++NumBlocks;
if (PredBB == L->getHeader())
continue;
// Push all block predecessors on the worklist.
ReverseCFGWorklist.insert(ReverseCFGWorklist.end(),
InvBlockTraits::child_begin(PredBB),
InvBlockTraits::child_end(PredBB));
} else {
// This is a discovered block. Find its outermost discovered loop.
Subloop = Subloop->getOutermostLoop();
// If it is already discovered to be a subloop of this loop, continue.
if (Subloop == L)
continue;
// Discover a subloop of this loop.
Subloop->setParentLoop(L);
++NumSubloops;
NumBlocks += Subloop->getBlocksVector().capacity();
PredBB = Subloop->getHeader();
// Continue traversal along predecessors that are not loop-back edges from
// within this subloop tree itself. Note that a predecessor may directly
// reach another subloop that is not yet discovered to be a subloop of
// this loop, which we must traverse.
for (const auto Pred : children<Inverse<BlockT *>>(PredBB)) {
if (LI->getLoopFor(Pred) != Subloop)
ReverseCFGWorklist.push_back(Pred);
}
}
}
L->getSubLoopsVector().reserve(NumSubloops);
L->reserveBlocks(NumBlocks);
}
/// Populate all loop data in a stable order during a single forward DFS.
template <class BlockT, class LoopT> class PopulateLoopsDFS {
typedef GraphTraits<BlockT *> BlockTraits;
typedef typename BlockTraits::ChildIteratorType SuccIterTy;
LoopInfoBase<BlockT, LoopT> *LI;
public:
PopulateLoopsDFS(LoopInfoBase<BlockT, LoopT> *li) : LI(li) {}
void traverse(BlockT *EntryBlock);
protected:
void insertIntoLoop(BlockT *Block);
};
/// Top-level driver for the forward DFS within the loop.
template <class BlockT, class LoopT>
void PopulateLoopsDFS<BlockT, LoopT>::traverse(BlockT *EntryBlock) {
for (BlockT *BB : post_order(EntryBlock))
insertIntoLoop(BB);
}
/// Add a single Block to its ancestor loops in PostOrder. If the block is a
/// subloop header, add the subloop to its parent in PostOrder, then reverse the
/// Block and Subloop vectors of the now complete subloop to achieve RPO.
template <class BlockT, class LoopT>
void PopulateLoopsDFS<BlockT, LoopT>::insertIntoLoop(BlockT *Block) {
LoopT *Subloop = LI->getLoopFor(Block);
if (Subloop && Block == Subloop->getHeader()) {
// We reach this point once per subloop after processing all the blocks in
// the subloop.
if (!Subloop->isOutermost())
Subloop->getParentLoop()->getSubLoopsVector().push_back(Subloop);
else
LI->addTopLevelLoop(Subloop);
// For convenience, Blocks and Subloops are inserted in postorder. Reverse
// the lists, except for the loop header, which is always at the beginning.
Subloop->reverseBlock(1);
std::reverse(Subloop->getSubLoopsVector().begin(),
Subloop->getSubLoopsVector().end());
Subloop = Subloop->getParentLoop();
}
for (; Subloop; Subloop = Subloop->getParentLoop())
Subloop->addBlockEntry(Block);
}
/// Analyze LoopInfo discovers loops during a postorder DominatorTree traversal
/// interleaved with backward CFG traversals within each subloop
/// (discoverAndMapSubloop). The backward traversal skips inner subloops, so
/// this part of the algorithm is linear in the number of CFG edges. Subloop and
/// Block vectors are then populated during a single forward CFG traversal
/// (PopulateLoopDFS).
///
/// During the two CFG traversals each block is seen three times:
/// 1) Discovered and mapped by a reverse CFG traversal.
/// 2) Visited during a forward DFS CFG traversal.
/// 3) Reverse-inserted in the loop in postorder following forward DFS.
///
/// The Block vectors are inclusive, so step 3 requires loop-depth number of
/// insertions per block.
template <class BlockT, class LoopT>
void LoopInfoBase<BlockT, LoopT>::analyze(const DomTreeBase<BlockT> &DomTree) {
// Postorder traversal of the dominator tree.
const DomTreeNodeBase<BlockT> *DomRoot = DomTree.getRootNode();
for (auto DomNode : post_order(DomRoot)) {
BlockT *Header = DomNode->getBlock();
SmallVector<BlockT *, 4> Backedges;
// Check each predecessor of the potential loop header.
for (const auto Backedge : children<Inverse<BlockT *>>(Header)) {
// If Header dominates predBB, this is a new loop. Collect the backedges.
if (DomTree.dominates(Header, Backedge) &&
DomTree.isReachableFromEntry(Backedge)) {
Backedges.push_back(Backedge);
}
}
// Perform a backward CFG traversal to discover and map blocks in this loop.
if (!Backedges.empty()) {
LoopT *L = AllocateLoop(Header);
discoverAndMapSubloop(L, ArrayRef<BlockT *>(Backedges), this, DomTree);
}
}
// Perform a single forward CFG traversal to populate block and subloop
// vectors for all loops.
PopulateLoopsDFS<BlockT, LoopT> DFS(this);
DFS.traverse(DomRoot->getBlock());
}
template <class BlockT, class LoopT>
SmallVector<LoopT *, 4>
LoopInfoBase<BlockT, LoopT>::getLoopsInPreorder() const {
SmallVector<LoopT *, 4> PreOrderLoops, PreOrderWorklist;
// The outer-most loop actually goes into the result in the same relative
// order as we walk it. But LoopInfo stores the top level loops in reverse
// program order so for here we reverse it to get forward program order.
// FIXME: If we change the order of LoopInfo we will want to remove the
// reverse here.
for (LoopT *RootL : reverse(*this)) {
auto PreOrderLoopsInRootL = RootL->getLoopsInPreorder();
PreOrderLoops.append(PreOrderLoopsInRootL.begin(),
PreOrderLoopsInRootL.end());
}
return PreOrderLoops;
}
template <class BlockT, class LoopT>
SmallVector<LoopT *, 4>
LoopInfoBase<BlockT, LoopT>::getLoopsInReverseSiblingPreorder() const {
SmallVector<LoopT *, 4> PreOrderLoops, PreOrderWorklist;
// The outer-most loop actually goes into the result in the same relative
// order as we walk it. LoopInfo stores the top level loops in reverse
// program order so we walk in order here.
// FIXME: If we change the order of LoopInfo we will want to add a reverse
// here.
for (LoopT *RootL : *this) {
assert(PreOrderWorklist.empty() &&
"Must start with an empty preorder walk worklist.");
PreOrderWorklist.push_back(RootL);
do {
LoopT *L = PreOrderWorklist.pop_back_val();
// Sub-loops are stored in forward program order, but will process the
// worklist backwards so we can just append them in order.
PreOrderWorklist.append(L->begin(), L->end());
PreOrderLoops.push_back(L);
} while (!PreOrderWorklist.empty());
}
return PreOrderLoops;
}
// Debugging
template <class BlockT, class LoopT>
void LoopInfoBase<BlockT, LoopT>::print(raw_ostream &OS) const {
for (unsigned i = 0; i < TopLevelLoops.size(); ++i)
TopLevelLoops[i]->print(OS);
#if 0
for (DenseMap<BasicBlock*, LoopT*>::const_iterator I = BBMap.begin(),
E = BBMap.end(); I != E; ++I)
OS << "BB '" << I->first->getName() << "' level = "
<< I->second->getLoopDepth() << "\n";
#endif
}
template <typename T>
bool compareVectors(std::vector<T> &BB1, std::vector<T> &BB2) {
llvm::sort(BB1);
llvm::sort(BB2);
return BB1 == BB2;
}
template <class BlockT, class LoopT>
void addInnerLoopsToHeadersMap(DenseMap<BlockT *, const LoopT *> &LoopHeaders,
const LoopInfoBase<BlockT, LoopT> &LI,
const LoopT &L) {
LoopHeaders[L.getHeader()] = &L;
for (LoopT *SL : L)
addInnerLoopsToHeadersMap(LoopHeaders, LI, *SL);
}
#ifndef NDEBUG
template <class BlockT, class LoopT>
static void compareLoops(const LoopT *L, const LoopT *OtherL,
DenseMap<BlockT *, const LoopT *> &OtherLoopHeaders) {
BlockT *H = L->getHeader();
BlockT *OtherH = OtherL->getHeader();
assert(H == OtherH &&
"Mismatched headers even though found in the same map entry!");
assert(L->getLoopDepth() == OtherL->getLoopDepth() &&
"Mismatched loop depth!");
const LoopT *ParentL = L, *OtherParentL = OtherL;
do {
assert(ParentL->getHeader() == OtherParentL->getHeader() &&
"Mismatched parent loop headers!");
ParentL = ParentL->getParentLoop();
OtherParentL = OtherParentL->getParentLoop();
} while (ParentL);
for (const LoopT *SubL : *L) {
BlockT *SubH = SubL->getHeader();
const LoopT *OtherSubL = OtherLoopHeaders.lookup(SubH);
assert(OtherSubL && "Inner loop is missing in computed loop info!");
OtherLoopHeaders.erase(SubH);
compareLoops(SubL, OtherSubL, OtherLoopHeaders);
}
std::vector<BlockT *> BBs = L->getBlocks();
std::vector<BlockT *> OtherBBs = OtherL->getBlocks();
assert(compareVectors(BBs, OtherBBs) &&
"Mismatched basic blocks in the loops!");
const SmallPtrSetImpl<const BlockT *> &BlocksSet = L->getBlocksSet();
const SmallPtrSetImpl<const BlockT *> &OtherBlocksSet =
OtherL->getBlocksSet();
assert(BlocksSet.size() == OtherBlocksSet.size() &&
llvm::set_is_subset(BlocksSet, OtherBlocksSet) &&
"Mismatched basic blocks in BlocksSets!");
}
#endif
template <class BlockT, class LoopT>
void LoopInfoBase<BlockT, LoopT>::verify(
const DomTreeBase<BlockT> &DomTree) const {
DenseSet<const LoopT *> Loops;
for (iterator I = begin(), E = end(); I != E; ++I) {
assert((*I)->isOutermost() && "Top-level loop has a parent!");
(*I)->verifyLoopNest(&Loops);
}
// Verify that blocks are mapped to valid loops.
#ifndef NDEBUG
for (auto &Entry : BBMap) {
const BlockT *BB = Entry.first;
LoopT *L = Entry.second;
assert(Loops.count(L) && "orphaned loop");
assert(L->contains(BB) && "orphaned block");
for (LoopT *ChildLoop : *L)
assert(!ChildLoop->contains(BB) &&
"BBMap should point to the innermost loop containing BB");
}
// Recompute LoopInfo to verify loops structure.
LoopInfoBase<BlockT, LoopT> OtherLI;
OtherLI.analyze(DomTree);
// Build a map we can use to move from our LI to the computed one. This
// allows us to ignore the particular order in any layer of the loop forest
// while still comparing the structure.
DenseMap<BlockT *, const LoopT *> OtherLoopHeaders;
for (LoopT *L : OtherLI)
addInnerLoopsToHeadersMap(OtherLoopHeaders, OtherLI, *L);
// Walk the top level loops and ensure there is a corresponding top-level
// loop in the computed version and then recursively compare those loop
// nests.
for (LoopT *L : *this) {
BlockT *Header = L->getHeader();
const LoopT *OtherL = OtherLoopHeaders.lookup(Header);
assert(OtherL && "Top level loop is missing in computed loop info!");
// Now that we've matched this loop, erase its header from the map.
OtherLoopHeaders.erase(Header);
// And recursively compare these loops.
compareLoops(L, OtherL, OtherLoopHeaders);
}
// Any remaining entries in the map are loops which were found when computing
// a fresh LoopInfo but not present in the current one.
if (!OtherLoopHeaders.empty()) {
for (const auto &HeaderAndLoop : OtherLoopHeaders)
dbgs() << "Found new loop: " << *HeaderAndLoop.second << "\n";
llvm_unreachable("Found new loops when recomputing LoopInfo!");
}
#endif
}
} // End llvm namespace
#endif
PK iwFZՁ� � ! Analysis/InlineModelFeatureMaps.hnu �[��� //===- InlineModelFeatureMaps.h - common model runner defs ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
#ifndef LLVM_ANALYSIS_INLINEMODELFEATUREMAPS_H
#define LLVM_ANALYSIS_INLINEMODELFEATUREMAPS_H
#include "llvm/Analysis/TensorSpec.h"
#include <array>
#include <string>
#include <vector>
namespace llvm {
// List of cost features. A "cost" feature is a summand of the heuristic-based
// inline cost, and we define them separately to preserve the original heuristic
// behavior.
#define INLINE_COST_FEATURE_ITERATOR(M) \
M(int64_t, {1}, sroa_savings, \
"Savings from SROA (scalar replacement of aggregates)") \
M(int64_t, {1}, sroa_losses, \
"Losses from SROA (scalar replacement of aggregates)") \
M(int64_t, {1}, load_elimination, "Cost of load elimination in the call") \
M(int64_t, {1}, call_penalty, \
"Accumulation of penalty applied to call sites when inlining") \
M(int64_t, {1}, call_argument_setup, \
"Accumulation of call argument setup costs") \
M(int64_t, {1}, load_relative_intrinsic, \
"Accumulation of costs of loading relative intrinsics") \
M(int64_t, {1}, lowered_call_arg_setup, \
"Accumulation of cost of lowered call argument setups") \
M(int64_t, {1}, indirect_call_penalty, \
"Accumulation of costs for indirect calls") \
M(int64_t, {1}, jump_table_penalty, "Accumulation of costs for jump tables") \
M(int64_t, {1}, case_cluster_penalty, \
"Accumulation of costs for case clusters") \
M(int64_t, {1}, switch_penalty, \
"Accumulation of costs for switch statements") \
M(int64_t, {1}, unsimplified_common_instructions, \
"Costs from unsimplified common instructions") \
M(int64_t, {1}, num_loops, "Number of loops in the caller") \
M(int64_t, {1}, dead_blocks, "Number of dead blocks in the caller") \
M(int64_t, {1}, simplified_instructions, \
"Number of simplified instructions") \
M(int64_t, {1}, constant_args, \
"Number of constant arguments in the call site") \
M(int64_t, {1}, constant_offset_ptr_args, \
"Number of constant offset pointer args in the call site") \
M(int64_t, {1}, callsite_cost, "Estimated cost of the call site") \
M(int64_t, {1}, cold_cc_penalty, "Penalty for a cold calling convention") \
M(int64_t, {1}, last_call_to_static_bonus, \
"Bonus for being the last call to static") \
M(int64_t, {1}, is_multiple_blocks, \
"Boolean; is the Callee multiple blocks") \
M(int64_t, {1}, nested_inlines, \
"Would the default inliner perfom nested inlining") \
M(int64_t, {1}, nested_inline_cost_estimate, \
"Estimate of the accumulated cost of nested inlines") \
M(int64_t, {1}, threshold, "Threshold for the heuristic inliner")
// clang-format off
enum class InlineCostFeatureIndex : size_t {
#define POPULATE_INDICES(DTYPE, SHAPE, NAME, DOC) NAME,
INLINE_COST_FEATURE_ITERATOR(POPULATE_INDICES)
#undef POPULATE_INDICES
NumberOfFeatures
};
// clang-format on
using InlineCostFeatures =
std::array<int,
static_cast<size_t>(InlineCostFeatureIndex::NumberOfFeatures)>;
constexpr bool isHeuristicInlineCostFeature(InlineCostFeatureIndex Feature) {
return Feature != InlineCostFeatureIndex::sroa_savings &&
Feature != InlineCostFeatureIndex::is_multiple_blocks &&
Feature != InlineCostFeatureIndex::dead_blocks &&
Feature != InlineCostFeatureIndex::simplified_instructions &&
Feature != InlineCostFeatureIndex::constant_args &&
Feature != InlineCostFeatureIndex::constant_offset_ptr_args &&
Feature != InlineCostFeatureIndex::nested_inlines &&
Feature != InlineCostFeatureIndex::nested_inline_cost_estimate &&
Feature != InlineCostFeatureIndex::threshold;
}
// List of features. Each feature is defined through a triple:
// - the name of an enum member, which will be the feature index
// - a textual name, used for Tensorflow model binding (so it needs to match the
// names used by the Tensorflow model)
// - a documentation description. Currently, that is not used anywhere
// programmatically, and serves as workaround to inability of inserting comments
// in macros.
#define INLINE_FEATURE_ITERATOR(M) \
M(int64_t, {1}, callee_basic_block_count, \
"number of basic blocks of the callee") \
M(int64_t, {1}, callsite_height, \
"position of the call site in the original call graph - measured from " \
"the farthest SCC") \
M(int64_t, {1}, node_count, \
"total current number of defined functions in the module") \
M(int64_t, {1}, nr_ctant_params, \
"number of parameters in the call site that are constants") \
M(int64_t, {1}, cost_estimate, "total cost estimate (threshold - free)") \
M(int64_t, {1}, edge_count, "total number of calls in the module") \
M(int64_t, {1}, caller_users, \
"number of module-internal users of the caller, +1 if the caller is " \
"exposed externally") \
M(int64_t, {1}, caller_conditionally_executed_blocks, \
"number of blocks reached from a conditional instruction, in the caller") \
M(int64_t, {1}, caller_basic_block_count, \
"number of basic blocks in the caller") \
M(int64_t, {1}, callee_conditionally_executed_blocks, \
"number of blocks reached from a conditional instruction, in the callee") \
M(int64_t, {1}, callee_users, \
"number of module-internal users of the callee, +1 if the callee is " \
"exposed externally")
// clang-format off
enum class FeatureIndex : size_t {
#define POPULATE_INDICES(DTYPE, SHAPE, NAME, COMMENT) NAME,
// InlineCost features - these must come first
INLINE_COST_FEATURE_ITERATOR(POPULATE_INDICES)
// Non-cost features
INLINE_FEATURE_ITERATOR(POPULATE_INDICES)
#undef POPULATE_INDICES
NumberOfFeatures
};
// clang-format on
constexpr FeatureIndex
inlineCostFeatureToMlFeature(InlineCostFeatureIndex Feature) {
return static_cast<FeatureIndex>(static_cast<size_t>(Feature));
}
constexpr size_t NumberOfFeatures =
static_cast<size_t>(FeatureIndex::NumberOfFeatures);
extern const std::vector<TensorSpec> FeatureMap;
extern const char *const DecisionName;
extern const TensorSpec InlineDecisionSpec;
extern const char *const DefaultDecisionName;
extern const TensorSpec DefaultDecisionSpec;
extern const char *const RewardName;
using InlineFeatures = std::vector<int64_t>;
} // namespace llvm
#endif // LLVM_ANALYSIS_INLINEMODELFEATUREMAPS_H
PK iwFZ�N�:� � Analysis/ValueLatticeUtils.hnu �[��� //===-- ValueLatticeUtils.h - Utils for solving lattices --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares common functions useful for performing data-flow analyses
// that propagate values across function boundaries.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_VALUELATTICEUTILS_H
#define LLVM_ANALYSIS_VALUELATTICEUTILS_H
namespace llvm {
class Function;
class GlobalVariable;
/// Determine if the values of the given function's arguments can be tracked
/// interprocedurally. The value of an argument can be tracked if the function
/// has local linkage and its address is not taken.
bool canTrackArgumentsInterprocedurally(Function *F);
/// Determine if the values of the given function's returns can be tracked
/// interprocedurally. Return values can be tracked if the function has an
/// exact definition and it doesn't have the "naked" attribute. Naked functions
/// may contain assembly code that returns untrackable values.
bool canTrackReturnsInterprocedurally(Function *F);
/// Determine if the value maintained in the given global variable can be
/// tracked interprocedurally. A value can be tracked if the global variable
/// has local linkage and is only used by non-volatile loads and stores.
bool canTrackGlobalVariableInterprocedurally(GlobalVariable *GV);
} // end namespace llvm
#endif // LLVM_ANALYSIS_VALUELATTICEUTILS_H
PK iwFZF�5�X& X& Analysis/ObjCARCAnalysisUtils.hnu �[��� //===- ObjCARCAnalysisUtils.h - ObjC ARC Analysis Utilities -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This file defines common analysis utilities used by the ObjC ARC Optimizer.
/// ARC stands for Automatic Reference Counting and is a system for managing
/// reference counts for objects in Objective C.
///
/// WARNING: This file knows about certain library functions. It recognizes them
/// by name, and hardwires knowledge of their semantics.
///
/// WARNING: This file knows about how certain Objective-C library functions are
/// used. Naive LLVM IR transformations which would otherwise be
/// behavior-preserving may break these assumptions.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_OBJCARCANALYSISUTILS_H
#define LLVM_ANALYSIS_OBJCARCANALYSISUTILS_H
#include "llvm/Analysis/ObjCARCInstKind.h"
#include "llvm/Analysis/ValueTracking.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/Module.h"
#include "llvm/IR/ValueHandle.h"
#include <optional>
namespace llvm {
class AAResults;
namespace objcarc {
/// A handy option to enable/disable all ARC Optimizations.
extern bool EnableARCOpts;
/// Test if the given module looks interesting to run ARC optimization
/// on.
inline bool ModuleHasARC(const Module &M) {
return
M.getNamedValue("llvm.objc.retain") ||
M.getNamedValue("llvm.objc.release") ||
M.getNamedValue("llvm.objc.autorelease") ||
M.getNamedValue("llvm.objc.retainAutoreleasedReturnValue") ||
M.getNamedValue("llvm.objc.unsafeClaimAutoreleasedReturnValue") ||
M.getNamedValue("llvm.objc.retainBlock") ||
M.getNamedValue("llvm.objc.autoreleaseReturnValue") ||
M.getNamedValue("llvm.objc.autoreleasePoolPush") ||
M.getNamedValue("llvm.objc.loadWeakRetained") ||
M.getNamedValue("llvm.objc.loadWeak") ||
M.getNamedValue("llvm.objc.destroyWeak") ||
M.getNamedValue("llvm.objc.storeWeak") ||
M.getNamedValue("llvm.objc.initWeak") ||
M.getNamedValue("llvm.objc.moveWeak") ||
M.getNamedValue("llvm.objc.copyWeak") ||
M.getNamedValue("llvm.objc.retainedObject") ||
M.getNamedValue("llvm.objc.unretainedObject") ||
M.getNamedValue("llvm.objc.unretainedPointer") ||
M.getNamedValue("llvm.objc.clang.arc.use");
}
/// This is a wrapper around getUnderlyingObject which also knows how to
/// look through objc_retain and objc_autorelease calls, which we know to return
/// their argument verbatim.
inline const Value *GetUnderlyingObjCPtr(const Value *V) {
for (;;) {
V = getUnderlyingObject(V);
if (!IsForwarding(GetBasicARCInstKind(V)))
break;
V = cast<CallInst>(V)->getArgOperand(0);
}
return V;
}
/// A wrapper for GetUnderlyingObjCPtr used for results memoization.
inline const Value *GetUnderlyingObjCPtrCached(
const Value *V,
DenseMap<const Value *, std::pair<WeakVH, WeakTrackingVH>> &Cache) {
// The entry is invalid if either value handle is null.
auto InCache = Cache.lookup(V);
if (InCache.first && InCache.second)
return InCache.second;
const Value *Computed = GetUnderlyingObjCPtr(V);
Cache[V] =
std::make_pair(const_cast<Value *>(V), const_cast<Value *>(Computed));
return Computed;
}
/// The RCIdentity root of a value \p V is a dominating value U for which
/// retaining or releasing U is equivalent to retaining or releasing V. In other
/// words, ARC operations on \p V are equivalent to ARC operations on \p U.
///
/// We use this in the ARC optimizer to make it easier to match up ARC
/// operations by always mapping ARC operations to RCIdentityRoots instead of
/// pointers themselves.
///
/// The two ways that we see RCIdentical values in ObjC are via:
///
/// 1. PointerCasts
/// 2. Forwarding Calls that return their argument verbatim.
///
/// Thus this function strips off pointer casts and forwarding calls. *NOTE*
/// This implies that two RCIdentical values must alias.
inline const Value *GetRCIdentityRoot(const Value *V) {
for (;;) {
V = V->stripPointerCasts();
if (!IsForwarding(GetBasicARCInstKind(V)))
break;
V = cast<CallInst>(V)->getArgOperand(0);
}
return V;
}
/// Helper which calls const Value *GetRCIdentityRoot(const Value *V) and just
/// casts away the const of the result. For documentation about what an
/// RCIdentityRoot (and by extension GetRCIdentityRoot is) look at that
/// function.
inline Value *GetRCIdentityRoot(Value *V) {
return const_cast<Value *>(GetRCIdentityRoot((const Value *)V));
}
/// Assuming the given instruction is one of the special calls such as
/// objc_retain or objc_release, return the RCIdentity root of the argument of
/// the call.
inline Value *GetArgRCIdentityRoot(Value *Inst) {
return GetRCIdentityRoot(cast<CallInst>(Inst)->getArgOperand(0));
}
inline bool IsNullOrUndef(const Value *V) {
return isa<ConstantPointerNull>(V) || isa<UndefValue>(V);
}
inline bool IsNoopInstruction(const Instruction *I) {
return isa<BitCastInst>(I) ||
(isa<GetElementPtrInst>(I) &&
cast<GetElementPtrInst>(I)->hasAllZeroIndices());
}
/// Test whether the given value is possible a retainable object pointer.
inline bool IsPotentialRetainableObjPtr(const Value *Op) {
// Pointers to static or stack storage are not valid retainable object
// pointers.
if (isa<Constant>(Op) || isa<AllocaInst>(Op))
return false;
// Special arguments can not be a valid retainable object pointer.
if (const Argument *Arg = dyn_cast<Argument>(Op))
if (Arg->hasPassPointeeByValueCopyAttr() || Arg->hasNestAttr() ||
Arg->hasStructRetAttr())
return false;
// Only consider values with pointer types.
//
// It seemes intuitive to exclude function pointer types as well, since
// functions are never retainable object pointers, however clang occasionally
// bitcasts retainable object pointers to function-pointer type temporarily.
PointerType *Ty = dyn_cast<PointerType>(Op->getType());
if (!Ty)
return false;
// Conservatively assume anything else is a potential retainable object
// pointer.
return true;
}
bool IsPotentialRetainableObjPtr(const Value *Op, AAResults &AA);
/// Helper for GetARCInstKind. Determines what kind of construct CS
/// is.
inline ARCInstKind GetCallSiteClass(const CallBase &CB) {
for (const Use &U : CB.args())
if (IsPotentialRetainableObjPtr(U))
return CB.onlyReadsMemory() ? ARCInstKind::User : ARCInstKind::CallOrUser;
return CB.onlyReadsMemory() ? ARCInstKind::None : ARCInstKind::Call;
}
/// Return true if this value refers to a distinct and identifiable
/// object.
///
/// This is similar to AliasAnalysis's isIdentifiedObject, except that it uses
/// special knowledge of ObjC conventions.
inline bool IsObjCIdentifiedObject(const Value *V) {
// Assume that call results and arguments have their own "provenance".
// Constants (including GlobalVariables) and Allocas are never
// reference-counted.
if (isa<CallInst>(V) || isa<InvokeInst>(V) ||
isa<Argument>(V) || isa<Constant>(V) ||
isa<AllocaInst>(V))
return true;
if (const LoadInst *LI = dyn_cast<LoadInst>(V)) {
const Value *Pointer =
GetRCIdentityRoot(LI->getPointerOperand());
if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(Pointer)) {
// A constant pointer can't be pointing to an object on the heap. It may
// be reference-counted, but it won't be deleted.
if (GV->isConstant())
return true;
StringRef Name = GV->getName();
// These special variables are known to hold values which are not
// reference-counted pointers.
if (Name.startswith("\01l_objc_msgSend_fixup_"))
return true;
StringRef Section = GV->getSection();
if (Section.contains("__message_refs") ||
Section.contains("__objc_classrefs") ||
Section.contains("__objc_superrefs") ||
Section.contains("__objc_methname") || Section.contains("__cstring"))
return true;
}
}
return false;
}
enum class ARCMDKindID {
ImpreciseRelease,
CopyOnEscape,
NoObjCARCExceptions,
};
/// A cache of MDKinds used by various ARC optimizations.
class ARCMDKindCache {
Module *M;
/// The Metadata Kind for clang.imprecise_release metadata.
std::optional<unsigned> ImpreciseReleaseMDKind;
/// The Metadata Kind for clang.arc.copy_on_escape metadata.
std::optional<unsigned> CopyOnEscapeMDKind;
/// The Metadata Kind for clang.arc.no_objc_arc_exceptions metadata.
std::optional<unsigned> NoObjCARCExceptionsMDKind;
public:
void init(Module *Mod) {
M = Mod;
ImpreciseReleaseMDKind = std::nullopt;
CopyOnEscapeMDKind = std::nullopt;
NoObjCARCExceptionsMDKind = std::nullopt;
}
unsigned get(ARCMDKindID ID) {
switch (ID) {
case ARCMDKindID::ImpreciseRelease:
if (!ImpreciseReleaseMDKind)
ImpreciseReleaseMDKind =
M->getContext().getMDKindID("clang.imprecise_release");
return *ImpreciseReleaseMDKind;
case ARCMDKindID::CopyOnEscape:
if (!CopyOnEscapeMDKind)
CopyOnEscapeMDKind =
M->getContext().getMDKindID("clang.arc.copy_on_escape");
return *CopyOnEscapeMDKind;
case ARCMDKindID::NoObjCARCExceptions:
if (!NoObjCARCExceptionsMDKind)
NoObjCARCExceptionsMDKind =
M->getContext().getMDKindID("clang.arc.no_objc_arc_exceptions");
return *NoObjCARCExceptionsMDKind;
}
llvm_unreachable("Covered switch isn't covered?!");
}
};
} // end namespace objcarc
} // end namespace llvm
#endif
PK iwFZ��� � Analysis/IndirectCallVisitor.hnu �[��� //===-- IndirectCallVisitor.h - indirect call visitor ---------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements defines a visitor class and a helper function that find
// all indirect call-sites in a function.
#ifndef LLVM_ANALYSIS_INDIRECTCALLVISITOR_H
#define LLVM_ANALYSIS_INDIRECTCALLVISITOR_H
#include "llvm/IR/InstVisitor.h"
#include <vector>
namespace llvm {
// Visitor class that finds all indirect call.
struct PGOIndirectCallVisitor : public InstVisitor<PGOIndirectCallVisitor> {
std::vector<CallBase *> IndirectCalls;
PGOIndirectCallVisitor() = default;
void visitCallBase(CallBase &Call) {
if (Call.isIndirectCall())
IndirectCalls.push_back(&Call);
}
};
// Helper function that finds all indirect call sites.
inline std::vector<CallBase *> findIndirectCalls(Function &F) {
PGOIndirectCallVisitor ICV;
ICV.visit(F);
return ICV.IndirectCalls;
}
} // namespace llvm
#endif
PK iwFZ���� � Analysis/CFGSCCPrinter.hnu �[��� //===-- CFGSCCPrinter.h ---------------------------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_CFGSCCPRINTER_H
#define LLVM_ANALYSIS_CFGSCCPRINTER_H
#include "llvm/IR/PassManager.h"
namespace llvm {
class CFGSCCPrinterPass : public PassInfoMixin<CFGSCCPrinterPass> {
raw_ostream &OS;
public:
explicit CFGSCCPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
} // namespace llvm
#endif
PK iwFZ:?oё= �= Analysis/InstructionSimplify.hnu �[��� //===-- InstructionSimplify.h - Fold instrs into simpler forms --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares routines for folding instructions into simpler forms
// that do not require creating new instructions. This does constant folding
// ("add i32 1, 1" -> "2") but can also handle non-constant operands, either
// returning a constant ("and i32 %x, 0" -> "0") or an already existing value
// ("and i32 %x, %x" -> "%x"). If the simplification is also an instruction
// then it dominates the original instruction.
//
// These routines implicitly resolve undef uses. The easiest way to be safe when
// using these routines to obtain simplified values for existing instructions is
// to always replace all uses of the instructions with the resulting simplified
// values. This will prevent other code from seeing the same undef uses and
// resolving them to different values.
//
// They require that all the IR that they encounter be valid and inserted into a
// parent function.
//
// Additionally, these routines can't simplify to the instructions that are not
// def-reachable, meaning we can't just scan the basic block for instructions
// to simplify to.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_INSTRUCTIONSIMPLIFY_H
#define LLVM_ANALYSIS_INSTRUCTIONSIMPLIFY_H
#include "llvm/IR/PatternMatch.h"
namespace llvm {
template <typename T, typename... TArgs> class AnalysisManager;
template <class T> class ArrayRef;
class AssumptionCache;
class BinaryOperator;
class CallBase;
class DataLayout;
class DominatorTree;
class Function;
class Instruction;
struct LoopStandardAnalysisResults;
class MDNode;
class Pass;
template <class T, unsigned n> class SmallSetVector;
class TargetLibraryInfo;
class Type;
class Value;
/// InstrInfoQuery provides an interface to query additional information for
/// instructions like metadata or keywords like nsw, which provides conservative
/// results if the users specified it is safe to use.
struct InstrInfoQuery {
InstrInfoQuery(bool UMD) : UseInstrInfo(UMD) {}
InstrInfoQuery() = default;
bool UseInstrInfo = true;
MDNode *getMetadata(const Instruction *I, unsigned KindID) const {
if (UseInstrInfo)
return I->getMetadata(KindID);
return nullptr;
}
template <class InstT> bool hasNoUnsignedWrap(const InstT *Op) const {
if (UseInstrInfo)
return Op->hasNoUnsignedWrap();
return false;
}
template <class InstT> bool hasNoSignedWrap(const InstT *Op) const {
if (UseInstrInfo)
return Op->hasNoSignedWrap();
return false;
}
bool isExact(const BinaryOperator *Op) const {
if (UseInstrInfo && isa<PossiblyExactOperator>(Op))
return cast<PossiblyExactOperator>(Op)->isExact();
return false;
}
template <class InstT> bool hasNoSignedZeros(const InstT *Op) const {
if (UseInstrInfo)
return Op->hasNoSignedZeros();
return false;
}
};
struct SimplifyQuery {
const DataLayout &DL;
const TargetLibraryInfo *TLI = nullptr;
const DominatorTree *DT = nullptr;
AssumptionCache *AC = nullptr;
const Instruction *CxtI = nullptr;
// Wrapper to query additional information for instructions like metadata or
// keywords like nsw, which provides conservative results if those cannot
// be safely used.
const InstrInfoQuery IIQ;
/// Controls whether simplifications are allowed to constrain the range of
/// possible values for uses of undef. If it is false, simplifications are not
/// allowed to assume a particular value for a use of undef for example.
bool CanUseUndef = true;
SimplifyQuery(const DataLayout &DL, const Instruction *CXTI = nullptr)
: DL(DL), CxtI(CXTI) {}
SimplifyQuery(const DataLayout &DL, const TargetLibraryInfo *TLI,
const DominatorTree *DT = nullptr,
AssumptionCache *AC = nullptr,
const Instruction *CXTI = nullptr, bool UseInstrInfo = true,
bool CanUseUndef = true)
: DL(DL), TLI(TLI), DT(DT), AC(AC), CxtI(CXTI), IIQ(UseInstrInfo),
CanUseUndef(CanUseUndef) {}
SimplifyQuery getWithInstruction(Instruction *I) const {
SimplifyQuery Copy(*this);
Copy.CxtI = I;
return Copy;
}
SimplifyQuery getWithoutUndef() const {
SimplifyQuery Copy(*this);
Copy.CanUseUndef = false;
return Copy;
}
/// If CanUseUndef is true, returns whether \p V is undef.
/// Otherwise always return false.
bool isUndefValue(Value *V) const {
if (!CanUseUndef)
return false;
using namespace PatternMatch;
return match(V, m_Undef());
}
};
// NOTE: the explicit multiple argument versions of these functions are
// deprecated.
// Please use the SimplifyQuery versions in new code.
/// Given operands for an Add, fold the result or return null.
Value *simplifyAddInst(Value *LHS, Value *RHS, bool IsNSW, bool IsNUW,
const SimplifyQuery &Q);
/// Given operands for a Sub, fold the result or return null.
Value *simplifySubInst(Value *LHS, Value *RHS, bool IsNSW, bool IsNUW,
const SimplifyQuery &Q);
/// Given operands for a Mul, fold the result or return null.
Value *simplifyMulInst(Value *LHS, Value *RHS, bool IsNSW, bool IsNUW,
const SimplifyQuery &Q);
/// Given operands for an SDiv, fold the result or return null.
Value *simplifySDivInst(Value *LHS, Value *RHS, bool IsExact,
const SimplifyQuery &Q);
/// Given operands for a UDiv, fold the result or return null.
Value *simplifyUDivInst(Value *LHS, Value *RHS, bool IsExact,
const SimplifyQuery &Q);
/// Given operands for an SRem, fold the result or return null.
Value *simplifySRemInst(Value *LHS, Value *RHS, const SimplifyQuery &Q);
/// Given operands for a URem, fold the result or return null.
Value *simplifyURemInst(Value *LHS, Value *RHS, const SimplifyQuery &Q);
/// Given operand for an FNeg, fold the result or return null.
Value *simplifyFNegInst(Value *Op, FastMathFlags FMF, const SimplifyQuery &Q);
/// Given operands for an FAdd, fold the result or return null.
Value *
simplifyFAddInst(Value *LHS, Value *RHS, FastMathFlags FMF,
const SimplifyQuery &Q,
fp::ExceptionBehavior ExBehavior = fp::ebIgnore,
RoundingMode Rounding = RoundingMode::NearestTiesToEven);
/// Given operands for an FSub, fold the result or return null.
Value *
simplifyFSubInst(Value *LHS, Value *RHS, FastMathFlags FMF,
const SimplifyQuery &Q,
fp::ExceptionBehavior ExBehavior = fp::ebIgnore,
RoundingMode Rounding = RoundingMode::NearestTiesToEven);
/// Given operands for an FMul, fold the result or return null.
Value *
simplifyFMulInst(Value *LHS, Value *RHS, FastMathFlags FMF,
const SimplifyQuery &Q,
fp::ExceptionBehavior ExBehavior = fp::ebIgnore,
RoundingMode Rounding = RoundingMode::NearestTiesToEven);
/// Given operands for the multiplication of a FMA, fold the result or return
/// null. In contrast to simplifyFMulInst, this function will not perform
/// simplifications whose unrounded results differ when rounded to the argument
/// type.
Value *simplifyFMAFMul(Value *LHS, Value *RHS, FastMathFlags FMF,
const SimplifyQuery &Q,
fp::ExceptionBehavior ExBehavior = fp::ebIgnore,
RoundingMode Rounding = RoundingMode::NearestTiesToEven);
/// Given operands for an FDiv, fold the result or return null.
Value *
simplifyFDivInst(Value *LHS, Value *RHS, FastMathFlags FMF,
const SimplifyQuery &Q,
fp::ExceptionBehavior ExBehavior = fp::ebIgnore,
RoundingMode Rounding = RoundingMode::NearestTiesToEven);
/// Given operands for an FRem, fold the result or return null.
Value *
simplifyFRemInst(Value *LHS, Value *RHS, FastMathFlags FMF,
const SimplifyQuery &Q,
fp::ExceptionBehavior ExBehavior = fp::ebIgnore,
RoundingMode Rounding = RoundingMode::NearestTiesToEven);
/// Given operands for a Shl, fold the result or return null.
Value *simplifyShlInst(Value *Op0, Value *Op1, bool IsNSW, bool IsNUW,
const SimplifyQuery &Q);
/// Given operands for a LShr, fold the result or return null.
Value *simplifyLShrInst(Value *Op0, Value *Op1, bool IsExact,
const SimplifyQuery &Q);
/// Given operands for a AShr, fold the result or return nulll.
Value *simplifyAShrInst(Value *Op0, Value *Op1, bool IsExact,
const SimplifyQuery &Q);
/// Given operands for an And, fold the result or return null.
Value *simplifyAndInst(Value *LHS, Value *RHS, const SimplifyQuery &Q);
/// Given operands for an Or, fold the result or return null.
Value *simplifyOrInst(Value *LHS, Value *RHS, const SimplifyQuery &Q);
/// Given operands for an Xor, fold the result or return null.
Value *simplifyXorInst(Value *LHS, Value *RHS, const SimplifyQuery &Q);
/// Given operands for an ICmpInst, fold the result or return null.
Value *simplifyICmpInst(unsigned Predicate, Value *LHS, Value *RHS,
const SimplifyQuery &Q);
/// Given operands for an FCmpInst, fold the result or return null.
Value *simplifyFCmpInst(unsigned Predicate, Value *LHS, Value *RHS,
FastMathFlags FMF, const SimplifyQuery &Q);
/// Given operands for a SelectInst, fold the result or return null.
Value *simplifySelectInst(Value *Cond, Value *TrueVal, Value *FalseVal,
const SimplifyQuery &Q);
/// Given operands for a GetElementPtrInst, fold the result or return null.
Value *simplifyGEPInst(Type *SrcTy, Value *Ptr, ArrayRef<Value *> Indices,
bool InBounds, const SimplifyQuery &Q);
/// Given operands for an InsertValueInst, fold the result or return null.
Value *simplifyInsertValueInst(Value *Agg, Value *Val, ArrayRef<unsigned> Idxs,
const SimplifyQuery &Q);
/// Given operands for an InsertElement, fold the result or return null.
Value *simplifyInsertElementInst(Value *Vec, Value *Elt, Value *Idx,
const SimplifyQuery &Q);
/// Given operands for an ExtractValueInst, fold the result or return null.
Value *simplifyExtractValueInst(Value *Agg, ArrayRef<unsigned> Idxs,
const SimplifyQuery &Q);
/// Given operands for an ExtractElementInst, fold the result or return null.
Value *simplifyExtractElementInst(Value *Vec, Value *Idx,
const SimplifyQuery &Q);
/// Given operands for a CastInst, fold the result or return null.
Value *simplifyCastInst(unsigned CastOpc, Value *Op, Type *Ty,
const SimplifyQuery &Q);
/// Given operands for a ShuffleVectorInst, fold the result or return null.
/// See class ShuffleVectorInst for a description of the mask representation.
Value *simplifyShuffleVectorInst(Value *Op0, Value *Op1, ArrayRef<int> Mask,
Type *RetTy, const SimplifyQuery &Q);
//=== Helper functions for higher up the class hierarchy.
/// Given operands for a CmpInst, fold the result or return null.
Value *simplifyCmpInst(unsigned Predicate, Value *LHS, Value *RHS,
const SimplifyQuery &Q);
/// Given operand for a UnaryOperator, fold the result or return null.
Value *simplifyUnOp(unsigned Opcode, Value *Op, const SimplifyQuery &Q);
/// Given operand for a UnaryOperator, fold the result or return null.
/// Try to use FastMathFlags when folding the result.
Value *simplifyUnOp(unsigned Opcode, Value *Op, FastMathFlags FMF,
const SimplifyQuery &Q);
/// Given operands for a BinaryOperator, fold the result or return null.
Value *simplifyBinOp(unsigned Opcode, Value *LHS, Value *RHS,
const SimplifyQuery &Q);
/// Given operands for a BinaryOperator, fold the result or return null.
/// Try to use FastMathFlags when folding the result.
Value *simplifyBinOp(unsigned Opcode, Value *LHS, Value *RHS, FastMathFlags FMF,
const SimplifyQuery &Q);
/// Given a callsite, callee, and arguments, fold the result or return null.
Value *simplifyCall(CallBase *Call, Value *Callee, ArrayRef<Value *> Args,
const SimplifyQuery &Q);
/// Given a constrained FP intrinsic call, tries to compute its simplified
/// version. Returns a simplified result or null.
///
/// This function provides an additional contract: it guarantees that if
/// simplification succeeds that the intrinsic is side effect free. As a result,
/// successful simplification can be used to delete the intrinsic not just
/// replace its result.
Value *simplifyConstrainedFPCall(CallBase *Call, const SimplifyQuery &Q);
/// Given an operand for a Freeze, see if we can fold the result.
/// If not, this returns null.
Value *simplifyFreezeInst(Value *Op, const SimplifyQuery &Q);
/// Given a load instruction and its pointer operand, fold the result or return
/// null.
Value *simplifyLoadInst(LoadInst *LI, Value *PtrOp, const SimplifyQuery &Q);
/// See if we can compute a simplified version of this instruction. If not,
/// return null.
Value *simplifyInstruction(Instruction *I, const SimplifyQuery &Q);
/// Like \p simplifyInstruction but the operands of \p I are replaced with
/// \p NewOps. Returns a simplified value, or null if none was found.
Value *
simplifyInstructionWithOperands(Instruction *I, ArrayRef<Value *> NewOps,
const SimplifyQuery &Q);
/// See if V simplifies when its operand Op is replaced with RepOp. If not,
/// return null.
/// AllowRefinement specifies whether the simplification can be a refinement
/// (e.g. 0 instead of poison), or whether it needs to be strictly identical.
/// Op and RepOp can be assumed to not be poison when determining refinement.
Value *simplifyWithOpReplaced(Value *V, Value *Op, Value *RepOp,
const SimplifyQuery &Q, bool AllowRefinement);
/// Replace all uses of 'I' with 'SimpleV' and simplify the uses recursively.
///
/// This first performs a normal RAUW of I with SimpleV. It then recursively
/// attempts to simplify those users updated by the operation. The 'I'
/// instruction must not be equal to the simplified value 'SimpleV'.
/// If UnsimplifiedUsers is provided, instructions that could not be simplified
/// are added to it.
///
/// The function returns true if any simplifications were performed.
bool replaceAndRecursivelySimplify(
Instruction *I, Value *SimpleV, const TargetLibraryInfo *TLI = nullptr,
const DominatorTree *DT = nullptr, AssumptionCache *AC = nullptr,
SmallSetVector<Instruction *, 8> *UnsimplifiedUsers = nullptr);
// These helper functions return a SimplifyQuery structure that contains as
// many of the optional analysis we use as are currently valid. This is the
// strongly preferred way of constructing SimplifyQuery in passes.
const SimplifyQuery getBestSimplifyQuery(Pass &, Function &);
template <class T, class... TArgs>
const SimplifyQuery getBestSimplifyQuery(AnalysisManager<T, TArgs...> &,
Function &);
const SimplifyQuery getBestSimplifyQuery(LoopStandardAnalysisResults &,
const DataLayout &);
} // end namespace llvm
#endif
PK iwFZ�:�[� � ! Analysis/SyncDependenceAnalysis.hnu �[��� //===- SyncDependenceAnalysis.h - Divergent Branch Dependence -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// \file
// This file defines the SyncDependenceAnalysis class, which computes for
// every divergent branch the set of phi nodes that the branch will make
// divergent.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_SYNCDEPENDENCEANALYSIS_H
#define LLVM_ANALYSIS_SYNCDEPENDENCEANALYSIS_H
#include "llvm/ADT/SmallPtrSet.h"
#include <map>
#include <memory>
#include <unordered_map>
#include <vector>
namespace llvm {
class BasicBlock;
class DominatorTree;
class Instruction;
class LoopInfo;
class PostDominatorTree;
using ConstBlockSet = SmallPtrSet<const BasicBlock *, 4>;
struct ControlDivergenceDesc {
// Join points of divergent disjoint paths.
ConstBlockSet JoinDivBlocks;
// Divergent loop exits
ConstBlockSet LoopDivBlocks;
};
struct ModifiedPO {
std::vector<const BasicBlock *> LoopPO;
std::unordered_map<const BasicBlock *, unsigned> POIndex;
void appendBlock(const BasicBlock &BB) {
POIndex[&BB] = LoopPO.size();
LoopPO.push_back(&BB);
}
unsigned getIndexOf(const BasicBlock &BB) const {
return POIndex.find(&BB)->second;
}
unsigned size() const { return LoopPO.size(); }
const BasicBlock *getBlockAt(unsigned Idx) const { return LoopPO[Idx]; }
};
/// \brief Relates points of divergent control to join points in
/// reducible CFGs.
///
/// This analysis relates points of divergent control to points of converging
/// divergent control. The analysis requires all loops to be reducible.
class SyncDependenceAnalysis {
public:
~SyncDependenceAnalysis();
SyncDependenceAnalysis(const DominatorTree &DT, const PostDominatorTree &PDT,
const LoopInfo &LI);
/// \brief Computes divergent join points and loop exits caused by branch
/// divergence in \p Term.
///
/// The set of blocks which are reachable by disjoint paths from \p Term.
/// The set also contains loop exits if there two disjoint paths:
/// one from \p Term to the loop exit and another from \p Term to the loop
/// header. Those exit blocks are added to the returned set.
/// If L is the parent loop of \p Term and an exit of L is in the returned
/// set then L is a divergent loop.
const ControlDivergenceDesc &getJoinBlocks(const Instruction &Term);
private:
static ControlDivergenceDesc EmptyDivergenceDesc;
ModifiedPO LoopPO;
const DominatorTree &DT;
const PostDominatorTree &PDT;
const LoopInfo &LI;
std::map<const Instruction *, std::unique_ptr<ControlDivergenceDesc>>
CachedControlDivDescs;
};
} // namespace llvm
#endif // LLVM_ANALYSIS_SYNCDEPENDENCEANALYSIS_H
PK iwFZ�� � � Analysis/Utils/Local.hnu �[��� //===- Local.h - Functions to perform local transformations -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This family of functions perform various local transformations to the
// program.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_UTILS_LOCAL_H
#define LLVM_ANALYSIS_UTILS_LOCAL_H
namespace llvm {
class DataLayout;
class IRBuilderBase;
class User;
class Value;
/// Given a getelementptr instruction/constantexpr, emit the code necessary to
/// compute the offset from the base pointer (without adding in the base
/// pointer). Return the result as a signed integer of intptr size.
/// When NoAssumptions is true, no assumptions about index computation not
/// overflowing is made.
Value *emitGEPOffset(IRBuilderBase *Builder, const DataLayout &DL, User *GEP,
bool NoAssumptions = false);
} // namespace llvm
#endif // LLVM_ANALYSIS_UTILS_LOCAL_H
PK iwFZ�﹒ Analysis/Utils/TFUtils.hnu �[��� //===- TFUtils.h - utilities for tensorflow C API ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
#ifndef LLVM_ANALYSIS_UTILS_TFUTILS_H
#define LLVM_ANALYSIS_UTILS_TFUTILS_H
#include "llvm/Config/llvm-config.h"
#ifdef LLVM_HAVE_TFLITE
#include "llvm/ADT/StringMap.h"
#include "llvm/Analysis/TensorSpec.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/Support/JSON.h"
#include <memory>
#include <vector>
namespace llvm {
/// Load a SavedModel, find the given inputs and outputs, and setup storage
/// for input tensors. The user is responsible for correctly dimensioning the
/// input tensors and setting their values before calling evaluate().
/// To initialize:
/// - construct the object
/// - initialize the input tensors using initInput. Indices must correspond to
/// indices in the InputNames used at construction.
/// To use:
/// - set input values by using getInput to get each input tensor, and then
/// setting internal scalars, for all dimensions (tensors are row-major:
/// https://github.com/tensorflow/tensorflow/blob/r1.5/tensorflow/c/c_api.h#L205)
/// - call evaluate. The input tensors' values are not consumed after this, and
/// may still be read.
/// - use the outputs in the output vector
class TFModelEvaluatorImpl;
class EvaluationResultImpl;
class TFModelEvaluator final {
public:
/// The result of a model evaluation. Handles the lifetime of the output
/// tensors, which means that their values need to be used before
/// the EvaluationResult's dtor is called.
class EvaluationResult {
public:
EvaluationResult(const EvaluationResult &) = delete;
EvaluationResult &operator=(const EvaluationResult &Other) = delete;
EvaluationResult(EvaluationResult &&Other);
EvaluationResult &operator=(EvaluationResult &&Other);
~EvaluationResult();
/// Get a (const) pointer to the first element of the tensor at Index.
template <typename T> T *getTensorValue(size_t Index) {
return static_cast<T *>(getUntypedTensorValue(Index));
}
template <typename T> const T *getTensorValue(size_t Index) const {
return static_cast<T *>(getUntypedTensorValue(Index));
}
/// Get a (const) pointer to the untyped data of the tensor.
void *getUntypedTensorValue(size_t Index);
const void *getUntypedTensorValue(size_t Index) const;
private:
friend class TFModelEvaluator;
EvaluationResult(std::unique_ptr<EvaluationResultImpl> Impl);
std::unique_ptr<EvaluationResultImpl> Impl;
};
TFModelEvaluator(StringRef SavedModelPath,
const std::vector<TensorSpec> &InputSpecs,
const std::vector<TensorSpec> &OutputSpecs,
const char *Tags = "serve");
~TFModelEvaluator();
TFModelEvaluator(const TFModelEvaluator &) = delete;
TFModelEvaluator(TFModelEvaluator &&) = delete;
/// Evaluate the model, assuming it is valid. Returns std::nullopt if the
/// evaluation fails or the model is invalid, or an EvaluationResult
/// otherwise. The inputs are assumed to have been already provided via
/// getInput(). When returning std::nullopt, it also invalidates this object.
std::optional<EvaluationResult> evaluate();
/// Provides access to the input vector.
template <typename T> T *getInput(size_t Index) {
return static_cast<T *>(getUntypedInput(Index));
}
/// Returns true if the tensorflow model was loaded successfully, false
/// otherwise.
bool isValid() const { return !!Impl; }
/// Untyped access to input.
void *getUntypedInput(size_t Index);
private:
std::unique_ptr<TFModelEvaluatorImpl> Impl;
};
} // namespace llvm
#endif // LLVM_HAVE_TFLITE
#endif // LLVM_ANALYSIS_UTILS_TFUTILS_H
PK iwFZ�� � Analysis/Utils/TrainingLogger.hnu �[��� //===- TrainingLogger.h - mlgo feature/reward logging ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// The design goals of the logger are:
// - no dependencies that llvm doesn't already have.
// - support streaming, so that we don't need to buffer data during compilation
// - 0-decoding tensor values. Tensor values are potentially very large buffers
// of scalars. Because of their potentially large size, avoiding
// serialization/deserialization overhead is preferred.
//
// The simple logger produces an output of the form (each line item on its line)
// - header: a json object describing the data that will follow.
// - context: e.g. function name, for regalloc, or "default" for module-wide
// optimizations like the inliner. This is the context to which the subsequent
// data corresponds.
// - observation number.
// - tensor values - raw bytes of the tensors, in the order given in the header.
// The values are in succession, i.e. no separator is found between successive
// tensor values. At the end, there is a new line character.
// - [score] - this is optional, and is present if it was present in the header.
// Currently, for final rewards, we output "0" scores after each observation,
// except for the last one.
// <repeat>
// The file should be read as binary, but the reason we use newlines is mostly
// ease of debugging: the log can be opened in a text editor and, while tensor
// values are inscrutable, at least the sequence of data can be easily observed.
// Of course, the buffer of tensor values could contain '\n' bytes. A reader
// should use the header information to know how much data to read for the
// tensor values, and not use line information for that.
//
// An example reader, used for test, is available at
// Analysis/models/log_reader.py
//
// Example:
// {"features":[list of TensorSpecs], "score":<a tensor spec>}
// {"context": "aFunction"}
// {"observation": 0}
// <bytes>
// {"outcome": 0}
// <bytes for the tensor corresponding to the "score" spec in the header>
// {"observation": 1}
// ...
// {"context": "anotherFunction"}
// {"observation": 0}
// ...
//
#ifndef LLVM_ANALYSIS_UTILS_TRAININGLOGGER_H
#define LLVM_ANALYSIS_UTILS_TRAININGLOGGER_H
#include "llvm/Config/llvm-config.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/Analysis/TensorSpec.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/Support/JSON.h"
#include <memory>
#include <optional>
#include <vector>
namespace llvm {
/// Logging utility - given an ordered specification of features, and assuming
/// a scalar reward, allow logging feature values and rewards.
/// The assumption is that, for an event to be logged (i.e. a set of feature
/// values and a reward), the user calls the log* API for each feature exactly
/// once, providing the index matching the position in the feature spec list
/// provided at construction. The example assumes the first feature's element
/// type is float, the second is int64, and the reward is float:
///
/// event 0:
/// logFloatValue(0, ...)
/// logInt64Value(1, ...)
/// ...
/// logFloatReward(...)
/// event 1:
/// logFloatValue(0, ...)
/// logInt64Value(1, ...)
/// ...
/// logFloatReward(...)
///
/// At the end, call print to generate the log.
/// Alternatively, don't call logReward at the end of each event, just
/// log{Float|Int32|Int64}FinalReward at the end.
class Logger final {
std::unique_ptr<raw_ostream> OS;
const std::vector<TensorSpec> FeatureSpecs;
const TensorSpec RewardSpec;
const bool IncludeReward;
StringMap<size_t> ObservationIDs;
std::string CurrentContext;
void writeHeader(std::optional<TensorSpec> AdviceSpec);
void writeTensor(const TensorSpec &Spec, const char *RawData) {
OS->write(RawData, Spec.getTotalTensorBufferSize());
}
void logRewardImpl(const char *RawData);
public:
/// Construct a Logger. If IncludeReward is false, then logReward or
/// logFinalReward shouldn't be called, and the reward feature won't be
/// printed out.
/// NOTE: the FeatureSpecs are expected to be in the same order (i.e. have
/// corresponding indices) with any MLModelRunner implementations
/// corresponding to the model being trained/logged.
Logger(std::unique_ptr<raw_ostream> OS,
const std::vector<TensorSpec> &FeatureSpecs,
const TensorSpec &RewardSpec, bool IncludeReward,
std::optional<TensorSpec> AdviceSpec = std::nullopt);
void switchContext(StringRef Name);
void startObservation();
void endObservation();
void flush() { OS->flush(); }
const std::string ¤tContext() const { return CurrentContext; }
/// Check if there is at least an observation for `currentContext()`.
bool hasObservationInProgress() const {
return hasAnyObservationForContext(CurrentContext);
}
/// Check if there is at least an observation for the context `Ctx`.
bool hasAnyObservationForContext(StringRef Ctx) const {
return ObservationIDs.contains(Ctx);
}
template <typename T> void logReward(T Value) {
logRewardImpl(reinterpret_cast<const char *>(&Value));
}
void logTensorValue(size_t FeatureID, const char *RawData) {
writeTensor(FeatureSpecs[FeatureID], RawData);
}
};
} // namespace llvm
#endif // LLVM_ANALYSIS_UTILS_TRAININGLOGGER_H
PK iwFZ����� � 4 Analysis/Utils/ImportedFunctionsInliningStatistics.hnu �[��� //===-- ImportedFunctionsInliningStatistics.h -------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// Generating inliner statistics for imported functions, mostly useful for
// ThinLTO.
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_UTILS_IMPORTEDFUNCTIONSINLININGSTATISTICS_H
#define LLVM_ANALYSIS_UTILS_IMPORTEDFUNCTIONSINLININGSTATISTICS_H
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/StringRef.h"
#include <memory>
#include <vector>
namespace llvm {
class Module;
class Function;
/// Calculate and dump ThinLTO specific inliner stats.
/// The main statistics are:
/// (1) Number of inlined imported functions,
/// (2) Number of imported functions inlined into importing module (indirect),
/// (3) Number of non imported functions inlined into importing module
/// (indirect).
/// The difference between first and the second is that first stat counts
/// all performed inlines on imported functions, but the second one only the
/// functions that have been eventually inlined to a function in the importing
/// module (by a chain of inlines). Because llvm uses bottom-up inliner, it is
/// possible to e.g. import function `A`, `B` and then inline `B` to `A`,
/// and after this `A` might be too big to be inlined into some other function
/// that calls it. It calculates this statistic by building graph, where
/// the nodes are functions, and edges are performed inlines and then by marking
/// the edges starting from not imported function.
///
/// If `Verbose` is set to true, then it also dumps statistics
/// per each inlined function, sorted by the greatest inlines count like
/// - number of performed inlines
/// - number of performed inlines to importing module
class ImportedFunctionsInliningStatistics {
private:
/// InlineGraphNode represents node in graph of inlined functions.
struct InlineGraphNode {
// Default-constructible and movable.
InlineGraphNode() = default;
InlineGraphNode(InlineGraphNode &&) = default;
InlineGraphNode &operator=(InlineGraphNode &&) = default;
llvm::SmallVector<InlineGraphNode *, 8> InlinedCallees;
/// Incremented every direct inline.
int32_t NumberOfInlines = 0;
/// Number of inlines into non imported function (possibly indirect via
/// intermediate inlines). Computed based on graph search.
int32_t NumberOfRealInlines = 0;
bool Imported = false;
bool Visited = false;
};
public:
ImportedFunctionsInliningStatistics() = default;
ImportedFunctionsInliningStatistics(
const ImportedFunctionsInliningStatistics &) = delete;
/// Set information like AllFunctions, ImportedFunctions, ModuleName.
void setModuleInfo(const Module &M);
/// Record inline of @param Callee to @param Caller for statistis.
void recordInline(const Function &Caller, const Function &Callee);
/// Dump stats computed with InlinerStatistics class.
/// If @param Verbose is true then separate statistics for every inlined
/// function will be printed.
void dump(bool Verbose);
private:
/// Creates new Node in NodeMap and sets attributes, or returns existed one.
InlineGraphNode &createInlineGraphNode(const Function &);
void calculateRealInlines();
void dfs(InlineGraphNode &GraphNode);
using NodesMapTy =
llvm::StringMap<std::unique_ptr<InlineGraphNode>>;
using SortedNodesTy =
std::vector<const NodesMapTy::MapEntryTy*>;
/// Returns vector of elements sorted by
/// (-NumberOfInlines, -NumberOfRealInlines, FunctionName).
SortedNodesTy getSortedNodes();
private:
/// This map manage life of all InlineGraphNodes. Unique pointer to
/// InlineGraphNode used since the node pointers are also saved in the
/// InlinedCallees vector. If it would store InlineGraphNode instead then the
/// address of the node would not be invariant.
NodesMapTy NodesMap;
/// Non external functions that have some other function inlined inside.
std::vector<StringRef> NonImportedCallers;
int AllFunctions = 0;
int ImportedFunctions = 0;
StringRef ModuleName;
};
enum class InlinerFunctionImportStatsOpts {
No = 0,
Basic = 1,
Verbose = 2,
};
} // llvm
#endif // LLVM_ANALYSIS_UTILS_IMPORTEDFUNCTIONSINLININGSTATISTICS_H
PK iwFZ&(ϊ�
�
Analysis/ObjCARCUtil.hnu �[��� //===- ObjCARCUtil.h - ObjC ARC Utility Functions ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This file defines ARC utility functions which are used by various parts of
/// the compiler.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_OBJCARCUTIL_H
#define LLVM_ANALYSIS_OBJCARCUTIL_H
#include "llvm/Analysis/ObjCARCInstKind.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/InstrTypes.h"
#include "llvm/IR/LLVMContext.h"
namespace llvm {
namespace objcarc {
inline const char *getRVMarkerModuleFlagStr() {
return "clang.arc.retainAutoreleasedReturnValueMarker";
}
inline bool hasAttachedCallOpBundle(const CallBase *CB) {
// Ignore the bundle if the return type is void. Global optimization passes
// can turn the called function's return type to void. That should happen only
// if the call doesn't return and the call to @llvm.objc.clang.arc.noop.use
// no longer consumes the function return or is deleted. In that case, it's
// not necessary to emit the marker instruction or calls to the ARC runtime
// functions.
return !CB->getFunctionType()->getReturnType()->isVoidTy() &&
CB->getOperandBundle(LLVMContext::OB_clang_arc_attachedcall)
.has_value();
}
/// This function returns operand bundle clang_arc_attachedcall's argument,
/// which is the address of the ARC runtime function.
inline std::optional<Function *> getAttachedARCFunction(const CallBase *CB) {
auto B = CB->getOperandBundle(LLVMContext::OB_clang_arc_attachedcall);
if (!B)
return std::nullopt;
return cast<Function>(B->Inputs[0]);
}
/// Check whether the function is retainRV/unsafeClaimRV.
inline bool isRetainOrClaimRV(ARCInstKind Kind) {
return Kind == ARCInstKind::RetainRV || Kind == ARCInstKind::UnsafeClaimRV;
}
/// This function returns the ARCInstKind of the function attached to operand
/// bundle clang_arc_attachedcall. It returns std::nullopt if the call doesn't
/// have the operand bundle or the operand is null. Otherwise it returns either
/// RetainRV or UnsafeClaimRV.
inline ARCInstKind getAttachedARCFunctionKind(const CallBase *CB) {
std::optional<Function *> Fn = getAttachedARCFunction(CB);
if (!Fn)
return ARCInstKind::None;
auto FnClass = GetFunctionClass(*Fn);
assert(isRetainOrClaimRV(FnClass) && "unexpected ARC runtime function");
return FnClass;
}
} // end namespace objcarc
} // end namespace llvm
#endif
PK iwFZp
z/w w & Analysis/InlineSizeEstimatorAnalysis.hnu �[��� //===- InlineSizeEstimatorAnalysis.h - ML size estimator --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
#ifndef LLVM_ANALYSIS_INLINESIZEESTIMATORANALYSIS_H
#define LLVM_ANALYSIS_INLINESIZEESTIMATORANALYSIS_H
#include "llvm/IR/PassManager.h"
namespace llvm {
class Function;
class TFModelEvaluator;
class InlineSizeEstimatorAnalysis
: public AnalysisInfoMixin<InlineSizeEstimatorAnalysis> {
public:
InlineSizeEstimatorAnalysis();
InlineSizeEstimatorAnalysis(InlineSizeEstimatorAnalysis &&);
~InlineSizeEstimatorAnalysis();
static AnalysisKey Key;
using Result = std::optional<size_t>;
Result run(const Function &F, FunctionAnalysisManager &FAM);
static bool isEvaluatorRequested();
private:
std::unique_ptr<TFModelEvaluator> Evaluator;
};
class InlineSizeEstimatorAnalysisPrinterPass
: public PassInfoMixin<InlineSizeEstimatorAnalysisPrinterPass> {
raw_ostream &OS;
public:
explicit InlineSizeEstimatorAnalysisPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
} // namespace llvm
#endif // LLVM_ANALYSIS_INLINESIZEESTIMATORANALYSIS_H
PK iwFZ^U��R �R Analysis/MustExecute.hnu �[��� //===- MustExecute.h - Is an instruction known to execute--------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// Contains a collection of routines for determining if a given instruction is
/// guaranteed to execute if a given point in control flow is reached. The most
/// common example is an instruction within a loop being provably executed if we
/// branch to the header of it's containing loop.
///
/// There are two interfaces available to determine if an instruction is
/// executed once a given point in the control flow is reached:
/// 1) A loop-centric one derived from LoopSafetyInfo.
/// 2) A "must be executed context"-based one implemented in the
/// MustBeExecutedContextExplorer.
/// Please refer to the class comments for more information.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_MUSTEXECUTE_H
#define LLVM_ANALYSIS_MUSTEXECUTE_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/Analysis/InstructionPrecedenceTracking.h"
#include "llvm/IR/EHPersonalities.h"
#include "llvm/IR/PassManager.h"
namespace llvm {
namespace {
template <typename T> using GetterTy = std::function<T *(const Function &F)>;
}
class BasicBlock;
class DominatorTree;
class Instruction;
class Loop;
class LoopInfo;
class PostDominatorTree;
class raw_ostream;
/// Captures loop safety information.
/// It keep information for loop blocks may throw exception or otherwise
/// exit abnormally on any iteration of the loop which might actually execute
/// at runtime. The primary way to consume this information is via
/// isGuaranteedToExecute below, but some callers bailout or fallback to
/// alternate reasoning if a loop contains any implicit control flow.
/// NOTE: LoopSafetyInfo contains cached information regarding loops and their
/// particular blocks. This information is only dropped on invocation of
/// computeLoopSafetyInfo. If the loop or any of its block is deleted, or if
/// any thrower instructions have been added or removed from them, or if the
/// control flow has changed, or in case of other meaningful modifications, the
/// LoopSafetyInfo needs to be recomputed. If a meaningful modifications to the
/// loop were made and the info wasn't recomputed properly, the behavior of all
/// methods except for computeLoopSafetyInfo is undefined.
class LoopSafetyInfo {
// Used to update funclet bundle operands.
DenseMap<BasicBlock *, ColorVector> BlockColors;
protected:
/// Computes block colors.
void computeBlockColors(const Loop *CurLoop);
public:
/// Returns block colors map that is used to update funclet operand bundles.
const DenseMap<BasicBlock *, ColorVector> &getBlockColors() const;
/// Copy colors of block \p Old into the block \p New.
void copyColors(BasicBlock *New, BasicBlock *Old);
/// Returns true iff the block \p BB potentially may throw exception. It can
/// be false-positive in cases when we want to avoid complex analysis.
virtual bool blockMayThrow(const BasicBlock *BB) const = 0;
/// Returns true iff any block of the loop for which this info is contains an
/// instruction that may throw or otherwise exit abnormally.
virtual bool anyBlockMayThrow() const = 0;
/// Return true if we must reach the block \p BB under assumption that the
/// loop \p CurLoop is entered.
bool allLoopPathsLeadToBlock(const Loop *CurLoop, const BasicBlock *BB,
const DominatorTree *DT) const;
/// Computes safety information for a loop checks loop body & header for
/// the possibility of may throw exception, it takes LoopSafetyInfo and loop
/// as argument. Updates safety information in LoopSafetyInfo argument.
/// Note: This is defined to clear and reinitialize an already initialized
/// LoopSafetyInfo. Some callers rely on this fact.
virtual void computeLoopSafetyInfo(const Loop *CurLoop) = 0;
/// Returns true if the instruction in a loop is guaranteed to execute at
/// least once (under the assumption that the loop is entered).
virtual bool isGuaranteedToExecute(const Instruction &Inst,
const DominatorTree *DT,
const Loop *CurLoop) const = 0;
LoopSafetyInfo() = default;
virtual ~LoopSafetyInfo() = default;
};
/// Simple and conservative implementation of LoopSafetyInfo that can give
/// false-positive answers to its queries in order to avoid complicated
/// analysis.
class SimpleLoopSafetyInfo: public LoopSafetyInfo {
bool MayThrow = false; // The current loop contains an instruction which
// may throw.
bool HeaderMayThrow = false; // Same as previous, but specific to loop header
public:
bool blockMayThrow(const BasicBlock *BB) const override;
bool anyBlockMayThrow() const override;
void computeLoopSafetyInfo(const Loop *CurLoop) override;
bool isGuaranteedToExecute(const Instruction &Inst,
const DominatorTree *DT,
const Loop *CurLoop) const override;
};
/// This implementation of LoopSafetyInfo use ImplicitControlFlowTracking to
/// give precise answers on "may throw" queries. This implementation uses cache
/// that should be invalidated by calling the methods insertInstructionTo and
/// removeInstruction whenever we modify a basic block's contents by adding or
/// removing instructions.
class ICFLoopSafetyInfo: public LoopSafetyInfo {
bool MayThrow = false; // The current loop contains an instruction which
// may throw.
// Contains information about implicit control flow in this loop's blocks.
mutable ImplicitControlFlowTracking ICF;
// Contains information about instruction that may possibly write memory.
mutable MemoryWriteTracking MW;
public:
bool blockMayThrow(const BasicBlock *BB) const override;
bool anyBlockMayThrow() const override;
void computeLoopSafetyInfo(const Loop *CurLoop) override;
bool isGuaranteedToExecute(const Instruction &Inst,
const DominatorTree *DT,
const Loop *CurLoop) const override;
/// Returns true if we could not execute a memory-modifying instruction before
/// we enter \p BB under assumption that \p CurLoop is entered.
bool doesNotWriteMemoryBefore(const BasicBlock *BB, const Loop *CurLoop)
const;
/// Returns true if we could not execute a memory-modifying instruction before
/// we execute \p I under assumption that \p CurLoop is entered.
bool doesNotWriteMemoryBefore(const Instruction &I, const Loop *CurLoop)
const;
/// Inform the safety info that we are planning to insert a new instruction
/// \p Inst into the basic block \p BB. It will make all cache updates to keep
/// it correct after this insertion.
void insertInstructionTo(const Instruction *Inst, const BasicBlock *BB);
/// Inform safety info that we are planning to remove the instruction \p Inst
/// from its block. It will make all cache updates to keep it correct after
/// this removal.
void removeInstruction(const Instruction *Inst);
};
bool mayContainIrreducibleControl(const Function &F, const LoopInfo *LI);
struct MustBeExecutedContextExplorer;
/// Enum that allows us to spell out the direction.
enum class ExplorationDirection {
BACKWARD = 0,
FORWARD = 1,
};
/// Must be executed iterators visit stretches of instructions that are
/// guaranteed to be executed together, potentially with other instruction
/// executed in-between.
///
/// Given the following code, and assuming all statements are single
/// instructions which transfer execution to the successor (see
/// isGuaranteedToTransferExecutionToSuccessor), there are two possible
/// outcomes. If we start the iterator at A, B, or E, we will visit only A, B,
/// and E. If we start at C or D, we will visit all instructions A-E.
///
/// \code
/// A;
/// B;
/// if (...) {
/// C;
/// D;
/// }
/// E;
/// \endcode
///
///
/// Below is the example extneded with instructions F and G. Now we assume F
/// might not transfer execution to it's successor G. As a result we get the
/// following visit sets:
///
/// Start Instruction | Visit Set
/// A | A, B, E, F
/// B | A, B, E, F
/// C | A, B, C, D, E, F
/// D | A, B, C, D, E, F
/// E | A, B, E, F
/// F | A, B, E, F
/// G | A, B, E, F, G
///
///
/// \code
/// A;
/// B;
/// if (...) {
/// C;
/// D;
/// }
/// E;
/// F; // Might not transfer execution to its successor G.
/// G;
/// \endcode
///
///
/// A more complex example involving conditionals, loops, break, and continue
/// is shown below. We again assume all instructions will transmit control to
/// the successor and we assume we can prove the inner loop to be finite. We
/// omit non-trivial branch conditions as the exploration is oblivious to them.
/// Constant branches are assumed to be unconditional in the CFG. The resulting
/// visist sets are shown in the table below.
///
/// \code
/// A;
/// while (true) {
/// B;
/// if (...)
/// C;
/// if (...)
/// continue;
/// D;
/// if (...)
/// break;
/// do {
/// if (...)
/// continue;
/// E;
/// } while (...);
/// F;
/// }
/// G;
/// \endcode
///
/// Start Instruction | Visit Set
/// A | A, B
/// B | A, B
/// C | A, B, C
/// D | A, B, D
/// E | A, B, D, E, F
/// F | A, B, D, F
/// G | A, B, D, G
///
///
/// Note that the examples show optimal visist sets but not necessarily the ones
/// derived by the explorer depending on the available CFG analyses (see
/// MustBeExecutedContextExplorer). Also note that we, depending on the options,
/// the visit set can contain instructions from other functions.
struct MustBeExecutedIterator {
/// Type declarations that make his class an input iterator.
///{
typedef const Instruction *value_type;
typedef std::ptrdiff_t difference_type;
typedef const Instruction **pointer;
typedef const Instruction *&reference;
typedef std::input_iterator_tag iterator_category;
///}
using ExplorerTy = MustBeExecutedContextExplorer;
MustBeExecutedIterator(const MustBeExecutedIterator &Other) = default;
MustBeExecutedIterator(MustBeExecutedIterator &&Other)
: Visited(std::move(Other.Visited)), Explorer(Other.Explorer),
CurInst(Other.CurInst), Head(Other.Head), Tail(Other.Tail) {}
MustBeExecutedIterator &operator=(MustBeExecutedIterator &&Other) {
if (this != &Other) {
std::swap(Visited, Other.Visited);
std::swap(CurInst, Other.CurInst);
std::swap(Head, Other.Head);
std::swap(Tail, Other.Tail);
}
return *this;
}
~MustBeExecutedIterator() = default;
/// Pre- and post-increment operators.
///{
MustBeExecutedIterator &operator++() {
CurInst = advance();
return *this;
}
MustBeExecutedIterator operator++(int) {
MustBeExecutedIterator tmp(*this);
operator++();
return tmp;
}
///}
/// Equality and inequality operators. Note that we ignore the history here.
///{
bool operator==(const MustBeExecutedIterator &Other) const {
return CurInst == Other.CurInst && Head == Other.Head && Tail == Other.Tail;
}
bool operator!=(const MustBeExecutedIterator &Other) const {
return !(*this == Other);
}
///}
/// Return the underlying instruction.
const Instruction *&operator*() { return CurInst; }
const Instruction *getCurrentInst() const { return CurInst; }
/// Return true if \p I was encountered by this iterator already.
bool count(const Instruction *I) const {
return Visited.count({I, ExplorationDirection::FORWARD}) ||
Visited.count({I, ExplorationDirection::BACKWARD});
}
private:
using VisitedSetTy =
DenseSet<PointerIntPair<const Instruction *, 1, ExplorationDirection>>;
/// Private constructors.
MustBeExecutedIterator(ExplorerTy &Explorer, const Instruction *I);
/// Reset the iterator to its initial state pointing at \p I.
void reset(const Instruction *I);
/// Reset the iterator to point at \p I, keep cached state.
void resetInstruction(const Instruction *I);
/// Try to advance one of the underlying positions (Head or Tail).
///
/// \return The next instruction in the must be executed context, or nullptr
/// if none was found.
const Instruction *advance();
/// A set to track the visited instructions in order to deal with endless
/// loops and recursion.
VisitedSetTy Visited;
/// A reference to the explorer that created this iterator.
ExplorerTy &Explorer;
/// The instruction we are currently exposing to the user. There is always an
/// instruction that we know is executed with the given program point,
/// initially the program point itself.
const Instruction *CurInst;
/// Two positions that mark the program points where this iterator will look
/// for the next instruction. Note that the current instruction is either the
/// one pointed to by Head, Tail, or both.
const Instruction *Head, *Tail;
friend struct MustBeExecutedContextExplorer;
};
/// A "must be executed context" for a given program point PP is the set of
/// instructions, potentially before and after PP, that are executed always when
/// PP is reached. The MustBeExecutedContextExplorer an interface to explore
/// "must be executed contexts" in a module through the use of
/// MustBeExecutedIterator.
///
/// The explorer exposes "must be executed iterators" that traverse the must be
/// executed context. There is little information sharing between iterators as
/// the expected use case involves few iterators for "far apart" instructions.
/// If that changes, we should consider caching more intermediate results.
struct MustBeExecutedContextExplorer {
/// In the description of the parameters we use PP to denote a program point
/// for which the must be executed context is explored, or put differently,
/// for which the MustBeExecutedIterator is created.
///
/// \param ExploreInterBlock Flag to indicate if instructions in blocks
/// other than the parent of PP should be
/// explored.
/// \param ExploreCFGForward Flag to indicate if instructions located after
/// PP in the CFG, e.g., post-dominating PP,
/// should be explored.
/// \param ExploreCFGBackward Flag to indicate if instructions located
/// before PP in the CFG, e.g., dominating PP,
/// should be explored.
MustBeExecutedContextExplorer(
bool ExploreInterBlock, bool ExploreCFGForward, bool ExploreCFGBackward,
GetterTy<const LoopInfo> LIGetter =
[](const Function &) { return nullptr; },
GetterTy<const DominatorTree> DTGetter =
[](const Function &) { return nullptr; },
GetterTy<const PostDominatorTree> PDTGetter =
[](const Function &) { return nullptr; })
: ExploreInterBlock(ExploreInterBlock),
ExploreCFGForward(ExploreCFGForward),
ExploreCFGBackward(ExploreCFGBackward), LIGetter(LIGetter),
DTGetter(DTGetter), PDTGetter(PDTGetter), EndIterator(*this, nullptr) {}
/// Iterator-based interface. \see MustBeExecutedIterator.
///{
using iterator = MustBeExecutedIterator;
using const_iterator = const MustBeExecutedIterator;
/// Return an iterator to explore the context around \p PP.
iterator &begin(const Instruction *PP) {
auto &It = InstructionIteratorMap[PP];
if (!It)
It.reset(new iterator(*this, PP));
return *It;
}
/// Return an iterator to explore the cached context around \p PP.
const_iterator &begin(const Instruction *PP) const {
return *InstructionIteratorMap.find(PP)->second;
}
/// Return an universal end iterator.
///{
iterator &end() { return EndIterator; }
iterator &end(const Instruction *) { return EndIterator; }
const_iterator &end() const { return EndIterator; }
const_iterator &end(const Instruction *) const { return EndIterator; }
///}
/// Return an iterator range to explore the context around \p PP.
llvm::iterator_range<iterator> range(const Instruction *PP) {
return llvm::make_range(begin(PP), end(PP));
}
/// Return an iterator range to explore the cached context around \p PP.
llvm::iterator_range<const_iterator> range(const Instruction *PP) const {
return llvm::make_range(begin(PP), end(PP));
}
///}
/// Check \p Pred on all instructions in the context.
///
/// This method will evaluate \p Pred and return
/// true if \p Pred holds in every instruction.
bool checkForAllContext(const Instruction *PP,
function_ref<bool(const Instruction *)> Pred) {
for (auto EIt = begin(PP), EEnd = end(PP); EIt != EEnd; ++EIt)
if (!Pred(*EIt))
return false;
return true;
}
/// Helper to look for \p I in the context of \p PP.
///
/// The context is expanded until \p I was found or no more expansion is
/// possible.
///
/// \returns True, iff \p I was found.
bool findInContextOf(const Instruction *I, const Instruction *PP) {
auto EIt = begin(PP), EEnd = end(PP);
return findInContextOf(I, EIt, EEnd);
}
/// Helper to look for \p I in the context defined by \p EIt and \p EEnd.
///
/// The context is expanded until \p I was found or no more expansion is
/// possible.
///
/// \returns True, iff \p I was found.
bool findInContextOf(const Instruction *I, iterator &EIt, iterator &EEnd) {
bool Found = EIt.count(I);
while (!Found && EIt != EEnd)
Found = (++EIt).getCurrentInst() == I;
return Found;
}
/// Return the next instruction that is guaranteed to be executed after \p PP.
///
/// \param It The iterator that is used to traverse the must be
/// executed context.
/// \param PP The program point for which the next instruction
/// that is guaranteed to execute is determined.
const Instruction *
getMustBeExecutedNextInstruction(MustBeExecutedIterator &It,
const Instruction *PP);
/// Return the previous instr. that is guaranteed to be executed before \p PP.
///
/// \param It The iterator that is used to traverse the must be
/// executed context.
/// \param PP The program point for which the previous instr.
/// that is guaranteed to execute is determined.
const Instruction *
getMustBeExecutedPrevInstruction(MustBeExecutedIterator &It,
const Instruction *PP);
/// Find the next join point from \p InitBB in forward direction.
const BasicBlock *findForwardJoinPoint(const BasicBlock *InitBB);
/// Find the next join point from \p InitBB in backward direction.
const BasicBlock *findBackwardJoinPoint(const BasicBlock *InitBB);
/// Parameter that limit the performed exploration. See the constructor for
/// their meaning.
///{
const bool ExploreInterBlock;
const bool ExploreCFGForward;
const bool ExploreCFGBackward;
///}
private:
/// Getters for common CFG analyses: LoopInfo, DominatorTree, and
/// PostDominatorTree.
///{
GetterTy<const LoopInfo> LIGetter;
GetterTy<const DominatorTree> DTGetter;
GetterTy<const PostDominatorTree> PDTGetter;
///}
/// Map to cache isGuaranteedToTransferExecutionToSuccessor results.
DenseMap<const BasicBlock *, std::optional<bool>> BlockTransferMap;
/// Map to cache containsIrreducibleCFG results.
DenseMap<const Function *, std::optional<bool>> IrreducibleControlMap;
/// Map from instructions to associated must be executed iterators.
DenseMap<const Instruction *, std::unique_ptr<MustBeExecutedIterator>>
InstructionIteratorMap;
/// A unique end iterator.
MustBeExecutedIterator EndIterator;
};
class MustExecutePrinterPass : public PassInfoMixin<MustExecutePrinterPass> {
raw_ostream &OS;
public:
MustExecutePrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
class MustBeExecutedContextPrinterPass
: public PassInfoMixin<MustBeExecutedContextPrinterPass> {
raw_ostream &OS;
public:
MustBeExecutedContextPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
};
} // namespace llvm
#endif
PK iwFZ�֤B� � Analysis/BasicAliasAnalysis.hnu �[��� //===- BasicAliasAnalysis.h - Stateless, local Alias Analysis ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This is the interface for LLVM's primary stateless and local alias analysis.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_BASICALIASANALYSIS_H
#define LLVM_ANALYSIS_BASICALIASANALYSIS_H
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
#include <memory>
#include <optional>
#include <utility>
namespace llvm {
class AssumptionCache;
class DataLayout;
class DominatorTree;
class Function;
class GEPOperator;
class PHINode;
class SelectInst;
class TargetLibraryInfo;
class Value;
/// This is the AA result object for the basic, local, and stateless alias
/// analysis. It implements the AA query interface in an entirely stateless
/// manner. As one consequence, it is never invalidated due to IR changes.
/// While it does retain some storage, that is used as an optimization and not
/// to preserve information from query to query. However it does retain handles
/// to various other analyses and must be recomputed when those analyses are.
class BasicAAResult : public AAResultBase {
const DataLayout &DL;
const Function &F;
const TargetLibraryInfo &TLI;
AssumptionCache &AC;
DominatorTree *DT;
public:
BasicAAResult(const DataLayout &DL, const Function &F,
const TargetLibraryInfo &TLI, AssumptionCache &AC,
DominatorTree *DT = nullptr)
: DL(DL), F(F), TLI(TLI), AC(AC), DT(DT) {}
BasicAAResult(const BasicAAResult &Arg)
: AAResultBase(Arg), DL(Arg.DL), F(Arg.F), TLI(Arg.TLI), AC(Arg.AC),
DT(Arg.DT) {}
BasicAAResult(BasicAAResult &&Arg)
: AAResultBase(std::move(Arg)), DL(Arg.DL), F(Arg.F), TLI(Arg.TLI),
AC(Arg.AC), DT(Arg.DT) {}
/// Handle invalidation events in the new pass manager.
bool invalidate(Function &Fn, const PreservedAnalyses &PA,
FunctionAnalysisManager::Invalidator &Inv);
AliasResult alias(const MemoryLocation &LocA, const MemoryLocation &LocB,
AAQueryInfo &AAQI, const Instruction *CtxI);
ModRefInfo getModRefInfo(const CallBase *Call, const MemoryLocation &Loc,
AAQueryInfo &AAQI);
ModRefInfo getModRefInfo(const CallBase *Call1, const CallBase *Call2,
AAQueryInfo &AAQI);
/// Returns a bitmask that should be unconditionally applied to the ModRef
/// info of a memory location. This allows us to eliminate Mod and/or Ref
/// from the ModRef info based on the knowledge that the memory location
/// points to constant and/or locally-invariant memory.
///
/// If IgnoreLocals is true, then this method returns NoModRef for memory
/// that points to a local alloca.
ModRefInfo getModRefInfoMask(const MemoryLocation &Loc, AAQueryInfo &AAQI,
bool IgnoreLocals = false);
/// Get the location associated with a pointer argument of a callsite.
ModRefInfo getArgModRefInfo(const CallBase *Call, unsigned ArgIdx);
/// Returns the behavior when calling the given call site.
MemoryEffects getMemoryEffects(const CallBase *Call, AAQueryInfo &AAQI);
/// Returns the behavior when calling the given function. For use when the
/// call site is not known.
MemoryEffects getMemoryEffects(const Function *Fn);
private:
struct DecomposedGEP;
/// Tracks instructions visited by pointsToConstantMemory.
SmallPtrSet<const Value *, 16> Visited;
static DecomposedGEP
DecomposeGEPExpression(const Value *V, const DataLayout &DL,
AssumptionCache *AC, DominatorTree *DT);
/// A Heuristic for aliasGEP that searches for a constant offset
/// between the variables.
///
/// GetLinearExpression has some limitations, as generally zext(%x + 1)
/// != zext(%x) + zext(1) if the arithmetic overflows. GetLinearExpression
/// will therefore conservatively refuse to decompose these expressions.
/// However, we know that, for all %x, zext(%x) != zext(%x + 1), even if
/// the addition overflows.
bool constantOffsetHeuristic(const DecomposedGEP &GEP, LocationSize V1Size,
LocationSize V2Size, AssumptionCache *AC,
DominatorTree *DT, const AAQueryInfo &AAQI);
bool isValueEqualInPotentialCycles(const Value *V1, const Value *V2,
const AAQueryInfo &AAQI);
void subtractDecomposedGEPs(DecomposedGEP &DestGEP,
const DecomposedGEP &SrcGEP,
const AAQueryInfo &AAQI);
AliasResult aliasGEP(const GEPOperator *V1, LocationSize V1Size,
const Value *V2, LocationSize V2Size,
const Value *UnderlyingV1, const Value *UnderlyingV2,
AAQueryInfo &AAQI);
AliasResult aliasPHI(const PHINode *PN, LocationSize PNSize,
const Value *V2, LocationSize V2Size, AAQueryInfo &AAQI);
AliasResult aliasSelect(const SelectInst *SI, LocationSize SISize,
const Value *V2, LocationSize V2Size,
AAQueryInfo &AAQI);
AliasResult aliasCheck(const Value *V1, LocationSize V1Size, const Value *V2,
LocationSize V2Size, AAQueryInfo &AAQI,
const Instruction *CtxI);
AliasResult aliasCheckRecursive(const Value *V1, LocationSize V1Size,
const Value *V2, LocationSize V2Size,
AAQueryInfo &AAQI, const Value *O1,
const Value *O2);
};
/// Analysis pass providing a never-invalidated alias analysis result.
class BasicAA : public AnalysisInfoMixin<BasicAA> {
friend AnalysisInfoMixin<BasicAA>;
static AnalysisKey Key;
public:
using Result = BasicAAResult;
BasicAAResult run(Function &F, FunctionAnalysisManager &AM);
};
/// Legacy wrapper pass to provide the BasicAAResult object.
class BasicAAWrapperPass : public FunctionPass {
std::unique_ptr<BasicAAResult> Result;
virtual void anchor();
public:
static char ID;
BasicAAWrapperPass();
BasicAAResult &getResult() { return *Result; }
const BasicAAResult &getResult() const { return *Result; }
bool runOnFunction(Function &F) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
};
FunctionPass *createBasicAAWrapperPass();
} // end namespace llvm
#endif // LLVM_ANALYSIS_BASICALIASANALYSIS_H
PK iwFZ�L��� � Analysis/CmpInstAnalysis.hnu �[��� //===-- CmpInstAnalysis.h - Utils to help fold compare insts ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file holds routines to help analyse compare instructions
// and fold them into constants or other compare instructions
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_CMPINSTANALYSIS_H
#define LLVM_ANALYSIS_CMPINSTANALYSIS_H
#include "llvm/IR/InstrTypes.h"
namespace llvm {
class Type;
class Value;
/// Encode a icmp predicate into a three bit mask. These bits are carefully
/// arranged to allow folding of expressions such as:
///
/// (A < B) | (A > B) --> (A != B)
///
/// Note that this is only valid if the first and second predicates have the
/// same sign. It is illegal to do: (A u< B) | (A s> B)
///
/// Three bits are used to represent the condition, as follows:
/// 0 A > B
/// 1 A == B
/// 2 A < B
///
/// <=> Value Definition
/// 000 0 Always false
/// 001 1 A > B
/// 010 2 A == B
/// 011 3 A >= B
/// 100 4 A < B
/// 101 5 A != B
/// 110 6 A <= B
/// 111 7 Always true
///
unsigned getICmpCode(CmpInst::Predicate Pred);
/// This is the complement of getICmpCode. It turns a predicate code into
/// either a constant true or false or the predicate for a new ICmp.
/// The sign is passed in to determine which kind of predicate to use in the
/// new ICmp instruction.
/// Non-NULL return value will be a true or false constant.
/// NULL return means a new ICmp is needed. The predicate is output in Pred.
Constant *getPredForICmpCode(unsigned Code, bool Sign, Type *OpTy,
CmpInst::Predicate &Pred);
/// Return true if both predicates match sign or if at least one of them is an
/// equality comparison (which is signless).
bool predicatesFoldable(CmpInst::Predicate P1, CmpInst::Predicate P2);
/// Similar to getICmpCode but for FCmpInst. This encodes a fcmp predicate
/// into a four bit mask.
inline unsigned getFCmpCode(CmpInst::Predicate CC) {
assert(CmpInst::FCMP_FALSE <= CC && CC <= CmpInst::FCMP_TRUE &&
"Unexpected FCmp predicate!");
// Take advantage of the bit pattern of CmpInst::Predicate here.
// U L G E
static_assert(CmpInst::FCMP_FALSE == 0); // 0 0 0 0
static_assert(CmpInst::FCMP_OEQ == 1); // 0 0 0 1
static_assert(CmpInst::FCMP_OGT == 2); // 0 0 1 0
static_assert(CmpInst::FCMP_OGE == 3); // 0 0 1 1
static_assert(CmpInst::FCMP_OLT == 4); // 0 1 0 0
static_assert(CmpInst::FCMP_OLE == 5); // 0 1 0 1
static_assert(CmpInst::FCMP_ONE == 6); // 0 1 1 0
static_assert(CmpInst::FCMP_ORD == 7); // 0 1 1 1
static_assert(CmpInst::FCMP_UNO == 8); // 1 0 0 0
static_assert(CmpInst::FCMP_UEQ == 9); // 1 0 0 1
static_assert(CmpInst::FCMP_UGT == 10); // 1 0 1 0
static_assert(CmpInst::FCMP_UGE == 11); // 1 0 1 1
static_assert(CmpInst::FCMP_ULT == 12); // 1 1 0 0
static_assert(CmpInst::FCMP_ULE == 13); // 1 1 0 1
static_assert(CmpInst::FCMP_UNE == 14); // 1 1 1 0
static_assert(CmpInst::FCMP_TRUE == 15); // 1 1 1 1
return CC;
}
/// This is the complement of getFCmpCode. It turns a predicate code into
/// either a constant true or false or the predicate for a new FCmp.
/// Non-NULL return value will be a true or false constant.
/// NULL return means a new ICmp is needed. The predicate is output in Pred.
Constant *getPredForFCmpCode(unsigned Code, Type *OpTy,
CmpInst::Predicate &Pred);
/// Decompose an icmp into the form ((X & Mask) pred 0) if possible. The
/// returned predicate is either == or !=. Returns false if decomposition
/// fails.
bool decomposeBitTestICmp(Value *LHS, Value *RHS, CmpInst::Predicate &Pred,
Value *&X, APInt &Mask,
bool LookThroughTrunc = true);
} // end namespace llvm
#endif
PK iwFZ �jP� � Analysis/ReplayInlineAdvisor.hnu �[��� //===- ReplayInlineAdvisor.h - Replay Inline Advisor interface -*- C++ --*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
#ifndef LLVM_ANALYSIS_REPLAYINLINEADVISOR_H
#define LLVM_ANALYSIS_REPLAYINLINEADVISOR_H
#include "llvm/ADT/StringSet.h"
#include "llvm/Analysis/InlineAdvisor.h"
namespace llvm {
class CallBase;
class Function;
class LLVMContext;
class Module;
struct CallSiteFormat {
enum class Format : int {
Line,
LineColumn,
LineDiscriminator,
LineColumnDiscriminator
};
bool outputColumn() const {
return OutputFormat == Format::LineColumn ||
OutputFormat == Format::LineColumnDiscriminator;
}
bool outputDiscriminator() const {
return OutputFormat == Format::LineDiscriminator ||
OutputFormat == Format::LineColumnDiscriminator;
}
Format OutputFormat;
};
/// Replay Inliner Setup
struct ReplayInlinerSettings {
enum class Scope : int { Function, Module };
enum class Fallback : int { Original, AlwaysInline, NeverInline };
StringRef ReplayFile;
Scope ReplayScope;
Fallback ReplayFallback;
CallSiteFormat ReplayFormat;
};
/// Get call site location as a string with the given format
std::string formatCallSiteLocation(DebugLoc DLoc, const CallSiteFormat &Format);
std::unique_ptr<InlineAdvisor>
getReplayInlineAdvisor(Module &M, FunctionAnalysisManager &FAM,
LLVMContext &Context,
std::unique_ptr<InlineAdvisor> OriginalAdvisor,
const ReplayInlinerSettings &ReplaySettings,
bool EmitRemarks, InlineContext IC);
/// Replay inline advisor that uses optimization remarks from inlining of
/// previous build to guide current inlining. This is useful for inliner tuning.
class ReplayInlineAdvisor : public InlineAdvisor {
public:
ReplayInlineAdvisor(Module &M, FunctionAnalysisManager &FAM,
LLVMContext &Context,
std::unique_ptr<InlineAdvisor> OriginalAdvisor,
const ReplayInlinerSettings &ReplaySettings,
bool EmitRemarks, InlineContext IC);
std::unique_ptr<InlineAdvice> getAdviceImpl(CallBase &CB) override;
bool areReplayRemarksLoaded() const { return HasReplayRemarks; }
private:
bool hasInlineAdvice(Function &F) const {
return (ReplaySettings.ReplayScope ==
ReplayInlinerSettings::Scope::Module) ||
CallersToReplay.contains(F.getName());
}
std::unique_ptr<InlineAdvisor> OriginalAdvisor;
bool HasReplayRemarks = false;
const ReplayInlinerSettings ReplaySettings;
bool EmitRemarks = false;
StringMap<bool> InlineSitesFromRemarks;
StringSet<> CallersToReplay;
};
} // namespace llvm
#endif // LLVM_ANALYSIS_REPLAYINLINEADVISOR_H
PK iwFZ����N �N Analysis/DDG.hnu �[��� //===- llvm/Analysis/DDG.h --------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the Data-Dependence Graph (DDG).
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_DDG_H
#define LLVM_ANALYSIS_DDG_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DirectedGraph.h"
#include "llvm/Analysis/DependenceAnalysis.h"
#include "llvm/Analysis/DependenceGraphBuilder.h"
#include "llvm/Analysis/LoopAnalysisManager.h"
namespace llvm {
class Function;
class Loop;
class LoopInfo;
class DDGNode;
class DDGEdge;
using DDGNodeBase = DGNode<DDGNode, DDGEdge>;
using DDGEdgeBase = DGEdge<DDGNode, DDGEdge>;
using DDGBase = DirectedGraph<DDGNode, DDGEdge>;
class LPMUpdater;
/// Data Dependence Graph Node
/// The graph can represent the following types of nodes:
/// 1. Single instruction node containing just one instruction.
/// 2. Multiple instruction node where two or more instructions from
/// the same basic block are merged into one node.
/// 3. Pi-block node which is a group of other DDG nodes that are part of a
/// strongly-connected component of the graph.
/// A pi-block node contains more than one single or multiple instruction
/// nodes. The root node cannot be part of a pi-block.
/// 4. Root node is a special node that connects to all components such that
/// there is always a path from it to any node in the graph.
class DDGNode : public DDGNodeBase {
public:
using InstructionListType = SmallVectorImpl<Instruction *>;
enum class NodeKind {
Unknown,
SingleInstruction,
MultiInstruction,
PiBlock,
Root,
};
DDGNode() = delete;
DDGNode(const NodeKind K) : Kind(K) {}
DDGNode(const DDGNode &N) = default;
DDGNode(DDGNode &&N) : DDGNodeBase(std::move(N)), Kind(N.Kind) {}
virtual ~DDGNode() = 0;
DDGNode &operator=(const DDGNode &N) {
DGNode::operator=(N);
Kind = N.Kind;
return *this;
}
DDGNode &operator=(DDGNode &&N) {
DGNode::operator=(std::move(N));
Kind = N.Kind;
return *this;
}
/// Getter for the kind of this node.
NodeKind getKind() const { return Kind; }
/// Collect a list of instructions, in \p IList, for which predicate \p Pred
/// evaluates to true when iterating over instructions of this node. Return
/// true if at least one instruction was collected, and false otherwise.
bool collectInstructions(llvm::function_ref<bool(Instruction *)> const &Pred,
InstructionListType &IList) const;
protected:
/// Setter for the kind of this node.
void setKind(NodeKind K) { Kind = K; }
private:
NodeKind Kind;
};
/// Subclass of DDGNode representing the root node of the graph.
/// There should only be one such node in a given graph.
class RootDDGNode : public DDGNode {
public:
RootDDGNode() : DDGNode(NodeKind::Root) {}
RootDDGNode(const RootDDGNode &N) = delete;
RootDDGNode(RootDDGNode &&N) : DDGNode(std::move(N)) {}
~RootDDGNode() = default;
/// Define classof to be able to use isa<>, cast<>, dyn_cast<>, etc.
static bool classof(const DDGNode *N) {
return N->getKind() == NodeKind::Root;
}
static bool classof(const RootDDGNode *N) { return true; }
};
/// Subclass of DDGNode representing single or multi-instruction nodes.
class SimpleDDGNode : public DDGNode {
friend class DDGBuilder;
public:
SimpleDDGNode() = delete;
SimpleDDGNode(Instruction &I);
SimpleDDGNode(const SimpleDDGNode &N);
SimpleDDGNode(SimpleDDGNode &&N);
~SimpleDDGNode();
SimpleDDGNode &operator=(const SimpleDDGNode &N) = default;
SimpleDDGNode &operator=(SimpleDDGNode &&N) {
DDGNode::operator=(std::move(N));
InstList = std::move(N.InstList);
return *this;
}
/// Get the list of instructions in this node.
const InstructionListType &getInstructions() const {
assert(!InstList.empty() && "Instruction List is empty.");
return InstList;
}
InstructionListType &getInstructions() {
return const_cast<InstructionListType &>(
static_cast<const SimpleDDGNode *>(this)->getInstructions());
}
/// Get the first/last instruction in the node.
Instruction *getFirstInstruction() const { return getInstructions().front(); }
Instruction *getLastInstruction() const { return getInstructions().back(); }
/// Define classof to be able to use isa<>, cast<>, dyn_cast<>, etc.
static bool classof(const DDGNode *N) {
return N->getKind() == NodeKind::SingleInstruction ||
N->getKind() == NodeKind::MultiInstruction;
}
static bool classof(const SimpleDDGNode *N) { return true; }
private:
/// Append the list of instructions in \p Input to this node.
void appendInstructions(const InstructionListType &Input) {
setKind((InstList.size() == 0 && Input.size() == 1)
? NodeKind::SingleInstruction
: NodeKind::MultiInstruction);
llvm::append_range(InstList, Input);
}
void appendInstructions(const SimpleDDGNode &Input) {
appendInstructions(Input.getInstructions());
}
/// List of instructions associated with a single or multi-instruction node.
SmallVector<Instruction *, 2> InstList;
};
/// Subclass of DDGNode representing a pi-block. A pi-block represents a group
/// of DDG nodes that are part of a strongly-connected component of the graph.
/// Replacing all the SCCs with pi-blocks results in an acyclic representation
/// of the DDG. For example if we have:
/// {a -> b}, {b -> c, d}, {c -> a}
/// the cycle a -> b -> c -> a is abstracted into a pi-block "p" as follows:
/// {p -> d} with "p" containing: {a -> b}, {b -> c}, {c -> a}
class PiBlockDDGNode : public DDGNode {
public:
using PiNodeList = SmallVector<DDGNode *, 4>;
PiBlockDDGNode() = delete;
PiBlockDDGNode(const PiNodeList &List);
PiBlockDDGNode(const PiBlockDDGNode &N);
PiBlockDDGNode(PiBlockDDGNode &&N);
~PiBlockDDGNode();
PiBlockDDGNode &operator=(const PiBlockDDGNode &N) = default;
PiBlockDDGNode &operator=(PiBlockDDGNode &&N) {
DDGNode::operator=(std::move(N));
NodeList = std::move(N.NodeList);
return *this;
}
/// Get the list of nodes in this pi-block.
const PiNodeList &getNodes() const {
assert(!NodeList.empty() && "Node list is empty.");
return NodeList;
}
PiNodeList &getNodes() {
return const_cast<PiNodeList &>(
static_cast<const PiBlockDDGNode *>(this)->getNodes());
}
/// Define classof to be able to use isa<>, cast<>, dyn_cast<>, etc.
static bool classof(const DDGNode *N) {
return N->getKind() == NodeKind::PiBlock;
}
private:
/// List of nodes in this pi-block.
PiNodeList NodeList;
};
/// Data Dependency Graph Edge.
/// An edge in the DDG can represent a def-use relationship or
/// a memory dependence based on the result of DependenceAnalysis.
/// A rooted edge connects the root node to one of the components
/// of the graph.
class DDGEdge : public DDGEdgeBase {
public:
/// The kind of edge in the DDG
enum class EdgeKind {
Unknown,
RegisterDefUse,
MemoryDependence,
Rooted,
Last = Rooted // Must be equal to the largest enum value.
};
explicit DDGEdge(DDGNode &N) = delete;
DDGEdge(DDGNode &N, EdgeKind K) : DDGEdgeBase(N), Kind(K) {}
DDGEdge(const DDGEdge &E) : DDGEdgeBase(E), Kind(E.getKind()) {}
DDGEdge(DDGEdge &&E) : DDGEdgeBase(std::move(E)), Kind(E.Kind) {}
DDGEdge &operator=(const DDGEdge &E) = default;
DDGEdge &operator=(DDGEdge &&E) {
DDGEdgeBase::operator=(std::move(E));
Kind = E.Kind;
return *this;
}
/// Get the edge kind
EdgeKind getKind() const { return Kind; };
/// Return true if this is a def-use edge, and false otherwise.
bool isDefUse() const { return Kind == EdgeKind::RegisterDefUse; }
/// Return true if this is a memory dependence edge, and false otherwise.
bool isMemoryDependence() const { return Kind == EdgeKind::MemoryDependence; }
/// Return true if this is an edge stemming from the root node, and false
/// otherwise.
bool isRooted() const { return Kind == EdgeKind::Rooted; }
private:
EdgeKind Kind;
};
/// Encapsulate some common data and functionality needed for different
/// variations of data dependence graphs.
template <typename NodeType> class DependenceGraphInfo {
public:
using DependenceList = SmallVector<std::unique_ptr<Dependence>, 1>;
DependenceGraphInfo() = delete;
DependenceGraphInfo(const DependenceGraphInfo &G) = delete;
DependenceGraphInfo(const std::string &N, const DependenceInfo &DepInfo)
: Name(N), DI(DepInfo), Root(nullptr) {}
DependenceGraphInfo(DependenceGraphInfo &&G)
: Name(std::move(G.Name)), DI(std::move(G.DI)), Root(G.Root) {}
virtual ~DependenceGraphInfo() = default;
/// Return the label that is used to name this graph.
StringRef getName() const { return Name; }
/// Return the root node of the graph.
NodeType &getRoot() const {
assert(Root && "Root node is not available yet. Graph construction may "
"still be in progress\n");
return *Root;
}
/// Collect all the data dependency infos coming from any pair of memory
/// accesses from \p Src to \p Dst, and store them into \p Deps. Return true
/// if a dependence exists, and false otherwise.
bool getDependencies(const NodeType &Src, const NodeType &Dst,
DependenceList &Deps) const;
/// Return a string representing the type of dependence that the dependence
/// analysis identified between the two given nodes. This function assumes
/// that there is a memory dependence between the given two nodes.
std::string getDependenceString(const NodeType &Src,
const NodeType &Dst) const;
protected:
// Name of the graph.
std::string Name;
// Store a copy of DependenceInfo in the graph, so that individual memory
// dependencies don't need to be stored. Instead when the dependence is
// queried it is recomputed using @DI.
const DependenceInfo DI;
// A special node in the graph that has an edge to every connected component of
// the graph, to ensure all nodes are reachable in a graph walk.
NodeType *Root = nullptr;
};
using DDGInfo = DependenceGraphInfo<DDGNode>;
/// Data Dependency Graph
class DataDependenceGraph : public DDGBase, public DDGInfo {
friend AbstractDependenceGraphBuilder<DataDependenceGraph>;
friend class DDGBuilder;
public:
using NodeType = DDGNode;
using EdgeType = DDGEdge;
DataDependenceGraph() = delete;
DataDependenceGraph(const DataDependenceGraph &G) = delete;
DataDependenceGraph(DataDependenceGraph &&G)
: DDGBase(std::move(G)), DDGInfo(std::move(G)) {}
DataDependenceGraph(Function &F, DependenceInfo &DI);
DataDependenceGraph(Loop &L, LoopInfo &LI, DependenceInfo &DI);
~DataDependenceGraph();
/// If node \p N belongs to a pi-block return a pointer to the pi-block,
/// otherwise return null.
const PiBlockDDGNode *getPiBlock(const NodeType &N) const;
protected:
/// Add node \p N to the graph, if it's not added yet, and keep track of the
/// root node as well as pi-blocks and their members. Return true if node is
/// successfully added.
bool addNode(NodeType &N);
private:
using PiBlockMapType = DenseMap<const NodeType *, const PiBlockDDGNode *>;
/// Mapping from graph nodes to their containing pi-blocks. If a node is not
/// part of a pi-block, it will not appear in this map.
PiBlockMapType PiBlockMap;
};
/// Concrete implementation of a pure data dependence graph builder. This class
/// provides custom implementation for the pure-virtual functions used in the
/// generic dependence graph build algorithm.
///
/// For information about time complexity of the build algorithm see the
/// comments near the declaration of AbstractDependenceGraphBuilder.
class DDGBuilder : public AbstractDependenceGraphBuilder<DataDependenceGraph> {
public:
DDGBuilder(DataDependenceGraph &G, DependenceInfo &D,
const BasicBlockListType &BBs)
: AbstractDependenceGraphBuilder(G, D, BBs) {}
DDGNode &createRootNode() final {
auto *RN = new RootDDGNode();
assert(RN && "Failed to allocate memory for DDG root node.");
Graph.addNode(*RN);
return *RN;
}
DDGNode &createFineGrainedNode(Instruction &I) final {
auto *SN = new SimpleDDGNode(I);
assert(SN && "Failed to allocate memory for simple DDG node.");
Graph.addNode(*SN);
return *SN;
}
DDGNode &createPiBlock(const NodeListType &L) final {
auto *Pi = new PiBlockDDGNode(L);
assert(Pi && "Failed to allocate memory for pi-block node.");
Graph.addNode(*Pi);
return *Pi;
}
DDGEdge &createDefUseEdge(DDGNode &Src, DDGNode &Tgt) final {
auto *E = new DDGEdge(Tgt, DDGEdge::EdgeKind::RegisterDefUse);
assert(E && "Failed to allocate memory for edge");
Graph.connect(Src, Tgt, *E);
return *E;
}
DDGEdge &createMemoryEdge(DDGNode &Src, DDGNode &Tgt) final {
auto *E = new DDGEdge(Tgt, DDGEdge::EdgeKind::MemoryDependence);
assert(E && "Failed to allocate memory for edge");
Graph.connect(Src, Tgt, *E);
return *E;
}
DDGEdge &createRootedEdge(DDGNode &Src, DDGNode &Tgt) final {
auto *E = new DDGEdge(Tgt, DDGEdge::EdgeKind::Rooted);
assert(E && "Failed to allocate memory for edge");
assert(isa<RootDDGNode>(Src) && "Expected root node");
Graph.connect(Src, Tgt, *E);
return *E;
}
const NodeListType &getNodesInPiBlock(const DDGNode &N) final {
auto *PiNode = dyn_cast<const PiBlockDDGNode>(&N);
assert(PiNode && "Expected a pi-block node.");
return PiNode->getNodes();
}
/// Return true if the two nodes \pSrc and \pTgt are both simple nodes and
/// the consecutive instructions after merging belong to the same basic block.
bool areNodesMergeable(const DDGNode &Src, const DDGNode &Tgt) const final;
void mergeNodes(DDGNode &Src, DDGNode &Tgt) final;
bool shouldSimplify() const final;
bool shouldCreatePiBlocks() const final;
};
raw_ostream &operator<<(raw_ostream &OS, const DDGNode &N);
raw_ostream &operator<<(raw_ostream &OS, const DDGNode::NodeKind K);
raw_ostream &operator<<(raw_ostream &OS, const DDGEdge &E);
raw_ostream &operator<<(raw_ostream &OS, const DDGEdge::EdgeKind K);
raw_ostream &operator<<(raw_ostream &OS, const DataDependenceGraph &G);
//===--------------------------------------------------------------------===//
// DDG Analysis Passes
//===--------------------------------------------------------------------===//
/// Analysis pass that builds the DDG for a loop.
class DDGAnalysis : public AnalysisInfoMixin<DDGAnalysis> {
public:
using Result = std::unique_ptr<DataDependenceGraph>;
Result run(Loop &L, LoopAnalysisManager &AM, LoopStandardAnalysisResults &AR);
private:
friend AnalysisInfoMixin<DDGAnalysis>;
static AnalysisKey Key;
};
/// Textual printer pass for the DDG of a loop.
class DDGAnalysisPrinterPass : public PassInfoMixin<DDGAnalysisPrinterPass> {
public:
explicit DDGAnalysisPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Loop &L, LoopAnalysisManager &AM,
LoopStandardAnalysisResults &AR, LPMUpdater &U);
private:
raw_ostream &OS;
};
//===--------------------------------------------------------------------===//
// DependenceGraphInfo Implementation
//===--------------------------------------------------------------------===//
template <typename NodeType>
bool DependenceGraphInfo<NodeType>::getDependencies(
const NodeType &Src, const NodeType &Dst, DependenceList &Deps) const {
assert(Deps.empty() && "Expected empty output list at the start.");
// List of memory access instructions from src and dst nodes.
SmallVector<Instruction *, 8> SrcIList, DstIList;
auto isMemoryAccess = [](const Instruction *I) {
return I->mayReadOrWriteMemory();
};
Src.collectInstructions(isMemoryAccess, SrcIList);
Dst.collectInstructions(isMemoryAccess, DstIList);
for (auto *SrcI : SrcIList)
for (auto *DstI : DstIList)
if (auto Dep =
const_cast<DependenceInfo *>(&DI)->depends(SrcI, DstI, true))
Deps.push_back(std::move(Dep));
return !Deps.empty();
}
template <typename NodeType>
std::string
DependenceGraphInfo<NodeType>::getDependenceString(const NodeType &Src,
const NodeType &Dst) const {
std::string Str;
raw_string_ostream OS(Str);
DependenceList Deps;
if (!getDependencies(Src, Dst, Deps))
return OS.str();
interleaveComma(Deps, OS, [&](const std::unique_ptr<Dependence> &D) {
D->dump(OS);
// Remove the extra new-line character printed by the dump
// method
if (OS.str().back() == '\n')
OS.str().pop_back();
});
return OS.str();
}
//===--------------------------------------------------------------------===//
// GraphTraits specializations for the DDG
//===--------------------------------------------------------------------===//
/// non-const versions of the grapth trait specializations for DDG
template <> struct GraphTraits<DDGNode *> {
using NodeRef = DDGNode *;
static DDGNode *DDGGetTargetNode(DGEdge<DDGNode, DDGEdge> *P) {
return &P->getTargetNode();
}
// Provide a mapped iterator so that the GraphTrait-based implementations can
// find the target nodes without having to explicitly go through the edges.
using ChildIteratorType =
mapped_iterator<DDGNode::iterator, decltype(&DDGGetTargetNode)>;
using ChildEdgeIteratorType = DDGNode::iterator;
static NodeRef getEntryNode(NodeRef N) { return N; }
static ChildIteratorType child_begin(NodeRef N) {
return ChildIteratorType(N->begin(), &DDGGetTargetNode);
}
static ChildIteratorType child_end(NodeRef N) {
return ChildIteratorType(N->end(), &DDGGetTargetNode);
}
static ChildEdgeIteratorType child_edge_begin(NodeRef N) {
return N->begin();
}
static ChildEdgeIteratorType child_edge_end(NodeRef N) { return N->end(); }
};
template <>
struct GraphTraits<DataDependenceGraph *> : public GraphTraits<DDGNode *> {
using nodes_iterator = DataDependenceGraph::iterator;
static NodeRef getEntryNode(DataDependenceGraph *DG) {
return &DG->getRoot();
}
static nodes_iterator nodes_begin(DataDependenceGraph *DG) {
return DG->begin();
}
static nodes_iterator nodes_end(DataDependenceGraph *DG) { return DG->end(); }
};
/// const versions of the grapth trait specializations for DDG
template <> struct GraphTraits<const DDGNode *> {
using NodeRef = const DDGNode *;
static const DDGNode *DDGGetTargetNode(const DGEdge<DDGNode, DDGEdge> *P) {
return &P->getTargetNode();
}
// Provide a mapped iterator so that the GraphTrait-based implementations can
// find the target nodes without having to explicitly go through the edges.
using ChildIteratorType =
mapped_iterator<DDGNode::const_iterator, decltype(&DDGGetTargetNode)>;
using ChildEdgeIteratorType = DDGNode::const_iterator;
static NodeRef getEntryNode(NodeRef N) { return N; }
static ChildIteratorType child_begin(NodeRef N) {
return ChildIteratorType(N->begin(), &DDGGetTargetNode);
}
static ChildIteratorType child_end(NodeRef N) {
return ChildIteratorType(N->end(), &DDGGetTargetNode);
}
static ChildEdgeIteratorType child_edge_begin(NodeRef N) {
return N->begin();
}
static ChildEdgeIteratorType child_edge_end(NodeRef N) { return N->end(); }
};
template <>
struct GraphTraits<const DataDependenceGraph *>
: public GraphTraits<const DDGNode *> {
using nodes_iterator = DataDependenceGraph::const_iterator;
static NodeRef getEntryNode(const DataDependenceGraph *DG) {
return &DG->getRoot();
}
static nodes_iterator nodes_begin(const DataDependenceGraph *DG) {
return DG->begin();
}
static nodes_iterator nodes_end(const DataDependenceGraph *DG) {
return DG->end();
}
};
} // namespace llvm
#endif // LLVM_ANALYSIS_DDG_H
PK iwFZ{�սL L Analysis/Lint.hnu �[��� //===-- llvm/Analysis/Lint.h - LLVM IR Lint ---------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines lint interfaces that can be used for some validation of
// input to the system, and for checking that transformations haven't done
// something bad. In contrast to the Verifier, the Lint checker checks for
// undefined behavior or constructions with likely unintended behavior.
//
// To see what specifically is checked, look at Lint.cpp
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_LINT_H
#define LLVM_ANALYSIS_LINT_H
#include "llvm/IR/PassManager.h"
namespace llvm {
class Module;
class Function;
/// Lint a module.
///
/// This should only be used for debugging, because it plays games with
/// PassManagers and stuff.
void lintModule(const Module &M);
// Lint a function.
void lintFunction(const Function &F);
class LintPass : public PassInfoMixin<LintPass> {
public:
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
} // namespace llvm
#endif // LLVM_ANALYSIS_LINT_H
PK iwFZ���/ / ! Analysis/CFLSteensAliasAnalysis.hnu �[��� //==- CFLSteensAliasAnalysis.h - Unification-based Alias Analysis -*- C++-*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This is the interface for LLVM's unification-based alias analysis
/// implemented with CFL graph reachability.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_CFLSTEENSALIASANALYSIS_H
#define LLVM_ANALYSIS_CFLSTEENSALIASANALYSIS_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Analysis/CFLAliasAnalysisUtils.h"
#include "llvm/Analysis/MemoryLocation.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
#include <forward_list>
#include <memory>
namespace llvm {
class Function;
class TargetLibraryInfo;
namespace cflaa {
struct AliasSummary;
} // end namespace cflaa
class CFLSteensAAResult : public AAResultBase<CFLSteensAAResult> {
friend AAResultBase<CFLSteensAAResult>;
class FunctionInfo;
public:
explicit CFLSteensAAResult(
std::function<const TargetLibraryInfo &(Function &)> GetTLI);
CFLSteensAAResult(CFLSteensAAResult &&Arg);
~CFLSteensAAResult();
/// Handle invalidation events from the new pass manager.
///
/// By definition, this result is stateless and so remains valid.
bool invalidate(Function &, const PreservedAnalyses &,
FunctionAnalysisManager::Invalidator &) {
return false;
}
/// Inserts the given Function into the cache.
void scan(Function *Fn);
void evict(Function *Fn);
/// Ensures that the given function is available in the cache.
/// Returns the appropriate entry from the cache.
const Optional<FunctionInfo> &ensureCached(Function *Fn);
/// Get the alias summary for the given function
/// Return nullptr if the summary is not found or not available
const cflaa::AliasSummary *getAliasSummary(Function &Fn);
AliasResult query(const MemoryLocation &LocA, const MemoryLocation &LocB);
AliasResult alias(const MemoryLocation &LocA, const MemoryLocation &LocB,
AAQueryInfo &AAQI) {
if (LocA.Ptr == LocB.Ptr)
return AliasResult::MustAlias;
// Comparisons between global variables and other constants should be
// handled by BasicAA.
// CFLSteensAA may report NoAlias when comparing a GlobalValue and
// ConstantExpr, but every query needs to have at least one Value tied to a
// Function, and neither GlobalValues nor ConstantExprs are.
if (isa<Constant>(LocA.Ptr) && isa<Constant>(LocB.Ptr))
return AAResultBase::alias(LocA, LocB, AAQI);
AliasResult QueryResult = query(LocA, LocB);
if (QueryResult == AliasResult::MayAlias)
return AAResultBase::alias(LocA, LocB, AAQI);
return QueryResult;
}
private:
std::function<const TargetLibraryInfo &(Function &)> GetTLI;
/// Cached mapping of Functions to their StratifiedSets.
/// If a function's sets are currently being built, it is marked
/// in the cache as an Optional without a value. This way, if we
/// have any kind of recursion, it is discernable from a function
/// that simply has empty sets.
DenseMap<Function *, Optional<FunctionInfo>> Cache;
std::forward_list<cflaa::FunctionHandle<CFLSteensAAResult>> Handles;
FunctionInfo buildSetsFrom(Function *F);
};
/// Analysis pass providing a never-invalidated alias analysis result.
///
/// FIXME: We really should refactor CFL to use the analysis more heavily, and
/// in particular to leverage invalidation to trigger re-computation of sets.
class CFLSteensAA : public AnalysisInfoMixin<CFLSteensAA> {
friend AnalysisInfoMixin<CFLSteensAA>;
static AnalysisKey Key;
public:
using Result = CFLSteensAAResult;
CFLSteensAAResult run(Function &F, FunctionAnalysisManager &AM);
};
/// Legacy wrapper pass to provide the CFLSteensAAResult object.
class CFLSteensAAWrapperPass : public ImmutablePass {
std::unique_ptr<CFLSteensAAResult> Result;
public:
static char ID;
CFLSteensAAWrapperPass();
CFLSteensAAResult &getResult() { return *Result; }
const CFLSteensAAResult &getResult() const { return *Result; }
void initializePass() override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
};
// createCFLSteensAAWrapperPass - This pass implements a set-based approach to
// alias analysis.
ImmutablePass *createCFLSteensAAWrapperPass();
} // end namespace llvm
#endif // LLVM_ANALYSIS_CFLSTEENSALIASANALYSIS_H
PK iwFZr���8 8 Analysis/GlobalsModRef.hnu �[��� //===- GlobalsModRef.h - Simple Mod/Ref AA for Globals ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This is the interface for a simple mod/ref and alias analysis over globals.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_GLOBALSMODREF_H
#define LLVM_ANALYSIS_GLOBALSMODREF_H
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/IR/PassManager.h"
#include "llvm/IR/ValueHandle.h"
#include "llvm/Pass.h"
#include <list>
namespace llvm {
class CallGraph;
class Function;
/// An alias analysis result set for globals.
///
/// This focuses on handling aliasing properties of globals and interprocedural
/// function call mod/ref information.
class GlobalsAAResult : public AAResultBase {
class FunctionInfo;
const DataLayout &DL;
std::function<const TargetLibraryInfo &(Function &F)> GetTLI;
/// The globals that do not have their addresses taken.
SmallPtrSet<const GlobalValue *, 8> NonAddressTakenGlobals;
/// Are there functions with local linkage that may modify globals.
bool UnknownFunctionsWithLocalLinkage = false;
/// IndirectGlobals - The memory pointed to by this global is known to be
/// 'owned' by the global.
SmallPtrSet<const GlobalValue *, 8> IndirectGlobals;
/// AllocsForIndirectGlobals - If an instruction allocates memory for an
/// indirect global, this map indicates which one.
DenseMap<const Value *, const GlobalValue *> AllocsForIndirectGlobals;
/// For each function, keep track of what globals are modified or read.
DenseMap<const Function *, FunctionInfo> FunctionInfos;
/// A map of functions to SCC. The SCCs are described by a simple integer
/// ID that is only useful for comparing for equality (are two functions
/// in the same SCC or not?)
DenseMap<const Function *, unsigned> FunctionToSCCMap;
/// Handle to clear this analysis on deletion of values.
struct DeletionCallbackHandle final : CallbackVH {
GlobalsAAResult *GAR;
std::list<DeletionCallbackHandle>::iterator I;
DeletionCallbackHandle(GlobalsAAResult &GAR, Value *V)
: CallbackVH(V), GAR(&GAR) {}
void deleted() override;
};
/// List of callbacks for globals being tracked by this analysis. Note that
/// these objects are quite large, but we only anticipate having one per
/// global tracked by this analysis. There are numerous optimizations we
/// could perform to the memory utilization here if this becomes a problem.
std::list<DeletionCallbackHandle> Handles;
explicit GlobalsAAResult(
const DataLayout &DL,
std::function<const TargetLibraryInfo &(Function &F)> GetTLI);
friend struct RecomputeGlobalsAAPass;
public:
GlobalsAAResult(GlobalsAAResult &&Arg);
~GlobalsAAResult();
bool invalidate(Module &M, const PreservedAnalyses &PA,
ModuleAnalysisManager::Invalidator &);
static GlobalsAAResult
analyzeModule(Module &M,
std::function<const TargetLibraryInfo &(Function &F)> GetTLI,
CallGraph &CG);
//------------------------------------------------
// Implement the AliasAnalysis API
//
AliasResult alias(const MemoryLocation &LocA, const MemoryLocation &LocB,
AAQueryInfo &AAQI, const Instruction *CtxI);
using AAResultBase::getModRefInfo;
ModRefInfo getModRefInfo(const CallBase *Call, const MemoryLocation &Loc,
AAQueryInfo &AAQI);
using AAResultBase::getMemoryEffects;
/// getMemoryEffects - Return the behavior of the specified function if
/// called from the specified call site. The call site may be null in which
/// case the most generic behavior of this function should be returned.
MemoryEffects getMemoryEffects(const Function *F);
private:
FunctionInfo *getFunctionInfo(const Function *F);
void AnalyzeGlobals(Module &M);
void AnalyzeCallGraph(CallGraph &CG, Module &M);
bool AnalyzeUsesOfPointer(Value *V,
SmallPtrSetImpl<Function *> *Readers = nullptr,
SmallPtrSetImpl<Function *> *Writers = nullptr,
GlobalValue *OkayStoreDest = nullptr);
bool AnalyzeIndirectGlobalMemory(GlobalVariable *GV);
void CollectSCCMembership(CallGraph &CG);
bool isNonEscapingGlobalNoAlias(const GlobalValue *GV, const Value *V);
ModRefInfo getModRefInfoForArgument(const CallBase *Call,
const GlobalValue *GV, AAQueryInfo &AAQI);
};
/// Analysis pass providing a never-invalidated alias analysis result.
class GlobalsAA : public AnalysisInfoMixin<GlobalsAA> {
friend AnalysisInfoMixin<GlobalsAA>;
static AnalysisKey Key;
public:
typedef GlobalsAAResult Result;
GlobalsAAResult run(Module &M, ModuleAnalysisManager &AM);
};
struct RecomputeGlobalsAAPass : PassInfoMixin<RecomputeGlobalsAAPass> {
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
};
/// Legacy wrapper pass to provide the GlobalsAAResult object.
class GlobalsAAWrapperPass : public ModulePass {
std::unique_ptr<GlobalsAAResult> Result;
public:
static char ID;
GlobalsAAWrapperPass();
GlobalsAAResult &getResult() { return *Result; }
const GlobalsAAResult &getResult() const { return *Result; }
bool runOnModule(Module &M) override;
bool doFinalization(Module &M) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
};
//===--------------------------------------------------------------------===//
//
// createGlobalsAAWrapperPass - This pass provides alias and mod/ref info for
// global values that do not have their addresses taken.
//
ModulePass *createGlobalsAAWrapperPass();
}
#endif
PK iwFZ!EO�v v Analysis/ObjCARCInstKind.hnu �[��� //===- ObjCARCInstKind.h - ARC instruction equivalence classes --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_OBJCARCINSTKIND_H
#define LLVM_ANALYSIS_OBJCARCINSTKIND_H
#include "llvm/IR/Instructions.h"
namespace llvm {
namespace objcarc {
/// \enum ARCInstKind
///
/// Equivalence classes of instructions in the ARC Model.
///
/// Since we do not have "instructions" to represent ARC concepts in LLVM IR,
/// we instead operate on equivalence classes of instructions.
///
/// TODO: This should be split into two enums: a runtime entry point enum
/// (possibly united with the ARCRuntimeEntrypoint class) and an enum that deals
/// with effects of instructions in the ARC model (which would handle the notion
/// of a User or CallOrUser).
enum class ARCInstKind {
Retain, ///< objc_retain
RetainRV, ///< objc_retainAutoreleasedReturnValue
UnsafeClaimRV, ///< objc_unsafeClaimAutoreleasedReturnValue
RetainBlock, ///< objc_retainBlock
Release, ///< objc_release
Autorelease, ///< objc_autorelease
AutoreleaseRV, ///< objc_autoreleaseReturnValue
AutoreleasepoolPush, ///< objc_autoreleasePoolPush
AutoreleasepoolPop, ///< objc_autoreleasePoolPop
NoopCast, ///< objc_retainedObject, etc.
FusedRetainAutorelease, ///< objc_retainAutorelease
FusedRetainAutoreleaseRV, ///< objc_retainAutoreleaseReturnValue
LoadWeakRetained, ///< objc_loadWeakRetained (primitive)
StoreWeak, ///< objc_storeWeak (primitive)
InitWeak, ///< objc_initWeak (derived)
LoadWeak, ///< objc_loadWeak (derived)
MoveWeak, ///< objc_moveWeak (derived)
CopyWeak, ///< objc_copyWeak (derived)
DestroyWeak, ///< objc_destroyWeak (derived)
StoreStrong, ///< objc_storeStrong (derived)
IntrinsicUser, ///< llvm.objc.clang.arc.use
CallOrUser, ///< could call objc_release and/or "use" pointers
Call, ///< could call objc_release
User, ///< could "use" a pointer
None ///< anything that is inert from an ARC perspective.
};
raw_ostream &operator<<(raw_ostream &OS, const ARCInstKind Class);
/// Test if the given class is a kind of user.
bool IsUser(ARCInstKind Class);
/// Test if the given class is objc_retain or equivalent.
bool IsRetain(ARCInstKind Class);
/// Test if the given class is objc_autorelease or equivalent.
bool IsAutorelease(ARCInstKind Class);
/// Test if the given class represents instructions which return their
/// argument verbatim.
bool IsForwarding(ARCInstKind Class);
/// Test if the given class represents instructions which do nothing if
/// passed a null pointer.
bool IsNoopOnNull(ARCInstKind Class);
/// Test if the given class represents instructions which do nothing if
/// passed a global variable.
bool IsNoopOnGlobal(ARCInstKind Class);
/// Test if the given class represents instructions which are always safe
/// to mark with the "tail" keyword.
bool IsAlwaysTail(ARCInstKind Class);
/// Test if the given class represents instructions which are never safe
/// to mark with the "tail" keyword.
bool IsNeverTail(ARCInstKind Class);
/// Test if the given class represents instructions which are always safe
/// to mark with the nounwind attribute.
bool IsNoThrow(ARCInstKind Class);
/// Test whether the given instruction can autorelease any pointer or cause an
/// autoreleasepool pop.
bool CanInterruptRV(ARCInstKind Class);
/// Determine if F is one of the special known Functions. If it isn't,
/// return ARCInstKind::CallOrUser.
ARCInstKind GetFunctionClass(const Function *F);
/// Determine which objc runtime call instruction class V belongs to.
///
/// This is similar to GetARCInstKind except that it only detects objc
/// runtime calls. This allows it to be faster.
///
inline ARCInstKind GetBasicARCInstKind(const Value *V) {
if (const CallInst *CI = dyn_cast<CallInst>(V)) {
if (const Function *F = CI->getCalledFunction())
return GetFunctionClass(F);
// Otherwise, be conservative.
return ARCInstKind::CallOrUser;
}
// Otherwise, be conservative.
return isa<InvokeInst>(V) ? ARCInstKind::CallOrUser : ARCInstKind::User;
}
/// Map V to its ARCInstKind equivalence class.
ARCInstKind GetARCInstKind(const Value *V);
/// Returns false if conservatively we can prove that any instruction mapped to
/// this kind can not decrement ref counts. Returns true otherwise.
bool CanDecrementRefCount(ARCInstKind Kind);
} // end namespace objcarc
} // end namespace llvm
#endif
PK iwFZ��m�B� B� Analysis/ValueTracking.hnu �[��� //===- llvm/Analysis/ValueTracking.h - Walk computations --------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains routines that help analyze properties that chains of
// computations have.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_VALUETRACKING_H
#define LLVM_ANALYSIS_VALUETRACKING_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/InstrTypes.h"
#include "llvm/IR/Intrinsics.h"
#include <cassert>
#include <cstdint>
namespace llvm {
class Operator;
class AddOperator;
class AllocaInst;
class APInt;
class AssumptionCache;
class DominatorTree;
class GEPOperator;
class LoadInst;
class WithOverflowInst;
struct KnownBits;
class Loop;
class LoopInfo;
class MDNode;
struct SimplifyQuery;
class StringRef;
class TargetLibraryInfo;
class Value;
constexpr unsigned MaxAnalysisRecursionDepth = 6;
/// Determine which bits of V are known to be either zero or one and return
/// them in the KnownZero/KnownOne bit sets.
///
/// This function is defined on values with integer type, values with pointer
/// type, and vectors of integers. In the case
/// where V is a vector, the known zero and known one values are the
/// same width as the vector element, and the bit is set only if it is true
/// for all of the elements in the vector.
void computeKnownBits(const Value *V, KnownBits &Known, const DataLayout &DL,
unsigned Depth = 0, AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr,
const DominatorTree *DT = nullptr,
bool UseInstrInfo = true);
/// Determine which bits of V are known to be either zero or one and return
/// them in the KnownZero/KnownOne bit sets.
///
/// This function is defined on values with integer type, values with pointer
/// type, and vectors of integers. In the case
/// where V is a vector, the known zero and known one values are the
/// same width as the vector element, and the bit is set only if it is true
/// for all of the demanded elements in the vector.
void computeKnownBits(const Value *V, const APInt &DemandedElts,
KnownBits &Known, const DataLayout &DL,
unsigned Depth = 0, AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr,
const DominatorTree *DT = nullptr,
bool UseInstrInfo = true);
/// Returns the known bits rather than passing by reference.
KnownBits computeKnownBits(const Value *V, const DataLayout &DL,
unsigned Depth = 0, AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr,
const DominatorTree *DT = nullptr,
bool UseInstrInfo = true);
/// Returns the known bits rather than passing by reference.
KnownBits computeKnownBits(const Value *V, const APInt &DemandedElts,
const DataLayout &DL, unsigned Depth = 0,
AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr,
const DominatorTree *DT = nullptr,
bool UseInstrInfo = true);
/// Compute known bits from the range metadata.
/// \p KnownZero the set of bits that are known to be zero
/// \p KnownOne the set of bits that are known to be one
void computeKnownBitsFromRangeMetadata(const MDNode &Ranges, KnownBits &Known);
/// Merge bits known from assumes into Known.
void computeKnownBitsFromAssume(const Value *V, KnownBits &Known,
unsigned Depth, const SimplifyQuery &Q);
/// Using KnownBits LHS/RHS produce the known bits for logic op (and/xor/or).
KnownBits analyzeKnownBitsFromAndXorOr(
const Operator *I, const KnownBits &KnownLHS, const KnownBits &KnownRHS,
unsigned Depth, const DataLayout &DL, AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr, const DominatorTree *DT = nullptr,
bool UseInstrInfo = true);
/// Return true if LHS and RHS have no common bits set.
bool haveNoCommonBitsSet(const Value *LHS, const Value *RHS,
const DataLayout &DL, AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr,
const DominatorTree *DT = nullptr,
bool UseInstrInfo = true);
/// Return true if the given value is known to have exactly one bit set when
/// defined. For vectors return true if every element is known to be a power
/// of two when defined. Supports values with integer or pointer type and
/// vectors of integers. If 'OrZero' is set, then return true if the given
/// value is either a power of two or zero.
bool isKnownToBeAPowerOfTwo(const Value *V, const DataLayout &DL,
bool OrZero = false, unsigned Depth = 0,
AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr,
const DominatorTree *DT = nullptr,
bool UseInstrInfo = true);
bool isOnlyUsedInZeroEqualityComparison(const Instruction *CxtI);
/// Return true if the given value is known to be non-zero when defined. For
/// vectors, return true if every element is known to be non-zero when
/// defined. For pointers, if the context instruction and dominator tree are
/// specified, perform context-sensitive analysis and return true if the
/// pointer couldn't possibly be null at the specified instruction.
/// Supports values with integer or pointer type and vectors of integers.
bool isKnownNonZero(const Value *V, const DataLayout &DL, unsigned Depth = 0,
AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr,
const DominatorTree *DT = nullptr,
bool UseInstrInfo = true);
/// Return true if the two given values are negation.
/// Currently can recoginze Value pair:
/// 1: <X, Y> if X = sub (0, Y) or Y = sub (0, X)
/// 2: <X, Y> if X = sub (A, B) and Y = sub (B, A)
bool isKnownNegation(const Value *X, const Value *Y, bool NeedNSW = false);
/// Returns true if the give value is known to be non-negative.
bool isKnownNonNegative(const Value *V, const DataLayout &DL,
unsigned Depth = 0, AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr,
const DominatorTree *DT = nullptr,
bool UseInstrInfo = true);
/// Returns true if the given value is known be positive (i.e. non-negative
/// and non-zero).
bool isKnownPositive(const Value *V, const DataLayout &DL, unsigned Depth = 0,
AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr,
const DominatorTree *DT = nullptr,
bool UseInstrInfo = true);
/// Returns true if the given value is known be negative (i.e. non-positive
/// and non-zero).
bool isKnownNegative(const Value *V, const DataLayout &DL, unsigned Depth = 0,
AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr,
const DominatorTree *DT = nullptr,
bool UseInstrInfo = true);
/// Return true if the given values are known to be non-equal when defined.
/// Supports scalar integer types only.
bool isKnownNonEqual(const Value *V1, const Value *V2, const DataLayout &DL,
AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr,
const DominatorTree *DT = nullptr,
bool UseInstrInfo = true);
/// Return true if 'V & Mask' is known to be zero. We use this predicate to
/// simplify operations downstream. Mask is known to be zero for bits that V
/// cannot have.
///
/// This function is defined on values with integer type, values with pointer
/// type, and vectors of integers. In the case
/// where V is a vector, the mask, known zero, and known one values are the
/// same width as the vector element, and the bit is set only if it is true
/// for all of the elements in the vector.
bool MaskedValueIsZero(const Value *V, const APInt &Mask, const DataLayout &DL,
unsigned Depth = 0, AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr,
const DominatorTree *DT = nullptr,
bool UseInstrInfo = true);
/// Return the number of times the sign bit of the register is replicated into
/// the other bits. We know that at least 1 bit is always equal to the sign
/// bit (itself), but other cases can give us information. For example,
/// immediately after an "ashr X, 2", we know that the top 3 bits are all
/// equal to each other, so we return 3. For vectors, return the number of
/// sign bits for the vector element with the mininum number of known sign
/// bits.
unsigned ComputeNumSignBits(const Value *Op, const DataLayout &DL,
unsigned Depth = 0, AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr,
const DominatorTree *DT = nullptr,
bool UseInstrInfo = true);
/// Get the upper bound on bit size for this Value \p Op as a signed integer.
/// i.e. x == sext(trunc(x to MaxSignificantBits) to bitwidth(x)).
/// Similar to the APInt::getSignificantBits function.
unsigned ComputeMaxSignificantBits(const Value *Op, const DataLayout &DL,
unsigned Depth = 0,
AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr,
const DominatorTree *DT = nullptr);
/// Map a call instruction to an intrinsic ID. Libcalls which have equivalent
/// intrinsics are treated as-if they were intrinsics.
Intrinsic::ID getIntrinsicForCallSite(const CallBase &CB,
const TargetLibraryInfo *TLI);
/// Returns a pair of values, which if passed to llvm.is.fpclass, returns the
/// same result as an fcmp with the given operands.
///
/// If \p LookThroughSrc is true, consider the input value when computing the
/// mask.
///
/// If \p LookThroughSrc is false, ignore the source value (i.e. the first pair
/// element will always be LHS.
std::pair<Value *, FPClassTest> fcmpToClassTest(CmpInst::Predicate Pred,
const Function &F, Value *LHS,
Value *RHS,
bool LookThroughSrc = true);
struct KnownFPClass {
/// Floating-point classes the value could be one of.
FPClassTest KnownFPClasses = fcAllFlags;
/// std::nullopt if the sign bit is unknown, true if the sign bit is
/// definitely set or false if the sign bit is definitely unset.
std::optional<bool> SignBit;
/// Return true if it's known this can never be one of the mask entries.
bool isKnownNever(FPClassTest Mask) const {
return (KnownFPClasses & Mask) == fcNone;
}
bool isUnknown() const {
return KnownFPClasses == fcAllFlags && !SignBit;
}
/// Return true if it's known this can never be a nan.
bool isKnownNeverNaN() const {
return isKnownNever(fcNan);
}
/// Return true if it's known this can never be an infinity.
bool isKnownNeverInfinity() const {
return isKnownNever(fcInf);
}
/// Return true if it's known this can never be +infinity.
bool isKnownNeverPosInfinity() const {
return isKnownNever(fcPosInf);
}
/// Return true if it's known this can never be -infinity.
bool isKnownNeverNegInfinity() const {
return isKnownNever(fcNegInf);
}
/// Return true if it's known this can never be a subnormal
bool isKnownNeverSubnormal() const {
return isKnownNever(fcSubnormal);
}
/// Return true if it's known this can never be a positive subnormal
bool isKnownNeverPosSubnormal() const {
return isKnownNever(fcPosSubnormal);
}
/// Return true if it's known this can never be a negative subnormal
bool isKnownNeverNegSubnormal() const {
return isKnownNever(fcNegSubnormal);
}
/// Return true if it's known this can never be a zero. This means a literal
/// [+-]0, and does not include denormal inputs implicitly treated as [+-]0.
bool isKnownNeverZero() const {
return isKnownNever(fcZero);
}
/// Return true if it's known this can never be a literal positive zero.
bool isKnownNeverPosZero() const {
return isKnownNever(fcPosZero);
}
/// Return true if it's known this can never be a negative zero. This means a
/// literal -0 and does not include denormal inputs implicitly treated as -0.
bool isKnownNeverNegZero() const {
return isKnownNever(fcNegZero);
}
/// Return true if it's know this can never be interpreted as a zero. This
/// extends isKnownNeverZero to cover the case where the assumed
/// floating-point mode for the function interprets denormals as zero.
bool isKnownNeverLogicalZero(const Function &F, Type *Ty) const;
/// Return true if it's know this can never be interpreted as a negative zero.
bool isKnownNeverLogicalNegZero(const Function &F, Type *Ty) const;
/// Return true if it's know this can never be interpreted as a positive zero.
bool isKnownNeverLogicalPosZero(const Function &F, Type *Ty) const;
static constexpr FPClassTest OrderedLessThanZeroMask =
fcNegSubnormal | fcNegNormal | fcNegInf;
static constexpr FPClassTest OrderedGreaterThanZeroMask =
fcPosSubnormal | fcPosNormal | fcPosInf;
/// Return true if we can prove that the analyzed floating-point value is
/// either NaN or never less than -0.0.
///
/// NaN --> true
/// +0 --> true
/// -0 --> true
/// x > +0 --> true
/// x < -0 --> false
bool cannotBeOrderedLessThanZero() const {
return isKnownNever(OrderedLessThanZeroMask);
}
/// Return true if we can prove that the analyzed floating-point value is
/// either NaN or never greater than -0.0.
/// NaN --> true
/// +0 --> true
/// -0 --> true
/// x > +0 --> false
/// x < -0 --> true
bool cannotBeOrderedGreaterThanZero() const {
return isKnownNever(OrderedGreaterThanZeroMask);
}
KnownFPClass &operator|=(const KnownFPClass &RHS) {
KnownFPClasses = KnownFPClasses | RHS.KnownFPClasses;
if (SignBit != RHS.SignBit)
SignBit = std::nullopt;
return *this;
}
void knownNot(FPClassTest RuleOut) {
KnownFPClasses = KnownFPClasses & ~RuleOut;
}
void fneg() {
KnownFPClasses = llvm::fneg(KnownFPClasses);
if (SignBit)
SignBit = !*SignBit;
}
void fabs() {
if (KnownFPClasses & fcNegZero)
KnownFPClasses |= fcPosZero;
if (KnownFPClasses & fcNegInf)
KnownFPClasses |= fcPosInf;
if (KnownFPClasses & fcNegSubnormal)
KnownFPClasses |= fcPosSubnormal;
if (KnownFPClasses & fcNegNormal)
KnownFPClasses |= fcPosNormal;
signBitMustBeZero();
}
/// Return true if the sign bit must be 0, ignoring the sign of nans.
bool signBitIsZeroOrNaN() const {
return isKnownNever(fcNegative);
}
/// Assume the sign bit is zero.
void signBitMustBeZero() {
KnownFPClasses &= (fcPositive | fcNan);
SignBit = false;
}
void copysign(const KnownFPClass &Sign) {
// Don't know anything about the sign of the source. Expand the possible set
// to its opposite sign pair.
if (KnownFPClasses & fcZero)
KnownFPClasses |= fcZero;
if (KnownFPClasses & fcSubnormal)
KnownFPClasses |= fcSubnormal;
if (KnownFPClasses & fcNormal)
KnownFPClasses |= fcNormal;
if (KnownFPClasses & fcInf)
KnownFPClasses |= fcInf;
// Sign bit is exactly preserved even for nans.
SignBit = Sign.SignBit;
// Clear sign bits based on the input sign mask.
if (Sign.isKnownNever(fcPositive | fcNan) || (SignBit && *SignBit))
KnownFPClasses &= (fcNegative | fcNan);
if (Sign.isKnownNever(fcNegative | fcNan) || (SignBit && !*SignBit))
KnownFPClasses &= (fcPositive | fcNan);
}
// Propagate knowledge that a non-NaN source implies the result can also not
// be a NaN. For unconstrained operations, signaling nans are not guaranteed
// to be quieted but cannot be introduced.
void propagateNaN(const KnownFPClass &Src, bool PreserveSign = false) {
if (Src.isKnownNever(fcNan)) {
knownNot(fcNan);
if (PreserveSign)
SignBit = Src.SignBit;
} else if (Src.isKnownNever(fcSNan))
knownNot(fcSNan);
}
/// Propagate knowledge from a source value that could be a denormal or
/// zero. We have to be conservative since output flushing is not guaranteed,
/// so known-never-zero may not hold.
///
/// This assumes a copy-like operation and will replace any currently known
/// information.
void propagateDenormal(const KnownFPClass &Src, const Function &F, Type *Ty);
/// Report known classes if \p Src is evaluated through a potentially
/// canonicalizing operation. We can assume signaling nans will not be
/// introduced, but cannot assume a denormal will be flushed under FTZ/DAZ.
///
/// This assumes a copy-like operation and will replace any currently known
/// information.
void propagateCanonicalizingSrc(const KnownFPClass &Src, const Function &F,
Type *Ty);
void resetAll() { *this = KnownFPClass(); }
};
inline KnownFPClass operator|(KnownFPClass LHS, const KnownFPClass &RHS) {
LHS |= RHS;
return LHS;
}
inline KnownFPClass operator|(const KnownFPClass &LHS, KnownFPClass &&RHS) {
RHS |= LHS;
return std::move(RHS);
}
/// Determine which floating-point classes are valid for \p V, and return them
/// in KnownFPClass bit sets.
///
/// This function is defined on values with floating-point type, values vectors
/// of floating-point type, and arrays of floating-point type.
/// \p InterestedClasses is a compile time optimization hint for which floating
/// point classes should be queried. Queries not specified in \p
/// InterestedClasses should be reliable if they are determined during the
/// query.
KnownFPClass computeKnownFPClass(
const Value *V, const APInt &DemandedElts, const DataLayout &DL,
FPClassTest InterestedClasses = fcAllFlags, unsigned Depth = 0,
const TargetLibraryInfo *TLI = nullptr, AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr, const DominatorTree *DT = nullptr,
bool UseInstrInfo = true);
KnownFPClass computeKnownFPClass(
const Value *V, const DataLayout &DL,
FPClassTest InterestedClasses = fcAllFlags, unsigned Depth = 0,
const TargetLibraryInfo *TLI = nullptr, AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr, const DominatorTree *DT = nullptr,
bool UseInstrInfo = true);
/// Return true if we can prove that the specified FP value is never equal to
/// -0.0. Users should use caution when considering PreserveSign
/// denormal-fp-math.
inline bool cannotBeNegativeZero(const Value *V, const DataLayout &DL,
const TargetLibraryInfo *TLI = nullptr,
unsigned Depth = 0,
AssumptionCache *AC = nullptr,
const Instruction *CtxI = nullptr,
const DominatorTree *DT = nullptr,
bool UseInstrInfo = true) {
KnownFPClass Known = computeKnownFPClass(V, DL, fcNegZero, Depth, TLI, AC,
CtxI, DT, UseInstrInfo);
return Known.isKnownNeverNegZero();
}
bool CannotBeOrderedLessThanZero(const Value *V, const DataLayout &DL,
const TargetLibraryInfo *TLI);
/// Return true if we can prove that the specified FP value is either NaN or
/// never less than -0.0.
///
/// NaN --> true
/// +0 --> true
/// -0 --> true
/// x > +0 --> true
/// x < -0 --> false
inline bool cannotBeOrderedLessThanZero(const Value *V, const DataLayout &DL,
const TargetLibraryInfo *TLI = nullptr,
unsigned Depth = 0,
AssumptionCache *AC = nullptr,
const Instruction *CtxI = nullptr,
const DominatorTree *DT = nullptr,
bool UseInstrInfo = true) {
KnownFPClass Known =
computeKnownFPClass(V, DL, KnownFPClass::OrderedLessThanZeroMask, Depth,
TLI, AC, CtxI, DT, UseInstrInfo);
return Known.cannotBeOrderedLessThanZero();
}
/// Return true if the floating-point scalar value is not an infinity or if
/// the floating-point vector value has no infinities. Return false if a value
/// could ever be infinity.
inline bool isKnownNeverInfinity(const Value *V, const DataLayout &DL,
const TargetLibraryInfo *TLI = nullptr,
unsigned Depth = 0,
AssumptionCache *AC = nullptr,
const Instruction *CtxI = nullptr,
const DominatorTree *DT = nullptr,
bool UseInstrInfo = true) {
KnownFPClass Known = computeKnownFPClass(V, DL, fcInf, Depth, TLI, AC, CtxI,
DT, UseInstrInfo);
return Known.isKnownNeverInfinity();
}
/// Return true if the floating-point value can never contain a NaN or infinity.
inline bool isKnownNeverInfOrNaN(
const Value *V, const DataLayout &DL, const TargetLibraryInfo *TLI,
unsigned Depth = 0, AssumptionCache *AC = nullptr,
const Instruction *CtxI = nullptr, const DominatorTree *DT = nullptr,
bool UseInstrInfo = true) {
KnownFPClass Known = computeKnownFPClass(V, DL, fcInf | fcNan, Depth, TLI, AC,
CtxI, DT, UseInstrInfo);
return Known.isKnownNeverNaN() && Known.isKnownNeverInfinity();
}
/// Return true if the floating-point scalar value is not a NaN or if the
/// floating-point vector value has no NaN elements. Return false if a value
/// could ever be NaN.
inline bool isKnownNeverNaN(const Value *V, const DataLayout &DL,
const TargetLibraryInfo *TLI, unsigned Depth = 0,
AssumptionCache *AC = nullptr,
const Instruction *CtxI = nullptr,
const DominatorTree *DT = nullptr,
bool UseInstrInfo = true) {
KnownFPClass Known = computeKnownFPClass(V, DL, fcNan, Depth, TLI, AC, CtxI,
DT, UseInstrInfo);
return Known.isKnownNeverNaN();
}
/// Return true if we can prove that the specified FP value's sign bit is 0.
///
/// NaN --> true/false (depending on the NaN's sign bit)
/// +0 --> true
/// -0 --> false
/// x > +0 --> true
/// x < -0 --> false
bool SignBitMustBeZero(const Value *V, const DataLayout &DL,
const TargetLibraryInfo *TLI);
/// If the specified value can be set by repeating the same byte in memory,
/// return the i8 value that it is represented with. This is true for all i8
/// values obviously, but is also true for i32 0, i32 -1, i16 0xF0F0, double
/// 0.0 etc. If the value can't be handled with a repeated byte store (e.g.
/// i16 0x1234), return null. If the value is entirely undef and padding,
/// return undef.
Value *isBytewiseValue(Value *V, const DataLayout &DL);
/// Given an aggregate and an sequence of indices, see if the scalar value
/// indexed is already around as a register, for example if it were inserted
/// directly into the aggregate.
///
/// If InsertBefore is not null, this function will duplicate (modified)
/// insertvalues when a part of a nested struct is extracted.
Value *FindInsertedValue(Value *V, ArrayRef<unsigned> idx_range,
Instruction *InsertBefore = nullptr);
/// Analyze the specified pointer to see if it can be expressed as a base
/// pointer plus a constant offset. Return the base and offset to the caller.
///
/// This is a wrapper around Value::stripAndAccumulateConstantOffsets that
/// creates and later unpacks the required APInt.
inline Value *GetPointerBaseWithConstantOffset(Value *Ptr, int64_t &Offset,
const DataLayout &DL,
bool AllowNonInbounds = true) {
APInt OffsetAPInt(DL.getIndexTypeSizeInBits(Ptr->getType()), 0);
Value *Base =
Ptr->stripAndAccumulateConstantOffsets(DL, OffsetAPInt, AllowNonInbounds);
Offset = OffsetAPInt.getSExtValue();
return Base;
}
inline const Value *
GetPointerBaseWithConstantOffset(const Value *Ptr, int64_t &Offset,
const DataLayout &DL,
bool AllowNonInbounds = true) {
return GetPointerBaseWithConstantOffset(const_cast<Value *>(Ptr), Offset, DL,
AllowNonInbounds);
}
/// Returns true if the GEP is based on a pointer to a string (array of
// \p CharSize integers) and is indexing into this string.
bool isGEPBasedOnPointerToString(const GEPOperator *GEP, unsigned CharSize = 8);
/// Represents offset+length into a ConstantDataArray.
struct ConstantDataArraySlice {
/// ConstantDataArray pointer. nullptr indicates a zeroinitializer (a valid
/// initializer, it just doesn't fit the ConstantDataArray interface).
const ConstantDataArray *Array;
/// Slice starts at this Offset.
uint64_t Offset;
/// Length of the slice.
uint64_t Length;
/// Moves the Offset and adjusts Length accordingly.
void move(uint64_t Delta) {
assert(Delta < Length);
Offset += Delta;
Length -= Delta;
}
/// Convenience accessor for elements in the slice.
uint64_t operator[](unsigned I) const {
return Array == nullptr ? 0 : Array->getElementAsInteger(I + Offset);
}
};
/// Returns true if the value \p V is a pointer into a ConstantDataArray.
/// If successful \p Slice will point to a ConstantDataArray info object
/// with an appropriate offset.
bool getConstantDataArrayInfo(const Value *V, ConstantDataArraySlice &Slice,
unsigned ElementSize, uint64_t Offset = 0);
/// This function computes the length of a null-terminated C string pointed to
/// by V. If successful, it returns true and returns the string in Str. If
/// unsuccessful, it returns false. This does not include the trailing null
/// character by default. If TrimAtNul is set to false, then this returns any
/// trailing null characters as well as any other characters that come after
/// it.
bool getConstantStringInfo(const Value *V, StringRef &Str,
bool TrimAtNul = true);
/// If we can compute the length of the string pointed to by the specified
/// pointer, return 'len+1'. If we can't, return 0.
uint64_t GetStringLength(const Value *V, unsigned CharSize = 8);
/// This function returns call pointer argument that is considered the same by
/// aliasing rules. You CAN'T use it to replace one value with another. If
/// \p MustPreserveNullness is true, the call must preserve the nullness of
/// the pointer.
const Value *getArgumentAliasingToReturnedPointer(const CallBase *Call,
bool MustPreserveNullness);
inline Value *getArgumentAliasingToReturnedPointer(CallBase *Call,
bool MustPreserveNullness) {
return const_cast<Value *>(getArgumentAliasingToReturnedPointer(
const_cast<const CallBase *>(Call), MustPreserveNullness));
}
/// {launder,strip}.invariant.group returns pointer that aliases its argument,
/// and it only captures pointer by returning it.
/// These intrinsics are not marked as nocapture, because returning is
/// considered as capture. The arguments are not marked as returned neither,
/// because it would make it useless. If \p MustPreserveNullness is true,
/// the intrinsic must preserve the nullness of the pointer.
bool isIntrinsicReturningPointerAliasingArgumentWithoutCapturing(
const CallBase *Call, bool MustPreserveNullness);
/// This method strips off any GEP address adjustments and pointer casts from
/// the specified value, returning the original object being addressed. Note
/// that the returned value has pointer type if the specified value does. If
/// the MaxLookup value is non-zero, it limits the number of instructions to
/// be stripped off.
const Value *getUnderlyingObject(const Value *V, unsigned MaxLookup = 6);
inline Value *getUnderlyingObject(Value *V, unsigned MaxLookup = 6) {
// Force const to avoid infinite recursion.
const Value *VConst = V;
return const_cast<Value *>(getUnderlyingObject(VConst, MaxLookup));
}
/// This method is similar to getUnderlyingObject except that it can
/// look through phi and select instructions and return multiple objects.
///
/// If LoopInfo is passed, loop phis are further analyzed. If a pointer
/// accesses different objects in each iteration, we don't look through the
/// phi node. E.g. consider this loop nest:
///
/// int **A;
/// for (i)
/// for (j) {
/// A[i][j] = A[i-1][j] * B[j]
/// }
///
/// This is transformed by Load-PRE to stash away A[i] for the next iteration
/// of the outer loop:
///
/// Curr = A[0]; // Prev_0
/// for (i: 1..N) {
/// Prev = Curr; // Prev = PHI (Prev_0, Curr)
/// Curr = A[i];
/// for (j: 0..N) {
/// Curr[j] = Prev[j] * B[j]
/// }
/// }
///
/// Since A[i] and A[i-1] are independent pointers, getUnderlyingObjects
/// should not assume that Curr and Prev share the same underlying object thus
/// it shouldn't look through the phi above.
void getUnderlyingObjects(const Value *V,
SmallVectorImpl<const Value *> &Objects,
LoopInfo *LI = nullptr, unsigned MaxLookup = 6);
/// This is a wrapper around getUnderlyingObjects and adds support for basic
/// ptrtoint+arithmetic+inttoptr sequences.
bool getUnderlyingObjectsForCodeGen(const Value *V,
SmallVectorImpl<Value *> &Objects);
/// Returns unique alloca where the value comes from, or nullptr.
/// If OffsetZero is true check that V points to the begining of the alloca.
AllocaInst *findAllocaForValue(Value *V, bool OffsetZero = false);
inline const AllocaInst *findAllocaForValue(const Value *V,
bool OffsetZero = false) {
return findAllocaForValue(const_cast<Value *>(V), OffsetZero);
}
/// Return true if the only users of this pointer are lifetime markers.
bool onlyUsedByLifetimeMarkers(const Value *V);
/// Return true if the only users of this pointer are lifetime markers or
/// droppable instructions.
bool onlyUsedByLifetimeMarkersOrDroppableInsts(const Value *V);
/// Return true if speculation of the given load must be suppressed to avoid
/// ordering or interfering with an active sanitizer. If not suppressed,
/// dereferenceability and alignment must be proven separately. Note: This
/// is only needed for raw reasoning; if you use the interface below
/// (isSafeToSpeculativelyExecute), this is handled internally.
bool mustSuppressSpeculation(const LoadInst &LI);
/// Return true if the instruction does not have any effects besides
/// calculating the result and does not have undefined behavior.
///
/// This method never returns true for an instruction that returns true for
/// mayHaveSideEffects; however, this method also does some other checks in
/// addition. It checks for undefined behavior, like dividing by zero or
/// loading from an invalid pointer (but not for undefined results, like a
/// shift with a shift amount larger than the width of the result). It checks
/// for malloc and alloca because speculatively executing them might cause a
/// memory leak. It also returns false for instructions related to control
/// flow, specifically terminators and PHI nodes.
///
/// If the CtxI is specified this method performs context-sensitive analysis
/// and returns true if it is safe to execute the instruction immediately
/// before the CtxI.
///
/// If the CtxI is NOT specified this method only looks at the instruction
/// itself and its operands, so if this method returns true, it is safe to
/// move the instruction as long as the correct dominance relationships for
/// the operands and users hold.
///
/// This method can return true for instructions that read memory;
/// for such instructions, moving them may change the resulting value.
bool isSafeToSpeculativelyExecute(const Instruction *I,
const Instruction *CtxI = nullptr,
AssumptionCache *AC = nullptr,
const DominatorTree *DT = nullptr,
const TargetLibraryInfo *TLI = nullptr);
/// This returns the same result as isSafeToSpeculativelyExecute if Opcode is
/// the actual opcode of Inst. If the provided and actual opcode differ, the
/// function (virtually) overrides the opcode of Inst with the provided
/// Opcode. There are come constraints in this case:
/// * If Opcode has a fixed number of operands (eg, as binary operators do),
/// then Inst has to have at least as many leading operands. The function
/// will ignore all trailing operands beyond that number.
/// * If Opcode allows for an arbitrary number of operands (eg, as CallInsts
/// do), then all operands are considered.
/// * The virtual instruction has to satisfy all typing rules of the provided
/// Opcode.
/// * This function is pessimistic in the following sense: If one actually
/// materialized the virtual instruction, then isSafeToSpeculativelyExecute
/// may say that the materialized instruction is speculatable whereas this
/// function may have said that the instruction wouldn't be speculatable.
/// This behavior is a shortcoming in the current implementation and not
/// intentional.
bool isSafeToSpeculativelyExecuteWithOpcode(
unsigned Opcode, const Instruction *Inst, const Instruction *CtxI = nullptr,
AssumptionCache *AC = nullptr, const DominatorTree *DT = nullptr,
const TargetLibraryInfo *TLI = nullptr);
/// Returns true if the result or effects of the given instructions \p I
/// depend values not reachable through the def use graph.
/// * Memory dependence arises for example if the instruction reads from
/// memory or may produce effects or undefined behaviour. Memory dependent
/// instructions generally cannot be reorderd with respect to other memory
/// dependent instructions.
/// * Control dependence arises for example if the instruction may fault
/// if lifted above a throwing call or infinite loop.
bool mayHaveNonDefUseDependency(const Instruction &I);
/// Return true if it is an intrinsic that cannot be speculated but also
/// cannot trap.
bool isAssumeLikeIntrinsic(const Instruction *I);
/// Return true if it is valid to use the assumptions provided by an
/// assume intrinsic, I, at the point in the control-flow identified by the
/// context instruction, CxtI.
bool isValidAssumeForContext(const Instruction *I, const Instruction *CxtI,
const DominatorTree *DT = nullptr);
enum class OverflowResult {
/// Always overflows in the direction of signed/unsigned min value.
AlwaysOverflowsLow,
/// Always overflows in the direction of signed/unsigned max value.
AlwaysOverflowsHigh,
/// May or may not overflow.
MayOverflow,
/// Never overflows.
NeverOverflows,
};
OverflowResult computeOverflowForUnsignedMul(const Value *LHS, const Value *RHS,
const DataLayout &DL,
AssumptionCache *AC,
const Instruction *CxtI,
const DominatorTree *DT,
bool UseInstrInfo = true);
OverflowResult computeOverflowForSignedMul(const Value *LHS, const Value *RHS,
const DataLayout &DL,
AssumptionCache *AC,
const Instruction *CxtI,
const DominatorTree *DT,
bool UseInstrInfo = true);
OverflowResult computeOverflowForUnsignedAdd(const Value *LHS, const Value *RHS,
const DataLayout &DL,
AssumptionCache *AC,
const Instruction *CxtI,
const DominatorTree *DT,
bool UseInstrInfo = true);
OverflowResult computeOverflowForSignedAdd(const Value *LHS, const Value *RHS,
const DataLayout &DL,
AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr,
const DominatorTree *DT = nullptr);
/// This version also leverages the sign bit of Add if known.
OverflowResult computeOverflowForSignedAdd(const AddOperator *Add,
const DataLayout &DL,
AssumptionCache *AC = nullptr,
const Instruction *CxtI = nullptr,
const DominatorTree *DT = nullptr);
OverflowResult computeOverflowForUnsignedSub(const Value *LHS, const Value *RHS,
const DataLayout &DL,
AssumptionCache *AC,
const Instruction *CxtI,
const DominatorTree *DT);
OverflowResult computeOverflowForSignedSub(const Value *LHS, const Value *RHS,
const DataLayout &DL,
AssumptionCache *AC,
const Instruction *CxtI,
const DominatorTree *DT);
/// Returns true if the arithmetic part of the \p WO 's result is
/// used only along the paths control dependent on the computation
/// not overflowing, \p WO being an <op>.with.overflow intrinsic.
bool isOverflowIntrinsicNoWrap(const WithOverflowInst *WO,
const DominatorTree &DT);
/// Determine the possible constant range of vscale with the given bit width,
/// based on the vscale_range function attribute.
ConstantRange getVScaleRange(const Function *F, unsigned BitWidth);
/// Determine the possible constant range of an integer or vector of integer
/// value. This is intended as a cheap, non-recursive check.
ConstantRange computeConstantRange(const Value *V, bool ForSigned,
bool UseInstrInfo = true,
AssumptionCache *AC = nullptr,
const Instruction *CtxI = nullptr,
const DominatorTree *DT = nullptr,
unsigned Depth = 0);
/// Return true if this function can prove that the instruction I will
/// always transfer execution to one of its successors (including the next
/// instruction that follows within a basic block). E.g. this is not
/// guaranteed for function calls that could loop infinitely.
///
/// In other words, this function returns false for instructions that may
/// transfer execution or fail to transfer execution in a way that is not
/// captured in the CFG nor in the sequence of instructions within a basic
/// block.
///
/// Undefined behavior is assumed not to happen, so e.g. division is
/// guaranteed to transfer execution to the following instruction even
/// though division by zero might cause undefined behavior.
bool isGuaranteedToTransferExecutionToSuccessor(const Instruction *I);
/// Returns true if this block does not contain a potential implicit exit.
/// This is equivelent to saying that all instructions within the basic block
/// are guaranteed to transfer execution to their successor within the basic
/// block. This has the same assumptions w.r.t. undefined behavior as the
/// instruction variant of this function.
bool isGuaranteedToTransferExecutionToSuccessor(const BasicBlock *BB);
/// Return true if every instruction in the range (Begin, End) is
/// guaranteed to transfer execution to its static successor. \p ScanLimit
/// bounds the search to avoid scanning huge blocks.
bool isGuaranteedToTransferExecutionToSuccessor(
BasicBlock::const_iterator Begin, BasicBlock::const_iterator End,
unsigned ScanLimit = 32);
/// Same as previous, but with range expressed via iterator_range.
bool isGuaranteedToTransferExecutionToSuccessor(
iterator_range<BasicBlock::const_iterator> Range, unsigned ScanLimit = 32);
/// Return true if this function can prove that the instruction I
/// is executed for every iteration of the loop L.
///
/// Note that this currently only considers the loop header.
bool isGuaranteedToExecuteForEveryIteration(const Instruction *I,
const Loop *L);
/// Return true if \p PoisonOp's user yields poison or raises UB if its
/// operand \p PoisonOp is poison.
///
/// If \p PoisonOp is a vector or an aggregate and the operation's result is a
/// single value, any poison element in /p PoisonOp should make the result
/// poison or raise UB.
///
/// To filter out operands that raise UB on poison, you can use
/// getGuaranteedNonPoisonOp.
bool propagatesPoison(const Use &PoisonOp);
/// Insert operands of I into Ops such that I will trigger undefined behavior
/// if I is executed and that operand has a poison value.
void getGuaranteedNonPoisonOps(const Instruction *I,
SmallVectorImpl<const Value *> &Ops);
/// Insert operands of I into Ops such that I will trigger undefined behavior
/// if I is executed and that operand is not a well-defined value
/// (i.e. has undef bits or poison).
void getGuaranteedWellDefinedOps(const Instruction *I,
SmallVectorImpl<const Value *> &Ops);
/// Return true if the given instruction must trigger undefined behavior
/// when I is executed with any operands which appear in KnownPoison holding
/// a poison value at the point of execution.
bool mustTriggerUB(const Instruction *I,
const SmallPtrSetImpl<const Value *> &KnownPoison);
/// Return true if this function can prove that if Inst is executed
/// and yields a poison value or undef bits, then that will trigger
/// undefined behavior.
///
/// Note that this currently only considers the basic block that is
/// the parent of Inst.
bool programUndefinedIfUndefOrPoison(const Instruction *Inst);
bool programUndefinedIfPoison(const Instruction *Inst);
/// canCreateUndefOrPoison returns true if Op can create undef or poison from
/// non-undef & non-poison operands.
/// For vectors, canCreateUndefOrPoison returns true if there is potential
/// poison or undef in any element of the result when vectors without
/// undef/poison poison are given as operands.
/// For example, given `Op = shl <2 x i32> %x, <0, 32>`, this function returns
/// true. If Op raises immediate UB but never creates poison or undef
/// (e.g. sdiv I, 0), canCreatePoison returns false.
///
/// \p ConsiderFlagsAndMetadata controls whether poison producing flags and
/// metadata on the instruction are considered. This can be used to see if the
/// instruction could still introduce undef or poison even without poison
/// generating flags and metadata which might be on the instruction.
/// (i.e. could the result of Op->dropPoisonGeneratingFlags() still create
/// poison or undef)
///
/// canCreatePoison returns true if Op can create poison from non-poison
/// operands.
bool canCreateUndefOrPoison(const Operator *Op,
bool ConsiderFlagsAndMetadata = true);
bool canCreatePoison(const Operator *Op, bool ConsiderFlagsAndMetadata = true);
/// Return true if V is poison given that ValAssumedPoison is already poison.
/// For example, if ValAssumedPoison is `icmp X, 10` and V is `icmp X, 5`,
/// impliesPoison returns true.
bool impliesPoison(const Value *ValAssumedPoison, const Value *V);
/// Return true if this function can prove that V does not have undef bits
/// and is never poison. If V is an aggregate value or vector, check whether
/// all elements (except padding) are not undef or poison.
/// Note that this is different from canCreateUndefOrPoison because the
/// function assumes Op's operands are not poison/undef.
///
/// If CtxI and DT are specified this method performs flow-sensitive analysis
/// and returns true if it is guaranteed to be never undef or poison
/// immediately before the CtxI.
bool isGuaranteedNotToBeUndefOrPoison(const Value *V,
AssumptionCache *AC = nullptr,
const Instruction *CtxI = nullptr,
const DominatorTree *DT = nullptr,
unsigned Depth = 0);
bool isGuaranteedNotToBePoison(const Value *V, AssumptionCache *AC = nullptr,
const Instruction *CtxI = nullptr,
const DominatorTree *DT = nullptr,
unsigned Depth = 0);
/// Return true if undefined behavior would provable be executed on the path to
/// OnPathTo if Root produced a posion result. Note that this doesn't say
/// anything about whether OnPathTo is actually executed or whether Root is
/// actually poison. This can be used to assess whether a new use of Root can
/// be added at a location which is control equivalent with OnPathTo (such as
/// immediately before it) without introducing UB which didn't previously
/// exist. Note that a false result conveys no information.
bool mustExecuteUBIfPoisonOnPathTo(Instruction *Root,
Instruction *OnPathTo,
DominatorTree *DT);
/// Specific patterns of select instructions we can match.
enum SelectPatternFlavor {
SPF_UNKNOWN = 0,
SPF_SMIN, /// Signed minimum
SPF_UMIN, /// Unsigned minimum
SPF_SMAX, /// Signed maximum
SPF_UMAX, /// Unsigned maximum
SPF_FMINNUM, /// Floating point minnum
SPF_FMAXNUM, /// Floating point maxnum
SPF_ABS, /// Absolute value
SPF_NABS /// Negated absolute value
};
/// Behavior when a floating point min/max is given one NaN and one
/// non-NaN as input.
enum SelectPatternNaNBehavior {
SPNB_NA = 0, /// NaN behavior not applicable.
SPNB_RETURNS_NAN, /// Given one NaN input, returns the NaN.
SPNB_RETURNS_OTHER, /// Given one NaN input, returns the non-NaN.
SPNB_RETURNS_ANY /// Given one NaN input, can return either (or
/// it has been determined that no operands can
/// be NaN).
};
struct SelectPatternResult {
SelectPatternFlavor Flavor;
SelectPatternNaNBehavior NaNBehavior; /// Only applicable if Flavor is
/// SPF_FMINNUM or SPF_FMAXNUM.
bool Ordered; /// When implementing this min/max pattern as
/// fcmp; select, does the fcmp have to be
/// ordered?
/// Return true if \p SPF is a min or a max pattern.
static bool isMinOrMax(SelectPatternFlavor SPF) {
return SPF != SPF_UNKNOWN && SPF != SPF_ABS && SPF != SPF_NABS;
}
};
/// Pattern match integer [SU]MIN, [SU]MAX and ABS idioms, returning the kind
/// and providing the out parameter results if we successfully match.
///
/// For ABS/NABS, LHS will be set to the input to the abs idiom. RHS will be
/// the negation instruction from the idiom.
///
/// If CastOp is not nullptr, also match MIN/MAX idioms where the type does
/// not match that of the original select. If this is the case, the cast
/// operation (one of Trunc,SExt,Zext) that must be done to transform the
/// type of LHS and RHS into the type of V is returned in CastOp.
///
/// For example:
/// %1 = icmp slt i32 %a, i32 4
/// %2 = sext i32 %a to i64
/// %3 = select i1 %1, i64 %2, i64 4
///
/// -> LHS = %a, RHS = i32 4, *CastOp = Instruction::SExt
///
SelectPatternResult matchSelectPattern(Value *V, Value *&LHS, Value *&RHS,
Instruction::CastOps *CastOp = nullptr,
unsigned Depth = 0);
inline SelectPatternResult matchSelectPattern(const Value *V, const Value *&LHS,
const Value *&RHS) {
Value *L = const_cast<Value *>(LHS);
Value *R = const_cast<Value *>(RHS);
auto Result = matchSelectPattern(const_cast<Value *>(V), L, R);
LHS = L;
RHS = R;
return Result;
}
/// Determine the pattern that a select with the given compare as its
/// predicate and given values as its true/false operands would match.
SelectPatternResult matchDecomposedSelectPattern(
CmpInst *CmpI, Value *TrueVal, Value *FalseVal, Value *&LHS, Value *&RHS,
Instruction::CastOps *CastOp = nullptr, unsigned Depth = 0);
/// Return the canonical comparison predicate for the specified
/// minimum/maximum flavor.
CmpInst::Predicate getMinMaxPred(SelectPatternFlavor SPF, bool Ordered = false);
/// Return the inverse minimum/maximum flavor of the specified flavor.
/// For example, signed minimum is the inverse of signed maximum.
SelectPatternFlavor getInverseMinMaxFlavor(SelectPatternFlavor SPF);
Intrinsic::ID getInverseMinMaxIntrinsic(Intrinsic::ID MinMaxID);
/// Return the minimum or maximum constant value for the specified integer
/// min/max flavor and type.
APInt getMinMaxLimit(SelectPatternFlavor SPF, unsigned BitWidth);
/// Check if the values in \p VL are select instructions that can be converted
/// to a min or max (vector) intrinsic. Returns the intrinsic ID, if such a
/// conversion is possible, together with a bool indicating whether all select
/// conditions are only used by the selects. Otherwise return
/// Intrinsic::not_intrinsic.
std::pair<Intrinsic::ID, bool>
canConvertToMinOrMaxIntrinsic(ArrayRef<Value *> VL);
/// Attempt to match a simple first order recurrence cycle of the form:
/// %iv = phi Ty [%Start, %Entry], [%Inc, %backedge]
/// %inc = binop %iv, %step
/// OR
/// %iv = phi Ty [%Start, %Entry], [%Inc, %backedge]
/// %inc = binop %step, %iv
///
/// A first order recurrence is a formula with the form: X_n = f(X_(n-1))
///
/// A couple of notes on subtleties in that definition:
/// * The Step does not have to be loop invariant. In math terms, it can
/// be a free variable. We allow recurrences with both constant and
/// variable coefficients. Callers may wish to filter cases where Step
/// does not dominate P.
/// * For non-commutative operators, we will match both forms. This
/// results in some odd recurrence structures. Callers may wish to filter
/// out recurrences where the phi is not the LHS of the returned operator.
/// * Because of the structure matched, the caller can assume as a post
/// condition of the match the presence of a Loop with P's parent as it's
/// header *except* in unreachable code. (Dominance decays in unreachable
/// code.)
///
/// NOTE: This is intentional simple. If you want the ability to analyze
/// non-trivial loop conditons, see ScalarEvolution instead.
bool matchSimpleRecurrence(const PHINode *P, BinaryOperator *&BO, Value *&Start,
Value *&Step);
/// Analogous to the above, but starting from the binary operator
bool matchSimpleRecurrence(const BinaryOperator *I, PHINode *&P, Value *&Start,
Value *&Step);
/// Return true if RHS is known to be implied true by LHS. Return false if
/// RHS is known to be implied false by LHS. Otherwise, return std::nullopt if
/// no implication can be made. A & B must be i1 (boolean) values or a vector of
/// such values. Note that the truth table for implication is the same as <=u on
/// i1 values (but not
/// <=s!). The truth table for both is:
/// | T | F (B)
/// T | T | F
/// F | T | T
/// (A)
std::optional<bool> isImpliedCondition(const Value *LHS, const Value *RHS,
const DataLayout &DL,
bool LHSIsTrue = true,
unsigned Depth = 0);
std::optional<bool> isImpliedCondition(const Value *LHS,
CmpInst::Predicate RHSPred,
const Value *RHSOp0, const Value *RHSOp1,
const DataLayout &DL,
bool LHSIsTrue = true,
unsigned Depth = 0);
/// Return the boolean condition value in the context of the given instruction
/// if it is known based on dominating conditions.
std::optional<bool> isImpliedByDomCondition(const Value *Cond,
const Instruction *ContextI,
const DataLayout &DL);
std::optional<bool> isImpliedByDomCondition(CmpInst::Predicate Pred,
const Value *LHS, const Value *RHS,
const Instruction *ContextI,
const DataLayout &DL);
} // end namespace llvm
#endif // LLVM_ANALYSIS_VALUETRACKING_H
PK iwFZ��D ! Analysis/InteractiveModelRunner.hnu �[��� //===- InteractiveModelRunner.h ---- "gym" ML model runner -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
#ifndef LLVM_ANALYSIS_INTERACTIVEMODELRUNNER_H
#define LLVM_ANALYSIS_INTERACTIVEMODELRUNNER_H
#include "llvm/Analysis/MLModelRunner.h"
#include "llvm/Analysis/TensorSpec.h"
#include "llvm/Analysis/Utils/TrainingLogger.h"
#include "llvm/Config/llvm-config.h"
#include "llvm/Support/FileSystem.h"
#include "llvm/Support/raw_ostream.h"
#include <system_error>
namespace llvm {
/// A MLModelRunner that asks for advice from an external agent, or host. It
/// uses 2 files - ideally named pipes - one to send data to that agent, and
/// one to receive advice.
/// The data exchange uses the training logger (Utils/TrainingLogger.h) format.
/// Specifically, the compiler will send the log header, set the context, and
/// send observations; the host is expected to reply with a tensor value after
/// each observation as a binary buffer that's conforming to the shape of the
/// advice. Interleaved, the data closely resembles the training log for a
/// log where we don't capture the reward signal.
///
/// Note that the correctness of the received data is the responsibility of the
/// host. In particular, if insufficient data were sent, the compiler will block
/// when waiting for an advice.
///
/// Note that the host can either open the pipes RW, or open first the pipe to
/// the compiler - i.e. the "Inbound" - and then the "Outbound", to avoid
/// deadlock. This is because the compiler first tries to open the inbound
/// (which will hang until there's a writer on the other end).
class InteractiveModelRunner : public MLModelRunner {
public:
InteractiveModelRunner(LLVMContext &Ctx,
const std::vector<TensorSpec> &Inputs,
const TensorSpec &Advice, StringRef OutboundName,
StringRef InboundName);
static bool classof(const MLModelRunner *R) {
return R->getKind() == MLModelRunner::Kind::Interactive;
}
void switchContext(StringRef Name) override {
Log->switchContext(Name);
Log->flush();
}
virtual ~InteractiveModelRunner();
private:
void *evaluateUntyped() override;
// This must be declared before InEC if we want to initialize it in the
// ctor initializer list.
int Inbound = -1;
const std::vector<TensorSpec> InputSpecs;
const TensorSpec OutputSpec;
std::error_code OutEC;
std::error_code InEC;
std::vector<char> OutputBuffer;
std::unique_ptr<Logger> Log;
};
} // namespace llvm
#endif // LLVM_ANALYSIS_INTERACTIVEMODELRUNNER_H
PK iwFZ��T
�
� " Analysis/TargetTransformInfoImpl.hnu �[��� //===- TargetTransformInfoImpl.h --------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This file provides helpers for the implementation of
/// a TargetTransformInfo-conforming class.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_TARGETTRANSFORMINFOIMPL_H
#define LLVM_ANALYSIS_TARGETTRANSFORMINFOIMPL_H
#include "llvm/Analysis/ScalarEvolutionExpressions.h"
#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/Analysis/VectorUtils.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/GetElementPtrTypeIterator.h"
#include "llvm/IR/IntrinsicInst.h"
#include "llvm/IR/Operator.h"
#include "llvm/IR/PatternMatch.h"
#include <optional>
#include <utility>
namespace llvm {
class Function;
/// Base class for use as a mix-in that aids implementing
/// a TargetTransformInfo-compatible class.
class TargetTransformInfoImplBase {
protected:
typedef TargetTransformInfo TTI;
const DataLayout &DL;
explicit TargetTransformInfoImplBase(const DataLayout &DL) : DL(DL) {}
public:
// Provide value semantics. MSVC requires that we spell all of these out.
TargetTransformInfoImplBase(const TargetTransformInfoImplBase &Arg) = default;
TargetTransformInfoImplBase(TargetTransformInfoImplBase &&Arg) : DL(Arg.DL) {}
const DataLayout &getDataLayout() const { return DL; }
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr,
ArrayRef<const Value *> Operands, Type *AccessType,
TTI::TargetCostKind CostKind) const {
// In the basic model, we just assume that all-constant GEPs will be folded
// into their uses via addressing modes.
for (const Value *Operand : Operands)
if (!isa<Constant>(Operand))
return TTI::TCC_Basic;
return TTI::TCC_Free;
}
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
unsigned &JTSize,
ProfileSummaryInfo *PSI,
BlockFrequencyInfo *BFI) const {
(void)PSI;
(void)BFI;
JTSize = 0;
return SI.getNumCases();
}
unsigned getInliningThresholdMultiplier() const { return 1; }
unsigned adjustInliningThreshold(const CallBase *CB) const { return 0; }
unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const {
return 0;
};
int getInlinerVectorBonusPercent() const { return 150; }
InstructionCost getMemcpyCost(const Instruction *I) const {
return TTI::TCC_Expensive;
}
uint64_t getMaxMemIntrinsicInlineSizeThreshold() const {
return 64;
}
// Although this default value is arbitrary, it is not random. It is assumed
// that a condition that evaluates the same way by a higher percentage than
// this is best represented as control flow. Therefore, the default value N
// should be set such that the win from N% correct executions is greater than
// the loss from (100 - N)% mispredicted executions for the majority of
// intended targets.
BranchProbability getPredictableBranchThreshold() const {
return BranchProbability(99, 100);
}
bool hasBranchDivergence(const Function *F = nullptr) const { return false; }
bool isSourceOfDivergence(const Value *V) const { return false; }
bool isAlwaysUniform(const Value *V) const { return false; }
bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const {
return false;
}
bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const {
return true;
}
unsigned getFlatAddressSpace() const { return -1; }
bool collectFlatAddressOperands(SmallVectorImpl<int> &OpIndexes,
Intrinsic::ID IID) const {
return false;
}
bool isNoopAddrSpaceCast(unsigned, unsigned) const { return false; }
bool canHaveNonUndefGlobalInitializerInAddressSpace(unsigned AS) const {
return AS == 0;
};
unsigned getAssumedAddrSpace(const Value *V) const { return -1; }
bool isSingleThreaded() const { return false; }
std::pair<const Value *, unsigned>
getPredicatedAddrSpace(const Value *V) const {
return std::make_pair(nullptr, -1);
}
Value *rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV,
Value *NewV) const {
return nullptr;
}
bool isLoweredToCall(const Function *F) const {
assert(F && "A concrete function must be provided to this routine.");
// FIXME: These should almost certainly not be handled here, and instead
// handled with the help of TLI or the target itself. This was largely
// ported from existing analysis heuristics here so that such refactorings
// can take place in the future.
if (F->isIntrinsic())
return false;
if (F->hasLocalLinkage() || !F->hasName())
return true;
StringRef Name = F->getName();
// These will all likely lower to a single selection DAG node.
if (Name == "copysign" || Name == "copysignf" || Name == "copysignl" ||
Name == "fabs" || Name == "fabsf" || Name == "fabsl" || Name == "sin" ||
Name == "fmin" || Name == "fminf" || Name == "fminl" ||
Name == "fmax" || Name == "fmaxf" || Name == "fmaxl" ||
Name == "sinf" || Name == "sinl" || Name == "cos" || Name == "cosf" ||
Name == "cosl" || Name == "sqrt" || Name == "sqrtf" || Name == "sqrtl")
return false;
// These are all likely to be optimized into something smaller.
if (Name == "pow" || Name == "powf" || Name == "powl" || Name == "exp2" ||
Name == "exp2l" || Name == "exp2f" || Name == "floor" ||
Name == "floorf" || Name == "ceil" || Name == "round" ||
Name == "ffs" || Name == "ffsl" || Name == "abs" || Name == "labs" ||
Name == "llabs")
return false;
return true;
}
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE,
AssumptionCache &AC, TargetLibraryInfo *LibInfo,
HardwareLoopInfo &HWLoopInfo) const {
return false;
}
bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const { return false; }
TailFoldingStyle
getPreferredTailFoldingStyle(bool IVUpdateMayOverflow = true) const {
return TailFoldingStyle::DataWithoutLaneMask;
}
std::optional<Instruction *> instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
return std::nullopt;
}
std::optional<Value *>
simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II,
APInt DemandedMask, KnownBits &Known,
bool &KnownBitsComputed) const {
return std::nullopt;
}
std::optional<Value *> simplifyDemandedVectorEltsIntrinsic(
InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
APInt &UndefElts2, APInt &UndefElts3,
std::function<void(Instruction *, unsigned, APInt, APInt &)>
SimplifyAndSetOp) const {
return std::nullopt;
}
void getUnrollingPreferences(Loop *, ScalarEvolution &,
TTI::UnrollingPreferences &,
OptimizationRemarkEmitter *) const {}
void getPeelingPreferences(Loop *, ScalarEvolution &,
TTI::PeelingPreferences &) const {}
bool isLegalAddImmediate(int64_t Imm) const { return false; }
bool isLegalICmpImmediate(int64_t Imm) const { return false; }
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
bool HasBaseReg, int64_t Scale, unsigned AddrSpace,
Instruction *I = nullptr) const {
// Guess that only reg and reg+reg addressing is allowed. This heuristic is
// taken from the implementation of LSR.
return !BaseGV && BaseOffset == 0 && (Scale == 0 || Scale == 1);
}
bool isLSRCostLess(const TTI::LSRCost &C1, const TTI::LSRCost &C2) const {
return std::tie(C1.NumRegs, C1.AddRecCost, C1.NumIVMuls, C1.NumBaseAdds,
C1.ScaleCost, C1.ImmCost, C1.SetupCost) <
std::tie(C2.NumRegs, C2.AddRecCost, C2.NumIVMuls, C2.NumBaseAdds,
C2.ScaleCost, C2.ImmCost, C2.SetupCost);
}
bool isNumRegsMajorCostOfLSR() const { return true; }
bool isProfitableLSRChainElement(Instruction *I) const { return false; }
bool canMacroFuseCmp() const { return false; }
bool canSaveCmp(Loop *L, BranchInst **BI, ScalarEvolution *SE, LoopInfo *LI,
DominatorTree *DT, AssumptionCache *AC,
TargetLibraryInfo *LibInfo) const {
return false;
}
TTI::AddressingModeKind
getPreferredAddressingMode(const Loop *L, ScalarEvolution *SE) const {
return TTI::AMK_None;
}
bool isLegalMaskedStore(Type *DataType, Align Alignment) const {
return false;
}
bool isLegalMaskedLoad(Type *DataType, Align Alignment) const {
return false;
}
bool isLegalNTStore(Type *DataType, Align Alignment) const {
// By default, assume nontemporal memory stores are available for stores
// that are aligned and have a size that is a power of 2.
unsigned DataSize = DL.getTypeStoreSize(DataType);
return Alignment >= DataSize && isPowerOf2_32(DataSize);
}
bool isLegalNTLoad(Type *DataType, Align Alignment) const {
// By default, assume nontemporal memory loads are available for loads that
// are aligned and have a size that is a power of 2.
unsigned DataSize = DL.getTypeStoreSize(DataType);
return Alignment >= DataSize && isPowerOf2_32(DataSize);
}
bool isLegalBroadcastLoad(Type *ElementTy, ElementCount NumElements) const {
return false;
}
bool isLegalMaskedScatter(Type *DataType, Align Alignment) const {
return false;
}
bool isLegalMaskedGather(Type *DataType, Align Alignment) const {
return false;
}
bool forceScalarizeMaskedGather(VectorType *DataType, Align Alignment) const {
return false;
}
bool forceScalarizeMaskedScatter(VectorType *DataType,
Align Alignment) const {
return false;
}
bool isLegalMaskedCompressStore(Type *DataType) const { return false; }
bool isLegalAltInstr(VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
const SmallBitVector &OpcodeMask) const {
return false;
}
bool isLegalMaskedExpandLoad(Type *DataType) const { return false; }
bool enableOrderedReductions() const { return false; }
bool hasDivRemOp(Type *DataType, bool IsSigned) const { return false; }
bool hasVolatileVariant(Instruction *I, unsigned AddrSpace) const {
return false;
}
bool prefersVectorizedAddressing() const { return true; }
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
int64_t BaseOffset, bool HasBaseReg,
int64_t Scale,
unsigned AddrSpace) const {
// Guess that all legal addressing mode are free.
if (isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, Scale,
AddrSpace))
return 0;
return -1;
}
bool LSRWithInstrQueries() const { return false; }
bool isTruncateFree(Type *Ty1, Type *Ty2) const { return false; }
bool isProfitableToHoist(Instruction *I) const { return true; }
bool useAA() const { return false; }
bool isTypeLegal(Type *Ty) const { return false; }
unsigned getRegUsageForType(Type *Ty) const { return 1; }
bool shouldBuildLookupTables() const { return true; }
bool shouldBuildLookupTablesForConstant(Constant *C) const { return true; }
bool shouldBuildRelLookupTables() const { return false; }
bool useColdCCForColdCall(Function &F) const { return false; }
InstructionCost getScalarizationOverhead(VectorType *Ty,
const APInt &DemandedElts,
bool Insert, bool Extract,
TTI::TargetCostKind CostKind) const {
return 0;
}
InstructionCost
getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
ArrayRef<Type *> Tys,
TTI::TargetCostKind CostKind) const {
return 0;
}
bool supportsEfficientVectorElementLoadStore() const { return false; }
bool supportsTailCalls() const { return true; }
bool supportsTailCallFor(const CallBase *CB) const {
return supportsTailCalls();
}
bool enableAggressiveInterleaving(bool LoopHasReductions) const {
return false;
}
TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize,
bool IsZeroCmp) const {
return {};
}
bool enableSelectOptimize() const { return true; }
bool enableInterleavedAccessVectorization() const { return false; }
bool enableMaskedInterleavedAccessVectorization() const { return false; }
bool isFPVectorizationPotentiallyUnsafe() const { return false; }
bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth,
unsigned AddressSpace, Align Alignment,
unsigned *Fast) const {
return false;
}
TTI::PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const {
return TTI::PSK_Software;
}
bool haveFastSqrt(Type *Ty) const { return false; }
bool isExpensiveToSpeculativelyExecute(const Instruction *I) { return true; }
bool isFCmpOrdCheaperThanFCmpZero(Type *Ty) const { return true; }
InstructionCost getFPOpCost(Type *Ty) const {
return TargetTransformInfo::TCC_Basic;
}
InstructionCost getIntImmCodeSizeCost(unsigned Opcode, unsigned Idx,
const APInt &Imm, Type *Ty) const {
return 0;
}
InstructionCost getIntImmCost(const APInt &Imm, Type *Ty,
TTI::TargetCostKind CostKind) const {
return TTI::TCC_Basic;
}
InstructionCost getIntImmCostInst(unsigned Opcode, unsigned Idx,
const APInt &Imm, Type *Ty,
TTI::TargetCostKind CostKind,
Instruction *Inst = nullptr) const {
return TTI::TCC_Free;
}
InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
const APInt &Imm, Type *Ty,
TTI::TargetCostKind CostKind) const {
return TTI::TCC_Free;
}
unsigned getNumberOfRegisters(unsigned ClassID) const { return 8; }
unsigned getRegisterClassForType(bool Vector, Type *Ty = nullptr) const {
return Vector ? 1 : 0;
};
const char *getRegisterClassName(unsigned ClassID) const {
switch (ClassID) {
default:
return "Generic::Unknown Register Class";
case 0:
return "Generic::ScalarRC";
case 1:
return "Generic::VectorRC";
}
}
TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const {
return TypeSize::getFixed(32);
}
unsigned getMinVectorRegisterBitWidth() const { return 128; }
std::optional<unsigned> getMaxVScale() const { return std::nullopt; }
std::optional<unsigned> getVScaleForTuning() const { return std::nullopt; }
bool isVScaleKnownToBeAPowerOfTwo() const { return false; }
bool
shouldMaximizeVectorBandwidth(TargetTransformInfo::RegisterKind K) const {
return false;
}
ElementCount getMinimumVF(unsigned ElemWidth, bool IsScalable) const {
return ElementCount::get(0, IsScalable);
}
unsigned getMaximumVF(unsigned ElemWidth, unsigned Opcode) const { return 0; }
unsigned getStoreMinimumVF(unsigned VF, Type *, Type *) const { return VF; }
bool shouldConsiderAddressTypePromotion(
const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
AllowPromotionWithoutCommonHeader = false;
return false;
}
unsigned getCacheLineSize() const { return 0; }
std::optional<unsigned>
getCacheSize(TargetTransformInfo::CacheLevel Level) const {
switch (Level) {
case TargetTransformInfo::CacheLevel::L1D:
[[fallthrough]];
case TargetTransformInfo::CacheLevel::L2D:
return std::nullopt;
}
llvm_unreachable("Unknown TargetTransformInfo::CacheLevel");
}
std::optional<unsigned>
getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const {
switch (Level) {
case TargetTransformInfo::CacheLevel::L1D:
[[fallthrough]];
case TargetTransformInfo::CacheLevel::L2D:
return std::nullopt;
}
llvm_unreachable("Unknown TargetTransformInfo::CacheLevel");
}
unsigned getPrefetchDistance() const { return 0; }
unsigned getMinPrefetchStride(unsigned NumMemAccesses,
unsigned NumStridedMemAccesses,
unsigned NumPrefetches, bool HasCall) const {
return 1;
}
unsigned getMaxPrefetchIterationsAhead() const { return UINT_MAX; }
bool enableWritePrefetching() const { return false; }
bool shouldPrefetchAddressSpace(unsigned AS) const { return !AS; }
unsigned getMaxInterleaveFactor(ElementCount VF) const { return 1; }
InstructionCost getArithmeticInstrCost(
unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
TTI::OperandValueInfo Opd1Info, TTI::OperandValueInfo Opd2Info,
ArrayRef<const Value *> Args,
const Instruction *CxtI = nullptr) const {
// Widenable conditions will eventually lower into constants, so some
// operations with them will be trivially optimized away.
auto IsWidenableCondition = [](const Value *V) {
if (auto *II = dyn_cast<IntrinsicInst>(V))
if (II->getIntrinsicID() == Intrinsic::experimental_widenable_condition)
return true;
return false;
};
// FIXME: A number of transformation tests seem to require these values
// which seems a little odd for how arbitary there are.
switch (Opcode) {
default:
break;
case Instruction::FDiv:
case Instruction::FRem:
case Instruction::SDiv:
case Instruction::SRem:
case Instruction::UDiv:
case Instruction::URem:
// FIXME: Unlikely to be true for CodeSize.
return TTI::TCC_Expensive;
case Instruction::And:
case Instruction::Or:
if (any_of(Args, IsWidenableCondition))
return TTI::TCC_Free;
break;
}
// Assume a 3cy latency for fp arithmetic ops.
if (CostKind == TTI::TCK_Latency)
if (Ty->getScalarType()->isFloatingPointTy())
return 3;
return 1;
}
InstructionCost
getShuffleCost(TTI::ShuffleKind Kind, VectorType *Ty, ArrayRef<int> Mask,
TTI::TargetCostKind CostKind, int Index, VectorType *SubTp,
ArrayRef<const Value *> Args = std::nullopt) const {
return 1;
}
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
TTI::CastContextHint CCH,
TTI::TargetCostKind CostKind,
const Instruction *I) const {
switch (Opcode) {
default:
break;
case Instruction::IntToPtr: {
unsigned SrcSize = Src->getScalarSizeInBits();
if (DL.isLegalInteger(SrcSize) &&
SrcSize <= DL.getPointerTypeSizeInBits(Dst))
return 0;
break;
}
case Instruction::PtrToInt: {
unsigned DstSize = Dst->getScalarSizeInBits();
if (DL.isLegalInteger(DstSize) &&
DstSize >= DL.getPointerTypeSizeInBits(Src))
return 0;
break;
}
case Instruction::BitCast:
if (Dst == Src || (Dst->isPointerTy() && Src->isPointerTy()))
// Identity and pointer-to-pointer casts are free.
return 0;
break;
case Instruction::Trunc: {
// trunc to a native type is free (assuming the target has compare and
// shift-right of the same width).
TypeSize DstSize = DL.getTypeSizeInBits(Dst);
if (!DstSize.isScalable() && DL.isLegalInteger(DstSize.getFixedValue()))
return 0;
break;
}
}
return 1;
}
InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst,
VectorType *VecTy,
unsigned Index) const {
return 1;
}
InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind,
const Instruction *I = nullptr) const {
// A phi would be free, unless we're costing the throughput because it
// will require a register.
if (Opcode == Instruction::PHI && CostKind != TTI::TCK_RecipThroughput)
return 0;
return 1;
}
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
CmpInst::Predicate VecPred,
TTI::TargetCostKind CostKind,
const Instruction *I) const {
return 1;
}
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index, Value *Op0,
Value *Op1) const {
return 1;
}
InstructionCost getVectorInstrCost(const Instruction &I, Type *Val,
TTI::TargetCostKind CostKind,
unsigned Index) const {
return 1;
}
unsigned getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF,
const APInt &DemandedDstElts,
TTI::TargetCostKind CostKind) {
return 1;
}
InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
unsigned AddressSpace,
TTI::TargetCostKind CostKind,
TTI::OperandValueInfo OpInfo,
const Instruction *I) const {
return 1;
}
InstructionCost getVPMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
unsigned AddressSpace,
TTI::TargetCostKind CostKind,
const Instruction *I) const {
return 1;
}
InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *Src,
Align Alignment, unsigned AddressSpace,
TTI::TargetCostKind CostKind) const {
return 1;
}
InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
const Value *Ptr, bool VariableMask,
Align Alignment,
TTI::TargetCostKind CostKind,
const Instruction *I = nullptr) const {
return 1;
}
unsigned getInterleavedMemoryOpCost(
unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
bool UseMaskForCond, bool UseMaskForGaps) const {
return 1;
}
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
TTI::TargetCostKind CostKind) const {
switch (ICA.getID()) {
default:
break;
case Intrinsic::annotation:
case Intrinsic::assume:
case Intrinsic::sideeffect:
case Intrinsic::pseudoprobe:
case Intrinsic::arithmetic_fence:
case Intrinsic::dbg_assign:
case Intrinsic::dbg_declare:
case Intrinsic::dbg_value:
case Intrinsic::dbg_label:
case Intrinsic::invariant_start:
case Intrinsic::invariant_end:
case Intrinsic::launder_invariant_group:
case Intrinsic::strip_invariant_group:
case Intrinsic::is_constant:
case Intrinsic::lifetime_start:
case Intrinsic::lifetime_end:
case Intrinsic::experimental_noalias_scope_decl:
case Intrinsic::objectsize:
case Intrinsic::ptr_annotation:
case Intrinsic::var_annotation:
case Intrinsic::experimental_gc_result:
case Intrinsic::experimental_gc_relocate:
case Intrinsic::coro_alloc:
case Intrinsic::coro_begin:
case Intrinsic::coro_free:
case Intrinsic::coro_end:
case Intrinsic::coro_frame:
case Intrinsic::coro_size:
case Intrinsic::coro_align:
case Intrinsic::coro_suspend:
case Intrinsic::coro_subfn_addr:
case Intrinsic::threadlocal_address:
case Intrinsic::experimental_widenable_condition:
// These intrinsics don't actually represent code after lowering.
return 0;
}
return 1;
}
InstructionCost getCallInstrCost(Function *F, Type *RetTy,
ArrayRef<Type *> Tys,
TTI::TargetCostKind CostKind) const {
return 1;
}
// Assume that we have a register of the right size for the type.
unsigned getNumberOfParts(Type *Tp) const { return 1; }
InstructionCost getAddressComputationCost(Type *Tp, ScalarEvolution *,
const SCEV *) const {
return 0;
}
InstructionCost getArithmeticReductionCost(unsigned, VectorType *,
std::optional<FastMathFlags> FMF,
TTI::TargetCostKind) const {
return 1;
}
InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *,
FastMathFlags,
TTI::TargetCostKind) const {
return 1;
}
InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned,
Type *ResTy, VectorType *Ty,
FastMathFlags FMF,
TTI::TargetCostKind CostKind) const {
return 1;
}
InstructionCost getMulAccReductionCost(bool IsUnsigned, Type *ResTy,
VectorType *Ty,
TTI::TargetCostKind CostKind) const {
return 1;
}
InstructionCost getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const {
return 0;
}
bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info) const {
return false;
}
unsigned getAtomicMemIntrinsicMaxElementSize() const {
// Note for overrides: You must ensure for all element unordered-atomic
// memory intrinsics that all power-of-2 element sizes up to, and
// including, the return value of this method have a corresponding
// runtime lib call. These runtime lib call definitions can be found
// in RuntimeLibcalls.h
return 0;
}
Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
Type *ExpectedType) const {
return nullptr;
}
Type *
getMemcpyLoopLoweringType(LLVMContext &Context, Value *Length,
unsigned SrcAddrSpace, unsigned DestAddrSpace,
unsigned SrcAlign, unsigned DestAlign,
std::optional<uint32_t> AtomicElementSize) const {
return AtomicElementSize ? Type::getIntNTy(Context, *AtomicElementSize * 8)
: Type::getInt8Ty(Context);
}
void getMemcpyLoopResidualLoweringType(
SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
unsigned SrcAlign, unsigned DestAlign,
std::optional<uint32_t> AtomicCpySize) const {
unsigned OpSizeInBytes = AtomicCpySize ? *AtomicCpySize : 1;
Type *OpType = Type::getIntNTy(Context, OpSizeInBytes * 8);
for (unsigned i = 0; i != RemainingBytes; i += OpSizeInBytes)
OpsOut.push_back(OpType);
}
bool areInlineCompatible(const Function *Caller,
const Function *Callee) const {
return (Caller->getFnAttribute("target-cpu") ==
Callee->getFnAttribute("target-cpu")) &&
(Caller->getFnAttribute("target-features") ==
Callee->getFnAttribute("target-features"));
}
bool areTypesABICompatible(const Function *Caller, const Function *Callee,
const ArrayRef<Type *> &Types) const {
return (Caller->getFnAttribute("target-cpu") ==
Callee->getFnAttribute("target-cpu")) &&
(Caller->getFnAttribute("target-features") ==
Callee->getFnAttribute("target-features"));
}
bool isIndexedLoadLegal(TTI::MemIndexedMode Mode, Type *Ty,
const DataLayout &DL) const {
return false;
}
bool isIndexedStoreLegal(TTI::MemIndexedMode Mode, Type *Ty,
const DataLayout &DL) const {
return false;
}
unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const { return 128; }
bool isLegalToVectorizeLoad(LoadInst *LI) const { return true; }
bool isLegalToVectorizeStore(StoreInst *SI) const { return true; }
bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment,
unsigned AddrSpace) const {
return true;
}
bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment,
unsigned AddrSpace) const {
return true;
}
bool isLegalToVectorizeReduction(const RecurrenceDescriptor &RdxDesc,
ElementCount VF) const {
return true;
}
bool isElementTypeLegalForScalableVector(Type *Ty) const { return true; }
unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize,
unsigned ChainSizeInBytes,
VectorType *VecTy) const {
return VF;
}
unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize,
unsigned ChainSizeInBytes,
VectorType *VecTy) const {
return VF;
}
bool preferInLoopReduction(unsigned Opcode, Type *Ty,
TTI::ReductionFlags Flags) const {
return false;
}
bool preferPredicatedReductionSelect(unsigned Opcode, Type *Ty,
TTI::ReductionFlags Flags) const {
return false;
}
bool preferEpilogueVectorization() const {
return true;
}
bool shouldExpandReduction(const IntrinsicInst *II) const { return true; }
unsigned getGISelRematGlobalCost() const { return 1; }
unsigned getMinTripCountTailFoldingThreshold() const { return 0; }
bool supportsScalableVectors() const { return false; }
bool enableScalableVectorization() const { return false; }
bool hasActiveVectorLength(unsigned Opcode, Type *DataType,
Align Alignment) const {
return false;
}
TargetTransformInfo::VPLegalization
getVPLegalizationStrategy(const VPIntrinsic &PI) const {
return TargetTransformInfo::VPLegalization(
/* EVLParamStrategy */ TargetTransformInfo::VPLegalization::Discard,
/* OperatorStrategy */ TargetTransformInfo::VPLegalization::Convert);
}
bool hasArmWideBranch(bool) const { return false; }
unsigned getMaxNumArgs() const { return UINT_MAX; }
protected:
// Obtain the minimum required size to hold the value (without the sign)
// In case of a vector it returns the min required size for one element.
unsigned minRequiredElementSize(const Value *Val, bool &isSigned) const {
if (isa<ConstantDataVector>(Val) || isa<ConstantVector>(Val)) {
const auto *VectorValue = cast<Constant>(Val);
// In case of a vector need to pick the max between the min
// required size for each element
auto *VT = cast<FixedVectorType>(Val->getType());
// Assume unsigned elements
isSigned = false;
// The max required size is the size of the vector element type
unsigned MaxRequiredSize =
VT->getElementType()->getPrimitiveSizeInBits().getFixedValue();
unsigned MinRequiredSize = 0;
for (unsigned i = 0, e = VT->getNumElements(); i < e; ++i) {
if (auto *IntElement =
dyn_cast<ConstantInt>(VectorValue->getAggregateElement(i))) {
bool signedElement = IntElement->getValue().isNegative();
// Get the element min required size.
unsigned ElementMinRequiredSize =
IntElement->getValue().getSignificantBits() - 1;
// In case one element is signed then all the vector is signed.
isSigned |= signedElement;
// Save the max required bit size between all the elements.
MinRequiredSize = std::max(MinRequiredSize, ElementMinRequiredSize);
} else {
// not an int constant element
return MaxRequiredSize;
}
}
return MinRequiredSize;
}
if (const auto *CI = dyn_cast<ConstantInt>(Val)) {
isSigned = CI->getValue().isNegative();
return CI->getValue().getSignificantBits() - 1;
}
if (const auto *Cast = dyn_cast<SExtInst>(Val)) {
isSigned = true;
return Cast->getSrcTy()->getScalarSizeInBits() - 1;
}
if (const auto *Cast = dyn_cast<ZExtInst>(Val)) {
isSigned = false;
return Cast->getSrcTy()->getScalarSizeInBits();
}
isSigned = false;
return Val->getType()->getScalarSizeInBits();
}
bool isStridedAccess(const SCEV *Ptr) const {
return Ptr && isa<SCEVAddRecExpr>(Ptr);
}
const SCEVConstant *getConstantStrideStep(ScalarEvolution *SE,
const SCEV *Ptr) const {
if (!isStridedAccess(Ptr))
return nullptr;
const SCEVAddRecExpr *AddRec = cast<SCEVAddRecExpr>(Ptr);
return dyn_cast<SCEVConstant>(AddRec->getStepRecurrence(*SE));
}
bool isConstantStridedAccessLessThan(ScalarEvolution *SE, const SCEV *Ptr,
int64_t MergeDistance) const {
const SCEVConstant *Step = getConstantStrideStep(SE, Ptr);
if (!Step)
return false;
APInt StrideVal = Step->getAPInt();
if (StrideVal.getBitWidth() > 64)
return false;
// FIXME: Need to take absolute value for negative stride case.
return StrideVal.getSExtValue() < MergeDistance;
}
};
/// CRTP base class for use as a mix-in that aids implementing
/// a TargetTransformInfo-compatible class.
template <typename T>
class TargetTransformInfoImplCRTPBase : public TargetTransformInfoImplBase {
private:
typedef TargetTransformInfoImplBase BaseT;
protected:
explicit TargetTransformInfoImplCRTPBase(const DataLayout &DL) : BaseT(DL) {}
public:
using BaseT::getGEPCost;
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr,
ArrayRef<const Value *> Operands, Type *AccessType,
TTI::TargetCostKind CostKind) {
assert(PointeeType && Ptr && "can't get GEPCost of nullptr");
auto *BaseGV = dyn_cast<GlobalValue>(Ptr->stripPointerCasts());
bool HasBaseReg = (BaseGV == nullptr);
auto PtrSizeBits = DL.getPointerTypeSizeInBits(Ptr->getType());
APInt BaseOffset(PtrSizeBits, 0);
int64_t Scale = 0;
auto GTI = gep_type_begin(PointeeType, Operands);
Type *TargetType = nullptr;
// Handle the case where the GEP instruction has a single operand,
// the basis, therefore TargetType is a nullptr.
if (Operands.empty())
return !BaseGV ? TTI::TCC_Free : TTI::TCC_Basic;
for (auto I = Operands.begin(); I != Operands.end(); ++I, ++GTI) {
TargetType = GTI.getIndexedType();
// We assume that the cost of Scalar GEP with constant index and the
// cost of Vector GEP with splat constant index are the same.
const ConstantInt *ConstIdx = dyn_cast<ConstantInt>(*I);
if (!ConstIdx)
if (auto Splat = getSplatValue(*I))
ConstIdx = dyn_cast<ConstantInt>(Splat);
if (StructType *STy = GTI.getStructTypeOrNull()) {
// For structures the index is always splat or scalar constant
assert(ConstIdx && "Unexpected GEP index");
uint64_t Field = ConstIdx->getZExtValue();
BaseOffset += DL.getStructLayout(STy)->getElementOffset(Field);
} else {
// If this operand is a scalable type, bail out early.
// TODO: handle scalable vectors
if (isa<ScalableVectorType>(TargetType))
return TTI::TCC_Basic;
int64_t ElementSize =
DL.getTypeAllocSize(GTI.getIndexedType()).getFixedValue();
if (ConstIdx) {
BaseOffset +=
ConstIdx->getValue().sextOrTrunc(PtrSizeBits) * ElementSize;
} else {
// Needs scale register.
if (Scale != 0)
// No addressing mode takes two scale registers.
return TTI::TCC_Basic;
Scale = ElementSize;
}
}
}
// If we haven't been provided a hint, use the target type for now.
//
// TODO: Take a look at potentially removing this: This is *slightly* wrong
// as it's possible to have a GEP with a foldable target type but a memory
// access that isn't foldable. For example, this load isn't foldable on
// RISC-V:
//
// %p = getelementptr i32, ptr %base, i32 42
// %x = load <2 x i32>, ptr %p
if (!AccessType)
AccessType = TargetType;
// If the final address of the GEP is a legal addressing mode for the given
// access type, then we can fold it into its users.
if (static_cast<T *>(this)->isLegalAddressingMode(
AccessType, const_cast<GlobalValue *>(BaseGV),
BaseOffset.sextOrTrunc(64).getSExtValue(), HasBaseReg, Scale,
Ptr->getType()->getPointerAddressSpace()))
return TTI::TCC_Free;
// TODO: Instead of returning TCC_Basic here, we should use
// getArithmeticInstrCost. Or better yet, provide a hook to let the target
// model it.
return TTI::TCC_Basic;
}
InstructionCost getPointersChainCost(ArrayRef<const Value *> Ptrs,
const Value *Base,
const TTI::PointersChainInfo &Info,
Type *AccessTy,
TTI::TargetCostKind CostKind) {
InstructionCost Cost = TTI::TCC_Free;
// In the basic model we take into account GEP instructions only
// (although here can come alloca instruction, a value, constants and/or
// constant expressions, PHIs, bitcasts ... whatever allowed to be used as a
// pointer). Typically, if Base is a not a GEP-instruction and all the
// pointers are relative to the same base address, all the rest are
// either GEP instructions, PHIs, bitcasts or constants. When we have same
// base, we just calculate cost of each non-Base GEP as an ADD operation if
// any their index is a non-const.
// If no known dependecies between the pointers cost is calculated as a sum
// of costs of GEP instructions.
for (const Value *V : Ptrs) {
const auto *GEP = dyn_cast<GetElementPtrInst>(V);
if (!GEP)
continue;
if (Info.isSameBase() && V != Base) {
if (GEP->hasAllConstantIndices())
continue;
Cost += static_cast<T *>(this)->getArithmeticInstrCost(
Instruction::Add, GEP->getType(), CostKind,
{TTI::OK_AnyValue, TTI::OP_None}, {TTI::OK_AnyValue, TTI::OP_None},
std::nullopt);
} else {
SmallVector<const Value *> Indices(GEP->indices());
Cost += static_cast<T *>(this)->getGEPCost(GEP->getSourceElementType(),
GEP->getPointerOperand(),
Indices, AccessTy, CostKind);
}
}
return Cost;
}
InstructionCost getInstructionCost(const User *U,
ArrayRef<const Value *> Operands,
TTI::TargetCostKind CostKind) {
using namespace llvm::PatternMatch;
auto *TargetTTI = static_cast<T *>(this);
// Handle non-intrinsic calls, invokes, and callbr.
// FIXME: Unlikely to be true for anything but CodeSize.
auto *CB = dyn_cast<CallBase>(U);
if (CB && !isa<IntrinsicInst>(U)) {
if (const Function *F = CB->getCalledFunction()) {
if (!TargetTTI->isLoweredToCall(F))
return TTI::TCC_Basic; // Give a basic cost if it will be lowered
return TTI::TCC_Basic * (F->getFunctionType()->getNumParams() + 1);
}
// For indirect or other calls, scale cost by number of arguments.
return TTI::TCC_Basic * (CB->arg_size() + 1);
}
Type *Ty = U->getType();
unsigned Opcode = Operator::getOpcode(U);
auto *I = dyn_cast<Instruction>(U);
switch (Opcode) {
default:
break;
case Instruction::Call: {
assert(isa<IntrinsicInst>(U) && "Unexpected non-intrinsic call");
auto *Intrinsic = cast<IntrinsicInst>(U);
IntrinsicCostAttributes CostAttrs(Intrinsic->getIntrinsicID(), *CB);
return TargetTTI->getIntrinsicInstrCost(CostAttrs, CostKind);
}
case Instruction::Br:
case Instruction::Ret:
case Instruction::PHI:
case Instruction::Switch:
return TargetTTI->getCFInstrCost(Opcode, CostKind, I);
case Instruction::ExtractValue:
case Instruction::Freeze:
return TTI::TCC_Free;
case Instruction::Alloca:
if (cast<AllocaInst>(U)->isStaticAlloca())
return TTI::TCC_Free;
break;
case Instruction::GetElementPtr: {
const auto *GEP = cast<GEPOperator>(U);
Type *AccessType = nullptr;
// For now, only provide the AccessType in the simple case where the GEP
// only has one user.
if (GEP->hasOneUser() && I)
AccessType = I->user_back()->getAccessType();
return TargetTTI->getGEPCost(GEP->getSourceElementType(),
Operands.front(), Operands.drop_front(),
AccessType, CostKind);
}
case Instruction::Add:
case Instruction::FAdd:
case Instruction::Sub:
case Instruction::FSub:
case Instruction::Mul:
case Instruction::FMul:
case Instruction::UDiv:
case Instruction::SDiv:
case Instruction::FDiv:
case Instruction::URem:
case Instruction::SRem:
case Instruction::FRem:
case Instruction::Shl:
case Instruction::LShr:
case Instruction::AShr:
case Instruction::And:
case Instruction::Or:
case Instruction::Xor:
case Instruction::FNeg: {
const TTI::OperandValueInfo Op1Info = TTI::getOperandInfo(Operands[0]);
TTI::OperandValueInfo Op2Info;
if (Opcode != Instruction::FNeg)
Op2Info = TTI::getOperandInfo(Operands[1]);
return TargetTTI->getArithmeticInstrCost(Opcode, Ty, CostKind, Op1Info,
Op2Info, Operands, I);
}
case Instruction::IntToPtr:
case Instruction::PtrToInt:
case Instruction::SIToFP:
case Instruction::UIToFP:
case Instruction::FPToUI:
case Instruction::FPToSI:
case Instruction::Trunc:
case Instruction::FPTrunc:
case Instruction::BitCast:
case Instruction::FPExt:
case Instruction::SExt:
case Instruction::ZExt:
case Instruction::AddrSpaceCast: {
Type *OpTy = Operands[0]->getType();
return TargetTTI->getCastInstrCost(
Opcode, Ty, OpTy, TTI::getCastContextHint(I), CostKind, I);
}
case Instruction::Store: {
auto *SI = cast<StoreInst>(U);
Type *ValTy = Operands[0]->getType();
TTI::OperandValueInfo OpInfo = TTI::getOperandInfo(Operands[0]);
return TargetTTI->getMemoryOpCost(Opcode, ValTy, SI->getAlign(),
SI->getPointerAddressSpace(), CostKind,
OpInfo, I);
}
case Instruction::Load: {
// FIXME: Arbitary cost which could come from the backend.
if (CostKind == TTI::TCK_Latency)
return 4;
auto *LI = cast<LoadInst>(U);
Type *LoadType = U->getType();
// If there is a non-register sized type, the cost estimation may expand
// it to be several instructions to load into multiple registers on the
// target. But, if the only use of the load is a trunc instruction to a
// register sized type, the instruction selector can combine these
// instructions to be a single load. So, in this case, we use the
// destination type of the trunc instruction rather than the load to
// accurately estimate the cost of this load instruction.
if (CostKind == TTI::TCK_CodeSize && LI->hasOneUse() &&
!LoadType->isVectorTy()) {
if (const TruncInst *TI = dyn_cast<TruncInst>(*LI->user_begin()))
LoadType = TI->getDestTy();
}
return TargetTTI->getMemoryOpCost(Opcode, LoadType, LI->getAlign(),
LI->getPointerAddressSpace(), CostKind,
{TTI::OK_AnyValue, TTI::OP_None}, I);
}
case Instruction::Select: {
const Value *Op0, *Op1;
if (match(U, m_LogicalAnd(m_Value(Op0), m_Value(Op1))) ||
match(U, m_LogicalOr(m_Value(Op0), m_Value(Op1)))) {
// select x, y, false --> x & y
// select x, true, y --> x | y
const auto Op1Info = TTI::getOperandInfo(Op0);
const auto Op2Info = TTI::getOperandInfo(Op1);
assert(Op0->getType()->getScalarSizeInBits() == 1 &&
Op1->getType()->getScalarSizeInBits() == 1);
SmallVector<const Value *, 2> Operands{Op0, Op1};
return TargetTTI->getArithmeticInstrCost(
match(U, m_LogicalOr()) ? Instruction::Or : Instruction::And, Ty,
CostKind, Op1Info, Op2Info, Operands, I);
}
Type *CondTy = Operands[0]->getType();
return TargetTTI->getCmpSelInstrCost(Opcode, U->getType(), CondTy,
CmpInst::BAD_ICMP_PREDICATE,
CostKind, I);
}
case Instruction::ICmp:
case Instruction::FCmp: {
Type *ValTy = Operands[0]->getType();
// TODO: Also handle ICmp/FCmp constant expressions.
return TargetTTI->getCmpSelInstrCost(Opcode, ValTy, U->getType(),
I ? cast<CmpInst>(I)->getPredicate()
: CmpInst::BAD_ICMP_PREDICATE,
CostKind, I);
}
case Instruction::InsertElement: {
auto *IE = dyn_cast<InsertElementInst>(U);
if (!IE)
return TTI::TCC_Basic; // FIXME
unsigned Idx = -1;
if (auto *CI = dyn_cast<ConstantInt>(Operands[2]))
if (CI->getValue().getActiveBits() <= 32)
Idx = CI->getZExtValue();
return TargetTTI->getVectorInstrCost(*IE, Ty, CostKind, Idx);
}
case Instruction::ShuffleVector: {
auto *Shuffle = dyn_cast<ShuffleVectorInst>(U);
if (!Shuffle)
return TTI::TCC_Basic; // FIXME
auto *VecTy = cast<VectorType>(U->getType());
auto *VecSrcTy = cast<VectorType>(Operands[0]->getType());
int NumSubElts, SubIndex;
if (Shuffle->changesLength()) {
// Treat a 'subvector widening' as a free shuffle.
if (Shuffle->increasesLength() && Shuffle->isIdentityWithPadding())
return 0;
if (Shuffle->isExtractSubvectorMask(SubIndex))
return TargetTTI->getShuffleCost(TTI::SK_ExtractSubvector, VecSrcTy,
Shuffle->getShuffleMask(), CostKind,
SubIndex, VecTy, Operands);
if (Shuffle->isInsertSubvectorMask(NumSubElts, SubIndex))
return TargetTTI->getShuffleCost(
TTI::SK_InsertSubvector, VecTy, Shuffle->getShuffleMask(),
CostKind, SubIndex,
FixedVectorType::get(VecTy->getScalarType(), NumSubElts),
Operands);
int ReplicationFactor, VF;
if (Shuffle->isReplicationMask(ReplicationFactor, VF)) {
APInt DemandedDstElts =
APInt::getZero(Shuffle->getShuffleMask().size());
for (auto I : enumerate(Shuffle->getShuffleMask())) {
if (I.value() != PoisonMaskElem)
DemandedDstElts.setBit(I.index());
}
return TargetTTI->getReplicationShuffleCost(
VecSrcTy->getElementType(), ReplicationFactor, VF,
DemandedDstElts, CostKind);
}
return CostKind == TTI::TCK_RecipThroughput ? -1 : 1;
}
if (Shuffle->isIdentity())
return 0;
if (Shuffle->isReverse())
return TargetTTI->getShuffleCost(TTI::SK_Reverse, VecTy,
Shuffle->getShuffleMask(), CostKind, 0,
nullptr, Operands);
if (Shuffle->isSelect())
return TargetTTI->getShuffleCost(TTI::SK_Select, VecTy,
Shuffle->getShuffleMask(), CostKind, 0,
nullptr, Operands);
if (Shuffle->isTranspose())
return TargetTTI->getShuffleCost(TTI::SK_Transpose, VecTy,
Shuffle->getShuffleMask(), CostKind, 0,
nullptr, Operands);
if (Shuffle->isZeroEltSplat())
return TargetTTI->getShuffleCost(TTI::SK_Broadcast, VecTy,
Shuffle->getShuffleMask(), CostKind, 0,
nullptr, Operands);
if (Shuffle->isSingleSource())
return TargetTTI->getShuffleCost(TTI::SK_PermuteSingleSrc, VecTy,
Shuffle->getShuffleMask(), CostKind, 0,
nullptr, Operands);
if (Shuffle->isInsertSubvectorMask(NumSubElts, SubIndex))
return TargetTTI->getShuffleCost(
TTI::SK_InsertSubvector, VecTy, Shuffle->getShuffleMask(), CostKind,
SubIndex, FixedVectorType::get(VecTy->getScalarType(), NumSubElts),
Operands);
if (Shuffle->isSplice(SubIndex))
return TargetTTI->getShuffleCost(TTI::SK_Splice, VecTy,
Shuffle->getShuffleMask(), CostKind,
SubIndex, nullptr, Operands);
return TargetTTI->getShuffleCost(TTI::SK_PermuteTwoSrc, VecTy,
Shuffle->getShuffleMask(), CostKind, 0,
nullptr, Operands);
}
case Instruction::ExtractElement: {
auto *EEI = dyn_cast<ExtractElementInst>(U);
if (!EEI)
return TTI::TCC_Basic; // FIXME
unsigned Idx = -1;
if (auto *CI = dyn_cast<ConstantInt>(Operands[1]))
if (CI->getValue().getActiveBits() <= 32)
Idx = CI->getZExtValue();
Type *DstTy = Operands[0]->getType();
return TargetTTI->getVectorInstrCost(*EEI, DstTy, CostKind, Idx);
}
}
// By default, just classify everything as 'basic' or -1 to represent that
// don't know the throughput cost.
return CostKind == TTI::TCK_RecipThroughput ? -1 : TTI::TCC_Basic;
}
bool isExpensiveToSpeculativelyExecute(const Instruction *I) {
auto *TargetTTI = static_cast<T *>(this);
SmallVector<const Value *, 4> Ops(I->operand_values());
InstructionCost Cost = TargetTTI->getInstructionCost(
I, Ops, TargetTransformInfo::TCK_SizeAndLatency);
return Cost >= TargetTransformInfo::TCC_Expensive;
}
};
} // namespace llvm
#endif
PK iwFZ�̓"
"
Analysis/LoopUnrollAnalyzer.hnu �[��� //===- llvm/Analysis/LoopUnrollAnalyzer.h - Loop Unroll Analyzer-*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements UnrolledInstAnalyzer class. It's used for predicting
// potential effects that loop unrolling might have, such as enabling constant
// propagation and other optimizations.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_LOOPUNROLLANALYZER_H
#define LLVM_ANALYSIS_LOOPUNROLLANALYZER_H
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/Analysis/ScalarEvolution.h"
#include "llvm/IR/InstVisitor.h"
// This class is used to get an estimate of the optimization effects that we
// could get from complete loop unrolling. It comes from the fact that some
// loads might be replaced with concrete constant values and that could trigger
// a chain of instruction simplifications.
//
// E.g. we might have:
// int a[] = {0, 1, 0};
// v = 0;
// for (i = 0; i < 3; i ++)
// v += b[i]*a[i];
// If we completely unroll the loop, we would get:
// v = b[0]*a[0] + b[1]*a[1] + b[2]*a[2]
// Which then will be simplified to:
// v = b[0]* 0 + b[1]* 1 + b[2]* 0
// And finally:
// v = b[1]
namespace llvm {
class Instruction;
class UnrolledInstAnalyzer : private InstVisitor<UnrolledInstAnalyzer, bool> {
typedef InstVisitor<UnrolledInstAnalyzer, bool> Base;
friend class InstVisitor<UnrolledInstAnalyzer, bool>;
struct SimplifiedAddress {
Value *Base = nullptr;
ConstantInt *Offset = nullptr;
};
public:
UnrolledInstAnalyzer(unsigned Iteration,
DenseMap<Value *, Value *> &SimplifiedValues,
ScalarEvolution &SE, const Loop *L)
: SimplifiedValues(SimplifiedValues), SE(SE), L(L) {
IterationNumber = SE.getConstant(APInt(64, Iteration));
}
// Allow access to the initial visit method.
using Base::visit;
private:
/// A cache of pointer bases and constant-folded offsets corresponding
/// to GEP (or derived from GEP) instructions.
///
/// In order to find the base pointer one needs to perform non-trivial
/// traversal of the corresponding SCEV expression, so it's good to have the
/// results saved.
DenseMap<Value *, SimplifiedAddress> SimplifiedAddresses;
/// SCEV expression corresponding to number of currently simulated
/// iteration.
const SCEV *IterationNumber;
/// While we walk the loop instructions, we build up and maintain a mapping
/// of simplified values specific to this iteration. The idea is to propagate
/// any special information we have about loads that can be replaced with
/// constants after complete unrolling, and account for likely simplifications
/// post-unrolling.
DenseMap<Value *, Value *> &SimplifiedValues;
ScalarEvolution &SE;
const Loop *L;
bool simplifyInstWithSCEV(Instruction *I);
bool visitInstruction(Instruction &I);
bool visitBinaryOperator(BinaryOperator &I);
bool visitLoad(LoadInst &I);
bool visitCastInst(CastInst &I);
bool visitCmpInst(CmpInst &I);
bool visitPHINode(PHINode &PN);
};
}
#endif
PK iwFZ�{׆q
q
( Analysis/IndirectCallPromotionAnalysis.hnu �[��� //===- IndirectCallPromotionAnalysis.h - Indirect call analysis -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// Interface to identify indirect call promotion candidates.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_INDIRECTCALLPROMOTIONANALYSIS_H
#define LLVM_ANALYSIS_INDIRECTCALLPROMOTIONANALYSIS_H
#include "llvm/ProfileData/InstrProf.h"
namespace llvm {
class Instruction;
// Class for identifying profitable indirect call promotion candidates when
// the indirect-call value profile metadata is available.
class ICallPromotionAnalysis {
private:
// Allocate space to read the profile annotation.
std::unique_ptr<InstrProfValueData[]> ValueDataArray;
// Count is the call count for the direct-call target.
// TotalCount is the total call count for the indirect-call callsite.
// RemainingCount is the TotalCount minus promoted-direct-call count.
// Return true we should promote this indirect-call target.
bool isPromotionProfitable(uint64_t Count, uint64_t TotalCount,
uint64_t RemainingCount);
// Returns the number of profitable candidates to promote for the
// current ValueDataArray and the given \p Inst.
uint32_t getProfitablePromotionCandidates(const Instruction *Inst,
uint32_t NumVals,
uint64_t TotalCount);
// Noncopyable
ICallPromotionAnalysis(const ICallPromotionAnalysis &other) = delete;
ICallPromotionAnalysis &
operator=(const ICallPromotionAnalysis &other) = delete;
public:
ICallPromotionAnalysis();
/// Returns reference to array of InstrProfValueData for the given
/// instruction \p I.
///
/// The \p NumVals, \p TotalCount and \p NumCandidates
/// are set to the number of values in the array, the total profile count
/// of the indirect call \p I, and the number of profitable candidates
/// in the given array (which is sorted in reverse order of profitability).
///
/// The returned array space is owned by this class, and overwritten on
/// subsequent calls.
ArrayRef<InstrProfValueData>
getPromotionCandidatesForInstruction(const Instruction *I, uint32_t &NumVals,
uint64_t &TotalCount,
uint32_t &NumCandidates);
};
} // end namespace llvm
#endif
PK iwFZF��� � ! Analysis/BlockFrequencyInfoImpl.hnu �[��� //==- BlockFrequencyInfoImpl.h - Block Frequency Implementation --*- C++ -*-==//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Shared implementation of BlockFrequency for IR and Machine Instructions.
// See the documentation below for BlockFrequencyInfoImpl for details.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_BLOCKFREQUENCYINFOIMPL_H
#define LLVM_ANALYSIS_BLOCKFREQUENCYINFOIMPL_H
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/GraphTraits.h"
#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/SparseBitVector.h"
#include "llvm/ADT/Twine.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/ValueHandle.h"
#include "llvm/Support/BlockFrequency.h"
#include "llvm/Support/BranchProbability.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/DOTGraphTraits.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/ScaledNumber.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <deque>
#include <iterator>
#include <limits>
#include <list>
#include <optional>
#include <queue>
#include <string>
#include <utility>
#include <vector>
#define DEBUG_TYPE "block-freq"
namespace llvm {
extern llvm::cl::opt<bool> CheckBFIUnknownBlockQueries;
extern llvm::cl::opt<bool> UseIterativeBFIInference;
extern llvm::cl::opt<unsigned> IterativeBFIMaxIterationsPerBlock;
extern llvm::cl::opt<double> IterativeBFIPrecision;
class BranchProbabilityInfo;
class Function;
class Loop;
class LoopInfo;
class MachineBasicBlock;
class MachineBranchProbabilityInfo;
class MachineFunction;
class MachineLoop;
class MachineLoopInfo;
namespace bfi_detail {
struct IrreducibleGraph;
// This is part of a workaround for a GCC 4.7 crash on lambdas.
template <class BT> struct BlockEdgesAdder;
/// Mass of a block.
///
/// This class implements a sort of fixed-point fraction always between 0.0 and
/// 1.0. getMass() == std::numeric_limits<uint64_t>::max() indicates a value of
/// 1.0.
///
/// Masses can be added and subtracted. Simple saturation arithmetic is used,
/// so arithmetic operations never overflow or underflow.
///
/// Masses can be multiplied. Multiplication treats full mass as 1.0 and uses
/// an inexpensive floating-point algorithm that's off-by-one (almost, but not
/// quite, maximum precision).
///
/// Masses can be scaled by \a BranchProbability at maximum precision.
class BlockMass {
uint64_t Mass = 0;
public:
BlockMass() = default;
explicit BlockMass(uint64_t Mass) : Mass(Mass) {}
static BlockMass getEmpty() { return BlockMass(); }
static BlockMass getFull() {
return BlockMass(std::numeric_limits<uint64_t>::max());
}
uint64_t getMass() const { return Mass; }
bool isFull() const { return Mass == std::numeric_limits<uint64_t>::max(); }
bool isEmpty() const { return !Mass; }
bool operator!() const { return isEmpty(); }
/// Add another mass.
///
/// Adds another mass, saturating at \a isFull() rather than overflowing.
BlockMass &operator+=(BlockMass X) {
uint64_t Sum = Mass + X.Mass;
Mass = Sum < Mass ? std::numeric_limits<uint64_t>::max() : Sum;
return *this;
}
/// Subtract another mass.
///
/// Subtracts another mass, saturating at \a isEmpty() rather than
/// undeflowing.
BlockMass &operator-=(BlockMass X) {
uint64_t Diff = Mass - X.Mass;
Mass = Diff > Mass ? 0 : Diff;
return *this;
}
BlockMass &operator*=(BranchProbability P) {
Mass = P.scale(Mass);
return *this;
}
bool operator==(BlockMass X) const { return Mass == X.Mass; }
bool operator!=(BlockMass X) const { return Mass != X.Mass; }
bool operator<=(BlockMass X) const { return Mass <= X.Mass; }
bool operator>=(BlockMass X) const { return Mass >= X.Mass; }
bool operator<(BlockMass X) const { return Mass < X.Mass; }
bool operator>(BlockMass X) const { return Mass > X.Mass; }
/// Convert to scaled number.
///
/// Convert to \a ScaledNumber. \a isFull() gives 1.0, while \a isEmpty()
/// gives slightly above 0.0.
ScaledNumber<uint64_t> toScaled() const;
void dump() const;
raw_ostream &print(raw_ostream &OS) const;
};
inline BlockMass operator+(BlockMass L, BlockMass R) {
return BlockMass(L) += R;
}
inline BlockMass operator-(BlockMass L, BlockMass R) {
return BlockMass(L) -= R;
}
inline BlockMass operator*(BlockMass L, BranchProbability R) {
return BlockMass(L) *= R;
}
inline BlockMass operator*(BranchProbability L, BlockMass R) {
return BlockMass(R) *= L;
}
inline raw_ostream &operator<<(raw_ostream &OS, BlockMass X) {
return X.print(OS);
}
} // end namespace bfi_detail
/// Base class for BlockFrequencyInfoImpl
///
/// BlockFrequencyInfoImplBase has supporting data structures and some
/// algorithms for BlockFrequencyInfoImplBase. Only algorithms that depend on
/// the block type (or that call such algorithms) are skipped here.
///
/// Nevertheless, the majority of the overall algorithm documentation lives with
/// BlockFrequencyInfoImpl. See there for details.
class BlockFrequencyInfoImplBase {
public:
using Scaled64 = ScaledNumber<uint64_t>;
using BlockMass = bfi_detail::BlockMass;
/// Representative of a block.
///
/// This is a simple wrapper around an index into the reverse-post-order
/// traversal of the blocks.
///
/// Unlike a block pointer, its order has meaning (location in the
/// topological sort) and it's class is the same regardless of block type.
struct BlockNode {
using IndexType = uint32_t;
IndexType Index;
BlockNode() : Index(std::numeric_limits<uint32_t>::max()) {}
BlockNode(IndexType Index) : Index(Index) {}
bool operator==(const BlockNode &X) const { return Index == X.Index; }
bool operator!=(const BlockNode &X) const { return Index != X.Index; }
bool operator<=(const BlockNode &X) const { return Index <= X.Index; }
bool operator>=(const BlockNode &X) const { return Index >= X.Index; }
bool operator<(const BlockNode &X) const { return Index < X.Index; }
bool operator>(const BlockNode &X) const { return Index > X.Index; }
bool isValid() const { return Index <= getMaxIndex(); }
static size_t getMaxIndex() {
return std::numeric_limits<uint32_t>::max() - 1;
}
};
/// Stats about a block itself.
struct FrequencyData {
Scaled64 Scaled;
uint64_t Integer;
};
/// Data about a loop.
///
/// Contains the data necessary to represent a loop as a pseudo-node once it's
/// packaged.
struct LoopData {
using ExitMap = SmallVector<std::pair<BlockNode, BlockMass>, 4>;
using NodeList = SmallVector<BlockNode, 4>;
using HeaderMassList = SmallVector<BlockMass, 1>;
LoopData *Parent; ///< The parent loop.
bool IsPackaged = false; ///< Whether this has been packaged.
uint32_t NumHeaders = 1; ///< Number of headers.
ExitMap Exits; ///< Successor edges (and weights).
NodeList Nodes; ///< Header and the members of the loop.
HeaderMassList BackedgeMass; ///< Mass returned to each loop header.
BlockMass Mass;
Scaled64 Scale;
LoopData(LoopData *Parent, const BlockNode &Header)
: Parent(Parent), Nodes(1, Header), BackedgeMass(1) {}
template <class It1, class It2>
LoopData(LoopData *Parent, It1 FirstHeader, It1 LastHeader, It2 FirstOther,
It2 LastOther)
: Parent(Parent), Nodes(FirstHeader, LastHeader) {
NumHeaders = Nodes.size();
Nodes.insert(Nodes.end(), FirstOther, LastOther);
BackedgeMass.resize(NumHeaders);
}
bool isHeader(const BlockNode &Node) const {
if (isIrreducible())
return std::binary_search(Nodes.begin(), Nodes.begin() + NumHeaders,
Node);
return Node == Nodes[0];
}
BlockNode getHeader() const { return Nodes[0]; }
bool isIrreducible() const { return NumHeaders > 1; }
HeaderMassList::difference_type getHeaderIndex(const BlockNode &B) {
assert(isHeader(B) && "this is only valid on loop header blocks");
if (isIrreducible())
return std::lower_bound(Nodes.begin(), Nodes.begin() + NumHeaders, B) -
Nodes.begin();
return 0;
}
NodeList::const_iterator members_begin() const {
return Nodes.begin() + NumHeaders;
}
NodeList::const_iterator members_end() const { return Nodes.end(); }
iterator_range<NodeList::const_iterator> members() const {
return make_range(members_begin(), members_end());
}
};
/// Index of loop information.
struct WorkingData {
BlockNode Node; ///< This node.
LoopData *Loop = nullptr; ///< The loop this block is inside.
BlockMass Mass; ///< Mass distribution from the entry block.
WorkingData(const BlockNode &Node) : Node(Node) {}
bool isLoopHeader() const { return Loop && Loop->isHeader(Node); }
bool isDoubleLoopHeader() const {
return isLoopHeader() && Loop->Parent && Loop->Parent->isIrreducible() &&
Loop->Parent->isHeader(Node);
}
LoopData *getContainingLoop() const {
if (!isLoopHeader())
return Loop;
if (!isDoubleLoopHeader())
return Loop->Parent;
return Loop->Parent->Parent;
}
/// Resolve a node to its representative.
///
/// Get the node currently representing Node, which could be a containing
/// loop.
///
/// This function should only be called when distributing mass. As long as
/// there are no irreducible edges to Node, then it will have complexity
/// O(1) in this context.
///
/// In general, the complexity is O(L), where L is the number of loop
/// headers Node has been packaged into. Since this method is called in
/// the context of distributing mass, L will be the number of loop headers
/// an early exit edge jumps out of.
BlockNode getResolvedNode() const {
auto *L = getPackagedLoop();
return L ? L->getHeader() : Node;
}
LoopData *getPackagedLoop() const {
if (!Loop || !Loop->IsPackaged)
return nullptr;
auto *L = Loop;
while (L->Parent && L->Parent->IsPackaged)
L = L->Parent;
return L;
}
/// Get the appropriate mass for a node.
///
/// Get appropriate mass for Node. If Node is a loop-header (whose loop
/// has been packaged), returns the mass of its pseudo-node. If it's a
/// node inside a packaged loop, it returns the loop's mass.
BlockMass &getMass() {
if (!isAPackage())
return Mass;
if (!isADoublePackage())
return Loop->Mass;
return Loop->Parent->Mass;
}
/// Has ContainingLoop been packaged up?
bool isPackaged() const { return getResolvedNode() != Node; }
/// Has Loop been packaged up?
bool isAPackage() const { return isLoopHeader() && Loop->IsPackaged; }
/// Has Loop been packaged up twice?
bool isADoublePackage() const {
return isDoubleLoopHeader() && Loop->Parent->IsPackaged;
}
};
/// Unscaled probability weight.
///
/// Probability weight for an edge in the graph (including the
/// successor/target node).
///
/// All edges in the original function are 32-bit. However, exit edges from
/// loop packages are taken from 64-bit exit masses, so we need 64-bits of
/// space in general.
///
/// In addition to the raw weight amount, Weight stores the type of the edge
/// in the current context (i.e., the context of the loop being processed).
/// Is this a local edge within the loop, an exit from the loop, or a
/// backedge to the loop header?
struct Weight {
enum DistType { Local, Exit, Backedge };
DistType Type = Local;
BlockNode TargetNode;
uint64_t Amount = 0;
Weight() = default;
Weight(DistType Type, BlockNode TargetNode, uint64_t Amount)
: Type(Type), TargetNode(TargetNode), Amount(Amount) {}
};
/// Distribution of unscaled probability weight.
///
/// Distribution of unscaled probability weight to a set of successors.
///
/// This class collates the successor edge weights for later processing.
///
/// \a DidOverflow indicates whether \a Total did overflow while adding to
/// the distribution. It should never overflow twice.
struct Distribution {
using WeightList = SmallVector<Weight, 4>;
WeightList Weights; ///< Individual successor weights.
uint64_t Total = 0; ///< Sum of all weights.
bool DidOverflow = false; ///< Whether \a Total did overflow.
Distribution() = default;
void addLocal(const BlockNode &Node, uint64_t Amount) {
add(Node, Amount, Weight::Local);
}
void addExit(const BlockNode &Node, uint64_t Amount) {
add(Node, Amount, Weight::Exit);
}
void addBackedge(const BlockNode &Node, uint64_t Amount) {
add(Node, Amount, Weight::Backedge);
}
/// Normalize the distribution.
///
/// Combines multiple edges to the same \a Weight::TargetNode and scales
/// down so that \a Total fits into 32-bits.
///
/// This is linear in the size of \a Weights. For the vast majority of
/// cases, adjacent edge weights are combined by sorting WeightList and
/// combining adjacent weights. However, for very large edge lists an
/// auxiliary hash table is used.
void normalize();
private:
void add(const BlockNode &Node, uint64_t Amount, Weight::DistType Type);
};
/// Data about each block. This is used downstream.
std::vector<FrequencyData> Freqs;
/// Whether each block is an irreducible loop header.
/// This is used downstream.
SparseBitVector<> IsIrrLoopHeader;
/// Loop data: see initializeLoops().
std::vector<WorkingData> Working;
/// Indexed information about loops.
std::list<LoopData> Loops;
/// Virtual destructor.
///
/// Need a virtual destructor to mask the compiler warning about
/// getBlockName().
virtual ~BlockFrequencyInfoImplBase() = default;
/// Add all edges out of a packaged loop to the distribution.
///
/// Adds all edges from LocalLoopHead to Dist. Calls addToDist() to add each
/// successor edge.
///
/// \return \c true unless there's an irreducible backedge.
bool addLoopSuccessorsToDist(const LoopData *OuterLoop, LoopData &Loop,
Distribution &Dist);
/// Add an edge to the distribution.
///
/// Adds an edge to Succ to Dist. If \c LoopHead.isValid(), then whether the
/// edge is local/exit/backedge is in the context of LoopHead. Otherwise,
/// every edge should be a local edge (since all the loops are packaged up).
///
/// \return \c true unless aborted due to an irreducible backedge.
bool addToDist(Distribution &Dist, const LoopData *OuterLoop,
const BlockNode &Pred, const BlockNode &Succ, uint64_t Weight);
/// Analyze irreducible SCCs.
///
/// Separate irreducible SCCs from \c G, which is an explicit graph of \c
/// OuterLoop (or the top-level function, if \c OuterLoop is \c nullptr).
/// Insert them into \a Loops before \c Insert.
///
/// \return the \c LoopData nodes representing the irreducible SCCs.
iterator_range<std::list<LoopData>::iterator>
analyzeIrreducible(const bfi_detail::IrreducibleGraph &G, LoopData *OuterLoop,
std::list<LoopData>::iterator Insert);
/// Update a loop after packaging irreducible SCCs inside of it.
///
/// Update \c OuterLoop. Before finding irreducible control flow, it was
/// partway through \a computeMassInLoop(), so \a LoopData::Exits and \a
/// LoopData::BackedgeMass need to be reset. Also, nodes that were packaged
/// up need to be removed from \a OuterLoop::Nodes.
void updateLoopWithIrreducible(LoopData &OuterLoop);
/// Distribute mass according to a distribution.
///
/// Distributes the mass in Source according to Dist. If LoopHead.isValid(),
/// backedges and exits are stored in its entry in Loops.
///
/// Mass is distributed in parallel from two copies of the source mass.
void distributeMass(const BlockNode &Source, LoopData *OuterLoop,
Distribution &Dist);
/// Compute the loop scale for a loop.
void computeLoopScale(LoopData &Loop);
/// Adjust the mass of all headers in an irreducible loop.
///
/// Initially, irreducible loops are assumed to distribute their mass
/// equally among its headers. This can lead to wrong frequency estimates
/// since some headers may be executed more frequently than others.
///
/// This adjusts header mass distribution so it matches the weights of
/// the backedges going into each of the loop headers.
void adjustLoopHeaderMass(LoopData &Loop);
void distributeIrrLoopHeaderMass(Distribution &Dist);
/// Package up a loop.
void packageLoop(LoopData &Loop);
/// Unwrap loops.
void unwrapLoops();
/// Finalize frequency metrics.
///
/// Calculates final frequencies and cleans up no-longer-needed data
/// structures.
void finalizeMetrics();
/// Clear all memory.
void clear();
virtual std::string getBlockName(const BlockNode &Node) const;
std::string getLoopName(const LoopData &Loop) const;
virtual raw_ostream &print(raw_ostream &OS) const { return OS; }
void dump() const { print(dbgs()); }
Scaled64 getFloatingBlockFreq(const BlockNode &Node) const;
BlockFrequency getBlockFreq(const BlockNode &Node) const;
std::optional<uint64_t>
getBlockProfileCount(const Function &F, const BlockNode &Node,
bool AllowSynthetic = false) const;
std::optional<uint64_t>
getProfileCountFromFreq(const Function &F, uint64_t Freq,
bool AllowSynthetic = false) const;
bool isIrrLoopHeader(const BlockNode &Node);
void setBlockFreq(const BlockNode &Node, uint64_t Freq);
raw_ostream &printBlockFreq(raw_ostream &OS, const BlockNode &Node) const;
raw_ostream &printBlockFreq(raw_ostream &OS,
const BlockFrequency &Freq) const;
uint64_t getEntryFreq() const {
assert(!Freqs.empty());
return Freqs[0].Integer;
}
};
namespace bfi_detail {
template <class BlockT> struct TypeMap {};
template <> struct TypeMap<BasicBlock> {
using BlockT = BasicBlock;
using BlockKeyT = AssertingVH<const BasicBlock>;
using FunctionT = Function;
using BranchProbabilityInfoT = BranchProbabilityInfo;
using LoopT = Loop;
using LoopInfoT = LoopInfo;
};
template <> struct TypeMap<MachineBasicBlock> {
using BlockT = MachineBasicBlock;
using BlockKeyT = const MachineBasicBlock *;
using FunctionT = MachineFunction;
using BranchProbabilityInfoT = MachineBranchProbabilityInfo;
using LoopT = MachineLoop;
using LoopInfoT = MachineLoopInfo;
};
template <class BlockT, class BFIImplT>
class BFICallbackVH;
/// Get the name of a MachineBasicBlock.
///
/// Get the name of a MachineBasicBlock. It's templated so that including from
/// CodeGen is unnecessary (that would be a layering issue).
///
/// This is used mainly for debug output. The name is similar to
/// MachineBasicBlock::getFullName(), but skips the name of the function.
template <class BlockT> std::string getBlockName(const BlockT *BB) {
assert(BB && "Unexpected nullptr");
auto MachineName = "BB" + Twine(BB->getNumber());
if (BB->getBasicBlock())
return (MachineName + "[" + BB->getName() + "]").str();
return MachineName.str();
}
/// Get the name of a BasicBlock.
template <> inline std::string getBlockName(const BasicBlock *BB) {
assert(BB && "Unexpected nullptr");
return BB->getName().str();
}
/// Graph of irreducible control flow.
///
/// This graph is used for determining the SCCs in a loop (or top-level
/// function) that has irreducible control flow.
///
/// During the block frequency algorithm, the local graphs are defined in a
/// light-weight way, deferring to the \a BasicBlock or \a MachineBasicBlock
/// graphs for most edges, but getting others from \a LoopData::ExitMap. The
/// latter only has successor information.
///
/// \a IrreducibleGraph makes this graph explicit. It's in a form that can use
/// \a GraphTraits (so that \a analyzeIrreducible() can use \a scc_iterator),
/// and it explicitly lists predecessors and successors. The initialization
/// that relies on \c MachineBasicBlock is defined in the header.
struct IrreducibleGraph {
using BFIBase = BlockFrequencyInfoImplBase;
BFIBase &BFI;
using BlockNode = BFIBase::BlockNode;
struct IrrNode {
BlockNode Node;
unsigned NumIn = 0;
std::deque<const IrrNode *> Edges;
IrrNode(const BlockNode &Node) : Node(Node) {}
using iterator = std::deque<const IrrNode *>::const_iterator;
iterator pred_begin() const { return Edges.begin(); }
iterator succ_begin() const { return Edges.begin() + NumIn; }
iterator pred_end() const { return succ_begin(); }
iterator succ_end() const { return Edges.end(); }
};
BlockNode Start;
const IrrNode *StartIrr = nullptr;
std::vector<IrrNode> Nodes;
SmallDenseMap<uint32_t, IrrNode *, 4> Lookup;
/// Construct an explicit graph containing irreducible control flow.
///
/// Construct an explicit graph of the control flow in \c OuterLoop (or the
/// top-level function, if \c OuterLoop is \c nullptr). Uses \c
/// addBlockEdges to add block successors that have not been packaged into
/// loops.
///
/// \a BlockFrequencyInfoImpl::computeIrreducibleMass() is the only expected
/// user of this.
template <class BlockEdgesAdder>
IrreducibleGraph(BFIBase &BFI, const BFIBase::LoopData *OuterLoop,
BlockEdgesAdder addBlockEdges) : BFI(BFI) {
initialize(OuterLoop, addBlockEdges);
}
template <class BlockEdgesAdder>
void initialize(const BFIBase::LoopData *OuterLoop,
BlockEdgesAdder addBlockEdges);
void addNodesInLoop(const BFIBase::LoopData &OuterLoop);
void addNodesInFunction();
void addNode(const BlockNode &Node) {
Nodes.emplace_back(Node);
BFI.Working[Node.Index].getMass() = BlockMass::getEmpty();
}
void indexNodes();
template <class BlockEdgesAdder>
void addEdges(const BlockNode &Node, const BFIBase::LoopData *OuterLoop,
BlockEdgesAdder addBlockEdges);
void addEdge(IrrNode &Irr, const BlockNode &Succ,
const BFIBase::LoopData *OuterLoop);
};
template <class BlockEdgesAdder>
void IrreducibleGraph::initialize(const BFIBase::LoopData *OuterLoop,
BlockEdgesAdder addBlockEdges) {
if (OuterLoop) {
addNodesInLoop(*OuterLoop);
for (auto N : OuterLoop->Nodes)
addEdges(N, OuterLoop, addBlockEdges);
} else {
addNodesInFunction();
for (uint32_t Index = 0; Index < BFI.Working.size(); ++Index)
addEdges(Index, OuterLoop, addBlockEdges);
}
StartIrr = Lookup[Start.Index];
}
template <class BlockEdgesAdder>
void IrreducibleGraph::addEdges(const BlockNode &Node,
const BFIBase::LoopData *OuterLoop,
BlockEdgesAdder addBlockEdges) {
auto L = Lookup.find(Node.Index);
if (L == Lookup.end())
return;
IrrNode &Irr = *L->second;
const auto &Working = BFI.Working[Node.Index];
if (Working.isAPackage())
for (const auto &I : Working.Loop->Exits)
addEdge(Irr, I.first, OuterLoop);
else
addBlockEdges(*this, Irr, OuterLoop);
}
} // end namespace bfi_detail
/// Shared implementation for block frequency analysis.
///
/// This is a shared implementation of BlockFrequencyInfo and
/// MachineBlockFrequencyInfo, and calculates the relative frequencies of
/// blocks.
///
/// LoopInfo defines a loop as a "non-trivial" SCC dominated by a single block,
/// which is called the header. A given loop, L, can have sub-loops, which are
/// loops within the subgraph of L that exclude its header. (A "trivial" SCC
/// consists of a single block that does not have a self-edge.)
///
/// In addition to loops, this algorithm has limited support for irreducible
/// SCCs, which are SCCs with multiple entry blocks. Irreducible SCCs are
/// discovered on the fly, and modelled as loops with multiple headers.
///
/// The headers of irreducible sub-SCCs consist of its entry blocks and all
/// nodes that are targets of a backedge within it (excluding backedges within
/// true sub-loops). Block frequency calculations act as if a block is
/// inserted that intercepts all the edges to the headers. All backedges and
/// entries point to this block. Its successors are the headers, which split
/// the frequency evenly.
///
/// This algorithm leverages BlockMass and ScaledNumber to maintain precision,
/// separates mass distribution from loop scaling, and dithers to eliminate
/// probability mass loss.
///
/// The implementation is split between BlockFrequencyInfoImpl, which knows the
/// type of graph being modelled (BasicBlock vs. MachineBasicBlock), and
/// BlockFrequencyInfoImplBase, which doesn't. The base class uses \a
/// BlockNode, a wrapper around a uint32_t. BlockNode is numbered from 0 in
/// reverse-post order. This gives two advantages: it's easy to compare the
/// relative ordering of two nodes, and maps keyed on BlockT can be represented
/// by vectors.
///
/// This algorithm is O(V+E), unless there is irreducible control flow, in
/// which case it's O(V*E) in the worst case.
///
/// These are the main stages:
///
/// 0. Reverse post-order traversal (\a initializeRPOT()).
///
/// Run a single post-order traversal and save it (in reverse) in RPOT.
/// All other stages make use of this ordering. Save a lookup from BlockT
/// to BlockNode (the index into RPOT) in Nodes.
///
/// 1. Loop initialization (\a initializeLoops()).
///
/// Translate LoopInfo/MachineLoopInfo into a form suitable for the rest of
/// the algorithm. In particular, store the immediate members of each loop
/// in reverse post-order.
///
/// 2. Calculate mass and scale in loops (\a computeMassInLoops()).
///
/// For each loop (bottom-up), distribute mass through the DAG resulting
/// from ignoring backedges and treating sub-loops as a single pseudo-node.
/// Track the backedge mass distributed to the loop header, and use it to
/// calculate the loop scale (number of loop iterations). Immediate
/// members that represent sub-loops will already have been visited and
/// packaged into a pseudo-node.
///
/// Distributing mass in a loop is a reverse-post-order traversal through
/// the loop. Start by assigning full mass to the Loop header. For each
/// node in the loop:
///
/// - Fetch and categorize the weight distribution for its successors.
/// If this is a packaged-subloop, the weight distribution is stored
/// in \a LoopData::Exits. Otherwise, fetch it from
/// BranchProbabilityInfo.
///
/// - Each successor is categorized as \a Weight::Local, a local edge
/// within the current loop, \a Weight::Backedge, a backedge to the
/// loop header, or \a Weight::Exit, any successor outside the loop.
/// The weight, the successor, and its category are stored in \a
/// Distribution. There can be multiple edges to each successor.
///
/// - If there's a backedge to a non-header, there's an irreducible SCC.
/// The usual flow is temporarily aborted. \a
/// computeIrreducibleMass() finds the irreducible SCCs within the
/// loop, packages them up, and restarts the flow.
///
/// - Normalize the distribution: scale weights down so that their sum
/// is 32-bits, and coalesce multiple edges to the same node.
///
/// - Distribute the mass accordingly, dithering to minimize mass loss,
/// as described in \a distributeMass().
///
/// In the case of irreducible loops, instead of a single loop header,
/// there will be several. The computation of backedge masses is similar
/// but instead of having a single backedge mass, there will be one
/// backedge per loop header. In these cases, each backedge will carry
/// a mass proportional to the edge weights along the corresponding
/// path.
///
/// At the end of propagation, the full mass assigned to the loop will be
/// distributed among the loop headers proportionally according to the
/// mass flowing through their backedges.
///
/// Finally, calculate the loop scale from the accumulated backedge mass.
///
/// 3. Distribute mass in the function (\a computeMassInFunction()).
///
/// Finally, distribute mass through the DAG resulting from packaging all
/// loops in the function. This uses the same algorithm as distributing
/// mass in a loop, except that there are no exit or backedge edges.
///
/// 4. Unpackage loops (\a unwrapLoops()).
///
/// Initialize each block's frequency to a floating point representation of
/// its mass.
///
/// Visit loops top-down, scaling the frequencies of its immediate members
/// by the loop's pseudo-node's frequency.
///
/// 5. Convert frequencies to a 64-bit range (\a finalizeMetrics()).
///
/// Using the min and max frequencies as a guide, translate floating point
/// frequencies to an appropriate range in uint64_t.
///
/// It has some known flaws.
///
/// - The model of irreducible control flow is a rough approximation.
///
/// Modelling irreducible control flow exactly involves setting up and
/// solving a group of infinite geometric series. Such precision is
/// unlikely to be worthwhile, since most of our algorithms give up on
/// irreducible control flow anyway.
///
/// Nevertheless, we might find that we need to get closer. Here's a sort
/// of TODO list for the model with diminishing returns, to be completed as
/// necessary.
///
/// - The headers for the \a LoopData representing an irreducible SCC
/// include non-entry blocks. When these extra blocks exist, they
/// indicate a self-contained irreducible sub-SCC. We could treat them
/// as sub-loops, rather than arbitrarily shoving the problematic
/// blocks into the headers of the main irreducible SCC.
///
/// - Entry frequencies are assumed to be evenly split between the
/// headers of a given irreducible SCC, which is the only option if we
/// need to compute mass in the SCC before its parent loop. Instead,
/// we could partially compute mass in the parent loop, and stop when
/// we get to the SCC. Here, we have the correct ratio of entry
/// masses, which we can use to adjust their relative frequencies.
/// Compute mass in the SCC, and then continue propagation in the
/// parent.
///
/// - We can propagate mass iteratively through the SCC, for some fixed
/// number of iterations. Each iteration starts by assigning the entry
/// blocks their backedge mass from the prior iteration. The final
/// mass for each block (and each exit, and the total backedge mass
/// used for computing loop scale) is the sum of all iterations.
/// (Running this until fixed point would "solve" the geometric
/// series by simulation.)
template <class BT> class BlockFrequencyInfoImpl : BlockFrequencyInfoImplBase {
// This is part of a workaround for a GCC 4.7 crash on lambdas.
friend struct bfi_detail::BlockEdgesAdder<BT>;
using BlockT = typename bfi_detail::TypeMap<BT>::BlockT;
using BlockKeyT = typename bfi_detail::TypeMap<BT>::BlockKeyT;
using FunctionT = typename bfi_detail::TypeMap<BT>::FunctionT;
using BranchProbabilityInfoT =
typename bfi_detail::TypeMap<BT>::BranchProbabilityInfoT;
using LoopT = typename bfi_detail::TypeMap<BT>::LoopT;
using LoopInfoT = typename bfi_detail::TypeMap<BT>::LoopInfoT;
using Successor = GraphTraits<const BlockT *>;
using Predecessor = GraphTraits<Inverse<const BlockT *>>;
using BFICallbackVH =
bfi_detail::BFICallbackVH<BlockT, BlockFrequencyInfoImpl>;
const BranchProbabilityInfoT *BPI = nullptr;
const LoopInfoT *LI = nullptr;
const FunctionT *F = nullptr;
// All blocks in reverse postorder.
std::vector<const BlockT *> RPOT;
DenseMap<BlockKeyT, std::pair<BlockNode, BFICallbackVH>> Nodes;
using rpot_iterator = typename std::vector<const BlockT *>::const_iterator;
rpot_iterator rpot_begin() const { return RPOT.begin(); }
rpot_iterator rpot_end() const { return RPOT.end(); }
size_t getIndex(const rpot_iterator &I) const { return I - rpot_begin(); }
BlockNode getNode(const rpot_iterator &I) const {
return BlockNode(getIndex(I));
}
BlockNode getNode(const BlockT *BB) const { return Nodes.lookup(BB).first; }
const BlockT *getBlock(const BlockNode &Node) const {
assert(Node.Index < RPOT.size());
return RPOT[Node.Index];
}
/// Run (and save) a post-order traversal.
///
/// Saves a reverse post-order traversal of all the nodes in \a F.
void initializeRPOT();
/// Initialize loop data.
///
/// Build up \a Loops using \a LoopInfo. \a LoopInfo gives us a mapping from
/// each block to the deepest loop it's in, but we need the inverse. For each
/// loop, we store in reverse post-order its "immediate" members, defined as
/// the header, the headers of immediate sub-loops, and all other blocks in
/// the loop that are not in sub-loops.
void initializeLoops();
/// Propagate to a block's successors.
///
/// In the context of distributing mass through \c OuterLoop, divide the mass
/// currently assigned to \c Node between its successors.
///
/// \return \c true unless there's an irreducible backedge.
bool propagateMassToSuccessors(LoopData *OuterLoop, const BlockNode &Node);
/// Compute mass in a particular loop.
///
/// Assign mass to \c Loop's header, and then for each block in \c Loop in
/// reverse post-order, distribute mass to its successors. Only visits nodes
/// that have not been packaged into sub-loops.
///
/// \pre \a computeMassInLoop() has been called for each subloop of \c Loop.
/// \return \c true unless there's an irreducible backedge.
bool computeMassInLoop(LoopData &Loop);
/// Try to compute mass in the top-level function.
///
/// Assign mass to the entry block, and then for each block in reverse
/// post-order, distribute mass to its successors. Skips nodes that have
/// been packaged into loops.
///
/// \pre \a computeMassInLoops() has been called.
/// \return \c true unless there's an irreducible backedge.
bool tryToComputeMassInFunction();
/// Compute mass in (and package up) irreducible SCCs.
///
/// Find the irreducible SCCs in \c OuterLoop, add them to \a Loops (in front
/// of \c Insert), and call \a computeMassInLoop() on each of them.
///
/// If \c OuterLoop is \c nullptr, it refers to the top-level function.
///
/// \pre \a computeMassInLoop() has been called for each subloop of \c
/// OuterLoop.
/// \pre \c Insert points at the last loop successfully processed by \a
/// computeMassInLoop().
/// \pre \c OuterLoop has irreducible SCCs.
void computeIrreducibleMass(LoopData *OuterLoop,
std::list<LoopData>::iterator Insert);
/// Compute mass in all loops.
///
/// For each loop bottom-up, call \a computeMassInLoop().
///
/// \a computeMassInLoop() aborts (and returns \c false) on loops that
/// contain a irreducible sub-SCCs. Use \a computeIrreducibleMass() and then
/// re-enter \a computeMassInLoop().
///
/// \post \a computeMassInLoop() has returned \c true for every loop.
void computeMassInLoops();
/// Compute mass in the top-level function.
///
/// Uses \a tryToComputeMassInFunction() and \a computeIrreducibleMass() to
/// compute mass in the top-level function.
///
/// \post \a tryToComputeMassInFunction() has returned \c true.
void computeMassInFunction();
std::string getBlockName(const BlockNode &Node) const override {
return bfi_detail::getBlockName(getBlock(Node));
}
/// The current implementation for computing relative block frequencies does
/// not handle correctly control-flow graphs containing irreducible loops. To
/// resolve the problem, we apply a post-processing step, which iteratively
/// updates block frequencies based on the frequencies of their predesessors.
/// This corresponds to finding the stationary point of the Markov chain by
/// an iterative method aka "PageRank computation".
/// The algorithm takes at most O(|E| * IterativeBFIMaxIterations) steps but
/// typically converges faster.
///
/// Decide whether we want to apply iterative inference for a given function.
bool needIterativeInference() const;
/// Apply an iterative post-processing to infer correct counts for irr loops.
void applyIterativeInference();
using ProbMatrixType = std::vector<std::vector<std::pair<size_t, Scaled64>>>;
/// Run iterative inference for a probability matrix and initial frequencies.
void iterativeInference(const ProbMatrixType &ProbMatrix,
std::vector<Scaled64> &Freq) const;
/// Find all blocks to apply inference on, that is, reachable from the entry
/// and backward reachable from exists along edges with positive probability.
void findReachableBlocks(std::vector<const BlockT *> &Blocks) const;
/// Build a matrix of probabilities with transitions (edges) between the
/// blocks: ProbMatrix[I] holds pairs (J, P), where Pr[J -> I | J] = P
void initTransitionProbabilities(
const std::vector<const BlockT *> &Blocks,
const DenseMap<const BlockT *, size_t> &BlockIndex,
ProbMatrixType &ProbMatrix) const;
#ifndef NDEBUG
/// Compute the discrepancy between current block frequencies and the
/// probability matrix.
Scaled64 discrepancy(const ProbMatrixType &ProbMatrix,
const std::vector<Scaled64> &Freq) const;
#endif
public:
BlockFrequencyInfoImpl() = default;
const FunctionT *getFunction() const { return F; }
void calculate(const FunctionT &F, const BranchProbabilityInfoT &BPI,
const LoopInfoT &LI);
using BlockFrequencyInfoImplBase::getEntryFreq;
BlockFrequency getBlockFreq(const BlockT *BB) const {
return BlockFrequencyInfoImplBase::getBlockFreq(getNode(BB));
}
std::optional<uint64_t>
getBlockProfileCount(const Function &F, const BlockT *BB,
bool AllowSynthetic = false) const {
return BlockFrequencyInfoImplBase::getBlockProfileCount(F, getNode(BB),
AllowSynthetic);
}
std::optional<uint64_t>
getProfileCountFromFreq(const Function &F, uint64_t Freq,
bool AllowSynthetic = false) const {
return BlockFrequencyInfoImplBase::getProfileCountFromFreq(F, Freq,
AllowSynthetic);
}
bool isIrrLoopHeader(const BlockT *BB) {
return BlockFrequencyInfoImplBase::isIrrLoopHeader(getNode(BB));
}
void setBlockFreq(const BlockT *BB, uint64_t Freq);
void forgetBlock(const BlockT *BB) {
// We don't erase corresponding items from `Freqs`, `RPOT` and other to
// avoid invalidating indices. Doing so would have saved some memory, but
// it's not worth it.
Nodes.erase(BB);
}
Scaled64 getFloatingBlockFreq(const BlockT *BB) const {
return BlockFrequencyInfoImplBase::getFloatingBlockFreq(getNode(BB));
}
const BranchProbabilityInfoT &getBPI() const { return *BPI; }
/// Print the frequencies for the current function.
///
/// Prints the frequencies for the blocks in the current function.
///
/// Blocks are printed in the natural iteration order of the function, rather
/// than reverse post-order. This provides two advantages: writing -analyze
/// tests is easier (since blocks come out in source order), and even
/// unreachable blocks are printed.
///
/// \a BlockFrequencyInfoImplBase::print() only knows reverse post-order, so
/// we need to override it here.
raw_ostream &print(raw_ostream &OS) const override;
using BlockFrequencyInfoImplBase::dump;
using BlockFrequencyInfoImplBase::printBlockFreq;
raw_ostream &printBlockFreq(raw_ostream &OS, const BlockT *BB) const {
return BlockFrequencyInfoImplBase::printBlockFreq(OS, getNode(BB));
}
void verifyMatch(BlockFrequencyInfoImpl<BT> &Other) const;
};
namespace bfi_detail {
template <class BFIImplT>
class BFICallbackVH<BasicBlock, BFIImplT> : public CallbackVH {
BFIImplT *BFIImpl;
public:
BFICallbackVH() = default;
BFICallbackVH(const BasicBlock *BB, BFIImplT *BFIImpl)
: CallbackVH(BB), BFIImpl(BFIImpl) {}
virtual ~BFICallbackVH() = default;
void deleted() override {
BFIImpl->forgetBlock(cast<BasicBlock>(getValPtr()));
}
};
/// Dummy implementation since MachineBasicBlocks aren't Values, so ValueHandles
/// don't apply to them.
template <class BFIImplT>
class BFICallbackVH<MachineBasicBlock, BFIImplT> {
public:
BFICallbackVH() = default;
BFICallbackVH(const MachineBasicBlock *, BFIImplT *) {}
};
} // end namespace bfi_detail
template <class BT>
void BlockFrequencyInfoImpl<BT>::calculate(const FunctionT &F,
const BranchProbabilityInfoT &BPI,
const LoopInfoT &LI) {
// Save the parameters.
this->BPI = &BPI;
this->LI = &LI;
this->F = &F;
// Clean up left-over data structures.
BlockFrequencyInfoImplBase::clear();
RPOT.clear();
Nodes.clear();
// Initialize.
LLVM_DEBUG(dbgs() << "\nblock-frequency: " << F.getName()
<< "\n================="
<< std::string(F.getName().size(), '=') << "\n");
initializeRPOT();
initializeLoops();
// Visit loops in post-order to find the local mass distribution, and then do
// the full function.
computeMassInLoops();
computeMassInFunction();
unwrapLoops();
// Apply a post-processing step improving computed frequencies for functions
// with irreducible loops.
if (needIterativeInference())
applyIterativeInference();
finalizeMetrics();
if (CheckBFIUnknownBlockQueries) {
// To detect BFI queries for unknown blocks, add entries for unreachable
// blocks, if any. This is to distinguish between known/existing unreachable
// blocks and unknown blocks.
for (const BlockT &BB : F)
if (!Nodes.count(&BB))
setBlockFreq(&BB, 0);
}
}
template <class BT>
void BlockFrequencyInfoImpl<BT>::setBlockFreq(const BlockT *BB, uint64_t Freq) {
if (Nodes.count(BB))
BlockFrequencyInfoImplBase::setBlockFreq(getNode(BB), Freq);
else {
// If BB is a newly added block after BFI is done, we need to create a new
// BlockNode for it assigned with a new index. The index can be determined
// by the size of Freqs.
BlockNode NewNode(Freqs.size());
Nodes[BB] = {NewNode, BFICallbackVH(BB, this)};
Freqs.emplace_back();
BlockFrequencyInfoImplBase::setBlockFreq(NewNode, Freq);
}
}
template <class BT> void BlockFrequencyInfoImpl<BT>::initializeRPOT() {
const BlockT *Entry = &F->front();
RPOT.reserve(F->size());
std::copy(po_begin(Entry), po_end(Entry), std::back_inserter(RPOT));
std::reverse(RPOT.begin(), RPOT.end());
assert(RPOT.size() - 1 <= BlockNode::getMaxIndex() &&
"More nodes in function than Block Frequency Info supports");
LLVM_DEBUG(dbgs() << "reverse-post-order-traversal\n");
for (rpot_iterator I = rpot_begin(), E = rpot_end(); I != E; ++I) {
BlockNode Node = getNode(I);
LLVM_DEBUG(dbgs() << " - " << getIndex(I) << ": " << getBlockName(Node)
<< "\n");
Nodes[*I] = {Node, BFICallbackVH(*I, this)};
}
Working.reserve(RPOT.size());
for (size_t Index = 0; Index < RPOT.size(); ++Index)
Working.emplace_back(Index);
Freqs.resize(RPOT.size());
}
template <class BT> void BlockFrequencyInfoImpl<BT>::initializeLoops() {
LLVM_DEBUG(dbgs() << "loop-detection\n");
if (LI->empty())
return;
// Visit loops top down and assign them an index.
std::deque<std::pair<const LoopT *, LoopData *>> Q;
for (const LoopT *L : *LI)
Q.emplace_back(L, nullptr);
while (!Q.empty()) {
const LoopT *Loop = Q.front().first;
LoopData *Parent = Q.front().second;
Q.pop_front();
BlockNode Header = getNode(Loop->getHeader());
assert(Header.isValid());
Loops.emplace_back(Parent, Header);
Working[Header.Index].Loop = &Loops.back();
LLVM_DEBUG(dbgs() << " - loop = " << getBlockName(Header) << "\n");
for (const LoopT *L : *Loop)
Q.emplace_back(L, &Loops.back());
}
// Visit nodes in reverse post-order and add them to their deepest containing
// loop.
for (size_t Index = 0; Index < RPOT.size(); ++Index) {
// Loop headers have already been mostly mapped.
if (Working[Index].isLoopHeader()) {
LoopData *ContainingLoop = Working[Index].getContainingLoop();
if (ContainingLoop)
ContainingLoop->Nodes.push_back(Index);
continue;
}
const LoopT *Loop = LI->getLoopFor(RPOT[Index]);
if (!Loop)
continue;
// Add this node to its containing loop's member list.
BlockNode Header = getNode(Loop->getHeader());
assert(Header.isValid());
const auto &HeaderData = Working[Header.Index];
assert(HeaderData.isLoopHeader());
Working[Index].Loop = HeaderData.Loop;
HeaderData.Loop->Nodes.push_back(Index);
LLVM_DEBUG(dbgs() << " - loop = " << getBlockName(Header)
<< ": member = " << getBlockName(Index) << "\n");
}
}
template <class BT> void BlockFrequencyInfoImpl<BT>::computeMassInLoops() {
// Visit loops with the deepest first, and the top-level loops last.
for (auto L = Loops.rbegin(), E = Loops.rend(); L != E; ++L) {
if (computeMassInLoop(*L))
continue;
auto Next = std::next(L);
computeIrreducibleMass(&*L, L.base());
L = std::prev(Next);
if (computeMassInLoop(*L))
continue;
llvm_unreachable("unhandled irreducible control flow");
}
}
template <class BT>
bool BlockFrequencyInfoImpl<BT>::computeMassInLoop(LoopData &Loop) {
// Compute mass in loop.
LLVM_DEBUG(dbgs() << "compute-mass-in-loop: " << getLoopName(Loop) << "\n");
if (Loop.isIrreducible()) {
LLVM_DEBUG(dbgs() << "isIrreducible = true\n");
Distribution Dist;
unsigned NumHeadersWithWeight = 0;
std::optional<uint64_t> MinHeaderWeight;
DenseSet<uint32_t> HeadersWithoutWeight;
HeadersWithoutWeight.reserve(Loop.NumHeaders);
for (uint32_t H = 0; H < Loop.NumHeaders; ++H) {
auto &HeaderNode = Loop.Nodes[H];
const BlockT *Block = getBlock(HeaderNode);
IsIrrLoopHeader.set(Loop.Nodes[H].Index);
std::optional<uint64_t> HeaderWeight = Block->getIrrLoopHeaderWeight();
if (!HeaderWeight) {
LLVM_DEBUG(dbgs() << "Missing irr loop header metadata on "
<< getBlockName(HeaderNode) << "\n");
HeadersWithoutWeight.insert(H);
continue;
}
LLVM_DEBUG(dbgs() << getBlockName(HeaderNode)
<< " has irr loop header weight " << *HeaderWeight
<< "\n");
NumHeadersWithWeight++;
uint64_t HeaderWeightValue = *HeaderWeight;
if (!MinHeaderWeight || HeaderWeightValue < MinHeaderWeight)
MinHeaderWeight = HeaderWeightValue;
if (HeaderWeightValue) {
Dist.addLocal(HeaderNode, HeaderWeightValue);
}
}
// As a heuristic, if some headers don't have a weight, give them the
// minimum weight seen (not to disrupt the existing trends too much by
// using a weight that's in the general range of the other headers' weights,
// and the minimum seems to perform better than the average.)
// FIXME: better update in the passes that drop the header weight.
// If no headers have a weight, give them even weight (use weight 1).
if (!MinHeaderWeight)
MinHeaderWeight = 1;
for (uint32_t H : HeadersWithoutWeight) {
auto &HeaderNode = Loop.Nodes[H];
assert(!getBlock(HeaderNode)->getIrrLoopHeaderWeight() &&
"Shouldn't have a weight metadata");
uint64_t MinWeight = *MinHeaderWeight;
LLVM_DEBUG(dbgs() << "Giving weight " << MinWeight << " to "
<< getBlockName(HeaderNode) << "\n");
if (MinWeight)
Dist.addLocal(HeaderNode, MinWeight);
}
distributeIrrLoopHeaderMass(Dist);
for (const BlockNode &M : Loop.Nodes)
if (!propagateMassToSuccessors(&Loop, M))
llvm_unreachable("unhandled irreducible control flow");
if (NumHeadersWithWeight == 0)
// No headers have a metadata. Adjust header mass.
adjustLoopHeaderMass(Loop);
} else {
Working[Loop.getHeader().Index].getMass() = BlockMass::getFull();
if (!propagateMassToSuccessors(&Loop, Loop.getHeader()))
llvm_unreachable("irreducible control flow to loop header!?");
for (const BlockNode &M : Loop.members())
if (!propagateMassToSuccessors(&Loop, M))
// Irreducible backedge.
return false;
}
computeLoopScale(Loop);
packageLoop(Loop);
return true;
}
template <class BT>
bool BlockFrequencyInfoImpl<BT>::tryToComputeMassInFunction() {
// Compute mass in function.
LLVM_DEBUG(dbgs() << "compute-mass-in-function\n");
assert(!Working.empty() && "no blocks in function");
assert(!Working[0].isLoopHeader() && "entry block is a loop header");
Working[0].getMass() = BlockMass::getFull();
for (rpot_iterator I = rpot_begin(), IE = rpot_end(); I != IE; ++I) {
// Check for nodes that have been packaged.
BlockNode Node = getNode(I);
if (Working[Node.Index].isPackaged())
continue;
if (!propagateMassToSuccessors(nullptr, Node))
return false;
}
return true;
}
template <class BT> void BlockFrequencyInfoImpl<BT>::computeMassInFunction() {
if (tryToComputeMassInFunction())
return;
computeIrreducibleMass(nullptr, Loops.begin());
if (tryToComputeMassInFunction())
return;
llvm_unreachable("unhandled irreducible control flow");
}
template <class BT>
bool BlockFrequencyInfoImpl<BT>::needIterativeInference() const {
if (!UseIterativeBFIInference)
return false;
if (!F->getFunction().hasProfileData())
return false;
// Apply iterative inference only if the function contains irreducible loops;
// otherwise, computed block frequencies are reasonably correct.
for (auto L = Loops.rbegin(), E = Loops.rend(); L != E; ++L) {
if (L->isIrreducible())
return true;
}
return false;
}
template <class BT> void BlockFrequencyInfoImpl<BT>::applyIterativeInference() {
// Extract blocks for processing: a block is considered for inference iff it
// can be reached from the entry by edges with a positive probability.
// Non-processed blocks are assigned with the zero frequency and are ignored
// in the computation
std::vector<const BlockT *> ReachableBlocks;
findReachableBlocks(ReachableBlocks);
if (ReachableBlocks.empty())
return;
// The map is used to to index successors/predecessors of reachable blocks in
// the ReachableBlocks vector
DenseMap<const BlockT *, size_t> BlockIndex;
// Extract initial frequencies for the reachable blocks
auto Freq = std::vector<Scaled64>(ReachableBlocks.size());
Scaled64 SumFreq;
for (size_t I = 0; I < ReachableBlocks.size(); I++) {
const BlockT *BB = ReachableBlocks[I];
BlockIndex[BB] = I;
Freq[I] = getFloatingBlockFreq(BB);
SumFreq += Freq[I];
}
assert(!SumFreq.isZero() && "empty initial block frequencies");
LLVM_DEBUG(dbgs() << "Applying iterative inference for " << F->getName()
<< " with " << ReachableBlocks.size() << " blocks\n");
// Normalizing frequencies so they sum up to 1.0
for (auto &Value : Freq) {
Value /= SumFreq;
}
// Setting up edge probabilities using sparse matrix representation:
// ProbMatrix[I] holds a vector of pairs (J, P) where Pr[J -> I | J] = P
ProbMatrixType ProbMatrix;
initTransitionProbabilities(ReachableBlocks, BlockIndex, ProbMatrix);
// Run the propagation
iterativeInference(ProbMatrix, Freq);
// Assign computed frequency values
for (const BlockT &BB : *F) {
auto Node = getNode(&BB);
if (!Node.isValid())
continue;
if (BlockIndex.count(&BB)) {
Freqs[Node.Index].Scaled = Freq[BlockIndex[&BB]];
} else {
Freqs[Node.Index].Scaled = Scaled64::getZero();
}
}
}
template <class BT>
void BlockFrequencyInfoImpl<BT>::iterativeInference(
const ProbMatrixType &ProbMatrix, std::vector<Scaled64> &Freq) const {
assert(0.0 < IterativeBFIPrecision && IterativeBFIPrecision < 1.0 &&
"incorrectly specified precision");
// Convert double precision to Scaled64
const auto Precision =
Scaled64::getInverse(static_cast<uint64_t>(1.0 / IterativeBFIPrecision));
const size_t MaxIterations = IterativeBFIMaxIterationsPerBlock * Freq.size();
#ifndef NDEBUG
LLVM_DEBUG(dbgs() << " Initial discrepancy = "
<< discrepancy(ProbMatrix, Freq).toString() << "\n");
#endif
// Successors[I] holds unique sucessors of the I-th block
auto Successors = std::vector<std::vector<size_t>>(Freq.size());
for (size_t I = 0; I < Freq.size(); I++) {
for (const auto &Jump : ProbMatrix[I]) {
Successors[Jump.first].push_back(I);
}
}
// To speedup computation, we maintain a set of "active" blocks whose
// frequencies need to be updated based on the incoming edges.
// The set is dynamic and changes after every update. Initially all blocks
// with a positive frequency are active
auto IsActive = BitVector(Freq.size(), false);
std::queue<size_t> ActiveSet;
for (size_t I = 0; I < Freq.size(); I++) {
if (Freq[I] > 0) {
ActiveSet.push(I);
IsActive[I] = true;
}
}
// Iterate over the blocks propagating frequencies
size_t It = 0;
while (It++ < MaxIterations && !ActiveSet.empty()) {
size_t I = ActiveSet.front();
ActiveSet.pop();
IsActive[I] = false;
// Compute a new frequency for the block: NewFreq := Freq \times ProbMatrix.
// A special care is taken for self-edges that needs to be scaled by
// (1.0 - SelfProb), where SelfProb is the sum of probabilities on the edges
Scaled64 NewFreq;
Scaled64 OneMinusSelfProb = Scaled64::getOne();
for (const auto &Jump : ProbMatrix[I]) {
if (Jump.first == I) {
OneMinusSelfProb -= Jump.second;
} else {
NewFreq += Freq[Jump.first] * Jump.second;
}
}
if (OneMinusSelfProb != Scaled64::getOne())
NewFreq /= OneMinusSelfProb;
// If the block's frequency has changed enough, then
// make sure the block and its successors are in the active set
auto Change = Freq[I] >= NewFreq ? Freq[I] - NewFreq : NewFreq - Freq[I];
if (Change > Precision) {
ActiveSet.push(I);
IsActive[I] = true;
for (size_t Succ : Successors[I]) {
if (!IsActive[Succ]) {
ActiveSet.push(Succ);
IsActive[Succ] = true;
}
}
}
// Update the frequency for the block
Freq[I] = NewFreq;
}
LLVM_DEBUG(dbgs() << " Completed " << It << " inference iterations"
<< format(" (%0.0f per block)", double(It) / Freq.size())
<< "\n");
#ifndef NDEBUG
LLVM_DEBUG(dbgs() << " Final discrepancy = "
<< discrepancy(ProbMatrix, Freq).toString() << "\n");
#endif
}
template <class BT>
void BlockFrequencyInfoImpl<BT>::findReachableBlocks(
std::vector<const BlockT *> &Blocks) const {
// Find all blocks to apply inference on, that is, reachable from the entry
// along edges with non-zero probablities
std::queue<const BlockT *> Queue;
SmallPtrSet<const BlockT *, 8> Reachable;
const BlockT *Entry = &F->front();
Queue.push(Entry);
Reachable.insert(Entry);
while (!Queue.empty()) {
const BlockT *SrcBB = Queue.front();
Queue.pop();
for (const BlockT *DstBB : children<const BlockT *>(SrcBB)) {
auto EP = BPI->getEdgeProbability(SrcBB, DstBB);
if (EP.isZero())
continue;
if (Reachable.insert(DstBB).second)
Queue.push(DstBB);
}
}
// Find all blocks to apply inference on, that is, backward reachable from
// the entry along (backward) edges with non-zero probablities
SmallPtrSet<const BlockT *, 8> InverseReachable;
for (const BlockT &BB : *F) {
// An exit block is a block without any successors
bool HasSucc = GraphTraits<const BlockT *>::child_begin(&BB) !=
GraphTraits<const BlockT *>::child_end(&BB);
if (!HasSucc && Reachable.count(&BB)) {
Queue.push(&BB);
InverseReachable.insert(&BB);
}
}
while (!Queue.empty()) {
const BlockT *SrcBB = Queue.front();
Queue.pop();
for (const BlockT *DstBB : children<Inverse<const BlockT *>>(SrcBB)) {
auto EP = BPI->getEdgeProbability(DstBB, SrcBB);
if (EP.isZero())
continue;
if (InverseReachable.insert(DstBB).second)
Queue.push(DstBB);
}
}
// Collect the result
Blocks.reserve(F->size());
for (const BlockT &BB : *F) {
if (Reachable.count(&BB) && InverseReachable.count(&BB)) {
Blocks.push_back(&BB);
}
}
}
template <class BT>
void BlockFrequencyInfoImpl<BT>::initTransitionProbabilities(
const std::vector<const BlockT *> &Blocks,
const DenseMap<const BlockT *, size_t> &BlockIndex,
ProbMatrixType &ProbMatrix) const {
const size_t NumBlocks = Blocks.size();
auto Succs = std::vector<std::vector<std::pair<size_t, Scaled64>>>(NumBlocks);
auto SumProb = std::vector<Scaled64>(NumBlocks);
// Find unique successors and corresponding probabilities for every block
for (size_t Src = 0; Src < NumBlocks; Src++) {
const BlockT *BB = Blocks[Src];
SmallPtrSet<const BlockT *, 2> UniqueSuccs;
for (const auto SI : children<const BlockT *>(BB)) {
// Ignore cold blocks
if (BlockIndex.find(SI) == BlockIndex.end())
continue;
// Ignore parallel edges between BB and SI blocks
if (!UniqueSuccs.insert(SI).second)
continue;
// Ignore jumps with zero probability
auto EP = BPI->getEdgeProbability(BB, SI);
if (EP.isZero())
continue;
auto EdgeProb =
Scaled64::getFraction(EP.getNumerator(), EP.getDenominator());
size_t Dst = BlockIndex.find(SI)->second;
Succs[Src].push_back(std::make_pair(Dst, EdgeProb));
SumProb[Src] += EdgeProb;
}
}
// Add transitions for every jump with positive branch probability
ProbMatrix = ProbMatrixType(NumBlocks);
for (size_t Src = 0; Src < NumBlocks; Src++) {
// Ignore blocks w/o successors
if (Succs[Src].empty())
continue;
assert(!SumProb[Src].isZero() && "Zero sum probability of non-exit block");
for (auto &Jump : Succs[Src]) {
size_t Dst = Jump.first;
Scaled64 Prob = Jump.second;
ProbMatrix[Dst].push_back(std::make_pair(Src, Prob / SumProb[Src]));
}
}
// Add transitions from sinks to the source
size_t EntryIdx = BlockIndex.find(&F->front())->second;
for (size_t Src = 0; Src < NumBlocks; Src++) {
if (Succs[Src].empty()) {
ProbMatrix[EntryIdx].push_back(std::make_pair(Src, Scaled64::getOne()));
}
}
}
#ifndef NDEBUG
template <class BT>
BlockFrequencyInfoImplBase::Scaled64 BlockFrequencyInfoImpl<BT>::discrepancy(
const ProbMatrixType &ProbMatrix, const std::vector<Scaled64> &Freq) const {
assert(Freq[0] > 0 && "Incorrectly computed frequency of the entry block");
Scaled64 Discrepancy;
for (size_t I = 0; I < ProbMatrix.size(); I++) {
Scaled64 Sum;
for (const auto &Jump : ProbMatrix[I]) {
Sum += Freq[Jump.first] * Jump.second;
}
Discrepancy += Freq[I] >= Sum ? Freq[I] - Sum : Sum - Freq[I];
}
// Normalizing by the frequency of the entry block
return Discrepancy / Freq[0];
}
#endif
/// \note This should be a lambda, but that crashes GCC 4.7.
namespace bfi_detail {
template <class BT> struct BlockEdgesAdder {
using BlockT = BT;
using LoopData = BlockFrequencyInfoImplBase::LoopData;
using Successor = GraphTraits<const BlockT *>;
const BlockFrequencyInfoImpl<BT> &BFI;
explicit BlockEdgesAdder(const BlockFrequencyInfoImpl<BT> &BFI)
: BFI(BFI) {}
void operator()(IrreducibleGraph &G, IrreducibleGraph::IrrNode &Irr,
const LoopData *OuterLoop) {
const BlockT *BB = BFI.RPOT[Irr.Node.Index];
for (const auto *Succ : children<const BlockT *>(BB))
G.addEdge(Irr, BFI.getNode(Succ), OuterLoop);
}
};
} // end namespace bfi_detail
template <class BT>
void BlockFrequencyInfoImpl<BT>::computeIrreducibleMass(
LoopData *OuterLoop, std::list<LoopData>::iterator Insert) {
LLVM_DEBUG(dbgs() << "analyze-irreducible-in-";
if (OuterLoop) dbgs()
<< "loop: " << getLoopName(*OuterLoop) << "\n";
else dbgs() << "function\n");
using namespace bfi_detail;
// Ideally, addBlockEdges() would be declared here as a lambda, but that
// crashes GCC 4.7.
BlockEdgesAdder<BT> addBlockEdges(*this);
IrreducibleGraph G(*this, OuterLoop, addBlockEdges);
for (auto &L : analyzeIrreducible(G, OuterLoop, Insert))
computeMassInLoop(L);
if (!OuterLoop)
return;
updateLoopWithIrreducible(*OuterLoop);
}
// A helper function that converts a branch probability into weight.
inline uint32_t getWeightFromBranchProb(const BranchProbability Prob) {
return Prob.getNumerator();
}
template <class BT>
bool
BlockFrequencyInfoImpl<BT>::propagateMassToSuccessors(LoopData *OuterLoop,
const BlockNode &Node) {
LLVM_DEBUG(dbgs() << " - node: " << getBlockName(Node) << "\n");
// Calculate probability for successors.
Distribution Dist;
if (auto *Loop = Working[Node.Index].getPackagedLoop()) {
assert(Loop != OuterLoop && "Cannot propagate mass in a packaged loop");
if (!addLoopSuccessorsToDist(OuterLoop, *Loop, Dist))
// Irreducible backedge.
return false;
} else {
const BlockT *BB = getBlock(Node);
for (auto SI = GraphTraits<const BlockT *>::child_begin(BB),
SE = GraphTraits<const BlockT *>::child_end(BB);
SI != SE; ++SI)
if (!addToDist(
Dist, OuterLoop, Node, getNode(*SI),
getWeightFromBranchProb(BPI->getEdgeProbability(BB, SI))))
// Irreducible backedge.
return false;
}
// Distribute mass to successors, saving exit and backedge data in the
// loop header.
distributeMass(Node, OuterLoop, Dist);
return true;
}
template <class BT>
raw_ostream &BlockFrequencyInfoImpl<BT>::print(raw_ostream &OS) const {
if (!F)
return OS;
OS << "block-frequency-info: " << F->getName() << "\n";
for (const BlockT &BB : *F) {
OS << " - " << bfi_detail::getBlockName(&BB) << ": float = ";
getFloatingBlockFreq(&BB).print(OS, 5)
<< ", int = " << getBlockFreq(&BB).getFrequency();
if (std::optional<uint64_t> ProfileCount =
BlockFrequencyInfoImplBase::getBlockProfileCount(
F->getFunction(), getNode(&BB)))
OS << ", count = " << *ProfileCount;
if (std::optional<uint64_t> IrrLoopHeaderWeight =
BB.getIrrLoopHeaderWeight())
OS << ", irr_loop_header_weight = " << *IrrLoopHeaderWeight;
OS << "\n";
}
// Add an extra newline for readability.
OS << "\n";
return OS;
}
template <class BT>
void BlockFrequencyInfoImpl<BT>::verifyMatch(
BlockFrequencyInfoImpl<BT> &Other) const {
bool Match = true;
DenseMap<const BlockT *, BlockNode> ValidNodes;
DenseMap<const BlockT *, BlockNode> OtherValidNodes;
for (auto &Entry : Nodes) {
const BlockT *BB = Entry.first;
if (BB) {
ValidNodes[BB] = Entry.second.first;
}
}
for (auto &Entry : Other.Nodes) {
const BlockT *BB = Entry.first;
if (BB) {
OtherValidNodes[BB] = Entry.second.first;
}
}
unsigned NumValidNodes = ValidNodes.size();
unsigned NumOtherValidNodes = OtherValidNodes.size();
if (NumValidNodes != NumOtherValidNodes) {
Match = false;
dbgs() << "Number of blocks mismatch: " << NumValidNodes << " vs "
<< NumOtherValidNodes << "\n";
} else {
for (auto &Entry : ValidNodes) {
const BlockT *BB = Entry.first;
BlockNode Node = Entry.second;
if (OtherValidNodes.count(BB)) {
BlockNode OtherNode = OtherValidNodes[BB];
const auto &Freq = Freqs[Node.Index];
const auto &OtherFreq = Other.Freqs[OtherNode.Index];
if (Freq.Integer != OtherFreq.Integer) {
Match = false;
dbgs() << "Freq mismatch: " << bfi_detail::getBlockName(BB) << " "
<< Freq.Integer << " vs " << OtherFreq.Integer << "\n";
}
} else {
Match = false;
dbgs() << "Block " << bfi_detail::getBlockName(BB) << " index "
<< Node.Index << " does not exist in Other.\n";
}
}
// If there's a valid node in OtherValidNodes that's not in ValidNodes,
// either the above num check or the check on OtherValidNodes will fail.
}
if (!Match) {
dbgs() << "This\n";
print(dbgs());
dbgs() << "Other\n";
Other.print(dbgs());
}
assert(Match && "BFI mismatch");
}
// Graph trait base class for block frequency information graph
// viewer.
enum GVDAGType { GVDT_None, GVDT_Fraction, GVDT_Integer, GVDT_Count };
template <class BlockFrequencyInfoT, class BranchProbabilityInfoT>
struct BFIDOTGraphTraitsBase : public DefaultDOTGraphTraits {
using GTraits = GraphTraits<BlockFrequencyInfoT *>;
using NodeRef = typename GTraits::NodeRef;
using EdgeIter = typename GTraits::ChildIteratorType;
using NodeIter = typename GTraits::nodes_iterator;
uint64_t MaxFrequency = 0;
explicit BFIDOTGraphTraitsBase(bool isSimple = false)
: DefaultDOTGraphTraits(isSimple) {}
static StringRef getGraphName(const BlockFrequencyInfoT *G) {
return G->getFunction()->getName();
}
std::string getNodeAttributes(NodeRef Node, const BlockFrequencyInfoT *Graph,
unsigned HotPercentThreshold = 0) {
std::string Result;
if (!HotPercentThreshold)
return Result;
// Compute MaxFrequency on the fly:
if (!MaxFrequency) {
for (NodeIter I = GTraits::nodes_begin(Graph),
E = GTraits::nodes_end(Graph);
I != E; ++I) {
NodeRef N = *I;
MaxFrequency =
std::max(MaxFrequency, Graph->getBlockFreq(N).getFrequency());
}
}
BlockFrequency Freq = Graph->getBlockFreq(Node);
BlockFrequency HotFreq =
(BlockFrequency(MaxFrequency) *
BranchProbability::getBranchProbability(HotPercentThreshold, 100));
if (Freq < HotFreq)
return Result;
raw_string_ostream OS(Result);
OS << "color=\"red\"";
OS.flush();
return Result;
}
std::string getNodeLabel(NodeRef Node, const BlockFrequencyInfoT *Graph,
GVDAGType GType, int layout_order = -1) {
std::string Result;
raw_string_ostream OS(Result);
if (layout_order != -1)
OS << Node->getName() << "[" << layout_order << "] : ";
else
OS << Node->getName() << " : ";
switch (GType) {
case GVDT_Fraction:
Graph->printBlockFreq(OS, Node);
break;
case GVDT_Integer:
OS << Graph->getBlockFreq(Node).getFrequency();
break;
case GVDT_Count: {
auto Count = Graph->getBlockProfileCount(Node);
if (Count)
OS << *Count;
else
OS << "Unknown";
break;
}
case GVDT_None:
llvm_unreachable("If we are not supposed to render a graph we should "
"never reach this point.");
}
return Result;
}
std::string getEdgeAttributes(NodeRef Node, EdgeIter EI,
const BlockFrequencyInfoT *BFI,
const BranchProbabilityInfoT *BPI,
unsigned HotPercentThreshold = 0) {
std::string Str;
if (!BPI)
return Str;
BranchProbability BP = BPI->getEdgeProbability(Node, EI);
uint32_t N = BP.getNumerator();
uint32_t D = BP.getDenominator();
double Percent = 100.0 * N / D;
raw_string_ostream OS(Str);
OS << format("label=\"%.1f%%\"", Percent);
if (HotPercentThreshold) {
BlockFrequency EFreq = BFI->getBlockFreq(Node) * BP;
BlockFrequency HotFreq = BlockFrequency(MaxFrequency) *
BranchProbability(HotPercentThreshold, 100);
if (EFreq >= HotFreq) {
OS << ",color=\"red\"";
}
}
OS.flush();
return Str;
}
};
} // end namespace llvm
#undef DEBUG_TYPE
#endif // LLVM_ANALYSIS_BLOCKFREQUENCYINFOIMPL_H
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//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file implements various weight measurements for code, helping
// the Inliner and other passes decide whether to duplicate its contents.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_CODEMETRICS_H
#define LLVM_ANALYSIS_CODEMETRICS_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/Support/InstructionCost.h"
namespace llvm {
class AssumptionCache;
class BasicBlock;
class Loop;
class Function;
template <class T> class SmallPtrSetImpl;
class TargetTransformInfo;
class Value;
/// Utility to calculate the size and a few similar metrics for a set
/// of basic blocks.
struct CodeMetrics {
/// True if this function contains a call to setjmp or other functions
/// with attribute "returns twice" without having the attribute itself.
bool exposesReturnsTwice = false;
/// True if this function calls itself.
bool isRecursive = false;
/// True if this function cannot be duplicated.
///
/// True if this function contains one or more indirect branches, or it contains
/// one or more 'noduplicate' instructions.
bool notDuplicatable = false;
/// True if this function contains a call to a convergent function.
bool convergent = false;
/// True if this function calls alloca (in the C sense).
bool usesDynamicAlloca = false;
/// Code size cost of the analyzed blocks.
InstructionCost NumInsts = 0;
/// Number of analyzed blocks.
unsigned NumBlocks = false;
/// Keeps track of basic block code size estimates.
DenseMap<const BasicBlock *, InstructionCost> NumBBInsts;
/// Keep track of the number of calls to 'big' functions.
unsigned NumCalls = false;
/// The number of calls to internal functions with a single caller.
///
/// These are likely targets for future inlining, likely exposed by
/// interleaved devirtualization.
unsigned NumInlineCandidates = 0;
/// How many instructions produce vector values.
///
/// The inliner is more aggressive with inlining vector kernels.
unsigned NumVectorInsts = 0;
/// How many 'ret' instructions the blocks contain.
unsigned NumRets = 0;
/// Add information about a block to the current state.
void analyzeBasicBlock(const BasicBlock *BB, const TargetTransformInfo &TTI,
const SmallPtrSetImpl<const Value *> &EphValues,
bool PrepareForLTO = false);
/// Collect a loop's ephemeral values (those used only by an assume
/// or similar intrinsics in the loop).
static void collectEphemeralValues(const Loop *L, AssumptionCache *AC,
SmallPtrSetImpl<const Value *> &EphValues);
/// Collect a functions's ephemeral values (those used only by an
/// assume or similar intrinsics in the function).
static void collectEphemeralValues(const Function *L, AssumptionCache *AC,
SmallPtrSetImpl<const Value *> &EphValues);
};
}
#endif
PK iwFZG�xc� � Analysis/MLModelRunner.hnu �[��� //===- MLModelRunner.h ---- ML model runner interface -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
#ifndef LLVM_ANALYSIS_MLMODELRUNNER_H
#define LLVM_ANALYSIS_MLMODELRUNNER_H
#include "llvm/Analysis/TensorSpec.h"
#include "llvm/IR/PassManager.h"
namespace llvm {
class LLVMContext;
/// MLModelRunner interface: abstraction of a mechanism for evaluating a
/// tensorflow "saved model".
/// NOTE: feature indices are expected to be consistent all accross
/// MLModelRunners (pertaining to the same model), and also Loggers (see
/// TFUtils.h)
class MLModelRunner {
public:
// Disallows copy and assign.
MLModelRunner(const MLModelRunner &) = delete;
MLModelRunner &operator=(const MLModelRunner &) = delete;
virtual ~MLModelRunner() = default;
template <typename T> T evaluate() {
return *reinterpret_cast<T *>(evaluateUntyped());
}
template <typename T, typename I> T *getTensor(I FeatureID) {
return reinterpret_cast<T *>(
getTensorUntyped(static_cast<size_t>(FeatureID)));
}
template <typename T, typename I> const T *getTensor(I FeatureID) const {
return reinterpret_cast<const T *>(
getTensorUntyped(static_cast<size_t>(FeatureID)));
}
void *getTensorUntyped(size_t Index) { return InputBuffers[Index]; }
const void *getTensorUntyped(size_t Index) const {
return (const_cast<MLModelRunner *>(this))->getTensorUntyped(Index);
}
enum class Kind : int { Unknown, Release, Development, NoOp, Interactive };
Kind getKind() const { return Type; }
virtual void switchContext(StringRef Name) {}
protected:
MLModelRunner(LLVMContext &Ctx, Kind Type, size_t NrInputs)
: Ctx(Ctx), Type(Type), InputBuffers(NrInputs) {
assert(Type != Kind::Unknown);
}
virtual void *evaluateUntyped() = 0;
void setUpBufferForTensor(size_t Index, const TensorSpec &Spec,
void *Buffer) {
if (!Buffer) {
OwnedBuffers.emplace_back(Spec.getTotalTensorBufferSize());
Buffer = OwnedBuffers.back().data();
}
InputBuffers[Index] = Buffer;
}
LLVMContext &Ctx;
const Kind Type;
private:
std::vector<void *> InputBuffers;
std::vector<std::vector<char *>> OwnedBuffers;
};
} // namespace llvm
#endif // LLVM_ANALYSIS_MLMODELRUNNER_H
PK iwFZ5Ԛl� � Analysis/ModuleSummaryAnalysis.hnu �[��� //===- ModuleSummaryAnalysis.h - Module summary index builder ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This is the interface to build a ModuleSummaryIndex for a module.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_MODULESUMMARYANALYSIS_H
#define LLVM_ANALYSIS_MODULESUMMARYANALYSIS_H
#include "llvm/IR/ModuleSummaryIndex.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
#include <functional>
#include <optional>
namespace llvm {
class BlockFrequencyInfo;
class Function;
class Module;
class ProfileSummaryInfo;
class StackSafetyInfo;
/// Direct function to compute a \c ModuleSummaryIndex from a given module.
///
/// If operating within a pass manager which has defined ways to compute the \c
/// BlockFrequencyInfo for a given function, that can be provided via
/// a std::function callback. Otherwise, this routine will manually construct
/// that information.
ModuleSummaryIndex buildModuleSummaryIndex(
const Module &M,
std::function<BlockFrequencyInfo *(const Function &F)> GetBFICallback,
ProfileSummaryInfo *PSI,
std::function<const StackSafetyInfo *(const Function &F)> GetSSICallback =
[](const Function &F) -> const StackSafetyInfo * { return nullptr; });
/// Analysis pass to provide the ModuleSummaryIndex object.
class ModuleSummaryIndexAnalysis
: public AnalysisInfoMixin<ModuleSummaryIndexAnalysis> {
friend AnalysisInfoMixin<ModuleSummaryIndexAnalysis>;
static AnalysisKey Key;
public:
using Result = ModuleSummaryIndex;
Result run(Module &M, ModuleAnalysisManager &AM);
};
/// Legacy wrapper pass to provide the ModuleSummaryIndex object.
class ModuleSummaryIndexWrapperPass : public ModulePass {
std::optional<ModuleSummaryIndex> Index;
public:
static char ID;
ModuleSummaryIndexWrapperPass();
/// Get the index built by pass
ModuleSummaryIndex &getIndex() { return *Index; }
const ModuleSummaryIndex &getIndex() const { return *Index; }
bool runOnModule(Module &M) override;
bool doFinalization(Module &M) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
};
//===--------------------------------------------------------------------===//
//
// createModuleSummaryIndexWrapperPass - This pass builds a ModuleSummaryIndex
// object for the module, to be written to bitcode or LLVM assembly.
//
ModulePass *createModuleSummaryIndexWrapperPass();
/// Legacy wrapper pass to provide the ModuleSummaryIndex object.
class ImmutableModuleSummaryIndexWrapperPass : public ImmutablePass {
const ModuleSummaryIndex *Index;
public:
static char ID;
ImmutableModuleSummaryIndexWrapperPass(
const ModuleSummaryIndex *Index = nullptr);
const ModuleSummaryIndex *getIndex() const { return Index; }
void getAnalysisUsage(AnalysisUsage &AU) const override;
};
//===--------------------------------------------------------------------===//
//
// ImmutableModuleSummaryIndexWrapperPass - This pass wrap provided
// ModuleSummaryIndex object for the module, to be used by other passes.
//
ImmutablePass *
createImmutableModuleSummaryIndexWrapperPass(const ModuleSummaryIndex *Index);
/// Returns true if the instruction could have memprof metadata, used to ensure
/// consistency between summary analysis and the ThinLTO backend processing.
bool mayHaveMemprofSummary(const CallBase *CB);
} // end namespace llvm
#endif // LLVM_ANALYSIS_MODULESUMMARYANALYSIS_H
PK iwFZ?zYX6� 6� Analysis/VecFuncs.defnu �[��� //===-- VecFuncs.def - Library information -------------*- C++ -*-----------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// This .def file will create mappings from scalar math functions to vector
// functions along with their vectorization factor. The current support includes
// such mappings for Accelerate framework, MASS vector library, and SVML library.
// This .def file also allows creating an array of vector functions supported in
// the specified framework or library.
#if defined(TLI_DEFINE_MASSV_VECFUNCS_NAMES)
#define TLI_DEFINE_MASSV_VECFUNCS
#define TLI_DEFINE_VECFUNC(SCAL, VEC, VF) VEC,
#endif
#define FIXED(NL) ElementCount::getFixed(NL)
#define SCALABLE(NL) ElementCount::getScalable(NL)
#define NOMASK false
#define MASKED true
#if !(defined(TLI_DEFINE_VECFUNC))
#define TLI_DEFINE_VECFUNC(SCAL, VEC, VF) {SCAL, VEC, VF, NOMASK},
#endif
#if defined(TLI_DEFINE_ACCELERATE_VECFUNCS)
// Accelerate framework's Vector Functions
// Floating-Point Arithmetic and Auxiliary Functions
TLI_DEFINE_VECFUNC("ceilf", "vceilf", FIXED(4))
TLI_DEFINE_VECFUNC("fabsf", "vfabsf", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.fabs.f32", "vfabsf", FIXED(4))
TLI_DEFINE_VECFUNC("floorf", "vfloorf", FIXED(4))
TLI_DEFINE_VECFUNC("sqrtf", "vsqrtf", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.sqrt.f32", "vsqrtf", FIXED(4))
// Exponential and Logarithmic Functions
TLI_DEFINE_VECFUNC("expf", "vexpf", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.exp.f32", "vexpf", FIXED(4))
TLI_DEFINE_VECFUNC("expm1f", "vexpm1f", FIXED(4))
TLI_DEFINE_VECFUNC("logf", "vlogf", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.log.f32", "vlogf", FIXED(4))
TLI_DEFINE_VECFUNC("log1pf", "vlog1pf", FIXED(4))
TLI_DEFINE_VECFUNC("log10f", "vlog10f", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.log10.f32", "vlog10f", FIXED(4))
TLI_DEFINE_VECFUNC("logbf", "vlogbf", FIXED(4))
// Trigonometric Functions
TLI_DEFINE_VECFUNC("sinf", "vsinf", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.sin.f32", "vsinf", FIXED(4))
TLI_DEFINE_VECFUNC("cosf", "vcosf", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.cos.f32", "vcosf", FIXED(4))
TLI_DEFINE_VECFUNC("tanf", "vtanf", FIXED(4))
TLI_DEFINE_VECFUNC("asinf", "vasinf", FIXED(4))
TLI_DEFINE_VECFUNC("acosf", "vacosf", FIXED(4))
TLI_DEFINE_VECFUNC("atanf", "vatanf", FIXED(4))
// Hyperbolic Functions
TLI_DEFINE_VECFUNC("sinhf", "vsinhf", FIXED(4))
TLI_DEFINE_VECFUNC("coshf", "vcoshf", FIXED(4))
TLI_DEFINE_VECFUNC("tanhf", "vtanhf", FIXED(4))
TLI_DEFINE_VECFUNC("asinhf", "vasinhf", FIXED(4))
TLI_DEFINE_VECFUNC("acoshf", "vacoshf", FIXED(4))
TLI_DEFINE_VECFUNC("atanhf", "vatanhf", FIXED(4))
#elif defined(TLI_DEFINE_DARWIN_LIBSYSTEM_M_VECFUNCS)
// Darwin libsystem_m vector functions.
// Exponential and Logarithmic Functions
TLI_DEFINE_VECFUNC("exp", "_simd_exp_d2", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.exp.f64", "_simd_exp_d2", FIXED(2))
TLI_DEFINE_VECFUNC("expf", "_simd_exp_f4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.exp.f32", "_simd_exp_f4", FIXED(4))
// Trigonometric Functions
TLI_DEFINE_VECFUNC("acos", "_simd_acos_d2", FIXED(2))
TLI_DEFINE_VECFUNC("acosf", "_simd_acos_f4", FIXED(4))
TLI_DEFINE_VECFUNC("asin", "_simd_asin_d2", FIXED(2))
TLI_DEFINE_VECFUNC("asinf", "_simd_asin_f4", FIXED(4))
TLI_DEFINE_VECFUNC("atan", "_simd_atan_d2", FIXED(2))
TLI_DEFINE_VECFUNC("atanf", "_simd_atan_f4", FIXED(4))
TLI_DEFINE_VECFUNC("atan2", "_simd_atan2_d2", FIXED(2))
TLI_DEFINE_VECFUNC("atan2f", "_simd_atan2_f4", FIXED(4))
TLI_DEFINE_VECFUNC("cos", "_simd_cos_d2", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.cos.f64", "_simd_cos_d2", FIXED(2))
TLI_DEFINE_VECFUNC("cosf", "_simd_cos_f4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.cos.f32", "_simd_cos_f4", FIXED(4))
TLI_DEFINE_VECFUNC("sin", "_simd_sin_d2", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.sin.f64", "_simd_sin_d2", FIXED(2))
TLI_DEFINE_VECFUNC("sinf", "_simd_sin_f4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.sin.f32", "_simd_sin_f4", FIXED(4))
// Floating-Point Arithmetic and Auxiliary Functions
TLI_DEFINE_VECFUNC("cbrt", "_simd_cbrt_d2", FIXED(2))
TLI_DEFINE_VECFUNC("cbrtf", "_simd_cbrt_f4", FIXED(4))
TLI_DEFINE_VECFUNC("erf", "_simd_erf_d2", FIXED(2))
TLI_DEFINE_VECFUNC("erff", "_simd_erf_f4", FIXED(4))
TLI_DEFINE_VECFUNC("pow", "_simd_pow_d2", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.pow.f64", "_simd_pow_d2", FIXED(2))
TLI_DEFINE_VECFUNC("powf", "_simd_pow_f4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.pow.f32", "_simd_pow_f4", FIXED(4))
// Hyperbolic Functions
TLI_DEFINE_VECFUNC("sinh", "_simd_sinh_d2", FIXED(2))
TLI_DEFINE_VECFUNC("sinhf", "_simd_sinh_f4", FIXED(4))
TLI_DEFINE_VECFUNC("cosh", "_simd_cosh_d2", FIXED(2))
TLI_DEFINE_VECFUNC("coshf", "_simd_cosh_f4", FIXED(4))
TLI_DEFINE_VECFUNC("tanh", "_simd_tanh_d2", FIXED(2))
TLI_DEFINE_VECFUNC("tanhf", "_simd_tanh_f4", FIXED(4))
TLI_DEFINE_VECFUNC("asinh", "_simd_asinh_d2", FIXED(2))
TLI_DEFINE_VECFUNC("asinhf", "_simd_asinh_f4", FIXED(4))
TLI_DEFINE_VECFUNC("acosh", "_simd_acosh_d2", FIXED(2))
TLI_DEFINE_VECFUNC("acoshf", "_simd_acosh_f4", FIXED(4))
TLI_DEFINE_VECFUNC("atanh", "_simd_atanh_d2", FIXED(2))
TLI_DEFINE_VECFUNC("atanhf", "_simd_atanh_f4", FIXED(4))
#elif defined(TLI_DEFINE_LIBMVEC_X86_VECFUNCS)
// GLIBC Vector math Functions
TLI_DEFINE_VECFUNC("sin", "_ZGVbN2v_sin", FIXED(2))
TLI_DEFINE_VECFUNC("sin", "_ZGVdN4v_sin", FIXED(4))
TLI_DEFINE_VECFUNC("sinf", "_ZGVbN4v_sinf", FIXED(4))
TLI_DEFINE_VECFUNC("sinf", "_ZGVdN8v_sinf", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.sin.f64", "_ZGVbN2v_sin", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.sin.f64", "_ZGVdN4v_sin", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.sin.f32", "_ZGVbN4v_sinf", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.sin.f32", "_ZGVdN8v_sinf", FIXED(8))
TLI_DEFINE_VECFUNC("cos", "_ZGVbN2v_cos", FIXED(2))
TLI_DEFINE_VECFUNC("cos", "_ZGVdN4v_cos", FIXED(4))
TLI_DEFINE_VECFUNC("cosf", "_ZGVbN4v_cosf", FIXED(4))
TLI_DEFINE_VECFUNC("cosf", "_ZGVdN8v_cosf", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.cos.f64", "_ZGVbN2v_cos", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.cos.f64", "_ZGVdN4v_cos", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.cos.f32", "_ZGVbN4v_cosf", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.cos.f32", "_ZGVdN8v_cosf", FIXED(8))
TLI_DEFINE_VECFUNC("pow", "_ZGVbN2vv_pow", FIXED(2))
TLI_DEFINE_VECFUNC("pow", "_ZGVdN4vv_pow", FIXED(4))
TLI_DEFINE_VECFUNC("powf", "_ZGVbN4vv_powf", FIXED(4))
TLI_DEFINE_VECFUNC("powf", "_ZGVdN8vv_powf", FIXED(8))
TLI_DEFINE_VECFUNC("__pow_finite", "_ZGVbN2vv___pow_finite", FIXED(2))
TLI_DEFINE_VECFUNC("__pow_finite", "_ZGVdN4vv___pow_finite", FIXED(4))
TLI_DEFINE_VECFUNC("__powf_finite", "_ZGVbN4vv___powf_finite", FIXED(4))
TLI_DEFINE_VECFUNC("__powf_finite", "_ZGVdN8vv___powf_finite", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.pow.f64", "_ZGVbN2vv_pow", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.pow.f64", "_ZGVdN4vv_pow", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.pow.f32", "_ZGVbN4vv_powf", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.pow.f32", "_ZGVdN8vv_powf", FIXED(8))
TLI_DEFINE_VECFUNC("exp", "_ZGVbN2v_exp", FIXED(2))
TLI_DEFINE_VECFUNC("exp", "_ZGVdN4v_exp", FIXED(4))
TLI_DEFINE_VECFUNC("expf", "_ZGVbN4v_expf", FIXED(4))
TLI_DEFINE_VECFUNC("expf", "_ZGVdN8v_expf", FIXED(8))
TLI_DEFINE_VECFUNC("__exp_finite", "_ZGVbN2v___exp_finite", FIXED(2))
TLI_DEFINE_VECFUNC("__exp_finite", "_ZGVdN4v___exp_finite", FIXED(4))
TLI_DEFINE_VECFUNC("__expf_finite", "_ZGVbN4v___expf_finite", FIXED(4))
TLI_DEFINE_VECFUNC("__expf_finite", "_ZGVdN8v___expf_finite", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.exp.f64", "_ZGVbN2v_exp", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.exp.f64", "_ZGVdN4v_exp", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.exp.f32", "_ZGVbN4v_expf", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.exp.f32", "_ZGVdN8v_expf", FIXED(8))
TLI_DEFINE_VECFUNC("log", "_ZGVbN2v_log", FIXED(2))
TLI_DEFINE_VECFUNC("log", "_ZGVdN4v_log", FIXED(4))
TLI_DEFINE_VECFUNC("logf", "_ZGVbN4v_logf", FIXED(4))
TLI_DEFINE_VECFUNC("logf", "_ZGVdN8v_logf", FIXED(8))
TLI_DEFINE_VECFUNC("__log_finite", "_ZGVbN2v___log_finite", FIXED(2))
TLI_DEFINE_VECFUNC("__log_finite", "_ZGVdN4v___log_finite", FIXED(4))
TLI_DEFINE_VECFUNC("__logf_finite", "_ZGVbN4v___logf_finite", FIXED(4))
TLI_DEFINE_VECFUNC("__logf_finite", "_ZGVdN8v___logf_finite", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.log.f64", "_ZGVbN2v_log", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.log.f64", "_ZGVdN4v_log", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.log.f32", "_ZGVbN4v_logf", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.log.f32", "_ZGVdN8v_logf", FIXED(8))
#elif defined(TLI_DEFINE_MASSV_VECFUNCS)
// IBM MASS library's vector Functions
// Floating-Point Arithmetic and Auxiliary Functions
TLI_DEFINE_VECFUNC("cbrt", "__cbrtd2", FIXED(2))
TLI_DEFINE_VECFUNC("cbrtf", "__cbrtf4", FIXED(4))
TLI_DEFINE_VECFUNC("pow", "__powd2", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.pow.f64", "__powd2", FIXED(2))
TLI_DEFINE_VECFUNC("powf", "__powf4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.pow.f32", "__powf4", FIXED(4))
// Exponential and Logarithmic Functions
TLI_DEFINE_VECFUNC("exp", "__expd2", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.exp.f64", "__expd2", FIXED(2))
TLI_DEFINE_VECFUNC("expf", "__expf4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.exp.f32", "__expf4", FIXED(4))
TLI_DEFINE_VECFUNC("exp2", "__exp2d2", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.exp2.f64", "__exp2d2", FIXED(2))
TLI_DEFINE_VECFUNC("exp2f", "__exp2f4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.exp2.f32", "__exp2f4", FIXED(4))
TLI_DEFINE_VECFUNC("expm1", "__expm1d2", FIXED(2))
TLI_DEFINE_VECFUNC("expm1f", "__expm1f4", FIXED(4))
TLI_DEFINE_VECFUNC("log", "__logd2", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.log.f64", "__logd2", FIXED(2))
TLI_DEFINE_VECFUNC("logf", "__logf4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.log.f32", "__logf4", FIXED(4))
TLI_DEFINE_VECFUNC("log1p", "__log1pd2", FIXED(2))
TLI_DEFINE_VECFUNC("log1pf", "__log1pf4", FIXED(4))
TLI_DEFINE_VECFUNC("log10", "__log10d2", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.log10.f64", "__log10d2", FIXED(2))
TLI_DEFINE_VECFUNC("log10f", "__log10f4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.log10.f32", "__log10f4", FIXED(4))
TLI_DEFINE_VECFUNC("log2", "__log2d2", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.log2.f64", "__log2d2", FIXED(2))
TLI_DEFINE_VECFUNC("log2f", "__log2f4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.log2.f32", "__log2f4", FIXED(4))
// Trigonometric Functions
TLI_DEFINE_VECFUNC("sin", "__sind2", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.sin.f64", "__sind2", FIXED(2))
TLI_DEFINE_VECFUNC("sinf", "__sinf4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.sin.f32", "__sinf4", FIXED(4))
TLI_DEFINE_VECFUNC("cos", "__cosd2", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.cos.f64", "__cosd2", FIXED(2))
TLI_DEFINE_VECFUNC("cosf", "__cosf4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.cos.f32", "__cosf4", FIXED(4))
TLI_DEFINE_VECFUNC("tan", "__tand2", FIXED(2))
TLI_DEFINE_VECFUNC("tanf", "__tanf4", FIXED(4))
TLI_DEFINE_VECFUNC("asin", "__asind2", FIXED(2))
TLI_DEFINE_VECFUNC("asinf", "__asinf4", FIXED(4))
TLI_DEFINE_VECFUNC("acos", "__acosd2", FIXED(2))
TLI_DEFINE_VECFUNC("acosf", "__acosf4", FIXED(4))
TLI_DEFINE_VECFUNC("atan", "__atand2", FIXED(2))
TLI_DEFINE_VECFUNC("atanf", "__atanf4", FIXED(4))
TLI_DEFINE_VECFUNC("atan2", "__atan2d2", FIXED(2))
TLI_DEFINE_VECFUNC("atan2f", "__atan2f4", FIXED(4))
// Hyperbolic Functions
TLI_DEFINE_VECFUNC("sinh", "__sinhd2", FIXED(2))
TLI_DEFINE_VECFUNC("sinhf", "__sinhf4", FIXED(4))
TLI_DEFINE_VECFUNC("cosh", "__coshd2", FIXED(2))
TLI_DEFINE_VECFUNC("coshf", "__coshf4", FIXED(4))
TLI_DEFINE_VECFUNC("tanh", "__tanhd2", FIXED(2))
TLI_DEFINE_VECFUNC("tanhf", "__tanhf4", FIXED(4))
TLI_DEFINE_VECFUNC("asinh", "__asinhd2", FIXED(2))
TLI_DEFINE_VECFUNC("asinhf", "__asinhf4", FIXED(4))
TLI_DEFINE_VECFUNC("acosh", "__acoshd2", FIXED(2))
TLI_DEFINE_VECFUNC("acoshf", "__acoshf4", FIXED(4))
TLI_DEFINE_VECFUNC("atanh", "__atanhd2", FIXED(2))
TLI_DEFINE_VECFUNC("atanhf", "__atanhf4", FIXED(4))
#elif defined(TLI_DEFINE_SVML_VECFUNCS)
// Intel SVM library's Vector Functions
TLI_DEFINE_VECFUNC("sin", "__svml_sin2", FIXED(2))
TLI_DEFINE_VECFUNC("sin", "__svml_sin4", FIXED(4))
TLI_DEFINE_VECFUNC("sin", "__svml_sin8", FIXED(8))
TLI_DEFINE_VECFUNC("sinf", "__svml_sinf4", FIXED(4))
TLI_DEFINE_VECFUNC("sinf", "__svml_sinf8", FIXED(8))
TLI_DEFINE_VECFUNC("sinf", "__svml_sinf16", FIXED(16))
TLI_DEFINE_VECFUNC("llvm.sin.f64", "__svml_sin2", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.sin.f64", "__svml_sin4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.sin.f64", "__svml_sin8", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.sin.f32", "__svml_sinf4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.sin.f32", "__svml_sinf8", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.sin.f32", "__svml_sinf16", FIXED(16))
TLI_DEFINE_VECFUNC("cos", "__svml_cos2", FIXED(2))
TLI_DEFINE_VECFUNC("cos", "__svml_cos4", FIXED(4))
TLI_DEFINE_VECFUNC("cos", "__svml_cos8", FIXED(8))
TLI_DEFINE_VECFUNC("cosf", "__svml_cosf4", FIXED(4))
TLI_DEFINE_VECFUNC("cosf", "__svml_cosf8", FIXED(8))
TLI_DEFINE_VECFUNC("cosf", "__svml_cosf16", FIXED(16))
TLI_DEFINE_VECFUNC("llvm.cos.f64", "__svml_cos2", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.cos.f64", "__svml_cos4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.cos.f64", "__svml_cos8", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.cos.f32", "__svml_cosf4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.cos.f32", "__svml_cosf8", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.cos.f32", "__svml_cosf16", FIXED(16))
TLI_DEFINE_VECFUNC("pow", "__svml_pow2", FIXED(2))
TLI_DEFINE_VECFUNC("pow", "__svml_pow4", FIXED(4))
TLI_DEFINE_VECFUNC("pow", "__svml_pow8", FIXED(8))
TLI_DEFINE_VECFUNC("powf", "__svml_powf4", FIXED(4))
TLI_DEFINE_VECFUNC("powf", "__svml_powf8", FIXED(8))
TLI_DEFINE_VECFUNC("powf", "__svml_powf16", FIXED(16))
TLI_DEFINE_VECFUNC("__pow_finite", "__svml_pow2", FIXED(2))
TLI_DEFINE_VECFUNC("__pow_finite", "__svml_pow4", FIXED(4))
TLI_DEFINE_VECFUNC("__pow_finite", "__svml_pow8", FIXED(8))
TLI_DEFINE_VECFUNC("__powf_finite", "__svml_powf4", FIXED(4))
TLI_DEFINE_VECFUNC("__powf_finite", "__svml_powf8", FIXED(8))
TLI_DEFINE_VECFUNC("__powf_finite", "__svml_powf16", FIXED(16))
TLI_DEFINE_VECFUNC("llvm.pow.f64", "__svml_pow2", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.pow.f64", "__svml_pow4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.pow.f64", "__svml_pow8", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.pow.f32", "__svml_powf4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.pow.f32", "__svml_powf8", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.pow.f32", "__svml_powf16", FIXED(16))
TLI_DEFINE_VECFUNC("exp", "__svml_exp2", FIXED(2))
TLI_DEFINE_VECFUNC("exp", "__svml_exp4", FIXED(4))
TLI_DEFINE_VECFUNC("exp", "__svml_exp8", FIXED(8))
TLI_DEFINE_VECFUNC("expf", "__svml_expf4", FIXED(4))
TLI_DEFINE_VECFUNC("expf", "__svml_expf8", FIXED(8))
TLI_DEFINE_VECFUNC("expf", "__svml_expf16", FIXED(16))
TLI_DEFINE_VECFUNC("__exp_finite", "__svml_exp2", FIXED(2))
TLI_DEFINE_VECFUNC("__exp_finite", "__svml_exp4", FIXED(4))
TLI_DEFINE_VECFUNC("__exp_finite", "__svml_exp8", FIXED(8))
TLI_DEFINE_VECFUNC("__expf_finite", "__svml_expf4", FIXED(4))
TLI_DEFINE_VECFUNC("__expf_finite", "__svml_expf8", FIXED(8))
TLI_DEFINE_VECFUNC("__expf_finite", "__svml_expf16", FIXED(16))
TLI_DEFINE_VECFUNC("llvm.exp.f64", "__svml_exp2", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.exp.f64", "__svml_exp4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.exp.f64", "__svml_exp8", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.exp.f32", "__svml_expf4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.exp.f32", "__svml_expf8", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.exp.f32", "__svml_expf16", FIXED(16))
TLI_DEFINE_VECFUNC("log", "__svml_log2", FIXED(2))
TLI_DEFINE_VECFUNC("log", "__svml_log4", FIXED(4))
TLI_DEFINE_VECFUNC("log", "__svml_log8", FIXED(8))
TLI_DEFINE_VECFUNC("logf", "__svml_logf4", FIXED(4))
TLI_DEFINE_VECFUNC("logf", "__svml_logf8", FIXED(8))
TLI_DEFINE_VECFUNC("logf", "__svml_logf16", FIXED(16))
TLI_DEFINE_VECFUNC("__log_finite", "__svml_log2", FIXED(2))
TLI_DEFINE_VECFUNC("__log_finite", "__svml_log4", FIXED(4))
TLI_DEFINE_VECFUNC("__log_finite", "__svml_log8", FIXED(8))
TLI_DEFINE_VECFUNC("__logf_finite", "__svml_logf4", FIXED(4))
TLI_DEFINE_VECFUNC("__logf_finite", "__svml_logf8", FIXED(8))
TLI_DEFINE_VECFUNC("__logf_finite", "__svml_logf16", FIXED(16))
TLI_DEFINE_VECFUNC("llvm.log.f64", "__svml_log2", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.log.f64", "__svml_log4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.log.f64", "__svml_log8", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.log.f32", "__svml_logf4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.log.f32", "__svml_logf8", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.log.f32", "__svml_logf16", FIXED(16))
TLI_DEFINE_VECFUNC("log2", "__svml_log22", FIXED(2))
TLI_DEFINE_VECFUNC("log2", "__svml_log24", FIXED(4))
TLI_DEFINE_VECFUNC("log2", "__svml_log28", FIXED(8))
TLI_DEFINE_VECFUNC("log2f", "__svml_log2f4", FIXED(4))
TLI_DEFINE_VECFUNC("log2f", "__svml_log2f8", FIXED(8))
TLI_DEFINE_VECFUNC("log2f", "__svml_log2f16", FIXED(16))
TLI_DEFINE_VECFUNC("__log2_finite", "__svml_log22", FIXED(2))
TLI_DEFINE_VECFUNC("__log2_finite", "__svml_log24", FIXED(4))
TLI_DEFINE_VECFUNC("__log2_finite", "__svml_log28", FIXED(8))
TLI_DEFINE_VECFUNC("__log2f_finite", "__svml_log2f4", FIXED(4))
TLI_DEFINE_VECFUNC("__log2f_finite", "__svml_log2f8", FIXED(8))
TLI_DEFINE_VECFUNC("__log2f_finite", "__svml_log2f16", FIXED(16))
TLI_DEFINE_VECFUNC("llvm.log2.f64", "__svml_log22", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.log2.f64", "__svml_log24", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.log2.f64", "__svml_log28", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.log2.f32", "__svml_log2f4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.log2.f32", "__svml_log2f8", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.log2.f32", "__svml_log2f16", FIXED(16))
TLI_DEFINE_VECFUNC("log10", "__svml_log102", FIXED(2))
TLI_DEFINE_VECFUNC("log10", "__svml_log104", FIXED(4))
TLI_DEFINE_VECFUNC("log10", "__svml_log108", FIXED(8))
TLI_DEFINE_VECFUNC("log10f", "__svml_log10f4", FIXED(4))
TLI_DEFINE_VECFUNC("log10f", "__svml_log10f8", FIXED(8))
TLI_DEFINE_VECFUNC("log10f", "__svml_log10f16", FIXED(16))
TLI_DEFINE_VECFUNC("__log10_finite", "__svml_log102", FIXED(2))
TLI_DEFINE_VECFUNC("__log10_finite", "__svml_log104", FIXED(4))
TLI_DEFINE_VECFUNC("__log10_finite", "__svml_log108", FIXED(8))
TLI_DEFINE_VECFUNC("__log10f_finite", "__svml_log10f4", FIXED(4))
TLI_DEFINE_VECFUNC("__log10f_finite", "__svml_log10f8", FIXED(8))
TLI_DEFINE_VECFUNC("__log10f_finite", "__svml_log10f16", FIXED(16))
TLI_DEFINE_VECFUNC("llvm.log10.f64", "__svml_log102", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.log10.f64", "__svml_log104", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.log10.f64", "__svml_log108", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.log10.f32", "__svml_log10f4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.log10.f32", "__svml_log10f8", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.log10.f32", "__svml_log10f16", FIXED(16))
TLI_DEFINE_VECFUNC("sqrt", "__svml_sqrt2", FIXED(2))
TLI_DEFINE_VECFUNC("sqrt", "__svml_sqrt4", FIXED(4))
TLI_DEFINE_VECFUNC("sqrt", "__svml_sqrt8", FIXED(8))
TLI_DEFINE_VECFUNC("sqrtf", "__svml_sqrtf4", FIXED(4))
TLI_DEFINE_VECFUNC("sqrtf", "__svml_sqrtf8", FIXED(8))
TLI_DEFINE_VECFUNC("sqrtf", "__svml_sqrtf16", FIXED(16))
TLI_DEFINE_VECFUNC("__sqrt_finite", "__svml_sqrt2", FIXED(2))
TLI_DEFINE_VECFUNC("__sqrt_finite", "__svml_sqrt4", FIXED(4))
TLI_DEFINE_VECFUNC("__sqrt_finite", "__svml_sqrt8", FIXED(8))
TLI_DEFINE_VECFUNC("__sqrtf_finite", "__svml_sqrtf4", FIXED(4))
TLI_DEFINE_VECFUNC("__sqrtf_finite", "__svml_sqrtf8", FIXED(8))
TLI_DEFINE_VECFUNC("__sqrtf_finite", "__svml_sqrtf16", FIXED(16))
TLI_DEFINE_VECFUNC("exp2", "__svml_exp22", FIXED(2))
TLI_DEFINE_VECFUNC("exp2", "__svml_exp24", FIXED(4))
TLI_DEFINE_VECFUNC("exp2", "__svml_exp28", FIXED(8))
TLI_DEFINE_VECFUNC("exp2f", "__svml_exp2f4", FIXED(4))
TLI_DEFINE_VECFUNC("exp2f", "__svml_exp2f8", FIXED(8))
TLI_DEFINE_VECFUNC("exp2f", "__svml_exp2f16", FIXED(16))
TLI_DEFINE_VECFUNC("llvm.exp2.f64", "__svml_exp22", FIXED(2))
TLI_DEFINE_VECFUNC("llvm.exp2.f64", "__svml_exp24", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.exp2.f64", "__svml_exp28", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.exp2.f32", "__svml_exp2f4", FIXED(4))
TLI_DEFINE_VECFUNC("llvm.exp2.f32", "__svml_exp2f8", FIXED(8))
TLI_DEFINE_VECFUNC("llvm.exp2.f32", "__svml_exp2f16", FIXED(16))
TLI_DEFINE_VECFUNC("__exp2_finite", "__svml_exp22", FIXED(2))
TLI_DEFINE_VECFUNC("__exp2_finite", "__svml_exp24", FIXED(4))
TLI_DEFINE_VECFUNC("__exp2_finite", "__svml_exp28", FIXED(8))
TLI_DEFINE_VECFUNC("__exp2f_finite", "__svml_exp2f4", FIXED(4))
TLI_DEFINE_VECFUNC("__exp2f_finite", "__svml_exp2f8", FIXED(8))
TLI_DEFINE_VECFUNC("__exp2f_finite", "__svml_exp2f16", FIXED(16))
#elif defined(TLI_DEFINE_SLEEFGNUABI_VF2_VECFUNCS)
TLI_DEFINE_VECFUNC( "acos", "_ZGVnN2v_acos", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.acos.f64", "_ZGVnN2v_acos", FIXED(2))
TLI_DEFINE_VECFUNC( "asin", "_ZGVnN2v_asin", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.asin.f64", "_ZGVnN2v_asin", FIXED(2))
TLI_DEFINE_VECFUNC( "atan", "_ZGVnN2v_atan", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.atan.f64", "_ZGVnN2v_atan", FIXED(2))
TLI_DEFINE_VECFUNC( "atan2", "_ZGVnN2vv_atan2", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.atan2.f64", "_ZGVnN2vv_atan2", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.atan2.v2f64", "_ZGVnN2vv_atan2", FIXED(2))
TLI_DEFINE_VECFUNC( "atanh", "_ZGVnN2v_atanh", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.atanh.f64", "_ZGVnN2v_atanh", FIXED(2))
TLI_DEFINE_VECFUNC( "cos", "_ZGVnN2v_cos", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.cos.f64", "_ZGVnN2v_cos", FIXED(2))
TLI_DEFINE_VECFUNC( "cosh", "_ZGVnN2v_cosh", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.cosh.f64", "_ZGVnN2v_cosh", FIXED(2))
TLI_DEFINE_VECFUNC( "exp", "_ZGVnN2v_exp", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.exp.f64", "_ZGVnN2v_exp", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.exp.v2f64", "_ZGVnN2v_exp", FIXED(2))
TLI_DEFINE_VECFUNC( "exp2", "_ZGVnN2v_exp2", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.exp2.f64", "_ZGVnN2v_exp2", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.exp2.v2f64", "_ZGVnN2v_exp2", FIXED(2))
TLI_DEFINE_VECFUNC( "exp10", "_ZGVnN2v_exp10", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.exp10.f64", "_ZGVnN2v_exp10", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.exp10.v2f64", "_ZGVnN2v_exp10", FIXED(2))
TLI_DEFINE_VECFUNC( "lgamma", "_ZGVnN2v_lgamma", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.lgamma.f64", "_ZGVnN2v_lgamma", FIXED(2))
TLI_DEFINE_VECFUNC( "log", "_ZGVnN2v_log", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.log.f64", "_ZGVnN2v_log", FIXED(2))
TLI_DEFINE_VECFUNC( "log2", "_ZGVnN2v_log2", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.log2.f64", "_ZGVnN2v_log2", FIXED(2))
TLI_DEFINE_VECFUNC( "log10", "_ZGVnN2v_log10", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.log10.f64", "_ZGVnN2v_log10", FIXED(2))
TLI_DEFINE_VECFUNC( "pow", "_ZGVnN2vv_pow", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.pow.f64", "_ZGVnN2vv_pow", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.pow.v2f64", "_ZGVnN2vv_pow", FIXED(2))
TLI_DEFINE_VECFUNC( "sin", "_ZGVnN2v_sin", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.sin.f64", "_ZGVnN2v_sin", FIXED(2))
TLI_DEFINE_VECFUNC( "sinh", "_ZGVnN2v_sinh", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.sinh.f64", "_ZGVnN2v_sinh", FIXED(2))
TLI_DEFINE_VECFUNC( "sqrt", "_ZGVnN2v_sqrt", FIXED(2))
TLI_DEFINE_VECFUNC( "tan", "_ZGVnN2v_tan", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.tan.f64", "_ZGVnN2v_tan", FIXED(2))
TLI_DEFINE_VECFUNC( "tanh", "_ZGVnN2v_tanh", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.tanh.f64", "_ZGVnN2v_tanh", FIXED(2))
TLI_DEFINE_VECFUNC( "tgamma", "_ZGVnN2v_tgamma", FIXED(2))
TLI_DEFINE_VECFUNC( "llvm.tgamma.f64", "_ZGVnN2v_tgamma", FIXED(2))
#elif defined(TLI_DEFINE_SLEEFGNUABI_VF4_VECFUNCS)
TLI_DEFINE_VECFUNC( "acosf", "_ZGVnN4v_acosf", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.acos.f32", "_ZGVnN4v_acosf", FIXED(4))
TLI_DEFINE_VECFUNC( "asinf", "_ZGVnN4v_asinf", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.asin.f32", "_ZGVnN4v_asinf", FIXED(4))
TLI_DEFINE_VECFUNC( "atanf", "_ZGVnN4v_atanf", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.atan.f32", "_ZGVnN4v_atanf", FIXED(4))
TLI_DEFINE_VECFUNC( "atan2f", "_ZGVnN4vv_atan2f", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.atan2.f32", "_ZGVnN4vv_atan2f", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.atan2.v4f32", "_ZGVnN4vv_atan2f", FIXED(4))
TLI_DEFINE_VECFUNC( "atanhf", "_ZGVnN4v_atanhf", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.atanh.f32", "_ZGVnN4v_atanhf", FIXED(4))
TLI_DEFINE_VECFUNC( "cosf", "_ZGVnN4v_cosf", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.cos.f32", "_ZGVnN4v_cosf", FIXED(4))
TLI_DEFINE_VECFUNC( "coshf", "_ZGVnN4v_coshf", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.cosh.f32", "_ZGVnN4v_coshf", FIXED(4))
TLI_DEFINE_VECFUNC( "expf", "_ZGVnN4v_expf", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.exp.f32", "_ZGVnN4v_expf", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.exp.v4f32", "_ZGVnN4v_expf", FIXED(4))
TLI_DEFINE_VECFUNC( "exp2f", "_ZGVnN4v_exp2f", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.exp2.f32", "_ZGVnN4v_exp2f", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.exp2.v4f32", "_ZGVnN4v_exp2f", FIXED(4))
TLI_DEFINE_VECFUNC( "exp10f", "_ZGVnN4v_exp10f", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.exp10.f32", "_ZGVnN4v_exp10f", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.exp10.v4f32", "_ZGVnN4v_exp10f", FIXED(4))
TLI_DEFINE_VECFUNC( "lgammaf", "_ZGVnN4v_lgammaf", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.lgamma.f32", "_ZGVnN4v_lgammaf", FIXED(4))
TLI_DEFINE_VECFUNC( "logf", "_ZGVnN4v_logf", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.log.f32", "_ZGVnN4v_logf", FIXED(4))
TLI_DEFINE_VECFUNC( "log2f", "_ZGVnN4v_log2f", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.log2.f32", "_ZGVnN4v_log2f", FIXED(4))
TLI_DEFINE_VECFUNC( "log10f", "_ZGVnN4v_log10f", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.log10.f32", "_ZGVnN4v_log10f", FIXED(4))
TLI_DEFINE_VECFUNC( "powf", "_ZGVnN4vv_powf", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.pow.f32", "_ZGVnN4vv_powf", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.pow.v4f32", "_ZGVnN4vv_powf", FIXED(4))
TLI_DEFINE_VECFUNC( "sinf", "_ZGVnN4v_sinf", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.sin.f32", "_ZGVnN4v_sinf", FIXED(4))
TLI_DEFINE_VECFUNC( "sinhf", "_ZGVnN4v_sinhf", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.sinh.f32", "_ZGVnN4v_sinhf", FIXED(4))
TLI_DEFINE_VECFUNC( "sqrtf", "_ZGVnN4v_sqrtf", FIXED(4))
TLI_DEFINE_VECFUNC( "tanf", "_ZGVnN4v_tanf", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.tan.f32", "_ZGVnN4v_tanf", FIXED(4))
TLI_DEFINE_VECFUNC( "tanhf", "_ZGVnN4v_tanhf", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.tanh.f32", "_ZGVnN4v_tanhf", FIXED(4))
TLI_DEFINE_VECFUNC( "tgammaf", "_ZGVnN4v_tgammaf", FIXED(4))
TLI_DEFINE_VECFUNC( "llvm.tgamma.f32", "_ZGVnN4v_tgammaf", FIXED(4))
#elif defined(TLI_DEFINE_SLEEFGNUABI_SCALABLE_VECFUNCS)
TLI_DEFINE_VECFUNC("acos", "_ZGVsMxv_acos", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("acosf", "_ZGVsMxv_acosf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("asin", "_ZGVsMxv_asin", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("asinf", "_ZGVsMxv_asinf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("atan", "_ZGVsMxv_atan", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("atanf", "_ZGVsMxv_atanf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("atan2", "_ZGVsMxvv_atan2", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("atan2f", "_ZGVsMxvv_atan2f", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("atanh", "_ZGVsMxv_atanh", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("atanhf", "_ZGVsMxv_atanhf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("cos", "_ZGVsMxv_cos", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("cosf", "_ZGVsMxv_cosf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("llvm.cos.f64", "_ZGVsMxv_cos", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("llvm.cos.f32", "_ZGVsMxv_cosf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("cosh", "_ZGVsMxv_cosh", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("coshf", "_ZGVsMxv_coshf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("exp", "_ZGVsMxv_exp", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("expf", "_ZGVsMxv_expf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("llvm.exp.f64", "_ZGVsMxv_exp", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("llvm.exp.f32", "_ZGVsMxv_expf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("exp2", "_ZGVsMxv_exp2", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("exp2f", "_ZGVsMxv_exp2f", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("llvm.exp2.f64", "_ZGVsMxv_exp2", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("llvm.exp2.f32", "_ZGVsMxv_exp2f", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("exp10", "_ZGVsMxv_exp10", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("exp10f", "_ZGVsMxv_exp10f", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("lgamma", "_ZGVsMxv_lgamma", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("lgammaf", "_ZGVsMxv_lgammaf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("log", "_ZGVsMxv_log", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("logf", "_ZGVsMxv_logf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("llvm.log.f64", "_ZGVsMxv_log", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("llvm.log.f32", "_ZGVsMxv_logf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC( "log2", "_ZGVsMxv_log2", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC( "log2f", "_ZGVsMxv_log2f", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC( "llvm.log2.f64", "_ZGVsMxv_log2", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC( "llvm.log2.f32", "_ZGVsMxv_log2f", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("log10", "_ZGVsMxv_log10", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("log10f", "_ZGVsMxv_log10f", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("llvm.log10.f64", "_ZGVsMxv_log10", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("llvm.log10.f32", "_ZGVsMxv_log10f", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("pow", "_ZGVsMxvv_pow", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("powf", "_ZGVsMxvv_powf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("llvm.pow.f64", "_ZGVsMxvv_pow", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("llvm.pow.f32", "_ZGVsMxvv_powf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("sin", "_ZGVsMxv_sin", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("sinf", "_ZGVsMxv_sinf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("llvm.sin.f64", "_ZGVsMxv_sin", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("llvm.sin.f32", "_ZGVsMxv_sinf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("sinh", "_ZGVsMxv_sinh", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("sinhf", "_ZGVsMxv_sinhf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("sqrt", "_ZGVsMxv_sqrt", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("sqrtf", "_ZGVsMxv_sqrtf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("tan", "_ZGVsMxv_tan", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("tanf", "_ZGVsMxv_tanf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("tanh", "_ZGVsMxv_tanh", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("tanhf", "_ZGVsMxv_tanhf", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("tgamma", "_ZGVsMxv_tgamma", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("tgammaf", "_ZGVsMxv_tgammaf", SCALABLE(4), MASKED)
#elif defined(TLI_DEFINE_ARMPL_VECFUNCS)
TLI_DEFINE_VECFUNC("acos", "armpl_vacosq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("acosf", "armpl_vacosq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("acos", "armpl_svacos_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("acosf", "armpl_svacos_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("acosh", "armpl_vacoshq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("acoshf", "armpl_vacoshq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("acosh", "armpl_svacosh_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("acoshf", "armpl_svacosh_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("asin", "armpl_vasinq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("asinf", "armpl_vasinq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("asin", "armpl_svasin_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("asinf", "armpl_svasin_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("asinh", "armpl_vasinhq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("asinhf", "armpl_vasinhq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("asinh", "armpl_svasinh_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("asinhf", "armpl_svasinh_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("atan", "armpl_vatanq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("atanf", "armpl_vatanq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("atan", "armpl_svatan_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("atanf", "armpl_svatan_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("atan2", "armpl_vatan2q_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("atan2f", "armpl_vatan2q_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("atan2", "armpl_svatan2_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("atan2f", "armpl_svatan2_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("atanh", "armpl_vatanhq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("atanhf", "armpl_vatanhq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("atanh", "armpl_svatanh_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("atanhf", "armpl_svatanh_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("cbrt", "armpl_vcbrtq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("cbrtf", "armpl_vcbrtq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("cbrt", "armpl_svcbrt_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("cbrtf", "armpl_svcbrt_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("copysign", "armpl_vcopysignq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("copysignf", "armpl_vcopysignq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("copysign", "armpl_svcopysign_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("copysignf", "armpl_svcopysign_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("cos", "armpl_vcosq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("cosf", "armpl_vcosq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("cos", "armpl_svcos_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("cosf", "armpl_svcos_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("llvm.cos.f64", "armpl_vcosq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("llvm.cos.f32", "armpl_vcosq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("llvm.cos.f64", "armpl_svcos_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("llvm.cos.f32", "armpl_svcos_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("cosh", "armpl_vcoshq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("coshf", "armpl_vcoshq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("cosh", "armpl_svcosh_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("coshf", "armpl_svcosh_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("erf", "armpl_verfq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("erff", "armpl_verfq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("erf", "armpl_sverf_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("erff", "armpl_sverf_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("erfc", "armpl_verfcq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("erfcf", "armpl_verfcq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("erfc", "armpl_sverfc_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("erfcf", "armpl_sverfc_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("exp", "armpl_vexpq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("expf", "armpl_vexpq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("exp", "armpl_svexp_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("expf", "armpl_svexp_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("llvm.exp.f64", "armpl_vexpq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("llvm.exp.f32", "armpl_vexpq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("llvm.exp.f64", "armpl_svexp_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("llvm.exp.f32", "armpl_svexp_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("exp2", "armpl_vexp2q_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("exp2f", "armpl_vexp2q_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("exp2", "armpl_svexp2_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("exp2f", "armpl_svexp2_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("llvm.exp2.f64", "armpl_vexp2q_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("llvm.exp2.f32", "armpl_vexp2q_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("llvm.exp2.f64", "armpl_svexp2_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("llvm.exp2.f32", "armpl_svexp2_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("exp10", "armpl_vexp10q_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("exp10f", "armpl_vexp10q_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("exp10", "armpl_svexp10_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("exp10f", "armpl_svexp10_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("expm1", "armpl_vexpm1q_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("expm1f", "armpl_vexpm1q_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("expm1", "armpl_svexpm1_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("expm1f", "armpl_svexpm1_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("fdim", "armpl_vfdimq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("fdimf", "armpl_vfdimq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("fdim", "armpl_svfdim_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("fdimf", "armpl_svfdim_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("fma", "armpl_vfmaq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("fmaf", "armpl_vfmaq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("fma", "armpl_svfma_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("fmaf", "armpl_svfma_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("fmin", "armpl_vfminq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("fminf", "armpl_vfminq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("fmin", "armpl_svfmin_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("fminf", "armpl_svfmin_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("fmod", "armpl_vfmodq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("fmodf", "armpl_vfmodq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("fmod", "armpl_svfmod_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("fmodf", "armpl_svfmod_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("hypot", "armpl_vhypotq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("hypotf", "armpl_vhypotq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("hypot", "armpl_svhypot_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("hypotf", "armpl_svhypot_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("lgamma", "armpl_vlgammaq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("lgammaf", "armpl_vlgammaq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("lgamma", "armpl_svlgamma_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("lgammaf", "armpl_svlgamma_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("log", "armpl_vlogq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("logf", "armpl_vlogq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("log", "armpl_svlog_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("logf", "armpl_svlog_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("llvm.log.f64", "armpl_vlogq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("llvm.log.f32", "armpl_vlogq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("llvm.log.f64", "armpl_svlog_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("llvm.log.f32", "armpl_svlog_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("log1p", "armpl_vlog1pq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("log1pf", "armpl_vlog1pq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("log1p", "armpl_svlog1p_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("log1pf", "armpl_svlog1p_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("log2", "armpl_vlog2q_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("log2f", "armpl_vlog2q_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("log2", "armpl_svlog2_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("log2f", "armpl_svlog2_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("llvm.log2.f64", "armpl_vlog2q_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("llvm.log2.f32", "armpl_vlog2q_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("llvm.log2.f64", "armpl_svlog2_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("llvm.log2.f32", "armpl_svlog2_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("log10", "armpl_vlog10q_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("log10f", "armpl_vlog10q_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("log10", "armpl_svlog10_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("log10f", "armpl_svlog10_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("llvm.log10.f64", "armpl_vlog10q_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("llvm.log10.f32", "armpl_vlog10q_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("llvm.log10.f64", "armpl_svlog10_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("llvm.log10.f32", "armpl_svlog10_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("nextafter", "armpl_vnextafterq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("nextafterf", "armpl_vnextafterq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("nextafter", "armpl_svnextafter_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("nextafterf", "armpl_svnextafter_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("pow", "armpl_vpowq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("powf", "armpl_vpowq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("pow", "armpl_svpow_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("powf", "armpl_svpow_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("llvm.pow.f64", "armpl_vpowq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("llvm.pow.f32", "armpl_vpowq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("llvm.pow.f64", "armpl_svpow_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("llvm.pow.f32", "armpl_svpow_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("sin", "armpl_vsinq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("sinf", "armpl_vsinq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("sin", "armpl_svsin_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("sinf", "armpl_svsin_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("llvm.sin.f64", "armpl_vsinq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("llvm.sin.f32", "armpl_vsinq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("llvm.sin.f64", "armpl_svsin_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("llvm.sin.f32", "armpl_svsin_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("sinh", "armpl_vsinhq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("sinhf", "armpl_vsinhq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("sinh", "armpl_svsinh_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("sinhf", "armpl_svsinh_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("sinpi", "armpl_vsinpiq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("sinpif", "armpl_vsinpiq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("sinpi", "armpl_svsinpi_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("sinpif", "armpl_svsinpi_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("sqrt", "armpl_vsqrtq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("sqrtf", "armpl_vsqrtq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("sqrt", "armpl_svsqrt_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("sqrtf", "armpl_svsqrt_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("tan", "armpl_vtanq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("tanf", "armpl_vtanq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("tan", "armpl_svtan_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("tanf", "armpl_svtan_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("tanh", "armpl_vtanhq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("tanhf", "armpl_vtanhq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("tanh", "armpl_svtanh_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("tanhf", "armpl_svtanh_f32_x", SCALABLE(4), MASKED)
TLI_DEFINE_VECFUNC("tgamma", "armpl_vtgammaq_f64", FIXED(2), NOMASK)
TLI_DEFINE_VECFUNC("tgammaf", "armpl_vtgammaq_f32", FIXED(4), NOMASK)
TLI_DEFINE_VECFUNC("tgamma", "armpl_svtgamma_f64_x", SCALABLE(2), MASKED)
TLI_DEFINE_VECFUNC("tgammaf", "armpl_svtgamma_f32_x", SCALABLE(4), MASKED)
#else
#error "Must choose which vector library functions are to be defined."
#endif
#undef MASKED
#undef NOMASK
#undef SCALABLE
#undef FIXED
#undef TLI_DEFINE_VECFUNC
#undef TLI_DEFINE_ACCELERATE_VECFUNCS
#undef TLI_DEFINE_DARWIN_LIBSYSTEM_M_VECFUNCS
#undef TLI_DEFINE_LIBMVEC_X86_VECFUNCS
#undef TLI_DEFINE_MASSV_VECFUNCS
#undef TLI_DEFINE_SVML_VECFUNCS
#undef TLI_DEFINE_SLEEFGNUABI_VF2_VECFUNCS
#undef TLI_DEFINE_SLEEFGNUABI_VF4_VECFUNCS
#undef TLI_DEFINE_SLEEFGNUABI_SCALABLE_VECFUNCS
#undef TLI_DEFINE_MASSV_VECFUNCS_NAMES
#undef TLI_DEFINE_ARMPL_VECFUNCS
PK iwFZδb~ b~ % Analysis/ScalarEvolutionExpressions.hnu �[��� //===- llvm/Analysis/ScalarEvolutionExpressions.h - SCEV Exprs --*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the classes used to represent and build scalar expressions.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_SCALAREVOLUTIONEXPRESSIONS_H
#define LLVM_ANALYSIS_SCALAREVOLUTIONEXPRESSIONS_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/Analysis/ScalarEvolution.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/ValueHandle.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/ErrorHandling.h"
#include <cassert>
#include <cstddef>
namespace llvm {
class APInt;
class Constant;
class ConstantInt;
class ConstantRange;
class Loop;
class Type;
class Value;
enum SCEVTypes : unsigned short {
// These should be ordered in terms of increasing complexity to make the
// folders simpler.
scConstant,
scVScale,
scTruncate,
scZeroExtend,
scSignExtend,
scAddExpr,
scMulExpr,
scUDivExpr,
scAddRecExpr,
scUMaxExpr,
scSMaxExpr,
scUMinExpr,
scSMinExpr,
scSequentialUMinExpr,
scPtrToInt,
scUnknown,
scCouldNotCompute
};
/// This class represents a constant integer value.
class SCEVConstant : public SCEV {
friend class ScalarEvolution;
ConstantInt *V;
SCEVConstant(const FoldingSetNodeIDRef ID, ConstantInt *v)
: SCEV(ID, scConstant, 1), V(v) {}
public:
ConstantInt *getValue() const { return V; }
const APInt &getAPInt() const { return getValue()->getValue(); }
Type *getType() const { return V->getType(); }
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) { return S->getSCEVType() == scConstant; }
};
/// This class represents the value of vscale, as used when defining the length
/// of a scalable vector or returned by the llvm.vscale() intrinsic.
class SCEVVScale : public SCEV {
friend class ScalarEvolution;
SCEVVScale(const FoldingSetNodeIDRef ID, Type *ty)
: SCEV(ID, scVScale, 0), Ty(ty) {}
Type *Ty;
public:
Type *getType() const { return Ty; }
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) { return S->getSCEVType() == scVScale; }
};
inline unsigned short computeExpressionSize(ArrayRef<const SCEV *> Args) {
APInt Size(16, 1);
for (const auto *Arg : Args)
Size = Size.uadd_sat(APInt(16, Arg->getExpressionSize()));
return (unsigned short)Size.getZExtValue();
}
/// This is the base class for unary cast operator classes.
class SCEVCastExpr : public SCEV {
protected:
const SCEV *Op;
Type *Ty;
SCEVCastExpr(const FoldingSetNodeIDRef ID, SCEVTypes SCEVTy, const SCEV *op,
Type *ty);
public:
const SCEV *getOperand() const { return Op; }
const SCEV *getOperand(unsigned i) const {
assert(i == 0 && "Operand index out of range!");
return Op;
}
ArrayRef<const SCEV *> operands() const { return Op; }
size_t getNumOperands() const { return 1; }
Type *getType() const { return Ty; }
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) {
return S->getSCEVType() == scPtrToInt || S->getSCEVType() == scTruncate ||
S->getSCEVType() == scZeroExtend || S->getSCEVType() == scSignExtend;
}
};
/// This class represents a cast from a pointer to a pointer-sized integer
/// value.
class SCEVPtrToIntExpr : public SCEVCastExpr {
friend class ScalarEvolution;
SCEVPtrToIntExpr(const FoldingSetNodeIDRef ID, const SCEV *Op, Type *ITy);
public:
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) { return S->getSCEVType() == scPtrToInt; }
};
/// This is the base class for unary integral cast operator classes.
class SCEVIntegralCastExpr : public SCEVCastExpr {
protected:
SCEVIntegralCastExpr(const FoldingSetNodeIDRef ID, SCEVTypes SCEVTy,
const SCEV *op, Type *ty);
public:
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) {
return S->getSCEVType() == scTruncate || S->getSCEVType() == scZeroExtend ||
S->getSCEVType() == scSignExtend;
}
};
/// This class represents a truncation of an integer value to a
/// smaller integer value.
class SCEVTruncateExpr : public SCEVIntegralCastExpr {
friend class ScalarEvolution;
SCEVTruncateExpr(const FoldingSetNodeIDRef ID, const SCEV *op, Type *ty);
public:
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) { return S->getSCEVType() == scTruncate; }
};
/// This class represents a zero extension of a small integer value
/// to a larger integer value.
class SCEVZeroExtendExpr : public SCEVIntegralCastExpr {
friend class ScalarEvolution;
SCEVZeroExtendExpr(const FoldingSetNodeIDRef ID, const SCEV *op, Type *ty);
public:
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) {
return S->getSCEVType() == scZeroExtend;
}
};
/// This class represents a sign extension of a small integer value
/// to a larger integer value.
class SCEVSignExtendExpr : public SCEVIntegralCastExpr {
friend class ScalarEvolution;
SCEVSignExtendExpr(const FoldingSetNodeIDRef ID, const SCEV *op, Type *ty);
public:
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) {
return S->getSCEVType() == scSignExtend;
}
};
/// This node is a base class providing common functionality for
/// n'ary operators.
class SCEVNAryExpr : public SCEV {
protected:
// Since SCEVs are immutable, ScalarEvolution allocates operand
// arrays with its SCEVAllocator, so this class just needs a simple
// pointer rather than a more elaborate vector-like data structure.
// This also avoids the need for a non-trivial destructor.
const SCEV *const *Operands;
size_t NumOperands;
SCEVNAryExpr(const FoldingSetNodeIDRef ID, enum SCEVTypes T,
const SCEV *const *O, size_t N)
: SCEV(ID, T, computeExpressionSize(ArrayRef(O, N))), Operands(O),
NumOperands(N) {}
public:
size_t getNumOperands() const { return NumOperands; }
const SCEV *getOperand(unsigned i) const {
assert(i < NumOperands && "Operand index out of range!");
return Operands[i];
}
ArrayRef<const SCEV *> operands() const {
return ArrayRef(Operands, NumOperands);
}
NoWrapFlags getNoWrapFlags(NoWrapFlags Mask = NoWrapMask) const {
return (NoWrapFlags)(SubclassData & Mask);
}
bool hasNoUnsignedWrap() const {
return getNoWrapFlags(FlagNUW) != FlagAnyWrap;
}
bool hasNoSignedWrap() const {
return getNoWrapFlags(FlagNSW) != FlagAnyWrap;
}
bool hasNoSelfWrap() const { return getNoWrapFlags(FlagNW) != FlagAnyWrap; }
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) {
return S->getSCEVType() == scAddExpr || S->getSCEVType() == scMulExpr ||
S->getSCEVType() == scSMaxExpr || S->getSCEVType() == scUMaxExpr ||
S->getSCEVType() == scSMinExpr || S->getSCEVType() == scUMinExpr ||
S->getSCEVType() == scSequentialUMinExpr ||
S->getSCEVType() == scAddRecExpr;
}
};
/// This node is the base class for n'ary commutative operators.
class SCEVCommutativeExpr : public SCEVNAryExpr {
protected:
SCEVCommutativeExpr(const FoldingSetNodeIDRef ID, enum SCEVTypes T,
const SCEV *const *O, size_t N)
: SCEVNAryExpr(ID, T, O, N) {}
public:
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) {
return S->getSCEVType() == scAddExpr || S->getSCEVType() == scMulExpr ||
S->getSCEVType() == scSMaxExpr || S->getSCEVType() == scUMaxExpr ||
S->getSCEVType() == scSMinExpr || S->getSCEVType() == scUMinExpr;
}
/// Set flags for a non-recurrence without clearing previously set flags.
void setNoWrapFlags(NoWrapFlags Flags) { SubclassData |= Flags; }
};
/// This node represents an addition of some number of SCEVs.
class SCEVAddExpr : public SCEVCommutativeExpr {
friend class ScalarEvolution;
Type *Ty;
SCEVAddExpr(const FoldingSetNodeIDRef ID, const SCEV *const *O, size_t N)
: SCEVCommutativeExpr(ID, scAddExpr, O, N) {
auto *FirstPointerTypedOp = find_if(operands(), [](const SCEV *Op) {
return Op->getType()->isPointerTy();
});
if (FirstPointerTypedOp != operands().end())
Ty = (*FirstPointerTypedOp)->getType();
else
Ty = getOperand(0)->getType();
}
public:
Type *getType() const { return Ty; }
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) { return S->getSCEVType() == scAddExpr; }
};
/// This node represents multiplication of some number of SCEVs.
class SCEVMulExpr : public SCEVCommutativeExpr {
friend class ScalarEvolution;
SCEVMulExpr(const FoldingSetNodeIDRef ID, const SCEV *const *O, size_t N)
: SCEVCommutativeExpr(ID, scMulExpr, O, N) {}
public:
Type *getType() const { return getOperand(0)->getType(); }
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) { return S->getSCEVType() == scMulExpr; }
};
/// This class represents a binary unsigned division operation.
class SCEVUDivExpr : public SCEV {
friend class ScalarEvolution;
std::array<const SCEV *, 2> Operands;
SCEVUDivExpr(const FoldingSetNodeIDRef ID, const SCEV *lhs, const SCEV *rhs)
: SCEV(ID, scUDivExpr, computeExpressionSize({lhs, rhs})) {
Operands[0] = lhs;
Operands[1] = rhs;
}
public:
const SCEV *getLHS() const { return Operands[0]; }
const SCEV *getRHS() const { return Operands[1]; }
size_t getNumOperands() const { return 2; }
const SCEV *getOperand(unsigned i) const {
assert((i == 0 || i == 1) && "Operand index out of range!");
return i == 0 ? getLHS() : getRHS();
}
ArrayRef<const SCEV *> operands() const { return Operands; }
Type *getType() const {
// In most cases the types of LHS and RHS will be the same, but in some
// crazy cases one or the other may be a pointer. ScalarEvolution doesn't
// depend on the type for correctness, but handling types carefully can
// avoid extra casts in the SCEVExpander. The LHS is more likely to be
// a pointer type than the RHS, so use the RHS' type here.
return getRHS()->getType();
}
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) { return S->getSCEVType() == scUDivExpr; }
};
/// This node represents a polynomial recurrence on the trip count
/// of the specified loop. This is the primary focus of the
/// ScalarEvolution framework; all the other SCEV subclasses are
/// mostly just supporting infrastructure to allow SCEVAddRecExpr
/// expressions to be created and analyzed.
///
/// All operands of an AddRec are required to be loop invariant.
///
class SCEVAddRecExpr : public SCEVNAryExpr {
friend class ScalarEvolution;
const Loop *L;
SCEVAddRecExpr(const FoldingSetNodeIDRef ID, const SCEV *const *O, size_t N,
const Loop *l)
: SCEVNAryExpr(ID, scAddRecExpr, O, N), L(l) {}
public:
Type *getType() const { return getStart()->getType(); }
const SCEV *getStart() const { return Operands[0]; }
const Loop *getLoop() const { return L; }
/// Constructs and returns the recurrence indicating how much this
/// expression steps by. If this is a polynomial of degree N, it
/// returns a chrec of degree N-1. We cannot determine whether
/// the step recurrence has self-wraparound.
const SCEV *getStepRecurrence(ScalarEvolution &SE) const {
if (isAffine())
return getOperand(1);
return SE.getAddRecExpr(
SmallVector<const SCEV *, 3>(operands().drop_front()), getLoop(),
FlagAnyWrap);
}
/// Return true if this represents an expression A + B*x where A
/// and B are loop invariant values.
bool isAffine() const {
// We know that the start value is invariant. This expression is thus
// affine iff the step is also invariant.
return getNumOperands() == 2;
}
/// Return true if this represents an expression A + B*x + C*x^2
/// where A, B and C are loop invariant values. This corresponds
/// to an addrec of the form {L,+,M,+,N}
bool isQuadratic() const { return getNumOperands() == 3; }
/// Set flags for a recurrence without clearing any previously set flags.
/// For AddRec, either NUW or NSW implies NW. Keep track of this fact here
/// to make it easier to propagate flags.
void setNoWrapFlags(NoWrapFlags Flags) {
if (Flags & (FlagNUW | FlagNSW))
Flags = ScalarEvolution::setFlags(Flags, FlagNW);
SubclassData |= Flags;
}
/// Return the value of this chain of recurrences at the specified
/// iteration number.
const SCEV *evaluateAtIteration(const SCEV *It, ScalarEvolution &SE) const;
/// Return the value of this chain of recurrences at the specified iteration
/// number. Takes an explicit list of operands to represent an AddRec.
static const SCEV *evaluateAtIteration(ArrayRef<const SCEV *> Operands,
const SCEV *It, ScalarEvolution &SE);
/// Return the number of iterations of this loop that produce
/// values in the specified constant range. Another way of
/// looking at this is that it returns the first iteration number
/// where the value is not in the condition, thus computing the
/// exit count. If the iteration count can't be computed, an
/// instance of SCEVCouldNotCompute is returned.
const SCEV *getNumIterationsInRange(const ConstantRange &Range,
ScalarEvolution &SE) const;
/// Return an expression representing the value of this expression
/// one iteration of the loop ahead.
const SCEVAddRecExpr *getPostIncExpr(ScalarEvolution &SE) const;
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) {
return S->getSCEVType() == scAddRecExpr;
}
};
/// This node is the base class min/max selections.
class SCEVMinMaxExpr : public SCEVCommutativeExpr {
friend class ScalarEvolution;
static bool isMinMaxType(enum SCEVTypes T) {
return T == scSMaxExpr || T == scUMaxExpr || T == scSMinExpr ||
T == scUMinExpr;
}
protected:
/// Note: Constructing subclasses via this constructor is allowed
SCEVMinMaxExpr(const FoldingSetNodeIDRef ID, enum SCEVTypes T,
const SCEV *const *O, size_t N)
: SCEVCommutativeExpr(ID, T, O, N) {
assert(isMinMaxType(T));
// Min and max never overflow
setNoWrapFlags((NoWrapFlags)(FlagNUW | FlagNSW));
}
public:
Type *getType() const { return getOperand(0)->getType(); }
static bool classof(const SCEV *S) { return isMinMaxType(S->getSCEVType()); }
static enum SCEVTypes negate(enum SCEVTypes T) {
switch (T) {
case scSMaxExpr:
return scSMinExpr;
case scSMinExpr:
return scSMaxExpr;
case scUMaxExpr:
return scUMinExpr;
case scUMinExpr:
return scUMaxExpr;
default:
llvm_unreachable("Not a min or max SCEV type!");
}
}
};
/// This class represents a signed maximum selection.
class SCEVSMaxExpr : public SCEVMinMaxExpr {
friend class ScalarEvolution;
SCEVSMaxExpr(const FoldingSetNodeIDRef ID, const SCEV *const *O, size_t N)
: SCEVMinMaxExpr(ID, scSMaxExpr, O, N) {}
public:
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) { return S->getSCEVType() == scSMaxExpr; }
};
/// This class represents an unsigned maximum selection.
class SCEVUMaxExpr : public SCEVMinMaxExpr {
friend class ScalarEvolution;
SCEVUMaxExpr(const FoldingSetNodeIDRef ID, const SCEV *const *O, size_t N)
: SCEVMinMaxExpr(ID, scUMaxExpr, O, N) {}
public:
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) { return S->getSCEVType() == scUMaxExpr; }
};
/// This class represents a signed minimum selection.
class SCEVSMinExpr : public SCEVMinMaxExpr {
friend class ScalarEvolution;
SCEVSMinExpr(const FoldingSetNodeIDRef ID, const SCEV *const *O, size_t N)
: SCEVMinMaxExpr(ID, scSMinExpr, O, N) {}
public:
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) { return S->getSCEVType() == scSMinExpr; }
};
/// This class represents an unsigned minimum selection.
class SCEVUMinExpr : public SCEVMinMaxExpr {
friend class ScalarEvolution;
SCEVUMinExpr(const FoldingSetNodeIDRef ID, const SCEV *const *O, size_t N)
: SCEVMinMaxExpr(ID, scUMinExpr, O, N) {}
public:
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) { return S->getSCEVType() == scUMinExpr; }
};
/// This node is the base class for sequential/in-order min/max selections.
/// Note that their fundamental difference from SCEVMinMaxExpr's is that they
/// are early-returning upon reaching saturation point.
/// I.e. given `0 umin_seq poison`, the result will be `0`,
/// while the result of `0 umin poison` is `poison`.
class SCEVSequentialMinMaxExpr : public SCEVNAryExpr {
friend class ScalarEvolution;
static bool isSequentialMinMaxType(enum SCEVTypes T) {
return T == scSequentialUMinExpr;
}
/// Set flags for a non-recurrence without clearing previously set flags.
void setNoWrapFlags(NoWrapFlags Flags) { SubclassData |= Flags; }
protected:
/// Note: Constructing subclasses via this constructor is allowed
SCEVSequentialMinMaxExpr(const FoldingSetNodeIDRef ID, enum SCEVTypes T,
const SCEV *const *O, size_t N)
: SCEVNAryExpr(ID, T, O, N) {
assert(isSequentialMinMaxType(T));
// Min and max never overflow
setNoWrapFlags((NoWrapFlags)(FlagNUW | FlagNSW));
}
public:
Type *getType() const { return getOperand(0)->getType(); }
static SCEVTypes getEquivalentNonSequentialSCEVType(SCEVTypes Ty) {
assert(isSequentialMinMaxType(Ty));
switch (Ty) {
case scSequentialUMinExpr:
return scUMinExpr;
default:
llvm_unreachable("Not a sequential min/max type.");
}
}
SCEVTypes getEquivalentNonSequentialSCEVType() const {
return getEquivalentNonSequentialSCEVType(getSCEVType());
}
static bool classof(const SCEV *S) {
return isSequentialMinMaxType(S->getSCEVType());
}
};
/// This class represents a sequential/in-order unsigned minimum selection.
class SCEVSequentialUMinExpr : public SCEVSequentialMinMaxExpr {
friend class ScalarEvolution;
SCEVSequentialUMinExpr(const FoldingSetNodeIDRef ID, const SCEV *const *O,
size_t N)
: SCEVSequentialMinMaxExpr(ID, scSequentialUMinExpr, O, N) {}
public:
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) {
return S->getSCEVType() == scSequentialUMinExpr;
}
};
/// This means that we are dealing with an entirely unknown SCEV
/// value, and only represent it as its LLVM Value. This is the
/// "bottom" value for the analysis.
class SCEVUnknown final : public SCEV, private CallbackVH {
friend class ScalarEvolution;
/// The parent ScalarEvolution value. This is used to update the
/// parent's maps when the value associated with a SCEVUnknown is
/// deleted or RAUW'd.
ScalarEvolution *SE;
/// The next pointer in the linked list of all SCEVUnknown
/// instances owned by a ScalarEvolution.
SCEVUnknown *Next;
SCEVUnknown(const FoldingSetNodeIDRef ID, Value *V, ScalarEvolution *se,
SCEVUnknown *next)
: SCEV(ID, scUnknown, 1), CallbackVH(V), SE(se), Next(next) {}
// Implement CallbackVH.
void deleted() override;
void allUsesReplacedWith(Value *New) override;
public:
Value *getValue() const { return getValPtr(); }
Type *getType() const { return getValPtr()->getType(); }
/// Methods for support type inquiry through isa, cast, and dyn_cast:
static bool classof(const SCEV *S) { return S->getSCEVType() == scUnknown; }
};
/// This class defines a simple visitor class that may be used for
/// various SCEV analysis purposes.
template <typename SC, typename RetVal = void> struct SCEVVisitor {
RetVal visit(const SCEV *S) {
switch (S->getSCEVType()) {
case scConstant:
return ((SC *)this)->visitConstant((const SCEVConstant *)S);
case scVScale:
return ((SC *)this)->visitVScale((const SCEVVScale *)S);
case scPtrToInt:
return ((SC *)this)->visitPtrToIntExpr((const SCEVPtrToIntExpr *)S);
case scTruncate:
return ((SC *)this)->visitTruncateExpr((const SCEVTruncateExpr *)S);
case scZeroExtend:
return ((SC *)this)->visitZeroExtendExpr((const SCEVZeroExtendExpr *)S);
case scSignExtend:
return ((SC *)this)->visitSignExtendExpr((const SCEVSignExtendExpr *)S);
case scAddExpr:
return ((SC *)this)->visitAddExpr((const SCEVAddExpr *)S);
case scMulExpr:
return ((SC *)this)->visitMulExpr((const SCEVMulExpr *)S);
case scUDivExpr:
return ((SC *)this)->visitUDivExpr((const SCEVUDivExpr *)S);
case scAddRecExpr:
return ((SC *)this)->visitAddRecExpr((const SCEVAddRecExpr *)S);
case scSMaxExpr:
return ((SC *)this)->visitSMaxExpr((const SCEVSMaxExpr *)S);
case scUMaxExpr:
return ((SC *)this)->visitUMaxExpr((const SCEVUMaxExpr *)S);
case scSMinExpr:
return ((SC *)this)->visitSMinExpr((const SCEVSMinExpr *)S);
case scUMinExpr:
return ((SC *)this)->visitUMinExpr((const SCEVUMinExpr *)S);
case scSequentialUMinExpr:
return ((SC *)this)
->visitSequentialUMinExpr((const SCEVSequentialUMinExpr *)S);
case scUnknown:
return ((SC *)this)->visitUnknown((const SCEVUnknown *)S);
case scCouldNotCompute:
return ((SC *)this)->visitCouldNotCompute((const SCEVCouldNotCompute *)S);
}
llvm_unreachable("Unknown SCEV kind!");
}
RetVal visitCouldNotCompute(const SCEVCouldNotCompute *S) {
llvm_unreachable("Invalid use of SCEVCouldNotCompute!");
}
};
/// Visit all nodes in the expression tree using worklist traversal.
///
/// Visitor implements:
/// // return true to follow this node.
/// bool follow(const SCEV *S);
/// // return true to terminate the search.
/// bool isDone();
template <typename SV> class SCEVTraversal {
SV &Visitor;
SmallVector<const SCEV *, 8> Worklist;
SmallPtrSet<const SCEV *, 8> Visited;
void push(const SCEV *S) {
if (Visited.insert(S).second && Visitor.follow(S))
Worklist.push_back(S);
}
public:
SCEVTraversal(SV &V) : Visitor(V) {}
void visitAll(const SCEV *Root) {
push(Root);
while (!Worklist.empty() && !Visitor.isDone()) {
const SCEV *S = Worklist.pop_back_val();
switch (S->getSCEVType()) {
case scConstant:
case scVScale:
case scUnknown:
continue;
case scPtrToInt:
case scTruncate:
case scZeroExtend:
case scSignExtend:
case scAddExpr:
case scMulExpr:
case scUDivExpr:
case scSMaxExpr:
case scUMaxExpr:
case scSMinExpr:
case scUMinExpr:
case scSequentialUMinExpr:
case scAddRecExpr:
for (const auto *Op : S->operands()) {
push(Op);
if (Visitor.isDone())
break;
}
continue;
case scCouldNotCompute:
llvm_unreachable("Attempt to use a SCEVCouldNotCompute object!");
}
llvm_unreachable("Unknown SCEV kind!");
}
}
};
/// Use SCEVTraversal to visit all nodes in the given expression tree.
template <typename SV> void visitAll(const SCEV *Root, SV &Visitor) {
SCEVTraversal<SV> T(Visitor);
T.visitAll(Root);
}
/// Return true if any node in \p Root satisfies the predicate \p Pred.
template <typename PredTy>
bool SCEVExprContains(const SCEV *Root, PredTy Pred) {
struct FindClosure {
bool Found = false;
PredTy Pred;
FindClosure(PredTy Pred) : Pred(Pred) {}
bool follow(const SCEV *S) {
if (!Pred(S))
return true;
Found = true;
return false;
}
bool isDone() const { return Found; }
};
FindClosure FC(Pred);
visitAll(Root, FC);
return FC.Found;
}
/// This visitor recursively visits a SCEV expression and re-writes it.
/// The result from each visit is cached, so it will return the same
/// SCEV for the same input.
template <typename SC>
class SCEVRewriteVisitor : public SCEVVisitor<SC, const SCEV *> {
protected:
ScalarEvolution &SE;
// Memoize the result of each visit so that we only compute once for
// the same input SCEV. This is to avoid redundant computations when
// a SCEV is referenced by multiple SCEVs. Without memoization, this
// visit algorithm would have exponential time complexity in the worst
// case, causing the compiler to hang on certain tests.
SmallDenseMap<const SCEV *, const SCEV *> RewriteResults;
public:
SCEVRewriteVisitor(ScalarEvolution &SE) : SE(SE) {}
const SCEV *visit(const SCEV *S) {
auto It = RewriteResults.find(S);
if (It != RewriteResults.end())
return It->second;
auto *Visited = SCEVVisitor<SC, const SCEV *>::visit(S);
auto Result = RewriteResults.try_emplace(S, Visited);
assert(Result.second && "Should insert a new entry");
return Result.first->second;
}
const SCEV *visitConstant(const SCEVConstant *Constant) { return Constant; }
const SCEV *visitVScale(const SCEVVScale *VScale) { return VScale; }
const SCEV *visitPtrToIntExpr(const SCEVPtrToIntExpr *Expr) {
const SCEV *Operand = ((SC *)this)->visit(Expr->getOperand());
return Operand == Expr->getOperand()
? Expr
: SE.getPtrToIntExpr(Operand, Expr->getType());
}
const SCEV *visitTruncateExpr(const SCEVTruncateExpr *Expr) {
const SCEV *Operand = ((SC *)this)->visit(Expr->getOperand());
return Operand == Expr->getOperand()
? Expr
: SE.getTruncateExpr(Operand, Expr->getType());
}
const SCEV *visitZeroExtendExpr(const SCEVZeroExtendExpr *Expr) {
const SCEV *Operand = ((SC *)this)->visit(Expr->getOperand());
return Operand == Expr->getOperand()
? Expr
: SE.getZeroExtendExpr(Operand, Expr->getType());
}
const SCEV *visitSignExtendExpr(const SCEVSignExtendExpr *Expr) {
const SCEV *Operand = ((SC *)this)->visit(Expr->getOperand());
return Operand == Expr->getOperand()
? Expr
: SE.getSignExtendExpr(Operand, Expr->getType());
}
const SCEV *visitAddExpr(const SCEVAddExpr *Expr) {
SmallVector<const SCEV *, 2> Operands;
bool Changed = false;
for (const auto *Op : Expr->operands()) {
Operands.push_back(((SC *)this)->visit(Op));
Changed |= Op != Operands.back();
}
return !Changed ? Expr : SE.getAddExpr(Operands);
}
const SCEV *visitMulExpr(const SCEVMulExpr *Expr) {
SmallVector<const SCEV *, 2> Operands;
bool Changed = false;
for (const auto *Op : Expr->operands()) {
Operands.push_back(((SC *)this)->visit(Op));
Changed |= Op != Operands.back();
}
return !Changed ? Expr : SE.getMulExpr(Operands);
}
const SCEV *visitUDivExpr(const SCEVUDivExpr *Expr) {
auto *LHS = ((SC *)this)->visit(Expr->getLHS());
auto *RHS = ((SC *)this)->visit(Expr->getRHS());
bool Changed = LHS != Expr->getLHS() || RHS != Expr->getRHS();
return !Changed ? Expr : SE.getUDivExpr(LHS, RHS);
}
const SCEV *visitAddRecExpr(const SCEVAddRecExpr *Expr) {
SmallVector<const SCEV *, 2> Operands;
bool Changed = false;
for (const auto *Op : Expr->operands()) {
Operands.push_back(((SC *)this)->visit(Op));
Changed |= Op != Operands.back();
}
return !Changed ? Expr
: SE.getAddRecExpr(Operands, Expr->getLoop(),
Expr->getNoWrapFlags());
}
const SCEV *visitSMaxExpr(const SCEVSMaxExpr *Expr) {
SmallVector<const SCEV *, 2> Operands;
bool Changed = false;
for (const auto *Op : Expr->operands()) {
Operands.push_back(((SC *)this)->visit(Op));
Changed |= Op != Operands.back();
}
return !Changed ? Expr : SE.getSMaxExpr(Operands);
}
const SCEV *visitUMaxExpr(const SCEVUMaxExpr *Expr) {
SmallVector<const SCEV *, 2> Operands;
bool Changed = false;
for (const auto *Op : Expr->operands()) {
Operands.push_back(((SC *)this)->visit(Op));
Changed |= Op != Operands.back();
}
return !Changed ? Expr : SE.getUMaxExpr(Operands);
}
const SCEV *visitSMinExpr(const SCEVSMinExpr *Expr) {
SmallVector<const SCEV *, 2> Operands;
bool Changed = false;
for (const auto *Op : Expr->operands()) {
Operands.push_back(((SC *)this)->visit(Op));
Changed |= Op != Operands.back();
}
return !Changed ? Expr : SE.getSMinExpr(Operands);
}
const SCEV *visitUMinExpr(const SCEVUMinExpr *Expr) {
SmallVector<const SCEV *, 2> Operands;
bool Changed = false;
for (const auto *Op : Expr->operands()) {
Operands.push_back(((SC *)this)->visit(Op));
Changed |= Op != Operands.back();
}
return !Changed ? Expr : SE.getUMinExpr(Operands);
}
const SCEV *visitSequentialUMinExpr(const SCEVSequentialUMinExpr *Expr) {
SmallVector<const SCEV *, 2> Operands;
bool Changed = false;
for (const auto *Op : Expr->operands()) {
Operands.push_back(((SC *)this)->visit(Op));
Changed |= Op != Operands.back();
}
return !Changed ? Expr : SE.getUMinExpr(Operands, /*Sequential=*/true);
}
const SCEV *visitUnknown(const SCEVUnknown *Expr) { return Expr; }
const SCEV *visitCouldNotCompute(const SCEVCouldNotCompute *Expr) {
return Expr;
}
};
using ValueToValueMap = DenseMap<const Value *, Value *>;
using ValueToSCEVMapTy = DenseMap<const Value *, const SCEV *>;
/// The SCEVParameterRewriter takes a scalar evolution expression and updates
/// the SCEVUnknown components following the Map (Value -> SCEV).
class SCEVParameterRewriter : public SCEVRewriteVisitor<SCEVParameterRewriter> {
public:
static const SCEV *rewrite(const SCEV *Scev, ScalarEvolution &SE,
ValueToSCEVMapTy &Map) {
SCEVParameterRewriter Rewriter(SE, Map);
return Rewriter.visit(Scev);
}
SCEVParameterRewriter(ScalarEvolution &SE, ValueToSCEVMapTy &M)
: SCEVRewriteVisitor(SE), Map(M) {}
const SCEV *visitUnknown(const SCEVUnknown *Expr) {
auto I = Map.find(Expr->getValue());
if (I == Map.end())
return Expr;
return I->second;
}
private:
ValueToSCEVMapTy ⤅
};
using LoopToScevMapT = DenseMap<const Loop *, const SCEV *>;
/// The SCEVLoopAddRecRewriter takes a scalar evolution expression and applies
/// the Map (Loop -> SCEV) to all AddRecExprs.
class SCEVLoopAddRecRewriter
: public SCEVRewriteVisitor<SCEVLoopAddRecRewriter> {
public:
SCEVLoopAddRecRewriter(ScalarEvolution &SE, LoopToScevMapT &M)
: SCEVRewriteVisitor(SE), Map(M) {}
static const SCEV *rewrite(const SCEV *Scev, LoopToScevMapT &Map,
ScalarEvolution &SE) {
SCEVLoopAddRecRewriter Rewriter(SE, Map);
return Rewriter.visit(Scev);
}
const SCEV *visitAddRecExpr(const SCEVAddRecExpr *Expr) {
SmallVector<const SCEV *, 2> Operands;
for (const SCEV *Op : Expr->operands())
Operands.push_back(visit(Op));
const Loop *L = Expr->getLoop();
if (0 == Map.count(L))
return SE.getAddRecExpr(Operands, L, Expr->getNoWrapFlags());
return SCEVAddRecExpr::evaluateAtIteration(Operands, Map[L], SE);
}
private:
LoopToScevMapT ⤅
};
} // end namespace llvm
#endif // LLVM_ANALYSIS_SCALAREVOLUTIONEXPRESSIONS_H
PK iwFZ�+T�| | Analysis/SyntheticCountsUtils.hnu �[��� //===- SyntheticCountsUtils.h - utilities for count propagation--*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines utilities for synthetic counts propagation.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_SYNTHETICCOUNTSUTILS_H
#define LLVM_ANALYSIS_SYNTHETICCOUNTSUTILS_H
#include "llvm/ADT/STLFunctionalExtras.h"
#include "llvm/Analysis/CallGraph.h"
#include "llvm/Support/ScaledNumber.h"
namespace llvm {
/// Class with methods to propagate synthetic entry counts.
///
/// This class is templated on the type of the call graph and designed to work
/// with the traditional per-module callgraph and the summary callgraphs used in
/// ThinLTO. This contains only static methods and alias templates.
template <typename CallGraphType> class SyntheticCountsUtils {
public:
using Scaled64 = ScaledNumber<uint64_t>;
using CGT = GraphTraits<CallGraphType>;
using NodeRef = typename CGT::NodeRef;
using EdgeRef = typename CGT::EdgeRef;
using SccTy = std::vector<NodeRef>;
// Not all EdgeRef have information about the source of the edge. Hence
// NodeRef corresponding to the source of the EdgeRef is explicitly passed.
using GetProfCountTy =
function_ref<std::optional<Scaled64>(NodeRef, EdgeRef)>;
using AddCountTy = function_ref<void(NodeRef, Scaled64)>;
static void propagate(const CallGraphType &CG, GetProfCountTy GetProfCount,
AddCountTy AddCount);
private:
static void propagateFromSCC(const SccTy &SCC, GetProfCountTy GetProfCount,
AddCountTy AddCount);
};
} // namespace llvm
#endif
PK iwFZR��$ $ Analysis/LoopPass.hnu �[��� //===- LoopPass.h - LoopPass class ----------------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines LoopPass class. All loop optimization
// and transformation passes are derived from LoopPass.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_LOOPPASS_H
#define LLVM_ANALYSIS_LOOPPASS_H
#include "llvm/IR/LegacyPassManagers.h"
#include "llvm/Pass.h"
#include <deque>
namespace llvm {
class Loop;
class LoopInfo;
class LPPassManager;
class Function;
class LoopPass : public Pass {
public:
explicit LoopPass(char &pid) : Pass(PT_Loop, pid) {}
/// getPrinterPass - Get a pass to print the function corresponding
/// to a Loop.
Pass *createPrinterPass(raw_ostream &O,
const std::string &Banner) const override;
// runOnLoop - This method should be implemented by the subclass to perform
// whatever action is necessary for the specified Loop.
virtual bool runOnLoop(Loop *L, LPPassManager &LPM) = 0;
using llvm::Pass::doInitialization;
using llvm::Pass::doFinalization;
// Initialization and finalization hooks.
virtual bool doInitialization(Loop *L, LPPassManager &LPM) {
return false;
}
// Finalization hook does not supply Loop because at this time
// loop nest is completely different.
virtual bool doFinalization() { return false; }
// Check if this pass is suitable for the current LPPassManager, if
// available. This pass P is not suitable for a LPPassManager if P
// is not preserving higher level analysis info used by other
// LPPassManager passes. In such case, pop LPPassManager from the
// stack. This will force assignPassManager() to create new
// LPPassManger as expected.
void preparePassManager(PMStack &PMS) override;
/// Assign pass manager to manage this pass
void assignPassManager(PMStack &PMS, PassManagerType PMT) override;
/// Return what kind of Pass Manager can manage this pass.
PassManagerType getPotentialPassManagerType() const override {
return PMT_LoopPassManager;
}
protected:
/// Optional passes call this function to check whether the pass should be
/// skipped. This is the case when Attribute::OptimizeNone is set or when
/// optimization bisect is over the limit.
bool skipLoop(const Loop *L) const;
};
class LPPassManager : public FunctionPass, public PMDataManager {
public:
static char ID;
explicit LPPassManager();
/// run - Execute all of the passes scheduled for execution. Keep track of
/// whether any of the passes modifies the module, and if so, return true.
bool runOnFunction(Function &F) override;
/// Pass Manager itself does not invalidate any analysis info.
// LPPassManager needs LoopInfo.
void getAnalysisUsage(AnalysisUsage &Info) const override;
StringRef getPassName() const override { return "Loop Pass Manager"; }
PMDataManager *getAsPMDataManager() override { return this; }
Pass *getAsPass() override { return this; }
/// Print passes managed by this manager
void dumpPassStructure(unsigned Offset) override;
LoopPass *getContainedPass(unsigned N) {
assert(N < PassVector.size() && "Pass number out of range!");
LoopPass *LP = static_cast<LoopPass *>(PassVector[N]);
return LP;
}
PassManagerType getPassManagerType() const override {
return PMT_LoopPassManager;
}
public:
// Add a new loop into the loop queue.
void addLoop(Loop &L);
// Mark \p L as deleted.
void markLoopAsDeleted(Loop &L);
private:
std::deque<Loop *> LQ;
LoopInfo *LI;
Loop *CurrentLoop;
bool CurrentLoopDeleted;
};
// This pass is required by the LCSSA transformation. It is used inside
// LPPassManager to check if current pass preserves LCSSA form, and if it does
// pass manager calls lcssa verification for the current loop.
struct LCSSAVerificationPass : public FunctionPass {
static char ID;
LCSSAVerificationPass();
bool runOnFunction(Function &F) override { return false; }
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
}
};
} // End llvm namespace
#endif
PK iwFZ)Z<� � ! Analysis/ModuleDebugInfoPrinter.hnu �[��� //===- ModuleDebugInfoPrinter.h - -----------------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_MODULEDEBUGINFOPRINTER_H
#define LLVM_ANALYSIS_MODULEDEBUGINFOPRINTER_H
#include "llvm/IR/DebugInfo.h"
#include "llvm/IR/PassManager.h"
namespace llvm {
class raw_ostream;
class ModuleDebugInfoPrinterPass
: public PassInfoMixin<ModuleDebugInfoPrinterPass> {
DebugInfoFinder Finder;
raw_ostream &OS;
public:
explicit ModuleDebugInfoPrinterPass(raw_ostream &OS);
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
};
} // end namespace llvm
#endif // LLVM_ANALYSIS_MODULEDEBUGINFOPRINTER_H
PK iwFZt�%� � ! Analysis/NoInferenceModelRunner.hnu �[��� //===- NoInferenceModelRunner.h ---- noop ML model runner ------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
#ifndef LLVM_ANALYSIS_NOINFERENCEMODELRUNNER_H
#define LLVM_ANALYSIS_NOINFERENCEMODELRUNNER_H
#include "llvm/Analysis/MLModelRunner.h"
#include "llvm/Analysis/TensorSpec.h"
#include "llvm/Config/llvm-config.h"
namespace llvm {
/// A pseudo model runner. We use it to store feature values when collecting
/// logs for the default policy, in 'development' mode, but never ask it to
/// 'run'.
class NoInferenceModelRunner : public MLModelRunner {
public:
NoInferenceModelRunner(LLVMContext &Ctx,
const std::vector<TensorSpec> &Inputs);
static bool classof(const MLModelRunner *R) {
return R->getKind() == MLModelRunner::Kind::NoOp;
}
private:
void *evaluateUntyped() override {
llvm_unreachable("We shouldn't call run on this model runner.");
}
};
} // namespace llvm
#endif // LLVM_ANALYSIS_NOINFERENCEMODELRUNNER_H
PK iwFZ��;�� �� Analysis/MemorySSA.hnu �[��� //===- MemorySSA.h - Build Memory SSA ---------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file
/// This file exposes an interface to building/using memory SSA to
/// walk memory instructions using a use/def graph.
///
/// Memory SSA class builds an SSA form that links together memory access
/// instructions such as loads, stores, atomics, and calls. Additionally, it
/// does a trivial form of "heap versioning" Every time the memory state changes
/// in the program, we generate a new heap version. It generates
/// MemoryDef/Uses/Phis that are overlayed on top of the existing instructions.
///
/// As a trivial example,
/// define i32 @main() #0 {
/// entry:
/// %call = call noalias i8* @_Znwm(i64 4) #2
/// %0 = bitcast i8* %call to i32*
/// %call1 = call noalias i8* @_Znwm(i64 4) #2
/// %1 = bitcast i8* %call1 to i32*
/// store i32 5, i32* %0, align 4
/// store i32 7, i32* %1, align 4
/// %2 = load i32* %0, align 4
/// %3 = load i32* %1, align 4
/// %add = add nsw i32 %2, %3
/// ret i32 %add
/// }
///
/// Will become
/// define i32 @main() #0 {
/// entry:
/// ; 1 = MemoryDef(0)
/// %call = call noalias i8* @_Znwm(i64 4) #3
/// %2 = bitcast i8* %call to i32*
/// ; 2 = MemoryDef(1)
/// %call1 = call noalias i8* @_Znwm(i64 4) #3
/// %4 = bitcast i8* %call1 to i32*
/// ; 3 = MemoryDef(2)
/// store i32 5, i32* %2, align 4
/// ; 4 = MemoryDef(3)
/// store i32 7, i32* %4, align 4
/// ; MemoryUse(3)
/// %7 = load i32* %2, align 4
/// ; MemoryUse(4)
/// %8 = load i32* %4, align 4
/// %add = add nsw i32 %7, %8
/// ret i32 %add
/// }
///
/// Given this form, all the stores that could ever effect the load at %8 can be
/// gotten by using the MemoryUse associated with it, and walking from use to
/// def until you hit the top of the function.
///
/// Each def also has a list of users associated with it, so you can walk from
/// both def to users, and users to defs. Note that we disambiguate MemoryUses,
/// but not the RHS of MemoryDefs. You can see this above at %7, which would
/// otherwise be a MemoryUse(4). Being disambiguated means that for a given
/// store, all the MemoryUses on its use lists are may-aliases of that store
/// (but the MemoryDefs on its use list may not be).
///
/// MemoryDefs are not disambiguated because it would require multiple reaching
/// definitions, which would require multiple phis, and multiple memoryaccesses
/// per instruction.
///
/// In addition to the def/use graph described above, MemoryDefs also contain
/// an "optimized" definition use. The "optimized" use points to some def
/// reachable through the memory def chain. The optimized def *may* (but is
/// not required to) alias the original MemoryDef, but no def *closer* to the
/// source def may alias it. As the name implies, the purpose of the optimized
/// use is to allow caching of clobber searches for memory defs. The optimized
/// def may be nullptr, in which case clients must walk the defining access
/// chain.
///
/// When iterating the uses of a MemoryDef, both defining uses and optimized
/// uses will be encountered. If only one type is needed, the client must
/// filter the use walk.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_MEMORYSSA_H
#define LLVM_ANALYSIS_MEMORYSSA_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/ilist_node.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Analysis/MemoryLocation.h"
#include "llvm/Analysis/PHITransAddr.h"
#include "llvm/IR/DerivedUser.h"
#include "llvm/IR/Dominators.h"
#include "llvm/IR/Type.h"
#include "llvm/IR/User.h"
#include "llvm/Pass.h"
#include <algorithm>
#include <cassert>
#include <cstddef>
#include <iterator>
#include <memory>
#include <utility>
namespace llvm {
template <class GraphType> struct GraphTraits;
class BasicBlock;
class Function;
class Instruction;
class LLVMContext;
class MemoryAccess;
class MemorySSAWalker;
class Module;
class Use;
class Value;
class raw_ostream;
namespace MSSAHelpers {
struct AllAccessTag {};
struct DefsOnlyTag {};
} // end namespace MSSAHelpers
enum : unsigned {
// Used to signify what the default invalid ID is for MemoryAccess's
// getID()
INVALID_MEMORYACCESS_ID = -1U
};
template <class T> class memoryaccess_def_iterator_base;
using memoryaccess_def_iterator = memoryaccess_def_iterator_base<MemoryAccess>;
using const_memoryaccess_def_iterator =
memoryaccess_def_iterator_base<const MemoryAccess>;
// The base for all memory accesses. All memory accesses in a block are
// linked together using an intrusive list.
class MemoryAccess
: public DerivedUser,
public ilist_node<MemoryAccess, ilist_tag<MSSAHelpers::AllAccessTag>>,
public ilist_node<MemoryAccess, ilist_tag<MSSAHelpers::DefsOnlyTag>> {
public:
using AllAccessType =
ilist_node<MemoryAccess, ilist_tag<MSSAHelpers::AllAccessTag>>;
using DefsOnlyType =
ilist_node<MemoryAccess, ilist_tag<MSSAHelpers::DefsOnlyTag>>;
MemoryAccess(const MemoryAccess &) = delete;
MemoryAccess &operator=(const MemoryAccess &) = delete;
void *operator new(size_t) = delete;
// Methods for support type inquiry through isa, cast, and
// dyn_cast
static bool classof(const Value *V) {
unsigned ID = V->getValueID();
return ID == MemoryUseVal || ID == MemoryPhiVal || ID == MemoryDefVal;
}
BasicBlock *getBlock() const { return Block; }
void print(raw_ostream &OS) const;
void dump() const;
/// The user iterators for a memory access
using iterator = user_iterator;
using const_iterator = const_user_iterator;
/// This iterator walks over all of the defs in a given
/// MemoryAccess. For MemoryPhi nodes, this walks arguments. For
/// MemoryUse/MemoryDef, this walks the defining access.
memoryaccess_def_iterator defs_begin();
const_memoryaccess_def_iterator defs_begin() const;
memoryaccess_def_iterator defs_end();
const_memoryaccess_def_iterator defs_end() const;
/// Get the iterators for the all access list and the defs only list
/// We default to the all access list.
AllAccessType::self_iterator getIterator() {
return this->AllAccessType::getIterator();
}
AllAccessType::const_self_iterator getIterator() const {
return this->AllAccessType::getIterator();
}
AllAccessType::reverse_self_iterator getReverseIterator() {
return this->AllAccessType::getReverseIterator();
}
AllAccessType::const_reverse_self_iterator getReverseIterator() const {
return this->AllAccessType::getReverseIterator();
}
DefsOnlyType::self_iterator getDefsIterator() {
return this->DefsOnlyType::getIterator();
}
DefsOnlyType::const_self_iterator getDefsIterator() const {
return this->DefsOnlyType::getIterator();
}
DefsOnlyType::reverse_self_iterator getReverseDefsIterator() {
return this->DefsOnlyType::getReverseIterator();
}
DefsOnlyType::const_reverse_self_iterator getReverseDefsIterator() const {
return this->DefsOnlyType::getReverseIterator();
}
protected:
friend class MemoryDef;
friend class MemoryPhi;
friend class MemorySSA;
friend class MemoryUse;
friend class MemoryUseOrDef;
/// Used by MemorySSA to change the block of a MemoryAccess when it is
/// moved.
void setBlock(BasicBlock *BB) { Block = BB; }
/// Used for debugging and tracking things about MemoryAccesses.
/// Guaranteed unique among MemoryAccesses, no guarantees otherwise.
inline unsigned getID() const;
MemoryAccess(LLVMContext &C, unsigned Vty, DeleteValueTy DeleteValue,
BasicBlock *BB, unsigned NumOperands)
: DerivedUser(Type::getVoidTy(C), Vty, nullptr, NumOperands, DeleteValue),
Block(BB) {}
// Use deleteValue() to delete a generic MemoryAccess.
~MemoryAccess() = default;
private:
BasicBlock *Block;
};
template <>
struct ilist_alloc_traits<MemoryAccess> {
static void deleteNode(MemoryAccess *MA) { MA->deleteValue(); }
};
inline raw_ostream &operator<<(raw_ostream &OS, const MemoryAccess &MA) {
MA.print(OS);
return OS;
}
/// Class that has the common methods + fields of memory uses/defs. It's
/// a little awkward to have, but there are many cases where we want either a
/// use or def, and there are many cases where uses are needed (defs aren't
/// acceptable), and vice-versa.
///
/// This class should never be instantiated directly; make a MemoryUse or
/// MemoryDef instead.
class MemoryUseOrDef : public MemoryAccess {
public:
void *operator new(size_t) = delete;
DECLARE_TRANSPARENT_OPERAND_ACCESSORS(MemoryAccess);
/// Get the instruction that this MemoryUse represents.
Instruction *getMemoryInst() const { return MemoryInstruction; }
/// Get the access that produces the memory state used by this Use.
MemoryAccess *getDefiningAccess() const { return getOperand(0); }
static bool classof(const Value *MA) {
return MA->getValueID() == MemoryUseVal || MA->getValueID() == MemoryDefVal;
}
/// Do we have an optimized use?
inline bool isOptimized() const;
/// Return the MemoryAccess associated with the optimized use, or nullptr.
inline MemoryAccess *getOptimized() const;
/// Sets the optimized use for a MemoryDef.
inline void setOptimized(MemoryAccess *);
/// Reset the ID of what this MemoryUse was optimized to, causing it to
/// be rewalked by the walker if necessary.
/// This really should only be called by tests.
inline void resetOptimized();
protected:
friend class MemorySSA;
friend class MemorySSAUpdater;
MemoryUseOrDef(LLVMContext &C, MemoryAccess *DMA, unsigned Vty,
DeleteValueTy DeleteValue, Instruction *MI, BasicBlock *BB,
unsigned NumOperands)
: MemoryAccess(C, Vty, DeleteValue, BB, NumOperands),
MemoryInstruction(MI) {
setDefiningAccess(DMA);
}
// Use deleteValue() to delete a generic MemoryUseOrDef.
~MemoryUseOrDef() = default;
void setDefiningAccess(MemoryAccess *DMA, bool Optimized = false) {
if (!Optimized) {
setOperand(0, DMA);
return;
}
setOptimized(DMA);
}
private:
Instruction *MemoryInstruction;
};
/// Represents read-only accesses to memory
///
/// In particular, the set of Instructions that will be represented by
/// MemoryUse's is exactly the set of Instructions for which
/// AliasAnalysis::getModRefInfo returns "Ref".
class MemoryUse final : public MemoryUseOrDef {
public:
DECLARE_TRANSPARENT_OPERAND_ACCESSORS(MemoryAccess);
MemoryUse(LLVMContext &C, MemoryAccess *DMA, Instruction *MI, BasicBlock *BB)
: MemoryUseOrDef(C, DMA, MemoryUseVal, deleteMe, MI, BB,
/*NumOperands=*/1) {}
// allocate space for exactly one operand
void *operator new(size_t S) { return User::operator new(S, 1); }
void operator delete(void *Ptr) { User::operator delete(Ptr); }
static bool classof(const Value *MA) {
return MA->getValueID() == MemoryUseVal;
}
void print(raw_ostream &OS) const;
void setOptimized(MemoryAccess *DMA) {
OptimizedID = DMA->getID();
setOperand(0, DMA);
}
/// Whether the MemoryUse is optimized. If ensureOptimizedUses() was called,
/// uses will usually be optimized, but this is not guaranteed (e.g. due to
/// invalidation and optimization limits.)
bool isOptimized() const {
return getDefiningAccess() && OptimizedID == getDefiningAccess()->getID();
}
MemoryAccess *getOptimized() const {
return getDefiningAccess();
}
void resetOptimized() {
OptimizedID = INVALID_MEMORYACCESS_ID;
}
protected:
friend class MemorySSA;
private:
static void deleteMe(DerivedUser *Self);
unsigned OptimizedID = INVALID_MEMORYACCESS_ID;
};
template <>
struct OperandTraits<MemoryUse> : public FixedNumOperandTraits<MemoryUse, 1> {};
DEFINE_TRANSPARENT_OPERAND_ACCESSORS(MemoryUse, MemoryAccess)
/// Represents a read-write access to memory, whether it is a must-alias,
/// or a may-alias.
///
/// In particular, the set of Instructions that will be represented by
/// MemoryDef's is exactly the set of Instructions for which
/// AliasAnalysis::getModRefInfo returns "Mod" or "ModRef".
/// Note that, in order to provide def-def chains, all defs also have a use
/// associated with them. This use points to the nearest reaching
/// MemoryDef/MemoryPhi.
class MemoryDef final : public MemoryUseOrDef {
public:
friend class MemorySSA;
DECLARE_TRANSPARENT_OPERAND_ACCESSORS(MemoryAccess);
MemoryDef(LLVMContext &C, MemoryAccess *DMA, Instruction *MI, BasicBlock *BB,
unsigned Ver)
: MemoryUseOrDef(C, DMA, MemoryDefVal, deleteMe, MI, BB,
/*NumOperands=*/2),
ID(Ver) {}
// allocate space for exactly two operands
void *operator new(size_t S) { return User::operator new(S, 2); }
void operator delete(void *Ptr) { User::operator delete(Ptr); }
static bool classof(const Value *MA) {
return MA->getValueID() == MemoryDefVal;
}
void setOptimized(MemoryAccess *MA) {
setOperand(1, MA);
OptimizedID = MA->getID();
}
MemoryAccess *getOptimized() const {
return cast_or_null<MemoryAccess>(getOperand(1));
}
bool isOptimized() const {
return getOptimized() && OptimizedID == getOptimized()->getID();
}
void resetOptimized() {
OptimizedID = INVALID_MEMORYACCESS_ID;
setOperand(1, nullptr);
}
void print(raw_ostream &OS) const;
unsigned getID() const { return ID; }
private:
static void deleteMe(DerivedUser *Self);
const unsigned ID;
unsigned OptimizedID = INVALID_MEMORYACCESS_ID;
};
template <>
struct OperandTraits<MemoryDef> : public FixedNumOperandTraits<MemoryDef, 2> {};
DEFINE_TRANSPARENT_OPERAND_ACCESSORS(MemoryDef, MemoryAccess)
template <>
struct OperandTraits<MemoryUseOrDef> {
static Use *op_begin(MemoryUseOrDef *MUD) {
if (auto *MU = dyn_cast<MemoryUse>(MUD))
return OperandTraits<MemoryUse>::op_begin(MU);
return OperandTraits<MemoryDef>::op_begin(cast<MemoryDef>(MUD));
}
static Use *op_end(MemoryUseOrDef *MUD) {
if (auto *MU = dyn_cast<MemoryUse>(MUD))
return OperandTraits<MemoryUse>::op_end(MU);
return OperandTraits<MemoryDef>::op_end(cast<MemoryDef>(MUD));
}
static unsigned operands(const MemoryUseOrDef *MUD) {
if (const auto *MU = dyn_cast<MemoryUse>(MUD))
return OperandTraits<MemoryUse>::operands(MU);
return OperandTraits<MemoryDef>::operands(cast<MemoryDef>(MUD));
}
};
DEFINE_TRANSPARENT_OPERAND_ACCESSORS(MemoryUseOrDef, MemoryAccess)
/// Represents phi nodes for memory accesses.
///
/// These have the same semantic as regular phi nodes, with the exception that
/// only one phi will ever exist in a given basic block.
/// Guaranteeing one phi per block means guaranteeing there is only ever one
/// valid reaching MemoryDef/MemoryPHI along each path to the phi node.
/// This is ensured by not allowing disambiguation of the RHS of a MemoryDef or
/// a MemoryPhi's operands.
/// That is, given
/// if (a) {
/// store %a
/// store %b
/// }
/// it *must* be transformed into
/// if (a) {
/// 1 = MemoryDef(liveOnEntry)
/// store %a
/// 2 = MemoryDef(1)
/// store %b
/// }
/// and *not*
/// if (a) {
/// 1 = MemoryDef(liveOnEntry)
/// store %a
/// 2 = MemoryDef(liveOnEntry)
/// store %b
/// }
/// even if the two stores do not conflict. Otherwise, both 1 and 2 reach the
/// end of the branch, and if there are not two phi nodes, one will be
/// disconnected completely from the SSA graph below that point.
/// Because MemoryUse's do not generate new definitions, they do not have this
/// issue.
class MemoryPhi final : public MemoryAccess {
// allocate space for exactly zero operands
void *operator new(size_t S) { return User::operator new(S); }
public:
void operator delete(void *Ptr) { User::operator delete(Ptr); }
/// Provide fast operand accessors
DECLARE_TRANSPARENT_OPERAND_ACCESSORS(MemoryAccess);
MemoryPhi(LLVMContext &C, BasicBlock *BB, unsigned Ver, unsigned NumPreds = 0)
: MemoryAccess(C, MemoryPhiVal, deleteMe, BB, 0), ID(Ver),
ReservedSpace(NumPreds) {
allocHungoffUses(ReservedSpace);
}
// Block iterator interface. This provides access to the list of incoming
// basic blocks, which parallels the list of incoming values.
using block_iterator = BasicBlock **;
using const_block_iterator = BasicBlock *const *;
block_iterator block_begin() {
return reinterpret_cast<block_iterator>(op_begin() + ReservedSpace);
}
const_block_iterator block_begin() const {
return reinterpret_cast<const_block_iterator>(op_begin() + ReservedSpace);
}
block_iterator block_end() { return block_begin() + getNumOperands(); }
const_block_iterator block_end() const {
return block_begin() + getNumOperands();
}
iterator_range<block_iterator> blocks() {
return make_range(block_begin(), block_end());
}
iterator_range<const_block_iterator> blocks() const {
return make_range(block_begin(), block_end());
}
op_range incoming_values() { return operands(); }
const_op_range incoming_values() const { return operands(); }
/// Return the number of incoming edges
unsigned getNumIncomingValues() const { return getNumOperands(); }
/// Return incoming value number x
MemoryAccess *getIncomingValue(unsigned I) const { return getOperand(I); }
void setIncomingValue(unsigned I, MemoryAccess *V) {
assert(V && "PHI node got a null value!");
setOperand(I, V);
}
static unsigned getOperandNumForIncomingValue(unsigned I) { return I; }
static unsigned getIncomingValueNumForOperand(unsigned I) { return I; }
/// Return incoming basic block number @p i.
BasicBlock *getIncomingBlock(unsigned I) const { return block_begin()[I]; }
/// Return incoming basic block corresponding
/// to an operand of the PHI.
BasicBlock *getIncomingBlock(const Use &U) const {
assert(this == U.getUser() && "Iterator doesn't point to PHI's Uses?");
return getIncomingBlock(unsigned(&U - op_begin()));
}
/// Return incoming basic block corresponding
/// to value use iterator.
BasicBlock *getIncomingBlock(MemoryAccess::const_user_iterator I) const {
return getIncomingBlock(I.getUse());
}
void setIncomingBlock(unsigned I, BasicBlock *BB) {
assert(BB && "PHI node got a null basic block!");
block_begin()[I] = BB;
}
/// Add an incoming value to the end of the PHI list
void addIncoming(MemoryAccess *V, BasicBlock *BB) {
if (getNumOperands() == ReservedSpace)
growOperands(); // Get more space!
// Initialize some new operands.
setNumHungOffUseOperands(getNumOperands() + 1);
setIncomingValue(getNumOperands() - 1, V);
setIncomingBlock(getNumOperands() - 1, BB);
}
/// Return the first index of the specified basic
/// block in the value list for this PHI. Returns -1 if no instance.
int getBasicBlockIndex(const BasicBlock *BB) const {
for (unsigned I = 0, E = getNumOperands(); I != E; ++I)
if (block_begin()[I] == BB)
return I;
return -1;
}
MemoryAccess *getIncomingValueForBlock(const BasicBlock *BB) const {
int Idx = getBasicBlockIndex(BB);
assert(Idx >= 0 && "Invalid basic block argument!");
return getIncomingValue(Idx);
}
// After deleting incoming position I, the order of incoming may be changed.
void unorderedDeleteIncoming(unsigned I) {
unsigned E = getNumOperands();
assert(I < E && "Cannot remove out of bounds Phi entry.");
// MemoryPhi must have at least two incoming values, otherwise the MemoryPhi
// itself should be deleted.
assert(E >= 2 && "Cannot only remove incoming values in MemoryPhis with "
"at least 2 values.");
setIncomingValue(I, getIncomingValue(E - 1));
setIncomingBlock(I, block_begin()[E - 1]);
setOperand(E - 1, nullptr);
block_begin()[E - 1] = nullptr;
setNumHungOffUseOperands(getNumOperands() - 1);
}
// After deleting entries that satisfy Pred, remaining entries may have
// changed order.
template <typename Fn> void unorderedDeleteIncomingIf(Fn &&Pred) {
for (unsigned I = 0, E = getNumOperands(); I != E; ++I)
if (Pred(getIncomingValue(I), getIncomingBlock(I))) {
unorderedDeleteIncoming(I);
E = getNumOperands();
--I;
}
assert(getNumOperands() >= 1 &&
"Cannot remove all incoming blocks in a MemoryPhi.");
}
// After deleting incoming block BB, the incoming blocks order may be changed.
void unorderedDeleteIncomingBlock(const BasicBlock *BB) {
unorderedDeleteIncomingIf(
[&](const MemoryAccess *, const BasicBlock *B) { return BB == B; });
}
// After deleting incoming memory access MA, the incoming accesses order may
// be changed.
void unorderedDeleteIncomingValue(const MemoryAccess *MA) {
unorderedDeleteIncomingIf(
[&](const MemoryAccess *M, const BasicBlock *) { return MA == M; });
}
static bool classof(const Value *V) {
return V->getValueID() == MemoryPhiVal;
}
void print(raw_ostream &OS) const;
unsigned getID() const { return ID; }
protected:
friend class MemorySSA;
/// this is more complicated than the generic
/// User::allocHungoffUses, because we have to allocate Uses for the incoming
/// values and pointers to the incoming blocks, all in one allocation.
void allocHungoffUses(unsigned N) {
User::allocHungoffUses(N, /* IsPhi */ true);
}
private:
// For debugging only
const unsigned ID;
unsigned ReservedSpace;
/// This grows the operand list in response to a push_back style of
/// operation. This grows the number of ops by 1.5 times.
void growOperands() {
unsigned E = getNumOperands();
// 2 op PHI nodes are VERY common, so reserve at least enough for that.
ReservedSpace = std::max(E + E / 2, 2u);
growHungoffUses(ReservedSpace, /* IsPhi */ true);
}
static void deleteMe(DerivedUser *Self);
};
inline unsigned MemoryAccess::getID() const {
assert((isa<MemoryDef>(this) || isa<MemoryPhi>(this)) &&
"only memory defs and phis have ids");
if (const auto *MD = dyn_cast<MemoryDef>(this))
return MD->getID();
return cast<MemoryPhi>(this)->getID();
}
inline bool MemoryUseOrDef::isOptimized() const {
if (const auto *MD = dyn_cast<MemoryDef>(this))
return MD->isOptimized();
return cast<MemoryUse>(this)->isOptimized();
}
inline MemoryAccess *MemoryUseOrDef::getOptimized() const {
if (const auto *MD = dyn_cast<MemoryDef>(this))
return MD->getOptimized();
return cast<MemoryUse>(this)->getOptimized();
}
inline void MemoryUseOrDef::setOptimized(MemoryAccess *MA) {
if (auto *MD = dyn_cast<MemoryDef>(this))
MD->setOptimized(MA);
else
cast<MemoryUse>(this)->setOptimized(MA);
}
inline void MemoryUseOrDef::resetOptimized() {
if (auto *MD = dyn_cast<MemoryDef>(this))
MD->resetOptimized();
else
cast<MemoryUse>(this)->resetOptimized();
}
template <> struct OperandTraits<MemoryPhi> : public HungoffOperandTraits<2> {};
DEFINE_TRANSPARENT_OPERAND_ACCESSORS(MemoryPhi, MemoryAccess)
/// Encapsulates MemorySSA, including all data associated with memory
/// accesses.
class MemorySSA {
public:
MemorySSA(Function &, AliasAnalysis *, DominatorTree *);
// MemorySSA must remain where it's constructed; Walkers it creates store
// pointers to it.
MemorySSA(MemorySSA &&) = delete;
~MemorySSA();
MemorySSAWalker *getWalker();
MemorySSAWalker *getSkipSelfWalker();
/// Given a memory Mod/Ref'ing instruction, get the MemorySSA
/// access associated with it. If passed a basic block gets the memory phi
/// node that exists for that block, if there is one. Otherwise, this will get
/// a MemoryUseOrDef.
MemoryUseOrDef *getMemoryAccess(const Instruction *I) const {
return cast_or_null<MemoryUseOrDef>(ValueToMemoryAccess.lookup(I));
}
MemoryPhi *getMemoryAccess(const BasicBlock *BB) const {
return cast_or_null<MemoryPhi>(ValueToMemoryAccess.lookup(cast<Value>(BB)));
}
DominatorTree &getDomTree() const { return *DT; }
void dump() const;
void print(raw_ostream &) const;
/// Return true if \p MA represents the live on entry value
///
/// Loads and stores from pointer arguments and other global values may be
/// defined by memory operations that do not occur in the current function, so
/// they may be live on entry to the function. MemorySSA represents such
/// memory state by the live on entry definition, which is guaranteed to occur
/// before any other memory access in the function.
inline bool isLiveOnEntryDef(const MemoryAccess *MA) const {
return MA == LiveOnEntryDef.get();
}
inline MemoryAccess *getLiveOnEntryDef() const {
return LiveOnEntryDef.get();
}
// Sadly, iplists, by default, owns and deletes pointers added to the
// list. It's not currently possible to have two iplists for the same type,
// where one owns the pointers, and one does not. This is because the traits
// are per-type, not per-tag. If this ever changes, we should make the
// DefList an iplist.
using AccessList = iplist<MemoryAccess, ilist_tag<MSSAHelpers::AllAccessTag>>;
using DefsList =
simple_ilist<MemoryAccess, ilist_tag<MSSAHelpers::DefsOnlyTag>>;
/// Return the list of MemoryAccess's for a given basic block.
///
/// This list is not modifiable by the user.
const AccessList *getBlockAccesses(const BasicBlock *BB) const {
return getWritableBlockAccesses(BB);
}
/// Return the list of MemoryDef's and MemoryPhi's for a given basic
/// block.
///
/// This list is not modifiable by the user.
const DefsList *getBlockDefs(const BasicBlock *BB) const {
return getWritableBlockDefs(BB);
}
/// Given two memory accesses in the same basic block, determine
/// whether MemoryAccess \p A dominates MemoryAccess \p B.
bool locallyDominates(const MemoryAccess *A, const MemoryAccess *B) const;
/// Given two memory accesses in potentially different blocks,
/// determine whether MemoryAccess \p A dominates MemoryAccess \p B.
bool dominates(const MemoryAccess *A, const MemoryAccess *B) const;
/// Given a MemoryAccess and a Use, determine whether MemoryAccess \p A
/// dominates Use \p B.
bool dominates(const MemoryAccess *A, const Use &B) const;
enum class VerificationLevel { Fast, Full };
/// Verify that MemorySSA is self consistent (IE definitions dominate
/// all uses, uses appear in the right places). This is used by unit tests.
void verifyMemorySSA(VerificationLevel = VerificationLevel::Fast) const;
/// Used in various insertion functions to specify whether we are talking
/// about the beginning or end of a block.
enum InsertionPlace { Beginning, End, BeforeTerminator };
/// By default, uses are *not* optimized during MemorySSA construction.
/// Calling this method will attempt to optimize all MemoryUses, if this has
/// not happened yet for this MemorySSA instance. This should be done if you
/// plan to query the clobbering access for most uses, or if you walk the
/// def-use chain of uses.
void ensureOptimizedUses();
AliasAnalysis &getAA() { return *AA; }
protected:
// Used by Memory SSA dumpers and wrapper pass
friend class MemorySSAUpdater;
void verifyOrderingDominationAndDefUses(
Function &F, VerificationLevel = VerificationLevel::Fast) const;
void verifyDominationNumbers(const Function &F) const;
void verifyPrevDefInPhis(Function &F) const;
// This is used by the use optimizer and updater.
AccessList *getWritableBlockAccesses(const BasicBlock *BB) const {
auto It = PerBlockAccesses.find(BB);
return It == PerBlockAccesses.end() ? nullptr : It->second.get();
}
// This is used by the use optimizer and updater.
DefsList *getWritableBlockDefs(const BasicBlock *BB) const {
auto It = PerBlockDefs.find(BB);
return It == PerBlockDefs.end() ? nullptr : It->second.get();
}
// These is used by the updater to perform various internal MemorySSA
// machinsations. They do not always leave the IR in a correct state, and
// relies on the updater to fixup what it breaks, so it is not public.
void moveTo(MemoryUseOrDef *What, BasicBlock *BB, AccessList::iterator Where);
void moveTo(MemoryAccess *What, BasicBlock *BB, InsertionPlace Point);
// Rename the dominator tree branch rooted at BB.
void renamePass(BasicBlock *BB, MemoryAccess *IncomingVal,
SmallPtrSetImpl<BasicBlock *> &Visited) {
renamePass(DT->getNode(BB), IncomingVal, Visited, true, true);
}
void removeFromLookups(MemoryAccess *);
void removeFromLists(MemoryAccess *, bool ShouldDelete = true);
void insertIntoListsForBlock(MemoryAccess *, const BasicBlock *,
InsertionPlace);
void insertIntoListsBefore(MemoryAccess *, const BasicBlock *,
AccessList::iterator);
MemoryUseOrDef *createDefinedAccess(Instruction *, MemoryAccess *,
const MemoryUseOrDef *Template = nullptr,
bool CreationMustSucceed = true);
private:
class ClobberWalkerBase;
class CachingWalker;
class SkipSelfWalker;
class OptimizeUses;
CachingWalker *getWalkerImpl();
void buildMemorySSA(BatchAAResults &BAA);
void prepareForMoveTo(MemoryAccess *, BasicBlock *);
void verifyUseInDefs(MemoryAccess *, MemoryAccess *) const;
using AccessMap = DenseMap<const BasicBlock *, std::unique_ptr<AccessList>>;
using DefsMap = DenseMap<const BasicBlock *, std::unique_ptr<DefsList>>;
void markUnreachableAsLiveOnEntry(BasicBlock *BB);
MemoryPhi *createMemoryPhi(BasicBlock *BB);
template <typename AliasAnalysisType>
MemoryUseOrDef *createNewAccess(Instruction *, AliasAnalysisType *,
const MemoryUseOrDef *Template = nullptr);
void placePHINodes(const SmallPtrSetImpl<BasicBlock *> &);
MemoryAccess *renameBlock(BasicBlock *, MemoryAccess *, bool);
void renameSuccessorPhis(BasicBlock *, MemoryAccess *, bool);
void renamePass(DomTreeNode *, MemoryAccess *IncomingVal,
SmallPtrSetImpl<BasicBlock *> &Visited,
bool SkipVisited = false, bool RenameAllUses = false);
AccessList *getOrCreateAccessList(const BasicBlock *);
DefsList *getOrCreateDefsList(const BasicBlock *);
void renumberBlock(const BasicBlock *) const;
AliasAnalysis *AA = nullptr;
DominatorTree *DT;
Function &F;
// Memory SSA mappings
DenseMap<const Value *, MemoryAccess *> ValueToMemoryAccess;
// These two mappings contain the main block to access/def mappings for
// MemorySSA. The list contained in PerBlockAccesses really owns all the
// MemoryAccesses.
// Both maps maintain the invariant that if a block is found in them, the
// corresponding list is not empty, and if a block is not found in them, the
// corresponding list is empty.
AccessMap PerBlockAccesses;
DefsMap PerBlockDefs;
std::unique_ptr<MemoryAccess, ValueDeleter> LiveOnEntryDef;
// Domination mappings
// Note that the numbering is local to a block, even though the map is
// global.
mutable SmallPtrSet<const BasicBlock *, 16> BlockNumberingValid;
mutable DenseMap<const MemoryAccess *, unsigned long> BlockNumbering;
// Memory SSA building info
std::unique_ptr<ClobberWalkerBase> WalkerBase;
std::unique_ptr<CachingWalker> Walker;
std::unique_ptr<SkipSelfWalker> SkipWalker;
unsigned NextID = 0;
bool IsOptimized = false;
};
/// Enables verification of MemorySSA.
///
/// The checks which this flag enables is exensive and disabled by default
/// unless `EXPENSIVE_CHECKS` is defined. The flag `-verify-memoryssa` can be
/// used to selectively enable the verification without re-compilation.
extern bool VerifyMemorySSA;
// Internal MemorySSA utils, for use by MemorySSA classes and walkers
class MemorySSAUtil {
protected:
friend class GVNHoist;
friend class MemorySSAWalker;
// This function should not be used by new passes.
static bool defClobbersUseOrDef(MemoryDef *MD, const MemoryUseOrDef *MU,
AliasAnalysis &AA);
};
/// An analysis that produces \c MemorySSA for a function.
///
class MemorySSAAnalysis : public AnalysisInfoMixin<MemorySSAAnalysis> {
friend AnalysisInfoMixin<MemorySSAAnalysis>;
static AnalysisKey Key;
public:
// Wrap MemorySSA result to ensure address stability of internal MemorySSA
// pointers after construction. Use a wrapper class instead of plain
// unique_ptr<MemorySSA> to avoid build breakage on MSVC.
struct Result {
Result(std::unique_ptr<MemorySSA> &&MSSA) : MSSA(std::move(MSSA)) {}
MemorySSA &getMSSA() { return *MSSA.get(); }
std::unique_ptr<MemorySSA> MSSA;
bool invalidate(Function &F, const PreservedAnalyses &PA,
FunctionAnalysisManager::Invalidator &Inv);
};
Result run(Function &F, FunctionAnalysisManager &AM);
};
/// Printer pass for \c MemorySSA.
class MemorySSAPrinterPass : public PassInfoMixin<MemorySSAPrinterPass> {
raw_ostream &OS;
bool EnsureOptimizedUses;
public:
explicit MemorySSAPrinterPass(raw_ostream &OS, bool EnsureOptimizedUses)
: OS(OS), EnsureOptimizedUses(EnsureOptimizedUses) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
/// Printer pass for \c MemorySSA via the walker.
class MemorySSAWalkerPrinterPass
: public PassInfoMixin<MemorySSAWalkerPrinterPass> {
raw_ostream &OS;
public:
explicit MemorySSAWalkerPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
/// Verifier pass for \c MemorySSA.
struct MemorySSAVerifierPass : PassInfoMixin<MemorySSAVerifierPass> {
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
/// Legacy analysis pass which computes \c MemorySSA.
class MemorySSAWrapperPass : public FunctionPass {
public:
MemorySSAWrapperPass();
static char ID;
bool runOnFunction(Function &) override;
void releaseMemory() override;
MemorySSA &getMSSA() { return *MSSA; }
const MemorySSA &getMSSA() const { return *MSSA; }
void getAnalysisUsage(AnalysisUsage &AU) const override;
void verifyAnalysis() const override;
void print(raw_ostream &OS, const Module *M = nullptr) const override;
private:
std::unique_ptr<MemorySSA> MSSA;
};
/// This is the generic walker interface for walkers of MemorySSA.
/// Walkers are used to be able to further disambiguate the def-use chains
/// MemorySSA gives you, or otherwise produce better info than MemorySSA gives
/// you.
/// In particular, while the def-use chains provide basic information, and are
/// guaranteed to give, for example, the nearest may-aliasing MemoryDef for a
/// MemoryUse as AliasAnalysis considers it, a user mant want better or other
/// information. In particular, they may want to use SCEV info to further
/// disambiguate memory accesses, or they may want the nearest dominating
/// may-aliasing MemoryDef for a call or a store. This API enables a
/// standardized interface to getting and using that info.
class MemorySSAWalker {
public:
MemorySSAWalker(MemorySSA *);
virtual ~MemorySSAWalker() = default;
using MemoryAccessSet = SmallVector<MemoryAccess *, 8>;
/// Given a memory Mod/Ref/ModRef'ing instruction, calling this
/// will give you the nearest dominating MemoryAccess that Mod's the location
/// the instruction accesses (by skipping any def which AA can prove does not
/// alias the location(s) accessed by the instruction given).
///
/// Note that this will return a single access, and it must dominate the
/// Instruction, so if an operand of a MemoryPhi node Mod's the instruction,
/// this will return the MemoryPhi, not the operand. This means that
/// given:
/// if (a) {
/// 1 = MemoryDef(liveOnEntry)
/// store %a
/// } else {
/// 2 = MemoryDef(liveOnEntry)
/// store %b
/// }
/// 3 = MemoryPhi(2, 1)
/// MemoryUse(3)
/// load %a
///
/// calling this API on load(%a) will return the MemoryPhi, not the MemoryDef
/// in the if (a) branch.
MemoryAccess *getClobberingMemoryAccess(const Instruction *I,
BatchAAResults &AA) {
MemoryAccess *MA = MSSA->getMemoryAccess(I);
assert(MA && "Handed an instruction that MemorySSA doesn't recognize?");
return getClobberingMemoryAccess(MA, AA);
}
/// Does the same thing as getClobberingMemoryAccess(const Instruction *I),
/// but takes a MemoryAccess instead of an Instruction.
virtual MemoryAccess *getClobberingMemoryAccess(MemoryAccess *,
BatchAAResults &AA) = 0;
/// Given a potentially clobbering memory access and a new location,
/// calling this will give you the nearest dominating clobbering MemoryAccess
/// (by skipping non-aliasing def links).
///
/// This version of the function is mainly used to disambiguate phi translated
/// pointers, where the value of a pointer may have changed from the initial
/// memory access. Note that this expects to be handed either a MemoryUse,
/// or an already potentially clobbering access. Unlike the above API, if
/// given a MemoryDef that clobbers the pointer as the starting access, it
/// will return that MemoryDef, whereas the above would return the clobber
/// starting from the use side of the memory def.
virtual MemoryAccess *getClobberingMemoryAccess(MemoryAccess *,
const MemoryLocation &,
BatchAAResults &AA) = 0;
MemoryAccess *getClobberingMemoryAccess(const Instruction *I) {
BatchAAResults BAA(MSSA->getAA());
return getClobberingMemoryAccess(I, BAA);
}
MemoryAccess *getClobberingMemoryAccess(MemoryAccess *MA) {
BatchAAResults BAA(MSSA->getAA());
return getClobberingMemoryAccess(MA, BAA);
}
MemoryAccess *getClobberingMemoryAccess(MemoryAccess *MA,
const MemoryLocation &Loc) {
BatchAAResults BAA(MSSA->getAA());
return getClobberingMemoryAccess(MA, Loc, BAA);
}
/// Given a memory access, invalidate anything this walker knows about
/// that access.
/// This API is used by walkers that store information to perform basic cache
/// invalidation. This will be called by MemorySSA at appropriate times for
/// the walker it uses or returns.
virtual void invalidateInfo(MemoryAccess *) {}
protected:
friend class MemorySSA; // For updating MSSA pointer in MemorySSA move
// constructor.
MemorySSA *MSSA;
};
/// A MemorySSAWalker that does no alias queries, or anything else. It
/// simply returns the links as they were constructed by the builder.
class DoNothingMemorySSAWalker final : public MemorySSAWalker {
public:
// Keep the overrides below from hiding the Instruction overload of
// getClobberingMemoryAccess.
using MemorySSAWalker::getClobberingMemoryAccess;
MemoryAccess *getClobberingMemoryAccess(MemoryAccess *,
BatchAAResults &) override;
MemoryAccess *getClobberingMemoryAccess(MemoryAccess *,
const MemoryLocation &,
BatchAAResults &) override;
};
using MemoryAccessPair = std::pair<MemoryAccess *, MemoryLocation>;
using ConstMemoryAccessPair = std::pair<const MemoryAccess *, MemoryLocation>;
/// Iterator base class used to implement const and non-const iterators
/// over the defining accesses of a MemoryAccess.
template <class T>
class memoryaccess_def_iterator_base
: public iterator_facade_base<memoryaccess_def_iterator_base<T>,
std::forward_iterator_tag, T, ptrdiff_t, T *,
T *> {
using BaseT = typename memoryaccess_def_iterator_base::iterator_facade_base;
public:
memoryaccess_def_iterator_base(T *Start) : Access(Start) {}
memoryaccess_def_iterator_base() = default;
bool operator==(const memoryaccess_def_iterator_base &Other) const {
return Access == Other.Access && (!Access || ArgNo == Other.ArgNo);
}
// This is a bit ugly, but for MemoryPHI's, unlike PHINodes, you can't get the
// block from the operand in constant time (In a PHINode, the uselist has
// both, so it's just subtraction). We provide it as part of the
// iterator to avoid callers having to linear walk to get the block.
// If the operation becomes constant time on MemoryPHI's, this bit of
// abstraction breaking should be removed.
BasicBlock *getPhiArgBlock() const {
MemoryPhi *MP = dyn_cast<MemoryPhi>(Access);
assert(MP && "Tried to get phi arg block when not iterating over a PHI");
return MP->getIncomingBlock(ArgNo);
}
typename std::iterator_traits<BaseT>::pointer operator*() const {
assert(Access && "Tried to access past the end of our iterator");
// Go to the first argument for phis, and the defining access for everything
// else.
if (const MemoryPhi *MP = dyn_cast<MemoryPhi>(Access))
return MP->getIncomingValue(ArgNo);
return cast<MemoryUseOrDef>(Access)->getDefiningAccess();
}
using BaseT::operator++;
memoryaccess_def_iterator_base &operator++() {
assert(Access && "Hit end of iterator");
if (const MemoryPhi *MP = dyn_cast<MemoryPhi>(Access)) {
if (++ArgNo >= MP->getNumIncomingValues()) {
ArgNo = 0;
Access = nullptr;
}
} else {
Access = nullptr;
}
return *this;
}
private:
T *Access = nullptr;
unsigned ArgNo = 0;
};
inline memoryaccess_def_iterator MemoryAccess::defs_begin() {
return memoryaccess_def_iterator(this);
}
inline const_memoryaccess_def_iterator MemoryAccess::defs_begin() const {
return const_memoryaccess_def_iterator(this);
}
inline memoryaccess_def_iterator MemoryAccess::defs_end() {
return memoryaccess_def_iterator();
}
inline const_memoryaccess_def_iterator MemoryAccess::defs_end() const {
return const_memoryaccess_def_iterator();
}
/// GraphTraits for a MemoryAccess, which walks defs in the normal case,
/// and uses in the inverse case.
template <> struct GraphTraits<MemoryAccess *> {
using NodeRef = MemoryAccess *;
using ChildIteratorType = memoryaccess_def_iterator;
static NodeRef getEntryNode(NodeRef N) { return N; }
static ChildIteratorType child_begin(NodeRef N) { return N->defs_begin(); }
static ChildIteratorType child_end(NodeRef N) { return N->defs_end(); }
};
template <> struct GraphTraits<Inverse<MemoryAccess *>> {
using NodeRef = MemoryAccess *;
using ChildIteratorType = MemoryAccess::iterator;
static NodeRef getEntryNode(NodeRef N) { return N; }
static ChildIteratorType child_begin(NodeRef N) { return N->user_begin(); }
static ChildIteratorType child_end(NodeRef N) { return N->user_end(); }
};
/// Provide an iterator that walks defs, giving both the memory access,
/// and the current pointer location, updating the pointer location as it
/// changes due to phi node translation.
///
/// This iterator, while somewhat specialized, is what most clients actually
/// want when walking upwards through MemorySSA def chains. It takes a pair of
/// <MemoryAccess,MemoryLocation>, and walks defs, properly translating the
/// memory location through phi nodes for the user.
class upward_defs_iterator
: public iterator_facade_base<upward_defs_iterator,
std::forward_iterator_tag,
const MemoryAccessPair> {
using BaseT = upward_defs_iterator::iterator_facade_base;
public:
upward_defs_iterator(const MemoryAccessPair &Info, DominatorTree *DT)
: DefIterator(Info.first), Location(Info.second),
OriginalAccess(Info.first), DT(DT) {
CurrentPair.first = nullptr;
WalkingPhi = Info.first && isa<MemoryPhi>(Info.first);
fillInCurrentPair();
}
upward_defs_iterator() { CurrentPair.first = nullptr; }
bool operator==(const upward_defs_iterator &Other) const {
return DefIterator == Other.DefIterator;
}
typename std::iterator_traits<BaseT>::reference operator*() const {
assert(DefIterator != OriginalAccess->defs_end() &&
"Tried to access past the end of our iterator");
return CurrentPair;
}
using BaseT::operator++;
upward_defs_iterator &operator++() {
assert(DefIterator != OriginalAccess->defs_end() &&
"Tried to access past the end of the iterator");
++DefIterator;
if (DefIterator != OriginalAccess->defs_end())
fillInCurrentPair();
return *this;
}
BasicBlock *getPhiArgBlock() const { return DefIterator.getPhiArgBlock(); }
private:
/// Returns true if \p Ptr is guaranteed to be loop invariant for any possible
/// loop. In particular, this guarantees that it only references a single
/// MemoryLocation during execution of the containing function.
bool IsGuaranteedLoopInvariant(const Value *Ptr) const;
void fillInCurrentPair() {
CurrentPair.first = *DefIterator;
CurrentPair.second = Location;
if (WalkingPhi && Location.Ptr) {
PHITransAddr Translator(
const_cast<Value *>(Location.Ptr),
OriginalAccess->getBlock()->getModule()->getDataLayout(), nullptr);
if (Value *Addr =
Translator.translateValue(OriginalAccess->getBlock(),
DefIterator.getPhiArgBlock(), DT, true))
if (Addr != CurrentPair.second.Ptr)
CurrentPair.second = CurrentPair.second.getWithNewPtr(Addr);
// Mark size as unknown, if the location is not guaranteed to be
// loop-invariant for any possible loop in the function. Setting the size
// to unknown guarantees that any memory accesses that access locations
// after the pointer are considered as clobbers, which is important to
// catch loop carried dependences.
if (!IsGuaranteedLoopInvariant(CurrentPair.second.Ptr))
CurrentPair.second = CurrentPair.second.getWithNewSize(
LocationSize::beforeOrAfterPointer());
}
}
MemoryAccessPair CurrentPair;
memoryaccess_def_iterator DefIterator;
MemoryLocation Location;
MemoryAccess *OriginalAccess = nullptr;
DominatorTree *DT = nullptr;
bool WalkingPhi = false;
};
inline upward_defs_iterator
upward_defs_begin(const MemoryAccessPair &Pair, DominatorTree &DT) {
return upward_defs_iterator(Pair, &DT);
}
inline upward_defs_iterator upward_defs_end() { return upward_defs_iterator(); }
inline iterator_range<upward_defs_iterator>
upward_defs(const MemoryAccessPair &Pair, DominatorTree &DT) {
return make_range(upward_defs_begin(Pair, DT), upward_defs_end());
}
/// Walks the defining accesses of MemoryDefs. Stops after we hit something that
/// has no defining use (e.g. a MemoryPhi or liveOnEntry). Note that, when
/// comparing against a null def_chain_iterator, this will compare equal only
/// after walking said Phi/liveOnEntry.
///
/// The UseOptimizedChain flag specifies whether to walk the clobbering
/// access chain, or all the accesses.
///
/// Normally, MemoryDef are all just def/use linked together, so a def_chain on
/// a MemoryDef will walk all MemoryDefs above it in the program until it hits
/// a phi node. The optimized chain walks the clobbering access of a store.
/// So if you are just trying to find, given a store, what the next
/// thing that would clobber the same memory is, you want the optimized chain.
template <class T, bool UseOptimizedChain = false>
struct def_chain_iterator
: public iterator_facade_base<def_chain_iterator<T, UseOptimizedChain>,
std::forward_iterator_tag, MemoryAccess *> {
def_chain_iterator() : MA(nullptr) {}
def_chain_iterator(T MA) : MA(MA) {}
T operator*() const { return MA; }
def_chain_iterator &operator++() {
// N.B. liveOnEntry has a null defining access.
if (auto *MUD = dyn_cast<MemoryUseOrDef>(MA)) {
if (UseOptimizedChain && MUD->isOptimized())
MA = MUD->getOptimized();
else
MA = MUD->getDefiningAccess();
} else {
MA = nullptr;
}
return *this;
}
bool operator==(const def_chain_iterator &O) const { return MA == O.MA; }
private:
T MA;
};
template <class T>
inline iterator_range<def_chain_iterator<T>>
def_chain(T MA, MemoryAccess *UpTo = nullptr) {
#ifdef EXPENSIVE_CHECKS
assert((!UpTo || find(def_chain(MA), UpTo) != def_chain_iterator<T>()) &&
"UpTo isn't in the def chain!");
#endif
return make_range(def_chain_iterator<T>(MA), def_chain_iterator<T>(UpTo));
}
template <class T>
inline iterator_range<def_chain_iterator<T, true>> optimized_def_chain(T MA) {
return make_range(def_chain_iterator<T, true>(MA),
def_chain_iterator<T, true>(nullptr));
}
} // end namespace llvm
#endif // LLVM_ANALYSIS_MEMORYSSA_H
PK iwFZ���I I ! Analysis/AliasAnalysisEvaluator.hnu �[��� //===- AliasAnalysisEvaluator.h - Alias Analysis Accuracy Evaluator -------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
///
/// This file implements a simple N^2 alias analysis accuracy evaluator. The
/// analysis result is a set of statistics of how many times the AA
/// infrastructure provides each kind of alias result and mod/ref result when
/// queried with all pairs of pointers in the function.
///
/// It can be used to evaluate a change in an alias analysis implementation,
/// algorithm, or the AA pipeline infrastructure itself. It acts like a stable
/// and easily tested consumer of all AA information exposed.
///
/// This is inspired and adapted from code by: Naveen Neelakantam, Francesco
/// Spadini, and Wojciech Stryjewski.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_ALIASANALYSISEVALUATOR_H
#define LLVM_ANALYSIS_ALIASANALYSISEVALUATOR_H
#include "llvm/IR/PassManager.h"
namespace llvm {
class AAResults;
class Function;
class FunctionPass;
class AAEvaluator : public PassInfoMixin<AAEvaluator> {
int64_t FunctionCount = 0;
int64_t NoAliasCount = 0, MayAliasCount = 0, PartialAliasCount = 0;
int64_t MustAliasCount = 0;
int64_t NoModRefCount = 0, ModCount = 0, RefCount = 0, ModRefCount = 0;
public:
AAEvaluator() = default;
AAEvaluator(AAEvaluator &&Arg)
: FunctionCount(Arg.FunctionCount), NoAliasCount(Arg.NoAliasCount),
MayAliasCount(Arg.MayAliasCount),
PartialAliasCount(Arg.PartialAliasCount),
MustAliasCount(Arg.MustAliasCount), NoModRefCount(Arg.NoModRefCount),
ModCount(Arg.ModCount), RefCount(Arg.RefCount),
ModRefCount(Arg.ModRefCount) {
Arg.FunctionCount = 0;
}
~AAEvaluator();
/// Run the pass over the function.
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
private:
// Allow the legacy pass to run this using an internal API.
friend class AAEvalLegacyPass;
void runInternal(Function &F, AAResults &AA);
};
/// Create a wrapper of the above for the legacy pass manager.
FunctionPass *createAAEvalPass();
}
#endif
PK iwFZ&َ��9 �9 Analysis/ValueLattice.hnu �[��� //===- ValueLattice.h - Value constraint analysis ---------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_VALUELATTICE_H
#define LLVM_ANALYSIS_VALUELATTICE_H
#include "llvm/IR/Constants.h"
#include "llvm/IR/ConstantRange.h"
#include "llvm/IR/Instructions.h"
//===----------------------------------------------------------------------===//
// ValueLatticeElement
//===----------------------------------------------------------------------===//
namespace llvm {
class Constant;
/// This class represents lattice values for constants.
///
/// FIXME: This is basically just for bringup, this can be made a lot more rich
/// in the future.
///
class ValueLatticeElement {
enum ValueLatticeElementTy {
/// This Value has no known value yet. As a result, this implies the
/// producing instruction is dead. Caution: We use this as the starting
/// state in our local meet rules. In this usage, it's taken to mean
/// "nothing known yet".
/// Transition to any other state allowed.
unknown,
/// This Value is an UndefValue constant or produces undef. Undefined values
/// can be merged with constants (or single element constant ranges),
/// assuming all uses of the result will be replaced.
/// Transition allowed to the following states:
/// constant
/// constantrange_including_undef
/// overdefined
undef,
/// This Value has a specific constant value. The constant cannot be undef.
/// (For constant integers, constantrange is used instead. Integer typed
/// constantexprs can appear as constant.) Note that the constant state
/// can be reached by merging undef & constant states.
/// Transition allowed to the following states:
/// overdefined
constant,
/// This Value is known to not have the specified value. (For constant
/// integers, constantrange is used instead. As above, integer typed
/// constantexprs can appear here.)
/// Transition allowed to the following states:
/// overdefined
notconstant,
/// The Value falls within this range. (Used only for integer typed values.)
/// Transition allowed to the following states:
/// constantrange (new range must be a superset of the existing range)
/// constantrange_including_undef
/// overdefined
constantrange,
/// This Value falls within this range, but also may be undef.
/// Merging it with other constant ranges results in
/// constantrange_including_undef.
/// Transition allowed to the following states:
/// overdefined
constantrange_including_undef,
/// We can not precisely model the dynamic values this value might take.
/// No transitions are allowed after reaching overdefined.
overdefined,
};
ValueLatticeElementTy Tag : 8;
/// Number of times a constant range has been extended with widening enabled.
unsigned NumRangeExtensions : 8;
/// The union either stores a pointer to a constant or a constant range,
/// associated to the lattice element. We have to ensure that Range is
/// initialized or destroyed when changing state to or from constantrange.
union {
Constant *ConstVal;
ConstantRange Range;
};
/// Destroy contents of lattice value, without destructing the object.
void destroy() {
switch (Tag) {
case overdefined:
case unknown:
case undef:
case constant:
case notconstant:
break;
case constantrange_including_undef:
case constantrange:
Range.~ConstantRange();
break;
};
}
public:
/// Struct to control some aspects related to merging constant ranges.
struct MergeOptions {
/// The merge value may include undef.
bool MayIncludeUndef;
/// Handle repeatedly extending a range by going to overdefined after a
/// number of steps.
bool CheckWiden;
/// The number of allowed widening steps (including setting the range
/// initially).
unsigned MaxWidenSteps;
MergeOptions() : MergeOptions(false, false) {}
MergeOptions(bool MayIncludeUndef, bool CheckWiden,
unsigned MaxWidenSteps = 1)
: MayIncludeUndef(MayIncludeUndef), CheckWiden(CheckWiden),
MaxWidenSteps(MaxWidenSteps) {}
MergeOptions &setMayIncludeUndef(bool V = true) {
MayIncludeUndef = V;
return *this;
}
MergeOptions &setCheckWiden(bool V = true) {
CheckWiden = V;
return *this;
}
MergeOptions &setMaxWidenSteps(unsigned Steps = 1) {
CheckWiden = true;
MaxWidenSteps = Steps;
return *this;
}
};
// ConstVal and Range are initialized on-demand.
ValueLatticeElement() : Tag(unknown), NumRangeExtensions(0) {}
~ValueLatticeElement() { destroy(); }
ValueLatticeElement(const ValueLatticeElement &Other)
: Tag(Other.Tag), NumRangeExtensions(0) {
switch (Other.Tag) {
case constantrange:
case constantrange_including_undef:
new (&Range) ConstantRange(Other.Range);
NumRangeExtensions = Other.NumRangeExtensions;
break;
case constant:
case notconstant:
ConstVal = Other.ConstVal;
break;
case overdefined:
case unknown:
case undef:
break;
}
}
ValueLatticeElement(ValueLatticeElement &&Other)
: Tag(Other.Tag), NumRangeExtensions(0) {
switch (Other.Tag) {
case constantrange:
case constantrange_including_undef:
new (&Range) ConstantRange(std::move(Other.Range));
NumRangeExtensions = Other.NumRangeExtensions;
break;
case constant:
case notconstant:
ConstVal = Other.ConstVal;
break;
case overdefined:
case unknown:
case undef:
break;
}
Other.Tag = unknown;
}
ValueLatticeElement &operator=(const ValueLatticeElement &Other) {
destroy();
new (this) ValueLatticeElement(Other);
return *this;
}
ValueLatticeElement &operator=(ValueLatticeElement &&Other) {
destroy();
new (this) ValueLatticeElement(std::move(Other));
return *this;
}
static ValueLatticeElement get(Constant *C) {
ValueLatticeElement Res;
if (isa<UndefValue>(C))
Res.markUndef();
else
Res.markConstant(C);
return Res;
}
static ValueLatticeElement getNot(Constant *C) {
ValueLatticeElement Res;
assert(!isa<UndefValue>(C) && "!= undef is not supported");
Res.markNotConstant(C);
return Res;
}
static ValueLatticeElement getRange(ConstantRange CR,
bool MayIncludeUndef = false) {
if (CR.isFullSet())
return getOverdefined();
if (CR.isEmptySet()) {
ValueLatticeElement Res;
if (MayIncludeUndef)
Res.markUndef();
return Res;
}
ValueLatticeElement Res;
Res.markConstantRange(std::move(CR),
MergeOptions().setMayIncludeUndef(MayIncludeUndef));
return Res;
}
static ValueLatticeElement getOverdefined() {
ValueLatticeElement Res;
Res.markOverdefined();
return Res;
}
bool isUndef() const { return Tag == undef; }
bool isUnknown() const { return Tag == unknown; }
bool isUnknownOrUndef() const { return Tag == unknown || Tag == undef; }
bool isConstant() const { return Tag == constant; }
bool isNotConstant() const { return Tag == notconstant; }
bool isConstantRangeIncludingUndef() const {
return Tag == constantrange_including_undef;
}
/// Returns true if this value is a constant range. Use \p UndefAllowed to
/// exclude non-singleton constant ranges that may also be undef. Note that
/// this function also returns true if the range may include undef, but only
/// contains a single element. In that case, it can be replaced by a constant.
bool isConstantRange(bool UndefAllowed = true) const {
return Tag == constantrange || (Tag == constantrange_including_undef &&
(UndefAllowed || Range.isSingleElement()));
}
bool isOverdefined() const { return Tag == overdefined; }
Constant *getConstant() const {
assert(isConstant() && "Cannot get the constant of a non-constant!");
return ConstVal;
}
Constant *getNotConstant() const {
assert(isNotConstant() && "Cannot get the constant of a non-notconstant!");
return ConstVal;
}
/// Returns the constant range for this value. Use \p UndefAllowed to exclude
/// non-singleton constant ranges that may also be undef. Note that this
/// function also returns a range if the range may include undef, but only
/// contains a single element. In that case, it can be replaced by a constant.
const ConstantRange &getConstantRange(bool UndefAllowed = true) const {
assert(isConstantRange(UndefAllowed) &&
"Cannot get the constant-range of a non-constant-range!");
return Range;
}
std::optional<APInt> asConstantInteger() const {
if (isConstant() && isa<ConstantInt>(getConstant())) {
return cast<ConstantInt>(getConstant())->getValue();
} else if (isConstantRange() && getConstantRange().isSingleElement()) {
return *getConstantRange().getSingleElement();
}
return std::nullopt;
}
bool markOverdefined() {
if (isOverdefined())
return false;
destroy();
Tag = overdefined;
return true;
}
bool markUndef() {
if (isUndef())
return false;
assert(isUnknown());
Tag = undef;
return true;
}
bool markConstant(Constant *V, bool MayIncludeUndef = false) {
if (isa<UndefValue>(V))
return markUndef();
if (isConstant()) {
assert(getConstant() == V && "Marking constant with different value");
return false;
}
if (ConstantInt *CI = dyn_cast<ConstantInt>(V))
return markConstantRange(
ConstantRange(CI->getValue()),
MergeOptions().setMayIncludeUndef(MayIncludeUndef));
assert(isUnknown() || isUndef());
Tag = constant;
ConstVal = V;
return true;
}
bool markNotConstant(Constant *V) {
assert(V && "Marking constant with NULL");
if (ConstantInt *CI = dyn_cast<ConstantInt>(V))
return markConstantRange(
ConstantRange(CI->getValue() + 1, CI->getValue()));
if (isa<UndefValue>(V))
return false;
if (isNotConstant()) {
assert(getNotConstant() == V && "Marking !constant with different value");
return false;
}
assert(isUnknown());
Tag = notconstant;
ConstVal = V;
return true;
}
/// Mark the object as constant range with \p NewR. If the object is already a
/// constant range, nothing changes if the existing range is equal to \p
/// NewR and the tag. Otherwise \p NewR must be a superset of the existing
/// range or the object must be undef. The tag is set to
/// constant_range_including_undef if either the existing value or the new
/// range may include undef.
bool markConstantRange(ConstantRange NewR,
MergeOptions Opts = MergeOptions()) {
assert(!NewR.isEmptySet() && "should only be called for non-empty sets");
if (NewR.isFullSet())
return markOverdefined();
ValueLatticeElementTy OldTag = Tag;
ValueLatticeElementTy NewTag =
(isUndef() || isConstantRangeIncludingUndef() || Opts.MayIncludeUndef)
? constantrange_including_undef
: constantrange;
if (isConstantRange()) {
Tag = NewTag;
if (getConstantRange() == NewR)
return Tag != OldTag;
// Simple form of widening. If a range is extended multiple times, go to
// overdefined.
if (Opts.CheckWiden && ++NumRangeExtensions > Opts.MaxWidenSteps)
return markOverdefined();
assert(NewR.contains(getConstantRange()) &&
"Existing range must be a subset of NewR");
Range = std::move(NewR);
return true;
}
assert(isUnknown() || isUndef());
NumRangeExtensions = 0;
Tag = NewTag;
new (&Range) ConstantRange(std::move(NewR));
return true;
}
/// Updates this object to approximate both this object and RHS. Returns
/// true if this object has been changed.
bool mergeIn(const ValueLatticeElement &RHS,
MergeOptions Opts = MergeOptions()) {
if (RHS.isUnknown() || isOverdefined())
return false;
if (RHS.isOverdefined()) {
markOverdefined();
return true;
}
if (isUndef()) {
assert(!RHS.isUnknown());
if (RHS.isUndef())
return false;
if (RHS.isConstant())
return markConstant(RHS.getConstant(), true);
if (RHS.isConstantRange())
return markConstantRange(RHS.getConstantRange(true),
Opts.setMayIncludeUndef());
return markOverdefined();
}
if (isUnknown()) {
assert(!RHS.isUnknown() && "Unknow RHS should be handled earlier");
*this = RHS;
return true;
}
if (isConstant()) {
if (RHS.isConstant() && getConstant() == RHS.getConstant())
return false;
if (RHS.isUndef())
return false;
markOverdefined();
return true;
}
if (isNotConstant()) {
if (RHS.isNotConstant() && getNotConstant() == RHS.getNotConstant())
return false;
markOverdefined();
return true;
}
auto OldTag = Tag;
assert(isConstantRange() && "New ValueLattice type?");
if (RHS.isUndef()) {
Tag = constantrange_including_undef;
return OldTag != Tag;
}
if (!RHS.isConstantRange()) {
// We can get here if we've encountered a constantexpr of integer type
// and merge it with a constantrange.
markOverdefined();
return true;
}
ConstantRange NewR = getConstantRange().unionWith(RHS.getConstantRange());
return markConstantRange(
std::move(NewR),
Opts.setMayIncludeUndef(RHS.isConstantRangeIncludingUndef()));
}
// Compares this symbolic value with Other using Pred and returns either
/// true, false or undef constants, or nullptr if the comparison cannot be
/// evaluated.
Constant *getCompare(CmpInst::Predicate Pred, Type *Ty,
const ValueLatticeElement &Other,
const DataLayout &DL) const;
unsigned getNumRangeExtensions() const { return NumRangeExtensions; }
void setNumRangeExtensions(unsigned N) { NumRangeExtensions = N; }
};
static_assert(sizeof(ValueLatticeElement) <= 40,
"size of ValueLatticeElement changed unexpectedly");
raw_ostream &operator<<(raw_ostream &OS, const ValueLatticeElement &Val);
} // end namespace llvm
#endif
PK iwFZ�h�S76 76 Analysis/AliasSetTracker.hnu �[��� //===- llvm/Analysis/AliasSetTracker.h - Build Alias Sets -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines two classes: AliasSetTracker and AliasSet. These interfaces
// are used to classify a collection of pointer references into a maximal number
// of disjoint sets. Each AliasSet object constructed by the AliasSetTracker
// object refers to memory disjoint from the other sets.
//
// An AliasSetTracker can only be used on immutable IR.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_ALIASSETTRACKER_H
#define LLVM_ANALYSIS_ALIASSETTRACKER_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/ADT/ilist.h"
#include "llvm/ADT/ilist_node.h"
#include "llvm/Analysis/MemoryLocation.h"
#include "llvm/IR/Instruction.h"
#include "llvm/IR/PassManager.h"
#include "llvm/IR/ValueHandle.h"
#include <cassert>
#include <cstddef>
#include <iterator>
#include <vector>
namespace llvm {
class AliasResult;
class AliasSetTracker;
class AnyMemSetInst;
class AnyMemTransferInst;
class BasicBlock;
class BatchAAResults;
class LoadInst;
enum class ModRefInfo : uint8_t;
class raw_ostream;
class StoreInst;
class VAArgInst;
class Value;
class AliasSet : public ilist_node<AliasSet> {
friend class AliasSetTracker;
class PointerRec {
Value *Val; // The pointer this record corresponds to.
PointerRec **PrevInList = nullptr;
PointerRec *NextInList = nullptr;
AliasSet *AS = nullptr;
LocationSize Size = LocationSize::mapEmpty();
AAMDNodes AAInfo;
// Whether the size for this record has been set at all. This makes no
// guarantees about the size being known.
bool isSizeSet() const { return Size != LocationSize::mapEmpty(); }
public:
PointerRec(Value *V)
: Val(V), AAInfo(DenseMapInfo<AAMDNodes>::getEmptyKey()) {}
Value *getValue() const { return Val; }
PointerRec *getNext() const { return NextInList; }
bool hasAliasSet() const { return AS != nullptr; }
PointerRec** setPrevInList(PointerRec **PIL) {
PrevInList = PIL;
return &NextInList;
}
bool updateSizeAndAAInfo(LocationSize NewSize, const AAMDNodes &NewAAInfo) {
bool SizeChanged = false;
if (NewSize != Size) {
LocationSize OldSize = Size;
Size = isSizeSet() ? Size.unionWith(NewSize) : NewSize;
SizeChanged = OldSize != Size;
}
if (AAInfo == DenseMapInfo<AAMDNodes>::getEmptyKey())
// We don't have a AAInfo yet. Set it to NewAAInfo.
AAInfo = NewAAInfo;
else {
AAMDNodes Intersection(AAInfo.intersect(NewAAInfo));
SizeChanged |= Intersection != AAInfo;
AAInfo = Intersection;
}
return SizeChanged;
}
LocationSize getSize() const {
assert(isSizeSet() && "Getting an unset size!");
return Size;
}
/// Return the AAInfo, or null if there is no information or conflicting
/// information.
AAMDNodes getAAInfo() const {
// If we have missing or conflicting AAInfo, return null.
if (AAInfo == DenseMapInfo<AAMDNodes>::getEmptyKey() ||
AAInfo == DenseMapInfo<AAMDNodes>::getTombstoneKey())
return AAMDNodes();
return AAInfo;
}
AliasSet *getAliasSet(AliasSetTracker &AST) {
assert(AS && "No AliasSet yet!");
if (AS->Forward) {
AliasSet *OldAS = AS;
AS = OldAS->getForwardedTarget(AST);
AS->addRef();
OldAS->dropRef(AST);
}
return AS;
}
void setAliasSet(AliasSet *as) {
assert(!AS && "Already have an alias set!");
AS = as;
}
void eraseFromList() {
if (NextInList) NextInList->PrevInList = PrevInList;
*PrevInList = NextInList;
if (AS->PtrListEnd == &NextInList) {
AS->PtrListEnd = PrevInList;
assert(*AS->PtrListEnd == nullptr && "List not terminated right!");
}
delete this;
}
};
// Doubly linked list of nodes.
PointerRec *PtrList = nullptr;
PointerRec **PtrListEnd;
// Forwarding pointer.
AliasSet *Forward = nullptr;
/// All instructions without a specific address in this alias set.
std::vector<AssertingVH<Instruction>> UnknownInsts;
/// Number of nodes pointing to this AliasSet plus the number of AliasSets
/// forwarding to it.
unsigned RefCount : 27;
// Signifies that this set should be considered to alias any pointer.
// Use when the tracker holding this set is saturated.
unsigned AliasAny : 1;
/// The kinds of access this alias set models.
///
/// We keep track of whether this alias set merely refers to the locations of
/// memory (and not any particular access), whether it modifies or references
/// the memory, or whether it does both. The lattice goes from "NoAccess" to
/// either RefAccess or ModAccess, then to ModRefAccess as necessary.
enum AccessLattice {
NoAccess = 0,
RefAccess = 1,
ModAccess = 2,
ModRefAccess = RefAccess | ModAccess
};
unsigned Access : 2;
/// The kind of alias relationship between pointers of the set.
///
/// These represent conservatively correct alias results between any members
/// of the set. We represent these independently of the values of alias
/// results in order to pack it into a single bit. Lattice goes from
/// MustAlias to MayAlias.
enum AliasLattice {
SetMustAlias = 0, SetMayAlias = 1
};
unsigned Alias : 1;
unsigned SetSize = 0;
void addRef() { ++RefCount; }
void dropRef(AliasSetTracker &AST) {
assert(RefCount >= 1 && "Invalid reference count detected!");
if (--RefCount == 0)
removeFromTracker(AST);
}
public:
AliasSet(const AliasSet &) = delete;
AliasSet &operator=(const AliasSet &) = delete;
/// Accessors...
bool isRef() const { return Access & RefAccess; }
bool isMod() const { return Access & ModAccess; }
bool isMustAlias() const { return Alias == SetMustAlias; }
bool isMayAlias() const { return Alias == SetMayAlias; }
/// Return true if this alias set should be ignored as part of the
/// AliasSetTracker object.
bool isForwardingAliasSet() const { return Forward; }
/// Merge the specified alias set into this alias set.
void mergeSetIn(AliasSet &AS, AliasSetTracker &AST, BatchAAResults &BatchAA);
// Alias Set iteration - Allow access to all of the pointers which are part of
// this alias set.
class iterator;
iterator begin() const { return iterator(PtrList); }
iterator end() const { return iterator(); }
bool empty() const { return PtrList == nullptr; }
// Unfortunately, ilist::size() is linear, so we have to add code to keep
// track of the list's exact size.
unsigned size() { return SetSize; }
void print(raw_ostream &OS) const;
void dump() const;
/// Define an iterator for alias sets... this is just a forward iterator.
class iterator {
PointerRec *CurNode;
public:
using iterator_category = std::forward_iterator_tag;
using value_type = PointerRec;
using difference_type = std::ptrdiff_t;
using pointer = value_type *;
using reference = value_type &;
explicit iterator(PointerRec *CN = nullptr) : CurNode(CN) {}
bool operator==(const iterator& x) const {
return CurNode == x.CurNode;
}
bool operator!=(const iterator& x) const { return !operator==(x); }
value_type &operator*() const {
assert(CurNode && "Dereferencing AliasSet.end()!");
return *CurNode;
}
value_type *operator->() const { return &operator*(); }
Value *getPointer() const { return CurNode->getValue(); }
LocationSize getSize() const { return CurNode->getSize(); }
AAMDNodes getAAInfo() const { return CurNode->getAAInfo(); }
iterator& operator++() { // Preincrement
assert(CurNode && "Advancing past AliasSet.end()!");
CurNode = CurNode->getNext();
return *this;
}
iterator operator++(int) { // Postincrement
iterator tmp = *this; ++*this; return tmp;
}
};
private:
// Can only be created by AliasSetTracker.
AliasSet()
: PtrListEnd(&PtrList), RefCount(0), AliasAny(false), Access(NoAccess),
Alias(SetMustAlias) {}
PointerRec *getSomePointer() const {
return PtrList;
}
/// Return the real alias set this represents. If this has been merged with
/// another set and is forwarding, return the ultimate destination set. This
/// also implements the union-find collapsing as well.
AliasSet *getForwardedTarget(AliasSetTracker &AST) {
if (!Forward) return this;
AliasSet *Dest = Forward->getForwardedTarget(AST);
if (Dest != Forward) {
Dest->addRef();
Forward->dropRef(AST);
Forward = Dest;
}
return Dest;
}
void removeFromTracker(AliasSetTracker &AST);
void addPointer(AliasSetTracker &AST, PointerRec &Entry, LocationSize Size,
const AAMDNodes &AAInfo, bool KnownMustAlias = false,
bool SkipSizeUpdate = false);
void addUnknownInst(Instruction *I, BatchAAResults &AA);
public:
/// If the specified pointer "may" (or must) alias one of the members in the
/// set return the appropriate AliasResult. Otherwise return NoAlias.
AliasResult aliasesPointer(const Value *Ptr, LocationSize Size,
const AAMDNodes &AAInfo, BatchAAResults &AA) const;
ModRefInfo aliasesUnknownInst(const Instruction *Inst,
BatchAAResults &AA) const;
};
inline raw_ostream& operator<<(raw_ostream &OS, const AliasSet &AS) {
AS.print(OS);
return OS;
}
class AliasSetTracker {
BatchAAResults &AA;
ilist<AliasSet> AliasSets;
using PointerMapType = DenseMap<AssertingVH<Value>, AliasSet::PointerRec *>;
// Map from pointers to their node
PointerMapType PointerMap;
public:
/// Create an empty collection of AliasSets, and use the specified alias
/// analysis object to disambiguate load and store addresses.
explicit AliasSetTracker(BatchAAResults &AA) : AA(AA) {}
~AliasSetTracker() { clear(); }
/// These methods are used to add different types of instructions to the alias
/// sets. Adding a new instruction can result in one of three actions
/// happening:
///
/// 1. If the instruction doesn't alias any other sets, create a new set.
/// 2. If the instruction aliases exactly one set, add it to the set
/// 3. If the instruction aliases multiple sets, merge the sets, and add
/// the instruction to the result.
///
/// These methods return true if inserting the instruction resulted in the
/// addition of a new alias set (i.e., the pointer did not alias anything).
///
void add(Value *Ptr, LocationSize Size, const AAMDNodes &AAInfo); // Add a loc
void add(LoadInst *LI);
void add(StoreInst *SI);
void add(VAArgInst *VAAI);
void add(AnyMemSetInst *MSI);
void add(AnyMemTransferInst *MTI);
void add(Instruction *I); // Dispatch to one of the other add methods...
void add(BasicBlock &BB); // Add all instructions in basic block
void add(const AliasSetTracker &AST); // Add alias relations from another AST
void addUnknown(Instruction *I);
void clear();
/// Return the alias sets that are active.
const ilist<AliasSet> &getAliasSets() const { return AliasSets; }
/// Return the alias set which contains the specified memory location. If
/// the memory location aliases two or more existing alias sets, will have
/// the effect of merging those alias sets before the single resulting alias
/// set is returned.
AliasSet &getAliasSetFor(const MemoryLocation &MemLoc);
/// Return the underlying alias analysis object used by this tracker.
BatchAAResults &getAliasAnalysis() const { return AA; }
using iterator = ilist<AliasSet>::iterator;
using const_iterator = ilist<AliasSet>::const_iterator;
const_iterator begin() const { return AliasSets.begin(); }
const_iterator end() const { return AliasSets.end(); }
iterator begin() { return AliasSets.begin(); }
iterator end() { return AliasSets.end(); }
void print(raw_ostream &OS) const;
void dump() const;
private:
friend class AliasSet;
// The total number of pointers contained in all "may" alias sets.
unsigned TotalMayAliasSetSize = 0;
// A non-null value signifies this AST is saturated. A saturated AST lumps
// all pointers into a single "May" set.
AliasSet *AliasAnyAS = nullptr;
void removeAliasSet(AliasSet *AS);
/// Just like operator[] on the map, except that it creates an entry for the
/// pointer if it doesn't already exist.
AliasSet::PointerRec &getEntryFor(Value *V) {
AliasSet::PointerRec *&Entry = PointerMap[V];
if (!Entry)
Entry = new AliasSet::PointerRec(V);
return *Entry;
}
AliasSet &addPointer(MemoryLocation Loc, AliasSet::AccessLattice E);
AliasSet *mergeAliasSetsForPointer(const Value *Ptr, LocationSize Size,
const AAMDNodes &AAInfo,
bool &MustAliasAll);
/// Merge all alias sets into a single set that is considered to alias any
/// pointer.
AliasSet &mergeAllAliasSets();
AliasSet *findAliasSetForUnknownInst(Instruction *Inst);
};
inline raw_ostream& operator<<(raw_ostream &OS, const AliasSetTracker &AST) {
AST.print(OS);
return OS;
}
class AliasSetsPrinterPass : public PassInfoMixin<AliasSetsPrinterPass> {
raw_ostream &OS;
public:
explicit AliasSetsPrinterPass(raw_ostream &OS);
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
} // end namespace llvm
#endif // LLVM_ANALYSIS_ALIASSETTRACKER_H
PK iwFZ� � Analysis/InstSimplifyFolder.hnu �[��� //===- InstSimplifyFolder.h - InstSimplify folding helper --------*- C++-*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the InstSimplifyFolder class, a helper for IRBuilder.
// It provides IRBuilder with a set of methods for folding operations to
// existing values using InstructionSimplify. At the moment, only a subset of
// the implementation uses InstructionSimplify. The rest of the implementation
// only folds constants.
//
// The folder also applies target-specific constant folding.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_INSTSIMPLIFYFOLDER_H
#define LLVM_ANALYSIS_INSTSIMPLIFYFOLDER_H
#include "llvm/ADT/ArrayRef.h"
#include "llvm/Analysis/InstructionSimplify.h"
#include "llvm/Analysis/TargetFolder.h"
#include "llvm/IR/IRBuilderFolder.h"
#include "llvm/IR/Instruction.h"
namespace llvm {
class Constant;
/// InstSimplifyFolder - Use InstructionSimplify to fold operations to existing
/// values. Also applies target-specific constant folding when not using
/// InstructionSimplify.
class InstSimplifyFolder final : public IRBuilderFolder {
TargetFolder ConstFolder;
SimplifyQuery SQ;
virtual void anchor();
public:
InstSimplifyFolder(const DataLayout &DL) : ConstFolder(DL), SQ(DL) {}
//===--------------------------------------------------------------------===//
// Value-based folders.
//
// Return an existing value or a constant if the operation can be simplified.
// Otherwise return nullptr.
//===--------------------------------------------------------------------===//
Value *FoldBinOp(Instruction::BinaryOps Opc, Value *LHS,
Value *RHS) const override {
return simplifyBinOp(Opc, LHS, RHS, SQ);
}
Value *FoldExactBinOp(Instruction::BinaryOps Opc, Value *LHS, Value *RHS,
bool IsExact) const override {
return simplifyBinOp(Opc, LHS, RHS, SQ);
}
Value *FoldNoWrapBinOp(Instruction::BinaryOps Opc, Value *LHS, Value *RHS,
bool HasNUW, bool HasNSW) const override {
return simplifyBinOp(Opc, LHS, RHS, SQ);
}
Value *FoldBinOpFMF(Instruction::BinaryOps Opc, Value *LHS, Value *RHS,
FastMathFlags FMF) const override {
return simplifyBinOp(Opc, LHS, RHS, FMF, SQ);
}
Value *FoldUnOpFMF(Instruction::UnaryOps Opc, Value *V,
FastMathFlags FMF) const override {
return simplifyUnOp(Opc, V, FMF, SQ);
}
Value *FoldICmp(CmpInst::Predicate P, Value *LHS, Value *RHS) const override {
return simplifyICmpInst(P, LHS, RHS, SQ);
}
Value *FoldGEP(Type *Ty, Value *Ptr, ArrayRef<Value *> IdxList,
bool IsInBounds = false) const override {
return simplifyGEPInst(Ty, Ptr, IdxList, IsInBounds, SQ);
}
Value *FoldSelect(Value *C, Value *True, Value *False) const override {
return simplifySelectInst(C, True, False, SQ);
}
Value *FoldExtractValue(Value *Agg,
ArrayRef<unsigned> IdxList) const override {
return simplifyExtractValueInst(Agg, IdxList, SQ);
};
Value *FoldInsertValue(Value *Agg, Value *Val,
ArrayRef<unsigned> IdxList) const override {
return simplifyInsertValueInst(Agg, Val, IdxList, SQ);
}
Value *FoldExtractElement(Value *Vec, Value *Idx) const override {
return simplifyExtractElementInst(Vec, Idx, SQ);
}
Value *FoldInsertElement(Value *Vec, Value *NewElt,
Value *Idx) const override {
return simplifyInsertElementInst(Vec, NewElt, Idx, SQ);
}
Value *FoldShuffleVector(Value *V1, Value *V2,
ArrayRef<int> Mask) const override {
Type *RetTy = VectorType::get(
cast<VectorType>(V1->getType())->getElementType(), Mask.size(),
isa<ScalableVectorType>(V1->getType()));
return simplifyShuffleVectorInst(V1, V2, Mask, RetTy, SQ);
}
//===--------------------------------------------------------------------===//
// Cast/Conversion Operators
//===--------------------------------------------------------------------===//
Value *CreateCast(Instruction::CastOps Op, Constant *C,
Type *DestTy) const override {
if (C->getType() == DestTy)
return C; // avoid calling Fold
return ConstFolder.CreateCast(Op, C, DestTy);
}
Value *CreateIntCast(Constant *C, Type *DestTy,
bool isSigned) const override {
if (C->getType() == DestTy)
return C; // avoid calling Fold
return ConstFolder.CreateIntCast(C, DestTy, isSigned);
}
Value *CreatePointerCast(Constant *C, Type *DestTy) const override {
if (C->getType() == DestTy)
return C; // avoid calling Fold
return ConstFolder.CreatePointerCast(C, DestTy);
}
Value *CreateFPCast(Constant *C, Type *DestTy) const override {
if (C->getType() == DestTy)
return C; // avoid calling Fold
return ConstFolder.CreateFPCast(C, DestTy);
}
Value *CreateBitCast(Constant *C, Type *DestTy) const override {
return ConstFolder.CreateBitCast(C, DestTy);
}
Value *CreateIntToPtr(Constant *C, Type *DestTy) const override {
return ConstFolder.CreateIntToPtr(C, DestTy);
}
Value *CreatePtrToInt(Constant *C, Type *DestTy) const override {
return ConstFolder.CreatePtrToInt(C, DestTy);
}
Value *CreateZExtOrBitCast(Constant *C, Type *DestTy) const override {
if (C->getType() == DestTy)
return C; // avoid calling Fold
return ConstFolder.CreateZExtOrBitCast(C, DestTy);
}
Value *CreateSExtOrBitCast(Constant *C, Type *DestTy) const override {
if (C->getType() == DestTy)
return C; // avoid calling Fold
return ConstFolder.CreateSExtOrBitCast(C, DestTy);
}
Value *CreateTruncOrBitCast(Constant *C, Type *DestTy) const override {
if (C->getType() == DestTy)
return C; // avoid calling Fold
return ConstFolder.CreateTruncOrBitCast(C, DestTy);
}
Value *CreatePointerBitCastOrAddrSpaceCast(Constant *C,
Type *DestTy) const override {
if (C->getType() == DestTy)
return C; // avoid calling Fold
return ConstFolder.CreatePointerBitCastOrAddrSpaceCast(C, DestTy);
}
//===--------------------------------------------------------------------===//
// Compare Instructions
//===--------------------------------------------------------------------===//
Value *CreateFCmp(CmpInst::Predicate P, Constant *LHS,
Constant *RHS) const override {
return ConstFolder.CreateFCmp(P, LHS, RHS);
}
};
} // end namespace llvm
#endif // LLVM_ANALYSIS_INSTSIMPLIFYFOLDER_H
PK iwFZ�XZP� � Analysis/Delinearization.hnu �[��� //===---- Delinearization.h - MultiDimensional Index Delinearization ------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This implements an analysis pass that tries to delinearize all GEP
// instructions in all loops using the SCEV analysis functionality. This pass is
// only used for testing purposes: if your pass needs delinearization, please
// use the on-demand SCEVAddRecExpr::delinearize() function.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_DELINEARIZATION_H
#define LLVM_ANALYSIS_DELINEARIZATION_H
#include "llvm/IR/PassManager.h"
namespace llvm {
class raw_ostream;
template <typename T> class SmallVectorImpl;
class GetElementPtrInst;
class ScalarEvolution;
class SCEV;
/// Compute the array dimensions Sizes from the set of Terms extracted from
/// the memory access function of this SCEVAddRecExpr (second step of
/// delinearization).
void findArrayDimensions(ScalarEvolution &SE,
SmallVectorImpl<const SCEV *> &Terms,
SmallVectorImpl<const SCEV *> &Sizes,
const SCEV *ElementSize);
/// Collect parametric terms occurring in step expressions (first step of
/// delinearization).
void collectParametricTerms(ScalarEvolution &SE, const SCEV *Expr,
SmallVectorImpl<const SCEV *> &Terms);
/// Return in Subscripts the access functions for each dimension in Sizes
/// (third step of delinearization).
void computeAccessFunctions(ScalarEvolution &SE, const SCEV *Expr,
SmallVectorImpl<const SCEV *> &Subscripts,
SmallVectorImpl<const SCEV *> &Sizes);
/// Split this SCEVAddRecExpr into two vectors of SCEVs representing the
/// subscripts and sizes of an array access.
///
/// The delinearization is a 3 step process: the first two steps compute the
/// sizes of each subscript and the third step computes the access functions
/// for the delinearized array:
///
/// 1. Find the terms in the step functions
/// 2. Compute the array size
/// 3. Compute the access function: divide the SCEV by the array size
/// starting with the innermost dimensions found in step 2. The Quotient
/// is the SCEV to be divided in the next step of the recursion. The
/// Remainder is the subscript of the innermost dimension. Loop over all
/// array dimensions computed in step 2.
///
/// To compute a uniform array size for several memory accesses to the same
/// object, one can collect in step 1 all the step terms for all the memory
/// accesses, and compute in step 2 a unique array shape. This guarantees
/// that the array shape will be the same across all memory accesses.
///
/// FIXME: We could derive the result of steps 1 and 2 from a description of
/// the array shape given in metadata.
///
/// Example:
///
/// A[][n][m]
///
/// for i
/// for j
/// for k
/// A[j+k][2i][5i] =
///
/// The initial SCEV:
///
/// A[{{{0,+,2*m+5}_i, +, n*m}_j, +, n*m}_k]
///
/// 1. Find the different terms in the step functions:
/// -> [2*m, 5, n*m, n*m]
///
/// 2. Compute the array size: sort and unique them
/// -> [n*m, 2*m, 5]
/// find the GCD of all the terms = 1
/// divide by the GCD and erase constant terms
/// -> [n*m, 2*m]
/// GCD = m
/// divide by GCD -> [n, 2]
/// remove constant terms
/// -> [n]
/// size of the array is A[unknown][n][m]
///
/// 3. Compute the access function
/// a. Divide {{{0,+,2*m+5}_i, +, n*m}_j, +, n*m}_k by the innermost size m
/// Quotient: {{{0,+,2}_i, +, n}_j, +, n}_k
/// Remainder: {{{0,+,5}_i, +, 0}_j, +, 0}_k
/// The remainder is the subscript of the innermost array dimension: [5i].
///
/// b. Divide Quotient: {{{0,+,2}_i, +, n}_j, +, n}_k by next outer size n
/// Quotient: {{{0,+,0}_i, +, 1}_j, +, 1}_k
/// Remainder: {{{0,+,2}_i, +, 0}_j, +, 0}_k
/// The Remainder is the subscript of the next array dimension: [2i].
///
/// The subscript of the outermost dimension is the Quotient: [j+k].
///
/// Overall, we have: A[][n][m], and the access function: A[j+k][2i][5i].
void delinearize(ScalarEvolution &SE, const SCEV *Expr,
SmallVectorImpl<const SCEV *> &Subscripts,
SmallVectorImpl<const SCEV *> &Sizes, const SCEV *ElementSize);
/// Gathers the individual index expressions from a GEP instruction.
///
/// This function optimistically assumes the GEP references into a fixed size
/// array. If this is actually true, this function returns a list of array
/// subscript expressions in \p Subscripts and a list of integers describing
/// the size of the individual array dimensions in \p Sizes. Both lists have
/// either equal length or the size list is one element shorter in case there
/// is no known size available for the outermost array dimension. Returns true
/// if successful and false otherwise.
bool getIndexExpressionsFromGEP(ScalarEvolution &SE,
const GetElementPtrInst *GEP,
SmallVectorImpl<const SCEV *> &Subscripts,
SmallVectorImpl<int> &Sizes);
/// Implementation of fixed size array delinearization. Try to delinearize
/// access function for a fixed size multi-dimensional array, by deriving
/// subscripts from GEP instructions. Returns true upon success and false
/// otherwise. \p Inst is the load/store instruction whose pointer operand is
/// the one we want to delinearize. \p AccessFn is its corresponding SCEV
/// expression w.r.t. the surrounding loop.
bool tryDelinearizeFixedSizeImpl(ScalarEvolution *SE, Instruction *Inst,
const SCEV *AccessFn,
SmallVectorImpl<const SCEV *> &Subscripts,
SmallVectorImpl<int> &Sizes);
struct DelinearizationPrinterPass
: public PassInfoMixin<DelinearizationPrinterPass> {
explicit DelinearizationPrinterPass(raw_ostream &OS);
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
private:
raw_ostream &OS;
};
} // namespace llvm
#endif // LLVM_ANALYSIS_DELINEARIZATION_H
PK iwFZx��� ! Analysis/TypeBasedAliasAnalysis.hnu �[��� //===- TypeBasedAliasAnalysis.h - Type-Based Alias Analysis -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file
/// This is the interface for a metadata-based TBAA. See the source file for
/// details on the algorithm.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_TYPEBASEDALIASANALYSIS_H
#define LLVM_ANALYSIS_TYPEBASEDALIASANALYSIS_H
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
#include <memory>
namespace llvm {
class CallBase;
class Function;
class MDNode;
class MemoryLocation;
/// A simple AA result that uses TBAA metadata to answer queries.
class TypeBasedAAResult : public AAResultBase {
public:
/// Handle invalidation events from the new pass manager.
///
/// By definition, this result is stateless and so remains valid.
bool invalidate(Function &, const PreservedAnalyses &,
FunctionAnalysisManager::Invalidator &) {
return false;
}
AliasResult alias(const MemoryLocation &LocA, const MemoryLocation &LocB,
AAQueryInfo &AAQI, const Instruction *CtxI);
ModRefInfo getModRefInfoMask(const MemoryLocation &Loc, AAQueryInfo &AAQI,
bool IgnoreLocals);
MemoryEffects getMemoryEffects(const CallBase *Call, AAQueryInfo &AAQI);
MemoryEffects getMemoryEffects(const Function *F);
ModRefInfo getModRefInfo(const CallBase *Call, const MemoryLocation &Loc,
AAQueryInfo &AAQI);
ModRefInfo getModRefInfo(const CallBase *Call1, const CallBase *Call2,
AAQueryInfo &AAQI);
private:
bool Aliases(const MDNode *A, const MDNode *B) const;
};
/// Analysis pass providing a never-invalidated alias analysis result.
class TypeBasedAA : public AnalysisInfoMixin<TypeBasedAA> {
friend AnalysisInfoMixin<TypeBasedAA>;
static AnalysisKey Key;
public:
using Result = TypeBasedAAResult;
TypeBasedAAResult run(Function &F, FunctionAnalysisManager &AM);
};
/// Legacy wrapper pass to provide the TypeBasedAAResult object.
class TypeBasedAAWrapperPass : public ImmutablePass {
std::unique_ptr<TypeBasedAAResult> Result;
public:
static char ID;
TypeBasedAAWrapperPass();
TypeBasedAAResult &getResult() { return *Result; }
const TypeBasedAAResult &getResult() const { return *Result; }
bool doInitialization(Module &M) override;
bool doFinalization(Module &M) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
};
//===--------------------------------------------------------------------===//
//
// createTypeBasedAAWrapperPass - This pass implements metadata-based
// type-based alias analysis.
//
ImmutablePass *createTypeBasedAAWrapperPass();
} // end namespace llvm
#endif // LLVM_ANALYSIS_TYPEBASEDALIASANALYSIS_H
PK iwFZ�(��~
~
' Analysis/ScalarEvolutionNormalization.hnu �[��� //===- llvm/Analysis/ScalarEvolutionNormalization.h - See below -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines utilities for working with "normalized" ScalarEvolution
// expressions.
//
// The following example illustrates post-increment uses and how normalized
// expressions help.
//
// for (i=0; i!=n; ++i) {
// ...
// }
// use(i);
//
// While the expression for most uses of i inside the loop is {0,+,1}<%L>, the
// expression for the use of i outside the loop is {1,+,1}<%L>, since i is
// incremented at the end of the loop body. This is inconveient, since it
// suggests that we need two different induction variables, one that starts
// at 0 and one that starts at 1. We'd prefer to be able to think of these as
// the same induction variable, with uses inside the loop using the
// "pre-incremented" value, and uses after the loop using the
// "post-incremented" value.
//
// Expressions for post-incremented uses are represented as an expression
// paired with a set of loops for which the expression is in "post-increment"
// mode (there may be multiple loops).
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_SCALAREVOLUTIONNORMALIZATION_H
#define LLVM_ANALYSIS_SCALAREVOLUTIONNORMALIZATION_H
#include "llvm/ADT/STLFunctionalExtras.h"
#include "llvm/ADT/SmallPtrSet.h"
namespace llvm {
class Loop;
class ScalarEvolution;
class SCEV;
class SCEVAddRecExpr;
typedef SmallPtrSet<const Loop *, 2> PostIncLoopSet;
typedef function_ref<bool(const SCEVAddRecExpr *)> NormalizePredTy;
/// Normalize \p S to be post-increment for all loops present in \p
/// Loops. Returns nullptr if the result is not invertible and \p
/// CheckInvertible is true.
const SCEV *normalizeForPostIncUse(const SCEV *S, const PostIncLoopSet &Loops,
ScalarEvolution &SE,
bool CheckInvertible = true);
/// Normalize \p S for all add recurrence sub-expressions for which \p
/// Pred returns true.
const SCEV *normalizeForPostIncUseIf(const SCEV *S, NormalizePredTy Pred,
ScalarEvolution &SE);
/// Denormalize \p S to be post-increment for all loops present in \p
/// Loops.
const SCEV *denormalizeForPostIncUse(const SCEV *S, const PostIncLoopSet &Loops,
ScalarEvolution &SE);
} // namespace llvm
#endif
PK iwFZ���i �i Analysis/LoopInfo.hnu �[��� //===- llvm/Analysis/LoopInfo.h - Natural Loop Calculator -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file declares a GenericLoopInfo instantiation for LLVM IR.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_LOOPINFO_H
#define LLVM_ANALYSIS_LOOPINFO_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/GraphTraits.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/IR/CFG.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
#include "llvm/Support/GenericLoopInfo.h"
#include <algorithm>
#include <optional>
#include <utility>
namespace llvm {
class DominatorTree;
class InductionDescriptor;
class Instruction;
class LoopInfo;
class Loop;
class MDNode;
class MemorySSAUpdater;
class ScalarEvolution;
class raw_ostream;
// Implementation in Support/GenericLoopInfoImpl.h
extern template class LoopBase<BasicBlock, Loop>;
/// Represents a single loop in the control flow graph. Note that not all SCCs
/// in the CFG are necessarily loops.
class LLVM_EXTERNAL_VISIBILITY Loop : public LoopBase<BasicBlock, Loop> {
public:
/// A range representing the start and end location of a loop.
class LocRange {
DebugLoc Start;
DebugLoc End;
public:
LocRange() = default;
LocRange(DebugLoc Start) : Start(Start), End(Start) {}
LocRange(DebugLoc Start, DebugLoc End)
: Start(std::move(Start)), End(std::move(End)) {}
const DebugLoc &getStart() const { return Start; }
const DebugLoc &getEnd() const { return End; }
/// Check for null.
///
explicit operator bool() const { return Start && End; }
};
/// Return true if the specified value is loop invariant.
bool isLoopInvariant(const Value *V) const;
/// Return true if all the operands of the specified instruction are loop
/// invariant.
bool hasLoopInvariantOperands(const Instruction *I) const;
/// If the given value is an instruction inside of the loop and it can be
/// hoisted, do so to make it trivially loop-invariant.
/// Return true if \c V is already loop-invariant, and false if \c V can't
/// be made loop-invariant. If \c V is made loop-invariant, \c Changed is
/// set to true. This function can be used as a slightly more aggressive
/// replacement for isLoopInvariant.
///
/// If InsertPt is specified, it is the point to hoist instructions to.
/// If null, the terminator of the loop preheader is used.
///
bool makeLoopInvariant(Value *V, bool &Changed,
Instruction *InsertPt = nullptr,
MemorySSAUpdater *MSSAU = nullptr,
ScalarEvolution *SE = nullptr) const;
/// If the given instruction is inside of the loop and it can be hoisted, do
/// so to make it trivially loop-invariant.
/// Return true if \c I is already loop-invariant, and false if \c I can't
/// be made loop-invariant. If \c I is made loop-invariant, \c Changed is
/// set to true. This function can be used as a slightly more aggressive
/// replacement for isLoopInvariant.
///
/// If InsertPt is specified, it is the point to hoist instructions to.
/// If null, the terminator of the loop preheader is used.
///
bool makeLoopInvariant(Instruction *I, bool &Changed,
Instruction *InsertPt = nullptr,
MemorySSAUpdater *MSSAU = nullptr,
ScalarEvolution *SE = nullptr) const;
/// Check to see if the loop has a canonical induction variable: an integer
/// recurrence that starts at 0 and increments by one each time through the
/// loop. If so, return the phi node that corresponds to it.
///
/// The IndVarSimplify pass transforms loops to have a canonical induction
/// variable.
///
PHINode *getCanonicalInductionVariable() const;
/// Get the latch condition instruction.
ICmpInst *getLatchCmpInst() const;
/// Obtain the unique incoming and back edge. Return false if they are
/// non-unique or the loop is dead; otherwise, return true.
bool getIncomingAndBackEdge(BasicBlock *&Incoming,
BasicBlock *&Backedge) const;
/// Below are some utilities to get the loop guard, loop bounds and induction
/// variable, and to check if a given phinode is an auxiliary induction
/// variable, if the loop is guarded, and if the loop is canonical.
///
/// Here is an example:
/// \code
/// for (int i = lb; i < ub; i+=step)
/// <loop body>
/// --- pseudo LLVMIR ---
/// beforeloop:
/// guardcmp = (lb < ub)
/// if (guardcmp) goto preheader; else goto afterloop
/// preheader:
/// loop:
/// i_1 = phi[{lb, preheader}, {i_2, latch}]
/// <loop body>
/// i_2 = i_1 + step
/// latch:
/// cmp = (i_2 < ub)
/// if (cmp) goto loop
/// exit:
/// afterloop:
/// \endcode
///
/// - getBounds
/// - getInitialIVValue --> lb
/// - getStepInst --> i_2 = i_1 + step
/// - getStepValue --> step
/// - getFinalIVValue --> ub
/// - getCanonicalPredicate --> '<'
/// - getDirection --> Increasing
///
/// - getInductionVariable --> i_1
/// - isAuxiliaryInductionVariable(x) --> true if x == i_1
/// - getLoopGuardBranch()
/// --> `if (guardcmp) goto preheader; else goto afterloop`
/// - isGuarded() --> true
/// - isCanonical --> false
struct LoopBounds {
/// Return the LoopBounds object if
/// - the given \p IndVar is an induction variable
/// - the initial value of the induction variable can be found
/// - the step instruction of the induction variable can be found
/// - the final value of the induction variable can be found
///
/// Else std::nullopt.
static std::optional<Loop::LoopBounds>
getBounds(const Loop &L, PHINode &IndVar, ScalarEvolution &SE);
/// Get the initial value of the loop induction variable.
Value &getInitialIVValue() const { return InitialIVValue; }
/// Get the instruction that updates the loop induction variable.
Instruction &getStepInst() const { return StepInst; }
/// Get the step that the loop induction variable gets updated by in each
/// loop iteration. Return nullptr if not found.
Value *getStepValue() const { return StepValue; }
/// Get the final value of the loop induction variable.
Value &getFinalIVValue() const { return FinalIVValue; }
/// Return the canonical predicate for the latch compare instruction, if
/// able to be calcuated. Else BAD_ICMP_PREDICATE.
///
/// A predicate is considered as canonical if requirements below are all
/// satisfied:
/// 1. The first successor of the latch branch is the loop header
/// If not, inverse the predicate.
/// 2. One of the operands of the latch comparison is StepInst
/// If not, and
/// - if the current calcuated predicate is not ne or eq, flip the
/// predicate.
/// - else if the loop is increasing, return slt
/// (notice that it is safe to change from ne or eq to sign compare)
/// - else if the loop is decreasing, return sgt
/// (notice that it is safe to change from ne or eq to sign compare)
///
/// Here is an example when both (1) and (2) are not satisfied:
/// \code
/// loop.header:
/// %iv = phi [%initialiv, %loop.preheader], [%inc, %loop.header]
/// %inc = add %iv, %step
/// %cmp = slt %iv, %finaliv
/// br %cmp, %loop.exit, %loop.header
/// loop.exit:
/// \endcode
/// - The second successor of the latch branch is the loop header instead
/// of the first successor (slt -> sge)
/// - The first operand of the latch comparison (%cmp) is the IndVar (%iv)
/// instead of the StepInst (%inc) (sge -> sgt)
///
/// The predicate would be sgt if both (1) and (2) are satisfied.
/// getCanonicalPredicate() returns sgt for this example.
/// Note: The IR is not changed.
ICmpInst::Predicate getCanonicalPredicate() const;
/// An enum for the direction of the loop
/// - for (int i = 0; i < ub; ++i) --> Increasing
/// - for (int i = ub; i > 0; --i) --> Descresing
/// - for (int i = x; i != y; i+=z) --> Unknown
enum class Direction { Increasing, Decreasing, Unknown };
/// Get the direction of the loop.
Direction getDirection() const;
private:
LoopBounds(const Loop &Loop, Value &I, Instruction &SI, Value *SV, Value &F,
ScalarEvolution &SE)
: L(Loop), InitialIVValue(I), StepInst(SI), StepValue(SV),
FinalIVValue(F), SE(SE) {}
const Loop &L;
// The initial value of the loop induction variable
Value &InitialIVValue;
// The instruction that updates the loop induction variable
Instruction &StepInst;
// The value that the loop induction variable gets updated by in each loop
// iteration
Value *StepValue;
// The final value of the loop induction variable
Value &FinalIVValue;
ScalarEvolution &SE;
};
/// Return the struct LoopBounds collected if all struct members are found,
/// else std::nullopt.
std::optional<LoopBounds> getBounds(ScalarEvolution &SE) const;
/// Return the loop induction variable if found, else return nullptr.
/// An instruction is considered as the loop induction variable if
/// - it is an induction variable of the loop; and
/// - it is used to determine the condition of the branch in the loop latch
///
/// Note: the induction variable doesn't need to be canonical, i.e. starts at
/// zero and increments by one each time through the loop (but it can be).
PHINode *getInductionVariable(ScalarEvolution &SE) const;
/// Get the loop induction descriptor for the loop induction variable. Return
/// true if the loop induction variable is found.
bool getInductionDescriptor(ScalarEvolution &SE,
InductionDescriptor &IndDesc) const;
/// Return true if the given PHINode \p AuxIndVar is
/// - in the loop header
/// - not used outside of the loop
/// - incremented by a loop invariant step for each loop iteration
/// - step instruction opcode should be add or sub
/// Note: auxiliary induction variable is not required to be used in the
/// conditional branch in the loop latch. (but it can be)
bool isAuxiliaryInductionVariable(PHINode &AuxIndVar,
ScalarEvolution &SE) const;
/// Return the loop guard branch, if it exists.
///
/// This currently only works on simplified loop, as it requires a preheader
/// and a latch to identify the guard. It will work on loops of the form:
/// \code
/// GuardBB:
/// br cond1, Preheader, ExitSucc <== GuardBranch
/// Preheader:
/// br Header
/// Header:
/// ...
/// br Latch
/// Latch:
/// br cond2, Header, ExitBlock
/// ExitBlock:
/// br ExitSucc
/// ExitSucc:
/// \endcode
BranchInst *getLoopGuardBranch() const;
/// Return true iff the loop is
/// - in simplify rotated form, and
/// - guarded by a loop guard branch.
bool isGuarded() const { return (getLoopGuardBranch() != nullptr); }
/// Return true if the loop is in rotated form.
///
/// This does not check if the loop was rotated by loop rotation, instead it
/// only checks if the loop is in rotated form (has a valid latch that exists
/// the loop).
bool isRotatedForm() const {
assert(!isInvalid() && "Loop not in a valid state!");
BasicBlock *Latch = getLoopLatch();
return Latch && isLoopExiting(Latch);
}
/// Return true if the loop induction variable starts at zero and increments
/// by one each time through the loop.
bool isCanonical(ScalarEvolution &SE) const;
/// Return true if the Loop is in LCSSA form. If \p IgnoreTokens is set to
/// true, token values defined inside loop are allowed to violate LCSSA form.
bool isLCSSAForm(const DominatorTree &DT, bool IgnoreTokens = true) const;
/// Return true if this Loop and all inner subloops are in LCSSA form. If \p
/// IgnoreTokens is set to true, token values defined inside loop are allowed
/// to violate LCSSA form.
bool isRecursivelyLCSSAForm(const DominatorTree &DT, const LoopInfo &LI,
bool IgnoreTokens = true) const;
/// Return true if the Loop is in the form that the LoopSimplify form
/// transforms loops to, which is sometimes called normal form.
bool isLoopSimplifyForm() const;
/// Return true if the loop body is safe to clone in practice.
bool isSafeToClone() const;
/// Returns true if the loop is annotated parallel.
///
/// A parallel loop can be assumed to not contain any dependencies between
/// iterations by the compiler. That is, any loop-carried dependency checking
/// can be skipped completely when parallelizing the loop on the target
/// machine. Thus, if the parallel loop information originates from the
/// programmer, e.g. via the OpenMP parallel for pragma, it is the
/// programmer's responsibility to ensure there are no loop-carried
/// dependencies. The final execution order of the instructions across
/// iterations is not guaranteed, thus, the end result might or might not
/// implement actual concurrent execution of instructions across multiple
/// iterations.
bool isAnnotatedParallel() const;
/// Return the llvm.loop loop id metadata node for this loop if it is present.
///
/// If this loop contains the same llvm.loop metadata on each branch to the
/// header then the node is returned. If any latch instruction does not
/// contain llvm.loop or if multiple latches contain different nodes then
/// 0 is returned.
MDNode *getLoopID() const;
/// Set the llvm.loop loop id metadata for this loop.
///
/// The LoopID metadata node will be added to each terminator instruction in
/// the loop that branches to the loop header.
///
/// The LoopID metadata node should have one or more operands and the first
/// operand should be the node itself.
void setLoopID(MDNode *LoopID) const;
/// Add llvm.loop.unroll.disable to this loop's loop id metadata.
///
/// Remove existing unroll metadata and add unroll disable metadata to
/// indicate the loop has already been unrolled. This prevents a loop
/// from being unrolled more than is directed by a pragma if the loop
/// unrolling pass is run more than once (which it generally is).
void setLoopAlreadyUnrolled();
/// Add llvm.loop.mustprogress to this loop's loop id metadata.
void setLoopMustProgress();
void dump() const;
void dumpVerbose() const;
/// Return the debug location of the start of this loop.
/// This looks for a BB terminating instruction with a known debug
/// location by looking at the preheader and header blocks. If it
/// cannot find a terminating instruction with location information,
/// it returns an unknown location.
DebugLoc getStartLoc() const;
/// Return the source code span of the loop.
LocRange getLocRange() const;
StringRef getName() const {
if (BasicBlock *Header = getHeader())
if (Header->hasName())
return Header->getName();
return "<unnamed loop>";
}
private:
Loop() = default;
friend class LoopInfoBase<BasicBlock, Loop>;
friend class LoopBase<BasicBlock, Loop>;
explicit Loop(BasicBlock *BB) : LoopBase<BasicBlock, Loop>(BB) {}
~Loop() = default;
};
// Implementation in Support/GenericLoopInfoImpl.h
extern template class LoopInfoBase<BasicBlock, Loop>;
class LoopInfo : public LoopInfoBase<BasicBlock, Loop> {
typedef LoopInfoBase<BasicBlock, Loop> BaseT;
friend class LoopBase<BasicBlock, Loop>;
void operator=(const LoopInfo &) = delete;
LoopInfo(const LoopInfo &) = delete;
public:
LoopInfo() = default;
explicit LoopInfo(const DominatorTreeBase<BasicBlock, false> &DomTree);
LoopInfo(LoopInfo &&Arg) : BaseT(std::move(static_cast<BaseT &>(Arg))) {}
LoopInfo &operator=(LoopInfo &&RHS) {
BaseT::operator=(std::move(static_cast<BaseT &>(RHS)));
return *this;
}
/// Handle invalidation explicitly.
bool invalidate(Function &F, const PreservedAnalyses &PA,
FunctionAnalysisManager::Invalidator &);
// Most of the public interface is provided via LoopInfoBase.
/// Update LoopInfo after removing the last backedge from a loop. This updates
/// the loop forest and parent loops for each block so that \c L is no longer
/// referenced, but does not actually delete \c L immediately. The pointer
/// will remain valid until this LoopInfo's memory is released.
void erase(Loop *L);
/// Returns true if replacing From with To everywhere is guaranteed to
/// preserve LCSSA form.
bool replacementPreservesLCSSAForm(Instruction *From, Value *To) {
// Preserving LCSSA form is only problematic if the replacing value is an
// instruction.
Instruction *I = dyn_cast<Instruction>(To);
if (!I)
return true;
// If both instructions are defined in the same basic block then replacement
// cannot break LCSSA form.
if (I->getParent() == From->getParent())
return true;
// If the instruction is not defined in a loop then it can safely replace
// anything.
Loop *ToLoop = getLoopFor(I->getParent());
if (!ToLoop)
return true;
// If the replacing instruction is defined in the same loop as the original
// instruction, or in a loop that contains it as an inner loop, then using
// it as a replacement will not break LCSSA form.
return ToLoop->contains(getLoopFor(From->getParent()));
}
/// Checks if moving a specific instruction can break LCSSA in any loop.
///
/// Return true if moving \p Inst to before \p NewLoc will break LCSSA,
/// assuming that the function containing \p Inst and \p NewLoc is currently
/// in LCSSA form.
bool movementPreservesLCSSAForm(Instruction *Inst, Instruction *NewLoc) {
assert(Inst->getFunction() == NewLoc->getFunction() &&
"Can't reason about IPO!");
auto *OldBB = Inst->getParent();
auto *NewBB = NewLoc->getParent();
// Movement within the same loop does not break LCSSA (the equality check is
// to avoid doing a hashtable lookup in case of intra-block movement).
if (OldBB == NewBB)
return true;
auto *OldLoop = getLoopFor(OldBB);
auto *NewLoop = getLoopFor(NewBB);
if (OldLoop == NewLoop)
return true;
// Check if Outer contains Inner; with the null loop counting as the
// "outermost" loop.
auto Contains = [](const Loop *Outer, const Loop *Inner) {
return !Outer || Outer->contains(Inner);
};
// To check that the movement of Inst to before NewLoc does not break LCSSA,
// we need to check two sets of uses for possible LCSSA violations at
// NewLoc: the users of NewInst, and the operands of NewInst.
// If we know we're hoisting Inst out of an inner loop to an outer loop,
// then the uses *of* Inst don't need to be checked.
if (!Contains(NewLoop, OldLoop)) {
for (Use &U : Inst->uses()) {
auto *UI = cast<Instruction>(U.getUser());
auto *UBB = isa<PHINode>(UI) ? cast<PHINode>(UI)->getIncomingBlock(U)
: UI->getParent();
if (UBB != NewBB && getLoopFor(UBB) != NewLoop)
return false;
}
}
// If we know we're sinking Inst from an outer loop into an inner loop, then
// the *operands* of Inst don't need to be checked.
if (!Contains(OldLoop, NewLoop)) {
// See below on why we can't handle phi nodes here.
if (isa<PHINode>(Inst))
return false;
for (Use &U : Inst->operands()) {
auto *DefI = dyn_cast<Instruction>(U.get());
if (!DefI)
return false;
// This would need adjustment if we allow Inst to be a phi node -- the
// new use block won't simply be NewBB.
auto *DefBlock = DefI->getParent();
if (DefBlock != NewBB && getLoopFor(DefBlock) != NewLoop)
return false;
}
}
return true;
}
// Return true if a new use of V added in ExitBB would require an LCSSA PHI
// to be inserted at the begining of the block. Note that V is assumed to
// dominate ExitBB, and ExitBB must be the exit block of some loop. The
// IR is assumed to be in LCSSA form before the planned insertion.
bool wouldBeOutOfLoopUseRequiringLCSSA(const Value *V,
const BasicBlock *ExitBB) const;
};
/// Enable verification of loop info.
///
/// The flag enables checks which are expensive and are disabled by default
/// unless the `EXPENSIVE_CHECKS` macro is defined. The `-verify-loop-info`
/// flag allows the checks to be enabled selectively without re-compilation.
extern bool VerifyLoopInfo;
// Allow clients to walk the list of nested loops...
template <> struct GraphTraits<const Loop *> {
typedef const Loop *NodeRef;
typedef LoopInfo::iterator ChildIteratorType;
static NodeRef getEntryNode(const Loop *L) { return L; }
static ChildIteratorType child_begin(NodeRef N) { return N->begin(); }
static ChildIteratorType child_end(NodeRef N) { return N->end(); }
};
template <> struct GraphTraits<Loop *> {
typedef Loop *NodeRef;
typedef LoopInfo::iterator ChildIteratorType;
static NodeRef getEntryNode(Loop *L) { return L; }
static ChildIteratorType child_begin(NodeRef N) { return N->begin(); }
static ChildIteratorType child_end(NodeRef N) { return N->end(); }
};
/// Analysis pass that exposes the \c LoopInfo for a function.
class LoopAnalysis : public AnalysisInfoMixin<LoopAnalysis> {
friend AnalysisInfoMixin<LoopAnalysis>;
static AnalysisKey Key;
public:
typedef LoopInfo Result;
LoopInfo run(Function &F, FunctionAnalysisManager &AM);
};
/// Printer pass for the \c LoopAnalysis results.
class LoopPrinterPass : public PassInfoMixin<LoopPrinterPass> {
raw_ostream &OS;
public:
explicit LoopPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
/// Verifier pass for the \c LoopAnalysis results.
struct LoopVerifierPass : public PassInfoMixin<LoopVerifierPass> {
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
/// The legacy pass manager's analysis pass to compute loop information.
class LoopInfoWrapperPass : public FunctionPass {
LoopInfo LI;
public:
static char ID; // Pass identification, replacement for typeid
LoopInfoWrapperPass();
LoopInfo &getLoopInfo() { return LI; }
const LoopInfo &getLoopInfo() const { return LI; }
/// Calculate the natural loop information for a given function.
bool runOnFunction(Function &F) override;
void verifyAnalysis() const override;
void releaseMemory() override { LI.releaseMemory(); }
void print(raw_ostream &O, const Module *M = nullptr) const override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
};
/// Function to print a loop's contents as LLVM's text IR assembly.
void printLoop(Loop &L, raw_ostream &OS, const std::string &Banner = "");
/// Find and return the loop attribute node for the attribute @p Name in
/// @p LoopID. Return nullptr if there is no such attribute.
MDNode *findOptionMDForLoopID(MDNode *LoopID, StringRef Name);
/// Find string metadata for a loop.
///
/// Returns the MDNode where the first operand is the metadata's name. The
/// following operands are the metadata's values. If no metadata with @p Name is
/// found, return nullptr.
MDNode *findOptionMDForLoop(const Loop *TheLoop, StringRef Name);
std::optional<bool> getOptionalBoolLoopAttribute(const Loop *TheLoop,
StringRef Name);
/// Returns true if Name is applied to TheLoop and enabled.
bool getBooleanLoopAttribute(const Loop *TheLoop, StringRef Name);
/// Find named metadata for a loop with an integer value.
std::optional<int> getOptionalIntLoopAttribute(const Loop *TheLoop,
StringRef Name);
/// Find named metadata for a loop with an integer value. Return \p Default if
/// not set.
int getIntLoopAttribute(const Loop *TheLoop, StringRef Name, int Default = 0);
/// Find string metadata for loop
///
/// If it has a value (e.g. {"llvm.distribute", 1} return the value as an
/// operand or null otherwise. If the string metadata is not found return
/// Optional's not-a-value.
std::optional<const MDOperand *> findStringMetadataForLoop(const Loop *TheLoop,
StringRef Name);
/// Look for the loop attribute that requires progress within the loop.
/// Note: Most consumers probably want "isMustProgress" which checks
/// the containing function attribute too.
bool hasMustProgress(const Loop *L);
/// Return true if this loop can be assumed to make progress. (i.e. can't
/// be infinite without side effects without also being undefined)
bool isMustProgress(const Loop *L);
/// Return true if this loop can be assumed to run for a finite number of
/// iterations.
bool isFinite(const Loop *L);
/// Return whether an MDNode might represent an access group.
///
/// Access group metadata nodes have to be distinct and empty. Being
/// always-empty ensures that it never needs to be changed (which -- because
/// MDNodes are designed immutable -- would require creating a new MDNode). Note
/// that this is not a sufficient condition: not every distinct and empty NDNode
/// is representing an access group.
bool isValidAsAccessGroup(MDNode *AccGroup);
/// Create a new LoopID after the loop has been transformed.
///
/// This can be used when no follow-up loop attributes are defined
/// (llvm::makeFollowupLoopID returning None) to stop transformations to be
/// applied again.
///
/// @param Context The LLVMContext in which to create the new LoopID.
/// @param OrigLoopID The original LoopID; can be nullptr if the original
/// loop has no LoopID.
/// @param RemovePrefixes Remove all loop attributes that have these prefixes.
/// Use to remove metadata of the transformation that has
/// been applied.
/// @param AddAttrs Add these loop attributes to the new LoopID.
///
/// @return A new LoopID that can be applied using Loop::setLoopID().
llvm::MDNode *
makePostTransformationMetadata(llvm::LLVMContext &Context, MDNode *OrigLoopID,
llvm::ArrayRef<llvm::StringRef> RemovePrefixes,
llvm::ArrayRef<llvm::MDNode *> AddAttrs);
} // namespace llvm
#endif
PK iwFZ���e� � Analysis/PhiValues.hnu �[��� //===- PhiValues.h - Phi Value Analysis -------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the PhiValues class, and associated passes, which can be
// used to find the underlying values of the phis in a function, i.e. the
// non-phi values that can be found by traversing the phi graph.
//
// This information is computed lazily and cached. If new phis are added to the
// function they are handled correctly, but if an existing phi has its operands
// modified PhiValues has to be notified by calling invalidateValue.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_PHIVALUES_H
#define LLVM_ANALYSIS_PHIVALUES_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/IR/PassManager.h"
#include "llvm/IR/ValueHandle.h"
#include "llvm/Pass.h"
namespace llvm {
class Value;
class PHINode;
class Function;
/// Class for calculating and caching the underlying values of phis in a
/// function.
///
/// Initially the PhiValues is empty, and gets incrementally populated whenever
/// it is queried.
class PhiValues {
public:
using ValueSet = SmallSetVector<Value *, 4>;
/// Construct an empty PhiValues.
PhiValues(const Function &F) : F(F) {}
/// Get the underlying values of a phi.
///
/// This returns the cached value if PN has previously been processed,
/// otherwise it processes it first.
const ValueSet &getValuesForPhi(const PHINode *PN);
/// Notify PhiValues that the cached information using V is no longer valid
///
/// Whenever a phi has its operands modified the cached values for that phi
/// (and the phis that use that phi) become invalid. A user of PhiValues has
/// to notify it of this by calling invalidateValue on either the operand or
/// the phi, which will then clear the relevant cached information.
void invalidateValue(const Value *V);
/// Free the memory used by this class.
void releaseMemory();
/// Print out the values currently in the cache.
void print(raw_ostream &OS) const;
/// Handle invalidation events in the new pass manager.
bool invalidate(Function &, const PreservedAnalyses &,
FunctionAnalysisManager::Invalidator &);
private:
using ConstValueSet = SmallSetVector<const Value *, 4>;
/// The next depth number to be used by processPhi.
unsigned int NextDepthNumber = 1;
/// Depth numbers of phis. Phis with the same depth number are part of the
/// same strongly connected component.
DenseMap<const PHINode *, unsigned int> DepthMap;
/// Non-phi values reachable from each component.
DenseMap<unsigned int, ValueSet> NonPhiReachableMap;
/// All values reachable from each component.
DenseMap<unsigned int, ConstValueSet> ReachableMap;
/// A CallbackVH to notify PhiValues when a value is deleted or replaced, so
/// that the cached information for that value can be cleared to avoid
/// dangling pointers to invalid values.
class PhiValuesCallbackVH final : public CallbackVH {
PhiValues *PV;
void deleted() override;
void allUsesReplacedWith(Value *New) override;
public:
PhiValuesCallbackVH(Value *V, PhiValues *PV = nullptr)
: CallbackVH(V), PV(PV) {}
};
/// A set of callbacks to the values that processPhi has seen.
DenseSet<PhiValuesCallbackVH, DenseMapInfo<Value *>> TrackedValues;
/// The function that the PhiValues is for.
const Function &F;
/// Process a phi so that its entries in the depth and reachable maps are
/// fully populated.
void processPhi(const PHINode *PN, SmallVectorImpl<const PHINode *> &Stack);
};
/// The analysis pass which yields a PhiValues
///
/// The analysis does nothing by itself, and just returns an empty PhiValues
/// which will get filled in as it's used.
class PhiValuesAnalysis : public AnalysisInfoMixin<PhiValuesAnalysis> {
friend AnalysisInfoMixin<PhiValuesAnalysis>;
static AnalysisKey Key;
public:
using Result = PhiValues;
PhiValues run(Function &F, FunctionAnalysisManager &);
};
/// A pass for printing the PhiValues for a function.
///
/// This pass doesn't print whatever information the PhiValues happens to hold,
/// but instead first uses the PhiValues to analyze all the phis in the function
/// so the complete information is printed.
class PhiValuesPrinterPass : public PassInfoMixin<PhiValuesPrinterPass> {
raw_ostream &OS;
public:
explicit PhiValuesPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
/// Wrapper pass for the legacy pass manager
class PhiValuesWrapperPass : public FunctionPass {
std::unique_ptr<PhiValues> Result;
public:
static char ID;
PhiValuesWrapperPass();
PhiValues &getResult() { return *Result; }
const PhiValues &getResult() const { return *Result; }
bool runOnFunction(Function &F) override;
void releaseMemory() override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
};
} // namespace llvm
#endif
PK iwFZ����
�
# Analysis/LegacyDivergenceAnalysis.hnu �[��� //===- llvm/Analysis/LegacyDivergenceAnalysis.h - KernelDivergence Analysis -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// The kernel divergence analysis is an LLVM pass which can be used to find out
// if a branch instruction in a GPU program (kernel) is divergent or not. It can help
// branch optimizations such as jump threading and loop unswitching to make
// better decisions.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_LEGACYDIVERGENCEANALYSIS_H
#define LLVM_ANALYSIS_LEGACYDIVERGENCEANALYSIS_H
#include "llvm/ADT/DenseSet.h"
#include "llvm/Analysis/LoopInfo.h"
#include "llvm/Analysis/PostDominators.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
#include <memory>
namespace llvm {
class DivergenceInfo;
class Function;
class Module;
class raw_ostream;
class TargetTransformInfo;
class Use;
class Value;
class LegacyDivergenceAnalysisImpl {
public:
// Returns true if V is divergent at its definition.
bool isDivergent(const Value *V) const;
// Returns true if U is divergent. Uses of a uniform value can be divergent.
bool isDivergentUse(const Use *U) const;
// Returns true if V is uniform/non-divergent.
bool isUniform(const Value *V) const { return !isDivergent(V); }
// Returns true if U is uniform/non-divergent. Uses of a uniform value can be
// divergent.
bool isUniformUse(const Use *U) const { return !isDivergentUse(U); }
// Keep the analysis results uptodate by removing an erased value.
void removeValue(const Value *V) { DivergentValues.erase(V); }
// Print all divergent branches in the function.
void print(raw_ostream &OS, const Module *) const;
// Whether analysis should be performed by GPUDivergenceAnalysis.
bool shouldUseGPUDivergenceAnalysis(const Function &F,
const TargetTransformInfo &TTI,
const LoopInfo &LI);
void run(Function &F, TargetTransformInfo &TTI, DominatorTree &DT,
PostDominatorTree &PDT, const LoopInfo &LI);
protected:
// (optional) handle to new DivergenceAnalysis
std::unique_ptr<DivergenceInfo> gpuDA;
// Stores all divergent values.
DenseSet<const Value *> DivergentValues;
// Stores divergent uses of possibly uniform values.
DenseSet<const Use *> DivergentUses;
};
class LegacyDivergenceAnalysis : public FunctionPass,
public LegacyDivergenceAnalysisImpl {
public:
static char ID;
LegacyDivergenceAnalysis();
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnFunction(Function &F) override;
};
class LegacyDivergenceAnalysisPass
: public PassInfoMixin<LegacyDivergenceAnalysisPass>,
public LegacyDivergenceAnalysisImpl {
public:
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
private:
// (optional) handle to new DivergenceAnalysis
std::unique_ptr<DivergenceInfo> gpuDA;
// Stores all divergent values.
DenseSet<const Value *> DivergentValues;
// Stores divergent uses of possibly uniform values.
DenseSet<const Use *> DivergentUses;
};
} // end namespace llvm
#endif // LLVM_ANALYSIS_LEGACYDIVERGENCEANALYSIS_H
PK iwFZ���s}* }* Analysis/DOTGraphTraitsPass.hnu �[��� //===-- DOTGraphTraitsPass.h - Print/View dotty graphs-----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Templates to create dotty viewer and printer passes for GraphTraits graphs.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_DOTGRAPHTRAITSPASS_H
#define LLVM_ANALYSIS_DOTGRAPHTRAITSPASS_H
#include "llvm/Analysis/CFGPrinter.h"
#include "llvm/Support/FileSystem.h"
#include "llvm/Support/GraphWriter.h"
namespace llvm {
/// Default traits class for extracting a graph from an analysis pass.
///
/// This assumes that 'GraphT' is 'AnalysisT::Result *', and pass it through
template <typename Result, typename GraphT = Result *>
struct DefaultAnalysisGraphTraits {
static GraphT getGraph(Result R) { return &R; }
};
template <typename GraphT>
void viewGraphForFunction(Function &F, GraphT Graph, StringRef Name,
bool IsSimple) {
std::string GraphName = DOTGraphTraits<GraphT *>::getGraphName(&Graph);
ViewGraph(Graph, Name, IsSimple,
GraphName + " for '" + F.getName() + "' function");
}
template <typename AnalysisT, bool IsSimple,
typename GraphT = typename AnalysisT::Result *,
typename AnalysisGraphTraitsT =
DefaultAnalysisGraphTraits<typename AnalysisT::Result &, GraphT>>
struct DOTGraphTraitsViewer
: PassInfoMixin<DOTGraphTraitsViewer<AnalysisT, IsSimple, GraphT,
AnalysisGraphTraitsT>> {
DOTGraphTraitsViewer(StringRef GraphName) : Name(GraphName) {}
/// Return true if this function should be processed.
///
/// An implementation of this class my override this function to indicate that
/// only certain functions should be viewed.
///
/// @param Result The current analysis result for this function.
virtual bool processFunction(Function &F,
const typename AnalysisT::Result &Result) {
return true;
}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &FAM) {
auto &Result = FAM.getResult<AnalysisT>(F);
if (!processFunction(F, Result))
return PreservedAnalyses::all();
GraphT Graph = AnalysisGraphTraitsT::getGraph(Result);
viewGraphForFunction(F, Graph, Name, IsSimple);
return PreservedAnalyses::all();
};
protected:
/// Avoid compiler warning "has virtual functions but non-virtual destructor
/// [-Wnon-virtual-dtor]" in derived classes.
///
/// DOTGraphTraitsViewer is also used as a mixin for avoiding repeated
/// implementation of viewer passes, ie there should be no
/// runtime-polymorphisms/downcasting involving this class and hence no
/// virtual destructor needed. Making this dtor protected stops accidental
/// invocation when the derived class destructor should have been called.
/// Those derived classes sould be marked final to avoid the warning.
~DOTGraphTraitsViewer() {}
private:
StringRef Name;
};
template <typename GraphT>
void printGraphForFunction(Function &F, GraphT Graph, StringRef Name,
bool IsSimple) {
std::string Filename = Name.str() + "." + F.getName().str() + ".dot";
std::error_code EC;
errs() << "Writing '" << Filename << "'...";
raw_fd_ostream File(Filename, EC, sys::fs::OF_TextWithCRLF);
std::string GraphName = DOTGraphTraits<GraphT>::getGraphName(Graph);
if (!EC)
WriteGraph(File, Graph, IsSimple,
GraphName + " for '" + F.getName() + "' function");
else
errs() << " error opening file for writing!";
errs() << "\n";
}
template <typename AnalysisT, bool IsSimple,
typename GraphT = typename AnalysisT::Result *,
typename AnalysisGraphTraitsT =
DefaultAnalysisGraphTraits<typename AnalysisT::Result &, GraphT>>
struct DOTGraphTraitsPrinter
: PassInfoMixin<DOTGraphTraitsPrinter<AnalysisT, IsSimple, GraphT,
AnalysisGraphTraitsT>> {
DOTGraphTraitsPrinter(StringRef GraphName) : Name(GraphName) {}
/// Return true if this function should be processed.
///
/// An implementation of this class my override this function to indicate that
/// only certain functions should be viewed.
///
/// @param Result The current analysis result for this function.
virtual bool processFunction(Function &F,
const typename AnalysisT::Result &Result) {
return true;
}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &FAM) {
auto &Result = FAM.getResult<AnalysisT>(F);
if (!processFunction(F, Result))
return PreservedAnalyses::all();
GraphT Graph = AnalysisGraphTraitsT::getGraph(Result);
printGraphForFunction(F, Graph, Name, IsSimple);
return PreservedAnalyses::all();
};
protected:
/// Avoid compiler warning "has virtual functions but non-virtual destructor
/// [-Wnon-virtual-dtor]" in derived classes.
///
/// DOTGraphTraitsPrinter is also used as a mixin for avoiding repeated
/// implementation of printer passes, ie there should be no
/// runtime-polymorphisms/downcasting involving this class and hence no
/// virtual destructor needed. Making this dtor protected stops accidental
/// invocation when the derived class destructor should have been called.
/// Those derived classes sould be marked final to avoid the warning.
~DOTGraphTraitsPrinter() {}
private:
StringRef Name;
};
/// Default traits class for extracting a graph from an analysis pass.
///
/// This assumes that 'GraphT' is 'AnalysisT *' and so just passes it through.
template <typename AnalysisT, typename GraphT = AnalysisT *>
struct LegacyDefaultAnalysisGraphTraits {
static GraphT getGraph(AnalysisT *A) { return A; }
};
template <typename AnalysisT, bool IsSimple, typename GraphT = AnalysisT *,
typename AnalysisGraphTraitsT =
LegacyDefaultAnalysisGraphTraits<AnalysisT, GraphT>>
class DOTGraphTraitsViewerWrapperPass : public FunctionPass {
public:
DOTGraphTraitsViewerWrapperPass(StringRef GraphName, char &ID)
: FunctionPass(ID), Name(GraphName) {}
/// Return true if this function should be processed.
///
/// An implementation of this class my override this function to indicate that
/// only certain functions should be viewed.
///
/// @param Analysis The current analysis result for this function.
virtual bool processFunction(Function &F, AnalysisT &Analysis) {
return true;
}
bool runOnFunction(Function &F) override {
auto &Analysis = getAnalysis<AnalysisT>();
if (!processFunction(F, Analysis))
return false;
GraphT Graph = AnalysisGraphTraitsT::getGraph(&Analysis);
viewGraphForFunction(F, Graph, Name, IsSimple);
return false;
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
AU.addRequired<AnalysisT>();
}
private:
std::string Name;
};
template <typename AnalysisT, bool IsSimple, typename GraphT = AnalysisT *,
typename AnalysisGraphTraitsT =
LegacyDefaultAnalysisGraphTraits<AnalysisT, GraphT>>
class DOTGraphTraitsPrinterWrapperPass : public FunctionPass {
public:
DOTGraphTraitsPrinterWrapperPass(StringRef GraphName, char &ID)
: FunctionPass(ID), Name(GraphName) {}
/// Return true if this function should be processed.
///
/// An implementation of this class my override this function to indicate that
/// only certain functions should be printed.
///
/// @param Analysis The current analysis result for this function.
virtual bool processFunction(Function &F, AnalysisT &Analysis) {
return true;
}
bool runOnFunction(Function &F) override {
auto &Analysis = getAnalysis<AnalysisT>();
if (!processFunction(F, Analysis))
return false;
GraphT Graph = AnalysisGraphTraitsT::getGraph(&Analysis);
printGraphForFunction(F, Graph, Name, IsSimple);
return false;
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
AU.addRequired<AnalysisT>();
}
private:
std::string Name;
};
template <typename AnalysisT, bool IsSimple, typename GraphT = AnalysisT *,
typename AnalysisGraphTraitsT =
LegacyDefaultAnalysisGraphTraits<AnalysisT, GraphT>>
class DOTGraphTraitsModuleViewerWrapperPass : public ModulePass {
public:
DOTGraphTraitsModuleViewerWrapperPass(StringRef GraphName, char &ID)
: ModulePass(ID), Name(GraphName) {}
bool runOnModule(Module &M) override {
GraphT Graph = AnalysisGraphTraitsT::getGraph(&getAnalysis<AnalysisT>());
std::string Title = DOTGraphTraits<GraphT>::getGraphName(Graph);
ViewGraph(Graph, Name, IsSimple, Title);
return false;
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
AU.addRequired<AnalysisT>();
}
private:
std::string Name;
};
template <typename AnalysisT, bool IsSimple, typename GraphT = AnalysisT *,
typename AnalysisGraphTraitsT =
LegacyDefaultAnalysisGraphTraits<AnalysisT, GraphT>>
class DOTGraphTraitsModulePrinterWrapperPass : public ModulePass {
public:
DOTGraphTraitsModulePrinterWrapperPass(StringRef GraphName, char &ID)
: ModulePass(ID), Name(GraphName) {}
bool runOnModule(Module &M) override {
GraphT Graph = AnalysisGraphTraitsT::getGraph(&getAnalysis<AnalysisT>());
std::string Filename = Name + ".dot";
std::error_code EC;
errs() << "Writing '" << Filename << "'...";
raw_fd_ostream File(Filename, EC, sys::fs::OF_TextWithCRLF);
std::string Title = DOTGraphTraits<GraphT>::getGraphName(Graph);
if (!EC)
WriteGraph(File, Graph, IsSimple, Title);
else
errs() << " error opening file for writing!";
errs() << "\n";
return false;
}
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
AU.addRequired<AnalysisT>();
}
private:
std::string Name;
};
template <typename GraphT>
void WriteDOTGraphToFile(Function &F, GraphT &&Graph,
std::string FileNamePrefix, bool IsSimple) {
std::string Filename = FileNamePrefix + "." + F.getName().str() + ".dot";
std::error_code EC;
errs() << "Writing '" << Filename << "'...";
raw_fd_ostream File(Filename, EC, sys::fs::OF_TextWithCRLF);
std::string GraphName = DOTGraphTraits<GraphT>::getGraphName(Graph);
std::string Title = GraphName + " for '" + F.getName().str() + "' function";
if (!EC)
WriteGraph(File, Graph, IsSimple, Title);
else
errs() << " error opening file for writing!";
errs() << "\n";
}
} // end namespace llvm
#endif
PK iwFZ<r8 r8 Analysis/RegionIterator.hnu �[��� //===- RegionIterator.h - Iterators to iteratate over Regions ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// This file defines the iterators to iterate over the elements of a Region.
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_REGIONITERATOR_H
#define LLVM_ANALYSIS_REGIONITERATOR_H
#include "llvm/ADT/DepthFirstIterator.h"
#include "llvm/ADT/GraphTraits.h"
#include "llvm/ADT/PointerIntPair.h"
#include "llvm/Analysis/RegionInfo.h"
#include <cassert>
#include <iterator>
#include <type_traits>
namespace llvm {
class BasicBlock;
class RegionInfo;
//===----------------------------------------------------------------------===//
/// Hierarchical RegionNode successor iterator.
///
/// This iterator iterates over all successors of a RegionNode.
///
/// For a BasicBlock RegionNode it skips all BasicBlocks that are not part of
/// the parent Region. Furthermore for BasicBlocks that start a subregion, a
/// RegionNode representing the subregion is returned.
///
/// For a subregion RegionNode there is just one successor. The RegionNode
/// representing the exit of the subregion.
template <class NodeRef, class BlockT, class RegionT> class RNSuccIterator {
public:
using iterator_category = std::forward_iterator_tag;
using value_type = NodeRef;
using difference_type = std::ptrdiff_t;
using pointer = value_type *;
using reference = value_type &;
private:
using BlockTraits = GraphTraits<BlockT *>;
using SuccIterTy = typename BlockTraits::ChildIteratorType;
// The iterator works in two modes, bb mode or region mode.
enum ItMode {
// In BB mode it returns all successors of this BasicBlock as its
// successors.
ItBB,
// In region mode there is only one successor, thats the regionnode mapping
// to the exit block of the regionnode
ItRgBegin, // At the beginning of the regionnode successor.
ItRgEnd // At the end of the regionnode successor.
};
static_assert(std::is_pointer<NodeRef>::value,
"FIXME: Currently RNSuccIterator only supports NodeRef as "
"pointers due to the use of pointer-specific data structures "
"(e.g. PointerIntPair and SmallPtrSet) internally. Generalize "
"it to support non-pointer types");
// Use two bit to represent the mode iterator.
PointerIntPair<NodeRef, 2, ItMode> Node;
// The block successor iterator.
SuccIterTy BItor;
// advanceRegionSucc - A region node has only one successor. It reaches end
// once we advance it.
void advanceRegionSucc() {
assert(Node.getInt() == ItRgBegin && "Cannot advance region successor!");
Node.setInt(ItRgEnd);
}
NodeRef getNode() const { return Node.getPointer(); }
// isRegionMode - Is the current iterator in region mode?
bool isRegionMode() const { return Node.getInt() != ItBB; }
// Get the immediate successor. This function may return a Basic Block
// RegionNode or a subregion RegionNode.
NodeRef getISucc(BlockT *BB) const {
NodeRef succ;
succ = getNode()->getParent()->getNode(BB);
assert(succ && "BB not in Region or entered subregion!");
return succ;
}
// getRegionSucc - Return the successor basic block of a SubRegion RegionNode.
inline BlockT* getRegionSucc() const {
assert(Node.getInt() == ItRgBegin && "Cannot get the region successor!");
return getNode()->template getNodeAs<RegionT>()->getExit();
}
// isExit - Is this the exit BB of the Region?
inline bool isExit(BlockT* BB) const {
return getNode()->getParent()->getExit() == BB;
}
public:
using Self = RNSuccIterator<NodeRef, BlockT, RegionT>;
/// Create begin iterator of a RegionNode.
inline RNSuccIterator(NodeRef node)
: Node(node, node->isSubRegion() ? ItRgBegin : ItBB),
BItor(BlockTraits::child_begin(node->getEntry())) {
// Skip the exit block
if (!isRegionMode())
while (BlockTraits::child_end(node->getEntry()) != BItor && isExit(*BItor))
++BItor;
if (isRegionMode() && isExit(getRegionSucc()))
advanceRegionSucc();
}
/// Create an end iterator.
inline RNSuccIterator(NodeRef node, bool)
: Node(node, node->isSubRegion() ? ItRgEnd : ItBB),
BItor(BlockTraits::child_end(node->getEntry())) {}
inline bool operator==(const Self& x) const {
assert(isRegionMode() == x.isRegionMode() && "Broken iterator!");
if (isRegionMode())
return Node.getInt() == x.Node.getInt();
else
return BItor == x.BItor;
}
inline bool operator!=(const Self& x) const { return !operator==(x); }
inline value_type operator*() const {
BlockT *BB = isRegionMode() ? getRegionSucc() : *BItor;
assert(!isExit(BB) && "Iterator out of range!");
return getISucc(BB);
}
inline Self& operator++() {
if(isRegionMode()) {
// The Region only has 1 successor.
advanceRegionSucc();
} else {
// Skip the exit.
do
++BItor;
while (BItor != BlockTraits::child_end(getNode()->getEntry())
&& isExit(*BItor));
}
return *this;
}
inline Self operator++(int) {
Self tmp = *this;
++*this;
return tmp;
}
};
//===----------------------------------------------------------------------===//
/// Flat RegionNode iterator.
///
/// The Flat Region iterator will iterate over all BasicBlock RegionNodes that
/// are contained in the Region and its subregions. This is close to a virtual
/// control flow graph of the Region.
template <class NodeRef, class BlockT, class RegionT>
class RNSuccIterator<FlatIt<NodeRef>, BlockT, RegionT> {
using BlockTraits = GraphTraits<BlockT *>;
using SuccIterTy = typename BlockTraits::ChildIteratorType;
NodeRef Node;
SuccIterTy Itor;
public:
using iterator_category = std::forward_iterator_tag;
using value_type = NodeRef;
using difference_type = std::ptrdiff_t;
using pointer = value_type *;
using reference = value_type &;
using Self = RNSuccIterator<FlatIt<NodeRef>, BlockT, RegionT>;
/// Create the iterator from a RegionNode.
///
/// Note that the incoming node must be a bb node, otherwise it will trigger
/// an assertion when we try to get a BasicBlock.
inline RNSuccIterator(NodeRef node)
: Node(node), Itor(BlockTraits::child_begin(node->getEntry())) {
assert(!Node->isSubRegion() &&
"Subregion node not allowed in flat iterating mode!");
assert(Node->getParent() && "A BB node must have a parent!");
// Skip the exit block of the iterating region.
while (BlockTraits::child_end(Node->getEntry()) != Itor &&
Node->getParent()->getExit() == *Itor)
++Itor;
}
/// Create an end iterator
inline RNSuccIterator(NodeRef node, bool)
: Node(node), Itor(BlockTraits::child_end(node->getEntry())) {
assert(!Node->isSubRegion() &&
"Subregion node not allowed in flat iterating mode!");
}
inline bool operator==(const Self& x) const {
assert(Node->getParent() == x.Node->getParent()
&& "Cannot compare iterators of different regions!");
return Itor == x.Itor && Node == x.Node;
}
inline bool operator!=(const Self& x) const { return !operator==(x); }
inline value_type operator*() const {
BlockT *BB = *Itor;
// Get the iterating region.
RegionT *Parent = Node->getParent();
// The only case that the successor reaches out of the region is it reaches
// the exit of the region.
assert(Parent->getExit() != BB && "iterator out of range!");
return Parent->getBBNode(BB);
}
inline Self& operator++() {
// Skip the exit block of the iterating region.
do
++Itor;
while (Itor != succ_end(Node->getEntry())
&& Node->getParent()->getExit() == *Itor);
return *this;
}
inline Self operator++(int) {
Self tmp = *this;
++*this;
return tmp;
}
};
template <class NodeRef, class BlockT, class RegionT>
inline RNSuccIterator<NodeRef, BlockT, RegionT> succ_begin(NodeRef Node) {
return RNSuccIterator<NodeRef, BlockT, RegionT>(Node);
}
template <class NodeRef, class BlockT, class RegionT>
inline RNSuccIterator<NodeRef, BlockT, RegionT> succ_end(NodeRef Node) {
return RNSuccIterator<NodeRef, BlockT, RegionT>(Node, true);
}
//===--------------------------------------------------------------------===//
// RegionNode GraphTraits specialization so the bbs in the region can be
// iterate by generic graph iterators.
//
// NodeT can either be region node or const region node, otherwise child_begin
// and child_end fail.
#define RegionNodeGraphTraits(NodeT, BlockT, RegionT) \
template <> struct GraphTraits<NodeT *> { \
using NodeRef = NodeT *; \
using ChildIteratorType = RNSuccIterator<NodeRef, BlockT, RegionT>; \
static NodeRef getEntryNode(NodeRef N) { return N; } \
static inline ChildIteratorType child_begin(NodeRef N) { \
return RNSuccIterator<NodeRef, BlockT, RegionT>(N); \
} \
static inline ChildIteratorType child_end(NodeRef N) { \
return RNSuccIterator<NodeRef, BlockT, RegionT>(N, true); \
} \
}; \
template <> struct GraphTraits<FlatIt<NodeT *>> { \
using NodeRef = NodeT *; \
using ChildIteratorType = \
RNSuccIterator<FlatIt<NodeRef>, BlockT, RegionT>; \
static NodeRef getEntryNode(NodeRef N) { return N; } \
static inline ChildIteratorType child_begin(NodeRef N) { \
return RNSuccIterator<FlatIt<NodeRef>, BlockT, RegionT>(N); \
} \
static inline ChildIteratorType child_end(NodeRef N) { \
return RNSuccIterator<FlatIt<NodeRef>, BlockT, RegionT>(N, true); \
} \
}
#define RegionGraphTraits(RegionT, NodeT) \
template <> struct GraphTraits<RegionT *> : public GraphTraits<NodeT *> { \
using nodes_iterator = df_iterator<NodeRef>; \
static NodeRef getEntryNode(RegionT *R) { \
return R->getNode(R->getEntry()); \
} \
static nodes_iterator nodes_begin(RegionT *R) { \
return nodes_iterator::begin(getEntryNode(R)); \
} \
static nodes_iterator nodes_end(RegionT *R) { \
return nodes_iterator::end(getEntryNode(R)); \
} \
}; \
template <> \
struct GraphTraits<FlatIt<RegionT *>> \
: public GraphTraits<FlatIt<NodeT *>> { \
using nodes_iterator = \
df_iterator<NodeRef, df_iterator_default_set<NodeRef>, false, \
GraphTraits<FlatIt<NodeRef>>>; \
static NodeRef getEntryNode(RegionT *R) { \
return R->getBBNode(R->getEntry()); \
} \
static nodes_iterator nodes_begin(RegionT *R) { \
return nodes_iterator::begin(getEntryNode(R)); \
} \
static nodes_iterator nodes_end(RegionT *R) { \
return nodes_iterator::end(getEntryNode(R)); \
} \
}
RegionNodeGraphTraits(RegionNode, BasicBlock, Region);
RegionNodeGraphTraits(const RegionNode, BasicBlock, Region);
RegionGraphTraits(Region, RegionNode);
RegionGraphTraits(const Region, const RegionNode);
template <> struct GraphTraits<RegionInfo*>
: public GraphTraits<FlatIt<RegionNode*>> {
using nodes_iterator =
df_iterator<NodeRef, df_iterator_default_set<NodeRef>, false,
GraphTraits<FlatIt<NodeRef>>>;
static NodeRef getEntryNode(RegionInfo *RI) {
return GraphTraits<FlatIt<Region*>>::getEntryNode(RI->getTopLevelRegion());
}
static nodes_iterator nodes_begin(RegionInfo* RI) {
return nodes_iterator::begin(getEntryNode(RI));
}
static nodes_iterator nodes_end(RegionInfo *RI) {
return nodes_iterator::end(getEntryNode(RI));
}
};
template <> struct GraphTraits<RegionInfoPass*>
: public GraphTraits<RegionInfo *> {
using nodes_iterator =
df_iterator<NodeRef, df_iterator_default_set<NodeRef>, false,
GraphTraits<FlatIt<NodeRef>>>;
static NodeRef getEntryNode(RegionInfoPass *RI) {
return GraphTraits<RegionInfo*>::getEntryNode(&RI->getRegionInfo());
}
static nodes_iterator nodes_begin(RegionInfoPass* RI) {
return GraphTraits<RegionInfo*>::nodes_begin(&RI->getRegionInfo());
}
static nodes_iterator nodes_end(RegionInfoPass *RI) {
return GraphTraits<RegionInfo*>::nodes_end(&RI->getRegionInfo());
}
};
} // end namespace llvm
#endif // LLVM_ANALYSIS_REGIONITERATOR_H
PK iwFZ���" " Analysis/ScopedNoAliasAA.hnu �[��� //===- ScopedNoAliasAA.h - Scoped No-Alias Alias Analysis -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
/// \file
/// This is the interface for a metadata-based scoped no-alias analysis.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_SCOPEDNOALIASAA_H
#define LLVM_ANALYSIS_SCOPEDNOALIASAA_H
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
#include <memory>
namespace llvm {
class Function;
class MDNode;
class MemoryLocation;
/// A simple AA result which uses scoped-noalias metadata to answer queries.
class ScopedNoAliasAAResult : public AAResultBase {
public:
/// Handle invalidation events from the new pass manager.
///
/// By definition, this result is stateless and so remains valid.
bool invalidate(Function &, const PreservedAnalyses &,
FunctionAnalysisManager::Invalidator &) {
return false;
}
AliasResult alias(const MemoryLocation &LocA, const MemoryLocation &LocB,
AAQueryInfo &AAQI, const Instruction *CtxI);
ModRefInfo getModRefInfo(const CallBase *Call, const MemoryLocation &Loc,
AAQueryInfo &AAQI);
ModRefInfo getModRefInfo(const CallBase *Call1, const CallBase *Call2,
AAQueryInfo &AAQI);
private:
bool mayAliasInScopes(const MDNode *Scopes, const MDNode *NoAlias) const;
};
/// Analysis pass providing a never-invalidated alias analysis result.
class ScopedNoAliasAA : public AnalysisInfoMixin<ScopedNoAliasAA> {
friend AnalysisInfoMixin<ScopedNoAliasAA>;
static AnalysisKey Key;
public:
using Result = ScopedNoAliasAAResult;
ScopedNoAliasAAResult run(Function &F, FunctionAnalysisManager &AM);
};
/// Legacy wrapper pass to provide the ScopedNoAliasAAResult object.
class ScopedNoAliasAAWrapperPass : public ImmutablePass {
std::unique_ptr<ScopedNoAliasAAResult> Result;
public:
static char ID;
ScopedNoAliasAAWrapperPass();
ScopedNoAliasAAResult &getResult() { return *Result; }
const ScopedNoAliasAAResult &getResult() const { return *Result; }
bool doInitialization(Module &M) override;
bool doFinalization(Module &M) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
};
//===--------------------------------------------------------------------===//
//
// createScopedNoAliasAAWrapperPass - This pass implements metadata-based
// scoped noalias analysis.
//
ImmutablePass *createScopedNoAliasAAWrapperPass();
} // end namespace llvm
#endif // LLVM_ANALYSIS_SCOPEDNOALIASAA_H
PK iwFZ�a�D� � Analysis/CallPrinter.hnu �[��� //===-- CallPrinter.h - Call graph printer external interface ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines external functions that can be called to explicitly
// instantiate the call graph printer.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_CALLPRINTER_H
#define LLVM_ANALYSIS_CALLPRINTER_H
#include "llvm/IR/PassManager.h"
namespace llvm {
class ModulePass;
/// Pass for printing the call graph to a dot file
class CallGraphDOTPrinterPass : public PassInfoMixin<CallGraphDOTPrinterPass> {
public:
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
};
/// Pass for viewing the call graph
class CallGraphViewerPass : public PassInfoMixin<CallGraphViewerPass> {
public:
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
};
ModulePass *createCallGraphViewerPass();
ModulePass *createCallGraphDOTPrinterPass();
} // end namespace llvm
#endif
PK iwFZ��6�W �W # Analysis/MemoryDependenceAnalysis.hnu �[��� //===- llvm/Analysis/MemoryDependenceAnalysis.h - Memory Deps ---*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the MemoryDependenceAnalysis analysis pass.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_MEMORYDEPENDENCEANALYSIS_H
#define LLVM_ANALYSIS_MEMORYDEPENDENCEANALYSIS_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/PointerEmbeddedInt.h"
#include "llvm/ADT/PointerIntPair.h"
#include "llvm/ADT/PointerSumType.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/Analysis/MemoryLocation.h"
#include "llvm/IR/PassManager.h"
#include "llvm/IR/PredIteratorCache.h"
#include "llvm/IR/ValueHandle.h"
#include "llvm/Pass.h"
#include <optional>
namespace llvm {
class AAResults;
class AssumptionCache;
class BatchAAResults;
class DominatorTree;
class PHITransAddr;
/// A memory dependence query can return one of three different answers.
class MemDepResult {
enum DepType {
/// Clients of MemDep never see this.
///
/// Entries with this marker occur in a LocalDeps map or NonLocalDeps map
/// when the instruction they previously referenced was removed from
/// MemDep. In either case, the entry may include an instruction pointer.
/// If so, the pointer is an instruction in the block where scanning can
/// start from, saving some work.
///
/// In a default-constructed MemDepResult object, the type will be Invalid
/// and the instruction pointer will be null.
Invalid = 0,
/// This is a dependence on the specified instruction which clobbers the
/// desired value. The pointer member of the MemDepResult pair holds the
/// instruction that clobbers the memory. For example, this occurs when we
/// see a may-aliased store to the memory location we care about.
///
/// There are several cases that may be interesting here:
/// 1. Loads are clobbered by may-alias stores.
/// 2. Loads are considered clobbered by partially-aliased loads. The
/// client may choose to analyze deeper into these cases.
Clobber,
/// This is a dependence on the specified instruction which defines or
/// produces the desired memory location. The pointer member of the
/// MemDepResult pair holds the instruction that defines the memory.
///
/// Cases of interest:
/// 1. This could be a load or store for dependence queries on
/// load/store. The value loaded or stored is the produced value.
/// Note that the pointer operand may be different than that of the
/// queried pointer due to must aliases and phi translation. Note
/// that the def may not be the same type as the query, the pointers
/// may just be must aliases.
/// 2. For loads and stores, this could be an allocation instruction. In
/// this case, the load is loading an undef value or a store is the
/// first store to (that part of) the allocation.
/// 3. Dependence queries on calls return Def only when they are readonly
/// calls or memory use intrinsics with identical callees and no
/// intervening clobbers. No validation is done that the operands to
/// the calls are the same.
/// 4. For loads and stores, this could be a select instruction that
/// defines pointer to this memory location. In this case, users can
/// find non-clobbered Defs for both select values that are reaching
// the desired memory location (there is still a guarantee that there
// are no clobbers between analyzed memory location and select).
Def,
/// This marker indicates that the query has no known dependency in the
/// specified block.
///
/// More detailed state info is encoded in the upper part of the pair (i.e.
/// the Instruction*)
Other
};
/// If DepType is "Other", the upper part of the sum type is an encoding of
/// the following more detailed type information.
enum OtherType {
/// This marker indicates that the query has no dependency in the specified
/// block.
///
/// To find out more, the client should query other predecessor blocks.
NonLocal = 1,
/// This marker indicates that the query has no dependency in the specified
/// function.
NonFuncLocal,
/// This marker indicates that the query dependency is unknown.
Unknown
};
using ValueTy = PointerSumType<
DepType, PointerSumTypeMember<Invalid, Instruction *>,
PointerSumTypeMember<Clobber, Instruction *>,
PointerSumTypeMember<Def, Instruction *>,
PointerSumTypeMember<Other, PointerEmbeddedInt<OtherType, 3>>>;
ValueTy Value;
explicit MemDepResult(ValueTy V) : Value(V) {}
public:
MemDepResult() = default;
/// get methods: These are static ctor methods for creating various
/// MemDepResult kinds.
static MemDepResult getDef(Instruction *Inst) {
assert(Inst && "Def requires inst");
return MemDepResult(ValueTy::create<Def>(Inst));
}
static MemDepResult getClobber(Instruction *Inst) {
assert(Inst && "Clobber requires inst");
return MemDepResult(ValueTy::create<Clobber>(Inst));
}
static MemDepResult getNonLocal() {
return MemDepResult(ValueTy::create<Other>(NonLocal));
}
static MemDepResult getNonFuncLocal() {
return MemDepResult(ValueTy::create<Other>(NonFuncLocal));
}
static MemDepResult getUnknown() {
return MemDepResult(ValueTy::create<Other>(Unknown));
}
/// Tests if this MemDepResult represents a query that is an instruction
/// clobber dependency.
bool isClobber() const { return Value.is<Clobber>(); }
/// Tests if this MemDepResult represents a query that is an instruction
/// definition dependency.
bool isDef() const { return Value.is<Def>(); }
/// Tests if this MemDepResult represents a valid local query (Clobber/Def).
bool isLocal() const { return isClobber() || isDef(); }
/// Tests if this MemDepResult represents a query that is transparent to the
/// start of the block, but where a non-local hasn't been done.
bool isNonLocal() const {
return Value.is<Other>() && Value.cast<Other>() == NonLocal;
}
/// Tests if this MemDepResult represents a query that is transparent to the
/// start of the function.
bool isNonFuncLocal() const {
return Value.is<Other>() && Value.cast<Other>() == NonFuncLocal;
}
/// Tests if this MemDepResult represents a query which cannot and/or will
/// not be computed.
bool isUnknown() const {
return Value.is<Other>() && Value.cast<Other>() == Unknown;
}
/// If this is a normal dependency, returns the instruction that is depended
/// on. Otherwise, returns null.
Instruction *getInst() const {
switch (Value.getTag()) {
case Invalid:
return Value.cast<Invalid>();
case Clobber:
return Value.cast<Clobber>();
case Def:
return Value.cast<Def>();
case Other:
return nullptr;
}
llvm_unreachable("Unknown discriminant!");
}
bool operator==(const MemDepResult &M) const { return Value == M.Value; }
bool operator!=(const MemDepResult &M) const { return Value != M.Value; }
bool operator<(const MemDepResult &M) const { return Value < M.Value; }
bool operator>(const MemDepResult &M) const { return Value > M.Value; }
private:
friend class MemoryDependenceResults;
/// Tests if this is a MemDepResult in its dirty/invalid. state.
bool isDirty() const { return Value.is<Invalid>(); }
static MemDepResult getDirty(Instruction *Inst) {
return MemDepResult(ValueTy::create<Invalid>(Inst));
}
};
/// This is an entry in the NonLocalDepInfo cache.
///
/// For each BasicBlock (the BB entry) it keeps a MemDepResult.
class NonLocalDepEntry {
BasicBlock *BB;
MemDepResult Result;
public:
NonLocalDepEntry(BasicBlock *BB, MemDepResult Result)
: BB(BB), Result(Result) {}
// This is used for searches.
NonLocalDepEntry(BasicBlock *BB) : BB(BB) {}
// BB is the sort key, it can't be changed.
BasicBlock *getBB() const { return BB; }
void setResult(const MemDepResult &R) { Result = R; }
const MemDepResult &getResult() const { return Result; }
bool operator<(const NonLocalDepEntry &RHS) const { return BB < RHS.BB; }
};
/// This is a result from a NonLocal dependence query.
///
/// For each BasicBlock (the BB entry) it keeps a MemDepResult and the
/// (potentially phi translated) address that was live in the block.
class NonLocalDepResult {
NonLocalDepEntry Entry;
Value *Address;
public:
NonLocalDepResult(BasicBlock *BB, MemDepResult Result, Value *Address)
: Entry(BB, Result), Address(Address) {}
// BB is the sort key, it can't be changed.
BasicBlock *getBB() const { return Entry.getBB(); }
void setResult(const MemDepResult &R, Value *Addr) {
Entry.setResult(R);
Address = Addr;
}
const MemDepResult &getResult() const { return Entry.getResult(); }
/// Returns the address of this pointer in this block.
///
/// This can be different than the address queried for the non-local result
/// because of phi translation. This returns null if the address was not
/// available in a block (i.e. because phi translation failed) or if this is
/// a cached result and that address was deleted.
///
/// The address is always null for a non-local 'call' dependence.
Value *getAddress() const { return Address; }
};
/// Provides a lazy, caching interface for making common memory aliasing
/// information queries, backed by LLVM's alias analysis passes.
///
/// The dependency information returned is somewhat unusual, but is pragmatic.
/// If queried about a store or call that might modify memory, the analysis
/// will return the instruction[s] that may either load from that memory or
/// store to it. If queried with a load or call that can never modify memory,
/// the analysis will return calls and stores that might modify the pointer,
/// but generally does not return loads unless a) they are volatile, or
/// b) they load from *must-aliased* pointers. Returning a dependence on
/// must-alias'd pointers instead of all pointers interacts well with the
/// internal caching mechanism.
class MemoryDependenceResults {
// A map from instructions to their dependency.
using LocalDepMapType = DenseMap<Instruction *, MemDepResult>;
LocalDepMapType LocalDeps;
public:
using NonLocalDepInfo = std::vector<NonLocalDepEntry>;
private:
/// A pair<Value*, bool> where the bool is true if the dependence is a read
/// only dependence, false if read/write.
using ValueIsLoadPair = PointerIntPair<const Value *, 1, bool>;
/// This pair is used when caching information for a block.
///
/// If the pointer is null, the cache value is not a full query that starts
/// at the specified block. If non-null, the bool indicates whether or not
/// the contents of the block was skipped.
using BBSkipFirstBlockPair = PointerIntPair<BasicBlock *, 1, bool>;
/// This record is the information kept for each (value, is load) pair.
struct NonLocalPointerInfo {
/// The pair of the block and the skip-first-block flag.
BBSkipFirstBlockPair Pair;
/// The results of the query for each relevant block.
NonLocalDepInfo NonLocalDeps;
/// The maximum size of the dereferences of the pointer.
///
/// May be UnknownSize if the sizes are unknown.
LocationSize Size = LocationSize::afterPointer();
/// The AA tags associated with dereferences of the pointer.
///
/// The members may be null if there are no tags or conflicting tags.
AAMDNodes AATags;
NonLocalPointerInfo() = default;
};
/// Cache storing single nonlocal def for the instruction.
/// It is set when nonlocal def would be found in function returning only
/// local dependencies.
DenseMap<AssertingVH<const Value>, NonLocalDepResult> NonLocalDefsCache;
using ReverseNonLocalDefsCacheTy =
DenseMap<Instruction *, SmallPtrSet<const Value*, 4>>;
ReverseNonLocalDefsCacheTy ReverseNonLocalDefsCache;
/// This map stores the cached results of doing a pointer lookup at the
/// bottom of a block.
///
/// The key of this map is the pointer+isload bit, the value is a list of
/// <bb->result> mappings.
using CachedNonLocalPointerInfo =
DenseMap<ValueIsLoadPair, NonLocalPointerInfo>;
CachedNonLocalPointerInfo NonLocalPointerDeps;
// A map from instructions to their non-local pointer dependencies.
using ReverseNonLocalPtrDepTy =
DenseMap<Instruction *, SmallPtrSet<ValueIsLoadPair, 4>>;
ReverseNonLocalPtrDepTy ReverseNonLocalPtrDeps;
/// This is the instruction we keep for each cached access that we have for
/// an instruction.
///
/// The pointer is an owning pointer and the bool indicates whether we have
/// any dirty bits in the set.
using PerInstNLInfo = std::pair<NonLocalDepInfo, bool>;
// A map from instructions to their non-local dependencies.
using NonLocalDepMapType = DenseMap<Instruction *, PerInstNLInfo>;
NonLocalDepMapType NonLocalDepsMap;
// A reverse mapping from dependencies to the dependees. This is
// used when removing instructions to keep the cache coherent.
using ReverseDepMapType =
DenseMap<Instruction *, SmallPtrSet<Instruction *, 4>>;
ReverseDepMapType ReverseLocalDeps;
// A reverse mapping from dependencies to the non-local dependees.
ReverseDepMapType ReverseNonLocalDeps;
/// Current AA implementation, just a cache.
AAResults &AA;
AssumptionCache &AC;
const TargetLibraryInfo &TLI;
DominatorTree &DT;
PredIteratorCache PredCache;
unsigned DefaultBlockScanLimit;
/// Offsets to dependant clobber loads.
using ClobberOffsetsMapType = DenseMap<LoadInst *, int32_t>;
ClobberOffsetsMapType ClobberOffsets;
public:
MemoryDependenceResults(AAResults &AA, AssumptionCache &AC,
const TargetLibraryInfo &TLI, DominatorTree &DT,
unsigned DefaultBlockScanLimit)
: AA(AA), AC(AC), TLI(TLI), DT(DT),
DefaultBlockScanLimit(DefaultBlockScanLimit) {}
/// Handle invalidation in the new PM.
bool invalidate(Function &F, const PreservedAnalyses &PA,
FunctionAnalysisManager::Invalidator &Inv);
/// Some methods limit the number of instructions they will examine.
/// The return value of this method is the default limit that will be
/// used if no limit is explicitly passed in.
unsigned getDefaultBlockScanLimit() const;
/// Returns the instruction on which a memory operation depends.
///
/// See the class comment for more details. It is illegal to call this on
/// non-memory instructions.
MemDepResult getDependency(Instruction *QueryInst);
/// Perform a full dependency query for the specified call, returning the set
/// of blocks that the value is potentially live across.
///
/// The returned set of results will include a "NonLocal" result for all
/// blocks where the value is live across.
///
/// This method assumes the instruction returns a "NonLocal" dependency
/// within its own block.
///
/// This returns a reference to an internal data structure that may be
/// invalidated on the next non-local query or when an instruction is
/// removed. Clients must copy this data if they want it around longer than
/// that.
const NonLocalDepInfo &getNonLocalCallDependency(CallBase *QueryCall);
/// Perform a full dependency query for an access to the QueryInst's
/// specified memory location, returning the set of instructions that either
/// define or clobber the value.
///
/// Warning: For a volatile query instruction, the dependencies will be
/// accurate, and thus usable for reordering, but it is never legal to
/// remove the query instruction.
///
/// This method assumes the pointer has a "NonLocal" dependency within
/// QueryInst's parent basic block.
void getNonLocalPointerDependency(Instruction *QueryInst,
SmallVectorImpl<NonLocalDepResult> &Result);
/// Removes an instruction from the dependence analysis, updating the
/// dependence of instructions that previously depended on it.
void removeInstruction(Instruction *InstToRemove);
/// Invalidates cached information about the specified pointer, because it
/// may be too conservative in memdep.
///
/// This is an optional call that can be used when the client detects an
/// equivalence between the pointer and some other value and replaces the
/// other value with ptr. This can make Ptr available in more places that
/// cached info does not necessarily keep.
void invalidateCachedPointerInfo(Value *Ptr);
/// Clears the PredIteratorCache info.
///
/// This needs to be done when the CFG changes, e.g., due to splitting
/// critical edges.
void invalidateCachedPredecessors();
/// Returns the instruction on which a memory location depends.
///
/// If isLoad is true, this routine ignores may-aliases with read-only
/// operations. If isLoad is false, this routine ignores may-aliases
/// with reads from read-only locations. If possible, pass the query
/// instruction as well; this function may take advantage of the metadata
/// annotated to the query instruction to refine the result. \p Limit
/// can be used to set the maximum number of instructions that will be
/// examined to find the pointer dependency. On return, it will be set to
/// the number of instructions left to examine. If a null pointer is passed
/// in, the limit will default to the value of -memdep-block-scan-limit.
///
/// Note that this is an uncached query, and thus may be inefficient.
MemDepResult getPointerDependencyFrom(const MemoryLocation &Loc, bool isLoad,
BasicBlock::iterator ScanIt,
BasicBlock *BB,
Instruction *QueryInst = nullptr,
unsigned *Limit = nullptr);
MemDepResult getPointerDependencyFrom(const MemoryLocation &Loc, bool isLoad,
BasicBlock::iterator ScanIt,
BasicBlock *BB,
Instruction *QueryInst,
unsigned *Limit,
BatchAAResults &BatchAA);
MemDepResult
getSimplePointerDependencyFrom(const MemoryLocation &MemLoc, bool isLoad,
BasicBlock::iterator ScanIt, BasicBlock *BB,
Instruction *QueryInst, unsigned *Limit,
BatchAAResults &BatchAA);
/// This analysis looks for other loads and stores with invariant.group
/// metadata and the same pointer operand. Returns Unknown if it does not
/// find anything, and Def if it can be assumed that 2 instructions load or
/// store the same value and NonLocal which indicate that non-local Def was
/// found, which can be retrieved by calling getNonLocalPointerDependency
/// with the same queried instruction.
MemDepResult getInvariantGroupPointerDependency(LoadInst *LI, BasicBlock *BB);
/// Release memory in caches.
void releaseMemory();
/// Return the clobber offset to dependent instruction.
std::optional<int32_t> getClobberOffset(LoadInst *DepInst) const {
const auto Off = ClobberOffsets.find(DepInst);
if (Off != ClobberOffsets.end())
return Off->getSecond();
return std::nullopt;
}
private:
MemDepResult getCallDependencyFrom(CallBase *Call, bool isReadOnlyCall,
BasicBlock::iterator ScanIt,
BasicBlock *BB);
bool getNonLocalPointerDepFromBB(Instruction *QueryInst,
const PHITransAddr &Pointer,
const MemoryLocation &Loc, bool isLoad,
BasicBlock *BB,
SmallVectorImpl<NonLocalDepResult> &Result,
DenseMap<BasicBlock *, Value *> &Visited,
bool SkipFirstBlock = false,
bool IsIncomplete = false);
MemDepResult getNonLocalInfoForBlock(Instruction *QueryInst,
const MemoryLocation &Loc, bool isLoad,
BasicBlock *BB, NonLocalDepInfo *Cache,
unsigned NumSortedEntries,
BatchAAResults &BatchAA);
void removeCachedNonLocalPointerDependencies(ValueIsLoadPair P);
void verifyRemoved(Instruction *Inst) const;
};
/// An analysis that produces \c MemoryDependenceResults for a function.
///
/// This is essentially a no-op because the results are computed entirely
/// lazily.
class MemoryDependenceAnalysis
: public AnalysisInfoMixin<MemoryDependenceAnalysis> {
friend AnalysisInfoMixin<MemoryDependenceAnalysis>;
static AnalysisKey Key;
unsigned DefaultBlockScanLimit;
public:
using Result = MemoryDependenceResults;
MemoryDependenceAnalysis();
MemoryDependenceAnalysis(unsigned DefaultBlockScanLimit) : DefaultBlockScanLimit(DefaultBlockScanLimit) { }
MemoryDependenceResults run(Function &F, FunctionAnalysisManager &AM);
};
/// A wrapper analysis pass for the legacy pass manager that exposes a \c
/// MemoryDepnedenceResults instance.
class MemoryDependenceWrapperPass : public FunctionPass {
std::optional<MemoryDependenceResults> MemDep;
public:
static char ID;
MemoryDependenceWrapperPass();
~MemoryDependenceWrapperPass() override;
/// Pass Implementation stuff. This doesn't do any analysis eagerly.
bool runOnFunction(Function &) override;
/// Clean up memory in between runs
void releaseMemory() override;
/// Does not modify anything. It uses Value Numbering and Alias Analysis.
void getAnalysisUsage(AnalysisUsage &AU) const override;
MemoryDependenceResults &getMemDep() { return *MemDep; }
};
} // end namespace llvm
#endif // LLVM_ANALYSIS_MEMORYDEPENDENCEANALYSIS_H
PK iwFZa)n� n� Analysis/AliasAnalysis.hnu �[��� //===- llvm/Analysis/AliasAnalysis.h - Alias Analysis Interface -*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the generic AliasAnalysis interface, which is used as the
// common interface used by all clients of alias analysis information, and
// implemented by all alias analysis implementations. Mod/Ref information is
// also captured by this interface.
//
// Implementations of this interface must implement the various virtual methods,
// which automatically provides functionality for the entire suite of client
// APIs.
//
// This API identifies memory regions with the MemoryLocation class. The pointer
// component specifies the base memory address of the region. The Size specifies
// the maximum size (in address units) of the memory region, or
// MemoryLocation::UnknownSize if the size is not known. The TBAA tag
// identifies the "type" of the memory reference; see the
// TypeBasedAliasAnalysis class for details.
//
// Some non-obvious details include:
// - Pointers that point to two completely different objects in memory never
// alias, regardless of the value of the Size component.
// - NoAlias doesn't imply inequal pointers. The most obvious example of this
// is two pointers to constant memory. Even if they are equal, constant
// memory is never stored to, so there will never be any dependencies.
// In this and other situations, the pointers may be both NoAlias and
// MustAlias at the same time. The current API can only return one result,
// though this is rarely a problem in practice.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_ALIASANALYSIS_H
#define LLVM_ANALYSIS_ALIASANALYSIS_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/Sequence.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/Analysis/MemoryLocation.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
#include "llvm/Support/ModRef.h"
#include <cstdint>
#include <functional>
#include <memory>
#include <optional>
#include <vector>
namespace llvm {
class AnalysisUsage;
class AtomicCmpXchgInst;
class BasicBlock;
class CatchPadInst;
class CatchReturnInst;
class DominatorTree;
class FenceInst;
class Function;
class LoopInfo;
class PreservedAnalyses;
class TargetLibraryInfo;
class Value;
template <typename> class SmallPtrSetImpl;
/// The possible results of an alias query.
///
/// These results are always computed between two MemoryLocation objects as
/// a query to some alias analysis.
///
/// Note that these are unscoped enumerations because we would like to support
/// implicitly testing a result for the existence of any possible aliasing with
/// a conversion to bool, but an "enum class" doesn't support this. The
/// canonical names from the literature are suffixed and unique anyways, and so
/// they serve as global constants in LLVM for these results.
///
/// See docs/AliasAnalysis.html for more information on the specific meanings
/// of these values.
class AliasResult {
private:
static const int OffsetBits = 23;
static const int AliasBits = 8;
static_assert(AliasBits + 1 + OffsetBits <= 32,
"AliasResult size is intended to be 4 bytes!");
unsigned int Alias : AliasBits;
unsigned int HasOffset : 1;
signed int Offset : OffsetBits;
public:
enum Kind : uint8_t {
/// The two locations do not alias at all.
///
/// This value is arranged to convert to false, while all other values
/// convert to true. This allows a boolean context to convert the result to
/// a binary flag indicating whether there is the possibility of aliasing.
NoAlias = 0,
/// The two locations may or may not alias. This is the least precise
/// result.
MayAlias,
/// The two locations alias, but only due to a partial overlap.
PartialAlias,
/// The two locations precisely alias each other.
MustAlias,
};
static_assert(MustAlias < (1 << AliasBits),
"Not enough bit field size for the enum!");
explicit AliasResult() = delete;
constexpr AliasResult(const Kind &Alias)
: Alias(Alias), HasOffset(false), Offset(0) {}
operator Kind() const { return static_cast<Kind>(Alias); }
bool operator==(const AliasResult &Other) const {
return Alias == Other.Alias && HasOffset == Other.HasOffset &&
Offset == Other.Offset;
}
bool operator!=(const AliasResult &Other) const { return !(*this == Other); }
bool operator==(Kind K) const { return Alias == K; }
bool operator!=(Kind K) const { return !(*this == K); }
constexpr bool hasOffset() const { return HasOffset; }
constexpr int32_t getOffset() const {
assert(HasOffset && "No offset!");
return Offset;
}
void setOffset(int32_t NewOffset) {
if (isInt<OffsetBits>(NewOffset)) {
HasOffset = true;
Offset = NewOffset;
}
}
/// Helper for processing AliasResult for swapped memory location pairs.
void swap(bool DoSwap = true) {
if (DoSwap && hasOffset())
setOffset(-getOffset());
}
};
static_assert(sizeof(AliasResult) == 4,
"AliasResult size is intended to be 4 bytes!");
/// << operator for AliasResult.
raw_ostream &operator<<(raw_ostream &OS, AliasResult AR);
/// Virtual base class for providers of capture information.
struct CaptureInfo {
virtual ~CaptureInfo() = 0;
virtual bool isNotCapturedBeforeOrAt(const Value *Object,
const Instruction *I) = 0;
};
/// Context-free CaptureInfo provider, which computes and caches whether an
/// object is captured in the function at all, but does not distinguish whether
/// it was captured before or after the context instruction.
class SimpleCaptureInfo final : public CaptureInfo {
SmallDenseMap<const Value *, bool, 8> IsCapturedCache;
public:
bool isNotCapturedBeforeOrAt(const Value *Object,
const Instruction *I) override;
};
/// Context-sensitive CaptureInfo provider, which computes and caches the
/// earliest common dominator closure of all captures. It provides a good
/// approximation to a precise "captures before" analysis.
class EarliestEscapeInfo final : public CaptureInfo {
DominatorTree &DT;
const LoopInfo &LI;
/// Map from identified local object to an instruction before which it does
/// not escape, or nullptr if it never escapes. The "earliest" instruction
/// may be a conservative approximation, e.g. the first instruction in the
/// function is always a legal choice.
DenseMap<const Value *, Instruction *> EarliestEscapes;
/// Reverse map from instruction to the objects it is the earliest escape for.
/// This is used for cache invalidation purposes.
DenseMap<Instruction *, TinyPtrVector<const Value *>> Inst2Obj;
const SmallPtrSetImpl<const Value *> &EphValues;
public:
EarliestEscapeInfo(DominatorTree &DT, const LoopInfo &LI,
const SmallPtrSetImpl<const Value *> &EphValues)
: DT(DT), LI(LI), EphValues(EphValues) {}
bool isNotCapturedBeforeOrAt(const Value *Object,
const Instruction *I) override;
void removeInstruction(Instruction *I);
};
/// Cache key for BasicAA results. It only includes the pointer and size from
/// MemoryLocation, as BasicAA is AATags independent. Additionally, it includes
/// the value of MayBeCrossIteration, which may affect BasicAA results.
struct AACacheLoc {
using PtrTy = PointerIntPair<const Value *, 1, bool>;
PtrTy Ptr;
LocationSize Size;
AACacheLoc(PtrTy Ptr, LocationSize Size) : Ptr(Ptr), Size(Size) {}
AACacheLoc(const Value *Ptr, LocationSize Size, bool MayBeCrossIteration)
: Ptr(Ptr, MayBeCrossIteration), Size(Size) {}
};
template <> struct DenseMapInfo<AACacheLoc> {
static inline AACacheLoc getEmptyKey() {
return {DenseMapInfo<AACacheLoc::PtrTy>::getEmptyKey(),
DenseMapInfo<LocationSize>::getEmptyKey()};
}
static inline AACacheLoc getTombstoneKey() {
return {DenseMapInfo<AACacheLoc::PtrTy>::getTombstoneKey(),
DenseMapInfo<LocationSize>::getTombstoneKey()};
}
static unsigned getHashValue(const AACacheLoc &Val) {
return DenseMapInfo<AACacheLoc::PtrTy>::getHashValue(Val.Ptr) ^
DenseMapInfo<LocationSize>::getHashValue(Val.Size);
}
static bool isEqual(const AACacheLoc &LHS, const AACacheLoc &RHS) {
return LHS.Ptr == RHS.Ptr && LHS.Size == RHS.Size;
}
};
class AAResults;
/// This class stores info we want to provide to or retain within an alias
/// query. By default, the root query is stateless and starts with a freshly
/// constructed info object. Specific alias analyses can use this query info to
/// store per-query state that is important for recursive or nested queries to
/// avoid recomputing. To enable preserving this state across multiple queries
/// where safe (due to the IR not changing), use a `BatchAAResults` wrapper.
/// The information stored in an `AAQueryInfo` is currently limitted to the
/// caches used by BasicAA, but can further be extended to fit other AA needs.
class AAQueryInfo {
public:
using LocPair = std::pair<AACacheLoc, AACacheLoc>;
struct CacheEntry {
AliasResult Result;
/// Number of times a NoAlias assumption has been used.
/// 0 for assumptions that have not been used, -1 for definitive results.
int NumAssumptionUses;
/// Whether this is a definitive (non-assumption) result.
bool isDefinitive() const { return NumAssumptionUses < 0; }
};
// Alias analysis result aggregration using which this query is performed.
// Can be used to perform recursive queries.
AAResults &AAR;
using AliasCacheT = SmallDenseMap<LocPair, CacheEntry, 8>;
AliasCacheT AliasCache;
CaptureInfo *CI;
/// Query depth used to distinguish recursive queries.
unsigned Depth = 0;
/// How many active NoAlias assumption uses there are.
int NumAssumptionUses = 0;
/// Location pairs for which an assumption based result is currently stored.
/// Used to remove all potentially incorrect results from the cache if an
/// assumption is disproven.
SmallVector<AAQueryInfo::LocPair, 4> AssumptionBasedResults;
/// Tracks whether the accesses may be on different cycle iterations.
///
/// When interpret "Value" pointer equality as value equality we need to make
/// sure that the "Value" is not part of a cycle. Otherwise, two uses could
/// come from different "iterations" of a cycle and see different values for
/// the same "Value" pointer.
///
/// The following example shows the problem:
/// %p = phi(%alloca1, %addr2)
/// %l = load %ptr
/// %addr1 = gep, %alloca2, 0, %l
/// %addr2 = gep %alloca2, 0, (%l + 1)
/// alias(%p, %addr1) -> MayAlias !
/// store %l, ...
bool MayBeCrossIteration = false;
AAQueryInfo(AAResults &AAR, CaptureInfo *CI) : AAR(AAR), CI(CI) {}
};
/// AAQueryInfo that uses SimpleCaptureInfo.
class SimpleAAQueryInfo : public AAQueryInfo {
SimpleCaptureInfo CI;
public:
SimpleAAQueryInfo(AAResults &AAR) : AAQueryInfo(AAR, &CI) {}
};
class BatchAAResults;
class AAResults {
public:
// Make these results default constructable and movable. We have to spell
// these out because MSVC won't synthesize them.
AAResults(const TargetLibraryInfo &TLI) : TLI(TLI) {}
AAResults(AAResults &&Arg);
~AAResults();
/// Register a specific AA result.
template <typename AAResultT> void addAAResult(AAResultT &AAResult) {
// FIXME: We should use a much lighter weight system than the usual
// polymorphic pattern because we don't own AAResult. It should
// ideally involve two pointers and no separate allocation.
AAs.emplace_back(new Model<AAResultT>(AAResult, *this));
}
/// Register a function analysis ID that the results aggregation depends on.
///
/// This is used in the new pass manager to implement the invalidation logic
/// where we must invalidate the results aggregation if any of our component
/// analyses become invalid.
void addAADependencyID(AnalysisKey *ID) { AADeps.push_back(ID); }
/// Handle invalidation events in the new pass manager.
///
/// The aggregation is invalidated if any of the underlying analyses is
/// invalidated.
bool invalidate(Function &F, const PreservedAnalyses &PA,
FunctionAnalysisManager::Invalidator &Inv);
//===--------------------------------------------------------------------===//
/// \name Alias Queries
/// @{
/// The main low level interface to the alias analysis implementation.
/// Returns an AliasResult indicating whether the two pointers are aliased to
/// each other. This is the interface that must be implemented by specific
/// alias analysis implementations.
AliasResult alias(const MemoryLocation &LocA, const MemoryLocation &LocB);
/// A convenience wrapper around the primary \c alias interface.
AliasResult alias(const Value *V1, LocationSize V1Size, const Value *V2,
LocationSize V2Size) {
return alias(MemoryLocation(V1, V1Size), MemoryLocation(V2, V2Size));
}
/// A convenience wrapper around the primary \c alias interface.
AliasResult alias(const Value *V1, const Value *V2) {
return alias(MemoryLocation::getBeforeOrAfter(V1),
MemoryLocation::getBeforeOrAfter(V2));
}
/// A trivial helper function to check to see if the specified pointers are
/// no-alias.
bool isNoAlias(const MemoryLocation &LocA, const MemoryLocation &LocB) {
return alias(LocA, LocB) == AliasResult::NoAlias;
}
/// A convenience wrapper around the \c isNoAlias helper interface.
bool isNoAlias(const Value *V1, LocationSize V1Size, const Value *V2,
LocationSize V2Size) {
return isNoAlias(MemoryLocation(V1, V1Size), MemoryLocation(V2, V2Size));
}
/// A convenience wrapper around the \c isNoAlias helper interface.
bool isNoAlias(const Value *V1, const Value *V2) {
return isNoAlias(MemoryLocation::getBeforeOrAfter(V1),
MemoryLocation::getBeforeOrAfter(V2));
}
/// A trivial helper function to check to see if the specified pointers are
/// must-alias.
bool isMustAlias(const MemoryLocation &LocA, const MemoryLocation &LocB) {
return alias(LocA, LocB) == AliasResult::MustAlias;
}
/// A convenience wrapper around the \c isMustAlias helper interface.
bool isMustAlias(const Value *V1, const Value *V2) {
return alias(V1, LocationSize::precise(1), V2, LocationSize::precise(1)) ==
AliasResult::MustAlias;
}
/// Checks whether the given location points to constant memory, or if
/// \p OrLocal is true whether it points to a local alloca.
bool pointsToConstantMemory(const MemoryLocation &Loc, bool OrLocal = false) {
return isNoModRef(getModRefInfoMask(Loc, OrLocal));
}
/// A convenience wrapper around the primary \c pointsToConstantMemory
/// interface.
bool pointsToConstantMemory(const Value *P, bool OrLocal = false) {
return pointsToConstantMemory(MemoryLocation::getBeforeOrAfter(P), OrLocal);
}
/// @}
//===--------------------------------------------------------------------===//
/// \name Simple mod/ref information
/// @{
/// Returns a bitmask that should be unconditionally applied to the ModRef
/// info of a memory location. This allows us to eliminate Mod and/or Ref
/// from the ModRef info based on the knowledge that the memory location
/// points to constant and/or locally-invariant memory.
///
/// If IgnoreLocals is true, then this method returns NoModRef for memory
/// that points to a local alloca.
ModRefInfo getModRefInfoMask(const MemoryLocation &Loc,
bool IgnoreLocals = false);
/// A convenience wrapper around the primary \c getModRefInfoMask
/// interface.
ModRefInfo getModRefInfoMask(const Value *P, bool IgnoreLocals = false) {
return getModRefInfoMask(MemoryLocation::getBeforeOrAfter(P), IgnoreLocals);
}
/// Get the ModRef info associated with a pointer argument of a call. The
/// result's bits are set to indicate the allowed aliasing ModRef kinds. Note
/// that these bits do not necessarily account for the overall behavior of
/// the function, but rather only provide additional per-argument
/// information.
ModRefInfo getArgModRefInfo(const CallBase *Call, unsigned ArgIdx);
/// Return the behavior of the given call site.
MemoryEffects getMemoryEffects(const CallBase *Call);
/// Return the behavior when calling the given function.
MemoryEffects getMemoryEffects(const Function *F);
/// Checks if the specified call is known to never read or write memory.
///
/// Note that if the call only reads from known-constant memory, it is also
/// legal to return true. Also, calls that unwind the stack are legal for
/// this predicate.
///
/// Many optimizations (such as CSE and LICM) can be performed on such calls
/// without worrying about aliasing properties, and many calls have this
/// property (e.g. calls to 'sin' and 'cos').
///
/// This property corresponds to the GCC 'const' attribute.
bool doesNotAccessMemory(const CallBase *Call) {
return getMemoryEffects(Call).doesNotAccessMemory();
}
/// Checks if the specified function is known to never read or write memory.
///
/// Note that if the function only reads from known-constant memory, it is
/// also legal to return true. Also, function that unwind the stack are legal
/// for this predicate.
///
/// Many optimizations (such as CSE and LICM) can be performed on such calls
/// to such functions without worrying about aliasing properties, and many
/// functions have this property (e.g. 'sin' and 'cos').
///
/// This property corresponds to the GCC 'const' attribute.
bool doesNotAccessMemory(const Function *F) {
return getMemoryEffects(F).doesNotAccessMemory();
}
/// Checks if the specified call is known to only read from non-volatile
/// memory (or not access memory at all).
///
/// Calls that unwind the stack are legal for this predicate.
///
/// This property allows many common optimizations to be performed in the
/// absence of interfering store instructions, such as CSE of strlen calls.
///
/// This property corresponds to the GCC 'pure' attribute.
bool onlyReadsMemory(const CallBase *Call) {
return getMemoryEffects(Call).onlyReadsMemory();
}
/// Checks if the specified function is known to only read from non-volatile
/// memory (or not access memory at all).
///
/// Functions that unwind the stack are legal for this predicate.
///
/// This property allows many common optimizations to be performed in the
/// absence of interfering store instructions, such as CSE of strlen calls.
///
/// This property corresponds to the GCC 'pure' attribute.
bool onlyReadsMemory(const Function *F) {
return getMemoryEffects(F).onlyReadsMemory();
}
/// Check whether or not an instruction may read or write the optionally
/// specified memory location.
///
///
/// An instruction that doesn't read or write memory may be trivially LICM'd
/// for example.
///
/// For function calls, this delegates to the alias-analysis specific
/// call-site mod-ref behavior queries. Otherwise it delegates to the specific
/// helpers above.
ModRefInfo getModRefInfo(const Instruction *I,
const std::optional<MemoryLocation> &OptLoc) {
SimpleAAQueryInfo AAQIP(*this);
return getModRefInfo(I, OptLoc, AAQIP);
}
/// A convenience wrapper for constructing the memory location.
ModRefInfo getModRefInfo(const Instruction *I, const Value *P,
LocationSize Size) {
return getModRefInfo(I, MemoryLocation(P, Size));
}
/// Return information about whether a call and an instruction may refer to
/// the same memory locations.
ModRefInfo getModRefInfo(const Instruction *I, const CallBase *Call);
/// Return information about whether a particular call site modifies
/// or reads the specified memory location \p MemLoc before instruction \p I
/// in a BasicBlock.
ModRefInfo callCapturesBefore(const Instruction *I,
const MemoryLocation &MemLoc,
DominatorTree *DT) {
SimpleAAQueryInfo AAQIP(*this);
return callCapturesBefore(I, MemLoc, DT, AAQIP);
}
/// A convenience wrapper to synthesize a memory location.
ModRefInfo callCapturesBefore(const Instruction *I, const Value *P,
LocationSize Size, DominatorTree *DT) {
return callCapturesBefore(I, MemoryLocation(P, Size), DT);
}
/// @}
//===--------------------------------------------------------------------===//
/// \name Higher level methods for querying mod/ref information.
/// @{
/// Check if it is possible for execution of the specified basic block to
/// modify the location Loc.
bool canBasicBlockModify(const BasicBlock &BB, const MemoryLocation &Loc);
/// A convenience wrapper synthesizing a memory location.
bool canBasicBlockModify(const BasicBlock &BB, const Value *P,
LocationSize Size) {
return canBasicBlockModify(BB, MemoryLocation(P, Size));
}
/// Check if it is possible for the execution of the specified instructions
/// to mod\ref (according to the mode) the location Loc.
///
/// The instructions to consider are all of the instructions in the range of
/// [I1,I2] INCLUSIVE. I1 and I2 must be in the same basic block.
bool canInstructionRangeModRef(const Instruction &I1, const Instruction &I2,
const MemoryLocation &Loc,
const ModRefInfo Mode);
/// A convenience wrapper synthesizing a memory location.
bool canInstructionRangeModRef(const Instruction &I1, const Instruction &I2,
const Value *Ptr, LocationSize Size,
const ModRefInfo Mode) {
return canInstructionRangeModRef(I1, I2, MemoryLocation(Ptr, Size), Mode);
}
// CtxI can be nullptr, in which case the query is whether or not the aliasing
// relationship holds through the entire function.
AliasResult alias(const MemoryLocation &LocA, const MemoryLocation &LocB,
AAQueryInfo &AAQI, const Instruction *CtxI = nullptr);
bool pointsToConstantMemory(const MemoryLocation &Loc, AAQueryInfo &AAQI,
bool OrLocal = false);
ModRefInfo getModRefInfoMask(const MemoryLocation &Loc, AAQueryInfo &AAQI,
bool IgnoreLocals = false);
ModRefInfo getModRefInfo(const Instruction *I, const CallBase *Call2,
AAQueryInfo &AAQIP);
ModRefInfo getModRefInfo(const CallBase *Call, const MemoryLocation &Loc,
AAQueryInfo &AAQI);
ModRefInfo getModRefInfo(const CallBase *Call1, const CallBase *Call2,
AAQueryInfo &AAQI);
ModRefInfo getModRefInfo(const VAArgInst *V, const MemoryLocation &Loc,
AAQueryInfo &AAQI);
ModRefInfo getModRefInfo(const LoadInst *L, const MemoryLocation &Loc,
AAQueryInfo &AAQI);
ModRefInfo getModRefInfo(const StoreInst *S, const MemoryLocation &Loc,
AAQueryInfo &AAQI);
ModRefInfo getModRefInfo(const FenceInst *S, const MemoryLocation &Loc,
AAQueryInfo &AAQI);
ModRefInfo getModRefInfo(const AtomicCmpXchgInst *CX,
const MemoryLocation &Loc, AAQueryInfo &AAQI);
ModRefInfo getModRefInfo(const AtomicRMWInst *RMW, const MemoryLocation &Loc,
AAQueryInfo &AAQI);
ModRefInfo getModRefInfo(const CatchPadInst *I, const MemoryLocation &Loc,
AAQueryInfo &AAQI);
ModRefInfo getModRefInfo(const CatchReturnInst *I, const MemoryLocation &Loc,
AAQueryInfo &AAQI);
ModRefInfo getModRefInfo(const Instruction *I,
const std::optional<MemoryLocation> &OptLoc,
AAQueryInfo &AAQIP);
ModRefInfo callCapturesBefore(const Instruction *I,
const MemoryLocation &MemLoc, DominatorTree *DT,
AAQueryInfo &AAQIP);
MemoryEffects getMemoryEffects(const CallBase *Call, AAQueryInfo &AAQI);
private:
class Concept;
template <typename T> class Model;
friend class AAResultBase;
const TargetLibraryInfo &TLI;
std::vector<std::unique_ptr<Concept>> AAs;
std::vector<AnalysisKey *> AADeps;
friend class BatchAAResults;
};
/// This class is a wrapper over an AAResults, and it is intended to be used
/// only when there are no IR changes inbetween queries. BatchAAResults is
/// reusing the same `AAQueryInfo` to preserve the state across queries,
/// esentially making AA work in "batch mode". The internal state cannot be
/// cleared, so to go "out-of-batch-mode", the user must either use AAResults,
/// or create a new BatchAAResults.
class BatchAAResults {
AAResults &AA;
AAQueryInfo AAQI;
SimpleCaptureInfo SimpleCI;
public:
BatchAAResults(AAResults &AAR) : AA(AAR), AAQI(AAR, &SimpleCI) {}
BatchAAResults(AAResults &AAR, CaptureInfo *CI) : AA(AAR), AAQI(AAR, CI) {}
AliasResult alias(const MemoryLocation &LocA, const MemoryLocation &LocB) {
return AA.alias(LocA, LocB, AAQI);
}
bool pointsToConstantMemory(const MemoryLocation &Loc, bool OrLocal = false) {
return AA.pointsToConstantMemory(Loc, AAQI, OrLocal);
}
ModRefInfo getModRefInfoMask(const MemoryLocation &Loc,
bool IgnoreLocals = false) {
return AA.getModRefInfoMask(Loc, AAQI, IgnoreLocals);
}
ModRefInfo getModRefInfo(const Instruction *I,
const std::optional<MemoryLocation> &OptLoc) {
return AA.getModRefInfo(I, OptLoc, AAQI);
}
ModRefInfo getModRefInfo(const Instruction *I, const CallBase *Call2) {
return AA.getModRefInfo(I, Call2, AAQI);
}
ModRefInfo getArgModRefInfo(const CallBase *Call, unsigned ArgIdx) {
return AA.getArgModRefInfo(Call, ArgIdx);
}
MemoryEffects getMemoryEffects(const CallBase *Call) {
return AA.getMemoryEffects(Call, AAQI);
}
bool isMustAlias(const MemoryLocation &LocA, const MemoryLocation &LocB) {
return alias(LocA, LocB) == AliasResult::MustAlias;
}
bool isMustAlias(const Value *V1, const Value *V2) {
return alias(MemoryLocation(V1, LocationSize::precise(1)),
MemoryLocation(V2, LocationSize::precise(1))) ==
AliasResult::MustAlias;
}
ModRefInfo callCapturesBefore(const Instruction *I,
const MemoryLocation &MemLoc,
DominatorTree *DT) {
return AA.callCapturesBefore(I, MemLoc, DT, AAQI);
}
/// Assume that values may come from different cycle iterations.
void enableCrossIterationMode() {
AAQI.MayBeCrossIteration = true;
}
};
/// Temporary typedef for legacy code that uses a generic \c AliasAnalysis
/// pointer or reference.
using AliasAnalysis = AAResults;
/// A private abstract base class describing the concept of an individual alias
/// analysis implementation.
///
/// This interface is implemented by any \c Model instantiation. It is also the
/// interface which a type used to instantiate the model must provide.
///
/// All of these methods model methods by the same name in the \c
/// AAResults class. Only differences and specifics to how the
/// implementations are called are documented here.
class AAResults::Concept {
public:
virtual ~Concept() = 0;
//===--------------------------------------------------------------------===//
/// \name Alias Queries
/// @{
/// The main low level interface to the alias analysis implementation.
/// Returns an AliasResult indicating whether the two pointers are aliased to
/// each other. This is the interface that must be implemented by specific
/// alias analysis implementations.
virtual AliasResult alias(const MemoryLocation &LocA,
const MemoryLocation &LocB, AAQueryInfo &AAQI,
const Instruction *CtxI) = 0;
/// @}
//===--------------------------------------------------------------------===//
/// \name Simple mod/ref information
/// @{
/// Returns a bitmask that should be unconditionally applied to the ModRef
/// info of a memory location. This allows us to eliminate Mod and/or Ref from
/// the ModRef info based on the knowledge that the memory location points to
/// constant and/or locally-invariant memory.
virtual ModRefInfo getModRefInfoMask(const MemoryLocation &Loc,
AAQueryInfo &AAQI,
bool IgnoreLocals) = 0;
/// Get the ModRef info associated with a pointer argument of a callsite. The
/// result's bits are set to indicate the allowed aliasing ModRef kinds. Note
/// that these bits do not necessarily account for the overall behavior of
/// the function, but rather only provide additional per-argument
/// information.
virtual ModRefInfo getArgModRefInfo(const CallBase *Call,
unsigned ArgIdx) = 0;
/// Return the behavior of the given call site.
virtual MemoryEffects getMemoryEffects(const CallBase *Call,
AAQueryInfo &AAQI) = 0;
/// Return the behavior when calling the given function.
virtual MemoryEffects getMemoryEffects(const Function *F) = 0;
/// getModRefInfo (for call sites) - Return information about whether
/// a particular call site modifies or reads the specified memory location.
virtual ModRefInfo getModRefInfo(const CallBase *Call,
const MemoryLocation &Loc,
AAQueryInfo &AAQI) = 0;
/// Return information about whether two call sites may refer to the same set
/// of memory locations. See the AA documentation for details:
/// http://llvm.org/docs/AliasAnalysis.html#ModRefInfo
virtual ModRefInfo getModRefInfo(const CallBase *Call1, const CallBase *Call2,
AAQueryInfo &AAQI) = 0;
/// @}
};
/// A private class template which derives from \c Concept and wraps some other
/// type.
///
/// This models the concept by directly forwarding each interface point to the
/// wrapped type which must implement a compatible interface. This provides
/// a type erased binding.
template <typename AAResultT> class AAResults::Model final : public Concept {
AAResultT &Result;
public:
explicit Model(AAResultT &Result, AAResults &AAR) : Result(Result) {}
~Model() override = default;
AliasResult alias(const MemoryLocation &LocA, const MemoryLocation &LocB,
AAQueryInfo &AAQI, const Instruction *CtxI) override {
return Result.alias(LocA, LocB, AAQI, CtxI);
}
ModRefInfo getModRefInfoMask(const MemoryLocation &Loc, AAQueryInfo &AAQI,
bool IgnoreLocals) override {
return Result.getModRefInfoMask(Loc, AAQI, IgnoreLocals);
}
ModRefInfo getArgModRefInfo(const CallBase *Call, unsigned ArgIdx) override {
return Result.getArgModRefInfo(Call, ArgIdx);
}
MemoryEffects getMemoryEffects(const CallBase *Call,
AAQueryInfo &AAQI) override {
return Result.getMemoryEffects(Call, AAQI);
}
MemoryEffects getMemoryEffects(const Function *F) override {
return Result.getMemoryEffects(F);
}
ModRefInfo getModRefInfo(const CallBase *Call, const MemoryLocation &Loc,
AAQueryInfo &AAQI) override {
return Result.getModRefInfo(Call, Loc, AAQI);
}
ModRefInfo getModRefInfo(const CallBase *Call1, const CallBase *Call2,
AAQueryInfo &AAQI) override {
return Result.getModRefInfo(Call1, Call2, AAQI);
}
};
/// A base class to help implement the function alias analysis results concept.
///
/// Because of the nature of many alias analysis implementations, they often
/// only implement a subset of the interface. This base class will attempt to
/// implement the remaining portions of the interface in terms of simpler forms
/// of the interface where possible, and otherwise provide conservatively
/// correct fallback implementations.
///
/// Implementors of an alias analysis should derive from this class, and then
/// override specific methods that they wish to customize. There is no need to
/// use virtual anywhere.
class AAResultBase {
protected:
explicit AAResultBase() = default;
// Provide all the copy and move constructors so that derived types aren't
// constrained.
AAResultBase(const AAResultBase &Arg) {}
AAResultBase(AAResultBase &&Arg) {}
public:
AliasResult alias(const MemoryLocation &LocA, const MemoryLocation &LocB,
AAQueryInfo &AAQI, const Instruction *I) {
return AliasResult::MayAlias;
}
ModRefInfo getModRefInfoMask(const MemoryLocation &Loc, AAQueryInfo &AAQI,
bool IgnoreLocals) {
return ModRefInfo::ModRef;
}
ModRefInfo getArgModRefInfo(const CallBase *Call, unsigned ArgIdx) {
return ModRefInfo::ModRef;
}
MemoryEffects getMemoryEffects(const CallBase *Call, AAQueryInfo &AAQI) {
return MemoryEffects::unknown();
}
MemoryEffects getMemoryEffects(const Function *F) {
return MemoryEffects::unknown();
}
ModRefInfo getModRefInfo(const CallBase *Call, const MemoryLocation &Loc,
AAQueryInfo &AAQI) {
return ModRefInfo::ModRef;
}
ModRefInfo getModRefInfo(const CallBase *Call1, const CallBase *Call2,
AAQueryInfo &AAQI) {
return ModRefInfo::ModRef;
}
};
/// Return true if this pointer is returned by a noalias function.
bool isNoAliasCall(const Value *V);
/// Return true if this pointer refers to a distinct and identifiable object.
/// This returns true for:
/// Global Variables and Functions (but not Global Aliases)
/// Allocas
/// ByVal and NoAlias Arguments
/// NoAlias returns (e.g. calls to malloc)
///
bool isIdentifiedObject(const Value *V);
/// Return true if V is umabigously identified at the function-level.
/// Different IdentifiedFunctionLocals can't alias.
/// Further, an IdentifiedFunctionLocal can not alias with any function
/// arguments other than itself, which is not necessarily true for
/// IdentifiedObjects.
bool isIdentifiedFunctionLocal(const Value *V);
/// Returns true if the pointer is one which would have been considered an
/// escape by isNonEscapingLocalObject.
bool isEscapeSource(const Value *V);
/// Return true if Object memory is not visible after an unwind, in the sense
/// that program semantics cannot depend on Object containing any particular
/// value on unwind. If the RequiresNoCaptureBeforeUnwind out parameter is set
/// to true, then the memory is only not visible if the object has not been
/// captured prior to the unwind. Otherwise it is not visible even if captured.
bool isNotVisibleOnUnwind(const Value *Object,
bool &RequiresNoCaptureBeforeUnwind);
/// A manager for alias analyses.
///
/// This class can have analyses registered with it and when run, it will run
/// all of them and aggregate their results into single AA results interface
/// that dispatches across all of the alias analysis results available.
///
/// Note that the order in which analyses are registered is very significant.
/// That is the order in which the results will be aggregated and queried.
///
/// This manager effectively wraps the AnalysisManager for registering alias
/// analyses. When you register your alias analysis with this manager, it will
/// ensure the analysis itself is registered with its AnalysisManager.
///
/// The result of this analysis is only invalidated if one of the particular
/// aggregated AA results end up being invalidated. This removes the need to
/// explicitly preserve the results of `AAManager`. Note that analyses should no
/// longer be registered once the `AAManager` is run.
class AAManager : public AnalysisInfoMixin<AAManager> {
public:
using Result = AAResults;
/// Register a specific AA result.
template <typename AnalysisT> void registerFunctionAnalysis() {
ResultGetters.push_back(&getFunctionAAResultImpl<AnalysisT>);
}
/// Register a specific AA result.
template <typename AnalysisT> void registerModuleAnalysis() {
ResultGetters.push_back(&getModuleAAResultImpl<AnalysisT>);
}
Result run(Function &F, FunctionAnalysisManager &AM);
private:
friend AnalysisInfoMixin<AAManager>;
static AnalysisKey Key;
SmallVector<void (*)(Function &F, FunctionAnalysisManager &AM,
AAResults &AAResults),
4> ResultGetters;
template <typename AnalysisT>
static void getFunctionAAResultImpl(Function &F,
FunctionAnalysisManager &AM,
AAResults &AAResults) {
AAResults.addAAResult(AM.template getResult<AnalysisT>(F));
AAResults.addAADependencyID(AnalysisT::ID());
}
template <typename AnalysisT>
static void getModuleAAResultImpl(Function &F, FunctionAnalysisManager &AM,
AAResults &AAResults) {
auto &MAMProxy = AM.getResult<ModuleAnalysisManagerFunctionProxy>(F);
if (auto *R =
MAMProxy.template getCachedResult<AnalysisT>(*F.getParent())) {
AAResults.addAAResult(*R);
MAMProxy
.template registerOuterAnalysisInvalidation<AnalysisT, AAManager>();
}
}
};
/// A wrapper pass to provide the legacy pass manager access to a suitably
/// prepared AAResults object.
class AAResultsWrapperPass : public FunctionPass {
std::unique_ptr<AAResults> AAR;
public:
static char ID;
AAResultsWrapperPass();
AAResults &getAAResults() { return *AAR; }
const AAResults &getAAResults() const { return *AAR; }
bool runOnFunction(Function &F) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
};
/// A wrapper pass for external alias analyses. This just squirrels away the
/// callback used to run any analyses and register their results.
struct ExternalAAWrapperPass : ImmutablePass {
using CallbackT = std::function<void(Pass &, Function &, AAResults &)>;
CallbackT CB;
static char ID;
ExternalAAWrapperPass();
explicit ExternalAAWrapperPass(CallbackT CB);
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
}
};
/// A wrapper pass around a callback which can be used to populate the
/// AAResults in the AAResultsWrapperPass from an external AA.
///
/// The callback provided here will be used each time we prepare an AAResults
/// object, and will receive a reference to the function wrapper pass, the
/// function, and the AAResults object to populate. This should be used when
/// setting up a custom pass pipeline to inject a hook into the AA results.
ImmutablePass *createExternalAAWrapperPass(
std::function<void(Pass &, Function &, AAResults &)> Callback);
} // end namespace llvm
#endif // LLVM_ANALYSIS_ALIASANALYSIS_H
PK iwFZ�qѽ�J �J Analysis/CallGraph.hnu �[��� //===- CallGraph.h - Build a Module's call graph ----------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
///
/// This file provides interfaces used to build and manipulate a call graph,
/// which is a very useful tool for interprocedural optimization.
///
/// Every function in a module is represented as a node in the call graph. The
/// callgraph node keeps track of which functions are called by the function
/// corresponding to the node.
///
/// A call graph may contain nodes where the function that they correspond to
/// is null. These 'external' nodes are used to represent control flow that is
/// not represented (or analyzable) in the module. In particular, this
/// analysis builds one external node such that:
/// 1. All functions in the module without internal linkage will have edges
/// from this external node, indicating that they could be called by
/// functions outside of the module.
/// 2. All functions whose address is used for something more than a direct
/// call, for example being stored into a memory location will also have
/// an edge from this external node. Since they may be called by an
/// unknown caller later, they must be tracked as such.
///
/// There is a second external node added for calls that leave this module.
/// Functions have a call edge to the external node iff:
/// 1. The function is external, reflecting the fact that they could call
/// anything without internal linkage or that has its address taken.
/// 2. The function contains an indirect function call.
///
/// As an extension in the future, there may be multiple nodes with a null
/// function. These will be used when we can prove (through pointer analysis)
/// that an indirect call site can call only a specific set of functions.
///
/// Because of these properties, the CallGraph captures a conservative superset
/// of all of the caller-callee relationships, which is useful for
/// transformations.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_CALLGRAPH_H
#define LLVM_ANALYSIS_CALLGRAPH_H
#include "llvm/IR/InstrTypes.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/PassManager.h"
#include "llvm/IR/ValueHandle.h"
#include "llvm/Pass.h"
#include <cassert>
#include <map>
#include <memory>
#include <utility>
#include <vector>
namespace llvm {
template <class GraphType> struct GraphTraits;
class CallGraphNode;
class Function;
class Module;
class raw_ostream;
/// The basic data container for the call graph of a \c Module of IR.
///
/// This class exposes both the interface to the call graph for a module of IR.
///
/// The core call graph itself can also be updated to reflect changes to the IR.
class CallGraph {
Module &M;
using FunctionMapTy =
std::map<const Function *, std::unique_ptr<CallGraphNode>>;
/// A map from \c Function* to \c CallGraphNode*.
FunctionMapTy FunctionMap;
/// This node has edges to all external functions and those internal
/// functions that have their address taken.
CallGraphNode *ExternalCallingNode;
/// This node has edges to it from all functions making indirect calls
/// or calling an external function.
std::unique_ptr<CallGraphNode> CallsExternalNode;
public:
explicit CallGraph(Module &M);
CallGraph(CallGraph &&Arg);
~CallGraph();
void print(raw_ostream &OS) const;
void dump() const;
using iterator = FunctionMapTy::iterator;
using const_iterator = FunctionMapTy::const_iterator;
/// Returns the module the call graph corresponds to.
Module &getModule() const { return M; }
bool invalidate(Module &, const PreservedAnalyses &PA,
ModuleAnalysisManager::Invalidator &);
inline iterator begin() { return FunctionMap.begin(); }
inline iterator end() { return FunctionMap.end(); }
inline const_iterator begin() const { return FunctionMap.begin(); }
inline const_iterator end() const { return FunctionMap.end(); }
/// Returns the call graph node for the provided function.
inline const CallGraphNode *operator[](const Function *F) const {
const_iterator I = FunctionMap.find(F);
assert(I != FunctionMap.end() && "Function not in callgraph!");
return I->second.get();
}
/// Returns the call graph node for the provided function.
inline CallGraphNode *operator[](const Function *F) {
const_iterator I = FunctionMap.find(F);
assert(I != FunctionMap.end() && "Function not in callgraph!");
return I->second.get();
}
/// Returns the \c CallGraphNode which is used to represent
/// undetermined calls into the callgraph.
CallGraphNode *getExternalCallingNode() const { return ExternalCallingNode; }
CallGraphNode *getCallsExternalNode() const {
return CallsExternalNode.get();
}
/// Old node has been deleted, and New is to be used in its place, update the
/// ExternalCallingNode.
void ReplaceExternalCallEdge(CallGraphNode *Old, CallGraphNode *New);
//===---------------------------------------------------------------------
// Functions to keep a call graph up to date with a function that has been
// modified.
//
/// Unlink the function from this module, returning it.
///
/// Because this removes the function from the module, the call graph node is
/// destroyed. This is only valid if the function does not call any other
/// functions (ie, there are no edges in it's CGN). The easiest way to do
/// this is to dropAllReferences before calling this.
Function *removeFunctionFromModule(CallGraphNode *CGN);
/// Similar to operator[], but this will insert a new CallGraphNode for
/// \c F if one does not already exist.
CallGraphNode *getOrInsertFunction(const Function *F);
/// Populate \p CGN based on the calls inside the associated function.
void populateCallGraphNode(CallGraphNode *CGN);
/// Add a function to the call graph, and link the node to all of the
/// functions that it calls.
void addToCallGraph(Function *F);
};
/// A node in the call graph for a module.
///
/// Typically represents a function in the call graph. There are also special
/// "null" nodes used to represent theoretical entries in the call graph.
class CallGraphNode {
public:
/// A pair of the calling instruction (a call or invoke)
/// and the call graph node being called.
/// Call graph node may have two types of call records which represent an edge
/// in the call graph - reference or a call edge. Reference edges are not
/// associated with any call instruction and are created with the first field
/// set to `None`, while real call edges have instruction address in this
/// field. Therefore, all real call edges are expected to have a value in the
/// first field and it is not supposed to be `nullptr`.
/// Reference edges, for example, are used for connecting broker function
/// caller to the callback function for callback call sites.
using CallRecord = std::pair<std::optional<WeakTrackingVH>, CallGraphNode *>;
public:
using CalledFunctionsVector = std::vector<CallRecord>;
/// Creates a node for the specified function.
inline CallGraphNode(CallGraph *CG, Function *F) : CG(CG), F(F) {}
CallGraphNode(const CallGraphNode &) = delete;
CallGraphNode &operator=(const CallGraphNode &) = delete;
~CallGraphNode() {
assert(NumReferences == 0 && "Node deleted while references remain");
}
using iterator = std::vector<CallRecord>::iterator;
using const_iterator = std::vector<CallRecord>::const_iterator;
/// Returns the function that this call graph node represents.
Function *getFunction() const { return F; }
inline iterator begin() { return CalledFunctions.begin(); }
inline iterator end() { return CalledFunctions.end(); }
inline const_iterator begin() const { return CalledFunctions.begin(); }
inline const_iterator end() const { return CalledFunctions.end(); }
inline bool empty() const { return CalledFunctions.empty(); }
inline unsigned size() const { return (unsigned)CalledFunctions.size(); }
/// Returns the number of other CallGraphNodes in this CallGraph that
/// reference this node in their callee list.
unsigned getNumReferences() const { return NumReferences; }
/// Returns the i'th called function.
CallGraphNode *operator[](unsigned i) const {
assert(i < CalledFunctions.size() && "Invalid index");
return CalledFunctions[i].second;
}
/// Print out this call graph node.
void dump() const;
void print(raw_ostream &OS) const;
//===---------------------------------------------------------------------
// Methods to keep a call graph up to date with a function that has been
// modified
//
/// Removes all edges from this CallGraphNode to any functions it
/// calls.
void removeAllCalledFunctions() {
while (!CalledFunctions.empty()) {
CalledFunctions.back().second->DropRef();
CalledFunctions.pop_back();
}
}
/// Moves all the callee information from N to this node.
void stealCalledFunctionsFrom(CallGraphNode *N) {
assert(CalledFunctions.empty() &&
"Cannot steal callsite information if I already have some");
std::swap(CalledFunctions, N->CalledFunctions);
}
/// Adds a function to the list of functions called by this one.
void addCalledFunction(CallBase *Call, CallGraphNode *M) {
CalledFunctions.emplace_back(Call ? std::optional<WeakTrackingVH>(Call)
: std::optional<WeakTrackingVH>(),
M);
M->AddRef();
}
void removeCallEdge(iterator I) {
I->second->DropRef();
*I = CalledFunctions.back();
CalledFunctions.pop_back();
}
/// Removes the edge in the node for the specified call site.
///
/// Note that this method takes linear time, so it should be used sparingly.
void removeCallEdgeFor(CallBase &Call);
/// Removes all call edges from this node to the specified callee
/// function.
///
/// This takes more time to execute than removeCallEdgeTo, so it should not
/// be used unless necessary.
void removeAnyCallEdgeTo(CallGraphNode *Callee);
/// Removes one edge associated with a null callsite from this node to
/// the specified callee function.
void removeOneAbstractEdgeTo(CallGraphNode *Callee);
/// Replaces the edge in the node for the specified call site with a
/// new one.
///
/// Note that this method takes linear time, so it should be used sparingly.
void replaceCallEdge(CallBase &Call, CallBase &NewCall,
CallGraphNode *NewNode);
private:
friend class CallGraph;
CallGraph *CG;
Function *F;
std::vector<CallRecord> CalledFunctions;
/// The number of times that this CallGraphNode occurs in the
/// CalledFunctions array of this or other CallGraphNodes.
unsigned NumReferences = 0;
void DropRef() { --NumReferences; }
void AddRef() { ++NumReferences; }
/// A special function that should only be used by the CallGraph class.
void allReferencesDropped() { NumReferences = 0; }
};
/// An analysis pass to compute the \c CallGraph for a \c Module.
///
/// This class implements the concept of an analysis pass used by the \c
/// ModuleAnalysisManager to run an analysis over a module and cache the
/// resulting data.
class CallGraphAnalysis : public AnalysisInfoMixin<CallGraphAnalysis> {
friend AnalysisInfoMixin<CallGraphAnalysis>;
static AnalysisKey Key;
public:
/// A formulaic type to inform clients of the result type.
using Result = CallGraph;
/// Compute the \c CallGraph for the module \c M.
///
/// The real work here is done in the \c CallGraph constructor.
CallGraph run(Module &M, ModuleAnalysisManager &) { return CallGraph(M); }
};
/// Printer pass for the \c CallGraphAnalysis results.
class CallGraphPrinterPass : public PassInfoMixin<CallGraphPrinterPass> {
raw_ostream &OS;
public:
explicit CallGraphPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
};
/// Printer pass for the summarized \c CallGraphAnalysis results.
class CallGraphSCCsPrinterPass
: public PassInfoMixin<CallGraphSCCsPrinterPass> {
raw_ostream &OS;
public:
explicit CallGraphSCCsPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
};
/// The \c ModulePass which wraps up a \c CallGraph and the logic to
/// build it.
///
/// This class exposes both the interface to the call graph container and the
/// module pass which runs over a module of IR and produces the call graph. The
/// call graph interface is entirelly a wrapper around a \c CallGraph object
/// which is stored internally for each module.
class CallGraphWrapperPass : public ModulePass {
std::unique_ptr<CallGraph> G;
public:
static char ID; // Class identification, replacement for typeinfo
CallGraphWrapperPass();
~CallGraphWrapperPass() override;
/// The internal \c CallGraph around which the rest of this interface
/// is wrapped.
const CallGraph &getCallGraph() const { return *G; }
CallGraph &getCallGraph() { return *G; }
using iterator = CallGraph::iterator;
using const_iterator = CallGraph::const_iterator;
/// Returns the module the call graph corresponds to.
Module &getModule() const { return G->getModule(); }
inline iterator begin() { return G->begin(); }
inline iterator end() { return G->end(); }
inline const_iterator begin() const { return G->begin(); }
inline const_iterator end() const { return G->end(); }
/// Returns the call graph node for the provided function.
inline const CallGraphNode *operator[](const Function *F) const {
return (*G)[F];
}
/// Returns the call graph node for the provided function.
inline CallGraphNode *operator[](const Function *F) { return (*G)[F]; }
/// Returns the \c CallGraphNode which is used to represent
/// undetermined calls into the callgraph.
CallGraphNode *getExternalCallingNode() const {
return G->getExternalCallingNode();
}
CallGraphNode *getCallsExternalNode() const {
return G->getCallsExternalNode();
}
//===---------------------------------------------------------------------
// Functions to keep a call graph up to date with a function that has been
// modified.
//
/// Unlink the function from this module, returning it.
///
/// Because this removes the function from the module, the call graph node is
/// destroyed. This is only valid if the function does not call any other
/// functions (ie, there are no edges in it's CGN). The easiest way to do
/// this is to dropAllReferences before calling this.
Function *removeFunctionFromModule(CallGraphNode *CGN) {
return G->removeFunctionFromModule(CGN);
}
/// Similar to operator[], but this will insert a new CallGraphNode for
/// \c F if one does not already exist.
CallGraphNode *getOrInsertFunction(const Function *F) {
return G->getOrInsertFunction(F);
}
//===---------------------------------------------------------------------
// Implementation of the ModulePass interface needed here.
//
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnModule(Module &M) override;
void releaseMemory() override;
void print(raw_ostream &o, const Module *) const override;
void dump() const;
};
//===----------------------------------------------------------------------===//
// GraphTraits specializations for call graphs so that they can be treated as
// graphs by the generic graph algorithms.
//
// Provide graph traits for traversing call graphs using standard graph
// traversals.
template <> struct GraphTraits<CallGraphNode *> {
using NodeRef = CallGraphNode *;
using CGNPairTy = CallGraphNode::CallRecord;
static NodeRef getEntryNode(CallGraphNode *CGN) { return CGN; }
static CallGraphNode *CGNGetValue(CGNPairTy P) { return P.second; }
using ChildIteratorType =
mapped_iterator<CallGraphNode::iterator, decltype(&CGNGetValue)>;
static ChildIteratorType child_begin(NodeRef N) {
return ChildIteratorType(N->begin(), &CGNGetValue);
}
static ChildIteratorType child_end(NodeRef N) {
return ChildIteratorType(N->end(), &CGNGetValue);
}
};
template <> struct GraphTraits<const CallGraphNode *> {
using NodeRef = const CallGraphNode *;
using CGNPairTy = CallGraphNode::CallRecord;
using EdgeRef = const CallGraphNode::CallRecord &;
static NodeRef getEntryNode(const CallGraphNode *CGN) { return CGN; }
static const CallGraphNode *CGNGetValue(CGNPairTy P) { return P.second; }
using ChildIteratorType =
mapped_iterator<CallGraphNode::const_iterator, decltype(&CGNGetValue)>;
using ChildEdgeIteratorType = CallGraphNode::const_iterator;
static ChildIteratorType child_begin(NodeRef N) {
return ChildIteratorType(N->begin(), &CGNGetValue);
}
static ChildIteratorType child_end(NodeRef N) {
return ChildIteratorType(N->end(), &CGNGetValue);
}
static ChildEdgeIteratorType child_edge_begin(NodeRef N) {
return N->begin();
}
static ChildEdgeIteratorType child_edge_end(NodeRef N) { return N->end(); }
static NodeRef edge_dest(EdgeRef E) { return E.second; }
};
template <>
struct GraphTraits<CallGraph *> : public GraphTraits<CallGraphNode *> {
using PairTy =
std::pair<const Function *const, std::unique_ptr<CallGraphNode>>;
static NodeRef getEntryNode(CallGraph *CGN) {
return CGN->getExternalCallingNode(); // Start at the external node!
}
static CallGraphNode *CGGetValuePtr(const PairTy &P) {
return P.second.get();
}
// nodes_iterator/begin/end - Allow iteration over all nodes in the graph
using nodes_iterator =
mapped_iterator<CallGraph::iterator, decltype(&CGGetValuePtr)>;
static nodes_iterator nodes_begin(CallGraph *CG) {
return nodes_iterator(CG->begin(), &CGGetValuePtr);
}
static nodes_iterator nodes_end(CallGraph *CG) {
return nodes_iterator(CG->end(), &CGGetValuePtr);
}
};
template <>
struct GraphTraits<const CallGraph *> : public GraphTraits<
const CallGraphNode *> {
using PairTy =
std::pair<const Function *const, std::unique_ptr<CallGraphNode>>;
static NodeRef getEntryNode(const CallGraph *CGN) {
return CGN->getExternalCallingNode(); // Start at the external node!
}
static const CallGraphNode *CGGetValuePtr(const PairTy &P) {
return P.second.get();
}
// nodes_iterator/begin/end - Allow iteration over all nodes in the graph
using nodes_iterator =
mapped_iterator<CallGraph::const_iterator, decltype(&CGGetValuePtr)>;
static nodes_iterator nodes_begin(const CallGraph *CG) {
return nodes_iterator(CG->begin(), &CGGetValuePtr);
}
static nodes_iterator nodes_end(const CallGraph *CG) {
return nodes_iterator(CG->end(), &CGGetValuePtr);
}
};
} // end namespace llvm
#endif // LLVM_ANALYSIS_CALLGRAPH_H
PK iwFZx� VD
D
Analysis/RegionPrinter.hnu �[��� //===-- RegionPrinter.h - Region printer external interface -----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines external functions that can be called to explicitly
// instantiate the region printer.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_REGIONPRINTER_H
#define LLVM_ANALYSIS_REGIONPRINTER_H
#include "llvm/Analysis/DOTGraphTraitsPass.h"
#include "llvm/Analysis/RegionInfo.h"
namespace llvm {
class FunctionPass;
class Function;
class RegionInfo;
FunctionPass *createRegionViewerPass();
FunctionPass *createRegionOnlyViewerPass();
FunctionPass *createRegionPrinterPass();
FunctionPass *createRegionOnlyPrinterPass();
template <>
struct DOTGraphTraits<RegionNode *> : public DefaultDOTGraphTraits {
DOTGraphTraits(bool isSimple = false) : DefaultDOTGraphTraits(isSimple) {}
std::string getNodeLabel(RegionNode *Node, RegionNode *Graph);
};
#ifndef NDEBUG
/// Open a viewer to display the GraphViz vizualization of the analysis
/// result.
///
/// Practical to call in the debugger.
/// Includes the instructions in each BasicBlock.
///
/// @param RI The analysis to display.
void viewRegion(llvm::RegionInfo *RI);
/// Analyze the regions of a function and open its GraphViz
/// visualization in a viewer.
///
/// Useful to call in the debugger.
/// Includes the instructions in each BasicBlock.
/// The result of a new analysis may differ from the RegionInfo the pass
/// manager currently holds.
///
/// @param F Function to analyze.
void viewRegion(const llvm::Function *F);
/// Open a viewer to display the GraphViz vizualization of the analysis
/// result.
///
/// Useful to call in the debugger.
/// Shows only the BasicBlock names without their instructions.
///
/// @param RI The analysis to display.
void viewRegionOnly(llvm::RegionInfo *RI);
/// Analyze the regions of a function and open its GraphViz
/// visualization in a viewer.
///
/// Useful to call in the debugger.
/// Shows only the BasicBlock names without their instructions.
/// The result of a new analysis may differ from the RegionInfo the pass
/// manager currently holds.
///
/// @param F Function to analyze.
void viewRegionOnly(const llvm::Function *F);
#endif
} // End llvm namespace
#endif
PK iwFZJ��{�L �L Analysis/BranchProbabilityInfo.hnu �[��� //===- BranchProbabilityInfo.h - Branch Probability Analysis ----*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This pass is used to evaluate branch probabilties.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_BRANCHPROBABILITYINFO_H
#define LLVM_ANALYSIS_BRANCHPROBABILITYINFO_H
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseMapInfo.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/CFG.h"
#include "llvm/IR/PassManager.h"
#include "llvm/IR/ValueHandle.h"
#include "llvm/Pass.h"
#include "llvm/Support/BranchProbability.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
#include <memory>
#include <utility>
namespace llvm {
class Function;
class Loop;
class LoopInfo;
class raw_ostream;
class DominatorTree;
class PostDominatorTree;
class TargetLibraryInfo;
class Value;
/// Analysis providing branch probability information.
///
/// This is a function analysis which provides information on the relative
/// probabilities of each "edge" in the function's CFG where such an edge is
/// defined by a pair (PredBlock and an index in the successors). The
/// probability of an edge from one block is always relative to the
/// probabilities of other edges from the block. The probabilites of all edges
/// from a block sum to exactly one (100%).
/// We use a pair (PredBlock and an index in the successors) to uniquely
/// identify an edge, since we can have multiple edges from Src to Dst.
/// As an example, we can have a switch which jumps to Dst with value 0 and
/// value 10.
///
/// Process of computing branch probabilities can be logically viewed as three
/// step process:
///
/// First, if there is a profile information associated with the branch then
/// it is trivially translated to branch probabilities. There is one exception
/// from this rule though. Probabilities for edges leading to "unreachable"
/// blocks (blocks with the estimated weight not greater than
/// UNREACHABLE_WEIGHT) are evaluated according to static estimation and
/// override profile information. If no branch probabilities were calculated
/// on this step then take the next one.
///
/// Second, estimate absolute execution weights for each block based on
/// statically known information. Roots of such information are "cold",
/// "unreachable", "noreturn" and "unwind" blocks. Those blocks get their
/// weights set to BlockExecWeight::COLD, BlockExecWeight::UNREACHABLE,
/// BlockExecWeight::NORETURN and BlockExecWeight::UNWIND respectively. Then the
/// weights are propagated to the other blocks up the domination line. In
/// addition, if all successors have estimated weights set then maximum of these
/// weights assigned to the block itself (while this is not ideal heuristic in
/// theory it's simple and works reasonably well in most cases) and the process
/// repeats. Once the process of weights propagation converges branch
/// probabilities are set for all such branches that have at least one successor
/// with the weight set. Default execution weight (BlockExecWeight::DEFAULT) is
/// used for any successors which doesn't have its weight set. For loop back
/// branches we use their weights scaled by loop trip count equal to
/// 'LBH_TAKEN_WEIGHT/LBH_NOTTAKEN_WEIGHT'.
///
/// Here is a simple example demonstrating how the described algorithm works.
///
/// BB1
/// / \
/// v v
/// BB2 BB3
/// / \
/// v v
/// ColdBB UnreachBB
///
/// Initially, ColdBB is associated with COLD_WEIGHT and UnreachBB with
/// UNREACHABLE_WEIGHT. COLD_WEIGHT is set to BB2 as maximum between its
/// successors. BB1 and BB3 has no explicit estimated weights and assumed to
/// have DEFAULT_WEIGHT. Based on assigned weights branches will have the
/// following probabilities:
/// P(BB1->BB2) = COLD_WEIGHT/(COLD_WEIGHT + DEFAULT_WEIGHT) =
/// 0xffff / (0xffff + 0xfffff) = 0.0588(5.9%)
/// P(BB1->BB3) = DEFAULT_WEIGHT_WEIGHT/(COLD_WEIGHT + DEFAULT_WEIGHT) =
/// 0xfffff / (0xffff + 0xfffff) = 0.941(94.1%)
/// P(BB2->ColdBB) = COLD_WEIGHT/(COLD_WEIGHT + UNREACHABLE_WEIGHT) = 1(100%)
/// P(BB2->UnreachBB) =
/// UNREACHABLE_WEIGHT/(COLD_WEIGHT+UNREACHABLE_WEIGHT) = 0(0%)
///
/// If no branch probabilities were calculated on this step then take the next
/// one.
///
/// Third, apply different kinds of local heuristics for each individual
/// branch until first match. For example probability of a pointer to be null is
/// estimated as PH_TAKEN_WEIGHT/(PH_TAKEN_WEIGHT + PH_NONTAKEN_WEIGHT). If
/// no local heuristic has been matched then branch is left with no explicit
/// probability set and assumed to have default probability.
class BranchProbabilityInfo {
public:
BranchProbabilityInfo() = default;
BranchProbabilityInfo(const Function &F, const LoopInfo &LI,
const TargetLibraryInfo *TLI = nullptr,
DominatorTree *DT = nullptr,
PostDominatorTree *PDT = nullptr) {
calculate(F, LI, TLI, DT, PDT);
}
BranchProbabilityInfo(BranchProbabilityInfo &&Arg)
: Probs(std::move(Arg.Probs)), LastF(Arg.LastF),
EstimatedBlockWeight(std::move(Arg.EstimatedBlockWeight)) {}
BranchProbabilityInfo(const BranchProbabilityInfo &) = delete;
BranchProbabilityInfo &operator=(const BranchProbabilityInfo &) = delete;
BranchProbabilityInfo &operator=(BranchProbabilityInfo &&RHS) {
releaseMemory();
Probs = std::move(RHS.Probs);
EstimatedBlockWeight = std::move(RHS.EstimatedBlockWeight);
return *this;
}
bool invalidate(Function &, const PreservedAnalyses &PA,
FunctionAnalysisManager::Invalidator &);
void releaseMemory();
void print(raw_ostream &OS) const;
/// Get an edge's probability, relative to other out-edges of the Src.
///
/// This routine provides access to the fractional probability between zero
/// (0%) and one (100%) of this edge executing, relative to other edges
/// leaving the 'Src' block. The returned probability is never zero, and can
/// only be one if the source block has only one successor.
BranchProbability getEdgeProbability(const BasicBlock *Src,
unsigned IndexInSuccessors) const;
/// Get the probability of going from Src to Dst.
///
/// It returns the sum of all probabilities for edges from Src to Dst.
BranchProbability getEdgeProbability(const BasicBlock *Src,
const BasicBlock *Dst) const;
BranchProbability getEdgeProbability(const BasicBlock *Src,
const_succ_iterator Dst) const;
/// Test if an edge is hot relative to other out-edges of the Src.
///
/// Check whether this edge out of the source block is 'hot'. We define hot
/// as having a relative probability >= 80%.
bool isEdgeHot(const BasicBlock *Src, const BasicBlock *Dst) const;
/// Print an edge's probability.
///
/// Retrieves an edge's probability similarly to \see getEdgeProbability, but
/// then prints that probability to the provided stream. That stream is then
/// returned.
raw_ostream &printEdgeProbability(raw_ostream &OS, const BasicBlock *Src,
const BasicBlock *Dst) const;
public:
/// Set the raw probabilities for all edges from the given block.
///
/// This allows a pass to explicitly set edge probabilities for a block. It
/// can be used when updating the CFG to update the branch probability
/// information.
void setEdgeProbability(const BasicBlock *Src,
const SmallVectorImpl<BranchProbability> &Probs);
/// Copy outgoing edge probabilities from \p Src to \p Dst.
///
/// This allows to keep probabilities unset for the destination if they were
/// unset for source.
void copyEdgeProbabilities(BasicBlock *Src, BasicBlock *Dst);
/// Swap outgoing edges probabilities for \p Src with branch terminator
void swapSuccEdgesProbabilities(const BasicBlock *Src);
static BranchProbability getBranchProbStackProtector(bool IsLikely) {
static const BranchProbability LikelyProb((1u << 20) - 1, 1u << 20);
return IsLikely ? LikelyProb : LikelyProb.getCompl();
}
void calculate(const Function &F, const LoopInfo &LI,
const TargetLibraryInfo *TLI, DominatorTree *DT,
PostDominatorTree *PDT);
/// Forget analysis results for the given basic block.
void eraseBlock(const BasicBlock *BB);
// Data structure to track SCCs for handling irreducible loops.
class SccInfo {
// Enum of types to classify basic blocks in SCC. Basic block belonging to
// SCC is 'Inner' until it is either 'Header' or 'Exiting'. Note that a
// basic block can be 'Header' and 'Exiting' at the same time.
enum SccBlockType {
Inner = 0x0,
Header = 0x1,
Exiting = 0x2,
};
// Map of basic blocks to SCC IDs they belong to. If basic block doesn't
// belong to any SCC it is not in the map.
using SccMap = DenseMap<const BasicBlock *, int>;
// Each basic block in SCC is attributed with one or several types from
// SccBlockType. Map value has uint32_t type (instead of SccBlockType)
// since basic block may be for example "Header" and "Exiting" at the same
// time and we need to be able to keep more than one value from
// SccBlockType.
using SccBlockTypeMap = DenseMap<const BasicBlock *, uint32_t>;
// Vector containing classification of basic blocks for all SCCs where i'th
// vector element corresponds to SCC with ID equal to i.
using SccBlockTypeMaps = std::vector<SccBlockTypeMap>;
SccMap SccNums;
SccBlockTypeMaps SccBlocks;
public:
explicit SccInfo(const Function &F);
/// If \p BB belongs to some SCC then ID of that SCC is returned, otherwise
/// -1 is returned. If \p BB belongs to more than one SCC at the same time
/// result is undefined.
int getSCCNum(const BasicBlock *BB) const;
/// Returns true if \p BB is a 'header' block in SCC with \p SccNum ID,
/// false otherwise.
bool isSCCHeader(const BasicBlock *BB, int SccNum) const {
return getSccBlockType(BB, SccNum) & Header;
}
/// Returns true if \p BB is an 'exiting' block in SCC with \p SccNum ID,
/// false otherwise.
bool isSCCExitingBlock(const BasicBlock *BB, int SccNum) const {
return getSccBlockType(BB, SccNum) & Exiting;
}
/// Fills in \p Enters vector with all such blocks that don't belong to
/// SCC with \p SccNum ID but there is an edge to a block belonging to the
/// SCC.
void getSccEnterBlocks(int SccNum,
SmallVectorImpl<BasicBlock *> &Enters) const;
/// Fills in \p Exits vector with all such blocks that don't belong to
/// SCC with \p SccNum ID but there is an edge from a block belonging to the
/// SCC.
void getSccExitBlocks(int SccNum,
SmallVectorImpl<BasicBlock *> &Exits) const;
private:
/// Returns \p BB's type according to classification given by SccBlockType
/// enum. Please note that \p BB must belong to SSC with \p SccNum ID.
uint32_t getSccBlockType(const BasicBlock *BB, int SccNum) const;
/// Calculates \p BB's type and stores it in internal data structures for
/// future use. Please note that \p BB must belong to SSC with \p SccNum ID.
void calculateSccBlockType(const BasicBlock *BB, int SccNum);
};
private:
// We need to store CallbackVH's in order to correctly handle basic block
// removal.
class BasicBlockCallbackVH final : public CallbackVH {
BranchProbabilityInfo *BPI;
void deleted() override {
assert(BPI != nullptr);
BPI->eraseBlock(cast<BasicBlock>(getValPtr()));
}
public:
BasicBlockCallbackVH(const Value *V, BranchProbabilityInfo *BPI = nullptr)
: CallbackVH(const_cast<Value *>(V)), BPI(BPI) {}
};
/// Pair of Loop and SCC ID number. Used to unify handling of normal and
/// SCC based loop representations.
using LoopData = std::pair<Loop *, int>;
/// Helper class to keep basic block along with its loop data information.
class LoopBlock {
public:
explicit LoopBlock(const BasicBlock *BB, const LoopInfo &LI,
const SccInfo &SccI);
const BasicBlock *getBlock() const { return BB; }
BasicBlock *getBlock() { return const_cast<BasicBlock *>(BB); }
LoopData getLoopData() const { return LD; }
Loop *getLoop() const { return LD.first; }
int getSccNum() const { return LD.second; }
bool belongsToLoop() const { return getLoop() || getSccNum() != -1; }
bool belongsToSameLoop(const LoopBlock &LB) const {
return (LB.getLoop() && getLoop() == LB.getLoop()) ||
(LB.getSccNum() != -1 && getSccNum() == LB.getSccNum());
}
private:
const BasicBlock *const BB = nullptr;
LoopData LD = {nullptr, -1};
};
// Pair of LoopBlocks representing an edge from first to second block.
using LoopEdge = std::pair<const LoopBlock &, const LoopBlock &>;
DenseSet<BasicBlockCallbackVH, DenseMapInfo<Value*>> Handles;
// Since we allow duplicate edges from one basic block to another, we use
// a pair (PredBlock and an index in the successors) to specify an edge.
using Edge = std::pair<const BasicBlock *, unsigned>;
DenseMap<Edge, BranchProbability> Probs;
/// Track the last function we run over for printing.
const Function *LastF = nullptr;
const LoopInfo *LI = nullptr;
/// Keeps information about all SCCs in a function.
std::unique_ptr<const SccInfo> SccI;
/// Keeps mapping of a basic block to its estimated weight.
SmallDenseMap<const BasicBlock *, uint32_t> EstimatedBlockWeight;
/// Keeps mapping of a loop to estimated weight to enter the loop.
SmallDenseMap<LoopData, uint32_t> EstimatedLoopWeight;
/// Helper to construct LoopBlock for \p BB.
LoopBlock getLoopBlock(const BasicBlock *BB) const {
return LoopBlock(BB, *LI, *SccI.get());
}
/// Returns true if destination block belongs to some loop and source block is
/// either doesn't belong to any loop or belongs to a loop which is not inner
/// relative to the destination block.
bool isLoopEnteringEdge(const LoopEdge &Edge) const;
/// Returns true if source block belongs to some loop and destination block is
/// either doesn't belong to any loop or belongs to a loop which is not inner
/// relative to the source block.
bool isLoopExitingEdge(const LoopEdge &Edge) const;
/// Returns true if \p Edge is either enters to or exits from some loop, false
/// in all other cases.
bool isLoopEnteringExitingEdge(const LoopEdge &Edge) const;
/// Returns true if source and destination blocks belongs to the same loop and
/// destination block is loop header.
bool isLoopBackEdge(const LoopEdge &Edge) const;
// Fills in \p Enters vector with all "enter" blocks to a loop \LB belongs to.
void getLoopEnterBlocks(const LoopBlock &LB,
SmallVectorImpl<BasicBlock *> &Enters) const;
// Fills in \p Exits vector with all "exit" blocks from a loop \LB belongs to.
void getLoopExitBlocks(const LoopBlock &LB,
SmallVectorImpl<BasicBlock *> &Exits) const;
/// Returns estimated weight for \p BB. std::nullopt if \p BB has no estimated
/// weight.
std::optional<uint32_t> getEstimatedBlockWeight(const BasicBlock *BB) const;
/// Returns estimated weight to enter \p L. In other words it is weight of
/// loop's header block not scaled by trip count. Returns std::nullopt if \p L
/// has no no estimated weight.
std::optional<uint32_t> getEstimatedLoopWeight(const LoopData &L) const;
/// Return estimated weight for \p Edge. Returns std::nullopt if estimated
/// weight is unknown.
std::optional<uint32_t> getEstimatedEdgeWeight(const LoopEdge &Edge) const;
/// Iterates over all edges leading from \p SrcBB to \p Successors and
/// returns maximum of all estimated weights. If at least one edge has unknown
/// estimated weight std::nullopt is returned.
template <class IterT>
std::optional<uint32_t>
getMaxEstimatedEdgeWeight(const LoopBlock &SrcBB,
iterator_range<IterT> Successors) const;
/// If \p LoopBB has no estimated weight then set it to \p BBWeight and
/// return true. Otherwise \p BB's weight remains unchanged and false is
/// returned. In addition all blocks/loops that might need their weight to be
/// re-estimated are put into BlockWorkList/LoopWorkList.
bool updateEstimatedBlockWeight(LoopBlock &LoopBB, uint32_t BBWeight,
SmallVectorImpl<BasicBlock *> &BlockWorkList,
SmallVectorImpl<LoopBlock> &LoopWorkList);
/// Starting from \p LoopBB (including \p LoopBB itself) propagate \p BBWeight
/// up the domination tree.
void propagateEstimatedBlockWeight(const LoopBlock &LoopBB, DominatorTree *DT,
PostDominatorTree *PDT, uint32_t BBWeight,
SmallVectorImpl<BasicBlock *> &WorkList,
SmallVectorImpl<LoopBlock> &LoopWorkList);
/// Returns block's weight encoded in the IR.
std::optional<uint32_t> getInitialEstimatedBlockWeight(const BasicBlock *BB);
// Computes estimated weights for all blocks in \p F.
void computeEestimateBlockWeight(const Function &F, DominatorTree *DT,
PostDominatorTree *PDT);
/// Based on computed weights by \p computeEstimatedBlockWeight set
/// probabilities on branches.
bool calcEstimatedHeuristics(const BasicBlock *BB);
bool calcMetadataWeights(const BasicBlock *BB);
bool calcPointerHeuristics(const BasicBlock *BB);
bool calcZeroHeuristics(const BasicBlock *BB, const TargetLibraryInfo *TLI);
bool calcFloatingPointHeuristics(const BasicBlock *BB);
};
/// Analysis pass which computes \c BranchProbabilityInfo.
class BranchProbabilityAnalysis
: public AnalysisInfoMixin<BranchProbabilityAnalysis> {
friend AnalysisInfoMixin<BranchProbabilityAnalysis>;
static AnalysisKey Key;
public:
/// Provide the result type for this analysis pass.
using Result = BranchProbabilityInfo;
/// Run the analysis pass over a function and produce BPI.
BranchProbabilityInfo run(Function &F, FunctionAnalysisManager &AM);
};
/// Printer pass for the \c BranchProbabilityAnalysis results.
class BranchProbabilityPrinterPass
: public PassInfoMixin<BranchProbabilityPrinterPass> {
raw_ostream &OS;
public:
explicit BranchProbabilityPrinterPass(raw_ostream &OS) : OS(OS) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
};
/// Legacy analysis pass which computes \c BranchProbabilityInfo.
class BranchProbabilityInfoWrapperPass : public FunctionPass {
BranchProbabilityInfo BPI;
public:
static char ID;
BranchProbabilityInfoWrapperPass();
BranchProbabilityInfo &getBPI() { return BPI; }
const BranchProbabilityInfo &getBPI() const { return BPI; }
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnFunction(Function &F) override;
void releaseMemory() override;
void print(raw_ostream &OS, const Module *M = nullptr) const override;
};
} // end namespace llvm
#endif // LLVM_ANALYSIS_BRANCHPROBABILITYINFO_H
PK iwFZh�/� � ' Analysis/ScalarEvolutionAliasAnalysis.hnu �[��� //===- ScalarEvolutionAliasAnalysis.h - SCEV-based AA -----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
/// \file
/// This is the interface for a SCEV-based alias analysis.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_SCALAREVOLUTIONALIASANALYSIS_H
#define LLVM_ANALYSIS_SCALAREVOLUTIONALIASANALYSIS_H
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Pass.h"
namespace llvm {
class Function;
class ScalarEvolution;
class SCEV;
/// A simple alias analysis implementation that uses ScalarEvolution to answer
/// queries.
class SCEVAAResult : public AAResultBase {
ScalarEvolution &SE;
public:
explicit SCEVAAResult(ScalarEvolution &SE) : SE(SE) {}
SCEVAAResult(SCEVAAResult &&Arg) : AAResultBase(std::move(Arg)), SE(Arg.SE) {}
AliasResult alias(const MemoryLocation &LocA, const MemoryLocation &LocB,
AAQueryInfo &AAQI, const Instruction *CtxI);
bool invalidate(Function &F, const PreservedAnalyses &PA,
FunctionAnalysisManager::Invalidator &Inv);
private:
Value *GetBaseValue(const SCEV *S);
};
/// Analysis pass providing a never-invalidated alias analysis result.
class SCEVAA : public AnalysisInfoMixin<SCEVAA> {
friend AnalysisInfoMixin<SCEVAA>;
static AnalysisKey Key;
public:
typedef SCEVAAResult Result;
SCEVAAResult run(Function &F, FunctionAnalysisManager &AM);
};
/// Legacy wrapper pass to provide the SCEVAAResult object.
class SCEVAAWrapperPass : public FunctionPass {
std::unique_ptr<SCEVAAResult> Result;
public:
static char ID;
SCEVAAWrapperPass();
SCEVAAResult &getResult() { return *Result; }
const SCEVAAResult &getResult() const { return *Result; }
bool runOnFunction(Function &F) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
};
/// Creates an instance of \c SCEVAAWrapperPass.
FunctionPass *createSCEVAAWrapperPass();
}
#endif
PK iwFZ#PϣB: B: Analysis/TargetLibraryInfo.defnu �[��� //===-- TargetLibraryInfo.def - Library information -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// This .def file will either fill in the enum definition or fill in the
// string representation array definition for TargetLibraryInfo.
// Which is defined depends on whether TLI_DEFINE_ENUM is defined or
// TLI_DEFINE_STRING is defined. Only one should be defined at a time.
// NOTE: The nofree attribute is added to Libfuncs which are not
// listed as free or realloc functions in MemoryBuiltins.cpp
//
// When adding a function which frees memory include the LibFunc
// in lib/Analysis/MemoryBuiltins.cpp "isLibFreeFunction".
//
// When adding a LibFunc which reallocates memory include the LibFunc
// in lib/Analysis/MemoryBuiltins.cpp "AllocationFnData[]".
#if (defined(TLI_DEFINE_ENUM) + \
defined(TLI_DEFINE_STRING) + \
defined(TLI_DEFINE_SIG) != 1)
#error "Must define exactly one of TLI_DEFINE_ENUM, TLI_DEFINE_STRING, or TLI_DEFINE_SIG for TLI .def."
#else
// Exactly one of TLI_DEFINE_ENUM/STRING/SIG is defined.
#if defined(TLI_DEFINE_ENUM)
#define TLI_DEFINE_ENUM_INTERNAL(enum_variant) LibFunc_##enum_variant,
#define TLI_DEFINE_STRING_INTERNAL(string_repr)
#define TLI_DEFINE_SIG_INTERNAL(...)
#elif defined(TLI_DEFINE_STRING)
#define TLI_DEFINE_ENUM_INTERNAL(enum_variant)
#define TLI_DEFINE_STRING_INTERNAL(string_repr) string_repr,
#define TLI_DEFINE_SIG_INTERNAL(...)
#else
#define TLI_DEFINE_ENUM_INTERNAL(enum_variant)
#define TLI_DEFINE_STRING_INTERNAL(string_repr)
#define TLI_DEFINE_SIG_INTERNAL(...) { __VA_ARGS__ },
#endif
/// void *operator new(unsigned int);
TLI_DEFINE_ENUM_INTERNAL(msvc_new_int)
TLI_DEFINE_STRING_INTERNAL("??2@YAPAXI@Z")
TLI_DEFINE_SIG_INTERNAL(Ptr, Int)
/// void *operator new(unsigned int, const std::nothrow_t&);
TLI_DEFINE_ENUM_INTERNAL(msvc_new_int_nothrow)
TLI_DEFINE_STRING_INTERNAL("??2@YAPAXIABUnothrow_t@std@@@Z")
TLI_DEFINE_SIG_INTERNAL(Ptr, Int, Ptr)
/// void *operator new(unsigned long long);
TLI_DEFINE_ENUM_INTERNAL(msvc_new_longlong)
TLI_DEFINE_STRING_INTERNAL("??2@YAPEAX_K@Z")
TLI_DEFINE_SIG_INTERNAL(Ptr, LLong)
/// void *operator new(unsigned long long, const std::nothrow_t&);
TLI_DEFINE_ENUM_INTERNAL(msvc_new_longlong_nothrow)
TLI_DEFINE_STRING_INTERNAL("??2@YAPEAX_KAEBUnothrow_t@std@@@Z")
TLI_DEFINE_SIG_INTERNAL(Ptr, LLong, Ptr)
/// void operator delete(void*);
TLI_DEFINE_ENUM_INTERNAL(msvc_delete_ptr32)
TLI_DEFINE_STRING_INTERNAL("??3@YAXPAX@Z")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr)
/// void operator delete(void*, const std::nothrow_t&);
TLI_DEFINE_ENUM_INTERNAL(msvc_delete_ptr32_nothrow)
TLI_DEFINE_STRING_INTERNAL("??3@YAXPAXABUnothrow_t@std@@@Z")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Ptr)
/// void operator delete(void*, unsigned int);
TLI_DEFINE_ENUM_INTERNAL(msvc_delete_ptr32_int)
TLI_DEFINE_STRING_INTERNAL("??3@YAXPAXI@Z")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Int)
/// void operator delete(void*);
TLI_DEFINE_ENUM_INTERNAL(msvc_delete_ptr64)
TLI_DEFINE_STRING_INTERNAL("??3@YAXPEAX@Z")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr)
/// void operator delete(void*, const std::nothrow_t&);
TLI_DEFINE_ENUM_INTERNAL(msvc_delete_ptr64_nothrow)
TLI_DEFINE_STRING_INTERNAL("??3@YAXPEAXAEBUnothrow_t@std@@@Z")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Ptr)
/// void operator delete(void*, unsigned long long);
TLI_DEFINE_ENUM_INTERNAL(msvc_delete_ptr64_longlong)
TLI_DEFINE_STRING_INTERNAL("??3@YAXPEAX_K@Z")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, LLong)
/// void *operator new[](unsigned int);
TLI_DEFINE_ENUM_INTERNAL(msvc_new_array_int)
TLI_DEFINE_STRING_INTERNAL("??_U@YAPAXI@Z")
TLI_DEFINE_SIG_INTERNAL(Ptr, Int)
/// void *operator new[](unsigned int, const std::nothrow_t&);
TLI_DEFINE_ENUM_INTERNAL(msvc_new_array_int_nothrow)
TLI_DEFINE_STRING_INTERNAL("??_U@YAPAXIABUnothrow_t@std@@@Z")
TLI_DEFINE_SIG_INTERNAL(Ptr, Int, Ptr)
/// void *operator new[](unsigned long long);
TLI_DEFINE_ENUM_INTERNAL(msvc_new_array_longlong)
TLI_DEFINE_STRING_INTERNAL("??_U@YAPEAX_K@Z")
TLI_DEFINE_SIG_INTERNAL(Ptr, LLong)
/// void *operator new[](unsigned long long, const std::nothrow_t&);
TLI_DEFINE_ENUM_INTERNAL(msvc_new_array_longlong_nothrow)
TLI_DEFINE_STRING_INTERNAL("??_U@YAPEAX_KAEBUnothrow_t@std@@@Z")
TLI_DEFINE_SIG_INTERNAL(Ptr, LLong, Ptr)
/// void operator delete[](void*);
TLI_DEFINE_ENUM_INTERNAL(msvc_delete_array_ptr32)
TLI_DEFINE_STRING_INTERNAL("??_V@YAXPAX@Z")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr)
/// void operator delete[](void*, const std::nothrow_t&);
TLI_DEFINE_ENUM_INTERNAL(msvc_delete_array_ptr32_nothrow)
TLI_DEFINE_STRING_INTERNAL("??_V@YAXPAXABUnothrow_t@std@@@Z")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Ptr)
/// void operator delete[](void*, unsigned int);
TLI_DEFINE_ENUM_INTERNAL(msvc_delete_array_ptr32_int)
TLI_DEFINE_STRING_INTERNAL("??_V@YAXPAXI@Z")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Int)
/// void operator delete[](void*);
TLI_DEFINE_ENUM_INTERNAL(msvc_delete_array_ptr64)
TLI_DEFINE_STRING_INTERNAL("??_V@YAXPEAX@Z")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr)
/// void operator delete[](void*, const std::nothrow_t&);
TLI_DEFINE_ENUM_INTERNAL(msvc_delete_array_ptr64_nothrow)
TLI_DEFINE_STRING_INTERNAL("??_V@YAXPEAXAEBUnothrow_t@std@@@Z")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Ptr)
/// void operator delete[](void*, unsigned long long);
TLI_DEFINE_ENUM_INTERNAL(msvc_delete_array_ptr64_longlong)
TLI_DEFINE_STRING_INTERNAL("??_V@YAXPEAX_K@Z")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, LLong)
/// int _IO_getc(_IO_FILE * __fp);
TLI_DEFINE_ENUM_INTERNAL(under_IO_getc)
TLI_DEFINE_STRING_INTERNAL("_IO_getc")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// int _IO_putc(int __c, _IO_FILE * __fp);
TLI_DEFINE_ENUM_INTERNAL(under_IO_putc)
TLI_DEFINE_STRING_INTERNAL("_IO_putc")
TLI_DEFINE_SIG_INTERNAL(Int, Int, Ptr)
/// void operator delete[](void*);
TLI_DEFINE_ENUM_INTERNAL(ZdaPv)
TLI_DEFINE_STRING_INTERNAL("_ZdaPv")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr)
/// void operator delete[](void*, const std::nothrow_t&);
TLI_DEFINE_ENUM_INTERNAL(ZdaPvRKSt9nothrow_t)
TLI_DEFINE_STRING_INTERNAL("_ZdaPvRKSt9nothrow_t")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Ptr)
/// void operator delete[](void*, std::align_val_t);
TLI_DEFINE_ENUM_INTERNAL(ZdaPvSt11align_val_t)
TLI_DEFINE_STRING_INTERNAL("_ZdaPvSt11align_val_t")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, IntPlus)
/// void operator delete[](void*, std::align_val_t, const std::nothrow_t&)
TLI_DEFINE_ENUM_INTERNAL(ZdaPvSt11align_val_tRKSt9nothrow_t)
TLI_DEFINE_STRING_INTERNAL("_ZdaPvSt11align_val_tRKSt9nothrow_t")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, IntPlus, Ptr)
/// void operator delete[](void*, unsigned int);
TLI_DEFINE_ENUM_INTERNAL(ZdaPvj)
TLI_DEFINE_STRING_INTERNAL("_ZdaPvj")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Int)
/// void operator delete[](void*, unsigned int, std::align_val_t);
TLI_DEFINE_ENUM_INTERNAL(ZdaPvjSt11align_val_t)
TLI_DEFINE_STRING_INTERNAL("_ZdaPvjSt11align_val_t")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Int, Int)
/// void operator delete[](void*, unsigned long);
TLI_DEFINE_ENUM_INTERNAL(ZdaPvm)
TLI_DEFINE_STRING_INTERNAL("_ZdaPvm")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Long)
/// void operator delete[](void*, unsigned long, std::align_val_t);
TLI_DEFINE_ENUM_INTERNAL(ZdaPvmSt11align_val_t)
TLI_DEFINE_STRING_INTERNAL("_ZdaPvmSt11align_val_t")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Long, Long)
/// void operator delete(void*);
TLI_DEFINE_ENUM_INTERNAL(ZdlPv)
TLI_DEFINE_STRING_INTERNAL("_ZdlPv")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr)
/// void operator delete(void*, const std::nothrow_t&);
TLI_DEFINE_ENUM_INTERNAL(ZdlPvRKSt9nothrow_t)
TLI_DEFINE_STRING_INTERNAL("_ZdlPvRKSt9nothrow_t")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Ptr)
/// void operator delete(void*, std::align_val_t)
TLI_DEFINE_ENUM_INTERNAL(ZdlPvSt11align_val_t)
TLI_DEFINE_STRING_INTERNAL("_ZdlPvSt11align_val_t")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, IntPlus)
/// void operator delete(void*, std::align_val_t, const std::nothrow_t&)
TLI_DEFINE_ENUM_INTERNAL(ZdlPvSt11align_val_tRKSt9nothrow_t)
TLI_DEFINE_STRING_INTERNAL("_ZdlPvSt11align_val_tRKSt9nothrow_t")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, IntPlus, Ptr)
/// void operator delete(void*, unsigned int);
TLI_DEFINE_ENUM_INTERNAL(ZdlPvj)
TLI_DEFINE_STRING_INTERNAL("_ZdlPvj")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Int)
/// void operator delete(void*, unsigned int, std::align_val_t)
TLI_DEFINE_ENUM_INTERNAL(ZdlPvjSt11align_val_t)
TLI_DEFINE_STRING_INTERNAL("_ZdlPvjSt11align_val_t")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Int, Int)
/// void operator delete(void*, unsigned long);
TLI_DEFINE_ENUM_INTERNAL(ZdlPvm)
TLI_DEFINE_STRING_INTERNAL("_ZdlPvm")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Long)
/// void operator delete(void*, unsigned long, std::align_val_t)
TLI_DEFINE_ENUM_INTERNAL(ZdlPvmSt11align_val_t)
TLI_DEFINE_STRING_INTERNAL("_ZdlPvmSt11align_val_t")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Long, Long)
/// void *operator new[](unsigned int);
TLI_DEFINE_ENUM_INTERNAL(Znaj)
TLI_DEFINE_STRING_INTERNAL("_Znaj")
TLI_DEFINE_SIG_INTERNAL(Ptr, Int)
/// void *operator new[](unsigned int, const std::nothrow_t&);
TLI_DEFINE_ENUM_INTERNAL(ZnajRKSt9nothrow_t)
TLI_DEFINE_STRING_INTERNAL("_ZnajRKSt9nothrow_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Int, Ptr)
/// void *operator new[](unsigned int, std::align_val_t)
TLI_DEFINE_ENUM_INTERNAL(ZnajSt11align_val_t)
TLI_DEFINE_STRING_INTERNAL("_ZnajSt11align_val_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Int, Int)
/// void *operator new[](unsigned int, std::align_val_t, const std::nothrow_t&)
TLI_DEFINE_ENUM_INTERNAL(ZnajSt11align_val_tRKSt9nothrow_t)
TLI_DEFINE_STRING_INTERNAL("_ZnajSt11align_val_tRKSt9nothrow_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Int, Int, Ptr)
/// void *operator new[](unsigned long);
TLI_DEFINE_ENUM_INTERNAL(Znam)
TLI_DEFINE_STRING_INTERNAL("_Znam")
TLI_DEFINE_SIG_INTERNAL(Ptr, Long)
/// void *operator new[](unsigned long, __hot_cold_t)
/// Currently this and other operator new interfaces that take a __hot_cold_t
/// hint are supported by the open source version of tcmalloc, see:
/// https://github.com/google/tcmalloc/blob/master/tcmalloc/new_extension.h
/// and for the definition of the __hot_cold_t parameter see:
/// https://github.com/google/tcmalloc/blob/master/tcmalloc/malloc_extension.h
TLI_DEFINE_ENUM_INTERNAL(Znam12__hot_cold_t)
TLI_DEFINE_STRING_INTERNAL("_Znam12__hot_cold_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Long, Bool)
/// void *operator new[](unsigned long, const std::nothrow_t&);
TLI_DEFINE_ENUM_INTERNAL(ZnamRKSt9nothrow_t)
TLI_DEFINE_STRING_INTERNAL("_ZnamRKSt9nothrow_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Long, Ptr)
/// void *operator new[](unsigned long, const std::nothrow_t&, __hot_cold_t)
TLI_DEFINE_ENUM_INTERNAL(ZnamRKSt9nothrow_t12__hot_cold_t)
TLI_DEFINE_STRING_INTERNAL("_ZnamRKSt9nothrow_t12__hot_cold_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Long, Ptr, Bool)
/// void *operator new[](unsigned long, std::align_val_t)
TLI_DEFINE_ENUM_INTERNAL(ZnamSt11align_val_t)
TLI_DEFINE_STRING_INTERNAL("_ZnamSt11align_val_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Long, Long)
/// void *operator new[](unsigned long, std::align_val_t, __hot_cold_t)
TLI_DEFINE_ENUM_INTERNAL(ZnamSt11align_val_t12__hot_cold_t)
TLI_DEFINE_STRING_INTERNAL("_ZnamSt11align_val_t12__hot_cold_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Long, Long, Bool)
/// void *operator new[](unsigned long, std::align_val_t, const std::nothrow_t&)
TLI_DEFINE_ENUM_INTERNAL(ZnamSt11align_val_tRKSt9nothrow_t)
TLI_DEFINE_STRING_INTERNAL("_ZnamSt11align_val_tRKSt9nothrow_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Long, Long, Ptr)
/// void *operator new[](unsigned long, std::align_val_t, const std::nothrow_t&, __hot_cold_t)
TLI_DEFINE_ENUM_INTERNAL(ZnamSt11align_val_tRKSt9nothrow_t12__hot_cold_t)
TLI_DEFINE_STRING_INTERNAL("_ZnamSt11align_val_tRKSt9nothrow_t12__hot_cold_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Long, Long, Ptr, Bool)
/// void *operator new(unsigned int);
TLI_DEFINE_ENUM_INTERNAL(Znwj)
TLI_DEFINE_STRING_INTERNAL("_Znwj")
TLI_DEFINE_SIG_INTERNAL(Ptr, Int)
/// void *operator new(unsigned int, const std::nothrow_t&);
TLI_DEFINE_ENUM_INTERNAL(ZnwjRKSt9nothrow_t)
TLI_DEFINE_STRING_INTERNAL("_ZnwjRKSt9nothrow_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Int, Ptr)
/// void *operator new(unsigned int, std::align_val_t)
TLI_DEFINE_ENUM_INTERNAL(ZnwjSt11align_val_t)
TLI_DEFINE_STRING_INTERNAL("_ZnwjSt11align_val_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Int, Int)
/// void *operator new(unsigned int, std::align_val_t, const std::nothrow_t&)
TLI_DEFINE_ENUM_INTERNAL(ZnwjSt11align_val_tRKSt9nothrow_t)
TLI_DEFINE_STRING_INTERNAL("_ZnwjSt11align_val_tRKSt9nothrow_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Int, Int, Ptr)
/// void *operator new(unsigned long);
TLI_DEFINE_ENUM_INTERNAL(Znwm)
TLI_DEFINE_STRING_INTERNAL("_Znwm")
TLI_DEFINE_SIG_INTERNAL(Ptr, Long)
/// void *operator new(unsigned long, __hot_cold_t)
TLI_DEFINE_ENUM_INTERNAL(Znwm12__hot_cold_t)
TLI_DEFINE_STRING_INTERNAL("_Znwm12__hot_cold_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Long, Bool)
/// void *operator new(unsigned long, const std::nothrow_t&);
TLI_DEFINE_ENUM_INTERNAL(ZnwmRKSt9nothrow_t)
TLI_DEFINE_STRING_INTERNAL("_ZnwmRKSt9nothrow_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Long, Ptr)
/// void *operator new(unsigned long, const std::nothrow_t&, __hot_cold_t)
TLI_DEFINE_ENUM_INTERNAL(ZnwmRKSt9nothrow_t12__hot_cold_t)
TLI_DEFINE_STRING_INTERNAL("_ZnwmRKSt9nothrow_t12__hot_cold_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Long, Ptr, Bool)
/// void *operator new(unsigned long, std::align_val_t)
TLI_DEFINE_ENUM_INTERNAL(ZnwmSt11align_val_t)
TLI_DEFINE_STRING_INTERNAL("_ZnwmSt11align_val_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Long, Long)
/// void *operator new(unsigned long, std::align_val_t, __hot_cold_t)
TLI_DEFINE_ENUM_INTERNAL(ZnwmSt11align_val_t12__hot_cold_t)
TLI_DEFINE_STRING_INTERNAL("_ZnwmSt11align_val_t12__hot_cold_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Long, Long, Bool)
/// void *operator new(unsigned long, std::align_val_t, const std::nothrow_t&)
TLI_DEFINE_ENUM_INTERNAL(ZnwmSt11align_val_tRKSt9nothrow_t)
TLI_DEFINE_STRING_INTERNAL("_ZnwmSt11align_val_tRKSt9nothrow_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Long, Long, Ptr)
/// void *operator new(unsigned long, std::align_val_t, const std::nothrow_t&, __hot_cold_t)
TLI_DEFINE_ENUM_INTERNAL(ZnwmSt11align_val_tRKSt9nothrow_t12__hot_cold_t)
TLI_DEFINE_STRING_INTERNAL("_ZnwmSt11align_val_tRKSt9nothrow_t12__hot_cold_t")
TLI_DEFINE_SIG_INTERNAL(Ptr, Long, Long, Ptr, Bool)
/// double __acos_finite(double x);
TLI_DEFINE_ENUM_INTERNAL(acos_finite)
TLI_DEFINE_STRING_INTERNAL("__acos_finite")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float __acosf_finite(float x);
TLI_DEFINE_ENUM_INTERNAL(acosf_finite)
TLI_DEFINE_STRING_INTERNAL("__acosf_finite")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// double __acosh_finite(double x);
TLI_DEFINE_ENUM_INTERNAL(acosh_finite)
TLI_DEFINE_STRING_INTERNAL("__acosh_finite")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float __acoshf_finite(float x);
TLI_DEFINE_ENUM_INTERNAL(acoshf_finite)
TLI_DEFINE_STRING_INTERNAL("__acoshf_finite")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double __acoshl_finite(long double x);
TLI_DEFINE_ENUM_INTERNAL(acoshl_finite)
TLI_DEFINE_STRING_INTERNAL("__acoshl_finite")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// long double __acosl_finite(long double x);
TLI_DEFINE_ENUM_INTERNAL(acosl_finite)
TLI_DEFINE_STRING_INTERNAL("__acosl_finite")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// double __asin_finite(double x);
TLI_DEFINE_ENUM_INTERNAL(asin_finite)
TLI_DEFINE_STRING_INTERNAL("__asin_finite")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float __asinf_finite(float x);
TLI_DEFINE_ENUM_INTERNAL(asinf_finite)
TLI_DEFINE_STRING_INTERNAL("__asinf_finite")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double __asinl_finite(long double x);
TLI_DEFINE_ENUM_INTERNAL(asinl_finite)
TLI_DEFINE_STRING_INTERNAL("__asinl_finite")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// double atan2_finite(double y, double x);
TLI_DEFINE_ENUM_INTERNAL(atan2_finite)
TLI_DEFINE_STRING_INTERNAL("__atan2_finite")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl, Dbl)
/// float atan2f_finite(float y, float x);
TLI_DEFINE_ENUM_INTERNAL(atan2f_finite)
TLI_DEFINE_STRING_INTERNAL("__atan2f_finite")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt, Flt)
/// long double atan2l_finite(long double y, long double x);
TLI_DEFINE_ENUM_INTERNAL(atan2l_finite)
TLI_DEFINE_STRING_INTERNAL("__atan2l_finite")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl, LDbl)
/// double __atanh_finite(double x);
TLI_DEFINE_ENUM_INTERNAL(atanh_finite)
TLI_DEFINE_STRING_INTERNAL("__atanh_finite")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float __atanhf_finite(float x);
TLI_DEFINE_ENUM_INTERNAL(atanhf_finite)
TLI_DEFINE_STRING_INTERNAL("__atanhf_finite")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double __atanhl_finite(long double x);
TLI_DEFINE_ENUM_INTERNAL(atanhl_finite)
TLI_DEFINE_STRING_INTERNAL("__atanhl_finite")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// void __atomic_load(size_t size, void *mptr, void *vptr, int smodel);
TLI_DEFINE_ENUM_INTERNAL(atomic_load)
TLI_DEFINE_STRING_INTERNAL("__atomic_load")
TLI_DEFINE_SIG_INTERNAL(Void, SizeT, Ptr, Ptr, Int)
/// void __atomic_store(size_t size, void *mptr, void *vptr, int smodel);
TLI_DEFINE_ENUM_INTERNAL(atomic_store)
TLI_DEFINE_STRING_INTERNAL("__atomic_store")
TLI_DEFINE_SIG_INTERNAL(Void, SizeT, Ptr, Ptr, Int)
/// double __cosh_finite(double x);
TLI_DEFINE_ENUM_INTERNAL(cosh_finite)
TLI_DEFINE_STRING_INTERNAL("__cosh_finite")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float __coshf_finite(float x);
TLI_DEFINE_ENUM_INTERNAL(coshf_finite)
TLI_DEFINE_STRING_INTERNAL("__coshf_finite")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double __coshl_finite(long double x);
TLI_DEFINE_ENUM_INTERNAL(coshl_finite)
TLI_DEFINE_STRING_INTERNAL("__coshl_finite")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// double __cospi(double x);
TLI_DEFINE_ENUM_INTERNAL(cospi)
TLI_DEFINE_STRING_INTERNAL("__cospi")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float __cospif(float x);
TLI_DEFINE_ENUM_INTERNAL(cospif)
TLI_DEFINE_STRING_INTERNAL("__cospif")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// int __cxa_atexit(void (*f)(void *), void *p, void *d);
TLI_DEFINE_ENUM_INTERNAL(cxa_atexit)
TLI_DEFINE_STRING_INTERNAL("__cxa_atexit")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ptr)
/// void __cxa_guard_abort(guard_t *guard);
/// guard_t is int64_t in Itanium ABI or int32_t on ARM eabi.
TLI_DEFINE_ENUM_INTERNAL(cxa_guard_abort)
TLI_DEFINE_STRING_INTERNAL("__cxa_guard_abort")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr)
/// int __cxa_guard_acquire(guard_t *guard);
TLI_DEFINE_ENUM_INTERNAL(cxa_guard_acquire)
TLI_DEFINE_STRING_INTERNAL("__cxa_guard_acquire")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// void __cxa_guard_release(guard_t *guard);
TLI_DEFINE_ENUM_INTERNAL(cxa_guard_release)
TLI_DEFINE_STRING_INTERNAL("__cxa_guard_release")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr)
/// double __exp10_finite(double x);
TLI_DEFINE_ENUM_INTERNAL(exp10_finite)
TLI_DEFINE_STRING_INTERNAL("__exp10_finite")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float __exp10f_finite(float x);
TLI_DEFINE_ENUM_INTERNAL(exp10f_finite)
TLI_DEFINE_STRING_INTERNAL("__exp10f_finite")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double __exp10l_finite(long double x);
TLI_DEFINE_ENUM_INTERNAL(exp10l_finite)
TLI_DEFINE_STRING_INTERNAL("__exp10l_finite")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// double __exp2_finite(double x);
TLI_DEFINE_ENUM_INTERNAL(exp2_finite)
TLI_DEFINE_STRING_INTERNAL("__exp2_finite")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float __exp2f_finite(float x);
TLI_DEFINE_ENUM_INTERNAL(exp2f_finite)
TLI_DEFINE_STRING_INTERNAL("__exp2f_finite")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double __exp2l_finite(long double x);
TLI_DEFINE_ENUM_INTERNAL(exp2l_finite)
TLI_DEFINE_STRING_INTERNAL("__exp2l_finite")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// double __exp_finite(double x);
TLI_DEFINE_ENUM_INTERNAL(exp_finite)
TLI_DEFINE_STRING_INTERNAL("__exp_finite")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float __expf_finite(float x);
TLI_DEFINE_ENUM_INTERNAL(expf_finite)
TLI_DEFINE_STRING_INTERNAL("__expf_finite")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double __expl_finite(long double x);
TLI_DEFINE_ENUM_INTERNAL(expl_finite)
TLI_DEFINE_STRING_INTERNAL("__expl_finite")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// int __isoc99_scanf (const char *format, ...)
TLI_DEFINE_ENUM_INTERNAL(dunder_isoc99_scanf)
TLI_DEFINE_STRING_INTERNAL("__isoc99_scanf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ellip)
/// int __isoc99_sscanf(const char *s, const char *format, ...)
TLI_DEFINE_ENUM_INTERNAL(dunder_isoc99_sscanf)
TLI_DEFINE_STRING_INTERNAL("__isoc99_sscanf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ellip)
/// void* __kmpc_alloc_shared(size_t nbyte);
TLI_DEFINE_ENUM_INTERNAL(__kmpc_alloc_shared)
TLI_DEFINE_STRING_INTERNAL("__kmpc_alloc_shared")
TLI_DEFINE_SIG_INTERNAL(Ptr, SizeT)
/// void __kmpc_free_shared(void *ptr, size_t nbyte);
TLI_DEFINE_ENUM_INTERNAL(__kmpc_free_shared)
TLI_DEFINE_STRING_INTERNAL("__kmpc_free_shared")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, SizeT)
/// double __log10_finite(double x);
TLI_DEFINE_ENUM_INTERNAL(log10_finite)
TLI_DEFINE_STRING_INTERNAL("__log10_finite")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float __log10f_finite(float x);
TLI_DEFINE_ENUM_INTERNAL(log10f_finite)
TLI_DEFINE_STRING_INTERNAL("__log10f_finite")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double __log10l_finite(long double x);
TLI_DEFINE_ENUM_INTERNAL(log10l_finite)
TLI_DEFINE_STRING_INTERNAL("__log10l_finite")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// double __log2_finite(double x);
TLI_DEFINE_ENUM_INTERNAL(log2_finite)
TLI_DEFINE_STRING_INTERNAL("__log2_finite")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float __log2f_finite(float x);
TLI_DEFINE_ENUM_INTERNAL(log2f_finite)
TLI_DEFINE_STRING_INTERNAL("__log2f_finite")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double __log2l_finite(long double x);
TLI_DEFINE_ENUM_INTERNAL(log2l_finite)
TLI_DEFINE_STRING_INTERNAL("__log2l_finite")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// double __log_finite(double x);
TLI_DEFINE_ENUM_INTERNAL(log_finite)
TLI_DEFINE_STRING_INTERNAL("__log_finite")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float __logf_finite(float x);
TLI_DEFINE_ENUM_INTERNAL(logf_finite)
TLI_DEFINE_STRING_INTERNAL("__logf_finite")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double __logl_finite(long double x);
TLI_DEFINE_ENUM_INTERNAL(logl_finite)
TLI_DEFINE_STRING_INTERNAL("__logl_finite")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// void *__memccpy_chk(void *dst, const void *src, int c, size_t n,
/// size_t dstsize)
TLI_DEFINE_ENUM_INTERNAL(memccpy_chk)
TLI_DEFINE_STRING_INTERNAL("__memccpy_chk")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, Int, SizeT, SizeT)
/// void *__memcpy_chk(void *s1, const void *s2, size_t n, size_t s1size);
TLI_DEFINE_ENUM_INTERNAL(memcpy_chk)
TLI_DEFINE_STRING_INTERNAL("__memcpy_chk")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, SizeT, SizeT)
/// void *__memmove_chk(void *s1, const void *s2, size_t n, size_t s1size);
TLI_DEFINE_ENUM_INTERNAL(memmove_chk)
TLI_DEFINE_STRING_INTERNAL("__memmove_chk")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, SizeT, SizeT)
/// void *__mempcpy_chk(void *s1, const void *s2, size_t n, size_t s1size);
TLI_DEFINE_ENUM_INTERNAL(mempcpy_chk)
TLI_DEFINE_STRING_INTERNAL("__mempcpy_chk")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, SizeT, SizeT)
/// void *__memset_chk(void *s, int v, size_t n, size_t s1size);
TLI_DEFINE_ENUM_INTERNAL(memset_chk)
TLI_DEFINE_STRING_INTERNAL("__memset_chk")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Int, SizeT, SizeT)
// int __nvvm_reflect(const char *)
TLI_DEFINE_ENUM_INTERNAL(nvvm_reflect)
TLI_DEFINE_STRING_INTERNAL("__nvvm_reflect")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// double __pow_finite(double x, double y);
TLI_DEFINE_ENUM_INTERNAL(pow_finite)
TLI_DEFINE_STRING_INTERNAL("__pow_finite")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl, Dbl)
/// float _powf_finite(float x, float y);
TLI_DEFINE_ENUM_INTERNAL(powf_finite)
TLI_DEFINE_STRING_INTERNAL("__powf_finite")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt, Flt)
/// long double __powl_finite(long double x, long double y);
TLI_DEFINE_ENUM_INTERNAL(powl_finite)
TLI_DEFINE_STRING_INTERNAL("__powl_finite")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl, LDbl)
/// double __sincospi_stret(double x);
TLI_DEFINE_ENUM_INTERNAL(sincospi_stret)
TLI_DEFINE_STRING_INTERNAL("__sincospi_stret")
TLI_DEFINE_SIG_INTERNAL(/* Checked manually. */)
/// float __sincospif_stret(float x);
TLI_DEFINE_ENUM_INTERNAL(sincospif_stret)
TLI_DEFINE_STRING_INTERNAL("__sincospif_stret")
TLI_DEFINE_SIG_INTERNAL(/* Checked manually. */)
/// double __sinh_finite(double x);
TLI_DEFINE_ENUM_INTERNAL(sinh_finite)
TLI_DEFINE_STRING_INTERNAL("__sinh_finite")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float _sinhf_finite(float x);
TLI_DEFINE_ENUM_INTERNAL(sinhf_finite)
TLI_DEFINE_STRING_INTERNAL("__sinhf_finite")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double __sinhl_finite(long double x);
TLI_DEFINE_ENUM_INTERNAL(sinhl_finite)
TLI_DEFINE_STRING_INTERNAL("__sinhl_finite")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// double __sinpi(double x);
TLI_DEFINE_ENUM_INTERNAL(sinpi)
TLI_DEFINE_STRING_INTERNAL("__sinpi")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float __sinpif(float x);
TLI_DEFINE_ENUM_INTERNAL(sinpif)
TLI_DEFINE_STRING_INTERNAL("__sinpif")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// int __small_fprintf(FILE *stream, const char *format, ...);
TLI_DEFINE_ENUM_INTERNAL(small_fprintf)
TLI_DEFINE_STRING_INTERNAL("__small_fprintf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ellip)
/// int __small_printf(const char *format, ...);
TLI_DEFINE_ENUM_INTERNAL(small_printf)
TLI_DEFINE_STRING_INTERNAL("__small_printf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ellip)
/// int __small_sprintf(char *str, const char *format, ...);
TLI_DEFINE_ENUM_INTERNAL(small_sprintf)
TLI_DEFINE_STRING_INTERNAL("__small_sprintf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ellip)
/// int __snprintf_chk(char *s, size_t n, int flags, size_t slen,
/// const char *format, ...);
TLI_DEFINE_ENUM_INTERNAL(snprintf_chk)
TLI_DEFINE_STRING_INTERNAL("__snprintf_chk")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, SizeT, Int, SizeT, Ptr, Ellip)
/// int __sprintf_chk(char *str, int flags, size_t str_len,
/// const char *format, ...);
TLI_DEFINE_ENUM_INTERNAL(sprintf_chk)
TLI_DEFINE_STRING_INTERNAL("__sprintf_chk")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Int, SizeT, Ptr, Ellip)
/// double __sqrt_finite(double x);
TLI_DEFINE_ENUM_INTERNAL(sqrt_finite)
TLI_DEFINE_STRING_INTERNAL("__sqrt_finite")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float __sqrt_finite(float x);
TLI_DEFINE_ENUM_INTERNAL(sqrtf_finite)
TLI_DEFINE_STRING_INTERNAL("__sqrtf_finite")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double __sqrt_finite(long double x);
TLI_DEFINE_ENUM_INTERNAL(sqrtl_finite)
TLI_DEFINE_STRING_INTERNAL("__sqrtl_finite")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// char *__stpcpy_chk(char *s1, const char *s2, size_t s1size);
TLI_DEFINE_ENUM_INTERNAL(stpcpy_chk)
TLI_DEFINE_STRING_INTERNAL("__stpcpy_chk")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, SizeT)
/// char *__stpncpy_chk(char *s1, const char *s2, size_t n, size_t s1size);
TLI_DEFINE_ENUM_INTERNAL(stpncpy_chk)
TLI_DEFINE_STRING_INTERNAL("__stpncpy_chk")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, SizeT, SizeT)
/// char *__strcat_chk(char *s1, const char *s2, size_t s1size);
TLI_DEFINE_ENUM_INTERNAL(strcat_chk)
TLI_DEFINE_STRING_INTERNAL("__strcat_chk")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, SizeT)
/// char *__strcpy_chk(char *s1, const char *s2, size_t s1size);
TLI_DEFINE_ENUM_INTERNAL(strcpy_chk)
TLI_DEFINE_STRING_INTERNAL("__strcpy_chk")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, SizeT)
/// char * __strdup(const char *s);
TLI_DEFINE_ENUM_INTERNAL(dunder_strdup)
TLI_DEFINE_STRING_INTERNAL("__strdup")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr)
/// size_t __strlcat_chk(char *dst, const char *src, size_t size,
/// size_t dstsize);
TLI_DEFINE_ENUM_INTERNAL(strlcat_chk)
TLI_DEFINE_STRING_INTERNAL("__strlcat_chk")
TLI_DEFINE_SIG_INTERNAL(SizeT, Ptr, Ptr, SizeT, SizeT)
/// size_t __strlcpy_chk(char *dst, const char *src, size_t size,
/// size_t dstsize);
TLI_DEFINE_ENUM_INTERNAL(strlcpy_chk)
TLI_DEFINE_STRING_INTERNAL("__strlcpy_chk")
TLI_DEFINE_SIG_INTERNAL(SizeT, Ptr, Ptr, SizeT, SizeT)
/// size_t __strlen_chk(const char *s1, size_t s1size);
TLI_DEFINE_ENUM_INTERNAL(strlen_chk)
TLI_DEFINE_STRING_INTERNAL("__strlen_chk")
TLI_DEFINE_SIG_INTERNAL(SizeT, Ptr, SizeT)
/// char *strncat_chk(char *s1, const char *s2, size_t n, size_t s1size);
TLI_DEFINE_ENUM_INTERNAL(strncat_chk)
TLI_DEFINE_STRING_INTERNAL("__strncat_chk")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, SizeT, SizeT)
/// char *__strncpy_chk(char *s1, const char *s2, size_t n, size_t s1size);
TLI_DEFINE_ENUM_INTERNAL(strncpy_chk)
TLI_DEFINE_STRING_INTERNAL("__strncpy_chk")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, SizeT, SizeT)
/// char *__strndup(const char *s, size_t n);
TLI_DEFINE_ENUM_INTERNAL(dunder_strndup)
TLI_DEFINE_STRING_INTERNAL("__strndup")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, SizeT)
/// char * __strtok_r(char *s, const char *delim, char **save_ptr);
TLI_DEFINE_ENUM_INTERNAL(dunder_strtok_r)
TLI_DEFINE_STRING_INTERNAL("__strtok_r")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, Ptr)
/// int __vsnprintf_chk(char *s, size_t n, int flags, size_t slen,
/// const char *format, va_list ap);
TLI_DEFINE_ENUM_INTERNAL(vsnprintf_chk)
TLI_DEFINE_STRING_INTERNAL("__vsnprintf_chk")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, SizeT, Int, SizeT, Ptr, Ptr)
/// int __vsprintf_chk(char *s, int flags, size_t slen, const char *format,
/// va_list ap);
TLI_DEFINE_ENUM_INTERNAL(vsprintf_chk)
TLI_DEFINE_STRING_INTERNAL("__vsprintf_chk")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Int, SizeT, Ptr, Ptr)
/// int abs(int j);
TLI_DEFINE_ENUM_INTERNAL(abs)
TLI_DEFINE_STRING_INTERNAL("abs")
TLI_DEFINE_SIG_INTERNAL(Int, Int)
/// int access(const char *path, int amode);
TLI_DEFINE_ENUM_INTERNAL(access)
TLI_DEFINE_STRING_INTERNAL("access")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Int)
/// double acos(double x);
TLI_DEFINE_ENUM_INTERNAL(acos)
TLI_DEFINE_STRING_INTERNAL("acos")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float acosf(float x);
TLI_DEFINE_ENUM_INTERNAL(acosf)
TLI_DEFINE_STRING_INTERNAL("acosf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// double acosh(double x);
TLI_DEFINE_ENUM_INTERNAL(acosh)
TLI_DEFINE_STRING_INTERNAL("acosh")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float acoshf(float x);
TLI_DEFINE_ENUM_INTERNAL(acoshf)
TLI_DEFINE_STRING_INTERNAL("acoshf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double acoshl(long double x);
TLI_DEFINE_ENUM_INTERNAL(acoshl)
TLI_DEFINE_STRING_INTERNAL("acoshl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// long double acosl(long double x);
TLI_DEFINE_ENUM_INTERNAL(acosl)
TLI_DEFINE_STRING_INTERNAL("acosl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// void *aligned_alloc(size_t alignment, size_t size);
TLI_DEFINE_ENUM_INTERNAL(aligned_alloc)
TLI_DEFINE_STRING_INTERNAL("aligned_alloc")
TLI_DEFINE_SIG_INTERNAL(Ptr, SizeT, SizeT)
/// double asin(double x);
TLI_DEFINE_ENUM_INTERNAL(asin)
TLI_DEFINE_STRING_INTERNAL("asin")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float asinf(float x);
TLI_DEFINE_ENUM_INTERNAL(asinf)
TLI_DEFINE_STRING_INTERNAL("asinf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// double asinh(double x);
TLI_DEFINE_ENUM_INTERNAL(asinh)
TLI_DEFINE_STRING_INTERNAL("asinh")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float asinhf(float x);
TLI_DEFINE_ENUM_INTERNAL(asinhf)
TLI_DEFINE_STRING_INTERNAL("asinhf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double asinhl(long double x);
TLI_DEFINE_ENUM_INTERNAL(asinhl)
TLI_DEFINE_STRING_INTERNAL("asinhl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// long double asinl(long double x);
TLI_DEFINE_ENUM_INTERNAL(asinl)
TLI_DEFINE_STRING_INTERNAL("asinl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// double atan(double x);
TLI_DEFINE_ENUM_INTERNAL(atan)
TLI_DEFINE_STRING_INTERNAL("atan")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// double atan2(double y, double x);
TLI_DEFINE_ENUM_INTERNAL(atan2)
TLI_DEFINE_STRING_INTERNAL("atan2")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl, Dbl)
/// float atan2f(float y, float x);
TLI_DEFINE_ENUM_INTERNAL(atan2f)
TLI_DEFINE_STRING_INTERNAL("atan2f")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt, Flt)
/// long double atan2l(long double y, long double x);
TLI_DEFINE_ENUM_INTERNAL(atan2l)
TLI_DEFINE_STRING_INTERNAL("atan2l")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl, LDbl)
/// float atanf(float x);
TLI_DEFINE_ENUM_INTERNAL(atanf)
TLI_DEFINE_STRING_INTERNAL("atanf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// double atanh(double x);
TLI_DEFINE_ENUM_INTERNAL(atanh)
TLI_DEFINE_STRING_INTERNAL("atanh")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float atanhf(float x);
TLI_DEFINE_ENUM_INTERNAL(atanhf)
TLI_DEFINE_STRING_INTERNAL("atanhf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double atanhl(long double x);
TLI_DEFINE_ENUM_INTERNAL(atanhl)
TLI_DEFINE_STRING_INTERNAL("atanhl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// long double atanl(long double x);
TLI_DEFINE_ENUM_INTERNAL(atanl)
TLI_DEFINE_STRING_INTERNAL("atanl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// double atof(const char *str);
TLI_DEFINE_ENUM_INTERNAL(atof)
TLI_DEFINE_STRING_INTERNAL("atof")
TLI_DEFINE_SIG_INTERNAL(Dbl, Ptr)
/// int atoi(const char *str);
TLI_DEFINE_ENUM_INTERNAL(atoi)
TLI_DEFINE_STRING_INTERNAL("atoi")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// long atol(const char *str);
TLI_DEFINE_ENUM_INTERNAL(atol)
TLI_DEFINE_STRING_INTERNAL("atol")
TLI_DEFINE_SIG_INTERNAL(Long, Ptr)
/// long long atoll(const char *nptr);
TLI_DEFINE_ENUM_INTERNAL(atoll)
TLI_DEFINE_STRING_INTERNAL("atoll")
TLI_DEFINE_SIG_INTERNAL(LLong, Ptr)
/// int bcmp(const void *s1, const void *s2, size_t n);
TLI_DEFINE_ENUM_INTERNAL(bcmp)
TLI_DEFINE_STRING_INTERNAL("bcmp")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, SizeT)
/// void bcopy(const void *s1, void *s2, size_t n);
TLI_DEFINE_ENUM_INTERNAL(bcopy)
TLI_DEFINE_STRING_INTERNAL("bcopy")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Ptr, SizeT)
/// void bzero(void *s, size_t n);
TLI_DEFINE_ENUM_INTERNAL(bzero)
TLI_DEFINE_STRING_INTERNAL("bzero")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, SizeT)
/// double cabs(double complex z)
TLI_DEFINE_ENUM_INTERNAL(cabs)
TLI_DEFINE_STRING_INTERNAL("cabs")
TLI_DEFINE_SIG_INTERNAL(/* Checked manually. */)
/// float cabs(float complex z)
TLI_DEFINE_ENUM_INTERNAL(cabsf)
TLI_DEFINE_STRING_INTERNAL("cabsf")
TLI_DEFINE_SIG_INTERNAL(/* Checked manually. */)
/// long double cabs(long double complex z)
TLI_DEFINE_ENUM_INTERNAL(cabsl)
TLI_DEFINE_STRING_INTERNAL("cabsl")
TLI_DEFINE_SIG_INTERNAL(/* Checked manually. */)
/// void *calloc(size_t count, size_t size);
TLI_DEFINE_ENUM_INTERNAL(calloc)
TLI_DEFINE_STRING_INTERNAL("calloc")
TLI_DEFINE_SIG_INTERNAL(Ptr, SizeT, SizeT)
/// double cbrt(double x);
TLI_DEFINE_ENUM_INTERNAL(cbrt)
TLI_DEFINE_STRING_INTERNAL("cbrt")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float cbrtf(float x);
TLI_DEFINE_ENUM_INTERNAL(cbrtf)
TLI_DEFINE_STRING_INTERNAL("cbrtf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double cbrtl(long double x);
TLI_DEFINE_ENUM_INTERNAL(cbrtl)
TLI_DEFINE_STRING_INTERNAL("cbrtl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// double ceil(double x);
TLI_DEFINE_ENUM_INTERNAL(ceil)
TLI_DEFINE_STRING_INTERNAL("ceil")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float ceilf(float x);
TLI_DEFINE_ENUM_INTERNAL(ceilf)
TLI_DEFINE_STRING_INTERNAL("ceilf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double ceill(long double x);
TLI_DEFINE_ENUM_INTERNAL(ceill)
TLI_DEFINE_STRING_INTERNAL("ceill")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// int chmod(const char *path, mode_t mode);
TLI_DEFINE_ENUM_INTERNAL(chmod)
TLI_DEFINE_STRING_INTERNAL("chmod")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, IntX)
/// int chown(const char *path, uid_t owner, gid_t group);
TLI_DEFINE_ENUM_INTERNAL(chown)
TLI_DEFINE_STRING_INTERNAL("chown")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, IntX, IntX)
/// void clearerr(FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(clearerr)
TLI_DEFINE_STRING_INTERNAL("clearerr")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr)
/// int closedir(DIR *dirp);
TLI_DEFINE_ENUM_INTERNAL(closedir)
TLI_DEFINE_STRING_INTERNAL("closedir")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// double copysign(double x, double y);
TLI_DEFINE_ENUM_INTERNAL(copysign)
TLI_DEFINE_STRING_INTERNAL("copysign")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl, Dbl)
/// float copysignf(float x, float y);
TLI_DEFINE_ENUM_INTERNAL(copysignf)
TLI_DEFINE_STRING_INTERNAL("copysignf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt, Flt)
/// long double copysignl(long double x, long double y);
TLI_DEFINE_ENUM_INTERNAL(copysignl)
TLI_DEFINE_STRING_INTERNAL("copysignl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl, LDbl)
/// double cos(double x);
TLI_DEFINE_ENUM_INTERNAL(cos)
TLI_DEFINE_STRING_INTERNAL("cos")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float cosf(float x);
TLI_DEFINE_ENUM_INTERNAL(cosf)
TLI_DEFINE_STRING_INTERNAL("cosf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// double cosh(double x);
TLI_DEFINE_ENUM_INTERNAL(cosh)
TLI_DEFINE_STRING_INTERNAL("cosh")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float coshf(float x);
TLI_DEFINE_ENUM_INTERNAL(coshf)
TLI_DEFINE_STRING_INTERNAL("coshf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double coshl(long double x);
TLI_DEFINE_ENUM_INTERNAL(coshl)
TLI_DEFINE_STRING_INTERNAL("coshl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// long double cosl(long double x);
TLI_DEFINE_ENUM_INTERNAL(cosl)
TLI_DEFINE_STRING_INTERNAL("cosl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// char *ctermid(char *s);
TLI_DEFINE_ENUM_INTERNAL(ctermid)
TLI_DEFINE_STRING_INTERNAL("ctermid")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr)
/// int execl(const char *path, const char *arg, ...);
TLI_DEFINE_ENUM_INTERNAL(execl)
TLI_DEFINE_STRING_INTERNAL("execl")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ellip)
/// int execle(const char *file, const char *arg, ..., char * const envp[]);
TLI_DEFINE_ENUM_INTERNAL(execle)
TLI_DEFINE_STRING_INTERNAL("execle")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ellip)
/// int execlp(const char *file, const char *arg, ...);
TLI_DEFINE_ENUM_INTERNAL(execlp)
TLI_DEFINE_STRING_INTERNAL("execlp")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ellip)
/// int execv(const char *path, char *const argv[]);
TLI_DEFINE_ENUM_INTERNAL(execv)
TLI_DEFINE_STRING_INTERNAL("execv")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// int execvP(const char *file, const char *search_path, char *const argv[]);
TLI_DEFINE_ENUM_INTERNAL(execvP)
TLI_DEFINE_STRING_INTERNAL("execvP")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ptr)
/// int execve(const char *filename, char *const argv[], char *const envp[]);
TLI_DEFINE_ENUM_INTERNAL(execve)
TLI_DEFINE_STRING_INTERNAL("execve")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ptr)
/// int execvp(const char *file, char *const argv[]);
TLI_DEFINE_ENUM_INTERNAL(execvp)
TLI_DEFINE_STRING_INTERNAL("execvp")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// int execvpe(const char *file, char *const argv[], char *const envp[]);
TLI_DEFINE_ENUM_INTERNAL(execvpe)
TLI_DEFINE_STRING_INTERNAL("execvpe")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ptr)
/// double exp(double x);
TLI_DEFINE_ENUM_INTERNAL(exp)
TLI_DEFINE_STRING_INTERNAL("exp")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// double exp10(double x);
TLI_DEFINE_ENUM_INTERNAL(exp10)
TLI_DEFINE_STRING_INTERNAL("exp10")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float exp10f(float x);
TLI_DEFINE_ENUM_INTERNAL(exp10f)
TLI_DEFINE_STRING_INTERNAL("exp10f")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double exp10l(long double x);
TLI_DEFINE_ENUM_INTERNAL(exp10l)
TLI_DEFINE_STRING_INTERNAL("exp10l")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// double exp2(double x);
TLI_DEFINE_ENUM_INTERNAL(exp2)
TLI_DEFINE_STRING_INTERNAL("exp2")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float exp2f(float x);
TLI_DEFINE_ENUM_INTERNAL(exp2f)
TLI_DEFINE_STRING_INTERNAL("exp2f")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double exp2l(long double x);
TLI_DEFINE_ENUM_INTERNAL(exp2l)
TLI_DEFINE_STRING_INTERNAL("exp2l")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// float expf(float x);
TLI_DEFINE_ENUM_INTERNAL(expf)
TLI_DEFINE_STRING_INTERNAL("expf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double expl(long double x);
TLI_DEFINE_ENUM_INTERNAL(expl)
TLI_DEFINE_STRING_INTERNAL("expl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// double expm1(double x);
TLI_DEFINE_ENUM_INTERNAL(expm1)
TLI_DEFINE_STRING_INTERNAL("expm1")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float expm1f(float x);
TLI_DEFINE_ENUM_INTERNAL(expm1f)
TLI_DEFINE_STRING_INTERNAL("expm1f")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double expm1l(long double x);
TLI_DEFINE_ENUM_INTERNAL(expm1l)
TLI_DEFINE_STRING_INTERNAL("expm1l")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// double fabs(double x);
TLI_DEFINE_ENUM_INTERNAL(fabs)
TLI_DEFINE_STRING_INTERNAL("fabs")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float fabsf(float x);
TLI_DEFINE_ENUM_INTERNAL(fabsf)
TLI_DEFINE_STRING_INTERNAL("fabsf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double fabsl(long double x);
TLI_DEFINE_ENUM_INTERNAL(fabsl)
TLI_DEFINE_STRING_INTERNAL("fabsl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// int fclose(FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(fclose)
TLI_DEFINE_STRING_INTERNAL("fclose")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// FILE *fdopen(int fildes, const char *mode);
TLI_DEFINE_ENUM_INTERNAL(fdopen)
TLI_DEFINE_STRING_INTERNAL("fdopen")
TLI_DEFINE_SIG_INTERNAL(Ptr, Int, Ptr)
/// int feof(FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(feof)
TLI_DEFINE_STRING_INTERNAL("feof")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// int ferror(FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(ferror)
TLI_DEFINE_STRING_INTERNAL("ferror")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// int fflush(FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(fflush)
TLI_DEFINE_STRING_INTERNAL("fflush")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// int ffs(int i);
TLI_DEFINE_ENUM_INTERNAL(ffs)
TLI_DEFINE_STRING_INTERNAL("ffs")
TLI_DEFINE_SIG_INTERNAL(Int, Int)
/// int ffsl(long int i);
TLI_DEFINE_ENUM_INTERNAL(ffsl)
TLI_DEFINE_STRING_INTERNAL("ffsl")
TLI_DEFINE_SIG_INTERNAL(Int, Long)
/// int ffsll(long long int i);
TLI_DEFINE_ENUM_INTERNAL(ffsll)
TLI_DEFINE_STRING_INTERNAL("ffsll")
TLI_DEFINE_SIG_INTERNAL(Int, LLong)
/// int fgetc(FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(fgetc)
TLI_DEFINE_STRING_INTERNAL("fgetc")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// int fgetc_unlocked(FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(fgetc_unlocked)
TLI_DEFINE_STRING_INTERNAL("fgetc_unlocked")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// int fgetpos(FILE *stream, fpos_t *pos);
TLI_DEFINE_ENUM_INTERNAL(fgetpos)
TLI_DEFINE_STRING_INTERNAL("fgetpos")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// char *fgets(char *s, int n, FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(fgets)
TLI_DEFINE_STRING_INTERNAL("fgets")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Int, Ptr)
/// char *fgets_unlocked(char *s, int n, FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(fgets_unlocked)
TLI_DEFINE_STRING_INTERNAL("fgets_unlocked")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Int, Ptr)
/// int fileno(FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(fileno)
TLI_DEFINE_STRING_INTERNAL("fileno")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// int fiprintf(FILE *stream, const char *format, ...);
TLI_DEFINE_ENUM_INTERNAL(fiprintf)
TLI_DEFINE_STRING_INTERNAL("fiprintf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ellip)
/// void flockfile(FILE *file);
TLI_DEFINE_ENUM_INTERNAL(flockfile)
TLI_DEFINE_STRING_INTERNAL("flockfile")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr)
/// double floor(double x);
TLI_DEFINE_ENUM_INTERNAL(floor)
TLI_DEFINE_STRING_INTERNAL("floor")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float floorf(float x);
TLI_DEFINE_ENUM_INTERNAL(floorf)
TLI_DEFINE_STRING_INTERNAL("floorf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double floorl(long double x);
TLI_DEFINE_ENUM_INTERNAL(floorl)
TLI_DEFINE_STRING_INTERNAL("floorl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// int fls(int i);
TLI_DEFINE_ENUM_INTERNAL(fls)
TLI_DEFINE_STRING_INTERNAL("fls")
TLI_DEFINE_SIG_INTERNAL(Int, Int)
/// int flsl(long int i);
TLI_DEFINE_ENUM_INTERNAL(flsl)
TLI_DEFINE_STRING_INTERNAL("flsl")
TLI_DEFINE_SIG_INTERNAL(Int, Long)
/// int flsll(long long int i);
TLI_DEFINE_ENUM_INTERNAL(flsll)
TLI_DEFINE_STRING_INTERNAL("flsll")
TLI_DEFINE_SIG_INTERNAL(Int, LLong)
// Calls to fmax and fmin library functions expand to the llvm.maxnnum and
// llvm.minnum intrinsics with the correct parameter types for the arguments
// (all types must match).
/// double fmax(double x, double y);
TLI_DEFINE_ENUM_INTERNAL(fmax)
TLI_DEFINE_STRING_INTERNAL("fmax")
TLI_DEFINE_SIG_INTERNAL(Floating, Same, Same)
/// float fmaxf(float x, float y);
TLI_DEFINE_ENUM_INTERNAL(fmaxf)
TLI_DEFINE_STRING_INTERNAL("fmaxf")
TLI_DEFINE_SIG_INTERNAL(Floating, Same, Same)
/// long double fmaxl(long double x, long double y);
TLI_DEFINE_ENUM_INTERNAL(fmaxl)
TLI_DEFINE_STRING_INTERNAL("fmaxl")
TLI_DEFINE_SIG_INTERNAL(Floating, Same, Same)
/// double fmin(double x, double y);
TLI_DEFINE_ENUM_INTERNAL(fmin)
TLI_DEFINE_STRING_INTERNAL("fmin")
TLI_DEFINE_SIG_INTERNAL(Floating, Same, Same)
/// float fminf(float x, float y);
TLI_DEFINE_ENUM_INTERNAL(fminf)
TLI_DEFINE_STRING_INTERNAL("fminf")
TLI_DEFINE_SIG_INTERNAL(Floating, Same, Same)
/// long double fminl(long double x, long double y);
TLI_DEFINE_ENUM_INTERNAL(fminl)
TLI_DEFINE_STRING_INTERNAL("fminl")
TLI_DEFINE_SIG_INTERNAL(Floating, Same, Same)
/// double fmod(double x, double y);
TLI_DEFINE_ENUM_INTERNAL(fmod)
TLI_DEFINE_STRING_INTERNAL("fmod")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl, Dbl)
/// float fmodf(float x, float y);
TLI_DEFINE_ENUM_INTERNAL(fmodf)
TLI_DEFINE_STRING_INTERNAL("fmodf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt, Flt)
/// long double fmodl(long double x, long double y);
TLI_DEFINE_ENUM_INTERNAL(fmodl)
TLI_DEFINE_STRING_INTERNAL("fmodl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl, LDbl)
/// FILE *fopen(const char *filename, const char *mode);
TLI_DEFINE_ENUM_INTERNAL(fopen)
TLI_DEFINE_STRING_INTERNAL("fopen")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr)
/// FILE *fopen64(const char *filename, const char *opentype)
TLI_DEFINE_ENUM_INTERNAL(fopen64)
TLI_DEFINE_STRING_INTERNAL("fopen64")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr)
/// int fork();
TLI_DEFINE_ENUM_INTERNAL(fork)
TLI_DEFINE_STRING_INTERNAL("fork")
TLI_DEFINE_SIG_INTERNAL(Int)
/// int fprintf(FILE *stream, const char *format, ...);
TLI_DEFINE_ENUM_INTERNAL(fprintf)
TLI_DEFINE_STRING_INTERNAL("fprintf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ellip)
/// int fputc(int c, FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(fputc)
TLI_DEFINE_STRING_INTERNAL("fputc")
TLI_DEFINE_SIG_INTERNAL(Int, Int, Ptr)
/// int fputc_unlocked(int c, FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(fputc_unlocked)
TLI_DEFINE_STRING_INTERNAL("fputc_unlocked")
TLI_DEFINE_SIG_INTERNAL(Int, Int, Ptr)
/// int fputs(const char *s, FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(fputs)
TLI_DEFINE_STRING_INTERNAL("fputs")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// int fputs_unlocked(const char *s, FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(fputs_unlocked)
TLI_DEFINE_STRING_INTERNAL("fputs_unlocked")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// size_t fread(void *ptr, size_t size, size_t nitems, FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(fread)
TLI_DEFINE_STRING_INTERNAL("fread")
TLI_DEFINE_SIG_INTERNAL(SizeT, Ptr, SizeT, SizeT, Ptr)
/// size_t fread_unlocked(void *ptr, size_t size, size_t nitems, FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(fread_unlocked)
TLI_DEFINE_STRING_INTERNAL("fread_unlocked")
TLI_DEFINE_SIG_INTERNAL(SizeT, Ptr, SizeT, SizeT, Ptr)
/// void free(void *ptr);
TLI_DEFINE_ENUM_INTERNAL(free)
TLI_DEFINE_STRING_INTERNAL("free")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr)
/// double frexp(double num, int *exp);
TLI_DEFINE_ENUM_INTERNAL(frexp)
TLI_DEFINE_STRING_INTERNAL("frexp")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl, Ptr)
/// float frexpf(float num, int *exp);
TLI_DEFINE_ENUM_INTERNAL(frexpf)
TLI_DEFINE_STRING_INTERNAL("frexpf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt, Ptr)
/// long double frexpl(long double num, int *exp);
TLI_DEFINE_ENUM_INTERNAL(frexpl)
TLI_DEFINE_STRING_INTERNAL("frexpl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl, Ptr)
/// int fscanf(FILE *stream, const char *format, ... );
TLI_DEFINE_ENUM_INTERNAL(fscanf)
TLI_DEFINE_STRING_INTERNAL("fscanf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ellip)
/// int fseek(FILE *stream, long offset, int whence);
TLI_DEFINE_ENUM_INTERNAL(fseek)
TLI_DEFINE_STRING_INTERNAL("fseek")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Long, Int)
/// int fseeko(FILE *stream, off_t offset, int whence);
TLI_DEFINE_ENUM_INTERNAL(fseeko)
TLI_DEFINE_STRING_INTERNAL("fseeko")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, IntX, Int)
/// int fseeko64(FILE *stream, off64_t offset, int whence)
TLI_DEFINE_ENUM_INTERNAL(fseeko64)
TLI_DEFINE_STRING_INTERNAL("fseeko64")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Int64, Int)
/// int fsetpos(FILE *stream, const fpos_t *pos);
TLI_DEFINE_ENUM_INTERNAL(fsetpos)
TLI_DEFINE_STRING_INTERNAL("fsetpos")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// int fstat(int fildes, struct stat *buf);
TLI_DEFINE_ENUM_INTERNAL(fstat)
TLI_DEFINE_STRING_INTERNAL("fstat")
TLI_DEFINE_SIG_INTERNAL(Int, Int, Ptr)
/// int fstat64(int filedes, struct stat64 *buf)
TLI_DEFINE_ENUM_INTERNAL(fstat64)
TLI_DEFINE_STRING_INTERNAL("fstat64")
TLI_DEFINE_SIG_INTERNAL(Int, Int, Ptr)
/// int fstatvfs(int fildes, struct statvfs *buf);
TLI_DEFINE_ENUM_INTERNAL(fstatvfs)
TLI_DEFINE_STRING_INTERNAL("fstatvfs")
TLI_DEFINE_SIG_INTERNAL(Int, Int, Ptr)
/// int fstatvfs64(int fildes, struct statvfs64 *buf);
TLI_DEFINE_ENUM_INTERNAL(fstatvfs64)
TLI_DEFINE_STRING_INTERNAL("fstatvfs64")
TLI_DEFINE_SIG_INTERNAL(Int, Int, Ptr)
/// long ftell(FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(ftell)
TLI_DEFINE_STRING_INTERNAL("ftell")
TLI_DEFINE_SIG_INTERNAL(Long, Ptr)
/// off_t ftello(FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(ftello)
TLI_DEFINE_STRING_INTERNAL("ftello")
TLI_DEFINE_SIG_INTERNAL(IntPlus, Ptr)
/// off64_t ftello64(FILE *stream)
TLI_DEFINE_ENUM_INTERNAL(ftello64)
TLI_DEFINE_STRING_INTERNAL("ftello64")
TLI_DEFINE_SIG_INTERNAL(Int64, Ptr)
/// int ftrylockfile(FILE *file);
TLI_DEFINE_ENUM_INTERNAL(ftrylockfile)
TLI_DEFINE_STRING_INTERNAL("ftrylockfile")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// void funlockfile(FILE *file);
TLI_DEFINE_ENUM_INTERNAL(funlockfile)
TLI_DEFINE_STRING_INTERNAL("funlockfile")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr)
/// size_t fwrite(const void *ptr, size_t size, size_t nitems, FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(fwrite)
TLI_DEFINE_STRING_INTERNAL("fwrite")
TLI_DEFINE_SIG_INTERNAL(SizeT, Ptr, SizeT, SizeT, Ptr)
/// size_t fwrite_unlocked(const void *ptr, size_t size, size_t nitems, FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(fwrite_unlocked)
TLI_DEFINE_STRING_INTERNAL("fwrite_unlocked")
TLI_DEFINE_SIG_INTERNAL(SizeT, Ptr, SizeT, SizeT, Ptr)
/// int getc(FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(getc)
TLI_DEFINE_STRING_INTERNAL("getc")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// int getc_unlocked(FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(getc_unlocked)
TLI_DEFINE_STRING_INTERNAL("getc_unlocked")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// int getchar(void);
TLI_DEFINE_ENUM_INTERNAL(getchar)
TLI_DEFINE_STRING_INTERNAL("getchar")
TLI_DEFINE_SIG_INTERNAL(Int)
/// int getchar_unlocked(void);
TLI_DEFINE_ENUM_INTERNAL(getchar_unlocked)
TLI_DEFINE_STRING_INTERNAL("getchar_unlocked")
TLI_DEFINE_SIG_INTERNAL(Int)
/// char *getenv(const char *name);
TLI_DEFINE_ENUM_INTERNAL(getenv)
TLI_DEFINE_STRING_INTERNAL("getenv")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr)
/// int getitimer(int which, struct itimerval *value);
TLI_DEFINE_ENUM_INTERNAL(getitimer)
TLI_DEFINE_STRING_INTERNAL("getitimer")
TLI_DEFINE_SIG_INTERNAL(Int, Int, Ptr)
/// int getlogin_r(char *name, size_t namesize);
TLI_DEFINE_ENUM_INTERNAL(getlogin_r)
TLI_DEFINE_STRING_INTERNAL("getlogin_r")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, SizeT)
/// struct passwd *getpwnam(const char *name);
TLI_DEFINE_ENUM_INTERNAL(getpwnam)
TLI_DEFINE_STRING_INTERNAL("getpwnam")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr)
/// char *gets(char *s);
TLI_DEFINE_ENUM_INTERNAL(gets)
TLI_DEFINE_STRING_INTERNAL("gets")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr)
/// int gettimeofday(struct timeval *tp, void *tzp);
TLI_DEFINE_ENUM_INTERNAL(gettimeofday)
TLI_DEFINE_STRING_INTERNAL("gettimeofday")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// uint32_t htonl(uint32_t hostlong);
TLI_DEFINE_ENUM_INTERNAL(htonl)
TLI_DEFINE_STRING_INTERNAL("htonl")
TLI_DEFINE_SIG_INTERNAL(Int32, Int32)
/// uint16_t htons(uint16_t hostshort);
TLI_DEFINE_ENUM_INTERNAL(htons)
TLI_DEFINE_STRING_INTERNAL("htons")
TLI_DEFINE_SIG_INTERNAL(Int16, Int16)
/// int iprintf(const char *format, ...);
TLI_DEFINE_ENUM_INTERNAL(iprintf)
TLI_DEFINE_STRING_INTERNAL("iprintf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ellip)
/// int isascii(int c);
TLI_DEFINE_ENUM_INTERNAL(isascii)
TLI_DEFINE_STRING_INTERNAL("isascii")
TLI_DEFINE_SIG_INTERNAL(Int, Int)
/// int isdigit(int c);
TLI_DEFINE_ENUM_INTERNAL(isdigit)
TLI_DEFINE_STRING_INTERNAL("isdigit")
TLI_DEFINE_SIG_INTERNAL(Int, Int)
/// long int labs(long int j);
TLI_DEFINE_ENUM_INTERNAL(labs)
TLI_DEFINE_STRING_INTERNAL("labs")
TLI_DEFINE_SIG_INTERNAL(Long, Long)
/// int lchown(const char *path, uid_t owner, gid_t group);
TLI_DEFINE_ENUM_INTERNAL(lchown)
TLI_DEFINE_STRING_INTERNAL("lchown")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, IntX, IntX)
/// double ldexp(double x, int n);
TLI_DEFINE_ENUM_INTERNAL(ldexp)
TLI_DEFINE_STRING_INTERNAL("ldexp")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl, Int)
/// float ldexpf(float x, int n);
TLI_DEFINE_ENUM_INTERNAL(ldexpf)
TLI_DEFINE_STRING_INTERNAL("ldexpf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt, Int)
/// long double ldexpl(long double x, int n);
TLI_DEFINE_ENUM_INTERNAL(ldexpl)
TLI_DEFINE_STRING_INTERNAL("ldexpl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl, Int)
/// long long int llabs(long long int j);
TLI_DEFINE_ENUM_INTERNAL(llabs)
TLI_DEFINE_STRING_INTERNAL("llabs")
TLI_DEFINE_SIG_INTERNAL(LLong, LLong)
/// double log(double x);
TLI_DEFINE_ENUM_INTERNAL(log)
TLI_DEFINE_STRING_INTERNAL("log")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// double log10(double x);
TLI_DEFINE_ENUM_INTERNAL(log10)
TLI_DEFINE_STRING_INTERNAL("log10")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float log10f(float x);
TLI_DEFINE_ENUM_INTERNAL(log10f)
TLI_DEFINE_STRING_INTERNAL("log10f")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double log10l(long double x);
TLI_DEFINE_ENUM_INTERNAL(log10l)
TLI_DEFINE_STRING_INTERNAL("log10l")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// double log1p(double x);
TLI_DEFINE_ENUM_INTERNAL(log1p)
TLI_DEFINE_STRING_INTERNAL("log1p")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float log1pf(float x);
TLI_DEFINE_ENUM_INTERNAL(log1pf)
TLI_DEFINE_STRING_INTERNAL("log1pf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double log1pl(long double x);
TLI_DEFINE_ENUM_INTERNAL(log1pl)
TLI_DEFINE_STRING_INTERNAL("log1pl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// double log2(double x);
TLI_DEFINE_ENUM_INTERNAL(log2)
TLI_DEFINE_STRING_INTERNAL("log2")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float log2f(float x);
TLI_DEFINE_ENUM_INTERNAL(log2f)
TLI_DEFINE_STRING_INTERNAL("log2f")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// double long double log2l(long double x);
TLI_DEFINE_ENUM_INTERNAL(log2l)
TLI_DEFINE_STRING_INTERNAL("log2l")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// double logb(double x);
TLI_DEFINE_ENUM_INTERNAL(logb)
TLI_DEFINE_STRING_INTERNAL("logb")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float logbf(float x);
TLI_DEFINE_ENUM_INTERNAL(logbf)
TLI_DEFINE_STRING_INTERNAL("logbf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double logbl(long double x);
TLI_DEFINE_ENUM_INTERNAL(logbl)
TLI_DEFINE_STRING_INTERNAL("logbl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// float logf(float x);
TLI_DEFINE_ENUM_INTERNAL(logf)
TLI_DEFINE_STRING_INTERNAL("logf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double logl(long double x);
TLI_DEFINE_ENUM_INTERNAL(logl)
TLI_DEFINE_STRING_INTERNAL("logl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// int lstat(const char *path, struct stat *buf);
TLI_DEFINE_ENUM_INTERNAL(lstat)
TLI_DEFINE_STRING_INTERNAL("lstat")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// int lstat64(const char *path, struct stat64 *buf);
TLI_DEFINE_ENUM_INTERNAL(lstat64)
TLI_DEFINE_STRING_INTERNAL("lstat64")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// void *malloc(size_t size);
TLI_DEFINE_ENUM_INTERNAL(malloc)
TLI_DEFINE_STRING_INTERNAL("malloc")
TLI_DEFINE_SIG_INTERNAL(Ptr, SizeT)
/// void *memalign(size_t boundary, size_t size);
TLI_DEFINE_ENUM_INTERNAL(memalign)
TLI_DEFINE_STRING_INTERNAL("memalign")
TLI_DEFINE_SIG_INTERNAL(Ptr, SizeT, SizeT)
/// void *memccpy(void *s1, const void *s2, int c, size_t n);
TLI_DEFINE_ENUM_INTERNAL(memccpy)
TLI_DEFINE_STRING_INTERNAL("memccpy")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, Int, SizeT)
/// void *memchr(const void *s, int c, size_t n);
TLI_DEFINE_ENUM_INTERNAL(memchr)
TLI_DEFINE_STRING_INTERNAL("memchr")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Int, SizeT)
/// int memcmp(const void *s1, const void *s2, size_t n);
TLI_DEFINE_ENUM_INTERNAL(memcmp)
TLI_DEFINE_STRING_INTERNAL("memcmp")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, SizeT)
/// void *memcpy(void *s1, const void *s2, size_t n);
TLI_DEFINE_ENUM_INTERNAL(memcpy)
TLI_DEFINE_STRING_INTERNAL("memcpy")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, SizeT)
/// void *memmove(void *s1, const void *s2, size_t n);
TLI_DEFINE_ENUM_INTERNAL(memmove)
TLI_DEFINE_STRING_INTERNAL("memmove")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, SizeT)
/// void *mempcpy(void *s1, const void *s2, size_t n);
TLI_DEFINE_ENUM_INTERNAL(mempcpy)
TLI_DEFINE_STRING_INTERNAL("mempcpy")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, SizeT)
/// void *memrchr(const void *s, int c, size_t n);
TLI_DEFINE_ENUM_INTERNAL(memrchr)
TLI_DEFINE_STRING_INTERNAL("memrchr")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Int, SizeT)
/// void *memset(void *b, int c, size_t len);
TLI_DEFINE_ENUM_INTERNAL(memset)
TLI_DEFINE_STRING_INTERNAL("memset")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Int, SizeT)
/// void memset_pattern16(void *b, const void *pattern16, size_t len);
TLI_DEFINE_ENUM_INTERNAL(memset_pattern16)
TLI_DEFINE_STRING_INTERNAL("memset_pattern16")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Ptr, SizeT)
/// void memset_pattern4(void *b, const void *pattern4, size_t len);
TLI_DEFINE_ENUM_INTERNAL(memset_pattern4)
TLI_DEFINE_STRING_INTERNAL("memset_pattern4")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Ptr, SizeT)
/// void memset_pattern8(void *b, const void *pattern8, size_t len);
TLI_DEFINE_ENUM_INTERNAL(memset_pattern8)
TLI_DEFINE_STRING_INTERNAL("memset_pattern8")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Ptr, SizeT)
/// int mkdir(const char *path, mode_t mode);
TLI_DEFINE_ENUM_INTERNAL(mkdir)
TLI_DEFINE_STRING_INTERNAL("mkdir")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, IntX)
/// time_t mktime(struct tm *timeptr);
TLI_DEFINE_ENUM_INTERNAL(mktime)
TLI_DEFINE_STRING_INTERNAL("mktime")
TLI_DEFINE_SIG_INTERNAL(IntPlus, Ptr)
/// double modf(double x, double *iptr);
TLI_DEFINE_ENUM_INTERNAL(modf)
TLI_DEFINE_STRING_INTERNAL("modf")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl, Ptr)
/// float modff(float, float *iptr);
TLI_DEFINE_ENUM_INTERNAL(modff)
TLI_DEFINE_STRING_INTERNAL("modff")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt, Ptr)
/// long double modfl(long double value, long double *iptr);
TLI_DEFINE_ENUM_INTERNAL(modfl)
TLI_DEFINE_STRING_INTERNAL("modfl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl, Ptr)
/// double nearbyint(double x);
TLI_DEFINE_ENUM_INTERNAL(nearbyint)
TLI_DEFINE_STRING_INTERNAL("nearbyint")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float nearbyintf(float x);
TLI_DEFINE_ENUM_INTERNAL(nearbyintf)
TLI_DEFINE_STRING_INTERNAL("nearbyintf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double nearbyintl(long double x);
TLI_DEFINE_ENUM_INTERNAL(nearbyintl)
TLI_DEFINE_STRING_INTERNAL("nearbyintl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// uint32_t ntohl(uint32_t netlong);
TLI_DEFINE_ENUM_INTERNAL(ntohl)
TLI_DEFINE_STRING_INTERNAL("ntohl")
TLI_DEFINE_SIG_INTERNAL(Int32, Int32)
/// uint16_t ntohs(uint16_t netshort);
TLI_DEFINE_ENUM_INTERNAL(ntohs)
TLI_DEFINE_STRING_INTERNAL("ntohs")
TLI_DEFINE_SIG_INTERNAL(Int16, Int16)
/// int open(const char *path, int oflag, ... );
TLI_DEFINE_ENUM_INTERNAL(open)
TLI_DEFINE_STRING_INTERNAL("open")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Int, Ellip)
/// int open64(const char *filename, int flags[, mode_t mode])
TLI_DEFINE_ENUM_INTERNAL(open64)
TLI_DEFINE_STRING_INTERNAL("open64")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Int, Ellip)
/// DIR *opendir(const char *dirname);
TLI_DEFINE_ENUM_INTERNAL(opendir)
TLI_DEFINE_STRING_INTERNAL("opendir")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr)
/// int pclose(FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(pclose)
TLI_DEFINE_STRING_INTERNAL("pclose")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// void perror(const char *s);
TLI_DEFINE_ENUM_INTERNAL(perror)
TLI_DEFINE_STRING_INTERNAL("perror")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr)
/// FILE *popen(const char *command, const char *mode);
TLI_DEFINE_ENUM_INTERNAL(popen)
TLI_DEFINE_STRING_INTERNAL("popen")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr)
/// int posix_memalign(void **memptr, size_t alignment, size_t size);
TLI_DEFINE_ENUM_INTERNAL(posix_memalign)
TLI_DEFINE_STRING_INTERNAL("posix_memalign")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, SizeT, SizeT)
/// double pow(double x, double y);
TLI_DEFINE_ENUM_INTERNAL(pow)
TLI_DEFINE_STRING_INTERNAL("pow")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl, Dbl)
/// float powf(float x, float y);
TLI_DEFINE_ENUM_INTERNAL(powf)
TLI_DEFINE_STRING_INTERNAL("powf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt, Flt)
/// long double powl(long double x, long double y);
TLI_DEFINE_ENUM_INTERNAL(powl)
TLI_DEFINE_STRING_INTERNAL("powl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl, LDbl)
/// ssize_t pread(int fildes, void *buf, size_t nbyte, off_t offset);
TLI_DEFINE_ENUM_INTERNAL(pread)
TLI_DEFINE_STRING_INTERNAL("pread")
TLI_DEFINE_SIG_INTERNAL(SSizeT, Int, Ptr, SizeT, IntPlus)
/// int printf(const char *format, ...);
TLI_DEFINE_ENUM_INTERNAL(printf)
TLI_DEFINE_STRING_INTERNAL("printf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ellip)
/// int putc(int c, FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(putc)
TLI_DEFINE_STRING_INTERNAL("putc")
TLI_DEFINE_SIG_INTERNAL(Int, Int, Ptr)
/// int putc_unlocked(int c, FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(putc_unlocked)
TLI_DEFINE_STRING_INTERNAL("putc_unlocked")
TLI_DEFINE_SIG_INTERNAL(Int, Int, Ptr)
/// int putchar(int c);
TLI_DEFINE_ENUM_INTERNAL(putchar)
TLI_DEFINE_STRING_INTERNAL("putchar")
TLI_DEFINE_SIG_INTERNAL(Int, Int)
/// int putchar_unlocked(int c);
TLI_DEFINE_ENUM_INTERNAL(putchar_unlocked)
TLI_DEFINE_STRING_INTERNAL("putchar_unlocked")
TLI_DEFINE_SIG_INTERNAL(Int, Int)
/// int puts(const char *s);
TLI_DEFINE_ENUM_INTERNAL(puts)
TLI_DEFINE_STRING_INTERNAL("puts")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// ssize_t pwrite(int fildes, const void *buf, size_t nbyte, off_t offset);
TLI_DEFINE_ENUM_INTERNAL(pwrite)
TLI_DEFINE_STRING_INTERNAL("pwrite")
TLI_DEFINE_SIG_INTERNAL(SSizeT, Int, Ptr, SizeT, IntPlus)
/// void qsort(void *base, size_t nel, size_t width,
/// int (*compar)(const void *, const void *));
TLI_DEFINE_ENUM_INTERNAL(qsort)
TLI_DEFINE_STRING_INTERNAL("qsort")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, SizeT, SizeT, Ptr)
/// ssize_t read(int fildes, void *buf, size_t nbyte);
TLI_DEFINE_ENUM_INTERNAL(read)
TLI_DEFINE_STRING_INTERNAL("read")
TLI_DEFINE_SIG_INTERNAL(SSizeT, Int, Ptr, SizeT)
/// ssize_t readlink(const char *path, char *buf, size_t bufsize);
TLI_DEFINE_ENUM_INTERNAL(readlink)
TLI_DEFINE_STRING_INTERNAL("readlink")
TLI_DEFINE_SIG_INTERNAL(SSizeT, Ptr, Ptr, SizeT)
/// void *realloc(void *ptr, size_t size);
TLI_DEFINE_ENUM_INTERNAL(realloc)
TLI_DEFINE_STRING_INTERNAL("realloc")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, SizeT)
/// void *reallocf(void *ptr, size_t size);
TLI_DEFINE_ENUM_INTERNAL(reallocf)
TLI_DEFINE_STRING_INTERNAL("reallocf")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, SizeT)
/// char *realpath(const char *file_name, char *resolved_name);
TLI_DEFINE_ENUM_INTERNAL(realpath)
TLI_DEFINE_STRING_INTERNAL("realpath")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr)
/// double remainder(double x, double y);
TLI_DEFINE_ENUM_INTERNAL(remainder)
TLI_DEFINE_STRING_INTERNAL("remainder")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl, Dbl)
/// float remainderf(float x, float y);
TLI_DEFINE_ENUM_INTERNAL(remainderf)
TLI_DEFINE_STRING_INTERNAL("remainderf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt, Flt)
/// long double remainderl(long double x, long double y);
TLI_DEFINE_ENUM_INTERNAL(remainderl)
TLI_DEFINE_STRING_INTERNAL("remainderl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl, LDbl)
/// int remove(const char *path);
TLI_DEFINE_ENUM_INTERNAL(remove)
TLI_DEFINE_STRING_INTERNAL("remove")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// int rename(const char *old, const char *new);
TLI_DEFINE_ENUM_INTERNAL(rename)
TLI_DEFINE_STRING_INTERNAL("rename")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// void rewind(FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(rewind)
TLI_DEFINE_STRING_INTERNAL("rewind")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr)
/// double rint(double x);
TLI_DEFINE_ENUM_INTERNAL(rint)
TLI_DEFINE_STRING_INTERNAL("rint")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float rintf(float x);
TLI_DEFINE_ENUM_INTERNAL(rintf)
TLI_DEFINE_STRING_INTERNAL("rintf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double rintl(long double x);
TLI_DEFINE_ENUM_INTERNAL(rintl)
TLI_DEFINE_STRING_INTERNAL("rintl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// int rmdir(const char *path);
TLI_DEFINE_ENUM_INTERNAL(rmdir)
TLI_DEFINE_STRING_INTERNAL("rmdir")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// double round(double x);
TLI_DEFINE_ENUM_INTERNAL(round)
TLI_DEFINE_STRING_INTERNAL("round")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// double roundeven(double x);
TLI_DEFINE_ENUM_INTERNAL(roundeven)
TLI_DEFINE_STRING_INTERNAL("roundeven")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float roundevenf(float x);
TLI_DEFINE_ENUM_INTERNAL(roundevenf)
TLI_DEFINE_STRING_INTERNAL("roundevenf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double roundevenl(long double x);
TLI_DEFINE_ENUM_INTERNAL(roundevenl)
TLI_DEFINE_STRING_INTERNAL("roundevenl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// float roundf(float x);
TLI_DEFINE_ENUM_INTERNAL(roundf)
TLI_DEFINE_STRING_INTERNAL("roundf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double roundl(long double x);
TLI_DEFINE_ENUM_INTERNAL(roundl)
TLI_DEFINE_STRING_INTERNAL("roundl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// int scanf(const char *restrict format, ... );
TLI_DEFINE_ENUM_INTERNAL(scanf)
TLI_DEFINE_STRING_INTERNAL("scanf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ellip)
/// void setbuf(FILE *stream, char *buf);
TLI_DEFINE_ENUM_INTERNAL(setbuf)
TLI_DEFINE_STRING_INTERNAL("setbuf")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr, Ptr)
/// int setitimer(int which, const struct itimerval *value,
/// struct itimerval *ovalue);
TLI_DEFINE_ENUM_INTERNAL(setitimer)
TLI_DEFINE_STRING_INTERNAL("setitimer")
TLI_DEFINE_SIG_INTERNAL(Int, Int, Ptr, Ptr)
/// int setvbuf(FILE *stream, char *buf, int type, size_t size);
TLI_DEFINE_ENUM_INTERNAL(setvbuf)
TLI_DEFINE_STRING_INTERNAL("setvbuf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Int, SizeT)
/// double sin(double x);
TLI_DEFINE_ENUM_INTERNAL(sin)
TLI_DEFINE_STRING_INTERNAL("sin")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float sinf(float x);
TLI_DEFINE_ENUM_INTERNAL(sinf)
TLI_DEFINE_STRING_INTERNAL("sinf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// double sinh(double x);
TLI_DEFINE_ENUM_INTERNAL(sinh)
TLI_DEFINE_STRING_INTERNAL("sinh")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float sinhf(float x);
TLI_DEFINE_ENUM_INTERNAL(sinhf)
TLI_DEFINE_STRING_INTERNAL("sinhf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double sinhl(long double x);
TLI_DEFINE_ENUM_INTERNAL(sinhl)
TLI_DEFINE_STRING_INTERNAL("sinhl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// long double sinl(long double x);
TLI_DEFINE_ENUM_INTERNAL(sinl)
TLI_DEFINE_STRING_INTERNAL("sinl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// int siprintf(char *str, const char *format, ...);
TLI_DEFINE_ENUM_INTERNAL(siprintf)
TLI_DEFINE_STRING_INTERNAL("siprintf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ellip)
/// int snprintf(char *s, size_t n, const char *format, ...);
TLI_DEFINE_ENUM_INTERNAL(snprintf)
TLI_DEFINE_STRING_INTERNAL("snprintf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, SizeT, Ptr, Ellip)
/// int sprintf(char *str, const char *format, ...);
TLI_DEFINE_ENUM_INTERNAL(sprintf)
TLI_DEFINE_STRING_INTERNAL("sprintf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ellip)
/// double sqrt(double x);
TLI_DEFINE_ENUM_INTERNAL(sqrt)
TLI_DEFINE_STRING_INTERNAL("sqrt")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float sqrtf(float x);
TLI_DEFINE_ENUM_INTERNAL(sqrtf)
TLI_DEFINE_STRING_INTERNAL("sqrtf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double sqrtl(long double x);
TLI_DEFINE_ENUM_INTERNAL(sqrtl)
TLI_DEFINE_STRING_INTERNAL("sqrtl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// int sscanf(const char *s, const char *format, ... );
TLI_DEFINE_ENUM_INTERNAL(sscanf)
TLI_DEFINE_STRING_INTERNAL("sscanf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ellip)
/// int stat(const char *path, struct stat *buf);
TLI_DEFINE_ENUM_INTERNAL(stat)
TLI_DEFINE_STRING_INTERNAL("stat")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// int stat64(const char *path, struct stat64 *buf);
TLI_DEFINE_ENUM_INTERNAL(stat64)
TLI_DEFINE_STRING_INTERNAL("stat64")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// int statvfs(const char *path, struct statvfs *buf);
TLI_DEFINE_ENUM_INTERNAL(statvfs)
TLI_DEFINE_STRING_INTERNAL("statvfs")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// int statvfs64(const char *path, struct statvfs64 *buf)
TLI_DEFINE_ENUM_INTERNAL(statvfs64)
TLI_DEFINE_STRING_INTERNAL("statvfs64")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// char *stpcpy(char *s1, const char *s2);
TLI_DEFINE_ENUM_INTERNAL(stpcpy)
TLI_DEFINE_STRING_INTERNAL("stpcpy")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr)
/// char *stpncpy(char *s1, const char *s2, size_t n);
TLI_DEFINE_ENUM_INTERNAL(stpncpy)
TLI_DEFINE_STRING_INTERNAL("stpncpy")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, SizeT)
/// int strcasecmp(const char *s1, const char *s2);
TLI_DEFINE_ENUM_INTERNAL(strcasecmp)
TLI_DEFINE_STRING_INTERNAL("strcasecmp")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// char *strcat(char *s1, const char *s2);
TLI_DEFINE_ENUM_INTERNAL(strcat)
TLI_DEFINE_STRING_INTERNAL("strcat")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr)
/// char *strchr(const char *s, int c);
TLI_DEFINE_ENUM_INTERNAL(strchr)
TLI_DEFINE_STRING_INTERNAL("strchr")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Int)
/// int strcmp(const char *s1, const char *s2);
TLI_DEFINE_ENUM_INTERNAL(strcmp)
TLI_DEFINE_STRING_INTERNAL("strcmp")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// int strcoll(const char *s1, const char *s2);
TLI_DEFINE_ENUM_INTERNAL(strcoll)
TLI_DEFINE_STRING_INTERNAL("strcoll")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// char *strcpy(char *s1, const char *s2);
TLI_DEFINE_ENUM_INTERNAL(strcpy)
TLI_DEFINE_STRING_INTERNAL("strcpy")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr)
/// size_t strcspn(const char *s1, const char *s2);
TLI_DEFINE_ENUM_INTERNAL(strcspn)
TLI_DEFINE_STRING_INTERNAL("strcspn")
TLI_DEFINE_SIG_INTERNAL(SizeT, Ptr, Ptr)
/// char *strdup(const char *s1);
TLI_DEFINE_ENUM_INTERNAL(strdup)
TLI_DEFINE_STRING_INTERNAL("strdup")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr)
/// size_t strlcat(char *dst, const char *src, size_t size);
TLI_DEFINE_ENUM_INTERNAL(strlcat)
TLI_DEFINE_STRING_INTERNAL("strlcat")
TLI_DEFINE_SIG_INTERNAL(SizeT, Ptr, Ptr, SizeT)
/// size_t strlcpy(char *dst, const char *src, size_t size);
TLI_DEFINE_ENUM_INTERNAL(strlcpy)
TLI_DEFINE_STRING_INTERNAL("strlcpy")
TLI_DEFINE_SIG_INTERNAL(SizeT, Ptr, Ptr, SizeT)
/// size_t strlen(const char *s);
TLI_DEFINE_ENUM_INTERNAL(strlen)
TLI_DEFINE_STRING_INTERNAL("strlen")
TLI_DEFINE_SIG_INTERNAL(SizeT, Ptr)
/// int strncasecmp(const char *s1, const char *s2, size_t n);
TLI_DEFINE_ENUM_INTERNAL(strncasecmp)
TLI_DEFINE_STRING_INTERNAL("strncasecmp")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, SizeT)
/// char *strncat(char *s1, const char *s2, size_t n);
TLI_DEFINE_ENUM_INTERNAL(strncat)
TLI_DEFINE_STRING_INTERNAL("strncat")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, SizeT)
/// int strncmp(const char *s1, const char *s2, size_t n);
TLI_DEFINE_ENUM_INTERNAL(strncmp)
TLI_DEFINE_STRING_INTERNAL("strncmp")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, SizeT)
/// char *strncpy(char *s1, const char *s2, size_t n);
TLI_DEFINE_ENUM_INTERNAL(strncpy)
TLI_DEFINE_STRING_INTERNAL("strncpy")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, SizeT)
/// char *strndup(const char *s1, size_t n);
TLI_DEFINE_ENUM_INTERNAL(strndup)
TLI_DEFINE_STRING_INTERNAL("strndup")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, SizeT)
/// size_t strnlen(const char *s, size_t maxlen);
TLI_DEFINE_ENUM_INTERNAL(strnlen)
TLI_DEFINE_STRING_INTERNAL("strnlen")
TLI_DEFINE_SIG_INTERNAL(SizeT, Ptr, SizeT)
/// char *strpbrk(const char *s1, const char *s2);
TLI_DEFINE_ENUM_INTERNAL(strpbrk)
TLI_DEFINE_STRING_INTERNAL("strpbrk")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr)
/// char *strrchr(const char *s, int c);
TLI_DEFINE_ENUM_INTERNAL(strrchr)
TLI_DEFINE_STRING_INTERNAL("strrchr")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Int)
/// size_t strspn(const char *s1, const char *s2);
TLI_DEFINE_ENUM_INTERNAL(strspn)
TLI_DEFINE_STRING_INTERNAL("strspn")
TLI_DEFINE_SIG_INTERNAL(SizeT, Ptr, Ptr)
/// char *strstr(const char *s1, const char *s2);
TLI_DEFINE_ENUM_INTERNAL(strstr)
TLI_DEFINE_STRING_INTERNAL("strstr")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr)
/// double strtod(const char *nptr, char **endptr);
TLI_DEFINE_ENUM_INTERNAL(strtod)
TLI_DEFINE_STRING_INTERNAL("strtod")
TLI_DEFINE_SIG_INTERNAL(Dbl, Ptr, Ptr)
/// float strtof(const char *nptr, char **endptr);
TLI_DEFINE_ENUM_INTERNAL(strtof)
TLI_DEFINE_STRING_INTERNAL("strtof")
TLI_DEFINE_SIG_INTERNAL(Flt, Ptr, Ptr)
/// char *strtok(char *s1, const char *s2);
TLI_DEFINE_ENUM_INTERNAL(strtok)
TLI_DEFINE_STRING_INTERNAL("strtok")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr)
/// char *strtok_r(char *s, const char *sep, char **lasts);
TLI_DEFINE_ENUM_INTERNAL(strtok_r)
TLI_DEFINE_STRING_INTERNAL("strtok_r")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, Ptr, Ptr)
/// long int strtol(const char *nptr, char **endptr, int base);
TLI_DEFINE_ENUM_INTERNAL(strtol)
TLI_DEFINE_STRING_INTERNAL("strtol")
TLI_DEFINE_SIG_INTERNAL(Long, Ptr, Ptr, Int)
/// long double strtold(const char *nptr, char **endptr);
TLI_DEFINE_ENUM_INTERNAL(strtold)
TLI_DEFINE_STRING_INTERNAL("strtold")
TLI_DEFINE_SIG_INTERNAL(LDbl, Ptr, Ptr)
/// long long int strtoll(const char *nptr, char **endptr, int base);
TLI_DEFINE_ENUM_INTERNAL(strtoll)
TLI_DEFINE_STRING_INTERNAL("strtoll")
TLI_DEFINE_SIG_INTERNAL(LLong, Ptr, Ptr, Int)
/// unsigned long int strtoul(const char *nptr, char **endptr, int base);
TLI_DEFINE_ENUM_INTERNAL(strtoul)
TLI_DEFINE_STRING_INTERNAL("strtoul")
TLI_DEFINE_SIG_INTERNAL(Long, Ptr, Ptr, Int)
/// unsigned long long int strtoull(const char *nptr, char **endptr, int base);
TLI_DEFINE_ENUM_INTERNAL(strtoull)
TLI_DEFINE_STRING_INTERNAL("strtoull")
TLI_DEFINE_SIG_INTERNAL(LLong, Ptr, Ptr, Int)
/// size_t strxfrm(char *s1, const char *s2, size_t n);
TLI_DEFINE_ENUM_INTERNAL(strxfrm)
TLI_DEFINE_STRING_INTERNAL("strxfrm")
TLI_DEFINE_SIG_INTERNAL(SizeT, Ptr, Ptr, SizeT)
/// int system(const char *command);
TLI_DEFINE_ENUM_INTERNAL(system)
TLI_DEFINE_STRING_INTERNAL("system")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// double tan(double x);
TLI_DEFINE_ENUM_INTERNAL(tan)
TLI_DEFINE_STRING_INTERNAL("tan")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float tanf(float x);
TLI_DEFINE_ENUM_INTERNAL(tanf)
TLI_DEFINE_STRING_INTERNAL("tanf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// double tanh(double x);
TLI_DEFINE_ENUM_INTERNAL(tanh)
TLI_DEFINE_STRING_INTERNAL("tanh")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float tanhf(float x);
TLI_DEFINE_ENUM_INTERNAL(tanhf)
TLI_DEFINE_STRING_INTERNAL("tanhf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double tanhl(long double x);
TLI_DEFINE_ENUM_INTERNAL(tanhl)
TLI_DEFINE_STRING_INTERNAL("tanhl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// long double tanl(long double x);
TLI_DEFINE_ENUM_INTERNAL(tanl)
TLI_DEFINE_STRING_INTERNAL("tanl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// clock_t times(struct tms *buffer);
TLI_DEFINE_ENUM_INTERNAL(times)
TLI_DEFINE_STRING_INTERNAL("times")
TLI_DEFINE_SIG_INTERNAL(IntPlus, Ptr)
/// FILE *tmpfile(void);
TLI_DEFINE_ENUM_INTERNAL(tmpfile)
TLI_DEFINE_STRING_INTERNAL("tmpfile")
TLI_DEFINE_SIG_INTERNAL(Ptr)
/// FILE *tmpfile64(void)
TLI_DEFINE_ENUM_INTERNAL(tmpfile64)
TLI_DEFINE_STRING_INTERNAL("tmpfile64")
TLI_DEFINE_SIG_INTERNAL(Ptr)
/// int toascii(int c);
TLI_DEFINE_ENUM_INTERNAL(toascii)
TLI_DEFINE_STRING_INTERNAL("toascii")
TLI_DEFINE_SIG_INTERNAL(Int, Int)
/// double trunc(double x);
TLI_DEFINE_ENUM_INTERNAL(trunc)
TLI_DEFINE_STRING_INTERNAL("trunc")
TLI_DEFINE_SIG_INTERNAL(Dbl, Dbl)
/// float truncf(float x);
TLI_DEFINE_ENUM_INTERNAL(truncf)
TLI_DEFINE_STRING_INTERNAL("truncf")
TLI_DEFINE_SIG_INTERNAL(Flt, Flt)
/// long double truncl(long double x);
TLI_DEFINE_ENUM_INTERNAL(truncl)
TLI_DEFINE_STRING_INTERNAL("truncl")
TLI_DEFINE_SIG_INTERNAL(LDbl, LDbl)
/// int uname(struct utsname *name);
TLI_DEFINE_ENUM_INTERNAL(uname)
TLI_DEFINE_STRING_INTERNAL("uname")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// int ungetc(int c, FILE *stream);
TLI_DEFINE_ENUM_INTERNAL(ungetc)
TLI_DEFINE_STRING_INTERNAL("ungetc")
TLI_DEFINE_SIG_INTERNAL(Int, Int, Ptr)
/// int unlink(const char *path);
TLI_DEFINE_ENUM_INTERNAL(unlink)
TLI_DEFINE_STRING_INTERNAL("unlink")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// int unsetenv(const char *name);
TLI_DEFINE_ENUM_INTERNAL(unsetenv)
TLI_DEFINE_STRING_INTERNAL("unsetenv")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr)
/// int utime(const char *path, const struct utimbuf *times);
TLI_DEFINE_ENUM_INTERNAL(utime)
TLI_DEFINE_STRING_INTERNAL("utime")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// int utimes(const char *path, const struct timeval times[2]);
TLI_DEFINE_ENUM_INTERNAL(utimes)
TLI_DEFINE_STRING_INTERNAL("utimes")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// void *valloc(size_t size);
TLI_DEFINE_ENUM_INTERNAL(valloc)
TLI_DEFINE_STRING_INTERNAL("valloc")
TLI_DEFINE_SIG_INTERNAL(Ptr, SizeT)
/// void *vec_calloc(size_t count, size_t size);
TLI_DEFINE_ENUM_INTERNAL(vec_calloc)
TLI_DEFINE_STRING_INTERNAL("vec_calloc")
TLI_DEFINE_SIG_INTERNAL(Ptr, SizeT, SizeT)
/// void vec_free(void *ptr);
TLI_DEFINE_ENUM_INTERNAL(vec_free)
TLI_DEFINE_STRING_INTERNAL("vec_free")
TLI_DEFINE_SIG_INTERNAL(Void, Ptr)
/// void *vec_malloc(size_t size);
TLI_DEFINE_ENUM_INTERNAL(vec_malloc)
TLI_DEFINE_STRING_INTERNAL("vec_malloc")
TLI_DEFINE_SIG_INTERNAL(Ptr, SizeT)
/// void *vec_realloc(void *ptr, size_t size);
TLI_DEFINE_ENUM_INTERNAL(vec_realloc)
TLI_DEFINE_STRING_INTERNAL("vec_realloc")
TLI_DEFINE_SIG_INTERNAL(Ptr, Ptr, SizeT)
/// int vfprintf(FILE *stream, const char *format, va_list ap);
TLI_DEFINE_ENUM_INTERNAL(vfprintf)
TLI_DEFINE_STRING_INTERNAL("vfprintf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ptr)
/// int vfscanf(FILE *stream, const char *format, va_list arg);
TLI_DEFINE_ENUM_INTERNAL(vfscanf)
TLI_DEFINE_STRING_INTERNAL("vfscanf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ptr)
/// int vprintf(const char *restrict format, va_list ap);
TLI_DEFINE_ENUM_INTERNAL(vprintf)
TLI_DEFINE_STRING_INTERNAL("vprintf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// int vscanf(const char *format, va_list arg);
TLI_DEFINE_ENUM_INTERNAL(vscanf)
TLI_DEFINE_STRING_INTERNAL("vscanf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr)
/// int vsnprintf(char *s, size_t n, const char *format, va_list ap);
TLI_DEFINE_ENUM_INTERNAL(vsnprintf)
TLI_DEFINE_STRING_INTERNAL("vsnprintf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, SizeT, Ptr, Ptr)
/// int vsprintf(char *s, const char *format, va_list ap);
TLI_DEFINE_ENUM_INTERNAL(vsprintf)
TLI_DEFINE_STRING_INTERNAL("vsprintf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ptr)
/// int vsscanf(const char *s, const char *format, va_list arg);
TLI_DEFINE_ENUM_INTERNAL(vsscanf)
TLI_DEFINE_STRING_INTERNAL("vsscanf")
TLI_DEFINE_SIG_INTERNAL(Int, Ptr, Ptr, Ptr)
/// size_t wcslen (const wchar_t* wcs);
TLI_DEFINE_ENUM_INTERNAL(wcslen)
TLI_DEFINE_STRING_INTERNAL("wcslen")
TLI_DEFINE_SIG_INTERNAL(SizeT, Ptr)
/// ssize_t write(int fildes, const void *buf, size_t nbyte);
TLI_DEFINE_ENUM_INTERNAL(write)
TLI_DEFINE_STRING_INTERNAL("write")
TLI_DEFINE_SIG_INTERNAL(SSizeT, Int, Ptr, SizeT)
#undef TLI_DEFINE_ENUM_INTERNAL
#undef TLI_DEFINE_STRING_INTERNAL
#undef TLI_DEFINE_SIG_INTERNAL
#endif // One of TLI_DEFINE_ENUM/STRING are defined.
#undef TLI_DEFINE_ENUM
#undef TLI_DEFINE_STRING
#undef TLI_DEFINE_SIG
PK iwFZ�6��� �� Analysis/LoopAccessAnalysis.hnu �[��� //===- llvm/Analysis/LoopAccessAnalysis.h -----------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file defines the interface for the loop memory dependence framework that
// was originally developed for the Loop Vectorizer.
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_LOOPACCESSANALYSIS_H
#define LLVM_ANALYSIS_LOOPACCESSANALYSIS_H
#include "llvm/ADT/EquivalenceClasses.h"
#include "llvm/Analysis/LoopAnalysisManager.h"
#include "llvm/Analysis/ScalarEvolutionExpressions.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/Pass.h"
#include <optional>
namespace llvm {
class AAResults;
class DataLayout;
class Loop;
class LoopAccessInfo;
class raw_ostream;
class SCEV;
class SCEVUnionPredicate;
class Value;
/// Collection of parameters shared beetween the Loop Vectorizer and the
/// Loop Access Analysis.
struct VectorizerParams {
/// Maximum SIMD width.
static const unsigned MaxVectorWidth;
/// VF as overridden by the user.
static unsigned VectorizationFactor;
/// Interleave factor as overridden by the user.
static unsigned VectorizationInterleave;
/// True if force-vector-interleave was specified by the user.
static bool isInterleaveForced();
/// \When performing memory disambiguation checks at runtime do not
/// make more than this number of comparisons.
static unsigned RuntimeMemoryCheckThreshold;
};
/// Checks memory dependences among accesses to the same underlying
/// object to determine whether there vectorization is legal or not (and at
/// which vectorization factor).
///
/// Note: This class will compute a conservative dependence for access to
/// different underlying pointers. Clients, such as the loop vectorizer, will
/// sometimes deal these potential dependencies by emitting runtime checks.
///
/// We use the ScalarEvolution framework to symbolically evalutate access
/// functions pairs. Since we currently don't restructure the loop we can rely
/// on the program order of memory accesses to determine their safety.
/// At the moment we will only deem accesses as safe for:
/// * A negative constant distance assuming program order.
///
/// Safe: tmp = a[i + 1]; OR a[i + 1] = x;
/// a[i] = tmp; y = a[i];
///
/// The latter case is safe because later checks guarantuee that there can't
/// be a cycle through a phi node (that is, we check that "x" and "y" is not
/// the same variable: a header phi can only be an induction or a reduction, a
/// reduction can't have a memory sink, an induction can't have a memory
/// source). This is important and must not be violated (or we have to
/// resort to checking for cycles through memory).
///
/// * A positive constant distance assuming program order that is bigger
/// than the biggest memory access.
///
/// tmp = a[i] OR b[i] = x
/// a[i+2] = tmp y = b[i+2];
///
/// Safe distance: 2 x sizeof(a[0]), and 2 x sizeof(b[0]), respectively.
///
/// * Zero distances and all accesses have the same size.
///
class MemoryDepChecker {
public:
typedef PointerIntPair<Value *, 1, bool> MemAccessInfo;
typedef SmallVector<MemAccessInfo, 8> MemAccessInfoList;
/// Set of potential dependent memory accesses.
typedef EquivalenceClasses<MemAccessInfo> DepCandidates;
/// Type to keep track of the status of the dependence check. The order of
/// the elements is important and has to be from most permissive to least
/// permissive.
enum class VectorizationSafetyStatus {
// Can vectorize safely without RT checks. All dependences are known to be
// safe.
Safe,
// Can possibly vectorize with RT checks to overcome unknown dependencies.
PossiblySafeWithRtChecks,
// Cannot vectorize due to known unsafe dependencies.
Unsafe,
};
/// Dependece between memory access instructions.
struct Dependence {
/// The type of the dependence.
enum DepType {
// No dependence.
NoDep,
// We couldn't determine the direction or the distance.
Unknown,
// Lexically forward.
//
// FIXME: If we only have loop-independent forward dependences (e.g. a
// read and write of A[i]), LAA will locally deem the dependence "safe"
// without querying the MemoryDepChecker. Therefore we can miss
// enumerating loop-independent forward dependences in
// getDependences. Note that as soon as there are different
// indices used to access the same array, the MemoryDepChecker *is*
// queried and the dependence list is complete.
Forward,
// Forward, but if vectorized, is likely to prevent store-to-load
// forwarding.
ForwardButPreventsForwarding,
// Lexically backward.
Backward,
// Backward, but the distance allows a vectorization factor of
// MaxSafeDepDistBytes.
BackwardVectorizable,
// Same, but may prevent store-to-load forwarding.
BackwardVectorizableButPreventsForwarding
};
/// String version of the types.
static const char *DepName[];
/// Index of the source of the dependence in the InstMap vector.
unsigned Source;
/// Index of the destination of the dependence in the InstMap vector.
unsigned Destination;
/// The type of the dependence.
DepType Type;
Dependence(unsigned Source, unsigned Destination, DepType Type)
: Source(Source), Destination(Destination), Type(Type) {}
/// Return the source instruction of the dependence.
Instruction *getSource(const LoopAccessInfo &LAI) const;
/// Return the destination instruction of the dependence.
Instruction *getDestination(const LoopAccessInfo &LAI) const;
/// Dependence types that don't prevent vectorization.
static VectorizationSafetyStatus isSafeForVectorization(DepType Type);
/// Lexically forward dependence.
bool isForward() const;
/// Lexically backward dependence.
bool isBackward() const;
/// May be a lexically backward dependence type (includes Unknown).
bool isPossiblyBackward() const;
/// Print the dependence. \p Instr is used to map the instruction
/// indices to instructions.
void print(raw_ostream &OS, unsigned Depth,
const SmallVectorImpl<Instruction *> &Instrs) const;
};
MemoryDepChecker(PredicatedScalarEvolution &PSE, const Loop *L)
: PSE(PSE), InnermostLoop(L) {}
/// Register the location (instructions are given increasing numbers)
/// of a write access.
void addAccess(StoreInst *SI);
/// Register the location (instructions are given increasing numbers)
/// of a write access.
void addAccess(LoadInst *LI);
/// Check whether the dependencies between the accesses are safe.
///
/// Only checks sets with elements in \p CheckDeps.
bool areDepsSafe(DepCandidates &AccessSets, MemAccessInfoList &CheckDeps,
const DenseMap<Value *, const SCEV *> &Strides);
/// No memory dependence was encountered that would inhibit
/// vectorization.
bool isSafeForVectorization() const {
return Status == VectorizationSafetyStatus::Safe;
}
/// Return true if the number of elements that are safe to operate on
/// simultaneously is not bounded.
bool isSafeForAnyVectorWidth() const {
return MaxSafeVectorWidthInBits == UINT_MAX;
}
/// The maximum number of bytes of a vector register we can vectorize
/// the accesses safely with.
uint64_t getMaxSafeDepDistBytes() { return MaxSafeDepDistBytes; }
/// Return the number of elements that are safe to operate on
/// simultaneously, multiplied by the size of the element in bits.
uint64_t getMaxSafeVectorWidthInBits() const {
return MaxSafeVectorWidthInBits;
}
/// In same cases when the dependency check fails we can still
/// vectorize the loop with a dynamic array access check.
bool shouldRetryWithRuntimeCheck() const {
return FoundNonConstantDistanceDependence &&
Status == VectorizationSafetyStatus::PossiblySafeWithRtChecks;
}
/// Returns the memory dependences. If null is returned we exceeded
/// the MaxDependences threshold and this information is not
/// available.
const SmallVectorImpl<Dependence> *getDependences() const {
return RecordDependences ? &Dependences : nullptr;
}
void clearDependences() { Dependences.clear(); }
/// The vector of memory access instructions. The indices are used as
/// instruction identifiers in the Dependence class.
const SmallVectorImpl<Instruction *> &getMemoryInstructions() const {
return InstMap;
}
/// Generate a mapping between the memory instructions and their
/// indices according to program order.
DenseMap<Instruction *, unsigned> generateInstructionOrderMap() const {
DenseMap<Instruction *, unsigned> OrderMap;
for (unsigned I = 0; I < InstMap.size(); ++I)
OrderMap[InstMap[I]] = I;
return OrderMap;
}
/// Find the set of instructions that read or write via \p Ptr.
SmallVector<Instruction *, 4> getInstructionsForAccess(Value *Ptr,
bool isWrite) const;
/// Return the program order indices for the access location (Ptr, IsWrite).
/// Returns an empty ArrayRef if there are no accesses for the location.
ArrayRef<unsigned> getOrderForAccess(Value *Ptr, bool IsWrite) const {
auto I = Accesses.find({Ptr, IsWrite});
if (I != Accesses.end())
return I->second;
return {};
}
const Loop *getInnermostLoop() const { return InnermostLoop; }
private:
/// A wrapper around ScalarEvolution, used to add runtime SCEV checks, and
/// applies dynamic knowledge to simplify SCEV expressions and convert them
/// to a more usable form. We need this in case assumptions about SCEV
/// expressions need to be made in order to avoid unknown dependences. For
/// example we might assume a unit stride for a pointer in order to prove
/// that a memory access is strided and doesn't wrap.
PredicatedScalarEvolution &PSE;
const Loop *InnermostLoop;
/// Maps access locations (ptr, read/write) to program order.
DenseMap<MemAccessInfo, std::vector<unsigned> > Accesses;
/// Memory access instructions in program order.
SmallVector<Instruction *, 16> InstMap;
/// The program order index to be used for the next instruction.
unsigned AccessIdx = 0;
// We can access this many bytes in parallel safely.
uint64_t MaxSafeDepDistBytes = 0;
/// Number of elements (from consecutive iterations) that are safe to
/// operate on simultaneously, multiplied by the size of the element in bits.
/// The size of the element is taken from the memory access that is most
/// restrictive.
uint64_t MaxSafeVectorWidthInBits = -1U;
/// If we see a non-constant dependence distance we can still try to
/// vectorize this loop with runtime checks.
bool FoundNonConstantDistanceDependence = false;
/// Result of the dependence checks, indicating whether the checked
/// dependences are safe for vectorization, require RT checks or are known to
/// be unsafe.
VectorizationSafetyStatus Status = VectorizationSafetyStatus::Safe;
//// True if Dependences reflects the dependences in the
//// loop. If false we exceeded MaxDependences and
//// Dependences is invalid.
bool RecordDependences = true;
/// Memory dependences collected during the analysis. Only valid if
/// RecordDependences is true.
SmallVector<Dependence, 8> Dependences;
/// Check whether there is a plausible dependence between the two
/// accesses.
///
/// Access \p A must happen before \p B in program order. The two indices
/// identify the index into the program order map.
///
/// This function checks whether there is a plausible dependence (or the
/// absence of such can't be proved) between the two accesses. If there is a
/// plausible dependence but the dependence distance is bigger than one
/// element access it records this distance in \p MaxSafeDepDistBytes (if this
/// distance is smaller than any other distance encountered so far).
/// Otherwise, this function returns true signaling a possible dependence.
Dependence::DepType isDependent(const MemAccessInfo &A, unsigned AIdx,
const MemAccessInfo &B, unsigned BIdx,
const DenseMap<Value *, const SCEV *> &Strides);
/// Check whether the data dependence could prevent store-load
/// forwarding.
///
/// \return false if we shouldn't vectorize at all or avoid larger
/// vectorization factors by limiting MaxSafeDepDistBytes.
bool couldPreventStoreLoadForward(uint64_t Distance, uint64_t TypeByteSize);
/// Updates the current safety status with \p S. We can go from Safe to
/// either PossiblySafeWithRtChecks or Unsafe and from
/// PossiblySafeWithRtChecks to Unsafe.
void mergeInStatus(VectorizationSafetyStatus S);
};
class RuntimePointerChecking;
/// A grouping of pointers. A single memcheck is required between
/// two groups.
struct RuntimeCheckingPtrGroup {
/// Create a new pointer checking group containing a single
/// pointer, with index \p Index in RtCheck.
RuntimeCheckingPtrGroup(unsigned Index, RuntimePointerChecking &RtCheck);
/// Tries to add the pointer recorded in RtCheck at index
/// \p Index to this pointer checking group. We can only add a pointer
/// to a checking group if we will still be able to get
/// the upper and lower bounds of the check. Returns true in case
/// of success, false otherwise.
bool addPointer(unsigned Index, RuntimePointerChecking &RtCheck);
bool addPointer(unsigned Index, const SCEV *Start, const SCEV *End,
unsigned AS, bool NeedsFreeze, ScalarEvolution &SE);
/// The SCEV expression which represents the upper bound of all the
/// pointers in this group.
const SCEV *High;
/// The SCEV expression which represents the lower bound of all the
/// pointers in this group.
const SCEV *Low;
/// Indices of all the pointers that constitute this grouping.
SmallVector<unsigned, 2> Members;
/// Address space of the involved pointers.
unsigned AddressSpace;
/// Whether the pointer needs to be frozen after expansion, e.g. because it
/// may be poison outside the loop.
bool NeedsFreeze = false;
};
/// A memcheck which made up of a pair of grouped pointers.
typedef std::pair<const RuntimeCheckingPtrGroup *,
const RuntimeCheckingPtrGroup *>
RuntimePointerCheck;
struct PointerDiffInfo {
const SCEV *SrcStart;
const SCEV *SinkStart;
unsigned AccessSize;
bool NeedsFreeze;
PointerDiffInfo(const SCEV *SrcStart, const SCEV *SinkStart,
unsigned AccessSize, bool NeedsFreeze)
: SrcStart(SrcStart), SinkStart(SinkStart), AccessSize(AccessSize),
NeedsFreeze(NeedsFreeze) {}
};
/// Holds information about the memory runtime legality checks to verify
/// that a group of pointers do not overlap.
class RuntimePointerChecking {
friend struct RuntimeCheckingPtrGroup;
public:
struct PointerInfo {
/// Holds the pointer value that we need to check.
TrackingVH<Value> PointerValue;
/// Holds the smallest byte address accessed by the pointer throughout all
/// iterations of the loop.
const SCEV *Start;
/// Holds the largest byte address accessed by the pointer throughout all
/// iterations of the loop, plus 1.
const SCEV *End;
/// Holds the information if this pointer is used for writing to memory.
bool IsWritePtr;
/// Holds the id of the set of pointers that could be dependent because of a
/// shared underlying object.
unsigned DependencySetId;
/// Holds the id of the disjoint alias set to which this pointer belongs.
unsigned AliasSetId;
/// SCEV for the access.
const SCEV *Expr;
/// True if the pointer expressions needs to be frozen after expansion.
bool NeedsFreeze;
PointerInfo(Value *PointerValue, const SCEV *Start, const SCEV *End,
bool IsWritePtr, unsigned DependencySetId, unsigned AliasSetId,
const SCEV *Expr, bool NeedsFreeze)
: PointerValue(PointerValue), Start(Start), End(End),
IsWritePtr(IsWritePtr), DependencySetId(DependencySetId),
AliasSetId(AliasSetId), Expr(Expr), NeedsFreeze(NeedsFreeze) {}
};
RuntimePointerChecking(MemoryDepChecker &DC, ScalarEvolution *SE)
: DC(DC), SE(SE) {}
/// Reset the state of the pointer runtime information.
void reset() {
Need = false;
Pointers.clear();
Checks.clear();
}
/// Insert a pointer and calculate the start and end SCEVs.
/// We need \p PSE in order to compute the SCEV expression of the pointer
/// according to the assumptions that we've made during the analysis.
/// The method might also version the pointer stride according to \p Strides,
/// and add new predicates to \p PSE.
void insert(Loop *Lp, Value *Ptr, const SCEV *PtrExpr, Type *AccessTy,
bool WritePtr, unsigned DepSetId, unsigned ASId,
PredicatedScalarEvolution &PSE, bool NeedsFreeze);
/// No run-time memory checking is necessary.
bool empty() const { return Pointers.empty(); }
/// Generate the checks and store it. This also performs the grouping
/// of pointers to reduce the number of memchecks necessary.
void generateChecks(MemoryDepChecker::DepCandidates &DepCands,
bool UseDependencies);
/// Returns the checks that generateChecks created. They can be used to ensure
/// no read/write accesses overlap across all loop iterations.
const SmallVectorImpl<RuntimePointerCheck> &getChecks() const {
return Checks;
}
// Returns an optional list of (pointer-difference expressions, access size)
// pairs that can be used to prove that there are no vectorization-preventing
// dependencies at runtime. There are is a vectorization-preventing dependency
// if any pointer-difference is <u VF * InterleaveCount * access size. Returns
// std::nullopt if pointer-difference checks cannot be used.
std::optional<ArrayRef<PointerDiffInfo>> getDiffChecks() const {
if (!CanUseDiffCheck)
return std::nullopt;
return {DiffChecks};
}
/// Decide if we need to add a check between two groups of pointers,
/// according to needsChecking.
bool needsChecking(const RuntimeCheckingPtrGroup &M,
const RuntimeCheckingPtrGroup &N) const;
/// Returns the number of run-time checks required according to
/// needsChecking.
unsigned getNumberOfChecks() const { return Checks.size(); }
/// Print the list run-time memory checks necessary.
void print(raw_ostream &OS, unsigned Depth = 0) const;
/// Print \p Checks.
void printChecks(raw_ostream &OS,
const SmallVectorImpl<RuntimePointerCheck> &Checks,
unsigned Depth = 0) const;
/// This flag indicates if we need to add the runtime check.
bool Need = false;
/// Information about the pointers that may require checking.
SmallVector<PointerInfo, 2> Pointers;
/// Holds a partitioning of pointers into "check groups".
SmallVector<RuntimeCheckingPtrGroup, 2> CheckingGroups;
/// Check if pointers are in the same partition
///
/// \p PtrToPartition contains the partition number for pointers (-1 if the
/// pointer belongs to multiple partitions).
static bool
arePointersInSamePartition(const SmallVectorImpl<int> &PtrToPartition,
unsigned PtrIdx1, unsigned PtrIdx2);
/// Decide whether we need to issue a run-time check for pointer at
/// index \p I and \p J to prove their independence.
bool needsChecking(unsigned I, unsigned J) const;
/// Return PointerInfo for pointer at index \p PtrIdx.
const PointerInfo &getPointerInfo(unsigned PtrIdx) const {
return Pointers[PtrIdx];
}
ScalarEvolution *getSE() const { return SE; }
private:
/// Groups pointers such that a single memcheck is required
/// between two different groups. This will clear the CheckingGroups vector
/// and re-compute it. We will only group dependecies if \p UseDependencies
/// is true, otherwise we will create a separate group for each pointer.
void groupChecks(MemoryDepChecker::DepCandidates &DepCands,
bool UseDependencies);
/// Generate the checks and return them.
SmallVector<RuntimePointerCheck, 4> generateChecks();
/// Try to create add a new (pointer-difference, access size) pair to
/// DiffCheck for checking groups \p CGI and \p CGJ. If pointer-difference
/// checks cannot be used for the groups, set CanUseDiffCheck to false.
void tryToCreateDiffCheck(const RuntimeCheckingPtrGroup &CGI,
const RuntimeCheckingPtrGroup &CGJ);
MemoryDepChecker &DC;
/// Holds a pointer to the ScalarEvolution analysis.
ScalarEvolution *SE;
/// Set of run-time checks required to establish independence of
/// otherwise may-aliasing pointers in the loop.
SmallVector<RuntimePointerCheck, 4> Checks;
/// Flag indicating if pointer-difference checks can be used
bool CanUseDiffCheck = true;
/// A list of (pointer-difference, access size) pairs that can be used to
/// prove that there are no vectorization-preventing dependencies.
SmallVector<PointerDiffInfo> DiffChecks;
};
/// Drive the analysis of memory accesses in the loop
///
/// This class is responsible for analyzing the memory accesses of a loop. It
/// collects the accesses and then its main helper the AccessAnalysis class
/// finds and categorizes the dependences in buildDependenceSets.
///
/// For memory dependences that can be analyzed at compile time, it determines
/// whether the dependence is part of cycle inhibiting vectorization. This work
/// is delegated to the MemoryDepChecker class.
///
/// For memory dependences that cannot be determined at compile time, it
/// generates run-time checks to prove independence. This is done by
/// AccessAnalysis::canCheckPtrAtRT and the checks are maintained by the
/// RuntimePointerCheck class.
///
/// If pointers can wrap or can't be expressed as affine AddRec expressions by
/// ScalarEvolution, we will generate run-time checks by emitting a
/// SCEVUnionPredicate.
///
/// Checks for both memory dependences and the SCEV predicates contained in the
/// PSE must be emitted in order for the results of this analysis to be valid.
class LoopAccessInfo {
public:
LoopAccessInfo(Loop *L, ScalarEvolution *SE, const TargetLibraryInfo *TLI,
AAResults *AA, DominatorTree *DT, LoopInfo *LI);
/// Return true we can analyze the memory accesses in the loop and there are
/// no memory dependence cycles.
bool canVectorizeMemory() const { return CanVecMem; }
/// Return true if there is a convergent operation in the loop. There may
/// still be reported runtime pointer checks that would be required, but it is
/// not legal to insert them.
bool hasConvergentOp() const { return HasConvergentOp; }
const RuntimePointerChecking *getRuntimePointerChecking() const {
return PtrRtChecking.get();
}
/// Number of memchecks required to prove independence of otherwise
/// may-alias pointers.
unsigned getNumRuntimePointerChecks() const {
return PtrRtChecking->getNumberOfChecks();
}
/// Return true if the block BB needs to be predicated in order for the loop
/// to be vectorized.
static bool blockNeedsPredication(BasicBlock *BB, Loop *TheLoop,
DominatorTree *DT);
/// Returns true if value \p V is loop invariant.
bool isInvariant(Value *V) const;
unsigned getNumStores() const { return NumStores; }
unsigned getNumLoads() const { return NumLoads;}
/// The diagnostics report generated for the analysis. E.g. why we
/// couldn't analyze the loop.
const OptimizationRemarkAnalysis *getReport() const { return Report.get(); }
/// the Memory Dependence Checker which can determine the
/// loop-independent and loop-carried dependences between memory accesses.
const MemoryDepChecker &getDepChecker() const { return *DepChecker; }
/// Return the list of instructions that use \p Ptr to read or write
/// memory.
SmallVector<Instruction *, 4> getInstructionsForAccess(Value *Ptr,
bool isWrite) const {
return DepChecker->getInstructionsForAccess(Ptr, isWrite);
}
/// If an access has a symbolic strides, this maps the pointer value to
/// the stride symbol.
const DenseMap<Value *, const SCEV *> &getSymbolicStrides() const {
return SymbolicStrides;
}
/// Print the information about the memory accesses in the loop.
void print(raw_ostream &OS, unsigned Depth = 0) const;
/// If the loop has memory dependence involving an invariant address, i.e. two
/// stores or a store and a load, then return true, else return false.
bool hasDependenceInvolvingLoopInvariantAddress() const {
return HasDependenceInvolvingLoopInvariantAddress;
}
/// Return the list of stores to invariant addresses.
ArrayRef<StoreInst *> getStoresToInvariantAddresses() const {
return StoresToInvariantAddresses;
}
/// Used to add runtime SCEV checks. Simplifies SCEV expressions and converts
/// them to a more usable form. All SCEV expressions during the analysis
/// should be re-written (and therefore simplified) according to PSE.
/// A user of LoopAccessAnalysis will need to emit the runtime checks
/// associated with this predicate.
const PredicatedScalarEvolution &getPSE() const { return *PSE; }
private:
/// Analyze the loop.
void analyzeLoop(AAResults *AA, LoopInfo *LI,
const TargetLibraryInfo *TLI, DominatorTree *DT);
/// Check if the structure of the loop allows it to be analyzed by this
/// pass.
bool canAnalyzeLoop();
/// Save the analysis remark.
///
/// LAA does not directly emits the remarks. Instead it stores it which the
/// client can retrieve and presents as its own analysis
/// (e.g. -Rpass-analysis=loop-vectorize).
OptimizationRemarkAnalysis &recordAnalysis(StringRef RemarkName,
Instruction *Instr = nullptr);
/// Collect memory access with loop invariant strides.
///
/// Looks for accesses like "a[i * StrideA]" where "StrideA" is loop
/// invariant.
void collectStridedAccess(Value *LoadOrStoreInst);
// Emits the first unsafe memory dependence in a loop.
// Emits nothing if there are no unsafe dependences
// or if the dependences were not recorded.
void emitUnsafeDependenceRemark();
std::unique_ptr<PredicatedScalarEvolution> PSE;
/// We need to check that all of the pointers in this list are disjoint
/// at runtime. Using std::unique_ptr to make using move ctor simpler.
std::unique_ptr<RuntimePointerChecking> PtrRtChecking;
/// the Memory Dependence Checker which can determine the
/// loop-independent and loop-carried dependences between memory accesses.
std::unique_ptr<MemoryDepChecker> DepChecker;
Loop *TheLoop;
unsigned NumLoads = 0;
unsigned NumStores = 0;
uint64_t MaxSafeDepDistBytes = -1;
/// Cache the result of analyzeLoop.
bool CanVecMem = false;
bool HasConvergentOp = false;
/// Indicator that there are non vectorizable stores to a uniform address.
bool HasDependenceInvolvingLoopInvariantAddress = false;
/// List of stores to invariant addresses.
SmallVector<StoreInst *> StoresToInvariantAddresses;
/// The diagnostics report generated for the analysis. E.g. why we
/// couldn't analyze the loop.
std::unique_ptr<OptimizationRemarkAnalysis> Report;
/// If an access has a symbolic strides, this maps the pointer value to
/// the stride symbol.
DenseMap<Value *, const SCEV *> SymbolicStrides;
};
/// Return the SCEV corresponding to a pointer with the symbolic stride
/// replaced with constant one, assuming the SCEV predicate associated with
/// \p PSE is true.
///
/// If necessary this method will version the stride of the pointer according
/// to \p PtrToStride and therefore add further predicates to \p PSE.
///
/// \p PtrToStride provides the mapping between the pointer value and its
/// stride as collected by LoopVectorizationLegality::collectStridedAccess.
const SCEV *
replaceSymbolicStrideSCEV(PredicatedScalarEvolution &PSE,
const DenseMap<Value *, const SCEV *> &PtrToStride,
Value *Ptr);
/// If the pointer has a constant stride return it in units of the access type
/// size. Otherwise return std::nullopt.
///
/// Ensure that it does not wrap in the address space, assuming the predicate
/// associated with \p PSE is true.
///
/// If necessary this method will version the stride of the pointer according
/// to \p PtrToStride and therefore add further predicates to \p PSE.
/// The \p Assume parameter indicates if we are allowed to make additional
/// run-time assumptions.
///
/// Note that the analysis results are defined if-and-only-if the original
/// memory access was defined. If that access was dead, or UB, then the
/// result of this function is undefined.
std::optional<int64_t>
getPtrStride(PredicatedScalarEvolution &PSE, Type *AccessTy, Value *Ptr,
const Loop *Lp,
const DenseMap<Value *, const SCEV *> &StridesMap = DenseMap<Value *, const SCEV *>(),
bool Assume = false, bool ShouldCheckWrap = true);
/// Returns the distance between the pointers \p PtrA and \p PtrB iff they are
/// compatible and it is possible to calculate the distance between them. This
/// is a simple API that does not depend on the analysis pass.
/// \param StrictCheck Ensure that the calculated distance matches the
/// type-based one after all the bitcasts removal in the provided pointers.
std::optional<int> getPointersDiff(Type *ElemTyA, Value *PtrA, Type *ElemTyB,
Value *PtrB, const DataLayout &DL,
ScalarEvolution &SE,
bool StrictCheck = false,
bool CheckType = true);
/// Attempt to sort the pointers in \p VL and return the sorted indices
/// in \p SortedIndices, if reordering is required.
///
/// Returns 'true' if sorting is legal, otherwise returns 'false'.
///
/// For example, for a given \p VL of memory accesses in program order, a[i+4],
/// a[i+0], a[i+1] and a[i+7], this function will sort the \p VL and save the
/// sorted indices in \p SortedIndices as a[i+0], a[i+1], a[i+4], a[i+7] and
/// saves the mask for actual memory accesses in program order in
/// \p SortedIndices as <1,2,0,3>
bool sortPtrAccesses(ArrayRef<Value *> VL, Type *ElemTy, const DataLayout &DL,
ScalarEvolution &SE,
SmallVectorImpl<unsigned> &SortedIndices);
/// Returns true if the memory operations \p A and \p B are consecutive.
/// This is a simple API that does not depend on the analysis pass.
bool isConsecutiveAccess(Value *A, Value *B, const DataLayout &DL,
ScalarEvolution &SE, bool CheckType = true);
class LoopAccessInfoManager {
/// The cache.
DenseMap<Loop *, std::unique_ptr<LoopAccessInfo>> LoopAccessInfoMap;
// The used analysis passes.
ScalarEvolution &SE;
AAResults &AA;
DominatorTree &DT;
LoopInfo &LI;
const TargetLibraryInfo *TLI = nullptr;
public:
LoopAccessInfoManager(ScalarEvolution &SE, AAResults &AA, DominatorTree &DT,
LoopInfo &LI, const TargetLibraryInfo *TLI)
: SE(SE), AA(AA), DT(DT), LI(LI), TLI(TLI) {}
const LoopAccessInfo &getInfo(Loop &L);
void clear() { LoopAccessInfoMap.clear(); }
bool invalidate(Function &F, const PreservedAnalyses &PA,
FunctionAnalysisManager::Invalidator &Inv);
};
/// This analysis provides dependence information for the memory
/// accesses of a loop.
///
/// It runs the analysis for a loop on demand. This can be initiated by
/// querying the loop access info via AM.getResult<LoopAccessAnalysis>.
/// getResult return a LoopAccessInfo object. See this class for the
/// specifics of what information is provided.
class LoopAccessAnalysis
: public AnalysisInfoMixin<LoopAccessAnalysis> {
friend AnalysisInfoMixin<LoopAccessAnalysis>;
static AnalysisKey Key;
public:
typedef LoopAccessInfoManager Result;
Result run(Function &F, FunctionAnalysisManager &AM);
};
inline Instruction *MemoryDepChecker::Dependence::getSource(
const LoopAccessInfo &LAI) const {
return LAI.getDepChecker().getMemoryInstructions()[Source];
}
inline Instruction *MemoryDepChecker::Dependence::getDestination(
const LoopAccessInfo &LAI) const {
return LAI.getDepChecker().getMemoryInstructions()[Destination];
}
} // End llvm namespace
#endif
PK iwFZ*ƣ*/2 /2 Analysis/LoopCacheAnalysis.hnu �[��� //===- llvm/Analysis/LoopCacheAnalysis.h ------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
///
/// \file
/// This file defines the interface for the loop cache analysis.
///
//===----------------------------------------------------------------------===//
#ifndef LLVM_ANALYSIS_LOOPCACHEANALYSIS_H
#define LLVM_ANALYSIS_LOOPCACHEANALYSIS_H
#include "llvm/Analysis/LoopAnalysisManager.h"
#include "llvm/IR/PassManager.h"
#include <optional>
namespace llvm {
class AAResults;
class DependenceInfo;
class Instruction;
class LPMUpdater;
class raw_ostream;
class LoopInfo;
class Loop;
class ScalarEvolution;
class SCEV;
class TargetTransformInfo;
using CacheCostTy = int64_t;
using LoopVectorTy = SmallVector<Loop *, 8>;
/// Represents a memory reference as a base pointer and a set of indexing
/// operations. For example given the array reference A[i][2j+1][3k+2] in a
/// 3-dim loop nest:
/// for(i=0;i<n;++i)
/// for(j=0;j<m;++j)
/// for(k=0;k<o;++k)
/// ... A[i][2j+1][3k+2] ...
/// We expect:
/// BasePointer -> A
/// Subscripts -> [{0,+,1}<%for.i>][{1,+,2}<%for.j>][{2,+,3}<%for.k>]
/// Sizes -> [m][o][4]
class IndexedReference {
friend raw_ostream &operator<<(raw_ostream &OS, const IndexedReference &R);
public:
/// Construct an indexed reference given a \p StoreOrLoadInst instruction.
IndexedReference(Instruction &StoreOrLoadInst, const LoopInfo &LI,
ScalarEvolution &SE);
bool isValid() const { return IsValid; }
const SCEV *getBasePointer() const { return BasePointer; }
size_t getNumSubscripts() const { return Subscripts.size(); }
const SCEV *getSubscript(unsigned SubNum) const {
assert(SubNum < getNumSubscripts() && "Invalid subscript number");
return Subscripts[SubNum];
}
const SCEV *getFirstSubscript() const {
assert(!Subscripts.empty() && "